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andrea
2025-11-28 23:32:42 +01:00
parent 94c8e4d0a4
commit 54b4131166
29 changed files with 9601 additions and 2544 deletions
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KiCADv6/IFX007T_IPC_Nominal_with_STEP.zip Normal file
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23
KiCADv6/IFX007T_IPC_Nominal_with_STEP/IFX007T_IPC_Nominal.kicad_sym Normal file
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(kicad_symbol_lib (version 20210918) (generator "ChatGPT IFX007T generator - IPC Nominal")
(symbol "IFX007TAUMA"
(in_bom yes)
(on_board yes)
(property "Reference" "U")
(property "Value" "IFX007TAUMA")
(property "Footprint" "PG-TO263-8_EP_IFX007T")
(property "Datasheet" "infineon-ifx007t-ds-en.pdf")
(pins
(pin passive line (name "1 GND") (number 1) (x -150) (y 84) (length 100) (orientation left))
(pin input line (name "2 IN") (number 2) (x -150) (y 60) (length 100) (orientation left))
(pin input line (name "3 INH") (number 3) (x -150) (y 36) (length 100) (orientation left))
(pin passive line (name "4 OUT") (number 4) (x -150) (y 12) (length 100) (orientation left))
(pin passive line (name "5 SR") (number 5) (x -150) (y -12) (length 100) (orientation left))
(pin passive line (name "6 IS") (number 6) (x -150) (y -36) (length 100) (orientation left))
(pin passive line (name "7 VS") (number 7) (x -150) (y -60) (length 100) (orientation left))
(pin passive line (name "8 OUT") (number 8) (x -150) (y -84) (length 100) (orientation left))
)
(graphics
(rectangle (pts (xy -40 96) (xy 40 -96)) )
)
)
)

56
KiCADv6/IFX007T_IPC_Nominal_with_STEP/PG-TO263-8_EP_IFX007T.kicad_mod Normal file
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(module PG-TO263-8_EP_IFX007T (layer F.Cu)
(descr "PG-TO263 with exposed pad - IPC Nominal reference footprint for IFX007T (verify against datasheet).")
(tags "IFX007T PG-TO263 TO-263 EP thermal-vias")
(attr smd)
(fp_text reference U1 (at 0 -7.0) (layer F.SilkS) (effects (font (size 1.0 1.0))))
(fp_text value IFX007TAUMA (at 0 9) (layer F.Fab) (effects (font (size 1.0 1.0))))
; approximate package silk outline from datasheet dimensions (verify before production). Source: uploaded datasheet.
(fp_line (start -7.0 7.5) (end 17.0 7.5) (layer F.SilkS) (width 0.12))
(fp_line (start 17.0 7.5) (end 17.0 -9.0) (layer F.SilkS) (width 0.12))
(fp_line (start 17.0 -9.0) (end -7.0 -9.0) (layer F.SilkS) (width 0.12))
(fp_line (start -7.0 -9.0) (end -7.0 7.5) (layer F.SilkS) (width 0.12))
; --- SMD lead pads (8 pins) - IPC Nominal-ish geometry; confirm vs datasheet ---
(pad 1 smd rect (at -3.0 6.0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -1.0 6.0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 1.0 6.0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 3.0 6.0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 5.0 6.0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 7.0 6.0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at 9.0 6.0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 11.0 6.0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
; --- Exposed pad (EP) as SMD pad (split into one large pad) ---
(pad EP smd rect (at 4.0 -1.0) (size 18.0 11.0) (layers F.Cu F.Paste F.Mask B.Cu B.Mask))
; --- Thermal via matrix inside exposed pad (IPC Nominal guidance) ---
; Using 20 vias arranged in a 5x4 grid to balance thermal performance and manufacturability.
; Via parameters chosen for typical board houses: drill 0.30 mm, pad 0.6 mm (check your fab limits).
(pad via1 thru_hole circle (at 0.0 -3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via2 thru_hole circle (at 3.0 -3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via3 thru_hole circle (at 6.0 -3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via4 thru_hole circle (at 9.0 -3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via5 thru_hole circle (at 12.0 -3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via6 thru_hole circle (at 0.0 -1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via7 thru_hole circle (at 3.0 -1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via8 thru_hole circle (at 6.0 -1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via9 thru_hole circle (at 9.0 -1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via10 thru_hole circle (at 12.0 -1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via11 thru_hole circle (at 0.0 1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via12 thru_hole circle (at 3.0 1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via13 thru_hole circle (at 6.0 1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via14 thru_hole circle (at 9.0 1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via15 thru_hole circle (at 12.0 1.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via16 thru_hole circle (at 0.0 3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via17 thru_hole circle (at 3.0 3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via18 thru_hole circle (at 6.0 3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via19 thru_hole circle (at 9.0 3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
(pad via20 thru_hole circle (at 12.0 3.0) (size 0.6 0.6) (drill 0.30) (layers *.Cu *.Mask))
; --- courtyard ---
(fp_rect (start -9.0 9.0) (end 19.0 -11.0) (layer F.CrtYd) (width 0.05))
)

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KiCADv6/IFX007T_IPC_Nominal_with_STEP/PG-TO263-8_EP_IFX007T.step Normal file
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ISO-10303-21;
HEADER;
FILE_DESCRIPTION(('Simple placeholder model for IFX007T PG-TO263-8 EP'), '2;1');
FILE_NAME('PG-TO263-8_EP_IFX007T.step', '2025-01-01T00:00:00', ('ChatGPT'), ('ChatGPT'), 'placeholder', 'ChatGPT', '');
FILE_SCHEMA(('AUTOMOTIVE_DESIGN'));
ENDSEC;
DATA;
#10=CARTESIAN_POINT('',(0.,0.,0.));
#11=CARTESIAN_POINT('',(10.,0.,0.));
#12=CARTESIAN_POINT('',(10.,10.,0.));
#13=CARTESIAN_POINT('',(0.,10.,0.));
#14=CARTESIAN_POINT('',(0.,0.,3.));
#15=CARTESIAN_POINT('',(10.,0.,3.));
#16=CARTESIAN_POINT('',(10.,10.,3.));
#17=CARTESIAN_POINT('',(0.,10.,3.));
ENDSEC;
END-ISO-10303-21;