AUTOM10.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000ec80 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000007ec 0800ed8c 0800ed8c 0000fd8c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800f578 0800f578 000111dc 2**0 CONTENTS, READONLY 4 .ARM 00000008 0800f578 0800f578 00010578 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 0800f580 0800f580 000111dc 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800f580 0800f580 00010580 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 0800f584 0800f584 00010584 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 000001dc 20000000 0800f588 00011000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 000016c4 200001e0 0800f764 000111e0 2**3 ALLOC 10 ._user_heap_stack 00000604 200018a4 0800f764 000118a4 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 000111dc 2**0 CONTENTS, READONLY 12 .debug_info 0001a717 00000000 00000000 00011205 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00004a0c 00000000 00000000 0002b91c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 000016a8 00000000 00000000 00030328 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 00001162 00000000 00000000 000319d0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 0001d304 00000000 00000000 00032b32 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001f27d 00000000 00000000 0004fe36 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 00095eba 00000000 00000000 0006f0b3 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 00104f6d 2**0 CONTENTS, READONLY 20 .debug_frame 00006194 00000000 00000000 00104fb0 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 0000005c 00000000 00000000 0010b144 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 0800010c <__do_global_dtors_aux>: 800010c: b510 push {r4, lr} 800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>) 8000110: 7823 ldrb r3, [r4, #0] 8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16> 8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>) 8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12> 8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>) 800011a: f3af 8000 nop.w 800011e: 2301 movs r3, #1 8000120: 7023 strb r3, [r4, #0] 8000122: bd10 pop {r4, pc} 8000124: 200001e0 .word 0x200001e0 8000128: 00000000 .word 0x00000000 800012c: 0800ed74 .word 0x0800ed74 08000130 : 8000130: b508 push {r3, lr} 8000132: 4b03 ldr r3, [pc, #12] @ (8000140 ) 8000134: b11b cbz r3, 800013e 8000136: 4903 ldr r1, [pc, #12] @ (8000144 ) 8000138: 4803 ldr r0, [pc, #12] @ (8000148 ) 800013a: f3af 8000 nop.w 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 8000144: 200001e4 .word 0x200001e4 8000148: 0800ed74 .word 0x0800ed74 0800014c : 800014c: 4603 mov r3, r0 800014e: f813 2b01 ldrb.w r2, [r3], #1 8000152: 2a00 cmp r2, #0 8000154: d1fb bne.n 800014e 8000156: 1a18 subs r0, r3, r0 8000158: 3801 subs r0, #1 800015a: 4770 bx lr 0800015c : uint16_t ch5 ; uint16_t ch6 ; uint16_t ch7 ; uint16_t ch8 ; void manageAdc(void){ 800015c: b480 push {r7} 800015e: af00 add r7, sp, #0 if (adc_avg_ready) 8000160: 4b12 ldr r3, [pc, #72] @ (80001ac ) 8000162: 781b ldrb r3, [r3, #0] 8000164: b2db uxtb r3, r3 8000166: 2b00 cmp r3, #0 8000168: d01b beq.n 80001a2 { adc_avg_ready = 0; 800016a: 4b10 ldr r3, [pc, #64] @ (80001ac ) 800016c: 2200 movs r2, #0 800016e: 701a strb r2, [r3, #0] // Read averaged channels (example mapping) ch4 = adc_avg[0]; 8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 ) 8000172: 881b ldrh r3, [r3, #0] 8000174: b29a uxth r2, r3 8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 ) 8000178: 801a strh r2, [r3, #0] ch5 = adc_avg[1]; 800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 ) 800017c: 885b ldrh r3, [r3, #2] 800017e: b29a uxth r2, r3 8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 ) 8000182: 801a strh r2, [r3, #0] ch6 = adc_avg[2]; 8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 ) 8000186: 889b ldrh r3, [r3, #4] 8000188: b29a uxth r2, r3 800018a: 4b0c ldr r3, [pc, #48] @ (80001bc ) 800018c: 801a strh r2, [r3, #0] ch7 = adc_avg[3]; 800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 ) 8000190: 88db ldrh r3, [r3, #6] 8000192: b29a uxth r2, r3 8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 ) 8000196: 801a strh r2, [r3, #0] ch8 = adc_avg[4]; 8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 ) 800019a: 891b ldrh r3, [r3, #8] 800019c: b29a uxth r2, r3 800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 ) 80001a0: 801a strh r2, [r3, #0] // Use them (convert to volts, control, etc.) // float v4 = (3.3f * ch4) / 4095.0f; } } 80001a2: bf00 nop 80001a4: 46bd mov sp, r7 80001a6: bc80 pop {r7} 80001a8: 4770 bx lr 80001aa: bf00 nop 80001ac: 20000229 .word 0x20000229 80001b0: 20000208 .word 0x20000208 80001b4: 2000022a .word 0x2000022a 80001b8: 2000022c .word 0x2000022c 80001bc: 2000022e .word 0x2000022e 80001c0: 20000230 .word 0x20000230 80001c4: 20000232 .word 0x20000232 080001c8 : void readAdc(void){ 80001c8: b480 push {r7} 80001ca: b083 sub sp, #12 80001cc: af00 add r7, sp, #0 for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001ce: 2300 movs r3, #0 80001d0: 71fb strb r3, [r7, #7] 80001d2: e010 b.n 80001f6 { adc_sum[i] += adc_dma_buf[i]; 80001d4: 79fb ldrb r3, [r7, #7] 80001d6: 4a21 ldr r2, [pc, #132] @ (800025c ) 80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 80001dc: b299 uxth r1, r3 80001de: 79fb ldrb r3, [r7, #7] 80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 ) 80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2] 80001e6: 79fb ldrb r3, [r7, #7] 80001e8: 440a add r2, r1 80001ea: 491d ldr r1, [pc, #116] @ (8000260 ) 80001ec: f841 2023 str.w r2, [r1, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001f0: 79fb ldrb r3, [r7, #7] 80001f2: 3301 adds r3, #1 80001f4: 71fb strb r3, [r7, #7] 80001f6: 79fb ldrb r3, [r7, #7] 80001f8: 2b04 cmp r3, #4 80001fa: d9eb bls.n 80001d4 } adc_sum_count++; 80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 ) 80001fe: 781b ldrb r3, [r3, #0] 8000200: 3301 adds r3, #1 8000202: b2da uxtb r2, r3 8000204: 4b17 ldr r3, [pc, #92] @ (8000264 ) 8000206: 701a strb r2, [r3, #0] /* When we collected ADC_AVG_WINDOW samples → compute average */ if (adc_sum_count >= ADC_AVG_WINDOW) 8000208: 4b16 ldr r3, [pc, #88] @ (8000264 ) 800020a: 781b ldrb r3, [r3, #0] 800020c: 2b04 cmp r3, #4 800020e: d920 bls.n 8000252 { for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 8000210: 2300 movs r3, #0 8000212: 71bb strb r3, [r7, #6] 8000214: e014 b.n 8000240 { adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW); 8000216: 79bb ldrb r3, [r7, #6] 8000218: 4a11 ldr r2, [pc, #68] @ (8000260 ) 800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800021e: 4a12 ldr r2, [pc, #72] @ (8000268 ) 8000220: fba2 2303 umull r2, r3, r2, r3 8000224: 089a lsrs r2, r3, #2 8000226: 79bb ldrb r3, [r7, #6] 8000228: b291 uxth r1, r2 800022a: 4a10 ldr r2, [pc, #64] @ (800026c ) 800022c: f822 1013 strh.w r1, [r2, r3, lsl #1] adc_sum[i] = 0; 8000230: 79bb ldrb r3, [r7, #6] 8000232: 4a0b ldr r2, [pc, #44] @ (8000260 ) 8000234: 2100 movs r1, #0 8000236: f842 1023 str.w r1, [r2, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 800023a: 79bb ldrb r3, [r7, #6] 800023c: 3301 adds r3, #1 800023e: 71bb strb r3, [r7, #6] 8000240: 79bb ldrb r3, [r7, #6] 8000242: 2b04 cmp r3, #4 8000244: d9e7 bls.n 8000216 } adc_sum_count = 0; 8000246: 4b07 ldr r3, [pc, #28] @ (8000264 ) 8000248: 2200 movs r2, #0 800024a: 701a strb r2, [r3, #0] adc_avg_ready = 1; // tell main loop new data is ready 800024c: 4b08 ldr r3, [pc, #32] @ (8000270 ) 800024e: 2201 movs r2, #1 8000250: 701a strb r2, [r3, #0] } } 8000252: bf00 nop 8000254: 370c adds r7, #12 8000256: 46bd mov sp, r7 8000258: bc80 pop {r7} 800025a: 4770 bx lr 800025c: 200001fc .word 0x200001fc 8000260: 20000214 .word 0x20000214 8000264: 20000228 .word 0x20000228 8000268: cccccccd .word 0xcccccccd 800026c: 20000208 .word 0x20000208 8000270: 20000229 .word 0x20000229 08000274 : uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data); void loadEE(void); void loadDefault(void); /* Pseudo-array accessor EEW[idx] */ static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value) { 8000274: b580 push {r7, lr} 8000276: b082 sub sp, #8 8000278: af00 add r7, sp, #0 800027a: 4603 mov r3, r0 800027c: 6039 str r1, [r7, #0] 800027e: 71fb strb r3, [r7, #7] return EE_ReadVariable(EEW_ADDR(idx), value); 8000280: 79fb ldrb r3, [r7, #7] 8000282: b29b uxth r3, r3 8000284: 3301 adds r3, #1 8000286: b29b uxth r3, r3 8000288: 6839 ldr r1, [r7, #0] 800028a: 4618 mov r0, r3 800028c: f001 f9d2 bl 8001634 8000290: 4603 mov r3, r0 } 8000292: 4618 mov r0, r3 8000294: 3708 adds r7, #8 8000296: 46bd mov sp, r7 8000298: bd80 pop {r7, pc} 0800029a : static inline uint16_t EEW_Write(uint8_t idx, uint16_t value) { 800029a: b580 push {r7, lr} 800029c: b082 sub sp, #8 800029e: af00 add r7, sp, #0 80002a0: 4603 mov r3, r0 80002a2: 460a mov r2, r1 80002a4: 71fb strb r3, [r7, #7] 80002a6: 4613 mov r3, r2 80002a8: 80bb strh r3, [r7, #4] return EE_WriteVariable(EEW_ADDR(idx), value); 80002aa: 79fb ldrb r3, [r7, #7] 80002ac: b29b uxth r3, r3 80002ae: 3301 adds r3, #1 80002b0: b29b uxth r3, r3 80002b2: 88ba ldrh r2, [r7, #4] 80002b4: 4611 mov r1, r2 80002b6: 4618 mov r0, r3 80002b8: f001 f9d8 bl 800166c 80002bc: 4603 mov r3, r0 } 80002be: 4618 mov r0, r3 80002c0: 3708 adds r7, #8 80002c2: 46bd mov sp, r7 80002c4: bd80 pop {r7, pc} 080002c6 : extern uint16_t tramp; extern uint16_t tanem; extern uint16_t thanem; extern uint16_t trampman; bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){ 80002c6: b490 push {r4, r7} 80002c8: b082 sub sp, #8 80002ca: af00 add r7, sp, #0 80002cc: 4604 mov r4, r0 80002ce: 4608 mov r0, r1 80002d0: 4611 mov r1, r2 80002d2: 461a mov r2, r3 80002d4: 4623 mov r3, r4 80002d6: 71fb strb r3, [r7, #7] 80002d8: 4603 mov r3, r0 80002da: 71bb strb r3, [r7, #6] 80002dc: 460b mov r3, r1 80002de: 717b strb r3, [r7, #5] 80002e0: 4613 mov r3, r2 80002e2: 713b strb r3, [r7, #4] if((c1>='0')&&(c1<='9')){ 80002e4: 79fb ldrb r3, [r7, #7] 80002e6: 2b2f cmp r3, #47 @ 0x2f 80002e8: d906 bls.n 80002f8 80002ea: 79fb ldrb r3, [r7, #7] 80002ec: 2b39 cmp r3, #57 @ 0x39 80002ee: d803 bhi.n 80002f8 c1-='0'; 80002f0: 79fb ldrb r3, [r7, #7] 80002f2: 3b30 subs r3, #48 @ 0x30 80002f4: 71fb strb r3, [r7, #7] 80002f6: e00b b.n 8000310 }else if((c1>='a')&&(c1<='f')){ 80002f8: 79fb ldrb r3, [r7, #7] 80002fa: 2b60 cmp r3, #96 @ 0x60 80002fc: d906 bls.n 800030c 80002fe: 79fb ldrb r3, [r7, #7] 8000300: 2b66 cmp r3, #102 @ 0x66 8000302: d803 bhi.n 800030c c1=(c1-'a')+10; 8000304: 79fb ldrb r3, [r7, #7] 8000306: 3b57 subs r3, #87 @ 0x57 8000308: 71fb strb r3, [r7, #7] 800030a: e001 b.n 8000310 }else return false; 800030c: 2300 movs r3, #0 800030e: e070 b.n 80003f2 if((c2>='0')&&(c2<='9')){ 8000310: 79bb ldrb r3, [r7, #6] 8000312: 2b2f cmp r3, #47 @ 0x2f 8000314: d906 bls.n 8000324 8000316: 79bb ldrb r3, [r7, #6] 8000318: 2b39 cmp r3, #57 @ 0x39 800031a: d803 bhi.n 8000324 c2-='0'; 800031c: 79bb ldrb r3, [r7, #6] 800031e: 3b30 subs r3, #48 @ 0x30 8000320: 71bb strb r3, [r7, #6] 8000322: e00b b.n 800033c }else if((c2>='a')&&(c2<='f')){ 8000324: 79bb ldrb r3, [r7, #6] 8000326: 2b60 cmp r3, #96 @ 0x60 8000328: d906 bls.n 8000338 800032a: 79bb ldrb r3, [r7, #6] 800032c: 2b66 cmp r3, #102 @ 0x66 800032e: d803 bhi.n 8000338 c2=(c2-'a')+10; 8000330: 79bb ldrb r3, [r7, #6] 8000332: 3b57 subs r3, #87 @ 0x57 8000334: 71bb strb r3, [r7, #6] 8000336: e001 b.n 800033c }else return false; 8000338: 2300 movs r3, #0 800033a: e05a b.n 80003f2 if((c3>='0')&&(c3<='9')){ 800033c: 797b ldrb r3, [r7, #5] 800033e: 2b2f cmp r3, #47 @ 0x2f 8000340: d906 bls.n 8000350 8000342: 797b ldrb r3, [r7, #5] 8000344: 2b39 cmp r3, #57 @ 0x39 8000346: d803 bhi.n 8000350 c3-='0'; 8000348: 797b ldrb r3, [r7, #5] 800034a: 3b30 subs r3, #48 @ 0x30 800034c: 717b strb r3, [r7, #5] 800034e: e00b b.n 8000368 }else if((c3>='a')&&(c3<='f')){ 8000350: 797b ldrb r3, [r7, #5] 8000352: 2b60 cmp r3, #96 @ 0x60 8000354: d906 bls.n 8000364 8000356: 797b ldrb r3, [r7, #5] 8000358: 2b66 cmp r3, #102 @ 0x66 800035a: d803 bhi.n 8000364 c3=(c3-'a')+10; 800035c: 797b ldrb r3, [r7, #5] 800035e: 3b57 subs r3, #87 @ 0x57 8000360: 717b strb r3, [r7, #5] 8000362: e001 b.n 8000368 }else return false; 8000364: 2300 movs r3, #0 8000366: e044 b.n 80003f2 if((c4>='0')&&(c4<='9')){ 8000368: 793b ldrb r3, [r7, #4] 800036a: 2b2f cmp r3, #47 @ 0x2f 800036c: d906 bls.n 800037c 800036e: 793b ldrb r3, [r7, #4] 8000370: 2b39 cmp r3, #57 @ 0x39 8000372: d803 bhi.n 800037c c4-='0'; 8000374: 793b ldrb r3, [r7, #4] 8000376: 3b30 subs r3, #48 @ 0x30 8000378: 713b strb r3, [r7, #4] 800037a: e00b b.n 8000394 }else if((c4>='a')&&(c4<='f')){ 800037c: 793b ldrb r3, [r7, #4] 800037e: 2b60 cmp r3, #96 @ 0x60 8000380: d906 bls.n 8000390 8000382: 793b ldrb r3, [r7, #4] 8000384: 2b66 cmp r3, #102 @ 0x66 8000386: d803 bhi.n 8000390 c4=(c4-'a')+10; 8000388: 793b ldrb r3, [r7, #4] 800038a: 3b57 subs r3, #87 @ 0x57 800038c: 713b strb r3, [r7, #4] 800038e: e001 b.n 8000394 }else return false; 8000390: 2300 movs r3, #0 8000392: e02e b.n 80003f2 *retval=c1; 8000394: 79fb ldrb r3, [r7, #7] 8000396: b29a uxth r2, r3 8000398: 693b ldr r3, [r7, #16] 800039a: 801a strh r2, [r3, #0] *retval*=16; 800039c: 693b ldr r3, [r7, #16] 800039e: 881b ldrh r3, [r3, #0] 80003a0: 011b lsls r3, r3, #4 80003a2: b29a uxth r2, r3 80003a4: 693b ldr r3, [r7, #16] 80003a6: 801a strh r2, [r3, #0] *retval+=c2; 80003a8: 693b ldr r3, [r7, #16] 80003aa: 881a ldrh r2, [r3, #0] 80003ac: 79bb ldrb r3, [r7, #6] 80003ae: b29b uxth r3, r3 80003b0: 4413 add r3, r2 80003b2: b29a uxth r2, r3 80003b4: 693b ldr r3, [r7, #16] 80003b6: 801a strh r2, [r3, #0] *retval*=16; 80003b8: 693b ldr r3, [r7, #16] 80003ba: 881b ldrh r3, [r3, #0] 80003bc: 011b lsls r3, r3, #4 80003be: b29a uxth r2, r3 80003c0: 693b ldr r3, [r7, #16] 80003c2: 801a strh r2, [r3, #0] *retval+=c3; 80003c4: 693b ldr r3, [r7, #16] 80003c6: 881a ldrh r2, [r3, #0] 80003c8: 797b ldrb r3, [r7, #5] 80003ca: b29b uxth r3, r3 80003cc: 4413 add r3, r2 80003ce: b29a uxth r2, r3 80003d0: 693b ldr r3, [r7, #16] 80003d2: 801a strh r2, [r3, #0] *retval*=16; 80003d4: 693b ldr r3, [r7, #16] 80003d6: 881b ldrh r3, [r3, #0] 80003d8: 011b lsls r3, r3, #4 80003da: b29a uxth r2, r3 80003dc: 693b ldr r3, [r7, #16] 80003de: 801a strh r2, [r3, #0] *retval+=c4; 80003e0: 693b ldr r3, [r7, #16] 80003e2: 881a ldrh r2, [r3, #0] 80003e4: 793b ldrb r3, [r7, #4] 80003e6: b29b uxth r3, r3 80003e8: 4413 add r3, r2 80003ea: b29a uxth r2, r3 80003ec: 693b ldr r3, [r7, #16] 80003ee: 801a strh r2, [r3, #0] return true; 80003f0: 2301 movs r3, #1 } 80003f2: 4618 mov r0, r3 80003f4: 3708 adds r7, #8 80003f6: 46bd mov sp, r7 80003f8: bc90 pop {r4, r7} 80003fa: 4770 bx lr 080003fc : void manageCDC(void){ 80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8000400: b0c1 sub sp, #260 @ 0x104 8000402: af06 add r7, sp, #24 uint16_t val; uint16_t st; uint16_t eeadd; uint8_t i; if (CDC_Available()) { 8000404: f00d fb52 bl 800daac 8000408: 4603 mov r3, r0 800040a: 2b00 cmp r3, #0 800040c: f000 86c8 beq.w 80011a0 int rx = CDC_ReadByte(); 8000410: f00d fb60 bl 800dad4 8000414: f8c7 00e0 str.w r0, [r7, #224] @ 0xe0 if (rx < 0) return; 8000418: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800041c: 2b00 cmp r3, #0 800041e: f2c0 86be blt.w 800119e //uint8_t out = (uint8_t)c; //if (out >= 'a' && out <= 'z') out -= 32; // to upper rxbuf[rxidx]=rx; 8000422: 4bbd ldr r3, [pc, #756] @ (8000718 ) 8000424: 781b ldrb r3, [r3, #0] 8000426: 461a mov r2, r3 8000428: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800042c: b2d9 uxtb r1, r3 800042e: 4bbb ldr r3, [pc, #748] @ (800071c ) 8000430: 5499 strb r1, [r3, r2] while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo 8000432: bf00 nop 8000434: 4bb8 ldr r3, [pc, #736] @ (8000718 ) 8000436: 781b ldrb r3, [r3, #0] 8000438: 461a mov r2, r3 800043a: 4bb8 ldr r3, [pc, #736] @ (800071c ) 800043c: 4413 add r3, r2 800043e: 2101 movs r1, #1 8000440: 4618 mov r0, r3 8000442: f00d fc09 bl 800dc58 8000446: 4603 mov r3, r0 8000448: 2b01 cmp r3, #1 800044a: d0f3 beq.n 8000434 if((rx==0x0d)||(rx==0x0a)){ 800044c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8000450: 2b0d cmp r3, #13 8000452: d004 beq.n 800045e 8000454: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8000458: 2b0a cmp r3, #10 800045a: f040 8699 bne.w 8001190 if(rxidx){ 800045e: 4bae ldr r3, [pc, #696] @ (8000718 ) 8000460: 781b ldrb r3, [r3, #0] 8000462: 2b00 cmp r3, #0 8000464: f000 8690 beq.w 8001188 switch(rxbuf[0]){ 8000468: 4bac ldr r3, [pc, #688] @ (800071c ) 800046a: 781b ldrb r3, [r3, #0] 800046c: 3b49 subs r3, #73 @ 0x49 800046e: 2b24 cmp r3, #36 @ 0x24 8000470: f200 8678 bhi.w 8001164 8000474: a201 add r2, pc, #4 @ (adr r2, 800047c ) 8000476: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800047a: bf00 nop 800047c: 080006c7 .word 0x080006c7 8000480: 08001165 .word 0x08001165 8000484: 08001165 .word 0x08001165 8000488: 08001165 .word 0x08001165 800048c: 08001165 .word 0x08001165 8000490: 08001165 .word 0x08001165 8000494: 08001165 .word 0x08001165 8000498: 08001165 .word 0x08001165 800049c: 08001165 .word 0x08001165 80004a0: 08001165 .word 0x08001165 80004a4: 08001165 .word 0x08001165 80004a8: 08001165 .word 0x08001165 80004ac: 08001165 .word 0x08001165 80004b0: 08001165 .word 0x08001165 80004b4: 08001165 .word 0x08001165 80004b8: 08001165 .word 0x08001165 80004bc: 08001165 .word 0x08001165 80004c0: 08001165 .word 0x08001165 80004c4: 08001165 .word 0x08001165 80004c8: 08001165 .word 0x08001165 80004cc: 08001165 .word 0x08001165 80004d0: 08001165 .word 0x08001165 80004d4: 08001165 .word 0x08001165 80004d8: 08001165 .word 0x08001165 80004dc: 08001165 .word 0x08001165 80004e0: 080006eb .word 0x080006eb 80004e4: 08001165 .word 0x08001165 80004e8: 08001165 .word 0x08001165 80004ec: 080009f5 .word 0x080009f5 80004f0: 08001165 .word 0x08001165 80004f4: 08001165 .word 0x08001165 80004f8: 08001165 .word 0x08001165 80004fc: 08000511 .word 0x08000511 8000500: 08001165 .word 0x08001165 8000504: 08001165 .word 0x08001165 8000508: 08001165 .word 0x08001165 800050c: 080007ad .word 0x080007ad case 'i': sprintf((char*)s,"info\n"); 8000510: f107 0310 add.w r3, r7, #16 8000514: 4982 ldr r1, [pc, #520] @ (8000720 ) 8000516: 4618 mov r0, r3 8000518: f00d ff7c bl 800e414 while (CDC_Transmit_FS(s, 5) == USBD_BUSY); 800051c: bf00 nop 800051e: f107 0310 add.w r3, r7, #16 8000522: 2105 movs r1, #5 8000524: 4618 mov r0, r3 8000526: f00d fb97 bl 800dc58 800052a: 4603 mov r3, r0 800052c: 2b01 cmp r3, #1 800052e: d0f6 beq.n 800051e sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4)); 8000530: 2100 movs r1, #0 8000532: 487c ldr r0, [pc, #496] @ (8000724 ) 8000534: f003 ff68 bl 8004408 8000538: 4603 mov r3, r0 800053a: 4698 mov r8, r3 800053c: 2104 movs r1, #4 800053e: 4879 ldr r0, [pc, #484] @ (8000724 ) 8000540: f003 ff62 bl 8004408 8000544: 4603 mov r3, r0 8000546: 4699 mov r9, r3 8000548: 2108 movs r1, #8 800054a: 4876 ldr r0, [pc, #472] @ (8000724 ) 800054c: f003 ff5c bl 8004408 8000550: 4603 mov r3, r0 8000552: 461c mov r4, r3 8000554: 210c movs r1, #12 8000556: 4873 ldr r0, [pc, #460] @ (8000724 ) 8000558: f003 ff56 bl 8004408 800055c: 4603 mov r3, r0 800055e: 461d mov r5, r3 8000560: 2100 movs r1, #0 8000562: 4871 ldr r0, [pc, #452] @ (8000728 ) 8000564: f003 ff50 bl 8004408 8000568: 4603 mov r3, r0 800056a: 461e mov r6, r3 800056c: 2104 movs r1, #4 800056e: 486e ldr r0, [pc, #440] @ (8000728 ) 8000570: f003 ff4a bl 8004408 8000574: 4603 mov r3, r0 8000576: 607b str r3, [r7, #4] 8000578: 2108 movs r1, #8 800057a: 486b ldr r0, [pc, #428] @ (8000728 ) 800057c: f003 ff44 bl 8004408 8000580: 4603 mov r3, r0 8000582: 603b str r3, [r7, #0] 8000584: 210c movs r1, #12 8000586: 4868 ldr r0, [pc, #416] @ (8000728 ) 8000588: f003 ff3e bl 8004408 800058c: 4603 mov r3, r0 800058e: f107 0010 add.w r0, r7, #16 8000592: 9305 str r3, [sp, #20] 8000594: 683a ldr r2, [r7, #0] 8000596: 9204 str r2, [sp, #16] 8000598: 687b ldr r3, [r7, #4] 800059a: 9303 str r3, [sp, #12] 800059c: 9602 str r6, [sp, #8] 800059e: 9501 str r5, [sp, #4] 80005a0: 9400 str r4, [sp, #0] 80005a2: 464b mov r3, r9 80005a4: 4642 mov r2, r8 80005a6: 4961 ldr r1, [pc, #388] @ (800072c ) 80005a8: f00d ff34 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80005ac: bf00 nop 80005ae: f107 0310 add.w r3, r7, #16 80005b2: 4618 mov r0, r3 80005b4: f7ff fdca bl 800014c 80005b8: 4603 mov r3, r0 80005ba: b29a uxth r2, r3 80005bc: f107 0310 add.w r3, r7, #16 80005c0: 4611 mov r1, r2 80005c2: 4618 mov r0, r3 80005c4: f00d fb48 bl 800dc58 80005c8: 4603 mov r3, r0 80005ca: 2b01 cmp r3, #1 80005cc: d0ef beq.n 80005ae sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4)); 80005ce: 4b55 ldr r3, [pc, #340] @ (8000724 ) 80005d0: 681b ldr r3, [r3, #0] 80005d2: 6b5b ldr r3, [r3, #52] @ 0x34 80005d4: 607b str r3, [r7, #4] 80005d6: 4b53 ldr r3, [pc, #332] @ (8000724 ) 80005d8: 681b ldr r3, [r3, #0] 80005da: 6b99 ldr r1, [r3, #56] @ 0x38 80005dc: 6039 str r1, [r7, #0] 80005de: 4b51 ldr r3, [pc, #324] @ (8000724 ) 80005e0: 681b ldr r3, [r3, #0] 80005e2: 6bdb ldr r3, [r3, #60] @ 0x3c 80005e4: 4a4f ldr r2, [pc, #316] @ (8000724 ) 80005e6: 6812 ldr r2, [r2, #0] 80005e8: 6c12 ldr r2, [r2, #64] @ 0x40 80005ea: 494f ldr r1, [pc, #316] @ (8000728 ) 80005ec: 6809 ldr r1, [r1, #0] 80005ee: 6b49 ldr r1, [r1, #52] @ 0x34 80005f0: 484d ldr r0, [pc, #308] @ (8000728 ) 80005f2: 6800 ldr r0, [r0, #0] 80005f4: 6b80 ldr r0, [r0, #56] @ 0x38 80005f6: 4c4c ldr r4, [pc, #304] @ (8000728 ) 80005f8: 6824 ldr r4, [r4, #0] 80005fa: 6be4 ldr r4, [r4, #60] @ 0x3c 80005fc: 4d4a ldr r5, [pc, #296] @ (8000728 ) 80005fe: 682d ldr r5, [r5, #0] 8000600: 6c2d ldr r5, [r5, #64] @ 0x40 8000602: f107 0610 add.w r6, r7, #16 8000606: 9505 str r5, [sp, #20] 8000608: 9404 str r4, [sp, #16] 800060a: 9003 str r0, [sp, #12] 800060c: 9102 str r1, [sp, #8] 800060e: 9201 str r2, [sp, #4] 8000610: 9300 str r3, [sp, #0] 8000612: 683b ldr r3, [r7, #0] 8000614: 687a ldr r2, [r7, #4] 8000616: 4946 ldr r1, [pc, #280] @ (8000730 ) 8000618: 4630 mov r0, r6 800061a: f00d fefb bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 800061e: bf00 nop 8000620: f107 0310 add.w r3, r7, #16 8000624: 4618 mov r0, r3 8000626: f7ff fd91 bl 800014c 800062a: 4603 mov r3, r0 800062c: b29a uxth r2, r3 800062e: f107 0310 add.w r3, r7, #16 8000632: 4611 mov r1, r2 8000634: 4618 mov r0, r3 8000636: f00d fb0f bl 800dc58 800063a: 4603 mov r3, r0 800063c: 2b01 cmp r3, #1 800063e: d0ef beq.n 8000620 sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8); 8000640: 4b3c ldr r3, [pc, #240] @ (8000734 ) 8000642: 781b ldrb r3, [r3, #0] 8000644: 461d mov r5, r3 8000646: 4b3c ldr r3, [pc, #240] @ (8000738 ) 8000648: 881b ldrh r3, [r3, #0] 800064a: 461e mov r6, r3 800064c: 4b3b ldr r3, [pc, #236] @ (800073c ) 800064e: 881b ldrh r3, [r3, #0] 8000650: 461a mov r2, r3 8000652: 4b3b ldr r3, [pc, #236] @ (8000740 ) 8000654: 881b ldrh r3, [r3, #0] 8000656: 4619 mov r1, r3 8000658: 4b3a ldr r3, [pc, #232] @ (8000744 ) 800065a: 881b ldrh r3, [r3, #0] 800065c: 461c mov r4, r3 800065e: 4b3a ldr r3, [pc, #232] @ (8000748 ) 8000660: 881b ldrh r3, [r3, #0] 8000662: f107 0010 add.w r0, r7, #16 8000666: 9303 str r3, [sp, #12] 8000668: 9402 str r4, [sp, #8] 800066a: 9101 str r1, [sp, #4] 800066c: 9200 str r2, [sp, #0] 800066e: 4633 mov r3, r6 8000670: 462a mov r2, r5 8000672: 4936 ldr r1, [pc, #216] @ (800074c ) 8000674: f00d fece bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000678: bf00 nop 800067a: f107 0310 add.w r3, r7, #16 800067e: 4618 mov r0, r3 8000680: f7ff fd64 bl 800014c 8000684: 4603 mov r3, r0 8000686: b29a uxth r2, r3 8000688: f107 0310 add.w r3, r7, #16 800068c: 4611 mov r1, r2 800068e: 4618 mov r0, r3 8000690: f00d fae2 bl 800dc58 8000694: 4603 mov r3, r0 8000696: 2b01 cmp r3, #1 8000698: d0ef beq.n 800067a sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti); 800069a: 4b2d ldr r3, [pc, #180] @ (8000750 ) 800069c: 781b ldrb r3, [r3, #0] 800069e: 461a mov r2, r3 80006a0: 4b2c ldr r3, [pc, #176] @ (8000754 ) 80006a2: 781b ldrb r3, [r3, #0] 80006a4: f107 0010 add.w r0, r7, #16 80006a8: 492b ldr r1, [pc, #172] @ (8000758 ) 80006aa: f00d feb3 bl 800e414 while (CDC_Transmit_FS(s, 31) == USBD_BUSY); 80006ae: bf00 nop 80006b0: f107 0310 add.w r3, r7, #16 80006b4: 211f movs r1, #31 80006b6: 4618 mov r0, r3 80006b8: f00d face bl 800dc58 80006bc: 4603 mov r3, r0 80006be: 2b01 cmp r3, #1 80006c0: d0f6 beq.n 80006b0 break; 80006c2: f000 bd61 b.w 8001188 case 'I': sprintf((char*)s,"\nID000000"); 80006c6: f107 0310 add.w r3, r7, #16 80006ca: 4924 ldr r1, [pc, #144] @ (800075c ) 80006cc: 4618 mov r0, r3 80006ce: f00d fea1 bl 800e414 while (CDC_Transmit_FS(s, 9) == USBD_BUSY); 80006d2: bf00 nop 80006d4: f107 0310 add.w r3, r7, #16 80006d8: 2109 movs r1, #9 80006da: 4618 mov r0, r3 80006dc: f00d fabc bl 800dc58 80006e0: 4603 mov r3, r0 80006e2: 2b01 cmp r3, #1 80006e4: d0f6 beq.n 80006d4 break; 80006e6: f000 bd4f b.w 8001188 case 'b': if(rxidx==2){ 80006ea: 4b0b ldr r3, [pc, #44] @ (8000718 ) 80006ec: 781b ldrb r3, [r3, #0] 80006ee: 2b02 cmp r3, #2 80006f0: d14a bne.n 8000788 if(rxbuf[1]=='0'){ 80006f2: 4b0a ldr r3, [pc, #40] @ (800071c ) 80006f4: 785b ldrb r3, [r3, #1] 80006f6: 2b30 cmp r3, #48 @ 0x30 80006f8: d104 bne.n 8000704 nobuz=false; 80006fa: 4b19 ldr r3, [pc, #100] @ (8000760 ) 80006fc: 2200 movs r2, #0 80006fe: 701a strb r2, [r3, #0] } }else{ sprintf((char*)s,"\nb0|1"); while (CDC_Transmit_FS(s, 5) == USBD_BUSY); } break; 8000700: f000 bd42 b.w 8001188 }else if(rxbuf[1]=='1'){ 8000704: 4b05 ldr r3, [pc, #20] @ (800071c ) 8000706: 785b ldrb r3, [r3, #1] 8000708: 2b31 cmp r3, #49 @ 0x31 800070a: d12b bne.n 8000764 nobuz=true; 800070c: 4b14 ldr r3, [pc, #80] @ (8000760 ) 800070e: 2201 movs r2, #1 8000710: 701a strb r2, [r3, #0] break; 8000712: f000 bd39 b.w 8001188 8000716: bf00 nop 8000718: 20000234 .word 0x20000234 800071c: 20000238 .word 0x20000238 8000720: 0800ed8c .word 0x0800ed8c 8000724: 20000318 .word 0x20000318 8000728: 20000360 .word 0x20000360 800072c: 0800ed94 .word 0x0800ed94 8000730: 0800edac .word 0x0800edac 8000734: 200003f0 .word 0x200003f0 8000738: 2000022a .word 0x2000022a 800073c: 2000022c .word 0x2000022c 8000740: 2000022e .word 0x2000022e 8000744: 20000230 .word 0x20000230 8000748: 20000232 .word 0x20000232 800074c: 0800ede0 .word 0x0800ede0 8000750: 20000456 .word 0x20000456 8000754: 20000454 .word 0x20000454 8000758: 0800ee18 .word 0x0800ee18 800075c: 0800ee38 .word 0x0800ee38 8000760: 20000458 .word 0x20000458 sprintf((char*)s,"\nb0|1"); 8000764: f107 0310 add.w r3, r7, #16 8000768: 499b ldr r1, [pc, #620] @ (80009d8 ) 800076a: 4618 mov r0, r3 800076c: f00d fe52 bl 800e414 while (CDC_Transmit_FS(s, 5) == USBD_BUSY); 8000770: bf00 nop 8000772: f107 0310 add.w r3, r7, #16 8000776: 2105 movs r1, #5 8000778: 4618 mov r0, r3 800077a: f00d fa6d bl 800dc58 800077e: 4603 mov r3, r0 8000780: 2b01 cmp r3, #1 8000782: d0f6 beq.n 8000772 break; 8000784: f000 bd00 b.w 8001188 sprintf((char*)s,"\nb0|1"); 8000788: f107 0310 add.w r3, r7, #16 800078c: 4992 ldr r1, [pc, #584] @ (80009d8 ) 800078e: 4618 mov r0, r3 8000790: f00d fe40 bl 800e414 while (CDC_Transmit_FS(s, 5) == USBD_BUSY); 8000794: bf00 nop 8000796: f107 0310 add.w r3, r7, #16 800079a: 2105 movs r1, #5 800079c: 4618 mov r0, r3 800079e: f00d fa5b bl 800dc58 80007a2: 4603 mov r3, r0 80007a4: 2b01 cmp r3, #1 80007a6: d0f6 beq.n 8000796 break; 80007a8: f000 bcee b.w 8001188 case 'm': if(rxidx==8){ 80007ac: 4b8b ldr r3, [pc, #556] @ (80009dc ) 80007ae: 781b ldrb r3, [r3, #0] 80007b0: 2b08 cmp r3, #8 80007b2: f040 80fe bne.w 80009b2 if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){ 80007b6: 4b8a ldr r3, [pc, #552] @ (80009e0 ) 80007b8: 785b ldrb r3, [r3, #1] 80007ba: 2b30 cmp r3, #48 @ 0x30 80007bc: f240 80e8 bls.w 8000990 80007c0: 4b87 ldr r3, [pc, #540] @ (80009e0 ) 80007c2: 785b ldrb r3, [r3, #1] 80007c4: 2b34 cmp r3, #52 @ 0x34 80007c6: f200 80e3 bhi.w 8000990 mot=rxbuf[1]-='0'; 80007ca: 4b85 ldr r3, [pc, #532] @ (80009e0 ) 80007cc: 785b ldrb r3, [r3, #1] 80007ce: 3b30 subs r3, #48 @ 0x30 80007d0: b2da uxtb r2, r3 80007d2: 4b83 ldr r3, [pc, #524] @ (80009e0 ) 80007d4: 705a strb r2, [r3, #1] 80007d6: 4b82 ldr r3, [pc, #520] @ (80009e0 ) 80007d8: 785b ldrb r3, [r3, #1] 80007da: f887 30df strb.w r3, [r7, #223] @ 0xdf if(rxbuf[2]=='f'){ 80007de: 4b80 ldr r3, [pc, #512] @ (80009e0 ) 80007e0: 789b ldrb r3, [r3, #2] 80007e2: 2b66 cmp r3, #102 @ 0x66 80007e4: d103 bne.n 80007ee dir=FW; 80007e6: 2300 movs r3, #0 80007e8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7 80007ec: e019 b.n 8000822 }else if(rxbuf[2]=='b'){ 80007ee: 4b7c ldr r3, [pc, #496] @ (80009e0 ) 80007f0: 789b ldrb r3, [r3, #2] 80007f2: 2b62 cmp r3, #98 @ 0x62 80007f4: d103 bne.n 80007fe dir=BW; 80007f6: 2301 movs r3, #1 80007f8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7 80007fc: e011 b.n 8000822 }else{ sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore 80007fe: f107 0310 add.w r3, r7, #16 8000802: 4978 ldr r1, [pc, #480] @ (80009e4 ) 8000804: 4618 mov r0, r3 8000806: f00d fe05 bl 800e414 while (CDC_Transmit_FS(s, 16) == USBD_BUSY); 800080a: bf00 nop 800080c: f107 0310 add.w r3, r7, #16 8000810: 2110 movs r1, #16 8000812: 4618 mov r0, r3 8000814: f00d fa20 bl 800dc58 8000818: 4603 mov r3, r0 800081a: 2b01 cmp r3, #1 800081c: d0f6 beq.n 800080c break; 800081e: f000 bcb3 b.w 8001188 } if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 8000822: 4b6f ldr r3, [pc, #444] @ (80009e0 ) 8000824: 78db ldrb r3, [r3, #3] 8000826: 2b2f cmp r3, #47 @ 0x2f 8000828: f240 80a1 bls.w 800096e 800082c: 4b6c ldr r3, [pc, #432] @ (80009e0 ) 800082e: 78db ldrb r3, [r3, #3] 8000830: 2b39 cmp r3, #57 @ 0x39 8000832: f200 809c bhi.w 800096e 8000836: 4b6a ldr r3, [pc, #424] @ (80009e0 ) 8000838: 791b ldrb r3, [r3, #4] 800083a: 2b2f cmp r3, #47 @ 0x2f 800083c: f240 8097 bls.w 800096e 8000840: 4b67 ldr r3, [pc, #412] @ (80009e0 ) 8000842: 791b ldrb r3, [r3, #4] 8000844: 2b39 cmp r3, #57 @ 0x39 8000846: f200 8092 bhi.w 800096e 800084a: 4b65 ldr r3, [pc, #404] @ (80009e0 ) 800084c: 795b ldrb r3, [r3, #5] 800084e: 2b2f cmp r3, #47 @ 0x2f 8000850: f240 808d bls.w 800096e 8000854: 4b62 ldr r3, [pc, #392] @ (80009e0 ) 8000856: 795b ldrb r3, [r3, #5] 8000858: 2b39 cmp r3, #57 @ 0x39 800085a: f200 8088 bhi.w 800096e 800085e: 4b60 ldr r3, [pc, #384] @ (80009e0 ) 8000860: 799b ldrb r3, [r3, #6] 8000862: 2b2f cmp r3, #47 @ 0x2f 8000864: f240 8083 bls.w 800096e 8000868: 4b5d ldr r3, [pc, #372] @ (80009e0 ) 800086a: 799b ldrb r3, [r3, #6] 800086c: 2b39 cmp r3, #57 @ 0x39 800086e: d87e bhi.n 800096e 8000870: 4b5b ldr r3, [pc, #364] @ (80009e0 ) 8000872: 79db ldrb r3, [r3, #7] 8000874: 2b2f cmp r3, #47 @ 0x2f 8000876: d97a bls.n 800096e 8000878: 4b59 ldr r3, [pc, #356] @ (80009e0 ) 800087a: 79db ldrb r3, [r3, #7] 800087c: 2b39 cmp r3, #57 @ 0x39 800087e: d876 bhi.n 800096e dm=rxbuf[3]-='0'; 8000880: 4b57 ldr r3, [pc, #348] @ (80009e0 ) 8000882: 78db ldrb r3, [r3, #3] 8000884: 3b30 subs r3, #48 @ 0x30 8000886: b2da uxtb r2, r3 8000888: 4b55 ldr r3, [pc, #340] @ (80009e0 ) 800088a: 70da strb r2, [r3, #3] 800088c: 4b54 ldr r3, [pc, #336] @ (80009e0 ) 800088e: 78db ldrb r3, [r3, #3] 8000890: f887 30de strb.w r3, [r7, #222] @ 0xde m=rxbuf[4]-='0'; 8000894: 4b52 ldr r3, [pc, #328] @ (80009e0 ) 8000896: 791b ldrb r3, [r3, #4] 8000898: 3b30 subs r3, #48 @ 0x30 800089a: b2da uxtb r2, r3 800089c: 4b50 ldr r3, [pc, #320] @ (80009e0 ) 800089e: 711a strb r2, [r3, #4] 80008a0: 4b4f ldr r3, [pc, #316] @ (80009e0 ) 80008a2: 791b ldrb r3, [r3, #4] 80008a4: f887 30dd strb.w r3, [r7, #221] @ 0xdd c=rxbuf[5]-='0'; 80008a8: 4b4d ldr r3, [pc, #308] @ (80009e0 ) 80008aa: 795b ldrb r3, [r3, #5] 80008ac: 3b30 subs r3, #48 @ 0x30 80008ae: b2da uxtb r2, r3 80008b0: 4b4b ldr r3, [pc, #300] @ (80009e0 ) 80008b2: 715a strb r2, [r3, #5] 80008b4: 4b4a ldr r3, [pc, #296] @ (80009e0 ) 80008b6: 795b ldrb r3, [r3, #5] 80008b8: f887 30dc strb.w r3, [r7, #220] @ 0xdc d=rxbuf[6]-='0'; 80008bc: 4b48 ldr r3, [pc, #288] @ (80009e0 ) 80008be: 799b ldrb r3, [r3, #6] 80008c0: 3b30 subs r3, #48 @ 0x30 80008c2: b2da uxtb r2, r3 80008c4: 4b46 ldr r3, [pc, #280] @ (80009e0 ) 80008c6: 719a strb r2, [r3, #6] 80008c8: 4b45 ldr r3, [pc, #276] @ (80009e0 ) 80008ca: 799b ldrb r3, [r3, #6] 80008cc: f887 30db strb.w r3, [r7, #219] @ 0xdb u=rxbuf[7]-='0'; 80008d0: 4b43 ldr r3, [pc, #268] @ (80009e0 ) 80008d2: 79db ldrb r3, [r3, #7] 80008d4: 3b30 subs r3, #48 @ 0x30 80008d6: b2da uxtb r2, r3 80008d8: 4b41 ldr r3, [pc, #260] @ (80009e0 ) 80008da: 71da strb r2, [r3, #7] 80008dc: 4b40 ldr r3, [pc, #256] @ (80009e0 ) 80008de: 79db ldrb r3, [r3, #7] 80008e0: f887 30da strb.w r3, [r7, #218] @ 0xda val=dm; 80008e4: f897 30de ldrb.w r3, [r7, #222] @ 0xde 80008e8: b29b uxth r3, r3 80008ea: 81fb strh r3, [r7, #14] val*=10; 80008ec: 89fb ldrh r3, [r7, #14] 80008ee: 461a mov r2, r3 80008f0: 0092 lsls r2, r2, #2 80008f2: 4413 add r3, r2 80008f4: 005b lsls r3, r3, #1 80008f6: b29b uxth r3, r3 80008f8: 81fb strh r3, [r7, #14] val+=m; 80008fa: f897 30dd ldrb.w r3, [r7, #221] @ 0xdd 80008fe: b29a uxth r2, r3 8000900: 89fb ldrh r3, [r7, #14] 8000902: 4413 add r3, r2 8000904: b29b uxth r3, r3 8000906: 81fb strh r3, [r7, #14] val*=10; 8000908: 89fb ldrh r3, [r7, #14] 800090a: 461a mov r2, r3 800090c: 0092 lsls r2, r2, #2 800090e: 4413 add r3, r2 8000910: 005b lsls r3, r3, #1 8000912: b29b uxth r3, r3 8000914: 81fb strh r3, [r7, #14] val+=c; 8000916: f897 30dc ldrb.w r3, [r7, #220] @ 0xdc 800091a: b29a uxth r2, r3 800091c: 89fb ldrh r3, [r7, #14] 800091e: 4413 add r3, r2 8000920: b29b uxth r3, r3 8000922: 81fb strh r3, [r7, #14] val*=10; 8000924: 89fb ldrh r3, [r7, #14] 8000926: 461a mov r2, r3 8000928: 0092 lsls r2, r2, #2 800092a: 4413 add r3, r2 800092c: 005b lsls r3, r3, #1 800092e: b29b uxth r3, r3 8000930: 81fb strh r3, [r7, #14] val+=d; 8000932: f897 30db ldrb.w r3, [r7, #219] @ 0xdb 8000936: b29a uxth r2, r3 8000938: 89fb ldrh r3, [r7, #14] 800093a: 4413 add r3, r2 800093c: b29b uxth r3, r3 800093e: 81fb strh r3, [r7, #14] val*=10; 8000940: 89fb ldrh r3, [r7, #14] 8000942: 461a mov r2, r3 8000944: 0092 lsls r2, r2, #2 8000946: 4413 add r3, r2 8000948: 005b lsls r3, r3, #1 800094a: b29b uxth r3, r3 800094c: 81fb strh r3, [r7, #14] val+=u; 800094e: f897 30da ldrb.w r3, [r7, #218] @ 0xda 8000952: b29a uxth r2, r3 8000954: 89fb ldrh r3, [r7, #14] 8000956: 4413 add r3, r2 8000958: b29b uxth r3, r3 800095a: 81fb strh r3, [r7, #14] SetMot(mot,dir,val); 800095c: 89fa ldrh r2, [r7, #14] 800095e: f897 10e7 ldrb.w r1, [r7, #231] @ 0xe7 8000962: f897 30df ldrb.w r3, [r7, #223] @ 0xdf 8000966: 4618 mov r0, r3 8000968: f003 fdc4 bl 80044f4 if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 800096c: e032 b.n 80009d4 }else{ sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore 800096e: f107 0310 add.w r3, r7, #16 8000972: 491d ldr r1, [pc, #116] @ (80009e8 ) 8000974: 4618 mov r0, r3 8000976: f00d fd4d bl 800e414 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 800097a: bf00 nop 800097c: f107 0310 add.w r3, r7, #16 8000980: 2113 movs r1, #19 8000982: 4618 mov r0, r3 8000984: f00d f968 bl 800dc58 8000988: 4603 mov r3, r0 800098a: 2b01 cmp r3, #1 800098c: d0f6 beq.n 800097c if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 800098e: e021 b.n 80009d4 } }else{ sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore 8000990: f107 0310 add.w r3, r7, #16 8000994: 4915 ldr r1, [pc, #84] @ (80009ec ) 8000996: 4618 mov r0, r3 8000998: f00d fd3c bl 800e414 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 800099c: bf00 nop 800099e: f107 0310 add.w r3, r7, #16 80009a2: 2113 movs r1, #19 80009a4: 4618 mov r0, r3 80009a6: f00d f957 bl 800dc58 80009aa: 4603 mov r3, r0 80009ac: 2b01 cmp r3, #1 80009ae: d0f6 beq.n 800099e } }else{ sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore while (CDC_Transmit_FS(s, 10) == USBD_BUSY); } break; 80009b0: e3ea b.n 8001188 sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore 80009b2: f107 0310 add.w r3, r7, #16 80009b6: 490e ldr r1, [pc, #56] @ (80009f0 ) 80009b8: 4618 mov r0, r3 80009ba: f00d fd2b bl 800e414 while (CDC_Transmit_FS(s, 10) == USBD_BUSY); 80009be: bf00 nop 80009c0: f107 0310 add.w r3, r7, #16 80009c4: 210a movs r1, #10 80009c6: 4618 mov r0, r3 80009c8: f00d f946 bl 800dc58 80009cc: 4603 mov r3, r0 80009ce: 2b01 cmp r3, #1 80009d0: d0f6 beq.n 80009c0 break; 80009d2: e3d9 b.n 8001188 80009d4: e3d8 b.n 8001188 80009d6: bf00 nop 80009d8: 0800ee44 .word 0x0800ee44 80009dc: 20000234 .word 0x20000234 80009e0: 20000238 .word 0x20000238 80009e4: 0800ee4c .word 0x0800ee4c 80009e8: 0800ee60 .word 0x0800ee60 80009ec: 0800ee80 .word 0x0800ee80 80009f0: 0800ee94 .word 0x0800ee94 case 'e': if(rxidx>1){ 80009f4: 4bbb ldr r3, [pc, #748] @ (8000ce4 ) 80009f6: 781b ldrb r3, [r3, #0] 80009f8: 2b01 cmp r3, #1 80009fa: f240 839b bls.w 8001134 if(rxbuf[1]=='r'){ 80009fe: 4bba ldr r3, [pc, #744] @ (8000ce8 ) 8000a00: 785b ldrb r3, [r3, #1] 8000a02: 2b72 cmp r3, #114 @ 0x72 8000a04: f040 8086 bne.w 8000b14 if(rxidx==4){ 8000a08: 4bb6 ldr r3, [pc, #728] @ (8000ce4 ) 8000a0a: 781b ldrb r3, [r3, #0] 8000a0c: 2b04 cmp r3, #4 8000a0e: d169 bne.n 8000ae4 if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 8000a10: 4bb5 ldr r3, [pc, #724] @ (8000ce8 ) 8000a12: 789a ldrb r2, [r3, #2] 8000a14: 4bb4 ldr r3, [pc, #720] @ (8000ce8 ) 8000a16: 78d9 ldrb r1, [r3, #3] 8000a18: f107 030c add.w r3, r7, #12 8000a1c: 9300 str r3, [sp, #0] 8000a1e: 460b mov r3, r1 8000a20: 2130 movs r1, #48 @ 0x30 8000a22: 2030 movs r0, #48 @ 0x30 8000a24: f7ff fc4f bl 80002c6 8000a28: 4603 mov r3, r0 8000a2a: 2b00 cmp r3, #0 8000a2c: d042 beq.n 8000ab4 st=EEW_Read(eeadd, &val); 8000a2e: 89bb ldrh r3, [r7, #12] 8000a30: b2db uxtb r3, r3 8000a32: f107 020e add.w r2, r7, #14 8000a36: 4611 mov r1, r2 8000a38: 4618 mov r0, r3 8000a3a: f7ff fc1b bl 8000274 8000a3e: 4603 mov r3, r0 8000a40: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8 if (st == EE_OK){ 8000a44: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8 8000a48: 2b00 cmp r3, #0 8000a4a: d119 bne.n 8000a80 sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val); 8000a4c: 89bb ldrh r3, [r7, #12] 8000a4e: 461a mov r2, r3 8000a50: 89fb ldrh r3, [r7, #14] 8000a52: f107 0010 add.w r0, r7, #16 8000a56: 49a5 ldr r1, [pc, #660] @ (8000cec ) 8000a58: f00d fcdc bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000a5c: bf00 nop 8000a5e: f107 0310 add.w r3, r7, #16 8000a62: 4618 mov r0, r3 8000a64: f7ff fb72 bl 800014c 8000a68: 4603 mov r3, r0 8000a6a: b29a uxth r2, r3 8000a6c: f107 0310 add.w r3, r7, #16 8000a70: 4611 mov r1, r2 8000a72: 4618 mov r0, r3 8000a74: f00d f8f0 bl 800dc58 8000a78: 4603 mov r3, r0 8000a7a: 2b01 cmp r3, #1 8000a7c: d0ef beq.n 8000a5e } }else{ sprintf((char*)s,"\n?eraa | ewaavvvv"); while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); } break; 8000a7e: e382 b.n 8001186 sprintf((char*)s,"\nee read error %d",st); 8000a80: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8 8000a84: f107 0310 add.w r3, r7, #16 8000a88: 4999 ldr r1, [pc, #612] @ (8000cf0 ) 8000a8a: 4618 mov r0, r3 8000a8c: f00d fcc2 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000a90: bf00 nop 8000a92: f107 0310 add.w r3, r7, #16 8000a96: 4618 mov r0, r3 8000a98: f7ff fb58 bl 800014c 8000a9c: 4603 mov r3, r0 8000a9e: b29a uxth r2, r3 8000aa0: f107 0310 add.w r3, r7, #16 8000aa4: 4611 mov r1, r2 8000aa6: 4618 mov r0, r3 8000aa8: f00d f8d6 bl 800dc58 8000aac: 4603 mov r3, r0 8000aae: 2b01 cmp r3, #1 8000ab0: d0ef beq.n 8000a92 break; 8000ab2: e368 b.n 8001186 sprintf((char*)s,"\n?eraa hex values"); 8000ab4: f107 0310 add.w r3, r7, #16 8000ab8: 498e ldr r1, [pc, #568] @ (8000cf4 ) 8000aba: 4618 mov r0, r3 8000abc: f00d fcaa bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000ac0: bf00 nop 8000ac2: f107 0310 add.w r3, r7, #16 8000ac6: 4618 mov r0, r3 8000ac8: f7ff fb40 bl 800014c 8000acc: 4603 mov r3, r0 8000ace: b29a uxth r2, r3 8000ad0: f107 0310 add.w r3, r7, #16 8000ad4: 4611 mov r1, r2 8000ad6: 4618 mov r0, r3 8000ad8: f00d f8be bl 800dc58 8000adc: 4603 mov r3, r0 8000ade: 2b01 cmp r3, #1 8000ae0: d0ef beq.n 8000ac2 break; 8000ae2: e350 b.n 8001186 sprintf((char*)s,"\n?eraa"); 8000ae4: f107 0310 add.w r3, r7, #16 8000ae8: 4983 ldr r1, [pc, #524] @ (8000cf8 ) 8000aea: 4618 mov r0, r3 8000aec: f00d fc92 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000af0: bf00 nop 8000af2: f107 0310 add.w r3, r7, #16 8000af6: 4618 mov r0, r3 8000af8: f7ff fb28 bl 800014c 8000afc: 4603 mov r3, r0 8000afe: b29a uxth r2, r3 8000b00: f107 0310 add.w r3, r7, #16 8000b04: 4611 mov r1, r2 8000b06: 4618 mov r0, r3 8000b08: f00d f8a6 bl 800dc58 8000b0c: 4603 mov r3, r0 8000b0e: 2b01 cmp r3, #1 8000b10: d0ef beq.n 8000af2 break; 8000b12: e338 b.n 8001186 }else if(rxbuf[1]=='w'){ 8000b14: 4b74 ldr r3, [pc, #464] @ (8000ce8 ) 8000b16: 785b ldrb r3, [r3, #1] 8000b18: 2b77 cmp r3, #119 @ 0x77 8000b1a: d169 bne.n 8000bf0 if(rxidx==8){ 8000b1c: 4b71 ldr r3, [pc, #452] @ (8000ce4 ) 8000b1e: 781b ldrb r3, [r3, #0] 8000b20: 2b08 cmp r3, #8 8000b22: d14d bne.n 8000bc0 if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 8000b24: 4b70 ldr r3, [pc, #448] @ (8000ce8 ) 8000b26: 789a ldrb r2, [r3, #2] 8000b28: 4b6f ldr r3, [pc, #444] @ (8000ce8 ) 8000b2a: 78d9 ldrb r1, [r3, #3] 8000b2c: f107 030c add.w r3, r7, #12 8000b30: 9300 str r3, [sp, #0] 8000b32: 460b mov r3, r1 8000b34: 2130 movs r1, #48 @ 0x30 8000b36: 2030 movs r0, #48 @ 0x30 8000b38: f7ff fbc5 bl 80002c6 8000b3c: 4603 mov r3, r0 8000b3e: 2b00 cmp r3, #0 8000b40: d037 beq.n 8000bb2 if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){ 8000b42: 4b69 ldr r3, [pc, #420] @ (8000ce8 ) 8000b44: 7918 ldrb r0, [r3, #4] 8000b46: 4b68 ldr r3, [pc, #416] @ (8000ce8 ) 8000b48: 7959 ldrb r1, [r3, #5] 8000b4a: 4b67 ldr r3, [pc, #412] @ (8000ce8 ) 8000b4c: 799a ldrb r2, [r3, #6] 8000b4e: 4b66 ldr r3, [pc, #408] @ (8000ce8 ) 8000b50: 79dc ldrb r4, [r3, #7] 8000b52: f107 030e add.w r3, r7, #14 8000b56: 9300 str r3, [sp, #0] 8000b58: 4623 mov r3, r4 8000b5a: f7ff fbb4 bl 80002c6 8000b5e: 4603 mov r3, r0 8000b60: 2b00 cmp r3, #0 8000b62: d01f beq.n 8000ba4 st=EEW_Write(eeadd, val); 8000b64: 89bb ldrh r3, [r7, #12] 8000b66: b2db uxtb r3, r3 8000b68: 89fa ldrh r2, [r7, #14] 8000b6a: 4611 mov r1, r2 8000b6c: 4618 mov r0, r3 8000b6e: f7ff fb94 bl 800029a 8000b72: 4603 mov r3, r0 8000b74: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8 if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val); 8000b78: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8 8000b7c: 2b00 cmp r3, #0 8000b7e: d108 bne.n 8000b92 8000b80: 89bb ldrh r3, [r7, #12] 8000b82: 461a mov r2, r3 8000b84: 89fb ldrh r3, [r7, #14] 8000b86: f107 0010 add.w r0, r7, #16 8000b8a: 495c ldr r1, [pc, #368] @ (8000cfc ) 8000b8c: f00d fc42 bl 800e414 8000b90: e01c b.n 8000bcc else sprintf((char*)s,"\nee write error %d", st); 8000b92: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8 8000b96: f107 0310 add.w r3, r7, #16 8000b9a: 4959 ldr r1, [pc, #356] @ (8000d00 ) 8000b9c: 4618 mov r0, r3 8000b9e: f00d fc39 bl 800e414 8000ba2: e013 b.n 8000bcc }else sprintf((char*)s,"\n?ewaavvvv hex values"); 8000ba4: f107 0310 add.w r3, r7, #16 8000ba8: 4956 ldr r1, [pc, #344] @ (8000d04 ) 8000baa: 4618 mov r0, r3 8000bac: f00d fc32 bl 800e414 8000bb0: e00c b.n 8000bcc }else sprintf((char*)s,"\n?ewaa hex values"); 8000bb2: f107 0310 add.w r3, r7, #16 8000bb6: 4954 ldr r1, [pc, #336] @ (8000d08 ) 8000bb8: 4618 mov r0, r3 8000bba: f00d fc2b bl 800e414 8000bbe: e005 b.n 8000bcc }else sprintf((char*)s,"\n?ewaavvvv"); 8000bc0: f107 0310 add.w r3, r7, #16 8000bc4: 4951 ldr r1, [pc, #324] @ (8000d0c ) 8000bc6: 4618 mov r0, r3 8000bc8: f00d fc24 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000bcc: bf00 nop 8000bce: f107 0310 add.w r3, r7, #16 8000bd2: 4618 mov r0, r3 8000bd4: f7ff faba bl 800014c 8000bd8: 4603 mov r3, r0 8000bda: b29a uxth r2, r3 8000bdc: f107 0310 add.w r3, r7, #16 8000be0: 4611 mov r1, r2 8000be2: 4618 mov r0, r3 8000be4: f00d f838 bl 800dc58 8000be8: 4603 mov r3, r0 8000bea: 2b01 cmp r3, #1 8000bec: d0ef beq.n 8000bce break; 8000bee: e2ca b.n 8001186 }else if(rxbuf[1]=='d'){ 8000bf0: 4b3d ldr r3, [pc, #244] @ (8000ce8 ) 8000bf2: 785b ldrb r3, [r3, #1] 8000bf4: 2b64 cmp r3, #100 @ 0x64 8000bf6: f040 80a9 bne.w 8000d4c if(rxidx==2){ 8000bfa: 4b3a ldr r3, [pc, #232] @ (8000ce4 ) 8000bfc: 781b ldrb r3, [r3, #0] 8000bfe: 2b02 cmp r3, #2 8000c00: f040 808c bne.w 8000d1c for(i=0;i<32;i++){ 8000c04: 2300 movs r3, #0 8000c06: f887 30e6 strb.w r3, [r7, #230] @ 0xe6 8000c0a: e046 b.n 8000c9a st=EEW_Read(i, &val); 8000c0c: f107 020e add.w r2, r7, #14 8000c10: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6 8000c14: 4611 mov r1, r2 8000c16: 4618 mov r0, r3 8000c18: f7ff fb2c bl 8000274 8000c1c: 4603 mov r3, r0 8000c1e: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8 if (st == EE_OK){ 8000c22: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8 8000c26: 2b00 cmp r3, #0 8000c28: d119 bne.n 8000c5e sprintf((char*)s,"\n0x%02x=%5d ",i,val); 8000c2a: f897 20e6 ldrb.w r2, [r7, #230] @ 0xe6 8000c2e: 89fb ldrh r3, [r7, #14] 8000c30: f107 0010 add.w r0, r7, #16 8000c34: 4936 ldr r1, [pc, #216] @ (8000d10 ) 8000c36: f00d fbed bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000c3a: bf00 nop 8000c3c: f107 0310 add.w r3, r7, #16 8000c40: 4618 mov r0, r3 8000c42: f7ff fa83 bl 800014c 8000c46: 4603 mov r3, r0 8000c48: b29a uxth r2, r3 8000c4a: f107 0310 add.w r3, r7, #16 8000c4e: 4611 mov r1, r2 8000c50: 4618 mov r0, r3 8000c52: f00d f801 bl 800dc58 8000c56: 4603 mov r3, r0 8000c58: 2b01 cmp r3, #1 8000c5a: d0ef beq.n 8000c3c 8000c5c: e018 b.n 8000c90 sprintf((char*)s,"rderr %d ",st); 8000c5e: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8 8000c62: f107 0310 add.w r3, r7, #16 8000c66: 492b ldr r1, [pc, #172] @ (8000d14 ) 8000c68: 4618 mov r0, r3 8000c6a: f00d fbd3 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000c6e: bf00 nop 8000c70: f107 0310 add.w r3, r7, #16 8000c74: 4618 mov r0, r3 8000c76: f7ff fa69 bl 800014c 8000c7a: 4603 mov r3, r0 8000c7c: b29a uxth r2, r3 8000c7e: f107 0310 add.w r3, r7, #16 8000c82: 4611 mov r1, r2 8000c84: 4618 mov r0, r3 8000c86: f00c ffe7 bl 800dc58 8000c8a: 4603 mov r3, r0 8000c8c: 2b01 cmp r3, #1 8000c8e: d0ef beq.n 8000c70 for(i=0;i<32;i++){ 8000c90: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6 8000c94: 3301 adds r3, #1 8000c96: f887 30e6 strb.w r3, [r7, #230] @ 0xe6 8000c9a: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6 8000c9e: 2b1f cmp r3, #31 8000ca0: d9b4 bls.n 8000c0c if((i%4)==0){ 8000ca2: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6 8000ca6: f003 0303 and.w r3, r3, #3 8000caa: b2db uxtb r3, r3 8000cac: 2b00 cmp r3, #0 8000cae: f040 826a bne.w 8001186 sprintf((char*)s,"\n"); 8000cb2: f107 0310 add.w r3, r7, #16 8000cb6: 4918 ldr r1, [pc, #96] @ (8000d18 ) 8000cb8: 4618 mov r0, r3 8000cba: f00d fbab bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000cbe: bf00 nop 8000cc0: f107 0310 add.w r3, r7, #16 8000cc4: 4618 mov r0, r3 8000cc6: f7ff fa41 bl 800014c 8000cca: 4603 mov r3, r0 8000ccc: b29a uxth r2, r3 8000cce: f107 0310 add.w r3, r7, #16 8000cd2: 4611 mov r1, r2 8000cd4: 4618 mov r0, r3 8000cd6: f00c ffbf bl 800dc58 8000cda: 4603 mov r3, r0 8000cdc: 2b01 cmp r3, #1 8000cde: d0ef beq.n 8000cc0 break; 8000ce0: e251 b.n 8001186 8000ce2: bf00 nop 8000ce4: 20000234 .word 0x20000234 8000ce8: 20000238 .word 0x20000238 8000cec: 0800eea0 .word 0x0800eea0 8000cf0: 0800eeb4 .word 0x0800eeb4 8000cf4: 0800eec8 .word 0x0800eec8 8000cf8: 0800eedc .word 0x0800eedc 8000cfc: 0800eee4 .word 0x0800eee4 8000d00: 0800eef8 .word 0x0800eef8 8000d04: 0800ef0c .word 0x0800ef0c 8000d08: 0800ef24 .word 0x0800ef24 8000d0c: 0800ef38 .word 0x0800ef38 8000d10: 0800ef44 .word 0x0800ef44 8000d14: 0800ef54 .word 0x0800ef54 8000d18: 0800ef60 .word 0x0800ef60 sprintf((char*)s,"\n?ed"); 8000d1c: f107 0310 add.w r3, r7, #16 8000d20: 491d ldr r1, [pc, #116] @ (8000d98 ) 8000d22: 4618 mov r0, r3 8000d24: f00d fb76 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000d28: bf00 nop 8000d2a: f107 0310 add.w r3, r7, #16 8000d2e: 4618 mov r0, r3 8000d30: f7ff fa0c bl 800014c 8000d34: 4603 mov r3, r0 8000d36: b29a uxth r2, r3 8000d38: f107 0310 add.w r3, r7, #16 8000d3c: 4611 mov r1, r2 8000d3e: 4618 mov r0, r3 8000d40: f00c ff8a bl 800dc58 8000d44: 4603 mov r3, r0 8000d46: 2b01 cmp r3, #1 8000d48: d0ef beq.n 8000d2a break; 8000d4a: e21c b.n 8001186 }else if(rxbuf[1]=='x'){ 8000d4c: 4b13 ldr r3, [pc, #76] @ (8000d9c ) 8000d4e: 785b ldrb r3, [r3, #1] 8000d50: 2b78 cmp r3, #120 @ 0x78 8000d52: d129 bne.n 8000da8 if(rxidx==2){ 8000d54: 4b12 ldr r3, [pc, #72] @ (8000da0 ) 8000d56: 781b ldrb r3, [r3, #0] 8000d58: 2b02 cmp r3, #2 8000d5a: d104 bne.n 8000d66 loadDefault(); 8000d5c: f000 fcc0 bl 80016e0 loadEE(); 8000d60: f000 fd0c bl 800177c break; 8000d64: e20f b.n 8001186 sprintf((char*)s,"\n?ex"); 8000d66: f107 0310 add.w r3, r7, #16 8000d6a: 490e ldr r1, [pc, #56] @ (8000da4 ) 8000d6c: 4618 mov r0, r3 8000d6e: f00d fb51 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000d72: bf00 nop 8000d74: f107 0310 add.w r3, r7, #16 8000d78: 4618 mov r0, r3 8000d7a: f7ff f9e7 bl 800014c 8000d7e: 4603 mov r3, r0 8000d80: b29a uxth r2, r3 8000d82: f107 0310 add.w r3, r7, #16 8000d86: 4611 mov r1, r2 8000d88: 4618 mov r0, r3 8000d8a: f00c ff65 bl 800dc58 8000d8e: 4603 mov r3, r0 8000d90: 2b01 cmp r3, #1 8000d92: d0ef beq.n 8000d74 break; 8000d94: e1f7 b.n 8001186 8000d96: bf00 nop 8000d98: 0800ef64 .word 0x0800ef64 8000d9c: 20000238 .word 0x20000238 8000da0: 20000234 .word 0x20000234 8000da4: 0800ef6c .word 0x0800ef6c }else if(rxbuf[1]=='v'){ 8000da8: 4bb4 ldr r3, [pc, #720] @ (800107c ) 8000daa: 785b ldrb r3, [r3, #1] 8000dac: 2b76 cmp r3, #118 @ 0x76 8000dae: f040 814c bne.w 800104a if(rxidx==2){ 8000db2: 4bb3 ldr r3, [pc, #716] @ (8001080 ) 8000db4: 781b ldrb r3, [r3, #0] 8000db6: 2b02 cmp r3, #2 8000db8: f040 812f bne.w 800101a sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch); 8000dbc: 4bb1 ldr r3, [pc, #708] @ (8001084 ) 8000dbe: 881b ldrh r3, [r3, #0] 8000dc0: 469c mov ip, r3 8000dc2: 4bb1 ldr r3, [pc, #708] @ (8001088 ) 8000dc4: 881b ldrh r3, [r3, #0] 8000dc6: 469e mov lr, r3 8000dc8: 4bb0 ldr r3, [pc, #704] @ (800108c ) 8000dca: 881b ldrh r3, [r3, #0] 8000dcc: 461a mov r2, r3 8000dce: 4bb0 ldr r3, [pc, #704] @ (8001090 ) 8000dd0: 881b ldrh r3, [r3, #0] 8000dd2: 4619 mov r1, r3 8000dd4: 4baf ldr r3, [pc, #700] @ (8001094 ) 8000dd6: 881b ldrh r3, [r3, #0] 8000dd8: 461c mov r4, r3 8000dda: 4baf ldr r3, [pc, #700] @ (8001098 ) 8000ddc: 881b ldrh r3, [r3, #0] 8000dde: 461d mov r5, r3 8000de0: 4bae ldr r3, [pc, #696] @ (800109c ) 8000de2: 881b ldrh r3, [r3, #0] 8000de4: 461e mov r6, r3 8000de6: 4bae ldr r3, [pc, #696] @ (80010a0 ) 8000de8: 881b ldrh r3, [r3, #0] 8000dea: f107 0010 add.w r0, r7, #16 8000dee: 9305 str r3, [sp, #20] 8000df0: 9604 str r6, [sp, #16] 8000df2: 9503 str r5, [sp, #12] 8000df4: 9402 str r4, [sp, #8] 8000df6: 9101 str r1, [sp, #4] 8000df8: 9200 str r2, [sp, #0] 8000dfa: 4673 mov r3, lr 8000dfc: 4662 mov r2, ip 8000dfe: 49a9 ldr r1, [pc, #676] @ (80010a4 ) 8000e00: f00d fb08 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000e04: bf00 nop 8000e06: f107 0310 add.w r3, r7, #16 8000e0a: 4618 mov r0, r3 8000e0c: f7ff f99e bl 800014c 8000e10: 4603 mov r3, r0 8000e12: b29a uxth r2, r3 8000e14: f107 0310 add.w r3, r7, #16 8000e18: 4611 mov r1, r2 8000e1a: 4618 mov r0, r3 8000e1c: f00c ff1c bl 800dc58 8000e20: 4603 mov r3, r0 8000e22: 2b01 cmp r3, #1 8000e24: d0ef beq.n 8000e06 sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan); 8000e26: 4ba0 ldr r3, [pc, #640] @ (80010a8 ) 8000e28: 881b ldrh r3, [r3, #0] 8000e2a: 4619 mov r1, r3 8000e2c: 4b9f ldr r3, [pc, #636] @ (80010ac ) 8000e2e: 881b ldrh r3, [r3, #0] 8000e30: 461c mov r4, r3 8000e32: 4b9f ldr r3, [pc, #636] @ (80010b0 ) 8000e34: 881b ldrh r3, [r3, #0] 8000e36: 461a mov r2, r3 8000e38: 4b9e ldr r3, [pc, #632] @ (80010b4 ) 8000e3a: 881b ldrh r3, [r3, #0] 8000e3c: f107 0010 add.w r0, r7, #16 8000e40: 9301 str r3, [sp, #4] 8000e42: 9200 str r2, [sp, #0] 8000e44: 4623 mov r3, r4 8000e46: 460a mov r2, r1 8000e48: 499b ldr r1, [pc, #620] @ (80010b8 ) 8000e4a: f00d fae3 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000e4e: bf00 nop 8000e50: f107 0310 add.w r3, r7, #16 8000e54: 4618 mov r0, r3 8000e56: f7ff f979 bl 800014c 8000e5a: 4603 mov r3, r0 8000e5c: b29a uxth r2, r3 8000e5e: f107 0310 add.w r3, r7, #16 8000e62: 4611 mov r1, r2 8000e64: 4618 mov r0, r3 8000e66: f00c fef7 bl 800dc58 8000e6a: 4603 mov r3, r0 8000e6c: 2b01 cmp r3, #1 8000e6e: d0ef beq.n 8000e50 sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman); 8000e70: 4b92 ldr r3, [pc, #584] @ (80010bc ) 8000e72: 881b ldrh r3, [r3, #0] 8000e74: 461a mov r2, r3 8000e76: 4b92 ldr r3, [pc, #584] @ (80010c0 ) 8000e78: 881b ldrh r3, [r3, #0] 8000e7a: f107 0010 add.w r0, r7, #16 8000e7e: 4991 ldr r1, [pc, #580] @ (80010c4 ) 8000e80: f00d fac8 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000e84: bf00 nop 8000e86: f107 0310 add.w r3, r7, #16 8000e8a: 4618 mov r0, r3 8000e8c: f7ff f95e bl 800014c 8000e90: 4603 mov r3, r0 8000e92: b29a uxth r2, r3 8000e94: f107 0310 add.w r3, r7, #16 8000e98: 4611 mov r1, r2 8000e9a: 4618 mov r0, r3 8000e9c: f00c fedc bl 800dc58 8000ea0: 4603 mov r3, r0 8000ea2: 2b01 cmp r3, #1 8000ea4: d0ef beq.n 8000e86 sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan); 8000ea6: 4b88 ldr r3, [pc, #544] @ (80010c8 ) 8000ea8: 881b ldrh r3, [r3, #0] 8000eaa: 4619 mov r1, r3 8000eac: 4b87 ldr r3, [pc, #540] @ (80010cc ) 8000eae: 881b ldrh r3, [r3, #0] 8000eb0: 461c mov r4, r3 8000eb2: 4b87 ldr r3, [pc, #540] @ (80010d0 ) 8000eb4: 881b ldrh r3, [r3, #0] 8000eb6: 461a mov r2, r3 8000eb8: 4b86 ldr r3, [pc, #536] @ (80010d4 ) 8000eba: 881b ldrh r3, [r3, #0] 8000ebc: f107 0010 add.w r0, r7, #16 8000ec0: 9301 str r3, [sp, #4] 8000ec2: 9200 str r2, [sp, #0] 8000ec4: 4623 mov r3, r4 8000ec6: 460a mov r2, r1 8000ec8: 4983 ldr r1, [pc, #524] @ (80010d8 ) 8000eca: f00d faa3 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000ece: bf00 nop 8000ed0: f107 0310 add.w r3, r7, #16 8000ed4: 4618 mov r0, r3 8000ed6: f7ff f939 bl 800014c 8000eda: 4603 mov r3, r0 8000edc: b29a uxth r2, r3 8000ede: f107 0310 add.w r3, r7, #16 8000ee2: 4611 mov r1, r2 8000ee4: 4618 mov r0, r3 8000ee6: f00c feb7 bl 800dc58 8000eea: 4603 mov r3, r0 8000eec: 2b01 cmp r3, #1 8000eee: d0ef beq.n 8000ed0 sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop); 8000ef0: 4b7a ldr r3, [pc, #488] @ (80010dc ) 8000ef2: 881b ldrh r3, [r3, #0] 8000ef4: 4619 mov r1, r3 8000ef6: 4b7a ldr r3, [pc, #488] @ (80010e0 ) 8000ef8: 881b ldrh r3, [r3, #0] 8000efa: 461c mov r4, r3 8000efc: 4b79 ldr r3, [pc, #484] @ (80010e4 ) 8000efe: 881b ldrh r3, [r3, #0] 8000f00: 461a mov r2, r3 8000f02: 4b79 ldr r3, [pc, #484] @ (80010e8 ) 8000f04: 881b ldrh r3, [r3, #0] 8000f06: f107 0010 add.w r0, r7, #16 8000f0a: 9301 str r3, [sp, #4] 8000f0c: 9200 str r2, [sp, #0] 8000f0e: 4623 mov r3, r4 8000f10: 460a mov r2, r1 8000f12: 4976 ldr r1, [pc, #472] @ (80010ec ) 8000f14: f00d fa7e bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000f18: bf00 nop 8000f1a: f107 0310 add.w r3, r7, #16 8000f1e: 4618 mov r0, r3 8000f20: f7ff f914 bl 800014c 8000f24: 4603 mov r3, r0 8000f26: b29a uxth r2, r3 8000f28: f107 0310 add.w r3, r7, #16 8000f2c: 4611 mov r1, r2 8000f2e: 4618 mov r0, r3 8000f30: f00c fe92 bl 800dc58 8000f34: 4603 mov r3, r0 8000f36: 2b01 cmp r3, #1 8000f38: d0ef beq.n 8000f1a sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop); 8000f3a: 4b6d ldr r3, [pc, #436] @ (80010f0 ) 8000f3c: 881b ldrh r3, [r3, #0] 8000f3e: 4619 mov r1, r3 8000f40: 4b6c ldr r3, [pc, #432] @ (80010f4 ) 8000f42: 881b ldrh r3, [r3, #0] 8000f44: 461c mov r4, r3 8000f46: 4b6c ldr r3, [pc, #432] @ (80010f8 ) 8000f48: 881b ldrh r3, [r3, #0] 8000f4a: 461a mov r2, r3 8000f4c: 4b6b ldr r3, [pc, #428] @ (80010fc ) 8000f4e: 881b ldrh r3, [r3, #0] 8000f50: f107 0010 add.w r0, r7, #16 8000f54: 9301 str r3, [sp, #4] 8000f56: 9200 str r2, [sp, #0] 8000f58: 4623 mov r3, r4 8000f5a: 460a mov r2, r1 8000f5c: 4968 ldr r1, [pc, #416] @ (8001100 ) 8000f5e: f00d fa59 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000f62: bf00 nop 8000f64: f107 0310 add.w r3, r7, #16 8000f68: 4618 mov r0, r3 8000f6a: f7ff f8ef bl 800014c 8000f6e: 4603 mov r3, r0 8000f70: b29a uxth r2, r3 8000f72: f107 0310 add.w r3, r7, #16 8000f76: 4611 mov r1, r2 8000f78: 4618 mov r0, r3 8000f7a: f00c fe6d bl 800dc58 8000f7e: 4603 mov r3, r0 8000f80: 2b01 cmp r3, #1 8000f82: d0ef beq.n 8000f64 sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop); 8000f84: 4b5f ldr r3, [pc, #380] @ (8001104 ) 8000f86: 881b ldrh r3, [r3, #0] 8000f88: 4619 mov r1, r3 8000f8a: 4b5f ldr r3, [pc, #380] @ (8001108 ) 8000f8c: 881b ldrh r3, [r3, #0] 8000f8e: 461c mov r4, r3 8000f90: 4b5e ldr r3, [pc, #376] @ (800110c ) 8000f92: 881b ldrh r3, [r3, #0] 8000f94: 461a mov r2, r3 8000f96: 4b5e ldr r3, [pc, #376] @ (8001110 ) 8000f98: 881b ldrh r3, [r3, #0] 8000f9a: f107 0010 add.w r0, r7, #16 8000f9e: 9301 str r3, [sp, #4] 8000fa0: 9200 str r2, [sp, #0] 8000fa2: 4623 mov r3, r4 8000fa4: 460a mov r2, r1 8000fa6: 495b ldr r1, [pc, #364] @ (8001114 ) 8000fa8: f00d fa34 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000fac: bf00 nop 8000fae: f107 0310 add.w r3, r7, #16 8000fb2: 4618 mov r0, r3 8000fb4: f7ff f8ca bl 800014c 8000fb8: 4603 mov r3, r0 8000fba: b29a uxth r2, r3 8000fbc: f107 0310 add.w r3, r7, #16 8000fc0: 4611 mov r1, r2 8000fc2: 4618 mov r0, r3 8000fc4: f00c fe48 bl 800dc58 8000fc8: 4603 mov r3, r0 8000fca: 2b01 cmp r3, #1 8000fcc: d0ef beq.n 8000fae sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop); 8000fce: 4b52 ldr r3, [pc, #328] @ (8001118 ) 8000fd0: 881b ldrh r3, [r3, #0] 8000fd2: 4619 mov r1, r3 8000fd4: 4b51 ldr r3, [pc, #324] @ (800111c ) 8000fd6: 881b ldrh r3, [r3, #0] 8000fd8: 461c mov r4, r3 8000fda: 4b51 ldr r3, [pc, #324] @ (8001120 ) 8000fdc: 881b ldrh r3, [r3, #0] 8000fde: 461a mov r2, r3 8000fe0: 4b50 ldr r3, [pc, #320] @ (8001124 ) 8000fe2: 881b ldrh r3, [r3, #0] 8000fe4: f107 0010 add.w r0, r7, #16 8000fe8: 9301 str r3, [sp, #4] 8000fea: 9200 str r2, [sp, #0] 8000fec: 4623 mov r3, r4 8000fee: 460a mov r2, r1 8000ff0: 494d ldr r1, [pc, #308] @ (8001128 ) 8000ff2: f00d fa0f bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000ff6: bf00 nop 8000ff8: f107 0310 add.w r3, r7, #16 8000ffc: 4618 mov r0, r3 8000ffe: f7ff f8a5 bl 800014c 8001002: 4603 mov r3, r0 8001004: b29a uxth r2, r3 8001006: f107 0310 add.w r3, r7, #16 800100a: 4611 mov r1, r2 800100c: 4618 mov r0, r3 800100e: f00c fe23 bl 800dc58 8001012: 4603 mov r3, r0 8001014: 2b01 cmp r3, #1 8001016: d0ef beq.n 8000ff8 break; 8001018: e0b5 b.n 8001186 sprintf((char*)s,"\n?ev"); 800101a: f107 0310 add.w r3, r7, #16 800101e: 4943 ldr r1, [pc, #268] @ (800112c ) 8001020: 4618 mov r0, r3 8001022: f00d f9f7 bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8001026: bf00 nop 8001028: f107 0310 add.w r3, r7, #16 800102c: 4618 mov r0, r3 800102e: f7ff f88d bl 800014c 8001032: 4603 mov r3, r0 8001034: b29a uxth r2, r3 8001036: f107 0310 add.w r3, r7, #16 800103a: 4611 mov r1, r2 800103c: 4618 mov r0, r3 800103e: f00c fe0b bl 800dc58 8001042: 4603 mov r3, r0 8001044: 2b01 cmp r3, #1 8001046: d0ef beq.n 8001028 break; 8001048: e09d b.n 8001186 sprintf((char*)s,"\n?er|w|d|x|v"); 800104a: f107 0310 add.w r3, r7, #16 800104e: 4938 ldr r1, [pc, #224] @ (8001130 ) 8001050: 4618 mov r0, r3 8001052: f00d f9df bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8001056: bf00 nop 8001058: f107 0310 add.w r3, r7, #16 800105c: 4618 mov r0, r3 800105e: f7ff f875 bl 800014c 8001062: 4603 mov r3, r0 8001064: b29a uxth r2, r3 8001066: f107 0310 add.w r3, r7, #16 800106a: 4611 mov r1, r2 800106c: 4618 mov r0, r3 800106e: f00c fdf3 bl 800dc58 8001072: 4603 mov r3, r0 8001074: 2b01 cmp r3, #1 8001076: d0ef beq.n 8001058 break; 8001078: e085 b.n 8001186 800107a: bf00 nop 800107c: 20000238 .word 0x20000238 8001080: 20000234 .word 0x20000234 8001084: 20000400 .word 0x20000400 8001088: 20000402 .word 0x20000402 800108c: 20000404 .word 0x20000404 8001090: 20000406 .word 0x20000406 8001094: 20000408 .word 0x20000408 8001098: 2000040a .word 0x2000040a 800109c: 2000040c .word 0x2000040c 80010a0: 2000040e .word 0x2000040e 80010a4: 0800ef74 .word 0x0800ef74 80010a8: 20000410 .word 0x20000410 80010ac: 20000412 .word 0x20000412 80010b0: 20000414 .word 0x20000414 80010b4: 20000416 .word 0x20000416 80010b8: 0800efd0 .word 0x0800efd0 80010bc: 20000418 .word 0x20000418 80010c0: 2000041e .word 0x2000041e 80010c4: 0800f014 .word 0x0800f014 80010c8: 20000420 .word 0x20000420 80010cc: 20000422 .word 0x20000422 80010d0: 20000424 .word 0x20000424 80010d4: 20000426 .word 0x20000426 80010d8: 0800f02c .word 0x0800f02c 80010dc: 20000428 .word 0x20000428 80010e0: 2000042a .word 0x2000042a 80010e4: 20000438 .word 0x20000438 80010e8: 2000043a .word 0x2000043a 80010ec: 0800f060 .word 0x0800f060 80010f0: 2000042c .word 0x2000042c 80010f4: 2000042e .word 0x2000042e 80010f8: 2000043c .word 0x2000043c 80010fc: 2000043e .word 0x2000043e 8001100: 0800f094 .word 0x0800f094 8001104: 20000430 .word 0x20000430 8001108: 20000432 .word 0x20000432 800110c: 20000440 .word 0x20000440 8001110: 20000442 .word 0x20000442 8001114: 0800f0c8 .word 0x0800f0c8 8001118: 20000434 .word 0x20000434 800111c: 20000436 .word 0x20000436 8001120: 20000444 .word 0x20000444 8001124: 20000446 .word 0x20000446 8001128: 0800f0fc .word 0x0800f0fc 800112c: 0800f130 .word 0x0800f130 8001130: 0800f138 .word 0x0800f138 sprintf((char*)s,"\n?eraa | ewaavvvv"); 8001134: f107 0310 add.w r3, r7, #16 8001138: 491b ldr r1, [pc, #108] @ (80011a8 ) 800113a: 4618 mov r0, r3 800113c: f00d f96a bl 800e414 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8001140: bf00 nop 8001142: f107 0310 add.w r3, r7, #16 8001146: 4618 mov r0, r3 8001148: f7ff f800 bl 800014c 800114c: 4603 mov r3, r0 800114e: b29a uxth r2, r3 8001150: f107 0310 add.w r3, r7, #16 8001154: 4611 mov r1, r2 8001156: 4618 mov r0, r3 8001158: f00c fd7e bl 800dc58 800115c: 4603 mov r3, r0 800115e: 2b01 cmp r3, #1 8001160: d0ef beq.n 8001142 break; 8001162: e010 b.n 8001186 default: sprintf((char*)s,"\n?"); 8001164: f107 0310 add.w r3, r7, #16 8001168: 4910 ldr r1, [pc, #64] @ (80011ac ) 800116a: 4618 mov r0, r3 800116c: f00d f952 bl 800e414 while (CDC_Transmit_FS(s, 2) == USBD_BUSY); 8001170: bf00 nop 8001172: f107 0310 add.w r3, r7, #16 8001176: 2102 movs r1, #2 8001178: 4618 mov r0, r3 800117a: f00c fd6d bl 800dc58 800117e: 4603 mov r3, r0 8001180: 2b01 cmp r3, #1 8001182: d0f6 beq.n 8001172 break; 8001184: e000 b.n 8001188 break; 8001186: bf00 nop } } rxidx=0; 8001188: 4b09 ldr r3, [pc, #36] @ (80011b0 ) 800118a: 2200 movs r2, #0 800118c: 701a strb r2, [r3, #0] 800118e: e007 b.n 80011a0 }else rxidx++; 8001190: 4b07 ldr r3, [pc, #28] @ (80011b0 ) 8001192: 781b ldrb r3, [r3, #0] 8001194: 3301 adds r3, #1 8001196: b2da uxtb r2, r3 8001198: 4b05 ldr r3, [pc, #20] @ (80011b0 ) 800119a: 701a strb r2, [r3, #0] 800119c: e000 b.n 80011a0 if (rx < 0) return; 800119e: bf00 nop // tiny spin or yield } } 80011a0: 37ec adds r7, #236 @ 0xec 80011a2: 46bd mov sp, r7 80011a4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80011a8: 0800f148 .word 0x0800f148 80011ac: 0800f15c .word 0x0800f15c 80011b0: 20000234 .word 0x20000234 080011b4 : extern UART_HandleTypeDef huart1; extern uint8_t pulsanti; extern uint16_t stPulsanti; extern omCiclo_st stCiclo; void debug(void){ 80011b4: b580 push {r7, lr} 80011b6: b09a sub sp, #104 @ 0x68 80011b8: af00 add r7, sp, #0 static uint8_t mempulsanti=0; static uint16_t memstPulsanti=0; static omCiclo_st memstCiclo=omchiuso; char s [100]; if(mempulsanti!=pulsanti){ 80011ba: 4b2f ldr r3, [pc, #188] @ (8001278 ) 80011bc: 781a ldrb r2, [r3, #0] 80011be: 4b2f ldr r3, [pc, #188] @ (800127c ) 80011c0: 781b ldrb r3, [r3, #0] 80011c2: 429a cmp r2, r3 80011c4: d017 beq.n 80011f6 mempulsanti=pulsanti; 80011c6: 4b2d ldr r3, [pc, #180] @ (800127c ) 80011c8: 781a ldrb r2, [r3, #0] 80011ca: 4b2b ldr r3, [pc, #172] @ (8001278 ) 80011cc: 701a strb r2, [r3, #0] sprintf(s,"\npulsanti=%X",pulsanti); 80011ce: 4b2b ldr r3, [pc, #172] @ (800127c ) 80011d0: 781b ldrb r3, [r3, #0] 80011d2: 461a mov r2, r3 80011d4: 1d3b adds r3, r7, #4 80011d6: 492a ldr r1, [pc, #168] @ (8001280 ) 80011d8: 4618 mov r0, r3 80011da: f00d f91b bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 80011de: 1d3b adds r3, r7, #4 80011e0: 4618 mov r0, r3 80011e2: f7fe ffb3 bl 800014c 80011e6: 4603 mov r3, r0 80011e8: b29a uxth r2, r3 80011ea: 1d39 adds r1, r7, #4 80011ec: f04f 33ff mov.w r3, #4294967295 80011f0: 4824 ldr r0, [pc, #144] @ (8001284 ) 80011f2: f008 fb1f bl 8009834 } if(memstPulsanti!=stPulsanti){ 80011f6: 4b24 ldr r3, [pc, #144] @ (8001288 ) 80011f8: 881a ldrh r2, [r3, #0] 80011fa: 4b24 ldr r3, [pc, #144] @ (800128c ) 80011fc: 881b ldrh r3, [r3, #0] 80011fe: 429a cmp r2, r3 8001200: d017 beq.n 8001232 memstPulsanti=stPulsanti; 8001202: 4b22 ldr r3, [pc, #136] @ (800128c ) 8001204: 881a ldrh r2, [r3, #0] 8001206: 4b20 ldr r3, [pc, #128] @ (8001288 ) 8001208: 801a strh r2, [r3, #0] sprintf(s,"\nstpulsanti=%X",stPulsanti); 800120a: 4b20 ldr r3, [pc, #128] @ (800128c ) 800120c: 881b ldrh r3, [r3, #0] 800120e: 461a mov r2, r3 8001210: 1d3b adds r3, r7, #4 8001212: 491f ldr r1, [pc, #124] @ (8001290 ) 8001214: 4618 mov r0, r3 8001216: f00d f8fd bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 800121a: 1d3b adds r3, r7, #4 800121c: 4618 mov r0, r3 800121e: f7fe ff95 bl 800014c 8001222: 4603 mov r3, r0 8001224: b29a uxth r2, r3 8001226: 1d39 adds r1, r7, #4 8001228: f04f 33ff mov.w r3, #4294967295 800122c: 4815 ldr r0, [pc, #84] @ (8001284 ) 800122e: f008 fb01 bl 8009834 } if(memstCiclo!=stCiclo){ 8001232: 4b18 ldr r3, [pc, #96] @ (8001294 ) 8001234: 781a ldrb r2, [r3, #0] 8001236: 4b18 ldr r3, [pc, #96] @ (8001298 ) 8001238: 781b ldrb r3, [r3, #0] 800123a: 429a cmp r2, r3 800123c: d017 beq.n 800126e memstCiclo=stCiclo; 800123e: 4b16 ldr r3, [pc, #88] @ (8001298 ) 8001240: 781a ldrb r2, [r3, #0] 8001242: 4b14 ldr r3, [pc, #80] @ (8001294 ) 8001244: 701a strb r2, [r3, #0] sprintf(s,"\nstCiclo=%d",stCiclo); 8001246: 4b14 ldr r3, [pc, #80] @ (8001298 ) 8001248: 781b ldrb r3, [r3, #0] 800124a: 461a mov r2, r3 800124c: 1d3b adds r3, r7, #4 800124e: 4913 ldr r1, [pc, #76] @ (800129c ) 8001250: 4618 mov r0, r3 8001252: f00d f8df bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8001256: 1d3b adds r3, r7, #4 8001258: 4618 mov r0, r3 800125a: f7fe ff77 bl 800014c 800125e: 4603 mov r3, r0 8001260: b29a uxth r2, r3 8001262: 1d39 adds r1, r7, #4 8001264: f04f 33ff mov.w r3, #4294967295 8001268: 4806 ldr r0, [pc, #24] @ (8001284 ) 800126a: f008 fae3 bl 8009834 } } 800126e: bf00 nop 8001270: 3768 adds r7, #104 @ 0x68 8001272: 46bd mov sp, r7 8001274: bd80 pop {r7, pc} 8001276: bf00 nop 8001278: 2000029c .word 0x2000029c 800127c: 200003f0 .word 0x200003f0 8001280: 0800f160 .word 0x0800f160 8001284: 200003a8 .word 0x200003a8 8001288: 2000029e .word 0x2000029e 800128c: 20000454 .word 0x20000454 8001290: 0800f170 .word 0x0800f170 8001294: 200002a0 .word 0x200002a0 8001298: 20000456 .word 0x20000456 800129c: 0800f180 .word 0x0800f180 080012a0 : { 80012a0: b580 push {r7, lr} 80012a2: b082 sub sp, #8 80012a4: af00 add r7, sp, #0 80012a6: 4603 mov r3, r0 80012a8: 460a mov r2, r1 80012aa: 71fb strb r3, [r7, #7] 80012ac: 4613 mov r3, r2 80012ae: 80bb strh r3, [r7, #4] return EE_WriteVariable(EEW_ADDR(idx), value); 80012b0: 79fb ldrb r3, [r7, #7] 80012b2: b29b uxth r3, r3 80012b4: 3301 adds r3, #1 80012b6: b29b uxth r3, r3 80012b8: 88ba ldrh r2, [r7, #4] 80012ba: 4611 mov r1, r2 80012bc: 4618 mov r0, r3 80012be: f000 f9d5 bl 800166c 80012c2: 4603 mov r3, r0 } 80012c4: 4618 mov r0, r3 80012c6: 3708 adds r7, #8 80012c8: 46bd mov sp, r7 80012ca: bd80 pop {r7, pc} 080012cc : /* ========================================================================= */ /* --- Internal helpers ---------------------------------------------------- */ static uint16_t EE_GetPageStatus(uint32_t pageBase) { 80012cc: b480 push {r7} 80012ce: b083 sub sp, #12 80012d0: af00 add r7, sp, #0 80012d2: 6078 str r0, [r7, #4] return *(__IO uint16_t *)pageBase; 80012d4: 687b ldr r3, [r7, #4] 80012d6: 881b ldrh r3, [r3, #0] 80012d8: b29b uxth r3, r3 } 80012da: 4618 mov r0, r3 80012dc: 370c adds r7, #12 80012de: 46bd mov sp, r7 80012e0: bc80 pop {r7} 80012e2: 4770 bx lr 080012e4 : static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data) { 80012e4: b5b0 push {r4, r5, r7, lr} 80012e6: b084 sub sp, #16 80012e8: af00 add r7, sp, #0 80012ea: 6078 str r0, [r7, #4] 80012ec: 460b mov r3, r1 80012ee: 807b strh r3, [r7, #2] HAL_StatusTypeDef status; HAL_FLASH_Unlock(); 80012f0: f004 fe76 bl 8005fe0 status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data); 80012f4: 887b ldrh r3, [r7, #2] 80012f6: 2200 movs r2, #0 80012f8: 461c mov r4, r3 80012fa: 4615 mov r5, r2 80012fc: 4622 mov r2, r4 80012fe: 462b mov r3, r5 8001300: 6879 ldr r1, [r7, #4] 8001302: 2001 movs r0, #1 8001304: f004 fdfc bl 8005f00 8001308: 4603 mov r3, r0 800130a: 73fb strb r3, [r7, #15] HAL_FLASH_Lock(); 800130c: f004 fe8e bl 800602c return status; 8001310: 7bfb ldrb r3, [r7, #15] } 8001312: 4618 mov r0, r3 8001314: 3710 adds r7, #16 8001316: 46bd mov sp, r7 8001318: bdb0 pop {r4, r5, r7, pc} 0800131a : static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress) { 800131a: b580 push {r7, lr} 800131c: b088 sub sp, #32 800131e: af00 add r7, sp, #0 8001320: 6078 str r0, [r7, #4] HAL_StatusTypeDef status; FLASH_EraseInitTypeDef EraseInit; uint32_t PageError = 0; 8001322: 2300 movs r3, #0 8001324: 60bb str r3, [r7, #8] HAL_FLASH_Unlock(); 8001326: f004 fe5b bl 8005fe0 EraseInit.TypeErase = FLASH_TYPEERASE_PAGES; 800132a: 2300 movs r3, #0 800132c: 60fb str r3, [r7, #12] EraseInit.PageAddress = PageAddress; 800132e: 687b ldr r3, [r7, #4] 8001330: 617b str r3, [r7, #20] EraseInit.NbPages = 1; 8001332: 2301 movs r3, #1 8001334: 61bb str r3, [r7, #24] status = HAL_FLASHEx_Erase(&EraseInit, &PageError); 8001336: f107 0208 add.w r2, r7, #8 800133a: f107 030c add.w r3, r7, #12 800133e: 4611 mov r1, r2 8001340: 4618 mov r0, r3 8001342: f004 ff35 bl 80061b0 8001346: 4603 mov r3, r0 8001348: 77fb strb r3, [r7, #31] HAL_FLASH_Lock(); 800134a: f004 fe6f bl 800602c return status; 800134e: 7ffb ldrb r3, [r7, #31] } 8001350: 4618 mov r0, r3 8001352: 3720 adds r7, #32 8001354: 46bd mov sp, r7 8001356: bd80 pop {r7, pc} 08001358 : /* Find first free record address in given page (returns 0 if full) */ static uint32_t EE_FindFreeAddress(uint32_t pageBase) { 8001358: b480 push {r7} 800135a: b087 sub sp, #28 800135c: af00 add r7, sp, #0 800135e: 6078 str r0, [r7, #4] uint32_t addr = pageBase + 2U; /* Skip status word */ 8001360: 687b ldr r3, [r7, #4] 8001362: 3302 adds r3, #2 8001364: 617b str r3, [r7, #20] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8001366: 687b ldr r3, [r7, #4] 8001368: f503 6380 add.w r3, r3, #1024 @ 0x400 800136c: 613b str r3, [r7, #16] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 800136e: e00c b.n 800138a { uint16_t vaddr = *(__IO uint16_t *)addr; 8001370: 697b ldr r3, [r7, #20] 8001372: 881b ldrh r3, [r3, #0] 8001374: 81fb strh r3, [r7, #14] if (vaddr == 0xFFFFU) 8001376: 89fb ldrh r3, [r7, #14] 8001378: f64f 72ff movw r2, #65535 @ 0xffff 800137c: 4293 cmp r3, r2 800137e: d101 bne.n 8001384 { /* Empty slot */ return addr; 8001380: 697b ldr r3, [r7, #20] 8001382: e008 b.n 8001396 } addr += sizeof(EE_Record_t); 8001384: 697b ldr r3, [r7, #20] 8001386: 3304 adds r3, #4 8001388: 617b str r3, [r7, #20] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 800138a: 693b ldr r3, [r7, #16] 800138c: 3b03 subs r3, #3 800138e: 697a ldr r2, [r7, #20] 8001390: 429a cmp r2, r3 8001392: d3ed bcc.n 8001370 } return 0U; /* No space */ 8001394: 2300 movs r3, #0 } 8001396: 4618 mov r0, r3 8001398: 371c adds r7, #28 800139a: 46bd mov sp, r7 800139c: bc80 pop {r7} 800139e: 4770 bx lr 080013a0 : /* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */ /* Find latest value of VirtAddress in a specific page (scan forward) */ static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data) { 80013a0: b480 push {r7} 80013a2: b089 sub sp, #36 @ 0x24 80013a4: af00 add r7, sp, #0 80013a6: 60f8 str r0, [r7, #12] 80013a8: 460b mov r3, r1 80013aa: 607a str r2, [r7, #4] 80013ac: 817b strh r3, [r7, #10] uint32_t addr = pageBase + 2U; // skip status halfword 80013ae: 68fb ldr r3, [r7, #12] 80013b0: 3302 adds r3, #2 80013b2: 61fb str r3, [r7, #28] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 80013b4: 68fb ldr r3, [r7, #12] 80013b6: f503 6380 add.w r3, r3, #1024 @ 0x400 80013ba: 617b str r3, [r7, #20] EE_Status result = EE_NOT_FOUND; 80013bc: 2302 movs r3, #2 80013be: 76fb strb r3, [r7, #27] uint16_t lastVal = 0; 80013c0: 2300 movs r3, #0 80013c2: 833b strh r3, [r7, #24] if (Data == NULL) 80013c4: 687b ldr r3, [r7, #4] 80013c6: 2b00 cmp r3, #0 80013c8: d118 bne.n 80013fc return EE_ERROR; 80013ca: 2301 movs r3, #1 80013cc: e024 b.n 8001418 while (addr <= (pageEnd - sizeof(EE_Record_t))) { uint16_t vaddr = *(__IO uint16_t *)addr; 80013ce: 69fb ldr r3, [r7, #28] 80013d0: 881b ldrh r3, [r3, #0] 80013d2: 827b strh r3, [r7, #18] if (vaddr == 0xFFFFU) 80013d4: 8a7b ldrh r3, [r7, #18] 80013d6: f64f 72ff movw r2, #65535 @ 0xffff 80013da: 4293 cmp r3, r2 80013dc: d014 beq.n 8001408 { // First empty slot => no more records in this page break; } uint16_t value = *(__IO uint16_t *)(addr + 2U); 80013de: 69fb ldr r3, [r7, #28] 80013e0: 3302 adds r3, #2 80013e2: 881b ldrh r3, [r3, #0] 80013e4: 823b strh r3, [r7, #16] if (vaddr == VirtAddress) 80013e6: 8a7a ldrh r2, [r7, #18] 80013e8: 897b ldrh r3, [r7, #10] 80013ea: 429a cmp r2, r3 80013ec: d103 bne.n 80013f6 { lastVal = value; // keep most recent 80013ee: 8a3b ldrh r3, [r7, #16] 80013f0: 833b strh r3, [r7, #24] result = EE_OK; 80013f2: 2300 movs r3, #0 80013f4: 76fb strb r3, [r7, #27] } addr += sizeof(EE_Record_t); // move 4 bytes forward 80013f6: 69fb ldr r3, [r7, #28] 80013f8: 3304 adds r3, #4 80013fa: 61fb str r3, [r7, #28] while (addr <= (pageEnd - sizeof(EE_Record_t))) 80013fc: 697b ldr r3, [r7, #20] 80013fe: 3b04 subs r3, #4 8001400: 69fa ldr r2, [r7, #28] 8001402: 429a cmp r2, r3 8001404: d9e3 bls.n 80013ce 8001406: e000 b.n 800140a break; 8001408: bf00 nop } if (result == EE_OK) 800140a: 7efb ldrb r3, [r7, #27] 800140c: 2b00 cmp r3, #0 800140e: d102 bne.n 8001416 *Data = lastVal; 8001410: 687b ldr r3, [r7, #4] 8001412: 8b3a ldrh r2, [r7, #24] 8001414: 801a strh r2, [r3, #0] return result; 8001416: 7efb ldrb r3, [r7, #27] } 8001418: 4618 mov r0, r3 800141a: 3724 adds r7, #36 @ 0x24 800141c: 46bd mov sp, r7 800141e: bc80 pop {r7} 8001420: 4770 bx lr ... 08001424 : /* Format both pages: erase and set PAGE0 as VALID */ static EE_Status EE_Format(void) { 8001424: b580 push {r7, lr} 8001426: af00 add r7, sp, #0 if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK) 8001428: 480f ldr r0, [pc, #60] @ (8001468 ) 800142a: f7ff ff76 bl 800131a 800142e: 4603 mov r3, r0 8001430: 2b00 cmp r3, #0 8001432: d001 beq.n 8001438 return EE_STATUS_ERROR; 8001434: 2301 movs r3, #1 8001436: e015 b.n 8001464 if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK) 8001438: 480c ldr r0, [pc, #48] @ (800146c ) 800143a: f7ff ff6e bl 800131a 800143e: 4603 mov r3, r0 8001440: 2b00 cmp r3, #0 8001442: d001 beq.n 8001448 return EE_STATUS_ERROR; 8001444: 2301 movs r3, #1 8001446: e00d b.n 8001464 if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK) 8001448: f64a 21aa movw r1, #43690 @ 0xaaaa 800144c: 4806 ldr r0, [pc, #24] @ (8001468 ) 800144e: f7ff ff49 bl 80012e4 8001452: 4603 mov r3, r0 8001454: 2b00 cmp r3, #0 8001456: d001 beq.n 800145c return EE_STATUS_ERROR; 8001458: 2301 movs r3, #1 800145a: e003 b.n 8001464 /* PAGE1 will remain erased (status = 0xFFFF) */ EE_ActivePageBase = EE_PAGE0_BASE; 800145c: 4b04 ldr r3, [pc, #16] @ (8001470 ) 800145e: 4a02 ldr r2, [pc, #8] @ (8001468 ) 8001460: 601a str r2, [r3, #0] return EE_STATUS_OK; 8001462: 2300 movs r3, #0 } 8001464: 4618 mov r0, r3 8001466: bd80 pop {r7, pc} 8001468: 0800f800 .word 0x0800f800 800146c: 0800fc00 .word 0x0800fc00 8001470: 20000000 .word 0x20000000 08001474 : /* Get the base of the other page */ static uint32_t EE_GetOtherPageBase(uint32_t pageBase) { 8001474: b480 push {r7} 8001476: b083 sub sp, #12 8001478: af00 add r7, sp, #0 800147a: 6078 str r0, [r7, #4] return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE; 800147c: 687b ldr r3, [r7, #4] 800147e: 4a05 ldr r2, [pc, #20] @ (8001494 ) 8001480: 4293 cmp r3, r2 8001482: d101 bne.n 8001488 8001484: 4b04 ldr r3, [pc, #16] @ (8001498 ) 8001486: e000 b.n 800148a 8001488: 4b02 ldr r3, [pc, #8] @ (8001494 ) } 800148a: 4618 mov r0, r3 800148c: 370c adds r7, #12 800148e: 46bd mov sp, r7 8001490: bc80 pop {r7} 8001492: 4770 bx lr 8001494: 0800f800 .word 0x0800f800 8001498: 0800fc00 .word 0x0800fc00 0800149c : /* Page transfer (garbage collection + new write) */ static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data) { 800149c: b580 push {r7, lr} 800149e: b088 sub sp, #32 80014a0: af00 add r7, sp, #0 80014a2: 4603 mov r3, r0 80014a4: 460a mov r2, r1 80014a6: 80fb strh r3, [r7, #6] 80014a8: 4613 mov r3, r2 80014aa: 80bb strh r3, [r7, #4] uint32_t oldBase = EE_ActivePageBase; 80014ac: 4b3c ldr r3, [pc, #240] @ (80015a0 ) 80014ae: 681b ldr r3, [r3, #0] 80014b0: 617b str r3, [r7, #20] uint32_t newBase = EE_GetOtherPageBase(oldBase); 80014b2: 6978 ldr r0, [r7, #20] 80014b4: f7ff ffde bl 8001474 80014b8: 6138 str r0, [r7, #16] uint32_t addr; uint16_t value; EE_Status st; /* Erase new page */ if (EE_FlashErasePage(newBase) != HAL_OK) 80014ba: 6938 ldr r0, [r7, #16] 80014bc: f7ff ff2d bl 800131a 80014c0: 4603 mov r3, r0 80014c2: 2b00 cmp r3, #0 80014c4: d001 beq.n 80014ca return EE_STATUS_ERROR; 80014c6: 2301 movs r3, #1 80014c8: e065 b.n 8001596 /* Mark new page as RECEIVE */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK) 80014ca: f245 5155 movw r1, #21845 @ 0x5555 80014ce: 6938 ldr r0, [r7, #16] 80014d0: f7ff ff08 bl 80012e4 80014d4: 4603 mov r3, r0 80014d6: 2b00 cmp r3, #0 80014d8: d001 beq.n 80014de return EE_STATUS_ERROR; 80014da: 2301 movs r3, #1 80014dc: e05b b.n 8001596 /* Start writing records just after status */ addr = newBase + 2U; 80014de: 693b ldr r3, [r7, #16] 80014e0: 3302 adds r3, #2 80014e2: 61fb str r3, [r7, #28] /* For each known virtual variable */ for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 80014e4: 2300 movs r3, #0 80014e6: 837b strh r3, [r7, #26] 80014e8: e03c b.n 8001564 { uint16_t vaddr = EE_VirtAddrs[i]; 80014ea: 8b7b ldrh r3, [r7, #26] 80014ec: 4a2d ldr r2, [pc, #180] @ (80015a4 ) 80014ee: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 80014f2: 81fb strh r3, [r7, #14] if (vaddr == VirtAddress) 80014f4: 89fa ldrh r2, [r7, #14] 80014f6: 88fb ldrh r3, [r7, #6] 80014f8: 429a cmp r2, r3 80014fa: d102 bne.n 8001502 { /* Use the new data passed into PageTransfer */ value = Data; 80014fc: 88bb ldrh r3, [r7, #4] 80014fe: 817b strh r3, [r7, #10] 8001500: e00b b.n 800151a } else { /* Read latest value from old active page */ st = EE_FindInPage(oldBase, vaddr, &value); 8001502: f107 020a add.w r2, r7, #10 8001506: 89fb ldrh r3, [r7, #14] 8001508: 4619 mov r1, r3 800150a: 6978 ldr r0, [r7, #20] 800150c: f7ff ff48 bl 80013a0 8001510: 4603 mov r3, r0 8001512: 737b strb r3, [r7, #13] if (st != EE_STATUS_OK) 8001514: 7b7b ldrb r3, [r7, #13] 8001516: 2b00 cmp r3, #0 8001518: d120 bne.n 800155c continue; } } /* Write record to new page */ if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK) 800151a: 89fb ldrh r3, [r7, #14] 800151c: 4619 mov r1, r3 800151e: 69f8 ldr r0, [r7, #28] 8001520: f7ff fee0 bl 80012e4 8001524: 4603 mov r3, r0 8001526: 2b00 cmp r3, #0 8001528: d001 beq.n 800152e return EE_STATUS_ERROR; 800152a: 2301 movs r3, #1 800152c: e033 b.n 8001596 if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK) 800152e: 69fb ldr r3, [r7, #28] 8001530: 3302 adds r3, #2 8001532: 897a ldrh r2, [r7, #10] 8001534: 4611 mov r1, r2 8001536: 4618 mov r0, r3 8001538: f7ff fed4 bl 80012e4 800153c: 4603 mov r3, r0 800153e: 2b00 cmp r3, #0 8001540: d001 beq.n 8001546 return EE_STATUS_ERROR; 8001542: 2301 movs r3, #1 8001544: e027 b.n 8001596 addr += sizeof(EE_Record_t); 8001546: 69fb ldr r3, [r7, #28] 8001548: 3304 adds r3, #4 800154a: 61fb str r3, [r7, #28] if (addr >= (newBase + EE_PAGE_SIZE)) 800154c: 693b ldr r3, [r7, #16] 800154e: f503 6380 add.w r3, r3, #1024 @ 0x400 8001552: 69fa ldr r2, [r7, #28] 8001554: 429a cmp r2, r3 8001556: d302 bcc.n 800155e return EE_STATUS_NO_SPACE; 8001558: 2303 movs r3, #3 800155a: e01c b.n 8001596 continue; 800155c: bf00 nop for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 800155e: 8b7b ldrh r3, [r7, #26] 8001560: 3301 adds r3, #1 8001562: 837b strh r3, [r7, #26] 8001564: 8b7b ldrh r3, [r7, #26] 8001566: 2b3f cmp r3, #63 @ 0x3f 8001568: d9bf bls.n 80014ea } /* Erase old page */ if (EE_FlashErasePage(oldBase) != HAL_OK) 800156a: 6978 ldr r0, [r7, #20] 800156c: f7ff fed5 bl 800131a 8001570: 4603 mov r3, r0 8001572: 2b00 cmp r3, #0 8001574: d001 beq.n 800157a return EE_STATUS_ERROR; 8001576: 2301 movs r3, #1 8001578: e00d b.n 8001596 /* Mark new page as VALID */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK) 800157a: f64a 21aa movw r1, #43690 @ 0xaaaa 800157e: 6938 ldr r0, [r7, #16] 8001580: f7ff feb0 bl 80012e4 8001584: 4603 mov r3, r0 8001586: 2b00 cmp r3, #0 8001588: d001 beq.n 800158e return EE_STATUS_ERROR; 800158a: 2301 movs r3, #1 800158c: e003 b.n 8001596 /* Update active page */ EE_ActivePageBase = newBase; 800158e: 4a04 ldr r2, [pc, #16] @ (80015a0 ) 8001590: 693b ldr r3, [r7, #16] 8001592: 6013 str r3, [r2, #0] return EE_STATUS_OK; 8001594: 2300 movs r3, #0 } 8001596: 4618 mov r0, r3 8001598: 3720 adds r7, #32 800159a: 46bd mov sp, r7 800159c: bd80 pop {r7, pc} 800159e: bf00 nop 80015a0: 20000000 .word 0x20000000 80015a4: 0800f498 .word 0x0800f498 080015a8 : * - Checks page statuses and chooses the active page. * - If inconsistent or blank, formats pages. * PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...) */ uint16_t EE_Init(void) { 80015a8: b580 push {r7, lr} 80015aa: b082 sub sp, #8 80015ac: af00 add r7, sp, #0 uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE); 80015ae: 481e ldr r0, [pc, #120] @ (8001628 ) 80015b0: f7ff fe8c bl 80012cc 80015b4: 4603 mov r3, r0 80015b6: 80fb strh r3, [r7, #6] uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE); 80015b8: 481c ldr r0, [pc, #112] @ (800162c ) 80015ba: f7ff fe87 bl 80012cc 80015be: 4603 mov r3, r0 80015c0: 80bb strh r3, [r7, #4] if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED)) 80015c2: 88fb ldrh r3, [r7, #6] 80015c4: f64f 72ff movw r2, #65535 @ 0xffff 80015c8: 4293 cmp r3, r2 80015ca: d108 bne.n 80015de 80015cc: 88bb ldrh r3, [r7, #4] 80015ce: f64f 72ff movw r2, #65535 @ 0xffff 80015d2: 4293 cmp r3, r2 80015d4: d103 bne.n 80015de { /* Fresh device -> format */ return (uint16_t)EE_Format(); 80015d6: f7ff ff25 bl 8001424 80015da: 4603 mov r3, r0 80015dc: e020 b.n 8001620 } else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED)) 80015de: 88fb ldrh r3, [r7, #6] 80015e0: f64a 22aa movw r2, #43690 @ 0xaaaa 80015e4: 4293 cmp r3, r2 80015e6: d109 bne.n 80015fc 80015e8: 88bb ldrh r3, [r7, #4] 80015ea: f64f 72ff movw r2, #65535 @ 0xffff 80015ee: 4293 cmp r3, r2 80015f0: d104 bne.n 80015fc { EE_ActivePageBase = EE_PAGE0_BASE; 80015f2: 4b0f ldr r3, [pc, #60] @ (8001630 ) 80015f4: 4a0c ldr r2, [pc, #48] @ (8001628 ) 80015f6: 601a str r2, [r3, #0] return EE_OK; 80015f8: 2300 movs r3, #0 80015fa: e011 b.n 8001620 } else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED)) 80015fc: 88bb ldrh r3, [r7, #4] 80015fe: f64a 22aa movw r2, #43690 @ 0xaaaa 8001602: 4293 cmp r3, r2 8001604: d109 bne.n 800161a 8001606: 88fb ldrh r3, [r7, #6] 8001608: f64f 72ff movw r2, #65535 @ 0xffff 800160c: 4293 cmp r3, r2 800160e: d104 bne.n 800161a { EE_ActivePageBase = EE_PAGE1_BASE; 8001610: 4b07 ldr r3, [pc, #28] @ (8001630 ) 8001612: 4a06 ldr r2, [pc, #24] @ (800162c ) 8001614: 601a str r2, [r3, #0] return EE_OK; 8001616: 2300 movs r3, #0 8001618: e002 b.n 8001620 } else { /* Any weird or inconsistent state -> reformat */ return (uint16_t)EE_Format(); 800161a: f7ff ff03 bl 8001424 800161e: 4603 mov r3, r0 } } 8001620: 4618 mov r0, r3 8001622: 3708 adds r7, #8 8001624: 46bd mov sp, r7 8001626: bd80 pop {r7, pc} 8001628: 0800f800 .word 0x0800f800 800162c: 0800fc00 .word 0x0800fc00 8001630: 20000000 .word 0x20000000 08001634 : /* * Read a 16-bit variable by its virtual address. * PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t) */ uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data) { 8001634: b580 push {r7, lr} 8001636: b084 sub sp, #16 8001638: af00 add r7, sp, #0 800163a: 4603 mov r3, r0 800163c: 6039 str r1, [r7, #0] 800163e: 80fb strh r3, [r7, #6] EE_Status st; if (Data == NULL) 8001640: 683b ldr r3, [r7, #0] 8001642: 2b00 cmp r3, #0 8001644: d101 bne.n 800164a return EE_ERROR; 8001646: 2301 movs r3, #1 8001648: e00a b.n 8001660 st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data); 800164a: 4b07 ldr r3, [pc, #28] @ (8001668 ) 800164c: 681b ldr r3, [r3, #0] 800164e: 88f9 ldrh r1, [r7, #6] 8001650: 683a ldr r2, [r7, #0] 8001652: 4618 mov r0, r3 8001654: f7ff fea4 bl 80013a0 8001658: 4603 mov r3, r0 800165a: 73fb strb r3, [r7, #15] return (uint16_t)st; 800165c: 7bfb ldrb r3, [r7, #15] 800165e: b29b uxth r3, r3 } 8001660: 4618 mov r0, r3 8001662: 3710 adds r7, #16 8001664: 46bd mov sp, r7 8001666: bd80 pop {r7, pc} 8001668: 20000000 .word 0x20000000 0800166c : * - Writes a new record in the active page. * - If the page is full, triggers a page transfer (GC). * PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t) */ uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data) { 800166c: b580 push {r7, lr} 800166e: b084 sub sp, #16 8001670: af00 add r7, sp, #0 8001672: 4603 mov r3, r0 8001674: 460a mov r2, r1 8001676: 80fb strh r3, [r7, #6] 8001678: 4613 mov r3, r2 800167a: 80bb strh r3, [r7, #4] uint32_t freeAddr; EE_Status st; /* Find free space in active page */ freeAddr = EE_FindFreeAddress(EE_ActivePageBase); 800167c: 4b17 ldr r3, [pc, #92] @ (80016dc ) 800167e: 681b ldr r3, [r3, #0] 8001680: 4618 mov r0, r3 8001682: f7ff fe69 bl 8001358 8001686: 60f8 str r0, [r7, #12] if (freeAddr != 0U) 8001688: 68fb ldr r3, [r7, #12] 800168a: 2b00 cmp r3, #0 800168c: d017 beq.n 80016be { /* Write new record */ if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK) 800168e: 88fb ldrh r3, [r7, #6] 8001690: 4619 mov r1, r3 8001692: 68f8 ldr r0, [r7, #12] 8001694: f7ff fe26 bl 80012e4 8001698: 4603 mov r3, r0 800169a: 2b00 cmp r3, #0 800169c: d001 beq.n 80016a2 return EE_ERROR; 800169e: 2301 movs r3, #1 80016a0: e017 b.n 80016d2 if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK) 80016a2: 68fb ldr r3, [r7, #12] 80016a4: 3302 adds r3, #2 80016a6: 88ba ldrh r2, [r7, #4] 80016a8: 4611 mov r1, r2 80016aa: 4618 mov r0, r3 80016ac: f7ff fe1a bl 80012e4 80016b0: 4603 mov r3, r0 80016b2: 2b00 cmp r3, #0 80016b4: d001 beq.n 80016ba return EE_ERROR; 80016b6: 2301 movs r3, #1 80016b8: e00b b.n 80016d2 return EE_OK; 80016ba: 2300 movs r3, #0 80016bc: e009 b.n 80016d2 } /* No space -> page transfer */ st = EE_PageTransfer(VirtAddress, Data); 80016be: 88ba ldrh r2, [r7, #4] 80016c0: 88fb ldrh r3, [r7, #6] 80016c2: 4611 mov r1, r2 80016c4: 4618 mov r0, r3 80016c6: f7ff fee9 bl 800149c 80016ca: 4603 mov r3, r0 80016cc: 72fb strb r3, [r7, #11] return (uint16_t)st; 80016ce: 7afb ldrb r3, [r7, #11] 80016d0: b29b uxth r3, r3 } 80016d2: 4618 mov r0, r3 80016d4: 3710 adds r7, #16 80016d6: 46bd mov sp, r7 80016d8: bd80 pop {r7, pc} 80016da: bf00 nop 80016dc: 20000000 .word 0x20000000 080016e0 : void loadDefault(void){ 80016e0: b580 push {r7, lr} 80016e2: b09a sub sp, #104 @ 0x68 80016e4: af00 add r7, sp, #0 uint8_t i; char s[100]; uint16_t st; for(i=0;i st=EEW_Write(i,deftab[i]); 80016ee: f897 3067 ldrb.w r3, [r7, #103] @ 0x67 80016f2: 4a1e ldr r2, [pc, #120] @ (800176c ) 80016f4: f832 2013 ldrh.w r2, [r2, r3, lsl #1] 80016f8: f897 3067 ldrb.w r3, [r7, #103] @ 0x67 80016fc: 4611 mov r1, r2 80016fe: 4618 mov r0, r3 8001700: f7ff fdce bl 80012a0 8001704: 4603 mov r3, r0 8001706: f8a7 3064 strh.w r3, [r7, #100] @ 0x64 if (st == EE_OK)sprintf((char*)s,"\ndone %d=%d",i,deftab[i]); 800170a: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64 800170e: 2b00 cmp r3, #0 8001710: d10b bne.n 800172a 8001712: f897 2067 ldrb.w r2, [r7, #103] @ 0x67 8001716: f897 3067 ldrb.w r3, [r7, #103] @ 0x67 800171a: 4914 ldr r1, [pc, #80] @ (800176c ) 800171c: f831 3013 ldrh.w r3, [r1, r3, lsl #1] 8001720: 4638 mov r0, r7 8001722: 4913 ldr r1, [pc, #76] @ (8001770 ) 8001724: f00c fe76 bl 800e414 8001728: e006 b.n 8001738 else sprintf((char*)s,"\nee write error %d", st); 800172a: f8b7 2064 ldrh.w r2, [r7, #100] @ 0x64 800172e: 463b mov r3, r7 8001730: 4910 ldr r1, [pc, #64] @ (8001774 ) 8001732: 4618 mov r0, r3 8001734: f00c fe6e bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8001738: 463b mov r3, r7 800173a: 4618 mov r0, r3 800173c: f7fe fd06 bl 800014c 8001740: 4603 mov r3, r0 8001742: b29a uxth r2, r3 8001744: 4639 mov r1, r7 8001746: f04f 33ff mov.w r3, #4294967295 800174a: 480b ldr r0, [pc, #44] @ (8001778 ) 800174c: f008 f872 bl 8009834 for(i=0;i } } 8001762: bf00 nop 8001764: bf00 nop 8001766: 3768 adds r7, #104 @ 0x68 8001768: 46bd mov sp, r7 800176a: bd80 pop {r7, pc} 800176c: 0800f418 .word 0x0800f418 8001770: 0800f18c .word 0x0800f18c 8001774: 0800f198 .word 0x0800f198 8001778: 200003a8 .word 0x200003a8 0800177c : void loadEE(void){ 800177c: b5f0 push {r4, r5, r6, r7, lr} 800177e: b0b9 sub sp, #228 @ 0xe4 8001780: af06 add r7, sp, #24 char s [200]; m1pwmap=deftab[M1PWMAP]; 8001782: 2228 movs r2, #40 @ 0x28 8001784: 4ba9 ldr r3, [pc, #676] @ (8001a2c ) 8001786: 801a strh r2, [r3, #0] m1pwmch=deftab[M1PWMCH]; 8001788: 223c movs r2, #60 @ 0x3c 800178a: 4ba9 ldr r3, [pc, #676] @ (8001a30 ) 800178c: 801a strh r2, [r3, #0] m2pwmap=deftab[M2PWMAP]; 800178e: 2246 movs r2, #70 @ 0x46 8001790: 4ba8 ldr r3, [pc, #672] @ (8001a34 ) 8001792: 801a strh r2, [r3, #0] m2pwmch=deftab[M2PWMCH]; 8001794: 2246 movs r2, #70 @ 0x46 8001796: 4ba8 ldr r3, [pc, #672] @ (8001a38 ) 8001798: 801a strh r2, [r3, #0] m3pwmap=deftab[M3PWMAP]; 800179a: 2223 movs r2, #35 @ 0x23 800179c: 4ba7 ldr r3, [pc, #668] @ (8001a3c ) 800179e: 801a strh r2, [r3, #0] m3pwmch=deftab[M3PWMCH]; 80017a0: 2228 movs r2, #40 @ 0x28 80017a2: 4ba7 ldr r3, [pc, #668] @ (8001a40 ) 80017a4: 801a strh r2, [r3, #0] m4pwmap=deftab[M4PWMAP]; 80017a6: 2228 movs r2, #40 @ 0x28 80017a8: 4ba6 ldr r3, [pc, #664] @ (8001a44 ) 80017aa: 801a strh r2, [r3, #0] m4pwmch=deftab[M4PWMCH]; 80017ac: 2228 movs r2, #40 @ 0x28 80017ae: 4ba6 ldr r3, [pc, #664] @ (8001a48 ) 80017b0: 801a strh r2, [r3, #0] mrampstart[M1-1]=deftab[M1RAMPSTART]; 80017b2: 2214 movs r2, #20 80017b4: 4ba5 ldr r3, [pc, #660] @ (8001a4c ) 80017b6: 801a strh r2, [r3, #0] mrampstart[M2-1]=deftab[M2RAMPSTART]; 80017b8: 2214 movs r2, #20 80017ba: 4ba4 ldr r3, [pc, #656] @ (8001a4c ) 80017bc: 805a strh r2, [r3, #2] mrampstart[M3-1]=deftab[M3RAMPSTART]; 80017be: 2214 movs r2, #20 80017c0: 4ba2 ldr r3, [pc, #648] @ (8001a4c ) 80017c2: 809a strh r2, [r3, #4] mrampstart[M4-1]=deftab[M4RAMPSTART]; 80017c4: 2214 movs r2, #20 80017c6: 4ba1 ldr r3, [pc, #644] @ (8001a4c ) 80017c8: 80da strh r2, [r3, #6] m1TimeoutMan=deftab[M1TIMEOUTMAN]; 80017ca: 22e6 movs r2, #230 @ 0xe6 80017cc: 4ba0 ldr r3, [pc, #640] @ (8001a50 ) 80017ce: 801a strh r2, [r3, #0] m2TimeoutMan=deftab[M2TIMEOUTMAN]; 80017d0: 2264 movs r2, #100 @ 0x64 80017d2: 4ba0 ldr r3, [pc, #640] @ (8001a54 ) 80017d4: 801a strh r2, [r3, #0] m3TimeoutMan=deftab[M3TIMEOUTMAN]; 80017d6: 2282 movs r2, #130 @ 0x82 80017d8: 4b9f ldr r3, [pc, #636] @ (8001a58 ) 80017da: 801a strh r2, [r3, #0] m4TimeoutMan=deftab[M4TIMEOUTMAN]; 80017dc: f44f 7296 mov.w r2, #300 @ 0x12c 80017e0: 4b9e ldr r3, [pc, #632] @ (8001a5c ) 80017e2: 801a strh r2, [r3, #0] thanem=deftab[THANEM]; 80017e4: f44f 72fa mov.w r2, #500 @ 0x1f4 80017e8: 4b9d ldr r3, [pc, #628] @ (8001a60 ) 80017ea: 801a strh r2, [r3, #0] tanem=deftab[TANEM]; 80017ec: 2214 movs r2, #20 80017ee: 4b9d ldr r3, [pc, #628] @ (8001a64 ) 80017f0: 801a strh r2, [r3, #0] m1pwmMan=deftab[M1PWMMAN]; 80017f2: 223c movs r2, #60 @ 0x3c 80017f4: 4b9c ldr r3, [pc, #624] @ (8001a68 ) 80017f6: 801a strh r2, [r3, #0] m2pwmMan=deftab[M2PWMMAN]; 80017f8: 2246 movs r2, #70 @ 0x46 80017fa: 4b9c ldr r3, [pc, #624] @ (8001a6c ) 80017fc: 801a strh r2, [r3, #0] m3pwmMan=deftab[M3PWMMAN]; 80017fe: 2228 movs r2, #40 @ 0x28 8001800: 4b9b ldr r3, [pc, #620] @ (8001a70 ) 8001802: 801a strh r2, [r3, #0] m4pwmMan=deftab[M4PWMMAN]; 8001804: 2228 movs r2, #40 @ 0x28 8001806: 4b9b ldr r3, [pc, #620] @ (8001a74 ) 8001808: 801a strh r2, [r3, #0] trampman=deftab[TRAMPMAN]; 800180a: 2232 movs r2, #50 @ 0x32 800180c: 4b9a ldr r3, [pc, #616] @ (8001a78 ) 800180e: 801a strh r2, [r3, #0] tramp=deftab[TRAMP]; 8001810: 220a movs r2, #10 8001812: 4b9a ldr r3, [pc, #616] @ (8001a7c ) 8001814: 801a strh r2, [r3, #0] apM1start=deftab[APM1START]; 8001816: f44f 729b mov.w r2, #310 @ 0x136 800181a: 4b99 ldr r3, [pc, #612] @ (8001a80 ) 800181c: 801a strh r2, [r3, #0] apM1stop=deftab[APM1STOP]; 800181e: f44f 72e1 mov.w r2, #450 @ 0x1c2 8001822: 4b98 ldr r3, [pc, #608] @ (8001a84 ) 8001824: 801a strh r2, [r3, #0] apM2start=deftab[APM2START]; 8001826: 221e movs r2, #30 8001828: 4b97 ldr r3, [pc, #604] @ (8001a88 ) 800182a: 801a strh r2, [r3, #0] apM2stop=deftab[APM2STOP]; 800182c: f44f 729b mov.w r2, #310 @ 0x136 8001830: 4b96 ldr r3, [pc, #600] @ (8001a8c ) 8001832: 801a strh r2, [r3, #0] apM3start=deftab[APM3START]; 8001834: f44f 72aa mov.w r2, #340 @ 0x154 8001838: 4b95 ldr r3, [pc, #596] @ (8001a90 ) 800183a: 801a strh r2, [r3, #0] apM3stop=deftab[APM3STOP]; 800183c: f44f 72d7 mov.w r2, #430 @ 0x1ae 8001840: 4b94 ldr r3, [pc, #592] @ (8001a94 ) 8001842: 801a strh r2, [r3, #0] apM4start=deftab[APM4START]; 8001844: 221e movs r2, #30 8001846: 4b94 ldr r3, [pc, #592] @ (8001a98 ) 8001848: 801a strh r2, [r3, #0] apM4stop=deftab[APM4STOP]; 800184a: f44f 72d7 mov.w r2, #430 @ 0x1ae 800184e: 4b93 ldr r3, [pc, #588] @ (8001a9c ) 8001850: 801a strh r2, [r3, #0] chM1start=deftab[CHM1START]; 8001852: 220a movs r2, #10 8001854: 4b92 ldr r3, [pc, #584] @ (8001aa0 ) 8001856: 801a strh r2, [r3, #0] chM1stop=deftab[CHM1STOP]; 8001858: f44f 72a0 mov.w r2, #320 @ 0x140 800185c: 4b91 ldr r3, [pc, #580] @ (8001aa4 ) 800185e: 801a strh r2, [r3, #0] chM2start=deftab[CHM2START]; 8001860: 228c movs r2, #140 @ 0x8c 8001862: 4b91 ldr r3, [pc, #580] @ (8001aa8 ) 8001864: 801a strh r2, [r3, #0] chM2stop=deftab[CHM2START]; 8001866: 228c movs r2, #140 @ 0x8c 8001868: 4b90 ldr r3, [pc, #576] @ (8001aac ) 800186a: 801a strh r2, [r3, #0] chM3start=deftab[CHM3START]; 800186c: 2214 movs r2, #20 800186e: 4b90 ldr r3, [pc, #576] @ (8001ab0 ) 8001870: 801a strh r2, [r3, #0] chM3stop=deftab[CHM3STOP]; 8001872: f44f 728c mov.w r2, #280 @ 0x118 8001876: 4b8f ldr r3, [pc, #572] @ (8001ab4 ) 8001878: 801a strh r2, [r3, #0] chM4start=deftab[CHM4START]; 800187a: 2228 movs r2, #40 @ 0x28 800187c: 4b8e ldr r3, [pc, #568] @ (8001ab8 ) 800187e: 801a strh r2, [r3, #0] chM4stop=deftab[CHM4STOP]; 8001880: f44f 72dc mov.w r2, #440 @ 0x1b8 8001884: 4b8d ldr r3, [pc, #564] @ (8001abc ) 8001886: 801a strh r2, [r3, #0] flagPar=deftab[FLAGPAR]; 8001888: 2205 movs r2, #5 800188a: 4b8d ldr r3, [pc, #564] @ (8001ac0 ) 800188c: 801a strh r2, [r3, #0] // EEW_Read(CHM4START,&chM4start); // EEW_Read(CHM4STOP ,&chM4stop); // // EEW_Read(FLAGPAR ,&flagPar); sprintf((char*)s,"LoadEE\n"); 800188e: 463b mov r3, r7 8001890: 498c ldr r1, [pc, #560] @ (8001ac4 ) 8001892: 4618 mov r0, r3 8001894: f00c fdbe bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8001898: 463b mov r3, r7 800189a: 4618 mov r0, r3 800189c: f7fe fc56 bl 800014c 80018a0: 4603 mov r3, r0 80018a2: b29a uxth r2, r3 80018a4: 4639 mov r1, r7 80018a6: f04f 33ff mov.w r3, #4294967295 80018aa: 4887 ldr r0, [pc, #540] @ (8001ac8 ) 80018ac: f007 ffc2 bl 8009834 sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch); 80018b0: 4b5e ldr r3, [pc, #376] @ (8001a2c ) 80018b2: 881b ldrh r3, [r3, #0] 80018b4: 469c mov ip, r3 80018b6: 4b5e ldr r3, [pc, #376] @ (8001a30 ) 80018b8: 881b ldrh r3, [r3, #0] 80018ba: 469e mov lr, r3 80018bc: 4b5d ldr r3, [pc, #372] @ (8001a34 ) 80018be: 881b ldrh r3, [r3, #0] 80018c0: 461a mov r2, r3 80018c2: 4b5d ldr r3, [pc, #372] @ (8001a38 ) 80018c4: 881b ldrh r3, [r3, #0] 80018c6: 4619 mov r1, r3 80018c8: 4b5c ldr r3, [pc, #368] @ (8001a3c ) 80018ca: 881b ldrh r3, [r3, #0] 80018cc: 461c mov r4, r3 80018ce: 4b5c ldr r3, [pc, #368] @ (8001a40 ) 80018d0: 881b ldrh r3, [r3, #0] 80018d2: 461d mov r5, r3 80018d4: 4b5b ldr r3, [pc, #364] @ (8001a44 ) 80018d6: 881b ldrh r3, [r3, #0] 80018d8: 461e mov r6, r3 80018da: 4b5b ldr r3, [pc, #364] @ (8001a48 ) 80018dc: 881b ldrh r3, [r3, #0] 80018de: 4638 mov r0, r7 80018e0: 9305 str r3, [sp, #20] 80018e2: 9604 str r6, [sp, #16] 80018e4: 9503 str r5, [sp, #12] 80018e6: 9402 str r4, [sp, #8] 80018e8: 9101 str r1, [sp, #4] 80018ea: 9200 str r2, [sp, #0] 80018ec: 4673 mov r3, lr 80018ee: 4662 mov r2, ip 80018f0: 4976 ldr r1, [pc, #472] @ (8001acc ) 80018f2: f00c fd8f bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 80018f6: 463b mov r3, r7 80018f8: 4618 mov r0, r3 80018fa: f7fe fc27 bl 800014c 80018fe: 4603 mov r3, r0 8001900: b29a uxth r2, r3 8001902: 4639 mov r1, r7 8001904: f04f 33ff mov.w r3, #4294967295 8001908: 486f ldr r0, [pc, #444] @ (8001ac8 ) 800190a: f007 ff93 bl 8009834 sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan); 800190e: 4b50 ldr r3, [pc, #320] @ (8001a50 ) 8001910: 881b ldrh r3, [r3, #0] 8001912: 4619 mov r1, r3 8001914: 4b4f ldr r3, [pc, #316] @ (8001a54 ) 8001916: 881b ldrh r3, [r3, #0] 8001918: 461c mov r4, r3 800191a: 4b4f ldr r3, [pc, #316] @ (8001a58 ) 800191c: 881b ldrh r3, [r3, #0] 800191e: 461a mov r2, r3 8001920: 4b4e ldr r3, [pc, #312] @ (8001a5c ) 8001922: 881b ldrh r3, [r3, #0] 8001924: 4638 mov r0, r7 8001926: 9301 str r3, [sp, #4] 8001928: 9200 str r2, [sp, #0] 800192a: 4623 mov r3, r4 800192c: 460a mov r2, r1 800192e: 4968 ldr r1, [pc, #416] @ (8001ad0 ) 8001930: f00c fd70 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8001934: 463b mov r3, r7 8001936: 4618 mov r0, r3 8001938: f7fe fc08 bl 800014c 800193c: 4603 mov r3, r0 800193e: b29a uxth r2, r3 8001940: 4639 mov r1, r7 8001942: f04f 33ff mov.w r3, #4294967295 8001946: 4860 ldr r0, [pc, #384] @ (8001ac8 ) 8001948: f007 ff74 bl 8009834 sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman); 800194c: 4b4b ldr r3, [pc, #300] @ (8001a7c ) 800194e: 881b ldrh r3, [r3, #0] 8001950: 461a mov r2, r3 8001952: 4b49 ldr r3, [pc, #292] @ (8001a78 ) 8001954: 881b ldrh r3, [r3, #0] 8001956: 4638 mov r0, r7 8001958: 495e ldr r1, [pc, #376] @ (8001ad4 ) 800195a: f00c fd5b bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 800195e: 463b mov r3, r7 8001960: 4618 mov r0, r3 8001962: f7fe fbf3 bl 800014c 8001966: 4603 mov r3, r0 8001968: b29a uxth r2, r3 800196a: 4639 mov r1, r7 800196c: f04f 33ff mov.w r3, #4294967295 8001970: 4855 ldr r0, [pc, #340] @ (8001ac8 ) 8001972: f007 ff5f bl 8009834 sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan); 8001976: 4b3c ldr r3, [pc, #240] @ (8001a68 ) 8001978: 881b ldrh r3, [r3, #0] 800197a: 4619 mov r1, r3 800197c: 4b3b ldr r3, [pc, #236] @ (8001a6c ) 800197e: 881b ldrh r3, [r3, #0] 8001980: 461c mov r4, r3 8001982: 4b3b ldr r3, [pc, #236] @ (8001a70 ) 8001984: 881b ldrh r3, [r3, #0] 8001986: 461a mov r2, r3 8001988: 4b3a ldr r3, [pc, #232] @ (8001a74 ) 800198a: 881b ldrh r3, [r3, #0] 800198c: 4638 mov r0, r7 800198e: 9301 str r3, [sp, #4] 8001990: 9200 str r2, [sp, #0] 8001992: 4623 mov r3, r4 8001994: 460a mov r2, r1 8001996: 4950 ldr r1, [pc, #320] @ (8001ad8 ) 8001998: f00c fd3c bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 800199c: 463b mov r3, r7 800199e: 4618 mov r0, r3 80019a0: f7fe fbd4 bl 800014c 80019a4: 4603 mov r3, r0 80019a6: b29a uxth r2, r3 80019a8: 4639 mov r1, r7 80019aa: f04f 33ff mov.w r3, #4294967295 80019ae: 4846 ldr r0, [pc, #280] @ (8001ac8 ) 80019b0: f007 ff40 bl 8009834 sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop); 80019b4: 4b32 ldr r3, [pc, #200] @ (8001a80 ) 80019b6: 881b ldrh r3, [r3, #0] 80019b8: 4619 mov r1, r3 80019ba: 4b32 ldr r3, [pc, #200] @ (8001a84 ) 80019bc: 881b ldrh r3, [r3, #0] 80019be: 461c mov r4, r3 80019c0: 4b37 ldr r3, [pc, #220] @ (8001aa0 ) 80019c2: 881b ldrh r3, [r3, #0] 80019c4: 461a mov r2, r3 80019c6: 4b37 ldr r3, [pc, #220] @ (8001aa4 ) 80019c8: 881b ldrh r3, [r3, #0] 80019ca: 4638 mov r0, r7 80019cc: 9301 str r3, [sp, #4] 80019ce: 9200 str r2, [sp, #0] 80019d0: 4623 mov r3, r4 80019d2: 460a mov r2, r1 80019d4: 4941 ldr r1, [pc, #260] @ (8001adc ) 80019d6: f00c fd1d bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 80019da: 463b mov r3, r7 80019dc: 4618 mov r0, r3 80019de: f7fe fbb5 bl 800014c 80019e2: 4603 mov r3, r0 80019e4: b29a uxth r2, r3 80019e6: 4639 mov r1, r7 80019e8: f04f 33ff mov.w r3, #4294967295 80019ec: 4836 ldr r0, [pc, #216] @ (8001ac8 ) 80019ee: f007 ff21 bl 8009834 sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop); 80019f2: 4b25 ldr r3, [pc, #148] @ (8001a88 ) 80019f4: 881b ldrh r3, [r3, #0] 80019f6: 4619 mov r1, r3 80019f8: 4b24 ldr r3, [pc, #144] @ (8001a8c ) 80019fa: 881b ldrh r3, [r3, #0] 80019fc: 461c mov r4, r3 80019fe: 4b2a ldr r3, [pc, #168] @ (8001aa8 ) 8001a00: 881b ldrh r3, [r3, #0] 8001a02: 461a mov r2, r3 8001a04: 4b29 ldr r3, [pc, #164] @ (8001aac ) 8001a06: 881b ldrh r3, [r3, #0] 8001a08: 4638 mov r0, r7 8001a0a: 9301 str r3, [sp, #4] 8001a0c: 9200 str r2, [sp, #0] 8001a0e: 4623 mov r3, r4 8001a10: 460a mov r2, r1 8001a12: 4933 ldr r1, [pc, #204] @ (8001ae0 ) 8001a14: f00c fcfe bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8001a18: 463b mov r3, r7 8001a1a: 4618 mov r0, r3 8001a1c: f7fe fb96 bl 800014c 8001a20: 4603 mov r3, r0 8001a22: b29a uxth r2, r3 8001a24: 4639 mov r1, r7 8001a26: f04f 33ff mov.w r3, #4294967295 8001a2a: e05b b.n 8001ae4 8001a2c: 20000400 .word 0x20000400 8001a30: 20000402 .word 0x20000402 8001a34: 20000404 .word 0x20000404 8001a38: 20000406 .word 0x20000406 8001a3c: 20000408 .word 0x20000408 8001a40: 2000040a .word 0x2000040a 8001a44: 2000040c .word 0x2000040c 8001a48: 2000040e .word 0x2000040e 8001a4c: 2000044c .word 0x2000044c 8001a50: 20000410 .word 0x20000410 8001a54: 20000412 .word 0x20000412 8001a58: 20000414 .word 0x20000414 8001a5c: 20000416 .word 0x20000416 8001a60: 2000041c .word 0x2000041c 8001a64: 2000041a .word 0x2000041a 8001a68: 20000420 .word 0x20000420 8001a6c: 20000422 .word 0x20000422 8001a70: 20000424 .word 0x20000424 8001a74: 20000426 .word 0x20000426 8001a78: 2000041e .word 0x2000041e 8001a7c: 20000418 .word 0x20000418 8001a80: 20000428 .word 0x20000428 8001a84: 2000042a .word 0x2000042a 8001a88: 2000042c .word 0x2000042c 8001a8c: 2000042e .word 0x2000042e 8001a90: 20000430 .word 0x20000430 8001a94: 20000432 .word 0x20000432 8001a98: 20000434 .word 0x20000434 8001a9c: 20000436 .word 0x20000436 8001aa0: 20000438 .word 0x20000438 8001aa4: 2000043a .word 0x2000043a 8001aa8: 2000043c .word 0x2000043c 8001aac: 2000043e .word 0x2000043e 8001ab0: 20000440 .word 0x20000440 8001ab4: 20000442 .word 0x20000442 8001ab8: 20000444 .word 0x20000444 8001abc: 20000446 .word 0x20000446 8001ac0: 20000448 .word 0x20000448 8001ac4: 0800f1ac .word 0x0800f1ac 8001ac8: 200003a8 .word 0x200003a8 8001acc: 0800f1b4 .word 0x0800f1b4 8001ad0: 0800f210 .word 0x0800f210 8001ad4: 0800f254 .word 0x0800f254 8001ad8: 0800f26c .word 0x0800f26c 8001adc: 0800f2a0 .word 0x0800f2a0 8001ae0: 0800f2d4 .word 0x0800f2d4 8001ae4: 4822 ldr r0, [pc, #136] @ (8001b70 ) 8001ae6: f007 fea5 bl 8009834 sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop); 8001aea: 4b22 ldr r3, [pc, #136] @ (8001b74 ) 8001aec: 881b ldrh r3, [r3, #0] 8001aee: 4619 mov r1, r3 8001af0: 4b21 ldr r3, [pc, #132] @ (8001b78 ) 8001af2: 881b ldrh r3, [r3, #0] 8001af4: 461c mov r4, r3 8001af6: 4b21 ldr r3, [pc, #132] @ (8001b7c ) 8001af8: 881b ldrh r3, [r3, #0] 8001afa: 461a mov r2, r3 8001afc: 4b20 ldr r3, [pc, #128] @ (8001b80 ) 8001afe: 881b ldrh r3, [r3, #0] 8001b00: 4638 mov r0, r7 8001b02: 9301 str r3, [sp, #4] 8001b04: 9200 str r2, [sp, #0] 8001b06: 4623 mov r3, r4 8001b08: 460a mov r2, r1 8001b0a: 491e ldr r1, [pc, #120] @ (8001b84 ) 8001b0c: f00c fc82 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8001b10: 463b mov r3, r7 8001b12: 4618 mov r0, r3 8001b14: f7fe fb1a bl 800014c 8001b18: 4603 mov r3, r0 8001b1a: b29a uxth r2, r3 8001b1c: 4639 mov r1, r7 8001b1e: f04f 33ff mov.w r3, #4294967295 8001b22: 4813 ldr r0, [pc, #76] @ (8001b70 ) 8001b24: f007 fe86 bl 8009834 sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop); 8001b28: 4b17 ldr r3, [pc, #92] @ (8001b88 ) 8001b2a: 881b ldrh r3, [r3, #0] 8001b2c: 4619 mov r1, r3 8001b2e: 4b17 ldr r3, [pc, #92] @ (8001b8c ) 8001b30: 881b ldrh r3, [r3, #0] 8001b32: 461c mov r4, r3 8001b34: 4b16 ldr r3, [pc, #88] @ (8001b90 ) 8001b36: 881b ldrh r3, [r3, #0] 8001b38: 461a mov r2, r3 8001b3a: 4b16 ldr r3, [pc, #88] @ (8001b94 ) 8001b3c: 881b ldrh r3, [r3, #0] 8001b3e: 4638 mov r0, r7 8001b40: 9301 str r3, [sp, #4] 8001b42: 9200 str r2, [sp, #0] 8001b44: 4623 mov r3, r4 8001b46: 460a mov r2, r1 8001b48: 4913 ldr r1, [pc, #76] @ (8001b98 ) 8001b4a: f00c fc63 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8001b4e: 463b mov r3, r7 8001b50: 4618 mov r0, r3 8001b52: f7fe fafb bl 800014c 8001b56: 4603 mov r3, r0 8001b58: b29a uxth r2, r3 8001b5a: 4639 mov r1, r7 8001b5c: f04f 33ff mov.w r3, #4294967295 8001b60: 4803 ldr r0, [pc, #12] @ (8001b70 ) 8001b62: f007 fe67 bl 8009834 } 8001b66: bf00 nop 8001b68: 37cc adds r7, #204 @ 0xcc 8001b6a: 46bd mov sp, r7 8001b6c: bdf0 pop {r4, r5, r6, r7, pc} 8001b6e: bf00 nop 8001b70: 200003a8 .word 0x200003a8 8001b74: 20000430 .word 0x20000430 8001b78: 20000432 .word 0x20000432 8001b7c: 20000440 .word 0x20000440 8001b80: 20000442 .word 0x20000442 8001b84: 0800f308 .word 0x0800f308 8001b88: 20000434 .word 0x20000434 8001b8c: 20000436 .word 0x20000436 8001b90: 20000444 .word 0x20000444 8001b94: 20000446 .word 0x20000446 8001b98: 0800f33c .word 0x0800f33c 08001b9c : /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_SYSTICK_Callback(void) { 8001b9c: b580 push {r7, lr} 8001b9e: b082 sub sp, #8 8001ba0: af00 add r7, sp, #0 static uint8_t c1s = 0; static uint8_t inidx = 0; static uint8_t inbuf[4]; uint8_t i; if (++c10ms >= 10) { // 10 ms 8001ba2: 4b7c ldr r3, [pc, #496] @ (8001d94 ) 8001ba4: 781b ldrb r3, [r3, #0] 8001ba6: 3301 adds r3, #1 8001ba8: b2da uxtb r2, r3 8001baa: 4b7a ldr r3, [pc, #488] @ (8001d94 ) 8001bac: 701a strb r2, [r3, #0] 8001bae: 4b79 ldr r3, [pc, #484] @ (8001d94 ) 8001bb0: 781b ldrb r3, [r3, #0] 8001bb2: 2b09 cmp r3, #9 8001bb4: f240 81e7 bls.w 8001f86 c10ms = 0; 8001bb8: 4b76 ldr r3, [pc, #472] @ (8001d94 ) 8001bba: 2200 movs r2, #0 8001bbc: 701a strb r2, [r3, #0] if (rtP1) 8001bbe: 4b76 ldr r3, [pc, #472] @ (8001d98 ) 8001bc0: 781b ldrb r3, [r3, #0] 8001bc2: b2db uxtb r3, r3 8001bc4: 2b00 cmp r3, #0 8001bc6: d006 beq.n 8001bd6 rtP1--; 8001bc8: 4b73 ldr r3, [pc, #460] @ (8001d98 ) 8001bca: 781b ldrb r3, [r3, #0] 8001bcc: b2db uxtb r3, r3 8001bce: 3b01 subs r3, #1 8001bd0: b2da uxtb r2, r3 8001bd2: 4b71 ldr r3, [pc, #452] @ (8001d98 ) 8001bd4: 701a strb r2, [r3, #0] if (rtP2) 8001bd6: 4b71 ldr r3, [pc, #452] @ (8001d9c ) 8001bd8: 781b ldrb r3, [r3, #0] 8001bda: b2db uxtb r3, r3 8001bdc: 2b00 cmp r3, #0 8001bde: d006 beq.n 8001bee rtP2--; 8001be0: 4b6e ldr r3, [pc, #440] @ (8001d9c ) 8001be2: 781b ldrb r3, [r3, #0] 8001be4: b2db uxtb r3, r3 8001be6: 3b01 subs r3, #1 8001be8: b2da uxtb r2, r3 8001bea: 4b6c ldr r3, [pc, #432] @ (8001d9c ) 8001bec: 701a strb r2, [r3, #0] if (rtTLC) 8001bee: 4b6c ldr r3, [pc, #432] @ (8001da0 ) 8001bf0: 781b ldrb r3, [r3, #0] 8001bf2: b2db uxtb r3, r3 8001bf4: 2b00 cmp r3, #0 8001bf6: d006 beq.n 8001c06 rtTLC--; 8001bf8: 4b69 ldr r3, [pc, #420] @ (8001da0 ) 8001bfa: 781b ldrb r3, [r3, #0] 8001bfc: b2db uxtb r3, r3 8001bfe: 3b01 subs r3, #1 8001c00: b2da uxtb r2, r3 8001c02: 4b67 ldr r3, [pc, #412] @ (8001da0 ) 8001c04: 701a strb r2, [r3, #0] //**** legge i tasti******************************************************************************** inidx++; 8001c06: 4b67 ldr r3, [pc, #412] @ (8001da4 ) 8001c08: 781b ldrb r3, [r3, #0] 8001c0a: 3301 adds r3, #1 8001c0c: b2da uxtb r2, r3 8001c0e: 4b65 ldr r3, [pc, #404] @ (8001da4 ) 8001c10: 701a strb r2, [r3, #0] inidx &= 0x03; 8001c12: 4b64 ldr r3, [pc, #400] @ (8001da4 ) 8001c14: 781b ldrb r3, [r3, #0] 8001c16: f003 0303 and.w r3, r3, #3 8001c1a: b2da uxtb r2, r3 8001c1c: 4b61 ldr r3, [pc, #388] @ (8001da4 ) 8001c1e: 701a strb r2, [r3, #0] if (HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin) == GPIO_PIN_RESET) 8001c20: f44f 4180 mov.w r1, #16384 @ 0x4000 8001c24: 4860 ldr r0, [pc, #384] @ (8001da8 ) 8001c26: f004 fcef bl 8006608 8001c2a: 4603 mov r3, r0 8001c2c: 2b00 cmp r3, #0 8001c2e: d10c bne.n 8001c4a inbuf[inidx] |= INP1; 8001c30: 4b5c ldr r3, [pc, #368] @ (8001da4 ) 8001c32: 781b ldrb r3, [r3, #0] 8001c34: 461a mov r2, r3 8001c36: 4b5d ldr r3, [pc, #372] @ (8001dac ) 8001c38: 5c9b ldrb r3, [r3, r2] 8001c3a: 4a5a ldr r2, [pc, #360] @ (8001da4 ) 8001c3c: 7812 ldrb r2, [r2, #0] 8001c3e: f043 0301 orr.w r3, r3, #1 8001c42: b2d9 uxtb r1, r3 8001c44: 4b59 ldr r3, [pc, #356] @ (8001dac ) 8001c46: 5499 strb r1, [r3, r2] 8001c48: e00b b.n 8001c62 else inbuf[inidx] &= (~INP1); 8001c4a: 4b56 ldr r3, [pc, #344] @ (8001da4 ) 8001c4c: 781b ldrb r3, [r3, #0] 8001c4e: 461a mov r2, r3 8001c50: 4b56 ldr r3, [pc, #344] @ (8001dac ) 8001c52: 5c9b ldrb r3, [r3, r2] 8001c54: 4a53 ldr r2, [pc, #332] @ (8001da4 ) 8001c56: 7812 ldrb r2, [r2, #0] 8001c58: f023 0301 bic.w r3, r3, #1 8001c5c: b2d9 uxtb r1, r3 8001c5e: 4b53 ldr r3, [pc, #332] @ (8001dac ) 8001c60: 5499 strb r1, [r3, r2] if (HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin) == GPIO_PIN_RESET) 8001c62: f44f 4100 mov.w r1, #32768 @ 0x8000 8001c66: 4850 ldr r0, [pc, #320] @ (8001da8 ) 8001c68: f004 fcce bl 8006608 8001c6c: 4603 mov r3, r0 8001c6e: 2b00 cmp r3, #0 8001c70: d10c bne.n 8001c8c inbuf[inidx] |= INP2; 8001c72: 4b4c ldr r3, [pc, #304] @ (8001da4 ) 8001c74: 781b ldrb r3, [r3, #0] 8001c76: 461a mov r2, r3 8001c78: 4b4c ldr r3, [pc, #304] @ (8001dac ) 8001c7a: 5c9b ldrb r3, [r3, r2] 8001c7c: 4a49 ldr r2, [pc, #292] @ (8001da4 ) 8001c7e: 7812 ldrb r2, [r2, #0] 8001c80: f043 0302 orr.w r3, r3, #2 8001c84: b2d9 uxtb r1, r3 8001c86: 4b49 ldr r3, [pc, #292] @ (8001dac ) 8001c88: 5499 strb r1, [r3, r2] 8001c8a: e00b b.n 8001ca4 else inbuf[inidx] &= (~INP2); 8001c8c: 4b45 ldr r3, [pc, #276] @ (8001da4 ) 8001c8e: 781b ldrb r3, [r3, #0] 8001c90: 461a mov r2, r3 8001c92: 4b46 ldr r3, [pc, #280] @ (8001dac ) 8001c94: 5c9b ldrb r3, [r3, r2] 8001c96: 4a43 ldr r2, [pc, #268] @ (8001da4 ) 8001c98: 7812 ldrb r2, [r2, #0] 8001c9a: f023 0302 bic.w r3, r3, #2 8001c9e: b2d9 uxtb r1, r3 8001ca0: 4b42 ldr r3, [pc, #264] @ (8001dac ) 8001ca2: 5499 strb r1, [r3, r2] if (HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin) == GPIO_PIN_RESET) 8001ca4: f44f 5180 mov.w r1, #4096 @ 0x1000 8001ca8: 4841 ldr r0, [pc, #260] @ (8001db0 ) 8001caa: f004 fcad bl 8006608 8001cae: 4603 mov r3, r0 8001cb0: 2b00 cmp r3, #0 8001cb2: d10c bne.n 8001cce inbuf[inidx] |= INCH1; 8001cb4: 4b3b ldr r3, [pc, #236] @ (8001da4 ) 8001cb6: 781b ldrb r3, [r3, #0] 8001cb8: 461a mov r2, r3 8001cba: 4b3c ldr r3, [pc, #240] @ (8001dac ) 8001cbc: 5c9b ldrb r3, [r3, r2] 8001cbe: 4a39 ldr r2, [pc, #228] @ (8001da4 ) 8001cc0: 7812 ldrb r2, [r2, #0] 8001cc2: f043 0304 orr.w r3, r3, #4 8001cc6: b2d9 uxtb r1, r3 8001cc8: 4b38 ldr r3, [pc, #224] @ (8001dac ) 8001cca: 5499 strb r1, [r3, r2] 8001ccc: e00b b.n 8001ce6 else inbuf[inidx] &= (~INCH1); 8001cce: 4b35 ldr r3, [pc, #212] @ (8001da4 ) 8001cd0: 781b ldrb r3, [r3, #0] 8001cd2: 461a mov r2, r3 8001cd4: 4b35 ldr r3, [pc, #212] @ (8001dac ) 8001cd6: 5c9b ldrb r3, [r3, r2] 8001cd8: 4a32 ldr r2, [pc, #200] @ (8001da4 ) 8001cda: 7812 ldrb r2, [r2, #0] 8001cdc: f023 0304 bic.w r3, r3, #4 8001ce0: b2d9 uxtb r1, r3 8001ce2: 4b32 ldr r3, [pc, #200] @ (8001dac ) 8001ce4: 5499 strb r1, [r3, r2] if (HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin) == GPIO_PIN_RESET) 8001ce6: f44f 5100 mov.w r1, #8192 @ 0x2000 8001cea: 4831 ldr r0, [pc, #196] @ (8001db0 ) 8001cec: f004 fc8c bl 8006608 8001cf0: 4603 mov r3, r0 8001cf2: 2b00 cmp r3, #0 8001cf4: d10c bne.n 8001d10 inbuf[inidx] |= INCH2; 8001cf6: 4b2b ldr r3, [pc, #172] @ (8001da4 ) 8001cf8: 781b ldrb r3, [r3, #0] 8001cfa: 461a mov r2, r3 8001cfc: 4b2b ldr r3, [pc, #172] @ (8001dac ) 8001cfe: 5c9b ldrb r3, [r3, r2] 8001d00: 4a28 ldr r2, [pc, #160] @ (8001da4 ) 8001d02: 7812 ldrb r2, [r2, #0] 8001d04: f043 0308 orr.w r3, r3, #8 8001d08: b2d9 uxtb r1, r3 8001d0a: 4b28 ldr r3, [pc, #160] @ (8001dac ) 8001d0c: 5499 strb r1, [r3, r2] 8001d0e: e00b b.n 8001d28 else inbuf[inidx] &= (~INCH2); 8001d10: 4b24 ldr r3, [pc, #144] @ (8001da4 ) 8001d12: 781b ldrb r3, [r3, #0] 8001d14: 461a mov r2, r3 8001d16: 4b25 ldr r3, [pc, #148] @ (8001dac ) 8001d18: 5c9b ldrb r3, [r3, r2] 8001d1a: 4a22 ldr r2, [pc, #136] @ (8001da4 ) 8001d1c: 7812 ldrb r2, [r2, #0] 8001d1e: f023 0308 bic.w r3, r3, #8 8001d22: b2d9 uxtb r1, r3 8001d24: 4b21 ldr r3, [pc, #132] @ (8001dac ) 8001d26: 5499 strb r1, [r3, r2] if (HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin) == GPIO_PIN_RESET) 8001d28: f44f 4180 mov.w r1, #16384 @ 0x4000 8001d2c: 4820 ldr r0, [pc, #128] @ (8001db0 ) 8001d2e: f004 fc6b bl 8006608 8001d32: 4603 mov r3, r0 8001d34: 2b00 cmp r3, #0 8001d36: d10c bne.n 8001d52 inbuf[inidx] |= INCH3; 8001d38: 4b1a ldr r3, [pc, #104] @ (8001da4 ) 8001d3a: 781b ldrb r3, [r3, #0] 8001d3c: 461a mov r2, r3 8001d3e: 4b1b ldr r3, [pc, #108] @ (8001dac ) 8001d40: 5c9b ldrb r3, [r3, r2] 8001d42: 4a18 ldr r2, [pc, #96] @ (8001da4 ) 8001d44: 7812 ldrb r2, [r2, #0] 8001d46: f043 0310 orr.w r3, r3, #16 8001d4a: b2d9 uxtb r1, r3 8001d4c: 4b17 ldr r3, [pc, #92] @ (8001dac ) 8001d4e: 5499 strb r1, [r3, r2] 8001d50: e00b b.n 8001d6a else inbuf[inidx] &= (~INCH3); 8001d52: 4b14 ldr r3, [pc, #80] @ (8001da4 ) 8001d54: 781b ldrb r3, [r3, #0] 8001d56: 461a mov r2, r3 8001d58: 4b14 ldr r3, [pc, #80] @ (8001dac ) 8001d5a: 5c9b ldrb r3, [r3, r2] 8001d5c: 4a11 ldr r2, [pc, #68] @ (8001da4 ) 8001d5e: 7812 ldrb r2, [r2, #0] 8001d60: f023 0310 bic.w r3, r3, #16 8001d64: b2d9 uxtb r1, r3 8001d66: 4b11 ldr r3, [pc, #68] @ (8001dac ) 8001d68: 5499 strb r1, [r3, r2] if (HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin) == GPIO_PIN_RESET) 8001d6a: f44f 4100 mov.w r1, #32768 @ 0x8000 8001d6e: 4810 ldr r0, [pc, #64] @ (8001db0 ) 8001d70: f004 fc4a bl 8006608 8001d74: 4603 mov r3, r0 8001d76: 2b00 cmp r3, #0 8001d78: d11c bne.n 8001db4 inbuf[inidx] |= INCH4; 8001d7a: 4b0a ldr r3, [pc, #40] @ (8001da4 ) 8001d7c: 781b ldrb r3, [r3, #0] 8001d7e: 461a mov r2, r3 8001d80: 4b0a ldr r3, [pc, #40] @ (8001dac ) 8001d82: 5c9b ldrb r3, [r3, r2] 8001d84: 4a07 ldr r2, [pc, #28] @ (8001da4 ) 8001d86: 7812 ldrb r2, [r2, #0] 8001d88: f043 0320 orr.w r3, r3, #32 8001d8c: b2d9 uxtb r1, r3 8001d8e: 4b07 ldr r3, [pc, #28] @ (8001dac ) 8001d90: 5499 strb r1, [r3, r2] 8001d92: e01b b.n 8001dcc 8001d94: 2000045a .word 0x2000045a 8001d98: 20000004 .word 0x20000004 8001d9c: 20000005 .word 0x20000005 8001da0: 20000006 .word 0x20000006 8001da4: 2000045b .word 0x2000045b 8001da8: 40011000 .word 0x40011000 8001dac: 2000045c .word 0x2000045c 8001db0: 40010c00 .word 0x40010c00 else inbuf[inidx] &= (~INCH4); 8001db4: 4b76 ldr r3, [pc, #472] @ (8001f90 ) 8001db6: 781b ldrb r3, [r3, #0] 8001db8: 461a mov r2, r3 8001dba: 4b76 ldr r3, [pc, #472] @ (8001f94 ) 8001dbc: 5c9b ldrb r3, [r3, r2] 8001dbe: 4a74 ldr r2, [pc, #464] @ (8001f90 ) 8001dc0: 7812 ldrb r2, [r2, #0] 8001dc2: f023 0320 bic.w r3, r3, #32 8001dc6: b2d9 uxtb r1, r3 8001dc8: 4b72 ldr r3, [pc, #456] @ (8001f94 ) 8001dca: 5499 strb r1, [r3, r2] pulsanti |= (inbuf[0] & inbuf[1] & inbuf[2] & inbuf[3]); 8001dcc: 4b71 ldr r3, [pc, #452] @ (8001f94 ) 8001dce: 781a ldrb r2, [r3, #0] 8001dd0: 4b70 ldr r3, [pc, #448] @ (8001f94 ) 8001dd2: 785b ldrb r3, [r3, #1] 8001dd4: 4013 ands r3, r2 8001dd6: b2da uxtb r2, r3 8001dd8: 4b6e ldr r3, [pc, #440] @ (8001f94 ) 8001dda: 789b ldrb r3, [r3, #2] 8001ddc: 4013 ands r3, r2 8001dde: b2da uxtb r2, r3 8001de0: 4b6c ldr r3, [pc, #432] @ (8001f94 ) 8001de2: 78db ldrb r3, [r3, #3] 8001de4: 4013 ands r3, r2 8001de6: b2da uxtb r2, r3 8001de8: 4b6b ldr r3, [pc, #428] @ (8001f98 ) 8001dea: 781b ldrb r3, [r3, #0] 8001dec: 4313 orrs r3, r2 8001dee: b2da uxtb r2, r3 8001df0: 4b69 ldr r3, [pc, #420] @ (8001f98 ) 8001df2: 701a strb r2, [r3, #0] pulsanti &= (inbuf[0] | inbuf[1] | inbuf[2] | inbuf[3]); 8001df4: 4b67 ldr r3, [pc, #412] @ (8001f94 ) 8001df6: 781a ldrb r2, [r3, #0] 8001df8: 4b66 ldr r3, [pc, #408] @ (8001f94 ) 8001dfa: 785b ldrb r3, [r3, #1] 8001dfc: 4313 orrs r3, r2 8001dfe: b2da uxtb r2, r3 8001e00: 4b64 ldr r3, [pc, #400] @ (8001f94 ) 8001e02: 789b ldrb r3, [r3, #2] 8001e04: 4313 orrs r3, r2 8001e06: b2da uxtb r2, r3 8001e08: 4b62 ldr r3, [pc, #392] @ (8001f94 ) 8001e0a: 78db ldrb r3, [r3, #3] 8001e0c: 4313 orrs r3, r2 8001e0e: b2da uxtb r2, r3 8001e10: 4b61 ldr r3, [pc, #388] @ (8001f98 ) 8001e12: 781b ldrb r3, [r3, #0] 8001e14: 4013 ands r3, r2 8001e16: b2da uxtb r2, r3 8001e18: 4b5f ldr r3, [pc, #380] @ (8001f98 ) 8001e1a: 701a strb r2, [r3, #0] //**** legge adc *********************************************************************************** readAdc(); 8001e1c: f7fe f9d4 bl 80001c8 if (++c100ms >= 10) { // 10 ms 8001e20: 4b5e ldr r3, [pc, #376] @ (8001f9c ) 8001e22: 781b ldrb r3, [r3, #0] 8001e24: 3301 adds r3, #1 8001e26: b2da uxtb r2, r3 8001e28: 4b5c ldr r3, [pc, #368] @ (8001f9c ) 8001e2a: 701a strb r2, [r3, #0] 8001e2c: 4b5b ldr r3, [pc, #364] @ (8001f9c ) 8001e2e: 781b ldrb r3, [r3, #0] 8001e30: 2b09 cmp r3, #9 8001e32: f240 80a8 bls.w 8001f86 c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop 8001e36: 4b59 ldr r3, [pc, #356] @ (8001f9c ) 8001e38: 2200 movs r2, #0 8001e3a: 701a strb r2, [r3, #0] for (i = 0; i < 4; i++) { 8001e3c: 2300 movs r3, #0 8001e3e: 71fb strb r3, [r7, #7] 8001e40: e013 b.n 8001e6a if (rtramp[i]) 8001e42: 79fb ldrb r3, [r7, #7] 8001e44: 4a56 ldr r2, [pc, #344] @ (8001fa0 ) 8001e46: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 8001e4a: b29b uxth r3, r3 8001e4c: 2b00 cmp r3, #0 8001e4e: d009 beq.n 8001e64 rtramp[i]--; 8001e50: 79fb ldrb r3, [r7, #7] 8001e52: 4a53 ldr r2, [pc, #332] @ (8001fa0 ) 8001e54: f832 2013 ldrh.w r2, [r2, r3, lsl #1] 8001e58: b292 uxth r2, r2 8001e5a: 3a01 subs r2, #1 8001e5c: b291 uxth r1, r2 8001e5e: 4a50 ldr r2, [pc, #320] @ (8001fa0 ) 8001e60: f822 1013 strh.w r1, [r2, r3, lsl #1] for (i = 0; i < 4; i++) { 8001e64: 79fb ldrb r3, [r7, #7] 8001e66: 3301 adds r3, #1 8001e68: 71fb strb r3, [r7, #7] 8001e6a: 79fb ldrb r3, [r7, #7] 8001e6c: 2b03 cmp r3, #3 8001e6e: d9e8 bls.n 8001e42 } if (rtCiclo < 0xffff)rtCiclo++; 8001e70: 4b4c ldr r3, [pc, #304] @ (8001fa4 ) 8001e72: 881b ldrh r3, [r3, #0] 8001e74: b29b uxth r3, r3 8001e76: f64f 72ff movw r2, #65535 @ 0xffff 8001e7a: 4293 cmp r3, r2 8001e7c: d006 beq.n 8001e8c 8001e7e: 4b49 ldr r3, [pc, #292] @ (8001fa4 ) 8001e80: 881b ldrh r3, [r3, #0] 8001e82: b29b uxth r3, r3 8001e84: 3301 adds r3, #1 8001e86: b29a uxth r2, r3 8001e88: 4b46 ldr r3, [pc, #280] @ (8001fa4 ) 8001e8a: 801a strh r2, [r3, #0] if (rtAnem)rtAnem--; 8001e8c: 4b46 ldr r3, [pc, #280] @ (8001fa8 ) 8001e8e: 881b ldrh r3, [r3, #0] 8001e90: b29b uxth r3, r3 8001e92: 2b00 cmp r3, #0 8001e94: d006 beq.n 8001ea4 8001e96: 4b44 ldr r3, [pc, #272] @ (8001fa8 ) 8001e98: 881b ldrh r3, [r3, #0] 8001e9a: b29b uxth r3, r3 8001e9c: 3b01 subs r3, #1 8001e9e: b29a uxth r2, r3 8001ea0: 4b41 ldr r3, [pc, #260] @ (8001fa8 ) 8001ea2: 801a strh r2, [r3, #0] //**** gestione buzzer ***************************************************************************** if (stBuz == bzmoving) { 8001ea4: 4b41 ldr r3, [pc, #260] @ (8001fac ) 8001ea6: 781b ldrb r3, [r3, #0] 8001ea8: b2db uxtb r3, r3 8001eaa: 2b01 cmp r3, #1 8001eac: d127 bne.n 8001efe if (nobuz) { 8001eae: 4b40 ldr r3, [pc, #256] @ (8001fb0 ) 8001eb0: 781b ldrb r3, [r3, #0] 8001eb2: 2b00 cmp r3, #0 8001eb4: d011 beq.n 8001eda if (c1s >= 5) 8001eb6: 4b3f ldr r3, [pc, #252] @ (8001fb4 ) 8001eb8: 781b ldrb r3, [r3, #0] 8001eba: 2b04 cmp r3, #4 8001ebc: d906 bls.n 8001ecc HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, 8001ebe: 2200 movs r2, #0 8001ec0: f44f 5100 mov.w r1, #8192 @ 0x2000 8001ec4: 483c ldr r0, [pc, #240] @ (8001fb8 ) 8001ec6: f004 fbb6 bl 8006636 8001eca: e04f b.n 8001f6c GPIO_PIN_RESET); else HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, 8001ecc: 2201 movs r2, #1 8001ece: f44f 5100 mov.w r1, #8192 @ 0x2000 8001ed2: 4839 ldr r0, [pc, #228] @ (8001fb8 ) 8001ed4: f004 fbaf bl 8006636 8001ed8: e048 b.n 8001f6c GPIO_PIN_SET); } else { if (c1s >= 5) 8001eda: 4b36 ldr r3, [pc, #216] @ (8001fb4 ) 8001edc: 781b ldrb r3, [r3, #0] 8001ede: 2b04 cmp r3, #4 8001ee0: d906 bls.n 8001ef0 HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET); 8001ee2: 2200 movs r2, #0 8001ee4: f44f 7180 mov.w r1, #256 @ 0x100 8001ee8: 4834 ldr r0, [pc, #208] @ (8001fbc ) 8001eea: f004 fba4 bl 8006636 8001eee: e03d b.n 8001f6c else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET); 8001ef0: 2201 movs r2, #1 8001ef2: f44f 7180 mov.w r1, #256 @ 0x100 8001ef6: 4831 ldr r0, [pc, #196] @ (8001fbc ) 8001ef8: f004 fb9d bl 8006636 8001efc: e036 b.n 8001f6c } } else if (stBuz == bzwarning) { 8001efe: 4b2b ldr r3, [pc, #172] @ (8001fac ) 8001f00: 781b ldrb r3, [r3, #0] 8001f02: b2db uxtb r3, r3 8001f04: 2b02 cmp r3, #2 8001f06: d12b bne.n 8001f60 if (nobuz) { 8001f08: 4b29 ldr r3, [pc, #164] @ (8001fb0 ) 8001f0a: 781b ldrb r3, [r3, #0] 8001f0c: 2b00 cmp r3, #0 8001f0e: d013 beq.n 8001f38 if (c1s & 1) 8001f10: 4b28 ldr r3, [pc, #160] @ (8001fb4 ) 8001f12: 781b ldrb r3, [r3, #0] 8001f14: f003 0301 and.w r3, r3, #1 8001f18: 2b00 cmp r3, #0 8001f1a: d006 beq.n 8001f2a HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, 8001f1c: 2200 movs r2, #0 8001f1e: f44f 5100 mov.w r1, #8192 @ 0x2000 8001f22: 4825 ldr r0, [pc, #148] @ (8001fb8 ) 8001f24: f004 fb87 bl 8006636 8001f28: e020 b.n 8001f6c GPIO_PIN_RESET); else HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, 8001f2a: 2201 movs r2, #1 8001f2c: f44f 5100 mov.w r1, #8192 @ 0x2000 8001f30: 4821 ldr r0, [pc, #132] @ (8001fb8 ) 8001f32: f004 fb80 bl 8006636 8001f36: e019 b.n 8001f6c GPIO_PIN_SET); } else { if (c1s & 1) 8001f38: 4b1e ldr r3, [pc, #120] @ (8001fb4 ) 8001f3a: 781b ldrb r3, [r3, #0] 8001f3c: f003 0301 and.w r3, r3, #1 8001f40: 2b00 cmp r3, #0 8001f42: d006 beq.n 8001f52 HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET); 8001f44: 2200 movs r2, #0 8001f46: f44f 7180 mov.w r1, #256 @ 0x100 8001f4a: 481c ldr r0, [pc, #112] @ (8001fbc ) 8001f4c: f004 fb73 bl 8006636 8001f50: e00c b.n 8001f6c else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET); 8001f52: 2201 movs r2, #1 8001f54: f44f 7180 mov.w r1, #256 @ 0x100 8001f58: 4818 ldr r0, [pc, #96] @ (8001fbc ) 8001f5a: f004 fb6c bl 8006636 8001f5e: e005 b.n 8001f6c } } else { //bzoff HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET); 8001f60: 2200 movs r2, #0 8001f62: f44f 7180 mov.w r1, #256 @ 0x100 8001f66: 4815 ldr r0, [pc, #84] @ (8001fbc ) 8001f68: f004 fb65 bl 8006636 } //************************************************************************************************** if (++c1s >= 10) { // 1 s 8001f6c: 4b11 ldr r3, [pc, #68] @ (8001fb4 ) 8001f6e: 781b ldrb r3, [r3, #0] 8001f70: 3301 adds r3, #1 8001f72: b2da uxtb r2, r3 8001f74: 4b0f ldr r3, [pc, #60] @ (8001fb4 ) 8001f76: 701a strb r2, [r3, #0] 8001f78: 4b0e ldr r3, [pc, #56] @ (8001fb4 ) 8001f7a: 781b ldrb r3, [r3, #0] 8001f7c: 2b09 cmp r3, #9 8001f7e: d902 bls.n 8001f86 c1s = 0; 8001f80: 4b0c ldr r3, [pc, #48] @ (8001fb4 ) 8001f82: 2200 movs r2, #0 8001f84: 701a strb r2, [r3, #0] //HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin); } } } } 8001f86: bf00 nop 8001f88: 3708 adds r7, #8 8001f8a: 46bd mov sp, r7 8001f8c: bd80 pop {r7, pc} 8001f8e: bf00 nop 8001f90: 2000045b .word 0x2000045b 8001f94: 2000045c .word 0x2000045c 8001f98: 200003f0 .word 0x200003f0 8001f9c: 20000460 .word 0x20000460 8001fa0: 200003f4 .word 0x200003f4 8001fa4: 200003fc .word 0x200003fc 8001fa8: 200003fe .word 0x200003fe 8001fac: 20000457 .word 0x20000457 8001fb0: 20000458 .word 0x20000458 8001fb4: 20000461 .word 0x20000461 8001fb8: 40011000 .word 0x40011000 8001fbc: 40010800 .word 0x40010800 08001fc0 : void managePulsanti(void) { 8001fc0: b580 push {r7, lr} 8001fc2: af00 add r7, sp, #0 if (pulsanti & INP1) { 8001fc4: 4bac ldr r3, [pc, #688] @ (8002278 ) 8001fc6: 781b ldrb r3, [r3, #0] 8001fc8: f003 0301 and.w r3, r3, #1 8001fcc: 2b00 cmp r3, #0 8001fce: d013 beq.n 8001ff8 if (rtP1 == 0) 8001fd0: 4baa ldr r3, [pc, #680] @ (800227c ) 8001fd2: 781b ldrb r3, [r3, #0] 8001fd4: b2db uxtb r3, r3 8001fd6: 2b00 cmp r3, #0 8001fd8: d107 bne.n 8001fea stPulsanti |= P1START; 8001fda: 4ba9 ldr r3, [pc, #676] @ (8002280 ) 8001fdc: 881b ldrh r3, [r3, #0] 8001fde: f043 0301 orr.w r3, r3, #1 8001fe2: b29a uxth r2, r3 8001fe4: 4ba6 ldr r3, [pc, #664] @ (8002280 ) 8001fe6: 801a strh r2, [r3, #0] 8001fe8: e036 b.n 8002058 else { HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET); 8001fea: 2201 movs r2, #1 8001fec: f44f 5100 mov.w r1, #8192 @ 0x2000 8001ff0: 48a4 ldr r0, [pc, #656] @ (8002284 ) 8001ff2: f004 fb20 bl 8006636 8001ff6: e02f b.n 8002058 } } else { if (stPulsanti & P1START) { 8001ff8: 4ba1 ldr r3, [pc, #644] @ (8002280 ) 8001ffa: 881b ldrh r3, [r3, #0] 8001ffc: f003 0301 and.w r3, r3, #1 8002000: 2b00 cmp r3, #0 8002002: d014 beq.n 800202e stPulsanti &= (~P1START); 8002004: 4b9e ldr r3, [pc, #632] @ (8002280 ) 8002006: 881b ldrh r3, [r3, #0] 8002008: f023 0301 bic.w r3, r3, #1 800200c: b29a uxth r2, r3 800200e: 4b9c ldr r3, [pc, #624] @ (8002280 ) 8002010: 801a strh r2, [r3, #0] stPulsanti|=P1RELEASED; 8002012: 4b9b ldr r3, [pc, #620] @ (8002280 ) 8002014: 881b ldrh r3, [r3, #0] 8002016: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800201a: b29a uxth r2, r3 800201c: 4b98 ldr r3, [pc, #608] @ (8002280 ) 800201e: 801a strh r2, [r3, #0] HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET); 8002020: 2200 movs r2, #0 8002022: f44f 5100 mov.w r1, #8192 @ 0x2000 8002026: 4897 ldr r0, [pc, #604] @ (8002284 ) 8002028: f004 fb05 bl 8006636 800202c: e011 b.n 8002052 } else if (rtP1 <= 190) { 800202e: 4b93 ldr r3, [pc, #588] @ (800227c ) 8002030: 781b ldrb r3, [r3, #0] 8002032: b2db uxtb r3, r3 8002034: 2bbe cmp r3, #190 @ 0xbe 8002036: d80c bhi.n 8002052 stPulsanti |= P1STOP; 8002038: 4b91 ldr r3, [pc, #580] @ (8002280 ) 800203a: 881b ldrh r3, [r3, #0] 800203c: f043 0302 orr.w r3, r3, #2 8002040: b29a uxth r2, r3 8002042: 4b8f ldr r3, [pc, #572] @ (8002280 ) 8002044: 801a strh r2, [r3, #0] HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET); 8002046: 2200 movs r2, #0 8002048: f44f 5100 mov.w r1, #8192 @ 0x2000 800204c: 488d ldr r0, [pc, #564] @ (8002284 ) 800204e: f004 faf2 bl 8006636 } rtP1 = 200; 8002052: 4b8a ldr r3, [pc, #552] @ (800227c ) 8002054: 22c8 movs r2, #200 @ 0xc8 8002056: 701a strb r2, [r3, #0] } if (pulsanti & INP2) { 8002058: 4b87 ldr r3, [pc, #540] @ (8002278 ) 800205a: 781b ldrb r3, [r3, #0] 800205c: f003 0302 and.w r3, r3, #2 8002060: 2b00 cmp r3, #0 8002062: d00c beq.n 800207e if (rtP2 == 0) 8002064: 4b88 ldr r3, [pc, #544] @ (8002288 ) 8002066: 781b ldrb r3, [r3, #0] 8002068: b2db uxtb r3, r3 800206a: 2b00 cmp r3, #0 800206c: d124 bne.n 80020b8 stPulsanti |= P2START; 800206e: 4b84 ldr r3, [pc, #528] @ (8002280 ) 8002070: 881b ldrh r3, [r3, #0] 8002072: f043 0304 orr.w r3, r3, #4 8002076: b29a uxth r2, r3 8002078: 4b81 ldr r3, [pc, #516] @ (8002280 ) 800207a: 801a strh r2, [r3, #0] 800207c: e01c b.n 80020b8 } else { if (stPulsanti & P2START) 800207e: 4b80 ldr r3, [pc, #512] @ (8002280 ) 8002080: 881b ldrh r3, [r3, #0] 8002082: f003 0304 and.w r3, r3, #4 8002086: 2b00 cmp r3, #0 8002088: d007 beq.n 800209a stPulsanti &= (~P2START); 800208a: 4b7d ldr r3, [pc, #500] @ (8002280 ) 800208c: 881b ldrh r3, [r3, #0] 800208e: f023 0304 bic.w r3, r3, #4 8002092: b29a uxth r2, r3 8002094: 4b7a ldr r3, [pc, #488] @ (8002280 ) 8002096: 801a strh r2, [r3, #0] 8002098: e00b b.n 80020b2 else if (rtP2 <= 190) 800209a: 4b7b ldr r3, [pc, #492] @ (8002288 ) 800209c: 781b ldrb r3, [r3, #0] 800209e: b2db uxtb r3, r3 80020a0: 2bbe cmp r3, #190 @ 0xbe 80020a2: d806 bhi.n 80020b2 stPulsanti |= P2STOP; 80020a4: 4b76 ldr r3, [pc, #472] @ (8002280 ) 80020a6: 881b ldrh r3, [r3, #0] 80020a8: f043 0308 orr.w r3, r3, #8 80020ac: b29a uxth r2, r3 80020ae: 4b74 ldr r3, [pc, #464] @ (8002280 ) 80020b0: 801a strh r2, [r3, #0] rtP2 = 200; 80020b2: 4b75 ldr r3, [pc, #468] @ (8002288 ) 80020b4: 22c8 movs r2, #200 @ 0xc8 80020b6: 701a strb r2, [r3, #0] } stPulsanti &= (P1START | P1STOP | P2START | P2STOP |P1RELEASED); 80020b8: 4b71 ldr r3, [pc, #452] @ (8002280 ) 80020ba: 881a ldrh r2, [r3, #0] 80020bc: f241 030f movw r3, #4111 @ 0x100f 80020c0: 4013 ands r3, r2 80020c2: b29a uxth r2, r3 80020c4: 4b6e ldr r3, [pc, #440] @ (8002280 ) 80020c6: 801a strh r2, [r3, #0] if (stPulsanti == 0) { 80020c8: 4b6d ldr r3, [pc, #436] @ (8002280 ) 80020ca: 881b ldrh r3, [r3, #0] 80020cc: 2b00 cmp r3, #0 80020ce: f040 80e0 bne.w 8002292 switch (pulsanti & 0x3c) { 80020d2: 4b69 ldr r3, [pc, #420] @ (8002278 ) 80020d4: 781b ldrb r3, [r3, #0] 80020d6: f003 033c and.w r3, r3, #60 @ 0x3c 80020da: 2b30 cmp r3, #48 @ 0x30 80020dc: f200 80bb bhi.w 8002256 80020e0: a201 add r2, pc, #4 @ (adr r2, 80020e8 ) 80020e2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80020e6: bf00 nop 80020e8: 080021ad .word 0x080021ad 80020ec: 08002257 .word 0x08002257 80020f0: 08002257 .word 0x08002257 80020f4: 08002257 .word 0x08002257 80020f8: 08002209 .word 0x08002209 80020fc: 08002257 .word 0x08002257 8002100: 08002257 .word 0x08002257 8002104: 08002257 .word 0x08002257 8002108: 080021bb .word 0x080021bb 800210c: 08002257 .word 0x08002257 8002110: 08002257 .word 0x08002257 8002114: 08002257 .word 0x08002257 8002118: 0800223d .word 0x0800223d 800211c: 08002257 .word 0x08002257 8002120: 08002257 .word 0x08002257 8002124: 08002257 .word 0x08002257 8002128: 080021d5 .word 0x080021d5 800212c: 08002257 .word 0x08002257 8002130: 08002257 .word 0x08002257 8002134: 08002257 .word 0x08002257 8002138: 08002257 .word 0x08002257 800213c: 08002257 .word 0x08002257 8002140: 08002257 .word 0x08002257 8002144: 08002257 .word 0x08002257 8002148: 08002257 .word 0x08002257 800214c: 08002257 .word 0x08002257 8002150: 08002257 .word 0x08002257 8002154: 08002257 .word 0x08002257 8002158: 08002257 .word 0x08002257 800215c: 08002257 .word 0x08002257 8002160: 08002257 .word 0x08002257 8002164: 08002257 .word 0x08002257 8002168: 080021ef .word 0x080021ef 800216c: 08002257 .word 0x08002257 8002170: 08002257 .word 0x08002257 8002174: 08002257 .word 0x08002257 8002178: 08002257 .word 0x08002257 800217c: 08002257 .word 0x08002257 8002180: 08002257 .word 0x08002257 8002184: 08002257 .word 0x08002257 8002188: 08002257 .word 0x08002257 800218c: 08002257 .word 0x08002257 8002190: 08002257 .word 0x08002257 8002194: 08002257 .word 0x08002257 8002198: 08002257 .word 0x08002257 800219c: 08002257 .word 0x08002257 80021a0: 08002257 .word 0x08002257 80021a4: 08002257 .word 0x08002257 80021a8: 08002223 .word 0x08002223 case 0x00: rtTLC = 100; 80021ac: 4b37 ldr r3, [pc, #220] @ (800228c ) 80021ae: 2264 movs r2, #100 @ 0x64 80021b0: 701a strb r2, [r3, #0] stPulsanti &= (!(M1FW | M1BW | M3FW | M3BW | M4FW | M4BW)); 80021b2: 4b33 ldr r3, [pc, #204] @ (8002280 ) 80021b4: 2200 movs r2, #0 80021b6: 801a strh r2, [r3, #0] break; 80021b8: e06b b.n 8002292 case 0x08: //tlc1 if (rtTLC == 0) 80021ba: 4b34 ldr r3, [pc, #208] @ (800228c ) 80021bc: 781b ldrb r3, [r3, #0] 80021be: b2db uxtb r3, r3 80021c0: 2b00 cmp r3, #0 80021c2: d14f bne.n 8002264 stPulsanti |= M1FW; 80021c4: 4b2e ldr r3, [pc, #184] @ (8002280 ) 80021c6: 881b ldrh r3, [r3, #0] 80021c8: f043 0310 orr.w r3, r3, #16 80021cc: b29a uxth r2, r3 80021ce: 4b2c ldr r3, [pc, #176] @ (8002280 ) 80021d0: 801a strh r2, [r3, #0] break; 80021d2: e047 b.n 8002264 case 0x10: //tlc2 if (rtTLC == 0) 80021d4: 4b2d ldr r3, [pc, #180] @ (800228c ) 80021d6: 781b ldrb r3, [r3, #0] 80021d8: b2db uxtb r3, r3 80021da: 2b00 cmp r3, #0 80021dc: d144 bne.n 8002268 stPulsanti |= M1BW; 80021de: 4b28 ldr r3, [pc, #160] @ (8002280 ) 80021e0: 881b ldrh r3, [r3, #0] 80021e2: f043 0320 orr.w r3, r3, #32 80021e6: b29a uxth r2, r3 80021e8: 4b25 ldr r3, [pc, #148] @ (8002280 ) 80021ea: 801a strh r2, [r3, #0] break; 80021ec: e03c b.n 8002268 case 0x20: //tlc3 if (rtTLC == 0) 80021ee: 4b27 ldr r3, [pc, #156] @ (800228c ) 80021f0: 781b ldrb r3, [r3, #0] 80021f2: b2db uxtb r3, r3 80021f4: 2b00 cmp r3, #0 80021f6: d139 bne.n 800226c stPulsanti |= M3FW; 80021f8: 4b21 ldr r3, [pc, #132] @ (8002280 ) 80021fa: 881b ldrh r3, [r3, #0] 80021fc: f443 7380 orr.w r3, r3, #256 @ 0x100 8002200: b29a uxth r2, r3 8002202: 4b1f ldr r3, [pc, #124] @ (8002280 ) 8002204: 801a strh r2, [r3, #0] break; 8002206: e031 b.n 800226c case 0x04: //tlc4 if (rtTLC == 0) 8002208: 4b20 ldr r3, [pc, #128] @ (800228c ) 800220a: 781b ldrb r3, [r3, #0] 800220c: b2db uxtb r3, r3 800220e: 2b00 cmp r3, #0 8002210: d12e bne.n 8002270 stPulsanti |= M3BW; 8002212: 4b1b ldr r3, [pc, #108] @ (8002280 ) 8002214: 881b ldrh r3, [r3, #0] 8002216: f443 7300 orr.w r3, r3, #512 @ 0x200 800221a: b29a uxth r2, r3 800221c: 4b18 ldr r3, [pc, #96] @ (8002280 ) 800221e: 801a strh r2, [r3, #0] break; 8002220: e026 b.n 8002270 case 0x30: //tlc5 if (rtTLC == 0) 8002222: 4b1a ldr r3, [pc, #104] @ (800228c ) 8002224: 781b ldrb r3, [r3, #0] 8002226: b2db uxtb r3, r3 8002228: 2b00 cmp r3, #0 800222a: d123 bne.n 8002274 stPulsanti |= M4FW; 800222c: 4b14 ldr r3, [pc, #80] @ (8002280 ) 800222e: 881b ldrh r3, [r3, #0] 8002230: f443 6380 orr.w r3, r3, #1024 @ 0x400 8002234: b29a uxth r2, r3 8002236: 4b12 ldr r3, [pc, #72] @ (8002280 ) 8002238: 801a strh r2, [r3, #0] break; 800223a: e01b b.n 8002274 case 0x0c: //tlc6 if (rtTLC == 0) 800223c: 4b13 ldr r3, [pc, #76] @ (800228c ) 800223e: 781b ldrb r3, [r3, #0] 8002240: b2db uxtb r3, r3 8002242: 2b00 cmp r3, #0 8002244: d124 bne.n 8002290 stPulsanti |= M4BW; 8002246: 4b0e ldr r3, [pc, #56] @ (8002280 ) 8002248: 881b ldrh r3, [r3, #0] 800224a: f443 6300 orr.w r3, r3, #2048 @ 0x800 800224e: b29a uxth r2, r3 8002250: 4b0b ldr r3, [pc, #44] @ (8002280 ) 8002252: 801a strh r2, [r3, #0] break; 8002254: e01c b.n 8002290 default: rtTLC = 100; 8002256: 4b0d ldr r3, [pc, #52] @ (800228c ) 8002258: 2264 movs r2, #100 @ 0x64 800225a: 701a strb r2, [r3, #0] stPulsanti &= (!(M1FW | M1BW | M3FW | M3BW | M4FW | M4BW)); 800225c: 4b08 ldr r3, [pc, #32] @ (8002280 ) 800225e: 2200 movs r2, #0 8002260: 801a strh r2, [r3, #0] break; 8002262: e016 b.n 8002292 break; 8002264: bf00 nop 8002266: e014 b.n 8002292 break; 8002268: bf00 nop 800226a: e012 b.n 8002292 break; 800226c: bf00 nop 800226e: e010 b.n 8002292 break; 8002270: bf00 nop 8002272: e00e b.n 8002292 break; 8002274: bf00 nop 8002276: e00c b.n 8002292 8002278: 200003f0 .word 0x200003f0 800227c: 20000004 .word 0x20000004 8002280: 20000454 .word 0x20000454 8002284: 40011000 .word 0x40011000 8002288: 20000005 .word 0x20000005 800228c: 20000006 .word 0x20000006 break; 8002290: bf00 nop } } } 8002292: bf00 nop 8002294: bd80 pop {r7, pc} 8002296: bf00 nop 08002298 : void manageCiclo(void) { 8002298: b580 push {r7, lr} 800229a: b084 sub sp, #16 800229c: af02 add r7, sp, #8 motMov_st m1, m2, m3, m4; switch (stCiclo) { 800229e: 4b9d ldr r3, [pc, #628] @ (8002514 ) 80022a0: 781b ldrb r3, [r3, #0] 80022a2: 2b19 cmp r3, #25 80022a4: f200 8694 bhi.w 8002fd0 80022a8: a201 add r2, pc, #4 @ (adr r2, 80022b0 ) 80022aa: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80022ae: bf00 nop 80022b0: 08002319 .word 0x08002319 80022b4: 080023eb .word 0x080023eb 80022b8: 08002435 .word 0x08002435 80022bc: 0800247f .word 0x0800247f 80022c0: 080024c9 .word 0x080024c9 80022c4: 08002551 .word 0x08002551 80022c8: 0800259b .word 0x0800259b 80022cc: 080025e5 .word 0x080025e5 80022d0: 0800262f .word 0x0800262f 80022d4: 08002679 .word 0x08002679 80022d8: 080026c3 .word 0x080026c3 80022dc: 0800270d .word 0x0800270d 80022e0: 08002757 .word 0x08002757 80022e4: 080027c5 .word 0x080027c5 80022e8: 0800280d .word 0x0800280d 80022ec: 08002855 .word 0x08002855 80022f0: 0800289d .word 0x0800289d 80022f4: 080028e5 .word 0x080028e5 80022f8: 0800294d .word 0x0800294d 80022fc: 080029dd .word 0x080029dd 8002300: 08002a79 .word 0x08002a79 8002304: 08002e93 .word 0x08002e93 8002308: 08002ae3 .word 0x08002ae3 800230c: 08002da3 .word 0x08002da3 8002310: 08002e33 .word 0x08002e33 8002314: 08002efb .word 0x08002efb case omchiuso: stPulsanti &= (~P1RELEASED); 8002318: 4b7f ldr r3, [pc, #508] @ (8002518 ) 800231a: 881b ldrh r3, [r3, #0] 800231c: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8002320: b29a uxth r2, r3 8002322: 4b7d ldr r3, [pc, #500] @ (8002518 ) 8002324: 801a strh r2, [r3, #0] if (stPulsanti & P1START) { 8002326: 4b7c ldr r3, [pc, #496] @ (8002518 ) 8002328: 881b ldrh r3, [r3, #0] 800232a: f003 0301 and.w r3, r3, #1 800232e: 2b00 cmp r3, #0 8002330: d014 beq.n 800235c stBuz = bzwarning; 8002332: 4b7a ldr r3, [pc, #488] @ (800251c ) 8002334: 2202 movs r2, #2 8002336: 701a strb r2, [r3, #0] rtCiclo = 0; 8002338: 4b79 ldr r3, [pc, #484] @ (8002520 ) 800233a: 2200 movs r2, #0 800233c: 801a strh r2, [r3, #0] stCiclo = omapertura0; 800233e: 4b75 ldr r3, [pc, #468] @ (8002514 ) 8002340: 2212 movs r2, #18 8002342: 701a strb r2, [r3, #0] fchiuso = false; 8002344: 4b77 ldr r3, [pc, #476] @ (8002524 ) 8002346: 2200 movs r2, #0 8002348: 701a strb r2, [r3, #0] (void) m1ap(); 800234a: f001 f9c7 bl 80036dc (void) m2ap(); 800234e: f001 fa97 bl 8003880 (void) m3ap(); 8002352: f001 fb67 bl 8003a24 (void) m4ap(); 8002356: f001 fc39 bl 8003bcc 800235a: e00b b.n 8002374 } else if (stPulsanti & P1STOP) { 800235c: 4b6e ldr r3, [pc, #440] @ (8002518 ) 800235e: 881b ldrh r3, [r3, #0] 8002360: f003 0302 and.w r3, r3, #2 8002364: 2b00 cmp r3, #0 8002366: d005 beq.n 8002374 fchiuso = false; 8002368: 4b6e ldr r3, [pc, #440] @ (8002524 ) 800236a: 2200 movs r2, #0 800236c: 701a strb r2, [r3, #0] stCiclo = omstopapertura; 800236e: 4b69 ldr r3, [pc, #420] @ (8002514 ) 8002370: 2213 movs r2, #19 8002372: 701a strb r2, [r3, #0] } #ifdef ANEMCH fchiuso = false; 8002374: 4b6b ldr r3, [pc, #428] @ (8002524 ) 8002376: 2200 movs r2, #0 8002378: 701a strb r2, [r3, #0] #endif if ((ch8 > thanem) && (fchiuso == false)) { 800237a: 4b6b ldr r3, [pc, #428] @ (8002528 ) 800237c: 881a ldrh r2, [r3, #0] 800237e: 4b6b ldr r3, [pc, #428] @ (800252c ) 8002380: 881b ldrh r3, [r3, #0] 8002382: 429a cmp r2, r3 8002384: d923 bls.n 80023ce 8002386: 4b67 ldr r3, [pc, #412] @ (8002524 ) 8002388: 781b ldrb r3, [r3, #0] 800238a: f083 0301 eor.w r3, r3, #1 800238e: b2db uxtb r3, r3 8002390: 2b00 cmp r3, #0 8002392: d01c beq.n 80023ce HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET); 8002394: 2201 movs r2, #1 8002396: f44f 4100 mov.w r1, #32768 @ 0x8000 800239a: 4865 ldr r0, [pc, #404] @ (8002530 ) 800239c: f004 f94b bl 8006636 if (rtAnem == 0) { 80023a0: 4b64 ldr r3, [pc, #400] @ (8002534 ) 80023a2: 881b ldrh r3, [r3, #0] 80023a4: b29b uxth r3, r3 80023a6: 2b00 cmp r3, #0 80023a8: d11d bne.n 80023e6 rtCiclo=0; 80023aa: 4b5d ldr r3, [pc, #372] @ (8002520 ) 80023ac: 2200 movs r2, #0 80023ae: 801a strh r2, [r3, #0] stBuz = bzmoving; 80023b0: 4b5a ldr r3, [pc, #360] @ (800251c ) 80023b2: 2201 movs r2, #1 80023b4: 701a strb r2, [r3, #0] stCiclo = omemergenza1; 80023b6: 4b57 ldr r3, [pc, #348] @ (8002514 ) 80023b8: 2218 movs r2, #24 80023ba: 701a strb r2, [r3, #0] (void) m1ch(); 80023bc: f001 fcda bl 8003d74 (void) m2ch(); 80023c0: f001 fdaa bl 8003f18 (void) m3ch(); 80023c4: f001 fe7a bl 80040bc (void) m4ch(); 80023c8: f001 ff4c bl 8004264 if (rtAnem == 0) { 80023cc: e00b b.n 80023e6 } } else{ HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET); 80023ce: 2200 movs r2, #0 80023d0: f44f 4100 mov.w r1, #32768 @ 0x8000 80023d4: 4856 ldr r0, [pc, #344] @ (8002530 ) 80023d6: f004 f92e bl 8006636 rtAnem = tanem; 80023da: 4b57 ldr r3, [pc, #348] @ (8002538 ) 80023dc: 881a ldrh r2, [r3, #0] 80023de: 4b55 ldr r3, [pc, #340] @ (8002534 ) 80023e0: 801a strh r2, [r3, #0] } break; 80023e2: f000 bdf5 b.w 8002fd0 80023e6: f000 bdf3 b.w 8002fd0 case omM1fw1: (void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN); 80023ea: 4b54 ldr r3, [pc, #336] @ (800253c ) 80023ec: 881b ldrh r3, [r3, #0] 80023ee: b2da uxtb r2, r3 80023f0: 4b53 ldr r3, [pc, #332] @ (8002540 ) 80023f2: 881b ldrh r3, [r3, #0] 80023f4: b2d9 uxtb r1, r3 80023f6: 4b53 ldr r3, [pc, #332] @ (8002544 ) 80023f8: 881b ldrh r3, [r3, #0] 80023fa: b2db uxtb r3, r3 80023fc: 200a movs r0, #10 80023fe: 9001 str r0, [sp, #4] 8002400: 9300 str r3, [sp, #0] 8002402: 460b mov r3, r1 8002404: 2100 movs r1, #0 8002406: 2001 movs r0, #1 8002408: f002 fb66 bl 8004ad8 if (rtCiclo >= m1TimeoutMan) 800240c: 4b44 ldr r3, [pc, #272] @ (8002520 ) 800240e: 881b ldrh r3, [r3, #0] 8002410: b29a uxth r2, r3 8002412: 4b4d ldr r3, [pc, #308] @ (8002548 ) 8002414: 881b ldrh r3, [r3, #0] 8002416: 429a cmp r2, r3 8002418: d302 bcc.n 8002420 stCiclo = omStopMan; 800241a: 4b3e ldr r3, [pc, #248] @ (8002514 ) 800241c: 2211 movs r2, #17 800241e: 701a strb r2, [r3, #0] if (pulsanti == 0) 8002420: 4b4a ldr r3, [pc, #296] @ (800254c ) 8002422: 781b ldrb r3, [r3, #0] 8002424: 2b00 cmp r3, #0 8002426: f040 85a2 bne.w 8002f6e stCiclo = omM1fw2; 800242a: 4b3a ldr r3, [pc, #232] @ (8002514 ) 800242c: 2202 movs r2, #2 800242e: 701a strb r2, [r3, #0] break; 8002430: f000 bd9d b.w 8002f6e case omM1fw2: (void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN); 8002434: 4b41 ldr r3, [pc, #260] @ (800253c ) 8002436: 881b ldrh r3, [r3, #0] 8002438: b2da uxtb r2, r3 800243a: 4b41 ldr r3, [pc, #260] @ (8002540 ) 800243c: 881b ldrh r3, [r3, #0] 800243e: b2d9 uxtb r1, r3 8002440: 4b40 ldr r3, [pc, #256] @ (8002544 ) 8002442: 881b ldrh r3, [r3, #0] 8002444: b2db uxtb r3, r3 8002446: 200a movs r0, #10 8002448: 9001 str r0, [sp, #4] 800244a: 9300 str r3, [sp, #0] 800244c: 460b mov r3, r1 800244e: 2100 movs r1, #0 8002450: 2001 movs r0, #1 8002452: f002 fb41 bl 8004ad8 if (rtCiclo >= m1TimeoutMan) 8002456: 4b32 ldr r3, [pc, #200] @ (8002520 ) 8002458: 881b ldrh r3, [r3, #0] 800245a: b29a uxth r2, r3 800245c: 4b3a ldr r3, [pc, #232] @ (8002548 ) 800245e: 881b ldrh r3, [r3, #0] 8002460: 429a cmp r2, r3 8002462: d302 bcc.n 800246a stCiclo = omStopMan; 8002464: 4b2b ldr r3, [pc, #172] @ (8002514 ) 8002466: 2211 movs r2, #17 8002468: 701a strb r2, [r3, #0] if (pulsanti) 800246a: 4b38 ldr r3, [pc, #224] @ (800254c ) 800246c: 781b ldrb r3, [r3, #0] 800246e: 2b00 cmp r3, #0 8002470: f000 857f beq.w 8002f72 stCiclo = omStopMan; 8002474: 4b27 ldr r3, [pc, #156] @ (8002514 ) 8002476: 2211 movs r2, #17 8002478: 701a strb r2, [r3, #0] break; 800247a: f000 bd7a b.w 8002f72 case omM1bw1: (void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN); 800247e: 4b2f ldr r3, [pc, #188] @ (800253c ) 8002480: 881b ldrh r3, [r3, #0] 8002482: b2da uxtb r2, r3 8002484: 4b2e ldr r3, [pc, #184] @ (8002540 ) 8002486: 881b ldrh r3, [r3, #0] 8002488: b2d9 uxtb r1, r3 800248a: 4b2e ldr r3, [pc, #184] @ (8002544 ) 800248c: 881b ldrh r3, [r3, #0] 800248e: b2db uxtb r3, r3 8002490: 200a movs r0, #10 8002492: 9001 str r0, [sp, #4] 8002494: 9300 str r3, [sp, #0] 8002496: 460b mov r3, r1 8002498: 2101 movs r1, #1 800249a: 2001 movs r0, #1 800249c: f002 fb1c bl 8004ad8 if (rtCiclo >= m1TimeoutMan) 80024a0: 4b1f ldr r3, [pc, #124] @ (8002520 ) 80024a2: 881b ldrh r3, [r3, #0] 80024a4: b29a uxth r2, r3 80024a6: 4b28 ldr r3, [pc, #160] @ (8002548 ) 80024a8: 881b ldrh r3, [r3, #0] 80024aa: 429a cmp r2, r3 80024ac: d302 bcc.n 80024b4 stCiclo = omStopMan; 80024ae: 4b19 ldr r3, [pc, #100] @ (8002514 ) 80024b0: 2211 movs r2, #17 80024b2: 701a strb r2, [r3, #0] if (pulsanti == 0) 80024b4: 4b25 ldr r3, [pc, #148] @ (800254c ) 80024b6: 781b ldrb r3, [r3, #0] 80024b8: 2b00 cmp r3, #0 80024ba: f040 855c bne.w 8002f76 stCiclo = omM1bw2; 80024be: 4b15 ldr r3, [pc, #84] @ (8002514 ) 80024c0: 2204 movs r2, #4 80024c2: 701a strb r2, [r3, #0] break; 80024c4: f000 bd57 b.w 8002f76 case omM1bw2: (void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN); 80024c8: 4b1c ldr r3, [pc, #112] @ (800253c ) 80024ca: 881b ldrh r3, [r3, #0] 80024cc: b2da uxtb r2, r3 80024ce: 4b1c ldr r3, [pc, #112] @ (8002540 ) 80024d0: 881b ldrh r3, [r3, #0] 80024d2: b2d9 uxtb r1, r3 80024d4: 4b1b ldr r3, [pc, #108] @ (8002544 ) 80024d6: 881b ldrh r3, [r3, #0] 80024d8: b2db uxtb r3, r3 80024da: 200a movs r0, #10 80024dc: 9001 str r0, [sp, #4] 80024de: 9300 str r3, [sp, #0] 80024e0: 460b mov r3, r1 80024e2: 2101 movs r1, #1 80024e4: 2001 movs r0, #1 80024e6: f002 faf7 bl 8004ad8 if (rtCiclo >= m1TimeoutMan) 80024ea: 4b0d ldr r3, [pc, #52] @ (8002520 ) 80024ec: 881b ldrh r3, [r3, #0] 80024ee: b29a uxth r2, r3 80024f0: 4b15 ldr r3, [pc, #84] @ (8002548 ) 80024f2: 881b ldrh r3, [r3, #0] 80024f4: 429a cmp r2, r3 80024f6: d302 bcc.n 80024fe stCiclo = omStopMan; 80024f8: 4b06 ldr r3, [pc, #24] @ (8002514 ) 80024fa: 2211 movs r2, #17 80024fc: 701a strb r2, [r3, #0] if (pulsanti) 80024fe: 4b13 ldr r3, [pc, #76] @ (800254c ) 8002500: 781b ldrb r3, [r3, #0] 8002502: 2b00 cmp r3, #0 8002504: f000 8539 beq.w 8002f7a stCiclo = omStopMan; 8002508: 4b02 ldr r3, [pc, #8] @ (8002514 ) 800250a: 2211 movs r2, #17 800250c: 701a strb r2, [r3, #0] break; 800250e: f000 bd34 b.w 8002f7a 8002512: bf00 nop 8002514: 20000456 .word 0x20000456 8002518: 20000454 .word 0x20000454 800251c: 20000457 .word 0x20000457 8002520: 200003fc .word 0x200003fc 8002524: 20000459 .word 0x20000459 8002528: 20000232 .word 0x20000232 800252c: 2000041c .word 0x2000041c 8002530: 40010800 .word 0x40010800 8002534: 200003fe .word 0x200003fe 8002538: 2000041a .word 0x2000041a 800253c: 2000044c .word 0x2000044c 8002540: 20000420 .word 0x20000420 8002544: 2000041e .word 0x2000041e 8002548: 20000410 .word 0x20000410 800254c: 200003f0 .word 0x200003f0 case omM2fw1: (void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN); 8002550: 4b93 ldr r3, [pc, #588] @ (80027a0 ) 8002552: 885b ldrh r3, [r3, #2] 8002554: b2da uxtb r2, r3 8002556: 4b93 ldr r3, [pc, #588] @ (80027a4 ) 8002558: 881b ldrh r3, [r3, #0] 800255a: b2d9 uxtb r1, r3 800255c: 4b92 ldr r3, [pc, #584] @ (80027a8 ) 800255e: 881b ldrh r3, [r3, #0] 8002560: b2db uxtb r3, r3 8002562: 200a movs r0, #10 8002564: 9001 str r0, [sp, #4] 8002566: 9300 str r3, [sp, #0] 8002568: 460b mov r3, r1 800256a: 2100 movs r1, #0 800256c: 2002 movs r0, #2 800256e: f002 fab3 bl 8004ad8 if (rtCiclo >= m2TimeoutMan) 8002572: 4b8e ldr r3, [pc, #568] @ (80027ac ) 8002574: 881b ldrh r3, [r3, #0] 8002576: b29a uxth r2, r3 8002578: 4b8d ldr r3, [pc, #564] @ (80027b0 ) 800257a: 881b ldrh r3, [r3, #0] 800257c: 429a cmp r2, r3 800257e: d302 bcc.n 8002586 stCiclo = omStopMan; 8002580: 4b8c ldr r3, [pc, #560] @ (80027b4 ) 8002582: 2211 movs r2, #17 8002584: 701a strb r2, [r3, #0] if (pulsanti == 0) 8002586: 4b8c ldr r3, [pc, #560] @ (80027b8 ) 8002588: 781b ldrb r3, [r3, #0] 800258a: 2b00 cmp r3, #0 800258c: f040 84f7 bne.w 8002f7e stCiclo = omM2fw2; 8002590: 4b88 ldr r3, [pc, #544] @ (80027b4 ) 8002592: 2206 movs r2, #6 8002594: 701a strb r2, [r3, #0] break; 8002596: f000 bcf2 b.w 8002f7e case omM2fw2: (void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN); 800259a: 4b81 ldr r3, [pc, #516] @ (80027a0 ) 800259c: 885b ldrh r3, [r3, #2] 800259e: b2da uxtb r2, r3 80025a0: 4b80 ldr r3, [pc, #512] @ (80027a4 ) 80025a2: 881b ldrh r3, [r3, #0] 80025a4: b2d9 uxtb r1, r3 80025a6: 4b80 ldr r3, [pc, #512] @ (80027a8 ) 80025a8: 881b ldrh r3, [r3, #0] 80025aa: b2db uxtb r3, r3 80025ac: 200a movs r0, #10 80025ae: 9001 str r0, [sp, #4] 80025b0: 9300 str r3, [sp, #0] 80025b2: 460b mov r3, r1 80025b4: 2100 movs r1, #0 80025b6: 2002 movs r0, #2 80025b8: f002 fa8e bl 8004ad8 if (rtCiclo >= m2TimeoutMan) 80025bc: 4b7b ldr r3, [pc, #492] @ (80027ac ) 80025be: 881b ldrh r3, [r3, #0] 80025c0: b29a uxth r2, r3 80025c2: 4b7b ldr r3, [pc, #492] @ (80027b0 ) 80025c4: 881b ldrh r3, [r3, #0] 80025c6: 429a cmp r2, r3 80025c8: d302 bcc.n 80025d0 stCiclo = omStopMan; 80025ca: 4b7a ldr r3, [pc, #488] @ (80027b4 ) 80025cc: 2211 movs r2, #17 80025ce: 701a strb r2, [r3, #0] if (pulsanti) 80025d0: 4b79 ldr r3, [pc, #484] @ (80027b8 ) 80025d2: 781b ldrb r3, [r3, #0] 80025d4: 2b00 cmp r3, #0 80025d6: f000 84d4 beq.w 8002f82 stCiclo = omStopMan; 80025da: 4b76 ldr r3, [pc, #472] @ (80027b4 ) 80025dc: 2211 movs r2, #17 80025de: 701a strb r2, [r3, #0] break; 80025e0: f000 bccf b.w 8002f82 case omM2bw1: (void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN); 80025e4: 4b6e ldr r3, [pc, #440] @ (80027a0 ) 80025e6: 885b ldrh r3, [r3, #2] 80025e8: b2da uxtb r2, r3 80025ea: 4b6e ldr r3, [pc, #440] @ (80027a4 ) 80025ec: 881b ldrh r3, [r3, #0] 80025ee: b2d9 uxtb r1, r3 80025f0: 4b6d ldr r3, [pc, #436] @ (80027a8 ) 80025f2: 881b ldrh r3, [r3, #0] 80025f4: b2db uxtb r3, r3 80025f6: 200a movs r0, #10 80025f8: 9001 str r0, [sp, #4] 80025fa: 9300 str r3, [sp, #0] 80025fc: 460b mov r3, r1 80025fe: 2101 movs r1, #1 8002600: 2002 movs r0, #2 8002602: f002 fa69 bl 8004ad8 if (rtCiclo >= m2TimeoutMan) 8002606: 4b69 ldr r3, [pc, #420] @ (80027ac ) 8002608: 881b ldrh r3, [r3, #0] 800260a: b29a uxth r2, r3 800260c: 4b68 ldr r3, [pc, #416] @ (80027b0 ) 800260e: 881b ldrh r3, [r3, #0] 8002610: 429a cmp r2, r3 8002612: d302 bcc.n 800261a stCiclo = omStopMan; 8002614: 4b67 ldr r3, [pc, #412] @ (80027b4 ) 8002616: 2211 movs r2, #17 8002618: 701a strb r2, [r3, #0] if (pulsanti == 0) 800261a: 4b67 ldr r3, [pc, #412] @ (80027b8 ) 800261c: 781b ldrb r3, [r3, #0] 800261e: 2b00 cmp r3, #0 8002620: f040 84b1 bne.w 8002f86 stCiclo = omM2bw2; 8002624: 4b63 ldr r3, [pc, #396] @ (80027b4 ) 8002626: 2208 movs r2, #8 8002628: 701a strb r2, [r3, #0] break; 800262a: f000 bcac b.w 8002f86 case omM2bw2: (void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN); 800262e: 4b5c ldr r3, [pc, #368] @ (80027a0 ) 8002630: 885b ldrh r3, [r3, #2] 8002632: b2da uxtb r2, r3 8002634: 4b5b ldr r3, [pc, #364] @ (80027a4 ) 8002636: 881b ldrh r3, [r3, #0] 8002638: b2d9 uxtb r1, r3 800263a: 4b5b ldr r3, [pc, #364] @ (80027a8 ) 800263c: 881b ldrh r3, [r3, #0] 800263e: b2db uxtb r3, r3 8002640: 200a movs r0, #10 8002642: 9001 str r0, [sp, #4] 8002644: 9300 str r3, [sp, #0] 8002646: 460b mov r3, r1 8002648: 2101 movs r1, #1 800264a: 2002 movs r0, #2 800264c: f002 fa44 bl 8004ad8 if (rtCiclo >= m2TimeoutMan) 8002650: 4b56 ldr r3, [pc, #344] @ (80027ac ) 8002652: 881b ldrh r3, [r3, #0] 8002654: b29a uxth r2, r3 8002656: 4b56 ldr r3, [pc, #344] @ (80027b0 ) 8002658: 881b ldrh r3, [r3, #0] 800265a: 429a cmp r2, r3 800265c: d302 bcc.n 8002664 stCiclo = omStopMan; 800265e: 4b55 ldr r3, [pc, #340] @ (80027b4 ) 8002660: 2211 movs r2, #17 8002662: 701a strb r2, [r3, #0] if (pulsanti) 8002664: 4b54 ldr r3, [pc, #336] @ (80027b8 ) 8002666: 781b ldrb r3, [r3, #0] 8002668: 2b00 cmp r3, #0 800266a: f000 848e beq.w 8002f8a stCiclo = omStopMan; 800266e: 4b51 ldr r3, [pc, #324] @ (80027b4 ) 8002670: 2211 movs r2, #17 8002672: 701a strb r2, [r3, #0] break; 8002674: f000 bc89 b.w 8002f8a case omM3fw1: (void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN); 8002678: 4b49 ldr r3, [pc, #292] @ (80027a0 ) 800267a: 889b ldrh r3, [r3, #4] 800267c: b2da uxtb r2, r3 800267e: 4b4f ldr r3, [pc, #316] @ (80027bc ) 8002680: 881b ldrh r3, [r3, #0] 8002682: b2d9 uxtb r1, r3 8002684: 4b48 ldr r3, [pc, #288] @ (80027a8 ) 8002686: 881b ldrh r3, [r3, #0] 8002688: b2db uxtb r3, r3 800268a: 200a movs r0, #10 800268c: 9001 str r0, [sp, #4] 800268e: 9300 str r3, [sp, #0] 8002690: 460b mov r3, r1 8002692: 2100 movs r1, #0 8002694: 2003 movs r0, #3 8002696: f002 fa1f bl 8004ad8 if (rtCiclo >= m3TimeoutMan) 800269a: 4b44 ldr r3, [pc, #272] @ (80027ac ) 800269c: 881b ldrh r3, [r3, #0] 800269e: b29a uxth r2, r3 80026a0: 4b47 ldr r3, [pc, #284] @ (80027c0 ) 80026a2: 881b ldrh r3, [r3, #0] 80026a4: 429a cmp r2, r3 80026a6: d302 bcc.n 80026ae stCiclo = omStopMan; 80026a8: 4b42 ldr r3, [pc, #264] @ (80027b4 ) 80026aa: 2211 movs r2, #17 80026ac: 701a strb r2, [r3, #0] if (pulsanti == 0) 80026ae: 4b42 ldr r3, [pc, #264] @ (80027b8 ) 80026b0: 781b ldrb r3, [r3, #0] 80026b2: 2b00 cmp r3, #0 80026b4: f040 846b bne.w 8002f8e stCiclo = omM3fw2; 80026b8: 4b3e ldr r3, [pc, #248] @ (80027b4 ) 80026ba: 220a movs r2, #10 80026bc: 701a strb r2, [r3, #0] break; 80026be: f000 bc66 b.w 8002f8e case omM3fw2: (void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN); 80026c2: 4b37 ldr r3, [pc, #220] @ (80027a0 ) 80026c4: 889b ldrh r3, [r3, #4] 80026c6: b2da uxtb r2, r3 80026c8: 4b3c ldr r3, [pc, #240] @ (80027bc ) 80026ca: 881b ldrh r3, [r3, #0] 80026cc: b2d9 uxtb r1, r3 80026ce: 4b36 ldr r3, [pc, #216] @ (80027a8 ) 80026d0: 881b ldrh r3, [r3, #0] 80026d2: b2db uxtb r3, r3 80026d4: 200a movs r0, #10 80026d6: 9001 str r0, [sp, #4] 80026d8: 9300 str r3, [sp, #0] 80026da: 460b mov r3, r1 80026dc: 2100 movs r1, #0 80026de: 2003 movs r0, #3 80026e0: f002 f9fa bl 8004ad8 if (rtCiclo >= m3TimeoutMan) 80026e4: 4b31 ldr r3, [pc, #196] @ (80027ac ) 80026e6: 881b ldrh r3, [r3, #0] 80026e8: b29a uxth r2, r3 80026ea: 4b35 ldr r3, [pc, #212] @ (80027c0 ) 80026ec: 881b ldrh r3, [r3, #0] 80026ee: 429a cmp r2, r3 80026f0: d302 bcc.n 80026f8 stCiclo = omStopMan; 80026f2: 4b30 ldr r3, [pc, #192] @ (80027b4 ) 80026f4: 2211 movs r2, #17 80026f6: 701a strb r2, [r3, #0] if (pulsanti) 80026f8: 4b2f ldr r3, [pc, #188] @ (80027b8 ) 80026fa: 781b ldrb r3, [r3, #0] 80026fc: 2b00 cmp r3, #0 80026fe: f000 8448 beq.w 8002f92 stCiclo = omStopMan; 8002702: 4b2c ldr r3, [pc, #176] @ (80027b4 ) 8002704: 2211 movs r2, #17 8002706: 701a strb r2, [r3, #0] break; 8002708: f000 bc43 b.w 8002f92 case omM3bw1: (void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN); 800270c: 4b24 ldr r3, [pc, #144] @ (80027a0 ) 800270e: 889b ldrh r3, [r3, #4] 8002710: b2da uxtb r2, r3 8002712: 4b2a ldr r3, [pc, #168] @ (80027bc ) 8002714: 881b ldrh r3, [r3, #0] 8002716: b2d9 uxtb r1, r3 8002718: 4b23 ldr r3, [pc, #140] @ (80027a8 ) 800271a: 881b ldrh r3, [r3, #0] 800271c: b2db uxtb r3, r3 800271e: 200a movs r0, #10 8002720: 9001 str r0, [sp, #4] 8002722: 9300 str r3, [sp, #0] 8002724: 460b mov r3, r1 8002726: 2101 movs r1, #1 8002728: 2003 movs r0, #3 800272a: f002 f9d5 bl 8004ad8 if (rtCiclo >= m3TimeoutMan) 800272e: 4b1f ldr r3, [pc, #124] @ (80027ac ) 8002730: 881b ldrh r3, [r3, #0] 8002732: b29a uxth r2, r3 8002734: 4b22 ldr r3, [pc, #136] @ (80027c0 ) 8002736: 881b ldrh r3, [r3, #0] 8002738: 429a cmp r2, r3 800273a: d302 bcc.n 8002742 stCiclo = omStopMan; 800273c: 4b1d ldr r3, [pc, #116] @ (80027b4 ) 800273e: 2211 movs r2, #17 8002740: 701a strb r2, [r3, #0] if (pulsanti == 0) 8002742: 4b1d ldr r3, [pc, #116] @ (80027b8 ) 8002744: 781b ldrb r3, [r3, #0] 8002746: 2b00 cmp r3, #0 8002748: f040 8425 bne.w 8002f96 stCiclo = omM3bw2; 800274c: 4b19 ldr r3, [pc, #100] @ (80027b4 ) 800274e: 220c movs r2, #12 8002750: 701a strb r2, [r3, #0] break; 8002752: f000 bc20 b.w 8002f96 case omM3bw2: (void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN); 8002756: 4b12 ldr r3, [pc, #72] @ (80027a0 ) 8002758: 889b ldrh r3, [r3, #4] 800275a: b2da uxtb r2, r3 800275c: 4b17 ldr r3, [pc, #92] @ (80027bc ) 800275e: 881b ldrh r3, [r3, #0] 8002760: b2d9 uxtb r1, r3 8002762: 4b11 ldr r3, [pc, #68] @ (80027a8 ) 8002764: 881b ldrh r3, [r3, #0] 8002766: b2db uxtb r3, r3 8002768: 200a movs r0, #10 800276a: 9001 str r0, [sp, #4] 800276c: 9300 str r3, [sp, #0] 800276e: 460b mov r3, r1 8002770: 2101 movs r1, #1 8002772: 2003 movs r0, #3 8002774: f002 f9b0 bl 8004ad8 if (rtCiclo >= m3TimeoutMan) 8002778: 4b0c ldr r3, [pc, #48] @ (80027ac ) 800277a: 881b ldrh r3, [r3, #0] 800277c: b29a uxth r2, r3 800277e: 4b10 ldr r3, [pc, #64] @ (80027c0 ) 8002780: 881b ldrh r3, [r3, #0] 8002782: 429a cmp r2, r3 8002784: d302 bcc.n 800278c stCiclo = omStopMan; 8002786: 4b0b ldr r3, [pc, #44] @ (80027b4 ) 8002788: 2211 movs r2, #17 800278a: 701a strb r2, [r3, #0] if (pulsanti) 800278c: 4b0a ldr r3, [pc, #40] @ (80027b8 ) 800278e: 781b ldrb r3, [r3, #0] 8002790: 2b00 cmp r3, #0 8002792: f000 8402 beq.w 8002f9a stCiclo = omStopMan; 8002796: 4b07 ldr r3, [pc, #28] @ (80027b4 ) 8002798: 2211 movs r2, #17 800279a: 701a strb r2, [r3, #0] break; 800279c: e3fd b.n 8002f9a 800279e: bf00 nop 80027a0: 2000044c .word 0x2000044c 80027a4: 20000422 .word 0x20000422 80027a8: 2000041e .word 0x2000041e 80027ac: 200003fc .word 0x200003fc 80027b0: 20000412 .word 0x20000412 80027b4: 20000456 .word 0x20000456 80027b8: 200003f0 .word 0x200003f0 80027bc: 20000424 .word 0x20000424 80027c0: 20000414 .word 0x20000414 case omM4fw1: (void) ramp(M4, FW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN); 80027c4: 4ba3 ldr r3, [pc, #652] @ (8002a54 ) 80027c6: 88db ldrh r3, [r3, #6] 80027c8: b2da uxtb r2, r3 80027ca: 4ba3 ldr r3, [pc, #652] @ (8002a58 ) 80027cc: 881b ldrh r3, [r3, #0] 80027ce: b2d9 uxtb r1, r3 80027d0: 4ba2 ldr r3, [pc, #648] @ (8002a5c ) 80027d2: 881b ldrh r3, [r3, #0] 80027d4: b2db uxtb r3, r3 80027d6: 200a movs r0, #10 80027d8: 9001 str r0, [sp, #4] 80027da: 9300 str r3, [sp, #0] 80027dc: 460b mov r3, r1 80027de: 2100 movs r1, #0 80027e0: 2004 movs r0, #4 80027e2: f002 f979 bl 8004ad8 if (rtCiclo >= m4TimeoutMan) 80027e6: 4b9e ldr r3, [pc, #632] @ (8002a60 ) 80027e8: 881b ldrh r3, [r3, #0] 80027ea: b29a uxth r2, r3 80027ec: 4b9d ldr r3, [pc, #628] @ (8002a64 ) 80027ee: 881b ldrh r3, [r3, #0] 80027f0: 429a cmp r2, r3 80027f2: d302 bcc.n 80027fa stCiclo = omStopMan; 80027f4: 4b9c ldr r3, [pc, #624] @ (8002a68 ) 80027f6: 2211 movs r2, #17 80027f8: 701a strb r2, [r3, #0] if (pulsanti == 0) 80027fa: 4b9c ldr r3, [pc, #624] @ (8002a6c ) 80027fc: 781b ldrb r3, [r3, #0] 80027fe: 2b00 cmp r3, #0 8002800: f040 83cd bne.w 8002f9e stCiclo = omM4fw2; 8002804: 4b98 ldr r3, [pc, #608] @ (8002a68 ) 8002806: 220e movs r2, #14 8002808: 701a strb r2, [r3, #0] break; 800280a: e3c8 b.n 8002f9e case omM4fw2: (void) ramp(M4, FW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN); 800280c: 4b91 ldr r3, [pc, #580] @ (8002a54 ) 800280e: 88db ldrh r3, [r3, #6] 8002810: b2da uxtb r2, r3 8002812: 4b91 ldr r3, [pc, #580] @ (8002a58 ) 8002814: 881b ldrh r3, [r3, #0] 8002816: b2d9 uxtb r1, r3 8002818: 4b90 ldr r3, [pc, #576] @ (8002a5c ) 800281a: 881b ldrh r3, [r3, #0] 800281c: b2db uxtb r3, r3 800281e: 200a movs r0, #10 8002820: 9001 str r0, [sp, #4] 8002822: 9300 str r3, [sp, #0] 8002824: 460b mov r3, r1 8002826: 2100 movs r1, #0 8002828: 2004 movs r0, #4 800282a: f002 f955 bl 8004ad8 if (rtCiclo >= m4TimeoutMan) 800282e: 4b8c ldr r3, [pc, #560] @ (8002a60 ) 8002830: 881b ldrh r3, [r3, #0] 8002832: b29a uxth r2, r3 8002834: 4b8b ldr r3, [pc, #556] @ (8002a64 ) 8002836: 881b ldrh r3, [r3, #0] 8002838: 429a cmp r2, r3 800283a: d302 bcc.n 8002842 stCiclo = omStopMan; 800283c: 4b8a ldr r3, [pc, #552] @ (8002a68 ) 800283e: 2211 movs r2, #17 8002840: 701a strb r2, [r3, #0] if (pulsanti) 8002842: 4b8a ldr r3, [pc, #552] @ (8002a6c ) 8002844: 781b ldrb r3, [r3, #0] 8002846: 2b00 cmp r3, #0 8002848: f000 83ab beq.w 8002fa2 stCiclo = omStopMan; 800284c: 4b86 ldr r3, [pc, #536] @ (8002a68 ) 800284e: 2211 movs r2, #17 8002850: 701a strb r2, [r3, #0] break; 8002852: e3a6 b.n 8002fa2 case omM4bw1: (void) ramp(M4, BW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN); 8002854: 4b7f ldr r3, [pc, #508] @ (8002a54 ) 8002856: 88db ldrh r3, [r3, #6] 8002858: b2da uxtb r2, r3 800285a: 4b7f ldr r3, [pc, #508] @ (8002a58 ) 800285c: 881b ldrh r3, [r3, #0] 800285e: b2d9 uxtb r1, r3 8002860: 4b7e ldr r3, [pc, #504] @ (8002a5c ) 8002862: 881b ldrh r3, [r3, #0] 8002864: b2db uxtb r3, r3 8002866: 200a movs r0, #10 8002868: 9001 str r0, [sp, #4] 800286a: 9300 str r3, [sp, #0] 800286c: 460b mov r3, r1 800286e: 2101 movs r1, #1 8002870: 2004 movs r0, #4 8002872: f002 f931 bl 8004ad8 if (rtCiclo >= m4TimeoutMan) 8002876: 4b7a ldr r3, [pc, #488] @ (8002a60 ) 8002878: 881b ldrh r3, [r3, #0] 800287a: b29a uxth r2, r3 800287c: 4b79 ldr r3, [pc, #484] @ (8002a64 ) 800287e: 881b ldrh r3, [r3, #0] 8002880: 429a cmp r2, r3 8002882: d302 bcc.n 800288a stCiclo = omStopMan; 8002884: 4b78 ldr r3, [pc, #480] @ (8002a68 ) 8002886: 2211 movs r2, #17 8002888: 701a strb r2, [r3, #0] if (pulsanti == 0) 800288a: 4b78 ldr r3, [pc, #480] @ (8002a6c ) 800288c: 781b ldrb r3, [r3, #0] 800288e: 2b00 cmp r3, #0 8002890: f040 8389 bne.w 8002fa6 stCiclo = omM4bw2; 8002894: 4b74 ldr r3, [pc, #464] @ (8002a68 ) 8002896: 2210 movs r2, #16 8002898: 701a strb r2, [r3, #0] break; 800289a: e384 b.n 8002fa6 case omM4bw2: (void) ramp(M4, BW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN); 800289c: 4b6d ldr r3, [pc, #436] @ (8002a54 ) 800289e: 88db ldrh r3, [r3, #6] 80028a0: b2da uxtb r2, r3 80028a2: 4b6d ldr r3, [pc, #436] @ (8002a58 ) 80028a4: 881b ldrh r3, [r3, #0] 80028a6: b2d9 uxtb r1, r3 80028a8: 4b6c ldr r3, [pc, #432] @ (8002a5c ) 80028aa: 881b ldrh r3, [r3, #0] 80028ac: b2db uxtb r3, r3 80028ae: 200a movs r0, #10 80028b0: 9001 str r0, [sp, #4] 80028b2: 9300 str r3, [sp, #0] 80028b4: 460b mov r3, r1 80028b6: 2101 movs r1, #1 80028b8: 2004 movs r0, #4 80028ba: f002 f90d bl 8004ad8 if (rtCiclo >= m4TimeoutMan) 80028be: 4b68 ldr r3, [pc, #416] @ (8002a60 ) 80028c0: 881b ldrh r3, [r3, #0] 80028c2: b29a uxth r2, r3 80028c4: 4b67 ldr r3, [pc, #412] @ (8002a64 ) 80028c6: 881b ldrh r3, [r3, #0] 80028c8: 429a cmp r2, r3 80028ca: d302 bcc.n 80028d2 stCiclo = omStopMan; 80028cc: 4b66 ldr r3, [pc, #408] @ (8002a68 ) 80028ce: 2211 movs r2, #17 80028d0: 701a strb r2, [r3, #0] if (pulsanti) 80028d2: 4b66 ldr r3, [pc, #408] @ (8002a6c ) 80028d4: 781b ldrb r3, [r3, #0] 80028d6: 2b00 cmp r3, #0 80028d8: f000 8367 beq.w 8002faa stCiclo = omStopMan; 80028dc: 4b62 ldr r3, [pc, #392] @ (8002a68 ) 80028de: 2211 movs r2, #17 80028e0: 701a strb r2, [r3, #0] break; 80028e2: e362 b.n 8002faa case omStopMan: SetMotPerc(M1, FW, 0); 80028e4: 2200 movs r2, #0 80028e6: 2100 movs r1, #0 80028e8: 2001 movs r0, #1 80028ea: f001 ff75 bl 80047d8 SetMotPerc(M2, FW, 0); 80028ee: 2200 movs r2, #0 80028f0: 2100 movs r1, #0 80028f2: 2002 movs r0, #2 80028f4: f001 ff70 bl 80047d8 SetMotPerc(M3, FW, 0); 80028f8: 2200 movs r2, #0 80028fa: 2100 movs r1, #0 80028fc: 2003 movs r0, #3 80028fe: f001 ff6b bl 80047d8 SetMotPerc(M4, FW, 0); 8002902: 2200 movs r2, #0 8002904: 2100 movs r1, #0 8002906: 2004 movs r0, #4 8002908: f001 ff66 bl 80047d8 SetMotPerc(M1, BW, 0); 800290c: 2200 movs r2, #0 800290e: 2101 movs r1, #1 8002910: 2001 movs r0, #1 8002912: f001 ff61 bl 80047d8 SetMotPerc(M2, BW, 0); 8002916: 2200 movs r2, #0 8002918: 2101 movs r1, #1 800291a: 2002 movs r0, #2 800291c: f001 ff5c bl 80047d8 SetMotPerc(M3, BW, 0); 8002920: 2200 movs r2, #0 8002922: 2101 movs r1, #1 8002924: 2003 movs r0, #3 8002926: f001 ff57 bl 80047d8 SetMotPerc(M4, BW, 0); 800292a: 2200 movs r2, #0 800292c: 2101 movs r1, #1 800292e: 2004 movs r0, #4 8002930: f001 ff52 bl 80047d8 if (pulsanti == 0) { 8002934: 4b4d ldr r3, [pc, #308] @ (8002a6c ) 8002936: 781b ldrb r3, [r3, #0] 8002938: 2b00 cmp r3, #0 800293a: f040 8338 bne.w 8002fae stBuz = bzoff; 800293e: 4b4c ldr r3, [pc, #304] @ (8002a70 ) 8002940: 2200 movs r2, #0 8002942: 701a strb r2, [r3, #0] stCiclo = omaperto; 8002944: 4b48 ldr r3, [pc, #288] @ (8002a68 ) 8002946: 2216 movs r2, #22 8002948: 701a strb r2, [r3, #0] } break; 800294a: e330 b.n 8002fae case omapertura0: if (rtCiclo >= 30) { //dopo 3 secondi 800294c: 4b44 ldr r3, [pc, #272] @ (8002a60 ) 800294e: 881b ldrh r3, [r3, #0] 8002950: b29b uxth r3, r3 8002952: 2b1d cmp r3, #29 8002954: d924 bls.n 80029a0 stBuz = bzmoving; 8002956: 4b46 ldr r3, [pc, #280] @ (8002a70 ) 8002958: 2201 movs r2, #1 800295a: 701a strb r2, [r3, #0] m1 = m1ap(); 800295c: f000 febe bl 80036dc 8002960: 4603 mov r3, r0 8002962: 71fb strb r3, [r7, #7] m2 = m2ap(); 8002964: f000 ff8c bl 8003880 8002968: 4603 mov r3, r0 800296a: 71bb strb r3, [r7, #6] m3 = m3ap(); 800296c: f001 f85a bl 8003a24 8002970: 4603 mov r3, r0 8002972: 717b strb r3, [r7, #5] m4 = m4ap(); 8002974: f001 f92a bl 8003bcc 8002978: 4603 mov r3, r0 800297a: 713b strb r3, [r7, #4] if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop) 800297c: 79fb ldrb r3, [r7, #7] 800297e: 2b04 cmp r3, #4 8002980: d10e bne.n 80029a0 8002982: 79bb ldrb r3, [r7, #6] 8002984: 2b04 cmp r3, #4 8002986: d10b bne.n 80029a0 8002988: 797b ldrb r3, [r7, #5] 800298a: 2b04 cmp r3, #4 800298c: d108 bne.n 80029a0 && (m4 == motStop)) { 800298e: 793b ldrb r3, [r7, #4] 8002990: 2b04 cmp r3, #4 8002992: d105 bne.n 80029a0 stBuz = bzoff; 8002994: 4b36 ldr r3, [pc, #216] @ (8002a70 ) 8002996: 2200 movs r2, #0 8002998: 701a strb r2, [r3, #0] stCiclo = omaperto; 800299a: 4b33 ldr r3, [pc, #204] @ (8002a68 ) 800299c: 2216 movs r2, #22 800299e: 701a strb r2, [r3, #0] } } if (stPulsanti & P1STOP) 80029a0: 4b34 ldr r3, [pc, #208] @ (8002a74 ) 80029a2: 881b ldrh r3, [r3, #0] 80029a4: f003 0302 and.w r3, r3, #2 80029a8: 2b00 cmp r3, #0 80029aa: d002 beq.n 80029b2 stCiclo = omstopapertura; 80029ac: 4b2e ldr r3, [pc, #184] @ (8002a68 ) 80029ae: 2213 movs r2, #19 80029b0: 701a strb r2, [r3, #0] if ((stPulsanti & P1START)&&(stPulsanti & P1RELEASED)) { 80029b2: 4b30 ldr r3, [pc, #192] @ (8002a74 ) 80029b4: 881b ldrh r3, [r3, #0] 80029b6: f003 0301 and.w r3, r3, #1 80029ba: 2b00 cmp r3, #0 80029bc: f000 82f9 beq.w 8002fb2 80029c0: 4b2c ldr r3, [pc, #176] @ (8002a74 ) 80029c2: 881b ldrh r3, [r3, #0] 80029c4: f403 5380 and.w r3, r3, #4096 @ 0x1000 80029c8: 2b00 cmp r3, #0 80029ca: f000 82f2 beq.w 8002fb2 stCiclo = omstoprestartchiusura; 80029ce: 4b26 ldr r3, [pc, #152] @ (8002a68 ) 80029d0: 2214 movs r2, #20 80029d2: 701a strb r2, [r3, #0] rtCiclo = 0; 80029d4: 4b22 ldr r3, [pc, #136] @ (8002a60 ) 80029d6: 2200 movs r2, #0 80029d8: 801a strh r2, [r3, #0] } break; 80029da: e2ea b.n 8002fb2 case omstopapertura: SetMotPerc(M1, FW, 0); 80029dc: 2200 movs r2, #0 80029de: 2100 movs r1, #0 80029e0: 2001 movs r0, #1 80029e2: f001 fef9 bl 80047d8 SetMotPerc(M2, FW, 0); 80029e6: 2200 movs r2, #0 80029e8: 2100 movs r1, #0 80029ea: 2002 movs r0, #2 80029ec: f001 fef4 bl 80047d8 SetMotPerc(M3, FW, 0); 80029f0: 2200 movs r2, #0 80029f2: 2100 movs r1, #0 80029f4: 2003 movs r0, #3 80029f6: f001 feef bl 80047d8 SetMotPerc(M4, FW, 0); 80029fa: 2200 movs r2, #0 80029fc: 2100 movs r1, #0 80029fe: 2004 movs r0, #4 8002a00: f001 feea bl 80047d8 SetMotPerc(M1, BW, 0); 8002a04: 2200 movs r2, #0 8002a06: 2101 movs r1, #1 8002a08: 2001 movs r0, #1 8002a0a: f001 fee5 bl 80047d8 SetMotPerc(M2, BW, 0); 8002a0e: 2200 movs r2, #0 8002a10: 2101 movs r1, #1 8002a12: 2002 movs r0, #2 8002a14: f001 fee0 bl 80047d8 SetMotPerc(M3, BW, 0); 8002a18: 2200 movs r2, #0 8002a1a: 2101 movs r1, #1 8002a1c: 2003 movs r0, #3 8002a1e: f001 fedb bl 80047d8 SetMotPerc(M4, BW, 0); 8002a22: 2200 movs r2, #0 8002a24: 2101 movs r1, #1 8002a26: 2004 movs r0, #4 8002a28: f001 fed6 bl 80047d8 if (pulsanti == 0) { 8002a2c: 4b0f ldr r3, [pc, #60] @ (8002a6c ) 8002a2e: 781b ldrb r3, [r3, #0] 8002a30: 2b00 cmp r3, #0 8002a32: f040 82c0 bne.w 8002fb6 stBuz = bzoff; 8002a36: 4b0e ldr r3, [pc, #56] @ (8002a70 ) 8002a38: 2200 movs r2, #0 8002a3a: 701a strb r2, [r3, #0] stCiclo = omchiuso; 8002a3c: 4b0a ldr r3, [pc, #40] @ (8002a68 ) 8002a3e: 2200 movs r2, #0 8002a40: 701a strb r2, [r3, #0] stPulsanti &= (~P1STOP); 8002a42: 4b0c ldr r3, [pc, #48] @ (8002a74 ) 8002a44: 881b ldrh r3, [r3, #0] 8002a46: f023 0302 bic.w r3, r3, #2 8002a4a: b29a uxth r2, r3 8002a4c: 4b09 ldr r3, [pc, #36] @ (8002a74 ) 8002a4e: 801a strh r2, [r3, #0] } break; 8002a50: e2b1 b.n 8002fb6 8002a52: bf00 nop 8002a54: 2000044c .word 0x2000044c 8002a58: 20000426 .word 0x20000426 8002a5c: 2000041e .word 0x2000041e 8002a60: 200003fc .word 0x200003fc 8002a64: 20000416 .word 0x20000416 8002a68: 20000456 .word 0x20000456 8002a6c: 200003f0 .word 0x200003f0 8002a70: 20000457 .word 0x20000457 8002a74: 20000454 .word 0x20000454 case omstoprestartchiusura: SetMotPerc(M1, FW, 0); 8002a78: 2200 movs r2, #0 8002a7a: 2100 movs r1, #0 8002a7c: 2001 movs r0, #1 8002a7e: f001 feab bl 80047d8 SetMotPerc(M2, FW, 0); 8002a82: 2200 movs r2, #0 8002a84: 2100 movs r1, #0 8002a86: 2002 movs r0, #2 8002a88: f001 fea6 bl 80047d8 SetMotPerc(M3, FW, 0); 8002a8c: 2200 movs r2, #0 8002a8e: 2100 movs r1, #0 8002a90: 2003 movs r0, #3 8002a92: f001 fea1 bl 80047d8 SetMotPerc(M4, FW, 0); 8002a96: 2200 movs r2, #0 8002a98: 2100 movs r1, #0 8002a9a: 2004 movs r0, #4 8002a9c: f001 fe9c bl 80047d8 SetMotPerc(M1, BW, 0); 8002aa0: 2200 movs r2, #0 8002aa2: 2101 movs r1, #1 8002aa4: 2001 movs r0, #1 8002aa6: f001 fe97 bl 80047d8 SetMotPerc(M2, BW, 0); 8002aaa: 2200 movs r2, #0 8002aac: 2101 movs r1, #1 8002aae: 2002 movs r0, #2 8002ab0: f001 fe92 bl 80047d8 SetMotPerc(M3, BW, 0); 8002ab4: 2200 movs r2, #0 8002ab6: 2101 movs r1, #1 8002ab8: 2003 movs r0, #3 8002aba: f001 fe8d bl 80047d8 SetMotPerc(M4, BW, 0); 8002abe: 2200 movs r2, #0 8002ac0: 2101 movs r1, #1 8002ac2: 2004 movs r0, #4 8002ac4: f001 fe88 bl 80047d8 stBuz = bzoff; 8002ac8: 4b98 ldr r3, [pc, #608] @ (8002d2c ) 8002aca: 2200 movs r2, #0 8002acc: 701a strb r2, [r3, #0] if (rtCiclo >= 20) 8002ace: 4b98 ldr r3, [pc, #608] @ (8002d30 ) 8002ad0: 881b ldrh r3, [r3, #0] 8002ad2: b29b uxth r3, r3 8002ad4: 2b13 cmp r3, #19 8002ad6: f240 8270 bls.w 8002fba stCiclo = omaperto; 8002ada: 4b96 ldr r3, [pc, #600] @ (8002d34 ) 8002adc: 2216 movs r2, #22 8002ade: 701a strb r2, [r3, #0] break; 8002ae0: e26b b.n 8002fba case omaperto: stPulsanti &= (~P1RELEASED); 8002ae2: 4b95 ldr r3, [pc, #596] @ (8002d38 ) 8002ae4: 881b ldrh r3, [r3, #0] 8002ae6: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8002aea: b29a uxth r2, r3 8002aec: 4b92 ldr r3, [pc, #584] @ (8002d38 ) 8002aee: 801a strh r2, [r3, #0] rtCiclo = 0; 8002af0: 4b8f ldr r3, [pc, #572] @ (8002d30 ) 8002af2: 2200 movs r2, #0 8002af4: 801a strh r2, [r3, #0] if (stPulsanti & P1START) { 8002af6: 4b90 ldr r3, [pc, #576] @ (8002d38 ) 8002af8: 881b ldrh r3, [r3, #0] 8002afa: f003 0301 and.w r3, r3, #1 8002afe: 2b00 cmp r3, #0 8002b00: d00d beq.n 8002b1e stBuz = bzmoving; 8002b02: 4b8a ldr r3, [pc, #552] @ (8002d2c ) 8002b04: 2201 movs r2, #1 8002b06: 701a strb r2, [r3, #0] //(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT); stCiclo = omchiusura1; 8002b08: 4b8a ldr r3, [pc, #552] @ (8002d34 ) 8002b0a: 2217 movs r2, #23 8002b0c: 701a strb r2, [r3, #0] (void) m1ch(); 8002b0e: f001 f931 bl 8003d74 (void) m2ch(); 8002b12: f001 fa01 bl 8003f18 (void) m3ch(); 8002b16: f001 fad1 bl 80040bc (void) m4ch(); 8002b1a: f001 fba3 bl 8004264 } if (ch8 > thanem) { 8002b1e: 4b87 ldr r3, [pc, #540] @ (8002d3c ) 8002b20: 881a ldrh r2, [r3, #0] 8002b22: 4b87 ldr r3, [pc, #540] @ (8002d40 ) 8002b24: 881b ldrh r3, [r3, #0] 8002b26: 429a cmp r2, r3 8002b28: d919 bls.n 8002b5e HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET); 8002b2a: 2201 movs r2, #1 8002b2c: f44f 4100 mov.w r1, #32768 @ 0x8000 8002b30: 4884 ldr r0, [pc, #528] @ (8002d44 ) 8002b32: f003 fd80 bl 8006636 if (rtAnem == 0) { 8002b36: 4b84 ldr r3, [pc, #528] @ (8002d48 ) 8002b38: 881b ldrh r3, [r3, #0] 8002b3a: b29b uxth r3, r3 8002b3c: 2b00 cmp r3, #0 8002b3e: d118 bne.n 8002b72 stBuz = bzmoving; 8002b40: 4b7a ldr r3, [pc, #488] @ (8002d2c ) 8002b42: 2201 movs r2, #1 8002b44: 701a strb r2, [r3, #0] stCiclo = omemergenza1; 8002b46: 4b7b ldr r3, [pc, #492] @ (8002d34 ) 8002b48: 2218 movs r2, #24 8002b4a: 701a strb r2, [r3, #0] (void) m1ch(); 8002b4c: f001 f912 bl 8003d74 (void) m2ch(); 8002b50: f001 f9e2 bl 8003f18 (void) m3ch(); 8002b54: f001 fab2 bl 80040bc (void) m4ch(); 8002b58: f001 fb84 bl 8004264 8002b5c: e009 b.n 8002b72 } } else{ HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET); 8002b5e: 2200 movs r2, #0 8002b60: f44f 4100 mov.w r1, #32768 @ 0x8000 8002b64: 4877 ldr r0, [pc, #476] @ (8002d44 ) 8002b66: f003 fd66 bl 8006636 rtAnem = tanem; 8002b6a: 4b78 ldr r3, [pc, #480] @ (8002d4c ) 8002b6c: 881a ldrh r2, [r3, #0] 8002b6e: 4b76 ldr r3, [pc, #472] @ (8002d48 ) 8002b70: 801a strh r2, [r3, #0] } if (stPulsanti & P1STOP) 8002b72: 4b71 ldr r3, [pc, #452] @ (8002d38 ) 8002b74: 881b ldrh r3, [r3, #0] 8002b76: f003 0302 and.w r3, r3, #2 8002b7a: 2b00 cmp r3, #0 8002b7c: d003 beq.n 8002b86 stCiclo = omstopchiusura; 8002b7e: 4b6d ldr r3, [pc, #436] @ (8002d34 ) 8002b80: 2219 movs r2, #25 8002b82: 701a strb r2, [r3, #0] stBuz = bzmoving; (void) ramp(M4, BW, mrampstart[M4 - 1], m3pwmMan, trampman, RAMPINIT); stCiclo = omM4bw1; } break; 8002b84: e21b b.n 8002fbe else if (stPulsanti & M1FW) { 8002b86: 4b6c ldr r3, [pc, #432] @ (8002d38 ) 8002b88: 881b ldrh r3, [r3, #0] 8002b8a: f003 0310 and.w r3, r3, #16 8002b8e: 2b00 cmp r3, #0 8002b90: d017 beq.n 8002bc2 stBuz = bzmoving; 8002b92: 4b66 ldr r3, [pc, #408] @ (8002d2c ) 8002b94: 2201 movs r2, #1 8002b96: 701a strb r2, [r3, #0] (void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, 8002b98: 4b6d ldr r3, [pc, #436] @ (8002d50 ) 8002b9a: 881b ldrh r3, [r3, #0] 8002b9c: b2da uxtb r2, r3 8002b9e: 4b6d ldr r3, [pc, #436] @ (8002d54 ) 8002ba0: 881b ldrh r3, [r3, #0] 8002ba2: b2d9 uxtb r1, r3 8002ba4: 4b6c ldr r3, [pc, #432] @ (8002d58 ) 8002ba6: 881b ldrh r3, [r3, #0] 8002ba8: b2db uxtb r3, r3 8002baa: 2000 movs r0, #0 8002bac: 9001 str r0, [sp, #4] 8002bae: 9300 str r3, [sp, #0] 8002bb0: 460b mov r3, r1 8002bb2: 2100 movs r1, #0 8002bb4: 2001 movs r0, #1 8002bb6: f001 ff8f bl 8004ad8 stCiclo = omM1fw1; 8002bba: 4b5e ldr r3, [pc, #376] @ (8002d34 ) 8002bbc: 2201 movs r2, #1 8002bbe: 701a strb r2, [r3, #0] break; 8002bc0: e1fd b.n 8002fbe } else if (stPulsanti & M1BW) { 8002bc2: 4b5d ldr r3, [pc, #372] @ (8002d38 ) 8002bc4: 881b ldrh r3, [r3, #0] 8002bc6: f003 0320 and.w r3, r3, #32 8002bca: 2b00 cmp r3, #0 8002bcc: d017 beq.n 8002bfe stBuz = bzmoving; 8002bce: 4b57 ldr r3, [pc, #348] @ (8002d2c ) 8002bd0: 2201 movs r2, #1 8002bd2: 701a strb r2, [r3, #0] (void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, 8002bd4: 4b5e ldr r3, [pc, #376] @ (8002d50 ) 8002bd6: 881b ldrh r3, [r3, #0] 8002bd8: b2da uxtb r2, r3 8002bda: 4b5e ldr r3, [pc, #376] @ (8002d54 ) 8002bdc: 881b ldrh r3, [r3, #0] 8002bde: b2d9 uxtb r1, r3 8002be0: 4b5d ldr r3, [pc, #372] @ (8002d58 ) 8002be2: 881b ldrh r3, [r3, #0] 8002be4: b2db uxtb r3, r3 8002be6: 2000 movs r0, #0 8002be8: 9001 str r0, [sp, #4] 8002bea: 9300 str r3, [sp, #0] 8002bec: 460b mov r3, r1 8002bee: 2101 movs r1, #1 8002bf0: 2001 movs r0, #1 8002bf2: f001 ff71 bl 8004ad8 stCiclo = omM1bw1; 8002bf6: 4b4f ldr r3, [pc, #316] @ (8002d34 ) 8002bf8: 2203 movs r2, #3 8002bfa: 701a strb r2, [r3, #0] break; 8002bfc: e1df b.n 8002fbe } else if (stPulsanti & M2FW) { 8002bfe: 4b4e ldr r3, [pc, #312] @ (8002d38 ) 8002c00: 881b ldrh r3, [r3, #0] 8002c02: f003 0340 and.w r3, r3, #64 @ 0x40 8002c06: 2b00 cmp r3, #0 8002c08: d017 beq.n 8002c3a stBuz = bzmoving; 8002c0a: 4b48 ldr r3, [pc, #288] @ (8002d2c ) 8002c0c: 2201 movs r2, #1 8002c0e: 701a strb r2, [r3, #0] (void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, 8002c10: 4b4f ldr r3, [pc, #316] @ (8002d50 ) 8002c12: 885b ldrh r3, [r3, #2] 8002c14: b2da uxtb r2, r3 8002c16: 4b51 ldr r3, [pc, #324] @ (8002d5c ) 8002c18: 881b ldrh r3, [r3, #0] 8002c1a: b2d9 uxtb r1, r3 8002c1c: 4b4e ldr r3, [pc, #312] @ (8002d58 ) 8002c1e: 881b ldrh r3, [r3, #0] 8002c20: b2db uxtb r3, r3 8002c22: 2000 movs r0, #0 8002c24: 9001 str r0, [sp, #4] 8002c26: 9300 str r3, [sp, #0] 8002c28: 460b mov r3, r1 8002c2a: 2100 movs r1, #0 8002c2c: 2002 movs r0, #2 8002c2e: f001 ff53 bl 8004ad8 stCiclo = omM2fw1; 8002c32: 4b40 ldr r3, [pc, #256] @ (8002d34 ) 8002c34: 2205 movs r2, #5 8002c36: 701a strb r2, [r3, #0] break; 8002c38: e1c1 b.n 8002fbe } else if (stPulsanti & M2BW) { 8002c3a: 4b3f ldr r3, [pc, #252] @ (8002d38 ) 8002c3c: 881b ldrh r3, [r3, #0] 8002c3e: f003 0380 and.w r3, r3, #128 @ 0x80 8002c42: 2b00 cmp r3, #0 8002c44: d017 beq.n 8002c76 stBuz = bzmoving; 8002c46: 4b39 ldr r3, [pc, #228] @ (8002d2c ) 8002c48: 2201 movs r2, #1 8002c4a: 701a strb r2, [r3, #0] (void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, 8002c4c: 4b40 ldr r3, [pc, #256] @ (8002d50 ) 8002c4e: 885b ldrh r3, [r3, #2] 8002c50: b2da uxtb r2, r3 8002c52: 4b42 ldr r3, [pc, #264] @ (8002d5c ) 8002c54: 881b ldrh r3, [r3, #0] 8002c56: b2d9 uxtb r1, r3 8002c58: 4b3f ldr r3, [pc, #252] @ (8002d58 ) 8002c5a: 881b ldrh r3, [r3, #0] 8002c5c: b2db uxtb r3, r3 8002c5e: 2000 movs r0, #0 8002c60: 9001 str r0, [sp, #4] 8002c62: 9300 str r3, [sp, #0] 8002c64: 460b mov r3, r1 8002c66: 2101 movs r1, #1 8002c68: 2002 movs r0, #2 8002c6a: f001 ff35 bl 8004ad8 stCiclo = omM2bw1; 8002c6e: 4b31 ldr r3, [pc, #196] @ (8002d34 ) 8002c70: 2207 movs r2, #7 8002c72: 701a strb r2, [r3, #0] break; 8002c74: e1a3 b.n 8002fbe } else if (stPulsanti & M3FW) { 8002c76: 4b30 ldr r3, [pc, #192] @ (8002d38 ) 8002c78: 881b ldrh r3, [r3, #0] 8002c7a: f403 7380 and.w r3, r3, #256 @ 0x100 8002c7e: 2b00 cmp r3, #0 8002c80: d017 beq.n 8002cb2 stBuz = bzmoving; 8002c82: 4b2a ldr r3, [pc, #168] @ (8002d2c ) 8002c84: 2201 movs r2, #1 8002c86: 701a strb r2, [r3, #0] (void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, 8002c88: 4b31 ldr r3, [pc, #196] @ (8002d50 ) 8002c8a: 889b ldrh r3, [r3, #4] 8002c8c: b2da uxtb r2, r3 8002c8e: 4b34 ldr r3, [pc, #208] @ (8002d60 ) 8002c90: 881b ldrh r3, [r3, #0] 8002c92: b2d9 uxtb r1, r3 8002c94: 4b30 ldr r3, [pc, #192] @ (8002d58 ) 8002c96: 881b ldrh r3, [r3, #0] 8002c98: b2db uxtb r3, r3 8002c9a: 2000 movs r0, #0 8002c9c: 9001 str r0, [sp, #4] 8002c9e: 9300 str r3, [sp, #0] 8002ca0: 460b mov r3, r1 8002ca2: 2100 movs r1, #0 8002ca4: 2003 movs r0, #3 8002ca6: f001 ff17 bl 8004ad8 stCiclo = omM3fw1; 8002caa: 4b22 ldr r3, [pc, #136] @ (8002d34 ) 8002cac: 2209 movs r2, #9 8002cae: 701a strb r2, [r3, #0] break; 8002cb0: e185 b.n 8002fbe } else if (stPulsanti & M3BW) { 8002cb2: 4b21 ldr r3, [pc, #132] @ (8002d38 ) 8002cb4: 881b ldrh r3, [r3, #0] 8002cb6: f403 7300 and.w r3, r3, #512 @ 0x200 8002cba: 2b00 cmp r3, #0 8002cbc: d017 beq.n 8002cee stBuz = bzmoving; 8002cbe: 4b1b ldr r3, [pc, #108] @ (8002d2c ) 8002cc0: 2201 movs r2, #1 8002cc2: 701a strb r2, [r3, #0] (void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, 8002cc4: 4b22 ldr r3, [pc, #136] @ (8002d50 ) 8002cc6: 889b ldrh r3, [r3, #4] 8002cc8: b2da uxtb r2, r3 8002cca: 4b25 ldr r3, [pc, #148] @ (8002d60 ) 8002ccc: 881b ldrh r3, [r3, #0] 8002cce: b2d9 uxtb r1, r3 8002cd0: 4b21 ldr r3, [pc, #132] @ (8002d58 ) 8002cd2: 881b ldrh r3, [r3, #0] 8002cd4: b2db uxtb r3, r3 8002cd6: 2000 movs r0, #0 8002cd8: 9001 str r0, [sp, #4] 8002cda: 9300 str r3, [sp, #0] 8002cdc: 460b mov r3, r1 8002cde: 2101 movs r1, #1 8002ce0: 2003 movs r0, #3 8002ce2: f001 fef9 bl 8004ad8 stCiclo = omM3bw1; 8002ce6: 4b13 ldr r3, [pc, #76] @ (8002d34 ) 8002ce8: 220b movs r2, #11 8002cea: 701a strb r2, [r3, #0] break; 8002cec: e167 b.n 8002fbe } else if (stPulsanti & M4FW) { 8002cee: 4b12 ldr r3, [pc, #72] @ (8002d38 ) 8002cf0: 881b ldrh r3, [r3, #0] 8002cf2: f403 6380 and.w r3, r3, #1024 @ 0x400 8002cf6: 2b00 cmp r3, #0 8002cf8: d034 beq.n 8002d64 stBuz = bzmoving; 8002cfa: 4b0c ldr r3, [pc, #48] @ (8002d2c ) 8002cfc: 2201 movs r2, #1 8002cfe: 701a strb r2, [r3, #0] (void) ramp(M4, FW, mrampstart[M4 - 1], m3pwmMan, trampman, 8002d00: 4b13 ldr r3, [pc, #76] @ (8002d50 ) 8002d02: 88db ldrh r3, [r3, #6] 8002d04: b2da uxtb r2, r3 8002d06: 4b16 ldr r3, [pc, #88] @ (8002d60 ) 8002d08: 881b ldrh r3, [r3, #0] 8002d0a: b2d9 uxtb r1, r3 8002d0c: 4b12 ldr r3, [pc, #72] @ (8002d58 ) 8002d0e: 881b ldrh r3, [r3, #0] 8002d10: b2db uxtb r3, r3 8002d12: 2000 movs r0, #0 8002d14: 9001 str r0, [sp, #4] 8002d16: 9300 str r3, [sp, #0] 8002d18: 460b mov r3, r1 8002d1a: 2100 movs r1, #0 8002d1c: 2004 movs r0, #4 8002d1e: f001 fedb bl 8004ad8 stCiclo = omM4fw1; 8002d22: 4b04 ldr r3, [pc, #16] @ (8002d34 ) 8002d24: 220d movs r2, #13 8002d26: 701a strb r2, [r3, #0] break; 8002d28: e149 b.n 8002fbe 8002d2a: bf00 nop 8002d2c: 20000457 .word 0x20000457 8002d30: 200003fc .word 0x200003fc 8002d34: 20000456 .word 0x20000456 8002d38: 20000454 .word 0x20000454 8002d3c: 20000232 .word 0x20000232 8002d40: 2000041c .word 0x2000041c 8002d44: 40010800 .word 0x40010800 8002d48: 200003fe .word 0x200003fe 8002d4c: 2000041a .word 0x2000041a 8002d50: 2000044c .word 0x2000044c 8002d54: 20000420 .word 0x20000420 8002d58: 2000041e .word 0x2000041e 8002d5c: 20000422 .word 0x20000422 8002d60: 20000424 .word 0x20000424 } else if (stPulsanti & M4BW) { 8002d64: 4b9c ldr r3, [pc, #624] @ (8002fd8 ) 8002d66: 881b ldrh r3, [r3, #0] 8002d68: f403 6300 and.w r3, r3, #2048 @ 0x800 8002d6c: 2b00 cmp r3, #0 8002d6e: f000 8126 beq.w 8002fbe stBuz = bzmoving; 8002d72: 4b9a ldr r3, [pc, #616] @ (8002fdc ) 8002d74: 2201 movs r2, #1 8002d76: 701a strb r2, [r3, #0] (void) ramp(M4, BW, mrampstart[M4 - 1], m3pwmMan, trampman, 8002d78: 4b99 ldr r3, [pc, #612] @ (8002fe0 ) 8002d7a: 88db ldrh r3, [r3, #6] 8002d7c: b2da uxtb r2, r3 8002d7e: 4b99 ldr r3, [pc, #612] @ (8002fe4 ) 8002d80: 881b ldrh r3, [r3, #0] 8002d82: b2d9 uxtb r1, r3 8002d84: 4b98 ldr r3, [pc, #608] @ (8002fe8 ) 8002d86: 881b ldrh r3, [r3, #0] 8002d88: b2db uxtb r3, r3 8002d8a: 2000 movs r0, #0 8002d8c: 9001 str r0, [sp, #4] 8002d8e: 9300 str r3, [sp, #0] 8002d90: 460b mov r3, r1 8002d92: 2101 movs r1, #1 8002d94: 2004 movs r0, #4 8002d96: f001 fe9f bl 8004ad8 stCiclo = omM4bw1; 8002d9a: 4b94 ldr r3, [pc, #592] @ (8002fec ) 8002d9c: 220f movs r2, #15 8002d9e: 701a strb r2, [r3, #0] break; 8002da0: e10d b.n 8002fbe case omchiusura1: if (rtCiclo >= 10) { //doppo 1 secondi 8002da2: 4b93 ldr r3, [pc, #588] @ (8002ff0 ) 8002da4: 881b ldrh r3, [r3, #0] 8002da6: b29b uxth r3, r3 8002da8: 2b09 cmp r3, #9 8002daa: d924 bls.n 8002df6 m1 = m1ch(); 8002dac: f000 ffe2 bl 8003d74 8002db0: 4603 mov r3, r0 8002db2: 71fb strb r3, [r7, #7] m2 = m2ch(); 8002db4: f001 f8b0 bl 8003f18 8002db8: 4603 mov r3, r0 8002dba: 71bb strb r3, [r7, #6] m3 = m3ch(); 8002dbc: f001 f97e bl 80040bc 8002dc0: 4603 mov r3, r0 8002dc2: 717b strb r3, [r7, #5] m4 = m4ch(); 8002dc4: f001 fa4e bl 8004264 8002dc8: 4603 mov r3, r0 8002dca: 713b strb r3, [r7, #4] if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop) 8002dcc: 79fb ldrb r3, [r7, #7] 8002dce: 2b04 cmp r3, #4 8002dd0: d111 bne.n 8002df6 8002dd2: 79bb ldrb r3, [r7, #6] 8002dd4: 2b04 cmp r3, #4 8002dd6: d10e bne.n 8002df6 8002dd8: 797b ldrb r3, [r7, #5] 8002dda: 2b04 cmp r3, #4 8002ddc: d10b bne.n 8002df6 && (m4 == motStop)) { 8002dde: 793b ldrb r3, [r7, #4] 8002de0: 2b04 cmp r3, #4 8002de2: d108 bne.n 8002df6 stBuz = bzoff; 8002de4: 4b7d ldr r3, [pc, #500] @ (8002fdc ) 8002de6: 2200 movs r2, #0 8002de8: 701a strb r2, [r3, #0] stCiclo = omchiuso; 8002dea: 4b80 ldr r3, [pc, #512] @ (8002fec ) 8002dec: 2200 movs r2, #0 8002dee: 701a strb r2, [r3, #0] fchiuso = true; 8002df0: 4b80 ldr r3, [pc, #512] @ (8002ff4 ) 8002df2: 2201 movs r2, #1 8002df4: 701a strb r2, [r3, #0] } } if (stPulsanti & P1STOP) 8002df6: 4b78 ldr r3, [pc, #480] @ (8002fd8 ) 8002df8: 881b ldrh r3, [r3, #0] 8002dfa: f003 0302 and.w r3, r3, #2 8002dfe: 2b00 cmp r3, #0 8002e00: d002 beq.n 8002e08 stCiclo = omstopchiusura; 8002e02: 4b7a ldr r3, [pc, #488] @ (8002fec ) 8002e04: 2219 movs r2, #25 8002e06: 701a strb r2, [r3, #0] if ((stPulsanti & P1START)&&(stPulsanti & P1RELEASED)) { 8002e08: 4b73 ldr r3, [pc, #460] @ (8002fd8 ) 8002e0a: 881b ldrh r3, [r3, #0] 8002e0c: f003 0301 and.w r3, r3, #1 8002e10: 2b00 cmp r3, #0 8002e12: f000 80d6 beq.w 8002fc2 8002e16: 4b70 ldr r3, [pc, #448] @ (8002fd8 ) 8002e18: 881b ldrh r3, [r3, #0] 8002e1a: f403 5380 and.w r3, r3, #4096 @ 0x1000 8002e1e: 2b00 cmp r3, #0 8002e20: f000 80cf beq.w 8002fc2 stCiclo = omstoprestartapertura; 8002e24: 4b71 ldr r3, [pc, #452] @ (8002fec ) 8002e26: 2215 movs r2, #21 8002e28: 701a strb r2, [r3, #0] rtCiclo = 0; 8002e2a: 4b71 ldr r3, [pc, #452] @ (8002ff0 ) 8002e2c: 2200 movs r2, #0 8002e2e: 801a strh r2, [r3, #0] } break; 8002e30: e0c7 b.n 8002fc2 case omemergenza1: if (rtCiclo >= 10) { //doppo 1 secondi 8002e32: 4b6f ldr r3, [pc, #444] @ (8002ff0 ) 8002e34: 881b ldrh r3, [r3, #0] 8002e36: b29b uxth r3, r3 8002e38: 2b09 cmp r3, #9 8002e3a: f240 80c4 bls.w 8002fc6 m1 = m1ch(); 8002e3e: f000 ff99 bl 8003d74 8002e42: 4603 mov r3, r0 8002e44: 71fb strb r3, [r7, #7] m2 = m2ch(); 8002e46: f001 f867 bl 8003f18 8002e4a: 4603 mov r3, r0 8002e4c: 71bb strb r3, [r7, #6] m3 = m3ch(); 8002e4e: f001 f935 bl 80040bc 8002e52: 4603 mov r3, r0 8002e54: 717b strb r3, [r7, #5] m4 = m4ch(); 8002e56: f001 fa05 bl 8004264 8002e5a: 4603 mov r3, r0 8002e5c: 713b strb r3, [r7, #4] if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop) 8002e5e: 79fb ldrb r3, [r7, #7] 8002e60: 2b04 cmp r3, #4 8002e62: f040 80b0 bne.w 8002fc6 8002e66: 79bb ldrb r3, [r7, #6] 8002e68: 2b04 cmp r3, #4 8002e6a: f040 80ac bne.w 8002fc6 8002e6e: 797b ldrb r3, [r7, #5] 8002e70: 2b04 cmp r3, #4 8002e72: f040 80a8 bne.w 8002fc6 && (m4 == motStop)) { 8002e76: 793b ldrb r3, [r7, #4] 8002e78: 2b04 cmp r3, #4 8002e7a: f040 80a4 bne.w 8002fc6 stBuz = bzoff; 8002e7e: 4b57 ldr r3, [pc, #348] @ (8002fdc ) 8002e80: 2200 movs r2, #0 8002e82: 701a strb r2, [r3, #0] stCiclo = omchiuso; 8002e84: 4b59 ldr r3, [pc, #356] @ (8002fec ) 8002e86: 2200 movs r2, #0 8002e88: 701a strb r2, [r3, #0] fchiuso = true; 8002e8a: 4b5a ldr r3, [pc, #360] @ (8002ff4 ) 8002e8c: 2201 movs r2, #1 8002e8e: 701a strb r2, [r3, #0] } } break; 8002e90: e099 b.n 8002fc6 case omstoprestartapertura: SetMotPerc(M1, FW, 0); 8002e92: 2200 movs r2, #0 8002e94: 2100 movs r1, #0 8002e96: 2001 movs r0, #1 8002e98: f001 fc9e bl 80047d8 SetMotPerc(M2, FW, 0); 8002e9c: 2200 movs r2, #0 8002e9e: 2100 movs r1, #0 8002ea0: 2002 movs r0, #2 8002ea2: f001 fc99 bl 80047d8 SetMotPerc(M3, FW, 0); 8002ea6: 2200 movs r2, #0 8002ea8: 2100 movs r1, #0 8002eaa: 2003 movs r0, #3 8002eac: f001 fc94 bl 80047d8 SetMotPerc(M4, FW, 0); 8002eb0: 2200 movs r2, #0 8002eb2: 2100 movs r1, #0 8002eb4: 2004 movs r0, #4 8002eb6: f001 fc8f bl 80047d8 SetMotPerc(M1, BW, 0); 8002eba: 2200 movs r2, #0 8002ebc: 2101 movs r1, #1 8002ebe: 2001 movs r0, #1 8002ec0: f001 fc8a bl 80047d8 SetMotPerc(M2, BW, 0); 8002ec4: 2200 movs r2, #0 8002ec6: 2101 movs r1, #1 8002ec8: 2002 movs r0, #2 8002eca: f001 fc85 bl 80047d8 SetMotPerc(M3, BW, 0); 8002ece: 2200 movs r2, #0 8002ed0: 2101 movs r1, #1 8002ed2: 2003 movs r0, #3 8002ed4: f001 fc80 bl 80047d8 SetMotPerc(M4, BW, 0); 8002ed8: 2200 movs r2, #0 8002eda: 2101 movs r1, #1 8002edc: 2004 movs r0, #4 8002ede: f001 fc7b bl 80047d8 stBuz = bzoff; 8002ee2: 4b3e ldr r3, [pc, #248] @ (8002fdc ) 8002ee4: 2200 movs r2, #0 8002ee6: 701a strb r2, [r3, #0] if (rtCiclo >= 20) 8002ee8: 4b41 ldr r3, [pc, #260] @ (8002ff0 ) 8002eea: 881b ldrh r3, [r3, #0] 8002eec: b29b uxth r3, r3 8002eee: 2b13 cmp r3, #19 8002ef0: d96b bls.n 8002fca stCiclo = omchiuso; 8002ef2: 4b3e ldr r3, [pc, #248] @ (8002fec ) 8002ef4: 2200 movs r2, #0 8002ef6: 701a strb r2, [r3, #0] break; 8002ef8: e067 b.n 8002fca case omstopchiusura: SetMotPerc(M1, FW, 0); 8002efa: 2200 movs r2, #0 8002efc: 2100 movs r1, #0 8002efe: 2001 movs r0, #1 8002f00: f001 fc6a bl 80047d8 SetMotPerc(M2, FW, 0); 8002f04: 2200 movs r2, #0 8002f06: 2100 movs r1, #0 8002f08: 2002 movs r0, #2 8002f0a: f001 fc65 bl 80047d8 SetMotPerc(M3, FW, 0); 8002f0e: 2200 movs r2, #0 8002f10: 2100 movs r1, #0 8002f12: 2003 movs r0, #3 8002f14: f001 fc60 bl 80047d8 SetMotPerc(M4, FW, 0); 8002f18: 2200 movs r2, #0 8002f1a: 2100 movs r1, #0 8002f1c: 2004 movs r0, #4 8002f1e: f001 fc5b bl 80047d8 SetMotPerc(M1, BW, 0); 8002f22: 2200 movs r2, #0 8002f24: 2101 movs r1, #1 8002f26: 2001 movs r0, #1 8002f28: f001 fc56 bl 80047d8 SetMotPerc(M2, BW, 0); 8002f2c: 2200 movs r2, #0 8002f2e: 2101 movs r1, #1 8002f30: 2002 movs r0, #2 8002f32: f001 fc51 bl 80047d8 SetMotPerc(M3, BW, 0); 8002f36: 2200 movs r2, #0 8002f38: 2101 movs r1, #1 8002f3a: 2003 movs r0, #3 8002f3c: f001 fc4c bl 80047d8 SetMotPerc(M4, BW, 0); 8002f40: 2200 movs r2, #0 8002f42: 2101 movs r1, #1 8002f44: 2004 movs r0, #4 8002f46: f001 fc47 bl 80047d8 if (pulsanti == 0) { 8002f4a: 4b2b ldr r3, [pc, #172] @ (8002ff8 ) 8002f4c: 781b ldrb r3, [r3, #0] 8002f4e: 2b00 cmp r3, #0 8002f50: d13d bne.n 8002fce stBuz = bzoff; 8002f52: 4b22 ldr r3, [pc, #136] @ (8002fdc ) 8002f54: 2200 movs r2, #0 8002f56: 701a strb r2, [r3, #0] stCiclo = omaperto; 8002f58: 4b24 ldr r3, [pc, #144] @ (8002fec ) 8002f5a: 2216 movs r2, #22 8002f5c: 701a strb r2, [r3, #0] stPulsanti &= (~P1STOP); 8002f5e: 4b1e ldr r3, [pc, #120] @ (8002fd8 ) 8002f60: 881b ldrh r3, [r3, #0] 8002f62: f023 0302 bic.w r3, r3, #2 8002f66: b29a uxth r2, r3 8002f68: 4b1b ldr r3, [pc, #108] @ (8002fd8 ) 8002f6a: 801a strh r2, [r3, #0] } break; 8002f6c: e02f b.n 8002fce break; 8002f6e: bf00 nop 8002f70: e02e b.n 8002fd0 break; 8002f72: bf00 nop 8002f74: e02c b.n 8002fd0 break; 8002f76: bf00 nop 8002f78: e02a b.n 8002fd0 break; 8002f7a: bf00 nop 8002f7c: e028 b.n 8002fd0 break; 8002f7e: bf00 nop 8002f80: e026 b.n 8002fd0 break; 8002f82: bf00 nop 8002f84: e024 b.n 8002fd0 break; 8002f86: bf00 nop 8002f88: e022 b.n 8002fd0 break; 8002f8a: bf00 nop 8002f8c: e020 b.n 8002fd0 break; 8002f8e: bf00 nop 8002f90: e01e b.n 8002fd0 break; 8002f92: bf00 nop 8002f94: e01c b.n 8002fd0 break; 8002f96: bf00 nop 8002f98: e01a b.n 8002fd0 break; 8002f9a: bf00 nop 8002f9c: e018 b.n 8002fd0 break; 8002f9e: bf00 nop 8002fa0: e016 b.n 8002fd0 break; 8002fa2: bf00 nop 8002fa4: e014 b.n 8002fd0 break; 8002fa6: bf00 nop 8002fa8: e012 b.n 8002fd0 break; 8002faa: bf00 nop 8002fac: e010 b.n 8002fd0 break; 8002fae: bf00 nop 8002fb0: e00e b.n 8002fd0 break; 8002fb2: bf00 nop 8002fb4: e00c b.n 8002fd0 break; 8002fb6: bf00 nop 8002fb8: e00a b.n 8002fd0 break; 8002fba: bf00 nop 8002fbc: e008 b.n 8002fd0 break; 8002fbe: bf00 nop 8002fc0: e006 b.n 8002fd0 break; 8002fc2: bf00 nop 8002fc4: e004 b.n 8002fd0 break; 8002fc6: bf00 nop 8002fc8: e002 b.n 8002fd0 break; 8002fca: bf00 nop 8002fcc: e000 b.n 8002fd0 break; 8002fce: bf00 nop } } 8002fd0: bf00 nop 8002fd2: 3708 adds r7, #8 8002fd4: 46bd mov sp, r7 8002fd6: bd80 pop {r7, pc} 8002fd8: 20000454 .word 0x20000454 8002fdc: 20000457 .word 0x20000457 8002fe0: 2000044c .word 0x2000044c 8002fe4: 20000424 .word 0x20000424 8002fe8: 2000041e .word 0x2000041e 8002fec: 20000456 .word 0x20000456 8002ff0: 200003fc .word 0x200003fc 8002ff4: 20000459 .word 0x20000459 8002ff8: 200003f0 .word 0x200003f0 08002ffc
: /** * @brief The application entry point. * @retval int */ int main(void) { 8002ffc: b580 push {r7, lr} 8002ffe: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8003000: f002 f84e bl 80050a0 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8003004: f000 f856 bl 80030b4 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8003008: f000 fab8 bl 800357c MX_DMA_Init(); 800300c: f000 fa98 bl 8003540 MX_USB_DEVICE_Init(); 8003010: f00a fce6 bl 800d9e0 MX_TIM2_Init(); 8003014: f000 f924 bl 8003260 MX_TIM4_Init(); 8003018: f000 f9c6 bl 80033a8 MX_ADC1_Init(); 800301c: f000 f8a8 bl 8003170 MX_USART1_UART_Init(); 8003020: f000 fa64 bl 80034ec /* USER CODE BEGIN 2 */ HAL_ADC_Start_DMA(&hadc1, (uint32_t*) adc_dma_buf, ADC_NUM_CHANNELS); 8003024: 2205 movs r2, #5 8003026: 491e ldr r1, [pc, #120] @ (80030a0 ) 8003028: 481e ldr r0, [pc, #120] @ (80030a4 ) 800302a: f002 f973 bl 8005314 StopMot(timMot1, FWMot1); 800302e: 2100 movs r1, #0 8003030: 481d ldr r0, [pc, #116] @ (80030a8 ) 8003032: f001 f9fe bl 8004432 StopMot(timMot1, BWMot1); 8003036: 2104 movs r1, #4 8003038: 481b ldr r0, [pc, #108] @ (80030a8 ) 800303a: f001 f9fa bl 8004432 StopMot(timMot2, FWMot2); 800303e: 2108 movs r1, #8 8003040: 4819 ldr r0, [pc, #100] @ (80030a8 ) 8003042: f001 f9f6 bl 8004432 StopMot(timMot2, BWMot2); 8003046: 210c movs r1, #12 8003048: 4817 ldr r0, [pc, #92] @ (80030a8 ) 800304a: f001 f9f2 bl 8004432 StopMot(timMot3, FWMot3); 800304e: 2100 movs r1, #0 8003050: 4816 ldr r0, [pc, #88] @ (80030ac ) 8003052: f001 f9ee bl 8004432 StopMot(timMot3, BWMot3); 8003056: 2104 movs r1, #4 8003058: 4814 ldr r0, [pc, #80] @ (80030ac ) 800305a: f001 f9ea bl 8004432 StopMot(timMot4, FWMot4); 800305e: 2108 movs r1, #8 8003060: 4812 ldr r0, [pc, #72] @ (80030ac ) 8003062: f001 f9e6 bl 8004432 StopMot(timMot4, BWMot4); 8003066: 210c movs r1, #12 8003068: 4810 ldr r0, [pc, #64] @ (80030ac ) 800306a: f001 f9e2 bl 8004432 //CDC_Transmit_FS((uint8_t*)"Start\r\n", 7); //while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY); if (EE_Init() != EE_OK) { 800306e: f7fe fa9b bl 80015a8 8003072: 4603 mov r3, r0 8003074: 2b00 cmp r3, #0 8003076: d001 beq.n 800307c for (;;) 8003078: bf00 nop 800307a: e7fd b.n 8003078 ; //errore eeprom } loadEE(); 800307c: f7fe fb7e bl 800177c // } /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ fchiuso = false; 8003080: 4b0b ldr r3, [pc, #44] @ (80030b0 ) 8003082: 2200 movs r2, #0 8003084: 701a strb r2, [r3, #0] while (1) { manageCDC(); 8003086: f7fd f9b9 bl 80003fc manageAdc(); 800308a: f7fd f867 bl 800015c managePulsanti(); 800308e: f7fe ff97 bl 8001fc0 manageCiclo(); 8003092: f7ff f901 bl 8002298 debug(); 8003096: f7fe f88d bl 80011b4 manageCDC(); 800309a: bf00 nop 800309c: e7f3 b.n 8003086 800309e: bf00 nop 80030a0: 200001fc .word 0x200001fc 80030a4: 200002a4 .word 0x200002a4 80030a8: 20000318 .word 0x20000318 80030ac: 20000360 .word 0x20000360 80030b0: 20000459 .word 0x20000459 080030b4 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80030b4: b580 push {r7, lr} 80030b6: b094 sub sp, #80 @ 0x50 80030b8: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; 80030ba: f107 0328 add.w r3, r7, #40 @ 0x28 80030be: 2228 movs r2, #40 @ 0x28 80030c0: 2100 movs r1, #0 80030c2: 4618 mov r0, r3 80030c4: f00b f9c8 bl 800e458 RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; 80030c8: f107 0314 add.w r3, r7, #20 80030cc: 2200 movs r2, #0 80030ce: 601a str r2, [r3, #0] 80030d0: 605a str r2, [r3, #4] 80030d2: 609a str r2, [r3, #8] 80030d4: 60da str r2, [r3, #12] 80030d6: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = { 0 }; 80030d8: 1d3b adds r3, r7, #4 80030da: 2200 movs r2, #0 80030dc: 601a str r2, [r3, #0] 80030de: 605a str r2, [r3, #4] 80030e0: 609a str r2, [r3, #8] 80030e2: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 80030e4: 2301 movs r3, #1 80030e6: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80030e8: f44f 3380 mov.w r3, #65536 @ 0x10000 80030ec: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 80030ee: 2300 movs r3, #0 80030f0: 633b str r3, [r7, #48] @ 0x30 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 80030f2: 2301 movs r3, #1 80030f4: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80030f6: 2302 movs r3, #2 80030f8: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 80030fa: f44f 3380 mov.w r3, #65536 @ 0x10000 80030fe: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; 8003100: f44f 1380 mov.w r3, #1048576 @ 0x100000 8003104: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { 8003106: f107 0328 add.w r3, r7, #40 @ 0x28 800310a: 4618 mov r0, r3 800310c: f005 f80c bl 8008128 8003110: 4603 mov r3, r0 8003112: 2b00 cmp r3, #0 8003114: d001 beq.n 800311a Error_Handler(); 8003116: f000 fadb bl 80036d0 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK 800311a: 230f movs r3, #15 800311c: 617b str r3, [r7, #20] | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800311e: 2302 movs r3, #2 8003120: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8003122: 2300 movs r3, #0 8003124: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8003126: f44f 6380 mov.w r3, #1024 @ 0x400 800312a: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800312c: 2300 movs r3, #0 800312e: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { 8003130: f107 0314 add.w r3, r7, #20 8003134: 2102 movs r1, #2 8003136: 4618 mov r0, r3 8003138: f005 fa78 bl 800862c 800313c: 4603 mov r3, r0 800313e: 2b00 cmp r3, #0 8003140: d001 beq.n 8003146 Error_Handler(); 8003142: f000 fac5 bl 80036d0 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; 8003146: 2312 movs r3, #18 8003148: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 800314a: f44f 4300 mov.w r3, #32768 @ 0x8000 800314e: 60fb str r3, [r7, #12] PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; 8003150: 2300 movs r3, #0 8003152: 613b str r3, [r7, #16] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { 8003154: 1d3b adds r3, r7, #4 8003156: 4618 mov r0, r3 8003158: f005 fbf8 bl 800894c 800315c: 4603 mov r3, r0 800315e: 2b00 cmp r3, #0 8003160: d001 beq.n 8003166 Error_Handler(); 8003162: f000 fab5 bl 80036d0 } } 8003166: bf00 nop 8003168: 3750 adds r7, #80 @ 0x50 800316a: 46bd mov sp, r7 800316c: bd80 pop {r7, pc} ... 08003170 : /** * @brief ADC1 Initialization Function * @param None * @retval None */ static void MX_ADC1_Init(void) { 8003170: b580 push {r7, lr} 8003172: b084 sub sp, #16 8003174: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = { 0 }; 8003176: 1d3b adds r3, r7, #4 8003178: 2200 movs r2, #0 800317a: 601a str r2, [r3, #0] 800317c: 605a str r2, [r3, #4] 800317e: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 8003180: 4b35 ldr r3, [pc, #212] @ (8003258 ) 8003182: 4a36 ldr r2, [pc, #216] @ (800325c ) 8003184: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 8003186: 4b34 ldr r3, [pc, #208] @ (8003258 ) 8003188: f44f 7280 mov.w r2, #256 @ 0x100 800318c: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; 800318e: 4b32 ldr r3, [pc, #200] @ (8003258 ) 8003190: 2201 movs r2, #1 8003192: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 8003194: 4b30 ldr r3, [pc, #192] @ (8003258 ) 8003196: 2200 movs r2, #0 8003198: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 800319a: 4b2f ldr r3, [pc, #188] @ (8003258 ) 800319c: f44f 2260 mov.w r2, #917504 @ 0xe0000 80031a0: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80031a2: 4b2d ldr r3, [pc, #180] @ (8003258 ) 80031a4: 2200 movs r2, #0 80031a6: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 5; 80031a8: 4b2b ldr r3, [pc, #172] @ (8003258 ) 80031aa: 2205 movs r2, #5 80031ac: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) { 80031ae: 482a ldr r0, [pc, #168] @ (8003258 ) 80031b0: f001 ffd8 bl 8005164 80031b4: 4603 mov r3, r0 80031b6: 2b00 cmp r3, #0 80031b8: d001 beq.n 80031be Error_Handler(); 80031ba: f000 fa89 bl 80036d0 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_4; 80031be: 2304 movs r3, #4 80031c0: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 80031c2: 2301 movs r3, #1 80031c4: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5; 80031c6: 2303 movs r3, #3 80031c8: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { 80031ca: 1d3b adds r3, r7, #4 80031cc: 4619 mov r1, r3 80031ce: 4822 ldr r0, [pc, #136] @ (8003258 ) 80031d0: f002 f99a bl 8005508 80031d4: 4603 mov r3, r0 80031d6: 2b00 cmp r3, #0 80031d8: d001 beq.n 80031de Error_Handler(); 80031da: f000 fa79 bl 80036d0 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_5; 80031de: 2305 movs r3, #5 80031e0: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_2; 80031e2: 2302 movs r3, #2 80031e4: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { 80031e6: 1d3b adds r3, r7, #4 80031e8: 4619 mov r1, r3 80031ea: 481b ldr r0, [pc, #108] @ (8003258 ) 80031ec: f002 f98c bl 8005508 80031f0: 4603 mov r3, r0 80031f2: 2b00 cmp r3, #0 80031f4: d001 beq.n 80031fa Error_Handler(); 80031f6: f000 fa6b bl 80036d0 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_6; 80031fa: 2306 movs r3, #6 80031fc: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_3; 80031fe: 2303 movs r3, #3 8003200: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { 8003202: 1d3b adds r3, r7, #4 8003204: 4619 mov r1, r3 8003206: 4814 ldr r0, [pc, #80] @ (8003258 ) 8003208: f002 f97e bl 8005508 800320c: 4603 mov r3, r0 800320e: 2b00 cmp r3, #0 8003210: d001 beq.n 8003216 Error_Handler(); 8003212: f000 fa5d bl 80036d0 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_7; 8003216: 2307 movs r3, #7 8003218: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_4; 800321a: 2304 movs r3, #4 800321c: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { 800321e: 1d3b adds r3, r7, #4 8003220: 4619 mov r1, r3 8003222: 480d ldr r0, [pc, #52] @ (8003258 ) 8003224: f002 f970 bl 8005508 8003228: 4603 mov r3, r0 800322a: 2b00 cmp r3, #0 800322c: d001 beq.n 8003232 Error_Handler(); 800322e: f000 fa4f bl 80036d0 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 8003232: 2308 movs r3, #8 8003234: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_5; 8003236: 2305 movs r3, #5 8003238: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { 800323a: 1d3b adds r3, r7, #4 800323c: 4619 mov r1, r3 800323e: 4806 ldr r0, [pc, #24] @ (8003258 ) 8003240: f002 f962 bl 8005508 8003244: 4603 mov r3, r0 8003246: 2b00 cmp r3, #0 8003248: d001 beq.n 800324e Error_Handler(); 800324a: f000 fa41 bl 80036d0 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 800324e: bf00 nop 8003250: 3710 adds r7, #16 8003252: 46bd mov sp, r7 8003254: bd80 pop {r7, pc} 8003256: bf00 nop 8003258: 200002a4 .word 0x200002a4 800325c: 40012400 .word 0x40012400 08003260 : /** * @brief TIM2 Initialization Function * @param None * @retval None */ static void MX_TIM2_Init(void) { 8003260: b580 push {r7, lr} 8003262: b08e sub sp, #56 @ 0x38 8003264: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = { 0 }; 8003266: f107 0328 add.w r3, r7, #40 @ 0x28 800326a: 2200 movs r2, #0 800326c: 601a str r2, [r3, #0] 800326e: 605a str r2, [r3, #4] 8003270: 609a str r2, [r3, #8] 8003272: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = { 0 }; 8003274: f107 0320 add.w r3, r7, #32 8003278: 2200 movs r2, #0 800327a: 601a str r2, [r3, #0] 800327c: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = { 0 }; 800327e: 1d3b adds r3, r7, #4 8003280: 2200 movs r2, #0 8003282: 601a str r2, [r3, #0] 8003284: 605a str r2, [r3, #4] 8003286: 609a str r2, [r3, #8] 8003288: 60da str r2, [r3, #12] 800328a: 611a str r2, [r3, #16] 800328c: 615a str r2, [r3, #20] 800328e: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; 8003290: 4b44 ldr r3, [pc, #272] @ (80033a4 ) 8003292: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 8003296: 601a str r2, [r3, #0] htim2.Init.Prescaler = 0; 8003298: 4b42 ldr r3, [pc, #264] @ (80033a4 ) 800329a: 2200 movs r2, #0 800329c: 605a str r2, [r3, #4] htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 800329e: 4b41 ldr r3, [pc, #260] @ (80033a4 ) 80032a0: 2200 movs r2, #0 80032a2: 609a str r2, [r3, #8] htim2.Init.Period = 17999; 80032a4: 4b3f ldr r3, [pc, #252] @ (80033a4 ) 80032a6: f244 624f movw r2, #17999 @ 0x464f 80032aa: 60da str r2, [r3, #12] htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80032ac: 4b3d ldr r3, [pc, #244] @ (80033a4 ) 80032ae: 2200 movs r2, #0 80032b0: 611a str r2, [r3, #16] htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80032b2: 4b3c ldr r3, [pc, #240] @ (80033a4 ) 80032b4: 2200 movs r2, #0 80032b6: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim2) != HAL_OK) { 80032b8: 483a ldr r0, [pc, #232] @ (80033a4 ) 80032ba: f005 fbfd bl 8008ab8 80032be: 4603 mov r3, r0 80032c0: 2b00 cmp r3, #0 80032c2: d001 beq.n 80032c8 Error_Handler(); 80032c4: f000 fa04 bl 80036d0 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 80032c8: f44f 5380 mov.w r3, #4096 @ 0x1000 80032cc: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) { 80032ce: f107 0328 add.w r3, r7, #40 @ 0x28 80032d2: 4619 mov r1, r3 80032d4: 4833 ldr r0, [pc, #204] @ (80033a4 ) 80032d6: f005 fe5f bl 8008f98 80032da: 4603 mov r3, r0 80032dc: 2b00 cmp r3, #0 80032de: d001 beq.n 80032e4 Error_Handler(); 80032e0: f000 f9f6 bl 80036d0 } if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) { 80032e4: 482f ldr r0, [pc, #188] @ (80033a4 ) 80032e6: f005 fc36 bl 8008b56 80032ea: 4603 mov r3, r0 80032ec: 2b00 cmp r3, #0 80032ee: d001 beq.n 80032f4 Error_Handler(); 80032f0: f000 f9ee bl 80036d0 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80032f4: 2300 movs r3, #0 80032f6: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80032f8: 2300 movs r3, #0 80032fa: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) 80032fc: f107 0320 add.w r3, r7, #32 8003300: 4619 mov r1, r3 8003302: 4828 ldr r0, [pc, #160] @ (80033a4 ) 8003304: f006 f9e8 bl 80096d8 8003308: 4603 mov r3, r0 800330a: 2b00 cmp r3, #0 800330c: d001 beq.n 8003312 != HAL_OK) { Error_Handler(); 800330e: f000 f9df bl 80036d0 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 8003312: 2360 movs r3, #96 @ 0x60 8003314: 607b str r3, [r7, #4] sConfigOC.Pulse = 1000; 8003316: f44f 737a mov.w r3, #1000 @ 0x3e8 800331a: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800331c: 2300 movs r3, #0 800331e: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 8003320: 2304 movs r3, #4 8003322: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) 8003324: 1d3b adds r3, r7, #4 8003326: 2200 movs r2, #0 8003328: 4619 mov r1, r3 800332a: 481e ldr r0, [pc, #120] @ (80033a4 ) 800332c: f005 fd72 bl 8008e14 8003330: 4603 mov r3, r0 8003332: 2b00 cmp r3, #0 8003334: d001 beq.n 800333a != HAL_OK) { Error_Handler(); 8003336: f000 f9cb bl 80036d0 } sConfigOC.Pulse = 2000; 800333a: f44f 63fa mov.w r3, #2000 @ 0x7d0 800333e: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) 8003340: 1d3b adds r3, r7, #4 8003342: 2204 movs r2, #4 8003344: 4619 mov r1, r3 8003346: 4817 ldr r0, [pc, #92] @ (80033a4 ) 8003348: f005 fd64 bl 8008e14 800334c: 4603 mov r3, r0 800334e: 2b00 cmp r3, #0 8003350: d001 beq.n 8003356 != HAL_OK) { Error_Handler(); 8003352: f000 f9bd bl 80036d0 } sConfigOC.Pulse = 3000; 8003356: f640 33b8 movw r3, #3000 @ 0xbb8 800335a: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 800335c: 2300 movs r3, #0 800335e: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) 8003360: 1d3b adds r3, r7, #4 8003362: 2208 movs r2, #8 8003364: 4619 mov r1, r3 8003366: 480f ldr r0, [pc, #60] @ (80033a4 ) 8003368: f005 fd54 bl 8008e14 800336c: 4603 mov r3, r0 800336e: 2b00 cmp r3, #0 8003370: d001 beq.n 8003376 != HAL_OK) { Error_Handler(); 8003372: f000 f9ad bl 80036d0 } sConfigOC.Pulse = 4000; 8003376: f44f 637a mov.w r3, #4000 @ 0xfa0 800337a: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 800337c: 2304 movs r3, #4 800337e: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) 8003380: 1d3b adds r3, r7, #4 8003382: 220c movs r2, #12 8003384: 4619 mov r1, r3 8003386: 4807 ldr r0, [pc, #28] @ (80033a4 ) 8003388: f005 fd44 bl 8008e14 800338c: 4603 mov r3, r0 800338e: 2b00 cmp r3, #0 8003390: d001 beq.n 8003396 != HAL_OK) { Error_Handler(); 8003392: f000 f99d bl 80036d0 } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ HAL_TIM_MspPostInit(&htim2); 8003396: 4803 ldr r0, [pc, #12] @ (80033a4 ) 8003398: f001 fd3e bl 8004e18 } 800339c: bf00 nop 800339e: 3738 adds r7, #56 @ 0x38 80033a0: 46bd mov sp, r7 80033a2: bd80 pop {r7, pc} 80033a4: 20000318 .word 0x20000318 080033a8 : /** * @brief TIM4 Initialization Function * @param None * @retval None */ static void MX_TIM4_Init(void) { 80033a8: b580 push {r7, lr} 80033aa: b08e sub sp, #56 @ 0x38 80033ac: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = { 0 }; 80033ae: f107 0328 add.w r3, r7, #40 @ 0x28 80033b2: 2200 movs r2, #0 80033b4: 601a str r2, [r3, #0] 80033b6: 605a str r2, [r3, #4] 80033b8: 609a str r2, [r3, #8] 80033ba: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = { 0 }; 80033bc: f107 0320 add.w r3, r7, #32 80033c0: 2200 movs r2, #0 80033c2: 601a str r2, [r3, #0] 80033c4: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = { 0 }; 80033c6: 1d3b adds r3, r7, #4 80033c8: 2200 movs r2, #0 80033ca: 601a str r2, [r3, #0] 80033cc: 605a str r2, [r3, #4] 80033ce: 609a str r2, [r3, #8] 80033d0: 60da str r2, [r3, #12] 80033d2: 611a str r2, [r3, #16] 80033d4: 615a str r2, [r3, #20] 80033d6: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 80033d8: 4b42 ldr r3, [pc, #264] @ (80034e4 ) 80033da: 4a43 ldr r2, [pc, #268] @ (80034e8 ) 80033dc: 601a str r2, [r3, #0] htim4.Init.Prescaler = 0; 80033de: 4b41 ldr r3, [pc, #260] @ (80034e4 ) 80033e0: 2200 movs r2, #0 80033e2: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 80033e4: 4b3f ldr r3, [pc, #252] @ (80034e4 ) 80033e6: 2200 movs r2, #0 80033e8: 609a str r2, [r3, #8] htim4.Init.Period = 17999; 80033ea: 4b3e ldr r3, [pc, #248] @ (80034e4 ) 80033ec: f244 624f movw r2, #17999 @ 0x464f 80033f0: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80033f2: 4b3c ldr r3, [pc, #240] @ (80034e4 ) 80033f4: 2200 movs r2, #0 80033f6: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80033f8: 4b3a ldr r3, [pc, #232] @ (80034e4 ) 80033fa: 2200 movs r2, #0 80033fc: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) { 80033fe: 4839 ldr r0, [pc, #228] @ (80034e4 ) 8003400: f005 fb5a bl 8008ab8 8003404: 4603 mov r3, r0 8003406: 2b00 cmp r3, #0 8003408: d001 beq.n 800340e Error_Handler(); 800340a: f000 f961 bl 80036d0 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 800340e: f44f 5380 mov.w r3, #4096 @ 0x1000 8003412: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) { 8003414: f107 0328 add.w r3, r7, #40 @ 0x28 8003418: 4619 mov r1, r3 800341a: 4832 ldr r0, [pc, #200] @ (80034e4 ) 800341c: f005 fdbc bl 8008f98 8003420: 4603 mov r3, r0 8003422: 2b00 cmp r3, #0 8003424: d001 beq.n 800342a Error_Handler(); 8003426: f000 f953 bl 80036d0 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) { 800342a: 482e ldr r0, [pc, #184] @ (80034e4 ) 800342c: f005 fb93 bl 8008b56 8003430: 4603 mov r3, r0 8003432: 2b00 cmp r3, #0 8003434: d001 beq.n 800343a Error_Handler(); 8003436: f000 f94b bl 80036d0 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800343a: 2300 movs r3, #0 800343c: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800343e: 2300 movs r3, #0 8003440: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) 8003442: f107 0320 add.w r3, r7, #32 8003446: 4619 mov r1, r3 8003448: 4826 ldr r0, [pc, #152] @ (80034e4 ) 800344a: f006 f945 bl 80096d8 800344e: 4603 mov r3, r0 8003450: 2b00 cmp r3, #0 8003452: d001 beq.n 8003458 != HAL_OK) { Error_Handler(); 8003454: f000 f93c bl 80036d0 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 8003458: 2360 movs r3, #96 @ 0x60 800345a: 607b str r3, [r7, #4] sConfigOC.Pulse = 5000; 800345c: f241 3388 movw r3, #5000 @ 0x1388 8003460: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8003462: 2300 movs r3, #0 8003464: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 8003466: 2304 movs r3, #4 8003468: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) 800346a: 1d3b adds r3, r7, #4 800346c: 2200 movs r2, #0 800346e: 4619 mov r1, r3 8003470: 481c ldr r0, [pc, #112] @ (80034e4 ) 8003472: f005 fccf bl 8008e14 8003476: 4603 mov r3, r0 8003478: 2b00 cmp r3, #0 800347a: d001 beq.n 8003480 != HAL_OK) { Error_Handler(); 800347c: f000 f928 bl 80036d0 } sConfigOC.Pulse = 6000; 8003480: f241 7370 movw r3, #6000 @ 0x1770 8003484: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) 8003486: 1d3b adds r3, r7, #4 8003488: 2204 movs r2, #4 800348a: 4619 mov r1, r3 800348c: 4815 ldr r0, [pc, #84] @ (80034e4 ) 800348e: f005 fcc1 bl 8008e14 8003492: 4603 mov r3, r0 8003494: 2b00 cmp r3, #0 8003496: d001 beq.n 800349c != HAL_OK) { Error_Handler(); 8003498: f000 f91a bl 80036d0 } sConfigOC.Pulse = 7000; 800349c: f641 3358 movw r3, #7000 @ 0x1b58 80034a0: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) 80034a2: 1d3b adds r3, r7, #4 80034a4: 2208 movs r2, #8 80034a6: 4619 mov r1, r3 80034a8: 480e ldr r0, [pc, #56] @ (80034e4 ) 80034aa: f005 fcb3 bl 8008e14 80034ae: 4603 mov r3, r0 80034b0: 2b00 cmp r3, #0 80034b2: d001 beq.n 80034b8 != HAL_OK) { Error_Handler(); 80034b4: f000 f90c bl 80036d0 } sConfigOC.Pulse = 8000; 80034b8: f44f 53fa mov.w r3, #8000 @ 0x1f40 80034bc: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) 80034be: 1d3b adds r3, r7, #4 80034c0: 220c movs r2, #12 80034c2: 4619 mov r1, r3 80034c4: 4807 ldr r0, [pc, #28] @ (80034e4 ) 80034c6: f005 fca5 bl 8008e14 80034ca: 4603 mov r3, r0 80034cc: 2b00 cmp r3, #0 80034ce: d001 beq.n 80034d4 != HAL_OK) { Error_Handler(); 80034d0: f000 f8fe bl 80036d0 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 80034d4: 4803 ldr r0, [pc, #12] @ (80034e4 ) 80034d6: f001 fc9f bl 8004e18 } 80034da: bf00 nop 80034dc: 3738 adds r7, #56 @ 0x38 80034de: 46bd mov sp, r7 80034e0: bd80 pop {r7, pc} 80034e2: bf00 nop 80034e4: 20000360 .word 0x20000360 80034e8: 40000800 .word 0x40000800 080034ec : /** * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 80034ec: b580 push {r7, lr} 80034ee: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 80034f0: 4b11 ldr r3, [pc, #68] @ (8003538 ) 80034f2: 4a12 ldr r2, [pc, #72] @ (800353c ) 80034f4: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 80034f6: 4b10 ldr r3, [pc, #64] @ (8003538 ) 80034f8: f44f 32e1 mov.w r2, #115200 @ 0x1c200 80034fc: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 80034fe: 4b0e ldr r3, [pc, #56] @ (8003538 ) 8003500: 2200 movs r2, #0 8003502: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8003504: 4b0c ldr r3, [pc, #48] @ (8003538 ) 8003506: 2200 movs r2, #0 8003508: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 800350a: 4b0b ldr r3, [pc, #44] @ (8003538 ) 800350c: 2200 movs r2, #0 800350e: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8003510: 4b09 ldr r3, [pc, #36] @ (8003538 ) 8003512: 220c movs r2, #12 8003514: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8003516: 4b08 ldr r3, [pc, #32] @ (8003538 ) 8003518: 2200 movs r2, #0 800351a: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 800351c: 4b06 ldr r3, [pc, #24] @ (8003538 ) 800351e: 2200 movs r2, #0 8003520: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) { 8003522: 4805 ldr r0, [pc, #20] @ (8003538 ) 8003524: f006 f936 bl 8009794 8003528: 4603 mov r3, r0 800352a: 2b00 cmp r3, #0 800352c: d001 beq.n 8003532 Error_Handler(); 800352e: f000 f8cf bl 80036d0 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 8003532: bf00 nop 8003534: bd80 pop {r7, pc} 8003536: bf00 nop 8003538: 200003a8 .word 0x200003a8 800353c: 40013800 .word 0x40013800 08003540 : /** * Enable DMA controller clock */ static void MX_DMA_Init(void) { 8003540: b580 push {r7, lr} 8003542: b082 sub sp, #8 8003544: af00 add r7, sp, #0 /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); 8003546: 4b0c ldr r3, [pc, #48] @ (8003578 ) 8003548: 695b ldr r3, [r3, #20] 800354a: 4a0b ldr r2, [pc, #44] @ (8003578 ) 800354c: f043 0301 orr.w r3, r3, #1 8003550: 6153 str r3, [r2, #20] 8003552: 4b09 ldr r3, [pc, #36] @ (8003578 ) 8003554: 695b ldr r3, [r3, #20] 8003556: f003 0301 and.w r3, r3, #1 800355a: 607b str r3, [r7, #4] 800355c: 687b ldr r3, [r7, #4] /* DMA interrupt init */ /* DMA1_Channel1_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 800355e: 2200 movs r2, #0 8003560: 2100 movs r1, #0 8003562: 200b movs r0, #11 8003564: f002 faa1 bl 8005aaa HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 8003568: 200b movs r0, #11 800356a: f002 faba bl 8005ae2 } 800356e: bf00 nop 8003570: 3708 adds r7, #8 8003572: 46bd mov sp, r7 8003574: bd80 pop {r7, pc} 8003576: bf00 nop 8003578: 40021000 .word 0x40021000 0800357c : /** * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 800357c: b580 push {r7, lr} 800357e: b088 sub sp, #32 8003580: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = { 0 }; 8003582: f107 0310 add.w r3, r7, #16 8003586: 2200 movs r2, #0 8003588: 601a str r2, [r3, #0] 800358a: 605a str r2, [r3, #4] 800358c: 609a str r2, [r3, #8] 800358e: 60da str r2, [r3, #12] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8003590: 4b4b ldr r3, [pc, #300] @ (80036c0 ) 8003592: 699b ldr r3, [r3, #24] 8003594: 4a4a ldr r2, [pc, #296] @ (80036c0 ) 8003596: f043 0310 orr.w r3, r3, #16 800359a: 6193 str r3, [r2, #24] 800359c: 4b48 ldr r3, [pc, #288] @ (80036c0 ) 800359e: 699b ldr r3, [r3, #24] 80035a0: f003 0310 and.w r3, r3, #16 80035a4: 60fb str r3, [r7, #12] 80035a6: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); 80035a8: 4b45 ldr r3, [pc, #276] @ (80036c0 ) 80035aa: 699b ldr r3, [r3, #24] 80035ac: 4a44 ldr r2, [pc, #272] @ (80036c0 ) 80035ae: f043 0320 orr.w r3, r3, #32 80035b2: 6193 str r3, [r2, #24] 80035b4: 4b42 ldr r3, [pc, #264] @ (80036c0 ) 80035b6: 699b ldr r3, [r3, #24] 80035b8: f003 0320 and.w r3, r3, #32 80035bc: 60bb str r3, [r7, #8] 80035be: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 80035c0: 4b3f ldr r3, [pc, #252] @ (80036c0 ) 80035c2: 699b ldr r3, [r3, #24] 80035c4: 4a3e ldr r2, [pc, #248] @ (80036c0 ) 80035c6: f043 0304 orr.w r3, r3, #4 80035ca: 6193 str r3, [r2, #24] 80035cc: 4b3c ldr r3, [pc, #240] @ (80036c0 ) 80035ce: 699b ldr r3, [r3, #24] 80035d0: f003 0304 and.w r3, r3, #4 80035d4: 607b str r3, [r7, #4] 80035d6: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); 80035d8: 4b39 ldr r3, [pc, #228] @ (80036c0 ) 80035da: 699b ldr r3, [r3, #24] 80035dc: 4a38 ldr r2, [pc, #224] @ (80036c0 ) 80035de: f043 0308 orr.w r3, r3, #8 80035e2: 6193 str r3, [r2, #24] 80035e4: 4b36 ldr r3, [pc, #216] @ (80036c0 ) 80035e6: 699b ldr r3, [r3, #24] 80035e8: f003 0308 and.w r3, r3, #8 80035ec: 603b str r3, [r7, #0] 80035ee: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET); 80035f0: 2200 movs r2, #0 80035f2: f44f 5100 mov.w r1, #8192 @ 0x2000 80035f6: 4833 ldr r0, [pc, #204] @ (80036c4 ) 80035f8: f003 f81d bl 8006636 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, 80035fc: 2200 movs r2, #0 80035fe: f640 413e movw r1, #3134 @ 0xc3e 8003602: 4831 ldr r0, [pc, #196] @ (80036c8 ) 8003604: f003 f817 bl 8006636 INH1_Pin | INH2_Pin | INH3_Pin | INH4_Pin | EXP1_Pin | EXP2_Pin | EXP3_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, BUZ_Pin | LED1_Pin, GPIO_PIN_RESET); 8003608: 2200 movs r2, #0 800360a: f44f 4101 mov.w r1, #33024 @ 0x8100 800360e: 482f ldr r0, [pc, #188] @ (80036cc ) 8003610: f003 f811 bl 8006636 /*Configure GPIO pin : LED2_Pin */ GPIO_InitStruct.Pin = LED2_Pin; 8003614: f44f 5300 mov.w r3, #8192 @ 0x2000 8003618: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800361a: 2301 movs r3, #1 800361c: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800361e: 2300 movs r3, #0 8003620: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003622: 2302 movs r3, #2 8003624: 61fb str r3, [r7, #28] HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct); 8003626: f107 0310 add.w r3, r7, #16 800362a: 4619 mov r1, r3 800362c: 4825 ldr r0, [pc, #148] @ (80036c4 ) 800362e: f002 fe67 bl 8006300 /*Configure GPIO pins : P1_Pin P2_Pin */ GPIO_InitStruct.Pin = P1_Pin | P2_Pin; 8003632: f44f 4340 mov.w r3, #49152 @ 0xc000 8003636: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8003638: 2300 movs r3, #0 800363a: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800363c: 2300 movs r3, #0 800363e: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8003640: f107 0310 add.w r3, r7, #16 8003644: 4619 mov r1, r3 8003646: 481f ldr r0, [pc, #124] @ (80036c4 ) 8003648: f002 fe5a bl 8006300 /*Configure GPIO pin : AIN1_Pin */ GPIO_InitStruct.Pin = AIN1_Pin; 800364c: 2310 movs r3, #16 800364e: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8003650: 2303 movs r3, #3 8003652: 617b str r3, [r7, #20] HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct); 8003654: f107 0310 add.w r3, r7, #16 8003658: 4619 mov r1, r3 800365a: 481c ldr r0, [pc, #112] @ (80036cc ) 800365c: f002 fe50 bl 8006300 /*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin EXP1_Pin EXP2_Pin EXP3_Pin */ GPIO_InitStruct.Pin = INH1_Pin | INH2_Pin | INH3_Pin | INH4_Pin | EXP1_Pin 8003660: f640 433e movw r3, #3134 @ 0xc3e 8003664: 613b str r3, [r7, #16] | EXP2_Pin | EXP3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8003666: 2301 movs r3, #1 8003668: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800366a: 2300 movs r3, #0 800366c: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800366e: 2302 movs r3, #2 8003670: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8003672: f107 0310 add.w r3, r7, #16 8003676: 4619 mov r1, r3 8003678: 4813 ldr r0, [pc, #76] @ (80036c8 ) 800367a: f002 fe41 bl 8006300 /*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */ GPIO_InitStruct.Pin = CH1_Pin | CH2_Pin | CH3_Pin | CH4_Pin; 800367e: f44f 4370 mov.w r3, #61440 @ 0xf000 8003682: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8003684: 2300 movs r3, #0 8003686: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003688: 2300 movs r3, #0 800368a: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800368c: f107 0310 add.w r3, r7, #16 8003690: 4619 mov r1, r3 8003692: 480d ldr r0, [pc, #52] @ (80036c8 ) 8003694: f002 fe34 bl 8006300 /*Configure GPIO pins : BUZ_Pin LED1_Pin */ GPIO_InitStruct.Pin = BUZ_Pin | LED1_Pin; 8003698: f44f 4301 mov.w r3, #33024 @ 0x8100 800369c: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800369e: 2301 movs r3, #1 80036a0: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80036a2: 2300 movs r3, #0 80036a4: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80036a6: 2302 movs r3, #2 80036a8: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80036aa: f107 0310 add.w r3, r7, #16 80036ae: 4619 mov r1, r3 80036b0: 4806 ldr r0, [pc, #24] @ (80036cc ) 80036b2: f002 fe25 bl 8006300 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 80036b6: bf00 nop 80036b8: 3720 adds r7, #32 80036ba: 46bd mov sp, r7 80036bc: bd80 pop {r7, pc} 80036be: bf00 nop 80036c0: 40021000 .word 0x40021000 80036c4: 40011000 .word 0x40011000 80036c8: 40010c00 .word 0x40010c00 80036cc: 40010800 .word 0x40010800 080036d0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80036d0: b480 push {r7} 80036d2: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 80036d4: b672 cpsid i } 80036d6: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) { 80036d8: bf00 nop 80036da: e7fd b.n 80036d8 080036dc : extern uint16_t mrampstart[4]; extern uint16_t tramp; extern UART_HandleTypeDef huart1; motMov_st m1ap(void){ 80036dc: b580 push {r7, lr} 80036de: b09c sub sp, #112 @ 0x70 80036e0: af02 add r7, sp, #8 static motMov_st m1st=motWaiting; static motMov_st memm1st=motStop; char s[100]; if(memm1st!=m1st){ 80036e2: 4b5d ldr r3, [pc, #372] @ (8003858 ) 80036e4: 781a ldrb r2, [r3, #0] 80036e6: 4b5d ldr r3, [pc, #372] @ (800385c ) 80036e8: 781b ldrb r3, [r3, #0] 80036ea: 429a cmp r2, r3 80036ec: d017 beq.n 800371e memm1st=m1st; 80036ee: 4b5b ldr r3, [pc, #364] @ (800385c ) 80036f0: 781a ldrb r2, [r3, #0] 80036f2: 4b59 ldr r3, [pc, #356] @ (8003858 ) 80036f4: 701a strb r2, [r3, #0] sprintf(s,"\nm1ap=%d",m1st); 80036f6: 4b59 ldr r3, [pc, #356] @ (800385c ) 80036f8: 781b ldrb r3, [r3, #0] 80036fa: 461a mov r2, r3 80036fc: 1d3b adds r3, r7, #4 80036fe: 4958 ldr r1, [pc, #352] @ (8003860 ) 8003700: 4618 mov r0, r3 8003702: f00a fe87 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8003706: 1d3b adds r3, r7, #4 8003708: 4618 mov r0, r3 800370a: f7fc fd1f bl 800014c 800370e: 4603 mov r3, r0 8003710: b29a uxth r2, r3 8003712: 1d39 adds r1, r7, #4 8003714: f04f 33ff mov.w r3, #4294967295 8003718: 4852 ldr r0, [pc, #328] @ (8003864 ) 800371a: f006 f88b bl 8009834 } if(rtCiclo) 8003720: 881b ldrh r3, [r3, #0] 8003722: b29a uxth r2, r3 8003724: 4b51 ldr r3, [pc, #324] @ (800386c ) 8003726: 881b ldrh r3, [r3, #0] 8003728: 429a cmp r2, r3 800372a: d202 bcs.n 8003732 800372c: 4b4b ldr r3, [pc, #300] @ (800385c ) 800372e: 2200 movs r2, #0 8003730: 701a strb r2, [r3, #0] switch(m1st){ 8003732: 4b4a ldr r3, [pc, #296] @ (800385c ) 8003734: 781b ldrb r3, [r3, #0] 8003736: 2b03 cmp r3, #3 8003738: d876 bhi.n 8003828 800373a: a201 add r2, pc, #4 @ (adr r2, 8003740 ) 800373c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003740: 08003751 .word 0x08003751 8003744: 0800379d .word 0x0800379d 8003748: 080037cd .word 0x080037cd 800374c: 080037ff .word 0x080037ff case motWaiting: SetMotPerc(M1,FW,0); 8003750: 2200 movs r2, #0 8003752: 2100 movs r1, #0 8003754: 2001 movs r0, #1 8003756: f001 f83f bl 80047d8 SetMotPerc(M1,BW,0); 800375a: 2200 movs r2, #0 800375c: 2101 movs r1, #1 800375e: 2001 movs r0, #1 8003760: f001 f83a bl 80047d8 if(rtCiclo>=apM1start){ 8003764: 4b40 ldr r3, [pc, #256] @ (8003868 ) 8003766: 881b ldrh r3, [r3, #0] 8003768: b29a uxth r2, r3 800376a: 4b40 ldr r3, [pc, #256] @ (800386c ) 800376c: 881b ldrh r3, [r3, #0] 800376e: 429a cmp r2, r3 8003770: d365 bcc.n 800383e (void)ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT); 8003772: 4b3f ldr r3, [pc, #252] @ (8003870 ) 8003774: 881b ldrh r3, [r3, #0] 8003776: b2da uxtb r2, r3 8003778: 4b3e ldr r3, [pc, #248] @ (8003874 ) 800377a: 881b ldrh r3, [r3, #0] 800377c: b2d9 uxtb r1, r3 800377e: 4b3e ldr r3, [pc, #248] @ (8003878 ) 8003780: 881b ldrh r3, [r3, #0] 8003782: b2db uxtb r3, r3 8003784: 2000 movs r0, #0 8003786: 9001 str r0, [sp, #4] 8003788: 9300 str r3, [sp, #0] 800378a: 460b mov r3, r1 800378c: 2100 movs r1, #0 800378e: 2001 movs r0, #1 8003790: f001 f9a2 bl 8004ad8 m1st=motStartRamp; 8003794: 4b31 ldr r3, [pc, #196] @ (800385c ) 8003796: 2201 movs r2, #1 8003798: 701a strb r2, [r3, #0] } break; 800379a: e050 b.n 800383e case motStartRamp: if(ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){ 800379c: 4b34 ldr r3, [pc, #208] @ (8003870 ) 800379e: 881b ldrh r3, [r3, #0] 80037a0: b2da uxtb r2, r3 80037a2: 4b34 ldr r3, [pc, #208] @ (8003874 ) 80037a4: 881b ldrh r3, [r3, #0] 80037a6: b2d9 uxtb r1, r3 80037a8: 4b33 ldr r3, [pc, #204] @ (8003878 ) 80037aa: 881b ldrh r3, [r3, #0] 80037ac: b2db uxtb r3, r3 80037ae: 200a movs r0, #10 80037b0: 9001 str r0, [sp, #4] 80037b2: 9300 str r3, [sp, #0] 80037b4: 460b mov r3, r1 80037b6: 2100 movs r1, #0 80037b8: 2001 movs r0, #1 80037ba: f001 f98d bl 8004ad8 80037be: 4603 mov r3, r0 80037c0: 2b00 cmp r3, #0 80037c2: d13e bne.n 8003842 m1st=motWaitingTime; 80037c4: 4b25 ldr r3, [pc, #148] @ (800385c ) 80037c6: 2202 movs r2, #2 80037c8: 701a strb r2, [r3, #0] } break; 80037ca: e03a b.n 8003842 case motWaitingTime: if(rtCiclo>=apM1stop){ 80037cc: 4b26 ldr r3, [pc, #152] @ (8003868 ) 80037ce: 881b ldrh r3, [r3, #0] 80037d0: b29a uxth r2, r3 80037d2: 4b2a ldr r3, [pc, #168] @ (800387c ) 80037d4: 881b ldrh r3, [r3, #0] 80037d6: 429a cmp r2, r3 80037d8: d335 bcc.n 8003846 (void)ramp(M1,FW,m1pwmap,0,tramp,RAMPINIT); 80037da: 4b26 ldr r3, [pc, #152] @ (8003874 ) 80037dc: 881b ldrh r3, [r3, #0] 80037de: b2da uxtb r2, r3 80037e0: 4b25 ldr r3, [pc, #148] @ (8003878 ) 80037e2: 881b ldrh r3, [r3, #0] 80037e4: b2db uxtb r3, r3 80037e6: 2100 movs r1, #0 80037e8: 9101 str r1, [sp, #4] 80037ea: 9300 str r3, [sp, #0] 80037ec: 2300 movs r3, #0 80037ee: 2100 movs r1, #0 80037f0: 2001 movs r0, #1 80037f2: f001 f971 bl 8004ad8 m1st=motStopRamp; 80037f6: 4b19 ldr r3, [pc, #100] @ (800385c ) 80037f8: 2203 movs r2, #3 80037fa: 701a strb r2, [r3, #0] } break; 80037fc: e023 b.n 8003846 case motStopRamp: if(ramp(M1,FW,m1pwmap,0,tramp,RAMPRUN)==DONE){ 80037fe: 4b1d ldr r3, [pc, #116] @ (8003874 ) 8003800: 881b ldrh r3, [r3, #0] 8003802: b2da uxtb r2, r3 8003804: 4b1c ldr r3, [pc, #112] @ (8003878 ) 8003806: 881b ldrh r3, [r3, #0] 8003808: b2db uxtb r3, r3 800380a: 210a movs r1, #10 800380c: 9101 str r1, [sp, #4] 800380e: 9300 str r3, [sp, #0] 8003810: 2300 movs r3, #0 8003812: 2100 movs r1, #0 8003814: 2001 movs r0, #1 8003816: f001 f95f bl 8004ad8 800381a: 4603 mov r3, r0 800381c: 2b00 cmp r3, #0 800381e: d114 bne.n 800384a m1st=motStop; 8003820: 4b0e ldr r3, [pc, #56] @ (800385c ) 8003822: 2204 movs r2, #4 8003824: 701a strb r2, [r3, #0] } break; 8003826: e010 b.n 800384a case motStop: default: SetMotPerc(M1,FW,0); 8003828: 2200 movs r2, #0 800382a: 2100 movs r1, #0 800382c: 2001 movs r0, #1 800382e: f000 ffd3 bl 80047d8 SetMotPerc(M1,BW,0); 8003832: 2200 movs r2, #0 8003834: 2101 movs r1, #1 8003836: 2001 movs r0, #1 8003838: f000 ffce bl 80047d8 break; 800383c: e006 b.n 800384c break; 800383e: bf00 nop 8003840: e004 b.n 800384c break; 8003842: bf00 nop 8003844: e002 b.n 800384c break; 8003846: bf00 nop 8003848: e000 b.n 800384c break; 800384a: bf00 nop } return m1st; 800384c: 4b03 ldr r3, [pc, #12] @ (800385c ) 800384e: 781b ldrb r3, [r3, #0] } 8003850: 4618 mov r0, r3 8003852: 3768 adds r7, #104 @ 0x68 8003854: 46bd mov sp, r7 8003856: bd80 pop {r7, pc} 8003858: 20000007 .word 0x20000007 800385c: 20000462 .word 0x20000462 8003860: 0800f370 .word 0x0800f370 8003864: 200003a8 .word 0x200003a8 8003868: 200003fc .word 0x200003fc 800386c: 20000428 .word 0x20000428 8003870: 2000044c .word 0x2000044c 8003874: 20000400 .word 0x20000400 8003878: 20000418 .word 0x20000418 800387c: 2000042a .word 0x2000042a 08003880 : motMov_st m2ap(void){ 8003880: b580 push {r7, lr} 8003882: b09c sub sp, #112 @ 0x70 8003884: af02 add r7, sp, #8 static motMov_st m2st; static motMov_st memm2st=motStop; char s[100]; if(memm2st!=m2st){ 8003886: 4b5d ldr r3, [pc, #372] @ (80039fc ) 8003888: 781a ldrb r2, [r3, #0] 800388a: 4b5d ldr r3, [pc, #372] @ (8003a00 ) 800388c: 781b ldrb r3, [r3, #0] 800388e: 429a cmp r2, r3 8003890: d017 beq.n 80038c2 memm2st=m2st; 8003892: 4b5b ldr r3, [pc, #364] @ (8003a00 ) 8003894: 781a ldrb r2, [r3, #0] 8003896: 4b59 ldr r3, [pc, #356] @ (80039fc ) 8003898: 701a strb r2, [r3, #0] sprintf(s,"\nm2ap=%d",m2st); 800389a: 4b59 ldr r3, [pc, #356] @ (8003a00 ) 800389c: 781b ldrb r3, [r3, #0] 800389e: 461a mov r2, r3 80038a0: 1d3b adds r3, r7, #4 80038a2: 4958 ldr r1, [pc, #352] @ (8003a04 ) 80038a4: 4618 mov r0, r3 80038a6: f00a fdb5 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 80038aa: 1d3b adds r3, r7, #4 80038ac: 4618 mov r0, r3 80038ae: f7fc fc4d bl 800014c 80038b2: 4603 mov r3, r0 80038b4: b29a uxth r2, r3 80038b6: 1d39 adds r1, r7, #4 80038b8: f04f 33ff mov.w r3, #4294967295 80038bc: 4852 ldr r0, [pc, #328] @ (8003a08 ) 80038be: f005 ffb9 bl 8009834 } if(rtCiclo) 80038c4: 881b ldrh r3, [r3, #0] 80038c6: b29a uxth r2, r3 80038c8: 4b51 ldr r3, [pc, #324] @ (8003a10 ) 80038ca: 881b ldrh r3, [r3, #0] 80038cc: 429a cmp r2, r3 80038ce: d202 bcs.n 80038d6 80038d0: 4b4b ldr r3, [pc, #300] @ (8003a00 ) 80038d2: 2200 movs r2, #0 80038d4: 701a strb r2, [r3, #0] switch(m2st){ 80038d6: 4b4a ldr r3, [pc, #296] @ (8003a00 ) 80038d8: 781b ldrb r3, [r3, #0] 80038da: 2b03 cmp r3, #3 80038dc: d876 bhi.n 80039cc 80038de: a201 add r2, pc, #4 @ (adr r2, 80038e4 ) 80038e0: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80038e4: 080038f5 .word 0x080038f5 80038e8: 08003941 .word 0x08003941 80038ec: 08003971 .word 0x08003971 80038f0: 080039a3 .word 0x080039a3 case motWaiting: SetMotPerc(M2,FW,0); 80038f4: 2200 movs r2, #0 80038f6: 2100 movs r1, #0 80038f8: 2002 movs r0, #2 80038fa: f000 ff6d bl 80047d8 SetMotPerc(M2,BW,0); 80038fe: 2200 movs r2, #0 8003900: 2101 movs r1, #1 8003902: 2002 movs r0, #2 8003904: f000 ff68 bl 80047d8 if(rtCiclo>=apM2start){ 8003908: 4b40 ldr r3, [pc, #256] @ (8003a0c ) 800390a: 881b ldrh r3, [r3, #0] 800390c: b29a uxth r2, r3 800390e: 4b40 ldr r3, [pc, #256] @ (8003a10 ) 8003910: 881b ldrh r3, [r3, #0] 8003912: 429a cmp r2, r3 8003914: d365 bcc.n 80039e2 (void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT); 8003916: 4b3f ldr r3, [pc, #252] @ (8003a14 ) 8003918: 885b ldrh r3, [r3, #2] 800391a: b2da uxtb r2, r3 800391c: 4b3e ldr r3, [pc, #248] @ (8003a18 ) 800391e: 881b ldrh r3, [r3, #0] 8003920: b2d9 uxtb r1, r3 8003922: 4b3e ldr r3, [pc, #248] @ (8003a1c ) 8003924: 881b ldrh r3, [r3, #0] 8003926: b2db uxtb r3, r3 8003928: 2000 movs r0, #0 800392a: 9001 str r0, [sp, #4] 800392c: 9300 str r3, [sp, #0] 800392e: 460b mov r3, r1 8003930: 2101 movs r1, #1 8003932: 2002 movs r0, #2 8003934: f001 f8d0 bl 8004ad8 m2st=motStartRamp; 8003938: 4b31 ldr r3, [pc, #196] @ (8003a00 ) 800393a: 2201 movs r2, #1 800393c: 701a strb r2, [r3, #0] } break; 800393e: e050 b.n 80039e2 case motStartRamp: if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){ 8003940: 4b34 ldr r3, [pc, #208] @ (8003a14 ) 8003942: 885b ldrh r3, [r3, #2] 8003944: b2da uxtb r2, r3 8003946: 4b34 ldr r3, [pc, #208] @ (8003a18 ) 8003948: 881b ldrh r3, [r3, #0] 800394a: b2d9 uxtb r1, r3 800394c: 4b33 ldr r3, [pc, #204] @ (8003a1c ) 800394e: 881b ldrh r3, [r3, #0] 8003950: b2db uxtb r3, r3 8003952: 200a movs r0, #10 8003954: 9001 str r0, [sp, #4] 8003956: 9300 str r3, [sp, #0] 8003958: 460b mov r3, r1 800395a: 2101 movs r1, #1 800395c: 2002 movs r0, #2 800395e: f001 f8bb bl 8004ad8 8003962: 4603 mov r3, r0 8003964: 2b00 cmp r3, #0 8003966: d13e bne.n 80039e6 m2st=motWaitingTime; 8003968: 4b25 ldr r3, [pc, #148] @ (8003a00 ) 800396a: 2202 movs r2, #2 800396c: 701a strb r2, [r3, #0] } break; 800396e: e03a b.n 80039e6 case motWaitingTime: if(rtCiclo>=apM2stop){ 8003970: 4b26 ldr r3, [pc, #152] @ (8003a0c ) 8003972: 881b ldrh r3, [r3, #0] 8003974: b29a uxth r2, r3 8003976: 4b2a ldr r3, [pc, #168] @ (8003a20 ) 8003978: 881b ldrh r3, [r3, #0] 800397a: 429a cmp r2, r3 800397c: d335 bcc.n 80039ea (void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT); 800397e: 4b26 ldr r3, [pc, #152] @ (8003a18 ) 8003980: 881b ldrh r3, [r3, #0] 8003982: b2da uxtb r2, r3 8003984: 4b25 ldr r3, [pc, #148] @ (8003a1c ) 8003986: 881b ldrh r3, [r3, #0] 8003988: b2db uxtb r3, r3 800398a: 2100 movs r1, #0 800398c: 9101 str r1, [sp, #4] 800398e: 9300 str r3, [sp, #0] 8003990: 2300 movs r3, #0 8003992: 2101 movs r1, #1 8003994: 2002 movs r0, #2 8003996: f001 f89f bl 8004ad8 m2st=motStopRamp; 800399a: 4b19 ldr r3, [pc, #100] @ (8003a00 ) 800399c: 2203 movs r2, #3 800399e: 701a strb r2, [r3, #0] } break; 80039a0: e023 b.n 80039ea case motStopRamp: if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){ 80039a2: 4b1d ldr r3, [pc, #116] @ (8003a18 ) 80039a4: 881b ldrh r3, [r3, #0] 80039a6: b2da uxtb r2, r3 80039a8: 4b1c ldr r3, [pc, #112] @ (8003a1c ) 80039aa: 881b ldrh r3, [r3, #0] 80039ac: b2db uxtb r3, r3 80039ae: 210a movs r1, #10 80039b0: 9101 str r1, [sp, #4] 80039b2: 9300 str r3, [sp, #0] 80039b4: 2300 movs r3, #0 80039b6: 2101 movs r1, #1 80039b8: 2002 movs r0, #2 80039ba: f001 f88d bl 8004ad8 80039be: 4603 mov r3, r0 80039c0: 2b00 cmp r3, #0 80039c2: d114 bne.n 80039ee m2st=motStop; 80039c4: 4b0e ldr r3, [pc, #56] @ (8003a00 ) 80039c6: 2204 movs r2, #4 80039c8: 701a strb r2, [r3, #0] } break; 80039ca: e010 b.n 80039ee case motStop: default: SetMotPerc(M2,FW,0); 80039cc: 2200 movs r2, #0 80039ce: 2100 movs r1, #0 80039d0: 2002 movs r0, #2 80039d2: f000 ff01 bl 80047d8 SetMotPerc(M2,BW,0); 80039d6: 2200 movs r2, #0 80039d8: 2101 movs r1, #1 80039da: 2002 movs r0, #2 80039dc: f000 fefc bl 80047d8 break; 80039e0: e006 b.n 80039f0 break; 80039e2: bf00 nop 80039e4: e004 b.n 80039f0 break; 80039e6: bf00 nop 80039e8: e002 b.n 80039f0 break; 80039ea: bf00 nop 80039ec: e000 b.n 80039f0 break; 80039ee: bf00 nop } return m2st; 80039f0: 4b03 ldr r3, [pc, #12] @ (8003a00 ) 80039f2: 781b ldrb r3, [r3, #0] } 80039f4: 4618 mov r0, r3 80039f6: 3768 adds r7, #104 @ 0x68 80039f8: 46bd mov sp, r7 80039fa: bd80 pop {r7, pc} 80039fc: 20000008 .word 0x20000008 8003a00: 20000463 .word 0x20000463 8003a04: 0800f37c .word 0x0800f37c 8003a08: 200003a8 .word 0x200003a8 8003a0c: 200003fc .word 0x200003fc 8003a10: 2000042c .word 0x2000042c 8003a14: 2000044c .word 0x2000044c 8003a18: 20000404 .word 0x20000404 8003a1c: 20000418 .word 0x20000418 8003a20: 2000042e .word 0x2000042e 08003a24 : motMov_st m3ap(void){ 8003a24: b580 push {r7, lr} 8003a26: b09c sub sp, #112 @ 0x70 8003a28: af02 add r7, sp, #8 static motMov_st m3st; static motMov_st memm3st=motStop; char s[100]; if(memm3st!=m3st){ 8003a2a: 4b5d ldr r3, [pc, #372] @ (8003ba0 ) 8003a2c: 781a ldrb r2, [r3, #0] 8003a2e: 4b5d ldr r3, [pc, #372] @ (8003ba4 ) 8003a30: 781b ldrb r3, [r3, #0] 8003a32: 429a cmp r2, r3 8003a34: d017 beq.n 8003a66 memm3st=m3st; 8003a36: 4b5b ldr r3, [pc, #364] @ (8003ba4 ) 8003a38: 781a ldrb r2, [r3, #0] 8003a3a: 4b59 ldr r3, [pc, #356] @ (8003ba0 ) 8003a3c: 701a strb r2, [r3, #0] sprintf(s,"\nm3ap=%d",m3st); 8003a3e: 4b59 ldr r3, [pc, #356] @ (8003ba4 ) 8003a40: 781b ldrb r3, [r3, #0] 8003a42: 461a mov r2, r3 8003a44: 1d3b adds r3, r7, #4 8003a46: 4958 ldr r1, [pc, #352] @ (8003ba8 ) 8003a48: 4618 mov r0, r3 8003a4a: f00a fce3 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8003a4e: 1d3b adds r3, r7, #4 8003a50: 4618 mov r0, r3 8003a52: f7fc fb7b bl 800014c 8003a56: 4603 mov r3, r0 8003a58: b29a uxth r2, r3 8003a5a: 1d39 adds r1, r7, #4 8003a5c: f04f 33ff mov.w r3, #4294967295 8003a60: 4852 ldr r0, [pc, #328] @ (8003bac ) 8003a62: f005 fee7 bl 8009834 } if(rtCiclo) 8003a68: 881b ldrh r3, [r3, #0] 8003a6a: b29a uxth r2, r3 8003a6c: 4b51 ldr r3, [pc, #324] @ (8003bb4 ) 8003a6e: 881b ldrh r3, [r3, #0] 8003a70: 429a cmp r2, r3 8003a72: d202 bcs.n 8003a7a 8003a74: 4b4b ldr r3, [pc, #300] @ (8003ba4 ) 8003a76: 2200 movs r2, #0 8003a78: 701a strb r2, [r3, #0] switch(m3st){ 8003a7a: 4b4a ldr r3, [pc, #296] @ (8003ba4 ) 8003a7c: 781b ldrb r3, [r3, #0] 8003a7e: 2b03 cmp r3, #3 8003a80: d876 bhi.n 8003b70 8003a82: a201 add r2, pc, #4 @ (adr r2, 8003a88 ) 8003a84: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003a88: 08003a99 .word 0x08003a99 8003a8c: 08003ae5 .word 0x08003ae5 8003a90: 08003b15 .word 0x08003b15 8003a94: 08003b47 .word 0x08003b47 case motWaiting: SetMotPerc(M3,FW,0); 8003a98: 2200 movs r2, #0 8003a9a: 2100 movs r1, #0 8003a9c: 2003 movs r0, #3 8003a9e: f000 fe9b bl 80047d8 SetMotPerc(M3,BW,0); 8003aa2: 2200 movs r2, #0 8003aa4: 2101 movs r1, #1 8003aa6: 2003 movs r0, #3 8003aa8: f000 fe96 bl 80047d8 if(rtCiclo>=apM3start){ 8003aac: 4b40 ldr r3, [pc, #256] @ (8003bb0 ) 8003aae: 881b ldrh r3, [r3, #0] 8003ab0: b29a uxth r2, r3 8003ab2: 4b40 ldr r3, [pc, #256] @ (8003bb4 ) 8003ab4: 881b ldrh r3, [r3, #0] 8003ab6: 429a cmp r2, r3 8003ab8: d365 bcc.n 8003b86 (void)ramp(M3,FW,mrampstart[M3-1],m2pwmap,tramp,RAMPINIT); 8003aba: 4b3f ldr r3, [pc, #252] @ (8003bb8 ) 8003abc: 889b ldrh r3, [r3, #4] 8003abe: b2da uxtb r2, r3 8003ac0: 4b3e ldr r3, [pc, #248] @ (8003bbc ) 8003ac2: 881b ldrh r3, [r3, #0] 8003ac4: b2d9 uxtb r1, r3 8003ac6: 4b3e ldr r3, [pc, #248] @ (8003bc0 ) 8003ac8: 881b ldrh r3, [r3, #0] 8003aca: b2db uxtb r3, r3 8003acc: 2000 movs r0, #0 8003ace: 9001 str r0, [sp, #4] 8003ad0: 9300 str r3, [sp, #0] 8003ad2: 460b mov r3, r1 8003ad4: 2100 movs r1, #0 8003ad6: 2003 movs r0, #3 8003ad8: f000 fffe bl 8004ad8 m3st=motStartRamp; 8003adc: 4b31 ldr r3, [pc, #196] @ (8003ba4 ) 8003ade: 2201 movs r2, #1 8003ae0: 701a strb r2, [r3, #0] } break; 8003ae2: e050 b.n 8003b86 case motStartRamp: if(ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){ 8003ae4: 4b34 ldr r3, [pc, #208] @ (8003bb8 ) 8003ae6: 889b ldrh r3, [r3, #4] 8003ae8: b2da uxtb r2, r3 8003aea: 4b36 ldr r3, [pc, #216] @ (8003bc4 ) 8003aec: 881b ldrh r3, [r3, #0] 8003aee: b2d9 uxtb r1, r3 8003af0: 4b33 ldr r3, [pc, #204] @ (8003bc0 ) 8003af2: 881b ldrh r3, [r3, #0] 8003af4: b2db uxtb r3, r3 8003af6: 200a movs r0, #10 8003af8: 9001 str r0, [sp, #4] 8003afa: 9300 str r3, [sp, #0] 8003afc: 460b mov r3, r1 8003afe: 2100 movs r1, #0 8003b00: 2003 movs r0, #3 8003b02: f000 ffe9 bl 8004ad8 8003b06: 4603 mov r3, r0 8003b08: 2b00 cmp r3, #0 8003b0a: d13e bne.n 8003b8a m3st=motWaitingTime; 8003b0c: 4b25 ldr r3, [pc, #148] @ (8003ba4 ) 8003b0e: 2202 movs r2, #2 8003b10: 701a strb r2, [r3, #0] } break; 8003b12: e03a b.n 8003b8a case motWaitingTime: if(rtCiclo>=apM3stop){ 8003b14: 4b26 ldr r3, [pc, #152] @ (8003bb0 ) 8003b16: 881b ldrh r3, [r3, #0] 8003b18: b29a uxth r2, r3 8003b1a: 4b2b ldr r3, [pc, #172] @ (8003bc8 ) 8003b1c: 881b ldrh r3, [r3, #0] 8003b1e: 429a cmp r2, r3 8003b20: d335 bcc.n 8003b8e (void)ramp(M3,FW,m3pwmap,0,tramp,RAMPINIT); 8003b22: 4b28 ldr r3, [pc, #160] @ (8003bc4 ) 8003b24: 881b ldrh r3, [r3, #0] 8003b26: b2da uxtb r2, r3 8003b28: 4b25 ldr r3, [pc, #148] @ (8003bc0 ) 8003b2a: 881b ldrh r3, [r3, #0] 8003b2c: b2db uxtb r3, r3 8003b2e: 2100 movs r1, #0 8003b30: 9101 str r1, [sp, #4] 8003b32: 9300 str r3, [sp, #0] 8003b34: 2300 movs r3, #0 8003b36: 2100 movs r1, #0 8003b38: 2003 movs r0, #3 8003b3a: f000 ffcd bl 8004ad8 m3st=motStopRamp; 8003b3e: 4b19 ldr r3, [pc, #100] @ (8003ba4 ) 8003b40: 2203 movs r2, #3 8003b42: 701a strb r2, [r3, #0] } break; 8003b44: e023 b.n 8003b8e case motStopRamp: if(ramp(M3,FW,m3pwmap,0,tramp,RAMPRUN)==DONE){ 8003b46: 4b1f ldr r3, [pc, #124] @ (8003bc4 ) 8003b48: 881b ldrh r3, [r3, #0] 8003b4a: b2da uxtb r2, r3 8003b4c: 4b1c ldr r3, [pc, #112] @ (8003bc0 ) 8003b4e: 881b ldrh r3, [r3, #0] 8003b50: b2db uxtb r3, r3 8003b52: 210a movs r1, #10 8003b54: 9101 str r1, [sp, #4] 8003b56: 9300 str r3, [sp, #0] 8003b58: 2300 movs r3, #0 8003b5a: 2100 movs r1, #0 8003b5c: 2003 movs r0, #3 8003b5e: f000 ffbb bl 8004ad8 8003b62: 4603 mov r3, r0 8003b64: 2b00 cmp r3, #0 8003b66: d114 bne.n 8003b92 m3st=motStop; 8003b68: 4b0e ldr r3, [pc, #56] @ (8003ba4 ) 8003b6a: 2204 movs r2, #4 8003b6c: 701a strb r2, [r3, #0] } break; 8003b6e: e010 b.n 8003b92 case motStop: default: SetMotPerc(M3,FW,0); 8003b70: 2200 movs r2, #0 8003b72: 2100 movs r1, #0 8003b74: 2003 movs r0, #3 8003b76: f000 fe2f bl 80047d8 SetMotPerc(M3,BW,0); 8003b7a: 2200 movs r2, #0 8003b7c: 2101 movs r1, #1 8003b7e: 2003 movs r0, #3 8003b80: f000 fe2a bl 80047d8 break; 8003b84: e006 b.n 8003b94 break; 8003b86: bf00 nop 8003b88: e004 b.n 8003b94 break; 8003b8a: bf00 nop 8003b8c: e002 b.n 8003b94 break; 8003b8e: bf00 nop 8003b90: e000 b.n 8003b94 break; 8003b92: bf00 nop } return m3st; 8003b94: 4b03 ldr r3, [pc, #12] @ (8003ba4 ) 8003b96: 781b ldrb r3, [r3, #0] } 8003b98: 4618 mov r0, r3 8003b9a: 3768 adds r7, #104 @ 0x68 8003b9c: 46bd mov sp, r7 8003b9e: bd80 pop {r7, pc} 8003ba0: 20000009 .word 0x20000009 8003ba4: 20000464 .word 0x20000464 8003ba8: 0800f388 .word 0x0800f388 8003bac: 200003a8 .word 0x200003a8 8003bb0: 200003fc .word 0x200003fc 8003bb4: 20000430 .word 0x20000430 8003bb8: 2000044c .word 0x2000044c 8003bbc: 20000404 .word 0x20000404 8003bc0: 20000418 .word 0x20000418 8003bc4: 20000408 .word 0x20000408 8003bc8: 20000432 .word 0x20000432 08003bcc : motMov_st m4ap(void){ 8003bcc: b580 push {r7, lr} 8003bce: b09c sub sp, #112 @ 0x70 8003bd0: af02 add r7, sp, #8 static motMov_st m4st; static motMov_st memm4st=motStop; char s[100]; if(memm4st!=m4st){ 8003bd2: 4b5d ldr r3, [pc, #372] @ (8003d48 ) 8003bd4: 781a ldrb r2, [r3, #0] 8003bd6: 4b5d ldr r3, [pc, #372] @ (8003d4c ) 8003bd8: 781b ldrb r3, [r3, #0] 8003bda: 429a cmp r2, r3 8003bdc: d017 beq.n 8003c0e memm4st=m4st; 8003bde: 4b5b ldr r3, [pc, #364] @ (8003d4c ) 8003be0: 781a ldrb r2, [r3, #0] 8003be2: 4b59 ldr r3, [pc, #356] @ (8003d48 ) 8003be4: 701a strb r2, [r3, #0] sprintf(s,"\nm4ap=%d",m4st); 8003be6: 4b59 ldr r3, [pc, #356] @ (8003d4c ) 8003be8: 781b ldrb r3, [r3, #0] 8003bea: 461a mov r2, r3 8003bec: 1d3b adds r3, r7, #4 8003bee: 4958 ldr r1, [pc, #352] @ (8003d50 ) 8003bf0: 4618 mov r0, r3 8003bf2: f00a fc0f bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8003bf6: 1d3b adds r3, r7, #4 8003bf8: 4618 mov r0, r3 8003bfa: f7fc faa7 bl 800014c 8003bfe: 4603 mov r3, r0 8003c00: b29a uxth r2, r3 8003c02: 1d39 adds r1, r7, #4 8003c04: f04f 33ff mov.w r3, #4294967295 8003c08: 4852 ldr r0, [pc, #328] @ (8003d54 ) 8003c0a: f005 fe13 bl 8009834 } if(rtCiclo) 8003c10: 881b ldrh r3, [r3, #0] 8003c12: b29a uxth r2, r3 8003c14: 4b51 ldr r3, [pc, #324] @ (8003d5c ) 8003c16: 881b ldrh r3, [r3, #0] 8003c18: 429a cmp r2, r3 8003c1a: d202 bcs.n 8003c22 8003c1c: 4b4b ldr r3, [pc, #300] @ (8003d4c ) 8003c1e: 2200 movs r2, #0 8003c20: 701a strb r2, [r3, #0] switch(m4st){ 8003c22: 4b4a ldr r3, [pc, #296] @ (8003d4c ) 8003c24: 781b ldrb r3, [r3, #0] 8003c26: 2b03 cmp r3, #3 8003c28: d876 bhi.n 8003d18 8003c2a: a201 add r2, pc, #4 @ (adr r2, 8003c30 ) 8003c2c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003c30: 08003c41 .word 0x08003c41 8003c34: 08003c8d .word 0x08003c8d 8003c38: 08003cbd .word 0x08003cbd 8003c3c: 08003cef .word 0x08003cef case motWaiting: SetMotPerc(M4,FW,0); 8003c40: 2200 movs r2, #0 8003c42: 2100 movs r1, #0 8003c44: 2004 movs r0, #4 8003c46: f000 fdc7 bl 80047d8 SetMotPerc(M4,BW,0); 8003c4a: 2200 movs r2, #0 8003c4c: 2101 movs r1, #1 8003c4e: 2004 movs r0, #4 8003c50: f000 fdc2 bl 80047d8 if(rtCiclo>=apM4start){ 8003c54: 4b40 ldr r3, [pc, #256] @ (8003d58 ) 8003c56: 881b ldrh r3, [r3, #0] 8003c58: b29a uxth r2, r3 8003c5a: 4b40 ldr r3, [pc, #256] @ (8003d5c ) 8003c5c: 881b ldrh r3, [r3, #0] 8003c5e: 429a cmp r2, r3 8003c60: d365 bcc.n 8003d2e (void)ramp(M4,FW,mrampstart[M4-1],m2pwmap,tramp,RAMPINIT); 8003c62: 4b3f ldr r3, [pc, #252] @ (8003d60 ) 8003c64: 88db ldrh r3, [r3, #6] 8003c66: b2da uxtb r2, r3 8003c68: 4b3e ldr r3, [pc, #248] @ (8003d64 ) 8003c6a: 881b ldrh r3, [r3, #0] 8003c6c: b2d9 uxtb r1, r3 8003c6e: 4b3e ldr r3, [pc, #248] @ (8003d68 ) 8003c70: 881b ldrh r3, [r3, #0] 8003c72: b2db uxtb r3, r3 8003c74: 2000 movs r0, #0 8003c76: 9001 str r0, [sp, #4] 8003c78: 9300 str r3, [sp, #0] 8003c7a: 460b mov r3, r1 8003c7c: 2100 movs r1, #0 8003c7e: 2004 movs r0, #4 8003c80: f000 ff2a bl 8004ad8 m4st=motStartRamp; 8003c84: 4b31 ldr r3, [pc, #196] @ (8003d4c ) 8003c86: 2201 movs r2, #1 8003c88: 701a strb r2, [r3, #0] } break; 8003c8a: e050 b.n 8003d2e case motStartRamp: if(ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){ 8003c8c: 4b34 ldr r3, [pc, #208] @ (8003d60 ) 8003c8e: 88db ldrh r3, [r3, #6] 8003c90: b2da uxtb r2, r3 8003c92: 4b36 ldr r3, [pc, #216] @ (8003d6c ) 8003c94: 881b ldrh r3, [r3, #0] 8003c96: b2d9 uxtb r1, r3 8003c98: 4b33 ldr r3, [pc, #204] @ (8003d68 ) 8003c9a: 881b ldrh r3, [r3, #0] 8003c9c: b2db uxtb r3, r3 8003c9e: 200a movs r0, #10 8003ca0: 9001 str r0, [sp, #4] 8003ca2: 9300 str r3, [sp, #0] 8003ca4: 460b mov r3, r1 8003ca6: 2100 movs r1, #0 8003ca8: 2004 movs r0, #4 8003caa: f000 ff15 bl 8004ad8 8003cae: 4603 mov r3, r0 8003cb0: 2b00 cmp r3, #0 8003cb2: d13e bne.n 8003d32 m4st=motWaitingTime; 8003cb4: 4b25 ldr r3, [pc, #148] @ (8003d4c ) 8003cb6: 2202 movs r2, #2 8003cb8: 701a strb r2, [r3, #0] } break; 8003cba: e03a b.n 8003d32 case motWaitingTime: if(rtCiclo>=apM4stop){ 8003cbc: 4b26 ldr r3, [pc, #152] @ (8003d58 ) 8003cbe: 881b ldrh r3, [r3, #0] 8003cc0: b29a uxth r2, r3 8003cc2: 4b2b ldr r3, [pc, #172] @ (8003d70 ) 8003cc4: 881b ldrh r3, [r3, #0] 8003cc6: 429a cmp r2, r3 8003cc8: d335 bcc.n 8003d36 (void)ramp(M4,FW,m4pwmap,0,tramp,RAMPINIT); 8003cca: 4b28 ldr r3, [pc, #160] @ (8003d6c ) 8003ccc: 881b ldrh r3, [r3, #0] 8003cce: b2da uxtb r2, r3 8003cd0: 4b25 ldr r3, [pc, #148] @ (8003d68 ) 8003cd2: 881b ldrh r3, [r3, #0] 8003cd4: b2db uxtb r3, r3 8003cd6: 2100 movs r1, #0 8003cd8: 9101 str r1, [sp, #4] 8003cda: 9300 str r3, [sp, #0] 8003cdc: 2300 movs r3, #0 8003cde: 2100 movs r1, #0 8003ce0: 2004 movs r0, #4 8003ce2: f000 fef9 bl 8004ad8 m4st=motStopRamp; 8003ce6: 4b19 ldr r3, [pc, #100] @ (8003d4c ) 8003ce8: 2203 movs r2, #3 8003cea: 701a strb r2, [r3, #0] } break; 8003cec: e023 b.n 8003d36 case motStopRamp: if(ramp(M4,FW,m4pwmap,0,tramp,RAMPRUN)==DONE){ 8003cee: 4b1f ldr r3, [pc, #124] @ (8003d6c ) 8003cf0: 881b ldrh r3, [r3, #0] 8003cf2: b2da uxtb r2, r3 8003cf4: 4b1c ldr r3, [pc, #112] @ (8003d68 ) 8003cf6: 881b ldrh r3, [r3, #0] 8003cf8: b2db uxtb r3, r3 8003cfa: 210a movs r1, #10 8003cfc: 9101 str r1, [sp, #4] 8003cfe: 9300 str r3, [sp, #0] 8003d00: 2300 movs r3, #0 8003d02: 2100 movs r1, #0 8003d04: 2004 movs r0, #4 8003d06: f000 fee7 bl 8004ad8 8003d0a: 4603 mov r3, r0 8003d0c: 2b00 cmp r3, #0 8003d0e: d114 bne.n 8003d3a m4st=motStop; 8003d10: 4b0e ldr r3, [pc, #56] @ (8003d4c ) 8003d12: 2204 movs r2, #4 8003d14: 701a strb r2, [r3, #0] } break; 8003d16: e010 b.n 8003d3a case motStop: default: SetMotPerc(M4,FW,0); 8003d18: 2200 movs r2, #0 8003d1a: 2100 movs r1, #0 8003d1c: 2004 movs r0, #4 8003d1e: f000 fd5b bl 80047d8 SetMotPerc(M4,BW,0); 8003d22: 2200 movs r2, #0 8003d24: 2101 movs r1, #1 8003d26: 2004 movs r0, #4 8003d28: f000 fd56 bl 80047d8 break; 8003d2c: e006 b.n 8003d3c break; 8003d2e: bf00 nop 8003d30: e004 b.n 8003d3c break; 8003d32: bf00 nop 8003d34: e002 b.n 8003d3c break; 8003d36: bf00 nop 8003d38: e000 b.n 8003d3c break; 8003d3a: bf00 nop } return m4st; 8003d3c: 4b03 ldr r3, [pc, #12] @ (8003d4c ) 8003d3e: 781b ldrb r3, [r3, #0] } 8003d40: 4618 mov r0, r3 8003d42: 3768 adds r7, #104 @ 0x68 8003d44: 46bd mov sp, r7 8003d46: bd80 pop {r7, pc} 8003d48: 2000000a .word 0x2000000a 8003d4c: 20000465 .word 0x20000465 8003d50: 0800f394 .word 0x0800f394 8003d54: 200003a8 .word 0x200003a8 8003d58: 200003fc .word 0x200003fc 8003d5c: 20000434 .word 0x20000434 8003d60: 2000044c .word 0x2000044c 8003d64: 20000404 .word 0x20000404 8003d68: 20000418 .word 0x20000418 8003d6c: 2000040c .word 0x2000040c 8003d70: 20000436 .word 0x20000436 08003d74 : motMov_st m1ch(void){ 8003d74: b580 push {r7, lr} 8003d76: b09c sub sp, #112 @ 0x70 8003d78: af02 add r7, sp, #8 static motMov_st m1st; static motMov_st memm1st=motStop; char s[100]; if(memm1st!=m1st){ 8003d7a: 4b5d ldr r3, [pc, #372] @ (8003ef0 ) 8003d7c: 781a ldrb r2, [r3, #0] 8003d7e: 4b5d ldr r3, [pc, #372] @ (8003ef4 ) 8003d80: 781b ldrb r3, [r3, #0] 8003d82: 429a cmp r2, r3 8003d84: d017 beq.n 8003db6 memm1st=m1st; 8003d86: 4b5b ldr r3, [pc, #364] @ (8003ef4 ) 8003d88: 781a ldrb r2, [r3, #0] 8003d8a: 4b59 ldr r3, [pc, #356] @ (8003ef0 ) 8003d8c: 701a strb r2, [r3, #0] sprintf(s,"\nm1ch=%d",m1st); 8003d8e: 4b59 ldr r3, [pc, #356] @ (8003ef4 ) 8003d90: 781b ldrb r3, [r3, #0] 8003d92: 461a mov r2, r3 8003d94: 1d3b adds r3, r7, #4 8003d96: 4958 ldr r1, [pc, #352] @ (8003ef8 ) 8003d98: 4618 mov r0, r3 8003d9a: f00a fb3b bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8003d9e: 1d3b adds r3, r7, #4 8003da0: 4618 mov r0, r3 8003da2: f7fc f9d3 bl 800014c 8003da6: 4603 mov r3, r0 8003da8: b29a uxth r2, r3 8003daa: 1d39 adds r1, r7, #4 8003dac: f04f 33ff mov.w r3, #4294967295 8003db0: 4852 ldr r0, [pc, #328] @ (8003efc ) 8003db2: f005 fd3f bl 8009834 } if(rtCiclo) 8003db8: 881b ldrh r3, [r3, #0] 8003dba: b29a uxth r2, r3 8003dbc: 4b51 ldr r3, [pc, #324] @ (8003f04 ) 8003dbe: 881b ldrh r3, [r3, #0] 8003dc0: 429a cmp r2, r3 8003dc2: d202 bcs.n 8003dca 8003dc4: 4b4b ldr r3, [pc, #300] @ (8003ef4 ) 8003dc6: 2200 movs r2, #0 8003dc8: 701a strb r2, [r3, #0] switch(m1st){ 8003dca: 4b4a ldr r3, [pc, #296] @ (8003ef4 ) 8003dcc: 781b ldrb r3, [r3, #0] 8003dce: 2b03 cmp r3, #3 8003dd0: d876 bhi.n 8003ec0 8003dd2: a201 add r2, pc, #4 @ (adr r2, 8003dd8 ) 8003dd4: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003dd8: 08003de9 .word 0x08003de9 8003ddc: 08003e35 .word 0x08003e35 8003de0: 08003e65 .word 0x08003e65 8003de4: 08003e97 .word 0x08003e97 case motWaiting: SetMotPerc(M1,FW,0); 8003de8: 2200 movs r2, #0 8003dea: 2100 movs r1, #0 8003dec: 2001 movs r0, #1 8003dee: f000 fcf3 bl 80047d8 SetMotPerc(M1,BW,0); 8003df2: 2200 movs r2, #0 8003df4: 2101 movs r1, #1 8003df6: 2001 movs r0, #1 8003df8: f000 fcee bl 80047d8 if(rtCiclo>=chM1start){ 8003dfc: 4b40 ldr r3, [pc, #256] @ (8003f00 ) 8003dfe: 881b ldrh r3, [r3, #0] 8003e00: b29a uxth r2, r3 8003e02: 4b40 ldr r3, [pc, #256] @ (8003f04 ) 8003e04: 881b ldrh r3, [r3, #0] 8003e06: 429a cmp r2, r3 8003e08: d365 bcc.n 8003ed6 (void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT); 8003e0a: 4b3f ldr r3, [pc, #252] @ (8003f08 ) 8003e0c: 881b ldrh r3, [r3, #0] 8003e0e: b2da uxtb r2, r3 8003e10: 4b3e ldr r3, [pc, #248] @ (8003f0c ) 8003e12: 881b ldrh r3, [r3, #0] 8003e14: b2d9 uxtb r1, r3 8003e16: 4b3e ldr r3, [pc, #248] @ (8003f10 ) 8003e18: 881b ldrh r3, [r3, #0] 8003e1a: b2db uxtb r3, r3 8003e1c: 2000 movs r0, #0 8003e1e: 9001 str r0, [sp, #4] 8003e20: 9300 str r3, [sp, #0] 8003e22: 460b mov r3, r1 8003e24: 2101 movs r1, #1 8003e26: 2001 movs r0, #1 8003e28: f000 fe56 bl 8004ad8 m1st=motStartRamp; 8003e2c: 4b31 ldr r3, [pc, #196] @ (8003ef4 ) 8003e2e: 2201 movs r2, #1 8003e30: 701a strb r2, [r3, #0] } break; 8003e32: e050 b.n 8003ed6 case motStartRamp: if(ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){ 8003e34: 4b34 ldr r3, [pc, #208] @ (8003f08 ) 8003e36: 881b ldrh r3, [r3, #0] 8003e38: b2da uxtb r2, r3 8003e3a: 4b34 ldr r3, [pc, #208] @ (8003f0c ) 8003e3c: 881b ldrh r3, [r3, #0] 8003e3e: b2d9 uxtb r1, r3 8003e40: 4b33 ldr r3, [pc, #204] @ (8003f10 ) 8003e42: 881b ldrh r3, [r3, #0] 8003e44: b2db uxtb r3, r3 8003e46: 200a movs r0, #10 8003e48: 9001 str r0, [sp, #4] 8003e4a: 9300 str r3, [sp, #0] 8003e4c: 460b mov r3, r1 8003e4e: 2101 movs r1, #1 8003e50: 2001 movs r0, #1 8003e52: f000 fe41 bl 8004ad8 8003e56: 4603 mov r3, r0 8003e58: 2b00 cmp r3, #0 8003e5a: d13e bne.n 8003eda m1st=motWaitingTime; 8003e5c: 4b25 ldr r3, [pc, #148] @ (8003ef4 ) 8003e5e: 2202 movs r2, #2 8003e60: 701a strb r2, [r3, #0] } break; 8003e62: e03a b.n 8003eda case motWaitingTime: if(rtCiclo>=chM1stop){ 8003e64: 4b26 ldr r3, [pc, #152] @ (8003f00 ) 8003e66: 881b ldrh r3, [r3, #0] 8003e68: b29a uxth r2, r3 8003e6a: 4b2a ldr r3, [pc, #168] @ (8003f14 ) 8003e6c: 881b ldrh r3, [r3, #0] 8003e6e: 429a cmp r2, r3 8003e70: d335 bcc.n 8003ede (void)ramp(M1,BW,m1pwmch,0,tramp,RAMPINIT); 8003e72: 4b26 ldr r3, [pc, #152] @ (8003f0c ) 8003e74: 881b ldrh r3, [r3, #0] 8003e76: b2da uxtb r2, r3 8003e78: 4b25 ldr r3, [pc, #148] @ (8003f10 ) 8003e7a: 881b ldrh r3, [r3, #0] 8003e7c: b2db uxtb r3, r3 8003e7e: 2100 movs r1, #0 8003e80: 9101 str r1, [sp, #4] 8003e82: 9300 str r3, [sp, #0] 8003e84: 2300 movs r3, #0 8003e86: 2101 movs r1, #1 8003e88: 2001 movs r0, #1 8003e8a: f000 fe25 bl 8004ad8 m1st=motStopRamp; 8003e8e: 4b19 ldr r3, [pc, #100] @ (8003ef4 ) 8003e90: 2203 movs r2, #3 8003e92: 701a strb r2, [r3, #0] } break; 8003e94: e023 b.n 8003ede case motStopRamp: if(ramp(M1,BW,m1pwmch,0,tramp,RAMPRUN)==DONE){ 8003e96: 4b1d ldr r3, [pc, #116] @ (8003f0c ) 8003e98: 881b ldrh r3, [r3, #0] 8003e9a: b2da uxtb r2, r3 8003e9c: 4b1c ldr r3, [pc, #112] @ (8003f10 ) 8003e9e: 881b ldrh r3, [r3, #0] 8003ea0: b2db uxtb r3, r3 8003ea2: 210a movs r1, #10 8003ea4: 9101 str r1, [sp, #4] 8003ea6: 9300 str r3, [sp, #0] 8003ea8: 2300 movs r3, #0 8003eaa: 2101 movs r1, #1 8003eac: 2001 movs r0, #1 8003eae: f000 fe13 bl 8004ad8 8003eb2: 4603 mov r3, r0 8003eb4: 2b00 cmp r3, #0 8003eb6: d114 bne.n 8003ee2 m1st=motStop; 8003eb8: 4b0e ldr r3, [pc, #56] @ (8003ef4 ) 8003eba: 2204 movs r2, #4 8003ebc: 701a strb r2, [r3, #0] } break; 8003ebe: e010 b.n 8003ee2 case motStop: default: SetMotPerc(M1,FW,0); 8003ec0: 2200 movs r2, #0 8003ec2: 2100 movs r1, #0 8003ec4: 2001 movs r0, #1 8003ec6: f000 fc87 bl 80047d8 SetMotPerc(M1,BW,0); 8003eca: 2200 movs r2, #0 8003ecc: 2101 movs r1, #1 8003ece: 2001 movs r0, #1 8003ed0: f000 fc82 bl 80047d8 break; 8003ed4: e006 b.n 8003ee4 break; 8003ed6: bf00 nop 8003ed8: e004 b.n 8003ee4 break; 8003eda: bf00 nop 8003edc: e002 b.n 8003ee4 break; 8003ede: bf00 nop 8003ee0: e000 b.n 8003ee4 break; 8003ee2: bf00 nop } return m1st; 8003ee4: 4b03 ldr r3, [pc, #12] @ (8003ef4 ) 8003ee6: 781b ldrb r3, [r3, #0] } 8003ee8: 4618 mov r0, r3 8003eea: 3768 adds r7, #104 @ 0x68 8003eec: 46bd mov sp, r7 8003eee: bd80 pop {r7, pc} 8003ef0: 2000000b .word 0x2000000b 8003ef4: 20000466 .word 0x20000466 8003ef8: 0800f3a0 .word 0x0800f3a0 8003efc: 200003a8 .word 0x200003a8 8003f00: 200003fc .word 0x200003fc 8003f04: 20000438 .word 0x20000438 8003f08: 2000044c .word 0x2000044c 8003f0c: 20000402 .word 0x20000402 8003f10: 20000418 .word 0x20000418 8003f14: 2000043a .word 0x2000043a 08003f18 : motMov_st m2ch(void){ 8003f18: b580 push {r7, lr} 8003f1a: b09c sub sp, #112 @ 0x70 8003f1c: af02 add r7, sp, #8 static motMov_st m2st; static motMov_st memm2st=motStop; char s[100]; if(memm2st!=m2st){ 8003f1e: 4b5d ldr r3, [pc, #372] @ (8004094 ) 8003f20: 781a ldrb r2, [r3, #0] 8003f22: 4b5d ldr r3, [pc, #372] @ (8004098 ) 8003f24: 781b ldrb r3, [r3, #0] 8003f26: 429a cmp r2, r3 8003f28: d017 beq.n 8003f5a memm2st=m2st; 8003f2a: 4b5b ldr r3, [pc, #364] @ (8004098 ) 8003f2c: 781a ldrb r2, [r3, #0] 8003f2e: 4b59 ldr r3, [pc, #356] @ (8004094 ) 8003f30: 701a strb r2, [r3, #0] sprintf(s,"\nm2ch=%d",m2st); 8003f32: 4b59 ldr r3, [pc, #356] @ (8004098 ) 8003f34: 781b ldrb r3, [r3, #0] 8003f36: 461a mov r2, r3 8003f38: 1d3b adds r3, r7, #4 8003f3a: 4958 ldr r1, [pc, #352] @ (800409c ) 8003f3c: 4618 mov r0, r3 8003f3e: f00a fa69 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8003f42: 1d3b adds r3, r7, #4 8003f44: 4618 mov r0, r3 8003f46: f7fc f901 bl 800014c 8003f4a: 4603 mov r3, r0 8003f4c: b29a uxth r2, r3 8003f4e: 1d39 adds r1, r7, #4 8003f50: f04f 33ff mov.w r3, #4294967295 8003f54: 4852 ldr r0, [pc, #328] @ (80040a0 ) 8003f56: f005 fc6d bl 8009834 } if(rtCiclo) 8003f5c: 881b ldrh r3, [r3, #0] 8003f5e: b29a uxth r2, r3 8003f60: 4b51 ldr r3, [pc, #324] @ (80040a8 ) 8003f62: 881b ldrh r3, [r3, #0] 8003f64: 429a cmp r2, r3 8003f66: d202 bcs.n 8003f6e 8003f68: 4b4b ldr r3, [pc, #300] @ (8004098 ) 8003f6a: 2200 movs r2, #0 8003f6c: 701a strb r2, [r3, #0] switch(m2st){ 8003f6e: 4b4a ldr r3, [pc, #296] @ (8004098 ) 8003f70: 781b ldrb r3, [r3, #0] 8003f72: 2b03 cmp r3, #3 8003f74: d876 bhi.n 8004064 8003f76: a201 add r2, pc, #4 @ (adr r2, 8003f7c ) 8003f78: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003f7c: 08003f8d .word 0x08003f8d 8003f80: 08003fd9 .word 0x08003fd9 8003f84: 08004009 .word 0x08004009 8003f88: 0800403b .word 0x0800403b case motWaiting: SetMotPerc(M2,FW,0); 8003f8c: 2200 movs r2, #0 8003f8e: 2100 movs r1, #0 8003f90: 2002 movs r0, #2 8003f92: f000 fc21 bl 80047d8 SetMotPerc(M2,BW,0); 8003f96: 2200 movs r2, #0 8003f98: 2101 movs r1, #1 8003f9a: 2002 movs r0, #2 8003f9c: f000 fc1c bl 80047d8 if(rtCiclo>=chM2start){ 8003fa0: 4b40 ldr r3, [pc, #256] @ (80040a4 ) 8003fa2: 881b ldrh r3, [r3, #0] 8003fa4: b29a uxth r2, r3 8003fa6: 4b40 ldr r3, [pc, #256] @ (80040a8 ) 8003fa8: 881b ldrh r3, [r3, #0] 8003faa: 429a cmp r2, r3 8003fac: d365 bcc.n 800407a (void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT); 8003fae: 4b3f ldr r3, [pc, #252] @ (80040ac ) 8003fb0: 885b ldrh r3, [r3, #2] 8003fb2: b2da uxtb r2, r3 8003fb4: 4b3e ldr r3, [pc, #248] @ (80040b0 ) 8003fb6: 881b ldrh r3, [r3, #0] 8003fb8: b2d9 uxtb r1, r3 8003fba: 4b3e ldr r3, [pc, #248] @ (80040b4 ) 8003fbc: 881b ldrh r3, [r3, #0] 8003fbe: b2db uxtb r3, r3 8003fc0: 2000 movs r0, #0 8003fc2: 9001 str r0, [sp, #4] 8003fc4: 9300 str r3, [sp, #0] 8003fc6: 460b mov r3, r1 8003fc8: 2100 movs r1, #0 8003fca: 2002 movs r0, #2 8003fcc: f000 fd84 bl 8004ad8 m2st=motStartRamp; 8003fd0: 4b31 ldr r3, [pc, #196] @ (8004098 ) 8003fd2: 2201 movs r2, #1 8003fd4: 701a strb r2, [r3, #0] } break; 8003fd6: e050 b.n 800407a case motStartRamp: if(ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE){ 8003fd8: 4b34 ldr r3, [pc, #208] @ (80040ac ) 8003fda: 885b ldrh r3, [r3, #2] 8003fdc: b2da uxtb r2, r3 8003fde: 4b34 ldr r3, [pc, #208] @ (80040b0 ) 8003fe0: 881b ldrh r3, [r3, #0] 8003fe2: b2d9 uxtb r1, r3 8003fe4: 4b33 ldr r3, [pc, #204] @ (80040b4 ) 8003fe6: 881b ldrh r3, [r3, #0] 8003fe8: b2db uxtb r3, r3 8003fea: 200a movs r0, #10 8003fec: 9001 str r0, [sp, #4] 8003fee: 9300 str r3, [sp, #0] 8003ff0: 460b mov r3, r1 8003ff2: 2100 movs r1, #0 8003ff4: 2002 movs r0, #2 8003ff6: f000 fd6f bl 8004ad8 8003ffa: 4603 mov r3, r0 8003ffc: 2b00 cmp r3, #0 8003ffe: d13e bne.n 800407e m2st=motWaitingTime; 8004000: 4b25 ldr r3, [pc, #148] @ (8004098 ) 8004002: 2202 movs r2, #2 8004004: 701a strb r2, [r3, #0] } break; 8004006: e03a b.n 800407e case motWaitingTime: if(rtCiclo>=chM2stop){ 8004008: 4b26 ldr r3, [pc, #152] @ (80040a4 ) 800400a: 881b ldrh r3, [r3, #0] 800400c: b29a uxth r2, r3 800400e: 4b2a ldr r3, [pc, #168] @ (80040b8 ) 8004010: 881b ldrh r3, [r3, #0] 8004012: 429a cmp r2, r3 8004014: d335 bcc.n 8004082 (void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT); 8004016: 4b26 ldr r3, [pc, #152] @ (80040b0 ) 8004018: 881b ldrh r3, [r3, #0] 800401a: b2da uxtb r2, r3 800401c: 4b25 ldr r3, [pc, #148] @ (80040b4 ) 800401e: 881b ldrh r3, [r3, #0] 8004020: b2db uxtb r3, r3 8004022: 2100 movs r1, #0 8004024: 9101 str r1, [sp, #4] 8004026: 9300 str r3, [sp, #0] 8004028: 2300 movs r3, #0 800402a: 2100 movs r1, #0 800402c: 2002 movs r0, #2 800402e: f000 fd53 bl 8004ad8 m2st=motStopRamp; 8004032: 4b19 ldr r3, [pc, #100] @ (8004098 ) 8004034: 2203 movs r2, #3 8004036: 701a strb r2, [r3, #0] } break; 8004038: e023 b.n 8004082 case motStopRamp: if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){ 800403a: 4b1d ldr r3, [pc, #116] @ (80040b0 ) 800403c: 881b ldrh r3, [r3, #0] 800403e: b2da uxtb r2, r3 8004040: 4b1c ldr r3, [pc, #112] @ (80040b4 ) 8004042: 881b ldrh r3, [r3, #0] 8004044: b2db uxtb r3, r3 8004046: 210a movs r1, #10 8004048: 9101 str r1, [sp, #4] 800404a: 9300 str r3, [sp, #0] 800404c: 2300 movs r3, #0 800404e: 2100 movs r1, #0 8004050: 2002 movs r0, #2 8004052: f000 fd41 bl 8004ad8 8004056: 4603 mov r3, r0 8004058: 2b00 cmp r3, #0 800405a: d114 bne.n 8004086 m2st=motStop; 800405c: 4b0e ldr r3, [pc, #56] @ (8004098 ) 800405e: 2204 movs r2, #4 8004060: 701a strb r2, [r3, #0] } break; 8004062: e010 b.n 8004086 case motStop: default: SetMotPerc(M2,FW,0); 8004064: 2200 movs r2, #0 8004066: 2100 movs r1, #0 8004068: 2002 movs r0, #2 800406a: f000 fbb5 bl 80047d8 SetMotPerc(M2,BW,0); 800406e: 2200 movs r2, #0 8004070: 2101 movs r1, #1 8004072: 2002 movs r0, #2 8004074: f000 fbb0 bl 80047d8 break; 8004078: e006 b.n 8004088 break; 800407a: bf00 nop 800407c: e004 b.n 8004088 break; 800407e: bf00 nop 8004080: e002 b.n 8004088 break; 8004082: bf00 nop 8004084: e000 b.n 8004088 break; 8004086: bf00 nop } return m2st; 8004088: 4b03 ldr r3, [pc, #12] @ (8004098 ) 800408a: 781b ldrb r3, [r3, #0] } 800408c: 4618 mov r0, r3 800408e: 3768 adds r7, #104 @ 0x68 8004090: 46bd mov sp, r7 8004092: bd80 pop {r7, pc} 8004094: 2000000c .word 0x2000000c 8004098: 20000467 .word 0x20000467 800409c: 0800f3ac .word 0x0800f3ac 80040a0: 200003a8 .word 0x200003a8 80040a4: 200003fc .word 0x200003fc 80040a8: 2000043c .word 0x2000043c 80040ac: 2000044c .word 0x2000044c 80040b0: 20000406 .word 0x20000406 80040b4: 20000418 .word 0x20000418 80040b8: 2000043e .word 0x2000043e 080040bc : motMov_st m3ch(void){ 80040bc: b580 push {r7, lr} 80040be: b09c sub sp, #112 @ 0x70 80040c0: af02 add r7, sp, #8 static motMov_st m3st; static motMov_st memm3st=motStop; char s[100]; if(memm3st!=m3st){ 80040c2: 4b5d ldr r3, [pc, #372] @ (8004238 ) 80040c4: 781a ldrb r2, [r3, #0] 80040c6: 4b5d ldr r3, [pc, #372] @ (800423c ) 80040c8: 781b ldrb r3, [r3, #0] 80040ca: 429a cmp r2, r3 80040cc: d017 beq.n 80040fe memm3st=m3st; 80040ce: 4b5b ldr r3, [pc, #364] @ (800423c ) 80040d0: 781a ldrb r2, [r3, #0] 80040d2: 4b59 ldr r3, [pc, #356] @ (8004238 ) 80040d4: 701a strb r2, [r3, #0] sprintf(s,"\nm3ch=%d",m3st); 80040d6: 4b59 ldr r3, [pc, #356] @ (800423c ) 80040d8: 781b ldrb r3, [r3, #0] 80040da: 461a mov r2, r3 80040dc: 1d3b adds r3, r7, #4 80040de: 4958 ldr r1, [pc, #352] @ (8004240 ) 80040e0: 4618 mov r0, r3 80040e2: f00a f997 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 80040e6: 1d3b adds r3, r7, #4 80040e8: 4618 mov r0, r3 80040ea: f7fc f82f bl 800014c 80040ee: 4603 mov r3, r0 80040f0: b29a uxth r2, r3 80040f2: 1d39 adds r1, r7, #4 80040f4: f04f 33ff mov.w r3, #4294967295 80040f8: 4852 ldr r0, [pc, #328] @ (8004244 ) 80040fa: f005 fb9b bl 8009834 } if(rtCiclo) 8004100: 881b ldrh r3, [r3, #0] 8004102: b29a uxth r2, r3 8004104: 4b51 ldr r3, [pc, #324] @ (800424c ) 8004106: 881b ldrh r3, [r3, #0] 8004108: 429a cmp r2, r3 800410a: d202 bcs.n 8004112 800410c: 4b4b ldr r3, [pc, #300] @ (800423c ) 800410e: 2200 movs r2, #0 8004110: 701a strb r2, [r3, #0] switch(m3st){ 8004112: 4b4a ldr r3, [pc, #296] @ (800423c ) 8004114: 781b ldrb r3, [r3, #0] 8004116: 2b03 cmp r3, #3 8004118: d876 bhi.n 8004208 800411a: a201 add r2, pc, #4 @ (adr r2, 8004120 ) 800411c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004120: 08004131 .word 0x08004131 8004124: 0800417d .word 0x0800417d 8004128: 080041ad .word 0x080041ad 800412c: 080041df .word 0x080041df case motWaiting: SetMotPerc(M3,FW,0); 8004130: 2200 movs r2, #0 8004132: 2100 movs r1, #0 8004134: 2003 movs r0, #3 8004136: f000 fb4f bl 80047d8 SetMotPerc(M3,BW,0); 800413a: 2200 movs r2, #0 800413c: 2101 movs r1, #1 800413e: 2003 movs r0, #3 8004140: f000 fb4a bl 80047d8 if(rtCiclo>=chM3start){ 8004144: 4b40 ldr r3, [pc, #256] @ (8004248 ) 8004146: 881b ldrh r3, [r3, #0] 8004148: b29a uxth r2, r3 800414a: 4b40 ldr r3, [pc, #256] @ (800424c ) 800414c: 881b ldrh r3, [r3, #0] 800414e: 429a cmp r2, r3 8004150: d365 bcc.n 800421e (void)ramp(M3,BW,mrampstart[M3-1],m2pwmch,tramp,RAMPINIT); 8004152: 4b3f ldr r3, [pc, #252] @ (8004250 ) 8004154: 889b ldrh r3, [r3, #4] 8004156: b2da uxtb r2, r3 8004158: 4b3e ldr r3, [pc, #248] @ (8004254 ) 800415a: 881b ldrh r3, [r3, #0] 800415c: b2d9 uxtb r1, r3 800415e: 4b3e ldr r3, [pc, #248] @ (8004258 ) 8004160: 881b ldrh r3, [r3, #0] 8004162: b2db uxtb r3, r3 8004164: 2000 movs r0, #0 8004166: 9001 str r0, [sp, #4] 8004168: 9300 str r3, [sp, #0] 800416a: 460b mov r3, r1 800416c: 2101 movs r1, #1 800416e: 2003 movs r0, #3 8004170: f000 fcb2 bl 8004ad8 m3st=motStartRamp; 8004174: 4b31 ldr r3, [pc, #196] @ (800423c ) 8004176: 2201 movs r2, #1 8004178: 701a strb r2, [r3, #0] } break; 800417a: e050 b.n 800421e case motStartRamp: if(ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){ 800417c: 4b34 ldr r3, [pc, #208] @ (8004250 ) 800417e: 889b ldrh r3, [r3, #4] 8004180: b2da uxtb r2, r3 8004182: 4b36 ldr r3, [pc, #216] @ (800425c ) 8004184: 881b ldrh r3, [r3, #0] 8004186: b2d9 uxtb r1, r3 8004188: 4b33 ldr r3, [pc, #204] @ (8004258 ) 800418a: 881b ldrh r3, [r3, #0] 800418c: b2db uxtb r3, r3 800418e: 200a movs r0, #10 8004190: 9001 str r0, [sp, #4] 8004192: 9300 str r3, [sp, #0] 8004194: 460b mov r3, r1 8004196: 2101 movs r1, #1 8004198: 2003 movs r0, #3 800419a: f000 fc9d bl 8004ad8 800419e: 4603 mov r3, r0 80041a0: 2b00 cmp r3, #0 80041a2: d13e bne.n 8004222 m3st=motWaitingTime; 80041a4: 4b25 ldr r3, [pc, #148] @ (800423c ) 80041a6: 2202 movs r2, #2 80041a8: 701a strb r2, [r3, #0] } break; 80041aa: e03a b.n 8004222 case motWaitingTime: if(rtCiclo>=chM3stop){ 80041ac: 4b26 ldr r3, [pc, #152] @ (8004248 ) 80041ae: 881b ldrh r3, [r3, #0] 80041b0: b29a uxth r2, r3 80041b2: 4b2b ldr r3, [pc, #172] @ (8004260 ) 80041b4: 881b ldrh r3, [r3, #0] 80041b6: 429a cmp r2, r3 80041b8: d335 bcc.n 8004226 (void)ramp(M3,BW,m3pwmch,0,tramp,RAMPINIT); 80041ba: 4b28 ldr r3, [pc, #160] @ (800425c ) 80041bc: 881b ldrh r3, [r3, #0] 80041be: b2da uxtb r2, r3 80041c0: 4b25 ldr r3, [pc, #148] @ (8004258 ) 80041c2: 881b ldrh r3, [r3, #0] 80041c4: b2db uxtb r3, r3 80041c6: 2100 movs r1, #0 80041c8: 9101 str r1, [sp, #4] 80041ca: 9300 str r3, [sp, #0] 80041cc: 2300 movs r3, #0 80041ce: 2101 movs r1, #1 80041d0: 2003 movs r0, #3 80041d2: f000 fc81 bl 8004ad8 m3st=motStopRamp; 80041d6: 4b19 ldr r3, [pc, #100] @ (800423c ) 80041d8: 2203 movs r2, #3 80041da: 701a strb r2, [r3, #0] } break; 80041dc: e023 b.n 8004226 case motStopRamp: if(ramp(M3,BW,m3pwmch,0,tramp,RAMPRUN)==DONE){ 80041de: 4b1f ldr r3, [pc, #124] @ (800425c ) 80041e0: 881b ldrh r3, [r3, #0] 80041e2: b2da uxtb r2, r3 80041e4: 4b1c ldr r3, [pc, #112] @ (8004258 ) 80041e6: 881b ldrh r3, [r3, #0] 80041e8: b2db uxtb r3, r3 80041ea: 210a movs r1, #10 80041ec: 9101 str r1, [sp, #4] 80041ee: 9300 str r3, [sp, #0] 80041f0: 2300 movs r3, #0 80041f2: 2101 movs r1, #1 80041f4: 2003 movs r0, #3 80041f6: f000 fc6f bl 8004ad8 80041fa: 4603 mov r3, r0 80041fc: 2b00 cmp r3, #0 80041fe: d114 bne.n 800422a m3st=motStop; 8004200: 4b0e ldr r3, [pc, #56] @ (800423c ) 8004202: 2204 movs r2, #4 8004204: 701a strb r2, [r3, #0] } break; 8004206: e010 b.n 800422a case motStop: default: SetMotPerc(M3,FW,0); 8004208: 2200 movs r2, #0 800420a: 2100 movs r1, #0 800420c: 2003 movs r0, #3 800420e: f000 fae3 bl 80047d8 SetMotPerc(M3,BW,0); 8004212: 2200 movs r2, #0 8004214: 2101 movs r1, #1 8004216: 2003 movs r0, #3 8004218: f000 fade bl 80047d8 break; 800421c: e006 b.n 800422c break; 800421e: bf00 nop 8004220: e004 b.n 800422c break; 8004222: bf00 nop 8004224: e002 b.n 800422c break; 8004226: bf00 nop 8004228: e000 b.n 800422c break; 800422a: bf00 nop } return m3st; 800422c: 4b03 ldr r3, [pc, #12] @ (800423c ) 800422e: 781b ldrb r3, [r3, #0] } 8004230: 4618 mov r0, r3 8004232: 3768 adds r7, #104 @ 0x68 8004234: 46bd mov sp, r7 8004236: bd80 pop {r7, pc} 8004238: 2000000d .word 0x2000000d 800423c: 20000468 .word 0x20000468 8004240: 0800f3b8 .word 0x0800f3b8 8004244: 200003a8 .word 0x200003a8 8004248: 200003fc .word 0x200003fc 800424c: 20000440 .word 0x20000440 8004250: 2000044c .word 0x2000044c 8004254: 20000406 .word 0x20000406 8004258: 20000418 .word 0x20000418 800425c: 2000040a .word 0x2000040a 8004260: 20000442 .word 0x20000442 08004264 : motMov_st m4ch(void){ 8004264: b580 push {r7, lr} 8004266: b09c sub sp, #112 @ 0x70 8004268: af02 add r7, sp, #8 static motMov_st m4st; static motMov_st memm4st=motStop; char s[100]; if(memm4st!=m4st){ 800426a: 4b5d ldr r3, [pc, #372] @ (80043e0 ) 800426c: 781a ldrb r2, [r3, #0] 800426e: 4b5d ldr r3, [pc, #372] @ (80043e4 ) 8004270: 781b ldrb r3, [r3, #0] 8004272: 429a cmp r2, r3 8004274: d017 beq.n 80042a6 memm4st=m4st; 8004276: 4b5b ldr r3, [pc, #364] @ (80043e4 ) 8004278: 781a ldrb r2, [r3, #0] 800427a: 4b59 ldr r3, [pc, #356] @ (80043e0 ) 800427c: 701a strb r2, [r3, #0] sprintf(s,"\nm4ch=%d",m4st); 800427e: 4b59 ldr r3, [pc, #356] @ (80043e4 ) 8004280: 781b ldrb r3, [r3, #0] 8004282: 461a mov r2, r3 8004284: 1d3b adds r3, r7, #4 8004286: 4958 ldr r1, [pc, #352] @ (80043e8 ) 8004288: 4618 mov r0, r3 800428a: f00a f8c3 bl 800e414 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 800428e: 1d3b adds r3, r7, #4 8004290: 4618 mov r0, r3 8004292: f7fb ff5b bl 800014c 8004296: 4603 mov r3, r0 8004298: b29a uxth r2, r3 800429a: 1d39 adds r1, r7, #4 800429c: f04f 33ff mov.w r3, #4294967295 80042a0: 4852 ldr r0, [pc, #328] @ (80043ec ) 80042a2: f005 fac7 bl 8009834 } if(rtCiclo) 80042a8: 881b ldrh r3, [r3, #0] 80042aa: b29a uxth r2, r3 80042ac: 4b51 ldr r3, [pc, #324] @ (80043f4 ) 80042ae: 881b ldrh r3, [r3, #0] 80042b0: 429a cmp r2, r3 80042b2: d202 bcs.n 80042ba 80042b4: 4b4b ldr r3, [pc, #300] @ (80043e4 ) 80042b6: 2200 movs r2, #0 80042b8: 701a strb r2, [r3, #0] switch(m4st){ 80042ba: 4b4a ldr r3, [pc, #296] @ (80043e4 ) 80042bc: 781b ldrb r3, [r3, #0] 80042be: 2b03 cmp r3, #3 80042c0: d876 bhi.n 80043b0 80042c2: a201 add r2, pc, #4 @ (adr r2, 80042c8 ) 80042c4: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80042c8: 080042d9 .word 0x080042d9 80042cc: 08004325 .word 0x08004325 80042d0: 08004355 .word 0x08004355 80042d4: 08004387 .word 0x08004387 case motWaiting: SetMotPerc(M4,FW,0); 80042d8: 2200 movs r2, #0 80042da: 2100 movs r1, #0 80042dc: 2004 movs r0, #4 80042de: f000 fa7b bl 80047d8 SetMotPerc(M4,BW,0); 80042e2: 2200 movs r2, #0 80042e4: 2101 movs r1, #1 80042e6: 2004 movs r0, #4 80042e8: f000 fa76 bl 80047d8 if(rtCiclo>=chM4start){ 80042ec: 4b40 ldr r3, [pc, #256] @ (80043f0 ) 80042ee: 881b ldrh r3, [r3, #0] 80042f0: b29a uxth r2, r3 80042f2: 4b40 ldr r3, [pc, #256] @ (80043f4 ) 80042f4: 881b ldrh r3, [r3, #0] 80042f6: 429a cmp r2, r3 80042f8: d365 bcc.n 80043c6 (void)ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT); 80042fa: 4b3f ldr r3, [pc, #252] @ (80043f8 ) 80042fc: 88db ldrh r3, [r3, #6] 80042fe: b2da uxtb r2, r3 8004300: 4b3e ldr r3, [pc, #248] @ (80043fc ) 8004302: 881b ldrh r3, [r3, #0] 8004304: b2d9 uxtb r1, r3 8004306: 4b3e ldr r3, [pc, #248] @ (8004400 ) 8004308: 881b ldrh r3, [r3, #0] 800430a: b2db uxtb r3, r3 800430c: 2000 movs r0, #0 800430e: 9001 str r0, [sp, #4] 8004310: 9300 str r3, [sp, #0] 8004312: 460b mov r3, r1 8004314: 2101 movs r1, #1 8004316: 2004 movs r0, #4 8004318: f000 fbde bl 8004ad8 m4st=motStartRamp; 800431c: 4b31 ldr r3, [pc, #196] @ (80043e4 ) 800431e: 2201 movs r2, #1 8004320: 701a strb r2, [r3, #0] } break; 8004322: e050 b.n 80043c6 case motStartRamp: if(ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE){ 8004324: 4b34 ldr r3, [pc, #208] @ (80043f8 ) 8004326: 88db ldrh r3, [r3, #6] 8004328: b2da uxtb r2, r3 800432a: 4b34 ldr r3, [pc, #208] @ (80043fc ) 800432c: 881b ldrh r3, [r3, #0] 800432e: b2d9 uxtb r1, r3 8004330: 4b33 ldr r3, [pc, #204] @ (8004400 ) 8004332: 881b ldrh r3, [r3, #0] 8004334: b2db uxtb r3, r3 8004336: 200a movs r0, #10 8004338: 9001 str r0, [sp, #4] 800433a: 9300 str r3, [sp, #0] 800433c: 460b mov r3, r1 800433e: 2101 movs r1, #1 8004340: 2004 movs r0, #4 8004342: f000 fbc9 bl 8004ad8 8004346: 4603 mov r3, r0 8004348: 2b00 cmp r3, #0 800434a: d13e bne.n 80043ca m4st=motWaitingTime; 800434c: 4b25 ldr r3, [pc, #148] @ (80043e4 ) 800434e: 2202 movs r2, #2 8004350: 701a strb r2, [r3, #0] } break; 8004352: e03a b.n 80043ca case motWaitingTime: if(rtCiclo>=chM4stop){ 8004354: 4b26 ldr r3, [pc, #152] @ (80043f0 ) 8004356: 881b ldrh r3, [r3, #0] 8004358: b29a uxth r2, r3 800435a: 4b2a ldr r3, [pc, #168] @ (8004404 ) 800435c: 881b ldrh r3, [r3, #0] 800435e: 429a cmp r2, r3 8004360: d335 bcc.n 80043ce (void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT); 8004362: 4b26 ldr r3, [pc, #152] @ (80043fc ) 8004364: 881b ldrh r3, [r3, #0] 8004366: b2da uxtb r2, r3 8004368: 4b25 ldr r3, [pc, #148] @ (8004400 ) 800436a: 881b ldrh r3, [r3, #0] 800436c: b2db uxtb r3, r3 800436e: 2100 movs r1, #0 8004370: 9101 str r1, [sp, #4] 8004372: 9300 str r3, [sp, #0] 8004374: 2300 movs r3, #0 8004376: 2101 movs r1, #1 8004378: 2004 movs r0, #4 800437a: f000 fbad bl 8004ad8 m4st=motStopRamp; 800437e: 4b19 ldr r3, [pc, #100] @ (80043e4 ) 8004380: 2203 movs r2, #3 8004382: 701a strb r2, [r3, #0] } break; 8004384: e023 b.n 80043ce case motStopRamp: if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){ 8004386: 4b1d ldr r3, [pc, #116] @ (80043fc ) 8004388: 881b ldrh r3, [r3, #0] 800438a: b2da uxtb r2, r3 800438c: 4b1c ldr r3, [pc, #112] @ (8004400 ) 800438e: 881b ldrh r3, [r3, #0] 8004390: b2db uxtb r3, r3 8004392: 210a movs r1, #10 8004394: 9101 str r1, [sp, #4] 8004396: 9300 str r3, [sp, #0] 8004398: 2300 movs r3, #0 800439a: 2101 movs r1, #1 800439c: 2004 movs r0, #4 800439e: f000 fb9b bl 8004ad8 80043a2: 4603 mov r3, r0 80043a4: 2b00 cmp r3, #0 80043a6: d114 bne.n 80043d2 m4st=motStop; 80043a8: 4b0e ldr r3, [pc, #56] @ (80043e4 ) 80043aa: 2204 movs r2, #4 80043ac: 701a strb r2, [r3, #0] } break; 80043ae: e010 b.n 80043d2 case motStop: default: SetMotPerc(M4,FW,0); 80043b0: 2200 movs r2, #0 80043b2: 2100 movs r1, #0 80043b4: 2004 movs r0, #4 80043b6: f000 fa0f bl 80047d8 SetMotPerc(M4,BW,0); 80043ba: 2200 movs r2, #0 80043bc: 2101 movs r1, #1 80043be: 2004 movs r0, #4 80043c0: f000 fa0a bl 80047d8 break; 80043c4: e006 b.n 80043d4 break; 80043c6: bf00 nop 80043c8: e004 b.n 80043d4 break; 80043ca: bf00 nop 80043cc: e002 b.n 80043d4 break; 80043ce: bf00 nop 80043d0: e000 b.n 80043d4 break; 80043d2: bf00 nop } return m4st; 80043d4: 4b03 ldr r3, [pc, #12] @ (80043e4 ) 80043d6: 781b ldrb r3, [r3, #0] } 80043d8: 4618 mov r0, r3 80043da: 3768 adds r7, #104 @ 0x68 80043dc: 46bd mov sp, r7 80043de: bd80 pop {r7, pc} 80043e0: 2000000e .word 0x2000000e 80043e4: 20000469 .word 0x20000469 80043e8: 0800f3c4 .word 0x0800f3c4 80043ec: 200003a8 .word 0x200003a8 80043f0: 200003fc .word 0x200003fc 80043f4: 20000444 .word 0x20000444 80043f8: 2000044c .word 0x2000044c 80043fc: 2000040e .word 0x2000040e 8004400: 20000418 .word 0x20000418 8004404: 20000446 .word 0x20000446 08004408 : extern volatile uint16_t rtramp[4]; extern uint16_t mrampstart[4]; extern UART_HandleTypeDef huart1; bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel) { 8004408: b580 push {r7, lr} 800440a: b084 sub sp, #16 800440c: af00 add r7, sp, #0 800440e: 6078 str r0, [r7, #4] 8004410: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel); 8004412: 6839 ldr r1, [r7, #0] 8004414: 6878 ldr r0, [r7, #4] 8004416: f004 fe86 bl 8009126 800441a: 4603 mov r3, r0 800441c: 73fb strb r3, [r7, #15] return (chState == HAL_TIM_CHANNEL_STATE_BUSY); 800441e: 7bfb ldrb r3, [r7, #15] 8004420: 2b02 cmp r3, #2 8004422: bf0c ite eq 8004424: 2301 moveq r3, #1 8004426: 2300 movne r3, #0 8004428: b2db uxtb r3, r3 } 800442a: 4618 mov r0, r3 800442c: 3710 adds r7, #16 800442e: 46bd mov sp, r7 8004430: bd80 pop {r7, pc} 08004432 : void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){ 8004432: b580 push {r7, lr} 8004434: b082 sub sp, #8 8004436: af00 add r7, sp, #0 8004438: 6078 str r0, [r7, #4] 800443a: 6039 str r1, [r7, #0] HAL_TIM_PWM_Stop(htim, Channel); 800443c: 6839 ldr r1, [r7, #0] 800443e: 6878 ldr r0, [r7, #4] 8004440: f004 fc84 bl 8008d4c } 8004444: bf00 nop 8004446: 3708 adds r7, #8 8004448: 46bd mov sp, r7 800444a: bd80 pop {r7, pc} 0800444c : void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 800444c: b580 push {r7, lr} 800444e: b084 sub sp, #16 8004450: af00 add r7, sp, #0 8004452: 60f8 str r0, [r7, #12] 8004454: 60b9 str r1, [r7, #8] 8004456: 4613 mov r3, r2 8004458: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 800445a: 68bb ldr r3, [r7, #8] 800445c: 2b00 cmp r3, #0 800445e: d104 bne.n 800446a 8004460: 68fb ldr r3, [r7, #12] 8004462: 681b ldr r3, [r3, #0] 8004464: 88fa ldrh r2, [r7, #6] 8004466: 635a str r2, [r3, #52] @ 0x34 8004468: e013 b.n 8004492 800446a: 68bb ldr r3, [r7, #8] 800446c: 2b04 cmp r3, #4 800446e: d104 bne.n 800447a 8004470: 68fb ldr r3, [r7, #12] 8004472: 681a ldr r2, [r3, #0] 8004474: 88fb ldrh r3, [r7, #6] 8004476: 6393 str r3, [r2, #56] @ 0x38 8004478: e00b b.n 8004492 800447a: 68bb ldr r3, [r7, #8] 800447c: 2b08 cmp r3, #8 800447e: d104 bne.n 800448a 8004480: 68fb ldr r3, [r7, #12] 8004482: 681a ldr r2, [r3, #0] 8004484: 88fb ldrh r3, [r7, #6] 8004486: 63d3 str r3, [r2, #60] @ 0x3c 8004488: e003 b.n 8004492 800448a: 68fb ldr r3, [r7, #12] 800448c: 681a ldr r2, [r3, #0] 800448e: 88fb ldrh r3, [r7, #6] 8004490: 6413 str r3, [r2, #64] @ 0x40 HAL_TIM_PWM_Start(htim, Channel); 8004492: 68b9 ldr r1, [r7, #8] 8004494: 68f8 ldr r0, [r7, #12] 8004496: f004 fbb7 bl 8008c08 } 800449a: bf00 nop 800449c: 3710 adds r7, #16 800449e: 46bd mov sp, r7 80044a0: bd80 pop {r7, pc} 080044a2 : void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 80044a2: b480 push {r7} 80044a4: b085 sub sp, #20 80044a6: af00 add r7, sp, #0 80044a8: 60f8 str r0, [r7, #12] 80044aa: 60b9 str r1, [r7, #8] 80044ac: 4613 mov r3, r2 80044ae: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80044b0: 68bb ldr r3, [r7, #8] 80044b2: 2b00 cmp r3, #0 80044b4: d104 bne.n 80044c0 80044b6: 68fb ldr r3, [r7, #12] 80044b8: 681b ldr r3, [r3, #0] 80044ba: 88fa ldrh r2, [r7, #6] 80044bc: 635a str r2, [r3, #52] @ 0x34 } 80044be: e013 b.n 80044e8 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80044c0: 68bb ldr r3, [r7, #8] 80044c2: 2b04 cmp r3, #4 80044c4: d104 bne.n 80044d0 80044c6: 68fb ldr r3, [r7, #12] 80044c8: 681a ldr r2, [r3, #0] 80044ca: 88fb ldrh r3, [r7, #6] 80044cc: 6393 str r3, [r2, #56] @ 0x38 } 80044ce: e00b b.n 80044e8 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80044d0: 68bb ldr r3, [r7, #8] 80044d2: 2b08 cmp r3, #8 80044d4: d104 bne.n 80044e0 80044d6: 68fb ldr r3, [r7, #12] 80044d8: 681a ldr r2, [r3, #0] 80044da: 88fb ldrh r3, [r7, #6] 80044dc: 63d3 str r3, [r2, #60] @ 0x3c } 80044de: e003 b.n 80044e8 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80044e0: 68fb ldr r3, [r7, #12] 80044e2: 681a ldr r2, [r3, #0] 80044e4: 88fb ldrh r3, [r7, #6] 80044e6: 6413 str r3, [r2, #64] @ 0x40 } 80044e8: bf00 nop 80044ea: 3714 adds r7, #20 80044ec: 46bd mov sp, r7 80044ee: bc80 pop {r7} 80044f0: 4770 bx lr ... 080044f4 : void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){ 80044f4: b580 push {r7, lr} 80044f6: b082 sub sp, #8 80044f8: af00 add r7, sp, #0 80044fa: 4603 mov r3, r0 80044fc: 71fb strb r3, [r7, #7] 80044fe: 460b mov r3, r1 8004500: 71bb strb r3, [r7, #6] 8004502: 4613 mov r3, r2 8004504: 80bb strh r3, [r7, #4] switch(mot){ 8004506: 79fb ldrb r3, [r7, #7] 8004508: 3b01 subs r3, #1 800450a: 2b03 cmp r3, #3 800450c: f200 8158 bhi.w 80047c0 8004510: a201 add r2, pc, #4 @ (adr r2, 8004518 ) 8004512: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004516: bf00 nop 8004518: 08004529 .word 0x08004529 800451c: 080045cb .word 0x080045cb 8004520: 0800466d .word 0x0800466d 8004524: 08004717 .word 0x08004717 case 1: if(dir==FW){ 8004528: 79bb ldrb r3, [r7, #6] 800452a: 2b00 cmp r3, #0 800452c: d126 bne.n 800457c if(pwmval==0){ 800452e: 88bb ldrh r3, [r7, #4] 8004530: 2b00 cmp r3, #0 8004532: d109 bne.n 8004548 StopMot(timMot1,FWMot1); 8004534: 2100 movs r1, #0 8004536: 48a5 ldr r0, [pc, #660] @ (80047cc ) 8004538: f7ff ff7b bl 8004432 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 800453c: 2200 movs r2, #0 800453e: 2102 movs r1, #2 8004540: 48a3 ldr r0, [pc, #652] @ (80047d0 ) 8004542: f002 f878 bl 8006636 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); StartMot(timMot1,BWMot1,pwmval); } } break; 8004546: e13c b.n 80047c2 }else if(IsPwmRunning(timMot1, FWMot1)){ 8004548: 2100 movs r1, #0 800454a: 48a0 ldr r0, [pc, #640] @ (80047cc ) 800454c: f7ff ff5c bl 8004408 8004550: 4603 mov r3, r0 8004552: 2b00 cmp r3, #0 8004554: d006 beq.n 8004564 SetMotPwm(timMot1,FWMot1,pwmval); 8004556: 88bb ldrh r3, [r7, #4] 8004558: 461a mov r2, r3 800455a: 2100 movs r1, #0 800455c: 489b ldr r0, [pc, #620] @ (80047cc ) 800455e: f7ff ffa0 bl 80044a2 break; 8004562: e12e b.n 80047c2 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 8004564: 2201 movs r2, #1 8004566: 2102 movs r1, #2 8004568: 4899 ldr r0, [pc, #612] @ (80047d0 ) 800456a: f002 f864 bl 8006636 StartMot(timMot1,FWMot1,pwmval); 800456e: 88bb ldrh r3, [r7, #4] 8004570: 461a mov r2, r3 8004572: 2100 movs r1, #0 8004574: 4895 ldr r0, [pc, #596] @ (80047cc ) 8004576: f7ff ff69 bl 800444c break; 800457a: e122 b.n 80047c2 if(pwmval==0){ 800457c: 88bb ldrh r3, [r7, #4] 800457e: 2b00 cmp r3, #0 8004580: d109 bne.n 8004596 StopMot(timMot1,BWMot1); 8004582: 2104 movs r1, #4 8004584: 4891 ldr r0, [pc, #580] @ (80047cc ) 8004586: f7ff ff54 bl 8004432 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 800458a: 2200 movs r2, #0 800458c: 2102 movs r1, #2 800458e: 4890 ldr r0, [pc, #576] @ (80047d0 ) 8004590: f002 f851 bl 8006636 break; 8004594: e115 b.n 80047c2 }else if(IsPwmRunning(timMot1, BWMot1)){ 8004596: 2104 movs r1, #4 8004598: 488c ldr r0, [pc, #560] @ (80047cc ) 800459a: f7ff ff35 bl 8004408 800459e: 4603 mov r3, r0 80045a0: 2b00 cmp r3, #0 80045a2: d006 beq.n 80045b2 SetMotPwm(timMot1,BWMot1,pwmval); 80045a4: 88bb ldrh r3, [r7, #4] 80045a6: 461a mov r2, r3 80045a8: 2104 movs r1, #4 80045aa: 4888 ldr r0, [pc, #544] @ (80047cc ) 80045ac: f7ff ff79 bl 80044a2 break; 80045b0: e107 b.n 80047c2 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 80045b2: 2201 movs r2, #1 80045b4: 2102 movs r1, #2 80045b6: 4886 ldr r0, [pc, #536] @ (80047d0 ) 80045b8: f002 f83d bl 8006636 StartMot(timMot1,BWMot1,pwmval); 80045bc: 88bb ldrh r3, [r7, #4] 80045be: 461a mov r2, r3 80045c0: 2104 movs r1, #4 80045c2: 4882 ldr r0, [pc, #520] @ (80047cc ) 80045c4: f7ff ff42 bl 800444c break; 80045c8: e0fb b.n 80047c2 case 2: if(dir==FW){ 80045ca: 79bb ldrb r3, [r7, #6] 80045cc: 2b00 cmp r3, #0 80045ce: d126 bne.n 800461e if(pwmval==0){ 80045d0: 88bb ldrh r3, [r7, #4] 80045d2: 2b00 cmp r3, #0 80045d4: d109 bne.n 80045ea StopMot(timMot2,FWMot2); 80045d6: 2108 movs r1, #8 80045d8: 487c ldr r0, [pc, #496] @ (80047cc ) 80045da: f7ff ff2a bl 8004432 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 80045de: 2200 movs r2, #0 80045e0: 2104 movs r1, #4 80045e2: 487b ldr r0, [pc, #492] @ (80047d0 ) 80045e4: f002 f827 bl 8006636 }else{ HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); StartMot(timMot2,BWMot2,pwmval); } } break; 80045e8: e0eb b.n 80047c2 }else if(IsPwmRunning(timMot2, FWMot2)){ 80045ea: 2108 movs r1, #8 80045ec: 4877 ldr r0, [pc, #476] @ (80047cc ) 80045ee: f7ff ff0b bl 8004408 80045f2: 4603 mov r3, r0 80045f4: 2b00 cmp r3, #0 80045f6: d006 beq.n 8004606 SetMotPwm(timMot2,FWMot2,pwmval); 80045f8: 88bb ldrh r3, [r7, #4] 80045fa: 461a mov r2, r3 80045fc: 2108 movs r1, #8 80045fe: 4873 ldr r0, [pc, #460] @ (80047cc ) 8004600: f7ff ff4f bl 80044a2 break; 8004604: e0dd b.n 80047c2 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8004606: 2201 movs r2, #1 8004608: 2104 movs r1, #4 800460a: 4871 ldr r0, [pc, #452] @ (80047d0 ) 800460c: f002 f813 bl 8006636 StartMot(timMot2,FWMot2,pwmval); 8004610: 88bb ldrh r3, [r7, #4] 8004612: 461a mov r2, r3 8004614: 2108 movs r1, #8 8004616: 486d ldr r0, [pc, #436] @ (80047cc ) 8004618: f7ff ff18 bl 800444c break; 800461c: e0d1 b.n 80047c2 if(pwmval==0){ 800461e: 88bb ldrh r3, [r7, #4] 8004620: 2b00 cmp r3, #0 8004622: d109 bne.n 8004638 StopMot(timMot2,BWMot2); 8004624: 210c movs r1, #12 8004626: 4869 ldr r0, [pc, #420] @ (80047cc ) 8004628: f7ff ff03 bl 8004432 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 800462c: 2200 movs r2, #0 800462e: 2104 movs r1, #4 8004630: 4867 ldr r0, [pc, #412] @ (80047d0 ) 8004632: f002 f800 bl 8006636 break; 8004636: e0c4 b.n 80047c2 }else if(IsPwmRunning(timMot2, BWMot2)){ 8004638: 210c movs r1, #12 800463a: 4864 ldr r0, [pc, #400] @ (80047cc ) 800463c: f7ff fee4 bl 8004408 8004640: 4603 mov r3, r0 8004642: 2b00 cmp r3, #0 8004644: d006 beq.n 8004654 SetMotPwm(timMot2,BWMot2,pwmval); 8004646: 88bb ldrh r3, [r7, #4] 8004648: 461a mov r2, r3 800464a: 210c movs r1, #12 800464c: 485f ldr r0, [pc, #380] @ (80047cc ) 800464e: f7ff ff28 bl 80044a2 break; 8004652: e0b6 b.n 80047c2 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8004654: 2201 movs r2, #1 8004656: 2104 movs r1, #4 8004658: 485d ldr r0, [pc, #372] @ (80047d0 ) 800465a: f001 ffec bl 8006636 StartMot(timMot2,BWMot2,pwmval); 800465e: 88bb ldrh r3, [r7, #4] 8004660: 461a mov r2, r3 8004662: 210c movs r1, #12 8004664: 4859 ldr r0, [pc, #356] @ (80047cc ) 8004666: f7ff fef1 bl 800444c break; 800466a: e0aa b.n 80047c2 case 3: if(dir==FW){ 800466c: 79bb ldrb r3, [r7, #6] 800466e: 2b00 cmp r3, #0 8004670: d128 bne.n 80046c4 if(pwmval==0){ 8004672: 88bb ldrh r3, [r7, #4] 8004674: 2b00 cmp r3, #0 8004676: d10a bne.n 800468e StopMot(timMot3,FWMot3); 8004678: 2100 movs r1, #0 800467a: 4856 ldr r0, [pc, #344] @ (80047d4 ) 800467c: f7ff fed9 bl 8004432 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8004680: 2200 movs r2, #0 8004682: f44f 6180 mov.w r1, #1024 @ 0x400 8004686: 4852 ldr r0, [pc, #328] @ (80047d0 ) 8004688: f001 ffd5 bl 8006636 }else{ HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); StartMot(timMot3,BWMot3,pwmval); } } break; 800468c: e099 b.n 80047c2 }else if(IsPwmRunning(timMot3, FWMot3)){ 800468e: 2100 movs r1, #0 8004690: 4850 ldr r0, [pc, #320] @ (80047d4 ) 8004692: f7ff feb9 bl 8004408 8004696: 4603 mov r3, r0 8004698: 2b00 cmp r3, #0 800469a: d006 beq.n 80046aa SetMotPwm(timMot3,FWMot3,pwmval); 800469c: 88bb ldrh r3, [r7, #4] 800469e: 461a mov r2, r3 80046a0: 2100 movs r1, #0 80046a2: 484c ldr r0, [pc, #304] @ (80047d4 ) 80046a4: f7ff fefd bl 80044a2 break; 80046a8: e08b b.n 80047c2 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 80046aa: 2201 movs r2, #1 80046ac: f44f 6180 mov.w r1, #1024 @ 0x400 80046b0: 4847 ldr r0, [pc, #284] @ (80047d0 ) 80046b2: f001 ffc0 bl 8006636 StartMot(timMot3,FWMot3,pwmval); 80046b6: 88bb ldrh r3, [r7, #4] 80046b8: 461a mov r2, r3 80046ba: 2100 movs r1, #0 80046bc: 4845 ldr r0, [pc, #276] @ (80047d4 ) 80046be: f7ff fec5 bl 800444c break; 80046c2: e07e b.n 80047c2 if(pwmval==0){ 80046c4: 88bb ldrh r3, [r7, #4] 80046c6: 2b00 cmp r3, #0 80046c8: d10a bne.n 80046e0 StopMot(timMot3,BWMot3); 80046ca: 2104 movs r1, #4 80046cc: 4841 ldr r0, [pc, #260] @ (80047d4 ) 80046ce: f7ff feb0 bl 8004432 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 80046d2: 2200 movs r2, #0 80046d4: f44f 6180 mov.w r1, #1024 @ 0x400 80046d8: 483d ldr r0, [pc, #244] @ (80047d0 ) 80046da: f001 ffac bl 8006636 break; 80046de: e070 b.n 80047c2 }else if(IsPwmRunning(timMot3, BWMot3)){ 80046e0: 2104 movs r1, #4 80046e2: 483c ldr r0, [pc, #240] @ (80047d4 ) 80046e4: f7ff fe90 bl 8004408 80046e8: 4603 mov r3, r0 80046ea: 2b00 cmp r3, #0 80046ec: d006 beq.n 80046fc SetMotPwm(timMot3,BWMot3,pwmval); 80046ee: 88bb ldrh r3, [r7, #4] 80046f0: 461a mov r2, r3 80046f2: 2104 movs r1, #4 80046f4: 4837 ldr r0, [pc, #220] @ (80047d4 ) 80046f6: f7ff fed4 bl 80044a2 break; 80046fa: e062 b.n 80047c2 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 80046fc: 2201 movs r2, #1 80046fe: f44f 6180 mov.w r1, #1024 @ 0x400 8004702: 4833 ldr r0, [pc, #204] @ (80047d0 ) 8004704: f001 ff97 bl 8006636 StartMot(timMot3,BWMot3,pwmval); 8004708: 88bb ldrh r3, [r7, #4] 800470a: 461a mov r2, r3 800470c: 2104 movs r1, #4 800470e: 4831 ldr r0, [pc, #196] @ (80047d4 ) 8004710: f7ff fe9c bl 800444c break; 8004714: e055 b.n 80047c2 case 4: if(dir==FW){ 8004716: 79bb ldrb r3, [r7, #6] 8004718: 2b00 cmp r3, #0 800471a: d128 bne.n 800476e if(pwmval==0){ 800471c: 88bb ldrh r3, [r7, #4] 800471e: 2b00 cmp r3, #0 8004720: d10a bne.n 8004738 StopMot(timMot4,FWMot4); 8004722: 2108 movs r1, #8 8004724: 482b ldr r0, [pc, #172] @ (80047d4 ) 8004726: f7ff fe84 bl 8004432 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 800472a: 2200 movs r2, #0 800472c: f44f 6100 mov.w r1, #2048 @ 0x800 8004730: 4827 ldr r0, [pc, #156] @ (80047d0 ) 8004732: f001 ff80 bl 8006636 }else{ HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); StartMot(timMot4,BWMot4,pwmval); } } break; 8004736: e044 b.n 80047c2 }else if(IsPwmRunning(timMot4, FWMot4)){ 8004738: 2108 movs r1, #8 800473a: 4826 ldr r0, [pc, #152] @ (80047d4 ) 800473c: f7ff fe64 bl 8004408 8004740: 4603 mov r3, r0 8004742: 2b00 cmp r3, #0 8004744: d006 beq.n 8004754 SetMotPwm(timMot4,FWMot4,pwmval); 8004746: 88bb ldrh r3, [r7, #4] 8004748: 461a mov r2, r3 800474a: 2108 movs r1, #8 800474c: 4821 ldr r0, [pc, #132] @ (80047d4 ) 800474e: f7ff fea8 bl 80044a2 break; 8004752: e036 b.n 80047c2 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8004754: 2201 movs r2, #1 8004756: f44f 6100 mov.w r1, #2048 @ 0x800 800475a: 481d ldr r0, [pc, #116] @ (80047d0 ) 800475c: f001 ff6b bl 8006636 StartMot(timMot4,FWMot4,pwmval); 8004760: 88bb ldrh r3, [r7, #4] 8004762: 461a mov r2, r3 8004764: 2108 movs r1, #8 8004766: 481b ldr r0, [pc, #108] @ (80047d4 ) 8004768: f7ff fe70 bl 800444c break; 800476c: e029 b.n 80047c2 if(pwmval==0){ 800476e: 88bb ldrh r3, [r7, #4] 8004770: 2b00 cmp r3, #0 8004772: d10a bne.n 800478a StopMot(timMot4,BWMot4); 8004774: 210c movs r1, #12 8004776: 4817 ldr r0, [pc, #92] @ (80047d4 ) 8004778: f7ff fe5b bl 8004432 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 800477c: 2200 movs r2, #0 800477e: f44f 6100 mov.w r1, #2048 @ 0x800 8004782: 4813 ldr r0, [pc, #76] @ (80047d0 ) 8004784: f001 ff57 bl 8006636 break; 8004788: e01b b.n 80047c2 }else if(IsPwmRunning(timMot4, BWMot4)){ 800478a: 210c movs r1, #12 800478c: 4811 ldr r0, [pc, #68] @ (80047d4 ) 800478e: f7ff fe3b bl 8004408 8004792: 4603 mov r3, r0 8004794: 2b00 cmp r3, #0 8004796: d006 beq.n 80047a6 SetMotPwm(timMot4,BWMot4,pwmval); 8004798: 88bb ldrh r3, [r7, #4] 800479a: 461a mov r2, r3 800479c: 210c movs r1, #12 800479e: 480d ldr r0, [pc, #52] @ (80047d4 ) 80047a0: f7ff fe7f bl 80044a2 break; 80047a4: e00d b.n 80047c2 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 80047a6: 2201 movs r2, #1 80047a8: f44f 6100 mov.w r1, #2048 @ 0x800 80047ac: 4808 ldr r0, [pc, #32] @ (80047d0 ) 80047ae: f001 ff42 bl 8006636 StartMot(timMot4,BWMot4,pwmval); 80047b2: 88bb ldrh r3, [r7, #4] 80047b4: 461a mov r2, r3 80047b6: 210c movs r1, #12 80047b8: 4806 ldr r0, [pc, #24] @ (80047d4 ) 80047ba: f7ff fe47 bl 800444c break; 80047be: e000 b.n 80047c2 default: break; 80047c0: bf00 nop } } 80047c2: bf00 nop 80047c4: 3708 adds r7, #8 80047c6: 46bd mov sp, r7 80047c8: bd80 pop {r7, pc} 80047ca: bf00 nop 80047cc: 20000318 .word 0x20000318 80047d0: 40010c00 .word 0x40010c00 80047d4: 20000360 .word 0x20000360 080047d8 : void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){ 80047d8: b580 push {r7, lr} 80047da: b084 sub sp, #16 80047dc: af00 add r7, sp, #0 80047de: 4603 mov r3, r0 80047e0: 71fb strb r3, [r7, #7] 80047e2: 460b mov r3, r1 80047e4: 71bb strb r3, [r7, #6] 80047e6: 4613 mov r3, r2 80047e8: 717b strb r3, [r7, #5] uint16_t pwmval; uint32_t tempval; tempval=perc; 80047ea: 797b ldrb r3, [r7, #5] 80047ec: 60fb str r3, [r7, #12] tempval*=16384; 80047ee: 68fb ldr r3, [r7, #12] 80047f0: 039b lsls r3, r3, #14 80047f2: 60fb str r3, [r7, #12] tempval/=100; 80047f4: 68fb ldr r3, [r7, #12] 80047f6: 4ab4 ldr r2, [pc, #720] @ (8004ac8 ) 80047f8: fba2 2303 umull r2, r3, r2, r3 80047fc: 095b lsrs r3, r3, #5 80047fe: 60fb str r3, [r7, #12] pwmval=(uint16_t)tempval; 8004800: 68fb ldr r3, [r7, #12] 8004802: 817b strh r3, [r7, #10] switch(mot){ 8004804: 79fb ldrb r3, [r7, #7] 8004806: 3b01 subs r3, #1 8004808: 2b03 cmp r3, #3 800480a: f200 8157 bhi.w 8004abc 800480e: a201 add r2, pc, #4 @ (adr r2, 8004814 ) 8004810: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004814: 08004825 .word 0x08004825 8004818: 080048c7 .word 0x080048c7 800481c: 08004969 .word 0x08004969 8004820: 08004a13 .word 0x08004a13 case 1: if(dir==FW){ 8004824: 79bb ldrb r3, [r7, #6] 8004826: 2b00 cmp r3, #0 8004828: d126 bne.n 8004878 if(pwmval==0){ 800482a: 897b ldrh r3, [r7, #10] 800482c: 2b00 cmp r3, #0 800482e: d109 bne.n 8004844 StopMot(timMot1,FWMot1); 8004830: 2100 movs r1, #0 8004832: 48a6 ldr r0, [pc, #664] @ (8004acc ) 8004834: f7ff fdfd bl 8004432 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8004838: 2200 movs r2, #0 800483a: 2102 movs r1, #2 800483c: 48a4 ldr r0, [pc, #656] @ (8004ad0 ) 800483e: f001 fefa bl 8006636 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); StartMot(timMot1,BWMot1,pwmval); } } break; 8004842: e13c b.n 8004abe }else if(IsPwmRunning(timMot1, FWMot1)){ 8004844: 2100 movs r1, #0 8004846: 48a1 ldr r0, [pc, #644] @ (8004acc ) 8004848: f7ff fdde bl 8004408 800484c: 4603 mov r3, r0 800484e: 2b00 cmp r3, #0 8004850: d006 beq.n 8004860 SetMotPwm(timMot1,FWMot1,pwmval); 8004852: 897b ldrh r3, [r7, #10] 8004854: 461a mov r2, r3 8004856: 2100 movs r1, #0 8004858: 489c ldr r0, [pc, #624] @ (8004acc ) 800485a: f7ff fe22 bl 80044a2 break; 800485e: e12e b.n 8004abe HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 8004860: 2201 movs r2, #1 8004862: 2102 movs r1, #2 8004864: 489a ldr r0, [pc, #616] @ (8004ad0 ) 8004866: f001 fee6 bl 8006636 StartMot(timMot1,FWMot1,pwmval); 800486a: 897b ldrh r3, [r7, #10] 800486c: 461a mov r2, r3 800486e: 2100 movs r1, #0 8004870: 4896 ldr r0, [pc, #600] @ (8004acc ) 8004872: f7ff fdeb bl 800444c break; 8004876: e122 b.n 8004abe if(pwmval==0){ 8004878: 897b ldrh r3, [r7, #10] 800487a: 2b00 cmp r3, #0 800487c: d109 bne.n 8004892 StopMot(timMot1,BWMot1); 800487e: 2104 movs r1, #4 8004880: 4892 ldr r0, [pc, #584] @ (8004acc ) 8004882: f7ff fdd6 bl 8004432 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8004886: 2200 movs r2, #0 8004888: 2102 movs r1, #2 800488a: 4891 ldr r0, [pc, #580] @ (8004ad0 ) 800488c: f001 fed3 bl 8006636 break; 8004890: e115 b.n 8004abe }else if(IsPwmRunning(timMot1, BWMot1)){ 8004892: 2104 movs r1, #4 8004894: 488d ldr r0, [pc, #564] @ (8004acc ) 8004896: f7ff fdb7 bl 8004408 800489a: 4603 mov r3, r0 800489c: 2b00 cmp r3, #0 800489e: d006 beq.n 80048ae SetMotPwm(timMot1,BWMot1,pwmval); 80048a0: 897b ldrh r3, [r7, #10] 80048a2: 461a mov r2, r3 80048a4: 2104 movs r1, #4 80048a6: 4889 ldr r0, [pc, #548] @ (8004acc ) 80048a8: f7ff fdfb bl 80044a2 break; 80048ac: e107 b.n 8004abe HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 80048ae: 2201 movs r2, #1 80048b0: 2102 movs r1, #2 80048b2: 4887 ldr r0, [pc, #540] @ (8004ad0 ) 80048b4: f001 febf bl 8006636 StartMot(timMot1,BWMot1,pwmval); 80048b8: 897b ldrh r3, [r7, #10] 80048ba: 461a mov r2, r3 80048bc: 2104 movs r1, #4 80048be: 4883 ldr r0, [pc, #524] @ (8004acc ) 80048c0: f7ff fdc4 bl 800444c break; 80048c4: e0fb b.n 8004abe case 2: if(dir==FW){ 80048c6: 79bb ldrb r3, [r7, #6] 80048c8: 2b00 cmp r3, #0 80048ca: d126 bne.n 800491a if(pwmval==0){ 80048cc: 897b ldrh r3, [r7, #10] 80048ce: 2b00 cmp r3, #0 80048d0: d109 bne.n 80048e6 StopMot(timMot2,FWMot2); 80048d2: 2108 movs r1, #8 80048d4: 487d ldr r0, [pc, #500] @ (8004acc ) 80048d6: f7ff fdac bl 8004432 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 80048da: 2200 movs r2, #0 80048dc: 2104 movs r1, #4 80048de: 487c ldr r0, [pc, #496] @ (8004ad0 ) 80048e0: f001 fea9 bl 8006636 }else{ HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); StartMot(timMot2,BWMot2,pwmval); } } break; 80048e4: e0eb b.n 8004abe }else if(IsPwmRunning(timMot2, FWMot2)){ 80048e6: 2108 movs r1, #8 80048e8: 4878 ldr r0, [pc, #480] @ (8004acc ) 80048ea: f7ff fd8d bl 8004408 80048ee: 4603 mov r3, r0 80048f0: 2b00 cmp r3, #0 80048f2: d006 beq.n 8004902 SetMotPwm(timMot2,FWMot2,pwmval); 80048f4: 897b ldrh r3, [r7, #10] 80048f6: 461a mov r2, r3 80048f8: 2108 movs r1, #8 80048fa: 4874 ldr r0, [pc, #464] @ (8004acc ) 80048fc: f7ff fdd1 bl 80044a2 break; 8004900: e0dd b.n 8004abe HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8004902: 2201 movs r2, #1 8004904: 2104 movs r1, #4 8004906: 4872 ldr r0, [pc, #456] @ (8004ad0 ) 8004908: f001 fe95 bl 8006636 StartMot(timMot2,FWMot2,pwmval); 800490c: 897b ldrh r3, [r7, #10] 800490e: 461a mov r2, r3 8004910: 2108 movs r1, #8 8004912: 486e ldr r0, [pc, #440] @ (8004acc ) 8004914: f7ff fd9a bl 800444c break; 8004918: e0d1 b.n 8004abe if(pwmval==0){ 800491a: 897b ldrh r3, [r7, #10] 800491c: 2b00 cmp r3, #0 800491e: d109 bne.n 8004934 StopMot(timMot2,BWMot2); 8004920: 210c movs r1, #12 8004922: 486a ldr r0, [pc, #424] @ (8004acc ) 8004924: f7ff fd85 bl 8004432 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 8004928: 2200 movs r2, #0 800492a: 2104 movs r1, #4 800492c: 4868 ldr r0, [pc, #416] @ (8004ad0 ) 800492e: f001 fe82 bl 8006636 break; 8004932: e0c4 b.n 8004abe }else if(IsPwmRunning(timMot2, BWMot2)){ 8004934: 210c movs r1, #12 8004936: 4865 ldr r0, [pc, #404] @ (8004acc ) 8004938: f7ff fd66 bl 8004408 800493c: 4603 mov r3, r0 800493e: 2b00 cmp r3, #0 8004940: d006 beq.n 8004950 SetMotPwm(timMot2,BWMot2,pwmval); 8004942: 897b ldrh r3, [r7, #10] 8004944: 461a mov r2, r3 8004946: 210c movs r1, #12 8004948: 4860 ldr r0, [pc, #384] @ (8004acc ) 800494a: f7ff fdaa bl 80044a2 break; 800494e: e0b6 b.n 8004abe HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8004950: 2201 movs r2, #1 8004952: 2104 movs r1, #4 8004954: 485e ldr r0, [pc, #376] @ (8004ad0 ) 8004956: f001 fe6e bl 8006636 StartMot(timMot2,BWMot2,pwmval); 800495a: 897b ldrh r3, [r7, #10] 800495c: 461a mov r2, r3 800495e: 210c movs r1, #12 8004960: 485a ldr r0, [pc, #360] @ (8004acc ) 8004962: f7ff fd73 bl 800444c break; 8004966: e0aa b.n 8004abe case 3: if(dir==FW){ 8004968: 79bb ldrb r3, [r7, #6] 800496a: 2b00 cmp r3, #0 800496c: d128 bne.n 80049c0 if(pwmval==0){ 800496e: 897b ldrh r3, [r7, #10] 8004970: 2b00 cmp r3, #0 8004972: d10a bne.n 800498a StopMot(timMot3,FWMot3); 8004974: 2100 movs r1, #0 8004976: 4857 ldr r0, [pc, #348] @ (8004ad4 ) 8004978: f7ff fd5b bl 8004432 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 800497c: 2200 movs r2, #0 800497e: f44f 6180 mov.w r1, #1024 @ 0x400 8004982: 4853 ldr r0, [pc, #332] @ (8004ad0 ) 8004984: f001 fe57 bl 8006636 }else{ HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); StartMot(timMot3,BWMot3,pwmval); } } break; 8004988: e099 b.n 8004abe }else if(IsPwmRunning(timMot3, FWMot3)){ 800498a: 2100 movs r1, #0 800498c: 4851 ldr r0, [pc, #324] @ (8004ad4 ) 800498e: f7ff fd3b bl 8004408 8004992: 4603 mov r3, r0 8004994: 2b00 cmp r3, #0 8004996: d006 beq.n 80049a6 SetMotPwm(timMot3,FWMot3,pwmval); 8004998: 897b ldrh r3, [r7, #10] 800499a: 461a mov r2, r3 800499c: 2100 movs r1, #0 800499e: 484d ldr r0, [pc, #308] @ (8004ad4 ) 80049a0: f7ff fd7f bl 80044a2 break; 80049a4: e08b b.n 8004abe HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 80049a6: 2201 movs r2, #1 80049a8: f44f 6180 mov.w r1, #1024 @ 0x400 80049ac: 4848 ldr r0, [pc, #288] @ (8004ad0 ) 80049ae: f001 fe42 bl 8006636 StartMot(timMot3,FWMot3,pwmval); 80049b2: 897b ldrh r3, [r7, #10] 80049b4: 461a mov r2, r3 80049b6: 2100 movs r1, #0 80049b8: 4846 ldr r0, [pc, #280] @ (8004ad4 ) 80049ba: f7ff fd47 bl 800444c break; 80049be: e07e b.n 8004abe if(pwmval==0){ 80049c0: 897b ldrh r3, [r7, #10] 80049c2: 2b00 cmp r3, #0 80049c4: d10a bne.n 80049dc StopMot(timMot3,BWMot3); 80049c6: 2104 movs r1, #4 80049c8: 4842 ldr r0, [pc, #264] @ (8004ad4 ) 80049ca: f7ff fd32 bl 8004432 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 80049ce: 2200 movs r2, #0 80049d0: f44f 6180 mov.w r1, #1024 @ 0x400 80049d4: 483e ldr r0, [pc, #248] @ (8004ad0 ) 80049d6: f001 fe2e bl 8006636 break; 80049da: e070 b.n 8004abe }else if(IsPwmRunning(timMot3, BWMot3)){ 80049dc: 2104 movs r1, #4 80049de: 483d ldr r0, [pc, #244] @ (8004ad4 ) 80049e0: f7ff fd12 bl 8004408 80049e4: 4603 mov r3, r0 80049e6: 2b00 cmp r3, #0 80049e8: d006 beq.n 80049f8 SetMotPwm(timMot3,BWMot3,pwmval); 80049ea: 897b ldrh r3, [r7, #10] 80049ec: 461a mov r2, r3 80049ee: 2104 movs r1, #4 80049f0: 4838 ldr r0, [pc, #224] @ (8004ad4 ) 80049f2: f7ff fd56 bl 80044a2 break; 80049f6: e062 b.n 8004abe HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 80049f8: 2201 movs r2, #1 80049fa: f44f 6180 mov.w r1, #1024 @ 0x400 80049fe: 4834 ldr r0, [pc, #208] @ (8004ad0 ) 8004a00: f001 fe19 bl 8006636 StartMot(timMot3,BWMot3,pwmval); 8004a04: 897b ldrh r3, [r7, #10] 8004a06: 461a mov r2, r3 8004a08: 2104 movs r1, #4 8004a0a: 4832 ldr r0, [pc, #200] @ (8004ad4 ) 8004a0c: f7ff fd1e bl 800444c break; 8004a10: e055 b.n 8004abe case 4: if(dir==FW){ 8004a12: 79bb ldrb r3, [r7, #6] 8004a14: 2b00 cmp r3, #0 8004a16: d128 bne.n 8004a6a if(pwmval==0){ 8004a18: 897b ldrh r3, [r7, #10] 8004a1a: 2b00 cmp r3, #0 8004a1c: d10a bne.n 8004a34 StopMot(timMot4,FWMot4); 8004a1e: 2108 movs r1, #8 8004a20: 482c ldr r0, [pc, #176] @ (8004ad4 ) 8004a22: f7ff fd06 bl 8004432 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 8004a26: 2200 movs r2, #0 8004a28: f44f 6100 mov.w r1, #2048 @ 0x800 8004a2c: 4828 ldr r0, [pc, #160] @ (8004ad0 ) 8004a2e: f001 fe02 bl 8006636 }else{ HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); StartMot(timMot4,BWMot4,pwmval); } } break; 8004a32: e044 b.n 8004abe }else if(IsPwmRunning(timMot4, FWMot4)){ 8004a34: 2108 movs r1, #8 8004a36: 4827 ldr r0, [pc, #156] @ (8004ad4 ) 8004a38: f7ff fce6 bl 8004408 8004a3c: 4603 mov r3, r0 8004a3e: 2b00 cmp r3, #0 8004a40: d006 beq.n 8004a50 SetMotPwm(timMot4,FWMot4,pwmval); 8004a42: 897b ldrh r3, [r7, #10] 8004a44: 461a mov r2, r3 8004a46: 2108 movs r1, #8 8004a48: 4822 ldr r0, [pc, #136] @ (8004ad4 ) 8004a4a: f7ff fd2a bl 80044a2 break; 8004a4e: e036 b.n 8004abe HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8004a50: 2201 movs r2, #1 8004a52: f44f 6100 mov.w r1, #2048 @ 0x800 8004a56: 481e ldr r0, [pc, #120] @ (8004ad0 ) 8004a58: f001 fded bl 8006636 StartMot(timMot4,FWMot4,pwmval); 8004a5c: 897b ldrh r3, [r7, #10] 8004a5e: 461a mov r2, r3 8004a60: 2108 movs r1, #8 8004a62: 481c ldr r0, [pc, #112] @ (8004ad4 ) 8004a64: f7ff fcf2 bl 800444c break; 8004a68: e029 b.n 8004abe if(pwmval==0){ 8004a6a: 897b ldrh r3, [r7, #10] 8004a6c: 2b00 cmp r3, #0 8004a6e: d10a bne.n 8004a86 StopMot(timMot4,BWMot4); 8004a70: 210c movs r1, #12 8004a72: 4818 ldr r0, [pc, #96] @ (8004ad4 ) 8004a74: f7ff fcdd bl 8004432 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 8004a78: 2200 movs r2, #0 8004a7a: f44f 6100 mov.w r1, #2048 @ 0x800 8004a7e: 4814 ldr r0, [pc, #80] @ (8004ad0 ) 8004a80: f001 fdd9 bl 8006636 break; 8004a84: e01b b.n 8004abe }else if(IsPwmRunning(timMot4, BWMot4)){ 8004a86: 210c movs r1, #12 8004a88: 4812 ldr r0, [pc, #72] @ (8004ad4 ) 8004a8a: f7ff fcbd bl 8004408 8004a8e: 4603 mov r3, r0 8004a90: 2b00 cmp r3, #0 8004a92: d006 beq.n 8004aa2 SetMotPwm(timMot4,BWMot4,pwmval); 8004a94: 897b ldrh r3, [r7, #10] 8004a96: 461a mov r2, r3 8004a98: 210c movs r1, #12 8004a9a: 480e ldr r0, [pc, #56] @ (8004ad4 ) 8004a9c: f7ff fd01 bl 80044a2 break; 8004aa0: e00d b.n 8004abe HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8004aa2: 2201 movs r2, #1 8004aa4: f44f 6100 mov.w r1, #2048 @ 0x800 8004aa8: 4809 ldr r0, [pc, #36] @ (8004ad0 ) 8004aaa: f001 fdc4 bl 8006636 StartMot(timMot4,BWMot4,pwmval); 8004aae: 897b ldrh r3, [r7, #10] 8004ab0: 461a mov r2, r3 8004ab2: 210c movs r1, #12 8004ab4: 4807 ldr r0, [pc, #28] @ (8004ad4 ) 8004ab6: f7ff fcc9 bl 800444c break; 8004aba: e000 b.n 8004abe default: break; 8004abc: bf00 nop } } 8004abe: bf00 nop 8004ac0: 3710 adds r7, #16 8004ac2: 46bd mov sp, r7 8004ac4: bd80 pop {r7, pc} 8004ac6: bf00 nop 8004ac8: 51eb851f .word 0x51eb851f 8004acc: 20000318 .word 0x20000318 8004ad0: 40010c00 .word 0x40010c00 8004ad4: 20000360 .word 0x20000360 08004ad8 : uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){ 8004ad8: b590 push {r4, r7, lr} 8004ada: b085 sub sp, #20 8004adc: af00 add r7, sp, #0 8004ade: 4604 mov r4, r0 8004ae0: 4608 mov r0, r1 8004ae2: 4611 mov r1, r2 8004ae4: 461a mov r2, r3 8004ae6: 4623 mov r3, r4 8004ae8: 71fb strb r3, [r7, #7] 8004aea: 4603 mov r3, r0 8004aec: 71bb strb r3, [r7, #6] 8004aee: 460b mov r3, r1 8004af0: 717b strb r3, [r7, #5] 8004af2: 4613 mov r3, r2 8004af4: 713b strb r3, [r7, #4] static uint8_t memrtramp[4]; // char s[10]; uint16_t delta; switch(mode){ 8004af6: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 8004afa: 2b00 cmp r3, #0 8004afc: d002 beq.n 8004b04 8004afe: 2b0a cmp r3, #10 8004b00: d016 beq.n 8004b30 8004b02: e09d b.n 8004c40 case RAMPINIT: memrtramp[mot-1]=rtramp[mot-1]=tr; 8004b04: 79fb ldrb r3, [r7, #7] 8004b06: 3b01 subs r3, #1 8004b08: f897 2020 ldrb.w r2, [r7, #32] 8004b0c: b291 uxth r1, r2 8004b0e: 4a4f ldr r2, [pc, #316] @ (8004c4c ) 8004b10: 4608 mov r0, r1 8004b12: f822 0013 strh.w r0, [r2, r3, lsl #1] 8004b16: 79fb ldrb r3, [r7, #7] 8004b18: 3b01 subs r3, #1 8004b1a: b2c9 uxtb r1, r1 8004b1c: 4a4c ldr r2, [pc, #304] @ (8004c50 ) 8004b1e: 54d1 strb r1, [r2, r3] SetMotPerc(mot,dir,percStart); 8004b20: 797a ldrb r2, [r7, #5] 8004b22: 79b9 ldrb r1, [r7, #6] 8004b24: 79fb ldrb r3, [r7, #7] 8004b26: 4618 mov r0, r3 8004b28: f7ff fe56 bl 80047d8 return DONE; 8004b2c: 2300 movs r3, #0 8004b2e: e088 b.n 8004c42 case RAMPRUN: if(memrtramp[mot-1]!=rtramp[mot-1]){ 8004b30: 79fb ldrb r3, [r7, #7] 8004b32: 3b01 subs r3, #1 8004b34: 4a46 ldr r2, [pc, #280] @ (8004c50 ) 8004b36: 5cd3 ldrb r3, [r2, r3] 8004b38: 4619 mov r1, r3 8004b3a: 79fb ldrb r3, [r7, #7] 8004b3c: 3b01 subs r3, #1 8004b3e: 4a43 ldr r2, [pc, #268] @ (8004c4c ) 8004b40: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 8004b44: b29b uxth r3, r3 8004b46: 4299 cmp r1, r3 8004b48: d078 beq.n 8004c3c memrtramp[mot-1]=rtramp[mot-1]; 8004b4a: 79fb ldrb r3, [r7, #7] 8004b4c: 3b01 subs r3, #1 8004b4e: 4a3f ldr r2, [pc, #252] @ (8004c4c ) 8004b50: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 8004b54: b29a uxth r2, r3 8004b56: 79fb ldrb r3, [r7, #7] 8004b58: 3b01 subs r3, #1 8004b5a: b2d1 uxtb r1, r2 8004b5c: 4a3c ldr r2, [pc, #240] @ (8004c50 ) 8004b5e: 54d1 strb r1, [r2, r3] if(rtramp[mot-1]){ 8004b60: 79fb ldrb r3, [r7, #7] 8004b62: 3b01 subs r3, #1 8004b64: 4a39 ldr r2, [pc, #228] @ (8004c4c ) 8004b66: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 8004b6a: b29b uxth r3, r3 8004b6c: 2b00 cmp r3, #0 8004b6e: d05d beq.n 8004c2c if(percStart>percEnd){ 8004b70: 797a ldrb r2, [r7, #5] 8004b72: 793b ldrb r3, [r7, #4] 8004b74: 429a cmp r2, r3 8004b76: d926 bls.n 8004bc6 delta=percStart-percEnd; 8004b78: 797b ldrb r3, [r7, #5] 8004b7a: b29a uxth r2, r3 8004b7c: 793b ldrb r3, [r7, #4] 8004b7e: b29b uxth r3, r3 8004b80: 1ad3 subs r3, r2, r3 8004b82: 81fb strh r3, [r7, #14] delta=delta*(uint16_t)(tr-rtramp[mot-1]); 8004b84: f897 3020 ldrb.w r3, [r7, #32] 8004b88: b29a uxth r2, r3 8004b8a: 79fb ldrb r3, [r7, #7] 8004b8c: 3b01 subs r3, #1 8004b8e: 492f ldr r1, [pc, #188] @ (8004c4c ) 8004b90: f831 3013 ldrh.w r3, [r1, r3, lsl #1] 8004b94: b29b uxth r3, r3 8004b96: 1ad3 subs r3, r2, r3 8004b98: b29b uxth r3, r3 8004b9a: 89fa ldrh r2, [r7, #14] 8004b9c: fb02 f303 mul.w r3, r2, r3 8004ba0: 81fb strh r3, [r7, #14] delta=delta/tr; 8004ba2: 89fa ldrh r2, [r7, #14] 8004ba4: f897 3020 ldrb.w r3, [r7, #32] 8004ba8: fb92 f3f3 sdiv r3, r2, r3 8004bac: 81fb strh r3, [r7, #14] SetMotPerc(mot,dir,percStart-delta); 8004bae: 89fb ldrh r3, [r7, #14] 8004bb0: b2db uxtb r3, r3 8004bb2: 797a ldrb r2, [r7, #5] 8004bb4: 1ad3 subs r3, r2, r3 8004bb6: b2da uxtb r2, r3 8004bb8: 79b9 ldrb r1, [r7, #6] 8004bba: 79fb ldrb r3, [r7, #7] 8004bbc: 4618 mov r0, r3 8004bbe: f7ff fe0b bl 80047d8 return RUNNING; 8004bc2: 2301 movs r3, #1 8004bc4: e03d b.n 8004c42 }else if(percStart delta=percEnd-percStart; 8004bce: 793b ldrb r3, [r7, #4] 8004bd0: b29a uxth r2, r3 8004bd2: 797b ldrb r3, [r7, #5] 8004bd4: b29b uxth r3, r3 8004bd6: 1ad3 subs r3, r2, r3 8004bd8: 81fb strh r3, [r7, #14] delta=delta*(uint16_t)(tr-rtramp[mot-1]); 8004bda: f897 3020 ldrb.w r3, [r7, #32] 8004bde: b29a uxth r2, r3 8004be0: 79fb ldrb r3, [r7, #7] 8004be2: 3b01 subs r3, #1 8004be4: 4919 ldr r1, [pc, #100] @ (8004c4c ) 8004be6: f831 3013 ldrh.w r3, [r1, r3, lsl #1] 8004bea: b29b uxth r3, r3 8004bec: 1ad3 subs r3, r2, r3 8004bee: b29b uxth r3, r3 8004bf0: 89fa ldrh r2, [r7, #14] 8004bf2: fb02 f303 mul.w r3, r2, r3 8004bf6: 81fb strh r3, [r7, #14] delta=delta/tr; 8004bf8: 89fa ldrh r2, [r7, #14] 8004bfa: f897 3020 ldrb.w r3, [r7, #32] 8004bfe: fb92 f3f3 sdiv r3, r2, r3 8004c02: 81fb strh r3, [r7, #14] SetMotPerc(mot,dir,percStart+delta); 8004c04: 89fb ldrh r3, [r7, #14] 8004c06: b2da uxtb r2, r3 8004c08: 797b ldrb r3, [r7, #5] 8004c0a: 4413 add r3, r2 8004c0c: b2da uxtb r2, r3 8004c0e: 79b9 ldrb r1, [r7, #6] 8004c10: 79fb ldrb r3, [r7, #7] 8004c12: 4618 mov r0, r3 8004c14: f7ff fde0 bl 80047d8 // sprintf((char*)s,"\n%d",percStart+delta); // HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); return RUNNING; 8004c18: 2301 movs r3, #1 8004c1a: e012 b.n 8004c42 }else{ SetMotPerc(mot,dir,percEnd); 8004c1c: 793a ldrb r2, [r7, #4] 8004c1e: 79b9 ldrb r1, [r7, #6] 8004c20: 79fb ldrb r3, [r7, #7] 8004c22: 4618 mov r0, r3 8004c24: f7ff fdd8 bl 80047d8 return DONE; 8004c28: 2300 movs r3, #0 8004c2a: e00a b.n 8004c42 } }else{ SetMotPerc(mot,dir,percEnd); 8004c2c: 793a ldrb r2, [r7, #4] 8004c2e: 79b9 ldrb r1, [r7, #6] 8004c30: 79fb ldrb r3, [r7, #7] 8004c32: 4618 mov r0, r3 8004c34: f7ff fdd0 bl 80047d8 return DONE; 8004c38: 2300 movs r3, #0 8004c3a: e002 b.n 8004c42 } }else return RUNNING; 8004c3c: 2301 movs r3, #1 8004c3e: e000 b.n 8004c42 break; } return DONE; 8004c40: 2300 movs r3, #0 } 8004c42: 4618 mov r0, r3 8004c44: 3714 adds r7, #20 8004c46: 46bd mov sp, r7 8004c48: bd90 pop {r4, r7, pc} 8004c4a: bf00 nop 8004c4c: 200003f4 .word 0x200003f4 8004c50: 2000046c .word 0x2000046c 08004c54 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8004c54: b480 push {r7} 8004c56: b085 sub sp, #20 8004c58: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8004c5a: 4b15 ldr r3, [pc, #84] @ (8004cb0 ) 8004c5c: 699b ldr r3, [r3, #24] 8004c5e: 4a14 ldr r2, [pc, #80] @ (8004cb0 ) 8004c60: f043 0301 orr.w r3, r3, #1 8004c64: 6193 str r3, [r2, #24] 8004c66: 4b12 ldr r3, [pc, #72] @ (8004cb0 ) 8004c68: 699b ldr r3, [r3, #24] 8004c6a: f003 0301 and.w r3, r3, #1 8004c6e: 60bb str r3, [r7, #8] 8004c70: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 8004c72: 4b0f ldr r3, [pc, #60] @ (8004cb0 ) 8004c74: 69db ldr r3, [r3, #28] 8004c76: 4a0e ldr r2, [pc, #56] @ (8004cb0 ) 8004c78: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8004c7c: 61d3 str r3, [r2, #28] 8004c7e: 4b0c ldr r3, [pc, #48] @ (8004cb0 ) 8004c80: 69db ldr r3, [r3, #28] 8004c82: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8004c86: 607b str r3, [r7, #4] 8004c88: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8004c8a: 4b0a ldr r3, [pc, #40] @ (8004cb4 ) 8004c8c: 685b ldr r3, [r3, #4] 8004c8e: 60fb str r3, [r7, #12] 8004c90: 68fb ldr r3, [r7, #12] 8004c92: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 8004c96: 60fb str r3, [r7, #12] 8004c98: 68fb ldr r3, [r7, #12] 8004c9a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8004c9e: 60fb str r3, [r7, #12] 8004ca0: 4a04 ldr r2, [pc, #16] @ (8004cb4 ) 8004ca2: 68fb ldr r3, [r7, #12] 8004ca4: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8004ca6: bf00 nop 8004ca8: 3714 adds r7, #20 8004caa: 46bd mov sp, r7 8004cac: bc80 pop {r7} 8004cae: 4770 bx lr 8004cb0: 40021000 .word 0x40021000 8004cb4: 40010000 .word 0x40010000 08004cb8 : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { 8004cb8: b580 push {r7, lr} 8004cba: b08a sub sp, #40 @ 0x28 8004cbc: af00 add r7, sp, #0 8004cbe: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8004cc0: f107 0318 add.w r3, r7, #24 8004cc4: 2200 movs r2, #0 8004cc6: 601a str r2, [r3, #0] 8004cc8: 605a str r2, [r3, #4] 8004cca: 609a str r2, [r3, #8] 8004ccc: 60da str r2, [r3, #12] if(hadc->Instance==ADC1) 8004cce: 687b ldr r3, [r7, #4] 8004cd0: 681b ldr r3, [r3, #0] 8004cd2: 4a33 ldr r2, [pc, #204] @ (8004da0 ) 8004cd4: 4293 cmp r3, r2 8004cd6: d15f bne.n 8004d98 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8004cd8: 4b32 ldr r3, [pc, #200] @ (8004da4 ) 8004cda: 699b ldr r3, [r3, #24] 8004cdc: 4a31 ldr r2, [pc, #196] @ (8004da4 ) 8004cde: f443 7300 orr.w r3, r3, #512 @ 0x200 8004ce2: 6193 str r3, [r2, #24] 8004ce4: 4b2f ldr r3, [pc, #188] @ (8004da4 ) 8004ce6: 699b ldr r3, [r3, #24] 8004ce8: f403 7300 and.w r3, r3, #512 @ 0x200 8004cec: 617b str r3, [r7, #20] 8004cee: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8004cf0: 4b2c ldr r3, [pc, #176] @ (8004da4 ) 8004cf2: 699b ldr r3, [r3, #24] 8004cf4: 4a2b ldr r2, [pc, #172] @ (8004da4 ) 8004cf6: f043 0304 orr.w r3, r3, #4 8004cfa: 6193 str r3, [r2, #24] 8004cfc: 4b29 ldr r3, [pc, #164] @ (8004da4 ) 8004cfe: 699b ldr r3, [r3, #24] 8004d00: f003 0304 and.w r3, r3, #4 8004d04: 613b str r3, [r7, #16] 8004d06: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8004d08: 4b26 ldr r3, [pc, #152] @ (8004da4 ) 8004d0a: 699b ldr r3, [r3, #24] 8004d0c: 4a25 ldr r2, [pc, #148] @ (8004da4 ) 8004d0e: f043 0308 orr.w r3, r3, #8 8004d12: 6193 str r3, [r2, #24] 8004d14: 4b23 ldr r3, [pc, #140] @ (8004da4 ) 8004d16: 699b ldr r3, [r3, #24] 8004d18: f003 0308 and.w r3, r3, #8 8004d1c: 60fb str r3, [r7, #12] 8004d1e: 68fb ldr r3, [r7, #12] PA5 ------> ADC1_IN5 PA6 ------> ADC1_IN6 PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin; 8004d20: 23f0 movs r3, #240 @ 0xf0 8004d22: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8004d24: 2303 movs r3, #3 8004d26: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8004d28: f107 0318 add.w r3, r7, #24 8004d2c: 4619 mov r1, r3 8004d2e: 481e ldr r0, [pc, #120] @ (8004da8 ) 8004d30: f001 fae6 bl 8006300 GPIO_InitStruct.Pin = ANEM_Pin; 8004d34: 2301 movs r3, #1 8004d36: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8004d38: 2303 movs r3, #3 8004d3a: 61fb str r3, [r7, #28] HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct); 8004d3c: f107 0318 add.w r3, r7, #24 8004d40: 4619 mov r1, r3 8004d42: 481a ldr r0, [pc, #104] @ (8004dac ) 8004d44: f001 fadc bl 8006300 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; 8004d48: 4b19 ldr r3, [pc, #100] @ (8004db0 ) 8004d4a: 4a1a ldr r2, [pc, #104] @ (8004db4 ) 8004d4c: 601a str r2, [r3, #0] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8004d4e: 4b18 ldr r3, [pc, #96] @ (8004db0 ) 8004d50: 2200 movs r2, #0 8004d52: 605a str r2, [r3, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 8004d54: 4b16 ldr r3, [pc, #88] @ (8004db0 ) 8004d56: 2200 movs r2, #0 8004d58: 609a str r2, [r3, #8] hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8004d5a: 4b15 ldr r3, [pc, #84] @ (8004db0 ) 8004d5c: 2280 movs r2, #128 @ 0x80 8004d5e: 60da str r2, [r3, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 8004d60: 4b13 ldr r3, [pc, #76] @ (8004db0 ) 8004d62: f44f 7280 mov.w r2, #256 @ 0x100 8004d66: 611a str r2, [r3, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 8004d68: 4b11 ldr r3, [pc, #68] @ (8004db0 ) 8004d6a: f44f 6280 mov.w r2, #1024 @ 0x400 8004d6e: 615a str r2, [r3, #20] hdma_adc1.Init.Mode = DMA_CIRCULAR; 8004d70: 4b0f ldr r3, [pc, #60] @ (8004db0 ) 8004d72: 2220 movs r2, #32 8004d74: 619a str r2, [r3, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 8004d76: 4b0e ldr r3, [pc, #56] @ (8004db0 ) 8004d78: 2200 movs r2, #0 8004d7a: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8004d7c: 480c ldr r0, [pc, #48] @ (8004db0 ) 8004d7e: f000 fed1 bl 8005b24 8004d82: 4603 mov r3, r0 8004d84: 2b00 cmp r3, #0 8004d86: d001 beq.n 8004d8c { Error_Handler(); 8004d88: f7fe fca2 bl 80036d0 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 8004d8c: 687b ldr r3, [r7, #4] 8004d8e: 4a08 ldr r2, [pc, #32] @ (8004db0 ) 8004d90: 621a str r2, [r3, #32] 8004d92: 4a07 ldr r2, [pc, #28] @ (8004db0 ) 8004d94: 687b ldr r3, [r7, #4] 8004d96: 6253 str r3, [r2, #36] @ 0x24 /* USER CODE END ADC1_MspInit 1 */ } } 8004d98: bf00 nop 8004d9a: 3728 adds r7, #40 @ 0x28 8004d9c: 46bd mov sp, r7 8004d9e: bd80 pop {r7, pc} 8004da0: 40012400 .word 0x40012400 8004da4: 40021000 .word 0x40021000 8004da8: 40010800 .word 0x40010800 8004dac: 40010c00 .word 0x40010c00 8004db0: 200002d4 .word 0x200002d4 8004db4: 40020008 .word 0x40020008 08004db8 : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 8004db8: b480 push {r7} 8004dba: b085 sub sp, #20 8004dbc: af00 add r7, sp, #0 8004dbe: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM2) 8004dc0: 687b ldr r3, [r7, #4] 8004dc2: 681b ldr r3, [r3, #0] 8004dc4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8004dc8: d10c bne.n 8004de4 { /* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE END TIM2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM2_CLK_ENABLE(); 8004dca: 4b11 ldr r3, [pc, #68] @ (8004e10 ) 8004dcc: 69db ldr r3, [r3, #28] 8004dce: 4a10 ldr r2, [pc, #64] @ (8004e10 ) 8004dd0: f043 0301 orr.w r3, r3, #1 8004dd4: 61d3 str r3, [r2, #28] 8004dd6: 4b0e ldr r3, [pc, #56] @ (8004e10 ) 8004dd8: 69db ldr r3, [r3, #28] 8004dda: f003 0301 and.w r3, r3, #1 8004dde: 60fb str r3, [r7, #12] 8004de0: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 8004de2: e010 b.n 8004e06 else if(htim_base->Instance==TIM4) 8004de4: 687b ldr r3, [r7, #4] 8004de6: 681b ldr r3, [r3, #0] 8004de8: 4a0a ldr r2, [pc, #40] @ (8004e14 ) 8004dea: 4293 cmp r3, r2 8004dec: d10b bne.n 8004e06 __HAL_RCC_TIM4_CLK_ENABLE(); 8004dee: 4b08 ldr r3, [pc, #32] @ (8004e10 ) 8004df0: 69db ldr r3, [r3, #28] 8004df2: 4a07 ldr r2, [pc, #28] @ (8004e10 ) 8004df4: f043 0304 orr.w r3, r3, #4 8004df8: 61d3 str r3, [r2, #28] 8004dfa: 4b05 ldr r3, [pc, #20] @ (8004e10 ) 8004dfc: 69db ldr r3, [r3, #28] 8004dfe: f003 0304 and.w r3, r3, #4 8004e02: 60bb str r3, [r7, #8] 8004e04: 68bb ldr r3, [r7, #8] } 8004e06: bf00 nop 8004e08: 3714 adds r7, #20 8004e0a: 46bd mov sp, r7 8004e0c: bc80 pop {r7} 8004e0e: 4770 bx lr 8004e10: 40021000 .word 0x40021000 8004e14: 40000800 .word 0x40000800 08004e18 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 8004e18: b580 push {r7, lr} 8004e1a: b088 sub sp, #32 8004e1c: af00 add r7, sp, #0 8004e1e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8004e20: f107 0310 add.w r3, r7, #16 8004e24: 2200 movs r2, #0 8004e26: 601a str r2, [r3, #0] 8004e28: 605a str r2, [r3, #4] 8004e2a: 609a str r2, [r3, #8] 8004e2c: 60da str r2, [r3, #12] if(htim->Instance==TIM2) 8004e2e: 687b ldr r3, [r7, #4] 8004e30: 681b ldr r3, [r3, #0] 8004e32: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8004e36: d118 bne.n 8004e6a { /* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8004e38: 4b1d ldr r3, [pc, #116] @ (8004eb0 ) 8004e3a: 699b ldr r3, [r3, #24] 8004e3c: 4a1c ldr r2, [pc, #112] @ (8004eb0 ) 8004e3e: f043 0304 orr.w r3, r3, #4 8004e42: 6193 str r3, [r2, #24] 8004e44: 4b1a ldr r3, [pc, #104] @ (8004eb0 ) 8004e46: 699b ldr r3, [r3, #24] 8004e48: f003 0304 and.w r3, r3, #4 8004e4c: 60fb str r3, [r7, #12] 8004e4e: 68fb ldr r3, [r7, #12] PA0-WKUP ------> TIM2_CH1 PA1 ------> TIM2_CH2 PA2 ------> TIM2_CH3 PA3 ------> TIM2_CH4 */ GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin; 8004e50: 230f movs r3, #15 8004e52: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8004e54: 2302 movs r3, #2 8004e56: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8004e58: 2302 movs r3, #2 8004e5a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8004e5c: f107 0310 add.w r3, r7, #16 8004e60: 4619 mov r1, r3 8004e62: 4814 ldr r0, [pc, #80] @ (8004eb4 ) 8004e64: f001 fa4c bl 8006300 /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 8004e68: e01d b.n 8004ea6 else if(htim->Instance==TIM4) 8004e6a: 687b ldr r3, [r7, #4] 8004e6c: 681b ldr r3, [r3, #0] 8004e6e: 4a12 ldr r2, [pc, #72] @ (8004eb8 ) 8004e70: 4293 cmp r3, r2 8004e72: d118 bne.n 8004ea6 __HAL_RCC_GPIOB_CLK_ENABLE(); 8004e74: 4b0e ldr r3, [pc, #56] @ (8004eb0 ) 8004e76: 699b ldr r3, [r3, #24] 8004e78: 4a0d ldr r2, [pc, #52] @ (8004eb0 ) 8004e7a: f043 0308 orr.w r3, r3, #8 8004e7e: 6193 str r3, [r2, #24] 8004e80: 4b0b ldr r3, [pc, #44] @ (8004eb0 ) 8004e82: 699b ldr r3, [r3, #24] 8004e84: f003 0308 and.w r3, r3, #8 8004e88: 60bb str r3, [r7, #8] 8004e8a: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin; 8004e8c: f44f 7370 mov.w r3, #960 @ 0x3c0 8004e90: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8004e92: 2302 movs r3, #2 8004e94: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8004e96: 2302 movs r3, #2 8004e98: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8004e9a: f107 0310 add.w r3, r7, #16 8004e9e: 4619 mov r1, r3 8004ea0: 4806 ldr r0, [pc, #24] @ (8004ebc ) 8004ea2: f001 fa2d bl 8006300 } 8004ea6: bf00 nop 8004ea8: 3720 adds r7, #32 8004eaa: 46bd mov sp, r7 8004eac: bd80 pop {r7, pc} 8004eae: bf00 nop 8004eb0: 40021000 .word 0x40021000 8004eb4: 40010800 .word 0x40010800 8004eb8: 40000800 .word 0x40000800 8004ebc: 40010c00 .word 0x40010c00 08004ec0 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8004ec0: b580 push {r7, lr} 8004ec2: b088 sub sp, #32 8004ec4: af00 add r7, sp, #0 8004ec6: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8004ec8: f107 0310 add.w r3, r7, #16 8004ecc: 2200 movs r2, #0 8004ece: 601a str r2, [r3, #0] 8004ed0: 605a str r2, [r3, #4] 8004ed2: 609a str r2, [r3, #8] 8004ed4: 60da str r2, [r3, #12] if(huart->Instance==USART1) 8004ed6: 687b ldr r3, [r7, #4] 8004ed8: 681b ldr r3, [r3, #0] 8004eda: 4a1c ldr r2, [pc, #112] @ (8004f4c ) 8004edc: 4293 cmp r3, r2 8004ede: d131 bne.n 8004f44 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8004ee0: 4b1b ldr r3, [pc, #108] @ (8004f50 ) 8004ee2: 699b ldr r3, [r3, #24] 8004ee4: 4a1a ldr r2, [pc, #104] @ (8004f50 ) 8004ee6: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8004eea: 6193 str r3, [r2, #24] 8004eec: 4b18 ldr r3, [pc, #96] @ (8004f50 ) 8004eee: 699b ldr r3, [r3, #24] 8004ef0: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004ef4: 60fb str r3, [r7, #12] 8004ef6: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8004ef8: 4b15 ldr r3, [pc, #84] @ (8004f50 ) 8004efa: 699b ldr r3, [r3, #24] 8004efc: 4a14 ldr r2, [pc, #80] @ (8004f50 ) 8004efe: f043 0304 orr.w r3, r3, #4 8004f02: 6193 str r3, [r2, #24] 8004f04: 4b12 ldr r3, [pc, #72] @ (8004f50 ) 8004f06: 699b ldr r3, [r3, #24] 8004f08: f003 0304 and.w r3, r3, #4 8004f0c: 60bb str r3, [r7, #8] 8004f0e: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; 8004f10: f44f 7300 mov.w r3, #512 @ 0x200 8004f14: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8004f16: 2302 movs r3, #2 8004f18: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8004f1a: 2303 movs r3, #3 8004f1c: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8004f1e: f107 0310 add.w r3, r7, #16 8004f22: 4619 mov r1, r3 8004f24: 480b ldr r0, [pc, #44] @ (8004f54 ) 8004f26: f001 f9eb bl 8006300 GPIO_InitStruct.Pin = GPIO_PIN_10; 8004f2a: f44f 6380 mov.w r3, #1024 @ 0x400 8004f2e: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8004f30: 2300 movs r3, #0 8004f32: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8004f34: 2300 movs r3, #0 8004f36: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8004f38: f107 0310 add.w r3, r7, #16 8004f3c: 4619 mov r1, r3 8004f3e: 4805 ldr r0, [pc, #20] @ (8004f54 ) 8004f40: f001 f9de bl 8006300 /* USER CODE END USART1_MspInit 1 */ } } 8004f44: bf00 nop 8004f46: 3720 adds r7, #32 8004f48: 46bd mov sp, r7 8004f4a: bd80 pop {r7, pc} 8004f4c: 40013800 .word 0x40013800 8004f50: 40021000 .word 0x40021000 8004f54: 40010800 .word 0x40010800 08004f58 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8004f58: b480 push {r7} 8004f5a: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8004f5c: bf00 nop 8004f5e: e7fd b.n 8004f5c 08004f60 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8004f60: b480 push {r7} 8004f62: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8004f64: bf00 nop 8004f66: e7fd b.n 8004f64 08004f68 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8004f68: b480 push {r7} 8004f6a: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8004f6c: bf00 nop 8004f6e: e7fd b.n 8004f6c 08004f70 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8004f70: b480 push {r7} 8004f72: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8004f74: bf00 nop 8004f76: e7fd b.n 8004f74 08004f78 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8004f78: b480 push {r7} 8004f7a: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8004f7c: bf00 nop 8004f7e: e7fd b.n 8004f7c 08004f80 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8004f80: b480 push {r7} 8004f82: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8004f84: bf00 nop 8004f86: 46bd mov sp, r7 8004f88: bc80 pop {r7} 8004f8a: 4770 bx lr 08004f8c : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8004f8c: b480 push {r7} 8004f8e: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8004f90: bf00 nop 8004f92: 46bd mov sp, r7 8004f94: bc80 pop {r7} 8004f96: 4770 bx lr 08004f98 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8004f98: b480 push {r7} 8004f9a: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8004f9c: bf00 nop 8004f9e: 46bd mov sp, r7 8004fa0: bc80 pop {r7} 8004fa2: 4770 bx lr 08004fa4 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8004fa4: b580 push {r7, lr} 8004fa6: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8004fa8: f000 f8c0 bl 800512c /* USER CODE BEGIN SysTick_IRQn 1 */ HAL_SYSTICK_IRQHandler(); 8004fac: f000 fdb3 bl 8005b16 /* USER CODE END SysTick_IRQn 1 */ } 8004fb0: bf00 nop 8004fb2: bd80 pop {r7, pc} 08004fb4 : /** * @brief This function handles DMA1 channel1 global interrupt. */ void DMA1_Channel1_IRQHandler(void) { 8004fb4: b580 push {r7, lr} 8004fb6: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 8004fb8: 4802 ldr r0, [pc, #8] @ (8004fc4 ) 8004fba: f000 fe6d bl 8005c98 /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ /* USER CODE END DMA1_Channel1_IRQn 1 */ } 8004fbe: bf00 nop 8004fc0: bd80 pop {r7, pc} 8004fc2: bf00 nop 8004fc4: 200002d4 .word 0x200002d4 08004fc8 : /** * @brief This function handles USB low priority or CAN RX0 interrupts. */ void USB_LP_CAN1_RX0_IRQHandler(void) { 8004fc8: b580 push {r7, lr} 8004fca: af00 add r7, sp, #0 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */ HAL_PCD_IRQHandler(&hpcd_USB_FS); 8004fcc: 4802 ldr r0, [pc, #8] @ (8004fd8 ) 8004fce: f001 fc66 bl 800689e /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */ } 8004fd2: bf00 nop 8004fd4: bd80 pop {r7, pc} 8004fd6: bf00 nop 8004fd8: 20001264 .word 0x20001264 08004fdc <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8004fdc: b580 push {r7, lr} 8004fde: b086 sub sp, #24 8004fe0: af00 add r7, sp, #0 8004fe2: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8004fe4: 4a14 ldr r2, [pc, #80] @ (8005038 <_sbrk+0x5c>) 8004fe6: 4b15 ldr r3, [pc, #84] @ (800503c <_sbrk+0x60>) 8004fe8: 1ad3 subs r3, r2, r3 8004fea: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8004fec: 697b ldr r3, [r7, #20] 8004fee: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8004ff0: 4b13 ldr r3, [pc, #76] @ (8005040 <_sbrk+0x64>) 8004ff2: 681b ldr r3, [r3, #0] 8004ff4: 2b00 cmp r3, #0 8004ff6: d102 bne.n 8004ffe <_sbrk+0x22> { __sbrk_heap_end = &_end; 8004ff8: 4b11 ldr r3, [pc, #68] @ (8005040 <_sbrk+0x64>) 8004ffa: 4a12 ldr r2, [pc, #72] @ (8005044 <_sbrk+0x68>) 8004ffc: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 8004ffe: 4b10 ldr r3, [pc, #64] @ (8005040 <_sbrk+0x64>) 8005000: 681a ldr r2, [r3, #0] 8005002: 687b ldr r3, [r7, #4] 8005004: 4413 add r3, r2 8005006: 693a ldr r2, [r7, #16] 8005008: 429a cmp r2, r3 800500a: d207 bcs.n 800501c <_sbrk+0x40> { errno = ENOMEM; 800500c: f009 fa2c bl 800e468 <__errno> 8005010: 4603 mov r3, r0 8005012: 220c movs r2, #12 8005014: 601a str r2, [r3, #0] return (void *)-1; 8005016: f04f 33ff mov.w r3, #4294967295 800501a: e009 b.n 8005030 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 800501c: 4b08 ldr r3, [pc, #32] @ (8005040 <_sbrk+0x64>) 800501e: 681b ldr r3, [r3, #0] 8005020: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8005022: 4b07 ldr r3, [pc, #28] @ (8005040 <_sbrk+0x64>) 8005024: 681a ldr r2, [r3, #0] 8005026: 687b ldr r3, [r7, #4] 8005028: 4413 add r3, r2 800502a: 4a05 ldr r2, [pc, #20] @ (8005040 <_sbrk+0x64>) 800502c: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 800502e: 68fb ldr r3, [r7, #12] } 8005030: 4618 mov r0, r3 8005032: 3718 adds r7, #24 8005034: 46bd mov sp, r7 8005036: bd80 pop {r7, pc} 8005038: 20005000 .word 0x20005000 800503c: 00000400 .word 0x00000400 8005040: 20000470 .word 0x20000470 8005044: 200018a8 .word 0x200018a8 08005048 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 8005048: b480 push {r7} 800504a: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 800504c: bf00 nop 800504e: 46bd mov sp, r7 8005050: bc80 pop {r7} 8005052: 4770 bx lr 08005054 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 8005054: f7ff fff8 bl 8005048 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8005058: 480b ldr r0, [pc, #44] @ (8005088 ) ldr r1, =_edata 800505a: 490c ldr r1, [pc, #48] @ (800508c ) ldr r2, =_sidata 800505c: 4a0c ldr r2, [pc, #48] @ (8005090 ) movs r3, #0 800505e: 2300 movs r3, #0 b LoopCopyDataInit 8005060: e002 b.n 8005068 08005062 : CopyDataInit: ldr r4, [r2, r3] 8005062: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8005064: 50c4 str r4, [r0, r3] adds r3, r3, #4 8005066: 3304 adds r3, #4 08005068 : LoopCopyDataInit: adds r4, r0, r3 8005068: 18c4 adds r4, r0, r3 cmp r4, r1 800506a: 428c cmp r4, r1 bcc CopyDataInit 800506c: d3f9 bcc.n 8005062 /* Zero fill the bss segment. */ ldr r2, =_sbss 800506e: 4a09 ldr r2, [pc, #36] @ (8005094 ) ldr r4, =_ebss 8005070: 4c09 ldr r4, [pc, #36] @ (8005098 ) movs r3, #0 8005072: 2300 movs r3, #0 b LoopFillZerobss 8005074: e001 b.n 800507a 08005076 : FillZerobss: str r3, [r2] 8005076: 6013 str r3, [r2, #0] adds r2, r2, #4 8005078: 3204 adds r2, #4 0800507a : LoopFillZerobss: cmp r2, r4 800507a: 42a2 cmp r2, r4 bcc FillZerobss 800507c: d3fb bcc.n 8005076 /* Call static constructors */ bl __libc_init_array 800507e: f009 f9f9 bl 800e474 <__libc_init_array> /* Call the application's entry point.*/ bl main 8005082: f7fd ffbb bl 8002ffc
bx lr 8005086: 4770 bx lr ldr r0, =_sdata 8005088: 20000000 .word 0x20000000 ldr r1, =_edata 800508c: 200001dc .word 0x200001dc ldr r2, =_sidata 8005090: 0800f588 .word 0x0800f588 ldr r2, =_sbss 8005094: 200001e0 .word 0x200001e0 ldr r4, =_ebss 8005098: 200018a4 .word 0x200018a4 0800509c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800509c: e7fe b.n 800509c ... 080050a0 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 80050a0: b580 push {r7, lr} 80050a2: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 80050a4: 4b08 ldr r3, [pc, #32] @ (80050c8 ) 80050a6: 681b ldr r3, [r3, #0] 80050a8: 4a07 ldr r2, [pc, #28] @ (80050c8 ) 80050aa: f043 0310 orr.w r3, r3, #16 80050ae: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 80050b0: 2003 movs r0, #3 80050b2: f000 fcef bl 8005a94 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 80050b6: 200f movs r0, #15 80050b8: f000 f808 bl 80050cc /* Init the low level hardware */ HAL_MspInit(); 80050bc: f7ff fdca bl 8004c54 /* Return function status */ return HAL_OK; 80050c0: 2300 movs r3, #0 } 80050c2: 4618 mov r0, r3 80050c4: bd80 pop {r7, pc} 80050c6: bf00 nop 80050c8: 40022000 .word 0x40022000 080050cc : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 80050cc: b580 push {r7, lr} 80050ce: b082 sub sp, #8 80050d0: af00 add r7, sp, #0 80050d2: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 80050d4: 4b12 ldr r3, [pc, #72] @ (8005120 ) 80050d6: 681a ldr r2, [r3, #0] 80050d8: 4b12 ldr r3, [pc, #72] @ (8005124 ) 80050da: 781b ldrb r3, [r3, #0] 80050dc: 4619 mov r1, r3 80050de: f44f 737a mov.w r3, #1000 @ 0x3e8 80050e2: fbb3 f3f1 udiv r3, r3, r1 80050e6: fbb2 f3f3 udiv r3, r2, r3 80050ea: 4618 mov r0, r3 80050ec: f000 fd07 bl 8005afe 80050f0: 4603 mov r3, r0 80050f2: 2b00 cmp r3, #0 80050f4: d001 beq.n 80050fa { return HAL_ERROR; 80050f6: 2301 movs r3, #1 80050f8: e00e b.n 8005118 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 80050fa: 687b ldr r3, [r7, #4] 80050fc: 2b0f cmp r3, #15 80050fe: d80a bhi.n 8005116 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8005100: 2200 movs r2, #0 8005102: 6879 ldr r1, [r7, #4] 8005104: f04f 30ff mov.w r0, #4294967295 8005108: f000 fccf bl 8005aaa uwTickPrio = TickPriority; 800510c: 4a06 ldr r2, [pc, #24] @ (8005128 ) 800510e: 687b ldr r3, [r7, #4] 8005110: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8005112: 2300 movs r3, #0 8005114: e000 b.n 8005118 return HAL_ERROR; 8005116: 2301 movs r3, #1 } 8005118: 4618 mov r0, r3 800511a: 3708 adds r7, #8 800511c: 46bd mov sp, r7 800511e: bd80 pop {r7, pc} 8005120: 20000010 .word 0x20000010 8005124: 20000018 .word 0x20000018 8005128: 20000014 .word 0x20000014 0800512c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 800512c: b480 push {r7} 800512e: af00 add r7, sp, #0 uwTick += uwTickFreq; 8005130: 4b05 ldr r3, [pc, #20] @ (8005148 ) 8005132: 781b ldrb r3, [r3, #0] 8005134: 461a mov r2, r3 8005136: 4b05 ldr r3, [pc, #20] @ (800514c ) 8005138: 681b ldr r3, [r3, #0] 800513a: 4413 add r3, r2 800513c: 4a03 ldr r2, [pc, #12] @ (800514c ) 800513e: 6013 str r3, [r2, #0] } 8005140: bf00 nop 8005142: 46bd mov sp, r7 8005144: bc80 pop {r7} 8005146: 4770 bx lr 8005148: 20000018 .word 0x20000018 800514c: 20000474 .word 0x20000474 08005150 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8005150: b480 push {r7} 8005152: af00 add r7, sp, #0 return uwTick; 8005154: 4b02 ldr r3, [pc, #8] @ (8005160 ) 8005156: 681b ldr r3, [r3, #0] } 8005158: 4618 mov r0, r3 800515a: 46bd mov sp, r7 800515c: bc80 pop {r7} 800515e: 4770 bx lr 8005160: 20000474 .word 0x20000474 08005164 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 8005164: b580 push {r7, lr} 8005166: b086 sub sp, #24 8005168: af00 add r7, sp, #0 800516a: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800516c: 2300 movs r3, #0 800516e: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 8005170: 2300 movs r3, #0 8005172: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 8005174: 2300 movs r3, #0 8005176: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 8005178: 2300 movs r3, #0 800517a: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 800517c: 687b ldr r3, [r7, #4] 800517e: 2b00 cmp r3, #0 8005180: d101 bne.n 8005186 { return HAL_ERROR; 8005182: 2301 movs r3, #1 8005184: e0be b.n 8005304 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 8005186: 687b ldr r3, [r7, #4] 8005188: 689b ldr r3, [r3, #8] 800518a: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 800518c: 687b ldr r3, [r7, #4] 800518e: 6a9b ldr r3, [r3, #40] @ 0x28 8005190: 2b00 cmp r3, #0 8005192: d109 bne.n 80051a8 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 8005194: 687b ldr r3, [r7, #4] 8005196: 2200 movs r2, #0 8005198: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 800519a: 687b ldr r3, [r7, #4] 800519c: 2200 movs r2, #0 800519e: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 80051a2: 6878 ldr r0, [r7, #4] 80051a4: f7ff fd88 bl 8004cb8 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 80051a8: 6878 ldr r0, [r7, #4] 80051aa: f000 faff bl 80057ac 80051ae: 4603 mov r3, r0 80051b0: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 80051b2: 687b ldr r3, [r7, #4] 80051b4: 6a9b ldr r3, [r3, #40] @ 0x28 80051b6: f003 0310 and.w r3, r3, #16 80051ba: 2b00 cmp r3, #0 80051bc: f040 8099 bne.w 80052f2 80051c0: 7dfb ldrb r3, [r7, #23] 80051c2: 2b00 cmp r3, #0 80051c4: f040 8095 bne.w 80052f2 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 80051c8: 687b ldr r3, [r7, #4] 80051ca: 6a9b ldr r3, [r3, #40] @ 0x28 80051cc: f423 5388 bic.w r3, r3, #4352 @ 0x1100 80051d0: f023 0302 bic.w r3, r3, #2 80051d4: f043 0202 orr.w r2, r3, #2 80051d8: 687b ldr r3, [r7, #4] 80051da: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 80051dc: 687b ldr r3, [r7, #4] 80051de: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 80051e0: 687b ldr r3, [r7, #4] 80051e2: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 80051e4: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 80051e6: 687b ldr r3, [r7, #4] 80051e8: 7b1b ldrb r3, [r3, #12] 80051ea: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 80051ec: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 80051ee: 68ba ldr r2, [r7, #8] 80051f0: 4313 orrs r3, r2 80051f2: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 80051f4: 687b ldr r3, [r7, #4] 80051f6: 689b ldr r3, [r3, #8] 80051f8: f5b3 7f80 cmp.w r3, #256 @ 0x100 80051fc: d003 beq.n 8005206 80051fe: 687b ldr r3, [r7, #4] 8005200: 689b ldr r3, [r3, #8] 8005202: 2b01 cmp r3, #1 8005204: d102 bne.n 800520c 8005206: f44f 7380 mov.w r3, #256 @ 0x100 800520a: e000 b.n 800520e 800520c: 2300 movs r3, #0 800520e: 693a ldr r2, [r7, #16] 8005210: 4313 orrs r3, r2 8005212: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 8005214: 687b ldr r3, [r7, #4] 8005216: 7d1b ldrb r3, [r3, #20] 8005218: 2b01 cmp r3, #1 800521a: d119 bne.n 8005250 { if (hadc->Init.ContinuousConvMode == DISABLE) 800521c: 687b ldr r3, [r7, #4] 800521e: 7b1b ldrb r3, [r3, #12] 8005220: 2b00 cmp r3, #0 8005222: d109 bne.n 8005238 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 8005224: 687b ldr r3, [r7, #4] 8005226: 699b ldr r3, [r3, #24] 8005228: 3b01 subs r3, #1 800522a: 035a lsls r2, r3, #13 800522c: 693b ldr r3, [r7, #16] 800522e: 4313 orrs r3, r2 8005230: f443 6300 orr.w r3, r3, #2048 @ 0x800 8005234: 613b str r3, [r7, #16] 8005236: e00b b.n 8005250 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8005238: 687b ldr r3, [r7, #4] 800523a: 6a9b ldr r3, [r3, #40] @ 0x28 800523c: f043 0220 orr.w r2, r3, #32 8005240: 687b ldr r3, [r7, #4] 8005242: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005244: 687b ldr r3, [r7, #4] 8005246: 6adb ldr r3, [r3, #44] @ 0x2c 8005248: f043 0201 orr.w r2, r3, #1 800524c: 687b ldr r3, [r7, #4] 800524e: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 8005250: 687b ldr r3, [r7, #4] 8005252: 681b ldr r3, [r3, #0] 8005254: 685b ldr r3, [r3, #4] 8005256: f423 4169 bic.w r1, r3, #59648 @ 0xe900 800525a: 687b ldr r3, [r7, #4] 800525c: 681b ldr r3, [r3, #0] 800525e: 693a ldr r2, [r7, #16] 8005260: 430a orrs r2, r1 8005262: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 8005264: 687b ldr r3, [r7, #4] 8005266: 681b ldr r3, [r3, #0] 8005268: 689a ldr r2, [r3, #8] 800526a: 4b28 ldr r3, [pc, #160] @ (800530c ) 800526c: 4013 ands r3, r2 800526e: 687a ldr r2, [r7, #4] 8005270: 6812 ldr r2, [r2, #0] 8005272: 68b9 ldr r1, [r7, #8] 8005274: 430b orrs r3, r1 8005276: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 8005278: 687b ldr r3, [r7, #4] 800527a: 689b ldr r3, [r3, #8] 800527c: f5b3 7f80 cmp.w r3, #256 @ 0x100 8005280: d003 beq.n 800528a 8005282: 687b ldr r3, [r7, #4] 8005284: 689b ldr r3, [r3, #8] 8005286: 2b01 cmp r3, #1 8005288: d104 bne.n 8005294 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 800528a: 687b ldr r3, [r7, #4] 800528c: 691b ldr r3, [r3, #16] 800528e: 3b01 subs r3, #1 8005290: 051b lsls r3, r3, #20 8005292: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 8005294: 687b ldr r3, [r7, #4] 8005296: 681b ldr r3, [r3, #0] 8005298: 6adb ldr r3, [r3, #44] @ 0x2c 800529a: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 800529e: 687b ldr r3, [r7, #4] 80052a0: 681b ldr r3, [r3, #0] 80052a2: 68fa ldr r2, [r7, #12] 80052a4: 430a orrs r2, r1 80052a6: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80052a8: 687b ldr r3, [r7, #4] 80052aa: 681b ldr r3, [r3, #0] 80052ac: 689a ldr r2, [r3, #8] 80052ae: 4b18 ldr r3, [pc, #96] @ (8005310 ) 80052b0: 4013 ands r3, r2 80052b2: 68ba ldr r2, [r7, #8] 80052b4: 429a cmp r2, r3 80052b6: d10b bne.n 80052d0 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 80052b8: 687b ldr r3, [r7, #4] 80052ba: 2200 movs r2, #0 80052bc: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 80052be: 687b ldr r3, [r7, #4] 80052c0: 6a9b ldr r3, [r3, #40] @ 0x28 80052c2: f023 0303 bic.w r3, r3, #3 80052c6: f043 0201 orr.w r2, r3, #1 80052ca: 687b ldr r3, [r7, #4] 80052cc: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80052ce: e018 b.n 8005302 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 80052d0: 687b ldr r3, [r7, #4] 80052d2: 6a9b ldr r3, [r3, #40] @ 0x28 80052d4: f023 0312 bic.w r3, r3, #18 80052d8: f043 0210 orr.w r2, r3, #16 80052dc: 687b ldr r3, [r7, #4] 80052de: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80052e0: 687b ldr r3, [r7, #4] 80052e2: 6adb ldr r3, [r3, #44] @ 0x2c 80052e4: f043 0201 orr.w r2, r3, #1 80052e8: 687b ldr r3, [r7, #4] 80052ea: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 80052ec: 2301 movs r3, #1 80052ee: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80052f0: e007 b.n 8005302 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80052f2: 687b ldr r3, [r7, #4] 80052f4: 6a9b ldr r3, [r3, #40] @ 0x28 80052f6: f043 0210 orr.w r2, r3, #16 80052fa: 687b ldr r3, [r7, #4] 80052fc: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 80052fe: 2301 movs r3, #1 8005300: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8005302: 7dfb ldrb r3, [r7, #23] } 8005304: 4618 mov r0, r3 8005306: 3718 adds r7, #24 8005308: 46bd mov sp, r7 800530a: bd80 pop {r7, pc} 800530c: ffe1f7fd .word 0xffe1f7fd 8005310: ff1f0efe .word 0xff1f0efe 08005314 : * @param pData: The destination Buffer address. * @param Length: The length of data to be transferred from ADC peripheral to memory. * @retval None */ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { 8005314: b580 push {r7, lr} 8005316: b086 sub sp, #24 8005318: af00 add r7, sp, #0 800531a: 60f8 str r0, [r7, #12] 800531c: 60b9 str r1, [r7, #8] 800531e: 607a str r2, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8005320: 2300 movs r3, #0 8005322: 75fb strb r3, [r7, #23] assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance)); /* Verification if multimode is disabled (for devices with several ADC) */ /* If multimode is enabled, dedicated function multimode conversion */ /* start DMA must be used. */ if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 8005324: 68fb ldr r3, [r7, #12] 8005326: 681b ldr r3, [r3, #0] 8005328: 4a64 ldr r2, [pc, #400] @ (80054bc ) 800532a: 4293 cmp r3, r2 800532c: d004 beq.n 8005338 800532e: 68fb ldr r3, [r7, #12] 8005330: 681b ldr r3, [r3, #0] 8005332: 4a63 ldr r2, [pc, #396] @ (80054c0 ) 8005334: 4293 cmp r3, r2 8005336: d106 bne.n 8005346 8005338: 4b60 ldr r3, [pc, #384] @ (80054bc ) 800533a: 685b ldr r3, [r3, #4] 800533c: f403 2370 and.w r3, r3, #983040 @ 0xf0000 8005340: 2b00 cmp r3, #0 8005342: f040 80b3 bne.w 80054ac { /* Process locked */ __HAL_LOCK(hadc); 8005346: 68fb ldr r3, [r7, #12] 8005348: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 800534c: 2b01 cmp r3, #1 800534e: d101 bne.n 8005354 8005350: 2302 movs r3, #2 8005352: e0ae b.n 80054b2 8005354: 68fb ldr r3, [r7, #12] 8005356: 2201 movs r2, #1 8005358: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 800535c: 68f8 ldr r0, [r7, #12] 800535e: f000 f9cb bl 80056f8 8005362: 4603 mov r3, r0 8005364: 75fb strb r3, [r7, #23] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 8005366: 7dfb ldrb r3, [r7, #23] 8005368: 2b00 cmp r3, #0 800536a: f040 809a bne.w 80054a2 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 800536e: 68fb ldr r3, [r7, #12] 8005370: 6a9b ldr r3, [r3, #40] @ 0x28 8005372: f423 6370 bic.w r3, r3, #3840 @ 0xf00 8005376: f023 0301 bic.w r3, r3, #1 800537a: f443 7280 orr.w r2, r3, #256 @ 0x100 800537e: 68fb ldr r3, [r7, #12] 8005380: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8005382: 68fb ldr r3, [r7, #12] 8005384: 681b ldr r3, [r3, #0] 8005386: 4a4e ldr r2, [pc, #312] @ (80054c0 ) 8005388: 4293 cmp r3, r2 800538a: d105 bne.n 8005398 800538c: 4b4b ldr r3, [pc, #300] @ (80054bc ) 800538e: 685b ldr r3, [r3, #4] 8005390: f403 2370 and.w r3, r3, #983040 @ 0xf0000 8005394: 2b00 cmp r3, #0 8005396: d115 bne.n 80053c4 { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8005398: 68fb ldr r3, [r7, #12] 800539a: 6a9b ldr r3, [r3, #40] @ 0x28 800539c: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 80053a0: 68fb ldr r3, [r7, #12] 80053a2: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 80053a4: 68fb ldr r3, [r7, #12] 80053a6: 681b ldr r3, [r3, #0] 80053a8: 685b ldr r3, [r3, #4] 80053aa: f403 6380 and.w r3, r3, #1024 @ 0x400 80053ae: 2b00 cmp r3, #0 80053b0: d026 beq.n 8005400 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 80053b2: 68fb ldr r3, [r7, #12] 80053b4: 6a9b ldr r3, [r3, #40] @ 0x28 80053b6: f423 5340 bic.w r3, r3, #12288 @ 0x3000 80053ba: f443 5280 orr.w r2, r3, #4096 @ 0x1000 80053be: 68fb ldr r3, [r7, #12] 80053c0: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 80053c2: e01d b.n 8005400 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 80053c4: 68fb ldr r3, [r7, #12] 80053c6: 6a9b ldr r3, [r3, #40] @ 0x28 80053c8: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 80053cc: 68fb ldr r3, [r7, #12] 80053ce: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 80053d0: 68fb ldr r3, [r7, #12] 80053d2: 681b ldr r3, [r3, #0] 80053d4: 4a39 ldr r2, [pc, #228] @ (80054bc ) 80053d6: 4293 cmp r3, r2 80053d8: d004 beq.n 80053e4 80053da: 68fb ldr r3, [r7, #12] 80053dc: 681b ldr r3, [r3, #0] 80053de: 4a38 ldr r2, [pc, #224] @ (80054c0 ) 80053e0: 4293 cmp r3, r2 80053e2: d10d bne.n 8005400 80053e4: 4b35 ldr r3, [pc, #212] @ (80054bc ) 80053e6: 685b ldr r3, [r3, #4] 80053e8: f403 6380 and.w r3, r3, #1024 @ 0x400 80053ec: 2b00 cmp r3, #0 80053ee: d007 beq.n 8005400 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 80053f0: 68fb ldr r3, [r7, #12] 80053f2: 6a9b ldr r3, [r3, #40] @ 0x28 80053f4: f423 5340 bic.w r3, r3, #12288 @ 0x3000 80053f8: f443 5280 orr.w r2, r3, #4096 @ 0x1000 80053fc: 68fb ldr r3, [r7, #12] 80053fe: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8005400: 68fb ldr r3, [r7, #12] 8005402: 6a9b ldr r3, [r3, #40] @ 0x28 8005404: f403 5380 and.w r3, r3, #4096 @ 0x1000 8005408: 2b00 cmp r3, #0 800540a: d006 beq.n 800541a { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 800540c: 68fb ldr r3, [r7, #12] 800540e: 6adb ldr r3, [r3, #44] @ 0x2c 8005410: f023 0206 bic.w r2, r3, #6 8005414: 68fb ldr r3, [r7, #12] 8005416: 62da str r2, [r3, #44] @ 0x2c 8005418: e002 b.n 8005420 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 800541a: 68fb ldr r3, [r7, #12] 800541c: 2200 movs r2, #0 800541e: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 8005420: 68fb ldr r3, [r7, #12] 8005422: 2200 movs r2, #0 8005424: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Set the DMA transfer complete callback */ hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 8005428: 68fb ldr r3, [r7, #12] 800542a: 6a1b ldr r3, [r3, #32] 800542c: 4a25 ldr r2, [pc, #148] @ (80054c4 ) 800542e: 629a str r2, [r3, #40] @ 0x28 /* Set the DMA half transfer complete callback */ hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 8005430: 68fb ldr r3, [r7, #12] 8005432: 6a1b ldr r3, [r3, #32] 8005434: 4a24 ldr r2, [pc, #144] @ (80054c8 ) 8005436: 62da str r2, [r3, #44] @ 0x2c /* Set the DMA error callback */ hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 8005438: 68fb ldr r3, [r7, #12] 800543a: 6a1b ldr r3, [r3, #32] 800543c: 4a23 ldr r2, [pc, #140] @ (80054cc ) 800543e: 631a str r2, [r3, #48] @ 0x30 /* start (in case of SW start): */ /* Clear regular group conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC */ /* operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 8005440: 68fb ldr r3, [r7, #12] 8005442: 681b ldr r3, [r3, #0] 8005444: f06f 0202 mvn.w r2, #2 8005448: 601a str r2, [r3, #0] /* Enable ADC DMA mode */ SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 800544a: 68fb ldr r3, [r7, #12] 800544c: 681b ldr r3, [r3, #0] 800544e: 689a ldr r2, [r3, #8] 8005450: 68fb ldr r3, [r7, #12] 8005452: 681b ldr r3, [r3, #0] 8005454: f442 7280 orr.w r2, r2, #256 @ 0x100 8005458: 609a str r2, [r3, #8] /* Start the DMA channel */ HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 800545a: 68fb ldr r3, [r7, #12] 800545c: 6a18 ldr r0, [r3, #32] 800545e: 68fb ldr r3, [r7, #12] 8005460: 681b ldr r3, [r3, #0] 8005462: 334c adds r3, #76 @ 0x4c 8005464: 4619 mov r1, r3 8005466: 68ba ldr r2, [r7, #8] 8005468: 687b ldr r3, [r7, #4] 800546a: f000 fbb5 bl 8005bd8 /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ /* If external trigger has been selected, conversion will start at next */ /* trigger event. */ if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) 800546e: 68fb ldr r3, [r7, #12] 8005470: 681b ldr r3, [r3, #0] 8005472: 689b ldr r3, [r3, #8] 8005474: f403 2360 and.w r3, r3, #917504 @ 0xe0000 8005478: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800547c: d108 bne.n 8005490 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 800547e: 68fb ldr r3, [r7, #12] 8005480: 681b ldr r3, [r3, #0] 8005482: 689a ldr r2, [r3, #8] 8005484: 68fb ldr r3, [r7, #12] 8005486: 681b ldr r3, [r3, #0] 8005488: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 800548c: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 800548e: e00f b.n 80054b0 } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 8005490: 68fb ldr r3, [r7, #12] 8005492: 681b ldr r3, [r3, #0] 8005494: 689a ldr r2, [r3, #8] 8005496: 68fb ldr r3, [r7, #12] 8005498: 681b ldr r3, [r3, #0] 800549a: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 800549e: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 80054a0: e006 b.n 80054b0 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 80054a2: 68fb ldr r3, [r7, #12] 80054a4: 2200 movs r2, #0 80054a6: f883 2024 strb.w r2, [r3, #36] @ 0x24 if (tmp_hal_status == HAL_OK) 80054aa: e001 b.n 80054b0 } } else { tmp_hal_status = HAL_ERROR; 80054ac: 2301 movs r3, #1 80054ae: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 80054b0: 7dfb ldrb r3, [r7, #23] } 80054b2: 4618 mov r0, r3 80054b4: 3718 adds r7, #24 80054b6: 46bd mov sp, r7 80054b8: bd80 pop {r7, pc} 80054ba: bf00 nop 80054bc: 40012400 .word 0x40012400 80054c0: 40012800 .word 0x40012800 80054c4: 0800582f .word 0x0800582f 80054c8: 080058ab .word 0x080058ab 80054cc: 080058c7 .word 0x080058c7 080054d0 : * @brief Conversion complete callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { 80054d0: b480 push {r7} 80054d2: b083 sub sp, #12 80054d4: af00 add r7, sp, #0 80054d6: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvCpltCallback must be implemented in the user file. */ } 80054d8: bf00 nop 80054da: 370c adds r7, #12 80054dc: 46bd mov sp, r7 80054de: bc80 pop {r7} 80054e0: 4770 bx lr 080054e2 : * @brief Conversion DMA half-transfer callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) { 80054e2: b480 push {r7} 80054e4: b083 sub sp, #12 80054e6: af00 add r7, sp, #0 80054e8: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. */ } 80054ea: bf00 nop 80054ec: 370c adds r7, #12 80054ee: 46bd mov sp, r7 80054f0: bc80 pop {r7} 80054f2: 4770 bx lr 080054f4 : * (ADC conversion with interruption or transfer by DMA) * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) { 80054f4: b480 push {r7} 80054f6: b083 sub sp, #12 80054f8: af00 add r7, sp, #0 80054fa: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ErrorCallback must be implemented in the user file. */ } 80054fc: bf00 nop 80054fe: 370c adds r7, #12 8005500: 46bd mov sp, r7 8005502: bc80 pop {r7} 8005504: 4770 bx lr ... 08005508 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 8005508: b480 push {r7} 800550a: b085 sub sp, #20 800550c: af00 add r7, sp, #0 800550e: 6078 str r0, [r7, #4] 8005510: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8005512: 2300 movs r3, #0 8005514: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 8005516: 2300 movs r3, #0 8005518: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 800551a: 687b ldr r3, [r7, #4] 800551c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8005520: 2b01 cmp r3, #1 8005522: d101 bne.n 8005528 8005524: 2302 movs r3, #2 8005526: e0dc b.n 80056e2 8005528: 687b ldr r3, [r7, #4] 800552a: 2201 movs r2, #1 800552c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 8005530: 683b ldr r3, [r7, #0] 8005532: 685b ldr r3, [r3, #4] 8005534: 2b06 cmp r3, #6 8005536: d81c bhi.n 8005572 { MODIFY_REG(hadc->Instance->SQR3 , 8005538: 687b ldr r3, [r7, #4] 800553a: 681b ldr r3, [r3, #0] 800553c: 6b59 ldr r1, [r3, #52] @ 0x34 800553e: 683b ldr r3, [r7, #0] 8005540: 685a ldr r2, [r3, #4] 8005542: 4613 mov r3, r2 8005544: 009b lsls r3, r3, #2 8005546: 4413 add r3, r2 8005548: 3b05 subs r3, #5 800554a: 221f movs r2, #31 800554c: fa02 f303 lsl.w r3, r2, r3 8005550: 43db mvns r3, r3 8005552: 4019 ands r1, r3 8005554: 683b ldr r3, [r7, #0] 8005556: 6818 ldr r0, [r3, #0] 8005558: 683b ldr r3, [r7, #0] 800555a: 685a ldr r2, [r3, #4] 800555c: 4613 mov r3, r2 800555e: 009b lsls r3, r3, #2 8005560: 4413 add r3, r2 8005562: 3b05 subs r3, #5 8005564: fa00 f203 lsl.w r2, r0, r3 8005568: 687b ldr r3, [r7, #4] 800556a: 681b ldr r3, [r3, #0] 800556c: 430a orrs r2, r1 800556e: 635a str r2, [r3, #52] @ 0x34 8005570: e03c b.n 80055ec ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 8005572: 683b ldr r3, [r7, #0] 8005574: 685b ldr r3, [r3, #4] 8005576: 2b0c cmp r3, #12 8005578: d81c bhi.n 80055b4 { MODIFY_REG(hadc->Instance->SQR2 , 800557a: 687b ldr r3, [r7, #4] 800557c: 681b ldr r3, [r3, #0] 800557e: 6b19 ldr r1, [r3, #48] @ 0x30 8005580: 683b ldr r3, [r7, #0] 8005582: 685a ldr r2, [r3, #4] 8005584: 4613 mov r3, r2 8005586: 009b lsls r3, r3, #2 8005588: 4413 add r3, r2 800558a: 3b23 subs r3, #35 @ 0x23 800558c: 221f movs r2, #31 800558e: fa02 f303 lsl.w r3, r2, r3 8005592: 43db mvns r3, r3 8005594: 4019 ands r1, r3 8005596: 683b ldr r3, [r7, #0] 8005598: 6818 ldr r0, [r3, #0] 800559a: 683b ldr r3, [r7, #0] 800559c: 685a ldr r2, [r3, #4] 800559e: 4613 mov r3, r2 80055a0: 009b lsls r3, r3, #2 80055a2: 4413 add r3, r2 80055a4: 3b23 subs r3, #35 @ 0x23 80055a6: fa00 f203 lsl.w r2, r0, r3 80055aa: 687b ldr r3, [r7, #4] 80055ac: 681b ldr r3, [r3, #0] 80055ae: 430a orrs r2, r1 80055b0: 631a str r2, [r3, #48] @ 0x30 80055b2: e01b b.n 80055ec ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 80055b4: 687b ldr r3, [r7, #4] 80055b6: 681b ldr r3, [r3, #0] 80055b8: 6ad9 ldr r1, [r3, #44] @ 0x2c 80055ba: 683b ldr r3, [r7, #0] 80055bc: 685a ldr r2, [r3, #4] 80055be: 4613 mov r3, r2 80055c0: 009b lsls r3, r3, #2 80055c2: 4413 add r3, r2 80055c4: 3b41 subs r3, #65 @ 0x41 80055c6: 221f movs r2, #31 80055c8: fa02 f303 lsl.w r3, r2, r3 80055cc: 43db mvns r3, r3 80055ce: 4019 ands r1, r3 80055d0: 683b ldr r3, [r7, #0] 80055d2: 6818 ldr r0, [r3, #0] 80055d4: 683b ldr r3, [r7, #0] 80055d6: 685a ldr r2, [r3, #4] 80055d8: 4613 mov r3, r2 80055da: 009b lsls r3, r3, #2 80055dc: 4413 add r3, r2 80055de: 3b41 subs r3, #65 @ 0x41 80055e0: fa00 f203 lsl.w r2, r0, r3 80055e4: 687b ldr r3, [r7, #4] 80055e6: 681b ldr r3, [r3, #0] 80055e8: 430a orrs r2, r1 80055ea: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 80055ec: 683b ldr r3, [r7, #0] 80055ee: 681b ldr r3, [r3, #0] 80055f0: 2b09 cmp r3, #9 80055f2: d91c bls.n 800562e { MODIFY_REG(hadc->Instance->SMPR1 , 80055f4: 687b ldr r3, [r7, #4] 80055f6: 681b ldr r3, [r3, #0] 80055f8: 68d9 ldr r1, [r3, #12] 80055fa: 683b ldr r3, [r7, #0] 80055fc: 681a ldr r2, [r3, #0] 80055fe: 4613 mov r3, r2 8005600: 005b lsls r3, r3, #1 8005602: 4413 add r3, r2 8005604: 3b1e subs r3, #30 8005606: 2207 movs r2, #7 8005608: fa02 f303 lsl.w r3, r2, r3 800560c: 43db mvns r3, r3 800560e: 4019 ands r1, r3 8005610: 683b ldr r3, [r7, #0] 8005612: 6898 ldr r0, [r3, #8] 8005614: 683b ldr r3, [r7, #0] 8005616: 681a ldr r2, [r3, #0] 8005618: 4613 mov r3, r2 800561a: 005b lsls r3, r3, #1 800561c: 4413 add r3, r2 800561e: 3b1e subs r3, #30 8005620: fa00 f203 lsl.w r2, r0, r3 8005624: 687b ldr r3, [r7, #4] 8005626: 681b ldr r3, [r3, #0] 8005628: 430a orrs r2, r1 800562a: 60da str r2, [r3, #12] 800562c: e019 b.n 8005662 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 800562e: 687b ldr r3, [r7, #4] 8005630: 681b ldr r3, [r3, #0] 8005632: 6919 ldr r1, [r3, #16] 8005634: 683b ldr r3, [r7, #0] 8005636: 681a ldr r2, [r3, #0] 8005638: 4613 mov r3, r2 800563a: 005b lsls r3, r3, #1 800563c: 4413 add r3, r2 800563e: 2207 movs r2, #7 8005640: fa02 f303 lsl.w r3, r2, r3 8005644: 43db mvns r3, r3 8005646: 4019 ands r1, r3 8005648: 683b ldr r3, [r7, #0] 800564a: 6898 ldr r0, [r3, #8] 800564c: 683b ldr r3, [r7, #0] 800564e: 681a ldr r2, [r3, #0] 8005650: 4613 mov r3, r2 8005652: 005b lsls r3, r3, #1 8005654: 4413 add r3, r2 8005656: fa00 f203 lsl.w r2, r0, r3 800565a: 687b ldr r3, [r7, #4] 800565c: 681b ldr r3, [r3, #0] 800565e: 430a orrs r2, r1 8005660: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8005662: 683b ldr r3, [r7, #0] 8005664: 681b ldr r3, [r3, #0] 8005666: 2b10 cmp r3, #16 8005668: d003 beq.n 8005672 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 800566a: 683b ldr r3, [r7, #0] 800566c: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800566e: 2b11 cmp r3, #17 8005670: d132 bne.n 80056d8 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 8005672: 687b ldr r3, [r7, #4] 8005674: 681b ldr r3, [r3, #0] 8005676: 4a1d ldr r2, [pc, #116] @ (80056ec ) 8005678: 4293 cmp r3, r2 800567a: d125 bne.n 80056c8 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 800567c: 687b ldr r3, [r7, #4] 800567e: 681b ldr r3, [r3, #0] 8005680: 689b ldr r3, [r3, #8] 8005682: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8005686: 2b00 cmp r3, #0 8005688: d126 bne.n 80056d8 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800568a: 687b ldr r3, [r7, #4] 800568c: 681b ldr r3, [r3, #0] 800568e: 689a ldr r2, [r3, #8] 8005690: 687b ldr r3, [r7, #4] 8005692: 681b ldr r3, [r3, #0] 8005694: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 8005698: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 800569a: 683b ldr r3, [r7, #0] 800569c: 681b ldr r3, [r3, #0] 800569e: 2b10 cmp r3, #16 80056a0: d11a bne.n 80056d8 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 80056a2: 4b13 ldr r3, [pc, #76] @ (80056f0 ) 80056a4: 681b ldr r3, [r3, #0] 80056a6: 4a13 ldr r2, [pc, #76] @ (80056f4 ) 80056a8: fba2 2303 umull r2, r3, r2, r3 80056ac: 0c9a lsrs r2, r3, #18 80056ae: 4613 mov r3, r2 80056b0: 009b lsls r3, r3, #2 80056b2: 4413 add r3, r2 80056b4: 005b lsls r3, r3, #1 80056b6: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 80056b8: e002 b.n 80056c0 { wait_loop_index--; 80056ba: 68bb ldr r3, [r7, #8] 80056bc: 3b01 subs r3, #1 80056be: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 80056c0: 68bb ldr r3, [r7, #8] 80056c2: 2b00 cmp r3, #0 80056c4: d1f9 bne.n 80056ba 80056c6: e007 b.n 80056d8 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 80056c8: 687b ldr r3, [r7, #4] 80056ca: 6a9b ldr r3, [r3, #40] @ 0x28 80056cc: f043 0220 orr.w r2, r3, #32 80056d0: 687b ldr r3, [r7, #4] 80056d2: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 80056d4: 2301 movs r3, #1 80056d6: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 80056d8: 687b ldr r3, [r7, #4] 80056da: 2200 movs r2, #0 80056dc: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 80056e0: 7bfb ldrb r3, [r7, #15] } 80056e2: 4618 mov r0, r3 80056e4: 3714 adds r7, #20 80056e6: 46bd mov sp, r7 80056e8: bc80 pop {r7} 80056ea: 4770 bx lr 80056ec: 40012400 .word 0x40012400 80056f0: 20000010 .word 0x20000010 80056f4: 431bde83 .word 0x431bde83 080056f8 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 80056f8: b580 push {r7, lr} 80056fa: b084 sub sp, #16 80056fc: af00 add r7, sp, #0 80056fe: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8005700: 2300 movs r3, #0 8005702: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 8005704: 2300 movs r3, #0 8005706: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 8005708: 687b ldr r3, [r7, #4] 800570a: 681b ldr r3, [r3, #0] 800570c: 689b ldr r3, [r3, #8] 800570e: f003 0301 and.w r3, r3, #1 8005712: 2b01 cmp r3, #1 8005714: d040 beq.n 8005798 { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 8005716: 687b ldr r3, [r7, #4] 8005718: 681b ldr r3, [r3, #0] 800571a: 689a ldr r2, [r3, #8] 800571c: 687b ldr r3, [r7, #4] 800571e: 681b ldr r3, [r3, #0] 8005720: f042 0201 orr.w r2, r2, #1 8005724: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 8005726: 4b1f ldr r3, [pc, #124] @ (80057a4 ) 8005728: 681b ldr r3, [r3, #0] 800572a: 4a1f ldr r2, [pc, #124] @ (80057a8 ) 800572c: fba2 2303 umull r2, r3, r2, r3 8005730: 0c9b lsrs r3, r3, #18 8005732: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8005734: e002 b.n 800573c { wait_loop_index--; 8005736: 68bb ldr r3, [r7, #8] 8005738: 3b01 subs r3, #1 800573a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800573c: 68bb ldr r3, [r7, #8] 800573e: 2b00 cmp r3, #0 8005740: d1f9 bne.n 8005736 } /* Get tick count */ tickstart = HAL_GetTick(); 8005742: f7ff fd05 bl 8005150 8005746: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 8005748: e01f b.n 800578a { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 800574a: f7ff fd01 bl 8005150 800574e: 4602 mov r2, r0 8005750: 68fb ldr r3, [r7, #12] 8005752: 1ad3 subs r3, r2, r3 8005754: 2b02 cmp r3, #2 8005756: d918 bls.n 800578a { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 8005758: 687b ldr r3, [r7, #4] 800575a: 681b ldr r3, [r3, #0] 800575c: 689b ldr r3, [r3, #8] 800575e: f003 0301 and.w r3, r3, #1 8005762: 2b01 cmp r3, #1 8005764: d011 beq.n 800578a { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8005766: 687b ldr r3, [r7, #4] 8005768: 6a9b ldr r3, [r3, #40] @ 0x28 800576a: f043 0210 orr.w r2, r3, #16 800576e: 687b ldr r3, [r7, #4] 8005770: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005772: 687b ldr r3, [r7, #4] 8005774: 6adb ldr r3, [r3, #44] @ 0x2c 8005776: f043 0201 orr.w r2, r3, #1 800577a: 687b ldr r3, [r7, #4] 800577c: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 800577e: 687b ldr r3, [r7, #4] 8005780: 2200 movs r2, #0 8005782: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8005786: 2301 movs r3, #1 8005788: e007 b.n 800579a while(ADC_IS_ENABLE(hadc) == RESET) 800578a: 687b ldr r3, [r7, #4] 800578c: 681b ldr r3, [r3, #0] 800578e: 689b ldr r3, [r3, #8] 8005790: f003 0301 and.w r3, r3, #1 8005794: 2b01 cmp r3, #1 8005796: d1d8 bne.n 800574a } } } /* Return HAL status */ return HAL_OK; 8005798: 2300 movs r3, #0 } 800579a: 4618 mov r0, r3 800579c: 3710 adds r7, #16 800579e: 46bd mov sp, r7 80057a0: bd80 pop {r7, pc} 80057a2: bf00 nop 80057a4: 20000010 .word 0x20000010 80057a8: 431bde83 .word 0x431bde83 080057ac : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 80057ac: b580 push {r7, lr} 80057ae: b084 sub sp, #16 80057b0: af00 add r7, sp, #0 80057b2: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 80057b4: 2300 movs r3, #0 80057b6: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 80057b8: 687b ldr r3, [r7, #4] 80057ba: 681b ldr r3, [r3, #0] 80057bc: 689b ldr r3, [r3, #8] 80057be: f003 0301 and.w r3, r3, #1 80057c2: 2b01 cmp r3, #1 80057c4: d12e bne.n 8005824 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 80057c6: 687b ldr r3, [r7, #4] 80057c8: 681b ldr r3, [r3, #0] 80057ca: 689a ldr r2, [r3, #8] 80057cc: 687b ldr r3, [r7, #4] 80057ce: 681b ldr r3, [r3, #0] 80057d0: f022 0201 bic.w r2, r2, #1 80057d4: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 80057d6: f7ff fcbb bl 8005150 80057da: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 80057dc: e01b b.n 8005816 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 80057de: f7ff fcb7 bl 8005150 80057e2: 4602 mov r2, r0 80057e4: 68fb ldr r3, [r7, #12] 80057e6: 1ad3 subs r3, r2, r3 80057e8: 2b02 cmp r3, #2 80057ea: d914 bls.n 8005816 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 80057ec: 687b ldr r3, [r7, #4] 80057ee: 681b ldr r3, [r3, #0] 80057f0: 689b ldr r3, [r3, #8] 80057f2: f003 0301 and.w r3, r3, #1 80057f6: 2b01 cmp r3, #1 80057f8: d10d bne.n 8005816 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80057fa: 687b ldr r3, [r7, #4] 80057fc: 6a9b ldr r3, [r3, #40] @ 0x28 80057fe: f043 0210 orr.w r2, r3, #16 8005802: 687b ldr r3, [r7, #4] 8005804: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8005806: 687b ldr r3, [r7, #4] 8005808: 6adb ldr r3, [r3, #44] @ 0x2c 800580a: f043 0201 orr.w r2, r3, #1 800580e: 687b ldr r3, [r7, #4] 8005810: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 8005812: 2301 movs r3, #1 8005814: e007 b.n 8005826 while(ADC_IS_ENABLE(hadc) != RESET) 8005816: 687b ldr r3, [r7, #4] 8005818: 681b ldr r3, [r3, #0] 800581a: 689b ldr r3, [r3, #8] 800581c: f003 0301 and.w r3, r3, #1 8005820: 2b01 cmp r3, #1 8005822: d0dc beq.n 80057de } } } /* Return HAL status */ return HAL_OK; 8005824: 2300 movs r3, #0 } 8005826: 4618 mov r0, r3 8005828: 3710 adds r7, #16 800582a: 46bd mov sp, r7 800582c: bd80 pop {r7, pc} 0800582e : * @brief DMA transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { 800582e: b580 push {r7, lr} 8005830: b084 sub sp, #16 8005832: af00 add r7, sp, #0 8005834: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8005836: 687b ldr r3, [r7, #4] 8005838: 6a5b ldr r3, [r3, #36] @ 0x24 800583a: 60fb str r3, [r7, #12] /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 800583c: 68fb ldr r3, [r7, #12] 800583e: 6a9b ldr r3, [r3, #40] @ 0x28 8005840: f003 0350 and.w r3, r3, #80 @ 0x50 8005844: 2b00 cmp r3, #0 8005846: d127 bne.n 8005898 { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 8005848: 68fb ldr r3, [r7, #12] 800584a: 6a9b ldr r3, [r3, #40] @ 0x28 800584c: f443 7200 orr.w r2, r3, #512 @ 0x200 8005850: 68fb ldr r3, [r7, #12] 8005852: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8005854: 68fb ldr r3, [r7, #12] 8005856: 681b ldr r3, [r3, #0] 8005858: 689b ldr r3, [r3, #8] 800585a: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800585e: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 8005862: d115 bne.n 8005890 (hadc->Init.ContinuousConvMode == DISABLE) ) 8005864: 68fb ldr r3, [r7, #12] 8005866: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8005868: 2b00 cmp r3, #0 800586a: d111 bne.n 8005890 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 800586c: 68fb ldr r3, [r7, #12] 800586e: 6a9b ldr r3, [r3, #40] @ 0x28 8005870: f423 7280 bic.w r2, r3, #256 @ 0x100 8005874: 68fb ldr r3, [r7, #12] 8005876: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8005878: 68fb ldr r3, [r7, #12] 800587a: 6a9b ldr r3, [r3, #40] @ 0x28 800587c: f403 5380 and.w r3, r3, #4096 @ 0x1000 8005880: 2b00 cmp r3, #0 8005882: d105 bne.n 8005890 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8005884: 68fb ldr r3, [r7, #12] 8005886: 6a9b ldr r3, [r3, #40] @ 0x28 8005888: f043 0201 orr.w r2, r3, #1 800588c: 68fb ldr r3, [r7, #12] 800588e: 629a str r2, [r3, #40] @ 0x28 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 8005890: 68f8 ldr r0, [r7, #12] 8005892: f7ff fe1d bl 80054d0 else { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); } } 8005896: e004 b.n 80058a2 hadc->DMA_Handle->XferErrorCallback(hdma); 8005898: 68fb ldr r3, [r7, #12] 800589a: 6a1b ldr r3, [r3, #32] 800589c: 6b1b ldr r3, [r3, #48] @ 0x30 800589e: 6878 ldr r0, [r7, #4] 80058a0: 4798 blx r3 } 80058a2: bf00 nop 80058a4: 3710 adds r7, #16 80058a6: 46bd mov sp, r7 80058a8: bd80 pop {r7, pc} 080058aa : * @brief DMA half transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 80058aa: b580 push {r7, lr} 80058ac: b084 sub sp, #16 80058ae: af00 add r7, sp, #0 80058b0: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80058b2: 687b ldr r3, [r7, #4] 80058b4: 6a5b ldr r3, [r3, #36] @ 0x24 80058b6: 60fb str r3, [r7, #12] /* Half conversion callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvHalfCpltCallback(hadc); #else HAL_ADC_ConvHalfCpltCallback(hadc); 80058b8: 68f8 ldr r0, [r7, #12] 80058ba: f7ff fe12 bl 80054e2 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 80058be: bf00 nop 80058c0: 3710 adds r7, #16 80058c2: 46bd mov sp, r7 80058c4: bd80 pop {r7, pc} 080058c6 : * @brief DMA error callback * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAError(DMA_HandleTypeDef *hdma) { 80058c6: b580 push {r7, lr} 80058c8: b084 sub sp, #16 80058ca: af00 add r7, sp, #0 80058cc: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80058ce: 687b ldr r3, [r7, #4] 80058d0: 6a5b ldr r3, [r3, #36] @ 0x24 80058d2: 60fb str r3, [r7, #12] /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 80058d4: 68fb ldr r3, [r7, #12] 80058d6: 6a9b ldr r3, [r3, #40] @ 0x28 80058d8: f043 0240 orr.w r2, r3, #64 @ 0x40 80058dc: 68fb ldr r3, [r7, #12] 80058de: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to DMA error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 80058e0: 68fb ldr r3, [r7, #12] 80058e2: 6adb ldr r3, [r3, #44] @ 0x2c 80058e4: f043 0204 orr.w r2, r3, #4 80058e8: 68fb ldr r3, [r7, #12] 80058ea: 62da str r2, [r3, #44] @ 0x2c /* Error callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ErrorCallback(hadc); #else HAL_ADC_ErrorCallback(hadc); 80058ec: 68f8 ldr r0, [r7, #12] 80058ee: f7ff fe01 bl 80054f4 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 80058f2: bf00 nop 80058f4: 3710 adds r7, #16 80058f6: 46bd mov sp, r7 80058f8: bd80 pop {r7, pc} ... 080058fc <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80058fc: b480 push {r7} 80058fe: b085 sub sp, #20 8005900: af00 add r7, sp, #0 8005902: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8005904: 687b ldr r3, [r7, #4] 8005906: f003 0307 and.w r3, r3, #7 800590a: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 800590c: 4b0c ldr r3, [pc, #48] @ (8005940 <__NVIC_SetPriorityGrouping+0x44>) 800590e: 68db ldr r3, [r3, #12] 8005910: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8005912: 68ba ldr r2, [r7, #8] 8005914: f64f 03ff movw r3, #63743 @ 0xf8ff 8005918: 4013 ands r3, r2 800591a: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 800591c: 68fb ldr r3, [r7, #12] 800591e: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8005920: 68bb ldr r3, [r7, #8] 8005922: 4313 orrs r3, r2 reg_value = (reg_value | 8005924: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8005928: f443 3300 orr.w r3, r3, #131072 @ 0x20000 800592c: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 800592e: 4a04 ldr r2, [pc, #16] @ (8005940 <__NVIC_SetPriorityGrouping+0x44>) 8005930: 68bb ldr r3, [r7, #8] 8005932: 60d3 str r3, [r2, #12] } 8005934: bf00 nop 8005936: 3714 adds r7, #20 8005938: 46bd mov sp, r7 800593a: bc80 pop {r7} 800593c: 4770 bx lr 800593e: bf00 nop 8005940: e000ed00 .word 0xe000ed00 08005944 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8005944: b480 push {r7} 8005946: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8005948: 4b04 ldr r3, [pc, #16] @ (800595c <__NVIC_GetPriorityGrouping+0x18>) 800594a: 68db ldr r3, [r3, #12] 800594c: 0a1b lsrs r3, r3, #8 800594e: f003 0307 and.w r3, r3, #7 } 8005952: 4618 mov r0, r3 8005954: 46bd mov sp, r7 8005956: bc80 pop {r7} 8005958: 4770 bx lr 800595a: bf00 nop 800595c: e000ed00 .word 0xe000ed00 08005960 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8005960: b480 push {r7} 8005962: b083 sub sp, #12 8005964: af00 add r7, sp, #0 8005966: 4603 mov r3, r0 8005968: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 800596a: f997 3007 ldrsb.w r3, [r7, #7] 800596e: 2b00 cmp r3, #0 8005970: db0b blt.n 800598a <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8005972: 79fb ldrb r3, [r7, #7] 8005974: f003 021f and.w r2, r3, #31 8005978: 4906 ldr r1, [pc, #24] @ (8005994 <__NVIC_EnableIRQ+0x34>) 800597a: f997 3007 ldrsb.w r3, [r7, #7] 800597e: 095b lsrs r3, r3, #5 8005980: 2001 movs r0, #1 8005982: fa00 f202 lsl.w r2, r0, r2 8005986: f841 2023 str.w r2, [r1, r3, lsl #2] } } 800598a: bf00 nop 800598c: 370c adds r7, #12 800598e: 46bd mov sp, r7 8005990: bc80 pop {r7} 8005992: 4770 bx lr 8005994: e000e100 .word 0xe000e100 08005998 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8005998: b480 push {r7} 800599a: b083 sub sp, #12 800599c: af00 add r7, sp, #0 800599e: 4603 mov r3, r0 80059a0: 6039 str r1, [r7, #0] 80059a2: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 80059a4: f997 3007 ldrsb.w r3, [r7, #7] 80059a8: 2b00 cmp r3, #0 80059aa: db0a blt.n 80059c2 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80059ac: 683b ldr r3, [r7, #0] 80059ae: b2da uxtb r2, r3 80059b0: 490c ldr r1, [pc, #48] @ (80059e4 <__NVIC_SetPriority+0x4c>) 80059b2: f997 3007 ldrsb.w r3, [r7, #7] 80059b6: 0112 lsls r2, r2, #4 80059b8: b2d2 uxtb r2, r2 80059ba: 440b add r3, r1 80059bc: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 80059c0: e00a b.n 80059d8 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80059c2: 683b ldr r3, [r7, #0] 80059c4: b2da uxtb r2, r3 80059c6: 4908 ldr r1, [pc, #32] @ (80059e8 <__NVIC_SetPriority+0x50>) 80059c8: 79fb ldrb r3, [r7, #7] 80059ca: f003 030f and.w r3, r3, #15 80059ce: 3b04 subs r3, #4 80059d0: 0112 lsls r2, r2, #4 80059d2: b2d2 uxtb r2, r2 80059d4: 440b add r3, r1 80059d6: 761a strb r2, [r3, #24] } 80059d8: bf00 nop 80059da: 370c adds r7, #12 80059dc: 46bd mov sp, r7 80059de: bc80 pop {r7} 80059e0: 4770 bx lr 80059e2: bf00 nop 80059e4: e000e100 .word 0xe000e100 80059e8: e000ed00 .word 0xe000ed00 080059ec : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 80059ec: b480 push {r7} 80059ee: b089 sub sp, #36 @ 0x24 80059f0: af00 add r7, sp, #0 80059f2: 60f8 str r0, [r7, #12] 80059f4: 60b9 str r1, [r7, #8] 80059f6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80059f8: 68fb ldr r3, [r7, #12] 80059fa: f003 0307 and.w r3, r3, #7 80059fe: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8005a00: 69fb ldr r3, [r7, #28] 8005a02: f1c3 0307 rsb r3, r3, #7 8005a06: 2b04 cmp r3, #4 8005a08: bf28 it cs 8005a0a: 2304 movcs r3, #4 8005a0c: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8005a0e: 69fb ldr r3, [r7, #28] 8005a10: 3304 adds r3, #4 8005a12: 2b06 cmp r3, #6 8005a14: d902 bls.n 8005a1c 8005a16: 69fb ldr r3, [r7, #28] 8005a18: 3b03 subs r3, #3 8005a1a: e000 b.n 8005a1e 8005a1c: 2300 movs r3, #0 8005a1e: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005a20: f04f 32ff mov.w r2, #4294967295 8005a24: 69bb ldr r3, [r7, #24] 8005a26: fa02 f303 lsl.w r3, r2, r3 8005a2a: 43da mvns r2, r3 8005a2c: 68bb ldr r3, [r7, #8] 8005a2e: 401a ands r2, r3 8005a30: 697b ldr r3, [r7, #20] 8005a32: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8005a34: f04f 31ff mov.w r1, #4294967295 8005a38: 697b ldr r3, [r7, #20] 8005a3a: fa01 f303 lsl.w r3, r1, r3 8005a3e: 43d9 mvns r1, r3 8005a40: 687b ldr r3, [r7, #4] 8005a42: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8005a44: 4313 orrs r3, r2 ); } 8005a46: 4618 mov r0, r3 8005a48: 3724 adds r7, #36 @ 0x24 8005a4a: 46bd mov sp, r7 8005a4c: bc80 pop {r7} 8005a4e: 4770 bx lr 08005a50 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8005a50: b580 push {r7, lr} 8005a52: b082 sub sp, #8 8005a54: af00 add r7, sp, #0 8005a56: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8005a58: 687b ldr r3, [r7, #4] 8005a5a: 3b01 subs r3, #1 8005a5c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8005a60: d301 bcc.n 8005a66 { return (1UL); /* Reload value impossible */ 8005a62: 2301 movs r3, #1 8005a64: e00f b.n 8005a86 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8005a66: 4a0a ldr r2, [pc, #40] @ (8005a90 ) 8005a68: 687b ldr r3, [r7, #4] 8005a6a: 3b01 subs r3, #1 8005a6c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8005a6e: 210f movs r1, #15 8005a70: f04f 30ff mov.w r0, #4294967295 8005a74: f7ff ff90 bl 8005998 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8005a78: 4b05 ldr r3, [pc, #20] @ (8005a90 ) 8005a7a: 2200 movs r2, #0 8005a7c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8005a7e: 4b04 ldr r3, [pc, #16] @ (8005a90 ) 8005a80: 2207 movs r2, #7 8005a82: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8005a84: 2300 movs r3, #0 } 8005a86: 4618 mov r0, r3 8005a88: 3708 adds r7, #8 8005a8a: 46bd mov sp, r7 8005a8c: bd80 pop {r7, pc} 8005a8e: bf00 nop 8005a90: e000e010 .word 0xe000e010 08005a94 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8005a94: b580 push {r7, lr} 8005a96: b082 sub sp, #8 8005a98: af00 add r7, sp, #0 8005a9a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8005a9c: 6878 ldr r0, [r7, #4] 8005a9e: f7ff ff2d bl 80058fc <__NVIC_SetPriorityGrouping> } 8005aa2: bf00 nop 8005aa4: 3708 adds r7, #8 8005aa6: 46bd mov sp, r7 8005aa8: bd80 pop {r7, pc} 08005aaa : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8005aaa: b580 push {r7, lr} 8005aac: b086 sub sp, #24 8005aae: af00 add r7, sp, #0 8005ab0: 4603 mov r3, r0 8005ab2: 60b9 str r1, [r7, #8] 8005ab4: 607a str r2, [r7, #4] 8005ab6: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8005ab8: 2300 movs r3, #0 8005aba: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8005abc: f7ff ff42 bl 8005944 <__NVIC_GetPriorityGrouping> 8005ac0: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8005ac2: 687a ldr r2, [r7, #4] 8005ac4: 68b9 ldr r1, [r7, #8] 8005ac6: 6978 ldr r0, [r7, #20] 8005ac8: f7ff ff90 bl 80059ec 8005acc: 4602 mov r2, r0 8005ace: f997 300f ldrsb.w r3, [r7, #15] 8005ad2: 4611 mov r1, r2 8005ad4: 4618 mov r0, r3 8005ad6: f7ff ff5f bl 8005998 <__NVIC_SetPriority> } 8005ada: bf00 nop 8005adc: 3718 adds r7, #24 8005ade: 46bd mov sp, r7 8005ae0: bd80 pop {r7, pc} 08005ae2 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8005ae2: b580 push {r7, lr} 8005ae4: b082 sub sp, #8 8005ae6: af00 add r7, sp, #0 8005ae8: 4603 mov r3, r0 8005aea: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8005aec: f997 3007 ldrsb.w r3, [r7, #7] 8005af0: 4618 mov r0, r3 8005af2: f7ff ff35 bl 8005960 <__NVIC_EnableIRQ> } 8005af6: bf00 nop 8005af8: 3708 adds r7, #8 8005afa: 46bd mov sp, r7 8005afc: bd80 pop {r7, pc} 08005afe : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8005afe: b580 push {r7, lr} 8005b00: b082 sub sp, #8 8005b02: af00 add r7, sp, #0 8005b04: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8005b06: 6878 ldr r0, [r7, #4] 8005b08: f7ff ffa2 bl 8005a50 8005b0c: 4603 mov r3, r0 } 8005b0e: 4618 mov r0, r3 8005b10: 3708 adds r7, #8 8005b12: 46bd mov sp, r7 8005b14: bd80 pop {r7, pc} 08005b16 : /** * @brief This function handles SYSTICK interrupt request. * @retval None */ void HAL_SYSTICK_IRQHandler(void) { 8005b16: b580 push {r7, lr} 8005b18: af00 add r7, sp, #0 HAL_SYSTICK_Callback(); 8005b1a: f7fc f83f bl 8001b9c } 8005b1e: bf00 nop 8005b20: bd80 pop {r7, pc} ... 08005b24 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 8005b24: b480 push {r7} 8005b26: b085 sub sp, #20 8005b28: af00 add r7, sp, #0 8005b2a: 6078 str r0, [r7, #4] uint32_t tmp = 0U; 8005b2c: 2300 movs r3, #0 8005b2e: 60fb str r3, [r7, #12] /* Check the DMA handle allocation */ if(hdma == NULL) 8005b30: 687b ldr r3, [r7, #4] 8005b32: 2b00 cmp r3, #0 8005b34: d101 bne.n 8005b3a { return HAL_ERROR; 8005b36: 2301 movs r3, #1 8005b38: e043 b.n 8005bc2 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; hdma->DmaBaseAddress = DMA2; } #else /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 8005b3a: 687b ldr r3, [r7, #4] 8005b3c: 681b ldr r3, [r3, #0] 8005b3e: 461a mov r2, r3 8005b40: 4b22 ldr r3, [pc, #136] @ (8005bcc ) 8005b42: 4413 add r3, r2 8005b44: 4a22 ldr r2, [pc, #136] @ (8005bd0 ) 8005b46: fba2 2303 umull r2, r3, r2, r3 8005b4a: 091b lsrs r3, r3, #4 8005b4c: 009a lsls r2, r3, #2 8005b4e: 687b ldr r3, [r7, #4] 8005b50: 641a str r2, [r3, #64] @ 0x40 hdma->DmaBaseAddress = DMA1; 8005b52: 687b ldr r3, [r7, #4] 8005b54: 4a1f ldr r2, [pc, #124] @ (8005bd4 ) 8005b56: 63da str r2, [r3, #60] @ 0x3c #endif /* DMA2 */ /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8005b58: 687b ldr r3, [r7, #4] 8005b5a: 2202 movs r2, #2 8005b5c: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Get the CR register value */ tmp = hdma->Instance->CCR; 8005b60: 687b ldr r3, [r7, #4] 8005b62: 681b ldr r3, [r3, #0] 8005b64: 681b ldr r3, [r3, #0] 8005b66: 60fb str r3, [r7, #12] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8005b68: 68fb ldr r3, [r7, #12] 8005b6a: f423 537f bic.w r3, r3, #16320 @ 0x3fc0 8005b6e: f023 0330 bic.w r3, r3, #48 @ 0x30 8005b72: 60fb str r3, [r7, #12] DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 8005b74: 687b ldr r3, [r7, #4] 8005b76: 685a ldr r2, [r3, #4] hdma->Init.PeriphInc | hdma->Init.MemInc | 8005b78: 687b ldr r3, [r7, #4] 8005b7a: 689b ldr r3, [r3, #8] tmp |= hdma->Init.Direction | 8005b7c: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | 8005b7e: 687b ldr r3, [r7, #4] 8005b80: 68db ldr r3, [r3, #12] 8005b82: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8005b84: 687b ldr r3, [r7, #4] 8005b86: 691b ldr r3, [r3, #16] hdma->Init.PeriphInc | hdma->Init.MemInc | 8005b88: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8005b8a: 687b ldr r3, [r7, #4] 8005b8c: 695b ldr r3, [r3, #20] 8005b8e: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8005b90: 687b ldr r3, [r7, #4] 8005b92: 699b ldr r3, [r3, #24] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8005b94: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8005b96: 687b ldr r3, [r7, #4] 8005b98: 69db ldr r3, [r3, #28] 8005b9a: 4313 orrs r3, r2 tmp |= hdma->Init.Direction | 8005b9c: 68fa ldr r2, [r7, #12] 8005b9e: 4313 orrs r3, r2 8005ba0: 60fb str r3, [r7, #12] /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 8005ba2: 687b ldr r3, [r7, #4] 8005ba4: 681b ldr r3, [r3, #0] 8005ba6: 68fa ldr r2, [r7, #12] 8005ba8: 601a str r2, [r3, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8005baa: 687b ldr r3, [r7, #4] 8005bac: 2200 movs r2, #0 8005bae: 639a str r2, [r3, #56] @ 0x38 /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 8005bb0: 687b ldr r3, [r7, #4] 8005bb2: 2201 movs r2, #1 8005bb4: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8005bb8: 687b ldr r3, [r7, #4] 8005bba: 2200 movs r2, #0 8005bbc: f883 2020 strb.w r2, [r3, #32] return HAL_OK; 8005bc0: 2300 movs r3, #0 } 8005bc2: 4618 mov r0, r3 8005bc4: 3714 adds r7, #20 8005bc6: 46bd mov sp, r7 8005bc8: bc80 pop {r7} 8005bca: 4770 bx lr 8005bcc: bffdfff8 .word 0xbffdfff8 8005bd0: cccccccd .word 0xcccccccd 8005bd4: 40020000 .word 0x40020000 08005bd8 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8005bd8: b580 push {r7, lr} 8005bda: b086 sub sp, #24 8005bdc: af00 add r7, sp, #0 8005bde: 60f8 str r0, [r7, #12] 8005be0: 60b9 str r1, [r7, #8] 8005be2: 607a str r2, [r7, #4] 8005be4: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8005be6: 2300 movs r3, #0 8005be8: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8005bea: 68fb ldr r3, [r7, #12] 8005bec: f893 3020 ldrb.w r3, [r3, #32] 8005bf0: 2b01 cmp r3, #1 8005bf2: d101 bne.n 8005bf8 8005bf4: 2302 movs r3, #2 8005bf6: e04b b.n 8005c90 8005bf8: 68fb ldr r3, [r7, #12] 8005bfa: 2201 movs r2, #1 8005bfc: f883 2020 strb.w r2, [r3, #32] if(HAL_DMA_STATE_READY == hdma->State) 8005c00: 68fb ldr r3, [r7, #12] 8005c02: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8005c06: b2db uxtb r3, r3 8005c08: 2b01 cmp r3, #1 8005c0a: d13a bne.n 8005c82 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8005c0c: 68fb ldr r3, [r7, #12] 8005c0e: 2202 movs r2, #2 8005c10: f883 2021 strb.w r2, [r3, #33] @ 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8005c14: 68fb ldr r3, [r7, #12] 8005c16: 2200 movs r2, #0 8005c18: 639a str r2, [r3, #56] @ 0x38 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8005c1a: 68fb ldr r3, [r7, #12] 8005c1c: 681b ldr r3, [r3, #0] 8005c1e: 681a ldr r2, [r3, #0] 8005c20: 68fb ldr r3, [r7, #12] 8005c22: 681b ldr r3, [r3, #0] 8005c24: f022 0201 bic.w r2, r2, #1 8005c28: 601a str r2, [r3, #0] /* Configure the source, destination address and the data length & clear flags*/ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 8005c2a: 683b ldr r3, [r7, #0] 8005c2c: 687a ldr r2, [r7, #4] 8005c2e: 68b9 ldr r1, [r7, #8] 8005c30: 68f8 ldr r0, [r7, #12] 8005c32: f000 f937 bl 8005ea4 /* Enable the transfer complete interrupt */ /* Enable the transfer Error interrupt */ if(NULL != hdma->XferHalfCpltCallback) 8005c36: 68fb ldr r3, [r7, #12] 8005c38: 6adb ldr r3, [r3, #44] @ 0x2c 8005c3a: 2b00 cmp r3, #0 8005c3c: d008 beq.n 8005c50 { /* Enable the Half transfer complete interrupt as well */ __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8005c3e: 68fb ldr r3, [r7, #12] 8005c40: 681b ldr r3, [r3, #0] 8005c42: 681a ldr r2, [r3, #0] 8005c44: 68fb ldr r3, [r7, #12] 8005c46: 681b ldr r3, [r3, #0] 8005c48: f042 020e orr.w r2, r2, #14 8005c4c: 601a str r2, [r3, #0] 8005c4e: e00f b.n 8005c70 } else { __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8005c50: 68fb ldr r3, [r7, #12] 8005c52: 681b ldr r3, [r3, #0] 8005c54: 681a ldr r2, [r3, #0] 8005c56: 68fb ldr r3, [r7, #12] 8005c58: 681b ldr r3, [r3, #0] 8005c5a: f022 0204 bic.w r2, r2, #4 8005c5e: 601a str r2, [r3, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8005c60: 68fb ldr r3, [r7, #12] 8005c62: 681b ldr r3, [r3, #0] 8005c64: 681a ldr r2, [r3, #0] 8005c66: 68fb ldr r3, [r7, #12] 8005c68: 681b ldr r3, [r3, #0] 8005c6a: f042 020a orr.w r2, r2, #10 8005c6e: 601a str r2, [r3, #0] } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); 8005c70: 68fb ldr r3, [r7, #12] 8005c72: 681b ldr r3, [r3, #0] 8005c74: 681a ldr r2, [r3, #0] 8005c76: 68fb ldr r3, [r7, #12] 8005c78: 681b ldr r3, [r3, #0] 8005c7a: f042 0201 orr.w r2, r2, #1 8005c7e: 601a str r2, [r3, #0] 8005c80: e005 b.n 8005c8e } else { /* Process Unlocked */ __HAL_UNLOCK(hdma); 8005c82: 68fb ldr r3, [r7, #12] 8005c84: 2200 movs r2, #0 8005c86: f883 2020 strb.w r2, [r3, #32] /* Remain BUSY */ status = HAL_BUSY; 8005c8a: 2302 movs r3, #2 8005c8c: 75fb strb r3, [r7, #23] } return status; 8005c8e: 7dfb ldrb r3, [r7, #23] } 8005c90: 4618 mov r0, r3 8005c92: 3718 adds r7, #24 8005c94: 46bd mov sp, r7 8005c96: bd80 pop {r7, pc} 08005c98 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { 8005c98: b580 push {r7, lr} 8005c9a: b084 sub sp, #16 8005c9c: af00 add r7, sp, #0 8005c9e: 6078 str r0, [r7, #4] uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8005ca0: 687b ldr r3, [r7, #4] 8005ca2: 6bdb ldr r3, [r3, #60] @ 0x3c 8005ca4: 681b ldr r3, [r3, #0] 8005ca6: 60fb str r3, [r7, #12] uint32_t source_it = hdma->Instance->CCR; 8005ca8: 687b ldr r3, [r7, #4] 8005caa: 681b ldr r3, [r3, #0] 8005cac: 681b ldr r3, [r3, #0] 8005cae: 60bb str r3, [r7, #8] /* Half Transfer Complete Interrupt management ******************************/ if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8005cb0: 687b ldr r3, [r7, #4] 8005cb2: 6c1b ldr r3, [r3, #64] @ 0x40 8005cb4: 2204 movs r2, #4 8005cb6: 409a lsls r2, r3 8005cb8: 68fb ldr r3, [r7, #12] 8005cba: 4013 ands r3, r2 8005cbc: 2b00 cmp r3, #0 8005cbe: d04f beq.n 8005d60 8005cc0: 68bb ldr r3, [r7, #8] 8005cc2: f003 0304 and.w r3, r3, #4 8005cc6: 2b00 cmp r3, #0 8005cc8: d04a beq.n 8005d60 { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005cca: 687b ldr r3, [r7, #4] 8005ccc: 681b ldr r3, [r3, #0] 8005cce: 681b ldr r3, [r3, #0] 8005cd0: f003 0320 and.w r3, r3, #32 8005cd4: 2b00 cmp r3, #0 8005cd6: d107 bne.n 8005ce8 { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8005cd8: 687b ldr r3, [r7, #4] 8005cda: 681b ldr r3, [r3, #0] 8005cdc: 681a ldr r2, [r3, #0] 8005cde: 687b ldr r3, [r7, #4] 8005ce0: 681b ldr r3, [r3, #0] 8005ce2: f022 0204 bic.w r2, r2, #4 8005ce6: 601a str r2, [r3, #0] } /* Clear the half transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 8005ce8: 687b ldr r3, [r7, #4] 8005cea: 681b ldr r3, [r3, #0] 8005cec: 4a66 ldr r2, [pc, #408] @ (8005e88 ) 8005cee: 4293 cmp r3, r2 8005cf0: d029 beq.n 8005d46 8005cf2: 687b ldr r3, [r7, #4] 8005cf4: 681b ldr r3, [r3, #0] 8005cf6: 4a65 ldr r2, [pc, #404] @ (8005e8c ) 8005cf8: 4293 cmp r3, r2 8005cfa: d022 beq.n 8005d42 8005cfc: 687b ldr r3, [r7, #4] 8005cfe: 681b ldr r3, [r3, #0] 8005d00: 4a63 ldr r2, [pc, #396] @ (8005e90 ) 8005d02: 4293 cmp r3, r2 8005d04: d01a beq.n 8005d3c 8005d06: 687b ldr r3, [r7, #4] 8005d08: 681b ldr r3, [r3, #0] 8005d0a: 4a62 ldr r2, [pc, #392] @ (8005e94 ) 8005d0c: 4293 cmp r3, r2 8005d0e: d012 beq.n 8005d36 8005d10: 687b ldr r3, [r7, #4] 8005d12: 681b ldr r3, [r3, #0] 8005d14: 4a60 ldr r2, [pc, #384] @ (8005e98 ) 8005d16: 4293 cmp r3, r2 8005d18: d00a beq.n 8005d30 8005d1a: 687b ldr r3, [r7, #4] 8005d1c: 681b ldr r3, [r3, #0] 8005d1e: 4a5f ldr r2, [pc, #380] @ (8005e9c ) 8005d20: 4293 cmp r3, r2 8005d22: d102 bne.n 8005d2a 8005d24: f44f 0380 mov.w r3, #4194304 @ 0x400000 8005d28: e00e b.n 8005d48 8005d2a: f04f 6380 mov.w r3, #67108864 @ 0x4000000 8005d2e: e00b b.n 8005d48 8005d30: f44f 2380 mov.w r3, #262144 @ 0x40000 8005d34: e008 b.n 8005d48 8005d36: f44f 4380 mov.w r3, #16384 @ 0x4000 8005d3a: e005 b.n 8005d48 8005d3c: f44f 6380 mov.w r3, #1024 @ 0x400 8005d40: e002 b.n 8005d48 8005d42: 2340 movs r3, #64 @ 0x40 8005d44: e000 b.n 8005d48 8005d46: 2304 movs r3, #4 8005d48: 4a55 ldr r2, [pc, #340] @ (8005ea0 ) 8005d4a: 6053 str r3, [r2, #4] /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) 8005d4c: 687b ldr r3, [r7, #4] 8005d4e: 6adb ldr r3, [r3, #44] @ 0x2c 8005d50: 2b00 cmp r3, #0 8005d52: f000 8094 beq.w 8005e7e { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); 8005d56: 687b ldr r3, [r7, #4] 8005d58: 6adb ldr r3, [r3, #44] @ 0x2c 8005d5a: 6878 ldr r0, [r7, #4] 8005d5c: 4798 blx r3 if(hdma->XferHalfCpltCallback != NULL) 8005d5e: e08e b.n 8005e7e } } /* Transfer Complete Interrupt management ***********************************/ else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8005d60: 687b ldr r3, [r7, #4] 8005d62: 6c1b ldr r3, [r3, #64] @ 0x40 8005d64: 2202 movs r2, #2 8005d66: 409a lsls r2, r3 8005d68: 68fb ldr r3, [r7, #12] 8005d6a: 4013 ands r3, r2 8005d6c: 2b00 cmp r3, #0 8005d6e: d056 beq.n 8005e1e 8005d70: 68bb ldr r3, [r7, #8] 8005d72: f003 0302 and.w r3, r3, #2 8005d76: 2b00 cmp r3, #0 8005d78: d051 beq.n 8005e1e { if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8005d7a: 687b ldr r3, [r7, #4] 8005d7c: 681b ldr r3, [r3, #0] 8005d7e: 681b ldr r3, [r3, #0] 8005d80: f003 0320 and.w r3, r3, #32 8005d84: 2b00 cmp r3, #0 8005d86: d10b bne.n 8005da0 { /* Disable the transfer complete and error interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8005d88: 687b ldr r3, [r7, #4] 8005d8a: 681b ldr r3, [r3, #0] 8005d8c: 681a ldr r2, [r3, #0] 8005d8e: 687b ldr r3, [r7, #4] 8005d90: 681b ldr r3, [r3, #0] 8005d92: f022 020a bic.w r2, r2, #10 8005d96: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8005d98: 687b ldr r3, [r7, #4] 8005d9a: 2201 movs r2, #1 8005d9c: f883 2021 strb.w r2, [r3, #33] @ 0x21 } /* Clear the transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8005da0: 687b ldr r3, [r7, #4] 8005da2: 681b ldr r3, [r3, #0] 8005da4: 4a38 ldr r2, [pc, #224] @ (8005e88 ) 8005da6: 4293 cmp r3, r2 8005da8: d029 beq.n 8005dfe 8005daa: 687b ldr r3, [r7, #4] 8005dac: 681b ldr r3, [r3, #0] 8005dae: 4a37 ldr r2, [pc, #220] @ (8005e8c ) 8005db0: 4293 cmp r3, r2 8005db2: d022 beq.n 8005dfa 8005db4: 687b ldr r3, [r7, #4] 8005db6: 681b ldr r3, [r3, #0] 8005db8: 4a35 ldr r2, [pc, #212] @ (8005e90 ) 8005dba: 4293 cmp r3, r2 8005dbc: d01a beq.n 8005df4 8005dbe: 687b ldr r3, [r7, #4] 8005dc0: 681b ldr r3, [r3, #0] 8005dc2: 4a34 ldr r2, [pc, #208] @ (8005e94 ) 8005dc4: 4293 cmp r3, r2 8005dc6: d012 beq.n 8005dee 8005dc8: 687b ldr r3, [r7, #4] 8005dca: 681b ldr r3, [r3, #0] 8005dcc: 4a32 ldr r2, [pc, #200] @ (8005e98 ) 8005dce: 4293 cmp r3, r2 8005dd0: d00a beq.n 8005de8 8005dd2: 687b ldr r3, [r7, #4] 8005dd4: 681b ldr r3, [r3, #0] 8005dd6: 4a31 ldr r2, [pc, #196] @ (8005e9c ) 8005dd8: 4293 cmp r3, r2 8005dda: d102 bne.n 8005de2 8005ddc: f44f 1300 mov.w r3, #2097152 @ 0x200000 8005de0: e00e b.n 8005e00 8005de2: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8005de6: e00b b.n 8005e00 8005de8: f44f 3300 mov.w r3, #131072 @ 0x20000 8005dec: e008 b.n 8005e00 8005dee: f44f 5300 mov.w r3, #8192 @ 0x2000 8005df2: e005 b.n 8005e00 8005df4: f44f 7300 mov.w r3, #512 @ 0x200 8005df8: e002 b.n 8005e00 8005dfa: 2320 movs r3, #32 8005dfc: e000 b.n 8005e00 8005dfe: 2302 movs r3, #2 8005e00: 4a27 ldr r2, [pc, #156] @ (8005ea0 ) 8005e02: 6053 str r3, [r2, #4] /* Process Unlocked */ __HAL_UNLOCK(hdma); 8005e04: 687b ldr r3, [r7, #4] 8005e06: 2200 movs r2, #0 8005e08: f883 2020 strb.w r2, [r3, #32] if(hdma->XferCpltCallback != NULL) 8005e0c: 687b ldr r3, [r7, #4] 8005e0e: 6a9b ldr r3, [r3, #40] @ 0x28 8005e10: 2b00 cmp r3, #0 8005e12: d034 beq.n 8005e7e { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); 8005e14: 687b ldr r3, [r7, #4] 8005e16: 6a9b ldr r3, [r3, #40] @ 0x28 8005e18: 6878 ldr r0, [r7, #4] 8005e1a: 4798 blx r3 if(hdma->XferCpltCallback != NULL) 8005e1c: e02f b.n 8005e7e } } /* Transfer Error Interrupt management **************************************/ else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8005e1e: 687b ldr r3, [r7, #4] 8005e20: 6c1b ldr r3, [r3, #64] @ 0x40 8005e22: 2208 movs r2, #8 8005e24: 409a lsls r2, r3 8005e26: 68fb ldr r3, [r7, #12] 8005e28: 4013 ands r3, r2 8005e2a: 2b00 cmp r3, #0 8005e2c: d028 beq.n 8005e80 8005e2e: 68bb ldr r3, [r7, #8] 8005e30: f003 0308 and.w r3, r3, #8 8005e34: 2b00 cmp r3, #0 8005e36: d023 beq.n 8005e80 { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8005e38: 687b ldr r3, [r7, #4] 8005e3a: 681b ldr r3, [r3, #0] 8005e3c: 681a ldr r2, [r3, #0] 8005e3e: 687b ldr r3, [r7, #4] 8005e40: 681b ldr r3, [r3, #0] 8005e42: f022 020e bic.w r2, r2, #14 8005e46: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8005e48: 687b ldr r3, [r7, #4] 8005e4a: 6c1a ldr r2, [r3, #64] @ 0x40 8005e4c: 687b ldr r3, [r7, #4] 8005e4e: 6bdb ldr r3, [r3, #60] @ 0x3c 8005e50: 2101 movs r1, #1 8005e52: fa01 f202 lsl.w r2, r1, r2 8005e56: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; 8005e58: 687b ldr r3, [r7, #4] 8005e5a: 2201 movs r2, #1 8005e5c: 639a str r2, [r3, #56] @ 0x38 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8005e5e: 687b ldr r3, [r7, #4] 8005e60: 2201 movs r2, #1 8005e62: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8005e66: 687b ldr r3, [r7, #4] 8005e68: 2200 movs r2, #0 8005e6a: f883 2020 strb.w r2, [r3, #32] if (hdma->XferErrorCallback != NULL) 8005e6e: 687b ldr r3, [r7, #4] 8005e70: 6b1b ldr r3, [r3, #48] @ 0x30 8005e72: 2b00 cmp r3, #0 8005e74: d004 beq.n 8005e80 { /* Transfer error callback */ hdma->XferErrorCallback(hdma); 8005e76: 687b ldr r3, [r7, #4] 8005e78: 6b1b ldr r3, [r3, #48] @ 0x30 8005e7a: 6878 ldr r0, [r7, #4] 8005e7c: 4798 blx r3 } } return; 8005e7e: bf00 nop 8005e80: bf00 nop } 8005e82: 3710 adds r7, #16 8005e84: 46bd mov sp, r7 8005e86: bd80 pop {r7, pc} 8005e88: 40020008 .word 0x40020008 8005e8c: 4002001c .word 0x4002001c 8005e90: 40020030 .word 0x40020030 8005e94: 40020044 .word 0x40020044 8005e98: 40020058 .word 0x40020058 8005e9c: 4002006c .word 0x4002006c 8005ea0: 40020000 .word 0x40020000 08005ea4 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8005ea4: b480 push {r7} 8005ea6: b085 sub sp, #20 8005ea8: af00 add r7, sp, #0 8005eaa: 60f8 str r0, [r7, #12] 8005eac: 60b9 str r1, [r7, #8] 8005eae: 607a str r2, [r7, #4] 8005eb0: 603b str r3, [r7, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8005eb2: 68fb ldr r3, [r7, #12] 8005eb4: 6c1a ldr r2, [r3, #64] @ 0x40 8005eb6: 68fb ldr r3, [r7, #12] 8005eb8: 6bdb ldr r3, [r3, #60] @ 0x3c 8005eba: 2101 movs r1, #1 8005ebc: fa01 f202 lsl.w r2, r1, r2 8005ec0: 605a str r2, [r3, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8005ec2: 68fb ldr r3, [r7, #12] 8005ec4: 681b ldr r3, [r3, #0] 8005ec6: 683a ldr r2, [r7, #0] 8005ec8: 605a str r2, [r3, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8005eca: 68fb ldr r3, [r7, #12] 8005ecc: 685b ldr r3, [r3, #4] 8005ece: 2b10 cmp r3, #16 8005ed0: d108 bne.n 8005ee4 { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8005ed2: 68fb ldr r3, [r7, #12] 8005ed4: 681b ldr r3, [r3, #0] 8005ed6: 687a ldr r2, [r7, #4] 8005ed8: 609a str r2, [r3, #8] /* Configure DMA Channel source address */ hdma->Instance->CMAR = SrcAddress; 8005eda: 68fb ldr r3, [r7, #12] 8005edc: 681b ldr r3, [r3, #0] 8005ede: 68ba ldr r2, [r7, #8] 8005ee0: 60da str r2, [r3, #12] hdma->Instance->CPAR = SrcAddress; /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; } } 8005ee2: e007 b.n 8005ef4 hdma->Instance->CPAR = SrcAddress; 8005ee4: 68fb ldr r3, [r7, #12] 8005ee6: 681b ldr r3, [r3, #0] 8005ee8: 68ba ldr r2, [r7, #8] 8005eea: 609a str r2, [r3, #8] hdma->Instance->CMAR = DstAddress; 8005eec: 68fb ldr r3, [r7, #12] 8005eee: 681b ldr r3, [r3, #0] 8005ef0: 687a ldr r2, [r7, #4] 8005ef2: 60da str r2, [r3, #12] } 8005ef4: bf00 nop 8005ef6: 3714 adds r7, #20 8005ef8: 46bd mov sp, r7 8005efa: bc80 pop {r7} 8005efc: 4770 bx lr ... 08005f00 : * @param Data: Specifies the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { 8005f00: b5f0 push {r4, r5, r6, r7, lr} 8005f02: b087 sub sp, #28 8005f04: af00 add r7, sp, #0 8005f06: 60f8 str r0, [r7, #12] 8005f08: 60b9 str r1, [r7, #8] 8005f0a: e9c7 2300 strd r2, r3, [r7] HAL_StatusTypeDef status = HAL_ERROR; 8005f0e: 2301 movs r3, #1 8005f10: 75fb strb r3, [r7, #23] uint8_t index = 0; 8005f12: 2300 movs r3, #0 8005f14: 75bb strb r3, [r7, #22] uint8_t nbiterations = 0; 8005f16: 2300 movs r3, #0 8005f18: 757b strb r3, [r7, #21] /* Process Locked */ __HAL_LOCK(&pFlash); 8005f1a: 4b2f ldr r3, [pc, #188] @ (8005fd8 ) 8005f1c: 7e1b ldrb r3, [r3, #24] 8005f1e: 2b01 cmp r3, #1 8005f20: d101 bne.n 8005f26 8005f22: 2302 movs r3, #2 8005f24: e054 b.n 8005fd0 8005f26: 4b2c ldr r3, [pc, #176] @ (8005fd8 ) 8005f28: 2201 movs r2, #1 8005f2a: 761a strb r2, [r3, #24] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8005f2c: f24c 3050 movw r0, #50000 @ 0xc350 8005f30: f000 f8a8 bl 8006084 8005f34: 4603 mov r3, r0 8005f36: 75fb strb r3, [r7, #23] /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE); } #endif /* FLASH_BANK2_END */ if(status == HAL_OK) 8005f38: 7dfb ldrb r3, [r7, #23] 8005f3a: 2b00 cmp r3, #0 8005f3c: d144 bne.n 8005fc8 { if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8005f3e: 68fb ldr r3, [r7, #12] 8005f40: 2b01 cmp r3, #1 8005f42: d102 bne.n 8005f4a { /* Program halfword (16-bit) at a specified address. */ nbiterations = 1U; 8005f44: 2301 movs r3, #1 8005f46: 757b strb r3, [r7, #21] 8005f48: e007 b.n 8005f5a } else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) 8005f4a: 68fb ldr r3, [r7, #12] 8005f4c: 2b02 cmp r3, #2 8005f4e: d102 bne.n 8005f56 { /* Program word (32-bit = 2*16-bit) at a specified address. */ nbiterations = 2U; 8005f50: 2302 movs r3, #2 8005f52: 757b strb r3, [r7, #21] 8005f54: e001 b.n 8005f5a } else { /* Program double word (64-bit = 4*16-bit) at a specified address. */ nbiterations = 4U; 8005f56: 2304 movs r3, #4 8005f58: 757b strb r3, [r7, #21] } for (index = 0U; index < nbiterations; index++) 8005f5a: 2300 movs r3, #0 8005f5c: 75bb strb r3, [r7, #22] 8005f5e: e02d b.n 8005fbc { FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8005f60: 7dbb ldrb r3, [r7, #22] 8005f62: 005a lsls r2, r3, #1 8005f64: 68bb ldr r3, [r7, #8] 8005f66: eb02 0c03 add.w ip, r2, r3 8005f6a: 7dbb ldrb r3, [r7, #22] 8005f6c: 0119 lsls r1, r3, #4 8005f6e: e9d7 2300 ldrd r2, r3, [r7] 8005f72: f1c1 0620 rsb r6, r1, #32 8005f76: f1a1 0020 sub.w r0, r1, #32 8005f7a: fa22 f401 lsr.w r4, r2, r1 8005f7e: fa03 f606 lsl.w r6, r3, r6 8005f82: 4334 orrs r4, r6 8005f84: fa23 f000 lsr.w r0, r3, r0 8005f88: 4304 orrs r4, r0 8005f8a: fa23 f501 lsr.w r5, r3, r1 8005f8e: b2a3 uxth r3, r4 8005f90: 4619 mov r1, r3 8005f92: 4660 mov r0, ip 8005f94: f000 f85a bl 800604c #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8005f98: f24c 3050 movw r0, #50000 @ 0xc350 8005f9c: f000 f872 bl 8006084 8005fa0: 4603 mov r3, r0 8005fa2: 75fb strb r3, [r7, #23] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 8005fa4: 4b0d ldr r3, [pc, #52] @ (8005fdc ) 8005fa6: 691b ldr r3, [r3, #16] 8005fa8: 4a0c ldr r2, [pc, #48] @ (8005fdc ) 8005faa: f023 0301 bic.w r3, r3, #1 8005fae: 6113 str r3, [r2, #16] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* In case of error, stop programation procedure */ if (status != HAL_OK) 8005fb0: 7dfb ldrb r3, [r7, #23] 8005fb2: 2b00 cmp r3, #0 8005fb4: d107 bne.n 8005fc6 for (index = 0U; index < nbiterations; index++) 8005fb6: 7dbb ldrb r3, [r7, #22] 8005fb8: 3301 adds r3, #1 8005fba: 75bb strb r3, [r7, #22] 8005fbc: 7dba ldrb r2, [r7, #22] 8005fbe: 7d7b ldrb r3, [r7, #21] 8005fc0: 429a cmp r2, r3 8005fc2: d3cd bcc.n 8005f60 8005fc4: e000 b.n 8005fc8 { break; 8005fc6: bf00 nop } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 8005fc8: 4b03 ldr r3, [pc, #12] @ (8005fd8 ) 8005fca: 2200 movs r2, #0 8005fcc: 761a strb r2, [r3, #24] return status; 8005fce: 7dfb ldrb r3, [r7, #23] } 8005fd0: 4618 mov r0, r3 8005fd2: 371c adds r7, #28 8005fd4: 46bd mov sp, r7 8005fd6: bdf0 pop {r4, r5, r6, r7, pc} 8005fd8: 20000478 .word 0x20000478 8005fdc: 40022000 .word 0x40022000 08005fe0 : /** * @brief Unlock the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Unlock(void) { 8005fe0: b480 push {r7} 8005fe2: b083 sub sp, #12 8005fe4: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 8005fe6: 2300 movs r3, #0 8005fe8: 71fb strb r3, [r7, #7] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8005fea: 4b0d ldr r3, [pc, #52] @ (8006020 ) 8005fec: 691b ldr r3, [r3, #16] 8005fee: f003 0380 and.w r3, r3, #128 @ 0x80 8005ff2: 2b00 cmp r3, #0 8005ff4: d00d beq.n 8006012 { /* Authorize the FLASH Registers access */ WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8005ff6: 4b0a ldr r3, [pc, #40] @ (8006020 ) 8005ff8: 4a0a ldr r2, [pc, #40] @ (8006024 ) 8005ffa: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 8005ffc: 4b08 ldr r3, [pc, #32] @ (8006020 ) 8005ffe: 4a0a ldr r2, [pc, #40] @ (8006028 ) 8006000: 605a str r2, [r3, #4] /* Verify Flash is unlocked */ if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8006002: 4b07 ldr r3, [pc, #28] @ (8006020 ) 8006004: 691b ldr r3, [r3, #16] 8006006: f003 0380 and.w r3, r3, #128 @ 0x80 800600a: 2b00 cmp r3, #0 800600c: d001 beq.n 8006012 { status = HAL_ERROR; 800600e: 2301 movs r3, #1 8006010: 71fb strb r3, [r7, #7] status = HAL_ERROR; } } #endif /* FLASH_BANK2_END */ return status; 8006012: 79fb ldrb r3, [r7, #7] } 8006014: 4618 mov r0, r3 8006016: 370c adds r7, #12 8006018: 46bd mov sp, r7 800601a: bc80 pop {r7} 800601c: 4770 bx lr 800601e: bf00 nop 8006020: 40022000 .word 0x40022000 8006024: 45670123 .word 0x45670123 8006028: cdef89ab .word 0xcdef89ab 0800602c : /** * @brief Locks the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Lock(void) { 800602c: b480 push {r7} 800602e: af00 add r7, sp, #0 /* Set the LOCK Bit to lock the FLASH Registers access */ SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8006030: 4b05 ldr r3, [pc, #20] @ (8006048 ) 8006032: 691b ldr r3, [r3, #16] 8006034: 4a04 ldr r2, [pc, #16] @ (8006048 ) 8006036: f043 0380 orr.w r3, r3, #128 @ 0x80 800603a: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) /* Set the LOCK Bit to lock the FLASH BANK2 Registers access */ SET_BIT(FLASH->CR2, FLASH_CR2_LOCK); #endif /* FLASH_BANK2_END */ return HAL_OK; 800603c: 2300 movs r3, #0 } 800603e: 4618 mov r0, r3 8006040: 46bd mov sp, r7 8006042: bc80 pop {r7} 8006044: 4770 bx lr 8006046: bf00 nop 8006048: 40022000 .word 0x40022000 0800604c : * @param Address specify the address to be programmed. * @param Data specify the data to be programmed. * @retval None */ static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) { 800604c: b480 push {r7} 800604e: b083 sub sp, #12 8006050: af00 add r7, sp, #0 8006052: 6078 str r0, [r7, #4] 8006054: 460b mov r3, r1 8006056: 807b strh r3, [r7, #2] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8006058: 4b08 ldr r3, [pc, #32] @ (800607c ) 800605a: 2200 movs r2, #0 800605c: 61da str r2, [r3, #28] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Proceed to program the new data */ SET_BIT(FLASH->CR, FLASH_CR_PG); 800605e: 4b08 ldr r3, [pc, #32] @ (8006080 ) 8006060: 691b ldr r3, [r3, #16] 8006062: 4a07 ldr r2, [pc, #28] @ (8006080 ) 8006064: f043 0301 orr.w r3, r3, #1 8006068: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* Write data in the address */ *(__IO uint16_t*)Address = Data; 800606a: 687b ldr r3, [r7, #4] 800606c: 887a ldrh r2, [r7, #2] 800606e: 801a strh r2, [r3, #0] } 8006070: bf00 nop 8006072: 370c adds r7, #12 8006074: 46bd mov sp, r7 8006076: bc80 pop {r7} 8006078: 4770 bx lr 800607a: bf00 nop 800607c: 20000478 .word 0x20000478 8006080: 40022000 .word 0x40022000 08006084 : * @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operation timeout * @retval HAL Status */ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) { 8006084: b580 push {r7, lr} 8006086: b084 sub sp, #16 8006088: af00 add r7, sp, #0 800608a: 6078 str r0, [r7, #4] /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. Even if the FLASH operation fails, the BUSY flag will be reset and an error flag will be set */ uint32_t tickstart = HAL_GetTick(); 800608c: f7ff f860 bl 8005150 8006090: 60f8 str r0, [r7, #12] while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8006092: e010 b.n 80060b6 { if (Timeout != HAL_MAX_DELAY) 8006094: 687b ldr r3, [r7, #4] 8006096: f1b3 3fff cmp.w r3, #4294967295 800609a: d00c beq.n 80060b6 { if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 800609c: 687b ldr r3, [r7, #4] 800609e: 2b00 cmp r3, #0 80060a0: d007 beq.n 80060b2 80060a2: f7ff f855 bl 8005150 80060a6: 4602 mov r2, r0 80060a8: 68fb ldr r3, [r7, #12] 80060aa: 1ad3 subs r3, r2, r3 80060ac: 687a ldr r2, [r7, #4] 80060ae: 429a cmp r2, r3 80060b0: d201 bcs.n 80060b6 { return HAL_TIMEOUT; 80060b2: 2303 movs r3, #3 80060b4: e025 b.n 8006102 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80060b6: 4b15 ldr r3, [pc, #84] @ (800610c ) 80060b8: 68db ldr r3, [r3, #12] 80060ba: f003 0301 and.w r3, r3, #1 80060be: 2b00 cmp r3, #0 80060c0: d1e8 bne.n 8006094 } } } /* Check FLASH End of Operation flag */ if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 80060c2: 4b12 ldr r3, [pc, #72] @ (800610c ) 80060c4: 68db ldr r3, [r3, #12] 80060c6: f003 0320 and.w r3, r3, #32 80060ca: 2b00 cmp r3, #0 80060cc: d002 beq.n 80060d4 { /* Clear FLASH End of Operation pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 80060ce: 4b0f ldr r3, [pc, #60] @ (800610c ) 80060d0: 2220 movs r2, #32 80060d2: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80060d4: 4b0d ldr r3, [pc, #52] @ (800610c ) 80060d6: 68db ldr r3, [r3, #12] 80060d8: f003 0310 and.w r3, r3, #16 80060dc: 2b00 cmp r3, #0 80060de: d10b bne.n 80060f8 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80060e0: 4b0a ldr r3, [pc, #40] @ (800610c ) 80060e2: 69db ldr r3, [r3, #28] 80060e4: f003 0301 and.w r3, r3, #1 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80060e8: 2b00 cmp r3, #0 80060ea: d105 bne.n 80060f8 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80060ec: 4b07 ldr r3, [pc, #28] @ (800610c ) 80060ee: 68db ldr r3, [r3, #12] 80060f0: f003 0304 and.w r3, r3, #4 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80060f4: 2b00 cmp r3, #0 80060f6: d003 beq.n 8006100 { /*Save the error code*/ FLASH_SetErrorCode(); 80060f8: f000 f80a bl 8006110 return HAL_ERROR; 80060fc: 2301 movs r3, #1 80060fe: e000 b.n 8006102 } /* There is no error flag set */ return HAL_OK; 8006100: 2300 movs r3, #0 } 8006102: 4618 mov r0, r3 8006104: 3710 adds r7, #16 8006106: 46bd mov sp, r7 8006108: bd80 pop {r7, pc} 800610a: bf00 nop 800610c: 40022000 .word 0x40022000 08006110 : /** * @brief Set the specific FLASH error flag. * @retval None */ static void FLASH_SetErrorCode(void) { 8006110: b480 push {r7} 8006112: b083 sub sp, #12 8006114: af00 add r7, sp, #0 uint32_t flags = 0U; 8006116: 2300 movs r3, #0 8006118: 607b str r3, [r7, #4] #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800611a: 4b23 ldr r3, [pc, #140] @ (80061a8 ) 800611c: 68db ldr r3, [r3, #12] 800611e: f003 0310 and.w r3, r3, #16 8006122: 2b00 cmp r3, #0 8006124: d009 beq.n 800613a #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 8006126: 4b21 ldr r3, [pc, #132] @ (80061ac ) 8006128: 69db ldr r3, [r3, #28] 800612a: f043 0302 orr.w r3, r3, #2 800612e: 4a1f ldr r2, [pc, #124] @ (80061ac ) 8006130: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8006132: 687b ldr r3, [r7, #4] 8006134: f043 0310 orr.w r3, r3, #16 8006138: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 800613a: 4b1b ldr r3, [pc, #108] @ (80061a8 ) 800613c: 68db ldr r3, [r3, #12] 800613e: f003 0304 and.w r3, r3, #4 8006142: 2b00 cmp r3, #0 8006144: d009 beq.n 800615a #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 8006146: 4b19 ldr r3, [pc, #100] @ (80061ac ) 8006148: 69db ldr r3, [r3, #28] 800614a: f043 0301 orr.w r3, r3, #1 800614e: 4a17 ldr r2, [pc, #92] @ (80061ac ) 8006150: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 8006152: 687b ldr r3, [r7, #4] 8006154: f043 0304 orr.w r3, r3, #4 8006158: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 800615a: 4b13 ldr r3, [pc, #76] @ (80061a8 ) 800615c: 69db ldr r3, [r3, #28] 800615e: f003 0301 and.w r3, r3, #1 8006162: 2b00 cmp r3, #0 8006164: d00b beq.n 800617e { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 8006166: 4b11 ldr r3, [pc, #68] @ (80061ac ) 8006168: 69db ldr r3, [r3, #28] 800616a: f043 0304 orr.w r3, r3, #4 800616e: 4a0f ldr r2, [pc, #60] @ (80061ac ) 8006170: 61d3 str r3, [r2, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 8006172: 4b0d ldr r3, [pc, #52] @ (80061a8 ) 8006174: 69db ldr r3, [r3, #28] 8006176: 4a0c ldr r2, [pc, #48] @ (80061a8 ) 8006178: f023 0301 bic.w r3, r3, #1 800617c: 61d3 str r3, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 800617e: 687b ldr r3, [r7, #4] 8006180: f240 1201 movw r2, #257 @ 0x101 8006184: 4293 cmp r3, r2 8006186: d106 bne.n 8006196 8006188: 4b07 ldr r3, [pc, #28] @ (80061a8 ) 800618a: 69db ldr r3, [r3, #28] 800618c: 4a06 ldr r2, [pc, #24] @ (80061a8 ) 800618e: f023 0301 bic.w r3, r3, #1 8006192: 61d3 str r3, [r2, #28] } 8006194: e002 b.n 800619c __HAL_FLASH_CLEAR_FLAG(flags); 8006196: 4a04 ldr r2, [pc, #16] @ (80061a8 ) 8006198: 687b ldr r3, [r7, #4] 800619a: 60d3 str r3, [r2, #12] } 800619c: bf00 nop 800619e: 370c adds r7, #12 80061a0: 46bd mov sp, r7 80061a2: bc80 pop {r7} 80061a4: 4770 bx lr 80061a6: bf00 nop 80061a8: 40022000 .word 0x40022000 80061ac: 20000478 .word 0x20000478 080061b0 : * (0xFFFFFFFF means that all the pages have been correctly erased) * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { 80061b0: b580 push {r7, lr} 80061b2: b084 sub sp, #16 80061b4: af00 add r7, sp, #0 80061b6: 6078 str r0, [r7, #4] 80061b8: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_ERROR; 80061ba: 2301 movs r3, #1 80061bc: 73fb strb r3, [r7, #15] uint32_t address = 0U; 80061be: 2300 movs r3, #0 80061c0: 60bb str r3, [r7, #8] /* Process Locked */ __HAL_LOCK(&pFlash); 80061c2: 4b2f ldr r3, [pc, #188] @ (8006280 ) 80061c4: 7e1b ldrb r3, [r3, #24] 80061c6: 2b01 cmp r3, #1 80061c8: d101 bne.n 80061ce 80061ca: 2302 movs r3, #2 80061cc: e053 b.n 8006276 80061ce: 4b2c ldr r3, [pc, #176] @ (8006280 ) 80061d0: 2201 movs r2, #1 80061d2: 761a strb r2, [r3, #24] /* Check the parameters */ assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 80061d4: 687b ldr r3, [r7, #4] 80061d6: 681b ldr r3, [r3, #0] 80061d8: 2b02 cmp r3, #2 80061da: d116 bne.n 800620a else #endif /* FLASH_BANK2_END */ { /* Mass Erase requested for Bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80061dc: f24c 3050 movw r0, #50000 @ 0xc350 80061e0: f7ff ff50 bl 8006084 80061e4: 4603 mov r3, r0 80061e6: 2b00 cmp r3, #0 80061e8: d141 bne.n 800626e { /*Mass erase to be done*/ FLASH_MassErase(FLASH_BANK_1); 80061ea: 2001 movs r0, #1 80061ec: f000 f84c bl 8006288 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80061f0: f24c 3050 movw r0, #50000 @ 0xc350 80061f4: f7ff ff46 bl 8006084 80061f8: 4603 mov r3, r0 80061fa: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the MER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 80061fc: 4b21 ldr r3, [pc, #132] @ (8006284 ) 80061fe: 691b ldr r3, [r3, #16] 8006200: 4a20 ldr r2, [pc, #128] @ (8006284 ) 8006202: f023 0304 bic.w r3, r3, #4 8006206: 6113 str r3, [r2, #16] 8006208: e031 b.n 800626e else #endif /* FLASH_BANK2_END */ { /* Page Erase requested on address located on bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800620a: f24c 3050 movw r0, #50000 @ 0xc350 800620e: f7ff ff39 bl 8006084 8006212: 4603 mov r3, r0 8006214: 2b00 cmp r3, #0 8006216: d12a bne.n 800626e { /*Initialization of PageError variable*/ *PageError = 0xFFFFFFFFU; 8006218: 683b ldr r3, [r7, #0] 800621a: f04f 32ff mov.w r2, #4294967295 800621e: 601a str r2, [r3, #0] /* Erase page by page to be done*/ for(address = pEraseInit->PageAddress; 8006220: 687b ldr r3, [r7, #4] 8006222: 689b ldr r3, [r3, #8] 8006224: 60bb str r3, [r7, #8] 8006226: e019 b.n 800625c address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); address += FLASH_PAGE_SIZE) { FLASH_PageErase(address); 8006228: 68b8 ldr r0, [r7, #8] 800622a: f000 f849 bl 80062c0 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 800622e: f24c 3050 movw r0, #50000 @ 0xc350 8006232: f7ff ff27 bl 8006084 8006236: 4603 mov r3, r0 8006238: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the PER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 800623a: 4b12 ldr r3, [pc, #72] @ (8006284 ) 800623c: 691b ldr r3, [r3, #16] 800623e: 4a11 ldr r2, [pc, #68] @ (8006284 ) 8006240: f023 0302 bic.w r3, r3, #2 8006244: 6113 str r3, [r2, #16] if (status != HAL_OK) 8006246: 7bfb ldrb r3, [r7, #15] 8006248: 2b00 cmp r3, #0 800624a: d003 beq.n 8006254 { /* In case of error, stop erase procedure and return the faulty address */ *PageError = address; 800624c: 683b ldr r3, [r7, #0] 800624e: 68ba ldr r2, [r7, #8] 8006250: 601a str r2, [r3, #0] break; 8006252: e00c b.n 800626e address += FLASH_PAGE_SIZE) 8006254: 68bb ldr r3, [r7, #8] 8006256: f503 6380 add.w r3, r3, #1024 @ 0x400 800625a: 60bb str r3, [r7, #8] address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 800625c: 687b ldr r3, [r7, #4] 800625e: 68db ldr r3, [r3, #12] 8006260: 029a lsls r2, r3, #10 8006262: 687b ldr r3, [r7, #4] 8006264: 689b ldr r3, [r3, #8] 8006266: 4413 add r3, r2 8006268: 68ba ldr r2, [r7, #8] 800626a: 429a cmp r2, r3 800626c: d3dc bcc.n 8006228 } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 800626e: 4b04 ldr r3, [pc, #16] @ (8006280 ) 8006270: 2200 movs r2, #0 8006272: 761a strb r2, [r3, #24] return status; 8006274: 7bfb ldrb r3, [r7, #15] } 8006276: 4618 mov r0, r3 8006278: 3710 adds r7, #16 800627a: 46bd mov sp, r7 800627c: bd80 pop {r7, pc} 800627e: bf00 nop 8006280: 20000478 .word 0x20000478 8006284: 40022000 .word 0x40022000 08006288 : @endif * * @retval None */ static void FLASH_MassErase(uint32_t Banks) { 8006288: b480 push {r7} 800628a: b083 sub sp, #12 800628c: af00 add r7, sp, #0 800628e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8006290: 4b09 ldr r3, [pc, #36] @ (80062b8 ) 8006292: 2200 movs r2, #0 8006294: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 8006296: 4b09 ldr r3, [pc, #36] @ (80062bc ) 8006298: 691b ldr r3, [r3, #16] 800629a: 4a08 ldr r2, [pc, #32] @ (80062bc ) 800629c: f043 0304 orr.w r3, r3, #4 80062a0: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80062a2: 4b06 ldr r3, [pc, #24] @ (80062bc ) 80062a4: 691b ldr r3, [r3, #16] 80062a6: 4a05 ldr r2, [pc, #20] @ (80062bc ) 80062a8: f043 0340 orr.w r3, r3, #64 @ 0x40 80062ac: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 80062ae: bf00 nop 80062b0: 370c adds r7, #12 80062b2: 46bd mov sp, r7 80062b4: bc80 pop {r7} 80062b6: 4770 bx lr 80062b8: 20000478 .word 0x20000478 80062bc: 40022000 .word 0x40022000 080062c0 : * The value of this parameter depend on device used within the same series * * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { 80062c0: b480 push {r7} 80062c2: b083 sub sp, #12 80062c4: af00 add r7, sp, #0 80062c6: 6078 str r0, [r7, #4] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80062c8: 4b0b ldr r3, [pc, #44] @ (80062f8 ) 80062ca: 2200 movs r2, #0 80062cc: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 80062ce: 4b0b ldr r3, [pc, #44] @ (80062fc ) 80062d0: 691b ldr r3, [r3, #16] 80062d2: 4a0a ldr r2, [pc, #40] @ (80062fc ) 80062d4: f043 0302 orr.w r3, r3, #2 80062d8: 6113 str r3, [r2, #16] WRITE_REG(FLASH->AR, PageAddress); 80062da: 4a08 ldr r2, [pc, #32] @ (80062fc ) 80062dc: 687b ldr r3, [r7, #4] 80062de: 6153 str r3, [r2, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80062e0: 4b06 ldr r3, [pc, #24] @ (80062fc ) 80062e2: 691b ldr r3, [r3, #16] 80062e4: 4a05 ldr r2, [pc, #20] @ (80062fc ) 80062e6: f043 0340 orr.w r3, r3, #64 @ 0x40 80062ea: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 80062ec: bf00 nop 80062ee: 370c adds r7, #12 80062f0: 46bd mov sp, r7 80062f2: bc80 pop {r7} 80062f4: 4770 bx lr 80062f6: bf00 nop 80062f8: 20000478 .word 0x20000478 80062fc: 40022000 .word 0x40022000 08006300 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8006300: b480 push {r7} 8006302: b08b sub sp, #44 @ 0x2c 8006304: af00 add r7, sp, #0 8006306: 6078 str r0, [r7, #4] 8006308: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 800630a: 2300 movs r3, #0 800630c: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 800630e: 2300 movs r3, #0 8006310: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8006312: e169 b.n 80065e8 { /* Get the IO position */ ioposition = (0x01uL << position); 8006314: 2201 movs r2, #1 8006316: 6a7b ldr r3, [r7, #36] @ 0x24 8006318: fa02 f303 lsl.w r3, r2, r3 800631c: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 800631e: 683b ldr r3, [r7, #0] 8006320: 681b ldr r3, [r3, #0] 8006322: 69fa ldr r2, [r7, #28] 8006324: 4013 ands r3, r2 8006326: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 8006328: 69ba ldr r2, [r7, #24] 800632a: 69fb ldr r3, [r7, #28] 800632c: 429a cmp r2, r3 800632e: f040 8158 bne.w 80065e2 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 8006332: 683b ldr r3, [r7, #0] 8006334: 685b ldr r3, [r3, #4] 8006336: 4a9a ldr r2, [pc, #616] @ (80065a0 ) 8006338: 4293 cmp r3, r2 800633a: d05e beq.n 80063fa 800633c: 4a98 ldr r2, [pc, #608] @ (80065a0 ) 800633e: 4293 cmp r3, r2 8006340: d875 bhi.n 800642e 8006342: 4a98 ldr r2, [pc, #608] @ (80065a4 ) 8006344: 4293 cmp r3, r2 8006346: d058 beq.n 80063fa 8006348: 4a96 ldr r2, [pc, #600] @ (80065a4 ) 800634a: 4293 cmp r3, r2 800634c: d86f bhi.n 800642e 800634e: 4a96 ldr r2, [pc, #600] @ (80065a8 ) 8006350: 4293 cmp r3, r2 8006352: d052 beq.n 80063fa 8006354: 4a94 ldr r2, [pc, #592] @ (80065a8 ) 8006356: 4293 cmp r3, r2 8006358: d869 bhi.n 800642e 800635a: 4a94 ldr r2, [pc, #592] @ (80065ac ) 800635c: 4293 cmp r3, r2 800635e: d04c beq.n 80063fa 8006360: 4a92 ldr r2, [pc, #584] @ (80065ac ) 8006362: 4293 cmp r3, r2 8006364: d863 bhi.n 800642e 8006366: 4a92 ldr r2, [pc, #584] @ (80065b0 ) 8006368: 4293 cmp r3, r2 800636a: d046 beq.n 80063fa 800636c: 4a90 ldr r2, [pc, #576] @ (80065b0 ) 800636e: 4293 cmp r3, r2 8006370: d85d bhi.n 800642e 8006372: 2b12 cmp r3, #18 8006374: d82a bhi.n 80063cc 8006376: 2b12 cmp r3, #18 8006378: d859 bhi.n 800642e 800637a: a201 add r2, pc, #4 @ (adr r2, 8006380 ) 800637c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8006380: 080063fb .word 0x080063fb 8006384: 080063d5 .word 0x080063d5 8006388: 080063e7 .word 0x080063e7 800638c: 08006429 .word 0x08006429 8006390: 0800642f .word 0x0800642f 8006394: 0800642f .word 0x0800642f 8006398: 0800642f .word 0x0800642f 800639c: 0800642f .word 0x0800642f 80063a0: 0800642f .word 0x0800642f 80063a4: 0800642f .word 0x0800642f 80063a8: 0800642f .word 0x0800642f 80063ac: 0800642f .word 0x0800642f 80063b0: 0800642f .word 0x0800642f 80063b4: 0800642f .word 0x0800642f 80063b8: 0800642f .word 0x0800642f 80063bc: 0800642f .word 0x0800642f 80063c0: 0800642f .word 0x0800642f 80063c4: 080063dd .word 0x080063dd 80063c8: 080063f1 .word 0x080063f1 80063cc: 4a79 ldr r2, [pc, #484] @ (80065b4 ) 80063ce: 4293 cmp r3, r2 80063d0: d013 beq.n 80063fa config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 80063d2: e02c b.n 800642e config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 80063d4: 683b ldr r3, [r7, #0] 80063d6: 68db ldr r3, [r3, #12] 80063d8: 623b str r3, [r7, #32] break; 80063da: e029 b.n 8006430 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 80063dc: 683b ldr r3, [r7, #0] 80063de: 68db ldr r3, [r3, #12] 80063e0: 3304 adds r3, #4 80063e2: 623b str r3, [r7, #32] break; 80063e4: e024 b.n 8006430 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 80063e6: 683b ldr r3, [r7, #0] 80063e8: 68db ldr r3, [r3, #12] 80063ea: 3308 adds r3, #8 80063ec: 623b str r3, [r7, #32] break; 80063ee: e01f b.n 8006430 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80063f0: 683b ldr r3, [r7, #0] 80063f2: 68db ldr r3, [r3, #12] 80063f4: 330c adds r3, #12 80063f6: 623b str r3, [r7, #32] break; 80063f8: e01a b.n 8006430 if (GPIO_Init->Pull == GPIO_NOPULL) 80063fa: 683b ldr r3, [r7, #0] 80063fc: 689b ldr r3, [r3, #8] 80063fe: 2b00 cmp r3, #0 8006400: d102 bne.n 8006408 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8006402: 2304 movs r3, #4 8006404: 623b str r3, [r7, #32] break; 8006406: e013 b.n 8006430 else if (GPIO_Init->Pull == GPIO_PULLUP) 8006408: 683b ldr r3, [r7, #0] 800640a: 689b ldr r3, [r3, #8] 800640c: 2b01 cmp r3, #1 800640e: d105 bne.n 800641c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8006410: 2308 movs r3, #8 8006412: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 8006414: 687b ldr r3, [r7, #4] 8006416: 69fa ldr r2, [r7, #28] 8006418: 611a str r2, [r3, #16] break; 800641a: e009 b.n 8006430 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 800641c: 2308 movs r3, #8 800641e: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 8006420: 687b ldr r3, [r7, #4] 8006422: 69fa ldr r2, [r7, #28] 8006424: 615a str r2, [r3, #20] break; 8006426: e003 b.n 8006430 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 8006428: 2300 movs r3, #0 800642a: 623b str r3, [r7, #32] break; 800642c: e000 b.n 8006430 break; 800642e: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8006430: 69bb ldr r3, [r7, #24] 8006432: 2bff cmp r3, #255 @ 0xff 8006434: d801 bhi.n 800643a 8006436: 687b ldr r3, [r7, #4] 8006438: e001 b.n 800643e 800643a: 687b ldr r3, [r7, #4] 800643c: 3304 adds r3, #4 800643e: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 8006440: 69bb ldr r3, [r7, #24] 8006442: 2bff cmp r3, #255 @ 0xff 8006444: d802 bhi.n 800644c 8006446: 6a7b ldr r3, [r7, #36] @ 0x24 8006448: 009b lsls r3, r3, #2 800644a: e002 b.n 8006452 800644c: 6a7b ldr r3, [r7, #36] @ 0x24 800644e: 3b08 subs r3, #8 8006450: 009b lsls r3, r3, #2 8006452: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8006454: 697b ldr r3, [r7, #20] 8006456: 681a ldr r2, [r3, #0] 8006458: 210f movs r1, #15 800645a: 693b ldr r3, [r7, #16] 800645c: fa01 f303 lsl.w r3, r1, r3 8006460: 43db mvns r3, r3 8006462: 401a ands r2, r3 8006464: 6a39 ldr r1, [r7, #32] 8006466: 693b ldr r3, [r7, #16] 8006468: fa01 f303 lsl.w r3, r1, r3 800646c: 431a orrs r2, r3 800646e: 697b ldr r3, [r7, #20] 8006470: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8006472: 683b ldr r3, [r7, #0] 8006474: 685b ldr r3, [r3, #4] 8006476: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800647a: 2b00 cmp r3, #0 800647c: f000 80b1 beq.w 80065e2 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8006480: 4b4d ldr r3, [pc, #308] @ (80065b8 ) 8006482: 699b ldr r3, [r3, #24] 8006484: 4a4c ldr r2, [pc, #304] @ (80065b8 ) 8006486: f043 0301 orr.w r3, r3, #1 800648a: 6193 str r3, [r2, #24] 800648c: 4b4a ldr r3, [pc, #296] @ (80065b8 ) 800648e: 699b ldr r3, [r3, #24] 8006490: f003 0301 and.w r3, r3, #1 8006494: 60bb str r3, [r7, #8] 8006496: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8006498: 4a48 ldr r2, [pc, #288] @ (80065bc ) 800649a: 6a7b ldr r3, [r7, #36] @ 0x24 800649c: 089b lsrs r3, r3, #2 800649e: 3302 adds r3, #2 80064a0: f852 3023 ldr.w r3, [r2, r3, lsl #2] 80064a4: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 80064a6: 6a7b ldr r3, [r7, #36] @ 0x24 80064a8: f003 0303 and.w r3, r3, #3 80064ac: 009b lsls r3, r3, #2 80064ae: 220f movs r2, #15 80064b0: fa02 f303 lsl.w r3, r2, r3 80064b4: 43db mvns r3, r3 80064b6: 68fa ldr r2, [r7, #12] 80064b8: 4013 ands r3, r2 80064ba: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 80064bc: 687b ldr r3, [r7, #4] 80064be: 4a40 ldr r2, [pc, #256] @ (80065c0 ) 80064c0: 4293 cmp r3, r2 80064c2: d013 beq.n 80064ec 80064c4: 687b ldr r3, [r7, #4] 80064c6: 4a3f ldr r2, [pc, #252] @ (80065c4 ) 80064c8: 4293 cmp r3, r2 80064ca: d00d beq.n 80064e8 80064cc: 687b ldr r3, [r7, #4] 80064ce: 4a3e ldr r2, [pc, #248] @ (80065c8 ) 80064d0: 4293 cmp r3, r2 80064d2: d007 beq.n 80064e4 80064d4: 687b ldr r3, [r7, #4] 80064d6: 4a3d ldr r2, [pc, #244] @ (80065cc ) 80064d8: 4293 cmp r3, r2 80064da: d101 bne.n 80064e0 80064dc: 2303 movs r3, #3 80064de: e006 b.n 80064ee 80064e0: 2304 movs r3, #4 80064e2: e004 b.n 80064ee 80064e4: 2302 movs r3, #2 80064e6: e002 b.n 80064ee 80064e8: 2301 movs r3, #1 80064ea: e000 b.n 80064ee 80064ec: 2300 movs r3, #0 80064ee: 6a7a ldr r2, [r7, #36] @ 0x24 80064f0: f002 0203 and.w r2, r2, #3 80064f4: 0092 lsls r2, r2, #2 80064f6: 4093 lsls r3, r2 80064f8: 68fa ldr r2, [r7, #12] 80064fa: 4313 orrs r3, r2 80064fc: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 80064fe: 492f ldr r1, [pc, #188] @ (80065bc ) 8006500: 6a7b ldr r3, [r7, #36] @ 0x24 8006502: 089b lsrs r3, r3, #2 8006504: 3302 adds r3, #2 8006506: 68fa ldr r2, [r7, #12] 8006508: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 800650c: 683b ldr r3, [r7, #0] 800650e: 685b ldr r3, [r3, #4] 8006510: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8006514: 2b00 cmp r3, #0 8006516: d006 beq.n 8006526 { SET_BIT(EXTI->RTSR, iocurrent); 8006518: 4b2d ldr r3, [pc, #180] @ (80065d0 ) 800651a: 689a ldr r2, [r3, #8] 800651c: 492c ldr r1, [pc, #176] @ (80065d0 ) 800651e: 69bb ldr r3, [r7, #24] 8006520: 4313 orrs r3, r2 8006522: 608b str r3, [r1, #8] 8006524: e006 b.n 8006534 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 8006526: 4b2a ldr r3, [pc, #168] @ (80065d0 ) 8006528: 689a ldr r2, [r3, #8] 800652a: 69bb ldr r3, [r7, #24] 800652c: 43db mvns r3, r3 800652e: 4928 ldr r1, [pc, #160] @ (80065d0 ) 8006530: 4013 ands r3, r2 8006532: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8006534: 683b ldr r3, [r7, #0] 8006536: 685b ldr r3, [r3, #4] 8006538: f403 1300 and.w r3, r3, #2097152 @ 0x200000 800653c: 2b00 cmp r3, #0 800653e: d006 beq.n 800654e { SET_BIT(EXTI->FTSR, iocurrent); 8006540: 4b23 ldr r3, [pc, #140] @ (80065d0 ) 8006542: 68da ldr r2, [r3, #12] 8006544: 4922 ldr r1, [pc, #136] @ (80065d0 ) 8006546: 69bb ldr r3, [r7, #24] 8006548: 4313 orrs r3, r2 800654a: 60cb str r3, [r1, #12] 800654c: e006 b.n 800655c } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 800654e: 4b20 ldr r3, [pc, #128] @ (80065d0 ) 8006550: 68da ldr r2, [r3, #12] 8006552: 69bb ldr r3, [r7, #24] 8006554: 43db mvns r3, r3 8006556: 491e ldr r1, [pc, #120] @ (80065d0 ) 8006558: 4013 ands r3, r2 800655a: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 800655c: 683b ldr r3, [r7, #0] 800655e: 685b ldr r3, [r3, #4] 8006560: f403 3300 and.w r3, r3, #131072 @ 0x20000 8006564: 2b00 cmp r3, #0 8006566: d006 beq.n 8006576 { SET_BIT(EXTI->EMR, iocurrent); 8006568: 4b19 ldr r3, [pc, #100] @ (80065d0 ) 800656a: 685a ldr r2, [r3, #4] 800656c: 4918 ldr r1, [pc, #96] @ (80065d0 ) 800656e: 69bb ldr r3, [r7, #24] 8006570: 4313 orrs r3, r2 8006572: 604b str r3, [r1, #4] 8006574: e006 b.n 8006584 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8006576: 4b16 ldr r3, [pc, #88] @ (80065d0 ) 8006578: 685a ldr r2, [r3, #4] 800657a: 69bb ldr r3, [r7, #24] 800657c: 43db mvns r3, r3 800657e: 4914 ldr r1, [pc, #80] @ (80065d0 ) 8006580: 4013 ands r3, r2 8006582: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8006584: 683b ldr r3, [r7, #0] 8006586: 685b ldr r3, [r3, #4] 8006588: f403 3380 and.w r3, r3, #65536 @ 0x10000 800658c: 2b00 cmp r3, #0 800658e: d021 beq.n 80065d4 { SET_BIT(EXTI->IMR, iocurrent); 8006590: 4b0f ldr r3, [pc, #60] @ (80065d0 ) 8006592: 681a ldr r2, [r3, #0] 8006594: 490e ldr r1, [pc, #56] @ (80065d0 ) 8006596: 69bb ldr r3, [r7, #24] 8006598: 4313 orrs r3, r2 800659a: 600b str r3, [r1, #0] 800659c: e021 b.n 80065e2 800659e: bf00 nop 80065a0: 10320000 .word 0x10320000 80065a4: 10310000 .word 0x10310000 80065a8: 10220000 .word 0x10220000 80065ac: 10210000 .word 0x10210000 80065b0: 10120000 .word 0x10120000 80065b4: 10110000 .word 0x10110000 80065b8: 40021000 .word 0x40021000 80065bc: 40010000 .word 0x40010000 80065c0: 40010800 .word 0x40010800 80065c4: 40010c00 .word 0x40010c00 80065c8: 40011000 .word 0x40011000 80065cc: 40011400 .word 0x40011400 80065d0: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 80065d4: 4b0b ldr r3, [pc, #44] @ (8006604 ) 80065d6: 681a ldr r2, [r3, #0] 80065d8: 69bb ldr r3, [r7, #24] 80065da: 43db mvns r3, r3 80065dc: 4909 ldr r1, [pc, #36] @ (8006604 ) 80065de: 4013 ands r3, r2 80065e0: 600b str r3, [r1, #0] } } } position++; 80065e2: 6a7b ldr r3, [r7, #36] @ 0x24 80065e4: 3301 adds r3, #1 80065e6: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 80065e8: 683b ldr r3, [r7, #0] 80065ea: 681a ldr r2, [r3, #0] 80065ec: 6a7b ldr r3, [r7, #36] @ 0x24 80065ee: fa22 f303 lsr.w r3, r2, r3 80065f2: 2b00 cmp r3, #0 80065f4: f47f ae8e bne.w 8006314 } } 80065f8: bf00 nop 80065fa: bf00 nop 80065fc: 372c adds r7, #44 @ 0x2c 80065fe: 46bd mov sp, r7 8006600: bc80 pop {r7} 8006602: 4770 bx lr 8006604: 40010400 .word 0x40010400 08006608 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8006608: b480 push {r7} 800660a: b085 sub sp, #20 800660c: af00 add r7, sp, #0 800660e: 6078 str r0, [r7, #4] 8006610: 460b mov r3, r1 8006612: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8006614: 687b ldr r3, [r7, #4] 8006616: 689a ldr r2, [r3, #8] 8006618: 887b ldrh r3, [r7, #2] 800661a: 4013 ands r3, r2 800661c: 2b00 cmp r3, #0 800661e: d002 beq.n 8006626 { bitstatus = GPIO_PIN_SET; 8006620: 2301 movs r3, #1 8006622: 73fb strb r3, [r7, #15] 8006624: e001 b.n 800662a } else { bitstatus = GPIO_PIN_RESET; 8006626: 2300 movs r3, #0 8006628: 73fb strb r3, [r7, #15] } return bitstatus; 800662a: 7bfb ldrb r3, [r7, #15] } 800662c: 4618 mov r0, r3 800662e: 3714 adds r7, #20 8006630: 46bd mov sp, r7 8006632: bc80 pop {r7} 8006634: 4770 bx lr 08006636 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8006636: b480 push {r7} 8006638: b083 sub sp, #12 800663a: af00 add r7, sp, #0 800663c: 6078 str r0, [r7, #4] 800663e: 460b mov r3, r1 8006640: 807b strh r3, [r7, #2] 8006642: 4613 mov r3, r2 8006644: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8006646: 787b ldrb r3, [r7, #1] 8006648: 2b00 cmp r3, #0 800664a: d003 beq.n 8006654 { GPIOx->BSRR = GPIO_Pin; 800664c: 887a ldrh r2, [r7, #2] 800664e: 687b ldr r3, [r7, #4] 8006650: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 8006652: e003 b.n 800665c GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8006654: 887b ldrh r3, [r7, #2] 8006656: 041a lsls r2, r3, #16 8006658: 687b ldr r3, [r7, #4] 800665a: 611a str r2, [r3, #16] } 800665c: bf00 nop 800665e: 370c adds r7, #12 8006660: 46bd mov sp, r7 8006662: bc80 pop {r7} 8006664: 4770 bx lr 08006666 : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { 8006666: b580 push {r7, lr} 8006668: b084 sub sp, #16 800666a: af00 add r7, sp, #0 800666c: 6078 str r0, [r7, #4] uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) 800666e: 687b ldr r3, [r7, #4] 8006670: 2b00 cmp r3, #0 8006672: d101 bne.n 8006678 { return HAL_ERROR; 8006674: 2301 movs r3, #1 8006676: e0e8 b.n 800684a } /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); if (hpcd->State == HAL_PCD_STATE_RESET) 8006678: 687b ldr r3, [r7, #4] 800667a: f893 3291 ldrb.w r3, [r3, #657] @ 0x291 800667e: b2db uxtb r3, r3 8006680: 2b00 cmp r3, #0 8006682: d106 bne.n 8006692 { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; 8006684: 687b ldr r3, [r7, #4] 8006686: 2200 movs r2, #0 8006688: f883 2290 strb.w r2, [r3, #656] @ 0x290 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); 800668c: 6878 ldr r0, [r7, #4] 800668e: f007 fc17 bl 800dec0 #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; 8006692: 687b ldr r3, [r7, #4] 8006694: 2203 movs r2, #3 8006696: f883 2291 strb.w r2, [r3, #657] @ 0x291 /* Disable DMA mode for FS instance */ hpcd->Init.dma_enable = 0U; 800669a: 687b ldr r3, [r7, #4] 800669c: 2200 movs r2, #0 800669e: 715a strb r2, [r3, #5] /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); 80066a0: 687b ldr r3, [r7, #4] 80066a2: 681b ldr r3, [r3, #0] 80066a4: 4618 mov r0, r3 80066a6: f003 fabc bl 8009c22 /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) 80066aa: 687b ldr r3, [r7, #4] 80066ac: 6818 ldr r0, [r3, #0] 80066ae: 687b ldr r3, [r7, #4] 80066b0: 3304 adds r3, #4 80066b2: cb0e ldmia r3, {r1, r2, r3} 80066b4: f003 fa92 bl 8009bdc 80066b8: 4603 mov r3, r0 80066ba: 2b00 cmp r3, #0 80066bc: d005 beq.n 80066ca { hpcd->State = HAL_PCD_STATE_ERROR; 80066be: 687b ldr r3, [r7, #4] 80066c0: 2202 movs r2, #2 80066c2: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 80066c6: 2301 movs r3, #1 80066c8: e0bf b.n 800684a } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) 80066ca: 687b ldr r3, [r7, #4] 80066cc: 681b ldr r3, [r3, #0] 80066ce: 2100 movs r1, #0 80066d0: 4618 mov r0, r3 80066d2: f003 fac0 bl 8009c56 80066d6: 4603 mov r3, r0 80066d8: 2b00 cmp r3, #0 80066da: d005 beq.n 80066e8 { hpcd->State = HAL_PCD_STATE_ERROR; 80066dc: 687b ldr r3, [r7, #4] 80066de: 2202 movs r2, #2 80066e0: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 80066e4: 2301 movs r3, #1 80066e6: e0b0 b.n 800684a } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80066e8: 2300 movs r3, #0 80066ea: 73fb strb r3, [r7, #15] 80066ec: e03e b.n 800676c { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; 80066ee: 7bfa ldrb r2, [r7, #15] 80066f0: 6879 ldr r1, [r7, #4] 80066f2: 4613 mov r3, r2 80066f4: 009b lsls r3, r3, #2 80066f6: 4413 add r3, r2 80066f8: 00db lsls r3, r3, #3 80066fa: 440b add r3, r1 80066fc: 3311 adds r3, #17 80066fe: 2201 movs r2, #1 8006700: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; 8006702: 7bfa ldrb r2, [r7, #15] 8006704: 6879 ldr r1, [r7, #4] 8006706: 4613 mov r3, r2 8006708: 009b lsls r3, r3, #2 800670a: 4413 add r3, r2 800670c: 00db lsls r3, r3, #3 800670e: 440b add r3, r1 8006710: 3310 adds r3, #16 8006712: 7bfa ldrb r2, [r7, #15] 8006714: 701a strb r2, [r3, #0] #if defined (USB_OTG_FS) hpcd->IN_ep[i].tx_fifo_num = i; #endif /* defined (USB_OTG_FS) */ /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; 8006716: 7bfa ldrb r2, [r7, #15] 8006718: 6879 ldr r1, [r7, #4] 800671a: 4613 mov r3, r2 800671c: 009b lsls r3, r3, #2 800671e: 4413 add r3, r2 8006720: 00db lsls r3, r3, #3 8006722: 440b add r3, r1 8006724: 3313 adds r3, #19 8006726: 2200 movs r2, #0 8006728: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; 800672a: 7bfa ldrb r2, [r7, #15] 800672c: 6879 ldr r1, [r7, #4] 800672e: 4613 mov r3, r2 8006730: 009b lsls r3, r3, #2 8006732: 4413 add r3, r2 8006734: 00db lsls r3, r3, #3 8006736: 440b add r3, r1 8006738: 3320 adds r3, #32 800673a: 2200 movs r2, #0 800673c: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; 800673e: 7bfa ldrb r2, [r7, #15] 8006740: 6879 ldr r1, [r7, #4] 8006742: 4613 mov r3, r2 8006744: 009b lsls r3, r3, #2 8006746: 4413 add r3, r2 8006748: 00db lsls r3, r3, #3 800674a: 440b add r3, r1 800674c: 3324 adds r3, #36 @ 0x24 800674e: 2200 movs r2, #0 8006750: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; 8006752: 7bfb ldrb r3, [r7, #15] 8006754: 6879 ldr r1, [r7, #4] 8006756: 1c5a adds r2, r3, #1 8006758: 4613 mov r3, r2 800675a: 009b lsls r3, r3, #2 800675c: 4413 add r3, r2 800675e: 00db lsls r3, r3, #3 8006760: 440b add r3, r1 8006762: 2200 movs r2, #0 8006764: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8006766: 7bfb ldrb r3, [r7, #15] 8006768: 3301 adds r3, #1 800676a: 73fb strb r3, [r7, #15] 800676c: 687b ldr r3, [r7, #4] 800676e: 791b ldrb r3, [r3, #4] 8006770: 7bfa ldrb r2, [r7, #15] 8006772: 429a cmp r2, r3 8006774: d3bb bcc.n 80066ee } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8006776: 2300 movs r3, #0 8006778: 73fb strb r3, [r7, #15] 800677a: e044 b.n 8006806 { hpcd->OUT_ep[i].is_in = 0U; 800677c: 7bfa ldrb r2, [r7, #15] 800677e: 6879 ldr r1, [r7, #4] 8006780: 4613 mov r3, r2 8006782: 009b lsls r3, r3, #2 8006784: 4413 add r3, r2 8006786: 00db lsls r3, r3, #3 8006788: 440b add r3, r1 800678a: f203 1351 addw r3, r3, #337 @ 0x151 800678e: 2200 movs r2, #0 8006790: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; 8006792: 7bfa ldrb r2, [r7, #15] 8006794: 6879 ldr r1, [r7, #4] 8006796: 4613 mov r3, r2 8006798: 009b lsls r3, r3, #2 800679a: 4413 add r3, r2 800679c: 00db lsls r3, r3, #3 800679e: 440b add r3, r1 80067a0: f503 73a8 add.w r3, r3, #336 @ 0x150 80067a4: 7bfa ldrb r2, [r7, #15] 80067a6: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; 80067a8: 7bfa ldrb r2, [r7, #15] 80067aa: 6879 ldr r1, [r7, #4] 80067ac: 4613 mov r3, r2 80067ae: 009b lsls r3, r3, #2 80067b0: 4413 add r3, r2 80067b2: 00db lsls r3, r3, #3 80067b4: 440b add r3, r1 80067b6: f203 1353 addw r3, r3, #339 @ 0x153 80067ba: 2200 movs r2, #0 80067bc: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; 80067be: 7bfa ldrb r2, [r7, #15] 80067c0: 6879 ldr r1, [r7, #4] 80067c2: 4613 mov r3, r2 80067c4: 009b lsls r3, r3, #2 80067c6: 4413 add r3, r2 80067c8: 00db lsls r3, r3, #3 80067ca: 440b add r3, r1 80067cc: f503 73b0 add.w r3, r3, #352 @ 0x160 80067d0: 2200 movs r2, #0 80067d2: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; 80067d4: 7bfa ldrb r2, [r7, #15] 80067d6: 6879 ldr r1, [r7, #4] 80067d8: 4613 mov r3, r2 80067da: 009b lsls r3, r3, #2 80067dc: 4413 add r3, r2 80067de: 00db lsls r3, r3, #3 80067e0: 440b add r3, r1 80067e2: f503 73b2 add.w r3, r3, #356 @ 0x164 80067e6: 2200 movs r2, #0 80067e8: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; 80067ea: 7bfa ldrb r2, [r7, #15] 80067ec: 6879 ldr r1, [r7, #4] 80067ee: 4613 mov r3, r2 80067f0: 009b lsls r3, r3, #2 80067f2: 4413 add r3, r2 80067f4: 00db lsls r3, r3, #3 80067f6: 440b add r3, r1 80067f8: f503 73b4 add.w r3, r3, #360 @ 0x168 80067fc: 2200 movs r2, #0 80067fe: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8006800: 7bfb ldrb r3, [r7, #15] 8006802: 3301 adds r3, #1 8006804: 73fb strb r3, [r7, #15] 8006806: 687b ldr r3, [r7, #4] 8006808: 791b ldrb r3, [r3, #4] 800680a: 7bfa ldrb r2, [r7, #15] 800680c: 429a cmp r2, r3 800680e: d3b5 bcc.n 800677c } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8006810: 687b ldr r3, [r7, #4] 8006812: 6818 ldr r0, [r3, #0] 8006814: 687b ldr r3, [r7, #4] 8006816: 3304 adds r3, #4 8006818: cb0e ldmia r3, {r1, r2, r3} 800681a: f003 fa28 bl 8009c6e 800681e: 4603 mov r3, r0 8006820: 2b00 cmp r3, #0 8006822: d005 beq.n 8006830 { hpcd->State = HAL_PCD_STATE_ERROR; 8006824: 687b ldr r3, [r7, #4] 8006826: 2202 movs r2, #2 8006828: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 800682c: 2301 movs r3, #1 800682e: e00c b.n 800684a } hpcd->USB_Address = 0U; 8006830: 687b ldr r3, [r7, #4] 8006832: 2200 movs r2, #0 8006834: 735a strb r2, [r3, #13] hpcd->State = HAL_PCD_STATE_READY; 8006836: 687b ldr r3, [r7, #4] 8006838: 2201 movs r2, #1 800683a: f883 2291 strb.w r2, [r3, #657] @ 0x291 (void)USB_DevDisconnect(hpcd->Instance); 800683e: 687b ldr r3, [r7, #4] 8006840: 681b ldr r3, [r3, #0] 8006842: 4618 mov r0, r3 8006844: f005 fca7 bl 800c196 return HAL_OK; 8006848: 2300 movs r3, #0 } 800684a: 4618 mov r0, r3 800684c: 3710 adds r7, #16 800684e: 46bd mov sp, r7 8006850: bd80 pop {r7, pc} 08006852 : * @brief Start the USB device * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) { 8006852: b580 push {r7, lr} 8006854: b082 sub sp, #8 8006856: af00 add r7, sp, #0 8006858: 6078 str r0, [r7, #4] __HAL_LOCK(hpcd); 800685a: 687b ldr r3, [r7, #4] 800685c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8006860: 2b01 cmp r3, #1 8006862: d101 bne.n 8006868 8006864: 2302 movs r3, #2 8006866: e016 b.n 8006896 8006868: 687b ldr r3, [r7, #4] 800686a: 2201 movs r2, #1 800686c: f883 2290 strb.w r2, [r3, #656] @ 0x290 __HAL_PCD_ENABLE(hpcd); 8006870: 687b ldr r3, [r7, #4] 8006872: 681b ldr r3, [r3, #0] 8006874: 4618 mov r0, r3 8006876: f003 f9be bl 8009bf6 #if defined (USB) HAL_PCDEx_SetConnectionState(hpcd, 1U); 800687a: 2101 movs r1, #1 800687c: 6878 ldr r0, [r7, #4] 800687e: f007 fd92 bl 800e3a6 #endif /* defined (USB) */ (void)USB_DevConnect(hpcd->Instance); 8006882: 687b ldr r3, [r7, #4] 8006884: 681b ldr r3, [r3, #0] 8006886: 4618 mov r0, r3 8006888: f005 fc7b bl 800c182 __HAL_UNLOCK(hpcd); 800688c: 687b ldr r3, [r7, #4] 800688e: 2200 movs r2, #0 8006890: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8006894: 2300 movs r3, #0 } 8006896: 4618 mov r0, r3 8006898: 3708 adds r7, #8 800689a: 46bd mov sp, r7 800689c: bd80 pop {r7, pc} 0800689e : * @brief This function handles PCD interrupt request. * @param hpcd PCD handle * @retval HAL status */ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { 800689e: b580 push {r7, lr} 80068a0: b088 sub sp, #32 80068a2: af00 add r7, sp, #0 80068a4: 6078 str r0, [r7, #4] uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance); 80068a6: 687b ldr r3, [r7, #4] 80068a8: 681b ldr r3, [r3, #0] 80068aa: 4618 mov r0, r3 80068ac: f005 fc7d bl 800c1aa 80068b0: 61b8 str r0, [r7, #24] uint16_t store_ep[8]; uint8_t i; if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR) 80068b2: 69bb ldr r3, [r7, #24] 80068b4: f403 4300 and.w r3, r3, #32768 @ 0x8000 80068b8: 2b00 cmp r3, #0 80068ba: d003 beq.n 80068c4 { /* servicing of the endpoint correct transfer interrupt */ /* clear of the CTR flag into the sub */ (void)PCD_EP_ISR_Handler(hpcd); 80068bc: 6878 ldr r0, [r7, #4] 80068be: f000 fb1a bl 8006ef6 return; 80068c2: e119 b.n 8006af8 } if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET) 80068c4: 69bb ldr r3, [r7, #24] 80068c6: f403 6380 and.w r3, r3, #1024 @ 0x400 80068ca: 2b00 cmp r3, #0 80068cc: d013 beq.n 80068f6 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 80068ce: 687b ldr r3, [r7, #4] 80068d0: 681b ldr r3, [r3, #0] 80068d2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 80068d6: b29a uxth r2, r3 80068d8: 687b ldr r3, [r7, #4] 80068da: 681b ldr r3, [r3, #0] 80068dc: f422 6280 bic.w r2, r2, #1024 @ 0x400 80068e0: b292 uxth r2, r2 80068e2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResetCallback(hpcd); #else HAL_PCD_ResetCallback(hpcd); 80068e6: 6878 ldr r0, [r7, #4] 80068e8: f007 fb65 bl 800dfb6 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ (void)HAL_PCD_SetAddress(hpcd, 0U); 80068ec: 2100 movs r1, #0 80068ee: 6878 ldr r0, [r7, #4] 80068f0: f000 f905 bl 8006afe return; 80068f4: e100 b.n 8006af8 } if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR) 80068f6: 69bb ldr r3, [r7, #24] 80068f8: f403 4380 and.w r3, r3, #16384 @ 0x4000 80068fc: 2b00 cmp r3, #0 80068fe: d00c beq.n 800691a { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); 8006900: 687b ldr r3, [r7, #4] 8006902: 681b ldr r3, [r3, #0] 8006904: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006908: b29a uxth r2, r3 800690a: 687b ldr r3, [r7, #4] 800690c: 681b ldr r3, [r3, #0] 800690e: f422 4280 bic.w r2, r2, #16384 @ 0x4000 8006912: b292 uxth r2, r2 8006914: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8006918: e0ee b.n 8006af8 } if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR) 800691a: 69bb ldr r3, [r7, #24] 800691c: f403 5300 and.w r3, r3, #8192 @ 0x2000 8006920: 2b00 cmp r3, #0 8006922: d00c beq.n 800693e { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); 8006924: 687b ldr r3, [r7, #4] 8006926: 681b ldr r3, [r3, #0] 8006928: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 800692c: b29a uxth r2, r3 800692e: 687b ldr r3, [r7, #4] 8006930: 681b ldr r3, [r3, #0] 8006932: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8006936: b292 uxth r2, r2 8006938: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 800693c: e0dc b.n 8006af8 } if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP) 800693e: 69bb ldr r3, [r7, #24] 8006940: f403 5380 and.w r3, r3, #4096 @ 0x1000 8006944: 2b00 cmp r3, #0 8006946: d027 beq.n 8006998 { hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE); 8006948: 687b ldr r3, [r7, #4] 800694a: 681b ldr r3, [r3, #0] 800694c: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8006950: b29a uxth r2, r3 8006952: 687b ldr r3, [r7, #4] 8006954: 681b ldr r3, [r3, #0] 8006956: f022 0204 bic.w r2, r2, #4 800695a: b292 uxth r2, r2 800695c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); 8006960: 687b ldr r3, [r7, #4] 8006962: 681b ldr r3, [r3, #0] 8006964: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8006968: b29a uxth r2, r3 800696a: 687b ldr r3, [r7, #4] 800696c: 681b ldr r3, [r3, #0] 800696e: f022 0208 bic.w r2, r2, #8 8006972: b292 uxth r2, r2 8006974: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResumeCallback(hpcd); #else HAL_PCD_ResumeCallback(hpcd); 8006978: 6878 ldr r0, [r7, #4] 800697a: f007 fb55 bl 800e028 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); 800697e: 687b ldr r3, [r7, #4] 8006980: 681b ldr r3, [r3, #0] 8006982: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006986: b29a uxth r2, r3 8006988: 687b ldr r3, [r7, #4] 800698a: 681b ldr r3, [r3, #0] 800698c: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8006990: b292 uxth r2, r2 8006992: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8006996: e0af b.n 8006af8 } if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP) 8006998: 69bb ldr r3, [r7, #24] 800699a: f403 6300 and.w r3, r3, #2048 @ 0x800 800699e: 2b00 cmp r3, #0 80069a0: f000 8083 beq.w 8006aaa { /* WA: To Clear Wakeup flag if raised with suspend signal */ /* Store Endpoint registers */ for (i = 0U; i < 8U; i++) 80069a4: 2300 movs r3, #0 80069a6: 77fb strb r3, [r7, #31] 80069a8: e010 b.n 80069cc { store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i); 80069aa: 687b ldr r3, [r7, #4] 80069ac: 681b ldr r3, [r3, #0] 80069ae: 461a mov r2, r3 80069b0: 7ffb ldrb r3, [r7, #31] 80069b2: 009b lsls r3, r3, #2 80069b4: 441a add r2, r3 80069b6: 7ffb ldrb r3, [r7, #31] 80069b8: 8812 ldrh r2, [r2, #0] 80069ba: b292 uxth r2, r2 80069bc: 005b lsls r3, r3, #1 80069be: 3320 adds r3, #32 80069c0: 443b add r3, r7 80069c2: f823 2c18 strh.w r2, [r3, #-24] for (i = 0U; i < 8U; i++) 80069c6: 7ffb ldrb r3, [r7, #31] 80069c8: 3301 adds r3, #1 80069ca: 77fb strb r3, [r7, #31] 80069cc: 7ffb ldrb r3, [r7, #31] 80069ce: 2b07 cmp r3, #7 80069d0: d9eb bls.n 80069aa } /* FORCE RESET */ hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES); 80069d2: 687b ldr r3, [r7, #4] 80069d4: 681b ldr r3, [r3, #0] 80069d6: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 80069da: b29a uxth r2, r3 80069dc: 687b ldr r3, [r7, #4] 80069de: 681b ldr r3, [r3, #0] 80069e0: f042 0201 orr.w r2, r2, #1 80069e4: b292 uxth r2, r2 80069e6: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CLEAR RESET */ hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES); 80069ea: 687b ldr r3, [r7, #4] 80069ec: 681b ldr r3, [r3, #0] 80069ee: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 80069f2: b29a uxth r2, r3 80069f4: 687b ldr r3, [r7, #4] 80069f6: 681b ldr r3, [r3, #0] 80069f8: f022 0201 bic.w r2, r2, #1 80069fc: b292 uxth r2, r2 80069fe: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* wait for reset flag in ISTR */ while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U) 8006a02: bf00 nop 8006a04: 687b ldr r3, [r7, #4] 8006a06: 681b ldr r3, [r3, #0] 8006a08: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006a0c: b29b uxth r3, r3 8006a0e: f403 6380 and.w r3, r3, #1024 @ 0x400 8006a12: 2b00 cmp r3, #0 8006a14: d0f6 beq.n 8006a04 { } /* Clear Reset Flag */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 8006a16: 687b ldr r3, [r7, #4] 8006a18: 681b ldr r3, [r3, #0] 8006a1a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006a1e: b29a uxth r2, r3 8006a20: 687b ldr r3, [r7, #4] 8006a22: 681b ldr r3, [r3, #0] 8006a24: f422 6280 bic.w r2, r2, #1024 @ 0x400 8006a28: b292 uxth r2, r2 8006a2a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Restore Registre */ for (i = 0U; i < 8U; i++) 8006a2e: 2300 movs r3, #0 8006a30: 77fb strb r3, [r7, #31] 8006a32: e00f b.n 8006a54 { PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]); 8006a34: 7ffb ldrb r3, [r7, #31] 8006a36: 687a ldr r2, [r7, #4] 8006a38: 6812 ldr r2, [r2, #0] 8006a3a: 4611 mov r1, r2 8006a3c: 7ffa ldrb r2, [r7, #31] 8006a3e: 0092 lsls r2, r2, #2 8006a40: 440a add r2, r1 8006a42: 005b lsls r3, r3, #1 8006a44: 3320 adds r3, #32 8006a46: 443b add r3, r7 8006a48: f833 3c18 ldrh.w r3, [r3, #-24] 8006a4c: 8013 strh r3, [r2, #0] for (i = 0U; i < 8U; i++) 8006a4e: 7ffb ldrb r3, [r7, #31] 8006a50: 3301 adds r3, #1 8006a52: 77fb strb r3, [r7, #31] 8006a54: 7ffb ldrb r3, [r7, #31] 8006a56: 2b07 cmp r3, #7 8006a58: d9ec bls.n 8006a34 } /* Force low-power mode in the macrocell */ hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP; 8006a5a: 687b ldr r3, [r7, #4] 8006a5c: 681b ldr r3, [r3, #0] 8006a5e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8006a62: b29a uxth r2, r3 8006a64: 687b ldr r3, [r7, #4] 8006a66: 681b ldr r3, [r3, #0] 8006a68: f042 0208 orr.w r2, r2, #8 8006a6c: b292 uxth r2, r2 8006a6e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); 8006a72: 687b ldr r3, [r7, #4] 8006a74: 681b ldr r3, [r3, #0] 8006a76: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006a7a: b29a uxth r2, r3 8006a7c: 687b ldr r3, [r7, #4] 8006a7e: 681b ldr r3, [r3, #0] 8006a80: f422 6200 bic.w r2, r2, #2048 @ 0x800 8006a84: b292 uxth r2, r2 8006a86: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE; 8006a8a: 687b ldr r3, [r7, #4] 8006a8c: 681b ldr r3, [r3, #0] 8006a8e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8006a92: b29a uxth r2, r3 8006a94: 687b ldr r3, [r7, #4] 8006a96: 681b ldr r3, [r3, #0] 8006a98: f042 0204 orr.w r2, r2, #4 8006a9c: b292 uxth r2, r2 8006a9e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 8006aa2: 6878 ldr r0, [r7, #4] 8006aa4: f007 faa6 bl 800dff4 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8006aa8: e026 b.n 8006af8 } if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF) 8006aaa: 69bb ldr r3, [r7, #24] 8006aac: f403 7300 and.w r3, r3, #512 @ 0x200 8006ab0: 2b00 cmp r3, #0 8006ab2: d00f beq.n 8006ad4 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); 8006ab4: 687b ldr r3, [r7, #4] 8006ab6: 681b ldr r3, [r3, #0] 8006ab8: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006abc: b29a uxth r2, r3 8006abe: 687b ldr r3, [r7, #4] 8006ac0: 681b ldr r3, [r3, #0] 8006ac2: f422 7200 bic.w r2, r2, #512 @ 0x200 8006ac6: b292 uxth r2, r2 8006ac8: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SOFCallback(hpcd); #else HAL_PCD_SOFCallback(hpcd); 8006acc: 6878 ldr r0, [r7, #4] 8006ace: f007 fa64 bl 800df9a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8006ad2: e011 b.n 8006af8 } if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF) 8006ad4: 69bb ldr r3, [r7, #24] 8006ad6: f403 7380 and.w r3, r3, #256 @ 0x100 8006ada: 2b00 cmp r3, #0 8006adc: d00c beq.n 8006af8 { /* clear ESOF flag in ISTR */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); 8006ade: 687b ldr r3, [r7, #4] 8006ae0: 681b ldr r3, [r3, #0] 8006ae2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006ae6: b29a uxth r2, r3 8006ae8: 687b ldr r3, [r7, #4] 8006aea: 681b ldr r3, [r3, #0] 8006aec: f422 7280 bic.w r2, r2, #256 @ 0x100 8006af0: b292 uxth r2, r2 8006af2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8006af6: bf00 nop } } 8006af8: 3720 adds r7, #32 8006afa: 46bd mov sp, r7 8006afc: bd80 pop {r7, pc} 08006afe : * @param hpcd PCD handle * @param address new device address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) { 8006afe: b580 push {r7, lr} 8006b00: b082 sub sp, #8 8006b02: af00 add r7, sp, #0 8006b04: 6078 str r0, [r7, #4] 8006b06: 460b mov r3, r1 8006b08: 70fb strb r3, [r7, #3] __HAL_LOCK(hpcd); 8006b0a: 687b ldr r3, [r7, #4] 8006b0c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8006b10: 2b01 cmp r3, #1 8006b12: d101 bne.n 8006b18 8006b14: 2302 movs r3, #2 8006b16: e012 b.n 8006b3e 8006b18: 687b ldr r3, [r7, #4] 8006b1a: 2201 movs r2, #1 8006b1c: f883 2290 strb.w r2, [r3, #656] @ 0x290 hpcd->USB_Address = address; 8006b20: 687b ldr r3, [r7, #4] 8006b22: 78fa ldrb r2, [r7, #3] 8006b24: 735a strb r2, [r3, #13] (void)USB_SetDevAddress(hpcd->Instance, address); 8006b26: 687b ldr r3, [r7, #4] 8006b28: 681b ldr r3, [r3, #0] 8006b2a: 78fa ldrb r2, [r7, #3] 8006b2c: 4611 mov r1, r2 8006b2e: 4618 mov r0, r3 8006b30: f005 fb14 bl 800c15c __HAL_UNLOCK(hpcd); 8006b34: 687b ldr r3, [r7, #4] 8006b36: 2200 movs r2, #0 8006b38: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8006b3c: 2300 movs r3, #0 } 8006b3e: 4618 mov r0, r3 8006b40: 3708 adds r7, #8 8006b42: 46bd mov sp, r7 8006b44: bd80 pop {r7, pc} 08006b46 : * @param ep_type endpoint type * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { 8006b46: b580 push {r7, lr} 8006b48: b084 sub sp, #16 8006b4a: af00 add r7, sp, #0 8006b4c: 6078 str r0, [r7, #4] 8006b4e: 4608 mov r0, r1 8006b50: 4611 mov r1, r2 8006b52: 461a mov r2, r3 8006b54: 4603 mov r3, r0 8006b56: 70fb strb r3, [r7, #3] 8006b58: 460b mov r3, r1 8006b5a: 803b strh r3, [r7, #0] 8006b5c: 4613 mov r3, r2 8006b5e: 70bb strb r3, [r7, #2] HAL_StatusTypeDef ret = HAL_OK; 8006b60: 2300 movs r3, #0 8006b62: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8006b64: f997 3003 ldrsb.w r3, [r7, #3] 8006b68: 2b00 cmp r3, #0 8006b6a: da0e bge.n 8006b8a { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8006b6c: 78fb ldrb r3, [r7, #3] 8006b6e: f003 0207 and.w r2, r3, #7 8006b72: 4613 mov r3, r2 8006b74: 009b lsls r3, r3, #2 8006b76: 4413 add r3, r2 8006b78: 00db lsls r3, r3, #3 8006b7a: 3310 adds r3, #16 8006b7c: 687a ldr r2, [r7, #4] 8006b7e: 4413 add r3, r2 8006b80: 60fb str r3, [r7, #12] ep->is_in = 1U; 8006b82: 68fb ldr r3, [r7, #12] 8006b84: 2201 movs r2, #1 8006b86: 705a strb r2, [r3, #1] 8006b88: e00e b.n 8006ba8 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8006b8a: 78fb ldrb r3, [r7, #3] 8006b8c: f003 0207 and.w r2, r3, #7 8006b90: 4613 mov r3, r2 8006b92: 009b lsls r3, r3, #2 8006b94: 4413 add r3, r2 8006b96: 00db lsls r3, r3, #3 8006b98: f503 73a8 add.w r3, r3, #336 @ 0x150 8006b9c: 687a ldr r2, [r7, #4] 8006b9e: 4413 add r3, r2 8006ba0: 60fb str r3, [r7, #12] ep->is_in = 0U; 8006ba2: 68fb ldr r3, [r7, #12] 8006ba4: 2200 movs r2, #0 8006ba6: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8006ba8: 78fb ldrb r3, [r7, #3] 8006baa: f003 0307 and.w r3, r3, #7 8006bae: b2da uxtb r2, r3 8006bb0: 68fb ldr r3, [r7, #12] 8006bb2: 701a strb r2, [r3, #0] ep->maxpacket = ep_mps; 8006bb4: 883a ldrh r2, [r7, #0] 8006bb6: 68fb ldr r3, [r7, #12] 8006bb8: 611a str r2, [r3, #16] ep->type = ep_type; 8006bba: 68fb ldr r3, [r7, #12] 8006bbc: 78ba ldrb r2, [r7, #2] 8006bbe: 70da strb r2, [r3, #3] ep->tx_fifo_num = ep->num; } #endif /* defined (USB_OTG_FS) */ /* Set initial data PID. */ if (ep_type == EP_TYPE_BULK) 8006bc0: 78bb ldrb r3, [r7, #2] 8006bc2: 2b02 cmp r3, #2 8006bc4: d102 bne.n 8006bcc { ep->data_pid_start = 0U; 8006bc6: 68fb ldr r3, [r7, #12] 8006bc8: 2200 movs r2, #0 8006bca: 711a strb r2, [r3, #4] } __HAL_LOCK(hpcd); 8006bcc: 687b ldr r3, [r7, #4] 8006bce: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8006bd2: 2b01 cmp r3, #1 8006bd4: d101 bne.n 8006bda 8006bd6: 2302 movs r3, #2 8006bd8: e00e b.n 8006bf8 8006bda: 687b ldr r3, [r7, #4] 8006bdc: 2201 movs r2, #1 8006bde: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_ActivateEndpoint(hpcd->Instance, ep); 8006be2: 687b ldr r3, [r7, #4] 8006be4: 681b ldr r3, [r3, #0] 8006be6: 68f9 ldr r1, [r7, #12] 8006be8: 4618 mov r0, r3 8006bea: f003 f85d bl 8009ca8 __HAL_UNLOCK(hpcd); 8006bee: 687b ldr r3, [r7, #4] 8006bf0: 2200 movs r2, #0 8006bf2: f883 2290 strb.w r2, [r3, #656] @ 0x290 return ret; 8006bf6: 7afb ldrb r3, [r7, #11] } 8006bf8: 4618 mov r0, r3 8006bfa: 3710 adds r7, #16 8006bfc: 46bd mov sp, r7 8006bfe: bd80 pop {r7, pc} 08006c00 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8006c00: b580 push {r7, lr} 8006c02: b084 sub sp, #16 8006c04: af00 add r7, sp, #0 8006c06: 6078 str r0, [r7, #4] 8006c08: 460b mov r3, r1 8006c0a: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8006c0c: f997 3003 ldrsb.w r3, [r7, #3] 8006c10: 2b00 cmp r3, #0 8006c12: da0e bge.n 8006c32 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8006c14: 78fb ldrb r3, [r7, #3] 8006c16: f003 0207 and.w r2, r3, #7 8006c1a: 4613 mov r3, r2 8006c1c: 009b lsls r3, r3, #2 8006c1e: 4413 add r3, r2 8006c20: 00db lsls r3, r3, #3 8006c22: 3310 adds r3, #16 8006c24: 687a ldr r2, [r7, #4] 8006c26: 4413 add r3, r2 8006c28: 60fb str r3, [r7, #12] ep->is_in = 1U; 8006c2a: 68fb ldr r3, [r7, #12] 8006c2c: 2201 movs r2, #1 8006c2e: 705a strb r2, [r3, #1] 8006c30: e00e b.n 8006c50 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8006c32: 78fb ldrb r3, [r7, #3] 8006c34: f003 0207 and.w r2, r3, #7 8006c38: 4613 mov r3, r2 8006c3a: 009b lsls r3, r3, #2 8006c3c: 4413 add r3, r2 8006c3e: 00db lsls r3, r3, #3 8006c40: f503 73a8 add.w r3, r3, #336 @ 0x150 8006c44: 687a ldr r2, [r7, #4] 8006c46: 4413 add r3, r2 8006c48: 60fb str r3, [r7, #12] ep->is_in = 0U; 8006c4a: 68fb ldr r3, [r7, #12] 8006c4c: 2200 movs r2, #0 8006c4e: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8006c50: 78fb ldrb r3, [r7, #3] 8006c52: f003 0307 and.w r3, r3, #7 8006c56: b2da uxtb r2, r3 8006c58: 68fb ldr r3, [r7, #12] 8006c5a: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8006c5c: 687b ldr r3, [r7, #4] 8006c5e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8006c62: 2b01 cmp r3, #1 8006c64: d101 bne.n 8006c6a 8006c66: 2302 movs r3, #2 8006c68: e00e b.n 8006c88 8006c6a: 687b ldr r3, [r7, #4] 8006c6c: 2201 movs r2, #1 8006c6e: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_DeactivateEndpoint(hpcd->Instance, ep); 8006c72: 687b ldr r3, [r7, #4] 8006c74: 681b ldr r3, [r3, #0] 8006c76: 68f9 ldr r1, [r7, #12] 8006c78: 4618 mov r0, r3 8006c7a: f003 fbd5 bl 800a428 __HAL_UNLOCK(hpcd); 8006c7e: 687b ldr r3, [r7, #4] 8006c80: 2200 movs r2, #0 8006c82: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8006c86: 2300 movs r3, #0 } 8006c88: 4618 mov r0, r3 8006c8a: 3710 adds r7, #16 8006c8c: 46bd mov sp, r7 8006c8e: bd80 pop {r7, pc} 08006c90 : * @param pBuf pointer to the reception buffer * @param len amount of data to be received * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8006c90: b580 push {r7, lr} 8006c92: b086 sub sp, #24 8006c94: af00 add r7, sp, #0 8006c96: 60f8 str r0, [r7, #12] 8006c98: 607a str r2, [r7, #4] 8006c9a: 603b str r3, [r7, #0] 8006c9c: 460b mov r3, r1 8006c9e: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8006ca0: 7afb ldrb r3, [r7, #11] 8006ca2: f003 0207 and.w r2, r3, #7 8006ca6: 4613 mov r3, r2 8006ca8: 009b lsls r3, r3, #2 8006caa: 4413 add r3, r2 8006cac: 00db lsls r3, r3, #3 8006cae: f503 73a8 add.w r3, r3, #336 @ 0x150 8006cb2: 68fa ldr r2, [r7, #12] 8006cb4: 4413 add r3, r2 8006cb6: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8006cb8: 697b ldr r3, [r7, #20] 8006cba: 687a ldr r2, [r7, #4] 8006cbc: 615a str r2, [r3, #20] ep->xfer_len = len; 8006cbe: 697b ldr r3, [r7, #20] 8006cc0: 683a ldr r2, [r7, #0] 8006cc2: 619a str r2, [r3, #24] ep->xfer_count = 0U; 8006cc4: 697b ldr r3, [r7, #20] 8006cc6: 2200 movs r2, #0 8006cc8: 61da str r2, [r3, #28] ep->is_in = 0U; 8006cca: 697b ldr r3, [r7, #20] 8006ccc: 2200 movs r2, #0 8006cce: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8006cd0: 7afb ldrb r3, [r7, #11] 8006cd2: f003 0307 and.w r3, r3, #7 8006cd6: b2da uxtb r2, r3 8006cd8: 697b ldr r3, [r7, #20] 8006cda: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8006cdc: 68fb ldr r3, [r7, #12] 8006cde: 681b ldr r3, [r3, #0] 8006ce0: 6979 ldr r1, [r7, #20] 8006ce2: 4618 mov r0, r3 8006ce4: f003 fd8c bl 800a800 return HAL_OK; 8006ce8: 2300 movs r3, #0 } 8006cea: 4618 mov r0, r3 8006cec: 3718 adds r7, #24 8006cee: 46bd mov sp, r7 8006cf0: bd80 pop {r7, pc} 08006cf2 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval Data Size */ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr) { 8006cf2: b480 push {r7} 8006cf4: b083 sub sp, #12 8006cf6: af00 add r7, sp, #0 8006cf8: 6078 str r0, [r7, #4] 8006cfa: 460b mov r3, r1 8006cfc: 70fb strb r3, [r7, #3] return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; 8006cfe: 78fb ldrb r3, [r7, #3] 8006d00: f003 0207 and.w r2, r3, #7 8006d04: 6879 ldr r1, [r7, #4] 8006d06: 4613 mov r3, r2 8006d08: 009b lsls r3, r3, #2 8006d0a: 4413 add r3, r2 8006d0c: 00db lsls r3, r3, #3 8006d0e: 440b add r3, r1 8006d10: f503 73b6 add.w r3, r3, #364 @ 0x16c 8006d14: 681b ldr r3, [r3, #0] } 8006d16: 4618 mov r0, r3 8006d18: 370c adds r7, #12 8006d1a: 46bd mov sp, r7 8006d1c: bc80 pop {r7} 8006d1e: 4770 bx lr 08006d20 : * @param pBuf pointer to the transmission buffer * @param len amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8006d20: b580 push {r7, lr} 8006d22: b086 sub sp, #24 8006d24: af00 add r7, sp, #0 8006d26: 60f8 str r0, [r7, #12] 8006d28: 607a str r2, [r7, #4] 8006d2a: 603b str r3, [r7, #0] 8006d2c: 460b mov r3, r1 8006d2e: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8006d30: 7afb ldrb r3, [r7, #11] 8006d32: f003 0207 and.w r2, r3, #7 8006d36: 4613 mov r3, r2 8006d38: 009b lsls r3, r3, #2 8006d3a: 4413 add r3, r2 8006d3c: 00db lsls r3, r3, #3 8006d3e: 3310 adds r3, #16 8006d40: 68fa ldr r2, [r7, #12] 8006d42: 4413 add r3, r2 8006d44: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8006d46: 697b ldr r3, [r7, #20] 8006d48: 687a ldr r2, [r7, #4] 8006d4a: 615a str r2, [r3, #20] ep->xfer_len = len; 8006d4c: 697b ldr r3, [r7, #20] 8006d4e: 683a ldr r2, [r7, #0] 8006d50: 619a str r2, [r3, #24] #if defined (USB) ep->xfer_fill_db = 1U; 8006d52: 697b ldr r3, [r7, #20] 8006d54: 2201 movs r2, #1 8006d56: f883 2024 strb.w r2, [r3, #36] @ 0x24 ep->xfer_len_db = len; 8006d5a: 697b ldr r3, [r7, #20] 8006d5c: 683a ldr r2, [r7, #0] 8006d5e: 621a str r2, [r3, #32] #endif /* defined (USB) */ ep->xfer_count = 0U; 8006d60: 697b ldr r3, [r7, #20] 8006d62: 2200 movs r2, #0 8006d64: 61da str r2, [r3, #28] ep->is_in = 1U; 8006d66: 697b ldr r3, [r7, #20] 8006d68: 2201 movs r2, #1 8006d6a: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8006d6c: 7afb ldrb r3, [r7, #11] 8006d6e: f003 0307 and.w r3, r3, #7 8006d72: b2da uxtb r2, r3 8006d74: 697b ldr r3, [r7, #20] 8006d76: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8006d78: 68fb ldr r3, [r7, #12] 8006d7a: 681b ldr r3, [r3, #0] 8006d7c: 6979 ldr r1, [r7, #20] 8006d7e: 4618 mov r0, r3 8006d80: f003 fd3e bl 800a800 return HAL_OK; 8006d84: 2300 movs r3, #0 } 8006d86: 4618 mov r0, r3 8006d88: 3718 adds r7, #24 8006d8a: 46bd mov sp, r7 8006d8c: bd80 pop {r7, pc} 08006d8e : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8006d8e: b580 push {r7, lr} 8006d90: b084 sub sp, #16 8006d92: af00 add r7, sp, #0 8006d94: 6078 str r0, [r7, #4] 8006d96: 460b mov r3, r1 8006d98: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) 8006d9a: 78fb ldrb r3, [r7, #3] 8006d9c: f003 0307 and.w r3, r3, #7 8006da0: 687a ldr r2, [r7, #4] 8006da2: 7912 ldrb r2, [r2, #4] 8006da4: 4293 cmp r3, r2 8006da6: d901 bls.n 8006dac { return HAL_ERROR; 8006da8: 2301 movs r3, #1 8006daa: e04c b.n 8006e46 } if ((0x80U & ep_addr) == 0x80U) 8006dac: f997 3003 ldrsb.w r3, [r7, #3] 8006db0: 2b00 cmp r3, #0 8006db2: da0e bge.n 8006dd2 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8006db4: 78fb ldrb r3, [r7, #3] 8006db6: f003 0207 and.w r2, r3, #7 8006dba: 4613 mov r3, r2 8006dbc: 009b lsls r3, r3, #2 8006dbe: 4413 add r3, r2 8006dc0: 00db lsls r3, r3, #3 8006dc2: 3310 adds r3, #16 8006dc4: 687a ldr r2, [r7, #4] 8006dc6: 4413 add r3, r2 8006dc8: 60fb str r3, [r7, #12] ep->is_in = 1U; 8006dca: 68fb ldr r3, [r7, #12] 8006dcc: 2201 movs r2, #1 8006dce: 705a strb r2, [r3, #1] 8006dd0: e00c b.n 8006dec } else { ep = &hpcd->OUT_ep[ep_addr]; 8006dd2: 78fa ldrb r2, [r7, #3] 8006dd4: 4613 mov r3, r2 8006dd6: 009b lsls r3, r3, #2 8006dd8: 4413 add r3, r2 8006dda: 00db lsls r3, r3, #3 8006ddc: f503 73a8 add.w r3, r3, #336 @ 0x150 8006de0: 687a ldr r2, [r7, #4] 8006de2: 4413 add r3, r2 8006de4: 60fb str r3, [r7, #12] ep->is_in = 0U; 8006de6: 68fb ldr r3, [r7, #12] 8006de8: 2200 movs r2, #0 8006dea: 705a strb r2, [r3, #1] } ep->is_stall = 1U; 8006dec: 68fb ldr r3, [r7, #12] 8006dee: 2201 movs r2, #1 8006df0: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8006df2: 78fb ldrb r3, [r7, #3] 8006df4: f003 0307 and.w r3, r3, #7 8006df8: b2da uxtb r2, r3 8006dfa: 68fb ldr r3, [r7, #12] 8006dfc: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8006dfe: 687b ldr r3, [r7, #4] 8006e00: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8006e04: 2b01 cmp r3, #1 8006e06: d101 bne.n 8006e0c 8006e08: 2302 movs r3, #2 8006e0a: e01c b.n 8006e46 8006e0c: 687b ldr r3, [r7, #4] 8006e0e: 2201 movs r2, #1 8006e10: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPSetStall(hpcd->Instance, ep); 8006e14: 687b ldr r3, [r7, #4] 8006e16: 681b ldr r3, [r3, #0] 8006e18: 68f9 ldr r1, [r7, #12] 8006e1a: 4618 mov r0, r3 8006e1c: f005 f8a1 bl 800bf62 if ((ep_addr & EP_ADDR_MSK) == 0U) 8006e20: 78fb ldrb r3, [r7, #3] 8006e22: f003 0307 and.w r3, r3, #7 8006e26: 2b00 cmp r3, #0 8006e28: d108 bne.n 8006e3c { (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup); 8006e2a: 687b ldr r3, [r7, #4] 8006e2c: 681a ldr r2, [r3, #0] 8006e2e: 687b ldr r3, [r7, #4] 8006e30: f503 7326 add.w r3, r3, #664 @ 0x298 8006e34: 4619 mov r1, r3 8006e36: 4610 mov r0, r2 8006e38: f005 f9c6 bl 800c1c8 } __HAL_UNLOCK(hpcd); 8006e3c: 687b ldr r3, [r7, #4] 8006e3e: 2200 movs r2, #0 8006e40: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8006e44: 2300 movs r3, #0 } 8006e46: 4618 mov r0, r3 8006e48: 3710 adds r7, #16 8006e4a: 46bd mov sp, r7 8006e4c: bd80 pop {r7, pc} 08006e4e : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8006e4e: b580 push {r7, lr} 8006e50: b084 sub sp, #16 8006e52: af00 add r7, sp, #0 8006e54: 6078 str r0, [r7, #4] 8006e56: 460b mov r3, r1 8006e58: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) 8006e5a: 78fb ldrb r3, [r7, #3] 8006e5c: f003 030f and.w r3, r3, #15 8006e60: 687a ldr r2, [r7, #4] 8006e62: 7912 ldrb r2, [r2, #4] 8006e64: 4293 cmp r3, r2 8006e66: d901 bls.n 8006e6c { return HAL_ERROR; 8006e68: 2301 movs r3, #1 8006e6a: e040 b.n 8006eee } if ((0x80U & ep_addr) == 0x80U) 8006e6c: f997 3003 ldrsb.w r3, [r7, #3] 8006e70: 2b00 cmp r3, #0 8006e72: da0e bge.n 8006e92 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8006e74: 78fb ldrb r3, [r7, #3] 8006e76: f003 0207 and.w r2, r3, #7 8006e7a: 4613 mov r3, r2 8006e7c: 009b lsls r3, r3, #2 8006e7e: 4413 add r3, r2 8006e80: 00db lsls r3, r3, #3 8006e82: 3310 adds r3, #16 8006e84: 687a ldr r2, [r7, #4] 8006e86: 4413 add r3, r2 8006e88: 60fb str r3, [r7, #12] ep->is_in = 1U; 8006e8a: 68fb ldr r3, [r7, #12] 8006e8c: 2201 movs r2, #1 8006e8e: 705a strb r2, [r3, #1] 8006e90: e00e b.n 8006eb0 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8006e92: 78fb ldrb r3, [r7, #3] 8006e94: f003 0207 and.w r2, r3, #7 8006e98: 4613 mov r3, r2 8006e9a: 009b lsls r3, r3, #2 8006e9c: 4413 add r3, r2 8006e9e: 00db lsls r3, r3, #3 8006ea0: f503 73a8 add.w r3, r3, #336 @ 0x150 8006ea4: 687a ldr r2, [r7, #4] 8006ea6: 4413 add r3, r2 8006ea8: 60fb str r3, [r7, #12] ep->is_in = 0U; 8006eaa: 68fb ldr r3, [r7, #12] 8006eac: 2200 movs r2, #0 8006eae: 705a strb r2, [r3, #1] } ep->is_stall = 0U; 8006eb0: 68fb ldr r3, [r7, #12] 8006eb2: 2200 movs r2, #0 8006eb4: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8006eb6: 78fb ldrb r3, [r7, #3] 8006eb8: f003 0307 and.w r3, r3, #7 8006ebc: b2da uxtb r2, r3 8006ebe: 68fb ldr r3, [r7, #12] 8006ec0: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8006ec2: 687b ldr r3, [r7, #4] 8006ec4: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8006ec8: 2b01 cmp r3, #1 8006eca: d101 bne.n 8006ed0 8006ecc: 2302 movs r3, #2 8006ece: e00e b.n 8006eee 8006ed0: 687b ldr r3, [r7, #4] 8006ed2: 2201 movs r2, #1 8006ed4: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPClearStall(hpcd->Instance, ep); 8006ed8: 687b ldr r3, [r7, #4] 8006eda: 681b ldr r3, [r3, #0] 8006edc: 68f9 ldr r1, [r7, #12] 8006ede: 4618 mov r0, r3 8006ee0: f005 f88f bl 800c002 __HAL_UNLOCK(hpcd); 8006ee4: 687b ldr r3, [r7, #4] 8006ee6: 2200 movs r2, #0 8006ee8: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8006eec: 2300 movs r3, #0 } 8006eee: 4618 mov r0, r3 8006ef0: 3710 adds r7, #16 8006ef2: 46bd mov sp, r7 8006ef4: bd80 pop {r7, pc} 08006ef6 : * @brief This function handles PCD Endpoint interrupt request. * @param hpcd PCD handle * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) { 8006ef6: b580 push {r7, lr} 8006ef8: b096 sub sp, #88 @ 0x58 8006efa: af00 add r7, sp, #0 8006efc: 6078 str r0, [r7, #4] #if (USE_USB_DOUBLE_BUFFER != 1U) count = 0U; #endif /* USE_USB_DOUBLE_BUFFER */ /* stay in loop while pending interrupts */ while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 8006efe: e3bb b.n 8007678 { wIstr = hpcd->Instance->ISTR; 8006f00: 687b ldr r3, [r7, #4] 8006f02: 681b ldr r3, [r3, #0] 8006f04: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006f08: f8a7 304e strh.w r3, [r7, #78] @ 0x4e /* extract highest priority endpoint number */ epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); 8006f0c: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8006f10: b2db uxtb r3, r3 8006f12: f003 030f and.w r3, r3, #15 8006f16: f887 304d strb.w r3, [r7, #77] @ 0x4d if (epindex == 0U) 8006f1a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8006f1e: 2b00 cmp r3, #0 8006f20: f040 8175 bne.w 800720e { /* Decode and service control endpoint interrupt */ /* DIR bit = origin of the interrupt */ if ((wIstr & USB_ISTR_DIR) == 0U) 8006f24: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8006f28: f003 0310 and.w r3, r3, #16 8006f2c: 2b00 cmp r3, #0 8006f2e: d14e bne.n 8006fce { /* DIR = 0 */ /* DIR = 0 => IN int */ /* DIR = 0 implies that (EP_CTR_TX = 1) always */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); 8006f30: 687b ldr r3, [r7, #4] 8006f32: 681b ldr r3, [r3, #0] 8006f34: 881b ldrh r3, [r3, #0] 8006f36: b29b uxth r3, r3 8006f38: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 8006f3c: f023 0370 bic.w r3, r3, #112 @ 0x70 8006f40: 81fb strh r3, [r7, #14] 8006f42: 687b ldr r3, [r7, #4] 8006f44: 681a ldr r2, [r3, #0] 8006f46: 89fb ldrh r3, [r7, #14] 8006f48: ea6f 4343 mvn.w r3, r3, lsl #17 8006f4c: ea6f 4353 mvn.w r3, r3, lsr #17 8006f50: b29b uxth r3, r3 8006f52: 8013 strh r3, [r2, #0] ep = &hpcd->IN_ep[0]; 8006f54: 687b ldr r3, [r7, #4] 8006f56: 3310 adds r3, #16 8006f58: 657b str r3, [r7, #84] @ 0x54 ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 8006f5a: 687b ldr r3, [r7, #4] 8006f5c: 681b ldr r3, [r3, #0] 8006f5e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006f62: b29b uxth r3, r3 8006f64: 461a mov r2, r3 8006f66: 6d7b ldr r3, [r7, #84] @ 0x54 8006f68: 781b ldrb r3, [r3, #0] 8006f6a: 00db lsls r3, r3, #3 8006f6c: 4413 add r3, r2 8006f6e: 3302 adds r3, #2 8006f70: 005b lsls r3, r3, #1 8006f72: 687a ldr r2, [r7, #4] 8006f74: 6812 ldr r2, [r2, #0] 8006f76: 4413 add r3, r2 8006f78: f503 6380 add.w r3, r3, #1024 @ 0x400 8006f7c: 881b ldrh r3, [r3, #0] 8006f7e: f3c3 0209 ubfx r2, r3, #0, #10 8006f82: 6d7b ldr r3, [r7, #84] @ 0x54 8006f84: 61da str r2, [r3, #28] ep->xfer_buff += ep->xfer_count; 8006f86: 6d7b ldr r3, [r7, #84] @ 0x54 8006f88: 695a ldr r2, [r3, #20] 8006f8a: 6d7b ldr r3, [r7, #84] @ 0x54 8006f8c: 69db ldr r3, [r3, #28] 8006f8e: 441a add r2, r3 8006f90: 6d7b ldr r3, [r7, #84] @ 0x54 8006f92: 615a str r2, [r3, #20] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, 0U); #else HAL_PCD_DataInStageCallback(hpcd, 0U); 8006f94: 2100 movs r1, #0 8006f96: 6878 ldr r0, [r7, #4] 8006f98: f006 ffe5 bl 800df66 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U)) 8006f9c: 687b ldr r3, [r7, #4] 8006f9e: 7b5b ldrb r3, [r3, #13] 8006fa0: b2db uxtb r3, r3 8006fa2: 2b00 cmp r3, #0 8006fa4: f000 8368 beq.w 8007678 8006fa8: 6d7b ldr r3, [r7, #84] @ 0x54 8006faa: 699b ldr r3, [r3, #24] 8006fac: 2b00 cmp r3, #0 8006fae: f040 8363 bne.w 8007678 { hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF); 8006fb2: 687b ldr r3, [r7, #4] 8006fb4: 7b5b ldrb r3, [r3, #13] 8006fb6: b2db uxtb r3, r3 8006fb8: f063 037f orn r3, r3, #127 @ 0x7f 8006fbc: b2da uxtb r2, r3 8006fbe: 687b ldr r3, [r7, #4] 8006fc0: 681b ldr r3, [r3, #0] 8006fc2: f8a3 204c strh.w r2, [r3, #76] @ 0x4c hpcd->USB_Address = 0U; 8006fc6: 687b ldr r3, [r7, #4] 8006fc8: 2200 movs r2, #0 8006fca: 735a strb r2, [r3, #13] 8006fcc: e354 b.n 8007678 { /* DIR = 1 */ /* DIR = 1 & CTR_RX => SETUP or OUT int */ /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ ep = &hpcd->OUT_ep[0]; 8006fce: 687b ldr r3, [r7, #4] 8006fd0: f503 73a8 add.w r3, r3, #336 @ 0x150 8006fd4: 657b str r3, [r7, #84] @ 0x54 wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 8006fd6: 687b ldr r3, [r7, #4] 8006fd8: 681b ldr r3, [r3, #0] 8006fda: 881b ldrh r3, [r3, #0] 8006fdc: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_SETUP) != 0U) 8006fe0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8006fe4: f403 6300 and.w r3, r3, #2048 @ 0x800 8006fe8: 2b00 cmp r3, #0 8006fea: d034 beq.n 8007056 { /* Get SETUP Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8006fec: 687b ldr r3, [r7, #4] 8006fee: 681b ldr r3, [r3, #0] 8006ff0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006ff4: b29b uxth r3, r3 8006ff6: 461a mov r2, r3 8006ff8: 6d7b ldr r3, [r7, #84] @ 0x54 8006ffa: 781b ldrb r3, [r3, #0] 8006ffc: 00db lsls r3, r3, #3 8006ffe: 4413 add r3, r2 8007000: 3306 adds r3, #6 8007002: 005b lsls r3, r3, #1 8007004: 687a ldr r2, [r7, #4] 8007006: 6812 ldr r2, [r2, #0] 8007008: 4413 add r3, r2 800700a: f503 6380 add.w r3, r3, #1024 @ 0x400 800700e: 881b ldrh r3, [r3, #0] 8007010: f3c3 0209 ubfx r2, r3, #0, #10 8007014: 6d7b ldr r3, [r7, #84] @ 0x54 8007016: 61da str r2, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 8007018: 687b ldr r3, [r7, #4] 800701a: 6818 ldr r0, [r3, #0] 800701c: 687b ldr r3, [r7, #4] 800701e: f503 7126 add.w r1, r3, #664 @ 0x298 8007022: 6d7b ldr r3, [r7, #84] @ 0x54 8007024: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 8007026: 6d7b ldr r3, [r7, #84] @ 0x54 8007028: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 800702a: b29b uxth r3, r3 800702c: f005 f91d bl 800c26a /* SETUP bit kept frozen while CTR_RX = 1 */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 8007030: 687b ldr r3, [r7, #4] 8007032: 681b ldr r3, [r3, #0] 8007034: 881b ldrh r3, [r3, #0] 8007036: b29a uxth r2, r3 8007038: f640 738f movw r3, #3983 @ 0xf8f 800703c: 4013 ands r3, r2 800703e: 823b strh r3, [r7, #16] 8007040: 687b ldr r3, [r7, #4] 8007042: 681b ldr r3, [r3, #0] 8007044: 8a3a ldrh r2, [r7, #16] 8007046: f042 0280 orr.w r2, r2, #128 @ 0x80 800704a: b292 uxth r2, r2 800704c: 801a strh r2, [r3, #0] /* Process SETUP Packet*/ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SetupStageCallback(hpcd); #else HAL_PCD_SetupStageCallback(hpcd); 800704e: 6878 ldr r0, [r7, #4] 8007050: f006 ff5c bl 800df0c 8007054: e310 b.n 8007678 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else if ((wEPVal & USB_EP_CTR_RX) != 0U) 8007056: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 800705a: 2b00 cmp r3, #0 800705c: f280 830c bge.w 8007678 { PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 8007060: 687b ldr r3, [r7, #4] 8007062: 681b ldr r3, [r3, #0] 8007064: 881b ldrh r3, [r3, #0] 8007066: b29a uxth r2, r3 8007068: f640 738f movw r3, #3983 @ 0xf8f 800706c: 4013 ands r3, r2 800706e: 83fb strh r3, [r7, #30] 8007070: 687b ldr r3, [r7, #4] 8007072: 681b ldr r3, [r3, #0] 8007074: 8bfa ldrh r2, [r7, #30] 8007076: f042 0280 orr.w r2, r2, #128 @ 0x80 800707a: b292 uxth r2, r2 800707c: 801a strh r2, [r3, #0] /* Get Control Data OUT Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 800707e: 687b ldr r3, [r7, #4] 8007080: 681b ldr r3, [r3, #0] 8007082: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007086: b29b uxth r3, r3 8007088: 461a mov r2, r3 800708a: 6d7b ldr r3, [r7, #84] @ 0x54 800708c: 781b ldrb r3, [r3, #0] 800708e: 00db lsls r3, r3, #3 8007090: 4413 add r3, r2 8007092: 3306 adds r3, #6 8007094: 005b lsls r3, r3, #1 8007096: 687a ldr r2, [r7, #4] 8007098: 6812 ldr r2, [r2, #0] 800709a: 4413 add r3, r2 800709c: f503 6380 add.w r3, r3, #1024 @ 0x400 80070a0: 881b ldrh r3, [r3, #0] 80070a2: f3c3 0209 ubfx r2, r3, #0, #10 80070a6: 6d7b ldr r3, [r7, #84] @ 0x54 80070a8: 61da str r2, [r3, #28] if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) 80070aa: 6d7b ldr r3, [r7, #84] @ 0x54 80070ac: 69db ldr r3, [r3, #28] 80070ae: 2b00 cmp r3, #0 80070b0: d019 beq.n 80070e6 80070b2: 6d7b ldr r3, [r7, #84] @ 0x54 80070b4: 695b ldr r3, [r3, #20] 80070b6: 2b00 cmp r3, #0 80070b8: d015 beq.n 80070e6 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 80070ba: 687b ldr r3, [r7, #4] 80070bc: 6818 ldr r0, [r3, #0] 80070be: 6d7b ldr r3, [r7, #84] @ 0x54 80070c0: 6959 ldr r1, [r3, #20] 80070c2: 6d7b ldr r3, [r7, #84] @ 0x54 80070c4: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 80070c6: 6d7b ldr r3, [r7, #84] @ 0x54 80070c8: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 80070ca: b29b uxth r3, r3 80070cc: f005 f8cd bl 800c26a ep->xfer_buff += ep->xfer_count; 80070d0: 6d7b ldr r3, [r7, #84] @ 0x54 80070d2: 695a ldr r2, [r3, #20] 80070d4: 6d7b ldr r3, [r7, #84] @ 0x54 80070d6: 69db ldr r3, [r3, #28] 80070d8: 441a add r2, r3 80070da: 6d7b ldr r3, [r7, #84] @ 0x54 80070dc: 615a str r2, [r3, #20] /* Process Control Data OUT Packet */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, 0U); #else HAL_PCD_DataOutStageCallback(hpcd, 0U); 80070de: 2100 movs r1, #0 80070e0: 6878 ldr r0, [r7, #4] 80070e2: f006 ff25 bl 800df30 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 80070e6: 687b ldr r3, [r7, #4] 80070e8: 681b ldr r3, [r3, #0] 80070ea: 881b ldrh r3, [r3, #0] 80070ec: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) 80070f0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80070f4: f403 6300 and.w r3, r3, #2048 @ 0x800 80070f8: 2b00 cmp r3, #0 80070fa: f040 82bd bne.w 8007678 80070fe: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8007102: f403 5340 and.w r3, r3, #12288 @ 0x3000 8007106: f5b3 5f40 cmp.w r3, #12288 @ 0x3000 800710a: f000 82b5 beq.w 8007678 { PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); 800710e: 687b ldr r3, [r7, #4] 8007110: 681b ldr r3, [r3, #0] 8007112: 61bb str r3, [r7, #24] 8007114: 687b ldr r3, [r7, #4] 8007116: 681b ldr r3, [r3, #0] 8007118: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800711c: b29b uxth r3, r3 800711e: 461a mov r2, r3 8007120: 69bb ldr r3, [r7, #24] 8007122: 4413 add r3, r2 8007124: 61bb str r3, [r7, #24] 8007126: 69bb ldr r3, [r7, #24] 8007128: f203 430c addw r3, r3, #1036 @ 0x40c 800712c: 617b str r3, [r7, #20] 800712e: 697b ldr r3, [r7, #20] 8007130: 881b ldrh r3, [r3, #0] 8007132: b29b uxth r3, r3 8007134: f3c3 0309 ubfx r3, r3, #0, #10 8007138: b29a uxth r2, r3 800713a: 697b ldr r3, [r7, #20] 800713c: 801a strh r2, [r3, #0] 800713e: 6d7b ldr r3, [r7, #84] @ 0x54 8007140: 691b ldr r3, [r3, #16] 8007142: 2b3e cmp r3, #62 @ 0x3e 8007144: d91d bls.n 8007182 8007146: 6d7b ldr r3, [r7, #84] @ 0x54 8007148: 691b ldr r3, [r3, #16] 800714a: 095b lsrs r3, r3, #5 800714c: 647b str r3, [r7, #68] @ 0x44 800714e: 6d7b ldr r3, [r7, #84] @ 0x54 8007150: 691b ldr r3, [r3, #16] 8007152: f003 031f and.w r3, r3, #31 8007156: 2b00 cmp r3, #0 8007158: d102 bne.n 8007160 800715a: 6c7b ldr r3, [r7, #68] @ 0x44 800715c: 3b01 subs r3, #1 800715e: 647b str r3, [r7, #68] @ 0x44 8007160: 697b ldr r3, [r7, #20] 8007162: 881b ldrh r3, [r3, #0] 8007164: b29a uxth r2, r3 8007166: 6c7b ldr r3, [r7, #68] @ 0x44 8007168: b29b uxth r3, r3 800716a: 029b lsls r3, r3, #10 800716c: b29b uxth r3, r3 800716e: 4313 orrs r3, r2 8007170: b29b uxth r3, r3 8007172: ea6f 4343 mvn.w r3, r3, lsl #17 8007176: ea6f 4353 mvn.w r3, r3, lsr #17 800717a: b29a uxth r2, r3 800717c: 697b ldr r3, [r7, #20] 800717e: 801a strh r2, [r3, #0] 8007180: e026 b.n 80071d0 8007182: 6d7b ldr r3, [r7, #84] @ 0x54 8007184: 691b ldr r3, [r3, #16] 8007186: 2b00 cmp r3, #0 8007188: d10a bne.n 80071a0 800718a: 697b ldr r3, [r7, #20] 800718c: 881b ldrh r3, [r3, #0] 800718e: b29b uxth r3, r3 8007190: ea6f 4343 mvn.w r3, r3, lsl #17 8007194: ea6f 4353 mvn.w r3, r3, lsr #17 8007198: b29a uxth r2, r3 800719a: 697b ldr r3, [r7, #20] 800719c: 801a strh r2, [r3, #0] 800719e: e017 b.n 80071d0 80071a0: 6d7b ldr r3, [r7, #84] @ 0x54 80071a2: 691b ldr r3, [r3, #16] 80071a4: 085b lsrs r3, r3, #1 80071a6: 647b str r3, [r7, #68] @ 0x44 80071a8: 6d7b ldr r3, [r7, #84] @ 0x54 80071aa: 691b ldr r3, [r3, #16] 80071ac: f003 0301 and.w r3, r3, #1 80071b0: 2b00 cmp r3, #0 80071b2: d002 beq.n 80071ba 80071b4: 6c7b ldr r3, [r7, #68] @ 0x44 80071b6: 3301 adds r3, #1 80071b8: 647b str r3, [r7, #68] @ 0x44 80071ba: 697b ldr r3, [r7, #20] 80071bc: 881b ldrh r3, [r3, #0] 80071be: b29a uxth r2, r3 80071c0: 6c7b ldr r3, [r7, #68] @ 0x44 80071c2: b29b uxth r3, r3 80071c4: 029b lsls r3, r3, #10 80071c6: b29b uxth r3, r3 80071c8: 4313 orrs r3, r2 80071ca: b29a uxth r2, r3 80071cc: 697b ldr r3, [r7, #20] 80071ce: 801a strh r2, [r3, #0] PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); 80071d0: 687b ldr r3, [r7, #4] 80071d2: 681b ldr r3, [r3, #0] 80071d4: 881b ldrh r3, [r3, #0] 80071d6: b29b uxth r3, r3 80071d8: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80071dc: f023 0370 bic.w r3, r3, #112 @ 0x70 80071e0: 827b strh r3, [r7, #18] 80071e2: 8a7b ldrh r3, [r7, #18] 80071e4: f483 5380 eor.w r3, r3, #4096 @ 0x1000 80071e8: 827b strh r3, [r7, #18] 80071ea: 8a7b ldrh r3, [r7, #18] 80071ec: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80071f0: 827b strh r3, [r7, #18] 80071f2: 687b ldr r3, [r7, #4] 80071f4: 681a ldr r2, [r3, #0] 80071f6: 8a7b ldrh r3, [r7, #18] 80071f8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80071fc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007200: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007204: f043 0380 orr.w r3, r3, #128 @ 0x80 8007208: b29b uxth r3, r3 800720a: 8013 strh r3, [r2, #0] 800720c: e234 b.n 8007678 } else { /* Decode and service non control endpoints interrupt */ /* process related endpoint register */ wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); 800720e: 687b ldr r3, [r7, #4] 8007210: 681b ldr r3, [r3, #0] 8007212: 461a mov r2, r3 8007214: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8007218: 009b lsls r3, r3, #2 800721a: 4413 add r3, r2 800721c: 881b ldrh r3, [r3, #0] 800721e: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_CTR_RX) != 0U) 8007222: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 8007226: 2b00 cmp r3, #0 8007228: f280 80fc bge.w 8007424 { /* clear int flag */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); 800722c: 687b ldr r3, [r7, #4] 800722e: 681b ldr r3, [r3, #0] 8007230: 461a mov r2, r3 8007232: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8007236: 009b lsls r3, r3, #2 8007238: 4413 add r3, r2 800723a: 881b ldrh r3, [r3, #0] 800723c: b29a uxth r2, r3 800723e: f640 738f movw r3, #3983 @ 0xf8f 8007242: 4013 ands r3, r2 8007244: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 8007248: 687b ldr r3, [r7, #4] 800724a: 681b ldr r3, [r3, #0] 800724c: 461a mov r2, r3 800724e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8007252: 009b lsls r3, r3, #2 8007254: 4413 add r3, r2 8007256: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48 800725a: f042 0280 orr.w r2, r2, #128 @ 0x80 800725e: b292 uxth r2, r2 8007260: 801a strh r2, [r3, #0] ep = &hpcd->OUT_ep[epindex]; 8007262: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 8007266: 4613 mov r3, r2 8007268: 009b lsls r3, r3, #2 800726a: 4413 add r3, r2 800726c: 00db lsls r3, r3, #3 800726e: f503 73a8 add.w r3, r3, #336 @ 0x150 8007272: 687a ldr r2, [r7, #4] 8007274: 4413 add r3, r2 8007276: 657b str r3, [r7, #84] @ 0x54 /* OUT Single Buffering */ if (ep->doublebuffer == 0U) 8007278: 6d7b ldr r3, [r7, #84] @ 0x54 800727a: 7b1b ldrb r3, [r3, #12] 800727c: 2b00 cmp r3, #0 800727e: d125 bne.n 80072cc { count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8007280: 687b ldr r3, [r7, #4] 8007282: 681b ldr r3, [r3, #0] 8007284: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007288: b29b uxth r3, r3 800728a: 461a mov r2, r3 800728c: 6d7b ldr r3, [r7, #84] @ 0x54 800728e: 781b ldrb r3, [r3, #0] 8007290: 00db lsls r3, r3, #3 8007292: 4413 add r3, r2 8007294: 3306 adds r3, #6 8007296: 005b lsls r3, r3, #1 8007298: 687a ldr r2, [r7, #4] 800729a: 6812 ldr r2, [r2, #0] 800729c: 4413 add r3, r2 800729e: f503 6380 add.w r3, r3, #1024 @ 0x400 80072a2: 881b ldrh r3, [r3, #0] 80072a4: f3c3 0309 ubfx r3, r3, #0, #10 80072a8: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 80072ac: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80072b0: 2b00 cmp r3, #0 80072b2: f000 8092 beq.w 80073da { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); 80072b6: 687b ldr r3, [r7, #4] 80072b8: 6818 ldr r0, [r3, #0] 80072ba: 6d7b ldr r3, [r7, #84] @ 0x54 80072bc: 6959 ldr r1, [r3, #20] 80072be: 6d7b ldr r3, [r7, #84] @ 0x54 80072c0: 88da ldrh r2, [r3, #6] 80072c2: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80072c6: f004 ffd0 bl 800c26a 80072ca: e086 b.n 80073da } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* manage double buffer bulk out */ if (ep->type == EP_TYPE_BULK) 80072cc: 6d7b ldr r3, [r7, #84] @ 0x54 80072ce: 78db ldrb r3, [r3, #3] 80072d0: 2b02 cmp r3, #2 80072d2: d10a bne.n 80072ea { count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal); 80072d4: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80072d8: 461a mov r2, r3 80072da: 6d79 ldr r1, [r7, #84] @ 0x54 80072dc: 6878 ldr r0, [r7, #4] 80072de: f000 f9d9 bl 8007694 80072e2: 4603 mov r3, r0 80072e4: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 80072e8: e077 b.n 80073da } else /* manage double buffer iso out */ { /* free EP OUT Buffer */ PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 80072ea: 687b ldr r3, [r7, #4] 80072ec: 681b ldr r3, [r3, #0] 80072ee: 461a mov r2, r3 80072f0: 6d7b ldr r3, [r7, #84] @ 0x54 80072f2: 781b ldrb r3, [r3, #0] 80072f4: 009b lsls r3, r3, #2 80072f6: 4413 add r3, r2 80072f8: 881b ldrh r3, [r3, #0] 80072fa: b29b uxth r3, r3 80072fc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007300: f023 0370 bic.w r3, r3, #112 @ 0x70 8007304: f8a7 3052 strh.w r3, [r7, #82] @ 0x52 8007308: 687b ldr r3, [r7, #4] 800730a: 681b ldr r3, [r3, #0] 800730c: 461a mov r2, r3 800730e: 6d7b ldr r3, [r7, #84] @ 0x54 8007310: 781b ldrb r3, [r3, #0] 8007312: 009b lsls r3, r3, #2 8007314: 441a add r2, r3 8007316: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52 800731a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800731e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007322: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007326: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800732a: b29b uxth r3, r3 800732c: 8013 strh r3, [r2, #0] if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) 800732e: 687b ldr r3, [r7, #4] 8007330: 681b ldr r3, [r3, #0] 8007332: 461a mov r2, r3 8007334: 6d7b ldr r3, [r7, #84] @ 0x54 8007336: 781b ldrb r3, [r3, #0] 8007338: 009b lsls r3, r3, #2 800733a: 4413 add r3, r2 800733c: 881b ldrh r3, [r3, #0] 800733e: b29b uxth r3, r3 8007340: f403 4380 and.w r3, r3, #16384 @ 0x4000 8007344: 2b00 cmp r3, #0 8007346: d024 beq.n 8007392 { /* read from endpoint BUF0Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 8007348: 687b ldr r3, [r7, #4] 800734a: 681b ldr r3, [r3, #0] 800734c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007350: b29b uxth r3, r3 8007352: 461a mov r2, r3 8007354: 6d7b ldr r3, [r7, #84] @ 0x54 8007356: 781b ldrb r3, [r3, #0] 8007358: 00db lsls r3, r3, #3 800735a: 4413 add r3, r2 800735c: 3302 adds r3, #2 800735e: 005b lsls r3, r3, #1 8007360: 687a ldr r2, [r7, #4] 8007362: 6812 ldr r2, [r2, #0] 8007364: 4413 add r3, r2 8007366: f503 6380 add.w r3, r3, #1024 @ 0x400 800736a: 881b ldrh r3, [r3, #0] 800736c: f3c3 0309 ubfx r3, r3, #0, #10 8007370: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 8007374: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8007378: 2b00 cmp r3, #0 800737a: d02e beq.n 80073da { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 800737c: 687b ldr r3, [r7, #4] 800737e: 6818 ldr r0, [r3, #0] 8007380: 6d7b ldr r3, [r7, #84] @ 0x54 8007382: 6959 ldr r1, [r3, #20] 8007384: 6d7b ldr r3, [r7, #84] @ 0x54 8007386: 891a ldrh r2, [r3, #8] 8007388: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 800738c: f004 ff6d bl 800c26a 8007390: e023 b.n 80073da } } else { /* read from endpoint BUF1Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8007392: 687b ldr r3, [r7, #4] 8007394: 681b ldr r3, [r3, #0] 8007396: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800739a: b29b uxth r3, r3 800739c: 461a mov r2, r3 800739e: 6d7b ldr r3, [r7, #84] @ 0x54 80073a0: 781b ldrb r3, [r3, #0] 80073a2: 00db lsls r3, r3, #3 80073a4: 4413 add r3, r2 80073a6: 3306 adds r3, #6 80073a8: 005b lsls r3, r3, #1 80073aa: 687a ldr r2, [r7, #4] 80073ac: 6812 ldr r2, [r2, #0] 80073ae: 4413 add r3, r2 80073b0: f503 6380 add.w r3, r3, #1024 @ 0x400 80073b4: 881b ldrh r3, [r3, #0] 80073b6: f3c3 0309 ubfx r3, r3, #0, #10 80073ba: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 80073be: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80073c2: 2b00 cmp r3, #0 80073c4: d009 beq.n 80073da { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 80073c6: 687b ldr r3, [r7, #4] 80073c8: 6818 ldr r0, [r3, #0] 80073ca: 6d7b ldr r3, [r7, #84] @ 0x54 80073cc: 6959 ldr r1, [r3, #20] 80073ce: 6d7b ldr r3, [r7, #84] @ 0x54 80073d0: 895a ldrh r2, [r3, #10] 80073d2: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80073d6: f004 ff48 bl 800c26a } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; 80073da: 6d7b ldr r3, [r7, #84] @ 0x54 80073dc: 69da ldr r2, [r3, #28] 80073de: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80073e2: 441a add r2, r3 80073e4: 6d7b ldr r3, [r7, #84] @ 0x54 80073e6: 61da str r2, [r3, #28] ep->xfer_buff += count; 80073e8: 6d7b ldr r3, [r7, #84] @ 0x54 80073ea: 695a ldr r2, [r3, #20] 80073ec: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80073f0: 441a add r2, r3 80073f2: 6d7b ldr r3, [r7, #84] @ 0x54 80073f4: 615a str r2, [r3, #20] if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) 80073f6: 6d7b ldr r3, [r7, #84] @ 0x54 80073f8: 699b ldr r3, [r3, #24] 80073fa: 2b00 cmp r3, #0 80073fc: d005 beq.n 800740a 80073fe: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50 8007402: 6d7b ldr r3, [r7, #84] @ 0x54 8007404: 691b ldr r3, [r3, #16] 8007406: 429a cmp r2, r3 8007408: d206 bcs.n 8007418 { /* RX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, ep->num); #else HAL_PCD_DataOutStageCallback(hpcd, ep->num); 800740a: 6d7b ldr r3, [r7, #84] @ 0x54 800740c: 781b ldrb r3, [r3, #0] 800740e: 4619 mov r1, r3 8007410: 6878 ldr r0, [r7, #4] 8007412: f006 fd8d bl 800df30 8007416: e005 b.n 8007424 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { (void)USB_EPStartXfer(hpcd->Instance, ep); 8007418: 687b ldr r3, [r7, #4] 800741a: 681b ldr r3, [r3, #0] 800741c: 6d79 ldr r1, [r7, #84] @ 0x54 800741e: 4618 mov r0, r3 8007420: f003 f9ee bl 800a800 } } if ((wEPVal & USB_EP_CTR_TX) != 0U) 8007424: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8007428: f003 0380 and.w r3, r3, #128 @ 0x80 800742c: 2b00 cmp r3, #0 800742e: f000 8123 beq.w 8007678 { ep = &hpcd->IN_ep[epindex]; 8007432: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 8007436: 4613 mov r3, r2 8007438: 009b lsls r3, r3, #2 800743a: 4413 add r3, r2 800743c: 00db lsls r3, r3, #3 800743e: 3310 adds r3, #16 8007440: 687a ldr r2, [r7, #4] 8007442: 4413 add r3, r2 8007444: 657b str r3, [r7, #84] @ 0x54 /* clear int flag */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); 8007446: 687b ldr r3, [r7, #4] 8007448: 681b ldr r3, [r3, #0] 800744a: 461a mov r2, r3 800744c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8007450: 009b lsls r3, r3, #2 8007452: 4413 add r3, r2 8007454: 881b ldrh r3, [r3, #0] 8007456: b29b uxth r3, r3 8007458: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 800745c: f023 0370 bic.w r3, r3, #112 @ 0x70 8007460: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 8007464: 687b ldr r3, [r7, #4] 8007466: 681b ldr r3, [r3, #0] 8007468: 461a mov r2, r3 800746a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 800746e: 009b lsls r3, r3, #2 8007470: 441a add r2, r3 8007472: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 8007476: ea6f 4343 mvn.w r3, r3, lsl #17 800747a: ea6f 4353 mvn.w r3, r3, lsr #17 800747e: b29b uxth r3, r3 8007480: 8013 strh r3, [r2, #0] if (ep->type == EP_TYPE_ISOC) 8007482: 6d7b ldr r3, [r7, #84] @ 0x54 8007484: 78db ldrb r3, [r3, #3] 8007486: 2b01 cmp r3, #1 8007488: f040 80a2 bne.w 80075d0 { ep->xfer_len = 0U; 800748c: 6d7b ldr r3, [r7, #84] @ 0x54 800748e: 2200 movs r2, #0 8007490: 619a str r2, [r3, #24] #if (USE_USB_DOUBLE_BUFFER == 1U) if (ep->doublebuffer != 0U) 8007492: 6d7b ldr r3, [r7, #84] @ 0x54 8007494: 7b1b ldrb r3, [r3, #12] 8007496: 2b00 cmp r3, #0 8007498: f000 8093 beq.w 80075c2 { if ((wEPVal & USB_EP_DTOG_TX) != 0U) 800749c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80074a0: f003 0340 and.w r3, r3, #64 @ 0x40 80074a4: 2b00 cmp r3, #0 80074a6: d046 beq.n 8007536 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 80074a8: 6d7b ldr r3, [r7, #84] @ 0x54 80074aa: 785b ldrb r3, [r3, #1] 80074ac: 2b00 cmp r3, #0 80074ae: d126 bne.n 80074fe 80074b0: 687b ldr r3, [r7, #4] 80074b2: 681b ldr r3, [r3, #0] 80074b4: 627b str r3, [r7, #36] @ 0x24 80074b6: 687b ldr r3, [r7, #4] 80074b8: 681b ldr r3, [r3, #0] 80074ba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80074be: b29b uxth r3, r3 80074c0: 461a mov r2, r3 80074c2: 6a7b ldr r3, [r7, #36] @ 0x24 80074c4: 4413 add r3, r2 80074c6: 627b str r3, [r7, #36] @ 0x24 80074c8: 6d7b ldr r3, [r7, #84] @ 0x54 80074ca: 781b ldrb r3, [r3, #0] 80074cc: 011a lsls r2, r3, #4 80074ce: 6a7b ldr r3, [r7, #36] @ 0x24 80074d0: 4413 add r3, r2 80074d2: f203 4304 addw r3, r3, #1028 @ 0x404 80074d6: 623b str r3, [r7, #32] 80074d8: 6a3b ldr r3, [r7, #32] 80074da: 881b ldrh r3, [r3, #0] 80074dc: b29b uxth r3, r3 80074de: f3c3 0309 ubfx r3, r3, #0, #10 80074e2: b29a uxth r2, r3 80074e4: 6a3b ldr r3, [r7, #32] 80074e6: 801a strh r2, [r3, #0] 80074e8: 6a3b ldr r3, [r7, #32] 80074ea: 881b ldrh r3, [r3, #0] 80074ec: b29b uxth r3, r3 80074ee: ea6f 4343 mvn.w r3, r3, lsl #17 80074f2: ea6f 4353 mvn.w r3, r3, lsr #17 80074f6: b29a uxth r2, r3 80074f8: 6a3b ldr r3, [r7, #32] 80074fa: 801a strh r2, [r3, #0] 80074fc: e061 b.n 80075c2 80074fe: 6d7b ldr r3, [r7, #84] @ 0x54 8007500: 785b ldrb r3, [r3, #1] 8007502: 2b01 cmp r3, #1 8007504: d15d bne.n 80075c2 8007506: 687b ldr r3, [r7, #4] 8007508: 681b ldr r3, [r3, #0] 800750a: 62fb str r3, [r7, #44] @ 0x2c 800750c: 687b ldr r3, [r7, #4] 800750e: 681b ldr r3, [r3, #0] 8007510: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007514: b29b uxth r3, r3 8007516: 461a mov r2, r3 8007518: 6afb ldr r3, [r7, #44] @ 0x2c 800751a: 4413 add r3, r2 800751c: 62fb str r3, [r7, #44] @ 0x2c 800751e: 6d7b ldr r3, [r7, #84] @ 0x54 8007520: 781b ldrb r3, [r3, #0] 8007522: 011a lsls r2, r3, #4 8007524: 6afb ldr r3, [r7, #44] @ 0x2c 8007526: 4413 add r3, r2 8007528: f203 4304 addw r3, r3, #1028 @ 0x404 800752c: 62bb str r3, [r7, #40] @ 0x28 800752e: 6abb ldr r3, [r7, #40] @ 0x28 8007530: 2200 movs r2, #0 8007532: 801a strh r2, [r3, #0] 8007534: e045 b.n 80075c2 } else { PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8007536: 687b ldr r3, [r7, #4] 8007538: 681b ldr r3, [r3, #0] 800753a: 63fb str r3, [r7, #60] @ 0x3c 800753c: 6d7b ldr r3, [r7, #84] @ 0x54 800753e: 785b ldrb r3, [r3, #1] 8007540: 2b00 cmp r3, #0 8007542: d126 bne.n 8007592 8007544: 687b ldr r3, [r7, #4] 8007546: 681b ldr r3, [r3, #0] 8007548: 637b str r3, [r7, #52] @ 0x34 800754a: 687b ldr r3, [r7, #4] 800754c: 681b ldr r3, [r3, #0] 800754e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007552: b29b uxth r3, r3 8007554: 461a mov r2, r3 8007556: 6b7b ldr r3, [r7, #52] @ 0x34 8007558: 4413 add r3, r2 800755a: 637b str r3, [r7, #52] @ 0x34 800755c: 6d7b ldr r3, [r7, #84] @ 0x54 800755e: 781b ldrb r3, [r3, #0] 8007560: 011a lsls r2, r3, #4 8007562: 6b7b ldr r3, [r7, #52] @ 0x34 8007564: 4413 add r3, r2 8007566: f203 430c addw r3, r3, #1036 @ 0x40c 800756a: 633b str r3, [r7, #48] @ 0x30 800756c: 6b3b ldr r3, [r7, #48] @ 0x30 800756e: 881b ldrh r3, [r3, #0] 8007570: b29b uxth r3, r3 8007572: f3c3 0309 ubfx r3, r3, #0, #10 8007576: b29a uxth r2, r3 8007578: 6b3b ldr r3, [r7, #48] @ 0x30 800757a: 801a strh r2, [r3, #0] 800757c: 6b3b ldr r3, [r7, #48] @ 0x30 800757e: 881b ldrh r3, [r3, #0] 8007580: b29b uxth r3, r3 8007582: ea6f 4343 mvn.w r3, r3, lsl #17 8007586: ea6f 4353 mvn.w r3, r3, lsr #17 800758a: b29a uxth r2, r3 800758c: 6b3b ldr r3, [r7, #48] @ 0x30 800758e: 801a strh r2, [r3, #0] 8007590: e017 b.n 80075c2 8007592: 6d7b ldr r3, [r7, #84] @ 0x54 8007594: 785b ldrb r3, [r3, #1] 8007596: 2b01 cmp r3, #1 8007598: d113 bne.n 80075c2 800759a: 687b ldr r3, [r7, #4] 800759c: 681b ldr r3, [r3, #0] 800759e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80075a2: b29b uxth r3, r3 80075a4: 461a mov r2, r3 80075a6: 6bfb ldr r3, [r7, #60] @ 0x3c 80075a8: 4413 add r3, r2 80075aa: 63fb str r3, [r7, #60] @ 0x3c 80075ac: 6d7b ldr r3, [r7, #84] @ 0x54 80075ae: 781b ldrb r3, [r3, #0] 80075b0: 011a lsls r2, r3, #4 80075b2: 6bfb ldr r3, [r7, #60] @ 0x3c 80075b4: 4413 add r3, r2 80075b6: f203 430c addw r3, r3, #1036 @ 0x40c 80075ba: 63bb str r3, [r7, #56] @ 0x38 80075bc: 6bbb ldr r3, [r7, #56] @ 0x38 80075be: 2200 movs r2, #0 80075c0: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 80075c2: 6d7b ldr r3, [r7, #84] @ 0x54 80075c4: 781b ldrb r3, [r3, #0] 80075c6: 4619 mov r1, r3 80075c8: 6878 ldr r0, [r7, #4] 80075ca: f006 fccc bl 800df66 80075ce: e053 b.n 8007678 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Manage Single Buffer Transaction */ if ((wEPVal & USB_EP_KIND) == 0U) 80075d0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80075d4: f403 7380 and.w r3, r3, #256 @ 0x100 80075d8: 2b00 cmp r3, #0 80075da: d146 bne.n 800766a { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 80075dc: 687b ldr r3, [r7, #4] 80075de: 681b ldr r3, [r3, #0] 80075e0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80075e4: b29b uxth r3, r3 80075e6: 461a mov r2, r3 80075e8: 6d7b ldr r3, [r7, #84] @ 0x54 80075ea: 781b ldrb r3, [r3, #0] 80075ec: 00db lsls r3, r3, #3 80075ee: 4413 add r3, r2 80075f0: 3302 adds r3, #2 80075f2: 005b lsls r3, r3, #1 80075f4: 687a ldr r2, [r7, #4] 80075f6: 6812 ldr r2, [r2, #0] 80075f8: 4413 add r3, r2 80075fa: f503 6380 add.w r3, r3, #1024 @ 0x400 80075fe: 881b ldrh r3, [r3, #0] 8007600: f3c3 0309 ubfx r3, r3, #0, #10 8007604: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 if (ep->xfer_len > TxPctSize) 8007608: 6d7b ldr r3, [r7, #84] @ 0x54 800760a: 699a ldr r2, [r3, #24] 800760c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8007610: 429a cmp r2, r3 8007612: d907 bls.n 8007624 { ep->xfer_len -= TxPctSize; 8007614: 6d7b ldr r3, [r7, #84] @ 0x54 8007616: 699a ldr r2, [r3, #24] 8007618: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 800761c: 1ad2 subs r2, r2, r3 800761e: 6d7b ldr r3, [r7, #84] @ 0x54 8007620: 619a str r2, [r3, #24] 8007622: e002 b.n 800762a } else { ep->xfer_len = 0U; 8007624: 6d7b ldr r3, [r7, #84] @ 0x54 8007626: 2200 movs r2, #0 8007628: 619a str r2, [r3, #24] } /* Zero Length Packet? */ if (ep->xfer_len == 0U) 800762a: 6d7b ldr r3, [r7, #84] @ 0x54 800762c: 699b ldr r3, [r3, #24] 800762e: 2b00 cmp r3, #0 8007630: d106 bne.n 8007640 { /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8007632: 6d7b ldr r3, [r7, #84] @ 0x54 8007634: 781b ldrb r3, [r3, #0] 8007636: 4619 mov r1, r3 8007638: 6878 ldr r0, [r7, #4] 800763a: f006 fc94 bl 800df66 800763e: e01b b.n 8007678 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Transfer is not yet Done */ ep->xfer_buff += TxPctSize; 8007640: 6d7b ldr r3, [r7, #84] @ 0x54 8007642: 695a ldr r2, [r3, #20] 8007644: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8007648: 441a add r2, r3 800764a: 6d7b ldr r3, [r7, #84] @ 0x54 800764c: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 800764e: 6d7b ldr r3, [r7, #84] @ 0x54 8007650: 69da ldr r2, [r3, #28] 8007652: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8007656: 441a add r2, r3 8007658: 6d7b ldr r3, [r7, #84] @ 0x54 800765a: 61da str r2, [r3, #28] (void)USB_EPStartXfer(hpcd->Instance, ep); 800765c: 687b ldr r3, [r7, #4] 800765e: 681b ldr r3, [r3, #0] 8007660: 6d79 ldr r1, [r7, #84] @ 0x54 8007662: 4618 mov r0, r3 8007664: f003 f8cc bl 800a800 8007668: e006 b.n 8007678 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */ else { (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); 800766a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800766e: 461a mov r2, r3 8007670: 6d79 ldr r1, [r7, #84] @ 0x54 8007672: 6878 ldr r0, [r7, #4] 8007674: f000 f91b bl 80078ae while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 8007678: 687b ldr r3, [r7, #4] 800767a: 681b ldr r3, [r3, #0] 800767c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8007680: b29b uxth r3, r3 8007682: b21b sxth r3, r3 8007684: 2b00 cmp r3, #0 8007686: f6ff ac3b blt.w 8006f00 } } } } return HAL_OK; 800768a: 2300 movs r3, #0 } 800768c: 4618 mov r0, r3 800768e: 3758 adds r7, #88 @ 0x58 8007690: 46bd mov sp, r7 8007692: bd80 pop {r7, pc} 08007694 : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 8007694: b580 push {r7, lr} 8007696: b088 sub sp, #32 8007698: af00 add r7, sp, #0 800769a: 60f8 str r0, [r7, #12] 800769c: 60b9 str r1, [r7, #8] 800769e: 4613 mov r3, r2 80076a0: 80fb strh r3, [r7, #6] uint16_t count; /* Manage Buffer0 OUT */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 80076a2: 88fb ldrh r3, [r7, #6] 80076a4: f403 4380 and.w r3, r3, #16384 @ 0x4000 80076a8: 2b00 cmp r3, #0 80076aa: d07e beq.n 80077aa { /* Get count of received Data on buffer0 */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 80076ac: 68fb ldr r3, [r7, #12] 80076ae: 681b ldr r3, [r3, #0] 80076b0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80076b4: b29b uxth r3, r3 80076b6: 461a mov r2, r3 80076b8: 68bb ldr r3, [r7, #8] 80076ba: 781b ldrb r3, [r3, #0] 80076bc: 00db lsls r3, r3, #3 80076be: 4413 add r3, r2 80076c0: 3302 adds r3, #2 80076c2: 005b lsls r3, r3, #1 80076c4: 68fa ldr r2, [r7, #12] 80076c6: 6812 ldr r2, [r2, #0] 80076c8: 4413 add r3, r2 80076ca: f503 6380 add.w r3, r3, #1024 @ 0x400 80076ce: 881b ldrh r3, [r3, #0] 80076d0: f3c3 0309 ubfx r3, r3, #0, #10 80076d4: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 80076d6: 68bb ldr r3, [r7, #8] 80076d8: 699a ldr r2, [r3, #24] 80076da: 8b7b ldrh r3, [r7, #26] 80076dc: 429a cmp r2, r3 80076de: d306 bcc.n 80076ee { ep->xfer_len -= count; 80076e0: 68bb ldr r3, [r7, #8] 80076e2: 699a ldr r2, [r3, #24] 80076e4: 8b7b ldrh r3, [r7, #26] 80076e6: 1ad2 subs r2, r2, r3 80076e8: 68bb ldr r3, [r7, #8] 80076ea: 619a str r2, [r3, #24] 80076ec: e002 b.n 80076f4 } else { ep->xfer_len = 0U; 80076ee: 68bb ldr r3, [r7, #8] 80076f0: 2200 movs r2, #0 80076f2: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 80076f4: 68bb ldr r3, [r7, #8] 80076f6: 699b ldr r3, [r3, #24] 80076f8: 2b00 cmp r3, #0 80076fa: d123 bne.n 8007744 { /* set NAK to OUT endpoint since double buffer is enabled */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 80076fc: 68fb ldr r3, [r7, #12] 80076fe: 681b ldr r3, [r3, #0] 8007700: 461a mov r2, r3 8007702: 68bb ldr r3, [r7, #8] 8007704: 781b ldrb r3, [r3, #0] 8007706: 009b lsls r3, r3, #2 8007708: 4413 add r3, r2 800770a: 881b ldrh r3, [r3, #0] 800770c: b29b uxth r3, r3 800770e: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8007712: f023 0370 bic.w r3, r3, #112 @ 0x70 8007716: 833b strh r3, [r7, #24] 8007718: 8b3b ldrh r3, [r7, #24] 800771a: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800771e: 833b strh r3, [r7, #24] 8007720: 68fb ldr r3, [r7, #12] 8007722: 681b ldr r3, [r3, #0] 8007724: 461a mov r2, r3 8007726: 68bb ldr r3, [r7, #8] 8007728: 781b ldrb r3, [r3, #0] 800772a: 009b lsls r3, r3, #2 800772c: 441a add r2, r3 800772e: 8b3b ldrh r3, [r7, #24] 8007730: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007734: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007738: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800773c: f043 0380 orr.w r3, r3, #128 @ 0x80 8007740: b29b uxth r3, r3 8007742: 8013 strh r3, [r2, #0] } /* Check if Buffer1 is in blocked state which requires to toggle */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 8007744: 88fb ldrh r3, [r7, #6] 8007746: f003 0340 and.w r3, r3, #64 @ 0x40 800774a: 2b00 cmp r3, #0 800774c: d01f beq.n 800778e { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 800774e: 68fb ldr r3, [r7, #12] 8007750: 681b ldr r3, [r3, #0] 8007752: 461a mov r2, r3 8007754: 68bb ldr r3, [r7, #8] 8007756: 781b ldrb r3, [r3, #0] 8007758: 009b lsls r3, r3, #2 800775a: 4413 add r3, r2 800775c: 881b ldrh r3, [r3, #0] 800775e: b29b uxth r3, r3 8007760: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007764: f023 0370 bic.w r3, r3, #112 @ 0x70 8007768: 82fb strh r3, [r7, #22] 800776a: 68fb ldr r3, [r7, #12] 800776c: 681b ldr r3, [r3, #0] 800776e: 461a mov r2, r3 8007770: 68bb ldr r3, [r7, #8] 8007772: 781b ldrb r3, [r3, #0] 8007774: 009b lsls r3, r3, #2 8007776: 441a add r2, r3 8007778: 8afb ldrh r3, [r7, #22] 800777a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800777e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007782: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007786: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800778a: b29b uxth r3, r3 800778c: 8013 strh r3, [r2, #0] } if (count != 0U) 800778e: 8b7b ldrh r3, [r7, #26] 8007790: 2b00 cmp r3, #0 8007792: f000 8087 beq.w 80078a4 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 8007796: 68fb ldr r3, [r7, #12] 8007798: 6818 ldr r0, [r3, #0] 800779a: 68bb ldr r3, [r7, #8] 800779c: 6959 ldr r1, [r3, #20] 800779e: 68bb ldr r3, [r7, #8] 80077a0: 891a ldrh r2, [r3, #8] 80077a2: 8b7b ldrh r3, [r7, #26] 80077a4: f004 fd61 bl 800c26a 80077a8: e07c b.n 80078a4 } /* Manage Buffer 1 DTOG_RX=0 */ else { /* Get count of received data */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 80077aa: 68fb ldr r3, [r7, #12] 80077ac: 681b ldr r3, [r3, #0] 80077ae: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80077b2: b29b uxth r3, r3 80077b4: 461a mov r2, r3 80077b6: 68bb ldr r3, [r7, #8] 80077b8: 781b ldrb r3, [r3, #0] 80077ba: 00db lsls r3, r3, #3 80077bc: 4413 add r3, r2 80077be: 3306 adds r3, #6 80077c0: 005b lsls r3, r3, #1 80077c2: 68fa ldr r2, [r7, #12] 80077c4: 6812 ldr r2, [r2, #0] 80077c6: 4413 add r3, r2 80077c8: f503 6380 add.w r3, r3, #1024 @ 0x400 80077cc: 881b ldrh r3, [r3, #0] 80077ce: f3c3 0309 ubfx r3, r3, #0, #10 80077d2: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 80077d4: 68bb ldr r3, [r7, #8] 80077d6: 699a ldr r2, [r3, #24] 80077d8: 8b7b ldrh r3, [r7, #26] 80077da: 429a cmp r2, r3 80077dc: d306 bcc.n 80077ec { ep->xfer_len -= count; 80077de: 68bb ldr r3, [r7, #8] 80077e0: 699a ldr r2, [r3, #24] 80077e2: 8b7b ldrh r3, [r7, #26] 80077e4: 1ad2 subs r2, r2, r3 80077e6: 68bb ldr r3, [r7, #8] 80077e8: 619a str r2, [r3, #24] 80077ea: e002 b.n 80077f2 } else { ep->xfer_len = 0U; 80077ec: 68bb ldr r3, [r7, #8] 80077ee: 2200 movs r2, #0 80077f0: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 80077f2: 68bb ldr r3, [r7, #8] 80077f4: 699b ldr r3, [r3, #24] 80077f6: 2b00 cmp r3, #0 80077f8: d123 bne.n 8007842 { /* set NAK on the current endpoint */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 80077fa: 68fb ldr r3, [r7, #12] 80077fc: 681b ldr r3, [r3, #0] 80077fe: 461a mov r2, r3 8007800: 68bb ldr r3, [r7, #8] 8007802: 781b ldrb r3, [r3, #0] 8007804: 009b lsls r3, r3, #2 8007806: 4413 add r3, r2 8007808: 881b ldrh r3, [r3, #0] 800780a: b29b uxth r3, r3 800780c: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8007810: f023 0370 bic.w r3, r3, #112 @ 0x70 8007814: 83fb strh r3, [r7, #30] 8007816: 8bfb ldrh r3, [r7, #30] 8007818: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800781c: 83fb strh r3, [r7, #30] 800781e: 68fb ldr r3, [r7, #12] 8007820: 681b ldr r3, [r3, #0] 8007822: 461a mov r2, r3 8007824: 68bb ldr r3, [r7, #8] 8007826: 781b ldrb r3, [r3, #0] 8007828: 009b lsls r3, r3, #2 800782a: 441a add r2, r3 800782c: 8bfb ldrh r3, [r7, #30] 800782e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007832: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007836: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800783a: f043 0380 orr.w r3, r3, #128 @ 0x80 800783e: b29b uxth r3, r3 8007840: 8013 strh r3, [r2, #0] } /*Need to FreeUser Buffer*/ if ((wEPVal & USB_EP_DTOG_TX) == 0U) 8007842: 88fb ldrh r3, [r7, #6] 8007844: f003 0340 and.w r3, r3, #64 @ 0x40 8007848: 2b00 cmp r3, #0 800784a: d11f bne.n 800788c { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 800784c: 68fb ldr r3, [r7, #12] 800784e: 681b ldr r3, [r3, #0] 8007850: 461a mov r2, r3 8007852: 68bb ldr r3, [r7, #8] 8007854: 781b ldrb r3, [r3, #0] 8007856: 009b lsls r3, r3, #2 8007858: 4413 add r3, r2 800785a: 881b ldrh r3, [r3, #0] 800785c: b29b uxth r3, r3 800785e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007862: f023 0370 bic.w r3, r3, #112 @ 0x70 8007866: 83bb strh r3, [r7, #28] 8007868: 68fb ldr r3, [r7, #12] 800786a: 681b ldr r3, [r3, #0] 800786c: 461a mov r2, r3 800786e: 68bb ldr r3, [r7, #8] 8007870: 781b ldrb r3, [r3, #0] 8007872: 009b lsls r3, r3, #2 8007874: 441a add r2, r3 8007876: 8bbb ldrh r3, [r7, #28] 8007878: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800787c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007880: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007884: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8007888: b29b uxth r3, r3 800788a: 8013 strh r3, [r2, #0] } if (count != 0U) 800788c: 8b7b ldrh r3, [r7, #26] 800788e: 2b00 cmp r3, #0 8007890: d008 beq.n 80078a4 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 8007892: 68fb ldr r3, [r7, #12] 8007894: 6818 ldr r0, [r3, #0] 8007896: 68bb ldr r3, [r7, #8] 8007898: 6959 ldr r1, [r3, #20] 800789a: 68bb ldr r3, [r7, #8] 800789c: 895a ldrh r2, [r3, #10] 800789e: 8b7b ldrh r3, [r7, #26] 80078a0: f004 fce3 bl 800c26a } } return count; 80078a4: 8b7b ldrh r3, [r7, #26] } 80078a6: 4618 mov r0, r3 80078a8: 3720 adds r7, #32 80078aa: 46bd mov sp, r7 80078ac: bd80 pop {r7, pc} 080078ae : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 80078ae: b580 push {r7, lr} 80078b0: b0a4 sub sp, #144 @ 0x90 80078b2: af00 add r7, sp, #0 80078b4: 60f8 str r0, [r7, #12] 80078b6: 60b9 str r1, [r7, #8] 80078b8: 4613 mov r3, r2 80078ba: 80fb strh r3, [r7, #6] uint32_t len; uint16_t TxPctSize; /* Data Buffer0 ACK received */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 80078bc: 88fb ldrh r3, [r7, #6] 80078be: f003 0340 and.w r3, r3, #64 @ 0x40 80078c2: 2b00 cmp r3, #0 80078c4: f000 81dd beq.w 8007c82 { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 80078c8: 68fb ldr r3, [r7, #12] 80078ca: 681b ldr r3, [r3, #0] 80078cc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80078d0: b29b uxth r3, r3 80078d2: 461a mov r2, r3 80078d4: 68bb ldr r3, [r7, #8] 80078d6: 781b ldrb r3, [r3, #0] 80078d8: 00db lsls r3, r3, #3 80078da: 4413 add r3, r2 80078dc: 3302 adds r3, #2 80078de: 005b lsls r3, r3, #1 80078e0: 68fa ldr r2, [r7, #12] 80078e2: 6812 ldr r2, [r2, #0] 80078e4: 4413 add r3, r2 80078e6: f503 6380 add.w r3, r3, #1024 @ 0x400 80078ea: 881b ldrh r3, [r3, #0] 80078ec: f3c3 0309 ubfx r3, r3, #0, #10 80078f0: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len > TxPctSize) 80078f4: 68bb ldr r3, [r7, #8] 80078f6: 699a ldr r2, [r3, #24] 80078f8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80078fc: 429a cmp r2, r3 80078fe: d907 bls.n 8007910 { ep->xfer_len -= TxPctSize; 8007900: 68bb ldr r3, [r7, #8] 8007902: 699a ldr r2, [r3, #24] 8007904: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007908: 1ad2 subs r2, r2, r3 800790a: 68bb ldr r3, [r7, #8] 800790c: 619a str r2, [r3, #24] 800790e: e002 b.n 8007916 } else { ep->xfer_len = 0U; 8007910: 68bb ldr r3, [r7, #8] 8007912: 2200 movs r2, #0 8007914: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 8007916: 68bb ldr r3, [r7, #8] 8007918: 699b ldr r3, [r3, #24] 800791a: 2b00 cmp r3, #0 800791c: f040 80b9 bne.w 8007a92 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8007920: 68bb ldr r3, [r7, #8] 8007922: 785b ldrb r3, [r3, #1] 8007924: 2b00 cmp r3, #0 8007926: d126 bne.n 8007976 8007928: 68fb ldr r3, [r7, #12] 800792a: 681b ldr r3, [r3, #0] 800792c: 62fb str r3, [r7, #44] @ 0x2c 800792e: 68fb ldr r3, [r7, #12] 8007930: 681b ldr r3, [r3, #0] 8007932: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007936: b29b uxth r3, r3 8007938: 461a mov r2, r3 800793a: 6afb ldr r3, [r7, #44] @ 0x2c 800793c: 4413 add r3, r2 800793e: 62fb str r3, [r7, #44] @ 0x2c 8007940: 68bb ldr r3, [r7, #8] 8007942: 781b ldrb r3, [r3, #0] 8007944: 011a lsls r2, r3, #4 8007946: 6afb ldr r3, [r7, #44] @ 0x2c 8007948: 4413 add r3, r2 800794a: f203 4304 addw r3, r3, #1028 @ 0x404 800794e: 62bb str r3, [r7, #40] @ 0x28 8007950: 6abb ldr r3, [r7, #40] @ 0x28 8007952: 881b ldrh r3, [r3, #0] 8007954: b29b uxth r3, r3 8007956: f3c3 0309 ubfx r3, r3, #0, #10 800795a: b29a uxth r2, r3 800795c: 6abb ldr r3, [r7, #40] @ 0x28 800795e: 801a strh r2, [r3, #0] 8007960: 6abb ldr r3, [r7, #40] @ 0x28 8007962: 881b ldrh r3, [r3, #0] 8007964: b29b uxth r3, r3 8007966: ea6f 4343 mvn.w r3, r3, lsl #17 800796a: ea6f 4353 mvn.w r3, r3, lsr #17 800796e: b29a uxth r2, r3 8007970: 6abb ldr r3, [r7, #40] @ 0x28 8007972: 801a strh r2, [r3, #0] 8007974: e01a b.n 80079ac 8007976: 68bb ldr r3, [r7, #8] 8007978: 785b ldrb r3, [r3, #1] 800797a: 2b01 cmp r3, #1 800797c: d116 bne.n 80079ac 800797e: 68fb ldr r3, [r7, #12] 8007980: 681b ldr r3, [r3, #0] 8007982: 637b str r3, [r7, #52] @ 0x34 8007984: 68fb ldr r3, [r7, #12] 8007986: 681b ldr r3, [r3, #0] 8007988: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800798c: b29b uxth r3, r3 800798e: 461a mov r2, r3 8007990: 6b7b ldr r3, [r7, #52] @ 0x34 8007992: 4413 add r3, r2 8007994: 637b str r3, [r7, #52] @ 0x34 8007996: 68bb ldr r3, [r7, #8] 8007998: 781b ldrb r3, [r3, #0] 800799a: 011a lsls r2, r3, #4 800799c: 6b7b ldr r3, [r7, #52] @ 0x34 800799e: 4413 add r3, r2 80079a0: f203 4304 addw r3, r3, #1028 @ 0x404 80079a4: 633b str r3, [r7, #48] @ 0x30 80079a6: 6b3b ldr r3, [r7, #48] @ 0x30 80079a8: 2200 movs r2, #0 80079aa: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 80079ac: 68fb ldr r3, [r7, #12] 80079ae: 681b ldr r3, [r3, #0] 80079b0: 627b str r3, [r7, #36] @ 0x24 80079b2: 68bb ldr r3, [r7, #8] 80079b4: 785b ldrb r3, [r3, #1] 80079b6: 2b00 cmp r3, #0 80079b8: d126 bne.n 8007a08 80079ba: 68fb ldr r3, [r7, #12] 80079bc: 681b ldr r3, [r3, #0] 80079be: 61fb str r3, [r7, #28] 80079c0: 68fb ldr r3, [r7, #12] 80079c2: 681b ldr r3, [r3, #0] 80079c4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80079c8: b29b uxth r3, r3 80079ca: 461a mov r2, r3 80079cc: 69fb ldr r3, [r7, #28] 80079ce: 4413 add r3, r2 80079d0: 61fb str r3, [r7, #28] 80079d2: 68bb ldr r3, [r7, #8] 80079d4: 781b ldrb r3, [r3, #0] 80079d6: 011a lsls r2, r3, #4 80079d8: 69fb ldr r3, [r7, #28] 80079da: 4413 add r3, r2 80079dc: f203 430c addw r3, r3, #1036 @ 0x40c 80079e0: 61bb str r3, [r7, #24] 80079e2: 69bb ldr r3, [r7, #24] 80079e4: 881b ldrh r3, [r3, #0] 80079e6: b29b uxth r3, r3 80079e8: f3c3 0309 ubfx r3, r3, #0, #10 80079ec: b29a uxth r2, r3 80079ee: 69bb ldr r3, [r7, #24] 80079f0: 801a strh r2, [r3, #0] 80079f2: 69bb ldr r3, [r7, #24] 80079f4: 881b ldrh r3, [r3, #0] 80079f6: b29b uxth r3, r3 80079f8: ea6f 4343 mvn.w r3, r3, lsl #17 80079fc: ea6f 4353 mvn.w r3, r3, lsr #17 8007a00: b29a uxth r2, r3 8007a02: 69bb ldr r3, [r7, #24] 8007a04: 801a strh r2, [r3, #0] 8007a06: e017 b.n 8007a38 8007a08: 68bb ldr r3, [r7, #8] 8007a0a: 785b ldrb r3, [r3, #1] 8007a0c: 2b01 cmp r3, #1 8007a0e: d113 bne.n 8007a38 8007a10: 68fb ldr r3, [r7, #12] 8007a12: 681b ldr r3, [r3, #0] 8007a14: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007a18: b29b uxth r3, r3 8007a1a: 461a mov r2, r3 8007a1c: 6a7b ldr r3, [r7, #36] @ 0x24 8007a1e: 4413 add r3, r2 8007a20: 627b str r3, [r7, #36] @ 0x24 8007a22: 68bb ldr r3, [r7, #8] 8007a24: 781b ldrb r3, [r3, #0] 8007a26: 011a lsls r2, r3, #4 8007a28: 6a7b ldr r3, [r7, #36] @ 0x24 8007a2a: 4413 add r3, r2 8007a2c: f203 430c addw r3, r3, #1036 @ 0x40c 8007a30: 623b str r3, [r7, #32] 8007a32: 6a3b ldr r3, [r7, #32] 8007a34: 2200 movs r2, #0 8007a36: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8007a38: 68bb ldr r3, [r7, #8] 8007a3a: 781b ldrb r3, [r3, #0] 8007a3c: 4619 mov r1, r3 8007a3e: 68f8 ldr r0, [r7, #12] 8007a40: f006 fa91 bl 800df66 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8007a44: 88fb ldrh r3, [r7, #6] 8007a46: f403 4380 and.w r3, r3, #16384 @ 0x4000 8007a4a: 2b00 cmp r3, #0 8007a4c: f000 82fc beq.w 8008048 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8007a50: 68fb ldr r3, [r7, #12] 8007a52: 681b ldr r3, [r3, #0] 8007a54: 461a mov r2, r3 8007a56: 68bb ldr r3, [r7, #8] 8007a58: 781b ldrb r3, [r3, #0] 8007a5a: 009b lsls r3, r3, #2 8007a5c: 4413 add r3, r2 8007a5e: 881b ldrh r3, [r3, #0] 8007a60: b29b uxth r3, r3 8007a62: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007a66: f023 0370 bic.w r3, r3, #112 @ 0x70 8007a6a: 82fb strh r3, [r7, #22] 8007a6c: 68fb ldr r3, [r7, #12] 8007a6e: 681b ldr r3, [r3, #0] 8007a70: 461a mov r2, r3 8007a72: 68bb ldr r3, [r7, #8] 8007a74: 781b ldrb r3, [r3, #0] 8007a76: 009b lsls r3, r3, #2 8007a78: 441a add r2, r3 8007a7a: 8afb ldrh r3, [r7, #22] 8007a7c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007a80: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007a84: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007a88: f043 0380 orr.w r3, r3, #128 @ 0x80 8007a8c: b29b uxth r3, r3 8007a8e: 8013 strh r3, [r2, #0] 8007a90: e2da b.n 8008048 } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8007a92: 88fb ldrh r3, [r7, #6] 8007a94: f403 4380 and.w r3, r3, #16384 @ 0x4000 8007a98: 2b00 cmp r3, #0 8007a9a: d021 beq.n 8007ae0 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8007a9c: 68fb ldr r3, [r7, #12] 8007a9e: 681b ldr r3, [r3, #0] 8007aa0: 461a mov r2, r3 8007aa2: 68bb ldr r3, [r7, #8] 8007aa4: 781b ldrb r3, [r3, #0] 8007aa6: 009b lsls r3, r3, #2 8007aa8: 4413 add r3, r2 8007aaa: 881b ldrh r3, [r3, #0] 8007aac: b29b uxth r3, r3 8007aae: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007ab2: f023 0370 bic.w r3, r3, #112 @ 0x70 8007ab6: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8007aba: 68fb ldr r3, [r7, #12] 8007abc: 681b ldr r3, [r3, #0] 8007abe: 461a mov r2, r3 8007ac0: 68bb ldr r3, [r7, #8] 8007ac2: 781b ldrb r3, [r3, #0] 8007ac4: 009b lsls r3, r3, #2 8007ac6: 441a add r2, r3 8007ac8: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8007acc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007ad0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007ad4: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007ad8: f043 0380 orr.w r3, r3, #128 @ 0x80 8007adc: b29b uxth r3, r3 8007ade: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 8007ae0: 68bb ldr r3, [r7, #8] 8007ae2: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8007ae6: 2b01 cmp r3, #1 8007ae8: f040 82ae bne.w 8008048 { ep->xfer_buff += TxPctSize; 8007aec: 68bb ldr r3, [r7, #8] 8007aee: 695a ldr r2, [r3, #20] 8007af0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007af4: 441a add r2, r3 8007af6: 68bb ldr r3, [r7, #8] 8007af8: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8007afa: 68bb ldr r3, [r7, #8] 8007afc: 69da ldr r2, [r3, #28] 8007afe: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007b02: 441a add r2, r3 8007b04: 68bb ldr r3, [r7, #8] 8007b06: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8007b08: 68bb ldr r3, [r7, #8] 8007b0a: 6a1a ldr r2, [r3, #32] 8007b0c: 68bb ldr r3, [r7, #8] 8007b0e: 691b ldr r3, [r3, #16] 8007b10: 429a cmp r2, r3 8007b12: d30b bcc.n 8007b2c { len = ep->maxpacket; 8007b14: 68bb ldr r3, [r7, #8] 8007b16: 691b ldr r3, [r3, #16] 8007b18: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 8007b1c: 68bb ldr r3, [r7, #8] 8007b1e: 6a1a ldr r2, [r3, #32] 8007b20: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007b24: 1ad2 subs r2, r2, r3 8007b26: 68bb ldr r3, [r7, #8] 8007b28: 621a str r2, [r3, #32] 8007b2a: e017 b.n 8007b5c } else if (ep->xfer_len_db == 0U) 8007b2c: 68bb ldr r3, [r7, #8] 8007b2e: 6a1b ldr r3, [r3, #32] 8007b30: 2b00 cmp r3, #0 8007b32: d108 bne.n 8007b46 { len = TxPctSize; 8007b34: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007b38: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 8007b3c: 68bb ldr r3, [r7, #8] 8007b3e: 2200 movs r2, #0 8007b40: f883 2024 strb.w r2, [r3, #36] @ 0x24 8007b44: e00a b.n 8007b5c } else { ep->xfer_fill_db = 0U; 8007b46: 68bb ldr r3, [r7, #8] 8007b48: 2200 movs r2, #0 8007b4a: f883 2024 strb.w r2, [r3, #36] @ 0x24 len = ep->xfer_len_db; 8007b4e: 68bb ldr r3, [r7, #8] 8007b50: 6a1b ldr r3, [r3, #32] 8007b52: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8007b56: 68bb ldr r3, [r7, #8] 8007b58: 2200 movs r2, #0 8007b5a: 621a str r2, [r3, #32] } /* Write remaining Data to Buffer */ /* Set the Double buffer counter for pma buffer1 */ PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len); 8007b5c: 68bb ldr r3, [r7, #8] 8007b5e: 785b ldrb r3, [r3, #1] 8007b60: 2b00 cmp r3, #0 8007b62: d165 bne.n 8007c30 8007b64: 68fb ldr r3, [r7, #12] 8007b66: 681b ldr r3, [r3, #0] 8007b68: 63fb str r3, [r7, #60] @ 0x3c 8007b6a: 68fb ldr r3, [r7, #12] 8007b6c: 681b ldr r3, [r3, #0] 8007b6e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007b72: b29b uxth r3, r3 8007b74: 461a mov r2, r3 8007b76: 6bfb ldr r3, [r7, #60] @ 0x3c 8007b78: 4413 add r3, r2 8007b7a: 63fb str r3, [r7, #60] @ 0x3c 8007b7c: 68bb ldr r3, [r7, #8] 8007b7e: 781b ldrb r3, [r3, #0] 8007b80: 011a lsls r2, r3, #4 8007b82: 6bfb ldr r3, [r7, #60] @ 0x3c 8007b84: 4413 add r3, r2 8007b86: f203 4304 addw r3, r3, #1028 @ 0x404 8007b8a: 63bb str r3, [r7, #56] @ 0x38 8007b8c: 6bbb ldr r3, [r7, #56] @ 0x38 8007b8e: 881b ldrh r3, [r3, #0] 8007b90: b29b uxth r3, r3 8007b92: f3c3 0309 ubfx r3, r3, #0, #10 8007b96: b29a uxth r2, r3 8007b98: 6bbb ldr r3, [r7, #56] @ 0x38 8007b9a: 801a strh r2, [r3, #0] 8007b9c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007ba0: 2b3e cmp r3, #62 @ 0x3e 8007ba2: d91d bls.n 8007be0 8007ba4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007ba8: 095b lsrs r3, r3, #5 8007baa: 64bb str r3, [r7, #72] @ 0x48 8007bac: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007bb0: f003 031f and.w r3, r3, #31 8007bb4: 2b00 cmp r3, #0 8007bb6: d102 bne.n 8007bbe 8007bb8: 6cbb ldr r3, [r7, #72] @ 0x48 8007bba: 3b01 subs r3, #1 8007bbc: 64bb str r3, [r7, #72] @ 0x48 8007bbe: 6bbb ldr r3, [r7, #56] @ 0x38 8007bc0: 881b ldrh r3, [r3, #0] 8007bc2: b29a uxth r2, r3 8007bc4: 6cbb ldr r3, [r7, #72] @ 0x48 8007bc6: b29b uxth r3, r3 8007bc8: 029b lsls r3, r3, #10 8007bca: b29b uxth r3, r3 8007bcc: 4313 orrs r3, r2 8007bce: b29b uxth r3, r3 8007bd0: ea6f 4343 mvn.w r3, r3, lsl #17 8007bd4: ea6f 4353 mvn.w r3, r3, lsr #17 8007bd8: b29a uxth r2, r3 8007bda: 6bbb ldr r3, [r7, #56] @ 0x38 8007bdc: 801a strh r2, [r3, #0] 8007bde: e044 b.n 8007c6a 8007be0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007be4: 2b00 cmp r3, #0 8007be6: d10a bne.n 8007bfe 8007be8: 6bbb ldr r3, [r7, #56] @ 0x38 8007bea: 881b ldrh r3, [r3, #0] 8007bec: b29b uxth r3, r3 8007bee: ea6f 4343 mvn.w r3, r3, lsl #17 8007bf2: ea6f 4353 mvn.w r3, r3, lsr #17 8007bf6: b29a uxth r2, r3 8007bf8: 6bbb ldr r3, [r7, #56] @ 0x38 8007bfa: 801a strh r2, [r3, #0] 8007bfc: e035 b.n 8007c6a 8007bfe: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007c02: 085b lsrs r3, r3, #1 8007c04: 64bb str r3, [r7, #72] @ 0x48 8007c06: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007c0a: f003 0301 and.w r3, r3, #1 8007c0e: 2b00 cmp r3, #0 8007c10: d002 beq.n 8007c18 8007c12: 6cbb ldr r3, [r7, #72] @ 0x48 8007c14: 3301 adds r3, #1 8007c16: 64bb str r3, [r7, #72] @ 0x48 8007c18: 6bbb ldr r3, [r7, #56] @ 0x38 8007c1a: 881b ldrh r3, [r3, #0] 8007c1c: b29a uxth r2, r3 8007c1e: 6cbb ldr r3, [r7, #72] @ 0x48 8007c20: b29b uxth r3, r3 8007c22: 029b lsls r3, r3, #10 8007c24: b29b uxth r3, r3 8007c26: 4313 orrs r3, r2 8007c28: b29a uxth r2, r3 8007c2a: 6bbb ldr r3, [r7, #56] @ 0x38 8007c2c: 801a strh r2, [r3, #0] 8007c2e: e01c b.n 8007c6a 8007c30: 68bb ldr r3, [r7, #8] 8007c32: 785b ldrb r3, [r3, #1] 8007c34: 2b01 cmp r3, #1 8007c36: d118 bne.n 8007c6a 8007c38: 68fb ldr r3, [r7, #12] 8007c3a: 681b ldr r3, [r3, #0] 8007c3c: 647b str r3, [r7, #68] @ 0x44 8007c3e: 68fb ldr r3, [r7, #12] 8007c40: 681b ldr r3, [r3, #0] 8007c42: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007c46: b29b uxth r3, r3 8007c48: 461a mov r2, r3 8007c4a: 6c7b ldr r3, [r7, #68] @ 0x44 8007c4c: 4413 add r3, r2 8007c4e: 647b str r3, [r7, #68] @ 0x44 8007c50: 68bb ldr r3, [r7, #8] 8007c52: 781b ldrb r3, [r3, #0] 8007c54: 011a lsls r2, r3, #4 8007c56: 6c7b ldr r3, [r7, #68] @ 0x44 8007c58: 4413 add r3, r2 8007c5a: f203 4304 addw r3, r3, #1028 @ 0x404 8007c5e: 643b str r3, [r7, #64] @ 0x40 8007c60: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007c64: b29a uxth r2, r3 8007c66: 6c3b ldr r3, [r7, #64] @ 0x40 8007c68: 801a strh r2, [r3, #0] /* Copy user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len); 8007c6a: 68fb ldr r3, [r7, #12] 8007c6c: 6818 ldr r0, [r3, #0] 8007c6e: 68bb ldr r3, [r7, #8] 8007c70: 6959 ldr r1, [r3, #20] 8007c72: 68bb ldr r3, [r7, #8] 8007c74: 891a ldrh r2, [r3, #8] 8007c76: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007c7a: b29b uxth r3, r3 8007c7c: f004 faaf bl 800c1de 8007c80: e1e2 b.n 8008048 } } else /* Data Buffer1 ACK received */ { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8007c82: 68fb ldr r3, [r7, #12] 8007c84: 681b ldr r3, [r3, #0] 8007c86: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007c8a: b29b uxth r3, r3 8007c8c: 461a mov r2, r3 8007c8e: 68bb ldr r3, [r7, #8] 8007c90: 781b ldrb r3, [r3, #0] 8007c92: 00db lsls r3, r3, #3 8007c94: 4413 add r3, r2 8007c96: 3306 adds r3, #6 8007c98: 005b lsls r3, r3, #1 8007c9a: 68fa ldr r2, [r7, #12] 8007c9c: 6812 ldr r2, [r2, #0] 8007c9e: 4413 add r3, r2 8007ca0: f503 6380 add.w r3, r3, #1024 @ 0x400 8007ca4: 881b ldrh r3, [r3, #0] 8007ca6: f3c3 0309 ubfx r3, r3, #0, #10 8007caa: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len >= TxPctSize) 8007cae: 68bb ldr r3, [r7, #8] 8007cb0: 699a ldr r2, [r3, #24] 8007cb2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007cb6: 429a cmp r2, r3 8007cb8: d307 bcc.n 8007cca { ep->xfer_len -= TxPctSize; 8007cba: 68bb ldr r3, [r7, #8] 8007cbc: 699a ldr r2, [r3, #24] 8007cbe: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007cc2: 1ad2 subs r2, r2, r3 8007cc4: 68bb ldr r3, [r7, #8] 8007cc6: 619a str r2, [r3, #24] 8007cc8: e002 b.n 8007cd0 } else { ep->xfer_len = 0U; 8007cca: 68bb ldr r3, [r7, #8] 8007ccc: 2200 movs r2, #0 8007cce: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 8007cd0: 68bb ldr r3, [r7, #8] 8007cd2: 699b ldr r3, [r3, #24] 8007cd4: 2b00 cmp r3, #0 8007cd6: f040 80c0 bne.w 8007e5a { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8007cda: 68bb ldr r3, [r7, #8] 8007cdc: 785b ldrb r3, [r3, #1] 8007cde: 2b00 cmp r3, #0 8007ce0: d126 bne.n 8007d30 8007ce2: 68fb ldr r3, [r7, #12] 8007ce4: 681b ldr r3, [r3, #0] 8007ce6: 67fb str r3, [r7, #124] @ 0x7c 8007ce8: 68fb ldr r3, [r7, #12] 8007cea: 681b ldr r3, [r3, #0] 8007cec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007cf0: b29b uxth r3, r3 8007cf2: 461a mov r2, r3 8007cf4: 6ffb ldr r3, [r7, #124] @ 0x7c 8007cf6: 4413 add r3, r2 8007cf8: 67fb str r3, [r7, #124] @ 0x7c 8007cfa: 68bb ldr r3, [r7, #8] 8007cfc: 781b ldrb r3, [r3, #0] 8007cfe: 011a lsls r2, r3, #4 8007d00: 6ffb ldr r3, [r7, #124] @ 0x7c 8007d02: 4413 add r3, r2 8007d04: f203 4304 addw r3, r3, #1028 @ 0x404 8007d08: 67bb str r3, [r7, #120] @ 0x78 8007d0a: 6fbb ldr r3, [r7, #120] @ 0x78 8007d0c: 881b ldrh r3, [r3, #0] 8007d0e: b29b uxth r3, r3 8007d10: f3c3 0309 ubfx r3, r3, #0, #10 8007d14: b29a uxth r2, r3 8007d16: 6fbb ldr r3, [r7, #120] @ 0x78 8007d18: 801a strh r2, [r3, #0] 8007d1a: 6fbb ldr r3, [r7, #120] @ 0x78 8007d1c: 881b ldrh r3, [r3, #0] 8007d1e: b29b uxth r3, r3 8007d20: ea6f 4343 mvn.w r3, r3, lsl #17 8007d24: ea6f 4353 mvn.w r3, r3, lsr #17 8007d28: b29a uxth r2, r3 8007d2a: 6fbb ldr r3, [r7, #120] @ 0x78 8007d2c: 801a strh r2, [r3, #0] 8007d2e: e01a b.n 8007d66 8007d30: 68bb ldr r3, [r7, #8] 8007d32: 785b ldrb r3, [r3, #1] 8007d34: 2b01 cmp r3, #1 8007d36: d116 bne.n 8007d66 8007d38: 68fb ldr r3, [r7, #12] 8007d3a: 681b ldr r3, [r3, #0] 8007d3c: 667b str r3, [r7, #100] @ 0x64 8007d3e: 68fb ldr r3, [r7, #12] 8007d40: 681b ldr r3, [r3, #0] 8007d42: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007d46: b29b uxth r3, r3 8007d48: 461a mov r2, r3 8007d4a: 6e7b ldr r3, [r7, #100] @ 0x64 8007d4c: 4413 add r3, r2 8007d4e: 667b str r3, [r7, #100] @ 0x64 8007d50: 68bb ldr r3, [r7, #8] 8007d52: 781b ldrb r3, [r3, #0] 8007d54: 011a lsls r2, r3, #4 8007d56: 6e7b ldr r3, [r7, #100] @ 0x64 8007d58: 4413 add r3, r2 8007d5a: f203 4304 addw r3, r3, #1028 @ 0x404 8007d5e: 663b str r3, [r7, #96] @ 0x60 8007d60: 6e3b ldr r3, [r7, #96] @ 0x60 8007d62: 2200 movs r2, #0 8007d64: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8007d66: 68fb ldr r3, [r7, #12] 8007d68: 681b ldr r3, [r3, #0] 8007d6a: 677b str r3, [r7, #116] @ 0x74 8007d6c: 68bb ldr r3, [r7, #8] 8007d6e: 785b ldrb r3, [r3, #1] 8007d70: 2b00 cmp r3, #0 8007d72: d12b bne.n 8007dcc 8007d74: 68fb ldr r3, [r7, #12] 8007d76: 681b ldr r3, [r3, #0] 8007d78: 66fb str r3, [r7, #108] @ 0x6c 8007d7a: 68fb ldr r3, [r7, #12] 8007d7c: 681b ldr r3, [r3, #0] 8007d7e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007d82: b29b uxth r3, r3 8007d84: 461a mov r2, r3 8007d86: 6efb ldr r3, [r7, #108] @ 0x6c 8007d88: 4413 add r3, r2 8007d8a: 66fb str r3, [r7, #108] @ 0x6c 8007d8c: 68bb ldr r3, [r7, #8] 8007d8e: 781b ldrb r3, [r3, #0] 8007d90: 011a lsls r2, r3, #4 8007d92: 6efb ldr r3, [r7, #108] @ 0x6c 8007d94: 4413 add r3, r2 8007d96: f203 430c addw r3, r3, #1036 @ 0x40c 8007d9a: f8c7 3080 str.w r3, [r7, #128] @ 0x80 8007d9e: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8007da2: 881b ldrh r3, [r3, #0] 8007da4: b29b uxth r3, r3 8007da6: f3c3 0309 ubfx r3, r3, #0, #10 8007daa: b29a uxth r2, r3 8007dac: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8007db0: 801a strh r2, [r3, #0] 8007db2: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8007db6: 881b ldrh r3, [r3, #0] 8007db8: b29b uxth r3, r3 8007dba: ea6f 4343 mvn.w r3, r3, lsl #17 8007dbe: ea6f 4353 mvn.w r3, r3, lsr #17 8007dc2: b29a uxth r2, r3 8007dc4: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8007dc8: 801a strh r2, [r3, #0] 8007dca: e017 b.n 8007dfc 8007dcc: 68bb ldr r3, [r7, #8] 8007dce: 785b ldrb r3, [r3, #1] 8007dd0: 2b01 cmp r3, #1 8007dd2: d113 bne.n 8007dfc 8007dd4: 68fb ldr r3, [r7, #12] 8007dd6: 681b ldr r3, [r3, #0] 8007dd8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007ddc: b29b uxth r3, r3 8007dde: 461a mov r2, r3 8007de0: 6f7b ldr r3, [r7, #116] @ 0x74 8007de2: 4413 add r3, r2 8007de4: 677b str r3, [r7, #116] @ 0x74 8007de6: 68bb ldr r3, [r7, #8] 8007de8: 781b ldrb r3, [r3, #0] 8007dea: 011a lsls r2, r3, #4 8007dec: 6f7b ldr r3, [r7, #116] @ 0x74 8007dee: 4413 add r3, r2 8007df0: f203 430c addw r3, r3, #1036 @ 0x40c 8007df4: 673b str r3, [r7, #112] @ 0x70 8007df6: 6f3b ldr r3, [r7, #112] @ 0x70 8007df8: 2200 movs r2, #0 8007dfa: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8007dfc: 68bb ldr r3, [r7, #8] 8007dfe: 781b ldrb r3, [r3, #0] 8007e00: 4619 mov r1, r3 8007e02: 68f8 ldr r0, [r7, #12] 8007e04: f006 f8af bl 800df66 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8007e08: 88fb ldrh r3, [r7, #6] 8007e0a: f403 4380 and.w r3, r3, #16384 @ 0x4000 8007e0e: 2b00 cmp r3, #0 8007e10: f040 811a bne.w 8008048 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8007e14: 68fb ldr r3, [r7, #12] 8007e16: 681b ldr r3, [r3, #0] 8007e18: 461a mov r2, r3 8007e1a: 68bb ldr r3, [r7, #8] 8007e1c: 781b ldrb r3, [r3, #0] 8007e1e: 009b lsls r3, r3, #2 8007e20: 4413 add r3, r2 8007e22: 881b ldrh r3, [r3, #0] 8007e24: b29b uxth r3, r3 8007e26: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007e2a: f023 0370 bic.w r3, r3, #112 @ 0x70 8007e2e: f8a7 3088 strh.w r3, [r7, #136] @ 0x88 8007e32: 68fb ldr r3, [r7, #12] 8007e34: 681b ldr r3, [r3, #0] 8007e36: 461a mov r2, r3 8007e38: 68bb ldr r3, [r7, #8] 8007e3a: 781b ldrb r3, [r3, #0] 8007e3c: 009b lsls r3, r3, #2 8007e3e: 441a add r2, r3 8007e40: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88 8007e44: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007e48: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007e4c: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007e50: f043 0380 orr.w r3, r3, #128 @ 0x80 8007e54: b29b uxth r3, r3 8007e56: 8013 strh r3, [r2, #0] 8007e58: e0f6 b.n 8008048 } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8007e5a: 88fb ldrh r3, [r7, #6] 8007e5c: f403 4380 and.w r3, r3, #16384 @ 0x4000 8007e60: 2b00 cmp r3, #0 8007e62: d121 bne.n 8007ea8 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8007e64: 68fb ldr r3, [r7, #12] 8007e66: 681b ldr r3, [r3, #0] 8007e68: 461a mov r2, r3 8007e6a: 68bb ldr r3, [r7, #8] 8007e6c: 781b ldrb r3, [r3, #0] 8007e6e: 009b lsls r3, r3, #2 8007e70: 4413 add r3, r2 8007e72: 881b ldrh r3, [r3, #0] 8007e74: b29b uxth r3, r3 8007e76: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007e7a: f023 0370 bic.w r3, r3, #112 @ 0x70 8007e7e: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 8007e82: 68fb ldr r3, [r7, #12] 8007e84: 681b ldr r3, [r3, #0] 8007e86: 461a mov r2, r3 8007e88: 68bb ldr r3, [r7, #8] 8007e8a: 781b ldrb r3, [r3, #0] 8007e8c: 009b lsls r3, r3, #2 8007e8e: 441a add r2, r3 8007e90: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8007e94: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007e98: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007e9c: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007ea0: f043 0380 orr.w r3, r3, #128 @ 0x80 8007ea4: b29b uxth r3, r3 8007ea6: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 8007ea8: 68bb ldr r3, [r7, #8] 8007eaa: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8007eae: 2b01 cmp r3, #1 8007eb0: f040 80ca bne.w 8008048 { ep->xfer_buff += TxPctSize; 8007eb4: 68bb ldr r3, [r7, #8] 8007eb6: 695a ldr r2, [r3, #20] 8007eb8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007ebc: 441a add r2, r3 8007ebe: 68bb ldr r3, [r7, #8] 8007ec0: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8007ec2: 68bb ldr r3, [r7, #8] 8007ec4: 69da ldr r2, [r3, #28] 8007ec6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007eca: 441a add r2, r3 8007ecc: 68bb ldr r3, [r7, #8] 8007ece: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8007ed0: 68bb ldr r3, [r7, #8] 8007ed2: 6a1a ldr r2, [r3, #32] 8007ed4: 68bb ldr r3, [r7, #8] 8007ed6: 691b ldr r3, [r3, #16] 8007ed8: 429a cmp r2, r3 8007eda: d30b bcc.n 8007ef4 { len = ep->maxpacket; 8007edc: 68bb ldr r3, [r7, #8] 8007ede: 691b ldr r3, [r3, #16] 8007ee0: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 8007ee4: 68bb ldr r3, [r7, #8] 8007ee6: 6a1a ldr r2, [r3, #32] 8007ee8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007eec: 1ad2 subs r2, r2, r3 8007eee: 68bb ldr r3, [r7, #8] 8007ef0: 621a str r2, [r3, #32] 8007ef2: e017 b.n 8007f24 } else if (ep->xfer_len_db == 0U) 8007ef4: 68bb ldr r3, [r7, #8] 8007ef6: 6a1b ldr r3, [r3, #32] 8007ef8: 2b00 cmp r3, #0 8007efa: d108 bne.n 8007f0e { len = TxPctSize; 8007efc: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007f00: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 8007f04: 68bb ldr r3, [r7, #8] 8007f06: 2200 movs r2, #0 8007f08: f883 2024 strb.w r2, [r3, #36] @ 0x24 8007f0c: e00a b.n 8007f24 } else { len = ep->xfer_len_db; 8007f0e: 68bb ldr r3, [r7, #8] 8007f10: 6a1b ldr r3, [r3, #32] 8007f12: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8007f16: 68bb ldr r3, [r7, #8] 8007f18: 2200 movs r2, #0 8007f1a: 621a str r2, [r3, #32] ep->xfer_fill_db = 0; 8007f1c: 68bb ldr r3, [r7, #8] 8007f1e: 2200 movs r2, #0 8007f20: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len); 8007f24: 68fb ldr r3, [r7, #12] 8007f26: 681b ldr r3, [r3, #0] 8007f28: 657b str r3, [r7, #84] @ 0x54 8007f2a: 68bb ldr r3, [r7, #8] 8007f2c: 785b ldrb r3, [r3, #1] 8007f2e: 2b00 cmp r3, #0 8007f30: d165 bne.n 8007ffe 8007f32: 68fb ldr r3, [r7, #12] 8007f34: 681b ldr r3, [r3, #0] 8007f36: 65fb str r3, [r7, #92] @ 0x5c 8007f38: 68fb ldr r3, [r7, #12] 8007f3a: 681b ldr r3, [r3, #0] 8007f3c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007f40: b29b uxth r3, r3 8007f42: 461a mov r2, r3 8007f44: 6dfb ldr r3, [r7, #92] @ 0x5c 8007f46: 4413 add r3, r2 8007f48: 65fb str r3, [r7, #92] @ 0x5c 8007f4a: 68bb ldr r3, [r7, #8] 8007f4c: 781b ldrb r3, [r3, #0] 8007f4e: 011a lsls r2, r3, #4 8007f50: 6dfb ldr r3, [r7, #92] @ 0x5c 8007f52: 4413 add r3, r2 8007f54: f203 430c addw r3, r3, #1036 @ 0x40c 8007f58: 65bb str r3, [r7, #88] @ 0x58 8007f5a: 6dbb ldr r3, [r7, #88] @ 0x58 8007f5c: 881b ldrh r3, [r3, #0] 8007f5e: b29b uxth r3, r3 8007f60: f3c3 0309 ubfx r3, r3, #0, #10 8007f64: b29a uxth r2, r3 8007f66: 6dbb ldr r3, [r7, #88] @ 0x58 8007f68: 801a strh r2, [r3, #0] 8007f6a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007f6e: 2b3e cmp r3, #62 @ 0x3e 8007f70: d91d bls.n 8007fae 8007f72: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007f76: 095b lsrs r3, r3, #5 8007f78: 66bb str r3, [r7, #104] @ 0x68 8007f7a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007f7e: f003 031f and.w r3, r3, #31 8007f82: 2b00 cmp r3, #0 8007f84: d102 bne.n 8007f8c 8007f86: 6ebb ldr r3, [r7, #104] @ 0x68 8007f88: 3b01 subs r3, #1 8007f8a: 66bb str r3, [r7, #104] @ 0x68 8007f8c: 6dbb ldr r3, [r7, #88] @ 0x58 8007f8e: 881b ldrh r3, [r3, #0] 8007f90: b29a uxth r2, r3 8007f92: 6ebb ldr r3, [r7, #104] @ 0x68 8007f94: b29b uxth r3, r3 8007f96: 029b lsls r3, r3, #10 8007f98: b29b uxth r3, r3 8007f9a: 4313 orrs r3, r2 8007f9c: b29b uxth r3, r3 8007f9e: ea6f 4343 mvn.w r3, r3, lsl #17 8007fa2: ea6f 4353 mvn.w r3, r3, lsr #17 8007fa6: b29a uxth r2, r3 8007fa8: 6dbb ldr r3, [r7, #88] @ 0x58 8007faa: 801a strh r2, [r3, #0] 8007fac: e041 b.n 8008032 8007fae: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007fb2: 2b00 cmp r3, #0 8007fb4: d10a bne.n 8007fcc 8007fb6: 6dbb ldr r3, [r7, #88] @ 0x58 8007fb8: 881b ldrh r3, [r3, #0] 8007fba: b29b uxth r3, r3 8007fbc: ea6f 4343 mvn.w r3, r3, lsl #17 8007fc0: ea6f 4353 mvn.w r3, r3, lsr #17 8007fc4: b29a uxth r2, r3 8007fc6: 6dbb ldr r3, [r7, #88] @ 0x58 8007fc8: 801a strh r2, [r3, #0] 8007fca: e032 b.n 8008032 8007fcc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007fd0: 085b lsrs r3, r3, #1 8007fd2: 66bb str r3, [r7, #104] @ 0x68 8007fd4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007fd8: f003 0301 and.w r3, r3, #1 8007fdc: 2b00 cmp r3, #0 8007fde: d002 beq.n 8007fe6 8007fe0: 6ebb ldr r3, [r7, #104] @ 0x68 8007fe2: 3301 adds r3, #1 8007fe4: 66bb str r3, [r7, #104] @ 0x68 8007fe6: 6dbb ldr r3, [r7, #88] @ 0x58 8007fe8: 881b ldrh r3, [r3, #0] 8007fea: b29a uxth r2, r3 8007fec: 6ebb ldr r3, [r7, #104] @ 0x68 8007fee: b29b uxth r3, r3 8007ff0: 029b lsls r3, r3, #10 8007ff2: b29b uxth r3, r3 8007ff4: 4313 orrs r3, r2 8007ff6: b29a uxth r2, r3 8007ff8: 6dbb ldr r3, [r7, #88] @ 0x58 8007ffa: 801a strh r2, [r3, #0] 8007ffc: e019 b.n 8008032 8007ffe: 68bb ldr r3, [r7, #8] 8008000: 785b ldrb r3, [r3, #1] 8008002: 2b01 cmp r3, #1 8008004: d115 bne.n 8008032 8008006: 68fb ldr r3, [r7, #12] 8008008: 681b ldr r3, [r3, #0] 800800a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800800e: b29b uxth r3, r3 8008010: 461a mov r2, r3 8008012: 6d7b ldr r3, [r7, #84] @ 0x54 8008014: 4413 add r3, r2 8008016: 657b str r3, [r7, #84] @ 0x54 8008018: 68bb ldr r3, [r7, #8] 800801a: 781b ldrb r3, [r3, #0] 800801c: 011a lsls r2, r3, #4 800801e: 6d7b ldr r3, [r7, #84] @ 0x54 8008020: 4413 add r3, r2 8008022: f203 430c addw r3, r3, #1036 @ 0x40c 8008026: 653b str r3, [r7, #80] @ 0x50 8008028: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800802c: b29a uxth r2, r3 800802e: 6d3b ldr r3, [r7, #80] @ 0x50 8008030: 801a strh r2, [r3, #0] /* Copy the user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len); 8008032: 68fb ldr r3, [r7, #12] 8008034: 6818 ldr r0, [r3, #0] 8008036: 68bb ldr r3, [r7, #8] 8008038: 6959 ldr r1, [r3, #20] 800803a: 68bb ldr r3, [r7, #8] 800803c: 895a ldrh r2, [r3, #10] 800803e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8008042: b29b uxth r3, r3 8008044: f004 f8cb bl 800c1de } } } /*enable endpoint IN*/ PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID); 8008048: 68fb ldr r3, [r7, #12] 800804a: 681b ldr r3, [r3, #0] 800804c: 461a mov r2, r3 800804e: 68bb ldr r3, [r7, #8] 8008050: 781b ldrb r3, [r3, #0] 8008052: 009b lsls r3, r3, #2 8008054: 4413 add r3, r2 8008056: 881b ldrh r3, [r3, #0] 8008058: b29b uxth r3, r3 800805a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800805e: f023 0340 bic.w r3, r3, #64 @ 0x40 8008062: 82bb strh r3, [r7, #20] 8008064: 8abb ldrh r3, [r7, #20] 8008066: f083 0310 eor.w r3, r3, #16 800806a: 82bb strh r3, [r7, #20] 800806c: 8abb ldrh r3, [r7, #20] 800806e: f083 0320 eor.w r3, r3, #32 8008072: 82bb strh r3, [r7, #20] 8008074: 68fb ldr r3, [r7, #12] 8008076: 681b ldr r3, [r3, #0] 8008078: 461a mov r2, r3 800807a: 68bb ldr r3, [r7, #8] 800807c: 781b ldrb r3, [r3, #0] 800807e: 009b lsls r3, r3, #2 8008080: 441a add r2, r3 8008082: 8abb ldrh r3, [r7, #20] 8008084: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008088: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800808c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008090: f043 0380 orr.w r3, r3, #128 @ 0x80 8008094: b29b uxth r3, r3 8008096: 8013 strh r3, [r2, #0] return HAL_OK; 8008098: 2300 movs r3, #0 } 800809a: 4618 mov r0, r3 800809c: 3790 adds r7, #144 @ 0x90 800809e: 46bd mov sp, r7 80080a0: bd80 pop {r7, pc} 080080a2 : * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, uint16_t ep_kind, uint32_t pmaadress) { 80080a2: b480 push {r7} 80080a4: b087 sub sp, #28 80080a6: af00 add r7, sp, #0 80080a8: 60f8 str r0, [r7, #12] 80080aa: 607b str r3, [r7, #4] 80080ac: 460b mov r3, r1 80080ae: 817b strh r3, [r7, #10] 80080b0: 4613 mov r3, r2 80080b2: 813b strh r3, [r7, #8] PCD_EPTypeDef *ep; /* initialize ep structure*/ if ((0x80U & ep_addr) == 0x80U) 80080b4: 897b ldrh r3, [r7, #10] 80080b6: f003 0380 and.w r3, r3, #128 @ 0x80 80080ba: b29b uxth r3, r3 80080bc: 2b00 cmp r3, #0 80080be: d00b beq.n 80080d8 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 80080c0: 897b ldrh r3, [r7, #10] 80080c2: f003 0207 and.w r2, r3, #7 80080c6: 4613 mov r3, r2 80080c8: 009b lsls r3, r3, #2 80080ca: 4413 add r3, r2 80080cc: 00db lsls r3, r3, #3 80080ce: 3310 adds r3, #16 80080d0: 68fa ldr r2, [r7, #12] 80080d2: 4413 add r3, r2 80080d4: 617b str r3, [r7, #20] 80080d6: e009 b.n 80080ec } else { ep = &hpcd->OUT_ep[ep_addr]; 80080d8: 897a ldrh r2, [r7, #10] 80080da: 4613 mov r3, r2 80080dc: 009b lsls r3, r3, #2 80080de: 4413 add r3, r2 80080e0: 00db lsls r3, r3, #3 80080e2: f503 73a8 add.w r3, r3, #336 @ 0x150 80080e6: 68fa ldr r2, [r7, #12] 80080e8: 4413 add r3, r2 80080ea: 617b str r3, [r7, #20] } /* Here we check if the endpoint is single or double Buffer*/ if (ep_kind == PCD_SNG_BUF) 80080ec: 893b ldrh r3, [r7, #8] 80080ee: 2b00 cmp r3, #0 80080f0: d107 bne.n 8008102 { /* Single Buffer */ ep->doublebuffer = 0U; 80080f2: 697b ldr r3, [r7, #20] 80080f4: 2200 movs r2, #0 80080f6: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaadress = (uint16_t)pmaadress; 80080f8: 687b ldr r3, [r7, #4] 80080fa: b29a uxth r2, r3 80080fc: 697b ldr r3, [r7, #20] 80080fe: 80da strh r2, [r3, #6] 8008100: e00b b.n 800811a } #if (USE_USB_DOUBLE_BUFFER == 1U) else /* USB_DBL_BUF */ { /* Double Buffer Endpoint */ ep->doublebuffer = 1U; 8008102: 697b ldr r3, [r7, #20] 8008104: 2201 movs r2, #1 8008106: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 8008108: 687b ldr r3, [r7, #4] 800810a: b29a uxth r2, r3 800810c: 697b ldr r3, [r7, #20] 800810e: 811a strh r2, [r3, #8] ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 8008110: 687b ldr r3, [r7, #4] 8008112: 0c1b lsrs r3, r3, #16 8008114: b29a uxth r2, r3 8008116: 697b ldr r3, [r7, #20] 8008118: 815a strh r2, [r3, #10] } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 800811a: 2300 movs r3, #0 } 800811c: 4618 mov r0, r3 800811e: 371c adds r7, #28 8008120: 46bd mov sp, r7 8008122: bc80 pop {r7} 8008124: 4770 bx lr ... 08008128 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8008128: b580 push {r7, lr} 800812a: b086 sub sp, #24 800812c: af00 add r7, sp, #0 800812e: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8008130: 687b ldr r3, [r7, #4] 8008132: 2b00 cmp r3, #0 8008134: d101 bne.n 800813a { return HAL_ERROR; 8008136: 2301 movs r3, #1 8008138: e272 b.n 8008620 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800813a: 687b ldr r3, [r7, #4] 800813c: 681b ldr r3, [r3, #0] 800813e: f003 0301 and.w r3, r3, #1 8008142: 2b00 cmp r3, #0 8008144: f000 8087 beq.w 8008256 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8008148: 4b92 ldr r3, [pc, #584] @ (8008394 ) 800814a: 685b ldr r3, [r3, #4] 800814c: f003 030c and.w r3, r3, #12 8008150: 2b04 cmp r3, #4 8008152: d00c beq.n 800816e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8008154: 4b8f ldr r3, [pc, #572] @ (8008394 ) 8008156: 685b ldr r3, [r3, #4] 8008158: f003 030c and.w r3, r3, #12 800815c: 2b08 cmp r3, #8 800815e: d112 bne.n 8008186 8008160: 4b8c ldr r3, [pc, #560] @ (8008394 ) 8008162: 685b ldr r3, [r3, #4] 8008164: f403 3380 and.w r3, r3, #65536 @ 0x10000 8008168: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800816c: d10b bne.n 8008186 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800816e: 4b89 ldr r3, [pc, #548] @ (8008394 ) 8008170: 681b ldr r3, [r3, #0] 8008172: f403 3300 and.w r3, r3, #131072 @ 0x20000 8008176: 2b00 cmp r3, #0 8008178: d06c beq.n 8008254 800817a: 687b ldr r3, [r7, #4] 800817c: 685b ldr r3, [r3, #4] 800817e: 2b00 cmp r3, #0 8008180: d168 bne.n 8008254 { return HAL_ERROR; 8008182: 2301 movs r3, #1 8008184: e24c b.n 8008620 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8008186: 687b ldr r3, [r7, #4] 8008188: 685b ldr r3, [r3, #4] 800818a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800818e: d106 bne.n 800819e 8008190: 4b80 ldr r3, [pc, #512] @ (8008394 ) 8008192: 681b ldr r3, [r3, #0] 8008194: 4a7f ldr r2, [pc, #508] @ (8008394 ) 8008196: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800819a: 6013 str r3, [r2, #0] 800819c: e02e b.n 80081fc 800819e: 687b ldr r3, [r7, #4] 80081a0: 685b ldr r3, [r3, #4] 80081a2: 2b00 cmp r3, #0 80081a4: d10c bne.n 80081c0 80081a6: 4b7b ldr r3, [pc, #492] @ (8008394 ) 80081a8: 681b ldr r3, [r3, #0] 80081aa: 4a7a ldr r2, [pc, #488] @ (8008394 ) 80081ac: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80081b0: 6013 str r3, [r2, #0] 80081b2: 4b78 ldr r3, [pc, #480] @ (8008394 ) 80081b4: 681b ldr r3, [r3, #0] 80081b6: 4a77 ldr r2, [pc, #476] @ (8008394 ) 80081b8: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80081bc: 6013 str r3, [r2, #0] 80081be: e01d b.n 80081fc 80081c0: 687b ldr r3, [r7, #4] 80081c2: 685b ldr r3, [r3, #4] 80081c4: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 80081c8: d10c bne.n 80081e4 80081ca: 4b72 ldr r3, [pc, #456] @ (8008394 ) 80081cc: 681b ldr r3, [r3, #0] 80081ce: 4a71 ldr r2, [pc, #452] @ (8008394 ) 80081d0: f443 2380 orr.w r3, r3, #262144 @ 0x40000 80081d4: 6013 str r3, [r2, #0] 80081d6: 4b6f ldr r3, [pc, #444] @ (8008394 ) 80081d8: 681b ldr r3, [r3, #0] 80081da: 4a6e ldr r2, [pc, #440] @ (8008394 ) 80081dc: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80081e0: 6013 str r3, [r2, #0] 80081e2: e00b b.n 80081fc 80081e4: 4b6b ldr r3, [pc, #428] @ (8008394 ) 80081e6: 681b ldr r3, [r3, #0] 80081e8: 4a6a ldr r2, [pc, #424] @ (8008394 ) 80081ea: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80081ee: 6013 str r3, [r2, #0] 80081f0: 4b68 ldr r3, [pc, #416] @ (8008394 ) 80081f2: 681b ldr r3, [r3, #0] 80081f4: 4a67 ldr r2, [pc, #412] @ (8008394 ) 80081f6: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80081fa: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 80081fc: 687b ldr r3, [r7, #4] 80081fe: 685b ldr r3, [r3, #4] 8008200: 2b00 cmp r3, #0 8008202: d013 beq.n 800822c { /* Get Start Tick */ tickstart = HAL_GetTick(); 8008204: f7fc ffa4 bl 8005150 8008208: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800820a: e008 b.n 800821e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 800820c: f7fc ffa0 bl 8005150 8008210: 4602 mov r2, r0 8008212: 693b ldr r3, [r7, #16] 8008214: 1ad3 subs r3, r2, r3 8008216: 2b64 cmp r3, #100 @ 0x64 8008218: d901 bls.n 800821e { return HAL_TIMEOUT; 800821a: 2303 movs r3, #3 800821c: e200 b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800821e: 4b5d ldr r3, [pc, #372] @ (8008394 ) 8008220: 681b ldr r3, [r3, #0] 8008222: f403 3300 and.w r3, r3, #131072 @ 0x20000 8008226: 2b00 cmp r3, #0 8008228: d0f0 beq.n 800820c 800822a: e014 b.n 8008256 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 800822c: f7fc ff90 bl 8005150 8008230: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8008232: e008 b.n 8008246 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8008234: f7fc ff8c bl 8005150 8008238: 4602 mov r2, r0 800823a: 693b ldr r3, [r7, #16] 800823c: 1ad3 subs r3, r2, r3 800823e: 2b64 cmp r3, #100 @ 0x64 8008240: d901 bls.n 8008246 { return HAL_TIMEOUT; 8008242: 2303 movs r3, #3 8008244: e1ec b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8008246: 4b53 ldr r3, [pc, #332] @ (8008394 ) 8008248: 681b ldr r3, [r3, #0] 800824a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800824e: 2b00 cmp r3, #0 8008250: d1f0 bne.n 8008234 8008252: e000 b.n 8008256 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8008254: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8008256: 687b ldr r3, [r7, #4] 8008258: 681b ldr r3, [r3, #0] 800825a: f003 0302 and.w r3, r3, #2 800825e: 2b00 cmp r3, #0 8008260: d063 beq.n 800832a /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8008262: 4b4c ldr r3, [pc, #304] @ (8008394 ) 8008264: 685b ldr r3, [r3, #4] 8008266: f003 030c and.w r3, r3, #12 800826a: 2b00 cmp r3, #0 800826c: d00b beq.n 8008286 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 800826e: 4b49 ldr r3, [pc, #292] @ (8008394 ) 8008270: 685b ldr r3, [r3, #4] 8008272: f003 030c and.w r3, r3, #12 8008276: 2b08 cmp r3, #8 8008278: d11c bne.n 80082b4 800827a: 4b46 ldr r3, [pc, #280] @ (8008394 ) 800827c: 685b ldr r3, [r3, #4] 800827e: f403 3380 and.w r3, r3, #65536 @ 0x10000 8008282: 2b00 cmp r3, #0 8008284: d116 bne.n 80082b4 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8008286: 4b43 ldr r3, [pc, #268] @ (8008394 ) 8008288: 681b ldr r3, [r3, #0] 800828a: f003 0302 and.w r3, r3, #2 800828e: 2b00 cmp r3, #0 8008290: d005 beq.n 800829e 8008292: 687b ldr r3, [r7, #4] 8008294: 691b ldr r3, [r3, #16] 8008296: 2b01 cmp r3, #1 8008298: d001 beq.n 800829e { return HAL_ERROR; 800829a: 2301 movs r3, #1 800829c: e1c0 b.n 8008620 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 800829e: 4b3d ldr r3, [pc, #244] @ (8008394 ) 80082a0: 681b ldr r3, [r3, #0] 80082a2: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80082a6: 687b ldr r3, [r7, #4] 80082a8: 695b ldr r3, [r3, #20] 80082aa: 00db lsls r3, r3, #3 80082ac: 4939 ldr r1, [pc, #228] @ (8008394 ) 80082ae: 4313 orrs r3, r2 80082b0: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80082b2: e03a b.n 800832a } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80082b4: 687b ldr r3, [r7, #4] 80082b6: 691b ldr r3, [r3, #16] 80082b8: 2b00 cmp r3, #0 80082ba: d020 beq.n 80082fe { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80082bc: 4b36 ldr r3, [pc, #216] @ (8008398 ) 80082be: 2201 movs r2, #1 80082c0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80082c2: f7fc ff45 bl 8005150 80082c6: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80082c8: e008 b.n 80082dc { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80082ca: f7fc ff41 bl 8005150 80082ce: 4602 mov r2, r0 80082d0: 693b ldr r3, [r7, #16] 80082d2: 1ad3 subs r3, r2, r3 80082d4: 2b02 cmp r3, #2 80082d6: d901 bls.n 80082dc { return HAL_TIMEOUT; 80082d8: 2303 movs r3, #3 80082da: e1a1 b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80082dc: 4b2d ldr r3, [pc, #180] @ (8008394 ) 80082de: 681b ldr r3, [r3, #0] 80082e0: f003 0302 and.w r3, r3, #2 80082e4: 2b00 cmp r3, #0 80082e6: d0f0 beq.n 80082ca } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80082e8: 4b2a ldr r3, [pc, #168] @ (8008394 ) 80082ea: 681b ldr r3, [r3, #0] 80082ec: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80082f0: 687b ldr r3, [r7, #4] 80082f2: 695b ldr r3, [r3, #20] 80082f4: 00db lsls r3, r3, #3 80082f6: 4927 ldr r1, [pc, #156] @ (8008394 ) 80082f8: 4313 orrs r3, r2 80082fa: 600b str r3, [r1, #0] 80082fc: e015 b.n 800832a } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80082fe: 4b26 ldr r3, [pc, #152] @ (8008398 ) 8008300: 2200 movs r2, #0 8008302: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8008304: f7fc ff24 bl 8005150 8008308: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800830a: e008 b.n 800831e { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 800830c: f7fc ff20 bl 8005150 8008310: 4602 mov r2, r0 8008312: 693b ldr r3, [r7, #16] 8008314: 1ad3 subs r3, r2, r3 8008316: 2b02 cmp r3, #2 8008318: d901 bls.n 800831e { return HAL_TIMEOUT; 800831a: 2303 movs r3, #3 800831c: e180 b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800831e: 4b1d ldr r3, [pc, #116] @ (8008394 ) 8008320: 681b ldr r3, [r3, #0] 8008322: f003 0302 and.w r3, r3, #2 8008326: 2b00 cmp r3, #0 8008328: d1f0 bne.n 800830c } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800832a: 687b ldr r3, [r7, #4] 800832c: 681b ldr r3, [r3, #0] 800832e: f003 0308 and.w r3, r3, #8 8008332: 2b00 cmp r3, #0 8008334: d03a beq.n 80083ac { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8008336: 687b ldr r3, [r7, #4] 8008338: 699b ldr r3, [r3, #24] 800833a: 2b00 cmp r3, #0 800833c: d019 beq.n 8008372 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 800833e: 4b17 ldr r3, [pc, #92] @ (800839c ) 8008340: 2201 movs r2, #1 8008342: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8008344: f7fc ff04 bl 8005150 8008348: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800834a: e008 b.n 800835e { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 800834c: f7fc ff00 bl 8005150 8008350: 4602 mov r2, r0 8008352: 693b ldr r3, [r7, #16] 8008354: 1ad3 subs r3, r2, r3 8008356: 2b02 cmp r3, #2 8008358: d901 bls.n 800835e { return HAL_TIMEOUT; 800835a: 2303 movs r3, #3 800835c: e160 b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800835e: 4b0d ldr r3, [pc, #52] @ (8008394 ) 8008360: 6a5b ldr r3, [r3, #36] @ 0x24 8008362: f003 0302 and.w r3, r3, #2 8008366: 2b00 cmp r3, #0 8008368: d0f0 beq.n 800834c } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 800836a: 2001 movs r0, #1 800836c: f000 fad0 bl 8008910 8008370: e01c b.n 80083ac } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8008372: 4b0a ldr r3, [pc, #40] @ (800839c ) 8008374: 2200 movs r2, #0 8008376: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8008378: f7fc feea bl 8005150 800837c: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 800837e: e00f b.n 80083a0 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8008380: f7fc fee6 bl 8005150 8008384: 4602 mov r2, r0 8008386: 693b ldr r3, [r7, #16] 8008388: 1ad3 subs r3, r2, r3 800838a: 2b02 cmp r3, #2 800838c: d908 bls.n 80083a0 { return HAL_TIMEOUT; 800838e: 2303 movs r3, #3 8008390: e146 b.n 8008620 8008392: bf00 nop 8008394: 40021000 .word 0x40021000 8008398: 42420000 .word 0x42420000 800839c: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80083a0: 4b92 ldr r3, [pc, #584] @ (80085ec ) 80083a2: 6a5b ldr r3, [r3, #36] @ 0x24 80083a4: f003 0302 and.w r3, r3, #2 80083a8: 2b00 cmp r3, #0 80083aa: d1e9 bne.n 8008380 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80083ac: 687b ldr r3, [r7, #4] 80083ae: 681b ldr r3, [r3, #0] 80083b0: f003 0304 and.w r3, r3, #4 80083b4: 2b00 cmp r3, #0 80083b6: f000 80a6 beq.w 8008506 { FlagStatus pwrclkchanged = RESET; 80083ba: 2300 movs r3, #0 80083bc: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 80083be: 4b8b ldr r3, [pc, #556] @ (80085ec ) 80083c0: 69db ldr r3, [r3, #28] 80083c2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80083c6: 2b00 cmp r3, #0 80083c8: d10d bne.n 80083e6 { __HAL_RCC_PWR_CLK_ENABLE(); 80083ca: 4b88 ldr r3, [pc, #544] @ (80085ec ) 80083cc: 69db ldr r3, [r3, #28] 80083ce: 4a87 ldr r2, [pc, #540] @ (80085ec ) 80083d0: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80083d4: 61d3 str r3, [r2, #28] 80083d6: 4b85 ldr r3, [pc, #532] @ (80085ec ) 80083d8: 69db ldr r3, [r3, #28] 80083da: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80083de: 60bb str r3, [r7, #8] 80083e0: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 80083e2: 2301 movs r3, #1 80083e4: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80083e6: 4b82 ldr r3, [pc, #520] @ (80085f0 ) 80083e8: 681b ldr r3, [r3, #0] 80083ea: f403 7380 and.w r3, r3, #256 @ 0x100 80083ee: 2b00 cmp r3, #0 80083f0: d118 bne.n 8008424 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80083f2: 4b7f ldr r3, [pc, #508] @ (80085f0 ) 80083f4: 681b ldr r3, [r3, #0] 80083f6: 4a7e ldr r2, [pc, #504] @ (80085f0 ) 80083f8: f443 7380 orr.w r3, r3, #256 @ 0x100 80083fc: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80083fe: f7fc fea7 bl 8005150 8008402: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8008404: e008 b.n 8008418 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8008406: f7fc fea3 bl 8005150 800840a: 4602 mov r2, r0 800840c: 693b ldr r3, [r7, #16] 800840e: 1ad3 subs r3, r2, r3 8008410: 2b64 cmp r3, #100 @ 0x64 8008412: d901 bls.n 8008418 { return HAL_TIMEOUT; 8008414: 2303 movs r3, #3 8008416: e103 b.n 8008620 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8008418: 4b75 ldr r3, [pc, #468] @ (80085f0 ) 800841a: 681b ldr r3, [r3, #0] 800841c: f403 7380 and.w r3, r3, #256 @ 0x100 8008420: 2b00 cmp r3, #0 8008422: d0f0 beq.n 8008406 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8008424: 687b ldr r3, [r7, #4] 8008426: 68db ldr r3, [r3, #12] 8008428: 2b01 cmp r3, #1 800842a: d106 bne.n 800843a 800842c: 4b6f ldr r3, [pc, #444] @ (80085ec ) 800842e: 6a1b ldr r3, [r3, #32] 8008430: 4a6e ldr r2, [pc, #440] @ (80085ec ) 8008432: f043 0301 orr.w r3, r3, #1 8008436: 6213 str r3, [r2, #32] 8008438: e02d b.n 8008496 800843a: 687b ldr r3, [r7, #4] 800843c: 68db ldr r3, [r3, #12] 800843e: 2b00 cmp r3, #0 8008440: d10c bne.n 800845c 8008442: 4b6a ldr r3, [pc, #424] @ (80085ec ) 8008444: 6a1b ldr r3, [r3, #32] 8008446: 4a69 ldr r2, [pc, #420] @ (80085ec ) 8008448: f023 0301 bic.w r3, r3, #1 800844c: 6213 str r3, [r2, #32] 800844e: 4b67 ldr r3, [pc, #412] @ (80085ec ) 8008450: 6a1b ldr r3, [r3, #32] 8008452: 4a66 ldr r2, [pc, #408] @ (80085ec ) 8008454: f023 0304 bic.w r3, r3, #4 8008458: 6213 str r3, [r2, #32] 800845a: e01c b.n 8008496 800845c: 687b ldr r3, [r7, #4] 800845e: 68db ldr r3, [r3, #12] 8008460: 2b05 cmp r3, #5 8008462: d10c bne.n 800847e 8008464: 4b61 ldr r3, [pc, #388] @ (80085ec ) 8008466: 6a1b ldr r3, [r3, #32] 8008468: 4a60 ldr r2, [pc, #384] @ (80085ec ) 800846a: f043 0304 orr.w r3, r3, #4 800846e: 6213 str r3, [r2, #32] 8008470: 4b5e ldr r3, [pc, #376] @ (80085ec ) 8008472: 6a1b ldr r3, [r3, #32] 8008474: 4a5d ldr r2, [pc, #372] @ (80085ec ) 8008476: f043 0301 orr.w r3, r3, #1 800847a: 6213 str r3, [r2, #32] 800847c: e00b b.n 8008496 800847e: 4b5b ldr r3, [pc, #364] @ (80085ec ) 8008480: 6a1b ldr r3, [r3, #32] 8008482: 4a5a ldr r2, [pc, #360] @ (80085ec ) 8008484: f023 0301 bic.w r3, r3, #1 8008488: 6213 str r3, [r2, #32] 800848a: 4b58 ldr r3, [pc, #352] @ (80085ec ) 800848c: 6a1b ldr r3, [r3, #32] 800848e: 4a57 ldr r2, [pc, #348] @ (80085ec ) 8008490: f023 0304 bic.w r3, r3, #4 8008494: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8008496: 687b ldr r3, [r7, #4] 8008498: 68db ldr r3, [r3, #12] 800849a: 2b00 cmp r3, #0 800849c: d015 beq.n 80084ca { /* Get Start Tick */ tickstart = HAL_GetTick(); 800849e: f7fc fe57 bl 8005150 80084a2: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80084a4: e00a b.n 80084bc { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80084a6: f7fc fe53 bl 8005150 80084aa: 4602 mov r2, r0 80084ac: 693b ldr r3, [r7, #16] 80084ae: 1ad3 subs r3, r2, r3 80084b0: f241 3288 movw r2, #5000 @ 0x1388 80084b4: 4293 cmp r3, r2 80084b6: d901 bls.n 80084bc { return HAL_TIMEOUT; 80084b8: 2303 movs r3, #3 80084ba: e0b1 b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80084bc: 4b4b ldr r3, [pc, #300] @ (80085ec ) 80084be: 6a1b ldr r3, [r3, #32] 80084c0: f003 0302 and.w r3, r3, #2 80084c4: 2b00 cmp r3, #0 80084c6: d0ee beq.n 80084a6 80084c8: e014 b.n 80084f4 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80084ca: f7fc fe41 bl 8005150 80084ce: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80084d0: e00a b.n 80084e8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80084d2: f7fc fe3d bl 8005150 80084d6: 4602 mov r2, r0 80084d8: 693b ldr r3, [r7, #16] 80084da: 1ad3 subs r3, r2, r3 80084dc: f241 3288 movw r2, #5000 @ 0x1388 80084e0: 4293 cmp r3, r2 80084e2: d901 bls.n 80084e8 { return HAL_TIMEOUT; 80084e4: 2303 movs r3, #3 80084e6: e09b b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80084e8: 4b40 ldr r3, [pc, #256] @ (80085ec ) 80084ea: 6a1b ldr r3, [r3, #32] 80084ec: f003 0302 and.w r3, r3, #2 80084f0: 2b00 cmp r3, #0 80084f2: d1ee bne.n 80084d2 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 80084f4: 7dfb ldrb r3, [r7, #23] 80084f6: 2b01 cmp r3, #1 80084f8: d105 bne.n 8008506 { __HAL_RCC_PWR_CLK_DISABLE(); 80084fa: 4b3c ldr r3, [pc, #240] @ (80085ec ) 80084fc: 69db ldr r3, [r3, #28] 80084fe: 4a3b ldr r2, [pc, #236] @ (80085ec ) 8008500: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8008504: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8008506: 687b ldr r3, [r7, #4] 8008508: 69db ldr r3, [r3, #28] 800850a: 2b00 cmp r3, #0 800850c: f000 8087 beq.w 800861e { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8008510: 4b36 ldr r3, [pc, #216] @ (80085ec ) 8008512: 685b ldr r3, [r3, #4] 8008514: f003 030c and.w r3, r3, #12 8008518: 2b08 cmp r3, #8 800851a: d061 beq.n 80085e0 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 800851c: 687b ldr r3, [r7, #4] 800851e: 69db ldr r3, [r3, #28] 8008520: 2b02 cmp r3, #2 8008522: d146 bne.n 80085b2 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8008524: 4b33 ldr r3, [pc, #204] @ (80085f4 ) 8008526: 2200 movs r2, #0 8008528: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800852a: f7fc fe11 bl 8005150 800852e: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8008530: e008 b.n 8008544 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8008532: f7fc fe0d bl 8005150 8008536: 4602 mov r2, r0 8008538: 693b ldr r3, [r7, #16] 800853a: 1ad3 subs r3, r2, r3 800853c: 2b02 cmp r3, #2 800853e: d901 bls.n 8008544 { return HAL_TIMEOUT; 8008540: 2303 movs r3, #3 8008542: e06d b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8008544: 4b29 ldr r3, [pc, #164] @ (80085ec ) 8008546: 681b ldr r3, [r3, #0] 8008548: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800854c: 2b00 cmp r3, #0 800854e: d1f0 bne.n 8008532 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8008550: 687b ldr r3, [r7, #4] 8008552: 6a1b ldr r3, [r3, #32] 8008554: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8008558: d108 bne.n 800856c /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 800855a: 4b24 ldr r3, [pc, #144] @ (80085ec ) 800855c: 685b ldr r3, [r3, #4] 800855e: f423 3200 bic.w r2, r3, #131072 @ 0x20000 8008562: 687b ldr r3, [r7, #4] 8008564: 689b ldr r3, [r3, #8] 8008566: 4921 ldr r1, [pc, #132] @ (80085ec ) 8008568: 4313 orrs r3, r2 800856a: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 800856c: 4b1f ldr r3, [pc, #124] @ (80085ec ) 800856e: 685b ldr r3, [r3, #4] 8008570: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 8008574: 687b ldr r3, [r7, #4] 8008576: 6a19 ldr r1, [r3, #32] 8008578: 687b ldr r3, [r7, #4] 800857a: 6a5b ldr r3, [r3, #36] @ 0x24 800857c: 430b orrs r3, r1 800857e: 491b ldr r1, [pc, #108] @ (80085ec ) 8008580: 4313 orrs r3, r2 8008582: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8008584: 4b1b ldr r3, [pc, #108] @ (80085f4 ) 8008586: 2201 movs r2, #1 8008588: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800858a: f7fc fde1 bl 8005150 800858e: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8008590: e008 b.n 80085a4 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8008592: f7fc fddd bl 8005150 8008596: 4602 mov r2, r0 8008598: 693b ldr r3, [r7, #16] 800859a: 1ad3 subs r3, r2, r3 800859c: 2b02 cmp r3, #2 800859e: d901 bls.n 80085a4 { return HAL_TIMEOUT; 80085a0: 2303 movs r3, #3 80085a2: e03d b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80085a4: 4b11 ldr r3, [pc, #68] @ (80085ec ) 80085a6: 681b ldr r3, [r3, #0] 80085a8: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80085ac: 2b00 cmp r3, #0 80085ae: d0f0 beq.n 8008592 80085b0: e035 b.n 800861e } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 80085b2: 4b10 ldr r3, [pc, #64] @ (80085f4 ) 80085b4: 2200 movs r2, #0 80085b6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80085b8: f7fc fdca bl 8005150 80085bc: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80085be: e008 b.n 80085d2 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80085c0: f7fc fdc6 bl 8005150 80085c4: 4602 mov r2, r0 80085c6: 693b ldr r3, [r7, #16] 80085c8: 1ad3 subs r3, r2, r3 80085ca: 2b02 cmp r3, #2 80085cc: d901 bls.n 80085d2 { return HAL_TIMEOUT; 80085ce: 2303 movs r3, #3 80085d0: e026 b.n 8008620 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80085d2: 4b06 ldr r3, [pc, #24] @ (80085ec ) 80085d4: 681b ldr r3, [r3, #0] 80085d6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80085da: 2b00 cmp r3, #0 80085dc: d1f0 bne.n 80085c0 80085de: e01e b.n 800861e } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 80085e0: 687b ldr r3, [r7, #4] 80085e2: 69db ldr r3, [r3, #28] 80085e4: 2b01 cmp r3, #1 80085e6: d107 bne.n 80085f8 { return HAL_ERROR; 80085e8: 2301 movs r3, #1 80085ea: e019 b.n 8008620 80085ec: 40021000 .word 0x40021000 80085f0: 40007000 .word 0x40007000 80085f4: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 80085f8: 4b0b ldr r3, [pc, #44] @ (8008628 ) 80085fa: 685b ldr r3, [r3, #4] 80085fc: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80085fe: 68fb ldr r3, [r7, #12] 8008600: f403 3280 and.w r2, r3, #65536 @ 0x10000 8008604: 687b ldr r3, [r7, #4] 8008606: 6a1b ldr r3, [r3, #32] 8008608: 429a cmp r2, r3 800860a: d106 bne.n 800861a (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 800860c: 68fb ldr r3, [r7, #12] 800860e: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 8008612: 687b ldr r3, [r7, #4] 8008614: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8008616: 429a cmp r2, r3 8008618: d001 beq.n 800861e { return HAL_ERROR; 800861a: 2301 movs r3, #1 800861c: e000 b.n 8008620 } } } } return HAL_OK; 800861e: 2300 movs r3, #0 } 8008620: 4618 mov r0, r3 8008622: 3718 adds r7, #24 8008624: 46bd mov sp, r7 8008626: bd80 pop {r7, pc} 8008628: 40021000 .word 0x40021000 0800862c : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 800862c: b580 push {r7, lr} 800862e: b084 sub sp, #16 8008630: af00 add r7, sp, #0 8008632: 6078 str r0, [r7, #4] 8008634: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8008636: 687b ldr r3, [r7, #4] 8008638: 2b00 cmp r3, #0 800863a: d101 bne.n 8008640 { return HAL_ERROR; 800863c: 2301 movs r3, #1 800863e: e0d0 b.n 80087e2 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8008640: 4b6a ldr r3, [pc, #424] @ (80087ec ) 8008642: 681b ldr r3, [r3, #0] 8008644: f003 0307 and.w r3, r3, #7 8008648: 683a ldr r2, [r7, #0] 800864a: 429a cmp r2, r3 800864c: d910 bls.n 8008670 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800864e: 4b67 ldr r3, [pc, #412] @ (80087ec ) 8008650: 681b ldr r3, [r3, #0] 8008652: f023 0207 bic.w r2, r3, #7 8008656: 4965 ldr r1, [pc, #404] @ (80087ec ) 8008658: 683b ldr r3, [r7, #0] 800865a: 4313 orrs r3, r2 800865c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800865e: 4b63 ldr r3, [pc, #396] @ (80087ec ) 8008660: 681b ldr r3, [r3, #0] 8008662: f003 0307 and.w r3, r3, #7 8008666: 683a ldr r2, [r7, #0] 8008668: 429a cmp r2, r3 800866a: d001 beq.n 8008670 { return HAL_ERROR; 800866c: 2301 movs r3, #1 800866e: e0b8 b.n 80087e2 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8008670: 687b ldr r3, [r7, #4] 8008672: 681b ldr r3, [r3, #0] 8008674: f003 0302 and.w r3, r3, #2 8008678: 2b00 cmp r3, #0 800867a: d020 beq.n 80086be { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800867c: 687b ldr r3, [r7, #4] 800867e: 681b ldr r3, [r3, #0] 8008680: f003 0304 and.w r3, r3, #4 8008684: 2b00 cmp r3, #0 8008686: d005 beq.n 8008694 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8008688: 4b59 ldr r3, [pc, #356] @ (80087f0 ) 800868a: 685b ldr r3, [r3, #4] 800868c: 4a58 ldr r2, [pc, #352] @ (80087f0 ) 800868e: f443 63e0 orr.w r3, r3, #1792 @ 0x700 8008692: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8008694: 687b ldr r3, [r7, #4] 8008696: 681b ldr r3, [r3, #0] 8008698: f003 0308 and.w r3, r3, #8 800869c: 2b00 cmp r3, #0 800869e: d005 beq.n 80086ac { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 80086a0: 4b53 ldr r3, [pc, #332] @ (80087f0 ) 80086a2: 685b ldr r3, [r3, #4] 80086a4: 4a52 ldr r2, [pc, #328] @ (80087f0 ) 80086a6: f443 5360 orr.w r3, r3, #14336 @ 0x3800 80086aa: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80086ac: 4b50 ldr r3, [pc, #320] @ (80087f0 ) 80086ae: 685b ldr r3, [r3, #4] 80086b0: f023 02f0 bic.w r2, r3, #240 @ 0xf0 80086b4: 687b ldr r3, [r7, #4] 80086b6: 689b ldr r3, [r3, #8] 80086b8: 494d ldr r1, [pc, #308] @ (80087f0 ) 80086ba: 4313 orrs r3, r2 80086bc: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 80086be: 687b ldr r3, [r7, #4] 80086c0: 681b ldr r3, [r3, #0] 80086c2: f003 0301 and.w r3, r3, #1 80086c6: 2b00 cmp r3, #0 80086c8: d040 beq.n 800874c { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80086ca: 687b ldr r3, [r7, #4] 80086cc: 685b ldr r3, [r3, #4] 80086ce: 2b01 cmp r3, #1 80086d0: d107 bne.n 80086e2 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80086d2: 4b47 ldr r3, [pc, #284] @ (80087f0 ) 80086d4: 681b ldr r3, [r3, #0] 80086d6: f403 3300 and.w r3, r3, #131072 @ 0x20000 80086da: 2b00 cmp r3, #0 80086dc: d115 bne.n 800870a { return HAL_ERROR; 80086de: 2301 movs r3, #1 80086e0: e07f b.n 80087e2 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80086e2: 687b ldr r3, [r7, #4] 80086e4: 685b ldr r3, [r3, #4] 80086e6: 2b02 cmp r3, #2 80086e8: d107 bne.n 80086fa { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80086ea: 4b41 ldr r3, [pc, #260] @ (80087f0 ) 80086ec: 681b ldr r3, [r3, #0] 80086ee: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80086f2: 2b00 cmp r3, #0 80086f4: d109 bne.n 800870a { return HAL_ERROR; 80086f6: 2301 movs r3, #1 80086f8: e073 b.n 80087e2 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80086fa: 4b3d ldr r3, [pc, #244] @ (80087f0 ) 80086fc: 681b ldr r3, [r3, #0] 80086fe: f003 0302 and.w r3, r3, #2 8008702: 2b00 cmp r3, #0 8008704: d101 bne.n 800870a { return HAL_ERROR; 8008706: 2301 movs r3, #1 8008708: e06b b.n 80087e2 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 800870a: 4b39 ldr r3, [pc, #228] @ (80087f0 ) 800870c: 685b ldr r3, [r3, #4] 800870e: f023 0203 bic.w r2, r3, #3 8008712: 687b ldr r3, [r7, #4] 8008714: 685b ldr r3, [r3, #4] 8008716: 4936 ldr r1, [pc, #216] @ (80087f0 ) 8008718: 4313 orrs r3, r2 800871a: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 800871c: f7fc fd18 bl 8005150 8008720: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8008722: e00a b.n 800873a { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8008724: f7fc fd14 bl 8005150 8008728: 4602 mov r2, r0 800872a: 68fb ldr r3, [r7, #12] 800872c: 1ad3 subs r3, r2, r3 800872e: f241 3288 movw r2, #5000 @ 0x1388 8008732: 4293 cmp r3, r2 8008734: d901 bls.n 800873a { return HAL_TIMEOUT; 8008736: 2303 movs r3, #3 8008738: e053 b.n 80087e2 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 800873a: 4b2d ldr r3, [pc, #180] @ (80087f0 ) 800873c: 685b ldr r3, [r3, #4] 800873e: f003 020c and.w r2, r3, #12 8008742: 687b ldr r3, [r7, #4] 8008744: 685b ldr r3, [r3, #4] 8008746: 009b lsls r3, r3, #2 8008748: 429a cmp r2, r3 800874a: d1eb bne.n 8008724 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 800874c: 4b27 ldr r3, [pc, #156] @ (80087ec ) 800874e: 681b ldr r3, [r3, #0] 8008750: f003 0307 and.w r3, r3, #7 8008754: 683a ldr r2, [r7, #0] 8008756: 429a cmp r2, r3 8008758: d210 bcs.n 800877c { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800875a: 4b24 ldr r3, [pc, #144] @ (80087ec ) 800875c: 681b ldr r3, [r3, #0] 800875e: f023 0207 bic.w r2, r3, #7 8008762: 4922 ldr r1, [pc, #136] @ (80087ec ) 8008764: 683b ldr r3, [r7, #0] 8008766: 4313 orrs r3, r2 8008768: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800876a: 4b20 ldr r3, [pc, #128] @ (80087ec ) 800876c: 681b ldr r3, [r3, #0] 800876e: f003 0307 and.w r3, r3, #7 8008772: 683a ldr r2, [r7, #0] 8008774: 429a cmp r2, r3 8008776: d001 beq.n 800877c { return HAL_ERROR; 8008778: 2301 movs r3, #1 800877a: e032 b.n 80087e2 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800877c: 687b ldr r3, [r7, #4] 800877e: 681b ldr r3, [r3, #0] 8008780: f003 0304 and.w r3, r3, #4 8008784: 2b00 cmp r3, #0 8008786: d008 beq.n 800879a { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8008788: 4b19 ldr r3, [pc, #100] @ (80087f0 ) 800878a: 685b ldr r3, [r3, #4] 800878c: f423 62e0 bic.w r2, r3, #1792 @ 0x700 8008790: 687b ldr r3, [r7, #4] 8008792: 68db ldr r3, [r3, #12] 8008794: 4916 ldr r1, [pc, #88] @ (80087f0 ) 8008796: 4313 orrs r3, r2 8008798: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800879a: 687b ldr r3, [r7, #4] 800879c: 681b ldr r3, [r3, #0] 800879e: f003 0308 and.w r3, r3, #8 80087a2: 2b00 cmp r3, #0 80087a4: d009 beq.n 80087ba { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 80087a6: 4b12 ldr r3, [pc, #72] @ (80087f0 ) 80087a8: 685b ldr r3, [r3, #4] 80087aa: f423 5260 bic.w r2, r3, #14336 @ 0x3800 80087ae: 687b ldr r3, [r7, #4] 80087b0: 691b ldr r3, [r3, #16] 80087b2: 00db lsls r3, r3, #3 80087b4: 490e ldr r1, [pc, #56] @ (80087f0 ) 80087b6: 4313 orrs r3, r2 80087b8: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 80087ba: f000 f821 bl 8008800 80087be: 4602 mov r2, r0 80087c0: 4b0b ldr r3, [pc, #44] @ (80087f0 ) 80087c2: 685b ldr r3, [r3, #4] 80087c4: 091b lsrs r3, r3, #4 80087c6: f003 030f and.w r3, r3, #15 80087ca: 490a ldr r1, [pc, #40] @ (80087f4 ) 80087cc: 5ccb ldrb r3, [r1, r3] 80087ce: fa22 f303 lsr.w r3, r2, r3 80087d2: 4a09 ldr r2, [pc, #36] @ (80087f8 ) 80087d4: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 80087d6: 4b09 ldr r3, [pc, #36] @ (80087fc ) 80087d8: 681b ldr r3, [r3, #0] 80087da: 4618 mov r0, r3 80087dc: f7fc fc76 bl 80050cc return HAL_OK; 80087e0: 2300 movs r3, #0 } 80087e2: 4618 mov r0, r3 80087e4: 3710 adds r7, #16 80087e6: 46bd mov sp, r7 80087e8: bd80 pop {r7, pc} 80087ea: bf00 nop 80087ec: 40022000 .word 0x40022000 80087f0: 40021000 .word 0x40021000 80087f4: 0800f518 .word 0x0800f518 80087f8: 20000010 .word 0x20000010 80087fc: 20000014 .word 0x20000014 08008800 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8008800: b480 push {r7} 8008802: b087 sub sp, #28 8008804: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 8008806: 2300 movs r3, #0 8008808: 60fb str r3, [r7, #12] 800880a: 2300 movs r3, #0 800880c: 60bb str r3, [r7, #8] 800880e: 2300 movs r3, #0 8008810: 617b str r3, [r7, #20] 8008812: 2300 movs r3, #0 8008814: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; 8008816: 2300 movs r3, #0 8008818: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 800881a: 4b1e ldr r3, [pc, #120] @ (8008894 ) 800881c: 685b ldr r3, [r3, #4] 800881e: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 8008820: 68fb ldr r3, [r7, #12] 8008822: f003 030c and.w r3, r3, #12 8008826: 2b04 cmp r3, #4 8008828: d002 beq.n 8008830 800882a: 2b08 cmp r3, #8 800882c: d003 beq.n 8008836 800882e: e027 b.n 8008880 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 8008830: 4b19 ldr r3, [pc, #100] @ (8008898 ) 8008832: 613b str r3, [r7, #16] break; 8008834: e027 b.n 8008886 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8008836: 68fb ldr r3, [r7, #12] 8008838: 0c9b lsrs r3, r3, #18 800883a: f003 030f and.w r3, r3, #15 800883e: 4a17 ldr r2, [pc, #92] @ (800889c ) 8008840: 5cd3 ldrb r3, [r2, r3] 8008842: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8008844: 68fb ldr r3, [r7, #12] 8008846: f403 3380 and.w r3, r3, #65536 @ 0x10000 800884a: 2b00 cmp r3, #0 800884c: d010 beq.n 8008870 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 800884e: 4b11 ldr r3, [pc, #68] @ (8008894 ) 8008850: 685b ldr r3, [r3, #4] 8008852: 0c5b lsrs r3, r3, #17 8008854: f003 0301 and.w r3, r3, #1 8008858: 4a11 ldr r2, [pc, #68] @ (80088a0 ) 800885a: 5cd3 ldrb r3, [r2, r3] 800885c: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 800885e: 687b ldr r3, [r7, #4] 8008860: 4a0d ldr r2, [pc, #52] @ (8008898 ) 8008862: fb03 f202 mul.w r2, r3, r2 8008866: 68bb ldr r3, [r7, #8] 8008868: fbb2 f3f3 udiv r3, r2, r3 800886c: 617b str r3, [r7, #20] 800886e: e004 b.n 800887a #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8008870: 687b ldr r3, [r7, #4] 8008872: 4a0c ldr r2, [pc, #48] @ (80088a4 ) 8008874: fb02 f303 mul.w r3, r2, r3 8008878: 617b str r3, [r7, #20] } sysclockfreq = pllclk; 800887a: 697b ldr r3, [r7, #20] 800887c: 613b str r3, [r7, #16] break; 800887e: e002 b.n 8008886 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8008880: 4b09 ldr r3, [pc, #36] @ (80088a8 ) 8008882: 613b str r3, [r7, #16] break; 8008884: bf00 nop } } return sysclockfreq; 8008886: 693b ldr r3, [r7, #16] } 8008888: 4618 mov r0, r3 800888a: 371c adds r7, #28 800888c: 46bd mov sp, r7 800888e: bc80 pop {r7} 8008890: 4770 bx lr 8008892: bf00 nop 8008894: 40021000 .word 0x40021000 8008898: 00b71b00 .word 0x00b71b00 800889c: 0800f530 .word 0x0800f530 80088a0: 0800f540 .word 0x0800f540 80088a4: 003d0900 .word 0x003d0900 80088a8: 007a1200 .word 0x007a1200 080088ac : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 80088ac: b480 push {r7} 80088ae: af00 add r7, sp, #0 return SystemCoreClock; 80088b0: 4b02 ldr r3, [pc, #8] @ (80088bc ) 80088b2: 681b ldr r3, [r3, #0] } 80088b4: 4618 mov r0, r3 80088b6: 46bd mov sp, r7 80088b8: bc80 pop {r7} 80088ba: 4770 bx lr 80088bc: 20000010 .word 0x20000010 080088c0 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 80088c0: b580 push {r7, lr} 80088c2: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 80088c4: f7ff fff2 bl 80088ac 80088c8: 4602 mov r2, r0 80088ca: 4b05 ldr r3, [pc, #20] @ (80088e0 ) 80088cc: 685b ldr r3, [r3, #4] 80088ce: 0a1b lsrs r3, r3, #8 80088d0: f003 0307 and.w r3, r3, #7 80088d4: 4903 ldr r1, [pc, #12] @ (80088e4 ) 80088d6: 5ccb ldrb r3, [r1, r3] 80088d8: fa22 f303 lsr.w r3, r2, r3 } 80088dc: 4618 mov r0, r3 80088de: bd80 pop {r7, pc} 80088e0: 40021000 .word 0x40021000 80088e4: 0800f528 .word 0x0800f528 080088e8 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 80088e8: b580 push {r7, lr} 80088ea: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 80088ec: f7ff ffde bl 80088ac 80088f0: 4602 mov r2, r0 80088f2: 4b05 ldr r3, [pc, #20] @ (8008908 ) 80088f4: 685b ldr r3, [r3, #4] 80088f6: 0adb lsrs r3, r3, #11 80088f8: f003 0307 and.w r3, r3, #7 80088fc: 4903 ldr r1, [pc, #12] @ (800890c ) 80088fe: 5ccb ldrb r3, [r1, r3] 8008900: fa22 f303 lsr.w r3, r2, r3 } 8008904: 4618 mov r0, r3 8008906: bd80 pop {r7, pc} 8008908: 40021000 .word 0x40021000 800890c: 0800f528 .word 0x0800f528 08008910 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 8008910: b480 push {r7} 8008912: b085 sub sp, #20 8008914: af00 add r7, sp, #0 8008916: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8008918: 4b0a ldr r3, [pc, #40] @ (8008944 ) 800891a: 681b ldr r3, [r3, #0] 800891c: 4a0a ldr r2, [pc, #40] @ (8008948 ) 800891e: fba2 2303 umull r2, r3, r2, r3 8008922: 0a5b lsrs r3, r3, #9 8008924: 687a ldr r2, [r7, #4] 8008926: fb02 f303 mul.w r3, r2, r3 800892a: 60fb str r3, [r7, #12] do { __NOP(); 800892c: bf00 nop } while (Delay --); 800892e: 68fb ldr r3, [r7, #12] 8008930: 1e5a subs r2, r3, #1 8008932: 60fa str r2, [r7, #12] 8008934: 2b00 cmp r3, #0 8008936: d1f9 bne.n 800892c } 8008938: bf00 nop 800893a: bf00 nop 800893c: 3714 adds r7, #20 800893e: 46bd mov sp, r7 8008940: bc80 pop {r7} 8008942: 4770 bx lr 8008944: 20000010 .word 0x20000010 8008948: 10624dd3 .word 0x10624dd3 0800894c : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 800894c: b580 push {r7, lr} 800894e: b086 sub sp, #24 8008950: af00 add r7, sp, #0 8008952: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 8008954: 2300 movs r3, #0 8008956: 613b str r3, [r7, #16] 8008958: 2300 movs r3, #0 800895a: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 800895c: 687b ldr r3, [r7, #4] 800895e: 681b ldr r3, [r3, #0] 8008960: f003 0301 and.w r3, r3, #1 8008964: 2b00 cmp r3, #0 8008966: d07d beq.n 8008a64 { FlagStatus pwrclkchanged = RESET; 8008968: 2300 movs r3, #0 800896a: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 800896c: 4b4f ldr r3, [pc, #316] @ (8008aac ) 800896e: 69db ldr r3, [r3, #28] 8008970: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8008974: 2b00 cmp r3, #0 8008976: d10d bne.n 8008994 { __HAL_RCC_PWR_CLK_ENABLE(); 8008978: 4b4c ldr r3, [pc, #304] @ (8008aac ) 800897a: 69db ldr r3, [r3, #28] 800897c: 4a4b ldr r2, [pc, #300] @ (8008aac ) 800897e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8008982: 61d3 str r3, [r2, #28] 8008984: 4b49 ldr r3, [pc, #292] @ (8008aac ) 8008986: 69db ldr r3, [r3, #28] 8008988: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800898c: 60bb str r3, [r7, #8] 800898e: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8008990: 2301 movs r3, #1 8008992: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8008994: 4b46 ldr r3, [pc, #280] @ (8008ab0 ) 8008996: 681b ldr r3, [r3, #0] 8008998: f403 7380 and.w r3, r3, #256 @ 0x100 800899c: 2b00 cmp r3, #0 800899e: d118 bne.n 80089d2 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80089a0: 4b43 ldr r3, [pc, #268] @ (8008ab0 ) 80089a2: 681b ldr r3, [r3, #0] 80089a4: 4a42 ldr r2, [pc, #264] @ (8008ab0 ) 80089a6: f443 7380 orr.w r3, r3, #256 @ 0x100 80089aa: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80089ac: f7fc fbd0 bl 8005150 80089b0: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80089b2: e008 b.n 80089c6 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80089b4: f7fc fbcc bl 8005150 80089b8: 4602 mov r2, r0 80089ba: 693b ldr r3, [r7, #16] 80089bc: 1ad3 subs r3, r2, r3 80089be: 2b64 cmp r3, #100 @ 0x64 80089c0: d901 bls.n 80089c6 { return HAL_TIMEOUT; 80089c2: 2303 movs r3, #3 80089c4: e06d b.n 8008aa2 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80089c6: 4b3a ldr r3, [pc, #232] @ (8008ab0 ) 80089c8: 681b ldr r3, [r3, #0] 80089ca: f403 7380 and.w r3, r3, #256 @ 0x100 80089ce: 2b00 cmp r3, #0 80089d0: d0f0 beq.n 80089b4 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 80089d2: 4b36 ldr r3, [pc, #216] @ (8008aac ) 80089d4: 6a1b ldr r3, [r3, #32] 80089d6: f403 7340 and.w r3, r3, #768 @ 0x300 80089da: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 80089dc: 68fb ldr r3, [r7, #12] 80089de: 2b00 cmp r3, #0 80089e0: d02e beq.n 8008a40 80089e2: 687b ldr r3, [r7, #4] 80089e4: 685b ldr r3, [r3, #4] 80089e6: f403 7340 and.w r3, r3, #768 @ 0x300 80089ea: 68fa ldr r2, [r7, #12] 80089ec: 429a cmp r2, r3 80089ee: d027 beq.n 8008a40 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 80089f0: 4b2e ldr r3, [pc, #184] @ (8008aac ) 80089f2: 6a1b ldr r3, [r3, #32] 80089f4: f423 7340 bic.w r3, r3, #768 @ 0x300 80089f8: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 80089fa: 4b2e ldr r3, [pc, #184] @ (8008ab4 ) 80089fc: 2201 movs r2, #1 80089fe: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8008a00: 4b2c ldr r3, [pc, #176] @ (8008ab4 ) 8008a02: 2200 movs r2, #0 8008a04: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 8008a06: 4a29 ldr r2, [pc, #164] @ (8008aac ) 8008a08: 68fb ldr r3, [r7, #12] 8008a0a: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8008a0c: 68fb ldr r3, [r7, #12] 8008a0e: f003 0301 and.w r3, r3, #1 8008a12: 2b00 cmp r3, #0 8008a14: d014 beq.n 8008a40 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8008a16: f7fc fb9b bl 8005150 8008a1a: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8008a1c: e00a b.n 8008a34 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8008a1e: f7fc fb97 bl 8005150 8008a22: 4602 mov r2, r0 8008a24: 693b ldr r3, [r7, #16] 8008a26: 1ad3 subs r3, r2, r3 8008a28: f241 3288 movw r2, #5000 @ 0x1388 8008a2c: 4293 cmp r3, r2 8008a2e: d901 bls.n 8008a34 { return HAL_TIMEOUT; 8008a30: 2303 movs r3, #3 8008a32: e036 b.n 8008aa2 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8008a34: 4b1d ldr r3, [pc, #116] @ (8008aac ) 8008a36: 6a1b ldr r3, [r3, #32] 8008a38: f003 0302 and.w r3, r3, #2 8008a3c: 2b00 cmp r3, #0 8008a3e: d0ee beq.n 8008a1e } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8008a40: 4b1a ldr r3, [pc, #104] @ (8008aac ) 8008a42: 6a1b ldr r3, [r3, #32] 8008a44: f423 7240 bic.w r2, r3, #768 @ 0x300 8008a48: 687b ldr r3, [r7, #4] 8008a4a: 685b ldr r3, [r3, #4] 8008a4c: 4917 ldr r1, [pc, #92] @ (8008aac ) 8008a4e: 4313 orrs r3, r2 8008a50: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8008a52: 7dfb ldrb r3, [r7, #23] 8008a54: 2b01 cmp r3, #1 8008a56: d105 bne.n 8008a64 { __HAL_RCC_PWR_CLK_DISABLE(); 8008a58: 4b14 ldr r3, [pc, #80] @ (8008aac ) 8008a5a: 69db ldr r3, [r3, #28] 8008a5c: 4a13 ldr r2, [pc, #76] @ (8008aac ) 8008a5e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8008a62: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8008a64: 687b ldr r3, [r7, #4] 8008a66: 681b ldr r3, [r3, #0] 8008a68: f003 0302 and.w r3, r3, #2 8008a6c: 2b00 cmp r3, #0 8008a6e: d008 beq.n 8008a82 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8008a70: 4b0e ldr r3, [pc, #56] @ (8008aac ) 8008a72: 685b ldr r3, [r3, #4] 8008a74: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8008a78: 687b ldr r3, [r7, #4] 8008a7a: 689b ldr r3, [r3, #8] 8008a7c: 490b ldr r1, [pc, #44] @ (8008aac ) 8008a7e: 4313 orrs r3, r2 8008a80: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8008a82: 687b ldr r3, [r7, #4] 8008a84: 681b ldr r3, [r3, #0] 8008a86: f003 0310 and.w r3, r3, #16 8008a8a: 2b00 cmp r3, #0 8008a8c: d008 beq.n 8008aa0 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8008a8e: 4b07 ldr r3, [pc, #28] @ (8008aac ) 8008a90: 685b ldr r3, [r3, #4] 8008a92: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 8008a96: 687b ldr r3, [r7, #4] 8008a98: 68db ldr r3, [r3, #12] 8008a9a: 4904 ldr r1, [pc, #16] @ (8008aac ) 8008a9c: 4313 orrs r3, r2 8008a9e: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8008aa0: 2300 movs r3, #0 } 8008aa2: 4618 mov r0, r3 8008aa4: 3718 adds r7, #24 8008aa6: 46bd mov sp, r7 8008aa8: bd80 pop {r7, pc} 8008aaa: bf00 nop 8008aac: 40021000 .word 0x40021000 8008ab0: 40007000 .word 0x40007000 8008ab4: 42420440 .word 0x42420440 08008ab8 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8008ab8: b580 push {r7, lr} 8008aba: b082 sub sp, #8 8008abc: af00 add r7, sp, #0 8008abe: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8008ac0: 687b ldr r3, [r7, #4] 8008ac2: 2b00 cmp r3, #0 8008ac4: d101 bne.n 8008aca { return HAL_ERROR; 8008ac6: 2301 movs r3, #1 8008ac8: e041 b.n 8008b4e assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8008aca: 687b ldr r3, [r7, #4] 8008acc: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8008ad0: b2db uxtb r3, r3 8008ad2: 2b00 cmp r3, #0 8008ad4: d106 bne.n 8008ae4 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8008ad6: 687b ldr r3, [r7, #4] 8008ad8: 2200 movs r2, #0 8008ada: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8008ade: 6878 ldr r0, [r7, #4] 8008ae0: f7fc f96a bl 8004db8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8008ae4: 687b ldr r3, [r7, #4] 8008ae6: 2202 movs r2, #2 8008ae8: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8008aec: 687b ldr r3, [r7, #4] 8008aee: 681a ldr r2, [r3, #0] 8008af0: 687b ldr r3, [r7, #4] 8008af2: 3304 adds r3, #4 8008af4: 4619 mov r1, r3 8008af6: 4610 mov r0, r2 8008af8: f000 fb3e bl 8009178 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8008afc: 687b ldr r3, [r7, #4] 8008afe: 2201 movs r2, #1 8008b00: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8008b04: 687b ldr r3, [r7, #4] 8008b06: 2201 movs r2, #1 8008b08: f883 203e strb.w r2, [r3, #62] @ 0x3e 8008b0c: 687b ldr r3, [r7, #4] 8008b0e: 2201 movs r2, #1 8008b10: f883 203f strb.w r2, [r3, #63] @ 0x3f 8008b14: 687b ldr r3, [r7, #4] 8008b16: 2201 movs r2, #1 8008b18: f883 2040 strb.w r2, [r3, #64] @ 0x40 8008b1c: 687b ldr r3, [r7, #4] 8008b1e: 2201 movs r2, #1 8008b20: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8008b24: 687b ldr r3, [r7, #4] 8008b26: 2201 movs r2, #1 8008b28: f883 2042 strb.w r2, [r3, #66] @ 0x42 8008b2c: 687b ldr r3, [r7, #4] 8008b2e: 2201 movs r2, #1 8008b30: f883 2043 strb.w r2, [r3, #67] @ 0x43 8008b34: 687b ldr r3, [r7, #4] 8008b36: 2201 movs r2, #1 8008b38: f883 2044 strb.w r2, [r3, #68] @ 0x44 8008b3c: 687b ldr r3, [r7, #4] 8008b3e: 2201 movs r2, #1 8008b40: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8008b44: 687b ldr r3, [r7, #4] 8008b46: 2201 movs r2, #1 8008b48: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8008b4c: 2300 movs r3, #0 } 8008b4e: 4618 mov r0, r3 8008b50: 3708 adds r7, #8 8008b52: 46bd mov sp, r7 8008b54: bd80 pop {r7, pc} 08008b56 : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8008b56: b580 push {r7, lr} 8008b58: b082 sub sp, #8 8008b5a: af00 add r7, sp, #0 8008b5c: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8008b5e: 687b ldr r3, [r7, #4] 8008b60: 2b00 cmp r3, #0 8008b62: d101 bne.n 8008b68 { return HAL_ERROR; 8008b64: 2301 movs r3, #1 8008b66: e041 b.n 8008bec assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8008b68: 687b ldr r3, [r7, #4] 8008b6a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8008b6e: b2db uxtb r3, r3 8008b70: 2b00 cmp r3, #0 8008b72: d106 bne.n 8008b82 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8008b74: 687b ldr r3, [r7, #4] 8008b76: 2200 movs r2, #0 8008b78: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8008b7c: 6878 ldr r0, [r7, #4] 8008b7e: f000 f839 bl 8008bf4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8008b82: 687b ldr r3, [r7, #4] 8008b84: 2202 movs r2, #2 8008b86: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8008b8a: 687b ldr r3, [r7, #4] 8008b8c: 681a ldr r2, [r3, #0] 8008b8e: 687b ldr r3, [r7, #4] 8008b90: 3304 adds r3, #4 8008b92: 4619 mov r1, r3 8008b94: 4610 mov r0, r2 8008b96: f000 faef bl 8009178 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8008b9a: 687b ldr r3, [r7, #4] 8008b9c: 2201 movs r2, #1 8008b9e: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8008ba2: 687b ldr r3, [r7, #4] 8008ba4: 2201 movs r2, #1 8008ba6: f883 203e strb.w r2, [r3, #62] @ 0x3e 8008baa: 687b ldr r3, [r7, #4] 8008bac: 2201 movs r2, #1 8008bae: f883 203f strb.w r2, [r3, #63] @ 0x3f 8008bb2: 687b ldr r3, [r7, #4] 8008bb4: 2201 movs r2, #1 8008bb6: f883 2040 strb.w r2, [r3, #64] @ 0x40 8008bba: 687b ldr r3, [r7, #4] 8008bbc: 2201 movs r2, #1 8008bbe: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8008bc2: 687b ldr r3, [r7, #4] 8008bc4: 2201 movs r2, #1 8008bc6: f883 2042 strb.w r2, [r3, #66] @ 0x42 8008bca: 687b ldr r3, [r7, #4] 8008bcc: 2201 movs r2, #1 8008bce: f883 2043 strb.w r2, [r3, #67] @ 0x43 8008bd2: 687b ldr r3, [r7, #4] 8008bd4: 2201 movs r2, #1 8008bd6: f883 2044 strb.w r2, [r3, #68] @ 0x44 8008bda: 687b ldr r3, [r7, #4] 8008bdc: 2201 movs r2, #1 8008bde: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8008be2: 687b ldr r3, [r7, #4] 8008be4: 2201 movs r2, #1 8008be6: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8008bea: 2300 movs r3, #0 } 8008bec: 4618 mov r0, r3 8008bee: 3708 adds r7, #8 8008bf0: 46bd mov sp, r7 8008bf2: bd80 pop {r7, pc} 08008bf4 : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 8008bf4: b480 push {r7} 8008bf6: b083 sub sp, #12 8008bf8: af00 add r7, sp, #0 8008bfa: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 8008bfc: bf00 nop 8008bfe: 370c adds r7, #12 8008c00: 46bd mov sp, r7 8008c02: bc80 pop {r7} 8008c04: 4770 bx lr ... 08008c08 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8008c08: b580 push {r7, lr} 8008c0a: b084 sub sp, #16 8008c0c: af00 add r7, sp, #0 8008c0e: 6078 str r0, [r7, #4] 8008c10: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8008c12: 683b ldr r3, [r7, #0] 8008c14: 2b00 cmp r3, #0 8008c16: d109 bne.n 8008c2c 8008c18: 687b ldr r3, [r7, #4] 8008c1a: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8008c1e: b2db uxtb r3, r3 8008c20: 2b01 cmp r3, #1 8008c22: bf14 ite ne 8008c24: 2301 movne r3, #1 8008c26: 2300 moveq r3, #0 8008c28: b2db uxtb r3, r3 8008c2a: e022 b.n 8008c72 8008c2c: 683b ldr r3, [r7, #0] 8008c2e: 2b04 cmp r3, #4 8008c30: d109 bne.n 8008c46 8008c32: 687b ldr r3, [r7, #4] 8008c34: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8008c38: b2db uxtb r3, r3 8008c3a: 2b01 cmp r3, #1 8008c3c: bf14 ite ne 8008c3e: 2301 movne r3, #1 8008c40: 2300 moveq r3, #0 8008c42: b2db uxtb r3, r3 8008c44: e015 b.n 8008c72 8008c46: 683b ldr r3, [r7, #0] 8008c48: 2b08 cmp r3, #8 8008c4a: d109 bne.n 8008c60 8008c4c: 687b ldr r3, [r7, #4] 8008c4e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8008c52: b2db uxtb r3, r3 8008c54: 2b01 cmp r3, #1 8008c56: bf14 ite ne 8008c58: 2301 movne r3, #1 8008c5a: 2300 moveq r3, #0 8008c5c: b2db uxtb r3, r3 8008c5e: e008 b.n 8008c72 8008c60: 687b ldr r3, [r7, #4] 8008c62: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8008c66: b2db uxtb r3, r3 8008c68: 2b01 cmp r3, #1 8008c6a: bf14 ite ne 8008c6c: 2301 movne r3, #1 8008c6e: 2300 moveq r3, #0 8008c70: b2db uxtb r3, r3 8008c72: 2b00 cmp r3, #0 8008c74: d001 beq.n 8008c7a { return HAL_ERROR; 8008c76: 2301 movs r3, #1 8008c78: e05e b.n 8008d38 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8008c7a: 683b ldr r3, [r7, #0] 8008c7c: 2b00 cmp r3, #0 8008c7e: d104 bne.n 8008c8a 8008c80: 687b ldr r3, [r7, #4] 8008c82: 2202 movs r2, #2 8008c84: f883 203e strb.w r2, [r3, #62] @ 0x3e 8008c88: e013 b.n 8008cb2 8008c8a: 683b ldr r3, [r7, #0] 8008c8c: 2b04 cmp r3, #4 8008c8e: d104 bne.n 8008c9a 8008c90: 687b ldr r3, [r7, #4] 8008c92: 2202 movs r2, #2 8008c94: f883 203f strb.w r2, [r3, #63] @ 0x3f 8008c98: e00b b.n 8008cb2 8008c9a: 683b ldr r3, [r7, #0] 8008c9c: 2b08 cmp r3, #8 8008c9e: d104 bne.n 8008caa 8008ca0: 687b ldr r3, [r7, #4] 8008ca2: 2202 movs r2, #2 8008ca4: f883 2040 strb.w r2, [r3, #64] @ 0x40 8008ca8: e003 b.n 8008cb2 8008caa: 687b ldr r3, [r7, #4] 8008cac: 2202 movs r2, #2 8008cae: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8008cb2: 687b ldr r3, [r7, #4] 8008cb4: 681b ldr r3, [r3, #0] 8008cb6: 2201 movs r2, #1 8008cb8: 6839 ldr r1, [r7, #0] 8008cba: 4618 mov r0, r3 8008cbc: f000 fce8 bl 8009690 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8008cc0: 687b ldr r3, [r7, #4] 8008cc2: 681b ldr r3, [r3, #0] 8008cc4: 4a1e ldr r2, [pc, #120] @ (8008d40 ) 8008cc6: 4293 cmp r3, r2 8008cc8: d107 bne.n 8008cda { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8008cca: 687b ldr r3, [r7, #4] 8008ccc: 681b ldr r3, [r3, #0] 8008cce: 6c5a ldr r2, [r3, #68] @ 0x44 8008cd0: 687b ldr r3, [r7, #4] 8008cd2: 681b ldr r3, [r3, #0] 8008cd4: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8008cd8: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8008cda: 687b ldr r3, [r7, #4] 8008cdc: 681b ldr r3, [r3, #0] 8008cde: 4a18 ldr r2, [pc, #96] @ (8008d40 ) 8008ce0: 4293 cmp r3, r2 8008ce2: d00e beq.n 8008d02 8008ce4: 687b ldr r3, [r7, #4] 8008ce6: 681b ldr r3, [r3, #0] 8008ce8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8008cec: d009 beq.n 8008d02 8008cee: 687b ldr r3, [r7, #4] 8008cf0: 681b ldr r3, [r3, #0] 8008cf2: 4a14 ldr r2, [pc, #80] @ (8008d44 ) 8008cf4: 4293 cmp r3, r2 8008cf6: d004 beq.n 8008d02 8008cf8: 687b ldr r3, [r7, #4] 8008cfa: 681b ldr r3, [r3, #0] 8008cfc: 4a12 ldr r2, [pc, #72] @ (8008d48 ) 8008cfe: 4293 cmp r3, r2 8008d00: d111 bne.n 8008d26 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8008d02: 687b ldr r3, [r7, #4] 8008d04: 681b ldr r3, [r3, #0] 8008d06: 689b ldr r3, [r3, #8] 8008d08: f003 0307 and.w r3, r3, #7 8008d0c: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8008d0e: 68fb ldr r3, [r7, #12] 8008d10: 2b06 cmp r3, #6 8008d12: d010 beq.n 8008d36 { __HAL_TIM_ENABLE(htim); 8008d14: 687b ldr r3, [r7, #4] 8008d16: 681b ldr r3, [r3, #0] 8008d18: 681a ldr r2, [r3, #0] 8008d1a: 687b ldr r3, [r7, #4] 8008d1c: 681b ldr r3, [r3, #0] 8008d1e: f042 0201 orr.w r2, r2, #1 8008d22: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8008d24: e007 b.n 8008d36 } } else { __HAL_TIM_ENABLE(htim); 8008d26: 687b ldr r3, [r7, #4] 8008d28: 681b ldr r3, [r3, #0] 8008d2a: 681a ldr r2, [r3, #0] 8008d2c: 687b ldr r3, [r7, #4] 8008d2e: 681b ldr r3, [r3, #0] 8008d30: f042 0201 orr.w r2, r2, #1 8008d34: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8008d36: 2300 movs r3, #0 } 8008d38: 4618 mov r0, r3 8008d3a: 3710 adds r7, #16 8008d3c: 46bd mov sp, r7 8008d3e: bd80 pop {r7, pc} 8008d40: 40012c00 .word 0x40012c00 8008d44: 40000400 .word 0x40000400 8008d48: 40000800 .word 0x40000800 08008d4c : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) { 8008d4c: b580 push {r7, lr} 8008d4e: b082 sub sp, #8 8008d50: af00 add r7, sp, #0 8008d52: 6078 str r0, [r7, #4] 8008d54: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Disable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); 8008d56: 687b ldr r3, [r7, #4] 8008d58: 681b ldr r3, [r3, #0] 8008d5a: 2200 movs r2, #0 8008d5c: 6839 ldr r1, [r7, #0] 8008d5e: 4618 mov r0, r3 8008d60: f000 fc96 bl 8009690 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8008d64: 687b ldr r3, [r7, #4] 8008d66: 681b ldr r3, [r3, #0] 8008d68: 4a29 ldr r2, [pc, #164] @ (8008e10 ) 8008d6a: 4293 cmp r3, r2 8008d6c: d117 bne.n 8008d9e { /* Disable the Main Output */ __HAL_TIM_MOE_DISABLE(htim); 8008d6e: 687b ldr r3, [r7, #4] 8008d70: 681b ldr r3, [r3, #0] 8008d72: 6a1a ldr r2, [r3, #32] 8008d74: f241 1311 movw r3, #4369 @ 0x1111 8008d78: 4013 ands r3, r2 8008d7a: 2b00 cmp r3, #0 8008d7c: d10f bne.n 8008d9e 8008d7e: 687b ldr r3, [r7, #4] 8008d80: 681b ldr r3, [r3, #0] 8008d82: 6a1a ldr r2, [r3, #32] 8008d84: f240 4344 movw r3, #1092 @ 0x444 8008d88: 4013 ands r3, r2 8008d8a: 2b00 cmp r3, #0 8008d8c: d107 bne.n 8008d9e 8008d8e: 687b ldr r3, [r7, #4] 8008d90: 681b ldr r3, [r3, #0] 8008d92: 6c5a ldr r2, [r3, #68] @ 0x44 8008d94: 687b ldr r3, [r7, #4] 8008d96: 681b ldr r3, [r3, #0] 8008d98: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8008d9c: 645a str r2, [r3, #68] @ 0x44 } /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); 8008d9e: 687b ldr r3, [r7, #4] 8008da0: 681b ldr r3, [r3, #0] 8008da2: 6a1a ldr r2, [r3, #32] 8008da4: f241 1311 movw r3, #4369 @ 0x1111 8008da8: 4013 ands r3, r2 8008daa: 2b00 cmp r3, #0 8008dac: d10f bne.n 8008dce 8008dae: 687b ldr r3, [r7, #4] 8008db0: 681b ldr r3, [r3, #0] 8008db2: 6a1a ldr r2, [r3, #32] 8008db4: f240 4344 movw r3, #1092 @ 0x444 8008db8: 4013 ands r3, r2 8008dba: 2b00 cmp r3, #0 8008dbc: d107 bne.n 8008dce 8008dbe: 687b ldr r3, [r7, #4] 8008dc0: 681b ldr r3, [r3, #0] 8008dc2: 681a ldr r2, [r3, #0] 8008dc4: 687b ldr r3, [r7, #4] 8008dc6: 681b ldr r3, [r3, #0] 8008dc8: f022 0201 bic.w r2, r2, #1 8008dcc: 601a str r2, [r3, #0] /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 8008dce: 683b ldr r3, [r7, #0] 8008dd0: 2b00 cmp r3, #0 8008dd2: d104 bne.n 8008dde 8008dd4: 687b ldr r3, [r7, #4] 8008dd6: 2201 movs r2, #1 8008dd8: f883 203e strb.w r2, [r3, #62] @ 0x3e 8008ddc: e013 b.n 8008e06 8008dde: 683b ldr r3, [r7, #0] 8008de0: 2b04 cmp r3, #4 8008de2: d104 bne.n 8008dee 8008de4: 687b ldr r3, [r7, #4] 8008de6: 2201 movs r2, #1 8008de8: f883 203f strb.w r2, [r3, #63] @ 0x3f 8008dec: e00b b.n 8008e06 8008dee: 683b ldr r3, [r7, #0] 8008df0: 2b08 cmp r3, #8 8008df2: d104 bne.n 8008dfe 8008df4: 687b ldr r3, [r7, #4] 8008df6: 2201 movs r2, #1 8008df8: f883 2040 strb.w r2, [r3, #64] @ 0x40 8008dfc: e003 b.n 8008e06 8008dfe: 687b ldr r3, [r7, #4] 8008e00: 2201 movs r2, #1 8008e02: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Return function status */ return HAL_OK; 8008e06: 2300 movs r3, #0 } 8008e08: 4618 mov r0, r3 8008e0a: 3708 adds r7, #8 8008e0c: 46bd mov sp, r7 8008e0e: bd80 pop {r7, pc} 8008e10: 40012c00 .word 0x40012c00 08008e14 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8008e14: b580 push {r7, lr} 8008e16: b086 sub sp, #24 8008e18: af00 add r7, sp, #0 8008e1a: 60f8 str r0, [r7, #12] 8008e1c: 60b9 str r1, [r7, #8] 8008e1e: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8008e20: 2300 movs r3, #0 8008e22: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8008e24: 68fb ldr r3, [r7, #12] 8008e26: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8008e2a: 2b01 cmp r3, #1 8008e2c: d101 bne.n 8008e32 8008e2e: 2302 movs r3, #2 8008e30: e0ae b.n 8008f90 8008e32: 68fb ldr r3, [r7, #12] 8008e34: 2201 movs r2, #1 8008e36: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8008e3a: 687b ldr r3, [r7, #4] 8008e3c: 2b0c cmp r3, #12 8008e3e: f200 809f bhi.w 8008f80 8008e42: a201 add r2, pc, #4 @ (adr r2, 8008e48 ) 8008e44: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8008e48: 08008e7d .word 0x08008e7d 8008e4c: 08008f81 .word 0x08008f81 8008e50: 08008f81 .word 0x08008f81 8008e54: 08008f81 .word 0x08008f81 8008e58: 08008ebd .word 0x08008ebd 8008e5c: 08008f81 .word 0x08008f81 8008e60: 08008f81 .word 0x08008f81 8008e64: 08008f81 .word 0x08008f81 8008e68: 08008eff .word 0x08008eff 8008e6c: 08008f81 .word 0x08008f81 8008e70: 08008f81 .word 0x08008f81 8008e74: 08008f81 .word 0x08008f81 8008e78: 08008f3f .word 0x08008f3f { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8008e7c: 68fb ldr r3, [r7, #12] 8008e7e: 681b ldr r3, [r3, #0] 8008e80: 68b9 ldr r1, [r7, #8] 8008e82: 4618 mov r0, r3 8008e84: f000 f9e6 bl 8009254 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 8008e88: 68fb ldr r3, [r7, #12] 8008e8a: 681b ldr r3, [r3, #0] 8008e8c: 699a ldr r2, [r3, #24] 8008e8e: 68fb ldr r3, [r7, #12] 8008e90: 681b ldr r3, [r3, #0] 8008e92: f042 0208 orr.w r2, r2, #8 8008e96: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 8008e98: 68fb ldr r3, [r7, #12] 8008e9a: 681b ldr r3, [r3, #0] 8008e9c: 699a ldr r2, [r3, #24] 8008e9e: 68fb ldr r3, [r7, #12] 8008ea0: 681b ldr r3, [r3, #0] 8008ea2: f022 0204 bic.w r2, r2, #4 8008ea6: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 8008ea8: 68fb ldr r3, [r7, #12] 8008eaa: 681b ldr r3, [r3, #0] 8008eac: 6999 ldr r1, [r3, #24] 8008eae: 68bb ldr r3, [r7, #8] 8008eb0: 691a ldr r2, [r3, #16] 8008eb2: 68fb ldr r3, [r7, #12] 8008eb4: 681b ldr r3, [r3, #0] 8008eb6: 430a orrs r2, r1 8008eb8: 619a str r2, [r3, #24] break; 8008eba: e064 b.n 8008f86 { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8008ebc: 68fb ldr r3, [r7, #12] 8008ebe: 681b ldr r3, [r3, #0] 8008ec0: 68b9 ldr r1, [r7, #8] 8008ec2: 4618 mov r0, r3 8008ec4: f000 fa2c bl 8009320 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 8008ec8: 68fb ldr r3, [r7, #12] 8008eca: 681b ldr r3, [r3, #0] 8008ecc: 699a ldr r2, [r3, #24] 8008ece: 68fb ldr r3, [r7, #12] 8008ed0: 681b ldr r3, [r3, #0] 8008ed2: f442 6200 orr.w r2, r2, #2048 @ 0x800 8008ed6: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 8008ed8: 68fb ldr r3, [r7, #12] 8008eda: 681b ldr r3, [r3, #0] 8008edc: 699a ldr r2, [r3, #24] 8008ede: 68fb ldr r3, [r7, #12] 8008ee0: 681b ldr r3, [r3, #0] 8008ee2: f422 6280 bic.w r2, r2, #1024 @ 0x400 8008ee6: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 8008ee8: 68fb ldr r3, [r7, #12] 8008eea: 681b ldr r3, [r3, #0] 8008eec: 6999 ldr r1, [r3, #24] 8008eee: 68bb ldr r3, [r7, #8] 8008ef0: 691b ldr r3, [r3, #16] 8008ef2: 021a lsls r2, r3, #8 8008ef4: 68fb ldr r3, [r7, #12] 8008ef6: 681b ldr r3, [r3, #0] 8008ef8: 430a orrs r2, r1 8008efa: 619a str r2, [r3, #24] break; 8008efc: e043 b.n 8008f86 { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8008efe: 68fb ldr r3, [r7, #12] 8008f00: 681b ldr r3, [r3, #0] 8008f02: 68b9 ldr r1, [r7, #8] 8008f04: 4618 mov r0, r3 8008f06: f000 fa75 bl 80093f4 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 8008f0a: 68fb ldr r3, [r7, #12] 8008f0c: 681b ldr r3, [r3, #0] 8008f0e: 69da ldr r2, [r3, #28] 8008f10: 68fb ldr r3, [r7, #12] 8008f12: 681b ldr r3, [r3, #0] 8008f14: f042 0208 orr.w r2, r2, #8 8008f18: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 8008f1a: 68fb ldr r3, [r7, #12] 8008f1c: 681b ldr r3, [r3, #0] 8008f1e: 69da ldr r2, [r3, #28] 8008f20: 68fb ldr r3, [r7, #12] 8008f22: 681b ldr r3, [r3, #0] 8008f24: f022 0204 bic.w r2, r2, #4 8008f28: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 8008f2a: 68fb ldr r3, [r7, #12] 8008f2c: 681b ldr r3, [r3, #0] 8008f2e: 69d9 ldr r1, [r3, #28] 8008f30: 68bb ldr r3, [r7, #8] 8008f32: 691a ldr r2, [r3, #16] 8008f34: 68fb ldr r3, [r7, #12] 8008f36: 681b ldr r3, [r3, #0] 8008f38: 430a orrs r2, r1 8008f3a: 61da str r2, [r3, #28] break; 8008f3c: e023 b.n 8008f86 { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 8008f3e: 68fb ldr r3, [r7, #12] 8008f40: 681b ldr r3, [r3, #0] 8008f42: 68b9 ldr r1, [r7, #8] 8008f44: 4618 mov r0, r3 8008f46: f000 fabf bl 80094c8 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 8008f4a: 68fb ldr r3, [r7, #12] 8008f4c: 681b ldr r3, [r3, #0] 8008f4e: 69da ldr r2, [r3, #28] 8008f50: 68fb ldr r3, [r7, #12] 8008f52: 681b ldr r3, [r3, #0] 8008f54: f442 6200 orr.w r2, r2, #2048 @ 0x800 8008f58: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 8008f5a: 68fb ldr r3, [r7, #12] 8008f5c: 681b ldr r3, [r3, #0] 8008f5e: 69da ldr r2, [r3, #28] 8008f60: 68fb ldr r3, [r7, #12] 8008f62: 681b ldr r3, [r3, #0] 8008f64: f422 6280 bic.w r2, r2, #1024 @ 0x400 8008f68: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 8008f6a: 68fb ldr r3, [r7, #12] 8008f6c: 681b ldr r3, [r3, #0] 8008f6e: 69d9 ldr r1, [r3, #28] 8008f70: 68bb ldr r3, [r7, #8] 8008f72: 691b ldr r3, [r3, #16] 8008f74: 021a lsls r2, r3, #8 8008f76: 68fb ldr r3, [r7, #12] 8008f78: 681b ldr r3, [r3, #0] 8008f7a: 430a orrs r2, r1 8008f7c: 61da str r2, [r3, #28] break; 8008f7e: e002 b.n 8008f86 } default: status = HAL_ERROR; 8008f80: 2301 movs r3, #1 8008f82: 75fb strb r3, [r7, #23] break; 8008f84: bf00 nop } __HAL_UNLOCK(htim); 8008f86: 68fb ldr r3, [r7, #12] 8008f88: 2200 movs r2, #0 8008f8a: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8008f8e: 7dfb ldrb r3, [r7, #23] } 8008f90: 4618 mov r0, r3 8008f92: 3718 adds r7, #24 8008f94: 46bd mov sp, r7 8008f96: bd80 pop {r7, pc} 08008f98 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 8008f98: b580 push {r7, lr} 8008f9a: b084 sub sp, #16 8008f9c: af00 add r7, sp, #0 8008f9e: 6078 str r0, [r7, #4] 8008fa0: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8008fa2: 2300 movs r3, #0 8008fa4: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 8008fa6: 687b ldr r3, [r7, #4] 8008fa8: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8008fac: 2b01 cmp r3, #1 8008fae: d101 bne.n 8008fb4 8008fb0: 2302 movs r3, #2 8008fb2: e0b4 b.n 800911e 8008fb4: 687b ldr r3, [r7, #4] 8008fb6: 2201 movs r2, #1 8008fb8: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 8008fbc: 687b ldr r3, [r7, #4] 8008fbe: 2202 movs r2, #2 8008fc0: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 8008fc4: 687b ldr r3, [r7, #4] 8008fc6: 681b ldr r3, [r3, #0] 8008fc8: 689b ldr r3, [r3, #8] 8008fca: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 8008fcc: 68bb ldr r3, [r7, #8] 8008fce: f023 0377 bic.w r3, r3, #119 @ 0x77 8008fd2: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8008fd4: 68bb ldr r3, [r7, #8] 8008fd6: f423 437f bic.w r3, r3, #65280 @ 0xff00 8008fda: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 8008fdc: 687b ldr r3, [r7, #4] 8008fde: 681b ldr r3, [r3, #0] 8008fe0: 68ba ldr r2, [r7, #8] 8008fe2: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 8008fe4: 683b ldr r3, [r7, #0] 8008fe6: 681b ldr r3, [r3, #0] 8008fe8: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8008fec: d03e beq.n 800906c 8008fee: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8008ff2: f200 8087 bhi.w 8009104 8008ff6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8008ffa: f000 8086 beq.w 800910a 8008ffe: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8009002: d87f bhi.n 8009104 8009004: 2b70 cmp r3, #112 @ 0x70 8009006: d01a beq.n 800903e 8009008: 2b70 cmp r3, #112 @ 0x70 800900a: d87b bhi.n 8009104 800900c: 2b60 cmp r3, #96 @ 0x60 800900e: d050 beq.n 80090b2 8009010: 2b60 cmp r3, #96 @ 0x60 8009012: d877 bhi.n 8009104 8009014: 2b50 cmp r3, #80 @ 0x50 8009016: d03c beq.n 8009092 8009018: 2b50 cmp r3, #80 @ 0x50 800901a: d873 bhi.n 8009104 800901c: 2b40 cmp r3, #64 @ 0x40 800901e: d058 beq.n 80090d2 8009020: 2b40 cmp r3, #64 @ 0x40 8009022: d86f bhi.n 8009104 8009024: 2b30 cmp r3, #48 @ 0x30 8009026: d064 beq.n 80090f2 8009028: 2b30 cmp r3, #48 @ 0x30 800902a: d86b bhi.n 8009104 800902c: 2b20 cmp r3, #32 800902e: d060 beq.n 80090f2 8009030: 2b20 cmp r3, #32 8009032: d867 bhi.n 8009104 8009034: 2b00 cmp r3, #0 8009036: d05c beq.n 80090f2 8009038: 2b10 cmp r3, #16 800903a: d05a beq.n 80090f2 800903c: e062 b.n 8009104 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 800903e: 687b ldr r3, [r7, #4] 8009040: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8009042: 683b ldr r3, [r7, #0] 8009044: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8009046: 683b ldr r3, [r7, #0] 8009048: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 800904a: 683b ldr r3, [r7, #0] 800904c: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 800904e: f000 fb00 bl 8009652 /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 8009052: 687b ldr r3, [r7, #4] 8009054: 681b ldr r3, [r3, #0] 8009056: 689b ldr r3, [r3, #8] 8009058: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 800905a: 68bb ldr r3, [r7, #8] 800905c: f043 0377 orr.w r3, r3, #119 @ 0x77 8009060: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8009062: 687b ldr r3, [r7, #4] 8009064: 681b ldr r3, [r3, #0] 8009066: 68ba ldr r2, [r7, #8] 8009068: 609a str r2, [r3, #8] break; 800906a: e04f b.n 800910c assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 800906c: 687b ldr r3, [r7, #4] 800906e: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8009070: 683b ldr r3, [r7, #0] 8009072: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8009074: 683b ldr r3, [r7, #0] 8009076: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8009078: 683b ldr r3, [r7, #0] 800907a: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 800907c: f000 fae9 bl 8009652 /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 8009080: 687b ldr r3, [r7, #4] 8009082: 681b ldr r3, [r3, #0] 8009084: 689a ldr r2, [r3, #8] 8009086: 687b ldr r3, [r7, #4] 8009088: 681b ldr r3, [r3, #0] 800908a: f442 4280 orr.w r2, r2, #16384 @ 0x4000 800908e: 609a str r2, [r3, #8] break; 8009090: e03c b.n 800910c /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8009092: 687b ldr r3, [r7, #4] 8009094: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8009096: 683b ldr r3, [r7, #0] 8009098: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 800909a: 683b ldr r3, [r7, #0] 800909c: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 800909e: 461a mov r2, r3 80090a0: f000 fa60 bl 8009564 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 80090a4: 687b ldr r3, [r7, #4] 80090a6: 681b ldr r3, [r3, #0] 80090a8: 2150 movs r1, #80 @ 0x50 80090aa: 4618 mov r0, r3 80090ac: f000 fab7 bl 800961e break; 80090b0: e02c b.n 800910c /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 80090b2: 687b ldr r3, [r7, #4] 80090b4: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 80090b6: 683b ldr r3, [r7, #0] 80090b8: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 80090ba: 683b ldr r3, [r7, #0] 80090bc: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 80090be: 461a mov r2, r3 80090c0: f000 fa7e bl 80095c0 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 80090c4: 687b ldr r3, [r7, #4] 80090c6: 681b ldr r3, [r3, #0] 80090c8: 2160 movs r1, #96 @ 0x60 80090ca: 4618 mov r0, r3 80090cc: f000 faa7 bl 800961e break; 80090d0: e01c b.n 800910c /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 80090d2: 687b ldr r3, [r7, #4] 80090d4: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 80090d6: 683b ldr r3, [r7, #0] 80090d8: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 80090da: 683b ldr r3, [r7, #0] 80090dc: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 80090de: 461a mov r2, r3 80090e0: f000 fa40 bl 8009564 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 80090e4: 687b ldr r3, [r7, #4] 80090e6: 681b ldr r3, [r3, #0] 80090e8: 2140 movs r1, #64 @ 0x40 80090ea: 4618 mov r0, r3 80090ec: f000 fa97 bl 800961e break; 80090f0: e00c b.n 800910c case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 80090f2: 687b ldr r3, [r7, #4] 80090f4: 681a ldr r2, [r3, #0] 80090f6: 683b ldr r3, [r7, #0] 80090f8: 681b ldr r3, [r3, #0] 80090fa: 4619 mov r1, r3 80090fc: 4610 mov r0, r2 80090fe: f000 fa8e bl 800961e break; 8009102: e003 b.n 800910c } default: status = HAL_ERROR; 8009104: 2301 movs r3, #1 8009106: 73fb strb r3, [r7, #15] break; 8009108: e000 b.n 800910c break; 800910a: bf00 nop } htim->State = HAL_TIM_STATE_READY; 800910c: 687b ldr r3, [r7, #4] 800910e: 2201 movs r2, #1 8009110: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8009114: 687b ldr r3, [r7, #4] 8009116: 2200 movs r2, #0 8009118: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 800911c: 7bfb ldrb r3, [r7, #15] } 800911e: 4618 mov r0, r3 8009120: 3710 adds r7, #16 8009122: 46bd mov sp, r7 8009124: bd80 pop {r7, pc} 08009126 : * @arg TIM_CHANNEL_5: TIM Channel 5 * @arg TIM_CHANNEL_6: TIM Channel 6 * @retval TIM Channel state */ HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel) { 8009126: b480 push {r7} 8009128: b085 sub sp, #20 800912a: af00 add r7, sp, #0 800912c: 6078 str r0, [r7, #4] 800912e: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef channel_state; /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); 8009130: 683b ldr r3, [r7, #0] 8009132: 2b00 cmp r3, #0 8009134: d104 bne.n 8009140 8009136: 687b ldr r3, [r7, #4] 8009138: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 800913c: b2db uxtb r3, r3 800913e: e013 b.n 8009168 8009140: 683b ldr r3, [r7, #0] 8009142: 2b04 cmp r3, #4 8009144: d104 bne.n 8009150 8009146: 687b ldr r3, [r7, #4] 8009148: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 800914c: b2db uxtb r3, r3 800914e: e00b b.n 8009168 8009150: 683b ldr r3, [r7, #0] 8009152: 2b08 cmp r3, #8 8009154: d104 bne.n 8009160 8009156: 687b ldr r3, [r7, #4] 8009158: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 800915c: b2db uxtb r3, r3 800915e: e003 b.n 8009168 8009160: 687b ldr r3, [r7, #4] 8009162: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8009166: b2db uxtb r3, r3 8009168: 73fb strb r3, [r7, #15] return channel_state; 800916a: 7bfb ldrb r3, [r7, #15] } 800916c: 4618 mov r0, r3 800916e: 3714 adds r7, #20 8009170: 46bd mov sp, r7 8009172: bc80 pop {r7} 8009174: 4770 bx lr ... 08009178 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 8009178: b480 push {r7} 800917a: b085 sub sp, #20 800917c: af00 add r7, sp, #0 800917e: 6078 str r0, [r7, #4] 8009180: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 8009182: 687b ldr r3, [r7, #4] 8009184: 681b ldr r3, [r3, #0] 8009186: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8009188: 687b ldr r3, [r7, #4] 800918a: 4a2f ldr r2, [pc, #188] @ (8009248 ) 800918c: 4293 cmp r3, r2 800918e: d00b beq.n 80091a8 8009190: 687b ldr r3, [r7, #4] 8009192: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8009196: d007 beq.n 80091a8 8009198: 687b ldr r3, [r7, #4] 800919a: 4a2c ldr r2, [pc, #176] @ (800924c ) 800919c: 4293 cmp r3, r2 800919e: d003 beq.n 80091a8 80091a0: 687b ldr r3, [r7, #4] 80091a2: 4a2b ldr r2, [pc, #172] @ (8009250 ) 80091a4: 4293 cmp r3, r2 80091a6: d108 bne.n 80091ba { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 80091a8: 68fb ldr r3, [r7, #12] 80091aa: f023 0370 bic.w r3, r3, #112 @ 0x70 80091ae: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 80091b0: 683b ldr r3, [r7, #0] 80091b2: 685b ldr r3, [r3, #4] 80091b4: 68fa ldr r2, [r7, #12] 80091b6: 4313 orrs r3, r2 80091b8: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 80091ba: 687b ldr r3, [r7, #4] 80091bc: 4a22 ldr r2, [pc, #136] @ (8009248 ) 80091be: 4293 cmp r3, r2 80091c0: d00b beq.n 80091da 80091c2: 687b ldr r3, [r7, #4] 80091c4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80091c8: d007 beq.n 80091da 80091ca: 687b ldr r3, [r7, #4] 80091cc: 4a1f ldr r2, [pc, #124] @ (800924c ) 80091ce: 4293 cmp r3, r2 80091d0: d003 beq.n 80091da 80091d2: 687b ldr r3, [r7, #4] 80091d4: 4a1e ldr r2, [pc, #120] @ (8009250 ) 80091d6: 4293 cmp r3, r2 80091d8: d108 bne.n 80091ec { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 80091da: 68fb ldr r3, [r7, #12] 80091dc: f423 7340 bic.w r3, r3, #768 @ 0x300 80091e0: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 80091e2: 683b ldr r3, [r7, #0] 80091e4: 68db ldr r3, [r3, #12] 80091e6: 68fa ldr r2, [r7, #12] 80091e8: 4313 orrs r3, r2 80091ea: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80091ec: 68fb ldr r3, [r7, #12] 80091ee: f023 0280 bic.w r2, r3, #128 @ 0x80 80091f2: 683b ldr r3, [r7, #0] 80091f4: 695b ldr r3, [r3, #20] 80091f6: 4313 orrs r3, r2 80091f8: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 80091fa: 687b ldr r3, [r7, #4] 80091fc: 68fa ldr r2, [r7, #12] 80091fe: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8009200: 683b ldr r3, [r7, #0] 8009202: 689a ldr r2, [r3, #8] 8009204: 687b ldr r3, [r7, #4] 8009206: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8009208: 683b ldr r3, [r7, #0] 800920a: 681a ldr r2, [r3, #0] 800920c: 687b ldr r3, [r7, #4] 800920e: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8009210: 687b ldr r3, [r7, #4] 8009212: 4a0d ldr r2, [pc, #52] @ (8009248 ) 8009214: 4293 cmp r3, r2 8009216: d103 bne.n 8009220 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8009218: 683b ldr r3, [r7, #0] 800921a: 691a ldr r2, [r3, #16] 800921c: 687b ldr r3, [r7, #4] 800921e: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8009220: 687b ldr r3, [r7, #4] 8009222: 2201 movs r2, #1 8009224: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 8009226: 687b ldr r3, [r7, #4] 8009228: 691b ldr r3, [r3, #16] 800922a: f003 0301 and.w r3, r3, #1 800922e: 2b00 cmp r3, #0 8009230: d005 beq.n 800923e { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 8009232: 687b ldr r3, [r7, #4] 8009234: 691b ldr r3, [r3, #16] 8009236: f023 0201 bic.w r2, r3, #1 800923a: 687b ldr r3, [r7, #4] 800923c: 611a str r2, [r3, #16] } } 800923e: bf00 nop 8009240: 3714 adds r7, #20 8009242: 46bd mov sp, r7 8009244: bc80 pop {r7} 8009246: 4770 bx lr 8009248: 40012c00 .word 0x40012c00 800924c: 40000400 .word 0x40000400 8009250: 40000800 .word 0x40000800 08009254 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8009254: b480 push {r7} 8009256: b087 sub sp, #28 8009258: af00 add r7, sp, #0 800925a: 6078 str r0, [r7, #4] 800925c: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800925e: 687b ldr r3, [r7, #4] 8009260: 6a1b ldr r3, [r3, #32] 8009262: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 8009264: 687b ldr r3, [r7, #4] 8009266: 6a1b ldr r3, [r3, #32] 8009268: f023 0201 bic.w r2, r3, #1 800926c: 687b ldr r3, [r7, #4] 800926e: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8009270: 687b ldr r3, [r7, #4] 8009272: 685b ldr r3, [r3, #4] 8009274: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8009276: 687b ldr r3, [r7, #4] 8009278: 699b ldr r3, [r3, #24] 800927a: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 800927c: 68fb ldr r3, [r7, #12] 800927e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009282: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 8009284: 68fb ldr r3, [r7, #12] 8009286: f023 0303 bic.w r3, r3, #3 800928a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 800928c: 683b ldr r3, [r7, #0] 800928e: 681b ldr r3, [r3, #0] 8009290: 68fa ldr r2, [r7, #12] 8009292: 4313 orrs r3, r2 8009294: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 8009296: 697b ldr r3, [r7, #20] 8009298: f023 0302 bic.w r3, r3, #2 800929c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 800929e: 683b ldr r3, [r7, #0] 80092a0: 689b ldr r3, [r3, #8] 80092a2: 697a ldr r2, [r7, #20] 80092a4: 4313 orrs r3, r2 80092a6: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 80092a8: 687b ldr r3, [r7, #4] 80092aa: 4a1c ldr r2, [pc, #112] @ (800931c ) 80092ac: 4293 cmp r3, r2 80092ae: d10c bne.n 80092ca { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 80092b0: 697b ldr r3, [r7, #20] 80092b2: f023 0308 bic.w r3, r3, #8 80092b6: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 80092b8: 683b ldr r3, [r7, #0] 80092ba: 68db ldr r3, [r3, #12] 80092bc: 697a ldr r2, [r7, #20] 80092be: 4313 orrs r3, r2 80092c0: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 80092c2: 697b ldr r3, [r7, #20] 80092c4: f023 0304 bic.w r3, r3, #4 80092c8: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80092ca: 687b ldr r3, [r7, #4] 80092cc: 4a13 ldr r2, [pc, #76] @ (800931c ) 80092ce: 4293 cmp r3, r2 80092d0: d111 bne.n 80092f6 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 80092d2: 693b ldr r3, [r7, #16] 80092d4: f423 7380 bic.w r3, r3, #256 @ 0x100 80092d8: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 80092da: 693b ldr r3, [r7, #16] 80092dc: f423 7300 bic.w r3, r3, #512 @ 0x200 80092e0: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 80092e2: 683b ldr r3, [r7, #0] 80092e4: 695b ldr r3, [r3, #20] 80092e6: 693a ldr r2, [r7, #16] 80092e8: 4313 orrs r3, r2 80092ea: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 80092ec: 683b ldr r3, [r7, #0] 80092ee: 699b ldr r3, [r3, #24] 80092f0: 693a ldr r2, [r7, #16] 80092f2: 4313 orrs r3, r2 80092f4: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80092f6: 687b ldr r3, [r7, #4] 80092f8: 693a ldr r2, [r7, #16] 80092fa: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80092fc: 687b ldr r3, [r7, #4] 80092fe: 68fa ldr r2, [r7, #12] 8009300: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 8009302: 683b ldr r3, [r7, #0] 8009304: 685a ldr r2, [r3, #4] 8009306: 687b ldr r3, [r7, #4] 8009308: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 800930a: 687b ldr r3, [r7, #4] 800930c: 697a ldr r2, [r7, #20] 800930e: 621a str r2, [r3, #32] } 8009310: bf00 nop 8009312: 371c adds r7, #28 8009314: 46bd mov sp, r7 8009316: bc80 pop {r7} 8009318: 4770 bx lr 800931a: bf00 nop 800931c: 40012c00 .word 0x40012c00 08009320 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8009320: b480 push {r7} 8009322: b087 sub sp, #28 8009324: af00 add r7, sp, #0 8009326: 6078 str r0, [r7, #4] 8009328: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800932a: 687b ldr r3, [r7, #4] 800932c: 6a1b ldr r3, [r3, #32] 800932e: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8009330: 687b ldr r3, [r7, #4] 8009332: 6a1b ldr r3, [r3, #32] 8009334: f023 0210 bic.w r2, r3, #16 8009338: 687b ldr r3, [r7, #4] 800933a: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 800933c: 687b ldr r3, [r7, #4] 800933e: 685b ldr r3, [r3, #4] 8009340: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8009342: 687b ldr r3, [r7, #4] 8009344: 699b ldr r3, [r3, #24] 8009346: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8009348: 68fb ldr r3, [r7, #12] 800934a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800934e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 8009350: 68fb ldr r3, [r7, #12] 8009352: f423 7340 bic.w r3, r3, #768 @ 0x300 8009356: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8009358: 683b ldr r3, [r7, #0] 800935a: 681b ldr r3, [r3, #0] 800935c: 021b lsls r3, r3, #8 800935e: 68fa ldr r2, [r7, #12] 8009360: 4313 orrs r3, r2 8009362: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 8009364: 697b ldr r3, [r7, #20] 8009366: f023 0320 bic.w r3, r3, #32 800936a: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 800936c: 683b ldr r3, [r7, #0] 800936e: 689b ldr r3, [r3, #8] 8009370: 011b lsls r3, r3, #4 8009372: 697a ldr r2, [r7, #20] 8009374: 4313 orrs r3, r2 8009376: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8009378: 687b ldr r3, [r7, #4] 800937a: 4a1d ldr r2, [pc, #116] @ (80093f0 ) 800937c: 4293 cmp r3, r2 800937e: d10d bne.n 800939c { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8009380: 697b ldr r3, [r7, #20] 8009382: f023 0380 bic.w r3, r3, #128 @ 0x80 8009386: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 8009388: 683b ldr r3, [r7, #0] 800938a: 68db ldr r3, [r3, #12] 800938c: 011b lsls r3, r3, #4 800938e: 697a ldr r2, [r7, #20] 8009390: 4313 orrs r3, r2 8009392: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8009394: 697b ldr r3, [r7, #20] 8009396: f023 0340 bic.w r3, r3, #64 @ 0x40 800939a: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 800939c: 687b ldr r3, [r7, #4] 800939e: 4a14 ldr r2, [pc, #80] @ (80093f0 ) 80093a0: 4293 cmp r3, r2 80093a2: d113 bne.n 80093cc /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 80093a4: 693b ldr r3, [r7, #16] 80093a6: f423 6380 bic.w r3, r3, #1024 @ 0x400 80093aa: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 80093ac: 693b ldr r3, [r7, #16] 80093ae: f423 6300 bic.w r3, r3, #2048 @ 0x800 80093b2: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 80093b4: 683b ldr r3, [r7, #0] 80093b6: 695b ldr r3, [r3, #20] 80093b8: 009b lsls r3, r3, #2 80093ba: 693a ldr r2, [r7, #16] 80093bc: 4313 orrs r3, r2 80093be: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 80093c0: 683b ldr r3, [r7, #0] 80093c2: 699b ldr r3, [r3, #24] 80093c4: 009b lsls r3, r3, #2 80093c6: 693a ldr r2, [r7, #16] 80093c8: 4313 orrs r3, r2 80093ca: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80093cc: 687b ldr r3, [r7, #4] 80093ce: 693a ldr r2, [r7, #16] 80093d0: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80093d2: 687b ldr r3, [r7, #4] 80093d4: 68fa ldr r2, [r7, #12] 80093d6: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 80093d8: 683b ldr r3, [r7, #0] 80093da: 685a ldr r2, [r3, #4] 80093dc: 687b ldr r3, [r7, #4] 80093de: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80093e0: 687b ldr r3, [r7, #4] 80093e2: 697a ldr r2, [r7, #20] 80093e4: 621a str r2, [r3, #32] } 80093e6: bf00 nop 80093e8: 371c adds r7, #28 80093ea: 46bd mov sp, r7 80093ec: bc80 pop {r7} 80093ee: 4770 bx lr 80093f0: 40012c00 .word 0x40012c00 080093f4 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80093f4: b480 push {r7} 80093f6: b087 sub sp, #28 80093f8: af00 add r7, sp, #0 80093fa: 6078 str r0, [r7, #4] 80093fc: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80093fe: 687b ldr r3, [r7, #4] 8009400: 6a1b ldr r3, [r3, #32] 8009402: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 8009404: 687b ldr r3, [r7, #4] 8009406: 6a1b ldr r3, [r3, #32] 8009408: f423 7280 bic.w r2, r3, #256 @ 0x100 800940c: 687b ldr r3, [r7, #4] 800940e: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8009410: 687b ldr r3, [r7, #4] 8009412: 685b ldr r3, [r3, #4] 8009414: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8009416: 687b ldr r3, [r7, #4] 8009418: 69db ldr r3, [r3, #28] 800941a: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 800941c: 68fb ldr r3, [r7, #12] 800941e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009422: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 8009424: 68fb ldr r3, [r7, #12] 8009426: f023 0303 bic.w r3, r3, #3 800942a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 800942c: 683b ldr r3, [r7, #0] 800942e: 681b ldr r3, [r3, #0] 8009430: 68fa ldr r2, [r7, #12] 8009432: 4313 orrs r3, r2 8009434: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 8009436: 697b ldr r3, [r7, #20] 8009438: f423 7300 bic.w r3, r3, #512 @ 0x200 800943c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 800943e: 683b ldr r3, [r7, #0] 8009440: 689b ldr r3, [r3, #8] 8009442: 021b lsls r3, r3, #8 8009444: 697a ldr r2, [r7, #20] 8009446: 4313 orrs r3, r2 8009448: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 800944a: 687b ldr r3, [r7, #4] 800944c: 4a1d ldr r2, [pc, #116] @ (80094c4 ) 800944e: 4293 cmp r3, r2 8009450: d10d bne.n 800946e { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 8009452: 697b ldr r3, [r7, #20] 8009454: f423 6300 bic.w r3, r3, #2048 @ 0x800 8009458: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 800945a: 683b ldr r3, [r7, #0] 800945c: 68db ldr r3, [r3, #12] 800945e: 021b lsls r3, r3, #8 8009460: 697a ldr r2, [r7, #20] 8009462: 4313 orrs r3, r2 8009464: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 8009466: 697b ldr r3, [r7, #20] 8009468: f423 6380 bic.w r3, r3, #1024 @ 0x400 800946c: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 800946e: 687b ldr r3, [r7, #4] 8009470: 4a14 ldr r2, [pc, #80] @ (80094c4 ) 8009472: 4293 cmp r3, r2 8009474: d113 bne.n 800949e /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 8009476: 693b ldr r3, [r7, #16] 8009478: f423 5380 bic.w r3, r3, #4096 @ 0x1000 800947c: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 800947e: 693b ldr r3, [r7, #16] 8009480: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8009484: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 8009486: 683b ldr r3, [r7, #0] 8009488: 695b ldr r3, [r3, #20] 800948a: 011b lsls r3, r3, #4 800948c: 693a ldr r2, [r7, #16] 800948e: 4313 orrs r3, r2 8009490: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 8009492: 683b ldr r3, [r7, #0] 8009494: 699b ldr r3, [r3, #24] 8009496: 011b lsls r3, r3, #4 8009498: 693a ldr r2, [r7, #16] 800949a: 4313 orrs r3, r2 800949c: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800949e: 687b ldr r3, [r7, #4] 80094a0: 693a ldr r2, [r7, #16] 80094a2: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 80094a4: 687b ldr r3, [r7, #4] 80094a6: 68fa ldr r2, [r7, #12] 80094a8: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 80094aa: 683b ldr r3, [r7, #0] 80094ac: 685a ldr r2, [r3, #4] 80094ae: 687b ldr r3, [r7, #4] 80094b0: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80094b2: 687b ldr r3, [r7, #4] 80094b4: 697a ldr r2, [r7, #20] 80094b6: 621a str r2, [r3, #32] } 80094b8: bf00 nop 80094ba: 371c adds r7, #28 80094bc: 46bd mov sp, r7 80094be: bc80 pop {r7} 80094c0: 4770 bx lr 80094c2: bf00 nop 80094c4: 40012c00 .word 0x40012c00 080094c8 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80094c8: b480 push {r7} 80094ca: b087 sub sp, #28 80094cc: af00 add r7, sp, #0 80094ce: 6078 str r0, [r7, #4] 80094d0: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80094d2: 687b ldr r3, [r7, #4] 80094d4: 6a1b ldr r3, [r3, #32] 80094d6: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 80094d8: 687b ldr r3, [r7, #4] 80094da: 6a1b ldr r3, [r3, #32] 80094dc: f423 5280 bic.w r2, r3, #4096 @ 0x1000 80094e0: 687b ldr r3, [r7, #4] 80094e2: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80094e4: 687b ldr r3, [r7, #4] 80094e6: 685b ldr r3, [r3, #4] 80094e8: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80094ea: 687b ldr r3, [r7, #4] 80094ec: 69db ldr r3, [r3, #28] 80094ee: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 80094f0: 68fb ldr r3, [r7, #12] 80094f2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80094f6: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 80094f8: 68fb ldr r3, [r7, #12] 80094fa: f423 7340 bic.w r3, r3, #768 @ 0x300 80094fe: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8009500: 683b ldr r3, [r7, #0] 8009502: 681b ldr r3, [r3, #0] 8009504: 021b lsls r3, r3, #8 8009506: 68fa ldr r2, [r7, #12] 8009508: 4313 orrs r3, r2 800950a: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 800950c: 693b ldr r3, [r7, #16] 800950e: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8009512: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8009514: 683b ldr r3, [r7, #0] 8009516: 689b ldr r3, [r3, #8] 8009518: 031b lsls r3, r3, #12 800951a: 693a ldr r2, [r7, #16] 800951c: 4313 orrs r3, r2 800951e: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8009520: 687b ldr r3, [r7, #4] 8009522: 4a0f ldr r2, [pc, #60] @ (8009560 ) 8009524: 4293 cmp r3, r2 8009526: d109 bne.n 800953c { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8009528: 697b ldr r3, [r7, #20] 800952a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800952e: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8009530: 683b ldr r3, [r7, #0] 8009532: 695b ldr r3, [r3, #20] 8009534: 019b lsls r3, r3, #6 8009536: 697a ldr r2, [r7, #20] 8009538: 4313 orrs r3, r2 800953a: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800953c: 687b ldr r3, [r7, #4] 800953e: 697a ldr r2, [r7, #20] 8009540: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8009542: 687b ldr r3, [r7, #4] 8009544: 68fa ldr r2, [r7, #12] 8009546: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8009548: 683b ldr r3, [r7, #0] 800954a: 685a ldr r2, [r3, #4] 800954c: 687b ldr r3, [r7, #4] 800954e: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8009550: 687b ldr r3, [r7, #4] 8009552: 693a ldr r2, [r7, #16] 8009554: 621a str r2, [r3, #32] } 8009556: bf00 nop 8009558: 371c adds r7, #28 800955a: 46bd mov sp, r7 800955c: bc80 pop {r7} 800955e: 4770 bx lr 8009560: 40012c00 .word 0x40012c00 08009564 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8009564: b480 push {r7} 8009566: b087 sub sp, #28 8009568: af00 add r7, sp, #0 800956a: 60f8 str r0, [r7, #12] 800956c: 60b9 str r1, [r7, #8] 800956e: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 8009570: 68fb ldr r3, [r7, #12] 8009572: 6a1b ldr r3, [r3, #32] 8009574: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 8009576: 68fb ldr r3, [r7, #12] 8009578: 6a1b ldr r3, [r3, #32] 800957a: f023 0201 bic.w r2, r3, #1 800957e: 68fb ldr r3, [r7, #12] 8009580: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8009582: 68fb ldr r3, [r7, #12] 8009584: 699b ldr r3, [r3, #24] 8009586: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 8009588: 693b ldr r3, [r7, #16] 800958a: f023 03f0 bic.w r3, r3, #240 @ 0xf0 800958e: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 8009590: 687b ldr r3, [r7, #4] 8009592: 011b lsls r3, r3, #4 8009594: 693a ldr r2, [r7, #16] 8009596: 4313 orrs r3, r2 8009598: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 800959a: 697b ldr r3, [r7, #20] 800959c: f023 030a bic.w r3, r3, #10 80095a0: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 80095a2: 697a ldr r2, [r7, #20] 80095a4: 68bb ldr r3, [r7, #8] 80095a6: 4313 orrs r3, r2 80095a8: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 80095aa: 68fb ldr r3, [r7, #12] 80095ac: 693a ldr r2, [r7, #16] 80095ae: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 80095b0: 68fb ldr r3, [r7, #12] 80095b2: 697a ldr r2, [r7, #20] 80095b4: 621a str r2, [r3, #32] } 80095b6: bf00 nop 80095b8: 371c adds r7, #28 80095ba: 46bd mov sp, r7 80095bc: bc80 pop {r7} 80095be: 4770 bx lr 080095c0 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 80095c0: b480 push {r7} 80095c2: b087 sub sp, #28 80095c4: af00 add r7, sp, #0 80095c6: 60f8 str r0, [r7, #12] 80095c8: 60b9 str r1, [r7, #8] 80095ca: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 80095cc: 68fb ldr r3, [r7, #12] 80095ce: 6a1b ldr r3, [r3, #32] 80095d0: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 80095d2: 68fb ldr r3, [r7, #12] 80095d4: 6a1b ldr r3, [r3, #32] 80095d6: f023 0210 bic.w r2, r3, #16 80095da: 68fb ldr r3, [r7, #12] 80095dc: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 80095de: 68fb ldr r3, [r7, #12] 80095e0: 699b ldr r3, [r3, #24] 80095e2: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 80095e4: 693b ldr r3, [r7, #16] 80095e6: f423 4370 bic.w r3, r3, #61440 @ 0xf000 80095ea: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 80095ec: 687b ldr r3, [r7, #4] 80095ee: 031b lsls r3, r3, #12 80095f0: 693a ldr r2, [r7, #16] 80095f2: 4313 orrs r3, r2 80095f4: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 80095f6: 697b ldr r3, [r7, #20] 80095f8: f023 03a0 bic.w r3, r3, #160 @ 0xa0 80095fc: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 80095fe: 68bb ldr r3, [r7, #8] 8009600: 011b lsls r3, r3, #4 8009602: 697a ldr r2, [r7, #20] 8009604: 4313 orrs r3, r2 8009606: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 8009608: 68fb ldr r3, [r7, #12] 800960a: 693a ldr r2, [r7, #16] 800960c: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 800960e: 68fb ldr r3, [r7, #12] 8009610: 697a ldr r2, [r7, #20] 8009612: 621a str r2, [r3, #32] } 8009614: bf00 nop 8009616: 371c adds r7, #28 8009618: 46bd mov sp, r7 800961a: bc80 pop {r7} 800961c: 4770 bx lr 0800961e : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 800961e: b480 push {r7} 8009620: b085 sub sp, #20 8009622: af00 add r7, sp, #0 8009624: 6078 str r0, [r7, #4] 8009626: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 8009628: 687b ldr r3, [r7, #4] 800962a: 689b ldr r3, [r3, #8] 800962c: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 800962e: 68fb ldr r3, [r7, #12] 8009630: f023 0370 bic.w r3, r3, #112 @ 0x70 8009634: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 8009636: 683a ldr r2, [r7, #0] 8009638: 68fb ldr r3, [r7, #12] 800963a: 4313 orrs r3, r2 800963c: f043 0307 orr.w r3, r3, #7 8009640: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8009642: 687b ldr r3, [r7, #4] 8009644: 68fa ldr r2, [r7, #12] 8009646: 609a str r2, [r3, #8] } 8009648: bf00 nop 800964a: 3714 adds r7, #20 800964c: 46bd mov sp, r7 800964e: bc80 pop {r7} 8009650: 4770 bx lr 08009652 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 8009652: b480 push {r7} 8009654: b087 sub sp, #28 8009656: af00 add r7, sp, #0 8009658: 60f8 str r0, [r7, #12] 800965a: 60b9 str r1, [r7, #8] 800965c: 607a str r2, [r7, #4] 800965e: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 8009660: 68fb ldr r3, [r7, #12] 8009662: 689b ldr r3, [r3, #8] 8009664: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8009666: 697b ldr r3, [r7, #20] 8009668: f423 437f bic.w r3, r3, #65280 @ 0xff00 800966c: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 800966e: 683b ldr r3, [r7, #0] 8009670: 021a lsls r2, r3, #8 8009672: 687b ldr r3, [r7, #4] 8009674: 431a orrs r2, r3 8009676: 68bb ldr r3, [r7, #8] 8009678: 4313 orrs r3, r2 800967a: 697a ldr r2, [r7, #20] 800967c: 4313 orrs r3, r2 800967e: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8009680: 68fb ldr r3, [r7, #12] 8009682: 697a ldr r2, [r7, #20] 8009684: 609a str r2, [r3, #8] } 8009686: bf00 nop 8009688: 371c adds r7, #28 800968a: 46bd mov sp, r7 800968c: bc80 pop {r7} 800968e: 4770 bx lr 08009690 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 8009690: b480 push {r7} 8009692: b087 sub sp, #28 8009694: af00 add r7, sp, #0 8009696: 60f8 str r0, [r7, #12] 8009698: 60b9 str r1, [r7, #8] 800969a: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 800969c: 68bb ldr r3, [r7, #8] 800969e: f003 031f and.w r3, r3, #31 80096a2: 2201 movs r2, #1 80096a4: fa02 f303 lsl.w r3, r2, r3 80096a8: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 80096aa: 68fb ldr r3, [r7, #12] 80096ac: 6a1a ldr r2, [r3, #32] 80096ae: 697b ldr r3, [r7, #20] 80096b0: 43db mvns r3, r3 80096b2: 401a ands r2, r3 80096b4: 68fb ldr r3, [r7, #12] 80096b6: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 80096b8: 68fb ldr r3, [r7, #12] 80096ba: 6a1a ldr r2, [r3, #32] 80096bc: 68bb ldr r3, [r7, #8] 80096be: f003 031f and.w r3, r3, #31 80096c2: 6879 ldr r1, [r7, #4] 80096c4: fa01 f303 lsl.w r3, r1, r3 80096c8: 431a orrs r2, r3 80096ca: 68fb ldr r3, [r7, #12] 80096cc: 621a str r2, [r3, #32] } 80096ce: bf00 nop 80096d0: 371c adds r7, #28 80096d2: 46bd mov sp, r7 80096d4: bc80 pop {r7} 80096d6: 4770 bx lr 080096d8 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 80096d8: b480 push {r7} 80096da: b085 sub sp, #20 80096dc: af00 add r7, sp, #0 80096de: 6078 str r0, [r7, #4] 80096e0: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 80096e2: 687b ldr r3, [r7, #4] 80096e4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80096e8: 2b01 cmp r3, #1 80096ea: d101 bne.n 80096f0 80096ec: 2302 movs r3, #2 80096ee: e046 b.n 800977e 80096f0: 687b ldr r3, [r7, #4] 80096f2: 2201 movs r2, #1 80096f4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 80096f8: 687b ldr r3, [r7, #4] 80096fa: 2202 movs r2, #2 80096fc: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8009700: 687b ldr r3, [r7, #4] 8009702: 681b ldr r3, [r3, #0] 8009704: 685b ldr r3, [r3, #4] 8009706: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8009708: 687b ldr r3, [r7, #4] 800970a: 681b ldr r3, [r3, #0] 800970c: 689b ldr r3, [r3, #8] 800970e: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8009710: 68fb ldr r3, [r7, #12] 8009712: f023 0370 bic.w r3, r3, #112 @ 0x70 8009716: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 8009718: 683b ldr r3, [r7, #0] 800971a: 681b ldr r3, [r3, #0] 800971c: 68fa ldr r2, [r7, #12] 800971e: 4313 orrs r3, r2 8009720: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8009722: 687b ldr r3, [r7, #4] 8009724: 681b ldr r3, [r3, #0] 8009726: 68fa ldr r2, [r7, #12] 8009728: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 800972a: 687b ldr r3, [r7, #4] 800972c: 681b ldr r3, [r3, #0] 800972e: 4a16 ldr r2, [pc, #88] @ (8009788 ) 8009730: 4293 cmp r3, r2 8009732: d00e beq.n 8009752 8009734: 687b ldr r3, [r7, #4] 8009736: 681b ldr r3, [r3, #0] 8009738: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 800973c: d009 beq.n 8009752 800973e: 687b ldr r3, [r7, #4] 8009740: 681b ldr r3, [r3, #0] 8009742: 4a12 ldr r2, [pc, #72] @ (800978c ) 8009744: 4293 cmp r3, r2 8009746: d004 beq.n 8009752 8009748: 687b ldr r3, [r7, #4] 800974a: 681b ldr r3, [r3, #0] 800974c: 4a10 ldr r2, [pc, #64] @ (8009790 ) 800974e: 4293 cmp r3, r2 8009750: d10c bne.n 800976c { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 8009752: 68bb ldr r3, [r7, #8] 8009754: f023 0380 bic.w r3, r3, #128 @ 0x80 8009758: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 800975a: 683b ldr r3, [r7, #0] 800975c: 685b ldr r3, [r3, #4] 800975e: 68ba ldr r2, [r7, #8] 8009760: 4313 orrs r3, r2 8009762: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8009764: 687b ldr r3, [r7, #4] 8009766: 681b ldr r3, [r3, #0] 8009768: 68ba ldr r2, [r7, #8] 800976a: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 800976c: 687b ldr r3, [r7, #4] 800976e: 2201 movs r2, #1 8009770: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8009774: 687b ldr r3, [r7, #4] 8009776: 2200 movs r2, #0 8009778: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 800977c: 2300 movs r3, #0 } 800977e: 4618 mov r0, r3 8009780: 3714 adds r7, #20 8009782: 46bd mov sp, r7 8009784: bc80 pop {r7} 8009786: 4770 bx lr 8009788: 40012c00 .word 0x40012c00 800978c: 40000400 .word 0x40000400 8009790: 40000800 .word 0x40000800 08009794 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8009794: b580 push {r7, lr} 8009796: b082 sub sp, #8 8009798: af00 add r7, sp, #0 800979a: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 800979c: 687b ldr r3, [r7, #4] 800979e: 2b00 cmp r3, #0 80097a0: d101 bne.n 80097a6 { return HAL_ERROR; 80097a2: 2301 movs r3, #1 80097a4: e042 b.n 800982c assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 80097a6: 687b ldr r3, [r7, #4] 80097a8: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80097ac: b2db uxtb r3, r3 80097ae: 2b00 cmp r3, #0 80097b0: d106 bne.n 80097c0 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 80097b2: 687b ldr r3, [r7, #4] 80097b4: 2200 movs r2, #0 80097b6: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 80097ba: 6878 ldr r0, [r7, #4] 80097bc: f7fb fb80 bl 8004ec0 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 80097c0: 687b ldr r3, [r7, #4] 80097c2: 2224 movs r2, #36 @ 0x24 80097c4: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 80097c8: 687b ldr r3, [r7, #4] 80097ca: 681b ldr r3, [r3, #0] 80097cc: 68da ldr r2, [r3, #12] 80097ce: 687b ldr r3, [r7, #4] 80097d0: 681b ldr r3, [r3, #0] 80097d2: f422 5200 bic.w r2, r2, #8192 @ 0x2000 80097d6: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 80097d8: 6878 ldr r0, [r7, #4] 80097da: f000 f971 bl 8009ac0 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80097de: 687b ldr r3, [r7, #4] 80097e0: 681b ldr r3, [r3, #0] 80097e2: 691a ldr r2, [r3, #16] 80097e4: 687b ldr r3, [r7, #4] 80097e6: 681b ldr r3, [r3, #0] 80097e8: f422 4290 bic.w r2, r2, #18432 @ 0x4800 80097ec: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80097ee: 687b ldr r3, [r7, #4] 80097f0: 681b ldr r3, [r3, #0] 80097f2: 695a ldr r2, [r3, #20] 80097f4: 687b ldr r3, [r7, #4] 80097f6: 681b ldr r3, [r3, #0] 80097f8: f022 022a bic.w r2, r2, #42 @ 0x2a 80097fc: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 80097fe: 687b ldr r3, [r7, #4] 8009800: 681b ldr r3, [r3, #0] 8009802: 68da ldr r2, [r3, #12] 8009804: 687b ldr r3, [r7, #4] 8009806: 681b ldr r3, [r3, #0] 8009808: f442 5200 orr.w r2, r2, #8192 @ 0x2000 800980c: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 800980e: 687b ldr r3, [r7, #4] 8009810: 2200 movs r2, #0 8009812: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 8009814: 687b ldr r3, [r7, #4] 8009816: 2220 movs r2, #32 8009818: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 800981c: 687b ldr r3, [r7, #4] 800981e: 2220 movs r2, #32 8009820: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 8009824: 687b ldr r3, [r7, #4] 8009826: 2200 movs r2, #0 8009828: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 800982a: 2300 movs r3, #0 } 800982c: 4618 mov r0, r3 800982e: 3708 adds r7, #8 8009830: 46bd mov sp, r7 8009832: bd80 pop {r7, pc} 08009834 : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8009834: b580 push {r7, lr} 8009836: b08a sub sp, #40 @ 0x28 8009838: af02 add r7, sp, #8 800983a: 60f8 str r0, [r7, #12] 800983c: 60b9 str r1, [r7, #8] 800983e: 603b str r3, [r7, #0] 8009840: 4613 mov r3, r2 8009842: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; 8009844: 2300 movs r3, #0 8009846: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8009848: 68fb ldr r3, [r7, #12] 800984a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800984e: b2db uxtb r3, r3 8009850: 2b20 cmp r3, #32 8009852: d175 bne.n 8009940 { if ((pData == NULL) || (Size == 0U)) 8009854: 68bb ldr r3, [r7, #8] 8009856: 2b00 cmp r3, #0 8009858: d002 beq.n 8009860 800985a: 88fb ldrh r3, [r7, #6] 800985c: 2b00 cmp r3, #0 800985e: d101 bne.n 8009864 { return HAL_ERROR; 8009860: 2301 movs r3, #1 8009862: e06e b.n 8009942 } huart->ErrorCode = HAL_UART_ERROR_NONE; 8009864: 68fb ldr r3, [r7, #12] 8009866: 2200 movs r2, #0 8009868: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; 800986a: 68fb ldr r3, [r7, #12] 800986c: 2221 movs r2, #33 @ 0x21 800986e: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 8009872: f7fb fc6d bl 8005150 8009876: 6178 str r0, [r7, #20] huart->TxXferSize = Size; 8009878: 68fb ldr r3, [r7, #12] 800987a: 88fa ldrh r2, [r7, #6] 800987c: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 800987e: 68fb ldr r3, [r7, #12] 8009880: 88fa ldrh r2, [r7, #6] 8009882: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8009884: 68fb ldr r3, [r7, #12] 8009886: 689b ldr r3, [r3, #8] 8009888: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 800988c: d108 bne.n 80098a0 800988e: 68fb ldr r3, [r7, #12] 8009890: 691b ldr r3, [r3, #16] 8009892: 2b00 cmp r3, #0 8009894: d104 bne.n 80098a0 { pdata8bits = NULL; 8009896: 2300 movs r3, #0 8009898: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; 800989a: 68bb ldr r3, [r7, #8] 800989c: 61bb str r3, [r7, #24] 800989e: e003 b.n 80098a8 } else { pdata8bits = pData; 80098a0: 68bb ldr r3, [r7, #8] 80098a2: 61fb str r3, [r7, #28] pdata16bits = NULL; 80098a4: 2300 movs r3, #0 80098a6: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) 80098a8: e02e b.n 8009908 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80098aa: 683b ldr r3, [r7, #0] 80098ac: 9300 str r3, [sp, #0] 80098ae: 697b ldr r3, [r7, #20] 80098b0: 2200 movs r2, #0 80098b2: 2180 movs r1, #128 @ 0x80 80098b4: 68f8 ldr r0, [r7, #12] 80098b6: f000 f848 bl 800994a 80098ba: 4603 mov r3, r0 80098bc: 2b00 cmp r3, #0 80098be: d005 beq.n 80098cc { huart->gState = HAL_UART_STATE_READY; 80098c0: 68fb ldr r3, [r7, #12] 80098c2: 2220 movs r2, #32 80098c4: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; 80098c8: 2303 movs r3, #3 80098ca: e03a b.n 8009942 } if (pdata8bits == NULL) 80098cc: 69fb ldr r3, [r7, #28] 80098ce: 2b00 cmp r3, #0 80098d0: d10b bne.n 80098ea { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); 80098d2: 69bb ldr r3, [r7, #24] 80098d4: 881b ldrh r3, [r3, #0] 80098d6: 461a mov r2, r3 80098d8: 68fb ldr r3, [r7, #12] 80098da: 681b ldr r3, [r3, #0] 80098dc: f3c2 0208 ubfx r2, r2, #0, #9 80098e0: 605a str r2, [r3, #4] pdata16bits++; 80098e2: 69bb ldr r3, [r7, #24] 80098e4: 3302 adds r3, #2 80098e6: 61bb str r3, [r7, #24] 80098e8: e007 b.n 80098fa } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); 80098ea: 69fb ldr r3, [r7, #28] 80098ec: 781a ldrb r2, [r3, #0] 80098ee: 68fb ldr r3, [r7, #12] 80098f0: 681b ldr r3, [r3, #0] 80098f2: 605a str r2, [r3, #4] pdata8bits++; 80098f4: 69fb ldr r3, [r7, #28] 80098f6: 3301 adds r3, #1 80098f8: 61fb str r3, [r7, #28] } huart->TxXferCount--; 80098fa: 68fb ldr r3, [r7, #12] 80098fc: 8cdb ldrh r3, [r3, #38] @ 0x26 80098fe: b29b uxth r3, r3 8009900: 3b01 subs r3, #1 8009902: b29a uxth r2, r3 8009904: 68fb ldr r3, [r7, #12] 8009906: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) 8009908: 68fb ldr r3, [r7, #12] 800990a: 8cdb ldrh r3, [r3, #38] @ 0x26 800990c: b29b uxth r3, r3 800990e: 2b00 cmp r3, #0 8009910: d1cb bne.n 80098aa } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8009912: 683b ldr r3, [r7, #0] 8009914: 9300 str r3, [sp, #0] 8009916: 697b ldr r3, [r7, #20] 8009918: 2200 movs r2, #0 800991a: 2140 movs r1, #64 @ 0x40 800991c: 68f8 ldr r0, [r7, #12] 800991e: f000 f814 bl 800994a 8009922: 4603 mov r3, r0 8009924: 2b00 cmp r3, #0 8009926: d005 beq.n 8009934 { huart->gState = HAL_UART_STATE_READY; 8009928: 68fb ldr r3, [r7, #12] 800992a: 2220 movs r2, #32 800992c: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; 8009930: 2303 movs r3, #3 8009932: e006 b.n 8009942 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8009934: 68fb ldr r3, [r7, #12] 8009936: 2220 movs r2, #32 8009938: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; 800993c: 2300 movs r3, #0 800993e: e000 b.n 8009942 } else { return HAL_BUSY; 8009940: 2302 movs r3, #2 } } 8009942: 4618 mov r0, r3 8009944: 3720 adds r7, #32 8009946: 46bd mov sp, r7 8009948: bd80 pop {r7, pc} 0800994a : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { 800994a: b580 push {r7, lr} 800994c: b086 sub sp, #24 800994e: af00 add r7, sp, #0 8009950: 60f8 str r0, [r7, #12] 8009952: 60b9 str r1, [r7, #8] 8009954: 603b str r3, [r7, #0] 8009956: 4613 mov r3, r2 8009958: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 800995a: e03b b.n 80099d4 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 800995c: 6a3b ldr r3, [r7, #32] 800995e: f1b3 3fff cmp.w r3, #4294967295 8009962: d037 beq.n 80099d4 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8009964: f7fb fbf4 bl 8005150 8009968: 4602 mov r2, r0 800996a: 683b ldr r3, [r7, #0] 800996c: 1ad3 subs r3, r2, r3 800996e: 6a3a ldr r2, [r7, #32] 8009970: 429a cmp r2, r3 8009972: d302 bcc.n 800997a 8009974: 6a3b ldr r3, [r7, #32] 8009976: 2b00 cmp r3, #0 8009978: d101 bne.n 800997e { return HAL_TIMEOUT; 800997a: 2303 movs r3, #3 800997c: e03a b.n 80099f4 } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) 800997e: 68fb ldr r3, [r7, #12] 8009980: 681b ldr r3, [r3, #0] 8009982: 68db ldr r3, [r3, #12] 8009984: f003 0304 and.w r3, r3, #4 8009988: 2b00 cmp r3, #0 800998a: d023 beq.n 80099d4 800998c: 68bb ldr r3, [r7, #8] 800998e: 2b80 cmp r3, #128 @ 0x80 8009990: d020 beq.n 80099d4 8009992: 68bb ldr r3, [r7, #8] 8009994: 2b40 cmp r3, #64 @ 0x40 8009996: d01d beq.n 80099d4 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) 8009998: 68fb ldr r3, [r7, #12] 800999a: 681b ldr r3, [r3, #0] 800999c: 681b ldr r3, [r3, #0] 800999e: f003 0308 and.w r3, r3, #8 80099a2: 2b08 cmp r3, #8 80099a4: d116 bne.n 80099d4 { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); 80099a6: 2300 movs r3, #0 80099a8: 617b str r3, [r7, #20] 80099aa: 68fb ldr r3, [r7, #12] 80099ac: 681b ldr r3, [r3, #0] 80099ae: 681b ldr r3, [r3, #0] 80099b0: 617b str r3, [r7, #20] 80099b2: 68fb ldr r3, [r7, #12] 80099b4: 681b ldr r3, [r3, #0] 80099b6: 685b ldr r3, [r3, #4] 80099b8: 617b str r3, [r7, #20] 80099ba: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); 80099bc: 68f8 ldr r0, [r7, #12] 80099be: f000 f81d bl 80099fc huart->ErrorCode = HAL_UART_ERROR_ORE; 80099c2: 68fb ldr r3, [r7, #12] 80099c4: 2208 movs r2, #8 80099c6: 645a str r2, [r3, #68] @ 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); 80099c8: 68fb ldr r3, [r7, #12] 80099ca: 2200 movs r2, #0 80099cc: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 80099d0: 2301 movs r3, #1 80099d2: e00f b.n 80099f4 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 80099d4: 68fb ldr r3, [r7, #12] 80099d6: 681b ldr r3, [r3, #0] 80099d8: 681a ldr r2, [r3, #0] 80099da: 68bb ldr r3, [r7, #8] 80099dc: 4013 ands r3, r2 80099de: 68ba ldr r2, [r7, #8] 80099e0: 429a cmp r2, r3 80099e2: bf0c ite eq 80099e4: 2301 moveq r3, #1 80099e6: 2300 movne r3, #0 80099e8: b2db uxtb r3, r3 80099ea: 461a mov r2, r3 80099ec: 79fb ldrb r3, [r7, #7] 80099ee: 429a cmp r2, r3 80099f0: d0b4 beq.n 800995c } } } } return HAL_OK; 80099f2: 2300 movs r3, #0 } 80099f4: 4618 mov r0, r3 80099f6: 3718 adds r7, #24 80099f8: 46bd mov sp, r7 80099fa: bd80 pop {r7, pc} 080099fc : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 80099fc: b480 push {r7} 80099fe: b095 sub sp, #84 @ 0x54 8009a00: af00 add r7, sp, #0 8009a02: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8009a04: 687b ldr r3, [r7, #4] 8009a06: 681b ldr r3, [r3, #0] 8009a08: 330c adds r3, #12 8009a0a: 637b str r3, [r7, #52] @ 0x34 */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009a0c: 6b7b ldr r3, [r7, #52] @ 0x34 8009a0e: e853 3f00 ldrex r3, [r3] 8009a12: 633b str r3, [r7, #48] @ 0x30 return(result); 8009a14: 6b3b ldr r3, [r7, #48] @ 0x30 8009a16: f423 7390 bic.w r3, r3, #288 @ 0x120 8009a1a: 64fb str r3, [r7, #76] @ 0x4c 8009a1c: 687b ldr r3, [r7, #4] 8009a1e: 681b ldr r3, [r3, #0] 8009a20: 330c adds r3, #12 8009a22: 6cfa ldr r2, [r7, #76] @ 0x4c 8009a24: 643a str r2, [r7, #64] @ 0x40 8009a26: 63fb str r3, [r7, #60] @ 0x3c */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009a28: 6bf9 ldr r1, [r7, #60] @ 0x3c 8009a2a: 6c3a ldr r2, [r7, #64] @ 0x40 8009a2c: e841 2300 strex r3, r2, [r1] 8009a30: 63bb str r3, [r7, #56] @ 0x38 return(result); 8009a32: 6bbb ldr r3, [r7, #56] @ 0x38 8009a34: 2b00 cmp r3, #0 8009a36: d1e5 bne.n 8009a04 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8009a38: 687b ldr r3, [r7, #4] 8009a3a: 681b ldr r3, [r3, #0] 8009a3c: 3314 adds r3, #20 8009a3e: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009a40: 6a3b ldr r3, [r7, #32] 8009a42: e853 3f00 ldrex r3, [r3] 8009a46: 61fb str r3, [r7, #28] return(result); 8009a48: 69fb ldr r3, [r7, #28] 8009a4a: f023 0301 bic.w r3, r3, #1 8009a4e: 64bb str r3, [r7, #72] @ 0x48 8009a50: 687b ldr r3, [r7, #4] 8009a52: 681b ldr r3, [r3, #0] 8009a54: 3314 adds r3, #20 8009a56: 6cba ldr r2, [r7, #72] @ 0x48 8009a58: 62fa str r2, [r7, #44] @ 0x2c 8009a5a: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009a5c: 6ab9 ldr r1, [r7, #40] @ 0x28 8009a5e: 6afa ldr r2, [r7, #44] @ 0x2c 8009a60: e841 2300 strex r3, r2, [r1] 8009a64: 627b str r3, [r7, #36] @ 0x24 return(result); 8009a66: 6a7b ldr r3, [r7, #36] @ 0x24 8009a68: 2b00 cmp r3, #0 8009a6a: d1e5 bne.n 8009a38 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8009a6c: 687b ldr r3, [r7, #4] 8009a6e: 6b1b ldr r3, [r3, #48] @ 0x30 8009a70: 2b01 cmp r3, #1 8009a72: d119 bne.n 8009aa8 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8009a74: 687b ldr r3, [r7, #4] 8009a76: 681b ldr r3, [r3, #0] 8009a78: 330c adds r3, #12 8009a7a: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009a7c: 68fb ldr r3, [r7, #12] 8009a7e: e853 3f00 ldrex r3, [r3] 8009a82: 60bb str r3, [r7, #8] return(result); 8009a84: 68bb ldr r3, [r7, #8] 8009a86: f023 0310 bic.w r3, r3, #16 8009a8a: 647b str r3, [r7, #68] @ 0x44 8009a8c: 687b ldr r3, [r7, #4] 8009a8e: 681b ldr r3, [r3, #0] 8009a90: 330c adds r3, #12 8009a92: 6c7a ldr r2, [r7, #68] @ 0x44 8009a94: 61ba str r2, [r7, #24] 8009a96: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009a98: 6979 ldr r1, [r7, #20] 8009a9a: 69ba ldr r2, [r7, #24] 8009a9c: e841 2300 strex r3, r2, [r1] 8009aa0: 613b str r3, [r7, #16] return(result); 8009aa2: 693b ldr r3, [r7, #16] 8009aa4: 2b00 cmp r3, #0 8009aa6: d1e5 bne.n 8009a74 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8009aa8: 687b ldr r3, [r7, #4] 8009aaa: 2220 movs r2, #32 8009aac: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8009ab0: 687b ldr r3, [r7, #4] 8009ab2: 2200 movs r2, #0 8009ab4: 631a str r2, [r3, #48] @ 0x30 } 8009ab6: bf00 nop 8009ab8: 3754 adds r7, #84 @ 0x54 8009aba: 46bd mov sp, r7 8009abc: bc80 pop {r7} 8009abe: 4770 bx lr 08009ac0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8009ac0: b580 push {r7, lr} 8009ac2: b084 sub sp, #16 8009ac4: af00 add r7, sp, #0 8009ac6: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8009ac8: 687b ldr r3, [r7, #4] 8009aca: 681b ldr r3, [r3, #0] 8009acc: 691b ldr r3, [r3, #16] 8009ace: f423 5140 bic.w r1, r3, #12288 @ 0x3000 8009ad2: 687b ldr r3, [r7, #4] 8009ad4: 68da ldr r2, [r3, #12] 8009ad6: 687b ldr r3, [r7, #4] 8009ad8: 681b ldr r3, [r3, #0] 8009ada: 430a orrs r2, r1 8009adc: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8009ade: 687b ldr r3, [r7, #4] 8009ae0: 689a ldr r2, [r3, #8] 8009ae2: 687b ldr r3, [r7, #4] 8009ae4: 691b ldr r3, [r3, #16] 8009ae6: 431a orrs r2, r3 8009ae8: 687b ldr r3, [r7, #4] 8009aea: 695b ldr r3, [r3, #20] 8009aec: 4313 orrs r3, r2 8009aee: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 8009af0: 687b ldr r3, [r7, #4] 8009af2: 681b ldr r3, [r3, #0] 8009af4: 68db ldr r3, [r3, #12] 8009af6: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 8009afa: f023 030c bic.w r3, r3, #12 8009afe: 687a ldr r2, [r7, #4] 8009b00: 6812 ldr r2, [r2, #0] 8009b02: 68b9 ldr r1, [r7, #8] 8009b04: 430b orrs r3, r1 8009b06: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8009b08: 687b ldr r3, [r7, #4] 8009b0a: 681b ldr r3, [r3, #0] 8009b0c: 695b ldr r3, [r3, #20] 8009b0e: f423 7140 bic.w r1, r3, #768 @ 0x300 8009b12: 687b ldr r3, [r7, #4] 8009b14: 699a ldr r2, [r3, #24] 8009b16: 687b ldr r3, [r7, #4] 8009b18: 681b ldr r3, [r3, #0] 8009b1a: 430a orrs r2, r1 8009b1c: 615a str r2, [r3, #20] if(huart->Instance == USART1) 8009b1e: 687b ldr r3, [r7, #4] 8009b20: 681b ldr r3, [r3, #0] 8009b22: 4a2c ldr r2, [pc, #176] @ (8009bd4 ) 8009b24: 4293 cmp r3, r2 8009b26: d103 bne.n 8009b30 { pclk = HAL_RCC_GetPCLK2Freq(); 8009b28: f7fe fede bl 80088e8 8009b2c: 60f8 str r0, [r7, #12] 8009b2e: e002 b.n 8009b36 } else { pclk = HAL_RCC_GetPCLK1Freq(); 8009b30: f7fe fec6 bl 80088c0 8009b34: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8009b36: 68fa ldr r2, [r7, #12] 8009b38: 4613 mov r3, r2 8009b3a: 009b lsls r3, r3, #2 8009b3c: 4413 add r3, r2 8009b3e: 009a lsls r2, r3, #2 8009b40: 441a add r2, r3 8009b42: 687b ldr r3, [r7, #4] 8009b44: 685b ldr r3, [r3, #4] 8009b46: 009b lsls r3, r3, #2 8009b48: fbb2 f3f3 udiv r3, r2, r3 8009b4c: 4a22 ldr r2, [pc, #136] @ (8009bd8 ) 8009b4e: fba2 2303 umull r2, r3, r2, r3 8009b52: 095b lsrs r3, r3, #5 8009b54: 0119 lsls r1, r3, #4 8009b56: 68fa ldr r2, [r7, #12] 8009b58: 4613 mov r3, r2 8009b5a: 009b lsls r3, r3, #2 8009b5c: 4413 add r3, r2 8009b5e: 009a lsls r2, r3, #2 8009b60: 441a add r2, r3 8009b62: 687b ldr r3, [r7, #4] 8009b64: 685b ldr r3, [r3, #4] 8009b66: 009b lsls r3, r3, #2 8009b68: fbb2 f2f3 udiv r2, r2, r3 8009b6c: 4b1a ldr r3, [pc, #104] @ (8009bd8 ) 8009b6e: fba3 0302 umull r0, r3, r3, r2 8009b72: 095b lsrs r3, r3, #5 8009b74: 2064 movs r0, #100 @ 0x64 8009b76: fb00 f303 mul.w r3, r0, r3 8009b7a: 1ad3 subs r3, r2, r3 8009b7c: 011b lsls r3, r3, #4 8009b7e: 3332 adds r3, #50 @ 0x32 8009b80: 4a15 ldr r2, [pc, #84] @ (8009bd8 ) 8009b82: fba2 2303 umull r2, r3, r2, r3 8009b86: 095b lsrs r3, r3, #5 8009b88: f003 03f0 and.w r3, r3, #240 @ 0xf0 8009b8c: 4419 add r1, r3 8009b8e: 68fa ldr r2, [r7, #12] 8009b90: 4613 mov r3, r2 8009b92: 009b lsls r3, r3, #2 8009b94: 4413 add r3, r2 8009b96: 009a lsls r2, r3, #2 8009b98: 441a add r2, r3 8009b9a: 687b ldr r3, [r7, #4] 8009b9c: 685b ldr r3, [r3, #4] 8009b9e: 009b lsls r3, r3, #2 8009ba0: fbb2 f2f3 udiv r2, r2, r3 8009ba4: 4b0c ldr r3, [pc, #48] @ (8009bd8 ) 8009ba6: fba3 0302 umull r0, r3, r3, r2 8009baa: 095b lsrs r3, r3, #5 8009bac: 2064 movs r0, #100 @ 0x64 8009bae: fb00 f303 mul.w r3, r0, r3 8009bb2: 1ad3 subs r3, r2, r3 8009bb4: 011b lsls r3, r3, #4 8009bb6: 3332 adds r3, #50 @ 0x32 8009bb8: 4a07 ldr r2, [pc, #28] @ (8009bd8 ) 8009bba: fba2 2303 umull r2, r3, r2, r3 8009bbe: 095b lsrs r3, r3, #5 8009bc0: f003 020f and.w r2, r3, #15 8009bc4: 687b ldr r3, [r7, #4] 8009bc6: 681b ldr r3, [r3, #0] 8009bc8: 440a add r2, r1 8009bca: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 8009bcc: bf00 nop 8009bce: 3710 adds r7, #16 8009bd0: 46bd mov sp, r7 8009bd2: bd80 pop {r7, pc} 8009bd4: 40013800 .word 0x40013800 8009bd8: 51eb851f .word 0x51eb851f 08009bdc : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8009bdc: b480 push {r7} 8009bde: b085 sub sp, #20 8009be0: af00 add r7, sp, #0 8009be2: 60f8 str r0, [r7, #12] 8009be4: 4638 mov r0, r7 8009be6: e880 000e stmia.w r0, {r1, r2, r3} /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8009bea: 2300 movs r3, #0 } 8009bec: 4618 mov r0, r3 8009bee: 3714 adds r7, #20 8009bf0: 46bd mov sp, r7 8009bf2: bc80 pop {r7} 8009bf4: 4770 bx lr 08009bf6 : * Enables the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) { 8009bf6: b480 push {r7} 8009bf8: b085 sub sp, #20 8009bfa: af00 add r7, sp, #0 8009bfc: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Clear pending interrupts */ USBx->ISTR = 0U; 8009bfe: 687b ldr r3, [r7, #4] 8009c00: 2200 movs r2, #0 8009c02: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8009c06: f44f 433f mov.w r3, #48896 @ 0xbf00 8009c0a: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Set interrupt mask */ USBx->CNTR = (uint16_t)winterruptmask; 8009c0c: 68fb ldr r3, [r7, #12] 8009c0e: b29a uxth r2, r3 8009c10: 687b ldr r3, [r7, #4] 8009c12: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8009c16: 2300 movs r3, #0 } 8009c18: 4618 mov r0, r3 8009c1a: 3714 adds r7, #20 8009c1c: 46bd mov sp, r7 8009c1e: bc80 pop {r7} 8009c20: 4770 bx lr 08009c22 : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) { 8009c22: b480 push {r7} 8009c24: b085 sub sp, #20 8009c26: af00 add r7, sp, #0 8009c28: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8009c2a: f44f 433f mov.w r3, #48896 @ 0xbf00 8009c2e: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Clear interrupt mask */ USBx->CNTR &= (uint16_t)(~winterruptmask); 8009c30: 687b ldr r3, [r7, #4] 8009c32: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8009c36: b29a uxth r2, r3 8009c38: 68fb ldr r3, [r7, #12] 8009c3a: b29b uxth r3, r3 8009c3c: 43db mvns r3, r3 8009c3e: b29b uxth r3, r3 8009c40: 4013 ands r3, r2 8009c42: b29a uxth r2, r3 8009c44: 687b ldr r3, [r7, #4] 8009c46: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8009c4a: 2300 movs r3, #0 } 8009c4c: 4618 mov r0, r3 8009c4e: 3714 adds r7, #20 8009c50: 46bd mov sp, r7 8009c52: bc80 pop {r7} 8009c54: 4770 bx lr 08009c56 : * This parameter can be one of the these values: * @arg USB_DEVICE_MODE Peripheral mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) { 8009c56: b480 push {r7} 8009c58: b083 sub sp, #12 8009c5a: af00 add r7, sp, #0 8009c5c: 6078 str r0, [r7, #4] 8009c5e: 460b mov r3, r1 8009c60: 70fb strb r3, [r7, #3] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8009c62: 2300 movs r3, #0 } 8009c64: 4618 mov r0, r3 8009c66: 370c adds r7, #12 8009c68: 46bd mov sp, r7 8009c6a: bc80 pop {r7} 8009c6c: 4770 bx lr 08009c6e : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8009c6e: b480 push {r7} 8009c70: b085 sub sp, #20 8009c72: af00 add r7, sp, #0 8009c74: 60f8 str r0, [r7, #12] 8009c76: 4638 mov r0, r7 8009c78: e880 000e stmia.w r0, {r1, r2, r3} /* Prevent unused argument(s) compilation warning */ UNUSED(cfg); /* Init Device */ /* CNTR_FRES = 1 */ USBx->CNTR = (uint16_t)USB_CNTR_FRES; 8009c7c: 68fb ldr r3, [r7, #12] 8009c7e: 2201 movs r2, #1 8009c80: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CNTR_FRES = 0 */ USBx->CNTR = 0U; 8009c84: 68fb ldr r3, [r7, #12] 8009c86: 2200 movs r2, #0 8009c88: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* Clear pending interrupts */ USBx->ISTR = 0U; 8009c8c: 68fb ldr r3, [r7, #12] 8009c8e: 2200 movs r2, #0 8009c90: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /*Set Btable Address*/ USBx->BTABLE = BTABLE_ADDRESS; 8009c94: 68fb ldr r3, [r7, #12] 8009c96: 2200 movs r2, #0 8009c98: f8a3 2050 strh.w r2, [r3, #80] @ 0x50 return HAL_OK; 8009c9c: 2300 movs r3, #0 } 8009c9e: 4618 mov r0, r3 8009ca0: 3714 adds r7, #20 8009ca2: 46bd mov sp, r7 8009ca4: bc80 pop {r7} 8009ca6: 4770 bx lr 08009ca8 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8009ca8: b480 push {r7} 8009caa: b09d sub sp, #116 @ 0x74 8009cac: af00 add r7, sp, #0 8009cae: 6078 str r0, [r7, #4] 8009cb0: 6039 str r1, [r7, #0] HAL_StatusTypeDef ret = HAL_OK; 8009cb2: 2300 movs r3, #0 8009cb4: f887 306f strb.w r3, [r7, #111] @ 0x6f uint16_t wEpRegVal; wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; 8009cb8: 687a ldr r2, [r7, #4] 8009cba: 683b ldr r3, [r7, #0] 8009cbc: 781b ldrb r3, [r3, #0] 8009cbe: 009b lsls r3, r3, #2 8009cc0: 4413 add r3, r2 8009cc2: 881b ldrh r3, [r3, #0] 8009cc4: b29b uxth r3, r3 8009cc6: f423 43ec bic.w r3, r3, #30208 @ 0x7600 8009cca: f023 0370 bic.w r3, r3, #112 @ 0x70 8009cce: f8a7 306c strh.w r3, [r7, #108] @ 0x6c /* initialize Endpoint */ switch (ep->type) 8009cd2: 683b ldr r3, [r7, #0] 8009cd4: 78db ldrb r3, [r3, #3] 8009cd6: 2b03 cmp r3, #3 8009cd8: d81f bhi.n 8009d1a 8009cda: a201 add r2, pc, #4 @ (adr r2, 8009ce0 ) 8009cdc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8009ce0: 08009cf1 .word 0x08009cf1 8009ce4: 08009d0d .word 0x08009d0d 8009ce8: 08009d23 .word 0x08009d23 8009cec: 08009cff .word 0x08009cff { case EP_TYPE_CTRL: wEpRegVal |= USB_EP_CONTROL; 8009cf0: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8009cf4: f443 7300 orr.w r3, r3, #512 @ 0x200 8009cf8: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8009cfc: e012 b.n 8009d24 case EP_TYPE_BULK: wEpRegVal |= USB_EP_BULK; break; case EP_TYPE_INTR: wEpRegVal |= USB_EP_INTERRUPT; 8009cfe: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8009d02: f443 63c0 orr.w r3, r3, #1536 @ 0x600 8009d06: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8009d0a: e00b b.n 8009d24 case EP_TYPE_ISOC: wEpRegVal |= USB_EP_ISOCHRONOUS; 8009d0c: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8009d10: f443 6380 orr.w r3, r3, #1024 @ 0x400 8009d14: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8009d18: e004 b.n 8009d24 default: ret = HAL_ERROR; 8009d1a: 2301 movs r3, #1 8009d1c: f887 306f strb.w r3, [r7, #111] @ 0x6f break; 8009d20: e000 b.n 8009d24 break; 8009d22: bf00 nop } PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); 8009d24: 687a ldr r2, [r7, #4] 8009d26: 683b ldr r3, [r7, #0] 8009d28: 781b ldrb r3, [r3, #0] 8009d2a: 009b lsls r3, r3, #2 8009d2c: 441a add r2, r3 8009d2e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8009d32: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009d36: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009d3a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009d3e: f043 0380 orr.w r3, r3, #128 @ 0x80 8009d42: b29b uxth r3, r3 8009d44: 8013 strh r3, [r2, #0] PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); 8009d46: 687a ldr r2, [r7, #4] 8009d48: 683b ldr r3, [r7, #0] 8009d4a: 781b ldrb r3, [r3, #0] 8009d4c: 009b lsls r3, r3, #2 8009d4e: 4413 add r3, r2 8009d50: 881b ldrh r3, [r3, #0] 8009d52: b29b uxth r3, r3 8009d54: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009d58: f023 0370 bic.w r3, r3, #112 @ 0x70 8009d5c: b29b uxth r3, r3 8009d5e: 683a ldr r2, [r7, #0] 8009d60: 7812 ldrb r2, [r2, #0] 8009d62: 4313 orrs r3, r2 8009d64: f8a7 3066 strh.w r3, [r7, #102] @ 0x66 8009d68: 687a ldr r2, [r7, #4] 8009d6a: 683b ldr r3, [r7, #0] 8009d6c: 781b ldrb r3, [r3, #0] 8009d6e: 009b lsls r3, r3, #2 8009d70: 441a add r2, r3 8009d72: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66 8009d76: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009d7a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009d7e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009d82: f043 0380 orr.w r3, r3, #128 @ 0x80 8009d86: b29b uxth r3, r3 8009d88: 8013 strh r3, [r2, #0] if (ep->doublebuffer == 0U) 8009d8a: 683b ldr r3, [r7, #0] 8009d8c: 7b1b ldrb r3, [r3, #12] 8009d8e: 2b00 cmp r3, #0 8009d90: f040 8178 bne.w 800a084 { if (ep->is_in != 0U) 8009d94: 683b ldr r3, [r7, #0] 8009d96: 785b ldrb r3, [r3, #1] 8009d98: 2b00 cmp r3, #0 8009d9a: f000 8084 beq.w 8009ea6 { /*Set the endpoint Transmit buffer address */ PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); 8009d9e: 687b ldr r3, [r7, #4] 8009da0: 61bb str r3, [r7, #24] 8009da2: 687b ldr r3, [r7, #4] 8009da4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009da8: b29b uxth r3, r3 8009daa: 461a mov r2, r3 8009dac: 69bb ldr r3, [r7, #24] 8009dae: 4413 add r3, r2 8009db0: 61bb str r3, [r7, #24] 8009db2: 683b ldr r3, [r7, #0] 8009db4: 781b ldrb r3, [r3, #0] 8009db6: 011a lsls r2, r3, #4 8009db8: 69bb ldr r3, [r7, #24] 8009dba: 4413 add r3, r2 8009dbc: f503 6380 add.w r3, r3, #1024 @ 0x400 8009dc0: 617b str r3, [r7, #20] 8009dc2: 683b ldr r3, [r7, #0] 8009dc4: 88db ldrh r3, [r3, #6] 8009dc6: 085b lsrs r3, r3, #1 8009dc8: b29b uxth r3, r3 8009dca: 005b lsls r3, r3, #1 8009dcc: b29a uxth r2, r3 8009dce: 697b ldr r3, [r7, #20] 8009dd0: 801a strh r2, [r3, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8009dd2: 687a ldr r2, [r7, #4] 8009dd4: 683b ldr r3, [r7, #0] 8009dd6: 781b ldrb r3, [r3, #0] 8009dd8: 009b lsls r3, r3, #2 8009dda: 4413 add r3, r2 8009ddc: 881b ldrh r3, [r3, #0] 8009dde: 827b strh r3, [r7, #18] 8009de0: 8a7b ldrh r3, [r7, #18] 8009de2: f003 0340 and.w r3, r3, #64 @ 0x40 8009de6: 2b00 cmp r3, #0 8009de8: d01b beq.n 8009e22 8009dea: 687a ldr r2, [r7, #4] 8009dec: 683b ldr r3, [r7, #0] 8009dee: 781b ldrb r3, [r3, #0] 8009df0: 009b lsls r3, r3, #2 8009df2: 4413 add r3, r2 8009df4: 881b ldrh r3, [r3, #0] 8009df6: b29b uxth r3, r3 8009df8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009dfc: f023 0370 bic.w r3, r3, #112 @ 0x70 8009e00: 823b strh r3, [r7, #16] 8009e02: 687a ldr r2, [r7, #4] 8009e04: 683b ldr r3, [r7, #0] 8009e06: 781b ldrb r3, [r3, #0] 8009e08: 009b lsls r3, r3, #2 8009e0a: 441a add r2, r3 8009e0c: 8a3b ldrh r3, [r7, #16] 8009e0e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009e12: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009e16: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009e1a: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8009e1e: b29b uxth r3, r3 8009e20: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 8009e22: 683b ldr r3, [r7, #0] 8009e24: 78db ldrb r3, [r3, #3] 8009e26: 2b01 cmp r3, #1 8009e28: d020 beq.n 8009e6c { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 8009e2a: 687a ldr r2, [r7, #4] 8009e2c: 683b ldr r3, [r7, #0] 8009e2e: 781b ldrb r3, [r3, #0] 8009e30: 009b lsls r3, r3, #2 8009e32: 4413 add r3, r2 8009e34: 881b ldrh r3, [r3, #0] 8009e36: b29b uxth r3, r3 8009e38: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009e3c: f023 0340 bic.w r3, r3, #64 @ 0x40 8009e40: 81bb strh r3, [r7, #12] 8009e42: 89bb ldrh r3, [r7, #12] 8009e44: f083 0320 eor.w r3, r3, #32 8009e48: 81bb strh r3, [r7, #12] 8009e4a: 687a ldr r2, [r7, #4] 8009e4c: 683b ldr r3, [r7, #0] 8009e4e: 781b ldrb r3, [r3, #0] 8009e50: 009b lsls r3, r3, #2 8009e52: 441a add r2, r3 8009e54: 89bb ldrh r3, [r7, #12] 8009e56: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009e5a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009e5e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009e62: f043 0380 orr.w r3, r3, #128 @ 0x80 8009e66: b29b uxth r3, r3 8009e68: 8013 strh r3, [r2, #0] 8009e6a: e2d5 b.n 800a418 } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009e6c: 687a ldr r2, [r7, #4] 8009e6e: 683b ldr r3, [r7, #0] 8009e70: 781b ldrb r3, [r3, #0] 8009e72: 009b lsls r3, r3, #2 8009e74: 4413 add r3, r2 8009e76: 881b ldrh r3, [r3, #0] 8009e78: b29b uxth r3, r3 8009e7a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009e7e: f023 0340 bic.w r3, r3, #64 @ 0x40 8009e82: 81fb strh r3, [r7, #14] 8009e84: 687a ldr r2, [r7, #4] 8009e86: 683b ldr r3, [r7, #0] 8009e88: 781b ldrb r3, [r3, #0] 8009e8a: 009b lsls r3, r3, #2 8009e8c: 441a add r2, r3 8009e8e: 89fb ldrh r3, [r7, #14] 8009e90: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009e94: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009e98: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009e9c: f043 0380 orr.w r3, r3, #128 @ 0x80 8009ea0: b29b uxth r3, r3 8009ea2: 8013 strh r3, [r2, #0] 8009ea4: e2b8 b.n 800a418 } } else { /* Set the endpoint Receive buffer address */ PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); 8009ea6: 687b ldr r3, [r7, #4] 8009ea8: 633b str r3, [r7, #48] @ 0x30 8009eaa: 687b ldr r3, [r7, #4] 8009eac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009eb0: b29b uxth r3, r3 8009eb2: 461a mov r2, r3 8009eb4: 6b3b ldr r3, [r7, #48] @ 0x30 8009eb6: 4413 add r3, r2 8009eb8: 633b str r3, [r7, #48] @ 0x30 8009eba: 683b ldr r3, [r7, #0] 8009ebc: 781b ldrb r3, [r3, #0] 8009ebe: 011a lsls r2, r3, #4 8009ec0: 6b3b ldr r3, [r7, #48] @ 0x30 8009ec2: 4413 add r3, r2 8009ec4: f503 6381 add.w r3, r3, #1032 @ 0x408 8009ec8: 62fb str r3, [r7, #44] @ 0x2c 8009eca: 683b ldr r3, [r7, #0] 8009ecc: 88db ldrh r3, [r3, #6] 8009ece: 085b lsrs r3, r3, #1 8009ed0: b29b uxth r3, r3 8009ed2: 005b lsls r3, r3, #1 8009ed4: b29a uxth r2, r3 8009ed6: 6afb ldr r3, [r7, #44] @ 0x2c 8009ed8: 801a strh r2, [r3, #0] /* Set the endpoint Receive buffer counter */ PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); 8009eda: 687b ldr r3, [r7, #4] 8009edc: 62bb str r3, [r7, #40] @ 0x28 8009ede: 687b ldr r3, [r7, #4] 8009ee0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009ee4: b29b uxth r3, r3 8009ee6: 461a mov r2, r3 8009ee8: 6abb ldr r3, [r7, #40] @ 0x28 8009eea: 4413 add r3, r2 8009eec: 62bb str r3, [r7, #40] @ 0x28 8009eee: 683b ldr r3, [r7, #0] 8009ef0: 781b ldrb r3, [r3, #0] 8009ef2: 011a lsls r2, r3, #4 8009ef4: 6abb ldr r3, [r7, #40] @ 0x28 8009ef6: 4413 add r3, r2 8009ef8: f203 430c addw r3, r3, #1036 @ 0x40c 8009efc: 627b str r3, [r7, #36] @ 0x24 8009efe: 6a7b ldr r3, [r7, #36] @ 0x24 8009f00: 881b ldrh r3, [r3, #0] 8009f02: b29b uxth r3, r3 8009f04: f3c3 0309 ubfx r3, r3, #0, #10 8009f08: b29a uxth r2, r3 8009f0a: 6a7b ldr r3, [r7, #36] @ 0x24 8009f0c: 801a strh r2, [r3, #0] 8009f0e: 683b ldr r3, [r7, #0] 8009f10: 691b ldr r3, [r3, #16] 8009f12: 2b3e cmp r3, #62 @ 0x3e 8009f14: d91d bls.n 8009f52 8009f16: 683b ldr r3, [r7, #0] 8009f18: 691b ldr r3, [r3, #16] 8009f1a: 095b lsrs r3, r3, #5 8009f1c: 66bb str r3, [r7, #104] @ 0x68 8009f1e: 683b ldr r3, [r7, #0] 8009f20: 691b ldr r3, [r3, #16] 8009f22: f003 031f and.w r3, r3, #31 8009f26: 2b00 cmp r3, #0 8009f28: d102 bne.n 8009f30 8009f2a: 6ebb ldr r3, [r7, #104] @ 0x68 8009f2c: 3b01 subs r3, #1 8009f2e: 66bb str r3, [r7, #104] @ 0x68 8009f30: 6a7b ldr r3, [r7, #36] @ 0x24 8009f32: 881b ldrh r3, [r3, #0] 8009f34: b29a uxth r2, r3 8009f36: 6ebb ldr r3, [r7, #104] @ 0x68 8009f38: b29b uxth r3, r3 8009f3a: 029b lsls r3, r3, #10 8009f3c: b29b uxth r3, r3 8009f3e: 4313 orrs r3, r2 8009f40: b29b uxth r3, r3 8009f42: ea6f 4343 mvn.w r3, r3, lsl #17 8009f46: ea6f 4353 mvn.w r3, r3, lsr #17 8009f4a: b29a uxth r2, r3 8009f4c: 6a7b ldr r3, [r7, #36] @ 0x24 8009f4e: 801a strh r2, [r3, #0] 8009f50: e026 b.n 8009fa0 8009f52: 683b ldr r3, [r7, #0] 8009f54: 691b ldr r3, [r3, #16] 8009f56: 2b00 cmp r3, #0 8009f58: d10a bne.n 8009f70 8009f5a: 6a7b ldr r3, [r7, #36] @ 0x24 8009f5c: 881b ldrh r3, [r3, #0] 8009f5e: b29b uxth r3, r3 8009f60: ea6f 4343 mvn.w r3, r3, lsl #17 8009f64: ea6f 4353 mvn.w r3, r3, lsr #17 8009f68: b29a uxth r2, r3 8009f6a: 6a7b ldr r3, [r7, #36] @ 0x24 8009f6c: 801a strh r2, [r3, #0] 8009f6e: e017 b.n 8009fa0 8009f70: 683b ldr r3, [r7, #0] 8009f72: 691b ldr r3, [r3, #16] 8009f74: 085b lsrs r3, r3, #1 8009f76: 66bb str r3, [r7, #104] @ 0x68 8009f78: 683b ldr r3, [r7, #0] 8009f7a: 691b ldr r3, [r3, #16] 8009f7c: f003 0301 and.w r3, r3, #1 8009f80: 2b00 cmp r3, #0 8009f82: d002 beq.n 8009f8a 8009f84: 6ebb ldr r3, [r7, #104] @ 0x68 8009f86: 3301 adds r3, #1 8009f88: 66bb str r3, [r7, #104] @ 0x68 8009f8a: 6a7b ldr r3, [r7, #36] @ 0x24 8009f8c: 881b ldrh r3, [r3, #0] 8009f8e: b29a uxth r2, r3 8009f90: 6ebb ldr r3, [r7, #104] @ 0x68 8009f92: b29b uxth r3, r3 8009f94: 029b lsls r3, r3, #10 8009f96: b29b uxth r3, r3 8009f98: 4313 orrs r3, r2 8009f9a: b29a uxth r2, r3 8009f9c: 6a7b ldr r3, [r7, #36] @ 0x24 8009f9e: 801a strh r2, [r3, #0] PCD_CLEAR_RX_DTOG(USBx, ep->num); 8009fa0: 687a ldr r2, [r7, #4] 8009fa2: 683b ldr r3, [r7, #0] 8009fa4: 781b ldrb r3, [r3, #0] 8009fa6: 009b lsls r3, r3, #2 8009fa8: 4413 add r3, r2 8009faa: 881b ldrh r3, [r3, #0] 8009fac: 847b strh r3, [r7, #34] @ 0x22 8009fae: 8c7b ldrh r3, [r7, #34] @ 0x22 8009fb0: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009fb4: 2b00 cmp r3, #0 8009fb6: d01b beq.n 8009ff0 8009fb8: 687a ldr r2, [r7, #4] 8009fba: 683b ldr r3, [r7, #0] 8009fbc: 781b ldrb r3, [r3, #0] 8009fbe: 009b lsls r3, r3, #2 8009fc0: 4413 add r3, r2 8009fc2: 881b ldrh r3, [r3, #0] 8009fc4: b29b uxth r3, r3 8009fc6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009fca: f023 0370 bic.w r3, r3, #112 @ 0x70 8009fce: 843b strh r3, [r7, #32] 8009fd0: 687a ldr r2, [r7, #4] 8009fd2: 683b ldr r3, [r7, #0] 8009fd4: 781b ldrb r3, [r3, #0] 8009fd6: 009b lsls r3, r3, #2 8009fd8: 441a add r2, r3 8009fda: 8c3b ldrh r3, [r7, #32] 8009fdc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009fe0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009fe4: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8009fe8: f043 0380 orr.w r3, r3, #128 @ 0x80 8009fec: b29b uxth r3, r3 8009fee: 8013 strh r3, [r2, #0] if (ep->num == 0U) 8009ff0: 683b ldr r3, [r7, #0] 8009ff2: 781b ldrb r3, [r3, #0] 8009ff4: 2b00 cmp r3, #0 8009ff6: d124 bne.n 800a042 { /* Configure VALID status for EP0 */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 8009ff8: 687a ldr r2, [r7, #4] 8009ffa: 683b ldr r3, [r7, #0] 8009ffc: 781b ldrb r3, [r3, #0] 8009ffe: 009b lsls r3, r3, #2 800a000: 4413 add r3, r2 800a002: 881b ldrh r3, [r3, #0] 800a004: b29b uxth r3, r3 800a006: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800a00a: f023 0370 bic.w r3, r3, #112 @ 0x70 800a00e: 83bb strh r3, [r7, #28] 800a010: 8bbb ldrh r3, [r7, #28] 800a012: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800a016: 83bb strh r3, [r7, #28] 800a018: 8bbb ldrh r3, [r7, #28] 800a01a: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800a01e: 83bb strh r3, [r7, #28] 800a020: 687a ldr r2, [r7, #4] 800a022: 683b ldr r3, [r7, #0] 800a024: 781b ldrb r3, [r3, #0] 800a026: 009b lsls r3, r3, #2 800a028: 441a add r2, r3 800a02a: 8bbb ldrh r3, [r7, #28] 800a02c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a030: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a034: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a038: f043 0380 orr.w r3, r3, #128 @ 0x80 800a03c: b29b uxth r3, r3 800a03e: 8013 strh r3, [r2, #0] 800a040: e1ea b.n 800a418 } else { /* Configure NAK status for OUT Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK); 800a042: 687a ldr r2, [r7, #4] 800a044: 683b ldr r3, [r7, #0] 800a046: 781b ldrb r3, [r3, #0] 800a048: 009b lsls r3, r3, #2 800a04a: 4413 add r3, r2 800a04c: 881b ldrh r3, [r3, #0] 800a04e: b29b uxth r3, r3 800a050: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800a054: f023 0370 bic.w r3, r3, #112 @ 0x70 800a058: 83fb strh r3, [r7, #30] 800a05a: 8bfb ldrh r3, [r7, #30] 800a05c: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800a060: 83fb strh r3, [r7, #30] 800a062: 687a ldr r2, [r7, #4] 800a064: 683b ldr r3, [r7, #0] 800a066: 781b ldrb r3, [r3, #0] 800a068: 009b lsls r3, r3, #2 800a06a: 441a add r2, r3 800a06c: 8bfb ldrh r3, [r7, #30] 800a06e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a072: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a076: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a07a: f043 0380 orr.w r3, r3, #128 @ 0x80 800a07e: b29b uxth r3, r3 800a080: 8013 strh r3, [r2, #0] 800a082: e1c9 b.n 800a418 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->type == EP_TYPE_BULK) 800a084: 683b ldr r3, [r7, #0] 800a086: 78db ldrb r3, [r3, #3] 800a088: 2b02 cmp r3, #2 800a08a: d11e bne.n 800a0ca { /* Set bulk endpoint as double buffered */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 800a08c: 687a ldr r2, [r7, #4] 800a08e: 683b ldr r3, [r7, #0] 800a090: 781b ldrb r3, [r3, #0] 800a092: 009b lsls r3, r3, #2 800a094: 4413 add r3, r2 800a096: 881b ldrh r3, [r3, #0] 800a098: b29b uxth r3, r3 800a09a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a09e: f023 0370 bic.w r3, r3, #112 @ 0x70 800a0a2: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 800a0a6: 687a ldr r2, [r7, #4] 800a0a8: 683b ldr r3, [r7, #0] 800a0aa: 781b ldrb r3, [r3, #0] 800a0ac: 009b lsls r3, r3, #2 800a0ae: 441a add r2, r3 800a0b0: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 800a0b4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a0b8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a0bc: f443 4301 orr.w r3, r3, #33024 @ 0x8100 800a0c0: f043 0380 orr.w r3, r3, #128 @ 0x80 800a0c4: b29b uxth r3, r3 800a0c6: 8013 strh r3, [r2, #0] 800a0c8: e01d b.n 800a106 } else { /* Set the ISOC endpoint in double buffer mode */ PCD_CLEAR_EP_KIND(USBx, ep->num); 800a0ca: 687a ldr r2, [r7, #4] 800a0cc: 683b ldr r3, [r7, #0] 800a0ce: 781b ldrb r3, [r3, #0] 800a0d0: 009b lsls r3, r3, #2 800a0d2: 4413 add r3, r2 800a0d4: 881b ldrh r3, [r3, #0] 800a0d6: b29b uxth r3, r3 800a0d8: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 800a0dc: f023 0370 bic.w r3, r3, #112 @ 0x70 800a0e0: f8a7 3064 strh.w r3, [r7, #100] @ 0x64 800a0e4: 687a ldr r2, [r7, #4] 800a0e6: 683b ldr r3, [r7, #0] 800a0e8: 781b ldrb r3, [r3, #0] 800a0ea: 009b lsls r3, r3, #2 800a0ec: 441a add r2, r3 800a0ee: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64 800a0f2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a0f6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a0fa: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a0fe: f043 0380 orr.w r3, r3, #128 @ 0x80 800a102: b29b uxth r3, r3 800a104: 8013 strh r3, [r2, #0] } /* Set buffer address for double buffered mode */ PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); 800a106: 687b ldr r3, [r7, #4] 800a108: 65fb str r3, [r7, #92] @ 0x5c 800a10a: 687b ldr r3, [r7, #4] 800a10c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a110: b29b uxth r3, r3 800a112: 461a mov r2, r3 800a114: 6dfb ldr r3, [r7, #92] @ 0x5c 800a116: 4413 add r3, r2 800a118: 65fb str r3, [r7, #92] @ 0x5c 800a11a: 683b ldr r3, [r7, #0] 800a11c: 781b ldrb r3, [r3, #0] 800a11e: 011a lsls r2, r3, #4 800a120: 6dfb ldr r3, [r7, #92] @ 0x5c 800a122: 4413 add r3, r2 800a124: f503 6380 add.w r3, r3, #1024 @ 0x400 800a128: 65bb str r3, [r7, #88] @ 0x58 800a12a: 683b ldr r3, [r7, #0] 800a12c: 891b ldrh r3, [r3, #8] 800a12e: 085b lsrs r3, r3, #1 800a130: b29b uxth r3, r3 800a132: 005b lsls r3, r3, #1 800a134: b29a uxth r2, r3 800a136: 6dbb ldr r3, [r7, #88] @ 0x58 800a138: 801a strh r2, [r3, #0] 800a13a: 687b ldr r3, [r7, #4] 800a13c: 657b str r3, [r7, #84] @ 0x54 800a13e: 687b ldr r3, [r7, #4] 800a140: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a144: b29b uxth r3, r3 800a146: 461a mov r2, r3 800a148: 6d7b ldr r3, [r7, #84] @ 0x54 800a14a: 4413 add r3, r2 800a14c: 657b str r3, [r7, #84] @ 0x54 800a14e: 683b ldr r3, [r7, #0] 800a150: 781b ldrb r3, [r3, #0] 800a152: 011a lsls r2, r3, #4 800a154: 6d7b ldr r3, [r7, #84] @ 0x54 800a156: 4413 add r3, r2 800a158: f503 6381 add.w r3, r3, #1032 @ 0x408 800a15c: 653b str r3, [r7, #80] @ 0x50 800a15e: 683b ldr r3, [r7, #0] 800a160: 895b ldrh r3, [r3, #10] 800a162: 085b lsrs r3, r3, #1 800a164: b29b uxth r3, r3 800a166: 005b lsls r3, r3, #1 800a168: b29a uxth r2, r3 800a16a: 6d3b ldr r3, [r7, #80] @ 0x50 800a16c: 801a strh r2, [r3, #0] if (ep->is_in == 0U) 800a16e: 683b ldr r3, [r7, #0] 800a170: 785b ldrb r3, [r3, #1] 800a172: 2b00 cmp r3, #0 800a174: f040 8093 bne.w 800a29e { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 800a178: 687a ldr r2, [r7, #4] 800a17a: 683b ldr r3, [r7, #0] 800a17c: 781b ldrb r3, [r3, #0] 800a17e: 009b lsls r3, r3, #2 800a180: 4413 add r3, r2 800a182: 881b ldrh r3, [r3, #0] 800a184: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 800a188: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 800a18c: f403 4380 and.w r3, r3, #16384 @ 0x4000 800a190: 2b00 cmp r3, #0 800a192: d01b beq.n 800a1cc 800a194: 687a ldr r2, [r7, #4] 800a196: 683b ldr r3, [r7, #0] 800a198: 781b ldrb r3, [r3, #0] 800a19a: 009b lsls r3, r3, #2 800a19c: 4413 add r3, r2 800a19e: 881b ldrh r3, [r3, #0] 800a1a0: b29b uxth r3, r3 800a1a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a1a6: f023 0370 bic.w r3, r3, #112 @ 0x70 800a1aa: 87fb strh r3, [r7, #62] @ 0x3e 800a1ac: 687a ldr r2, [r7, #4] 800a1ae: 683b ldr r3, [r7, #0] 800a1b0: 781b ldrb r3, [r3, #0] 800a1b2: 009b lsls r3, r3, #2 800a1b4: 441a add r2, r3 800a1b6: 8ffb ldrh r3, [r7, #62] @ 0x3e 800a1b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a1bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a1c0: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800a1c4: f043 0380 orr.w r3, r3, #128 @ 0x80 800a1c8: b29b uxth r3, r3 800a1ca: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 800a1cc: 687a ldr r2, [r7, #4] 800a1ce: 683b ldr r3, [r7, #0] 800a1d0: 781b ldrb r3, [r3, #0] 800a1d2: 009b lsls r3, r3, #2 800a1d4: 4413 add r3, r2 800a1d6: 881b ldrh r3, [r3, #0] 800a1d8: 87bb strh r3, [r7, #60] @ 0x3c 800a1da: 8fbb ldrh r3, [r7, #60] @ 0x3c 800a1dc: f003 0340 and.w r3, r3, #64 @ 0x40 800a1e0: 2b00 cmp r3, #0 800a1e2: d01b beq.n 800a21c 800a1e4: 687a ldr r2, [r7, #4] 800a1e6: 683b ldr r3, [r7, #0] 800a1e8: 781b ldrb r3, [r3, #0] 800a1ea: 009b lsls r3, r3, #2 800a1ec: 4413 add r3, r2 800a1ee: 881b ldrh r3, [r3, #0] 800a1f0: b29b uxth r3, r3 800a1f2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a1f6: f023 0370 bic.w r3, r3, #112 @ 0x70 800a1fa: 877b strh r3, [r7, #58] @ 0x3a 800a1fc: 687a ldr r2, [r7, #4] 800a1fe: 683b ldr r3, [r7, #0] 800a200: 781b ldrb r3, [r3, #0] 800a202: 009b lsls r3, r3, #2 800a204: 441a add r2, r3 800a206: 8f7b ldrh r3, [r7, #58] @ 0x3a 800a208: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a20c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a210: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a214: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800a218: b29b uxth r3, r3 800a21a: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800a21c: 687a ldr r2, [r7, #4] 800a21e: 683b ldr r3, [r7, #0] 800a220: 781b ldrb r3, [r3, #0] 800a222: 009b lsls r3, r3, #2 800a224: 4413 add r3, r2 800a226: 881b ldrh r3, [r3, #0] 800a228: b29b uxth r3, r3 800a22a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800a22e: f023 0370 bic.w r3, r3, #112 @ 0x70 800a232: 873b strh r3, [r7, #56] @ 0x38 800a234: 8f3b ldrh r3, [r7, #56] @ 0x38 800a236: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800a23a: 873b strh r3, [r7, #56] @ 0x38 800a23c: 8f3b ldrh r3, [r7, #56] @ 0x38 800a23e: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800a242: 873b strh r3, [r7, #56] @ 0x38 800a244: 687a ldr r2, [r7, #4] 800a246: 683b ldr r3, [r7, #0] 800a248: 781b ldrb r3, [r3, #0] 800a24a: 009b lsls r3, r3, #2 800a24c: 441a add r2, r3 800a24e: 8f3b ldrh r3, [r7, #56] @ 0x38 800a250: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a254: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a258: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a25c: f043 0380 orr.w r3, r3, #128 @ 0x80 800a260: b29b uxth r3, r3 800a262: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 800a264: 687a ldr r2, [r7, #4] 800a266: 683b ldr r3, [r7, #0] 800a268: 781b ldrb r3, [r3, #0] 800a26a: 009b lsls r3, r3, #2 800a26c: 4413 add r3, r2 800a26e: 881b ldrh r3, [r3, #0] 800a270: b29b uxth r3, r3 800a272: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a276: f023 0340 bic.w r3, r3, #64 @ 0x40 800a27a: 86fb strh r3, [r7, #54] @ 0x36 800a27c: 687a ldr r2, [r7, #4] 800a27e: 683b ldr r3, [r7, #0] 800a280: 781b ldrb r3, [r3, #0] 800a282: 009b lsls r3, r3, #2 800a284: 441a add r2, r3 800a286: 8efb ldrh r3, [r7, #54] @ 0x36 800a288: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a28c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a290: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a294: f043 0380 orr.w r3, r3, #128 @ 0x80 800a298: b29b uxth r3, r3 800a29a: 8013 strh r3, [r2, #0] 800a29c: e0bc b.n 800a418 } else { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 800a29e: 687a ldr r2, [r7, #4] 800a2a0: 683b ldr r3, [r7, #0] 800a2a2: 781b ldrb r3, [r3, #0] 800a2a4: 009b lsls r3, r3, #2 800a2a6: 4413 add r3, r2 800a2a8: 881b ldrh r3, [r3, #0] 800a2aa: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 800a2ae: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 800a2b2: f403 4380 and.w r3, r3, #16384 @ 0x4000 800a2b6: 2b00 cmp r3, #0 800a2b8: d01d beq.n 800a2f6 800a2ba: 687a ldr r2, [r7, #4] 800a2bc: 683b ldr r3, [r7, #0] 800a2be: 781b ldrb r3, [r3, #0] 800a2c0: 009b lsls r3, r3, #2 800a2c2: 4413 add r3, r2 800a2c4: 881b ldrh r3, [r3, #0] 800a2c6: b29b uxth r3, r3 800a2c8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a2cc: f023 0370 bic.w r3, r3, #112 @ 0x70 800a2d0: f8a7 304c strh.w r3, [r7, #76] @ 0x4c 800a2d4: 687a ldr r2, [r7, #4] 800a2d6: 683b ldr r3, [r7, #0] 800a2d8: 781b ldrb r3, [r3, #0] 800a2da: 009b lsls r3, r3, #2 800a2dc: 441a add r2, r3 800a2de: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c 800a2e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a2e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a2ea: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800a2ee: f043 0380 orr.w r3, r3, #128 @ 0x80 800a2f2: b29b uxth r3, r3 800a2f4: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 800a2f6: 687a ldr r2, [r7, #4] 800a2f8: 683b ldr r3, [r7, #0] 800a2fa: 781b ldrb r3, [r3, #0] 800a2fc: 009b lsls r3, r3, #2 800a2fe: 4413 add r3, r2 800a300: 881b ldrh r3, [r3, #0] 800a302: f8a7 304a strh.w r3, [r7, #74] @ 0x4a 800a306: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800a30a: f003 0340 and.w r3, r3, #64 @ 0x40 800a30e: 2b00 cmp r3, #0 800a310: d01d beq.n 800a34e 800a312: 687a ldr r2, [r7, #4] 800a314: 683b ldr r3, [r7, #0] 800a316: 781b ldrb r3, [r3, #0] 800a318: 009b lsls r3, r3, #2 800a31a: 4413 add r3, r2 800a31c: 881b ldrh r3, [r3, #0] 800a31e: b29b uxth r3, r3 800a320: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a324: f023 0370 bic.w r3, r3, #112 @ 0x70 800a328: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 800a32c: 687a ldr r2, [r7, #4] 800a32e: 683b ldr r3, [r7, #0] 800a330: 781b ldrb r3, [r3, #0] 800a332: 009b lsls r3, r3, #2 800a334: 441a add r2, r3 800a336: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48 800a33a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a33e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a342: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a346: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800a34a: b29b uxth r3, r3 800a34c: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 800a34e: 683b ldr r3, [r7, #0] 800a350: 78db ldrb r3, [r3, #3] 800a352: 2b01 cmp r3, #1 800a354: d024 beq.n 800a3a0 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 800a356: 687a ldr r2, [r7, #4] 800a358: 683b ldr r3, [r7, #0] 800a35a: 781b ldrb r3, [r3, #0] 800a35c: 009b lsls r3, r3, #2 800a35e: 4413 add r3, r2 800a360: 881b ldrh r3, [r3, #0] 800a362: b29b uxth r3, r3 800a364: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a368: f023 0340 bic.w r3, r3, #64 @ 0x40 800a36c: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 800a370: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 800a374: f083 0320 eor.w r3, r3, #32 800a378: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 800a37c: 687a ldr r2, [r7, #4] 800a37e: 683b ldr r3, [r7, #0] 800a380: 781b ldrb r3, [r3, #0] 800a382: 009b lsls r3, r3, #2 800a384: 441a add r2, r3 800a386: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 800a38a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a38e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a392: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a396: f043 0380 orr.w r3, r3, #128 @ 0x80 800a39a: b29b uxth r3, r3 800a39c: 8013 strh r3, [r2, #0] 800a39e: e01d b.n 800a3dc } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 800a3a0: 687a ldr r2, [r7, #4] 800a3a2: 683b ldr r3, [r7, #0] 800a3a4: 781b ldrb r3, [r3, #0] 800a3a6: 009b lsls r3, r3, #2 800a3a8: 4413 add r3, r2 800a3aa: 881b ldrh r3, [r3, #0] 800a3ac: b29b uxth r3, r3 800a3ae: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a3b2: f023 0340 bic.w r3, r3, #64 @ 0x40 800a3b6: f8a7 3046 strh.w r3, [r7, #70] @ 0x46 800a3ba: 687a ldr r2, [r7, #4] 800a3bc: 683b ldr r3, [r7, #0] 800a3be: 781b ldrb r3, [r3, #0] 800a3c0: 009b lsls r3, r3, #2 800a3c2: 441a add r2, r3 800a3c4: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46 800a3c8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a3cc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a3d0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a3d4: f043 0380 orr.w r3, r3, #128 @ 0x80 800a3d8: b29b uxth r3, r3 800a3da: 8013 strh r3, [r2, #0] } PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800a3dc: 687a ldr r2, [r7, #4] 800a3de: 683b ldr r3, [r7, #0] 800a3e0: 781b ldrb r3, [r3, #0] 800a3e2: 009b lsls r3, r3, #2 800a3e4: 4413 add r3, r2 800a3e6: 881b ldrh r3, [r3, #0] 800a3e8: b29b uxth r3, r3 800a3ea: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800a3ee: f023 0370 bic.w r3, r3, #112 @ 0x70 800a3f2: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 800a3f6: 687a ldr r2, [r7, #4] 800a3f8: 683b ldr r3, [r7, #0] 800a3fa: 781b ldrb r3, [r3, #0] 800a3fc: 009b lsls r3, r3, #2 800a3fe: 441a add r2, r3 800a400: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 800a404: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a408: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a40c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a410: f043 0380 orr.w r3, r3, #128 @ 0x80 800a414: b29b uxth r3, r3 800a416: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return ret; 800a418: f897 306f ldrb.w r3, [r7, #111] @ 0x6f } 800a41c: 4618 mov r0, r3 800a41e: 3774 adds r7, #116 @ 0x74 800a420: 46bd mov sp, r7 800a422: bc80 pop {r7} 800a424: 4770 bx lr 800a426: bf00 nop 0800a428 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800a428: b480 push {r7} 800a42a: b08d sub sp, #52 @ 0x34 800a42c: af00 add r7, sp, #0 800a42e: 6078 str r0, [r7, #4] 800a430: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 800a432: 683b ldr r3, [r7, #0] 800a434: 7b1b ldrb r3, [r3, #12] 800a436: 2b00 cmp r3, #0 800a438: f040 808e bne.w 800a558 { if (ep->is_in != 0U) 800a43c: 683b ldr r3, [r7, #0] 800a43e: 785b ldrb r3, [r3, #1] 800a440: 2b00 cmp r3, #0 800a442: d044 beq.n 800a4ce { PCD_CLEAR_TX_DTOG(USBx, ep->num); 800a444: 687a ldr r2, [r7, #4] 800a446: 683b ldr r3, [r7, #0] 800a448: 781b ldrb r3, [r3, #0] 800a44a: 009b lsls r3, r3, #2 800a44c: 4413 add r3, r2 800a44e: 881b ldrh r3, [r3, #0] 800a450: 81bb strh r3, [r7, #12] 800a452: 89bb ldrh r3, [r7, #12] 800a454: f003 0340 and.w r3, r3, #64 @ 0x40 800a458: 2b00 cmp r3, #0 800a45a: d01b beq.n 800a494 800a45c: 687a ldr r2, [r7, #4] 800a45e: 683b ldr r3, [r7, #0] 800a460: 781b ldrb r3, [r3, #0] 800a462: 009b lsls r3, r3, #2 800a464: 4413 add r3, r2 800a466: 881b ldrh r3, [r3, #0] 800a468: b29b uxth r3, r3 800a46a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a46e: f023 0370 bic.w r3, r3, #112 @ 0x70 800a472: 817b strh r3, [r7, #10] 800a474: 687a ldr r2, [r7, #4] 800a476: 683b ldr r3, [r7, #0] 800a478: 781b ldrb r3, [r3, #0] 800a47a: 009b lsls r3, r3, #2 800a47c: 441a add r2, r3 800a47e: 897b ldrh r3, [r7, #10] 800a480: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a484: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a488: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a48c: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800a490: b29b uxth r3, r3 800a492: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 800a494: 687a ldr r2, [r7, #4] 800a496: 683b ldr r3, [r7, #0] 800a498: 781b ldrb r3, [r3, #0] 800a49a: 009b lsls r3, r3, #2 800a49c: 4413 add r3, r2 800a49e: 881b ldrh r3, [r3, #0] 800a4a0: b29b uxth r3, r3 800a4a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a4a6: f023 0340 bic.w r3, r3, #64 @ 0x40 800a4aa: 813b strh r3, [r7, #8] 800a4ac: 687a ldr r2, [r7, #4] 800a4ae: 683b ldr r3, [r7, #0] 800a4b0: 781b ldrb r3, [r3, #0] 800a4b2: 009b lsls r3, r3, #2 800a4b4: 441a add r2, r3 800a4b6: 893b ldrh r3, [r7, #8] 800a4b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a4bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a4c0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a4c4: f043 0380 orr.w r3, r3, #128 @ 0x80 800a4c8: b29b uxth r3, r3 800a4ca: 8013 strh r3, [r2, #0] 800a4cc: e192 b.n 800a7f4 } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 800a4ce: 687a ldr r2, [r7, #4] 800a4d0: 683b ldr r3, [r7, #0] 800a4d2: 781b ldrb r3, [r3, #0] 800a4d4: 009b lsls r3, r3, #2 800a4d6: 4413 add r3, r2 800a4d8: 881b ldrh r3, [r3, #0] 800a4da: 827b strh r3, [r7, #18] 800a4dc: 8a7b ldrh r3, [r7, #18] 800a4de: f403 4380 and.w r3, r3, #16384 @ 0x4000 800a4e2: 2b00 cmp r3, #0 800a4e4: d01b beq.n 800a51e 800a4e6: 687a ldr r2, [r7, #4] 800a4e8: 683b ldr r3, [r7, #0] 800a4ea: 781b ldrb r3, [r3, #0] 800a4ec: 009b lsls r3, r3, #2 800a4ee: 4413 add r3, r2 800a4f0: 881b ldrh r3, [r3, #0] 800a4f2: b29b uxth r3, r3 800a4f4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a4f8: f023 0370 bic.w r3, r3, #112 @ 0x70 800a4fc: 823b strh r3, [r7, #16] 800a4fe: 687a ldr r2, [r7, #4] 800a500: 683b ldr r3, [r7, #0] 800a502: 781b ldrb r3, [r3, #0] 800a504: 009b lsls r3, r3, #2 800a506: 441a add r2, r3 800a508: 8a3b ldrh r3, [r7, #16] 800a50a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a50e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a512: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800a516: f043 0380 orr.w r3, r3, #128 @ 0x80 800a51a: b29b uxth r3, r3 800a51c: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800a51e: 687a ldr r2, [r7, #4] 800a520: 683b ldr r3, [r7, #0] 800a522: 781b ldrb r3, [r3, #0] 800a524: 009b lsls r3, r3, #2 800a526: 4413 add r3, r2 800a528: 881b ldrh r3, [r3, #0] 800a52a: b29b uxth r3, r3 800a52c: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800a530: f023 0370 bic.w r3, r3, #112 @ 0x70 800a534: 81fb strh r3, [r7, #14] 800a536: 687a ldr r2, [r7, #4] 800a538: 683b ldr r3, [r7, #0] 800a53a: 781b ldrb r3, [r3, #0] 800a53c: 009b lsls r3, r3, #2 800a53e: 441a add r2, r3 800a540: 89fb ldrh r3, [r7, #14] 800a542: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a546: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a54a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a54e: f043 0380 orr.w r3, r3, #128 @ 0x80 800a552: b29b uxth r3, r3 800a554: 8013 strh r3, [r2, #0] 800a556: e14d b.n 800a7f4 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->is_in == 0U) 800a558: 683b ldr r3, [r7, #0] 800a55a: 785b ldrb r3, [r3, #1] 800a55c: 2b00 cmp r3, #0 800a55e: f040 80a5 bne.w 800a6ac { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 800a562: 687a ldr r2, [r7, #4] 800a564: 683b ldr r3, [r7, #0] 800a566: 781b ldrb r3, [r3, #0] 800a568: 009b lsls r3, r3, #2 800a56a: 4413 add r3, r2 800a56c: 881b ldrh r3, [r3, #0] 800a56e: 843b strh r3, [r7, #32] 800a570: 8c3b ldrh r3, [r7, #32] 800a572: f403 4380 and.w r3, r3, #16384 @ 0x4000 800a576: 2b00 cmp r3, #0 800a578: d01b beq.n 800a5b2 800a57a: 687a ldr r2, [r7, #4] 800a57c: 683b ldr r3, [r7, #0] 800a57e: 781b ldrb r3, [r3, #0] 800a580: 009b lsls r3, r3, #2 800a582: 4413 add r3, r2 800a584: 881b ldrh r3, [r3, #0] 800a586: b29b uxth r3, r3 800a588: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a58c: f023 0370 bic.w r3, r3, #112 @ 0x70 800a590: 83fb strh r3, [r7, #30] 800a592: 687a ldr r2, [r7, #4] 800a594: 683b ldr r3, [r7, #0] 800a596: 781b ldrb r3, [r3, #0] 800a598: 009b lsls r3, r3, #2 800a59a: 441a add r2, r3 800a59c: 8bfb ldrh r3, [r7, #30] 800a59e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a5a2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a5a6: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800a5aa: f043 0380 orr.w r3, r3, #128 @ 0x80 800a5ae: b29b uxth r3, r3 800a5b0: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 800a5b2: 687a ldr r2, [r7, #4] 800a5b4: 683b ldr r3, [r7, #0] 800a5b6: 781b ldrb r3, [r3, #0] 800a5b8: 009b lsls r3, r3, #2 800a5ba: 4413 add r3, r2 800a5bc: 881b ldrh r3, [r3, #0] 800a5be: 83bb strh r3, [r7, #28] 800a5c0: 8bbb ldrh r3, [r7, #28] 800a5c2: f003 0340 and.w r3, r3, #64 @ 0x40 800a5c6: 2b00 cmp r3, #0 800a5c8: d01b beq.n 800a602 800a5ca: 687a ldr r2, [r7, #4] 800a5cc: 683b ldr r3, [r7, #0] 800a5ce: 781b ldrb r3, [r3, #0] 800a5d0: 009b lsls r3, r3, #2 800a5d2: 4413 add r3, r2 800a5d4: 881b ldrh r3, [r3, #0] 800a5d6: b29b uxth r3, r3 800a5d8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a5dc: f023 0370 bic.w r3, r3, #112 @ 0x70 800a5e0: 837b strh r3, [r7, #26] 800a5e2: 687a ldr r2, [r7, #4] 800a5e4: 683b ldr r3, [r7, #0] 800a5e6: 781b ldrb r3, [r3, #0] 800a5e8: 009b lsls r3, r3, #2 800a5ea: 441a add r2, r3 800a5ec: 8b7b ldrh r3, [r7, #26] 800a5ee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a5f2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a5f6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a5fa: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800a5fe: b29b uxth r3, r3 800a600: 8013 strh r3, [r2, #0] /* Reset value of the data toggle bits for the endpoint out*/ PCD_TX_DTOG(USBx, ep->num); 800a602: 687a ldr r2, [r7, #4] 800a604: 683b ldr r3, [r7, #0] 800a606: 781b ldrb r3, [r3, #0] 800a608: 009b lsls r3, r3, #2 800a60a: 4413 add r3, r2 800a60c: 881b ldrh r3, [r3, #0] 800a60e: b29b uxth r3, r3 800a610: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a614: f023 0370 bic.w r3, r3, #112 @ 0x70 800a618: 833b strh r3, [r7, #24] 800a61a: 687a ldr r2, [r7, #4] 800a61c: 683b ldr r3, [r7, #0] 800a61e: 781b ldrb r3, [r3, #0] 800a620: 009b lsls r3, r3, #2 800a622: 441a add r2, r3 800a624: 8b3b ldrh r3, [r7, #24] 800a626: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a62a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a62e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a632: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800a636: b29b uxth r3, r3 800a638: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800a63a: 687a ldr r2, [r7, #4] 800a63c: 683b ldr r3, [r7, #0] 800a63e: 781b ldrb r3, [r3, #0] 800a640: 009b lsls r3, r3, #2 800a642: 4413 add r3, r2 800a644: 881b ldrh r3, [r3, #0] 800a646: b29b uxth r3, r3 800a648: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800a64c: f023 0370 bic.w r3, r3, #112 @ 0x70 800a650: 82fb strh r3, [r7, #22] 800a652: 687a ldr r2, [r7, #4] 800a654: 683b ldr r3, [r7, #0] 800a656: 781b ldrb r3, [r3, #0] 800a658: 009b lsls r3, r3, #2 800a65a: 441a add r2, r3 800a65c: 8afb ldrh r3, [r7, #22] 800a65e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a662: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a666: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a66a: f043 0380 orr.w r3, r3, #128 @ 0x80 800a66e: b29b uxth r3, r3 800a670: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 800a672: 687a ldr r2, [r7, #4] 800a674: 683b ldr r3, [r7, #0] 800a676: 781b ldrb r3, [r3, #0] 800a678: 009b lsls r3, r3, #2 800a67a: 4413 add r3, r2 800a67c: 881b ldrh r3, [r3, #0] 800a67e: b29b uxth r3, r3 800a680: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a684: f023 0340 bic.w r3, r3, #64 @ 0x40 800a688: 82bb strh r3, [r7, #20] 800a68a: 687a ldr r2, [r7, #4] 800a68c: 683b ldr r3, [r7, #0] 800a68e: 781b ldrb r3, [r3, #0] 800a690: 009b lsls r3, r3, #2 800a692: 441a add r2, r3 800a694: 8abb ldrh r3, [r7, #20] 800a696: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a69a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a69e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a6a2: f043 0380 orr.w r3, r3, #128 @ 0x80 800a6a6: b29b uxth r3, r3 800a6a8: 8013 strh r3, [r2, #0] 800a6aa: e0a3 b.n 800a7f4 } else { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 800a6ac: 687a ldr r2, [r7, #4] 800a6ae: 683b ldr r3, [r7, #0] 800a6b0: 781b ldrb r3, [r3, #0] 800a6b2: 009b lsls r3, r3, #2 800a6b4: 4413 add r3, r2 800a6b6: 881b ldrh r3, [r3, #0] 800a6b8: 85fb strh r3, [r7, #46] @ 0x2e 800a6ba: 8dfb ldrh r3, [r7, #46] @ 0x2e 800a6bc: f403 4380 and.w r3, r3, #16384 @ 0x4000 800a6c0: 2b00 cmp r3, #0 800a6c2: d01b beq.n 800a6fc 800a6c4: 687a ldr r2, [r7, #4] 800a6c6: 683b ldr r3, [r7, #0] 800a6c8: 781b ldrb r3, [r3, #0] 800a6ca: 009b lsls r3, r3, #2 800a6cc: 4413 add r3, r2 800a6ce: 881b ldrh r3, [r3, #0] 800a6d0: b29b uxth r3, r3 800a6d2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a6d6: f023 0370 bic.w r3, r3, #112 @ 0x70 800a6da: 85bb strh r3, [r7, #44] @ 0x2c 800a6dc: 687a ldr r2, [r7, #4] 800a6de: 683b ldr r3, [r7, #0] 800a6e0: 781b ldrb r3, [r3, #0] 800a6e2: 009b lsls r3, r3, #2 800a6e4: 441a add r2, r3 800a6e6: 8dbb ldrh r3, [r7, #44] @ 0x2c 800a6e8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a6ec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a6f0: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800a6f4: f043 0380 orr.w r3, r3, #128 @ 0x80 800a6f8: b29b uxth r3, r3 800a6fa: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 800a6fc: 687a ldr r2, [r7, #4] 800a6fe: 683b ldr r3, [r7, #0] 800a700: 781b ldrb r3, [r3, #0] 800a702: 009b lsls r3, r3, #2 800a704: 4413 add r3, r2 800a706: 881b ldrh r3, [r3, #0] 800a708: 857b strh r3, [r7, #42] @ 0x2a 800a70a: 8d7b ldrh r3, [r7, #42] @ 0x2a 800a70c: f003 0340 and.w r3, r3, #64 @ 0x40 800a710: 2b00 cmp r3, #0 800a712: d01b beq.n 800a74c 800a714: 687a ldr r2, [r7, #4] 800a716: 683b ldr r3, [r7, #0] 800a718: 781b ldrb r3, [r3, #0] 800a71a: 009b lsls r3, r3, #2 800a71c: 4413 add r3, r2 800a71e: 881b ldrh r3, [r3, #0] 800a720: b29b uxth r3, r3 800a722: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a726: f023 0370 bic.w r3, r3, #112 @ 0x70 800a72a: 853b strh r3, [r7, #40] @ 0x28 800a72c: 687a ldr r2, [r7, #4] 800a72e: 683b ldr r3, [r7, #0] 800a730: 781b ldrb r3, [r3, #0] 800a732: 009b lsls r3, r3, #2 800a734: 441a add r2, r3 800a736: 8d3b ldrh r3, [r7, #40] @ 0x28 800a738: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a73c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a740: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a744: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800a748: b29b uxth r3, r3 800a74a: 8013 strh r3, [r2, #0] PCD_RX_DTOG(USBx, ep->num); 800a74c: 687a ldr r2, [r7, #4] 800a74e: 683b ldr r3, [r7, #0] 800a750: 781b ldrb r3, [r3, #0] 800a752: 009b lsls r3, r3, #2 800a754: 4413 add r3, r2 800a756: 881b ldrh r3, [r3, #0] 800a758: b29b uxth r3, r3 800a75a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a75e: f023 0370 bic.w r3, r3, #112 @ 0x70 800a762: 84fb strh r3, [r7, #38] @ 0x26 800a764: 687a ldr r2, [r7, #4] 800a766: 683b ldr r3, [r7, #0] 800a768: 781b ldrb r3, [r3, #0] 800a76a: 009b lsls r3, r3, #2 800a76c: 441a add r2, r3 800a76e: 8cfb ldrh r3, [r7, #38] @ 0x26 800a770: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a774: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a778: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800a77c: f043 0380 orr.w r3, r3, #128 @ 0x80 800a780: b29b uxth r3, r3 800a782: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint*/ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 800a784: 687a ldr r2, [r7, #4] 800a786: 683b ldr r3, [r7, #0] 800a788: 781b ldrb r3, [r3, #0] 800a78a: 009b lsls r3, r3, #2 800a78c: 4413 add r3, r2 800a78e: 881b ldrh r3, [r3, #0] 800a790: b29b uxth r3, r3 800a792: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a796: f023 0340 bic.w r3, r3, #64 @ 0x40 800a79a: 84bb strh r3, [r7, #36] @ 0x24 800a79c: 687a ldr r2, [r7, #4] 800a79e: 683b ldr r3, [r7, #0] 800a7a0: 781b ldrb r3, [r3, #0] 800a7a2: 009b lsls r3, r3, #2 800a7a4: 441a add r2, r3 800a7a6: 8cbb ldrh r3, [r7, #36] @ 0x24 800a7a8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a7ac: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a7b0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a7b4: f043 0380 orr.w r3, r3, #128 @ 0x80 800a7b8: b29b uxth r3, r3 800a7ba: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800a7bc: 687a ldr r2, [r7, #4] 800a7be: 683b ldr r3, [r7, #0] 800a7c0: 781b ldrb r3, [r3, #0] 800a7c2: 009b lsls r3, r3, #2 800a7c4: 4413 add r3, r2 800a7c6: 881b ldrh r3, [r3, #0] 800a7c8: b29b uxth r3, r3 800a7ca: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800a7ce: f023 0370 bic.w r3, r3, #112 @ 0x70 800a7d2: 847b strh r3, [r7, #34] @ 0x22 800a7d4: 687a ldr r2, [r7, #4] 800a7d6: 683b ldr r3, [r7, #0] 800a7d8: 781b ldrb r3, [r3, #0] 800a7da: 009b lsls r3, r3, #2 800a7dc: 441a add r2, r3 800a7de: 8c7b ldrh r3, [r7, #34] @ 0x22 800a7e0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a7e4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a7e8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a7ec: f043 0380 orr.w r3, r3, #128 @ 0x80 800a7f0: b29b uxth r3, r3 800a7f2: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 800a7f4: 2300 movs r3, #0 } 800a7f6: 4618 mov r0, r3 800a7f8: 3734 adds r7, #52 @ 0x34 800a7fa: 46bd mov sp, r7 800a7fc: bc80 pop {r7} 800a7fe: 4770 bx lr 0800a800 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800a800: b580 push {r7, lr} 800a802: b0c2 sub sp, #264 @ 0x108 800a804: af00 add r7, sp, #0 800a806: f507 7384 add.w r3, r7, #264 @ 0x108 800a80a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a80e: 6018 str r0, [r3, #0] 800a810: f507 7384 add.w r3, r7, #264 @ 0x108 800a814: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a818: 6019 str r1, [r3, #0] uint16_t pmabuffer; uint16_t wEPVal; #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* IN endpoint */ if (ep->is_in == 1U) 800a81a: f507 7384 add.w r3, r7, #264 @ 0x108 800a81e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a822: 681b ldr r3, [r3, #0] 800a824: 785b ldrb r3, [r3, #1] 800a826: 2b01 cmp r3, #1 800a828: f040 86b7 bne.w 800b59a { /*Multi packet transfer*/ if (ep->xfer_len > ep->maxpacket) 800a82c: f507 7384 add.w r3, r7, #264 @ 0x108 800a830: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a834: 681b ldr r3, [r3, #0] 800a836: 699a ldr r2, [r3, #24] 800a838: f507 7384 add.w r3, r7, #264 @ 0x108 800a83c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a840: 681b ldr r3, [r3, #0] 800a842: 691b ldr r3, [r3, #16] 800a844: 429a cmp r2, r3 800a846: d908 bls.n 800a85a { len = ep->maxpacket; 800a848: f507 7384 add.w r3, r7, #264 @ 0x108 800a84c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a850: 681b ldr r3, [r3, #0] 800a852: 691b ldr r3, [r3, #16] 800a854: f8c7 3104 str.w r3, [r7, #260] @ 0x104 800a858: e007 b.n 800a86a } else { len = ep->xfer_len; 800a85a: f507 7384 add.w r3, r7, #264 @ 0x108 800a85e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a862: 681b ldr r3, [r3, #0] 800a864: 699b ldr r3, [r3, #24] 800a866: f8c7 3104 str.w r3, [r7, #260] @ 0x104 } /* configure and validate Tx endpoint */ if (ep->doublebuffer == 0U) 800a86a: f507 7384 add.w r3, r7, #264 @ 0x108 800a86e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a872: 681b ldr r3, [r3, #0] 800a874: 7b1b ldrb r3, [r3, #12] 800a876: 2b00 cmp r3, #0 800a878: d13a bne.n 800a8f0 { USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); 800a87a: f507 7384 add.w r3, r7, #264 @ 0x108 800a87e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a882: 681b ldr r3, [r3, #0] 800a884: 6959 ldr r1, [r3, #20] 800a886: f507 7384 add.w r3, r7, #264 @ 0x108 800a88a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a88e: 681b ldr r3, [r3, #0] 800a890: 88da ldrh r2, [r3, #6] 800a892: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a896: b29b uxth r3, r3 800a898: f507 7084 add.w r0, r7, #264 @ 0x108 800a89c: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a8a0: 6800 ldr r0, [r0, #0] 800a8a2: f001 fc9c bl 800c1de PCD_SET_EP_TX_CNT(USBx, ep->num, len); 800a8a6: f507 7384 add.w r3, r7, #264 @ 0x108 800a8aa: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a8ae: 681b ldr r3, [r3, #0] 800a8b0: 613b str r3, [r7, #16] 800a8b2: f507 7384 add.w r3, r7, #264 @ 0x108 800a8b6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a8ba: 681b ldr r3, [r3, #0] 800a8bc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a8c0: b29b uxth r3, r3 800a8c2: 461a mov r2, r3 800a8c4: 693b ldr r3, [r7, #16] 800a8c6: 4413 add r3, r2 800a8c8: 613b str r3, [r7, #16] 800a8ca: f507 7384 add.w r3, r7, #264 @ 0x108 800a8ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a8d2: 681b ldr r3, [r3, #0] 800a8d4: 781b ldrb r3, [r3, #0] 800a8d6: 011a lsls r2, r3, #4 800a8d8: 693b ldr r3, [r7, #16] 800a8da: 4413 add r3, r2 800a8dc: f203 4304 addw r3, r3, #1028 @ 0x404 800a8e0: 60fb str r3, [r7, #12] 800a8e2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a8e6: b29a uxth r2, r3 800a8e8: 68fb ldr r3, [r7, #12] 800a8ea: 801a strh r2, [r3, #0] 800a8ec: f000 be1f b.w 800b52e } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* double buffer bulk management */ if (ep->type == EP_TYPE_BULK) 800a8f0: f507 7384 add.w r3, r7, #264 @ 0x108 800a8f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a8f8: 681b ldr r3, [r3, #0] 800a8fa: 78db ldrb r3, [r3, #3] 800a8fc: 2b02 cmp r3, #2 800a8fe: f040 8462 bne.w 800b1c6 { if (ep->xfer_len_db > ep->maxpacket) 800a902: f507 7384 add.w r3, r7, #264 @ 0x108 800a906: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a90a: 681b ldr r3, [r3, #0] 800a90c: 6a1a ldr r2, [r3, #32] 800a90e: f507 7384 add.w r3, r7, #264 @ 0x108 800a912: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a916: 681b ldr r3, [r3, #0] 800a918: 691b ldr r3, [r3, #16] 800a91a: 429a cmp r2, r3 800a91c: f240 83df bls.w 800b0de { /* enable double buffer */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 800a920: f507 7384 add.w r3, r7, #264 @ 0x108 800a924: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a928: 681a ldr r2, [r3, #0] 800a92a: f507 7384 add.w r3, r7, #264 @ 0x108 800a92e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a932: 681b ldr r3, [r3, #0] 800a934: 781b ldrb r3, [r3, #0] 800a936: 009b lsls r3, r3, #2 800a938: 4413 add r3, r2 800a93a: 881b ldrh r3, [r3, #0] 800a93c: b29b uxth r3, r3 800a93e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a942: f023 0370 bic.w r3, r3, #112 @ 0x70 800a946: f8a7 3056 strh.w r3, [r7, #86] @ 0x56 800a94a: f507 7384 add.w r3, r7, #264 @ 0x108 800a94e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a952: 681a ldr r2, [r3, #0] 800a954: f507 7384 add.w r3, r7, #264 @ 0x108 800a958: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a95c: 681b ldr r3, [r3, #0] 800a95e: 781b ldrb r3, [r3, #0] 800a960: 009b lsls r3, r3, #2 800a962: 441a add r2, r3 800a964: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56 800a968: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a96c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a970: f443 4301 orr.w r3, r3, #33024 @ 0x8100 800a974: f043 0380 orr.w r3, r3, #128 @ 0x80 800a978: b29b uxth r3, r3 800a97a: 8013 strh r3, [r2, #0] /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 800a97c: f507 7384 add.w r3, r7, #264 @ 0x108 800a980: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a984: 681b ldr r3, [r3, #0] 800a986: 6a1a ldr r2, [r3, #32] 800a988: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a98c: 1ad2 subs r2, r2, r3 800a98e: f507 7384 add.w r3, r7, #264 @ 0x108 800a992: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a996: 681b ldr r3, [r3, #0] 800a998: 621a str r2, [r3, #32] /* Fill the two first buffer in the Buffer0 & Buffer1 */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 800a99a: f507 7384 add.w r3, r7, #264 @ 0x108 800a99e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a9a2: 681a ldr r2, [r3, #0] 800a9a4: f507 7384 add.w r3, r7, #264 @ 0x108 800a9a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a9ac: 681b ldr r3, [r3, #0] 800a9ae: 781b ldrb r3, [r3, #0] 800a9b0: 009b lsls r3, r3, #2 800a9b2: 4413 add r3, r2 800a9b4: 881b ldrh r3, [r3, #0] 800a9b6: b29b uxth r3, r3 800a9b8: f003 0340 and.w r3, r3, #64 @ 0x40 800a9bc: 2b00 cmp r3, #0 800a9be: f000 81c7 beq.w 800ad50 { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 800a9c2: f507 7384 add.w r3, r7, #264 @ 0x108 800a9c6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a9ca: 681b ldr r3, [r3, #0] 800a9cc: 633b str r3, [r7, #48] @ 0x30 800a9ce: f507 7384 add.w r3, r7, #264 @ 0x108 800a9d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a9d6: 681b ldr r3, [r3, #0] 800a9d8: 785b ldrb r3, [r3, #1] 800a9da: 2b00 cmp r3, #0 800a9dc: d177 bne.n 800aace 800a9de: f507 7384 add.w r3, r7, #264 @ 0x108 800a9e2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a9e6: 681b ldr r3, [r3, #0] 800a9e8: 62bb str r3, [r7, #40] @ 0x28 800a9ea: f507 7384 add.w r3, r7, #264 @ 0x108 800a9ee: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a9f2: 681b ldr r3, [r3, #0] 800a9f4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a9f8: b29b uxth r3, r3 800a9fa: 461a mov r2, r3 800a9fc: 6abb ldr r3, [r7, #40] @ 0x28 800a9fe: 4413 add r3, r2 800aa00: 62bb str r3, [r7, #40] @ 0x28 800aa02: f507 7384 add.w r3, r7, #264 @ 0x108 800aa06: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa0a: 681b ldr r3, [r3, #0] 800aa0c: 781b ldrb r3, [r3, #0] 800aa0e: 011a lsls r2, r3, #4 800aa10: 6abb ldr r3, [r7, #40] @ 0x28 800aa12: 4413 add r3, r2 800aa14: f203 430c addw r3, r3, #1036 @ 0x40c 800aa18: 627b str r3, [r7, #36] @ 0x24 800aa1a: 6a7b ldr r3, [r7, #36] @ 0x24 800aa1c: 881b ldrh r3, [r3, #0] 800aa1e: b29b uxth r3, r3 800aa20: f3c3 0309 ubfx r3, r3, #0, #10 800aa24: b29a uxth r2, r3 800aa26: 6a7b ldr r3, [r7, #36] @ 0x24 800aa28: 801a strh r2, [r3, #0] 800aa2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aa2e: 2b3e cmp r3, #62 @ 0x3e 800aa30: d921 bls.n 800aa76 800aa32: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aa36: 095b lsrs r3, r3, #5 800aa38: f8c7 3100 str.w r3, [r7, #256] @ 0x100 800aa3c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aa40: f003 031f and.w r3, r3, #31 800aa44: 2b00 cmp r3, #0 800aa46: d104 bne.n 800aa52 800aa48: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 800aa4c: 3b01 subs r3, #1 800aa4e: f8c7 3100 str.w r3, [r7, #256] @ 0x100 800aa52: 6a7b ldr r3, [r7, #36] @ 0x24 800aa54: 881b ldrh r3, [r3, #0] 800aa56: b29a uxth r2, r3 800aa58: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 800aa5c: b29b uxth r3, r3 800aa5e: 029b lsls r3, r3, #10 800aa60: b29b uxth r3, r3 800aa62: 4313 orrs r3, r2 800aa64: b29b uxth r3, r3 800aa66: ea6f 4343 mvn.w r3, r3, lsl #17 800aa6a: ea6f 4353 mvn.w r3, r3, lsr #17 800aa6e: b29a uxth r2, r3 800aa70: 6a7b ldr r3, [r7, #36] @ 0x24 800aa72: 801a strh r2, [r3, #0] 800aa74: e050 b.n 800ab18 800aa76: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aa7a: 2b00 cmp r3, #0 800aa7c: d10a bne.n 800aa94 800aa7e: 6a7b ldr r3, [r7, #36] @ 0x24 800aa80: 881b ldrh r3, [r3, #0] 800aa82: b29b uxth r3, r3 800aa84: ea6f 4343 mvn.w r3, r3, lsl #17 800aa88: ea6f 4353 mvn.w r3, r3, lsr #17 800aa8c: b29a uxth r2, r3 800aa8e: 6a7b ldr r3, [r7, #36] @ 0x24 800aa90: 801a strh r2, [r3, #0] 800aa92: e041 b.n 800ab18 800aa94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aa98: 085b lsrs r3, r3, #1 800aa9a: f8c7 3100 str.w r3, [r7, #256] @ 0x100 800aa9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aaa2: f003 0301 and.w r3, r3, #1 800aaa6: 2b00 cmp r3, #0 800aaa8: d004 beq.n 800aab4 800aaaa: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 800aaae: 3301 adds r3, #1 800aab0: f8c7 3100 str.w r3, [r7, #256] @ 0x100 800aab4: 6a7b ldr r3, [r7, #36] @ 0x24 800aab6: 881b ldrh r3, [r3, #0] 800aab8: b29a uxth r2, r3 800aaba: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 800aabe: b29b uxth r3, r3 800aac0: 029b lsls r3, r3, #10 800aac2: b29b uxth r3, r3 800aac4: 4313 orrs r3, r2 800aac6: b29a uxth r2, r3 800aac8: 6a7b ldr r3, [r7, #36] @ 0x24 800aaca: 801a strh r2, [r3, #0] 800aacc: e024 b.n 800ab18 800aace: f507 7384 add.w r3, r7, #264 @ 0x108 800aad2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aad6: 681b ldr r3, [r3, #0] 800aad8: 785b ldrb r3, [r3, #1] 800aada: 2b01 cmp r3, #1 800aadc: d11c bne.n 800ab18 800aade: f507 7384 add.w r3, r7, #264 @ 0x108 800aae2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aae6: 681b ldr r3, [r3, #0] 800aae8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800aaec: b29b uxth r3, r3 800aaee: 461a mov r2, r3 800aaf0: 6b3b ldr r3, [r7, #48] @ 0x30 800aaf2: 4413 add r3, r2 800aaf4: 633b str r3, [r7, #48] @ 0x30 800aaf6: f507 7384 add.w r3, r7, #264 @ 0x108 800aafa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aafe: 681b ldr r3, [r3, #0] 800ab00: 781b ldrb r3, [r3, #0] 800ab02: 011a lsls r2, r3, #4 800ab04: 6b3b ldr r3, [r7, #48] @ 0x30 800ab06: 4413 add r3, r2 800ab08: f203 430c addw r3, r3, #1036 @ 0x40c 800ab0c: 62fb str r3, [r7, #44] @ 0x2c 800ab0e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ab12: b29a uxth r2, r3 800ab14: 6afb ldr r3, [r7, #44] @ 0x2c 800ab16: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 800ab18: f507 7384 add.w r3, r7, #264 @ 0x108 800ab1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab20: 681b ldr r3, [r3, #0] 800ab22: 895b ldrh r3, [r3, #10] 800ab24: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800ab28: f507 7384 add.w r3, r7, #264 @ 0x108 800ab2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab30: 681b ldr r3, [r3, #0] 800ab32: 6959 ldr r1, [r3, #20] 800ab34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ab38: b29b uxth r3, r3 800ab3a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800ab3e: f507 7084 add.w r0, r7, #264 @ 0x108 800ab42: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800ab46: 6800 ldr r0, [r0, #0] 800ab48: f001 fb49 bl 800c1de ep->xfer_buff += len; 800ab4c: f507 7384 add.w r3, r7, #264 @ 0x108 800ab50: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab54: 681b ldr r3, [r3, #0] 800ab56: 695a ldr r2, [r3, #20] 800ab58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ab5c: 441a add r2, r3 800ab5e: f507 7384 add.w r3, r7, #264 @ 0x108 800ab62: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab66: 681b ldr r3, [r3, #0] 800ab68: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 800ab6a: f507 7384 add.w r3, r7, #264 @ 0x108 800ab6e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab72: 681b ldr r3, [r3, #0] 800ab74: 6a1a ldr r2, [r3, #32] 800ab76: f507 7384 add.w r3, r7, #264 @ 0x108 800ab7a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab7e: 681b ldr r3, [r3, #0] 800ab80: 691b ldr r3, [r3, #16] 800ab82: 429a cmp r2, r3 800ab84: d90f bls.n 800aba6 { ep->xfer_len_db -= len; 800ab86: f507 7384 add.w r3, r7, #264 @ 0x108 800ab8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab8e: 681b ldr r3, [r3, #0] 800ab90: 6a1a ldr r2, [r3, #32] 800ab92: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ab96: 1ad2 subs r2, r2, r3 800ab98: f507 7384 add.w r3, r7, #264 @ 0x108 800ab9c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aba0: 681b ldr r3, [r3, #0] 800aba2: 621a str r2, [r3, #32] 800aba4: e00e b.n 800abc4 } else { len = ep->xfer_len_db; 800aba6: f507 7384 add.w r3, r7, #264 @ 0x108 800abaa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800abae: 681b ldr r3, [r3, #0] 800abb0: 6a1b ldr r3, [r3, #32] 800abb2: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 800abb6: f507 7384 add.w r3, r7, #264 @ 0x108 800abba: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800abbe: 681b ldr r3, [r3, #0] 800abc0: 2200 movs r2, #0 800abc2: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 800abc4: f507 7384 add.w r3, r7, #264 @ 0x108 800abc8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800abcc: 681b ldr r3, [r3, #0] 800abce: 785b ldrb r3, [r3, #1] 800abd0: 2b00 cmp r3, #0 800abd2: d177 bne.n 800acc4 800abd4: f507 7384 add.w r3, r7, #264 @ 0x108 800abd8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800abdc: 681b ldr r3, [r3, #0] 800abde: 61bb str r3, [r7, #24] 800abe0: f507 7384 add.w r3, r7, #264 @ 0x108 800abe4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800abe8: 681b ldr r3, [r3, #0] 800abea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800abee: b29b uxth r3, r3 800abf0: 461a mov r2, r3 800abf2: 69bb ldr r3, [r7, #24] 800abf4: 4413 add r3, r2 800abf6: 61bb str r3, [r7, #24] 800abf8: f507 7384 add.w r3, r7, #264 @ 0x108 800abfc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ac00: 681b ldr r3, [r3, #0] 800ac02: 781b ldrb r3, [r3, #0] 800ac04: 011a lsls r2, r3, #4 800ac06: 69bb ldr r3, [r7, #24] 800ac08: 4413 add r3, r2 800ac0a: f203 4304 addw r3, r3, #1028 @ 0x404 800ac0e: 617b str r3, [r7, #20] 800ac10: 697b ldr r3, [r7, #20] 800ac12: 881b ldrh r3, [r3, #0] 800ac14: b29b uxth r3, r3 800ac16: f3c3 0309 ubfx r3, r3, #0, #10 800ac1a: b29a uxth r2, r3 800ac1c: 697b ldr r3, [r7, #20] 800ac1e: 801a strh r2, [r3, #0] 800ac20: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac24: 2b3e cmp r3, #62 @ 0x3e 800ac26: d921 bls.n 800ac6c 800ac28: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac2c: 095b lsrs r3, r3, #5 800ac2e: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 800ac32: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac36: f003 031f and.w r3, r3, #31 800ac3a: 2b00 cmp r3, #0 800ac3c: d104 bne.n 800ac48 800ac3e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 800ac42: 3b01 subs r3, #1 800ac44: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 800ac48: 697b ldr r3, [r7, #20] 800ac4a: 881b ldrh r3, [r3, #0] 800ac4c: b29a uxth r2, r3 800ac4e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 800ac52: b29b uxth r3, r3 800ac54: 029b lsls r3, r3, #10 800ac56: b29b uxth r3, r3 800ac58: 4313 orrs r3, r2 800ac5a: b29b uxth r3, r3 800ac5c: ea6f 4343 mvn.w r3, r3, lsl #17 800ac60: ea6f 4353 mvn.w r3, r3, lsr #17 800ac64: b29a uxth r2, r3 800ac66: 697b ldr r3, [r7, #20] 800ac68: 801a strh r2, [r3, #0] 800ac6a: e056 b.n 800ad1a 800ac6c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac70: 2b00 cmp r3, #0 800ac72: d10a bne.n 800ac8a 800ac74: 697b ldr r3, [r7, #20] 800ac76: 881b ldrh r3, [r3, #0] 800ac78: b29b uxth r3, r3 800ac7a: ea6f 4343 mvn.w r3, r3, lsl #17 800ac7e: ea6f 4353 mvn.w r3, r3, lsr #17 800ac82: b29a uxth r2, r3 800ac84: 697b ldr r3, [r7, #20] 800ac86: 801a strh r2, [r3, #0] 800ac88: e047 b.n 800ad1a 800ac8a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac8e: 085b lsrs r3, r3, #1 800ac90: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 800ac94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac98: f003 0301 and.w r3, r3, #1 800ac9c: 2b00 cmp r3, #0 800ac9e: d004 beq.n 800acaa 800aca0: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 800aca4: 3301 adds r3, #1 800aca6: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 800acaa: 697b ldr r3, [r7, #20] 800acac: 881b ldrh r3, [r3, #0] 800acae: b29a uxth r2, r3 800acb0: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 800acb4: b29b uxth r3, r3 800acb6: 029b lsls r3, r3, #10 800acb8: b29b uxth r3, r3 800acba: 4313 orrs r3, r2 800acbc: b29a uxth r2, r3 800acbe: 697b ldr r3, [r7, #20] 800acc0: 801a strh r2, [r3, #0] 800acc2: e02a b.n 800ad1a 800acc4: f507 7384 add.w r3, r7, #264 @ 0x108 800acc8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800accc: 681b ldr r3, [r3, #0] 800acce: 785b ldrb r3, [r3, #1] 800acd0: 2b01 cmp r3, #1 800acd2: d122 bne.n 800ad1a 800acd4: f507 7384 add.w r3, r7, #264 @ 0x108 800acd8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800acdc: 681b ldr r3, [r3, #0] 800acde: 623b str r3, [r7, #32] 800ace0: f507 7384 add.w r3, r7, #264 @ 0x108 800ace4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ace8: 681b ldr r3, [r3, #0] 800acea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800acee: b29b uxth r3, r3 800acf0: 461a mov r2, r3 800acf2: 6a3b ldr r3, [r7, #32] 800acf4: 4413 add r3, r2 800acf6: 623b str r3, [r7, #32] 800acf8: f507 7384 add.w r3, r7, #264 @ 0x108 800acfc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad00: 681b ldr r3, [r3, #0] 800ad02: 781b ldrb r3, [r3, #0] 800ad04: 011a lsls r2, r3, #4 800ad06: 6a3b ldr r3, [r7, #32] 800ad08: 4413 add r3, r2 800ad0a: f203 4304 addw r3, r3, #1028 @ 0x404 800ad0e: 61fb str r3, [r7, #28] 800ad10: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ad14: b29a uxth r2, r3 800ad16: 69fb ldr r3, [r7, #28] 800ad18: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800ad1a: f507 7384 add.w r3, r7, #264 @ 0x108 800ad1e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad22: 681b ldr r3, [r3, #0] 800ad24: 891b ldrh r3, [r3, #8] 800ad26: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800ad2a: f507 7384 add.w r3, r7, #264 @ 0x108 800ad2e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad32: 681b ldr r3, [r3, #0] 800ad34: 6959 ldr r1, [r3, #20] 800ad36: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ad3a: b29b uxth r3, r3 800ad3c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800ad40: f507 7084 add.w r0, r7, #264 @ 0x108 800ad44: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800ad48: 6800 ldr r0, [r0, #0] 800ad4a: f001 fa48 bl 800c1de 800ad4e: e3ee b.n 800b52e } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 800ad50: f507 7384 add.w r3, r7, #264 @ 0x108 800ad54: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad58: 681b ldr r3, [r3, #0] 800ad5a: 785b ldrb r3, [r3, #1] 800ad5c: 2b00 cmp r3, #0 800ad5e: d177 bne.n 800ae50 800ad60: f507 7384 add.w r3, r7, #264 @ 0x108 800ad64: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ad68: 681b ldr r3, [r3, #0] 800ad6a: 64bb str r3, [r7, #72] @ 0x48 800ad6c: f507 7384 add.w r3, r7, #264 @ 0x108 800ad70: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ad74: 681b ldr r3, [r3, #0] 800ad76: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800ad7a: b29b uxth r3, r3 800ad7c: 461a mov r2, r3 800ad7e: 6cbb ldr r3, [r7, #72] @ 0x48 800ad80: 4413 add r3, r2 800ad82: 64bb str r3, [r7, #72] @ 0x48 800ad84: f507 7384 add.w r3, r7, #264 @ 0x108 800ad88: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad8c: 681b ldr r3, [r3, #0] 800ad8e: 781b ldrb r3, [r3, #0] 800ad90: 011a lsls r2, r3, #4 800ad92: 6cbb ldr r3, [r7, #72] @ 0x48 800ad94: 4413 add r3, r2 800ad96: f203 4304 addw r3, r3, #1028 @ 0x404 800ad9a: 647b str r3, [r7, #68] @ 0x44 800ad9c: 6c7b ldr r3, [r7, #68] @ 0x44 800ad9e: 881b ldrh r3, [r3, #0] 800ada0: b29b uxth r3, r3 800ada2: f3c3 0309 ubfx r3, r3, #0, #10 800ada6: b29a uxth r2, r3 800ada8: 6c7b ldr r3, [r7, #68] @ 0x44 800adaa: 801a strh r2, [r3, #0] 800adac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800adb0: 2b3e cmp r3, #62 @ 0x3e 800adb2: d921 bls.n 800adf8 800adb4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800adb8: 095b lsrs r3, r3, #5 800adba: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 800adbe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800adc2: f003 031f and.w r3, r3, #31 800adc6: 2b00 cmp r3, #0 800adc8: d104 bne.n 800add4 800adca: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 800adce: 3b01 subs r3, #1 800add0: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 800add4: 6c7b ldr r3, [r7, #68] @ 0x44 800add6: 881b ldrh r3, [r3, #0] 800add8: b29a uxth r2, r3 800adda: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 800adde: b29b uxth r3, r3 800ade0: 029b lsls r3, r3, #10 800ade2: b29b uxth r3, r3 800ade4: 4313 orrs r3, r2 800ade6: b29b uxth r3, r3 800ade8: ea6f 4343 mvn.w r3, r3, lsl #17 800adec: ea6f 4353 mvn.w r3, r3, lsr #17 800adf0: b29a uxth r2, r3 800adf2: 6c7b ldr r3, [r7, #68] @ 0x44 800adf4: 801a strh r2, [r3, #0] 800adf6: e056 b.n 800aea6 800adf8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800adfc: 2b00 cmp r3, #0 800adfe: d10a bne.n 800ae16 800ae00: 6c7b ldr r3, [r7, #68] @ 0x44 800ae02: 881b ldrh r3, [r3, #0] 800ae04: b29b uxth r3, r3 800ae06: ea6f 4343 mvn.w r3, r3, lsl #17 800ae0a: ea6f 4353 mvn.w r3, r3, lsr #17 800ae0e: b29a uxth r2, r3 800ae10: 6c7b ldr r3, [r7, #68] @ 0x44 800ae12: 801a strh r2, [r3, #0] 800ae14: e047 b.n 800aea6 800ae16: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ae1a: 085b lsrs r3, r3, #1 800ae1c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 800ae20: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ae24: f003 0301 and.w r3, r3, #1 800ae28: 2b00 cmp r3, #0 800ae2a: d004 beq.n 800ae36 800ae2c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 800ae30: 3301 adds r3, #1 800ae32: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 800ae36: 6c7b ldr r3, [r7, #68] @ 0x44 800ae38: 881b ldrh r3, [r3, #0] 800ae3a: b29a uxth r2, r3 800ae3c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 800ae40: b29b uxth r3, r3 800ae42: 029b lsls r3, r3, #10 800ae44: b29b uxth r3, r3 800ae46: 4313 orrs r3, r2 800ae48: b29a uxth r2, r3 800ae4a: 6c7b ldr r3, [r7, #68] @ 0x44 800ae4c: 801a strh r2, [r3, #0] 800ae4e: e02a b.n 800aea6 800ae50: f507 7384 add.w r3, r7, #264 @ 0x108 800ae54: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ae58: 681b ldr r3, [r3, #0] 800ae5a: 785b ldrb r3, [r3, #1] 800ae5c: 2b01 cmp r3, #1 800ae5e: d122 bne.n 800aea6 800ae60: f507 7384 add.w r3, r7, #264 @ 0x108 800ae64: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ae68: 681b ldr r3, [r3, #0] 800ae6a: 653b str r3, [r7, #80] @ 0x50 800ae6c: f507 7384 add.w r3, r7, #264 @ 0x108 800ae70: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ae74: 681b ldr r3, [r3, #0] 800ae76: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800ae7a: b29b uxth r3, r3 800ae7c: 461a mov r2, r3 800ae7e: 6d3b ldr r3, [r7, #80] @ 0x50 800ae80: 4413 add r3, r2 800ae82: 653b str r3, [r7, #80] @ 0x50 800ae84: f507 7384 add.w r3, r7, #264 @ 0x108 800ae88: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ae8c: 681b ldr r3, [r3, #0] 800ae8e: 781b ldrb r3, [r3, #0] 800ae90: 011a lsls r2, r3, #4 800ae92: 6d3b ldr r3, [r7, #80] @ 0x50 800ae94: 4413 add r3, r2 800ae96: f203 4304 addw r3, r3, #1028 @ 0x404 800ae9a: 64fb str r3, [r7, #76] @ 0x4c 800ae9c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aea0: b29a uxth r2, r3 800aea2: 6cfb ldr r3, [r7, #76] @ 0x4c 800aea4: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800aea6: f507 7384 add.w r3, r7, #264 @ 0x108 800aeaa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aeae: 681b ldr r3, [r3, #0] 800aeb0: 891b ldrh r3, [r3, #8] 800aeb2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800aeb6: f507 7384 add.w r3, r7, #264 @ 0x108 800aeba: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aebe: 681b ldr r3, [r3, #0] 800aec0: 6959 ldr r1, [r3, #20] 800aec2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aec6: b29b uxth r3, r3 800aec8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800aecc: f507 7084 add.w r0, r7, #264 @ 0x108 800aed0: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800aed4: 6800 ldr r0, [r0, #0] 800aed6: f001 f982 bl 800c1de ep->xfer_buff += len; 800aeda: f507 7384 add.w r3, r7, #264 @ 0x108 800aede: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aee2: 681b ldr r3, [r3, #0] 800aee4: 695a ldr r2, [r3, #20] 800aee6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aeea: 441a add r2, r3 800aeec: f507 7384 add.w r3, r7, #264 @ 0x108 800aef0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aef4: 681b ldr r3, [r3, #0] 800aef6: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 800aef8: f507 7384 add.w r3, r7, #264 @ 0x108 800aefc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af00: 681b ldr r3, [r3, #0] 800af02: 6a1a ldr r2, [r3, #32] 800af04: f507 7384 add.w r3, r7, #264 @ 0x108 800af08: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af0c: 681b ldr r3, [r3, #0] 800af0e: 691b ldr r3, [r3, #16] 800af10: 429a cmp r2, r3 800af12: d90f bls.n 800af34 { ep->xfer_len_db -= len; 800af14: f507 7384 add.w r3, r7, #264 @ 0x108 800af18: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af1c: 681b ldr r3, [r3, #0] 800af1e: 6a1a ldr r2, [r3, #32] 800af20: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800af24: 1ad2 subs r2, r2, r3 800af26: f507 7384 add.w r3, r7, #264 @ 0x108 800af2a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af2e: 681b ldr r3, [r3, #0] 800af30: 621a str r2, [r3, #32] 800af32: e00e b.n 800af52 } else { len = ep->xfer_len_db; 800af34: f507 7384 add.w r3, r7, #264 @ 0x108 800af38: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af3c: 681b ldr r3, [r3, #0] 800af3e: 6a1b ldr r3, [r3, #32] 800af40: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 800af44: f507 7384 add.w r3, r7, #264 @ 0x108 800af48: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af4c: 681b ldr r3, [r3, #0] 800af4e: 2200 movs r2, #0 800af50: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 800af52: f507 7384 add.w r3, r7, #264 @ 0x108 800af56: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800af5a: 681b ldr r3, [r3, #0] 800af5c: 643b str r3, [r7, #64] @ 0x40 800af5e: f507 7384 add.w r3, r7, #264 @ 0x108 800af62: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af66: 681b ldr r3, [r3, #0] 800af68: 785b ldrb r3, [r3, #1] 800af6a: 2b00 cmp r3, #0 800af6c: d177 bne.n 800b05e 800af6e: f507 7384 add.w r3, r7, #264 @ 0x108 800af72: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800af76: 681b ldr r3, [r3, #0] 800af78: 63bb str r3, [r7, #56] @ 0x38 800af7a: f507 7384 add.w r3, r7, #264 @ 0x108 800af7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800af82: 681b ldr r3, [r3, #0] 800af84: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800af88: b29b uxth r3, r3 800af8a: 461a mov r2, r3 800af8c: 6bbb ldr r3, [r7, #56] @ 0x38 800af8e: 4413 add r3, r2 800af90: 63bb str r3, [r7, #56] @ 0x38 800af92: f507 7384 add.w r3, r7, #264 @ 0x108 800af96: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af9a: 681b ldr r3, [r3, #0] 800af9c: 781b ldrb r3, [r3, #0] 800af9e: 011a lsls r2, r3, #4 800afa0: 6bbb ldr r3, [r7, #56] @ 0x38 800afa2: 4413 add r3, r2 800afa4: f203 430c addw r3, r3, #1036 @ 0x40c 800afa8: 637b str r3, [r7, #52] @ 0x34 800afaa: 6b7b ldr r3, [r7, #52] @ 0x34 800afac: 881b ldrh r3, [r3, #0] 800afae: b29b uxth r3, r3 800afb0: f3c3 0309 ubfx r3, r3, #0, #10 800afb4: b29a uxth r2, r3 800afb6: 6b7b ldr r3, [r7, #52] @ 0x34 800afb8: 801a strh r2, [r3, #0] 800afba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800afbe: 2b3e cmp r3, #62 @ 0x3e 800afc0: d921 bls.n 800b006 800afc2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800afc6: 095b lsrs r3, r3, #5 800afc8: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800afcc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800afd0: f003 031f and.w r3, r3, #31 800afd4: 2b00 cmp r3, #0 800afd6: d104 bne.n 800afe2 800afd8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800afdc: 3b01 subs r3, #1 800afde: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800afe2: 6b7b ldr r3, [r7, #52] @ 0x34 800afe4: 881b ldrh r3, [r3, #0] 800afe6: b29a uxth r2, r3 800afe8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800afec: b29b uxth r3, r3 800afee: 029b lsls r3, r3, #10 800aff0: b29b uxth r3, r3 800aff2: 4313 orrs r3, r2 800aff4: b29b uxth r3, r3 800aff6: ea6f 4343 mvn.w r3, r3, lsl #17 800affa: ea6f 4353 mvn.w r3, r3, lsr #17 800affe: b29a uxth r2, r3 800b000: 6b7b ldr r3, [r7, #52] @ 0x34 800b002: 801a strh r2, [r3, #0] 800b004: e050 b.n 800b0a8 800b006: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b00a: 2b00 cmp r3, #0 800b00c: d10a bne.n 800b024 800b00e: 6b7b ldr r3, [r7, #52] @ 0x34 800b010: 881b ldrh r3, [r3, #0] 800b012: b29b uxth r3, r3 800b014: ea6f 4343 mvn.w r3, r3, lsl #17 800b018: ea6f 4353 mvn.w r3, r3, lsr #17 800b01c: b29a uxth r2, r3 800b01e: 6b7b ldr r3, [r7, #52] @ 0x34 800b020: 801a strh r2, [r3, #0] 800b022: e041 b.n 800b0a8 800b024: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b028: 085b lsrs r3, r3, #1 800b02a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800b02e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b032: f003 0301 and.w r3, r3, #1 800b036: 2b00 cmp r3, #0 800b038: d004 beq.n 800b044 800b03a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800b03e: 3301 adds r3, #1 800b040: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800b044: 6b7b ldr r3, [r7, #52] @ 0x34 800b046: 881b ldrh r3, [r3, #0] 800b048: b29a uxth r2, r3 800b04a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800b04e: b29b uxth r3, r3 800b050: 029b lsls r3, r3, #10 800b052: b29b uxth r3, r3 800b054: 4313 orrs r3, r2 800b056: b29a uxth r2, r3 800b058: 6b7b ldr r3, [r7, #52] @ 0x34 800b05a: 801a strh r2, [r3, #0] 800b05c: e024 b.n 800b0a8 800b05e: f507 7384 add.w r3, r7, #264 @ 0x108 800b062: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b066: 681b ldr r3, [r3, #0] 800b068: 785b ldrb r3, [r3, #1] 800b06a: 2b01 cmp r3, #1 800b06c: d11c bne.n 800b0a8 800b06e: f507 7384 add.w r3, r7, #264 @ 0x108 800b072: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b076: 681b ldr r3, [r3, #0] 800b078: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b07c: b29b uxth r3, r3 800b07e: 461a mov r2, r3 800b080: 6c3b ldr r3, [r7, #64] @ 0x40 800b082: 4413 add r3, r2 800b084: 643b str r3, [r7, #64] @ 0x40 800b086: f507 7384 add.w r3, r7, #264 @ 0x108 800b08a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b08e: 681b ldr r3, [r3, #0] 800b090: 781b ldrb r3, [r3, #0] 800b092: 011a lsls r2, r3, #4 800b094: 6c3b ldr r3, [r7, #64] @ 0x40 800b096: 4413 add r3, r2 800b098: f203 430c addw r3, r3, #1036 @ 0x40c 800b09c: 63fb str r3, [r7, #60] @ 0x3c 800b09e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b0a2: b29a uxth r2, r3 800b0a4: 6bfb ldr r3, [r7, #60] @ 0x3c 800b0a6: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 800b0a8: f507 7384 add.w r3, r7, #264 @ 0x108 800b0ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b0b0: 681b ldr r3, [r3, #0] 800b0b2: 895b ldrh r3, [r3, #10] 800b0b4: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800b0b8: f507 7384 add.w r3, r7, #264 @ 0x108 800b0bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b0c0: 681b ldr r3, [r3, #0] 800b0c2: 6959 ldr r1, [r3, #20] 800b0c4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b0c8: b29b uxth r3, r3 800b0ca: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800b0ce: f507 7084 add.w r0, r7, #264 @ 0x108 800b0d2: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800b0d6: 6800 ldr r0, [r0, #0] 800b0d8: f001 f881 bl 800c1de 800b0dc: e227 b.n 800b52e } } /* auto Switch to single buffer mode when transfer xfer_len_db; 800b0de: f507 7384 add.w r3, r7, #264 @ 0x108 800b0e2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b0e6: 681b ldr r3, [r3, #0] 800b0e8: 6a1b ldr r3, [r3, #32] 800b0ea: f8c7 3104 str.w r3, [r7, #260] @ 0x104 /* disable double buffer mode for Bulk endpoint */ PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num); 800b0ee: f507 7384 add.w r3, r7, #264 @ 0x108 800b0f2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b0f6: 681a ldr r2, [r3, #0] 800b0f8: f507 7384 add.w r3, r7, #264 @ 0x108 800b0fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b100: 681b ldr r3, [r3, #0] 800b102: 781b ldrb r3, [r3, #0] 800b104: 009b lsls r3, r3, #2 800b106: 4413 add r3, r2 800b108: 881b ldrh r3, [r3, #0] 800b10a: b29b uxth r3, r3 800b10c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 800b110: f023 0370 bic.w r3, r3, #112 @ 0x70 800b114: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 800b118: f507 7384 add.w r3, r7, #264 @ 0x108 800b11c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b120: 681a ldr r2, [r3, #0] 800b122: f507 7384 add.w r3, r7, #264 @ 0x108 800b126: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b12a: 681b ldr r3, [r3, #0] 800b12c: 781b ldrb r3, [r3, #0] 800b12e: 009b lsls r3, r3, #2 800b130: 441a add r2, r3 800b132: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 800b136: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b13a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b13e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b142: f043 0380 orr.w r3, r3, #128 @ 0x80 800b146: b29b uxth r3, r3 800b148: 8013 strh r3, [r2, #0] /* Set Tx count with nbre of byte to be transmitted */ PCD_SET_EP_TX_CNT(USBx, ep->num, len); 800b14a: f507 7384 add.w r3, r7, #264 @ 0x108 800b14e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b152: 681b ldr r3, [r3, #0] 800b154: 65fb str r3, [r7, #92] @ 0x5c 800b156: f507 7384 add.w r3, r7, #264 @ 0x108 800b15a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b15e: 681b ldr r3, [r3, #0] 800b160: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b164: b29b uxth r3, r3 800b166: 461a mov r2, r3 800b168: 6dfb ldr r3, [r7, #92] @ 0x5c 800b16a: 4413 add r3, r2 800b16c: 65fb str r3, [r7, #92] @ 0x5c 800b16e: f507 7384 add.w r3, r7, #264 @ 0x108 800b172: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b176: 681b ldr r3, [r3, #0] 800b178: 781b ldrb r3, [r3, #0] 800b17a: 011a lsls r2, r3, #4 800b17c: 6dfb ldr r3, [r7, #92] @ 0x5c 800b17e: 4413 add r3, r2 800b180: f203 4304 addw r3, r3, #1028 @ 0x404 800b184: 65bb str r3, [r7, #88] @ 0x58 800b186: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b18a: b29a uxth r2, r3 800b18c: 6dbb ldr r3, [r7, #88] @ 0x58 800b18e: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800b190: f507 7384 add.w r3, r7, #264 @ 0x108 800b194: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b198: 681b ldr r3, [r3, #0] 800b19a: 891b ldrh r3, [r3, #8] 800b19c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800b1a0: f507 7384 add.w r3, r7, #264 @ 0x108 800b1a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b1a8: 681b ldr r3, [r3, #0] 800b1aa: 6959 ldr r1, [r3, #20] 800b1ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b1b0: b29b uxth r3, r3 800b1b2: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800b1b6: f507 7084 add.w r0, r7, #264 @ 0x108 800b1ba: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800b1be: 6800 ldr r0, [r0, #0] 800b1c0: f001 f80d bl 800c1de 800b1c4: e1b3 b.n 800b52e } } else /* manage isochronous double buffer IN mode */ { /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 800b1c6: f507 7384 add.w r3, r7, #264 @ 0x108 800b1ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b1ce: 681b ldr r3, [r3, #0] 800b1d0: 6a1a ldr r2, [r3, #32] 800b1d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b1d6: 1ad2 subs r2, r2, r3 800b1d8: f507 7384 add.w r3, r7, #264 @ 0x108 800b1dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b1e0: 681b ldr r3, [r3, #0] 800b1e2: 621a str r2, [r3, #32] /* Fill the data buffer */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 800b1e4: f507 7384 add.w r3, r7, #264 @ 0x108 800b1e8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b1ec: 681a ldr r2, [r3, #0] 800b1ee: f507 7384 add.w r3, r7, #264 @ 0x108 800b1f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b1f6: 681b ldr r3, [r3, #0] 800b1f8: 781b ldrb r3, [r3, #0] 800b1fa: 009b lsls r3, r3, #2 800b1fc: 4413 add r3, r2 800b1fe: 881b ldrh r3, [r3, #0] 800b200: b29b uxth r3, r3 800b202: f003 0340 and.w r3, r3, #64 @ 0x40 800b206: 2b00 cmp r3, #0 800b208: f000 80c6 beq.w 800b398 { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 800b20c: f507 7384 add.w r3, r7, #264 @ 0x108 800b210: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b214: 681b ldr r3, [r3, #0] 800b216: 673b str r3, [r7, #112] @ 0x70 800b218: f507 7384 add.w r3, r7, #264 @ 0x108 800b21c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b220: 681b ldr r3, [r3, #0] 800b222: 785b ldrb r3, [r3, #1] 800b224: 2b00 cmp r3, #0 800b226: d177 bne.n 800b318 800b228: f507 7384 add.w r3, r7, #264 @ 0x108 800b22c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b230: 681b ldr r3, [r3, #0] 800b232: 66bb str r3, [r7, #104] @ 0x68 800b234: f507 7384 add.w r3, r7, #264 @ 0x108 800b238: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b23c: 681b ldr r3, [r3, #0] 800b23e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b242: b29b uxth r3, r3 800b244: 461a mov r2, r3 800b246: 6ebb ldr r3, [r7, #104] @ 0x68 800b248: 4413 add r3, r2 800b24a: 66bb str r3, [r7, #104] @ 0x68 800b24c: f507 7384 add.w r3, r7, #264 @ 0x108 800b250: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b254: 681b ldr r3, [r3, #0] 800b256: 781b ldrb r3, [r3, #0] 800b258: 011a lsls r2, r3, #4 800b25a: 6ebb ldr r3, [r7, #104] @ 0x68 800b25c: 4413 add r3, r2 800b25e: f203 430c addw r3, r3, #1036 @ 0x40c 800b262: 667b str r3, [r7, #100] @ 0x64 800b264: 6e7b ldr r3, [r7, #100] @ 0x64 800b266: 881b ldrh r3, [r3, #0] 800b268: b29b uxth r3, r3 800b26a: f3c3 0309 ubfx r3, r3, #0, #10 800b26e: b29a uxth r2, r3 800b270: 6e7b ldr r3, [r7, #100] @ 0x64 800b272: 801a strh r2, [r3, #0] 800b274: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b278: 2b3e cmp r3, #62 @ 0x3e 800b27a: d921 bls.n 800b2c0 800b27c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b280: 095b lsrs r3, r3, #5 800b282: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800b286: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b28a: f003 031f and.w r3, r3, #31 800b28e: 2b00 cmp r3, #0 800b290: d104 bne.n 800b29c 800b292: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800b296: 3b01 subs r3, #1 800b298: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800b29c: 6e7b ldr r3, [r7, #100] @ 0x64 800b29e: 881b ldrh r3, [r3, #0] 800b2a0: b29a uxth r2, r3 800b2a2: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800b2a6: b29b uxth r3, r3 800b2a8: 029b lsls r3, r3, #10 800b2aa: b29b uxth r3, r3 800b2ac: 4313 orrs r3, r2 800b2ae: b29b uxth r3, r3 800b2b0: ea6f 4343 mvn.w r3, r3, lsl #17 800b2b4: ea6f 4353 mvn.w r3, r3, lsr #17 800b2b8: b29a uxth r2, r3 800b2ba: 6e7b ldr r3, [r7, #100] @ 0x64 800b2bc: 801a strh r2, [r3, #0] 800b2be: e050 b.n 800b362 800b2c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b2c4: 2b00 cmp r3, #0 800b2c6: d10a bne.n 800b2de 800b2c8: 6e7b ldr r3, [r7, #100] @ 0x64 800b2ca: 881b ldrh r3, [r3, #0] 800b2cc: b29b uxth r3, r3 800b2ce: ea6f 4343 mvn.w r3, r3, lsl #17 800b2d2: ea6f 4353 mvn.w r3, r3, lsr #17 800b2d6: b29a uxth r2, r3 800b2d8: 6e7b ldr r3, [r7, #100] @ 0x64 800b2da: 801a strh r2, [r3, #0] 800b2dc: e041 b.n 800b362 800b2de: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b2e2: 085b lsrs r3, r3, #1 800b2e4: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800b2e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b2ec: f003 0301 and.w r3, r3, #1 800b2f0: 2b00 cmp r3, #0 800b2f2: d004 beq.n 800b2fe 800b2f4: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800b2f8: 3301 adds r3, #1 800b2fa: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800b2fe: 6e7b ldr r3, [r7, #100] @ 0x64 800b300: 881b ldrh r3, [r3, #0] 800b302: b29a uxth r2, r3 800b304: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800b308: b29b uxth r3, r3 800b30a: 029b lsls r3, r3, #10 800b30c: b29b uxth r3, r3 800b30e: 4313 orrs r3, r2 800b310: b29a uxth r2, r3 800b312: 6e7b ldr r3, [r7, #100] @ 0x64 800b314: 801a strh r2, [r3, #0] 800b316: e024 b.n 800b362 800b318: f507 7384 add.w r3, r7, #264 @ 0x108 800b31c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b320: 681b ldr r3, [r3, #0] 800b322: 785b ldrb r3, [r3, #1] 800b324: 2b01 cmp r3, #1 800b326: d11c bne.n 800b362 800b328: f507 7384 add.w r3, r7, #264 @ 0x108 800b32c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b330: 681b ldr r3, [r3, #0] 800b332: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b336: b29b uxth r3, r3 800b338: 461a mov r2, r3 800b33a: 6f3b ldr r3, [r7, #112] @ 0x70 800b33c: 4413 add r3, r2 800b33e: 673b str r3, [r7, #112] @ 0x70 800b340: f507 7384 add.w r3, r7, #264 @ 0x108 800b344: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b348: 681b ldr r3, [r3, #0] 800b34a: 781b ldrb r3, [r3, #0] 800b34c: 011a lsls r2, r3, #4 800b34e: 6f3b ldr r3, [r7, #112] @ 0x70 800b350: 4413 add r3, r2 800b352: f203 430c addw r3, r3, #1036 @ 0x40c 800b356: 66fb str r3, [r7, #108] @ 0x6c 800b358: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b35c: b29a uxth r2, r3 800b35e: 6efb ldr r3, [r7, #108] @ 0x6c 800b360: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 800b362: f507 7384 add.w r3, r7, #264 @ 0x108 800b366: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b36a: 681b ldr r3, [r3, #0] 800b36c: 895b ldrh r3, [r3, #10] 800b36e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800b372: f507 7384 add.w r3, r7, #264 @ 0x108 800b376: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b37a: 681b ldr r3, [r3, #0] 800b37c: 6959 ldr r1, [r3, #20] 800b37e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b382: b29b uxth r3, r3 800b384: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800b388: f507 7084 add.w r0, r7, #264 @ 0x108 800b38c: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800b390: 6800 ldr r0, [r0, #0] 800b392: f000 ff24 bl 800c1de 800b396: e0ca b.n 800b52e } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 800b398: f507 7384 add.w r3, r7, #264 @ 0x108 800b39c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b3a0: 681b ldr r3, [r3, #0] 800b3a2: 785b ldrb r3, [r3, #1] 800b3a4: 2b00 cmp r3, #0 800b3a6: d177 bne.n 800b498 800b3a8: f507 7384 add.w r3, r7, #264 @ 0x108 800b3ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b3b0: 681b ldr r3, [r3, #0] 800b3b2: 67fb str r3, [r7, #124] @ 0x7c 800b3b4: f507 7384 add.w r3, r7, #264 @ 0x108 800b3b8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b3bc: 681b ldr r3, [r3, #0] 800b3be: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b3c2: b29b uxth r3, r3 800b3c4: 461a mov r2, r3 800b3c6: 6ffb ldr r3, [r7, #124] @ 0x7c 800b3c8: 4413 add r3, r2 800b3ca: 67fb str r3, [r7, #124] @ 0x7c 800b3cc: f507 7384 add.w r3, r7, #264 @ 0x108 800b3d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b3d4: 681b ldr r3, [r3, #0] 800b3d6: 781b ldrb r3, [r3, #0] 800b3d8: 011a lsls r2, r3, #4 800b3da: 6ffb ldr r3, [r7, #124] @ 0x7c 800b3dc: 4413 add r3, r2 800b3de: f203 4304 addw r3, r3, #1028 @ 0x404 800b3e2: 67bb str r3, [r7, #120] @ 0x78 800b3e4: 6fbb ldr r3, [r7, #120] @ 0x78 800b3e6: 881b ldrh r3, [r3, #0] 800b3e8: b29b uxth r3, r3 800b3ea: f3c3 0309 ubfx r3, r3, #0, #10 800b3ee: b29a uxth r2, r3 800b3f0: 6fbb ldr r3, [r7, #120] @ 0x78 800b3f2: 801a strh r2, [r3, #0] 800b3f4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b3f8: 2b3e cmp r3, #62 @ 0x3e 800b3fa: d921 bls.n 800b440 800b3fc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b400: 095b lsrs r3, r3, #5 800b402: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800b406: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b40a: f003 031f and.w r3, r3, #31 800b40e: 2b00 cmp r3, #0 800b410: d104 bne.n 800b41c 800b412: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800b416: 3b01 subs r3, #1 800b418: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800b41c: 6fbb ldr r3, [r7, #120] @ 0x78 800b41e: 881b ldrh r3, [r3, #0] 800b420: b29a uxth r2, r3 800b422: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800b426: b29b uxth r3, r3 800b428: 029b lsls r3, r3, #10 800b42a: b29b uxth r3, r3 800b42c: 4313 orrs r3, r2 800b42e: b29b uxth r3, r3 800b430: ea6f 4343 mvn.w r3, r3, lsl #17 800b434: ea6f 4353 mvn.w r3, r3, lsr #17 800b438: b29a uxth r2, r3 800b43a: 6fbb ldr r3, [r7, #120] @ 0x78 800b43c: 801a strh r2, [r3, #0] 800b43e: e05c b.n 800b4fa 800b440: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b444: 2b00 cmp r3, #0 800b446: d10a bne.n 800b45e 800b448: 6fbb ldr r3, [r7, #120] @ 0x78 800b44a: 881b ldrh r3, [r3, #0] 800b44c: b29b uxth r3, r3 800b44e: ea6f 4343 mvn.w r3, r3, lsl #17 800b452: ea6f 4353 mvn.w r3, r3, lsr #17 800b456: b29a uxth r2, r3 800b458: 6fbb ldr r3, [r7, #120] @ 0x78 800b45a: 801a strh r2, [r3, #0] 800b45c: e04d b.n 800b4fa 800b45e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b462: 085b lsrs r3, r3, #1 800b464: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800b468: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b46c: f003 0301 and.w r3, r3, #1 800b470: 2b00 cmp r3, #0 800b472: d004 beq.n 800b47e 800b474: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800b478: 3301 adds r3, #1 800b47a: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800b47e: 6fbb ldr r3, [r7, #120] @ 0x78 800b480: 881b ldrh r3, [r3, #0] 800b482: b29a uxth r2, r3 800b484: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800b488: b29b uxth r3, r3 800b48a: 029b lsls r3, r3, #10 800b48c: b29b uxth r3, r3 800b48e: 4313 orrs r3, r2 800b490: b29a uxth r2, r3 800b492: 6fbb ldr r3, [r7, #120] @ 0x78 800b494: 801a strh r2, [r3, #0] 800b496: e030 b.n 800b4fa 800b498: f507 7384 add.w r3, r7, #264 @ 0x108 800b49c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b4a0: 681b ldr r3, [r3, #0] 800b4a2: 785b ldrb r3, [r3, #1] 800b4a4: 2b01 cmp r3, #1 800b4a6: d128 bne.n 800b4fa 800b4a8: f507 7384 add.w r3, r7, #264 @ 0x108 800b4ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b4b0: 681b ldr r3, [r3, #0] 800b4b2: f8c7 3084 str.w r3, [r7, #132] @ 0x84 800b4b6: f507 7384 add.w r3, r7, #264 @ 0x108 800b4ba: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b4be: 681b ldr r3, [r3, #0] 800b4c0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b4c4: b29b uxth r3, r3 800b4c6: 461a mov r2, r3 800b4c8: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 800b4cc: 4413 add r3, r2 800b4ce: f8c7 3084 str.w r3, [r7, #132] @ 0x84 800b4d2: f507 7384 add.w r3, r7, #264 @ 0x108 800b4d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b4da: 681b ldr r3, [r3, #0] 800b4dc: 781b ldrb r3, [r3, #0] 800b4de: 011a lsls r2, r3, #4 800b4e0: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 800b4e4: 4413 add r3, r2 800b4e6: f203 4304 addw r3, r3, #1028 @ 0x404 800b4ea: f8c7 3080 str.w r3, [r7, #128] @ 0x80 800b4ee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b4f2: b29a uxth r2, r3 800b4f4: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 800b4f8: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800b4fa: f507 7384 add.w r3, r7, #264 @ 0x108 800b4fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b502: 681b ldr r3, [r3, #0] 800b504: 891b ldrh r3, [r3, #8] 800b506: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800b50a: f507 7384 add.w r3, r7, #264 @ 0x108 800b50e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b512: 681b ldr r3, [r3, #0] 800b514: 6959 ldr r1, [r3, #20] 800b516: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b51a: b29b uxth r3, r3 800b51c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800b520: f507 7084 add.w r0, r7, #264 @ 0x108 800b524: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800b528: 6800 ldr r0, [r0, #0] 800b52a: f000 fe58 bl 800c1de } } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); 800b52e: f507 7384 add.w r3, r7, #264 @ 0x108 800b532: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b536: 681a ldr r2, [r3, #0] 800b538: f507 7384 add.w r3, r7, #264 @ 0x108 800b53c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b540: 681b ldr r3, [r3, #0] 800b542: 781b ldrb r3, [r3, #0] 800b544: 009b lsls r3, r3, #2 800b546: 4413 add r3, r2 800b548: 881b ldrh r3, [r3, #0] 800b54a: b29b uxth r3, r3 800b54c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800b550: f023 0340 bic.w r3, r3, #64 @ 0x40 800b554: 817b strh r3, [r7, #10] 800b556: 897b ldrh r3, [r7, #10] 800b558: f083 0310 eor.w r3, r3, #16 800b55c: 817b strh r3, [r7, #10] 800b55e: 897b ldrh r3, [r7, #10] 800b560: f083 0320 eor.w r3, r3, #32 800b564: 817b strh r3, [r7, #10] 800b566: f507 7384 add.w r3, r7, #264 @ 0x108 800b56a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b56e: 681a ldr r2, [r3, #0] 800b570: f507 7384 add.w r3, r7, #264 @ 0x108 800b574: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b578: 681b ldr r3, [r3, #0] 800b57a: 781b ldrb r3, [r3, #0] 800b57c: 009b lsls r3, r3, #2 800b57e: 441a add r2, r3 800b580: 897b ldrh r3, [r7, #10] 800b582: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b586: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b58a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b58e: f043 0380 orr.w r3, r3, #128 @ 0x80 800b592: b29b uxth r3, r3 800b594: 8013 strh r3, [r2, #0] 800b596: f000 bcde b.w 800bf56 } else /* OUT endpoint */ { if (ep->doublebuffer == 0U) 800b59a: f507 7384 add.w r3, r7, #264 @ 0x108 800b59e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b5a2: 681b ldr r3, [r3, #0] 800b5a4: 7b1b ldrb r3, [r3, #12] 800b5a6: 2b00 cmp r3, #0 800b5a8: f040 80bb bne.w 800b722 { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 800b5ac: f507 7384 add.w r3, r7, #264 @ 0x108 800b5b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b5b4: 681b ldr r3, [r3, #0] 800b5b6: 699a ldr r2, [r3, #24] 800b5b8: f507 7384 add.w r3, r7, #264 @ 0x108 800b5bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b5c0: 681b ldr r3, [r3, #0] 800b5c2: 691b ldr r3, [r3, #16] 800b5c4: 429a cmp r2, r3 800b5c6: d917 bls.n 800b5f8 { len = ep->maxpacket; 800b5c8: f507 7384 add.w r3, r7, #264 @ 0x108 800b5cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b5d0: 681b ldr r3, [r3, #0] 800b5d2: 691b ldr r3, [r3, #16] 800b5d4: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 800b5d8: f507 7384 add.w r3, r7, #264 @ 0x108 800b5dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b5e0: 681b ldr r3, [r3, #0] 800b5e2: 699a ldr r2, [r3, #24] 800b5e4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b5e8: 1ad2 subs r2, r2, r3 800b5ea: f507 7384 add.w r3, r7, #264 @ 0x108 800b5ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b5f2: 681b ldr r3, [r3, #0] 800b5f4: 619a str r2, [r3, #24] 800b5f6: e00e b.n 800b616 } else { len = ep->xfer_len; 800b5f8: f507 7384 add.w r3, r7, #264 @ 0x108 800b5fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b600: 681b ldr r3, [r3, #0] 800b602: 699b ldr r3, [r3, #24] 800b604: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 800b608: f507 7384 add.w r3, r7, #264 @ 0x108 800b60c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b610: 681b ldr r3, [r3, #0] 800b612: 2200 movs r2, #0 800b614: 619a str r2, [r3, #24] } /* configure and validate Rx endpoint */ PCD_SET_EP_RX_CNT(USBx, ep->num, len); 800b616: f507 7384 add.w r3, r7, #264 @ 0x108 800b61a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b61e: 681b ldr r3, [r3, #0] 800b620: f8c7 3090 str.w r3, [r7, #144] @ 0x90 800b624: f507 7384 add.w r3, r7, #264 @ 0x108 800b628: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b62c: 681b ldr r3, [r3, #0] 800b62e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b632: b29b uxth r3, r3 800b634: 461a mov r2, r3 800b636: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 800b63a: 4413 add r3, r2 800b63c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 800b640: f507 7384 add.w r3, r7, #264 @ 0x108 800b644: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b648: 681b ldr r3, [r3, #0] 800b64a: 781b ldrb r3, [r3, #0] 800b64c: 011a lsls r2, r3, #4 800b64e: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 800b652: 4413 add r3, r2 800b654: f203 430c addw r3, r3, #1036 @ 0x40c 800b658: f8c7 308c str.w r3, [r7, #140] @ 0x8c 800b65c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800b660: 881b ldrh r3, [r3, #0] 800b662: b29b uxth r3, r3 800b664: f3c3 0309 ubfx r3, r3, #0, #10 800b668: b29a uxth r2, r3 800b66a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800b66e: 801a strh r2, [r3, #0] 800b670: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b674: 2b3e cmp r3, #62 @ 0x3e 800b676: d924 bls.n 800b6c2 800b678: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b67c: 095b lsrs r3, r3, #5 800b67e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800b682: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b686: f003 031f and.w r3, r3, #31 800b68a: 2b00 cmp r3, #0 800b68c: d104 bne.n 800b698 800b68e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800b692: 3b01 subs r3, #1 800b694: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800b698: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800b69c: 881b ldrh r3, [r3, #0] 800b69e: b29a uxth r2, r3 800b6a0: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800b6a4: b29b uxth r3, r3 800b6a6: 029b lsls r3, r3, #10 800b6a8: b29b uxth r3, r3 800b6aa: 4313 orrs r3, r2 800b6ac: b29b uxth r3, r3 800b6ae: ea6f 4343 mvn.w r3, r3, lsl #17 800b6b2: ea6f 4353 mvn.w r3, r3, lsr #17 800b6b6: b29a uxth r2, r3 800b6b8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800b6bc: 801a strh r2, [r3, #0] 800b6be: f000 bc10 b.w 800bee2 800b6c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b6c6: 2b00 cmp r3, #0 800b6c8: d10c bne.n 800b6e4 800b6ca: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800b6ce: 881b ldrh r3, [r3, #0] 800b6d0: b29b uxth r3, r3 800b6d2: ea6f 4343 mvn.w r3, r3, lsl #17 800b6d6: ea6f 4353 mvn.w r3, r3, lsr #17 800b6da: b29a uxth r2, r3 800b6dc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800b6e0: 801a strh r2, [r3, #0] 800b6e2: e3fe b.n 800bee2 800b6e4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b6e8: 085b lsrs r3, r3, #1 800b6ea: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800b6ee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b6f2: f003 0301 and.w r3, r3, #1 800b6f6: 2b00 cmp r3, #0 800b6f8: d004 beq.n 800b704 800b6fa: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800b6fe: 3301 adds r3, #1 800b700: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800b704: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800b708: 881b ldrh r3, [r3, #0] 800b70a: b29a uxth r2, r3 800b70c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800b710: b29b uxth r3, r3 800b712: 029b lsls r3, r3, #10 800b714: b29b uxth r3, r3 800b716: 4313 orrs r3, r2 800b718: b29a uxth r2, r3 800b71a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800b71e: 801a strh r2, [r3, #0] 800b720: e3df b.n 800bee2 #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */ /* Set the Double buffer counter */ if (ep->type == EP_TYPE_BULK) 800b722: f507 7384 add.w r3, r7, #264 @ 0x108 800b726: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b72a: 681b ldr r3, [r3, #0] 800b72c: 78db ldrb r3, [r3, #3] 800b72e: 2b02 cmp r3, #2 800b730: f040 8218 bne.w 800bb64 { PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); 800b734: f507 7384 add.w r3, r7, #264 @ 0x108 800b738: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b73c: 681b ldr r3, [r3, #0] 800b73e: 785b ldrb r3, [r3, #1] 800b740: 2b00 cmp r3, #0 800b742: f040 809d bne.w 800b880 800b746: f507 7384 add.w r3, r7, #264 @ 0x108 800b74a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b74e: 681b ldr r3, [r3, #0] 800b750: f8c7 30ac str.w r3, [r7, #172] @ 0xac 800b754: f507 7384 add.w r3, r7, #264 @ 0x108 800b758: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b75c: 681b ldr r3, [r3, #0] 800b75e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b762: b29b uxth r3, r3 800b764: 461a mov r2, r3 800b766: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 800b76a: 4413 add r3, r2 800b76c: f8c7 30ac str.w r3, [r7, #172] @ 0xac 800b770: f507 7384 add.w r3, r7, #264 @ 0x108 800b774: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b778: 681b ldr r3, [r3, #0] 800b77a: 781b ldrb r3, [r3, #0] 800b77c: 011a lsls r2, r3, #4 800b77e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 800b782: 4413 add r3, r2 800b784: f203 4304 addw r3, r3, #1028 @ 0x404 800b788: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 800b78c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800b790: 881b ldrh r3, [r3, #0] 800b792: b29b uxth r3, r3 800b794: f3c3 0309 ubfx r3, r3, #0, #10 800b798: b29a uxth r2, r3 800b79a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800b79e: 801a strh r2, [r3, #0] 800b7a0: f507 7384 add.w r3, r7, #264 @ 0x108 800b7a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b7a8: 681b ldr r3, [r3, #0] 800b7aa: 691b ldr r3, [r3, #16] 800b7ac: 2b3e cmp r3, #62 @ 0x3e 800b7ae: d92b bls.n 800b808 800b7b0: f507 7384 add.w r3, r7, #264 @ 0x108 800b7b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b7b8: 681b ldr r3, [r3, #0] 800b7ba: 691b ldr r3, [r3, #16] 800b7bc: 095b lsrs r3, r3, #5 800b7be: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800b7c2: f507 7384 add.w r3, r7, #264 @ 0x108 800b7c6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b7ca: 681b ldr r3, [r3, #0] 800b7cc: 691b ldr r3, [r3, #16] 800b7ce: f003 031f and.w r3, r3, #31 800b7d2: 2b00 cmp r3, #0 800b7d4: d104 bne.n 800b7e0 800b7d6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800b7da: 3b01 subs r3, #1 800b7dc: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800b7e0: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800b7e4: 881b ldrh r3, [r3, #0] 800b7e6: b29a uxth r2, r3 800b7e8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800b7ec: b29b uxth r3, r3 800b7ee: 029b lsls r3, r3, #10 800b7f0: b29b uxth r3, r3 800b7f2: 4313 orrs r3, r2 800b7f4: b29b uxth r3, r3 800b7f6: ea6f 4343 mvn.w r3, r3, lsl #17 800b7fa: ea6f 4353 mvn.w r3, r3, lsr #17 800b7fe: b29a uxth r2, r3 800b800: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800b804: 801a strh r2, [r3, #0] 800b806: e070 b.n 800b8ea 800b808: f507 7384 add.w r3, r7, #264 @ 0x108 800b80c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b810: 681b ldr r3, [r3, #0] 800b812: 691b ldr r3, [r3, #16] 800b814: 2b00 cmp r3, #0 800b816: d10c bne.n 800b832 800b818: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800b81c: 881b ldrh r3, [r3, #0] 800b81e: b29b uxth r3, r3 800b820: ea6f 4343 mvn.w r3, r3, lsl #17 800b824: ea6f 4353 mvn.w r3, r3, lsr #17 800b828: b29a uxth r2, r3 800b82a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800b82e: 801a strh r2, [r3, #0] 800b830: e05b b.n 800b8ea 800b832: f507 7384 add.w r3, r7, #264 @ 0x108 800b836: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b83a: 681b ldr r3, [r3, #0] 800b83c: 691b ldr r3, [r3, #16] 800b83e: 085b lsrs r3, r3, #1 800b840: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800b844: f507 7384 add.w r3, r7, #264 @ 0x108 800b848: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b84c: 681b ldr r3, [r3, #0] 800b84e: 691b ldr r3, [r3, #16] 800b850: f003 0301 and.w r3, r3, #1 800b854: 2b00 cmp r3, #0 800b856: d004 beq.n 800b862 800b858: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800b85c: 3301 adds r3, #1 800b85e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800b862: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800b866: 881b ldrh r3, [r3, #0] 800b868: b29a uxth r2, r3 800b86a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800b86e: b29b uxth r3, r3 800b870: 029b lsls r3, r3, #10 800b872: b29b uxth r3, r3 800b874: 4313 orrs r3, r2 800b876: b29a uxth r2, r3 800b878: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800b87c: 801a strh r2, [r3, #0] 800b87e: e034 b.n 800b8ea 800b880: f507 7384 add.w r3, r7, #264 @ 0x108 800b884: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b888: 681b ldr r3, [r3, #0] 800b88a: 785b ldrb r3, [r3, #1] 800b88c: 2b01 cmp r3, #1 800b88e: d12c bne.n 800b8ea 800b890: f507 7384 add.w r3, r7, #264 @ 0x108 800b894: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b898: 681b ldr r3, [r3, #0] 800b89a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 800b89e: f507 7384 add.w r3, r7, #264 @ 0x108 800b8a2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b8a6: 681b ldr r3, [r3, #0] 800b8a8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b8ac: b29b uxth r3, r3 800b8ae: 461a mov r2, r3 800b8b0: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 800b8b4: 4413 add r3, r2 800b8b6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 800b8ba: f507 7384 add.w r3, r7, #264 @ 0x108 800b8be: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b8c2: 681b ldr r3, [r3, #0] 800b8c4: 781b ldrb r3, [r3, #0] 800b8c6: 011a lsls r2, r3, #4 800b8c8: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 800b8cc: 4413 add r3, r2 800b8ce: f203 4304 addw r3, r3, #1028 @ 0x404 800b8d2: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 800b8d6: f507 7384 add.w r3, r7, #264 @ 0x108 800b8da: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b8de: 681b ldr r3, [r3, #0] 800b8e0: 691b ldr r3, [r3, #16] 800b8e2: b29a uxth r2, r3 800b8e4: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0 800b8e8: 801a strh r2, [r3, #0] 800b8ea: f507 7384 add.w r3, r7, #264 @ 0x108 800b8ee: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b8f2: 681b ldr r3, [r3, #0] 800b8f4: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 800b8f8: f507 7384 add.w r3, r7, #264 @ 0x108 800b8fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b900: 681b ldr r3, [r3, #0] 800b902: 785b ldrb r3, [r3, #1] 800b904: 2b00 cmp r3, #0 800b906: f040 809d bne.w 800ba44 800b90a: f507 7384 add.w r3, r7, #264 @ 0x108 800b90e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b912: 681b ldr r3, [r3, #0] 800b914: f8c7 309c str.w r3, [r7, #156] @ 0x9c 800b918: f507 7384 add.w r3, r7, #264 @ 0x108 800b91c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b920: 681b ldr r3, [r3, #0] 800b922: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b926: b29b uxth r3, r3 800b928: 461a mov r2, r3 800b92a: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 800b92e: 4413 add r3, r2 800b930: f8c7 309c str.w r3, [r7, #156] @ 0x9c 800b934: f507 7384 add.w r3, r7, #264 @ 0x108 800b938: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b93c: 681b ldr r3, [r3, #0] 800b93e: 781b ldrb r3, [r3, #0] 800b940: 011a lsls r2, r3, #4 800b942: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 800b946: 4413 add r3, r2 800b948: f203 430c addw r3, r3, #1036 @ 0x40c 800b94c: f8c7 3098 str.w r3, [r7, #152] @ 0x98 800b950: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800b954: 881b ldrh r3, [r3, #0] 800b956: b29b uxth r3, r3 800b958: f3c3 0309 ubfx r3, r3, #0, #10 800b95c: b29a uxth r2, r3 800b95e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800b962: 801a strh r2, [r3, #0] 800b964: f507 7384 add.w r3, r7, #264 @ 0x108 800b968: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b96c: 681b ldr r3, [r3, #0] 800b96e: 691b ldr r3, [r3, #16] 800b970: 2b3e cmp r3, #62 @ 0x3e 800b972: d92b bls.n 800b9cc 800b974: f507 7384 add.w r3, r7, #264 @ 0x108 800b978: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b97c: 681b ldr r3, [r3, #0] 800b97e: 691b ldr r3, [r3, #16] 800b980: 095b lsrs r3, r3, #5 800b982: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800b986: f507 7384 add.w r3, r7, #264 @ 0x108 800b98a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b98e: 681b ldr r3, [r3, #0] 800b990: 691b ldr r3, [r3, #16] 800b992: f003 031f and.w r3, r3, #31 800b996: 2b00 cmp r3, #0 800b998: d104 bne.n 800b9a4 800b99a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800b99e: 3b01 subs r3, #1 800b9a0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800b9a4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800b9a8: 881b ldrh r3, [r3, #0] 800b9aa: b29a uxth r2, r3 800b9ac: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800b9b0: b29b uxth r3, r3 800b9b2: 029b lsls r3, r3, #10 800b9b4: b29b uxth r3, r3 800b9b6: 4313 orrs r3, r2 800b9b8: b29b uxth r3, r3 800b9ba: ea6f 4343 mvn.w r3, r3, lsl #17 800b9be: ea6f 4353 mvn.w r3, r3, lsr #17 800b9c2: b29a uxth r2, r3 800b9c4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800b9c8: 801a strh r2, [r3, #0] 800b9ca: e069 b.n 800baa0 800b9cc: f507 7384 add.w r3, r7, #264 @ 0x108 800b9d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b9d4: 681b ldr r3, [r3, #0] 800b9d6: 691b ldr r3, [r3, #16] 800b9d8: 2b00 cmp r3, #0 800b9da: d10c bne.n 800b9f6 800b9dc: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800b9e0: 881b ldrh r3, [r3, #0] 800b9e2: b29b uxth r3, r3 800b9e4: ea6f 4343 mvn.w r3, r3, lsl #17 800b9e8: ea6f 4353 mvn.w r3, r3, lsr #17 800b9ec: b29a uxth r2, r3 800b9ee: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800b9f2: 801a strh r2, [r3, #0] 800b9f4: e054 b.n 800baa0 800b9f6: f507 7384 add.w r3, r7, #264 @ 0x108 800b9fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b9fe: 681b ldr r3, [r3, #0] 800ba00: 691b ldr r3, [r3, #16] 800ba02: 085b lsrs r3, r3, #1 800ba04: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800ba08: f507 7384 add.w r3, r7, #264 @ 0x108 800ba0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ba10: 681b ldr r3, [r3, #0] 800ba12: 691b ldr r3, [r3, #16] 800ba14: f003 0301 and.w r3, r3, #1 800ba18: 2b00 cmp r3, #0 800ba1a: d004 beq.n 800ba26 800ba1c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800ba20: 3301 adds r3, #1 800ba22: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800ba26: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800ba2a: 881b ldrh r3, [r3, #0] 800ba2c: b29a uxth r2, r3 800ba2e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800ba32: b29b uxth r3, r3 800ba34: 029b lsls r3, r3, #10 800ba36: b29b uxth r3, r3 800ba38: 4313 orrs r3, r2 800ba3a: b29a uxth r2, r3 800ba3c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800ba40: 801a strh r2, [r3, #0] 800ba42: e02d b.n 800baa0 800ba44: f507 7384 add.w r3, r7, #264 @ 0x108 800ba48: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ba4c: 681b ldr r3, [r3, #0] 800ba4e: 785b ldrb r3, [r3, #1] 800ba50: 2b01 cmp r3, #1 800ba52: d125 bne.n 800baa0 800ba54: f507 7384 add.w r3, r7, #264 @ 0x108 800ba58: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ba5c: 681b ldr r3, [r3, #0] 800ba5e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800ba62: b29b uxth r3, r3 800ba64: 461a mov r2, r3 800ba66: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 800ba6a: 4413 add r3, r2 800ba6c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 800ba70: f507 7384 add.w r3, r7, #264 @ 0x108 800ba74: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ba78: 681b ldr r3, [r3, #0] 800ba7a: 781b ldrb r3, [r3, #0] 800ba7c: 011a lsls r2, r3, #4 800ba7e: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 800ba82: 4413 add r3, r2 800ba84: f203 430c addw r3, r3, #1036 @ 0x40c 800ba88: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 800ba8c: f507 7384 add.w r3, r7, #264 @ 0x108 800ba90: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ba94: 681b ldr r3, [r3, #0] 800ba96: 691b ldr r3, [r3, #16] 800ba98: b29a uxth r2, r3 800ba9a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 800ba9e: 801a strh r2, [r3, #0] /* Coming from ISR */ if (ep->xfer_count != 0U) 800baa0: f507 7384 add.w r3, r7, #264 @ 0x108 800baa4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800baa8: 681b ldr r3, [r3, #0] 800baaa: 69db ldr r3, [r3, #28] 800baac: 2b00 cmp r3, #0 800baae: f000 8218 beq.w 800bee2 { /* update last value to check if there is blocking state */ wEPVal = PCD_GET_ENDPOINT(USBx, ep->num); 800bab2: f507 7384 add.w r3, r7, #264 @ 0x108 800bab6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800baba: 681a ldr r2, [r3, #0] 800babc: f507 7384 add.w r3, r7, #264 @ 0x108 800bac0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bac4: 681b ldr r3, [r3, #0] 800bac6: 781b ldrb r3, [r3, #0] 800bac8: 009b lsls r3, r3, #2 800baca: 4413 add r3, r2 800bacc: 881b ldrh r3, [r3, #0] 800bace: f8a7 3096 strh.w r3, [r7, #150] @ 0x96 /*Blocking State */ if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 800bad2: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800bad6: f403 4380 and.w r3, r3, #16384 @ 0x4000 800bada: 2b00 cmp r3, #0 800badc: d005 beq.n 800baea 800bade: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800bae2: f003 0340 and.w r3, r3, #64 @ 0x40 800bae6: 2b00 cmp r3, #0 800bae8: d10d bne.n 800bb06 (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 800baea: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800baee: f403 4380 and.w r3, r3, #16384 @ 0x4000 if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 800baf2: 2b00 cmp r3, #0 800baf4: f040 81f5 bne.w 800bee2 (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 800baf8: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800bafc: f003 0340 and.w r3, r3, #64 @ 0x40 800bb00: 2b00 cmp r3, #0 800bb02: f040 81ee bne.w 800bee2 { PCD_FREE_USER_BUFFER(USBx, ep->num, 0U); 800bb06: f507 7384 add.w r3, r7, #264 @ 0x108 800bb0a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bb0e: 681a ldr r2, [r3, #0] 800bb10: f507 7384 add.w r3, r7, #264 @ 0x108 800bb14: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bb18: 681b ldr r3, [r3, #0] 800bb1a: 781b ldrb r3, [r3, #0] 800bb1c: 009b lsls r3, r3, #2 800bb1e: 4413 add r3, r2 800bb20: 881b ldrh r3, [r3, #0] 800bb22: b29b uxth r3, r3 800bb24: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800bb28: f023 0370 bic.w r3, r3, #112 @ 0x70 800bb2c: f8a7 3094 strh.w r3, [r7, #148] @ 0x94 800bb30: f507 7384 add.w r3, r7, #264 @ 0x108 800bb34: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bb38: 681a ldr r2, [r3, #0] 800bb3a: f507 7384 add.w r3, r7, #264 @ 0x108 800bb3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bb42: 681b ldr r3, [r3, #0] 800bb44: 781b ldrb r3, [r3, #0] 800bb46: 009b lsls r3, r3, #2 800bb48: 441a add r2, r3 800bb4a: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94 800bb4e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800bb52: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800bb56: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800bb5a: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800bb5e: b29b uxth r3, r3 800bb60: 8013 strh r3, [r2, #0] 800bb62: e1be b.n 800bee2 } } } /* iso out double */ else if (ep->type == EP_TYPE_ISOC) 800bb64: f507 7384 add.w r3, r7, #264 @ 0x108 800bb68: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bb6c: 681b ldr r3, [r3, #0] 800bb6e: 78db ldrb r3, [r3, #3] 800bb70: 2b01 cmp r3, #1 800bb72: f040 81b4 bne.w 800bede { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 800bb76: f507 7384 add.w r3, r7, #264 @ 0x108 800bb7a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bb7e: 681b ldr r3, [r3, #0] 800bb80: 699a ldr r2, [r3, #24] 800bb82: f507 7384 add.w r3, r7, #264 @ 0x108 800bb86: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bb8a: 681b ldr r3, [r3, #0] 800bb8c: 691b ldr r3, [r3, #16] 800bb8e: 429a cmp r2, r3 800bb90: d917 bls.n 800bbc2 { len = ep->maxpacket; 800bb92: f507 7384 add.w r3, r7, #264 @ 0x108 800bb96: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bb9a: 681b ldr r3, [r3, #0] 800bb9c: 691b ldr r3, [r3, #16] 800bb9e: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 800bba2: f507 7384 add.w r3, r7, #264 @ 0x108 800bba6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bbaa: 681b ldr r3, [r3, #0] 800bbac: 699a ldr r2, [r3, #24] 800bbae: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bbb2: 1ad2 subs r2, r2, r3 800bbb4: f507 7384 add.w r3, r7, #264 @ 0x108 800bbb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bbbc: 681b ldr r3, [r3, #0] 800bbbe: 619a str r2, [r3, #24] 800bbc0: e00e b.n 800bbe0 } else { len = ep->xfer_len; 800bbc2: f507 7384 add.w r3, r7, #264 @ 0x108 800bbc6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bbca: 681b ldr r3, [r3, #0] 800bbcc: 699b ldr r3, [r3, #24] 800bbce: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 800bbd2: f507 7384 add.w r3, r7, #264 @ 0x108 800bbd6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bbda: 681b ldr r3, [r3, #0] 800bbdc: 2200 movs r2, #0 800bbde: 619a str r2, [r3, #24] } PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); 800bbe0: f507 7384 add.w r3, r7, #264 @ 0x108 800bbe4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bbe8: 681b ldr r3, [r3, #0] 800bbea: 785b ldrb r3, [r3, #1] 800bbec: 2b00 cmp r3, #0 800bbee: f040 8085 bne.w 800bcfc 800bbf2: f507 7384 add.w r3, r7, #264 @ 0x108 800bbf6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bbfa: 681b ldr r3, [r3, #0] 800bbfc: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 800bc00: f507 7384 add.w r3, r7, #264 @ 0x108 800bc04: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bc08: 681b ldr r3, [r3, #0] 800bc0a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800bc0e: b29b uxth r3, r3 800bc10: 461a mov r2, r3 800bc12: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 800bc16: 4413 add r3, r2 800bc18: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 800bc1c: f507 7384 add.w r3, r7, #264 @ 0x108 800bc20: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bc24: 681b ldr r3, [r3, #0] 800bc26: 781b ldrb r3, [r3, #0] 800bc28: 011a lsls r2, r3, #4 800bc2a: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 800bc2e: 4413 add r3, r2 800bc30: f203 4304 addw r3, r3, #1028 @ 0x404 800bc34: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 800bc38: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800bc3c: 881b ldrh r3, [r3, #0] 800bc3e: b29b uxth r3, r3 800bc40: f3c3 0309 ubfx r3, r3, #0, #10 800bc44: b29a uxth r2, r3 800bc46: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800bc4a: 801a strh r2, [r3, #0] 800bc4c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bc50: 2b3e cmp r3, #62 @ 0x3e 800bc52: d923 bls.n 800bc9c 800bc54: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bc58: 095b lsrs r3, r3, #5 800bc5a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800bc5e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bc62: f003 031f and.w r3, r3, #31 800bc66: 2b00 cmp r3, #0 800bc68: d104 bne.n 800bc74 800bc6a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800bc6e: 3b01 subs r3, #1 800bc70: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800bc74: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800bc78: 881b ldrh r3, [r3, #0] 800bc7a: b29a uxth r2, r3 800bc7c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800bc80: b29b uxth r3, r3 800bc82: 029b lsls r3, r3, #10 800bc84: b29b uxth r3, r3 800bc86: 4313 orrs r3, r2 800bc88: b29b uxth r3, r3 800bc8a: ea6f 4343 mvn.w r3, r3, lsl #17 800bc8e: ea6f 4353 mvn.w r3, r3, lsr #17 800bc92: b29a uxth r2, r3 800bc94: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800bc98: 801a strh r2, [r3, #0] 800bc9a: e060 b.n 800bd5e 800bc9c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bca0: 2b00 cmp r3, #0 800bca2: d10c bne.n 800bcbe 800bca4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800bca8: 881b ldrh r3, [r3, #0] 800bcaa: b29b uxth r3, r3 800bcac: ea6f 4343 mvn.w r3, r3, lsl #17 800bcb0: ea6f 4353 mvn.w r3, r3, lsr #17 800bcb4: b29a uxth r2, r3 800bcb6: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800bcba: 801a strh r2, [r3, #0] 800bcbc: e04f b.n 800bd5e 800bcbe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bcc2: 085b lsrs r3, r3, #1 800bcc4: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800bcc8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bccc: f003 0301 and.w r3, r3, #1 800bcd0: 2b00 cmp r3, #0 800bcd2: d004 beq.n 800bcde 800bcd4: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800bcd8: 3301 adds r3, #1 800bcda: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800bcde: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800bce2: 881b ldrh r3, [r3, #0] 800bce4: b29a uxth r2, r3 800bce6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800bcea: b29b uxth r3, r3 800bcec: 029b lsls r3, r3, #10 800bcee: b29b uxth r3, r3 800bcf0: 4313 orrs r3, r2 800bcf2: b29a uxth r2, r3 800bcf4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800bcf8: 801a strh r2, [r3, #0] 800bcfa: e030 b.n 800bd5e 800bcfc: f507 7384 add.w r3, r7, #264 @ 0x108 800bd00: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bd04: 681b ldr r3, [r3, #0] 800bd06: 785b ldrb r3, [r3, #1] 800bd08: 2b01 cmp r3, #1 800bd0a: d128 bne.n 800bd5e 800bd0c: f507 7384 add.w r3, r7, #264 @ 0x108 800bd10: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bd14: 681b ldr r3, [r3, #0] 800bd16: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 800bd1a: f507 7384 add.w r3, r7, #264 @ 0x108 800bd1e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bd22: 681b ldr r3, [r3, #0] 800bd24: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800bd28: b29b uxth r3, r3 800bd2a: 461a mov r2, r3 800bd2c: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 800bd30: 4413 add r3, r2 800bd32: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 800bd36: f507 7384 add.w r3, r7, #264 @ 0x108 800bd3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bd3e: 681b ldr r3, [r3, #0] 800bd40: 781b ldrb r3, [r3, #0] 800bd42: 011a lsls r2, r3, #4 800bd44: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 800bd48: 4413 add r3, r2 800bd4a: f203 4304 addw r3, r3, #1028 @ 0x404 800bd4e: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 800bd52: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bd56: b29a uxth r2, r3 800bd58: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0 800bd5c: 801a strh r2, [r3, #0] 800bd5e: f507 7384 add.w r3, r7, #264 @ 0x108 800bd62: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bd66: 681b ldr r3, [r3, #0] 800bd68: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 800bd6c: f507 7384 add.w r3, r7, #264 @ 0x108 800bd70: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bd74: 681b ldr r3, [r3, #0] 800bd76: 785b ldrb r3, [r3, #1] 800bd78: 2b00 cmp r3, #0 800bd7a: f040 8085 bne.w 800be88 800bd7e: f507 7384 add.w r3, r7, #264 @ 0x108 800bd82: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bd86: 681b ldr r3, [r3, #0] 800bd88: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 800bd8c: f507 7384 add.w r3, r7, #264 @ 0x108 800bd90: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bd94: 681b ldr r3, [r3, #0] 800bd96: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800bd9a: b29b uxth r3, r3 800bd9c: 461a mov r2, r3 800bd9e: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 800bda2: 4413 add r3, r2 800bda4: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 800bda8: f507 7384 add.w r3, r7, #264 @ 0x108 800bdac: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bdb0: 681b ldr r3, [r3, #0] 800bdb2: 781b ldrb r3, [r3, #0] 800bdb4: 011a lsls r2, r3, #4 800bdb6: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 800bdba: 4413 add r3, r2 800bdbc: f203 430c addw r3, r3, #1036 @ 0x40c 800bdc0: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 800bdc4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800bdc8: 881b ldrh r3, [r3, #0] 800bdca: b29b uxth r3, r3 800bdcc: f3c3 0309 ubfx r3, r3, #0, #10 800bdd0: b29a uxth r2, r3 800bdd2: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800bdd6: 801a strh r2, [r3, #0] 800bdd8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bddc: 2b3e cmp r3, #62 @ 0x3e 800bdde: d923 bls.n 800be28 800bde0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bde4: 095b lsrs r3, r3, #5 800bde6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800bdea: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bdee: f003 031f and.w r3, r3, #31 800bdf2: 2b00 cmp r3, #0 800bdf4: d104 bne.n 800be00 800bdf6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800bdfa: 3b01 subs r3, #1 800bdfc: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800be00: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800be04: 881b ldrh r3, [r3, #0] 800be06: b29a uxth r2, r3 800be08: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800be0c: b29b uxth r3, r3 800be0e: 029b lsls r3, r3, #10 800be10: b29b uxth r3, r3 800be12: 4313 orrs r3, r2 800be14: b29b uxth r3, r3 800be16: ea6f 4343 mvn.w r3, r3, lsl #17 800be1a: ea6f 4353 mvn.w r3, r3, lsr #17 800be1e: b29a uxth r2, r3 800be20: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800be24: 801a strh r2, [r3, #0] 800be26: e05c b.n 800bee2 800be28: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800be2c: 2b00 cmp r3, #0 800be2e: d10c bne.n 800be4a 800be30: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800be34: 881b ldrh r3, [r3, #0] 800be36: b29b uxth r3, r3 800be38: ea6f 4343 mvn.w r3, r3, lsl #17 800be3c: ea6f 4353 mvn.w r3, r3, lsr #17 800be40: b29a uxth r2, r3 800be42: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800be46: 801a strh r2, [r3, #0] 800be48: e04b b.n 800bee2 800be4a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800be4e: 085b lsrs r3, r3, #1 800be50: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800be54: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800be58: f003 0301 and.w r3, r3, #1 800be5c: 2b00 cmp r3, #0 800be5e: d004 beq.n 800be6a 800be60: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800be64: 3301 adds r3, #1 800be66: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800be6a: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800be6e: 881b ldrh r3, [r3, #0] 800be70: b29a uxth r2, r3 800be72: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800be76: b29b uxth r3, r3 800be78: 029b lsls r3, r3, #10 800be7a: b29b uxth r3, r3 800be7c: 4313 orrs r3, r2 800be7e: b29a uxth r2, r3 800be80: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800be84: 801a strh r2, [r3, #0] 800be86: e02c b.n 800bee2 800be88: f507 7384 add.w r3, r7, #264 @ 0x108 800be8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800be90: 681b ldr r3, [r3, #0] 800be92: 785b ldrb r3, [r3, #1] 800be94: 2b01 cmp r3, #1 800be96: d124 bne.n 800bee2 800be98: f507 7384 add.w r3, r7, #264 @ 0x108 800be9c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bea0: 681b ldr r3, [r3, #0] 800bea2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800bea6: b29b uxth r3, r3 800bea8: 461a mov r2, r3 800beaa: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 800beae: 4413 add r3, r2 800beb0: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 800beb4: f507 7384 add.w r3, r7, #264 @ 0x108 800beb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bebc: 681b ldr r3, [r3, #0] 800bebe: 781b ldrb r3, [r3, #0] 800bec0: 011a lsls r2, r3, #4 800bec2: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 800bec6: 4413 add r3, r2 800bec8: f203 430c addw r3, r3, #1036 @ 0x40c 800becc: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 800bed0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800bed4: b29a uxth r2, r3 800bed6: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0 800beda: 801a strh r2, [r3, #0] 800bedc: e001 b.n 800bee2 } else { return HAL_ERROR; 800bede: 2301 movs r3, #1 800bee0: e03a b.n 800bf58 } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800bee2: f507 7384 add.w r3, r7, #264 @ 0x108 800bee6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800beea: 681a ldr r2, [r3, #0] 800beec: f507 7384 add.w r3, r7, #264 @ 0x108 800bef0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bef4: 681b ldr r3, [r3, #0] 800bef6: 781b ldrb r3, [r3, #0] 800bef8: 009b lsls r3, r3, #2 800befa: 4413 add r3, r2 800befc: 881b ldrh r3, [r3, #0] 800befe: b29b uxth r3, r3 800bf00: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800bf04: f023 0370 bic.w r3, r3, #112 @ 0x70 800bf08: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800bf0c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800bf10: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800bf14: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800bf18: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800bf1c: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800bf20: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800bf24: f507 7384 add.w r3, r7, #264 @ 0x108 800bf28: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800bf2c: 681a ldr r2, [r3, #0] 800bf2e: f507 7384 add.w r3, r7, #264 @ 0x108 800bf32: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800bf36: 681b ldr r3, [r3, #0] 800bf38: 781b ldrb r3, [r3, #0] 800bf3a: 009b lsls r3, r3, #2 800bf3c: 441a add r2, r3 800bf3e: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800bf42: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800bf46: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800bf4a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800bf4e: f043 0380 orr.w r3, r3, #128 @ 0x80 800bf52: b29b uxth r3, r3 800bf54: 8013 strh r3, [r2, #0] } return HAL_OK; 800bf56: 2300 movs r3, #0 } 800bf58: 4618 mov r0, r3 800bf5a: f507 7784 add.w r7, r7, #264 @ 0x108 800bf5e: 46bd mov sp, r7 800bf60: bd80 pop {r7, pc} 0800bf62 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800bf62: b480 push {r7} 800bf64: b085 sub sp, #20 800bf66: af00 add r7, sp, #0 800bf68: 6078 str r0, [r7, #4] 800bf6a: 6039 str r1, [r7, #0] if (ep->is_in != 0U) 800bf6c: 683b ldr r3, [r7, #0] 800bf6e: 785b ldrb r3, [r3, #1] 800bf70: 2b00 cmp r3, #0 800bf72: d020 beq.n 800bfb6 { PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); 800bf74: 687a ldr r2, [r7, #4] 800bf76: 683b ldr r3, [r7, #0] 800bf78: 781b ldrb r3, [r3, #0] 800bf7a: 009b lsls r3, r3, #2 800bf7c: 4413 add r3, r2 800bf7e: 881b ldrh r3, [r3, #0] 800bf80: b29b uxth r3, r3 800bf82: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800bf86: f023 0340 bic.w r3, r3, #64 @ 0x40 800bf8a: 81bb strh r3, [r7, #12] 800bf8c: 89bb ldrh r3, [r7, #12] 800bf8e: f083 0310 eor.w r3, r3, #16 800bf92: 81bb strh r3, [r7, #12] 800bf94: 687a ldr r2, [r7, #4] 800bf96: 683b ldr r3, [r7, #0] 800bf98: 781b ldrb r3, [r3, #0] 800bf9a: 009b lsls r3, r3, #2 800bf9c: 441a add r2, r3 800bf9e: 89bb ldrh r3, [r7, #12] 800bfa0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800bfa4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800bfa8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800bfac: f043 0380 orr.w r3, r3, #128 @ 0x80 800bfb0: b29b uxth r3, r3 800bfb2: 8013 strh r3, [r2, #0] 800bfb4: e01f b.n 800bff6 } else { PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); 800bfb6: 687a ldr r2, [r7, #4] 800bfb8: 683b ldr r3, [r7, #0] 800bfba: 781b ldrb r3, [r3, #0] 800bfbc: 009b lsls r3, r3, #2 800bfbe: 4413 add r3, r2 800bfc0: 881b ldrh r3, [r3, #0] 800bfc2: b29b uxth r3, r3 800bfc4: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800bfc8: f023 0370 bic.w r3, r3, #112 @ 0x70 800bfcc: 81fb strh r3, [r7, #14] 800bfce: 89fb ldrh r3, [r7, #14] 800bfd0: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800bfd4: 81fb strh r3, [r7, #14] 800bfd6: 687a ldr r2, [r7, #4] 800bfd8: 683b ldr r3, [r7, #0] 800bfda: 781b ldrb r3, [r3, #0] 800bfdc: 009b lsls r3, r3, #2 800bfde: 441a add r2, r3 800bfe0: 89fb ldrh r3, [r7, #14] 800bfe2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800bfe6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800bfea: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800bfee: f043 0380 orr.w r3, r3, #128 @ 0x80 800bff2: b29b uxth r3, r3 800bff4: 8013 strh r3, [r2, #0] } return HAL_OK; 800bff6: 2300 movs r3, #0 } 800bff8: 4618 mov r0, r3 800bffa: 3714 adds r7, #20 800bffc: 46bd mov sp, r7 800bffe: bc80 pop {r7} 800c000: 4770 bx lr 0800c002 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800c002: b480 push {r7} 800c004: b087 sub sp, #28 800c006: af00 add r7, sp, #0 800c008: 6078 str r0, [r7, #4] 800c00a: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 800c00c: 683b ldr r3, [r7, #0] 800c00e: 7b1b ldrb r3, [r3, #12] 800c010: 2b00 cmp r3, #0 800c012: f040 809d bne.w 800c150 { if (ep->is_in != 0U) 800c016: 683b ldr r3, [r7, #0] 800c018: 785b ldrb r3, [r3, #1] 800c01a: 2b00 cmp r3, #0 800c01c: d04c beq.n 800c0b8 { PCD_CLEAR_TX_DTOG(USBx, ep->num); 800c01e: 687a ldr r2, [r7, #4] 800c020: 683b ldr r3, [r7, #0] 800c022: 781b ldrb r3, [r3, #0] 800c024: 009b lsls r3, r3, #2 800c026: 4413 add r3, r2 800c028: 881b ldrh r3, [r3, #0] 800c02a: 823b strh r3, [r7, #16] 800c02c: 8a3b ldrh r3, [r7, #16] 800c02e: f003 0340 and.w r3, r3, #64 @ 0x40 800c032: 2b00 cmp r3, #0 800c034: d01b beq.n 800c06e 800c036: 687a ldr r2, [r7, #4] 800c038: 683b ldr r3, [r7, #0] 800c03a: 781b ldrb r3, [r3, #0] 800c03c: 009b lsls r3, r3, #2 800c03e: 4413 add r3, r2 800c040: 881b ldrh r3, [r3, #0] 800c042: b29b uxth r3, r3 800c044: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800c048: f023 0370 bic.w r3, r3, #112 @ 0x70 800c04c: 81fb strh r3, [r7, #14] 800c04e: 687a ldr r2, [r7, #4] 800c050: 683b ldr r3, [r7, #0] 800c052: 781b ldrb r3, [r3, #0] 800c054: 009b lsls r3, r3, #2 800c056: 441a add r2, r3 800c058: 89fb ldrh r3, [r7, #14] 800c05a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800c05e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800c062: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800c066: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800c06a: b29b uxth r3, r3 800c06c: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 800c06e: 683b ldr r3, [r7, #0] 800c070: 78db ldrb r3, [r3, #3] 800c072: 2b01 cmp r3, #1 800c074: d06c beq.n 800c150 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 800c076: 687a ldr r2, [r7, #4] 800c078: 683b ldr r3, [r7, #0] 800c07a: 781b ldrb r3, [r3, #0] 800c07c: 009b lsls r3, r3, #2 800c07e: 4413 add r3, r2 800c080: 881b ldrh r3, [r3, #0] 800c082: b29b uxth r3, r3 800c084: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800c088: f023 0340 bic.w r3, r3, #64 @ 0x40 800c08c: 81bb strh r3, [r7, #12] 800c08e: 89bb ldrh r3, [r7, #12] 800c090: f083 0320 eor.w r3, r3, #32 800c094: 81bb strh r3, [r7, #12] 800c096: 687a ldr r2, [r7, #4] 800c098: 683b ldr r3, [r7, #0] 800c09a: 781b ldrb r3, [r3, #0] 800c09c: 009b lsls r3, r3, #2 800c09e: 441a add r2, r3 800c0a0: 89bb ldrh r3, [r7, #12] 800c0a2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800c0a6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800c0aa: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800c0ae: f043 0380 orr.w r3, r3, #128 @ 0x80 800c0b2: b29b uxth r3, r3 800c0b4: 8013 strh r3, [r2, #0] 800c0b6: e04b b.n 800c150 } } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 800c0b8: 687a ldr r2, [r7, #4] 800c0ba: 683b ldr r3, [r7, #0] 800c0bc: 781b ldrb r3, [r3, #0] 800c0be: 009b lsls r3, r3, #2 800c0c0: 4413 add r3, r2 800c0c2: 881b ldrh r3, [r3, #0] 800c0c4: 82fb strh r3, [r7, #22] 800c0c6: 8afb ldrh r3, [r7, #22] 800c0c8: f403 4380 and.w r3, r3, #16384 @ 0x4000 800c0cc: 2b00 cmp r3, #0 800c0ce: d01b beq.n 800c108 800c0d0: 687a ldr r2, [r7, #4] 800c0d2: 683b ldr r3, [r7, #0] 800c0d4: 781b ldrb r3, [r3, #0] 800c0d6: 009b lsls r3, r3, #2 800c0d8: 4413 add r3, r2 800c0da: 881b ldrh r3, [r3, #0] 800c0dc: b29b uxth r3, r3 800c0de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800c0e2: f023 0370 bic.w r3, r3, #112 @ 0x70 800c0e6: 82bb strh r3, [r7, #20] 800c0e8: 687a ldr r2, [r7, #4] 800c0ea: 683b ldr r3, [r7, #0] 800c0ec: 781b ldrb r3, [r3, #0] 800c0ee: 009b lsls r3, r3, #2 800c0f0: 441a add r2, r3 800c0f2: 8abb ldrh r3, [r7, #20] 800c0f4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800c0f8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800c0fc: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800c100: f043 0380 orr.w r3, r3, #128 @ 0x80 800c104: b29b uxth r3, r3 800c106: 8013 strh r3, [r2, #0] /* Configure VALID status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800c108: 687a ldr r2, [r7, #4] 800c10a: 683b ldr r3, [r7, #0] 800c10c: 781b ldrb r3, [r3, #0] 800c10e: 009b lsls r3, r3, #2 800c110: 4413 add r3, r2 800c112: 881b ldrh r3, [r3, #0] 800c114: b29b uxth r3, r3 800c116: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800c11a: f023 0370 bic.w r3, r3, #112 @ 0x70 800c11e: 827b strh r3, [r7, #18] 800c120: 8a7b ldrh r3, [r7, #18] 800c122: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800c126: 827b strh r3, [r7, #18] 800c128: 8a7b ldrh r3, [r7, #18] 800c12a: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800c12e: 827b strh r3, [r7, #18] 800c130: 687a ldr r2, [r7, #4] 800c132: 683b ldr r3, [r7, #0] 800c134: 781b ldrb r3, [r3, #0] 800c136: 009b lsls r3, r3, #2 800c138: 441a add r2, r3 800c13a: 8a7b ldrh r3, [r7, #18] 800c13c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800c140: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800c144: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800c148: f043 0380 orr.w r3, r3, #128 @ 0x80 800c14c: b29b uxth r3, r3 800c14e: 8013 strh r3, [r2, #0] } } return HAL_OK; 800c150: 2300 movs r3, #0 } 800c152: 4618 mov r0, r3 800c154: 371c adds r7, #28 800c156: 46bd mov sp, r7 800c158: bc80 pop {r7} 800c15a: 4770 bx lr 0800c15c : * @param address new device address to be assigned * This parameter can be a value from 0 to 255 * @retval HAL status */ HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) { 800c15c: b480 push {r7} 800c15e: b083 sub sp, #12 800c160: af00 add r7, sp, #0 800c162: 6078 str r0, [r7, #4] 800c164: 460b mov r3, r1 800c166: 70fb strb r3, [r7, #3] if (address == 0U) 800c168: 78fb ldrb r3, [r7, #3] 800c16a: 2b00 cmp r3, #0 800c16c: d103 bne.n 800c176 { /* set device address and enable function */ USBx->DADDR = (uint16_t)USB_DADDR_EF; 800c16e: 687b ldr r3, [r7, #4] 800c170: 2280 movs r2, #128 @ 0x80 800c172: f8a3 204c strh.w r2, [r3, #76] @ 0x4c } return HAL_OK; 800c176: 2300 movs r3, #0 } 800c178: 4618 mov r0, r3 800c17a: 370c adds r7, #12 800c17c: 46bd mov sp, r7 800c17e: bc80 pop {r7} 800c180: 4770 bx lr 0800c182 : * @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx) { 800c182: b480 push {r7} 800c184: b083 sub sp, #12 800c186: af00 add r7, sp, #0 800c188: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800c18a: 2300 movs r3, #0 } 800c18c: 4618 mov r0, r3 800c18e: 370c adds r7, #12 800c190: 46bd mov sp, r7 800c192: bc80 pop {r7} 800c194: 4770 bx lr 0800c196 : * @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) { 800c196: b480 push {r7} 800c198: b083 sub sp, #12 800c19a: af00 add r7, sp, #0 800c19c: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800c19e: 2300 movs r3, #0 } 800c1a0: 4618 mov r0, r3 800c1a2: 370c adds r7, #12 800c1a4: 46bd mov sp, r7 800c1a6: bc80 pop {r7} 800c1a8: 4770 bx lr 0800c1aa : * @brief USB_ReadInterrupts return the global USB interrupt status * @param USBx Selected device * @retval USB Global Interrupt status */ uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx) { 800c1aa: b480 push {r7} 800c1ac: b085 sub sp, #20 800c1ae: af00 add r7, sp, #0 800c1b0: 6078 str r0, [r7, #4] uint32_t tmpreg; tmpreg = USBx->ISTR; 800c1b2: 687b ldr r3, [r7, #4] 800c1b4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 800c1b8: b29b uxth r3, r3 800c1ba: 60fb str r3, [r7, #12] return tmpreg; 800c1bc: 68fb ldr r3, [r7, #12] } 800c1be: 4618 mov r0, r3 800c1c0: 3714 adds r7, #20 800c1c2: 46bd mov sp, r7 800c1c4: bc80 pop {r7} 800c1c6: 4770 bx lr 0800c1c8 : * @param USBx Selected device * @param psetup pointer to setup packet * @retval HAL status */ HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup) { 800c1c8: b480 push {r7} 800c1ca: b083 sub sp, #12 800c1cc: af00 add r7, sp, #0 800c1ce: 6078 str r0, [r7, #4] 800c1d0: 6039 str r1, [r7, #0] UNUSED(psetup); /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800c1d2: 2300 movs r3, #0 } 800c1d4: 4618 mov r0, r3 800c1d6: 370c adds r7, #12 800c1d8: 46bd mov sp, r7 800c1da: bc80 pop {r7} 800c1dc: 4770 bx lr 0800c1de : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800c1de: b480 push {r7} 800c1e0: b08b sub sp, #44 @ 0x2c 800c1e2: af00 add r7, sp, #0 800c1e4: 60f8 str r0, [r7, #12] 800c1e6: 60b9 str r1, [r7, #8] 800c1e8: 4611 mov r1, r2 800c1ea: 461a mov r2, r3 800c1ec: 460b mov r3, r1 800c1ee: 80fb strh r3, [r7, #6] 800c1f0: 4613 mov r3, r2 800c1f2: 80bb strh r3, [r7, #4] uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; 800c1f4: 88bb ldrh r3, [r7, #4] 800c1f6: 3301 adds r3, #1 800c1f8: 085b lsrs r3, r3, #1 800c1fa: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 800c1fc: 68fb ldr r3, [r7, #12] 800c1fe: 617b str r3, [r7, #20] uint32_t count; uint16_t WrVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 800c200: 68bb ldr r3, [r7, #8] 800c202: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 800c204: 88fb ldrh r3, [r7, #6] 800c206: 005a lsls r2, r3, #1 800c208: 697b ldr r3, [r7, #20] 800c20a: 4413 add r3, r2 800c20c: f503 6380 add.w r3, r3, #1024 @ 0x400 800c210: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800c212: 69bb ldr r3, [r7, #24] 800c214: 627b str r3, [r7, #36] @ 0x24 800c216: e01f b.n 800c258 { WrVal = pBuf[0]; 800c218: 69fb ldr r3, [r7, #28] 800c21a: 781b ldrb r3, [r3, #0] 800c21c: 827b strh r3, [r7, #18] WrVal |= (uint16_t)pBuf[1] << 8; 800c21e: 69fb ldr r3, [r7, #28] 800c220: 3301 adds r3, #1 800c222: 781b ldrb r3, [r3, #0] 800c224: b21b sxth r3, r3 800c226: 021b lsls r3, r3, #8 800c228: b21a sxth r2, r3 800c22a: f9b7 3012 ldrsh.w r3, [r7, #18] 800c22e: 4313 orrs r3, r2 800c230: b21b sxth r3, r3 800c232: 827b strh r3, [r7, #18] *pdwVal = (WrVal & 0xFFFFU); 800c234: 6a3b ldr r3, [r7, #32] 800c236: 8a7a ldrh r2, [r7, #18] 800c238: 801a strh r2, [r3, #0] pdwVal++; 800c23a: 6a3b ldr r3, [r7, #32] 800c23c: 3302 adds r3, #2 800c23e: 623b str r3, [r7, #32] #if PMA_ACCESS > 1U pdwVal++; 800c240: 6a3b ldr r3, [r7, #32] 800c242: 3302 adds r3, #2 800c244: 623b str r3, [r7, #32] #endif /* PMA_ACCESS */ pBuf++; 800c246: 69fb ldr r3, [r7, #28] 800c248: 3301 adds r3, #1 800c24a: 61fb str r3, [r7, #28] pBuf++; 800c24c: 69fb ldr r3, [r7, #28] 800c24e: 3301 adds r3, #1 800c250: 61fb str r3, [r7, #28] for (count = n; count != 0U; count--) 800c252: 6a7b ldr r3, [r7, #36] @ 0x24 800c254: 3b01 subs r3, #1 800c256: 627b str r3, [r7, #36] @ 0x24 800c258: 6a7b ldr r3, [r7, #36] @ 0x24 800c25a: 2b00 cmp r3, #0 800c25c: d1dc bne.n 800c218 } } 800c25e: bf00 nop 800c260: bf00 nop 800c262: 372c adds r7, #44 @ 0x2c 800c264: 46bd mov sp, r7 800c266: bc80 pop {r7} 800c268: 4770 bx lr 0800c26a : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800c26a: b480 push {r7} 800c26c: b08b sub sp, #44 @ 0x2c 800c26e: af00 add r7, sp, #0 800c270: 60f8 str r0, [r7, #12] 800c272: 60b9 str r1, [r7, #8] 800c274: 4611 mov r1, r2 800c276: 461a mov r2, r3 800c278: 460b mov r3, r1 800c27a: 80fb strh r3, [r7, #6] 800c27c: 4613 mov r3, r2 800c27e: 80bb strh r3, [r7, #4] uint32_t n = (uint32_t)wNBytes >> 1; 800c280: 88bb ldrh r3, [r7, #4] 800c282: 085b lsrs r3, r3, #1 800c284: b29b uxth r3, r3 800c286: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 800c288: 68fb ldr r3, [r7, #12] 800c28a: 617b str r3, [r7, #20] uint32_t count; uint32_t RdVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 800c28c: 68bb ldr r3, [r7, #8] 800c28e: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 800c290: 88fb ldrh r3, [r7, #6] 800c292: 005a lsls r2, r3, #1 800c294: 697b ldr r3, [r7, #20] 800c296: 4413 add r3, r2 800c298: f503 6380 add.w r3, r3, #1024 @ 0x400 800c29c: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800c29e: 69bb ldr r3, [r7, #24] 800c2a0: 627b str r3, [r7, #36] @ 0x24 800c2a2: e01b b.n 800c2dc { RdVal = *(__IO uint16_t *)pdwVal; 800c2a4: 6a3b ldr r3, [r7, #32] 800c2a6: 881b ldrh r3, [r3, #0] 800c2a8: b29b uxth r3, r3 800c2aa: 613b str r3, [r7, #16] pdwVal++; 800c2ac: 6a3b ldr r3, [r7, #32] 800c2ae: 3302 adds r3, #2 800c2b0: 623b str r3, [r7, #32] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 800c2b2: 693b ldr r3, [r7, #16] 800c2b4: b2da uxtb r2, r3 800c2b6: 69fb ldr r3, [r7, #28] 800c2b8: 701a strb r2, [r3, #0] pBuf++; 800c2ba: 69fb ldr r3, [r7, #28] 800c2bc: 3301 adds r3, #1 800c2be: 61fb str r3, [r7, #28] *pBuf = (uint8_t)((RdVal >> 8) & 0xFFU); 800c2c0: 693b ldr r3, [r7, #16] 800c2c2: 0a1b lsrs r3, r3, #8 800c2c4: b2da uxtb r2, r3 800c2c6: 69fb ldr r3, [r7, #28] 800c2c8: 701a strb r2, [r3, #0] pBuf++; 800c2ca: 69fb ldr r3, [r7, #28] 800c2cc: 3301 adds r3, #1 800c2ce: 61fb str r3, [r7, #28] #if PMA_ACCESS > 1U pdwVal++; 800c2d0: 6a3b ldr r3, [r7, #32] 800c2d2: 3302 adds r3, #2 800c2d4: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800c2d6: 6a7b ldr r3, [r7, #36] @ 0x24 800c2d8: 3b01 subs r3, #1 800c2da: 627b str r3, [r7, #36] @ 0x24 800c2dc: 6a7b ldr r3, [r7, #36] @ 0x24 800c2de: 2b00 cmp r3, #0 800c2e0: d1e0 bne.n 800c2a4 #endif /* PMA_ACCESS */ } if ((wNBytes % 2U) != 0U) 800c2e2: 88bb ldrh r3, [r7, #4] 800c2e4: f003 0301 and.w r3, r3, #1 800c2e8: b29b uxth r3, r3 800c2ea: 2b00 cmp r3, #0 800c2ec: d007 beq.n 800c2fe { RdVal = *pdwVal; 800c2ee: 6a3b ldr r3, [r7, #32] 800c2f0: 881b ldrh r3, [r3, #0] 800c2f2: b29b uxth r3, r3 800c2f4: 613b str r3, [r7, #16] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 800c2f6: 693b ldr r3, [r7, #16] 800c2f8: b2da uxtb r2, r3 800c2fa: 69fb ldr r3, [r7, #28] 800c2fc: 701a strb r2, [r3, #0] } } 800c2fe: bf00 nop 800c300: 372c adds r7, #44 @ 0x2c 800c302: 46bd mov sp, r7 800c304: bc80 pop {r7} 800c306: 4770 bx lr 0800c308 : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800c308: b580 push {r7, lr} 800c30a: b084 sub sp, #16 800c30c: af00 add r7, sp, #0 800c30e: 6078 str r0, [r7, #4] 800c310: 460b mov r3, r1 800c312: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 800c314: 2300 movs r3, #0 800c316: 73fb strb r3, [r7, #15] USBD_CDC_HandleTypeDef *hcdc; if (pdev->dev_speed == USBD_SPEED_HIGH) 800c318: 687b ldr r3, [r7, #4] 800c31a: 7c1b ldrb r3, [r3, #16] 800c31c: 2b00 cmp r3, #0 800c31e: d115 bne.n 800c34c { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 800c320: f44f 7300 mov.w r3, #512 @ 0x200 800c324: 2202 movs r2, #2 800c326: 2181 movs r1, #129 @ 0x81 800c328: 6878 ldr r0, [r7, #4] 800c32a: f001 ff00 bl 800e12e CDC_DATA_HS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 800c32e: 687b ldr r3, [r7, #4] 800c330: 2201 movs r2, #1 800c332: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 800c334: f44f 7300 mov.w r3, #512 @ 0x200 800c338: 2202 movs r2, #2 800c33a: 2101 movs r1, #1 800c33c: 6878 ldr r0, [r7, #4] 800c33e: f001 fef6 bl 800e12e CDC_DATA_HS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 800c342: 687b ldr r3, [r7, #4] 800c344: 2201 movs r2, #1 800c346: f8c3 216c str.w r2, [r3, #364] @ 0x16c 800c34a: e012 b.n 800c372 } else { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 800c34c: 2340 movs r3, #64 @ 0x40 800c34e: 2202 movs r2, #2 800c350: 2181 movs r1, #129 @ 0x81 800c352: 6878 ldr r0, [r7, #4] 800c354: f001 feeb bl 800e12e CDC_DATA_FS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 800c358: 687b ldr r3, [r7, #4] 800c35a: 2201 movs r2, #1 800c35c: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 800c35e: 2340 movs r3, #64 @ 0x40 800c360: 2202 movs r2, #2 800c362: 2101 movs r1, #1 800c364: 6878 ldr r0, [r7, #4] 800c366: f001 fee2 bl 800e12e CDC_DATA_FS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 800c36a: 687b ldr r3, [r7, #4] 800c36c: 2201 movs r2, #1 800c36e: f8c3 216c str.w r2, [r3, #364] @ 0x16c } /* Open Command IN EP */ USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE); 800c372: 2308 movs r3, #8 800c374: 2203 movs r2, #3 800c376: 2182 movs r1, #130 @ 0x82 800c378: 6878 ldr r0, [r7, #4] 800c37a: f001 fed8 bl 800e12e pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U; 800c37e: 687b ldr r3, [r7, #4] 800c380: 2201 movs r2, #1 800c382: 641a str r2, [r3, #64] @ 0x40 pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef)); 800c384: f44f 7007 mov.w r0, #540 @ 0x21c 800c388: f001 fff8 bl 800e37c 800c38c: 4602 mov r2, r0 800c38e: 687b ldr r3, [r7, #4] 800c390: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 if (pdev->pClassData == NULL) 800c394: 687b ldr r3, [r7, #4] 800c396: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c39a: 2b00 cmp r3, #0 800c39c: d102 bne.n 800c3a4 { ret = 1U; 800c39e: 2301 movs r3, #1 800c3a0: 73fb strb r3, [r7, #15] 800c3a2: e026 b.n 800c3f2 } else { hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800c3a4: 687b ldr r3, [r7, #4] 800c3a6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c3aa: 60bb str r3, [r7, #8] /* Init physical Interface components */ ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init(); 800c3ac: 687b ldr r3, [r7, #4] 800c3ae: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800c3b2: 681b ldr r3, [r3, #0] 800c3b4: 4798 blx r3 /* Init Xfer states */ hcdc->TxState = 0U; 800c3b6: 68bb ldr r3, [r7, #8] 800c3b8: 2200 movs r2, #0 800c3ba: f8c3 2214 str.w r2, [r3, #532] @ 0x214 hcdc->RxState = 0U; 800c3be: 68bb ldr r3, [r7, #8] 800c3c0: 2200 movs r2, #0 800c3c2: f8c3 2218 str.w r2, [r3, #536] @ 0x218 if (pdev->dev_speed == USBD_SPEED_HIGH) 800c3c6: 687b ldr r3, [r7, #4] 800c3c8: 7c1b ldrb r3, [r3, #16] 800c3ca: 2b00 cmp r3, #0 800c3cc: d109 bne.n 800c3e2 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 800c3ce: 68bb ldr r3, [r7, #8] 800c3d0: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800c3d4: f44f 7300 mov.w r3, #512 @ 0x200 800c3d8: 2101 movs r1, #1 800c3da: 6878 ldr r0, [r7, #4] 800c3dc: f001 ff97 bl 800e30e 800c3e0: e007 b.n 800c3f2 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 800c3e2: 68bb ldr r3, [r7, #8] 800c3e4: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800c3e8: 2340 movs r3, #64 @ 0x40 800c3ea: 2101 movs r1, #1 800c3ec: 6878 ldr r0, [r7, #4] 800c3ee: f001 ff8e bl 800e30e CDC_DATA_FS_OUT_PACKET_SIZE); } } return ret; 800c3f2: 7bfb ldrb r3, [r7, #15] } 800c3f4: 4618 mov r0, r3 800c3f6: 3710 adds r7, #16 800c3f8: 46bd mov sp, r7 800c3fa: bd80 pop {r7, pc} 0800c3fc : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800c3fc: b580 push {r7, lr} 800c3fe: b084 sub sp, #16 800c400: af00 add r7, sp, #0 800c402: 6078 str r0, [r7, #4] 800c404: 460b mov r3, r1 800c406: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 800c408: 2300 movs r3, #0 800c40a: 73fb strb r3, [r7, #15] /* Close EP IN */ USBD_LL_CloseEP(pdev, CDC_IN_EP); 800c40c: 2181 movs r1, #129 @ 0x81 800c40e: 6878 ldr r0, [r7, #4] 800c410: f001 feb3 bl 800e17a pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U; 800c414: 687b ldr r3, [r7, #4] 800c416: 2200 movs r2, #0 800c418: 62da str r2, [r3, #44] @ 0x2c /* Close EP OUT */ USBD_LL_CloseEP(pdev, CDC_OUT_EP); 800c41a: 2101 movs r1, #1 800c41c: 6878 ldr r0, [r7, #4] 800c41e: f001 feac bl 800e17a pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U; 800c422: 687b ldr r3, [r7, #4] 800c424: 2200 movs r2, #0 800c426: f8c3 216c str.w r2, [r3, #364] @ 0x16c /* Close Command IN EP */ USBD_LL_CloseEP(pdev, CDC_CMD_EP); 800c42a: 2182 movs r1, #130 @ 0x82 800c42c: 6878 ldr r0, [r7, #4] 800c42e: f001 fea4 bl 800e17a pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U; 800c432: 687b ldr r3, [r7, #4] 800c434: 2200 movs r2, #0 800c436: 641a str r2, [r3, #64] @ 0x40 /* DeInit physical Interface components */ if (pdev->pClassData != NULL) 800c438: 687b ldr r3, [r7, #4] 800c43a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c43e: 2b00 cmp r3, #0 800c440: d00e beq.n 800c460 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit(); 800c442: 687b ldr r3, [r7, #4] 800c444: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800c448: 685b ldr r3, [r3, #4] 800c44a: 4798 blx r3 USBD_free(pdev->pClassData); 800c44c: 687b ldr r3, [r7, #4] 800c44e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c452: 4618 mov r0, r3 800c454: f001 ff9e bl 800e394 pdev->pClassData = NULL; 800c458: 687b ldr r3, [r7, #4] 800c45a: 2200 movs r2, #0 800c45c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 } return ret; 800c460: 7bfb ldrb r3, [r7, #15] } 800c462: 4618 mov r0, r3 800c464: 3710 adds r7, #16 800c466: 46bd mov sp, r7 800c468: bd80 pop {r7, pc} 0800c46a : * @param req: usb requests * @retval status */ static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c46a: b580 push {r7, lr} 800c46c: b086 sub sp, #24 800c46e: af00 add r7, sp, #0 800c470: 6078 str r0, [r7, #4] 800c472: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800c474: 687b ldr r3, [r7, #4] 800c476: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c47a: 613b str r3, [r7, #16] uint8_t ifalt = 0U; 800c47c: 2300 movs r3, #0 800c47e: 73fb strb r3, [r7, #15] uint16_t status_info = 0U; 800c480: 2300 movs r3, #0 800c482: 81bb strh r3, [r7, #12] uint8_t ret = USBD_OK; 800c484: 2300 movs r3, #0 800c486: 75fb strb r3, [r7, #23] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800c488: 683b ldr r3, [r7, #0] 800c48a: 781b ldrb r3, [r3, #0] 800c48c: f003 0360 and.w r3, r3, #96 @ 0x60 800c490: 2b00 cmp r3, #0 800c492: d039 beq.n 800c508 800c494: 2b20 cmp r3, #32 800c496: d17f bne.n 800c598 { case USB_REQ_TYPE_CLASS : if (req->wLength) 800c498: 683b ldr r3, [r7, #0] 800c49a: 88db ldrh r3, [r3, #6] 800c49c: 2b00 cmp r3, #0 800c49e: d029 beq.n 800c4f4 { if (req->bmRequest & 0x80U) 800c4a0: 683b ldr r3, [r7, #0] 800c4a2: 781b ldrb r3, [r3, #0] 800c4a4: b25b sxtb r3, r3 800c4a6: 2b00 cmp r3, #0 800c4a8: da11 bge.n 800c4ce { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800c4aa: 687b ldr r3, [r7, #4] 800c4ac: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800c4b0: 689b ldr r3, [r3, #8] 800c4b2: 683a ldr r2, [r7, #0] 800c4b4: 7850 ldrb r0, [r2, #1] (uint8_t *)(void *)hcdc->data, 800c4b6: 6939 ldr r1, [r7, #16] ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800c4b8: 683a ldr r2, [r7, #0] 800c4ba: 88d2 ldrh r2, [r2, #6] 800c4bc: 4798 blx r3 req->wLength); USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 800c4be: 6939 ldr r1, [r7, #16] 800c4c0: 683b ldr r3, [r7, #0] 800c4c2: 88db ldrh r3, [r3, #6] 800c4c4: 461a mov r2, r3 800c4c6: 6878 ldr r0, [r7, #4] 800c4c8: f001 fa06 bl 800d8d8 else { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, (uint8_t *)(void *)req, 0U); } break; 800c4cc: e06b b.n 800c5a6 hcdc->CmdOpCode = req->bRequest; 800c4ce: 683b ldr r3, [r7, #0] 800c4d0: 785a ldrb r2, [r3, #1] 800c4d2: 693b ldr r3, [r7, #16] 800c4d4: f883 2200 strb.w r2, [r3, #512] @ 0x200 hcdc->CmdLength = (uint8_t)req->wLength; 800c4d8: 683b ldr r3, [r7, #0] 800c4da: 88db ldrh r3, [r3, #6] 800c4dc: b2da uxtb r2, r3 800c4de: 693b ldr r3, [r7, #16] 800c4e0: f883 2201 strb.w r2, [r3, #513] @ 0x201 USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 800c4e4: 6939 ldr r1, [r7, #16] 800c4e6: 683b ldr r3, [r7, #0] 800c4e8: 88db ldrh r3, [r3, #6] 800c4ea: 461a mov r2, r3 800c4ec: 6878 ldr r0, [r7, #4] 800c4ee: f001 fa21 bl 800d934 break; 800c4f2: e058 b.n 800c5a6 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800c4f4: 687b ldr r3, [r7, #4] 800c4f6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800c4fa: 689b ldr r3, [r3, #8] 800c4fc: 683a ldr r2, [r7, #0] 800c4fe: 7850 ldrb r0, [r2, #1] 800c500: 2200 movs r2, #0 800c502: 6839 ldr r1, [r7, #0] 800c504: 4798 blx r3 break; 800c506: e04e b.n 800c5a6 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800c508: 683b ldr r3, [r7, #0] 800c50a: 785b ldrb r3, [r3, #1] 800c50c: 2b0b cmp r3, #11 800c50e: d02e beq.n 800c56e 800c510: 2b0b cmp r3, #11 800c512: dc38 bgt.n 800c586 800c514: 2b00 cmp r3, #0 800c516: d002 beq.n 800c51e 800c518: 2b0a cmp r3, #10 800c51a: d014 beq.n 800c546 800c51c: e033 b.n 800c586 { case USB_REQ_GET_STATUS: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c51e: 687b ldr r3, [r7, #4] 800c520: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c524: 2b03 cmp r3, #3 800c526: d107 bne.n 800c538 { USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U); 800c528: f107 030c add.w r3, r7, #12 800c52c: 2202 movs r2, #2 800c52e: 4619 mov r1, r3 800c530: 6878 ldr r0, [r7, #4] 800c532: f001 f9d1 bl 800d8d8 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800c536: e02e b.n 800c596 USBD_CtlError(pdev, req); 800c538: 6839 ldr r1, [r7, #0] 800c53a: 6878 ldr r0, [r7, #4] 800c53c: f001 f962 bl 800d804 ret = USBD_FAIL; 800c540: 2302 movs r3, #2 800c542: 75fb strb r3, [r7, #23] break; 800c544: e027 b.n 800c596 case USB_REQ_GET_INTERFACE: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c546: 687b ldr r3, [r7, #4] 800c548: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c54c: 2b03 cmp r3, #3 800c54e: d107 bne.n 800c560 { USBD_CtlSendData(pdev, &ifalt, 1U); 800c550: f107 030f add.w r3, r7, #15 800c554: 2201 movs r2, #1 800c556: 4619 mov r1, r3 800c558: 6878 ldr r0, [r7, #4] 800c55a: f001 f9bd bl 800d8d8 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800c55e: e01a b.n 800c596 USBD_CtlError(pdev, req); 800c560: 6839 ldr r1, [r7, #0] 800c562: 6878 ldr r0, [r7, #4] 800c564: f001 f94e bl 800d804 ret = USBD_FAIL; 800c568: 2302 movs r3, #2 800c56a: 75fb strb r3, [r7, #23] break; 800c56c: e013 b.n 800c596 case USB_REQ_SET_INTERFACE: if (pdev->dev_state != USBD_STATE_CONFIGURED) 800c56e: 687b ldr r3, [r7, #4] 800c570: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c574: 2b03 cmp r3, #3 800c576: d00d beq.n 800c594 { USBD_CtlError(pdev, req); 800c578: 6839 ldr r1, [r7, #0] 800c57a: 6878 ldr r0, [r7, #4] 800c57c: f001 f942 bl 800d804 ret = USBD_FAIL; 800c580: 2302 movs r3, #2 800c582: 75fb strb r3, [r7, #23] } break; 800c584: e006 b.n 800c594 default: USBD_CtlError(pdev, req); 800c586: 6839 ldr r1, [r7, #0] 800c588: 6878 ldr r0, [r7, #4] 800c58a: f001 f93b bl 800d804 ret = USBD_FAIL; 800c58e: 2302 movs r3, #2 800c590: 75fb strb r3, [r7, #23] break; 800c592: e000 b.n 800c596 break; 800c594: bf00 nop } break; 800c596: e006 b.n 800c5a6 default: USBD_CtlError(pdev, req); 800c598: 6839 ldr r1, [r7, #0] 800c59a: 6878 ldr r0, [r7, #4] 800c59c: f001 f932 bl 800d804 ret = USBD_FAIL; 800c5a0: 2302 movs r3, #2 800c5a2: 75fb strb r3, [r7, #23] break; 800c5a4: bf00 nop } return ret; 800c5a6: 7dfb ldrb r3, [r7, #23] } 800c5a8: 4618 mov r0, r3 800c5aa: 3718 adds r7, #24 800c5ac: 46bd mov sp, r7 800c5ae: bd80 pop {r7, pc} 0800c5b0 : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { 800c5b0: b580 push {r7, lr} 800c5b2: b084 sub sp, #16 800c5b4: af00 add r7, sp, #0 800c5b6: 6078 str r0, [r7, #4] 800c5b8: 460b mov r3, r1 800c5ba: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData; 800c5bc: 687b ldr r3, [r7, #4] 800c5be: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c5c2: 60fb str r3, [r7, #12] PCD_HandleTypeDef *hpcd = pdev->pData; 800c5c4: 687b ldr r3, [r7, #4] 800c5c6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800c5ca: 60bb str r3, [r7, #8] if (pdev->pClassData != NULL) 800c5cc: 687b ldr r3, [r7, #4] 800c5ce: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c5d2: 2b00 cmp r3, #0 800c5d4: d03a beq.n 800c64c { if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U)) 800c5d6: 78fa ldrb r2, [r7, #3] 800c5d8: 6879 ldr r1, [r7, #4] 800c5da: 4613 mov r3, r2 800c5dc: 009b lsls r3, r3, #2 800c5de: 4413 add r3, r2 800c5e0: 009b lsls r3, r3, #2 800c5e2: 440b add r3, r1 800c5e4: 331c adds r3, #28 800c5e6: 681b ldr r3, [r3, #0] 800c5e8: 2b00 cmp r3, #0 800c5ea: d029 beq.n 800c640 800c5ec: 78fa ldrb r2, [r7, #3] 800c5ee: 6879 ldr r1, [r7, #4] 800c5f0: 4613 mov r3, r2 800c5f2: 009b lsls r3, r3, #2 800c5f4: 4413 add r3, r2 800c5f6: 009b lsls r3, r3, #2 800c5f8: 440b add r3, r1 800c5fa: 331c adds r3, #28 800c5fc: 681a ldr r2, [r3, #0] 800c5fe: 78f9 ldrb r1, [r7, #3] 800c600: 68b8 ldr r0, [r7, #8] 800c602: 460b mov r3, r1 800c604: 009b lsls r3, r3, #2 800c606: 440b add r3, r1 800c608: 00db lsls r3, r3, #3 800c60a: 4403 add r3, r0 800c60c: 3320 adds r3, #32 800c60e: 681b ldr r3, [r3, #0] 800c610: fbb2 f1f3 udiv r1, r2, r3 800c614: fb01 f303 mul.w r3, r1, r3 800c618: 1ad3 subs r3, r2, r3 800c61a: 2b00 cmp r3, #0 800c61c: d110 bne.n 800c640 { /* Update the packet total length */ pdev->ep_in[epnum].total_length = 0U; 800c61e: 78fa ldrb r2, [r7, #3] 800c620: 6879 ldr r1, [r7, #4] 800c622: 4613 mov r3, r2 800c624: 009b lsls r3, r3, #2 800c626: 4413 add r3, r2 800c628: 009b lsls r3, r3, #2 800c62a: 440b add r3, r1 800c62c: 331c adds r3, #28 800c62e: 2200 movs r2, #0 800c630: 601a str r2, [r3, #0] /* Send ZLP */ USBD_LL_Transmit(pdev, epnum, NULL, 0U); 800c632: 78f9 ldrb r1, [r7, #3] 800c634: 2300 movs r3, #0 800c636: 2200 movs r2, #0 800c638: 6878 ldr r0, [r7, #4] 800c63a: f001 fe45 bl 800e2c8 800c63e: e003 b.n 800c648 } else { hcdc->TxState = 0U; 800c640: 68fb ldr r3, [r7, #12] 800c642: 2200 movs r2, #0 800c644: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } return USBD_OK; 800c648: 2300 movs r3, #0 800c64a: e000 b.n 800c64e } else { return USBD_FAIL; 800c64c: 2302 movs r3, #2 } } 800c64e: 4618 mov r0, r3 800c650: 3710 adds r7, #16 800c652: 46bd mov sp, r7 800c654: bd80 pop {r7, pc} 0800c656 : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum) { 800c656: b580 push {r7, lr} 800c658: b084 sub sp, #16 800c65a: af00 add r7, sp, #0 800c65c: 6078 str r0, [r7, #4] 800c65e: 460b mov r3, r1 800c660: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800c662: 687b ldr r3, [r7, #4] 800c664: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c668: 60fb str r3, [r7, #12] /* Get the received data length */ hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum); 800c66a: 78fb ldrb r3, [r7, #3] 800c66c: 4619 mov r1, r3 800c66e: 6878 ldr r0, [r7, #4] 800c670: f001 fe70 bl 800e354 800c674: 4602 mov r2, r0 800c676: 68fb ldr r3, [r7, #12] 800c678: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* USB data will be immediately processed, this allow next USB traffic being NAKed till the end of the application Xfer */ if (pdev->pClassData != NULL) 800c67c: 687b ldr r3, [r7, #4] 800c67e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c682: 2b00 cmp r3, #0 800c684: d00d beq.n 800c6a2 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength); 800c686: 687b ldr r3, [r7, #4] 800c688: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800c68c: 68db ldr r3, [r3, #12] 800c68e: 68fa ldr r2, [r7, #12] 800c690: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204 800c694: 68fa ldr r2, [r7, #12] 800c696: f502 7203 add.w r2, r2, #524 @ 0x20c 800c69a: 4611 mov r1, r2 800c69c: 4798 blx r3 return USBD_OK; 800c69e: 2300 movs r3, #0 800c6a0: e000 b.n 800c6a4 } else { return USBD_FAIL; 800c6a2: 2302 movs r3, #2 } } 800c6a4: 4618 mov r0, r3 800c6a6: 3710 adds r7, #16 800c6a8: 46bd mov sp, r7 800c6aa: bd80 pop {r7, pc} 0800c6ac : * Handle EP0 Rx Ready event * @param pdev: device instance * @retval status */ static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev) { 800c6ac: b580 push {r7, lr} 800c6ae: b084 sub sp, #16 800c6b0: af00 add r7, sp, #0 800c6b2: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800c6b4: 687b ldr r3, [r7, #4] 800c6b6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c6ba: 60fb str r3, [r7, #12] if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU)) 800c6bc: 687b ldr r3, [r7, #4] 800c6be: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800c6c2: 2b00 cmp r3, #0 800c6c4: d014 beq.n 800c6f0 800c6c6: 68fb ldr r3, [r7, #12] 800c6c8: f893 3200 ldrb.w r3, [r3, #512] @ 0x200 800c6cc: 2bff cmp r3, #255 @ 0xff 800c6ce: d00f beq.n 800c6f0 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 800c6d0: 687b ldr r3, [r7, #4] 800c6d2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800c6d6: 689b ldr r3, [r3, #8] 800c6d8: 68fa ldr r2, [r7, #12] 800c6da: f892 0200 ldrb.w r0, [r2, #512] @ 0x200 (uint8_t *)(void *)hcdc->data, 800c6de: 68f9 ldr r1, [r7, #12] (uint16_t)hcdc->CmdLength); 800c6e0: 68fa ldr r2, [r7, #12] 800c6e2: f892 2201 ldrb.w r2, [r2, #513] @ 0x201 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 800c6e6: 4798 blx r3 hcdc->CmdOpCode = 0xFFU; 800c6e8: 68fb ldr r3, [r7, #12] 800c6ea: 22ff movs r2, #255 @ 0xff 800c6ec: f883 2200 strb.w r2, [r3, #512] @ 0x200 } return USBD_OK; 800c6f0: 2300 movs r3, #0 } 800c6f2: 4618 mov r0, r3 800c6f4: 3710 adds r7, #16 800c6f6: 46bd mov sp, r7 800c6f8: bd80 pop {r7, pc} ... 0800c6fc : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length) { 800c6fc: b480 push {r7} 800c6fe: b083 sub sp, #12 800c700: af00 add r7, sp, #0 800c702: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgFSDesc); 800c704: 687b ldr r3, [r7, #4] 800c706: 2243 movs r2, #67 @ 0x43 800c708: 801a strh r2, [r3, #0] return USBD_CDC_CfgFSDesc; 800c70a: 4b03 ldr r3, [pc, #12] @ (800c718 ) } 800c70c: 4618 mov r0, r3 800c70e: 370c adds r7, #12 800c710: 46bd mov sp, r7 800c712: bc80 pop {r7} 800c714: 4770 bx lr 800c716: bf00 nop 800c718: 200000a4 .word 0x200000a4 0800c71c : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length) { 800c71c: b480 push {r7} 800c71e: b083 sub sp, #12 800c720: af00 add r7, sp, #0 800c722: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgHSDesc); 800c724: 687b ldr r3, [r7, #4] 800c726: 2243 movs r2, #67 @ 0x43 800c728: 801a strh r2, [r3, #0] return USBD_CDC_CfgHSDesc; 800c72a: 4b03 ldr r3, [pc, #12] @ (800c738 ) } 800c72c: 4618 mov r0, r3 800c72e: 370c adds r7, #12 800c730: 46bd mov sp, r7 800c732: bc80 pop {r7} 800c734: 4770 bx lr 800c736: bf00 nop 800c738: 20000060 .word 0x20000060 0800c73c : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length) { 800c73c: b480 push {r7} 800c73e: b083 sub sp, #12 800c740: af00 add r7, sp, #0 800c742: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_OtherSpeedCfgDesc); 800c744: 687b ldr r3, [r7, #4] 800c746: 2243 movs r2, #67 @ 0x43 800c748: 801a strh r2, [r3, #0] return USBD_CDC_OtherSpeedCfgDesc; 800c74a: 4b03 ldr r3, [pc, #12] @ (800c758 ) } 800c74c: 4618 mov r0, r3 800c74e: 370c adds r7, #12 800c750: 46bd mov sp, r7 800c752: bc80 pop {r7} 800c754: 4770 bx lr 800c756: bf00 nop 800c758: 200000e8 .word 0x200000e8 0800c75c : * return Device Qualifier descriptor * @param length : pointer data length * @retval pointer to descriptor buffer */ uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length) { 800c75c: b480 push {r7} 800c75e: b083 sub sp, #12 800c760: af00 add r7, sp, #0 800c762: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_DeviceQualifierDesc); 800c764: 687b ldr r3, [r7, #4] 800c766: 220a movs r2, #10 800c768: 801a strh r2, [r3, #0] return USBD_CDC_DeviceQualifierDesc; 800c76a: 4b03 ldr r3, [pc, #12] @ (800c778 ) } 800c76c: 4618 mov r0, r3 800c76e: 370c adds r7, #12 800c770: 46bd mov sp, r7 800c772: bc80 pop {r7} 800c774: 4770 bx lr 800c776: bf00 nop 800c778: 2000001c .word 0x2000001c 0800c77c : * @param fops: CD Interface callback * @retval status */ uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev, USBD_CDC_ItfTypeDef *fops) { 800c77c: b480 push {r7} 800c77e: b085 sub sp, #20 800c780: af00 add r7, sp, #0 800c782: 6078 str r0, [r7, #4] 800c784: 6039 str r1, [r7, #0] uint8_t ret = USBD_FAIL; 800c786: 2302 movs r3, #2 800c788: 73fb strb r3, [r7, #15] if (fops != NULL) 800c78a: 683b ldr r3, [r7, #0] 800c78c: 2b00 cmp r3, #0 800c78e: d005 beq.n 800c79c { pdev->pUserData = fops; 800c790: 687b ldr r3, [r7, #4] 800c792: 683a ldr r2, [r7, #0] 800c794: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc ret = USBD_OK; 800c798: 2300 movs r3, #0 800c79a: 73fb strb r3, [r7, #15] } return ret; 800c79c: 7bfb ldrb r3, [r7, #15] } 800c79e: 4618 mov r0, r3 800c7a0: 3714 adds r7, #20 800c7a2: 46bd mov sp, r7 800c7a4: bc80 pop {r7} 800c7a6: 4770 bx lr 0800c7a8 : * @retval status */ uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff, uint16_t length) { 800c7a8: b480 push {r7} 800c7aa: b087 sub sp, #28 800c7ac: af00 add r7, sp, #0 800c7ae: 60f8 str r0, [r7, #12] 800c7b0: 60b9 str r1, [r7, #8] 800c7b2: 4613 mov r3, r2 800c7b4: 80fb strh r3, [r7, #6] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800c7b6: 68fb ldr r3, [r7, #12] 800c7b8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c7bc: 617b str r3, [r7, #20] hcdc->TxBuffer = pbuff; 800c7be: 697b ldr r3, [r7, #20] 800c7c0: 68ba ldr r2, [r7, #8] 800c7c2: f8c3 2208 str.w r2, [r3, #520] @ 0x208 hcdc->TxLength = length; 800c7c6: 88fa ldrh r2, [r7, #6] 800c7c8: 697b ldr r3, [r7, #20] 800c7ca: f8c3 2210 str.w r2, [r3, #528] @ 0x210 return USBD_OK; 800c7ce: 2300 movs r3, #0 } 800c7d0: 4618 mov r0, r3 800c7d2: 371c adds r7, #28 800c7d4: 46bd mov sp, r7 800c7d6: bc80 pop {r7} 800c7d8: 4770 bx lr 0800c7da : * @param pbuff: Rx Buffer * @retval status */ uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff) { 800c7da: b480 push {r7} 800c7dc: b085 sub sp, #20 800c7de: af00 add r7, sp, #0 800c7e0: 6078 str r0, [r7, #4] 800c7e2: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800c7e4: 687b ldr r3, [r7, #4] 800c7e6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c7ea: 60fb str r3, [r7, #12] hcdc->RxBuffer = pbuff; 800c7ec: 68fb ldr r3, [r7, #12] 800c7ee: 683a ldr r2, [r7, #0] 800c7f0: f8c3 2204 str.w r2, [r3, #516] @ 0x204 return USBD_OK; 800c7f4: 2300 movs r3, #0 } 800c7f6: 4618 mov r0, r3 800c7f8: 3714 adds r7, #20 800c7fa: 46bd mov sp, r7 800c7fc: bc80 pop {r7} 800c7fe: 4770 bx lr 0800c800 : * Transmit packet on IN endpoint * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev) { 800c800: b580 push {r7, lr} 800c802: b084 sub sp, #16 800c804: af00 add r7, sp, #0 800c806: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800c808: 687b ldr r3, [r7, #4] 800c80a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c80e: 60fb str r3, [r7, #12] if (pdev->pClassData != NULL) 800c810: 687b ldr r3, [r7, #4] 800c812: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c816: 2b00 cmp r3, #0 800c818: d01c beq.n 800c854 { if (hcdc->TxState == 0U) 800c81a: 68fb ldr r3, [r7, #12] 800c81c: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 800c820: 2b00 cmp r3, #0 800c822: d115 bne.n 800c850 { /* Tx Transfer in progress */ hcdc->TxState = 1U; 800c824: 68fb ldr r3, [r7, #12] 800c826: 2201 movs r2, #1 800c828: f8c3 2214 str.w r2, [r3, #532] @ 0x214 /* Update the packet total length */ pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength; 800c82c: 68fb ldr r3, [r7, #12] 800c82e: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210 800c832: 687b ldr r3, [r7, #4] 800c834: 631a str r2, [r3, #48] @ 0x30 /* Transmit next packet */ USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 800c836: 68fb ldr r3, [r7, #12] 800c838: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208 (uint16_t)hcdc->TxLength); 800c83c: 68fb ldr r3, [r7, #12] 800c83e: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210 USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 800c842: b29b uxth r3, r3 800c844: 2181 movs r1, #129 @ 0x81 800c846: 6878 ldr r0, [r7, #4] 800c848: f001 fd3e bl 800e2c8 return USBD_OK; 800c84c: 2300 movs r3, #0 800c84e: e002 b.n 800c856 } else { return USBD_BUSY; 800c850: 2301 movs r3, #1 800c852: e000 b.n 800c856 } } else { return USBD_FAIL; 800c854: 2302 movs r3, #2 } } 800c856: 4618 mov r0, r3 800c858: 3710 adds r7, #16 800c85a: 46bd mov sp, r7 800c85c: bd80 pop {r7, pc} 0800c85e : * prepare OUT Endpoint for reception * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev) { 800c85e: b580 push {r7, lr} 800c860: b084 sub sp, #16 800c862: af00 add r7, sp, #0 800c864: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800c866: 687b ldr r3, [r7, #4] 800c868: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c86c: 60fb str r3, [r7, #12] /* Suspend or Resume USB Out process */ if (pdev->pClassData != NULL) 800c86e: 687b ldr r3, [r7, #4] 800c870: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800c874: 2b00 cmp r3, #0 800c876: d017 beq.n 800c8a8 { if (pdev->dev_speed == USBD_SPEED_HIGH) 800c878: 687b ldr r3, [r7, #4] 800c87a: 7c1b ldrb r3, [r3, #16] 800c87c: 2b00 cmp r3, #0 800c87e: d109 bne.n 800c894 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 800c880: 68fb ldr r3, [r7, #12] 800c882: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800c886: f44f 7300 mov.w r3, #512 @ 0x200 800c88a: 2101 movs r1, #1 800c88c: 6878 ldr r0, [r7, #4] 800c88e: f001 fd3e bl 800e30e 800c892: e007 b.n 800c8a4 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 800c894: 68fb ldr r3, [r7, #12] 800c896: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800c89a: 2340 movs r3, #64 @ 0x40 800c89c: 2101 movs r1, #1 800c89e: 6878 ldr r0, [r7, #4] 800c8a0: f001 fd35 bl 800e30e CDC_OUT_EP, hcdc->RxBuffer, CDC_DATA_FS_OUT_PACKET_SIZE); } return USBD_OK; 800c8a4: 2300 movs r3, #0 800c8a6: e000 b.n 800c8aa } else { return USBD_FAIL; 800c8a8: 2302 movs r3, #2 } } 800c8aa: 4618 mov r0, r3 800c8ac: 3710 adds r7, #16 800c8ae: 46bd mov sp, r7 800c8b0: bd80 pop {r7, pc} 0800c8b2 : * @param id: Low level core index * @retval None */ USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) { 800c8b2: b580 push {r7, lr} 800c8b4: b084 sub sp, #16 800c8b6: af00 add r7, sp, #0 800c8b8: 60f8 str r0, [r7, #12] 800c8ba: 60b9 str r1, [r7, #8] 800c8bc: 4613 mov r3, r2 800c8be: 71fb strb r3, [r7, #7] /* Check whether the USB Host handle is valid */ if (pdev == NULL) 800c8c0: 68fb ldr r3, [r7, #12] 800c8c2: 2b00 cmp r3, #0 800c8c4: d101 bne.n 800c8ca { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Device handle"); #endif return USBD_FAIL; 800c8c6: 2302 movs r3, #2 800c8c8: e01a b.n 800c900 } /* Unlink previous class*/ if (pdev->pClass != NULL) 800c8ca: 68fb ldr r3, [r7, #12] 800c8cc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c8d0: 2b00 cmp r3, #0 800c8d2: d003 beq.n 800c8dc { pdev->pClass = NULL; 800c8d4: 68fb ldr r3, [r7, #12] 800c8d6: 2200 movs r2, #0 800c8d8: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 } /* Assign USBD Descriptors */ if (pdesc != NULL) 800c8dc: 68bb ldr r3, [r7, #8] 800c8de: 2b00 cmp r3, #0 800c8e0: d003 beq.n 800c8ea { pdev->pDesc = pdesc; 800c8e2: 68fb ldr r3, [r7, #12] 800c8e4: 68ba ldr r2, [r7, #8] 800c8e6: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0 } /* Set Device initial State */ pdev->dev_state = USBD_STATE_DEFAULT; 800c8ea: 68fb ldr r3, [r7, #12] 800c8ec: 2201 movs r2, #1 800c8ee: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->id = id; 800c8f2: 68fb ldr r3, [r7, #12] 800c8f4: 79fa ldrb r2, [r7, #7] 800c8f6: 701a strb r2, [r3, #0] /* Initialize low level driver */ USBD_LL_Init(pdev); 800c8f8: 68f8 ldr r0, [r7, #12] 800c8fa: f001 fba3 bl 800e044 return USBD_OK; 800c8fe: 2300 movs r3, #0 } 800c900: 4618 mov r0, r3 800c902: 3710 adds r7, #16 800c904: 46bd mov sp, r7 800c906: bd80 pop {r7, pc} 0800c908 : * @param pDevice : Device Handle * @param pclass: Class handle * @retval USBD Status */ USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) { 800c908: b480 push {r7} 800c90a: b085 sub sp, #20 800c90c: af00 add r7, sp, #0 800c90e: 6078 str r0, [r7, #4] 800c910: 6039 str r1, [r7, #0] USBD_StatusTypeDef status = USBD_OK; 800c912: 2300 movs r3, #0 800c914: 73fb strb r3, [r7, #15] if (pclass != NULL) 800c916: 683b ldr r3, [r7, #0] 800c918: 2b00 cmp r3, #0 800c91a: d006 beq.n 800c92a { /* link the class to the USB Device handle */ pdev->pClass = pclass; 800c91c: 687b ldr r3, [r7, #4] 800c91e: 683a ldr r2, [r7, #0] 800c920: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 status = USBD_OK; 800c924: 2300 movs r3, #0 800c926: 73fb strb r3, [r7, #15] 800c928: e001 b.n 800c92e else { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Class handle"); #endif status = USBD_FAIL; 800c92a: 2302 movs r3, #2 800c92c: 73fb strb r3, [r7, #15] } return status; 800c92e: 7bfb ldrb r3, [r7, #15] } 800c930: 4618 mov r0, r3 800c932: 3714 adds r7, #20 800c934: 46bd mov sp, r7 800c936: bc80 pop {r7} 800c938: 4770 bx lr 0800c93a : * Start the USB Device Core. * @param pdev: Device Handle * @retval USBD Status */ USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev) { 800c93a: b580 push {r7, lr} 800c93c: b082 sub sp, #8 800c93e: af00 add r7, sp, #0 800c940: 6078 str r0, [r7, #4] /* Start the low level driver */ USBD_LL_Start(pdev); 800c942: 6878 ldr r0, [r7, #4] 800c944: f001 fbd8 bl 800e0f8 return USBD_OK; 800c948: 2300 movs r3, #0 } 800c94a: 4618 mov r0, r3 800c94c: 3708 adds r7, #8 800c94e: 46bd mov sp, r7 800c950: bd80 pop {r7, pc} 0800c952 : * Launch test mode process * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev) { 800c952: b480 push {r7} 800c954: b083 sub sp, #12 800c956: af00 add r7, sp, #0 800c958: 6078 str r0, [r7, #4] /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 800c95a: 2300 movs r3, #0 } 800c95c: 4618 mov r0, r3 800c95e: 370c adds r7, #12 800c960: 46bd mov sp, r7 800c962: bc80 pop {r7} 800c964: 4770 bx lr 0800c966 : * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800c966: b580 push {r7, lr} 800c968: b084 sub sp, #16 800c96a: af00 add r7, sp, #0 800c96c: 6078 str r0, [r7, #4] 800c96e: 460b mov r3, r1 800c970: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_FAIL; 800c972: 2302 movs r3, #2 800c974: 73fb strb r3, [r7, #15] if (pdev->pClass != NULL) 800c976: 687b ldr r3, [r7, #4] 800c978: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c97c: 2b00 cmp r3, #0 800c97e: d00c beq.n 800c99a { /* Set configuration and Start the Class*/ if (pdev->pClass->Init(pdev, cfgidx) == 0U) 800c980: 687b ldr r3, [r7, #4] 800c982: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c986: 681b ldr r3, [r3, #0] 800c988: 78fa ldrb r2, [r7, #3] 800c98a: 4611 mov r1, r2 800c98c: 6878 ldr r0, [r7, #4] 800c98e: 4798 blx r3 800c990: 4603 mov r3, r0 800c992: 2b00 cmp r3, #0 800c994: d101 bne.n 800c99a { ret = USBD_OK; 800c996: 2300 movs r3, #0 800c998: 73fb strb r3, [r7, #15] } } return ret; 800c99a: 7bfb ldrb r3, [r7, #15] } 800c99c: 4618 mov r0, r3 800c99e: 3710 adds r7, #16 800c9a0: 46bd mov sp, r7 800c9a2: bd80 pop {r7, pc} 0800c9a4 : * @param pdev: device instance * @param cfgidx: configuration index * @retval status: USBD_StatusTypeDef */ USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800c9a4: b580 push {r7, lr} 800c9a6: b082 sub sp, #8 800c9a8: af00 add r7, sp, #0 800c9aa: 6078 str r0, [r7, #4] 800c9ac: 460b mov r3, r1 800c9ae: 70fb strb r3, [r7, #3] /* Clear configuration and De-initialize the Class process*/ pdev->pClass->DeInit(pdev, cfgidx); 800c9b0: 687b ldr r3, [r7, #4] 800c9b2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c9b6: 685b ldr r3, [r3, #4] 800c9b8: 78fa ldrb r2, [r7, #3] 800c9ba: 4611 mov r1, r2 800c9bc: 6878 ldr r0, [r7, #4] 800c9be: 4798 blx r3 return USBD_OK; 800c9c0: 2300 movs r3, #0 } 800c9c2: 4618 mov r0, r3 800c9c4: 3708 adds r7, #8 800c9c6: 46bd mov sp, r7 800c9c8: bd80 pop {r7, pc} 0800c9ca : * Handle the setup stage * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) { 800c9ca: b580 push {r7, lr} 800c9cc: b082 sub sp, #8 800c9ce: af00 add r7, sp, #0 800c9d0: 6078 str r0, [r7, #4] 800c9d2: 6039 str r1, [r7, #0] USBD_ParseSetupRequest(&pdev->request, psetup); 800c9d4: 687b ldr r3, [r7, #4] 800c9d6: f503 732a add.w r3, r3, #680 @ 0x2a8 800c9da: 6839 ldr r1, [r7, #0] 800c9dc: 4618 mov r0, r3 800c9de: f000 fed8 bl 800d792 pdev->ep0_state = USBD_EP0_SETUP; 800c9e2: 687b ldr r3, [r7, #4] 800c9e4: 2201 movs r2, #1 800c9e6: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep0_data_len = pdev->request.wLength; 800c9ea: 687b ldr r3, [r7, #4] 800c9ec: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 800c9f0: 461a mov r2, r3 800c9f2: 687b ldr r3, [r7, #4] 800c9f4: f8c3 2298 str.w r2, [r3, #664] @ 0x298 switch (pdev->request.bmRequest & 0x1FU) 800c9f8: 687b ldr r3, [r7, #4] 800c9fa: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 800c9fe: f003 031f and.w r3, r3, #31 800ca02: 2b02 cmp r3, #2 800ca04: d016 beq.n 800ca34 800ca06: 2b02 cmp r3, #2 800ca08: d81c bhi.n 800ca44 800ca0a: 2b00 cmp r3, #0 800ca0c: d002 beq.n 800ca14 800ca0e: 2b01 cmp r3, #1 800ca10: d008 beq.n 800ca24 800ca12: e017 b.n 800ca44 { case USB_REQ_RECIPIENT_DEVICE: USBD_StdDevReq(pdev, &pdev->request); 800ca14: 687b ldr r3, [r7, #4] 800ca16: f503 732a add.w r3, r3, #680 @ 0x2a8 800ca1a: 4619 mov r1, r3 800ca1c: 6878 ldr r0, [r7, #4] 800ca1e: f000 f9cb bl 800cdb8 break; 800ca22: e01a b.n 800ca5a case USB_REQ_RECIPIENT_INTERFACE: USBD_StdItfReq(pdev, &pdev->request); 800ca24: 687b ldr r3, [r7, #4] 800ca26: f503 732a add.w r3, r3, #680 @ 0x2a8 800ca2a: 4619 mov r1, r3 800ca2c: 6878 ldr r0, [r7, #4] 800ca2e: f000 fa2d bl 800ce8c break; 800ca32: e012 b.n 800ca5a case USB_REQ_RECIPIENT_ENDPOINT: USBD_StdEPReq(pdev, &pdev->request); 800ca34: 687b ldr r3, [r7, #4] 800ca36: f503 732a add.w r3, r3, #680 @ 0x2a8 800ca3a: 4619 mov r1, r3 800ca3c: 6878 ldr r0, [r7, #4] 800ca3e: f000 fa6d bl 800cf1c break; 800ca42: e00a b.n 800ca5a default: USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U)); 800ca44: 687b ldr r3, [r7, #4] 800ca46: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 800ca4a: f023 037f bic.w r3, r3, #127 @ 0x7f 800ca4e: b2db uxtb r3, r3 800ca50: 4619 mov r1, r3 800ca52: 6878 ldr r0, [r7, #4] 800ca54: f001 fbb0 bl 800e1b8 break; 800ca58: bf00 nop } return USBD_OK; 800ca5a: 2300 movs r3, #0 } 800ca5c: 4618 mov r0, r3 800ca5e: 3708 adds r7, #8 800ca60: 46bd mov sp, r7 800ca62: bd80 pop {r7, pc} 0800ca64 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 800ca64: b580 push {r7, lr} 800ca66: b086 sub sp, #24 800ca68: af00 add r7, sp, #0 800ca6a: 60f8 str r0, [r7, #12] 800ca6c: 460b mov r3, r1 800ca6e: 607a str r2, [r7, #4] 800ca70: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 800ca72: 7afb ldrb r3, [r7, #11] 800ca74: 2b00 cmp r3, #0 800ca76: d14b bne.n 800cb10 { pep = &pdev->ep_out[0]; 800ca78: 68fb ldr r3, [r7, #12] 800ca7a: f503 73aa add.w r3, r3, #340 @ 0x154 800ca7e: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_OUT) 800ca80: 68fb ldr r3, [r7, #12] 800ca82: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800ca86: 2b03 cmp r3, #3 800ca88: d134 bne.n 800caf4 { if (pep->rem_length > pep->maxpacket) 800ca8a: 697b ldr r3, [r7, #20] 800ca8c: 68da ldr r2, [r3, #12] 800ca8e: 697b ldr r3, [r7, #20] 800ca90: 691b ldr r3, [r3, #16] 800ca92: 429a cmp r2, r3 800ca94: d919 bls.n 800caca { pep->rem_length -= pep->maxpacket; 800ca96: 697b ldr r3, [r7, #20] 800ca98: 68da ldr r2, [r3, #12] 800ca9a: 697b ldr r3, [r7, #20] 800ca9c: 691b ldr r3, [r3, #16] 800ca9e: 1ad2 subs r2, r2, r3 800caa0: 697b ldr r3, [r7, #20] 800caa2: 60da str r2, [r3, #12] USBD_CtlContinueRx(pdev, pdata, (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800caa4: 697b ldr r3, [r7, #20] 800caa6: 68da ldr r2, [r3, #12] 800caa8: 697b ldr r3, [r7, #20] 800caaa: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 800caac: 429a cmp r2, r3 800caae: d203 bcs.n 800cab8 (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800cab0: 697b ldr r3, [r7, #20] 800cab2: 68db ldr r3, [r3, #12] USBD_CtlContinueRx(pdev, pdata, 800cab4: b29b uxth r3, r3 800cab6: e002 b.n 800cabe (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800cab8: 697b ldr r3, [r7, #20] 800caba: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 800cabc: b29b uxth r3, r3 800cabe: 461a mov r2, r3 800cac0: 6879 ldr r1, [r7, #4] 800cac2: 68f8 ldr r0, [r7, #12] 800cac4: f000 ff54 bl 800d970 800cac8: e038 b.n 800cb3c } else { if ((pdev->pClass->EP0_RxReady != NULL) && 800caca: 68fb ldr r3, [r7, #12] 800cacc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cad0: 691b ldr r3, [r3, #16] 800cad2: 2b00 cmp r3, #0 800cad4: d00a beq.n 800caec (pdev->dev_state == USBD_STATE_CONFIGURED)) 800cad6: 68fb ldr r3, [r7, #12] 800cad8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_RxReady != NULL) && 800cadc: 2b03 cmp r3, #3 800cade: d105 bne.n 800caec { pdev->pClass->EP0_RxReady(pdev); 800cae0: 68fb ldr r3, [r7, #12] 800cae2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cae6: 691b ldr r3, [r3, #16] 800cae8: 68f8 ldr r0, [r7, #12] 800caea: 4798 blx r3 } USBD_CtlSendStatus(pdev); 800caec: 68f8 ldr r0, [r7, #12] 800caee: f000 ff51 bl 800d994 800caf2: e023 b.n 800cb3c } } else { if (pdev->ep0_state == USBD_EP0_STATUS_OUT) 800caf4: 68fb ldr r3, [r7, #12] 800caf6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800cafa: 2b05 cmp r3, #5 800cafc: d11e bne.n 800cb3c { /* * STATUS PHASE completed, update ep0_state to idle */ pdev->ep0_state = USBD_EP0_IDLE; 800cafe: 68fb ldr r3, [r7, #12] 800cb00: 2200 movs r2, #0 800cb02: f8c3 2294 str.w r2, [r3, #660] @ 0x294 USBD_LL_StallEP(pdev, 0U); 800cb06: 2100 movs r1, #0 800cb08: 68f8 ldr r0, [r7, #12] 800cb0a: f001 fb55 bl 800e1b8 800cb0e: e015 b.n 800cb3c } } } else if ((pdev->pClass->DataOut != NULL) && 800cb10: 68fb ldr r3, [r7, #12] 800cb12: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cb16: 699b ldr r3, [r3, #24] 800cb18: 2b00 cmp r3, #0 800cb1a: d00d beq.n 800cb38 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800cb1c: 68fb ldr r3, [r7, #12] 800cb1e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataOut != NULL) && 800cb22: 2b03 cmp r3, #3 800cb24: d108 bne.n 800cb38 { pdev->pClass->DataOut(pdev, epnum); 800cb26: 68fb ldr r3, [r7, #12] 800cb28: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cb2c: 699b ldr r3, [r3, #24] 800cb2e: 7afa ldrb r2, [r7, #11] 800cb30: 4611 mov r1, r2 800cb32: 68f8 ldr r0, [r7, #12] 800cb34: 4798 blx r3 800cb36: e001 b.n 800cb3c } else { /* should never be in this condition */ return USBD_FAIL; 800cb38: 2302 movs r3, #2 800cb3a: e000 b.n 800cb3e } return USBD_OK; 800cb3c: 2300 movs r3, #0 } 800cb3e: 4618 mov r0, r3 800cb40: 3718 adds r7, #24 800cb42: 46bd mov sp, r7 800cb44: bd80 pop {r7, pc} 0800cb46 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 800cb46: b580 push {r7, lr} 800cb48: b086 sub sp, #24 800cb4a: af00 add r7, sp, #0 800cb4c: 60f8 str r0, [r7, #12] 800cb4e: 460b mov r3, r1 800cb50: 607a str r2, [r7, #4] 800cb52: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 800cb54: 7afb ldrb r3, [r7, #11] 800cb56: 2b00 cmp r3, #0 800cb58: d17f bne.n 800cc5a { pep = &pdev->ep_in[0]; 800cb5a: 68fb ldr r3, [r7, #12] 800cb5c: 3314 adds r3, #20 800cb5e: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_IN) 800cb60: 68fb ldr r3, [r7, #12] 800cb62: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800cb66: 2b02 cmp r3, #2 800cb68: d15c bne.n 800cc24 { if (pep->rem_length > pep->maxpacket) 800cb6a: 697b ldr r3, [r7, #20] 800cb6c: 68da ldr r2, [r3, #12] 800cb6e: 697b ldr r3, [r7, #20] 800cb70: 691b ldr r3, [r3, #16] 800cb72: 429a cmp r2, r3 800cb74: d915 bls.n 800cba2 { pep->rem_length -= pep->maxpacket; 800cb76: 697b ldr r3, [r7, #20] 800cb78: 68da ldr r2, [r3, #12] 800cb7a: 697b ldr r3, [r7, #20] 800cb7c: 691b ldr r3, [r3, #16] 800cb7e: 1ad2 subs r2, r2, r3 800cb80: 697b ldr r3, [r7, #20] 800cb82: 60da str r2, [r3, #12] USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length); 800cb84: 697b ldr r3, [r7, #20] 800cb86: 68db ldr r3, [r3, #12] 800cb88: b29b uxth r3, r3 800cb8a: 461a mov r2, r3 800cb8c: 6879 ldr r1, [r7, #4] 800cb8e: 68f8 ldr r0, [r7, #12] 800cb90: f000 febe bl 800d910 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800cb94: 2300 movs r3, #0 800cb96: 2200 movs r2, #0 800cb98: 2100 movs r1, #0 800cb9a: 68f8 ldr r0, [r7, #12] 800cb9c: f001 fbb7 bl 800e30e 800cba0: e04e b.n 800cc40 } else { /* last packet is MPS multiple, so send ZLP packet */ if ((pep->total_length % pep->maxpacket == 0U) && 800cba2: 697b ldr r3, [r7, #20] 800cba4: 689b ldr r3, [r3, #8] 800cba6: 697a ldr r2, [r7, #20] 800cba8: 6912 ldr r2, [r2, #16] 800cbaa: fbb3 f1f2 udiv r1, r3, r2 800cbae: fb01 f202 mul.w r2, r1, r2 800cbb2: 1a9b subs r3, r3, r2 800cbb4: 2b00 cmp r3, #0 800cbb6: d11c bne.n 800cbf2 (pep->total_length >= pep->maxpacket) && 800cbb8: 697b ldr r3, [r7, #20] 800cbba: 689a ldr r2, [r3, #8] 800cbbc: 697b ldr r3, [r7, #20] 800cbbe: 691b ldr r3, [r3, #16] if ((pep->total_length % pep->maxpacket == 0U) && 800cbc0: 429a cmp r2, r3 800cbc2: d316 bcc.n 800cbf2 (pep->total_length < pdev->ep0_data_len)) 800cbc4: 697b ldr r3, [r7, #20] 800cbc6: 689a ldr r2, [r3, #8] 800cbc8: 68fb ldr r3, [r7, #12] 800cbca: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298 (pep->total_length >= pep->maxpacket) && 800cbce: 429a cmp r2, r3 800cbd0: d20f bcs.n 800cbf2 { USBD_CtlContinueSendData(pdev, NULL, 0U); 800cbd2: 2200 movs r2, #0 800cbd4: 2100 movs r1, #0 800cbd6: 68f8 ldr r0, [r7, #12] 800cbd8: f000 fe9a bl 800d910 pdev->ep0_data_len = 0U; 800cbdc: 68fb ldr r3, [r7, #12] 800cbde: 2200 movs r2, #0 800cbe0: f8c3 2298 str.w r2, [r3, #664] @ 0x298 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800cbe4: 2300 movs r3, #0 800cbe6: 2200 movs r2, #0 800cbe8: 2100 movs r1, #0 800cbea: 68f8 ldr r0, [r7, #12] 800cbec: f001 fb8f bl 800e30e 800cbf0: e026 b.n 800cc40 } else { if ((pdev->pClass->EP0_TxSent != NULL) && 800cbf2: 68fb ldr r3, [r7, #12] 800cbf4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cbf8: 68db ldr r3, [r3, #12] 800cbfa: 2b00 cmp r3, #0 800cbfc: d00a beq.n 800cc14 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800cbfe: 68fb ldr r3, [r7, #12] 800cc00: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_TxSent != NULL) && 800cc04: 2b03 cmp r3, #3 800cc06: d105 bne.n 800cc14 { pdev->pClass->EP0_TxSent(pdev); 800cc08: 68fb ldr r3, [r7, #12] 800cc0a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cc0e: 68db ldr r3, [r3, #12] 800cc10: 68f8 ldr r0, [r7, #12] 800cc12: 4798 blx r3 } USBD_LL_StallEP(pdev, 0x80U); 800cc14: 2180 movs r1, #128 @ 0x80 800cc16: 68f8 ldr r0, [r7, #12] 800cc18: f001 face bl 800e1b8 USBD_CtlReceiveStatus(pdev); 800cc1c: 68f8 ldr r0, [r7, #12] 800cc1e: f000 fecc bl 800d9ba 800cc22: e00d b.n 800cc40 } } } else { if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 800cc24: 68fb ldr r3, [r7, #12] 800cc26: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800cc2a: 2b04 cmp r3, #4 800cc2c: d004 beq.n 800cc38 (pdev->ep0_state == USBD_EP0_IDLE)) 800cc2e: 68fb ldr r3, [r7, #12] 800cc30: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 800cc34: 2b00 cmp r3, #0 800cc36: d103 bne.n 800cc40 { USBD_LL_StallEP(pdev, 0x80U); 800cc38: 2180 movs r1, #128 @ 0x80 800cc3a: 68f8 ldr r0, [r7, #12] 800cc3c: f001 fabc bl 800e1b8 } } if (pdev->dev_test_mode == 1U) 800cc40: 68fb ldr r3, [r7, #12] 800cc42: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0 800cc46: 2b01 cmp r3, #1 800cc48: d11d bne.n 800cc86 { USBD_RunTestMode(pdev); 800cc4a: 68f8 ldr r0, [r7, #12] 800cc4c: f7ff fe81 bl 800c952 pdev->dev_test_mode = 0U; 800cc50: 68fb ldr r3, [r7, #12] 800cc52: 2200 movs r2, #0 800cc54: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 800cc58: e015 b.n 800cc86 } } else if ((pdev->pClass->DataIn != NULL) && 800cc5a: 68fb ldr r3, [r7, #12] 800cc5c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cc60: 695b ldr r3, [r3, #20] 800cc62: 2b00 cmp r3, #0 800cc64: d00d beq.n 800cc82 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800cc66: 68fb ldr r3, [r7, #12] 800cc68: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataIn != NULL) && 800cc6c: 2b03 cmp r3, #3 800cc6e: d108 bne.n 800cc82 { pdev->pClass->DataIn(pdev, epnum); 800cc70: 68fb ldr r3, [r7, #12] 800cc72: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cc76: 695b ldr r3, [r3, #20] 800cc78: 7afa ldrb r2, [r7, #11] 800cc7a: 4611 mov r1, r2 800cc7c: 68f8 ldr r0, [r7, #12] 800cc7e: 4798 blx r3 800cc80: e001 b.n 800cc86 } else { /* should never be in this condition */ return USBD_FAIL; 800cc82: 2302 movs r3, #2 800cc84: e000 b.n 800cc88 } return USBD_OK; 800cc86: 2300 movs r3, #0 } 800cc88: 4618 mov r0, r3 800cc8a: 3718 adds r7, #24 800cc8c: 46bd mov sp, r7 800cc8e: bd80 pop {r7, pc} 0800cc90 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) { 800cc90: b580 push {r7, lr} 800cc92: b082 sub sp, #8 800cc94: af00 add r7, sp, #0 800cc96: 6078 str r0, [r7, #4] /* Open EP0 OUT */ USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 800cc98: 2340 movs r3, #64 @ 0x40 800cc9a: 2200 movs r2, #0 800cc9c: 2100 movs r1, #0 800cc9e: 6878 ldr r0, [r7, #4] 800cca0: f001 fa45 bl 800e12e pdev->ep_out[0x00U & 0xFU].is_used = 1U; 800cca4: 687b ldr r3, [r7, #4] 800cca6: 2201 movs r2, #1 800cca8: f8c3 2158 str.w r2, [r3, #344] @ 0x158 pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; 800ccac: 687b ldr r3, [r7, #4] 800ccae: 2240 movs r2, #64 @ 0x40 800ccb0: f8c3 2164 str.w r2, [r3, #356] @ 0x164 /* Open EP0 IN */ USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 800ccb4: 2340 movs r3, #64 @ 0x40 800ccb6: 2200 movs r2, #0 800ccb8: 2180 movs r1, #128 @ 0x80 800ccba: 6878 ldr r0, [r7, #4] 800ccbc: f001 fa37 bl 800e12e pdev->ep_in[0x80U & 0xFU].is_used = 1U; 800ccc0: 687b ldr r3, [r7, #4] 800ccc2: 2201 movs r2, #1 800ccc4: 619a str r2, [r3, #24] pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; 800ccc6: 687b ldr r3, [r7, #4] 800ccc8: 2240 movs r2, #64 @ 0x40 800ccca: 625a str r2, [r3, #36] @ 0x24 /* Upon Reset call user call back */ pdev->dev_state = USBD_STATE_DEFAULT; 800cccc: 687b ldr r3, [r7, #4] 800ccce: 2201 movs r2, #1 800ccd0: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->ep0_state = USBD_EP0_IDLE; 800ccd4: 687b ldr r3, [r7, #4] 800ccd6: 2200 movs r2, #0 800ccd8: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->dev_config = 0U; 800ccdc: 687b ldr r3, [r7, #4] 800ccde: 2200 movs r2, #0 800cce0: 605a str r2, [r3, #4] pdev->dev_remote_wakeup = 0U; 800cce2: 687b ldr r3, [r7, #4] 800cce4: 2200 movs r2, #0 800cce6: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 if (pdev->pClassData) 800ccea: 687b ldr r3, [r7, #4] 800ccec: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800ccf0: 2b00 cmp r3, #0 800ccf2: d009 beq.n 800cd08 { pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config); 800ccf4: 687b ldr r3, [r7, #4] 800ccf6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800ccfa: 685b ldr r3, [r3, #4] 800ccfc: 687a ldr r2, [r7, #4] 800ccfe: 6852 ldr r2, [r2, #4] 800cd00: b2d2 uxtb r2, r2 800cd02: 4611 mov r1, r2 800cd04: 6878 ldr r0, [r7, #4] 800cd06: 4798 blx r3 } return USBD_OK; 800cd08: 2300 movs r3, #0 } 800cd0a: 4618 mov r0, r3 800cd0c: 3708 adds r7, #8 800cd0e: 46bd mov sp, r7 800cd10: bd80 pop {r7, pc} 0800cd12 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) { 800cd12: b480 push {r7} 800cd14: b083 sub sp, #12 800cd16: af00 add r7, sp, #0 800cd18: 6078 str r0, [r7, #4] 800cd1a: 460b mov r3, r1 800cd1c: 70fb strb r3, [r7, #3] pdev->dev_speed = speed; 800cd1e: 687b ldr r3, [r7, #4] 800cd20: 78fa ldrb r2, [r7, #3] 800cd22: 741a strb r2, [r3, #16] return USBD_OK; 800cd24: 2300 movs r3, #0 } 800cd26: 4618 mov r0, r3 800cd28: 370c adds r7, #12 800cd2a: 46bd mov sp, r7 800cd2c: bc80 pop {r7} 800cd2e: 4770 bx lr 0800cd30 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) { 800cd30: b480 push {r7} 800cd32: b083 sub sp, #12 800cd34: af00 add r7, sp, #0 800cd36: 6078 str r0, [r7, #4] pdev->dev_old_state = pdev->dev_state; 800cd38: 687b ldr r3, [r7, #4] 800cd3a: f893 229c ldrb.w r2, [r3, #668] @ 0x29c 800cd3e: 687b ldr r3, [r7, #4] 800cd40: f883 229d strb.w r2, [r3, #669] @ 0x29d pdev->dev_state = USBD_STATE_SUSPENDED; 800cd44: 687b ldr r3, [r7, #4] 800cd46: 2204 movs r2, #4 800cd48: f883 229c strb.w r2, [r3, #668] @ 0x29c return USBD_OK; 800cd4c: 2300 movs r3, #0 } 800cd4e: 4618 mov r0, r3 800cd50: 370c adds r7, #12 800cd52: 46bd mov sp, r7 800cd54: bc80 pop {r7} 800cd56: 4770 bx lr 0800cd58 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) { 800cd58: b480 push {r7} 800cd5a: b083 sub sp, #12 800cd5c: af00 add r7, sp, #0 800cd5e: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_SUSPENDED) 800cd60: 687b ldr r3, [r7, #4] 800cd62: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800cd66: 2b04 cmp r3, #4 800cd68: d105 bne.n 800cd76 { pdev->dev_state = pdev->dev_old_state; 800cd6a: 687b ldr r3, [r7, #4] 800cd6c: f893 229d ldrb.w r2, [r3, #669] @ 0x29d 800cd70: 687b ldr r3, [r7, #4] 800cd72: f883 229c strb.w r2, [r3, #668] @ 0x29c } return USBD_OK; 800cd76: 2300 movs r3, #0 } 800cd78: 4618 mov r0, r3 800cd7a: 370c adds r7, #12 800cd7c: 46bd mov sp, r7 800cd7e: bc80 pop {r7} 800cd80: 4770 bx lr 0800cd82 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) { 800cd82: b580 push {r7, lr} 800cd84: b082 sub sp, #8 800cd86: af00 add r7, sp, #0 800cd88: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_CONFIGURED) 800cd8a: 687b ldr r3, [r7, #4] 800cd8c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800cd90: 2b03 cmp r3, #3 800cd92: d10b bne.n 800cdac { if (pdev->pClass->SOF != NULL) 800cd94: 687b ldr r3, [r7, #4] 800cd96: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cd9a: 69db ldr r3, [r3, #28] 800cd9c: 2b00 cmp r3, #0 800cd9e: d005 beq.n 800cdac { pdev->pClass->SOF(pdev); 800cda0: 687b ldr r3, [r7, #4] 800cda2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cda6: 69db ldr r3, [r3, #28] 800cda8: 6878 ldr r0, [r7, #4] 800cdaa: 4798 blx r3 } } return USBD_OK; 800cdac: 2300 movs r3, #0 } 800cdae: 4618 mov r0, r3 800cdb0: 3708 adds r7, #8 800cdb2: 46bd mov sp, r7 800cdb4: bd80 pop {r7, pc} ... 0800cdb8 : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800cdb8: b580 push {r7, lr} 800cdba: b084 sub sp, #16 800cdbc: af00 add r7, sp, #0 800cdbe: 6078 str r0, [r7, #4] 800cdc0: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800cdc2: 2300 movs r3, #0 800cdc4: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800cdc6: 683b ldr r3, [r7, #0] 800cdc8: 781b ldrb r3, [r3, #0] 800cdca: f003 0360 and.w r3, r3, #96 @ 0x60 800cdce: 2b40 cmp r3, #64 @ 0x40 800cdd0: d005 beq.n 800cdde 800cdd2: 2b40 cmp r3, #64 @ 0x40 800cdd4: d84f bhi.n 800ce76 800cdd6: 2b00 cmp r3, #0 800cdd8: d009 beq.n 800cdee 800cdda: 2b20 cmp r3, #32 800cddc: d14b bne.n 800ce76 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 800cdde: 687b ldr r3, [r7, #4] 800cde0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cde4: 689b ldr r3, [r3, #8] 800cde6: 6839 ldr r1, [r7, #0] 800cde8: 6878 ldr r0, [r7, #4] 800cdea: 4798 blx r3 break; 800cdec: e048 b.n 800ce80 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800cdee: 683b ldr r3, [r7, #0] 800cdf0: 785b ldrb r3, [r3, #1] 800cdf2: 2b09 cmp r3, #9 800cdf4: d839 bhi.n 800ce6a 800cdf6: a201 add r2, pc, #4 @ (adr r2, 800cdfc ) 800cdf8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cdfc: 0800ce4d .word 0x0800ce4d 800ce00: 0800ce61 .word 0x0800ce61 800ce04: 0800ce6b .word 0x0800ce6b 800ce08: 0800ce57 .word 0x0800ce57 800ce0c: 0800ce6b .word 0x0800ce6b 800ce10: 0800ce2f .word 0x0800ce2f 800ce14: 0800ce25 .word 0x0800ce25 800ce18: 0800ce6b .word 0x0800ce6b 800ce1c: 0800ce43 .word 0x0800ce43 800ce20: 0800ce39 .word 0x0800ce39 { case USB_REQ_GET_DESCRIPTOR: USBD_GetDescriptor(pdev, req); 800ce24: 6839 ldr r1, [r7, #0] 800ce26: 6878 ldr r0, [r7, #4] 800ce28: f000 f9dc bl 800d1e4 break; 800ce2c: e022 b.n 800ce74 case USB_REQ_SET_ADDRESS: USBD_SetAddress(pdev, req); 800ce2e: 6839 ldr r1, [r7, #0] 800ce30: 6878 ldr r0, [r7, #4] 800ce32: f000 fb3f bl 800d4b4 break; 800ce36: e01d b.n 800ce74 case USB_REQ_SET_CONFIGURATION: USBD_SetConfig(pdev, req); 800ce38: 6839 ldr r1, [r7, #0] 800ce3a: 6878 ldr r0, [r7, #4] 800ce3c: f000 fb7e bl 800d53c break; 800ce40: e018 b.n 800ce74 case USB_REQ_GET_CONFIGURATION: USBD_GetConfig(pdev, req); 800ce42: 6839 ldr r1, [r7, #0] 800ce44: 6878 ldr r0, [r7, #4] 800ce46: f000 fc07 bl 800d658 break; 800ce4a: e013 b.n 800ce74 case USB_REQ_GET_STATUS: USBD_GetStatus(pdev, req); 800ce4c: 6839 ldr r1, [r7, #0] 800ce4e: 6878 ldr r0, [r7, #4] 800ce50: f000 fc37 bl 800d6c2 break; 800ce54: e00e b.n 800ce74 case USB_REQ_SET_FEATURE: USBD_SetFeature(pdev, req); 800ce56: 6839 ldr r1, [r7, #0] 800ce58: 6878 ldr r0, [r7, #4] 800ce5a: f000 fc65 bl 800d728 break; 800ce5e: e009 b.n 800ce74 case USB_REQ_CLEAR_FEATURE: USBD_ClrFeature(pdev, req); 800ce60: 6839 ldr r1, [r7, #0] 800ce62: 6878 ldr r0, [r7, #4] 800ce64: f000 fc74 bl 800d750 break; 800ce68: e004 b.n 800ce74 default: USBD_CtlError(pdev, req); 800ce6a: 6839 ldr r1, [r7, #0] 800ce6c: 6878 ldr r0, [r7, #4] 800ce6e: f000 fcc9 bl 800d804 break; 800ce72: bf00 nop } break; 800ce74: e004 b.n 800ce80 default: USBD_CtlError(pdev, req); 800ce76: 6839 ldr r1, [r7, #0] 800ce78: 6878 ldr r0, [r7, #4] 800ce7a: f000 fcc3 bl 800d804 break; 800ce7e: bf00 nop } return ret; 800ce80: 7bfb ldrb r3, [r7, #15] } 800ce82: 4618 mov r0, r3 800ce84: 3710 adds r7, #16 800ce86: 46bd mov sp, r7 800ce88: bd80 pop {r7, pc} 800ce8a: bf00 nop 0800ce8c : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800ce8c: b580 push {r7, lr} 800ce8e: b084 sub sp, #16 800ce90: af00 add r7, sp, #0 800ce92: 6078 str r0, [r7, #4] 800ce94: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800ce96: 2300 movs r3, #0 800ce98: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800ce9a: 683b ldr r3, [r7, #0] 800ce9c: 781b ldrb r3, [r3, #0] 800ce9e: f003 0360 and.w r3, r3, #96 @ 0x60 800cea2: 2b40 cmp r3, #64 @ 0x40 800cea4: d005 beq.n 800ceb2 800cea6: 2b40 cmp r3, #64 @ 0x40 800cea8: d82e bhi.n 800cf08 800ceaa: 2b00 cmp r3, #0 800ceac: d001 beq.n 800ceb2 800ceae: 2b20 cmp r3, #32 800ceb0: d12a bne.n 800cf08 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: case USB_REQ_TYPE_STANDARD: switch (pdev->dev_state) 800ceb2: 687b ldr r3, [r7, #4] 800ceb4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800ceb8: 3b01 subs r3, #1 800ceba: 2b02 cmp r3, #2 800cebc: d81d bhi.n 800cefa { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) 800cebe: 683b ldr r3, [r7, #0] 800cec0: 889b ldrh r3, [r3, #4] 800cec2: b2db uxtb r3, r3 800cec4: 2b01 cmp r3, #1 800cec6: d813 bhi.n 800cef0 { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 800cec8: 687b ldr r3, [r7, #4] 800ceca: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cece: 689b ldr r3, [r3, #8] 800ced0: 6839 ldr r1, [r7, #0] 800ced2: 6878 ldr r0, [r7, #4] 800ced4: 4798 blx r3 800ced6: 4603 mov r3, r0 800ced8: 73fb strb r3, [r7, #15] if ((req->wLength == 0U) && (ret == USBD_OK)) 800ceda: 683b ldr r3, [r7, #0] 800cedc: 88db ldrh r3, [r3, #6] 800cede: 2b00 cmp r3, #0 800cee0: d110 bne.n 800cf04 800cee2: 7bfb ldrb r3, [r7, #15] 800cee4: 2b00 cmp r3, #0 800cee6: d10d bne.n 800cf04 { USBD_CtlSendStatus(pdev); 800cee8: 6878 ldr r0, [r7, #4] 800ceea: f000 fd53 bl 800d994 } else { USBD_CtlError(pdev, req); } break; 800ceee: e009 b.n 800cf04 USBD_CtlError(pdev, req); 800cef0: 6839 ldr r1, [r7, #0] 800cef2: 6878 ldr r0, [r7, #4] 800cef4: f000 fc86 bl 800d804 break; 800cef8: e004 b.n 800cf04 default: USBD_CtlError(pdev, req); 800cefa: 6839 ldr r1, [r7, #0] 800cefc: 6878 ldr r0, [r7, #4] 800cefe: f000 fc81 bl 800d804 break; 800cf02: e000 b.n 800cf06 break; 800cf04: bf00 nop } break; 800cf06: e004 b.n 800cf12 default: USBD_CtlError(pdev, req); 800cf08: 6839 ldr r1, [r7, #0] 800cf0a: 6878 ldr r0, [r7, #4] 800cf0c: f000 fc7a bl 800d804 break; 800cf10: bf00 nop } return USBD_OK; 800cf12: 2300 movs r3, #0 } 800cf14: 4618 mov r0, r3 800cf16: 3710 adds r7, #16 800cf18: 46bd mov sp, r7 800cf1a: bd80 pop {r7, pc} 0800cf1c : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800cf1c: b580 push {r7, lr} 800cf1e: b084 sub sp, #16 800cf20: af00 add r7, sp, #0 800cf22: 6078 str r0, [r7, #4] 800cf24: 6039 str r1, [r7, #0] USBD_EndpointTypeDef *pep; uint8_t ep_addr; USBD_StatusTypeDef ret = USBD_OK; 800cf26: 2300 movs r3, #0 800cf28: 73fb strb r3, [r7, #15] ep_addr = LOBYTE(req->wIndex); 800cf2a: 683b ldr r3, [r7, #0] 800cf2c: 889b ldrh r3, [r3, #4] 800cf2e: 73bb strb r3, [r7, #14] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800cf30: 683b ldr r3, [r7, #0] 800cf32: 781b ldrb r3, [r3, #0] 800cf34: f003 0360 and.w r3, r3, #96 @ 0x60 800cf38: 2b40 cmp r3, #64 @ 0x40 800cf3a: d007 beq.n 800cf4c 800cf3c: 2b40 cmp r3, #64 @ 0x40 800cf3e: f200 8146 bhi.w 800d1ce 800cf42: 2b00 cmp r3, #0 800cf44: d00a beq.n 800cf5c 800cf46: 2b20 cmp r3, #32 800cf48: f040 8141 bne.w 800d1ce { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 800cf4c: 687b ldr r3, [r7, #4] 800cf4e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cf52: 689b ldr r3, [r3, #8] 800cf54: 6839 ldr r1, [r7, #0] 800cf56: 6878 ldr r0, [r7, #4] 800cf58: 4798 blx r3 break; 800cf5a: e13d b.n 800d1d8 case USB_REQ_TYPE_STANDARD: /* Check if it is a class request */ if ((req->bmRequest & 0x60U) == 0x20U) 800cf5c: 683b ldr r3, [r7, #0] 800cf5e: 781b ldrb r3, [r3, #0] 800cf60: f003 0360 and.w r3, r3, #96 @ 0x60 800cf64: 2b20 cmp r3, #32 800cf66: d10a bne.n 800cf7e { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 800cf68: 687b ldr r3, [r7, #4] 800cf6a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800cf6e: 689b ldr r3, [r3, #8] 800cf70: 6839 ldr r1, [r7, #0] 800cf72: 6878 ldr r0, [r7, #4] 800cf74: 4798 blx r3 800cf76: 4603 mov r3, r0 800cf78: 73fb strb r3, [r7, #15] return ret; 800cf7a: 7bfb ldrb r3, [r7, #15] 800cf7c: e12d b.n 800d1da } switch (req->bRequest) 800cf7e: 683b ldr r3, [r7, #0] 800cf80: 785b ldrb r3, [r3, #1] 800cf82: 2b03 cmp r3, #3 800cf84: d007 beq.n 800cf96 800cf86: 2b03 cmp r3, #3 800cf88: f300 811b bgt.w 800d1c2 800cf8c: 2b00 cmp r3, #0 800cf8e: d072 beq.n 800d076 800cf90: 2b01 cmp r3, #1 800cf92: d03a beq.n 800d00a 800cf94: e115 b.n 800d1c2 { case USB_REQ_SET_FEATURE: switch (pdev->dev_state) 800cf96: 687b ldr r3, [r7, #4] 800cf98: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800cf9c: 2b02 cmp r3, #2 800cf9e: d002 beq.n 800cfa6 800cfa0: 2b03 cmp r3, #3 800cfa2: d015 beq.n 800cfd0 800cfa4: e02b b.n 800cffe { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800cfa6: 7bbb ldrb r3, [r7, #14] 800cfa8: 2b00 cmp r3, #0 800cfaa: d00c beq.n 800cfc6 800cfac: 7bbb ldrb r3, [r7, #14] 800cfae: 2b80 cmp r3, #128 @ 0x80 800cfb0: d009 beq.n 800cfc6 { USBD_LL_StallEP(pdev, ep_addr); 800cfb2: 7bbb ldrb r3, [r7, #14] 800cfb4: 4619 mov r1, r3 800cfb6: 6878 ldr r0, [r7, #4] 800cfb8: f001 f8fe bl 800e1b8 USBD_LL_StallEP(pdev, 0x80U); 800cfbc: 2180 movs r1, #128 @ 0x80 800cfbe: 6878 ldr r0, [r7, #4] 800cfc0: f001 f8fa bl 800e1b8 } else { USBD_CtlError(pdev, req); } break; 800cfc4: e020 b.n 800d008 USBD_CtlError(pdev, req); 800cfc6: 6839 ldr r1, [r7, #0] 800cfc8: 6878 ldr r0, [r7, #4] 800cfca: f000 fc1b bl 800d804 break; 800cfce: e01b b.n 800d008 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 800cfd0: 683b ldr r3, [r7, #0] 800cfd2: 885b ldrh r3, [r3, #2] 800cfd4: 2b00 cmp r3, #0 800cfd6: d10e bne.n 800cff6 { if ((ep_addr != 0x00U) && 800cfd8: 7bbb ldrb r3, [r7, #14] 800cfda: 2b00 cmp r3, #0 800cfdc: d00b beq.n 800cff6 800cfde: 7bbb ldrb r3, [r7, #14] 800cfe0: 2b80 cmp r3, #128 @ 0x80 800cfe2: d008 beq.n 800cff6 (ep_addr != 0x80U) && (req->wLength == 0x00U)) 800cfe4: 683b ldr r3, [r7, #0] 800cfe6: 88db ldrh r3, [r3, #6] 800cfe8: 2b00 cmp r3, #0 800cfea: d104 bne.n 800cff6 { USBD_LL_StallEP(pdev, ep_addr); 800cfec: 7bbb ldrb r3, [r7, #14] 800cfee: 4619 mov r1, r3 800cff0: 6878 ldr r0, [r7, #4] 800cff2: f001 f8e1 bl 800e1b8 } } USBD_CtlSendStatus(pdev); 800cff6: 6878 ldr r0, [r7, #4] 800cff8: f000 fccc bl 800d994 break; 800cffc: e004 b.n 800d008 default: USBD_CtlError(pdev, req); 800cffe: 6839 ldr r1, [r7, #0] 800d000: 6878 ldr r0, [r7, #4] 800d002: f000 fbff bl 800d804 break; 800d006: bf00 nop } break; 800d008: e0e0 b.n 800d1cc case USB_REQ_CLEAR_FEATURE: switch (pdev->dev_state) 800d00a: 687b ldr r3, [r7, #4] 800d00c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800d010: 2b02 cmp r3, #2 800d012: d002 beq.n 800d01a 800d014: 2b03 cmp r3, #3 800d016: d015 beq.n 800d044 800d018: e026 b.n 800d068 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800d01a: 7bbb ldrb r3, [r7, #14] 800d01c: 2b00 cmp r3, #0 800d01e: d00c beq.n 800d03a 800d020: 7bbb ldrb r3, [r7, #14] 800d022: 2b80 cmp r3, #128 @ 0x80 800d024: d009 beq.n 800d03a { USBD_LL_StallEP(pdev, ep_addr); 800d026: 7bbb ldrb r3, [r7, #14] 800d028: 4619 mov r1, r3 800d02a: 6878 ldr r0, [r7, #4] 800d02c: f001 f8c4 bl 800e1b8 USBD_LL_StallEP(pdev, 0x80U); 800d030: 2180 movs r1, #128 @ 0x80 800d032: 6878 ldr r0, [r7, #4] 800d034: f001 f8c0 bl 800e1b8 } else { USBD_CtlError(pdev, req); } break; 800d038: e01c b.n 800d074 USBD_CtlError(pdev, req); 800d03a: 6839 ldr r1, [r7, #0] 800d03c: 6878 ldr r0, [r7, #4] 800d03e: f000 fbe1 bl 800d804 break; 800d042: e017 b.n 800d074 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 800d044: 683b ldr r3, [r7, #0] 800d046: 885b ldrh r3, [r3, #2] 800d048: 2b00 cmp r3, #0 800d04a: d112 bne.n 800d072 { if ((ep_addr & 0x7FU) != 0x00U) 800d04c: 7bbb ldrb r3, [r7, #14] 800d04e: f003 037f and.w r3, r3, #127 @ 0x7f 800d052: 2b00 cmp r3, #0 800d054: d004 beq.n 800d060 { USBD_LL_ClearStallEP(pdev, ep_addr); 800d056: 7bbb ldrb r3, [r7, #14] 800d058: 4619 mov r1, r3 800d05a: 6878 ldr r0, [r7, #4] 800d05c: f001 f8cb bl 800e1f6 } USBD_CtlSendStatus(pdev); 800d060: 6878 ldr r0, [r7, #4] 800d062: f000 fc97 bl 800d994 } break; 800d066: e004 b.n 800d072 default: USBD_CtlError(pdev, req); 800d068: 6839 ldr r1, [r7, #0] 800d06a: 6878 ldr r0, [r7, #4] 800d06c: f000 fbca bl 800d804 break; 800d070: e000 b.n 800d074 break; 800d072: bf00 nop } break; 800d074: e0aa b.n 800d1cc case USB_REQ_GET_STATUS: switch (pdev->dev_state) 800d076: 687b ldr r3, [r7, #4] 800d078: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800d07c: 2b02 cmp r3, #2 800d07e: d002 beq.n 800d086 800d080: 2b03 cmp r3, #3 800d082: d032 beq.n 800d0ea 800d084: e097 b.n 800d1b6 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800d086: 7bbb ldrb r3, [r7, #14] 800d088: 2b00 cmp r3, #0 800d08a: d007 beq.n 800d09c 800d08c: 7bbb ldrb r3, [r7, #14] 800d08e: 2b80 cmp r3, #128 @ 0x80 800d090: d004 beq.n 800d09c { USBD_CtlError(pdev, req); 800d092: 6839 ldr r1, [r7, #0] 800d094: 6878 ldr r0, [r7, #4] 800d096: f000 fbb5 bl 800d804 break; 800d09a: e091 b.n 800d1c0 } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800d09c: f997 300e ldrsb.w r3, [r7, #14] 800d0a0: 2b00 cmp r3, #0 800d0a2: da0b bge.n 800d0bc 800d0a4: 7bbb ldrb r3, [r7, #14] 800d0a6: f003 027f and.w r2, r3, #127 @ 0x7f 800d0aa: 4613 mov r3, r2 800d0ac: 009b lsls r3, r3, #2 800d0ae: 4413 add r3, r2 800d0b0: 009b lsls r3, r3, #2 800d0b2: 3310 adds r3, #16 800d0b4: 687a ldr r2, [r7, #4] 800d0b6: 4413 add r3, r2 800d0b8: 3304 adds r3, #4 800d0ba: e00b b.n 800d0d4 &pdev->ep_out[ep_addr & 0x7FU]; 800d0bc: 7bbb ldrb r3, [r7, #14] 800d0be: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800d0c2: 4613 mov r3, r2 800d0c4: 009b lsls r3, r3, #2 800d0c6: 4413 add r3, r2 800d0c8: 009b lsls r3, r3, #2 800d0ca: f503 73a8 add.w r3, r3, #336 @ 0x150 800d0ce: 687a ldr r2, [r7, #4] 800d0d0: 4413 add r3, r2 800d0d2: 3304 adds r3, #4 800d0d4: 60bb str r3, [r7, #8] pep->status = 0x0000U; 800d0d6: 68bb ldr r3, [r7, #8] 800d0d8: 2200 movs r2, #0 800d0da: 601a str r2, [r3, #0] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 800d0dc: 68bb ldr r3, [r7, #8] 800d0de: 2202 movs r2, #2 800d0e0: 4619 mov r1, r3 800d0e2: 6878 ldr r0, [r7, #4] 800d0e4: f000 fbf8 bl 800d8d8 break; 800d0e8: e06a b.n 800d1c0 case USBD_STATE_CONFIGURED: if ((ep_addr & 0x80U) == 0x80U) 800d0ea: f997 300e ldrsb.w r3, [r7, #14] 800d0ee: 2b00 cmp r3, #0 800d0f0: da11 bge.n 800d116 { if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U) 800d0f2: 7bbb ldrb r3, [r7, #14] 800d0f4: f003 020f and.w r2, r3, #15 800d0f8: 6879 ldr r1, [r7, #4] 800d0fa: 4613 mov r3, r2 800d0fc: 009b lsls r3, r3, #2 800d0fe: 4413 add r3, r2 800d100: 009b lsls r3, r3, #2 800d102: 440b add r3, r1 800d104: 3318 adds r3, #24 800d106: 681b ldr r3, [r3, #0] 800d108: 2b00 cmp r3, #0 800d10a: d117 bne.n 800d13c { USBD_CtlError(pdev, req); 800d10c: 6839 ldr r1, [r7, #0] 800d10e: 6878 ldr r0, [r7, #4] 800d110: f000 fb78 bl 800d804 break; 800d114: e054 b.n 800d1c0 } } else { if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U) 800d116: 7bbb ldrb r3, [r7, #14] 800d118: f003 020f and.w r2, r3, #15 800d11c: 6879 ldr r1, [r7, #4] 800d11e: 4613 mov r3, r2 800d120: 009b lsls r3, r3, #2 800d122: 4413 add r3, r2 800d124: 009b lsls r3, r3, #2 800d126: 440b add r3, r1 800d128: f503 73ac add.w r3, r3, #344 @ 0x158 800d12c: 681b ldr r3, [r3, #0] 800d12e: 2b00 cmp r3, #0 800d130: d104 bne.n 800d13c { USBD_CtlError(pdev, req); 800d132: 6839 ldr r1, [r7, #0] 800d134: 6878 ldr r0, [r7, #4] 800d136: f000 fb65 bl 800d804 break; 800d13a: e041 b.n 800d1c0 } } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800d13c: f997 300e ldrsb.w r3, [r7, #14] 800d140: 2b00 cmp r3, #0 800d142: da0b bge.n 800d15c 800d144: 7bbb ldrb r3, [r7, #14] 800d146: f003 027f and.w r2, r3, #127 @ 0x7f 800d14a: 4613 mov r3, r2 800d14c: 009b lsls r3, r3, #2 800d14e: 4413 add r3, r2 800d150: 009b lsls r3, r3, #2 800d152: 3310 adds r3, #16 800d154: 687a ldr r2, [r7, #4] 800d156: 4413 add r3, r2 800d158: 3304 adds r3, #4 800d15a: e00b b.n 800d174 &pdev->ep_out[ep_addr & 0x7FU]; 800d15c: 7bbb ldrb r3, [r7, #14] 800d15e: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800d162: 4613 mov r3, r2 800d164: 009b lsls r3, r3, #2 800d166: 4413 add r3, r2 800d168: 009b lsls r3, r3, #2 800d16a: f503 73a8 add.w r3, r3, #336 @ 0x150 800d16e: 687a ldr r2, [r7, #4] 800d170: 4413 add r3, r2 800d172: 3304 adds r3, #4 800d174: 60bb str r3, [r7, #8] if ((ep_addr == 0x00U) || (ep_addr == 0x80U)) 800d176: 7bbb ldrb r3, [r7, #14] 800d178: 2b00 cmp r3, #0 800d17a: d002 beq.n 800d182 800d17c: 7bbb ldrb r3, [r7, #14] 800d17e: 2b80 cmp r3, #128 @ 0x80 800d180: d103 bne.n 800d18a { pep->status = 0x0000U; 800d182: 68bb ldr r3, [r7, #8] 800d184: 2200 movs r2, #0 800d186: 601a str r2, [r3, #0] 800d188: e00e b.n 800d1a8 } else if (USBD_LL_IsStallEP(pdev, ep_addr)) 800d18a: 7bbb ldrb r3, [r7, #14] 800d18c: 4619 mov r1, r3 800d18e: 6878 ldr r0, [r7, #4] 800d190: f001 f850 bl 800e234 800d194: 4603 mov r3, r0 800d196: 2b00 cmp r3, #0 800d198: d003 beq.n 800d1a2 { pep->status = 0x0001U; 800d19a: 68bb ldr r3, [r7, #8] 800d19c: 2201 movs r2, #1 800d19e: 601a str r2, [r3, #0] 800d1a0: e002 b.n 800d1a8 } else { pep->status = 0x0000U; 800d1a2: 68bb ldr r3, [r7, #8] 800d1a4: 2200 movs r2, #0 800d1a6: 601a str r2, [r3, #0] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 800d1a8: 68bb ldr r3, [r7, #8] 800d1aa: 2202 movs r2, #2 800d1ac: 4619 mov r1, r3 800d1ae: 6878 ldr r0, [r7, #4] 800d1b0: f000 fb92 bl 800d8d8 break; 800d1b4: e004 b.n 800d1c0 default: USBD_CtlError(pdev, req); 800d1b6: 6839 ldr r1, [r7, #0] 800d1b8: 6878 ldr r0, [r7, #4] 800d1ba: f000 fb23 bl 800d804 break; 800d1be: bf00 nop } break; 800d1c0: e004 b.n 800d1cc default: USBD_CtlError(pdev, req); 800d1c2: 6839 ldr r1, [r7, #0] 800d1c4: 6878 ldr r0, [r7, #4] 800d1c6: f000 fb1d bl 800d804 break; 800d1ca: bf00 nop } break; 800d1cc: e004 b.n 800d1d8 default: USBD_CtlError(pdev, req); 800d1ce: 6839 ldr r1, [r7, #0] 800d1d0: 6878 ldr r0, [r7, #4] 800d1d2: f000 fb17 bl 800d804 break; 800d1d6: bf00 nop } return ret; 800d1d8: 7bfb ldrb r3, [r7, #15] } 800d1da: 4618 mov r0, r3 800d1dc: 3710 adds r7, #16 800d1de: 46bd mov sp, r7 800d1e0: bd80 pop {r7, pc} ... 0800d1e4 : * @param req: usb request * @retval status */ static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800d1e4: b580 push {r7, lr} 800d1e6: b084 sub sp, #16 800d1e8: af00 add r7, sp, #0 800d1ea: 6078 str r0, [r7, #4] 800d1ec: 6039 str r1, [r7, #0] uint16_t len = 0U; 800d1ee: 2300 movs r3, #0 800d1f0: 813b strh r3, [r7, #8] uint8_t *pbuf = NULL; 800d1f2: 2300 movs r3, #0 800d1f4: 60fb str r3, [r7, #12] uint8_t err = 0U; 800d1f6: 2300 movs r3, #0 800d1f8: 72fb strb r3, [r7, #11] switch (req->wValue >> 8) 800d1fa: 683b ldr r3, [r7, #0] 800d1fc: 885b ldrh r3, [r3, #2] 800d1fe: 0a1b lsrs r3, r3, #8 800d200: b29b uxth r3, r3 800d202: 3b01 subs r3, #1 800d204: 2b06 cmp r3, #6 800d206: f200 8128 bhi.w 800d45a 800d20a: a201 add r2, pc, #4 @ (adr r2, 800d210 ) 800d20c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d210: 0800d22d .word 0x0800d22d 800d214: 0800d245 .word 0x0800d245 800d218: 0800d285 .word 0x0800d285 800d21c: 0800d45b .word 0x0800d45b 800d220: 0800d45b .word 0x0800d45b 800d224: 0800d3fb .word 0x0800d3fb 800d228: 0800d427 .word 0x0800d427 err++; } break; #endif case USB_DESC_TYPE_DEVICE: pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); 800d22c: 687b ldr r3, [r7, #4] 800d22e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d232: 681b ldr r3, [r3, #0] 800d234: 687a ldr r2, [r7, #4] 800d236: 7c12 ldrb r2, [r2, #16] 800d238: f107 0108 add.w r1, r7, #8 800d23c: 4610 mov r0, r2 800d23e: 4798 blx r3 800d240: 60f8 str r0, [r7, #12] break; 800d242: e112 b.n 800d46a case USB_DESC_TYPE_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800d244: 687b ldr r3, [r7, #4] 800d246: 7c1b ldrb r3, [r3, #16] 800d248: 2b00 cmp r3, #0 800d24a: d10d bne.n 800d268 { pbuf = pdev->pClass->GetHSConfigDescriptor(&len); 800d24c: 687b ldr r3, [r7, #4] 800d24e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800d252: 6a9b ldr r3, [r3, #40] @ 0x28 800d254: f107 0208 add.w r2, r7, #8 800d258: 4610 mov r0, r2 800d25a: 4798 blx r3 800d25c: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800d25e: 68fb ldr r3, [r7, #12] 800d260: 3301 adds r3, #1 800d262: 2202 movs r2, #2 800d264: 701a strb r2, [r3, #0] else { pbuf = pdev->pClass->GetFSConfigDescriptor(&len); pbuf[1] = USB_DESC_TYPE_CONFIGURATION; } break; 800d266: e100 b.n 800d46a pbuf = pdev->pClass->GetFSConfigDescriptor(&len); 800d268: 687b ldr r3, [r7, #4] 800d26a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800d26e: 6adb ldr r3, [r3, #44] @ 0x2c 800d270: f107 0208 add.w r2, r7, #8 800d274: 4610 mov r0, r2 800d276: 4798 blx r3 800d278: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800d27a: 68fb ldr r3, [r7, #12] 800d27c: 3301 adds r3, #1 800d27e: 2202 movs r2, #2 800d280: 701a strb r2, [r3, #0] break; 800d282: e0f2 b.n 800d46a case USB_DESC_TYPE_STRING: switch ((uint8_t)(req->wValue)) 800d284: 683b ldr r3, [r7, #0] 800d286: 885b ldrh r3, [r3, #2] 800d288: b2db uxtb r3, r3 800d28a: 2b05 cmp r3, #5 800d28c: f200 80ac bhi.w 800d3e8 800d290: a201 add r2, pc, #4 @ (adr r2, 800d298 ) 800d292: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d296: bf00 nop 800d298: 0800d2b1 .word 0x0800d2b1 800d29c: 0800d2e5 .word 0x0800d2e5 800d2a0: 0800d319 .word 0x0800d319 800d2a4: 0800d34d .word 0x0800d34d 800d2a8: 0800d381 .word 0x0800d381 800d2ac: 0800d3b5 .word 0x0800d3b5 { case USBD_IDX_LANGID_STR: if (pdev->pDesc->GetLangIDStrDescriptor != NULL) 800d2b0: 687b ldr r3, [r7, #4] 800d2b2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d2b6: 685b ldr r3, [r3, #4] 800d2b8: 2b00 cmp r3, #0 800d2ba: d00b beq.n 800d2d4 { pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); 800d2bc: 687b ldr r3, [r7, #4] 800d2be: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d2c2: 685b ldr r3, [r3, #4] 800d2c4: 687a ldr r2, [r7, #4] 800d2c6: 7c12 ldrb r2, [r2, #16] 800d2c8: f107 0108 add.w r1, r7, #8 800d2cc: 4610 mov r0, r2 800d2ce: 4798 blx r3 800d2d0: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800d2d2: e091 b.n 800d3f8 USBD_CtlError(pdev, req); 800d2d4: 6839 ldr r1, [r7, #0] 800d2d6: 6878 ldr r0, [r7, #4] 800d2d8: f000 fa94 bl 800d804 err++; 800d2dc: 7afb ldrb r3, [r7, #11] 800d2de: 3301 adds r3, #1 800d2e0: 72fb strb r3, [r7, #11] break; 800d2e2: e089 b.n 800d3f8 case USBD_IDX_MFC_STR: if (pdev->pDesc->GetManufacturerStrDescriptor != NULL) 800d2e4: 687b ldr r3, [r7, #4] 800d2e6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d2ea: 689b ldr r3, [r3, #8] 800d2ec: 2b00 cmp r3, #0 800d2ee: d00b beq.n 800d308 { pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); 800d2f0: 687b ldr r3, [r7, #4] 800d2f2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d2f6: 689b ldr r3, [r3, #8] 800d2f8: 687a ldr r2, [r7, #4] 800d2fa: 7c12 ldrb r2, [r2, #16] 800d2fc: f107 0108 add.w r1, r7, #8 800d300: 4610 mov r0, r2 800d302: 4798 blx r3 800d304: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800d306: e077 b.n 800d3f8 USBD_CtlError(pdev, req); 800d308: 6839 ldr r1, [r7, #0] 800d30a: 6878 ldr r0, [r7, #4] 800d30c: f000 fa7a bl 800d804 err++; 800d310: 7afb ldrb r3, [r7, #11] 800d312: 3301 adds r3, #1 800d314: 72fb strb r3, [r7, #11] break; 800d316: e06f b.n 800d3f8 case USBD_IDX_PRODUCT_STR: if (pdev->pDesc->GetProductStrDescriptor != NULL) 800d318: 687b ldr r3, [r7, #4] 800d31a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d31e: 68db ldr r3, [r3, #12] 800d320: 2b00 cmp r3, #0 800d322: d00b beq.n 800d33c { pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); 800d324: 687b ldr r3, [r7, #4] 800d326: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d32a: 68db ldr r3, [r3, #12] 800d32c: 687a ldr r2, [r7, #4] 800d32e: 7c12 ldrb r2, [r2, #16] 800d330: f107 0108 add.w r1, r7, #8 800d334: 4610 mov r0, r2 800d336: 4798 blx r3 800d338: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800d33a: e05d b.n 800d3f8 USBD_CtlError(pdev, req); 800d33c: 6839 ldr r1, [r7, #0] 800d33e: 6878 ldr r0, [r7, #4] 800d340: f000 fa60 bl 800d804 err++; 800d344: 7afb ldrb r3, [r7, #11] 800d346: 3301 adds r3, #1 800d348: 72fb strb r3, [r7, #11] break; 800d34a: e055 b.n 800d3f8 case USBD_IDX_SERIAL_STR: if (pdev->pDesc->GetSerialStrDescriptor != NULL) 800d34c: 687b ldr r3, [r7, #4] 800d34e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d352: 691b ldr r3, [r3, #16] 800d354: 2b00 cmp r3, #0 800d356: d00b beq.n 800d370 { pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); 800d358: 687b ldr r3, [r7, #4] 800d35a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d35e: 691b ldr r3, [r3, #16] 800d360: 687a ldr r2, [r7, #4] 800d362: 7c12 ldrb r2, [r2, #16] 800d364: f107 0108 add.w r1, r7, #8 800d368: 4610 mov r0, r2 800d36a: 4798 blx r3 800d36c: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800d36e: e043 b.n 800d3f8 USBD_CtlError(pdev, req); 800d370: 6839 ldr r1, [r7, #0] 800d372: 6878 ldr r0, [r7, #4] 800d374: f000 fa46 bl 800d804 err++; 800d378: 7afb ldrb r3, [r7, #11] 800d37a: 3301 adds r3, #1 800d37c: 72fb strb r3, [r7, #11] break; 800d37e: e03b b.n 800d3f8 case USBD_IDX_CONFIG_STR: if (pdev->pDesc->GetConfigurationStrDescriptor != NULL) 800d380: 687b ldr r3, [r7, #4] 800d382: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d386: 695b ldr r3, [r3, #20] 800d388: 2b00 cmp r3, #0 800d38a: d00b beq.n 800d3a4 { pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); 800d38c: 687b ldr r3, [r7, #4] 800d38e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d392: 695b ldr r3, [r3, #20] 800d394: 687a ldr r2, [r7, #4] 800d396: 7c12 ldrb r2, [r2, #16] 800d398: f107 0108 add.w r1, r7, #8 800d39c: 4610 mov r0, r2 800d39e: 4798 blx r3 800d3a0: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800d3a2: e029 b.n 800d3f8 USBD_CtlError(pdev, req); 800d3a4: 6839 ldr r1, [r7, #0] 800d3a6: 6878 ldr r0, [r7, #4] 800d3a8: f000 fa2c bl 800d804 err++; 800d3ac: 7afb ldrb r3, [r7, #11] 800d3ae: 3301 adds r3, #1 800d3b0: 72fb strb r3, [r7, #11] break; 800d3b2: e021 b.n 800d3f8 case USBD_IDX_INTERFACE_STR: if (pdev->pDesc->GetInterfaceStrDescriptor != NULL) 800d3b4: 687b ldr r3, [r7, #4] 800d3b6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d3ba: 699b ldr r3, [r3, #24] 800d3bc: 2b00 cmp r3, #0 800d3be: d00b beq.n 800d3d8 { pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); 800d3c0: 687b ldr r3, [r7, #4] 800d3c2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800d3c6: 699b ldr r3, [r3, #24] 800d3c8: 687a ldr r2, [r7, #4] 800d3ca: 7c12 ldrb r2, [r2, #16] 800d3cc: f107 0108 add.w r1, r7, #8 800d3d0: 4610 mov r0, r2 800d3d2: 4798 blx r3 800d3d4: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800d3d6: e00f b.n 800d3f8 USBD_CtlError(pdev, req); 800d3d8: 6839 ldr r1, [r7, #0] 800d3da: 6878 ldr r0, [r7, #4] 800d3dc: f000 fa12 bl 800d804 err++; 800d3e0: 7afb ldrb r3, [r7, #11] 800d3e2: 3301 adds r3, #1 800d3e4: 72fb strb r3, [r7, #11] break; 800d3e6: e007 b.n 800d3f8 USBD_CtlError(pdev, req); err++; } break; #else USBD_CtlError(pdev, req); 800d3e8: 6839 ldr r1, [r7, #0] 800d3ea: 6878 ldr r0, [r7, #4] 800d3ec: f000 fa0a bl 800d804 err++; 800d3f0: 7afb ldrb r3, [r7, #11] 800d3f2: 3301 adds r3, #1 800d3f4: 72fb strb r3, [r7, #11] #endif } break; 800d3f6: e038 b.n 800d46a 800d3f8: e037 b.n 800d46a case USB_DESC_TYPE_DEVICE_QUALIFIER: if (pdev->dev_speed == USBD_SPEED_HIGH) 800d3fa: 687b ldr r3, [r7, #4] 800d3fc: 7c1b ldrb r3, [r3, #16] 800d3fe: 2b00 cmp r3, #0 800d400: d109 bne.n 800d416 { pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len); 800d402: 687b ldr r3, [r7, #4] 800d404: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800d408: 6b5b ldr r3, [r3, #52] @ 0x34 800d40a: f107 0208 add.w r2, r7, #8 800d40e: 4610 mov r0, r2 800d410: 4798 blx r3 800d412: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800d414: e029 b.n 800d46a USBD_CtlError(pdev, req); 800d416: 6839 ldr r1, [r7, #0] 800d418: 6878 ldr r0, [r7, #4] 800d41a: f000 f9f3 bl 800d804 err++; 800d41e: 7afb ldrb r3, [r7, #11] 800d420: 3301 adds r3, #1 800d422: 72fb strb r3, [r7, #11] break; 800d424: e021 b.n 800d46a case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800d426: 687b ldr r3, [r7, #4] 800d428: 7c1b ldrb r3, [r3, #16] 800d42a: 2b00 cmp r3, #0 800d42c: d10d bne.n 800d44a { pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len); 800d42e: 687b ldr r3, [r7, #4] 800d430: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800d434: 6b1b ldr r3, [r3, #48] @ 0x30 800d436: f107 0208 add.w r2, r7, #8 800d43a: 4610 mov r0, r2 800d43c: 4798 blx r3 800d43e: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; 800d440: 68fb ldr r3, [r7, #12] 800d442: 3301 adds r3, #1 800d444: 2207 movs r2, #7 800d446: 701a strb r2, [r3, #0] else { USBD_CtlError(pdev, req); err++; } break; 800d448: e00f b.n 800d46a USBD_CtlError(pdev, req); 800d44a: 6839 ldr r1, [r7, #0] 800d44c: 6878 ldr r0, [r7, #4] 800d44e: f000 f9d9 bl 800d804 err++; 800d452: 7afb ldrb r3, [r7, #11] 800d454: 3301 adds r3, #1 800d456: 72fb strb r3, [r7, #11] break; 800d458: e007 b.n 800d46a default: USBD_CtlError(pdev, req); 800d45a: 6839 ldr r1, [r7, #0] 800d45c: 6878 ldr r0, [r7, #4] 800d45e: f000 f9d1 bl 800d804 err++; 800d462: 7afb ldrb r3, [r7, #11] 800d464: 3301 adds r3, #1 800d466: 72fb strb r3, [r7, #11] break; 800d468: bf00 nop } if (err != 0U) 800d46a: 7afb ldrb r3, [r7, #11] 800d46c: 2b00 cmp r3, #0 800d46e: d11c bne.n 800d4aa { return; } else { if ((len != 0U) && (req->wLength != 0U)) 800d470: 893b ldrh r3, [r7, #8] 800d472: 2b00 cmp r3, #0 800d474: d011 beq.n 800d49a 800d476: 683b ldr r3, [r7, #0] 800d478: 88db ldrh r3, [r3, #6] 800d47a: 2b00 cmp r3, #0 800d47c: d00d beq.n 800d49a { len = MIN(len, req->wLength); 800d47e: 683b ldr r3, [r7, #0] 800d480: 88da ldrh r2, [r3, #6] 800d482: 893b ldrh r3, [r7, #8] 800d484: 4293 cmp r3, r2 800d486: bf28 it cs 800d488: 4613 movcs r3, r2 800d48a: b29b uxth r3, r3 800d48c: 813b strh r3, [r7, #8] (void)USBD_CtlSendData(pdev, pbuf, len); 800d48e: 893b ldrh r3, [r7, #8] 800d490: 461a mov r2, r3 800d492: 68f9 ldr r1, [r7, #12] 800d494: 6878 ldr r0, [r7, #4] 800d496: f000 fa1f bl 800d8d8 } if (req->wLength == 0U) 800d49a: 683b ldr r3, [r7, #0] 800d49c: 88db ldrh r3, [r3, #6] 800d49e: 2b00 cmp r3, #0 800d4a0: d104 bne.n 800d4ac { (void)USBD_CtlSendStatus(pdev); 800d4a2: 6878 ldr r0, [r7, #4] 800d4a4: f000 fa76 bl 800d994 800d4a8: e000 b.n 800d4ac return; 800d4aa: bf00 nop } } } 800d4ac: 3710 adds r7, #16 800d4ae: 46bd mov sp, r7 800d4b0: bd80 pop {r7, pc} 800d4b2: bf00 nop 0800d4b4 : * @param req: usb request * @retval status */ static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800d4b4: b580 push {r7, lr} 800d4b6: b084 sub sp, #16 800d4b8: af00 add r7, sp, #0 800d4ba: 6078 str r0, [r7, #4] 800d4bc: 6039 str r1, [r7, #0] uint8_t dev_addr; if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U)) 800d4be: 683b ldr r3, [r7, #0] 800d4c0: 889b ldrh r3, [r3, #4] 800d4c2: 2b00 cmp r3, #0 800d4c4: d130 bne.n 800d528 800d4c6: 683b ldr r3, [r7, #0] 800d4c8: 88db ldrh r3, [r3, #6] 800d4ca: 2b00 cmp r3, #0 800d4cc: d12c bne.n 800d528 800d4ce: 683b ldr r3, [r7, #0] 800d4d0: 885b ldrh r3, [r3, #2] 800d4d2: 2b7f cmp r3, #127 @ 0x7f 800d4d4: d828 bhi.n 800d528 { dev_addr = (uint8_t)(req->wValue) & 0x7FU; 800d4d6: 683b ldr r3, [r7, #0] 800d4d8: 885b ldrh r3, [r3, #2] 800d4da: b2db uxtb r3, r3 800d4dc: f003 037f and.w r3, r3, #127 @ 0x7f 800d4e0: 73fb strb r3, [r7, #15] if (pdev->dev_state == USBD_STATE_CONFIGURED) 800d4e2: 687b ldr r3, [r7, #4] 800d4e4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800d4e8: 2b03 cmp r3, #3 800d4ea: d104 bne.n 800d4f6 { USBD_CtlError(pdev, req); 800d4ec: 6839 ldr r1, [r7, #0] 800d4ee: 6878 ldr r0, [r7, #4] 800d4f0: f000 f988 bl 800d804 if (pdev->dev_state == USBD_STATE_CONFIGURED) 800d4f4: e01d b.n 800d532 } else { pdev->dev_address = dev_addr; 800d4f6: 687b ldr r3, [r7, #4] 800d4f8: 7bfa ldrb r2, [r7, #15] 800d4fa: f883 229e strb.w r2, [r3, #670] @ 0x29e USBD_LL_SetUSBAddress(pdev, dev_addr); 800d4fe: 7bfb ldrb r3, [r7, #15] 800d500: 4619 mov r1, r3 800d502: 6878 ldr r0, [r7, #4] 800d504: f000 fec1 bl 800e28a USBD_CtlSendStatus(pdev); 800d508: 6878 ldr r0, [r7, #4] 800d50a: f000 fa43 bl 800d994 if (dev_addr != 0U) 800d50e: 7bfb ldrb r3, [r7, #15] 800d510: 2b00 cmp r3, #0 800d512: d004 beq.n 800d51e { pdev->dev_state = USBD_STATE_ADDRESSED; 800d514: 687b ldr r3, [r7, #4] 800d516: 2202 movs r2, #2 800d518: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800d51c: e009 b.n 800d532 } else { pdev->dev_state = USBD_STATE_DEFAULT; 800d51e: 687b ldr r3, [r7, #4] 800d520: 2201 movs r2, #1 800d522: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800d526: e004 b.n 800d532 } } } else { USBD_CtlError(pdev, req); 800d528: 6839 ldr r1, [r7, #0] 800d52a: 6878 ldr r0, [r7, #4] 800d52c: f000 f96a bl 800d804 } } 800d530: bf00 nop 800d532: bf00 nop 800d534: 3710 adds r7, #16 800d536: 46bd mov sp, r7 800d538: bd80 pop {r7, pc} ... 0800d53c : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800d53c: b580 push {r7, lr} 800d53e: b082 sub sp, #8 800d540: af00 add r7, sp, #0 800d542: 6078 str r0, [r7, #4] 800d544: 6039 str r1, [r7, #0] static uint8_t cfgidx; cfgidx = (uint8_t)(req->wValue); 800d546: 683b ldr r3, [r7, #0] 800d548: 885b ldrh r3, [r3, #2] 800d54a: b2da uxtb r2, r3 800d54c: 4b41 ldr r3, [pc, #260] @ (800d654 ) 800d54e: 701a strb r2, [r3, #0] if (cfgidx > USBD_MAX_NUM_CONFIGURATION) 800d550: 4b40 ldr r3, [pc, #256] @ (800d654 ) 800d552: 781b ldrb r3, [r3, #0] 800d554: 2b01 cmp r3, #1 800d556: d904 bls.n 800d562 { USBD_CtlError(pdev, req); 800d558: 6839 ldr r1, [r7, #0] 800d55a: 6878 ldr r0, [r7, #4] 800d55c: f000 f952 bl 800d804 800d560: e075 b.n 800d64e } else { switch (pdev->dev_state) 800d562: 687b ldr r3, [r7, #4] 800d564: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800d568: 2b02 cmp r3, #2 800d56a: d002 beq.n 800d572 800d56c: 2b03 cmp r3, #3 800d56e: d023 beq.n 800d5b8 800d570: e062 b.n 800d638 { case USBD_STATE_ADDRESSED: if (cfgidx) 800d572: 4b38 ldr r3, [pc, #224] @ (800d654 ) 800d574: 781b ldrb r3, [r3, #0] 800d576: 2b00 cmp r3, #0 800d578: d01a beq.n 800d5b0 { pdev->dev_config = cfgidx; 800d57a: 4b36 ldr r3, [pc, #216] @ (800d654 ) 800d57c: 781b ldrb r3, [r3, #0] 800d57e: 461a mov r2, r3 800d580: 687b ldr r3, [r7, #4] 800d582: 605a str r2, [r3, #4] pdev->dev_state = USBD_STATE_CONFIGURED; 800d584: 687b ldr r3, [r7, #4] 800d586: 2203 movs r2, #3 800d588: f883 229c strb.w r2, [r3, #668] @ 0x29c if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800d58c: 4b31 ldr r3, [pc, #196] @ (800d654 ) 800d58e: 781b ldrb r3, [r3, #0] 800d590: 4619 mov r1, r3 800d592: 6878 ldr r0, [r7, #4] 800d594: f7ff f9e7 bl 800c966 800d598: 4603 mov r3, r0 800d59a: 2b02 cmp r3, #2 800d59c: d104 bne.n 800d5a8 { USBD_CtlError(pdev, req); 800d59e: 6839 ldr r1, [r7, #0] 800d5a0: 6878 ldr r0, [r7, #4] 800d5a2: f000 f92f bl 800d804 return; 800d5a6: e052 b.n 800d64e } USBD_CtlSendStatus(pdev); 800d5a8: 6878 ldr r0, [r7, #4] 800d5aa: f000 f9f3 bl 800d994 } else { USBD_CtlSendStatus(pdev); } break; 800d5ae: e04e b.n 800d64e USBD_CtlSendStatus(pdev); 800d5b0: 6878 ldr r0, [r7, #4] 800d5b2: f000 f9ef bl 800d994 break; 800d5b6: e04a b.n 800d64e case USBD_STATE_CONFIGURED: if (cfgidx == 0U) 800d5b8: 4b26 ldr r3, [pc, #152] @ (800d654 ) 800d5ba: 781b ldrb r3, [r3, #0] 800d5bc: 2b00 cmp r3, #0 800d5be: d112 bne.n 800d5e6 { pdev->dev_state = USBD_STATE_ADDRESSED; 800d5c0: 687b ldr r3, [r7, #4] 800d5c2: 2202 movs r2, #2 800d5c4: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->dev_config = cfgidx; 800d5c8: 4b22 ldr r3, [pc, #136] @ (800d654 ) 800d5ca: 781b ldrb r3, [r3, #0] 800d5cc: 461a mov r2, r3 800d5ce: 687b ldr r3, [r7, #4] 800d5d0: 605a str r2, [r3, #4] USBD_ClrClassConfig(pdev, cfgidx); 800d5d2: 4b20 ldr r3, [pc, #128] @ (800d654 ) 800d5d4: 781b ldrb r3, [r3, #0] 800d5d6: 4619 mov r1, r3 800d5d8: 6878 ldr r0, [r7, #4] 800d5da: f7ff f9e3 bl 800c9a4 USBD_CtlSendStatus(pdev); 800d5de: 6878 ldr r0, [r7, #4] 800d5e0: f000 f9d8 bl 800d994 } else { USBD_CtlSendStatus(pdev); } break; 800d5e4: e033 b.n 800d64e else if (cfgidx != pdev->dev_config) 800d5e6: 4b1b ldr r3, [pc, #108] @ (800d654 ) 800d5e8: 781b ldrb r3, [r3, #0] 800d5ea: 461a mov r2, r3 800d5ec: 687b ldr r3, [r7, #4] 800d5ee: 685b ldr r3, [r3, #4] 800d5f0: 429a cmp r2, r3 800d5f2: d01d beq.n 800d630 USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 800d5f4: 687b ldr r3, [r7, #4] 800d5f6: 685b ldr r3, [r3, #4] 800d5f8: b2db uxtb r3, r3 800d5fa: 4619 mov r1, r3 800d5fc: 6878 ldr r0, [r7, #4] 800d5fe: f7ff f9d1 bl 800c9a4 pdev->dev_config = cfgidx; 800d602: 4b14 ldr r3, [pc, #80] @ (800d654 ) 800d604: 781b ldrb r3, [r3, #0] 800d606: 461a mov r2, r3 800d608: 687b ldr r3, [r7, #4] 800d60a: 605a str r2, [r3, #4] if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800d60c: 4b11 ldr r3, [pc, #68] @ (800d654 ) 800d60e: 781b ldrb r3, [r3, #0] 800d610: 4619 mov r1, r3 800d612: 6878 ldr r0, [r7, #4] 800d614: f7ff f9a7 bl 800c966 800d618: 4603 mov r3, r0 800d61a: 2b02 cmp r3, #2 800d61c: d104 bne.n 800d628 USBD_CtlError(pdev, req); 800d61e: 6839 ldr r1, [r7, #0] 800d620: 6878 ldr r0, [r7, #4] 800d622: f000 f8ef bl 800d804 return; 800d626: e012 b.n 800d64e USBD_CtlSendStatus(pdev); 800d628: 6878 ldr r0, [r7, #4] 800d62a: f000 f9b3 bl 800d994 break; 800d62e: e00e b.n 800d64e USBD_CtlSendStatus(pdev); 800d630: 6878 ldr r0, [r7, #4] 800d632: f000 f9af bl 800d994 break; 800d636: e00a b.n 800d64e default: USBD_CtlError(pdev, req); 800d638: 6839 ldr r1, [r7, #0] 800d63a: 6878 ldr r0, [r7, #4] 800d63c: f000 f8e2 bl 800d804 USBD_ClrClassConfig(pdev, cfgidx); 800d640: 4b04 ldr r3, [pc, #16] @ (800d654 ) 800d642: 781b ldrb r3, [r3, #0] 800d644: 4619 mov r1, r3 800d646: 6878 ldr r0, [r7, #4] 800d648: f7ff f9ac bl 800c9a4 break; 800d64c: bf00 nop } } } 800d64e: 3708 adds r7, #8 800d650: 46bd mov sp, r7 800d652: bd80 pop {r7, pc} 800d654: 20000498 .word 0x20000498 0800d658 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800d658: b580 push {r7, lr} 800d65a: b082 sub sp, #8 800d65c: af00 add r7, sp, #0 800d65e: 6078 str r0, [r7, #4] 800d660: 6039 str r1, [r7, #0] if (req->wLength != 1U) 800d662: 683b ldr r3, [r7, #0] 800d664: 88db ldrh r3, [r3, #6] 800d666: 2b01 cmp r3, #1 800d668: d004 beq.n 800d674 { USBD_CtlError(pdev, req); 800d66a: 6839 ldr r1, [r7, #0] 800d66c: 6878 ldr r0, [r7, #4] 800d66e: f000 f8c9 bl 800d804 default: USBD_CtlError(pdev, req); break; } } } 800d672: e022 b.n 800d6ba switch (pdev->dev_state) 800d674: 687b ldr r3, [r7, #4] 800d676: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800d67a: 2b02 cmp r3, #2 800d67c: dc02 bgt.n 800d684 800d67e: 2b00 cmp r3, #0 800d680: dc03 bgt.n 800d68a 800d682: e015 b.n 800d6b0 800d684: 2b03 cmp r3, #3 800d686: d00b beq.n 800d6a0 800d688: e012 b.n 800d6b0 pdev->dev_default_config = 0U; 800d68a: 687b ldr r3, [r7, #4] 800d68c: 2200 movs r2, #0 800d68e: 609a str r2, [r3, #8] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U); 800d690: 687b ldr r3, [r7, #4] 800d692: 3308 adds r3, #8 800d694: 2201 movs r2, #1 800d696: 4619 mov r1, r3 800d698: 6878 ldr r0, [r7, #4] 800d69a: f000 f91d bl 800d8d8 break; 800d69e: e00c b.n 800d6ba USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U); 800d6a0: 687b ldr r3, [r7, #4] 800d6a2: 3304 adds r3, #4 800d6a4: 2201 movs r2, #1 800d6a6: 4619 mov r1, r3 800d6a8: 6878 ldr r0, [r7, #4] 800d6aa: f000 f915 bl 800d8d8 break; 800d6ae: e004 b.n 800d6ba USBD_CtlError(pdev, req); 800d6b0: 6839 ldr r1, [r7, #0] 800d6b2: 6878 ldr r0, [r7, #4] 800d6b4: f000 f8a6 bl 800d804 break; 800d6b8: bf00 nop } 800d6ba: bf00 nop 800d6bc: 3708 adds r7, #8 800d6be: 46bd mov sp, r7 800d6c0: bd80 pop {r7, pc} 0800d6c2 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800d6c2: b580 push {r7, lr} 800d6c4: b082 sub sp, #8 800d6c6: af00 add r7, sp, #0 800d6c8: 6078 str r0, [r7, #4] 800d6ca: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800d6cc: 687b ldr r3, [r7, #4] 800d6ce: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800d6d2: 3b01 subs r3, #1 800d6d4: 2b02 cmp r3, #2 800d6d6: d81e bhi.n 800d716 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wLength != 0x2U) 800d6d8: 683b ldr r3, [r7, #0] 800d6da: 88db ldrh r3, [r3, #6] 800d6dc: 2b02 cmp r3, #2 800d6de: d004 beq.n 800d6ea { USBD_CtlError(pdev, req); 800d6e0: 6839 ldr r1, [r7, #0] 800d6e2: 6878 ldr r0, [r7, #4] 800d6e4: f000 f88e bl 800d804 break; 800d6e8: e01a b.n 800d720 } #if (USBD_SELF_POWERED == 1U) pdev->dev_config_status = USB_CONFIG_SELF_POWERED; 800d6ea: 687b ldr r3, [r7, #4] 800d6ec: 2201 movs r2, #1 800d6ee: 60da str r2, [r3, #12] #else pdev->dev_config_status = 0U; #endif if (pdev->dev_remote_wakeup) 800d6f0: 687b ldr r3, [r7, #4] 800d6f2: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4 800d6f6: 2b00 cmp r3, #0 800d6f8: d005 beq.n 800d706 { pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; 800d6fa: 687b ldr r3, [r7, #4] 800d6fc: 68db ldr r3, [r3, #12] 800d6fe: f043 0202 orr.w r2, r3, #2 800d702: 687b ldr r3, [r7, #4] 800d704: 60da str r2, [r3, #12] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U); 800d706: 687b ldr r3, [r7, #4] 800d708: 330c adds r3, #12 800d70a: 2202 movs r2, #2 800d70c: 4619 mov r1, r3 800d70e: 6878 ldr r0, [r7, #4] 800d710: f000 f8e2 bl 800d8d8 break; 800d714: e004 b.n 800d720 default: USBD_CtlError(pdev, req); 800d716: 6839 ldr r1, [r7, #0] 800d718: 6878 ldr r0, [r7, #4] 800d71a: f000 f873 bl 800d804 break; 800d71e: bf00 nop } } 800d720: bf00 nop 800d722: 3708 adds r7, #8 800d724: 46bd mov sp, r7 800d726: bd80 pop {r7, pc} 0800d728 : * @param req: usb request * @retval status */ static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800d728: b580 push {r7, lr} 800d72a: b082 sub sp, #8 800d72c: af00 add r7, sp, #0 800d72e: 6078 str r0, [r7, #4] 800d730: 6039 str r1, [r7, #0] if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800d732: 683b ldr r3, [r7, #0] 800d734: 885b ldrh r3, [r3, #2] 800d736: 2b01 cmp r3, #1 800d738: d106 bne.n 800d748 { pdev->dev_remote_wakeup = 1U; 800d73a: 687b ldr r3, [r7, #4] 800d73c: 2201 movs r2, #1 800d73e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800d742: 6878 ldr r0, [r7, #4] 800d744: f000 f926 bl 800d994 } } 800d748: bf00 nop 800d74a: 3708 adds r7, #8 800d74c: 46bd mov sp, r7 800d74e: bd80 pop {r7, pc} 0800d750 : * @param req: usb request * @retval status */ static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800d750: b580 push {r7, lr} 800d752: b082 sub sp, #8 800d754: af00 add r7, sp, #0 800d756: 6078 str r0, [r7, #4] 800d758: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800d75a: 687b ldr r3, [r7, #4] 800d75c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800d760: 3b01 subs r3, #1 800d762: 2b02 cmp r3, #2 800d764: d80b bhi.n 800d77e { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800d766: 683b ldr r3, [r7, #0] 800d768: 885b ldrh r3, [r3, #2] 800d76a: 2b01 cmp r3, #1 800d76c: d10c bne.n 800d788 { pdev->dev_remote_wakeup = 0U; 800d76e: 687b ldr r3, [r7, #4] 800d770: 2200 movs r2, #0 800d772: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800d776: 6878 ldr r0, [r7, #4] 800d778: f000 f90c bl 800d994 } break; 800d77c: e004 b.n 800d788 default: USBD_CtlError(pdev, req); 800d77e: 6839 ldr r1, [r7, #0] 800d780: 6878 ldr r0, [r7, #4] 800d782: f000 f83f bl 800d804 break; 800d786: e000 b.n 800d78a break; 800d788: bf00 nop } } 800d78a: bf00 nop 800d78c: 3708 adds r7, #8 800d78e: 46bd mov sp, r7 800d790: bd80 pop {r7, pc} 0800d792 : * @param req: usb request * @retval None */ void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) { 800d792: b480 push {r7} 800d794: b083 sub sp, #12 800d796: af00 add r7, sp, #0 800d798: 6078 str r0, [r7, #4] 800d79a: 6039 str r1, [r7, #0] req->bmRequest = *(uint8_t *)(pdata); 800d79c: 683b ldr r3, [r7, #0] 800d79e: 781a ldrb r2, [r3, #0] 800d7a0: 687b ldr r3, [r7, #4] 800d7a2: 701a strb r2, [r3, #0] req->bRequest = *(uint8_t *)(pdata + 1U); 800d7a4: 683b ldr r3, [r7, #0] 800d7a6: 785a ldrb r2, [r3, #1] 800d7a8: 687b ldr r3, [r7, #4] 800d7aa: 705a strb r2, [r3, #1] req->wValue = SWAPBYTE(pdata + 2U); 800d7ac: 683b ldr r3, [r7, #0] 800d7ae: 3302 adds r3, #2 800d7b0: 781b ldrb r3, [r3, #0] 800d7b2: 461a mov r2, r3 800d7b4: 683b ldr r3, [r7, #0] 800d7b6: 3303 adds r3, #3 800d7b8: 781b ldrb r3, [r3, #0] 800d7ba: 021b lsls r3, r3, #8 800d7bc: b29b uxth r3, r3 800d7be: 4413 add r3, r2 800d7c0: b29a uxth r2, r3 800d7c2: 687b ldr r3, [r7, #4] 800d7c4: 805a strh r2, [r3, #2] req->wIndex = SWAPBYTE(pdata + 4U); 800d7c6: 683b ldr r3, [r7, #0] 800d7c8: 3304 adds r3, #4 800d7ca: 781b ldrb r3, [r3, #0] 800d7cc: 461a mov r2, r3 800d7ce: 683b ldr r3, [r7, #0] 800d7d0: 3305 adds r3, #5 800d7d2: 781b ldrb r3, [r3, #0] 800d7d4: 021b lsls r3, r3, #8 800d7d6: b29b uxth r3, r3 800d7d8: 4413 add r3, r2 800d7da: b29a uxth r2, r3 800d7dc: 687b ldr r3, [r7, #4] 800d7de: 809a strh r2, [r3, #4] req->wLength = SWAPBYTE(pdata + 6U); 800d7e0: 683b ldr r3, [r7, #0] 800d7e2: 3306 adds r3, #6 800d7e4: 781b ldrb r3, [r3, #0] 800d7e6: 461a mov r2, r3 800d7e8: 683b ldr r3, [r7, #0] 800d7ea: 3307 adds r3, #7 800d7ec: 781b ldrb r3, [r3, #0] 800d7ee: 021b lsls r3, r3, #8 800d7f0: b29b uxth r3, r3 800d7f2: 4413 add r3, r2 800d7f4: b29a uxth r2, r3 800d7f6: 687b ldr r3, [r7, #4] 800d7f8: 80da strh r2, [r3, #6] } 800d7fa: bf00 nop 800d7fc: 370c adds r7, #12 800d7fe: 46bd mov sp, r7 800d800: bc80 pop {r7} 800d802: 4770 bx lr 0800d804 : * @retval None */ void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800d804: b580 push {r7, lr} 800d806: b082 sub sp, #8 800d808: af00 add r7, sp, #0 800d80a: 6078 str r0, [r7, #4] 800d80c: 6039 str r1, [r7, #0] USBD_LL_StallEP(pdev, 0x80U); 800d80e: 2180 movs r1, #128 @ 0x80 800d810: 6878 ldr r0, [r7, #4] 800d812: f000 fcd1 bl 800e1b8 USBD_LL_StallEP(pdev, 0U); 800d816: 2100 movs r1, #0 800d818: 6878 ldr r0, [r7, #4] 800d81a: f000 fccd bl 800e1b8 } 800d81e: bf00 nop 800d820: 3708 adds r7, #8 800d822: 46bd mov sp, r7 800d824: bd80 pop {r7, pc} 0800d826 : * @param unicode : Formatted string buffer (unicode) * @param len : descriptor length * @retval None */ void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) { 800d826: b580 push {r7, lr} 800d828: b086 sub sp, #24 800d82a: af00 add r7, sp, #0 800d82c: 60f8 str r0, [r7, #12] 800d82e: 60b9 str r1, [r7, #8] 800d830: 607a str r2, [r7, #4] uint8_t idx = 0U; 800d832: 2300 movs r3, #0 800d834: 75fb strb r3, [r7, #23] if (desc != NULL) 800d836: 68fb ldr r3, [r7, #12] 800d838: 2b00 cmp r3, #0 800d83a: d032 beq.n 800d8a2 { *len = (uint16_t)USBD_GetLen(desc) * 2U + 2U; 800d83c: 68f8 ldr r0, [r7, #12] 800d83e: f000 f834 bl 800d8aa 800d842: 4603 mov r3, r0 800d844: 3301 adds r3, #1 800d846: b29b uxth r3, r3 800d848: 005b lsls r3, r3, #1 800d84a: b29a uxth r2, r3 800d84c: 687b ldr r3, [r7, #4] 800d84e: 801a strh r2, [r3, #0] unicode[idx++] = *(uint8_t *)(void *)len; 800d850: 7dfb ldrb r3, [r7, #23] 800d852: 1c5a adds r2, r3, #1 800d854: 75fa strb r2, [r7, #23] 800d856: 461a mov r2, r3 800d858: 68bb ldr r3, [r7, #8] 800d85a: 4413 add r3, r2 800d85c: 687a ldr r2, [r7, #4] 800d85e: 7812 ldrb r2, [r2, #0] 800d860: 701a strb r2, [r3, #0] unicode[idx++] = USB_DESC_TYPE_STRING; 800d862: 7dfb ldrb r3, [r7, #23] 800d864: 1c5a adds r2, r3, #1 800d866: 75fa strb r2, [r7, #23] 800d868: 461a mov r2, r3 800d86a: 68bb ldr r3, [r7, #8] 800d86c: 4413 add r3, r2 800d86e: 2203 movs r2, #3 800d870: 701a strb r2, [r3, #0] while (*desc != '\0') 800d872: e012 b.n 800d89a { unicode[idx++] = *desc++; 800d874: 68fb ldr r3, [r7, #12] 800d876: 1c5a adds r2, r3, #1 800d878: 60fa str r2, [r7, #12] 800d87a: 7dfa ldrb r2, [r7, #23] 800d87c: 1c51 adds r1, r2, #1 800d87e: 75f9 strb r1, [r7, #23] 800d880: 4611 mov r1, r2 800d882: 68ba ldr r2, [r7, #8] 800d884: 440a add r2, r1 800d886: 781b ldrb r3, [r3, #0] 800d888: 7013 strb r3, [r2, #0] unicode[idx++] = 0U; 800d88a: 7dfb ldrb r3, [r7, #23] 800d88c: 1c5a adds r2, r3, #1 800d88e: 75fa strb r2, [r7, #23] 800d890: 461a mov r2, r3 800d892: 68bb ldr r3, [r7, #8] 800d894: 4413 add r3, r2 800d896: 2200 movs r2, #0 800d898: 701a strb r2, [r3, #0] while (*desc != '\0') 800d89a: 68fb ldr r3, [r7, #12] 800d89c: 781b ldrb r3, [r3, #0] 800d89e: 2b00 cmp r3, #0 800d8a0: d1e8 bne.n 800d874 } } } 800d8a2: bf00 nop 800d8a4: 3718 adds r7, #24 800d8a6: 46bd mov sp, r7 800d8a8: bd80 pop {r7, pc} 0800d8aa : * return the string length * @param buf : pointer to the ascii string buffer * @retval string length */ static uint8_t USBD_GetLen(uint8_t *buf) { 800d8aa: b480 push {r7} 800d8ac: b085 sub sp, #20 800d8ae: af00 add r7, sp, #0 800d8b0: 6078 str r0, [r7, #4] uint8_t len = 0U; 800d8b2: 2300 movs r3, #0 800d8b4: 73fb strb r3, [r7, #15] while (*buf != '\0') 800d8b6: e005 b.n 800d8c4 { len++; 800d8b8: 7bfb ldrb r3, [r7, #15] 800d8ba: 3301 adds r3, #1 800d8bc: 73fb strb r3, [r7, #15] buf++; 800d8be: 687b ldr r3, [r7, #4] 800d8c0: 3301 adds r3, #1 800d8c2: 607b str r3, [r7, #4] while (*buf != '\0') 800d8c4: 687b ldr r3, [r7, #4] 800d8c6: 781b ldrb r3, [r3, #0] 800d8c8: 2b00 cmp r3, #0 800d8ca: d1f5 bne.n 800d8b8 } return len; 800d8cc: 7bfb ldrb r3, [r7, #15] } 800d8ce: 4618 mov r0, r3 800d8d0: 3714 adds r7, #20 800d8d2: 46bd mov sp, r7 800d8d4: bc80 pop {r7} 800d8d6: 4770 bx lr 0800d8d8 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800d8d8: b580 push {r7, lr} 800d8da: b084 sub sp, #16 800d8dc: af00 add r7, sp, #0 800d8de: 60f8 str r0, [r7, #12] 800d8e0: 60b9 str r1, [r7, #8] 800d8e2: 4613 mov r3, r2 800d8e4: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_IN; 800d8e6: 68fb ldr r3, [r7, #12] 800d8e8: 2202 movs r2, #2 800d8ea: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_in[0].total_length = len; 800d8ee: 88fa ldrh r2, [r7, #6] 800d8f0: 68fb ldr r3, [r7, #12] 800d8f2: 61da str r2, [r3, #28] pdev->ep_in[0].rem_length = len; 800d8f4: 88fa ldrh r2, [r7, #6] 800d8f6: 68fb ldr r3, [r7, #12] 800d8f8: 621a str r2, [r3, #32] /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800d8fa: 88fb ldrh r3, [r7, #6] 800d8fc: 68ba ldr r2, [r7, #8] 800d8fe: 2100 movs r1, #0 800d900: 68f8 ldr r0, [r7, #12] 800d902: f000 fce1 bl 800e2c8 return USBD_OK; 800d906: 2300 movs r3, #0 } 800d908: 4618 mov r0, r3 800d90a: 3710 adds r7, #16 800d90c: 46bd mov sp, r7 800d90e: bd80 pop {r7, pc} 0800d910 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800d910: b580 push {r7, lr} 800d912: b084 sub sp, #16 800d914: af00 add r7, sp, #0 800d916: 60f8 str r0, [r7, #12] 800d918: 60b9 str r1, [r7, #8] 800d91a: 4613 mov r3, r2 800d91c: 80fb strh r3, [r7, #6] /* Start the next transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800d91e: 88fb ldrh r3, [r7, #6] 800d920: 68ba ldr r2, [r7, #8] 800d922: 2100 movs r1, #0 800d924: 68f8 ldr r0, [r7, #12] 800d926: f000 fccf bl 800e2c8 return USBD_OK; 800d92a: 2300 movs r3, #0 } 800d92c: 4618 mov r0, r3 800d92e: 3710 adds r7, #16 800d930: 46bd mov sp, r7 800d932: bd80 pop {r7, pc} 0800d934 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800d934: b580 push {r7, lr} 800d936: b084 sub sp, #16 800d938: af00 add r7, sp, #0 800d93a: 60f8 str r0, [r7, #12] 800d93c: 60b9 str r1, [r7, #8] 800d93e: 4613 mov r3, r2 800d940: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_OUT; 800d942: 68fb ldr r3, [r7, #12] 800d944: 2203 movs r2, #3 800d946: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_out[0].total_length = len; 800d94a: 88fa ldrh r2, [r7, #6] 800d94c: 68fb ldr r3, [r7, #12] 800d94e: f8c3 215c str.w r2, [r3, #348] @ 0x15c pdev->ep_out[0].rem_length = len; 800d952: 88fa ldrh r2, [r7, #6] 800d954: 68fb ldr r3, [r7, #12] 800d956: f8c3 2160 str.w r2, [r3, #352] @ 0x160 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800d95a: 88fb ldrh r3, [r7, #6] 800d95c: 68ba ldr r2, [r7, #8] 800d95e: 2100 movs r1, #0 800d960: 68f8 ldr r0, [r7, #12] 800d962: f000 fcd4 bl 800e30e return USBD_OK; 800d966: 2300 movs r3, #0 } 800d968: 4618 mov r0, r3 800d96a: 3710 adds r7, #16 800d96c: 46bd mov sp, r7 800d96e: bd80 pop {r7, pc} 0800d970 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800d970: b580 push {r7, lr} 800d972: b084 sub sp, #16 800d974: af00 add r7, sp, #0 800d976: 60f8 str r0, [r7, #12] 800d978: 60b9 str r1, [r7, #8] 800d97a: 4613 mov r3, r2 800d97c: 80fb strh r3, [r7, #6] USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800d97e: 88fb ldrh r3, [r7, #6] 800d980: 68ba ldr r2, [r7, #8] 800d982: 2100 movs r1, #0 800d984: 68f8 ldr r0, [r7, #12] 800d986: f000 fcc2 bl 800e30e return USBD_OK; 800d98a: 2300 movs r3, #0 } 800d98c: 4618 mov r0, r3 800d98e: 3710 adds r7, #16 800d990: 46bd mov sp, r7 800d992: bd80 pop {r7, pc} 0800d994 : * send zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) { 800d994: b580 push {r7, lr} 800d996: b082 sub sp, #8 800d998: af00 add r7, sp, #0 800d99a: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_IN; 800d99c: 687b ldr r3, [r7, #4] 800d99e: 2204 movs r2, #4 800d9a0: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); 800d9a4: 2300 movs r3, #0 800d9a6: 2200 movs r2, #0 800d9a8: 2100 movs r1, #0 800d9aa: 6878 ldr r0, [r7, #4] 800d9ac: f000 fc8c bl 800e2c8 return USBD_OK; 800d9b0: 2300 movs r3, #0 } 800d9b2: 4618 mov r0, r3 800d9b4: 3708 adds r7, #8 800d9b6: 46bd mov sp, r7 800d9b8: bd80 pop {r7, pc} 0800d9ba : * receive zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) { 800d9ba: b580 push {r7, lr} 800d9bc: b082 sub sp, #8 800d9be: af00 add r7, sp, #0 800d9c0: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_OUT; 800d9c2: 687b ldr r3, [r7, #4] 800d9c4: 2205 movs r2, #5 800d9c6: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800d9ca: 2300 movs r3, #0 800d9cc: 2200 movs r2, #0 800d9ce: 2100 movs r1, #0 800d9d0: 6878 ldr r0, [r7, #4] 800d9d2: f000 fc9c bl 800e30e return USBD_OK; 800d9d6: 2300 movs r3, #0 } 800d9d8: 4618 mov r0, r3 800d9da: 3708 adds r7, #8 800d9dc: 46bd mov sp, r7 800d9de: bd80 pop {r7, pc} 0800d9e0 : /** * Init USB device Library, add supported class and start the library * @retval None */ void MX_USB_DEVICE_Init(void) { 800d9e0: b580 push {r7, lr} 800d9e2: af00 add r7, sp, #0 /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ /* USER CODE END USB_DEVICE_Init_PreTreatment */ /* Init Device Library, add supported class and start the library. */ if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK) 800d9e4: 2200 movs r2, #0 800d9e6: 4912 ldr r1, [pc, #72] @ (800da30 ) 800d9e8: 4812 ldr r0, [pc, #72] @ (800da34 ) 800d9ea: f7fe ff62 bl 800c8b2 800d9ee: 4603 mov r3, r0 800d9f0: 2b00 cmp r3, #0 800d9f2: d001 beq.n 800d9f8 { Error_Handler(); 800d9f4: f7f5 fe6c bl 80036d0 } if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK) 800d9f8: 490f ldr r1, [pc, #60] @ (800da38 ) 800d9fa: 480e ldr r0, [pc, #56] @ (800da34 ) 800d9fc: f7fe ff84 bl 800c908 800da00: 4603 mov r3, r0 800da02: 2b00 cmp r3, #0 800da04: d001 beq.n 800da0a { Error_Handler(); 800da06: f7f5 fe63 bl 80036d0 } if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK) 800da0a: 490c ldr r1, [pc, #48] @ (800da3c ) 800da0c: 4809 ldr r0, [pc, #36] @ (800da34 ) 800da0e: f7fe feb5 bl 800c77c 800da12: 4603 mov r3, r0 800da14: 2b00 cmp r3, #0 800da16: d001 beq.n 800da1c { Error_Handler(); 800da18: f7f5 fe5a bl 80036d0 } if (USBD_Start(&hUsbDeviceFS) != USBD_OK) 800da1c: 4805 ldr r0, [pc, #20] @ (800da34 ) 800da1e: f7fe ff8c bl 800c93a 800da22: 4603 mov r3, r0 800da24: 2b00 cmp r3, #0 800da26: d001 beq.n 800da2c { Error_Handler(); 800da28: f7f5 fe52 bl 80036d0 } /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ /* USER CODE END USB_DEVICE_Init_PostTreatment */ } 800da2c: bf00 nop 800da2e: bd80 pop {r7, pc} 800da30: 2000013c .word 0x2000013c 800da34: 2000049c .word 0x2000049c 800da38: 20000028 .word 0x20000028 800da3c: 2000012c .word 0x2000012c 0800da40 : /* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ #define RX_FIFO_SZ 256 static uint8_t rx_fifo[RX_FIFO_SZ]; static volatile uint16_t rx_head = 0, rx_tail = 0; static void fifo_push(const uint8_t* data, uint32_t len) { 800da40: b480 push {r7} 800da42: b085 sub sp, #20 800da44: af00 add r7, sp, #0 800da46: 6078 str r0, [r7, #4] 800da48: 6039 str r1, [r7, #0] while (len--) { 800da4a: e01e b.n 800da8a uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u); 800da4c: 4b14 ldr r3, [pc, #80] @ (800daa0 ) 800da4e: 881b ldrh r3, [r3, #0] 800da50: b29b uxth r3, r3 800da52: 3301 adds r3, #1 800da54: b29b uxth r3, r3 800da56: b2db uxtb r3, r3 800da58: 81fb strh r3, [r7, #14] if (next == (rx_tail & (RX_FIFO_SZ - 1u))) { 800da5a: 89fa ldrh r2, [r7, #14] 800da5c: 4b11 ldr r3, [pc, #68] @ (800daa4 ) 800da5e: 881b ldrh r3, [r3, #0] 800da60: b29b uxth r3, r3 800da62: b2db uxtb r3, r3 800da64: 429a cmp r2, r3 800da66: d103 bne.n 800da70 /* overflow — drop byte (or set a flag) */ data++; 800da68: 687b ldr r3, [r7, #4] 800da6a: 3301 adds r3, #1 800da6c: 607b str r3, [r7, #4] continue; 800da6e: e00c b.n 800da8a } rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++; 800da70: 687b ldr r3, [r7, #4] 800da72: 1c5a adds r2, r3, #1 800da74: 607a str r2, [r7, #4] 800da76: 4a0a ldr r2, [pc, #40] @ (800daa0 ) 800da78: 8812 ldrh r2, [r2, #0] 800da7a: b292 uxth r2, r2 800da7c: b2d2 uxtb r2, r2 800da7e: 7819 ldrb r1, [r3, #0] 800da80: 4b09 ldr r3, [pc, #36] @ (800daa8 ) 800da82: 5499 strb r1, [r3, r2] rx_head = next; 800da84: 4a06 ldr r2, [pc, #24] @ (800daa0 ) 800da86: 89fb ldrh r3, [r7, #14] 800da88: 8013 strh r3, [r2, #0] while (len--) { 800da8a: 683b ldr r3, [r7, #0] 800da8c: 1e5a subs r2, r3, #1 800da8e: 603a str r2, [r7, #0] 800da90: 2b00 cmp r3, #0 800da92: d1db bne.n 800da4c } } 800da94: bf00 nop 800da96: bf00 nop 800da98: 3714 adds r7, #20 800da9a: 46bd mov sp, r7 800da9c: bc80 pop {r7} 800da9e: 4770 bx lr 800daa0: 20001060 .word 0x20001060 800daa4: 20001062 .word 0x20001062 800daa8: 20000f60 .word 0x20000f60 0800daac : uint32_t CDC_Available(void) { 800daac: b480 push {r7} 800daae: af00 add r7, sp, #0 return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u)); 800dab0: 4b06 ldr r3, [pc, #24] @ (800dacc ) 800dab2: 881b ldrh r3, [r3, #0] 800dab4: b29a uxth r2, r3 800dab6: 4b06 ldr r3, [pc, #24] @ (800dad0 ) 800dab8: 881b ldrh r3, [r3, #0] 800daba: b29b uxth r3, r3 800dabc: 1ad3 subs r3, r2, r3 800dabe: b29b uxth r3, r3 800dac0: b2db uxtb r3, r3 } 800dac2: 4618 mov r0, r3 800dac4: 46bd mov sp, r7 800dac6: bc80 pop {r7} 800dac8: 4770 bx lr 800daca: bf00 nop 800dacc: 20001060 .word 0x20001060 800dad0: 20001062 .word 0x20001062 0800dad4 : int CDC_ReadByte(void) { 800dad4: b480 push {r7} 800dad6: b083 sub sp, #12 800dad8: af00 add r7, sp, #0 if (rx_tail == rx_head) return -1; 800dada: 4b10 ldr r3, [pc, #64] @ (800db1c ) 800dadc: 881b ldrh r3, [r3, #0] 800dade: b29a uxth r2, r3 800dae0: 4b0f ldr r3, [pc, #60] @ (800db20 ) 800dae2: 881b ldrh r3, [r3, #0] 800dae4: b29b uxth r3, r3 800dae6: 429a cmp r2, r3 800dae8: d102 bne.n 800daf0 800daea: f04f 33ff mov.w r3, #4294967295 800daee: e010 b.n 800db12 int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)]; 800daf0: 4b0a ldr r3, [pc, #40] @ (800db1c ) 800daf2: 881b ldrh r3, [r3, #0] 800daf4: b29b uxth r3, r3 800daf6: b2db uxtb r3, r3 800daf8: 4a0a ldr r2, [pc, #40] @ (800db24 ) 800dafa: 5cd3 ldrb r3, [r2, r3] 800dafc: 607b str r3, [r7, #4] rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u); 800dafe: 4b07 ldr r3, [pc, #28] @ (800db1c ) 800db00: 881b ldrh r3, [r3, #0] 800db02: b29b uxth r3, r3 800db04: 3301 adds r3, #1 800db06: b29b uxth r3, r3 800db08: b2db uxtb r3, r3 800db0a: b29a uxth r2, r3 800db0c: 4b03 ldr r3, [pc, #12] @ (800db1c ) 800db0e: 801a strh r2, [r3, #0] return b; 800db10: 687b ldr r3, [r7, #4] } 800db12: 4618 mov r0, r3 800db14: 370c adds r7, #12 800db16: 46bd mov sp, r7 800db18: bc80 pop {r7} 800db1a: 4770 bx lr 800db1c: 20001062 .word 0x20001062 800db20: 20001060 .word 0x20001060 800db24: 20000f60 .word 0x20000f60 0800db28 : /** * @brief Initializes the CDC media low layer over the FS USB IP * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Init_FS(void) { 800db28: b580 push {r7, lr} 800db2a: af00 add r7, sp, #0 /* USER CODE BEGIN 3 */ /* Set Application Buffers */ USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0); 800db2c: 2200 movs r2, #0 800db2e: 4905 ldr r1, [pc, #20] @ (800db44 ) 800db30: 4805 ldr r0, [pc, #20] @ (800db48 ) 800db32: f7fe fe39 bl 800c7a8 USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS); 800db36: 4905 ldr r1, [pc, #20] @ (800db4c ) 800db38: 4803 ldr r0, [pc, #12] @ (800db48 ) 800db3a: f7fe fe4e bl 800c7da return (USBD_OK); 800db3e: 2300 movs r3, #0 /* USER CODE END 3 */ } 800db40: 4618 mov r0, r3 800db42: bd80 pop {r7, pc} 800db44: 20000b60 .word 0x20000b60 800db48: 2000049c .word 0x2000049c 800db4c: 20000760 .word 0x20000760 0800db50 : /** * @brief DeInitializes the CDC media low layer * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_DeInit_FS(void) { 800db50: b480 push {r7} 800db52: af00 add r7, sp, #0 /* USER CODE BEGIN 4 */ return (USBD_OK); 800db54: 2300 movs r3, #0 /* USER CODE END 4 */ } 800db56: 4618 mov r0, r3 800db58: 46bd mov sp, r7 800db5a: bc80 pop {r7} 800db5c: 4770 bx lr ... 0800db60 : * @param pbuf: Buffer containing command data (request parameters) * @param length: Number of data to be sent (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length) { 800db60: b480 push {r7} 800db62: b083 sub sp, #12 800db64: af00 add r7, sp, #0 800db66: 4603 mov r3, r0 800db68: 6039 str r1, [r7, #0] 800db6a: 71fb strb r3, [r7, #7] 800db6c: 4613 mov r3, r2 800db6e: 80bb strh r3, [r7, #4] /* USER CODE BEGIN 5 */ switch(cmd) 800db70: 79fb ldrb r3, [r7, #7] 800db72: 2b23 cmp r3, #35 @ 0x23 800db74: d84a bhi.n 800dc0c 800db76: a201 add r2, pc, #4 @ (adr r2, 800db7c ) 800db78: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800db7c: 0800dc0d .word 0x0800dc0d 800db80: 0800dc0d .word 0x0800dc0d 800db84: 0800dc0d .word 0x0800dc0d 800db88: 0800dc0d .word 0x0800dc0d 800db8c: 0800dc0d .word 0x0800dc0d 800db90: 0800dc0d .word 0x0800dc0d 800db94: 0800dc0d .word 0x0800dc0d 800db98: 0800dc0d .word 0x0800dc0d 800db9c: 0800dc0d .word 0x0800dc0d 800dba0: 0800dc0d .word 0x0800dc0d 800dba4: 0800dc0d .word 0x0800dc0d 800dba8: 0800dc0d .word 0x0800dc0d 800dbac: 0800dc0d .word 0x0800dc0d 800dbb0: 0800dc0d .word 0x0800dc0d 800dbb4: 0800dc0d .word 0x0800dc0d 800dbb8: 0800dc0d .word 0x0800dc0d 800dbbc: 0800dc0d .word 0x0800dc0d 800dbc0: 0800dc0d .word 0x0800dc0d 800dbc4: 0800dc0d .word 0x0800dc0d 800dbc8: 0800dc0d .word 0x0800dc0d 800dbcc: 0800dc0d .word 0x0800dc0d 800dbd0: 0800dc0d .word 0x0800dc0d 800dbd4: 0800dc0d .word 0x0800dc0d 800dbd8: 0800dc0d .word 0x0800dc0d 800dbdc: 0800dc0d .word 0x0800dc0d 800dbe0: 0800dc0d .word 0x0800dc0d 800dbe4: 0800dc0d .word 0x0800dc0d 800dbe8: 0800dc0d .word 0x0800dc0d 800dbec: 0800dc0d .word 0x0800dc0d 800dbf0: 0800dc0d .word 0x0800dc0d 800dbf4: 0800dc0d .word 0x0800dc0d 800dbf8: 0800dc0d .word 0x0800dc0d 800dbfc: 0800dc0d .word 0x0800dc0d 800dc00: 0800dc0d .word 0x0800dc0d 800dc04: 0800dc0d .word 0x0800dc0d 800dc08: 0800dc0d .word 0x0800dc0d case CDC_SEND_BREAK: break; default: break; 800dc0c: bf00 nop } return (USBD_OK); 800dc0e: 2300 movs r3, #0 /* USER CODE END 5 */ } 800dc10: 4618 mov r0, r3 800dc12: 370c adds r7, #12 800dc14: 46bd mov sp, r7 800dc16: bc80 pop {r7} 800dc18: 4770 bx lr 800dc1a: bf00 nop 0800dc1c : * @param Buf: Buffer of data to be received * @param Len: Number of data received (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len) { 800dc1c: b580 push {r7, lr} 800dc1e: b082 sub sp, #8 800dc20: af00 add r7, sp, #0 800dc22: 6078 str r0, [r7, #4] 800dc24: 6039 str r1, [r7, #0] /* USER CODE BEGIN 6 */ if (*Len) fifo_push(Buf, *Len); 800dc26: 683b ldr r3, [r7, #0] 800dc28: 681b ldr r3, [r3, #0] 800dc2a: 2b00 cmp r3, #0 800dc2c: d005 beq.n 800dc3a 800dc2e: 683b ldr r3, [r7, #0] 800dc30: 681b ldr r3, [r3, #0] 800dc32: 4619 mov r1, r3 800dc34: 6878 ldr r0, [r7, #4] 800dc36: f7ff ff03 bl 800da40 USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); 800dc3a: 6879 ldr r1, [r7, #4] 800dc3c: 4805 ldr r0, [pc, #20] @ (800dc54 ) 800dc3e: f7fe fdcc bl 800c7da USBD_CDC_ReceivePacket(&hUsbDeviceFS); 800dc42: 4804 ldr r0, [pc, #16] @ (800dc54 ) 800dc44: f7fe fe0b bl 800c85e return (USBD_OK); 800dc48: 2300 movs r3, #0 /* USER CODE END 6 */ } 800dc4a: 4618 mov r0, r3 800dc4c: 3708 adds r7, #8 800dc4e: 46bd mov sp, r7 800dc50: bd80 pop {r7, pc} 800dc52: bf00 nop 800dc54: 2000049c .word 0x2000049c 0800dc58 : * @param Buf: Buffer of data to be sent * @param Len: Number of data to be sent (in bytes) * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY */ uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) { 800dc58: b580 push {r7, lr} 800dc5a: b084 sub sp, #16 800dc5c: af00 add r7, sp, #0 800dc5e: 6078 str r0, [r7, #4] 800dc60: 460b mov r3, r1 800dc62: 807b strh r3, [r7, #2] uint8_t result = USBD_OK; 800dc64: 2300 movs r3, #0 800dc66: 73fb strb r3, [r7, #15] /* USER CODE BEGIN 7 */ USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData; 800dc68: 4b0d ldr r3, [pc, #52] @ (800dca0 ) 800dc6a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800dc6e: 60bb str r3, [r7, #8] if (hcdc->TxState != 0){ 800dc70: 68bb ldr r3, [r7, #8] 800dc72: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 800dc76: 2b00 cmp r3, #0 800dc78: d001 beq.n 800dc7e return USBD_BUSY; 800dc7a: 2301 movs r3, #1 800dc7c: e00b b.n 800dc96 } USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len); 800dc7e: 887b ldrh r3, [r7, #2] 800dc80: 461a mov r2, r3 800dc82: 6879 ldr r1, [r7, #4] 800dc84: 4806 ldr r0, [pc, #24] @ (800dca0 ) 800dc86: f7fe fd8f bl 800c7a8 result = USBD_CDC_TransmitPacket(&hUsbDeviceFS); 800dc8a: 4805 ldr r0, [pc, #20] @ (800dca0 ) 800dc8c: f7fe fdb8 bl 800c800 800dc90: 4603 mov r3, r0 800dc92: 73fb strb r3, [r7, #15] /* USER CODE END 7 */ return result; 800dc94: 7bfb ldrb r3, [r7, #15] } 800dc96: 4618 mov r0, r3 800dc98: 3710 adds r7, #16 800dc9a: 46bd mov sp, r7 800dc9c: bd80 pop {r7, pc} 800dc9e: bf00 nop 800dca0: 2000049c .word 0x2000049c 0800dca4 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800dca4: b480 push {r7} 800dca6: b083 sub sp, #12 800dca8: af00 add r7, sp, #0 800dcaa: 4603 mov r3, r0 800dcac: 6039 str r1, [r7, #0] 800dcae: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_DeviceDesc); 800dcb0: 683b ldr r3, [r7, #0] 800dcb2: 2212 movs r2, #18 800dcb4: 801a strh r2, [r3, #0] return USBD_FS_DeviceDesc; 800dcb6: 4b03 ldr r3, [pc, #12] @ (800dcc4 ) } 800dcb8: 4618 mov r0, r3 800dcba: 370c adds r7, #12 800dcbc: 46bd mov sp, r7 800dcbe: bc80 pop {r7} 800dcc0: 4770 bx lr 800dcc2: bf00 nop 800dcc4: 20000158 .word 0x20000158 0800dcc8 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800dcc8: b480 push {r7} 800dcca: b083 sub sp, #12 800dccc: af00 add r7, sp, #0 800dcce: 4603 mov r3, r0 800dcd0: 6039 str r1, [r7, #0] 800dcd2: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_LangIDDesc); 800dcd4: 683b ldr r3, [r7, #0] 800dcd6: 2204 movs r2, #4 800dcd8: 801a strh r2, [r3, #0] return USBD_LangIDDesc; 800dcda: 4b03 ldr r3, [pc, #12] @ (800dce8 ) } 800dcdc: 4618 mov r0, r3 800dcde: 370c adds r7, #12 800dce0: 46bd mov sp, r7 800dce2: bc80 pop {r7} 800dce4: 4770 bx lr 800dce6: bf00 nop 800dce8: 2000016c .word 0x2000016c 0800dcec : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800dcec: b580 push {r7, lr} 800dcee: b082 sub sp, #8 800dcf0: af00 add r7, sp, #0 800dcf2: 4603 mov r3, r0 800dcf4: 6039 str r1, [r7, #0] 800dcf6: 71fb strb r3, [r7, #7] if(speed == 0) 800dcf8: 79fb ldrb r3, [r7, #7] 800dcfa: 2b00 cmp r3, #0 800dcfc: d105 bne.n 800dd0a { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800dcfe: 683a ldr r2, [r7, #0] 800dd00: 4907 ldr r1, [pc, #28] @ (800dd20 ) 800dd02: 4808 ldr r0, [pc, #32] @ (800dd24 ) 800dd04: f7ff fd8f bl 800d826 800dd08: e004 b.n 800dd14 } else { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800dd0a: 683a ldr r2, [r7, #0] 800dd0c: 4904 ldr r1, [pc, #16] @ (800dd20 ) 800dd0e: 4805 ldr r0, [pc, #20] @ (800dd24 ) 800dd10: f7ff fd89 bl 800d826 } return USBD_StrDesc; 800dd14: 4b02 ldr r3, [pc, #8] @ (800dd20 ) } 800dd16: 4618 mov r0, r3 800dd18: 3708 adds r7, #8 800dd1a: 46bd mov sp, r7 800dd1c: bd80 pop {r7, pc} 800dd1e: bf00 nop 800dd20: 20001064 .word 0x20001064 800dd24: 0800f3d0 .word 0x0800f3d0 0800dd28 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800dd28: b580 push {r7, lr} 800dd2a: b082 sub sp, #8 800dd2c: af00 add r7, sp, #0 800dd2e: 4603 mov r3, r0 800dd30: 6039 str r1, [r7, #0] 800dd32: 71fb strb r3, [r7, #7] UNUSED(speed); USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 800dd34: 683a ldr r2, [r7, #0] 800dd36: 4904 ldr r1, [pc, #16] @ (800dd48 ) 800dd38: 4804 ldr r0, [pc, #16] @ (800dd4c ) 800dd3a: f7ff fd74 bl 800d826 return USBD_StrDesc; 800dd3e: 4b02 ldr r3, [pc, #8] @ (800dd48 ) } 800dd40: 4618 mov r0, r3 800dd42: 3708 adds r7, #8 800dd44: 46bd mov sp, r7 800dd46: bd80 pop {r7, pc} 800dd48: 20001064 .word 0x20001064 800dd4c: 0800f3e8 .word 0x0800f3e8 0800dd50 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800dd50: b580 push {r7, lr} 800dd52: b082 sub sp, #8 800dd54: af00 add r7, sp, #0 800dd56: 4603 mov r3, r0 800dd58: 6039 str r1, [r7, #0] 800dd5a: 71fb strb r3, [r7, #7] UNUSED(speed); *length = USB_SIZ_STRING_SERIAL; 800dd5c: 683b ldr r3, [r7, #0] 800dd5e: 221a movs r2, #26 800dd60: 801a strh r2, [r3, #0] /* Update the serial number string descriptor with the data from the unique * ID */ Get_SerialNum(); 800dd62: f000 f843 bl 800ddec /* USER CODE BEGIN USBD_FS_SerialStrDescriptor */ /* USER CODE END USBD_FS_SerialStrDescriptor */ return (uint8_t *) USBD_StringSerial; 800dd66: 4b02 ldr r3, [pc, #8] @ (800dd70 ) } 800dd68: 4618 mov r0, r3 800dd6a: 3708 adds r7, #8 800dd6c: 46bd mov sp, r7 800dd6e: bd80 pop {r7, pc} 800dd70: 20000170 .word 0x20000170 0800dd74 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800dd74: b580 push {r7, lr} 800dd76: b082 sub sp, #8 800dd78: af00 add r7, sp, #0 800dd7a: 4603 mov r3, r0 800dd7c: 6039 str r1, [r7, #0] 800dd7e: 71fb strb r3, [r7, #7] if(speed == USBD_SPEED_HIGH) 800dd80: 79fb ldrb r3, [r7, #7] 800dd82: 2b00 cmp r3, #0 800dd84: d105 bne.n 800dd92 { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800dd86: 683a ldr r2, [r7, #0] 800dd88: 4907 ldr r1, [pc, #28] @ (800dda8 ) 800dd8a: 4808 ldr r0, [pc, #32] @ (800ddac ) 800dd8c: f7ff fd4b bl 800d826 800dd90: e004 b.n 800dd9c } else { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800dd92: 683a ldr r2, [r7, #0] 800dd94: 4904 ldr r1, [pc, #16] @ (800dda8 ) 800dd96: 4805 ldr r0, [pc, #20] @ (800ddac ) 800dd98: f7ff fd45 bl 800d826 } return USBD_StrDesc; 800dd9c: 4b02 ldr r3, [pc, #8] @ (800dda8 ) } 800dd9e: 4618 mov r0, r3 800dda0: 3708 adds r7, #8 800dda2: 46bd mov sp, r7 800dda4: bd80 pop {r7, pc} 800dda6: bf00 nop 800dda8: 20001064 .word 0x20001064 800ddac: 0800f3fc .word 0x0800f3fc 0800ddb0 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ddb0: b580 push {r7, lr} 800ddb2: b082 sub sp, #8 800ddb4: af00 add r7, sp, #0 800ddb6: 4603 mov r3, r0 800ddb8: 6039 str r1, [r7, #0] 800ddba: 71fb strb r3, [r7, #7] if(speed == 0) 800ddbc: 79fb ldrb r3, [r7, #7] 800ddbe: 2b00 cmp r3, #0 800ddc0: d105 bne.n 800ddce { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800ddc2: 683a ldr r2, [r7, #0] 800ddc4: 4907 ldr r1, [pc, #28] @ (800dde4 ) 800ddc6: 4808 ldr r0, [pc, #32] @ (800dde8 ) 800ddc8: f7ff fd2d bl 800d826 800ddcc: e004 b.n 800ddd8 } else { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800ddce: 683a ldr r2, [r7, #0] 800ddd0: 4904 ldr r1, [pc, #16] @ (800dde4 ) 800ddd2: 4805 ldr r0, [pc, #20] @ (800dde8 ) 800ddd4: f7ff fd27 bl 800d826 } return USBD_StrDesc; 800ddd8: 4b02 ldr r3, [pc, #8] @ (800dde4 ) } 800ddda: 4618 mov r0, r3 800dddc: 3708 adds r7, #8 800ddde: 46bd mov sp, r7 800dde0: bd80 pop {r7, pc} 800dde2: bf00 nop 800dde4: 20001064 .word 0x20001064 800dde8: 0800f408 .word 0x0800f408 0800ddec : * @brief Create the serial number string descriptor * @param None * @retval None */ static void Get_SerialNum(void) { 800ddec: b580 push {r7, lr} 800ddee: b084 sub sp, #16 800ddf0: af00 add r7, sp, #0 uint32_t deviceserial0; uint32_t deviceserial1; uint32_t deviceserial2; deviceserial0 = *(uint32_t *) DEVICE_ID1; 800ddf2: 4b0f ldr r3, [pc, #60] @ (800de30 ) 800ddf4: 681b ldr r3, [r3, #0] 800ddf6: 60fb str r3, [r7, #12] deviceserial1 = *(uint32_t *) DEVICE_ID2; 800ddf8: 4b0e ldr r3, [pc, #56] @ (800de34 ) 800ddfa: 681b ldr r3, [r3, #0] 800ddfc: 60bb str r3, [r7, #8] deviceserial2 = *(uint32_t *) DEVICE_ID3; 800ddfe: 4b0e ldr r3, [pc, #56] @ (800de38 ) 800de00: 681b ldr r3, [r3, #0] 800de02: 607b str r3, [r7, #4] deviceserial0 += deviceserial2; 800de04: 68fa ldr r2, [r7, #12] 800de06: 687b ldr r3, [r7, #4] 800de08: 4413 add r3, r2 800de0a: 60fb str r3, [r7, #12] if (deviceserial0 != 0) 800de0c: 68fb ldr r3, [r7, #12] 800de0e: 2b00 cmp r3, #0 800de10: d009 beq.n 800de26 { IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8); 800de12: 2208 movs r2, #8 800de14: 4909 ldr r1, [pc, #36] @ (800de3c ) 800de16: 68f8 ldr r0, [r7, #12] 800de18: f000 f814 bl 800de44 IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4); 800de1c: 2204 movs r2, #4 800de1e: 4908 ldr r1, [pc, #32] @ (800de40 ) 800de20: 68b8 ldr r0, [r7, #8] 800de22: f000 f80f bl 800de44 } } 800de26: bf00 nop 800de28: 3710 adds r7, #16 800de2a: 46bd mov sp, r7 800de2c: bd80 pop {r7, pc} 800de2e: bf00 nop 800de30: 1ffff7e8 .word 0x1ffff7e8 800de34: 1ffff7ec .word 0x1ffff7ec 800de38: 1ffff7f0 .word 0x1ffff7f0 800de3c: 20000172 .word 0x20000172 800de40: 20000182 .word 0x20000182 0800de44 : * @param pbuf: pointer to the buffer * @param len: buffer length * @retval None */ static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len) { 800de44: b480 push {r7} 800de46: b087 sub sp, #28 800de48: af00 add r7, sp, #0 800de4a: 60f8 str r0, [r7, #12] 800de4c: 60b9 str r1, [r7, #8] 800de4e: 4613 mov r3, r2 800de50: 71fb strb r3, [r7, #7] uint8_t idx = 0; 800de52: 2300 movs r3, #0 800de54: 75fb strb r3, [r7, #23] for (idx = 0; idx < len; idx++) 800de56: 2300 movs r3, #0 800de58: 75fb strb r3, [r7, #23] 800de5a: e027 b.n 800deac { if (((value >> 28)) < 0xA) 800de5c: 68fb ldr r3, [r7, #12] 800de5e: 0f1b lsrs r3, r3, #28 800de60: 2b09 cmp r3, #9 800de62: d80b bhi.n 800de7c { pbuf[2 * idx] = (value >> 28) + '0'; 800de64: 68fb ldr r3, [r7, #12] 800de66: 0f1b lsrs r3, r3, #28 800de68: b2da uxtb r2, r3 800de6a: 7dfb ldrb r3, [r7, #23] 800de6c: 005b lsls r3, r3, #1 800de6e: 4619 mov r1, r3 800de70: 68bb ldr r3, [r7, #8] 800de72: 440b add r3, r1 800de74: 3230 adds r2, #48 @ 0x30 800de76: b2d2 uxtb r2, r2 800de78: 701a strb r2, [r3, #0] 800de7a: e00a b.n 800de92 } else { pbuf[2 * idx] = (value >> 28) + 'A' - 10; 800de7c: 68fb ldr r3, [r7, #12] 800de7e: 0f1b lsrs r3, r3, #28 800de80: b2da uxtb r2, r3 800de82: 7dfb ldrb r3, [r7, #23] 800de84: 005b lsls r3, r3, #1 800de86: 4619 mov r1, r3 800de88: 68bb ldr r3, [r7, #8] 800de8a: 440b add r3, r1 800de8c: 3237 adds r2, #55 @ 0x37 800de8e: b2d2 uxtb r2, r2 800de90: 701a strb r2, [r3, #0] } value = value << 4; 800de92: 68fb ldr r3, [r7, #12] 800de94: 011b lsls r3, r3, #4 800de96: 60fb str r3, [r7, #12] pbuf[2 * idx + 1] = 0; 800de98: 7dfb ldrb r3, [r7, #23] 800de9a: 005b lsls r3, r3, #1 800de9c: 3301 adds r3, #1 800de9e: 68ba ldr r2, [r7, #8] 800dea0: 4413 add r3, r2 800dea2: 2200 movs r2, #0 800dea4: 701a strb r2, [r3, #0] for (idx = 0; idx < len; idx++) 800dea6: 7dfb ldrb r3, [r7, #23] 800dea8: 3301 adds r3, #1 800deaa: 75fb strb r3, [r7, #23] 800deac: 7dfa ldrb r2, [r7, #23] 800deae: 79fb ldrb r3, [r7, #7] 800deb0: 429a cmp r2, r3 800deb2: d3d3 bcc.n 800de5c } } 800deb4: bf00 nop 800deb6: bf00 nop 800deb8: 371c adds r7, #28 800deba: 46bd mov sp, r7 800debc: bc80 pop {r7} 800debe: 4770 bx lr 0800dec0 : LL Driver Callbacks (PCD -> USB Device Library) *******************************************************************************/ /* MSP Init */ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) { 800dec0: b580 push {r7, lr} 800dec2: b084 sub sp, #16 800dec4: af00 add r7, sp, #0 800dec6: 6078 str r0, [r7, #4] if(pcdHandle->Instance==USB) 800dec8: 687b ldr r3, [r7, #4] 800deca: 681b ldr r3, [r3, #0] 800decc: 4a0d ldr r2, [pc, #52] @ (800df04 ) 800dece: 4293 cmp r3, r2 800ded0: d113 bne.n 800defa { /* USER CODE BEGIN USB_MspInit 0 */ /* USER CODE END USB_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USB_CLK_ENABLE(); 800ded2: 4b0d ldr r3, [pc, #52] @ (800df08 ) 800ded4: 69db ldr r3, [r3, #28] 800ded6: 4a0c ldr r2, [pc, #48] @ (800df08 ) 800ded8: f443 0300 orr.w r3, r3, #8388608 @ 0x800000 800dedc: 61d3 str r3, [r2, #28] 800dede: 4b0a ldr r3, [pc, #40] @ (800df08 ) 800dee0: 69db ldr r3, [r3, #28] 800dee2: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800dee6: 60fb str r3, [r7, #12] 800dee8: 68fb ldr r3, [r7, #12] /* Peripheral interrupt init */ HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0); 800deea: 2200 movs r2, #0 800deec: 2100 movs r1, #0 800deee: 2014 movs r0, #20 800def0: f7f7 fddb bl 8005aaa HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn); 800def4: 2014 movs r0, #20 800def6: f7f7 fdf4 bl 8005ae2 /* USER CODE BEGIN USB_MspInit 1 */ /* USER CODE END USB_MspInit 1 */ } } 800defa: bf00 nop 800defc: 3710 adds r7, #16 800defe: 46bd mov sp, r7 800df00: bd80 pop {r7, pc} 800df02: bf00 nop 800df04: 40005c00 .word 0x40005c00 800df08: 40021000 .word 0x40021000 0800df0c : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800df0c: b580 push {r7, lr} 800df0e: b082 sub sp, #8 800df10: af00 add r7, sp, #0 800df12: 6078 str r0, [r7, #4] USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); 800df14: 687b ldr r3, [r7, #4] 800df16: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800df1a: 687b ldr r3, [r7, #4] 800df1c: f503 7326 add.w r3, r3, #664 @ 0x298 800df20: 4619 mov r1, r3 800df22: 4610 mov r0, r2 800df24: f7fe fd51 bl 800c9ca } 800df28: bf00 nop 800df2a: 3708 adds r7, #8 800df2c: 46bd mov sp, r7 800df2e: bd80 pop {r7, pc} 0800df30 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800df30: b580 push {r7, lr} 800df32: b082 sub sp, #8 800df34: af00 add r7, sp, #0 800df36: 6078 str r0, [r7, #4] 800df38: 460b mov r3, r1 800df3a: 70fb strb r3, [r7, #3] USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); 800df3c: 687b ldr r3, [r7, #4] 800df3e: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800df42: 78fa ldrb r2, [r7, #3] 800df44: 6879 ldr r1, [r7, #4] 800df46: 4613 mov r3, r2 800df48: 009b lsls r3, r3, #2 800df4a: 4413 add r3, r2 800df4c: 00db lsls r3, r3, #3 800df4e: 440b add r3, r1 800df50: f503 73b2 add.w r3, r3, #356 @ 0x164 800df54: 681a ldr r2, [r3, #0] 800df56: 78fb ldrb r3, [r7, #3] 800df58: 4619 mov r1, r3 800df5a: f7fe fd83 bl 800ca64 } 800df5e: bf00 nop 800df60: 3708 adds r7, #8 800df62: 46bd mov sp, r7 800df64: bd80 pop {r7, pc} 0800df66 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800df66: b580 push {r7, lr} 800df68: b082 sub sp, #8 800df6a: af00 add r7, sp, #0 800df6c: 6078 str r0, [r7, #4] 800df6e: 460b mov r3, r1 800df70: 70fb strb r3, [r7, #3] USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); 800df72: 687b ldr r3, [r7, #4] 800df74: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800df78: 78fa ldrb r2, [r7, #3] 800df7a: 6879 ldr r1, [r7, #4] 800df7c: 4613 mov r3, r2 800df7e: 009b lsls r3, r3, #2 800df80: 4413 add r3, r2 800df82: 00db lsls r3, r3, #3 800df84: 440b add r3, r1 800df86: 3324 adds r3, #36 @ 0x24 800df88: 681a ldr r2, [r3, #0] 800df8a: 78fb ldrb r3, [r7, #3] 800df8c: 4619 mov r1, r3 800df8e: f7fe fdda bl 800cb46 } 800df92: bf00 nop 800df94: 3708 adds r7, #8 800df96: 46bd mov sp, r7 800df98: bd80 pop {r7, pc} 0800df9a : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800df9a: b580 push {r7, lr} 800df9c: b082 sub sp, #8 800df9e: af00 add r7, sp, #0 800dfa0: 6078 str r0, [r7, #4] USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); 800dfa2: 687b ldr r3, [r7, #4] 800dfa4: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800dfa8: 4618 mov r0, r3 800dfaa: f7fe feea bl 800cd82 } 800dfae: bf00 nop 800dfb0: 3708 adds r7, #8 800dfb2: 46bd mov sp, r7 800dfb4: bd80 pop {r7, pc} 0800dfb6 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800dfb6: b580 push {r7, lr} 800dfb8: b084 sub sp, #16 800dfba: af00 add r7, sp, #0 800dfbc: 6078 str r0, [r7, #4] USBD_SpeedTypeDef speed = USBD_SPEED_FULL; 800dfbe: 2301 movs r3, #1 800dfc0: 73fb strb r3, [r7, #15] if ( hpcd->Init.speed != PCD_SPEED_FULL) 800dfc2: 687b ldr r3, [r7, #4] 800dfc4: 799b ldrb r3, [r3, #6] 800dfc6: 2b02 cmp r3, #2 800dfc8: d001 beq.n 800dfce { Error_Handler(); 800dfca: f7f5 fb81 bl 80036d0 } /* Set Speed. */ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); 800dfce: 687b ldr r3, [r7, #4] 800dfd0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800dfd4: 7bfa ldrb r2, [r7, #15] 800dfd6: 4611 mov r1, r2 800dfd8: 4618 mov r0, r3 800dfda: f7fe fe9a bl 800cd12 /* Reset Device. */ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); 800dfde: 687b ldr r3, [r7, #4] 800dfe0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800dfe4: 4618 mov r0, r3 800dfe6: f7fe fe53 bl 800cc90 } 800dfea: bf00 nop 800dfec: 3710 adds r7, #16 800dfee: 46bd mov sp, r7 800dff0: bd80 pop {r7, pc} ... 0800dff4 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800dff4: b580 push {r7, lr} 800dff6: b082 sub sp, #8 800dff8: af00 add r7, sp, #0 800dffa: 6078 str r0, [r7, #4] /* Inform USB library that core enters in suspend Mode. */ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); 800dffc: 687b ldr r3, [r7, #4] 800dffe: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800e002: 4618 mov r0, r3 800e004: f7fe fe94 bl 800cd30 /* Enter in STOP mode. */ /* USER CODE BEGIN 2 */ if (hpcd->Init.low_power_enable) 800e008: 687b ldr r3, [r7, #4] 800e00a: 7a9b ldrb r3, [r3, #10] 800e00c: 2b00 cmp r3, #0 800e00e: d005 beq.n 800e01c { /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 800e010: 4b04 ldr r3, [pc, #16] @ (800e024 ) 800e012: 691b ldr r3, [r3, #16] 800e014: 4a03 ldr r2, [pc, #12] @ (800e024 ) 800e016: f043 0306 orr.w r3, r3, #6 800e01a: 6113 str r3, [r2, #16] } /* USER CODE END 2 */ } 800e01c: bf00 nop 800e01e: 3708 adds r7, #8 800e020: 46bd mov sp, r7 800e022: bd80 pop {r7, pc} 800e024: e000ed00 .word 0xe000ed00 0800e028 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800e028: b580 push {r7, lr} 800e02a: b082 sub sp, #8 800e02c: af00 add r7, sp, #0 800e02e: 6078 str r0, [r7, #4] /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); 800e030: 687b ldr r3, [r7, #4] 800e032: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800e036: 4618 mov r0, r3 800e038: f7fe fe8e bl 800cd58 } 800e03c: bf00 nop 800e03e: 3708 adds r7, #8 800e040: 46bd mov sp, r7 800e042: bd80 pop {r7, pc} 0800e044 : * @brief Initializes the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) { 800e044: b580 push {r7, lr} 800e046: b082 sub sp, #8 800e048: af00 add r7, sp, #0 800e04a: 6078 str r0, [r7, #4] /* Init USB Ip. */ /* Link the driver to the stack. */ hpcd_USB_FS.pData = pdev; 800e04c: 4a28 ldr r2, [pc, #160] @ (800e0f0 ) 800e04e: 687b ldr r3, [r7, #4] 800e050: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4 pdev->pData = &hpcd_USB_FS; 800e054: 687b ldr r3, [r7, #4] 800e056: 4a26 ldr r2, [pc, #152] @ (800e0f0 ) 800e058: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0 hpcd_USB_FS.Instance = USB; 800e05c: 4b24 ldr r3, [pc, #144] @ (800e0f0 ) 800e05e: 4a25 ldr r2, [pc, #148] @ (800e0f4 ) 800e060: 601a str r2, [r3, #0] hpcd_USB_FS.Init.dev_endpoints = 8; 800e062: 4b23 ldr r3, [pc, #140] @ (800e0f0 ) 800e064: 2208 movs r2, #8 800e066: 711a strb r2, [r3, #4] hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; 800e068: 4b21 ldr r3, [pc, #132] @ (800e0f0 ) 800e06a: 2202 movs r2, #2 800e06c: 719a strb r2, [r3, #6] hpcd_USB_FS.Init.low_power_enable = DISABLE; 800e06e: 4b20 ldr r3, [pc, #128] @ (800e0f0 ) 800e070: 2200 movs r2, #0 800e072: 729a strb r2, [r3, #10] hpcd_USB_FS.Init.lpm_enable = DISABLE; 800e074: 4b1e ldr r3, [pc, #120] @ (800e0f0 ) 800e076: 2200 movs r2, #0 800e078: 72da strb r2, [r3, #11] hpcd_USB_FS.Init.battery_charging_enable = DISABLE; 800e07a: 4b1d ldr r3, [pc, #116] @ (800e0f0 ) 800e07c: 2200 movs r2, #0 800e07e: 731a strb r2, [r3, #12] if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) 800e080: 481b ldr r0, [pc, #108] @ (800e0f0 ) 800e082: f7f8 faf0 bl 8006666 800e086: 4603 mov r3, r0 800e088: 2b00 cmp r3, #0 800e08a: d001 beq.n 800e090 { Error_Handler( ); 800e08c: f7f5 fb20 bl 80036d0 HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback); HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback); HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* USER CODE BEGIN EndPoint_Configuration */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18); 800e090: 687b ldr r3, [r7, #4] 800e092: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800e096: 2318 movs r3, #24 800e098: 2200 movs r2, #0 800e09a: 2100 movs r1, #0 800e09c: f7fa f801 bl 80080a2 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58); 800e0a0: 687b ldr r3, [r7, #4] 800e0a2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800e0a6: 2358 movs r3, #88 @ 0x58 800e0a8: 2200 movs r2, #0 800e0aa: 2180 movs r1, #128 @ 0x80 800e0ac: f7f9 fff9 bl 80080a2 /* USER CODE END EndPoint_Configuration */ /* USER CODE BEGIN EndPoint_Configuration_CDC */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0); 800e0b0: 687b ldr r3, [r7, #4] 800e0b2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800e0b6: 23c0 movs r3, #192 @ 0xc0 800e0b8: 2200 movs r2, #0 800e0ba: 2181 movs r1, #129 @ 0x81 800e0bc: f7f9 fff1 bl 80080a2 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110); 800e0c0: 687b ldr r3, [r7, #4] 800e0c2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800e0c6: f44f 7388 mov.w r3, #272 @ 0x110 800e0ca: 2200 movs r2, #0 800e0cc: 2101 movs r1, #1 800e0ce: f7f9 ffe8 bl 80080a2 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100); 800e0d2: 687b ldr r3, [r7, #4] 800e0d4: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800e0d8: f44f 7380 mov.w r3, #256 @ 0x100 800e0dc: 2200 movs r2, #0 800e0de: 2182 movs r1, #130 @ 0x82 800e0e0: f7f9 ffdf bl 80080a2 /* USER CODE END EndPoint_Configuration_CDC */ return USBD_OK; 800e0e4: 2300 movs r3, #0 } 800e0e6: 4618 mov r0, r3 800e0e8: 3708 adds r7, #8 800e0ea: 46bd mov sp, r7 800e0ec: bd80 pop {r7, pc} 800e0ee: bf00 nop 800e0f0: 20001264 .word 0x20001264 800e0f4: 40005c00 .word 0x40005c00 0800e0f8 : * @brief Starts the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) { 800e0f8: b580 push {r7, lr} 800e0fa: b084 sub sp, #16 800e0fc: af00 add r7, sp, #0 800e0fe: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_status = HAL_OK; 800e100: 2300 movs r3, #0 800e102: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800e104: 2300 movs r3, #0 800e106: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_Start(pdev->pData); 800e108: 687b ldr r3, [r7, #4] 800e10a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800e10e: 4618 mov r0, r3 800e110: f7f8 fb9f bl 8006852 800e114: 4603 mov r3, r0 800e116: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800e118: 7bfb ldrb r3, [r7, #15] 800e11a: 4618 mov r0, r3 800e11c: f000 f94e bl 800e3bc 800e120: 4603 mov r3, r0 800e122: 73bb strb r3, [r7, #14] return usb_status; 800e124: 7bbb ldrb r3, [r7, #14] } 800e126: 4618 mov r0, r3 800e128: 3710 adds r7, #16 800e12a: 46bd mov sp, r7 800e12c: bd80 pop {r7, pc} 0800e12e : * @param ep_type: Endpoint type * @param ep_mps: Endpoint max packet size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) { 800e12e: b580 push {r7, lr} 800e130: b084 sub sp, #16 800e132: af00 add r7, sp, #0 800e134: 6078 str r0, [r7, #4] 800e136: 4608 mov r0, r1 800e138: 4611 mov r1, r2 800e13a: 461a mov r2, r3 800e13c: 4603 mov r3, r0 800e13e: 70fb strb r3, [r7, #3] 800e140: 460b mov r3, r1 800e142: 70bb strb r3, [r7, #2] 800e144: 4613 mov r3, r2 800e146: 803b strh r3, [r7, #0] HAL_StatusTypeDef hal_status = HAL_OK; 800e148: 2300 movs r3, #0 800e14a: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800e14c: 2300 movs r3, #0 800e14e: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); 800e150: 687b ldr r3, [r7, #4] 800e152: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800e156: 78bb ldrb r3, [r7, #2] 800e158: 883a ldrh r2, [r7, #0] 800e15a: 78f9 ldrb r1, [r7, #3] 800e15c: f7f8 fcf3 bl 8006b46 800e160: 4603 mov r3, r0 800e162: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800e164: 7bfb ldrb r3, [r7, #15] 800e166: 4618 mov r0, r3 800e168: f000 f928 bl 800e3bc 800e16c: 4603 mov r3, r0 800e16e: 73bb strb r3, [r7, #14] return usb_status; 800e170: 7bbb ldrb r3, [r7, #14] } 800e172: 4618 mov r0, r3 800e174: 3710 adds r7, #16 800e176: 46bd mov sp, r7 800e178: bd80 pop {r7, pc} 0800e17a : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800e17a: b580 push {r7, lr} 800e17c: b084 sub sp, #16 800e17e: af00 add r7, sp, #0 800e180: 6078 str r0, [r7, #4] 800e182: 460b mov r3, r1 800e184: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800e186: 2300 movs r3, #0 800e188: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800e18a: 2300 movs r3, #0 800e18c: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); 800e18e: 687b ldr r3, [r7, #4] 800e190: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800e194: 78fa ldrb r2, [r7, #3] 800e196: 4611 mov r1, r2 800e198: 4618 mov r0, r3 800e19a: f7f8 fd31 bl 8006c00 800e19e: 4603 mov r3, r0 800e1a0: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800e1a2: 7bfb ldrb r3, [r7, #15] 800e1a4: 4618 mov r0, r3 800e1a6: f000 f909 bl 800e3bc 800e1aa: 4603 mov r3, r0 800e1ac: 73bb strb r3, [r7, #14] return usb_status; 800e1ae: 7bbb ldrb r3, [r7, #14] } 800e1b0: 4618 mov r0, r3 800e1b2: 3710 adds r7, #16 800e1b4: 46bd mov sp, r7 800e1b6: bd80 pop {r7, pc} 0800e1b8 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800e1b8: b580 push {r7, lr} 800e1ba: b084 sub sp, #16 800e1bc: af00 add r7, sp, #0 800e1be: 6078 str r0, [r7, #4] 800e1c0: 460b mov r3, r1 800e1c2: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800e1c4: 2300 movs r3, #0 800e1c6: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800e1c8: 2300 movs r3, #0 800e1ca: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); 800e1cc: 687b ldr r3, [r7, #4] 800e1ce: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800e1d2: 78fa ldrb r2, [r7, #3] 800e1d4: 4611 mov r1, r2 800e1d6: 4618 mov r0, r3 800e1d8: f7f8 fdd9 bl 8006d8e 800e1dc: 4603 mov r3, r0 800e1de: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800e1e0: 7bfb ldrb r3, [r7, #15] 800e1e2: 4618 mov r0, r3 800e1e4: f000 f8ea bl 800e3bc 800e1e8: 4603 mov r3, r0 800e1ea: 73bb strb r3, [r7, #14] return usb_status; 800e1ec: 7bbb ldrb r3, [r7, #14] } 800e1ee: 4618 mov r0, r3 800e1f0: 3710 adds r7, #16 800e1f2: 46bd mov sp, r7 800e1f4: bd80 pop {r7, pc} 0800e1f6 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800e1f6: b580 push {r7, lr} 800e1f8: b084 sub sp, #16 800e1fa: af00 add r7, sp, #0 800e1fc: 6078 str r0, [r7, #4] 800e1fe: 460b mov r3, r1 800e200: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800e202: 2300 movs r3, #0 800e204: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800e206: 2300 movs r3, #0 800e208: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); 800e20a: 687b ldr r3, [r7, #4] 800e20c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800e210: 78fa ldrb r2, [r7, #3] 800e212: 4611 mov r1, r2 800e214: 4618 mov r0, r3 800e216: f7f8 fe1a bl 8006e4e 800e21a: 4603 mov r3, r0 800e21c: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800e21e: 7bfb ldrb r3, [r7, #15] 800e220: 4618 mov r0, r3 800e222: f000 f8cb bl 800e3bc 800e226: 4603 mov r3, r0 800e228: 73bb strb r3, [r7, #14] return usb_status; 800e22a: 7bbb ldrb r3, [r7, #14] } 800e22c: 4618 mov r0, r3 800e22e: 3710 adds r7, #16 800e230: 46bd mov sp, r7 800e232: bd80 pop {r7, pc} 0800e234 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Stall (1: Yes, 0: No) */ uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800e234: b480 push {r7} 800e236: b085 sub sp, #20 800e238: af00 add r7, sp, #0 800e23a: 6078 str r0, [r7, #4] 800e23c: 460b mov r3, r1 800e23e: 70fb strb r3, [r7, #3] PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; 800e240: 687b ldr r3, [r7, #4] 800e242: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800e246: 60fb str r3, [r7, #12] if((ep_addr & 0x80) == 0x80) 800e248: f997 3003 ldrsb.w r3, [r7, #3] 800e24c: 2b00 cmp r3, #0 800e24e: da0b bge.n 800e268 { return hpcd->IN_ep[ep_addr & 0x7F].is_stall; 800e250: 78fb ldrb r3, [r7, #3] 800e252: f003 027f and.w r2, r3, #127 @ 0x7f 800e256: 68f9 ldr r1, [r7, #12] 800e258: 4613 mov r3, r2 800e25a: 009b lsls r3, r3, #2 800e25c: 4413 add r3, r2 800e25e: 00db lsls r3, r3, #3 800e260: 440b add r3, r1 800e262: 3312 adds r3, #18 800e264: 781b ldrb r3, [r3, #0] 800e266: e00b b.n 800e280 } else { return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; 800e268: 78fb ldrb r3, [r7, #3] 800e26a: f003 027f and.w r2, r3, #127 @ 0x7f 800e26e: 68f9 ldr r1, [r7, #12] 800e270: 4613 mov r3, r2 800e272: 009b lsls r3, r3, #2 800e274: 4413 add r3, r2 800e276: 00db lsls r3, r3, #3 800e278: 440b add r3, r1 800e27a: f503 73a9 add.w r3, r3, #338 @ 0x152 800e27e: 781b ldrb r3, [r3, #0] } } 800e280: 4618 mov r0, r3 800e282: 3714 adds r7, #20 800e284: 46bd mov sp, r7 800e286: bc80 pop {r7} 800e288: 4770 bx lr 0800e28a : * @param pdev: Device handle * @param dev_addr: Device address * @retval USBD status */ USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) { 800e28a: b580 push {r7, lr} 800e28c: b084 sub sp, #16 800e28e: af00 add r7, sp, #0 800e290: 6078 str r0, [r7, #4] 800e292: 460b mov r3, r1 800e294: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800e296: 2300 movs r3, #0 800e298: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800e29a: 2300 movs r3, #0 800e29c: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); 800e29e: 687b ldr r3, [r7, #4] 800e2a0: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800e2a4: 78fa ldrb r2, [r7, #3] 800e2a6: 4611 mov r1, r2 800e2a8: 4618 mov r0, r3 800e2aa: f7f8 fc28 bl 8006afe 800e2ae: 4603 mov r3, r0 800e2b0: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800e2b2: 7bfb ldrb r3, [r7, #15] 800e2b4: 4618 mov r0, r3 800e2b6: f000 f881 bl 800e3bc 800e2ba: 4603 mov r3, r0 800e2bc: 73bb strb r3, [r7, #14] return usb_status; 800e2be: 7bbb ldrb r3, [r7, #14] } 800e2c0: 4618 mov r0, r3 800e2c2: 3710 adds r7, #16 800e2c4: 46bd mov sp, r7 800e2c6: bd80 pop {r7, pc} 0800e2c8 : * @param pbuf: Pointer to data to be sent * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800e2c8: b580 push {r7, lr} 800e2ca: b086 sub sp, #24 800e2cc: af00 add r7, sp, #0 800e2ce: 60f8 str r0, [r7, #12] 800e2d0: 607a str r2, [r7, #4] 800e2d2: 461a mov r2, r3 800e2d4: 460b mov r3, r1 800e2d6: 72fb strb r3, [r7, #11] 800e2d8: 4613 mov r3, r2 800e2da: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800e2dc: 2300 movs r3, #0 800e2de: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800e2e0: 2300 movs r3, #0 800e2e2: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); 800e2e4: 68fb ldr r3, [r7, #12] 800e2e6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800e2ea: 893b ldrh r3, [r7, #8] 800e2ec: 7af9 ldrb r1, [r7, #11] 800e2ee: 687a ldr r2, [r7, #4] 800e2f0: f7f8 fd16 bl 8006d20 800e2f4: 4603 mov r3, r0 800e2f6: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800e2f8: 7dfb ldrb r3, [r7, #23] 800e2fa: 4618 mov r0, r3 800e2fc: f000 f85e bl 800e3bc 800e300: 4603 mov r3, r0 800e302: 75bb strb r3, [r7, #22] return usb_status; 800e304: 7dbb ldrb r3, [r7, #22] } 800e306: 4618 mov r0, r3 800e308: 3718 adds r7, #24 800e30a: 46bd mov sp, r7 800e30c: bd80 pop {r7, pc} 0800e30e : * @param pbuf: Pointer to data to be received * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800e30e: b580 push {r7, lr} 800e310: b086 sub sp, #24 800e312: af00 add r7, sp, #0 800e314: 60f8 str r0, [r7, #12] 800e316: 607a str r2, [r7, #4] 800e318: 461a mov r2, r3 800e31a: 460b mov r3, r1 800e31c: 72fb strb r3, [r7, #11] 800e31e: 4613 mov r3, r2 800e320: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800e322: 2300 movs r3, #0 800e324: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800e326: 2300 movs r3, #0 800e328: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); 800e32a: 68fb ldr r3, [r7, #12] 800e32c: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800e330: 893b ldrh r3, [r7, #8] 800e332: 7af9 ldrb r1, [r7, #11] 800e334: 687a ldr r2, [r7, #4] 800e336: f7f8 fcab bl 8006c90 800e33a: 4603 mov r3, r0 800e33c: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800e33e: 7dfb ldrb r3, [r7, #23] 800e340: 4618 mov r0, r3 800e342: f000 f83b bl 800e3bc 800e346: 4603 mov r3, r0 800e348: 75bb strb r3, [r7, #22] return usb_status; 800e34a: 7dbb ldrb r3, [r7, #22] } 800e34c: 4618 mov r0, r3 800e34e: 3718 adds r7, #24 800e350: 46bd mov sp, r7 800e352: bd80 pop {r7, pc} 0800e354 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Received Data Size */ uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800e354: b580 push {r7, lr} 800e356: b082 sub sp, #8 800e358: af00 add r7, sp, #0 800e35a: 6078 str r0, [r7, #4] 800e35c: 460b mov r3, r1 800e35e: 70fb strb r3, [r7, #3] return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); 800e360: 687b ldr r3, [r7, #4] 800e362: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800e366: 78fa ldrb r2, [r7, #3] 800e368: 4611 mov r1, r2 800e36a: 4618 mov r0, r3 800e36c: f7f8 fcc1 bl 8006cf2 800e370: 4603 mov r3, r0 } 800e372: 4618 mov r0, r3 800e374: 3708 adds r7, #8 800e376: 46bd mov sp, r7 800e378: bd80 pop {r7, pc} ... 0800e37c : * @brief Static single allocation. * @param size: Size of allocated memory * @retval None */ void *USBD_static_malloc(uint32_t size) { 800e37c: b480 push {r7} 800e37e: b083 sub sp, #12 800e380: af00 add r7, sp, #0 800e382: 6078 str r0, [r7, #4] static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ return mem; 800e384: 4b02 ldr r3, [pc, #8] @ (800e390 ) } 800e386: 4618 mov r0, r3 800e388: 370c adds r7, #12 800e38a: 46bd mov sp, r7 800e38c: bc80 pop {r7} 800e38e: 4770 bx lr 800e390: 2000153c .word 0x2000153c 0800e394 : * @brief Dummy memory free * @param p: Pointer to allocated memory address * @retval None */ void USBD_static_free(void *p) { 800e394: b480 push {r7} 800e396: b083 sub sp, #12 800e398: af00 add r7, sp, #0 800e39a: 6078 str r0, [r7, #4] } 800e39c: bf00 nop 800e39e: 370c adds r7, #12 800e3a0: 46bd mov sp, r7 800e3a2: bc80 pop {r7} 800e3a4: 4770 bx lr 0800e3a6 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #else void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800e3a6: b480 push {r7} 800e3a8: b083 sub sp, #12 800e3aa: af00 add r7, sp, #0 800e3ac: 6078 str r0, [r7, #4] 800e3ae: 460b mov r3, r1 800e3b0: 70fb strb r3, [r7, #3] { /* Configure High connection state. */ } /* USER CODE END 6 */ } 800e3b2: bf00 nop 800e3b4: 370c adds r7, #12 800e3b6: 46bd mov sp, r7 800e3b8: bc80 pop {r7} 800e3ba: 4770 bx lr 0800e3bc : * @brief Returns the USB status depending on the HAL status: * @param hal_status: HAL status * @retval USB status */ USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) { 800e3bc: b480 push {r7} 800e3be: b085 sub sp, #20 800e3c0: af00 add r7, sp, #0 800e3c2: 4603 mov r3, r0 800e3c4: 71fb strb r3, [r7, #7] USBD_StatusTypeDef usb_status = USBD_OK; 800e3c6: 2300 movs r3, #0 800e3c8: 73fb strb r3, [r7, #15] switch (hal_status) 800e3ca: 79fb ldrb r3, [r7, #7] 800e3cc: 2b03 cmp r3, #3 800e3ce: d817 bhi.n 800e400 800e3d0: a201 add r2, pc, #4 @ (adr r2, 800e3d8 ) 800e3d2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800e3d6: bf00 nop 800e3d8: 0800e3e9 .word 0x0800e3e9 800e3dc: 0800e3ef .word 0x0800e3ef 800e3e0: 0800e3f5 .word 0x0800e3f5 800e3e4: 0800e3fb .word 0x0800e3fb { case HAL_OK : usb_status = USBD_OK; 800e3e8: 2300 movs r3, #0 800e3ea: 73fb strb r3, [r7, #15] break; 800e3ec: e00b b.n 800e406 case HAL_ERROR : usb_status = USBD_FAIL; 800e3ee: 2302 movs r3, #2 800e3f0: 73fb strb r3, [r7, #15] break; 800e3f2: e008 b.n 800e406 case HAL_BUSY : usb_status = USBD_BUSY; 800e3f4: 2301 movs r3, #1 800e3f6: 73fb strb r3, [r7, #15] break; 800e3f8: e005 b.n 800e406 case HAL_TIMEOUT : usb_status = USBD_FAIL; 800e3fa: 2302 movs r3, #2 800e3fc: 73fb strb r3, [r7, #15] break; 800e3fe: e002 b.n 800e406 default : usb_status = USBD_FAIL; 800e400: 2302 movs r3, #2 800e402: 73fb strb r3, [r7, #15] break; 800e404: bf00 nop } return usb_status; 800e406: 7bfb ldrb r3, [r7, #15] } 800e408: 4618 mov r0, r3 800e40a: 3714 adds r7, #20 800e40c: 46bd mov sp, r7 800e40e: bc80 pop {r7} 800e410: 4770 bx lr 800e412: bf00 nop 0800e414 : 800e414: b40e push {r1, r2, r3} 800e416: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000 800e41a: b510 push {r4, lr} 800e41c: 2400 movs r4, #0 800e41e: b09d sub sp, #116 @ 0x74 800e420: ab1f add r3, sp, #124 @ 0x7c 800e422: 9002 str r0, [sp, #8] 800e424: 9006 str r0, [sp, #24] 800e426: 9107 str r1, [sp, #28] 800e428: 9104 str r1, [sp, #16] 800e42a: 4809 ldr r0, [pc, #36] @ (800e450 ) 800e42c: 4909 ldr r1, [pc, #36] @ (800e454 ) 800e42e: f853 2b04 ldr.w r2, [r3], #4 800e432: 9105 str r1, [sp, #20] 800e434: 6800 ldr r0, [r0, #0] 800e436: a902 add r1, sp, #8 800e438: 9301 str r3, [sp, #4] 800e43a: 941b str r4, [sp, #108] @ 0x6c 800e43c: f000 f992 bl 800e764 <_svfiprintf_r> 800e440: 9b02 ldr r3, [sp, #8] 800e442: 701c strb r4, [r3, #0] 800e444: b01d add sp, #116 @ 0x74 800e446: e8bd 4010 ldmia.w sp!, {r4, lr} 800e44a: b003 add sp, #12 800e44c: 4770 bx lr 800e44e: bf00 nop 800e450: 2000018c .word 0x2000018c 800e454: ffff0208 .word 0xffff0208 0800e458 : 800e458: 4603 mov r3, r0 800e45a: 4402 add r2, r0 800e45c: 4293 cmp r3, r2 800e45e: d100 bne.n 800e462 800e460: 4770 bx lr 800e462: f803 1b01 strb.w r1, [r3], #1 800e466: e7f9 b.n 800e45c 0800e468 <__errno>: 800e468: 4b01 ldr r3, [pc, #4] @ (800e470 <__errno+0x8>) 800e46a: 6818 ldr r0, [r3, #0] 800e46c: 4770 bx lr 800e46e: bf00 nop 800e470: 2000018c .word 0x2000018c 0800e474 <__libc_init_array>: 800e474: b570 push {r4, r5, r6, lr} 800e476: 2600 movs r6, #0 800e478: 4d0c ldr r5, [pc, #48] @ (800e4ac <__libc_init_array+0x38>) 800e47a: 4c0d ldr r4, [pc, #52] @ (800e4b0 <__libc_init_array+0x3c>) 800e47c: 1b64 subs r4, r4, r5 800e47e: 10a4 asrs r4, r4, #2 800e480: 42a6 cmp r6, r4 800e482: d109 bne.n 800e498 <__libc_init_array+0x24> 800e484: f000 fc76 bl 800ed74 <_init> 800e488: 2600 movs r6, #0 800e48a: 4d0a ldr r5, [pc, #40] @ (800e4b4 <__libc_init_array+0x40>) 800e48c: 4c0a ldr r4, [pc, #40] @ (800e4b8 <__libc_init_array+0x44>) 800e48e: 1b64 subs r4, r4, r5 800e490: 10a4 asrs r4, r4, #2 800e492: 42a6 cmp r6, r4 800e494: d105 bne.n 800e4a2 <__libc_init_array+0x2e> 800e496: bd70 pop {r4, r5, r6, pc} 800e498: f855 3b04 ldr.w r3, [r5], #4 800e49c: 4798 blx r3 800e49e: 3601 adds r6, #1 800e4a0: e7ee b.n 800e480 <__libc_init_array+0xc> 800e4a2: f855 3b04 ldr.w r3, [r5], #4 800e4a6: 4798 blx r3 800e4a8: 3601 adds r6, #1 800e4aa: e7f2 b.n 800e492 <__libc_init_array+0x1e> 800e4ac: 0800f580 .word 0x0800f580 800e4b0: 0800f580 .word 0x0800f580 800e4b4: 0800f580 .word 0x0800f580 800e4b8: 0800f584 .word 0x0800f584 0800e4bc <__retarget_lock_acquire_recursive>: 800e4bc: 4770 bx lr 0800e4be <__retarget_lock_release_recursive>: 800e4be: 4770 bx lr 0800e4c0 <_free_r>: 800e4c0: b538 push {r3, r4, r5, lr} 800e4c2: 4605 mov r5, r0 800e4c4: 2900 cmp r1, #0 800e4c6: d040 beq.n 800e54a <_free_r+0x8a> 800e4c8: f851 3c04 ldr.w r3, [r1, #-4] 800e4cc: 1f0c subs r4, r1, #4 800e4ce: 2b00 cmp r3, #0 800e4d0: bfb8 it lt 800e4d2: 18e4 addlt r4, r4, r3 800e4d4: f000 f8de bl 800e694 <__malloc_lock> 800e4d8: 4a1c ldr r2, [pc, #112] @ (800e54c <_free_r+0x8c>) 800e4da: 6813 ldr r3, [r2, #0] 800e4dc: b933 cbnz r3, 800e4ec <_free_r+0x2c> 800e4de: 6063 str r3, [r4, #4] 800e4e0: 6014 str r4, [r2, #0] 800e4e2: 4628 mov r0, r5 800e4e4: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800e4e8: f000 b8da b.w 800e6a0 <__malloc_unlock> 800e4ec: 42a3 cmp r3, r4 800e4ee: d908 bls.n 800e502 <_free_r+0x42> 800e4f0: 6820 ldr r0, [r4, #0] 800e4f2: 1821 adds r1, r4, r0 800e4f4: 428b cmp r3, r1 800e4f6: bf01 itttt eq 800e4f8: 6819 ldreq r1, [r3, #0] 800e4fa: 685b ldreq r3, [r3, #4] 800e4fc: 1809 addeq r1, r1, r0 800e4fe: 6021 streq r1, [r4, #0] 800e500: e7ed b.n 800e4de <_free_r+0x1e> 800e502: 461a mov r2, r3 800e504: 685b ldr r3, [r3, #4] 800e506: b10b cbz r3, 800e50c <_free_r+0x4c> 800e508: 42a3 cmp r3, r4 800e50a: d9fa bls.n 800e502 <_free_r+0x42> 800e50c: 6811 ldr r1, [r2, #0] 800e50e: 1850 adds r0, r2, r1 800e510: 42a0 cmp r0, r4 800e512: d10b bne.n 800e52c <_free_r+0x6c> 800e514: 6820 ldr r0, [r4, #0] 800e516: 4401 add r1, r0 800e518: 1850 adds r0, r2, r1 800e51a: 4283 cmp r3, r0 800e51c: 6011 str r1, [r2, #0] 800e51e: d1e0 bne.n 800e4e2 <_free_r+0x22> 800e520: 6818 ldr r0, [r3, #0] 800e522: 685b ldr r3, [r3, #4] 800e524: 4408 add r0, r1 800e526: 6010 str r0, [r2, #0] 800e528: 6053 str r3, [r2, #4] 800e52a: e7da b.n 800e4e2 <_free_r+0x22> 800e52c: d902 bls.n 800e534 <_free_r+0x74> 800e52e: 230c movs r3, #12 800e530: 602b str r3, [r5, #0] 800e532: e7d6 b.n 800e4e2 <_free_r+0x22> 800e534: 6820 ldr r0, [r4, #0] 800e536: 1821 adds r1, r4, r0 800e538: 428b cmp r3, r1 800e53a: bf01 itttt eq 800e53c: 6819 ldreq r1, [r3, #0] 800e53e: 685b ldreq r3, [r3, #4] 800e540: 1809 addeq r1, r1, r0 800e542: 6021 streq r1, [r4, #0] 800e544: 6063 str r3, [r4, #4] 800e546: 6054 str r4, [r2, #4] 800e548: e7cb b.n 800e4e2 <_free_r+0x22> 800e54a: bd38 pop {r3, r4, r5, pc} 800e54c: 200018a0 .word 0x200018a0 0800e550 : 800e550: b570 push {r4, r5, r6, lr} 800e552: 4e0f ldr r6, [pc, #60] @ (800e590 ) 800e554: 460c mov r4, r1 800e556: 6831 ldr r1, [r6, #0] 800e558: 4605 mov r5, r0 800e55a: b911 cbnz r1, 800e562 800e55c: f000 fba8 bl 800ecb0 <_sbrk_r> 800e560: 6030 str r0, [r6, #0] 800e562: 4621 mov r1, r4 800e564: 4628 mov r0, r5 800e566: f000 fba3 bl 800ecb0 <_sbrk_r> 800e56a: 1c43 adds r3, r0, #1 800e56c: d103 bne.n 800e576 800e56e: f04f 34ff mov.w r4, #4294967295 800e572: 4620 mov r0, r4 800e574: bd70 pop {r4, r5, r6, pc} 800e576: 1cc4 adds r4, r0, #3 800e578: f024 0403 bic.w r4, r4, #3 800e57c: 42a0 cmp r0, r4 800e57e: d0f8 beq.n 800e572 800e580: 1a21 subs r1, r4, r0 800e582: 4628 mov r0, r5 800e584: f000 fb94 bl 800ecb0 <_sbrk_r> 800e588: 3001 adds r0, #1 800e58a: d1f2 bne.n 800e572 800e58c: e7ef b.n 800e56e 800e58e: bf00 nop 800e590: 2000189c .word 0x2000189c 0800e594 <_malloc_r>: 800e594: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800e598: 1ccd adds r5, r1, #3 800e59a: f025 0503 bic.w r5, r5, #3 800e59e: 3508 adds r5, #8 800e5a0: 2d0c cmp r5, #12 800e5a2: bf38 it cc 800e5a4: 250c movcc r5, #12 800e5a6: 2d00 cmp r5, #0 800e5a8: 4606 mov r6, r0 800e5aa: db01 blt.n 800e5b0 <_malloc_r+0x1c> 800e5ac: 42a9 cmp r1, r5 800e5ae: d904 bls.n 800e5ba <_malloc_r+0x26> 800e5b0: 230c movs r3, #12 800e5b2: 6033 str r3, [r6, #0] 800e5b4: 2000 movs r0, #0 800e5b6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800e5ba: f8df 80d4 ldr.w r8, [pc, #212] @ 800e690 <_malloc_r+0xfc> 800e5be: f000 f869 bl 800e694 <__malloc_lock> 800e5c2: f8d8 3000 ldr.w r3, [r8] 800e5c6: 461c mov r4, r3 800e5c8: bb44 cbnz r4, 800e61c <_malloc_r+0x88> 800e5ca: 4629 mov r1, r5 800e5cc: 4630 mov r0, r6 800e5ce: f7ff ffbf bl 800e550 800e5d2: 1c43 adds r3, r0, #1 800e5d4: 4604 mov r4, r0 800e5d6: d158 bne.n 800e68a <_malloc_r+0xf6> 800e5d8: f8d8 4000 ldr.w r4, [r8] 800e5dc: 4627 mov r7, r4 800e5de: 2f00 cmp r7, #0 800e5e0: d143 bne.n 800e66a <_malloc_r+0xd6> 800e5e2: 2c00 cmp r4, #0 800e5e4: d04b beq.n 800e67e <_malloc_r+0xea> 800e5e6: 6823 ldr r3, [r4, #0] 800e5e8: 4639 mov r1, r7 800e5ea: 4630 mov r0, r6 800e5ec: eb04 0903 add.w r9, r4, r3 800e5f0: f000 fb5e bl 800ecb0 <_sbrk_r> 800e5f4: 4581 cmp r9, r0 800e5f6: d142 bne.n 800e67e <_malloc_r+0xea> 800e5f8: 6821 ldr r1, [r4, #0] 800e5fa: 4630 mov r0, r6 800e5fc: 1a6d subs r5, r5, r1 800e5fe: 4629 mov r1, r5 800e600: f7ff ffa6 bl 800e550 800e604: 3001 adds r0, #1 800e606: d03a beq.n 800e67e <_malloc_r+0xea> 800e608: 6823 ldr r3, [r4, #0] 800e60a: 442b add r3, r5 800e60c: 6023 str r3, [r4, #0] 800e60e: f8d8 3000 ldr.w r3, [r8] 800e612: 685a ldr r2, [r3, #4] 800e614: bb62 cbnz r2, 800e670 <_malloc_r+0xdc> 800e616: f8c8 7000 str.w r7, [r8] 800e61a: e00f b.n 800e63c <_malloc_r+0xa8> 800e61c: 6822 ldr r2, [r4, #0] 800e61e: 1b52 subs r2, r2, r5 800e620: d420 bmi.n 800e664 <_malloc_r+0xd0> 800e622: 2a0b cmp r2, #11 800e624: d917 bls.n 800e656 <_malloc_r+0xc2> 800e626: 1961 adds r1, r4, r5 800e628: 42a3 cmp r3, r4 800e62a: 6025 str r5, [r4, #0] 800e62c: bf18 it ne 800e62e: 6059 strne r1, [r3, #4] 800e630: 6863 ldr r3, [r4, #4] 800e632: bf08 it eq 800e634: f8c8 1000 streq.w r1, [r8] 800e638: 5162 str r2, [r4, r5] 800e63a: 604b str r3, [r1, #4] 800e63c: 4630 mov r0, r6 800e63e: f000 f82f bl 800e6a0 <__malloc_unlock> 800e642: f104 000b add.w r0, r4, #11 800e646: 1d23 adds r3, r4, #4 800e648: f020 0007 bic.w r0, r0, #7 800e64c: 1ac2 subs r2, r0, r3 800e64e: bf1c itt ne 800e650: 1a1b subne r3, r3, r0 800e652: 50a3 strne r3, [r4, r2] 800e654: e7af b.n 800e5b6 <_malloc_r+0x22> 800e656: 6862 ldr r2, [r4, #4] 800e658: 42a3 cmp r3, r4 800e65a: bf0c ite eq 800e65c: f8c8 2000 streq.w r2, [r8] 800e660: 605a strne r2, [r3, #4] 800e662: e7eb b.n 800e63c <_malloc_r+0xa8> 800e664: 4623 mov r3, r4 800e666: 6864 ldr r4, [r4, #4] 800e668: e7ae b.n 800e5c8 <_malloc_r+0x34> 800e66a: 463c mov r4, r7 800e66c: 687f ldr r7, [r7, #4] 800e66e: e7b6 b.n 800e5de <_malloc_r+0x4a> 800e670: 461a mov r2, r3 800e672: 685b ldr r3, [r3, #4] 800e674: 42a3 cmp r3, r4 800e676: d1fb bne.n 800e670 <_malloc_r+0xdc> 800e678: 2300 movs r3, #0 800e67a: 6053 str r3, [r2, #4] 800e67c: e7de b.n 800e63c <_malloc_r+0xa8> 800e67e: 230c movs r3, #12 800e680: 4630 mov r0, r6 800e682: 6033 str r3, [r6, #0] 800e684: f000 f80c bl 800e6a0 <__malloc_unlock> 800e688: e794 b.n 800e5b4 <_malloc_r+0x20> 800e68a: 6005 str r5, [r0, #0] 800e68c: e7d6 b.n 800e63c <_malloc_r+0xa8> 800e68e: bf00 nop 800e690: 200018a0 .word 0x200018a0 0800e694 <__malloc_lock>: 800e694: 4801 ldr r0, [pc, #4] @ (800e69c <__malloc_lock+0x8>) 800e696: f7ff bf11 b.w 800e4bc <__retarget_lock_acquire_recursive> 800e69a: bf00 nop 800e69c: 20001898 .word 0x20001898 0800e6a0 <__malloc_unlock>: 800e6a0: 4801 ldr r0, [pc, #4] @ (800e6a8 <__malloc_unlock+0x8>) 800e6a2: f7ff bf0c b.w 800e4be <__retarget_lock_release_recursive> 800e6a6: bf00 nop 800e6a8: 20001898 .word 0x20001898 0800e6ac <__ssputs_r>: 800e6ac: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800e6b0: 461f mov r7, r3 800e6b2: 688e ldr r6, [r1, #8] 800e6b4: 4682 mov sl, r0 800e6b6: 42be cmp r6, r7 800e6b8: 460c mov r4, r1 800e6ba: 4690 mov r8, r2 800e6bc: 680b ldr r3, [r1, #0] 800e6be: d82d bhi.n 800e71c <__ssputs_r+0x70> 800e6c0: f9b1 200c ldrsh.w r2, [r1, #12] 800e6c4: f412 6f90 tst.w r2, #1152 @ 0x480 800e6c8: d026 beq.n 800e718 <__ssputs_r+0x6c> 800e6ca: 6965 ldr r5, [r4, #20] 800e6cc: 6909 ldr r1, [r1, #16] 800e6ce: eb05 0545 add.w r5, r5, r5, lsl #1 800e6d2: eba3 0901 sub.w r9, r3, r1 800e6d6: eb05 75d5 add.w r5, r5, r5, lsr #31 800e6da: 1c7b adds r3, r7, #1 800e6dc: 444b add r3, r9 800e6de: 106d asrs r5, r5, #1 800e6e0: 429d cmp r5, r3 800e6e2: bf38 it cc 800e6e4: 461d movcc r5, r3 800e6e6: 0553 lsls r3, r2, #21 800e6e8: d527 bpl.n 800e73a <__ssputs_r+0x8e> 800e6ea: 4629 mov r1, r5 800e6ec: f7ff ff52 bl 800e594 <_malloc_r> 800e6f0: 4606 mov r6, r0 800e6f2: b360 cbz r0, 800e74e <__ssputs_r+0xa2> 800e6f4: 464a mov r2, r9 800e6f6: 6921 ldr r1, [r4, #16] 800e6f8: f000 faf8 bl 800ecec 800e6fc: 89a3 ldrh r3, [r4, #12] 800e6fe: f423 6390 bic.w r3, r3, #1152 @ 0x480 800e702: f043 0380 orr.w r3, r3, #128 @ 0x80 800e706: 81a3 strh r3, [r4, #12] 800e708: 6126 str r6, [r4, #16] 800e70a: 444e add r6, r9 800e70c: 6026 str r6, [r4, #0] 800e70e: 463e mov r6, r7 800e710: 6165 str r5, [r4, #20] 800e712: eba5 0509 sub.w r5, r5, r9 800e716: 60a5 str r5, [r4, #8] 800e718: 42be cmp r6, r7 800e71a: d900 bls.n 800e71e <__ssputs_r+0x72> 800e71c: 463e mov r6, r7 800e71e: 4632 mov r2, r6 800e720: 4641 mov r1, r8 800e722: 6820 ldr r0, [r4, #0] 800e724: f000 faaa bl 800ec7c 800e728: 2000 movs r0, #0 800e72a: 68a3 ldr r3, [r4, #8] 800e72c: 1b9b subs r3, r3, r6 800e72e: 60a3 str r3, [r4, #8] 800e730: 6823 ldr r3, [r4, #0] 800e732: 4433 add r3, r6 800e734: 6023 str r3, [r4, #0] 800e736: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800e73a: 462a mov r2, r5 800e73c: f000 fae4 bl 800ed08 <_realloc_r> 800e740: 4606 mov r6, r0 800e742: 2800 cmp r0, #0 800e744: d1e0 bne.n 800e708 <__ssputs_r+0x5c> 800e746: 4650 mov r0, sl 800e748: 6921 ldr r1, [r4, #16] 800e74a: f7ff feb9 bl 800e4c0 <_free_r> 800e74e: 230c movs r3, #12 800e750: f8ca 3000 str.w r3, [sl] 800e754: 89a3 ldrh r3, [r4, #12] 800e756: f04f 30ff mov.w r0, #4294967295 800e75a: f043 0340 orr.w r3, r3, #64 @ 0x40 800e75e: 81a3 strh r3, [r4, #12] 800e760: e7e9 b.n 800e736 <__ssputs_r+0x8a> ... 0800e764 <_svfiprintf_r>: 800e764: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800e768: 4698 mov r8, r3 800e76a: 898b ldrh r3, [r1, #12] 800e76c: 4607 mov r7, r0 800e76e: 061b lsls r3, r3, #24 800e770: 460d mov r5, r1 800e772: 4614 mov r4, r2 800e774: b09d sub sp, #116 @ 0x74 800e776: d510 bpl.n 800e79a <_svfiprintf_r+0x36> 800e778: 690b ldr r3, [r1, #16] 800e77a: b973 cbnz r3, 800e79a <_svfiprintf_r+0x36> 800e77c: 2140 movs r1, #64 @ 0x40 800e77e: f7ff ff09 bl 800e594 <_malloc_r> 800e782: 6028 str r0, [r5, #0] 800e784: 6128 str r0, [r5, #16] 800e786: b930 cbnz r0, 800e796 <_svfiprintf_r+0x32> 800e788: 230c movs r3, #12 800e78a: 603b str r3, [r7, #0] 800e78c: f04f 30ff mov.w r0, #4294967295 800e790: b01d add sp, #116 @ 0x74 800e792: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800e796: 2340 movs r3, #64 @ 0x40 800e798: 616b str r3, [r5, #20] 800e79a: 2300 movs r3, #0 800e79c: 9309 str r3, [sp, #36] @ 0x24 800e79e: 2320 movs r3, #32 800e7a0: f88d 3029 strb.w r3, [sp, #41] @ 0x29 800e7a4: 2330 movs r3, #48 @ 0x30 800e7a6: f04f 0901 mov.w r9, #1 800e7aa: f8cd 800c str.w r8, [sp, #12] 800e7ae: f8df 8198 ldr.w r8, [pc, #408] @ 800e948 <_svfiprintf_r+0x1e4> 800e7b2: f88d 302a strb.w r3, [sp, #42] @ 0x2a 800e7b6: 4623 mov r3, r4 800e7b8: 469a mov sl, r3 800e7ba: f813 2b01 ldrb.w r2, [r3], #1 800e7be: b10a cbz r2, 800e7c4 <_svfiprintf_r+0x60> 800e7c0: 2a25 cmp r2, #37 @ 0x25 800e7c2: d1f9 bne.n 800e7b8 <_svfiprintf_r+0x54> 800e7c4: ebba 0b04 subs.w fp, sl, r4 800e7c8: d00b beq.n 800e7e2 <_svfiprintf_r+0x7e> 800e7ca: 465b mov r3, fp 800e7cc: 4622 mov r2, r4 800e7ce: 4629 mov r1, r5 800e7d0: 4638 mov r0, r7 800e7d2: f7ff ff6b bl 800e6ac <__ssputs_r> 800e7d6: 3001 adds r0, #1 800e7d8: f000 80a7 beq.w 800e92a <_svfiprintf_r+0x1c6> 800e7dc: 9a09 ldr r2, [sp, #36] @ 0x24 800e7de: 445a add r2, fp 800e7e0: 9209 str r2, [sp, #36] @ 0x24 800e7e2: f89a 3000 ldrb.w r3, [sl] 800e7e6: 2b00 cmp r3, #0 800e7e8: f000 809f beq.w 800e92a <_svfiprintf_r+0x1c6> 800e7ec: 2300 movs r3, #0 800e7ee: f04f 32ff mov.w r2, #4294967295 800e7f2: e9cd 2305 strd r2, r3, [sp, #20] 800e7f6: f10a 0a01 add.w sl, sl, #1 800e7fa: 9304 str r3, [sp, #16] 800e7fc: 9307 str r3, [sp, #28] 800e7fe: f88d 3053 strb.w r3, [sp, #83] @ 0x53 800e802: 931a str r3, [sp, #104] @ 0x68 800e804: 4654 mov r4, sl 800e806: 2205 movs r2, #5 800e808: f814 1b01 ldrb.w r1, [r4], #1 800e80c: 484e ldr r0, [pc, #312] @ (800e948 <_svfiprintf_r+0x1e4>) 800e80e: f000 fa5f bl 800ecd0 800e812: 9a04 ldr r2, [sp, #16] 800e814: b9d8 cbnz r0, 800e84e <_svfiprintf_r+0xea> 800e816: 06d0 lsls r0, r2, #27 800e818: bf44 itt mi 800e81a: 2320 movmi r3, #32 800e81c: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800e820: 0711 lsls r1, r2, #28 800e822: bf44 itt mi 800e824: 232b movmi r3, #43 @ 0x2b 800e826: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800e82a: f89a 3000 ldrb.w r3, [sl] 800e82e: 2b2a cmp r3, #42 @ 0x2a 800e830: d015 beq.n 800e85e <_svfiprintf_r+0xfa> 800e832: 4654 mov r4, sl 800e834: 2000 movs r0, #0 800e836: f04f 0c0a mov.w ip, #10 800e83a: 9a07 ldr r2, [sp, #28] 800e83c: 4621 mov r1, r4 800e83e: f811 3b01 ldrb.w r3, [r1], #1 800e842: 3b30 subs r3, #48 @ 0x30 800e844: 2b09 cmp r3, #9 800e846: d94b bls.n 800e8e0 <_svfiprintf_r+0x17c> 800e848: b1b0 cbz r0, 800e878 <_svfiprintf_r+0x114> 800e84a: 9207 str r2, [sp, #28] 800e84c: e014 b.n 800e878 <_svfiprintf_r+0x114> 800e84e: eba0 0308 sub.w r3, r0, r8 800e852: fa09 f303 lsl.w r3, r9, r3 800e856: 4313 orrs r3, r2 800e858: 46a2 mov sl, r4 800e85a: 9304 str r3, [sp, #16] 800e85c: e7d2 b.n 800e804 <_svfiprintf_r+0xa0> 800e85e: 9b03 ldr r3, [sp, #12] 800e860: 1d19 adds r1, r3, #4 800e862: 681b ldr r3, [r3, #0] 800e864: 9103 str r1, [sp, #12] 800e866: 2b00 cmp r3, #0 800e868: bfbb ittet lt 800e86a: 425b neglt r3, r3 800e86c: f042 0202 orrlt.w r2, r2, #2 800e870: 9307 strge r3, [sp, #28] 800e872: 9307 strlt r3, [sp, #28] 800e874: bfb8 it lt 800e876: 9204 strlt r2, [sp, #16] 800e878: 7823 ldrb r3, [r4, #0] 800e87a: 2b2e cmp r3, #46 @ 0x2e 800e87c: d10a bne.n 800e894 <_svfiprintf_r+0x130> 800e87e: 7863 ldrb r3, [r4, #1] 800e880: 2b2a cmp r3, #42 @ 0x2a 800e882: d132 bne.n 800e8ea <_svfiprintf_r+0x186> 800e884: 9b03 ldr r3, [sp, #12] 800e886: 3402 adds r4, #2 800e888: 1d1a adds r2, r3, #4 800e88a: 681b ldr r3, [r3, #0] 800e88c: 9203 str r2, [sp, #12] 800e88e: ea43 73e3 orr.w r3, r3, r3, asr #31 800e892: 9305 str r3, [sp, #20] 800e894: f8df a0b4 ldr.w sl, [pc, #180] @ 800e94c <_svfiprintf_r+0x1e8> 800e898: 2203 movs r2, #3 800e89a: 4650 mov r0, sl 800e89c: 7821 ldrb r1, [r4, #0] 800e89e: f000 fa17 bl 800ecd0 800e8a2: b138 cbz r0, 800e8b4 <_svfiprintf_r+0x150> 800e8a4: 2240 movs r2, #64 @ 0x40 800e8a6: 9b04 ldr r3, [sp, #16] 800e8a8: eba0 000a sub.w r0, r0, sl 800e8ac: 4082 lsls r2, r0 800e8ae: 4313 orrs r3, r2 800e8b0: 3401 adds r4, #1 800e8b2: 9304 str r3, [sp, #16] 800e8b4: f814 1b01 ldrb.w r1, [r4], #1 800e8b8: 2206 movs r2, #6 800e8ba: 4825 ldr r0, [pc, #148] @ (800e950 <_svfiprintf_r+0x1ec>) 800e8bc: f88d 1028 strb.w r1, [sp, #40] @ 0x28 800e8c0: f000 fa06 bl 800ecd0 800e8c4: 2800 cmp r0, #0 800e8c6: d036 beq.n 800e936 <_svfiprintf_r+0x1d2> 800e8c8: 4b22 ldr r3, [pc, #136] @ (800e954 <_svfiprintf_r+0x1f0>) 800e8ca: bb1b cbnz r3, 800e914 <_svfiprintf_r+0x1b0> 800e8cc: 9b03 ldr r3, [sp, #12] 800e8ce: 3307 adds r3, #7 800e8d0: f023 0307 bic.w r3, r3, #7 800e8d4: 3308 adds r3, #8 800e8d6: 9303 str r3, [sp, #12] 800e8d8: 9b09 ldr r3, [sp, #36] @ 0x24 800e8da: 4433 add r3, r6 800e8dc: 9309 str r3, [sp, #36] @ 0x24 800e8de: e76a b.n 800e7b6 <_svfiprintf_r+0x52> 800e8e0: 460c mov r4, r1 800e8e2: 2001 movs r0, #1 800e8e4: fb0c 3202 mla r2, ip, r2, r3 800e8e8: e7a8 b.n 800e83c <_svfiprintf_r+0xd8> 800e8ea: 2300 movs r3, #0 800e8ec: f04f 0c0a mov.w ip, #10 800e8f0: 4619 mov r1, r3 800e8f2: 3401 adds r4, #1 800e8f4: 9305 str r3, [sp, #20] 800e8f6: 4620 mov r0, r4 800e8f8: f810 2b01 ldrb.w r2, [r0], #1 800e8fc: 3a30 subs r2, #48 @ 0x30 800e8fe: 2a09 cmp r2, #9 800e900: d903 bls.n 800e90a <_svfiprintf_r+0x1a6> 800e902: 2b00 cmp r3, #0 800e904: d0c6 beq.n 800e894 <_svfiprintf_r+0x130> 800e906: 9105 str r1, [sp, #20] 800e908: e7c4 b.n 800e894 <_svfiprintf_r+0x130> 800e90a: 4604 mov r4, r0 800e90c: 2301 movs r3, #1 800e90e: fb0c 2101 mla r1, ip, r1, r2 800e912: e7f0 b.n 800e8f6 <_svfiprintf_r+0x192> 800e914: ab03 add r3, sp, #12 800e916: 9300 str r3, [sp, #0] 800e918: 462a mov r2, r5 800e91a: 4638 mov r0, r7 800e91c: 4b0e ldr r3, [pc, #56] @ (800e958 <_svfiprintf_r+0x1f4>) 800e91e: a904 add r1, sp, #16 800e920: f3af 8000 nop.w 800e924: 1c42 adds r2, r0, #1 800e926: 4606 mov r6, r0 800e928: d1d6 bne.n 800e8d8 <_svfiprintf_r+0x174> 800e92a: 89ab ldrh r3, [r5, #12] 800e92c: 065b lsls r3, r3, #25 800e92e: f53f af2d bmi.w 800e78c <_svfiprintf_r+0x28> 800e932: 9809 ldr r0, [sp, #36] @ 0x24 800e934: e72c b.n 800e790 <_svfiprintf_r+0x2c> 800e936: ab03 add r3, sp, #12 800e938: 9300 str r3, [sp, #0] 800e93a: 462a mov r2, r5 800e93c: 4638 mov r0, r7 800e93e: 4b06 ldr r3, [pc, #24] @ (800e958 <_svfiprintf_r+0x1f4>) 800e940: a904 add r1, sp, #16 800e942: f000 f87d bl 800ea40 <_printf_i> 800e946: e7ed b.n 800e924 <_svfiprintf_r+0x1c0> 800e948: 0800f542 .word 0x0800f542 800e94c: 0800f548 .word 0x0800f548 800e950: 0800f54c .word 0x0800f54c 800e954: 00000000 .word 0x00000000 800e958: 0800e6ad .word 0x0800e6ad 0800e95c <_printf_common>: 800e95c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800e960: 4616 mov r6, r2 800e962: 4698 mov r8, r3 800e964: 688a ldr r2, [r1, #8] 800e966: 690b ldr r3, [r1, #16] 800e968: 4607 mov r7, r0 800e96a: 4293 cmp r3, r2 800e96c: bfb8 it lt 800e96e: 4613 movlt r3, r2 800e970: 6033 str r3, [r6, #0] 800e972: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 800e976: 460c mov r4, r1 800e978: f8dd 9020 ldr.w r9, [sp, #32] 800e97c: b10a cbz r2, 800e982 <_printf_common+0x26> 800e97e: 3301 adds r3, #1 800e980: 6033 str r3, [r6, #0] 800e982: 6823 ldr r3, [r4, #0] 800e984: 0699 lsls r1, r3, #26 800e986: bf42 ittt mi 800e988: 6833 ldrmi r3, [r6, #0] 800e98a: 3302 addmi r3, #2 800e98c: 6033 strmi r3, [r6, #0] 800e98e: 6825 ldr r5, [r4, #0] 800e990: f015 0506 ands.w r5, r5, #6 800e994: d106 bne.n 800e9a4 <_printf_common+0x48> 800e996: f104 0a19 add.w sl, r4, #25 800e99a: 68e3 ldr r3, [r4, #12] 800e99c: 6832 ldr r2, [r6, #0] 800e99e: 1a9b subs r3, r3, r2 800e9a0: 42ab cmp r3, r5 800e9a2: dc2b bgt.n 800e9fc <_printf_common+0xa0> 800e9a4: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 800e9a8: 6822 ldr r2, [r4, #0] 800e9aa: 3b00 subs r3, #0 800e9ac: bf18 it ne 800e9ae: 2301 movne r3, #1 800e9b0: 0692 lsls r2, r2, #26 800e9b2: d430 bmi.n 800ea16 <_printf_common+0xba> 800e9b4: 4641 mov r1, r8 800e9b6: 4638 mov r0, r7 800e9b8: f104 0243 add.w r2, r4, #67 @ 0x43 800e9bc: 47c8 blx r9 800e9be: 3001 adds r0, #1 800e9c0: d023 beq.n 800ea0a <_printf_common+0xae> 800e9c2: 6823 ldr r3, [r4, #0] 800e9c4: 6922 ldr r2, [r4, #16] 800e9c6: f003 0306 and.w r3, r3, #6 800e9ca: 2b04 cmp r3, #4 800e9cc: bf14 ite ne 800e9ce: 2500 movne r5, #0 800e9d0: 6833 ldreq r3, [r6, #0] 800e9d2: f04f 0600 mov.w r6, #0 800e9d6: bf08 it eq 800e9d8: 68e5 ldreq r5, [r4, #12] 800e9da: f104 041a add.w r4, r4, #26 800e9de: bf08 it eq 800e9e0: 1aed subeq r5, r5, r3 800e9e2: f854 3c12 ldr.w r3, [r4, #-18] 800e9e6: bf08 it eq 800e9e8: ea25 75e5 biceq.w r5, r5, r5, asr #31 800e9ec: 4293 cmp r3, r2 800e9ee: bfc4 itt gt 800e9f0: 1a9b subgt r3, r3, r2 800e9f2: 18ed addgt r5, r5, r3 800e9f4: 42b5 cmp r5, r6 800e9f6: d11a bne.n 800ea2e <_printf_common+0xd2> 800e9f8: 2000 movs r0, #0 800e9fa: e008 b.n 800ea0e <_printf_common+0xb2> 800e9fc: 2301 movs r3, #1 800e9fe: 4652 mov r2, sl 800ea00: 4641 mov r1, r8 800ea02: 4638 mov r0, r7 800ea04: 47c8 blx r9 800ea06: 3001 adds r0, #1 800ea08: d103 bne.n 800ea12 <_printf_common+0xb6> 800ea0a: f04f 30ff mov.w r0, #4294967295 800ea0e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800ea12: 3501 adds r5, #1 800ea14: e7c1 b.n 800e99a <_printf_common+0x3e> 800ea16: 2030 movs r0, #48 @ 0x30 800ea18: 18e1 adds r1, r4, r3 800ea1a: f881 0043 strb.w r0, [r1, #67] @ 0x43 800ea1e: 1c5a adds r2, r3, #1 800ea20: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 800ea24: 4422 add r2, r4 800ea26: 3302 adds r3, #2 800ea28: f882 1043 strb.w r1, [r2, #67] @ 0x43 800ea2c: e7c2 b.n 800e9b4 <_printf_common+0x58> 800ea2e: 2301 movs r3, #1 800ea30: 4622 mov r2, r4 800ea32: 4641 mov r1, r8 800ea34: 4638 mov r0, r7 800ea36: 47c8 blx r9 800ea38: 3001 adds r0, #1 800ea3a: d0e6 beq.n 800ea0a <_printf_common+0xae> 800ea3c: 3601 adds r6, #1 800ea3e: e7d9 b.n 800e9f4 <_printf_common+0x98> 0800ea40 <_printf_i>: 800ea40: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 800ea44: 7e0f ldrb r7, [r1, #24] 800ea46: 4691 mov r9, r2 800ea48: 2f78 cmp r7, #120 @ 0x78 800ea4a: 4680 mov r8, r0 800ea4c: 460c mov r4, r1 800ea4e: 469a mov sl, r3 800ea50: 9e0c ldr r6, [sp, #48] @ 0x30 800ea52: f101 0243 add.w r2, r1, #67 @ 0x43 800ea56: d807 bhi.n 800ea68 <_printf_i+0x28> 800ea58: 2f62 cmp r7, #98 @ 0x62 800ea5a: d80a bhi.n 800ea72 <_printf_i+0x32> 800ea5c: 2f00 cmp r7, #0 800ea5e: f000 80d1 beq.w 800ec04 <_printf_i+0x1c4> 800ea62: 2f58 cmp r7, #88 @ 0x58 800ea64: f000 80b8 beq.w 800ebd8 <_printf_i+0x198> 800ea68: f104 0642 add.w r6, r4, #66 @ 0x42 800ea6c: f884 7042 strb.w r7, [r4, #66] @ 0x42 800ea70: e03a b.n 800eae8 <_printf_i+0xa8> 800ea72: f1a7 0363 sub.w r3, r7, #99 @ 0x63 800ea76: 2b15 cmp r3, #21 800ea78: d8f6 bhi.n 800ea68 <_printf_i+0x28> 800ea7a: a101 add r1, pc, #4 @ (adr r1, 800ea80 <_printf_i+0x40>) 800ea7c: f851 f023 ldr.w pc, [r1, r3, lsl #2] 800ea80: 0800ead9 .word 0x0800ead9 800ea84: 0800eaed .word 0x0800eaed 800ea88: 0800ea69 .word 0x0800ea69 800ea8c: 0800ea69 .word 0x0800ea69 800ea90: 0800ea69 .word 0x0800ea69 800ea94: 0800ea69 .word 0x0800ea69 800ea98: 0800eaed .word 0x0800eaed 800ea9c: 0800ea69 .word 0x0800ea69 800eaa0: 0800ea69 .word 0x0800ea69 800eaa4: 0800ea69 .word 0x0800ea69 800eaa8: 0800ea69 .word 0x0800ea69 800eaac: 0800ebeb .word 0x0800ebeb 800eab0: 0800eb17 .word 0x0800eb17 800eab4: 0800eba5 .word 0x0800eba5 800eab8: 0800ea69 .word 0x0800ea69 800eabc: 0800ea69 .word 0x0800ea69 800eac0: 0800ec0d .word 0x0800ec0d 800eac4: 0800ea69 .word 0x0800ea69 800eac8: 0800eb17 .word 0x0800eb17 800eacc: 0800ea69 .word 0x0800ea69 800ead0: 0800ea69 .word 0x0800ea69 800ead4: 0800ebad .word 0x0800ebad 800ead8: 6833 ldr r3, [r6, #0] 800eada: 1d1a adds r2, r3, #4 800eadc: 681b ldr r3, [r3, #0] 800eade: 6032 str r2, [r6, #0] 800eae0: f104 0642 add.w r6, r4, #66 @ 0x42 800eae4: f884 3042 strb.w r3, [r4, #66] @ 0x42 800eae8: 2301 movs r3, #1 800eaea: e09c b.n 800ec26 <_printf_i+0x1e6> 800eaec: 6833 ldr r3, [r6, #0] 800eaee: 6820 ldr r0, [r4, #0] 800eaf0: 1d19 adds r1, r3, #4 800eaf2: 6031 str r1, [r6, #0] 800eaf4: 0606 lsls r6, r0, #24 800eaf6: d501 bpl.n 800eafc <_printf_i+0xbc> 800eaf8: 681d ldr r5, [r3, #0] 800eafa: e003 b.n 800eb04 <_printf_i+0xc4> 800eafc: 0645 lsls r5, r0, #25 800eafe: d5fb bpl.n 800eaf8 <_printf_i+0xb8> 800eb00: f9b3 5000 ldrsh.w r5, [r3] 800eb04: 2d00 cmp r5, #0 800eb06: da03 bge.n 800eb10 <_printf_i+0xd0> 800eb08: 232d movs r3, #45 @ 0x2d 800eb0a: 426d negs r5, r5 800eb0c: f884 3043 strb.w r3, [r4, #67] @ 0x43 800eb10: 230a movs r3, #10 800eb12: 4858 ldr r0, [pc, #352] @ (800ec74 <_printf_i+0x234>) 800eb14: e011 b.n 800eb3a <_printf_i+0xfa> 800eb16: 6821 ldr r1, [r4, #0] 800eb18: 6833 ldr r3, [r6, #0] 800eb1a: 0608 lsls r0, r1, #24 800eb1c: f853 5b04 ldr.w r5, [r3], #4 800eb20: d402 bmi.n 800eb28 <_printf_i+0xe8> 800eb22: 0649 lsls r1, r1, #25 800eb24: bf48 it mi 800eb26: b2ad uxthmi r5, r5 800eb28: 2f6f cmp r7, #111 @ 0x6f 800eb2a: 6033 str r3, [r6, #0] 800eb2c: bf14 ite ne 800eb2e: 230a movne r3, #10 800eb30: 2308 moveq r3, #8 800eb32: 4850 ldr r0, [pc, #320] @ (800ec74 <_printf_i+0x234>) 800eb34: 2100 movs r1, #0 800eb36: f884 1043 strb.w r1, [r4, #67] @ 0x43 800eb3a: 6866 ldr r6, [r4, #4] 800eb3c: 2e00 cmp r6, #0 800eb3e: 60a6 str r6, [r4, #8] 800eb40: db05 blt.n 800eb4e <_printf_i+0x10e> 800eb42: 6821 ldr r1, [r4, #0] 800eb44: 432e orrs r6, r5 800eb46: f021 0104 bic.w r1, r1, #4 800eb4a: 6021 str r1, [r4, #0] 800eb4c: d04b beq.n 800ebe6 <_printf_i+0x1a6> 800eb4e: 4616 mov r6, r2 800eb50: fbb5 f1f3 udiv r1, r5, r3 800eb54: fb03 5711 mls r7, r3, r1, r5 800eb58: 5dc7 ldrb r7, [r0, r7] 800eb5a: f806 7d01 strb.w r7, [r6, #-1]! 800eb5e: 462f mov r7, r5 800eb60: 42bb cmp r3, r7 800eb62: 460d mov r5, r1 800eb64: d9f4 bls.n 800eb50 <_printf_i+0x110> 800eb66: 2b08 cmp r3, #8 800eb68: d10b bne.n 800eb82 <_printf_i+0x142> 800eb6a: 6823 ldr r3, [r4, #0] 800eb6c: 07df lsls r7, r3, #31 800eb6e: d508 bpl.n 800eb82 <_printf_i+0x142> 800eb70: 6923 ldr r3, [r4, #16] 800eb72: 6861 ldr r1, [r4, #4] 800eb74: 4299 cmp r1, r3 800eb76: bfde ittt le 800eb78: 2330 movle r3, #48 @ 0x30 800eb7a: f806 3c01 strble.w r3, [r6, #-1] 800eb7e: f106 36ff addle.w r6, r6, #4294967295 800eb82: 1b92 subs r2, r2, r6 800eb84: 6122 str r2, [r4, #16] 800eb86: 464b mov r3, r9 800eb88: 4621 mov r1, r4 800eb8a: 4640 mov r0, r8 800eb8c: f8cd a000 str.w sl, [sp] 800eb90: aa03 add r2, sp, #12 800eb92: f7ff fee3 bl 800e95c <_printf_common> 800eb96: 3001 adds r0, #1 800eb98: d14a bne.n 800ec30 <_printf_i+0x1f0> 800eb9a: f04f 30ff mov.w r0, #4294967295 800eb9e: b004 add sp, #16 800eba0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800eba4: 6823 ldr r3, [r4, #0] 800eba6: f043 0320 orr.w r3, r3, #32 800ebaa: 6023 str r3, [r4, #0] 800ebac: 2778 movs r7, #120 @ 0x78 800ebae: 4832 ldr r0, [pc, #200] @ (800ec78 <_printf_i+0x238>) 800ebb0: f884 7045 strb.w r7, [r4, #69] @ 0x45 800ebb4: 6823 ldr r3, [r4, #0] 800ebb6: 6831 ldr r1, [r6, #0] 800ebb8: 061f lsls r7, r3, #24 800ebba: f851 5b04 ldr.w r5, [r1], #4 800ebbe: d402 bmi.n 800ebc6 <_printf_i+0x186> 800ebc0: 065f lsls r7, r3, #25 800ebc2: bf48 it mi 800ebc4: b2ad uxthmi r5, r5 800ebc6: 6031 str r1, [r6, #0] 800ebc8: 07d9 lsls r1, r3, #31 800ebca: bf44 itt mi 800ebcc: f043 0320 orrmi.w r3, r3, #32 800ebd0: 6023 strmi r3, [r4, #0] 800ebd2: b11d cbz r5, 800ebdc <_printf_i+0x19c> 800ebd4: 2310 movs r3, #16 800ebd6: e7ad b.n 800eb34 <_printf_i+0xf4> 800ebd8: 4826 ldr r0, [pc, #152] @ (800ec74 <_printf_i+0x234>) 800ebda: e7e9 b.n 800ebb0 <_printf_i+0x170> 800ebdc: 6823 ldr r3, [r4, #0] 800ebde: f023 0320 bic.w r3, r3, #32 800ebe2: 6023 str r3, [r4, #0] 800ebe4: e7f6 b.n 800ebd4 <_printf_i+0x194> 800ebe6: 4616 mov r6, r2 800ebe8: e7bd b.n 800eb66 <_printf_i+0x126> 800ebea: 6833 ldr r3, [r6, #0] 800ebec: 6825 ldr r5, [r4, #0] 800ebee: 1d18 adds r0, r3, #4 800ebf0: 6961 ldr r1, [r4, #20] 800ebf2: 6030 str r0, [r6, #0] 800ebf4: 062e lsls r6, r5, #24 800ebf6: 681b ldr r3, [r3, #0] 800ebf8: d501 bpl.n 800ebfe <_printf_i+0x1be> 800ebfa: 6019 str r1, [r3, #0] 800ebfc: e002 b.n 800ec04 <_printf_i+0x1c4> 800ebfe: 0668 lsls r0, r5, #25 800ec00: d5fb bpl.n 800ebfa <_printf_i+0x1ba> 800ec02: 8019 strh r1, [r3, #0] 800ec04: 2300 movs r3, #0 800ec06: 4616 mov r6, r2 800ec08: 6123 str r3, [r4, #16] 800ec0a: e7bc b.n 800eb86 <_printf_i+0x146> 800ec0c: 6833 ldr r3, [r6, #0] 800ec0e: 2100 movs r1, #0 800ec10: 1d1a adds r2, r3, #4 800ec12: 6032 str r2, [r6, #0] 800ec14: 681e ldr r6, [r3, #0] 800ec16: 6862 ldr r2, [r4, #4] 800ec18: 4630 mov r0, r6 800ec1a: f000 f859 bl 800ecd0 800ec1e: b108 cbz r0, 800ec24 <_printf_i+0x1e4> 800ec20: 1b80 subs r0, r0, r6 800ec22: 6060 str r0, [r4, #4] 800ec24: 6863 ldr r3, [r4, #4] 800ec26: 6123 str r3, [r4, #16] 800ec28: 2300 movs r3, #0 800ec2a: f884 3043 strb.w r3, [r4, #67] @ 0x43 800ec2e: e7aa b.n 800eb86 <_printf_i+0x146> 800ec30: 4632 mov r2, r6 800ec32: 4649 mov r1, r9 800ec34: 4640 mov r0, r8 800ec36: 6923 ldr r3, [r4, #16] 800ec38: 47d0 blx sl 800ec3a: 3001 adds r0, #1 800ec3c: d0ad beq.n 800eb9a <_printf_i+0x15a> 800ec3e: 6823 ldr r3, [r4, #0] 800ec40: 079b lsls r3, r3, #30 800ec42: d413 bmi.n 800ec6c <_printf_i+0x22c> 800ec44: 68e0 ldr r0, [r4, #12] 800ec46: 9b03 ldr r3, [sp, #12] 800ec48: 4298 cmp r0, r3 800ec4a: bfb8 it lt 800ec4c: 4618 movlt r0, r3 800ec4e: e7a6 b.n 800eb9e <_printf_i+0x15e> 800ec50: 2301 movs r3, #1 800ec52: 4632 mov r2, r6 800ec54: 4649 mov r1, r9 800ec56: 4640 mov r0, r8 800ec58: 47d0 blx sl 800ec5a: 3001 adds r0, #1 800ec5c: d09d beq.n 800eb9a <_printf_i+0x15a> 800ec5e: 3501 adds r5, #1 800ec60: 68e3 ldr r3, [r4, #12] 800ec62: 9903 ldr r1, [sp, #12] 800ec64: 1a5b subs r3, r3, r1 800ec66: 42ab cmp r3, r5 800ec68: dcf2 bgt.n 800ec50 <_printf_i+0x210> 800ec6a: e7eb b.n 800ec44 <_printf_i+0x204> 800ec6c: 2500 movs r5, #0 800ec6e: f104 0619 add.w r6, r4, #25 800ec72: e7f5 b.n 800ec60 <_printf_i+0x220> 800ec74: 0800f553 .word 0x0800f553 800ec78: 0800f564 .word 0x0800f564 0800ec7c : 800ec7c: 4288 cmp r0, r1 800ec7e: b510 push {r4, lr} 800ec80: eb01 0402 add.w r4, r1, r2 800ec84: d902 bls.n 800ec8c 800ec86: 4284 cmp r4, r0 800ec88: 4623 mov r3, r4 800ec8a: d807 bhi.n 800ec9c 800ec8c: 1e43 subs r3, r0, #1 800ec8e: 42a1 cmp r1, r4 800ec90: d008 beq.n 800eca4 800ec92: f811 2b01 ldrb.w r2, [r1], #1 800ec96: f803 2f01 strb.w r2, [r3, #1]! 800ec9a: e7f8 b.n 800ec8e 800ec9c: 4601 mov r1, r0 800ec9e: 4402 add r2, r0 800eca0: 428a cmp r2, r1 800eca2: d100 bne.n 800eca6 800eca4: bd10 pop {r4, pc} 800eca6: f813 4d01 ldrb.w r4, [r3, #-1]! 800ecaa: f802 4d01 strb.w r4, [r2, #-1]! 800ecae: e7f7 b.n 800eca0 0800ecb0 <_sbrk_r>: 800ecb0: b538 push {r3, r4, r5, lr} 800ecb2: 2300 movs r3, #0 800ecb4: 4d05 ldr r5, [pc, #20] @ (800eccc <_sbrk_r+0x1c>) 800ecb6: 4604 mov r4, r0 800ecb8: 4608 mov r0, r1 800ecba: 602b str r3, [r5, #0] 800ecbc: f7f6 f98e bl 8004fdc <_sbrk> 800ecc0: 1c43 adds r3, r0, #1 800ecc2: d102 bne.n 800ecca <_sbrk_r+0x1a> 800ecc4: 682b ldr r3, [r5, #0] 800ecc6: b103 cbz r3, 800ecca <_sbrk_r+0x1a> 800ecc8: 6023 str r3, [r4, #0] 800ecca: bd38 pop {r3, r4, r5, pc} 800eccc: 20001894 .word 0x20001894 0800ecd0 : 800ecd0: 4603 mov r3, r0 800ecd2: b510 push {r4, lr} 800ecd4: b2c9 uxtb r1, r1 800ecd6: 4402 add r2, r0 800ecd8: 4293 cmp r3, r2 800ecda: 4618 mov r0, r3 800ecdc: d101 bne.n 800ece2 800ecde: 2000 movs r0, #0 800ece0: e003 b.n 800ecea 800ece2: 7804 ldrb r4, [r0, #0] 800ece4: 3301 adds r3, #1 800ece6: 428c cmp r4, r1 800ece8: d1f6 bne.n 800ecd8 800ecea: bd10 pop {r4, pc} 0800ecec : 800ecec: 440a add r2, r1 800ecee: 4291 cmp r1, r2 800ecf0: f100 33ff add.w r3, r0, #4294967295 800ecf4: d100 bne.n 800ecf8 800ecf6: 4770 bx lr 800ecf8: b510 push {r4, lr} 800ecfa: f811 4b01 ldrb.w r4, [r1], #1 800ecfe: 4291 cmp r1, r2 800ed00: f803 4f01 strb.w r4, [r3, #1]! 800ed04: d1f9 bne.n 800ecfa 800ed06: bd10 pop {r4, pc} 0800ed08 <_realloc_r>: 800ed08: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800ed0c: 4607 mov r7, r0 800ed0e: 4614 mov r4, r2 800ed10: 460d mov r5, r1 800ed12: b921 cbnz r1, 800ed1e <_realloc_r+0x16> 800ed14: 4611 mov r1, r2 800ed16: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800ed1a: f7ff bc3b b.w 800e594 <_malloc_r> 800ed1e: b92a cbnz r2, 800ed2c <_realloc_r+0x24> 800ed20: f7ff fbce bl 800e4c0 <_free_r> 800ed24: 4625 mov r5, r4 800ed26: 4628 mov r0, r5 800ed28: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800ed2c: f000 f81a bl 800ed64 <_malloc_usable_size_r> 800ed30: 4284 cmp r4, r0 800ed32: 4606 mov r6, r0 800ed34: d802 bhi.n 800ed3c <_realloc_r+0x34> 800ed36: ebb4 0f50 cmp.w r4, r0, lsr #1 800ed3a: d8f4 bhi.n 800ed26 <_realloc_r+0x1e> 800ed3c: 4621 mov r1, r4 800ed3e: 4638 mov r0, r7 800ed40: f7ff fc28 bl 800e594 <_malloc_r> 800ed44: 4680 mov r8, r0 800ed46: b908 cbnz r0, 800ed4c <_realloc_r+0x44> 800ed48: 4645 mov r5, r8 800ed4a: e7ec b.n 800ed26 <_realloc_r+0x1e> 800ed4c: 42b4 cmp r4, r6 800ed4e: 4622 mov r2, r4 800ed50: 4629 mov r1, r5 800ed52: bf28 it cs 800ed54: 4632 movcs r2, r6 800ed56: f7ff ffc9 bl 800ecec 800ed5a: 4629 mov r1, r5 800ed5c: 4638 mov r0, r7 800ed5e: f7ff fbaf bl 800e4c0 <_free_r> 800ed62: e7f1 b.n 800ed48 <_realloc_r+0x40> 0800ed64 <_malloc_usable_size_r>: 800ed64: f851 3c04 ldr.w r3, [r1, #-4] 800ed68: 1f18 subs r0, r3, #4 800ed6a: 2b00 cmp r3, #0 800ed6c: bfbc itt lt 800ed6e: 580b ldrlt r3, [r1, r0] 800ed70: 18c0 addlt r0, r0, r3 800ed72: 4770 bx lr 0800ed74 <_init>: 800ed74: b5f8 push {r3, r4, r5, r6, r7, lr} 800ed76: bf00 nop 800ed78: bcf8 pop {r3, r4, r5, r6, r7} 800ed7a: bc08 pop {r3} 800ed7c: 469e mov lr, r3 800ed7e: 4770 bx lr 0800ed80 <_fini>: 800ed80: b5f8 push {r3, r4, r5, r6, r7, lr} 800ed82: bf00 nop 800ed84: bcf8 pop {r3, r4, r5, r6, r7} 800ed86: bc08 pop {r3} 800ed88: 469e mov lr, r3 800ed8a: 4770 bx lr