AUTOM10.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000bab0 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000002cc 0800bbbc 0800bbbc 0000cbbc 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800be88 0800be88 0000d1d0 2**0 CONTENTS, READONLY 4 .ARM 00000008 0800be88 0800be88 0000ce88 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 0800be90 0800be90 0000d1d0 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800be90 0800be90 0000ce90 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 0800be94 0800be94 0000ce94 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 000001d0 20000000 0800be98 0000d000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 0000164c 200001d0 0800c068 0000d1d0 2**3 ALLOC 10 ._user_heap_stack 00000604 2000181c 0800c068 0000d81c 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 0000d1d0 2**0 CONTENTS, READONLY 12 .debug_info 000184fb 00000000 00000000 0000d1f9 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 0000452e 00000000 00000000 000256f4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 000015f8 00000000 00000000 00029c28 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 000010d9 00000000 00000000 0002b220 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 0001c730 00000000 00000000 0002c2f9 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001cc8f 00000000 00000000 00048a29 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 00095753 00000000 00000000 000656b8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 000fae0b 2**0 CONTENTS, READONLY 20 .debug_frame 00005ef8 00000000 00000000 000fae50 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000052 00000000 00000000 00100d48 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 0800010c <__do_global_dtors_aux>: 800010c: b510 push {r4, lr} 800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>) 8000110: 7823 ldrb r3, [r4, #0] 8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16> 8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>) 8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12> 8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>) 800011a: f3af 8000 nop.w 800011e: 2301 movs r3, #1 8000120: 7023 strb r3, [r4, #0] 8000122: bd10 pop {r4, pc} 8000124: 200001d0 .word 0x200001d0 8000128: 00000000 .word 0x00000000 800012c: 0800bba4 .word 0x0800bba4 08000130 : 8000130: b508 push {r3, lr} 8000132: 4b03 ldr r3, [pc, #12] @ (8000140 ) 8000134: b11b cbz r3, 800013e 8000136: 4903 ldr r1, [pc, #12] @ (8000144 ) 8000138: 4803 ldr r0, [pc, #12] @ (8000148 ) 800013a: f3af 8000 nop.w 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 8000144: 200001d4 .word 0x200001d4 8000148: 0800bba4 .word 0x0800bba4 0800014c : 800014c: 4603 mov r3, r0 800014e: f813 2b01 ldrb.w r2, [r3], #1 8000152: 2a00 cmp r2, #0 8000154: d1fb bne.n 800014e 8000156: 1a18 subs r0, r3, r0 8000158: 3801 subs r0, #1 800015a: 4770 bx lr 0800015c : uint16_t ch5 ; uint16_t ch6 ; uint16_t ch7 ; uint16_t ch8 ; void manageAdc(void){ 800015c: b480 push {r7} 800015e: af00 add r7, sp, #0 if (adc_avg_ready) 8000160: 4b12 ldr r3, [pc, #72] @ (80001ac ) 8000162: 781b ldrb r3, [r3, #0] 8000164: b2db uxtb r3, r3 8000166: 2b00 cmp r3, #0 8000168: d01b beq.n 80001a2 { adc_avg_ready = 0; 800016a: 4b10 ldr r3, [pc, #64] @ (80001ac ) 800016c: 2200 movs r2, #0 800016e: 701a strb r2, [r3, #0] // Read averaged channels (example mapping) ch4 = adc_avg[0]; 8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 ) 8000172: 881b ldrh r3, [r3, #0] 8000174: b29a uxth r2, r3 8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 ) 8000178: 801a strh r2, [r3, #0] ch5 = adc_avg[1]; 800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 ) 800017c: 885b ldrh r3, [r3, #2] 800017e: b29a uxth r2, r3 8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 ) 8000182: 801a strh r2, [r3, #0] ch6 = adc_avg[2]; 8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 ) 8000186: 889b ldrh r3, [r3, #4] 8000188: b29a uxth r2, r3 800018a: 4b0c ldr r3, [pc, #48] @ (80001bc ) 800018c: 801a strh r2, [r3, #0] ch7 = adc_avg[3]; 800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 ) 8000190: 88db ldrh r3, [r3, #6] 8000192: b29a uxth r2, r3 8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 ) 8000196: 801a strh r2, [r3, #0] ch8 = adc_avg[4]; 8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 ) 800019a: 891b ldrh r3, [r3, #8] 800019c: b29a uxth r2, r3 800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 ) 80001a0: 801a strh r2, [r3, #0] // Use them (convert to volts, control, etc.) // float v4 = (3.3f * ch4) / 4095.0f; } } 80001a2: bf00 nop 80001a4: 46bd mov sp, r7 80001a6: bc80 pop {r7} 80001a8: 4770 bx lr 80001aa: bf00 nop 80001ac: 20000219 .word 0x20000219 80001b0: 200001f8 .word 0x200001f8 80001b4: 2000021a .word 0x2000021a 80001b8: 2000021c .word 0x2000021c 80001bc: 2000021e .word 0x2000021e 80001c0: 20000220 .word 0x20000220 80001c4: 20000222 .word 0x20000222 080001c8 : void readAdc(void){ 80001c8: b480 push {r7} 80001ca: b083 sub sp, #12 80001cc: af00 add r7, sp, #0 for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001ce: 2300 movs r3, #0 80001d0: 71fb strb r3, [r7, #7] 80001d2: e010 b.n 80001f6 { adc_sum[i] += adc_dma_buf[i]; 80001d4: 79fb ldrb r3, [r7, #7] 80001d6: 4a21 ldr r2, [pc, #132] @ (800025c ) 80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 80001dc: b299 uxth r1, r3 80001de: 79fb ldrb r3, [r7, #7] 80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 ) 80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2] 80001e6: 79fb ldrb r3, [r7, #7] 80001e8: 440a add r2, r1 80001ea: 491d ldr r1, [pc, #116] @ (8000260 ) 80001ec: f841 2023 str.w r2, [r1, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001f0: 79fb ldrb r3, [r7, #7] 80001f2: 3301 adds r3, #1 80001f4: 71fb strb r3, [r7, #7] 80001f6: 79fb ldrb r3, [r7, #7] 80001f8: 2b04 cmp r3, #4 80001fa: d9eb bls.n 80001d4 } adc_sum_count++; 80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 ) 80001fe: 781b ldrb r3, [r3, #0] 8000200: 3301 adds r3, #1 8000202: b2da uxtb r2, r3 8000204: 4b17 ldr r3, [pc, #92] @ (8000264 ) 8000206: 701a strb r2, [r3, #0] /* When we collected ADC_AVG_WINDOW samples → compute average */ if (adc_sum_count >= ADC_AVG_WINDOW) 8000208: 4b16 ldr r3, [pc, #88] @ (8000264 ) 800020a: 781b ldrb r3, [r3, #0] 800020c: 2b04 cmp r3, #4 800020e: d920 bls.n 8000252 { for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 8000210: 2300 movs r3, #0 8000212: 71bb strb r3, [r7, #6] 8000214: e014 b.n 8000240 { adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW); 8000216: 79bb ldrb r3, [r7, #6] 8000218: 4a11 ldr r2, [pc, #68] @ (8000260 ) 800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800021e: 4a12 ldr r2, [pc, #72] @ (8000268 ) 8000220: fba2 2303 umull r2, r3, r2, r3 8000224: 089a lsrs r2, r3, #2 8000226: 79bb ldrb r3, [r7, #6] 8000228: b291 uxth r1, r2 800022a: 4a10 ldr r2, [pc, #64] @ (800026c ) 800022c: f822 1013 strh.w r1, [r2, r3, lsl #1] adc_sum[i] = 0; 8000230: 79bb ldrb r3, [r7, #6] 8000232: 4a0b ldr r2, [pc, #44] @ (8000260 ) 8000234: 2100 movs r1, #0 8000236: f842 1023 str.w r1, [r2, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 800023a: 79bb ldrb r3, [r7, #6] 800023c: 3301 adds r3, #1 800023e: 71bb strb r3, [r7, #6] 8000240: 79bb ldrb r3, [r7, #6] 8000242: 2b04 cmp r3, #4 8000244: d9e7 bls.n 8000216 } adc_sum_count = 0; 8000246: 4b07 ldr r3, [pc, #28] @ (8000264 ) 8000248: 2200 movs r2, #0 800024a: 701a strb r2, [r3, #0] adc_avg_ready = 1; // tell main loop new data is ready 800024c: 4b08 ldr r3, [pc, #32] @ (8000270 ) 800024e: 2201 movs r2, #1 8000250: 701a strb r2, [r3, #0] } } 8000252: bf00 nop 8000254: 370c adds r7, #12 8000256: 46bd mov sp, r7 8000258: bc80 pop {r7} 800025a: 4770 bx lr 800025c: 200001ec .word 0x200001ec 8000260: 20000204 .word 0x20000204 8000264: 20000218 .word 0x20000218 8000268: cccccccd .word 0xcccccccd 800026c: 200001f8 .word 0x200001f8 8000270: 20000219 .word 0x20000219 08000274 : uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data); uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data); /* Pseudo-array accessor EEW[idx] */ static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value) { 8000274: b580 push {r7, lr} 8000276: b082 sub sp, #8 8000278: af00 add r7, sp, #0 800027a: 4603 mov r3, r0 800027c: 6039 str r1, [r7, #0] 800027e: 71fb strb r3, [r7, #7] return EE_ReadVariable(EEW_ADDR(idx), value); 8000280: 79fb ldrb r3, [r7, #7] 8000282: b29b uxth r3, r3 8000284: 3301 adds r3, #1 8000286: b29b uxth r3, r3 8000288: 6839 ldr r1, [r7, #0] 800028a: 4618 mov r0, r3 800028c: f000 fec8 bl 8001020 8000290: 4603 mov r3, r0 } 8000292: 4618 mov r0, r3 8000294: 3708 adds r7, #8 8000296: 46bd mov sp, r7 8000298: bd80 pop {r7, pc} 0800029a : static inline uint16_t EEW_Write(uint8_t idx, uint16_t value) { 800029a: b580 push {r7, lr} 800029c: b082 sub sp, #8 800029e: af00 add r7, sp, #0 80002a0: 4603 mov r3, r0 80002a2: 460a mov r2, r1 80002a4: 71fb strb r3, [r7, #7] 80002a6: 4613 mov r3, r2 80002a8: 80bb strh r3, [r7, #4] return EE_WriteVariable(EEW_ADDR(idx), value); 80002aa: 79fb ldrb r3, [r7, #7] 80002ac: b29b uxth r3, r3 80002ae: 3301 adds r3, #1 80002b0: b29b uxth r3, r3 80002b2: 88ba ldrh r2, [r7, #4] 80002b4: 4611 mov r1, r2 80002b6: 4618 mov r0, r3 80002b8: f000 fece bl 8001058 80002bc: 4603 mov r3, r0 } 80002be: 4618 mov r0, r3 80002c0: 3708 adds r7, #8 80002c2: 46bd mov sp, r7 80002c4: bd80 pop {r7, pc} 080002c6 : extern uint16_t ch5 ; extern uint16_t ch6 ; extern uint16_t ch7 ; extern uint16_t ch8 ; bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){ 80002c6: b490 push {r4, r7} 80002c8: b082 sub sp, #8 80002ca: af00 add r7, sp, #0 80002cc: 4604 mov r4, r0 80002ce: 4608 mov r0, r1 80002d0: 4611 mov r1, r2 80002d2: 461a mov r2, r3 80002d4: 4623 mov r3, r4 80002d6: 71fb strb r3, [r7, #7] 80002d8: 4603 mov r3, r0 80002da: 71bb strb r3, [r7, #6] 80002dc: 460b mov r3, r1 80002de: 717b strb r3, [r7, #5] 80002e0: 4613 mov r3, r2 80002e2: 713b strb r3, [r7, #4] if((c1>='0')&&(c1<='9')){ 80002e4: 79fb ldrb r3, [r7, #7] 80002e6: 2b2f cmp r3, #47 @ 0x2f 80002e8: d906 bls.n 80002f8 80002ea: 79fb ldrb r3, [r7, #7] 80002ec: 2b39 cmp r3, #57 @ 0x39 80002ee: d803 bhi.n 80002f8 c1-='0'; 80002f0: 79fb ldrb r3, [r7, #7] 80002f2: 3b30 subs r3, #48 @ 0x30 80002f4: 71fb strb r3, [r7, #7] 80002f6: e00b b.n 8000310 }else if((c1>='a')&&(c1<='f')){ 80002f8: 79fb ldrb r3, [r7, #7] 80002fa: 2b60 cmp r3, #96 @ 0x60 80002fc: d906 bls.n 800030c 80002fe: 79fb ldrb r3, [r7, #7] 8000300: 2b66 cmp r3, #102 @ 0x66 8000302: d803 bhi.n 800030c c1=(c1-'a')+10; 8000304: 79fb ldrb r3, [r7, #7] 8000306: 3b57 subs r3, #87 @ 0x57 8000308: 71fb strb r3, [r7, #7] 800030a: e001 b.n 8000310 }else return false; 800030c: 2300 movs r3, #0 800030e: e070 b.n 80003f2 if((c2>='0')&&(c2<='9')){ 8000310: 79bb ldrb r3, [r7, #6] 8000312: 2b2f cmp r3, #47 @ 0x2f 8000314: d906 bls.n 8000324 8000316: 79bb ldrb r3, [r7, #6] 8000318: 2b39 cmp r3, #57 @ 0x39 800031a: d803 bhi.n 8000324 c2-='0'; 800031c: 79bb ldrb r3, [r7, #6] 800031e: 3b30 subs r3, #48 @ 0x30 8000320: 71bb strb r3, [r7, #6] 8000322: e00b b.n 800033c }else if((c2>='a')&&(c2<='f')){ 8000324: 79bb ldrb r3, [r7, #6] 8000326: 2b60 cmp r3, #96 @ 0x60 8000328: d906 bls.n 8000338 800032a: 79bb ldrb r3, [r7, #6] 800032c: 2b66 cmp r3, #102 @ 0x66 800032e: d803 bhi.n 8000338 c2=(c2-'a')+10; 8000330: 79bb ldrb r3, [r7, #6] 8000332: 3b57 subs r3, #87 @ 0x57 8000334: 71bb strb r3, [r7, #6] 8000336: e001 b.n 800033c }else return false; 8000338: 2300 movs r3, #0 800033a: e05a b.n 80003f2 if((c3>='0')&&(c3<='9')){ 800033c: 797b ldrb r3, [r7, #5] 800033e: 2b2f cmp r3, #47 @ 0x2f 8000340: d906 bls.n 8000350 8000342: 797b ldrb r3, [r7, #5] 8000344: 2b39 cmp r3, #57 @ 0x39 8000346: d803 bhi.n 8000350 c3-='0'; 8000348: 797b ldrb r3, [r7, #5] 800034a: 3b30 subs r3, #48 @ 0x30 800034c: 717b strb r3, [r7, #5] 800034e: e00b b.n 8000368 }else if((c3>='a')&&(c3<='f')){ 8000350: 797b ldrb r3, [r7, #5] 8000352: 2b60 cmp r3, #96 @ 0x60 8000354: d906 bls.n 8000364 8000356: 797b ldrb r3, [r7, #5] 8000358: 2b66 cmp r3, #102 @ 0x66 800035a: d803 bhi.n 8000364 c3=(c3-'a')+10; 800035c: 797b ldrb r3, [r7, #5] 800035e: 3b57 subs r3, #87 @ 0x57 8000360: 717b strb r3, [r7, #5] 8000362: e001 b.n 8000368 }else return false; 8000364: 2300 movs r3, #0 8000366: e044 b.n 80003f2 if((c4>='0')&&(c4<='9')){ 8000368: 793b ldrb r3, [r7, #4] 800036a: 2b2f cmp r3, #47 @ 0x2f 800036c: d906 bls.n 800037c 800036e: 793b ldrb r3, [r7, #4] 8000370: 2b39 cmp r3, #57 @ 0x39 8000372: d803 bhi.n 800037c c4-='0'; 8000374: 793b ldrb r3, [r7, #4] 8000376: 3b30 subs r3, #48 @ 0x30 8000378: 713b strb r3, [r7, #4] 800037a: e00b b.n 8000394 }else if((c4>='a')&&(c4<='f')){ 800037c: 793b ldrb r3, [r7, #4] 800037e: 2b60 cmp r3, #96 @ 0x60 8000380: d906 bls.n 8000390 8000382: 793b ldrb r3, [r7, #4] 8000384: 2b66 cmp r3, #102 @ 0x66 8000386: d803 bhi.n 8000390 c4=(c4-'a')+10; 8000388: 793b ldrb r3, [r7, #4] 800038a: 3b57 subs r3, #87 @ 0x57 800038c: 713b strb r3, [r7, #4] 800038e: e001 b.n 8000394 }else return false; 8000390: 2300 movs r3, #0 8000392: e02e b.n 80003f2 *retval=c1; 8000394: 79fb ldrb r3, [r7, #7] 8000396: b29a uxth r2, r3 8000398: 693b ldr r3, [r7, #16] 800039a: 801a strh r2, [r3, #0] *retval*=16; 800039c: 693b ldr r3, [r7, #16] 800039e: 881b ldrh r3, [r3, #0] 80003a0: 011b lsls r3, r3, #4 80003a2: b29a uxth r2, r3 80003a4: 693b ldr r3, [r7, #16] 80003a6: 801a strh r2, [r3, #0] *retval+=c2; 80003a8: 693b ldr r3, [r7, #16] 80003aa: 881a ldrh r2, [r3, #0] 80003ac: 79bb ldrb r3, [r7, #6] 80003ae: b29b uxth r3, r3 80003b0: 4413 add r3, r2 80003b2: b29a uxth r2, r3 80003b4: 693b ldr r3, [r7, #16] 80003b6: 801a strh r2, [r3, #0] *retval*=16; 80003b8: 693b ldr r3, [r7, #16] 80003ba: 881b ldrh r3, [r3, #0] 80003bc: 011b lsls r3, r3, #4 80003be: b29a uxth r2, r3 80003c0: 693b ldr r3, [r7, #16] 80003c2: 801a strh r2, [r3, #0] *retval+=c3; 80003c4: 693b ldr r3, [r7, #16] 80003c6: 881a ldrh r2, [r3, #0] 80003c8: 797b ldrb r3, [r7, #5] 80003ca: b29b uxth r3, r3 80003cc: 4413 add r3, r2 80003ce: b29a uxth r2, r3 80003d0: 693b ldr r3, [r7, #16] 80003d2: 801a strh r2, [r3, #0] *retval*=16; 80003d4: 693b ldr r3, [r7, #16] 80003d6: 881b ldrh r3, [r3, #0] 80003d8: 011b lsls r3, r3, #4 80003da: b29a uxth r2, r3 80003dc: 693b ldr r3, [r7, #16] 80003de: 801a strh r2, [r3, #0] *retval+=c4; 80003e0: 693b ldr r3, [r7, #16] 80003e2: 881a ldrh r2, [r3, #0] 80003e4: 793b ldrb r3, [r7, #4] 80003e6: b29b uxth r3, r3 80003e8: 4413 add r3, r2 80003ea: b29a uxth r2, r3 80003ec: 693b ldr r3, [r7, #16] 80003ee: 801a strh r2, [r3, #0] return true; 80003f0: 2301 movs r3, #1 } 80003f2: 4618 mov r0, r3 80003f4: 3708 adds r7, #8 80003f6: 46bd mov sp, r7 80003f8: bc90 pop {r4, r7} 80003fa: 4770 bx lr 080003fc : void manageCDC(void){ 80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8000400: b0a7 sub sp, #156 @ 0x9c 8000402: af06 add r7, sp, #24 uint16_t val; uint16_t st; uint16_t eeadd; uint8_t i; if (CDC_Available()) { 8000404: f00a fa6a bl 800a8dc 8000408: 4603 mov r3, r0 800040a: 2b00 cmp r3, #0 800040c: f000 8433 beq.w 8000c76 int rx = CDC_ReadByte(); 8000410: f00a fa78 bl 800a904 8000414: 67b8 str r0, [r7, #120] @ 0x78 if (rx < 0) return; 8000416: 6fbb ldr r3, [r7, #120] @ 0x78 8000418: 2b00 cmp r3, #0 800041a: f2c0 842b blt.w 8000c74 //uint8_t out = (uint8_t)c; //if (out >= 'a' && out <= 'z') out -= 32; // to upper rxbuf[rxidx]=rx; 800041e: 4ba2 ldr r3, [pc, #648] @ (80006a8 ) 8000420: 781b ldrb r3, [r3, #0] 8000422: 461a mov r2, r3 8000424: 6fbb ldr r3, [r7, #120] @ 0x78 8000426: b2d9 uxtb r1, r3 8000428: 4ba0 ldr r3, [pc, #640] @ (80006ac ) 800042a: 5499 strb r1, [r3, r2] while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo 800042c: bf00 nop 800042e: 4b9e ldr r3, [pc, #632] @ (80006a8 ) 8000430: 781b ldrb r3, [r3, #0] 8000432: 461a mov r2, r3 8000434: 4b9d ldr r3, [pc, #628] @ (80006ac ) 8000436: 4413 add r3, r2 8000438: 2101 movs r1, #1 800043a: 4618 mov r0, r3 800043c: f00a fb24 bl 800aa88 8000440: 4603 mov r3, r0 8000442: 2b01 cmp r3, #1 8000444: d0f3 beq.n 800042e if((rx==0x0d)||(rx==0x0a)){ 8000446: 6fbb ldr r3, [r7, #120] @ 0x78 8000448: 2b0d cmp r3, #13 800044a: d003 beq.n 8000454 800044c: 6fbb ldr r3, [r7, #120] @ 0x78 800044e: 2b0a cmp r3, #10 8000450: f040 8409 bne.w 8000c66 if(rxidx){ 8000454: 4b94 ldr r3, [pc, #592] @ (80006a8 ) 8000456: 781b ldrb r3, [r3, #0] 8000458: 2b00 cmp r3, #0 800045a: f000 8400 beq.w 8000c5e switch(rxbuf[0]){ 800045e: 4b93 ldr r3, [pc, #588] @ (80006ac ) 8000460: 781b ldrb r3, [r3, #0] 8000462: 2b6d cmp r3, #109 @ 0x6d 8000464: f000 80e6 beq.w 8000634 8000468: 2b6d cmp r3, #109 @ 0x6d 800046a: f300 83e6 bgt.w 8000c3a 800046e: 2b69 cmp r3, #105 @ 0x69 8000470: d009 beq.n 8000486 8000472: 2b69 cmp r3, #105 @ 0x69 8000474: f300 83e1 bgt.w 8000c3a 8000478: 2b49 cmp r3, #73 @ 0x49 800047a: f000 80ca beq.w 8000612 800047e: 2b65 cmp r3, #101 @ 0x65 8000480: f000 820c beq.w 800089c 8000484: e3d9 b.n 8000c3a case 'i': sprintf((char*)s,"info\n"); 8000486: f107 030c add.w r3, r7, #12 800048a: 4989 ldr r1, [pc, #548] @ (80006b0 ) 800048c: 4618 mov r0, r3 800048e: f00a fed9 bl 800b244 while (CDC_Transmit_FS(s, 5) == USBD_BUSY); 8000492: bf00 nop 8000494: f107 030c add.w r3, r7, #12 8000498: 2105 movs r1, #5 800049a: 4618 mov r0, r3 800049c: f00a faf4 bl 800aa88 80004a0: 4603 mov r3, r0 80004a2: 2b01 cmp r3, #1 80004a4: d0f6 beq.n 8000494 sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4)); 80004a6: 2100 movs r1, #0 80004a8: 4882 ldr r0, [pc, #520] @ (80006b4 ) 80004aa: f001 fa33 bl 8001914 80004ae: 4603 mov r3, r0 80004b0: 4698 mov r8, r3 80004b2: 2104 movs r1, #4 80004b4: 487f ldr r0, [pc, #508] @ (80006b4 ) 80004b6: f001 fa2d bl 8001914 80004ba: 4603 mov r3, r0 80004bc: 4699 mov r9, r3 80004be: 2108 movs r1, #8 80004c0: 487c ldr r0, [pc, #496] @ (80006b4 ) 80004c2: f001 fa27 bl 8001914 80004c6: 4603 mov r3, r0 80004c8: 461c mov r4, r3 80004ca: 210c movs r1, #12 80004cc: 4879 ldr r0, [pc, #484] @ (80006b4 ) 80004ce: f001 fa21 bl 8001914 80004d2: 4603 mov r3, r0 80004d4: 461d mov r5, r3 80004d6: 2100 movs r1, #0 80004d8: 4877 ldr r0, [pc, #476] @ (80006b8 ) 80004da: f001 fa1b bl 8001914 80004de: 4603 mov r3, r0 80004e0: 461e mov r6, r3 80004e2: 2104 movs r1, #4 80004e4: 4874 ldr r0, [pc, #464] @ (80006b8 ) 80004e6: f001 fa15 bl 8001914 80004ea: 4603 mov r3, r0 80004ec: 607b str r3, [r7, #4] 80004ee: 2108 movs r1, #8 80004f0: 4871 ldr r0, [pc, #452] @ (80006b8 ) 80004f2: f001 fa0f bl 8001914 80004f6: 4603 mov r3, r0 80004f8: 603b str r3, [r7, #0] 80004fa: 210c movs r1, #12 80004fc: 486e ldr r0, [pc, #440] @ (80006b8 ) 80004fe: f001 fa09 bl 8001914 8000502: 4603 mov r3, r0 8000504: f107 000c add.w r0, r7, #12 8000508: 9305 str r3, [sp, #20] 800050a: 683a ldr r2, [r7, #0] 800050c: 9204 str r2, [sp, #16] 800050e: 687b ldr r3, [r7, #4] 8000510: 9303 str r3, [sp, #12] 8000512: 9602 str r6, [sp, #8] 8000514: 9501 str r5, [sp, #4] 8000516: 9400 str r4, [sp, #0] 8000518: 464b mov r3, r9 800051a: 4642 mov r2, r8 800051c: 4967 ldr r1, [pc, #412] @ (80006bc ) 800051e: f00a fe91 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000522: bf00 nop 8000524: f107 030c add.w r3, r7, #12 8000528: 4618 mov r0, r3 800052a: f7ff fe0f bl 800014c 800052e: 4603 mov r3, r0 8000530: b29a uxth r2, r3 8000532: f107 030c add.w r3, r7, #12 8000536: 4611 mov r1, r2 8000538: 4618 mov r0, r3 800053a: f00a faa5 bl 800aa88 800053e: 4603 mov r3, r0 8000540: 2b01 cmp r3, #1 8000542: d0ef beq.n 8000524 sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4)); 8000544: 4b5b ldr r3, [pc, #364] @ (80006b4 ) 8000546: 681b ldr r3, [r3, #0] 8000548: 6b5b ldr r3, [r3, #52] @ 0x34 800054a: 607b str r3, [r7, #4] 800054c: 4b59 ldr r3, [pc, #356] @ (80006b4 ) 800054e: 681b ldr r3, [r3, #0] 8000550: 6b99 ldr r1, [r3, #56] @ 0x38 8000552: 6039 str r1, [r7, #0] 8000554: 4b57 ldr r3, [pc, #348] @ (80006b4 ) 8000556: 681b ldr r3, [r3, #0] 8000558: 6bdb ldr r3, [r3, #60] @ 0x3c 800055a: 4a56 ldr r2, [pc, #344] @ (80006b4 ) 800055c: 6812 ldr r2, [r2, #0] 800055e: 6c12 ldr r2, [r2, #64] @ 0x40 8000560: 4955 ldr r1, [pc, #340] @ (80006b8 ) 8000562: 6809 ldr r1, [r1, #0] 8000564: 6b49 ldr r1, [r1, #52] @ 0x34 8000566: 4854 ldr r0, [pc, #336] @ (80006b8 ) 8000568: 6800 ldr r0, [r0, #0] 800056a: 6b80 ldr r0, [r0, #56] @ 0x38 800056c: 4c52 ldr r4, [pc, #328] @ (80006b8 ) 800056e: 6824 ldr r4, [r4, #0] 8000570: 6be4 ldr r4, [r4, #60] @ 0x3c 8000572: 4d51 ldr r5, [pc, #324] @ (80006b8 ) 8000574: 682d ldr r5, [r5, #0] 8000576: 6c2d ldr r5, [r5, #64] @ 0x40 8000578: f107 060c add.w r6, r7, #12 800057c: 9505 str r5, [sp, #20] 800057e: 9404 str r4, [sp, #16] 8000580: 9003 str r0, [sp, #12] 8000582: 9102 str r1, [sp, #8] 8000584: 9201 str r2, [sp, #4] 8000586: 9300 str r3, [sp, #0] 8000588: 683b ldr r3, [r7, #0] 800058a: 687a ldr r2, [r7, #4] 800058c: 494c ldr r1, [pc, #304] @ (80006c0 ) 800058e: 4630 mov r0, r6 8000590: f00a fe58 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000594: bf00 nop 8000596: f107 030c add.w r3, r7, #12 800059a: 4618 mov r0, r3 800059c: f7ff fdd6 bl 800014c 80005a0: 4603 mov r3, r0 80005a2: b29a uxth r2, r3 80005a4: f107 030c add.w r3, r7, #12 80005a8: 4611 mov r1, r2 80005aa: 4618 mov r0, r3 80005ac: f00a fa6c bl 800aa88 80005b0: 4603 mov r3, r0 80005b2: 2b01 cmp r3, #1 80005b4: d0ef beq.n 8000596 sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8); 80005b6: 4b43 ldr r3, [pc, #268] @ (80006c4 ) 80005b8: 781b ldrb r3, [r3, #0] 80005ba: 461d mov r5, r3 80005bc: 4b42 ldr r3, [pc, #264] @ (80006c8 ) 80005be: 881b ldrh r3, [r3, #0] 80005c0: 461e mov r6, r3 80005c2: 4b42 ldr r3, [pc, #264] @ (80006cc ) 80005c4: 881b ldrh r3, [r3, #0] 80005c6: 461a mov r2, r3 80005c8: 4b41 ldr r3, [pc, #260] @ (80006d0 ) 80005ca: 881b ldrh r3, [r3, #0] 80005cc: 4619 mov r1, r3 80005ce: 4b41 ldr r3, [pc, #260] @ (80006d4 ) 80005d0: 881b ldrh r3, [r3, #0] 80005d2: 461c mov r4, r3 80005d4: 4b40 ldr r3, [pc, #256] @ (80006d8 ) 80005d6: 881b ldrh r3, [r3, #0] 80005d8: f107 000c add.w r0, r7, #12 80005dc: 9303 str r3, [sp, #12] 80005de: 9402 str r4, [sp, #8] 80005e0: 9101 str r1, [sp, #4] 80005e2: 9200 str r2, [sp, #0] 80005e4: 4633 mov r3, r6 80005e6: 462a mov r2, r5 80005e8: 493c ldr r1, [pc, #240] @ (80006dc ) 80005ea: f00a fe2b bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80005ee: bf00 nop 80005f0: f107 030c add.w r3, r7, #12 80005f4: 4618 mov r0, r3 80005f6: f7ff fda9 bl 800014c 80005fa: 4603 mov r3, r0 80005fc: b29a uxth r2, r3 80005fe: f107 030c add.w r3, r7, #12 8000602: 4611 mov r1, r2 8000604: 4618 mov r0, r3 8000606: f00a fa3f bl 800aa88 800060a: 4603 mov r3, r0 800060c: 2b01 cmp r3, #1 800060e: d0ef beq.n 80005f0 break; 8000610: e325 b.n 8000c5e case 'I': sprintf((char*)s,"\nID000000"); 8000612: f107 030c add.w r3, r7, #12 8000616: 4932 ldr r1, [pc, #200] @ (80006e0 ) 8000618: 4618 mov r0, r3 800061a: f00a fe13 bl 800b244 while (CDC_Transmit_FS(s, 9) == USBD_BUSY); 800061e: bf00 nop 8000620: f107 030c add.w r3, r7, #12 8000624: 2109 movs r1, #9 8000626: 4618 mov r0, r3 8000628: f00a fa2e bl 800aa88 800062c: 4603 mov r3, r0 800062e: 2b01 cmp r3, #1 8000630: d0f6 beq.n 8000620 break; 8000632: e314 b.n 8000c5e case 'm': if(rxidx==8){ 8000634: 4b1c ldr r3, [pc, #112] @ (80006a8 ) 8000636: 781b ldrb r3, [r3, #0] 8000638: 2b08 cmp r3, #8 800063a: f040 811d bne.w 8000878 if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){ 800063e: 4b1b ldr r3, [pc, #108] @ (80006ac ) 8000640: 785b ldrb r3, [r3, #1] 8000642: 2b30 cmp r3, #48 @ 0x30 8000644: f240 8107 bls.w 8000856 8000648: 4b18 ldr r3, [pc, #96] @ (80006ac ) 800064a: 785b ldrb r3, [r3, #1] 800064c: 2b34 cmp r3, #52 @ 0x34 800064e: f200 8102 bhi.w 8000856 mot=rxbuf[1]-='0'; 8000652: 4b16 ldr r3, [pc, #88] @ (80006ac ) 8000654: 785b ldrb r3, [r3, #1] 8000656: 3b30 subs r3, #48 @ 0x30 8000658: b2da uxtb r2, r3 800065a: 4b14 ldr r3, [pc, #80] @ (80006ac ) 800065c: 705a strb r2, [r3, #1] 800065e: 4b13 ldr r3, [pc, #76] @ (80006ac ) 8000660: 785b ldrb r3, [r3, #1] 8000662: f887 3077 strb.w r3, [r7, #119] @ 0x77 if(rxbuf[2]=='f'){ 8000666: 4b11 ldr r3, [pc, #68] @ (80006ac ) 8000668: 789b ldrb r3, [r3, #2] 800066a: 2b66 cmp r3, #102 @ 0x66 800066c: d103 bne.n 8000676 dir=FW; 800066e: 2300 movs r3, #0 8000670: f887 307f strb.w r3, [r7, #127] @ 0x7f 8000674: e038 b.n 80006e8 }else if(rxbuf[2]=='b'){ 8000676: 4b0d ldr r3, [pc, #52] @ (80006ac ) 8000678: 789b ldrb r3, [r3, #2] 800067a: 2b62 cmp r3, #98 @ 0x62 800067c: d103 bne.n 8000686 dir=BW; 800067e: 2301 movs r3, #1 8000680: f887 307f strb.w r3, [r7, #127] @ 0x7f 8000684: e030 b.n 80006e8 }else{ sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore 8000686: f107 030c add.w r3, r7, #12 800068a: 4916 ldr r1, [pc, #88] @ (80006e4 ) 800068c: 4618 mov r0, r3 800068e: f00a fdd9 bl 800b244 while (CDC_Transmit_FS(s, 16) == USBD_BUSY); 8000692: bf00 nop 8000694: f107 030c add.w r3, r7, #12 8000698: 2110 movs r1, #16 800069a: 4618 mov r0, r3 800069c: f00a f9f4 bl 800aa88 80006a0: 4603 mov r3, r0 80006a2: 2b01 cmp r3, #1 80006a4: d0f6 beq.n 8000694 break; 80006a6: e2da b.n 8000c5e 80006a8: 20000224 .word 0x20000224 80006ac: 20000228 .word 0x20000228 80006b0: 0800bbbc .word 0x0800bbbc 80006b4: 20000300 .word 0x20000300 80006b8: 20000348 .word 0x20000348 80006bc: 0800bbc4 .word 0x0800bbc4 80006c0: 0800bbdc .word 0x0800bbdc 80006c4: 200003d8 .word 0x200003d8 80006c8: 2000021a .word 0x2000021a 80006cc: 2000021c .word 0x2000021c 80006d0: 2000021e .word 0x2000021e 80006d4: 20000220 .word 0x20000220 80006d8: 20000222 .word 0x20000222 80006dc: 0800bc10 .word 0x0800bc10 80006e0: 0800bc48 .word 0x0800bc48 80006e4: 0800bc54 .word 0x0800bc54 } if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 80006e8: 4bb4 ldr r3, [pc, #720] @ (80009bc ) 80006ea: 78db ldrb r3, [r3, #3] 80006ec: 2b2f cmp r3, #47 @ 0x2f 80006ee: f240 80a1 bls.w 8000834 80006f2: 4bb2 ldr r3, [pc, #712] @ (80009bc ) 80006f4: 78db ldrb r3, [r3, #3] 80006f6: 2b39 cmp r3, #57 @ 0x39 80006f8: f200 809c bhi.w 8000834 80006fc: 4baf ldr r3, [pc, #700] @ (80009bc ) 80006fe: 791b ldrb r3, [r3, #4] 8000700: 2b2f cmp r3, #47 @ 0x2f 8000702: f240 8097 bls.w 8000834 8000706: 4bad ldr r3, [pc, #692] @ (80009bc ) 8000708: 791b ldrb r3, [r3, #4] 800070a: 2b39 cmp r3, #57 @ 0x39 800070c: f200 8092 bhi.w 8000834 8000710: 4baa ldr r3, [pc, #680] @ (80009bc ) 8000712: 795b ldrb r3, [r3, #5] 8000714: 2b2f cmp r3, #47 @ 0x2f 8000716: f240 808d bls.w 8000834 800071a: 4ba8 ldr r3, [pc, #672] @ (80009bc ) 800071c: 795b ldrb r3, [r3, #5] 800071e: 2b39 cmp r3, #57 @ 0x39 8000720: f200 8088 bhi.w 8000834 8000724: 4ba5 ldr r3, [pc, #660] @ (80009bc ) 8000726: 799b ldrb r3, [r3, #6] 8000728: 2b2f cmp r3, #47 @ 0x2f 800072a: f240 8083 bls.w 8000834 800072e: 4ba3 ldr r3, [pc, #652] @ (80009bc ) 8000730: 799b ldrb r3, [r3, #6] 8000732: 2b39 cmp r3, #57 @ 0x39 8000734: d87e bhi.n 8000834 8000736: 4ba1 ldr r3, [pc, #644] @ (80009bc ) 8000738: 79db ldrb r3, [r3, #7] 800073a: 2b2f cmp r3, #47 @ 0x2f 800073c: d97a bls.n 8000834 800073e: 4b9f ldr r3, [pc, #636] @ (80009bc ) 8000740: 79db ldrb r3, [r3, #7] 8000742: 2b39 cmp r3, #57 @ 0x39 8000744: d876 bhi.n 8000834 dm=rxbuf[3]-='0'; 8000746: 4b9d ldr r3, [pc, #628] @ (80009bc ) 8000748: 78db ldrb r3, [r3, #3] 800074a: 3b30 subs r3, #48 @ 0x30 800074c: b2da uxtb r2, r3 800074e: 4b9b ldr r3, [pc, #620] @ (80009bc ) 8000750: 70da strb r2, [r3, #3] 8000752: 4b9a ldr r3, [pc, #616] @ (80009bc ) 8000754: 78db ldrb r3, [r3, #3] 8000756: f887 3076 strb.w r3, [r7, #118] @ 0x76 m=rxbuf[4]-='0'; 800075a: 4b98 ldr r3, [pc, #608] @ (80009bc ) 800075c: 791b ldrb r3, [r3, #4] 800075e: 3b30 subs r3, #48 @ 0x30 8000760: b2da uxtb r2, r3 8000762: 4b96 ldr r3, [pc, #600] @ (80009bc ) 8000764: 711a strb r2, [r3, #4] 8000766: 4b95 ldr r3, [pc, #596] @ (80009bc ) 8000768: 791b ldrb r3, [r3, #4] 800076a: f887 3075 strb.w r3, [r7, #117] @ 0x75 c=rxbuf[5]-='0'; 800076e: 4b93 ldr r3, [pc, #588] @ (80009bc ) 8000770: 795b ldrb r3, [r3, #5] 8000772: 3b30 subs r3, #48 @ 0x30 8000774: b2da uxtb r2, r3 8000776: 4b91 ldr r3, [pc, #580] @ (80009bc ) 8000778: 715a strb r2, [r3, #5] 800077a: 4b90 ldr r3, [pc, #576] @ (80009bc ) 800077c: 795b ldrb r3, [r3, #5] 800077e: f887 3074 strb.w r3, [r7, #116] @ 0x74 d=rxbuf[6]-='0'; 8000782: 4b8e ldr r3, [pc, #568] @ (80009bc ) 8000784: 799b ldrb r3, [r3, #6] 8000786: 3b30 subs r3, #48 @ 0x30 8000788: b2da uxtb r2, r3 800078a: 4b8c ldr r3, [pc, #560] @ (80009bc ) 800078c: 719a strb r2, [r3, #6] 800078e: 4b8b ldr r3, [pc, #556] @ (80009bc ) 8000790: 799b ldrb r3, [r3, #6] 8000792: f887 3073 strb.w r3, [r7, #115] @ 0x73 u=rxbuf[7]-='0'; 8000796: 4b89 ldr r3, [pc, #548] @ (80009bc ) 8000798: 79db ldrb r3, [r3, #7] 800079a: 3b30 subs r3, #48 @ 0x30 800079c: b2da uxtb r2, r3 800079e: 4b87 ldr r3, [pc, #540] @ (80009bc ) 80007a0: 71da strb r2, [r3, #7] 80007a2: 4b86 ldr r3, [pc, #536] @ (80009bc ) 80007a4: 79db ldrb r3, [r3, #7] 80007a6: f887 3072 strb.w r3, [r7, #114] @ 0x72 val=dm; 80007aa: f897 3076 ldrb.w r3, [r7, #118] @ 0x76 80007ae: b29b uxth r3, r3 80007b0: 817b strh r3, [r7, #10] val*=10; 80007b2: 897b ldrh r3, [r7, #10] 80007b4: 461a mov r2, r3 80007b6: 0092 lsls r2, r2, #2 80007b8: 4413 add r3, r2 80007ba: 005b lsls r3, r3, #1 80007bc: b29b uxth r3, r3 80007be: 817b strh r3, [r7, #10] val+=m; 80007c0: f897 3075 ldrb.w r3, [r7, #117] @ 0x75 80007c4: b29a uxth r2, r3 80007c6: 897b ldrh r3, [r7, #10] 80007c8: 4413 add r3, r2 80007ca: b29b uxth r3, r3 80007cc: 817b strh r3, [r7, #10] val*=10; 80007ce: 897b ldrh r3, [r7, #10] 80007d0: 461a mov r2, r3 80007d2: 0092 lsls r2, r2, #2 80007d4: 4413 add r3, r2 80007d6: 005b lsls r3, r3, #1 80007d8: b29b uxth r3, r3 80007da: 817b strh r3, [r7, #10] val+=c; 80007dc: f897 3074 ldrb.w r3, [r7, #116] @ 0x74 80007e0: b29a uxth r2, r3 80007e2: 897b ldrh r3, [r7, #10] 80007e4: 4413 add r3, r2 80007e6: b29b uxth r3, r3 80007e8: 817b strh r3, [r7, #10] val*=10; 80007ea: 897b ldrh r3, [r7, #10] 80007ec: 461a mov r2, r3 80007ee: 0092 lsls r2, r2, #2 80007f0: 4413 add r3, r2 80007f2: 005b lsls r3, r3, #1 80007f4: b29b uxth r3, r3 80007f6: 817b strh r3, [r7, #10] val+=d; 80007f8: f897 3073 ldrb.w r3, [r7, #115] @ 0x73 80007fc: b29a uxth r2, r3 80007fe: 897b ldrh r3, [r7, #10] 8000800: 4413 add r3, r2 8000802: b29b uxth r3, r3 8000804: 817b strh r3, [r7, #10] val*=10; 8000806: 897b ldrh r3, [r7, #10] 8000808: 461a mov r2, r3 800080a: 0092 lsls r2, r2, #2 800080c: 4413 add r3, r2 800080e: 005b lsls r3, r3, #1 8000810: b29b uxth r3, r3 8000812: 817b strh r3, [r7, #10] val+=u; 8000814: f897 3072 ldrb.w r3, [r7, #114] @ 0x72 8000818: b29a uxth r2, r3 800081a: 897b ldrh r3, [r7, #10] 800081c: 4413 add r3, r2 800081e: b29b uxth r3, r3 8000820: 817b strh r3, [r7, #10] SetMot(mot,dir,val); 8000822: 897a ldrh r2, [r7, #10] 8000824: f897 107f ldrb.w r1, [r7, #127] @ 0x7f 8000828: f897 3077 ldrb.w r3, [r7, #119] @ 0x77 800082c: 4618 mov r0, r3 800082e: f001 f8e7 bl 8001a00 if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 8000832: e032 b.n 800089a }else{ sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore 8000834: f107 030c add.w r3, r7, #12 8000838: 4961 ldr r1, [pc, #388] @ (80009c0 ) 800083a: 4618 mov r0, r3 800083c: f00a fd02 bl 800b244 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 8000840: bf00 nop 8000842: f107 030c add.w r3, r7, #12 8000846: 2113 movs r1, #19 8000848: 4618 mov r0, r3 800084a: f00a f91d bl 800aa88 800084e: 4603 mov r3, r0 8000850: 2b01 cmp r3, #1 8000852: d0f6 beq.n 8000842 if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 8000854: e021 b.n 800089a } }else{ sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore 8000856: f107 030c add.w r3, r7, #12 800085a: 495a ldr r1, [pc, #360] @ (80009c4 ) 800085c: 4618 mov r0, r3 800085e: f00a fcf1 bl 800b244 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 8000862: bf00 nop 8000864: f107 030c add.w r3, r7, #12 8000868: 2113 movs r1, #19 800086a: 4618 mov r0, r3 800086c: f00a f90c bl 800aa88 8000870: 4603 mov r3, r0 8000872: 2b01 cmp r3, #1 8000874: d0f6 beq.n 8000864 } }else{ sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore while (CDC_Transmit_FS(s, 10) == USBD_BUSY); } break; 8000876: e1f2 b.n 8000c5e sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore 8000878: f107 030c add.w r3, r7, #12 800087c: 4952 ldr r1, [pc, #328] @ (80009c8 ) 800087e: 4618 mov r0, r3 8000880: f00a fce0 bl 800b244 while (CDC_Transmit_FS(s, 10) == USBD_BUSY); 8000884: bf00 nop 8000886: f107 030c add.w r3, r7, #12 800088a: 210a movs r1, #10 800088c: 4618 mov r0, r3 800088e: f00a f8fb bl 800aa88 8000892: 4603 mov r3, r0 8000894: 2b01 cmp r3, #1 8000896: d0f6 beq.n 8000886 break; 8000898: e1e1 b.n 8000c5e 800089a: e1e0 b.n 8000c5e case 'e': if(rxidx>1){ 800089c: 4b4b ldr r3, [pc, #300] @ (80009cc ) 800089e: 781b ldrb r3, [r3, #0] 80008a0: 2b01 cmp r3, #1 80008a2: f240 81b2 bls.w 8000c0a if(rxbuf[1]=='r'){ 80008a6: 4b45 ldr r3, [pc, #276] @ (80009bc ) 80008a8: 785b ldrb r3, [r3, #1] 80008aa: 2b72 cmp r3, #114 @ 0x72 80008ac: f040 8098 bne.w 80009e0 if(rxidx==4){ 80008b0: 4b46 ldr r3, [pc, #280] @ (80009cc ) 80008b2: 781b ldrb r3, [r3, #0] 80008b4: 2b04 cmp r3, #4 80008b6: d169 bne.n 800098c if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 80008b8: 4b40 ldr r3, [pc, #256] @ (80009bc ) 80008ba: 789a ldrb r2, [r3, #2] 80008bc: 4b3f ldr r3, [pc, #252] @ (80009bc ) 80008be: 78d9 ldrb r1, [r3, #3] 80008c0: f107 0308 add.w r3, r7, #8 80008c4: 9300 str r3, [sp, #0] 80008c6: 460b mov r3, r1 80008c8: 2130 movs r1, #48 @ 0x30 80008ca: 2030 movs r0, #48 @ 0x30 80008cc: f7ff fcfb bl 80002c6 80008d0: 4603 mov r3, r0 80008d2: 2b00 cmp r3, #0 80008d4: d042 beq.n 800095c st=EEW_Read(eeadd, &val); 80008d6: 893b ldrh r3, [r7, #8] 80008d8: b2db uxtb r3, r3 80008da: f107 020a add.w r2, r7, #10 80008de: 4611 mov r1, r2 80008e0: 4618 mov r0, r3 80008e2: f7ff fcc7 bl 8000274 80008e6: 4603 mov r3, r0 80008e8: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK){ 80008ec: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 80008f0: 2b00 cmp r3, #0 80008f2: d119 bne.n 8000928 sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val); 80008f4: 893b ldrh r3, [r7, #8] 80008f6: 461a mov r2, r3 80008f8: 897b ldrh r3, [r7, #10] 80008fa: f107 000c add.w r0, r7, #12 80008fe: 4934 ldr r1, [pc, #208] @ (80009d0 ) 8000900: f00a fca0 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000904: bf00 nop 8000906: f107 030c add.w r3, r7, #12 800090a: 4618 mov r0, r3 800090c: f7ff fc1e bl 800014c 8000910: 4603 mov r3, r0 8000912: b29a uxth r2, r3 8000914: f107 030c add.w r3, r7, #12 8000918: 4611 mov r1, r2 800091a: 4618 mov r0, r3 800091c: f00a f8b4 bl 800aa88 8000920: 4603 mov r3, r0 8000922: 2b01 cmp r3, #1 8000924: d0ef beq.n 8000906 } }else{ sprintf((char*)s,"\n?eraa | ewaavvvv"); while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); } break; 8000926: e199 b.n 8000c5c sprintf((char*)s,"\nee read error %d",st); 8000928: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 800092c: f107 030c add.w r3, r7, #12 8000930: 4928 ldr r1, [pc, #160] @ (80009d4 ) 8000932: 4618 mov r0, r3 8000934: f00a fc86 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000938: bf00 nop 800093a: f107 030c add.w r3, r7, #12 800093e: 4618 mov r0, r3 8000940: f7ff fc04 bl 800014c 8000944: 4603 mov r3, r0 8000946: b29a uxth r2, r3 8000948: f107 030c add.w r3, r7, #12 800094c: 4611 mov r1, r2 800094e: 4618 mov r0, r3 8000950: f00a f89a bl 800aa88 8000954: 4603 mov r3, r0 8000956: 2b01 cmp r3, #1 8000958: d0ef beq.n 800093a break; 800095a: e17f b.n 8000c5c sprintf((char*)s,"\n?eraa hex values"); 800095c: f107 030c add.w r3, r7, #12 8000960: 491d ldr r1, [pc, #116] @ (80009d8 ) 8000962: 4618 mov r0, r3 8000964: f00a fc6e bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000968: bf00 nop 800096a: f107 030c add.w r3, r7, #12 800096e: 4618 mov r0, r3 8000970: f7ff fbec bl 800014c 8000974: 4603 mov r3, r0 8000976: b29a uxth r2, r3 8000978: f107 030c add.w r3, r7, #12 800097c: 4611 mov r1, r2 800097e: 4618 mov r0, r3 8000980: f00a f882 bl 800aa88 8000984: 4603 mov r3, r0 8000986: 2b01 cmp r3, #1 8000988: d0ef beq.n 800096a break; 800098a: e167 b.n 8000c5c sprintf((char*)s,"\n?eraa"); 800098c: f107 030c add.w r3, r7, #12 8000990: 4912 ldr r1, [pc, #72] @ (80009dc ) 8000992: 4618 mov r0, r3 8000994: f00a fc56 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000998: bf00 nop 800099a: f107 030c add.w r3, r7, #12 800099e: 4618 mov r0, r3 80009a0: f7ff fbd4 bl 800014c 80009a4: 4603 mov r3, r0 80009a6: b29a uxth r2, r3 80009a8: f107 030c add.w r3, r7, #12 80009ac: 4611 mov r1, r2 80009ae: 4618 mov r0, r3 80009b0: f00a f86a bl 800aa88 80009b4: 4603 mov r3, r0 80009b6: 2b01 cmp r3, #1 80009b8: d0ef beq.n 800099a break; 80009ba: e14f b.n 8000c5c 80009bc: 20000228 .word 0x20000228 80009c0: 0800bc68 .word 0x0800bc68 80009c4: 0800bc88 .word 0x0800bc88 80009c8: 0800bc9c .word 0x0800bc9c 80009cc: 20000224 .word 0x20000224 80009d0: 0800bca8 .word 0x0800bca8 80009d4: 0800bcbc .word 0x0800bcbc 80009d8: 0800bcd0 .word 0x0800bcd0 80009dc: 0800bce4 .word 0x0800bce4 }else if(rxbuf[1]=='w'){ 80009e0: 4ba7 ldr r3, [pc, #668] @ (8000c80 ) 80009e2: 785b ldrb r3, [r3, #1] 80009e4: 2b77 cmp r3, #119 @ 0x77 80009e6: d169 bne.n 8000abc if(rxidx==8){ 80009e8: 4ba6 ldr r3, [pc, #664] @ (8000c84 ) 80009ea: 781b ldrb r3, [r3, #0] 80009ec: 2b08 cmp r3, #8 80009ee: d14d bne.n 8000a8c if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 80009f0: 4ba3 ldr r3, [pc, #652] @ (8000c80 ) 80009f2: 789a ldrb r2, [r3, #2] 80009f4: 4ba2 ldr r3, [pc, #648] @ (8000c80 ) 80009f6: 78d9 ldrb r1, [r3, #3] 80009f8: f107 0308 add.w r3, r7, #8 80009fc: 9300 str r3, [sp, #0] 80009fe: 460b mov r3, r1 8000a00: 2130 movs r1, #48 @ 0x30 8000a02: 2030 movs r0, #48 @ 0x30 8000a04: f7ff fc5f bl 80002c6 8000a08: 4603 mov r3, r0 8000a0a: 2b00 cmp r3, #0 8000a0c: d037 beq.n 8000a7e if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){ 8000a0e: 4b9c ldr r3, [pc, #624] @ (8000c80 ) 8000a10: 7918 ldrb r0, [r3, #4] 8000a12: 4b9b ldr r3, [pc, #620] @ (8000c80 ) 8000a14: 7959 ldrb r1, [r3, #5] 8000a16: 4b9a ldr r3, [pc, #616] @ (8000c80 ) 8000a18: 799a ldrb r2, [r3, #6] 8000a1a: 4b99 ldr r3, [pc, #612] @ (8000c80 ) 8000a1c: 79dc ldrb r4, [r3, #7] 8000a1e: f107 030a add.w r3, r7, #10 8000a22: 9300 str r3, [sp, #0] 8000a24: 4623 mov r3, r4 8000a26: f7ff fc4e bl 80002c6 8000a2a: 4603 mov r3, r0 8000a2c: 2b00 cmp r3, #0 8000a2e: d01f beq.n 8000a70 st=EEW_Write(eeadd, val); 8000a30: 893b ldrh r3, [r7, #8] 8000a32: b2db uxtb r3, r3 8000a34: 897a ldrh r2, [r7, #10] 8000a36: 4611 mov r1, r2 8000a38: 4618 mov r0, r3 8000a3a: f7ff fc2e bl 800029a 8000a3e: 4603 mov r3, r0 8000a40: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val); 8000a44: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000a48: 2b00 cmp r3, #0 8000a4a: d108 bne.n 8000a5e 8000a4c: 893b ldrh r3, [r7, #8] 8000a4e: 461a mov r2, r3 8000a50: 897b ldrh r3, [r7, #10] 8000a52: f107 000c add.w r0, r7, #12 8000a56: 498c ldr r1, [pc, #560] @ (8000c88 ) 8000a58: f00a fbf4 bl 800b244 8000a5c: e01c b.n 8000a98 else sprintf((char*)s,"\nee write error %d", st); 8000a5e: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000a62: f107 030c add.w r3, r7, #12 8000a66: 4989 ldr r1, [pc, #548] @ (8000c8c ) 8000a68: 4618 mov r0, r3 8000a6a: f00a fbeb bl 800b244 8000a6e: e013 b.n 8000a98 }else sprintf((char*)s,"\n?ewaavvvv hex values"); 8000a70: f107 030c add.w r3, r7, #12 8000a74: 4986 ldr r1, [pc, #536] @ (8000c90 ) 8000a76: 4618 mov r0, r3 8000a78: f00a fbe4 bl 800b244 8000a7c: e00c b.n 8000a98 }else sprintf((char*)s,"\n?ewaa hex values"); 8000a7e: f107 030c add.w r3, r7, #12 8000a82: 4984 ldr r1, [pc, #528] @ (8000c94 ) 8000a84: 4618 mov r0, r3 8000a86: f00a fbdd bl 800b244 8000a8a: e005 b.n 8000a98 }else sprintf((char*)s,"\n?ewaavvvv"); 8000a8c: f107 030c add.w r3, r7, #12 8000a90: 4981 ldr r1, [pc, #516] @ (8000c98 ) 8000a92: 4618 mov r0, r3 8000a94: f00a fbd6 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000a98: bf00 nop 8000a9a: f107 030c add.w r3, r7, #12 8000a9e: 4618 mov r0, r3 8000aa0: f7ff fb54 bl 800014c 8000aa4: 4603 mov r3, r0 8000aa6: b29a uxth r2, r3 8000aa8: f107 030c add.w r3, r7, #12 8000aac: 4611 mov r1, r2 8000aae: 4618 mov r0, r3 8000ab0: f009 ffea bl 800aa88 8000ab4: 4603 mov r3, r0 8000ab6: 2b01 cmp r3, #1 8000ab8: d0ef beq.n 8000a9a break; 8000aba: e0cf b.n 8000c5c }else if(rxbuf[1]=='d'){ 8000abc: 4b70 ldr r3, [pc, #448] @ (8000c80 ) 8000abe: 785b ldrb r3, [r3, #1] 8000ac0: 2b64 cmp r3, #100 @ 0x64 8000ac2: f040 808a bne.w 8000bda if(rxidx==2){ 8000ac6: 4b6f ldr r3, [pc, #444] @ (8000c84 ) 8000ac8: 781b ldrb r3, [r3, #0] 8000aca: 2b02 cmp r3, #2 8000acc: d16d bne.n 8000baa for(i=0;i<32;i++){ 8000ace: 2300 movs r3, #0 8000ad0: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000ad4: e046 b.n 8000b64 st=EEW_Read(i, &val); 8000ad6: f107 020a add.w r2, r7, #10 8000ada: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000ade: 4611 mov r1, r2 8000ae0: 4618 mov r0, r3 8000ae2: f7ff fbc7 bl 8000274 8000ae6: 4603 mov r3, r0 8000ae8: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK){ 8000aec: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000af0: 2b00 cmp r3, #0 8000af2: d119 bne.n 8000b28 sprintf((char*)s,"0x%02x=0x%04x ",i,val); 8000af4: f897 207e ldrb.w r2, [r7, #126] @ 0x7e 8000af8: 897b ldrh r3, [r7, #10] 8000afa: f107 000c add.w r0, r7, #12 8000afe: 4967 ldr r1, [pc, #412] @ (8000c9c ) 8000b00: f00a fba0 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b04: bf00 nop 8000b06: f107 030c add.w r3, r7, #12 8000b0a: 4618 mov r0, r3 8000b0c: f7ff fb1e bl 800014c 8000b10: 4603 mov r3, r0 8000b12: b29a uxth r2, r3 8000b14: f107 030c add.w r3, r7, #12 8000b18: 4611 mov r1, r2 8000b1a: 4618 mov r0, r3 8000b1c: f009 ffb4 bl 800aa88 8000b20: 4603 mov r3, r0 8000b22: 2b01 cmp r3, #1 8000b24: d0ef beq.n 8000b06 8000b26: e018 b.n 8000b5a sprintf((char*)s,"rderr %d ",st); 8000b28: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000b2c: f107 030c add.w r3, r7, #12 8000b30: 495b ldr r1, [pc, #364] @ (8000ca0 ) 8000b32: 4618 mov r0, r3 8000b34: f00a fb86 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b38: bf00 nop 8000b3a: f107 030c add.w r3, r7, #12 8000b3e: 4618 mov r0, r3 8000b40: f7ff fb04 bl 800014c 8000b44: 4603 mov r3, r0 8000b46: b29a uxth r2, r3 8000b48: f107 030c add.w r3, r7, #12 8000b4c: 4611 mov r1, r2 8000b4e: 4618 mov r0, r3 8000b50: f009 ff9a bl 800aa88 8000b54: 4603 mov r3, r0 8000b56: 2b01 cmp r3, #1 8000b58: d0ef beq.n 8000b3a for(i=0;i<32;i++){ 8000b5a: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b5e: 3301 adds r3, #1 8000b60: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000b64: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b68: 2b1f cmp r3, #31 8000b6a: d9b4 bls.n 8000ad6 if((i%4)==0){ 8000b6c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b70: f003 0303 and.w r3, r3, #3 8000b74: b2db uxtb r3, r3 8000b76: 2b00 cmp r3, #0 8000b78: d170 bne.n 8000c5c sprintf((char*)s,"\n"); 8000b7a: f107 030c add.w r3, r7, #12 8000b7e: 4949 ldr r1, [pc, #292] @ (8000ca4 ) 8000b80: 4618 mov r0, r3 8000b82: f00a fb5f bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b86: bf00 nop 8000b88: f107 030c add.w r3, r7, #12 8000b8c: 4618 mov r0, r3 8000b8e: f7ff fadd bl 800014c 8000b92: 4603 mov r3, r0 8000b94: b29a uxth r2, r3 8000b96: f107 030c add.w r3, r7, #12 8000b9a: 4611 mov r1, r2 8000b9c: 4618 mov r0, r3 8000b9e: f009 ff73 bl 800aa88 8000ba2: 4603 mov r3, r0 8000ba4: 2b01 cmp r3, #1 8000ba6: d0ef beq.n 8000b88 break; 8000ba8: e058 b.n 8000c5c sprintf((char*)s,"\n?ed"); 8000baa: f107 030c add.w r3, r7, #12 8000bae: 493e ldr r1, [pc, #248] @ (8000ca8 ) 8000bb0: 4618 mov r0, r3 8000bb2: f00a fb47 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000bb6: bf00 nop 8000bb8: f107 030c add.w r3, r7, #12 8000bbc: 4618 mov r0, r3 8000bbe: f7ff fac5 bl 800014c 8000bc2: 4603 mov r3, r0 8000bc4: b29a uxth r2, r3 8000bc6: f107 030c add.w r3, r7, #12 8000bca: 4611 mov r1, r2 8000bcc: 4618 mov r0, r3 8000bce: f009 ff5b bl 800aa88 8000bd2: 4603 mov r3, r0 8000bd4: 2b01 cmp r3, #1 8000bd6: d0ef beq.n 8000bb8 break; 8000bd8: e040 b.n 8000c5c sprintf((char*)s,"\n?er|w|d"); 8000bda: f107 030c add.w r3, r7, #12 8000bde: 4933 ldr r1, [pc, #204] @ (8000cac ) 8000be0: 4618 mov r0, r3 8000be2: f00a fb2f bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000be6: bf00 nop 8000be8: f107 030c add.w r3, r7, #12 8000bec: 4618 mov r0, r3 8000bee: f7ff faad bl 800014c 8000bf2: 4603 mov r3, r0 8000bf4: b29a uxth r2, r3 8000bf6: f107 030c add.w r3, r7, #12 8000bfa: 4611 mov r1, r2 8000bfc: 4618 mov r0, r3 8000bfe: f009 ff43 bl 800aa88 8000c02: 4603 mov r3, r0 8000c04: 2b01 cmp r3, #1 8000c06: d0ef beq.n 8000be8 break; 8000c08: e028 b.n 8000c5c sprintf((char*)s,"\n?eraa | ewaavvvv"); 8000c0a: f107 030c add.w r3, r7, #12 8000c0e: 4928 ldr r1, [pc, #160] @ (8000cb0 ) 8000c10: 4618 mov r0, r3 8000c12: f00a fb17 bl 800b244 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000c16: bf00 nop 8000c18: f107 030c add.w r3, r7, #12 8000c1c: 4618 mov r0, r3 8000c1e: f7ff fa95 bl 800014c 8000c22: 4603 mov r3, r0 8000c24: b29a uxth r2, r3 8000c26: f107 030c add.w r3, r7, #12 8000c2a: 4611 mov r1, r2 8000c2c: 4618 mov r0, r3 8000c2e: f009 ff2b bl 800aa88 8000c32: 4603 mov r3, r0 8000c34: 2b01 cmp r3, #1 8000c36: d0ef beq.n 8000c18 break; 8000c38: e010 b.n 8000c5c default: sprintf((char*)s,"\n?"); 8000c3a: f107 030c add.w r3, r7, #12 8000c3e: 491d ldr r1, [pc, #116] @ (8000cb4 ) 8000c40: 4618 mov r0, r3 8000c42: f00a faff bl 800b244 while (CDC_Transmit_FS(s, 2) == USBD_BUSY); 8000c46: bf00 nop 8000c48: f107 030c add.w r3, r7, #12 8000c4c: 2102 movs r1, #2 8000c4e: 4618 mov r0, r3 8000c50: f009 ff1a bl 800aa88 8000c54: 4603 mov r3, r0 8000c56: 2b01 cmp r3, #1 8000c58: d0f6 beq.n 8000c48 break; 8000c5a: e000 b.n 8000c5e break; 8000c5c: bf00 nop } } rxidx=0; 8000c5e: 4b09 ldr r3, [pc, #36] @ (8000c84 ) 8000c60: 2200 movs r2, #0 8000c62: 701a strb r2, [r3, #0] 8000c64: e007 b.n 8000c76 }else rxidx++; 8000c66: 4b07 ldr r3, [pc, #28] @ (8000c84 ) 8000c68: 781b ldrb r3, [r3, #0] 8000c6a: 3301 adds r3, #1 8000c6c: b2da uxtb r2, r3 8000c6e: 4b05 ldr r3, [pc, #20] @ (8000c84 ) 8000c70: 701a strb r2, [r3, #0] 8000c72: e000 b.n 8000c76 if (rx < 0) return; 8000c74: bf00 nop // tiny spin or yield } } 8000c76: 3784 adds r7, #132 @ 0x84 8000c78: 46bd mov sp, r7 8000c7a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8000c7e: bf00 nop 8000c80: 20000228 .word 0x20000228 8000c84: 20000224 .word 0x20000224 8000c88: 0800bcec .word 0x0800bcec 8000c8c: 0800bd00 .word 0x0800bd00 8000c90: 0800bd14 .word 0x0800bd14 8000c94: 0800bd2c .word 0x0800bd2c 8000c98: 0800bd40 .word 0x0800bd40 8000c9c: 0800bd4c .word 0x0800bd4c 8000ca0: 0800bd5c .word 0x0800bd5c 8000ca4: 0800bd68 .word 0x0800bd68 8000ca8: 0800bd6c .word 0x0800bd6c 8000cac: 0800bd74 .word 0x0800bd74 8000cb0: 0800bd80 .word 0x0800bd80 8000cb4: 0800bd94 .word 0x0800bd94 08000cb8 : /* ========================================================================= */ /* --- Internal helpers ---------------------------------------------------- */ static uint16_t EE_GetPageStatus(uint32_t pageBase) { 8000cb8: b480 push {r7} 8000cba: b083 sub sp, #12 8000cbc: af00 add r7, sp, #0 8000cbe: 6078 str r0, [r7, #4] return *(__IO uint16_t *)pageBase; 8000cc0: 687b ldr r3, [r7, #4] 8000cc2: 881b ldrh r3, [r3, #0] 8000cc4: b29b uxth r3, r3 } 8000cc6: 4618 mov r0, r3 8000cc8: 370c adds r7, #12 8000cca: 46bd mov sp, r7 8000ccc: bc80 pop {r7} 8000cce: 4770 bx lr 08000cd0 : static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data) { 8000cd0: b5b0 push {r4, r5, r7, lr} 8000cd2: b084 sub sp, #16 8000cd4: af00 add r7, sp, #0 8000cd6: 6078 str r0, [r7, #4] 8000cd8: 460b mov r3, r1 8000cda: 807b strh r3, [r7, #2] HAL_StatusTypeDef status; HAL_FLASH_Unlock(); 8000cdc: f002 f9c8 bl 8003070 status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data); 8000ce0: 887b ldrh r3, [r7, #2] 8000ce2: 2200 movs r2, #0 8000ce4: 461c mov r4, r3 8000ce6: 4615 mov r5, r2 8000ce8: 4622 mov r2, r4 8000cea: 462b mov r3, r5 8000cec: 6879 ldr r1, [r7, #4] 8000cee: 2001 movs r0, #1 8000cf0: f002 f94e bl 8002f90 8000cf4: 4603 mov r3, r0 8000cf6: 73fb strb r3, [r7, #15] HAL_FLASH_Lock(); 8000cf8: f002 f9e0 bl 80030bc return status; 8000cfc: 7bfb ldrb r3, [r7, #15] } 8000cfe: 4618 mov r0, r3 8000d00: 3710 adds r7, #16 8000d02: 46bd mov sp, r7 8000d04: bdb0 pop {r4, r5, r7, pc} 08000d06 : static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress) { 8000d06: b580 push {r7, lr} 8000d08: b088 sub sp, #32 8000d0a: af00 add r7, sp, #0 8000d0c: 6078 str r0, [r7, #4] HAL_StatusTypeDef status; FLASH_EraseInitTypeDef EraseInit; uint32_t PageError = 0; 8000d0e: 2300 movs r3, #0 8000d10: 60bb str r3, [r7, #8] HAL_FLASH_Unlock(); 8000d12: f002 f9ad bl 8003070 EraseInit.TypeErase = FLASH_TYPEERASE_PAGES; 8000d16: 2300 movs r3, #0 8000d18: 60fb str r3, [r7, #12] EraseInit.PageAddress = PageAddress; 8000d1a: 687b ldr r3, [r7, #4] 8000d1c: 617b str r3, [r7, #20] EraseInit.NbPages = 1; 8000d1e: 2301 movs r3, #1 8000d20: 61bb str r3, [r7, #24] status = HAL_FLASHEx_Erase(&EraseInit, &PageError); 8000d22: f107 0208 add.w r2, r7, #8 8000d26: f107 030c add.w r3, r7, #12 8000d2a: 4611 mov r1, r2 8000d2c: 4618 mov r0, r3 8000d2e: f002 fa87 bl 8003240 8000d32: 4603 mov r3, r0 8000d34: 77fb strb r3, [r7, #31] HAL_FLASH_Lock(); 8000d36: f002 f9c1 bl 80030bc return status; 8000d3a: 7ffb ldrb r3, [r7, #31] } 8000d3c: 4618 mov r0, r3 8000d3e: 3720 adds r7, #32 8000d40: 46bd mov sp, r7 8000d42: bd80 pop {r7, pc} 08000d44 : /* Find first free record address in given page (returns 0 if full) */ static uint32_t EE_FindFreeAddress(uint32_t pageBase) { 8000d44: b480 push {r7} 8000d46: b087 sub sp, #28 8000d48: af00 add r7, sp, #0 8000d4a: 6078 str r0, [r7, #4] uint32_t addr = pageBase + 2U; /* Skip status word */ 8000d4c: 687b ldr r3, [r7, #4] 8000d4e: 3302 adds r3, #2 8000d50: 617b str r3, [r7, #20] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8000d52: 687b ldr r3, [r7, #4] 8000d54: f503 6380 add.w r3, r3, #1024 @ 0x400 8000d58: 613b str r3, [r7, #16] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 8000d5a: e00c b.n 8000d76 { uint16_t vaddr = *(__IO uint16_t *)addr; 8000d5c: 697b ldr r3, [r7, #20] 8000d5e: 881b ldrh r3, [r3, #0] 8000d60: 81fb strh r3, [r7, #14] if (vaddr == 0xFFFFU) 8000d62: 89fb ldrh r3, [r7, #14] 8000d64: f64f 72ff movw r2, #65535 @ 0xffff 8000d68: 4293 cmp r3, r2 8000d6a: d101 bne.n 8000d70 { /* Empty slot */ return addr; 8000d6c: 697b ldr r3, [r7, #20] 8000d6e: e008 b.n 8000d82 } addr += sizeof(EE_Record_t); 8000d70: 697b ldr r3, [r7, #20] 8000d72: 3304 adds r3, #4 8000d74: 617b str r3, [r7, #20] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 8000d76: 693b ldr r3, [r7, #16] 8000d78: 3b03 subs r3, #3 8000d7a: 697a ldr r2, [r7, #20] 8000d7c: 429a cmp r2, r3 8000d7e: d3ed bcc.n 8000d5c } return 0U; /* No space */ 8000d80: 2300 movs r3, #0 } 8000d82: 4618 mov r0, r3 8000d84: 371c adds r7, #28 8000d86: 46bd mov sp, r7 8000d88: bc80 pop {r7} 8000d8a: 4770 bx lr 08000d8c : /* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */ /* Find latest value of VirtAddress in a specific page (scan forward) */ static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data) { 8000d8c: b480 push {r7} 8000d8e: b089 sub sp, #36 @ 0x24 8000d90: af00 add r7, sp, #0 8000d92: 60f8 str r0, [r7, #12] 8000d94: 460b mov r3, r1 8000d96: 607a str r2, [r7, #4] 8000d98: 817b strh r3, [r7, #10] uint32_t addr = pageBase + 2U; // skip status halfword 8000d9a: 68fb ldr r3, [r7, #12] 8000d9c: 3302 adds r3, #2 8000d9e: 61fb str r3, [r7, #28] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8000da0: 68fb ldr r3, [r7, #12] 8000da2: f503 6380 add.w r3, r3, #1024 @ 0x400 8000da6: 617b str r3, [r7, #20] EE_Status result = EE_NOT_FOUND; 8000da8: 2302 movs r3, #2 8000daa: 76fb strb r3, [r7, #27] uint16_t lastVal = 0; 8000dac: 2300 movs r3, #0 8000dae: 833b strh r3, [r7, #24] if (Data == NULL) 8000db0: 687b ldr r3, [r7, #4] 8000db2: 2b00 cmp r3, #0 8000db4: d118 bne.n 8000de8 return EE_ERROR; 8000db6: 2301 movs r3, #1 8000db8: e024 b.n 8000e04 while (addr <= (pageEnd - sizeof(EE_Record_t))) { uint16_t vaddr = *(__IO uint16_t *)addr; 8000dba: 69fb ldr r3, [r7, #28] 8000dbc: 881b ldrh r3, [r3, #0] 8000dbe: 827b strh r3, [r7, #18] if (vaddr == 0xFFFFU) 8000dc0: 8a7b ldrh r3, [r7, #18] 8000dc2: f64f 72ff movw r2, #65535 @ 0xffff 8000dc6: 4293 cmp r3, r2 8000dc8: d014 beq.n 8000df4 { // First empty slot => no more records in this page break; } uint16_t value = *(__IO uint16_t *)(addr + 2U); 8000dca: 69fb ldr r3, [r7, #28] 8000dcc: 3302 adds r3, #2 8000dce: 881b ldrh r3, [r3, #0] 8000dd0: 823b strh r3, [r7, #16] if (vaddr == VirtAddress) 8000dd2: 8a7a ldrh r2, [r7, #18] 8000dd4: 897b ldrh r3, [r7, #10] 8000dd6: 429a cmp r2, r3 8000dd8: d103 bne.n 8000de2 { lastVal = value; // keep most recent 8000dda: 8a3b ldrh r3, [r7, #16] 8000ddc: 833b strh r3, [r7, #24] result = EE_OK; 8000dde: 2300 movs r3, #0 8000de0: 76fb strb r3, [r7, #27] } addr += sizeof(EE_Record_t); // move 4 bytes forward 8000de2: 69fb ldr r3, [r7, #28] 8000de4: 3304 adds r3, #4 8000de6: 61fb str r3, [r7, #28] while (addr <= (pageEnd - sizeof(EE_Record_t))) 8000de8: 697b ldr r3, [r7, #20] 8000dea: 3b04 subs r3, #4 8000dec: 69fa ldr r2, [r7, #28] 8000dee: 429a cmp r2, r3 8000df0: d9e3 bls.n 8000dba 8000df2: e000 b.n 8000df6 break; 8000df4: bf00 nop } if (result == EE_OK) 8000df6: 7efb ldrb r3, [r7, #27] 8000df8: 2b00 cmp r3, #0 8000dfa: d102 bne.n 8000e02 *Data = lastVal; 8000dfc: 687b ldr r3, [r7, #4] 8000dfe: 8b3a ldrh r2, [r7, #24] 8000e00: 801a strh r2, [r3, #0] return result; 8000e02: 7efb ldrb r3, [r7, #27] } 8000e04: 4618 mov r0, r3 8000e06: 3724 adds r7, #36 @ 0x24 8000e08: 46bd mov sp, r7 8000e0a: bc80 pop {r7} 8000e0c: 4770 bx lr ... 08000e10 : /* Format both pages: erase and set PAGE0 as VALID */ static EE_Status EE_Format(void) { 8000e10: b580 push {r7, lr} 8000e12: af00 add r7, sp, #0 if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK) 8000e14: 480f ldr r0, [pc, #60] @ (8000e54 ) 8000e16: f7ff ff76 bl 8000d06 8000e1a: 4603 mov r3, r0 8000e1c: 2b00 cmp r3, #0 8000e1e: d001 beq.n 8000e24 return EE_STATUS_ERROR; 8000e20: 2301 movs r3, #1 8000e22: e015 b.n 8000e50 if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK) 8000e24: 480c ldr r0, [pc, #48] @ (8000e58 ) 8000e26: f7ff ff6e bl 8000d06 8000e2a: 4603 mov r3, r0 8000e2c: 2b00 cmp r3, #0 8000e2e: d001 beq.n 8000e34 return EE_STATUS_ERROR; 8000e30: 2301 movs r3, #1 8000e32: e00d b.n 8000e50 if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK) 8000e34: f64a 21aa movw r1, #43690 @ 0xaaaa 8000e38: 4806 ldr r0, [pc, #24] @ (8000e54 ) 8000e3a: f7ff ff49 bl 8000cd0 8000e3e: 4603 mov r3, r0 8000e40: 2b00 cmp r3, #0 8000e42: d001 beq.n 8000e48 return EE_STATUS_ERROR; 8000e44: 2301 movs r3, #1 8000e46: e003 b.n 8000e50 /* PAGE1 will remain erased (status = 0xFFFF) */ EE_ActivePageBase = EE_PAGE0_BASE; 8000e48: 4b04 ldr r3, [pc, #16] @ (8000e5c ) 8000e4a: 4a02 ldr r2, [pc, #8] @ (8000e54 ) 8000e4c: 601a str r2, [r3, #0] return EE_STATUS_OK; 8000e4e: 2300 movs r3, #0 } 8000e50: 4618 mov r0, r3 8000e52: bd80 pop {r7, pc} 8000e54: 0800f800 .word 0x0800f800 8000e58: 0800fc00 .word 0x0800fc00 8000e5c: 20000000 .word 0x20000000 08000e60 : /* Get the base of the other page */ static uint32_t EE_GetOtherPageBase(uint32_t pageBase) { 8000e60: b480 push {r7} 8000e62: b083 sub sp, #12 8000e64: af00 add r7, sp, #0 8000e66: 6078 str r0, [r7, #4] return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE; 8000e68: 687b ldr r3, [r7, #4] 8000e6a: 4a05 ldr r2, [pc, #20] @ (8000e80 ) 8000e6c: 4293 cmp r3, r2 8000e6e: d101 bne.n 8000e74 8000e70: 4b04 ldr r3, [pc, #16] @ (8000e84 ) 8000e72: e000 b.n 8000e76 8000e74: 4b02 ldr r3, [pc, #8] @ (8000e80 ) } 8000e76: 4618 mov r0, r3 8000e78: 370c adds r7, #12 8000e7a: 46bd mov sp, r7 8000e7c: bc80 pop {r7} 8000e7e: 4770 bx lr 8000e80: 0800f800 .word 0x0800f800 8000e84: 0800fc00 .word 0x0800fc00 08000e88 : /* Page transfer (garbage collection + new write) */ static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data) { 8000e88: b580 push {r7, lr} 8000e8a: b088 sub sp, #32 8000e8c: af00 add r7, sp, #0 8000e8e: 4603 mov r3, r0 8000e90: 460a mov r2, r1 8000e92: 80fb strh r3, [r7, #6] 8000e94: 4613 mov r3, r2 8000e96: 80bb strh r3, [r7, #4] uint32_t oldBase = EE_ActivePageBase; 8000e98: 4b3c ldr r3, [pc, #240] @ (8000f8c ) 8000e9a: 681b ldr r3, [r3, #0] 8000e9c: 617b str r3, [r7, #20] uint32_t newBase = EE_GetOtherPageBase(oldBase); 8000e9e: 6978 ldr r0, [r7, #20] 8000ea0: f7ff ffde bl 8000e60 8000ea4: 6138 str r0, [r7, #16] uint32_t addr; uint16_t value; EE_Status st; /* Erase new page */ if (EE_FlashErasePage(newBase) != HAL_OK) 8000ea6: 6938 ldr r0, [r7, #16] 8000ea8: f7ff ff2d bl 8000d06 8000eac: 4603 mov r3, r0 8000eae: 2b00 cmp r3, #0 8000eb0: d001 beq.n 8000eb6 return EE_STATUS_ERROR; 8000eb2: 2301 movs r3, #1 8000eb4: e065 b.n 8000f82 /* Mark new page as RECEIVE */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK) 8000eb6: f245 5155 movw r1, #21845 @ 0x5555 8000eba: 6938 ldr r0, [r7, #16] 8000ebc: f7ff ff08 bl 8000cd0 8000ec0: 4603 mov r3, r0 8000ec2: 2b00 cmp r3, #0 8000ec4: d001 beq.n 8000eca return EE_STATUS_ERROR; 8000ec6: 2301 movs r3, #1 8000ec8: e05b b.n 8000f82 /* Start writing records just after status */ addr = newBase + 2U; 8000eca: 693b ldr r3, [r7, #16] 8000ecc: 3302 adds r3, #2 8000ece: 61fb str r3, [r7, #28] /* For each known virtual variable */ for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 8000ed0: 2300 movs r3, #0 8000ed2: 837b strh r3, [r7, #26] 8000ed4: e03c b.n 8000f50 { uint16_t vaddr = EE_VirtAddrs[i]; 8000ed6: 8b7b ldrh r3, [r7, #26] 8000ed8: 4a2d ldr r2, [pc, #180] @ (8000f90 ) 8000eda: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 8000ede: 81fb strh r3, [r7, #14] if (vaddr == VirtAddress) 8000ee0: 89fa ldrh r2, [r7, #14] 8000ee2: 88fb ldrh r3, [r7, #6] 8000ee4: 429a cmp r2, r3 8000ee6: d102 bne.n 8000eee { /* Use the new data passed into PageTransfer */ value = Data; 8000ee8: 88bb ldrh r3, [r7, #4] 8000eea: 817b strh r3, [r7, #10] 8000eec: e00b b.n 8000f06 } else { /* Read latest value from old active page */ st = EE_FindInPage(oldBase, vaddr, &value); 8000eee: f107 020a add.w r2, r7, #10 8000ef2: 89fb ldrh r3, [r7, #14] 8000ef4: 4619 mov r1, r3 8000ef6: 6978 ldr r0, [r7, #20] 8000ef8: f7ff ff48 bl 8000d8c 8000efc: 4603 mov r3, r0 8000efe: 737b strb r3, [r7, #13] if (st != EE_STATUS_OK) 8000f00: 7b7b ldrb r3, [r7, #13] 8000f02: 2b00 cmp r3, #0 8000f04: d120 bne.n 8000f48 continue; } } /* Write record to new page */ if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK) 8000f06: 89fb ldrh r3, [r7, #14] 8000f08: 4619 mov r1, r3 8000f0a: 69f8 ldr r0, [r7, #28] 8000f0c: f7ff fee0 bl 8000cd0 8000f10: 4603 mov r3, r0 8000f12: 2b00 cmp r3, #0 8000f14: d001 beq.n 8000f1a return EE_STATUS_ERROR; 8000f16: 2301 movs r3, #1 8000f18: e033 b.n 8000f82 if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK) 8000f1a: 69fb ldr r3, [r7, #28] 8000f1c: 3302 adds r3, #2 8000f1e: 897a ldrh r2, [r7, #10] 8000f20: 4611 mov r1, r2 8000f22: 4618 mov r0, r3 8000f24: f7ff fed4 bl 8000cd0 8000f28: 4603 mov r3, r0 8000f2a: 2b00 cmp r3, #0 8000f2c: d001 beq.n 8000f32 return EE_STATUS_ERROR; 8000f2e: 2301 movs r3, #1 8000f30: e027 b.n 8000f82 addr += sizeof(EE_Record_t); 8000f32: 69fb ldr r3, [r7, #28] 8000f34: 3304 adds r3, #4 8000f36: 61fb str r3, [r7, #28] if (addr >= (newBase + EE_PAGE_SIZE)) 8000f38: 693b ldr r3, [r7, #16] 8000f3a: f503 6380 add.w r3, r3, #1024 @ 0x400 8000f3e: 69fa ldr r2, [r7, #28] 8000f40: 429a cmp r2, r3 8000f42: d302 bcc.n 8000f4a return EE_STATUS_NO_SPACE; 8000f44: 2303 movs r3, #3 8000f46: e01c b.n 8000f82 continue; 8000f48: bf00 nop for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 8000f4a: 8b7b ldrh r3, [r7, #26] 8000f4c: 3301 adds r3, #1 8000f4e: 837b strh r3, [r7, #26] 8000f50: 8b7b ldrh r3, [r7, #26] 8000f52: 2b1f cmp r3, #31 8000f54: d9bf bls.n 8000ed6 } /* Erase old page */ if (EE_FlashErasePage(oldBase) != HAL_OK) 8000f56: 6978 ldr r0, [r7, #20] 8000f58: f7ff fed5 bl 8000d06 8000f5c: 4603 mov r3, r0 8000f5e: 2b00 cmp r3, #0 8000f60: d001 beq.n 8000f66 return EE_STATUS_ERROR; 8000f62: 2301 movs r3, #1 8000f64: e00d b.n 8000f82 /* Mark new page as VALID */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK) 8000f66: f64a 21aa movw r1, #43690 @ 0xaaaa 8000f6a: 6938 ldr r0, [r7, #16] 8000f6c: f7ff feb0 bl 8000cd0 8000f70: 4603 mov r3, r0 8000f72: 2b00 cmp r3, #0 8000f74: d001 beq.n 8000f7a return EE_STATUS_ERROR; 8000f76: 2301 movs r3, #1 8000f78: e003 b.n 8000f82 /* Update active page */ EE_ActivePageBase = newBase; 8000f7a: 4a04 ldr r2, [pc, #16] @ (8000f8c ) 8000f7c: 693b ldr r3, [r7, #16] 8000f7e: 6013 str r3, [r2, #0] return EE_STATUS_OK; 8000f80: 2300 movs r3, #0 } 8000f82: 4618 mov r0, r3 8000f84: 3720 adds r7, #32 8000f86: 46bd mov sp, r7 8000f88: bd80 pop {r7, pc} 8000f8a: bf00 nop 8000f8c: 20000000 .word 0x20000000 8000f90: 0800bde8 .word 0x0800bde8 08000f94 : * - Checks page statuses and chooses the active page. * - If inconsistent or blank, formats pages. * PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...) */ uint16_t EE_Init(void) { 8000f94: b580 push {r7, lr} 8000f96: b082 sub sp, #8 8000f98: af00 add r7, sp, #0 uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE); 8000f9a: 481e ldr r0, [pc, #120] @ (8001014 ) 8000f9c: f7ff fe8c bl 8000cb8 8000fa0: 4603 mov r3, r0 8000fa2: 80fb strh r3, [r7, #6] uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE); 8000fa4: 481c ldr r0, [pc, #112] @ (8001018 ) 8000fa6: f7ff fe87 bl 8000cb8 8000faa: 4603 mov r3, r0 8000fac: 80bb strh r3, [r7, #4] if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED)) 8000fae: 88fb ldrh r3, [r7, #6] 8000fb0: f64f 72ff movw r2, #65535 @ 0xffff 8000fb4: 4293 cmp r3, r2 8000fb6: d108 bne.n 8000fca 8000fb8: 88bb ldrh r3, [r7, #4] 8000fba: f64f 72ff movw r2, #65535 @ 0xffff 8000fbe: 4293 cmp r3, r2 8000fc0: d103 bne.n 8000fca { /* Fresh device -> format */ return (uint16_t)EE_Format(); 8000fc2: f7ff ff25 bl 8000e10 8000fc6: 4603 mov r3, r0 8000fc8: e020 b.n 800100c } else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED)) 8000fca: 88fb ldrh r3, [r7, #6] 8000fcc: f64a 22aa movw r2, #43690 @ 0xaaaa 8000fd0: 4293 cmp r3, r2 8000fd2: d109 bne.n 8000fe8 8000fd4: 88bb ldrh r3, [r7, #4] 8000fd6: f64f 72ff movw r2, #65535 @ 0xffff 8000fda: 4293 cmp r3, r2 8000fdc: d104 bne.n 8000fe8 { EE_ActivePageBase = EE_PAGE0_BASE; 8000fde: 4b0f ldr r3, [pc, #60] @ (800101c ) 8000fe0: 4a0c ldr r2, [pc, #48] @ (8001014 ) 8000fe2: 601a str r2, [r3, #0] return EE_OK; 8000fe4: 2300 movs r3, #0 8000fe6: e011 b.n 800100c } else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED)) 8000fe8: 88bb ldrh r3, [r7, #4] 8000fea: f64a 22aa movw r2, #43690 @ 0xaaaa 8000fee: 4293 cmp r3, r2 8000ff0: d109 bne.n 8001006 8000ff2: 88fb ldrh r3, [r7, #6] 8000ff4: f64f 72ff movw r2, #65535 @ 0xffff 8000ff8: 4293 cmp r3, r2 8000ffa: d104 bne.n 8001006 { EE_ActivePageBase = EE_PAGE1_BASE; 8000ffc: 4b07 ldr r3, [pc, #28] @ (800101c ) 8000ffe: 4a06 ldr r2, [pc, #24] @ (8001018 ) 8001000: 601a str r2, [r3, #0] return EE_OK; 8001002: 2300 movs r3, #0 8001004: e002 b.n 800100c } else { /* Any weird or inconsistent state -> reformat */ return (uint16_t)EE_Format(); 8001006: f7ff ff03 bl 8000e10 800100a: 4603 mov r3, r0 } } 800100c: 4618 mov r0, r3 800100e: 3708 adds r7, #8 8001010: 46bd mov sp, r7 8001012: bd80 pop {r7, pc} 8001014: 0800f800 .word 0x0800f800 8001018: 0800fc00 .word 0x0800fc00 800101c: 20000000 .word 0x20000000 08001020 : /* * Read a 16-bit variable by its virtual address. * PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t) */ uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data) { 8001020: b580 push {r7, lr} 8001022: b084 sub sp, #16 8001024: af00 add r7, sp, #0 8001026: 4603 mov r3, r0 8001028: 6039 str r1, [r7, #0] 800102a: 80fb strh r3, [r7, #6] EE_Status st; if (Data == NULL) 800102c: 683b ldr r3, [r7, #0] 800102e: 2b00 cmp r3, #0 8001030: d101 bne.n 8001036 return EE_ERROR; 8001032: 2301 movs r3, #1 8001034: e00a b.n 800104c st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data); 8001036: 4b07 ldr r3, [pc, #28] @ (8001054 ) 8001038: 681b ldr r3, [r3, #0] 800103a: 88f9 ldrh r1, [r7, #6] 800103c: 683a ldr r2, [r7, #0] 800103e: 4618 mov r0, r3 8001040: f7ff fea4 bl 8000d8c 8001044: 4603 mov r3, r0 8001046: 73fb strb r3, [r7, #15] return (uint16_t)st; 8001048: 7bfb ldrb r3, [r7, #15] 800104a: b29b uxth r3, r3 } 800104c: 4618 mov r0, r3 800104e: 3710 adds r7, #16 8001050: 46bd mov sp, r7 8001052: bd80 pop {r7, pc} 8001054: 20000000 .word 0x20000000 08001058 : * - Writes a new record in the active page. * - If the page is full, triggers a page transfer (GC). * PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t) */ uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data) { 8001058: b580 push {r7, lr} 800105a: b084 sub sp, #16 800105c: af00 add r7, sp, #0 800105e: 4603 mov r3, r0 8001060: 460a mov r2, r1 8001062: 80fb strh r3, [r7, #6] 8001064: 4613 mov r3, r2 8001066: 80bb strh r3, [r7, #4] uint32_t freeAddr; EE_Status st; /* Find free space in active page */ freeAddr = EE_FindFreeAddress(EE_ActivePageBase); 8001068: 4b17 ldr r3, [pc, #92] @ (80010c8 ) 800106a: 681b ldr r3, [r3, #0] 800106c: 4618 mov r0, r3 800106e: f7ff fe69 bl 8000d44 8001072: 60f8 str r0, [r7, #12] if (freeAddr != 0U) 8001074: 68fb ldr r3, [r7, #12] 8001076: 2b00 cmp r3, #0 8001078: d017 beq.n 80010aa { /* Write new record */ if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK) 800107a: 88fb ldrh r3, [r7, #6] 800107c: 4619 mov r1, r3 800107e: 68f8 ldr r0, [r7, #12] 8001080: f7ff fe26 bl 8000cd0 8001084: 4603 mov r3, r0 8001086: 2b00 cmp r3, #0 8001088: d001 beq.n 800108e return EE_ERROR; 800108a: 2301 movs r3, #1 800108c: e017 b.n 80010be if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK) 800108e: 68fb ldr r3, [r7, #12] 8001090: 3302 adds r3, #2 8001092: 88ba ldrh r2, [r7, #4] 8001094: 4611 mov r1, r2 8001096: 4618 mov r0, r3 8001098: f7ff fe1a bl 8000cd0 800109c: 4603 mov r3, r0 800109e: 2b00 cmp r3, #0 80010a0: d001 beq.n 80010a6 return EE_ERROR; 80010a2: 2301 movs r3, #1 80010a4: e00b b.n 80010be return EE_OK; 80010a6: 2300 movs r3, #0 80010a8: e009 b.n 80010be } /* No space -> page transfer */ st = EE_PageTransfer(VirtAddress, Data); 80010aa: 88ba ldrh r2, [r7, #4] 80010ac: 88fb ldrh r3, [r7, #6] 80010ae: 4611 mov r1, r2 80010b0: 4618 mov r0, r3 80010b2: f7ff fee9 bl 8000e88 80010b6: 4603 mov r3, r0 80010b8: 72fb strb r3, [r7, #11] return (uint16_t)st; 80010ba: 7afb ldrb r3, [r7, #11] 80010bc: b29b uxth r3, r3 } 80010be: 4618 mov r0, r3 80010c0: 3710 adds r7, #16 80010c2: 46bd mov sp, r7 80010c4: bd80 pop {r7, pc} 80010c6: bf00 nop 80010c8: 20000000 .word 0x20000000 080010cc : /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_SYSTICK_Callback(void){ 80010cc: b580 push {r7, lr} 80010ce: af00 add r7, sp, #0 static uint8_t c100ms = 0; static uint8_t c1s = 0; static uint8_t inidx=0; static uint8_t inbuf[4]; if (++c10ms >= 10) { // 10 ms 80010d0: 4b53 ldr r3, [pc, #332] @ (8001220 ) 80010d2: 781b ldrb r3, [r3, #0] 80010d4: 3301 adds r3, #1 80010d6: b2da uxtb r2, r3 80010d8: 4b51 ldr r3, [pc, #324] @ (8001220 ) 80010da: 701a strb r2, [r3, #0] 80010dc: 4b50 ldr r3, [pc, #320] @ (8001220 ) 80010de: 781b ldrb r3, [r3, #0] 80010e0: 2b09 cmp r3, #9 80010e2: f240 809b bls.w 800121c c10ms = 0; 80010e6: 4b4e ldr r3, [pc, #312] @ (8001220 ) 80010e8: 2200 movs r2, #0 80010ea: 701a strb r2, [r3, #0] //**** legge i tasti******************************************************************************** inidx++; 80010ec: 4b4d ldr r3, [pc, #308] @ (8001224 ) 80010ee: 781b ldrb r3, [r3, #0] 80010f0: 3301 adds r3, #1 80010f2: b2da uxtb r2, r3 80010f4: 4b4b ldr r3, [pc, #300] @ (8001224 ) 80010f6: 701a strb r2, [r3, #0] inidx&=0x03; 80010f8: 4b4a ldr r3, [pc, #296] @ (8001224 ) 80010fa: 781b ldrb r3, [r3, #0] 80010fc: f003 0303 and.w r3, r3, #3 8001100: b2da uxtb r2, r3 8001102: 4b48 ldr r3, [pc, #288] @ (8001224 ) 8001104: 701a strb r2, [r3, #0] if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_SET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1); 8001106: f44f 4180 mov.w r1, #16384 @ 0x4000 800110a: 4847 ldr r0, [pc, #284] @ (8001228 ) 800110c: f002 fac4 bl 8003698 8001110: 4603 mov r3, r0 8001112: 2b01 cmp r3, #1 8001114: d10c bne.n 8001130 8001116: 4b43 ldr r3, [pc, #268] @ (8001224 ) 8001118: 781b ldrb r3, [r3, #0] 800111a: 461a mov r2, r3 800111c: 4b43 ldr r3, [pc, #268] @ (800122c ) 800111e: 5c9b ldrb r3, [r3, r2] 8001120: 4a40 ldr r2, [pc, #256] @ (8001224 ) 8001122: 7812 ldrb r2, [r2, #0] 8001124: f043 0301 orr.w r3, r3, #1 8001128: b2d9 uxtb r1, r3 800112a: 4b40 ldr r3, [pc, #256] @ (800122c ) 800112c: 5499 strb r1, [r3, r2] 800112e: e00b b.n 8001148 8001130: 4b3c ldr r3, [pc, #240] @ (8001224 ) 8001132: 781b ldrb r3, [r3, #0] 8001134: 461a mov r2, r3 8001136: 4b3d ldr r3, [pc, #244] @ (800122c ) 8001138: 5c9b ldrb r3, [r3, r2] 800113a: 4a3a ldr r2, [pc, #232] @ (8001224 ) 800113c: 7812 ldrb r2, [r2, #0] 800113e: f023 0301 bic.w r3, r3, #1 8001142: b2d9 uxtb r1, r3 8001144: 4b39 ldr r3, [pc, #228] @ (800122c ) 8001146: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_SET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2); 8001148: f44f 4100 mov.w r1, #32768 @ 0x8000 800114c: 4836 ldr r0, [pc, #216] @ (8001228 ) 800114e: f002 faa3 bl 8003698 8001152: 4603 mov r3, r0 8001154: 2b01 cmp r3, #1 8001156: d10c bne.n 8001172 8001158: 4b32 ldr r3, [pc, #200] @ (8001224 ) 800115a: 781b ldrb r3, [r3, #0] 800115c: 461a mov r2, r3 800115e: 4b33 ldr r3, [pc, #204] @ (800122c ) 8001160: 5c9b ldrb r3, [r3, r2] 8001162: 4a30 ldr r2, [pc, #192] @ (8001224 ) 8001164: 7812 ldrb r2, [r2, #0] 8001166: f043 0302 orr.w r3, r3, #2 800116a: b2d9 uxtb r1, r3 800116c: 4b2f ldr r3, [pc, #188] @ (800122c ) 800116e: 5499 strb r1, [r3, r2] 8001170: e00b b.n 800118a 8001172: 4b2c ldr r3, [pc, #176] @ (8001224 ) 8001174: 781b ldrb r3, [r3, #0] 8001176: 461a mov r2, r3 8001178: 4b2c ldr r3, [pc, #176] @ (800122c ) 800117a: 5c9b ldrb r3, [r3, r2] 800117c: 4a29 ldr r2, [pc, #164] @ (8001224 ) 800117e: 7812 ldrb r2, [r2, #0] 8001180: f023 0302 bic.w r3, r3, #2 8001184: b2d9 uxtb r1, r3 8001186: 4b29 ldr r3, [pc, #164] @ (800122c ) 8001188: 5499 strb r1, [r3, r2] pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]); 800118a: 4b28 ldr r3, [pc, #160] @ (800122c ) 800118c: 781a ldrb r2, [r3, #0] 800118e: 4b27 ldr r3, [pc, #156] @ (800122c ) 8001190: 785b ldrb r3, [r3, #1] 8001192: 4013 ands r3, r2 8001194: b2da uxtb r2, r3 8001196: 4b25 ldr r3, [pc, #148] @ (800122c ) 8001198: 789b ldrb r3, [r3, #2] 800119a: 4013 ands r3, r2 800119c: b2da uxtb r2, r3 800119e: 4b23 ldr r3, [pc, #140] @ (800122c ) 80011a0: 78db ldrb r3, [r3, #3] 80011a2: 4013 ands r3, r2 80011a4: b2da uxtb r2, r3 80011a6: 4b22 ldr r3, [pc, #136] @ (8001230 ) 80011a8: 781b ldrb r3, [r3, #0] 80011aa: 4313 orrs r3, r2 80011ac: b2da uxtb r2, r3 80011ae: 4b20 ldr r3, [pc, #128] @ (8001230 ) 80011b0: 701a strb r2, [r3, #0] pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]); 80011b2: 4b1e ldr r3, [pc, #120] @ (800122c ) 80011b4: 781a ldrb r2, [r3, #0] 80011b6: 4b1d ldr r3, [pc, #116] @ (800122c ) 80011b8: 785b ldrb r3, [r3, #1] 80011ba: 4313 orrs r3, r2 80011bc: b2da uxtb r2, r3 80011be: 4b1b ldr r3, [pc, #108] @ (800122c ) 80011c0: 789b ldrb r3, [r3, #2] 80011c2: 4313 orrs r3, r2 80011c4: b2da uxtb r2, r3 80011c6: 4b19 ldr r3, [pc, #100] @ (800122c ) 80011c8: 78db ldrb r3, [r3, #3] 80011ca: 4313 orrs r3, r2 80011cc: b2da uxtb r2, r3 80011ce: 4b18 ldr r3, [pc, #96] @ (8001230 ) 80011d0: 781b ldrb r3, [r3, #0] 80011d2: 4013 ands r3, r2 80011d4: b2da uxtb r2, r3 80011d6: 4b16 ldr r3, [pc, #88] @ (8001230 ) 80011d8: 701a strb r2, [r3, #0] //**** legge adc *********************************************************************************** readAdc(); 80011da: f7fe fff5 bl 80001c8 if (++c100ms >= 10) { // 10 ms 80011de: 4b15 ldr r3, [pc, #84] @ (8001234 ) 80011e0: 781b ldrb r3, [r3, #0] 80011e2: 3301 adds r3, #1 80011e4: b2da uxtb r2, r3 80011e6: 4b13 ldr r3, [pc, #76] @ (8001234 ) 80011e8: 701a strb r2, [r3, #0] 80011ea: 4b12 ldr r3, [pc, #72] @ (8001234 ) 80011ec: 781b ldrb r3, [r3, #0] 80011ee: 2b09 cmp r3, #9 80011f0: d914 bls.n 800121c c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop 80011f2: 4b10 ldr r3, [pc, #64] @ (8001234 ) 80011f4: 2200 movs r2, #0 80011f6: 701a strb r2, [r3, #0] if (++c1s >= 10) { // 10 ms 80011f8: 4b0f ldr r3, [pc, #60] @ (8001238 ) 80011fa: 781b ldrb r3, [r3, #0] 80011fc: 3301 adds r3, #1 80011fe: b2da uxtb r2, r3 8001200: 4b0d ldr r3, [pc, #52] @ (8001238 ) 8001202: 701a strb r2, [r3, #0] 8001204: 4b0c ldr r3, [pc, #48] @ (8001238 ) 8001206: 781b ldrb r3, [r3, #0] 8001208: 2b09 cmp r3, #9 800120a: d907 bls.n 800121c c1s = 0; 800120c: 4b0a ldr r3, [pc, #40] @ (8001238 ) 800120e: 2200 movs r2, #0 8001210: 701a strb r2, [r3, #0] HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13); 8001212: f44f 5100 mov.w r1, #8192 @ 0x2000 8001216: 4804 ldr r0, [pc, #16] @ (8001228 ) 8001218: f002 fa6d bl 80036f6 } } } } 800121c: bf00 nop 800121e: bd80 pop {r7, pc} 8001220: 200003d9 .word 0x200003d9 8001224: 200003da .word 0x200003da 8001228: 40011000 .word 0x40011000 800122c: 200003dc .word 0x200003dc 8001230: 200003d8 .word 0x200003d8 8001234: 200003e0 .word 0x200003e0 8001238: 200003e1 .word 0x200003e1 0800123c
: /** * @brief The application entry point. * @retval int */ int main(void) { 800123c: b580 push {r7, lr} 800123e: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8001240: f000 ff76 bl 8002130 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8001244: f000 f852 bl 80012ec /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8001248: f000 fab4 bl 80017b4 MX_DMA_Init(); 800124c: f000 fa94 bl 8001778 MX_USB_DEVICE_Init(); 8001250: f009 fade bl 800a810 MX_TIM2_Init(); 8001254: f000 f920 bl 8001498 MX_TIM4_Init(); 8001258: f000 f9c2 bl 80015e0 MX_ADC1_Init(); 800125c: f000 f8a4 bl 80013a8 MX_USART1_UART_Init(); 8001260: f000 fa60 bl 8001724 /* USER CODE BEGIN 2 */ HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS); 8001264: 2205 movs r2, #5 8001266: 491c ldr r1, [pc, #112] @ (80012d8 ) 8001268: 481c ldr r0, [pc, #112] @ (80012dc ) 800126a: f001 f89b bl 80023a4 StopMot(timMot1,FWMot1); 800126e: 2100 movs r1, #0 8001270: 481b ldr r0, [pc, #108] @ (80012e0 ) 8001272: f000 fb64 bl 800193e StopMot(timMot1,BWMot1); 8001276: 2104 movs r1, #4 8001278: 4819 ldr r0, [pc, #100] @ (80012e0 ) 800127a: f000 fb60 bl 800193e StopMot(timMot2,FWMot2); 800127e: 2108 movs r1, #8 8001280: 4817 ldr r0, [pc, #92] @ (80012e0 ) 8001282: f000 fb5c bl 800193e StopMot(timMot2,BWMot2); 8001286: 210c movs r1, #12 8001288: 4815 ldr r0, [pc, #84] @ (80012e0 ) 800128a: f000 fb58 bl 800193e StopMot(timMot3,FWMot3); 800128e: 2100 movs r1, #0 8001290: 4814 ldr r0, [pc, #80] @ (80012e4 ) 8001292: f000 fb54 bl 800193e StopMot(timMot3,BWMot3); 8001296: 2104 movs r1, #4 8001298: 4812 ldr r0, [pc, #72] @ (80012e4 ) 800129a: f000 fb50 bl 800193e StopMot(timMot4,FWMot4); 800129e: 2108 movs r1, #8 80012a0: 4810 ldr r0, [pc, #64] @ (80012e4 ) 80012a2: f000 fb4c bl 800193e StopMot(timMot4,BWMot4); 80012a6: 210c movs r1, #12 80012a8: 480e ldr r0, [pc, #56] @ (80012e4 ) 80012aa: f000 fb48 bl 800193e //CDC_Transmit_FS((uint8_t*)"Start\r\n", 7); while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY); 80012ae: bf00 nop 80012b0: 2107 movs r1, #7 80012b2: 480d ldr r0, [pc, #52] @ (80012e8 ) 80012b4: f009 fbe8 bl 800aa88 80012b8: 4603 mov r3, r0 80012ba: 2b01 cmp r3, #1 80012bc: d0f8 beq.n 80012b0 if (EE_Init() != EE_OK){ 80012be: f7ff fe69 bl 8000f94 80012c2: 4603 mov r3, r0 80012c4: 2b00 cmp r3, #0 80012c6: d001 beq.n 80012cc for(;;);//errore eeprom 80012c8: bf00 nop 80012ca: e7fd b.n 80012c8 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1){ manageCDC(); 80012cc: f7ff f896 bl 80003fc manageAdc(); 80012d0: f7fe ff44 bl 800015c manageCDC(); 80012d4: e7fa b.n 80012cc 80012d6: bf00 nop 80012d8: 200001ec .word 0x200001ec 80012dc: 2000028c .word 0x2000028c 80012e0: 20000300 .word 0x20000300 80012e4: 20000348 .word 0x20000348 80012e8: 0800bd98 .word 0x0800bd98 080012ec : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80012ec: b580 push {r7, lr} 80012ee: b094 sub sp, #80 @ 0x50 80012f0: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 80012f2: f107 0328 add.w r3, r7, #40 @ 0x28 80012f6: 2228 movs r2, #40 @ 0x28 80012f8: 2100 movs r1, #0 80012fa: 4618 mov r0, r3 80012fc: f009 ffc4 bl 800b288 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001300: f107 0314 add.w r3, r7, #20 8001304: 2200 movs r2, #0 8001306: 601a str r2, [r3, #0] 8001308: 605a str r2, [r3, #4] 800130a: 609a str r2, [r3, #8] 800130c: 60da str r2, [r3, #12] 800130e: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8001310: 1d3b adds r3, r7, #4 8001312: 2200 movs r2, #0 8001314: 601a str r2, [r3, #0] 8001316: 605a str r2, [r3, #4] 8001318: 609a str r2, [r3, #8] 800131a: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 800131c: 2301 movs r3, #1 800131e: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8001320: f44f 3380 mov.w r3, #65536 @ 0x10000 8001324: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 8001326: 2300 movs r3, #0 8001328: 633b str r3, [r7, #48] @ 0x30 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 800132a: 2301 movs r3, #1 800132c: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 800132e: 2302 movs r3, #2 8001330: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8001332: f44f 3380 mov.w r3, #65536 @ 0x10000 8001336: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 8001338: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000 800133c: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800133e: f107 0328 add.w r3, r7, #40 @ 0x28 8001342: 4618 mov r0, r3 8001344: f003 ff50 bl 80051e8 8001348: 4603 mov r3, r0 800134a: 2b00 cmp r3, #0 800134c: d001 beq.n 8001352 { Error_Handler(); 800134e: f000 fadb bl 8001908 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001352: 230f movs r3, #15 8001354: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001356: 2302 movs r3, #2 8001358: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800135a: 2300 movs r3, #0 800135c: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 800135e: f44f 6380 mov.w r3, #1024 @ 0x400 8001362: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001364: 2300 movs r3, #0 8001366: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001368: f107 0314 add.w r3, r7, #20 800136c: 2102 movs r1, #2 800136e: 4618 mov r0, r3 8001370: f004 f9bc bl 80056ec 8001374: 4603 mov r3, r0 8001376: 2b00 cmp r3, #0 8001378: d001 beq.n 800137e { Error_Handler(); 800137a: f000 fac5 bl 8001908 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB; 800137e: 2312 movs r3, #18 8001380: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 8001382: f44f 4300 mov.w r3, #32768 @ 0x8000 8001386: 60fb str r3, [r7, #12] PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; 8001388: 2300 movs r3, #0 800138a: 613b str r3, [r7, #16] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 800138c: 1d3b adds r3, r7, #4 800138e: 4618 mov r0, r3 8001390: f004 fb3a bl 8005a08 8001394: 4603 mov r3, r0 8001396: 2b00 cmp r3, #0 8001398: d001 beq.n 800139e { Error_Handler(); 800139a: f000 fab5 bl 8001908 } } 800139e: bf00 nop 80013a0: 3750 adds r7, #80 @ 0x50 80013a2: 46bd mov sp, r7 80013a4: bd80 pop {r7, pc} ... 080013a8 : * @brief ADC1 Initialization Function * @param None * @retval None */ static void MX_ADC1_Init(void) { 80013a8: b580 push {r7, lr} 80013aa: b084 sub sp, #16 80013ac: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 80013ae: 1d3b adds r3, r7, #4 80013b0: 2200 movs r2, #0 80013b2: 601a str r2, [r3, #0] 80013b4: 605a str r2, [r3, #4] 80013b6: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 80013b8: 4b35 ldr r3, [pc, #212] @ (8001490 ) 80013ba: 4a36 ldr r2, [pc, #216] @ (8001494 ) 80013bc: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 80013be: 4b34 ldr r3, [pc, #208] @ (8001490 ) 80013c0: f44f 7280 mov.w r2, #256 @ 0x100 80013c4: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; 80013c6: 4b32 ldr r3, [pc, #200] @ (8001490 ) 80013c8: 2201 movs r2, #1 80013ca: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 80013cc: 4b30 ldr r3, [pc, #192] @ (8001490 ) 80013ce: 2200 movs r2, #0 80013d0: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 80013d2: 4b2f ldr r3, [pc, #188] @ (8001490 ) 80013d4: f44f 2260 mov.w r2, #917504 @ 0xe0000 80013d8: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 80013da: 4b2d ldr r3, [pc, #180] @ (8001490 ) 80013dc: 2200 movs r2, #0 80013de: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 5; 80013e0: 4b2b ldr r3, [pc, #172] @ (8001490 ) 80013e2: 2205 movs r2, #5 80013e4: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 80013e6: 482a ldr r0, [pc, #168] @ (8001490 ) 80013e8: f000 ff04 bl 80021f4 80013ec: 4603 mov r3, r0 80013ee: 2b00 cmp r3, #0 80013f0: d001 beq.n 80013f6 { Error_Handler(); 80013f2: f000 fa89 bl 8001908 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_4; 80013f6: 2304 movs r3, #4 80013f8: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 80013fa: 2301 movs r3, #1 80013fc: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5; 80013fe: 2303 movs r3, #3 8001400: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8001402: 1d3b adds r3, r7, #4 8001404: 4619 mov r1, r3 8001406: 4822 ldr r0, [pc, #136] @ (8001490 ) 8001408: f001 f8c6 bl 8002598 800140c: 4603 mov r3, r0 800140e: 2b00 cmp r3, #0 8001410: d001 beq.n 8001416 { Error_Handler(); 8001412: f000 fa79 bl 8001908 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_5; 8001416: 2305 movs r3, #5 8001418: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_2; 800141a: 2302 movs r3, #2 800141c: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800141e: 1d3b adds r3, r7, #4 8001420: 4619 mov r1, r3 8001422: 481b ldr r0, [pc, #108] @ (8001490 ) 8001424: f001 f8b8 bl 8002598 8001428: 4603 mov r3, r0 800142a: 2b00 cmp r3, #0 800142c: d001 beq.n 8001432 { Error_Handler(); 800142e: f000 fa6b bl 8001908 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_6; 8001432: 2306 movs r3, #6 8001434: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_3; 8001436: 2303 movs r3, #3 8001438: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800143a: 1d3b adds r3, r7, #4 800143c: 4619 mov r1, r3 800143e: 4814 ldr r0, [pc, #80] @ (8001490 ) 8001440: f001 f8aa bl 8002598 8001444: 4603 mov r3, r0 8001446: 2b00 cmp r3, #0 8001448: d001 beq.n 800144e { Error_Handler(); 800144a: f000 fa5d bl 8001908 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_7; 800144e: 2307 movs r3, #7 8001450: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_4; 8001452: 2304 movs r3, #4 8001454: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8001456: 1d3b adds r3, r7, #4 8001458: 4619 mov r1, r3 800145a: 480d ldr r0, [pc, #52] @ (8001490 ) 800145c: f001 f89c bl 8002598 8001460: 4603 mov r3, r0 8001462: 2b00 cmp r3, #0 8001464: d001 beq.n 800146a { Error_Handler(); 8001466: f000 fa4f bl 8001908 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 800146a: 2308 movs r3, #8 800146c: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_5; 800146e: 2305 movs r3, #5 8001470: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8001472: 1d3b adds r3, r7, #4 8001474: 4619 mov r1, r3 8001476: 4806 ldr r0, [pc, #24] @ (8001490 ) 8001478: f001 f88e bl 8002598 800147c: 4603 mov r3, r0 800147e: 2b00 cmp r3, #0 8001480: d001 beq.n 8001486 { Error_Handler(); 8001482: f000 fa41 bl 8001908 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 8001486: bf00 nop 8001488: 3710 adds r7, #16 800148a: 46bd mov sp, r7 800148c: bd80 pop {r7, pc} 800148e: bf00 nop 8001490: 2000028c .word 0x2000028c 8001494: 40012400 .word 0x40012400 08001498 : * @brief TIM2 Initialization Function * @param None * @retval None */ static void MX_TIM2_Init(void) { 8001498: b580 push {r7, lr} 800149a: b08e sub sp, #56 @ 0x38 800149c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 800149e: f107 0328 add.w r3, r7, #40 @ 0x28 80014a2: 2200 movs r2, #0 80014a4: 601a str r2, [r3, #0] 80014a6: 605a str r2, [r3, #4] 80014a8: 609a str r2, [r3, #8] 80014aa: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 80014ac: f107 0320 add.w r3, r7, #32 80014b0: 2200 movs r2, #0 80014b2: 601a str r2, [r3, #0] 80014b4: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 80014b6: 1d3b adds r3, r7, #4 80014b8: 2200 movs r2, #0 80014ba: 601a str r2, [r3, #0] 80014bc: 605a str r2, [r3, #4] 80014be: 609a str r2, [r3, #8] 80014c0: 60da str r2, [r3, #12] 80014c2: 611a str r2, [r3, #16] 80014c4: 615a str r2, [r3, #20] 80014c6: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; 80014c8: 4b44 ldr r3, [pc, #272] @ (80015dc ) 80014ca: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 80014ce: 601a str r2, [r3, #0] htim2.Init.Prescaler = 0; 80014d0: 4b42 ldr r3, [pc, #264] @ (80015dc ) 80014d2: 2200 movs r2, #0 80014d4: 605a str r2, [r3, #4] htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 80014d6: 4b41 ldr r3, [pc, #260] @ (80015dc ) 80014d8: 2200 movs r2, #0 80014da: 609a str r2, [r3, #8] htim2.Init.Period = 17999; 80014dc: 4b3f ldr r3, [pc, #252] @ (80015dc ) 80014de: f244 624f movw r2, #17999 @ 0x464f 80014e2: 60da str r2, [r3, #12] htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80014e4: 4b3d ldr r3, [pc, #244] @ (80015dc ) 80014e6: 2200 movs r2, #0 80014e8: 611a str r2, [r3, #16] htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80014ea: 4b3c ldr r3, [pc, #240] @ (80015dc ) 80014ec: 2200 movs r2, #0 80014ee: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim2) != HAL_OK) 80014f0: 483a ldr r0, [pc, #232] @ (80015dc ) 80014f2: f004 fb3f bl 8005b74 80014f6: 4603 mov r3, r0 80014f8: 2b00 cmp r3, #0 80014fa: d001 beq.n 8001500 { Error_Handler(); 80014fc: f000 fa04 bl 8001908 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 8001500: f44f 5380 mov.w r3, #4096 @ 0x1000 8001504: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) 8001506: f107 0328 add.w r3, r7, #40 @ 0x28 800150a: 4619 mov r1, r3 800150c: 4833 ldr r0, [pc, #204] @ (80015dc ) 800150e: f004 fda1 bl 8006054 8001512: 4603 mov r3, r0 8001514: 2b00 cmp r3, #0 8001516: d001 beq.n 800151c { Error_Handler(); 8001518: f000 f9f6 bl 8001908 } if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 800151c: 482f ldr r0, [pc, #188] @ (80015dc ) 800151e: f004 fb78 bl 8005c12 8001522: 4603 mov r3, r0 8001524: 2b00 cmp r3, #0 8001526: d001 beq.n 800152c { Error_Handler(); 8001528: f000 f9ee bl 8001908 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800152c: 2300 movs r3, #0 800152e: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001530: 2300 movs r3, #0 8001532: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 8001534: f107 0320 add.w r3, r7, #32 8001538: 4619 mov r1, r3 800153a: 4828 ldr r0, [pc, #160] @ (80015dc ) 800153c: f005 f92a bl 8006794 8001540: 4603 mov r3, r0 8001542: 2b00 cmp r3, #0 8001544: d001 beq.n 800154a { Error_Handler(); 8001546: f000 f9df bl 8001908 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 800154a: 2360 movs r3, #96 @ 0x60 800154c: 607b str r3, [r7, #4] sConfigOC.Pulse = 1000; 800154e: f44f 737a mov.w r3, #1000 @ 0x3e8 8001552: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8001554: 2300 movs r3, #0 8001556: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 8001558: 2304 movs r3, #4 800155a: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 800155c: 1d3b adds r3, r7, #4 800155e: 2200 movs r2, #0 8001560: 4619 mov r1, r3 8001562: 481e ldr r0, [pc, #120] @ (80015dc ) 8001564: f004 fcb4 bl 8005ed0 8001568: 4603 mov r3, r0 800156a: 2b00 cmp r3, #0 800156c: d001 beq.n 8001572 { Error_Handler(); 800156e: f000 f9cb bl 8001908 } sConfigOC.Pulse = 2000; 8001572: f44f 63fa mov.w r3, #2000 @ 0x7d0 8001576: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 8001578: 1d3b adds r3, r7, #4 800157a: 2204 movs r2, #4 800157c: 4619 mov r1, r3 800157e: 4817 ldr r0, [pc, #92] @ (80015dc ) 8001580: f004 fca6 bl 8005ed0 8001584: 4603 mov r3, r0 8001586: 2b00 cmp r3, #0 8001588: d001 beq.n 800158e { Error_Handler(); 800158a: f000 f9bd bl 8001908 } sConfigOC.Pulse = 3000; 800158e: f640 33b8 movw r3, #3000 @ 0xbb8 8001592: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 8001594: 2300 movs r3, #0 8001596: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 8001598: 1d3b adds r3, r7, #4 800159a: 2208 movs r2, #8 800159c: 4619 mov r1, r3 800159e: 480f ldr r0, [pc, #60] @ (80015dc ) 80015a0: f004 fc96 bl 8005ed0 80015a4: 4603 mov r3, r0 80015a6: 2b00 cmp r3, #0 80015a8: d001 beq.n 80015ae { Error_Handler(); 80015aa: f000 f9ad bl 8001908 } sConfigOC.Pulse = 4000; 80015ae: f44f 637a mov.w r3, #4000 @ 0xfa0 80015b2: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 80015b4: 2304 movs r3, #4 80015b6: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 80015b8: 1d3b adds r3, r7, #4 80015ba: 220c movs r2, #12 80015bc: 4619 mov r1, r3 80015be: 4807 ldr r0, [pc, #28] @ (80015dc ) 80015c0: f004 fc86 bl 8005ed0 80015c4: 4603 mov r3, r0 80015c6: 2b00 cmp r3, #0 80015c8: d001 beq.n 80015ce { Error_Handler(); 80015ca: f000 f99d bl 8001908 } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ HAL_TIM_MspPostInit(&htim2); 80015ce: 4803 ldr r0, [pc, #12] @ (80015dc ) 80015d0: f000 fc6a bl 8001ea8 } 80015d4: bf00 nop 80015d6: 3738 adds r7, #56 @ 0x38 80015d8: 46bd mov sp, r7 80015da: bd80 pop {r7, pc} 80015dc: 20000300 .word 0x20000300 080015e0 : * @brief TIM4 Initialization Function * @param None * @retval None */ static void MX_TIM4_Init(void) { 80015e0: b580 push {r7, lr} 80015e2: b08e sub sp, #56 @ 0x38 80015e4: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 80015e6: f107 0328 add.w r3, r7, #40 @ 0x28 80015ea: 2200 movs r2, #0 80015ec: 601a str r2, [r3, #0] 80015ee: 605a str r2, [r3, #4] 80015f0: 609a str r2, [r3, #8] 80015f2: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 80015f4: f107 0320 add.w r3, r7, #32 80015f8: 2200 movs r2, #0 80015fa: 601a str r2, [r3, #0] 80015fc: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 80015fe: 1d3b adds r3, r7, #4 8001600: 2200 movs r2, #0 8001602: 601a str r2, [r3, #0] 8001604: 605a str r2, [r3, #4] 8001606: 609a str r2, [r3, #8] 8001608: 60da str r2, [r3, #12] 800160a: 611a str r2, [r3, #16] 800160c: 615a str r2, [r3, #20] 800160e: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 8001610: 4b42 ldr r3, [pc, #264] @ (800171c ) 8001612: 4a43 ldr r2, [pc, #268] @ (8001720 ) 8001614: 601a str r2, [r3, #0] htim4.Init.Prescaler = 0; 8001616: 4b41 ldr r3, [pc, #260] @ (800171c ) 8001618: 2200 movs r2, #0 800161a: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 800161c: 4b3f ldr r3, [pc, #252] @ (800171c ) 800161e: 2200 movs r2, #0 8001620: 609a str r2, [r3, #8] htim4.Init.Period = 17999; 8001622: 4b3e ldr r3, [pc, #248] @ (800171c ) 8001624: f244 624f movw r2, #17999 @ 0x464f 8001628: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800162a: 4b3c ldr r3, [pc, #240] @ (800171c ) 800162c: 2200 movs r2, #0 800162e: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001630: 4b3a ldr r3, [pc, #232] @ (800171c ) 8001632: 2200 movs r2, #0 8001634: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 8001636: 4839 ldr r0, [pc, #228] @ (800171c ) 8001638: f004 fa9c bl 8005b74 800163c: 4603 mov r3, r0 800163e: 2b00 cmp r3, #0 8001640: d001 beq.n 8001646 { Error_Handler(); 8001642: f000 f961 bl 8001908 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 8001646: f44f 5380 mov.w r3, #4096 @ 0x1000 800164a: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 800164c: f107 0328 add.w r3, r7, #40 @ 0x28 8001650: 4619 mov r1, r3 8001652: 4832 ldr r0, [pc, #200] @ (800171c ) 8001654: f004 fcfe bl 8006054 8001658: 4603 mov r3, r0 800165a: 2b00 cmp r3, #0 800165c: d001 beq.n 8001662 { Error_Handler(); 800165e: f000 f953 bl 8001908 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 8001662: 482e ldr r0, [pc, #184] @ (800171c ) 8001664: f004 fad5 bl 8005c12 8001668: 4603 mov r3, r0 800166a: 2b00 cmp r3, #0 800166c: d001 beq.n 8001672 { Error_Handler(); 800166e: f000 f94b bl 8001908 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001672: 2300 movs r3, #0 8001674: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001676: 2300 movs r3, #0 8001678: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 800167a: f107 0320 add.w r3, r7, #32 800167e: 4619 mov r1, r3 8001680: 4826 ldr r0, [pc, #152] @ (800171c ) 8001682: f005 f887 bl 8006794 8001686: 4603 mov r3, r0 8001688: 2b00 cmp r3, #0 800168a: d001 beq.n 8001690 { Error_Handler(); 800168c: f000 f93c bl 8001908 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 8001690: 2360 movs r3, #96 @ 0x60 8001692: 607b str r3, [r7, #4] sConfigOC.Pulse = 5000; 8001694: f241 3388 movw r3, #5000 @ 0x1388 8001698: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800169a: 2300 movs r3, #0 800169c: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 800169e: 2304 movs r3, #4 80016a0: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 80016a2: 1d3b adds r3, r7, #4 80016a4: 2200 movs r2, #0 80016a6: 4619 mov r1, r3 80016a8: 481c ldr r0, [pc, #112] @ (800171c ) 80016aa: f004 fc11 bl 8005ed0 80016ae: 4603 mov r3, r0 80016b0: 2b00 cmp r3, #0 80016b2: d001 beq.n 80016b8 { Error_Handler(); 80016b4: f000 f928 bl 8001908 } sConfigOC.Pulse = 6000; 80016b8: f241 7370 movw r3, #6000 @ 0x1770 80016bc: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 80016be: 1d3b adds r3, r7, #4 80016c0: 2204 movs r2, #4 80016c2: 4619 mov r1, r3 80016c4: 4815 ldr r0, [pc, #84] @ (800171c ) 80016c6: f004 fc03 bl 8005ed0 80016ca: 4603 mov r3, r0 80016cc: 2b00 cmp r3, #0 80016ce: d001 beq.n 80016d4 { Error_Handler(); 80016d0: f000 f91a bl 8001908 } sConfigOC.Pulse = 7000; 80016d4: f641 3358 movw r3, #7000 @ 0x1b58 80016d8: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 80016da: 1d3b adds r3, r7, #4 80016dc: 2208 movs r2, #8 80016de: 4619 mov r1, r3 80016e0: 480e ldr r0, [pc, #56] @ (800171c ) 80016e2: f004 fbf5 bl 8005ed0 80016e6: 4603 mov r3, r0 80016e8: 2b00 cmp r3, #0 80016ea: d001 beq.n 80016f0 { Error_Handler(); 80016ec: f000 f90c bl 8001908 } sConfigOC.Pulse = 8000; 80016f0: f44f 53fa mov.w r3, #8000 @ 0x1f40 80016f4: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 80016f6: 1d3b adds r3, r7, #4 80016f8: 220c movs r2, #12 80016fa: 4619 mov r1, r3 80016fc: 4807 ldr r0, [pc, #28] @ (800171c ) 80016fe: f004 fbe7 bl 8005ed0 8001702: 4603 mov r3, r0 8001704: 2b00 cmp r3, #0 8001706: d001 beq.n 800170c { Error_Handler(); 8001708: f000 f8fe bl 8001908 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 800170c: 4803 ldr r0, [pc, #12] @ (800171c ) 800170e: f000 fbcb bl 8001ea8 } 8001712: bf00 nop 8001714: 3738 adds r7, #56 @ 0x38 8001716: 46bd mov sp, r7 8001718: bd80 pop {r7, pc} 800171a: bf00 nop 800171c: 20000348 .word 0x20000348 8001720: 40000800 .word 0x40000800 08001724 : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 8001724: b580 push {r7, lr} 8001726: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 8001728: 4b11 ldr r3, [pc, #68] @ (8001770 ) 800172a: 4a12 ldr r2, [pc, #72] @ (8001774 ) 800172c: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 800172e: 4b10 ldr r3, [pc, #64] @ (8001770 ) 8001730: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8001734: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8001736: 4b0e ldr r3, [pc, #56] @ (8001770 ) 8001738: 2200 movs r2, #0 800173a: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 800173c: 4b0c ldr r3, [pc, #48] @ (8001770 ) 800173e: 2200 movs r2, #0 8001740: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8001742: 4b0b ldr r3, [pc, #44] @ (8001770 ) 8001744: 2200 movs r2, #0 8001746: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8001748: 4b09 ldr r3, [pc, #36] @ (8001770 ) 800174a: 220c movs r2, #12 800174c: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800174e: 4b08 ldr r3, [pc, #32] @ (8001770 ) 8001750: 2200 movs r2, #0 8001752: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8001754: 4b06 ldr r3, [pc, #24] @ (8001770 ) 8001756: 2200 movs r2, #0 8001758: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 800175a: 4805 ldr r0, [pc, #20] @ (8001770 ) 800175c: f005 f878 bl 8006850 8001760: 4603 mov r3, r0 8001762: 2b00 cmp r3, #0 8001764: d001 beq.n 800176a { Error_Handler(); 8001766: f000 f8cf bl 8001908 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 800176a: bf00 nop 800176c: bd80 pop {r7, pc} 800176e: bf00 nop 8001770: 20000390 .word 0x20000390 8001774: 40013800 .word 0x40013800 08001778 : /** * Enable DMA controller clock */ static void MX_DMA_Init(void) { 8001778: b580 push {r7, lr} 800177a: b082 sub sp, #8 800177c: af00 add r7, sp, #0 /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); 800177e: 4b0c ldr r3, [pc, #48] @ (80017b0 ) 8001780: 695b ldr r3, [r3, #20] 8001782: 4a0b ldr r2, [pc, #44] @ (80017b0 ) 8001784: f043 0301 orr.w r3, r3, #1 8001788: 6153 str r3, [r2, #20] 800178a: 4b09 ldr r3, [pc, #36] @ (80017b0 ) 800178c: 695b ldr r3, [r3, #20] 800178e: f003 0301 and.w r3, r3, #1 8001792: 607b str r3, [r7, #4] 8001794: 687b ldr r3, [r7, #4] /* DMA interrupt init */ /* DMA1_Channel1_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 8001796: 2200 movs r2, #0 8001798: 2100 movs r1, #0 800179a: 200b movs r0, #11 800179c: f001 f9cd bl 8002b3a HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 80017a0: 200b movs r0, #11 80017a2: f001 f9e6 bl 8002b72 } 80017a6: bf00 nop 80017a8: 3708 adds r7, #8 80017aa: 46bd mov sp, r7 80017ac: bd80 pop {r7, pc} 80017ae: bf00 nop 80017b0: 40021000 .word 0x40021000 080017b4 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 80017b4: b580 push {r7, lr} 80017b6: b088 sub sp, #32 80017b8: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80017ba: f107 0310 add.w r3, r7, #16 80017be: 2200 movs r2, #0 80017c0: 601a str r2, [r3, #0] 80017c2: 605a str r2, [r3, #4] 80017c4: 609a str r2, [r3, #8] 80017c6: 60da str r2, [r3, #12] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 80017c8: 4b4b ldr r3, [pc, #300] @ (80018f8 ) 80017ca: 699b ldr r3, [r3, #24] 80017cc: 4a4a ldr r2, [pc, #296] @ (80018f8 ) 80017ce: f043 0310 orr.w r3, r3, #16 80017d2: 6193 str r3, [r2, #24] 80017d4: 4b48 ldr r3, [pc, #288] @ (80018f8 ) 80017d6: 699b ldr r3, [r3, #24] 80017d8: f003 0310 and.w r3, r3, #16 80017dc: 60fb str r3, [r7, #12] 80017de: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); 80017e0: 4b45 ldr r3, [pc, #276] @ (80018f8 ) 80017e2: 699b ldr r3, [r3, #24] 80017e4: 4a44 ldr r2, [pc, #272] @ (80018f8 ) 80017e6: f043 0320 orr.w r3, r3, #32 80017ea: 6193 str r3, [r2, #24] 80017ec: 4b42 ldr r3, [pc, #264] @ (80018f8 ) 80017ee: 699b ldr r3, [r3, #24] 80017f0: f003 0320 and.w r3, r3, #32 80017f4: 60bb str r3, [r7, #8] 80017f6: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 80017f8: 4b3f ldr r3, [pc, #252] @ (80018f8 ) 80017fa: 699b ldr r3, [r3, #24] 80017fc: 4a3e ldr r2, [pc, #248] @ (80018f8 ) 80017fe: f043 0304 orr.w r3, r3, #4 8001802: 6193 str r3, [r2, #24] 8001804: 4b3c ldr r3, [pc, #240] @ (80018f8 ) 8001806: 699b ldr r3, [r3, #24] 8001808: f003 0304 and.w r3, r3, #4 800180c: 607b str r3, [r7, #4] 800180e: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001810: 4b39 ldr r3, [pc, #228] @ (80018f8 ) 8001812: 699b ldr r3, [r3, #24] 8001814: 4a38 ldr r2, [pc, #224] @ (80018f8 ) 8001816: f043 0308 orr.w r3, r3, #8 800181a: 6193 str r3, [r2, #24] 800181c: 4b36 ldr r3, [pc, #216] @ (80018f8 ) 800181e: 699b ldr r3, [r3, #24] 8001820: f003 0308 and.w r3, r3, #8 8001824: 603b str r3, [r7, #0] 8001826: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET); 8001828: 2200 movs r2, #0 800182a: f44f 5100 mov.w r1, #8192 @ 0x2000 800182e: 4833 ldr r0, [pc, #204] @ (80018fc ) 8001830: f001 ff49 bl 80036c6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin 8001834: 2200 movs r2, #0 8001836: f640 413e movw r1, #3134 @ 0xc3e 800183a: 4831 ldr r0, [pc, #196] @ (8001900 ) 800183c: f001 ff43 bl 80036c6 |EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET); 8001840: 2200 movs r2, #0 8001842: f44f 4101 mov.w r1, #33024 @ 0x8100 8001846: 482f ldr r0, [pc, #188] @ (8001904 ) 8001848: f001 ff3d bl 80036c6 /*Configure GPIO pin : LED2_Pin */ GPIO_InitStruct.Pin = LED2_Pin; 800184c: f44f 5300 mov.w r3, #8192 @ 0x2000 8001850: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001852: 2301 movs r3, #1 8001854: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001856: 2300 movs r3, #0 8001858: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800185a: 2302 movs r3, #2 800185c: 61fb str r3, [r7, #28] HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct); 800185e: f107 0310 add.w r3, r7, #16 8001862: 4619 mov r1, r3 8001864: 4825 ldr r0, [pc, #148] @ (80018fc ) 8001866: f001 fd93 bl 8003390 /*Configure GPIO pins : P1_Pin P2_Pin */ GPIO_InitStruct.Pin = P1_Pin|P2_Pin; 800186a: f44f 4340 mov.w r3, #49152 @ 0xc000 800186e: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001870: 2300 movs r3, #0 8001872: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001874: 2300 movs r3, #0 8001876: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8001878: f107 0310 add.w r3, r7, #16 800187c: 4619 mov r1, r3 800187e: 481f ldr r0, [pc, #124] @ (80018fc ) 8001880: f001 fd86 bl 8003390 /*Configure GPIO pin : AIN1_Pin */ GPIO_InitStruct.Pin = AIN1_Pin; 8001884: 2310 movs r3, #16 8001886: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8001888: 2303 movs r3, #3 800188a: 617b str r3, [r7, #20] HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct); 800188c: f107 0310 add.w r3, r7, #16 8001890: 4619 mov r1, r3 8001892: 481c ldr r0, [pc, #112] @ (8001904 ) 8001894: f001 fd7c bl 8003390 /*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin EXP1_Pin EXP2_Pin EXP3_Pin */ GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin 8001898: f640 433e movw r3, #3134 @ 0xc3e 800189c: 613b str r3, [r7, #16] |EXP1_Pin|EXP2_Pin|EXP3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800189e: 2301 movs r3, #1 80018a0: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80018a2: 2300 movs r3, #0 80018a4: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80018a6: 2302 movs r3, #2 80018a8: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80018aa: f107 0310 add.w r3, r7, #16 80018ae: 4619 mov r1, r3 80018b0: 4813 ldr r0, [pc, #76] @ (8001900 ) 80018b2: f001 fd6d bl 8003390 /*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */ GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin; 80018b6: f44f 4370 mov.w r3, #61440 @ 0xf000 80018ba: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80018bc: 2300 movs r3, #0 80018be: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80018c0: 2300 movs r3, #0 80018c2: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80018c4: f107 0310 add.w r3, r7, #16 80018c8: 4619 mov r1, r3 80018ca: 480d ldr r0, [pc, #52] @ (8001900 ) 80018cc: f001 fd60 bl 8003390 /*Configure GPIO pins : BUZ_Pin LED1_Pin */ GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin; 80018d0: f44f 4301 mov.w r3, #33024 @ 0x8100 80018d4: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80018d6: 2301 movs r3, #1 80018d8: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80018da: 2300 movs r3, #0 80018dc: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80018de: 2302 movs r3, #2 80018e0: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80018e2: f107 0310 add.w r3, r7, #16 80018e6: 4619 mov r1, r3 80018e8: 4806 ldr r0, [pc, #24] @ (8001904 ) 80018ea: f001 fd51 bl 8003390 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 80018ee: bf00 nop 80018f0: 3720 adds r7, #32 80018f2: 46bd mov sp, r7 80018f4: bd80 pop {r7, pc} 80018f6: bf00 nop 80018f8: 40021000 .word 0x40021000 80018fc: 40011000 .word 0x40011000 8001900: 40010c00 .word 0x40010c00 8001904: 40010800 .word 0x40010800 08001908 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001908: b480 push {r7} 800190a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800190c: b672 cpsid i } 800190e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8001910: bf00 nop 8001912: e7fd b.n 8001910 08001914 : extern TIM_HandleTypeDef htim2; extern TIM_HandleTypeDef htim3; extern TIM_HandleTypeDef htim4; bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel) { 8001914: b580 push {r7, lr} 8001916: b084 sub sp, #16 8001918: af00 add r7, sp, #0 800191a: 6078 str r0, [r7, #4] 800191c: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel); 800191e: 6839 ldr r1, [r7, #0] 8001920: 6878 ldr r0, [r7, #4] 8001922: f004 fc5e bl 80061e2 8001926: 4603 mov r3, r0 8001928: 73fb strb r3, [r7, #15] return (chState == HAL_TIM_CHANNEL_STATE_BUSY); 800192a: 7bfb ldrb r3, [r7, #15] 800192c: 2b02 cmp r3, #2 800192e: bf0c ite eq 8001930: 2301 moveq r3, #1 8001932: 2300 movne r3, #0 8001934: b2db uxtb r3, r3 } 8001936: 4618 mov r0, r3 8001938: 3710 adds r7, #16 800193a: 46bd mov sp, r7 800193c: bd80 pop {r7, pc} 0800193e : void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){ 800193e: b580 push {r7, lr} 8001940: b082 sub sp, #8 8001942: af00 add r7, sp, #0 8001944: 6078 str r0, [r7, #4] 8001946: 6039 str r1, [r7, #0] HAL_TIM_PWM_Stop(htim, Channel); 8001948: 6839 ldr r1, [r7, #0] 800194a: 6878 ldr r0, [r7, #4] 800194c: f004 fa5c bl 8005e08 } 8001950: bf00 nop 8001952: 3708 adds r7, #8 8001954: 46bd mov sp, r7 8001956: bd80 pop {r7, pc} 08001958 : void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 8001958: b580 push {r7, lr} 800195a: b084 sub sp, #16 800195c: af00 add r7, sp, #0 800195e: 60f8 str r0, [r7, #12] 8001960: 60b9 str r1, [r7, #8] 8001962: 4613 mov r3, r2 8001964: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8001966: 68bb ldr r3, [r7, #8] 8001968: 2b00 cmp r3, #0 800196a: d104 bne.n 8001976 800196c: 68fb ldr r3, [r7, #12] 800196e: 681b ldr r3, [r3, #0] 8001970: 88fa ldrh r2, [r7, #6] 8001972: 635a str r2, [r3, #52] @ 0x34 8001974: e013 b.n 800199e 8001976: 68bb ldr r3, [r7, #8] 8001978: 2b04 cmp r3, #4 800197a: d104 bne.n 8001986 800197c: 68fb ldr r3, [r7, #12] 800197e: 681a ldr r2, [r3, #0] 8001980: 88fb ldrh r3, [r7, #6] 8001982: 6393 str r3, [r2, #56] @ 0x38 8001984: e00b b.n 800199e 8001986: 68bb ldr r3, [r7, #8] 8001988: 2b08 cmp r3, #8 800198a: d104 bne.n 8001996 800198c: 68fb ldr r3, [r7, #12] 800198e: 681a ldr r2, [r3, #0] 8001990: 88fb ldrh r3, [r7, #6] 8001992: 63d3 str r3, [r2, #60] @ 0x3c 8001994: e003 b.n 800199e 8001996: 68fb ldr r3, [r7, #12] 8001998: 681a ldr r2, [r3, #0] 800199a: 88fb ldrh r3, [r7, #6] 800199c: 6413 str r3, [r2, #64] @ 0x40 HAL_TIM_PWM_Start(htim, Channel); 800199e: 68b9 ldr r1, [r7, #8] 80019a0: 68f8 ldr r0, [r7, #12] 80019a2: f004 f98f bl 8005cc4 } 80019a6: bf00 nop 80019a8: 3710 adds r7, #16 80019aa: 46bd mov sp, r7 80019ac: bd80 pop {r7, pc} 080019ae : void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 80019ae: b480 push {r7} 80019b0: b085 sub sp, #20 80019b2: af00 add r7, sp, #0 80019b4: 60f8 str r0, [r7, #12] 80019b6: 60b9 str r1, [r7, #8] 80019b8: 4613 mov r3, r2 80019ba: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80019bc: 68bb ldr r3, [r7, #8] 80019be: 2b00 cmp r3, #0 80019c0: d104 bne.n 80019cc 80019c2: 68fb ldr r3, [r7, #12] 80019c4: 681b ldr r3, [r3, #0] 80019c6: 88fa ldrh r2, [r7, #6] 80019c8: 635a str r2, [r3, #52] @ 0x34 } 80019ca: e013 b.n 80019f4 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80019cc: 68bb ldr r3, [r7, #8] 80019ce: 2b04 cmp r3, #4 80019d0: d104 bne.n 80019dc 80019d2: 68fb ldr r3, [r7, #12] 80019d4: 681a ldr r2, [r3, #0] 80019d6: 88fb ldrh r3, [r7, #6] 80019d8: 6393 str r3, [r2, #56] @ 0x38 } 80019da: e00b b.n 80019f4 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80019dc: 68bb ldr r3, [r7, #8] 80019de: 2b08 cmp r3, #8 80019e0: d104 bne.n 80019ec 80019e2: 68fb ldr r3, [r7, #12] 80019e4: 681a ldr r2, [r3, #0] 80019e6: 88fb ldrh r3, [r7, #6] 80019e8: 63d3 str r3, [r2, #60] @ 0x3c } 80019ea: e003 b.n 80019f4 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80019ec: 68fb ldr r3, [r7, #12] 80019ee: 681a ldr r2, [r3, #0] 80019f0: 88fb ldrh r3, [r7, #6] 80019f2: 6413 str r3, [r2, #64] @ 0x40 } 80019f4: bf00 nop 80019f6: 3714 adds r7, #20 80019f8: 46bd mov sp, r7 80019fa: bc80 pop {r7} 80019fc: 4770 bx lr ... 08001a00 : void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){ 8001a00: b580 push {r7, lr} 8001a02: b082 sub sp, #8 8001a04: af00 add r7, sp, #0 8001a06: 4603 mov r3, r0 8001a08: 71fb strb r3, [r7, #7] 8001a0a: 460b mov r3, r1 8001a0c: 71bb strb r3, [r7, #6] 8001a0e: 4613 mov r3, r2 8001a10: 80bb strh r3, [r7, #4] switch(mot){ 8001a12: 79fb ldrb r3, [r7, #7] 8001a14: 3b01 subs r3, #1 8001a16: 2b03 cmp r3, #3 8001a18: f200 8158 bhi.w 8001ccc 8001a1c: a201 add r2, pc, #4 @ (adr r2, 8001a24 ) 8001a1e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001a22: bf00 nop 8001a24: 08001a35 .word 0x08001a35 8001a28: 08001ad7 .word 0x08001ad7 8001a2c: 08001b79 .word 0x08001b79 8001a30: 08001c23 .word 0x08001c23 case 1: if(dir==FW){ 8001a34: 79bb ldrb r3, [r7, #6] 8001a36: 2b00 cmp r3, #0 8001a38: d126 bne.n 8001a88 if(pwmval==0){ 8001a3a: 88bb ldrh r3, [r7, #4] 8001a3c: 2b00 cmp r3, #0 8001a3e: d109 bne.n 8001a54 StopMot(timMot1,FWMot1); 8001a40: 2100 movs r1, #0 8001a42: 48a5 ldr r0, [pc, #660] @ (8001cd8 ) 8001a44: f7ff ff7b bl 800193e HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8001a48: 2200 movs r2, #0 8001a4a: 2102 movs r1, #2 8001a4c: 48a3 ldr r0, [pc, #652] @ (8001cdc ) 8001a4e: f001 fe3a bl 80036c6 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); StartMot(timMot1,BWMot1,pwmval); } } break; 8001a52: e13c b.n 8001cce }else if(IsPwmRunning(timMot1, FWMot1)){ 8001a54: 2100 movs r1, #0 8001a56: 48a0 ldr r0, [pc, #640] @ (8001cd8 ) 8001a58: f7ff ff5c bl 8001914 8001a5c: 4603 mov r3, r0 8001a5e: 2b00 cmp r3, #0 8001a60: d006 beq.n 8001a70 SetMotPwm(timMot1,FWMot1,pwmval); 8001a62: 88bb ldrh r3, [r7, #4] 8001a64: 461a mov r2, r3 8001a66: 2100 movs r1, #0 8001a68: 489b ldr r0, [pc, #620] @ (8001cd8 ) 8001a6a: f7ff ffa0 bl 80019ae break; 8001a6e: e12e b.n 8001cce HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 8001a70: 2201 movs r2, #1 8001a72: 2102 movs r1, #2 8001a74: 4899 ldr r0, [pc, #612] @ (8001cdc ) 8001a76: f001 fe26 bl 80036c6 StartMot(timMot1,FWMot1,pwmval); 8001a7a: 88bb ldrh r3, [r7, #4] 8001a7c: 461a mov r2, r3 8001a7e: 2100 movs r1, #0 8001a80: 4895 ldr r0, [pc, #596] @ (8001cd8 ) 8001a82: f7ff ff69 bl 8001958 break; 8001a86: e122 b.n 8001cce if(pwmval==0){ 8001a88: 88bb ldrh r3, [r7, #4] 8001a8a: 2b00 cmp r3, #0 8001a8c: d109 bne.n 8001aa2 StopMot(timMot1,BWMot1); 8001a8e: 2104 movs r1, #4 8001a90: 4891 ldr r0, [pc, #580] @ (8001cd8 ) 8001a92: f7ff ff54 bl 800193e HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8001a96: 2200 movs r2, #0 8001a98: 2102 movs r1, #2 8001a9a: 4890 ldr r0, [pc, #576] @ (8001cdc ) 8001a9c: f001 fe13 bl 80036c6 break; 8001aa0: e115 b.n 8001cce }else if(IsPwmRunning(timMot1, BWMot1)){ 8001aa2: 2104 movs r1, #4 8001aa4: 488c ldr r0, [pc, #560] @ (8001cd8 ) 8001aa6: f7ff ff35 bl 8001914 8001aaa: 4603 mov r3, r0 8001aac: 2b00 cmp r3, #0 8001aae: d006 beq.n 8001abe SetMotPwm(timMot1,BWMot1,pwmval); 8001ab0: 88bb ldrh r3, [r7, #4] 8001ab2: 461a mov r2, r3 8001ab4: 2104 movs r1, #4 8001ab6: 4888 ldr r0, [pc, #544] @ (8001cd8 ) 8001ab8: f7ff ff79 bl 80019ae break; 8001abc: e107 b.n 8001cce HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 8001abe: 2201 movs r2, #1 8001ac0: 2102 movs r1, #2 8001ac2: 4886 ldr r0, [pc, #536] @ (8001cdc ) 8001ac4: f001 fdff bl 80036c6 StartMot(timMot1,BWMot1,pwmval); 8001ac8: 88bb ldrh r3, [r7, #4] 8001aca: 461a mov r2, r3 8001acc: 2104 movs r1, #4 8001ace: 4882 ldr r0, [pc, #520] @ (8001cd8 ) 8001ad0: f7ff ff42 bl 8001958 break; 8001ad4: e0fb b.n 8001cce case 2: if(dir==FW){ 8001ad6: 79bb ldrb r3, [r7, #6] 8001ad8: 2b00 cmp r3, #0 8001ada: d126 bne.n 8001b2a if(pwmval==0){ 8001adc: 88bb ldrh r3, [r7, #4] 8001ade: 2b00 cmp r3, #0 8001ae0: d109 bne.n 8001af6 StopMot(timMot2,FWMot2); 8001ae2: 2108 movs r1, #8 8001ae4: 487c ldr r0, [pc, #496] @ (8001cd8 ) 8001ae6: f7ff ff2a bl 800193e HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 8001aea: 2200 movs r2, #0 8001aec: 2104 movs r1, #4 8001aee: 487b ldr r0, [pc, #492] @ (8001cdc ) 8001af0: f001 fde9 bl 80036c6 }else{ HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); StartMot(timMot2,BWMot2,pwmval); } } break; 8001af4: e0eb b.n 8001cce }else if(IsPwmRunning(timMot2, FWMot2)){ 8001af6: 2108 movs r1, #8 8001af8: 4877 ldr r0, [pc, #476] @ (8001cd8 ) 8001afa: f7ff ff0b bl 8001914 8001afe: 4603 mov r3, r0 8001b00: 2b00 cmp r3, #0 8001b02: d006 beq.n 8001b12 SetMotPwm(timMot2,FWMot2,pwmval); 8001b04: 88bb ldrh r3, [r7, #4] 8001b06: 461a mov r2, r3 8001b08: 2108 movs r1, #8 8001b0a: 4873 ldr r0, [pc, #460] @ (8001cd8 ) 8001b0c: f7ff ff4f bl 80019ae break; 8001b10: e0dd b.n 8001cce HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8001b12: 2201 movs r2, #1 8001b14: 2104 movs r1, #4 8001b16: 4871 ldr r0, [pc, #452] @ (8001cdc ) 8001b18: f001 fdd5 bl 80036c6 StartMot(timMot2,FWMot2,pwmval); 8001b1c: 88bb ldrh r3, [r7, #4] 8001b1e: 461a mov r2, r3 8001b20: 2108 movs r1, #8 8001b22: 486d ldr r0, [pc, #436] @ (8001cd8 ) 8001b24: f7ff ff18 bl 8001958 break; 8001b28: e0d1 b.n 8001cce if(pwmval==0){ 8001b2a: 88bb ldrh r3, [r7, #4] 8001b2c: 2b00 cmp r3, #0 8001b2e: d109 bne.n 8001b44 StopMot(timMot2,BWMot2); 8001b30: 210c movs r1, #12 8001b32: 4869 ldr r0, [pc, #420] @ (8001cd8 ) 8001b34: f7ff ff03 bl 800193e HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 8001b38: 2200 movs r2, #0 8001b3a: 2104 movs r1, #4 8001b3c: 4867 ldr r0, [pc, #412] @ (8001cdc ) 8001b3e: f001 fdc2 bl 80036c6 break; 8001b42: e0c4 b.n 8001cce }else if(IsPwmRunning(timMot2, BWMot2)){ 8001b44: 210c movs r1, #12 8001b46: 4864 ldr r0, [pc, #400] @ (8001cd8 ) 8001b48: f7ff fee4 bl 8001914 8001b4c: 4603 mov r3, r0 8001b4e: 2b00 cmp r3, #0 8001b50: d006 beq.n 8001b60 SetMotPwm(timMot2,BWMot2,pwmval); 8001b52: 88bb ldrh r3, [r7, #4] 8001b54: 461a mov r2, r3 8001b56: 210c movs r1, #12 8001b58: 485f ldr r0, [pc, #380] @ (8001cd8 ) 8001b5a: f7ff ff28 bl 80019ae break; 8001b5e: e0b6 b.n 8001cce HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8001b60: 2201 movs r2, #1 8001b62: 2104 movs r1, #4 8001b64: 485d ldr r0, [pc, #372] @ (8001cdc ) 8001b66: f001 fdae bl 80036c6 StartMot(timMot2,BWMot2,pwmval); 8001b6a: 88bb ldrh r3, [r7, #4] 8001b6c: 461a mov r2, r3 8001b6e: 210c movs r1, #12 8001b70: 4859 ldr r0, [pc, #356] @ (8001cd8 ) 8001b72: f7ff fef1 bl 8001958 break; 8001b76: e0aa b.n 8001cce case 3: if(dir==FW){ 8001b78: 79bb ldrb r3, [r7, #6] 8001b7a: 2b00 cmp r3, #0 8001b7c: d128 bne.n 8001bd0 if(pwmval==0){ 8001b7e: 88bb ldrh r3, [r7, #4] 8001b80: 2b00 cmp r3, #0 8001b82: d10a bne.n 8001b9a StopMot(timMot3,FWMot3); 8001b84: 2100 movs r1, #0 8001b86: 4856 ldr r0, [pc, #344] @ (8001ce0 ) 8001b88: f7ff fed9 bl 800193e HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8001b8c: 2200 movs r2, #0 8001b8e: f44f 6180 mov.w r1, #1024 @ 0x400 8001b92: 4852 ldr r0, [pc, #328] @ (8001cdc ) 8001b94: f001 fd97 bl 80036c6 }else{ HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); StartMot(timMot3,BWMot3,pwmval); } } break; 8001b98: e099 b.n 8001cce }else if(IsPwmRunning(timMot3, FWMot3)){ 8001b9a: 2100 movs r1, #0 8001b9c: 4850 ldr r0, [pc, #320] @ (8001ce0 ) 8001b9e: f7ff feb9 bl 8001914 8001ba2: 4603 mov r3, r0 8001ba4: 2b00 cmp r3, #0 8001ba6: d006 beq.n 8001bb6 SetMotPwm(timMot3,FWMot3,pwmval); 8001ba8: 88bb ldrh r3, [r7, #4] 8001baa: 461a mov r2, r3 8001bac: 2100 movs r1, #0 8001bae: 484c ldr r0, [pc, #304] @ (8001ce0 ) 8001bb0: f7ff fefd bl 80019ae break; 8001bb4: e08b b.n 8001cce HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8001bb6: 2201 movs r2, #1 8001bb8: f44f 6180 mov.w r1, #1024 @ 0x400 8001bbc: 4847 ldr r0, [pc, #284] @ (8001cdc ) 8001bbe: f001 fd82 bl 80036c6 StartMot(timMot3,FWMot3,pwmval); 8001bc2: 88bb ldrh r3, [r7, #4] 8001bc4: 461a mov r2, r3 8001bc6: 2100 movs r1, #0 8001bc8: 4845 ldr r0, [pc, #276] @ (8001ce0 ) 8001bca: f7ff fec5 bl 8001958 break; 8001bce: e07e b.n 8001cce if(pwmval==0){ 8001bd0: 88bb ldrh r3, [r7, #4] 8001bd2: 2b00 cmp r3, #0 8001bd4: d10a bne.n 8001bec StopMot(timMot3,BWMot3); 8001bd6: 2104 movs r1, #4 8001bd8: 4841 ldr r0, [pc, #260] @ (8001ce0 ) 8001bda: f7ff feb0 bl 800193e HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8001bde: 2200 movs r2, #0 8001be0: f44f 6180 mov.w r1, #1024 @ 0x400 8001be4: 483d ldr r0, [pc, #244] @ (8001cdc ) 8001be6: f001 fd6e bl 80036c6 break; 8001bea: e070 b.n 8001cce }else if(IsPwmRunning(timMot3, BWMot3)){ 8001bec: 2104 movs r1, #4 8001bee: 483c ldr r0, [pc, #240] @ (8001ce0 ) 8001bf0: f7ff fe90 bl 8001914 8001bf4: 4603 mov r3, r0 8001bf6: 2b00 cmp r3, #0 8001bf8: d006 beq.n 8001c08 SetMotPwm(timMot3,BWMot3,pwmval); 8001bfa: 88bb ldrh r3, [r7, #4] 8001bfc: 461a mov r2, r3 8001bfe: 2104 movs r1, #4 8001c00: 4837 ldr r0, [pc, #220] @ (8001ce0 ) 8001c02: f7ff fed4 bl 80019ae break; 8001c06: e062 b.n 8001cce HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8001c08: 2201 movs r2, #1 8001c0a: f44f 6180 mov.w r1, #1024 @ 0x400 8001c0e: 4833 ldr r0, [pc, #204] @ (8001cdc ) 8001c10: f001 fd59 bl 80036c6 StartMot(timMot3,BWMot3,pwmval); 8001c14: 88bb ldrh r3, [r7, #4] 8001c16: 461a mov r2, r3 8001c18: 2104 movs r1, #4 8001c1a: 4831 ldr r0, [pc, #196] @ (8001ce0 ) 8001c1c: f7ff fe9c bl 8001958 break; 8001c20: e055 b.n 8001cce case 4: if(dir==FW){ 8001c22: 79bb ldrb r3, [r7, #6] 8001c24: 2b00 cmp r3, #0 8001c26: d128 bne.n 8001c7a if(pwmval==0){ 8001c28: 88bb ldrh r3, [r7, #4] 8001c2a: 2b00 cmp r3, #0 8001c2c: d10a bne.n 8001c44 StopMot(timMot4,FWMot4); 8001c2e: 2108 movs r1, #8 8001c30: 482b ldr r0, [pc, #172] @ (8001ce0 ) 8001c32: f7ff fe84 bl 800193e HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 8001c36: 2200 movs r2, #0 8001c38: f44f 6100 mov.w r1, #2048 @ 0x800 8001c3c: 4827 ldr r0, [pc, #156] @ (8001cdc ) 8001c3e: f001 fd42 bl 80036c6 }else{ HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); StartMot(timMot4,BWMot4,pwmval); } } break; 8001c42: e044 b.n 8001cce }else if(IsPwmRunning(timMot4, FWMot4)){ 8001c44: 2108 movs r1, #8 8001c46: 4826 ldr r0, [pc, #152] @ (8001ce0 ) 8001c48: f7ff fe64 bl 8001914 8001c4c: 4603 mov r3, r0 8001c4e: 2b00 cmp r3, #0 8001c50: d006 beq.n 8001c60 SetMotPwm(timMot4,FWMot4,pwmval); 8001c52: 88bb ldrh r3, [r7, #4] 8001c54: 461a mov r2, r3 8001c56: 2108 movs r1, #8 8001c58: 4821 ldr r0, [pc, #132] @ (8001ce0 ) 8001c5a: f7ff fea8 bl 80019ae break; 8001c5e: e036 b.n 8001cce HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8001c60: 2201 movs r2, #1 8001c62: f44f 6100 mov.w r1, #2048 @ 0x800 8001c66: 481d ldr r0, [pc, #116] @ (8001cdc ) 8001c68: f001 fd2d bl 80036c6 StartMot(timMot4,FWMot4,pwmval); 8001c6c: 88bb ldrh r3, [r7, #4] 8001c6e: 461a mov r2, r3 8001c70: 2108 movs r1, #8 8001c72: 481b ldr r0, [pc, #108] @ (8001ce0 ) 8001c74: f7ff fe70 bl 8001958 break; 8001c78: e029 b.n 8001cce if(pwmval==0){ 8001c7a: 88bb ldrh r3, [r7, #4] 8001c7c: 2b00 cmp r3, #0 8001c7e: d10a bne.n 8001c96 StopMot(timMot4,BWMot4); 8001c80: 210c movs r1, #12 8001c82: 4817 ldr r0, [pc, #92] @ (8001ce0 ) 8001c84: f7ff fe5b bl 800193e HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 8001c88: 2200 movs r2, #0 8001c8a: f44f 6100 mov.w r1, #2048 @ 0x800 8001c8e: 4813 ldr r0, [pc, #76] @ (8001cdc ) 8001c90: f001 fd19 bl 80036c6 break; 8001c94: e01b b.n 8001cce }else if(IsPwmRunning(timMot4, BWMot4)){ 8001c96: 210c movs r1, #12 8001c98: 4811 ldr r0, [pc, #68] @ (8001ce0 ) 8001c9a: f7ff fe3b bl 8001914 8001c9e: 4603 mov r3, r0 8001ca0: 2b00 cmp r3, #0 8001ca2: d006 beq.n 8001cb2 SetMotPwm(timMot4,BWMot4,pwmval); 8001ca4: 88bb ldrh r3, [r7, #4] 8001ca6: 461a mov r2, r3 8001ca8: 210c movs r1, #12 8001caa: 480d ldr r0, [pc, #52] @ (8001ce0 ) 8001cac: f7ff fe7f bl 80019ae break; 8001cb0: e00d b.n 8001cce HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8001cb2: 2201 movs r2, #1 8001cb4: f44f 6100 mov.w r1, #2048 @ 0x800 8001cb8: 4808 ldr r0, [pc, #32] @ (8001cdc ) 8001cba: f001 fd04 bl 80036c6 StartMot(timMot4,BWMot4,pwmval); 8001cbe: 88bb ldrh r3, [r7, #4] 8001cc0: 461a mov r2, r3 8001cc2: 210c movs r1, #12 8001cc4: 4806 ldr r0, [pc, #24] @ (8001ce0 ) 8001cc6: f7ff fe47 bl 8001958 break; 8001cca: e000 b.n 8001cce default: break; 8001ccc: bf00 nop } } 8001cce: bf00 nop 8001cd0: 3708 adds r7, #8 8001cd2: 46bd mov sp, r7 8001cd4: bd80 pop {r7, pc} 8001cd6: bf00 nop 8001cd8: 20000300 .word 0x20000300 8001cdc: 40010c00 .word 0x40010c00 8001ce0: 20000348 .word 0x20000348 08001ce4 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8001ce4: b480 push {r7} 8001ce6: b085 sub sp, #20 8001ce8: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8001cea: 4b15 ldr r3, [pc, #84] @ (8001d40 ) 8001cec: 699b ldr r3, [r3, #24] 8001cee: 4a14 ldr r2, [pc, #80] @ (8001d40 ) 8001cf0: f043 0301 orr.w r3, r3, #1 8001cf4: 6193 str r3, [r2, #24] 8001cf6: 4b12 ldr r3, [pc, #72] @ (8001d40 ) 8001cf8: 699b ldr r3, [r3, #24] 8001cfa: f003 0301 and.w r3, r3, #1 8001cfe: 60bb str r3, [r7, #8] 8001d00: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 8001d02: 4b0f ldr r3, [pc, #60] @ (8001d40 ) 8001d04: 69db ldr r3, [r3, #28] 8001d06: 4a0e ldr r2, [pc, #56] @ (8001d40 ) 8001d08: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8001d0c: 61d3 str r3, [r2, #28] 8001d0e: 4b0c ldr r3, [pc, #48] @ (8001d40 ) 8001d10: 69db ldr r3, [r3, #28] 8001d12: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8001d16: 607b str r3, [r7, #4] 8001d18: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8001d1a: 4b0a ldr r3, [pc, #40] @ (8001d44 ) 8001d1c: 685b ldr r3, [r3, #4] 8001d1e: 60fb str r3, [r7, #12] 8001d20: 68fb ldr r3, [r7, #12] 8001d22: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 8001d26: 60fb str r3, [r7, #12] 8001d28: 68fb ldr r3, [r7, #12] 8001d2a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8001d2e: 60fb str r3, [r7, #12] 8001d30: 4a04 ldr r2, [pc, #16] @ (8001d44 ) 8001d32: 68fb ldr r3, [r7, #12] 8001d34: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001d36: bf00 nop 8001d38: 3714 adds r7, #20 8001d3a: 46bd mov sp, r7 8001d3c: bc80 pop {r7} 8001d3e: 4770 bx lr 8001d40: 40021000 .word 0x40021000 8001d44: 40010000 .word 0x40010000 08001d48 : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { 8001d48: b580 push {r7, lr} 8001d4a: b08a sub sp, #40 @ 0x28 8001d4c: af00 add r7, sp, #0 8001d4e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001d50: f107 0318 add.w r3, r7, #24 8001d54: 2200 movs r2, #0 8001d56: 601a str r2, [r3, #0] 8001d58: 605a str r2, [r3, #4] 8001d5a: 609a str r2, [r3, #8] 8001d5c: 60da str r2, [r3, #12] if(hadc->Instance==ADC1) 8001d5e: 687b ldr r3, [r7, #4] 8001d60: 681b ldr r3, [r3, #0] 8001d62: 4a33 ldr r2, [pc, #204] @ (8001e30 ) 8001d64: 4293 cmp r3, r2 8001d66: d15f bne.n 8001e28 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8001d68: 4b32 ldr r3, [pc, #200] @ (8001e34 ) 8001d6a: 699b ldr r3, [r3, #24] 8001d6c: 4a31 ldr r2, [pc, #196] @ (8001e34 ) 8001d6e: f443 7300 orr.w r3, r3, #512 @ 0x200 8001d72: 6193 str r3, [r2, #24] 8001d74: 4b2f ldr r3, [pc, #188] @ (8001e34 ) 8001d76: 699b ldr r3, [r3, #24] 8001d78: f403 7300 and.w r3, r3, #512 @ 0x200 8001d7c: 617b str r3, [r7, #20] 8001d7e: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001d80: 4b2c ldr r3, [pc, #176] @ (8001e34 ) 8001d82: 699b ldr r3, [r3, #24] 8001d84: 4a2b ldr r2, [pc, #172] @ (8001e34 ) 8001d86: f043 0304 orr.w r3, r3, #4 8001d8a: 6193 str r3, [r2, #24] 8001d8c: 4b29 ldr r3, [pc, #164] @ (8001e34 ) 8001d8e: 699b ldr r3, [r3, #24] 8001d90: f003 0304 and.w r3, r3, #4 8001d94: 613b str r3, [r7, #16] 8001d96: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001d98: 4b26 ldr r3, [pc, #152] @ (8001e34 ) 8001d9a: 699b ldr r3, [r3, #24] 8001d9c: 4a25 ldr r2, [pc, #148] @ (8001e34 ) 8001d9e: f043 0308 orr.w r3, r3, #8 8001da2: 6193 str r3, [r2, #24] 8001da4: 4b23 ldr r3, [pc, #140] @ (8001e34 ) 8001da6: 699b ldr r3, [r3, #24] 8001da8: f003 0308 and.w r3, r3, #8 8001dac: 60fb str r3, [r7, #12] 8001dae: 68fb ldr r3, [r7, #12] PA5 ------> ADC1_IN5 PA6 ------> ADC1_IN6 PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin; 8001db0: 23f0 movs r3, #240 @ 0xf0 8001db2: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8001db4: 2303 movs r3, #3 8001db6: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001db8: f107 0318 add.w r3, r7, #24 8001dbc: 4619 mov r1, r3 8001dbe: 481e ldr r0, [pc, #120] @ (8001e38 ) 8001dc0: f001 fae6 bl 8003390 GPIO_InitStruct.Pin = ANEM_Pin; 8001dc4: 2301 movs r3, #1 8001dc6: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8001dc8: 2303 movs r3, #3 8001dca: 61fb str r3, [r7, #28] HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct); 8001dcc: f107 0318 add.w r3, r7, #24 8001dd0: 4619 mov r1, r3 8001dd2: 481a ldr r0, [pc, #104] @ (8001e3c ) 8001dd4: f001 fadc bl 8003390 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; 8001dd8: 4b19 ldr r3, [pc, #100] @ (8001e40 ) 8001dda: 4a1a ldr r2, [pc, #104] @ (8001e44 ) 8001ddc: 601a str r2, [r3, #0] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8001dde: 4b18 ldr r3, [pc, #96] @ (8001e40 ) 8001de0: 2200 movs r2, #0 8001de2: 605a str r2, [r3, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 8001de4: 4b16 ldr r3, [pc, #88] @ (8001e40 ) 8001de6: 2200 movs r2, #0 8001de8: 609a str r2, [r3, #8] hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8001dea: 4b15 ldr r3, [pc, #84] @ (8001e40 ) 8001dec: 2280 movs r2, #128 @ 0x80 8001dee: 60da str r2, [r3, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 8001df0: 4b13 ldr r3, [pc, #76] @ (8001e40 ) 8001df2: f44f 7280 mov.w r2, #256 @ 0x100 8001df6: 611a str r2, [r3, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 8001df8: 4b11 ldr r3, [pc, #68] @ (8001e40 ) 8001dfa: f44f 6280 mov.w r2, #1024 @ 0x400 8001dfe: 615a str r2, [r3, #20] hdma_adc1.Init.Mode = DMA_CIRCULAR; 8001e00: 4b0f ldr r3, [pc, #60] @ (8001e40 ) 8001e02: 2220 movs r2, #32 8001e04: 619a str r2, [r3, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 8001e06: 4b0e ldr r3, [pc, #56] @ (8001e40 ) 8001e08: 2200 movs r2, #0 8001e0a: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8001e0c: 480c ldr r0, [pc, #48] @ (8001e40 ) 8001e0e: f000 fed1 bl 8002bb4 8001e12: 4603 mov r3, r0 8001e14: 2b00 cmp r3, #0 8001e16: d001 beq.n 8001e1c { Error_Handler(); 8001e18: f7ff fd76 bl 8001908 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 8001e1c: 687b ldr r3, [r7, #4] 8001e1e: 4a08 ldr r2, [pc, #32] @ (8001e40 ) 8001e20: 621a str r2, [r3, #32] 8001e22: 4a07 ldr r2, [pc, #28] @ (8001e40 ) 8001e24: 687b ldr r3, [r7, #4] 8001e26: 6253 str r3, [r2, #36] @ 0x24 /* USER CODE END ADC1_MspInit 1 */ } } 8001e28: bf00 nop 8001e2a: 3728 adds r7, #40 @ 0x28 8001e2c: 46bd mov sp, r7 8001e2e: bd80 pop {r7, pc} 8001e30: 40012400 .word 0x40012400 8001e34: 40021000 .word 0x40021000 8001e38: 40010800 .word 0x40010800 8001e3c: 40010c00 .word 0x40010c00 8001e40: 200002bc .word 0x200002bc 8001e44: 40020008 .word 0x40020008 08001e48 : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 8001e48: b480 push {r7} 8001e4a: b085 sub sp, #20 8001e4c: af00 add r7, sp, #0 8001e4e: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM2) 8001e50: 687b ldr r3, [r7, #4] 8001e52: 681b ldr r3, [r3, #0] 8001e54: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8001e58: d10c bne.n 8001e74 { /* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE END TIM2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM2_CLK_ENABLE(); 8001e5a: 4b11 ldr r3, [pc, #68] @ (8001ea0 ) 8001e5c: 69db ldr r3, [r3, #28] 8001e5e: 4a10 ldr r2, [pc, #64] @ (8001ea0 ) 8001e60: f043 0301 orr.w r3, r3, #1 8001e64: 61d3 str r3, [r2, #28] 8001e66: 4b0e ldr r3, [pc, #56] @ (8001ea0 ) 8001e68: 69db ldr r3, [r3, #28] 8001e6a: f003 0301 and.w r3, r3, #1 8001e6e: 60fb str r3, [r7, #12] 8001e70: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 8001e72: e010 b.n 8001e96 else if(htim_base->Instance==TIM4) 8001e74: 687b ldr r3, [r7, #4] 8001e76: 681b ldr r3, [r3, #0] 8001e78: 4a0a ldr r2, [pc, #40] @ (8001ea4 ) 8001e7a: 4293 cmp r3, r2 8001e7c: d10b bne.n 8001e96 __HAL_RCC_TIM4_CLK_ENABLE(); 8001e7e: 4b08 ldr r3, [pc, #32] @ (8001ea0 ) 8001e80: 69db ldr r3, [r3, #28] 8001e82: 4a07 ldr r2, [pc, #28] @ (8001ea0 ) 8001e84: f043 0304 orr.w r3, r3, #4 8001e88: 61d3 str r3, [r2, #28] 8001e8a: 4b05 ldr r3, [pc, #20] @ (8001ea0 ) 8001e8c: 69db ldr r3, [r3, #28] 8001e8e: f003 0304 and.w r3, r3, #4 8001e92: 60bb str r3, [r7, #8] 8001e94: 68bb ldr r3, [r7, #8] } 8001e96: bf00 nop 8001e98: 3714 adds r7, #20 8001e9a: 46bd mov sp, r7 8001e9c: bc80 pop {r7} 8001e9e: 4770 bx lr 8001ea0: 40021000 .word 0x40021000 8001ea4: 40000800 .word 0x40000800 08001ea8 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 8001ea8: b580 push {r7, lr} 8001eaa: b088 sub sp, #32 8001eac: af00 add r7, sp, #0 8001eae: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001eb0: f107 0310 add.w r3, r7, #16 8001eb4: 2200 movs r2, #0 8001eb6: 601a str r2, [r3, #0] 8001eb8: 605a str r2, [r3, #4] 8001eba: 609a str r2, [r3, #8] 8001ebc: 60da str r2, [r3, #12] if(htim->Instance==TIM2) 8001ebe: 687b ldr r3, [r7, #4] 8001ec0: 681b ldr r3, [r3, #0] 8001ec2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8001ec6: d118 bne.n 8001efa { /* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8001ec8: 4b1d ldr r3, [pc, #116] @ (8001f40 ) 8001eca: 699b ldr r3, [r3, #24] 8001ecc: 4a1c ldr r2, [pc, #112] @ (8001f40 ) 8001ece: f043 0304 orr.w r3, r3, #4 8001ed2: 6193 str r3, [r2, #24] 8001ed4: 4b1a ldr r3, [pc, #104] @ (8001f40 ) 8001ed6: 699b ldr r3, [r3, #24] 8001ed8: f003 0304 and.w r3, r3, #4 8001edc: 60fb str r3, [r7, #12] 8001ede: 68fb ldr r3, [r7, #12] PA0-WKUP ------> TIM2_CH1 PA1 ------> TIM2_CH2 PA2 ------> TIM2_CH3 PA3 ------> TIM2_CH4 */ GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin; 8001ee0: 230f movs r3, #15 8001ee2: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001ee4: 2302 movs r3, #2 8001ee6: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001ee8: 2302 movs r3, #2 8001eea: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001eec: f107 0310 add.w r3, r7, #16 8001ef0: 4619 mov r1, r3 8001ef2: 4814 ldr r0, [pc, #80] @ (8001f44 ) 8001ef4: f001 fa4c bl 8003390 /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 8001ef8: e01d b.n 8001f36 else if(htim->Instance==TIM4) 8001efa: 687b ldr r3, [r7, #4] 8001efc: 681b ldr r3, [r3, #0] 8001efe: 4a12 ldr r2, [pc, #72] @ (8001f48 ) 8001f00: 4293 cmp r3, r2 8001f02: d118 bne.n 8001f36 __HAL_RCC_GPIOB_CLK_ENABLE(); 8001f04: 4b0e ldr r3, [pc, #56] @ (8001f40 ) 8001f06: 699b ldr r3, [r3, #24] 8001f08: 4a0d ldr r2, [pc, #52] @ (8001f40 ) 8001f0a: f043 0308 orr.w r3, r3, #8 8001f0e: 6193 str r3, [r2, #24] 8001f10: 4b0b ldr r3, [pc, #44] @ (8001f40 ) 8001f12: 699b ldr r3, [r3, #24] 8001f14: f003 0308 and.w r3, r3, #8 8001f18: 60bb str r3, [r7, #8] 8001f1a: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin; 8001f1c: f44f 7370 mov.w r3, #960 @ 0x3c0 8001f20: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001f22: 2302 movs r3, #2 8001f24: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001f26: 2302 movs r3, #2 8001f28: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001f2a: f107 0310 add.w r3, r7, #16 8001f2e: 4619 mov r1, r3 8001f30: 4806 ldr r0, [pc, #24] @ (8001f4c ) 8001f32: f001 fa2d bl 8003390 } 8001f36: bf00 nop 8001f38: 3720 adds r7, #32 8001f3a: 46bd mov sp, r7 8001f3c: bd80 pop {r7, pc} 8001f3e: bf00 nop 8001f40: 40021000 .word 0x40021000 8001f44: 40010800 .word 0x40010800 8001f48: 40000800 .word 0x40000800 8001f4c: 40010c00 .word 0x40010c00 08001f50 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8001f50: b580 push {r7, lr} 8001f52: b088 sub sp, #32 8001f54: af00 add r7, sp, #0 8001f56: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001f58: f107 0310 add.w r3, r7, #16 8001f5c: 2200 movs r2, #0 8001f5e: 601a str r2, [r3, #0] 8001f60: 605a str r2, [r3, #4] 8001f62: 609a str r2, [r3, #8] 8001f64: 60da str r2, [r3, #12] if(huart->Instance==USART1) 8001f66: 687b ldr r3, [r7, #4] 8001f68: 681b ldr r3, [r3, #0] 8001f6a: 4a1c ldr r2, [pc, #112] @ (8001fdc ) 8001f6c: 4293 cmp r3, r2 8001f6e: d131 bne.n 8001fd4 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8001f70: 4b1b ldr r3, [pc, #108] @ (8001fe0 ) 8001f72: 699b ldr r3, [r3, #24] 8001f74: 4a1a ldr r2, [pc, #104] @ (8001fe0 ) 8001f76: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8001f7a: 6193 str r3, [r2, #24] 8001f7c: 4b18 ldr r3, [pc, #96] @ (8001fe0 ) 8001f7e: 699b ldr r3, [r3, #24] 8001f80: f403 4380 and.w r3, r3, #16384 @ 0x4000 8001f84: 60fb str r3, [r7, #12] 8001f86: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001f88: 4b15 ldr r3, [pc, #84] @ (8001fe0 ) 8001f8a: 699b ldr r3, [r3, #24] 8001f8c: 4a14 ldr r2, [pc, #80] @ (8001fe0 ) 8001f8e: f043 0304 orr.w r3, r3, #4 8001f92: 6193 str r3, [r2, #24] 8001f94: 4b12 ldr r3, [pc, #72] @ (8001fe0 ) 8001f96: 699b ldr r3, [r3, #24] 8001f98: f003 0304 and.w r3, r3, #4 8001f9c: 60bb str r3, [r7, #8] 8001f9e: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; 8001fa0: f44f 7300 mov.w r3, #512 @ 0x200 8001fa4: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001fa6: 2302 movs r3, #2 8001fa8: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8001faa: 2303 movs r3, #3 8001fac: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001fae: f107 0310 add.w r3, r7, #16 8001fb2: 4619 mov r1, r3 8001fb4: 480b ldr r0, [pc, #44] @ (8001fe4 ) 8001fb6: f001 f9eb bl 8003390 GPIO_InitStruct.Pin = GPIO_PIN_10; 8001fba: f44f 6380 mov.w r3, #1024 @ 0x400 8001fbe: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001fc0: 2300 movs r3, #0 8001fc2: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001fc4: 2300 movs r3, #0 8001fc6: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001fc8: f107 0310 add.w r3, r7, #16 8001fcc: 4619 mov r1, r3 8001fce: 4805 ldr r0, [pc, #20] @ (8001fe4 ) 8001fd0: f001 f9de bl 8003390 /* USER CODE END USART1_MspInit 1 */ } } 8001fd4: bf00 nop 8001fd6: 3720 adds r7, #32 8001fd8: 46bd mov sp, r7 8001fda: bd80 pop {r7, pc} 8001fdc: 40013800 .word 0x40013800 8001fe0: 40021000 .word 0x40021000 8001fe4: 40010800 .word 0x40010800 08001fe8 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8001fe8: b480 push {r7} 8001fea: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8001fec: bf00 nop 8001fee: e7fd b.n 8001fec 08001ff0 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001ff0: b480 push {r7} 8001ff2: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8001ff4: bf00 nop 8001ff6: e7fd b.n 8001ff4 08001ff8 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001ff8: b480 push {r7} 8001ffa: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8001ffc: bf00 nop 8001ffe: e7fd b.n 8001ffc 08002000 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8002000: b480 push {r7} 8002002: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8002004: bf00 nop 8002006: e7fd b.n 8002004 08002008 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8002008: b480 push {r7} 800200a: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 800200c: bf00 nop 800200e: e7fd b.n 800200c 08002010 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8002010: b480 push {r7} 8002012: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8002014: bf00 nop 8002016: 46bd mov sp, r7 8002018: bc80 pop {r7} 800201a: 4770 bx lr 0800201c : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 800201c: b480 push {r7} 800201e: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8002020: bf00 nop 8002022: 46bd mov sp, r7 8002024: bc80 pop {r7} 8002026: 4770 bx lr 08002028 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8002028: b480 push {r7} 800202a: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 800202c: bf00 nop 800202e: 46bd mov sp, r7 8002030: bc80 pop {r7} 8002032: 4770 bx lr 08002034 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8002034: b580 push {r7, lr} 8002036: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8002038: f000 f8c0 bl 80021bc /* USER CODE BEGIN SysTick_IRQn 1 */ HAL_SYSTICK_IRQHandler(); 800203c: f000 fdb3 bl 8002ba6 /* USER CODE END SysTick_IRQn 1 */ } 8002040: bf00 nop 8002042: bd80 pop {r7, pc} 08002044 : /** * @brief This function handles DMA1 channel1 global interrupt. */ void DMA1_Channel1_IRQHandler(void) { 8002044: b580 push {r7, lr} 8002046: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 8002048: 4802 ldr r0, [pc, #8] @ (8002054 ) 800204a: f000 fe6d bl 8002d28 /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ /* USER CODE END DMA1_Channel1_IRQn 1 */ } 800204e: bf00 nop 8002050: bd80 pop {r7, pc} 8002052: bf00 nop 8002054: 200002bc .word 0x200002bc 08002058 : /** * @brief This function handles USB low priority or CAN RX0 interrupts. */ void USB_LP_CAN1_RX0_IRQHandler(void) { 8002058: b580 push {r7, lr} 800205a: af00 add r7, sp, #0 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */ HAL_PCD_IRQHandler(&hpcd_USB_FS); 800205c: 4802 ldr r0, [pc, #8] @ (8002068 ) 800205e: f001 fc7f bl 8003960 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */ } 8002062: bf00 nop 8002064: bd80 pop {r7, pc} 8002066: bf00 nop 8002068: 200011dc .word 0x200011dc 0800206c <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 800206c: b580 push {r7, lr} 800206e: b086 sub sp, #24 8002070: af00 add r7, sp, #0 8002072: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8002074: 4a14 ldr r2, [pc, #80] @ (80020c8 <_sbrk+0x5c>) 8002076: 4b15 ldr r3, [pc, #84] @ (80020cc <_sbrk+0x60>) 8002078: 1ad3 subs r3, r2, r3 800207a: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 800207c: 697b ldr r3, [r7, #20] 800207e: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8002080: 4b13 ldr r3, [pc, #76] @ (80020d0 <_sbrk+0x64>) 8002082: 681b ldr r3, [r3, #0] 8002084: 2b00 cmp r3, #0 8002086: d102 bne.n 800208e <_sbrk+0x22> { __sbrk_heap_end = &_end; 8002088: 4b11 ldr r3, [pc, #68] @ (80020d0 <_sbrk+0x64>) 800208a: 4a12 ldr r2, [pc, #72] @ (80020d4 <_sbrk+0x68>) 800208c: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 800208e: 4b10 ldr r3, [pc, #64] @ (80020d0 <_sbrk+0x64>) 8002090: 681a ldr r2, [r3, #0] 8002092: 687b ldr r3, [r7, #4] 8002094: 4413 add r3, r2 8002096: 693a ldr r2, [r7, #16] 8002098: 429a cmp r2, r3 800209a: d207 bcs.n 80020ac <_sbrk+0x40> { errno = ENOMEM; 800209c: f009 f8fc bl 800b298 <__errno> 80020a0: 4603 mov r3, r0 80020a2: 220c movs r2, #12 80020a4: 601a str r2, [r3, #0] return (void *)-1; 80020a6: f04f 33ff mov.w r3, #4294967295 80020aa: e009 b.n 80020c0 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 80020ac: 4b08 ldr r3, [pc, #32] @ (80020d0 <_sbrk+0x64>) 80020ae: 681b ldr r3, [r3, #0] 80020b0: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 80020b2: 4b07 ldr r3, [pc, #28] @ (80020d0 <_sbrk+0x64>) 80020b4: 681a ldr r2, [r3, #0] 80020b6: 687b ldr r3, [r7, #4] 80020b8: 4413 add r3, r2 80020ba: 4a05 ldr r2, [pc, #20] @ (80020d0 <_sbrk+0x64>) 80020bc: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 80020be: 68fb ldr r3, [r7, #12] } 80020c0: 4618 mov r0, r3 80020c2: 3718 adds r7, #24 80020c4: 46bd mov sp, r7 80020c6: bd80 pop {r7, pc} 80020c8: 20005000 .word 0x20005000 80020cc: 00000400 .word 0x00000400 80020d0: 200003e4 .word 0x200003e4 80020d4: 20001820 .word 0x20001820 080020d8 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 80020d8: b480 push {r7} 80020da: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 80020dc: bf00 nop 80020de: 46bd mov sp, r7 80020e0: bc80 pop {r7} 80020e2: 4770 bx lr 080020e4 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 80020e4: f7ff fff8 bl 80020d8 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 80020e8: 480b ldr r0, [pc, #44] @ (8002118 ) ldr r1, =_edata 80020ea: 490c ldr r1, [pc, #48] @ (800211c ) ldr r2, =_sidata 80020ec: 4a0c ldr r2, [pc, #48] @ (8002120 ) movs r3, #0 80020ee: 2300 movs r3, #0 b LoopCopyDataInit 80020f0: e002 b.n 80020f8 080020f2 : CopyDataInit: ldr r4, [r2, r3] 80020f2: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 80020f4: 50c4 str r4, [r0, r3] adds r3, r3, #4 80020f6: 3304 adds r3, #4 080020f8 : LoopCopyDataInit: adds r4, r0, r3 80020f8: 18c4 adds r4, r0, r3 cmp r4, r1 80020fa: 428c cmp r4, r1 bcc CopyDataInit 80020fc: d3f9 bcc.n 80020f2 /* Zero fill the bss segment. */ ldr r2, =_sbss 80020fe: 4a09 ldr r2, [pc, #36] @ (8002124 ) ldr r4, =_ebss 8002100: 4c09 ldr r4, [pc, #36] @ (8002128 ) movs r3, #0 8002102: 2300 movs r3, #0 b LoopFillZerobss 8002104: e001 b.n 800210a 08002106 : FillZerobss: str r3, [r2] 8002106: 6013 str r3, [r2, #0] adds r2, r2, #4 8002108: 3204 adds r2, #4 0800210a : LoopFillZerobss: cmp r2, r4 800210a: 42a2 cmp r2, r4 bcc FillZerobss 800210c: d3fb bcc.n 8002106 /* Call static constructors */ bl __libc_init_array 800210e: f009 f8c9 bl 800b2a4 <__libc_init_array> /* Call the application's entry point.*/ bl main 8002112: f7ff f893 bl 800123c
bx lr 8002116: 4770 bx lr ldr r0, =_sdata 8002118: 20000000 .word 0x20000000 ldr r1, =_edata 800211c: 200001d0 .word 0x200001d0 ldr r2, =_sidata 8002120: 0800be98 .word 0x0800be98 ldr r2, =_sbss 8002124: 200001d0 .word 0x200001d0 ldr r4, =_ebss 8002128: 2000181c .word 0x2000181c 0800212c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800212c: e7fe b.n 800212c ... 08002130 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8002130: b580 push {r7, lr} 8002132: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8002134: 4b08 ldr r3, [pc, #32] @ (8002158 ) 8002136: 681b ldr r3, [r3, #0] 8002138: 4a07 ldr r2, [pc, #28] @ (8002158 ) 800213a: f043 0310 orr.w r3, r3, #16 800213e: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8002140: 2003 movs r0, #3 8002142: f000 fcef bl 8002b24 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8002146: 200f movs r0, #15 8002148: f000 f808 bl 800215c /* Init the low level hardware */ HAL_MspInit(); 800214c: f7ff fdca bl 8001ce4 /* Return function status */ return HAL_OK; 8002150: 2300 movs r3, #0 } 8002152: 4618 mov r0, r3 8002154: bd80 pop {r7, pc} 8002156: bf00 nop 8002158: 40022000 .word 0x40022000 0800215c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800215c: b580 push {r7, lr} 800215e: b082 sub sp, #8 8002160: af00 add r7, sp, #0 8002162: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8002164: 4b12 ldr r3, [pc, #72] @ (80021b0 ) 8002166: 681a ldr r2, [r3, #0] 8002168: 4b12 ldr r3, [pc, #72] @ (80021b4 ) 800216a: 781b ldrb r3, [r3, #0] 800216c: 4619 mov r1, r3 800216e: f44f 737a mov.w r3, #1000 @ 0x3e8 8002172: fbb3 f3f1 udiv r3, r3, r1 8002176: fbb2 f3f3 udiv r3, r2, r3 800217a: 4618 mov r0, r3 800217c: f000 fd07 bl 8002b8e 8002180: 4603 mov r3, r0 8002182: 2b00 cmp r3, #0 8002184: d001 beq.n 800218a { return HAL_ERROR; 8002186: 2301 movs r3, #1 8002188: e00e b.n 80021a8 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800218a: 687b ldr r3, [r7, #4] 800218c: 2b0f cmp r3, #15 800218e: d80a bhi.n 80021a6 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8002190: 2200 movs r2, #0 8002192: 6879 ldr r1, [r7, #4] 8002194: f04f 30ff mov.w r0, #4294967295 8002198: f000 fccf bl 8002b3a uwTickPrio = TickPriority; 800219c: 4a06 ldr r2, [pc, #24] @ (80021b8 ) 800219e: 687b ldr r3, [r7, #4] 80021a0: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 80021a2: 2300 movs r3, #0 80021a4: e000 b.n 80021a8 return HAL_ERROR; 80021a6: 2301 movs r3, #1 } 80021a8: 4618 mov r0, r3 80021aa: 3708 adds r7, #8 80021ac: 46bd mov sp, r7 80021ae: bd80 pop {r7, pc} 80021b0: 20000004 .word 0x20000004 80021b4: 2000000c .word 0x2000000c 80021b8: 20000008 .word 0x20000008 080021bc : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 80021bc: b480 push {r7} 80021be: af00 add r7, sp, #0 uwTick += uwTickFreq; 80021c0: 4b05 ldr r3, [pc, #20] @ (80021d8 ) 80021c2: 781b ldrb r3, [r3, #0] 80021c4: 461a mov r2, r3 80021c6: 4b05 ldr r3, [pc, #20] @ (80021dc ) 80021c8: 681b ldr r3, [r3, #0] 80021ca: 4413 add r3, r2 80021cc: 4a03 ldr r2, [pc, #12] @ (80021dc ) 80021ce: 6013 str r3, [r2, #0] } 80021d0: bf00 nop 80021d2: 46bd mov sp, r7 80021d4: bc80 pop {r7} 80021d6: 4770 bx lr 80021d8: 2000000c .word 0x2000000c 80021dc: 200003e8 .word 0x200003e8 080021e0 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 80021e0: b480 push {r7} 80021e2: af00 add r7, sp, #0 return uwTick; 80021e4: 4b02 ldr r3, [pc, #8] @ (80021f0 ) 80021e6: 681b ldr r3, [r3, #0] } 80021e8: 4618 mov r0, r3 80021ea: 46bd mov sp, r7 80021ec: bc80 pop {r7} 80021ee: 4770 bx lr 80021f0: 200003e8 .word 0x200003e8 080021f4 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 80021f4: b580 push {r7, lr} 80021f6: b086 sub sp, #24 80021f8: af00 add r7, sp, #0 80021fa: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80021fc: 2300 movs r3, #0 80021fe: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 8002200: 2300 movs r3, #0 8002202: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 8002204: 2300 movs r3, #0 8002206: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 8002208: 2300 movs r3, #0 800220a: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 800220c: 687b ldr r3, [r7, #4] 800220e: 2b00 cmp r3, #0 8002210: d101 bne.n 8002216 { return HAL_ERROR; 8002212: 2301 movs r3, #1 8002214: e0be b.n 8002394 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 8002216: 687b ldr r3, [r7, #4] 8002218: 689b ldr r3, [r3, #8] 800221a: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 800221c: 687b ldr r3, [r7, #4] 800221e: 6a9b ldr r3, [r3, #40] @ 0x28 8002220: 2b00 cmp r3, #0 8002222: d109 bne.n 8002238 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 8002224: 687b ldr r3, [r7, #4] 8002226: 2200 movs r2, #0 8002228: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 800222a: 687b ldr r3, [r7, #4] 800222c: 2200 movs r2, #0 800222e: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 8002232: 6878 ldr r0, [r7, #4] 8002234: f7ff fd88 bl 8001d48 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8002238: 6878 ldr r0, [r7, #4] 800223a: f000 faff bl 800283c 800223e: 4603 mov r3, r0 8002240: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 8002242: 687b ldr r3, [r7, #4] 8002244: 6a9b ldr r3, [r3, #40] @ 0x28 8002246: f003 0310 and.w r3, r3, #16 800224a: 2b00 cmp r3, #0 800224c: f040 8099 bne.w 8002382 8002250: 7dfb ldrb r3, [r7, #23] 8002252: 2b00 cmp r3, #0 8002254: f040 8095 bne.w 8002382 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8002258: 687b ldr r3, [r7, #4] 800225a: 6a9b ldr r3, [r3, #40] @ 0x28 800225c: f423 5388 bic.w r3, r3, #4352 @ 0x1100 8002260: f023 0302 bic.w r3, r3, #2 8002264: f043 0202 orr.w r2, r3, #2 8002268: 687b ldr r3, [r7, #4] 800226a: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 800226c: 687b ldr r3, [r7, #4] 800226e: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8002270: 687b ldr r3, [r7, #4] 8002272: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 8002274: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 8002276: 687b ldr r3, [r7, #4] 8002278: 7b1b ldrb r3, [r3, #12] 800227a: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800227c: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 800227e: 68ba ldr r2, [r7, #8] 8002280: 4313 orrs r3, r2 8002282: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 8002284: 687b ldr r3, [r7, #4] 8002286: 689b ldr r3, [r3, #8] 8002288: f5b3 7f80 cmp.w r3, #256 @ 0x100 800228c: d003 beq.n 8002296 800228e: 687b ldr r3, [r7, #4] 8002290: 689b ldr r3, [r3, #8] 8002292: 2b01 cmp r3, #1 8002294: d102 bne.n 800229c 8002296: f44f 7380 mov.w r3, #256 @ 0x100 800229a: e000 b.n 800229e 800229c: 2300 movs r3, #0 800229e: 693a ldr r2, [r7, #16] 80022a0: 4313 orrs r3, r2 80022a2: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 80022a4: 687b ldr r3, [r7, #4] 80022a6: 7d1b ldrb r3, [r3, #20] 80022a8: 2b01 cmp r3, #1 80022aa: d119 bne.n 80022e0 { if (hadc->Init.ContinuousConvMode == DISABLE) 80022ac: 687b ldr r3, [r7, #4] 80022ae: 7b1b ldrb r3, [r3, #12] 80022b0: 2b00 cmp r3, #0 80022b2: d109 bne.n 80022c8 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 80022b4: 687b ldr r3, [r7, #4] 80022b6: 699b ldr r3, [r3, #24] 80022b8: 3b01 subs r3, #1 80022ba: 035a lsls r2, r3, #13 80022bc: 693b ldr r3, [r7, #16] 80022be: 4313 orrs r3, r2 80022c0: f443 6300 orr.w r3, r3, #2048 @ 0x800 80022c4: 613b str r3, [r7, #16] 80022c6: e00b b.n 80022e0 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 80022c8: 687b ldr r3, [r7, #4] 80022ca: 6a9b ldr r3, [r3, #40] @ 0x28 80022cc: f043 0220 orr.w r2, r3, #32 80022d0: 687b ldr r3, [r7, #4] 80022d2: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80022d4: 687b ldr r3, [r7, #4] 80022d6: 6adb ldr r3, [r3, #44] @ 0x2c 80022d8: f043 0201 orr.w r2, r3, #1 80022dc: 687b ldr r3, [r7, #4] 80022de: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 80022e0: 687b ldr r3, [r7, #4] 80022e2: 681b ldr r3, [r3, #0] 80022e4: 685b ldr r3, [r3, #4] 80022e6: f423 4169 bic.w r1, r3, #59648 @ 0xe900 80022ea: 687b ldr r3, [r7, #4] 80022ec: 681b ldr r3, [r3, #0] 80022ee: 693a ldr r2, [r7, #16] 80022f0: 430a orrs r2, r1 80022f2: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 80022f4: 687b ldr r3, [r7, #4] 80022f6: 681b ldr r3, [r3, #0] 80022f8: 689a ldr r2, [r3, #8] 80022fa: 4b28 ldr r3, [pc, #160] @ (800239c ) 80022fc: 4013 ands r3, r2 80022fe: 687a ldr r2, [r7, #4] 8002300: 6812 ldr r2, [r2, #0] 8002302: 68b9 ldr r1, [r7, #8] 8002304: 430b orrs r3, r1 8002306: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 8002308: 687b ldr r3, [r7, #4] 800230a: 689b ldr r3, [r3, #8] 800230c: f5b3 7f80 cmp.w r3, #256 @ 0x100 8002310: d003 beq.n 800231a 8002312: 687b ldr r3, [r7, #4] 8002314: 689b ldr r3, [r3, #8] 8002316: 2b01 cmp r3, #1 8002318: d104 bne.n 8002324 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 800231a: 687b ldr r3, [r7, #4] 800231c: 691b ldr r3, [r3, #16] 800231e: 3b01 subs r3, #1 8002320: 051b lsls r3, r3, #20 8002322: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 8002324: 687b ldr r3, [r7, #4] 8002326: 681b ldr r3, [r3, #0] 8002328: 6adb ldr r3, [r3, #44] @ 0x2c 800232a: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 800232e: 687b ldr r3, [r7, #4] 8002330: 681b ldr r3, [r3, #0] 8002332: 68fa ldr r2, [r7, #12] 8002334: 430a orrs r2, r1 8002336: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002338: 687b ldr r3, [r7, #4] 800233a: 681b ldr r3, [r3, #0] 800233c: 689a ldr r2, [r3, #8] 800233e: 4b18 ldr r3, [pc, #96] @ (80023a0 ) 8002340: 4013 ands r3, r2 8002342: 68ba ldr r2, [r7, #8] 8002344: 429a cmp r2, r3 8002346: d10b bne.n 8002360 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 8002348: 687b ldr r3, [r7, #4] 800234a: 2200 movs r2, #0 800234c: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 800234e: 687b ldr r3, [r7, #4] 8002350: 6a9b ldr r3, [r3, #40] @ 0x28 8002352: f023 0303 bic.w r3, r3, #3 8002356: f043 0201 orr.w r2, r3, #1 800235a: 687b ldr r3, [r7, #4] 800235c: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800235e: e018 b.n 8002392 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 8002360: 687b ldr r3, [r7, #4] 8002362: 6a9b ldr r3, [r3, #40] @ 0x28 8002364: f023 0312 bic.w r3, r3, #18 8002368: f043 0210 orr.w r2, r3, #16 800236c: 687b ldr r3, [r7, #4] 800236e: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002370: 687b ldr r3, [r7, #4] 8002372: 6adb ldr r3, [r3, #44] @ 0x2c 8002374: f043 0201 orr.w r2, r3, #1 8002378: 687b ldr r3, [r7, #4] 800237a: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 800237c: 2301 movs r3, #1 800237e: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002380: e007 b.n 8002392 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8002382: 687b ldr r3, [r7, #4] 8002384: 6a9b ldr r3, [r3, #40] @ 0x28 8002386: f043 0210 orr.w r2, r3, #16 800238a: 687b ldr r3, [r7, #4] 800238c: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 800238e: 2301 movs r3, #1 8002390: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8002392: 7dfb ldrb r3, [r7, #23] } 8002394: 4618 mov r0, r3 8002396: 3718 adds r7, #24 8002398: 46bd mov sp, r7 800239a: bd80 pop {r7, pc} 800239c: ffe1f7fd .word 0xffe1f7fd 80023a0: ff1f0efe .word 0xff1f0efe 080023a4 : * @param pData: The destination Buffer address. * @param Length: The length of data to be transferred from ADC peripheral to memory. * @retval None */ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { 80023a4: b580 push {r7, lr} 80023a6: b086 sub sp, #24 80023a8: af00 add r7, sp, #0 80023aa: 60f8 str r0, [r7, #12] 80023ac: 60b9 str r1, [r7, #8] 80023ae: 607a str r2, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80023b0: 2300 movs r3, #0 80023b2: 75fb strb r3, [r7, #23] assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance)); /* Verification if multimode is disabled (for devices with several ADC) */ /* If multimode is enabled, dedicated function multimode conversion */ /* start DMA must be used. */ if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 80023b4: 68fb ldr r3, [r7, #12] 80023b6: 681b ldr r3, [r3, #0] 80023b8: 4a64 ldr r2, [pc, #400] @ (800254c ) 80023ba: 4293 cmp r3, r2 80023bc: d004 beq.n 80023c8 80023be: 68fb ldr r3, [r7, #12] 80023c0: 681b ldr r3, [r3, #0] 80023c2: 4a63 ldr r2, [pc, #396] @ (8002550 ) 80023c4: 4293 cmp r3, r2 80023c6: d106 bne.n 80023d6 80023c8: 4b60 ldr r3, [pc, #384] @ (800254c ) 80023ca: 685b ldr r3, [r3, #4] 80023cc: f403 2370 and.w r3, r3, #983040 @ 0xf0000 80023d0: 2b00 cmp r3, #0 80023d2: f040 80b3 bne.w 800253c { /* Process locked */ __HAL_LOCK(hadc); 80023d6: 68fb ldr r3, [r7, #12] 80023d8: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 80023dc: 2b01 cmp r3, #1 80023de: d101 bne.n 80023e4 80023e0: 2302 movs r3, #2 80023e2: e0ae b.n 8002542 80023e4: 68fb ldr r3, [r7, #12] 80023e6: 2201 movs r2, #1 80023e8: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 80023ec: 68f8 ldr r0, [r7, #12] 80023ee: f000 f9cb bl 8002788 80023f2: 4603 mov r3, r0 80023f4: 75fb strb r3, [r7, #23] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 80023f6: 7dfb ldrb r3, [r7, #23] 80023f8: 2b00 cmp r3, #0 80023fa: f040 809a bne.w 8002532 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 80023fe: 68fb ldr r3, [r7, #12] 8002400: 6a9b ldr r3, [r3, #40] @ 0x28 8002402: f423 6370 bic.w r3, r3, #3840 @ 0xf00 8002406: f023 0301 bic.w r3, r3, #1 800240a: f443 7280 orr.w r2, r3, #256 @ 0x100 800240e: 68fb ldr r3, [r7, #12] 8002410: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8002412: 68fb ldr r3, [r7, #12] 8002414: 681b ldr r3, [r3, #0] 8002416: 4a4e ldr r2, [pc, #312] @ (8002550 ) 8002418: 4293 cmp r3, r2 800241a: d105 bne.n 8002428 800241c: 4b4b ldr r3, [pc, #300] @ (800254c ) 800241e: 685b ldr r3, [r3, #4] 8002420: f403 2370 and.w r3, r3, #983040 @ 0xf0000 8002424: 2b00 cmp r3, #0 8002426: d115 bne.n 8002454 { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8002428: 68fb ldr r3, [r7, #12] 800242a: 6a9b ldr r3, [r3, #40] @ 0x28 800242c: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 8002430: 68fb ldr r3, [r7, #12] 8002432: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 8002434: 68fb ldr r3, [r7, #12] 8002436: 681b ldr r3, [r3, #0] 8002438: 685b ldr r3, [r3, #4] 800243a: f403 6380 and.w r3, r3, #1024 @ 0x400 800243e: 2b00 cmp r3, #0 8002440: d026 beq.n 8002490 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 8002442: 68fb ldr r3, [r7, #12] 8002444: 6a9b ldr r3, [r3, #40] @ 0x28 8002446: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800244a: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800244e: 68fb ldr r3, [r7, #12] 8002450: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 8002452: e01d b.n 8002490 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8002454: 68fb ldr r3, [r7, #12] 8002456: 6a9b ldr r3, [r3, #40] @ 0x28 8002458: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800245c: 68fb ldr r3, [r7, #12] 800245e: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 8002460: 68fb ldr r3, [r7, #12] 8002462: 681b ldr r3, [r3, #0] 8002464: 4a39 ldr r2, [pc, #228] @ (800254c ) 8002466: 4293 cmp r3, r2 8002468: d004 beq.n 8002474 800246a: 68fb ldr r3, [r7, #12] 800246c: 681b ldr r3, [r3, #0] 800246e: 4a38 ldr r2, [pc, #224] @ (8002550 ) 8002470: 4293 cmp r3, r2 8002472: d10d bne.n 8002490 8002474: 4b35 ldr r3, [pc, #212] @ (800254c ) 8002476: 685b ldr r3, [r3, #4] 8002478: f403 6380 and.w r3, r3, #1024 @ 0x400 800247c: 2b00 cmp r3, #0 800247e: d007 beq.n 8002490 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 8002480: 68fb ldr r3, [r7, #12] 8002482: 6a9b ldr r3, [r3, #40] @ 0x28 8002484: f423 5340 bic.w r3, r3, #12288 @ 0x3000 8002488: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800248c: 68fb ldr r3, [r7, #12] 800248e: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8002490: 68fb ldr r3, [r7, #12] 8002492: 6a9b ldr r3, [r3, #40] @ 0x28 8002494: f403 5380 and.w r3, r3, #4096 @ 0x1000 8002498: 2b00 cmp r3, #0 800249a: d006 beq.n 80024aa { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 800249c: 68fb ldr r3, [r7, #12] 800249e: 6adb ldr r3, [r3, #44] @ 0x2c 80024a0: f023 0206 bic.w r2, r3, #6 80024a4: 68fb ldr r3, [r7, #12] 80024a6: 62da str r2, [r3, #44] @ 0x2c 80024a8: e002 b.n 80024b0 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 80024aa: 68fb ldr r3, [r7, #12] 80024ac: 2200 movs r2, #0 80024ae: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 80024b0: 68fb ldr r3, [r7, #12] 80024b2: 2200 movs r2, #0 80024b4: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Set the DMA transfer complete callback */ hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 80024b8: 68fb ldr r3, [r7, #12] 80024ba: 6a1b ldr r3, [r3, #32] 80024bc: 4a25 ldr r2, [pc, #148] @ (8002554 ) 80024be: 629a str r2, [r3, #40] @ 0x28 /* Set the DMA half transfer complete callback */ hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 80024c0: 68fb ldr r3, [r7, #12] 80024c2: 6a1b ldr r3, [r3, #32] 80024c4: 4a24 ldr r2, [pc, #144] @ (8002558 ) 80024c6: 62da str r2, [r3, #44] @ 0x2c /* Set the DMA error callback */ hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 80024c8: 68fb ldr r3, [r7, #12] 80024ca: 6a1b ldr r3, [r3, #32] 80024cc: 4a23 ldr r2, [pc, #140] @ (800255c ) 80024ce: 631a str r2, [r3, #48] @ 0x30 /* start (in case of SW start): */ /* Clear regular group conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC */ /* operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 80024d0: 68fb ldr r3, [r7, #12] 80024d2: 681b ldr r3, [r3, #0] 80024d4: f06f 0202 mvn.w r2, #2 80024d8: 601a str r2, [r3, #0] /* Enable ADC DMA mode */ SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 80024da: 68fb ldr r3, [r7, #12] 80024dc: 681b ldr r3, [r3, #0] 80024de: 689a ldr r2, [r3, #8] 80024e0: 68fb ldr r3, [r7, #12] 80024e2: 681b ldr r3, [r3, #0] 80024e4: f442 7280 orr.w r2, r2, #256 @ 0x100 80024e8: 609a str r2, [r3, #8] /* Start the DMA channel */ HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 80024ea: 68fb ldr r3, [r7, #12] 80024ec: 6a18 ldr r0, [r3, #32] 80024ee: 68fb ldr r3, [r7, #12] 80024f0: 681b ldr r3, [r3, #0] 80024f2: 334c adds r3, #76 @ 0x4c 80024f4: 4619 mov r1, r3 80024f6: 68ba ldr r2, [r7, #8] 80024f8: 687b ldr r3, [r7, #4] 80024fa: f000 fbb5 bl 8002c68 /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ /* If external trigger has been selected, conversion will start at next */ /* trigger event. */ if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) 80024fe: 68fb ldr r3, [r7, #12] 8002500: 681b ldr r3, [r3, #0] 8002502: 689b ldr r3, [r3, #8] 8002504: f403 2360 and.w r3, r3, #917504 @ 0xe0000 8002508: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800250c: d108 bne.n 8002520 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 800250e: 68fb ldr r3, [r7, #12] 8002510: 681b ldr r3, [r3, #0] 8002512: 689a ldr r2, [r3, #8] 8002514: 68fb ldr r3, [r7, #12] 8002516: 681b ldr r3, [r3, #0] 8002518: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 800251c: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 800251e: e00f b.n 8002540 } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 8002520: 68fb ldr r3, [r7, #12] 8002522: 681b ldr r3, [r3, #0] 8002524: 689a ldr r2, [r3, #8] 8002526: 68fb ldr r3, [r7, #12] 8002528: 681b ldr r3, [r3, #0] 800252a: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 800252e: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 8002530: e006 b.n 8002540 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 8002532: 68fb ldr r3, [r7, #12] 8002534: 2200 movs r2, #0 8002536: f883 2024 strb.w r2, [r3, #36] @ 0x24 if (tmp_hal_status == HAL_OK) 800253a: e001 b.n 8002540 } } else { tmp_hal_status = HAL_ERROR; 800253c: 2301 movs r3, #1 800253e: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8002540: 7dfb ldrb r3, [r7, #23] } 8002542: 4618 mov r0, r3 8002544: 3718 adds r7, #24 8002546: 46bd mov sp, r7 8002548: bd80 pop {r7, pc} 800254a: bf00 nop 800254c: 40012400 .word 0x40012400 8002550: 40012800 .word 0x40012800 8002554: 080028bf .word 0x080028bf 8002558: 0800293b .word 0x0800293b 800255c: 08002957 .word 0x08002957 08002560 : * @brief Conversion complete callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { 8002560: b480 push {r7} 8002562: b083 sub sp, #12 8002564: af00 add r7, sp, #0 8002566: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvCpltCallback must be implemented in the user file. */ } 8002568: bf00 nop 800256a: 370c adds r7, #12 800256c: 46bd mov sp, r7 800256e: bc80 pop {r7} 8002570: 4770 bx lr 08002572 : * @brief Conversion DMA half-transfer callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) { 8002572: b480 push {r7} 8002574: b083 sub sp, #12 8002576: af00 add r7, sp, #0 8002578: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. */ } 800257a: bf00 nop 800257c: 370c adds r7, #12 800257e: 46bd mov sp, r7 8002580: bc80 pop {r7} 8002582: 4770 bx lr 08002584 : * (ADC conversion with interruption or transfer by DMA) * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) { 8002584: b480 push {r7} 8002586: b083 sub sp, #12 8002588: af00 add r7, sp, #0 800258a: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ErrorCallback must be implemented in the user file. */ } 800258c: bf00 nop 800258e: 370c adds r7, #12 8002590: 46bd mov sp, r7 8002592: bc80 pop {r7} 8002594: 4770 bx lr ... 08002598 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 8002598: b480 push {r7} 800259a: b085 sub sp, #20 800259c: af00 add r7, sp, #0 800259e: 6078 str r0, [r7, #4] 80025a0: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80025a2: 2300 movs r3, #0 80025a4: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 80025a6: 2300 movs r3, #0 80025a8: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 80025aa: 687b ldr r3, [r7, #4] 80025ac: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 80025b0: 2b01 cmp r3, #1 80025b2: d101 bne.n 80025b8 80025b4: 2302 movs r3, #2 80025b6: e0dc b.n 8002772 80025b8: 687b ldr r3, [r7, #4] 80025ba: 2201 movs r2, #1 80025bc: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 80025c0: 683b ldr r3, [r7, #0] 80025c2: 685b ldr r3, [r3, #4] 80025c4: 2b06 cmp r3, #6 80025c6: d81c bhi.n 8002602 { MODIFY_REG(hadc->Instance->SQR3 , 80025c8: 687b ldr r3, [r7, #4] 80025ca: 681b ldr r3, [r3, #0] 80025cc: 6b59 ldr r1, [r3, #52] @ 0x34 80025ce: 683b ldr r3, [r7, #0] 80025d0: 685a ldr r2, [r3, #4] 80025d2: 4613 mov r3, r2 80025d4: 009b lsls r3, r3, #2 80025d6: 4413 add r3, r2 80025d8: 3b05 subs r3, #5 80025da: 221f movs r2, #31 80025dc: fa02 f303 lsl.w r3, r2, r3 80025e0: 43db mvns r3, r3 80025e2: 4019 ands r1, r3 80025e4: 683b ldr r3, [r7, #0] 80025e6: 6818 ldr r0, [r3, #0] 80025e8: 683b ldr r3, [r7, #0] 80025ea: 685a ldr r2, [r3, #4] 80025ec: 4613 mov r3, r2 80025ee: 009b lsls r3, r3, #2 80025f0: 4413 add r3, r2 80025f2: 3b05 subs r3, #5 80025f4: fa00 f203 lsl.w r2, r0, r3 80025f8: 687b ldr r3, [r7, #4] 80025fa: 681b ldr r3, [r3, #0] 80025fc: 430a orrs r2, r1 80025fe: 635a str r2, [r3, #52] @ 0x34 8002600: e03c b.n 800267c ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 8002602: 683b ldr r3, [r7, #0] 8002604: 685b ldr r3, [r3, #4] 8002606: 2b0c cmp r3, #12 8002608: d81c bhi.n 8002644 { MODIFY_REG(hadc->Instance->SQR2 , 800260a: 687b ldr r3, [r7, #4] 800260c: 681b ldr r3, [r3, #0] 800260e: 6b19 ldr r1, [r3, #48] @ 0x30 8002610: 683b ldr r3, [r7, #0] 8002612: 685a ldr r2, [r3, #4] 8002614: 4613 mov r3, r2 8002616: 009b lsls r3, r3, #2 8002618: 4413 add r3, r2 800261a: 3b23 subs r3, #35 @ 0x23 800261c: 221f movs r2, #31 800261e: fa02 f303 lsl.w r3, r2, r3 8002622: 43db mvns r3, r3 8002624: 4019 ands r1, r3 8002626: 683b ldr r3, [r7, #0] 8002628: 6818 ldr r0, [r3, #0] 800262a: 683b ldr r3, [r7, #0] 800262c: 685a ldr r2, [r3, #4] 800262e: 4613 mov r3, r2 8002630: 009b lsls r3, r3, #2 8002632: 4413 add r3, r2 8002634: 3b23 subs r3, #35 @ 0x23 8002636: fa00 f203 lsl.w r2, r0, r3 800263a: 687b ldr r3, [r7, #4] 800263c: 681b ldr r3, [r3, #0] 800263e: 430a orrs r2, r1 8002640: 631a str r2, [r3, #48] @ 0x30 8002642: e01b b.n 800267c ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 8002644: 687b ldr r3, [r7, #4] 8002646: 681b ldr r3, [r3, #0] 8002648: 6ad9 ldr r1, [r3, #44] @ 0x2c 800264a: 683b ldr r3, [r7, #0] 800264c: 685a ldr r2, [r3, #4] 800264e: 4613 mov r3, r2 8002650: 009b lsls r3, r3, #2 8002652: 4413 add r3, r2 8002654: 3b41 subs r3, #65 @ 0x41 8002656: 221f movs r2, #31 8002658: fa02 f303 lsl.w r3, r2, r3 800265c: 43db mvns r3, r3 800265e: 4019 ands r1, r3 8002660: 683b ldr r3, [r7, #0] 8002662: 6818 ldr r0, [r3, #0] 8002664: 683b ldr r3, [r7, #0] 8002666: 685a ldr r2, [r3, #4] 8002668: 4613 mov r3, r2 800266a: 009b lsls r3, r3, #2 800266c: 4413 add r3, r2 800266e: 3b41 subs r3, #65 @ 0x41 8002670: fa00 f203 lsl.w r2, r0, r3 8002674: 687b ldr r3, [r7, #4] 8002676: 681b ldr r3, [r3, #0] 8002678: 430a orrs r2, r1 800267a: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 800267c: 683b ldr r3, [r7, #0] 800267e: 681b ldr r3, [r3, #0] 8002680: 2b09 cmp r3, #9 8002682: d91c bls.n 80026be { MODIFY_REG(hadc->Instance->SMPR1 , 8002684: 687b ldr r3, [r7, #4] 8002686: 681b ldr r3, [r3, #0] 8002688: 68d9 ldr r1, [r3, #12] 800268a: 683b ldr r3, [r7, #0] 800268c: 681a ldr r2, [r3, #0] 800268e: 4613 mov r3, r2 8002690: 005b lsls r3, r3, #1 8002692: 4413 add r3, r2 8002694: 3b1e subs r3, #30 8002696: 2207 movs r2, #7 8002698: fa02 f303 lsl.w r3, r2, r3 800269c: 43db mvns r3, r3 800269e: 4019 ands r1, r3 80026a0: 683b ldr r3, [r7, #0] 80026a2: 6898 ldr r0, [r3, #8] 80026a4: 683b ldr r3, [r7, #0] 80026a6: 681a ldr r2, [r3, #0] 80026a8: 4613 mov r3, r2 80026aa: 005b lsls r3, r3, #1 80026ac: 4413 add r3, r2 80026ae: 3b1e subs r3, #30 80026b0: fa00 f203 lsl.w r2, r0, r3 80026b4: 687b ldr r3, [r7, #4] 80026b6: 681b ldr r3, [r3, #0] 80026b8: 430a orrs r2, r1 80026ba: 60da str r2, [r3, #12] 80026bc: e019 b.n 80026f2 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 80026be: 687b ldr r3, [r7, #4] 80026c0: 681b ldr r3, [r3, #0] 80026c2: 6919 ldr r1, [r3, #16] 80026c4: 683b ldr r3, [r7, #0] 80026c6: 681a ldr r2, [r3, #0] 80026c8: 4613 mov r3, r2 80026ca: 005b lsls r3, r3, #1 80026cc: 4413 add r3, r2 80026ce: 2207 movs r2, #7 80026d0: fa02 f303 lsl.w r3, r2, r3 80026d4: 43db mvns r3, r3 80026d6: 4019 ands r1, r3 80026d8: 683b ldr r3, [r7, #0] 80026da: 6898 ldr r0, [r3, #8] 80026dc: 683b ldr r3, [r7, #0] 80026de: 681a ldr r2, [r3, #0] 80026e0: 4613 mov r3, r2 80026e2: 005b lsls r3, r3, #1 80026e4: 4413 add r3, r2 80026e6: fa00 f203 lsl.w r2, r0, r3 80026ea: 687b ldr r3, [r7, #4] 80026ec: 681b ldr r3, [r3, #0] 80026ee: 430a orrs r2, r1 80026f0: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 80026f2: 683b ldr r3, [r7, #0] 80026f4: 681b ldr r3, [r3, #0] 80026f6: 2b10 cmp r3, #16 80026f8: d003 beq.n 8002702 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 80026fa: 683b ldr r3, [r7, #0] 80026fc: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 80026fe: 2b11 cmp r3, #17 8002700: d132 bne.n 8002768 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 8002702: 687b ldr r3, [r7, #4] 8002704: 681b ldr r3, [r3, #0] 8002706: 4a1d ldr r2, [pc, #116] @ (800277c ) 8002708: 4293 cmp r3, r2 800270a: d125 bne.n 8002758 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 800270c: 687b ldr r3, [r7, #4] 800270e: 681b ldr r3, [r3, #0] 8002710: 689b ldr r3, [r3, #8] 8002712: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8002716: 2b00 cmp r3, #0 8002718: d126 bne.n 8002768 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800271a: 687b ldr r3, [r7, #4] 800271c: 681b ldr r3, [r3, #0] 800271e: 689a ldr r2, [r3, #8] 8002720: 687b ldr r3, [r7, #4] 8002722: 681b ldr r3, [r3, #0] 8002724: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 8002728: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 800272a: 683b ldr r3, [r7, #0] 800272c: 681b ldr r3, [r3, #0] 800272e: 2b10 cmp r3, #16 8002730: d11a bne.n 8002768 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8002732: 4b13 ldr r3, [pc, #76] @ (8002780 ) 8002734: 681b ldr r3, [r3, #0] 8002736: 4a13 ldr r2, [pc, #76] @ (8002784 ) 8002738: fba2 2303 umull r2, r3, r2, r3 800273c: 0c9a lsrs r2, r3, #18 800273e: 4613 mov r3, r2 8002740: 009b lsls r3, r3, #2 8002742: 4413 add r3, r2 8002744: 005b lsls r3, r3, #1 8002746: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8002748: e002 b.n 8002750 { wait_loop_index--; 800274a: 68bb ldr r3, [r7, #8] 800274c: 3b01 subs r3, #1 800274e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8002750: 68bb ldr r3, [r7, #8] 8002752: 2b00 cmp r3, #0 8002754: d1f9 bne.n 800274a 8002756: e007 b.n 8002768 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8002758: 687b ldr r3, [r7, #4] 800275a: 6a9b ldr r3, [r3, #40] @ 0x28 800275c: f043 0220 orr.w r2, r3, #32 8002760: 687b ldr r3, [r7, #4] 8002762: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8002764: 2301 movs r3, #1 8002766: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 8002768: 687b ldr r3, [r7, #4] 800276a: 2200 movs r2, #0 800276c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8002770: 7bfb ldrb r3, [r7, #15] } 8002772: 4618 mov r0, r3 8002774: 3714 adds r7, #20 8002776: 46bd mov sp, r7 8002778: bc80 pop {r7} 800277a: 4770 bx lr 800277c: 40012400 .word 0x40012400 8002780: 20000004 .word 0x20000004 8002784: 431bde83 .word 0x431bde83 08002788 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 8002788: b580 push {r7, lr} 800278a: b084 sub sp, #16 800278c: af00 add r7, sp, #0 800278e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8002790: 2300 movs r3, #0 8002792: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 8002794: 2300 movs r3, #0 8002796: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 8002798: 687b ldr r3, [r7, #4] 800279a: 681b ldr r3, [r3, #0] 800279c: 689b ldr r3, [r3, #8] 800279e: f003 0301 and.w r3, r3, #1 80027a2: 2b01 cmp r3, #1 80027a4: d040 beq.n 8002828 { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 80027a6: 687b ldr r3, [r7, #4] 80027a8: 681b ldr r3, [r3, #0] 80027aa: 689a ldr r2, [r3, #8] 80027ac: 687b ldr r3, [r7, #4] 80027ae: 681b ldr r3, [r3, #0] 80027b0: f042 0201 orr.w r2, r2, #1 80027b4: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 80027b6: 4b1f ldr r3, [pc, #124] @ (8002834 ) 80027b8: 681b ldr r3, [r3, #0] 80027ba: 4a1f ldr r2, [pc, #124] @ (8002838 ) 80027bc: fba2 2303 umull r2, r3, r2, r3 80027c0: 0c9b lsrs r3, r3, #18 80027c2: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 80027c4: e002 b.n 80027cc { wait_loop_index--; 80027c6: 68bb ldr r3, [r7, #8] 80027c8: 3b01 subs r3, #1 80027ca: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 80027cc: 68bb ldr r3, [r7, #8] 80027ce: 2b00 cmp r3, #0 80027d0: d1f9 bne.n 80027c6 } /* Get tick count */ tickstart = HAL_GetTick(); 80027d2: f7ff fd05 bl 80021e0 80027d6: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 80027d8: e01f b.n 800281a { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 80027da: f7ff fd01 bl 80021e0 80027de: 4602 mov r2, r0 80027e0: 68fb ldr r3, [r7, #12] 80027e2: 1ad3 subs r3, r2, r3 80027e4: 2b02 cmp r3, #2 80027e6: d918 bls.n 800281a { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 80027e8: 687b ldr r3, [r7, #4] 80027ea: 681b ldr r3, [r3, #0] 80027ec: 689b ldr r3, [r3, #8] 80027ee: f003 0301 and.w r3, r3, #1 80027f2: 2b01 cmp r3, #1 80027f4: d011 beq.n 800281a { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80027f6: 687b ldr r3, [r7, #4] 80027f8: 6a9b ldr r3, [r3, #40] @ 0x28 80027fa: f043 0210 orr.w r2, r3, #16 80027fe: 687b ldr r3, [r7, #4] 8002800: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002802: 687b ldr r3, [r7, #4] 8002804: 6adb ldr r3, [r3, #44] @ 0x2c 8002806: f043 0201 orr.w r2, r3, #1 800280a: 687b ldr r3, [r7, #4] 800280c: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 800280e: 687b ldr r3, [r7, #4] 8002810: 2200 movs r2, #0 8002812: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8002816: 2301 movs r3, #1 8002818: e007 b.n 800282a while(ADC_IS_ENABLE(hadc) == RESET) 800281a: 687b ldr r3, [r7, #4] 800281c: 681b ldr r3, [r3, #0] 800281e: 689b ldr r3, [r3, #8] 8002820: f003 0301 and.w r3, r3, #1 8002824: 2b01 cmp r3, #1 8002826: d1d8 bne.n 80027da } } } /* Return HAL status */ return HAL_OK; 8002828: 2300 movs r3, #0 } 800282a: 4618 mov r0, r3 800282c: 3710 adds r7, #16 800282e: 46bd mov sp, r7 8002830: bd80 pop {r7, pc} 8002832: bf00 nop 8002834: 20000004 .word 0x20000004 8002838: 431bde83 .word 0x431bde83 0800283c : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 800283c: b580 push {r7, lr} 800283e: b084 sub sp, #16 8002840: af00 add r7, sp, #0 8002842: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8002844: 2300 movs r3, #0 8002846: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 8002848: 687b ldr r3, [r7, #4] 800284a: 681b ldr r3, [r3, #0] 800284c: 689b ldr r3, [r3, #8] 800284e: f003 0301 and.w r3, r3, #1 8002852: 2b01 cmp r3, #1 8002854: d12e bne.n 80028b4 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 8002856: 687b ldr r3, [r7, #4] 8002858: 681b ldr r3, [r3, #0] 800285a: 689a ldr r2, [r3, #8] 800285c: 687b ldr r3, [r7, #4] 800285e: 681b ldr r3, [r3, #0] 8002860: f022 0201 bic.w r2, r2, #1 8002864: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 8002866: f7ff fcbb bl 80021e0 800286a: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 800286c: e01b b.n 80028a6 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 800286e: f7ff fcb7 bl 80021e0 8002872: 4602 mov r2, r0 8002874: 68fb ldr r3, [r7, #12] 8002876: 1ad3 subs r3, r2, r3 8002878: 2b02 cmp r3, #2 800287a: d914 bls.n 80028a6 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 800287c: 687b ldr r3, [r7, #4] 800287e: 681b ldr r3, [r3, #0] 8002880: 689b ldr r3, [r3, #8] 8002882: f003 0301 and.w r3, r3, #1 8002886: 2b01 cmp r3, #1 8002888: d10d bne.n 80028a6 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800288a: 687b ldr r3, [r7, #4] 800288c: 6a9b ldr r3, [r3, #40] @ 0x28 800288e: f043 0210 orr.w r2, r3, #16 8002892: 687b ldr r3, [r7, #4] 8002894: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002896: 687b ldr r3, [r7, #4] 8002898: 6adb ldr r3, [r3, #44] @ 0x2c 800289a: f043 0201 orr.w r2, r3, #1 800289e: 687b ldr r3, [r7, #4] 80028a0: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 80028a2: 2301 movs r3, #1 80028a4: e007 b.n 80028b6 while(ADC_IS_ENABLE(hadc) != RESET) 80028a6: 687b ldr r3, [r7, #4] 80028a8: 681b ldr r3, [r3, #0] 80028aa: 689b ldr r3, [r3, #8] 80028ac: f003 0301 and.w r3, r3, #1 80028b0: 2b01 cmp r3, #1 80028b2: d0dc beq.n 800286e } } } /* Return HAL status */ return HAL_OK; 80028b4: 2300 movs r3, #0 } 80028b6: 4618 mov r0, r3 80028b8: 3710 adds r7, #16 80028ba: 46bd mov sp, r7 80028bc: bd80 pop {r7, pc} 080028be : * @brief DMA transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { 80028be: b580 push {r7, lr} 80028c0: b084 sub sp, #16 80028c2: af00 add r7, sp, #0 80028c4: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80028c6: 687b ldr r3, [r7, #4] 80028c8: 6a5b ldr r3, [r3, #36] @ 0x24 80028ca: 60fb str r3, [r7, #12] /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 80028cc: 68fb ldr r3, [r7, #12] 80028ce: 6a9b ldr r3, [r3, #40] @ 0x28 80028d0: f003 0350 and.w r3, r3, #80 @ 0x50 80028d4: 2b00 cmp r3, #0 80028d6: d127 bne.n 8002928 { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 80028d8: 68fb ldr r3, [r7, #12] 80028da: 6a9b ldr r3, [r3, #40] @ 0x28 80028dc: f443 7200 orr.w r2, r3, #512 @ 0x200 80028e0: 68fb ldr r3, [r7, #12] 80028e2: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 80028e4: 68fb ldr r3, [r7, #12] 80028e6: 681b ldr r3, [r3, #0] 80028e8: 689b ldr r3, [r3, #8] 80028ea: f403 2360 and.w r3, r3, #917504 @ 0xe0000 80028ee: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 80028f2: d115 bne.n 8002920 (hadc->Init.ContinuousConvMode == DISABLE) ) 80028f4: 68fb ldr r3, [r7, #12] 80028f6: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 80028f8: 2b00 cmp r3, #0 80028fa: d111 bne.n 8002920 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 80028fc: 68fb ldr r3, [r7, #12] 80028fe: 6a9b ldr r3, [r3, #40] @ 0x28 8002900: f423 7280 bic.w r2, r3, #256 @ 0x100 8002904: 68fb ldr r3, [r7, #12] 8002906: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8002908: 68fb ldr r3, [r7, #12] 800290a: 6a9b ldr r3, [r3, #40] @ 0x28 800290c: f403 5380 and.w r3, r3, #4096 @ 0x1000 8002910: 2b00 cmp r3, #0 8002912: d105 bne.n 8002920 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8002914: 68fb ldr r3, [r7, #12] 8002916: 6a9b ldr r3, [r3, #40] @ 0x28 8002918: f043 0201 orr.w r2, r3, #1 800291c: 68fb ldr r3, [r7, #12] 800291e: 629a str r2, [r3, #40] @ 0x28 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 8002920: 68f8 ldr r0, [r7, #12] 8002922: f7ff fe1d bl 8002560 else { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); } } 8002926: e004 b.n 8002932 hadc->DMA_Handle->XferErrorCallback(hdma); 8002928: 68fb ldr r3, [r7, #12] 800292a: 6a1b ldr r3, [r3, #32] 800292c: 6b1b ldr r3, [r3, #48] @ 0x30 800292e: 6878 ldr r0, [r7, #4] 8002930: 4798 blx r3 } 8002932: bf00 nop 8002934: 3710 adds r7, #16 8002936: 46bd mov sp, r7 8002938: bd80 pop {r7, pc} 0800293a : * @brief DMA half transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 800293a: b580 push {r7, lr} 800293c: b084 sub sp, #16 800293e: af00 add r7, sp, #0 8002940: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8002942: 687b ldr r3, [r7, #4] 8002944: 6a5b ldr r3, [r3, #36] @ 0x24 8002946: 60fb str r3, [r7, #12] /* Half conversion callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvHalfCpltCallback(hadc); #else HAL_ADC_ConvHalfCpltCallback(hadc); 8002948: 68f8 ldr r0, [r7, #12] 800294a: f7ff fe12 bl 8002572 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 800294e: bf00 nop 8002950: 3710 adds r7, #16 8002952: 46bd mov sp, r7 8002954: bd80 pop {r7, pc} 08002956 : * @brief DMA error callback * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAError(DMA_HandleTypeDef *hdma) { 8002956: b580 push {r7, lr} 8002958: b084 sub sp, #16 800295a: af00 add r7, sp, #0 800295c: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800295e: 687b ldr r3, [r7, #4] 8002960: 6a5b ldr r3, [r3, #36] @ 0x24 8002962: 60fb str r3, [r7, #12] /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 8002964: 68fb ldr r3, [r7, #12] 8002966: 6a9b ldr r3, [r3, #40] @ 0x28 8002968: f043 0240 orr.w r2, r3, #64 @ 0x40 800296c: 68fb ldr r3, [r7, #12] 800296e: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to DMA error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 8002970: 68fb ldr r3, [r7, #12] 8002972: 6adb ldr r3, [r3, #44] @ 0x2c 8002974: f043 0204 orr.w r2, r3, #4 8002978: 68fb ldr r3, [r7, #12] 800297a: 62da str r2, [r3, #44] @ 0x2c /* Error callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ErrorCallback(hadc); #else HAL_ADC_ErrorCallback(hadc); 800297c: 68f8 ldr r0, [r7, #12] 800297e: f7ff fe01 bl 8002584 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 8002982: bf00 nop 8002984: 3710 adds r7, #16 8002986: 46bd mov sp, r7 8002988: bd80 pop {r7, pc} ... 0800298c <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 800298c: b480 push {r7} 800298e: b085 sub sp, #20 8002990: af00 add r7, sp, #0 8002992: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8002994: 687b ldr r3, [r7, #4] 8002996: f003 0307 and.w r3, r3, #7 800299a: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 800299c: 4b0c ldr r3, [pc, #48] @ (80029d0 <__NVIC_SetPriorityGrouping+0x44>) 800299e: 68db ldr r3, [r3, #12] 80029a0: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80029a2: 68ba ldr r2, [r7, #8] 80029a4: f64f 03ff movw r3, #63743 @ 0xf8ff 80029a8: 4013 ands r3, r2 80029aa: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80029ac: 68fb ldr r3, [r7, #12] 80029ae: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80029b0: 68bb ldr r3, [r7, #8] 80029b2: 4313 orrs r3, r2 reg_value = (reg_value | 80029b4: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 80029b8: f443 3300 orr.w r3, r3, #131072 @ 0x20000 80029bc: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 80029be: 4a04 ldr r2, [pc, #16] @ (80029d0 <__NVIC_SetPriorityGrouping+0x44>) 80029c0: 68bb ldr r3, [r7, #8] 80029c2: 60d3 str r3, [r2, #12] } 80029c4: bf00 nop 80029c6: 3714 adds r7, #20 80029c8: 46bd mov sp, r7 80029ca: bc80 pop {r7} 80029cc: 4770 bx lr 80029ce: bf00 nop 80029d0: e000ed00 .word 0xe000ed00 080029d4 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 80029d4: b480 push {r7} 80029d6: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80029d8: 4b04 ldr r3, [pc, #16] @ (80029ec <__NVIC_GetPriorityGrouping+0x18>) 80029da: 68db ldr r3, [r3, #12] 80029dc: 0a1b lsrs r3, r3, #8 80029de: f003 0307 and.w r3, r3, #7 } 80029e2: 4618 mov r0, r3 80029e4: 46bd mov sp, r7 80029e6: bc80 pop {r7} 80029e8: 4770 bx lr 80029ea: bf00 nop 80029ec: e000ed00 .word 0xe000ed00 080029f0 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 80029f0: b480 push {r7} 80029f2: b083 sub sp, #12 80029f4: af00 add r7, sp, #0 80029f6: 4603 mov r3, r0 80029f8: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 80029fa: f997 3007 ldrsb.w r3, [r7, #7] 80029fe: 2b00 cmp r3, #0 8002a00: db0b blt.n 8002a1a <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8002a02: 79fb ldrb r3, [r7, #7] 8002a04: f003 021f and.w r2, r3, #31 8002a08: 4906 ldr r1, [pc, #24] @ (8002a24 <__NVIC_EnableIRQ+0x34>) 8002a0a: f997 3007 ldrsb.w r3, [r7, #7] 8002a0e: 095b lsrs r3, r3, #5 8002a10: 2001 movs r0, #1 8002a12: fa00 f202 lsl.w r2, r0, r2 8002a16: f841 2023 str.w r2, [r1, r3, lsl #2] } } 8002a1a: bf00 nop 8002a1c: 370c adds r7, #12 8002a1e: 46bd mov sp, r7 8002a20: bc80 pop {r7} 8002a22: 4770 bx lr 8002a24: e000e100 .word 0xe000e100 08002a28 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8002a28: b480 push {r7} 8002a2a: b083 sub sp, #12 8002a2c: af00 add r7, sp, #0 8002a2e: 4603 mov r3, r0 8002a30: 6039 str r1, [r7, #0] 8002a32: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8002a34: f997 3007 ldrsb.w r3, [r7, #7] 8002a38: 2b00 cmp r3, #0 8002a3a: db0a blt.n 8002a52 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002a3c: 683b ldr r3, [r7, #0] 8002a3e: b2da uxtb r2, r3 8002a40: 490c ldr r1, [pc, #48] @ (8002a74 <__NVIC_SetPriority+0x4c>) 8002a42: f997 3007 ldrsb.w r3, [r7, #7] 8002a46: 0112 lsls r2, r2, #4 8002a48: b2d2 uxtb r2, r2 8002a4a: 440b add r3, r1 8002a4c: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8002a50: e00a b.n 8002a68 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002a52: 683b ldr r3, [r7, #0] 8002a54: b2da uxtb r2, r3 8002a56: 4908 ldr r1, [pc, #32] @ (8002a78 <__NVIC_SetPriority+0x50>) 8002a58: 79fb ldrb r3, [r7, #7] 8002a5a: f003 030f and.w r3, r3, #15 8002a5e: 3b04 subs r3, #4 8002a60: 0112 lsls r2, r2, #4 8002a62: b2d2 uxtb r2, r2 8002a64: 440b add r3, r1 8002a66: 761a strb r2, [r3, #24] } 8002a68: bf00 nop 8002a6a: 370c adds r7, #12 8002a6c: 46bd mov sp, r7 8002a6e: bc80 pop {r7} 8002a70: 4770 bx lr 8002a72: bf00 nop 8002a74: e000e100 .word 0xe000e100 8002a78: e000ed00 .word 0xe000ed00 08002a7c : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8002a7c: b480 push {r7} 8002a7e: b089 sub sp, #36 @ 0x24 8002a80: af00 add r7, sp, #0 8002a82: 60f8 str r0, [r7, #12] 8002a84: 60b9 str r1, [r7, #8] 8002a86: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8002a88: 68fb ldr r3, [r7, #12] 8002a8a: f003 0307 and.w r3, r3, #7 8002a8e: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8002a90: 69fb ldr r3, [r7, #28] 8002a92: f1c3 0307 rsb r3, r3, #7 8002a96: 2b04 cmp r3, #4 8002a98: bf28 it cs 8002a9a: 2304 movcs r3, #4 8002a9c: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8002a9e: 69fb ldr r3, [r7, #28] 8002aa0: 3304 adds r3, #4 8002aa2: 2b06 cmp r3, #6 8002aa4: d902 bls.n 8002aac 8002aa6: 69fb ldr r3, [r7, #28] 8002aa8: 3b03 subs r3, #3 8002aaa: e000 b.n 8002aae 8002aac: 2300 movs r3, #0 8002aae: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002ab0: f04f 32ff mov.w r2, #4294967295 8002ab4: 69bb ldr r3, [r7, #24] 8002ab6: fa02 f303 lsl.w r3, r2, r3 8002aba: 43da mvns r2, r3 8002abc: 68bb ldr r3, [r7, #8] 8002abe: 401a ands r2, r3 8002ac0: 697b ldr r3, [r7, #20] 8002ac2: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8002ac4: f04f 31ff mov.w r1, #4294967295 8002ac8: 697b ldr r3, [r7, #20] 8002aca: fa01 f303 lsl.w r3, r1, r3 8002ace: 43d9 mvns r1, r3 8002ad0: 687b ldr r3, [r7, #4] 8002ad2: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002ad4: 4313 orrs r3, r2 ); } 8002ad6: 4618 mov r0, r3 8002ad8: 3724 adds r7, #36 @ 0x24 8002ada: 46bd mov sp, r7 8002adc: bc80 pop {r7} 8002ade: 4770 bx lr 08002ae0 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8002ae0: b580 push {r7, lr} 8002ae2: b082 sub sp, #8 8002ae4: af00 add r7, sp, #0 8002ae6: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8002ae8: 687b ldr r3, [r7, #4] 8002aea: 3b01 subs r3, #1 8002aec: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8002af0: d301 bcc.n 8002af6 { return (1UL); /* Reload value impossible */ 8002af2: 2301 movs r3, #1 8002af4: e00f b.n 8002b16 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8002af6: 4a0a ldr r2, [pc, #40] @ (8002b20 ) 8002af8: 687b ldr r3, [r7, #4] 8002afa: 3b01 subs r3, #1 8002afc: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8002afe: 210f movs r1, #15 8002b00: f04f 30ff mov.w r0, #4294967295 8002b04: f7ff ff90 bl 8002a28 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8002b08: 4b05 ldr r3, [pc, #20] @ (8002b20 ) 8002b0a: 2200 movs r2, #0 8002b0c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8002b0e: 4b04 ldr r3, [pc, #16] @ (8002b20 ) 8002b10: 2207 movs r2, #7 8002b12: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8002b14: 2300 movs r3, #0 } 8002b16: 4618 mov r0, r3 8002b18: 3708 adds r7, #8 8002b1a: 46bd mov sp, r7 8002b1c: bd80 pop {r7, pc} 8002b1e: bf00 nop 8002b20: e000e010 .word 0xe000e010 08002b24 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8002b24: b580 push {r7, lr} 8002b26: b082 sub sp, #8 8002b28: af00 add r7, sp, #0 8002b2a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8002b2c: 6878 ldr r0, [r7, #4] 8002b2e: f7ff ff2d bl 800298c <__NVIC_SetPriorityGrouping> } 8002b32: bf00 nop 8002b34: 3708 adds r7, #8 8002b36: 46bd mov sp, r7 8002b38: bd80 pop {r7, pc} 08002b3a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8002b3a: b580 push {r7, lr} 8002b3c: b086 sub sp, #24 8002b3e: af00 add r7, sp, #0 8002b40: 4603 mov r3, r0 8002b42: 60b9 str r1, [r7, #8] 8002b44: 607a str r2, [r7, #4] 8002b46: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8002b48: 2300 movs r3, #0 8002b4a: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8002b4c: f7ff ff42 bl 80029d4 <__NVIC_GetPriorityGrouping> 8002b50: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8002b52: 687a ldr r2, [r7, #4] 8002b54: 68b9 ldr r1, [r7, #8] 8002b56: 6978 ldr r0, [r7, #20] 8002b58: f7ff ff90 bl 8002a7c 8002b5c: 4602 mov r2, r0 8002b5e: f997 300f ldrsb.w r3, [r7, #15] 8002b62: 4611 mov r1, r2 8002b64: 4618 mov r0, r3 8002b66: f7ff ff5f bl 8002a28 <__NVIC_SetPriority> } 8002b6a: bf00 nop 8002b6c: 3718 adds r7, #24 8002b6e: 46bd mov sp, r7 8002b70: bd80 pop {r7, pc} 08002b72 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8002b72: b580 push {r7, lr} 8002b74: b082 sub sp, #8 8002b76: af00 add r7, sp, #0 8002b78: 4603 mov r3, r0 8002b7a: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8002b7c: f997 3007 ldrsb.w r3, [r7, #7] 8002b80: 4618 mov r0, r3 8002b82: f7ff ff35 bl 80029f0 <__NVIC_EnableIRQ> } 8002b86: bf00 nop 8002b88: 3708 adds r7, #8 8002b8a: 46bd mov sp, r7 8002b8c: bd80 pop {r7, pc} 08002b8e : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8002b8e: b580 push {r7, lr} 8002b90: b082 sub sp, #8 8002b92: af00 add r7, sp, #0 8002b94: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8002b96: 6878 ldr r0, [r7, #4] 8002b98: f7ff ffa2 bl 8002ae0 8002b9c: 4603 mov r3, r0 } 8002b9e: 4618 mov r0, r3 8002ba0: 3708 adds r7, #8 8002ba2: 46bd mov sp, r7 8002ba4: bd80 pop {r7, pc} 08002ba6 : /** * @brief This function handles SYSTICK interrupt request. * @retval None */ void HAL_SYSTICK_IRQHandler(void) { 8002ba6: b580 push {r7, lr} 8002ba8: af00 add r7, sp, #0 HAL_SYSTICK_Callback(); 8002baa: f7fe fa8f bl 80010cc } 8002bae: bf00 nop 8002bb0: bd80 pop {r7, pc} ... 08002bb4 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 8002bb4: b480 push {r7} 8002bb6: b085 sub sp, #20 8002bb8: af00 add r7, sp, #0 8002bba: 6078 str r0, [r7, #4] uint32_t tmp = 0U; 8002bbc: 2300 movs r3, #0 8002bbe: 60fb str r3, [r7, #12] /* Check the DMA handle allocation */ if(hdma == NULL) 8002bc0: 687b ldr r3, [r7, #4] 8002bc2: 2b00 cmp r3, #0 8002bc4: d101 bne.n 8002bca { return HAL_ERROR; 8002bc6: 2301 movs r3, #1 8002bc8: e043 b.n 8002c52 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; hdma->DmaBaseAddress = DMA2; } #else /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 8002bca: 687b ldr r3, [r7, #4] 8002bcc: 681b ldr r3, [r3, #0] 8002bce: 461a mov r2, r3 8002bd0: 4b22 ldr r3, [pc, #136] @ (8002c5c ) 8002bd2: 4413 add r3, r2 8002bd4: 4a22 ldr r2, [pc, #136] @ (8002c60 ) 8002bd6: fba2 2303 umull r2, r3, r2, r3 8002bda: 091b lsrs r3, r3, #4 8002bdc: 009a lsls r2, r3, #2 8002bde: 687b ldr r3, [r7, #4] 8002be0: 641a str r2, [r3, #64] @ 0x40 hdma->DmaBaseAddress = DMA1; 8002be2: 687b ldr r3, [r7, #4] 8002be4: 4a1f ldr r2, [pc, #124] @ (8002c64 ) 8002be6: 63da str r2, [r3, #60] @ 0x3c #endif /* DMA2 */ /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8002be8: 687b ldr r3, [r7, #4] 8002bea: 2202 movs r2, #2 8002bec: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Get the CR register value */ tmp = hdma->Instance->CCR; 8002bf0: 687b ldr r3, [r7, #4] 8002bf2: 681b ldr r3, [r3, #0] 8002bf4: 681b ldr r3, [r3, #0] 8002bf6: 60fb str r3, [r7, #12] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8002bf8: 68fb ldr r3, [r7, #12] 8002bfa: f423 537f bic.w r3, r3, #16320 @ 0x3fc0 8002bfe: f023 0330 bic.w r3, r3, #48 @ 0x30 8002c02: 60fb str r3, [r7, #12] DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 8002c04: 687b ldr r3, [r7, #4] 8002c06: 685a ldr r2, [r3, #4] hdma->Init.PeriphInc | hdma->Init.MemInc | 8002c08: 687b ldr r3, [r7, #4] 8002c0a: 689b ldr r3, [r3, #8] tmp |= hdma->Init.Direction | 8002c0c: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | 8002c0e: 687b ldr r3, [r7, #4] 8002c10: 68db ldr r3, [r3, #12] 8002c12: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8002c14: 687b ldr r3, [r7, #4] 8002c16: 691b ldr r3, [r3, #16] hdma->Init.PeriphInc | hdma->Init.MemInc | 8002c18: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8002c1a: 687b ldr r3, [r7, #4] 8002c1c: 695b ldr r3, [r3, #20] 8002c1e: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8002c20: 687b ldr r3, [r7, #4] 8002c22: 699b ldr r3, [r3, #24] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8002c24: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8002c26: 687b ldr r3, [r7, #4] 8002c28: 69db ldr r3, [r3, #28] 8002c2a: 4313 orrs r3, r2 tmp |= hdma->Init.Direction | 8002c2c: 68fa ldr r2, [r7, #12] 8002c2e: 4313 orrs r3, r2 8002c30: 60fb str r3, [r7, #12] /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 8002c32: 687b ldr r3, [r7, #4] 8002c34: 681b ldr r3, [r3, #0] 8002c36: 68fa ldr r2, [r7, #12] 8002c38: 601a str r2, [r3, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8002c3a: 687b ldr r3, [r7, #4] 8002c3c: 2200 movs r2, #0 8002c3e: 639a str r2, [r3, #56] @ 0x38 /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 8002c40: 687b ldr r3, [r7, #4] 8002c42: 2201 movs r2, #1 8002c44: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8002c48: 687b ldr r3, [r7, #4] 8002c4a: 2200 movs r2, #0 8002c4c: f883 2020 strb.w r2, [r3, #32] return HAL_OK; 8002c50: 2300 movs r3, #0 } 8002c52: 4618 mov r0, r3 8002c54: 3714 adds r7, #20 8002c56: 46bd mov sp, r7 8002c58: bc80 pop {r7} 8002c5a: 4770 bx lr 8002c5c: bffdfff8 .word 0xbffdfff8 8002c60: cccccccd .word 0xcccccccd 8002c64: 40020000 .word 0x40020000 08002c68 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8002c68: b580 push {r7, lr} 8002c6a: b086 sub sp, #24 8002c6c: af00 add r7, sp, #0 8002c6e: 60f8 str r0, [r7, #12] 8002c70: 60b9 str r1, [r7, #8] 8002c72: 607a str r2, [r7, #4] 8002c74: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8002c76: 2300 movs r3, #0 8002c78: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8002c7a: 68fb ldr r3, [r7, #12] 8002c7c: f893 3020 ldrb.w r3, [r3, #32] 8002c80: 2b01 cmp r3, #1 8002c82: d101 bne.n 8002c88 8002c84: 2302 movs r3, #2 8002c86: e04b b.n 8002d20 8002c88: 68fb ldr r3, [r7, #12] 8002c8a: 2201 movs r2, #1 8002c8c: f883 2020 strb.w r2, [r3, #32] if(HAL_DMA_STATE_READY == hdma->State) 8002c90: 68fb ldr r3, [r7, #12] 8002c92: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8002c96: b2db uxtb r3, r3 8002c98: 2b01 cmp r3, #1 8002c9a: d13a bne.n 8002d12 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8002c9c: 68fb ldr r3, [r7, #12] 8002c9e: 2202 movs r2, #2 8002ca0: f883 2021 strb.w r2, [r3, #33] @ 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8002ca4: 68fb ldr r3, [r7, #12] 8002ca6: 2200 movs r2, #0 8002ca8: 639a str r2, [r3, #56] @ 0x38 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8002caa: 68fb ldr r3, [r7, #12] 8002cac: 681b ldr r3, [r3, #0] 8002cae: 681a ldr r2, [r3, #0] 8002cb0: 68fb ldr r3, [r7, #12] 8002cb2: 681b ldr r3, [r3, #0] 8002cb4: f022 0201 bic.w r2, r2, #1 8002cb8: 601a str r2, [r3, #0] /* Configure the source, destination address and the data length & clear flags*/ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 8002cba: 683b ldr r3, [r7, #0] 8002cbc: 687a ldr r2, [r7, #4] 8002cbe: 68b9 ldr r1, [r7, #8] 8002cc0: 68f8 ldr r0, [r7, #12] 8002cc2: f000 f937 bl 8002f34 /* Enable the transfer complete interrupt */ /* Enable the transfer Error interrupt */ if(NULL != hdma->XferHalfCpltCallback) 8002cc6: 68fb ldr r3, [r7, #12] 8002cc8: 6adb ldr r3, [r3, #44] @ 0x2c 8002cca: 2b00 cmp r3, #0 8002ccc: d008 beq.n 8002ce0 { /* Enable the Half transfer complete interrupt as well */ __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8002cce: 68fb ldr r3, [r7, #12] 8002cd0: 681b ldr r3, [r3, #0] 8002cd2: 681a ldr r2, [r3, #0] 8002cd4: 68fb ldr r3, [r7, #12] 8002cd6: 681b ldr r3, [r3, #0] 8002cd8: f042 020e orr.w r2, r2, #14 8002cdc: 601a str r2, [r3, #0] 8002cde: e00f b.n 8002d00 } else { __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8002ce0: 68fb ldr r3, [r7, #12] 8002ce2: 681b ldr r3, [r3, #0] 8002ce4: 681a ldr r2, [r3, #0] 8002ce6: 68fb ldr r3, [r7, #12] 8002ce8: 681b ldr r3, [r3, #0] 8002cea: f022 0204 bic.w r2, r2, #4 8002cee: 601a str r2, [r3, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8002cf0: 68fb ldr r3, [r7, #12] 8002cf2: 681b ldr r3, [r3, #0] 8002cf4: 681a ldr r2, [r3, #0] 8002cf6: 68fb ldr r3, [r7, #12] 8002cf8: 681b ldr r3, [r3, #0] 8002cfa: f042 020a orr.w r2, r2, #10 8002cfe: 601a str r2, [r3, #0] } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); 8002d00: 68fb ldr r3, [r7, #12] 8002d02: 681b ldr r3, [r3, #0] 8002d04: 681a ldr r2, [r3, #0] 8002d06: 68fb ldr r3, [r7, #12] 8002d08: 681b ldr r3, [r3, #0] 8002d0a: f042 0201 orr.w r2, r2, #1 8002d0e: 601a str r2, [r3, #0] 8002d10: e005 b.n 8002d1e } else { /* Process Unlocked */ __HAL_UNLOCK(hdma); 8002d12: 68fb ldr r3, [r7, #12] 8002d14: 2200 movs r2, #0 8002d16: f883 2020 strb.w r2, [r3, #32] /* Remain BUSY */ status = HAL_BUSY; 8002d1a: 2302 movs r3, #2 8002d1c: 75fb strb r3, [r7, #23] } return status; 8002d1e: 7dfb ldrb r3, [r7, #23] } 8002d20: 4618 mov r0, r3 8002d22: 3718 adds r7, #24 8002d24: 46bd mov sp, r7 8002d26: bd80 pop {r7, pc} 08002d28 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { 8002d28: b580 push {r7, lr} 8002d2a: b084 sub sp, #16 8002d2c: af00 add r7, sp, #0 8002d2e: 6078 str r0, [r7, #4] uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8002d30: 687b ldr r3, [r7, #4] 8002d32: 6bdb ldr r3, [r3, #60] @ 0x3c 8002d34: 681b ldr r3, [r3, #0] 8002d36: 60fb str r3, [r7, #12] uint32_t source_it = hdma->Instance->CCR; 8002d38: 687b ldr r3, [r7, #4] 8002d3a: 681b ldr r3, [r3, #0] 8002d3c: 681b ldr r3, [r3, #0] 8002d3e: 60bb str r3, [r7, #8] /* Half Transfer Complete Interrupt management ******************************/ if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8002d40: 687b ldr r3, [r7, #4] 8002d42: 6c1b ldr r3, [r3, #64] @ 0x40 8002d44: 2204 movs r2, #4 8002d46: 409a lsls r2, r3 8002d48: 68fb ldr r3, [r7, #12] 8002d4a: 4013 ands r3, r2 8002d4c: 2b00 cmp r3, #0 8002d4e: d04f beq.n 8002df0 8002d50: 68bb ldr r3, [r7, #8] 8002d52: f003 0304 and.w r3, r3, #4 8002d56: 2b00 cmp r3, #0 8002d58: d04a beq.n 8002df0 { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8002d5a: 687b ldr r3, [r7, #4] 8002d5c: 681b ldr r3, [r3, #0] 8002d5e: 681b ldr r3, [r3, #0] 8002d60: f003 0320 and.w r3, r3, #32 8002d64: 2b00 cmp r3, #0 8002d66: d107 bne.n 8002d78 { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8002d68: 687b ldr r3, [r7, #4] 8002d6a: 681b ldr r3, [r3, #0] 8002d6c: 681a ldr r2, [r3, #0] 8002d6e: 687b ldr r3, [r7, #4] 8002d70: 681b ldr r3, [r3, #0] 8002d72: f022 0204 bic.w r2, r2, #4 8002d76: 601a str r2, [r3, #0] } /* Clear the half transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 8002d78: 687b ldr r3, [r7, #4] 8002d7a: 681b ldr r3, [r3, #0] 8002d7c: 4a66 ldr r2, [pc, #408] @ (8002f18 ) 8002d7e: 4293 cmp r3, r2 8002d80: d029 beq.n 8002dd6 8002d82: 687b ldr r3, [r7, #4] 8002d84: 681b ldr r3, [r3, #0] 8002d86: 4a65 ldr r2, [pc, #404] @ (8002f1c ) 8002d88: 4293 cmp r3, r2 8002d8a: d022 beq.n 8002dd2 8002d8c: 687b ldr r3, [r7, #4] 8002d8e: 681b ldr r3, [r3, #0] 8002d90: 4a63 ldr r2, [pc, #396] @ (8002f20 ) 8002d92: 4293 cmp r3, r2 8002d94: d01a beq.n 8002dcc 8002d96: 687b ldr r3, [r7, #4] 8002d98: 681b ldr r3, [r3, #0] 8002d9a: 4a62 ldr r2, [pc, #392] @ (8002f24 ) 8002d9c: 4293 cmp r3, r2 8002d9e: d012 beq.n 8002dc6 8002da0: 687b ldr r3, [r7, #4] 8002da2: 681b ldr r3, [r3, #0] 8002da4: 4a60 ldr r2, [pc, #384] @ (8002f28 ) 8002da6: 4293 cmp r3, r2 8002da8: d00a beq.n 8002dc0 8002daa: 687b ldr r3, [r7, #4] 8002dac: 681b ldr r3, [r3, #0] 8002dae: 4a5f ldr r2, [pc, #380] @ (8002f2c ) 8002db0: 4293 cmp r3, r2 8002db2: d102 bne.n 8002dba 8002db4: f44f 0380 mov.w r3, #4194304 @ 0x400000 8002db8: e00e b.n 8002dd8 8002dba: f04f 6380 mov.w r3, #67108864 @ 0x4000000 8002dbe: e00b b.n 8002dd8 8002dc0: f44f 2380 mov.w r3, #262144 @ 0x40000 8002dc4: e008 b.n 8002dd8 8002dc6: f44f 4380 mov.w r3, #16384 @ 0x4000 8002dca: e005 b.n 8002dd8 8002dcc: f44f 6380 mov.w r3, #1024 @ 0x400 8002dd0: e002 b.n 8002dd8 8002dd2: 2340 movs r3, #64 @ 0x40 8002dd4: e000 b.n 8002dd8 8002dd6: 2304 movs r3, #4 8002dd8: 4a55 ldr r2, [pc, #340] @ (8002f30 ) 8002dda: 6053 str r3, [r2, #4] /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) 8002ddc: 687b ldr r3, [r7, #4] 8002dde: 6adb ldr r3, [r3, #44] @ 0x2c 8002de0: 2b00 cmp r3, #0 8002de2: f000 8094 beq.w 8002f0e { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); 8002de6: 687b ldr r3, [r7, #4] 8002de8: 6adb ldr r3, [r3, #44] @ 0x2c 8002dea: 6878 ldr r0, [r7, #4] 8002dec: 4798 blx r3 if(hdma->XferHalfCpltCallback != NULL) 8002dee: e08e b.n 8002f0e } } /* Transfer Complete Interrupt management ***********************************/ else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8002df0: 687b ldr r3, [r7, #4] 8002df2: 6c1b ldr r3, [r3, #64] @ 0x40 8002df4: 2202 movs r2, #2 8002df6: 409a lsls r2, r3 8002df8: 68fb ldr r3, [r7, #12] 8002dfa: 4013 ands r3, r2 8002dfc: 2b00 cmp r3, #0 8002dfe: d056 beq.n 8002eae 8002e00: 68bb ldr r3, [r7, #8] 8002e02: f003 0302 and.w r3, r3, #2 8002e06: 2b00 cmp r3, #0 8002e08: d051 beq.n 8002eae { if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8002e0a: 687b ldr r3, [r7, #4] 8002e0c: 681b ldr r3, [r3, #0] 8002e0e: 681b ldr r3, [r3, #0] 8002e10: f003 0320 and.w r3, r3, #32 8002e14: 2b00 cmp r3, #0 8002e16: d10b bne.n 8002e30 { /* Disable the transfer complete and error interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8002e18: 687b ldr r3, [r7, #4] 8002e1a: 681b ldr r3, [r3, #0] 8002e1c: 681a ldr r2, [r3, #0] 8002e1e: 687b ldr r3, [r7, #4] 8002e20: 681b ldr r3, [r3, #0] 8002e22: f022 020a bic.w r2, r2, #10 8002e26: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8002e28: 687b ldr r3, [r7, #4] 8002e2a: 2201 movs r2, #1 8002e2c: f883 2021 strb.w r2, [r3, #33] @ 0x21 } /* Clear the transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8002e30: 687b ldr r3, [r7, #4] 8002e32: 681b ldr r3, [r3, #0] 8002e34: 4a38 ldr r2, [pc, #224] @ (8002f18 ) 8002e36: 4293 cmp r3, r2 8002e38: d029 beq.n 8002e8e 8002e3a: 687b ldr r3, [r7, #4] 8002e3c: 681b ldr r3, [r3, #0] 8002e3e: 4a37 ldr r2, [pc, #220] @ (8002f1c ) 8002e40: 4293 cmp r3, r2 8002e42: d022 beq.n 8002e8a 8002e44: 687b ldr r3, [r7, #4] 8002e46: 681b ldr r3, [r3, #0] 8002e48: 4a35 ldr r2, [pc, #212] @ (8002f20 ) 8002e4a: 4293 cmp r3, r2 8002e4c: d01a beq.n 8002e84 8002e4e: 687b ldr r3, [r7, #4] 8002e50: 681b ldr r3, [r3, #0] 8002e52: 4a34 ldr r2, [pc, #208] @ (8002f24 ) 8002e54: 4293 cmp r3, r2 8002e56: d012 beq.n 8002e7e 8002e58: 687b ldr r3, [r7, #4] 8002e5a: 681b ldr r3, [r3, #0] 8002e5c: 4a32 ldr r2, [pc, #200] @ (8002f28 ) 8002e5e: 4293 cmp r3, r2 8002e60: d00a beq.n 8002e78 8002e62: 687b ldr r3, [r7, #4] 8002e64: 681b ldr r3, [r3, #0] 8002e66: 4a31 ldr r2, [pc, #196] @ (8002f2c ) 8002e68: 4293 cmp r3, r2 8002e6a: d102 bne.n 8002e72 8002e6c: f44f 1300 mov.w r3, #2097152 @ 0x200000 8002e70: e00e b.n 8002e90 8002e72: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8002e76: e00b b.n 8002e90 8002e78: f44f 3300 mov.w r3, #131072 @ 0x20000 8002e7c: e008 b.n 8002e90 8002e7e: f44f 5300 mov.w r3, #8192 @ 0x2000 8002e82: e005 b.n 8002e90 8002e84: f44f 7300 mov.w r3, #512 @ 0x200 8002e88: e002 b.n 8002e90 8002e8a: 2320 movs r3, #32 8002e8c: e000 b.n 8002e90 8002e8e: 2302 movs r3, #2 8002e90: 4a27 ldr r2, [pc, #156] @ (8002f30 ) 8002e92: 6053 str r3, [r2, #4] /* Process Unlocked */ __HAL_UNLOCK(hdma); 8002e94: 687b ldr r3, [r7, #4] 8002e96: 2200 movs r2, #0 8002e98: f883 2020 strb.w r2, [r3, #32] if(hdma->XferCpltCallback != NULL) 8002e9c: 687b ldr r3, [r7, #4] 8002e9e: 6a9b ldr r3, [r3, #40] @ 0x28 8002ea0: 2b00 cmp r3, #0 8002ea2: d034 beq.n 8002f0e { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); 8002ea4: 687b ldr r3, [r7, #4] 8002ea6: 6a9b ldr r3, [r3, #40] @ 0x28 8002ea8: 6878 ldr r0, [r7, #4] 8002eaa: 4798 blx r3 if(hdma->XferCpltCallback != NULL) 8002eac: e02f b.n 8002f0e } } /* Transfer Error Interrupt management **************************************/ else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8002eae: 687b ldr r3, [r7, #4] 8002eb0: 6c1b ldr r3, [r3, #64] @ 0x40 8002eb2: 2208 movs r2, #8 8002eb4: 409a lsls r2, r3 8002eb6: 68fb ldr r3, [r7, #12] 8002eb8: 4013 ands r3, r2 8002eba: 2b00 cmp r3, #0 8002ebc: d028 beq.n 8002f10 8002ebe: 68bb ldr r3, [r7, #8] 8002ec0: f003 0308 and.w r3, r3, #8 8002ec4: 2b00 cmp r3, #0 8002ec6: d023 beq.n 8002f10 { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8002ec8: 687b ldr r3, [r7, #4] 8002eca: 681b ldr r3, [r3, #0] 8002ecc: 681a ldr r2, [r3, #0] 8002ece: 687b ldr r3, [r7, #4] 8002ed0: 681b ldr r3, [r3, #0] 8002ed2: f022 020e bic.w r2, r2, #14 8002ed6: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8002ed8: 687b ldr r3, [r7, #4] 8002eda: 6c1a ldr r2, [r3, #64] @ 0x40 8002edc: 687b ldr r3, [r7, #4] 8002ede: 6bdb ldr r3, [r3, #60] @ 0x3c 8002ee0: 2101 movs r1, #1 8002ee2: fa01 f202 lsl.w r2, r1, r2 8002ee6: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; 8002ee8: 687b ldr r3, [r7, #4] 8002eea: 2201 movs r2, #1 8002eec: 639a str r2, [r3, #56] @ 0x38 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8002eee: 687b ldr r3, [r7, #4] 8002ef0: 2201 movs r2, #1 8002ef2: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8002ef6: 687b ldr r3, [r7, #4] 8002ef8: 2200 movs r2, #0 8002efa: f883 2020 strb.w r2, [r3, #32] if (hdma->XferErrorCallback != NULL) 8002efe: 687b ldr r3, [r7, #4] 8002f00: 6b1b ldr r3, [r3, #48] @ 0x30 8002f02: 2b00 cmp r3, #0 8002f04: d004 beq.n 8002f10 { /* Transfer error callback */ hdma->XferErrorCallback(hdma); 8002f06: 687b ldr r3, [r7, #4] 8002f08: 6b1b ldr r3, [r3, #48] @ 0x30 8002f0a: 6878 ldr r0, [r7, #4] 8002f0c: 4798 blx r3 } } return; 8002f0e: bf00 nop 8002f10: bf00 nop } 8002f12: 3710 adds r7, #16 8002f14: 46bd mov sp, r7 8002f16: bd80 pop {r7, pc} 8002f18: 40020008 .word 0x40020008 8002f1c: 4002001c .word 0x4002001c 8002f20: 40020030 .word 0x40020030 8002f24: 40020044 .word 0x40020044 8002f28: 40020058 .word 0x40020058 8002f2c: 4002006c .word 0x4002006c 8002f30: 40020000 .word 0x40020000 08002f34 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8002f34: b480 push {r7} 8002f36: b085 sub sp, #20 8002f38: af00 add r7, sp, #0 8002f3a: 60f8 str r0, [r7, #12] 8002f3c: 60b9 str r1, [r7, #8] 8002f3e: 607a str r2, [r7, #4] 8002f40: 603b str r3, [r7, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8002f42: 68fb ldr r3, [r7, #12] 8002f44: 6c1a ldr r2, [r3, #64] @ 0x40 8002f46: 68fb ldr r3, [r7, #12] 8002f48: 6bdb ldr r3, [r3, #60] @ 0x3c 8002f4a: 2101 movs r1, #1 8002f4c: fa01 f202 lsl.w r2, r1, r2 8002f50: 605a str r2, [r3, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8002f52: 68fb ldr r3, [r7, #12] 8002f54: 681b ldr r3, [r3, #0] 8002f56: 683a ldr r2, [r7, #0] 8002f58: 605a str r2, [r3, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8002f5a: 68fb ldr r3, [r7, #12] 8002f5c: 685b ldr r3, [r3, #4] 8002f5e: 2b10 cmp r3, #16 8002f60: d108 bne.n 8002f74 { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8002f62: 68fb ldr r3, [r7, #12] 8002f64: 681b ldr r3, [r3, #0] 8002f66: 687a ldr r2, [r7, #4] 8002f68: 609a str r2, [r3, #8] /* Configure DMA Channel source address */ hdma->Instance->CMAR = SrcAddress; 8002f6a: 68fb ldr r3, [r7, #12] 8002f6c: 681b ldr r3, [r3, #0] 8002f6e: 68ba ldr r2, [r7, #8] 8002f70: 60da str r2, [r3, #12] hdma->Instance->CPAR = SrcAddress; /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; } } 8002f72: e007 b.n 8002f84 hdma->Instance->CPAR = SrcAddress; 8002f74: 68fb ldr r3, [r7, #12] 8002f76: 681b ldr r3, [r3, #0] 8002f78: 68ba ldr r2, [r7, #8] 8002f7a: 609a str r2, [r3, #8] hdma->Instance->CMAR = DstAddress; 8002f7c: 68fb ldr r3, [r7, #12] 8002f7e: 681b ldr r3, [r3, #0] 8002f80: 687a ldr r2, [r7, #4] 8002f82: 60da str r2, [r3, #12] } 8002f84: bf00 nop 8002f86: 3714 adds r7, #20 8002f88: 46bd mov sp, r7 8002f8a: bc80 pop {r7} 8002f8c: 4770 bx lr ... 08002f90 : * @param Data: Specifies the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { 8002f90: b5f0 push {r4, r5, r6, r7, lr} 8002f92: b087 sub sp, #28 8002f94: af00 add r7, sp, #0 8002f96: 60f8 str r0, [r7, #12] 8002f98: 60b9 str r1, [r7, #8] 8002f9a: e9c7 2300 strd r2, r3, [r7] HAL_StatusTypeDef status = HAL_ERROR; 8002f9e: 2301 movs r3, #1 8002fa0: 75fb strb r3, [r7, #23] uint8_t index = 0; 8002fa2: 2300 movs r3, #0 8002fa4: 75bb strb r3, [r7, #22] uint8_t nbiterations = 0; 8002fa6: 2300 movs r3, #0 8002fa8: 757b strb r3, [r7, #21] /* Process Locked */ __HAL_LOCK(&pFlash); 8002faa: 4b2f ldr r3, [pc, #188] @ (8003068 ) 8002fac: 7e1b ldrb r3, [r3, #24] 8002fae: 2b01 cmp r3, #1 8002fb0: d101 bne.n 8002fb6 8002fb2: 2302 movs r3, #2 8002fb4: e054 b.n 8003060 8002fb6: 4b2c ldr r3, [pc, #176] @ (8003068 ) 8002fb8: 2201 movs r2, #1 8002fba: 761a strb r2, [r3, #24] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8002fbc: f24c 3050 movw r0, #50000 @ 0xc350 8002fc0: f000 f8a8 bl 8003114 8002fc4: 4603 mov r3, r0 8002fc6: 75fb strb r3, [r7, #23] /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE); } #endif /* FLASH_BANK2_END */ if(status == HAL_OK) 8002fc8: 7dfb ldrb r3, [r7, #23] 8002fca: 2b00 cmp r3, #0 8002fcc: d144 bne.n 8003058 { if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8002fce: 68fb ldr r3, [r7, #12] 8002fd0: 2b01 cmp r3, #1 8002fd2: d102 bne.n 8002fda { /* Program halfword (16-bit) at a specified address. */ nbiterations = 1U; 8002fd4: 2301 movs r3, #1 8002fd6: 757b strb r3, [r7, #21] 8002fd8: e007 b.n 8002fea } else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) 8002fda: 68fb ldr r3, [r7, #12] 8002fdc: 2b02 cmp r3, #2 8002fde: d102 bne.n 8002fe6 { /* Program word (32-bit = 2*16-bit) at a specified address. */ nbiterations = 2U; 8002fe0: 2302 movs r3, #2 8002fe2: 757b strb r3, [r7, #21] 8002fe4: e001 b.n 8002fea } else { /* Program double word (64-bit = 4*16-bit) at a specified address. */ nbiterations = 4U; 8002fe6: 2304 movs r3, #4 8002fe8: 757b strb r3, [r7, #21] } for (index = 0U; index < nbiterations; index++) 8002fea: 2300 movs r3, #0 8002fec: 75bb strb r3, [r7, #22] 8002fee: e02d b.n 800304c { FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8002ff0: 7dbb ldrb r3, [r7, #22] 8002ff2: 005a lsls r2, r3, #1 8002ff4: 68bb ldr r3, [r7, #8] 8002ff6: eb02 0c03 add.w ip, r2, r3 8002ffa: 7dbb ldrb r3, [r7, #22] 8002ffc: 0119 lsls r1, r3, #4 8002ffe: e9d7 2300 ldrd r2, r3, [r7] 8003002: f1c1 0620 rsb r6, r1, #32 8003006: f1a1 0020 sub.w r0, r1, #32 800300a: fa22 f401 lsr.w r4, r2, r1 800300e: fa03 f606 lsl.w r6, r3, r6 8003012: 4334 orrs r4, r6 8003014: fa23 f000 lsr.w r0, r3, r0 8003018: 4304 orrs r4, r0 800301a: fa23 f501 lsr.w r5, r3, r1 800301e: b2a3 uxth r3, r4 8003020: 4619 mov r1, r3 8003022: 4660 mov r0, ip 8003024: f000 f85a bl 80030dc #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8003028: f24c 3050 movw r0, #50000 @ 0xc350 800302c: f000 f872 bl 8003114 8003030: 4603 mov r3, r0 8003032: 75fb strb r3, [r7, #23] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 8003034: 4b0d ldr r3, [pc, #52] @ (800306c ) 8003036: 691b ldr r3, [r3, #16] 8003038: 4a0c ldr r2, [pc, #48] @ (800306c ) 800303a: f023 0301 bic.w r3, r3, #1 800303e: 6113 str r3, [r2, #16] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* In case of error, stop programation procedure */ if (status != HAL_OK) 8003040: 7dfb ldrb r3, [r7, #23] 8003042: 2b00 cmp r3, #0 8003044: d107 bne.n 8003056 for (index = 0U; index < nbiterations; index++) 8003046: 7dbb ldrb r3, [r7, #22] 8003048: 3301 adds r3, #1 800304a: 75bb strb r3, [r7, #22] 800304c: 7dba ldrb r2, [r7, #22] 800304e: 7d7b ldrb r3, [r7, #21] 8003050: 429a cmp r2, r3 8003052: d3cd bcc.n 8002ff0 8003054: e000 b.n 8003058 { break; 8003056: bf00 nop } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 8003058: 4b03 ldr r3, [pc, #12] @ (8003068 ) 800305a: 2200 movs r2, #0 800305c: 761a strb r2, [r3, #24] return status; 800305e: 7dfb ldrb r3, [r7, #23] } 8003060: 4618 mov r0, r3 8003062: 371c adds r7, #28 8003064: 46bd mov sp, r7 8003066: bdf0 pop {r4, r5, r6, r7, pc} 8003068: 200003f0 .word 0x200003f0 800306c: 40022000 .word 0x40022000 08003070 : /** * @brief Unlock the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Unlock(void) { 8003070: b480 push {r7} 8003072: b083 sub sp, #12 8003074: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 8003076: 2300 movs r3, #0 8003078: 71fb strb r3, [r7, #7] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 800307a: 4b0d ldr r3, [pc, #52] @ (80030b0 ) 800307c: 691b ldr r3, [r3, #16] 800307e: f003 0380 and.w r3, r3, #128 @ 0x80 8003082: 2b00 cmp r3, #0 8003084: d00d beq.n 80030a2 { /* Authorize the FLASH Registers access */ WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8003086: 4b0a ldr r3, [pc, #40] @ (80030b0 ) 8003088: 4a0a ldr r2, [pc, #40] @ (80030b4 ) 800308a: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 800308c: 4b08 ldr r3, [pc, #32] @ (80030b0 ) 800308e: 4a0a ldr r2, [pc, #40] @ (80030b8 ) 8003090: 605a str r2, [r3, #4] /* Verify Flash is unlocked */ if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8003092: 4b07 ldr r3, [pc, #28] @ (80030b0 ) 8003094: 691b ldr r3, [r3, #16] 8003096: f003 0380 and.w r3, r3, #128 @ 0x80 800309a: 2b00 cmp r3, #0 800309c: d001 beq.n 80030a2 { status = HAL_ERROR; 800309e: 2301 movs r3, #1 80030a0: 71fb strb r3, [r7, #7] status = HAL_ERROR; } } #endif /* FLASH_BANK2_END */ return status; 80030a2: 79fb ldrb r3, [r7, #7] } 80030a4: 4618 mov r0, r3 80030a6: 370c adds r7, #12 80030a8: 46bd mov sp, r7 80030aa: bc80 pop {r7} 80030ac: 4770 bx lr 80030ae: bf00 nop 80030b0: 40022000 .word 0x40022000 80030b4: 45670123 .word 0x45670123 80030b8: cdef89ab .word 0xcdef89ab 080030bc : /** * @brief Locks the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Lock(void) { 80030bc: b480 push {r7} 80030be: af00 add r7, sp, #0 /* Set the LOCK Bit to lock the FLASH Registers access */ SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80030c0: 4b05 ldr r3, [pc, #20] @ (80030d8 ) 80030c2: 691b ldr r3, [r3, #16] 80030c4: 4a04 ldr r2, [pc, #16] @ (80030d8 ) 80030c6: f043 0380 orr.w r3, r3, #128 @ 0x80 80030ca: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) /* Set the LOCK Bit to lock the FLASH BANK2 Registers access */ SET_BIT(FLASH->CR2, FLASH_CR2_LOCK); #endif /* FLASH_BANK2_END */ return HAL_OK; 80030cc: 2300 movs r3, #0 } 80030ce: 4618 mov r0, r3 80030d0: 46bd mov sp, r7 80030d2: bc80 pop {r7} 80030d4: 4770 bx lr 80030d6: bf00 nop 80030d8: 40022000 .word 0x40022000 080030dc : * @param Address specify the address to be programmed. * @param Data specify the data to be programmed. * @retval None */ static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) { 80030dc: b480 push {r7} 80030de: b083 sub sp, #12 80030e0: af00 add r7, sp, #0 80030e2: 6078 str r0, [r7, #4] 80030e4: 460b mov r3, r1 80030e6: 807b strh r3, [r7, #2] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80030e8: 4b08 ldr r3, [pc, #32] @ (800310c ) 80030ea: 2200 movs r2, #0 80030ec: 61da str r2, [r3, #28] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Proceed to program the new data */ SET_BIT(FLASH->CR, FLASH_CR_PG); 80030ee: 4b08 ldr r3, [pc, #32] @ (8003110 ) 80030f0: 691b ldr r3, [r3, #16] 80030f2: 4a07 ldr r2, [pc, #28] @ (8003110 ) 80030f4: f043 0301 orr.w r3, r3, #1 80030f8: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* Write data in the address */ *(__IO uint16_t*)Address = Data; 80030fa: 687b ldr r3, [r7, #4] 80030fc: 887a ldrh r2, [r7, #2] 80030fe: 801a strh r2, [r3, #0] } 8003100: bf00 nop 8003102: 370c adds r7, #12 8003104: 46bd mov sp, r7 8003106: bc80 pop {r7} 8003108: 4770 bx lr 800310a: bf00 nop 800310c: 200003f0 .word 0x200003f0 8003110: 40022000 .word 0x40022000 08003114 : * @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operation timeout * @retval HAL Status */ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) { 8003114: b580 push {r7, lr} 8003116: b084 sub sp, #16 8003118: af00 add r7, sp, #0 800311a: 6078 str r0, [r7, #4] /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. Even if the FLASH operation fails, the BUSY flag will be reset and an error flag will be set */ uint32_t tickstart = HAL_GetTick(); 800311c: f7ff f860 bl 80021e0 8003120: 60f8 str r0, [r7, #12] while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8003122: e010 b.n 8003146 { if (Timeout != HAL_MAX_DELAY) 8003124: 687b ldr r3, [r7, #4] 8003126: f1b3 3fff cmp.w r3, #4294967295 800312a: d00c beq.n 8003146 { if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 800312c: 687b ldr r3, [r7, #4] 800312e: 2b00 cmp r3, #0 8003130: d007 beq.n 8003142 8003132: f7ff f855 bl 80021e0 8003136: 4602 mov r2, r0 8003138: 68fb ldr r3, [r7, #12] 800313a: 1ad3 subs r3, r2, r3 800313c: 687a ldr r2, [r7, #4] 800313e: 429a cmp r2, r3 8003140: d201 bcs.n 8003146 { return HAL_TIMEOUT; 8003142: 2303 movs r3, #3 8003144: e025 b.n 8003192 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8003146: 4b15 ldr r3, [pc, #84] @ (800319c ) 8003148: 68db ldr r3, [r3, #12] 800314a: f003 0301 and.w r3, r3, #1 800314e: 2b00 cmp r3, #0 8003150: d1e8 bne.n 8003124 } } } /* Check FLASH End of Operation flag */ if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8003152: 4b12 ldr r3, [pc, #72] @ (800319c ) 8003154: 68db ldr r3, [r3, #12] 8003156: f003 0320 and.w r3, r3, #32 800315a: 2b00 cmp r3, #0 800315c: d002 beq.n 8003164 { /* Clear FLASH End of Operation pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 800315e: 4b0f ldr r3, [pc, #60] @ (800319c ) 8003160: 2220 movs r2, #32 8003162: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8003164: 4b0d ldr r3, [pc, #52] @ (800319c ) 8003166: 68db ldr r3, [r3, #12] 8003168: f003 0310 and.w r3, r3, #16 800316c: 2b00 cmp r3, #0 800316e: d10b bne.n 8003188 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8003170: 4b0a ldr r3, [pc, #40] @ (800319c ) 8003172: 69db ldr r3, [r3, #28] 8003174: f003 0301 and.w r3, r3, #1 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8003178: 2b00 cmp r3, #0 800317a: d105 bne.n 8003188 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 800317c: 4b07 ldr r3, [pc, #28] @ (800319c ) 800317e: 68db ldr r3, [r3, #12] 8003180: f003 0304 and.w r3, r3, #4 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8003184: 2b00 cmp r3, #0 8003186: d003 beq.n 8003190 { /*Save the error code*/ FLASH_SetErrorCode(); 8003188: f000 f80a bl 80031a0 return HAL_ERROR; 800318c: 2301 movs r3, #1 800318e: e000 b.n 8003192 } /* There is no error flag set */ return HAL_OK; 8003190: 2300 movs r3, #0 } 8003192: 4618 mov r0, r3 8003194: 3710 adds r7, #16 8003196: 46bd mov sp, r7 8003198: bd80 pop {r7, pc} 800319a: bf00 nop 800319c: 40022000 .word 0x40022000 080031a0 : /** * @brief Set the specific FLASH error flag. * @retval None */ static void FLASH_SetErrorCode(void) { 80031a0: b480 push {r7} 80031a2: b083 sub sp, #12 80031a4: af00 add r7, sp, #0 uint32_t flags = 0U; 80031a6: 2300 movs r3, #0 80031a8: 607b str r3, [r7, #4] #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 80031aa: 4b23 ldr r3, [pc, #140] @ (8003238 ) 80031ac: 68db ldr r3, [r3, #12] 80031ae: f003 0310 and.w r3, r3, #16 80031b2: 2b00 cmp r3, #0 80031b4: d009 beq.n 80031ca #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 80031b6: 4b21 ldr r3, [pc, #132] @ (800323c ) 80031b8: 69db ldr r3, [r3, #28] 80031ba: f043 0302 orr.w r3, r3, #2 80031be: 4a1f ldr r2, [pc, #124] @ (800323c ) 80031c0: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 80031c2: 687b ldr r3, [r7, #4] 80031c4: f043 0310 orr.w r3, r3, #16 80031c8: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80031ca: 4b1b ldr r3, [pc, #108] @ (8003238 ) 80031cc: 68db ldr r3, [r3, #12] 80031ce: f003 0304 and.w r3, r3, #4 80031d2: 2b00 cmp r3, #0 80031d4: d009 beq.n 80031ea #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80031d6: 4b19 ldr r3, [pc, #100] @ (800323c ) 80031d8: 69db ldr r3, [r3, #28] 80031da: f043 0301 orr.w r3, r3, #1 80031de: 4a17 ldr r2, [pc, #92] @ (800323c ) 80031e0: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 80031e2: 687b ldr r3, [r7, #4] 80031e4: f043 0304 orr.w r3, r3, #4 80031e8: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 80031ea: 4b13 ldr r3, [pc, #76] @ (8003238 ) 80031ec: 69db ldr r3, [r3, #28] 80031ee: f003 0301 and.w r3, r3, #1 80031f2: 2b00 cmp r3, #0 80031f4: d00b beq.n 800320e { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 80031f6: 4b11 ldr r3, [pc, #68] @ (800323c ) 80031f8: 69db ldr r3, [r3, #28] 80031fa: f043 0304 orr.w r3, r3, #4 80031fe: 4a0f ldr r2, [pc, #60] @ (800323c ) 8003200: 61d3 str r3, [r2, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 8003202: 4b0d ldr r3, [pc, #52] @ (8003238 ) 8003204: 69db ldr r3, [r3, #28] 8003206: 4a0c ldr r2, [pc, #48] @ (8003238 ) 8003208: f023 0301 bic.w r3, r3, #1 800320c: 61d3 str r3, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 800320e: 687b ldr r3, [r7, #4] 8003210: f240 1201 movw r2, #257 @ 0x101 8003214: 4293 cmp r3, r2 8003216: d106 bne.n 8003226 8003218: 4b07 ldr r3, [pc, #28] @ (8003238 ) 800321a: 69db ldr r3, [r3, #28] 800321c: 4a06 ldr r2, [pc, #24] @ (8003238 ) 800321e: f023 0301 bic.w r3, r3, #1 8003222: 61d3 str r3, [r2, #28] } 8003224: e002 b.n 800322c __HAL_FLASH_CLEAR_FLAG(flags); 8003226: 4a04 ldr r2, [pc, #16] @ (8003238 ) 8003228: 687b ldr r3, [r7, #4] 800322a: 60d3 str r3, [r2, #12] } 800322c: bf00 nop 800322e: 370c adds r7, #12 8003230: 46bd mov sp, r7 8003232: bc80 pop {r7} 8003234: 4770 bx lr 8003236: bf00 nop 8003238: 40022000 .word 0x40022000 800323c: 200003f0 .word 0x200003f0 08003240 : * (0xFFFFFFFF means that all the pages have been correctly erased) * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { 8003240: b580 push {r7, lr} 8003242: b084 sub sp, #16 8003244: af00 add r7, sp, #0 8003246: 6078 str r0, [r7, #4] 8003248: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_ERROR; 800324a: 2301 movs r3, #1 800324c: 73fb strb r3, [r7, #15] uint32_t address = 0U; 800324e: 2300 movs r3, #0 8003250: 60bb str r3, [r7, #8] /* Process Locked */ __HAL_LOCK(&pFlash); 8003252: 4b2f ldr r3, [pc, #188] @ (8003310 ) 8003254: 7e1b ldrb r3, [r3, #24] 8003256: 2b01 cmp r3, #1 8003258: d101 bne.n 800325e 800325a: 2302 movs r3, #2 800325c: e053 b.n 8003306 800325e: 4b2c ldr r3, [pc, #176] @ (8003310 ) 8003260: 2201 movs r2, #1 8003262: 761a strb r2, [r3, #24] /* Check the parameters */ assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8003264: 687b ldr r3, [r7, #4] 8003266: 681b ldr r3, [r3, #0] 8003268: 2b02 cmp r3, #2 800326a: d116 bne.n 800329a else #endif /* FLASH_BANK2_END */ { /* Mass Erase requested for Bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800326c: f24c 3050 movw r0, #50000 @ 0xc350 8003270: f7ff ff50 bl 8003114 8003274: 4603 mov r3, r0 8003276: 2b00 cmp r3, #0 8003278: d141 bne.n 80032fe { /*Mass erase to be done*/ FLASH_MassErase(FLASH_BANK_1); 800327a: 2001 movs r0, #1 800327c: f000 f84c bl 8003318 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8003280: f24c 3050 movw r0, #50000 @ 0xc350 8003284: f7ff ff46 bl 8003114 8003288: 4603 mov r3, r0 800328a: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the MER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 800328c: 4b21 ldr r3, [pc, #132] @ (8003314 ) 800328e: 691b ldr r3, [r3, #16] 8003290: 4a20 ldr r2, [pc, #128] @ (8003314 ) 8003292: f023 0304 bic.w r3, r3, #4 8003296: 6113 str r3, [r2, #16] 8003298: e031 b.n 80032fe else #endif /* FLASH_BANK2_END */ { /* Page Erase requested on address located on bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800329a: f24c 3050 movw r0, #50000 @ 0xc350 800329e: f7ff ff39 bl 8003114 80032a2: 4603 mov r3, r0 80032a4: 2b00 cmp r3, #0 80032a6: d12a bne.n 80032fe { /*Initialization of PageError variable*/ *PageError = 0xFFFFFFFFU; 80032a8: 683b ldr r3, [r7, #0] 80032aa: f04f 32ff mov.w r2, #4294967295 80032ae: 601a str r2, [r3, #0] /* Erase page by page to be done*/ for(address = pEraseInit->PageAddress; 80032b0: 687b ldr r3, [r7, #4] 80032b2: 689b ldr r3, [r3, #8] 80032b4: 60bb str r3, [r7, #8] 80032b6: e019 b.n 80032ec address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); address += FLASH_PAGE_SIZE) { FLASH_PageErase(address); 80032b8: 68b8 ldr r0, [r7, #8] 80032ba: f000 f849 bl 8003350 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80032be: f24c 3050 movw r0, #50000 @ 0xc350 80032c2: f7ff ff27 bl 8003114 80032c6: 4603 mov r3, r0 80032c8: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the PER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 80032ca: 4b12 ldr r3, [pc, #72] @ (8003314 ) 80032cc: 691b ldr r3, [r3, #16] 80032ce: 4a11 ldr r2, [pc, #68] @ (8003314 ) 80032d0: f023 0302 bic.w r3, r3, #2 80032d4: 6113 str r3, [r2, #16] if (status != HAL_OK) 80032d6: 7bfb ldrb r3, [r7, #15] 80032d8: 2b00 cmp r3, #0 80032da: d003 beq.n 80032e4 { /* In case of error, stop erase procedure and return the faulty address */ *PageError = address; 80032dc: 683b ldr r3, [r7, #0] 80032de: 68ba ldr r2, [r7, #8] 80032e0: 601a str r2, [r3, #0] break; 80032e2: e00c b.n 80032fe address += FLASH_PAGE_SIZE) 80032e4: 68bb ldr r3, [r7, #8] 80032e6: f503 6380 add.w r3, r3, #1024 @ 0x400 80032ea: 60bb str r3, [r7, #8] address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 80032ec: 687b ldr r3, [r7, #4] 80032ee: 68db ldr r3, [r3, #12] 80032f0: 029a lsls r2, r3, #10 80032f2: 687b ldr r3, [r7, #4] 80032f4: 689b ldr r3, [r3, #8] 80032f6: 4413 add r3, r2 80032f8: 68ba ldr r2, [r7, #8] 80032fa: 429a cmp r2, r3 80032fc: d3dc bcc.n 80032b8 } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 80032fe: 4b04 ldr r3, [pc, #16] @ (8003310 ) 8003300: 2200 movs r2, #0 8003302: 761a strb r2, [r3, #24] return status; 8003304: 7bfb ldrb r3, [r7, #15] } 8003306: 4618 mov r0, r3 8003308: 3710 adds r7, #16 800330a: 46bd mov sp, r7 800330c: bd80 pop {r7, pc} 800330e: bf00 nop 8003310: 200003f0 .word 0x200003f0 8003314: 40022000 .word 0x40022000 08003318 : @endif * * @retval None */ static void FLASH_MassErase(uint32_t Banks) { 8003318: b480 push {r7} 800331a: b083 sub sp, #12 800331c: af00 add r7, sp, #0 800331e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8003320: 4b09 ldr r3, [pc, #36] @ (8003348 ) 8003322: 2200 movs r2, #0 8003324: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 8003326: 4b09 ldr r3, [pc, #36] @ (800334c ) 8003328: 691b ldr r3, [r3, #16] 800332a: 4a08 ldr r2, [pc, #32] @ (800334c ) 800332c: f043 0304 orr.w r3, r3, #4 8003330: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8003332: 4b06 ldr r3, [pc, #24] @ (800334c ) 8003334: 691b ldr r3, [r3, #16] 8003336: 4a05 ldr r2, [pc, #20] @ (800334c ) 8003338: f043 0340 orr.w r3, r3, #64 @ 0x40 800333c: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 800333e: bf00 nop 8003340: 370c adds r7, #12 8003342: 46bd mov sp, r7 8003344: bc80 pop {r7} 8003346: 4770 bx lr 8003348: 200003f0 .word 0x200003f0 800334c: 40022000 .word 0x40022000 08003350 : * The value of this parameter depend on device used within the same series * * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { 8003350: b480 push {r7} 8003352: b083 sub sp, #12 8003354: af00 add r7, sp, #0 8003356: 6078 str r0, [r7, #4] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8003358: 4b0b ldr r3, [pc, #44] @ (8003388 ) 800335a: 2200 movs r2, #0 800335c: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 800335e: 4b0b ldr r3, [pc, #44] @ (800338c ) 8003360: 691b ldr r3, [r3, #16] 8003362: 4a0a ldr r2, [pc, #40] @ (800338c ) 8003364: f043 0302 orr.w r3, r3, #2 8003368: 6113 str r3, [r2, #16] WRITE_REG(FLASH->AR, PageAddress); 800336a: 4a08 ldr r2, [pc, #32] @ (800338c ) 800336c: 687b ldr r3, [r7, #4] 800336e: 6153 str r3, [r2, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8003370: 4b06 ldr r3, [pc, #24] @ (800338c ) 8003372: 691b ldr r3, [r3, #16] 8003374: 4a05 ldr r2, [pc, #20] @ (800338c ) 8003376: f043 0340 orr.w r3, r3, #64 @ 0x40 800337a: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 800337c: bf00 nop 800337e: 370c adds r7, #12 8003380: 46bd mov sp, r7 8003382: bc80 pop {r7} 8003384: 4770 bx lr 8003386: bf00 nop 8003388: 200003f0 .word 0x200003f0 800338c: 40022000 .word 0x40022000 08003390 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8003390: b480 push {r7} 8003392: b08b sub sp, #44 @ 0x2c 8003394: af00 add r7, sp, #0 8003396: 6078 str r0, [r7, #4] 8003398: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 800339a: 2300 movs r3, #0 800339c: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 800339e: 2300 movs r3, #0 80033a0: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80033a2: e169 b.n 8003678 { /* Get the IO position */ ioposition = (0x01uL << position); 80033a4: 2201 movs r2, #1 80033a6: 6a7b ldr r3, [r7, #36] @ 0x24 80033a8: fa02 f303 lsl.w r3, r2, r3 80033ac: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80033ae: 683b ldr r3, [r7, #0] 80033b0: 681b ldr r3, [r3, #0] 80033b2: 69fa ldr r2, [r7, #28] 80033b4: 4013 ands r3, r2 80033b6: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 80033b8: 69ba ldr r2, [r7, #24] 80033ba: 69fb ldr r3, [r7, #28] 80033bc: 429a cmp r2, r3 80033be: f040 8158 bne.w 8003672 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 80033c2: 683b ldr r3, [r7, #0] 80033c4: 685b ldr r3, [r3, #4] 80033c6: 4a9a ldr r2, [pc, #616] @ (8003630 ) 80033c8: 4293 cmp r3, r2 80033ca: d05e beq.n 800348a 80033cc: 4a98 ldr r2, [pc, #608] @ (8003630 ) 80033ce: 4293 cmp r3, r2 80033d0: d875 bhi.n 80034be 80033d2: 4a98 ldr r2, [pc, #608] @ (8003634 ) 80033d4: 4293 cmp r3, r2 80033d6: d058 beq.n 800348a 80033d8: 4a96 ldr r2, [pc, #600] @ (8003634 ) 80033da: 4293 cmp r3, r2 80033dc: d86f bhi.n 80034be 80033de: 4a96 ldr r2, [pc, #600] @ (8003638 ) 80033e0: 4293 cmp r3, r2 80033e2: d052 beq.n 800348a 80033e4: 4a94 ldr r2, [pc, #592] @ (8003638 ) 80033e6: 4293 cmp r3, r2 80033e8: d869 bhi.n 80034be 80033ea: 4a94 ldr r2, [pc, #592] @ (800363c ) 80033ec: 4293 cmp r3, r2 80033ee: d04c beq.n 800348a 80033f0: 4a92 ldr r2, [pc, #584] @ (800363c ) 80033f2: 4293 cmp r3, r2 80033f4: d863 bhi.n 80034be 80033f6: 4a92 ldr r2, [pc, #584] @ (8003640 ) 80033f8: 4293 cmp r3, r2 80033fa: d046 beq.n 800348a 80033fc: 4a90 ldr r2, [pc, #576] @ (8003640 ) 80033fe: 4293 cmp r3, r2 8003400: d85d bhi.n 80034be 8003402: 2b12 cmp r3, #18 8003404: d82a bhi.n 800345c 8003406: 2b12 cmp r3, #18 8003408: d859 bhi.n 80034be 800340a: a201 add r2, pc, #4 @ (adr r2, 8003410 ) 800340c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003410: 0800348b .word 0x0800348b 8003414: 08003465 .word 0x08003465 8003418: 08003477 .word 0x08003477 800341c: 080034b9 .word 0x080034b9 8003420: 080034bf .word 0x080034bf 8003424: 080034bf .word 0x080034bf 8003428: 080034bf .word 0x080034bf 800342c: 080034bf .word 0x080034bf 8003430: 080034bf .word 0x080034bf 8003434: 080034bf .word 0x080034bf 8003438: 080034bf .word 0x080034bf 800343c: 080034bf .word 0x080034bf 8003440: 080034bf .word 0x080034bf 8003444: 080034bf .word 0x080034bf 8003448: 080034bf .word 0x080034bf 800344c: 080034bf .word 0x080034bf 8003450: 080034bf .word 0x080034bf 8003454: 0800346d .word 0x0800346d 8003458: 08003481 .word 0x08003481 800345c: 4a79 ldr r2, [pc, #484] @ (8003644 ) 800345e: 4293 cmp r3, r2 8003460: d013 beq.n 800348a config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8003462: e02c b.n 80034be config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8003464: 683b ldr r3, [r7, #0] 8003466: 68db ldr r3, [r3, #12] 8003468: 623b str r3, [r7, #32] break; 800346a: e029 b.n 80034c0 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 800346c: 683b ldr r3, [r7, #0] 800346e: 68db ldr r3, [r3, #12] 8003470: 3304 adds r3, #4 8003472: 623b str r3, [r7, #32] break; 8003474: e024 b.n 80034c0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8003476: 683b ldr r3, [r7, #0] 8003478: 68db ldr r3, [r3, #12] 800347a: 3308 adds r3, #8 800347c: 623b str r3, [r7, #32] break; 800347e: e01f b.n 80034c0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8003480: 683b ldr r3, [r7, #0] 8003482: 68db ldr r3, [r3, #12] 8003484: 330c adds r3, #12 8003486: 623b str r3, [r7, #32] break; 8003488: e01a b.n 80034c0 if (GPIO_Init->Pull == GPIO_NOPULL) 800348a: 683b ldr r3, [r7, #0] 800348c: 689b ldr r3, [r3, #8] 800348e: 2b00 cmp r3, #0 8003490: d102 bne.n 8003498 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8003492: 2304 movs r3, #4 8003494: 623b str r3, [r7, #32] break; 8003496: e013 b.n 80034c0 else if (GPIO_Init->Pull == GPIO_PULLUP) 8003498: 683b ldr r3, [r7, #0] 800349a: 689b ldr r3, [r3, #8] 800349c: 2b01 cmp r3, #1 800349e: d105 bne.n 80034ac config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80034a0: 2308 movs r3, #8 80034a2: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 80034a4: 687b ldr r3, [r7, #4] 80034a6: 69fa ldr r2, [r7, #28] 80034a8: 611a str r2, [r3, #16] break; 80034aa: e009 b.n 80034c0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80034ac: 2308 movs r3, #8 80034ae: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 80034b0: 687b ldr r3, [r7, #4] 80034b2: 69fa ldr r2, [r7, #28] 80034b4: 615a str r2, [r3, #20] break; 80034b6: e003 b.n 80034c0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80034b8: 2300 movs r3, #0 80034ba: 623b str r3, [r7, #32] break; 80034bc: e000 b.n 80034c0 break; 80034be: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80034c0: 69bb ldr r3, [r7, #24] 80034c2: 2bff cmp r3, #255 @ 0xff 80034c4: d801 bhi.n 80034ca 80034c6: 687b ldr r3, [r7, #4] 80034c8: e001 b.n 80034ce 80034ca: 687b ldr r3, [r7, #4] 80034cc: 3304 adds r3, #4 80034ce: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 80034d0: 69bb ldr r3, [r7, #24] 80034d2: 2bff cmp r3, #255 @ 0xff 80034d4: d802 bhi.n 80034dc 80034d6: 6a7b ldr r3, [r7, #36] @ 0x24 80034d8: 009b lsls r3, r3, #2 80034da: e002 b.n 80034e2 80034dc: 6a7b ldr r3, [r7, #36] @ 0x24 80034de: 3b08 subs r3, #8 80034e0: 009b lsls r3, r3, #2 80034e2: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80034e4: 697b ldr r3, [r7, #20] 80034e6: 681a ldr r2, [r3, #0] 80034e8: 210f movs r1, #15 80034ea: 693b ldr r3, [r7, #16] 80034ec: fa01 f303 lsl.w r3, r1, r3 80034f0: 43db mvns r3, r3 80034f2: 401a ands r2, r3 80034f4: 6a39 ldr r1, [r7, #32] 80034f6: 693b ldr r3, [r7, #16] 80034f8: fa01 f303 lsl.w r3, r1, r3 80034fc: 431a orrs r2, r3 80034fe: 697b ldr r3, [r7, #20] 8003500: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8003502: 683b ldr r3, [r7, #0] 8003504: 685b ldr r3, [r3, #4] 8003506: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800350a: 2b00 cmp r3, #0 800350c: f000 80b1 beq.w 8003672 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8003510: 4b4d ldr r3, [pc, #308] @ (8003648 ) 8003512: 699b ldr r3, [r3, #24] 8003514: 4a4c ldr r2, [pc, #304] @ (8003648 ) 8003516: f043 0301 orr.w r3, r3, #1 800351a: 6193 str r3, [r2, #24] 800351c: 4b4a ldr r3, [pc, #296] @ (8003648 ) 800351e: 699b ldr r3, [r3, #24] 8003520: f003 0301 and.w r3, r3, #1 8003524: 60bb str r3, [r7, #8] 8003526: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8003528: 4a48 ldr r2, [pc, #288] @ (800364c ) 800352a: 6a7b ldr r3, [r7, #36] @ 0x24 800352c: 089b lsrs r3, r3, #2 800352e: 3302 adds r3, #2 8003530: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8003534: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8003536: 6a7b ldr r3, [r7, #36] @ 0x24 8003538: f003 0303 and.w r3, r3, #3 800353c: 009b lsls r3, r3, #2 800353e: 220f movs r2, #15 8003540: fa02 f303 lsl.w r3, r2, r3 8003544: 43db mvns r3, r3 8003546: 68fa ldr r2, [r7, #12] 8003548: 4013 ands r3, r2 800354a: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 800354c: 687b ldr r3, [r7, #4] 800354e: 4a40 ldr r2, [pc, #256] @ (8003650 ) 8003550: 4293 cmp r3, r2 8003552: d013 beq.n 800357c 8003554: 687b ldr r3, [r7, #4] 8003556: 4a3f ldr r2, [pc, #252] @ (8003654 ) 8003558: 4293 cmp r3, r2 800355a: d00d beq.n 8003578 800355c: 687b ldr r3, [r7, #4] 800355e: 4a3e ldr r2, [pc, #248] @ (8003658 ) 8003560: 4293 cmp r3, r2 8003562: d007 beq.n 8003574 8003564: 687b ldr r3, [r7, #4] 8003566: 4a3d ldr r2, [pc, #244] @ (800365c ) 8003568: 4293 cmp r3, r2 800356a: d101 bne.n 8003570 800356c: 2303 movs r3, #3 800356e: e006 b.n 800357e 8003570: 2304 movs r3, #4 8003572: e004 b.n 800357e 8003574: 2302 movs r3, #2 8003576: e002 b.n 800357e 8003578: 2301 movs r3, #1 800357a: e000 b.n 800357e 800357c: 2300 movs r3, #0 800357e: 6a7a ldr r2, [r7, #36] @ 0x24 8003580: f002 0203 and.w r2, r2, #3 8003584: 0092 lsls r2, r2, #2 8003586: 4093 lsls r3, r2 8003588: 68fa ldr r2, [r7, #12] 800358a: 4313 orrs r3, r2 800358c: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 800358e: 492f ldr r1, [pc, #188] @ (800364c ) 8003590: 6a7b ldr r3, [r7, #36] @ 0x24 8003592: 089b lsrs r3, r3, #2 8003594: 3302 adds r3, #2 8003596: 68fa ldr r2, [r7, #12] 8003598: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 800359c: 683b ldr r3, [r7, #0] 800359e: 685b ldr r3, [r3, #4] 80035a0: f403 1380 and.w r3, r3, #1048576 @ 0x100000 80035a4: 2b00 cmp r3, #0 80035a6: d006 beq.n 80035b6 { SET_BIT(EXTI->RTSR, iocurrent); 80035a8: 4b2d ldr r3, [pc, #180] @ (8003660 ) 80035aa: 689a ldr r2, [r3, #8] 80035ac: 492c ldr r1, [pc, #176] @ (8003660 ) 80035ae: 69bb ldr r3, [r7, #24] 80035b0: 4313 orrs r3, r2 80035b2: 608b str r3, [r1, #8] 80035b4: e006 b.n 80035c4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 80035b6: 4b2a ldr r3, [pc, #168] @ (8003660 ) 80035b8: 689a ldr r2, [r3, #8] 80035ba: 69bb ldr r3, [r7, #24] 80035bc: 43db mvns r3, r3 80035be: 4928 ldr r1, [pc, #160] @ (8003660 ) 80035c0: 4013 ands r3, r2 80035c2: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 80035c4: 683b ldr r3, [r7, #0] 80035c6: 685b ldr r3, [r3, #4] 80035c8: f403 1300 and.w r3, r3, #2097152 @ 0x200000 80035cc: 2b00 cmp r3, #0 80035ce: d006 beq.n 80035de { SET_BIT(EXTI->FTSR, iocurrent); 80035d0: 4b23 ldr r3, [pc, #140] @ (8003660 ) 80035d2: 68da ldr r2, [r3, #12] 80035d4: 4922 ldr r1, [pc, #136] @ (8003660 ) 80035d6: 69bb ldr r3, [r7, #24] 80035d8: 4313 orrs r3, r2 80035da: 60cb str r3, [r1, #12] 80035dc: e006 b.n 80035ec } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 80035de: 4b20 ldr r3, [pc, #128] @ (8003660 ) 80035e0: 68da ldr r2, [r3, #12] 80035e2: 69bb ldr r3, [r7, #24] 80035e4: 43db mvns r3, r3 80035e6: 491e ldr r1, [pc, #120] @ (8003660 ) 80035e8: 4013 ands r3, r2 80035ea: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 80035ec: 683b ldr r3, [r7, #0] 80035ee: 685b ldr r3, [r3, #4] 80035f0: f403 3300 and.w r3, r3, #131072 @ 0x20000 80035f4: 2b00 cmp r3, #0 80035f6: d006 beq.n 8003606 { SET_BIT(EXTI->EMR, iocurrent); 80035f8: 4b19 ldr r3, [pc, #100] @ (8003660 ) 80035fa: 685a ldr r2, [r3, #4] 80035fc: 4918 ldr r1, [pc, #96] @ (8003660 ) 80035fe: 69bb ldr r3, [r7, #24] 8003600: 4313 orrs r3, r2 8003602: 604b str r3, [r1, #4] 8003604: e006 b.n 8003614 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8003606: 4b16 ldr r3, [pc, #88] @ (8003660 ) 8003608: 685a ldr r2, [r3, #4] 800360a: 69bb ldr r3, [r7, #24] 800360c: 43db mvns r3, r3 800360e: 4914 ldr r1, [pc, #80] @ (8003660 ) 8003610: 4013 ands r3, r2 8003612: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8003614: 683b ldr r3, [r7, #0] 8003616: 685b ldr r3, [r3, #4] 8003618: f403 3380 and.w r3, r3, #65536 @ 0x10000 800361c: 2b00 cmp r3, #0 800361e: d021 beq.n 8003664 { SET_BIT(EXTI->IMR, iocurrent); 8003620: 4b0f ldr r3, [pc, #60] @ (8003660 ) 8003622: 681a ldr r2, [r3, #0] 8003624: 490e ldr r1, [pc, #56] @ (8003660 ) 8003626: 69bb ldr r3, [r7, #24] 8003628: 4313 orrs r3, r2 800362a: 600b str r3, [r1, #0] 800362c: e021 b.n 8003672 800362e: bf00 nop 8003630: 10320000 .word 0x10320000 8003634: 10310000 .word 0x10310000 8003638: 10220000 .word 0x10220000 800363c: 10210000 .word 0x10210000 8003640: 10120000 .word 0x10120000 8003644: 10110000 .word 0x10110000 8003648: 40021000 .word 0x40021000 800364c: 40010000 .word 0x40010000 8003650: 40010800 .word 0x40010800 8003654: 40010c00 .word 0x40010c00 8003658: 40011000 .word 0x40011000 800365c: 40011400 .word 0x40011400 8003660: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8003664: 4b0b ldr r3, [pc, #44] @ (8003694 ) 8003666: 681a ldr r2, [r3, #0] 8003668: 69bb ldr r3, [r7, #24] 800366a: 43db mvns r3, r3 800366c: 4909 ldr r1, [pc, #36] @ (8003694 ) 800366e: 4013 ands r3, r2 8003670: 600b str r3, [r1, #0] } } } position++; 8003672: 6a7b ldr r3, [r7, #36] @ 0x24 8003674: 3301 adds r3, #1 8003676: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 8003678: 683b ldr r3, [r7, #0] 800367a: 681a ldr r2, [r3, #0] 800367c: 6a7b ldr r3, [r7, #36] @ 0x24 800367e: fa22 f303 lsr.w r3, r2, r3 8003682: 2b00 cmp r3, #0 8003684: f47f ae8e bne.w 80033a4 } } 8003688: bf00 nop 800368a: bf00 nop 800368c: 372c adds r7, #44 @ 0x2c 800368e: 46bd mov sp, r7 8003690: bc80 pop {r7} 8003692: 4770 bx lr 8003694: 40010400 .word 0x40010400 08003698 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8003698: b480 push {r7} 800369a: b085 sub sp, #20 800369c: af00 add r7, sp, #0 800369e: 6078 str r0, [r7, #4] 80036a0: 460b mov r3, r1 80036a2: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 80036a4: 687b ldr r3, [r7, #4] 80036a6: 689a ldr r2, [r3, #8] 80036a8: 887b ldrh r3, [r7, #2] 80036aa: 4013 ands r3, r2 80036ac: 2b00 cmp r3, #0 80036ae: d002 beq.n 80036b6 { bitstatus = GPIO_PIN_SET; 80036b0: 2301 movs r3, #1 80036b2: 73fb strb r3, [r7, #15] 80036b4: e001 b.n 80036ba } else { bitstatus = GPIO_PIN_RESET; 80036b6: 2300 movs r3, #0 80036b8: 73fb strb r3, [r7, #15] } return bitstatus; 80036ba: 7bfb ldrb r3, [r7, #15] } 80036bc: 4618 mov r0, r3 80036be: 3714 adds r7, #20 80036c0: 46bd mov sp, r7 80036c2: bc80 pop {r7} 80036c4: 4770 bx lr 080036c6 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 80036c6: b480 push {r7} 80036c8: b083 sub sp, #12 80036ca: af00 add r7, sp, #0 80036cc: 6078 str r0, [r7, #4] 80036ce: 460b mov r3, r1 80036d0: 807b strh r3, [r7, #2] 80036d2: 4613 mov r3, r2 80036d4: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80036d6: 787b ldrb r3, [r7, #1] 80036d8: 2b00 cmp r3, #0 80036da: d003 beq.n 80036e4 { GPIOx->BSRR = GPIO_Pin; 80036dc: 887a ldrh r2, [r7, #2] 80036de: 687b ldr r3, [r7, #4] 80036e0: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 80036e2: e003 b.n 80036ec GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 80036e4: 887b ldrh r3, [r7, #2] 80036e6: 041a lsls r2, r3, #16 80036e8: 687b ldr r3, [r7, #4] 80036ea: 611a str r2, [r3, #16] } 80036ec: bf00 nop 80036ee: 370c adds r7, #12 80036f0: 46bd mov sp, r7 80036f2: bc80 pop {r7} 80036f4: 4770 bx lr 080036f6 : * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 80036f6: b480 push {r7} 80036f8: b085 sub sp, #20 80036fa: af00 add r7, sp, #0 80036fc: 6078 str r0, [r7, #4] 80036fe: 460b mov r3, r1 8003700: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; 8003702: 687b ldr r3, [r7, #4] 8003704: 68db ldr r3, [r3, #12] 8003706: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); 8003708: 887a ldrh r2, [r7, #2] 800370a: 68fb ldr r3, [r7, #12] 800370c: 4013 ands r3, r2 800370e: 041a lsls r2, r3, #16 8003710: 68fb ldr r3, [r7, #12] 8003712: 43d9 mvns r1, r3 8003714: 887b ldrh r3, [r7, #2] 8003716: 400b ands r3, r1 8003718: 431a orrs r2, r3 800371a: 687b ldr r3, [r7, #4] 800371c: 611a str r2, [r3, #16] } 800371e: bf00 nop 8003720: 3714 adds r7, #20 8003722: 46bd mov sp, r7 8003724: bc80 pop {r7} 8003726: 4770 bx lr 08003728 : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { 8003728: b580 push {r7, lr} 800372a: b084 sub sp, #16 800372c: af00 add r7, sp, #0 800372e: 6078 str r0, [r7, #4] uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) 8003730: 687b ldr r3, [r7, #4] 8003732: 2b00 cmp r3, #0 8003734: d101 bne.n 800373a { return HAL_ERROR; 8003736: 2301 movs r3, #1 8003738: e0e8 b.n 800390c } /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); if (hpcd->State == HAL_PCD_STATE_RESET) 800373a: 687b ldr r3, [r7, #4] 800373c: f893 3291 ldrb.w r3, [r3, #657] @ 0x291 8003740: b2db uxtb r3, r3 8003742: 2b00 cmp r3, #0 8003744: d106 bne.n 8003754 { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; 8003746: 687b ldr r3, [r7, #4] 8003748: 2200 movs r2, #0 800374a: f883 2290 strb.w r2, [r3, #656] @ 0x290 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); 800374e: 6878 ldr r0, [r7, #4] 8003750: f007 face bl 800acf0 #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; 8003754: 687b ldr r3, [r7, #4] 8003756: 2203 movs r2, #3 8003758: f883 2291 strb.w r2, [r3, #657] @ 0x291 /* Disable DMA mode for FS instance */ hpcd->Init.dma_enable = 0U; 800375c: 687b ldr r3, [r7, #4] 800375e: 2200 movs r2, #0 8003760: 715a strb r2, [r3, #5] /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); 8003762: 687b ldr r3, [r7, #4] 8003764: 681b ldr r3, [r3, #0] 8003766: 4618 mov r0, r3 8003768: f003 f973 bl 8006a52 /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) 800376c: 687b ldr r3, [r7, #4] 800376e: 6818 ldr r0, [r3, #0] 8003770: 687b ldr r3, [r7, #4] 8003772: 3304 adds r3, #4 8003774: cb0e ldmia r3, {r1, r2, r3} 8003776: f003 f949 bl 8006a0c 800377a: 4603 mov r3, r0 800377c: 2b00 cmp r3, #0 800377e: d005 beq.n 800378c { hpcd->State = HAL_PCD_STATE_ERROR; 8003780: 687b ldr r3, [r7, #4] 8003782: 2202 movs r2, #2 8003784: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 8003788: 2301 movs r3, #1 800378a: e0bf b.n 800390c } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) 800378c: 687b ldr r3, [r7, #4] 800378e: 681b ldr r3, [r3, #0] 8003790: 2100 movs r1, #0 8003792: 4618 mov r0, r3 8003794: f003 f977 bl 8006a86 8003798: 4603 mov r3, r0 800379a: 2b00 cmp r3, #0 800379c: d005 beq.n 80037aa { hpcd->State = HAL_PCD_STATE_ERROR; 800379e: 687b ldr r3, [r7, #4] 80037a0: 2202 movs r2, #2 80037a2: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 80037a6: 2301 movs r3, #1 80037a8: e0b0 b.n 800390c } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80037aa: 2300 movs r3, #0 80037ac: 73fb strb r3, [r7, #15] 80037ae: e03e b.n 800382e { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; 80037b0: 7bfa ldrb r2, [r7, #15] 80037b2: 6879 ldr r1, [r7, #4] 80037b4: 4613 mov r3, r2 80037b6: 009b lsls r3, r3, #2 80037b8: 4413 add r3, r2 80037ba: 00db lsls r3, r3, #3 80037bc: 440b add r3, r1 80037be: 3311 adds r3, #17 80037c0: 2201 movs r2, #1 80037c2: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; 80037c4: 7bfa ldrb r2, [r7, #15] 80037c6: 6879 ldr r1, [r7, #4] 80037c8: 4613 mov r3, r2 80037ca: 009b lsls r3, r3, #2 80037cc: 4413 add r3, r2 80037ce: 00db lsls r3, r3, #3 80037d0: 440b add r3, r1 80037d2: 3310 adds r3, #16 80037d4: 7bfa ldrb r2, [r7, #15] 80037d6: 701a strb r2, [r3, #0] #if defined (USB_OTG_FS) hpcd->IN_ep[i].tx_fifo_num = i; #endif /* defined (USB_OTG_FS) */ /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; 80037d8: 7bfa ldrb r2, [r7, #15] 80037da: 6879 ldr r1, [r7, #4] 80037dc: 4613 mov r3, r2 80037de: 009b lsls r3, r3, #2 80037e0: 4413 add r3, r2 80037e2: 00db lsls r3, r3, #3 80037e4: 440b add r3, r1 80037e6: 3313 adds r3, #19 80037e8: 2200 movs r2, #0 80037ea: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; 80037ec: 7bfa ldrb r2, [r7, #15] 80037ee: 6879 ldr r1, [r7, #4] 80037f0: 4613 mov r3, r2 80037f2: 009b lsls r3, r3, #2 80037f4: 4413 add r3, r2 80037f6: 00db lsls r3, r3, #3 80037f8: 440b add r3, r1 80037fa: 3320 adds r3, #32 80037fc: 2200 movs r2, #0 80037fe: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; 8003800: 7bfa ldrb r2, [r7, #15] 8003802: 6879 ldr r1, [r7, #4] 8003804: 4613 mov r3, r2 8003806: 009b lsls r3, r3, #2 8003808: 4413 add r3, r2 800380a: 00db lsls r3, r3, #3 800380c: 440b add r3, r1 800380e: 3324 adds r3, #36 @ 0x24 8003810: 2200 movs r2, #0 8003812: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; 8003814: 7bfb ldrb r3, [r7, #15] 8003816: 6879 ldr r1, [r7, #4] 8003818: 1c5a adds r2, r3, #1 800381a: 4613 mov r3, r2 800381c: 009b lsls r3, r3, #2 800381e: 4413 add r3, r2 8003820: 00db lsls r3, r3, #3 8003822: 440b add r3, r1 8003824: 2200 movs r2, #0 8003826: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8003828: 7bfb ldrb r3, [r7, #15] 800382a: 3301 adds r3, #1 800382c: 73fb strb r3, [r7, #15] 800382e: 687b ldr r3, [r7, #4] 8003830: 791b ldrb r3, [r3, #4] 8003832: 7bfa ldrb r2, [r7, #15] 8003834: 429a cmp r2, r3 8003836: d3bb bcc.n 80037b0 } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8003838: 2300 movs r3, #0 800383a: 73fb strb r3, [r7, #15] 800383c: e044 b.n 80038c8 { hpcd->OUT_ep[i].is_in = 0U; 800383e: 7bfa ldrb r2, [r7, #15] 8003840: 6879 ldr r1, [r7, #4] 8003842: 4613 mov r3, r2 8003844: 009b lsls r3, r3, #2 8003846: 4413 add r3, r2 8003848: 00db lsls r3, r3, #3 800384a: 440b add r3, r1 800384c: f203 1351 addw r3, r3, #337 @ 0x151 8003850: 2200 movs r2, #0 8003852: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; 8003854: 7bfa ldrb r2, [r7, #15] 8003856: 6879 ldr r1, [r7, #4] 8003858: 4613 mov r3, r2 800385a: 009b lsls r3, r3, #2 800385c: 4413 add r3, r2 800385e: 00db lsls r3, r3, #3 8003860: 440b add r3, r1 8003862: f503 73a8 add.w r3, r3, #336 @ 0x150 8003866: 7bfa ldrb r2, [r7, #15] 8003868: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; 800386a: 7bfa ldrb r2, [r7, #15] 800386c: 6879 ldr r1, [r7, #4] 800386e: 4613 mov r3, r2 8003870: 009b lsls r3, r3, #2 8003872: 4413 add r3, r2 8003874: 00db lsls r3, r3, #3 8003876: 440b add r3, r1 8003878: f203 1353 addw r3, r3, #339 @ 0x153 800387c: 2200 movs r2, #0 800387e: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; 8003880: 7bfa ldrb r2, [r7, #15] 8003882: 6879 ldr r1, [r7, #4] 8003884: 4613 mov r3, r2 8003886: 009b lsls r3, r3, #2 8003888: 4413 add r3, r2 800388a: 00db lsls r3, r3, #3 800388c: 440b add r3, r1 800388e: f503 73b0 add.w r3, r3, #352 @ 0x160 8003892: 2200 movs r2, #0 8003894: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; 8003896: 7bfa ldrb r2, [r7, #15] 8003898: 6879 ldr r1, [r7, #4] 800389a: 4613 mov r3, r2 800389c: 009b lsls r3, r3, #2 800389e: 4413 add r3, r2 80038a0: 00db lsls r3, r3, #3 80038a2: 440b add r3, r1 80038a4: f503 73b2 add.w r3, r3, #356 @ 0x164 80038a8: 2200 movs r2, #0 80038aa: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; 80038ac: 7bfa ldrb r2, [r7, #15] 80038ae: 6879 ldr r1, [r7, #4] 80038b0: 4613 mov r3, r2 80038b2: 009b lsls r3, r3, #2 80038b4: 4413 add r3, r2 80038b6: 00db lsls r3, r3, #3 80038b8: 440b add r3, r1 80038ba: f503 73b4 add.w r3, r3, #360 @ 0x168 80038be: 2200 movs r2, #0 80038c0: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80038c2: 7bfb ldrb r3, [r7, #15] 80038c4: 3301 adds r3, #1 80038c6: 73fb strb r3, [r7, #15] 80038c8: 687b ldr r3, [r7, #4] 80038ca: 791b ldrb r3, [r3, #4] 80038cc: 7bfa ldrb r2, [r7, #15] 80038ce: 429a cmp r2, r3 80038d0: d3b5 bcc.n 800383e } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) 80038d2: 687b ldr r3, [r7, #4] 80038d4: 6818 ldr r0, [r3, #0] 80038d6: 687b ldr r3, [r7, #4] 80038d8: 3304 adds r3, #4 80038da: cb0e ldmia r3, {r1, r2, r3} 80038dc: f003 f8df bl 8006a9e 80038e0: 4603 mov r3, r0 80038e2: 2b00 cmp r3, #0 80038e4: d005 beq.n 80038f2 { hpcd->State = HAL_PCD_STATE_ERROR; 80038e6: 687b ldr r3, [r7, #4] 80038e8: 2202 movs r2, #2 80038ea: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 80038ee: 2301 movs r3, #1 80038f0: e00c b.n 800390c } hpcd->USB_Address = 0U; 80038f2: 687b ldr r3, [r7, #4] 80038f4: 2200 movs r2, #0 80038f6: 735a strb r2, [r3, #13] hpcd->State = HAL_PCD_STATE_READY; 80038f8: 687b ldr r3, [r7, #4] 80038fa: 2201 movs r2, #1 80038fc: f883 2291 strb.w r2, [r3, #657] @ 0x291 (void)USB_DevDisconnect(hpcd->Instance); 8003900: 687b ldr r3, [r7, #4] 8003902: 681b ldr r3, [r3, #0] 8003904: 4618 mov r0, r3 8003906: f005 fb5e bl 8008fc6 return HAL_OK; 800390a: 2300 movs r3, #0 } 800390c: 4618 mov r0, r3 800390e: 3710 adds r7, #16 8003910: 46bd mov sp, r7 8003912: bd80 pop {r7, pc} 08003914 : * @brief Start the USB device * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) { 8003914: b580 push {r7, lr} 8003916: b082 sub sp, #8 8003918: af00 add r7, sp, #0 800391a: 6078 str r0, [r7, #4] __HAL_LOCK(hpcd); 800391c: 687b ldr r3, [r7, #4] 800391e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8003922: 2b01 cmp r3, #1 8003924: d101 bne.n 800392a 8003926: 2302 movs r3, #2 8003928: e016 b.n 8003958 800392a: 687b ldr r3, [r7, #4] 800392c: 2201 movs r2, #1 800392e: f883 2290 strb.w r2, [r3, #656] @ 0x290 __HAL_PCD_ENABLE(hpcd); 8003932: 687b ldr r3, [r7, #4] 8003934: 681b ldr r3, [r3, #0] 8003936: 4618 mov r0, r3 8003938: f003 f875 bl 8006a26 #if defined (USB) HAL_PCDEx_SetConnectionState(hpcd, 1U); 800393c: 2101 movs r1, #1 800393e: 6878 ldr r0, [r7, #4] 8003940: f007 fc49 bl 800b1d6 #endif /* defined (USB) */ (void)USB_DevConnect(hpcd->Instance); 8003944: 687b ldr r3, [r7, #4] 8003946: 681b ldr r3, [r3, #0] 8003948: 4618 mov r0, r3 800394a: f005 fb32 bl 8008fb2 __HAL_UNLOCK(hpcd); 800394e: 687b ldr r3, [r7, #4] 8003950: 2200 movs r2, #0 8003952: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8003956: 2300 movs r3, #0 } 8003958: 4618 mov r0, r3 800395a: 3708 adds r7, #8 800395c: 46bd mov sp, r7 800395e: bd80 pop {r7, pc} 08003960 : * @brief This function handles PCD interrupt request. * @param hpcd PCD handle * @retval HAL status */ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { 8003960: b580 push {r7, lr} 8003962: b088 sub sp, #32 8003964: af00 add r7, sp, #0 8003966: 6078 str r0, [r7, #4] uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance); 8003968: 687b ldr r3, [r7, #4] 800396a: 681b ldr r3, [r3, #0] 800396c: 4618 mov r0, r3 800396e: f005 fb34 bl 8008fda 8003972: 61b8 str r0, [r7, #24] uint16_t store_ep[8]; uint8_t i; if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR) 8003974: 69bb ldr r3, [r7, #24] 8003976: f403 4300 and.w r3, r3, #32768 @ 0x8000 800397a: 2b00 cmp r3, #0 800397c: d003 beq.n 8003986 { /* servicing of the endpoint correct transfer interrupt */ /* clear of the CTR flag into the sub */ (void)PCD_EP_ISR_Handler(hpcd); 800397e: 6878 ldr r0, [r7, #4] 8003980: f000 fb1a bl 8003fb8 return; 8003984: e119 b.n 8003bba } if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET) 8003986: 69bb ldr r3, [r7, #24] 8003988: f403 6380 and.w r3, r3, #1024 @ 0x400 800398c: 2b00 cmp r3, #0 800398e: d013 beq.n 80039b8 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 8003990: 687b ldr r3, [r7, #4] 8003992: 681b ldr r3, [r3, #0] 8003994: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003998: b29a uxth r2, r3 800399a: 687b ldr r3, [r7, #4] 800399c: 681b ldr r3, [r3, #0] 800399e: f422 6280 bic.w r2, r2, #1024 @ 0x400 80039a2: b292 uxth r2, r2 80039a4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResetCallback(hpcd); #else HAL_PCD_ResetCallback(hpcd); 80039a8: 6878 ldr r0, [r7, #4] 80039aa: f007 fa1c bl 800ade6 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ (void)HAL_PCD_SetAddress(hpcd, 0U); 80039ae: 2100 movs r1, #0 80039b0: 6878 ldr r0, [r7, #4] 80039b2: f000 f905 bl 8003bc0 return; 80039b6: e100 b.n 8003bba } if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR) 80039b8: 69bb ldr r3, [r7, #24] 80039ba: f403 4380 and.w r3, r3, #16384 @ 0x4000 80039be: 2b00 cmp r3, #0 80039c0: d00c beq.n 80039dc { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); 80039c2: 687b ldr r3, [r7, #4] 80039c4: 681b ldr r3, [r3, #0] 80039c6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 80039ca: b29a uxth r2, r3 80039cc: 687b ldr r3, [r7, #4] 80039ce: 681b ldr r3, [r3, #0] 80039d0: f422 4280 bic.w r2, r2, #16384 @ 0x4000 80039d4: b292 uxth r2, r2 80039d6: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 80039da: e0ee b.n 8003bba } if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR) 80039dc: 69bb ldr r3, [r7, #24] 80039de: f403 5300 and.w r3, r3, #8192 @ 0x2000 80039e2: 2b00 cmp r3, #0 80039e4: d00c beq.n 8003a00 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); 80039e6: 687b ldr r3, [r7, #4] 80039e8: 681b ldr r3, [r3, #0] 80039ea: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 80039ee: b29a uxth r2, r3 80039f0: 687b ldr r3, [r7, #4] 80039f2: 681b ldr r3, [r3, #0] 80039f4: f422 5200 bic.w r2, r2, #8192 @ 0x2000 80039f8: b292 uxth r2, r2 80039fa: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 80039fe: e0dc b.n 8003bba } if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP) 8003a00: 69bb ldr r3, [r7, #24] 8003a02: f403 5380 and.w r3, r3, #4096 @ 0x1000 8003a06: 2b00 cmp r3, #0 8003a08: d027 beq.n 8003a5a { hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE); 8003a0a: 687b ldr r3, [r7, #4] 8003a0c: 681b ldr r3, [r3, #0] 8003a0e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003a12: b29a uxth r2, r3 8003a14: 687b ldr r3, [r7, #4] 8003a16: 681b ldr r3, [r3, #0] 8003a18: f022 0204 bic.w r2, r2, #4 8003a1c: b292 uxth r2, r2 8003a1e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); 8003a22: 687b ldr r3, [r7, #4] 8003a24: 681b ldr r3, [r3, #0] 8003a26: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003a2a: b29a uxth r2, r3 8003a2c: 687b ldr r3, [r7, #4] 8003a2e: 681b ldr r3, [r3, #0] 8003a30: f022 0208 bic.w r2, r2, #8 8003a34: b292 uxth r2, r2 8003a36: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResumeCallback(hpcd); #else HAL_PCD_ResumeCallback(hpcd); 8003a3a: 6878 ldr r0, [r7, #4] 8003a3c: f007 fa0c bl 800ae58 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); 8003a40: 687b ldr r3, [r7, #4] 8003a42: 681b ldr r3, [r3, #0] 8003a44: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003a48: b29a uxth r2, r3 8003a4a: 687b ldr r3, [r7, #4] 8003a4c: 681b ldr r3, [r3, #0] 8003a4e: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8003a52: b292 uxth r2, r2 8003a54: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8003a58: e0af b.n 8003bba } if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP) 8003a5a: 69bb ldr r3, [r7, #24] 8003a5c: f403 6300 and.w r3, r3, #2048 @ 0x800 8003a60: 2b00 cmp r3, #0 8003a62: f000 8083 beq.w 8003b6c { /* WA: To Clear Wakeup flag if raised with suspend signal */ /* Store Endpoint registers */ for (i = 0U; i < 8U; i++) 8003a66: 2300 movs r3, #0 8003a68: 77fb strb r3, [r7, #31] 8003a6a: e010 b.n 8003a8e { store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i); 8003a6c: 687b ldr r3, [r7, #4] 8003a6e: 681b ldr r3, [r3, #0] 8003a70: 461a mov r2, r3 8003a72: 7ffb ldrb r3, [r7, #31] 8003a74: 009b lsls r3, r3, #2 8003a76: 441a add r2, r3 8003a78: 7ffb ldrb r3, [r7, #31] 8003a7a: 8812 ldrh r2, [r2, #0] 8003a7c: b292 uxth r2, r2 8003a7e: 005b lsls r3, r3, #1 8003a80: 3320 adds r3, #32 8003a82: 443b add r3, r7 8003a84: f823 2c18 strh.w r2, [r3, #-24] for (i = 0U; i < 8U; i++) 8003a88: 7ffb ldrb r3, [r7, #31] 8003a8a: 3301 adds r3, #1 8003a8c: 77fb strb r3, [r7, #31] 8003a8e: 7ffb ldrb r3, [r7, #31] 8003a90: 2b07 cmp r3, #7 8003a92: d9eb bls.n 8003a6c } /* FORCE RESET */ hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES); 8003a94: 687b ldr r3, [r7, #4] 8003a96: 681b ldr r3, [r3, #0] 8003a98: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003a9c: b29a uxth r2, r3 8003a9e: 687b ldr r3, [r7, #4] 8003aa0: 681b ldr r3, [r3, #0] 8003aa2: f042 0201 orr.w r2, r2, #1 8003aa6: b292 uxth r2, r2 8003aa8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CLEAR RESET */ hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES); 8003aac: 687b ldr r3, [r7, #4] 8003aae: 681b ldr r3, [r3, #0] 8003ab0: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003ab4: b29a uxth r2, r3 8003ab6: 687b ldr r3, [r7, #4] 8003ab8: 681b ldr r3, [r3, #0] 8003aba: f022 0201 bic.w r2, r2, #1 8003abe: b292 uxth r2, r2 8003ac0: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* wait for reset flag in ISTR */ while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U) 8003ac4: bf00 nop 8003ac6: 687b ldr r3, [r7, #4] 8003ac8: 681b ldr r3, [r3, #0] 8003aca: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003ace: b29b uxth r3, r3 8003ad0: f403 6380 and.w r3, r3, #1024 @ 0x400 8003ad4: 2b00 cmp r3, #0 8003ad6: d0f6 beq.n 8003ac6 { } /* Clear Reset Flag */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 8003ad8: 687b ldr r3, [r7, #4] 8003ada: 681b ldr r3, [r3, #0] 8003adc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003ae0: b29a uxth r2, r3 8003ae2: 687b ldr r3, [r7, #4] 8003ae4: 681b ldr r3, [r3, #0] 8003ae6: f422 6280 bic.w r2, r2, #1024 @ 0x400 8003aea: b292 uxth r2, r2 8003aec: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Restore Registre */ for (i = 0U; i < 8U; i++) 8003af0: 2300 movs r3, #0 8003af2: 77fb strb r3, [r7, #31] 8003af4: e00f b.n 8003b16 { PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]); 8003af6: 7ffb ldrb r3, [r7, #31] 8003af8: 687a ldr r2, [r7, #4] 8003afa: 6812 ldr r2, [r2, #0] 8003afc: 4611 mov r1, r2 8003afe: 7ffa ldrb r2, [r7, #31] 8003b00: 0092 lsls r2, r2, #2 8003b02: 440a add r2, r1 8003b04: 005b lsls r3, r3, #1 8003b06: 3320 adds r3, #32 8003b08: 443b add r3, r7 8003b0a: f833 3c18 ldrh.w r3, [r3, #-24] 8003b0e: 8013 strh r3, [r2, #0] for (i = 0U; i < 8U; i++) 8003b10: 7ffb ldrb r3, [r7, #31] 8003b12: 3301 adds r3, #1 8003b14: 77fb strb r3, [r7, #31] 8003b16: 7ffb ldrb r3, [r7, #31] 8003b18: 2b07 cmp r3, #7 8003b1a: d9ec bls.n 8003af6 } /* Force low-power mode in the macrocell */ hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP; 8003b1c: 687b ldr r3, [r7, #4] 8003b1e: 681b ldr r3, [r3, #0] 8003b20: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003b24: b29a uxth r2, r3 8003b26: 687b ldr r3, [r7, #4] 8003b28: 681b ldr r3, [r3, #0] 8003b2a: f042 0208 orr.w r2, r2, #8 8003b2e: b292 uxth r2, r2 8003b30: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); 8003b34: 687b ldr r3, [r7, #4] 8003b36: 681b ldr r3, [r3, #0] 8003b38: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003b3c: b29a uxth r2, r3 8003b3e: 687b ldr r3, [r7, #4] 8003b40: 681b ldr r3, [r3, #0] 8003b42: f422 6200 bic.w r2, r2, #2048 @ 0x800 8003b46: b292 uxth r2, r2 8003b48: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE; 8003b4c: 687b ldr r3, [r7, #4] 8003b4e: 681b ldr r3, [r3, #0] 8003b50: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003b54: b29a uxth r2, r3 8003b56: 687b ldr r3, [r7, #4] 8003b58: 681b ldr r3, [r3, #0] 8003b5a: f042 0204 orr.w r2, r2, #4 8003b5e: b292 uxth r2, r2 8003b60: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 8003b64: 6878 ldr r0, [r7, #4] 8003b66: f007 f95d bl 800ae24 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8003b6a: e026 b.n 8003bba } if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF) 8003b6c: 69bb ldr r3, [r7, #24] 8003b6e: f403 7300 and.w r3, r3, #512 @ 0x200 8003b72: 2b00 cmp r3, #0 8003b74: d00f beq.n 8003b96 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); 8003b76: 687b ldr r3, [r7, #4] 8003b78: 681b ldr r3, [r3, #0] 8003b7a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003b7e: b29a uxth r2, r3 8003b80: 687b ldr r3, [r7, #4] 8003b82: 681b ldr r3, [r3, #0] 8003b84: f422 7200 bic.w r2, r2, #512 @ 0x200 8003b88: b292 uxth r2, r2 8003b8a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SOFCallback(hpcd); #else HAL_PCD_SOFCallback(hpcd); 8003b8e: 6878 ldr r0, [r7, #4] 8003b90: f007 f91b bl 800adca #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8003b94: e011 b.n 8003bba } if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF) 8003b96: 69bb ldr r3, [r7, #24] 8003b98: f403 7380 and.w r3, r3, #256 @ 0x100 8003b9c: 2b00 cmp r3, #0 8003b9e: d00c beq.n 8003bba { /* clear ESOF flag in ISTR */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); 8003ba0: 687b ldr r3, [r7, #4] 8003ba2: 681b ldr r3, [r3, #0] 8003ba4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003ba8: b29a uxth r2, r3 8003baa: 687b ldr r3, [r7, #4] 8003bac: 681b ldr r3, [r3, #0] 8003bae: f422 7280 bic.w r2, r2, #256 @ 0x100 8003bb2: b292 uxth r2, r2 8003bb4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8003bb8: bf00 nop } } 8003bba: 3720 adds r7, #32 8003bbc: 46bd mov sp, r7 8003bbe: bd80 pop {r7, pc} 08003bc0 : * @param hpcd PCD handle * @param address new device address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) { 8003bc0: b580 push {r7, lr} 8003bc2: b082 sub sp, #8 8003bc4: af00 add r7, sp, #0 8003bc6: 6078 str r0, [r7, #4] 8003bc8: 460b mov r3, r1 8003bca: 70fb strb r3, [r7, #3] __HAL_LOCK(hpcd); 8003bcc: 687b ldr r3, [r7, #4] 8003bce: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8003bd2: 2b01 cmp r3, #1 8003bd4: d101 bne.n 8003bda 8003bd6: 2302 movs r3, #2 8003bd8: e012 b.n 8003c00 8003bda: 687b ldr r3, [r7, #4] 8003bdc: 2201 movs r2, #1 8003bde: f883 2290 strb.w r2, [r3, #656] @ 0x290 hpcd->USB_Address = address; 8003be2: 687b ldr r3, [r7, #4] 8003be4: 78fa ldrb r2, [r7, #3] 8003be6: 735a strb r2, [r3, #13] (void)USB_SetDevAddress(hpcd->Instance, address); 8003be8: 687b ldr r3, [r7, #4] 8003bea: 681b ldr r3, [r3, #0] 8003bec: 78fa ldrb r2, [r7, #3] 8003bee: 4611 mov r1, r2 8003bf0: 4618 mov r0, r3 8003bf2: f005 f9cb bl 8008f8c __HAL_UNLOCK(hpcd); 8003bf6: 687b ldr r3, [r7, #4] 8003bf8: 2200 movs r2, #0 8003bfa: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8003bfe: 2300 movs r3, #0 } 8003c00: 4618 mov r0, r3 8003c02: 3708 adds r7, #8 8003c04: 46bd mov sp, r7 8003c06: bd80 pop {r7, pc} 08003c08 : * @param ep_type endpoint type * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { 8003c08: b580 push {r7, lr} 8003c0a: b084 sub sp, #16 8003c0c: af00 add r7, sp, #0 8003c0e: 6078 str r0, [r7, #4] 8003c10: 4608 mov r0, r1 8003c12: 4611 mov r1, r2 8003c14: 461a mov r2, r3 8003c16: 4603 mov r3, r0 8003c18: 70fb strb r3, [r7, #3] 8003c1a: 460b mov r3, r1 8003c1c: 803b strh r3, [r7, #0] 8003c1e: 4613 mov r3, r2 8003c20: 70bb strb r3, [r7, #2] HAL_StatusTypeDef ret = HAL_OK; 8003c22: 2300 movs r3, #0 8003c24: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8003c26: f997 3003 ldrsb.w r3, [r7, #3] 8003c2a: 2b00 cmp r3, #0 8003c2c: da0e bge.n 8003c4c { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8003c2e: 78fb ldrb r3, [r7, #3] 8003c30: f003 0207 and.w r2, r3, #7 8003c34: 4613 mov r3, r2 8003c36: 009b lsls r3, r3, #2 8003c38: 4413 add r3, r2 8003c3a: 00db lsls r3, r3, #3 8003c3c: 3310 adds r3, #16 8003c3e: 687a ldr r2, [r7, #4] 8003c40: 4413 add r3, r2 8003c42: 60fb str r3, [r7, #12] ep->is_in = 1U; 8003c44: 68fb ldr r3, [r7, #12] 8003c46: 2201 movs r2, #1 8003c48: 705a strb r2, [r3, #1] 8003c4a: e00e b.n 8003c6a } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8003c4c: 78fb ldrb r3, [r7, #3] 8003c4e: f003 0207 and.w r2, r3, #7 8003c52: 4613 mov r3, r2 8003c54: 009b lsls r3, r3, #2 8003c56: 4413 add r3, r2 8003c58: 00db lsls r3, r3, #3 8003c5a: f503 73a8 add.w r3, r3, #336 @ 0x150 8003c5e: 687a ldr r2, [r7, #4] 8003c60: 4413 add r3, r2 8003c62: 60fb str r3, [r7, #12] ep->is_in = 0U; 8003c64: 68fb ldr r3, [r7, #12] 8003c66: 2200 movs r2, #0 8003c68: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8003c6a: 78fb ldrb r3, [r7, #3] 8003c6c: f003 0307 and.w r3, r3, #7 8003c70: b2da uxtb r2, r3 8003c72: 68fb ldr r3, [r7, #12] 8003c74: 701a strb r2, [r3, #0] ep->maxpacket = ep_mps; 8003c76: 883a ldrh r2, [r7, #0] 8003c78: 68fb ldr r3, [r7, #12] 8003c7a: 611a str r2, [r3, #16] ep->type = ep_type; 8003c7c: 68fb ldr r3, [r7, #12] 8003c7e: 78ba ldrb r2, [r7, #2] 8003c80: 70da strb r2, [r3, #3] ep->tx_fifo_num = ep->num; } #endif /* defined (USB_OTG_FS) */ /* Set initial data PID. */ if (ep_type == EP_TYPE_BULK) 8003c82: 78bb ldrb r3, [r7, #2] 8003c84: 2b02 cmp r3, #2 8003c86: d102 bne.n 8003c8e { ep->data_pid_start = 0U; 8003c88: 68fb ldr r3, [r7, #12] 8003c8a: 2200 movs r2, #0 8003c8c: 711a strb r2, [r3, #4] } __HAL_LOCK(hpcd); 8003c8e: 687b ldr r3, [r7, #4] 8003c90: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8003c94: 2b01 cmp r3, #1 8003c96: d101 bne.n 8003c9c 8003c98: 2302 movs r3, #2 8003c9a: e00e b.n 8003cba 8003c9c: 687b ldr r3, [r7, #4] 8003c9e: 2201 movs r2, #1 8003ca0: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_ActivateEndpoint(hpcd->Instance, ep); 8003ca4: 687b ldr r3, [r7, #4] 8003ca6: 681b ldr r3, [r3, #0] 8003ca8: 68f9 ldr r1, [r7, #12] 8003caa: 4618 mov r0, r3 8003cac: f002 ff14 bl 8006ad8 __HAL_UNLOCK(hpcd); 8003cb0: 687b ldr r3, [r7, #4] 8003cb2: 2200 movs r2, #0 8003cb4: f883 2290 strb.w r2, [r3, #656] @ 0x290 return ret; 8003cb8: 7afb ldrb r3, [r7, #11] } 8003cba: 4618 mov r0, r3 8003cbc: 3710 adds r7, #16 8003cbe: 46bd mov sp, r7 8003cc0: bd80 pop {r7, pc} 08003cc2 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8003cc2: b580 push {r7, lr} 8003cc4: b084 sub sp, #16 8003cc6: af00 add r7, sp, #0 8003cc8: 6078 str r0, [r7, #4] 8003cca: 460b mov r3, r1 8003ccc: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8003cce: f997 3003 ldrsb.w r3, [r7, #3] 8003cd2: 2b00 cmp r3, #0 8003cd4: da0e bge.n 8003cf4 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8003cd6: 78fb ldrb r3, [r7, #3] 8003cd8: f003 0207 and.w r2, r3, #7 8003cdc: 4613 mov r3, r2 8003cde: 009b lsls r3, r3, #2 8003ce0: 4413 add r3, r2 8003ce2: 00db lsls r3, r3, #3 8003ce4: 3310 adds r3, #16 8003ce6: 687a ldr r2, [r7, #4] 8003ce8: 4413 add r3, r2 8003cea: 60fb str r3, [r7, #12] ep->is_in = 1U; 8003cec: 68fb ldr r3, [r7, #12] 8003cee: 2201 movs r2, #1 8003cf0: 705a strb r2, [r3, #1] 8003cf2: e00e b.n 8003d12 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8003cf4: 78fb ldrb r3, [r7, #3] 8003cf6: f003 0207 and.w r2, r3, #7 8003cfa: 4613 mov r3, r2 8003cfc: 009b lsls r3, r3, #2 8003cfe: 4413 add r3, r2 8003d00: 00db lsls r3, r3, #3 8003d02: f503 73a8 add.w r3, r3, #336 @ 0x150 8003d06: 687a ldr r2, [r7, #4] 8003d08: 4413 add r3, r2 8003d0a: 60fb str r3, [r7, #12] ep->is_in = 0U; 8003d0c: 68fb ldr r3, [r7, #12] 8003d0e: 2200 movs r2, #0 8003d10: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8003d12: 78fb ldrb r3, [r7, #3] 8003d14: f003 0307 and.w r3, r3, #7 8003d18: b2da uxtb r2, r3 8003d1a: 68fb ldr r3, [r7, #12] 8003d1c: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8003d1e: 687b ldr r3, [r7, #4] 8003d20: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8003d24: 2b01 cmp r3, #1 8003d26: d101 bne.n 8003d2c 8003d28: 2302 movs r3, #2 8003d2a: e00e b.n 8003d4a 8003d2c: 687b ldr r3, [r7, #4] 8003d2e: 2201 movs r2, #1 8003d30: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_DeactivateEndpoint(hpcd->Instance, ep); 8003d34: 687b ldr r3, [r7, #4] 8003d36: 681b ldr r3, [r3, #0] 8003d38: 68f9 ldr r1, [r7, #12] 8003d3a: 4618 mov r0, r3 8003d3c: f003 fa8c bl 8007258 __HAL_UNLOCK(hpcd); 8003d40: 687b ldr r3, [r7, #4] 8003d42: 2200 movs r2, #0 8003d44: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8003d48: 2300 movs r3, #0 } 8003d4a: 4618 mov r0, r3 8003d4c: 3710 adds r7, #16 8003d4e: 46bd mov sp, r7 8003d50: bd80 pop {r7, pc} 08003d52 : * @param pBuf pointer to the reception buffer * @param len amount of data to be received * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8003d52: b580 push {r7, lr} 8003d54: b086 sub sp, #24 8003d56: af00 add r7, sp, #0 8003d58: 60f8 str r0, [r7, #12] 8003d5a: 607a str r2, [r7, #4] 8003d5c: 603b str r3, [r7, #0] 8003d5e: 460b mov r3, r1 8003d60: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8003d62: 7afb ldrb r3, [r7, #11] 8003d64: f003 0207 and.w r2, r3, #7 8003d68: 4613 mov r3, r2 8003d6a: 009b lsls r3, r3, #2 8003d6c: 4413 add r3, r2 8003d6e: 00db lsls r3, r3, #3 8003d70: f503 73a8 add.w r3, r3, #336 @ 0x150 8003d74: 68fa ldr r2, [r7, #12] 8003d76: 4413 add r3, r2 8003d78: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8003d7a: 697b ldr r3, [r7, #20] 8003d7c: 687a ldr r2, [r7, #4] 8003d7e: 615a str r2, [r3, #20] ep->xfer_len = len; 8003d80: 697b ldr r3, [r7, #20] 8003d82: 683a ldr r2, [r7, #0] 8003d84: 619a str r2, [r3, #24] ep->xfer_count = 0U; 8003d86: 697b ldr r3, [r7, #20] 8003d88: 2200 movs r2, #0 8003d8a: 61da str r2, [r3, #28] ep->is_in = 0U; 8003d8c: 697b ldr r3, [r7, #20] 8003d8e: 2200 movs r2, #0 8003d90: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8003d92: 7afb ldrb r3, [r7, #11] 8003d94: f003 0307 and.w r3, r3, #7 8003d98: b2da uxtb r2, r3 8003d9a: 697b ldr r3, [r7, #20] 8003d9c: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8003d9e: 68fb ldr r3, [r7, #12] 8003da0: 681b ldr r3, [r3, #0] 8003da2: 6979 ldr r1, [r7, #20] 8003da4: 4618 mov r0, r3 8003da6: f003 fc43 bl 8007630 return HAL_OK; 8003daa: 2300 movs r3, #0 } 8003dac: 4618 mov r0, r3 8003dae: 3718 adds r7, #24 8003db0: 46bd mov sp, r7 8003db2: bd80 pop {r7, pc} 08003db4 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval Data Size */ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr) { 8003db4: b480 push {r7} 8003db6: b083 sub sp, #12 8003db8: af00 add r7, sp, #0 8003dba: 6078 str r0, [r7, #4] 8003dbc: 460b mov r3, r1 8003dbe: 70fb strb r3, [r7, #3] return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; 8003dc0: 78fb ldrb r3, [r7, #3] 8003dc2: f003 0207 and.w r2, r3, #7 8003dc6: 6879 ldr r1, [r7, #4] 8003dc8: 4613 mov r3, r2 8003dca: 009b lsls r3, r3, #2 8003dcc: 4413 add r3, r2 8003dce: 00db lsls r3, r3, #3 8003dd0: 440b add r3, r1 8003dd2: f503 73b6 add.w r3, r3, #364 @ 0x16c 8003dd6: 681b ldr r3, [r3, #0] } 8003dd8: 4618 mov r0, r3 8003dda: 370c adds r7, #12 8003ddc: 46bd mov sp, r7 8003dde: bc80 pop {r7} 8003de0: 4770 bx lr 08003de2 : * @param pBuf pointer to the transmission buffer * @param len amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8003de2: b580 push {r7, lr} 8003de4: b086 sub sp, #24 8003de6: af00 add r7, sp, #0 8003de8: 60f8 str r0, [r7, #12] 8003dea: 607a str r2, [r7, #4] 8003dec: 603b str r3, [r7, #0] 8003dee: 460b mov r3, r1 8003df0: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8003df2: 7afb ldrb r3, [r7, #11] 8003df4: f003 0207 and.w r2, r3, #7 8003df8: 4613 mov r3, r2 8003dfa: 009b lsls r3, r3, #2 8003dfc: 4413 add r3, r2 8003dfe: 00db lsls r3, r3, #3 8003e00: 3310 adds r3, #16 8003e02: 68fa ldr r2, [r7, #12] 8003e04: 4413 add r3, r2 8003e06: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8003e08: 697b ldr r3, [r7, #20] 8003e0a: 687a ldr r2, [r7, #4] 8003e0c: 615a str r2, [r3, #20] ep->xfer_len = len; 8003e0e: 697b ldr r3, [r7, #20] 8003e10: 683a ldr r2, [r7, #0] 8003e12: 619a str r2, [r3, #24] #if defined (USB) ep->xfer_fill_db = 1U; 8003e14: 697b ldr r3, [r7, #20] 8003e16: 2201 movs r2, #1 8003e18: f883 2024 strb.w r2, [r3, #36] @ 0x24 ep->xfer_len_db = len; 8003e1c: 697b ldr r3, [r7, #20] 8003e1e: 683a ldr r2, [r7, #0] 8003e20: 621a str r2, [r3, #32] #endif /* defined (USB) */ ep->xfer_count = 0U; 8003e22: 697b ldr r3, [r7, #20] 8003e24: 2200 movs r2, #0 8003e26: 61da str r2, [r3, #28] ep->is_in = 1U; 8003e28: 697b ldr r3, [r7, #20] 8003e2a: 2201 movs r2, #1 8003e2c: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8003e2e: 7afb ldrb r3, [r7, #11] 8003e30: f003 0307 and.w r3, r3, #7 8003e34: b2da uxtb r2, r3 8003e36: 697b ldr r3, [r7, #20] 8003e38: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8003e3a: 68fb ldr r3, [r7, #12] 8003e3c: 681b ldr r3, [r3, #0] 8003e3e: 6979 ldr r1, [r7, #20] 8003e40: 4618 mov r0, r3 8003e42: f003 fbf5 bl 8007630 return HAL_OK; 8003e46: 2300 movs r3, #0 } 8003e48: 4618 mov r0, r3 8003e4a: 3718 adds r7, #24 8003e4c: 46bd mov sp, r7 8003e4e: bd80 pop {r7, pc} 08003e50 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8003e50: b580 push {r7, lr} 8003e52: b084 sub sp, #16 8003e54: af00 add r7, sp, #0 8003e56: 6078 str r0, [r7, #4] 8003e58: 460b mov r3, r1 8003e5a: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) 8003e5c: 78fb ldrb r3, [r7, #3] 8003e5e: f003 0307 and.w r3, r3, #7 8003e62: 687a ldr r2, [r7, #4] 8003e64: 7912 ldrb r2, [r2, #4] 8003e66: 4293 cmp r3, r2 8003e68: d901 bls.n 8003e6e { return HAL_ERROR; 8003e6a: 2301 movs r3, #1 8003e6c: e04c b.n 8003f08 } if ((0x80U & ep_addr) == 0x80U) 8003e6e: f997 3003 ldrsb.w r3, [r7, #3] 8003e72: 2b00 cmp r3, #0 8003e74: da0e bge.n 8003e94 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8003e76: 78fb ldrb r3, [r7, #3] 8003e78: f003 0207 and.w r2, r3, #7 8003e7c: 4613 mov r3, r2 8003e7e: 009b lsls r3, r3, #2 8003e80: 4413 add r3, r2 8003e82: 00db lsls r3, r3, #3 8003e84: 3310 adds r3, #16 8003e86: 687a ldr r2, [r7, #4] 8003e88: 4413 add r3, r2 8003e8a: 60fb str r3, [r7, #12] ep->is_in = 1U; 8003e8c: 68fb ldr r3, [r7, #12] 8003e8e: 2201 movs r2, #1 8003e90: 705a strb r2, [r3, #1] 8003e92: e00c b.n 8003eae } else { ep = &hpcd->OUT_ep[ep_addr]; 8003e94: 78fa ldrb r2, [r7, #3] 8003e96: 4613 mov r3, r2 8003e98: 009b lsls r3, r3, #2 8003e9a: 4413 add r3, r2 8003e9c: 00db lsls r3, r3, #3 8003e9e: f503 73a8 add.w r3, r3, #336 @ 0x150 8003ea2: 687a ldr r2, [r7, #4] 8003ea4: 4413 add r3, r2 8003ea6: 60fb str r3, [r7, #12] ep->is_in = 0U; 8003ea8: 68fb ldr r3, [r7, #12] 8003eaa: 2200 movs r2, #0 8003eac: 705a strb r2, [r3, #1] } ep->is_stall = 1U; 8003eae: 68fb ldr r3, [r7, #12] 8003eb0: 2201 movs r2, #1 8003eb2: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8003eb4: 78fb ldrb r3, [r7, #3] 8003eb6: f003 0307 and.w r3, r3, #7 8003eba: b2da uxtb r2, r3 8003ebc: 68fb ldr r3, [r7, #12] 8003ebe: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8003ec0: 687b ldr r3, [r7, #4] 8003ec2: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8003ec6: 2b01 cmp r3, #1 8003ec8: d101 bne.n 8003ece 8003eca: 2302 movs r3, #2 8003ecc: e01c b.n 8003f08 8003ece: 687b ldr r3, [r7, #4] 8003ed0: 2201 movs r2, #1 8003ed2: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPSetStall(hpcd->Instance, ep); 8003ed6: 687b ldr r3, [r7, #4] 8003ed8: 681b ldr r3, [r3, #0] 8003eda: 68f9 ldr r1, [r7, #12] 8003edc: 4618 mov r0, r3 8003ede: f004 ff58 bl 8008d92 if ((ep_addr & EP_ADDR_MSK) == 0U) 8003ee2: 78fb ldrb r3, [r7, #3] 8003ee4: f003 0307 and.w r3, r3, #7 8003ee8: 2b00 cmp r3, #0 8003eea: d108 bne.n 8003efe { (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup); 8003eec: 687b ldr r3, [r7, #4] 8003eee: 681a ldr r2, [r3, #0] 8003ef0: 687b ldr r3, [r7, #4] 8003ef2: f503 7326 add.w r3, r3, #664 @ 0x298 8003ef6: 4619 mov r1, r3 8003ef8: 4610 mov r0, r2 8003efa: f005 f87d bl 8008ff8 } __HAL_UNLOCK(hpcd); 8003efe: 687b ldr r3, [r7, #4] 8003f00: 2200 movs r2, #0 8003f02: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8003f06: 2300 movs r3, #0 } 8003f08: 4618 mov r0, r3 8003f0a: 3710 adds r7, #16 8003f0c: 46bd mov sp, r7 8003f0e: bd80 pop {r7, pc} 08003f10 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8003f10: b580 push {r7, lr} 8003f12: b084 sub sp, #16 8003f14: af00 add r7, sp, #0 8003f16: 6078 str r0, [r7, #4] 8003f18: 460b mov r3, r1 8003f1a: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) 8003f1c: 78fb ldrb r3, [r7, #3] 8003f1e: f003 030f and.w r3, r3, #15 8003f22: 687a ldr r2, [r7, #4] 8003f24: 7912 ldrb r2, [r2, #4] 8003f26: 4293 cmp r3, r2 8003f28: d901 bls.n 8003f2e { return HAL_ERROR; 8003f2a: 2301 movs r3, #1 8003f2c: e040 b.n 8003fb0 } if ((0x80U & ep_addr) == 0x80U) 8003f2e: f997 3003 ldrsb.w r3, [r7, #3] 8003f32: 2b00 cmp r3, #0 8003f34: da0e bge.n 8003f54 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8003f36: 78fb ldrb r3, [r7, #3] 8003f38: f003 0207 and.w r2, r3, #7 8003f3c: 4613 mov r3, r2 8003f3e: 009b lsls r3, r3, #2 8003f40: 4413 add r3, r2 8003f42: 00db lsls r3, r3, #3 8003f44: 3310 adds r3, #16 8003f46: 687a ldr r2, [r7, #4] 8003f48: 4413 add r3, r2 8003f4a: 60fb str r3, [r7, #12] ep->is_in = 1U; 8003f4c: 68fb ldr r3, [r7, #12] 8003f4e: 2201 movs r2, #1 8003f50: 705a strb r2, [r3, #1] 8003f52: e00e b.n 8003f72 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8003f54: 78fb ldrb r3, [r7, #3] 8003f56: f003 0207 and.w r2, r3, #7 8003f5a: 4613 mov r3, r2 8003f5c: 009b lsls r3, r3, #2 8003f5e: 4413 add r3, r2 8003f60: 00db lsls r3, r3, #3 8003f62: f503 73a8 add.w r3, r3, #336 @ 0x150 8003f66: 687a ldr r2, [r7, #4] 8003f68: 4413 add r3, r2 8003f6a: 60fb str r3, [r7, #12] ep->is_in = 0U; 8003f6c: 68fb ldr r3, [r7, #12] 8003f6e: 2200 movs r2, #0 8003f70: 705a strb r2, [r3, #1] } ep->is_stall = 0U; 8003f72: 68fb ldr r3, [r7, #12] 8003f74: 2200 movs r2, #0 8003f76: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8003f78: 78fb ldrb r3, [r7, #3] 8003f7a: f003 0307 and.w r3, r3, #7 8003f7e: b2da uxtb r2, r3 8003f80: 68fb ldr r3, [r7, #12] 8003f82: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8003f84: 687b ldr r3, [r7, #4] 8003f86: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8003f8a: 2b01 cmp r3, #1 8003f8c: d101 bne.n 8003f92 8003f8e: 2302 movs r3, #2 8003f90: e00e b.n 8003fb0 8003f92: 687b ldr r3, [r7, #4] 8003f94: 2201 movs r2, #1 8003f96: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPClearStall(hpcd->Instance, ep); 8003f9a: 687b ldr r3, [r7, #4] 8003f9c: 681b ldr r3, [r3, #0] 8003f9e: 68f9 ldr r1, [r7, #12] 8003fa0: 4618 mov r0, r3 8003fa2: f004 ff46 bl 8008e32 __HAL_UNLOCK(hpcd); 8003fa6: 687b ldr r3, [r7, #4] 8003fa8: 2200 movs r2, #0 8003faa: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8003fae: 2300 movs r3, #0 } 8003fb0: 4618 mov r0, r3 8003fb2: 3710 adds r7, #16 8003fb4: 46bd mov sp, r7 8003fb6: bd80 pop {r7, pc} 08003fb8 : * @brief This function handles PCD Endpoint interrupt request. * @param hpcd PCD handle * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) { 8003fb8: b580 push {r7, lr} 8003fba: b096 sub sp, #88 @ 0x58 8003fbc: af00 add r7, sp, #0 8003fbe: 6078 str r0, [r7, #4] #if (USE_USB_DOUBLE_BUFFER != 1U) count = 0U; #endif /* USE_USB_DOUBLE_BUFFER */ /* stay in loop while pending interrupts */ while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 8003fc0: e3bb b.n 800473a { wIstr = hpcd->Instance->ISTR; 8003fc2: 687b ldr r3, [r7, #4] 8003fc4: 681b ldr r3, [r3, #0] 8003fc6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003fca: f8a7 304e strh.w r3, [r7, #78] @ 0x4e /* extract highest priority endpoint number */ epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); 8003fce: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8003fd2: b2db uxtb r3, r3 8003fd4: f003 030f and.w r3, r3, #15 8003fd8: f887 304d strb.w r3, [r7, #77] @ 0x4d if (epindex == 0U) 8003fdc: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8003fe0: 2b00 cmp r3, #0 8003fe2: f040 8175 bne.w 80042d0 { /* Decode and service control endpoint interrupt */ /* DIR bit = origin of the interrupt */ if ((wIstr & USB_ISTR_DIR) == 0U) 8003fe6: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8003fea: f003 0310 and.w r3, r3, #16 8003fee: 2b00 cmp r3, #0 8003ff0: d14e bne.n 8004090 { /* DIR = 0 */ /* DIR = 0 => IN int */ /* DIR = 0 implies that (EP_CTR_TX = 1) always */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); 8003ff2: 687b ldr r3, [r7, #4] 8003ff4: 681b ldr r3, [r3, #0] 8003ff6: 881b ldrh r3, [r3, #0] 8003ff8: b29b uxth r3, r3 8003ffa: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 8003ffe: f023 0370 bic.w r3, r3, #112 @ 0x70 8004002: 81fb strh r3, [r7, #14] 8004004: 687b ldr r3, [r7, #4] 8004006: 681a ldr r2, [r3, #0] 8004008: 89fb ldrh r3, [r7, #14] 800400a: ea6f 4343 mvn.w r3, r3, lsl #17 800400e: ea6f 4353 mvn.w r3, r3, lsr #17 8004012: b29b uxth r3, r3 8004014: 8013 strh r3, [r2, #0] ep = &hpcd->IN_ep[0]; 8004016: 687b ldr r3, [r7, #4] 8004018: 3310 adds r3, #16 800401a: 657b str r3, [r7, #84] @ 0x54 ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 800401c: 687b ldr r3, [r7, #4] 800401e: 681b ldr r3, [r3, #0] 8004020: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004024: b29b uxth r3, r3 8004026: 461a mov r2, r3 8004028: 6d7b ldr r3, [r7, #84] @ 0x54 800402a: 781b ldrb r3, [r3, #0] 800402c: 00db lsls r3, r3, #3 800402e: 4413 add r3, r2 8004030: 3302 adds r3, #2 8004032: 005b lsls r3, r3, #1 8004034: 687a ldr r2, [r7, #4] 8004036: 6812 ldr r2, [r2, #0] 8004038: 4413 add r3, r2 800403a: f503 6380 add.w r3, r3, #1024 @ 0x400 800403e: 881b ldrh r3, [r3, #0] 8004040: f3c3 0209 ubfx r2, r3, #0, #10 8004044: 6d7b ldr r3, [r7, #84] @ 0x54 8004046: 61da str r2, [r3, #28] ep->xfer_buff += ep->xfer_count; 8004048: 6d7b ldr r3, [r7, #84] @ 0x54 800404a: 695a ldr r2, [r3, #20] 800404c: 6d7b ldr r3, [r7, #84] @ 0x54 800404e: 69db ldr r3, [r3, #28] 8004050: 441a add r2, r3 8004052: 6d7b ldr r3, [r7, #84] @ 0x54 8004054: 615a str r2, [r3, #20] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, 0U); #else HAL_PCD_DataInStageCallback(hpcd, 0U); 8004056: 2100 movs r1, #0 8004058: 6878 ldr r0, [r7, #4] 800405a: f006 fe9c bl 800ad96 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U)) 800405e: 687b ldr r3, [r7, #4] 8004060: 7b5b ldrb r3, [r3, #13] 8004062: b2db uxtb r3, r3 8004064: 2b00 cmp r3, #0 8004066: f000 8368 beq.w 800473a 800406a: 6d7b ldr r3, [r7, #84] @ 0x54 800406c: 699b ldr r3, [r3, #24] 800406e: 2b00 cmp r3, #0 8004070: f040 8363 bne.w 800473a { hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF); 8004074: 687b ldr r3, [r7, #4] 8004076: 7b5b ldrb r3, [r3, #13] 8004078: b2db uxtb r3, r3 800407a: f063 037f orn r3, r3, #127 @ 0x7f 800407e: b2da uxtb r2, r3 8004080: 687b ldr r3, [r7, #4] 8004082: 681b ldr r3, [r3, #0] 8004084: f8a3 204c strh.w r2, [r3, #76] @ 0x4c hpcd->USB_Address = 0U; 8004088: 687b ldr r3, [r7, #4] 800408a: 2200 movs r2, #0 800408c: 735a strb r2, [r3, #13] 800408e: e354 b.n 800473a { /* DIR = 1 */ /* DIR = 1 & CTR_RX => SETUP or OUT int */ /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ ep = &hpcd->OUT_ep[0]; 8004090: 687b ldr r3, [r7, #4] 8004092: f503 73a8 add.w r3, r3, #336 @ 0x150 8004096: 657b str r3, [r7, #84] @ 0x54 wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 8004098: 687b ldr r3, [r7, #4] 800409a: 681b ldr r3, [r3, #0] 800409c: 881b ldrh r3, [r3, #0] 800409e: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_SETUP) != 0U) 80040a2: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80040a6: f403 6300 and.w r3, r3, #2048 @ 0x800 80040aa: 2b00 cmp r3, #0 80040ac: d034 beq.n 8004118 { /* Get SETUP Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 80040ae: 687b ldr r3, [r7, #4] 80040b0: 681b ldr r3, [r3, #0] 80040b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80040b6: b29b uxth r3, r3 80040b8: 461a mov r2, r3 80040ba: 6d7b ldr r3, [r7, #84] @ 0x54 80040bc: 781b ldrb r3, [r3, #0] 80040be: 00db lsls r3, r3, #3 80040c0: 4413 add r3, r2 80040c2: 3306 adds r3, #6 80040c4: 005b lsls r3, r3, #1 80040c6: 687a ldr r2, [r7, #4] 80040c8: 6812 ldr r2, [r2, #0] 80040ca: 4413 add r3, r2 80040cc: f503 6380 add.w r3, r3, #1024 @ 0x400 80040d0: 881b ldrh r3, [r3, #0] 80040d2: f3c3 0209 ubfx r2, r3, #0, #10 80040d6: 6d7b ldr r3, [r7, #84] @ 0x54 80040d8: 61da str r2, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 80040da: 687b ldr r3, [r7, #4] 80040dc: 6818 ldr r0, [r3, #0] 80040de: 687b ldr r3, [r7, #4] 80040e0: f503 7126 add.w r1, r3, #664 @ 0x298 80040e4: 6d7b ldr r3, [r7, #84] @ 0x54 80040e6: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 80040e8: 6d7b ldr r3, [r7, #84] @ 0x54 80040ea: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 80040ec: b29b uxth r3, r3 80040ee: f004 ffd4 bl 800909a /* SETUP bit kept frozen while CTR_RX = 1 */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 80040f2: 687b ldr r3, [r7, #4] 80040f4: 681b ldr r3, [r3, #0] 80040f6: 881b ldrh r3, [r3, #0] 80040f8: b29a uxth r2, r3 80040fa: f640 738f movw r3, #3983 @ 0xf8f 80040fe: 4013 ands r3, r2 8004100: 823b strh r3, [r7, #16] 8004102: 687b ldr r3, [r7, #4] 8004104: 681b ldr r3, [r3, #0] 8004106: 8a3a ldrh r2, [r7, #16] 8004108: f042 0280 orr.w r2, r2, #128 @ 0x80 800410c: b292 uxth r2, r2 800410e: 801a strh r2, [r3, #0] /* Process SETUP Packet*/ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SetupStageCallback(hpcd); #else HAL_PCD_SetupStageCallback(hpcd); 8004110: 6878 ldr r0, [r7, #4] 8004112: f006 fe13 bl 800ad3c 8004116: e310 b.n 800473a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else if ((wEPVal & USB_EP_CTR_RX) != 0U) 8004118: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 800411c: 2b00 cmp r3, #0 800411e: f280 830c bge.w 800473a { PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 8004122: 687b ldr r3, [r7, #4] 8004124: 681b ldr r3, [r3, #0] 8004126: 881b ldrh r3, [r3, #0] 8004128: b29a uxth r2, r3 800412a: f640 738f movw r3, #3983 @ 0xf8f 800412e: 4013 ands r3, r2 8004130: 83fb strh r3, [r7, #30] 8004132: 687b ldr r3, [r7, #4] 8004134: 681b ldr r3, [r3, #0] 8004136: 8bfa ldrh r2, [r7, #30] 8004138: f042 0280 orr.w r2, r2, #128 @ 0x80 800413c: b292 uxth r2, r2 800413e: 801a strh r2, [r3, #0] /* Get Control Data OUT Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8004140: 687b ldr r3, [r7, #4] 8004142: 681b ldr r3, [r3, #0] 8004144: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004148: b29b uxth r3, r3 800414a: 461a mov r2, r3 800414c: 6d7b ldr r3, [r7, #84] @ 0x54 800414e: 781b ldrb r3, [r3, #0] 8004150: 00db lsls r3, r3, #3 8004152: 4413 add r3, r2 8004154: 3306 adds r3, #6 8004156: 005b lsls r3, r3, #1 8004158: 687a ldr r2, [r7, #4] 800415a: 6812 ldr r2, [r2, #0] 800415c: 4413 add r3, r2 800415e: f503 6380 add.w r3, r3, #1024 @ 0x400 8004162: 881b ldrh r3, [r3, #0] 8004164: f3c3 0209 ubfx r2, r3, #0, #10 8004168: 6d7b ldr r3, [r7, #84] @ 0x54 800416a: 61da str r2, [r3, #28] if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) 800416c: 6d7b ldr r3, [r7, #84] @ 0x54 800416e: 69db ldr r3, [r3, #28] 8004170: 2b00 cmp r3, #0 8004172: d019 beq.n 80041a8 8004174: 6d7b ldr r3, [r7, #84] @ 0x54 8004176: 695b ldr r3, [r3, #20] 8004178: 2b00 cmp r3, #0 800417a: d015 beq.n 80041a8 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 800417c: 687b ldr r3, [r7, #4] 800417e: 6818 ldr r0, [r3, #0] 8004180: 6d7b ldr r3, [r7, #84] @ 0x54 8004182: 6959 ldr r1, [r3, #20] 8004184: 6d7b ldr r3, [r7, #84] @ 0x54 8004186: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 8004188: 6d7b ldr r3, [r7, #84] @ 0x54 800418a: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 800418c: b29b uxth r3, r3 800418e: f004 ff84 bl 800909a ep->xfer_buff += ep->xfer_count; 8004192: 6d7b ldr r3, [r7, #84] @ 0x54 8004194: 695a ldr r2, [r3, #20] 8004196: 6d7b ldr r3, [r7, #84] @ 0x54 8004198: 69db ldr r3, [r3, #28] 800419a: 441a add r2, r3 800419c: 6d7b ldr r3, [r7, #84] @ 0x54 800419e: 615a str r2, [r3, #20] /* Process Control Data OUT Packet */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, 0U); #else HAL_PCD_DataOutStageCallback(hpcd, 0U); 80041a0: 2100 movs r1, #0 80041a2: 6878 ldr r0, [r7, #4] 80041a4: f006 fddc bl 800ad60 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 80041a8: 687b ldr r3, [r7, #4] 80041aa: 681b ldr r3, [r3, #0] 80041ac: 881b ldrh r3, [r3, #0] 80041ae: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) 80041b2: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80041b6: f403 6300 and.w r3, r3, #2048 @ 0x800 80041ba: 2b00 cmp r3, #0 80041bc: f040 82bd bne.w 800473a 80041c0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80041c4: f403 5340 and.w r3, r3, #12288 @ 0x3000 80041c8: f5b3 5f40 cmp.w r3, #12288 @ 0x3000 80041cc: f000 82b5 beq.w 800473a { PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); 80041d0: 687b ldr r3, [r7, #4] 80041d2: 681b ldr r3, [r3, #0] 80041d4: 61bb str r3, [r7, #24] 80041d6: 687b ldr r3, [r7, #4] 80041d8: 681b ldr r3, [r3, #0] 80041da: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80041de: b29b uxth r3, r3 80041e0: 461a mov r2, r3 80041e2: 69bb ldr r3, [r7, #24] 80041e4: 4413 add r3, r2 80041e6: 61bb str r3, [r7, #24] 80041e8: 69bb ldr r3, [r7, #24] 80041ea: f203 430c addw r3, r3, #1036 @ 0x40c 80041ee: 617b str r3, [r7, #20] 80041f0: 697b ldr r3, [r7, #20] 80041f2: 881b ldrh r3, [r3, #0] 80041f4: b29b uxth r3, r3 80041f6: f3c3 0309 ubfx r3, r3, #0, #10 80041fa: b29a uxth r2, r3 80041fc: 697b ldr r3, [r7, #20] 80041fe: 801a strh r2, [r3, #0] 8004200: 6d7b ldr r3, [r7, #84] @ 0x54 8004202: 691b ldr r3, [r3, #16] 8004204: 2b3e cmp r3, #62 @ 0x3e 8004206: d91d bls.n 8004244 8004208: 6d7b ldr r3, [r7, #84] @ 0x54 800420a: 691b ldr r3, [r3, #16] 800420c: 095b lsrs r3, r3, #5 800420e: 647b str r3, [r7, #68] @ 0x44 8004210: 6d7b ldr r3, [r7, #84] @ 0x54 8004212: 691b ldr r3, [r3, #16] 8004214: f003 031f and.w r3, r3, #31 8004218: 2b00 cmp r3, #0 800421a: d102 bne.n 8004222 800421c: 6c7b ldr r3, [r7, #68] @ 0x44 800421e: 3b01 subs r3, #1 8004220: 647b str r3, [r7, #68] @ 0x44 8004222: 697b ldr r3, [r7, #20] 8004224: 881b ldrh r3, [r3, #0] 8004226: b29a uxth r2, r3 8004228: 6c7b ldr r3, [r7, #68] @ 0x44 800422a: b29b uxth r3, r3 800422c: 029b lsls r3, r3, #10 800422e: b29b uxth r3, r3 8004230: 4313 orrs r3, r2 8004232: b29b uxth r3, r3 8004234: ea6f 4343 mvn.w r3, r3, lsl #17 8004238: ea6f 4353 mvn.w r3, r3, lsr #17 800423c: b29a uxth r2, r3 800423e: 697b ldr r3, [r7, #20] 8004240: 801a strh r2, [r3, #0] 8004242: e026 b.n 8004292 8004244: 6d7b ldr r3, [r7, #84] @ 0x54 8004246: 691b ldr r3, [r3, #16] 8004248: 2b00 cmp r3, #0 800424a: d10a bne.n 8004262 800424c: 697b ldr r3, [r7, #20] 800424e: 881b ldrh r3, [r3, #0] 8004250: b29b uxth r3, r3 8004252: ea6f 4343 mvn.w r3, r3, lsl #17 8004256: ea6f 4353 mvn.w r3, r3, lsr #17 800425a: b29a uxth r2, r3 800425c: 697b ldr r3, [r7, #20] 800425e: 801a strh r2, [r3, #0] 8004260: e017 b.n 8004292 8004262: 6d7b ldr r3, [r7, #84] @ 0x54 8004264: 691b ldr r3, [r3, #16] 8004266: 085b lsrs r3, r3, #1 8004268: 647b str r3, [r7, #68] @ 0x44 800426a: 6d7b ldr r3, [r7, #84] @ 0x54 800426c: 691b ldr r3, [r3, #16] 800426e: f003 0301 and.w r3, r3, #1 8004272: 2b00 cmp r3, #0 8004274: d002 beq.n 800427c 8004276: 6c7b ldr r3, [r7, #68] @ 0x44 8004278: 3301 adds r3, #1 800427a: 647b str r3, [r7, #68] @ 0x44 800427c: 697b ldr r3, [r7, #20] 800427e: 881b ldrh r3, [r3, #0] 8004280: b29a uxth r2, r3 8004282: 6c7b ldr r3, [r7, #68] @ 0x44 8004284: b29b uxth r3, r3 8004286: 029b lsls r3, r3, #10 8004288: b29b uxth r3, r3 800428a: 4313 orrs r3, r2 800428c: b29a uxth r2, r3 800428e: 697b ldr r3, [r7, #20] 8004290: 801a strh r2, [r3, #0] PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); 8004292: 687b ldr r3, [r7, #4] 8004294: 681b ldr r3, [r3, #0] 8004296: 881b ldrh r3, [r3, #0] 8004298: b29b uxth r3, r3 800429a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800429e: f023 0370 bic.w r3, r3, #112 @ 0x70 80042a2: 827b strh r3, [r7, #18] 80042a4: 8a7b ldrh r3, [r7, #18] 80042a6: f483 5380 eor.w r3, r3, #4096 @ 0x1000 80042aa: 827b strh r3, [r7, #18] 80042ac: 8a7b ldrh r3, [r7, #18] 80042ae: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80042b2: 827b strh r3, [r7, #18] 80042b4: 687b ldr r3, [r7, #4] 80042b6: 681a ldr r2, [r3, #0] 80042b8: 8a7b ldrh r3, [r7, #18] 80042ba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80042be: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80042c2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80042c6: f043 0380 orr.w r3, r3, #128 @ 0x80 80042ca: b29b uxth r3, r3 80042cc: 8013 strh r3, [r2, #0] 80042ce: e234 b.n 800473a } else { /* Decode and service non control endpoints interrupt */ /* process related endpoint register */ wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); 80042d0: 687b ldr r3, [r7, #4] 80042d2: 681b ldr r3, [r3, #0] 80042d4: 461a mov r2, r3 80042d6: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 80042da: 009b lsls r3, r3, #2 80042dc: 4413 add r3, r2 80042de: 881b ldrh r3, [r3, #0] 80042e0: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_CTR_RX) != 0U) 80042e4: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 80042e8: 2b00 cmp r3, #0 80042ea: f280 80fc bge.w 80044e6 { /* clear int flag */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); 80042ee: 687b ldr r3, [r7, #4] 80042f0: 681b ldr r3, [r3, #0] 80042f2: 461a mov r2, r3 80042f4: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 80042f8: 009b lsls r3, r3, #2 80042fa: 4413 add r3, r2 80042fc: 881b ldrh r3, [r3, #0] 80042fe: b29a uxth r2, r3 8004300: f640 738f movw r3, #3983 @ 0xf8f 8004304: 4013 ands r3, r2 8004306: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 800430a: 687b ldr r3, [r7, #4] 800430c: 681b ldr r3, [r3, #0] 800430e: 461a mov r2, r3 8004310: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8004314: 009b lsls r3, r3, #2 8004316: 4413 add r3, r2 8004318: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48 800431c: f042 0280 orr.w r2, r2, #128 @ 0x80 8004320: b292 uxth r2, r2 8004322: 801a strh r2, [r3, #0] ep = &hpcd->OUT_ep[epindex]; 8004324: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 8004328: 4613 mov r3, r2 800432a: 009b lsls r3, r3, #2 800432c: 4413 add r3, r2 800432e: 00db lsls r3, r3, #3 8004330: f503 73a8 add.w r3, r3, #336 @ 0x150 8004334: 687a ldr r2, [r7, #4] 8004336: 4413 add r3, r2 8004338: 657b str r3, [r7, #84] @ 0x54 /* OUT Single Buffering */ if (ep->doublebuffer == 0U) 800433a: 6d7b ldr r3, [r7, #84] @ 0x54 800433c: 7b1b ldrb r3, [r3, #12] 800433e: 2b00 cmp r3, #0 8004340: d125 bne.n 800438e { count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8004342: 687b ldr r3, [r7, #4] 8004344: 681b ldr r3, [r3, #0] 8004346: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800434a: b29b uxth r3, r3 800434c: 461a mov r2, r3 800434e: 6d7b ldr r3, [r7, #84] @ 0x54 8004350: 781b ldrb r3, [r3, #0] 8004352: 00db lsls r3, r3, #3 8004354: 4413 add r3, r2 8004356: 3306 adds r3, #6 8004358: 005b lsls r3, r3, #1 800435a: 687a ldr r2, [r7, #4] 800435c: 6812 ldr r2, [r2, #0] 800435e: 4413 add r3, r2 8004360: f503 6380 add.w r3, r3, #1024 @ 0x400 8004364: 881b ldrh r3, [r3, #0] 8004366: f3c3 0309 ubfx r3, r3, #0, #10 800436a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 800436e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8004372: 2b00 cmp r3, #0 8004374: f000 8092 beq.w 800449c { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); 8004378: 687b ldr r3, [r7, #4] 800437a: 6818 ldr r0, [r3, #0] 800437c: 6d7b ldr r3, [r7, #84] @ 0x54 800437e: 6959 ldr r1, [r3, #20] 8004380: 6d7b ldr r3, [r7, #84] @ 0x54 8004382: 88da ldrh r2, [r3, #6] 8004384: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8004388: f004 fe87 bl 800909a 800438c: e086 b.n 800449c } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* manage double buffer bulk out */ if (ep->type == EP_TYPE_BULK) 800438e: 6d7b ldr r3, [r7, #84] @ 0x54 8004390: 78db ldrb r3, [r3, #3] 8004392: 2b02 cmp r3, #2 8004394: d10a bne.n 80043ac { count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal); 8004396: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800439a: 461a mov r2, r3 800439c: 6d79 ldr r1, [r7, #84] @ 0x54 800439e: 6878 ldr r0, [r7, #4] 80043a0: f000 f9d9 bl 8004756 80043a4: 4603 mov r3, r0 80043a6: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 80043aa: e077 b.n 800449c } else /* manage double buffer iso out */ { /* free EP OUT Buffer */ PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 80043ac: 687b ldr r3, [r7, #4] 80043ae: 681b ldr r3, [r3, #0] 80043b0: 461a mov r2, r3 80043b2: 6d7b ldr r3, [r7, #84] @ 0x54 80043b4: 781b ldrb r3, [r3, #0] 80043b6: 009b lsls r3, r3, #2 80043b8: 4413 add r3, r2 80043ba: 881b ldrh r3, [r3, #0] 80043bc: b29b uxth r3, r3 80043be: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80043c2: f023 0370 bic.w r3, r3, #112 @ 0x70 80043c6: f8a7 3052 strh.w r3, [r7, #82] @ 0x52 80043ca: 687b ldr r3, [r7, #4] 80043cc: 681b ldr r3, [r3, #0] 80043ce: 461a mov r2, r3 80043d0: 6d7b ldr r3, [r7, #84] @ 0x54 80043d2: 781b ldrb r3, [r3, #0] 80043d4: 009b lsls r3, r3, #2 80043d6: 441a add r2, r3 80043d8: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52 80043dc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80043e0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80043e4: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80043e8: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80043ec: b29b uxth r3, r3 80043ee: 8013 strh r3, [r2, #0] if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) 80043f0: 687b ldr r3, [r7, #4] 80043f2: 681b ldr r3, [r3, #0] 80043f4: 461a mov r2, r3 80043f6: 6d7b ldr r3, [r7, #84] @ 0x54 80043f8: 781b ldrb r3, [r3, #0] 80043fa: 009b lsls r3, r3, #2 80043fc: 4413 add r3, r2 80043fe: 881b ldrh r3, [r3, #0] 8004400: b29b uxth r3, r3 8004402: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004406: 2b00 cmp r3, #0 8004408: d024 beq.n 8004454 { /* read from endpoint BUF0Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 800440a: 687b ldr r3, [r7, #4] 800440c: 681b ldr r3, [r3, #0] 800440e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004412: b29b uxth r3, r3 8004414: 461a mov r2, r3 8004416: 6d7b ldr r3, [r7, #84] @ 0x54 8004418: 781b ldrb r3, [r3, #0] 800441a: 00db lsls r3, r3, #3 800441c: 4413 add r3, r2 800441e: 3302 adds r3, #2 8004420: 005b lsls r3, r3, #1 8004422: 687a ldr r2, [r7, #4] 8004424: 6812 ldr r2, [r2, #0] 8004426: 4413 add r3, r2 8004428: f503 6380 add.w r3, r3, #1024 @ 0x400 800442c: 881b ldrh r3, [r3, #0] 800442e: f3c3 0309 ubfx r3, r3, #0, #10 8004432: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 8004436: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 800443a: 2b00 cmp r3, #0 800443c: d02e beq.n 800449c { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 800443e: 687b ldr r3, [r7, #4] 8004440: 6818 ldr r0, [r3, #0] 8004442: 6d7b ldr r3, [r7, #84] @ 0x54 8004444: 6959 ldr r1, [r3, #20] 8004446: 6d7b ldr r3, [r7, #84] @ 0x54 8004448: 891a ldrh r2, [r3, #8] 800444a: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 800444e: f004 fe24 bl 800909a 8004452: e023 b.n 800449c } } else { /* read from endpoint BUF1Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8004454: 687b ldr r3, [r7, #4] 8004456: 681b ldr r3, [r3, #0] 8004458: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800445c: b29b uxth r3, r3 800445e: 461a mov r2, r3 8004460: 6d7b ldr r3, [r7, #84] @ 0x54 8004462: 781b ldrb r3, [r3, #0] 8004464: 00db lsls r3, r3, #3 8004466: 4413 add r3, r2 8004468: 3306 adds r3, #6 800446a: 005b lsls r3, r3, #1 800446c: 687a ldr r2, [r7, #4] 800446e: 6812 ldr r2, [r2, #0] 8004470: 4413 add r3, r2 8004472: f503 6380 add.w r3, r3, #1024 @ 0x400 8004476: 881b ldrh r3, [r3, #0] 8004478: f3c3 0309 ubfx r3, r3, #0, #10 800447c: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 8004480: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8004484: 2b00 cmp r3, #0 8004486: d009 beq.n 800449c { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 8004488: 687b ldr r3, [r7, #4] 800448a: 6818 ldr r0, [r3, #0] 800448c: 6d7b ldr r3, [r7, #84] @ 0x54 800448e: 6959 ldr r1, [r3, #20] 8004490: 6d7b ldr r3, [r7, #84] @ 0x54 8004492: 895a ldrh r2, [r3, #10] 8004494: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8004498: f004 fdff bl 800909a } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; 800449c: 6d7b ldr r3, [r7, #84] @ 0x54 800449e: 69da ldr r2, [r3, #28] 80044a0: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80044a4: 441a add r2, r3 80044a6: 6d7b ldr r3, [r7, #84] @ 0x54 80044a8: 61da str r2, [r3, #28] ep->xfer_buff += count; 80044aa: 6d7b ldr r3, [r7, #84] @ 0x54 80044ac: 695a ldr r2, [r3, #20] 80044ae: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80044b2: 441a add r2, r3 80044b4: 6d7b ldr r3, [r7, #84] @ 0x54 80044b6: 615a str r2, [r3, #20] if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) 80044b8: 6d7b ldr r3, [r7, #84] @ 0x54 80044ba: 699b ldr r3, [r3, #24] 80044bc: 2b00 cmp r3, #0 80044be: d005 beq.n 80044cc 80044c0: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50 80044c4: 6d7b ldr r3, [r7, #84] @ 0x54 80044c6: 691b ldr r3, [r3, #16] 80044c8: 429a cmp r2, r3 80044ca: d206 bcs.n 80044da { /* RX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, ep->num); #else HAL_PCD_DataOutStageCallback(hpcd, ep->num); 80044cc: 6d7b ldr r3, [r7, #84] @ 0x54 80044ce: 781b ldrb r3, [r3, #0] 80044d0: 4619 mov r1, r3 80044d2: 6878 ldr r0, [r7, #4] 80044d4: f006 fc44 bl 800ad60 80044d8: e005 b.n 80044e6 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { (void)USB_EPStartXfer(hpcd->Instance, ep); 80044da: 687b ldr r3, [r7, #4] 80044dc: 681b ldr r3, [r3, #0] 80044de: 6d79 ldr r1, [r7, #84] @ 0x54 80044e0: 4618 mov r0, r3 80044e2: f003 f8a5 bl 8007630 } } if ((wEPVal & USB_EP_CTR_TX) != 0U) 80044e6: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80044ea: f003 0380 and.w r3, r3, #128 @ 0x80 80044ee: 2b00 cmp r3, #0 80044f0: f000 8123 beq.w 800473a { ep = &hpcd->IN_ep[epindex]; 80044f4: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 80044f8: 4613 mov r3, r2 80044fa: 009b lsls r3, r3, #2 80044fc: 4413 add r3, r2 80044fe: 00db lsls r3, r3, #3 8004500: 3310 adds r3, #16 8004502: 687a ldr r2, [r7, #4] 8004504: 4413 add r3, r2 8004506: 657b str r3, [r7, #84] @ 0x54 /* clear int flag */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); 8004508: 687b ldr r3, [r7, #4] 800450a: 681b ldr r3, [r3, #0] 800450c: 461a mov r2, r3 800450e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8004512: 009b lsls r3, r3, #2 8004514: 4413 add r3, r2 8004516: 881b ldrh r3, [r3, #0] 8004518: b29b uxth r3, r3 800451a: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 800451e: f023 0370 bic.w r3, r3, #112 @ 0x70 8004522: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 8004526: 687b ldr r3, [r7, #4] 8004528: 681b ldr r3, [r3, #0] 800452a: 461a mov r2, r3 800452c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8004530: 009b lsls r3, r3, #2 8004532: 441a add r2, r3 8004534: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 8004538: ea6f 4343 mvn.w r3, r3, lsl #17 800453c: ea6f 4353 mvn.w r3, r3, lsr #17 8004540: b29b uxth r3, r3 8004542: 8013 strh r3, [r2, #0] if (ep->type == EP_TYPE_ISOC) 8004544: 6d7b ldr r3, [r7, #84] @ 0x54 8004546: 78db ldrb r3, [r3, #3] 8004548: 2b01 cmp r3, #1 800454a: f040 80a2 bne.w 8004692 { ep->xfer_len = 0U; 800454e: 6d7b ldr r3, [r7, #84] @ 0x54 8004550: 2200 movs r2, #0 8004552: 619a str r2, [r3, #24] #if (USE_USB_DOUBLE_BUFFER == 1U) if (ep->doublebuffer != 0U) 8004554: 6d7b ldr r3, [r7, #84] @ 0x54 8004556: 7b1b ldrb r3, [r3, #12] 8004558: 2b00 cmp r3, #0 800455a: f000 8093 beq.w 8004684 { if ((wEPVal & USB_EP_DTOG_TX) != 0U) 800455e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8004562: f003 0340 and.w r3, r3, #64 @ 0x40 8004566: 2b00 cmp r3, #0 8004568: d046 beq.n 80045f8 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 800456a: 6d7b ldr r3, [r7, #84] @ 0x54 800456c: 785b ldrb r3, [r3, #1] 800456e: 2b00 cmp r3, #0 8004570: d126 bne.n 80045c0 8004572: 687b ldr r3, [r7, #4] 8004574: 681b ldr r3, [r3, #0] 8004576: 627b str r3, [r7, #36] @ 0x24 8004578: 687b ldr r3, [r7, #4] 800457a: 681b ldr r3, [r3, #0] 800457c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004580: b29b uxth r3, r3 8004582: 461a mov r2, r3 8004584: 6a7b ldr r3, [r7, #36] @ 0x24 8004586: 4413 add r3, r2 8004588: 627b str r3, [r7, #36] @ 0x24 800458a: 6d7b ldr r3, [r7, #84] @ 0x54 800458c: 781b ldrb r3, [r3, #0] 800458e: 011a lsls r2, r3, #4 8004590: 6a7b ldr r3, [r7, #36] @ 0x24 8004592: 4413 add r3, r2 8004594: f203 4304 addw r3, r3, #1028 @ 0x404 8004598: 623b str r3, [r7, #32] 800459a: 6a3b ldr r3, [r7, #32] 800459c: 881b ldrh r3, [r3, #0] 800459e: b29b uxth r3, r3 80045a0: f3c3 0309 ubfx r3, r3, #0, #10 80045a4: b29a uxth r2, r3 80045a6: 6a3b ldr r3, [r7, #32] 80045a8: 801a strh r2, [r3, #0] 80045aa: 6a3b ldr r3, [r7, #32] 80045ac: 881b ldrh r3, [r3, #0] 80045ae: b29b uxth r3, r3 80045b0: ea6f 4343 mvn.w r3, r3, lsl #17 80045b4: ea6f 4353 mvn.w r3, r3, lsr #17 80045b8: b29a uxth r2, r3 80045ba: 6a3b ldr r3, [r7, #32] 80045bc: 801a strh r2, [r3, #0] 80045be: e061 b.n 8004684 80045c0: 6d7b ldr r3, [r7, #84] @ 0x54 80045c2: 785b ldrb r3, [r3, #1] 80045c4: 2b01 cmp r3, #1 80045c6: d15d bne.n 8004684 80045c8: 687b ldr r3, [r7, #4] 80045ca: 681b ldr r3, [r3, #0] 80045cc: 62fb str r3, [r7, #44] @ 0x2c 80045ce: 687b ldr r3, [r7, #4] 80045d0: 681b ldr r3, [r3, #0] 80045d2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80045d6: b29b uxth r3, r3 80045d8: 461a mov r2, r3 80045da: 6afb ldr r3, [r7, #44] @ 0x2c 80045dc: 4413 add r3, r2 80045de: 62fb str r3, [r7, #44] @ 0x2c 80045e0: 6d7b ldr r3, [r7, #84] @ 0x54 80045e2: 781b ldrb r3, [r3, #0] 80045e4: 011a lsls r2, r3, #4 80045e6: 6afb ldr r3, [r7, #44] @ 0x2c 80045e8: 4413 add r3, r2 80045ea: f203 4304 addw r3, r3, #1028 @ 0x404 80045ee: 62bb str r3, [r7, #40] @ 0x28 80045f0: 6abb ldr r3, [r7, #40] @ 0x28 80045f2: 2200 movs r2, #0 80045f4: 801a strh r2, [r3, #0] 80045f6: e045 b.n 8004684 } else { PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 80045f8: 687b ldr r3, [r7, #4] 80045fa: 681b ldr r3, [r3, #0] 80045fc: 63fb str r3, [r7, #60] @ 0x3c 80045fe: 6d7b ldr r3, [r7, #84] @ 0x54 8004600: 785b ldrb r3, [r3, #1] 8004602: 2b00 cmp r3, #0 8004604: d126 bne.n 8004654 8004606: 687b ldr r3, [r7, #4] 8004608: 681b ldr r3, [r3, #0] 800460a: 637b str r3, [r7, #52] @ 0x34 800460c: 687b ldr r3, [r7, #4] 800460e: 681b ldr r3, [r3, #0] 8004610: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004614: b29b uxth r3, r3 8004616: 461a mov r2, r3 8004618: 6b7b ldr r3, [r7, #52] @ 0x34 800461a: 4413 add r3, r2 800461c: 637b str r3, [r7, #52] @ 0x34 800461e: 6d7b ldr r3, [r7, #84] @ 0x54 8004620: 781b ldrb r3, [r3, #0] 8004622: 011a lsls r2, r3, #4 8004624: 6b7b ldr r3, [r7, #52] @ 0x34 8004626: 4413 add r3, r2 8004628: f203 430c addw r3, r3, #1036 @ 0x40c 800462c: 633b str r3, [r7, #48] @ 0x30 800462e: 6b3b ldr r3, [r7, #48] @ 0x30 8004630: 881b ldrh r3, [r3, #0] 8004632: b29b uxth r3, r3 8004634: f3c3 0309 ubfx r3, r3, #0, #10 8004638: b29a uxth r2, r3 800463a: 6b3b ldr r3, [r7, #48] @ 0x30 800463c: 801a strh r2, [r3, #0] 800463e: 6b3b ldr r3, [r7, #48] @ 0x30 8004640: 881b ldrh r3, [r3, #0] 8004642: b29b uxth r3, r3 8004644: ea6f 4343 mvn.w r3, r3, lsl #17 8004648: ea6f 4353 mvn.w r3, r3, lsr #17 800464c: b29a uxth r2, r3 800464e: 6b3b ldr r3, [r7, #48] @ 0x30 8004650: 801a strh r2, [r3, #0] 8004652: e017 b.n 8004684 8004654: 6d7b ldr r3, [r7, #84] @ 0x54 8004656: 785b ldrb r3, [r3, #1] 8004658: 2b01 cmp r3, #1 800465a: d113 bne.n 8004684 800465c: 687b ldr r3, [r7, #4] 800465e: 681b ldr r3, [r3, #0] 8004660: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004664: b29b uxth r3, r3 8004666: 461a mov r2, r3 8004668: 6bfb ldr r3, [r7, #60] @ 0x3c 800466a: 4413 add r3, r2 800466c: 63fb str r3, [r7, #60] @ 0x3c 800466e: 6d7b ldr r3, [r7, #84] @ 0x54 8004670: 781b ldrb r3, [r3, #0] 8004672: 011a lsls r2, r3, #4 8004674: 6bfb ldr r3, [r7, #60] @ 0x3c 8004676: 4413 add r3, r2 8004678: f203 430c addw r3, r3, #1036 @ 0x40c 800467c: 63bb str r3, [r7, #56] @ 0x38 800467e: 6bbb ldr r3, [r7, #56] @ 0x38 8004680: 2200 movs r2, #0 8004682: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8004684: 6d7b ldr r3, [r7, #84] @ 0x54 8004686: 781b ldrb r3, [r3, #0] 8004688: 4619 mov r1, r3 800468a: 6878 ldr r0, [r7, #4] 800468c: f006 fb83 bl 800ad96 8004690: e053 b.n 800473a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Manage Single Buffer Transaction */ if ((wEPVal & USB_EP_KIND) == 0U) 8004692: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8004696: f403 7380 and.w r3, r3, #256 @ 0x100 800469a: 2b00 cmp r3, #0 800469c: d146 bne.n 800472c { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 800469e: 687b ldr r3, [r7, #4] 80046a0: 681b ldr r3, [r3, #0] 80046a2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80046a6: b29b uxth r3, r3 80046a8: 461a mov r2, r3 80046aa: 6d7b ldr r3, [r7, #84] @ 0x54 80046ac: 781b ldrb r3, [r3, #0] 80046ae: 00db lsls r3, r3, #3 80046b0: 4413 add r3, r2 80046b2: 3302 adds r3, #2 80046b4: 005b lsls r3, r3, #1 80046b6: 687a ldr r2, [r7, #4] 80046b8: 6812 ldr r2, [r2, #0] 80046ba: 4413 add r3, r2 80046bc: f503 6380 add.w r3, r3, #1024 @ 0x400 80046c0: 881b ldrh r3, [r3, #0] 80046c2: f3c3 0309 ubfx r3, r3, #0, #10 80046c6: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 if (ep->xfer_len > TxPctSize) 80046ca: 6d7b ldr r3, [r7, #84] @ 0x54 80046cc: 699a ldr r2, [r3, #24] 80046ce: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 80046d2: 429a cmp r2, r3 80046d4: d907 bls.n 80046e6 { ep->xfer_len -= TxPctSize; 80046d6: 6d7b ldr r3, [r7, #84] @ 0x54 80046d8: 699a ldr r2, [r3, #24] 80046da: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 80046de: 1ad2 subs r2, r2, r3 80046e0: 6d7b ldr r3, [r7, #84] @ 0x54 80046e2: 619a str r2, [r3, #24] 80046e4: e002 b.n 80046ec } else { ep->xfer_len = 0U; 80046e6: 6d7b ldr r3, [r7, #84] @ 0x54 80046e8: 2200 movs r2, #0 80046ea: 619a str r2, [r3, #24] } /* Zero Length Packet? */ if (ep->xfer_len == 0U) 80046ec: 6d7b ldr r3, [r7, #84] @ 0x54 80046ee: 699b ldr r3, [r3, #24] 80046f0: 2b00 cmp r3, #0 80046f2: d106 bne.n 8004702 { /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 80046f4: 6d7b ldr r3, [r7, #84] @ 0x54 80046f6: 781b ldrb r3, [r3, #0] 80046f8: 4619 mov r1, r3 80046fa: 6878 ldr r0, [r7, #4] 80046fc: f006 fb4b bl 800ad96 8004700: e01b b.n 800473a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Transfer is not yet Done */ ep->xfer_buff += TxPctSize; 8004702: 6d7b ldr r3, [r7, #84] @ 0x54 8004704: 695a ldr r2, [r3, #20] 8004706: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 800470a: 441a add r2, r3 800470c: 6d7b ldr r3, [r7, #84] @ 0x54 800470e: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8004710: 6d7b ldr r3, [r7, #84] @ 0x54 8004712: 69da ldr r2, [r3, #28] 8004714: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8004718: 441a add r2, r3 800471a: 6d7b ldr r3, [r7, #84] @ 0x54 800471c: 61da str r2, [r3, #28] (void)USB_EPStartXfer(hpcd->Instance, ep); 800471e: 687b ldr r3, [r7, #4] 8004720: 681b ldr r3, [r3, #0] 8004722: 6d79 ldr r1, [r7, #84] @ 0x54 8004724: 4618 mov r0, r3 8004726: f002 ff83 bl 8007630 800472a: e006 b.n 800473a } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */ else { (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); 800472c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8004730: 461a mov r2, r3 8004732: 6d79 ldr r1, [r7, #84] @ 0x54 8004734: 6878 ldr r0, [r7, #4] 8004736: f000 f91b bl 8004970 while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 800473a: 687b ldr r3, [r7, #4] 800473c: 681b ldr r3, [r3, #0] 800473e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8004742: b29b uxth r3, r3 8004744: b21b sxth r3, r3 8004746: 2b00 cmp r3, #0 8004748: f6ff ac3b blt.w 8003fc2 } } } } return HAL_OK; 800474c: 2300 movs r3, #0 } 800474e: 4618 mov r0, r3 8004750: 3758 adds r7, #88 @ 0x58 8004752: 46bd mov sp, r7 8004754: bd80 pop {r7, pc} 08004756 : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 8004756: b580 push {r7, lr} 8004758: b088 sub sp, #32 800475a: af00 add r7, sp, #0 800475c: 60f8 str r0, [r7, #12] 800475e: 60b9 str r1, [r7, #8] 8004760: 4613 mov r3, r2 8004762: 80fb strh r3, [r7, #6] uint16_t count; /* Manage Buffer0 OUT */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8004764: 88fb ldrh r3, [r7, #6] 8004766: f403 4380 and.w r3, r3, #16384 @ 0x4000 800476a: 2b00 cmp r3, #0 800476c: d07e beq.n 800486c { /* Get count of received Data on buffer0 */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 800476e: 68fb ldr r3, [r7, #12] 8004770: 681b ldr r3, [r3, #0] 8004772: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004776: b29b uxth r3, r3 8004778: 461a mov r2, r3 800477a: 68bb ldr r3, [r7, #8] 800477c: 781b ldrb r3, [r3, #0] 800477e: 00db lsls r3, r3, #3 8004780: 4413 add r3, r2 8004782: 3302 adds r3, #2 8004784: 005b lsls r3, r3, #1 8004786: 68fa ldr r2, [r7, #12] 8004788: 6812 ldr r2, [r2, #0] 800478a: 4413 add r3, r2 800478c: f503 6380 add.w r3, r3, #1024 @ 0x400 8004790: 881b ldrh r3, [r3, #0] 8004792: f3c3 0309 ubfx r3, r3, #0, #10 8004796: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 8004798: 68bb ldr r3, [r7, #8] 800479a: 699a ldr r2, [r3, #24] 800479c: 8b7b ldrh r3, [r7, #26] 800479e: 429a cmp r2, r3 80047a0: d306 bcc.n 80047b0 { ep->xfer_len -= count; 80047a2: 68bb ldr r3, [r7, #8] 80047a4: 699a ldr r2, [r3, #24] 80047a6: 8b7b ldrh r3, [r7, #26] 80047a8: 1ad2 subs r2, r2, r3 80047aa: 68bb ldr r3, [r7, #8] 80047ac: 619a str r2, [r3, #24] 80047ae: e002 b.n 80047b6 } else { ep->xfer_len = 0U; 80047b0: 68bb ldr r3, [r7, #8] 80047b2: 2200 movs r2, #0 80047b4: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 80047b6: 68bb ldr r3, [r7, #8] 80047b8: 699b ldr r3, [r3, #24] 80047ba: 2b00 cmp r3, #0 80047bc: d123 bne.n 8004806 { /* set NAK to OUT endpoint since double buffer is enabled */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 80047be: 68fb ldr r3, [r7, #12] 80047c0: 681b ldr r3, [r3, #0] 80047c2: 461a mov r2, r3 80047c4: 68bb ldr r3, [r7, #8] 80047c6: 781b ldrb r3, [r3, #0] 80047c8: 009b lsls r3, r3, #2 80047ca: 4413 add r3, r2 80047cc: 881b ldrh r3, [r3, #0] 80047ce: b29b uxth r3, r3 80047d0: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80047d4: f023 0370 bic.w r3, r3, #112 @ 0x70 80047d8: 833b strh r3, [r7, #24] 80047da: 8b3b ldrh r3, [r7, #24] 80047dc: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80047e0: 833b strh r3, [r7, #24] 80047e2: 68fb ldr r3, [r7, #12] 80047e4: 681b ldr r3, [r3, #0] 80047e6: 461a mov r2, r3 80047e8: 68bb ldr r3, [r7, #8] 80047ea: 781b ldrb r3, [r3, #0] 80047ec: 009b lsls r3, r3, #2 80047ee: 441a add r2, r3 80047f0: 8b3b ldrh r3, [r7, #24] 80047f2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80047f6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80047fa: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80047fe: f043 0380 orr.w r3, r3, #128 @ 0x80 8004802: b29b uxth r3, r3 8004804: 8013 strh r3, [r2, #0] } /* Check if Buffer1 is in blocked state which requires to toggle */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 8004806: 88fb ldrh r3, [r7, #6] 8004808: f003 0340 and.w r3, r3, #64 @ 0x40 800480c: 2b00 cmp r3, #0 800480e: d01f beq.n 8004850 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 8004810: 68fb ldr r3, [r7, #12] 8004812: 681b ldr r3, [r3, #0] 8004814: 461a mov r2, r3 8004816: 68bb ldr r3, [r7, #8] 8004818: 781b ldrb r3, [r3, #0] 800481a: 009b lsls r3, r3, #2 800481c: 4413 add r3, r2 800481e: 881b ldrh r3, [r3, #0] 8004820: b29b uxth r3, r3 8004822: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004826: f023 0370 bic.w r3, r3, #112 @ 0x70 800482a: 82fb strh r3, [r7, #22] 800482c: 68fb ldr r3, [r7, #12] 800482e: 681b ldr r3, [r3, #0] 8004830: 461a mov r2, r3 8004832: 68bb ldr r3, [r7, #8] 8004834: 781b ldrb r3, [r3, #0] 8004836: 009b lsls r3, r3, #2 8004838: 441a add r2, r3 800483a: 8afb ldrh r3, [r7, #22] 800483c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004840: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004844: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8004848: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800484c: b29b uxth r3, r3 800484e: 8013 strh r3, [r2, #0] } if (count != 0U) 8004850: 8b7b ldrh r3, [r7, #26] 8004852: 2b00 cmp r3, #0 8004854: f000 8087 beq.w 8004966 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 8004858: 68fb ldr r3, [r7, #12] 800485a: 6818 ldr r0, [r3, #0] 800485c: 68bb ldr r3, [r7, #8] 800485e: 6959 ldr r1, [r3, #20] 8004860: 68bb ldr r3, [r7, #8] 8004862: 891a ldrh r2, [r3, #8] 8004864: 8b7b ldrh r3, [r7, #26] 8004866: f004 fc18 bl 800909a 800486a: e07c b.n 8004966 } /* Manage Buffer 1 DTOG_RX=0 */ else { /* Get count of received data */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 800486c: 68fb ldr r3, [r7, #12] 800486e: 681b ldr r3, [r3, #0] 8004870: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004874: b29b uxth r3, r3 8004876: 461a mov r2, r3 8004878: 68bb ldr r3, [r7, #8] 800487a: 781b ldrb r3, [r3, #0] 800487c: 00db lsls r3, r3, #3 800487e: 4413 add r3, r2 8004880: 3306 adds r3, #6 8004882: 005b lsls r3, r3, #1 8004884: 68fa ldr r2, [r7, #12] 8004886: 6812 ldr r2, [r2, #0] 8004888: 4413 add r3, r2 800488a: f503 6380 add.w r3, r3, #1024 @ 0x400 800488e: 881b ldrh r3, [r3, #0] 8004890: f3c3 0309 ubfx r3, r3, #0, #10 8004894: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 8004896: 68bb ldr r3, [r7, #8] 8004898: 699a ldr r2, [r3, #24] 800489a: 8b7b ldrh r3, [r7, #26] 800489c: 429a cmp r2, r3 800489e: d306 bcc.n 80048ae { ep->xfer_len -= count; 80048a0: 68bb ldr r3, [r7, #8] 80048a2: 699a ldr r2, [r3, #24] 80048a4: 8b7b ldrh r3, [r7, #26] 80048a6: 1ad2 subs r2, r2, r3 80048a8: 68bb ldr r3, [r7, #8] 80048aa: 619a str r2, [r3, #24] 80048ac: e002 b.n 80048b4 } else { ep->xfer_len = 0U; 80048ae: 68bb ldr r3, [r7, #8] 80048b0: 2200 movs r2, #0 80048b2: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 80048b4: 68bb ldr r3, [r7, #8] 80048b6: 699b ldr r3, [r3, #24] 80048b8: 2b00 cmp r3, #0 80048ba: d123 bne.n 8004904 { /* set NAK on the current endpoint */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 80048bc: 68fb ldr r3, [r7, #12] 80048be: 681b ldr r3, [r3, #0] 80048c0: 461a mov r2, r3 80048c2: 68bb ldr r3, [r7, #8] 80048c4: 781b ldrb r3, [r3, #0] 80048c6: 009b lsls r3, r3, #2 80048c8: 4413 add r3, r2 80048ca: 881b ldrh r3, [r3, #0] 80048cc: b29b uxth r3, r3 80048ce: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80048d2: f023 0370 bic.w r3, r3, #112 @ 0x70 80048d6: 83fb strh r3, [r7, #30] 80048d8: 8bfb ldrh r3, [r7, #30] 80048da: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80048de: 83fb strh r3, [r7, #30] 80048e0: 68fb ldr r3, [r7, #12] 80048e2: 681b ldr r3, [r3, #0] 80048e4: 461a mov r2, r3 80048e6: 68bb ldr r3, [r7, #8] 80048e8: 781b ldrb r3, [r3, #0] 80048ea: 009b lsls r3, r3, #2 80048ec: 441a add r2, r3 80048ee: 8bfb ldrh r3, [r7, #30] 80048f0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80048f4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80048f8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80048fc: f043 0380 orr.w r3, r3, #128 @ 0x80 8004900: b29b uxth r3, r3 8004902: 8013 strh r3, [r2, #0] } /*Need to FreeUser Buffer*/ if ((wEPVal & USB_EP_DTOG_TX) == 0U) 8004904: 88fb ldrh r3, [r7, #6] 8004906: f003 0340 and.w r3, r3, #64 @ 0x40 800490a: 2b00 cmp r3, #0 800490c: d11f bne.n 800494e { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 800490e: 68fb ldr r3, [r7, #12] 8004910: 681b ldr r3, [r3, #0] 8004912: 461a mov r2, r3 8004914: 68bb ldr r3, [r7, #8] 8004916: 781b ldrb r3, [r3, #0] 8004918: 009b lsls r3, r3, #2 800491a: 4413 add r3, r2 800491c: 881b ldrh r3, [r3, #0] 800491e: b29b uxth r3, r3 8004920: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004924: f023 0370 bic.w r3, r3, #112 @ 0x70 8004928: 83bb strh r3, [r7, #28] 800492a: 68fb ldr r3, [r7, #12] 800492c: 681b ldr r3, [r3, #0] 800492e: 461a mov r2, r3 8004930: 68bb ldr r3, [r7, #8] 8004932: 781b ldrb r3, [r3, #0] 8004934: 009b lsls r3, r3, #2 8004936: 441a add r2, r3 8004938: 8bbb ldrh r3, [r7, #28] 800493a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800493e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004942: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8004946: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800494a: b29b uxth r3, r3 800494c: 8013 strh r3, [r2, #0] } if (count != 0U) 800494e: 8b7b ldrh r3, [r7, #26] 8004950: 2b00 cmp r3, #0 8004952: d008 beq.n 8004966 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 8004954: 68fb ldr r3, [r7, #12] 8004956: 6818 ldr r0, [r3, #0] 8004958: 68bb ldr r3, [r7, #8] 800495a: 6959 ldr r1, [r3, #20] 800495c: 68bb ldr r3, [r7, #8] 800495e: 895a ldrh r2, [r3, #10] 8004960: 8b7b ldrh r3, [r7, #26] 8004962: f004 fb9a bl 800909a } } return count; 8004966: 8b7b ldrh r3, [r7, #26] } 8004968: 4618 mov r0, r3 800496a: 3720 adds r7, #32 800496c: 46bd mov sp, r7 800496e: bd80 pop {r7, pc} 08004970 : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 8004970: b580 push {r7, lr} 8004972: b0a4 sub sp, #144 @ 0x90 8004974: af00 add r7, sp, #0 8004976: 60f8 str r0, [r7, #12] 8004978: 60b9 str r1, [r7, #8] 800497a: 4613 mov r3, r2 800497c: 80fb strh r3, [r7, #6] uint32_t len; uint16_t TxPctSize; /* Data Buffer0 ACK received */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 800497e: 88fb ldrh r3, [r7, #6] 8004980: f003 0340 and.w r3, r3, #64 @ 0x40 8004984: 2b00 cmp r3, #0 8004986: f000 81dd beq.w 8004d44 { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 800498a: 68fb ldr r3, [r7, #12] 800498c: 681b ldr r3, [r3, #0] 800498e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004992: b29b uxth r3, r3 8004994: 461a mov r2, r3 8004996: 68bb ldr r3, [r7, #8] 8004998: 781b ldrb r3, [r3, #0] 800499a: 00db lsls r3, r3, #3 800499c: 4413 add r3, r2 800499e: 3302 adds r3, #2 80049a0: 005b lsls r3, r3, #1 80049a2: 68fa ldr r2, [r7, #12] 80049a4: 6812 ldr r2, [r2, #0] 80049a6: 4413 add r3, r2 80049a8: f503 6380 add.w r3, r3, #1024 @ 0x400 80049ac: 881b ldrh r3, [r3, #0] 80049ae: f3c3 0309 ubfx r3, r3, #0, #10 80049b2: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len > TxPctSize) 80049b6: 68bb ldr r3, [r7, #8] 80049b8: 699a ldr r2, [r3, #24] 80049ba: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80049be: 429a cmp r2, r3 80049c0: d907 bls.n 80049d2 { ep->xfer_len -= TxPctSize; 80049c2: 68bb ldr r3, [r7, #8] 80049c4: 699a ldr r2, [r3, #24] 80049c6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80049ca: 1ad2 subs r2, r2, r3 80049cc: 68bb ldr r3, [r7, #8] 80049ce: 619a str r2, [r3, #24] 80049d0: e002 b.n 80049d8 } else { ep->xfer_len = 0U; 80049d2: 68bb ldr r3, [r7, #8] 80049d4: 2200 movs r2, #0 80049d6: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 80049d8: 68bb ldr r3, [r7, #8] 80049da: 699b ldr r3, [r3, #24] 80049dc: 2b00 cmp r3, #0 80049de: f040 80b9 bne.w 8004b54 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 80049e2: 68bb ldr r3, [r7, #8] 80049e4: 785b ldrb r3, [r3, #1] 80049e6: 2b00 cmp r3, #0 80049e8: d126 bne.n 8004a38 80049ea: 68fb ldr r3, [r7, #12] 80049ec: 681b ldr r3, [r3, #0] 80049ee: 62fb str r3, [r7, #44] @ 0x2c 80049f0: 68fb ldr r3, [r7, #12] 80049f2: 681b ldr r3, [r3, #0] 80049f4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80049f8: b29b uxth r3, r3 80049fa: 461a mov r2, r3 80049fc: 6afb ldr r3, [r7, #44] @ 0x2c 80049fe: 4413 add r3, r2 8004a00: 62fb str r3, [r7, #44] @ 0x2c 8004a02: 68bb ldr r3, [r7, #8] 8004a04: 781b ldrb r3, [r3, #0] 8004a06: 011a lsls r2, r3, #4 8004a08: 6afb ldr r3, [r7, #44] @ 0x2c 8004a0a: 4413 add r3, r2 8004a0c: f203 4304 addw r3, r3, #1028 @ 0x404 8004a10: 62bb str r3, [r7, #40] @ 0x28 8004a12: 6abb ldr r3, [r7, #40] @ 0x28 8004a14: 881b ldrh r3, [r3, #0] 8004a16: b29b uxth r3, r3 8004a18: f3c3 0309 ubfx r3, r3, #0, #10 8004a1c: b29a uxth r2, r3 8004a1e: 6abb ldr r3, [r7, #40] @ 0x28 8004a20: 801a strh r2, [r3, #0] 8004a22: 6abb ldr r3, [r7, #40] @ 0x28 8004a24: 881b ldrh r3, [r3, #0] 8004a26: b29b uxth r3, r3 8004a28: ea6f 4343 mvn.w r3, r3, lsl #17 8004a2c: ea6f 4353 mvn.w r3, r3, lsr #17 8004a30: b29a uxth r2, r3 8004a32: 6abb ldr r3, [r7, #40] @ 0x28 8004a34: 801a strh r2, [r3, #0] 8004a36: e01a b.n 8004a6e 8004a38: 68bb ldr r3, [r7, #8] 8004a3a: 785b ldrb r3, [r3, #1] 8004a3c: 2b01 cmp r3, #1 8004a3e: d116 bne.n 8004a6e 8004a40: 68fb ldr r3, [r7, #12] 8004a42: 681b ldr r3, [r3, #0] 8004a44: 637b str r3, [r7, #52] @ 0x34 8004a46: 68fb ldr r3, [r7, #12] 8004a48: 681b ldr r3, [r3, #0] 8004a4a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004a4e: b29b uxth r3, r3 8004a50: 461a mov r2, r3 8004a52: 6b7b ldr r3, [r7, #52] @ 0x34 8004a54: 4413 add r3, r2 8004a56: 637b str r3, [r7, #52] @ 0x34 8004a58: 68bb ldr r3, [r7, #8] 8004a5a: 781b ldrb r3, [r3, #0] 8004a5c: 011a lsls r2, r3, #4 8004a5e: 6b7b ldr r3, [r7, #52] @ 0x34 8004a60: 4413 add r3, r2 8004a62: f203 4304 addw r3, r3, #1028 @ 0x404 8004a66: 633b str r3, [r7, #48] @ 0x30 8004a68: 6b3b ldr r3, [r7, #48] @ 0x30 8004a6a: 2200 movs r2, #0 8004a6c: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8004a6e: 68fb ldr r3, [r7, #12] 8004a70: 681b ldr r3, [r3, #0] 8004a72: 627b str r3, [r7, #36] @ 0x24 8004a74: 68bb ldr r3, [r7, #8] 8004a76: 785b ldrb r3, [r3, #1] 8004a78: 2b00 cmp r3, #0 8004a7a: d126 bne.n 8004aca 8004a7c: 68fb ldr r3, [r7, #12] 8004a7e: 681b ldr r3, [r3, #0] 8004a80: 61fb str r3, [r7, #28] 8004a82: 68fb ldr r3, [r7, #12] 8004a84: 681b ldr r3, [r3, #0] 8004a86: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004a8a: b29b uxth r3, r3 8004a8c: 461a mov r2, r3 8004a8e: 69fb ldr r3, [r7, #28] 8004a90: 4413 add r3, r2 8004a92: 61fb str r3, [r7, #28] 8004a94: 68bb ldr r3, [r7, #8] 8004a96: 781b ldrb r3, [r3, #0] 8004a98: 011a lsls r2, r3, #4 8004a9a: 69fb ldr r3, [r7, #28] 8004a9c: 4413 add r3, r2 8004a9e: f203 430c addw r3, r3, #1036 @ 0x40c 8004aa2: 61bb str r3, [r7, #24] 8004aa4: 69bb ldr r3, [r7, #24] 8004aa6: 881b ldrh r3, [r3, #0] 8004aa8: b29b uxth r3, r3 8004aaa: f3c3 0309 ubfx r3, r3, #0, #10 8004aae: b29a uxth r2, r3 8004ab0: 69bb ldr r3, [r7, #24] 8004ab2: 801a strh r2, [r3, #0] 8004ab4: 69bb ldr r3, [r7, #24] 8004ab6: 881b ldrh r3, [r3, #0] 8004ab8: b29b uxth r3, r3 8004aba: ea6f 4343 mvn.w r3, r3, lsl #17 8004abe: ea6f 4353 mvn.w r3, r3, lsr #17 8004ac2: b29a uxth r2, r3 8004ac4: 69bb ldr r3, [r7, #24] 8004ac6: 801a strh r2, [r3, #0] 8004ac8: e017 b.n 8004afa 8004aca: 68bb ldr r3, [r7, #8] 8004acc: 785b ldrb r3, [r3, #1] 8004ace: 2b01 cmp r3, #1 8004ad0: d113 bne.n 8004afa 8004ad2: 68fb ldr r3, [r7, #12] 8004ad4: 681b ldr r3, [r3, #0] 8004ad6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004ada: b29b uxth r3, r3 8004adc: 461a mov r2, r3 8004ade: 6a7b ldr r3, [r7, #36] @ 0x24 8004ae0: 4413 add r3, r2 8004ae2: 627b str r3, [r7, #36] @ 0x24 8004ae4: 68bb ldr r3, [r7, #8] 8004ae6: 781b ldrb r3, [r3, #0] 8004ae8: 011a lsls r2, r3, #4 8004aea: 6a7b ldr r3, [r7, #36] @ 0x24 8004aec: 4413 add r3, r2 8004aee: f203 430c addw r3, r3, #1036 @ 0x40c 8004af2: 623b str r3, [r7, #32] 8004af4: 6a3b ldr r3, [r7, #32] 8004af6: 2200 movs r2, #0 8004af8: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8004afa: 68bb ldr r3, [r7, #8] 8004afc: 781b ldrb r3, [r3, #0] 8004afe: 4619 mov r1, r3 8004b00: 68f8 ldr r0, [r7, #12] 8004b02: f006 f948 bl 800ad96 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8004b06: 88fb ldrh r3, [r7, #6] 8004b08: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004b0c: 2b00 cmp r3, #0 8004b0e: f000 82fc beq.w 800510a { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8004b12: 68fb ldr r3, [r7, #12] 8004b14: 681b ldr r3, [r3, #0] 8004b16: 461a mov r2, r3 8004b18: 68bb ldr r3, [r7, #8] 8004b1a: 781b ldrb r3, [r3, #0] 8004b1c: 009b lsls r3, r3, #2 8004b1e: 4413 add r3, r2 8004b20: 881b ldrh r3, [r3, #0] 8004b22: b29b uxth r3, r3 8004b24: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004b28: f023 0370 bic.w r3, r3, #112 @ 0x70 8004b2c: 82fb strh r3, [r7, #22] 8004b2e: 68fb ldr r3, [r7, #12] 8004b30: 681b ldr r3, [r3, #0] 8004b32: 461a mov r2, r3 8004b34: 68bb ldr r3, [r7, #8] 8004b36: 781b ldrb r3, [r3, #0] 8004b38: 009b lsls r3, r3, #2 8004b3a: 441a add r2, r3 8004b3c: 8afb ldrh r3, [r7, #22] 8004b3e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004b42: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004b46: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8004b4a: f043 0380 orr.w r3, r3, #128 @ 0x80 8004b4e: b29b uxth r3, r3 8004b50: 8013 strh r3, [r2, #0] 8004b52: e2da b.n 800510a } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8004b54: 88fb ldrh r3, [r7, #6] 8004b56: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004b5a: 2b00 cmp r3, #0 8004b5c: d021 beq.n 8004ba2 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8004b5e: 68fb ldr r3, [r7, #12] 8004b60: 681b ldr r3, [r3, #0] 8004b62: 461a mov r2, r3 8004b64: 68bb ldr r3, [r7, #8] 8004b66: 781b ldrb r3, [r3, #0] 8004b68: 009b lsls r3, r3, #2 8004b6a: 4413 add r3, r2 8004b6c: 881b ldrh r3, [r3, #0] 8004b6e: b29b uxth r3, r3 8004b70: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004b74: f023 0370 bic.w r3, r3, #112 @ 0x70 8004b78: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8004b7c: 68fb ldr r3, [r7, #12] 8004b7e: 681b ldr r3, [r3, #0] 8004b80: 461a mov r2, r3 8004b82: 68bb ldr r3, [r7, #8] 8004b84: 781b ldrb r3, [r3, #0] 8004b86: 009b lsls r3, r3, #2 8004b88: 441a add r2, r3 8004b8a: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8004b8e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004b92: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004b96: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8004b9a: f043 0380 orr.w r3, r3, #128 @ 0x80 8004b9e: b29b uxth r3, r3 8004ba0: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 8004ba2: 68bb ldr r3, [r7, #8] 8004ba4: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8004ba8: 2b01 cmp r3, #1 8004baa: f040 82ae bne.w 800510a { ep->xfer_buff += TxPctSize; 8004bae: 68bb ldr r3, [r7, #8] 8004bb0: 695a ldr r2, [r3, #20] 8004bb2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004bb6: 441a add r2, r3 8004bb8: 68bb ldr r3, [r7, #8] 8004bba: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8004bbc: 68bb ldr r3, [r7, #8] 8004bbe: 69da ldr r2, [r3, #28] 8004bc0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004bc4: 441a add r2, r3 8004bc6: 68bb ldr r3, [r7, #8] 8004bc8: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8004bca: 68bb ldr r3, [r7, #8] 8004bcc: 6a1a ldr r2, [r3, #32] 8004bce: 68bb ldr r3, [r7, #8] 8004bd0: 691b ldr r3, [r3, #16] 8004bd2: 429a cmp r2, r3 8004bd4: d30b bcc.n 8004bee { len = ep->maxpacket; 8004bd6: 68bb ldr r3, [r7, #8] 8004bd8: 691b ldr r3, [r3, #16] 8004bda: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 8004bde: 68bb ldr r3, [r7, #8] 8004be0: 6a1a ldr r2, [r3, #32] 8004be2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004be6: 1ad2 subs r2, r2, r3 8004be8: 68bb ldr r3, [r7, #8] 8004bea: 621a str r2, [r3, #32] 8004bec: e017 b.n 8004c1e } else if (ep->xfer_len_db == 0U) 8004bee: 68bb ldr r3, [r7, #8] 8004bf0: 6a1b ldr r3, [r3, #32] 8004bf2: 2b00 cmp r3, #0 8004bf4: d108 bne.n 8004c08 { len = TxPctSize; 8004bf6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004bfa: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 8004bfe: 68bb ldr r3, [r7, #8] 8004c00: 2200 movs r2, #0 8004c02: f883 2024 strb.w r2, [r3, #36] @ 0x24 8004c06: e00a b.n 8004c1e } else { ep->xfer_fill_db = 0U; 8004c08: 68bb ldr r3, [r7, #8] 8004c0a: 2200 movs r2, #0 8004c0c: f883 2024 strb.w r2, [r3, #36] @ 0x24 len = ep->xfer_len_db; 8004c10: 68bb ldr r3, [r7, #8] 8004c12: 6a1b ldr r3, [r3, #32] 8004c14: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8004c18: 68bb ldr r3, [r7, #8] 8004c1a: 2200 movs r2, #0 8004c1c: 621a str r2, [r3, #32] } /* Write remaining Data to Buffer */ /* Set the Double buffer counter for pma buffer1 */ PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len); 8004c1e: 68bb ldr r3, [r7, #8] 8004c20: 785b ldrb r3, [r3, #1] 8004c22: 2b00 cmp r3, #0 8004c24: d165 bne.n 8004cf2 8004c26: 68fb ldr r3, [r7, #12] 8004c28: 681b ldr r3, [r3, #0] 8004c2a: 63fb str r3, [r7, #60] @ 0x3c 8004c2c: 68fb ldr r3, [r7, #12] 8004c2e: 681b ldr r3, [r3, #0] 8004c30: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004c34: b29b uxth r3, r3 8004c36: 461a mov r2, r3 8004c38: 6bfb ldr r3, [r7, #60] @ 0x3c 8004c3a: 4413 add r3, r2 8004c3c: 63fb str r3, [r7, #60] @ 0x3c 8004c3e: 68bb ldr r3, [r7, #8] 8004c40: 781b ldrb r3, [r3, #0] 8004c42: 011a lsls r2, r3, #4 8004c44: 6bfb ldr r3, [r7, #60] @ 0x3c 8004c46: 4413 add r3, r2 8004c48: f203 4304 addw r3, r3, #1028 @ 0x404 8004c4c: 63bb str r3, [r7, #56] @ 0x38 8004c4e: 6bbb ldr r3, [r7, #56] @ 0x38 8004c50: 881b ldrh r3, [r3, #0] 8004c52: b29b uxth r3, r3 8004c54: f3c3 0309 ubfx r3, r3, #0, #10 8004c58: b29a uxth r2, r3 8004c5a: 6bbb ldr r3, [r7, #56] @ 0x38 8004c5c: 801a strh r2, [r3, #0] 8004c5e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004c62: 2b3e cmp r3, #62 @ 0x3e 8004c64: d91d bls.n 8004ca2 8004c66: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004c6a: 095b lsrs r3, r3, #5 8004c6c: 64bb str r3, [r7, #72] @ 0x48 8004c6e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004c72: f003 031f and.w r3, r3, #31 8004c76: 2b00 cmp r3, #0 8004c78: d102 bne.n 8004c80 8004c7a: 6cbb ldr r3, [r7, #72] @ 0x48 8004c7c: 3b01 subs r3, #1 8004c7e: 64bb str r3, [r7, #72] @ 0x48 8004c80: 6bbb ldr r3, [r7, #56] @ 0x38 8004c82: 881b ldrh r3, [r3, #0] 8004c84: b29a uxth r2, r3 8004c86: 6cbb ldr r3, [r7, #72] @ 0x48 8004c88: b29b uxth r3, r3 8004c8a: 029b lsls r3, r3, #10 8004c8c: b29b uxth r3, r3 8004c8e: 4313 orrs r3, r2 8004c90: b29b uxth r3, r3 8004c92: ea6f 4343 mvn.w r3, r3, lsl #17 8004c96: ea6f 4353 mvn.w r3, r3, lsr #17 8004c9a: b29a uxth r2, r3 8004c9c: 6bbb ldr r3, [r7, #56] @ 0x38 8004c9e: 801a strh r2, [r3, #0] 8004ca0: e044 b.n 8004d2c 8004ca2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004ca6: 2b00 cmp r3, #0 8004ca8: d10a bne.n 8004cc0 8004caa: 6bbb ldr r3, [r7, #56] @ 0x38 8004cac: 881b ldrh r3, [r3, #0] 8004cae: b29b uxth r3, r3 8004cb0: ea6f 4343 mvn.w r3, r3, lsl #17 8004cb4: ea6f 4353 mvn.w r3, r3, lsr #17 8004cb8: b29a uxth r2, r3 8004cba: 6bbb ldr r3, [r7, #56] @ 0x38 8004cbc: 801a strh r2, [r3, #0] 8004cbe: e035 b.n 8004d2c 8004cc0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004cc4: 085b lsrs r3, r3, #1 8004cc6: 64bb str r3, [r7, #72] @ 0x48 8004cc8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004ccc: f003 0301 and.w r3, r3, #1 8004cd0: 2b00 cmp r3, #0 8004cd2: d002 beq.n 8004cda 8004cd4: 6cbb ldr r3, [r7, #72] @ 0x48 8004cd6: 3301 adds r3, #1 8004cd8: 64bb str r3, [r7, #72] @ 0x48 8004cda: 6bbb ldr r3, [r7, #56] @ 0x38 8004cdc: 881b ldrh r3, [r3, #0] 8004cde: b29a uxth r2, r3 8004ce0: 6cbb ldr r3, [r7, #72] @ 0x48 8004ce2: b29b uxth r3, r3 8004ce4: 029b lsls r3, r3, #10 8004ce6: b29b uxth r3, r3 8004ce8: 4313 orrs r3, r2 8004cea: b29a uxth r2, r3 8004cec: 6bbb ldr r3, [r7, #56] @ 0x38 8004cee: 801a strh r2, [r3, #0] 8004cf0: e01c b.n 8004d2c 8004cf2: 68bb ldr r3, [r7, #8] 8004cf4: 785b ldrb r3, [r3, #1] 8004cf6: 2b01 cmp r3, #1 8004cf8: d118 bne.n 8004d2c 8004cfa: 68fb ldr r3, [r7, #12] 8004cfc: 681b ldr r3, [r3, #0] 8004cfe: 647b str r3, [r7, #68] @ 0x44 8004d00: 68fb ldr r3, [r7, #12] 8004d02: 681b ldr r3, [r3, #0] 8004d04: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004d08: b29b uxth r3, r3 8004d0a: 461a mov r2, r3 8004d0c: 6c7b ldr r3, [r7, #68] @ 0x44 8004d0e: 4413 add r3, r2 8004d10: 647b str r3, [r7, #68] @ 0x44 8004d12: 68bb ldr r3, [r7, #8] 8004d14: 781b ldrb r3, [r3, #0] 8004d16: 011a lsls r2, r3, #4 8004d18: 6c7b ldr r3, [r7, #68] @ 0x44 8004d1a: 4413 add r3, r2 8004d1c: f203 4304 addw r3, r3, #1028 @ 0x404 8004d20: 643b str r3, [r7, #64] @ 0x40 8004d22: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004d26: b29a uxth r2, r3 8004d28: 6c3b ldr r3, [r7, #64] @ 0x40 8004d2a: 801a strh r2, [r3, #0] /* Copy user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len); 8004d2c: 68fb ldr r3, [r7, #12] 8004d2e: 6818 ldr r0, [r3, #0] 8004d30: 68bb ldr r3, [r7, #8] 8004d32: 6959 ldr r1, [r3, #20] 8004d34: 68bb ldr r3, [r7, #8] 8004d36: 891a ldrh r2, [r3, #8] 8004d38: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004d3c: b29b uxth r3, r3 8004d3e: f004 f966 bl 800900e 8004d42: e1e2 b.n 800510a } } else /* Data Buffer1 ACK received */ { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8004d44: 68fb ldr r3, [r7, #12] 8004d46: 681b ldr r3, [r3, #0] 8004d48: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004d4c: b29b uxth r3, r3 8004d4e: 461a mov r2, r3 8004d50: 68bb ldr r3, [r7, #8] 8004d52: 781b ldrb r3, [r3, #0] 8004d54: 00db lsls r3, r3, #3 8004d56: 4413 add r3, r2 8004d58: 3306 adds r3, #6 8004d5a: 005b lsls r3, r3, #1 8004d5c: 68fa ldr r2, [r7, #12] 8004d5e: 6812 ldr r2, [r2, #0] 8004d60: 4413 add r3, r2 8004d62: f503 6380 add.w r3, r3, #1024 @ 0x400 8004d66: 881b ldrh r3, [r3, #0] 8004d68: f3c3 0309 ubfx r3, r3, #0, #10 8004d6c: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len >= TxPctSize) 8004d70: 68bb ldr r3, [r7, #8] 8004d72: 699a ldr r2, [r3, #24] 8004d74: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004d78: 429a cmp r2, r3 8004d7a: d307 bcc.n 8004d8c { ep->xfer_len -= TxPctSize; 8004d7c: 68bb ldr r3, [r7, #8] 8004d7e: 699a ldr r2, [r3, #24] 8004d80: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004d84: 1ad2 subs r2, r2, r3 8004d86: 68bb ldr r3, [r7, #8] 8004d88: 619a str r2, [r3, #24] 8004d8a: e002 b.n 8004d92 } else { ep->xfer_len = 0U; 8004d8c: 68bb ldr r3, [r7, #8] 8004d8e: 2200 movs r2, #0 8004d90: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 8004d92: 68bb ldr r3, [r7, #8] 8004d94: 699b ldr r3, [r3, #24] 8004d96: 2b00 cmp r3, #0 8004d98: f040 80c0 bne.w 8004f1c { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8004d9c: 68bb ldr r3, [r7, #8] 8004d9e: 785b ldrb r3, [r3, #1] 8004da0: 2b00 cmp r3, #0 8004da2: d126 bne.n 8004df2 8004da4: 68fb ldr r3, [r7, #12] 8004da6: 681b ldr r3, [r3, #0] 8004da8: 67fb str r3, [r7, #124] @ 0x7c 8004daa: 68fb ldr r3, [r7, #12] 8004dac: 681b ldr r3, [r3, #0] 8004dae: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004db2: b29b uxth r3, r3 8004db4: 461a mov r2, r3 8004db6: 6ffb ldr r3, [r7, #124] @ 0x7c 8004db8: 4413 add r3, r2 8004dba: 67fb str r3, [r7, #124] @ 0x7c 8004dbc: 68bb ldr r3, [r7, #8] 8004dbe: 781b ldrb r3, [r3, #0] 8004dc0: 011a lsls r2, r3, #4 8004dc2: 6ffb ldr r3, [r7, #124] @ 0x7c 8004dc4: 4413 add r3, r2 8004dc6: f203 4304 addw r3, r3, #1028 @ 0x404 8004dca: 67bb str r3, [r7, #120] @ 0x78 8004dcc: 6fbb ldr r3, [r7, #120] @ 0x78 8004dce: 881b ldrh r3, [r3, #0] 8004dd0: b29b uxth r3, r3 8004dd2: f3c3 0309 ubfx r3, r3, #0, #10 8004dd6: b29a uxth r2, r3 8004dd8: 6fbb ldr r3, [r7, #120] @ 0x78 8004dda: 801a strh r2, [r3, #0] 8004ddc: 6fbb ldr r3, [r7, #120] @ 0x78 8004dde: 881b ldrh r3, [r3, #0] 8004de0: b29b uxth r3, r3 8004de2: ea6f 4343 mvn.w r3, r3, lsl #17 8004de6: ea6f 4353 mvn.w r3, r3, lsr #17 8004dea: b29a uxth r2, r3 8004dec: 6fbb ldr r3, [r7, #120] @ 0x78 8004dee: 801a strh r2, [r3, #0] 8004df0: e01a b.n 8004e28 8004df2: 68bb ldr r3, [r7, #8] 8004df4: 785b ldrb r3, [r3, #1] 8004df6: 2b01 cmp r3, #1 8004df8: d116 bne.n 8004e28 8004dfa: 68fb ldr r3, [r7, #12] 8004dfc: 681b ldr r3, [r3, #0] 8004dfe: 667b str r3, [r7, #100] @ 0x64 8004e00: 68fb ldr r3, [r7, #12] 8004e02: 681b ldr r3, [r3, #0] 8004e04: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004e08: b29b uxth r3, r3 8004e0a: 461a mov r2, r3 8004e0c: 6e7b ldr r3, [r7, #100] @ 0x64 8004e0e: 4413 add r3, r2 8004e10: 667b str r3, [r7, #100] @ 0x64 8004e12: 68bb ldr r3, [r7, #8] 8004e14: 781b ldrb r3, [r3, #0] 8004e16: 011a lsls r2, r3, #4 8004e18: 6e7b ldr r3, [r7, #100] @ 0x64 8004e1a: 4413 add r3, r2 8004e1c: f203 4304 addw r3, r3, #1028 @ 0x404 8004e20: 663b str r3, [r7, #96] @ 0x60 8004e22: 6e3b ldr r3, [r7, #96] @ 0x60 8004e24: 2200 movs r2, #0 8004e26: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8004e28: 68fb ldr r3, [r7, #12] 8004e2a: 681b ldr r3, [r3, #0] 8004e2c: 677b str r3, [r7, #116] @ 0x74 8004e2e: 68bb ldr r3, [r7, #8] 8004e30: 785b ldrb r3, [r3, #1] 8004e32: 2b00 cmp r3, #0 8004e34: d12b bne.n 8004e8e 8004e36: 68fb ldr r3, [r7, #12] 8004e38: 681b ldr r3, [r3, #0] 8004e3a: 66fb str r3, [r7, #108] @ 0x6c 8004e3c: 68fb ldr r3, [r7, #12] 8004e3e: 681b ldr r3, [r3, #0] 8004e40: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004e44: b29b uxth r3, r3 8004e46: 461a mov r2, r3 8004e48: 6efb ldr r3, [r7, #108] @ 0x6c 8004e4a: 4413 add r3, r2 8004e4c: 66fb str r3, [r7, #108] @ 0x6c 8004e4e: 68bb ldr r3, [r7, #8] 8004e50: 781b ldrb r3, [r3, #0] 8004e52: 011a lsls r2, r3, #4 8004e54: 6efb ldr r3, [r7, #108] @ 0x6c 8004e56: 4413 add r3, r2 8004e58: f203 430c addw r3, r3, #1036 @ 0x40c 8004e5c: f8c7 3080 str.w r3, [r7, #128] @ 0x80 8004e60: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8004e64: 881b ldrh r3, [r3, #0] 8004e66: b29b uxth r3, r3 8004e68: f3c3 0309 ubfx r3, r3, #0, #10 8004e6c: b29a uxth r2, r3 8004e6e: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8004e72: 801a strh r2, [r3, #0] 8004e74: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8004e78: 881b ldrh r3, [r3, #0] 8004e7a: b29b uxth r3, r3 8004e7c: ea6f 4343 mvn.w r3, r3, lsl #17 8004e80: ea6f 4353 mvn.w r3, r3, lsr #17 8004e84: b29a uxth r2, r3 8004e86: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8004e8a: 801a strh r2, [r3, #0] 8004e8c: e017 b.n 8004ebe 8004e8e: 68bb ldr r3, [r7, #8] 8004e90: 785b ldrb r3, [r3, #1] 8004e92: 2b01 cmp r3, #1 8004e94: d113 bne.n 8004ebe 8004e96: 68fb ldr r3, [r7, #12] 8004e98: 681b ldr r3, [r3, #0] 8004e9a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004e9e: b29b uxth r3, r3 8004ea0: 461a mov r2, r3 8004ea2: 6f7b ldr r3, [r7, #116] @ 0x74 8004ea4: 4413 add r3, r2 8004ea6: 677b str r3, [r7, #116] @ 0x74 8004ea8: 68bb ldr r3, [r7, #8] 8004eaa: 781b ldrb r3, [r3, #0] 8004eac: 011a lsls r2, r3, #4 8004eae: 6f7b ldr r3, [r7, #116] @ 0x74 8004eb0: 4413 add r3, r2 8004eb2: f203 430c addw r3, r3, #1036 @ 0x40c 8004eb6: 673b str r3, [r7, #112] @ 0x70 8004eb8: 6f3b ldr r3, [r7, #112] @ 0x70 8004eba: 2200 movs r2, #0 8004ebc: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8004ebe: 68bb ldr r3, [r7, #8] 8004ec0: 781b ldrb r3, [r3, #0] 8004ec2: 4619 mov r1, r3 8004ec4: 68f8 ldr r0, [r7, #12] 8004ec6: f005 ff66 bl 800ad96 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8004eca: 88fb ldrh r3, [r7, #6] 8004ecc: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004ed0: 2b00 cmp r3, #0 8004ed2: f040 811a bne.w 800510a { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8004ed6: 68fb ldr r3, [r7, #12] 8004ed8: 681b ldr r3, [r3, #0] 8004eda: 461a mov r2, r3 8004edc: 68bb ldr r3, [r7, #8] 8004ede: 781b ldrb r3, [r3, #0] 8004ee0: 009b lsls r3, r3, #2 8004ee2: 4413 add r3, r2 8004ee4: 881b ldrh r3, [r3, #0] 8004ee6: b29b uxth r3, r3 8004ee8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004eec: f023 0370 bic.w r3, r3, #112 @ 0x70 8004ef0: f8a7 3088 strh.w r3, [r7, #136] @ 0x88 8004ef4: 68fb ldr r3, [r7, #12] 8004ef6: 681b ldr r3, [r3, #0] 8004ef8: 461a mov r2, r3 8004efa: 68bb ldr r3, [r7, #8] 8004efc: 781b ldrb r3, [r3, #0] 8004efe: 009b lsls r3, r3, #2 8004f00: 441a add r2, r3 8004f02: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88 8004f06: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004f0a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004f0e: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8004f12: f043 0380 orr.w r3, r3, #128 @ 0x80 8004f16: b29b uxth r3, r3 8004f18: 8013 strh r3, [r2, #0] 8004f1a: e0f6 b.n 800510a } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8004f1c: 88fb ldrh r3, [r7, #6] 8004f1e: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004f22: 2b00 cmp r3, #0 8004f24: d121 bne.n 8004f6a { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8004f26: 68fb ldr r3, [r7, #12] 8004f28: 681b ldr r3, [r3, #0] 8004f2a: 461a mov r2, r3 8004f2c: 68bb ldr r3, [r7, #8] 8004f2e: 781b ldrb r3, [r3, #0] 8004f30: 009b lsls r3, r3, #2 8004f32: 4413 add r3, r2 8004f34: 881b ldrh r3, [r3, #0] 8004f36: b29b uxth r3, r3 8004f38: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004f3c: f023 0370 bic.w r3, r3, #112 @ 0x70 8004f40: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 8004f44: 68fb ldr r3, [r7, #12] 8004f46: 681b ldr r3, [r3, #0] 8004f48: 461a mov r2, r3 8004f4a: 68bb ldr r3, [r7, #8] 8004f4c: 781b ldrb r3, [r3, #0] 8004f4e: 009b lsls r3, r3, #2 8004f50: 441a add r2, r3 8004f52: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8004f56: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004f5a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004f5e: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8004f62: f043 0380 orr.w r3, r3, #128 @ 0x80 8004f66: b29b uxth r3, r3 8004f68: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 8004f6a: 68bb ldr r3, [r7, #8] 8004f6c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8004f70: 2b01 cmp r3, #1 8004f72: f040 80ca bne.w 800510a { ep->xfer_buff += TxPctSize; 8004f76: 68bb ldr r3, [r7, #8] 8004f78: 695a ldr r2, [r3, #20] 8004f7a: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004f7e: 441a add r2, r3 8004f80: 68bb ldr r3, [r7, #8] 8004f82: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8004f84: 68bb ldr r3, [r7, #8] 8004f86: 69da ldr r2, [r3, #28] 8004f88: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004f8c: 441a add r2, r3 8004f8e: 68bb ldr r3, [r7, #8] 8004f90: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8004f92: 68bb ldr r3, [r7, #8] 8004f94: 6a1a ldr r2, [r3, #32] 8004f96: 68bb ldr r3, [r7, #8] 8004f98: 691b ldr r3, [r3, #16] 8004f9a: 429a cmp r2, r3 8004f9c: d30b bcc.n 8004fb6 { len = ep->maxpacket; 8004f9e: 68bb ldr r3, [r7, #8] 8004fa0: 691b ldr r3, [r3, #16] 8004fa2: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 8004fa6: 68bb ldr r3, [r7, #8] 8004fa8: 6a1a ldr r2, [r3, #32] 8004faa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8004fae: 1ad2 subs r2, r2, r3 8004fb0: 68bb ldr r3, [r7, #8] 8004fb2: 621a str r2, [r3, #32] 8004fb4: e017 b.n 8004fe6 } else if (ep->xfer_len_db == 0U) 8004fb6: 68bb ldr r3, [r7, #8] 8004fb8: 6a1b ldr r3, [r3, #32] 8004fba: 2b00 cmp r3, #0 8004fbc: d108 bne.n 8004fd0 { len = TxPctSize; 8004fbe: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004fc2: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 8004fc6: 68bb ldr r3, [r7, #8] 8004fc8: 2200 movs r2, #0 8004fca: f883 2024 strb.w r2, [r3, #36] @ 0x24 8004fce: e00a b.n 8004fe6 } else { len = ep->xfer_len_db; 8004fd0: 68bb ldr r3, [r7, #8] 8004fd2: 6a1b ldr r3, [r3, #32] 8004fd4: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8004fd8: 68bb ldr r3, [r7, #8] 8004fda: 2200 movs r2, #0 8004fdc: 621a str r2, [r3, #32] ep->xfer_fill_db = 0; 8004fde: 68bb ldr r3, [r7, #8] 8004fe0: 2200 movs r2, #0 8004fe2: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len); 8004fe6: 68fb ldr r3, [r7, #12] 8004fe8: 681b ldr r3, [r3, #0] 8004fea: 657b str r3, [r7, #84] @ 0x54 8004fec: 68bb ldr r3, [r7, #8] 8004fee: 785b ldrb r3, [r3, #1] 8004ff0: 2b00 cmp r3, #0 8004ff2: d165 bne.n 80050c0 8004ff4: 68fb ldr r3, [r7, #12] 8004ff6: 681b ldr r3, [r3, #0] 8004ff8: 65fb str r3, [r7, #92] @ 0x5c 8004ffa: 68fb ldr r3, [r7, #12] 8004ffc: 681b ldr r3, [r3, #0] 8004ffe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8005002: b29b uxth r3, r3 8005004: 461a mov r2, r3 8005006: 6dfb ldr r3, [r7, #92] @ 0x5c 8005008: 4413 add r3, r2 800500a: 65fb str r3, [r7, #92] @ 0x5c 800500c: 68bb ldr r3, [r7, #8] 800500e: 781b ldrb r3, [r3, #0] 8005010: 011a lsls r2, r3, #4 8005012: 6dfb ldr r3, [r7, #92] @ 0x5c 8005014: 4413 add r3, r2 8005016: f203 430c addw r3, r3, #1036 @ 0x40c 800501a: 65bb str r3, [r7, #88] @ 0x58 800501c: 6dbb ldr r3, [r7, #88] @ 0x58 800501e: 881b ldrh r3, [r3, #0] 8005020: b29b uxth r3, r3 8005022: f3c3 0309 ubfx r3, r3, #0, #10 8005026: b29a uxth r2, r3 8005028: 6dbb ldr r3, [r7, #88] @ 0x58 800502a: 801a strh r2, [r3, #0] 800502c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005030: 2b3e cmp r3, #62 @ 0x3e 8005032: d91d bls.n 8005070 8005034: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005038: 095b lsrs r3, r3, #5 800503a: 66bb str r3, [r7, #104] @ 0x68 800503c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005040: f003 031f and.w r3, r3, #31 8005044: 2b00 cmp r3, #0 8005046: d102 bne.n 800504e 8005048: 6ebb ldr r3, [r7, #104] @ 0x68 800504a: 3b01 subs r3, #1 800504c: 66bb str r3, [r7, #104] @ 0x68 800504e: 6dbb ldr r3, [r7, #88] @ 0x58 8005050: 881b ldrh r3, [r3, #0] 8005052: b29a uxth r2, r3 8005054: 6ebb ldr r3, [r7, #104] @ 0x68 8005056: b29b uxth r3, r3 8005058: 029b lsls r3, r3, #10 800505a: b29b uxth r3, r3 800505c: 4313 orrs r3, r2 800505e: b29b uxth r3, r3 8005060: ea6f 4343 mvn.w r3, r3, lsl #17 8005064: ea6f 4353 mvn.w r3, r3, lsr #17 8005068: b29a uxth r2, r3 800506a: 6dbb ldr r3, [r7, #88] @ 0x58 800506c: 801a strh r2, [r3, #0] 800506e: e041 b.n 80050f4 8005070: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005074: 2b00 cmp r3, #0 8005076: d10a bne.n 800508e 8005078: 6dbb ldr r3, [r7, #88] @ 0x58 800507a: 881b ldrh r3, [r3, #0] 800507c: b29b uxth r3, r3 800507e: ea6f 4343 mvn.w r3, r3, lsl #17 8005082: ea6f 4353 mvn.w r3, r3, lsr #17 8005086: b29a uxth r2, r3 8005088: 6dbb ldr r3, [r7, #88] @ 0x58 800508a: 801a strh r2, [r3, #0] 800508c: e032 b.n 80050f4 800508e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005092: 085b lsrs r3, r3, #1 8005094: 66bb str r3, [r7, #104] @ 0x68 8005096: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800509a: f003 0301 and.w r3, r3, #1 800509e: 2b00 cmp r3, #0 80050a0: d002 beq.n 80050a8 80050a2: 6ebb ldr r3, [r7, #104] @ 0x68 80050a4: 3301 adds r3, #1 80050a6: 66bb str r3, [r7, #104] @ 0x68 80050a8: 6dbb ldr r3, [r7, #88] @ 0x58 80050aa: 881b ldrh r3, [r3, #0] 80050ac: b29a uxth r2, r3 80050ae: 6ebb ldr r3, [r7, #104] @ 0x68 80050b0: b29b uxth r3, r3 80050b2: 029b lsls r3, r3, #10 80050b4: b29b uxth r3, r3 80050b6: 4313 orrs r3, r2 80050b8: b29a uxth r2, r3 80050ba: 6dbb ldr r3, [r7, #88] @ 0x58 80050bc: 801a strh r2, [r3, #0] 80050be: e019 b.n 80050f4 80050c0: 68bb ldr r3, [r7, #8] 80050c2: 785b ldrb r3, [r3, #1] 80050c4: 2b01 cmp r3, #1 80050c6: d115 bne.n 80050f4 80050c8: 68fb ldr r3, [r7, #12] 80050ca: 681b ldr r3, [r3, #0] 80050cc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80050d0: b29b uxth r3, r3 80050d2: 461a mov r2, r3 80050d4: 6d7b ldr r3, [r7, #84] @ 0x54 80050d6: 4413 add r3, r2 80050d8: 657b str r3, [r7, #84] @ 0x54 80050da: 68bb ldr r3, [r7, #8] 80050dc: 781b ldrb r3, [r3, #0] 80050de: 011a lsls r2, r3, #4 80050e0: 6d7b ldr r3, [r7, #84] @ 0x54 80050e2: 4413 add r3, r2 80050e4: f203 430c addw r3, r3, #1036 @ 0x40c 80050e8: 653b str r3, [r7, #80] @ 0x50 80050ea: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80050ee: b29a uxth r2, r3 80050f0: 6d3b ldr r3, [r7, #80] @ 0x50 80050f2: 801a strh r2, [r3, #0] /* Copy the user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len); 80050f4: 68fb ldr r3, [r7, #12] 80050f6: 6818 ldr r0, [r3, #0] 80050f8: 68bb ldr r3, [r7, #8] 80050fa: 6959 ldr r1, [r3, #20] 80050fc: 68bb ldr r3, [r7, #8] 80050fe: 895a ldrh r2, [r3, #10] 8005100: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005104: b29b uxth r3, r3 8005106: f003 ff82 bl 800900e } } } /*enable endpoint IN*/ PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID); 800510a: 68fb ldr r3, [r7, #12] 800510c: 681b ldr r3, [r3, #0] 800510e: 461a mov r2, r3 8005110: 68bb ldr r3, [r7, #8] 8005112: 781b ldrb r3, [r3, #0] 8005114: 009b lsls r3, r3, #2 8005116: 4413 add r3, r2 8005118: 881b ldrh r3, [r3, #0] 800511a: b29b uxth r3, r3 800511c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8005120: f023 0340 bic.w r3, r3, #64 @ 0x40 8005124: 82bb strh r3, [r7, #20] 8005126: 8abb ldrh r3, [r7, #20] 8005128: f083 0310 eor.w r3, r3, #16 800512c: 82bb strh r3, [r7, #20] 800512e: 8abb ldrh r3, [r7, #20] 8005130: f083 0320 eor.w r3, r3, #32 8005134: 82bb strh r3, [r7, #20] 8005136: 68fb ldr r3, [r7, #12] 8005138: 681b ldr r3, [r3, #0] 800513a: 461a mov r2, r3 800513c: 68bb ldr r3, [r7, #8] 800513e: 781b ldrb r3, [r3, #0] 8005140: 009b lsls r3, r3, #2 8005142: 441a add r2, r3 8005144: 8abb ldrh r3, [r7, #20] 8005146: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800514a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800514e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8005152: f043 0380 orr.w r3, r3, #128 @ 0x80 8005156: b29b uxth r3, r3 8005158: 8013 strh r3, [r2, #0] return HAL_OK; 800515a: 2300 movs r3, #0 } 800515c: 4618 mov r0, r3 800515e: 3790 adds r7, #144 @ 0x90 8005160: 46bd mov sp, r7 8005162: bd80 pop {r7, pc} 08005164 : * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, uint16_t ep_kind, uint32_t pmaadress) { 8005164: b480 push {r7} 8005166: b087 sub sp, #28 8005168: af00 add r7, sp, #0 800516a: 60f8 str r0, [r7, #12] 800516c: 607b str r3, [r7, #4] 800516e: 460b mov r3, r1 8005170: 817b strh r3, [r7, #10] 8005172: 4613 mov r3, r2 8005174: 813b strh r3, [r7, #8] PCD_EPTypeDef *ep; /* initialize ep structure*/ if ((0x80U & ep_addr) == 0x80U) 8005176: 897b ldrh r3, [r7, #10] 8005178: f003 0380 and.w r3, r3, #128 @ 0x80 800517c: b29b uxth r3, r3 800517e: 2b00 cmp r3, #0 8005180: d00b beq.n 800519a { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005182: 897b ldrh r3, [r7, #10] 8005184: f003 0207 and.w r2, r3, #7 8005188: 4613 mov r3, r2 800518a: 009b lsls r3, r3, #2 800518c: 4413 add r3, r2 800518e: 00db lsls r3, r3, #3 8005190: 3310 adds r3, #16 8005192: 68fa ldr r2, [r7, #12] 8005194: 4413 add r3, r2 8005196: 617b str r3, [r7, #20] 8005198: e009 b.n 80051ae } else { ep = &hpcd->OUT_ep[ep_addr]; 800519a: 897a ldrh r2, [r7, #10] 800519c: 4613 mov r3, r2 800519e: 009b lsls r3, r3, #2 80051a0: 4413 add r3, r2 80051a2: 00db lsls r3, r3, #3 80051a4: f503 73a8 add.w r3, r3, #336 @ 0x150 80051a8: 68fa ldr r2, [r7, #12] 80051aa: 4413 add r3, r2 80051ac: 617b str r3, [r7, #20] } /* Here we check if the endpoint is single or double Buffer*/ if (ep_kind == PCD_SNG_BUF) 80051ae: 893b ldrh r3, [r7, #8] 80051b0: 2b00 cmp r3, #0 80051b2: d107 bne.n 80051c4 { /* Single Buffer */ ep->doublebuffer = 0U; 80051b4: 697b ldr r3, [r7, #20] 80051b6: 2200 movs r2, #0 80051b8: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaadress = (uint16_t)pmaadress; 80051ba: 687b ldr r3, [r7, #4] 80051bc: b29a uxth r2, r3 80051be: 697b ldr r3, [r7, #20] 80051c0: 80da strh r2, [r3, #6] 80051c2: e00b b.n 80051dc } #if (USE_USB_DOUBLE_BUFFER == 1U) else /* USB_DBL_BUF */ { /* Double Buffer Endpoint */ ep->doublebuffer = 1U; 80051c4: 697b ldr r3, [r7, #20] 80051c6: 2201 movs r2, #1 80051c8: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 80051ca: 687b ldr r3, [r7, #4] 80051cc: b29a uxth r2, r3 80051ce: 697b ldr r3, [r7, #20] 80051d0: 811a strh r2, [r3, #8] ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 80051d2: 687b ldr r3, [r7, #4] 80051d4: 0c1b lsrs r3, r3, #16 80051d6: b29a uxth r2, r3 80051d8: 697b ldr r3, [r7, #20] 80051da: 815a strh r2, [r3, #10] } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 80051dc: 2300 movs r3, #0 } 80051de: 4618 mov r0, r3 80051e0: 371c adds r7, #28 80051e2: 46bd mov sp, r7 80051e4: bc80 pop {r7} 80051e6: 4770 bx lr 080051e8 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 80051e8: b580 push {r7, lr} 80051ea: b086 sub sp, #24 80051ec: af00 add r7, sp, #0 80051ee: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 80051f0: 687b ldr r3, [r7, #4] 80051f2: 2b00 cmp r3, #0 80051f4: d101 bne.n 80051fa { return HAL_ERROR; 80051f6: 2301 movs r3, #1 80051f8: e272 b.n 80056e0 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80051fa: 687b ldr r3, [r7, #4] 80051fc: 681b ldr r3, [r3, #0] 80051fe: f003 0301 and.w r3, r3, #1 8005202: 2b00 cmp r3, #0 8005204: f000 8087 beq.w 8005316 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8005208: 4b92 ldr r3, [pc, #584] @ (8005454 ) 800520a: 685b ldr r3, [r3, #4] 800520c: f003 030c and.w r3, r3, #12 8005210: 2b04 cmp r3, #4 8005212: d00c beq.n 800522e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8005214: 4b8f ldr r3, [pc, #572] @ (8005454 ) 8005216: 685b ldr r3, [r3, #4] 8005218: f003 030c and.w r3, r3, #12 800521c: 2b08 cmp r3, #8 800521e: d112 bne.n 8005246 8005220: 4b8c ldr r3, [pc, #560] @ (8005454 ) 8005222: 685b ldr r3, [r3, #4] 8005224: f403 3380 and.w r3, r3, #65536 @ 0x10000 8005228: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800522c: d10b bne.n 8005246 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800522e: 4b89 ldr r3, [pc, #548] @ (8005454 ) 8005230: 681b ldr r3, [r3, #0] 8005232: f403 3300 and.w r3, r3, #131072 @ 0x20000 8005236: 2b00 cmp r3, #0 8005238: d06c beq.n 8005314 800523a: 687b ldr r3, [r7, #4] 800523c: 685b ldr r3, [r3, #4] 800523e: 2b00 cmp r3, #0 8005240: d168 bne.n 8005314 { return HAL_ERROR; 8005242: 2301 movs r3, #1 8005244: e24c b.n 80056e0 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8005246: 687b ldr r3, [r7, #4] 8005248: 685b ldr r3, [r3, #4] 800524a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800524e: d106 bne.n 800525e 8005250: 4b80 ldr r3, [pc, #512] @ (8005454 ) 8005252: 681b ldr r3, [r3, #0] 8005254: 4a7f ldr r2, [pc, #508] @ (8005454 ) 8005256: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800525a: 6013 str r3, [r2, #0] 800525c: e02e b.n 80052bc 800525e: 687b ldr r3, [r7, #4] 8005260: 685b ldr r3, [r3, #4] 8005262: 2b00 cmp r3, #0 8005264: d10c bne.n 8005280 8005266: 4b7b ldr r3, [pc, #492] @ (8005454 ) 8005268: 681b ldr r3, [r3, #0] 800526a: 4a7a ldr r2, [pc, #488] @ (8005454 ) 800526c: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8005270: 6013 str r3, [r2, #0] 8005272: 4b78 ldr r3, [pc, #480] @ (8005454 ) 8005274: 681b ldr r3, [r3, #0] 8005276: 4a77 ldr r2, [pc, #476] @ (8005454 ) 8005278: f423 2380 bic.w r3, r3, #262144 @ 0x40000 800527c: 6013 str r3, [r2, #0] 800527e: e01d b.n 80052bc 8005280: 687b ldr r3, [r7, #4] 8005282: 685b ldr r3, [r3, #4] 8005284: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8005288: d10c bne.n 80052a4 800528a: 4b72 ldr r3, [pc, #456] @ (8005454 ) 800528c: 681b ldr r3, [r3, #0] 800528e: 4a71 ldr r2, [pc, #452] @ (8005454 ) 8005290: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8005294: 6013 str r3, [r2, #0] 8005296: 4b6f ldr r3, [pc, #444] @ (8005454 ) 8005298: 681b ldr r3, [r3, #0] 800529a: 4a6e ldr r2, [pc, #440] @ (8005454 ) 800529c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80052a0: 6013 str r3, [r2, #0] 80052a2: e00b b.n 80052bc 80052a4: 4b6b ldr r3, [pc, #428] @ (8005454 ) 80052a6: 681b ldr r3, [r3, #0] 80052a8: 4a6a ldr r2, [pc, #424] @ (8005454 ) 80052aa: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80052ae: 6013 str r3, [r2, #0] 80052b0: 4b68 ldr r3, [pc, #416] @ (8005454 ) 80052b2: 681b ldr r3, [r3, #0] 80052b4: 4a67 ldr r2, [pc, #412] @ (8005454 ) 80052b6: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80052ba: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 80052bc: 687b ldr r3, [r7, #4] 80052be: 685b ldr r3, [r3, #4] 80052c0: 2b00 cmp r3, #0 80052c2: d013 beq.n 80052ec { /* Get Start Tick */ tickstart = HAL_GetTick(); 80052c4: f7fc ff8c bl 80021e0 80052c8: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80052ca: e008 b.n 80052de { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 80052cc: f7fc ff88 bl 80021e0 80052d0: 4602 mov r2, r0 80052d2: 693b ldr r3, [r7, #16] 80052d4: 1ad3 subs r3, r2, r3 80052d6: 2b64 cmp r3, #100 @ 0x64 80052d8: d901 bls.n 80052de { return HAL_TIMEOUT; 80052da: 2303 movs r3, #3 80052dc: e200 b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80052de: 4b5d ldr r3, [pc, #372] @ (8005454 ) 80052e0: 681b ldr r3, [r3, #0] 80052e2: f403 3300 and.w r3, r3, #131072 @ 0x20000 80052e6: 2b00 cmp r3, #0 80052e8: d0f0 beq.n 80052cc 80052ea: e014 b.n 8005316 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80052ec: f7fc ff78 bl 80021e0 80052f0: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 80052f2: e008 b.n 8005306 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 80052f4: f7fc ff74 bl 80021e0 80052f8: 4602 mov r2, r0 80052fa: 693b ldr r3, [r7, #16] 80052fc: 1ad3 subs r3, r2, r3 80052fe: 2b64 cmp r3, #100 @ 0x64 8005300: d901 bls.n 8005306 { return HAL_TIMEOUT; 8005302: 2303 movs r3, #3 8005304: e1ec b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8005306: 4b53 ldr r3, [pc, #332] @ (8005454 ) 8005308: 681b ldr r3, [r3, #0] 800530a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800530e: 2b00 cmp r3, #0 8005310: d1f0 bne.n 80052f4 8005312: e000 b.n 8005316 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8005314: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8005316: 687b ldr r3, [r7, #4] 8005318: 681b ldr r3, [r3, #0] 800531a: f003 0302 and.w r3, r3, #2 800531e: 2b00 cmp r3, #0 8005320: d063 beq.n 80053ea /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8005322: 4b4c ldr r3, [pc, #304] @ (8005454 ) 8005324: 685b ldr r3, [r3, #4] 8005326: f003 030c and.w r3, r3, #12 800532a: 2b00 cmp r3, #0 800532c: d00b beq.n 8005346 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 800532e: 4b49 ldr r3, [pc, #292] @ (8005454 ) 8005330: 685b ldr r3, [r3, #4] 8005332: f003 030c and.w r3, r3, #12 8005336: 2b08 cmp r3, #8 8005338: d11c bne.n 8005374 800533a: 4b46 ldr r3, [pc, #280] @ (8005454 ) 800533c: 685b ldr r3, [r3, #4] 800533e: f403 3380 and.w r3, r3, #65536 @ 0x10000 8005342: 2b00 cmp r3, #0 8005344: d116 bne.n 8005374 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8005346: 4b43 ldr r3, [pc, #268] @ (8005454 ) 8005348: 681b ldr r3, [r3, #0] 800534a: f003 0302 and.w r3, r3, #2 800534e: 2b00 cmp r3, #0 8005350: d005 beq.n 800535e 8005352: 687b ldr r3, [r7, #4] 8005354: 691b ldr r3, [r3, #16] 8005356: 2b01 cmp r3, #1 8005358: d001 beq.n 800535e { return HAL_ERROR; 800535a: 2301 movs r3, #1 800535c: e1c0 b.n 80056e0 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 800535e: 4b3d ldr r3, [pc, #244] @ (8005454 ) 8005360: 681b ldr r3, [r3, #0] 8005362: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8005366: 687b ldr r3, [r7, #4] 8005368: 695b ldr r3, [r3, #20] 800536a: 00db lsls r3, r3, #3 800536c: 4939 ldr r1, [pc, #228] @ (8005454 ) 800536e: 4313 orrs r3, r2 8005370: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8005372: e03a b.n 80053ea } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8005374: 687b ldr r3, [r7, #4] 8005376: 691b ldr r3, [r3, #16] 8005378: 2b00 cmp r3, #0 800537a: d020 beq.n 80053be { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 800537c: 4b36 ldr r3, [pc, #216] @ (8005458 ) 800537e: 2201 movs r2, #1 8005380: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005382: f7fc ff2d bl 80021e0 8005386: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8005388: e008 b.n 800539c { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 800538a: f7fc ff29 bl 80021e0 800538e: 4602 mov r2, r0 8005390: 693b ldr r3, [r7, #16] 8005392: 1ad3 subs r3, r2, r3 8005394: 2b02 cmp r3, #2 8005396: d901 bls.n 800539c { return HAL_TIMEOUT; 8005398: 2303 movs r3, #3 800539a: e1a1 b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800539c: 4b2d ldr r3, [pc, #180] @ (8005454 ) 800539e: 681b ldr r3, [r3, #0] 80053a0: f003 0302 and.w r3, r3, #2 80053a4: 2b00 cmp r3, #0 80053a6: d0f0 beq.n 800538a } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80053a8: 4b2a ldr r3, [pc, #168] @ (8005454 ) 80053aa: 681b ldr r3, [r3, #0] 80053ac: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80053b0: 687b ldr r3, [r7, #4] 80053b2: 695b ldr r3, [r3, #20] 80053b4: 00db lsls r3, r3, #3 80053b6: 4927 ldr r1, [pc, #156] @ (8005454 ) 80053b8: 4313 orrs r3, r2 80053ba: 600b str r3, [r1, #0] 80053bc: e015 b.n 80053ea } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80053be: 4b26 ldr r3, [pc, #152] @ (8005458 ) 80053c0: 2200 movs r2, #0 80053c2: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80053c4: f7fc ff0c bl 80021e0 80053c8: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80053ca: e008 b.n 80053de { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80053cc: f7fc ff08 bl 80021e0 80053d0: 4602 mov r2, r0 80053d2: 693b ldr r3, [r7, #16] 80053d4: 1ad3 subs r3, r2, r3 80053d6: 2b02 cmp r3, #2 80053d8: d901 bls.n 80053de { return HAL_TIMEOUT; 80053da: 2303 movs r3, #3 80053dc: e180 b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80053de: 4b1d ldr r3, [pc, #116] @ (8005454 ) 80053e0: 681b ldr r3, [r3, #0] 80053e2: f003 0302 and.w r3, r3, #2 80053e6: 2b00 cmp r3, #0 80053e8: d1f0 bne.n 80053cc } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 80053ea: 687b ldr r3, [r7, #4] 80053ec: 681b ldr r3, [r3, #0] 80053ee: f003 0308 and.w r3, r3, #8 80053f2: 2b00 cmp r3, #0 80053f4: d03a beq.n 800546c { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 80053f6: 687b ldr r3, [r7, #4] 80053f8: 699b ldr r3, [r3, #24] 80053fa: 2b00 cmp r3, #0 80053fc: d019 beq.n 8005432 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 80053fe: 4b17 ldr r3, [pc, #92] @ (800545c ) 8005400: 2201 movs r2, #1 8005402: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005404: f7fc feec bl 80021e0 8005408: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800540a: e008 b.n 800541e { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 800540c: f7fc fee8 bl 80021e0 8005410: 4602 mov r2, r0 8005412: 693b ldr r3, [r7, #16] 8005414: 1ad3 subs r3, r2, r3 8005416: 2b02 cmp r3, #2 8005418: d901 bls.n 800541e { return HAL_TIMEOUT; 800541a: 2303 movs r3, #3 800541c: e160 b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800541e: 4b0d ldr r3, [pc, #52] @ (8005454 ) 8005420: 6a5b ldr r3, [r3, #36] @ 0x24 8005422: f003 0302 and.w r3, r3, #2 8005426: 2b00 cmp r3, #0 8005428: d0f0 beq.n 800540c } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 800542a: 2001 movs r0, #1 800542c: f000 face bl 80059cc 8005430: e01c b.n 800546c } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8005432: 4b0a ldr r3, [pc, #40] @ (800545c ) 8005434: 2200 movs r2, #0 8005436: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005438: f7fc fed2 bl 80021e0 800543c: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 800543e: e00f b.n 8005460 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8005440: f7fc fece bl 80021e0 8005444: 4602 mov r2, r0 8005446: 693b ldr r3, [r7, #16] 8005448: 1ad3 subs r3, r2, r3 800544a: 2b02 cmp r3, #2 800544c: d908 bls.n 8005460 { return HAL_TIMEOUT; 800544e: 2303 movs r3, #3 8005450: e146 b.n 80056e0 8005452: bf00 nop 8005454: 40021000 .word 0x40021000 8005458: 42420000 .word 0x42420000 800545c: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8005460: 4b92 ldr r3, [pc, #584] @ (80056ac ) 8005462: 6a5b ldr r3, [r3, #36] @ 0x24 8005464: f003 0302 and.w r3, r3, #2 8005468: 2b00 cmp r3, #0 800546a: d1e9 bne.n 8005440 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 800546c: 687b ldr r3, [r7, #4] 800546e: 681b ldr r3, [r3, #0] 8005470: f003 0304 and.w r3, r3, #4 8005474: 2b00 cmp r3, #0 8005476: f000 80a6 beq.w 80055c6 { FlagStatus pwrclkchanged = RESET; 800547a: 2300 movs r3, #0 800547c: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 800547e: 4b8b ldr r3, [pc, #556] @ (80056ac ) 8005480: 69db ldr r3, [r3, #28] 8005482: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8005486: 2b00 cmp r3, #0 8005488: d10d bne.n 80054a6 { __HAL_RCC_PWR_CLK_ENABLE(); 800548a: 4b88 ldr r3, [pc, #544] @ (80056ac ) 800548c: 69db ldr r3, [r3, #28] 800548e: 4a87 ldr r2, [pc, #540] @ (80056ac ) 8005490: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005494: 61d3 str r3, [r2, #28] 8005496: 4b85 ldr r3, [pc, #532] @ (80056ac ) 8005498: 69db ldr r3, [r3, #28] 800549a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800549e: 60bb str r3, [r7, #8] 80054a0: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 80054a2: 2301 movs r3, #1 80054a4: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80054a6: 4b82 ldr r3, [pc, #520] @ (80056b0 ) 80054a8: 681b ldr r3, [r3, #0] 80054aa: f403 7380 and.w r3, r3, #256 @ 0x100 80054ae: 2b00 cmp r3, #0 80054b0: d118 bne.n 80054e4 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80054b2: 4b7f ldr r3, [pc, #508] @ (80056b0 ) 80054b4: 681b ldr r3, [r3, #0] 80054b6: 4a7e ldr r2, [pc, #504] @ (80056b0 ) 80054b8: f443 7380 orr.w r3, r3, #256 @ 0x100 80054bc: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80054be: f7fc fe8f bl 80021e0 80054c2: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80054c4: e008 b.n 80054d8 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80054c6: f7fc fe8b bl 80021e0 80054ca: 4602 mov r2, r0 80054cc: 693b ldr r3, [r7, #16] 80054ce: 1ad3 subs r3, r2, r3 80054d0: 2b64 cmp r3, #100 @ 0x64 80054d2: d901 bls.n 80054d8 { return HAL_TIMEOUT; 80054d4: 2303 movs r3, #3 80054d6: e103 b.n 80056e0 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80054d8: 4b75 ldr r3, [pc, #468] @ (80056b0 ) 80054da: 681b ldr r3, [r3, #0] 80054dc: f403 7380 and.w r3, r3, #256 @ 0x100 80054e0: 2b00 cmp r3, #0 80054e2: d0f0 beq.n 80054c6 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80054e4: 687b ldr r3, [r7, #4] 80054e6: 68db ldr r3, [r3, #12] 80054e8: 2b01 cmp r3, #1 80054ea: d106 bne.n 80054fa 80054ec: 4b6f ldr r3, [pc, #444] @ (80056ac ) 80054ee: 6a1b ldr r3, [r3, #32] 80054f0: 4a6e ldr r2, [pc, #440] @ (80056ac ) 80054f2: f043 0301 orr.w r3, r3, #1 80054f6: 6213 str r3, [r2, #32] 80054f8: e02d b.n 8005556 80054fa: 687b ldr r3, [r7, #4] 80054fc: 68db ldr r3, [r3, #12] 80054fe: 2b00 cmp r3, #0 8005500: d10c bne.n 800551c 8005502: 4b6a ldr r3, [pc, #424] @ (80056ac ) 8005504: 6a1b ldr r3, [r3, #32] 8005506: 4a69 ldr r2, [pc, #420] @ (80056ac ) 8005508: f023 0301 bic.w r3, r3, #1 800550c: 6213 str r3, [r2, #32] 800550e: 4b67 ldr r3, [pc, #412] @ (80056ac ) 8005510: 6a1b ldr r3, [r3, #32] 8005512: 4a66 ldr r2, [pc, #408] @ (80056ac ) 8005514: f023 0304 bic.w r3, r3, #4 8005518: 6213 str r3, [r2, #32] 800551a: e01c b.n 8005556 800551c: 687b ldr r3, [r7, #4] 800551e: 68db ldr r3, [r3, #12] 8005520: 2b05 cmp r3, #5 8005522: d10c bne.n 800553e 8005524: 4b61 ldr r3, [pc, #388] @ (80056ac ) 8005526: 6a1b ldr r3, [r3, #32] 8005528: 4a60 ldr r2, [pc, #384] @ (80056ac ) 800552a: f043 0304 orr.w r3, r3, #4 800552e: 6213 str r3, [r2, #32] 8005530: 4b5e ldr r3, [pc, #376] @ (80056ac ) 8005532: 6a1b ldr r3, [r3, #32] 8005534: 4a5d ldr r2, [pc, #372] @ (80056ac ) 8005536: f043 0301 orr.w r3, r3, #1 800553a: 6213 str r3, [r2, #32] 800553c: e00b b.n 8005556 800553e: 4b5b ldr r3, [pc, #364] @ (80056ac ) 8005540: 6a1b ldr r3, [r3, #32] 8005542: 4a5a ldr r2, [pc, #360] @ (80056ac ) 8005544: f023 0301 bic.w r3, r3, #1 8005548: 6213 str r3, [r2, #32] 800554a: 4b58 ldr r3, [pc, #352] @ (80056ac ) 800554c: 6a1b ldr r3, [r3, #32] 800554e: 4a57 ldr r2, [pc, #348] @ (80056ac ) 8005550: f023 0304 bic.w r3, r3, #4 8005554: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8005556: 687b ldr r3, [r7, #4] 8005558: 68db ldr r3, [r3, #12] 800555a: 2b00 cmp r3, #0 800555c: d015 beq.n 800558a { /* Get Start Tick */ tickstart = HAL_GetTick(); 800555e: f7fc fe3f bl 80021e0 8005562: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8005564: e00a b.n 800557c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8005566: f7fc fe3b bl 80021e0 800556a: 4602 mov r2, r0 800556c: 693b ldr r3, [r7, #16] 800556e: 1ad3 subs r3, r2, r3 8005570: f241 3288 movw r2, #5000 @ 0x1388 8005574: 4293 cmp r3, r2 8005576: d901 bls.n 800557c { return HAL_TIMEOUT; 8005578: 2303 movs r3, #3 800557a: e0b1 b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 800557c: 4b4b ldr r3, [pc, #300] @ (80056ac ) 800557e: 6a1b ldr r3, [r3, #32] 8005580: f003 0302 and.w r3, r3, #2 8005584: 2b00 cmp r3, #0 8005586: d0ee beq.n 8005566 8005588: e014 b.n 80055b4 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 800558a: f7fc fe29 bl 80021e0 800558e: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8005590: e00a b.n 80055a8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8005592: f7fc fe25 bl 80021e0 8005596: 4602 mov r2, r0 8005598: 693b ldr r3, [r7, #16] 800559a: 1ad3 subs r3, r2, r3 800559c: f241 3288 movw r2, #5000 @ 0x1388 80055a0: 4293 cmp r3, r2 80055a2: d901 bls.n 80055a8 { return HAL_TIMEOUT; 80055a4: 2303 movs r3, #3 80055a6: e09b b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80055a8: 4b40 ldr r3, [pc, #256] @ (80056ac ) 80055aa: 6a1b ldr r3, [r3, #32] 80055ac: f003 0302 and.w r3, r3, #2 80055b0: 2b00 cmp r3, #0 80055b2: d1ee bne.n 8005592 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 80055b4: 7dfb ldrb r3, [r7, #23] 80055b6: 2b01 cmp r3, #1 80055b8: d105 bne.n 80055c6 { __HAL_RCC_PWR_CLK_DISABLE(); 80055ba: 4b3c ldr r3, [pc, #240] @ (80056ac ) 80055bc: 69db ldr r3, [r3, #28] 80055be: 4a3b ldr r2, [pc, #236] @ (80056ac ) 80055c0: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80055c4: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80055c6: 687b ldr r3, [r7, #4] 80055c8: 69db ldr r3, [r3, #28] 80055ca: 2b00 cmp r3, #0 80055cc: f000 8087 beq.w 80056de { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 80055d0: 4b36 ldr r3, [pc, #216] @ (80056ac ) 80055d2: 685b ldr r3, [r3, #4] 80055d4: f003 030c and.w r3, r3, #12 80055d8: 2b08 cmp r3, #8 80055da: d061 beq.n 80056a0 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80055dc: 687b ldr r3, [r7, #4] 80055de: 69db ldr r3, [r3, #28] 80055e0: 2b02 cmp r3, #2 80055e2: d146 bne.n 8005672 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 80055e4: 4b33 ldr r3, [pc, #204] @ (80056b4 ) 80055e6: 2200 movs r2, #0 80055e8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80055ea: f7fc fdf9 bl 80021e0 80055ee: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80055f0: e008 b.n 8005604 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80055f2: f7fc fdf5 bl 80021e0 80055f6: 4602 mov r2, r0 80055f8: 693b ldr r3, [r7, #16] 80055fa: 1ad3 subs r3, r2, r3 80055fc: 2b02 cmp r3, #2 80055fe: d901 bls.n 8005604 { return HAL_TIMEOUT; 8005600: 2303 movs r3, #3 8005602: e06d b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8005604: 4b29 ldr r3, [pc, #164] @ (80056ac ) 8005606: 681b ldr r3, [r3, #0] 8005608: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800560c: 2b00 cmp r3, #0 800560e: d1f0 bne.n 80055f2 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8005610: 687b ldr r3, [r7, #4] 8005612: 6a1b ldr r3, [r3, #32] 8005614: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8005618: d108 bne.n 800562c /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 800561a: 4b24 ldr r3, [pc, #144] @ (80056ac ) 800561c: 685b ldr r3, [r3, #4] 800561e: f423 3200 bic.w r2, r3, #131072 @ 0x20000 8005622: 687b ldr r3, [r7, #4] 8005624: 689b ldr r3, [r3, #8] 8005626: 4921 ldr r1, [pc, #132] @ (80056ac ) 8005628: 4313 orrs r3, r2 800562a: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 800562c: 4b1f ldr r3, [pc, #124] @ (80056ac ) 800562e: 685b ldr r3, [r3, #4] 8005630: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 8005634: 687b ldr r3, [r7, #4] 8005636: 6a19 ldr r1, [r3, #32] 8005638: 687b ldr r3, [r7, #4] 800563a: 6a5b ldr r3, [r3, #36] @ 0x24 800563c: 430b orrs r3, r1 800563e: 491b ldr r1, [pc, #108] @ (80056ac ) 8005640: 4313 orrs r3, r2 8005642: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8005644: 4b1b ldr r3, [pc, #108] @ (80056b4 ) 8005646: 2201 movs r2, #1 8005648: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800564a: f7fc fdc9 bl 80021e0 800564e: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8005650: e008 b.n 8005664 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8005652: f7fc fdc5 bl 80021e0 8005656: 4602 mov r2, r0 8005658: 693b ldr r3, [r7, #16] 800565a: 1ad3 subs r3, r2, r3 800565c: 2b02 cmp r3, #2 800565e: d901 bls.n 8005664 { return HAL_TIMEOUT; 8005660: 2303 movs r3, #3 8005662: e03d b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8005664: 4b11 ldr r3, [pc, #68] @ (80056ac ) 8005666: 681b ldr r3, [r3, #0] 8005668: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800566c: 2b00 cmp r3, #0 800566e: d0f0 beq.n 8005652 8005670: e035 b.n 80056de } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8005672: 4b10 ldr r3, [pc, #64] @ (80056b4 ) 8005674: 2200 movs r2, #0 8005676: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005678: f7fc fdb2 bl 80021e0 800567c: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800567e: e008 b.n 8005692 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8005680: f7fc fdae bl 80021e0 8005684: 4602 mov r2, r0 8005686: 693b ldr r3, [r7, #16] 8005688: 1ad3 subs r3, r2, r3 800568a: 2b02 cmp r3, #2 800568c: d901 bls.n 8005692 { return HAL_TIMEOUT; 800568e: 2303 movs r3, #3 8005690: e026 b.n 80056e0 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8005692: 4b06 ldr r3, [pc, #24] @ (80056ac ) 8005694: 681b ldr r3, [r3, #0] 8005696: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800569a: 2b00 cmp r3, #0 800569c: d1f0 bne.n 8005680 800569e: e01e b.n 80056de } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 80056a0: 687b ldr r3, [r7, #4] 80056a2: 69db ldr r3, [r3, #28] 80056a4: 2b01 cmp r3, #1 80056a6: d107 bne.n 80056b8 { return HAL_ERROR; 80056a8: 2301 movs r3, #1 80056aa: e019 b.n 80056e0 80056ac: 40021000 .word 0x40021000 80056b0: 40007000 .word 0x40007000 80056b4: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 80056b8: 4b0b ldr r3, [pc, #44] @ (80056e8 ) 80056ba: 685b ldr r3, [r3, #4] 80056bc: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80056be: 68fb ldr r3, [r7, #12] 80056c0: f403 3280 and.w r2, r3, #65536 @ 0x10000 80056c4: 687b ldr r3, [r7, #4] 80056c6: 6a1b ldr r3, [r3, #32] 80056c8: 429a cmp r2, r3 80056ca: d106 bne.n 80056da (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 80056cc: 68fb ldr r3, [r7, #12] 80056ce: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 80056d2: 687b ldr r3, [r7, #4] 80056d4: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80056d6: 429a cmp r2, r3 80056d8: d001 beq.n 80056de { return HAL_ERROR; 80056da: 2301 movs r3, #1 80056dc: e000 b.n 80056e0 } } } } return HAL_OK; 80056de: 2300 movs r3, #0 } 80056e0: 4618 mov r0, r3 80056e2: 3718 adds r7, #24 80056e4: 46bd mov sp, r7 80056e6: bd80 pop {r7, pc} 80056e8: 40021000 .word 0x40021000 080056ec : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 80056ec: b580 push {r7, lr} 80056ee: b084 sub sp, #16 80056f0: af00 add r7, sp, #0 80056f2: 6078 str r0, [r7, #4] 80056f4: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 80056f6: 687b ldr r3, [r7, #4] 80056f8: 2b00 cmp r3, #0 80056fa: d101 bne.n 8005700 { return HAL_ERROR; 80056fc: 2301 movs r3, #1 80056fe: e0d0 b.n 80058a2 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8005700: 4b6a ldr r3, [pc, #424] @ (80058ac ) 8005702: 681b ldr r3, [r3, #0] 8005704: f003 0307 and.w r3, r3, #7 8005708: 683a ldr r2, [r7, #0] 800570a: 429a cmp r2, r3 800570c: d910 bls.n 8005730 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800570e: 4b67 ldr r3, [pc, #412] @ (80058ac ) 8005710: 681b ldr r3, [r3, #0] 8005712: f023 0207 bic.w r2, r3, #7 8005716: 4965 ldr r1, [pc, #404] @ (80058ac ) 8005718: 683b ldr r3, [r7, #0] 800571a: 4313 orrs r3, r2 800571c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800571e: 4b63 ldr r3, [pc, #396] @ (80058ac ) 8005720: 681b ldr r3, [r3, #0] 8005722: f003 0307 and.w r3, r3, #7 8005726: 683a ldr r2, [r7, #0] 8005728: 429a cmp r2, r3 800572a: d001 beq.n 8005730 { return HAL_ERROR; 800572c: 2301 movs r3, #1 800572e: e0b8 b.n 80058a2 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8005730: 687b ldr r3, [r7, #4] 8005732: 681b ldr r3, [r3, #0] 8005734: f003 0302 and.w r3, r3, #2 8005738: 2b00 cmp r3, #0 800573a: d020 beq.n 800577e { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800573c: 687b ldr r3, [r7, #4] 800573e: 681b ldr r3, [r3, #0] 8005740: f003 0304 and.w r3, r3, #4 8005744: 2b00 cmp r3, #0 8005746: d005 beq.n 8005754 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8005748: 4b59 ldr r3, [pc, #356] @ (80058b0 ) 800574a: 685b ldr r3, [r3, #4] 800574c: 4a58 ldr r2, [pc, #352] @ (80058b0 ) 800574e: f443 63e0 orr.w r3, r3, #1792 @ 0x700 8005752: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8005754: 687b ldr r3, [r7, #4] 8005756: 681b ldr r3, [r3, #0] 8005758: f003 0308 and.w r3, r3, #8 800575c: 2b00 cmp r3, #0 800575e: d005 beq.n 800576c { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8005760: 4b53 ldr r3, [pc, #332] @ (80058b0 ) 8005762: 685b ldr r3, [r3, #4] 8005764: 4a52 ldr r2, [pc, #328] @ (80058b0 ) 8005766: f443 5360 orr.w r3, r3, #14336 @ 0x3800 800576a: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 800576c: 4b50 ldr r3, [pc, #320] @ (80058b0 ) 800576e: 685b ldr r3, [r3, #4] 8005770: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8005774: 687b ldr r3, [r7, #4] 8005776: 689b ldr r3, [r3, #8] 8005778: 494d ldr r1, [pc, #308] @ (80058b0 ) 800577a: 4313 orrs r3, r2 800577c: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 800577e: 687b ldr r3, [r7, #4] 8005780: 681b ldr r3, [r3, #0] 8005782: f003 0301 and.w r3, r3, #1 8005786: 2b00 cmp r3, #0 8005788: d040 beq.n 800580c { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 800578a: 687b ldr r3, [r7, #4] 800578c: 685b ldr r3, [r3, #4] 800578e: 2b01 cmp r3, #1 8005790: d107 bne.n 80057a2 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8005792: 4b47 ldr r3, [pc, #284] @ (80058b0 ) 8005794: 681b ldr r3, [r3, #0] 8005796: f403 3300 and.w r3, r3, #131072 @ 0x20000 800579a: 2b00 cmp r3, #0 800579c: d115 bne.n 80057ca { return HAL_ERROR; 800579e: 2301 movs r3, #1 80057a0: e07f b.n 80058a2 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80057a2: 687b ldr r3, [r7, #4] 80057a4: 685b ldr r3, [r3, #4] 80057a6: 2b02 cmp r3, #2 80057a8: d107 bne.n 80057ba { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80057aa: 4b41 ldr r3, [pc, #260] @ (80058b0 ) 80057ac: 681b ldr r3, [r3, #0] 80057ae: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80057b2: 2b00 cmp r3, #0 80057b4: d109 bne.n 80057ca { return HAL_ERROR; 80057b6: 2301 movs r3, #1 80057b8: e073 b.n 80058a2 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80057ba: 4b3d ldr r3, [pc, #244] @ (80058b0 ) 80057bc: 681b ldr r3, [r3, #0] 80057be: f003 0302 and.w r3, r3, #2 80057c2: 2b00 cmp r3, #0 80057c4: d101 bne.n 80057ca { return HAL_ERROR; 80057c6: 2301 movs r3, #1 80057c8: e06b b.n 80058a2 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80057ca: 4b39 ldr r3, [pc, #228] @ (80058b0 ) 80057cc: 685b ldr r3, [r3, #4] 80057ce: f023 0203 bic.w r2, r3, #3 80057d2: 687b ldr r3, [r7, #4] 80057d4: 685b ldr r3, [r3, #4] 80057d6: 4936 ldr r1, [pc, #216] @ (80058b0 ) 80057d8: 4313 orrs r3, r2 80057da: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 80057dc: f7fc fd00 bl 80021e0 80057e0: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80057e2: e00a b.n 80057fa { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 80057e4: f7fc fcfc bl 80021e0 80057e8: 4602 mov r2, r0 80057ea: 68fb ldr r3, [r7, #12] 80057ec: 1ad3 subs r3, r2, r3 80057ee: f241 3288 movw r2, #5000 @ 0x1388 80057f2: 4293 cmp r3, r2 80057f4: d901 bls.n 80057fa { return HAL_TIMEOUT; 80057f6: 2303 movs r3, #3 80057f8: e053 b.n 80058a2 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80057fa: 4b2d ldr r3, [pc, #180] @ (80058b0 ) 80057fc: 685b ldr r3, [r3, #4] 80057fe: f003 020c and.w r2, r3, #12 8005802: 687b ldr r3, [r7, #4] 8005804: 685b ldr r3, [r3, #4] 8005806: 009b lsls r3, r3, #2 8005808: 429a cmp r2, r3 800580a: d1eb bne.n 80057e4 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 800580c: 4b27 ldr r3, [pc, #156] @ (80058ac ) 800580e: 681b ldr r3, [r3, #0] 8005810: f003 0307 and.w r3, r3, #7 8005814: 683a ldr r2, [r7, #0] 8005816: 429a cmp r2, r3 8005818: d210 bcs.n 800583c { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800581a: 4b24 ldr r3, [pc, #144] @ (80058ac ) 800581c: 681b ldr r3, [r3, #0] 800581e: f023 0207 bic.w r2, r3, #7 8005822: 4922 ldr r1, [pc, #136] @ (80058ac ) 8005824: 683b ldr r3, [r7, #0] 8005826: 4313 orrs r3, r2 8005828: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800582a: 4b20 ldr r3, [pc, #128] @ (80058ac ) 800582c: 681b ldr r3, [r3, #0] 800582e: f003 0307 and.w r3, r3, #7 8005832: 683a ldr r2, [r7, #0] 8005834: 429a cmp r2, r3 8005836: d001 beq.n 800583c { return HAL_ERROR; 8005838: 2301 movs r3, #1 800583a: e032 b.n 80058a2 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800583c: 687b ldr r3, [r7, #4] 800583e: 681b ldr r3, [r3, #0] 8005840: f003 0304 and.w r3, r3, #4 8005844: 2b00 cmp r3, #0 8005846: d008 beq.n 800585a { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8005848: 4b19 ldr r3, [pc, #100] @ (80058b0 ) 800584a: 685b ldr r3, [r3, #4] 800584c: f423 62e0 bic.w r2, r3, #1792 @ 0x700 8005850: 687b ldr r3, [r7, #4] 8005852: 68db ldr r3, [r3, #12] 8005854: 4916 ldr r1, [pc, #88] @ (80058b0 ) 8005856: 4313 orrs r3, r2 8005858: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800585a: 687b ldr r3, [r7, #4] 800585c: 681b ldr r3, [r3, #0] 800585e: f003 0308 and.w r3, r3, #8 8005862: 2b00 cmp r3, #0 8005864: d009 beq.n 800587a { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8005866: 4b12 ldr r3, [pc, #72] @ (80058b0 ) 8005868: 685b ldr r3, [r3, #4] 800586a: f423 5260 bic.w r2, r3, #14336 @ 0x3800 800586e: 687b ldr r3, [r7, #4] 8005870: 691b ldr r3, [r3, #16] 8005872: 00db lsls r3, r3, #3 8005874: 490e ldr r1, [pc, #56] @ (80058b0 ) 8005876: 4313 orrs r3, r2 8005878: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 800587a: f000 f821 bl 80058c0 800587e: 4602 mov r2, r0 8005880: 4b0b ldr r3, [pc, #44] @ (80058b0 ) 8005882: 685b ldr r3, [r3, #4] 8005884: 091b lsrs r3, r3, #4 8005886: f003 030f and.w r3, r3, #15 800588a: 490a ldr r1, [pc, #40] @ (80058b4 ) 800588c: 5ccb ldrb r3, [r1, r3] 800588e: fa22 f303 lsr.w r3, r2, r3 8005892: 4a09 ldr r2, [pc, #36] @ (80058b8 ) 8005894: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 8005896: 4b09 ldr r3, [pc, #36] @ (80058bc ) 8005898: 681b ldr r3, [r3, #0] 800589a: 4618 mov r0, r3 800589c: f7fc fc5e bl 800215c return HAL_OK; 80058a0: 2300 movs r3, #0 } 80058a2: 4618 mov r0, r3 80058a4: 3710 adds r7, #16 80058a6: 46bd mov sp, r7 80058a8: bd80 pop {r7, pc} 80058aa: bf00 nop 80058ac: 40022000 .word 0x40022000 80058b0: 40021000 .word 0x40021000 80058b4: 0800be28 .word 0x0800be28 80058b8: 20000004 .word 0x20000004 80058bc: 20000008 .word 0x20000008 080058c0 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80058c0: b480 push {r7} 80058c2: b087 sub sp, #28 80058c4: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 80058c6: 2300 movs r3, #0 80058c8: 60fb str r3, [r7, #12] 80058ca: 2300 movs r3, #0 80058cc: 60bb str r3, [r7, #8] 80058ce: 2300 movs r3, #0 80058d0: 617b str r3, [r7, #20] 80058d2: 2300 movs r3, #0 80058d4: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; 80058d6: 2300 movs r3, #0 80058d8: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 80058da: 4b1e ldr r3, [pc, #120] @ (8005954 ) 80058dc: 685b ldr r3, [r3, #4] 80058de: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 80058e0: 68fb ldr r3, [r7, #12] 80058e2: f003 030c and.w r3, r3, #12 80058e6: 2b04 cmp r3, #4 80058e8: d002 beq.n 80058f0 80058ea: 2b08 cmp r3, #8 80058ec: d003 beq.n 80058f6 80058ee: e027 b.n 8005940 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 80058f0: 4b19 ldr r3, [pc, #100] @ (8005958 ) 80058f2: 613b str r3, [r7, #16] break; 80058f4: e027 b.n 8005946 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80058f6: 68fb ldr r3, [r7, #12] 80058f8: 0c9b lsrs r3, r3, #18 80058fa: f003 030f and.w r3, r3, #15 80058fe: 4a17 ldr r2, [pc, #92] @ (800595c ) 8005900: 5cd3 ldrb r3, [r2, r3] 8005902: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8005904: 68fb ldr r3, [r7, #12] 8005906: f403 3380 and.w r3, r3, #65536 @ 0x10000 800590a: 2b00 cmp r3, #0 800590c: d010 beq.n 8005930 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 800590e: 4b11 ldr r3, [pc, #68] @ (8005954 ) 8005910: 685b ldr r3, [r3, #4] 8005912: 0c5b lsrs r3, r3, #17 8005914: f003 0301 and.w r3, r3, #1 8005918: 4a11 ldr r2, [pc, #68] @ (8005960 ) 800591a: 5cd3 ldrb r3, [r2, r3] 800591c: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 800591e: 687b ldr r3, [r7, #4] 8005920: 4a0d ldr r2, [pc, #52] @ (8005958 ) 8005922: fb03 f202 mul.w r2, r3, r2 8005926: 68bb ldr r3, [r7, #8] 8005928: fbb2 f3f3 udiv r3, r2, r3 800592c: 617b str r3, [r7, #20] 800592e: e004 b.n 800593a #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8005930: 687b ldr r3, [r7, #4] 8005932: 4a0c ldr r2, [pc, #48] @ (8005964 ) 8005934: fb02 f303 mul.w r3, r2, r3 8005938: 617b str r3, [r7, #20] } sysclockfreq = pllclk; 800593a: 697b ldr r3, [r7, #20] 800593c: 613b str r3, [r7, #16] break; 800593e: e002 b.n 8005946 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8005940: 4b05 ldr r3, [pc, #20] @ (8005958 ) 8005942: 613b str r3, [r7, #16] break; 8005944: bf00 nop } } return sysclockfreq; 8005946: 693b ldr r3, [r7, #16] } 8005948: 4618 mov r0, r3 800594a: 371c adds r7, #28 800594c: 46bd mov sp, r7 800594e: bc80 pop {r7} 8005950: 4770 bx lr 8005952: bf00 nop 8005954: 40021000 .word 0x40021000 8005958: 007a1200 .word 0x007a1200 800595c: 0800be40 .word 0x0800be40 8005960: 0800be50 .word 0x0800be50 8005964: 003d0900 .word 0x003d0900 08005968 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 8005968: b480 push {r7} 800596a: af00 add r7, sp, #0 return SystemCoreClock; 800596c: 4b02 ldr r3, [pc, #8] @ (8005978 ) 800596e: 681b ldr r3, [r3, #0] } 8005970: 4618 mov r0, r3 8005972: 46bd mov sp, r7 8005974: bc80 pop {r7} 8005976: 4770 bx lr 8005978: 20000004 .word 0x20000004 0800597c : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 800597c: b580 push {r7, lr} 800597e: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8005980: f7ff fff2 bl 8005968 8005984: 4602 mov r2, r0 8005986: 4b05 ldr r3, [pc, #20] @ (800599c ) 8005988: 685b ldr r3, [r3, #4] 800598a: 0a1b lsrs r3, r3, #8 800598c: f003 0307 and.w r3, r3, #7 8005990: 4903 ldr r1, [pc, #12] @ (80059a0 ) 8005992: 5ccb ldrb r3, [r1, r3] 8005994: fa22 f303 lsr.w r3, r2, r3 } 8005998: 4618 mov r0, r3 800599a: bd80 pop {r7, pc} 800599c: 40021000 .word 0x40021000 80059a0: 0800be38 .word 0x0800be38 080059a4 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 80059a4: b580 push {r7, lr} 80059a6: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 80059a8: f7ff ffde bl 8005968 80059ac: 4602 mov r2, r0 80059ae: 4b05 ldr r3, [pc, #20] @ (80059c4 ) 80059b0: 685b ldr r3, [r3, #4] 80059b2: 0adb lsrs r3, r3, #11 80059b4: f003 0307 and.w r3, r3, #7 80059b8: 4903 ldr r1, [pc, #12] @ (80059c8 ) 80059ba: 5ccb ldrb r3, [r1, r3] 80059bc: fa22 f303 lsr.w r3, r2, r3 } 80059c0: 4618 mov r0, r3 80059c2: bd80 pop {r7, pc} 80059c4: 40021000 .word 0x40021000 80059c8: 0800be38 .word 0x0800be38 080059cc : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 80059cc: b480 push {r7} 80059ce: b085 sub sp, #20 80059d0: af00 add r7, sp, #0 80059d2: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 80059d4: 4b0a ldr r3, [pc, #40] @ (8005a00 ) 80059d6: 681b ldr r3, [r3, #0] 80059d8: 4a0a ldr r2, [pc, #40] @ (8005a04 ) 80059da: fba2 2303 umull r2, r3, r2, r3 80059de: 0a5b lsrs r3, r3, #9 80059e0: 687a ldr r2, [r7, #4] 80059e2: fb02 f303 mul.w r3, r2, r3 80059e6: 60fb str r3, [r7, #12] do { __NOP(); 80059e8: bf00 nop } while (Delay --); 80059ea: 68fb ldr r3, [r7, #12] 80059ec: 1e5a subs r2, r3, #1 80059ee: 60fa str r2, [r7, #12] 80059f0: 2b00 cmp r3, #0 80059f2: d1f9 bne.n 80059e8 } 80059f4: bf00 nop 80059f6: bf00 nop 80059f8: 3714 adds r7, #20 80059fa: 46bd mov sp, r7 80059fc: bc80 pop {r7} 80059fe: 4770 bx lr 8005a00: 20000004 .word 0x20000004 8005a04: 10624dd3 .word 0x10624dd3 08005a08 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 8005a08: b580 push {r7, lr} 8005a0a: b086 sub sp, #24 8005a0c: af00 add r7, sp, #0 8005a0e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 8005a10: 2300 movs r3, #0 8005a12: 613b str r3, [r7, #16] 8005a14: 2300 movs r3, #0 8005a16: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8005a18: 687b ldr r3, [r7, #4] 8005a1a: 681b ldr r3, [r3, #0] 8005a1c: f003 0301 and.w r3, r3, #1 8005a20: 2b00 cmp r3, #0 8005a22: d07d beq.n 8005b20 { FlagStatus pwrclkchanged = RESET; 8005a24: 2300 movs r3, #0 8005a26: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8005a28: 4b4f ldr r3, [pc, #316] @ (8005b68 ) 8005a2a: 69db ldr r3, [r3, #28] 8005a2c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8005a30: 2b00 cmp r3, #0 8005a32: d10d bne.n 8005a50 { __HAL_RCC_PWR_CLK_ENABLE(); 8005a34: 4b4c ldr r3, [pc, #304] @ (8005b68 ) 8005a36: 69db ldr r3, [r3, #28] 8005a38: 4a4b ldr r2, [pc, #300] @ (8005b68 ) 8005a3a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005a3e: 61d3 str r3, [r2, #28] 8005a40: 4b49 ldr r3, [pc, #292] @ (8005b68 ) 8005a42: 69db ldr r3, [r3, #28] 8005a44: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8005a48: 60bb str r3, [r7, #8] 8005a4a: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8005a4c: 2301 movs r3, #1 8005a4e: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005a50: 4b46 ldr r3, [pc, #280] @ (8005b6c ) 8005a52: 681b ldr r3, [r3, #0] 8005a54: f403 7380 and.w r3, r3, #256 @ 0x100 8005a58: 2b00 cmp r3, #0 8005a5a: d118 bne.n 8005a8e { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8005a5c: 4b43 ldr r3, [pc, #268] @ (8005b6c ) 8005a5e: 681b ldr r3, [r3, #0] 8005a60: 4a42 ldr r2, [pc, #264] @ (8005b6c ) 8005a62: f443 7380 orr.w r3, r3, #256 @ 0x100 8005a66: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8005a68: f7fc fbba bl 80021e0 8005a6c: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005a6e: e008 b.n 8005a82 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8005a70: f7fc fbb6 bl 80021e0 8005a74: 4602 mov r2, r0 8005a76: 693b ldr r3, [r7, #16] 8005a78: 1ad3 subs r3, r2, r3 8005a7a: 2b64 cmp r3, #100 @ 0x64 8005a7c: d901 bls.n 8005a82 { return HAL_TIMEOUT; 8005a7e: 2303 movs r3, #3 8005a80: e06d b.n 8005b5e while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005a82: 4b3a ldr r3, [pc, #232] @ (8005b6c ) 8005a84: 681b ldr r3, [r3, #0] 8005a86: f403 7380 and.w r3, r3, #256 @ 0x100 8005a8a: 2b00 cmp r3, #0 8005a8c: d0f0 beq.n 8005a70 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 8005a8e: 4b36 ldr r3, [pc, #216] @ (8005b68 ) 8005a90: 6a1b ldr r3, [r3, #32] 8005a92: f403 7340 and.w r3, r3, #768 @ 0x300 8005a96: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8005a98: 68fb ldr r3, [r7, #12] 8005a9a: 2b00 cmp r3, #0 8005a9c: d02e beq.n 8005afc 8005a9e: 687b ldr r3, [r7, #4] 8005aa0: 685b ldr r3, [r3, #4] 8005aa2: f403 7340 and.w r3, r3, #768 @ 0x300 8005aa6: 68fa ldr r2, [r7, #12] 8005aa8: 429a cmp r2, r3 8005aaa: d027 beq.n 8005afc { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8005aac: 4b2e ldr r3, [pc, #184] @ (8005b68 ) 8005aae: 6a1b ldr r3, [r3, #32] 8005ab0: f423 7340 bic.w r3, r3, #768 @ 0x300 8005ab4: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8005ab6: 4b2e ldr r3, [pc, #184] @ (8005b70 ) 8005ab8: 2201 movs r2, #1 8005aba: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8005abc: 4b2c ldr r3, [pc, #176] @ (8005b70 ) 8005abe: 2200 movs r2, #0 8005ac0: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 8005ac2: 4a29 ldr r2, [pc, #164] @ (8005b68 ) 8005ac4: 68fb ldr r3, [r7, #12] 8005ac6: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8005ac8: 68fb ldr r3, [r7, #12] 8005aca: f003 0301 and.w r3, r3, #1 8005ace: 2b00 cmp r3, #0 8005ad0: d014 beq.n 8005afc { /* Get Start Tick */ tickstart = HAL_GetTick(); 8005ad2: f7fc fb85 bl 80021e0 8005ad6: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8005ad8: e00a b.n 8005af0 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8005ada: f7fc fb81 bl 80021e0 8005ade: 4602 mov r2, r0 8005ae0: 693b ldr r3, [r7, #16] 8005ae2: 1ad3 subs r3, r2, r3 8005ae4: f241 3288 movw r2, #5000 @ 0x1388 8005ae8: 4293 cmp r3, r2 8005aea: d901 bls.n 8005af0 { return HAL_TIMEOUT; 8005aec: 2303 movs r3, #3 8005aee: e036 b.n 8005b5e while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8005af0: 4b1d ldr r3, [pc, #116] @ (8005b68 ) 8005af2: 6a1b ldr r3, [r3, #32] 8005af4: f003 0302 and.w r3, r3, #2 8005af8: 2b00 cmp r3, #0 8005afa: d0ee beq.n 8005ada } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8005afc: 4b1a ldr r3, [pc, #104] @ (8005b68 ) 8005afe: 6a1b ldr r3, [r3, #32] 8005b00: f423 7240 bic.w r2, r3, #768 @ 0x300 8005b04: 687b ldr r3, [r7, #4] 8005b06: 685b ldr r3, [r3, #4] 8005b08: 4917 ldr r1, [pc, #92] @ (8005b68 ) 8005b0a: 4313 orrs r3, r2 8005b0c: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8005b0e: 7dfb ldrb r3, [r7, #23] 8005b10: 2b01 cmp r3, #1 8005b12: d105 bne.n 8005b20 { __HAL_RCC_PWR_CLK_DISABLE(); 8005b14: 4b14 ldr r3, [pc, #80] @ (8005b68 ) 8005b16: 69db ldr r3, [r3, #28] 8005b18: 4a13 ldr r2, [pc, #76] @ (8005b68 ) 8005b1a: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8005b1e: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8005b20: 687b ldr r3, [r7, #4] 8005b22: 681b ldr r3, [r3, #0] 8005b24: f003 0302 and.w r3, r3, #2 8005b28: 2b00 cmp r3, #0 8005b2a: d008 beq.n 8005b3e { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8005b2c: 4b0e ldr r3, [pc, #56] @ (8005b68 ) 8005b2e: 685b ldr r3, [r3, #4] 8005b30: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8005b34: 687b ldr r3, [r7, #4] 8005b36: 689b ldr r3, [r3, #8] 8005b38: 490b ldr r1, [pc, #44] @ (8005b68 ) 8005b3a: 4313 orrs r3, r2 8005b3c: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8005b3e: 687b ldr r3, [r7, #4] 8005b40: 681b ldr r3, [r3, #0] 8005b42: f003 0310 and.w r3, r3, #16 8005b46: 2b00 cmp r3, #0 8005b48: d008 beq.n 8005b5c { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8005b4a: 4b07 ldr r3, [pc, #28] @ (8005b68 ) 8005b4c: 685b ldr r3, [r3, #4] 8005b4e: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 8005b52: 687b ldr r3, [r7, #4] 8005b54: 68db ldr r3, [r3, #12] 8005b56: 4904 ldr r1, [pc, #16] @ (8005b68 ) 8005b58: 4313 orrs r3, r2 8005b5a: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8005b5c: 2300 movs r3, #0 } 8005b5e: 4618 mov r0, r3 8005b60: 3718 adds r7, #24 8005b62: 46bd mov sp, r7 8005b64: bd80 pop {r7, pc} 8005b66: bf00 nop 8005b68: 40021000 .word 0x40021000 8005b6c: 40007000 .word 0x40007000 8005b70: 42420440 .word 0x42420440 08005b74 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8005b74: b580 push {r7, lr} 8005b76: b082 sub sp, #8 8005b78: af00 add r7, sp, #0 8005b7a: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8005b7c: 687b ldr r3, [r7, #4] 8005b7e: 2b00 cmp r3, #0 8005b80: d101 bne.n 8005b86 { return HAL_ERROR; 8005b82: 2301 movs r3, #1 8005b84: e041 b.n 8005c0a assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8005b86: 687b ldr r3, [r7, #4] 8005b88: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8005b8c: b2db uxtb r3, r3 8005b8e: 2b00 cmp r3, #0 8005b90: d106 bne.n 8005ba0 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8005b92: 687b ldr r3, [r7, #4] 8005b94: 2200 movs r2, #0 8005b96: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8005b9a: 6878 ldr r0, [r7, #4] 8005b9c: f7fc f954 bl 8001e48 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8005ba0: 687b ldr r3, [r7, #4] 8005ba2: 2202 movs r2, #2 8005ba4: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8005ba8: 687b ldr r3, [r7, #4] 8005baa: 681a ldr r2, [r3, #0] 8005bac: 687b ldr r3, [r7, #4] 8005bae: 3304 adds r3, #4 8005bb0: 4619 mov r1, r3 8005bb2: 4610 mov r0, r2 8005bb4: f000 fb3e bl 8006234 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8005bb8: 687b ldr r3, [r7, #4] 8005bba: 2201 movs r2, #1 8005bbc: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8005bc0: 687b ldr r3, [r7, #4] 8005bc2: 2201 movs r2, #1 8005bc4: f883 203e strb.w r2, [r3, #62] @ 0x3e 8005bc8: 687b ldr r3, [r7, #4] 8005bca: 2201 movs r2, #1 8005bcc: f883 203f strb.w r2, [r3, #63] @ 0x3f 8005bd0: 687b ldr r3, [r7, #4] 8005bd2: 2201 movs r2, #1 8005bd4: f883 2040 strb.w r2, [r3, #64] @ 0x40 8005bd8: 687b ldr r3, [r7, #4] 8005bda: 2201 movs r2, #1 8005bdc: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8005be0: 687b ldr r3, [r7, #4] 8005be2: 2201 movs r2, #1 8005be4: f883 2042 strb.w r2, [r3, #66] @ 0x42 8005be8: 687b ldr r3, [r7, #4] 8005bea: 2201 movs r2, #1 8005bec: f883 2043 strb.w r2, [r3, #67] @ 0x43 8005bf0: 687b ldr r3, [r7, #4] 8005bf2: 2201 movs r2, #1 8005bf4: f883 2044 strb.w r2, [r3, #68] @ 0x44 8005bf8: 687b ldr r3, [r7, #4] 8005bfa: 2201 movs r2, #1 8005bfc: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8005c00: 687b ldr r3, [r7, #4] 8005c02: 2201 movs r2, #1 8005c04: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8005c08: 2300 movs r3, #0 } 8005c0a: 4618 mov r0, r3 8005c0c: 3708 adds r7, #8 8005c0e: 46bd mov sp, r7 8005c10: bd80 pop {r7, pc} 08005c12 : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8005c12: b580 push {r7, lr} 8005c14: b082 sub sp, #8 8005c16: af00 add r7, sp, #0 8005c18: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8005c1a: 687b ldr r3, [r7, #4] 8005c1c: 2b00 cmp r3, #0 8005c1e: d101 bne.n 8005c24 { return HAL_ERROR; 8005c20: 2301 movs r3, #1 8005c22: e041 b.n 8005ca8 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8005c24: 687b ldr r3, [r7, #4] 8005c26: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8005c2a: b2db uxtb r3, r3 8005c2c: 2b00 cmp r3, #0 8005c2e: d106 bne.n 8005c3e { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8005c30: 687b ldr r3, [r7, #4] 8005c32: 2200 movs r2, #0 8005c34: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8005c38: 6878 ldr r0, [r7, #4] 8005c3a: f000 f839 bl 8005cb0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8005c3e: 687b ldr r3, [r7, #4] 8005c40: 2202 movs r2, #2 8005c42: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8005c46: 687b ldr r3, [r7, #4] 8005c48: 681a ldr r2, [r3, #0] 8005c4a: 687b ldr r3, [r7, #4] 8005c4c: 3304 adds r3, #4 8005c4e: 4619 mov r1, r3 8005c50: 4610 mov r0, r2 8005c52: f000 faef bl 8006234 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8005c56: 687b ldr r3, [r7, #4] 8005c58: 2201 movs r2, #1 8005c5a: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8005c5e: 687b ldr r3, [r7, #4] 8005c60: 2201 movs r2, #1 8005c62: f883 203e strb.w r2, [r3, #62] @ 0x3e 8005c66: 687b ldr r3, [r7, #4] 8005c68: 2201 movs r2, #1 8005c6a: f883 203f strb.w r2, [r3, #63] @ 0x3f 8005c6e: 687b ldr r3, [r7, #4] 8005c70: 2201 movs r2, #1 8005c72: f883 2040 strb.w r2, [r3, #64] @ 0x40 8005c76: 687b ldr r3, [r7, #4] 8005c78: 2201 movs r2, #1 8005c7a: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8005c7e: 687b ldr r3, [r7, #4] 8005c80: 2201 movs r2, #1 8005c82: f883 2042 strb.w r2, [r3, #66] @ 0x42 8005c86: 687b ldr r3, [r7, #4] 8005c88: 2201 movs r2, #1 8005c8a: f883 2043 strb.w r2, [r3, #67] @ 0x43 8005c8e: 687b ldr r3, [r7, #4] 8005c90: 2201 movs r2, #1 8005c92: f883 2044 strb.w r2, [r3, #68] @ 0x44 8005c96: 687b ldr r3, [r7, #4] 8005c98: 2201 movs r2, #1 8005c9a: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8005c9e: 687b ldr r3, [r7, #4] 8005ca0: 2201 movs r2, #1 8005ca2: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8005ca6: 2300 movs r3, #0 } 8005ca8: 4618 mov r0, r3 8005caa: 3708 adds r7, #8 8005cac: 46bd mov sp, r7 8005cae: bd80 pop {r7, pc} 08005cb0 : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 8005cb0: b480 push {r7} 8005cb2: b083 sub sp, #12 8005cb4: af00 add r7, sp, #0 8005cb6: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 8005cb8: bf00 nop 8005cba: 370c adds r7, #12 8005cbc: 46bd mov sp, r7 8005cbe: bc80 pop {r7} 8005cc0: 4770 bx lr ... 08005cc4 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8005cc4: b580 push {r7, lr} 8005cc6: b084 sub sp, #16 8005cc8: af00 add r7, sp, #0 8005cca: 6078 str r0, [r7, #4] 8005ccc: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8005cce: 683b ldr r3, [r7, #0] 8005cd0: 2b00 cmp r3, #0 8005cd2: d109 bne.n 8005ce8 8005cd4: 687b ldr r3, [r7, #4] 8005cd6: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8005cda: b2db uxtb r3, r3 8005cdc: 2b01 cmp r3, #1 8005cde: bf14 ite ne 8005ce0: 2301 movne r3, #1 8005ce2: 2300 moveq r3, #0 8005ce4: b2db uxtb r3, r3 8005ce6: e022 b.n 8005d2e 8005ce8: 683b ldr r3, [r7, #0] 8005cea: 2b04 cmp r3, #4 8005cec: d109 bne.n 8005d02 8005cee: 687b ldr r3, [r7, #4] 8005cf0: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8005cf4: b2db uxtb r3, r3 8005cf6: 2b01 cmp r3, #1 8005cf8: bf14 ite ne 8005cfa: 2301 movne r3, #1 8005cfc: 2300 moveq r3, #0 8005cfe: b2db uxtb r3, r3 8005d00: e015 b.n 8005d2e 8005d02: 683b ldr r3, [r7, #0] 8005d04: 2b08 cmp r3, #8 8005d06: d109 bne.n 8005d1c 8005d08: 687b ldr r3, [r7, #4] 8005d0a: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8005d0e: b2db uxtb r3, r3 8005d10: 2b01 cmp r3, #1 8005d12: bf14 ite ne 8005d14: 2301 movne r3, #1 8005d16: 2300 moveq r3, #0 8005d18: b2db uxtb r3, r3 8005d1a: e008 b.n 8005d2e 8005d1c: 687b ldr r3, [r7, #4] 8005d1e: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8005d22: b2db uxtb r3, r3 8005d24: 2b01 cmp r3, #1 8005d26: bf14 ite ne 8005d28: 2301 movne r3, #1 8005d2a: 2300 moveq r3, #0 8005d2c: b2db uxtb r3, r3 8005d2e: 2b00 cmp r3, #0 8005d30: d001 beq.n 8005d36 { return HAL_ERROR; 8005d32: 2301 movs r3, #1 8005d34: e05e b.n 8005df4 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8005d36: 683b ldr r3, [r7, #0] 8005d38: 2b00 cmp r3, #0 8005d3a: d104 bne.n 8005d46 8005d3c: 687b ldr r3, [r7, #4] 8005d3e: 2202 movs r2, #2 8005d40: f883 203e strb.w r2, [r3, #62] @ 0x3e 8005d44: e013 b.n 8005d6e 8005d46: 683b ldr r3, [r7, #0] 8005d48: 2b04 cmp r3, #4 8005d4a: d104 bne.n 8005d56 8005d4c: 687b ldr r3, [r7, #4] 8005d4e: 2202 movs r2, #2 8005d50: f883 203f strb.w r2, [r3, #63] @ 0x3f 8005d54: e00b b.n 8005d6e 8005d56: 683b ldr r3, [r7, #0] 8005d58: 2b08 cmp r3, #8 8005d5a: d104 bne.n 8005d66 8005d5c: 687b ldr r3, [r7, #4] 8005d5e: 2202 movs r2, #2 8005d60: f883 2040 strb.w r2, [r3, #64] @ 0x40 8005d64: e003 b.n 8005d6e 8005d66: 687b ldr r3, [r7, #4] 8005d68: 2202 movs r2, #2 8005d6a: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8005d6e: 687b ldr r3, [r7, #4] 8005d70: 681b ldr r3, [r3, #0] 8005d72: 2201 movs r2, #1 8005d74: 6839 ldr r1, [r7, #0] 8005d76: 4618 mov r0, r3 8005d78: f000 fce8 bl 800674c if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8005d7c: 687b ldr r3, [r7, #4] 8005d7e: 681b ldr r3, [r3, #0] 8005d80: 4a1e ldr r2, [pc, #120] @ (8005dfc ) 8005d82: 4293 cmp r3, r2 8005d84: d107 bne.n 8005d96 { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8005d86: 687b ldr r3, [r7, #4] 8005d88: 681b ldr r3, [r3, #0] 8005d8a: 6c5a ldr r2, [r3, #68] @ 0x44 8005d8c: 687b ldr r3, [r7, #4] 8005d8e: 681b ldr r3, [r3, #0] 8005d90: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8005d94: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8005d96: 687b ldr r3, [r7, #4] 8005d98: 681b ldr r3, [r3, #0] 8005d9a: 4a18 ldr r2, [pc, #96] @ (8005dfc ) 8005d9c: 4293 cmp r3, r2 8005d9e: d00e beq.n 8005dbe 8005da0: 687b ldr r3, [r7, #4] 8005da2: 681b ldr r3, [r3, #0] 8005da4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8005da8: d009 beq.n 8005dbe 8005daa: 687b ldr r3, [r7, #4] 8005dac: 681b ldr r3, [r3, #0] 8005dae: 4a14 ldr r2, [pc, #80] @ (8005e00 ) 8005db0: 4293 cmp r3, r2 8005db2: d004 beq.n 8005dbe 8005db4: 687b ldr r3, [r7, #4] 8005db6: 681b ldr r3, [r3, #0] 8005db8: 4a12 ldr r2, [pc, #72] @ (8005e04 ) 8005dba: 4293 cmp r3, r2 8005dbc: d111 bne.n 8005de2 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8005dbe: 687b ldr r3, [r7, #4] 8005dc0: 681b ldr r3, [r3, #0] 8005dc2: 689b ldr r3, [r3, #8] 8005dc4: f003 0307 and.w r3, r3, #7 8005dc8: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8005dca: 68fb ldr r3, [r7, #12] 8005dcc: 2b06 cmp r3, #6 8005dce: d010 beq.n 8005df2 { __HAL_TIM_ENABLE(htim); 8005dd0: 687b ldr r3, [r7, #4] 8005dd2: 681b ldr r3, [r3, #0] 8005dd4: 681a ldr r2, [r3, #0] 8005dd6: 687b ldr r3, [r7, #4] 8005dd8: 681b ldr r3, [r3, #0] 8005dda: f042 0201 orr.w r2, r2, #1 8005dde: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8005de0: e007 b.n 8005df2 } } else { __HAL_TIM_ENABLE(htim); 8005de2: 687b ldr r3, [r7, #4] 8005de4: 681b ldr r3, [r3, #0] 8005de6: 681a ldr r2, [r3, #0] 8005de8: 687b ldr r3, [r7, #4] 8005dea: 681b ldr r3, [r3, #0] 8005dec: f042 0201 orr.w r2, r2, #1 8005df0: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8005df2: 2300 movs r3, #0 } 8005df4: 4618 mov r0, r3 8005df6: 3710 adds r7, #16 8005df8: 46bd mov sp, r7 8005dfa: bd80 pop {r7, pc} 8005dfc: 40012c00 .word 0x40012c00 8005e00: 40000400 .word 0x40000400 8005e04: 40000800 .word 0x40000800 08005e08 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) { 8005e08: b580 push {r7, lr} 8005e0a: b082 sub sp, #8 8005e0c: af00 add r7, sp, #0 8005e0e: 6078 str r0, [r7, #4] 8005e10: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Disable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); 8005e12: 687b ldr r3, [r7, #4] 8005e14: 681b ldr r3, [r3, #0] 8005e16: 2200 movs r2, #0 8005e18: 6839 ldr r1, [r7, #0] 8005e1a: 4618 mov r0, r3 8005e1c: f000 fc96 bl 800674c if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8005e20: 687b ldr r3, [r7, #4] 8005e22: 681b ldr r3, [r3, #0] 8005e24: 4a29 ldr r2, [pc, #164] @ (8005ecc ) 8005e26: 4293 cmp r3, r2 8005e28: d117 bne.n 8005e5a { /* Disable the Main Output */ __HAL_TIM_MOE_DISABLE(htim); 8005e2a: 687b ldr r3, [r7, #4] 8005e2c: 681b ldr r3, [r3, #0] 8005e2e: 6a1a ldr r2, [r3, #32] 8005e30: f241 1311 movw r3, #4369 @ 0x1111 8005e34: 4013 ands r3, r2 8005e36: 2b00 cmp r3, #0 8005e38: d10f bne.n 8005e5a 8005e3a: 687b ldr r3, [r7, #4] 8005e3c: 681b ldr r3, [r3, #0] 8005e3e: 6a1a ldr r2, [r3, #32] 8005e40: f240 4344 movw r3, #1092 @ 0x444 8005e44: 4013 ands r3, r2 8005e46: 2b00 cmp r3, #0 8005e48: d107 bne.n 8005e5a 8005e4a: 687b ldr r3, [r7, #4] 8005e4c: 681b ldr r3, [r3, #0] 8005e4e: 6c5a ldr r2, [r3, #68] @ 0x44 8005e50: 687b ldr r3, [r7, #4] 8005e52: 681b ldr r3, [r3, #0] 8005e54: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8005e58: 645a str r2, [r3, #68] @ 0x44 } /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); 8005e5a: 687b ldr r3, [r7, #4] 8005e5c: 681b ldr r3, [r3, #0] 8005e5e: 6a1a ldr r2, [r3, #32] 8005e60: f241 1311 movw r3, #4369 @ 0x1111 8005e64: 4013 ands r3, r2 8005e66: 2b00 cmp r3, #0 8005e68: d10f bne.n 8005e8a 8005e6a: 687b ldr r3, [r7, #4] 8005e6c: 681b ldr r3, [r3, #0] 8005e6e: 6a1a ldr r2, [r3, #32] 8005e70: f240 4344 movw r3, #1092 @ 0x444 8005e74: 4013 ands r3, r2 8005e76: 2b00 cmp r3, #0 8005e78: d107 bne.n 8005e8a 8005e7a: 687b ldr r3, [r7, #4] 8005e7c: 681b ldr r3, [r3, #0] 8005e7e: 681a ldr r2, [r3, #0] 8005e80: 687b ldr r3, [r7, #4] 8005e82: 681b ldr r3, [r3, #0] 8005e84: f022 0201 bic.w r2, r2, #1 8005e88: 601a str r2, [r3, #0] /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 8005e8a: 683b ldr r3, [r7, #0] 8005e8c: 2b00 cmp r3, #0 8005e8e: d104 bne.n 8005e9a 8005e90: 687b ldr r3, [r7, #4] 8005e92: 2201 movs r2, #1 8005e94: f883 203e strb.w r2, [r3, #62] @ 0x3e 8005e98: e013 b.n 8005ec2 8005e9a: 683b ldr r3, [r7, #0] 8005e9c: 2b04 cmp r3, #4 8005e9e: d104 bne.n 8005eaa 8005ea0: 687b ldr r3, [r7, #4] 8005ea2: 2201 movs r2, #1 8005ea4: f883 203f strb.w r2, [r3, #63] @ 0x3f 8005ea8: e00b b.n 8005ec2 8005eaa: 683b ldr r3, [r7, #0] 8005eac: 2b08 cmp r3, #8 8005eae: d104 bne.n 8005eba 8005eb0: 687b ldr r3, [r7, #4] 8005eb2: 2201 movs r2, #1 8005eb4: f883 2040 strb.w r2, [r3, #64] @ 0x40 8005eb8: e003 b.n 8005ec2 8005eba: 687b ldr r3, [r7, #4] 8005ebc: 2201 movs r2, #1 8005ebe: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Return function status */ return HAL_OK; 8005ec2: 2300 movs r3, #0 } 8005ec4: 4618 mov r0, r3 8005ec6: 3708 adds r7, #8 8005ec8: 46bd mov sp, r7 8005eca: bd80 pop {r7, pc} 8005ecc: 40012c00 .word 0x40012c00 08005ed0 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8005ed0: b580 push {r7, lr} 8005ed2: b086 sub sp, #24 8005ed4: af00 add r7, sp, #0 8005ed6: 60f8 str r0, [r7, #12] 8005ed8: 60b9 str r1, [r7, #8] 8005eda: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8005edc: 2300 movs r3, #0 8005ede: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8005ee0: 68fb ldr r3, [r7, #12] 8005ee2: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8005ee6: 2b01 cmp r3, #1 8005ee8: d101 bne.n 8005eee 8005eea: 2302 movs r3, #2 8005eec: e0ae b.n 800604c 8005eee: 68fb ldr r3, [r7, #12] 8005ef0: 2201 movs r2, #1 8005ef2: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8005ef6: 687b ldr r3, [r7, #4] 8005ef8: 2b0c cmp r3, #12 8005efa: f200 809f bhi.w 800603c 8005efe: a201 add r2, pc, #4 @ (adr r2, 8005f04 ) 8005f00: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8005f04: 08005f39 .word 0x08005f39 8005f08: 0800603d .word 0x0800603d 8005f0c: 0800603d .word 0x0800603d 8005f10: 0800603d .word 0x0800603d 8005f14: 08005f79 .word 0x08005f79 8005f18: 0800603d .word 0x0800603d 8005f1c: 0800603d .word 0x0800603d 8005f20: 0800603d .word 0x0800603d 8005f24: 08005fbb .word 0x08005fbb 8005f28: 0800603d .word 0x0800603d 8005f2c: 0800603d .word 0x0800603d 8005f30: 0800603d .word 0x0800603d 8005f34: 08005ffb .word 0x08005ffb { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8005f38: 68fb ldr r3, [r7, #12] 8005f3a: 681b ldr r3, [r3, #0] 8005f3c: 68b9 ldr r1, [r7, #8] 8005f3e: 4618 mov r0, r3 8005f40: f000 f9e6 bl 8006310 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 8005f44: 68fb ldr r3, [r7, #12] 8005f46: 681b ldr r3, [r3, #0] 8005f48: 699a ldr r2, [r3, #24] 8005f4a: 68fb ldr r3, [r7, #12] 8005f4c: 681b ldr r3, [r3, #0] 8005f4e: f042 0208 orr.w r2, r2, #8 8005f52: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 8005f54: 68fb ldr r3, [r7, #12] 8005f56: 681b ldr r3, [r3, #0] 8005f58: 699a ldr r2, [r3, #24] 8005f5a: 68fb ldr r3, [r7, #12] 8005f5c: 681b ldr r3, [r3, #0] 8005f5e: f022 0204 bic.w r2, r2, #4 8005f62: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 8005f64: 68fb ldr r3, [r7, #12] 8005f66: 681b ldr r3, [r3, #0] 8005f68: 6999 ldr r1, [r3, #24] 8005f6a: 68bb ldr r3, [r7, #8] 8005f6c: 691a ldr r2, [r3, #16] 8005f6e: 68fb ldr r3, [r7, #12] 8005f70: 681b ldr r3, [r3, #0] 8005f72: 430a orrs r2, r1 8005f74: 619a str r2, [r3, #24] break; 8005f76: e064 b.n 8006042 { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8005f78: 68fb ldr r3, [r7, #12] 8005f7a: 681b ldr r3, [r3, #0] 8005f7c: 68b9 ldr r1, [r7, #8] 8005f7e: 4618 mov r0, r3 8005f80: f000 fa2c bl 80063dc /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 8005f84: 68fb ldr r3, [r7, #12] 8005f86: 681b ldr r3, [r3, #0] 8005f88: 699a ldr r2, [r3, #24] 8005f8a: 68fb ldr r3, [r7, #12] 8005f8c: 681b ldr r3, [r3, #0] 8005f8e: f442 6200 orr.w r2, r2, #2048 @ 0x800 8005f92: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 8005f94: 68fb ldr r3, [r7, #12] 8005f96: 681b ldr r3, [r3, #0] 8005f98: 699a ldr r2, [r3, #24] 8005f9a: 68fb ldr r3, [r7, #12] 8005f9c: 681b ldr r3, [r3, #0] 8005f9e: f422 6280 bic.w r2, r2, #1024 @ 0x400 8005fa2: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 8005fa4: 68fb ldr r3, [r7, #12] 8005fa6: 681b ldr r3, [r3, #0] 8005fa8: 6999 ldr r1, [r3, #24] 8005faa: 68bb ldr r3, [r7, #8] 8005fac: 691b ldr r3, [r3, #16] 8005fae: 021a lsls r2, r3, #8 8005fb0: 68fb ldr r3, [r7, #12] 8005fb2: 681b ldr r3, [r3, #0] 8005fb4: 430a orrs r2, r1 8005fb6: 619a str r2, [r3, #24] break; 8005fb8: e043 b.n 8006042 { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8005fba: 68fb ldr r3, [r7, #12] 8005fbc: 681b ldr r3, [r3, #0] 8005fbe: 68b9 ldr r1, [r7, #8] 8005fc0: 4618 mov r0, r3 8005fc2: f000 fa75 bl 80064b0 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 8005fc6: 68fb ldr r3, [r7, #12] 8005fc8: 681b ldr r3, [r3, #0] 8005fca: 69da ldr r2, [r3, #28] 8005fcc: 68fb ldr r3, [r7, #12] 8005fce: 681b ldr r3, [r3, #0] 8005fd0: f042 0208 orr.w r2, r2, #8 8005fd4: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 8005fd6: 68fb ldr r3, [r7, #12] 8005fd8: 681b ldr r3, [r3, #0] 8005fda: 69da ldr r2, [r3, #28] 8005fdc: 68fb ldr r3, [r7, #12] 8005fde: 681b ldr r3, [r3, #0] 8005fe0: f022 0204 bic.w r2, r2, #4 8005fe4: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 8005fe6: 68fb ldr r3, [r7, #12] 8005fe8: 681b ldr r3, [r3, #0] 8005fea: 69d9 ldr r1, [r3, #28] 8005fec: 68bb ldr r3, [r7, #8] 8005fee: 691a ldr r2, [r3, #16] 8005ff0: 68fb ldr r3, [r7, #12] 8005ff2: 681b ldr r3, [r3, #0] 8005ff4: 430a orrs r2, r1 8005ff6: 61da str r2, [r3, #28] break; 8005ff8: e023 b.n 8006042 { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 8005ffa: 68fb ldr r3, [r7, #12] 8005ffc: 681b ldr r3, [r3, #0] 8005ffe: 68b9 ldr r1, [r7, #8] 8006000: 4618 mov r0, r3 8006002: f000 fabf bl 8006584 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 8006006: 68fb ldr r3, [r7, #12] 8006008: 681b ldr r3, [r3, #0] 800600a: 69da ldr r2, [r3, #28] 800600c: 68fb ldr r3, [r7, #12] 800600e: 681b ldr r3, [r3, #0] 8006010: f442 6200 orr.w r2, r2, #2048 @ 0x800 8006014: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 8006016: 68fb ldr r3, [r7, #12] 8006018: 681b ldr r3, [r3, #0] 800601a: 69da ldr r2, [r3, #28] 800601c: 68fb ldr r3, [r7, #12] 800601e: 681b ldr r3, [r3, #0] 8006020: f422 6280 bic.w r2, r2, #1024 @ 0x400 8006024: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 8006026: 68fb ldr r3, [r7, #12] 8006028: 681b ldr r3, [r3, #0] 800602a: 69d9 ldr r1, [r3, #28] 800602c: 68bb ldr r3, [r7, #8] 800602e: 691b ldr r3, [r3, #16] 8006030: 021a lsls r2, r3, #8 8006032: 68fb ldr r3, [r7, #12] 8006034: 681b ldr r3, [r3, #0] 8006036: 430a orrs r2, r1 8006038: 61da str r2, [r3, #28] break; 800603a: e002 b.n 8006042 } default: status = HAL_ERROR; 800603c: 2301 movs r3, #1 800603e: 75fb strb r3, [r7, #23] break; 8006040: bf00 nop } __HAL_UNLOCK(htim); 8006042: 68fb ldr r3, [r7, #12] 8006044: 2200 movs r2, #0 8006046: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 800604a: 7dfb ldrb r3, [r7, #23] } 800604c: 4618 mov r0, r3 800604e: 3718 adds r7, #24 8006050: 46bd mov sp, r7 8006052: bd80 pop {r7, pc} 08006054 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 8006054: b580 push {r7, lr} 8006056: b084 sub sp, #16 8006058: af00 add r7, sp, #0 800605a: 6078 str r0, [r7, #4] 800605c: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 800605e: 2300 movs r3, #0 8006060: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 8006062: 687b ldr r3, [r7, #4] 8006064: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8006068: 2b01 cmp r3, #1 800606a: d101 bne.n 8006070 800606c: 2302 movs r3, #2 800606e: e0b4 b.n 80061da 8006070: 687b ldr r3, [r7, #4] 8006072: 2201 movs r2, #1 8006074: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 8006078: 687b ldr r3, [r7, #4] 800607a: 2202 movs r2, #2 800607c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 8006080: 687b ldr r3, [r7, #4] 8006082: 681b ldr r3, [r3, #0] 8006084: 689b ldr r3, [r3, #8] 8006086: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 8006088: 68bb ldr r3, [r7, #8] 800608a: f023 0377 bic.w r3, r3, #119 @ 0x77 800608e: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8006090: 68bb ldr r3, [r7, #8] 8006092: f423 437f bic.w r3, r3, #65280 @ 0xff00 8006096: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 8006098: 687b ldr r3, [r7, #4] 800609a: 681b ldr r3, [r3, #0] 800609c: 68ba ldr r2, [r7, #8] 800609e: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 80060a0: 683b ldr r3, [r7, #0] 80060a2: 681b ldr r3, [r3, #0] 80060a4: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 80060a8: d03e beq.n 8006128 80060aa: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 80060ae: f200 8087 bhi.w 80061c0 80060b2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80060b6: f000 8086 beq.w 80061c6 80060ba: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80060be: d87f bhi.n 80061c0 80060c0: 2b70 cmp r3, #112 @ 0x70 80060c2: d01a beq.n 80060fa 80060c4: 2b70 cmp r3, #112 @ 0x70 80060c6: d87b bhi.n 80061c0 80060c8: 2b60 cmp r3, #96 @ 0x60 80060ca: d050 beq.n 800616e 80060cc: 2b60 cmp r3, #96 @ 0x60 80060ce: d877 bhi.n 80061c0 80060d0: 2b50 cmp r3, #80 @ 0x50 80060d2: d03c beq.n 800614e 80060d4: 2b50 cmp r3, #80 @ 0x50 80060d6: d873 bhi.n 80061c0 80060d8: 2b40 cmp r3, #64 @ 0x40 80060da: d058 beq.n 800618e 80060dc: 2b40 cmp r3, #64 @ 0x40 80060de: d86f bhi.n 80061c0 80060e0: 2b30 cmp r3, #48 @ 0x30 80060e2: d064 beq.n 80061ae 80060e4: 2b30 cmp r3, #48 @ 0x30 80060e6: d86b bhi.n 80061c0 80060e8: 2b20 cmp r3, #32 80060ea: d060 beq.n 80061ae 80060ec: 2b20 cmp r3, #32 80060ee: d867 bhi.n 80061c0 80060f0: 2b00 cmp r3, #0 80060f2: d05c beq.n 80061ae 80060f4: 2b10 cmp r3, #16 80060f6: d05a beq.n 80061ae 80060f8: e062 b.n 80061c0 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 80060fa: 687b ldr r3, [r7, #4] 80060fc: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 80060fe: 683b ldr r3, [r7, #0] 8006100: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8006102: 683b ldr r3, [r7, #0] 8006104: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8006106: 683b ldr r3, [r7, #0] 8006108: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 800610a: f000 fb00 bl 800670e /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 800610e: 687b ldr r3, [r7, #4] 8006110: 681b ldr r3, [r3, #0] 8006112: 689b ldr r3, [r3, #8] 8006114: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 8006116: 68bb ldr r3, [r7, #8] 8006118: f043 0377 orr.w r3, r3, #119 @ 0x77 800611c: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 800611e: 687b ldr r3, [r7, #4] 8006120: 681b ldr r3, [r3, #0] 8006122: 68ba ldr r2, [r7, #8] 8006124: 609a str r2, [r3, #8] break; 8006126: e04f b.n 80061c8 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8006128: 687b ldr r3, [r7, #4] 800612a: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 800612c: 683b ldr r3, [r7, #0] 800612e: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8006130: 683b ldr r3, [r7, #0] 8006132: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8006134: 683b ldr r3, [r7, #0] 8006136: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8006138: f000 fae9 bl 800670e /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 800613c: 687b ldr r3, [r7, #4] 800613e: 681b ldr r3, [r3, #0] 8006140: 689a ldr r2, [r3, #8] 8006142: 687b ldr r3, [r7, #4] 8006144: 681b ldr r3, [r3, #0] 8006146: f442 4280 orr.w r2, r2, #16384 @ 0x4000 800614a: 609a str r2, [r3, #8] break; 800614c: e03c b.n 80061c8 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 800614e: 687b ldr r3, [r7, #4] 8006150: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8006152: 683b ldr r3, [r7, #0] 8006154: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8006156: 683b ldr r3, [r7, #0] 8006158: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 800615a: 461a mov r2, r3 800615c: f000 fa60 bl 8006620 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 8006160: 687b ldr r3, [r7, #4] 8006162: 681b ldr r3, [r3, #0] 8006164: 2150 movs r1, #80 @ 0x50 8006166: 4618 mov r0, r3 8006168: f000 fab7 bl 80066da break; 800616c: e02c b.n 80061c8 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 800616e: 687b ldr r3, [r7, #4] 8006170: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8006172: 683b ldr r3, [r7, #0] 8006174: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8006176: 683b ldr r3, [r7, #0] 8006178: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 800617a: 461a mov r2, r3 800617c: f000 fa7e bl 800667c TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 8006180: 687b ldr r3, [r7, #4] 8006182: 681b ldr r3, [r3, #0] 8006184: 2160 movs r1, #96 @ 0x60 8006186: 4618 mov r0, r3 8006188: f000 faa7 bl 80066da break; 800618c: e01c b.n 80061c8 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 800618e: 687b ldr r3, [r7, #4] 8006190: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8006192: 683b ldr r3, [r7, #0] 8006194: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8006196: 683b ldr r3, [r7, #0] 8006198: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 800619a: 461a mov r2, r3 800619c: f000 fa40 bl 8006620 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 80061a0: 687b ldr r3, [r7, #4] 80061a2: 681b ldr r3, [r3, #0] 80061a4: 2140 movs r1, #64 @ 0x40 80061a6: 4618 mov r0, r3 80061a8: f000 fa97 bl 80066da break; 80061ac: e00c b.n 80061c8 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 80061ae: 687b ldr r3, [r7, #4] 80061b0: 681a ldr r2, [r3, #0] 80061b2: 683b ldr r3, [r7, #0] 80061b4: 681b ldr r3, [r3, #0] 80061b6: 4619 mov r1, r3 80061b8: 4610 mov r0, r2 80061ba: f000 fa8e bl 80066da break; 80061be: e003 b.n 80061c8 } default: status = HAL_ERROR; 80061c0: 2301 movs r3, #1 80061c2: 73fb strb r3, [r7, #15] break; 80061c4: e000 b.n 80061c8 break; 80061c6: bf00 nop } htim->State = HAL_TIM_STATE_READY; 80061c8: 687b ldr r3, [r7, #4] 80061ca: 2201 movs r2, #1 80061cc: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 80061d0: 687b ldr r3, [r7, #4] 80061d2: 2200 movs r2, #0 80061d4: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 80061d8: 7bfb ldrb r3, [r7, #15] } 80061da: 4618 mov r0, r3 80061dc: 3710 adds r7, #16 80061de: 46bd mov sp, r7 80061e0: bd80 pop {r7, pc} 080061e2 : * @arg TIM_CHANNEL_5: TIM Channel 5 * @arg TIM_CHANNEL_6: TIM Channel 6 * @retval TIM Channel state */ HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel) { 80061e2: b480 push {r7} 80061e4: b085 sub sp, #20 80061e6: af00 add r7, sp, #0 80061e8: 6078 str r0, [r7, #4] 80061ea: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef channel_state; /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); 80061ec: 683b ldr r3, [r7, #0] 80061ee: 2b00 cmp r3, #0 80061f0: d104 bne.n 80061fc 80061f2: 687b ldr r3, [r7, #4] 80061f4: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80061f8: b2db uxtb r3, r3 80061fa: e013 b.n 8006224 80061fc: 683b ldr r3, [r7, #0] 80061fe: 2b04 cmp r3, #4 8006200: d104 bne.n 800620c 8006202: 687b ldr r3, [r7, #4] 8006204: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8006208: b2db uxtb r3, r3 800620a: e00b b.n 8006224 800620c: 683b ldr r3, [r7, #0] 800620e: 2b08 cmp r3, #8 8006210: d104 bne.n 800621c 8006212: 687b ldr r3, [r7, #4] 8006214: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8006218: b2db uxtb r3, r3 800621a: e003 b.n 8006224 800621c: 687b ldr r3, [r7, #4] 800621e: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8006222: b2db uxtb r3, r3 8006224: 73fb strb r3, [r7, #15] return channel_state; 8006226: 7bfb ldrb r3, [r7, #15] } 8006228: 4618 mov r0, r3 800622a: 3714 adds r7, #20 800622c: 46bd mov sp, r7 800622e: bc80 pop {r7} 8006230: 4770 bx lr ... 08006234 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 8006234: b480 push {r7} 8006236: b085 sub sp, #20 8006238: af00 add r7, sp, #0 800623a: 6078 str r0, [r7, #4] 800623c: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 800623e: 687b ldr r3, [r7, #4] 8006240: 681b ldr r3, [r3, #0] 8006242: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8006244: 687b ldr r3, [r7, #4] 8006246: 4a2f ldr r2, [pc, #188] @ (8006304 ) 8006248: 4293 cmp r3, r2 800624a: d00b beq.n 8006264 800624c: 687b ldr r3, [r7, #4] 800624e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8006252: d007 beq.n 8006264 8006254: 687b ldr r3, [r7, #4] 8006256: 4a2c ldr r2, [pc, #176] @ (8006308 ) 8006258: 4293 cmp r3, r2 800625a: d003 beq.n 8006264 800625c: 687b ldr r3, [r7, #4] 800625e: 4a2b ldr r2, [pc, #172] @ (800630c ) 8006260: 4293 cmp r3, r2 8006262: d108 bne.n 8006276 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8006264: 68fb ldr r3, [r7, #12] 8006266: f023 0370 bic.w r3, r3, #112 @ 0x70 800626a: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 800626c: 683b ldr r3, [r7, #0] 800626e: 685b ldr r3, [r3, #4] 8006270: 68fa ldr r2, [r7, #12] 8006272: 4313 orrs r3, r2 8006274: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8006276: 687b ldr r3, [r7, #4] 8006278: 4a22 ldr r2, [pc, #136] @ (8006304 ) 800627a: 4293 cmp r3, r2 800627c: d00b beq.n 8006296 800627e: 687b ldr r3, [r7, #4] 8006280: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8006284: d007 beq.n 8006296 8006286: 687b ldr r3, [r7, #4] 8006288: 4a1f ldr r2, [pc, #124] @ (8006308 ) 800628a: 4293 cmp r3, r2 800628c: d003 beq.n 8006296 800628e: 687b ldr r3, [r7, #4] 8006290: 4a1e ldr r2, [pc, #120] @ (800630c ) 8006292: 4293 cmp r3, r2 8006294: d108 bne.n 80062a8 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 8006296: 68fb ldr r3, [r7, #12] 8006298: f423 7340 bic.w r3, r3, #768 @ 0x300 800629c: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 800629e: 683b ldr r3, [r7, #0] 80062a0: 68db ldr r3, [r3, #12] 80062a2: 68fa ldr r2, [r7, #12] 80062a4: 4313 orrs r3, r2 80062a6: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80062a8: 68fb ldr r3, [r7, #12] 80062aa: f023 0280 bic.w r2, r3, #128 @ 0x80 80062ae: 683b ldr r3, [r7, #0] 80062b0: 695b ldr r3, [r3, #20] 80062b2: 4313 orrs r3, r2 80062b4: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 80062b6: 687b ldr r3, [r7, #4] 80062b8: 68fa ldr r2, [r7, #12] 80062ba: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80062bc: 683b ldr r3, [r7, #0] 80062be: 689a ldr r2, [r3, #8] 80062c0: 687b ldr r3, [r7, #4] 80062c2: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 80062c4: 683b ldr r3, [r7, #0] 80062c6: 681a ldr r2, [r3, #0] 80062c8: 687b ldr r3, [r7, #4] 80062ca: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 80062cc: 687b ldr r3, [r7, #4] 80062ce: 4a0d ldr r2, [pc, #52] @ (8006304 ) 80062d0: 4293 cmp r3, r2 80062d2: d103 bne.n 80062dc { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 80062d4: 683b ldr r3, [r7, #0] 80062d6: 691a ldr r2, [r3, #16] 80062d8: 687b ldr r3, [r7, #4] 80062da: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 80062dc: 687b ldr r3, [r7, #4] 80062de: 2201 movs r2, #1 80062e0: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 80062e2: 687b ldr r3, [r7, #4] 80062e4: 691b ldr r3, [r3, #16] 80062e6: f003 0301 and.w r3, r3, #1 80062ea: 2b00 cmp r3, #0 80062ec: d005 beq.n 80062fa { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 80062ee: 687b ldr r3, [r7, #4] 80062f0: 691b ldr r3, [r3, #16] 80062f2: f023 0201 bic.w r2, r3, #1 80062f6: 687b ldr r3, [r7, #4] 80062f8: 611a str r2, [r3, #16] } } 80062fa: bf00 nop 80062fc: 3714 adds r7, #20 80062fe: 46bd mov sp, r7 8006300: bc80 pop {r7} 8006302: 4770 bx lr 8006304: 40012c00 .word 0x40012c00 8006308: 40000400 .word 0x40000400 800630c: 40000800 .word 0x40000800 08006310 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8006310: b480 push {r7} 8006312: b087 sub sp, #28 8006314: af00 add r7, sp, #0 8006316: 6078 str r0, [r7, #4] 8006318: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800631a: 687b ldr r3, [r7, #4] 800631c: 6a1b ldr r3, [r3, #32] 800631e: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 8006320: 687b ldr r3, [r7, #4] 8006322: 6a1b ldr r3, [r3, #32] 8006324: f023 0201 bic.w r2, r3, #1 8006328: 687b ldr r3, [r7, #4] 800632a: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 800632c: 687b ldr r3, [r7, #4] 800632e: 685b ldr r3, [r3, #4] 8006330: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8006332: 687b ldr r3, [r7, #4] 8006334: 699b ldr r3, [r3, #24] 8006336: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 8006338: 68fb ldr r3, [r7, #12] 800633a: f023 0370 bic.w r3, r3, #112 @ 0x70 800633e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 8006340: 68fb ldr r3, [r7, #12] 8006342: f023 0303 bic.w r3, r3, #3 8006346: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8006348: 683b ldr r3, [r7, #0] 800634a: 681b ldr r3, [r3, #0] 800634c: 68fa ldr r2, [r7, #12] 800634e: 4313 orrs r3, r2 8006350: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 8006352: 697b ldr r3, [r7, #20] 8006354: f023 0302 bic.w r3, r3, #2 8006358: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 800635a: 683b ldr r3, [r7, #0] 800635c: 689b ldr r3, [r3, #8] 800635e: 697a ldr r2, [r7, #20] 8006360: 4313 orrs r3, r2 8006362: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 8006364: 687b ldr r3, [r7, #4] 8006366: 4a1c ldr r2, [pc, #112] @ (80063d8 ) 8006368: 4293 cmp r3, r2 800636a: d10c bne.n 8006386 { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 800636c: 697b ldr r3, [r7, #20] 800636e: f023 0308 bic.w r3, r3, #8 8006372: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 8006374: 683b ldr r3, [r7, #0] 8006376: 68db ldr r3, [r3, #12] 8006378: 697a ldr r2, [r7, #20] 800637a: 4313 orrs r3, r2 800637c: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 800637e: 697b ldr r3, [r7, #20] 8006380: f023 0304 bic.w r3, r3, #4 8006384: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8006386: 687b ldr r3, [r7, #4] 8006388: 4a13 ldr r2, [pc, #76] @ (80063d8 ) 800638a: 4293 cmp r3, r2 800638c: d111 bne.n 80063b2 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 800638e: 693b ldr r3, [r7, #16] 8006390: f423 7380 bic.w r3, r3, #256 @ 0x100 8006394: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 8006396: 693b ldr r3, [r7, #16] 8006398: f423 7300 bic.w r3, r3, #512 @ 0x200 800639c: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 800639e: 683b ldr r3, [r7, #0] 80063a0: 695b ldr r3, [r3, #20] 80063a2: 693a ldr r2, [r7, #16] 80063a4: 4313 orrs r3, r2 80063a6: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 80063a8: 683b ldr r3, [r7, #0] 80063aa: 699b ldr r3, [r3, #24] 80063ac: 693a ldr r2, [r7, #16] 80063ae: 4313 orrs r3, r2 80063b0: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80063b2: 687b ldr r3, [r7, #4] 80063b4: 693a ldr r2, [r7, #16] 80063b6: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80063b8: 687b ldr r3, [r7, #4] 80063ba: 68fa ldr r2, [r7, #12] 80063bc: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 80063be: 683b ldr r3, [r7, #0] 80063c0: 685a ldr r2, [r3, #4] 80063c2: 687b ldr r3, [r7, #4] 80063c4: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80063c6: 687b ldr r3, [r7, #4] 80063c8: 697a ldr r2, [r7, #20] 80063ca: 621a str r2, [r3, #32] } 80063cc: bf00 nop 80063ce: 371c adds r7, #28 80063d0: 46bd mov sp, r7 80063d2: bc80 pop {r7} 80063d4: 4770 bx lr 80063d6: bf00 nop 80063d8: 40012c00 .word 0x40012c00 080063dc : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80063dc: b480 push {r7} 80063de: b087 sub sp, #28 80063e0: af00 add r7, sp, #0 80063e2: 6078 str r0, [r7, #4] 80063e4: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80063e6: 687b ldr r3, [r7, #4] 80063e8: 6a1b ldr r3, [r3, #32] 80063ea: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 80063ec: 687b ldr r3, [r7, #4] 80063ee: 6a1b ldr r3, [r3, #32] 80063f0: f023 0210 bic.w r2, r3, #16 80063f4: 687b ldr r3, [r7, #4] 80063f6: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80063f8: 687b ldr r3, [r7, #4] 80063fa: 685b ldr r3, [r3, #4] 80063fc: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 80063fe: 687b ldr r3, [r7, #4] 8006400: 699b ldr r3, [r3, #24] 8006402: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8006404: 68fb ldr r3, [r7, #12] 8006406: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800640a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 800640c: 68fb ldr r3, [r7, #12] 800640e: f423 7340 bic.w r3, r3, #768 @ 0x300 8006412: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8006414: 683b ldr r3, [r7, #0] 8006416: 681b ldr r3, [r3, #0] 8006418: 021b lsls r3, r3, #8 800641a: 68fa ldr r2, [r7, #12] 800641c: 4313 orrs r3, r2 800641e: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 8006420: 697b ldr r3, [r7, #20] 8006422: f023 0320 bic.w r3, r3, #32 8006426: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 8006428: 683b ldr r3, [r7, #0] 800642a: 689b ldr r3, [r3, #8] 800642c: 011b lsls r3, r3, #4 800642e: 697a ldr r2, [r7, #20] 8006430: 4313 orrs r3, r2 8006432: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8006434: 687b ldr r3, [r7, #4] 8006436: 4a1d ldr r2, [pc, #116] @ (80064ac ) 8006438: 4293 cmp r3, r2 800643a: d10d bne.n 8006458 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 800643c: 697b ldr r3, [r7, #20] 800643e: f023 0380 bic.w r3, r3, #128 @ 0x80 8006442: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 8006444: 683b ldr r3, [r7, #0] 8006446: 68db ldr r3, [r3, #12] 8006448: 011b lsls r3, r3, #4 800644a: 697a ldr r2, [r7, #20] 800644c: 4313 orrs r3, r2 800644e: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8006450: 697b ldr r3, [r7, #20] 8006452: f023 0340 bic.w r3, r3, #64 @ 0x40 8006456: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8006458: 687b ldr r3, [r7, #4] 800645a: 4a14 ldr r2, [pc, #80] @ (80064ac ) 800645c: 4293 cmp r3, r2 800645e: d113 bne.n 8006488 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 8006460: 693b ldr r3, [r7, #16] 8006462: f423 6380 bic.w r3, r3, #1024 @ 0x400 8006466: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 8006468: 693b ldr r3, [r7, #16] 800646a: f423 6300 bic.w r3, r3, #2048 @ 0x800 800646e: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 8006470: 683b ldr r3, [r7, #0] 8006472: 695b ldr r3, [r3, #20] 8006474: 009b lsls r3, r3, #2 8006476: 693a ldr r2, [r7, #16] 8006478: 4313 orrs r3, r2 800647a: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 800647c: 683b ldr r3, [r7, #0] 800647e: 699b ldr r3, [r3, #24] 8006480: 009b lsls r3, r3, #2 8006482: 693a ldr r2, [r7, #16] 8006484: 4313 orrs r3, r2 8006486: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8006488: 687b ldr r3, [r7, #4] 800648a: 693a ldr r2, [r7, #16] 800648c: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 800648e: 687b ldr r3, [r7, #4] 8006490: 68fa ldr r2, [r7, #12] 8006492: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 8006494: 683b ldr r3, [r7, #0] 8006496: 685a ldr r2, [r3, #4] 8006498: 687b ldr r3, [r7, #4] 800649a: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 800649c: 687b ldr r3, [r7, #4] 800649e: 697a ldr r2, [r7, #20] 80064a0: 621a str r2, [r3, #32] } 80064a2: bf00 nop 80064a4: 371c adds r7, #28 80064a6: 46bd mov sp, r7 80064a8: bc80 pop {r7} 80064aa: 4770 bx lr 80064ac: 40012c00 .word 0x40012c00 080064b0 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80064b0: b480 push {r7} 80064b2: b087 sub sp, #28 80064b4: af00 add r7, sp, #0 80064b6: 6078 str r0, [r7, #4] 80064b8: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80064ba: 687b ldr r3, [r7, #4] 80064bc: 6a1b ldr r3, [r3, #32] 80064be: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 80064c0: 687b ldr r3, [r7, #4] 80064c2: 6a1b ldr r3, [r3, #32] 80064c4: f423 7280 bic.w r2, r3, #256 @ 0x100 80064c8: 687b ldr r3, [r7, #4] 80064ca: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80064cc: 687b ldr r3, [r7, #4] 80064ce: 685b ldr r3, [r3, #4] 80064d0: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80064d2: 687b ldr r3, [r7, #4] 80064d4: 69db ldr r3, [r3, #28] 80064d6: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 80064d8: 68fb ldr r3, [r7, #12] 80064da: f023 0370 bic.w r3, r3, #112 @ 0x70 80064de: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 80064e0: 68fb ldr r3, [r7, #12] 80064e2: f023 0303 bic.w r3, r3, #3 80064e6: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 80064e8: 683b ldr r3, [r7, #0] 80064ea: 681b ldr r3, [r3, #0] 80064ec: 68fa ldr r2, [r7, #12] 80064ee: 4313 orrs r3, r2 80064f0: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 80064f2: 697b ldr r3, [r7, #20] 80064f4: f423 7300 bic.w r3, r3, #512 @ 0x200 80064f8: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 80064fa: 683b ldr r3, [r7, #0] 80064fc: 689b ldr r3, [r3, #8] 80064fe: 021b lsls r3, r3, #8 8006500: 697a ldr r2, [r7, #20] 8006502: 4313 orrs r3, r2 8006504: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 8006506: 687b ldr r3, [r7, #4] 8006508: 4a1d ldr r2, [pc, #116] @ (8006580 ) 800650a: 4293 cmp r3, r2 800650c: d10d bne.n 800652a { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 800650e: 697b ldr r3, [r7, #20] 8006510: f423 6300 bic.w r3, r3, #2048 @ 0x800 8006514: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 8006516: 683b ldr r3, [r7, #0] 8006518: 68db ldr r3, [r3, #12] 800651a: 021b lsls r3, r3, #8 800651c: 697a ldr r2, [r7, #20] 800651e: 4313 orrs r3, r2 8006520: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 8006522: 697b ldr r3, [r7, #20] 8006524: f423 6380 bic.w r3, r3, #1024 @ 0x400 8006528: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 800652a: 687b ldr r3, [r7, #4] 800652c: 4a14 ldr r2, [pc, #80] @ (8006580 ) 800652e: 4293 cmp r3, r2 8006530: d113 bne.n 800655a /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 8006532: 693b ldr r3, [r7, #16] 8006534: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8006538: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 800653a: 693b ldr r3, [r7, #16] 800653c: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8006540: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 8006542: 683b ldr r3, [r7, #0] 8006544: 695b ldr r3, [r3, #20] 8006546: 011b lsls r3, r3, #4 8006548: 693a ldr r2, [r7, #16] 800654a: 4313 orrs r3, r2 800654c: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 800654e: 683b ldr r3, [r7, #0] 8006550: 699b ldr r3, [r3, #24] 8006552: 011b lsls r3, r3, #4 8006554: 693a ldr r2, [r7, #16] 8006556: 4313 orrs r3, r2 8006558: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800655a: 687b ldr r3, [r7, #4] 800655c: 693a ldr r2, [r7, #16] 800655e: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8006560: 687b ldr r3, [r7, #4] 8006562: 68fa ldr r2, [r7, #12] 8006564: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 8006566: 683b ldr r3, [r7, #0] 8006568: 685a ldr r2, [r3, #4] 800656a: 687b ldr r3, [r7, #4] 800656c: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 800656e: 687b ldr r3, [r7, #4] 8006570: 697a ldr r2, [r7, #20] 8006572: 621a str r2, [r3, #32] } 8006574: bf00 nop 8006576: 371c adds r7, #28 8006578: 46bd mov sp, r7 800657a: bc80 pop {r7} 800657c: 4770 bx lr 800657e: bf00 nop 8006580: 40012c00 .word 0x40012c00 08006584 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8006584: b480 push {r7} 8006586: b087 sub sp, #28 8006588: af00 add r7, sp, #0 800658a: 6078 str r0, [r7, #4] 800658c: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800658e: 687b ldr r3, [r7, #4] 8006590: 6a1b ldr r3, [r3, #32] 8006592: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 8006594: 687b ldr r3, [r7, #4] 8006596: 6a1b ldr r3, [r3, #32] 8006598: f423 5280 bic.w r2, r3, #4096 @ 0x1000 800659c: 687b ldr r3, [r7, #4] 800659e: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80065a0: 687b ldr r3, [r7, #4] 80065a2: 685b ldr r3, [r3, #4] 80065a4: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80065a6: 687b ldr r3, [r7, #4] 80065a8: 69db ldr r3, [r3, #28] 80065aa: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 80065ac: 68fb ldr r3, [r7, #12] 80065ae: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80065b2: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 80065b4: 68fb ldr r3, [r7, #12] 80065b6: f423 7340 bic.w r3, r3, #768 @ 0x300 80065ba: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 80065bc: 683b ldr r3, [r7, #0] 80065be: 681b ldr r3, [r3, #0] 80065c0: 021b lsls r3, r3, #8 80065c2: 68fa ldr r2, [r7, #12] 80065c4: 4313 orrs r3, r2 80065c6: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 80065c8: 693b ldr r3, [r7, #16] 80065ca: f423 5300 bic.w r3, r3, #8192 @ 0x2000 80065ce: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 80065d0: 683b ldr r3, [r7, #0] 80065d2: 689b ldr r3, [r3, #8] 80065d4: 031b lsls r3, r3, #12 80065d6: 693a ldr r2, [r7, #16] 80065d8: 4313 orrs r3, r2 80065da: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 80065dc: 687b ldr r3, [r7, #4] 80065de: 4a0f ldr r2, [pc, #60] @ (800661c ) 80065e0: 4293 cmp r3, r2 80065e2: d109 bne.n 80065f8 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 80065e4: 697b ldr r3, [r7, #20] 80065e6: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80065ea: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 80065ec: 683b ldr r3, [r7, #0] 80065ee: 695b ldr r3, [r3, #20] 80065f0: 019b lsls r3, r3, #6 80065f2: 697a ldr r2, [r7, #20] 80065f4: 4313 orrs r3, r2 80065f6: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80065f8: 687b ldr r3, [r7, #4] 80065fa: 697a ldr r2, [r7, #20] 80065fc: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 80065fe: 687b ldr r3, [r7, #4] 8006600: 68fa ldr r2, [r7, #12] 8006602: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8006604: 683b ldr r3, [r7, #0] 8006606: 685a ldr r2, [r3, #4] 8006608: 687b ldr r3, [r7, #4] 800660a: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 800660c: 687b ldr r3, [r7, #4] 800660e: 693a ldr r2, [r7, #16] 8006610: 621a str r2, [r3, #32] } 8006612: bf00 nop 8006614: 371c adds r7, #28 8006616: 46bd mov sp, r7 8006618: bc80 pop {r7} 800661a: 4770 bx lr 800661c: 40012c00 .word 0x40012c00 08006620 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8006620: b480 push {r7} 8006622: b087 sub sp, #28 8006624: af00 add r7, sp, #0 8006626: 60f8 str r0, [r7, #12] 8006628: 60b9 str r1, [r7, #8] 800662a: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 800662c: 68fb ldr r3, [r7, #12] 800662e: 6a1b ldr r3, [r3, #32] 8006630: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 8006632: 68fb ldr r3, [r7, #12] 8006634: 6a1b ldr r3, [r3, #32] 8006636: f023 0201 bic.w r2, r3, #1 800663a: 68fb ldr r3, [r7, #12] 800663c: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 800663e: 68fb ldr r3, [r7, #12] 8006640: 699b ldr r3, [r3, #24] 8006642: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 8006644: 693b ldr r3, [r7, #16] 8006646: f023 03f0 bic.w r3, r3, #240 @ 0xf0 800664a: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 800664c: 687b ldr r3, [r7, #4] 800664e: 011b lsls r3, r3, #4 8006650: 693a ldr r2, [r7, #16] 8006652: 4313 orrs r3, r2 8006654: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 8006656: 697b ldr r3, [r7, #20] 8006658: f023 030a bic.w r3, r3, #10 800665c: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 800665e: 697a ldr r2, [r7, #20] 8006660: 68bb ldr r3, [r7, #8] 8006662: 4313 orrs r3, r2 8006664: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 8006666: 68fb ldr r3, [r7, #12] 8006668: 693a ldr r2, [r7, #16] 800666a: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 800666c: 68fb ldr r3, [r7, #12] 800666e: 697a ldr r2, [r7, #20] 8006670: 621a str r2, [r3, #32] } 8006672: bf00 nop 8006674: 371c adds r7, #28 8006676: 46bd mov sp, r7 8006678: bc80 pop {r7} 800667a: 4770 bx lr 0800667c : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 800667c: b480 push {r7} 800667e: b087 sub sp, #28 8006680: af00 add r7, sp, #0 8006682: 60f8 str r0, [r7, #12] 8006684: 60b9 str r1, [r7, #8] 8006686: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 8006688: 68fb ldr r3, [r7, #12] 800668a: 6a1b ldr r3, [r3, #32] 800668c: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 800668e: 68fb ldr r3, [r7, #12] 8006690: 6a1b ldr r3, [r3, #32] 8006692: f023 0210 bic.w r2, r3, #16 8006696: 68fb ldr r3, [r7, #12] 8006698: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 800669a: 68fb ldr r3, [r7, #12] 800669c: 699b ldr r3, [r3, #24] 800669e: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 80066a0: 693b ldr r3, [r7, #16] 80066a2: f423 4370 bic.w r3, r3, #61440 @ 0xf000 80066a6: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 80066a8: 687b ldr r3, [r7, #4] 80066aa: 031b lsls r3, r3, #12 80066ac: 693a ldr r2, [r7, #16] 80066ae: 4313 orrs r3, r2 80066b0: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 80066b2: 697b ldr r3, [r7, #20] 80066b4: f023 03a0 bic.w r3, r3, #160 @ 0xa0 80066b8: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 80066ba: 68bb ldr r3, [r7, #8] 80066bc: 011b lsls r3, r3, #4 80066be: 697a ldr r2, [r7, #20] 80066c0: 4313 orrs r3, r2 80066c2: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 80066c4: 68fb ldr r3, [r7, #12] 80066c6: 693a ldr r2, [r7, #16] 80066c8: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 80066ca: 68fb ldr r3, [r7, #12] 80066cc: 697a ldr r2, [r7, #20] 80066ce: 621a str r2, [r3, #32] } 80066d0: bf00 nop 80066d2: 371c adds r7, #28 80066d4: 46bd mov sp, r7 80066d6: bc80 pop {r7} 80066d8: 4770 bx lr 080066da : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 80066da: b480 push {r7} 80066dc: b085 sub sp, #20 80066de: af00 add r7, sp, #0 80066e0: 6078 str r0, [r7, #4] 80066e2: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 80066e4: 687b ldr r3, [r7, #4] 80066e6: 689b ldr r3, [r3, #8] 80066e8: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 80066ea: 68fb ldr r3, [r7, #12] 80066ec: f023 0370 bic.w r3, r3, #112 @ 0x70 80066f0: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 80066f2: 683a ldr r2, [r7, #0] 80066f4: 68fb ldr r3, [r7, #12] 80066f6: 4313 orrs r3, r2 80066f8: f043 0307 orr.w r3, r3, #7 80066fc: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 80066fe: 687b ldr r3, [r7, #4] 8006700: 68fa ldr r2, [r7, #12] 8006702: 609a str r2, [r3, #8] } 8006704: bf00 nop 8006706: 3714 adds r7, #20 8006708: 46bd mov sp, r7 800670a: bc80 pop {r7} 800670c: 4770 bx lr 0800670e : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 800670e: b480 push {r7} 8006710: b087 sub sp, #28 8006712: af00 add r7, sp, #0 8006714: 60f8 str r0, [r7, #12] 8006716: 60b9 str r1, [r7, #8] 8006718: 607a str r2, [r7, #4] 800671a: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 800671c: 68fb ldr r3, [r7, #12] 800671e: 689b ldr r3, [r3, #8] 8006720: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8006722: 697b ldr r3, [r7, #20] 8006724: f423 437f bic.w r3, r3, #65280 @ 0xff00 8006728: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 800672a: 683b ldr r3, [r7, #0] 800672c: 021a lsls r2, r3, #8 800672e: 687b ldr r3, [r7, #4] 8006730: 431a orrs r2, r3 8006732: 68bb ldr r3, [r7, #8] 8006734: 4313 orrs r3, r2 8006736: 697a ldr r2, [r7, #20] 8006738: 4313 orrs r3, r2 800673a: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 800673c: 68fb ldr r3, [r7, #12] 800673e: 697a ldr r2, [r7, #20] 8006740: 609a str r2, [r3, #8] } 8006742: bf00 nop 8006744: 371c adds r7, #28 8006746: 46bd mov sp, r7 8006748: bc80 pop {r7} 800674a: 4770 bx lr 0800674c : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 800674c: b480 push {r7} 800674e: b087 sub sp, #28 8006750: af00 add r7, sp, #0 8006752: 60f8 str r0, [r7, #12] 8006754: 60b9 str r1, [r7, #8] 8006756: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 8006758: 68bb ldr r3, [r7, #8] 800675a: f003 031f and.w r3, r3, #31 800675e: 2201 movs r2, #1 8006760: fa02 f303 lsl.w r3, r2, r3 8006764: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 8006766: 68fb ldr r3, [r7, #12] 8006768: 6a1a ldr r2, [r3, #32] 800676a: 697b ldr r3, [r7, #20] 800676c: 43db mvns r3, r3 800676e: 401a ands r2, r3 8006770: 68fb ldr r3, [r7, #12] 8006772: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 8006774: 68fb ldr r3, [r7, #12] 8006776: 6a1a ldr r2, [r3, #32] 8006778: 68bb ldr r3, [r7, #8] 800677a: f003 031f and.w r3, r3, #31 800677e: 6879 ldr r1, [r7, #4] 8006780: fa01 f303 lsl.w r3, r1, r3 8006784: 431a orrs r2, r3 8006786: 68fb ldr r3, [r7, #12] 8006788: 621a str r2, [r3, #32] } 800678a: bf00 nop 800678c: 371c adds r7, #28 800678e: 46bd mov sp, r7 8006790: bc80 pop {r7} 8006792: 4770 bx lr 08006794 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 8006794: b480 push {r7} 8006796: b085 sub sp, #20 8006798: af00 add r7, sp, #0 800679a: 6078 str r0, [r7, #4] 800679c: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 800679e: 687b ldr r3, [r7, #4] 80067a0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80067a4: 2b01 cmp r3, #1 80067a6: d101 bne.n 80067ac 80067a8: 2302 movs r3, #2 80067aa: e046 b.n 800683a 80067ac: 687b ldr r3, [r7, #4] 80067ae: 2201 movs r2, #1 80067b0: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 80067b4: 687b ldr r3, [r7, #4] 80067b6: 2202 movs r2, #2 80067b8: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 80067bc: 687b ldr r3, [r7, #4] 80067be: 681b ldr r3, [r3, #0] 80067c0: 685b ldr r3, [r3, #4] 80067c2: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 80067c4: 687b ldr r3, [r7, #4] 80067c6: 681b ldr r3, [r3, #0] 80067c8: 689b ldr r3, [r3, #8] 80067ca: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 80067cc: 68fb ldr r3, [r7, #12] 80067ce: f023 0370 bic.w r3, r3, #112 @ 0x70 80067d2: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 80067d4: 683b ldr r3, [r7, #0] 80067d6: 681b ldr r3, [r3, #0] 80067d8: 68fa ldr r2, [r7, #12] 80067da: 4313 orrs r3, r2 80067dc: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 80067de: 687b ldr r3, [r7, #4] 80067e0: 681b ldr r3, [r3, #0] 80067e2: 68fa ldr r2, [r7, #12] 80067e4: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 80067e6: 687b ldr r3, [r7, #4] 80067e8: 681b ldr r3, [r3, #0] 80067ea: 4a16 ldr r2, [pc, #88] @ (8006844 ) 80067ec: 4293 cmp r3, r2 80067ee: d00e beq.n 800680e 80067f0: 687b ldr r3, [r7, #4] 80067f2: 681b ldr r3, [r3, #0] 80067f4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80067f8: d009 beq.n 800680e 80067fa: 687b ldr r3, [r7, #4] 80067fc: 681b ldr r3, [r3, #0] 80067fe: 4a12 ldr r2, [pc, #72] @ (8006848 ) 8006800: 4293 cmp r3, r2 8006802: d004 beq.n 800680e 8006804: 687b ldr r3, [r7, #4] 8006806: 681b ldr r3, [r3, #0] 8006808: 4a10 ldr r2, [pc, #64] @ (800684c ) 800680a: 4293 cmp r3, r2 800680c: d10c bne.n 8006828 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 800680e: 68bb ldr r3, [r7, #8] 8006810: f023 0380 bic.w r3, r3, #128 @ 0x80 8006814: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 8006816: 683b ldr r3, [r7, #0] 8006818: 685b ldr r3, [r3, #4] 800681a: 68ba ldr r2, [r7, #8] 800681c: 4313 orrs r3, r2 800681e: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8006820: 687b ldr r3, [r7, #4] 8006822: 681b ldr r3, [r3, #0] 8006824: 68ba ldr r2, [r7, #8] 8006826: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8006828: 687b ldr r3, [r7, #4] 800682a: 2201 movs r2, #1 800682c: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8006830: 687b ldr r3, [r7, #4] 8006832: 2200 movs r2, #0 8006834: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8006838: 2300 movs r3, #0 } 800683a: 4618 mov r0, r3 800683c: 3714 adds r7, #20 800683e: 46bd mov sp, r7 8006840: bc80 pop {r7} 8006842: 4770 bx lr 8006844: 40012c00 .word 0x40012c00 8006848: 40000400 .word 0x40000400 800684c: 40000800 .word 0x40000800 08006850 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8006850: b580 push {r7, lr} 8006852: b082 sub sp, #8 8006854: af00 add r7, sp, #0 8006856: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 8006858: 687b ldr r3, [r7, #4] 800685a: 2b00 cmp r3, #0 800685c: d101 bne.n 8006862 { return HAL_ERROR; 800685e: 2301 movs r3, #1 8006860: e042 b.n 80068e8 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 8006862: 687b ldr r3, [r7, #4] 8006864: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8006868: b2db uxtb r3, r3 800686a: 2b00 cmp r3, #0 800686c: d106 bne.n 800687c { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 800686e: 687b ldr r3, [r7, #4] 8006870: 2200 movs r2, #0 8006872: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 8006876: 6878 ldr r0, [r7, #4] 8006878: f7fb fb6a bl 8001f50 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 800687c: 687b ldr r3, [r7, #4] 800687e: 2224 movs r2, #36 @ 0x24 8006880: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 8006884: 687b ldr r3, [r7, #4] 8006886: 681b ldr r3, [r3, #0] 8006888: 68da ldr r2, [r3, #12] 800688a: 687b ldr r3, [r7, #4] 800688c: 681b ldr r3, [r3, #0] 800688e: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8006892: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 8006894: 6878 ldr r0, [r7, #4] 8006896: f000 f82b bl 80068f0 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 800689a: 687b ldr r3, [r7, #4] 800689c: 681b ldr r3, [r3, #0] 800689e: 691a ldr r2, [r3, #16] 80068a0: 687b ldr r3, [r7, #4] 80068a2: 681b ldr r3, [r3, #0] 80068a4: f422 4290 bic.w r2, r2, #18432 @ 0x4800 80068a8: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80068aa: 687b ldr r3, [r7, #4] 80068ac: 681b ldr r3, [r3, #0] 80068ae: 695a ldr r2, [r3, #20] 80068b0: 687b ldr r3, [r7, #4] 80068b2: 681b ldr r3, [r3, #0] 80068b4: f022 022a bic.w r2, r2, #42 @ 0x2a 80068b8: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 80068ba: 687b ldr r3, [r7, #4] 80068bc: 681b ldr r3, [r3, #0] 80068be: 68da ldr r2, [r3, #12] 80068c0: 687b ldr r3, [r7, #4] 80068c2: 681b ldr r3, [r3, #0] 80068c4: f442 5200 orr.w r2, r2, #8192 @ 0x2000 80068c8: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 80068ca: 687b ldr r3, [r7, #4] 80068cc: 2200 movs r2, #0 80068ce: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 80068d0: 687b ldr r3, [r7, #4] 80068d2: 2220 movs r2, #32 80068d4: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 80068d8: 687b ldr r3, [r7, #4] 80068da: 2220 movs r2, #32 80068dc: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 80068e0: 687b ldr r3, [r7, #4] 80068e2: 2200 movs r2, #0 80068e4: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 80068e6: 2300 movs r3, #0 } 80068e8: 4618 mov r0, r3 80068ea: 3708 adds r7, #8 80068ec: 46bd mov sp, r7 80068ee: bd80 pop {r7, pc} 080068f0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80068f0: b580 push {r7, lr} 80068f2: b084 sub sp, #16 80068f4: af00 add r7, sp, #0 80068f6: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80068f8: 687b ldr r3, [r7, #4] 80068fa: 681b ldr r3, [r3, #0] 80068fc: 691b ldr r3, [r3, #16] 80068fe: f423 5140 bic.w r1, r3, #12288 @ 0x3000 8006902: 687b ldr r3, [r7, #4] 8006904: 68da ldr r2, [r3, #12] 8006906: 687b ldr r3, [r7, #4] 8006908: 681b ldr r3, [r3, #0] 800690a: 430a orrs r2, r1 800690c: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 800690e: 687b ldr r3, [r7, #4] 8006910: 689a ldr r2, [r3, #8] 8006912: 687b ldr r3, [r7, #4] 8006914: 691b ldr r3, [r3, #16] 8006916: 431a orrs r2, r3 8006918: 687b ldr r3, [r7, #4] 800691a: 695b ldr r3, [r3, #20] 800691c: 4313 orrs r3, r2 800691e: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 8006920: 687b ldr r3, [r7, #4] 8006922: 681b ldr r3, [r3, #0] 8006924: 68db ldr r3, [r3, #12] 8006926: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 800692a: f023 030c bic.w r3, r3, #12 800692e: 687a ldr r2, [r7, #4] 8006930: 6812 ldr r2, [r2, #0] 8006932: 68b9 ldr r1, [r7, #8] 8006934: 430b orrs r3, r1 8006936: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8006938: 687b ldr r3, [r7, #4] 800693a: 681b ldr r3, [r3, #0] 800693c: 695b ldr r3, [r3, #20] 800693e: f423 7140 bic.w r1, r3, #768 @ 0x300 8006942: 687b ldr r3, [r7, #4] 8006944: 699a ldr r2, [r3, #24] 8006946: 687b ldr r3, [r7, #4] 8006948: 681b ldr r3, [r3, #0] 800694a: 430a orrs r2, r1 800694c: 615a str r2, [r3, #20] if(huart->Instance == USART1) 800694e: 687b ldr r3, [r7, #4] 8006950: 681b ldr r3, [r3, #0] 8006952: 4a2c ldr r2, [pc, #176] @ (8006a04 ) 8006954: 4293 cmp r3, r2 8006956: d103 bne.n 8006960 { pclk = HAL_RCC_GetPCLK2Freq(); 8006958: f7ff f824 bl 80059a4 800695c: 60f8 str r0, [r7, #12] 800695e: e002 b.n 8006966 } else { pclk = HAL_RCC_GetPCLK1Freq(); 8006960: f7ff f80c bl 800597c 8006964: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8006966: 68fa ldr r2, [r7, #12] 8006968: 4613 mov r3, r2 800696a: 009b lsls r3, r3, #2 800696c: 4413 add r3, r2 800696e: 009a lsls r2, r3, #2 8006970: 441a add r2, r3 8006972: 687b ldr r3, [r7, #4] 8006974: 685b ldr r3, [r3, #4] 8006976: 009b lsls r3, r3, #2 8006978: fbb2 f3f3 udiv r3, r2, r3 800697c: 4a22 ldr r2, [pc, #136] @ (8006a08 ) 800697e: fba2 2303 umull r2, r3, r2, r3 8006982: 095b lsrs r3, r3, #5 8006984: 0119 lsls r1, r3, #4 8006986: 68fa ldr r2, [r7, #12] 8006988: 4613 mov r3, r2 800698a: 009b lsls r3, r3, #2 800698c: 4413 add r3, r2 800698e: 009a lsls r2, r3, #2 8006990: 441a add r2, r3 8006992: 687b ldr r3, [r7, #4] 8006994: 685b ldr r3, [r3, #4] 8006996: 009b lsls r3, r3, #2 8006998: fbb2 f2f3 udiv r2, r2, r3 800699c: 4b1a ldr r3, [pc, #104] @ (8006a08 ) 800699e: fba3 0302 umull r0, r3, r3, r2 80069a2: 095b lsrs r3, r3, #5 80069a4: 2064 movs r0, #100 @ 0x64 80069a6: fb00 f303 mul.w r3, r0, r3 80069aa: 1ad3 subs r3, r2, r3 80069ac: 011b lsls r3, r3, #4 80069ae: 3332 adds r3, #50 @ 0x32 80069b0: 4a15 ldr r2, [pc, #84] @ (8006a08 ) 80069b2: fba2 2303 umull r2, r3, r2, r3 80069b6: 095b lsrs r3, r3, #5 80069b8: f003 03f0 and.w r3, r3, #240 @ 0xf0 80069bc: 4419 add r1, r3 80069be: 68fa ldr r2, [r7, #12] 80069c0: 4613 mov r3, r2 80069c2: 009b lsls r3, r3, #2 80069c4: 4413 add r3, r2 80069c6: 009a lsls r2, r3, #2 80069c8: 441a add r2, r3 80069ca: 687b ldr r3, [r7, #4] 80069cc: 685b ldr r3, [r3, #4] 80069ce: 009b lsls r3, r3, #2 80069d0: fbb2 f2f3 udiv r2, r2, r3 80069d4: 4b0c ldr r3, [pc, #48] @ (8006a08 ) 80069d6: fba3 0302 umull r0, r3, r3, r2 80069da: 095b lsrs r3, r3, #5 80069dc: 2064 movs r0, #100 @ 0x64 80069de: fb00 f303 mul.w r3, r0, r3 80069e2: 1ad3 subs r3, r2, r3 80069e4: 011b lsls r3, r3, #4 80069e6: 3332 adds r3, #50 @ 0x32 80069e8: 4a07 ldr r2, [pc, #28] @ (8006a08 ) 80069ea: fba2 2303 umull r2, r3, r2, r3 80069ee: 095b lsrs r3, r3, #5 80069f0: f003 020f and.w r2, r3, #15 80069f4: 687b ldr r3, [r7, #4] 80069f6: 681b ldr r3, [r3, #0] 80069f8: 440a add r2, r1 80069fa: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 80069fc: bf00 nop 80069fe: 3710 adds r7, #16 8006a00: 46bd mov sp, r7 8006a02: bd80 pop {r7, pc} 8006a04: 40013800 .word 0x40013800 8006a08: 51eb851f .word 0x51eb851f 08006a0c : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8006a0c: b480 push {r7} 8006a0e: b085 sub sp, #20 8006a10: af00 add r7, sp, #0 8006a12: 60f8 str r0, [r7, #12] 8006a14: 4638 mov r0, r7 8006a16: e880 000e stmia.w r0, {r1, r2, r3} /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8006a1a: 2300 movs r3, #0 } 8006a1c: 4618 mov r0, r3 8006a1e: 3714 adds r7, #20 8006a20: 46bd mov sp, r7 8006a22: bc80 pop {r7} 8006a24: 4770 bx lr 08006a26 : * Enables the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) { 8006a26: b480 push {r7} 8006a28: b085 sub sp, #20 8006a2a: af00 add r7, sp, #0 8006a2c: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Clear pending interrupts */ USBx->ISTR = 0U; 8006a2e: 687b ldr r3, [r7, #4] 8006a30: 2200 movs r2, #0 8006a32: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8006a36: f44f 433f mov.w r3, #48896 @ 0xbf00 8006a3a: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Set interrupt mask */ USBx->CNTR = (uint16_t)winterruptmask; 8006a3c: 68fb ldr r3, [r7, #12] 8006a3e: b29a uxth r2, r3 8006a40: 687b ldr r3, [r7, #4] 8006a42: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8006a46: 2300 movs r3, #0 } 8006a48: 4618 mov r0, r3 8006a4a: 3714 adds r7, #20 8006a4c: 46bd mov sp, r7 8006a4e: bc80 pop {r7} 8006a50: 4770 bx lr 08006a52 : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) { 8006a52: b480 push {r7} 8006a54: b085 sub sp, #20 8006a56: af00 add r7, sp, #0 8006a58: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8006a5a: f44f 433f mov.w r3, #48896 @ 0xbf00 8006a5e: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Clear interrupt mask */ USBx->CNTR &= (uint16_t)(~winterruptmask); 8006a60: 687b ldr r3, [r7, #4] 8006a62: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8006a66: b29a uxth r2, r3 8006a68: 68fb ldr r3, [r7, #12] 8006a6a: b29b uxth r3, r3 8006a6c: 43db mvns r3, r3 8006a6e: b29b uxth r3, r3 8006a70: 4013 ands r3, r2 8006a72: b29a uxth r2, r3 8006a74: 687b ldr r3, [r7, #4] 8006a76: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8006a7a: 2300 movs r3, #0 } 8006a7c: 4618 mov r0, r3 8006a7e: 3714 adds r7, #20 8006a80: 46bd mov sp, r7 8006a82: bc80 pop {r7} 8006a84: 4770 bx lr 08006a86 : * This parameter can be one of the these values: * @arg USB_DEVICE_MODE Peripheral mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) { 8006a86: b480 push {r7} 8006a88: b083 sub sp, #12 8006a8a: af00 add r7, sp, #0 8006a8c: 6078 str r0, [r7, #4] 8006a8e: 460b mov r3, r1 8006a90: 70fb strb r3, [r7, #3] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8006a92: 2300 movs r3, #0 } 8006a94: 4618 mov r0, r3 8006a96: 370c adds r7, #12 8006a98: 46bd mov sp, r7 8006a9a: bc80 pop {r7} 8006a9c: 4770 bx lr 08006a9e : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8006a9e: b480 push {r7} 8006aa0: b085 sub sp, #20 8006aa2: af00 add r7, sp, #0 8006aa4: 60f8 str r0, [r7, #12] 8006aa6: 4638 mov r0, r7 8006aa8: e880 000e stmia.w r0, {r1, r2, r3} /* Prevent unused argument(s) compilation warning */ UNUSED(cfg); /* Init Device */ /* CNTR_FRES = 1 */ USBx->CNTR = (uint16_t)USB_CNTR_FRES; 8006aac: 68fb ldr r3, [r7, #12] 8006aae: 2201 movs r2, #1 8006ab0: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CNTR_FRES = 0 */ USBx->CNTR = 0U; 8006ab4: 68fb ldr r3, [r7, #12] 8006ab6: 2200 movs r2, #0 8006ab8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* Clear pending interrupts */ USBx->ISTR = 0U; 8006abc: 68fb ldr r3, [r7, #12] 8006abe: 2200 movs r2, #0 8006ac0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /*Set Btable Address*/ USBx->BTABLE = BTABLE_ADDRESS; 8006ac4: 68fb ldr r3, [r7, #12] 8006ac6: 2200 movs r2, #0 8006ac8: f8a3 2050 strh.w r2, [r3, #80] @ 0x50 return HAL_OK; 8006acc: 2300 movs r3, #0 } 8006ace: 4618 mov r0, r3 8006ad0: 3714 adds r7, #20 8006ad2: 46bd mov sp, r7 8006ad4: bc80 pop {r7} 8006ad6: 4770 bx lr 08006ad8 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8006ad8: b480 push {r7} 8006ada: b09d sub sp, #116 @ 0x74 8006adc: af00 add r7, sp, #0 8006ade: 6078 str r0, [r7, #4] 8006ae0: 6039 str r1, [r7, #0] HAL_StatusTypeDef ret = HAL_OK; 8006ae2: 2300 movs r3, #0 8006ae4: f887 306f strb.w r3, [r7, #111] @ 0x6f uint16_t wEpRegVal; wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; 8006ae8: 687a ldr r2, [r7, #4] 8006aea: 683b ldr r3, [r7, #0] 8006aec: 781b ldrb r3, [r3, #0] 8006aee: 009b lsls r3, r3, #2 8006af0: 4413 add r3, r2 8006af2: 881b ldrh r3, [r3, #0] 8006af4: b29b uxth r3, r3 8006af6: f423 43ec bic.w r3, r3, #30208 @ 0x7600 8006afa: f023 0370 bic.w r3, r3, #112 @ 0x70 8006afe: f8a7 306c strh.w r3, [r7, #108] @ 0x6c /* initialize Endpoint */ switch (ep->type) 8006b02: 683b ldr r3, [r7, #0] 8006b04: 78db ldrb r3, [r3, #3] 8006b06: 2b03 cmp r3, #3 8006b08: d81f bhi.n 8006b4a 8006b0a: a201 add r2, pc, #4 @ (adr r2, 8006b10 ) 8006b0c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8006b10: 08006b21 .word 0x08006b21 8006b14: 08006b3d .word 0x08006b3d 8006b18: 08006b53 .word 0x08006b53 8006b1c: 08006b2f .word 0x08006b2f { case EP_TYPE_CTRL: wEpRegVal |= USB_EP_CONTROL; 8006b20: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8006b24: f443 7300 orr.w r3, r3, #512 @ 0x200 8006b28: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8006b2c: e012 b.n 8006b54 case EP_TYPE_BULK: wEpRegVal |= USB_EP_BULK; break; case EP_TYPE_INTR: wEpRegVal |= USB_EP_INTERRUPT; 8006b2e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8006b32: f443 63c0 orr.w r3, r3, #1536 @ 0x600 8006b36: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8006b3a: e00b b.n 8006b54 case EP_TYPE_ISOC: wEpRegVal |= USB_EP_ISOCHRONOUS; 8006b3c: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8006b40: f443 6380 orr.w r3, r3, #1024 @ 0x400 8006b44: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8006b48: e004 b.n 8006b54 default: ret = HAL_ERROR; 8006b4a: 2301 movs r3, #1 8006b4c: f887 306f strb.w r3, [r7, #111] @ 0x6f break; 8006b50: e000 b.n 8006b54 break; 8006b52: bf00 nop } PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); 8006b54: 687a ldr r2, [r7, #4] 8006b56: 683b ldr r3, [r7, #0] 8006b58: 781b ldrb r3, [r3, #0] 8006b5a: 009b lsls r3, r3, #2 8006b5c: 441a add r2, r3 8006b5e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8006b62: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006b66: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006b6a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006b6e: f043 0380 orr.w r3, r3, #128 @ 0x80 8006b72: b29b uxth r3, r3 8006b74: 8013 strh r3, [r2, #0] PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); 8006b76: 687a ldr r2, [r7, #4] 8006b78: 683b ldr r3, [r7, #0] 8006b7a: 781b ldrb r3, [r3, #0] 8006b7c: 009b lsls r3, r3, #2 8006b7e: 4413 add r3, r2 8006b80: 881b ldrh r3, [r3, #0] 8006b82: b29b uxth r3, r3 8006b84: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006b88: f023 0370 bic.w r3, r3, #112 @ 0x70 8006b8c: b29b uxth r3, r3 8006b8e: 683a ldr r2, [r7, #0] 8006b90: 7812 ldrb r2, [r2, #0] 8006b92: 4313 orrs r3, r2 8006b94: f8a7 3066 strh.w r3, [r7, #102] @ 0x66 8006b98: 687a ldr r2, [r7, #4] 8006b9a: 683b ldr r3, [r7, #0] 8006b9c: 781b ldrb r3, [r3, #0] 8006b9e: 009b lsls r3, r3, #2 8006ba0: 441a add r2, r3 8006ba2: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66 8006ba6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006baa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006bae: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006bb2: f043 0380 orr.w r3, r3, #128 @ 0x80 8006bb6: b29b uxth r3, r3 8006bb8: 8013 strh r3, [r2, #0] if (ep->doublebuffer == 0U) 8006bba: 683b ldr r3, [r7, #0] 8006bbc: 7b1b ldrb r3, [r3, #12] 8006bbe: 2b00 cmp r3, #0 8006bc0: f040 8178 bne.w 8006eb4 { if (ep->is_in != 0U) 8006bc4: 683b ldr r3, [r7, #0] 8006bc6: 785b ldrb r3, [r3, #1] 8006bc8: 2b00 cmp r3, #0 8006bca: f000 8084 beq.w 8006cd6 { /*Set the endpoint Transmit buffer address */ PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); 8006bce: 687b ldr r3, [r7, #4] 8006bd0: 61bb str r3, [r7, #24] 8006bd2: 687b ldr r3, [r7, #4] 8006bd4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006bd8: b29b uxth r3, r3 8006bda: 461a mov r2, r3 8006bdc: 69bb ldr r3, [r7, #24] 8006bde: 4413 add r3, r2 8006be0: 61bb str r3, [r7, #24] 8006be2: 683b ldr r3, [r7, #0] 8006be4: 781b ldrb r3, [r3, #0] 8006be6: 011a lsls r2, r3, #4 8006be8: 69bb ldr r3, [r7, #24] 8006bea: 4413 add r3, r2 8006bec: f503 6380 add.w r3, r3, #1024 @ 0x400 8006bf0: 617b str r3, [r7, #20] 8006bf2: 683b ldr r3, [r7, #0] 8006bf4: 88db ldrh r3, [r3, #6] 8006bf6: 085b lsrs r3, r3, #1 8006bf8: b29b uxth r3, r3 8006bfa: 005b lsls r3, r3, #1 8006bfc: b29a uxth r2, r3 8006bfe: 697b ldr r3, [r7, #20] 8006c00: 801a strh r2, [r3, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8006c02: 687a ldr r2, [r7, #4] 8006c04: 683b ldr r3, [r7, #0] 8006c06: 781b ldrb r3, [r3, #0] 8006c08: 009b lsls r3, r3, #2 8006c0a: 4413 add r3, r2 8006c0c: 881b ldrh r3, [r3, #0] 8006c0e: 827b strh r3, [r7, #18] 8006c10: 8a7b ldrh r3, [r7, #18] 8006c12: f003 0340 and.w r3, r3, #64 @ 0x40 8006c16: 2b00 cmp r3, #0 8006c18: d01b beq.n 8006c52 8006c1a: 687a ldr r2, [r7, #4] 8006c1c: 683b ldr r3, [r7, #0] 8006c1e: 781b ldrb r3, [r3, #0] 8006c20: 009b lsls r3, r3, #2 8006c22: 4413 add r3, r2 8006c24: 881b ldrh r3, [r3, #0] 8006c26: b29b uxth r3, r3 8006c28: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006c2c: f023 0370 bic.w r3, r3, #112 @ 0x70 8006c30: 823b strh r3, [r7, #16] 8006c32: 687a ldr r2, [r7, #4] 8006c34: 683b ldr r3, [r7, #0] 8006c36: 781b ldrb r3, [r3, #0] 8006c38: 009b lsls r3, r3, #2 8006c3a: 441a add r2, r3 8006c3c: 8a3b ldrh r3, [r7, #16] 8006c3e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006c42: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006c46: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006c4a: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8006c4e: b29b uxth r3, r3 8006c50: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 8006c52: 683b ldr r3, [r7, #0] 8006c54: 78db ldrb r3, [r3, #3] 8006c56: 2b01 cmp r3, #1 8006c58: d020 beq.n 8006c9c { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 8006c5a: 687a ldr r2, [r7, #4] 8006c5c: 683b ldr r3, [r7, #0] 8006c5e: 781b ldrb r3, [r3, #0] 8006c60: 009b lsls r3, r3, #2 8006c62: 4413 add r3, r2 8006c64: 881b ldrh r3, [r3, #0] 8006c66: b29b uxth r3, r3 8006c68: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006c6c: f023 0340 bic.w r3, r3, #64 @ 0x40 8006c70: 81bb strh r3, [r7, #12] 8006c72: 89bb ldrh r3, [r7, #12] 8006c74: f083 0320 eor.w r3, r3, #32 8006c78: 81bb strh r3, [r7, #12] 8006c7a: 687a ldr r2, [r7, #4] 8006c7c: 683b ldr r3, [r7, #0] 8006c7e: 781b ldrb r3, [r3, #0] 8006c80: 009b lsls r3, r3, #2 8006c82: 441a add r2, r3 8006c84: 89bb ldrh r3, [r7, #12] 8006c86: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006c8a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006c8e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006c92: f043 0380 orr.w r3, r3, #128 @ 0x80 8006c96: b29b uxth r3, r3 8006c98: 8013 strh r3, [r2, #0] 8006c9a: e2d5 b.n 8007248 } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8006c9c: 687a ldr r2, [r7, #4] 8006c9e: 683b ldr r3, [r7, #0] 8006ca0: 781b ldrb r3, [r3, #0] 8006ca2: 009b lsls r3, r3, #2 8006ca4: 4413 add r3, r2 8006ca6: 881b ldrh r3, [r3, #0] 8006ca8: b29b uxth r3, r3 8006caa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006cae: f023 0340 bic.w r3, r3, #64 @ 0x40 8006cb2: 81fb strh r3, [r7, #14] 8006cb4: 687a ldr r2, [r7, #4] 8006cb6: 683b ldr r3, [r7, #0] 8006cb8: 781b ldrb r3, [r3, #0] 8006cba: 009b lsls r3, r3, #2 8006cbc: 441a add r2, r3 8006cbe: 89fb ldrh r3, [r7, #14] 8006cc0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006cc4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006cc8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006ccc: f043 0380 orr.w r3, r3, #128 @ 0x80 8006cd0: b29b uxth r3, r3 8006cd2: 8013 strh r3, [r2, #0] 8006cd4: e2b8 b.n 8007248 } } else { /* Set the endpoint Receive buffer address */ PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); 8006cd6: 687b ldr r3, [r7, #4] 8006cd8: 633b str r3, [r7, #48] @ 0x30 8006cda: 687b ldr r3, [r7, #4] 8006cdc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006ce0: b29b uxth r3, r3 8006ce2: 461a mov r2, r3 8006ce4: 6b3b ldr r3, [r7, #48] @ 0x30 8006ce6: 4413 add r3, r2 8006ce8: 633b str r3, [r7, #48] @ 0x30 8006cea: 683b ldr r3, [r7, #0] 8006cec: 781b ldrb r3, [r3, #0] 8006cee: 011a lsls r2, r3, #4 8006cf0: 6b3b ldr r3, [r7, #48] @ 0x30 8006cf2: 4413 add r3, r2 8006cf4: f503 6381 add.w r3, r3, #1032 @ 0x408 8006cf8: 62fb str r3, [r7, #44] @ 0x2c 8006cfa: 683b ldr r3, [r7, #0] 8006cfc: 88db ldrh r3, [r3, #6] 8006cfe: 085b lsrs r3, r3, #1 8006d00: b29b uxth r3, r3 8006d02: 005b lsls r3, r3, #1 8006d04: b29a uxth r2, r3 8006d06: 6afb ldr r3, [r7, #44] @ 0x2c 8006d08: 801a strh r2, [r3, #0] /* Set the endpoint Receive buffer counter */ PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); 8006d0a: 687b ldr r3, [r7, #4] 8006d0c: 62bb str r3, [r7, #40] @ 0x28 8006d0e: 687b ldr r3, [r7, #4] 8006d10: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006d14: b29b uxth r3, r3 8006d16: 461a mov r2, r3 8006d18: 6abb ldr r3, [r7, #40] @ 0x28 8006d1a: 4413 add r3, r2 8006d1c: 62bb str r3, [r7, #40] @ 0x28 8006d1e: 683b ldr r3, [r7, #0] 8006d20: 781b ldrb r3, [r3, #0] 8006d22: 011a lsls r2, r3, #4 8006d24: 6abb ldr r3, [r7, #40] @ 0x28 8006d26: 4413 add r3, r2 8006d28: f203 430c addw r3, r3, #1036 @ 0x40c 8006d2c: 627b str r3, [r7, #36] @ 0x24 8006d2e: 6a7b ldr r3, [r7, #36] @ 0x24 8006d30: 881b ldrh r3, [r3, #0] 8006d32: b29b uxth r3, r3 8006d34: f3c3 0309 ubfx r3, r3, #0, #10 8006d38: b29a uxth r2, r3 8006d3a: 6a7b ldr r3, [r7, #36] @ 0x24 8006d3c: 801a strh r2, [r3, #0] 8006d3e: 683b ldr r3, [r7, #0] 8006d40: 691b ldr r3, [r3, #16] 8006d42: 2b3e cmp r3, #62 @ 0x3e 8006d44: d91d bls.n 8006d82 8006d46: 683b ldr r3, [r7, #0] 8006d48: 691b ldr r3, [r3, #16] 8006d4a: 095b lsrs r3, r3, #5 8006d4c: 66bb str r3, [r7, #104] @ 0x68 8006d4e: 683b ldr r3, [r7, #0] 8006d50: 691b ldr r3, [r3, #16] 8006d52: f003 031f and.w r3, r3, #31 8006d56: 2b00 cmp r3, #0 8006d58: d102 bne.n 8006d60 8006d5a: 6ebb ldr r3, [r7, #104] @ 0x68 8006d5c: 3b01 subs r3, #1 8006d5e: 66bb str r3, [r7, #104] @ 0x68 8006d60: 6a7b ldr r3, [r7, #36] @ 0x24 8006d62: 881b ldrh r3, [r3, #0] 8006d64: b29a uxth r2, r3 8006d66: 6ebb ldr r3, [r7, #104] @ 0x68 8006d68: b29b uxth r3, r3 8006d6a: 029b lsls r3, r3, #10 8006d6c: b29b uxth r3, r3 8006d6e: 4313 orrs r3, r2 8006d70: b29b uxth r3, r3 8006d72: ea6f 4343 mvn.w r3, r3, lsl #17 8006d76: ea6f 4353 mvn.w r3, r3, lsr #17 8006d7a: b29a uxth r2, r3 8006d7c: 6a7b ldr r3, [r7, #36] @ 0x24 8006d7e: 801a strh r2, [r3, #0] 8006d80: e026 b.n 8006dd0 8006d82: 683b ldr r3, [r7, #0] 8006d84: 691b ldr r3, [r3, #16] 8006d86: 2b00 cmp r3, #0 8006d88: d10a bne.n 8006da0 8006d8a: 6a7b ldr r3, [r7, #36] @ 0x24 8006d8c: 881b ldrh r3, [r3, #0] 8006d8e: b29b uxth r3, r3 8006d90: ea6f 4343 mvn.w r3, r3, lsl #17 8006d94: ea6f 4353 mvn.w r3, r3, lsr #17 8006d98: b29a uxth r2, r3 8006d9a: 6a7b ldr r3, [r7, #36] @ 0x24 8006d9c: 801a strh r2, [r3, #0] 8006d9e: e017 b.n 8006dd0 8006da0: 683b ldr r3, [r7, #0] 8006da2: 691b ldr r3, [r3, #16] 8006da4: 085b lsrs r3, r3, #1 8006da6: 66bb str r3, [r7, #104] @ 0x68 8006da8: 683b ldr r3, [r7, #0] 8006daa: 691b ldr r3, [r3, #16] 8006dac: f003 0301 and.w r3, r3, #1 8006db0: 2b00 cmp r3, #0 8006db2: d002 beq.n 8006dba 8006db4: 6ebb ldr r3, [r7, #104] @ 0x68 8006db6: 3301 adds r3, #1 8006db8: 66bb str r3, [r7, #104] @ 0x68 8006dba: 6a7b ldr r3, [r7, #36] @ 0x24 8006dbc: 881b ldrh r3, [r3, #0] 8006dbe: b29a uxth r2, r3 8006dc0: 6ebb ldr r3, [r7, #104] @ 0x68 8006dc2: b29b uxth r3, r3 8006dc4: 029b lsls r3, r3, #10 8006dc6: b29b uxth r3, r3 8006dc8: 4313 orrs r3, r2 8006dca: b29a uxth r2, r3 8006dcc: 6a7b ldr r3, [r7, #36] @ 0x24 8006dce: 801a strh r2, [r3, #0] PCD_CLEAR_RX_DTOG(USBx, ep->num); 8006dd0: 687a ldr r2, [r7, #4] 8006dd2: 683b ldr r3, [r7, #0] 8006dd4: 781b ldrb r3, [r3, #0] 8006dd6: 009b lsls r3, r3, #2 8006dd8: 4413 add r3, r2 8006dda: 881b ldrh r3, [r3, #0] 8006ddc: 847b strh r3, [r7, #34] @ 0x22 8006dde: 8c7b ldrh r3, [r7, #34] @ 0x22 8006de0: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006de4: 2b00 cmp r3, #0 8006de6: d01b beq.n 8006e20 8006de8: 687a ldr r2, [r7, #4] 8006dea: 683b ldr r3, [r7, #0] 8006dec: 781b ldrb r3, [r3, #0] 8006dee: 009b lsls r3, r3, #2 8006df0: 4413 add r3, r2 8006df2: 881b ldrh r3, [r3, #0] 8006df4: b29b uxth r3, r3 8006df6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006dfa: f023 0370 bic.w r3, r3, #112 @ 0x70 8006dfe: 843b strh r3, [r7, #32] 8006e00: 687a ldr r2, [r7, #4] 8006e02: 683b ldr r3, [r7, #0] 8006e04: 781b ldrb r3, [r3, #0] 8006e06: 009b lsls r3, r3, #2 8006e08: 441a add r2, r3 8006e0a: 8c3b ldrh r3, [r7, #32] 8006e0c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006e10: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006e14: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006e18: f043 0380 orr.w r3, r3, #128 @ 0x80 8006e1c: b29b uxth r3, r3 8006e1e: 8013 strh r3, [r2, #0] if (ep->num == 0U) 8006e20: 683b ldr r3, [r7, #0] 8006e22: 781b ldrb r3, [r3, #0] 8006e24: 2b00 cmp r3, #0 8006e26: d124 bne.n 8006e72 { /* Configure VALID status for EP0 */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 8006e28: 687a ldr r2, [r7, #4] 8006e2a: 683b ldr r3, [r7, #0] 8006e2c: 781b ldrb r3, [r3, #0] 8006e2e: 009b lsls r3, r3, #2 8006e30: 4413 add r3, r2 8006e32: 881b ldrh r3, [r3, #0] 8006e34: b29b uxth r3, r3 8006e36: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8006e3a: f023 0370 bic.w r3, r3, #112 @ 0x70 8006e3e: 83bb strh r3, [r7, #28] 8006e40: 8bbb ldrh r3, [r7, #28] 8006e42: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8006e46: 83bb strh r3, [r7, #28] 8006e48: 8bbb ldrh r3, [r7, #28] 8006e4a: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8006e4e: 83bb strh r3, [r7, #28] 8006e50: 687a ldr r2, [r7, #4] 8006e52: 683b ldr r3, [r7, #0] 8006e54: 781b ldrb r3, [r3, #0] 8006e56: 009b lsls r3, r3, #2 8006e58: 441a add r2, r3 8006e5a: 8bbb ldrh r3, [r7, #28] 8006e5c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006e60: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006e64: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006e68: f043 0380 orr.w r3, r3, #128 @ 0x80 8006e6c: b29b uxth r3, r3 8006e6e: 8013 strh r3, [r2, #0] 8006e70: e1ea b.n 8007248 } else { /* Configure NAK status for OUT Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK); 8006e72: 687a ldr r2, [r7, #4] 8006e74: 683b ldr r3, [r7, #0] 8006e76: 781b ldrb r3, [r3, #0] 8006e78: 009b lsls r3, r3, #2 8006e7a: 4413 add r3, r2 8006e7c: 881b ldrh r3, [r3, #0] 8006e7e: b29b uxth r3, r3 8006e80: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8006e84: f023 0370 bic.w r3, r3, #112 @ 0x70 8006e88: 83fb strh r3, [r7, #30] 8006e8a: 8bfb ldrh r3, [r7, #30] 8006e8c: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8006e90: 83fb strh r3, [r7, #30] 8006e92: 687a ldr r2, [r7, #4] 8006e94: 683b ldr r3, [r7, #0] 8006e96: 781b ldrb r3, [r3, #0] 8006e98: 009b lsls r3, r3, #2 8006e9a: 441a add r2, r3 8006e9c: 8bfb ldrh r3, [r7, #30] 8006e9e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006ea2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006ea6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006eaa: f043 0380 orr.w r3, r3, #128 @ 0x80 8006eae: b29b uxth r3, r3 8006eb0: 8013 strh r3, [r2, #0] 8006eb2: e1c9 b.n 8007248 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->type == EP_TYPE_BULK) 8006eb4: 683b ldr r3, [r7, #0] 8006eb6: 78db ldrb r3, [r3, #3] 8006eb8: 2b02 cmp r3, #2 8006eba: d11e bne.n 8006efa { /* Set bulk endpoint as double buffered */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 8006ebc: 687a ldr r2, [r7, #4] 8006ebe: 683b ldr r3, [r7, #0] 8006ec0: 781b ldrb r3, [r3, #0] 8006ec2: 009b lsls r3, r3, #2 8006ec4: 4413 add r3, r2 8006ec6: 881b ldrh r3, [r3, #0] 8006ec8: b29b uxth r3, r3 8006eca: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006ece: f023 0370 bic.w r3, r3, #112 @ 0x70 8006ed2: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 8006ed6: 687a ldr r2, [r7, #4] 8006ed8: 683b ldr r3, [r7, #0] 8006eda: 781b ldrb r3, [r3, #0] 8006edc: 009b lsls r3, r3, #2 8006ede: 441a add r2, r3 8006ee0: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 8006ee4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006ee8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006eec: f443 4301 orr.w r3, r3, #33024 @ 0x8100 8006ef0: f043 0380 orr.w r3, r3, #128 @ 0x80 8006ef4: b29b uxth r3, r3 8006ef6: 8013 strh r3, [r2, #0] 8006ef8: e01d b.n 8006f36 } else { /* Set the ISOC endpoint in double buffer mode */ PCD_CLEAR_EP_KIND(USBx, ep->num); 8006efa: 687a ldr r2, [r7, #4] 8006efc: 683b ldr r3, [r7, #0] 8006efe: 781b ldrb r3, [r3, #0] 8006f00: 009b lsls r3, r3, #2 8006f02: 4413 add r3, r2 8006f04: 881b ldrh r3, [r3, #0] 8006f06: b29b uxth r3, r3 8006f08: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 8006f0c: f023 0370 bic.w r3, r3, #112 @ 0x70 8006f10: f8a7 3064 strh.w r3, [r7, #100] @ 0x64 8006f14: 687a ldr r2, [r7, #4] 8006f16: 683b ldr r3, [r7, #0] 8006f18: 781b ldrb r3, [r3, #0] 8006f1a: 009b lsls r3, r3, #2 8006f1c: 441a add r2, r3 8006f1e: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64 8006f22: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006f26: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006f2a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006f2e: f043 0380 orr.w r3, r3, #128 @ 0x80 8006f32: b29b uxth r3, r3 8006f34: 8013 strh r3, [r2, #0] } /* Set buffer address for double buffered mode */ PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); 8006f36: 687b ldr r3, [r7, #4] 8006f38: 65fb str r3, [r7, #92] @ 0x5c 8006f3a: 687b ldr r3, [r7, #4] 8006f3c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006f40: b29b uxth r3, r3 8006f42: 461a mov r2, r3 8006f44: 6dfb ldr r3, [r7, #92] @ 0x5c 8006f46: 4413 add r3, r2 8006f48: 65fb str r3, [r7, #92] @ 0x5c 8006f4a: 683b ldr r3, [r7, #0] 8006f4c: 781b ldrb r3, [r3, #0] 8006f4e: 011a lsls r2, r3, #4 8006f50: 6dfb ldr r3, [r7, #92] @ 0x5c 8006f52: 4413 add r3, r2 8006f54: f503 6380 add.w r3, r3, #1024 @ 0x400 8006f58: 65bb str r3, [r7, #88] @ 0x58 8006f5a: 683b ldr r3, [r7, #0] 8006f5c: 891b ldrh r3, [r3, #8] 8006f5e: 085b lsrs r3, r3, #1 8006f60: b29b uxth r3, r3 8006f62: 005b lsls r3, r3, #1 8006f64: b29a uxth r2, r3 8006f66: 6dbb ldr r3, [r7, #88] @ 0x58 8006f68: 801a strh r2, [r3, #0] 8006f6a: 687b ldr r3, [r7, #4] 8006f6c: 657b str r3, [r7, #84] @ 0x54 8006f6e: 687b ldr r3, [r7, #4] 8006f70: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006f74: b29b uxth r3, r3 8006f76: 461a mov r2, r3 8006f78: 6d7b ldr r3, [r7, #84] @ 0x54 8006f7a: 4413 add r3, r2 8006f7c: 657b str r3, [r7, #84] @ 0x54 8006f7e: 683b ldr r3, [r7, #0] 8006f80: 781b ldrb r3, [r3, #0] 8006f82: 011a lsls r2, r3, #4 8006f84: 6d7b ldr r3, [r7, #84] @ 0x54 8006f86: 4413 add r3, r2 8006f88: f503 6381 add.w r3, r3, #1032 @ 0x408 8006f8c: 653b str r3, [r7, #80] @ 0x50 8006f8e: 683b ldr r3, [r7, #0] 8006f90: 895b ldrh r3, [r3, #10] 8006f92: 085b lsrs r3, r3, #1 8006f94: b29b uxth r3, r3 8006f96: 005b lsls r3, r3, #1 8006f98: b29a uxth r2, r3 8006f9a: 6d3b ldr r3, [r7, #80] @ 0x50 8006f9c: 801a strh r2, [r3, #0] if (ep->is_in == 0U) 8006f9e: 683b ldr r3, [r7, #0] 8006fa0: 785b ldrb r3, [r3, #1] 8006fa2: 2b00 cmp r3, #0 8006fa4: f040 8093 bne.w 80070ce { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 8006fa8: 687a ldr r2, [r7, #4] 8006faa: 683b ldr r3, [r7, #0] 8006fac: 781b ldrb r3, [r3, #0] 8006fae: 009b lsls r3, r3, #2 8006fb0: 4413 add r3, r2 8006fb2: 881b ldrh r3, [r3, #0] 8006fb4: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 8006fb8: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8006fbc: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006fc0: 2b00 cmp r3, #0 8006fc2: d01b beq.n 8006ffc 8006fc4: 687a ldr r2, [r7, #4] 8006fc6: 683b ldr r3, [r7, #0] 8006fc8: 781b ldrb r3, [r3, #0] 8006fca: 009b lsls r3, r3, #2 8006fcc: 4413 add r3, r2 8006fce: 881b ldrh r3, [r3, #0] 8006fd0: b29b uxth r3, r3 8006fd2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006fd6: f023 0370 bic.w r3, r3, #112 @ 0x70 8006fda: 87fb strh r3, [r7, #62] @ 0x3e 8006fdc: 687a ldr r2, [r7, #4] 8006fde: 683b ldr r3, [r7, #0] 8006fe0: 781b ldrb r3, [r3, #0] 8006fe2: 009b lsls r3, r3, #2 8006fe4: 441a add r2, r3 8006fe6: 8ffb ldrh r3, [r7, #62] @ 0x3e 8006fe8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006fec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006ff0: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006ff4: f043 0380 orr.w r3, r3, #128 @ 0x80 8006ff8: b29b uxth r3, r3 8006ffa: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8006ffc: 687a ldr r2, [r7, #4] 8006ffe: 683b ldr r3, [r7, #0] 8007000: 781b ldrb r3, [r3, #0] 8007002: 009b lsls r3, r3, #2 8007004: 4413 add r3, r2 8007006: 881b ldrh r3, [r3, #0] 8007008: 87bb strh r3, [r7, #60] @ 0x3c 800700a: 8fbb ldrh r3, [r7, #60] @ 0x3c 800700c: f003 0340 and.w r3, r3, #64 @ 0x40 8007010: 2b00 cmp r3, #0 8007012: d01b beq.n 800704c 8007014: 687a ldr r2, [r7, #4] 8007016: 683b ldr r3, [r7, #0] 8007018: 781b ldrb r3, [r3, #0] 800701a: 009b lsls r3, r3, #2 800701c: 4413 add r3, r2 800701e: 881b ldrh r3, [r3, #0] 8007020: b29b uxth r3, r3 8007022: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007026: f023 0370 bic.w r3, r3, #112 @ 0x70 800702a: 877b strh r3, [r7, #58] @ 0x3a 800702c: 687a ldr r2, [r7, #4] 800702e: 683b ldr r3, [r7, #0] 8007030: 781b ldrb r3, [r3, #0] 8007032: 009b lsls r3, r3, #2 8007034: 441a add r2, r3 8007036: 8f7b ldrh r3, [r7, #58] @ 0x3a 8007038: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800703c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007040: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007044: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8007048: b29b uxth r3, r3 800704a: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800704c: 687a ldr r2, [r7, #4] 800704e: 683b ldr r3, [r7, #0] 8007050: 781b ldrb r3, [r3, #0] 8007052: 009b lsls r3, r3, #2 8007054: 4413 add r3, r2 8007056: 881b ldrh r3, [r3, #0] 8007058: b29b uxth r3, r3 800705a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800705e: f023 0370 bic.w r3, r3, #112 @ 0x70 8007062: 873b strh r3, [r7, #56] @ 0x38 8007064: 8f3b ldrh r3, [r7, #56] @ 0x38 8007066: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800706a: 873b strh r3, [r7, #56] @ 0x38 800706c: 8f3b ldrh r3, [r7, #56] @ 0x38 800706e: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8007072: 873b strh r3, [r7, #56] @ 0x38 8007074: 687a ldr r2, [r7, #4] 8007076: 683b ldr r3, [r7, #0] 8007078: 781b ldrb r3, [r3, #0] 800707a: 009b lsls r3, r3, #2 800707c: 441a add r2, r3 800707e: 8f3b ldrh r3, [r7, #56] @ 0x38 8007080: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007084: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007088: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800708c: f043 0380 orr.w r3, r3, #128 @ 0x80 8007090: b29b uxth r3, r3 8007092: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8007094: 687a ldr r2, [r7, #4] 8007096: 683b ldr r3, [r7, #0] 8007098: 781b ldrb r3, [r3, #0] 800709a: 009b lsls r3, r3, #2 800709c: 4413 add r3, r2 800709e: 881b ldrh r3, [r3, #0] 80070a0: b29b uxth r3, r3 80070a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80070a6: f023 0340 bic.w r3, r3, #64 @ 0x40 80070aa: 86fb strh r3, [r7, #54] @ 0x36 80070ac: 687a ldr r2, [r7, #4] 80070ae: 683b ldr r3, [r7, #0] 80070b0: 781b ldrb r3, [r3, #0] 80070b2: 009b lsls r3, r3, #2 80070b4: 441a add r2, r3 80070b6: 8efb ldrh r3, [r7, #54] @ 0x36 80070b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80070bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80070c0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80070c4: f043 0380 orr.w r3, r3, #128 @ 0x80 80070c8: b29b uxth r3, r3 80070ca: 8013 strh r3, [r2, #0] 80070cc: e0bc b.n 8007248 } else { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 80070ce: 687a ldr r2, [r7, #4] 80070d0: 683b ldr r3, [r7, #0] 80070d2: 781b ldrb r3, [r3, #0] 80070d4: 009b lsls r3, r3, #2 80070d6: 4413 add r3, r2 80070d8: 881b ldrh r3, [r3, #0] 80070da: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 80070de: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 80070e2: f403 4380 and.w r3, r3, #16384 @ 0x4000 80070e6: 2b00 cmp r3, #0 80070e8: d01d beq.n 8007126 80070ea: 687a ldr r2, [r7, #4] 80070ec: 683b ldr r3, [r7, #0] 80070ee: 781b ldrb r3, [r3, #0] 80070f0: 009b lsls r3, r3, #2 80070f2: 4413 add r3, r2 80070f4: 881b ldrh r3, [r3, #0] 80070f6: b29b uxth r3, r3 80070f8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80070fc: f023 0370 bic.w r3, r3, #112 @ 0x70 8007100: f8a7 304c strh.w r3, [r7, #76] @ 0x4c 8007104: 687a ldr r2, [r7, #4] 8007106: 683b ldr r3, [r7, #0] 8007108: 781b ldrb r3, [r3, #0] 800710a: 009b lsls r3, r3, #2 800710c: 441a add r2, r3 800710e: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c 8007112: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007116: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800711a: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800711e: f043 0380 orr.w r3, r3, #128 @ 0x80 8007122: b29b uxth r3, r3 8007124: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8007126: 687a ldr r2, [r7, #4] 8007128: 683b ldr r3, [r7, #0] 800712a: 781b ldrb r3, [r3, #0] 800712c: 009b lsls r3, r3, #2 800712e: 4413 add r3, r2 8007130: 881b ldrh r3, [r3, #0] 8007132: f8a7 304a strh.w r3, [r7, #74] @ 0x4a 8007136: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800713a: f003 0340 and.w r3, r3, #64 @ 0x40 800713e: 2b00 cmp r3, #0 8007140: d01d beq.n 800717e 8007142: 687a ldr r2, [r7, #4] 8007144: 683b ldr r3, [r7, #0] 8007146: 781b ldrb r3, [r3, #0] 8007148: 009b lsls r3, r3, #2 800714a: 4413 add r3, r2 800714c: 881b ldrh r3, [r3, #0] 800714e: b29b uxth r3, r3 8007150: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007154: f023 0370 bic.w r3, r3, #112 @ 0x70 8007158: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 800715c: 687a ldr r2, [r7, #4] 800715e: 683b ldr r3, [r7, #0] 8007160: 781b ldrb r3, [r3, #0] 8007162: 009b lsls r3, r3, #2 8007164: 441a add r2, r3 8007166: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48 800716a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800716e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007172: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007176: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800717a: b29b uxth r3, r3 800717c: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 800717e: 683b ldr r3, [r7, #0] 8007180: 78db ldrb r3, [r3, #3] 8007182: 2b01 cmp r3, #1 8007184: d024 beq.n 80071d0 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 8007186: 687a ldr r2, [r7, #4] 8007188: 683b ldr r3, [r7, #0] 800718a: 781b ldrb r3, [r3, #0] 800718c: 009b lsls r3, r3, #2 800718e: 4413 add r3, r2 8007190: 881b ldrh r3, [r3, #0] 8007192: b29b uxth r3, r3 8007194: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007198: f023 0340 bic.w r3, r3, #64 @ 0x40 800719c: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 80071a0: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 80071a4: f083 0320 eor.w r3, r3, #32 80071a8: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 80071ac: 687a ldr r2, [r7, #4] 80071ae: 683b ldr r3, [r7, #0] 80071b0: 781b ldrb r3, [r3, #0] 80071b2: 009b lsls r3, r3, #2 80071b4: 441a add r2, r3 80071b6: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 80071ba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80071be: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80071c2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80071c6: f043 0380 orr.w r3, r3, #128 @ 0x80 80071ca: b29b uxth r3, r3 80071cc: 8013 strh r3, [r2, #0] 80071ce: e01d b.n 800720c } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80071d0: 687a ldr r2, [r7, #4] 80071d2: 683b ldr r3, [r7, #0] 80071d4: 781b ldrb r3, [r3, #0] 80071d6: 009b lsls r3, r3, #2 80071d8: 4413 add r3, r2 80071da: 881b ldrh r3, [r3, #0] 80071dc: b29b uxth r3, r3 80071de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80071e2: f023 0340 bic.w r3, r3, #64 @ 0x40 80071e6: f8a7 3046 strh.w r3, [r7, #70] @ 0x46 80071ea: 687a ldr r2, [r7, #4] 80071ec: 683b ldr r3, [r7, #0] 80071ee: 781b ldrb r3, [r3, #0] 80071f0: 009b lsls r3, r3, #2 80071f2: 441a add r2, r3 80071f4: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46 80071f8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80071fc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007200: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007204: f043 0380 orr.w r3, r3, #128 @ 0x80 8007208: b29b uxth r3, r3 800720a: 8013 strh r3, [r2, #0] } PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800720c: 687a ldr r2, [r7, #4] 800720e: 683b ldr r3, [r7, #0] 8007210: 781b ldrb r3, [r3, #0] 8007212: 009b lsls r3, r3, #2 8007214: 4413 add r3, r2 8007216: 881b ldrh r3, [r3, #0] 8007218: b29b uxth r3, r3 800721a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800721e: f023 0370 bic.w r3, r3, #112 @ 0x70 8007222: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 8007226: 687a ldr r2, [r7, #4] 8007228: 683b ldr r3, [r7, #0] 800722a: 781b ldrb r3, [r3, #0] 800722c: 009b lsls r3, r3, #2 800722e: 441a add r2, r3 8007230: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 8007234: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007238: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800723c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007240: f043 0380 orr.w r3, r3, #128 @ 0x80 8007244: b29b uxth r3, r3 8007246: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return ret; 8007248: f897 306f ldrb.w r3, [r7, #111] @ 0x6f } 800724c: 4618 mov r0, r3 800724e: 3774 adds r7, #116 @ 0x74 8007250: 46bd mov sp, r7 8007252: bc80 pop {r7} 8007254: 4770 bx lr 8007256: bf00 nop 08007258 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8007258: b480 push {r7} 800725a: b08d sub sp, #52 @ 0x34 800725c: af00 add r7, sp, #0 800725e: 6078 str r0, [r7, #4] 8007260: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 8007262: 683b ldr r3, [r7, #0] 8007264: 7b1b ldrb r3, [r3, #12] 8007266: 2b00 cmp r3, #0 8007268: f040 808e bne.w 8007388 { if (ep->is_in != 0U) 800726c: 683b ldr r3, [r7, #0] 800726e: 785b ldrb r3, [r3, #1] 8007270: 2b00 cmp r3, #0 8007272: d044 beq.n 80072fe { PCD_CLEAR_TX_DTOG(USBx, ep->num); 8007274: 687a ldr r2, [r7, #4] 8007276: 683b ldr r3, [r7, #0] 8007278: 781b ldrb r3, [r3, #0] 800727a: 009b lsls r3, r3, #2 800727c: 4413 add r3, r2 800727e: 881b ldrh r3, [r3, #0] 8007280: 81bb strh r3, [r7, #12] 8007282: 89bb ldrh r3, [r7, #12] 8007284: f003 0340 and.w r3, r3, #64 @ 0x40 8007288: 2b00 cmp r3, #0 800728a: d01b beq.n 80072c4 800728c: 687a ldr r2, [r7, #4] 800728e: 683b ldr r3, [r7, #0] 8007290: 781b ldrb r3, [r3, #0] 8007292: 009b lsls r3, r3, #2 8007294: 4413 add r3, r2 8007296: 881b ldrh r3, [r3, #0] 8007298: b29b uxth r3, r3 800729a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800729e: f023 0370 bic.w r3, r3, #112 @ 0x70 80072a2: 817b strh r3, [r7, #10] 80072a4: 687a ldr r2, [r7, #4] 80072a6: 683b ldr r3, [r7, #0] 80072a8: 781b ldrb r3, [r3, #0] 80072aa: 009b lsls r3, r3, #2 80072ac: 441a add r2, r3 80072ae: 897b ldrh r3, [r7, #10] 80072b0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80072b4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80072b8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80072bc: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80072c0: b29b uxth r3, r3 80072c2: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80072c4: 687a ldr r2, [r7, #4] 80072c6: 683b ldr r3, [r7, #0] 80072c8: 781b ldrb r3, [r3, #0] 80072ca: 009b lsls r3, r3, #2 80072cc: 4413 add r3, r2 80072ce: 881b ldrh r3, [r3, #0] 80072d0: b29b uxth r3, r3 80072d2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80072d6: f023 0340 bic.w r3, r3, #64 @ 0x40 80072da: 813b strh r3, [r7, #8] 80072dc: 687a ldr r2, [r7, #4] 80072de: 683b ldr r3, [r7, #0] 80072e0: 781b ldrb r3, [r3, #0] 80072e2: 009b lsls r3, r3, #2 80072e4: 441a add r2, r3 80072e6: 893b ldrh r3, [r7, #8] 80072e8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80072ec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80072f0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80072f4: f043 0380 orr.w r3, r3, #128 @ 0x80 80072f8: b29b uxth r3, r3 80072fa: 8013 strh r3, [r2, #0] 80072fc: e192 b.n 8007624 } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 80072fe: 687a ldr r2, [r7, #4] 8007300: 683b ldr r3, [r7, #0] 8007302: 781b ldrb r3, [r3, #0] 8007304: 009b lsls r3, r3, #2 8007306: 4413 add r3, r2 8007308: 881b ldrh r3, [r3, #0] 800730a: 827b strh r3, [r7, #18] 800730c: 8a7b ldrh r3, [r7, #18] 800730e: f403 4380 and.w r3, r3, #16384 @ 0x4000 8007312: 2b00 cmp r3, #0 8007314: d01b beq.n 800734e 8007316: 687a ldr r2, [r7, #4] 8007318: 683b ldr r3, [r7, #0] 800731a: 781b ldrb r3, [r3, #0] 800731c: 009b lsls r3, r3, #2 800731e: 4413 add r3, r2 8007320: 881b ldrh r3, [r3, #0] 8007322: b29b uxth r3, r3 8007324: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007328: f023 0370 bic.w r3, r3, #112 @ 0x70 800732c: 823b strh r3, [r7, #16] 800732e: 687a ldr r2, [r7, #4] 8007330: 683b ldr r3, [r7, #0] 8007332: 781b ldrb r3, [r3, #0] 8007334: 009b lsls r3, r3, #2 8007336: 441a add r2, r3 8007338: 8a3b ldrh r3, [r7, #16] 800733a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800733e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007342: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007346: f043 0380 orr.w r3, r3, #128 @ 0x80 800734a: b29b uxth r3, r3 800734c: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800734e: 687a ldr r2, [r7, #4] 8007350: 683b ldr r3, [r7, #0] 8007352: 781b ldrb r3, [r3, #0] 8007354: 009b lsls r3, r3, #2 8007356: 4413 add r3, r2 8007358: 881b ldrh r3, [r3, #0] 800735a: b29b uxth r3, r3 800735c: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8007360: f023 0370 bic.w r3, r3, #112 @ 0x70 8007364: 81fb strh r3, [r7, #14] 8007366: 687a ldr r2, [r7, #4] 8007368: 683b ldr r3, [r7, #0] 800736a: 781b ldrb r3, [r3, #0] 800736c: 009b lsls r3, r3, #2 800736e: 441a add r2, r3 8007370: 89fb ldrh r3, [r7, #14] 8007372: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007376: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800737a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800737e: f043 0380 orr.w r3, r3, #128 @ 0x80 8007382: b29b uxth r3, r3 8007384: 8013 strh r3, [r2, #0] 8007386: e14d b.n 8007624 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->is_in == 0U) 8007388: 683b ldr r3, [r7, #0] 800738a: 785b ldrb r3, [r3, #1] 800738c: 2b00 cmp r3, #0 800738e: f040 80a5 bne.w 80074dc { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 8007392: 687a ldr r2, [r7, #4] 8007394: 683b ldr r3, [r7, #0] 8007396: 781b ldrb r3, [r3, #0] 8007398: 009b lsls r3, r3, #2 800739a: 4413 add r3, r2 800739c: 881b ldrh r3, [r3, #0] 800739e: 843b strh r3, [r7, #32] 80073a0: 8c3b ldrh r3, [r7, #32] 80073a2: f403 4380 and.w r3, r3, #16384 @ 0x4000 80073a6: 2b00 cmp r3, #0 80073a8: d01b beq.n 80073e2 80073aa: 687a ldr r2, [r7, #4] 80073ac: 683b ldr r3, [r7, #0] 80073ae: 781b ldrb r3, [r3, #0] 80073b0: 009b lsls r3, r3, #2 80073b2: 4413 add r3, r2 80073b4: 881b ldrh r3, [r3, #0] 80073b6: b29b uxth r3, r3 80073b8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80073bc: f023 0370 bic.w r3, r3, #112 @ 0x70 80073c0: 83fb strh r3, [r7, #30] 80073c2: 687a ldr r2, [r7, #4] 80073c4: 683b ldr r3, [r7, #0] 80073c6: 781b ldrb r3, [r3, #0] 80073c8: 009b lsls r3, r3, #2 80073ca: 441a add r2, r3 80073cc: 8bfb ldrh r3, [r7, #30] 80073ce: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80073d2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80073d6: f443 4340 orr.w r3, r3, #49152 @ 0xc000 80073da: f043 0380 orr.w r3, r3, #128 @ 0x80 80073de: b29b uxth r3, r3 80073e0: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 80073e2: 687a ldr r2, [r7, #4] 80073e4: 683b ldr r3, [r7, #0] 80073e6: 781b ldrb r3, [r3, #0] 80073e8: 009b lsls r3, r3, #2 80073ea: 4413 add r3, r2 80073ec: 881b ldrh r3, [r3, #0] 80073ee: 83bb strh r3, [r7, #28] 80073f0: 8bbb ldrh r3, [r7, #28] 80073f2: f003 0340 and.w r3, r3, #64 @ 0x40 80073f6: 2b00 cmp r3, #0 80073f8: d01b beq.n 8007432 80073fa: 687a ldr r2, [r7, #4] 80073fc: 683b ldr r3, [r7, #0] 80073fe: 781b ldrb r3, [r3, #0] 8007400: 009b lsls r3, r3, #2 8007402: 4413 add r3, r2 8007404: 881b ldrh r3, [r3, #0] 8007406: b29b uxth r3, r3 8007408: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800740c: f023 0370 bic.w r3, r3, #112 @ 0x70 8007410: 837b strh r3, [r7, #26] 8007412: 687a ldr r2, [r7, #4] 8007414: 683b ldr r3, [r7, #0] 8007416: 781b ldrb r3, [r3, #0] 8007418: 009b lsls r3, r3, #2 800741a: 441a add r2, r3 800741c: 8b7b ldrh r3, [r7, #26] 800741e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007422: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007426: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800742a: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800742e: b29b uxth r3, r3 8007430: 8013 strh r3, [r2, #0] /* Reset value of the data toggle bits for the endpoint out*/ PCD_TX_DTOG(USBx, ep->num); 8007432: 687a ldr r2, [r7, #4] 8007434: 683b ldr r3, [r7, #0] 8007436: 781b ldrb r3, [r3, #0] 8007438: 009b lsls r3, r3, #2 800743a: 4413 add r3, r2 800743c: 881b ldrh r3, [r3, #0] 800743e: b29b uxth r3, r3 8007440: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007444: f023 0370 bic.w r3, r3, #112 @ 0x70 8007448: 833b strh r3, [r7, #24] 800744a: 687a ldr r2, [r7, #4] 800744c: 683b ldr r3, [r7, #0] 800744e: 781b ldrb r3, [r3, #0] 8007450: 009b lsls r3, r3, #2 8007452: 441a add r2, r3 8007454: 8b3b ldrh r3, [r7, #24] 8007456: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800745a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800745e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007462: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8007466: b29b uxth r3, r3 8007468: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800746a: 687a ldr r2, [r7, #4] 800746c: 683b ldr r3, [r7, #0] 800746e: 781b ldrb r3, [r3, #0] 8007470: 009b lsls r3, r3, #2 8007472: 4413 add r3, r2 8007474: 881b ldrh r3, [r3, #0] 8007476: b29b uxth r3, r3 8007478: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800747c: f023 0370 bic.w r3, r3, #112 @ 0x70 8007480: 82fb strh r3, [r7, #22] 8007482: 687a ldr r2, [r7, #4] 8007484: 683b ldr r3, [r7, #0] 8007486: 781b ldrb r3, [r3, #0] 8007488: 009b lsls r3, r3, #2 800748a: 441a add r2, r3 800748c: 8afb ldrh r3, [r7, #22] 800748e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007492: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007496: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800749a: f043 0380 orr.w r3, r3, #128 @ 0x80 800749e: b29b uxth r3, r3 80074a0: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80074a2: 687a ldr r2, [r7, #4] 80074a4: 683b ldr r3, [r7, #0] 80074a6: 781b ldrb r3, [r3, #0] 80074a8: 009b lsls r3, r3, #2 80074aa: 4413 add r3, r2 80074ac: 881b ldrh r3, [r3, #0] 80074ae: b29b uxth r3, r3 80074b0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80074b4: f023 0340 bic.w r3, r3, #64 @ 0x40 80074b8: 82bb strh r3, [r7, #20] 80074ba: 687a ldr r2, [r7, #4] 80074bc: 683b ldr r3, [r7, #0] 80074be: 781b ldrb r3, [r3, #0] 80074c0: 009b lsls r3, r3, #2 80074c2: 441a add r2, r3 80074c4: 8abb ldrh r3, [r7, #20] 80074c6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80074ca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80074ce: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80074d2: f043 0380 orr.w r3, r3, #128 @ 0x80 80074d6: b29b uxth r3, r3 80074d8: 8013 strh r3, [r2, #0] 80074da: e0a3 b.n 8007624 } else { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 80074dc: 687a ldr r2, [r7, #4] 80074de: 683b ldr r3, [r7, #0] 80074e0: 781b ldrb r3, [r3, #0] 80074e2: 009b lsls r3, r3, #2 80074e4: 4413 add r3, r2 80074e6: 881b ldrh r3, [r3, #0] 80074e8: 85fb strh r3, [r7, #46] @ 0x2e 80074ea: 8dfb ldrh r3, [r7, #46] @ 0x2e 80074ec: f403 4380 and.w r3, r3, #16384 @ 0x4000 80074f0: 2b00 cmp r3, #0 80074f2: d01b beq.n 800752c 80074f4: 687a ldr r2, [r7, #4] 80074f6: 683b ldr r3, [r7, #0] 80074f8: 781b ldrb r3, [r3, #0] 80074fa: 009b lsls r3, r3, #2 80074fc: 4413 add r3, r2 80074fe: 881b ldrh r3, [r3, #0] 8007500: b29b uxth r3, r3 8007502: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007506: f023 0370 bic.w r3, r3, #112 @ 0x70 800750a: 85bb strh r3, [r7, #44] @ 0x2c 800750c: 687a ldr r2, [r7, #4] 800750e: 683b ldr r3, [r7, #0] 8007510: 781b ldrb r3, [r3, #0] 8007512: 009b lsls r3, r3, #2 8007514: 441a add r2, r3 8007516: 8dbb ldrh r3, [r7, #44] @ 0x2c 8007518: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800751c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007520: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007524: f043 0380 orr.w r3, r3, #128 @ 0x80 8007528: b29b uxth r3, r3 800752a: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 800752c: 687a ldr r2, [r7, #4] 800752e: 683b ldr r3, [r7, #0] 8007530: 781b ldrb r3, [r3, #0] 8007532: 009b lsls r3, r3, #2 8007534: 4413 add r3, r2 8007536: 881b ldrh r3, [r3, #0] 8007538: 857b strh r3, [r7, #42] @ 0x2a 800753a: 8d7b ldrh r3, [r7, #42] @ 0x2a 800753c: f003 0340 and.w r3, r3, #64 @ 0x40 8007540: 2b00 cmp r3, #0 8007542: d01b beq.n 800757c 8007544: 687a ldr r2, [r7, #4] 8007546: 683b ldr r3, [r7, #0] 8007548: 781b ldrb r3, [r3, #0] 800754a: 009b lsls r3, r3, #2 800754c: 4413 add r3, r2 800754e: 881b ldrh r3, [r3, #0] 8007550: b29b uxth r3, r3 8007552: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007556: f023 0370 bic.w r3, r3, #112 @ 0x70 800755a: 853b strh r3, [r7, #40] @ 0x28 800755c: 687a ldr r2, [r7, #4] 800755e: 683b ldr r3, [r7, #0] 8007560: 781b ldrb r3, [r3, #0] 8007562: 009b lsls r3, r3, #2 8007564: 441a add r2, r3 8007566: 8d3b ldrh r3, [r7, #40] @ 0x28 8007568: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800756c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007570: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007574: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8007578: b29b uxth r3, r3 800757a: 8013 strh r3, [r2, #0] PCD_RX_DTOG(USBx, ep->num); 800757c: 687a ldr r2, [r7, #4] 800757e: 683b ldr r3, [r7, #0] 8007580: 781b ldrb r3, [r3, #0] 8007582: 009b lsls r3, r3, #2 8007584: 4413 add r3, r2 8007586: 881b ldrh r3, [r3, #0] 8007588: b29b uxth r3, r3 800758a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800758e: f023 0370 bic.w r3, r3, #112 @ 0x70 8007592: 84fb strh r3, [r7, #38] @ 0x26 8007594: 687a ldr r2, [r7, #4] 8007596: 683b ldr r3, [r7, #0] 8007598: 781b ldrb r3, [r3, #0] 800759a: 009b lsls r3, r3, #2 800759c: 441a add r2, r3 800759e: 8cfb ldrh r3, [r7, #38] @ 0x26 80075a0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80075a4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80075a8: f443 4340 orr.w r3, r3, #49152 @ 0xc000 80075ac: f043 0380 orr.w r3, r3, #128 @ 0x80 80075b0: b29b uxth r3, r3 80075b2: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint*/ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80075b4: 687a ldr r2, [r7, #4] 80075b6: 683b ldr r3, [r7, #0] 80075b8: 781b ldrb r3, [r3, #0] 80075ba: 009b lsls r3, r3, #2 80075bc: 4413 add r3, r2 80075be: 881b ldrh r3, [r3, #0] 80075c0: b29b uxth r3, r3 80075c2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80075c6: f023 0340 bic.w r3, r3, #64 @ 0x40 80075ca: 84bb strh r3, [r7, #36] @ 0x24 80075cc: 687a ldr r2, [r7, #4] 80075ce: 683b ldr r3, [r7, #0] 80075d0: 781b ldrb r3, [r3, #0] 80075d2: 009b lsls r3, r3, #2 80075d4: 441a add r2, r3 80075d6: 8cbb ldrh r3, [r7, #36] @ 0x24 80075d8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80075dc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80075e0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80075e4: f043 0380 orr.w r3, r3, #128 @ 0x80 80075e8: b29b uxth r3, r3 80075ea: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 80075ec: 687a ldr r2, [r7, #4] 80075ee: 683b ldr r3, [r7, #0] 80075f0: 781b ldrb r3, [r3, #0] 80075f2: 009b lsls r3, r3, #2 80075f4: 4413 add r3, r2 80075f6: 881b ldrh r3, [r3, #0] 80075f8: b29b uxth r3, r3 80075fa: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80075fe: f023 0370 bic.w r3, r3, #112 @ 0x70 8007602: 847b strh r3, [r7, #34] @ 0x22 8007604: 687a ldr r2, [r7, #4] 8007606: 683b ldr r3, [r7, #0] 8007608: 781b ldrb r3, [r3, #0] 800760a: 009b lsls r3, r3, #2 800760c: 441a add r2, r3 800760e: 8c7b ldrh r3, [r7, #34] @ 0x22 8007610: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007614: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007618: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800761c: f043 0380 orr.w r3, r3, #128 @ 0x80 8007620: b29b uxth r3, r3 8007622: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 8007624: 2300 movs r3, #0 } 8007626: 4618 mov r0, r3 8007628: 3734 adds r7, #52 @ 0x34 800762a: 46bd mov sp, r7 800762c: bc80 pop {r7} 800762e: 4770 bx lr 08007630 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8007630: b580 push {r7, lr} 8007632: b0c2 sub sp, #264 @ 0x108 8007634: af00 add r7, sp, #0 8007636: f507 7384 add.w r3, r7, #264 @ 0x108 800763a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800763e: 6018 str r0, [r3, #0] 8007640: f507 7384 add.w r3, r7, #264 @ 0x108 8007644: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007648: 6019 str r1, [r3, #0] uint16_t pmabuffer; uint16_t wEPVal; #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* IN endpoint */ if (ep->is_in == 1U) 800764a: f507 7384 add.w r3, r7, #264 @ 0x108 800764e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007652: 681b ldr r3, [r3, #0] 8007654: 785b ldrb r3, [r3, #1] 8007656: 2b01 cmp r3, #1 8007658: f040 86b7 bne.w 80083ca { /*Multi packet transfer*/ if (ep->xfer_len > ep->maxpacket) 800765c: f507 7384 add.w r3, r7, #264 @ 0x108 8007660: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007664: 681b ldr r3, [r3, #0] 8007666: 699a ldr r2, [r3, #24] 8007668: f507 7384 add.w r3, r7, #264 @ 0x108 800766c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007670: 681b ldr r3, [r3, #0] 8007672: 691b ldr r3, [r3, #16] 8007674: 429a cmp r2, r3 8007676: d908 bls.n 800768a { len = ep->maxpacket; 8007678: f507 7384 add.w r3, r7, #264 @ 0x108 800767c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007680: 681b ldr r3, [r3, #0] 8007682: 691b ldr r3, [r3, #16] 8007684: f8c7 3104 str.w r3, [r7, #260] @ 0x104 8007688: e007 b.n 800769a } else { len = ep->xfer_len; 800768a: f507 7384 add.w r3, r7, #264 @ 0x108 800768e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007692: 681b ldr r3, [r3, #0] 8007694: 699b ldr r3, [r3, #24] 8007696: f8c7 3104 str.w r3, [r7, #260] @ 0x104 } /* configure and validate Tx endpoint */ if (ep->doublebuffer == 0U) 800769a: f507 7384 add.w r3, r7, #264 @ 0x108 800769e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80076a2: 681b ldr r3, [r3, #0] 80076a4: 7b1b ldrb r3, [r3, #12] 80076a6: 2b00 cmp r3, #0 80076a8: d13a bne.n 8007720 { USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); 80076aa: f507 7384 add.w r3, r7, #264 @ 0x108 80076ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80076b2: 681b ldr r3, [r3, #0] 80076b4: 6959 ldr r1, [r3, #20] 80076b6: f507 7384 add.w r3, r7, #264 @ 0x108 80076ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80076be: 681b ldr r3, [r3, #0] 80076c0: 88da ldrh r2, [r3, #6] 80076c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80076c6: b29b uxth r3, r3 80076c8: f507 7084 add.w r0, r7, #264 @ 0x108 80076cc: f5a0 7082 sub.w r0, r0, #260 @ 0x104 80076d0: 6800 ldr r0, [r0, #0] 80076d2: f001 fc9c bl 800900e PCD_SET_EP_TX_CNT(USBx, ep->num, len); 80076d6: f507 7384 add.w r3, r7, #264 @ 0x108 80076da: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80076de: 681b ldr r3, [r3, #0] 80076e0: 613b str r3, [r7, #16] 80076e2: f507 7384 add.w r3, r7, #264 @ 0x108 80076e6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80076ea: 681b ldr r3, [r3, #0] 80076ec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80076f0: b29b uxth r3, r3 80076f2: 461a mov r2, r3 80076f4: 693b ldr r3, [r7, #16] 80076f6: 4413 add r3, r2 80076f8: 613b str r3, [r7, #16] 80076fa: f507 7384 add.w r3, r7, #264 @ 0x108 80076fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007702: 681b ldr r3, [r3, #0] 8007704: 781b ldrb r3, [r3, #0] 8007706: 011a lsls r2, r3, #4 8007708: 693b ldr r3, [r7, #16] 800770a: 4413 add r3, r2 800770c: f203 4304 addw r3, r3, #1028 @ 0x404 8007710: 60fb str r3, [r7, #12] 8007712: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007716: b29a uxth r2, r3 8007718: 68fb ldr r3, [r7, #12] 800771a: 801a strh r2, [r3, #0] 800771c: f000 be1f b.w 800835e } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* double buffer bulk management */ if (ep->type == EP_TYPE_BULK) 8007720: f507 7384 add.w r3, r7, #264 @ 0x108 8007724: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007728: 681b ldr r3, [r3, #0] 800772a: 78db ldrb r3, [r3, #3] 800772c: 2b02 cmp r3, #2 800772e: f040 8462 bne.w 8007ff6 { if (ep->xfer_len_db > ep->maxpacket) 8007732: f507 7384 add.w r3, r7, #264 @ 0x108 8007736: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800773a: 681b ldr r3, [r3, #0] 800773c: 6a1a ldr r2, [r3, #32] 800773e: f507 7384 add.w r3, r7, #264 @ 0x108 8007742: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007746: 681b ldr r3, [r3, #0] 8007748: 691b ldr r3, [r3, #16] 800774a: 429a cmp r2, r3 800774c: f240 83df bls.w 8007f0e { /* enable double buffer */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 8007750: f507 7384 add.w r3, r7, #264 @ 0x108 8007754: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007758: 681a ldr r2, [r3, #0] 800775a: f507 7384 add.w r3, r7, #264 @ 0x108 800775e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007762: 681b ldr r3, [r3, #0] 8007764: 781b ldrb r3, [r3, #0] 8007766: 009b lsls r3, r3, #2 8007768: 4413 add r3, r2 800776a: 881b ldrh r3, [r3, #0] 800776c: b29b uxth r3, r3 800776e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007772: f023 0370 bic.w r3, r3, #112 @ 0x70 8007776: f8a7 3056 strh.w r3, [r7, #86] @ 0x56 800777a: f507 7384 add.w r3, r7, #264 @ 0x108 800777e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007782: 681a ldr r2, [r3, #0] 8007784: f507 7384 add.w r3, r7, #264 @ 0x108 8007788: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800778c: 681b ldr r3, [r3, #0] 800778e: 781b ldrb r3, [r3, #0] 8007790: 009b lsls r3, r3, #2 8007792: 441a add r2, r3 8007794: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56 8007798: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800779c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80077a0: f443 4301 orr.w r3, r3, #33024 @ 0x8100 80077a4: f043 0380 orr.w r3, r3, #128 @ 0x80 80077a8: b29b uxth r3, r3 80077aa: 8013 strh r3, [r2, #0] /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 80077ac: f507 7384 add.w r3, r7, #264 @ 0x108 80077b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80077b4: 681b ldr r3, [r3, #0] 80077b6: 6a1a ldr r2, [r3, #32] 80077b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80077bc: 1ad2 subs r2, r2, r3 80077be: f507 7384 add.w r3, r7, #264 @ 0x108 80077c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80077c6: 681b ldr r3, [r3, #0] 80077c8: 621a str r2, [r3, #32] /* Fill the two first buffer in the Buffer0 & Buffer1 */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 80077ca: f507 7384 add.w r3, r7, #264 @ 0x108 80077ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80077d2: 681a ldr r2, [r3, #0] 80077d4: f507 7384 add.w r3, r7, #264 @ 0x108 80077d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80077dc: 681b ldr r3, [r3, #0] 80077de: 781b ldrb r3, [r3, #0] 80077e0: 009b lsls r3, r3, #2 80077e2: 4413 add r3, r2 80077e4: 881b ldrh r3, [r3, #0] 80077e6: b29b uxth r3, r3 80077e8: f003 0340 and.w r3, r3, #64 @ 0x40 80077ec: 2b00 cmp r3, #0 80077ee: f000 81c7 beq.w 8007b80 { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 80077f2: f507 7384 add.w r3, r7, #264 @ 0x108 80077f6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80077fa: 681b ldr r3, [r3, #0] 80077fc: 633b str r3, [r7, #48] @ 0x30 80077fe: f507 7384 add.w r3, r7, #264 @ 0x108 8007802: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007806: 681b ldr r3, [r3, #0] 8007808: 785b ldrb r3, [r3, #1] 800780a: 2b00 cmp r3, #0 800780c: d177 bne.n 80078fe 800780e: f507 7384 add.w r3, r7, #264 @ 0x108 8007812: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007816: 681b ldr r3, [r3, #0] 8007818: 62bb str r3, [r7, #40] @ 0x28 800781a: f507 7384 add.w r3, r7, #264 @ 0x108 800781e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007822: 681b ldr r3, [r3, #0] 8007824: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007828: b29b uxth r3, r3 800782a: 461a mov r2, r3 800782c: 6abb ldr r3, [r7, #40] @ 0x28 800782e: 4413 add r3, r2 8007830: 62bb str r3, [r7, #40] @ 0x28 8007832: f507 7384 add.w r3, r7, #264 @ 0x108 8007836: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800783a: 681b ldr r3, [r3, #0] 800783c: 781b ldrb r3, [r3, #0] 800783e: 011a lsls r2, r3, #4 8007840: 6abb ldr r3, [r7, #40] @ 0x28 8007842: 4413 add r3, r2 8007844: f203 430c addw r3, r3, #1036 @ 0x40c 8007848: 627b str r3, [r7, #36] @ 0x24 800784a: 6a7b ldr r3, [r7, #36] @ 0x24 800784c: 881b ldrh r3, [r3, #0] 800784e: b29b uxth r3, r3 8007850: f3c3 0309 ubfx r3, r3, #0, #10 8007854: b29a uxth r2, r3 8007856: 6a7b ldr r3, [r7, #36] @ 0x24 8007858: 801a strh r2, [r3, #0] 800785a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800785e: 2b3e cmp r3, #62 @ 0x3e 8007860: d921 bls.n 80078a6 8007862: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007866: 095b lsrs r3, r3, #5 8007868: f8c7 3100 str.w r3, [r7, #256] @ 0x100 800786c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007870: f003 031f and.w r3, r3, #31 8007874: 2b00 cmp r3, #0 8007876: d104 bne.n 8007882 8007878: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 800787c: 3b01 subs r3, #1 800787e: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8007882: 6a7b ldr r3, [r7, #36] @ 0x24 8007884: 881b ldrh r3, [r3, #0] 8007886: b29a uxth r2, r3 8007888: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 800788c: b29b uxth r3, r3 800788e: 029b lsls r3, r3, #10 8007890: b29b uxth r3, r3 8007892: 4313 orrs r3, r2 8007894: b29b uxth r3, r3 8007896: ea6f 4343 mvn.w r3, r3, lsl #17 800789a: ea6f 4353 mvn.w r3, r3, lsr #17 800789e: b29a uxth r2, r3 80078a0: 6a7b ldr r3, [r7, #36] @ 0x24 80078a2: 801a strh r2, [r3, #0] 80078a4: e050 b.n 8007948 80078a6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80078aa: 2b00 cmp r3, #0 80078ac: d10a bne.n 80078c4 80078ae: 6a7b ldr r3, [r7, #36] @ 0x24 80078b0: 881b ldrh r3, [r3, #0] 80078b2: b29b uxth r3, r3 80078b4: ea6f 4343 mvn.w r3, r3, lsl #17 80078b8: ea6f 4353 mvn.w r3, r3, lsr #17 80078bc: b29a uxth r2, r3 80078be: 6a7b ldr r3, [r7, #36] @ 0x24 80078c0: 801a strh r2, [r3, #0] 80078c2: e041 b.n 8007948 80078c4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80078c8: 085b lsrs r3, r3, #1 80078ca: f8c7 3100 str.w r3, [r7, #256] @ 0x100 80078ce: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80078d2: f003 0301 and.w r3, r3, #1 80078d6: 2b00 cmp r3, #0 80078d8: d004 beq.n 80078e4 80078da: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 80078de: 3301 adds r3, #1 80078e0: f8c7 3100 str.w r3, [r7, #256] @ 0x100 80078e4: 6a7b ldr r3, [r7, #36] @ 0x24 80078e6: 881b ldrh r3, [r3, #0] 80078e8: b29a uxth r2, r3 80078ea: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 80078ee: b29b uxth r3, r3 80078f0: 029b lsls r3, r3, #10 80078f2: b29b uxth r3, r3 80078f4: 4313 orrs r3, r2 80078f6: b29a uxth r2, r3 80078f8: 6a7b ldr r3, [r7, #36] @ 0x24 80078fa: 801a strh r2, [r3, #0] 80078fc: e024 b.n 8007948 80078fe: f507 7384 add.w r3, r7, #264 @ 0x108 8007902: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007906: 681b ldr r3, [r3, #0] 8007908: 785b ldrb r3, [r3, #1] 800790a: 2b01 cmp r3, #1 800790c: d11c bne.n 8007948 800790e: f507 7384 add.w r3, r7, #264 @ 0x108 8007912: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007916: 681b ldr r3, [r3, #0] 8007918: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800791c: b29b uxth r3, r3 800791e: 461a mov r2, r3 8007920: 6b3b ldr r3, [r7, #48] @ 0x30 8007922: 4413 add r3, r2 8007924: 633b str r3, [r7, #48] @ 0x30 8007926: f507 7384 add.w r3, r7, #264 @ 0x108 800792a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800792e: 681b ldr r3, [r3, #0] 8007930: 781b ldrb r3, [r3, #0] 8007932: 011a lsls r2, r3, #4 8007934: 6b3b ldr r3, [r7, #48] @ 0x30 8007936: 4413 add r3, r2 8007938: f203 430c addw r3, r3, #1036 @ 0x40c 800793c: 62fb str r3, [r7, #44] @ 0x2c 800793e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007942: b29a uxth r2, r3 8007944: 6afb ldr r3, [r7, #44] @ 0x2c 8007946: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 8007948: f507 7384 add.w r3, r7, #264 @ 0x108 800794c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007950: 681b ldr r3, [r3, #0] 8007952: 895b ldrh r3, [r3, #10] 8007954: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8007958: f507 7384 add.w r3, r7, #264 @ 0x108 800795c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007960: 681b ldr r3, [r3, #0] 8007962: 6959 ldr r1, [r3, #20] 8007964: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007968: b29b uxth r3, r3 800796a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800796e: f507 7084 add.w r0, r7, #264 @ 0x108 8007972: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8007976: 6800 ldr r0, [r0, #0] 8007978: f001 fb49 bl 800900e ep->xfer_buff += len; 800797c: f507 7384 add.w r3, r7, #264 @ 0x108 8007980: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007984: 681b ldr r3, [r3, #0] 8007986: 695a ldr r2, [r3, #20] 8007988: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800798c: 441a add r2, r3 800798e: f507 7384 add.w r3, r7, #264 @ 0x108 8007992: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007996: 681b ldr r3, [r3, #0] 8007998: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 800799a: f507 7384 add.w r3, r7, #264 @ 0x108 800799e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80079a2: 681b ldr r3, [r3, #0] 80079a4: 6a1a ldr r2, [r3, #32] 80079a6: f507 7384 add.w r3, r7, #264 @ 0x108 80079aa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80079ae: 681b ldr r3, [r3, #0] 80079b0: 691b ldr r3, [r3, #16] 80079b2: 429a cmp r2, r3 80079b4: d90f bls.n 80079d6 { ep->xfer_len_db -= len; 80079b6: f507 7384 add.w r3, r7, #264 @ 0x108 80079ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80079be: 681b ldr r3, [r3, #0] 80079c0: 6a1a ldr r2, [r3, #32] 80079c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80079c6: 1ad2 subs r2, r2, r3 80079c8: f507 7384 add.w r3, r7, #264 @ 0x108 80079cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80079d0: 681b ldr r3, [r3, #0] 80079d2: 621a str r2, [r3, #32] 80079d4: e00e b.n 80079f4 } else { len = ep->xfer_len_db; 80079d6: f507 7384 add.w r3, r7, #264 @ 0x108 80079da: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80079de: 681b ldr r3, [r3, #0] 80079e0: 6a1b ldr r3, [r3, #32] 80079e2: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 80079e6: f507 7384 add.w r3, r7, #264 @ 0x108 80079ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80079ee: 681b ldr r3, [r3, #0] 80079f0: 2200 movs r2, #0 80079f2: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 80079f4: f507 7384 add.w r3, r7, #264 @ 0x108 80079f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80079fc: 681b ldr r3, [r3, #0] 80079fe: 785b ldrb r3, [r3, #1] 8007a00: 2b00 cmp r3, #0 8007a02: d177 bne.n 8007af4 8007a04: f507 7384 add.w r3, r7, #264 @ 0x108 8007a08: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007a0c: 681b ldr r3, [r3, #0] 8007a0e: 61bb str r3, [r7, #24] 8007a10: f507 7384 add.w r3, r7, #264 @ 0x108 8007a14: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007a18: 681b ldr r3, [r3, #0] 8007a1a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007a1e: b29b uxth r3, r3 8007a20: 461a mov r2, r3 8007a22: 69bb ldr r3, [r7, #24] 8007a24: 4413 add r3, r2 8007a26: 61bb str r3, [r7, #24] 8007a28: f507 7384 add.w r3, r7, #264 @ 0x108 8007a2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007a30: 681b ldr r3, [r3, #0] 8007a32: 781b ldrb r3, [r3, #0] 8007a34: 011a lsls r2, r3, #4 8007a36: 69bb ldr r3, [r7, #24] 8007a38: 4413 add r3, r2 8007a3a: f203 4304 addw r3, r3, #1028 @ 0x404 8007a3e: 617b str r3, [r7, #20] 8007a40: 697b ldr r3, [r7, #20] 8007a42: 881b ldrh r3, [r3, #0] 8007a44: b29b uxth r3, r3 8007a46: f3c3 0309 ubfx r3, r3, #0, #10 8007a4a: b29a uxth r2, r3 8007a4c: 697b ldr r3, [r7, #20] 8007a4e: 801a strh r2, [r3, #0] 8007a50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007a54: 2b3e cmp r3, #62 @ 0x3e 8007a56: d921 bls.n 8007a9c 8007a58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007a5c: 095b lsrs r3, r3, #5 8007a5e: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8007a62: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007a66: f003 031f and.w r3, r3, #31 8007a6a: 2b00 cmp r3, #0 8007a6c: d104 bne.n 8007a78 8007a6e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8007a72: 3b01 subs r3, #1 8007a74: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8007a78: 697b ldr r3, [r7, #20] 8007a7a: 881b ldrh r3, [r3, #0] 8007a7c: b29a uxth r2, r3 8007a7e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8007a82: b29b uxth r3, r3 8007a84: 029b lsls r3, r3, #10 8007a86: b29b uxth r3, r3 8007a88: 4313 orrs r3, r2 8007a8a: b29b uxth r3, r3 8007a8c: ea6f 4343 mvn.w r3, r3, lsl #17 8007a90: ea6f 4353 mvn.w r3, r3, lsr #17 8007a94: b29a uxth r2, r3 8007a96: 697b ldr r3, [r7, #20] 8007a98: 801a strh r2, [r3, #0] 8007a9a: e056 b.n 8007b4a 8007a9c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007aa0: 2b00 cmp r3, #0 8007aa2: d10a bne.n 8007aba 8007aa4: 697b ldr r3, [r7, #20] 8007aa6: 881b ldrh r3, [r3, #0] 8007aa8: b29b uxth r3, r3 8007aaa: ea6f 4343 mvn.w r3, r3, lsl #17 8007aae: ea6f 4353 mvn.w r3, r3, lsr #17 8007ab2: b29a uxth r2, r3 8007ab4: 697b ldr r3, [r7, #20] 8007ab6: 801a strh r2, [r3, #0] 8007ab8: e047 b.n 8007b4a 8007aba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007abe: 085b lsrs r3, r3, #1 8007ac0: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8007ac4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007ac8: f003 0301 and.w r3, r3, #1 8007acc: 2b00 cmp r3, #0 8007ace: d004 beq.n 8007ada 8007ad0: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8007ad4: 3301 adds r3, #1 8007ad6: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8007ada: 697b ldr r3, [r7, #20] 8007adc: 881b ldrh r3, [r3, #0] 8007ade: b29a uxth r2, r3 8007ae0: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8007ae4: b29b uxth r3, r3 8007ae6: 029b lsls r3, r3, #10 8007ae8: b29b uxth r3, r3 8007aea: 4313 orrs r3, r2 8007aec: b29a uxth r2, r3 8007aee: 697b ldr r3, [r7, #20] 8007af0: 801a strh r2, [r3, #0] 8007af2: e02a b.n 8007b4a 8007af4: f507 7384 add.w r3, r7, #264 @ 0x108 8007af8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007afc: 681b ldr r3, [r3, #0] 8007afe: 785b ldrb r3, [r3, #1] 8007b00: 2b01 cmp r3, #1 8007b02: d122 bne.n 8007b4a 8007b04: f507 7384 add.w r3, r7, #264 @ 0x108 8007b08: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007b0c: 681b ldr r3, [r3, #0] 8007b0e: 623b str r3, [r7, #32] 8007b10: f507 7384 add.w r3, r7, #264 @ 0x108 8007b14: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007b18: 681b ldr r3, [r3, #0] 8007b1a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007b1e: b29b uxth r3, r3 8007b20: 461a mov r2, r3 8007b22: 6a3b ldr r3, [r7, #32] 8007b24: 4413 add r3, r2 8007b26: 623b str r3, [r7, #32] 8007b28: f507 7384 add.w r3, r7, #264 @ 0x108 8007b2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b30: 681b ldr r3, [r3, #0] 8007b32: 781b ldrb r3, [r3, #0] 8007b34: 011a lsls r2, r3, #4 8007b36: 6a3b ldr r3, [r7, #32] 8007b38: 4413 add r3, r2 8007b3a: f203 4304 addw r3, r3, #1028 @ 0x404 8007b3e: 61fb str r3, [r7, #28] 8007b40: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007b44: b29a uxth r2, r3 8007b46: 69fb ldr r3, [r7, #28] 8007b48: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8007b4a: f507 7384 add.w r3, r7, #264 @ 0x108 8007b4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b52: 681b ldr r3, [r3, #0] 8007b54: 891b ldrh r3, [r3, #8] 8007b56: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8007b5a: f507 7384 add.w r3, r7, #264 @ 0x108 8007b5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b62: 681b ldr r3, [r3, #0] 8007b64: 6959 ldr r1, [r3, #20] 8007b66: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007b6a: b29b uxth r3, r3 8007b6c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8007b70: f507 7084 add.w r0, r7, #264 @ 0x108 8007b74: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8007b78: 6800 ldr r0, [r0, #0] 8007b7a: f001 fa48 bl 800900e 8007b7e: e3ee b.n 800835e } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 8007b80: f507 7384 add.w r3, r7, #264 @ 0x108 8007b84: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b88: 681b ldr r3, [r3, #0] 8007b8a: 785b ldrb r3, [r3, #1] 8007b8c: 2b00 cmp r3, #0 8007b8e: d177 bne.n 8007c80 8007b90: f507 7384 add.w r3, r7, #264 @ 0x108 8007b94: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007b98: 681b ldr r3, [r3, #0] 8007b9a: 64bb str r3, [r7, #72] @ 0x48 8007b9c: f507 7384 add.w r3, r7, #264 @ 0x108 8007ba0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007ba4: 681b ldr r3, [r3, #0] 8007ba6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007baa: b29b uxth r3, r3 8007bac: 461a mov r2, r3 8007bae: 6cbb ldr r3, [r7, #72] @ 0x48 8007bb0: 4413 add r3, r2 8007bb2: 64bb str r3, [r7, #72] @ 0x48 8007bb4: f507 7384 add.w r3, r7, #264 @ 0x108 8007bb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007bbc: 681b ldr r3, [r3, #0] 8007bbe: 781b ldrb r3, [r3, #0] 8007bc0: 011a lsls r2, r3, #4 8007bc2: 6cbb ldr r3, [r7, #72] @ 0x48 8007bc4: 4413 add r3, r2 8007bc6: f203 4304 addw r3, r3, #1028 @ 0x404 8007bca: 647b str r3, [r7, #68] @ 0x44 8007bcc: 6c7b ldr r3, [r7, #68] @ 0x44 8007bce: 881b ldrh r3, [r3, #0] 8007bd0: b29b uxth r3, r3 8007bd2: f3c3 0309 ubfx r3, r3, #0, #10 8007bd6: b29a uxth r2, r3 8007bd8: 6c7b ldr r3, [r7, #68] @ 0x44 8007bda: 801a strh r2, [r3, #0] 8007bdc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007be0: 2b3e cmp r3, #62 @ 0x3e 8007be2: d921 bls.n 8007c28 8007be4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007be8: 095b lsrs r3, r3, #5 8007bea: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8007bee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007bf2: f003 031f and.w r3, r3, #31 8007bf6: 2b00 cmp r3, #0 8007bf8: d104 bne.n 8007c04 8007bfa: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8007bfe: 3b01 subs r3, #1 8007c00: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8007c04: 6c7b ldr r3, [r7, #68] @ 0x44 8007c06: 881b ldrh r3, [r3, #0] 8007c08: b29a uxth r2, r3 8007c0a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8007c0e: b29b uxth r3, r3 8007c10: 029b lsls r3, r3, #10 8007c12: b29b uxth r3, r3 8007c14: 4313 orrs r3, r2 8007c16: b29b uxth r3, r3 8007c18: ea6f 4343 mvn.w r3, r3, lsl #17 8007c1c: ea6f 4353 mvn.w r3, r3, lsr #17 8007c20: b29a uxth r2, r3 8007c22: 6c7b ldr r3, [r7, #68] @ 0x44 8007c24: 801a strh r2, [r3, #0] 8007c26: e056 b.n 8007cd6 8007c28: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007c2c: 2b00 cmp r3, #0 8007c2e: d10a bne.n 8007c46 8007c30: 6c7b ldr r3, [r7, #68] @ 0x44 8007c32: 881b ldrh r3, [r3, #0] 8007c34: b29b uxth r3, r3 8007c36: ea6f 4343 mvn.w r3, r3, lsl #17 8007c3a: ea6f 4353 mvn.w r3, r3, lsr #17 8007c3e: b29a uxth r2, r3 8007c40: 6c7b ldr r3, [r7, #68] @ 0x44 8007c42: 801a strh r2, [r3, #0] 8007c44: e047 b.n 8007cd6 8007c46: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007c4a: 085b lsrs r3, r3, #1 8007c4c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8007c50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007c54: f003 0301 and.w r3, r3, #1 8007c58: 2b00 cmp r3, #0 8007c5a: d004 beq.n 8007c66 8007c5c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8007c60: 3301 adds r3, #1 8007c62: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8007c66: 6c7b ldr r3, [r7, #68] @ 0x44 8007c68: 881b ldrh r3, [r3, #0] 8007c6a: b29a uxth r2, r3 8007c6c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8007c70: b29b uxth r3, r3 8007c72: 029b lsls r3, r3, #10 8007c74: b29b uxth r3, r3 8007c76: 4313 orrs r3, r2 8007c78: b29a uxth r2, r3 8007c7a: 6c7b ldr r3, [r7, #68] @ 0x44 8007c7c: 801a strh r2, [r3, #0] 8007c7e: e02a b.n 8007cd6 8007c80: f507 7384 add.w r3, r7, #264 @ 0x108 8007c84: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007c88: 681b ldr r3, [r3, #0] 8007c8a: 785b ldrb r3, [r3, #1] 8007c8c: 2b01 cmp r3, #1 8007c8e: d122 bne.n 8007cd6 8007c90: f507 7384 add.w r3, r7, #264 @ 0x108 8007c94: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007c98: 681b ldr r3, [r3, #0] 8007c9a: 653b str r3, [r7, #80] @ 0x50 8007c9c: f507 7384 add.w r3, r7, #264 @ 0x108 8007ca0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007ca4: 681b ldr r3, [r3, #0] 8007ca6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007caa: b29b uxth r3, r3 8007cac: 461a mov r2, r3 8007cae: 6d3b ldr r3, [r7, #80] @ 0x50 8007cb0: 4413 add r3, r2 8007cb2: 653b str r3, [r7, #80] @ 0x50 8007cb4: f507 7384 add.w r3, r7, #264 @ 0x108 8007cb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007cbc: 681b ldr r3, [r3, #0] 8007cbe: 781b ldrb r3, [r3, #0] 8007cc0: 011a lsls r2, r3, #4 8007cc2: 6d3b ldr r3, [r7, #80] @ 0x50 8007cc4: 4413 add r3, r2 8007cc6: f203 4304 addw r3, r3, #1028 @ 0x404 8007cca: 64fb str r3, [r7, #76] @ 0x4c 8007ccc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007cd0: b29a uxth r2, r3 8007cd2: 6cfb ldr r3, [r7, #76] @ 0x4c 8007cd4: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8007cd6: f507 7384 add.w r3, r7, #264 @ 0x108 8007cda: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007cde: 681b ldr r3, [r3, #0] 8007ce0: 891b ldrh r3, [r3, #8] 8007ce2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8007ce6: f507 7384 add.w r3, r7, #264 @ 0x108 8007cea: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007cee: 681b ldr r3, [r3, #0] 8007cf0: 6959 ldr r1, [r3, #20] 8007cf2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007cf6: b29b uxth r3, r3 8007cf8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8007cfc: f507 7084 add.w r0, r7, #264 @ 0x108 8007d00: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8007d04: 6800 ldr r0, [r0, #0] 8007d06: f001 f982 bl 800900e ep->xfer_buff += len; 8007d0a: f507 7384 add.w r3, r7, #264 @ 0x108 8007d0e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d12: 681b ldr r3, [r3, #0] 8007d14: 695a ldr r2, [r3, #20] 8007d16: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007d1a: 441a add r2, r3 8007d1c: f507 7384 add.w r3, r7, #264 @ 0x108 8007d20: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d24: 681b ldr r3, [r3, #0] 8007d26: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 8007d28: f507 7384 add.w r3, r7, #264 @ 0x108 8007d2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d30: 681b ldr r3, [r3, #0] 8007d32: 6a1a ldr r2, [r3, #32] 8007d34: f507 7384 add.w r3, r7, #264 @ 0x108 8007d38: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d3c: 681b ldr r3, [r3, #0] 8007d3e: 691b ldr r3, [r3, #16] 8007d40: 429a cmp r2, r3 8007d42: d90f bls.n 8007d64 { ep->xfer_len_db -= len; 8007d44: f507 7384 add.w r3, r7, #264 @ 0x108 8007d48: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d4c: 681b ldr r3, [r3, #0] 8007d4e: 6a1a ldr r2, [r3, #32] 8007d50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007d54: 1ad2 subs r2, r2, r3 8007d56: f507 7384 add.w r3, r7, #264 @ 0x108 8007d5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d5e: 681b ldr r3, [r3, #0] 8007d60: 621a str r2, [r3, #32] 8007d62: e00e b.n 8007d82 } else { len = ep->xfer_len_db; 8007d64: f507 7384 add.w r3, r7, #264 @ 0x108 8007d68: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d6c: 681b ldr r3, [r3, #0] 8007d6e: 6a1b ldr r3, [r3, #32] 8007d70: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 8007d74: f507 7384 add.w r3, r7, #264 @ 0x108 8007d78: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d7c: 681b ldr r3, [r3, #0] 8007d7e: 2200 movs r2, #0 8007d80: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 8007d82: f507 7384 add.w r3, r7, #264 @ 0x108 8007d86: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007d8a: 681b ldr r3, [r3, #0] 8007d8c: 643b str r3, [r7, #64] @ 0x40 8007d8e: f507 7384 add.w r3, r7, #264 @ 0x108 8007d92: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d96: 681b ldr r3, [r3, #0] 8007d98: 785b ldrb r3, [r3, #1] 8007d9a: 2b00 cmp r3, #0 8007d9c: d177 bne.n 8007e8e 8007d9e: f507 7384 add.w r3, r7, #264 @ 0x108 8007da2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007da6: 681b ldr r3, [r3, #0] 8007da8: 63bb str r3, [r7, #56] @ 0x38 8007daa: f507 7384 add.w r3, r7, #264 @ 0x108 8007dae: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007db2: 681b ldr r3, [r3, #0] 8007db4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007db8: b29b uxth r3, r3 8007dba: 461a mov r2, r3 8007dbc: 6bbb ldr r3, [r7, #56] @ 0x38 8007dbe: 4413 add r3, r2 8007dc0: 63bb str r3, [r7, #56] @ 0x38 8007dc2: f507 7384 add.w r3, r7, #264 @ 0x108 8007dc6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007dca: 681b ldr r3, [r3, #0] 8007dcc: 781b ldrb r3, [r3, #0] 8007dce: 011a lsls r2, r3, #4 8007dd0: 6bbb ldr r3, [r7, #56] @ 0x38 8007dd2: 4413 add r3, r2 8007dd4: f203 430c addw r3, r3, #1036 @ 0x40c 8007dd8: 637b str r3, [r7, #52] @ 0x34 8007dda: 6b7b ldr r3, [r7, #52] @ 0x34 8007ddc: 881b ldrh r3, [r3, #0] 8007dde: b29b uxth r3, r3 8007de0: f3c3 0309 ubfx r3, r3, #0, #10 8007de4: b29a uxth r2, r3 8007de6: 6b7b ldr r3, [r7, #52] @ 0x34 8007de8: 801a strh r2, [r3, #0] 8007dea: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007dee: 2b3e cmp r3, #62 @ 0x3e 8007df0: d921 bls.n 8007e36 8007df2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007df6: 095b lsrs r3, r3, #5 8007df8: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 8007dfc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007e00: f003 031f and.w r3, r3, #31 8007e04: 2b00 cmp r3, #0 8007e06: d104 bne.n 8007e12 8007e08: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8007e0c: 3b01 subs r3, #1 8007e0e: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 8007e12: 6b7b ldr r3, [r7, #52] @ 0x34 8007e14: 881b ldrh r3, [r3, #0] 8007e16: b29a uxth r2, r3 8007e18: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8007e1c: b29b uxth r3, r3 8007e1e: 029b lsls r3, r3, #10 8007e20: b29b uxth r3, r3 8007e22: 4313 orrs r3, r2 8007e24: b29b uxth r3, r3 8007e26: ea6f 4343 mvn.w r3, r3, lsl #17 8007e2a: ea6f 4353 mvn.w r3, r3, lsr #17 8007e2e: b29a uxth r2, r3 8007e30: 6b7b ldr r3, [r7, #52] @ 0x34 8007e32: 801a strh r2, [r3, #0] 8007e34: e050 b.n 8007ed8 8007e36: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007e3a: 2b00 cmp r3, #0 8007e3c: d10a bne.n 8007e54 8007e3e: 6b7b ldr r3, [r7, #52] @ 0x34 8007e40: 881b ldrh r3, [r3, #0] 8007e42: b29b uxth r3, r3 8007e44: ea6f 4343 mvn.w r3, r3, lsl #17 8007e48: ea6f 4353 mvn.w r3, r3, lsr #17 8007e4c: b29a uxth r2, r3 8007e4e: 6b7b ldr r3, [r7, #52] @ 0x34 8007e50: 801a strh r2, [r3, #0] 8007e52: e041 b.n 8007ed8 8007e54: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007e58: 085b lsrs r3, r3, #1 8007e5a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 8007e5e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007e62: f003 0301 and.w r3, r3, #1 8007e66: 2b00 cmp r3, #0 8007e68: d004 beq.n 8007e74 8007e6a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8007e6e: 3301 adds r3, #1 8007e70: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 8007e74: 6b7b ldr r3, [r7, #52] @ 0x34 8007e76: 881b ldrh r3, [r3, #0] 8007e78: b29a uxth r2, r3 8007e7a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8007e7e: b29b uxth r3, r3 8007e80: 029b lsls r3, r3, #10 8007e82: b29b uxth r3, r3 8007e84: 4313 orrs r3, r2 8007e86: b29a uxth r2, r3 8007e88: 6b7b ldr r3, [r7, #52] @ 0x34 8007e8a: 801a strh r2, [r3, #0] 8007e8c: e024 b.n 8007ed8 8007e8e: f507 7384 add.w r3, r7, #264 @ 0x108 8007e92: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007e96: 681b ldr r3, [r3, #0] 8007e98: 785b ldrb r3, [r3, #1] 8007e9a: 2b01 cmp r3, #1 8007e9c: d11c bne.n 8007ed8 8007e9e: f507 7384 add.w r3, r7, #264 @ 0x108 8007ea2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007ea6: 681b ldr r3, [r3, #0] 8007ea8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007eac: b29b uxth r3, r3 8007eae: 461a mov r2, r3 8007eb0: 6c3b ldr r3, [r7, #64] @ 0x40 8007eb2: 4413 add r3, r2 8007eb4: 643b str r3, [r7, #64] @ 0x40 8007eb6: f507 7384 add.w r3, r7, #264 @ 0x108 8007eba: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007ebe: 681b ldr r3, [r3, #0] 8007ec0: 781b ldrb r3, [r3, #0] 8007ec2: 011a lsls r2, r3, #4 8007ec4: 6c3b ldr r3, [r7, #64] @ 0x40 8007ec6: 4413 add r3, r2 8007ec8: f203 430c addw r3, r3, #1036 @ 0x40c 8007ecc: 63fb str r3, [r7, #60] @ 0x3c 8007ece: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007ed2: b29a uxth r2, r3 8007ed4: 6bfb ldr r3, [r7, #60] @ 0x3c 8007ed6: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 8007ed8: f507 7384 add.w r3, r7, #264 @ 0x108 8007edc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007ee0: 681b ldr r3, [r3, #0] 8007ee2: 895b ldrh r3, [r3, #10] 8007ee4: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8007ee8: f507 7384 add.w r3, r7, #264 @ 0x108 8007eec: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007ef0: 681b ldr r3, [r3, #0] 8007ef2: 6959 ldr r1, [r3, #20] 8007ef4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007ef8: b29b uxth r3, r3 8007efa: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8007efe: f507 7084 add.w r0, r7, #264 @ 0x108 8007f02: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8007f06: 6800 ldr r0, [r0, #0] 8007f08: f001 f881 bl 800900e 8007f0c: e227 b.n 800835e } } /* auto Switch to single buffer mode when transfer xfer_len_db; 8007f0e: f507 7384 add.w r3, r7, #264 @ 0x108 8007f12: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007f16: 681b ldr r3, [r3, #0] 8007f18: 6a1b ldr r3, [r3, #32] 8007f1a: f8c7 3104 str.w r3, [r7, #260] @ 0x104 /* disable double buffer mode for Bulk endpoint */ PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num); 8007f1e: f507 7384 add.w r3, r7, #264 @ 0x108 8007f22: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007f26: 681a ldr r2, [r3, #0] 8007f28: f507 7384 add.w r3, r7, #264 @ 0x108 8007f2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007f30: 681b ldr r3, [r3, #0] 8007f32: 781b ldrb r3, [r3, #0] 8007f34: 009b lsls r3, r3, #2 8007f36: 4413 add r3, r2 8007f38: 881b ldrh r3, [r3, #0] 8007f3a: b29b uxth r3, r3 8007f3c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 8007f40: f023 0370 bic.w r3, r3, #112 @ 0x70 8007f44: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 8007f48: f507 7384 add.w r3, r7, #264 @ 0x108 8007f4c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007f50: 681a ldr r2, [r3, #0] 8007f52: f507 7384 add.w r3, r7, #264 @ 0x108 8007f56: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007f5a: 681b ldr r3, [r3, #0] 8007f5c: 781b ldrb r3, [r3, #0] 8007f5e: 009b lsls r3, r3, #2 8007f60: 441a add r2, r3 8007f62: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 8007f66: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007f6a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007f6e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007f72: f043 0380 orr.w r3, r3, #128 @ 0x80 8007f76: b29b uxth r3, r3 8007f78: 8013 strh r3, [r2, #0] /* Set Tx count with nbre of byte to be transmitted */ PCD_SET_EP_TX_CNT(USBx, ep->num, len); 8007f7a: f507 7384 add.w r3, r7, #264 @ 0x108 8007f7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007f82: 681b ldr r3, [r3, #0] 8007f84: 65fb str r3, [r7, #92] @ 0x5c 8007f86: f507 7384 add.w r3, r7, #264 @ 0x108 8007f8a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007f8e: 681b ldr r3, [r3, #0] 8007f90: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007f94: b29b uxth r3, r3 8007f96: 461a mov r2, r3 8007f98: 6dfb ldr r3, [r7, #92] @ 0x5c 8007f9a: 4413 add r3, r2 8007f9c: 65fb str r3, [r7, #92] @ 0x5c 8007f9e: f507 7384 add.w r3, r7, #264 @ 0x108 8007fa2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007fa6: 681b ldr r3, [r3, #0] 8007fa8: 781b ldrb r3, [r3, #0] 8007faa: 011a lsls r2, r3, #4 8007fac: 6dfb ldr r3, [r7, #92] @ 0x5c 8007fae: 4413 add r3, r2 8007fb0: f203 4304 addw r3, r3, #1028 @ 0x404 8007fb4: 65bb str r3, [r7, #88] @ 0x58 8007fb6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007fba: b29a uxth r2, r3 8007fbc: 6dbb ldr r3, [r7, #88] @ 0x58 8007fbe: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8007fc0: f507 7384 add.w r3, r7, #264 @ 0x108 8007fc4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007fc8: 681b ldr r3, [r3, #0] 8007fca: 891b ldrh r3, [r3, #8] 8007fcc: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8007fd0: f507 7384 add.w r3, r7, #264 @ 0x108 8007fd4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007fd8: 681b ldr r3, [r3, #0] 8007fda: 6959 ldr r1, [r3, #20] 8007fdc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007fe0: b29b uxth r3, r3 8007fe2: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8007fe6: f507 7084 add.w r0, r7, #264 @ 0x108 8007fea: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8007fee: 6800 ldr r0, [r0, #0] 8007ff0: f001 f80d bl 800900e 8007ff4: e1b3 b.n 800835e } } else /* manage isochronous double buffer IN mode */ { /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 8007ff6: f507 7384 add.w r3, r7, #264 @ 0x108 8007ffa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007ffe: 681b ldr r3, [r3, #0] 8008000: 6a1a ldr r2, [r3, #32] 8008002: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008006: 1ad2 subs r2, r2, r3 8008008: f507 7384 add.w r3, r7, #264 @ 0x108 800800c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008010: 681b ldr r3, [r3, #0] 8008012: 621a str r2, [r3, #32] /* Fill the data buffer */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 8008014: f507 7384 add.w r3, r7, #264 @ 0x108 8008018: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800801c: 681a ldr r2, [r3, #0] 800801e: f507 7384 add.w r3, r7, #264 @ 0x108 8008022: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008026: 681b ldr r3, [r3, #0] 8008028: 781b ldrb r3, [r3, #0] 800802a: 009b lsls r3, r3, #2 800802c: 4413 add r3, r2 800802e: 881b ldrh r3, [r3, #0] 8008030: b29b uxth r3, r3 8008032: f003 0340 and.w r3, r3, #64 @ 0x40 8008036: 2b00 cmp r3, #0 8008038: f000 80c6 beq.w 80081c8 { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 800803c: f507 7384 add.w r3, r7, #264 @ 0x108 8008040: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008044: 681b ldr r3, [r3, #0] 8008046: 673b str r3, [r7, #112] @ 0x70 8008048: f507 7384 add.w r3, r7, #264 @ 0x108 800804c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008050: 681b ldr r3, [r3, #0] 8008052: 785b ldrb r3, [r3, #1] 8008054: 2b00 cmp r3, #0 8008056: d177 bne.n 8008148 8008058: f507 7384 add.w r3, r7, #264 @ 0x108 800805c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008060: 681b ldr r3, [r3, #0] 8008062: 66bb str r3, [r7, #104] @ 0x68 8008064: f507 7384 add.w r3, r7, #264 @ 0x108 8008068: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800806c: 681b ldr r3, [r3, #0] 800806e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008072: b29b uxth r3, r3 8008074: 461a mov r2, r3 8008076: 6ebb ldr r3, [r7, #104] @ 0x68 8008078: 4413 add r3, r2 800807a: 66bb str r3, [r7, #104] @ 0x68 800807c: f507 7384 add.w r3, r7, #264 @ 0x108 8008080: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008084: 681b ldr r3, [r3, #0] 8008086: 781b ldrb r3, [r3, #0] 8008088: 011a lsls r2, r3, #4 800808a: 6ebb ldr r3, [r7, #104] @ 0x68 800808c: 4413 add r3, r2 800808e: f203 430c addw r3, r3, #1036 @ 0x40c 8008092: 667b str r3, [r7, #100] @ 0x64 8008094: 6e7b ldr r3, [r7, #100] @ 0x64 8008096: 881b ldrh r3, [r3, #0] 8008098: b29b uxth r3, r3 800809a: f3c3 0309 ubfx r3, r3, #0, #10 800809e: b29a uxth r2, r3 80080a0: 6e7b ldr r3, [r7, #100] @ 0x64 80080a2: 801a strh r2, [r3, #0] 80080a4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80080a8: 2b3e cmp r3, #62 @ 0x3e 80080aa: d921 bls.n 80080f0 80080ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80080b0: 095b lsrs r3, r3, #5 80080b2: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 80080b6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80080ba: f003 031f and.w r3, r3, #31 80080be: 2b00 cmp r3, #0 80080c0: d104 bne.n 80080cc 80080c2: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 80080c6: 3b01 subs r3, #1 80080c8: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 80080cc: 6e7b ldr r3, [r7, #100] @ 0x64 80080ce: 881b ldrh r3, [r3, #0] 80080d0: b29a uxth r2, r3 80080d2: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 80080d6: b29b uxth r3, r3 80080d8: 029b lsls r3, r3, #10 80080da: b29b uxth r3, r3 80080dc: 4313 orrs r3, r2 80080de: b29b uxth r3, r3 80080e0: ea6f 4343 mvn.w r3, r3, lsl #17 80080e4: ea6f 4353 mvn.w r3, r3, lsr #17 80080e8: b29a uxth r2, r3 80080ea: 6e7b ldr r3, [r7, #100] @ 0x64 80080ec: 801a strh r2, [r3, #0] 80080ee: e050 b.n 8008192 80080f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80080f4: 2b00 cmp r3, #0 80080f6: d10a bne.n 800810e 80080f8: 6e7b ldr r3, [r7, #100] @ 0x64 80080fa: 881b ldrh r3, [r3, #0] 80080fc: b29b uxth r3, r3 80080fe: ea6f 4343 mvn.w r3, r3, lsl #17 8008102: ea6f 4353 mvn.w r3, r3, lsr #17 8008106: b29a uxth r2, r3 8008108: 6e7b ldr r3, [r7, #100] @ 0x64 800810a: 801a strh r2, [r3, #0] 800810c: e041 b.n 8008192 800810e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008112: 085b lsrs r3, r3, #1 8008114: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 8008118: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800811c: f003 0301 and.w r3, r3, #1 8008120: 2b00 cmp r3, #0 8008122: d004 beq.n 800812e 8008124: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 8008128: 3301 adds r3, #1 800812a: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800812e: 6e7b ldr r3, [r7, #100] @ 0x64 8008130: 881b ldrh r3, [r3, #0] 8008132: b29a uxth r2, r3 8008134: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 8008138: b29b uxth r3, r3 800813a: 029b lsls r3, r3, #10 800813c: b29b uxth r3, r3 800813e: 4313 orrs r3, r2 8008140: b29a uxth r2, r3 8008142: 6e7b ldr r3, [r7, #100] @ 0x64 8008144: 801a strh r2, [r3, #0] 8008146: e024 b.n 8008192 8008148: f507 7384 add.w r3, r7, #264 @ 0x108 800814c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008150: 681b ldr r3, [r3, #0] 8008152: 785b ldrb r3, [r3, #1] 8008154: 2b01 cmp r3, #1 8008156: d11c bne.n 8008192 8008158: f507 7384 add.w r3, r7, #264 @ 0x108 800815c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008160: 681b ldr r3, [r3, #0] 8008162: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008166: b29b uxth r3, r3 8008168: 461a mov r2, r3 800816a: 6f3b ldr r3, [r7, #112] @ 0x70 800816c: 4413 add r3, r2 800816e: 673b str r3, [r7, #112] @ 0x70 8008170: f507 7384 add.w r3, r7, #264 @ 0x108 8008174: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008178: 681b ldr r3, [r3, #0] 800817a: 781b ldrb r3, [r3, #0] 800817c: 011a lsls r2, r3, #4 800817e: 6f3b ldr r3, [r7, #112] @ 0x70 8008180: 4413 add r3, r2 8008182: f203 430c addw r3, r3, #1036 @ 0x40c 8008186: 66fb str r3, [r7, #108] @ 0x6c 8008188: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800818c: b29a uxth r2, r3 800818e: 6efb ldr r3, [r7, #108] @ 0x6c 8008190: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 8008192: f507 7384 add.w r3, r7, #264 @ 0x108 8008196: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800819a: 681b ldr r3, [r3, #0] 800819c: 895b ldrh r3, [r3, #10] 800819e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 80081a2: f507 7384 add.w r3, r7, #264 @ 0x108 80081a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80081aa: 681b ldr r3, [r3, #0] 80081ac: 6959 ldr r1, [r3, #20] 80081ae: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80081b2: b29b uxth r3, r3 80081b4: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 80081b8: f507 7084 add.w r0, r7, #264 @ 0x108 80081bc: f5a0 7082 sub.w r0, r0, #260 @ 0x104 80081c0: 6800 ldr r0, [r0, #0] 80081c2: f000 ff24 bl 800900e 80081c6: e0ca b.n 800835e } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 80081c8: f507 7384 add.w r3, r7, #264 @ 0x108 80081cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80081d0: 681b ldr r3, [r3, #0] 80081d2: 785b ldrb r3, [r3, #1] 80081d4: 2b00 cmp r3, #0 80081d6: d177 bne.n 80082c8 80081d8: f507 7384 add.w r3, r7, #264 @ 0x108 80081dc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80081e0: 681b ldr r3, [r3, #0] 80081e2: 67fb str r3, [r7, #124] @ 0x7c 80081e4: f507 7384 add.w r3, r7, #264 @ 0x108 80081e8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80081ec: 681b ldr r3, [r3, #0] 80081ee: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80081f2: b29b uxth r3, r3 80081f4: 461a mov r2, r3 80081f6: 6ffb ldr r3, [r7, #124] @ 0x7c 80081f8: 4413 add r3, r2 80081fa: 67fb str r3, [r7, #124] @ 0x7c 80081fc: f507 7384 add.w r3, r7, #264 @ 0x108 8008200: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008204: 681b ldr r3, [r3, #0] 8008206: 781b ldrb r3, [r3, #0] 8008208: 011a lsls r2, r3, #4 800820a: 6ffb ldr r3, [r7, #124] @ 0x7c 800820c: 4413 add r3, r2 800820e: f203 4304 addw r3, r3, #1028 @ 0x404 8008212: 67bb str r3, [r7, #120] @ 0x78 8008214: 6fbb ldr r3, [r7, #120] @ 0x78 8008216: 881b ldrh r3, [r3, #0] 8008218: b29b uxth r3, r3 800821a: f3c3 0309 ubfx r3, r3, #0, #10 800821e: b29a uxth r2, r3 8008220: 6fbb ldr r3, [r7, #120] @ 0x78 8008222: 801a strh r2, [r3, #0] 8008224: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008228: 2b3e cmp r3, #62 @ 0x3e 800822a: d921 bls.n 8008270 800822c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008230: 095b lsrs r3, r3, #5 8008232: f8c7 30ec str.w r3, [r7, #236] @ 0xec 8008236: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800823a: f003 031f and.w r3, r3, #31 800823e: 2b00 cmp r3, #0 8008240: d104 bne.n 800824c 8008242: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 8008246: 3b01 subs r3, #1 8008248: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800824c: 6fbb ldr r3, [r7, #120] @ 0x78 800824e: 881b ldrh r3, [r3, #0] 8008250: b29a uxth r2, r3 8008252: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 8008256: b29b uxth r3, r3 8008258: 029b lsls r3, r3, #10 800825a: b29b uxth r3, r3 800825c: 4313 orrs r3, r2 800825e: b29b uxth r3, r3 8008260: ea6f 4343 mvn.w r3, r3, lsl #17 8008264: ea6f 4353 mvn.w r3, r3, lsr #17 8008268: b29a uxth r2, r3 800826a: 6fbb ldr r3, [r7, #120] @ 0x78 800826c: 801a strh r2, [r3, #0] 800826e: e05c b.n 800832a 8008270: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008274: 2b00 cmp r3, #0 8008276: d10a bne.n 800828e 8008278: 6fbb ldr r3, [r7, #120] @ 0x78 800827a: 881b ldrh r3, [r3, #0] 800827c: b29b uxth r3, r3 800827e: ea6f 4343 mvn.w r3, r3, lsl #17 8008282: ea6f 4353 mvn.w r3, r3, lsr #17 8008286: b29a uxth r2, r3 8008288: 6fbb ldr r3, [r7, #120] @ 0x78 800828a: 801a strh r2, [r3, #0] 800828c: e04d b.n 800832a 800828e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008292: 085b lsrs r3, r3, #1 8008294: f8c7 30ec str.w r3, [r7, #236] @ 0xec 8008298: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800829c: f003 0301 and.w r3, r3, #1 80082a0: 2b00 cmp r3, #0 80082a2: d004 beq.n 80082ae 80082a4: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 80082a8: 3301 adds r3, #1 80082aa: f8c7 30ec str.w r3, [r7, #236] @ 0xec 80082ae: 6fbb ldr r3, [r7, #120] @ 0x78 80082b0: 881b ldrh r3, [r3, #0] 80082b2: b29a uxth r2, r3 80082b4: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 80082b8: b29b uxth r3, r3 80082ba: 029b lsls r3, r3, #10 80082bc: b29b uxth r3, r3 80082be: 4313 orrs r3, r2 80082c0: b29a uxth r2, r3 80082c2: 6fbb ldr r3, [r7, #120] @ 0x78 80082c4: 801a strh r2, [r3, #0] 80082c6: e030 b.n 800832a 80082c8: f507 7384 add.w r3, r7, #264 @ 0x108 80082cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80082d0: 681b ldr r3, [r3, #0] 80082d2: 785b ldrb r3, [r3, #1] 80082d4: 2b01 cmp r3, #1 80082d6: d128 bne.n 800832a 80082d8: f507 7384 add.w r3, r7, #264 @ 0x108 80082dc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80082e0: 681b ldr r3, [r3, #0] 80082e2: f8c7 3084 str.w r3, [r7, #132] @ 0x84 80082e6: f507 7384 add.w r3, r7, #264 @ 0x108 80082ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80082ee: 681b ldr r3, [r3, #0] 80082f0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80082f4: b29b uxth r3, r3 80082f6: 461a mov r2, r3 80082f8: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 80082fc: 4413 add r3, r2 80082fe: f8c7 3084 str.w r3, [r7, #132] @ 0x84 8008302: f507 7384 add.w r3, r7, #264 @ 0x108 8008306: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800830a: 681b ldr r3, [r3, #0] 800830c: 781b ldrb r3, [r3, #0] 800830e: 011a lsls r2, r3, #4 8008310: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8008314: 4413 add r3, r2 8008316: f203 4304 addw r3, r3, #1028 @ 0x404 800831a: f8c7 3080 str.w r3, [r7, #128] @ 0x80 800831e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008322: b29a uxth r2, r3 8008324: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8008328: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800832a: f507 7384 add.w r3, r7, #264 @ 0x108 800832e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008332: 681b ldr r3, [r3, #0] 8008334: 891b ldrh r3, [r3, #8] 8008336: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800833a: f507 7384 add.w r3, r7, #264 @ 0x108 800833e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008342: 681b ldr r3, [r3, #0] 8008344: 6959 ldr r1, [r3, #20] 8008346: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800834a: b29b uxth r3, r3 800834c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8008350: f507 7084 add.w r0, r7, #264 @ 0x108 8008354: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8008358: 6800 ldr r0, [r0, #0] 800835a: f000 fe58 bl 800900e } } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); 800835e: f507 7384 add.w r3, r7, #264 @ 0x108 8008362: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008366: 681a ldr r2, [r3, #0] 8008368: f507 7384 add.w r3, r7, #264 @ 0x108 800836c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008370: 681b ldr r3, [r3, #0] 8008372: 781b ldrb r3, [r3, #0] 8008374: 009b lsls r3, r3, #2 8008376: 4413 add r3, r2 8008378: 881b ldrh r3, [r3, #0] 800837a: b29b uxth r3, r3 800837c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008380: f023 0340 bic.w r3, r3, #64 @ 0x40 8008384: 817b strh r3, [r7, #10] 8008386: 897b ldrh r3, [r7, #10] 8008388: f083 0310 eor.w r3, r3, #16 800838c: 817b strh r3, [r7, #10] 800838e: 897b ldrh r3, [r7, #10] 8008390: f083 0320 eor.w r3, r3, #32 8008394: 817b strh r3, [r7, #10] 8008396: f507 7384 add.w r3, r7, #264 @ 0x108 800839a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800839e: 681a ldr r2, [r3, #0] 80083a0: f507 7384 add.w r3, r7, #264 @ 0x108 80083a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80083a8: 681b ldr r3, [r3, #0] 80083aa: 781b ldrb r3, [r3, #0] 80083ac: 009b lsls r3, r3, #2 80083ae: 441a add r2, r3 80083b0: 897b ldrh r3, [r7, #10] 80083b2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80083b6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80083ba: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80083be: f043 0380 orr.w r3, r3, #128 @ 0x80 80083c2: b29b uxth r3, r3 80083c4: 8013 strh r3, [r2, #0] 80083c6: f000 bcde b.w 8008d86 } else /* OUT endpoint */ { if (ep->doublebuffer == 0U) 80083ca: f507 7384 add.w r3, r7, #264 @ 0x108 80083ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80083d2: 681b ldr r3, [r3, #0] 80083d4: 7b1b ldrb r3, [r3, #12] 80083d6: 2b00 cmp r3, #0 80083d8: f040 80bb bne.w 8008552 { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 80083dc: f507 7384 add.w r3, r7, #264 @ 0x108 80083e0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80083e4: 681b ldr r3, [r3, #0] 80083e6: 699a ldr r2, [r3, #24] 80083e8: f507 7384 add.w r3, r7, #264 @ 0x108 80083ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80083f0: 681b ldr r3, [r3, #0] 80083f2: 691b ldr r3, [r3, #16] 80083f4: 429a cmp r2, r3 80083f6: d917 bls.n 8008428 { len = ep->maxpacket; 80083f8: f507 7384 add.w r3, r7, #264 @ 0x108 80083fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008400: 681b ldr r3, [r3, #0] 8008402: 691b ldr r3, [r3, #16] 8008404: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 8008408: f507 7384 add.w r3, r7, #264 @ 0x108 800840c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008410: 681b ldr r3, [r3, #0] 8008412: 699a ldr r2, [r3, #24] 8008414: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008418: 1ad2 subs r2, r2, r3 800841a: f507 7384 add.w r3, r7, #264 @ 0x108 800841e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008422: 681b ldr r3, [r3, #0] 8008424: 619a str r2, [r3, #24] 8008426: e00e b.n 8008446 } else { len = ep->xfer_len; 8008428: f507 7384 add.w r3, r7, #264 @ 0x108 800842c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008430: 681b ldr r3, [r3, #0] 8008432: 699b ldr r3, [r3, #24] 8008434: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 8008438: f507 7384 add.w r3, r7, #264 @ 0x108 800843c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008440: 681b ldr r3, [r3, #0] 8008442: 2200 movs r2, #0 8008444: 619a str r2, [r3, #24] } /* configure and validate Rx endpoint */ PCD_SET_EP_RX_CNT(USBx, ep->num, len); 8008446: f507 7384 add.w r3, r7, #264 @ 0x108 800844a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800844e: 681b ldr r3, [r3, #0] 8008450: f8c7 3090 str.w r3, [r7, #144] @ 0x90 8008454: f507 7384 add.w r3, r7, #264 @ 0x108 8008458: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800845c: 681b ldr r3, [r3, #0] 800845e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008462: b29b uxth r3, r3 8008464: 461a mov r2, r3 8008466: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 800846a: 4413 add r3, r2 800846c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 8008470: f507 7384 add.w r3, r7, #264 @ 0x108 8008474: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008478: 681b ldr r3, [r3, #0] 800847a: 781b ldrb r3, [r3, #0] 800847c: 011a lsls r2, r3, #4 800847e: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 8008482: 4413 add r3, r2 8008484: f203 430c addw r3, r3, #1036 @ 0x40c 8008488: f8c7 308c str.w r3, [r7, #140] @ 0x8c 800848c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8008490: 881b ldrh r3, [r3, #0] 8008492: b29b uxth r3, r3 8008494: f3c3 0309 ubfx r3, r3, #0, #10 8008498: b29a uxth r2, r3 800849a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800849e: 801a strh r2, [r3, #0] 80084a0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80084a4: 2b3e cmp r3, #62 @ 0x3e 80084a6: d924 bls.n 80084f2 80084a8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80084ac: 095b lsrs r3, r3, #5 80084ae: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 80084b2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80084b6: f003 031f and.w r3, r3, #31 80084ba: 2b00 cmp r3, #0 80084bc: d104 bne.n 80084c8 80084be: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 80084c2: 3b01 subs r3, #1 80084c4: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 80084c8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80084cc: 881b ldrh r3, [r3, #0] 80084ce: b29a uxth r2, r3 80084d0: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 80084d4: b29b uxth r3, r3 80084d6: 029b lsls r3, r3, #10 80084d8: b29b uxth r3, r3 80084da: 4313 orrs r3, r2 80084dc: b29b uxth r3, r3 80084de: ea6f 4343 mvn.w r3, r3, lsl #17 80084e2: ea6f 4353 mvn.w r3, r3, lsr #17 80084e6: b29a uxth r2, r3 80084e8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80084ec: 801a strh r2, [r3, #0] 80084ee: f000 bc10 b.w 8008d12 80084f2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80084f6: 2b00 cmp r3, #0 80084f8: d10c bne.n 8008514 80084fa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80084fe: 881b ldrh r3, [r3, #0] 8008500: b29b uxth r3, r3 8008502: ea6f 4343 mvn.w r3, r3, lsl #17 8008506: ea6f 4353 mvn.w r3, r3, lsr #17 800850a: b29a uxth r2, r3 800850c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8008510: 801a strh r2, [r3, #0] 8008512: e3fe b.n 8008d12 8008514: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008518: 085b lsrs r3, r3, #1 800851a: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800851e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008522: f003 0301 and.w r3, r3, #1 8008526: 2b00 cmp r3, #0 8008528: d004 beq.n 8008534 800852a: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800852e: 3301 adds r3, #1 8008530: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 8008534: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8008538: 881b ldrh r3, [r3, #0] 800853a: b29a uxth r2, r3 800853c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 8008540: b29b uxth r3, r3 8008542: 029b lsls r3, r3, #10 8008544: b29b uxth r3, r3 8008546: 4313 orrs r3, r2 8008548: b29a uxth r2, r3 800854a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800854e: 801a strh r2, [r3, #0] 8008550: e3df b.n 8008d12 #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */ /* Set the Double buffer counter */ if (ep->type == EP_TYPE_BULK) 8008552: f507 7384 add.w r3, r7, #264 @ 0x108 8008556: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800855a: 681b ldr r3, [r3, #0] 800855c: 78db ldrb r3, [r3, #3] 800855e: 2b02 cmp r3, #2 8008560: f040 8218 bne.w 8008994 { PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); 8008564: f507 7384 add.w r3, r7, #264 @ 0x108 8008568: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800856c: 681b ldr r3, [r3, #0] 800856e: 785b ldrb r3, [r3, #1] 8008570: 2b00 cmp r3, #0 8008572: f040 809d bne.w 80086b0 8008576: f507 7384 add.w r3, r7, #264 @ 0x108 800857a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800857e: 681b ldr r3, [r3, #0] 8008580: f8c7 30ac str.w r3, [r7, #172] @ 0xac 8008584: f507 7384 add.w r3, r7, #264 @ 0x108 8008588: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800858c: 681b ldr r3, [r3, #0] 800858e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008592: b29b uxth r3, r3 8008594: 461a mov r2, r3 8008596: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 800859a: 4413 add r3, r2 800859c: f8c7 30ac str.w r3, [r7, #172] @ 0xac 80085a0: f507 7384 add.w r3, r7, #264 @ 0x108 80085a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80085a8: 681b ldr r3, [r3, #0] 80085aa: 781b ldrb r3, [r3, #0] 80085ac: 011a lsls r2, r3, #4 80085ae: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 80085b2: 4413 add r3, r2 80085b4: f203 4304 addw r3, r3, #1028 @ 0x404 80085b8: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 80085bc: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 80085c0: 881b ldrh r3, [r3, #0] 80085c2: b29b uxth r3, r3 80085c4: f3c3 0309 ubfx r3, r3, #0, #10 80085c8: b29a uxth r2, r3 80085ca: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 80085ce: 801a strh r2, [r3, #0] 80085d0: f507 7384 add.w r3, r7, #264 @ 0x108 80085d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80085d8: 681b ldr r3, [r3, #0] 80085da: 691b ldr r3, [r3, #16] 80085dc: 2b3e cmp r3, #62 @ 0x3e 80085de: d92b bls.n 8008638 80085e0: f507 7384 add.w r3, r7, #264 @ 0x108 80085e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80085e8: 681b ldr r3, [r3, #0] 80085ea: 691b ldr r3, [r3, #16] 80085ec: 095b lsrs r3, r3, #5 80085ee: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 80085f2: f507 7384 add.w r3, r7, #264 @ 0x108 80085f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80085fa: 681b ldr r3, [r3, #0] 80085fc: 691b ldr r3, [r3, #16] 80085fe: f003 031f and.w r3, r3, #31 8008602: 2b00 cmp r3, #0 8008604: d104 bne.n 8008610 8008606: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800860a: 3b01 subs r3, #1 800860c: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8008610: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008614: 881b ldrh r3, [r3, #0] 8008616: b29a uxth r2, r3 8008618: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800861c: b29b uxth r3, r3 800861e: 029b lsls r3, r3, #10 8008620: b29b uxth r3, r3 8008622: 4313 orrs r3, r2 8008624: b29b uxth r3, r3 8008626: ea6f 4343 mvn.w r3, r3, lsl #17 800862a: ea6f 4353 mvn.w r3, r3, lsr #17 800862e: b29a uxth r2, r3 8008630: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008634: 801a strh r2, [r3, #0] 8008636: e070 b.n 800871a 8008638: f507 7384 add.w r3, r7, #264 @ 0x108 800863c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008640: 681b ldr r3, [r3, #0] 8008642: 691b ldr r3, [r3, #16] 8008644: 2b00 cmp r3, #0 8008646: d10c bne.n 8008662 8008648: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800864c: 881b ldrh r3, [r3, #0] 800864e: b29b uxth r3, r3 8008650: ea6f 4343 mvn.w r3, r3, lsl #17 8008654: ea6f 4353 mvn.w r3, r3, lsr #17 8008658: b29a uxth r2, r3 800865a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800865e: 801a strh r2, [r3, #0] 8008660: e05b b.n 800871a 8008662: f507 7384 add.w r3, r7, #264 @ 0x108 8008666: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800866a: 681b ldr r3, [r3, #0] 800866c: 691b ldr r3, [r3, #16] 800866e: 085b lsrs r3, r3, #1 8008670: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8008674: f507 7384 add.w r3, r7, #264 @ 0x108 8008678: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800867c: 681b ldr r3, [r3, #0] 800867e: 691b ldr r3, [r3, #16] 8008680: f003 0301 and.w r3, r3, #1 8008684: 2b00 cmp r3, #0 8008686: d004 beq.n 8008692 8008688: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800868c: 3301 adds r3, #1 800868e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8008692: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008696: 881b ldrh r3, [r3, #0] 8008698: b29a uxth r2, r3 800869a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800869e: b29b uxth r3, r3 80086a0: 029b lsls r3, r3, #10 80086a2: b29b uxth r3, r3 80086a4: 4313 orrs r3, r2 80086a6: b29a uxth r2, r3 80086a8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 80086ac: 801a strh r2, [r3, #0] 80086ae: e034 b.n 800871a 80086b0: f507 7384 add.w r3, r7, #264 @ 0x108 80086b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80086b8: 681b ldr r3, [r3, #0] 80086ba: 785b ldrb r3, [r3, #1] 80086bc: 2b01 cmp r3, #1 80086be: d12c bne.n 800871a 80086c0: f507 7384 add.w r3, r7, #264 @ 0x108 80086c4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80086c8: 681b ldr r3, [r3, #0] 80086ca: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 80086ce: f507 7384 add.w r3, r7, #264 @ 0x108 80086d2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80086d6: 681b ldr r3, [r3, #0] 80086d8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80086dc: b29b uxth r3, r3 80086de: 461a mov r2, r3 80086e0: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 80086e4: 4413 add r3, r2 80086e6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 80086ea: f507 7384 add.w r3, r7, #264 @ 0x108 80086ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80086f2: 681b ldr r3, [r3, #0] 80086f4: 781b ldrb r3, [r3, #0] 80086f6: 011a lsls r2, r3, #4 80086f8: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 80086fc: 4413 add r3, r2 80086fe: f203 4304 addw r3, r3, #1028 @ 0x404 8008702: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8008706: f507 7384 add.w r3, r7, #264 @ 0x108 800870a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800870e: 681b ldr r3, [r3, #0] 8008710: 691b ldr r3, [r3, #16] 8008712: b29a uxth r2, r3 8008714: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0 8008718: 801a strh r2, [r3, #0] 800871a: f507 7384 add.w r3, r7, #264 @ 0x108 800871e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008722: 681b ldr r3, [r3, #0] 8008724: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 8008728: f507 7384 add.w r3, r7, #264 @ 0x108 800872c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008730: 681b ldr r3, [r3, #0] 8008732: 785b ldrb r3, [r3, #1] 8008734: 2b00 cmp r3, #0 8008736: f040 809d bne.w 8008874 800873a: f507 7384 add.w r3, r7, #264 @ 0x108 800873e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008742: 681b ldr r3, [r3, #0] 8008744: f8c7 309c str.w r3, [r7, #156] @ 0x9c 8008748: f507 7384 add.w r3, r7, #264 @ 0x108 800874c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008750: 681b ldr r3, [r3, #0] 8008752: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008756: b29b uxth r3, r3 8008758: 461a mov r2, r3 800875a: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 800875e: 4413 add r3, r2 8008760: f8c7 309c str.w r3, [r7, #156] @ 0x9c 8008764: f507 7384 add.w r3, r7, #264 @ 0x108 8008768: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800876c: 681b ldr r3, [r3, #0] 800876e: 781b ldrb r3, [r3, #0] 8008770: 011a lsls r2, r3, #4 8008772: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 8008776: 4413 add r3, r2 8008778: f203 430c addw r3, r3, #1036 @ 0x40c 800877c: f8c7 3098 str.w r3, [r7, #152] @ 0x98 8008780: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008784: 881b ldrh r3, [r3, #0] 8008786: b29b uxth r3, r3 8008788: f3c3 0309 ubfx r3, r3, #0, #10 800878c: b29a uxth r2, r3 800878e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008792: 801a strh r2, [r3, #0] 8008794: f507 7384 add.w r3, r7, #264 @ 0x108 8008798: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800879c: 681b ldr r3, [r3, #0] 800879e: 691b ldr r3, [r3, #16] 80087a0: 2b3e cmp r3, #62 @ 0x3e 80087a2: d92b bls.n 80087fc 80087a4: f507 7384 add.w r3, r7, #264 @ 0x108 80087a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80087ac: 681b ldr r3, [r3, #0] 80087ae: 691b ldr r3, [r3, #16] 80087b0: 095b lsrs r3, r3, #5 80087b2: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 80087b6: f507 7384 add.w r3, r7, #264 @ 0x108 80087ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80087be: 681b ldr r3, [r3, #0] 80087c0: 691b ldr r3, [r3, #16] 80087c2: f003 031f and.w r3, r3, #31 80087c6: 2b00 cmp r3, #0 80087c8: d104 bne.n 80087d4 80087ca: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80087ce: 3b01 subs r3, #1 80087d0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 80087d4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 80087d8: 881b ldrh r3, [r3, #0] 80087da: b29a uxth r2, r3 80087dc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80087e0: b29b uxth r3, r3 80087e2: 029b lsls r3, r3, #10 80087e4: b29b uxth r3, r3 80087e6: 4313 orrs r3, r2 80087e8: b29b uxth r3, r3 80087ea: ea6f 4343 mvn.w r3, r3, lsl #17 80087ee: ea6f 4353 mvn.w r3, r3, lsr #17 80087f2: b29a uxth r2, r3 80087f4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 80087f8: 801a strh r2, [r3, #0] 80087fa: e069 b.n 80088d0 80087fc: f507 7384 add.w r3, r7, #264 @ 0x108 8008800: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008804: 681b ldr r3, [r3, #0] 8008806: 691b ldr r3, [r3, #16] 8008808: 2b00 cmp r3, #0 800880a: d10c bne.n 8008826 800880c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008810: 881b ldrh r3, [r3, #0] 8008812: b29b uxth r3, r3 8008814: ea6f 4343 mvn.w r3, r3, lsl #17 8008818: ea6f 4353 mvn.w r3, r3, lsr #17 800881c: b29a uxth r2, r3 800881e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008822: 801a strh r2, [r3, #0] 8008824: e054 b.n 80088d0 8008826: f507 7384 add.w r3, r7, #264 @ 0x108 800882a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800882e: 681b ldr r3, [r3, #0] 8008830: 691b ldr r3, [r3, #16] 8008832: 085b lsrs r3, r3, #1 8008834: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 8008838: f507 7384 add.w r3, r7, #264 @ 0x108 800883c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008840: 681b ldr r3, [r3, #0] 8008842: 691b ldr r3, [r3, #16] 8008844: f003 0301 and.w r3, r3, #1 8008848: 2b00 cmp r3, #0 800884a: d004 beq.n 8008856 800884c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008850: 3301 adds r3, #1 8008852: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 8008856: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800885a: 881b ldrh r3, [r3, #0] 800885c: b29a uxth r2, r3 800885e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008862: b29b uxth r3, r3 8008864: 029b lsls r3, r3, #10 8008866: b29b uxth r3, r3 8008868: 4313 orrs r3, r2 800886a: b29a uxth r2, r3 800886c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008870: 801a strh r2, [r3, #0] 8008872: e02d b.n 80088d0 8008874: f507 7384 add.w r3, r7, #264 @ 0x108 8008878: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800887c: 681b ldr r3, [r3, #0] 800887e: 785b ldrb r3, [r3, #1] 8008880: 2b01 cmp r3, #1 8008882: d125 bne.n 80088d0 8008884: f507 7384 add.w r3, r7, #264 @ 0x108 8008888: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800888c: 681b ldr r3, [r3, #0] 800888e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008892: b29b uxth r3, r3 8008894: 461a mov r2, r3 8008896: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 800889a: 4413 add r3, r2 800889c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 80088a0: f507 7384 add.w r3, r7, #264 @ 0x108 80088a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80088a8: 681b ldr r3, [r3, #0] 80088aa: 781b ldrb r3, [r3, #0] 80088ac: 011a lsls r2, r3, #4 80088ae: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 80088b2: 4413 add r3, r2 80088b4: f203 430c addw r3, r3, #1036 @ 0x40c 80088b8: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 80088bc: f507 7384 add.w r3, r7, #264 @ 0x108 80088c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80088c4: 681b ldr r3, [r3, #0] 80088c6: 691b ldr r3, [r3, #16] 80088c8: b29a uxth r2, r3 80088ca: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 80088ce: 801a strh r2, [r3, #0] /* Coming from ISR */ if (ep->xfer_count != 0U) 80088d0: f507 7384 add.w r3, r7, #264 @ 0x108 80088d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80088d8: 681b ldr r3, [r3, #0] 80088da: 69db ldr r3, [r3, #28] 80088dc: 2b00 cmp r3, #0 80088de: f000 8218 beq.w 8008d12 { /* update last value to check if there is blocking state */ wEPVal = PCD_GET_ENDPOINT(USBx, ep->num); 80088e2: f507 7384 add.w r3, r7, #264 @ 0x108 80088e6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80088ea: 681a ldr r2, [r3, #0] 80088ec: f507 7384 add.w r3, r7, #264 @ 0x108 80088f0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80088f4: 681b ldr r3, [r3, #0] 80088f6: 781b ldrb r3, [r3, #0] 80088f8: 009b lsls r3, r3, #2 80088fa: 4413 add r3, r2 80088fc: 881b ldrh r3, [r3, #0] 80088fe: f8a7 3096 strh.w r3, [r7, #150] @ 0x96 /*Blocking State */ if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 8008902: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 8008906: f403 4380 and.w r3, r3, #16384 @ 0x4000 800890a: 2b00 cmp r3, #0 800890c: d005 beq.n 800891a 800890e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 8008912: f003 0340 and.w r3, r3, #64 @ 0x40 8008916: 2b00 cmp r3, #0 8008918: d10d bne.n 8008936 (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 800891a: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800891e: f403 4380 and.w r3, r3, #16384 @ 0x4000 if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 8008922: 2b00 cmp r3, #0 8008924: f040 81f5 bne.w 8008d12 (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 8008928: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800892c: f003 0340 and.w r3, r3, #64 @ 0x40 8008930: 2b00 cmp r3, #0 8008932: f040 81ee bne.w 8008d12 { PCD_FREE_USER_BUFFER(USBx, ep->num, 0U); 8008936: f507 7384 add.w r3, r7, #264 @ 0x108 800893a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800893e: 681a ldr r2, [r3, #0] 8008940: f507 7384 add.w r3, r7, #264 @ 0x108 8008944: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008948: 681b ldr r3, [r3, #0] 800894a: 781b ldrb r3, [r3, #0] 800894c: 009b lsls r3, r3, #2 800894e: 4413 add r3, r2 8008950: 881b ldrh r3, [r3, #0] 8008952: b29b uxth r3, r3 8008954: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008958: f023 0370 bic.w r3, r3, #112 @ 0x70 800895c: f8a7 3094 strh.w r3, [r7, #148] @ 0x94 8008960: f507 7384 add.w r3, r7, #264 @ 0x108 8008964: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008968: 681a ldr r2, [r3, #0] 800896a: f507 7384 add.w r3, r7, #264 @ 0x108 800896e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008972: 681b ldr r3, [r3, #0] 8008974: 781b ldrb r3, [r3, #0] 8008976: 009b lsls r3, r3, #2 8008978: 441a add r2, r3 800897a: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94 800897e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008982: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008986: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800898a: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800898e: b29b uxth r3, r3 8008990: 8013 strh r3, [r2, #0] 8008992: e1be b.n 8008d12 } } } /* iso out double */ else if (ep->type == EP_TYPE_ISOC) 8008994: f507 7384 add.w r3, r7, #264 @ 0x108 8008998: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800899c: 681b ldr r3, [r3, #0] 800899e: 78db ldrb r3, [r3, #3] 80089a0: 2b01 cmp r3, #1 80089a2: f040 81b4 bne.w 8008d0e { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 80089a6: f507 7384 add.w r3, r7, #264 @ 0x108 80089aa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80089ae: 681b ldr r3, [r3, #0] 80089b0: 699a ldr r2, [r3, #24] 80089b2: f507 7384 add.w r3, r7, #264 @ 0x108 80089b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80089ba: 681b ldr r3, [r3, #0] 80089bc: 691b ldr r3, [r3, #16] 80089be: 429a cmp r2, r3 80089c0: d917 bls.n 80089f2 { len = ep->maxpacket; 80089c2: f507 7384 add.w r3, r7, #264 @ 0x108 80089c6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80089ca: 681b ldr r3, [r3, #0] 80089cc: 691b ldr r3, [r3, #16] 80089ce: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 80089d2: f507 7384 add.w r3, r7, #264 @ 0x108 80089d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80089da: 681b ldr r3, [r3, #0] 80089dc: 699a ldr r2, [r3, #24] 80089de: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80089e2: 1ad2 subs r2, r2, r3 80089e4: f507 7384 add.w r3, r7, #264 @ 0x108 80089e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80089ec: 681b ldr r3, [r3, #0] 80089ee: 619a str r2, [r3, #24] 80089f0: e00e b.n 8008a10 } else { len = ep->xfer_len; 80089f2: f507 7384 add.w r3, r7, #264 @ 0x108 80089f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80089fa: 681b ldr r3, [r3, #0] 80089fc: 699b ldr r3, [r3, #24] 80089fe: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 8008a02: f507 7384 add.w r3, r7, #264 @ 0x108 8008a06: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008a0a: 681b ldr r3, [r3, #0] 8008a0c: 2200 movs r2, #0 8008a0e: 619a str r2, [r3, #24] } PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); 8008a10: f507 7384 add.w r3, r7, #264 @ 0x108 8008a14: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008a18: 681b ldr r3, [r3, #0] 8008a1a: 785b ldrb r3, [r3, #1] 8008a1c: 2b00 cmp r3, #0 8008a1e: f040 8085 bne.w 8008b2c 8008a22: f507 7384 add.w r3, r7, #264 @ 0x108 8008a26: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008a2a: 681b ldr r3, [r3, #0] 8008a2c: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 8008a30: f507 7384 add.w r3, r7, #264 @ 0x108 8008a34: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008a38: 681b ldr r3, [r3, #0] 8008a3a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008a3e: b29b uxth r3, r3 8008a40: 461a mov r2, r3 8008a42: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 8008a46: 4413 add r3, r2 8008a48: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 8008a4c: f507 7384 add.w r3, r7, #264 @ 0x108 8008a50: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008a54: 681b ldr r3, [r3, #0] 8008a56: 781b ldrb r3, [r3, #0] 8008a58: 011a lsls r2, r3, #4 8008a5a: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 8008a5e: 4413 add r3, r2 8008a60: f203 4304 addw r3, r3, #1028 @ 0x404 8008a64: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8008a68: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008a6c: 881b ldrh r3, [r3, #0] 8008a6e: b29b uxth r3, r3 8008a70: f3c3 0309 ubfx r3, r3, #0, #10 8008a74: b29a uxth r2, r3 8008a76: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008a7a: 801a strh r2, [r3, #0] 8008a7c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008a80: 2b3e cmp r3, #62 @ 0x3e 8008a82: d923 bls.n 8008acc 8008a84: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008a88: 095b lsrs r3, r3, #5 8008a8a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 8008a8e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008a92: f003 031f and.w r3, r3, #31 8008a96: 2b00 cmp r3, #0 8008a98: d104 bne.n 8008aa4 8008a9a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008a9e: 3b01 subs r3, #1 8008aa0: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 8008aa4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008aa8: 881b ldrh r3, [r3, #0] 8008aaa: b29a uxth r2, r3 8008aac: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008ab0: b29b uxth r3, r3 8008ab2: 029b lsls r3, r3, #10 8008ab4: b29b uxth r3, r3 8008ab6: 4313 orrs r3, r2 8008ab8: b29b uxth r3, r3 8008aba: ea6f 4343 mvn.w r3, r3, lsl #17 8008abe: ea6f 4353 mvn.w r3, r3, lsr #17 8008ac2: b29a uxth r2, r3 8008ac4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008ac8: 801a strh r2, [r3, #0] 8008aca: e060 b.n 8008b8e 8008acc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008ad0: 2b00 cmp r3, #0 8008ad2: d10c bne.n 8008aee 8008ad4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008ad8: 881b ldrh r3, [r3, #0] 8008ada: b29b uxth r3, r3 8008adc: ea6f 4343 mvn.w r3, r3, lsl #17 8008ae0: ea6f 4353 mvn.w r3, r3, lsr #17 8008ae4: b29a uxth r2, r3 8008ae6: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008aea: 801a strh r2, [r3, #0] 8008aec: e04f b.n 8008b8e 8008aee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008af2: 085b lsrs r3, r3, #1 8008af4: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 8008af8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008afc: f003 0301 and.w r3, r3, #1 8008b00: 2b00 cmp r3, #0 8008b02: d004 beq.n 8008b0e 8008b04: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008b08: 3301 adds r3, #1 8008b0a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 8008b0e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008b12: 881b ldrh r3, [r3, #0] 8008b14: b29a uxth r2, r3 8008b16: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008b1a: b29b uxth r3, r3 8008b1c: 029b lsls r3, r3, #10 8008b1e: b29b uxth r3, r3 8008b20: 4313 orrs r3, r2 8008b22: b29a uxth r2, r3 8008b24: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008b28: 801a strh r2, [r3, #0] 8008b2a: e030 b.n 8008b8e 8008b2c: f507 7384 add.w r3, r7, #264 @ 0x108 8008b30: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008b34: 681b ldr r3, [r3, #0] 8008b36: 785b ldrb r3, [r3, #1] 8008b38: 2b01 cmp r3, #1 8008b3a: d128 bne.n 8008b8e 8008b3c: f507 7384 add.w r3, r7, #264 @ 0x108 8008b40: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008b44: 681b ldr r3, [r3, #0] 8008b46: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 8008b4a: f507 7384 add.w r3, r7, #264 @ 0x108 8008b4e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008b52: 681b ldr r3, [r3, #0] 8008b54: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008b58: b29b uxth r3, r3 8008b5a: 461a mov r2, r3 8008b5c: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8008b60: 4413 add r3, r2 8008b62: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 8008b66: f507 7384 add.w r3, r7, #264 @ 0x108 8008b6a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008b6e: 681b ldr r3, [r3, #0] 8008b70: 781b ldrb r3, [r3, #0] 8008b72: 011a lsls r2, r3, #4 8008b74: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8008b78: 4413 add r3, r2 8008b7a: f203 4304 addw r3, r3, #1028 @ 0x404 8008b7e: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 8008b82: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008b86: b29a uxth r2, r3 8008b88: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0 8008b8c: 801a strh r2, [r3, #0] 8008b8e: f507 7384 add.w r3, r7, #264 @ 0x108 8008b92: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008b96: 681b ldr r3, [r3, #0] 8008b98: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8008b9c: f507 7384 add.w r3, r7, #264 @ 0x108 8008ba0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008ba4: 681b ldr r3, [r3, #0] 8008ba6: 785b ldrb r3, [r3, #1] 8008ba8: 2b00 cmp r3, #0 8008baa: f040 8085 bne.w 8008cb8 8008bae: f507 7384 add.w r3, r7, #264 @ 0x108 8008bb2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008bb6: 681b ldr r3, [r3, #0] 8008bb8: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 8008bbc: f507 7384 add.w r3, r7, #264 @ 0x108 8008bc0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008bc4: 681b ldr r3, [r3, #0] 8008bc6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008bca: b29b uxth r3, r3 8008bcc: 461a mov r2, r3 8008bce: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 8008bd2: 4413 add r3, r2 8008bd4: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 8008bd8: f507 7384 add.w r3, r7, #264 @ 0x108 8008bdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008be0: 681b ldr r3, [r3, #0] 8008be2: 781b ldrb r3, [r3, #0] 8008be4: 011a lsls r2, r3, #4 8008be6: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 8008bea: 4413 add r3, r2 8008bec: f203 430c addw r3, r3, #1036 @ 0x40c 8008bf0: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 8008bf4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8008bf8: 881b ldrh r3, [r3, #0] 8008bfa: b29b uxth r3, r3 8008bfc: f3c3 0309 ubfx r3, r3, #0, #10 8008c00: b29a uxth r2, r3 8008c02: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8008c06: 801a strh r2, [r3, #0] 8008c08: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008c0c: 2b3e cmp r3, #62 @ 0x3e 8008c0e: d923 bls.n 8008c58 8008c10: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008c14: 095b lsrs r3, r3, #5 8008c16: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 8008c1a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008c1e: f003 031f and.w r3, r3, #31 8008c22: 2b00 cmp r3, #0 8008c24: d104 bne.n 8008c30 8008c26: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8008c2a: 3b01 subs r3, #1 8008c2c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 8008c30: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8008c34: 881b ldrh r3, [r3, #0] 8008c36: b29a uxth r2, r3 8008c38: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8008c3c: b29b uxth r3, r3 8008c3e: 029b lsls r3, r3, #10 8008c40: b29b uxth r3, r3 8008c42: 4313 orrs r3, r2 8008c44: b29b uxth r3, r3 8008c46: ea6f 4343 mvn.w r3, r3, lsl #17 8008c4a: ea6f 4353 mvn.w r3, r3, lsr #17 8008c4e: b29a uxth r2, r3 8008c50: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8008c54: 801a strh r2, [r3, #0] 8008c56: e05c b.n 8008d12 8008c58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008c5c: 2b00 cmp r3, #0 8008c5e: d10c bne.n 8008c7a 8008c60: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8008c64: 881b ldrh r3, [r3, #0] 8008c66: b29b uxth r3, r3 8008c68: ea6f 4343 mvn.w r3, r3, lsl #17 8008c6c: ea6f 4353 mvn.w r3, r3, lsr #17 8008c70: b29a uxth r2, r3 8008c72: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8008c76: 801a strh r2, [r3, #0] 8008c78: e04b b.n 8008d12 8008c7a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008c7e: 085b lsrs r3, r3, #1 8008c80: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 8008c84: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008c88: f003 0301 and.w r3, r3, #1 8008c8c: 2b00 cmp r3, #0 8008c8e: d004 beq.n 8008c9a 8008c90: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8008c94: 3301 adds r3, #1 8008c96: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 8008c9a: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8008c9e: 881b ldrh r3, [r3, #0] 8008ca0: b29a uxth r2, r3 8008ca2: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8008ca6: b29b uxth r3, r3 8008ca8: 029b lsls r3, r3, #10 8008caa: b29b uxth r3, r3 8008cac: 4313 orrs r3, r2 8008cae: b29a uxth r2, r3 8008cb0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8008cb4: 801a strh r2, [r3, #0] 8008cb6: e02c b.n 8008d12 8008cb8: f507 7384 add.w r3, r7, #264 @ 0x108 8008cbc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008cc0: 681b ldr r3, [r3, #0] 8008cc2: 785b ldrb r3, [r3, #1] 8008cc4: 2b01 cmp r3, #1 8008cc6: d124 bne.n 8008d12 8008cc8: f507 7384 add.w r3, r7, #264 @ 0x108 8008ccc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008cd0: 681b ldr r3, [r3, #0] 8008cd2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008cd6: b29b uxth r3, r3 8008cd8: 461a mov r2, r3 8008cda: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 8008cde: 4413 add r3, r2 8008ce0: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8008ce4: f507 7384 add.w r3, r7, #264 @ 0x108 8008ce8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008cec: 681b ldr r3, [r3, #0] 8008cee: 781b ldrb r3, [r3, #0] 8008cf0: 011a lsls r2, r3, #4 8008cf2: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 8008cf6: 4413 add r3, r2 8008cf8: f203 430c addw r3, r3, #1036 @ 0x40c 8008cfc: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 8008d00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008d04: b29a uxth r2, r3 8008d06: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0 8008d0a: 801a strh r2, [r3, #0] 8008d0c: e001 b.n 8008d12 } else { return HAL_ERROR; 8008d0e: 2301 movs r3, #1 8008d10: e03a b.n 8008d88 } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 8008d12: f507 7384 add.w r3, r7, #264 @ 0x108 8008d16: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008d1a: 681a ldr r2, [r3, #0] 8008d1c: f507 7384 add.w r3, r7, #264 @ 0x108 8008d20: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008d24: 681b ldr r3, [r3, #0] 8008d26: 781b ldrb r3, [r3, #0] 8008d28: 009b lsls r3, r3, #2 8008d2a: 4413 add r3, r2 8008d2c: 881b ldrh r3, [r3, #0] 8008d2e: b29b uxth r3, r3 8008d30: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8008d34: f023 0370 bic.w r3, r3, #112 @ 0x70 8008d38: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8008d3c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8008d40: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8008d44: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8008d48: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8008d4c: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8008d50: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8008d54: f507 7384 add.w r3, r7, #264 @ 0x108 8008d58: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008d5c: 681a ldr r2, [r3, #0] 8008d5e: f507 7384 add.w r3, r7, #264 @ 0x108 8008d62: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008d66: 681b ldr r3, [r3, #0] 8008d68: 781b ldrb r3, [r3, #0] 8008d6a: 009b lsls r3, r3, #2 8008d6c: 441a add r2, r3 8008d6e: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8008d72: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008d76: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008d7a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008d7e: f043 0380 orr.w r3, r3, #128 @ 0x80 8008d82: b29b uxth r3, r3 8008d84: 8013 strh r3, [r2, #0] } return HAL_OK; 8008d86: 2300 movs r3, #0 } 8008d88: 4618 mov r0, r3 8008d8a: f507 7784 add.w r7, r7, #264 @ 0x108 8008d8e: 46bd mov sp, r7 8008d90: bd80 pop {r7, pc} 08008d92 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8008d92: b480 push {r7} 8008d94: b085 sub sp, #20 8008d96: af00 add r7, sp, #0 8008d98: 6078 str r0, [r7, #4] 8008d9a: 6039 str r1, [r7, #0] if (ep->is_in != 0U) 8008d9c: 683b ldr r3, [r7, #0] 8008d9e: 785b ldrb r3, [r3, #1] 8008da0: 2b00 cmp r3, #0 8008da2: d020 beq.n 8008de6 { PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); 8008da4: 687a ldr r2, [r7, #4] 8008da6: 683b ldr r3, [r7, #0] 8008da8: 781b ldrb r3, [r3, #0] 8008daa: 009b lsls r3, r3, #2 8008dac: 4413 add r3, r2 8008dae: 881b ldrh r3, [r3, #0] 8008db0: b29b uxth r3, r3 8008db2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008db6: f023 0340 bic.w r3, r3, #64 @ 0x40 8008dba: 81bb strh r3, [r7, #12] 8008dbc: 89bb ldrh r3, [r7, #12] 8008dbe: f083 0310 eor.w r3, r3, #16 8008dc2: 81bb strh r3, [r7, #12] 8008dc4: 687a ldr r2, [r7, #4] 8008dc6: 683b ldr r3, [r7, #0] 8008dc8: 781b ldrb r3, [r3, #0] 8008dca: 009b lsls r3, r3, #2 8008dcc: 441a add r2, r3 8008dce: 89bb ldrh r3, [r7, #12] 8008dd0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008dd4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008dd8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008ddc: f043 0380 orr.w r3, r3, #128 @ 0x80 8008de0: b29b uxth r3, r3 8008de2: 8013 strh r3, [r2, #0] 8008de4: e01f b.n 8008e26 } else { PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); 8008de6: 687a ldr r2, [r7, #4] 8008de8: 683b ldr r3, [r7, #0] 8008dea: 781b ldrb r3, [r3, #0] 8008dec: 009b lsls r3, r3, #2 8008dee: 4413 add r3, r2 8008df0: 881b ldrh r3, [r3, #0] 8008df2: b29b uxth r3, r3 8008df4: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8008df8: f023 0370 bic.w r3, r3, #112 @ 0x70 8008dfc: 81fb strh r3, [r7, #14] 8008dfe: 89fb ldrh r3, [r7, #14] 8008e00: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8008e04: 81fb strh r3, [r7, #14] 8008e06: 687a ldr r2, [r7, #4] 8008e08: 683b ldr r3, [r7, #0] 8008e0a: 781b ldrb r3, [r3, #0] 8008e0c: 009b lsls r3, r3, #2 8008e0e: 441a add r2, r3 8008e10: 89fb ldrh r3, [r7, #14] 8008e12: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008e16: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008e1a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008e1e: f043 0380 orr.w r3, r3, #128 @ 0x80 8008e22: b29b uxth r3, r3 8008e24: 8013 strh r3, [r2, #0] } return HAL_OK; 8008e26: 2300 movs r3, #0 } 8008e28: 4618 mov r0, r3 8008e2a: 3714 adds r7, #20 8008e2c: 46bd mov sp, r7 8008e2e: bc80 pop {r7} 8008e30: 4770 bx lr 08008e32 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8008e32: b480 push {r7} 8008e34: b087 sub sp, #28 8008e36: af00 add r7, sp, #0 8008e38: 6078 str r0, [r7, #4] 8008e3a: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 8008e3c: 683b ldr r3, [r7, #0] 8008e3e: 7b1b ldrb r3, [r3, #12] 8008e40: 2b00 cmp r3, #0 8008e42: f040 809d bne.w 8008f80 { if (ep->is_in != 0U) 8008e46: 683b ldr r3, [r7, #0] 8008e48: 785b ldrb r3, [r3, #1] 8008e4a: 2b00 cmp r3, #0 8008e4c: d04c beq.n 8008ee8 { PCD_CLEAR_TX_DTOG(USBx, ep->num); 8008e4e: 687a ldr r2, [r7, #4] 8008e50: 683b ldr r3, [r7, #0] 8008e52: 781b ldrb r3, [r3, #0] 8008e54: 009b lsls r3, r3, #2 8008e56: 4413 add r3, r2 8008e58: 881b ldrh r3, [r3, #0] 8008e5a: 823b strh r3, [r7, #16] 8008e5c: 8a3b ldrh r3, [r7, #16] 8008e5e: f003 0340 and.w r3, r3, #64 @ 0x40 8008e62: 2b00 cmp r3, #0 8008e64: d01b beq.n 8008e9e 8008e66: 687a ldr r2, [r7, #4] 8008e68: 683b ldr r3, [r7, #0] 8008e6a: 781b ldrb r3, [r3, #0] 8008e6c: 009b lsls r3, r3, #2 8008e6e: 4413 add r3, r2 8008e70: 881b ldrh r3, [r3, #0] 8008e72: b29b uxth r3, r3 8008e74: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008e78: f023 0370 bic.w r3, r3, #112 @ 0x70 8008e7c: 81fb strh r3, [r7, #14] 8008e7e: 687a ldr r2, [r7, #4] 8008e80: 683b ldr r3, [r7, #0] 8008e82: 781b ldrb r3, [r3, #0] 8008e84: 009b lsls r3, r3, #2 8008e86: 441a add r2, r3 8008e88: 89fb ldrh r3, [r7, #14] 8008e8a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008e8e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008e92: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008e96: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8008e9a: b29b uxth r3, r3 8008e9c: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 8008e9e: 683b ldr r3, [r7, #0] 8008ea0: 78db ldrb r3, [r3, #3] 8008ea2: 2b01 cmp r3, #1 8008ea4: d06c beq.n 8008f80 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 8008ea6: 687a ldr r2, [r7, #4] 8008ea8: 683b ldr r3, [r7, #0] 8008eaa: 781b ldrb r3, [r3, #0] 8008eac: 009b lsls r3, r3, #2 8008eae: 4413 add r3, r2 8008eb0: 881b ldrh r3, [r3, #0] 8008eb2: b29b uxth r3, r3 8008eb4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008eb8: f023 0340 bic.w r3, r3, #64 @ 0x40 8008ebc: 81bb strh r3, [r7, #12] 8008ebe: 89bb ldrh r3, [r7, #12] 8008ec0: f083 0320 eor.w r3, r3, #32 8008ec4: 81bb strh r3, [r7, #12] 8008ec6: 687a ldr r2, [r7, #4] 8008ec8: 683b ldr r3, [r7, #0] 8008eca: 781b ldrb r3, [r3, #0] 8008ecc: 009b lsls r3, r3, #2 8008ece: 441a add r2, r3 8008ed0: 89bb ldrh r3, [r7, #12] 8008ed2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008ed6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008eda: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008ede: f043 0380 orr.w r3, r3, #128 @ 0x80 8008ee2: b29b uxth r3, r3 8008ee4: 8013 strh r3, [r2, #0] 8008ee6: e04b b.n 8008f80 } } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 8008ee8: 687a ldr r2, [r7, #4] 8008eea: 683b ldr r3, [r7, #0] 8008eec: 781b ldrb r3, [r3, #0] 8008eee: 009b lsls r3, r3, #2 8008ef0: 4413 add r3, r2 8008ef2: 881b ldrh r3, [r3, #0] 8008ef4: 82fb strh r3, [r7, #22] 8008ef6: 8afb ldrh r3, [r7, #22] 8008ef8: f403 4380 and.w r3, r3, #16384 @ 0x4000 8008efc: 2b00 cmp r3, #0 8008efe: d01b beq.n 8008f38 8008f00: 687a ldr r2, [r7, #4] 8008f02: 683b ldr r3, [r7, #0] 8008f04: 781b ldrb r3, [r3, #0] 8008f06: 009b lsls r3, r3, #2 8008f08: 4413 add r3, r2 8008f0a: 881b ldrh r3, [r3, #0] 8008f0c: b29b uxth r3, r3 8008f0e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008f12: f023 0370 bic.w r3, r3, #112 @ 0x70 8008f16: 82bb strh r3, [r7, #20] 8008f18: 687a ldr r2, [r7, #4] 8008f1a: 683b ldr r3, [r7, #0] 8008f1c: 781b ldrb r3, [r3, #0] 8008f1e: 009b lsls r3, r3, #2 8008f20: 441a add r2, r3 8008f22: 8abb ldrh r3, [r7, #20] 8008f24: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008f28: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008f2c: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8008f30: f043 0380 orr.w r3, r3, #128 @ 0x80 8008f34: b29b uxth r3, r3 8008f36: 8013 strh r3, [r2, #0] /* Configure VALID status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 8008f38: 687a ldr r2, [r7, #4] 8008f3a: 683b ldr r3, [r7, #0] 8008f3c: 781b ldrb r3, [r3, #0] 8008f3e: 009b lsls r3, r3, #2 8008f40: 4413 add r3, r2 8008f42: 881b ldrh r3, [r3, #0] 8008f44: b29b uxth r3, r3 8008f46: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8008f4a: f023 0370 bic.w r3, r3, #112 @ 0x70 8008f4e: 827b strh r3, [r7, #18] 8008f50: 8a7b ldrh r3, [r7, #18] 8008f52: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8008f56: 827b strh r3, [r7, #18] 8008f58: 8a7b ldrh r3, [r7, #18] 8008f5a: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8008f5e: 827b strh r3, [r7, #18] 8008f60: 687a ldr r2, [r7, #4] 8008f62: 683b ldr r3, [r7, #0] 8008f64: 781b ldrb r3, [r3, #0] 8008f66: 009b lsls r3, r3, #2 8008f68: 441a add r2, r3 8008f6a: 8a7b ldrh r3, [r7, #18] 8008f6c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008f70: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008f74: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008f78: f043 0380 orr.w r3, r3, #128 @ 0x80 8008f7c: b29b uxth r3, r3 8008f7e: 8013 strh r3, [r2, #0] } } return HAL_OK; 8008f80: 2300 movs r3, #0 } 8008f82: 4618 mov r0, r3 8008f84: 371c adds r7, #28 8008f86: 46bd mov sp, r7 8008f88: bc80 pop {r7} 8008f8a: 4770 bx lr 08008f8c : * @param address new device address to be assigned * This parameter can be a value from 0 to 255 * @retval HAL status */ HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) { 8008f8c: b480 push {r7} 8008f8e: b083 sub sp, #12 8008f90: af00 add r7, sp, #0 8008f92: 6078 str r0, [r7, #4] 8008f94: 460b mov r3, r1 8008f96: 70fb strb r3, [r7, #3] if (address == 0U) 8008f98: 78fb ldrb r3, [r7, #3] 8008f9a: 2b00 cmp r3, #0 8008f9c: d103 bne.n 8008fa6 { /* set device address and enable function */ USBx->DADDR = (uint16_t)USB_DADDR_EF; 8008f9e: 687b ldr r3, [r7, #4] 8008fa0: 2280 movs r2, #128 @ 0x80 8008fa2: f8a3 204c strh.w r2, [r3, #76] @ 0x4c } return HAL_OK; 8008fa6: 2300 movs r3, #0 } 8008fa8: 4618 mov r0, r3 8008faa: 370c adds r7, #12 8008fac: 46bd mov sp, r7 8008fae: bc80 pop {r7} 8008fb0: 4770 bx lr 08008fb2 : * @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx) { 8008fb2: b480 push {r7} 8008fb4: b083 sub sp, #12 8008fb6: af00 add r7, sp, #0 8008fb8: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8008fba: 2300 movs r3, #0 } 8008fbc: 4618 mov r0, r3 8008fbe: 370c adds r7, #12 8008fc0: 46bd mov sp, r7 8008fc2: bc80 pop {r7} 8008fc4: 4770 bx lr 08008fc6 : * @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) { 8008fc6: b480 push {r7} 8008fc8: b083 sub sp, #12 8008fca: af00 add r7, sp, #0 8008fcc: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8008fce: 2300 movs r3, #0 } 8008fd0: 4618 mov r0, r3 8008fd2: 370c adds r7, #12 8008fd4: 46bd mov sp, r7 8008fd6: bc80 pop {r7} 8008fd8: 4770 bx lr 08008fda : * @brief USB_ReadInterrupts return the global USB interrupt status * @param USBx Selected device * @retval USB Global Interrupt status */ uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx) { 8008fda: b480 push {r7} 8008fdc: b085 sub sp, #20 8008fde: af00 add r7, sp, #0 8008fe0: 6078 str r0, [r7, #4] uint32_t tmpreg; tmpreg = USBx->ISTR; 8008fe2: 687b ldr r3, [r7, #4] 8008fe4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8008fe8: b29b uxth r3, r3 8008fea: 60fb str r3, [r7, #12] return tmpreg; 8008fec: 68fb ldr r3, [r7, #12] } 8008fee: 4618 mov r0, r3 8008ff0: 3714 adds r7, #20 8008ff2: 46bd mov sp, r7 8008ff4: bc80 pop {r7} 8008ff6: 4770 bx lr 08008ff8 : * @param USBx Selected device * @param psetup pointer to setup packet * @retval HAL status */ HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup) { 8008ff8: b480 push {r7} 8008ffa: b083 sub sp, #12 8008ffc: af00 add r7, sp, #0 8008ffe: 6078 str r0, [r7, #4] 8009000: 6039 str r1, [r7, #0] UNUSED(psetup); /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8009002: 2300 movs r3, #0 } 8009004: 4618 mov r0, r3 8009006: 370c adds r7, #12 8009008: 46bd mov sp, r7 800900a: bc80 pop {r7} 800900c: 4770 bx lr 0800900e : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800900e: b480 push {r7} 8009010: b08b sub sp, #44 @ 0x2c 8009012: af00 add r7, sp, #0 8009014: 60f8 str r0, [r7, #12] 8009016: 60b9 str r1, [r7, #8] 8009018: 4611 mov r1, r2 800901a: 461a mov r2, r3 800901c: 460b mov r3, r1 800901e: 80fb strh r3, [r7, #6] 8009020: 4613 mov r3, r2 8009022: 80bb strh r3, [r7, #4] uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; 8009024: 88bb ldrh r3, [r7, #4] 8009026: 3301 adds r3, #1 8009028: 085b lsrs r3, r3, #1 800902a: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 800902c: 68fb ldr r3, [r7, #12] 800902e: 617b str r3, [r7, #20] uint32_t count; uint16_t WrVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 8009030: 68bb ldr r3, [r7, #8] 8009032: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 8009034: 88fb ldrh r3, [r7, #6] 8009036: 005a lsls r2, r3, #1 8009038: 697b ldr r3, [r7, #20] 800903a: 4413 add r3, r2 800903c: f503 6380 add.w r3, r3, #1024 @ 0x400 8009040: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 8009042: 69bb ldr r3, [r7, #24] 8009044: 627b str r3, [r7, #36] @ 0x24 8009046: e01f b.n 8009088 { WrVal = pBuf[0]; 8009048: 69fb ldr r3, [r7, #28] 800904a: 781b ldrb r3, [r3, #0] 800904c: 827b strh r3, [r7, #18] WrVal |= (uint16_t)pBuf[1] << 8; 800904e: 69fb ldr r3, [r7, #28] 8009050: 3301 adds r3, #1 8009052: 781b ldrb r3, [r3, #0] 8009054: b21b sxth r3, r3 8009056: 021b lsls r3, r3, #8 8009058: b21a sxth r2, r3 800905a: f9b7 3012 ldrsh.w r3, [r7, #18] 800905e: 4313 orrs r3, r2 8009060: b21b sxth r3, r3 8009062: 827b strh r3, [r7, #18] *pdwVal = (WrVal & 0xFFFFU); 8009064: 6a3b ldr r3, [r7, #32] 8009066: 8a7a ldrh r2, [r7, #18] 8009068: 801a strh r2, [r3, #0] pdwVal++; 800906a: 6a3b ldr r3, [r7, #32] 800906c: 3302 adds r3, #2 800906e: 623b str r3, [r7, #32] #if PMA_ACCESS > 1U pdwVal++; 8009070: 6a3b ldr r3, [r7, #32] 8009072: 3302 adds r3, #2 8009074: 623b str r3, [r7, #32] #endif /* PMA_ACCESS */ pBuf++; 8009076: 69fb ldr r3, [r7, #28] 8009078: 3301 adds r3, #1 800907a: 61fb str r3, [r7, #28] pBuf++; 800907c: 69fb ldr r3, [r7, #28] 800907e: 3301 adds r3, #1 8009080: 61fb str r3, [r7, #28] for (count = n; count != 0U; count--) 8009082: 6a7b ldr r3, [r7, #36] @ 0x24 8009084: 3b01 subs r3, #1 8009086: 627b str r3, [r7, #36] @ 0x24 8009088: 6a7b ldr r3, [r7, #36] @ 0x24 800908a: 2b00 cmp r3, #0 800908c: d1dc bne.n 8009048 } } 800908e: bf00 nop 8009090: bf00 nop 8009092: 372c adds r7, #44 @ 0x2c 8009094: 46bd mov sp, r7 8009096: bc80 pop {r7} 8009098: 4770 bx lr 0800909a : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800909a: b480 push {r7} 800909c: b08b sub sp, #44 @ 0x2c 800909e: af00 add r7, sp, #0 80090a0: 60f8 str r0, [r7, #12] 80090a2: 60b9 str r1, [r7, #8] 80090a4: 4611 mov r1, r2 80090a6: 461a mov r2, r3 80090a8: 460b mov r3, r1 80090aa: 80fb strh r3, [r7, #6] 80090ac: 4613 mov r3, r2 80090ae: 80bb strh r3, [r7, #4] uint32_t n = (uint32_t)wNBytes >> 1; 80090b0: 88bb ldrh r3, [r7, #4] 80090b2: 085b lsrs r3, r3, #1 80090b4: b29b uxth r3, r3 80090b6: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 80090b8: 68fb ldr r3, [r7, #12] 80090ba: 617b str r3, [r7, #20] uint32_t count; uint32_t RdVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 80090bc: 68bb ldr r3, [r7, #8] 80090be: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 80090c0: 88fb ldrh r3, [r7, #6] 80090c2: 005a lsls r2, r3, #1 80090c4: 697b ldr r3, [r7, #20] 80090c6: 4413 add r3, r2 80090c8: f503 6380 add.w r3, r3, #1024 @ 0x400 80090cc: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 80090ce: 69bb ldr r3, [r7, #24] 80090d0: 627b str r3, [r7, #36] @ 0x24 80090d2: e01b b.n 800910c { RdVal = *(__IO uint16_t *)pdwVal; 80090d4: 6a3b ldr r3, [r7, #32] 80090d6: 881b ldrh r3, [r3, #0] 80090d8: b29b uxth r3, r3 80090da: 613b str r3, [r7, #16] pdwVal++; 80090dc: 6a3b ldr r3, [r7, #32] 80090de: 3302 adds r3, #2 80090e0: 623b str r3, [r7, #32] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 80090e2: 693b ldr r3, [r7, #16] 80090e4: b2da uxtb r2, r3 80090e6: 69fb ldr r3, [r7, #28] 80090e8: 701a strb r2, [r3, #0] pBuf++; 80090ea: 69fb ldr r3, [r7, #28] 80090ec: 3301 adds r3, #1 80090ee: 61fb str r3, [r7, #28] *pBuf = (uint8_t)((RdVal >> 8) & 0xFFU); 80090f0: 693b ldr r3, [r7, #16] 80090f2: 0a1b lsrs r3, r3, #8 80090f4: b2da uxtb r2, r3 80090f6: 69fb ldr r3, [r7, #28] 80090f8: 701a strb r2, [r3, #0] pBuf++; 80090fa: 69fb ldr r3, [r7, #28] 80090fc: 3301 adds r3, #1 80090fe: 61fb str r3, [r7, #28] #if PMA_ACCESS > 1U pdwVal++; 8009100: 6a3b ldr r3, [r7, #32] 8009102: 3302 adds r3, #2 8009104: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 8009106: 6a7b ldr r3, [r7, #36] @ 0x24 8009108: 3b01 subs r3, #1 800910a: 627b str r3, [r7, #36] @ 0x24 800910c: 6a7b ldr r3, [r7, #36] @ 0x24 800910e: 2b00 cmp r3, #0 8009110: d1e0 bne.n 80090d4 #endif /* PMA_ACCESS */ } if ((wNBytes % 2U) != 0U) 8009112: 88bb ldrh r3, [r7, #4] 8009114: f003 0301 and.w r3, r3, #1 8009118: b29b uxth r3, r3 800911a: 2b00 cmp r3, #0 800911c: d007 beq.n 800912e { RdVal = *pdwVal; 800911e: 6a3b ldr r3, [r7, #32] 8009120: 881b ldrh r3, [r3, #0] 8009122: b29b uxth r3, r3 8009124: 613b str r3, [r7, #16] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 8009126: 693b ldr r3, [r7, #16] 8009128: b2da uxtb r2, r3 800912a: 69fb ldr r3, [r7, #28] 800912c: 701a strb r2, [r3, #0] } } 800912e: bf00 nop 8009130: 372c adds r7, #44 @ 0x2c 8009132: 46bd mov sp, r7 8009134: bc80 pop {r7} 8009136: 4770 bx lr 08009138 : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8009138: b580 push {r7, lr} 800913a: b084 sub sp, #16 800913c: af00 add r7, sp, #0 800913e: 6078 str r0, [r7, #4] 8009140: 460b mov r3, r1 8009142: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 8009144: 2300 movs r3, #0 8009146: 73fb strb r3, [r7, #15] USBD_CDC_HandleTypeDef *hcdc; if (pdev->dev_speed == USBD_SPEED_HIGH) 8009148: 687b ldr r3, [r7, #4] 800914a: 7c1b ldrb r3, [r3, #16] 800914c: 2b00 cmp r3, #0 800914e: d115 bne.n 800917c { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 8009150: f44f 7300 mov.w r3, #512 @ 0x200 8009154: 2202 movs r2, #2 8009156: 2181 movs r1, #129 @ 0x81 8009158: 6878 ldr r0, [r7, #4] 800915a: f001 ff00 bl 800af5e CDC_DATA_HS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 800915e: 687b ldr r3, [r7, #4] 8009160: 2201 movs r2, #1 8009162: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 8009164: f44f 7300 mov.w r3, #512 @ 0x200 8009168: 2202 movs r2, #2 800916a: 2101 movs r1, #1 800916c: 6878 ldr r0, [r7, #4] 800916e: f001 fef6 bl 800af5e CDC_DATA_HS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 8009172: 687b ldr r3, [r7, #4] 8009174: 2201 movs r2, #1 8009176: f8c3 216c str.w r2, [r3, #364] @ 0x16c 800917a: e012 b.n 80091a2 } else { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 800917c: 2340 movs r3, #64 @ 0x40 800917e: 2202 movs r2, #2 8009180: 2181 movs r1, #129 @ 0x81 8009182: 6878 ldr r0, [r7, #4] 8009184: f001 feeb bl 800af5e CDC_DATA_FS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 8009188: 687b ldr r3, [r7, #4] 800918a: 2201 movs r2, #1 800918c: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 800918e: 2340 movs r3, #64 @ 0x40 8009190: 2202 movs r2, #2 8009192: 2101 movs r1, #1 8009194: 6878 ldr r0, [r7, #4] 8009196: f001 fee2 bl 800af5e CDC_DATA_FS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 800919a: 687b ldr r3, [r7, #4] 800919c: 2201 movs r2, #1 800919e: f8c3 216c str.w r2, [r3, #364] @ 0x16c } /* Open Command IN EP */ USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE); 80091a2: 2308 movs r3, #8 80091a4: 2203 movs r2, #3 80091a6: 2182 movs r1, #130 @ 0x82 80091a8: 6878 ldr r0, [r7, #4] 80091aa: f001 fed8 bl 800af5e pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U; 80091ae: 687b ldr r3, [r7, #4] 80091b0: 2201 movs r2, #1 80091b2: 641a str r2, [r3, #64] @ 0x40 pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef)); 80091b4: f44f 7007 mov.w r0, #540 @ 0x21c 80091b8: f001 fff8 bl 800b1ac 80091bc: 4602 mov r2, r0 80091be: 687b ldr r3, [r7, #4] 80091c0: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 if (pdev->pClassData == NULL) 80091c4: 687b ldr r3, [r7, #4] 80091c6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80091ca: 2b00 cmp r3, #0 80091cc: d102 bne.n 80091d4 { ret = 1U; 80091ce: 2301 movs r3, #1 80091d0: 73fb strb r3, [r7, #15] 80091d2: e026 b.n 8009222 } else { hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 80091d4: 687b ldr r3, [r7, #4] 80091d6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80091da: 60bb str r3, [r7, #8] /* Init physical Interface components */ ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init(); 80091dc: 687b ldr r3, [r7, #4] 80091de: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 80091e2: 681b ldr r3, [r3, #0] 80091e4: 4798 blx r3 /* Init Xfer states */ hcdc->TxState = 0U; 80091e6: 68bb ldr r3, [r7, #8] 80091e8: 2200 movs r2, #0 80091ea: f8c3 2214 str.w r2, [r3, #532] @ 0x214 hcdc->RxState = 0U; 80091ee: 68bb ldr r3, [r7, #8] 80091f0: 2200 movs r2, #0 80091f2: f8c3 2218 str.w r2, [r3, #536] @ 0x218 if (pdev->dev_speed == USBD_SPEED_HIGH) 80091f6: 687b ldr r3, [r7, #4] 80091f8: 7c1b ldrb r3, [r3, #16] 80091fa: 2b00 cmp r3, #0 80091fc: d109 bne.n 8009212 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 80091fe: 68bb ldr r3, [r7, #8] 8009200: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 8009204: f44f 7300 mov.w r3, #512 @ 0x200 8009208: 2101 movs r1, #1 800920a: 6878 ldr r0, [r7, #4] 800920c: f001 ff97 bl 800b13e 8009210: e007 b.n 8009222 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 8009212: 68bb ldr r3, [r7, #8] 8009214: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 8009218: 2340 movs r3, #64 @ 0x40 800921a: 2101 movs r1, #1 800921c: 6878 ldr r0, [r7, #4] 800921e: f001 ff8e bl 800b13e CDC_DATA_FS_OUT_PACKET_SIZE); } } return ret; 8009222: 7bfb ldrb r3, [r7, #15] } 8009224: 4618 mov r0, r3 8009226: 3710 adds r7, #16 8009228: 46bd mov sp, r7 800922a: bd80 pop {r7, pc} 0800922c : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800922c: b580 push {r7, lr} 800922e: b084 sub sp, #16 8009230: af00 add r7, sp, #0 8009232: 6078 str r0, [r7, #4] 8009234: 460b mov r3, r1 8009236: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 8009238: 2300 movs r3, #0 800923a: 73fb strb r3, [r7, #15] /* Close EP IN */ USBD_LL_CloseEP(pdev, CDC_IN_EP); 800923c: 2181 movs r1, #129 @ 0x81 800923e: 6878 ldr r0, [r7, #4] 8009240: f001 feb3 bl 800afaa pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U; 8009244: 687b ldr r3, [r7, #4] 8009246: 2200 movs r2, #0 8009248: 62da str r2, [r3, #44] @ 0x2c /* Close EP OUT */ USBD_LL_CloseEP(pdev, CDC_OUT_EP); 800924a: 2101 movs r1, #1 800924c: 6878 ldr r0, [r7, #4] 800924e: f001 feac bl 800afaa pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U; 8009252: 687b ldr r3, [r7, #4] 8009254: 2200 movs r2, #0 8009256: f8c3 216c str.w r2, [r3, #364] @ 0x16c /* Close Command IN EP */ USBD_LL_CloseEP(pdev, CDC_CMD_EP); 800925a: 2182 movs r1, #130 @ 0x82 800925c: 6878 ldr r0, [r7, #4] 800925e: f001 fea4 bl 800afaa pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U; 8009262: 687b ldr r3, [r7, #4] 8009264: 2200 movs r2, #0 8009266: 641a str r2, [r3, #64] @ 0x40 /* DeInit physical Interface components */ if (pdev->pClassData != NULL) 8009268: 687b ldr r3, [r7, #4] 800926a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800926e: 2b00 cmp r3, #0 8009270: d00e beq.n 8009290 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit(); 8009272: 687b ldr r3, [r7, #4] 8009274: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 8009278: 685b ldr r3, [r3, #4] 800927a: 4798 blx r3 USBD_free(pdev->pClassData); 800927c: 687b ldr r3, [r7, #4] 800927e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009282: 4618 mov r0, r3 8009284: f001 ff9e bl 800b1c4 pdev->pClassData = NULL; 8009288: 687b ldr r3, [r7, #4] 800928a: 2200 movs r2, #0 800928c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 } return ret; 8009290: 7bfb ldrb r3, [r7, #15] } 8009292: 4618 mov r0, r3 8009294: 3710 adds r7, #16 8009296: 46bd mov sp, r7 8009298: bd80 pop {r7, pc} 0800929a : * @param req: usb requests * @retval status */ static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800929a: b580 push {r7, lr} 800929c: b086 sub sp, #24 800929e: af00 add r7, sp, #0 80092a0: 6078 str r0, [r7, #4] 80092a2: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 80092a4: 687b ldr r3, [r7, #4] 80092a6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80092aa: 613b str r3, [r7, #16] uint8_t ifalt = 0U; 80092ac: 2300 movs r3, #0 80092ae: 73fb strb r3, [r7, #15] uint16_t status_info = 0U; 80092b0: 2300 movs r3, #0 80092b2: 81bb strh r3, [r7, #12] uint8_t ret = USBD_OK; 80092b4: 2300 movs r3, #0 80092b6: 75fb strb r3, [r7, #23] switch (req->bmRequest & USB_REQ_TYPE_MASK) 80092b8: 683b ldr r3, [r7, #0] 80092ba: 781b ldrb r3, [r3, #0] 80092bc: f003 0360 and.w r3, r3, #96 @ 0x60 80092c0: 2b00 cmp r3, #0 80092c2: d039 beq.n 8009338 80092c4: 2b20 cmp r3, #32 80092c6: d17f bne.n 80093c8 { case USB_REQ_TYPE_CLASS : if (req->wLength) 80092c8: 683b ldr r3, [r7, #0] 80092ca: 88db ldrh r3, [r3, #6] 80092cc: 2b00 cmp r3, #0 80092ce: d029 beq.n 8009324 { if (req->bmRequest & 0x80U) 80092d0: 683b ldr r3, [r7, #0] 80092d2: 781b ldrb r3, [r3, #0] 80092d4: b25b sxtb r3, r3 80092d6: 2b00 cmp r3, #0 80092d8: da11 bge.n 80092fe { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 80092da: 687b ldr r3, [r7, #4] 80092dc: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 80092e0: 689b ldr r3, [r3, #8] 80092e2: 683a ldr r2, [r7, #0] 80092e4: 7850 ldrb r0, [r2, #1] (uint8_t *)(void *)hcdc->data, 80092e6: 6939 ldr r1, [r7, #16] ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 80092e8: 683a ldr r2, [r7, #0] 80092ea: 88d2 ldrh r2, [r2, #6] 80092ec: 4798 blx r3 req->wLength); USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 80092ee: 6939 ldr r1, [r7, #16] 80092f0: 683b ldr r3, [r7, #0] 80092f2: 88db ldrh r3, [r3, #6] 80092f4: 461a mov r2, r3 80092f6: 6878 ldr r0, [r7, #4] 80092f8: f001 fa06 bl 800a708 else { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, (uint8_t *)(void *)req, 0U); } break; 80092fc: e06b b.n 80093d6 hcdc->CmdOpCode = req->bRequest; 80092fe: 683b ldr r3, [r7, #0] 8009300: 785a ldrb r2, [r3, #1] 8009302: 693b ldr r3, [r7, #16] 8009304: f883 2200 strb.w r2, [r3, #512] @ 0x200 hcdc->CmdLength = (uint8_t)req->wLength; 8009308: 683b ldr r3, [r7, #0] 800930a: 88db ldrh r3, [r3, #6] 800930c: b2da uxtb r2, r3 800930e: 693b ldr r3, [r7, #16] 8009310: f883 2201 strb.w r2, [r3, #513] @ 0x201 USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 8009314: 6939 ldr r1, [r7, #16] 8009316: 683b ldr r3, [r7, #0] 8009318: 88db ldrh r3, [r3, #6] 800931a: 461a mov r2, r3 800931c: 6878 ldr r0, [r7, #4] 800931e: f001 fa21 bl 800a764 break; 8009322: e058 b.n 80093d6 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 8009324: 687b ldr r3, [r7, #4] 8009326: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800932a: 689b ldr r3, [r3, #8] 800932c: 683a ldr r2, [r7, #0] 800932e: 7850 ldrb r0, [r2, #1] 8009330: 2200 movs r2, #0 8009332: 6839 ldr r1, [r7, #0] 8009334: 4798 blx r3 break; 8009336: e04e b.n 80093d6 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 8009338: 683b ldr r3, [r7, #0] 800933a: 785b ldrb r3, [r3, #1] 800933c: 2b0b cmp r3, #11 800933e: d02e beq.n 800939e 8009340: 2b0b cmp r3, #11 8009342: dc38 bgt.n 80093b6 8009344: 2b00 cmp r3, #0 8009346: d002 beq.n 800934e 8009348: 2b0a cmp r3, #10 800934a: d014 beq.n 8009376 800934c: e033 b.n 80093b6 { case USB_REQ_GET_STATUS: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800934e: 687b ldr r3, [r7, #4] 8009350: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009354: 2b03 cmp r3, #3 8009356: d107 bne.n 8009368 { USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U); 8009358: f107 030c add.w r3, r7, #12 800935c: 2202 movs r2, #2 800935e: 4619 mov r1, r3 8009360: 6878 ldr r0, [r7, #4] 8009362: f001 f9d1 bl 800a708 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 8009366: e02e b.n 80093c6 USBD_CtlError(pdev, req); 8009368: 6839 ldr r1, [r7, #0] 800936a: 6878 ldr r0, [r7, #4] 800936c: f001 f962 bl 800a634 ret = USBD_FAIL; 8009370: 2302 movs r3, #2 8009372: 75fb strb r3, [r7, #23] break; 8009374: e027 b.n 80093c6 case USB_REQ_GET_INTERFACE: if (pdev->dev_state == USBD_STATE_CONFIGURED) 8009376: 687b ldr r3, [r7, #4] 8009378: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800937c: 2b03 cmp r3, #3 800937e: d107 bne.n 8009390 { USBD_CtlSendData(pdev, &ifalt, 1U); 8009380: f107 030f add.w r3, r7, #15 8009384: 2201 movs r2, #1 8009386: 4619 mov r1, r3 8009388: 6878 ldr r0, [r7, #4] 800938a: f001 f9bd bl 800a708 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800938e: e01a b.n 80093c6 USBD_CtlError(pdev, req); 8009390: 6839 ldr r1, [r7, #0] 8009392: 6878 ldr r0, [r7, #4] 8009394: f001 f94e bl 800a634 ret = USBD_FAIL; 8009398: 2302 movs r3, #2 800939a: 75fb strb r3, [r7, #23] break; 800939c: e013 b.n 80093c6 case USB_REQ_SET_INTERFACE: if (pdev->dev_state != USBD_STATE_CONFIGURED) 800939e: 687b ldr r3, [r7, #4] 80093a0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80093a4: 2b03 cmp r3, #3 80093a6: d00d beq.n 80093c4 { USBD_CtlError(pdev, req); 80093a8: 6839 ldr r1, [r7, #0] 80093aa: 6878 ldr r0, [r7, #4] 80093ac: f001 f942 bl 800a634 ret = USBD_FAIL; 80093b0: 2302 movs r3, #2 80093b2: 75fb strb r3, [r7, #23] } break; 80093b4: e006 b.n 80093c4 default: USBD_CtlError(pdev, req); 80093b6: 6839 ldr r1, [r7, #0] 80093b8: 6878 ldr r0, [r7, #4] 80093ba: f001 f93b bl 800a634 ret = USBD_FAIL; 80093be: 2302 movs r3, #2 80093c0: 75fb strb r3, [r7, #23] break; 80093c2: e000 b.n 80093c6 break; 80093c4: bf00 nop } break; 80093c6: e006 b.n 80093d6 default: USBD_CtlError(pdev, req); 80093c8: 6839 ldr r1, [r7, #0] 80093ca: 6878 ldr r0, [r7, #4] 80093cc: f001 f932 bl 800a634 ret = USBD_FAIL; 80093d0: 2302 movs r3, #2 80093d2: 75fb strb r3, [r7, #23] break; 80093d4: bf00 nop } return ret; 80093d6: 7dfb ldrb r3, [r7, #23] } 80093d8: 4618 mov r0, r3 80093da: 3718 adds r7, #24 80093dc: 46bd mov sp, r7 80093de: bd80 pop {r7, pc} 080093e0 : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { 80093e0: b580 push {r7, lr} 80093e2: b084 sub sp, #16 80093e4: af00 add r7, sp, #0 80093e6: 6078 str r0, [r7, #4] 80093e8: 460b mov r3, r1 80093ea: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData; 80093ec: 687b ldr r3, [r7, #4] 80093ee: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80093f2: 60fb str r3, [r7, #12] PCD_HandleTypeDef *hpcd = pdev->pData; 80093f4: 687b ldr r3, [r7, #4] 80093f6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 80093fa: 60bb str r3, [r7, #8] if (pdev->pClassData != NULL) 80093fc: 687b ldr r3, [r7, #4] 80093fe: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009402: 2b00 cmp r3, #0 8009404: d03a beq.n 800947c { if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U)) 8009406: 78fa ldrb r2, [r7, #3] 8009408: 6879 ldr r1, [r7, #4] 800940a: 4613 mov r3, r2 800940c: 009b lsls r3, r3, #2 800940e: 4413 add r3, r2 8009410: 009b lsls r3, r3, #2 8009412: 440b add r3, r1 8009414: 331c adds r3, #28 8009416: 681b ldr r3, [r3, #0] 8009418: 2b00 cmp r3, #0 800941a: d029 beq.n 8009470 800941c: 78fa ldrb r2, [r7, #3] 800941e: 6879 ldr r1, [r7, #4] 8009420: 4613 mov r3, r2 8009422: 009b lsls r3, r3, #2 8009424: 4413 add r3, r2 8009426: 009b lsls r3, r3, #2 8009428: 440b add r3, r1 800942a: 331c adds r3, #28 800942c: 681a ldr r2, [r3, #0] 800942e: 78f9 ldrb r1, [r7, #3] 8009430: 68b8 ldr r0, [r7, #8] 8009432: 460b mov r3, r1 8009434: 009b lsls r3, r3, #2 8009436: 440b add r3, r1 8009438: 00db lsls r3, r3, #3 800943a: 4403 add r3, r0 800943c: 3320 adds r3, #32 800943e: 681b ldr r3, [r3, #0] 8009440: fbb2 f1f3 udiv r1, r2, r3 8009444: fb01 f303 mul.w r3, r1, r3 8009448: 1ad3 subs r3, r2, r3 800944a: 2b00 cmp r3, #0 800944c: d110 bne.n 8009470 { /* Update the packet total length */ pdev->ep_in[epnum].total_length = 0U; 800944e: 78fa ldrb r2, [r7, #3] 8009450: 6879 ldr r1, [r7, #4] 8009452: 4613 mov r3, r2 8009454: 009b lsls r3, r3, #2 8009456: 4413 add r3, r2 8009458: 009b lsls r3, r3, #2 800945a: 440b add r3, r1 800945c: 331c adds r3, #28 800945e: 2200 movs r2, #0 8009460: 601a str r2, [r3, #0] /* Send ZLP */ USBD_LL_Transmit(pdev, epnum, NULL, 0U); 8009462: 78f9 ldrb r1, [r7, #3] 8009464: 2300 movs r3, #0 8009466: 2200 movs r2, #0 8009468: 6878 ldr r0, [r7, #4] 800946a: f001 fe45 bl 800b0f8 800946e: e003 b.n 8009478 } else { hcdc->TxState = 0U; 8009470: 68fb ldr r3, [r7, #12] 8009472: 2200 movs r2, #0 8009474: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } return USBD_OK; 8009478: 2300 movs r3, #0 800947a: e000 b.n 800947e } else { return USBD_FAIL; 800947c: 2302 movs r3, #2 } } 800947e: 4618 mov r0, r3 8009480: 3710 adds r7, #16 8009482: 46bd mov sp, r7 8009484: bd80 pop {r7, pc} 08009486 : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum) { 8009486: b580 push {r7, lr} 8009488: b084 sub sp, #16 800948a: af00 add r7, sp, #0 800948c: 6078 str r0, [r7, #4] 800948e: 460b mov r3, r1 8009490: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009492: 687b ldr r3, [r7, #4] 8009494: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009498: 60fb str r3, [r7, #12] /* Get the received data length */ hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum); 800949a: 78fb ldrb r3, [r7, #3] 800949c: 4619 mov r1, r3 800949e: 6878 ldr r0, [r7, #4] 80094a0: f001 fe70 bl 800b184 80094a4: 4602 mov r2, r0 80094a6: 68fb ldr r3, [r7, #12] 80094a8: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* USB data will be immediately processed, this allow next USB traffic being NAKed till the end of the application Xfer */ if (pdev->pClassData != NULL) 80094ac: 687b ldr r3, [r7, #4] 80094ae: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80094b2: 2b00 cmp r3, #0 80094b4: d00d beq.n 80094d2 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength); 80094b6: 687b ldr r3, [r7, #4] 80094b8: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 80094bc: 68db ldr r3, [r3, #12] 80094be: 68fa ldr r2, [r7, #12] 80094c0: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204 80094c4: 68fa ldr r2, [r7, #12] 80094c6: f502 7203 add.w r2, r2, #524 @ 0x20c 80094ca: 4611 mov r1, r2 80094cc: 4798 blx r3 return USBD_OK; 80094ce: 2300 movs r3, #0 80094d0: e000 b.n 80094d4 } else { return USBD_FAIL; 80094d2: 2302 movs r3, #2 } } 80094d4: 4618 mov r0, r3 80094d6: 3710 adds r7, #16 80094d8: 46bd mov sp, r7 80094da: bd80 pop {r7, pc} 080094dc : * Handle EP0 Rx Ready event * @param pdev: device instance * @retval status */ static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev) { 80094dc: b580 push {r7, lr} 80094de: b084 sub sp, #16 80094e0: af00 add r7, sp, #0 80094e2: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 80094e4: 687b ldr r3, [r7, #4] 80094e6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80094ea: 60fb str r3, [r7, #12] if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU)) 80094ec: 687b ldr r3, [r7, #4] 80094ee: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 80094f2: 2b00 cmp r3, #0 80094f4: d014 beq.n 8009520 80094f6: 68fb ldr r3, [r7, #12] 80094f8: f893 3200 ldrb.w r3, [r3, #512] @ 0x200 80094fc: 2bff cmp r3, #255 @ 0xff 80094fe: d00f beq.n 8009520 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 8009500: 687b ldr r3, [r7, #4] 8009502: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 8009506: 689b ldr r3, [r3, #8] 8009508: 68fa ldr r2, [r7, #12] 800950a: f892 0200 ldrb.w r0, [r2, #512] @ 0x200 (uint8_t *)(void *)hcdc->data, 800950e: 68f9 ldr r1, [r7, #12] (uint16_t)hcdc->CmdLength); 8009510: 68fa ldr r2, [r7, #12] 8009512: f892 2201 ldrb.w r2, [r2, #513] @ 0x201 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 8009516: 4798 blx r3 hcdc->CmdOpCode = 0xFFU; 8009518: 68fb ldr r3, [r7, #12] 800951a: 22ff movs r2, #255 @ 0xff 800951c: f883 2200 strb.w r2, [r3, #512] @ 0x200 } return USBD_OK; 8009520: 2300 movs r3, #0 } 8009522: 4618 mov r0, r3 8009524: 3710 adds r7, #16 8009526: 46bd mov sp, r7 8009528: bd80 pop {r7, pc} ... 0800952c : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length) { 800952c: b480 push {r7} 800952e: b083 sub sp, #12 8009530: af00 add r7, sp, #0 8009532: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgFSDesc); 8009534: 687b ldr r3, [r7, #4] 8009536: 2243 movs r2, #67 @ 0x43 8009538: 801a strh r2, [r3, #0] return USBD_CDC_CfgFSDesc; 800953a: 4b03 ldr r3, [pc, #12] @ (8009548 ) } 800953c: 4618 mov r0, r3 800953e: 370c adds r7, #12 8009540: 46bd mov sp, r7 8009542: bc80 pop {r7} 8009544: 4770 bx lr 8009546: bf00 nop 8009548: 20000098 .word 0x20000098 0800954c : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length) { 800954c: b480 push {r7} 800954e: b083 sub sp, #12 8009550: af00 add r7, sp, #0 8009552: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgHSDesc); 8009554: 687b ldr r3, [r7, #4] 8009556: 2243 movs r2, #67 @ 0x43 8009558: 801a strh r2, [r3, #0] return USBD_CDC_CfgHSDesc; 800955a: 4b03 ldr r3, [pc, #12] @ (8009568 ) } 800955c: 4618 mov r0, r3 800955e: 370c adds r7, #12 8009560: 46bd mov sp, r7 8009562: bc80 pop {r7} 8009564: 4770 bx lr 8009566: bf00 nop 8009568: 20000054 .word 0x20000054 0800956c : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length) { 800956c: b480 push {r7} 800956e: b083 sub sp, #12 8009570: af00 add r7, sp, #0 8009572: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_OtherSpeedCfgDesc); 8009574: 687b ldr r3, [r7, #4] 8009576: 2243 movs r2, #67 @ 0x43 8009578: 801a strh r2, [r3, #0] return USBD_CDC_OtherSpeedCfgDesc; 800957a: 4b03 ldr r3, [pc, #12] @ (8009588 ) } 800957c: 4618 mov r0, r3 800957e: 370c adds r7, #12 8009580: 46bd mov sp, r7 8009582: bc80 pop {r7} 8009584: 4770 bx lr 8009586: bf00 nop 8009588: 200000dc .word 0x200000dc 0800958c : * return Device Qualifier descriptor * @param length : pointer data length * @retval pointer to descriptor buffer */ uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length) { 800958c: b480 push {r7} 800958e: b083 sub sp, #12 8009590: af00 add r7, sp, #0 8009592: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_DeviceQualifierDesc); 8009594: 687b ldr r3, [r7, #4] 8009596: 220a movs r2, #10 8009598: 801a strh r2, [r3, #0] return USBD_CDC_DeviceQualifierDesc; 800959a: 4b03 ldr r3, [pc, #12] @ (80095a8 ) } 800959c: 4618 mov r0, r3 800959e: 370c adds r7, #12 80095a0: 46bd mov sp, r7 80095a2: bc80 pop {r7} 80095a4: 4770 bx lr 80095a6: bf00 nop 80095a8: 20000010 .word 0x20000010 080095ac : * @param fops: CD Interface callback * @retval status */ uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev, USBD_CDC_ItfTypeDef *fops) { 80095ac: b480 push {r7} 80095ae: b085 sub sp, #20 80095b0: af00 add r7, sp, #0 80095b2: 6078 str r0, [r7, #4] 80095b4: 6039 str r1, [r7, #0] uint8_t ret = USBD_FAIL; 80095b6: 2302 movs r3, #2 80095b8: 73fb strb r3, [r7, #15] if (fops != NULL) 80095ba: 683b ldr r3, [r7, #0] 80095bc: 2b00 cmp r3, #0 80095be: d005 beq.n 80095cc { pdev->pUserData = fops; 80095c0: 687b ldr r3, [r7, #4] 80095c2: 683a ldr r2, [r7, #0] 80095c4: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc ret = USBD_OK; 80095c8: 2300 movs r3, #0 80095ca: 73fb strb r3, [r7, #15] } return ret; 80095cc: 7bfb ldrb r3, [r7, #15] } 80095ce: 4618 mov r0, r3 80095d0: 3714 adds r7, #20 80095d2: 46bd mov sp, r7 80095d4: bc80 pop {r7} 80095d6: 4770 bx lr 080095d8 : * @retval status */ uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff, uint16_t length) { 80095d8: b480 push {r7} 80095da: b087 sub sp, #28 80095dc: af00 add r7, sp, #0 80095de: 60f8 str r0, [r7, #12] 80095e0: 60b9 str r1, [r7, #8] 80095e2: 4613 mov r3, r2 80095e4: 80fb strh r3, [r7, #6] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 80095e6: 68fb ldr r3, [r7, #12] 80095e8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80095ec: 617b str r3, [r7, #20] hcdc->TxBuffer = pbuff; 80095ee: 697b ldr r3, [r7, #20] 80095f0: 68ba ldr r2, [r7, #8] 80095f2: f8c3 2208 str.w r2, [r3, #520] @ 0x208 hcdc->TxLength = length; 80095f6: 88fa ldrh r2, [r7, #6] 80095f8: 697b ldr r3, [r7, #20] 80095fa: f8c3 2210 str.w r2, [r3, #528] @ 0x210 return USBD_OK; 80095fe: 2300 movs r3, #0 } 8009600: 4618 mov r0, r3 8009602: 371c adds r7, #28 8009604: 46bd mov sp, r7 8009606: bc80 pop {r7} 8009608: 4770 bx lr 0800960a : * @param pbuff: Rx Buffer * @retval status */ uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff) { 800960a: b480 push {r7} 800960c: b085 sub sp, #20 800960e: af00 add r7, sp, #0 8009610: 6078 str r0, [r7, #4] 8009612: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009614: 687b ldr r3, [r7, #4] 8009616: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800961a: 60fb str r3, [r7, #12] hcdc->RxBuffer = pbuff; 800961c: 68fb ldr r3, [r7, #12] 800961e: 683a ldr r2, [r7, #0] 8009620: f8c3 2204 str.w r2, [r3, #516] @ 0x204 return USBD_OK; 8009624: 2300 movs r3, #0 } 8009626: 4618 mov r0, r3 8009628: 3714 adds r7, #20 800962a: 46bd mov sp, r7 800962c: bc80 pop {r7} 800962e: 4770 bx lr 08009630 : * Transmit packet on IN endpoint * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev) { 8009630: b580 push {r7, lr} 8009632: b084 sub sp, #16 8009634: af00 add r7, sp, #0 8009636: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009638: 687b ldr r3, [r7, #4] 800963a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800963e: 60fb str r3, [r7, #12] if (pdev->pClassData != NULL) 8009640: 687b ldr r3, [r7, #4] 8009642: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009646: 2b00 cmp r3, #0 8009648: d01c beq.n 8009684 { if (hcdc->TxState == 0U) 800964a: 68fb ldr r3, [r7, #12] 800964c: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 8009650: 2b00 cmp r3, #0 8009652: d115 bne.n 8009680 { /* Tx Transfer in progress */ hcdc->TxState = 1U; 8009654: 68fb ldr r3, [r7, #12] 8009656: 2201 movs r2, #1 8009658: f8c3 2214 str.w r2, [r3, #532] @ 0x214 /* Update the packet total length */ pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength; 800965c: 68fb ldr r3, [r7, #12] 800965e: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210 8009662: 687b ldr r3, [r7, #4] 8009664: 631a str r2, [r3, #48] @ 0x30 /* Transmit next packet */ USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 8009666: 68fb ldr r3, [r7, #12] 8009668: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208 (uint16_t)hcdc->TxLength); 800966c: 68fb ldr r3, [r7, #12] 800966e: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210 USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 8009672: b29b uxth r3, r3 8009674: 2181 movs r1, #129 @ 0x81 8009676: 6878 ldr r0, [r7, #4] 8009678: f001 fd3e bl 800b0f8 return USBD_OK; 800967c: 2300 movs r3, #0 800967e: e002 b.n 8009686 } else { return USBD_BUSY; 8009680: 2301 movs r3, #1 8009682: e000 b.n 8009686 } } else { return USBD_FAIL; 8009684: 2302 movs r3, #2 } } 8009686: 4618 mov r0, r3 8009688: 3710 adds r7, #16 800968a: 46bd mov sp, r7 800968c: bd80 pop {r7, pc} 0800968e : * prepare OUT Endpoint for reception * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev) { 800968e: b580 push {r7, lr} 8009690: b084 sub sp, #16 8009692: af00 add r7, sp, #0 8009694: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009696: 687b ldr r3, [r7, #4] 8009698: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800969c: 60fb str r3, [r7, #12] /* Suspend or Resume USB Out process */ if (pdev->pClassData != NULL) 800969e: 687b ldr r3, [r7, #4] 80096a0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80096a4: 2b00 cmp r3, #0 80096a6: d017 beq.n 80096d8 { if (pdev->dev_speed == USBD_SPEED_HIGH) 80096a8: 687b ldr r3, [r7, #4] 80096aa: 7c1b ldrb r3, [r3, #16] 80096ac: 2b00 cmp r3, #0 80096ae: d109 bne.n 80096c4 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 80096b0: 68fb ldr r3, [r7, #12] 80096b2: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 80096b6: f44f 7300 mov.w r3, #512 @ 0x200 80096ba: 2101 movs r1, #1 80096bc: 6878 ldr r0, [r7, #4] 80096be: f001 fd3e bl 800b13e 80096c2: e007 b.n 80096d4 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 80096c4: 68fb ldr r3, [r7, #12] 80096c6: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 80096ca: 2340 movs r3, #64 @ 0x40 80096cc: 2101 movs r1, #1 80096ce: 6878 ldr r0, [r7, #4] 80096d0: f001 fd35 bl 800b13e CDC_OUT_EP, hcdc->RxBuffer, CDC_DATA_FS_OUT_PACKET_SIZE); } return USBD_OK; 80096d4: 2300 movs r3, #0 80096d6: e000 b.n 80096da } else { return USBD_FAIL; 80096d8: 2302 movs r3, #2 } } 80096da: 4618 mov r0, r3 80096dc: 3710 adds r7, #16 80096de: 46bd mov sp, r7 80096e0: bd80 pop {r7, pc} 080096e2 : * @param id: Low level core index * @retval None */ USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) { 80096e2: b580 push {r7, lr} 80096e4: b084 sub sp, #16 80096e6: af00 add r7, sp, #0 80096e8: 60f8 str r0, [r7, #12] 80096ea: 60b9 str r1, [r7, #8] 80096ec: 4613 mov r3, r2 80096ee: 71fb strb r3, [r7, #7] /* Check whether the USB Host handle is valid */ if (pdev == NULL) 80096f0: 68fb ldr r3, [r7, #12] 80096f2: 2b00 cmp r3, #0 80096f4: d101 bne.n 80096fa { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Device handle"); #endif return USBD_FAIL; 80096f6: 2302 movs r3, #2 80096f8: e01a b.n 8009730 } /* Unlink previous class*/ if (pdev->pClass != NULL) 80096fa: 68fb ldr r3, [r7, #12] 80096fc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009700: 2b00 cmp r3, #0 8009702: d003 beq.n 800970c { pdev->pClass = NULL; 8009704: 68fb ldr r3, [r7, #12] 8009706: 2200 movs r2, #0 8009708: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 } /* Assign USBD Descriptors */ if (pdesc != NULL) 800970c: 68bb ldr r3, [r7, #8] 800970e: 2b00 cmp r3, #0 8009710: d003 beq.n 800971a { pdev->pDesc = pdesc; 8009712: 68fb ldr r3, [r7, #12] 8009714: 68ba ldr r2, [r7, #8] 8009716: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0 } /* Set Device initial State */ pdev->dev_state = USBD_STATE_DEFAULT; 800971a: 68fb ldr r3, [r7, #12] 800971c: 2201 movs r2, #1 800971e: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->id = id; 8009722: 68fb ldr r3, [r7, #12] 8009724: 79fa ldrb r2, [r7, #7] 8009726: 701a strb r2, [r3, #0] /* Initialize low level driver */ USBD_LL_Init(pdev); 8009728: 68f8 ldr r0, [r7, #12] 800972a: f001 fba3 bl 800ae74 return USBD_OK; 800972e: 2300 movs r3, #0 } 8009730: 4618 mov r0, r3 8009732: 3710 adds r7, #16 8009734: 46bd mov sp, r7 8009736: bd80 pop {r7, pc} 08009738 : * @param pDevice : Device Handle * @param pclass: Class handle * @retval USBD Status */ USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) { 8009738: b480 push {r7} 800973a: b085 sub sp, #20 800973c: af00 add r7, sp, #0 800973e: 6078 str r0, [r7, #4] 8009740: 6039 str r1, [r7, #0] USBD_StatusTypeDef status = USBD_OK; 8009742: 2300 movs r3, #0 8009744: 73fb strb r3, [r7, #15] if (pclass != NULL) 8009746: 683b ldr r3, [r7, #0] 8009748: 2b00 cmp r3, #0 800974a: d006 beq.n 800975a { /* link the class to the USB Device handle */ pdev->pClass = pclass; 800974c: 687b ldr r3, [r7, #4] 800974e: 683a ldr r2, [r7, #0] 8009750: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 status = USBD_OK; 8009754: 2300 movs r3, #0 8009756: 73fb strb r3, [r7, #15] 8009758: e001 b.n 800975e else { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Class handle"); #endif status = USBD_FAIL; 800975a: 2302 movs r3, #2 800975c: 73fb strb r3, [r7, #15] } return status; 800975e: 7bfb ldrb r3, [r7, #15] } 8009760: 4618 mov r0, r3 8009762: 3714 adds r7, #20 8009764: 46bd mov sp, r7 8009766: bc80 pop {r7} 8009768: 4770 bx lr 0800976a : * Start the USB Device Core. * @param pdev: Device Handle * @retval USBD Status */ USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev) { 800976a: b580 push {r7, lr} 800976c: b082 sub sp, #8 800976e: af00 add r7, sp, #0 8009770: 6078 str r0, [r7, #4] /* Start the low level driver */ USBD_LL_Start(pdev); 8009772: 6878 ldr r0, [r7, #4] 8009774: f001 fbd8 bl 800af28 return USBD_OK; 8009778: 2300 movs r3, #0 } 800977a: 4618 mov r0, r3 800977c: 3708 adds r7, #8 800977e: 46bd mov sp, r7 8009780: bd80 pop {r7, pc} 08009782 : * Launch test mode process * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev) { 8009782: b480 push {r7} 8009784: b083 sub sp, #12 8009786: af00 add r7, sp, #0 8009788: 6078 str r0, [r7, #4] /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 800978a: 2300 movs r3, #0 } 800978c: 4618 mov r0, r3 800978e: 370c adds r7, #12 8009790: 46bd mov sp, r7 8009792: bc80 pop {r7} 8009794: 4770 bx lr 08009796 : * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8009796: b580 push {r7, lr} 8009798: b084 sub sp, #16 800979a: af00 add r7, sp, #0 800979c: 6078 str r0, [r7, #4] 800979e: 460b mov r3, r1 80097a0: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_FAIL; 80097a2: 2302 movs r3, #2 80097a4: 73fb strb r3, [r7, #15] if (pdev->pClass != NULL) 80097a6: 687b ldr r3, [r7, #4] 80097a8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80097ac: 2b00 cmp r3, #0 80097ae: d00c beq.n 80097ca { /* Set configuration and Start the Class*/ if (pdev->pClass->Init(pdev, cfgidx) == 0U) 80097b0: 687b ldr r3, [r7, #4] 80097b2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80097b6: 681b ldr r3, [r3, #0] 80097b8: 78fa ldrb r2, [r7, #3] 80097ba: 4611 mov r1, r2 80097bc: 6878 ldr r0, [r7, #4] 80097be: 4798 blx r3 80097c0: 4603 mov r3, r0 80097c2: 2b00 cmp r3, #0 80097c4: d101 bne.n 80097ca { ret = USBD_OK; 80097c6: 2300 movs r3, #0 80097c8: 73fb strb r3, [r7, #15] } } return ret; 80097ca: 7bfb ldrb r3, [r7, #15] } 80097cc: 4618 mov r0, r3 80097ce: 3710 adds r7, #16 80097d0: 46bd mov sp, r7 80097d2: bd80 pop {r7, pc} 080097d4 : * @param pdev: device instance * @param cfgidx: configuration index * @retval status: USBD_StatusTypeDef */ USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 80097d4: b580 push {r7, lr} 80097d6: b082 sub sp, #8 80097d8: af00 add r7, sp, #0 80097da: 6078 str r0, [r7, #4] 80097dc: 460b mov r3, r1 80097de: 70fb strb r3, [r7, #3] /* Clear configuration and De-initialize the Class process*/ pdev->pClass->DeInit(pdev, cfgidx); 80097e0: 687b ldr r3, [r7, #4] 80097e2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80097e6: 685b ldr r3, [r3, #4] 80097e8: 78fa ldrb r2, [r7, #3] 80097ea: 4611 mov r1, r2 80097ec: 6878 ldr r0, [r7, #4] 80097ee: 4798 blx r3 return USBD_OK; 80097f0: 2300 movs r3, #0 } 80097f2: 4618 mov r0, r3 80097f4: 3708 adds r7, #8 80097f6: 46bd mov sp, r7 80097f8: bd80 pop {r7, pc} 080097fa : * Handle the setup stage * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) { 80097fa: b580 push {r7, lr} 80097fc: b082 sub sp, #8 80097fe: af00 add r7, sp, #0 8009800: 6078 str r0, [r7, #4] 8009802: 6039 str r1, [r7, #0] USBD_ParseSetupRequest(&pdev->request, psetup); 8009804: 687b ldr r3, [r7, #4] 8009806: f503 732a add.w r3, r3, #680 @ 0x2a8 800980a: 6839 ldr r1, [r7, #0] 800980c: 4618 mov r0, r3 800980e: f000 fed8 bl 800a5c2 pdev->ep0_state = USBD_EP0_SETUP; 8009812: 687b ldr r3, [r7, #4] 8009814: 2201 movs r2, #1 8009816: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep0_data_len = pdev->request.wLength; 800981a: 687b ldr r3, [r7, #4] 800981c: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 8009820: 461a mov r2, r3 8009822: 687b ldr r3, [r7, #4] 8009824: f8c3 2298 str.w r2, [r3, #664] @ 0x298 switch (pdev->request.bmRequest & 0x1FU) 8009828: 687b ldr r3, [r7, #4] 800982a: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 800982e: f003 031f and.w r3, r3, #31 8009832: 2b02 cmp r3, #2 8009834: d016 beq.n 8009864 8009836: 2b02 cmp r3, #2 8009838: d81c bhi.n 8009874 800983a: 2b00 cmp r3, #0 800983c: d002 beq.n 8009844 800983e: 2b01 cmp r3, #1 8009840: d008 beq.n 8009854 8009842: e017 b.n 8009874 { case USB_REQ_RECIPIENT_DEVICE: USBD_StdDevReq(pdev, &pdev->request); 8009844: 687b ldr r3, [r7, #4] 8009846: f503 732a add.w r3, r3, #680 @ 0x2a8 800984a: 4619 mov r1, r3 800984c: 6878 ldr r0, [r7, #4] 800984e: f000 f9cb bl 8009be8 break; 8009852: e01a b.n 800988a case USB_REQ_RECIPIENT_INTERFACE: USBD_StdItfReq(pdev, &pdev->request); 8009854: 687b ldr r3, [r7, #4] 8009856: f503 732a add.w r3, r3, #680 @ 0x2a8 800985a: 4619 mov r1, r3 800985c: 6878 ldr r0, [r7, #4] 800985e: f000 fa2d bl 8009cbc break; 8009862: e012 b.n 800988a case USB_REQ_RECIPIENT_ENDPOINT: USBD_StdEPReq(pdev, &pdev->request); 8009864: 687b ldr r3, [r7, #4] 8009866: f503 732a add.w r3, r3, #680 @ 0x2a8 800986a: 4619 mov r1, r3 800986c: 6878 ldr r0, [r7, #4] 800986e: f000 fa6d bl 8009d4c break; 8009872: e00a b.n 800988a default: USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U)); 8009874: 687b ldr r3, [r7, #4] 8009876: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 800987a: f023 037f bic.w r3, r3, #127 @ 0x7f 800987e: b2db uxtb r3, r3 8009880: 4619 mov r1, r3 8009882: 6878 ldr r0, [r7, #4] 8009884: f001 fbb0 bl 800afe8 break; 8009888: bf00 nop } return USBD_OK; 800988a: 2300 movs r3, #0 } 800988c: 4618 mov r0, r3 800988e: 3708 adds r7, #8 8009890: 46bd mov sp, r7 8009892: bd80 pop {r7, pc} 08009894 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 8009894: b580 push {r7, lr} 8009896: b086 sub sp, #24 8009898: af00 add r7, sp, #0 800989a: 60f8 str r0, [r7, #12] 800989c: 460b mov r3, r1 800989e: 607a str r2, [r7, #4] 80098a0: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 80098a2: 7afb ldrb r3, [r7, #11] 80098a4: 2b00 cmp r3, #0 80098a6: d14b bne.n 8009940 { pep = &pdev->ep_out[0]; 80098a8: 68fb ldr r3, [r7, #12] 80098aa: f503 73aa add.w r3, r3, #340 @ 0x154 80098ae: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_OUT) 80098b0: 68fb ldr r3, [r7, #12] 80098b2: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 80098b6: 2b03 cmp r3, #3 80098b8: d134 bne.n 8009924 { if (pep->rem_length > pep->maxpacket) 80098ba: 697b ldr r3, [r7, #20] 80098bc: 68da ldr r2, [r3, #12] 80098be: 697b ldr r3, [r7, #20] 80098c0: 691b ldr r3, [r3, #16] 80098c2: 429a cmp r2, r3 80098c4: d919 bls.n 80098fa { pep->rem_length -= pep->maxpacket; 80098c6: 697b ldr r3, [r7, #20] 80098c8: 68da ldr r2, [r3, #12] 80098ca: 697b ldr r3, [r7, #20] 80098cc: 691b ldr r3, [r3, #16] 80098ce: 1ad2 subs r2, r2, r3 80098d0: 697b ldr r3, [r7, #20] 80098d2: 60da str r2, [r3, #12] USBD_CtlContinueRx(pdev, pdata, (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 80098d4: 697b ldr r3, [r7, #20] 80098d6: 68da ldr r2, [r3, #12] 80098d8: 697b ldr r3, [r7, #20] 80098da: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 80098dc: 429a cmp r2, r3 80098de: d203 bcs.n 80098e8 (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 80098e0: 697b ldr r3, [r7, #20] 80098e2: 68db ldr r3, [r3, #12] USBD_CtlContinueRx(pdev, pdata, 80098e4: b29b uxth r3, r3 80098e6: e002 b.n 80098ee (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 80098e8: 697b ldr r3, [r7, #20] 80098ea: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 80098ec: b29b uxth r3, r3 80098ee: 461a mov r2, r3 80098f0: 6879 ldr r1, [r7, #4] 80098f2: 68f8 ldr r0, [r7, #12] 80098f4: f000 ff54 bl 800a7a0 80098f8: e038 b.n 800996c } else { if ((pdev->pClass->EP0_RxReady != NULL) && 80098fa: 68fb ldr r3, [r7, #12] 80098fc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009900: 691b ldr r3, [r3, #16] 8009902: 2b00 cmp r3, #0 8009904: d00a beq.n 800991c (pdev->dev_state == USBD_STATE_CONFIGURED)) 8009906: 68fb ldr r3, [r7, #12] 8009908: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_RxReady != NULL) && 800990c: 2b03 cmp r3, #3 800990e: d105 bne.n 800991c { pdev->pClass->EP0_RxReady(pdev); 8009910: 68fb ldr r3, [r7, #12] 8009912: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009916: 691b ldr r3, [r3, #16] 8009918: 68f8 ldr r0, [r7, #12] 800991a: 4798 blx r3 } USBD_CtlSendStatus(pdev); 800991c: 68f8 ldr r0, [r7, #12] 800991e: f000 ff51 bl 800a7c4 8009922: e023 b.n 800996c } } else { if (pdev->ep0_state == USBD_EP0_STATUS_OUT) 8009924: 68fb ldr r3, [r7, #12] 8009926: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800992a: 2b05 cmp r3, #5 800992c: d11e bne.n 800996c { /* * STATUS PHASE completed, update ep0_state to idle */ pdev->ep0_state = USBD_EP0_IDLE; 800992e: 68fb ldr r3, [r7, #12] 8009930: 2200 movs r2, #0 8009932: f8c3 2294 str.w r2, [r3, #660] @ 0x294 USBD_LL_StallEP(pdev, 0U); 8009936: 2100 movs r1, #0 8009938: 68f8 ldr r0, [r7, #12] 800993a: f001 fb55 bl 800afe8 800993e: e015 b.n 800996c } } } else if ((pdev->pClass->DataOut != NULL) && 8009940: 68fb ldr r3, [r7, #12] 8009942: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009946: 699b ldr r3, [r3, #24] 8009948: 2b00 cmp r3, #0 800994a: d00d beq.n 8009968 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800994c: 68fb ldr r3, [r7, #12] 800994e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataOut != NULL) && 8009952: 2b03 cmp r3, #3 8009954: d108 bne.n 8009968 { pdev->pClass->DataOut(pdev, epnum); 8009956: 68fb ldr r3, [r7, #12] 8009958: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800995c: 699b ldr r3, [r3, #24] 800995e: 7afa ldrb r2, [r7, #11] 8009960: 4611 mov r1, r2 8009962: 68f8 ldr r0, [r7, #12] 8009964: 4798 blx r3 8009966: e001 b.n 800996c } else { /* should never be in this condition */ return USBD_FAIL; 8009968: 2302 movs r3, #2 800996a: e000 b.n 800996e } return USBD_OK; 800996c: 2300 movs r3, #0 } 800996e: 4618 mov r0, r3 8009970: 3718 adds r7, #24 8009972: 46bd mov sp, r7 8009974: bd80 pop {r7, pc} 08009976 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 8009976: b580 push {r7, lr} 8009978: b086 sub sp, #24 800997a: af00 add r7, sp, #0 800997c: 60f8 str r0, [r7, #12] 800997e: 460b mov r3, r1 8009980: 607a str r2, [r7, #4] 8009982: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 8009984: 7afb ldrb r3, [r7, #11] 8009986: 2b00 cmp r3, #0 8009988: d17f bne.n 8009a8a { pep = &pdev->ep_in[0]; 800998a: 68fb ldr r3, [r7, #12] 800998c: 3314 adds r3, #20 800998e: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_IN) 8009990: 68fb ldr r3, [r7, #12] 8009992: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 8009996: 2b02 cmp r3, #2 8009998: d15c bne.n 8009a54 { if (pep->rem_length > pep->maxpacket) 800999a: 697b ldr r3, [r7, #20] 800999c: 68da ldr r2, [r3, #12] 800999e: 697b ldr r3, [r7, #20] 80099a0: 691b ldr r3, [r3, #16] 80099a2: 429a cmp r2, r3 80099a4: d915 bls.n 80099d2 { pep->rem_length -= pep->maxpacket; 80099a6: 697b ldr r3, [r7, #20] 80099a8: 68da ldr r2, [r3, #12] 80099aa: 697b ldr r3, [r7, #20] 80099ac: 691b ldr r3, [r3, #16] 80099ae: 1ad2 subs r2, r2, r3 80099b0: 697b ldr r3, [r7, #20] 80099b2: 60da str r2, [r3, #12] USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length); 80099b4: 697b ldr r3, [r7, #20] 80099b6: 68db ldr r3, [r3, #12] 80099b8: b29b uxth r3, r3 80099ba: 461a mov r2, r3 80099bc: 6879 ldr r1, [r7, #4] 80099be: 68f8 ldr r0, [r7, #12] 80099c0: f000 febe bl 800a740 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 80099c4: 2300 movs r3, #0 80099c6: 2200 movs r2, #0 80099c8: 2100 movs r1, #0 80099ca: 68f8 ldr r0, [r7, #12] 80099cc: f001 fbb7 bl 800b13e 80099d0: e04e b.n 8009a70 } else { /* last packet is MPS multiple, so send ZLP packet */ if ((pep->total_length % pep->maxpacket == 0U) && 80099d2: 697b ldr r3, [r7, #20] 80099d4: 689b ldr r3, [r3, #8] 80099d6: 697a ldr r2, [r7, #20] 80099d8: 6912 ldr r2, [r2, #16] 80099da: fbb3 f1f2 udiv r1, r3, r2 80099de: fb01 f202 mul.w r2, r1, r2 80099e2: 1a9b subs r3, r3, r2 80099e4: 2b00 cmp r3, #0 80099e6: d11c bne.n 8009a22 (pep->total_length >= pep->maxpacket) && 80099e8: 697b ldr r3, [r7, #20] 80099ea: 689a ldr r2, [r3, #8] 80099ec: 697b ldr r3, [r7, #20] 80099ee: 691b ldr r3, [r3, #16] if ((pep->total_length % pep->maxpacket == 0U) && 80099f0: 429a cmp r2, r3 80099f2: d316 bcc.n 8009a22 (pep->total_length < pdev->ep0_data_len)) 80099f4: 697b ldr r3, [r7, #20] 80099f6: 689a ldr r2, [r3, #8] 80099f8: 68fb ldr r3, [r7, #12] 80099fa: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298 (pep->total_length >= pep->maxpacket) && 80099fe: 429a cmp r2, r3 8009a00: d20f bcs.n 8009a22 { USBD_CtlContinueSendData(pdev, NULL, 0U); 8009a02: 2200 movs r2, #0 8009a04: 2100 movs r1, #0 8009a06: 68f8 ldr r0, [r7, #12] 8009a08: f000 fe9a bl 800a740 pdev->ep0_data_len = 0U; 8009a0c: 68fb ldr r3, [r7, #12] 8009a0e: 2200 movs r2, #0 8009a10: f8c3 2298 str.w r2, [r3, #664] @ 0x298 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 8009a14: 2300 movs r3, #0 8009a16: 2200 movs r2, #0 8009a18: 2100 movs r1, #0 8009a1a: 68f8 ldr r0, [r7, #12] 8009a1c: f001 fb8f bl 800b13e 8009a20: e026 b.n 8009a70 } else { if ((pdev->pClass->EP0_TxSent != NULL) && 8009a22: 68fb ldr r3, [r7, #12] 8009a24: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009a28: 68db ldr r3, [r3, #12] 8009a2a: 2b00 cmp r3, #0 8009a2c: d00a beq.n 8009a44 (pdev->dev_state == USBD_STATE_CONFIGURED)) 8009a2e: 68fb ldr r3, [r7, #12] 8009a30: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_TxSent != NULL) && 8009a34: 2b03 cmp r3, #3 8009a36: d105 bne.n 8009a44 { pdev->pClass->EP0_TxSent(pdev); 8009a38: 68fb ldr r3, [r7, #12] 8009a3a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009a3e: 68db ldr r3, [r3, #12] 8009a40: 68f8 ldr r0, [r7, #12] 8009a42: 4798 blx r3 } USBD_LL_StallEP(pdev, 0x80U); 8009a44: 2180 movs r1, #128 @ 0x80 8009a46: 68f8 ldr r0, [r7, #12] 8009a48: f001 face bl 800afe8 USBD_CtlReceiveStatus(pdev); 8009a4c: 68f8 ldr r0, [r7, #12] 8009a4e: f000 fecc bl 800a7ea 8009a52: e00d b.n 8009a70 } } } else { if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 8009a54: 68fb ldr r3, [r7, #12] 8009a56: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 8009a5a: 2b04 cmp r3, #4 8009a5c: d004 beq.n 8009a68 (pdev->ep0_state == USBD_EP0_IDLE)) 8009a5e: 68fb ldr r3, [r7, #12] 8009a60: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 8009a64: 2b00 cmp r3, #0 8009a66: d103 bne.n 8009a70 { USBD_LL_StallEP(pdev, 0x80U); 8009a68: 2180 movs r1, #128 @ 0x80 8009a6a: 68f8 ldr r0, [r7, #12] 8009a6c: f001 fabc bl 800afe8 } } if (pdev->dev_test_mode == 1U) 8009a70: 68fb ldr r3, [r7, #12] 8009a72: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0 8009a76: 2b01 cmp r3, #1 8009a78: d11d bne.n 8009ab6 { USBD_RunTestMode(pdev); 8009a7a: 68f8 ldr r0, [r7, #12] 8009a7c: f7ff fe81 bl 8009782 pdev->dev_test_mode = 0U; 8009a80: 68fb ldr r3, [r7, #12] 8009a82: 2200 movs r2, #0 8009a84: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 8009a88: e015 b.n 8009ab6 } } else if ((pdev->pClass->DataIn != NULL) && 8009a8a: 68fb ldr r3, [r7, #12] 8009a8c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009a90: 695b ldr r3, [r3, #20] 8009a92: 2b00 cmp r3, #0 8009a94: d00d beq.n 8009ab2 (pdev->dev_state == USBD_STATE_CONFIGURED)) 8009a96: 68fb ldr r3, [r7, #12] 8009a98: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataIn != NULL) && 8009a9c: 2b03 cmp r3, #3 8009a9e: d108 bne.n 8009ab2 { pdev->pClass->DataIn(pdev, epnum); 8009aa0: 68fb ldr r3, [r7, #12] 8009aa2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009aa6: 695b ldr r3, [r3, #20] 8009aa8: 7afa ldrb r2, [r7, #11] 8009aaa: 4611 mov r1, r2 8009aac: 68f8 ldr r0, [r7, #12] 8009aae: 4798 blx r3 8009ab0: e001 b.n 8009ab6 } else { /* should never be in this condition */ return USBD_FAIL; 8009ab2: 2302 movs r3, #2 8009ab4: e000 b.n 8009ab8 } return USBD_OK; 8009ab6: 2300 movs r3, #0 } 8009ab8: 4618 mov r0, r3 8009aba: 3718 adds r7, #24 8009abc: 46bd mov sp, r7 8009abe: bd80 pop {r7, pc} 08009ac0 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) { 8009ac0: b580 push {r7, lr} 8009ac2: b082 sub sp, #8 8009ac4: af00 add r7, sp, #0 8009ac6: 6078 str r0, [r7, #4] /* Open EP0 OUT */ USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 8009ac8: 2340 movs r3, #64 @ 0x40 8009aca: 2200 movs r2, #0 8009acc: 2100 movs r1, #0 8009ace: 6878 ldr r0, [r7, #4] 8009ad0: f001 fa45 bl 800af5e pdev->ep_out[0x00U & 0xFU].is_used = 1U; 8009ad4: 687b ldr r3, [r7, #4] 8009ad6: 2201 movs r2, #1 8009ad8: f8c3 2158 str.w r2, [r3, #344] @ 0x158 pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; 8009adc: 687b ldr r3, [r7, #4] 8009ade: 2240 movs r2, #64 @ 0x40 8009ae0: f8c3 2164 str.w r2, [r3, #356] @ 0x164 /* Open EP0 IN */ USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 8009ae4: 2340 movs r3, #64 @ 0x40 8009ae6: 2200 movs r2, #0 8009ae8: 2180 movs r1, #128 @ 0x80 8009aea: 6878 ldr r0, [r7, #4] 8009aec: f001 fa37 bl 800af5e pdev->ep_in[0x80U & 0xFU].is_used = 1U; 8009af0: 687b ldr r3, [r7, #4] 8009af2: 2201 movs r2, #1 8009af4: 619a str r2, [r3, #24] pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; 8009af6: 687b ldr r3, [r7, #4] 8009af8: 2240 movs r2, #64 @ 0x40 8009afa: 625a str r2, [r3, #36] @ 0x24 /* Upon Reset call user call back */ pdev->dev_state = USBD_STATE_DEFAULT; 8009afc: 687b ldr r3, [r7, #4] 8009afe: 2201 movs r2, #1 8009b00: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->ep0_state = USBD_EP0_IDLE; 8009b04: 687b ldr r3, [r7, #4] 8009b06: 2200 movs r2, #0 8009b08: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->dev_config = 0U; 8009b0c: 687b ldr r3, [r7, #4] 8009b0e: 2200 movs r2, #0 8009b10: 605a str r2, [r3, #4] pdev->dev_remote_wakeup = 0U; 8009b12: 687b ldr r3, [r7, #4] 8009b14: 2200 movs r2, #0 8009b16: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 if (pdev->pClassData) 8009b1a: 687b ldr r3, [r7, #4] 8009b1c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009b20: 2b00 cmp r3, #0 8009b22: d009 beq.n 8009b38 { pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config); 8009b24: 687b ldr r3, [r7, #4] 8009b26: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009b2a: 685b ldr r3, [r3, #4] 8009b2c: 687a ldr r2, [r7, #4] 8009b2e: 6852 ldr r2, [r2, #4] 8009b30: b2d2 uxtb r2, r2 8009b32: 4611 mov r1, r2 8009b34: 6878 ldr r0, [r7, #4] 8009b36: 4798 blx r3 } return USBD_OK; 8009b38: 2300 movs r3, #0 } 8009b3a: 4618 mov r0, r3 8009b3c: 3708 adds r7, #8 8009b3e: 46bd mov sp, r7 8009b40: bd80 pop {r7, pc} 08009b42 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) { 8009b42: b480 push {r7} 8009b44: b083 sub sp, #12 8009b46: af00 add r7, sp, #0 8009b48: 6078 str r0, [r7, #4] 8009b4a: 460b mov r3, r1 8009b4c: 70fb strb r3, [r7, #3] pdev->dev_speed = speed; 8009b4e: 687b ldr r3, [r7, #4] 8009b50: 78fa ldrb r2, [r7, #3] 8009b52: 741a strb r2, [r3, #16] return USBD_OK; 8009b54: 2300 movs r3, #0 } 8009b56: 4618 mov r0, r3 8009b58: 370c adds r7, #12 8009b5a: 46bd mov sp, r7 8009b5c: bc80 pop {r7} 8009b5e: 4770 bx lr 08009b60 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) { 8009b60: b480 push {r7} 8009b62: b083 sub sp, #12 8009b64: af00 add r7, sp, #0 8009b66: 6078 str r0, [r7, #4] pdev->dev_old_state = pdev->dev_state; 8009b68: 687b ldr r3, [r7, #4] 8009b6a: f893 229c ldrb.w r2, [r3, #668] @ 0x29c 8009b6e: 687b ldr r3, [r7, #4] 8009b70: f883 229d strb.w r2, [r3, #669] @ 0x29d pdev->dev_state = USBD_STATE_SUSPENDED; 8009b74: 687b ldr r3, [r7, #4] 8009b76: 2204 movs r2, #4 8009b78: f883 229c strb.w r2, [r3, #668] @ 0x29c return USBD_OK; 8009b7c: 2300 movs r3, #0 } 8009b7e: 4618 mov r0, r3 8009b80: 370c adds r7, #12 8009b82: 46bd mov sp, r7 8009b84: bc80 pop {r7} 8009b86: 4770 bx lr 08009b88 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) { 8009b88: b480 push {r7} 8009b8a: b083 sub sp, #12 8009b8c: af00 add r7, sp, #0 8009b8e: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_SUSPENDED) 8009b90: 687b ldr r3, [r7, #4] 8009b92: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009b96: 2b04 cmp r3, #4 8009b98: d105 bne.n 8009ba6 { pdev->dev_state = pdev->dev_old_state; 8009b9a: 687b ldr r3, [r7, #4] 8009b9c: f893 229d ldrb.w r2, [r3, #669] @ 0x29d 8009ba0: 687b ldr r3, [r7, #4] 8009ba2: f883 229c strb.w r2, [r3, #668] @ 0x29c } return USBD_OK; 8009ba6: 2300 movs r3, #0 } 8009ba8: 4618 mov r0, r3 8009baa: 370c adds r7, #12 8009bac: 46bd mov sp, r7 8009bae: bc80 pop {r7} 8009bb0: 4770 bx lr 08009bb2 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) { 8009bb2: b580 push {r7, lr} 8009bb4: b082 sub sp, #8 8009bb6: af00 add r7, sp, #0 8009bb8: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_CONFIGURED) 8009bba: 687b ldr r3, [r7, #4] 8009bbc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009bc0: 2b03 cmp r3, #3 8009bc2: d10b bne.n 8009bdc { if (pdev->pClass->SOF != NULL) 8009bc4: 687b ldr r3, [r7, #4] 8009bc6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009bca: 69db ldr r3, [r3, #28] 8009bcc: 2b00 cmp r3, #0 8009bce: d005 beq.n 8009bdc { pdev->pClass->SOF(pdev); 8009bd0: 687b ldr r3, [r7, #4] 8009bd2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009bd6: 69db ldr r3, [r3, #28] 8009bd8: 6878 ldr r0, [r7, #4] 8009bda: 4798 blx r3 } } return USBD_OK; 8009bdc: 2300 movs r3, #0 } 8009bde: 4618 mov r0, r3 8009be0: 3708 adds r7, #8 8009be2: 46bd mov sp, r7 8009be4: bd80 pop {r7, pc} ... 08009be8 : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8009be8: b580 push {r7, lr} 8009bea: b084 sub sp, #16 8009bec: af00 add r7, sp, #0 8009bee: 6078 str r0, [r7, #4] 8009bf0: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 8009bf2: 2300 movs r3, #0 8009bf4: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 8009bf6: 683b ldr r3, [r7, #0] 8009bf8: 781b ldrb r3, [r3, #0] 8009bfa: f003 0360 and.w r3, r3, #96 @ 0x60 8009bfe: 2b40 cmp r3, #64 @ 0x40 8009c00: d005 beq.n 8009c0e 8009c02: 2b40 cmp r3, #64 @ 0x40 8009c04: d84f bhi.n 8009ca6 8009c06: 2b00 cmp r3, #0 8009c08: d009 beq.n 8009c1e 8009c0a: 2b20 cmp r3, #32 8009c0c: d14b bne.n 8009ca6 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 8009c0e: 687b ldr r3, [r7, #4] 8009c10: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009c14: 689b ldr r3, [r3, #8] 8009c16: 6839 ldr r1, [r7, #0] 8009c18: 6878 ldr r0, [r7, #4] 8009c1a: 4798 blx r3 break; 8009c1c: e048 b.n 8009cb0 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 8009c1e: 683b ldr r3, [r7, #0] 8009c20: 785b ldrb r3, [r3, #1] 8009c22: 2b09 cmp r3, #9 8009c24: d839 bhi.n 8009c9a 8009c26: a201 add r2, pc, #4 @ (adr r2, 8009c2c ) 8009c28: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8009c2c: 08009c7d .word 0x08009c7d 8009c30: 08009c91 .word 0x08009c91 8009c34: 08009c9b .word 0x08009c9b 8009c38: 08009c87 .word 0x08009c87 8009c3c: 08009c9b .word 0x08009c9b 8009c40: 08009c5f .word 0x08009c5f 8009c44: 08009c55 .word 0x08009c55 8009c48: 08009c9b .word 0x08009c9b 8009c4c: 08009c73 .word 0x08009c73 8009c50: 08009c69 .word 0x08009c69 { case USB_REQ_GET_DESCRIPTOR: USBD_GetDescriptor(pdev, req); 8009c54: 6839 ldr r1, [r7, #0] 8009c56: 6878 ldr r0, [r7, #4] 8009c58: f000 f9dc bl 800a014 break; 8009c5c: e022 b.n 8009ca4 case USB_REQ_SET_ADDRESS: USBD_SetAddress(pdev, req); 8009c5e: 6839 ldr r1, [r7, #0] 8009c60: 6878 ldr r0, [r7, #4] 8009c62: f000 fb3f bl 800a2e4 break; 8009c66: e01d b.n 8009ca4 case USB_REQ_SET_CONFIGURATION: USBD_SetConfig(pdev, req); 8009c68: 6839 ldr r1, [r7, #0] 8009c6a: 6878 ldr r0, [r7, #4] 8009c6c: f000 fb7e bl 800a36c break; 8009c70: e018 b.n 8009ca4 case USB_REQ_GET_CONFIGURATION: USBD_GetConfig(pdev, req); 8009c72: 6839 ldr r1, [r7, #0] 8009c74: 6878 ldr r0, [r7, #4] 8009c76: f000 fc07 bl 800a488 break; 8009c7a: e013 b.n 8009ca4 case USB_REQ_GET_STATUS: USBD_GetStatus(pdev, req); 8009c7c: 6839 ldr r1, [r7, #0] 8009c7e: 6878 ldr r0, [r7, #4] 8009c80: f000 fc37 bl 800a4f2 break; 8009c84: e00e b.n 8009ca4 case USB_REQ_SET_FEATURE: USBD_SetFeature(pdev, req); 8009c86: 6839 ldr r1, [r7, #0] 8009c88: 6878 ldr r0, [r7, #4] 8009c8a: f000 fc65 bl 800a558 break; 8009c8e: e009 b.n 8009ca4 case USB_REQ_CLEAR_FEATURE: USBD_ClrFeature(pdev, req); 8009c90: 6839 ldr r1, [r7, #0] 8009c92: 6878 ldr r0, [r7, #4] 8009c94: f000 fc74 bl 800a580 break; 8009c98: e004 b.n 8009ca4 default: USBD_CtlError(pdev, req); 8009c9a: 6839 ldr r1, [r7, #0] 8009c9c: 6878 ldr r0, [r7, #4] 8009c9e: f000 fcc9 bl 800a634 break; 8009ca2: bf00 nop } break; 8009ca4: e004 b.n 8009cb0 default: USBD_CtlError(pdev, req); 8009ca6: 6839 ldr r1, [r7, #0] 8009ca8: 6878 ldr r0, [r7, #4] 8009caa: f000 fcc3 bl 800a634 break; 8009cae: bf00 nop } return ret; 8009cb0: 7bfb ldrb r3, [r7, #15] } 8009cb2: 4618 mov r0, r3 8009cb4: 3710 adds r7, #16 8009cb6: 46bd mov sp, r7 8009cb8: bd80 pop {r7, pc} 8009cba: bf00 nop 08009cbc : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8009cbc: b580 push {r7, lr} 8009cbe: b084 sub sp, #16 8009cc0: af00 add r7, sp, #0 8009cc2: 6078 str r0, [r7, #4] 8009cc4: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 8009cc6: 2300 movs r3, #0 8009cc8: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 8009cca: 683b ldr r3, [r7, #0] 8009ccc: 781b ldrb r3, [r3, #0] 8009cce: f003 0360 and.w r3, r3, #96 @ 0x60 8009cd2: 2b40 cmp r3, #64 @ 0x40 8009cd4: d005 beq.n 8009ce2 8009cd6: 2b40 cmp r3, #64 @ 0x40 8009cd8: d82e bhi.n 8009d38 8009cda: 2b00 cmp r3, #0 8009cdc: d001 beq.n 8009ce2 8009cde: 2b20 cmp r3, #32 8009ce0: d12a bne.n 8009d38 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: case USB_REQ_TYPE_STANDARD: switch (pdev->dev_state) 8009ce2: 687b ldr r3, [r7, #4] 8009ce4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009ce8: 3b01 subs r3, #1 8009cea: 2b02 cmp r3, #2 8009cec: d81d bhi.n 8009d2a { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) 8009cee: 683b ldr r3, [r7, #0] 8009cf0: 889b ldrh r3, [r3, #4] 8009cf2: b2db uxtb r3, r3 8009cf4: 2b01 cmp r3, #1 8009cf6: d813 bhi.n 8009d20 { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 8009cf8: 687b ldr r3, [r7, #4] 8009cfa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009cfe: 689b ldr r3, [r3, #8] 8009d00: 6839 ldr r1, [r7, #0] 8009d02: 6878 ldr r0, [r7, #4] 8009d04: 4798 blx r3 8009d06: 4603 mov r3, r0 8009d08: 73fb strb r3, [r7, #15] if ((req->wLength == 0U) && (ret == USBD_OK)) 8009d0a: 683b ldr r3, [r7, #0] 8009d0c: 88db ldrh r3, [r3, #6] 8009d0e: 2b00 cmp r3, #0 8009d10: d110 bne.n 8009d34 8009d12: 7bfb ldrb r3, [r7, #15] 8009d14: 2b00 cmp r3, #0 8009d16: d10d bne.n 8009d34 { USBD_CtlSendStatus(pdev); 8009d18: 6878 ldr r0, [r7, #4] 8009d1a: f000 fd53 bl 800a7c4 } else { USBD_CtlError(pdev, req); } break; 8009d1e: e009 b.n 8009d34 USBD_CtlError(pdev, req); 8009d20: 6839 ldr r1, [r7, #0] 8009d22: 6878 ldr r0, [r7, #4] 8009d24: f000 fc86 bl 800a634 break; 8009d28: e004 b.n 8009d34 default: USBD_CtlError(pdev, req); 8009d2a: 6839 ldr r1, [r7, #0] 8009d2c: 6878 ldr r0, [r7, #4] 8009d2e: f000 fc81 bl 800a634 break; 8009d32: e000 b.n 8009d36 break; 8009d34: bf00 nop } break; 8009d36: e004 b.n 8009d42 default: USBD_CtlError(pdev, req); 8009d38: 6839 ldr r1, [r7, #0] 8009d3a: 6878 ldr r0, [r7, #4] 8009d3c: f000 fc7a bl 800a634 break; 8009d40: bf00 nop } return USBD_OK; 8009d42: 2300 movs r3, #0 } 8009d44: 4618 mov r0, r3 8009d46: 3710 adds r7, #16 8009d48: 46bd mov sp, r7 8009d4a: bd80 pop {r7, pc} 08009d4c : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8009d4c: b580 push {r7, lr} 8009d4e: b084 sub sp, #16 8009d50: af00 add r7, sp, #0 8009d52: 6078 str r0, [r7, #4] 8009d54: 6039 str r1, [r7, #0] USBD_EndpointTypeDef *pep; uint8_t ep_addr; USBD_StatusTypeDef ret = USBD_OK; 8009d56: 2300 movs r3, #0 8009d58: 73fb strb r3, [r7, #15] ep_addr = LOBYTE(req->wIndex); 8009d5a: 683b ldr r3, [r7, #0] 8009d5c: 889b ldrh r3, [r3, #4] 8009d5e: 73bb strb r3, [r7, #14] switch (req->bmRequest & USB_REQ_TYPE_MASK) 8009d60: 683b ldr r3, [r7, #0] 8009d62: 781b ldrb r3, [r3, #0] 8009d64: f003 0360 and.w r3, r3, #96 @ 0x60 8009d68: 2b40 cmp r3, #64 @ 0x40 8009d6a: d007 beq.n 8009d7c 8009d6c: 2b40 cmp r3, #64 @ 0x40 8009d6e: f200 8146 bhi.w 8009ffe 8009d72: 2b00 cmp r3, #0 8009d74: d00a beq.n 8009d8c 8009d76: 2b20 cmp r3, #32 8009d78: f040 8141 bne.w 8009ffe { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 8009d7c: 687b ldr r3, [r7, #4] 8009d7e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009d82: 689b ldr r3, [r3, #8] 8009d84: 6839 ldr r1, [r7, #0] 8009d86: 6878 ldr r0, [r7, #4] 8009d88: 4798 blx r3 break; 8009d8a: e13d b.n 800a008 case USB_REQ_TYPE_STANDARD: /* Check if it is a class request */ if ((req->bmRequest & 0x60U) == 0x20U) 8009d8c: 683b ldr r3, [r7, #0] 8009d8e: 781b ldrb r3, [r3, #0] 8009d90: f003 0360 and.w r3, r3, #96 @ 0x60 8009d94: 2b20 cmp r3, #32 8009d96: d10a bne.n 8009dae { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 8009d98: 687b ldr r3, [r7, #4] 8009d9a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009d9e: 689b ldr r3, [r3, #8] 8009da0: 6839 ldr r1, [r7, #0] 8009da2: 6878 ldr r0, [r7, #4] 8009da4: 4798 blx r3 8009da6: 4603 mov r3, r0 8009da8: 73fb strb r3, [r7, #15] return ret; 8009daa: 7bfb ldrb r3, [r7, #15] 8009dac: e12d b.n 800a00a } switch (req->bRequest) 8009dae: 683b ldr r3, [r7, #0] 8009db0: 785b ldrb r3, [r3, #1] 8009db2: 2b03 cmp r3, #3 8009db4: d007 beq.n 8009dc6 8009db6: 2b03 cmp r3, #3 8009db8: f300 811b bgt.w 8009ff2 8009dbc: 2b00 cmp r3, #0 8009dbe: d072 beq.n 8009ea6 8009dc0: 2b01 cmp r3, #1 8009dc2: d03a beq.n 8009e3a 8009dc4: e115 b.n 8009ff2 { case USB_REQ_SET_FEATURE: switch (pdev->dev_state) 8009dc6: 687b ldr r3, [r7, #4] 8009dc8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009dcc: 2b02 cmp r3, #2 8009dce: d002 beq.n 8009dd6 8009dd0: 2b03 cmp r3, #3 8009dd2: d015 beq.n 8009e00 8009dd4: e02b b.n 8009e2e { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 8009dd6: 7bbb ldrb r3, [r7, #14] 8009dd8: 2b00 cmp r3, #0 8009dda: d00c beq.n 8009df6 8009ddc: 7bbb ldrb r3, [r7, #14] 8009dde: 2b80 cmp r3, #128 @ 0x80 8009de0: d009 beq.n 8009df6 { USBD_LL_StallEP(pdev, ep_addr); 8009de2: 7bbb ldrb r3, [r7, #14] 8009de4: 4619 mov r1, r3 8009de6: 6878 ldr r0, [r7, #4] 8009de8: f001 f8fe bl 800afe8 USBD_LL_StallEP(pdev, 0x80U); 8009dec: 2180 movs r1, #128 @ 0x80 8009dee: 6878 ldr r0, [r7, #4] 8009df0: f001 f8fa bl 800afe8 } else { USBD_CtlError(pdev, req); } break; 8009df4: e020 b.n 8009e38 USBD_CtlError(pdev, req); 8009df6: 6839 ldr r1, [r7, #0] 8009df8: 6878 ldr r0, [r7, #4] 8009dfa: f000 fc1b bl 800a634 break; 8009dfe: e01b b.n 8009e38 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 8009e00: 683b ldr r3, [r7, #0] 8009e02: 885b ldrh r3, [r3, #2] 8009e04: 2b00 cmp r3, #0 8009e06: d10e bne.n 8009e26 { if ((ep_addr != 0x00U) && 8009e08: 7bbb ldrb r3, [r7, #14] 8009e0a: 2b00 cmp r3, #0 8009e0c: d00b beq.n 8009e26 8009e0e: 7bbb ldrb r3, [r7, #14] 8009e10: 2b80 cmp r3, #128 @ 0x80 8009e12: d008 beq.n 8009e26 (ep_addr != 0x80U) && (req->wLength == 0x00U)) 8009e14: 683b ldr r3, [r7, #0] 8009e16: 88db ldrh r3, [r3, #6] 8009e18: 2b00 cmp r3, #0 8009e1a: d104 bne.n 8009e26 { USBD_LL_StallEP(pdev, ep_addr); 8009e1c: 7bbb ldrb r3, [r7, #14] 8009e1e: 4619 mov r1, r3 8009e20: 6878 ldr r0, [r7, #4] 8009e22: f001 f8e1 bl 800afe8 } } USBD_CtlSendStatus(pdev); 8009e26: 6878 ldr r0, [r7, #4] 8009e28: f000 fccc bl 800a7c4 break; 8009e2c: e004 b.n 8009e38 default: USBD_CtlError(pdev, req); 8009e2e: 6839 ldr r1, [r7, #0] 8009e30: 6878 ldr r0, [r7, #4] 8009e32: f000 fbff bl 800a634 break; 8009e36: bf00 nop } break; 8009e38: e0e0 b.n 8009ffc case USB_REQ_CLEAR_FEATURE: switch (pdev->dev_state) 8009e3a: 687b ldr r3, [r7, #4] 8009e3c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009e40: 2b02 cmp r3, #2 8009e42: d002 beq.n 8009e4a 8009e44: 2b03 cmp r3, #3 8009e46: d015 beq.n 8009e74 8009e48: e026 b.n 8009e98 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 8009e4a: 7bbb ldrb r3, [r7, #14] 8009e4c: 2b00 cmp r3, #0 8009e4e: d00c beq.n 8009e6a 8009e50: 7bbb ldrb r3, [r7, #14] 8009e52: 2b80 cmp r3, #128 @ 0x80 8009e54: d009 beq.n 8009e6a { USBD_LL_StallEP(pdev, ep_addr); 8009e56: 7bbb ldrb r3, [r7, #14] 8009e58: 4619 mov r1, r3 8009e5a: 6878 ldr r0, [r7, #4] 8009e5c: f001 f8c4 bl 800afe8 USBD_LL_StallEP(pdev, 0x80U); 8009e60: 2180 movs r1, #128 @ 0x80 8009e62: 6878 ldr r0, [r7, #4] 8009e64: f001 f8c0 bl 800afe8 } else { USBD_CtlError(pdev, req); } break; 8009e68: e01c b.n 8009ea4 USBD_CtlError(pdev, req); 8009e6a: 6839 ldr r1, [r7, #0] 8009e6c: 6878 ldr r0, [r7, #4] 8009e6e: f000 fbe1 bl 800a634 break; 8009e72: e017 b.n 8009ea4 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 8009e74: 683b ldr r3, [r7, #0] 8009e76: 885b ldrh r3, [r3, #2] 8009e78: 2b00 cmp r3, #0 8009e7a: d112 bne.n 8009ea2 { if ((ep_addr & 0x7FU) != 0x00U) 8009e7c: 7bbb ldrb r3, [r7, #14] 8009e7e: f003 037f and.w r3, r3, #127 @ 0x7f 8009e82: 2b00 cmp r3, #0 8009e84: d004 beq.n 8009e90 { USBD_LL_ClearStallEP(pdev, ep_addr); 8009e86: 7bbb ldrb r3, [r7, #14] 8009e88: 4619 mov r1, r3 8009e8a: 6878 ldr r0, [r7, #4] 8009e8c: f001 f8cb bl 800b026 } USBD_CtlSendStatus(pdev); 8009e90: 6878 ldr r0, [r7, #4] 8009e92: f000 fc97 bl 800a7c4 } break; 8009e96: e004 b.n 8009ea2 default: USBD_CtlError(pdev, req); 8009e98: 6839 ldr r1, [r7, #0] 8009e9a: 6878 ldr r0, [r7, #4] 8009e9c: f000 fbca bl 800a634 break; 8009ea0: e000 b.n 8009ea4 break; 8009ea2: bf00 nop } break; 8009ea4: e0aa b.n 8009ffc case USB_REQ_GET_STATUS: switch (pdev->dev_state) 8009ea6: 687b ldr r3, [r7, #4] 8009ea8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009eac: 2b02 cmp r3, #2 8009eae: d002 beq.n 8009eb6 8009eb0: 2b03 cmp r3, #3 8009eb2: d032 beq.n 8009f1a 8009eb4: e097 b.n 8009fe6 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 8009eb6: 7bbb ldrb r3, [r7, #14] 8009eb8: 2b00 cmp r3, #0 8009eba: d007 beq.n 8009ecc 8009ebc: 7bbb ldrb r3, [r7, #14] 8009ebe: 2b80 cmp r3, #128 @ 0x80 8009ec0: d004 beq.n 8009ecc { USBD_CtlError(pdev, req); 8009ec2: 6839 ldr r1, [r7, #0] 8009ec4: 6878 ldr r0, [r7, #4] 8009ec6: f000 fbb5 bl 800a634 break; 8009eca: e091 b.n 8009ff0 } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 8009ecc: f997 300e ldrsb.w r3, [r7, #14] 8009ed0: 2b00 cmp r3, #0 8009ed2: da0b bge.n 8009eec 8009ed4: 7bbb ldrb r3, [r7, #14] 8009ed6: f003 027f and.w r2, r3, #127 @ 0x7f 8009eda: 4613 mov r3, r2 8009edc: 009b lsls r3, r3, #2 8009ede: 4413 add r3, r2 8009ee0: 009b lsls r3, r3, #2 8009ee2: 3310 adds r3, #16 8009ee4: 687a ldr r2, [r7, #4] 8009ee6: 4413 add r3, r2 8009ee8: 3304 adds r3, #4 8009eea: e00b b.n 8009f04 &pdev->ep_out[ep_addr & 0x7FU]; 8009eec: 7bbb ldrb r3, [r7, #14] 8009eee: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 8009ef2: 4613 mov r3, r2 8009ef4: 009b lsls r3, r3, #2 8009ef6: 4413 add r3, r2 8009ef8: 009b lsls r3, r3, #2 8009efa: f503 73a8 add.w r3, r3, #336 @ 0x150 8009efe: 687a ldr r2, [r7, #4] 8009f00: 4413 add r3, r2 8009f02: 3304 adds r3, #4 8009f04: 60bb str r3, [r7, #8] pep->status = 0x0000U; 8009f06: 68bb ldr r3, [r7, #8] 8009f08: 2200 movs r2, #0 8009f0a: 601a str r2, [r3, #0] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 8009f0c: 68bb ldr r3, [r7, #8] 8009f0e: 2202 movs r2, #2 8009f10: 4619 mov r1, r3 8009f12: 6878 ldr r0, [r7, #4] 8009f14: f000 fbf8 bl 800a708 break; 8009f18: e06a b.n 8009ff0 case USBD_STATE_CONFIGURED: if ((ep_addr & 0x80U) == 0x80U) 8009f1a: f997 300e ldrsb.w r3, [r7, #14] 8009f1e: 2b00 cmp r3, #0 8009f20: da11 bge.n 8009f46 { if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U) 8009f22: 7bbb ldrb r3, [r7, #14] 8009f24: f003 020f and.w r2, r3, #15 8009f28: 6879 ldr r1, [r7, #4] 8009f2a: 4613 mov r3, r2 8009f2c: 009b lsls r3, r3, #2 8009f2e: 4413 add r3, r2 8009f30: 009b lsls r3, r3, #2 8009f32: 440b add r3, r1 8009f34: 3318 adds r3, #24 8009f36: 681b ldr r3, [r3, #0] 8009f38: 2b00 cmp r3, #0 8009f3a: d117 bne.n 8009f6c { USBD_CtlError(pdev, req); 8009f3c: 6839 ldr r1, [r7, #0] 8009f3e: 6878 ldr r0, [r7, #4] 8009f40: f000 fb78 bl 800a634 break; 8009f44: e054 b.n 8009ff0 } } else { if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U) 8009f46: 7bbb ldrb r3, [r7, #14] 8009f48: f003 020f and.w r2, r3, #15 8009f4c: 6879 ldr r1, [r7, #4] 8009f4e: 4613 mov r3, r2 8009f50: 009b lsls r3, r3, #2 8009f52: 4413 add r3, r2 8009f54: 009b lsls r3, r3, #2 8009f56: 440b add r3, r1 8009f58: f503 73ac add.w r3, r3, #344 @ 0x158 8009f5c: 681b ldr r3, [r3, #0] 8009f5e: 2b00 cmp r3, #0 8009f60: d104 bne.n 8009f6c { USBD_CtlError(pdev, req); 8009f62: 6839 ldr r1, [r7, #0] 8009f64: 6878 ldr r0, [r7, #4] 8009f66: f000 fb65 bl 800a634 break; 8009f6a: e041 b.n 8009ff0 } } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 8009f6c: f997 300e ldrsb.w r3, [r7, #14] 8009f70: 2b00 cmp r3, #0 8009f72: da0b bge.n 8009f8c 8009f74: 7bbb ldrb r3, [r7, #14] 8009f76: f003 027f and.w r2, r3, #127 @ 0x7f 8009f7a: 4613 mov r3, r2 8009f7c: 009b lsls r3, r3, #2 8009f7e: 4413 add r3, r2 8009f80: 009b lsls r3, r3, #2 8009f82: 3310 adds r3, #16 8009f84: 687a ldr r2, [r7, #4] 8009f86: 4413 add r3, r2 8009f88: 3304 adds r3, #4 8009f8a: e00b b.n 8009fa4 &pdev->ep_out[ep_addr & 0x7FU]; 8009f8c: 7bbb ldrb r3, [r7, #14] 8009f8e: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 8009f92: 4613 mov r3, r2 8009f94: 009b lsls r3, r3, #2 8009f96: 4413 add r3, r2 8009f98: 009b lsls r3, r3, #2 8009f9a: f503 73a8 add.w r3, r3, #336 @ 0x150 8009f9e: 687a ldr r2, [r7, #4] 8009fa0: 4413 add r3, r2 8009fa2: 3304 adds r3, #4 8009fa4: 60bb str r3, [r7, #8] if ((ep_addr == 0x00U) || (ep_addr == 0x80U)) 8009fa6: 7bbb ldrb r3, [r7, #14] 8009fa8: 2b00 cmp r3, #0 8009faa: d002 beq.n 8009fb2 8009fac: 7bbb ldrb r3, [r7, #14] 8009fae: 2b80 cmp r3, #128 @ 0x80 8009fb0: d103 bne.n 8009fba { pep->status = 0x0000U; 8009fb2: 68bb ldr r3, [r7, #8] 8009fb4: 2200 movs r2, #0 8009fb6: 601a str r2, [r3, #0] 8009fb8: e00e b.n 8009fd8 } else if (USBD_LL_IsStallEP(pdev, ep_addr)) 8009fba: 7bbb ldrb r3, [r7, #14] 8009fbc: 4619 mov r1, r3 8009fbe: 6878 ldr r0, [r7, #4] 8009fc0: f001 f850 bl 800b064 8009fc4: 4603 mov r3, r0 8009fc6: 2b00 cmp r3, #0 8009fc8: d003 beq.n 8009fd2 { pep->status = 0x0001U; 8009fca: 68bb ldr r3, [r7, #8] 8009fcc: 2201 movs r2, #1 8009fce: 601a str r2, [r3, #0] 8009fd0: e002 b.n 8009fd8 } else { pep->status = 0x0000U; 8009fd2: 68bb ldr r3, [r7, #8] 8009fd4: 2200 movs r2, #0 8009fd6: 601a str r2, [r3, #0] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 8009fd8: 68bb ldr r3, [r7, #8] 8009fda: 2202 movs r2, #2 8009fdc: 4619 mov r1, r3 8009fde: 6878 ldr r0, [r7, #4] 8009fe0: f000 fb92 bl 800a708 break; 8009fe4: e004 b.n 8009ff0 default: USBD_CtlError(pdev, req); 8009fe6: 6839 ldr r1, [r7, #0] 8009fe8: 6878 ldr r0, [r7, #4] 8009fea: f000 fb23 bl 800a634 break; 8009fee: bf00 nop } break; 8009ff0: e004 b.n 8009ffc default: USBD_CtlError(pdev, req); 8009ff2: 6839 ldr r1, [r7, #0] 8009ff4: 6878 ldr r0, [r7, #4] 8009ff6: f000 fb1d bl 800a634 break; 8009ffa: bf00 nop } break; 8009ffc: e004 b.n 800a008 default: USBD_CtlError(pdev, req); 8009ffe: 6839 ldr r1, [r7, #0] 800a000: 6878 ldr r0, [r7, #4] 800a002: f000 fb17 bl 800a634 break; 800a006: bf00 nop } return ret; 800a008: 7bfb ldrb r3, [r7, #15] } 800a00a: 4618 mov r0, r3 800a00c: 3710 adds r7, #16 800a00e: 46bd mov sp, r7 800a010: bd80 pop {r7, pc} ... 0800a014 : * @param req: usb request * @retval status */ static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a014: b580 push {r7, lr} 800a016: b084 sub sp, #16 800a018: af00 add r7, sp, #0 800a01a: 6078 str r0, [r7, #4] 800a01c: 6039 str r1, [r7, #0] uint16_t len = 0U; 800a01e: 2300 movs r3, #0 800a020: 813b strh r3, [r7, #8] uint8_t *pbuf = NULL; 800a022: 2300 movs r3, #0 800a024: 60fb str r3, [r7, #12] uint8_t err = 0U; 800a026: 2300 movs r3, #0 800a028: 72fb strb r3, [r7, #11] switch (req->wValue >> 8) 800a02a: 683b ldr r3, [r7, #0] 800a02c: 885b ldrh r3, [r3, #2] 800a02e: 0a1b lsrs r3, r3, #8 800a030: b29b uxth r3, r3 800a032: 3b01 subs r3, #1 800a034: 2b06 cmp r3, #6 800a036: f200 8128 bhi.w 800a28a 800a03a: a201 add r2, pc, #4 @ (adr r2, 800a040 ) 800a03c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a040: 0800a05d .word 0x0800a05d 800a044: 0800a075 .word 0x0800a075 800a048: 0800a0b5 .word 0x0800a0b5 800a04c: 0800a28b .word 0x0800a28b 800a050: 0800a28b .word 0x0800a28b 800a054: 0800a22b .word 0x0800a22b 800a058: 0800a257 .word 0x0800a257 err++; } break; #endif case USB_DESC_TYPE_DEVICE: pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); 800a05c: 687b ldr r3, [r7, #4] 800a05e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a062: 681b ldr r3, [r3, #0] 800a064: 687a ldr r2, [r7, #4] 800a066: 7c12 ldrb r2, [r2, #16] 800a068: f107 0108 add.w r1, r7, #8 800a06c: 4610 mov r0, r2 800a06e: 4798 blx r3 800a070: 60f8 str r0, [r7, #12] break; 800a072: e112 b.n 800a29a case USB_DESC_TYPE_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800a074: 687b ldr r3, [r7, #4] 800a076: 7c1b ldrb r3, [r3, #16] 800a078: 2b00 cmp r3, #0 800a07a: d10d bne.n 800a098 { pbuf = pdev->pClass->GetHSConfigDescriptor(&len); 800a07c: 687b ldr r3, [r7, #4] 800a07e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a082: 6a9b ldr r3, [r3, #40] @ 0x28 800a084: f107 0208 add.w r2, r7, #8 800a088: 4610 mov r0, r2 800a08a: 4798 blx r3 800a08c: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800a08e: 68fb ldr r3, [r7, #12] 800a090: 3301 adds r3, #1 800a092: 2202 movs r2, #2 800a094: 701a strb r2, [r3, #0] else { pbuf = pdev->pClass->GetFSConfigDescriptor(&len); pbuf[1] = USB_DESC_TYPE_CONFIGURATION; } break; 800a096: e100 b.n 800a29a pbuf = pdev->pClass->GetFSConfigDescriptor(&len); 800a098: 687b ldr r3, [r7, #4] 800a09a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a09e: 6adb ldr r3, [r3, #44] @ 0x2c 800a0a0: f107 0208 add.w r2, r7, #8 800a0a4: 4610 mov r0, r2 800a0a6: 4798 blx r3 800a0a8: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800a0aa: 68fb ldr r3, [r7, #12] 800a0ac: 3301 adds r3, #1 800a0ae: 2202 movs r2, #2 800a0b0: 701a strb r2, [r3, #0] break; 800a0b2: e0f2 b.n 800a29a case USB_DESC_TYPE_STRING: switch ((uint8_t)(req->wValue)) 800a0b4: 683b ldr r3, [r7, #0] 800a0b6: 885b ldrh r3, [r3, #2] 800a0b8: b2db uxtb r3, r3 800a0ba: 2b05 cmp r3, #5 800a0bc: f200 80ac bhi.w 800a218 800a0c0: a201 add r2, pc, #4 @ (adr r2, 800a0c8 ) 800a0c2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a0c6: bf00 nop 800a0c8: 0800a0e1 .word 0x0800a0e1 800a0cc: 0800a115 .word 0x0800a115 800a0d0: 0800a149 .word 0x0800a149 800a0d4: 0800a17d .word 0x0800a17d 800a0d8: 0800a1b1 .word 0x0800a1b1 800a0dc: 0800a1e5 .word 0x0800a1e5 { case USBD_IDX_LANGID_STR: if (pdev->pDesc->GetLangIDStrDescriptor != NULL) 800a0e0: 687b ldr r3, [r7, #4] 800a0e2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a0e6: 685b ldr r3, [r3, #4] 800a0e8: 2b00 cmp r3, #0 800a0ea: d00b beq.n 800a104 { pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); 800a0ec: 687b ldr r3, [r7, #4] 800a0ee: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a0f2: 685b ldr r3, [r3, #4] 800a0f4: 687a ldr r2, [r7, #4] 800a0f6: 7c12 ldrb r2, [r2, #16] 800a0f8: f107 0108 add.w r1, r7, #8 800a0fc: 4610 mov r0, r2 800a0fe: 4798 blx r3 800a100: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a102: e091 b.n 800a228 USBD_CtlError(pdev, req); 800a104: 6839 ldr r1, [r7, #0] 800a106: 6878 ldr r0, [r7, #4] 800a108: f000 fa94 bl 800a634 err++; 800a10c: 7afb ldrb r3, [r7, #11] 800a10e: 3301 adds r3, #1 800a110: 72fb strb r3, [r7, #11] break; 800a112: e089 b.n 800a228 case USBD_IDX_MFC_STR: if (pdev->pDesc->GetManufacturerStrDescriptor != NULL) 800a114: 687b ldr r3, [r7, #4] 800a116: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a11a: 689b ldr r3, [r3, #8] 800a11c: 2b00 cmp r3, #0 800a11e: d00b beq.n 800a138 { pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); 800a120: 687b ldr r3, [r7, #4] 800a122: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a126: 689b ldr r3, [r3, #8] 800a128: 687a ldr r2, [r7, #4] 800a12a: 7c12 ldrb r2, [r2, #16] 800a12c: f107 0108 add.w r1, r7, #8 800a130: 4610 mov r0, r2 800a132: 4798 blx r3 800a134: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a136: e077 b.n 800a228 USBD_CtlError(pdev, req); 800a138: 6839 ldr r1, [r7, #0] 800a13a: 6878 ldr r0, [r7, #4] 800a13c: f000 fa7a bl 800a634 err++; 800a140: 7afb ldrb r3, [r7, #11] 800a142: 3301 adds r3, #1 800a144: 72fb strb r3, [r7, #11] break; 800a146: e06f b.n 800a228 case USBD_IDX_PRODUCT_STR: if (pdev->pDesc->GetProductStrDescriptor != NULL) 800a148: 687b ldr r3, [r7, #4] 800a14a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a14e: 68db ldr r3, [r3, #12] 800a150: 2b00 cmp r3, #0 800a152: d00b beq.n 800a16c { pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); 800a154: 687b ldr r3, [r7, #4] 800a156: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a15a: 68db ldr r3, [r3, #12] 800a15c: 687a ldr r2, [r7, #4] 800a15e: 7c12 ldrb r2, [r2, #16] 800a160: f107 0108 add.w r1, r7, #8 800a164: 4610 mov r0, r2 800a166: 4798 blx r3 800a168: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a16a: e05d b.n 800a228 USBD_CtlError(pdev, req); 800a16c: 6839 ldr r1, [r7, #0] 800a16e: 6878 ldr r0, [r7, #4] 800a170: f000 fa60 bl 800a634 err++; 800a174: 7afb ldrb r3, [r7, #11] 800a176: 3301 adds r3, #1 800a178: 72fb strb r3, [r7, #11] break; 800a17a: e055 b.n 800a228 case USBD_IDX_SERIAL_STR: if (pdev->pDesc->GetSerialStrDescriptor != NULL) 800a17c: 687b ldr r3, [r7, #4] 800a17e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a182: 691b ldr r3, [r3, #16] 800a184: 2b00 cmp r3, #0 800a186: d00b beq.n 800a1a0 { pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); 800a188: 687b ldr r3, [r7, #4] 800a18a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a18e: 691b ldr r3, [r3, #16] 800a190: 687a ldr r2, [r7, #4] 800a192: 7c12 ldrb r2, [r2, #16] 800a194: f107 0108 add.w r1, r7, #8 800a198: 4610 mov r0, r2 800a19a: 4798 blx r3 800a19c: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a19e: e043 b.n 800a228 USBD_CtlError(pdev, req); 800a1a0: 6839 ldr r1, [r7, #0] 800a1a2: 6878 ldr r0, [r7, #4] 800a1a4: f000 fa46 bl 800a634 err++; 800a1a8: 7afb ldrb r3, [r7, #11] 800a1aa: 3301 adds r3, #1 800a1ac: 72fb strb r3, [r7, #11] break; 800a1ae: e03b b.n 800a228 case USBD_IDX_CONFIG_STR: if (pdev->pDesc->GetConfigurationStrDescriptor != NULL) 800a1b0: 687b ldr r3, [r7, #4] 800a1b2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a1b6: 695b ldr r3, [r3, #20] 800a1b8: 2b00 cmp r3, #0 800a1ba: d00b beq.n 800a1d4 { pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); 800a1bc: 687b ldr r3, [r7, #4] 800a1be: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a1c2: 695b ldr r3, [r3, #20] 800a1c4: 687a ldr r2, [r7, #4] 800a1c6: 7c12 ldrb r2, [r2, #16] 800a1c8: f107 0108 add.w r1, r7, #8 800a1cc: 4610 mov r0, r2 800a1ce: 4798 blx r3 800a1d0: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a1d2: e029 b.n 800a228 USBD_CtlError(pdev, req); 800a1d4: 6839 ldr r1, [r7, #0] 800a1d6: 6878 ldr r0, [r7, #4] 800a1d8: f000 fa2c bl 800a634 err++; 800a1dc: 7afb ldrb r3, [r7, #11] 800a1de: 3301 adds r3, #1 800a1e0: 72fb strb r3, [r7, #11] break; 800a1e2: e021 b.n 800a228 case USBD_IDX_INTERFACE_STR: if (pdev->pDesc->GetInterfaceStrDescriptor != NULL) 800a1e4: 687b ldr r3, [r7, #4] 800a1e6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a1ea: 699b ldr r3, [r3, #24] 800a1ec: 2b00 cmp r3, #0 800a1ee: d00b beq.n 800a208 { pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); 800a1f0: 687b ldr r3, [r7, #4] 800a1f2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a1f6: 699b ldr r3, [r3, #24] 800a1f8: 687a ldr r2, [r7, #4] 800a1fa: 7c12 ldrb r2, [r2, #16] 800a1fc: f107 0108 add.w r1, r7, #8 800a200: 4610 mov r0, r2 800a202: 4798 blx r3 800a204: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a206: e00f b.n 800a228 USBD_CtlError(pdev, req); 800a208: 6839 ldr r1, [r7, #0] 800a20a: 6878 ldr r0, [r7, #4] 800a20c: f000 fa12 bl 800a634 err++; 800a210: 7afb ldrb r3, [r7, #11] 800a212: 3301 adds r3, #1 800a214: 72fb strb r3, [r7, #11] break; 800a216: e007 b.n 800a228 USBD_CtlError(pdev, req); err++; } break; #else USBD_CtlError(pdev, req); 800a218: 6839 ldr r1, [r7, #0] 800a21a: 6878 ldr r0, [r7, #4] 800a21c: f000 fa0a bl 800a634 err++; 800a220: 7afb ldrb r3, [r7, #11] 800a222: 3301 adds r3, #1 800a224: 72fb strb r3, [r7, #11] #endif } break; 800a226: e038 b.n 800a29a 800a228: e037 b.n 800a29a case USB_DESC_TYPE_DEVICE_QUALIFIER: if (pdev->dev_speed == USBD_SPEED_HIGH) 800a22a: 687b ldr r3, [r7, #4] 800a22c: 7c1b ldrb r3, [r3, #16] 800a22e: 2b00 cmp r3, #0 800a230: d109 bne.n 800a246 { pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len); 800a232: 687b ldr r3, [r7, #4] 800a234: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a238: 6b5b ldr r3, [r3, #52] @ 0x34 800a23a: f107 0208 add.w r2, r7, #8 800a23e: 4610 mov r0, r2 800a240: 4798 blx r3 800a242: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a244: e029 b.n 800a29a USBD_CtlError(pdev, req); 800a246: 6839 ldr r1, [r7, #0] 800a248: 6878 ldr r0, [r7, #4] 800a24a: f000 f9f3 bl 800a634 err++; 800a24e: 7afb ldrb r3, [r7, #11] 800a250: 3301 adds r3, #1 800a252: 72fb strb r3, [r7, #11] break; 800a254: e021 b.n 800a29a case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800a256: 687b ldr r3, [r7, #4] 800a258: 7c1b ldrb r3, [r3, #16] 800a25a: 2b00 cmp r3, #0 800a25c: d10d bne.n 800a27a { pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len); 800a25e: 687b ldr r3, [r7, #4] 800a260: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a264: 6b1b ldr r3, [r3, #48] @ 0x30 800a266: f107 0208 add.w r2, r7, #8 800a26a: 4610 mov r0, r2 800a26c: 4798 blx r3 800a26e: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; 800a270: 68fb ldr r3, [r7, #12] 800a272: 3301 adds r3, #1 800a274: 2207 movs r2, #7 800a276: 701a strb r2, [r3, #0] else { USBD_CtlError(pdev, req); err++; } break; 800a278: e00f b.n 800a29a USBD_CtlError(pdev, req); 800a27a: 6839 ldr r1, [r7, #0] 800a27c: 6878 ldr r0, [r7, #4] 800a27e: f000 f9d9 bl 800a634 err++; 800a282: 7afb ldrb r3, [r7, #11] 800a284: 3301 adds r3, #1 800a286: 72fb strb r3, [r7, #11] break; 800a288: e007 b.n 800a29a default: USBD_CtlError(pdev, req); 800a28a: 6839 ldr r1, [r7, #0] 800a28c: 6878 ldr r0, [r7, #4] 800a28e: f000 f9d1 bl 800a634 err++; 800a292: 7afb ldrb r3, [r7, #11] 800a294: 3301 adds r3, #1 800a296: 72fb strb r3, [r7, #11] break; 800a298: bf00 nop } if (err != 0U) 800a29a: 7afb ldrb r3, [r7, #11] 800a29c: 2b00 cmp r3, #0 800a29e: d11c bne.n 800a2da { return; } else { if ((len != 0U) && (req->wLength != 0U)) 800a2a0: 893b ldrh r3, [r7, #8] 800a2a2: 2b00 cmp r3, #0 800a2a4: d011 beq.n 800a2ca 800a2a6: 683b ldr r3, [r7, #0] 800a2a8: 88db ldrh r3, [r3, #6] 800a2aa: 2b00 cmp r3, #0 800a2ac: d00d beq.n 800a2ca { len = MIN(len, req->wLength); 800a2ae: 683b ldr r3, [r7, #0] 800a2b0: 88da ldrh r2, [r3, #6] 800a2b2: 893b ldrh r3, [r7, #8] 800a2b4: 4293 cmp r3, r2 800a2b6: bf28 it cs 800a2b8: 4613 movcs r3, r2 800a2ba: b29b uxth r3, r3 800a2bc: 813b strh r3, [r7, #8] (void)USBD_CtlSendData(pdev, pbuf, len); 800a2be: 893b ldrh r3, [r7, #8] 800a2c0: 461a mov r2, r3 800a2c2: 68f9 ldr r1, [r7, #12] 800a2c4: 6878 ldr r0, [r7, #4] 800a2c6: f000 fa1f bl 800a708 } if (req->wLength == 0U) 800a2ca: 683b ldr r3, [r7, #0] 800a2cc: 88db ldrh r3, [r3, #6] 800a2ce: 2b00 cmp r3, #0 800a2d0: d104 bne.n 800a2dc { (void)USBD_CtlSendStatus(pdev); 800a2d2: 6878 ldr r0, [r7, #4] 800a2d4: f000 fa76 bl 800a7c4 800a2d8: e000 b.n 800a2dc return; 800a2da: bf00 nop } } } 800a2dc: 3710 adds r7, #16 800a2de: 46bd mov sp, r7 800a2e0: bd80 pop {r7, pc} 800a2e2: bf00 nop 0800a2e4 : * @param req: usb request * @retval status */ static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a2e4: b580 push {r7, lr} 800a2e6: b084 sub sp, #16 800a2e8: af00 add r7, sp, #0 800a2ea: 6078 str r0, [r7, #4] 800a2ec: 6039 str r1, [r7, #0] uint8_t dev_addr; if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U)) 800a2ee: 683b ldr r3, [r7, #0] 800a2f0: 889b ldrh r3, [r3, #4] 800a2f2: 2b00 cmp r3, #0 800a2f4: d130 bne.n 800a358 800a2f6: 683b ldr r3, [r7, #0] 800a2f8: 88db ldrh r3, [r3, #6] 800a2fa: 2b00 cmp r3, #0 800a2fc: d12c bne.n 800a358 800a2fe: 683b ldr r3, [r7, #0] 800a300: 885b ldrh r3, [r3, #2] 800a302: 2b7f cmp r3, #127 @ 0x7f 800a304: d828 bhi.n 800a358 { dev_addr = (uint8_t)(req->wValue) & 0x7FU; 800a306: 683b ldr r3, [r7, #0] 800a308: 885b ldrh r3, [r3, #2] 800a30a: b2db uxtb r3, r3 800a30c: f003 037f and.w r3, r3, #127 @ 0x7f 800a310: 73fb strb r3, [r7, #15] if (pdev->dev_state == USBD_STATE_CONFIGURED) 800a312: 687b ldr r3, [r7, #4] 800a314: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a318: 2b03 cmp r3, #3 800a31a: d104 bne.n 800a326 { USBD_CtlError(pdev, req); 800a31c: 6839 ldr r1, [r7, #0] 800a31e: 6878 ldr r0, [r7, #4] 800a320: f000 f988 bl 800a634 if (pdev->dev_state == USBD_STATE_CONFIGURED) 800a324: e01d b.n 800a362 } else { pdev->dev_address = dev_addr; 800a326: 687b ldr r3, [r7, #4] 800a328: 7bfa ldrb r2, [r7, #15] 800a32a: f883 229e strb.w r2, [r3, #670] @ 0x29e USBD_LL_SetUSBAddress(pdev, dev_addr); 800a32e: 7bfb ldrb r3, [r7, #15] 800a330: 4619 mov r1, r3 800a332: 6878 ldr r0, [r7, #4] 800a334: f000 fec1 bl 800b0ba USBD_CtlSendStatus(pdev); 800a338: 6878 ldr r0, [r7, #4] 800a33a: f000 fa43 bl 800a7c4 if (dev_addr != 0U) 800a33e: 7bfb ldrb r3, [r7, #15] 800a340: 2b00 cmp r3, #0 800a342: d004 beq.n 800a34e { pdev->dev_state = USBD_STATE_ADDRESSED; 800a344: 687b ldr r3, [r7, #4] 800a346: 2202 movs r2, #2 800a348: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800a34c: e009 b.n 800a362 } else { pdev->dev_state = USBD_STATE_DEFAULT; 800a34e: 687b ldr r3, [r7, #4] 800a350: 2201 movs r2, #1 800a352: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800a356: e004 b.n 800a362 } } } else { USBD_CtlError(pdev, req); 800a358: 6839 ldr r1, [r7, #0] 800a35a: 6878 ldr r0, [r7, #4] 800a35c: f000 f96a bl 800a634 } } 800a360: bf00 nop 800a362: bf00 nop 800a364: 3710 adds r7, #16 800a366: 46bd mov sp, r7 800a368: bd80 pop {r7, pc} ... 0800a36c : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a36c: b580 push {r7, lr} 800a36e: b082 sub sp, #8 800a370: af00 add r7, sp, #0 800a372: 6078 str r0, [r7, #4] 800a374: 6039 str r1, [r7, #0] static uint8_t cfgidx; cfgidx = (uint8_t)(req->wValue); 800a376: 683b ldr r3, [r7, #0] 800a378: 885b ldrh r3, [r3, #2] 800a37a: b2da uxtb r2, r3 800a37c: 4b41 ldr r3, [pc, #260] @ (800a484 ) 800a37e: 701a strb r2, [r3, #0] if (cfgidx > USBD_MAX_NUM_CONFIGURATION) 800a380: 4b40 ldr r3, [pc, #256] @ (800a484 ) 800a382: 781b ldrb r3, [r3, #0] 800a384: 2b01 cmp r3, #1 800a386: d904 bls.n 800a392 { USBD_CtlError(pdev, req); 800a388: 6839 ldr r1, [r7, #0] 800a38a: 6878 ldr r0, [r7, #4] 800a38c: f000 f952 bl 800a634 800a390: e075 b.n 800a47e } else { switch (pdev->dev_state) 800a392: 687b ldr r3, [r7, #4] 800a394: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a398: 2b02 cmp r3, #2 800a39a: d002 beq.n 800a3a2 800a39c: 2b03 cmp r3, #3 800a39e: d023 beq.n 800a3e8 800a3a0: e062 b.n 800a468 { case USBD_STATE_ADDRESSED: if (cfgidx) 800a3a2: 4b38 ldr r3, [pc, #224] @ (800a484 ) 800a3a4: 781b ldrb r3, [r3, #0] 800a3a6: 2b00 cmp r3, #0 800a3a8: d01a beq.n 800a3e0 { pdev->dev_config = cfgidx; 800a3aa: 4b36 ldr r3, [pc, #216] @ (800a484 ) 800a3ac: 781b ldrb r3, [r3, #0] 800a3ae: 461a mov r2, r3 800a3b0: 687b ldr r3, [r7, #4] 800a3b2: 605a str r2, [r3, #4] pdev->dev_state = USBD_STATE_CONFIGURED; 800a3b4: 687b ldr r3, [r7, #4] 800a3b6: 2203 movs r2, #3 800a3b8: f883 229c strb.w r2, [r3, #668] @ 0x29c if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800a3bc: 4b31 ldr r3, [pc, #196] @ (800a484 ) 800a3be: 781b ldrb r3, [r3, #0] 800a3c0: 4619 mov r1, r3 800a3c2: 6878 ldr r0, [r7, #4] 800a3c4: f7ff f9e7 bl 8009796 800a3c8: 4603 mov r3, r0 800a3ca: 2b02 cmp r3, #2 800a3cc: d104 bne.n 800a3d8 { USBD_CtlError(pdev, req); 800a3ce: 6839 ldr r1, [r7, #0] 800a3d0: 6878 ldr r0, [r7, #4] 800a3d2: f000 f92f bl 800a634 return; 800a3d6: e052 b.n 800a47e } USBD_CtlSendStatus(pdev); 800a3d8: 6878 ldr r0, [r7, #4] 800a3da: f000 f9f3 bl 800a7c4 } else { USBD_CtlSendStatus(pdev); } break; 800a3de: e04e b.n 800a47e USBD_CtlSendStatus(pdev); 800a3e0: 6878 ldr r0, [r7, #4] 800a3e2: f000 f9ef bl 800a7c4 break; 800a3e6: e04a b.n 800a47e case USBD_STATE_CONFIGURED: if (cfgidx == 0U) 800a3e8: 4b26 ldr r3, [pc, #152] @ (800a484 ) 800a3ea: 781b ldrb r3, [r3, #0] 800a3ec: 2b00 cmp r3, #0 800a3ee: d112 bne.n 800a416 { pdev->dev_state = USBD_STATE_ADDRESSED; 800a3f0: 687b ldr r3, [r7, #4] 800a3f2: 2202 movs r2, #2 800a3f4: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->dev_config = cfgidx; 800a3f8: 4b22 ldr r3, [pc, #136] @ (800a484 ) 800a3fa: 781b ldrb r3, [r3, #0] 800a3fc: 461a mov r2, r3 800a3fe: 687b ldr r3, [r7, #4] 800a400: 605a str r2, [r3, #4] USBD_ClrClassConfig(pdev, cfgidx); 800a402: 4b20 ldr r3, [pc, #128] @ (800a484 ) 800a404: 781b ldrb r3, [r3, #0] 800a406: 4619 mov r1, r3 800a408: 6878 ldr r0, [r7, #4] 800a40a: f7ff f9e3 bl 80097d4 USBD_CtlSendStatus(pdev); 800a40e: 6878 ldr r0, [r7, #4] 800a410: f000 f9d8 bl 800a7c4 } else { USBD_CtlSendStatus(pdev); } break; 800a414: e033 b.n 800a47e else if (cfgidx != pdev->dev_config) 800a416: 4b1b ldr r3, [pc, #108] @ (800a484 ) 800a418: 781b ldrb r3, [r3, #0] 800a41a: 461a mov r2, r3 800a41c: 687b ldr r3, [r7, #4] 800a41e: 685b ldr r3, [r3, #4] 800a420: 429a cmp r2, r3 800a422: d01d beq.n 800a460 USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 800a424: 687b ldr r3, [r7, #4] 800a426: 685b ldr r3, [r3, #4] 800a428: b2db uxtb r3, r3 800a42a: 4619 mov r1, r3 800a42c: 6878 ldr r0, [r7, #4] 800a42e: f7ff f9d1 bl 80097d4 pdev->dev_config = cfgidx; 800a432: 4b14 ldr r3, [pc, #80] @ (800a484 ) 800a434: 781b ldrb r3, [r3, #0] 800a436: 461a mov r2, r3 800a438: 687b ldr r3, [r7, #4] 800a43a: 605a str r2, [r3, #4] if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800a43c: 4b11 ldr r3, [pc, #68] @ (800a484 ) 800a43e: 781b ldrb r3, [r3, #0] 800a440: 4619 mov r1, r3 800a442: 6878 ldr r0, [r7, #4] 800a444: f7ff f9a7 bl 8009796 800a448: 4603 mov r3, r0 800a44a: 2b02 cmp r3, #2 800a44c: d104 bne.n 800a458 USBD_CtlError(pdev, req); 800a44e: 6839 ldr r1, [r7, #0] 800a450: 6878 ldr r0, [r7, #4] 800a452: f000 f8ef bl 800a634 return; 800a456: e012 b.n 800a47e USBD_CtlSendStatus(pdev); 800a458: 6878 ldr r0, [r7, #4] 800a45a: f000 f9b3 bl 800a7c4 break; 800a45e: e00e b.n 800a47e USBD_CtlSendStatus(pdev); 800a460: 6878 ldr r0, [r7, #4] 800a462: f000 f9af bl 800a7c4 break; 800a466: e00a b.n 800a47e default: USBD_CtlError(pdev, req); 800a468: 6839 ldr r1, [r7, #0] 800a46a: 6878 ldr r0, [r7, #4] 800a46c: f000 f8e2 bl 800a634 USBD_ClrClassConfig(pdev, cfgidx); 800a470: 4b04 ldr r3, [pc, #16] @ (800a484 ) 800a472: 781b ldrb r3, [r3, #0] 800a474: 4619 mov r1, r3 800a476: 6878 ldr r0, [r7, #4] 800a478: f7ff f9ac bl 80097d4 break; 800a47c: bf00 nop } } } 800a47e: 3708 adds r7, #8 800a480: 46bd mov sp, r7 800a482: bd80 pop {r7, pc} 800a484: 20000410 .word 0x20000410 0800a488 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a488: b580 push {r7, lr} 800a48a: b082 sub sp, #8 800a48c: af00 add r7, sp, #0 800a48e: 6078 str r0, [r7, #4] 800a490: 6039 str r1, [r7, #0] if (req->wLength != 1U) 800a492: 683b ldr r3, [r7, #0] 800a494: 88db ldrh r3, [r3, #6] 800a496: 2b01 cmp r3, #1 800a498: d004 beq.n 800a4a4 { USBD_CtlError(pdev, req); 800a49a: 6839 ldr r1, [r7, #0] 800a49c: 6878 ldr r0, [r7, #4] 800a49e: f000 f8c9 bl 800a634 default: USBD_CtlError(pdev, req); break; } } } 800a4a2: e022 b.n 800a4ea switch (pdev->dev_state) 800a4a4: 687b ldr r3, [r7, #4] 800a4a6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a4aa: 2b02 cmp r3, #2 800a4ac: dc02 bgt.n 800a4b4 800a4ae: 2b00 cmp r3, #0 800a4b0: dc03 bgt.n 800a4ba 800a4b2: e015 b.n 800a4e0 800a4b4: 2b03 cmp r3, #3 800a4b6: d00b beq.n 800a4d0 800a4b8: e012 b.n 800a4e0 pdev->dev_default_config = 0U; 800a4ba: 687b ldr r3, [r7, #4] 800a4bc: 2200 movs r2, #0 800a4be: 609a str r2, [r3, #8] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U); 800a4c0: 687b ldr r3, [r7, #4] 800a4c2: 3308 adds r3, #8 800a4c4: 2201 movs r2, #1 800a4c6: 4619 mov r1, r3 800a4c8: 6878 ldr r0, [r7, #4] 800a4ca: f000 f91d bl 800a708 break; 800a4ce: e00c b.n 800a4ea USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U); 800a4d0: 687b ldr r3, [r7, #4] 800a4d2: 3304 adds r3, #4 800a4d4: 2201 movs r2, #1 800a4d6: 4619 mov r1, r3 800a4d8: 6878 ldr r0, [r7, #4] 800a4da: f000 f915 bl 800a708 break; 800a4de: e004 b.n 800a4ea USBD_CtlError(pdev, req); 800a4e0: 6839 ldr r1, [r7, #0] 800a4e2: 6878 ldr r0, [r7, #4] 800a4e4: f000 f8a6 bl 800a634 break; 800a4e8: bf00 nop } 800a4ea: bf00 nop 800a4ec: 3708 adds r7, #8 800a4ee: 46bd mov sp, r7 800a4f0: bd80 pop {r7, pc} 0800a4f2 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a4f2: b580 push {r7, lr} 800a4f4: b082 sub sp, #8 800a4f6: af00 add r7, sp, #0 800a4f8: 6078 str r0, [r7, #4] 800a4fa: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800a4fc: 687b ldr r3, [r7, #4] 800a4fe: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a502: 3b01 subs r3, #1 800a504: 2b02 cmp r3, #2 800a506: d81e bhi.n 800a546 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wLength != 0x2U) 800a508: 683b ldr r3, [r7, #0] 800a50a: 88db ldrh r3, [r3, #6] 800a50c: 2b02 cmp r3, #2 800a50e: d004 beq.n 800a51a { USBD_CtlError(pdev, req); 800a510: 6839 ldr r1, [r7, #0] 800a512: 6878 ldr r0, [r7, #4] 800a514: f000 f88e bl 800a634 break; 800a518: e01a b.n 800a550 } #if (USBD_SELF_POWERED == 1U) pdev->dev_config_status = USB_CONFIG_SELF_POWERED; 800a51a: 687b ldr r3, [r7, #4] 800a51c: 2201 movs r2, #1 800a51e: 60da str r2, [r3, #12] #else pdev->dev_config_status = 0U; #endif if (pdev->dev_remote_wakeup) 800a520: 687b ldr r3, [r7, #4] 800a522: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4 800a526: 2b00 cmp r3, #0 800a528: d005 beq.n 800a536 { pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; 800a52a: 687b ldr r3, [r7, #4] 800a52c: 68db ldr r3, [r3, #12] 800a52e: f043 0202 orr.w r2, r3, #2 800a532: 687b ldr r3, [r7, #4] 800a534: 60da str r2, [r3, #12] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U); 800a536: 687b ldr r3, [r7, #4] 800a538: 330c adds r3, #12 800a53a: 2202 movs r2, #2 800a53c: 4619 mov r1, r3 800a53e: 6878 ldr r0, [r7, #4] 800a540: f000 f8e2 bl 800a708 break; 800a544: e004 b.n 800a550 default: USBD_CtlError(pdev, req); 800a546: 6839 ldr r1, [r7, #0] 800a548: 6878 ldr r0, [r7, #4] 800a54a: f000 f873 bl 800a634 break; 800a54e: bf00 nop } } 800a550: bf00 nop 800a552: 3708 adds r7, #8 800a554: 46bd mov sp, r7 800a556: bd80 pop {r7, pc} 0800a558 : * @param req: usb request * @retval status */ static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a558: b580 push {r7, lr} 800a55a: b082 sub sp, #8 800a55c: af00 add r7, sp, #0 800a55e: 6078 str r0, [r7, #4] 800a560: 6039 str r1, [r7, #0] if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800a562: 683b ldr r3, [r7, #0] 800a564: 885b ldrh r3, [r3, #2] 800a566: 2b01 cmp r3, #1 800a568: d106 bne.n 800a578 { pdev->dev_remote_wakeup = 1U; 800a56a: 687b ldr r3, [r7, #4] 800a56c: 2201 movs r2, #1 800a56e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800a572: 6878 ldr r0, [r7, #4] 800a574: f000 f926 bl 800a7c4 } } 800a578: bf00 nop 800a57a: 3708 adds r7, #8 800a57c: 46bd mov sp, r7 800a57e: bd80 pop {r7, pc} 0800a580 : * @param req: usb request * @retval status */ static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a580: b580 push {r7, lr} 800a582: b082 sub sp, #8 800a584: af00 add r7, sp, #0 800a586: 6078 str r0, [r7, #4] 800a588: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800a58a: 687b ldr r3, [r7, #4] 800a58c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a590: 3b01 subs r3, #1 800a592: 2b02 cmp r3, #2 800a594: d80b bhi.n 800a5ae { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800a596: 683b ldr r3, [r7, #0] 800a598: 885b ldrh r3, [r3, #2] 800a59a: 2b01 cmp r3, #1 800a59c: d10c bne.n 800a5b8 { pdev->dev_remote_wakeup = 0U; 800a59e: 687b ldr r3, [r7, #4] 800a5a0: 2200 movs r2, #0 800a5a2: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800a5a6: 6878 ldr r0, [r7, #4] 800a5a8: f000 f90c bl 800a7c4 } break; 800a5ac: e004 b.n 800a5b8 default: USBD_CtlError(pdev, req); 800a5ae: 6839 ldr r1, [r7, #0] 800a5b0: 6878 ldr r0, [r7, #4] 800a5b2: f000 f83f bl 800a634 break; 800a5b6: e000 b.n 800a5ba break; 800a5b8: bf00 nop } } 800a5ba: bf00 nop 800a5bc: 3708 adds r7, #8 800a5be: 46bd mov sp, r7 800a5c0: bd80 pop {r7, pc} 0800a5c2 : * @param req: usb request * @retval None */ void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) { 800a5c2: b480 push {r7} 800a5c4: b083 sub sp, #12 800a5c6: af00 add r7, sp, #0 800a5c8: 6078 str r0, [r7, #4] 800a5ca: 6039 str r1, [r7, #0] req->bmRequest = *(uint8_t *)(pdata); 800a5cc: 683b ldr r3, [r7, #0] 800a5ce: 781a ldrb r2, [r3, #0] 800a5d0: 687b ldr r3, [r7, #4] 800a5d2: 701a strb r2, [r3, #0] req->bRequest = *(uint8_t *)(pdata + 1U); 800a5d4: 683b ldr r3, [r7, #0] 800a5d6: 785a ldrb r2, [r3, #1] 800a5d8: 687b ldr r3, [r7, #4] 800a5da: 705a strb r2, [r3, #1] req->wValue = SWAPBYTE(pdata + 2U); 800a5dc: 683b ldr r3, [r7, #0] 800a5de: 3302 adds r3, #2 800a5e0: 781b ldrb r3, [r3, #0] 800a5e2: 461a mov r2, r3 800a5e4: 683b ldr r3, [r7, #0] 800a5e6: 3303 adds r3, #3 800a5e8: 781b ldrb r3, [r3, #0] 800a5ea: 021b lsls r3, r3, #8 800a5ec: b29b uxth r3, r3 800a5ee: 4413 add r3, r2 800a5f0: b29a uxth r2, r3 800a5f2: 687b ldr r3, [r7, #4] 800a5f4: 805a strh r2, [r3, #2] req->wIndex = SWAPBYTE(pdata + 4U); 800a5f6: 683b ldr r3, [r7, #0] 800a5f8: 3304 adds r3, #4 800a5fa: 781b ldrb r3, [r3, #0] 800a5fc: 461a mov r2, r3 800a5fe: 683b ldr r3, [r7, #0] 800a600: 3305 adds r3, #5 800a602: 781b ldrb r3, [r3, #0] 800a604: 021b lsls r3, r3, #8 800a606: b29b uxth r3, r3 800a608: 4413 add r3, r2 800a60a: b29a uxth r2, r3 800a60c: 687b ldr r3, [r7, #4] 800a60e: 809a strh r2, [r3, #4] req->wLength = SWAPBYTE(pdata + 6U); 800a610: 683b ldr r3, [r7, #0] 800a612: 3306 adds r3, #6 800a614: 781b ldrb r3, [r3, #0] 800a616: 461a mov r2, r3 800a618: 683b ldr r3, [r7, #0] 800a61a: 3307 adds r3, #7 800a61c: 781b ldrb r3, [r3, #0] 800a61e: 021b lsls r3, r3, #8 800a620: b29b uxth r3, r3 800a622: 4413 add r3, r2 800a624: b29a uxth r2, r3 800a626: 687b ldr r3, [r7, #4] 800a628: 80da strh r2, [r3, #6] } 800a62a: bf00 nop 800a62c: 370c adds r7, #12 800a62e: 46bd mov sp, r7 800a630: bc80 pop {r7} 800a632: 4770 bx lr 0800a634 : * @retval None */ void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a634: b580 push {r7, lr} 800a636: b082 sub sp, #8 800a638: af00 add r7, sp, #0 800a63a: 6078 str r0, [r7, #4] 800a63c: 6039 str r1, [r7, #0] USBD_LL_StallEP(pdev, 0x80U); 800a63e: 2180 movs r1, #128 @ 0x80 800a640: 6878 ldr r0, [r7, #4] 800a642: f000 fcd1 bl 800afe8 USBD_LL_StallEP(pdev, 0U); 800a646: 2100 movs r1, #0 800a648: 6878 ldr r0, [r7, #4] 800a64a: f000 fccd bl 800afe8 } 800a64e: bf00 nop 800a650: 3708 adds r7, #8 800a652: 46bd mov sp, r7 800a654: bd80 pop {r7, pc} 0800a656 : * @param unicode : Formatted string buffer (unicode) * @param len : descriptor length * @retval None */ void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) { 800a656: b580 push {r7, lr} 800a658: b086 sub sp, #24 800a65a: af00 add r7, sp, #0 800a65c: 60f8 str r0, [r7, #12] 800a65e: 60b9 str r1, [r7, #8] 800a660: 607a str r2, [r7, #4] uint8_t idx = 0U; 800a662: 2300 movs r3, #0 800a664: 75fb strb r3, [r7, #23] if (desc != NULL) 800a666: 68fb ldr r3, [r7, #12] 800a668: 2b00 cmp r3, #0 800a66a: d032 beq.n 800a6d2 { *len = (uint16_t)USBD_GetLen(desc) * 2U + 2U; 800a66c: 68f8 ldr r0, [r7, #12] 800a66e: f000 f834 bl 800a6da 800a672: 4603 mov r3, r0 800a674: 3301 adds r3, #1 800a676: b29b uxth r3, r3 800a678: 005b lsls r3, r3, #1 800a67a: b29a uxth r2, r3 800a67c: 687b ldr r3, [r7, #4] 800a67e: 801a strh r2, [r3, #0] unicode[idx++] = *(uint8_t *)(void *)len; 800a680: 7dfb ldrb r3, [r7, #23] 800a682: 1c5a adds r2, r3, #1 800a684: 75fa strb r2, [r7, #23] 800a686: 461a mov r2, r3 800a688: 68bb ldr r3, [r7, #8] 800a68a: 4413 add r3, r2 800a68c: 687a ldr r2, [r7, #4] 800a68e: 7812 ldrb r2, [r2, #0] 800a690: 701a strb r2, [r3, #0] unicode[idx++] = USB_DESC_TYPE_STRING; 800a692: 7dfb ldrb r3, [r7, #23] 800a694: 1c5a adds r2, r3, #1 800a696: 75fa strb r2, [r7, #23] 800a698: 461a mov r2, r3 800a69a: 68bb ldr r3, [r7, #8] 800a69c: 4413 add r3, r2 800a69e: 2203 movs r2, #3 800a6a0: 701a strb r2, [r3, #0] while (*desc != '\0') 800a6a2: e012 b.n 800a6ca { unicode[idx++] = *desc++; 800a6a4: 68fb ldr r3, [r7, #12] 800a6a6: 1c5a adds r2, r3, #1 800a6a8: 60fa str r2, [r7, #12] 800a6aa: 7dfa ldrb r2, [r7, #23] 800a6ac: 1c51 adds r1, r2, #1 800a6ae: 75f9 strb r1, [r7, #23] 800a6b0: 4611 mov r1, r2 800a6b2: 68ba ldr r2, [r7, #8] 800a6b4: 440a add r2, r1 800a6b6: 781b ldrb r3, [r3, #0] 800a6b8: 7013 strb r3, [r2, #0] unicode[idx++] = 0U; 800a6ba: 7dfb ldrb r3, [r7, #23] 800a6bc: 1c5a adds r2, r3, #1 800a6be: 75fa strb r2, [r7, #23] 800a6c0: 461a mov r2, r3 800a6c2: 68bb ldr r3, [r7, #8] 800a6c4: 4413 add r3, r2 800a6c6: 2200 movs r2, #0 800a6c8: 701a strb r2, [r3, #0] while (*desc != '\0') 800a6ca: 68fb ldr r3, [r7, #12] 800a6cc: 781b ldrb r3, [r3, #0] 800a6ce: 2b00 cmp r3, #0 800a6d0: d1e8 bne.n 800a6a4 } } } 800a6d2: bf00 nop 800a6d4: 3718 adds r7, #24 800a6d6: 46bd mov sp, r7 800a6d8: bd80 pop {r7, pc} 0800a6da : * return the string length * @param buf : pointer to the ascii string buffer * @retval string length */ static uint8_t USBD_GetLen(uint8_t *buf) { 800a6da: b480 push {r7} 800a6dc: b085 sub sp, #20 800a6de: af00 add r7, sp, #0 800a6e0: 6078 str r0, [r7, #4] uint8_t len = 0U; 800a6e2: 2300 movs r3, #0 800a6e4: 73fb strb r3, [r7, #15] while (*buf != '\0') 800a6e6: e005 b.n 800a6f4 { len++; 800a6e8: 7bfb ldrb r3, [r7, #15] 800a6ea: 3301 adds r3, #1 800a6ec: 73fb strb r3, [r7, #15] buf++; 800a6ee: 687b ldr r3, [r7, #4] 800a6f0: 3301 adds r3, #1 800a6f2: 607b str r3, [r7, #4] while (*buf != '\0') 800a6f4: 687b ldr r3, [r7, #4] 800a6f6: 781b ldrb r3, [r3, #0] 800a6f8: 2b00 cmp r3, #0 800a6fa: d1f5 bne.n 800a6e8 } return len; 800a6fc: 7bfb ldrb r3, [r7, #15] } 800a6fe: 4618 mov r0, r3 800a700: 3714 adds r7, #20 800a702: 46bd mov sp, r7 800a704: bc80 pop {r7} 800a706: 4770 bx lr 0800a708 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800a708: b580 push {r7, lr} 800a70a: b084 sub sp, #16 800a70c: af00 add r7, sp, #0 800a70e: 60f8 str r0, [r7, #12] 800a710: 60b9 str r1, [r7, #8] 800a712: 4613 mov r3, r2 800a714: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_IN; 800a716: 68fb ldr r3, [r7, #12] 800a718: 2202 movs r2, #2 800a71a: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_in[0].total_length = len; 800a71e: 88fa ldrh r2, [r7, #6] 800a720: 68fb ldr r3, [r7, #12] 800a722: 61da str r2, [r3, #28] pdev->ep_in[0].rem_length = len; 800a724: 88fa ldrh r2, [r7, #6] 800a726: 68fb ldr r3, [r7, #12] 800a728: 621a str r2, [r3, #32] /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800a72a: 88fb ldrh r3, [r7, #6] 800a72c: 68ba ldr r2, [r7, #8] 800a72e: 2100 movs r1, #0 800a730: 68f8 ldr r0, [r7, #12] 800a732: f000 fce1 bl 800b0f8 return USBD_OK; 800a736: 2300 movs r3, #0 } 800a738: 4618 mov r0, r3 800a73a: 3710 adds r7, #16 800a73c: 46bd mov sp, r7 800a73e: bd80 pop {r7, pc} 0800a740 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800a740: b580 push {r7, lr} 800a742: b084 sub sp, #16 800a744: af00 add r7, sp, #0 800a746: 60f8 str r0, [r7, #12] 800a748: 60b9 str r1, [r7, #8] 800a74a: 4613 mov r3, r2 800a74c: 80fb strh r3, [r7, #6] /* Start the next transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800a74e: 88fb ldrh r3, [r7, #6] 800a750: 68ba ldr r2, [r7, #8] 800a752: 2100 movs r1, #0 800a754: 68f8 ldr r0, [r7, #12] 800a756: f000 fccf bl 800b0f8 return USBD_OK; 800a75a: 2300 movs r3, #0 } 800a75c: 4618 mov r0, r3 800a75e: 3710 adds r7, #16 800a760: 46bd mov sp, r7 800a762: bd80 pop {r7, pc} 0800a764 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800a764: b580 push {r7, lr} 800a766: b084 sub sp, #16 800a768: af00 add r7, sp, #0 800a76a: 60f8 str r0, [r7, #12] 800a76c: 60b9 str r1, [r7, #8] 800a76e: 4613 mov r3, r2 800a770: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_OUT; 800a772: 68fb ldr r3, [r7, #12] 800a774: 2203 movs r2, #3 800a776: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_out[0].total_length = len; 800a77a: 88fa ldrh r2, [r7, #6] 800a77c: 68fb ldr r3, [r7, #12] 800a77e: f8c3 215c str.w r2, [r3, #348] @ 0x15c pdev->ep_out[0].rem_length = len; 800a782: 88fa ldrh r2, [r7, #6] 800a784: 68fb ldr r3, [r7, #12] 800a786: f8c3 2160 str.w r2, [r3, #352] @ 0x160 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800a78a: 88fb ldrh r3, [r7, #6] 800a78c: 68ba ldr r2, [r7, #8] 800a78e: 2100 movs r1, #0 800a790: 68f8 ldr r0, [r7, #12] 800a792: f000 fcd4 bl 800b13e return USBD_OK; 800a796: 2300 movs r3, #0 } 800a798: 4618 mov r0, r3 800a79a: 3710 adds r7, #16 800a79c: 46bd mov sp, r7 800a79e: bd80 pop {r7, pc} 0800a7a0 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800a7a0: b580 push {r7, lr} 800a7a2: b084 sub sp, #16 800a7a4: af00 add r7, sp, #0 800a7a6: 60f8 str r0, [r7, #12] 800a7a8: 60b9 str r1, [r7, #8] 800a7aa: 4613 mov r3, r2 800a7ac: 80fb strh r3, [r7, #6] USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800a7ae: 88fb ldrh r3, [r7, #6] 800a7b0: 68ba ldr r2, [r7, #8] 800a7b2: 2100 movs r1, #0 800a7b4: 68f8 ldr r0, [r7, #12] 800a7b6: f000 fcc2 bl 800b13e return USBD_OK; 800a7ba: 2300 movs r3, #0 } 800a7bc: 4618 mov r0, r3 800a7be: 3710 adds r7, #16 800a7c0: 46bd mov sp, r7 800a7c2: bd80 pop {r7, pc} 0800a7c4 : * send zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) { 800a7c4: b580 push {r7, lr} 800a7c6: b082 sub sp, #8 800a7c8: af00 add r7, sp, #0 800a7ca: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_IN; 800a7cc: 687b ldr r3, [r7, #4] 800a7ce: 2204 movs r2, #4 800a7d0: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); 800a7d4: 2300 movs r3, #0 800a7d6: 2200 movs r2, #0 800a7d8: 2100 movs r1, #0 800a7da: 6878 ldr r0, [r7, #4] 800a7dc: f000 fc8c bl 800b0f8 return USBD_OK; 800a7e0: 2300 movs r3, #0 } 800a7e2: 4618 mov r0, r3 800a7e4: 3708 adds r7, #8 800a7e6: 46bd mov sp, r7 800a7e8: bd80 pop {r7, pc} 0800a7ea : * receive zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) { 800a7ea: b580 push {r7, lr} 800a7ec: b082 sub sp, #8 800a7ee: af00 add r7, sp, #0 800a7f0: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_OUT; 800a7f2: 687b ldr r3, [r7, #4] 800a7f4: 2205 movs r2, #5 800a7f6: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800a7fa: 2300 movs r3, #0 800a7fc: 2200 movs r2, #0 800a7fe: 2100 movs r1, #0 800a800: 6878 ldr r0, [r7, #4] 800a802: f000 fc9c bl 800b13e return USBD_OK; 800a806: 2300 movs r3, #0 } 800a808: 4618 mov r0, r3 800a80a: 3708 adds r7, #8 800a80c: 46bd mov sp, r7 800a80e: bd80 pop {r7, pc} 0800a810 : /** * Init USB device Library, add supported class and start the library * @retval None */ void MX_USB_DEVICE_Init(void) { 800a810: b580 push {r7, lr} 800a812: af00 add r7, sp, #0 /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ /* USER CODE END USB_DEVICE_Init_PreTreatment */ /* Init Device Library, add supported class and start the library. */ if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK) 800a814: 2200 movs r2, #0 800a816: 4912 ldr r1, [pc, #72] @ (800a860 ) 800a818: 4812 ldr r0, [pc, #72] @ (800a864 ) 800a81a: f7fe ff62 bl 80096e2 800a81e: 4603 mov r3, r0 800a820: 2b00 cmp r3, #0 800a822: d001 beq.n 800a828 { Error_Handler(); 800a824: f7f7 f870 bl 8001908 } if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK) 800a828: 490f ldr r1, [pc, #60] @ (800a868 ) 800a82a: 480e ldr r0, [pc, #56] @ (800a864 ) 800a82c: f7fe ff84 bl 8009738 800a830: 4603 mov r3, r0 800a832: 2b00 cmp r3, #0 800a834: d001 beq.n 800a83a { Error_Handler(); 800a836: f7f7 f867 bl 8001908 } if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK) 800a83a: 490c ldr r1, [pc, #48] @ (800a86c ) 800a83c: 4809 ldr r0, [pc, #36] @ (800a864 ) 800a83e: f7fe feb5 bl 80095ac 800a842: 4603 mov r3, r0 800a844: 2b00 cmp r3, #0 800a846: d001 beq.n 800a84c { Error_Handler(); 800a848: f7f7 f85e bl 8001908 } if (USBD_Start(&hUsbDeviceFS) != USBD_OK) 800a84c: 4805 ldr r0, [pc, #20] @ (800a864 ) 800a84e: f7fe ff8c bl 800976a 800a852: 4603 mov r3, r0 800a854: 2b00 cmp r3, #0 800a856: d001 beq.n 800a85c { Error_Handler(); 800a858: f7f7 f856 bl 8001908 } /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ /* USER CODE END USB_DEVICE_Init_PostTreatment */ } 800a85c: bf00 nop 800a85e: bd80 pop {r7, pc} 800a860: 20000130 .word 0x20000130 800a864: 20000414 .word 0x20000414 800a868: 2000001c .word 0x2000001c 800a86c: 20000120 .word 0x20000120 0800a870 : /* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ #define RX_FIFO_SZ 256 static uint8_t rx_fifo[RX_FIFO_SZ]; static volatile uint16_t rx_head = 0, rx_tail = 0; static void fifo_push(const uint8_t* data, uint32_t len) { 800a870: b480 push {r7} 800a872: b085 sub sp, #20 800a874: af00 add r7, sp, #0 800a876: 6078 str r0, [r7, #4] 800a878: 6039 str r1, [r7, #0] while (len--) { 800a87a: e01e b.n 800a8ba uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u); 800a87c: 4b14 ldr r3, [pc, #80] @ (800a8d0 ) 800a87e: 881b ldrh r3, [r3, #0] 800a880: b29b uxth r3, r3 800a882: 3301 adds r3, #1 800a884: b29b uxth r3, r3 800a886: b2db uxtb r3, r3 800a888: 81fb strh r3, [r7, #14] if (next == (rx_tail & (RX_FIFO_SZ - 1u))) { 800a88a: 89fa ldrh r2, [r7, #14] 800a88c: 4b11 ldr r3, [pc, #68] @ (800a8d4 ) 800a88e: 881b ldrh r3, [r3, #0] 800a890: b29b uxth r3, r3 800a892: b2db uxtb r3, r3 800a894: 429a cmp r2, r3 800a896: d103 bne.n 800a8a0 /* overflow — drop byte (or set a flag) */ data++; 800a898: 687b ldr r3, [r7, #4] 800a89a: 3301 adds r3, #1 800a89c: 607b str r3, [r7, #4] continue; 800a89e: e00c b.n 800a8ba } rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++; 800a8a0: 687b ldr r3, [r7, #4] 800a8a2: 1c5a adds r2, r3, #1 800a8a4: 607a str r2, [r7, #4] 800a8a6: 4a0a ldr r2, [pc, #40] @ (800a8d0 ) 800a8a8: 8812 ldrh r2, [r2, #0] 800a8aa: b292 uxth r2, r2 800a8ac: b2d2 uxtb r2, r2 800a8ae: 7819 ldrb r1, [r3, #0] 800a8b0: 4b09 ldr r3, [pc, #36] @ (800a8d8 ) 800a8b2: 5499 strb r1, [r3, r2] rx_head = next; 800a8b4: 4a06 ldr r2, [pc, #24] @ (800a8d0 ) 800a8b6: 89fb ldrh r3, [r7, #14] 800a8b8: 8013 strh r3, [r2, #0] while (len--) { 800a8ba: 683b ldr r3, [r7, #0] 800a8bc: 1e5a subs r2, r3, #1 800a8be: 603a str r2, [r7, #0] 800a8c0: 2b00 cmp r3, #0 800a8c2: d1db bne.n 800a87c } } 800a8c4: bf00 nop 800a8c6: bf00 nop 800a8c8: 3714 adds r7, #20 800a8ca: 46bd mov sp, r7 800a8cc: bc80 pop {r7} 800a8ce: 4770 bx lr 800a8d0: 20000fd8 .word 0x20000fd8 800a8d4: 20000fda .word 0x20000fda 800a8d8: 20000ed8 .word 0x20000ed8 0800a8dc : uint32_t CDC_Available(void) { 800a8dc: b480 push {r7} 800a8de: af00 add r7, sp, #0 return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u)); 800a8e0: 4b06 ldr r3, [pc, #24] @ (800a8fc ) 800a8e2: 881b ldrh r3, [r3, #0] 800a8e4: b29a uxth r2, r3 800a8e6: 4b06 ldr r3, [pc, #24] @ (800a900 ) 800a8e8: 881b ldrh r3, [r3, #0] 800a8ea: b29b uxth r3, r3 800a8ec: 1ad3 subs r3, r2, r3 800a8ee: b29b uxth r3, r3 800a8f0: b2db uxtb r3, r3 } 800a8f2: 4618 mov r0, r3 800a8f4: 46bd mov sp, r7 800a8f6: bc80 pop {r7} 800a8f8: 4770 bx lr 800a8fa: bf00 nop 800a8fc: 20000fd8 .word 0x20000fd8 800a900: 20000fda .word 0x20000fda 0800a904 : int CDC_ReadByte(void) { 800a904: b480 push {r7} 800a906: b083 sub sp, #12 800a908: af00 add r7, sp, #0 if (rx_tail == rx_head) return -1; 800a90a: 4b10 ldr r3, [pc, #64] @ (800a94c ) 800a90c: 881b ldrh r3, [r3, #0] 800a90e: b29a uxth r2, r3 800a910: 4b0f ldr r3, [pc, #60] @ (800a950 ) 800a912: 881b ldrh r3, [r3, #0] 800a914: b29b uxth r3, r3 800a916: 429a cmp r2, r3 800a918: d102 bne.n 800a920 800a91a: f04f 33ff mov.w r3, #4294967295 800a91e: e010 b.n 800a942 int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)]; 800a920: 4b0a ldr r3, [pc, #40] @ (800a94c ) 800a922: 881b ldrh r3, [r3, #0] 800a924: b29b uxth r3, r3 800a926: b2db uxtb r3, r3 800a928: 4a0a ldr r2, [pc, #40] @ (800a954 ) 800a92a: 5cd3 ldrb r3, [r2, r3] 800a92c: 607b str r3, [r7, #4] rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u); 800a92e: 4b07 ldr r3, [pc, #28] @ (800a94c ) 800a930: 881b ldrh r3, [r3, #0] 800a932: b29b uxth r3, r3 800a934: 3301 adds r3, #1 800a936: b29b uxth r3, r3 800a938: b2db uxtb r3, r3 800a93a: b29a uxth r2, r3 800a93c: 4b03 ldr r3, [pc, #12] @ (800a94c ) 800a93e: 801a strh r2, [r3, #0] return b; 800a940: 687b ldr r3, [r7, #4] } 800a942: 4618 mov r0, r3 800a944: 370c adds r7, #12 800a946: 46bd mov sp, r7 800a948: bc80 pop {r7} 800a94a: 4770 bx lr 800a94c: 20000fda .word 0x20000fda 800a950: 20000fd8 .word 0x20000fd8 800a954: 20000ed8 .word 0x20000ed8 0800a958 : /** * @brief Initializes the CDC media low layer over the FS USB IP * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Init_FS(void) { 800a958: b580 push {r7, lr} 800a95a: af00 add r7, sp, #0 /* USER CODE BEGIN 3 */ /* Set Application Buffers */ USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0); 800a95c: 2200 movs r2, #0 800a95e: 4905 ldr r1, [pc, #20] @ (800a974 ) 800a960: 4805 ldr r0, [pc, #20] @ (800a978 ) 800a962: f7fe fe39 bl 80095d8 USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS); 800a966: 4905 ldr r1, [pc, #20] @ (800a97c ) 800a968: 4803 ldr r0, [pc, #12] @ (800a978 ) 800a96a: f7fe fe4e bl 800960a return (USBD_OK); 800a96e: 2300 movs r3, #0 /* USER CODE END 3 */ } 800a970: 4618 mov r0, r3 800a972: bd80 pop {r7, pc} 800a974: 20000ad8 .word 0x20000ad8 800a978: 20000414 .word 0x20000414 800a97c: 200006d8 .word 0x200006d8 0800a980 : /** * @brief DeInitializes the CDC media low layer * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_DeInit_FS(void) { 800a980: b480 push {r7} 800a982: af00 add r7, sp, #0 /* USER CODE BEGIN 4 */ return (USBD_OK); 800a984: 2300 movs r3, #0 /* USER CODE END 4 */ } 800a986: 4618 mov r0, r3 800a988: 46bd mov sp, r7 800a98a: bc80 pop {r7} 800a98c: 4770 bx lr ... 0800a990 : * @param pbuf: Buffer containing command data (request parameters) * @param length: Number of data to be sent (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length) { 800a990: b480 push {r7} 800a992: b083 sub sp, #12 800a994: af00 add r7, sp, #0 800a996: 4603 mov r3, r0 800a998: 6039 str r1, [r7, #0] 800a99a: 71fb strb r3, [r7, #7] 800a99c: 4613 mov r3, r2 800a99e: 80bb strh r3, [r7, #4] /* USER CODE BEGIN 5 */ switch(cmd) 800a9a0: 79fb ldrb r3, [r7, #7] 800a9a2: 2b23 cmp r3, #35 @ 0x23 800a9a4: d84a bhi.n 800aa3c 800a9a6: a201 add r2, pc, #4 @ (adr r2, 800a9ac ) 800a9a8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a9ac: 0800aa3d .word 0x0800aa3d 800a9b0: 0800aa3d .word 0x0800aa3d 800a9b4: 0800aa3d .word 0x0800aa3d 800a9b8: 0800aa3d .word 0x0800aa3d 800a9bc: 0800aa3d .word 0x0800aa3d 800a9c0: 0800aa3d .word 0x0800aa3d 800a9c4: 0800aa3d .word 0x0800aa3d 800a9c8: 0800aa3d .word 0x0800aa3d 800a9cc: 0800aa3d .word 0x0800aa3d 800a9d0: 0800aa3d .word 0x0800aa3d 800a9d4: 0800aa3d .word 0x0800aa3d 800a9d8: 0800aa3d .word 0x0800aa3d 800a9dc: 0800aa3d .word 0x0800aa3d 800a9e0: 0800aa3d .word 0x0800aa3d 800a9e4: 0800aa3d .word 0x0800aa3d 800a9e8: 0800aa3d .word 0x0800aa3d 800a9ec: 0800aa3d .word 0x0800aa3d 800a9f0: 0800aa3d .word 0x0800aa3d 800a9f4: 0800aa3d .word 0x0800aa3d 800a9f8: 0800aa3d .word 0x0800aa3d 800a9fc: 0800aa3d .word 0x0800aa3d 800aa00: 0800aa3d .word 0x0800aa3d 800aa04: 0800aa3d .word 0x0800aa3d 800aa08: 0800aa3d .word 0x0800aa3d 800aa0c: 0800aa3d .word 0x0800aa3d 800aa10: 0800aa3d .word 0x0800aa3d 800aa14: 0800aa3d .word 0x0800aa3d 800aa18: 0800aa3d .word 0x0800aa3d 800aa1c: 0800aa3d .word 0x0800aa3d 800aa20: 0800aa3d .word 0x0800aa3d 800aa24: 0800aa3d .word 0x0800aa3d 800aa28: 0800aa3d .word 0x0800aa3d 800aa2c: 0800aa3d .word 0x0800aa3d 800aa30: 0800aa3d .word 0x0800aa3d 800aa34: 0800aa3d .word 0x0800aa3d 800aa38: 0800aa3d .word 0x0800aa3d case CDC_SEND_BREAK: break; default: break; 800aa3c: bf00 nop } return (USBD_OK); 800aa3e: 2300 movs r3, #0 /* USER CODE END 5 */ } 800aa40: 4618 mov r0, r3 800aa42: 370c adds r7, #12 800aa44: 46bd mov sp, r7 800aa46: bc80 pop {r7} 800aa48: 4770 bx lr 800aa4a: bf00 nop 0800aa4c : * @param Buf: Buffer of data to be received * @param Len: Number of data received (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len) { 800aa4c: b580 push {r7, lr} 800aa4e: b082 sub sp, #8 800aa50: af00 add r7, sp, #0 800aa52: 6078 str r0, [r7, #4] 800aa54: 6039 str r1, [r7, #0] /* USER CODE BEGIN 6 */ if (*Len) fifo_push(Buf, *Len); 800aa56: 683b ldr r3, [r7, #0] 800aa58: 681b ldr r3, [r3, #0] 800aa5a: 2b00 cmp r3, #0 800aa5c: d005 beq.n 800aa6a 800aa5e: 683b ldr r3, [r7, #0] 800aa60: 681b ldr r3, [r3, #0] 800aa62: 4619 mov r1, r3 800aa64: 6878 ldr r0, [r7, #4] 800aa66: f7ff ff03 bl 800a870 USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); 800aa6a: 6879 ldr r1, [r7, #4] 800aa6c: 4805 ldr r0, [pc, #20] @ (800aa84 ) 800aa6e: f7fe fdcc bl 800960a USBD_CDC_ReceivePacket(&hUsbDeviceFS); 800aa72: 4804 ldr r0, [pc, #16] @ (800aa84 ) 800aa74: f7fe fe0b bl 800968e return (USBD_OK); 800aa78: 2300 movs r3, #0 /* USER CODE END 6 */ } 800aa7a: 4618 mov r0, r3 800aa7c: 3708 adds r7, #8 800aa7e: 46bd mov sp, r7 800aa80: bd80 pop {r7, pc} 800aa82: bf00 nop 800aa84: 20000414 .word 0x20000414 0800aa88 : * @param Buf: Buffer of data to be sent * @param Len: Number of data to be sent (in bytes) * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY */ uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) { 800aa88: b580 push {r7, lr} 800aa8a: b084 sub sp, #16 800aa8c: af00 add r7, sp, #0 800aa8e: 6078 str r0, [r7, #4] 800aa90: 460b mov r3, r1 800aa92: 807b strh r3, [r7, #2] uint8_t result = USBD_OK; 800aa94: 2300 movs r3, #0 800aa96: 73fb strb r3, [r7, #15] /* USER CODE BEGIN 7 */ USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData; 800aa98: 4b0d ldr r3, [pc, #52] @ (800aad0 ) 800aa9a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800aa9e: 60bb str r3, [r7, #8] if (hcdc->TxState != 0){ 800aaa0: 68bb ldr r3, [r7, #8] 800aaa2: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 800aaa6: 2b00 cmp r3, #0 800aaa8: d001 beq.n 800aaae return USBD_BUSY; 800aaaa: 2301 movs r3, #1 800aaac: e00b b.n 800aac6 } USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len); 800aaae: 887b ldrh r3, [r7, #2] 800aab0: 461a mov r2, r3 800aab2: 6879 ldr r1, [r7, #4] 800aab4: 4806 ldr r0, [pc, #24] @ (800aad0 ) 800aab6: f7fe fd8f bl 80095d8 result = USBD_CDC_TransmitPacket(&hUsbDeviceFS); 800aaba: 4805 ldr r0, [pc, #20] @ (800aad0 ) 800aabc: f7fe fdb8 bl 8009630 800aac0: 4603 mov r3, r0 800aac2: 73fb strb r3, [r7, #15] /* USER CODE END 7 */ return result; 800aac4: 7bfb ldrb r3, [r7, #15] } 800aac6: 4618 mov r0, r3 800aac8: 3710 adds r7, #16 800aaca: 46bd mov sp, r7 800aacc: bd80 pop {r7, pc} 800aace: bf00 nop 800aad0: 20000414 .word 0x20000414 0800aad4 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800aad4: b480 push {r7} 800aad6: b083 sub sp, #12 800aad8: af00 add r7, sp, #0 800aada: 4603 mov r3, r0 800aadc: 6039 str r1, [r7, #0] 800aade: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_DeviceDesc); 800aae0: 683b ldr r3, [r7, #0] 800aae2: 2212 movs r2, #18 800aae4: 801a strh r2, [r3, #0] return USBD_FS_DeviceDesc; 800aae6: 4b03 ldr r3, [pc, #12] @ (800aaf4 ) } 800aae8: 4618 mov r0, r3 800aaea: 370c adds r7, #12 800aaec: 46bd mov sp, r7 800aaee: bc80 pop {r7} 800aaf0: 4770 bx lr 800aaf2: bf00 nop 800aaf4: 2000014c .word 0x2000014c 0800aaf8 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800aaf8: b480 push {r7} 800aafa: b083 sub sp, #12 800aafc: af00 add r7, sp, #0 800aafe: 4603 mov r3, r0 800ab00: 6039 str r1, [r7, #0] 800ab02: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_LangIDDesc); 800ab04: 683b ldr r3, [r7, #0] 800ab06: 2204 movs r2, #4 800ab08: 801a strh r2, [r3, #0] return USBD_LangIDDesc; 800ab0a: 4b03 ldr r3, [pc, #12] @ (800ab18 ) } 800ab0c: 4618 mov r0, r3 800ab0e: 370c adds r7, #12 800ab10: 46bd mov sp, r7 800ab12: bc80 pop {r7} 800ab14: 4770 bx lr 800ab16: bf00 nop 800ab18: 20000160 .word 0x20000160 0800ab1c : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ab1c: b580 push {r7, lr} 800ab1e: b082 sub sp, #8 800ab20: af00 add r7, sp, #0 800ab22: 4603 mov r3, r0 800ab24: 6039 str r1, [r7, #0] 800ab26: 71fb strb r3, [r7, #7] if(speed == 0) 800ab28: 79fb ldrb r3, [r7, #7] 800ab2a: 2b00 cmp r3, #0 800ab2c: d105 bne.n 800ab3a { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800ab2e: 683a ldr r2, [r7, #0] 800ab30: 4907 ldr r1, [pc, #28] @ (800ab50 ) 800ab32: 4808 ldr r0, [pc, #32] @ (800ab54 ) 800ab34: f7ff fd8f bl 800a656 800ab38: e004 b.n 800ab44 } else { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800ab3a: 683a ldr r2, [r7, #0] 800ab3c: 4904 ldr r1, [pc, #16] @ (800ab50 ) 800ab3e: 4805 ldr r0, [pc, #20] @ (800ab54 ) 800ab40: f7ff fd89 bl 800a656 } return USBD_StrDesc; 800ab44: 4b02 ldr r3, [pc, #8] @ (800ab50 ) } 800ab46: 4618 mov r0, r3 800ab48: 3708 adds r7, #8 800ab4a: 46bd mov sp, r7 800ab4c: bd80 pop {r7, pc} 800ab4e: bf00 nop 800ab50: 20000fdc .word 0x20000fdc 800ab54: 0800bda0 .word 0x0800bda0 0800ab58 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ab58: b580 push {r7, lr} 800ab5a: b082 sub sp, #8 800ab5c: af00 add r7, sp, #0 800ab5e: 4603 mov r3, r0 800ab60: 6039 str r1, [r7, #0] 800ab62: 71fb strb r3, [r7, #7] UNUSED(speed); USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 800ab64: 683a ldr r2, [r7, #0] 800ab66: 4904 ldr r1, [pc, #16] @ (800ab78 ) 800ab68: 4804 ldr r0, [pc, #16] @ (800ab7c ) 800ab6a: f7ff fd74 bl 800a656 return USBD_StrDesc; 800ab6e: 4b02 ldr r3, [pc, #8] @ (800ab78 ) } 800ab70: 4618 mov r0, r3 800ab72: 3708 adds r7, #8 800ab74: 46bd mov sp, r7 800ab76: bd80 pop {r7, pc} 800ab78: 20000fdc .word 0x20000fdc 800ab7c: 0800bdb8 .word 0x0800bdb8 0800ab80 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ab80: b580 push {r7, lr} 800ab82: b082 sub sp, #8 800ab84: af00 add r7, sp, #0 800ab86: 4603 mov r3, r0 800ab88: 6039 str r1, [r7, #0] 800ab8a: 71fb strb r3, [r7, #7] UNUSED(speed); *length = USB_SIZ_STRING_SERIAL; 800ab8c: 683b ldr r3, [r7, #0] 800ab8e: 221a movs r2, #26 800ab90: 801a strh r2, [r3, #0] /* Update the serial number string descriptor with the data from the unique * ID */ Get_SerialNum(); 800ab92: f000 f843 bl 800ac1c /* USER CODE BEGIN USBD_FS_SerialStrDescriptor */ /* USER CODE END USBD_FS_SerialStrDescriptor */ return (uint8_t *) USBD_StringSerial; 800ab96: 4b02 ldr r3, [pc, #8] @ (800aba0 ) } 800ab98: 4618 mov r0, r3 800ab9a: 3708 adds r7, #8 800ab9c: 46bd mov sp, r7 800ab9e: bd80 pop {r7, pc} 800aba0: 20000164 .word 0x20000164 0800aba4 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800aba4: b580 push {r7, lr} 800aba6: b082 sub sp, #8 800aba8: af00 add r7, sp, #0 800abaa: 4603 mov r3, r0 800abac: 6039 str r1, [r7, #0] 800abae: 71fb strb r3, [r7, #7] if(speed == USBD_SPEED_HIGH) 800abb0: 79fb ldrb r3, [r7, #7] 800abb2: 2b00 cmp r3, #0 800abb4: d105 bne.n 800abc2 { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800abb6: 683a ldr r2, [r7, #0] 800abb8: 4907 ldr r1, [pc, #28] @ (800abd8 ) 800abba: 4808 ldr r0, [pc, #32] @ (800abdc ) 800abbc: f7ff fd4b bl 800a656 800abc0: e004 b.n 800abcc } else { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800abc2: 683a ldr r2, [r7, #0] 800abc4: 4904 ldr r1, [pc, #16] @ (800abd8 ) 800abc6: 4805 ldr r0, [pc, #20] @ (800abdc ) 800abc8: f7ff fd45 bl 800a656 } return USBD_StrDesc; 800abcc: 4b02 ldr r3, [pc, #8] @ (800abd8 ) } 800abce: 4618 mov r0, r3 800abd0: 3708 adds r7, #8 800abd2: 46bd mov sp, r7 800abd4: bd80 pop {r7, pc} 800abd6: bf00 nop 800abd8: 20000fdc .word 0x20000fdc 800abdc: 0800bdcc .word 0x0800bdcc 0800abe0 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800abe0: b580 push {r7, lr} 800abe2: b082 sub sp, #8 800abe4: af00 add r7, sp, #0 800abe6: 4603 mov r3, r0 800abe8: 6039 str r1, [r7, #0] 800abea: 71fb strb r3, [r7, #7] if(speed == 0) 800abec: 79fb ldrb r3, [r7, #7] 800abee: 2b00 cmp r3, #0 800abf0: d105 bne.n 800abfe { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800abf2: 683a ldr r2, [r7, #0] 800abf4: 4907 ldr r1, [pc, #28] @ (800ac14 ) 800abf6: 4808 ldr r0, [pc, #32] @ (800ac18 ) 800abf8: f7ff fd2d bl 800a656 800abfc: e004 b.n 800ac08 } else { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800abfe: 683a ldr r2, [r7, #0] 800ac00: 4904 ldr r1, [pc, #16] @ (800ac14 ) 800ac02: 4805 ldr r0, [pc, #20] @ (800ac18 ) 800ac04: f7ff fd27 bl 800a656 } return USBD_StrDesc; 800ac08: 4b02 ldr r3, [pc, #8] @ (800ac14 ) } 800ac0a: 4618 mov r0, r3 800ac0c: 3708 adds r7, #8 800ac0e: 46bd mov sp, r7 800ac10: bd80 pop {r7, pc} 800ac12: bf00 nop 800ac14: 20000fdc .word 0x20000fdc 800ac18: 0800bdd8 .word 0x0800bdd8 0800ac1c : * @brief Create the serial number string descriptor * @param None * @retval None */ static void Get_SerialNum(void) { 800ac1c: b580 push {r7, lr} 800ac1e: b084 sub sp, #16 800ac20: af00 add r7, sp, #0 uint32_t deviceserial0; uint32_t deviceserial1; uint32_t deviceserial2; deviceserial0 = *(uint32_t *) DEVICE_ID1; 800ac22: 4b0f ldr r3, [pc, #60] @ (800ac60 ) 800ac24: 681b ldr r3, [r3, #0] 800ac26: 60fb str r3, [r7, #12] deviceserial1 = *(uint32_t *) DEVICE_ID2; 800ac28: 4b0e ldr r3, [pc, #56] @ (800ac64 ) 800ac2a: 681b ldr r3, [r3, #0] 800ac2c: 60bb str r3, [r7, #8] deviceserial2 = *(uint32_t *) DEVICE_ID3; 800ac2e: 4b0e ldr r3, [pc, #56] @ (800ac68 ) 800ac30: 681b ldr r3, [r3, #0] 800ac32: 607b str r3, [r7, #4] deviceserial0 += deviceserial2; 800ac34: 68fa ldr r2, [r7, #12] 800ac36: 687b ldr r3, [r7, #4] 800ac38: 4413 add r3, r2 800ac3a: 60fb str r3, [r7, #12] if (deviceserial0 != 0) 800ac3c: 68fb ldr r3, [r7, #12] 800ac3e: 2b00 cmp r3, #0 800ac40: d009 beq.n 800ac56 { IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8); 800ac42: 2208 movs r2, #8 800ac44: 4909 ldr r1, [pc, #36] @ (800ac6c ) 800ac46: 68f8 ldr r0, [r7, #12] 800ac48: f000 f814 bl 800ac74 IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4); 800ac4c: 2204 movs r2, #4 800ac4e: 4908 ldr r1, [pc, #32] @ (800ac70 ) 800ac50: 68b8 ldr r0, [r7, #8] 800ac52: f000 f80f bl 800ac74 } } 800ac56: bf00 nop 800ac58: 3710 adds r7, #16 800ac5a: 46bd mov sp, r7 800ac5c: bd80 pop {r7, pc} 800ac5e: bf00 nop 800ac60: 1ffff7e8 .word 0x1ffff7e8 800ac64: 1ffff7ec .word 0x1ffff7ec 800ac68: 1ffff7f0 .word 0x1ffff7f0 800ac6c: 20000166 .word 0x20000166 800ac70: 20000176 .word 0x20000176 0800ac74 : * @param pbuf: pointer to the buffer * @param len: buffer length * @retval None */ static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len) { 800ac74: b480 push {r7} 800ac76: b087 sub sp, #28 800ac78: af00 add r7, sp, #0 800ac7a: 60f8 str r0, [r7, #12] 800ac7c: 60b9 str r1, [r7, #8] 800ac7e: 4613 mov r3, r2 800ac80: 71fb strb r3, [r7, #7] uint8_t idx = 0; 800ac82: 2300 movs r3, #0 800ac84: 75fb strb r3, [r7, #23] for (idx = 0; idx < len; idx++) 800ac86: 2300 movs r3, #0 800ac88: 75fb strb r3, [r7, #23] 800ac8a: e027 b.n 800acdc { if (((value >> 28)) < 0xA) 800ac8c: 68fb ldr r3, [r7, #12] 800ac8e: 0f1b lsrs r3, r3, #28 800ac90: 2b09 cmp r3, #9 800ac92: d80b bhi.n 800acac { pbuf[2 * idx] = (value >> 28) + '0'; 800ac94: 68fb ldr r3, [r7, #12] 800ac96: 0f1b lsrs r3, r3, #28 800ac98: b2da uxtb r2, r3 800ac9a: 7dfb ldrb r3, [r7, #23] 800ac9c: 005b lsls r3, r3, #1 800ac9e: 4619 mov r1, r3 800aca0: 68bb ldr r3, [r7, #8] 800aca2: 440b add r3, r1 800aca4: 3230 adds r2, #48 @ 0x30 800aca6: b2d2 uxtb r2, r2 800aca8: 701a strb r2, [r3, #0] 800acaa: e00a b.n 800acc2 } else { pbuf[2 * idx] = (value >> 28) + 'A' - 10; 800acac: 68fb ldr r3, [r7, #12] 800acae: 0f1b lsrs r3, r3, #28 800acb0: b2da uxtb r2, r3 800acb2: 7dfb ldrb r3, [r7, #23] 800acb4: 005b lsls r3, r3, #1 800acb6: 4619 mov r1, r3 800acb8: 68bb ldr r3, [r7, #8] 800acba: 440b add r3, r1 800acbc: 3237 adds r2, #55 @ 0x37 800acbe: b2d2 uxtb r2, r2 800acc0: 701a strb r2, [r3, #0] } value = value << 4; 800acc2: 68fb ldr r3, [r7, #12] 800acc4: 011b lsls r3, r3, #4 800acc6: 60fb str r3, [r7, #12] pbuf[2 * idx + 1] = 0; 800acc8: 7dfb ldrb r3, [r7, #23] 800acca: 005b lsls r3, r3, #1 800accc: 3301 adds r3, #1 800acce: 68ba ldr r2, [r7, #8] 800acd0: 4413 add r3, r2 800acd2: 2200 movs r2, #0 800acd4: 701a strb r2, [r3, #0] for (idx = 0; idx < len; idx++) 800acd6: 7dfb ldrb r3, [r7, #23] 800acd8: 3301 adds r3, #1 800acda: 75fb strb r3, [r7, #23] 800acdc: 7dfa ldrb r2, [r7, #23] 800acde: 79fb ldrb r3, [r7, #7] 800ace0: 429a cmp r2, r3 800ace2: d3d3 bcc.n 800ac8c } } 800ace4: bf00 nop 800ace6: bf00 nop 800ace8: 371c adds r7, #28 800acea: 46bd mov sp, r7 800acec: bc80 pop {r7} 800acee: 4770 bx lr 0800acf0 : LL Driver Callbacks (PCD -> USB Device Library) *******************************************************************************/ /* MSP Init */ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) { 800acf0: b580 push {r7, lr} 800acf2: b084 sub sp, #16 800acf4: af00 add r7, sp, #0 800acf6: 6078 str r0, [r7, #4] if(pcdHandle->Instance==USB) 800acf8: 687b ldr r3, [r7, #4] 800acfa: 681b ldr r3, [r3, #0] 800acfc: 4a0d ldr r2, [pc, #52] @ (800ad34 ) 800acfe: 4293 cmp r3, r2 800ad00: d113 bne.n 800ad2a { /* USER CODE BEGIN USB_MspInit 0 */ /* USER CODE END USB_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USB_CLK_ENABLE(); 800ad02: 4b0d ldr r3, [pc, #52] @ (800ad38 ) 800ad04: 69db ldr r3, [r3, #28] 800ad06: 4a0c ldr r2, [pc, #48] @ (800ad38 ) 800ad08: f443 0300 orr.w r3, r3, #8388608 @ 0x800000 800ad0c: 61d3 str r3, [r2, #28] 800ad0e: 4b0a ldr r3, [pc, #40] @ (800ad38 ) 800ad10: 69db ldr r3, [r3, #28] 800ad12: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800ad16: 60fb str r3, [r7, #12] 800ad18: 68fb ldr r3, [r7, #12] /* Peripheral interrupt init */ HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0); 800ad1a: 2200 movs r2, #0 800ad1c: 2100 movs r1, #0 800ad1e: 2014 movs r0, #20 800ad20: f7f7 ff0b bl 8002b3a HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn); 800ad24: 2014 movs r0, #20 800ad26: f7f7 ff24 bl 8002b72 /* USER CODE BEGIN USB_MspInit 1 */ /* USER CODE END USB_MspInit 1 */ } } 800ad2a: bf00 nop 800ad2c: 3710 adds r7, #16 800ad2e: 46bd mov sp, r7 800ad30: bd80 pop {r7, pc} 800ad32: bf00 nop 800ad34: 40005c00 .word 0x40005c00 800ad38: 40021000 .word 0x40021000 0800ad3c : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800ad3c: b580 push {r7, lr} 800ad3e: b082 sub sp, #8 800ad40: af00 add r7, sp, #0 800ad42: 6078 str r0, [r7, #4] USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); 800ad44: 687b ldr r3, [r7, #4] 800ad46: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800ad4a: 687b ldr r3, [r7, #4] 800ad4c: f503 7326 add.w r3, r3, #664 @ 0x298 800ad50: 4619 mov r1, r3 800ad52: 4610 mov r0, r2 800ad54: f7fe fd51 bl 80097fa } 800ad58: bf00 nop 800ad5a: 3708 adds r7, #8 800ad5c: 46bd mov sp, r7 800ad5e: bd80 pop {r7, pc} 0800ad60 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800ad60: b580 push {r7, lr} 800ad62: b082 sub sp, #8 800ad64: af00 add r7, sp, #0 800ad66: 6078 str r0, [r7, #4] 800ad68: 460b mov r3, r1 800ad6a: 70fb strb r3, [r7, #3] USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); 800ad6c: 687b ldr r3, [r7, #4] 800ad6e: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800ad72: 78fa ldrb r2, [r7, #3] 800ad74: 6879 ldr r1, [r7, #4] 800ad76: 4613 mov r3, r2 800ad78: 009b lsls r3, r3, #2 800ad7a: 4413 add r3, r2 800ad7c: 00db lsls r3, r3, #3 800ad7e: 440b add r3, r1 800ad80: f503 73b2 add.w r3, r3, #356 @ 0x164 800ad84: 681a ldr r2, [r3, #0] 800ad86: 78fb ldrb r3, [r7, #3] 800ad88: 4619 mov r1, r3 800ad8a: f7fe fd83 bl 8009894 } 800ad8e: bf00 nop 800ad90: 3708 adds r7, #8 800ad92: 46bd mov sp, r7 800ad94: bd80 pop {r7, pc} 0800ad96 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800ad96: b580 push {r7, lr} 800ad98: b082 sub sp, #8 800ad9a: af00 add r7, sp, #0 800ad9c: 6078 str r0, [r7, #4] 800ad9e: 460b mov r3, r1 800ada0: 70fb strb r3, [r7, #3] USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); 800ada2: 687b ldr r3, [r7, #4] 800ada4: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800ada8: 78fa ldrb r2, [r7, #3] 800adaa: 6879 ldr r1, [r7, #4] 800adac: 4613 mov r3, r2 800adae: 009b lsls r3, r3, #2 800adb0: 4413 add r3, r2 800adb2: 00db lsls r3, r3, #3 800adb4: 440b add r3, r1 800adb6: 3324 adds r3, #36 @ 0x24 800adb8: 681a ldr r2, [r3, #0] 800adba: 78fb ldrb r3, [r7, #3] 800adbc: 4619 mov r1, r3 800adbe: f7fe fdda bl 8009976 } 800adc2: bf00 nop 800adc4: 3708 adds r7, #8 800adc6: 46bd mov sp, r7 800adc8: bd80 pop {r7, pc} 0800adca : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800adca: b580 push {r7, lr} 800adcc: b082 sub sp, #8 800adce: af00 add r7, sp, #0 800add0: 6078 str r0, [r7, #4] USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); 800add2: 687b ldr r3, [r7, #4] 800add4: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800add8: 4618 mov r0, r3 800adda: f7fe feea bl 8009bb2 } 800adde: bf00 nop 800ade0: 3708 adds r7, #8 800ade2: 46bd mov sp, r7 800ade4: bd80 pop {r7, pc} 0800ade6 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800ade6: b580 push {r7, lr} 800ade8: b084 sub sp, #16 800adea: af00 add r7, sp, #0 800adec: 6078 str r0, [r7, #4] USBD_SpeedTypeDef speed = USBD_SPEED_FULL; 800adee: 2301 movs r3, #1 800adf0: 73fb strb r3, [r7, #15] if ( hpcd->Init.speed != PCD_SPEED_FULL) 800adf2: 687b ldr r3, [r7, #4] 800adf4: 799b ldrb r3, [r3, #6] 800adf6: 2b02 cmp r3, #2 800adf8: d001 beq.n 800adfe { Error_Handler(); 800adfa: f7f6 fd85 bl 8001908 } /* Set Speed. */ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); 800adfe: 687b ldr r3, [r7, #4] 800ae00: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800ae04: 7bfa ldrb r2, [r7, #15] 800ae06: 4611 mov r1, r2 800ae08: 4618 mov r0, r3 800ae0a: f7fe fe9a bl 8009b42 /* Reset Device. */ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); 800ae0e: 687b ldr r3, [r7, #4] 800ae10: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800ae14: 4618 mov r0, r3 800ae16: f7fe fe53 bl 8009ac0 } 800ae1a: bf00 nop 800ae1c: 3710 adds r7, #16 800ae1e: 46bd mov sp, r7 800ae20: bd80 pop {r7, pc} ... 0800ae24 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800ae24: b580 push {r7, lr} 800ae26: b082 sub sp, #8 800ae28: af00 add r7, sp, #0 800ae2a: 6078 str r0, [r7, #4] /* Inform USB library that core enters in suspend Mode. */ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); 800ae2c: 687b ldr r3, [r7, #4] 800ae2e: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800ae32: 4618 mov r0, r3 800ae34: f7fe fe94 bl 8009b60 /* Enter in STOP mode. */ /* USER CODE BEGIN 2 */ if (hpcd->Init.low_power_enable) 800ae38: 687b ldr r3, [r7, #4] 800ae3a: 7a9b ldrb r3, [r3, #10] 800ae3c: 2b00 cmp r3, #0 800ae3e: d005 beq.n 800ae4c { /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 800ae40: 4b04 ldr r3, [pc, #16] @ (800ae54 ) 800ae42: 691b ldr r3, [r3, #16] 800ae44: 4a03 ldr r2, [pc, #12] @ (800ae54 ) 800ae46: f043 0306 orr.w r3, r3, #6 800ae4a: 6113 str r3, [r2, #16] } /* USER CODE END 2 */ } 800ae4c: bf00 nop 800ae4e: 3708 adds r7, #8 800ae50: 46bd mov sp, r7 800ae52: bd80 pop {r7, pc} 800ae54: e000ed00 .word 0xe000ed00 0800ae58 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800ae58: b580 push {r7, lr} 800ae5a: b082 sub sp, #8 800ae5c: af00 add r7, sp, #0 800ae5e: 6078 str r0, [r7, #4] /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); 800ae60: 687b ldr r3, [r7, #4] 800ae62: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800ae66: 4618 mov r0, r3 800ae68: f7fe fe8e bl 8009b88 } 800ae6c: bf00 nop 800ae6e: 3708 adds r7, #8 800ae70: 46bd mov sp, r7 800ae72: bd80 pop {r7, pc} 0800ae74 : * @brief Initializes the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) { 800ae74: b580 push {r7, lr} 800ae76: b082 sub sp, #8 800ae78: af00 add r7, sp, #0 800ae7a: 6078 str r0, [r7, #4] /* Init USB Ip. */ /* Link the driver to the stack. */ hpcd_USB_FS.pData = pdev; 800ae7c: 4a28 ldr r2, [pc, #160] @ (800af20 ) 800ae7e: 687b ldr r3, [r7, #4] 800ae80: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4 pdev->pData = &hpcd_USB_FS; 800ae84: 687b ldr r3, [r7, #4] 800ae86: 4a26 ldr r2, [pc, #152] @ (800af20 ) 800ae88: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0 hpcd_USB_FS.Instance = USB; 800ae8c: 4b24 ldr r3, [pc, #144] @ (800af20 ) 800ae8e: 4a25 ldr r2, [pc, #148] @ (800af24 ) 800ae90: 601a str r2, [r3, #0] hpcd_USB_FS.Init.dev_endpoints = 8; 800ae92: 4b23 ldr r3, [pc, #140] @ (800af20 ) 800ae94: 2208 movs r2, #8 800ae96: 711a strb r2, [r3, #4] hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; 800ae98: 4b21 ldr r3, [pc, #132] @ (800af20 ) 800ae9a: 2202 movs r2, #2 800ae9c: 719a strb r2, [r3, #6] hpcd_USB_FS.Init.low_power_enable = DISABLE; 800ae9e: 4b20 ldr r3, [pc, #128] @ (800af20 ) 800aea0: 2200 movs r2, #0 800aea2: 729a strb r2, [r3, #10] hpcd_USB_FS.Init.lpm_enable = DISABLE; 800aea4: 4b1e ldr r3, [pc, #120] @ (800af20 ) 800aea6: 2200 movs r2, #0 800aea8: 72da strb r2, [r3, #11] hpcd_USB_FS.Init.battery_charging_enable = DISABLE; 800aeaa: 4b1d ldr r3, [pc, #116] @ (800af20 ) 800aeac: 2200 movs r2, #0 800aeae: 731a strb r2, [r3, #12] if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) 800aeb0: 481b ldr r0, [pc, #108] @ (800af20 ) 800aeb2: f7f8 fc39 bl 8003728 800aeb6: 4603 mov r3, r0 800aeb8: 2b00 cmp r3, #0 800aeba: d001 beq.n 800aec0 { Error_Handler( ); 800aebc: f7f6 fd24 bl 8001908 HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback); HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback); HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* USER CODE BEGIN EndPoint_Configuration */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18); 800aec0: 687b ldr r3, [r7, #4] 800aec2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800aec6: 2318 movs r3, #24 800aec8: 2200 movs r2, #0 800aeca: 2100 movs r1, #0 800aecc: f7fa f94a bl 8005164 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58); 800aed0: 687b ldr r3, [r7, #4] 800aed2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800aed6: 2358 movs r3, #88 @ 0x58 800aed8: 2200 movs r2, #0 800aeda: 2180 movs r1, #128 @ 0x80 800aedc: f7fa f942 bl 8005164 /* USER CODE END EndPoint_Configuration */ /* USER CODE BEGIN EndPoint_Configuration_CDC */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0); 800aee0: 687b ldr r3, [r7, #4] 800aee2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800aee6: 23c0 movs r3, #192 @ 0xc0 800aee8: 2200 movs r2, #0 800aeea: 2181 movs r1, #129 @ 0x81 800aeec: f7fa f93a bl 8005164 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110); 800aef0: 687b ldr r3, [r7, #4] 800aef2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800aef6: f44f 7388 mov.w r3, #272 @ 0x110 800aefa: 2200 movs r2, #0 800aefc: 2101 movs r1, #1 800aefe: f7fa f931 bl 8005164 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100); 800af02: 687b ldr r3, [r7, #4] 800af04: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800af08: f44f 7380 mov.w r3, #256 @ 0x100 800af0c: 2200 movs r2, #0 800af0e: 2182 movs r1, #130 @ 0x82 800af10: f7fa f928 bl 8005164 /* USER CODE END EndPoint_Configuration_CDC */ return USBD_OK; 800af14: 2300 movs r3, #0 } 800af16: 4618 mov r0, r3 800af18: 3708 adds r7, #8 800af1a: 46bd mov sp, r7 800af1c: bd80 pop {r7, pc} 800af1e: bf00 nop 800af20: 200011dc .word 0x200011dc 800af24: 40005c00 .word 0x40005c00 0800af28 : * @brief Starts the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) { 800af28: b580 push {r7, lr} 800af2a: b084 sub sp, #16 800af2c: af00 add r7, sp, #0 800af2e: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_status = HAL_OK; 800af30: 2300 movs r3, #0 800af32: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800af34: 2300 movs r3, #0 800af36: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_Start(pdev->pData); 800af38: 687b ldr r3, [r7, #4] 800af3a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800af3e: 4618 mov r0, r3 800af40: f7f8 fce8 bl 8003914 800af44: 4603 mov r3, r0 800af46: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800af48: 7bfb ldrb r3, [r7, #15] 800af4a: 4618 mov r0, r3 800af4c: f000 f94e bl 800b1ec 800af50: 4603 mov r3, r0 800af52: 73bb strb r3, [r7, #14] return usb_status; 800af54: 7bbb ldrb r3, [r7, #14] } 800af56: 4618 mov r0, r3 800af58: 3710 adds r7, #16 800af5a: 46bd mov sp, r7 800af5c: bd80 pop {r7, pc} 0800af5e : * @param ep_type: Endpoint type * @param ep_mps: Endpoint max packet size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) { 800af5e: b580 push {r7, lr} 800af60: b084 sub sp, #16 800af62: af00 add r7, sp, #0 800af64: 6078 str r0, [r7, #4] 800af66: 4608 mov r0, r1 800af68: 4611 mov r1, r2 800af6a: 461a mov r2, r3 800af6c: 4603 mov r3, r0 800af6e: 70fb strb r3, [r7, #3] 800af70: 460b mov r3, r1 800af72: 70bb strb r3, [r7, #2] 800af74: 4613 mov r3, r2 800af76: 803b strh r3, [r7, #0] HAL_StatusTypeDef hal_status = HAL_OK; 800af78: 2300 movs r3, #0 800af7a: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800af7c: 2300 movs r3, #0 800af7e: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); 800af80: 687b ldr r3, [r7, #4] 800af82: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800af86: 78bb ldrb r3, [r7, #2] 800af88: 883a ldrh r2, [r7, #0] 800af8a: 78f9 ldrb r1, [r7, #3] 800af8c: f7f8 fe3c bl 8003c08 800af90: 4603 mov r3, r0 800af92: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800af94: 7bfb ldrb r3, [r7, #15] 800af96: 4618 mov r0, r3 800af98: f000 f928 bl 800b1ec 800af9c: 4603 mov r3, r0 800af9e: 73bb strb r3, [r7, #14] return usb_status; 800afa0: 7bbb ldrb r3, [r7, #14] } 800afa2: 4618 mov r0, r3 800afa4: 3710 adds r7, #16 800afa6: 46bd mov sp, r7 800afa8: bd80 pop {r7, pc} 0800afaa : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800afaa: b580 push {r7, lr} 800afac: b084 sub sp, #16 800afae: af00 add r7, sp, #0 800afb0: 6078 str r0, [r7, #4] 800afb2: 460b mov r3, r1 800afb4: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800afb6: 2300 movs r3, #0 800afb8: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800afba: 2300 movs r3, #0 800afbc: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); 800afbe: 687b ldr r3, [r7, #4] 800afc0: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800afc4: 78fa ldrb r2, [r7, #3] 800afc6: 4611 mov r1, r2 800afc8: 4618 mov r0, r3 800afca: f7f8 fe7a bl 8003cc2 800afce: 4603 mov r3, r0 800afd0: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800afd2: 7bfb ldrb r3, [r7, #15] 800afd4: 4618 mov r0, r3 800afd6: f000 f909 bl 800b1ec 800afda: 4603 mov r3, r0 800afdc: 73bb strb r3, [r7, #14] return usb_status; 800afde: 7bbb ldrb r3, [r7, #14] } 800afe0: 4618 mov r0, r3 800afe2: 3710 adds r7, #16 800afe4: 46bd mov sp, r7 800afe6: bd80 pop {r7, pc} 0800afe8 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800afe8: b580 push {r7, lr} 800afea: b084 sub sp, #16 800afec: af00 add r7, sp, #0 800afee: 6078 str r0, [r7, #4] 800aff0: 460b mov r3, r1 800aff2: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800aff4: 2300 movs r3, #0 800aff6: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800aff8: 2300 movs r3, #0 800affa: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); 800affc: 687b ldr r3, [r7, #4] 800affe: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b002: 78fa ldrb r2, [r7, #3] 800b004: 4611 mov r1, r2 800b006: 4618 mov r0, r3 800b008: f7f8 ff22 bl 8003e50 800b00c: 4603 mov r3, r0 800b00e: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b010: 7bfb ldrb r3, [r7, #15] 800b012: 4618 mov r0, r3 800b014: f000 f8ea bl 800b1ec 800b018: 4603 mov r3, r0 800b01a: 73bb strb r3, [r7, #14] return usb_status; 800b01c: 7bbb ldrb r3, [r7, #14] } 800b01e: 4618 mov r0, r3 800b020: 3710 adds r7, #16 800b022: 46bd mov sp, r7 800b024: bd80 pop {r7, pc} 0800b026 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800b026: b580 push {r7, lr} 800b028: b084 sub sp, #16 800b02a: af00 add r7, sp, #0 800b02c: 6078 str r0, [r7, #4] 800b02e: 460b mov r3, r1 800b030: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800b032: 2300 movs r3, #0 800b034: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800b036: 2300 movs r3, #0 800b038: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); 800b03a: 687b ldr r3, [r7, #4] 800b03c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b040: 78fa ldrb r2, [r7, #3] 800b042: 4611 mov r1, r2 800b044: 4618 mov r0, r3 800b046: f7f8 ff63 bl 8003f10 800b04a: 4603 mov r3, r0 800b04c: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b04e: 7bfb ldrb r3, [r7, #15] 800b050: 4618 mov r0, r3 800b052: f000 f8cb bl 800b1ec 800b056: 4603 mov r3, r0 800b058: 73bb strb r3, [r7, #14] return usb_status; 800b05a: 7bbb ldrb r3, [r7, #14] } 800b05c: 4618 mov r0, r3 800b05e: 3710 adds r7, #16 800b060: 46bd mov sp, r7 800b062: bd80 pop {r7, pc} 0800b064 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Stall (1: Yes, 0: No) */ uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800b064: b480 push {r7} 800b066: b085 sub sp, #20 800b068: af00 add r7, sp, #0 800b06a: 6078 str r0, [r7, #4] 800b06c: 460b mov r3, r1 800b06e: 70fb strb r3, [r7, #3] PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; 800b070: 687b ldr r3, [r7, #4] 800b072: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b076: 60fb str r3, [r7, #12] if((ep_addr & 0x80) == 0x80) 800b078: f997 3003 ldrsb.w r3, [r7, #3] 800b07c: 2b00 cmp r3, #0 800b07e: da0b bge.n 800b098 { return hpcd->IN_ep[ep_addr & 0x7F].is_stall; 800b080: 78fb ldrb r3, [r7, #3] 800b082: f003 027f and.w r2, r3, #127 @ 0x7f 800b086: 68f9 ldr r1, [r7, #12] 800b088: 4613 mov r3, r2 800b08a: 009b lsls r3, r3, #2 800b08c: 4413 add r3, r2 800b08e: 00db lsls r3, r3, #3 800b090: 440b add r3, r1 800b092: 3312 adds r3, #18 800b094: 781b ldrb r3, [r3, #0] 800b096: e00b b.n 800b0b0 } else { return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; 800b098: 78fb ldrb r3, [r7, #3] 800b09a: f003 027f and.w r2, r3, #127 @ 0x7f 800b09e: 68f9 ldr r1, [r7, #12] 800b0a0: 4613 mov r3, r2 800b0a2: 009b lsls r3, r3, #2 800b0a4: 4413 add r3, r2 800b0a6: 00db lsls r3, r3, #3 800b0a8: 440b add r3, r1 800b0aa: f503 73a9 add.w r3, r3, #338 @ 0x152 800b0ae: 781b ldrb r3, [r3, #0] } } 800b0b0: 4618 mov r0, r3 800b0b2: 3714 adds r7, #20 800b0b4: 46bd mov sp, r7 800b0b6: bc80 pop {r7} 800b0b8: 4770 bx lr 0800b0ba : * @param pdev: Device handle * @param dev_addr: Device address * @retval USBD status */ USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) { 800b0ba: b580 push {r7, lr} 800b0bc: b084 sub sp, #16 800b0be: af00 add r7, sp, #0 800b0c0: 6078 str r0, [r7, #4] 800b0c2: 460b mov r3, r1 800b0c4: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800b0c6: 2300 movs r3, #0 800b0c8: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800b0ca: 2300 movs r3, #0 800b0cc: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); 800b0ce: 687b ldr r3, [r7, #4] 800b0d0: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b0d4: 78fa ldrb r2, [r7, #3] 800b0d6: 4611 mov r1, r2 800b0d8: 4618 mov r0, r3 800b0da: f7f8 fd71 bl 8003bc0 800b0de: 4603 mov r3, r0 800b0e0: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b0e2: 7bfb ldrb r3, [r7, #15] 800b0e4: 4618 mov r0, r3 800b0e6: f000 f881 bl 800b1ec 800b0ea: 4603 mov r3, r0 800b0ec: 73bb strb r3, [r7, #14] return usb_status; 800b0ee: 7bbb ldrb r3, [r7, #14] } 800b0f0: 4618 mov r0, r3 800b0f2: 3710 adds r7, #16 800b0f4: 46bd mov sp, r7 800b0f6: bd80 pop {r7, pc} 0800b0f8 : * @param pbuf: Pointer to data to be sent * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800b0f8: b580 push {r7, lr} 800b0fa: b086 sub sp, #24 800b0fc: af00 add r7, sp, #0 800b0fe: 60f8 str r0, [r7, #12] 800b100: 607a str r2, [r7, #4] 800b102: 461a mov r2, r3 800b104: 460b mov r3, r1 800b106: 72fb strb r3, [r7, #11] 800b108: 4613 mov r3, r2 800b10a: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800b10c: 2300 movs r3, #0 800b10e: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800b110: 2300 movs r3, #0 800b112: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); 800b114: 68fb ldr r3, [r7, #12] 800b116: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b11a: 893b ldrh r3, [r7, #8] 800b11c: 7af9 ldrb r1, [r7, #11] 800b11e: 687a ldr r2, [r7, #4] 800b120: f7f8 fe5f bl 8003de2 800b124: 4603 mov r3, r0 800b126: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800b128: 7dfb ldrb r3, [r7, #23] 800b12a: 4618 mov r0, r3 800b12c: f000 f85e bl 800b1ec 800b130: 4603 mov r3, r0 800b132: 75bb strb r3, [r7, #22] return usb_status; 800b134: 7dbb ldrb r3, [r7, #22] } 800b136: 4618 mov r0, r3 800b138: 3718 adds r7, #24 800b13a: 46bd mov sp, r7 800b13c: bd80 pop {r7, pc} 0800b13e : * @param pbuf: Pointer to data to be received * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800b13e: b580 push {r7, lr} 800b140: b086 sub sp, #24 800b142: af00 add r7, sp, #0 800b144: 60f8 str r0, [r7, #12] 800b146: 607a str r2, [r7, #4] 800b148: 461a mov r2, r3 800b14a: 460b mov r3, r1 800b14c: 72fb strb r3, [r7, #11] 800b14e: 4613 mov r3, r2 800b150: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800b152: 2300 movs r3, #0 800b154: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800b156: 2300 movs r3, #0 800b158: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); 800b15a: 68fb ldr r3, [r7, #12] 800b15c: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b160: 893b ldrh r3, [r7, #8] 800b162: 7af9 ldrb r1, [r7, #11] 800b164: 687a ldr r2, [r7, #4] 800b166: f7f8 fdf4 bl 8003d52 800b16a: 4603 mov r3, r0 800b16c: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800b16e: 7dfb ldrb r3, [r7, #23] 800b170: 4618 mov r0, r3 800b172: f000 f83b bl 800b1ec 800b176: 4603 mov r3, r0 800b178: 75bb strb r3, [r7, #22] return usb_status; 800b17a: 7dbb ldrb r3, [r7, #22] } 800b17c: 4618 mov r0, r3 800b17e: 3718 adds r7, #24 800b180: 46bd mov sp, r7 800b182: bd80 pop {r7, pc} 0800b184 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Received Data Size */ uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800b184: b580 push {r7, lr} 800b186: b082 sub sp, #8 800b188: af00 add r7, sp, #0 800b18a: 6078 str r0, [r7, #4] 800b18c: 460b mov r3, r1 800b18e: 70fb strb r3, [r7, #3] return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); 800b190: 687b ldr r3, [r7, #4] 800b192: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b196: 78fa ldrb r2, [r7, #3] 800b198: 4611 mov r1, r2 800b19a: 4618 mov r0, r3 800b19c: f7f8 fe0a bl 8003db4 800b1a0: 4603 mov r3, r0 } 800b1a2: 4618 mov r0, r3 800b1a4: 3708 adds r7, #8 800b1a6: 46bd mov sp, r7 800b1a8: bd80 pop {r7, pc} ... 0800b1ac : * @brief Static single allocation. * @param size: Size of allocated memory * @retval None */ void *USBD_static_malloc(uint32_t size) { 800b1ac: b480 push {r7} 800b1ae: b083 sub sp, #12 800b1b0: af00 add r7, sp, #0 800b1b2: 6078 str r0, [r7, #4] static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ return mem; 800b1b4: 4b02 ldr r3, [pc, #8] @ (800b1c0 ) } 800b1b6: 4618 mov r0, r3 800b1b8: 370c adds r7, #12 800b1ba: 46bd mov sp, r7 800b1bc: bc80 pop {r7} 800b1be: 4770 bx lr 800b1c0: 200014b4 .word 0x200014b4 0800b1c4 : * @brief Dummy memory free * @param p: Pointer to allocated memory address * @retval None */ void USBD_static_free(void *p) { 800b1c4: b480 push {r7} 800b1c6: b083 sub sp, #12 800b1c8: af00 add r7, sp, #0 800b1ca: 6078 str r0, [r7, #4] } 800b1cc: bf00 nop 800b1ce: 370c adds r7, #12 800b1d0: 46bd mov sp, r7 800b1d2: bc80 pop {r7} 800b1d4: 4770 bx lr 0800b1d6 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #else void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b1d6: b480 push {r7} 800b1d8: b083 sub sp, #12 800b1da: af00 add r7, sp, #0 800b1dc: 6078 str r0, [r7, #4] 800b1de: 460b mov r3, r1 800b1e0: 70fb strb r3, [r7, #3] { /* Configure High connection state. */ } /* USER CODE END 6 */ } 800b1e2: bf00 nop 800b1e4: 370c adds r7, #12 800b1e6: 46bd mov sp, r7 800b1e8: bc80 pop {r7} 800b1ea: 4770 bx lr 0800b1ec : * @brief Returns the USB status depending on the HAL status: * @param hal_status: HAL status * @retval USB status */ USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) { 800b1ec: b480 push {r7} 800b1ee: b085 sub sp, #20 800b1f0: af00 add r7, sp, #0 800b1f2: 4603 mov r3, r0 800b1f4: 71fb strb r3, [r7, #7] USBD_StatusTypeDef usb_status = USBD_OK; 800b1f6: 2300 movs r3, #0 800b1f8: 73fb strb r3, [r7, #15] switch (hal_status) 800b1fa: 79fb ldrb r3, [r7, #7] 800b1fc: 2b03 cmp r3, #3 800b1fe: d817 bhi.n 800b230 800b200: a201 add r2, pc, #4 @ (adr r2, 800b208 ) 800b202: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800b206: bf00 nop 800b208: 0800b219 .word 0x0800b219 800b20c: 0800b21f .word 0x0800b21f 800b210: 0800b225 .word 0x0800b225 800b214: 0800b22b .word 0x0800b22b { case HAL_OK : usb_status = USBD_OK; 800b218: 2300 movs r3, #0 800b21a: 73fb strb r3, [r7, #15] break; 800b21c: e00b b.n 800b236 case HAL_ERROR : usb_status = USBD_FAIL; 800b21e: 2302 movs r3, #2 800b220: 73fb strb r3, [r7, #15] break; 800b222: e008 b.n 800b236 case HAL_BUSY : usb_status = USBD_BUSY; 800b224: 2301 movs r3, #1 800b226: 73fb strb r3, [r7, #15] break; 800b228: e005 b.n 800b236 case HAL_TIMEOUT : usb_status = USBD_FAIL; 800b22a: 2302 movs r3, #2 800b22c: 73fb strb r3, [r7, #15] break; 800b22e: e002 b.n 800b236 default : usb_status = USBD_FAIL; 800b230: 2302 movs r3, #2 800b232: 73fb strb r3, [r7, #15] break; 800b234: bf00 nop } return usb_status; 800b236: 7bfb ldrb r3, [r7, #15] } 800b238: 4618 mov r0, r3 800b23a: 3714 adds r7, #20 800b23c: 46bd mov sp, r7 800b23e: bc80 pop {r7} 800b240: 4770 bx lr 800b242: bf00 nop 0800b244 : 800b244: b40e push {r1, r2, r3} 800b246: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000 800b24a: b510 push {r4, lr} 800b24c: 2400 movs r4, #0 800b24e: b09d sub sp, #116 @ 0x74 800b250: ab1f add r3, sp, #124 @ 0x7c 800b252: 9002 str r0, [sp, #8] 800b254: 9006 str r0, [sp, #24] 800b256: 9107 str r1, [sp, #28] 800b258: 9104 str r1, [sp, #16] 800b25a: 4809 ldr r0, [pc, #36] @ (800b280 ) 800b25c: 4909 ldr r1, [pc, #36] @ (800b284 ) 800b25e: f853 2b04 ldr.w r2, [r3], #4 800b262: 9105 str r1, [sp, #20] 800b264: 6800 ldr r0, [r0, #0] 800b266: a902 add r1, sp, #8 800b268: 9301 str r3, [sp, #4] 800b26a: 941b str r4, [sp, #108] @ 0x6c 800b26c: f000 f992 bl 800b594 <_svfiprintf_r> 800b270: 9b02 ldr r3, [sp, #8] 800b272: 701c strb r4, [r3, #0] 800b274: b01d add sp, #116 @ 0x74 800b276: e8bd 4010 ldmia.w sp!, {r4, lr} 800b27a: b003 add sp, #12 800b27c: 4770 bx lr 800b27e: bf00 nop 800b280: 20000180 .word 0x20000180 800b284: ffff0208 .word 0xffff0208 0800b288 : 800b288: 4603 mov r3, r0 800b28a: 4402 add r2, r0 800b28c: 4293 cmp r3, r2 800b28e: d100 bne.n 800b292 800b290: 4770 bx lr 800b292: f803 1b01 strb.w r1, [r3], #1 800b296: e7f9 b.n 800b28c 0800b298 <__errno>: 800b298: 4b01 ldr r3, [pc, #4] @ (800b2a0 <__errno+0x8>) 800b29a: 6818 ldr r0, [r3, #0] 800b29c: 4770 bx lr 800b29e: bf00 nop 800b2a0: 20000180 .word 0x20000180 0800b2a4 <__libc_init_array>: 800b2a4: b570 push {r4, r5, r6, lr} 800b2a6: 2600 movs r6, #0 800b2a8: 4d0c ldr r5, [pc, #48] @ (800b2dc <__libc_init_array+0x38>) 800b2aa: 4c0d ldr r4, [pc, #52] @ (800b2e0 <__libc_init_array+0x3c>) 800b2ac: 1b64 subs r4, r4, r5 800b2ae: 10a4 asrs r4, r4, #2 800b2b0: 42a6 cmp r6, r4 800b2b2: d109 bne.n 800b2c8 <__libc_init_array+0x24> 800b2b4: f000 fc76 bl 800bba4 <_init> 800b2b8: 2600 movs r6, #0 800b2ba: 4d0a ldr r5, [pc, #40] @ (800b2e4 <__libc_init_array+0x40>) 800b2bc: 4c0a ldr r4, [pc, #40] @ (800b2e8 <__libc_init_array+0x44>) 800b2be: 1b64 subs r4, r4, r5 800b2c0: 10a4 asrs r4, r4, #2 800b2c2: 42a6 cmp r6, r4 800b2c4: d105 bne.n 800b2d2 <__libc_init_array+0x2e> 800b2c6: bd70 pop {r4, r5, r6, pc} 800b2c8: f855 3b04 ldr.w r3, [r5], #4 800b2cc: 4798 blx r3 800b2ce: 3601 adds r6, #1 800b2d0: e7ee b.n 800b2b0 <__libc_init_array+0xc> 800b2d2: f855 3b04 ldr.w r3, [r5], #4 800b2d6: 4798 blx r3 800b2d8: 3601 adds r6, #1 800b2da: e7f2 b.n 800b2c2 <__libc_init_array+0x1e> 800b2dc: 0800be90 .word 0x0800be90 800b2e0: 0800be90 .word 0x0800be90 800b2e4: 0800be90 .word 0x0800be90 800b2e8: 0800be94 .word 0x0800be94 0800b2ec <__retarget_lock_acquire_recursive>: 800b2ec: 4770 bx lr 0800b2ee <__retarget_lock_release_recursive>: 800b2ee: 4770 bx lr 0800b2f0 <_free_r>: 800b2f0: b538 push {r3, r4, r5, lr} 800b2f2: 4605 mov r5, r0 800b2f4: 2900 cmp r1, #0 800b2f6: d040 beq.n 800b37a <_free_r+0x8a> 800b2f8: f851 3c04 ldr.w r3, [r1, #-4] 800b2fc: 1f0c subs r4, r1, #4 800b2fe: 2b00 cmp r3, #0 800b300: bfb8 it lt 800b302: 18e4 addlt r4, r4, r3 800b304: f000 f8de bl 800b4c4 <__malloc_lock> 800b308: 4a1c ldr r2, [pc, #112] @ (800b37c <_free_r+0x8c>) 800b30a: 6813 ldr r3, [r2, #0] 800b30c: b933 cbnz r3, 800b31c <_free_r+0x2c> 800b30e: 6063 str r3, [r4, #4] 800b310: 6014 str r4, [r2, #0] 800b312: 4628 mov r0, r5 800b314: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800b318: f000 b8da b.w 800b4d0 <__malloc_unlock> 800b31c: 42a3 cmp r3, r4 800b31e: d908 bls.n 800b332 <_free_r+0x42> 800b320: 6820 ldr r0, [r4, #0] 800b322: 1821 adds r1, r4, r0 800b324: 428b cmp r3, r1 800b326: bf01 itttt eq 800b328: 6819 ldreq r1, [r3, #0] 800b32a: 685b ldreq r3, [r3, #4] 800b32c: 1809 addeq r1, r1, r0 800b32e: 6021 streq r1, [r4, #0] 800b330: e7ed b.n 800b30e <_free_r+0x1e> 800b332: 461a mov r2, r3 800b334: 685b ldr r3, [r3, #4] 800b336: b10b cbz r3, 800b33c <_free_r+0x4c> 800b338: 42a3 cmp r3, r4 800b33a: d9fa bls.n 800b332 <_free_r+0x42> 800b33c: 6811 ldr r1, [r2, #0] 800b33e: 1850 adds r0, r2, r1 800b340: 42a0 cmp r0, r4 800b342: d10b bne.n 800b35c <_free_r+0x6c> 800b344: 6820 ldr r0, [r4, #0] 800b346: 4401 add r1, r0 800b348: 1850 adds r0, r2, r1 800b34a: 4283 cmp r3, r0 800b34c: 6011 str r1, [r2, #0] 800b34e: d1e0 bne.n 800b312 <_free_r+0x22> 800b350: 6818 ldr r0, [r3, #0] 800b352: 685b ldr r3, [r3, #4] 800b354: 4408 add r0, r1 800b356: 6010 str r0, [r2, #0] 800b358: 6053 str r3, [r2, #4] 800b35a: e7da b.n 800b312 <_free_r+0x22> 800b35c: d902 bls.n 800b364 <_free_r+0x74> 800b35e: 230c movs r3, #12 800b360: 602b str r3, [r5, #0] 800b362: e7d6 b.n 800b312 <_free_r+0x22> 800b364: 6820 ldr r0, [r4, #0] 800b366: 1821 adds r1, r4, r0 800b368: 428b cmp r3, r1 800b36a: bf01 itttt eq 800b36c: 6819 ldreq r1, [r3, #0] 800b36e: 685b ldreq r3, [r3, #4] 800b370: 1809 addeq r1, r1, r0 800b372: 6021 streq r1, [r4, #0] 800b374: 6063 str r3, [r4, #4] 800b376: 6054 str r4, [r2, #4] 800b378: e7cb b.n 800b312 <_free_r+0x22> 800b37a: bd38 pop {r3, r4, r5, pc} 800b37c: 20001818 .word 0x20001818 0800b380 : 800b380: b570 push {r4, r5, r6, lr} 800b382: 4e0f ldr r6, [pc, #60] @ (800b3c0 ) 800b384: 460c mov r4, r1 800b386: 6831 ldr r1, [r6, #0] 800b388: 4605 mov r5, r0 800b38a: b911 cbnz r1, 800b392 800b38c: f000 fba8 bl 800bae0 <_sbrk_r> 800b390: 6030 str r0, [r6, #0] 800b392: 4621 mov r1, r4 800b394: 4628 mov r0, r5 800b396: f000 fba3 bl 800bae0 <_sbrk_r> 800b39a: 1c43 adds r3, r0, #1 800b39c: d103 bne.n 800b3a6 800b39e: f04f 34ff mov.w r4, #4294967295 800b3a2: 4620 mov r0, r4 800b3a4: bd70 pop {r4, r5, r6, pc} 800b3a6: 1cc4 adds r4, r0, #3 800b3a8: f024 0403 bic.w r4, r4, #3 800b3ac: 42a0 cmp r0, r4 800b3ae: d0f8 beq.n 800b3a2 800b3b0: 1a21 subs r1, r4, r0 800b3b2: 4628 mov r0, r5 800b3b4: f000 fb94 bl 800bae0 <_sbrk_r> 800b3b8: 3001 adds r0, #1 800b3ba: d1f2 bne.n 800b3a2 800b3bc: e7ef b.n 800b39e 800b3be: bf00 nop 800b3c0: 20001814 .word 0x20001814 0800b3c4 <_malloc_r>: 800b3c4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800b3c8: 1ccd adds r5, r1, #3 800b3ca: f025 0503 bic.w r5, r5, #3 800b3ce: 3508 adds r5, #8 800b3d0: 2d0c cmp r5, #12 800b3d2: bf38 it cc 800b3d4: 250c movcc r5, #12 800b3d6: 2d00 cmp r5, #0 800b3d8: 4606 mov r6, r0 800b3da: db01 blt.n 800b3e0 <_malloc_r+0x1c> 800b3dc: 42a9 cmp r1, r5 800b3de: d904 bls.n 800b3ea <_malloc_r+0x26> 800b3e0: 230c movs r3, #12 800b3e2: 6033 str r3, [r6, #0] 800b3e4: 2000 movs r0, #0 800b3e6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800b3ea: f8df 80d4 ldr.w r8, [pc, #212] @ 800b4c0 <_malloc_r+0xfc> 800b3ee: f000 f869 bl 800b4c4 <__malloc_lock> 800b3f2: f8d8 3000 ldr.w r3, [r8] 800b3f6: 461c mov r4, r3 800b3f8: bb44 cbnz r4, 800b44c <_malloc_r+0x88> 800b3fa: 4629 mov r1, r5 800b3fc: 4630 mov r0, r6 800b3fe: f7ff ffbf bl 800b380 800b402: 1c43 adds r3, r0, #1 800b404: 4604 mov r4, r0 800b406: d158 bne.n 800b4ba <_malloc_r+0xf6> 800b408: f8d8 4000 ldr.w r4, [r8] 800b40c: 4627 mov r7, r4 800b40e: 2f00 cmp r7, #0 800b410: d143 bne.n 800b49a <_malloc_r+0xd6> 800b412: 2c00 cmp r4, #0 800b414: d04b beq.n 800b4ae <_malloc_r+0xea> 800b416: 6823 ldr r3, [r4, #0] 800b418: 4639 mov r1, r7 800b41a: 4630 mov r0, r6 800b41c: eb04 0903 add.w r9, r4, r3 800b420: f000 fb5e bl 800bae0 <_sbrk_r> 800b424: 4581 cmp r9, r0 800b426: d142 bne.n 800b4ae <_malloc_r+0xea> 800b428: 6821 ldr r1, [r4, #0] 800b42a: 4630 mov r0, r6 800b42c: 1a6d subs r5, r5, r1 800b42e: 4629 mov r1, r5 800b430: f7ff ffa6 bl 800b380 800b434: 3001 adds r0, #1 800b436: d03a beq.n 800b4ae <_malloc_r+0xea> 800b438: 6823 ldr r3, [r4, #0] 800b43a: 442b add r3, r5 800b43c: 6023 str r3, [r4, #0] 800b43e: f8d8 3000 ldr.w r3, [r8] 800b442: 685a ldr r2, [r3, #4] 800b444: bb62 cbnz r2, 800b4a0 <_malloc_r+0xdc> 800b446: f8c8 7000 str.w r7, [r8] 800b44a: e00f b.n 800b46c <_malloc_r+0xa8> 800b44c: 6822 ldr r2, [r4, #0] 800b44e: 1b52 subs r2, r2, r5 800b450: d420 bmi.n 800b494 <_malloc_r+0xd0> 800b452: 2a0b cmp r2, #11 800b454: d917 bls.n 800b486 <_malloc_r+0xc2> 800b456: 1961 adds r1, r4, r5 800b458: 42a3 cmp r3, r4 800b45a: 6025 str r5, [r4, #0] 800b45c: bf18 it ne 800b45e: 6059 strne r1, [r3, #4] 800b460: 6863 ldr r3, [r4, #4] 800b462: bf08 it eq 800b464: f8c8 1000 streq.w r1, [r8] 800b468: 5162 str r2, [r4, r5] 800b46a: 604b str r3, [r1, #4] 800b46c: 4630 mov r0, r6 800b46e: f000 f82f bl 800b4d0 <__malloc_unlock> 800b472: f104 000b add.w r0, r4, #11 800b476: 1d23 adds r3, r4, #4 800b478: f020 0007 bic.w r0, r0, #7 800b47c: 1ac2 subs r2, r0, r3 800b47e: bf1c itt ne 800b480: 1a1b subne r3, r3, r0 800b482: 50a3 strne r3, [r4, r2] 800b484: e7af b.n 800b3e6 <_malloc_r+0x22> 800b486: 6862 ldr r2, [r4, #4] 800b488: 42a3 cmp r3, r4 800b48a: bf0c ite eq 800b48c: f8c8 2000 streq.w r2, [r8] 800b490: 605a strne r2, [r3, #4] 800b492: e7eb b.n 800b46c <_malloc_r+0xa8> 800b494: 4623 mov r3, r4 800b496: 6864 ldr r4, [r4, #4] 800b498: e7ae b.n 800b3f8 <_malloc_r+0x34> 800b49a: 463c mov r4, r7 800b49c: 687f ldr r7, [r7, #4] 800b49e: e7b6 b.n 800b40e <_malloc_r+0x4a> 800b4a0: 461a mov r2, r3 800b4a2: 685b ldr r3, [r3, #4] 800b4a4: 42a3 cmp r3, r4 800b4a6: d1fb bne.n 800b4a0 <_malloc_r+0xdc> 800b4a8: 2300 movs r3, #0 800b4aa: 6053 str r3, [r2, #4] 800b4ac: e7de b.n 800b46c <_malloc_r+0xa8> 800b4ae: 230c movs r3, #12 800b4b0: 4630 mov r0, r6 800b4b2: 6033 str r3, [r6, #0] 800b4b4: f000 f80c bl 800b4d0 <__malloc_unlock> 800b4b8: e794 b.n 800b3e4 <_malloc_r+0x20> 800b4ba: 6005 str r5, [r0, #0] 800b4bc: e7d6 b.n 800b46c <_malloc_r+0xa8> 800b4be: bf00 nop 800b4c0: 20001818 .word 0x20001818 0800b4c4 <__malloc_lock>: 800b4c4: 4801 ldr r0, [pc, #4] @ (800b4cc <__malloc_lock+0x8>) 800b4c6: f7ff bf11 b.w 800b2ec <__retarget_lock_acquire_recursive> 800b4ca: bf00 nop 800b4cc: 20001810 .word 0x20001810 0800b4d0 <__malloc_unlock>: 800b4d0: 4801 ldr r0, [pc, #4] @ (800b4d8 <__malloc_unlock+0x8>) 800b4d2: f7ff bf0c b.w 800b2ee <__retarget_lock_release_recursive> 800b4d6: bf00 nop 800b4d8: 20001810 .word 0x20001810 0800b4dc <__ssputs_r>: 800b4dc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800b4e0: 461f mov r7, r3 800b4e2: 688e ldr r6, [r1, #8] 800b4e4: 4682 mov sl, r0 800b4e6: 42be cmp r6, r7 800b4e8: 460c mov r4, r1 800b4ea: 4690 mov r8, r2 800b4ec: 680b ldr r3, [r1, #0] 800b4ee: d82d bhi.n 800b54c <__ssputs_r+0x70> 800b4f0: f9b1 200c ldrsh.w r2, [r1, #12] 800b4f4: f412 6f90 tst.w r2, #1152 @ 0x480 800b4f8: d026 beq.n 800b548 <__ssputs_r+0x6c> 800b4fa: 6965 ldr r5, [r4, #20] 800b4fc: 6909 ldr r1, [r1, #16] 800b4fe: eb05 0545 add.w r5, r5, r5, lsl #1 800b502: eba3 0901 sub.w r9, r3, r1 800b506: eb05 75d5 add.w r5, r5, r5, lsr #31 800b50a: 1c7b adds r3, r7, #1 800b50c: 444b add r3, r9 800b50e: 106d asrs r5, r5, #1 800b510: 429d cmp r5, r3 800b512: bf38 it cc 800b514: 461d movcc r5, r3 800b516: 0553 lsls r3, r2, #21 800b518: d527 bpl.n 800b56a <__ssputs_r+0x8e> 800b51a: 4629 mov r1, r5 800b51c: f7ff ff52 bl 800b3c4 <_malloc_r> 800b520: 4606 mov r6, r0 800b522: b360 cbz r0, 800b57e <__ssputs_r+0xa2> 800b524: 464a mov r2, r9 800b526: 6921 ldr r1, [r4, #16] 800b528: f000 faf8 bl 800bb1c 800b52c: 89a3 ldrh r3, [r4, #12] 800b52e: f423 6390 bic.w r3, r3, #1152 @ 0x480 800b532: f043 0380 orr.w r3, r3, #128 @ 0x80 800b536: 81a3 strh r3, [r4, #12] 800b538: 6126 str r6, [r4, #16] 800b53a: 444e add r6, r9 800b53c: 6026 str r6, [r4, #0] 800b53e: 463e mov r6, r7 800b540: 6165 str r5, [r4, #20] 800b542: eba5 0509 sub.w r5, r5, r9 800b546: 60a5 str r5, [r4, #8] 800b548: 42be cmp r6, r7 800b54a: d900 bls.n 800b54e <__ssputs_r+0x72> 800b54c: 463e mov r6, r7 800b54e: 4632 mov r2, r6 800b550: 4641 mov r1, r8 800b552: 6820 ldr r0, [r4, #0] 800b554: f000 faaa bl 800baac 800b558: 2000 movs r0, #0 800b55a: 68a3 ldr r3, [r4, #8] 800b55c: 1b9b subs r3, r3, r6 800b55e: 60a3 str r3, [r4, #8] 800b560: 6823 ldr r3, [r4, #0] 800b562: 4433 add r3, r6 800b564: 6023 str r3, [r4, #0] 800b566: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b56a: 462a mov r2, r5 800b56c: f000 fae4 bl 800bb38 <_realloc_r> 800b570: 4606 mov r6, r0 800b572: 2800 cmp r0, #0 800b574: d1e0 bne.n 800b538 <__ssputs_r+0x5c> 800b576: 4650 mov r0, sl 800b578: 6921 ldr r1, [r4, #16] 800b57a: f7ff feb9 bl 800b2f0 <_free_r> 800b57e: 230c movs r3, #12 800b580: f8ca 3000 str.w r3, [sl] 800b584: 89a3 ldrh r3, [r4, #12] 800b586: f04f 30ff mov.w r0, #4294967295 800b58a: f043 0340 orr.w r3, r3, #64 @ 0x40 800b58e: 81a3 strh r3, [r4, #12] 800b590: e7e9 b.n 800b566 <__ssputs_r+0x8a> ... 0800b594 <_svfiprintf_r>: 800b594: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800b598: 4698 mov r8, r3 800b59a: 898b ldrh r3, [r1, #12] 800b59c: 4607 mov r7, r0 800b59e: 061b lsls r3, r3, #24 800b5a0: 460d mov r5, r1 800b5a2: 4614 mov r4, r2 800b5a4: b09d sub sp, #116 @ 0x74 800b5a6: d510 bpl.n 800b5ca <_svfiprintf_r+0x36> 800b5a8: 690b ldr r3, [r1, #16] 800b5aa: b973 cbnz r3, 800b5ca <_svfiprintf_r+0x36> 800b5ac: 2140 movs r1, #64 @ 0x40 800b5ae: f7ff ff09 bl 800b3c4 <_malloc_r> 800b5b2: 6028 str r0, [r5, #0] 800b5b4: 6128 str r0, [r5, #16] 800b5b6: b930 cbnz r0, 800b5c6 <_svfiprintf_r+0x32> 800b5b8: 230c movs r3, #12 800b5ba: 603b str r3, [r7, #0] 800b5bc: f04f 30ff mov.w r0, #4294967295 800b5c0: b01d add sp, #116 @ 0x74 800b5c2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800b5c6: 2340 movs r3, #64 @ 0x40 800b5c8: 616b str r3, [r5, #20] 800b5ca: 2300 movs r3, #0 800b5cc: 9309 str r3, [sp, #36] @ 0x24 800b5ce: 2320 movs r3, #32 800b5d0: f88d 3029 strb.w r3, [sp, #41] @ 0x29 800b5d4: 2330 movs r3, #48 @ 0x30 800b5d6: f04f 0901 mov.w r9, #1 800b5da: f8cd 800c str.w r8, [sp, #12] 800b5de: f8df 8198 ldr.w r8, [pc, #408] @ 800b778 <_svfiprintf_r+0x1e4> 800b5e2: f88d 302a strb.w r3, [sp, #42] @ 0x2a 800b5e6: 4623 mov r3, r4 800b5e8: 469a mov sl, r3 800b5ea: f813 2b01 ldrb.w r2, [r3], #1 800b5ee: b10a cbz r2, 800b5f4 <_svfiprintf_r+0x60> 800b5f0: 2a25 cmp r2, #37 @ 0x25 800b5f2: d1f9 bne.n 800b5e8 <_svfiprintf_r+0x54> 800b5f4: ebba 0b04 subs.w fp, sl, r4 800b5f8: d00b beq.n 800b612 <_svfiprintf_r+0x7e> 800b5fa: 465b mov r3, fp 800b5fc: 4622 mov r2, r4 800b5fe: 4629 mov r1, r5 800b600: 4638 mov r0, r7 800b602: f7ff ff6b bl 800b4dc <__ssputs_r> 800b606: 3001 adds r0, #1 800b608: f000 80a7 beq.w 800b75a <_svfiprintf_r+0x1c6> 800b60c: 9a09 ldr r2, [sp, #36] @ 0x24 800b60e: 445a add r2, fp 800b610: 9209 str r2, [sp, #36] @ 0x24 800b612: f89a 3000 ldrb.w r3, [sl] 800b616: 2b00 cmp r3, #0 800b618: f000 809f beq.w 800b75a <_svfiprintf_r+0x1c6> 800b61c: 2300 movs r3, #0 800b61e: f04f 32ff mov.w r2, #4294967295 800b622: e9cd 2305 strd r2, r3, [sp, #20] 800b626: f10a 0a01 add.w sl, sl, #1 800b62a: 9304 str r3, [sp, #16] 800b62c: 9307 str r3, [sp, #28] 800b62e: f88d 3053 strb.w r3, [sp, #83] @ 0x53 800b632: 931a str r3, [sp, #104] @ 0x68 800b634: 4654 mov r4, sl 800b636: 2205 movs r2, #5 800b638: f814 1b01 ldrb.w r1, [r4], #1 800b63c: 484e ldr r0, [pc, #312] @ (800b778 <_svfiprintf_r+0x1e4>) 800b63e: f000 fa5f bl 800bb00 800b642: 9a04 ldr r2, [sp, #16] 800b644: b9d8 cbnz r0, 800b67e <_svfiprintf_r+0xea> 800b646: 06d0 lsls r0, r2, #27 800b648: bf44 itt mi 800b64a: 2320 movmi r3, #32 800b64c: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800b650: 0711 lsls r1, r2, #28 800b652: bf44 itt mi 800b654: 232b movmi r3, #43 @ 0x2b 800b656: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800b65a: f89a 3000 ldrb.w r3, [sl] 800b65e: 2b2a cmp r3, #42 @ 0x2a 800b660: d015 beq.n 800b68e <_svfiprintf_r+0xfa> 800b662: 4654 mov r4, sl 800b664: 2000 movs r0, #0 800b666: f04f 0c0a mov.w ip, #10 800b66a: 9a07 ldr r2, [sp, #28] 800b66c: 4621 mov r1, r4 800b66e: f811 3b01 ldrb.w r3, [r1], #1 800b672: 3b30 subs r3, #48 @ 0x30 800b674: 2b09 cmp r3, #9 800b676: d94b bls.n 800b710 <_svfiprintf_r+0x17c> 800b678: b1b0 cbz r0, 800b6a8 <_svfiprintf_r+0x114> 800b67a: 9207 str r2, [sp, #28] 800b67c: e014 b.n 800b6a8 <_svfiprintf_r+0x114> 800b67e: eba0 0308 sub.w r3, r0, r8 800b682: fa09 f303 lsl.w r3, r9, r3 800b686: 4313 orrs r3, r2 800b688: 46a2 mov sl, r4 800b68a: 9304 str r3, [sp, #16] 800b68c: e7d2 b.n 800b634 <_svfiprintf_r+0xa0> 800b68e: 9b03 ldr r3, [sp, #12] 800b690: 1d19 adds r1, r3, #4 800b692: 681b ldr r3, [r3, #0] 800b694: 9103 str r1, [sp, #12] 800b696: 2b00 cmp r3, #0 800b698: bfbb ittet lt 800b69a: 425b neglt r3, r3 800b69c: f042 0202 orrlt.w r2, r2, #2 800b6a0: 9307 strge r3, [sp, #28] 800b6a2: 9307 strlt r3, [sp, #28] 800b6a4: bfb8 it lt 800b6a6: 9204 strlt r2, [sp, #16] 800b6a8: 7823 ldrb r3, [r4, #0] 800b6aa: 2b2e cmp r3, #46 @ 0x2e 800b6ac: d10a bne.n 800b6c4 <_svfiprintf_r+0x130> 800b6ae: 7863 ldrb r3, [r4, #1] 800b6b0: 2b2a cmp r3, #42 @ 0x2a 800b6b2: d132 bne.n 800b71a <_svfiprintf_r+0x186> 800b6b4: 9b03 ldr r3, [sp, #12] 800b6b6: 3402 adds r4, #2 800b6b8: 1d1a adds r2, r3, #4 800b6ba: 681b ldr r3, [r3, #0] 800b6bc: 9203 str r2, [sp, #12] 800b6be: ea43 73e3 orr.w r3, r3, r3, asr #31 800b6c2: 9305 str r3, [sp, #20] 800b6c4: f8df a0b4 ldr.w sl, [pc, #180] @ 800b77c <_svfiprintf_r+0x1e8> 800b6c8: 2203 movs r2, #3 800b6ca: 4650 mov r0, sl 800b6cc: 7821 ldrb r1, [r4, #0] 800b6ce: f000 fa17 bl 800bb00 800b6d2: b138 cbz r0, 800b6e4 <_svfiprintf_r+0x150> 800b6d4: 2240 movs r2, #64 @ 0x40 800b6d6: 9b04 ldr r3, [sp, #16] 800b6d8: eba0 000a sub.w r0, r0, sl 800b6dc: 4082 lsls r2, r0 800b6de: 4313 orrs r3, r2 800b6e0: 3401 adds r4, #1 800b6e2: 9304 str r3, [sp, #16] 800b6e4: f814 1b01 ldrb.w r1, [r4], #1 800b6e8: 2206 movs r2, #6 800b6ea: 4825 ldr r0, [pc, #148] @ (800b780 <_svfiprintf_r+0x1ec>) 800b6ec: f88d 1028 strb.w r1, [sp, #40] @ 0x28 800b6f0: f000 fa06 bl 800bb00 800b6f4: 2800 cmp r0, #0 800b6f6: d036 beq.n 800b766 <_svfiprintf_r+0x1d2> 800b6f8: 4b22 ldr r3, [pc, #136] @ (800b784 <_svfiprintf_r+0x1f0>) 800b6fa: bb1b cbnz r3, 800b744 <_svfiprintf_r+0x1b0> 800b6fc: 9b03 ldr r3, [sp, #12] 800b6fe: 3307 adds r3, #7 800b700: f023 0307 bic.w r3, r3, #7 800b704: 3308 adds r3, #8 800b706: 9303 str r3, [sp, #12] 800b708: 9b09 ldr r3, [sp, #36] @ 0x24 800b70a: 4433 add r3, r6 800b70c: 9309 str r3, [sp, #36] @ 0x24 800b70e: e76a b.n 800b5e6 <_svfiprintf_r+0x52> 800b710: 460c mov r4, r1 800b712: 2001 movs r0, #1 800b714: fb0c 3202 mla r2, ip, r2, r3 800b718: e7a8 b.n 800b66c <_svfiprintf_r+0xd8> 800b71a: 2300 movs r3, #0 800b71c: f04f 0c0a mov.w ip, #10 800b720: 4619 mov r1, r3 800b722: 3401 adds r4, #1 800b724: 9305 str r3, [sp, #20] 800b726: 4620 mov r0, r4 800b728: f810 2b01 ldrb.w r2, [r0], #1 800b72c: 3a30 subs r2, #48 @ 0x30 800b72e: 2a09 cmp r2, #9 800b730: d903 bls.n 800b73a <_svfiprintf_r+0x1a6> 800b732: 2b00 cmp r3, #0 800b734: d0c6 beq.n 800b6c4 <_svfiprintf_r+0x130> 800b736: 9105 str r1, [sp, #20] 800b738: e7c4 b.n 800b6c4 <_svfiprintf_r+0x130> 800b73a: 4604 mov r4, r0 800b73c: 2301 movs r3, #1 800b73e: fb0c 2101 mla r1, ip, r1, r2 800b742: e7f0 b.n 800b726 <_svfiprintf_r+0x192> 800b744: ab03 add r3, sp, #12 800b746: 9300 str r3, [sp, #0] 800b748: 462a mov r2, r5 800b74a: 4638 mov r0, r7 800b74c: 4b0e ldr r3, [pc, #56] @ (800b788 <_svfiprintf_r+0x1f4>) 800b74e: a904 add r1, sp, #16 800b750: f3af 8000 nop.w 800b754: 1c42 adds r2, r0, #1 800b756: 4606 mov r6, r0 800b758: d1d6 bne.n 800b708 <_svfiprintf_r+0x174> 800b75a: 89ab ldrh r3, [r5, #12] 800b75c: 065b lsls r3, r3, #25 800b75e: f53f af2d bmi.w 800b5bc <_svfiprintf_r+0x28> 800b762: 9809 ldr r0, [sp, #36] @ 0x24 800b764: e72c b.n 800b5c0 <_svfiprintf_r+0x2c> 800b766: ab03 add r3, sp, #12 800b768: 9300 str r3, [sp, #0] 800b76a: 462a mov r2, r5 800b76c: 4638 mov r0, r7 800b76e: 4b06 ldr r3, [pc, #24] @ (800b788 <_svfiprintf_r+0x1f4>) 800b770: a904 add r1, sp, #16 800b772: f000 f87d bl 800b870 <_printf_i> 800b776: e7ed b.n 800b754 <_svfiprintf_r+0x1c0> 800b778: 0800be52 .word 0x0800be52 800b77c: 0800be58 .word 0x0800be58 800b780: 0800be5c .word 0x0800be5c 800b784: 00000000 .word 0x00000000 800b788: 0800b4dd .word 0x0800b4dd 0800b78c <_printf_common>: 800b78c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800b790: 4616 mov r6, r2 800b792: 4698 mov r8, r3 800b794: 688a ldr r2, [r1, #8] 800b796: 690b ldr r3, [r1, #16] 800b798: 4607 mov r7, r0 800b79a: 4293 cmp r3, r2 800b79c: bfb8 it lt 800b79e: 4613 movlt r3, r2 800b7a0: 6033 str r3, [r6, #0] 800b7a2: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 800b7a6: 460c mov r4, r1 800b7a8: f8dd 9020 ldr.w r9, [sp, #32] 800b7ac: b10a cbz r2, 800b7b2 <_printf_common+0x26> 800b7ae: 3301 adds r3, #1 800b7b0: 6033 str r3, [r6, #0] 800b7b2: 6823 ldr r3, [r4, #0] 800b7b4: 0699 lsls r1, r3, #26 800b7b6: bf42 ittt mi 800b7b8: 6833 ldrmi r3, [r6, #0] 800b7ba: 3302 addmi r3, #2 800b7bc: 6033 strmi r3, [r6, #0] 800b7be: 6825 ldr r5, [r4, #0] 800b7c0: f015 0506 ands.w r5, r5, #6 800b7c4: d106 bne.n 800b7d4 <_printf_common+0x48> 800b7c6: f104 0a19 add.w sl, r4, #25 800b7ca: 68e3 ldr r3, [r4, #12] 800b7cc: 6832 ldr r2, [r6, #0] 800b7ce: 1a9b subs r3, r3, r2 800b7d0: 42ab cmp r3, r5 800b7d2: dc2b bgt.n 800b82c <_printf_common+0xa0> 800b7d4: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 800b7d8: 6822 ldr r2, [r4, #0] 800b7da: 3b00 subs r3, #0 800b7dc: bf18 it ne 800b7de: 2301 movne r3, #1 800b7e0: 0692 lsls r2, r2, #26 800b7e2: d430 bmi.n 800b846 <_printf_common+0xba> 800b7e4: 4641 mov r1, r8 800b7e6: 4638 mov r0, r7 800b7e8: f104 0243 add.w r2, r4, #67 @ 0x43 800b7ec: 47c8 blx r9 800b7ee: 3001 adds r0, #1 800b7f0: d023 beq.n 800b83a <_printf_common+0xae> 800b7f2: 6823 ldr r3, [r4, #0] 800b7f4: 6922 ldr r2, [r4, #16] 800b7f6: f003 0306 and.w r3, r3, #6 800b7fa: 2b04 cmp r3, #4 800b7fc: bf14 ite ne 800b7fe: 2500 movne r5, #0 800b800: 6833 ldreq r3, [r6, #0] 800b802: f04f 0600 mov.w r6, #0 800b806: bf08 it eq 800b808: 68e5 ldreq r5, [r4, #12] 800b80a: f104 041a add.w r4, r4, #26 800b80e: bf08 it eq 800b810: 1aed subeq r5, r5, r3 800b812: f854 3c12 ldr.w r3, [r4, #-18] 800b816: bf08 it eq 800b818: ea25 75e5 biceq.w r5, r5, r5, asr #31 800b81c: 4293 cmp r3, r2 800b81e: bfc4 itt gt 800b820: 1a9b subgt r3, r3, r2 800b822: 18ed addgt r5, r5, r3 800b824: 42b5 cmp r5, r6 800b826: d11a bne.n 800b85e <_printf_common+0xd2> 800b828: 2000 movs r0, #0 800b82a: e008 b.n 800b83e <_printf_common+0xb2> 800b82c: 2301 movs r3, #1 800b82e: 4652 mov r2, sl 800b830: 4641 mov r1, r8 800b832: 4638 mov r0, r7 800b834: 47c8 blx r9 800b836: 3001 adds r0, #1 800b838: d103 bne.n 800b842 <_printf_common+0xb6> 800b83a: f04f 30ff mov.w r0, #4294967295 800b83e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b842: 3501 adds r5, #1 800b844: e7c1 b.n 800b7ca <_printf_common+0x3e> 800b846: 2030 movs r0, #48 @ 0x30 800b848: 18e1 adds r1, r4, r3 800b84a: f881 0043 strb.w r0, [r1, #67] @ 0x43 800b84e: 1c5a adds r2, r3, #1 800b850: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 800b854: 4422 add r2, r4 800b856: 3302 adds r3, #2 800b858: f882 1043 strb.w r1, [r2, #67] @ 0x43 800b85c: e7c2 b.n 800b7e4 <_printf_common+0x58> 800b85e: 2301 movs r3, #1 800b860: 4622 mov r2, r4 800b862: 4641 mov r1, r8 800b864: 4638 mov r0, r7 800b866: 47c8 blx r9 800b868: 3001 adds r0, #1 800b86a: d0e6 beq.n 800b83a <_printf_common+0xae> 800b86c: 3601 adds r6, #1 800b86e: e7d9 b.n 800b824 <_printf_common+0x98> 0800b870 <_printf_i>: 800b870: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 800b874: 7e0f ldrb r7, [r1, #24] 800b876: 4691 mov r9, r2 800b878: 2f78 cmp r7, #120 @ 0x78 800b87a: 4680 mov r8, r0 800b87c: 460c mov r4, r1 800b87e: 469a mov sl, r3 800b880: 9e0c ldr r6, [sp, #48] @ 0x30 800b882: f101 0243 add.w r2, r1, #67 @ 0x43 800b886: d807 bhi.n 800b898 <_printf_i+0x28> 800b888: 2f62 cmp r7, #98 @ 0x62 800b88a: d80a bhi.n 800b8a2 <_printf_i+0x32> 800b88c: 2f00 cmp r7, #0 800b88e: f000 80d1 beq.w 800ba34 <_printf_i+0x1c4> 800b892: 2f58 cmp r7, #88 @ 0x58 800b894: f000 80b8 beq.w 800ba08 <_printf_i+0x198> 800b898: f104 0642 add.w r6, r4, #66 @ 0x42 800b89c: f884 7042 strb.w r7, [r4, #66] @ 0x42 800b8a0: e03a b.n 800b918 <_printf_i+0xa8> 800b8a2: f1a7 0363 sub.w r3, r7, #99 @ 0x63 800b8a6: 2b15 cmp r3, #21 800b8a8: d8f6 bhi.n 800b898 <_printf_i+0x28> 800b8aa: a101 add r1, pc, #4 @ (adr r1, 800b8b0 <_printf_i+0x40>) 800b8ac: f851 f023 ldr.w pc, [r1, r3, lsl #2] 800b8b0: 0800b909 .word 0x0800b909 800b8b4: 0800b91d .word 0x0800b91d 800b8b8: 0800b899 .word 0x0800b899 800b8bc: 0800b899 .word 0x0800b899 800b8c0: 0800b899 .word 0x0800b899 800b8c4: 0800b899 .word 0x0800b899 800b8c8: 0800b91d .word 0x0800b91d 800b8cc: 0800b899 .word 0x0800b899 800b8d0: 0800b899 .word 0x0800b899 800b8d4: 0800b899 .word 0x0800b899 800b8d8: 0800b899 .word 0x0800b899 800b8dc: 0800ba1b .word 0x0800ba1b 800b8e0: 0800b947 .word 0x0800b947 800b8e4: 0800b9d5 .word 0x0800b9d5 800b8e8: 0800b899 .word 0x0800b899 800b8ec: 0800b899 .word 0x0800b899 800b8f0: 0800ba3d .word 0x0800ba3d 800b8f4: 0800b899 .word 0x0800b899 800b8f8: 0800b947 .word 0x0800b947 800b8fc: 0800b899 .word 0x0800b899 800b900: 0800b899 .word 0x0800b899 800b904: 0800b9dd .word 0x0800b9dd 800b908: 6833 ldr r3, [r6, #0] 800b90a: 1d1a adds r2, r3, #4 800b90c: 681b ldr r3, [r3, #0] 800b90e: 6032 str r2, [r6, #0] 800b910: f104 0642 add.w r6, r4, #66 @ 0x42 800b914: f884 3042 strb.w r3, [r4, #66] @ 0x42 800b918: 2301 movs r3, #1 800b91a: e09c b.n 800ba56 <_printf_i+0x1e6> 800b91c: 6833 ldr r3, [r6, #0] 800b91e: 6820 ldr r0, [r4, #0] 800b920: 1d19 adds r1, r3, #4 800b922: 6031 str r1, [r6, #0] 800b924: 0606 lsls r6, r0, #24 800b926: d501 bpl.n 800b92c <_printf_i+0xbc> 800b928: 681d ldr r5, [r3, #0] 800b92a: e003 b.n 800b934 <_printf_i+0xc4> 800b92c: 0645 lsls r5, r0, #25 800b92e: d5fb bpl.n 800b928 <_printf_i+0xb8> 800b930: f9b3 5000 ldrsh.w r5, [r3] 800b934: 2d00 cmp r5, #0 800b936: da03 bge.n 800b940 <_printf_i+0xd0> 800b938: 232d movs r3, #45 @ 0x2d 800b93a: 426d negs r5, r5 800b93c: f884 3043 strb.w r3, [r4, #67] @ 0x43 800b940: 230a movs r3, #10 800b942: 4858 ldr r0, [pc, #352] @ (800baa4 <_printf_i+0x234>) 800b944: e011 b.n 800b96a <_printf_i+0xfa> 800b946: 6821 ldr r1, [r4, #0] 800b948: 6833 ldr r3, [r6, #0] 800b94a: 0608 lsls r0, r1, #24 800b94c: f853 5b04 ldr.w r5, [r3], #4 800b950: d402 bmi.n 800b958 <_printf_i+0xe8> 800b952: 0649 lsls r1, r1, #25 800b954: bf48 it mi 800b956: b2ad uxthmi r5, r5 800b958: 2f6f cmp r7, #111 @ 0x6f 800b95a: 6033 str r3, [r6, #0] 800b95c: bf14 ite ne 800b95e: 230a movne r3, #10 800b960: 2308 moveq r3, #8 800b962: 4850 ldr r0, [pc, #320] @ (800baa4 <_printf_i+0x234>) 800b964: 2100 movs r1, #0 800b966: f884 1043 strb.w r1, [r4, #67] @ 0x43 800b96a: 6866 ldr r6, [r4, #4] 800b96c: 2e00 cmp r6, #0 800b96e: 60a6 str r6, [r4, #8] 800b970: db05 blt.n 800b97e <_printf_i+0x10e> 800b972: 6821 ldr r1, [r4, #0] 800b974: 432e orrs r6, r5 800b976: f021 0104 bic.w r1, r1, #4 800b97a: 6021 str r1, [r4, #0] 800b97c: d04b beq.n 800ba16 <_printf_i+0x1a6> 800b97e: 4616 mov r6, r2 800b980: fbb5 f1f3 udiv r1, r5, r3 800b984: fb03 5711 mls r7, r3, r1, r5 800b988: 5dc7 ldrb r7, [r0, r7] 800b98a: f806 7d01 strb.w r7, [r6, #-1]! 800b98e: 462f mov r7, r5 800b990: 42bb cmp r3, r7 800b992: 460d mov r5, r1 800b994: d9f4 bls.n 800b980 <_printf_i+0x110> 800b996: 2b08 cmp r3, #8 800b998: d10b bne.n 800b9b2 <_printf_i+0x142> 800b99a: 6823 ldr r3, [r4, #0] 800b99c: 07df lsls r7, r3, #31 800b99e: d508 bpl.n 800b9b2 <_printf_i+0x142> 800b9a0: 6923 ldr r3, [r4, #16] 800b9a2: 6861 ldr r1, [r4, #4] 800b9a4: 4299 cmp r1, r3 800b9a6: bfde ittt le 800b9a8: 2330 movle r3, #48 @ 0x30 800b9aa: f806 3c01 strble.w r3, [r6, #-1] 800b9ae: f106 36ff addle.w r6, r6, #4294967295 800b9b2: 1b92 subs r2, r2, r6 800b9b4: 6122 str r2, [r4, #16] 800b9b6: 464b mov r3, r9 800b9b8: 4621 mov r1, r4 800b9ba: 4640 mov r0, r8 800b9bc: f8cd a000 str.w sl, [sp] 800b9c0: aa03 add r2, sp, #12 800b9c2: f7ff fee3 bl 800b78c <_printf_common> 800b9c6: 3001 adds r0, #1 800b9c8: d14a bne.n 800ba60 <_printf_i+0x1f0> 800b9ca: f04f 30ff mov.w r0, #4294967295 800b9ce: b004 add sp, #16 800b9d0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b9d4: 6823 ldr r3, [r4, #0] 800b9d6: f043 0320 orr.w r3, r3, #32 800b9da: 6023 str r3, [r4, #0] 800b9dc: 2778 movs r7, #120 @ 0x78 800b9de: 4832 ldr r0, [pc, #200] @ (800baa8 <_printf_i+0x238>) 800b9e0: f884 7045 strb.w r7, [r4, #69] @ 0x45 800b9e4: 6823 ldr r3, [r4, #0] 800b9e6: 6831 ldr r1, [r6, #0] 800b9e8: 061f lsls r7, r3, #24 800b9ea: f851 5b04 ldr.w r5, [r1], #4 800b9ee: d402 bmi.n 800b9f6 <_printf_i+0x186> 800b9f0: 065f lsls r7, r3, #25 800b9f2: bf48 it mi 800b9f4: b2ad uxthmi r5, r5 800b9f6: 6031 str r1, [r6, #0] 800b9f8: 07d9 lsls r1, r3, #31 800b9fa: bf44 itt mi 800b9fc: f043 0320 orrmi.w r3, r3, #32 800ba00: 6023 strmi r3, [r4, #0] 800ba02: b11d cbz r5, 800ba0c <_printf_i+0x19c> 800ba04: 2310 movs r3, #16 800ba06: e7ad b.n 800b964 <_printf_i+0xf4> 800ba08: 4826 ldr r0, [pc, #152] @ (800baa4 <_printf_i+0x234>) 800ba0a: e7e9 b.n 800b9e0 <_printf_i+0x170> 800ba0c: 6823 ldr r3, [r4, #0] 800ba0e: f023 0320 bic.w r3, r3, #32 800ba12: 6023 str r3, [r4, #0] 800ba14: e7f6 b.n 800ba04 <_printf_i+0x194> 800ba16: 4616 mov r6, r2 800ba18: e7bd b.n 800b996 <_printf_i+0x126> 800ba1a: 6833 ldr r3, [r6, #0] 800ba1c: 6825 ldr r5, [r4, #0] 800ba1e: 1d18 adds r0, r3, #4 800ba20: 6961 ldr r1, [r4, #20] 800ba22: 6030 str r0, [r6, #0] 800ba24: 062e lsls r6, r5, #24 800ba26: 681b ldr r3, [r3, #0] 800ba28: d501 bpl.n 800ba2e <_printf_i+0x1be> 800ba2a: 6019 str r1, [r3, #0] 800ba2c: e002 b.n 800ba34 <_printf_i+0x1c4> 800ba2e: 0668 lsls r0, r5, #25 800ba30: d5fb bpl.n 800ba2a <_printf_i+0x1ba> 800ba32: 8019 strh r1, [r3, #0] 800ba34: 2300 movs r3, #0 800ba36: 4616 mov r6, r2 800ba38: 6123 str r3, [r4, #16] 800ba3a: e7bc b.n 800b9b6 <_printf_i+0x146> 800ba3c: 6833 ldr r3, [r6, #0] 800ba3e: 2100 movs r1, #0 800ba40: 1d1a adds r2, r3, #4 800ba42: 6032 str r2, [r6, #0] 800ba44: 681e ldr r6, [r3, #0] 800ba46: 6862 ldr r2, [r4, #4] 800ba48: 4630 mov r0, r6 800ba4a: f000 f859 bl 800bb00 800ba4e: b108 cbz r0, 800ba54 <_printf_i+0x1e4> 800ba50: 1b80 subs r0, r0, r6 800ba52: 6060 str r0, [r4, #4] 800ba54: 6863 ldr r3, [r4, #4] 800ba56: 6123 str r3, [r4, #16] 800ba58: 2300 movs r3, #0 800ba5a: f884 3043 strb.w r3, [r4, #67] @ 0x43 800ba5e: e7aa b.n 800b9b6 <_printf_i+0x146> 800ba60: 4632 mov r2, r6 800ba62: 4649 mov r1, r9 800ba64: 4640 mov r0, r8 800ba66: 6923 ldr r3, [r4, #16] 800ba68: 47d0 blx sl 800ba6a: 3001 adds r0, #1 800ba6c: d0ad beq.n 800b9ca <_printf_i+0x15a> 800ba6e: 6823 ldr r3, [r4, #0] 800ba70: 079b lsls r3, r3, #30 800ba72: d413 bmi.n 800ba9c <_printf_i+0x22c> 800ba74: 68e0 ldr r0, [r4, #12] 800ba76: 9b03 ldr r3, [sp, #12] 800ba78: 4298 cmp r0, r3 800ba7a: bfb8 it lt 800ba7c: 4618 movlt r0, r3 800ba7e: e7a6 b.n 800b9ce <_printf_i+0x15e> 800ba80: 2301 movs r3, #1 800ba82: 4632 mov r2, r6 800ba84: 4649 mov r1, r9 800ba86: 4640 mov r0, r8 800ba88: 47d0 blx sl 800ba8a: 3001 adds r0, #1 800ba8c: d09d beq.n 800b9ca <_printf_i+0x15a> 800ba8e: 3501 adds r5, #1 800ba90: 68e3 ldr r3, [r4, #12] 800ba92: 9903 ldr r1, [sp, #12] 800ba94: 1a5b subs r3, r3, r1 800ba96: 42ab cmp r3, r5 800ba98: dcf2 bgt.n 800ba80 <_printf_i+0x210> 800ba9a: e7eb b.n 800ba74 <_printf_i+0x204> 800ba9c: 2500 movs r5, #0 800ba9e: f104 0619 add.w r6, r4, #25 800baa2: e7f5 b.n 800ba90 <_printf_i+0x220> 800baa4: 0800be63 .word 0x0800be63 800baa8: 0800be74 .word 0x0800be74 0800baac : 800baac: 4288 cmp r0, r1 800baae: b510 push {r4, lr} 800bab0: eb01 0402 add.w r4, r1, r2 800bab4: d902 bls.n 800babc 800bab6: 4284 cmp r4, r0 800bab8: 4623 mov r3, r4 800baba: d807 bhi.n 800bacc 800babc: 1e43 subs r3, r0, #1 800babe: 42a1 cmp r1, r4 800bac0: d008 beq.n 800bad4 800bac2: f811 2b01 ldrb.w r2, [r1], #1 800bac6: f803 2f01 strb.w r2, [r3, #1]! 800baca: e7f8 b.n 800babe 800bacc: 4601 mov r1, r0 800bace: 4402 add r2, r0 800bad0: 428a cmp r2, r1 800bad2: d100 bne.n 800bad6 800bad4: bd10 pop {r4, pc} 800bad6: f813 4d01 ldrb.w r4, [r3, #-1]! 800bada: f802 4d01 strb.w r4, [r2, #-1]! 800bade: e7f7 b.n 800bad0 0800bae0 <_sbrk_r>: 800bae0: b538 push {r3, r4, r5, lr} 800bae2: 2300 movs r3, #0 800bae4: 4d05 ldr r5, [pc, #20] @ (800bafc <_sbrk_r+0x1c>) 800bae6: 4604 mov r4, r0 800bae8: 4608 mov r0, r1 800baea: 602b str r3, [r5, #0] 800baec: f7f6 fabe bl 800206c <_sbrk> 800baf0: 1c43 adds r3, r0, #1 800baf2: d102 bne.n 800bafa <_sbrk_r+0x1a> 800baf4: 682b ldr r3, [r5, #0] 800baf6: b103 cbz r3, 800bafa <_sbrk_r+0x1a> 800baf8: 6023 str r3, [r4, #0] 800bafa: bd38 pop {r3, r4, r5, pc} 800bafc: 2000180c .word 0x2000180c 0800bb00 : 800bb00: 4603 mov r3, r0 800bb02: b510 push {r4, lr} 800bb04: b2c9 uxtb r1, r1 800bb06: 4402 add r2, r0 800bb08: 4293 cmp r3, r2 800bb0a: 4618 mov r0, r3 800bb0c: d101 bne.n 800bb12 800bb0e: 2000 movs r0, #0 800bb10: e003 b.n 800bb1a 800bb12: 7804 ldrb r4, [r0, #0] 800bb14: 3301 adds r3, #1 800bb16: 428c cmp r4, r1 800bb18: d1f6 bne.n 800bb08 800bb1a: bd10 pop {r4, pc} 0800bb1c : 800bb1c: 440a add r2, r1 800bb1e: 4291 cmp r1, r2 800bb20: f100 33ff add.w r3, r0, #4294967295 800bb24: d100 bne.n 800bb28 800bb26: 4770 bx lr 800bb28: b510 push {r4, lr} 800bb2a: f811 4b01 ldrb.w r4, [r1], #1 800bb2e: 4291 cmp r1, r2 800bb30: f803 4f01 strb.w r4, [r3, #1]! 800bb34: d1f9 bne.n 800bb2a 800bb36: bd10 pop {r4, pc} 0800bb38 <_realloc_r>: 800bb38: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800bb3c: 4607 mov r7, r0 800bb3e: 4614 mov r4, r2 800bb40: 460d mov r5, r1 800bb42: b921 cbnz r1, 800bb4e <_realloc_r+0x16> 800bb44: 4611 mov r1, r2 800bb46: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800bb4a: f7ff bc3b b.w 800b3c4 <_malloc_r> 800bb4e: b92a cbnz r2, 800bb5c <_realloc_r+0x24> 800bb50: f7ff fbce bl 800b2f0 <_free_r> 800bb54: 4625 mov r5, r4 800bb56: 4628 mov r0, r5 800bb58: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800bb5c: f000 f81a bl 800bb94 <_malloc_usable_size_r> 800bb60: 4284 cmp r4, r0 800bb62: 4606 mov r6, r0 800bb64: d802 bhi.n 800bb6c <_realloc_r+0x34> 800bb66: ebb4 0f50 cmp.w r4, r0, lsr #1 800bb6a: d8f4 bhi.n 800bb56 <_realloc_r+0x1e> 800bb6c: 4621 mov r1, r4 800bb6e: 4638 mov r0, r7 800bb70: f7ff fc28 bl 800b3c4 <_malloc_r> 800bb74: 4680 mov r8, r0 800bb76: b908 cbnz r0, 800bb7c <_realloc_r+0x44> 800bb78: 4645 mov r5, r8 800bb7a: e7ec b.n 800bb56 <_realloc_r+0x1e> 800bb7c: 42b4 cmp r4, r6 800bb7e: 4622 mov r2, r4 800bb80: 4629 mov r1, r5 800bb82: bf28 it cs 800bb84: 4632 movcs r2, r6 800bb86: f7ff ffc9 bl 800bb1c 800bb8a: 4629 mov r1, r5 800bb8c: 4638 mov r0, r7 800bb8e: f7ff fbaf bl 800b2f0 <_free_r> 800bb92: e7f1 b.n 800bb78 <_realloc_r+0x40> 0800bb94 <_malloc_usable_size_r>: 800bb94: f851 3c04 ldr.w r3, [r1, #-4] 800bb98: 1f18 subs r0, r3, #4 800bb9a: 2b00 cmp r3, #0 800bb9c: bfbc itt lt 800bb9e: 580b ldrlt r3, [r1, r0] 800bba0: 18c0 addlt r0, r0, r3 800bba2: 4770 bx lr 0800bba4 <_init>: 800bba4: b5f8 push {r3, r4, r5, r6, r7, lr} 800bba6: bf00 nop 800bba8: bcf8 pop {r3, r4, r5, r6, r7} 800bbaa: bc08 pop {r3} 800bbac: 469e mov lr, r3 800bbae: 4770 bx lr 0800bbb0 <_fini>: 800bbb0: b5f8 push {r3, r4, r5, r6, r7, lr} 800bbb2: bf00 nop 800bbb4: bcf8 pop {r3, r4, r5, r6, r7} 800bbb6: bc08 pop {r3} 800bbb8: 469e mov lr, r3 800bbba: 4770 bx lr