AUTOM10.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000dc60 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000398 0800dd6c 0800dd6c 0000ed6c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800e104 0800e104 000101d4 2**0 CONTENTS, READONLY 4 .ARM 00000008 0800e104 0800e104 0000f104 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 0800e10c 0800e10c 000101d4 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800e10c 0800e10c 0000f10c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 0800e110 0800e110 0000f110 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 000001d4 20000000 0800e114 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 000016a4 200001d8 0800e2e8 000101d8 2**3 ALLOC 10 ._user_heap_stack 00000604 2000187c 0800e2e8 0001087c 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 000101d4 2**0 CONTENTS, READONLY 12 .debug_info 00019571 00000000 00000000 000101fd 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 0000473a 00000000 00000000 0002976e 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001648 00000000 00000000 0002dea8 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 00001116 00000000 00000000 0002f4f0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 0001ccac 00000000 00000000 00030606 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001e1c6 00000000 00000000 0004d2b2 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 00095d30 00000000 00000000 0006b478 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 001011a8 2**0 CONTENTS, READONLY 20 .debug_frame 00006010 00000000 00000000 001011ec 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000052 00000000 00000000 001071fc 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 0800010c <__do_global_dtors_aux>: 800010c: b510 push {r4, lr} 800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>) 8000110: 7823 ldrb r3, [r4, #0] 8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16> 8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>) 8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12> 8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>) 800011a: f3af 8000 nop.w 800011e: 2301 movs r3, #1 8000120: 7023 strb r3, [r4, #0] 8000122: bd10 pop {r4, pc} 8000124: 200001d8 .word 0x200001d8 8000128: 00000000 .word 0x00000000 800012c: 0800dd54 .word 0x0800dd54 08000130 : 8000130: b508 push {r3, lr} 8000132: 4b03 ldr r3, [pc, #12] @ (8000140 ) 8000134: b11b cbz r3, 800013e 8000136: 4903 ldr r1, [pc, #12] @ (8000144 ) 8000138: 4803 ldr r0, [pc, #12] @ (8000148 ) 800013a: f3af 8000 nop.w 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 8000144: 200001dc .word 0x200001dc 8000148: 0800dd54 .word 0x0800dd54 0800014c : 800014c: 4603 mov r3, r0 800014e: f813 2b01 ldrb.w r2, [r3], #1 8000152: 2a00 cmp r2, #0 8000154: d1fb bne.n 800014e 8000156: 1a18 subs r0, r3, r0 8000158: 3801 subs r0, #1 800015a: 4770 bx lr 0800015c : uint16_t ch5 ; uint16_t ch6 ; uint16_t ch7 ; uint16_t ch8 ; void manageAdc(void){ 800015c: b480 push {r7} 800015e: af00 add r7, sp, #0 if (adc_avg_ready) 8000160: 4b12 ldr r3, [pc, #72] @ (80001ac ) 8000162: 781b ldrb r3, [r3, #0] 8000164: b2db uxtb r3, r3 8000166: 2b00 cmp r3, #0 8000168: d01b beq.n 80001a2 { adc_avg_ready = 0; 800016a: 4b10 ldr r3, [pc, #64] @ (80001ac ) 800016c: 2200 movs r2, #0 800016e: 701a strb r2, [r3, #0] // Read averaged channels (example mapping) ch4 = adc_avg[0]; 8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 ) 8000172: 881b ldrh r3, [r3, #0] 8000174: b29a uxth r2, r3 8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 ) 8000178: 801a strh r2, [r3, #0] ch5 = adc_avg[1]; 800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 ) 800017c: 885b ldrh r3, [r3, #2] 800017e: b29a uxth r2, r3 8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 ) 8000182: 801a strh r2, [r3, #0] ch6 = adc_avg[2]; 8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 ) 8000186: 889b ldrh r3, [r3, #4] 8000188: b29a uxth r2, r3 800018a: 4b0c ldr r3, [pc, #48] @ (80001bc ) 800018c: 801a strh r2, [r3, #0] ch7 = adc_avg[3]; 800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 ) 8000190: 88db ldrh r3, [r3, #6] 8000192: b29a uxth r2, r3 8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 ) 8000196: 801a strh r2, [r3, #0] ch8 = adc_avg[4]; 8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 ) 800019a: 891b ldrh r3, [r3, #8] 800019c: b29a uxth r2, r3 800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 ) 80001a0: 801a strh r2, [r3, #0] // Use them (convert to volts, control, etc.) // float v4 = (3.3f * ch4) / 4095.0f; } } 80001a2: bf00 nop 80001a4: 46bd mov sp, r7 80001a6: bc80 pop {r7} 80001a8: 4770 bx lr 80001aa: bf00 nop 80001ac: 20000221 .word 0x20000221 80001b0: 20000200 .word 0x20000200 80001b4: 20000222 .word 0x20000222 80001b8: 20000224 .word 0x20000224 80001bc: 20000226 .word 0x20000226 80001c0: 20000228 .word 0x20000228 80001c4: 2000022a .word 0x2000022a 080001c8 : void readAdc(void){ 80001c8: b480 push {r7} 80001ca: b083 sub sp, #12 80001cc: af00 add r7, sp, #0 for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001ce: 2300 movs r3, #0 80001d0: 71fb strb r3, [r7, #7] 80001d2: e010 b.n 80001f6 { adc_sum[i] += adc_dma_buf[i]; 80001d4: 79fb ldrb r3, [r7, #7] 80001d6: 4a21 ldr r2, [pc, #132] @ (800025c ) 80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 80001dc: b299 uxth r1, r3 80001de: 79fb ldrb r3, [r7, #7] 80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 ) 80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2] 80001e6: 79fb ldrb r3, [r7, #7] 80001e8: 440a add r2, r1 80001ea: 491d ldr r1, [pc, #116] @ (8000260 ) 80001ec: f841 2023 str.w r2, [r1, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001f0: 79fb ldrb r3, [r7, #7] 80001f2: 3301 adds r3, #1 80001f4: 71fb strb r3, [r7, #7] 80001f6: 79fb ldrb r3, [r7, #7] 80001f8: 2b04 cmp r3, #4 80001fa: d9eb bls.n 80001d4 } adc_sum_count++; 80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 ) 80001fe: 781b ldrb r3, [r3, #0] 8000200: 3301 adds r3, #1 8000202: b2da uxtb r2, r3 8000204: 4b17 ldr r3, [pc, #92] @ (8000264 ) 8000206: 701a strb r2, [r3, #0] /* When we collected ADC_AVG_WINDOW samples → compute average */ if (adc_sum_count >= ADC_AVG_WINDOW) 8000208: 4b16 ldr r3, [pc, #88] @ (8000264 ) 800020a: 781b ldrb r3, [r3, #0] 800020c: 2b04 cmp r3, #4 800020e: d920 bls.n 8000252 { for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 8000210: 2300 movs r3, #0 8000212: 71bb strb r3, [r7, #6] 8000214: e014 b.n 8000240 { adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW); 8000216: 79bb ldrb r3, [r7, #6] 8000218: 4a11 ldr r2, [pc, #68] @ (8000260 ) 800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800021e: 4a12 ldr r2, [pc, #72] @ (8000268 ) 8000220: fba2 2303 umull r2, r3, r2, r3 8000224: 089a lsrs r2, r3, #2 8000226: 79bb ldrb r3, [r7, #6] 8000228: b291 uxth r1, r2 800022a: 4a10 ldr r2, [pc, #64] @ (800026c ) 800022c: f822 1013 strh.w r1, [r2, r3, lsl #1] adc_sum[i] = 0; 8000230: 79bb ldrb r3, [r7, #6] 8000232: 4a0b ldr r2, [pc, #44] @ (8000260 ) 8000234: 2100 movs r1, #0 8000236: f842 1023 str.w r1, [r2, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 800023a: 79bb ldrb r3, [r7, #6] 800023c: 3301 adds r3, #1 800023e: 71bb strb r3, [r7, #6] 8000240: 79bb ldrb r3, [r7, #6] 8000242: 2b04 cmp r3, #4 8000244: d9e7 bls.n 8000216 } adc_sum_count = 0; 8000246: 4b07 ldr r3, [pc, #28] @ (8000264 ) 8000248: 2200 movs r2, #0 800024a: 701a strb r2, [r3, #0] adc_avg_ready = 1; // tell main loop new data is ready 800024c: 4b08 ldr r3, [pc, #32] @ (8000270 ) 800024e: 2201 movs r2, #1 8000250: 701a strb r2, [r3, #0] } } 8000252: bf00 nop 8000254: 370c adds r7, #12 8000256: 46bd mov sp, r7 8000258: bc80 pop {r7} 800025a: 4770 bx lr 800025c: 200001f4 .word 0x200001f4 8000260: 2000020c .word 0x2000020c 8000264: 20000220 .word 0x20000220 8000268: cccccccd .word 0xcccccccd 800026c: 20000200 .word 0x20000200 8000270: 20000221 .word 0x20000221 08000274 : uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data); uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data); void loadEE(void); /* Pseudo-array accessor EEW[idx] */ static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value) { 8000274: b580 push {r7, lr} 8000276: b082 sub sp, #8 8000278: af00 add r7, sp, #0 800027a: 4603 mov r3, r0 800027c: 6039 str r1, [r7, #0] 800027e: 71fb strb r3, [r7, #7] return EE_ReadVariable(EEW_ADDR(idx), value); 8000280: 79fb ldrb r3, [r7, #7] 8000282: b29b uxth r3, r3 8000284: 3301 adds r3, #1 8000286: b29b uxth r3, r3 8000288: 6839 ldr r1, [r7, #0] 800028a: 4618 mov r0, r3 800028c: f000 ffda bl 8001244 8000290: 4603 mov r3, r0 } 8000292: 4618 mov r0, r3 8000294: 3708 adds r7, #8 8000296: 46bd mov sp, r7 8000298: bd80 pop {r7, pc} 0800029a : static inline uint16_t EEW_Write(uint8_t idx, uint16_t value) { 800029a: b580 push {r7, lr} 800029c: b082 sub sp, #8 800029e: af00 add r7, sp, #0 80002a0: 4603 mov r3, r0 80002a2: 460a mov r2, r1 80002a4: 71fb strb r3, [r7, #7] 80002a6: 4613 mov r3, r2 80002a8: 80bb strh r3, [r7, #4] return EE_WriteVariable(EEW_ADDR(idx), value); 80002aa: 79fb ldrb r3, [r7, #7] 80002ac: b29b uxth r3, r3 80002ae: 3301 adds r3, #1 80002b0: b29b uxth r3, r3 80002b2: 88ba ldrh r2, [r7, #4] 80002b4: 4611 mov r1, r2 80002b6: 4618 mov r0, r3 80002b8: f000 ffe0 bl 800127c 80002bc: 4603 mov r3, r0 } 80002be: 4618 mov r0, r3 80002c0: 3708 adds r7, #8 80002c2: 46bd mov sp, r7 80002c4: bd80 pop {r7, pc} 080002c6 : extern const uint8_t deftab[]; extern omCiclo_st stCiclo; extern omCiclo_st memstCiclo; extern uint8_t stPulsanti; bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){ 80002c6: b490 push {r4, r7} 80002c8: b082 sub sp, #8 80002ca: af00 add r7, sp, #0 80002cc: 4604 mov r4, r0 80002ce: 4608 mov r0, r1 80002d0: 4611 mov r1, r2 80002d2: 461a mov r2, r3 80002d4: 4623 mov r3, r4 80002d6: 71fb strb r3, [r7, #7] 80002d8: 4603 mov r3, r0 80002da: 71bb strb r3, [r7, #6] 80002dc: 460b mov r3, r1 80002de: 717b strb r3, [r7, #5] 80002e0: 4613 mov r3, r2 80002e2: 713b strb r3, [r7, #4] if((c1>='0')&&(c1<='9')){ 80002e4: 79fb ldrb r3, [r7, #7] 80002e6: 2b2f cmp r3, #47 @ 0x2f 80002e8: d906 bls.n 80002f8 80002ea: 79fb ldrb r3, [r7, #7] 80002ec: 2b39 cmp r3, #57 @ 0x39 80002ee: d803 bhi.n 80002f8 c1-='0'; 80002f0: 79fb ldrb r3, [r7, #7] 80002f2: 3b30 subs r3, #48 @ 0x30 80002f4: 71fb strb r3, [r7, #7] 80002f6: e00b b.n 8000310 }else if((c1>='a')&&(c1<='f')){ 80002f8: 79fb ldrb r3, [r7, #7] 80002fa: 2b60 cmp r3, #96 @ 0x60 80002fc: d906 bls.n 800030c 80002fe: 79fb ldrb r3, [r7, #7] 8000300: 2b66 cmp r3, #102 @ 0x66 8000302: d803 bhi.n 800030c c1=(c1-'a')+10; 8000304: 79fb ldrb r3, [r7, #7] 8000306: 3b57 subs r3, #87 @ 0x57 8000308: 71fb strb r3, [r7, #7] 800030a: e001 b.n 8000310 }else return false; 800030c: 2300 movs r3, #0 800030e: e070 b.n 80003f2 if((c2>='0')&&(c2<='9')){ 8000310: 79bb ldrb r3, [r7, #6] 8000312: 2b2f cmp r3, #47 @ 0x2f 8000314: d906 bls.n 8000324 8000316: 79bb ldrb r3, [r7, #6] 8000318: 2b39 cmp r3, #57 @ 0x39 800031a: d803 bhi.n 8000324 c2-='0'; 800031c: 79bb ldrb r3, [r7, #6] 800031e: 3b30 subs r3, #48 @ 0x30 8000320: 71bb strb r3, [r7, #6] 8000322: e00b b.n 800033c }else if((c2>='a')&&(c2<='f')){ 8000324: 79bb ldrb r3, [r7, #6] 8000326: 2b60 cmp r3, #96 @ 0x60 8000328: d906 bls.n 8000338 800032a: 79bb ldrb r3, [r7, #6] 800032c: 2b66 cmp r3, #102 @ 0x66 800032e: d803 bhi.n 8000338 c2=(c2-'a')+10; 8000330: 79bb ldrb r3, [r7, #6] 8000332: 3b57 subs r3, #87 @ 0x57 8000334: 71bb strb r3, [r7, #6] 8000336: e001 b.n 800033c }else return false; 8000338: 2300 movs r3, #0 800033a: e05a b.n 80003f2 if((c3>='0')&&(c3<='9')){ 800033c: 797b ldrb r3, [r7, #5] 800033e: 2b2f cmp r3, #47 @ 0x2f 8000340: d906 bls.n 8000350 8000342: 797b ldrb r3, [r7, #5] 8000344: 2b39 cmp r3, #57 @ 0x39 8000346: d803 bhi.n 8000350 c3-='0'; 8000348: 797b ldrb r3, [r7, #5] 800034a: 3b30 subs r3, #48 @ 0x30 800034c: 717b strb r3, [r7, #5] 800034e: e00b b.n 8000368 }else if((c3>='a')&&(c3<='f')){ 8000350: 797b ldrb r3, [r7, #5] 8000352: 2b60 cmp r3, #96 @ 0x60 8000354: d906 bls.n 8000364 8000356: 797b ldrb r3, [r7, #5] 8000358: 2b66 cmp r3, #102 @ 0x66 800035a: d803 bhi.n 8000364 c3=(c3-'a')+10; 800035c: 797b ldrb r3, [r7, #5] 800035e: 3b57 subs r3, #87 @ 0x57 8000360: 717b strb r3, [r7, #5] 8000362: e001 b.n 8000368 }else return false; 8000364: 2300 movs r3, #0 8000366: e044 b.n 80003f2 if((c4>='0')&&(c4<='9')){ 8000368: 793b ldrb r3, [r7, #4] 800036a: 2b2f cmp r3, #47 @ 0x2f 800036c: d906 bls.n 800037c 800036e: 793b ldrb r3, [r7, #4] 8000370: 2b39 cmp r3, #57 @ 0x39 8000372: d803 bhi.n 800037c c4-='0'; 8000374: 793b ldrb r3, [r7, #4] 8000376: 3b30 subs r3, #48 @ 0x30 8000378: 713b strb r3, [r7, #4] 800037a: e00b b.n 8000394 }else if((c4>='a')&&(c4<='f')){ 800037c: 793b ldrb r3, [r7, #4] 800037e: 2b60 cmp r3, #96 @ 0x60 8000380: d906 bls.n 8000390 8000382: 793b ldrb r3, [r7, #4] 8000384: 2b66 cmp r3, #102 @ 0x66 8000386: d803 bhi.n 8000390 c4=(c4-'a')+10; 8000388: 793b ldrb r3, [r7, #4] 800038a: 3b57 subs r3, #87 @ 0x57 800038c: 713b strb r3, [r7, #4] 800038e: e001 b.n 8000394 }else return false; 8000390: 2300 movs r3, #0 8000392: e02e b.n 80003f2 *retval=c1; 8000394: 79fb ldrb r3, [r7, #7] 8000396: b29a uxth r2, r3 8000398: 693b ldr r3, [r7, #16] 800039a: 801a strh r2, [r3, #0] *retval*=16; 800039c: 693b ldr r3, [r7, #16] 800039e: 881b ldrh r3, [r3, #0] 80003a0: 011b lsls r3, r3, #4 80003a2: b29a uxth r2, r3 80003a4: 693b ldr r3, [r7, #16] 80003a6: 801a strh r2, [r3, #0] *retval+=c2; 80003a8: 693b ldr r3, [r7, #16] 80003aa: 881a ldrh r2, [r3, #0] 80003ac: 79bb ldrb r3, [r7, #6] 80003ae: b29b uxth r3, r3 80003b0: 4413 add r3, r2 80003b2: b29a uxth r2, r3 80003b4: 693b ldr r3, [r7, #16] 80003b6: 801a strh r2, [r3, #0] *retval*=16; 80003b8: 693b ldr r3, [r7, #16] 80003ba: 881b ldrh r3, [r3, #0] 80003bc: 011b lsls r3, r3, #4 80003be: b29a uxth r2, r3 80003c0: 693b ldr r3, [r7, #16] 80003c2: 801a strh r2, [r3, #0] *retval+=c3; 80003c4: 693b ldr r3, [r7, #16] 80003c6: 881a ldrh r2, [r3, #0] 80003c8: 797b ldrb r3, [r7, #5] 80003ca: b29b uxth r3, r3 80003cc: 4413 add r3, r2 80003ce: b29a uxth r2, r3 80003d0: 693b ldr r3, [r7, #16] 80003d2: 801a strh r2, [r3, #0] *retval*=16; 80003d4: 693b ldr r3, [r7, #16] 80003d6: 881b ldrh r3, [r3, #0] 80003d8: 011b lsls r3, r3, #4 80003da: b29a uxth r2, r3 80003dc: 693b ldr r3, [r7, #16] 80003de: 801a strh r2, [r3, #0] *retval+=c4; 80003e0: 693b ldr r3, [r7, #16] 80003e2: 881a ldrh r2, [r3, #0] 80003e4: 793b ldrb r3, [r7, #4] 80003e6: b29b uxth r3, r3 80003e8: 4413 add r3, r2 80003ea: b29a uxth r2, r3 80003ec: 693b ldr r3, [r7, #16] 80003ee: 801a strh r2, [r3, #0] return true; 80003f0: 2301 movs r3, #1 } 80003f2: 4618 mov r0, r3 80003f4: 3708 adds r7, #8 80003f6: 46bd mov sp, r7 80003f8: bc90 pop {r4, r7} 80003fa: 4770 bx lr 080003fc : void manageCDC(void){ 80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8000400: b0a7 sub sp, #156 @ 0x9c 8000402: af06 add r7, sp, #24 uint16_t val; uint16_t st; uint16_t eeadd; uint8_t i; if (CDC_Available()) { 8000404: f00c fb42 bl 800ca8c 8000408: 4603 mov r3, r0 800040a: 2b00 cmp r3, #0 800040c: f000 84d4 beq.w 8000db8 int rx = CDC_ReadByte(); 8000410: f00c fb50 bl 800cab4 8000414: 67b8 str r0, [r7, #120] @ 0x78 if (rx < 0) return; 8000416: 6fbb ldr r3, [r7, #120] @ 0x78 8000418: 2b00 cmp r3, #0 800041a: f2c0 84cc blt.w 8000db6 //uint8_t out = (uint8_t)c; //if (out >= 'a' && out <= 'z') out -= 32; // to upper rxbuf[rxidx]=rx; 800041e: 4bad ldr r3, [pc, #692] @ (80006d4 ) 8000420: 781b ldrb r3, [r3, #0] 8000422: 461a mov r2, r3 8000424: 6fbb ldr r3, [r7, #120] @ 0x78 8000426: b2d9 uxtb r1, r3 8000428: 4bab ldr r3, [pc, #684] @ (80006d8 ) 800042a: 5499 strb r1, [r3, r2] while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo 800042c: bf00 nop 800042e: 4ba9 ldr r3, [pc, #676] @ (80006d4 ) 8000430: 781b ldrb r3, [r3, #0] 8000432: 461a mov r2, r3 8000434: 4ba8 ldr r3, [pc, #672] @ (80006d8 ) 8000436: 4413 add r3, r2 8000438: 2101 movs r1, #1 800043a: 4618 mov r0, r3 800043c: f00c fbfc bl 800cc38 8000440: 4603 mov r3, r0 8000442: 2b01 cmp r3, #1 8000444: d0f3 beq.n 800042e if((rx==0x0d)||(rx==0x0a)){ 8000446: 6fbb ldr r3, [r7, #120] @ 0x78 8000448: 2b0d cmp r3, #13 800044a: d003 beq.n 8000454 800044c: 6fbb ldr r3, [r7, #120] @ 0x78 800044e: 2b0a cmp r3, #10 8000450: f040 84aa bne.w 8000da8 if(rxidx){ 8000454: 4b9f ldr r3, [pc, #636] @ (80006d4 ) 8000456: 781b ldrb r3, [r3, #0] 8000458: 2b00 cmp r3, #0 800045a: f000 84a1 beq.w 8000da0 switch(rxbuf[0]){ 800045e: 4b9e ldr r3, [pc, #632] @ (80006d8 ) 8000460: 781b ldrb r3, [r3, #0] 8000462: 2b6d cmp r3, #109 @ 0x6d 8000464: f000 80fb beq.w 800065e 8000468: 2b6d cmp r3, #109 @ 0x6d 800046a: f300 8487 bgt.w 8000d7c 800046e: 2b69 cmp r3, #105 @ 0x69 8000470: d00a beq.n 8000488 8000472: 2b69 cmp r3, #105 @ 0x69 8000474: f300 8482 bgt.w 8000d7c 8000478: 2b49 cmp r3, #73 @ 0x49 800047a: f000 80df beq.w 800063c 800047e: 2b65 cmp r3, #101 @ 0x65 8000480: f000 8228 beq.w 80008d4 8000484: f000 bc7a b.w 8000d7c case 'i': sprintf((char*)s,"info\n"); 8000488: f107 030c add.w r3, r7, #12 800048c: 4993 ldr r1, [pc, #588] @ (80006dc ) 800048e: 4618 mov r0, r3 8000490: f00c ffb0 bl 800d3f4 while (CDC_Transmit_FS(s, 5) == USBD_BUSY); 8000494: bf00 nop 8000496: f107 030c add.w r3, r7, #12 800049a: 2105 movs r1, #5 800049c: 4618 mov r0, r3 800049e: f00c fbcb bl 800cc38 80004a2: 4603 mov r3, r0 80004a4: 2b01 cmp r3, #1 80004a6: d0f6 beq.n 8000496 sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4)); 80004a8: 2100 movs r1, #0 80004aa: 488d ldr r0, [pc, #564] @ (80006e0 ) 80004ac: f002 ff7a bl 80033a4 80004b0: 4603 mov r3, r0 80004b2: 4698 mov r8, r3 80004b4: 2104 movs r1, #4 80004b6: 488a ldr r0, [pc, #552] @ (80006e0 ) 80004b8: f002 ff74 bl 80033a4 80004bc: 4603 mov r3, r0 80004be: 4699 mov r9, r3 80004c0: 2108 movs r1, #8 80004c2: 4887 ldr r0, [pc, #540] @ (80006e0 ) 80004c4: f002 ff6e bl 80033a4 80004c8: 4603 mov r3, r0 80004ca: 461c mov r4, r3 80004cc: 210c movs r1, #12 80004ce: 4884 ldr r0, [pc, #528] @ (80006e0 ) 80004d0: f002 ff68 bl 80033a4 80004d4: 4603 mov r3, r0 80004d6: 461d mov r5, r3 80004d8: 2100 movs r1, #0 80004da: 4882 ldr r0, [pc, #520] @ (80006e4 ) 80004dc: f002 ff62 bl 80033a4 80004e0: 4603 mov r3, r0 80004e2: 461e mov r6, r3 80004e4: 2104 movs r1, #4 80004e6: 487f ldr r0, [pc, #508] @ (80006e4 ) 80004e8: f002 ff5c bl 80033a4 80004ec: 4603 mov r3, r0 80004ee: 607b str r3, [r7, #4] 80004f0: 2108 movs r1, #8 80004f2: 487c ldr r0, [pc, #496] @ (80006e4 ) 80004f4: f002 ff56 bl 80033a4 80004f8: 4603 mov r3, r0 80004fa: 603b str r3, [r7, #0] 80004fc: 210c movs r1, #12 80004fe: 4879 ldr r0, [pc, #484] @ (80006e4 ) 8000500: f002 ff50 bl 80033a4 8000504: 4603 mov r3, r0 8000506: f107 000c add.w r0, r7, #12 800050a: 9305 str r3, [sp, #20] 800050c: 683a ldr r2, [r7, #0] 800050e: 9204 str r2, [sp, #16] 8000510: 687b ldr r3, [r7, #4] 8000512: 9303 str r3, [sp, #12] 8000514: 9602 str r6, [sp, #8] 8000516: 9501 str r5, [sp, #4] 8000518: 9400 str r4, [sp, #0] 800051a: 464b mov r3, r9 800051c: 4642 mov r2, r8 800051e: 4972 ldr r1, [pc, #456] @ (80006e8 ) 8000520: f00c ff68 bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000524: bf00 nop 8000526: f107 030c add.w r3, r7, #12 800052a: 4618 mov r0, r3 800052c: f7ff fe0e bl 800014c 8000530: 4603 mov r3, r0 8000532: b29a uxth r2, r3 8000534: f107 030c add.w r3, r7, #12 8000538: 4611 mov r1, r2 800053a: 4618 mov r0, r3 800053c: f00c fb7c bl 800cc38 8000540: 4603 mov r3, r0 8000542: 2b01 cmp r3, #1 8000544: d0ef beq.n 8000526 sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4)); 8000546: 4b66 ldr r3, [pc, #408] @ (80006e0 ) 8000548: 681b ldr r3, [r3, #0] 800054a: 6b5b ldr r3, [r3, #52] @ 0x34 800054c: 607b str r3, [r7, #4] 800054e: 4b64 ldr r3, [pc, #400] @ (80006e0 ) 8000550: 681b ldr r3, [r3, #0] 8000552: 6b99 ldr r1, [r3, #56] @ 0x38 8000554: 6039 str r1, [r7, #0] 8000556: 4b62 ldr r3, [pc, #392] @ (80006e0 ) 8000558: 681b ldr r3, [r3, #0] 800055a: 6bdb ldr r3, [r3, #60] @ 0x3c 800055c: 4a60 ldr r2, [pc, #384] @ (80006e0 ) 800055e: 6812 ldr r2, [r2, #0] 8000560: 6c12 ldr r2, [r2, #64] @ 0x40 8000562: 4960 ldr r1, [pc, #384] @ (80006e4 ) 8000564: 6809 ldr r1, [r1, #0] 8000566: 6b49 ldr r1, [r1, #52] @ 0x34 8000568: 485e ldr r0, [pc, #376] @ (80006e4 ) 800056a: 6800 ldr r0, [r0, #0] 800056c: 6b80 ldr r0, [r0, #56] @ 0x38 800056e: 4c5d ldr r4, [pc, #372] @ (80006e4 ) 8000570: 6824 ldr r4, [r4, #0] 8000572: 6be4 ldr r4, [r4, #60] @ 0x3c 8000574: 4d5b ldr r5, [pc, #364] @ (80006e4 ) 8000576: 682d ldr r5, [r5, #0] 8000578: 6c2d ldr r5, [r5, #64] @ 0x40 800057a: f107 060c add.w r6, r7, #12 800057e: 9505 str r5, [sp, #20] 8000580: 9404 str r4, [sp, #16] 8000582: 9003 str r0, [sp, #12] 8000584: 9102 str r1, [sp, #8] 8000586: 9201 str r2, [sp, #4] 8000588: 9300 str r3, [sp, #0] 800058a: 683b ldr r3, [r7, #0] 800058c: 687a ldr r2, [r7, #4] 800058e: 4957 ldr r1, [pc, #348] @ (80006ec ) 8000590: 4630 mov r0, r6 8000592: f00c ff2f bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000596: bf00 nop 8000598: f107 030c add.w r3, r7, #12 800059c: 4618 mov r0, r3 800059e: f7ff fdd5 bl 800014c 80005a2: 4603 mov r3, r0 80005a4: b29a uxth r2, r3 80005a6: f107 030c add.w r3, r7, #12 80005aa: 4611 mov r1, r2 80005ac: 4618 mov r0, r3 80005ae: f00c fb43 bl 800cc38 80005b2: 4603 mov r3, r0 80005b4: 2b01 cmp r3, #1 80005b6: d0ef beq.n 8000598 sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8); 80005b8: 4b4d ldr r3, [pc, #308] @ (80006f0 ) 80005ba: 781b ldrb r3, [r3, #0] 80005bc: 461d mov r5, r3 80005be: 4b4d ldr r3, [pc, #308] @ (80006f4 ) 80005c0: 881b ldrh r3, [r3, #0] 80005c2: 461e mov r6, r3 80005c4: 4b4c ldr r3, [pc, #304] @ (80006f8 ) 80005c6: 881b ldrh r3, [r3, #0] 80005c8: 461a mov r2, r3 80005ca: 4b4c ldr r3, [pc, #304] @ (80006fc ) 80005cc: 881b ldrh r3, [r3, #0] 80005ce: 4619 mov r1, r3 80005d0: 4b4b ldr r3, [pc, #300] @ (8000700 ) 80005d2: 881b ldrh r3, [r3, #0] 80005d4: 461c mov r4, r3 80005d6: 4b4b ldr r3, [pc, #300] @ (8000704 ) 80005d8: 881b ldrh r3, [r3, #0] 80005da: f107 000c add.w r0, r7, #12 80005de: 9303 str r3, [sp, #12] 80005e0: 9402 str r4, [sp, #8] 80005e2: 9101 str r1, [sp, #4] 80005e4: 9200 str r2, [sp, #0] 80005e6: 4633 mov r3, r6 80005e8: 462a mov r2, r5 80005ea: 4947 ldr r1, [pc, #284] @ (8000708 ) 80005ec: f00c ff02 bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80005f0: bf00 nop 80005f2: f107 030c add.w r3, r7, #12 80005f6: 4618 mov r0, r3 80005f8: f7ff fda8 bl 800014c 80005fc: 4603 mov r3, r0 80005fe: b29a uxth r2, r3 8000600: f107 030c add.w r3, r7, #12 8000604: 4611 mov r1, r2 8000606: 4618 mov r0, r3 8000608: f00c fb16 bl 800cc38 800060c: 4603 mov r3, r0 800060e: 2b01 cmp r3, #1 8000610: d0ef beq.n 80005f2 sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti); 8000612: 4b3e ldr r3, [pc, #248] @ (800070c ) 8000614: 781b ldrb r3, [r3, #0] 8000616: 461a mov r2, r3 8000618: 4b3d ldr r3, [pc, #244] @ (8000710 ) 800061a: 781b ldrb r3, [r3, #0] 800061c: f107 000c add.w r0, r7, #12 8000620: 493c ldr r1, [pc, #240] @ (8000714 ) 8000622: f00c fee7 bl 800d3f4 while (CDC_Transmit_FS(s, 31) == USBD_BUSY); 8000626: bf00 nop 8000628: f107 030c add.w r3, r7, #12 800062c: 211f movs r1, #31 800062e: 4618 mov r0, r3 8000630: f00c fb02 bl 800cc38 8000634: 4603 mov r3, r0 8000636: 2b01 cmp r3, #1 8000638: d0f6 beq.n 8000628 break; 800063a: e3b1 b.n 8000da0 case 'I': sprintf((char*)s,"\nID000000"); 800063c: f107 030c add.w r3, r7, #12 8000640: 4935 ldr r1, [pc, #212] @ (8000718 ) 8000642: 4618 mov r0, r3 8000644: f00c fed6 bl 800d3f4 while (CDC_Transmit_FS(s, 9) == USBD_BUSY); 8000648: bf00 nop 800064a: f107 030c add.w r3, r7, #12 800064e: 2109 movs r1, #9 8000650: 4618 mov r0, r3 8000652: f00c faf1 bl 800cc38 8000656: 4603 mov r3, r0 8000658: 2b01 cmp r3, #1 800065a: d0f6 beq.n 800064a break; 800065c: e3a0 b.n 8000da0 case 'm': if(rxidx==8){ 800065e: 4b1d ldr r3, [pc, #116] @ (80006d4 ) 8000660: 781b ldrb r3, [r3, #0] 8000662: 2b08 cmp r3, #8 8000664: f040 8124 bne.w 80008b0 if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){ 8000668: 4b1b ldr r3, [pc, #108] @ (80006d8 ) 800066a: 785b ldrb r3, [r3, #1] 800066c: 2b30 cmp r3, #48 @ 0x30 800066e: f240 810e bls.w 800088e 8000672: 4b19 ldr r3, [pc, #100] @ (80006d8 ) 8000674: 785b ldrb r3, [r3, #1] 8000676: 2b34 cmp r3, #52 @ 0x34 8000678: f200 8109 bhi.w 800088e mot=rxbuf[1]-='0'; 800067c: 4b16 ldr r3, [pc, #88] @ (80006d8 ) 800067e: 785b ldrb r3, [r3, #1] 8000680: 3b30 subs r3, #48 @ 0x30 8000682: b2da uxtb r2, r3 8000684: 4b14 ldr r3, [pc, #80] @ (80006d8 ) 8000686: 705a strb r2, [r3, #1] 8000688: 4b13 ldr r3, [pc, #76] @ (80006d8 ) 800068a: 785b ldrb r3, [r3, #1] 800068c: f887 3077 strb.w r3, [r7, #119] @ 0x77 if(rxbuf[2]=='f'){ 8000690: 4b11 ldr r3, [pc, #68] @ (80006d8 ) 8000692: 789b ldrb r3, [r3, #2] 8000694: 2b66 cmp r3, #102 @ 0x66 8000696: d103 bne.n 80006a0 dir=FW; 8000698: 2300 movs r3, #0 800069a: f887 307f strb.w r3, [r7, #127] @ 0x7f 800069e: e03f b.n 8000720 }else if(rxbuf[2]=='b'){ 80006a0: 4b0d ldr r3, [pc, #52] @ (80006d8 ) 80006a2: 789b ldrb r3, [r3, #2] 80006a4: 2b62 cmp r3, #98 @ 0x62 80006a6: d103 bne.n 80006b0 dir=BW; 80006a8: 2301 movs r3, #1 80006aa: f887 307f strb.w r3, [r7, #127] @ 0x7f 80006ae: e037 b.n 8000720 }else{ sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore 80006b0: f107 030c add.w r3, r7, #12 80006b4: 4919 ldr r1, [pc, #100] @ (800071c ) 80006b6: 4618 mov r0, r3 80006b8: f00c fe9c bl 800d3f4 while (CDC_Transmit_FS(s, 16) == USBD_BUSY); 80006bc: bf00 nop 80006be: f107 030c add.w r3, r7, #12 80006c2: 2110 movs r1, #16 80006c4: 4618 mov r0, r3 80006c6: f00c fab7 bl 800cc38 80006ca: 4603 mov r3, r0 80006cc: 2b01 cmp r3, #1 80006ce: d0f6 beq.n 80006be break; 80006d0: e366 b.n 8000da0 80006d2: bf00 nop 80006d4: 2000022c .word 0x2000022c 80006d8: 20000230 .word 0x20000230 80006dc: 0800dd6c .word 0x0800dd6c 80006e0: 20000310 .word 0x20000310 80006e4: 20000358 .word 0x20000358 80006e8: 0800dd74 .word 0x0800dd74 80006ec: 0800dd8c .word 0x0800dd8c 80006f0: 200003e8 .word 0x200003e8 80006f4: 20000222 .word 0x20000222 80006f8: 20000224 .word 0x20000224 80006fc: 20000226 .word 0x20000226 8000700: 20000228 .word 0x20000228 8000704: 2000022a .word 0x2000022a 8000708: 0800ddc0 .word 0x0800ddc0 800070c: 20000432 .word 0x20000432 8000710: 20000430 .word 0x20000430 8000714: 0800ddf8 .word 0x0800ddf8 8000718: 0800de18 .word 0x0800de18 800071c: 0800de24 .word 0x0800de24 } if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 8000720: 4bb4 ldr r3, [pc, #720] @ (80009f4 ) 8000722: 78db ldrb r3, [r3, #3] 8000724: 2b2f cmp r3, #47 @ 0x2f 8000726: f240 80a1 bls.w 800086c 800072a: 4bb2 ldr r3, [pc, #712] @ (80009f4 ) 800072c: 78db ldrb r3, [r3, #3] 800072e: 2b39 cmp r3, #57 @ 0x39 8000730: f200 809c bhi.w 800086c 8000734: 4baf ldr r3, [pc, #700] @ (80009f4 ) 8000736: 791b ldrb r3, [r3, #4] 8000738: 2b2f cmp r3, #47 @ 0x2f 800073a: f240 8097 bls.w 800086c 800073e: 4bad ldr r3, [pc, #692] @ (80009f4 ) 8000740: 791b ldrb r3, [r3, #4] 8000742: 2b39 cmp r3, #57 @ 0x39 8000744: f200 8092 bhi.w 800086c 8000748: 4baa ldr r3, [pc, #680] @ (80009f4 ) 800074a: 795b ldrb r3, [r3, #5] 800074c: 2b2f cmp r3, #47 @ 0x2f 800074e: f240 808d bls.w 800086c 8000752: 4ba8 ldr r3, [pc, #672] @ (80009f4 ) 8000754: 795b ldrb r3, [r3, #5] 8000756: 2b39 cmp r3, #57 @ 0x39 8000758: f200 8088 bhi.w 800086c 800075c: 4ba5 ldr r3, [pc, #660] @ (80009f4 ) 800075e: 799b ldrb r3, [r3, #6] 8000760: 2b2f cmp r3, #47 @ 0x2f 8000762: f240 8083 bls.w 800086c 8000766: 4ba3 ldr r3, [pc, #652] @ (80009f4 ) 8000768: 799b ldrb r3, [r3, #6] 800076a: 2b39 cmp r3, #57 @ 0x39 800076c: d87e bhi.n 800086c 800076e: 4ba1 ldr r3, [pc, #644] @ (80009f4 ) 8000770: 79db ldrb r3, [r3, #7] 8000772: 2b2f cmp r3, #47 @ 0x2f 8000774: d97a bls.n 800086c 8000776: 4b9f ldr r3, [pc, #636] @ (80009f4 ) 8000778: 79db ldrb r3, [r3, #7] 800077a: 2b39 cmp r3, #57 @ 0x39 800077c: d876 bhi.n 800086c dm=rxbuf[3]-='0'; 800077e: 4b9d ldr r3, [pc, #628] @ (80009f4 ) 8000780: 78db ldrb r3, [r3, #3] 8000782: 3b30 subs r3, #48 @ 0x30 8000784: b2da uxtb r2, r3 8000786: 4b9b ldr r3, [pc, #620] @ (80009f4 ) 8000788: 70da strb r2, [r3, #3] 800078a: 4b9a ldr r3, [pc, #616] @ (80009f4 ) 800078c: 78db ldrb r3, [r3, #3] 800078e: f887 3076 strb.w r3, [r7, #118] @ 0x76 m=rxbuf[4]-='0'; 8000792: 4b98 ldr r3, [pc, #608] @ (80009f4 ) 8000794: 791b ldrb r3, [r3, #4] 8000796: 3b30 subs r3, #48 @ 0x30 8000798: b2da uxtb r2, r3 800079a: 4b96 ldr r3, [pc, #600] @ (80009f4 ) 800079c: 711a strb r2, [r3, #4] 800079e: 4b95 ldr r3, [pc, #596] @ (80009f4 ) 80007a0: 791b ldrb r3, [r3, #4] 80007a2: f887 3075 strb.w r3, [r7, #117] @ 0x75 c=rxbuf[5]-='0'; 80007a6: 4b93 ldr r3, [pc, #588] @ (80009f4 ) 80007a8: 795b ldrb r3, [r3, #5] 80007aa: 3b30 subs r3, #48 @ 0x30 80007ac: b2da uxtb r2, r3 80007ae: 4b91 ldr r3, [pc, #580] @ (80009f4 ) 80007b0: 715a strb r2, [r3, #5] 80007b2: 4b90 ldr r3, [pc, #576] @ (80009f4 ) 80007b4: 795b ldrb r3, [r3, #5] 80007b6: f887 3074 strb.w r3, [r7, #116] @ 0x74 d=rxbuf[6]-='0'; 80007ba: 4b8e ldr r3, [pc, #568] @ (80009f4 ) 80007bc: 799b ldrb r3, [r3, #6] 80007be: 3b30 subs r3, #48 @ 0x30 80007c0: b2da uxtb r2, r3 80007c2: 4b8c ldr r3, [pc, #560] @ (80009f4 ) 80007c4: 719a strb r2, [r3, #6] 80007c6: 4b8b ldr r3, [pc, #556] @ (80009f4 ) 80007c8: 799b ldrb r3, [r3, #6] 80007ca: f887 3073 strb.w r3, [r7, #115] @ 0x73 u=rxbuf[7]-='0'; 80007ce: 4b89 ldr r3, [pc, #548] @ (80009f4 ) 80007d0: 79db ldrb r3, [r3, #7] 80007d2: 3b30 subs r3, #48 @ 0x30 80007d4: b2da uxtb r2, r3 80007d6: 4b87 ldr r3, [pc, #540] @ (80009f4 ) 80007d8: 71da strb r2, [r3, #7] 80007da: 4b86 ldr r3, [pc, #536] @ (80009f4 ) 80007dc: 79db ldrb r3, [r3, #7] 80007de: f887 3072 strb.w r3, [r7, #114] @ 0x72 val=dm; 80007e2: f897 3076 ldrb.w r3, [r7, #118] @ 0x76 80007e6: b29b uxth r3, r3 80007e8: 817b strh r3, [r7, #10] val*=10; 80007ea: 897b ldrh r3, [r7, #10] 80007ec: 461a mov r2, r3 80007ee: 0092 lsls r2, r2, #2 80007f0: 4413 add r3, r2 80007f2: 005b lsls r3, r3, #1 80007f4: b29b uxth r3, r3 80007f6: 817b strh r3, [r7, #10] val+=m; 80007f8: f897 3075 ldrb.w r3, [r7, #117] @ 0x75 80007fc: b29a uxth r2, r3 80007fe: 897b ldrh r3, [r7, #10] 8000800: 4413 add r3, r2 8000802: b29b uxth r3, r3 8000804: 817b strh r3, [r7, #10] val*=10; 8000806: 897b ldrh r3, [r7, #10] 8000808: 461a mov r2, r3 800080a: 0092 lsls r2, r2, #2 800080c: 4413 add r3, r2 800080e: 005b lsls r3, r3, #1 8000810: b29b uxth r3, r3 8000812: 817b strh r3, [r7, #10] val+=c; 8000814: f897 3074 ldrb.w r3, [r7, #116] @ 0x74 8000818: b29a uxth r2, r3 800081a: 897b ldrh r3, [r7, #10] 800081c: 4413 add r3, r2 800081e: b29b uxth r3, r3 8000820: 817b strh r3, [r7, #10] val*=10; 8000822: 897b ldrh r3, [r7, #10] 8000824: 461a mov r2, r3 8000826: 0092 lsls r2, r2, #2 8000828: 4413 add r3, r2 800082a: 005b lsls r3, r3, #1 800082c: b29b uxth r3, r3 800082e: 817b strh r3, [r7, #10] val+=d; 8000830: f897 3073 ldrb.w r3, [r7, #115] @ 0x73 8000834: b29a uxth r2, r3 8000836: 897b ldrh r3, [r7, #10] 8000838: 4413 add r3, r2 800083a: b29b uxth r3, r3 800083c: 817b strh r3, [r7, #10] val*=10; 800083e: 897b ldrh r3, [r7, #10] 8000840: 461a mov r2, r3 8000842: 0092 lsls r2, r2, #2 8000844: 4413 add r3, r2 8000846: 005b lsls r3, r3, #1 8000848: b29b uxth r3, r3 800084a: 817b strh r3, [r7, #10] val+=u; 800084c: f897 3072 ldrb.w r3, [r7, #114] @ 0x72 8000850: b29a uxth r2, r3 8000852: 897b ldrh r3, [r7, #10] 8000854: 4413 add r3, r2 8000856: b29b uxth r3, r3 8000858: 817b strh r3, [r7, #10] SetMot(mot,dir,val); 800085a: 897a ldrh r2, [r7, #10] 800085c: f897 107f ldrb.w r1, [r7, #127] @ 0x7f 8000860: f897 3077 ldrb.w r3, [r7, #119] @ 0x77 8000864: 4618 mov r0, r3 8000866: f002 fe13 bl 8003490 if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 800086a: e032 b.n 80008d2 }else{ sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore 800086c: f107 030c add.w r3, r7, #12 8000870: 4961 ldr r1, [pc, #388] @ (80009f8 ) 8000872: 4618 mov r0, r3 8000874: f00c fdbe bl 800d3f4 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 8000878: bf00 nop 800087a: f107 030c add.w r3, r7, #12 800087e: 2113 movs r1, #19 8000880: 4618 mov r0, r3 8000882: f00c f9d9 bl 800cc38 8000886: 4603 mov r3, r0 8000888: 2b01 cmp r3, #1 800088a: d0f6 beq.n 800087a if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 800088c: e021 b.n 80008d2 } }else{ sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore 800088e: f107 030c add.w r3, r7, #12 8000892: 495a ldr r1, [pc, #360] @ (80009fc ) 8000894: 4618 mov r0, r3 8000896: f00c fdad bl 800d3f4 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 800089a: bf00 nop 800089c: f107 030c add.w r3, r7, #12 80008a0: 2113 movs r1, #19 80008a2: 4618 mov r0, r3 80008a4: f00c f9c8 bl 800cc38 80008a8: 4603 mov r3, r0 80008aa: 2b01 cmp r3, #1 80008ac: d0f6 beq.n 800089c } }else{ sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore while (CDC_Transmit_FS(s, 10) == USBD_BUSY); } break; 80008ae: e277 b.n 8000da0 sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore 80008b0: f107 030c add.w r3, r7, #12 80008b4: 4952 ldr r1, [pc, #328] @ (8000a00 ) 80008b6: 4618 mov r0, r3 80008b8: f00c fd9c bl 800d3f4 while (CDC_Transmit_FS(s, 10) == USBD_BUSY); 80008bc: bf00 nop 80008be: f107 030c add.w r3, r7, #12 80008c2: 210a movs r1, #10 80008c4: 4618 mov r0, r3 80008c6: f00c f9b7 bl 800cc38 80008ca: 4603 mov r3, r0 80008cc: 2b01 cmp r3, #1 80008ce: d0f6 beq.n 80008be break; 80008d0: e266 b.n 8000da0 80008d2: e265 b.n 8000da0 case 'e': if(rxidx>1){ 80008d4: 4b4b ldr r3, [pc, #300] @ (8000a04 ) 80008d6: 781b ldrb r3, [r3, #0] 80008d8: 2b01 cmp r3, #1 80008da: f240 8237 bls.w 8000d4c if(rxbuf[1]=='r'){ 80008de: 4b45 ldr r3, [pc, #276] @ (80009f4 ) 80008e0: 785b ldrb r3, [r3, #1] 80008e2: 2b72 cmp r3, #114 @ 0x72 80008e4: f040 8098 bne.w 8000a18 if(rxidx==4){ 80008e8: 4b46 ldr r3, [pc, #280] @ (8000a04 ) 80008ea: 781b ldrb r3, [r3, #0] 80008ec: 2b04 cmp r3, #4 80008ee: d169 bne.n 80009c4 if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 80008f0: 4b40 ldr r3, [pc, #256] @ (80009f4 ) 80008f2: 789a ldrb r2, [r3, #2] 80008f4: 4b3f ldr r3, [pc, #252] @ (80009f4 ) 80008f6: 78d9 ldrb r1, [r3, #3] 80008f8: f107 0308 add.w r3, r7, #8 80008fc: 9300 str r3, [sp, #0] 80008fe: 460b mov r3, r1 8000900: 2130 movs r1, #48 @ 0x30 8000902: 2030 movs r0, #48 @ 0x30 8000904: f7ff fcdf bl 80002c6 8000908: 4603 mov r3, r0 800090a: 2b00 cmp r3, #0 800090c: d042 beq.n 8000994 st=EEW_Read(eeadd, &val); 800090e: 893b ldrh r3, [r7, #8] 8000910: b2db uxtb r3, r3 8000912: f107 020a add.w r2, r7, #10 8000916: 4611 mov r1, r2 8000918: 4618 mov r0, r3 800091a: f7ff fcab bl 8000274 800091e: 4603 mov r3, r0 8000920: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK){ 8000924: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000928: 2b00 cmp r3, #0 800092a: d119 bne.n 8000960 sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val); 800092c: 893b ldrh r3, [r7, #8] 800092e: 461a mov r2, r3 8000930: 897b ldrh r3, [r7, #10] 8000932: f107 000c add.w r0, r7, #12 8000936: 4934 ldr r1, [pc, #208] @ (8000a08 ) 8000938: f00c fd5c bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 800093c: bf00 nop 800093e: f107 030c add.w r3, r7, #12 8000942: 4618 mov r0, r3 8000944: f7ff fc02 bl 800014c 8000948: 4603 mov r3, r0 800094a: b29a uxth r2, r3 800094c: f107 030c add.w r3, r7, #12 8000950: 4611 mov r1, r2 8000952: 4618 mov r0, r3 8000954: f00c f970 bl 800cc38 8000958: 4603 mov r3, r0 800095a: 2b01 cmp r3, #1 800095c: d0ef beq.n 800093e } }else{ sprintf((char*)s,"\n?eraa | ewaavvvv"); while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); } break; 800095e: e21e b.n 8000d9e sprintf((char*)s,"\nee read error %d",st); 8000960: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000964: f107 030c add.w r3, r7, #12 8000968: 4928 ldr r1, [pc, #160] @ (8000a0c ) 800096a: 4618 mov r0, r3 800096c: f00c fd42 bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000970: bf00 nop 8000972: f107 030c add.w r3, r7, #12 8000976: 4618 mov r0, r3 8000978: f7ff fbe8 bl 800014c 800097c: 4603 mov r3, r0 800097e: b29a uxth r2, r3 8000980: f107 030c add.w r3, r7, #12 8000984: 4611 mov r1, r2 8000986: 4618 mov r0, r3 8000988: f00c f956 bl 800cc38 800098c: 4603 mov r3, r0 800098e: 2b01 cmp r3, #1 8000990: d0ef beq.n 8000972 break; 8000992: e204 b.n 8000d9e sprintf((char*)s,"\n?eraa hex values"); 8000994: f107 030c add.w r3, r7, #12 8000998: 491d ldr r1, [pc, #116] @ (8000a10 ) 800099a: 4618 mov r0, r3 800099c: f00c fd2a bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80009a0: bf00 nop 80009a2: f107 030c add.w r3, r7, #12 80009a6: 4618 mov r0, r3 80009a8: f7ff fbd0 bl 800014c 80009ac: 4603 mov r3, r0 80009ae: b29a uxth r2, r3 80009b0: f107 030c add.w r3, r7, #12 80009b4: 4611 mov r1, r2 80009b6: 4618 mov r0, r3 80009b8: f00c f93e bl 800cc38 80009bc: 4603 mov r3, r0 80009be: 2b01 cmp r3, #1 80009c0: d0ef beq.n 80009a2 break; 80009c2: e1ec b.n 8000d9e sprintf((char*)s,"\n?eraa"); 80009c4: f107 030c add.w r3, r7, #12 80009c8: 4912 ldr r1, [pc, #72] @ (8000a14 ) 80009ca: 4618 mov r0, r3 80009cc: f00c fd12 bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80009d0: bf00 nop 80009d2: f107 030c add.w r3, r7, #12 80009d6: 4618 mov r0, r3 80009d8: f7ff fbb8 bl 800014c 80009dc: 4603 mov r3, r0 80009de: b29a uxth r2, r3 80009e0: f107 030c add.w r3, r7, #12 80009e4: 4611 mov r1, r2 80009e6: 4618 mov r0, r3 80009e8: f00c f926 bl 800cc38 80009ec: 4603 mov r3, r0 80009ee: 2b01 cmp r3, #1 80009f0: d0ef beq.n 80009d2 break; 80009f2: e1d4 b.n 8000d9e 80009f4: 20000230 .word 0x20000230 80009f8: 0800de38 .word 0x0800de38 80009fc: 0800de58 .word 0x0800de58 8000a00: 0800de6c .word 0x0800de6c 8000a04: 2000022c .word 0x2000022c 8000a08: 0800de78 .word 0x0800de78 8000a0c: 0800de8c .word 0x0800de8c 8000a10: 0800dea0 .word 0x0800dea0 8000a14: 0800deb4 .word 0x0800deb4 }else if(rxbuf[1]=='w'){ 8000a18: 4bbe ldr r3, [pc, #760] @ (8000d14 ) 8000a1a: 785b ldrb r3, [r3, #1] 8000a1c: 2b77 cmp r3, #119 @ 0x77 8000a1e: d169 bne.n 8000af4 if(rxidx==8){ 8000a20: 4bbd ldr r3, [pc, #756] @ (8000d18 ) 8000a22: 781b ldrb r3, [r3, #0] 8000a24: 2b08 cmp r3, #8 8000a26: d14d bne.n 8000ac4 if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 8000a28: 4bba ldr r3, [pc, #744] @ (8000d14 ) 8000a2a: 789a ldrb r2, [r3, #2] 8000a2c: 4bb9 ldr r3, [pc, #740] @ (8000d14 ) 8000a2e: 78d9 ldrb r1, [r3, #3] 8000a30: f107 0308 add.w r3, r7, #8 8000a34: 9300 str r3, [sp, #0] 8000a36: 460b mov r3, r1 8000a38: 2130 movs r1, #48 @ 0x30 8000a3a: 2030 movs r0, #48 @ 0x30 8000a3c: f7ff fc43 bl 80002c6 8000a40: 4603 mov r3, r0 8000a42: 2b00 cmp r3, #0 8000a44: d037 beq.n 8000ab6 if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){ 8000a46: 4bb3 ldr r3, [pc, #716] @ (8000d14 ) 8000a48: 7918 ldrb r0, [r3, #4] 8000a4a: 4bb2 ldr r3, [pc, #712] @ (8000d14 ) 8000a4c: 7959 ldrb r1, [r3, #5] 8000a4e: 4bb1 ldr r3, [pc, #708] @ (8000d14 ) 8000a50: 799a ldrb r2, [r3, #6] 8000a52: 4bb0 ldr r3, [pc, #704] @ (8000d14 ) 8000a54: 79dc ldrb r4, [r3, #7] 8000a56: f107 030a add.w r3, r7, #10 8000a5a: 9300 str r3, [sp, #0] 8000a5c: 4623 mov r3, r4 8000a5e: f7ff fc32 bl 80002c6 8000a62: 4603 mov r3, r0 8000a64: 2b00 cmp r3, #0 8000a66: d01f beq.n 8000aa8 st=EEW_Write(eeadd, val); 8000a68: 893b ldrh r3, [r7, #8] 8000a6a: b2db uxtb r3, r3 8000a6c: 897a ldrh r2, [r7, #10] 8000a6e: 4611 mov r1, r2 8000a70: 4618 mov r0, r3 8000a72: f7ff fc12 bl 800029a 8000a76: 4603 mov r3, r0 8000a78: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val); 8000a7c: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000a80: 2b00 cmp r3, #0 8000a82: d108 bne.n 8000a96 8000a84: 893b ldrh r3, [r7, #8] 8000a86: 461a mov r2, r3 8000a88: 897b ldrh r3, [r7, #10] 8000a8a: f107 000c add.w r0, r7, #12 8000a8e: 49a3 ldr r1, [pc, #652] @ (8000d1c ) 8000a90: f00c fcb0 bl 800d3f4 8000a94: e01c b.n 8000ad0 else sprintf((char*)s,"\nee write error %d", st); 8000a96: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000a9a: f107 030c add.w r3, r7, #12 8000a9e: 49a0 ldr r1, [pc, #640] @ (8000d20 ) 8000aa0: 4618 mov r0, r3 8000aa2: f00c fca7 bl 800d3f4 8000aa6: e013 b.n 8000ad0 }else sprintf((char*)s,"\n?ewaavvvv hex values"); 8000aa8: f107 030c add.w r3, r7, #12 8000aac: 499d ldr r1, [pc, #628] @ (8000d24 ) 8000aae: 4618 mov r0, r3 8000ab0: f00c fca0 bl 800d3f4 8000ab4: e00c b.n 8000ad0 }else sprintf((char*)s,"\n?ewaa hex values"); 8000ab6: f107 030c add.w r3, r7, #12 8000aba: 499b ldr r1, [pc, #620] @ (8000d28 ) 8000abc: 4618 mov r0, r3 8000abe: f00c fc99 bl 800d3f4 8000ac2: e005 b.n 8000ad0 }else sprintf((char*)s,"\n?ewaavvvv"); 8000ac4: f107 030c add.w r3, r7, #12 8000ac8: 4998 ldr r1, [pc, #608] @ (8000d2c ) 8000aca: 4618 mov r0, r3 8000acc: f00c fc92 bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000ad0: bf00 nop 8000ad2: f107 030c add.w r3, r7, #12 8000ad6: 4618 mov r0, r3 8000ad8: f7ff fb38 bl 800014c 8000adc: 4603 mov r3, r0 8000ade: b29a uxth r2, r3 8000ae0: f107 030c add.w r3, r7, #12 8000ae4: 4611 mov r1, r2 8000ae6: 4618 mov r0, r3 8000ae8: f00c f8a6 bl 800cc38 8000aec: 4603 mov r3, r0 8000aee: 2b01 cmp r3, #1 8000af0: d0ef beq.n 8000ad2 break; 8000af2: e154 b.n 8000d9e }else if(rxbuf[1]=='d'){ 8000af4: 4b87 ldr r3, [pc, #540] @ (8000d14 ) 8000af6: 785b ldrb r3, [r3, #1] 8000af8: 2b64 cmp r3, #100 @ 0x64 8000afa: f040 808b bne.w 8000c14 if(rxidx==2){ 8000afe: 4b86 ldr r3, [pc, #536] @ (8000d18 ) 8000b00: 781b ldrb r3, [r3, #0] 8000b02: 2b02 cmp r3, #2 8000b04: d16e bne.n 8000be4 for(i=0;i<32;i++){ 8000b06: 2300 movs r3, #0 8000b08: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000b0c: e046 b.n 8000b9c st=EEW_Read(i, &val); 8000b0e: f107 020a add.w r2, r7, #10 8000b12: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b16: 4611 mov r1, r2 8000b18: 4618 mov r0, r3 8000b1a: f7ff fbab bl 8000274 8000b1e: 4603 mov r3, r0 8000b20: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK){ 8000b24: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000b28: 2b00 cmp r3, #0 8000b2a: d119 bne.n 8000b60 sprintf((char*)s,"\n0x%02x=%5d ",i,val); 8000b2c: f897 207e ldrb.w r2, [r7, #126] @ 0x7e 8000b30: 897b ldrh r3, [r7, #10] 8000b32: f107 000c add.w r0, r7, #12 8000b36: 497e ldr r1, [pc, #504] @ (8000d30 ) 8000b38: f00c fc5c bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b3c: bf00 nop 8000b3e: f107 030c add.w r3, r7, #12 8000b42: 4618 mov r0, r3 8000b44: f7ff fb02 bl 800014c 8000b48: 4603 mov r3, r0 8000b4a: b29a uxth r2, r3 8000b4c: f107 030c add.w r3, r7, #12 8000b50: 4611 mov r1, r2 8000b52: 4618 mov r0, r3 8000b54: f00c f870 bl 800cc38 8000b58: 4603 mov r3, r0 8000b5a: 2b01 cmp r3, #1 8000b5c: d0ef beq.n 8000b3e 8000b5e: e018 b.n 8000b92 sprintf((char*)s,"rderr %d ",st); 8000b60: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000b64: f107 030c add.w r3, r7, #12 8000b68: 4972 ldr r1, [pc, #456] @ (8000d34 ) 8000b6a: 4618 mov r0, r3 8000b6c: f00c fc42 bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b70: bf00 nop 8000b72: f107 030c add.w r3, r7, #12 8000b76: 4618 mov r0, r3 8000b78: f7ff fae8 bl 800014c 8000b7c: 4603 mov r3, r0 8000b7e: b29a uxth r2, r3 8000b80: f107 030c add.w r3, r7, #12 8000b84: 4611 mov r1, r2 8000b86: 4618 mov r0, r3 8000b88: f00c f856 bl 800cc38 8000b8c: 4603 mov r3, r0 8000b8e: 2b01 cmp r3, #1 8000b90: d0ef beq.n 8000b72 for(i=0;i<32;i++){ 8000b92: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b96: 3301 adds r3, #1 8000b98: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000b9c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000ba0: 2b1f cmp r3, #31 8000ba2: d9b4 bls.n 8000b0e if((i%4)==0){ 8000ba4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000ba8: f003 0303 and.w r3, r3, #3 8000bac: b2db uxtb r3, r3 8000bae: 2b00 cmp r3, #0 8000bb0: f040 80f5 bne.w 8000d9e sprintf((char*)s,"\n"); 8000bb4: f107 030c add.w r3, r7, #12 8000bb8: 495f ldr r1, [pc, #380] @ (8000d38 ) 8000bba: 4618 mov r0, r3 8000bbc: f00c fc1a bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000bc0: bf00 nop 8000bc2: f107 030c add.w r3, r7, #12 8000bc6: 4618 mov r0, r3 8000bc8: f7ff fac0 bl 800014c 8000bcc: 4603 mov r3, r0 8000bce: b29a uxth r2, r3 8000bd0: f107 030c add.w r3, r7, #12 8000bd4: 4611 mov r1, r2 8000bd6: 4618 mov r0, r3 8000bd8: f00c f82e bl 800cc38 8000bdc: 4603 mov r3, r0 8000bde: 2b01 cmp r3, #1 8000be0: d0ef beq.n 8000bc2 break; 8000be2: e0dc b.n 8000d9e sprintf((char*)s,"\n?ed"); 8000be4: f107 030c add.w r3, r7, #12 8000be8: 4954 ldr r1, [pc, #336] @ (8000d3c ) 8000bea: 4618 mov r0, r3 8000bec: f00c fc02 bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000bf0: bf00 nop 8000bf2: f107 030c add.w r3, r7, #12 8000bf6: 4618 mov r0, r3 8000bf8: f7ff faa8 bl 800014c 8000bfc: 4603 mov r3, r0 8000bfe: b29a uxth r2, r3 8000c00: f107 030c add.w r3, r7, #12 8000c04: 4611 mov r1, r2 8000c06: 4618 mov r0, r3 8000c08: f00c f816 bl 800cc38 8000c0c: 4603 mov r3, r0 8000c0e: 2b01 cmp r3, #1 8000c10: d0ef beq.n 8000bf2 break; 8000c12: e0c4 b.n 8000d9e }else if(rxbuf[1]=='x'){ 8000c14: 4b3f ldr r3, [pc, #252] @ (8000d14 ) 8000c16: 785b ldrb r3, [r3, #1] 8000c18: 2b78 cmp r3, #120 @ 0x78 8000c1a: d162 bne.n 8000ce2 if(rxidx==2){ 8000c1c: 4b3e ldr r3, [pc, #248] @ (8000d18 ) 8000c1e: 781b ldrb r3, [r3, #0] 8000c20: 2b02 cmp r3, #2 8000c22: d146 bne.n 8000cb2 for(i=0;i<32;i++){ 8000c24: 2300 movs r3, #0 8000c26: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000c2a: e03b b.n 8000ca4 st=EEW_Write(i,deftab[i]); 8000c2c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c30: 4a43 ldr r2, [pc, #268] @ (8000d40 ) 8000c32: 5cd3 ldrb r3, [r2, r3] 8000c34: 461a mov r2, r3 8000c36: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c3a: 4611 mov r1, r2 8000c3c: 4618 mov r0, r3 8000c3e: f7ff fb2c bl 800029a 8000c42: 4603 mov r3, r0 8000c44: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",i,deftab[i]); 8000c48: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000c4c: 2b00 cmp r3, #0 8000c4e: d10b bne.n 8000c68 8000c50: f897 207e ldrb.w r2, [r7, #126] @ 0x7e 8000c54: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c58: 4939 ldr r1, [pc, #228] @ (8000d40 ) 8000c5a: 5ccb ldrb r3, [r1, r3] 8000c5c: f107 000c add.w r0, r7, #12 8000c60: 492e ldr r1, [pc, #184] @ (8000d1c ) 8000c62: f00c fbc7 bl 800d3f4 8000c66: e007 b.n 8000c78 else sprintf((char*)s,"\nee write error %d", st); 8000c68: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000c6c: f107 030c add.w r3, r7, #12 8000c70: 492b ldr r1, [pc, #172] @ (8000d20 ) 8000c72: 4618 mov r0, r3 8000c74: f00c fbbe bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000c78: bf00 nop 8000c7a: f107 030c add.w r3, r7, #12 8000c7e: 4618 mov r0, r3 8000c80: f7ff fa64 bl 800014c 8000c84: 4603 mov r3, r0 8000c86: b29a uxth r2, r3 8000c88: f107 030c add.w r3, r7, #12 8000c8c: 4611 mov r1, r2 8000c8e: 4618 mov r0, r3 8000c90: f00b ffd2 bl 800cc38 8000c94: 4603 mov r3, r0 8000c96: 2b01 cmp r3, #1 8000c98: d0ef beq.n 8000c7a for(i=0;i<32;i++){ 8000c9a: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c9e: 3301 adds r3, #1 8000ca0: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000ca4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000ca8: 2b1f cmp r3, #31 8000caa: d9bf bls.n 8000c2c loadEE(); 8000cac: f000 fb20 bl 80012f0 break; 8000cb0: e075 b.n 8000d9e sprintf((char*)s,"\n?ex"); 8000cb2: f107 030c add.w r3, r7, #12 8000cb6: 4923 ldr r1, [pc, #140] @ (8000d44 ) 8000cb8: 4618 mov r0, r3 8000cba: f00c fb9b bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000cbe: bf00 nop 8000cc0: f107 030c add.w r3, r7, #12 8000cc4: 4618 mov r0, r3 8000cc6: f7ff fa41 bl 800014c 8000cca: 4603 mov r3, r0 8000ccc: b29a uxth r2, r3 8000cce: f107 030c add.w r3, r7, #12 8000cd2: 4611 mov r1, r2 8000cd4: 4618 mov r0, r3 8000cd6: f00b ffaf bl 800cc38 8000cda: 4603 mov r3, r0 8000cdc: 2b01 cmp r3, #1 8000cde: d0ef beq.n 8000cc0 break; 8000ce0: e05d b.n 8000d9e sprintf((char*)s,"\n?er|w|d|x"); 8000ce2: f107 030c add.w r3, r7, #12 8000ce6: 4918 ldr r1, [pc, #96] @ (8000d48 ) 8000ce8: 4618 mov r0, r3 8000cea: f00c fb83 bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000cee: bf00 nop 8000cf0: f107 030c add.w r3, r7, #12 8000cf4: 4618 mov r0, r3 8000cf6: f7ff fa29 bl 800014c 8000cfa: 4603 mov r3, r0 8000cfc: b29a uxth r2, r3 8000cfe: f107 030c add.w r3, r7, #12 8000d02: 4611 mov r1, r2 8000d04: 4618 mov r0, r3 8000d06: f00b ff97 bl 800cc38 8000d0a: 4603 mov r3, r0 8000d0c: 2b01 cmp r3, #1 8000d0e: d0ef beq.n 8000cf0 break; 8000d10: e045 b.n 8000d9e 8000d12: bf00 nop 8000d14: 20000230 .word 0x20000230 8000d18: 2000022c .word 0x2000022c 8000d1c: 0800debc .word 0x0800debc 8000d20: 0800ded0 .word 0x0800ded0 8000d24: 0800dee4 .word 0x0800dee4 8000d28: 0800defc .word 0x0800defc 8000d2c: 0800df10 .word 0x0800df10 8000d30: 0800df1c .word 0x0800df1c 8000d34: 0800df2c .word 0x0800df2c 8000d38: 0800df38 .word 0x0800df38 8000d3c: 0800df3c .word 0x0800df3c 8000d40: 0800dfe4 .word 0x0800dfe4 8000d44: 0800df44 .word 0x0800df44 8000d48: 0800df4c .word 0x0800df4c sprintf((char*)s,"\n?eraa | ewaavvvv"); 8000d4c: f107 030c add.w r3, r7, #12 8000d50: 491b ldr r1, [pc, #108] @ (8000dc0 ) 8000d52: 4618 mov r0, r3 8000d54: f00c fb4e bl 800d3f4 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000d58: bf00 nop 8000d5a: f107 030c add.w r3, r7, #12 8000d5e: 4618 mov r0, r3 8000d60: f7ff f9f4 bl 800014c 8000d64: 4603 mov r3, r0 8000d66: b29a uxth r2, r3 8000d68: f107 030c add.w r3, r7, #12 8000d6c: 4611 mov r1, r2 8000d6e: 4618 mov r0, r3 8000d70: f00b ff62 bl 800cc38 8000d74: 4603 mov r3, r0 8000d76: 2b01 cmp r3, #1 8000d78: d0ef beq.n 8000d5a break; 8000d7a: e010 b.n 8000d9e default: sprintf((char*)s,"\n?"); 8000d7c: f107 030c add.w r3, r7, #12 8000d80: 4910 ldr r1, [pc, #64] @ (8000dc4 ) 8000d82: 4618 mov r0, r3 8000d84: f00c fb36 bl 800d3f4 while (CDC_Transmit_FS(s, 2) == USBD_BUSY); 8000d88: bf00 nop 8000d8a: f107 030c add.w r3, r7, #12 8000d8e: 2102 movs r1, #2 8000d90: 4618 mov r0, r3 8000d92: f00b ff51 bl 800cc38 8000d96: 4603 mov r3, r0 8000d98: 2b01 cmp r3, #1 8000d9a: d0f6 beq.n 8000d8a break; 8000d9c: e000 b.n 8000da0 break; 8000d9e: bf00 nop } } rxidx=0; 8000da0: 4b09 ldr r3, [pc, #36] @ (8000dc8 ) 8000da2: 2200 movs r2, #0 8000da4: 701a strb r2, [r3, #0] 8000da6: e007 b.n 8000db8 }else rxidx++; 8000da8: 4b07 ldr r3, [pc, #28] @ (8000dc8 ) 8000daa: 781b ldrb r3, [r3, #0] 8000dac: 3301 adds r3, #1 8000dae: b2da uxtb r2, r3 8000db0: 4b05 ldr r3, [pc, #20] @ (8000dc8 ) 8000db2: 701a strb r2, [r3, #0] 8000db4: e000 b.n 8000db8 if (rx < 0) return; 8000db6: bf00 nop // tiny spin or yield } } 8000db8: 3784 adds r7, #132 @ 0x84 8000dba: 46bd mov sp, r7 8000dbc: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8000dc0: 0800df58 .word 0x0800df58 8000dc4: 0800df6c .word 0x0800df6c 8000dc8: 2000022c .word 0x2000022c 08000dcc : extern UART_HandleTypeDef huart1; extern uint8_t pulsanti; extern uint16_t stPulsanti; extern omCiclo_st stCiclo; void debug(void){ 8000dcc: b580 push {r7, lr} 8000dce: b09a sub sp, #104 @ 0x68 8000dd0: af00 add r7, sp, #0 static uint8_t mempulsanti=0; static uint16_t memstPulsanti=0; static omCiclo_st memstCiclo=omchiuso; char s [100]; if(mempulsanti!=pulsanti){ 8000dd2: 4b2f ldr r3, [pc, #188] @ (8000e90 ) 8000dd4: 781a ldrb r2, [r3, #0] 8000dd6: 4b2f ldr r3, [pc, #188] @ (8000e94 ) 8000dd8: 781b ldrb r3, [r3, #0] 8000dda: 429a cmp r2, r3 8000ddc: d017 beq.n 8000e0e mempulsanti=pulsanti; 8000dde: 4b2d ldr r3, [pc, #180] @ (8000e94 ) 8000de0: 781a ldrb r2, [r3, #0] 8000de2: 4b2b ldr r3, [pc, #172] @ (8000e90 ) 8000de4: 701a strb r2, [r3, #0] sprintf(s,"\npulsanti=%X",pulsanti); 8000de6: 4b2b ldr r3, [pc, #172] @ (8000e94 ) 8000de8: 781b ldrb r3, [r3, #0] 8000dea: 461a mov r2, r3 8000dec: 1d3b adds r3, r7, #4 8000dee: 492a ldr r1, [pc, #168] @ (8000e98 ) 8000df0: 4618 mov r0, r3 8000df2: f00c faff bl 800d3f4 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8000df6: 1d3b adds r3, r7, #4 8000df8: 4618 mov r0, r3 8000dfa: f7ff f9a7 bl 800014c 8000dfe: 4603 mov r3, r0 8000e00: b29a uxth r2, r3 8000e02: 1d39 adds r1, r7, #4 8000e04: f04f 33ff mov.w r3, #4294967295 8000e08: 4824 ldr r0, [pc, #144] @ (8000e9c ) 8000e0a: f007 fd03 bl 8008814 } if(memstPulsanti!=stPulsanti){ 8000e0e: 4b24 ldr r3, [pc, #144] @ (8000ea0 ) 8000e10: 881a ldrh r2, [r3, #0] 8000e12: 4b24 ldr r3, [pc, #144] @ (8000ea4 ) 8000e14: 881b ldrh r3, [r3, #0] 8000e16: 429a cmp r2, r3 8000e18: d017 beq.n 8000e4a memstPulsanti=stPulsanti; 8000e1a: 4b22 ldr r3, [pc, #136] @ (8000ea4 ) 8000e1c: 881a ldrh r2, [r3, #0] 8000e1e: 4b20 ldr r3, [pc, #128] @ (8000ea0 ) 8000e20: 801a strh r2, [r3, #0] sprintf(s,"\nstpulsanti=%X",stPulsanti); 8000e22: 4b20 ldr r3, [pc, #128] @ (8000ea4 ) 8000e24: 881b ldrh r3, [r3, #0] 8000e26: 461a mov r2, r3 8000e28: 1d3b adds r3, r7, #4 8000e2a: 491f ldr r1, [pc, #124] @ (8000ea8 ) 8000e2c: 4618 mov r0, r3 8000e2e: f00c fae1 bl 800d3f4 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8000e32: 1d3b adds r3, r7, #4 8000e34: 4618 mov r0, r3 8000e36: f7ff f989 bl 800014c 8000e3a: 4603 mov r3, r0 8000e3c: b29a uxth r2, r3 8000e3e: 1d39 adds r1, r7, #4 8000e40: f04f 33ff mov.w r3, #4294967295 8000e44: 4815 ldr r0, [pc, #84] @ (8000e9c ) 8000e46: f007 fce5 bl 8008814 } if(memstCiclo!=stCiclo){ 8000e4a: 4b18 ldr r3, [pc, #96] @ (8000eac ) 8000e4c: 781a ldrb r2, [r3, #0] 8000e4e: 4b18 ldr r3, [pc, #96] @ (8000eb0 ) 8000e50: 781b ldrb r3, [r3, #0] 8000e52: 429a cmp r2, r3 8000e54: d017 beq.n 8000e86 memstCiclo=stCiclo; 8000e56: 4b16 ldr r3, [pc, #88] @ (8000eb0 ) 8000e58: 781a ldrb r2, [r3, #0] 8000e5a: 4b14 ldr r3, [pc, #80] @ (8000eac ) 8000e5c: 701a strb r2, [r3, #0] sprintf(s,"\nstCiclo=%d",stCiclo); 8000e5e: 4b14 ldr r3, [pc, #80] @ (8000eb0 ) 8000e60: 781b ldrb r3, [r3, #0] 8000e62: 461a mov r2, r3 8000e64: 1d3b adds r3, r7, #4 8000e66: 4913 ldr r1, [pc, #76] @ (8000eb4 ) 8000e68: 4618 mov r0, r3 8000e6a: f00c fac3 bl 800d3f4 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8000e6e: 1d3b adds r3, r7, #4 8000e70: 4618 mov r0, r3 8000e72: f7ff f96b bl 800014c 8000e76: 4603 mov r3, r0 8000e78: b29a uxth r2, r3 8000e7a: 1d39 adds r1, r7, #4 8000e7c: f04f 33ff mov.w r3, #4294967295 8000e80: 4806 ldr r0, [pc, #24] @ (8000e9c ) 8000e82: f007 fcc7 bl 8008814 } } 8000e86: bf00 nop 8000e88: 3768 adds r7, #104 @ 0x68 8000e8a: 46bd mov sp, r7 8000e8c: bd80 pop {r7, pc} 8000e8e: bf00 nop 8000e90: 20000294 .word 0x20000294 8000e94: 200003e8 .word 0x200003e8 8000e98: 0800df70 .word 0x0800df70 8000e9c: 200003a0 .word 0x200003a0 8000ea0: 20000296 .word 0x20000296 8000ea4: 20000430 .word 0x20000430 8000ea8: 0800df80 .word 0x0800df80 8000eac: 20000298 .word 0x20000298 8000eb0: 20000432 .word 0x20000432 8000eb4: 0800df90 .word 0x0800df90 08000eb8 : { 8000eb8: b580 push {r7, lr} 8000eba: b082 sub sp, #8 8000ebc: af00 add r7, sp, #0 8000ebe: 4603 mov r3, r0 8000ec0: 6039 str r1, [r7, #0] 8000ec2: 71fb strb r3, [r7, #7] return EE_ReadVariable(EEW_ADDR(idx), value); 8000ec4: 79fb ldrb r3, [r7, #7] 8000ec6: b29b uxth r3, r3 8000ec8: 3301 adds r3, #1 8000eca: b29b uxth r3, r3 8000ecc: 6839 ldr r1, [r7, #0] 8000ece: 4618 mov r0, r3 8000ed0: f000 f9b8 bl 8001244 8000ed4: 4603 mov r3, r0 } 8000ed6: 4618 mov r0, r3 8000ed8: 3708 adds r7, #8 8000eda: 46bd mov sp, r7 8000edc: bd80 pop {r7, pc} 08000ede : /* ========================================================================= */ /* --- Internal helpers ---------------------------------------------------- */ static uint16_t EE_GetPageStatus(uint32_t pageBase) { 8000ede: b480 push {r7} 8000ee0: b083 sub sp, #12 8000ee2: af00 add r7, sp, #0 8000ee4: 6078 str r0, [r7, #4] return *(__IO uint16_t *)pageBase; 8000ee6: 687b ldr r3, [r7, #4] 8000ee8: 881b ldrh r3, [r3, #0] 8000eea: b29b uxth r3, r3 } 8000eec: 4618 mov r0, r3 8000eee: 370c adds r7, #12 8000ef0: 46bd mov sp, r7 8000ef2: bc80 pop {r7} 8000ef4: 4770 bx lr 08000ef6 : static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data) { 8000ef6: b5b0 push {r4, r5, r7, lr} 8000ef8: b084 sub sp, #16 8000efa: af00 add r7, sp, #0 8000efc: 6078 str r0, [r7, #4] 8000efe: 460b mov r3, r1 8000f00: 807b strh r3, [r7, #2] HAL_StatusTypeDef status; HAL_FLASH_Unlock(); 8000f02: f004 f845 bl 8004f90 status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data); 8000f06: 887b ldrh r3, [r7, #2] 8000f08: 2200 movs r2, #0 8000f0a: 461c mov r4, r3 8000f0c: 4615 mov r5, r2 8000f0e: 4622 mov r2, r4 8000f10: 462b mov r3, r5 8000f12: 6879 ldr r1, [r7, #4] 8000f14: 2001 movs r0, #1 8000f16: f003 ffcb bl 8004eb0 8000f1a: 4603 mov r3, r0 8000f1c: 73fb strb r3, [r7, #15] HAL_FLASH_Lock(); 8000f1e: f004 f85d bl 8004fdc return status; 8000f22: 7bfb ldrb r3, [r7, #15] } 8000f24: 4618 mov r0, r3 8000f26: 3710 adds r7, #16 8000f28: 46bd mov sp, r7 8000f2a: bdb0 pop {r4, r5, r7, pc} 08000f2c : static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress) { 8000f2c: b580 push {r7, lr} 8000f2e: b088 sub sp, #32 8000f30: af00 add r7, sp, #0 8000f32: 6078 str r0, [r7, #4] HAL_StatusTypeDef status; FLASH_EraseInitTypeDef EraseInit; uint32_t PageError = 0; 8000f34: 2300 movs r3, #0 8000f36: 60bb str r3, [r7, #8] HAL_FLASH_Unlock(); 8000f38: f004 f82a bl 8004f90 EraseInit.TypeErase = FLASH_TYPEERASE_PAGES; 8000f3c: 2300 movs r3, #0 8000f3e: 60fb str r3, [r7, #12] EraseInit.PageAddress = PageAddress; 8000f40: 687b ldr r3, [r7, #4] 8000f42: 617b str r3, [r7, #20] EraseInit.NbPages = 1; 8000f44: 2301 movs r3, #1 8000f46: 61bb str r3, [r7, #24] status = HAL_FLASHEx_Erase(&EraseInit, &PageError); 8000f48: f107 0208 add.w r2, r7, #8 8000f4c: f107 030c add.w r3, r7, #12 8000f50: 4611 mov r1, r2 8000f52: 4618 mov r0, r3 8000f54: f004 f904 bl 8005160 8000f58: 4603 mov r3, r0 8000f5a: 77fb strb r3, [r7, #31] HAL_FLASH_Lock(); 8000f5c: f004 f83e bl 8004fdc return status; 8000f60: 7ffb ldrb r3, [r7, #31] } 8000f62: 4618 mov r0, r3 8000f64: 3720 adds r7, #32 8000f66: 46bd mov sp, r7 8000f68: bd80 pop {r7, pc} 08000f6a : /* Find first free record address in given page (returns 0 if full) */ static uint32_t EE_FindFreeAddress(uint32_t pageBase) { 8000f6a: b480 push {r7} 8000f6c: b087 sub sp, #28 8000f6e: af00 add r7, sp, #0 8000f70: 6078 str r0, [r7, #4] uint32_t addr = pageBase + 2U; /* Skip status word */ 8000f72: 687b ldr r3, [r7, #4] 8000f74: 3302 adds r3, #2 8000f76: 617b str r3, [r7, #20] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8000f78: 687b ldr r3, [r7, #4] 8000f7a: f503 6380 add.w r3, r3, #1024 @ 0x400 8000f7e: 613b str r3, [r7, #16] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 8000f80: e00c b.n 8000f9c { uint16_t vaddr = *(__IO uint16_t *)addr; 8000f82: 697b ldr r3, [r7, #20] 8000f84: 881b ldrh r3, [r3, #0] 8000f86: 81fb strh r3, [r7, #14] if (vaddr == 0xFFFFU) 8000f88: 89fb ldrh r3, [r7, #14] 8000f8a: f64f 72ff movw r2, #65535 @ 0xffff 8000f8e: 4293 cmp r3, r2 8000f90: d101 bne.n 8000f96 { /* Empty slot */ return addr; 8000f92: 697b ldr r3, [r7, #20] 8000f94: e008 b.n 8000fa8 } addr += sizeof(EE_Record_t); 8000f96: 697b ldr r3, [r7, #20] 8000f98: 3304 adds r3, #4 8000f9a: 617b str r3, [r7, #20] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 8000f9c: 693b ldr r3, [r7, #16] 8000f9e: 3b03 subs r3, #3 8000fa0: 697a ldr r2, [r7, #20] 8000fa2: 429a cmp r2, r3 8000fa4: d3ed bcc.n 8000f82 } return 0U; /* No space */ 8000fa6: 2300 movs r3, #0 } 8000fa8: 4618 mov r0, r3 8000faa: 371c adds r7, #28 8000fac: 46bd mov sp, r7 8000fae: bc80 pop {r7} 8000fb0: 4770 bx lr 08000fb2 : /* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */ /* Find latest value of VirtAddress in a specific page (scan forward) */ static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data) { 8000fb2: b480 push {r7} 8000fb4: b089 sub sp, #36 @ 0x24 8000fb6: af00 add r7, sp, #0 8000fb8: 60f8 str r0, [r7, #12] 8000fba: 460b mov r3, r1 8000fbc: 607a str r2, [r7, #4] 8000fbe: 817b strh r3, [r7, #10] uint32_t addr = pageBase + 2U; // skip status halfword 8000fc0: 68fb ldr r3, [r7, #12] 8000fc2: 3302 adds r3, #2 8000fc4: 61fb str r3, [r7, #28] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8000fc6: 68fb ldr r3, [r7, #12] 8000fc8: f503 6380 add.w r3, r3, #1024 @ 0x400 8000fcc: 617b str r3, [r7, #20] EE_Status result = EE_NOT_FOUND; 8000fce: 2302 movs r3, #2 8000fd0: 76fb strb r3, [r7, #27] uint16_t lastVal = 0; 8000fd2: 2300 movs r3, #0 8000fd4: 833b strh r3, [r7, #24] if (Data == NULL) 8000fd6: 687b ldr r3, [r7, #4] 8000fd8: 2b00 cmp r3, #0 8000fda: d118 bne.n 800100e return EE_ERROR; 8000fdc: 2301 movs r3, #1 8000fde: e024 b.n 800102a while (addr <= (pageEnd - sizeof(EE_Record_t))) { uint16_t vaddr = *(__IO uint16_t *)addr; 8000fe0: 69fb ldr r3, [r7, #28] 8000fe2: 881b ldrh r3, [r3, #0] 8000fe4: 827b strh r3, [r7, #18] if (vaddr == 0xFFFFU) 8000fe6: 8a7b ldrh r3, [r7, #18] 8000fe8: f64f 72ff movw r2, #65535 @ 0xffff 8000fec: 4293 cmp r3, r2 8000fee: d014 beq.n 800101a { // First empty slot => no more records in this page break; } uint16_t value = *(__IO uint16_t *)(addr + 2U); 8000ff0: 69fb ldr r3, [r7, #28] 8000ff2: 3302 adds r3, #2 8000ff4: 881b ldrh r3, [r3, #0] 8000ff6: 823b strh r3, [r7, #16] if (vaddr == VirtAddress) 8000ff8: 8a7a ldrh r2, [r7, #18] 8000ffa: 897b ldrh r3, [r7, #10] 8000ffc: 429a cmp r2, r3 8000ffe: d103 bne.n 8001008 { lastVal = value; // keep most recent 8001000: 8a3b ldrh r3, [r7, #16] 8001002: 833b strh r3, [r7, #24] result = EE_OK; 8001004: 2300 movs r3, #0 8001006: 76fb strb r3, [r7, #27] } addr += sizeof(EE_Record_t); // move 4 bytes forward 8001008: 69fb ldr r3, [r7, #28] 800100a: 3304 adds r3, #4 800100c: 61fb str r3, [r7, #28] while (addr <= (pageEnd - sizeof(EE_Record_t))) 800100e: 697b ldr r3, [r7, #20] 8001010: 3b04 subs r3, #4 8001012: 69fa ldr r2, [r7, #28] 8001014: 429a cmp r2, r3 8001016: d9e3 bls.n 8000fe0 8001018: e000 b.n 800101c break; 800101a: bf00 nop } if (result == EE_OK) 800101c: 7efb ldrb r3, [r7, #27] 800101e: 2b00 cmp r3, #0 8001020: d102 bne.n 8001028 *Data = lastVal; 8001022: 687b ldr r3, [r7, #4] 8001024: 8b3a ldrh r2, [r7, #24] 8001026: 801a strh r2, [r3, #0] return result; 8001028: 7efb ldrb r3, [r7, #27] } 800102a: 4618 mov r0, r3 800102c: 3724 adds r7, #36 @ 0x24 800102e: 46bd mov sp, r7 8001030: bc80 pop {r7} 8001032: 4770 bx lr 08001034 : /* Format both pages: erase and set PAGE0 as VALID */ static EE_Status EE_Format(void) { 8001034: b580 push {r7, lr} 8001036: af00 add r7, sp, #0 if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK) 8001038: 480f ldr r0, [pc, #60] @ (8001078 ) 800103a: f7ff ff77 bl 8000f2c 800103e: 4603 mov r3, r0 8001040: 2b00 cmp r3, #0 8001042: d001 beq.n 8001048 return EE_STATUS_ERROR; 8001044: 2301 movs r3, #1 8001046: e015 b.n 8001074 if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK) 8001048: 480c ldr r0, [pc, #48] @ (800107c ) 800104a: f7ff ff6f bl 8000f2c 800104e: 4603 mov r3, r0 8001050: 2b00 cmp r3, #0 8001052: d001 beq.n 8001058 return EE_STATUS_ERROR; 8001054: 2301 movs r3, #1 8001056: e00d b.n 8001074 if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK) 8001058: f64a 21aa movw r1, #43690 @ 0xaaaa 800105c: 4806 ldr r0, [pc, #24] @ (8001078 ) 800105e: f7ff ff4a bl 8000ef6 8001062: 4603 mov r3, r0 8001064: 2b00 cmp r3, #0 8001066: d001 beq.n 800106c return EE_STATUS_ERROR; 8001068: 2301 movs r3, #1 800106a: e003 b.n 8001074 /* PAGE1 will remain erased (status = 0xFFFF) */ EE_ActivePageBase = EE_PAGE0_BASE; 800106c: 4b04 ldr r3, [pc, #16] @ (8001080 ) 800106e: 4a02 ldr r2, [pc, #8] @ (8001078 ) 8001070: 601a str r2, [r3, #0] return EE_STATUS_OK; 8001072: 2300 movs r3, #0 } 8001074: 4618 mov r0, r3 8001076: bd80 pop {r7, pc} 8001078: 0800f800 .word 0x0800f800 800107c: 0800fc00 .word 0x0800fc00 8001080: 20000000 .word 0x20000000 08001084 : /* Get the base of the other page */ static uint32_t EE_GetOtherPageBase(uint32_t pageBase) { 8001084: b480 push {r7} 8001086: b083 sub sp, #12 8001088: af00 add r7, sp, #0 800108a: 6078 str r0, [r7, #4] return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE; 800108c: 687b ldr r3, [r7, #4] 800108e: 4a05 ldr r2, [pc, #20] @ (80010a4 ) 8001090: 4293 cmp r3, r2 8001092: d101 bne.n 8001098 8001094: 4b04 ldr r3, [pc, #16] @ (80010a8 ) 8001096: e000 b.n 800109a 8001098: 4b02 ldr r3, [pc, #8] @ (80010a4 ) } 800109a: 4618 mov r0, r3 800109c: 370c adds r7, #12 800109e: 46bd mov sp, r7 80010a0: bc80 pop {r7} 80010a2: 4770 bx lr 80010a4: 0800f800 .word 0x0800f800 80010a8: 0800fc00 .word 0x0800fc00 080010ac : /* Page transfer (garbage collection + new write) */ static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data) { 80010ac: b580 push {r7, lr} 80010ae: b088 sub sp, #32 80010b0: af00 add r7, sp, #0 80010b2: 4603 mov r3, r0 80010b4: 460a mov r2, r1 80010b6: 80fb strh r3, [r7, #6] 80010b8: 4613 mov r3, r2 80010ba: 80bb strh r3, [r7, #4] uint32_t oldBase = EE_ActivePageBase; 80010bc: 4b3c ldr r3, [pc, #240] @ (80011b0 ) 80010be: 681b ldr r3, [r3, #0] 80010c0: 617b str r3, [r7, #20] uint32_t newBase = EE_GetOtherPageBase(oldBase); 80010c2: 6978 ldr r0, [r7, #20] 80010c4: f7ff ffde bl 8001084 80010c8: 6138 str r0, [r7, #16] uint32_t addr; uint16_t value; EE_Status st; /* Erase new page */ if (EE_FlashErasePage(newBase) != HAL_OK) 80010ca: 6938 ldr r0, [r7, #16] 80010cc: f7ff ff2e bl 8000f2c 80010d0: 4603 mov r3, r0 80010d2: 2b00 cmp r3, #0 80010d4: d001 beq.n 80010da return EE_STATUS_ERROR; 80010d6: 2301 movs r3, #1 80010d8: e065 b.n 80011a6 /* Mark new page as RECEIVE */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK) 80010da: f245 5155 movw r1, #21845 @ 0x5555 80010de: 6938 ldr r0, [r7, #16] 80010e0: f7ff ff09 bl 8000ef6 80010e4: 4603 mov r3, r0 80010e6: 2b00 cmp r3, #0 80010e8: d001 beq.n 80010ee return EE_STATUS_ERROR; 80010ea: 2301 movs r3, #1 80010ec: e05b b.n 80011a6 /* Start writing records just after status */ addr = newBase + 2U; 80010ee: 693b ldr r3, [r7, #16] 80010f0: 3302 adds r3, #2 80010f2: 61fb str r3, [r7, #28] /* For each known virtual variable */ for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 80010f4: 2300 movs r3, #0 80010f6: 837b strh r3, [r7, #26] 80010f8: e03c b.n 8001174 { uint16_t vaddr = EE_VirtAddrs[i]; 80010fa: 8b7b ldrh r3, [r7, #26] 80010fc: 4a2d ldr r2, [pc, #180] @ (80011b4 ) 80010fe: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 8001102: 81fb strh r3, [r7, #14] if (vaddr == VirtAddress) 8001104: 89fa ldrh r2, [r7, #14] 8001106: 88fb ldrh r3, [r7, #6] 8001108: 429a cmp r2, r3 800110a: d102 bne.n 8001112 { /* Use the new data passed into PageTransfer */ value = Data; 800110c: 88bb ldrh r3, [r7, #4] 800110e: 817b strh r3, [r7, #10] 8001110: e00b b.n 800112a } else { /* Read latest value from old active page */ st = EE_FindInPage(oldBase, vaddr, &value); 8001112: f107 020a add.w r2, r7, #10 8001116: 89fb ldrh r3, [r7, #14] 8001118: 4619 mov r1, r3 800111a: 6978 ldr r0, [r7, #20] 800111c: f7ff ff49 bl 8000fb2 8001120: 4603 mov r3, r0 8001122: 737b strb r3, [r7, #13] if (st != EE_STATUS_OK) 8001124: 7b7b ldrb r3, [r7, #13] 8001126: 2b00 cmp r3, #0 8001128: d120 bne.n 800116c continue; } } /* Write record to new page */ if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK) 800112a: 89fb ldrh r3, [r7, #14] 800112c: 4619 mov r1, r3 800112e: 69f8 ldr r0, [r7, #28] 8001130: f7ff fee1 bl 8000ef6 8001134: 4603 mov r3, r0 8001136: 2b00 cmp r3, #0 8001138: d001 beq.n 800113e return EE_STATUS_ERROR; 800113a: 2301 movs r3, #1 800113c: e033 b.n 80011a6 if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK) 800113e: 69fb ldr r3, [r7, #28] 8001140: 3302 adds r3, #2 8001142: 897a ldrh r2, [r7, #10] 8001144: 4611 mov r1, r2 8001146: 4618 mov r0, r3 8001148: f7ff fed5 bl 8000ef6 800114c: 4603 mov r3, r0 800114e: 2b00 cmp r3, #0 8001150: d001 beq.n 8001156 return EE_STATUS_ERROR; 8001152: 2301 movs r3, #1 8001154: e027 b.n 80011a6 addr += sizeof(EE_Record_t); 8001156: 69fb ldr r3, [r7, #28] 8001158: 3304 adds r3, #4 800115a: 61fb str r3, [r7, #28] if (addr >= (newBase + EE_PAGE_SIZE)) 800115c: 693b ldr r3, [r7, #16] 800115e: f503 6380 add.w r3, r3, #1024 @ 0x400 8001162: 69fa ldr r2, [r7, #28] 8001164: 429a cmp r2, r3 8001166: d302 bcc.n 800116e return EE_STATUS_NO_SPACE; 8001168: 2303 movs r3, #3 800116a: e01c b.n 80011a6 continue; 800116c: bf00 nop for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 800116e: 8b7b ldrh r3, [r7, #26] 8001170: 3301 adds r3, #1 8001172: 837b strh r3, [r7, #26] 8001174: 8b7b ldrh r3, [r7, #26] 8001176: 2b3f cmp r3, #63 @ 0x3f 8001178: d9bf bls.n 80010fa } /* Erase old page */ if (EE_FlashErasePage(oldBase) != HAL_OK) 800117a: 6978 ldr r0, [r7, #20] 800117c: f7ff fed6 bl 8000f2c 8001180: 4603 mov r3, r0 8001182: 2b00 cmp r3, #0 8001184: d001 beq.n 800118a return EE_STATUS_ERROR; 8001186: 2301 movs r3, #1 8001188: e00d b.n 80011a6 /* Mark new page as VALID */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK) 800118a: f64a 21aa movw r1, #43690 @ 0xaaaa 800118e: 6938 ldr r0, [r7, #16] 8001190: f7ff feb1 bl 8000ef6 8001194: 4603 mov r3, r0 8001196: 2b00 cmp r3, #0 8001198: d001 beq.n 800119e return EE_STATUS_ERROR; 800119a: 2301 movs r3, #1 800119c: e003 b.n 80011a6 /* Update active page */ EE_ActivePageBase = newBase; 800119e: 4a04 ldr r2, [pc, #16] @ (80011b0 ) 80011a0: 693b ldr r3, [r7, #16] 80011a2: 6013 str r3, [r2, #0] return EE_STATUS_OK; 80011a4: 2300 movs r3, #0 } 80011a6: 4618 mov r0, r3 80011a8: 3720 adds r7, #32 80011aa: 46bd mov sp, r7 80011ac: bd80 pop {r7, pc} 80011ae: bf00 nop 80011b0: 20000000 .word 0x20000000 80011b4: 0800e024 .word 0x0800e024 080011b8 : * - Checks page statuses and chooses the active page. * - If inconsistent or blank, formats pages. * PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...) */ uint16_t EE_Init(void) { 80011b8: b580 push {r7, lr} 80011ba: b082 sub sp, #8 80011bc: af00 add r7, sp, #0 uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE); 80011be: 481e ldr r0, [pc, #120] @ (8001238 ) 80011c0: f7ff fe8d bl 8000ede 80011c4: 4603 mov r3, r0 80011c6: 80fb strh r3, [r7, #6] uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE); 80011c8: 481c ldr r0, [pc, #112] @ (800123c ) 80011ca: f7ff fe88 bl 8000ede 80011ce: 4603 mov r3, r0 80011d0: 80bb strh r3, [r7, #4] if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED)) 80011d2: 88fb ldrh r3, [r7, #6] 80011d4: f64f 72ff movw r2, #65535 @ 0xffff 80011d8: 4293 cmp r3, r2 80011da: d108 bne.n 80011ee 80011dc: 88bb ldrh r3, [r7, #4] 80011de: f64f 72ff movw r2, #65535 @ 0xffff 80011e2: 4293 cmp r3, r2 80011e4: d103 bne.n 80011ee { /* Fresh device -> format */ return (uint16_t)EE_Format(); 80011e6: f7ff ff25 bl 8001034 80011ea: 4603 mov r3, r0 80011ec: e020 b.n 8001230 } else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED)) 80011ee: 88fb ldrh r3, [r7, #6] 80011f0: f64a 22aa movw r2, #43690 @ 0xaaaa 80011f4: 4293 cmp r3, r2 80011f6: d109 bne.n 800120c 80011f8: 88bb ldrh r3, [r7, #4] 80011fa: f64f 72ff movw r2, #65535 @ 0xffff 80011fe: 4293 cmp r3, r2 8001200: d104 bne.n 800120c { EE_ActivePageBase = EE_PAGE0_BASE; 8001202: 4b0f ldr r3, [pc, #60] @ (8001240 ) 8001204: 4a0c ldr r2, [pc, #48] @ (8001238 ) 8001206: 601a str r2, [r3, #0] return EE_OK; 8001208: 2300 movs r3, #0 800120a: e011 b.n 8001230 } else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED)) 800120c: 88bb ldrh r3, [r7, #4] 800120e: f64a 22aa movw r2, #43690 @ 0xaaaa 8001212: 4293 cmp r3, r2 8001214: d109 bne.n 800122a 8001216: 88fb ldrh r3, [r7, #6] 8001218: f64f 72ff movw r2, #65535 @ 0xffff 800121c: 4293 cmp r3, r2 800121e: d104 bne.n 800122a { EE_ActivePageBase = EE_PAGE1_BASE; 8001220: 4b07 ldr r3, [pc, #28] @ (8001240 ) 8001222: 4a06 ldr r2, [pc, #24] @ (800123c ) 8001224: 601a str r2, [r3, #0] return EE_OK; 8001226: 2300 movs r3, #0 8001228: e002 b.n 8001230 } else { /* Any weird or inconsistent state -> reformat */ return (uint16_t)EE_Format(); 800122a: f7ff ff03 bl 8001034 800122e: 4603 mov r3, r0 } } 8001230: 4618 mov r0, r3 8001232: 3708 adds r7, #8 8001234: 46bd mov sp, r7 8001236: bd80 pop {r7, pc} 8001238: 0800f800 .word 0x0800f800 800123c: 0800fc00 .word 0x0800fc00 8001240: 20000000 .word 0x20000000 08001244 : /* * Read a 16-bit variable by its virtual address. * PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t) */ uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data) { 8001244: b580 push {r7, lr} 8001246: b084 sub sp, #16 8001248: af00 add r7, sp, #0 800124a: 4603 mov r3, r0 800124c: 6039 str r1, [r7, #0] 800124e: 80fb strh r3, [r7, #6] EE_Status st; if (Data == NULL) 8001250: 683b ldr r3, [r7, #0] 8001252: 2b00 cmp r3, #0 8001254: d101 bne.n 800125a return EE_ERROR; 8001256: 2301 movs r3, #1 8001258: e00a b.n 8001270 st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data); 800125a: 4b07 ldr r3, [pc, #28] @ (8001278 ) 800125c: 681b ldr r3, [r3, #0] 800125e: 88f9 ldrh r1, [r7, #6] 8001260: 683a ldr r2, [r7, #0] 8001262: 4618 mov r0, r3 8001264: f7ff fea5 bl 8000fb2 8001268: 4603 mov r3, r0 800126a: 73fb strb r3, [r7, #15] return (uint16_t)st; 800126c: 7bfb ldrb r3, [r7, #15] 800126e: b29b uxth r3, r3 } 8001270: 4618 mov r0, r3 8001272: 3710 adds r7, #16 8001274: 46bd mov sp, r7 8001276: bd80 pop {r7, pc} 8001278: 20000000 .word 0x20000000 0800127c : * - Writes a new record in the active page. * - If the page is full, triggers a page transfer (GC). * PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t) */ uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data) { 800127c: b580 push {r7, lr} 800127e: b084 sub sp, #16 8001280: af00 add r7, sp, #0 8001282: 4603 mov r3, r0 8001284: 460a mov r2, r1 8001286: 80fb strh r3, [r7, #6] 8001288: 4613 mov r3, r2 800128a: 80bb strh r3, [r7, #4] uint32_t freeAddr; EE_Status st; /* Find free space in active page */ freeAddr = EE_FindFreeAddress(EE_ActivePageBase); 800128c: 4b17 ldr r3, [pc, #92] @ (80012ec ) 800128e: 681b ldr r3, [r3, #0] 8001290: 4618 mov r0, r3 8001292: f7ff fe6a bl 8000f6a 8001296: 60f8 str r0, [r7, #12] if (freeAddr != 0U) 8001298: 68fb ldr r3, [r7, #12] 800129a: 2b00 cmp r3, #0 800129c: d017 beq.n 80012ce { /* Write new record */ if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK) 800129e: 88fb ldrh r3, [r7, #6] 80012a0: 4619 mov r1, r3 80012a2: 68f8 ldr r0, [r7, #12] 80012a4: f7ff fe27 bl 8000ef6 80012a8: 4603 mov r3, r0 80012aa: 2b00 cmp r3, #0 80012ac: d001 beq.n 80012b2 return EE_ERROR; 80012ae: 2301 movs r3, #1 80012b0: e017 b.n 80012e2 if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK) 80012b2: 68fb ldr r3, [r7, #12] 80012b4: 3302 adds r3, #2 80012b6: 88ba ldrh r2, [r7, #4] 80012b8: 4611 mov r1, r2 80012ba: 4618 mov r0, r3 80012bc: f7ff fe1b bl 8000ef6 80012c0: 4603 mov r3, r0 80012c2: 2b00 cmp r3, #0 80012c4: d001 beq.n 80012ca return EE_ERROR; 80012c6: 2301 movs r3, #1 80012c8: e00b b.n 80012e2 return EE_OK; 80012ca: 2300 movs r3, #0 80012cc: e009 b.n 80012e2 } /* No space -> page transfer */ st = EE_PageTransfer(VirtAddress, Data); 80012ce: 88ba ldrh r2, [r7, #4] 80012d0: 88fb ldrh r3, [r7, #6] 80012d2: 4611 mov r1, r2 80012d4: 4618 mov r0, r3 80012d6: f7ff fee9 bl 80010ac 80012da: 4603 mov r3, r0 80012dc: 72fb strb r3, [r7, #11] return (uint16_t)st; 80012de: 7afb ldrb r3, [r7, #11] 80012e0: b29b uxth r3, r3 } 80012e2: 4618 mov r0, r3 80012e4: 3710 adds r7, #16 80012e6: 46bd mov sp, r7 80012e8: bd80 pop {r7, pc} 80012ea: bf00 nop 80012ec: 20000000 .word 0x20000000 080012f0 : void loadEE(void){ 80012f0: b580 push {r7, lr} 80012f2: af00 add r7, sp, #0 EEW_Read(M1PWMAP, &m1pwmap); 80012f4: 4932 ldr r1, [pc, #200] @ (80013c0 ) 80012f6: 2000 movs r0, #0 80012f8: f7ff fdde bl 8000eb8 EEW_Read(M1PWMCH, &m1pwmch); 80012fc: 4931 ldr r1, [pc, #196] @ (80013c4 ) 80012fe: 2001 movs r0, #1 8001300: f7ff fdda bl 8000eb8 EEW_Read(M2PWMAP, &m2pwmap); 8001304: 4930 ldr r1, [pc, #192] @ (80013c8 ) 8001306: 2002 movs r0, #2 8001308: f7ff fdd6 bl 8000eb8 EEW_Read(M2PWMCH, &m2pwmch); 800130c: 492f ldr r1, [pc, #188] @ (80013cc ) 800130e: 2003 movs r0, #3 8001310: f7ff fdd2 bl 8000eb8 EEW_Read(M3PWMAP, &m3pwmap); 8001314: 492e ldr r1, [pc, #184] @ (80013d0 ) 8001316: 2004 movs r0, #4 8001318: f7ff fdce bl 8000eb8 EEW_Read(M3PWMCH, &m3pwmch); 800131c: 492d ldr r1, [pc, #180] @ (80013d4 ) 800131e: 2005 movs r0, #5 8001320: f7ff fdca bl 8000eb8 EEW_Read(M4PWMAP, &m4pwmap); 8001324: 492c ldr r1, [pc, #176] @ (80013d8 ) 8001326: 2006 movs r0, #6 8001328: f7ff fdc6 bl 8000eb8 EEW_Read(M4PWMCH, &m4pwmch); 800132c: 492b ldr r1, [pc, #172] @ (80013dc ) 800132e: 2007 movs r0, #7 8001330: f7ff fdc2 bl 8000eb8 EEW_Read(T1AP, &t1ap); 8001334: 492a ldr r1, [pc, #168] @ (80013e0 ) 8001336: 200c movs r0, #12 8001338: f7ff fdbe bl 8000eb8 EEW_Read(T2AP, &t2ap); 800133c: 4929 ldr r1, [pc, #164] @ (80013e4 ) 800133e: 200d movs r0, #13 8001340: f7ff fdba bl 8000eb8 EEW_Read(T3AP, &t3ap); 8001344: 4928 ldr r1, [pc, #160] @ (80013e8 ) 8001346: 200e movs r0, #14 8001348: f7ff fdb6 bl 8000eb8 EEW_Read(T4AP, &t4ap); 800134c: 4927 ldr r1, [pc, #156] @ (80013ec ) 800134e: 200f movs r0, #15 8001350: f7ff fdb2 bl 8000eb8 EEW_Read(TWAP, &twap); 8001354: 4926 ldr r1, [pc, #152] @ (80013f0 ) 8001356: 2010 movs r0, #16 8001358: f7ff fdae bl 8000eb8 EEW_Read(T1CH, &t1ch); 800135c: 4925 ldr r1, [pc, #148] @ (80013f4 ) 800135e: 2011 movs r0, #17 8001360: f7ff fdaa bl 8000eb8 EEW_Read(T2CH, &t2ch); 8001364: 4924 ldr r1, [pc, #144] @ (80013f8 ) 8001366: 2012 movs r0, #18 8001368: f7ff fda6 bl 8000eb8 EEW_Read(T3CH, &t3ch); 800136c: 4923 ldr r1, [pc, #140] @ (80013fc ) 800136e: 2013 movs r0, #19 8001370: f7ff fda2 bl 8000eb8 EEW_Read(T4CH, &t4ch); 8001374: 4922 ldr r1, [pc, #136] @ (8001400 ) 8001376: 2014 movs r0, #20 8001378: f7ff fd9e bl 8000eb8 EEW_Read(TWCH, &twch); 800137c: 4921 ldr r1, [pc, #132] @ (8001404 ) 800137e: 2015 movs r0, #21 8001380: f7ff fd9a bl 8000eb8 EEW_Read(TRAMP1, &tramp1); 8001384: 4920 ldr r1, [pc, #128] @ (8001408 ) 8001386: 2019 movs r0, #25 8001388: f7ff fd96 bl 8000eb8 EEW_Read(M1PWMMAN, &m1pwmMan); 800138c: 491f ldr r1, [pc, #124] @ (800140c ) 800138e: 201a movs r0, #26 8001390: f7ff fd92 bl 8000eb8 EEW_Read(M2PWMMAN, &m2pwmMan); 8001394: 491e ldr r1, [pc, #120] @ (8001410 ) 8001396: 201b movs r0, #27 8001398: f7ff fd8e bl 8000eb8 EEW_Read(M3PWMMAN, &m3pwmMan); 800139c: 491d ldr r1, [pc, #116] @ (8001414 ) 800139e: 201c movs r0, #28 80013a0: f7ff fd8a bl 8000eb8 EEW_Read(M4PWMMAN, &m4pwmMan); 80013a4: 491c ldr r1, [pc, #112] @ (8001418 ) 80013a6: 201d movs r0, #29 80013a8: f7ff fd86 bl 8000eb8 EEW_Read(TRAMPMAN, &trampman); 80013ac: 491b ldr r1, [pc, #108] @ (800141c ) 80013ae: 201e movs r0, #30 80013b0: f7ff fd82 bl 8000eb8 EEW_Read(TRAMP, &tramp); 80013b4: 491a ldr r1, [pc, #104] @ (8001420 ) 80013b6: 201f movs r0, #31 80013b8: f7ff fd7e bl 8000eb8 } 80013bc: bf00 nop 80013be: bd80 pop {r7, pc} 80013c0: 200003f6 .word 0x200003f6 80013c4: 200003f8 .word 0x200003f8 80013c8: 200003fa .word 0x200003fa 80013cc: 200003fc .word 0x200003fc 80013d0: 200003fe .word 0x200003fe 80013d4: 20000400 .word 0x20000400 80013d8: 20000402 .word 0x20000402 80013dc: 20000404 .word 0x20000404 80013e0: 20000406 .word 0x20000406 80013e4: 20000408 .word 0x20000408 80013e8: 2000040a .word 0x2000040a 80013ec: 2000040c .word 0x2000040c 80013f0: 2000040e .word 0x2000040e 80013f4: 20000410 .word 0x20000410 80013f8: 20000412 .word 0x20000412 80013fc: 20000414 .word 0x20000414 8001400: 20000416 .word 0x20000416 8001404: 20000418 .word 0x20000418 8001408: 2000041c .word 0x2000041c 800140c: 20000420 .word 0x20000420 8001410: 20000422 .word 0x20000422 8001414: 20000424 .word 0x20000424 8001418: 20000426 .word 0x20000426 800141c: 2000041e .word 0x2000041e 8001420: 2000041a .word 0x2000041a 08001424 : /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_SYSTICK_Callback(void){ 8001424: b580 push {r7, lr} 8001426: b082 sub sp, #8 8001428: af00 add r7, sp, #0 static uint8_t c1s = 0; static uint8_t inidx=0; static uint8_t inbuf[4]; uint8_t i; if (++c10ms >= 10) { // 10 ms 800142a: 4b7c ldr r3, [pc, #496] @ (800161c ) 800142c: 781b ldrb r3, [r3, #0] 800142e: 3301 adds r3, #1 8001430: b2da uxtb r2, r3 8001432: 4b7a ldr r3, [pc, #488] @ (800161c ) 8001434: 701a strb r2, [r3, #0] 8001436: 4b79 ldr r3, [pc, #484] @ (800161c ) 8001438: 781b ldrb r3, [r3, #0] 800143a: 2b09 cmp r3, #9 800143c: f240 81af bls.w 800179e c10ms = 0; 8001440: 4b76 ldr r3, [pc, #472] @ (800161c ) 8001442: 2200 movs r2, #0 8001444: 701a strb r2, [r3, #0] if(rtP1)rtP1--; 8001446: 4b76 ldr r3, [pc, #472] @ (8001620 ) 8001448: 781b ldrb r3, [r3, #0] 800144a: b2db uxtb r3, r3 800144c: 2b00 cmp r3, #0 800144e: d006 beq.n 800145e 8001450: 4b73 ldr r3, [pc, #460] @ (8001620 ) 8001452: 781b ldrb r3, [r3, #0] 8001454: b2db uxtb r3, r3 8001456: 3b01 subs r3, #1 8001458: b2da uxtb r2, r3 800145a: 4b71 ldr r3, [pc, #452] @ (8001620 ) 800145c: 701a strb r2, [r3, #0] if(rtP2)rtP2--; 800145e: 4b71 ldr r3, [pc, #452] @ (8001624 ) 8001460: 781b ldrb r3, [r3, #0] 8001462: b2db uxtb r3, r3 8001464: 2b00 cmp r3, #0 8001466: d006 beq.n 8001476 8001468: 4b6e ldr r3, [pc, #440] @ (8001624 ) 800146a: 781b ldrb r3, [r3, #0] 800146c: b2db uxtb r3, r3 800146e: 3b01 subs r3, #1 8001470: b2da uxtb r2, r3 8001472: 4b6c ldr r3, [pc, #432] @ (8001624 ) 8001474: 701a strb r2, [r3, #0] if(rtTLC)rtTLC--; 8001476: 4b6c ldr r3, [pc, #432] @ (8001628 ) 8001478: 781b ldrb r3, [r3, #0] 800147a: b2db uxtb r3, r3 800147c: 2b00 cmp r3, #0 800147e: d006 beq.n 800148e 8001480: 4b69 ldr r3, [pc, #420] @ (8001628 ) 8001482: 781b ldrb r3, [r3, #0] 8001484: b2db uxtb r3, r3 8001486: 3b01 subs r3, #1 8001488: b2da uxtb r2, r3 800148a: 4b67 ldr r3, [pc, #412] @ (8001628 ) 800148c: 701a strb r2, [r3, #0] //**** legge i tasti******************************************************************************** inidx++; 800148e: 4b67 ldr r3, [pc, #412] @ (800162c ) 8001490: 781b ldrb r3, [r3, #0] 8001492: 3301 adds r3, #1 8001494: b2da uxtb r2, r3 8001496: 4b65 ldr r3, [pc, #404] @ (800162c ) 8001498: 701a strb r2, [r3, #0] inidx&=0x03; 800149a: 4b64 ldr r3, [pc, #400] @ (800162c ) 800149c: 781b ldrb r3, [r3, #0] 800149e: f003 0303 and.w r3, r3, #3 80014a2: b2da uxtb r2, r3 80014a4: 4b61 ldr r3, [pc, #388] @ (800162c ) 80014a6: 701a strb r2, [r3, #0] if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1); 80014a8: f44f 4180 mov.w r1, #16384 @ 0x4000 80014ac: 4860 ldr r0, [pc, #384] @ (8001630 ) 80014ae: f004 f883 bl 80055b8 80014b2: 4603 mov r3, r0 80014b4: 2b00 cmp r3, #0 80014b6: d10c bne.n 80014d2 80014b8: 4b5c ldr r3, [pc, #368] @ (800162c ) 80014ba: 781b ldrb r3, [r3, #0] 80014bc: 461a mov r2, r3 80014be: 4b5d ldr r3, [pc, #372] @ (8001634 ) 80014c0: 5c9b ldrb r3, [r3, r2] 80014c2: 4a5a ldr r2, [pc, #360] @ (800162c ) 80014c4: 7812 ldrb r2, [r2, #0] 80014c6: f043 0301 orr.w r3, r3, #1 80014ca: b2d9 uxtb r1, r3 80014cc: 4b59 ldr r3, [pc, #356] @ (8001634 ) 80014ce: 5499 strb r1, [r3, r2] 80014d0: e00b b.n 80014ea 80014d2: 4b56 ldr r3, [pc, #344] @ (800162c ) 80014d4: 781b ldrb r3, [r3, #0] 80014d6: 461a mov r2, r3 80014d8: 4b56 ldr r3, [pc, #344] @ (8001634 ) 80014da: 5c9b ldrb r3, [r3, r2] 80014dc: 4a53 ldr r2, [pc, #332] @ (800162c ) 80014de: 7812 ldrb r2, [r2, #0] 80014e0: f023 0301 bic.w r3, r3, #1 80014e4: b2d9 uxtb r1, r3 80014e6: 4b53 ldr r3, [pc, #332] @ (8001634 ) 80014e8: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2); 80014ea: f44f 4100 mov.w r1, #32768 @ 0x8000 80014ee: 4850 ldr r0, [pc, #320] @ (8001630 ) 80014f0: f004 f862 bl 80055b8 80014f4: 4603 mov r3, r0 80014f6: 2b00 cmp r3, #0 80014f8: d10c bne.n 8001514 80014fa: 4b4c ldr r3, [pc, #304] @ (800162c ) 80014fc: 781b ldrb r3, [r3, #0] 80014fe: 461a mov r2, r3 8001500: 4b4c ldr r3, [pc, #304] @ (8001634 ) 8001502: 5c9b ldrb r3, [r3, r2] 8001504: 4a49 ldr r2, [pc, #292] @ (800162c ) 8001506: 7812 ldrb r2, [r2, #0] 8001508: f043 0302 orr.w r3, r3, #2 800150c: b2d9 uxtb r1, r3 800150e: 4b49 ldr r3, [pc, #292] @ (8001634 ) 8001510: 5499 strb r1, [r3, r2] 8001512: e00b b.n 800152c 8001514: 4b45 ldr r3, [pc, #276] @ (800162c ) 8001516: 781b ldrb r3, [r3, #0] 8001518: 461a mov r2, r3 800151a: 4b46 ldr r3, [pc, #280] @ (8001634 ) 800151c: 5c9b ldrb r3, [r3, r2] 800151e: 4a43 ldr r2, [pc, #268] @ (800162c ) 8001520: 7812 ldrb r2, [r2, #0] 8001522: f023 0302 bic.w r3, r3, #2 8001526: b2d9 uxtb r1, r3 8001528: 4b42 ldr r3, [pc, #264] @ (8001634 ) 800152a: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH1;else inbuf[inidx]&=(~INCH1); 800152c: f44f 5180 mov.w r1, #4096 @ 0x1000 8001530: 4841 ldr r0, [pc, #260] @ (8001638 ) 8001532: f004 f841 bl 80055b8 8001536: 4603 mov r3, r0 8001538: 2b00 cmp r3, #0 800153a: d10c bne.n 8001556 800153c: 4b3b ldr r3, [pc, #236] @ (800162c ) 800153e: 781b ldrb r3, [r3, #0] 8001540: 461a mov r2, r3 8001542: 4b3c ldr r3, [pc, #240] @ (8001634 ) 8001544: 5c9b ldrb r3, [r3, r2] 8001546: 4a39 ldr r2, [pc, #228] @ (800162c ) 8001548: 7812 ldrb r2, [r2, #0] 800154a: f043 0304 orr.w r3, r3, #4 800154e: b2d9 uxtb r1, r3 8001550: 4b38 ldr r3, [pc, #224] @ (8001634 ) 8001552: 5499 strb r1, [r3, r2] 8001554: e00b b.n 800156e 8001556: 4b35 ldr r3, [pc, #212] @ (800162c ) 8001558: 781b ldrb r3, [r3, #0] 800155a: 461a mov r2, r3 800155c: 4b35 ldr r3, [pc, #212] @ (8001634 ) 800155e: 5c9b ldrb r3, [r3, r2] 8001560: 4a32 ldr r2, [pc, #200] @ (800162c ) 8001562: 7812 ldrb r2, [r2, #0] 8001564: f023 0304 bic.w r3, r3, #4 8001568: b2d9 uxtb r1, r3 800156a: 4b32 ldr r3, [pc, #200] @ (8001634 ) 800156c: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH2;else inbuf[inidx]&=(~INCH2); 800156e: f44f 5100 mov.w r1, #8192 @ 0x2000 8001572: 4831 ldr r0, [pc, #196] @ (8001638 ) 8001574: f004 f820 bl 80055b8 8001578: 4603 mov r3, r0 800157a: 2b00 cmp r3, #0 800157c: d10c bne.n 8001598 800157e: 4b2b ldr r3, [pc, #172] @ (800162c ) 8001580: 781b ldrb r3, [r3, #0] 8001582: 461a mov r2, r3 8001584: 4b2b ldr r3, [pc, #172] @ (8001634 ) 8001586: 5c9b ldrb r3, [r3, r2] 8001588: 4a28 ldr r2, [pc, #160] @ (800162c ) 800158a: 7812 ldrb r2, [r2, #0] 800158c: f043 0308 orr.w r3, r3, #8 8001590: b2d9 uxtb r1, r3 8001592: 4b28 ldr r3, [pc, #160] @ (8001634 ) 8001594: 5499 strb r1, [r3, r2] 8001596: e00b b.n 80015b0 8001598: 4b24 ldr r3, [pc, #144] @ (800162c ) 800159a: 781b ldrb r3, [r3, #0] 800159c: 461a mov r2, r3 800159e: 4b25 ldr r3, [pc, #148] @ (8001634 ) 80015a0: 5c9b ldrb r3, [r3, r2] 80015a2: 4a22 ldr r2, [pc, #136] @ (800162c ) 80015a4: 7812 ldrb r2, [r2, #0] 80015a6: f023 0308 bic.w r3, r3, #8 80015aa: b2d9 uxtb r1, r3 80015ac: 4b21 ldr r3, [pc, #132] @ (8001634 ) 80015ae: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH3;else inbuf[inidx]&=(~INCH3); 80015b0: f44f 4180 mov.w r1, #16384 @ 0x4000 80015b4: 4820 ldr r0, [pc, #128] @ (8001638 ) 80015b6: f003 ffff bl 80055b8 80015ba: 4603 mov r3, r0 80015bc: 2b00 cmp r3, #0 80015be: d10c bne.n 80015da 80015c0: 4b1a ldr r3, [pc, #104] @ (800162c ) 80015c2: 781b ldrb r3, [r3, #0] 80015c4: 461a mov r2, r3 80015c6: 4b1b ldr r3, [pc, #108] @ (8001634 ) 80015c8: 5c9b ldrb r3, [r3, r2] 80015ca: 4a18 ldr r2, [pc, #96] @ (800162c ) 80015cc: 7812 ldrb r2, [r2, #0] 80015ce: f043 0310 orr.w r3, r3, #16 80015d2: b2d9 uxtb r1, r3 80015d4: 4b17 ldr r3, [pc, #92] @ (8001634 ) 80015d6: 5499 strb r1, [r3, r2] 80015d8: e00b b.n 80015f2 80015da: 4b14 ldr r3, [pc, #80] @ (800162c ) 80015dc: 781b ldrb r3, [r3, #0] 80015de: 461a mov r2, r3 80015e0: 4b14 ldr r3, [pc, #80] @ (8001634 ) 80015e2: 5c9b ldrb r3, [r3, r2] 80015e4: 4a11 ldr r2, [pc, #68] @ (800162c ) 80015e6: 7812 ldrb r2, [r2, #0] 80015e8: f023 0310 bic.w r3, r3, #16 80015ec: b2d9 uxtb r1, r3 80015ee: 4b11 ldr r3, [pc, #68] @ (8001634 ) 80015f0: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH4;else inbuf[inidx]&=(~INCH4); 80015f2: f44f 4100 mov.w r1, #32768 @ 0x8000 80015f6: 4810 ldr r0, [pc, #64] @ (8001638 ) 80015f8: f003 ffde bl 80055b8 80015fc: 4603 mov r3, r0 80015fe: 2b00 cmp r3, #0 8001600: d11c bne.n 800163c 8001602: 4b0a ldr r3, [pc, #40] @ (800162c ) 8001604: 781b ldrb r3, [r3, #0] 8001606: 461a mov r2, r3 8001608: 4b0a ldr r3, [pc, #40] @ (8001634 ) 800160a: 5c9b ldrb r3, [r3, r2] 800160c: 4a07 ldr r2, [pc, #28] @ (800162c ) 800160e: 7812 ldrb r2, [r2, #0] 8001610: f043 0320 orr.w r3, r3, #32 8001614: b2d9 uxtb r1, r3 8001616: 4b07 ldr r3, [pc, #28] @ (8001634 ) 8001618: 5499 strb r1, [r3, r2] 800161a: e01b b.n 8001654 800161c: 20000434 .word 0x20000434 8001620: 20000004 .word 0x20000004 8001624: 20000005 .word 0x20000005 8001628: 20000006 .word 0x20000006 800162c: 20000435 .word 0x20000435 8001630: 40011000 .word 0x40011000 8001634: 20000438 .word 0x20000438 8001638: 40010c00 .word 0x40010c00 800163c: 4b5a ldr r3, [pc, #360] @ (80017a8 ) 800163e: 781b ldrb r3, [r3, #0] 8001640: 461a mov r2, r3 8001642: 4b5a ldr r3, [pc, #360] @ (80017ac ) 8001644: 5c9b ldrb r3, [r3, r2] 8001646: 4a58 ldr r2, [pc, #352] @ (80017a8 ) 8001648: 7812 ldrb r2, [r2, #0] 800164a: f023 0320 bic.w r3, r3, #32 800164e: b2d9 uxtb r1, r3 8001650: 4b56 ldr r3, [pc, #344] @ (80017ac ) 8001652: 5499 strb r1, [r3, r2] pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]); 8001654: 4b55 ldr r3, [pc, #340] @ (80017ac ) 8001656: 781a ldrb r2, [r3, #0] 8001658: 4b54 ldr r3, [pc, #336] @ (80017ac ) 800165a: 785b ldrb r3, [r3, #1] 800165c: 4013 ands r3, r2 800165e: b2da uxtb r2, r3 8001660: 4b52 ldr r3, [pc, #328] @ (80017ac ) 8001662: 789b ldrb r3, [r3, #2] 8001664: 4013 ands r3, r2 8001666: b2da uxtb r2, r3 8001668: 4b50 ldr r3, [pc, #320] @ (80017ac ) 800166a: 78db ldrb r3, [r3, #3] 800166c: 4013 ands r3, r2 800166e: b2da uxtb r2, r3 8001670: 4b4f ldr r3, [pc, #316] @ (80017b0 ) 8001672: 781b ldrb r3, [r3, #0] 8001674: 4313 orrs r3, r2 8001676: b2da uxtb r2, r3 8001678: 4b4d ldr r3, [pc, #308] @ (80017b0 ) 800167a: 701a strb r2, [r3, #0] pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]); 800167c: 4b4b ldr r3, [pc, #300] @ (80017ac ) 800167e: 781a ldrb r2, [r3, #0] 8001680: 4b4a ldr r3, [pc, #296] @ (80017ac ) 8001682: 785b ldrb r3, [r3, #1] 8001684: 4313 orrs r3, r2 8001686: b2da uxtb r2, r3 8001688: 4b48 ldr r3, [pc, #288] @ (80017ac ) 800168a: 789b ldrb r3, [r3, #2] 800168c: 4313 orrs r3, r2 800168e: b2da uxtb r2, r3 8001690: 4b46 ldr r3, [pc, #280] @ (80017ac ) 8001692: 78db ldrb r3, [r3, #3] 8001694: 4313 orrs r3, r2 8001696: b2da uxtb r2, r3 8001698: 4b45 ldr r3, [pc, #276] @ (80017b0 ) 800169a: 781b ldrb r3, [r3, #0] 800169c: 4013 ands r3, r2 800169e: b2da uxtb r2, r3 80016a0: 4b43 ldr r3, [pc, #268] @ (80017b0 ) 80016a2: 701a strb r2, [r3, #0] //**** legge adc *********************************************************************************** readAdc(); 80016a4: f7fe fd90 bl 80001c8 if (++c100ms >= 10) { // 10 ms 80016a8: 4b42 ldr r3, [pc, #264] @ (80017b4 ) 80016aa: 781b ldrb r3, [r3, #0] 80016ac: 3301 adds r3, #1 80016ae: b2da uxtb r2, r3 80016b0: 4b40 ldr r3, [pc, #256] @ (80017b4 ) 80016b2: 701a strb r2, [r3, #0] 80016b4: 4b3f ldr r3, [pc, #252] @ (80017b4 ) 80016b6: 781b ldrb r3, [r3, #0] 80016b8: 2b09 cmp r3, #9 80016ba: d970 bls.n 800179e c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop 80016bc: 4b3d ldr r3, [pc, #244] @ (80017b4 ) 80016be: 2200 movs r2, #0 80016c0: 701a strb r2, [r3, #0] for(i=0;i<4;i++){ 80016c2: 2300 movs r3, #0 80016c4: 71fb strb r3, [r7, #7] 80016c6: e013 b.n 80016f0 if(rtramp[i])rtramp[i]--; 80016c8: 79fb ldrb r3, [r7, #7] 80016ca: 4a3b ldr r2, [pc, #236] @ (80017b8 ) 80016cc: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 80016d0: b29b uxth r3, r3 80016d2: 2b00 cmp r3, #0 80016d4: d009 beq.n 80016ea 80016d6: 79fb ldrb r3, [r7, #7] 80016d8: 4a37 ldr r2, [pc, #220] @ (80017b8 ) 80016da: f832 2013 ldrh.w r2, [r2, r3, lsl #1] 80016de: b292 uxth r2, r2 80016e0: 3a01 subs r2, #1 80016e2: b291 uxth r1, r2 80016e4: 4a34 ldr r2, [pc, #208] @ (80017b8 ) 80016e6: f822 1013 strh.w r1, [r2, r3, lsl #1] for(i=0;i<4;i++){ 80016ea: 79fb ldrb r3, [r7, #7] 80016ec: 3301 adds r3, #1 80016ee: 71fb strb r3, [r7, #7] 80016f0: 79fb ldrb r3, [r7, #7] 80016f2: 2b03 cmp r3, #3 80016f4: d9e8 bls.n 80016c8 } //**** gestione buzzer ***************************************************************************** if(stBuz==bzmoving){ 80016f6: 4b31 ldr r3, [pc, #196] @ (80017bc ) 80016f8: 781b ldrb r3, [r3, #0] 80016fa: b2db uxtb r3, r3 80016fc: 2b01 cmp r3, #1 80016fe: d111 bne.n 8001724 if(c1s>=5)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET); 8001700: 4b2f ldr r3, [pc, #188] @ (80017c0 ) 8001702: 781b ldrb r3, [r3, #0] 8001704: 2b04 cmp r3, #4 8001706: d906 bls.n 8001716 8001708: 2200 movs r2, #0 800170a: f44f 7180 mov.w r1, #256 @ 0x100 800170e: 482d ldr r0, [pc, #180] @ (80017c4 ) 8001710: f003 ff69 bl 80055e6 8001714: e025 b.n 8001762 8001716: 2201 movs r2, #1 8001718: f44f 7180 mov.w r1, #256 @ 0x100 800171c: 4829 ldr r0, [pc, #164] @ (80017c4 ) 800171e: f003 ff62 bl 80055e6 8001722: e01e b.n 8001762 }else if(stBuz==bzwarning){ 8001724: 4b25 ldr r3, [pc, #148] @ (80017bc ) 8001726: 781b ldrb r3, [r3, #0] 8001728: b2db uxtb r3, r3 800172a: 2b02 cmp r3, #2 800172c: d113 bne.n 8001756 if(c1s&2)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET); 800172e: 4b24 ldr r3, [pc, #144] @ (80017c0 ) 8001730: 781b ldrb r3, [r3, #0] 8001732: f003 0302 and.w r3, r3, #2 8001736: 2b00 cmp r3, #0 8001738: d006 beq.n 8001748 800173a: 2200 movs r2, #0 800173c: f44f 7180 mov.w r1, #256 @ 0x100 8001740: 4820 ldr r0, [pc, #128] @ (80017c4 ) 8001742: f003 ff50 bl 80055e6 8001746: e00c b.n 8001762 8001748: 2201 movs r2, #1 800174a: f44f 7180 mov.w r1, #256 @ 0x100 800174e: 481d ldr r0, [pc, #116] @ (80017c4 ) 8001750: f003 ff49 bl 80055e6 8001754: e005 b.n 8001762 }else{//bzoff HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET); 8001756: 2200 movs r2, #0 8001758: f44f 7180 mov.w r1, #256 @ 0x100 800175c: 4819 ldr r0, [pc, #100] @ (80017c4 ) 800175e: f003 ff42 bl 80055e6 } //************************************************************************************************** if (++c1s >= 10) { // 10 ms 8001762: 4b17 ldr r3, [pc, #92] @ (80017c0 ) 8001764: 781b ldrb r3, [r3, #0] 8001766: 3301 adds r3, #1 8001768: b2da uxtb r2, r3 800176a: 4b15 ldr r3, [pc, #84] @ (80017c0 ) 800176c: 701a strb r2, [r3, #0] 800176e: 4b14 ldr r3, [pc, #80] @ (80017c0 ) 8001770: 781b ldrb r3, [r3, #0] 8001772: 2b09 cmp r3, #9 8001774: d913 bls.n 800179e c1s = 0; 8001776: 4b12 ldr r3, [pc, #72] @ (80017c0 ) 8001778: 2200 movs r2, #0 800177a: 701a strb r2, [r3, #0] if(rtCiclo)rtCiclo--; 800177c: 4b12 ldr r3, [pc, #72] @ (80017c8 ) 800177e: 881b ldrh r3, [r3, #0] 8001780: b29b uxth r3, r3 8001782: 2b00 cmp r3, #0 8001784: d006 beq.n 8001794 8001786: 4b10 ldr r3, [pc, #64] @ (80017c8 ) 8001788: 881b ldrh r3, [r3, #0] 800178a: b29b uxth r3, r3 800178c: 3b01 subs r3, #1 800178e: b29a uxth r2, r3 8001790: 4b0d ldr r3, [pc, #52] @ (80017c8 ) 8001792: 801a strh r2, [r3, #0] HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin); 8001794: f44f 5100 mov.w r1, #8192 @ 0x2000 8001798: 480c ldr r0, [pc, #48] @ (80017cc ) 800179a: f003 ff3c bl 8005616 } } } } 800179e: bf00 nop 80017a0: 3708 adds r7, #8 80017a2: 46bd mov sp, r7 80017a4: bd80 pop {r7, pc} 80017a6: bf00 nop 80017a8: 20000435 .word 0x20000435 80017ac: 20000438 .word 0x20000438 80017b0: 200003e8 .word 0x200003e8 80017b4: 2000043c .word 0x2000043c 80017b8: 200003ec .word 0x200003ec 80017bc: 20000433 .word 0x20000433 80017c0: 2000043d .word 0x2000043d 80017c4: 40010800 .word 0x40010800 80017c8: 200003f4 .word 0x200003f4 80017cc: 40011000 .word 0x40011000 080017d0 : void managePulsanti(void){ 80017d0: b480 push {r7} 80017d2: af00 add r7, sp, #0 if(pulsanti&INP1){ 80017d4: 4ba1 ldr r3, [pc, #644] @ (8001a5c ) 80017d6: 781b ldrb r3, [r3, #0] 80017d8: f003 0301 and.w r3, r3, #1 80017dc: 2b00 cmp r3, #0 80017de: d00c beq.n 80017fa if(rtP1==0)stPulsanti|=P1START; 80017e0: 4b9f ldr r3, [pc, #636] @ (8001a60 ) 80017e2: 781b ldrb r3, [r3, #0] 80017e4: b2db uxtb r3, r3 80017e6: 2b00 cmp r3, #0 80017e8: d124 bne.n 8001834 80017ea: 4b9e ldr r3, [pc, #632] @ (8001a64 ) 80017ec: 881b ldrh r3, [r3, #0] 80017ee: f043 0301 orr.w r3, r3, #1 80017f2: b29a uxth r2, r3 80017f4: 4b9b ldr r3, [pc, #620] @ (8001a64 ) 80017f6: 801a strh r2, [r3, #0] 80017f8: e01c b.n 8001834 }else{ if(stPulsanti&P1START)stPulsanti&=(~P1START); 80017fa: 4b9a ldr r3, [pc, #616] @ (8001a64 ) 80017fc: 881b ldrh r3, [r3, #0] 80017fe: f003 0301 and.w r3, r3, #1 8001802: 2b00 cmp r3, #0 8001804: d007 beq.n 8001816 8001806: 4b97 ldr r3, [pc, #604] @ (8001a64 ) 8001808: 881b ldrh r3, [r3, #0] 800180a: f023 0301 bic.w r3, r3, #1 800180e: b29a uxth r2, r3 8001810: 4b94 ldr r3, [pc, #592] @ (8001a64 ) 8001812: 801a strh r2, [r3, #0] 8001814: e00b b.n 800182e else if(rtP1<=190){ 8001816: 4b92 ldr r3, [pc, #584] @ (8001a60 ) 8001818: 781b ldrb r3, [r3, #0] 800181a: b2db uxtb r3, r3 800181c: 2bbe cmp r3, #190 @ 0xbe 800181e: d806 bhi.n 800182e stPulsanti|=P1STOP; 8001820: 4b90 ldr r3, [pc, #576] @ (8001a64 ) 8001822: 881b ldrh r3, [r3, #0] 8001824: f043 0302 orr.w r3, r3, #2 8001828: b29a uxth r2, r3 800182a: 4b8e ldr r3, [pc, #568] @ (8001a64 ) 800182c: 801a strh r2, [r3, #0] } rtP1=200; 800182e: 4b8c ldr r3, [pc, #560] @ (8001a60 ) 8001830: 22c8 movs r2, #200 @ 0xc8 8001832: 701a strb r2, [r3, #0] } if(pulsanti&INP2){ 8001834: 4b89 ldr r3, [pc, #548] @ (8001a5c ) 8001836: 781b ldrb r3, [r3, #0] 8001838: f003 0302 and.w r3, r3, #2 800183c: 2b00 cmp r3, #0 800183e: d00c beq.n 800185a if(rtP2==0)stPulsanti|=P2START; 8001840: 4b89 ldr r3, [pc, #548] @ (8001a68 ) 8001842: 781b ldrb r3, [r3, #0] 8001844: b2db uxtb r3, r3 8001846: 2b00 cmp r3, #0 8001848: d124 bne.n 8001894 800184a: 4b86 ldr r3, [pc, #536] @ (8001a64 ) 800184c: 881b ldrh r3, [r3, #0] 800184e: f043 0304 orr.w r3, r3, #4 8001852: b29a uxth r2, r3 8001854: 4b83 ldr r3, [pc, #524] @ (8001a64 ) 8001856: 801a strh r2, [r3, #0] 8001858: e01c b.n 8001894 }else{ if(stPulsanti&P2START)stPulsanti&=(~P2START); 800185a: 4b82 ldr r3, [pc, #520] @ (8001a64 ) 800185c: 881b ldrh r3, [r3, #0] 800185e: f003 0304 and.w r3, r3, #4 8001862: 2b00 cmp r3, #0 8001864: d007 beq.n 8001876 8001866: 4b7f ldr r3, [pc, #508] @ (8001a64 ) 8001868: 881b ldrh r3, [r3, #0] 800186a: f023 0304 bic.w r3, r3, #4 800186e: b29a uxth r2, r3 8001870: 4b7c ldr r3, [pc, #496] @ (8001a64 ) 8001872: 801a strh r2, [r3, #0] 8001874: e00b b.n 800188e else if(rtP2<=190)stPulsanti|=P2STOP; 8001876: 4b7c ldr r3, [pc, #496] @ (8001a68 ) 8001878: 781b ldrb r3, [r3, #0] 800187a: b2db uxtb r3, r3 800187c: 2bbe cmp r3, #190 @ 0xbe 800187e: d806 bhi.n 800188e 8001880: 4b78 ldr r3, [pc, #480] @ (8001a64 ) 8001882: 881b ldrh r3, [r3, #0] 8001884: f043 0308 orr.w r3, r3, #8 8001888: b29a uxth r2, r3 800188a: 4b76 ldr r3, [pc, #472] @ (8001a64 ) 800188c: 801a strh r2, [r3, #0] rtP2=200; 800188e: 4b76 ldr r3, [pc, #472] @ (8001a68 ) 8001890: 22c8 movs r2, #200 @ 0xc8 8001892: 701a strb r2, [r3, #0] } stPulsanti&=(P1START|P1STOP|P2START|P2STOP); 8001894: 4b73 ldr r3, [pc, #460] @ (8001a64 ) 8001896: 881b ldrh r3, [r3, #0] 8001898: f003 030f and.w r3, r3, #15 800189c: b29a uxth r2, r3 800189e: 4b71 ldr r3, [pc, #452] @ (8001a64 ) 80018a0: 801a strh r2, [r3, #0] if(stPulsanti==0){ 80018a2: 4b70 ldr r3, [pc, #448] @ (8001a64 ) 80018a4: 881b ldrh r3, [r3, #0] 80018a6: 2b00 cmp r3, #0 80018a8: f040 80d3 bne.w 8001a52 switch(pulsanti&0x3c){ 80018ac: 4b6b ldr r3, [pc, #428] @ (8001a5c ) 80018ae: 781b ldrb r3, [r3, #0] 80018b0: f003 033c and.w r3, r3, #60 @ 0x3c 80018b4: 2b30 cmp r3, #48 @ 0x30 80018b6: f200 80ba bhi.w 8001a2e 80018ba: a201 add r2, pc, #4 @ (adr r2, 80018c0 ) 80018bc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80018c0: 08001985 .word 0x08001985 80018c4: 08001a2f .word 0x08001a2f 80018c8: 08001a2f .word 0x08001a2f 80018cc: 08001a2f .word 0x08001a2f 80018d0: 080019e1 .word 0x080019e1 80018d4: 08001a2f .word 0x08001a2f 80018d8: 08001a2f .word 0x08001a2f 80018dc: 08001a2f .word 0x08001a2f 80018e0: 08001993 .word 0x08001993 80018e4: 08001a2f .word 0x08001a2f 80018e8: 08001a2f .word 0x08001a2f 80018ec: 08001a2f .word 0x08001a2f 80018f0: 08001a15 .word 0x08001a15 80018f4: 08001a2f .word 0x08001a2f 80018f8: 08001a2f .word 0x08001a2f 80018fc: 08001a2f .word 0x08001a2f 8001900: 080019ad .word 0x080019ad 8001904: 08001a2f .word 0x08001a2f 8001908: 08001a2f .word 0x08001a2f 800190c: 08001a2f .word 0x08001a2f 8001910: 08001a2f .word 0x08001a2f 8001914: 08001a2f .word 0x08001a2f 8001918: 08001a2f .word 0x08001a2f 800191c: 08001a2f .word 0x08001a2f 8001920: 08001a2f .word 0x08001a2f 8001924: 08001a2f .word 0x08001a2f 8001928: 08001a2f .word 0x08001a2f 800192c: 08001a2f .word 0x08001a2f 8001930: 08001a2f .word 0x08001a2f 8001934: 08001a2f .word 0x08001a2f 8001938: 08001a2f .word 0x08001a2f 800193c: 08001a2f .word 0x08001a2f 8001940: 080019c7 .word 0x080019c7 8001944: 08001a2f .word 0x08001a2f 8001948: 08001a2f .word 0x08001a2f 800194c: 08001a2f .word 0x08001a2f 8001950: 08001a2f .word 0x08001a2f 8001954: 08001a2f .word 0x08001a2f 8001958: 08001a2f .word 0x08001a2f 800195c: 08001a2f .word 0x08001a2f 8001960: 08001a2f .word 0x08001a2f 8001964: 08001a2f .word 0x08001a2f 8001968: 08001a2f .word 0x08001a2f 800196c: 08001a2f .word 0x08001a2f 8001970: 08001a2f .word 0x08001a2f 8001974: 08001a2f .word 0x08001a2f 8001978: 08001a2f .word 0x08001a2f 800197c: 08001a2f .word 0x08001a2f 8001980: 080019fb .word 0x080019fb case 0x00: rtTLC=100; 8001984: 4b39 ldr r3, [pc, #228] @ (8001a6c ) 8001986: 2264 movs r2, #100 @ 0x64 8001988: 701a strb r2, [r3, #0] stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW)); 800198a: 4b36 ldr r3, [pc, #216] @ (8001a64 ) 800198c: 2200 movs r2, #0 800198e: 801a strh r2, [r3, #0] break; 8001990: e05f b.n 8001a52 case 0x08://tlc1 if(rtTLC==0)stPulsanti|=M1FW; 8001992: 4b36 ldr r3, [pc, #216] @ (8001a6c ) 8001994: 781b ldrb r3, [r3, #0] 8001996: b2db uxtb r3, r3 8001998: 2b00 cmp r3, #0 800199a: d14f bne.n 8001a3c 800199c: 4b31 ldr r3, [pc, #196] @ (8001a64 ) 800199e: 881b ldrh r3, [r3, #0] 80019a0: f043 0310 orr.w r3, r3, #16 80019a4: b29a uxth r2, r3 80019a6: 4b2f ldr r3, [pc, #188] @ (8001a64 ) 80019a8: 801a strh r2, [r3, #0] break; 80019aa: e047 b.n 8001a3c case 0x10://tlc2 if(rtTLC==0)stPulsanti|=M1BW; 80019ac: 4b2f ldr r3, [pc, #188] @ (8001a6c ) 80019ae: 781b ldrb r3, [r3, #0] 80019b0: b2db uxtb r3, r3 80019b2: 2b00 cmp r3, #0 80019b4: d144 bne.n 8001a40 80019b6: 4b2b ldr r3, [pc, #172] @ (8001a64 ) 80019b8: 881b ldrh r3, [r3, #0] 80019ba: f043 0320 orr.w r3, r3, #32 80019be: b29a uxth r2, r3 80019c0: 4b28 ldr r3, [pc, #160] @ (8001a64 ) 80019c2: 801a strh r2, [r3, #0] break; 80019c4: e03c b.n 8001a40 case 0x20://tlc3 if(rtTLC==0)stPulsanti|=M3FW; 80019c6: 4b29 ldr r3, [pc, #164] @ (8001a6c ) 80019c8: 781b ldrb r3, [r3, #0] 80019ca: b2db uxtb r3, r3 80019cc: 2b00 cmp r3, #0 80019ce: d139 bne.n 8001a44 80019d0: 4b24 ldr r3, [pc, #144] @ (8001a64 ) 80019d2: 881b ldrh r3, [r3, #0] 80019d4: f443 7380 orr.w r3, r3, #256 @ 0x100 80019d8: b29a uxth r2, r3 80019da: 4b22 ldr r3, [pc, #136] @ (8001a64 ) 80019dc: 801a strh r2, [r3, #0] break; 80019de: e031 b.n 8001a44 case 0x04://tlc4 if(rtTLC==0)stPulsanti|=M3BW; 80019e0: 4b22 ldr r3, [pc, #136] @ (8001a6c ) 80019e2: 781b ldrb r3, [r3, #0] 80019e4: b2db uxtb r3, r3 80019e6: 2b00 cmp r3, #0 80019e8: d12e bne.n 8001a48 80019ea: 4b1e ldr r3, [pc, #120] @ (8001a64 ) 80019ec: 881b ldrh r3, [r3, #0] 80019ee: f443 7300 orr.w r3, r3, #512 @ 0x200 80019f2: b29a uxth r2, r3 80019f4: 4b1b ldr r3, [pc, #108] @ (8001a64 ) 80019f6: 801a strh r2, [r3, #0] break; 80019f8: e026 b.n 8001a48 case 0x30://tlc5 if(rtTLC==0)stPulsanti|=M4FW; 80019fa: 4b1c ldr r3, [pc, #112] @ (8001a6c ) 80019fc: 781b ldrb r3, [r3, #0] 80019fe: b2db uxtb r3, r3 8001a00: 2b00 cmp r3, #0 8001a02: d123 bne.n 8001a4c 8001a04: 4b17 ldr r3, [pc, #92] @ (8001a64 ) 8001a06: 881b ldrh r3, [r3, #0] 8001a08: f443 6380 orr.w r3, r3, #1024 @ 0x400 8001a0c: b29a uxth r2, r3 8001a0e: 4b15 ldr r3, [pc, #84] @ (8001a64 ) 8001a10: 801a strh r2, [r3, #0] break; 8001a12: e01b b.n 8001a4c case 0x0c://tlc6 if(rtTLC==0)stPulsanti|=M4BW; 8001a14: 4b15 ldr r3, [pc, #84] @ (8001a6c ) 8001a16: 781b ldrb r3, [r3, #0] 8001a18: b2db uxtb r3, r3 8001a1a: 2b00 cmp r3, #0 8001a1c: d118 bne.n 8001a50 8001a1e: 4b11 ldr r3, [pc, #68] @ (8001a64 ) 8001a20: 881b ldrh r3, [r3, #0] 8001a22: f443 6300 orr.w r3, r3, #2048 @ 0x800 8001a26: b29a uxth r2, r3 8001a28: 4b0e ldr r3, [pc, #56] @ (8001a64 ) 8001a2a: 801a strh r2, [r3, #0] break; 8001a2c: e010 b.n 8001a50 default: rtTLC=100; 8001a2e: 4b0f ldr r3, [pc, #60] @ (8001a6c ) 8001a30: 2264 movs r2, #100 @ 0x64 8001a32: 701a strb r2, [r3, #0] stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW)); 8001a34: 4b0b ldr r3, [pc, #44] @ (8001a64 ) 8001a36: 2200 movs r2, #0 8001a38: 801a strh r2, [r3, #0] break; 8001a3a: e00a b.n 8001a52 break; 8001a3c: bf00 nop 8001a3e: e008 b.n 8001a52 break; 8001a40: bf00 nop 8001a42: e006 b.n 8001a52 break; 8001a44: bf00 nop 8001a46: e004 b.n 8001a52 break; 8001a48: bf00 nop 8001a4a: e002 b.n 8001a52 break; 8001a4c: bf00 nop 8001a4e: e000 b.n 8001a52 break; 8001a50: bf00 nop } } } 8001a52: bf00 nop 8001a54: 46bd mov sp, r7 8001a56: bc80 pop {r7} 8001a58: 4770 bx lr 8001a5a: bf00 nop 8001a5c: 200003e8 .word 0x200003e8 8001a60: 20000004 .word 0x20000004 8001a64: 20000430 .word 0x20000430 8001a68: 20000005 .word 0x20000005 8001a6c: 20000006 .word 0x20000006 08001a70 : void manageCiclo(void){ 8001a70: b580 push {r7, lr} 8001a72: b082 sub sp, #8 8001a74: af02 add r7, sp, #8 switch(stCiclo){ 8001a76: 4bb1 ldr r3, [pc, #708] @ (8001d3c ) 8001a78: 781b ldrb r3, [r3, #0] 8001a7a: 2b31 cmp r3, #49 @ 0x31 8001a7c: f201 8114 bhi.w 8002ca8 8001a80: a201 add r2, pc, #4 @ (adr r2, 8001a88 ) 8001a82: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001a86: bf00 nop 8001a88: 08001b51 .word 0x08001b51 8001a8c: 08001b8b .word 0x08001b8b 8001a90: 08001bc1 .word 0x08001bc1 8001a94: 08001bf7 .word 0x08001bf7 8001a98: 08001c2d .word 0x08001c2d 8001a9c: 08001c63 .word 0x08001c63 8001aa0: 08001c99 .word 0x08001c99 8001aa4: 08001ccf .word 0x08001ccf 8001aa8: 08001d05 .word 0x08001d05 8001aac: 08001d61 .word 0x08001d61 8001ab0: 08001d97 .word 0x08001d97 8001ab4: 08001dcd .word 0x08001dcd 8001ab8: 08001e03 .word 0x08001e03 8001abc: 08001e39 .word 0x08001e39 8001ac0: 08001e6f .word 0x08001e6f 8001ac4: 08001ea5 .word 0x08001ea5 8001ac8: 08001edb .word 0x08001edb 8001acc: 08001f11 .word 0x08001f11 8001ad0: 08001f7b .word 0x08001f7b 8001ad4: 08001fb9 .word 0x08001fb9 8001ad8: 08002039 .word 0x08002039 8001adc: 0800207d .word 0x0800207d 8001ae0: 080020c5 .word 0x080020c5 8001ae4: 0800210f .word 0x0800210f 8001ae8: 0800215d .word 0x0800215d 8001aec: 080021a7 .word 0x080021a7 8001af0: 080021f5 .word 0x080021f5 8001af4: 08002255 .word 0x08002255 8001af8: 080022ed .word 0x080022ed 8001afc: 08002337 .word 0x08002337 8001b00: 08002385 .word 0x08002385 8001b04: 080023c9 .word 0x080023c9 8001b08: 08002411 .word 0x08002411 8001b0c: 08002447 .word 0x08002447 8001b10: 08002495 .word 0x08002495 8001b14: 080026fb .word 0x080026fb 8001b18: 08002747 .word 0x08002747 8001b1c: 0800278f .word 0x0800278f 8001b20: 08002811 .word 0x08002811 8001b24: 0800286f .word 0x0800286f 8001b28: 080028d7 .word 0x080028d7 8001b2c: 08002941 .word 0x08002941 8001b30: 080029b5 .word 0x080029b5 8001b34: 080029f7 .word 0x080029f7 8001b38: 08002a3d .word 0x08002a3d 8001b3c: 08002ab1 .word 0x08002ab1 8001b40: 08002af7 .word 0x08002af7 8001b44: 08002b1d .word 0x08002b1d 8001b48: 08002b63 .word 0x08002b63 8001b4c: 08002b97 .word 0x08002b97 case omchiuso: if(stPulsanti&P1START){ 8001b50: 4b7b ldr r3, [pc, #492] @ (8001d40 ) 8001b52: 881b ldrh r3, [r3, #0] 8001b54: f003 0301 and.w r3, r3, #1 8001b58: 2b00 cmp r3, #0 8001b5a: d00a beq.n 8001b72 stBuz=bzwarning; 8001b5c: 4b79 ldr r3, [pc, #484] @ (8001d44 ) 8001b5e: 2202 movs r2, #2 8001b60: 701a strb r2, [r3, #0] rtCiclo=3; 8001b62: 4b79 ldr r3, [pc, #484] @ (8001d48 ) 8001b64: 2203 movs r2, #3 8001b66: 801a strh r2, [r3, #0] stCiclo=omapertura0; 8001b68: 4b74 ldr r3, [pc, #464] @ (8001d3c ) 8001b6a: 2212 movs r2, #18 8001b6c: 701a strb r2, [r3, #0] // }else if(stPulsanti&M4BW){ // stBuz=bzmoving; // (void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); // stCiclo=omM4bw1; // } break; 8001b6e: f001 b838 b.w 8002be2 }else if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8001b72: 4b73 ldr r3, [pc, #460] @ (8001d40 ) 8001b74: 881b ldrh r3, [r3, #0] 8001b76: f003 0302 and.w r3, r3, #2 8001b7a: 2b00 cmp r3, #0 8001b7c: f001 8031 beq.w 8002be2 8001b80: 4b6e ldr r3, [pc, #440] @ (8001d3c ) 8001b82: 2221 movs r2, #33 @ 0x21 8001b84: 701a strb r2, [r3, #0] break; 8001b86: f001 b82c b.w 8002be2 case omM1fw1: (void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN); 8001b8a: 4b70 ldr r3, [pc, #448] @ (8001d4c ) 8001b8c: 881b ldrh r3, [r3, #0] 8001b8e: b2da uxtb r2, r3 8001b90: 4b6f ldr r3, [pc, #444] @ (8001d50 ) 8001b92: 881b ldrh r3, [r3, #0] 8001b94: b2d9 uxtb r1, r3 8001b96: 4b6f ldr r3, [pc, #444] @ (8001d54 ) 8001b98: 881b ldrh r3, [r3, #0] 8001b9a: b2db uxtb r3, r3 8001b9c: 200a movs r0, #10 8001b9e: 9001 str r0, [sp, #4] 8001ba0: 9300 str r3, [sp, #0] 8001ba2: 460b mov r3, r1 8001ba4: 2100 movs r1, #0 8001ba6: 2001 movs r0, #1 8001ba8: f001 ff64 bl 8003a74 if(pulsanti==0)stCiclo=omM1fw2; 8001bac: 4b6a ldr r3, [pc, #424] @ (8001d58 ) 8001bae: 781b ldrb r3, [r3, #0] 8001bb0: 2b00 cmp r3, #0 8001bb2: f041 8018 bne.w 8002be6 8001bb6: 4b61 ldr r3, [pc, #388] @ (8001d3c ) 8001bb8: 2202 movs r2, #2 8001bba: 701a strb r2, [r3, #0] break; 8001bbc: f001 b813 b.w 8002be6 case omM1fw2: (void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN); 8001bc0: 4b62 ldr r3, [pc, #392] @ (8001d4c ) 8001bc2: 881b ldrh r3, [r3, #0] 8001bc4: b2da uxtb r2, r3 8001bc6: 4b62 ldr r3, [pc, #392] @ (8001d50 ) 8001bc8: 881b ldrh r3, [r3, #0] 8001bca: b2d9 uxtb r1, r3 8001bcc: 4b61 ldr r3, [pc, #388] @ (8001d54 ) 8001bce: 881b ldrh r3, [r3, #0] 8001bd0: b2db uxtb r3, r3 8001bd2: 200a movs r0, #10 8001bd4: 9001 str r0, [sp, #4] 8001bd6: 9300 str r3, [sp, #0] 8001bd8: 460b mov r3, r1 8001bda: 2100 movs r1, #0 8001bdc: 2001 movs r0, #1 8001bde: f001 ff49 bl 8003a74 if(pulsanti)stCiclo=omStopMan; 8001be2: 4b5d ldr r3, [pc, #372] @ (8001d58 ) 8001be4: 781b ldrb r3, [r3, #0] 8001be6: 2b00 cmp r3, #0 8001be8: f000 87ff beq.w 8002bea 8001bec: 4b53 ldr r3, [pc, #332] @ (8001d3c ) 8001bee: 2211 movs r2, #17 8001bf0: 701a strb r2, [r3, #0] break; 8001bf2: f000 bffa b.w 8002bea case omM1bw1: (void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN); 8001bf6: 4b55 ldr r3, [pc, #340] @ (8001d4c ) 8001bf8: 881b ldrh r3, [r3, #0] 8001bfa: b2da uxtb r2, r3 8001bfc: 4b54 ldr r3, [pc, #336] @ (8001d50 ) 8001bfe: 881b ldrh r3, [r3, #0] 8001c00: b2d9 uxtb r1, r3 8001c02: 4b54 ldr r3, [pc, #336] @ (8001d54 ) 8001c04: 881b ldrh r3, [r3, #0] 8001c06: b2db uxtb r3, r3 8001c08: 200a movs r0, #10 8001c0a: 9001 str r0, [sp, #4] 8001c0c: 9300 str r3, [sp, #0] 8001c0e: 460b mov r3, r1 8001c10: 2101 movs r1, #1 8001c12: 2001 movs r0, #1 8001c14: f001 ff2e bl 8003a74 if(pulsanti==0)stCiclo=omM1bw2; 8001c18: 4b4f ldr r3, [pc, #316] @ (8001d58 ) 8001c1a: 781b ldrb r3, [r3, #0] 8001c1c: 2b00 cmp r3, #0 8001c1e: f040 87e6 bne.w 8002bee 8001c22: 4b46 ldr r3, [pc, #280] @ (8001d3c ) 8001c24: 2204 movs r2, #4 8001c26: 701a strb r2, [r3, #0] break; 8001c28: f000 bfe1 b.w 8002bee case omM1bw2: (void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN); 8001c2c: 4b47 ldr r3, [pc, #284] @ (8001d4c ) 8001c2e: 881b ldrh r3, [r3, #0] 8001c30: b2da uxtb r2, r3 8001c32: 4b47 ldr r3, [pc, #284] @ (8001d50 ) 8001c34: 881b ldrh r3, [r3, #0] 8001c36: b2d9 uxtb r1, r3 8001c38: 4b46 ldr r3, [pc, #280] @ (8001d54 ) 8001c3a: 881b ldrh r3, [r3, #0] 8001c3c: b2db uxtb r3, r3 8001c3e: 200a movs r0, #10 8001c40: 9001 str r0, [sp, #4] 8001c42: 9300 str r3, [sp, #0] 8001c44: 460b mov r3, r1 8001c46: 2101 movs r1, #1 8001c48: 2001 movs r0, #1 8001c4a: f001 ff13 bl 8003a74 if(pulsanti)stCiclo=omStopMan; 8001c4e: 4b42 ldr r3, [pc, #264] @ (8001d58 ) 8001c50: 781b ldrb r3, [r3, #0] 8001c52: 2b00 cmp r3, #0 8001c54: f000 87cd beq.w 8002bf2 8001c58: 4b38 ldr r3, [pc, #224] @ (8001d3c ) 8001c5a: 2211 movs r2, #17 8001c5c: 701a strb r2, [r3, #0] break; 8001c5e: f000 bfc8 b.w 8002bf2 case omM2fw1: (void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN); 8001c62: 4b3a ldr r3, [pc, #232] @ (8001d4c ) 8001c64: 885b ldrh r3, [r3, #2] 8001c66: b2da uxtb r2, r3 8001c68: 4b3c ldr r3, [pc, #240] @ (8001d5c ) 8001c6a: 881b ldrh r3, [r3, #0] 8001c6c: b2d9 uxtb r1, r3 8001c6e: 4b39 ldr r3, [pc, #228] @ (8001d54 ) 8001c70: 881b ldrh r3, [r3, #0] 8001c72: b2db uxtb r3, r3 8001c74: 200a movs r0, #10 8001c76: 9001 str r0, [sp, #4] 8001c78: 9300 str r3, [sp, #0] 8001c7a: 460b mov r3, r1 8001c7c: 2100 movs r1, #0 8001c7e: 2002 movs r0, #2 8001c80: f001 fef8 bl 8003a74 if(pulsanti==0)stCiclo=omM2fw2; 8001c84: 4b34 ldr r3, [pc, #208] @ (8001d58 ) 8001c86: 781b ldrb r3, [r3, #0] 8001c88: 2b00 cmp r3, #0 8001c8a: f040 87b4 bne.w 8002bf6 8001c8e: 4b2b ldr r3, [pc, #172] @ (8001d3c ) 8001c90: 2206 movs r2, #6 8001c92: 701a strb r2, [r3, #0] break; 8001c94: f000 bfaf b.w 8002bf6 case omM2fw2: (void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN); 8001c98: 4b2c ldr r3, [pc, #176] @ (8001d4c ) 8001c9a: 885b ldrh r3, [r3, #2] 8001c9c: b2da uxtb r2, r3 8001c9e: 4b2f ldr r3, [pc, #188] @ (8001d5c ) 8001ca0: 881b ldrh r3, [r3, #0] 8001ca2: b2d9 uxtb r1, r3 8001ca4: 4b2b ldr r3, [pc, #172] @ (8001d54 ) 8001ca6: 881b ldrh r3, [r3, #0] 8001ca8: b2db uxtb r3, r3 8001caa: 200a movs r0, #10 8001cac: 9001 str r0, [sp, #4] 8001cae: 9300 str r3, [sp, #0] 8001cb0: 460b mov r3, r1 8001cb2: 2100 movs r1, #0 8001cb4: 2002 movs r0, #2 8001cb6: f001 fedd bl 8003a74 if(pulsanti)stCiclo=omStopMan; 8001cba: 4b27 ldr r3, [pc, #156] @ (8001d58 ) 8001cbc: 781b ldrb r3, [r3, #0] 8001cbe: 2b00 cmp r3, #0 8001cc0: f000 879b beq.w 8002bfa 8001cc4: 4b1d ldr r3, [pc, #116] @ (8001d3c ) 8001cc6: 2211 movs r2, #17 8001cc8: 701a strb r2, [r3, #0] break; 8001cca: f000 bf96 b.w 8002bfa case omM2bw1: (void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN); 8001cce: 4b1f ldr r3, [pc, #124] @ (8001d4c ) 8001cd0: 885b ldrh r3, [r3, #2] 8001cd2: b2da uxtb r2, r3 8001cd4: 4b21 ldr r3, [pc, #132] @ (8001d5c ) 8001cd6: 881b ldrh r3, [r3, #0] 8001cd8: b2d9 uxtb r1, r3 8001cda: 4b1e ldr r3, [pc, #120] @ (8001d54 ) 8001cdc: 881b ldrh r3, [r3, #0] 8001cde: b2db uxtb r3, r3 8001ce0: 200a movs r0, #10 8001ce2: 9001 str r0, [sp, #4] 8001ce4: 9300 str r3, [sp, #0] 8001ce6: 460b mov r3, r1 8001ce8: 2101 movs r1, #1 8001cea: 2002 movs r0, #2 8001cec: f001 fec2 bl 8003a74 if(pulsanti==0)stCiclo=omM2bw2; 8001cf0: 4b19 ldr r3, [pc, #100] @ (8001d58 ) 8001cf2: 781b ldrb r3, [r3, #0] 8001cf4: 2b00 cmp r3, #0 8001cf6: f040 8782 bne.w 8002bfe 8001cfa: 4b10 ldr r3, [pc, #64] @ (8001d3c ) 8001cfc: 2208 movs r2, #8 8001cfe: 701a strb r2, [r3, #0] break; 8001d00: f000 bf7d b.w 8002bfe case omM2bw2: (void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN); 8001d04: 4b11 ldr r3, [pc, #68] @ (8001d4c ) 8001d06: 885b ldrh r3, [r3, #2] 8001d08: b2da uxtb r2, r3 8001d0a: 4b14 ldr r3, [pc, #80] @ (8001d5c ) 8001d0c: 881b ldrh r3, [r3, #0] 8001d0e: b2d9 uxtb r1, r3 8001d10: 4b10 ldr r3, [pc, #64] @ (8001d54 ) 8001d12: 881b ldrh r3, [r3, #0] 8001d14: b2db uxtb r3, r3 8001d16: 200a movs r0, #10 8001d18: 9001 str r0, [sp, #4] 8001d1a: 9300 str r3, [sp, #0] 8001d1c: 460b mov r3, r1 8001d1e: 2101 movs r1, #1 8001d20: 2002 movs r0, #2 8001d22: f001 fea7 bl 8003a74 if(pulsanti)stCiclo=omStopMan; 8001d26: 4b0c ldr r3, [pc, #48] @ (8001d58 ) 8001d28: 781b ldrb r3, [r3, #0] 8001d2a: 2b00 cmp r3, #0 8001d2c: f000 8769 beq.w 8002c02 8001d30: 4b02 ldr r3, [pc, #8] @ (8001d3c ) 8001d32: 2211 movs r2, #17 8001d34: 701a strb r2, [r3, #0] break; 8001d36: f000 bf64 b.w 8002c02 8001d3a: bf00 nop 8001d3c: 20000432 .word 0x20000432 8001d40: 20000430 .word 0x20000430 8001d44: 20000433 .word 0x20000433 8001d48: 200003f4 .word 0x200003f4 8001d4c: 20000428 .word 0x20000428 8001d50: 20000420 .word 0x20000420 8001d54: 2000041e .word 0x2000041e 8001d58: 200003e8 .word 0x200003e8 8001d5c: 20000422 .word 0x20000422 case omM3fw1: (void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN); 8001d60: 4ba9 ldr r3, [pc, #676] @ (8002008 ) 8001d62: 889b ldrh r3, [r3, #4] 8001d64: b2da uxtb r2, r3 8001d66: 4ba9 ldr r3, [pc, #676] @ (800200c ) 8001d68: 881b ldrh r3, [r3, #0] 8001d6a: b2d9 uxtb r1, r3 8001d6c: 4ba8 ldr r3, [pc, #672] @ (8002010 ) 8001d6e: 881b ldrh r3, [r3, #0] 8001d70: b2db uxtb r3, r3 8001d72: 200a movs r0, #10 8001d74: 9001 str r0, [sp, #4] 8001d76: 9300 str r3, [sp, #0] 8001d78: 460b mov r3, r1 8001d7a: 2100 movs r1, #0 8001d7c: 2003 movs r0, #3 8001d7e: f001 fe79 bl 8003a74 if(pulsanti==0)stCiclo=omM3fw2; 8001d82: 4ba4 ldr r3, [pc, #656] @ (8002014 ) 8001d84: 781b ldrb r3, [r3, #0] 8001d86: 2b00 cmp r3, #0 8001d88: f040 873d bne.w 8002c06 8001d8c: 4ba2 ldr r3, [pc, #648] @ (8002018 ) 8001d8e: 220a movs r2, #10 8001d90: 701a strb r2, [r3, #0] break; 8001d92: f000 bf38 b.w 8002c06 case omM3fw2: (void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN); 8001d96: 4b9c ldr r3, [pc, #624] @ (8002008 ) 8001d98: 889b ldrh r3, [r3, #4] 8001d9a: b2da uxtb r2, r3 8001d9c: 4b9b ldr r3, [pc, #620] @ (800200c ) 8001d9e: 881b ldrh r3, [r3, #0] 8001da0: b2d9 uxtb r1, r3 8001da2: 4b9b ldr r3, [pc, #620] @ (8002010 ) 8001da4: 881b ldrh r3, [r3, #0] 8001da6: b2db uxtb r3, r3 8001da8: 200a movs r0, #10 8001daa: 9001 str r0, [sp, #4] 8001dac: 9300 str r3, [sp, #0] 8001dae: 460b mov r3, r1 8001db0: 2100 movs r1, #0 8001db2: 2003 movs r0, #3 8001db4: f001 fe5e bl 8003a74 if(pulsanti)stCiclo=omStopMan; 8001db8: 4b96 ldr r3, [pc, #600] @ (8002014 ) 8001dba: 781b ldrb r3, [r3, #0] 8001dbc: 2b00 cmp r3, #0 8001dbe: f000 8724 beq.w 8002c0a 8001dc2: 4b95 ldr r3, [pc, #596] @ (8002018 ) 8001dc4: 2211 movs r2, #17 8001dc6: 701a strb r2, [r3, #0] break; 8001dc8: f000 bf1f b.w 8002c0a case omM3bw1: (void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN); 8001dcc: 4b8e ldr r3, [pc, #568] @ (8002008 ) 8001dce: 889b ldrh r3, [r3, #4] 8001dd0: b2da uxtb r2, r3 8001dd2: 4b8e ldr r3, [pc, #568] @ (800200c ) 8001dd4: 881b ldrh r3, [r3, #0] 8001dd6: b2d9 uxtb r1, r3 8001dd8: 4b8d ldr r3, [pc, #564] @ (8002010 ) 8001dda: 881b ldrh r3, [r3, #0] 8001ddc: b2db uxtb r3, r3 8001dde: 200a movs r0, #10 8001de0: 9001 str r0, [sp, #4] 8001de2: 9300 str r3, [sp, #0] 8001de4: 460b mov r3, r1 8001de6: 2101 movs r1, #1 8001de8: 2003 movs r0, #3 8001dea: f001 fe43 bl 8003a74 if(pulsanti==0)stCiclo=omM3bw2; 8001dee: 4b89 ldr r3, [pc, #548] @ (8002014 ) 8001df0: 781b ldrb r3, [r3, #0] 8001df2: 2b00 cmp r3, #0 8001df4: f040 870b bne.w 8002c0e 8001df8: 4b87 ldr r3, [pc, #540] @ (8002018 ) 8001dfa: 220c movs r2, #12 8001dfc: 701a strb r2, [r3, #0] break; 8001dfe: f000 bf06 b.w 8002c0e case omM3bw2: (void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN); 8001e02: 4b81 ldr r3, [pc, #516] @ (8002008 ) 8001e04: 889b ldrh r3, [r3, #4] 8001e06: b2da uxtb r2, r3 8001e08: 4b80 ldr r3, [pc, #512] @ (800200c ) 8001e0a: 881b ldrh r3, [r3, #0] 8001e0c: b2d9 uxtb r1, r3 8001e0e: 4b80 ldr r3, [pc, #512] @ (8002010 ) 8001e10: 881b ldrh r3, [r3, #0] 8001e12: b2db uxtb r3, r3 8001e14: 200a movs r0, #10 8001e16: 9001 str r0, [sp, #4] 8001e18: 9300 str r3, [sp, #0] 8001e1a: 460b mov r3, r1 8001e1c: 2101 movs r1, #1 8001e1e: 2003 movs r0, #3 8001e20: f001 fe28 bl 8003a74 if(pulsanti)stCiclo=omStopMan; 8001e24: 4b7b ldr r3, [pc, #492] @ (8002014 ) 8001e26: 781b ldrb r3, [r3, #0] 8001e28: 2b00 cmp r3, #0 8001e2a: f000 86f2 beq.w 8002c12 8001e2e: 4b7a ldr r3, [pc, #488] @ (8002018 ) 8001e30: 2211 movs r2, #17 8001e32: 701a strb r2, [r3, #0] break; 8001e34: f000 beed b.w 8002c12 case omM4fw1: (void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN); 8001e38: 4b73 ldr r3, [pc, #460] @ (8002008 ) 8001e3a: 88db ldrh r3, [r3, #6] 8001e3c: b2da uxtb r2, r3 8001e3e: 4b77 ldr r3, [pc, #476] @ (800201c ) 8001e40: 881b ldrh r3, [r3, #0] 8001e42: b2d9 uxtb r1, r3 8001e44: 4b72 ldr r3, [pc, #456] @ (8002010 ) 8001e46: 881b ldrh r3, [r3, #0] 8001e48: b2db uxtb r3, r3 8001e4a: 200a movs r0, #10 8001e4c: 9001 str r0, [sp, #4] 8001e4e: 9300 str r3, [sp, #0] 8001e50: 460b mov r3, r1 8001e52: 2100 movs r1, #0 8001e54: 2004 movs r0, #4 8001e56: f001 fe0d bl 8003a74 if(pulsanti==0)stCiclo=omM4fw2; 8001e5a: 4b6e ldr r3, [pc, #440] @ (8002014 ) 8001e5c: 781b ldrb r3, [r3, #0] 8001e5e: 2b00 cmp r3, #0 8001e60: f040 86d9 bne.w 8002c16 8001e64: 4b6c ldr r3, [pc, #432] @ (8002018 ) 8001e66: 220e movs r2, #14 8001e68: 701a strb r2, [r3, #0] break; 8001e6a: f000 bed4 b.w 8002c16 case omM4fw2: (void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN); 8001e6e: 4b66 ldr r3, [pc, #408] @ (8002008 ) 8001e70: 88db ldrh r3, [r3, #6] 8001e72: b2da uxtb r2, r3 8001e74: 4b69 ldr r3, [pc, #420] @ (800201c ) 8001e76: 881b ldrh r3, [r3, #0] 8001e78: b2d9 uxtb r1, r3 8001e7a: 4b65 ldr r3, [pc, #404] @ (8002010 ) 8001e7c: 881b ldrh r3, [r3, #0] 8001e7e: b2db uxtb r3, r3 8001e80: 200a movs r0, #10 8001e82: 9001 str r0, [sp, #4] 8001e84: 9300 str r3, [sp, #0] 8001e86: 460b mov r3, r1 8001e88: 2100 movs r1, #0 8001e8a: 2004 movs r0, #4 8001e8c: f001 fdf2 bl 8003a74 if(pulsanti)stCiclo=omStopMan; 8001e90: 4b60 ldr r3, [pc, #384] @ (8002014 ) 8001e92: 781b ldrb r3, [r3, #0] 8001e94: 2b00 cmp r3, #0 8001e96: f000 86c0 beq.w 8002c1a 8001e9a: 4b5f ldr r3, [pc, #380] @ (8002018 ) 8001e9c: 2211 movs r2, #17 8001e9e: 701a strb r2, [r3, #0] break; 8001ea0: f000 bebb b.w 8002c1a case omM4bw1: (void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN); 8001ea4: 4b58 ldr r3, [pc, #352] @ (8002008 ) 8001ea6: 88db ldrh r3, [r3, #6] 8001ea8: b2da uxtb r2, r3 8001eaa: 4b5c ldr r3, [pc, #368] @ (800201c ) 8001eac: 881b ldrh r3, [r3, #0] 8001eae: b2d9 uxtb r1, r3 8001eb0: 4b57 ldr r3, [pc, #348] @ (8002010 ) 8001eb2: 881b ldrh r3, [r3, #0] 8001eb4: b2db uxtb r3, r3 8001eb6: 200a movs r0, #10 8001eb8: 9001 str r0, [sp, #4] 8001eba: 9300 str r3, [sp, #0] 8001ebc: 460b mov r3, r1 8001ebe: 2101 movs r1, #1 8001ec0: 2004 movs r0, #4 8001ec2: f001 fdd7 bl 8003a74 if(pulsanti==0)stCiclo=omM4bw2; 8001ec6: 4b53 ldr r3, [pc, #332] @ (8002014 ) 8001ec8: 781b ldrb r3, [r3, #0] 8001eca: 2b00 cmp r3, #0 8001ecc: f040 86a7 bne.w 8002c1e 8001ed0: 4b51 ldr r3, [pc, #324] @ (8002018 ) 8001ed2: 2210 movs r2, #16 8001ed4: 701a strb r2, [r3, #0] break; 8001ed6: f000 bea2 b.w 8002c1e case omM4bw2: (void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN); 8001eda: 4b4b ldr r3, [pc, #300] @ (8002008 ) 8001edc: 88db ldrh r3, [r3, #6] 8001ede: b2da uxtb r2, r3 8001ee0: 4b4e ldr r3, [pc, #312] @ (800201c ) 8001ee2: 881b ldrh r3, [r3, #0] 8001ee4: b2d9 uxtb r1, r3 8001ee6: 4b4a ldr r3, [pc, #296] @ (8002010 ) 8001ee8: 881b ldrh r3, [r3, #0] 8001eea: b2db uxtb r3, r3 8001eec: 200a movs r0, #10 8001eee: 9001 str r0, [sp, #4] 8001ef0: 9300 str r3, [sp, #0] 8001ef2: 460b mov r3, r1 8001ef4: 2101 movs r1, #1 8001ef6: 2004 movs r0, #4 8001ef8: f001 fdbc bl 8003a74 if(pulsanti)stCiclo=omStopMan; 8001efc: 4b45 ldr r3, [pc, #276] @ (8002014 ) 8001efe: 781b ldrb r3, [r3, #0] 8001f00: 2b00 cmp r3, #0 8001f02: f000 868e beq.w 8002c22 8001f06: 4b44 ldr r3, [pc, #272] @ (8002018 ) 8001f08: 2211 movs r2, #17 8001f0a: 701a strb r2, [r3, #0] break; 8001f0c: f000 be89 b.w 8002c22 case omStopMan: SetMotPerc(M1,FW,0); 8001f10: 2200 movs r2, #0 8001f12: 2100 movs r1, #0 8001f14: 2001 movs r0, #1 8001f16: f001 fc2d bl 8003774 SetMotPerc(M2,FW,0); 8001f1a: 2200 movs r2, #0 8001f1c: 2100 movs r1, #0 8001f1e: 2002 movs r0, #2 8001f20: f001 fc28 bl 8003774 SetMotPerc(M3,FW,0); 8001f24: 2200 movs r2, #0 8001f26: 2100 movs r1, #0 8001f28: 2003 movs r0, #3 8001f2a: f001 fc23 bl 8003774 SetMotPerc(M4,FW,0); 8001f2e: 2200 movs r2, #0 8001f30: 2100 movs r1, #0 8001f32: 2004 movs r0, #4 8001f34: f001 fc1e bl 8003774 SetMotPerc(M1,BW,0); 8001f38: 2200 movs r2, #0 8001f3a: 2101 movs r1, #1 8001f3c: 2001 movs r0, #1 8001f3e: f001 fc19 bl 8003774 SetMotPerc(M2,BW,0); 8001f42: 2200 movs r2, #0 8001f44: 2101 movs r1, #1 8001f46: 2002 movs r0, #2 8001f48: f001 fc14 bl 8003774 SetMotPerc(M3,BW,0); 8001f4c: 2200 movs r2, #0 8001f4e: 2101 movs r1, #1 8001f50: 2003 movs r0, #3 8001f52: f001 fc0f bl 8003774 SetMotPerc(M4,BW,0); 8001f56: 2200 movs r2, #0 8001f58: 2101 movs r1, #1 8001f5a: 2004 movs r0, #4 8001f5c: f001 fc0a bl 8003774 if(pulsanti==0){ 8001f60: 4b2c ldr r3, [pc, #176] @ (8002014 ) 8001f62: 781b ldrb r3, [r3, #0] 8001f64: 2b00 cmp r3, #0 8001f66: f040 865e bne.w 8002c26 stBuz=bzoff; 8001f6a: 4b2d ldr r3, [pc, #180] @ (8002020 ) 8001f6c: 2200 movs r2, #0 8001f6e: 701a strb r2, [r3, #0] stCiclo=omaperto; 8001f70: 4b29 ldr r3, [pc, #164] @ (8002018 ) 8001f72: 2222 movs r2, #34 @ 0x22 8001f74: 701a strb r2, [r3, #0] } break; 8001f76: f000 be56 b.w 8002c26 case omapertura0: if(rtCiclo==0){ 8001f7a: 4b2a ldr r3, [pc, #168] @ (8002024 ) 8001f7c: 881b ldrh r3, [r3, #0] 8001f7e: b29b uxth r3, r3 8001f80: 2b00 cmp r3, #0 8001f82: f040 8652 bne.w 8002c2a stBuz=bzmoving; 8001f86: 4b26 ldr r3, [pc, #152] @ (8002020 ) 8001f88: 2201 movs r2, #1 8001f8a: 701a strb r2, [r3, #0] (void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT); 8001f8c: 4b1e ldr r3, [pc, #120] @ (8002008 ) 8001f8e: 885b ldrh r3, [r3, #2] 8001f90: b2da uxtb r2, r3 8001f92: 4b25 ldr r3, [pc, #148] @ (8002028 ) 8001f94: 881b ldrh r3, [r3, #0] 8001f96: b2d9 uxtb r1, r3 8001f98: 4b24 ldr r3, [pc, #144] @ (800202c ) 8001f9a: 881b ldrh r3, [r3, #0] 8001f9c: b2db uxtb r3, r3 8001f9e: 2000 movs r0, #0 8001fa0: 9001 str r0, [sp, #4] 8001fa2: 9300 str r3, [sp, #0] 8001fa4: 460b mov r3, r1 8001fa6: 2101 movs r1, #1 8001fa8: 2002 movs r0, #2 8001faa: f001 fd63 bl 8003a74 stCiclo=omapertura1; 8001fae: 4b1a ldr r3, [pc, #104] @ (8002018 ) 8001fb0: 2213 movs r2, #19 8001fb2: 701a strb r2, [r3, #0] } break; 8001fb4: f000 be39 b.w 8002c2a case omapertura1: if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){ 8001fb8: 4b13 ldr r3, [pc, #76] @ (8002008 ) 8001fba: 885b ldrh r3, [r3, #2] 8001fbc: b2da uxtb r2, r3 8001fbe: 4b1a ldr r3, [pc, #104] @ (8002028 ) 8001fc0: 881b ldrh r3, [r3, #0] 8001fc2: b2d9 uxtb r1, r3 8001fc4: 4b19 ldr r3, [pc, #100] @ (800202c ) 8001fc6: 881b ldrh r3, [r3, #0] 8001fc8: b2db uxtb r3, r3 8001fca: 200a movs r0, #10 8001fcc: 9001 str r0, [sp, #4] 8001fce: 9300 str r3, [sp, #0] 8001fd0: 460b mov r3, r1 8001fd2: 2101 movs r1, #1 8001fd4: 2002 movs r0, #2 8001fd6: f001 fd4d bl 8003a74 8001fda: 4603 mov r3, r0 8001fdc: 2b00 cmp r3, #0 8001fde: d106 bne.n 8001fee rtCiclo=t1ap; 8001fe0: 4b13 ldr r3, [pc, #76] @ (8002030 ) 8001fe2: 881a ldrh r2, [r3, #0] 8001fe4: 4b0f ldr r3, [pc, #60] @ (8002024 ) 8001fe6: 801a strh r2, [r3, #0] stCiclo=omapertura2; 8001fe8: 4b0b ldr r3, [pc, #44] @ (8002018 ) 8001fea: 2214 movs r2, #20 8001fec: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8001fee: 4b11 ldr r3, [pc, #68] @ (8002034 ) 8001ff0: 881b ldrh r3, [r3, #0] 8001ff2: f003 0302 and.w r3, r3, #2 8001ff6: 2b00 cmp r3, #0 8001ff8: f000 8619 beq.w 8002c2e 8001ffc: 4b06 ldr r3, [pc, #24] @ (8002018 ) 8001ffe: 2221 movs r2, #33 @ 0x21 8002000: 701a strb r2, [r3, #0] break; 8002002: f000 be14 b.w 8002c2e 8002006: bf00 nop 8002008: 20000428 .word 0x20000428 800200c: 20000424 .word 0x20000424 8002010: 2000041e .word 0x2000041e 8002014: 200003e8 .word 0x200003e8 8002018: 20000432 .word 0x20000432 800201c: 20000426 .word 0x20000426 8002020: 20000433 .word 0x20000433 8002024: 200003f4 .word 0x200003f4 8002028: 200003fa .word 0x200003fa 800202c: 2000041a .word 0x2000041a 8002030: 20000406 .word 0x20000406 8002034: 20000430 .word 0x20000430 case omapertura2: if(rtCiclo==0){ 8002038: 4ba1 ldr r3, [pc, #644] @ (80022c0 ) 800203a: 881b ldrh r3, [r3, #0] 800203c: b29b uxth r3, r3 800203e: 2b00 cmp r3, #0 8002040: d110 bne.n 8002064 (void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT); 8002042: 4ba0 ldr r3, [pc, #640] @ (80022c4 ) 8002044: 881b ldrh r3, [r3, #0] 8002046: b2da uxtb r2, r3 8002048: 4b9f ldr r3, [pc, #636] @ (80022c8 ) 800204a: 881b ldrh r3, [r3, #0] 800204c: b2db uxtb r3, r3 800204e: 2100 movs r1, #0 8002050: 9101 str r1, [sp, #4] 8002052: 9300 str r3, [sp, #0] 8002054: 2300 movs r3, #0 8002056: 2101 movs r1, #1 8002058: 2002 movs r0, #2 800205a: f001 fd0b bl 8003a74 stCiclo=omapertura3; 800205e: 4b9b ldr r3, [pc, #620] @ (80022cc ) 8002060: 2215 movs r2, #21 8002062: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8002064: 4b9a ldr r3, [pc, #616] @ (80022d0 ) 8002066: 881b ldrh r3, [r3, #0] 8002068: f003 0302 and.w r3, r3, #2 800206c: 2b00 cmp r3, #0 800206e: f000 85e0 beq.w 8002c32 8002072: 4b96 ldr r3, [pc, #600] @ (80022cc ) 8002074: 2221 movs r2, #33 @ 0x21 8002076: 701a strb r2, [r3, #0] break; 8002078: f000 bddb b.w 8002c32 case omapertura3: if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){ 800207c: 4b91 ldr r3, [pc, #580] @ (80022c4 ) 800207e: 881b ldrh r3, [r3, #0] 8002080: b2da uxtb r2, r3 8002082: 4b91 ldr r3, [pc, #580] @ (80022c8 ) 8002084: 881b ldrh r3, [r3, #0] 8002086: b2db uxtb r3, r3 8002088: 210a movs r1, #10 800208a: 9101 str r1, [sp, #4] 800208c: 9300 str r3, [sp, #0] 800208e: 2300 movs r3, #0 8002090: 2101 movs r1, #1 8002092: 2002 movs r0, #2 8002094: f001 fcee bl 8003a74 8002098: 4603 mov r3, r0 800209a: 2b00 cmp r3, #0 800209c: d106 bne.n 80020ac rtCiclo=twap; 800209e: 4b8d ldr r3, [pc, #564] @ (80022d4 ) 80020a0: 881a ldrh r2, [r3, #0] 80020a2: 4b87 ldr r3, [pc, #540] @ (80022c0 ) 80020a4: 801a strh r2, [r3, #0] stCiclo=omapertura4; 80020a6: 4b89 ldr r3, [pc, #548] @ (80022cc ) 80020a8: 2216 movs r2, #22 80020aa: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80020ac: 4b88 ldr r3, [pc, #544] @ (80022d0 ) 80020ae: 881b ldrh r3, [r3, #0] 80020b0: f003 0302 and.w r3, r3, #2 80020b4: 2b00 cmp r3, #0 80020b6: f000 85be beq.w 8002c36 80020ba: 4b84 ldr r3, [pc, #528] @ (80022cc ) 80020bc: 2221 movs r2, #33 @ 0x21 80020be: 701a strb r2, [r3, #0] break; 80020c0: f000 bdb9 b.w 8002c36 case omapertura4: if(rtCiclo==0){ 80020c4: 4b7e ldr r3, [pc, #504] @ (80022c0 ) 80020c6: 881b ldrh r3, [r3, #0] 80020c8: b29b uxth r3, r3 80020ca: 2b00 cmp r3, #0 80020cc: d113 bne.n 80020f6 (void)ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT); 80020ce: 4b82 ldr r3, [pc, #520] @ (80022d8 ) 80020d0: 881b ldrh r3, [r3, #0] 80020d2: b2da uxtb r2, r3 80020d4: 4b81 ldr r3, [pc, #516] @ (80022dc ) 80020d6: 881b ldrh r3, [r3, #0] 80020d8: b2d9 uxtb r1, r3 80020da: 4b7b ldr r3, [pc, #492] @ (80022c8 ) 80020dc: 881b ldrh r3, [r3, #0] 80020de: b2db uxtb r3, r3 80020e0: 2000 movs r0, #0 80020e2: 9001 str r0, [sp, #4] 80020e4: 9300 str r3, [sp, #0] 80020e6: 460b mov r3, r1 80020e8: 2100 movs r1, #0 80020ea: 2001 movs r0, #1 80020ec: f001 fcc2 bl 8003a74 stCiclo=omapertura5; 80020f0: 4b76 ldr r3, [pc, #472] @ (80022cc ) 80020f2: 2217 movs r2, #23 80020f4: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80020f6: 4b76 ldr r3, [pc, #472] @ (80022d0 ) 80020f8: 881b ldrh r3, [r3, #0] 80020fa: f003 0302 and.w r3, r3, #2 80020fe: 2b00 cmp r3, #0 8002100: f000 859b beq.w 8002c3a 8002104: 4b71 ldr r3, [pc, #452] @ (80022cc ) 8002106: 2221 movs r2, #33 @ 0x21 8002108: 701a strb r2, [r3, #0] break; 800210a: f000 bd96 b.w 8002c3a case omapertura5: if(ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){ 800210e: 4b72 ldr r3, [pc, #456] @ (80022d8 ) 8002110: 881b ldrh r3, [r3, #0] 8002112: b2da uxtb r2, r3 8002114: 4b71 ldr r3, [pc, #452] @ (80022dc ) 8002116: 881b ldrh r3, [r3, #0] 8002118: b2d9 uxtb r1, r3 800211a: 4b6b ldr r3, [pc, #428] @ (80022c8 ) 800211c: 881b ldrh r3, [r3, #0] 800211e: b2db uxtb r3, r3 8002120: 200a movs r0, #10 8002122: 9001 str r0, [sp, #4] 8002124: 9300 str r3, [sp, #0] 8002126: 460b mov r3, r1 8002128: 2100 movs r1, #0 800212a: 2001 movs r0, #1 800212c: f001 fca2 bl 8003a74 8002130: 4603 mov r3, r0 8002132: 2b00 cmp r3, #0 8002134: d106 bne.n 8002144 rtCiclo=t2ap; 8002136: 4b6a ldr r3, [pc, #424] @ (80022e0 ) 8002138: 881a ldrh r2, [r3, #0] 800213a: 4b61 ldr r3, [pc, #388] @ (80022c0 ) 800213c: 801a strh r2, [r3, #0] stCiclo=omapertura6; 800213e: 4b63 ldr r3, [pc, #396] @ (80022cc ) 8002140: 2218 movs r2, #24 8002142: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8002144: 4b62 ldr r3, [pc, #392] @ (80022d0 ) 8002146: 881b ldrh r3, [r3, #0] 8002148: f003 0302 and.w r3, r3, #2 800214c: 2b00 cmp r3, #0 800214e: f000 8576 beq.w 8002c3e 8002152: 4b5e ldr r3, [pc, #376] @ (80022cc ) 8002154: 2221 movs r2, #33 @ 0x21 8002156: 701a strb r2, [r3, #0] break; 8002158: f000 bd71 b.w 8002c3e case omapertura6: if(rtCiclo==0){ 800215c: 4b58 ldr r3, [pc, #352] @ (80022c0 ) 800215e: 881b ldrh r3, [r3, #0] 8002160: b29b uxth r3, r3 8002162: 2b00 cmp r3, #0 8002164: d113 bne.n 800218e (void)ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPINIT); 8002166: 4b5c ldr r3, [pc, #368] @ (80022d8 ) 8002168: 889b ldrh r3, [r3, #4] 800216a: b2da uxtb r2, r3 800216c: 4b5d ldr r3, [pc, #372] @ (80022e4 ) 800216e: 881b ldrh r3, [r3, #0] 8002170: b2d9 uxtb r1, r3 8002172: 4b55 ldr r3, [pc, #340] @ (80022c8 ) 8002174: 881b ldrh r3, [r3, #0] 8002176: b2db uxtb r3, r3 8002178: 2000 movs r0, #0 800217a: 9001 str r0, [sp, #4] 800217c: 9300 str r3, [sp, #0] 800217e: 460b mov r3, r1 8002180: 2100 movs r1, #0 8002182: 2003 movs r0, #3 8002184: f001 fc76 bl 8003a74 stCiclo=omapertura7; 8002188: 4b50 ldr r3, [pc, #320] @ (80022cc ) 800218a: 2219 movs r2, #25 800218c: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800218e: 4b50 ldr r3, [pc, #320] @ (80022d0 ) 8002190: 881b ldrh r3, [r3, #0] 8002192: f003 0302 and.w r3, r3, #2 8002196: 2b00 cmp r3, #0 8002198: f000 8553 beq.w 8002c42 800219c: 4b4b ldr r3, [pc, #300] @ (80022cc ) 800219e: 2221 movs r2, #33 @ 0x21 80021a0: 701a strb r2, [r3, #0] break; 80021a2: f000 bd4e b.w 8002c42 case omapertura7: if(ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){ 80021a6: 4b4c ldr r3, [pc, #304] @ (80022d8 ) 80021a8: 889b ldrh r3, [r3, #4] 80021aa: b2da uxtb r2, r3 80021ac: 4b4d ldr r3, [pc, #308] @ (80022e4 ) 80021ae: 881b ldrh r3, [r3, #0] 80021b0: b2d9 uxtb r1, r3 80021b2: 4b45 ldr r3, [pc, #276] @ (80022c8 ) 80021b4: 881b ldrh r3, [r3, #0] 80021b6: b2db uxtb r3, r3 80021b8: 200a movs r0, #10 80021ba: 9001 str r0, [sp, #4] 80021bc: 9300 str r3, [sp, #0] 80021be: 460b mov r3, r1 80021c0: 2100 movs r1, #0 80021c2: 2003 movs r0, #3 80021c4: f001 fc56 bl 8003a74 80021c8: 4603 mov r3, r0 80021ca: 2b00 cmp r3, #0 80021cc: d106 bne.n 80021dc rtCiclo=t3ap; 80021ce: 4b46 ldr r3, [pc, #280] @ (80022e8 ) 80021d0: 881a ldrh r2, [r3, #0] 80021d2: 4b3b ldr r3, [pc, #236] @ (80022c0 ) 80021d4: 801a strh r2, [r3, #0] stCiclo=omapertura8; 80021d6: 4b3d ldr r3, [pc, #244] @ (80022cc ) 80021d8: 221a movs r2, #26 80021da: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80021dc: 4b3c ldr r3, [pc, #240] @ (80022d0 ) 80021de: 881b ldrh r3, [r3, #0] 80021e0: f003 0302 and.w r3, r3, #2 80021e4: 2b00 cmp r3, #0 80021e6: f000 852e beq.w 8002c46 80021ea: 4b38 ldr r3, [pc, #224] @ (80022cc ) 80021ec: 2221 movs r2, #33 @ 0x21 80021ee: 701a strb r2, [r3, #0] break; 80021f0: f000 bd29 b.w 8002c46 case omapertura8: if(rtCiclo==0){ 80021f4: 4b32 ldr r3, [pc, #200] @ (80022c0 ) 80021f6: 881b ldrh r3, [r3, #0] 80021f8: b29b uxth r3, r3 80021fa: 2b00 cmp r3, #0 80021fc: d11e bne.n 800223c (void)ramp(M3,FW,m3pwmap,0,tramp,RAMPINIT); 80021fe: 4b39 ldr r3, [pc, #228] @ (80022e4 ) 8002200: 881b ldrh r3, [r3, #0] 8002202: b2da uxtb r2, r3 8002204: 4b30 ldr r3, [pc, #192] @ (80022c8 ) 8002206: 881b ldrh r3, [r3, #0] 8002208: b2db uxtb r3, r3 800220a: 2100 movs r1, #0 800220c: 9101 str r1, [sp, #4] 800220e: 9300 str r3, [sp, #0] 8002210: 2300 movs r3, #0 8002212: 2100 movs r1, #0 8002214: 2003 movs r0, #3 8002216: f001 fc2d bl 8003a74 (void)ramp(M1,FW,m1pwmap,0,tramp,RAMPINIT); 800221a: 4b30 ldr r3, [pc, #192] @ (80022dc ) 800221c: 881b ldrh r3, [r3, #0] 800221e: b2da uxtb r2, r3 8002220: 4b29 ldr r3, [pc, #164] @ (80022c8 ) 8002222: 881b ldrh r3, [r3, #0] 8002224: b2db uxtb r3, r3 8002226: 2100 movs r1, #0 8002228: 9101 str r1, [sp, #4] 800222a: 9300 str r3, [sp, #0] 800222c: 2300 movs r3, #0 800222e: 2100 movs r1, #0 8002230: 2001 movs r0, #1 8002232: f001 fc1f bl 8003a74 stCiclo=omapertura9; 8002236: 4b25 ldr r3, [pc, #148] @ (80022cc ) 8002238: 221b movs r2, #27 800223a: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800223c: 4b24 ldr r3, [pc, #144] @ (80022d0 ) 800223e: 881b ldrh r3, [r3, #0] 8002240: f003 0302 and.w r3, r3, #2 8002244: 2b00 cmp r3, #0 8002246: f000 8500 beq.w 8002c4a 800224a: 4b20 ldr r3, [pc, #128] @ (80022cc ) 800224c: 2221 movs r2, #33 @ 0x21 800224e: 701a strb r2, [r3, #0] break; 8002250: f000 bcfb b.w 8002c4a case omapertura9: if((ramp(M3,FW,m3pwmap,0,tramp,RAMPRUN)==DONE)&&(ramp(M1,FW,m1pwmap,0,tramp,RAMPRUN)==DONE)){ 8002254: 4b23 ldr r3, [pc, #140] @ (80022e4 ) 8002256: 881b ldrh r3, [r3, #0] 8002258: b2da uxtb r2, r3 800225a: 4b1b ldr r3, [pc, #108] @ (80022c8 ) 800225c: 881b ldrh r3, [r3, #0] 800225e: b2db uxtb r3, r3 8002260: 210a movs r1, #10 8002262: 9101 str r1, [sp, #4] 8002264: 9300 str r3, [sp, #0] 8002266: 2300 movs r3, #0 8002268: 2100 movs r1, #0 800226a: 2003 movs r0, #3 800226c: f001 fc02 bl 8003a74 8002270: 4603 mov r3, r0 8002272: 2b00 cmp r3, #0 8002274: d117 bne.n 80022a6 8002276: 4b19 ldr r3, [pc, #100] @ (80022dc ) 8002278: 881b ldrh r3, [r3, #0] 800227a: b2da uxtb r2, r3 800227c: 4b12 ldr r3, [pc, #72] @ (80022c8 ) 800227e: 881b ldrh r3, [r3, #0] 8002280: b2db uxtb r3, r3 8002282: 210a movs r1, #10 8002284: 9101 str r1, [sp, #4] 8002286: 9300 str r3, [sp, #0] 8002288: 2300 movs r3, #0 800228a: 2100 movs r1, #0 800228c: 2001 movs r0, #1 800228e: f001 fbf1 bl 8003a74 8002292: 4603 mov r3, r0 8002294: 2b00 cmp r3, #0 8002296: d106 bne.n 80022a6 rtCiclo=twap; 8002298: 4b0e ldr r3, [pc, #56] @ (80022d4 ) 800229a: 881a ldrh r2, [r3, #0] 800229c: 4b08 ldr r3, [pc, #32] @ (80022c0 ) 800229e: 801a strh r2, [r3, #0] stCiclo=omapertura10; 80022a0: 4b0a ldr r3, [pc, #40] @ (80022cc ) 80022a2: 221c movs r2, #28 80022a4: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80022a6: 4b0a ldr r3, [pc, #40] @ (80022d0 ) 80022a8: 881b ldrh r3, [r3, #0] 80022aa: f003 0302 and.w r3, r3, #2 80022ae: 2b00 cmp r3, #0 80022b0: f000 84cd beq.w 8002c4e 80022b4: 4b05 ldr r3, [pc, #20] @ (80022cc ) 80022b6: 2221 movs r2, #33 @ 0x21 80022b8: 701a strb r2, [r3, #0] break; 80022ba: f000 bcc8 b.w 8002c4e 80022be: bf00 nop 80022c0: 200003f4 .word 0x200003f4 80022c4: 200003fa .word 0x200003fa 80022c8: 2000041a .word 0x2000041a 80022cc: 20000432 .word 0x20000432 80022d0: 20000430 .word 0x20000430 80022d4: 2000040e .word 0x2000040e 80022d8: 20000428 .word 0x20000428 80022dc: 200003f6 .word 0x200003f6 80022e0: 20000408 .word 0x20000408 80022e4: 200003fe .word 0x200003fe 80022e8: 2000040a .word 0x2000040a case omapertura10: if(rtCiclo==0){ 80022ec: 4b9b ldr r3, [pc, #620] @ (800255c ) 80022ee: 881b ldrh r3, [r3, #0] 80022f0: b29b uxth r3, r3 80022f2: 2b00 cmp r3, #0 80022f4: d113 bne.n 800231e (void)ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPINIT); 80022f6: 4b9a ldr r3, [pc, #616] @ (8002560 ) 80022f8: 88db ldrh r3, [r3, #6] 80022fa: b2da uxtb r2, r3 80022fc: 4b99 ldr r3, [pc, #612] @ (8002564 ) 80022fe: 881b ldrh r3, [r3, #0] 8002300: b2d9 uxtb r1, r3 8002302: 4b99 ldr r3, [pc, #612] @ (8002568 ) 8002304: 881b ldrh r3, [r3, #0] 8002306: b2db uxtb r3, r3 8002308: 2000 movs r0, #0 800230a: 9001 str r0, [sp, #4] 800230c: 9300 str r3, [sp, #0] 800230e: 460b mov r3, r1 8002310: 2100 movs r1, #0 8002312: 2004 movs r0, #4 8002314: f001 fbae bl 8003a74 stCiclo=omapertura11; 8002318: 4b94 ldr r3, [pc, #592] @ (800256c ) 800231a: 221d movs r2, #29 800231c: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800231e: 4b94 ldr r3, [pc, #592] @ (8002570 ) 8002320: 881b ldrh r3, [r3, #0] 8002322: f003 0302 and.w r3, r3, #2 8002326: 2b00 cmp r3, #0 8002328: f000 8493 beq.w 8002c52 800232c: 4b8f ldr r3, [pc, #572] @ (800256c ) 800232e: 2221 movs r2, #33 @ 0x21 8002330: 701a strb r2, [r3, #0] break; 8002332: f000 bc8e b.w 8002c52 case omapertura11: if(ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){ 8002336: 4b8a ldr r3, [pc, #552] @ (8002560 ) 8002338: 88db ldrh r3, [r3, #6] 800233a: b2da uxtb r2, r3 800233c: 4b89 ldr r3, [pc, #548] @ (8002564 ) 800233e: 881b ldrh r3, [r3, #0] 8002340: b2d9 uxtb r1, r3 8002342: 4b89 ldr r3, [pc, #548] @ (8002568 ) 8002344: 881b ldrh r3, [r3, #0] 8002346: b2db uxtb r3, r3 8002348: 200a movs r0, #10 800234a: 9001 str r0, [sp, #4] 800234c: 9300 str r3, [sp, #0] 800234e: 460b mov r3, r1 8002350: 2100 movs r1, #0 8002352: 2004 movs r0, #4 8002354: f001 fb8e bl 8003a74 8002358: 4603 mov r3, r0 800235a: 2b00 cmp r3, #0 800235c: d106 bne.n 800236c rtCiclo=t4ap; 800235e: 4b85 ldr r3, [pc, #532] @ (8002574 ) 8002360: 881a ldrh r2, [r3, #0] 8002362: 4b7e ldr r3, [pc, #504] @ (800255c ) 8002364: 801a strh r2, [r3, #0] stCiclo=omapertura12; 8002366: 4b81 ldr r3, [pc, #516] @ (800256c ) 8002368: 221e movs r2, #30 800236a: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800236c: 4b80 ldr r3, [pc, #512] @ (8002570 ) 800236e: 881b ldrh r3, [r3, #0] 8002370: f003 0302 and.w r3, r3, #2 8002374: 2b00 cmp r3, #0 8002376: f000 846e beq.w 8002c56 800237a: 4b7c ldr r3, [pc, #496] @ (800256c ) 800237c: 2221 movs r2, #33 @ 0x21 800237e: 701a strb r2, [r3, #0] break; 8002380: f000 bc69 b.w 8002c56 case omapertura12: if(rtCiclo==0){ 8002384: 4b75 ldr r3, [pc, #468] @ (800255c ) 8002386: 881b ldrh r3, [r3, #0] 8002388: b29b uxth r3, r3 800238a: 2b00 cmp r3, #0 800238c: d110 bne.n 80023b0 (void)ramp(M4,FW,m4pwmap,0,tramp,RAMPINIT); 800238e: 4b75 ldr r3, [pc, #468] @ (8002564 ) 8002390: 881b ldrh r3, [r3, #0] 8002392: b2da uxtb r2, r3 8002394: 4b74 ldr r3, [pc, #464] @ (8002568 ) 8002396: 881b ldrh r3, [r3, #0] 8002398: b2db uxtb r3, r3 800239a: 2100 movs r1, #0 800239c: 9101 str r1, [sp, #4] 800239e: 9300 str r3, [sp, #0] 80023a0: 2300 movs r3, #0 80023a2: 2100 movs r1, #0 80023a4: 2004 movs r0, #4 80023a6: f001 fb65 bl 8003a74 stCiclo=omapertura13; 80023aa: 4b70 ldr r3, [pc, #448] @ (800256c ) 80023ac: 221f movs r2, #31 80023ae: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80023b0: 4b6f ldr r3, [pc, #444] @ (8002570 ) 80023b2: 881b ldrh r3, [r3, #0] 80023b4: f003 0302 and.w r3, r3, #2 80023b8: 2b00 cmp r3, #0 80023ba: f000 844e beq.w 8002c5a 80023be: 4b6b ldr r3, [pc, #428] @ (800256c ) 80023c0: 2221 movs r2, #33 @ 0x21 80023c2: 701a strb r2, [r3, #0] break; 80023c4: f000 bc49 b.w 8002c5a case omapertura13: if(ramp(M4,FW,m4pwmap,0,tramp,RAMPRUN)==DONE){ 80023c8: 4b66 ldr r3, [pc, #408] @ (8002564 ) 80023ca: 881b ldrh r3, [r3, #0] 80023cc: b2da uxtb r2, r3 80023ce: 4b66 ldr r3, [pc, #408] @ (8002568 ) 80023d0: 881b ldrh r3, [r3, #0] 80023d2: b2db uxtb r3, r3 80023d4: 210a movs r1, #10 80023d6: 9101 str r1, [sp, #4] 80023d8: 9300 str r3, [sp, #0] 80023da: 2300 movs r3, #0 80023dc: 2100 movs r1, #0 80023de: 2004 movs r0, #4 80023e0: f001 fb48 bl 8003a74 80023e4: 4603 mov r3, r0 80023e6: 2b00 cmp r3, #0 80023e8: d106 bne.n 80023f8 rtCiclo=twap; 80023ea: 4b63 ldr r3, [pc, #396] @ (8002578 ) 80023ec: 881a ldrh r2, [r3, #0] 80023ee: 4b5b ldr r3, [pc, #364] @ (800255c ) 80023f0: 801a strh r2, [r3, #0] stCiclo=omapertura14; 80023f2: 4b5e ldr r3, [pc, #376] @ (800256c ) 80023f4: 2220 movs r2, #32 80023f6: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80023f8: 4b5d ldr r3, [pc, #372] @ (8002570 ) 80023fa: 881b ldrh r3, [r3, #0] 80023fc: f003 0302 and.w r3, r3, #2 8002400: 2b00 cmp r3, #0 8002402: f000 842c beq.w 8002c5e 8002406: 4b59 ldr r3, [pc, #356] @ (800256c ) 8002408: 2221 movs r2, #33 @ 0x21 800240a: 701a strb r2, [r3, #0] break; 800240c: f000 bc27 b.w 8002c5e case omapertura14: if((rtCiclo==0)&&(pulsanti==0)){ 8002410: 4b52 ldr r3, [pc, #328] @ (800255c ) 8002412: 881b ldrh r3, [r3, #0] 8002414: b29b uxth r3, r3 8002416: 2b00 cmp r3, #0 8002418: d109 bne.n 800242e 800241a: 4b58 ldr r3, [pc, #352] @ (800257c ) 800241c: 781b ldrb r3, [r3, #0] 800241e: 2b00 cmp r3, #0 8002420: d105 bne.n 800242e stBuz=bzoff; 8002422: 4b57 ldr r3, [pc, #348] @ (8002580 ) 8002424: 2200 movs r2, #0 8002426: 701a strb r2, [r3, #0] stCiclo=omaperto; 8002428: 4b50 ldr r3, [pc, #320] @ (800256c ) 800242a: 2222 movs r2, #34 @ 0x22 800242c: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800242e: 4b50 ldr r3, [pc, #320] @ (8002570 ) 8002430: 881b ldrh r3, [r3, #0] 8002432: f003 0302 and.w r3, r3, #2 8002436: 2b00 cmp r3, #0 8002438: f000 8413 beq.w 8002c62 800243c: 4b4b ldr r3, [pc, #300] @ (800256c ) 800243e: 2221 movs r2, #33 @ 0x21 8002440: 701a strb r2, [r3, #0] break; 8002442: f000 bc0e b.w 8002c62 case omstopapertura: SetMotPerc(M1,FW,0); 8002446: 2200 movs r2, #0 8002448: 2100 movs r1, #0 800244a: 2001 movs r0, #1 800244c: f001 f992 bl 8003774 SetMotPerc(M2,FW,0); 8002450: 2200 movs r2, #0 8002452: 2100 movs r1, #0 8002454: 2002 movs r0, #2 8002456: f001 f98d bl 8003774 SetMotPerc(M3,FW,0); 800245a: 2200 movs r2, #0 800245c: 2100 movs r1, #0 800245e: 2003 movs r0, #3 8002460: f001 f988 bl 8003774 SetMotPerc(M4,FW,0); 8002464: 2200 movs r2, #0 8002466: 2100 movs r1, #0 8002468: 2004 movs r0, #4 800246a: f001 f983 bl 8003774 if(pulsanti==0){ 800246e: 4b43 ldr r3, [pc, #268] @ (800257c ) 8002470: 781b ldrb r3, [r3, #0] 8002472: 2b00 cmp r3, #0 8002474: f040 83f7 bne.w 8002c66 stBuz=bzoff; 8002478: 4b41 ldr r3, [pc, #260] @ (8002580 ) 800247a: 2200 movs r2, #0 800247c: 701a strb r2, [r3, #0] stCiclo=omchiuso; 800247e: 4b3b ldr r3, [pc, #236] @ (800256c ) 8002480: 2200 movs r2, #0 8002482: 701a strb r2, [r3, #0] stPulsanti&=(~P1STOP); 8002484: 4b3a ldr r3, [pc, #232] @ (8002570 ) 8002486: 881b ldrh r3, [r3, #0] 8002488: f023 0302 bic.w r3, r3, #2 800248c: b29a uxth r2, r3 800248e: 4b38 ldr r3, [pc, #224] @ (8002570 ) 8002490: 801a strh r2, [r3, #0] } break; 8002492: e3e8 b.n 8002c66 case omaperto: if(stPulsanti&P1START){ 8002494: 4b36 ldr r3, [pc, #216] @ (8002570 ) 8002496: 881b ldrh r3, [r3, #0] 8002498: f003 0301 and.w r3, r3, #1 800249c: 2b00 cmp r3, #0 800249e: d016 beq.n 80024ce stBuz=bzmoving; 80024a0: 4b37 ldr r3, [pc, #220] @ (8002580 ) 80024a2: 2201 movs r2, #1 80024a4: 701a strb r2, [r3, #0] (void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT); 80024a6: 4b2e ldr r3, [pc, #184] @ (8002560 ) 80024a8: 881b ldrh r3, [r3, #0] 80024aa: b2da uxtb r2, r3 80024ac: 4b35 ldr r3, [pc, #212] @ (8002584 ) 80024ae: 881b ldrh r3, [r3, #0] 80024b0: b2d9 uxtb r1, r3 80024b2: 4b2d ldr r3, [pc, #180] @ (8002568 ) 80024b4: 881b ldrh r3, [r3, #0] 80024b6: b2db uxtb r3, r3 80024b8: 2000 movs r0, #0 80024ba: 9001 str r0, [sp, #4] 80024bc: 9300 str r3, [sp, #0] 80024be: 460b mov r3, r1 80024c0: 2101 movs r1, #1 80024c2: 2001 movs r0, #1 80024c4: f001 fad6 bl 8003a74 stCiclo=omchiusura1; 80024c8: 4b28 ldr r3, [pc, #160] @ (800256c ) 80024ca: 2223 movs r2, #35 @ 0x23 80024cc: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80024ce: 4b28 ldr r3, [pc, #160] @ (8002570 ) 80024d0: 881b ldrh r3, [r3, #0] 80024d2: f003 0302 and.w r3, r3, #2 80024d6: 2b00 cmp r3, #0 80024d8: d003 beq.n 80024e2 80024da: 4b24 ldr r3, [pc, #144] @ (800256c ) 80024dc: 2231 movs r2, #49 @ 0x31 80024de: 701a strb r2, [r3, #0] }else if(stPulsanti&M4BW){ stBuz=bzmoving; (void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); stCiclo=omM4bw1; } break; 80024e0: e3c3 b.n 8002c6a else if(stPulsanti&M1FW){ 80024e2: 4b23 ldr r3, [pc, #140] @ (8002570 ) 80024e4: 881b ldrh r3, [r3, #0] 80024e6: f003 0310 and.w r3, r3, #16 80024ea: 2b00 cmp r3, #0 80024ec: d017 beq.n 800251e stBuz=bzmoving; 80024ee: 4b24 ldr r3, [pc, #144] @ (8002580 ) 80024f0: 2201 movs r2, #1 80024f2: 701a strb r2, [r3, #0] (void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT); 80024f4: 4b1a ldr r3, [pc, #104] @ (8002560 ) 80024f6: 881b ldrh r3, [r3, #0] 80024f8: b2da uxtb r2, r3 80024fa: 4b23 ldr r3, [pc, #140] @ (8002588 ) 80024fc: 881b ldrh r3, [r3, #0] 80024fe: b2d9 uxtb r1, r3 8002500: 4b22 ldr r3, [pc, #136] @ (800258c ) 8002502: 881b ldrh r3, [r3, #0] 8002504: b2db uxtb r3, r3 8002506: 2000 movs r0, #0 8002508: 9001 str r0, [sp, #4] 800250a: 9300 str r3, [sp, #0] 800250c: 460b mov r3, r1 800250e: 2100 movs r1, #0 8002510: 2001 movs r0, #1 8002512: f001 faaf bl 8003a74 stCiclo=omM1fw1; 8002516: 4b15 ldr r3, [pc, #84] @ (800256c ) 8002518: 2201 movs r2, #1 800251a: 701a strb r2, [r3, #0] break; 800251c: e3a5 b.n 8002c6a }else if(stPulsanti&M1BW){ 800251e: 4b14 ldr r3, [pc, #80] @ (8002570 ) 8002520: 881b ldrh r3, [r3, #0] 8002522: f003 0320 and.w r3, r3, #32 8002526: 2b00 cmp r3, #0 8002528: d032 beq.n 8002590 stBuz=bzmoving; 800252a: 4b15 ldr r3, [pc, #84] @ (8002580 ) 800252c: 2201 movs r2, #1 800252e: 701a strb r2, [r3, #0] (void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT); 8002530: 4b0b ldr r3, [pc, #44] @ (8002560 ) 8002532: 881b ldrh r3, [r3, #0] 8002534: b2da uxtb r2, r3 8002536: 4b14 ldr r3, [pc, #80] @ (8002588 ) 8002538: 881b ldrh r3, [r3, #0] 800253a: b2d9 uxtb r1, r3 800253c: 4b13 ldr r3, [pc, #76] @ (800258c ) 800253e: 881b ldrh r3, [r3, #0] 8002540: b2db uxtb r3, r3 8002542: 2000 movs r0, #0 8002544: 9001 str r0, [sp, #4] 8002546: 9300 str r3, [sp, #0] 8002548: 460b mov r3, r1 800254a: 2101 movs r1, #1 800254c: 2001 movs r0, #1 800254e: f001 fa91 bl 8003a74 stCiclo=omM1bw1; 8002552: 4b06 ldr r3, [pc, #24] @ (800256c ) 8002554: 2203 movs r2, #3 8002556: 701a strb r2, [r3, #0] break; 8002558: e387 b.n 8002c6a 800255a: bf00 nop 800255c: 200003f4 .word 0x200003f4 8002560: 20000428 .word 0x20000428 8002564: 20000402 .word 0x20000402 8002568: 2000041a .word 0x2000041a 800256c: 20000432 .word 0x20000432 8002570: 20000430 .word 0x20000430 8002574: 2000040c .word 0x2000040c 8002578: 2000040e .word 0x2000040e 800257c: 200003e8 .word 0x200003e8 8002580: 20000433 .word 0x20000433 8002584: 200003f8 .word 0x200003f8 8002588: 20000420 .word 0x20000420 800258c: 2000041e .word 0x2000041e }else if(stPulsanti&M2FW){ 8002590: 4b92 ldr r3, [pc, #584] @ (80027dc ) 8002592: 881b ldrh r3, [r3, #0] 8002594: f003 0340 and.w r3, r3, #64 @ 0x40 8002598: 2b00 cmp r3, #0 800259a: d017 beq.n 80025cc stBuz=bzmoving; 800259c: 4b90 ldr r3, [pc, #576] @ (80027e0 ) 800259e: 2201 movs r2, #1 80025a0: 701a strb r2, [r3, #0] (void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT); 80025a2: 4b90 ldr r3, [pc, #576] @ (80027e4 ) 80025a4: 885b ldrh r3, [r3, #2] 80025a6: b2da uxtb r2, r3 80025a8: 4b8f ldr r3, [pc, #572] @ (80027e8 ) 80025aa: 881b ldrh r3, [r3, #0] 80025ac: b2d9 uxtb r1, r3 80025ae: 4b8f ldr r3, [pc, #572] @ (80027ec ) 80025b0: 881b ldrh r3, [r3, #0] 80025b2: b2db uxtb r3, r3 80025b4: 2000 movs r0, #0 80025b6: 9001 str r0, [sp, #4] 80025b8: 9300 str r3, [sp, #0] 80025ba: 460b mov r3, r1 80025bc: 2100 movs r1, #0 80025be: 2002 movs r0, #2 80025c0: f001 fa58 bl 8003a74 stCiclo=omM2fw1; 80025c4: 4b8a ldr r3, [pc, #552] @ (80027f0 ) 80025c6: 2205 movs r2, #5 80025c8: 701a strb r2, [r3, #0] break; 80025ca: e34e b.n 8002c6a }else if(stPulsanti&M2BW){ 80025cc: 4b83 ldr r3, [pc, #524] @ (80027dc ) 80025ce: 881b ldrh r3, [r3, #0] 80025d0: f003 0380 and.w r3, r3, #128 @ 0x80 80025d4: 2b00 cmp r3, #0 80025d6: d017 beq.n 8002608 stBuz=bzmoving; 80025d8: 4b81 ldr r3, [pc, #516] @ (80027e0 ) 80025da: 2201 movs r2, #1 80025dc: 701a strb r2, [r3, #0] (void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT); 80025de: 4b81 ldr r3, [pc, #516] @ (80027e4 ) 80025e0: 885b ldrh r3, [r3, #2] 80025e2: b2da uxtb r2, r3 80025e4: 4b80 ldr r3, [pc, #512] @ (80027e8 ) 80025e6: 881b ldrh r3, [r3, #0] 80025e8: b2d9 uxtb r1, r3 80025ea: 4b80 ldr r3, [pc, #512] @ (80027ec ) 80025ec: 881b ldrh r3, [r3, #0] 80025ee: b2db uxtb r3, r3 80025f0: 2000 movs r0, #0 80025f2: 9001 str r0, [sp, #4] 80025f4: 9300 str r3, [sp, #0] 80025f6: 460b mov r3, r1 80025f8: 2101 movs r1, #1 80025fa: 2002 movs r0, #2 80025fc: f001 fa3a bl 8003a74 stCiclo=omM2bw1; 8002600: 4b7b ldr r3, [pc, #492] @ (80027f0 ) 8002602: 2207 movs r2, #7 8002604: 701a strb r2, [r3, #0] break; 8002606: e330 b.n 8002c6a }else if(stPulsanti&M3FW){ 8002608: 4b74 ldr r3, [pc, #464] @ (80027dc ) 800260a: 881b ldrh r3, [r3, #0] 800260c: f403 7380 and.w r3, r3, #256 @ 0x100 8002610: 2b00 cmp r3, #0 8002612: d017 beq.n 8002644 stBuz=bzmoving; 8002614: 4b72 ldr r3, [pc, #456] @ (80027e0 ) 8002616: 2201 movs r2, #1 8002618: 701a strb r2, [r3, #0] (void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT); 800261a: 4b72 ldr r3, [pc, #456] @ (80027e4 ) 800261c: 889b ldrh r3, [r3, #4] 800261e: b2da uxtb r2, r3 8002620: 4b74 ldr r3, [pc, #464] @ (80027f4 ) 8002622: 881b ldrh r3, [r3, #0] 8002624: b2d9 uxtb r1, r3 8002626: 4b71 ldr r3, [pc, #452] @ (80027ec ) 8002628: 881b ldrh r3, [r3, #0] 800262a: b2db uxtb r3, r3 800262c: 2000 movs r0, #0 800262e: 9001 str r0, [sp, #4] 8002630: 9300 str r3, [sp, #0] 8002632: 460b mov r3, r1 8002634: 2100 movs r1, #0 8002636: 2003 movs r0, #3 8002638: f001 fa1c bl 8003a74 stCiclo=omM3fw1; 800263c: 4b6c ldr r3, [pc, #432] @ (80027f0 ) 800263e: 2209 movs r2, #9 8002640: 701a strb r2, [r3, #0] break; 8002642: e312 b.n 8002c6a }else if(stPulsanti&M3BW){ 8002644: 4b65 ldr r3, [pc, #404] @ (80027dc ) 8002646: 881b ldrh r3, [r3, #0] 8002648: f403 7300 and.w r3, r3, #512 @ 0x200 800264c: 2b00 cmp r3, #0 800264e: d017 beq.n 8002680 stBuz=bzmoving; 8002650: 4b63 ldr r3, [pc, #396] @ (80027e0 ) 8002652: 2201 movs r2, #1 8002654: 701a strb r2, [r3, #0] (void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT); 8002656: 4b63 ldr r3, [pc, #396] @ (80027e4 ) 8002658: 889b ldrh r3, [r3, #4] 800265a: b2da uxtb r2, r3 800265c: 4b65 ldr r3, [pc, #404] @ (80027f4 ) 800265e: 881b ldrh r3, [r3, #0] 8002660: b2d9 uxtb r1, r3 8002662: 4b62 ldr r3, [pc, #392] @ (80027ec ) 8002664: 881b ldrh r3, [r3, #0] 8002666: b2db uxtb r3, r3 8002668: 2000 movs r0, #0 800266a: 9001 str r0, [sp, #4] 800266c: 9300 str r3, [sp, #0] 800266e: 460b mov r3, r1 8002670: 2101 movs r1, #1 8002672: 2003 movs r0, #3 8002674: f001 f9fe bl 8003a74 stCiclo=omM3bw1; 8002678: 4b5d ldr r3, [pc, #372] @ (80027f0 ) 800267a: 220b movs r2, #11 800267c: 701a strb r2, [r3, #0] break; 800267e: e2f4 b.n 8002c6a }else if(stPulsanti&M4FW){ 8002680: 4b56 ldr r3, [pc, #344] @ (80027dc ) 8002682: 881b ldrh r3, [r3, #0] 8002684: f403 6380 and.w r3, r3, #1024 @ 0x400 8002688: 2b00 cmp r3, #0 800268a: d017 beq.n 80026bc stBuz=bzmoving; 800268c: 4b54 ldr r3, [pc, #336] @ (80027e0 ) 800268e: 2201 movs r2, #1 8002690: 701a strb r2, [r3, #0] (void)ramp(M4,FW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); 8002692: 4b54 ldr r3, [pc, #336] @ (80027e4 ) 8002694: 88db ldrh r3, [r3, #6] 8002696: b2da uxtb r2, r3 8002698: 4b56 ldr r3, [pc, #344] @ (80027f4 ) 800269a: 881b ldrh r3, [r3, #0] 800269c: b2d9 uxtb r1, r3 800269e: 4b53 ldr r3, [pc, #332] @ (80027ec ) 80026a0: 881b ldrh r3, [r3, #0] 80026a2: b2db uxtb r3, r3 80026a4: 2000 movs r0, #0 80026a6: 9001 str r0, [sp, #4] 80026a8: 9300 str r3, [sp, #0] 80026aa: 460b mov r3, r1 80026ac: 2100 movs r1, #0 80026ae: 2004 movs r0, #4 80026b0: f001 f9e0 bl 8003a74 stCiclo=omM4fw1; 80026b4: 4b4e ldr r3, [pc, #312] @ (80027f0 ) 80026b6: 220d movs r2, #13 80026b8: 701a strb r2, [r3, #0] break; 80026ba: e2d6 b.n 8002c6a }else if(stPulsanti&M4BW){ 80026bc: 4b47 ldr r3, [pc, #284] @ (80027dc ) 80026be: 881b ldrh r3, [r3, #0] 80026c0: f403 6300 and.w r3, r3, #2048 @ 0x800 80026c4: 2b00 cmp r3, #0 80026c6: f000 82d0 beq.w 8002c6a stBuz=bzmoving; 80026ca: 4b45 ldr r3, [pc, #276] @ (80027e0 ) 80026cc: 2201 movs r2, #1 80026ce: 701a strb r2, [r3, #0] (void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); 80026d0: 4b44 ldr r3, [pc, #272] @ (80027e4 ) 80026d2: 88db ldrh r3, [r3, #6] 80026d4: b2da uxtb r2, r3 80026d6: 4b47 ldr r3, [pc, #284] @ (80027f4 ) 80026d8: 881b ldrh r3, [r3, #0] 80026da: b2d9 uxtb r1, r3 80026dc: 4b43 ldr r3, [pc, #268] @ (80027ec ) 80026de: 881b ldrh r3, [r3, #0] 80026e0: b2db uxtb r3, r3 80026e2: 2000 movs r0, #0 80026e4: 9001 str r0, [sp, #4] 80026e6: 9300 str r3, [sp, #0] 80026e8: 460b mov r3, r1 80026ea: 2101 movs r1, #1 80026ec: 2004 movs r0, #4 80026ee: f001 f9c1 bl 8003a74 stCiclo=omM4bw1; 80026f2: 4b3f ldr r3, [pc, #252] @ (80027f0 ) 80026f4: 220f movs r2, #15 80026f6: 701a strb r2, [r3, #0] break; 80026f8: e2b7 b.n 8002c6a case omchiusura1: if(ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){ 80026fa: 4b3a ldr r3, [pc, #232] @ (80027e4 ) 80026fc: 881b ldrh r3, [r3, #0] 80026fe: b2da uxtb r2, r3 8002700: 4b3d ldr r3, [pc, #244] @ (80027f8 ) 8002702: 881b ldrh r3, [r3, #0] 8002704: b2d9 uxtb r1, r3 8002706: 4b3d ldr r3, [pc, #244] @ (80027fc ) 8002708: 881b ldrh r3, [r3, #0] 800270a: b2db uxtb r3, r3 800270c: 200a movs r0, #10 800270e: 9001 str r0, [sp, #4] 8002710: 9300 str r3, [sp, #0] 8002712: 460b mov r3, r1 8002714: 2101 movs r1, #1 8002716: 2001 movs r0, #1 8002718: f001 f9ac bl 8003a74 800271c: 4603 mov r3, r0 800271e: 2b00 cmp r3, #0 8002720: d106 bne.n 8002730 rtCiclo=t4ch; 8002722: 4b37 ldr r3, [pc, #220] @ (8002800 ) 8002724: 881a ldrh r2, [r3, #0] 8002726: 4b37 ldr r3, [pc, #220] @ (8002804 ) 8002728: 801a strh r2, [r3, #0] stCiclo=omchiusura2; 800272a: 4b31 ldr r3, [pc, #196] @ (80027f0 ) 800272c: 2224 movs r2, #36 @ 0x24 800272e: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002730: 4b2a ldr r3, [pc, #168] @ (80027dc ) 8002732: 881b ldrh r3, [r3, #0] 8002734: f003 0302 and.w r3, r3, #2 8002738: 2b00 cmp r3, #0 800273a: f000 8298 beq.w 8002c6e 800273e: 4b2c ldr r3, [pc, #176] @ (80027f0 ) 8002740: 2231 movs r2, #49 @ 0x31 8002742: 701a strb r2, [r3, #0] break; 8002744: e293 b.n 8002c6e case omchiusura2: if(rtCiclo==0){ 8002746: 4b2f ldr r3, [pc, #188] @ (8002804 ) 8002748: 881b ldrh r3, [r3, #0] 800274a: b29b uxth r3, r3 800274c: 2b00 cmp r3, #0 800274e: d113 bne.n 8002778 (void)ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPINIT); 8002750: 4b24 ldr r3, [pc, #144] @ (80027e4 ) 8002752: 889b ldrh r3, [r3, #4] 8002754: b2da uxtb r2, r3 8002756: 4b2c ldr r3, [pc, #176] @ (8002808 ) 8002758: 881b ldrh r3, [r3, #0] 800275a: b2d9 uxtb r1, r3 800275c: 4b27 ldr r3, [pc, #156] @ (80027fc ) 800275e: 881b ldrh r3, [r3, #0] 8002760: b2db uxtb r3, r3 8002762: 2000 movs r0, #0 8002764: 9001 str r0, [sp, #4] 8002766: 9300 str r3, [sp, #0] 8002768: 460b mov r3, r1 800276a: 2101 movs r1, #1 800276c: 2003 movs r0, #3 800276e: f001 f981 bl 8003a74 stCiclo=omchiusura3; 8002772: 4b1f ldr r3, [pc, #124] @ (80027f0 ) 8002774: 2225 movs r2, #37 @ 0x25 8002776: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002778: 4b18 ldr r3, [pc, #96] @ (80027dc ) 800277a: 881b ldrh r3, [r3, #0] 800277c: f003 0302 and.w r3, r3, #2 8002780: 2b00 cmp r3, #0 8002782: f000 8276 beq.w 8002c72 8002786: 4b1a ldr r3, [pc, #104] @ (80027f0 ) 8002788: 2231 movs r2, #49 @ 0x31 800278a: 701a strb r2, [r3, #0] break; 800278c: e271 b.n 8002c72 case omchiusura3: if(ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){ 800278e: 4b15 ldr r3, [pc, #84] @ (80027e4 ) 8002790: 889b ldrh r3, [r3, #4] 8002792: b2da uxtb r2, r3 8002794: 4b1c ldr r3, [pc, #112] @ (8002808 ) 8002796: 881b ldrh r3, [r3, #0] 8002798: b2d9 uxtb r1, r3 800279a: 4b18 ldr r3, [pc, #96] @ (80027fc ) 800279c: 881b ldrh r3, [r3, #0] 800279e: b2db uxtb r3, r3 80027a0: 200a movs r0, #10 80027a2: 9001 str r0, [sp, #4] 80027a4: 9300 str r3, [sp, #0] 80027a6: 460b mov r3, r1 80027a8: 2101 movs r1, #1 80027aa: 2003 movs r0, #3 80027ac: f001 f962 bl 8003a74 80027b0: 4603 mov r3, r0 80027b2: 2b00 cmp r3, #0 80027b4: d106 bne.n 80027c4 rtCiclo=t1ch; 80027b6: 4b15 ldr r3, [pc, #84] @ (800280c ) 80027b8: 881a ldrh r2, [r3, #0] 80027ba: 4b12 ldr r3, [pc, #72] @ (8002804 ) 80027bc: 801a strh r2, [r3, #0] stCiclo=omchiusura4; 80027be: 4b0c ldr r3, [pc, #48] @ (80027f0 ) 80027c0: 2226 movs r2, #38 @ 0x26 80027c2: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80027c4: 4b05 ldr r3, [pc, #20] @ (80027dc ) 80027c6: 881b ldrh r3, [r3, #0] 80027c8: f003 0302 and.w r3, r3, #2 80027cc: 2b00 cmp r3, #0 80027ce: f000 8252 beq.w 8002c76 80027d2: 4b07 ldr r3, [pc, #28] @ (80027f0 ) 80027d4: 2231 movs r2, #49 @ 0x31 80027d6: 701a strb r2, [r3, #0] break; 80027d8: e24d b.n 8002c76 80027da: bf00 nop 80027dc: 20000430 .word 0x20000430 80027e0: 20000433 .word 0x20000433 80027e4: 20000428 .word 0x20000428 80027e8: 20000422 .word 0x20000422 80027ec: 2000041e .word 0x2000041e 80027f0: 20000432 .word 0x20000432 80027f4: 20000424 .word 0x20000424 80027f8: 200003f8 .word 0x200003f8 80027fc: 2000041a .word 0x2000041a 8002800: 20000416 .word 0x20000416 8002804: 200003f4 .word 0x200003f4 8002808: 20000400 .word 0x20000400 800280c: 20000410 .word 0x20000410 case omchiusura4: if(rtCiclo==0){ 8002810: 4b9b ldr r3, [pc, #620] @ (8002a80 ) 8002812: 881b ldrh r3, [r3, #0] 8002814: b29b uxth r3, r3 8002816: 2b00 cmp r3, #0 8002818: d11e bne.n 8002858 (void)ramp(M3,BW,m3pwmch,0,tramp,RAMPINIT); 800281a: 4b9a ldr r3, [pc, #616] @ (8002a84 ) 800281c: 881b ldrh r3, [r3, #0] 800281e: b2da uxtb r2, r3 8002820: 4b99 ldr r3, [pc, #612] @ (8002a88 ) 8002822: 881b ldrh r3, [r3, #0] 8002824: b2db uxtb r3, r3 8002826: 2100 movs r1, #0 8002828: 9101 str r1, [sp, #4] 800282a: 9300 str r3, [sp, #0] 800282c: 2300 movs r3, #0 800282e: 2101 movs r1, #1 8002830: 2003 movs r0, #3 8002832: f001 f91f bl 8003a74 (void)ramp(M1,BW,m1pwmch,0,tramp,RAMPINIT); 8002836: 4b95 ldr r3, [pc, #596] @ (8002a8c ) 8002838: 881b ldrh r3, [r3, #0] 800283a: b2da uxtb r2, r3 800283c: 4b92 ldr r3, [pc, #584] @ (8002a88 ) 800283e: 881b ldrh r3, [r3, #0] 8002840: b2db uxtb r3, r3 8002842: 2100 movs r1, #0 8002844: 9101 str r1, [sp, #4] 8002846: 9300 str r3, [sp, #0] 8002848: 2300 movs r3, #0 800284a: 2101 movs r1, #1 800284c: 2001 movs r0, #1 800284e: f001 f911 bl 8003a74 stCiclo=omchiusura5; 8002852: 4b8f ldr r3, [pc, #572] @ (8002a90 ) 8002854: 2227 movs r2, #39 @ 0x27 8002856: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002858: 4b8e ldr r3, [pc, #568] @ (8002a94 ) 800285a: 881b ldrh r3, [r3, #0] 800285c: f003 0302 and.w r3, r3, #2 8002860: 2b00 cmp r3, #0 8002862: f000 820a beq.w 8002c7a 8002866: 4b8a ldr r3, [pc, #552] @ (8002a90 ) 8002868: 2231 movs r2, #49 @ 0x31 800286a: 701a strb r2, [r3, #0] break; 800286c: e205 b.n 8002c7a case omchiusura5: if((ramp(M3,BW,m3pwmch,0,tramp,RAMPRUN)==DONE)&&(ramp(M1,BW,m1pwmch,0,tramp,RAMPRUN)==DONE)){ 800286e: 4b85 ldr r3, [pc, #532] @ (8002a84 ) 8002870: 881b ldrh r3, [r3, #0] 8002872: b2da uxtb r2, r3 8002874: 4b84 ldr r3, [pc, #528] @ (8002a88 ) 8002876: 881b ldrh r3, [r3, #0] 8002878: b2db uxtb r3, r3 800287a: 210a movs r1, #10 800287c: 9101 str r1, [sp, #4] 800287e: 9300 str r3, [sp, #0] 8002880: 2300 movs r3, #0 8002882: 2101 movs r1, #1 8002884: 2003 movs r0, #3 8002886: f001 f8f5 bl 8003a74 800288a: 4603 mov r3, r0 800288c: 2b00 cmp r3, #0 800288e: d117 bne.n 80028c0 8002890: 4b7e ldr r3, [pc, #504] @ (8002a8c ) 8002892: 881b ldrh r3, [r3, #0] 8002894: b2da uxtb r2, r3 8002896: 4b7c ldr r3, [pc, #496] @ (8002a88 ) 8002898: 881b ldrh r3, [r3, #0] 800289a: b2db uxtb r3, r3 800289c: 210a movs r1, #10 800289e: 9101 str r1, [sp, #4] 80028a0: 9300 str r3, [sp, #0] 80028a2: 2300 movs r3, #0 80028a4: 2101 movs r1, #1 80028a6: 2001 movs r0, #1 80028a8: f001 f8e4 bl 8003a74 80028ac: 4603 mov r3, r0 80028ae: 2b00 cmp r3, #0 80028b0: d106 bne.n 80028c0 rtCiclo=twch; 80028b2: 4b79 ldr r3, [pc, #484] @ (8002a98 ) 80028b4: 881a ldrh r2, [r3, #0] 80028b6: 4b72 ldr r3, [pc, #456] @ (8002a80 ) 80028b8: 801a strh r2, [r3, #0] stCiclo=omchiusura6; 80028ba: 4b75 ldr r3, [pc, #468] @ (8002a90 ) 80028bc: 2228 movs r2, #40 @ 0x28 80028be: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80028c0: 4b74 ldr r3, [pc, #464] @ (8002a94 ) 80028c2: 881b ldrh r3, [r3, #0] 80028c4: f003 0302 and.w r3, r3, #2 80028c8: 2b00 cmp r3, #0 80028ca: f000 81d8 beq.w 8002c7e 80028ce: 4b70 ldr r3, [pc, #448] @ (8002a90 ) 80028d0: 2231 movs r2, #49 @ 0x31 80028d2: 701a strb r2, [r3, #0] break; 80028d4: e1d3 b.n 8002c7e case omchiusura6: if(rtCiclo==0){ 80028d6: 4b6a ldr r3, [pc, #424] @ (8002a80 ) 80028d8: 881b ldrh r3, [r3, #0] 80028da: b29b uxth r3, r3 80028dc: 2b00 cmp r3, #0 80028de: d124 bne.n 800292a (void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT); 80028e0: 4b6e ldr r3, [pc, #440] @ (8002a9c ) 80028e2: 885b ldrh r3, [r3, #2] 80028e4: b2da uxtb r2, r3 80028e6: 4b6e ldr r3, [pc, #440] @ (8002aa0 ) 80028e8: 881b ldrh r3, [r3, #0] 80028ea: b2d9 uxtb r1, r3 80028ec: 4b66 ldr r3, [pc, #408] @ (8002a88 ) 80028ee: 881b ldrh r3, [r3, #0] 80028f0: b2db uxtb r3, r3 80028f2: 2000 movs r0, #0 80028f4: 9001 str r0, [sp, #4] 80028f6: 9300 str r3, [sp, #0] 80028f8: 460b mov r3, r1 80028fa: 2100 movs r1, #0 80028fc: 2002 movs r0, #2 80028fe: f001 f8b9 bl 8003a74 (void)ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT); 8002902: 4b66 ldr r3, [pc, #408] @ (8002a9c ) 8002904: 88db ldrh r3, [r3, #6] 8002906: b2da uxtb r2, r3 8002908: 4b66 ldr r3, [pc, #408] @ (8002aa4 ) 800290a: 881b ldrh r3, [r3, #0] 800290c: b2d9 uxtb r1, r3 800290e: 4b5e ldr r3, [pc, #376] @ (8002a88 ) 8002910: 881b ldrh r3, [r3, #0] 8002912: b2db uxtb r3, r3 8002914: 2000 movs r0, #0 8002916: 9001 str r0, [sp, #4] 8002918: 9300 str r3, [sp, #0] 800291a: 460b mov r3, r1 800291c: 2101 movs r1, #1 800291e: 2004 movs r0, #4 8002920: f001 f8a8 bl 8003a74 stCiclo=omchiusura7; 8002924: 4b5a ldr r3, [pc, #360] @ (8002a90 ) 8002926: 2229 movs r2, #41 @ 0x29 8002928: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 800292a: 4b5a ldr r3, [pc, #360] @ (8002a94 ) 800292c: 881b ldrh r3, [r3, #0] 800292e: f003 0302 and.w r3, r3, #2 8002932: 2b00 cmp r3, #0 8002934: f000 81a5 beq.w 8002c82 8002938: 4b55 ldr r3, [pc, #340] @ (8002a90 ) 800293a: 2231 movs r2, #49 @ 0x31 800293c: 701a strb r2, [r3, #0] break; 800293e: e1a0 b.n 8002c82 case omchiusura7: if((ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE)&&(ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE)){ 8002940: 4b56 ldr r3, [pc, #344] @ (8002a9c ) 8002942: 885b ldrh r3, [r3, #2] 8002944: b2da uxtb r2, r3 8002946: 4b56 ldr r3, [pc, #344] @ (8002aa0 ) 8002948: 881b ldrh r3, [r3, #0] 800294a: b2d9 uxtb r1, r3 800294c: 4b4e ldr r3, [pc, #312] @ (8002a88 ) 800294e: 881b ldrh r3, [r3, #0] 8002950: b2db uxtb r3, r3 8002952: 200a movs r0, #10 8002954: 9001 str r0, [sp, #4] 8002956: 9300 str r3, [sp, #0] 8002958: 460b mov r3, r1 800295a: 2100 movs r1, #0 800295c: 2002 movs r0, #2 800295e: f001 f889 bl 8003a74 8002962: 4603 mov r3, r0 8002964: 2b00 cmp r3, #0 8002966: d11a bne.n 800299e 8002968: 4b4c ldr r3, [pc, #304] @ (8002a9c ) 800296a: 88db ldrh r3, [r3, #6] 800296c: b2da uxtb r2, r3 800296e: 4b4d ldr r3, [pc, #308] @ (8002aa4 ) 8002970: 881b ldrh r3, [r3, #0] 8002972: b2d9 uxtb r1, r3 8002974: 4b44 ldr r3, [pc, #272] @ (8002a88 ) 8002976: 881b ldrh r3, [r3, #0] 8002978: b2db uxtb r3, r3 800297a: 200a movs r0, #10 800297c: 9001 str r0, [sp, #4] 800297e: 9300 str r3, [sp, #0] 8002980: 460b mov r3, r1 8002982: 2101 movs r1, #1 8002984: 2004 movs r0, #4 8002986: f001 f875 bl 8003a74 800298a: 4603 mov r3, r0 800298c: 2b00 cmp r3, #0 800298e: d106 bne.n 800299e rtCiclo=t3ch; 8002990: 4b45 ldr r3, [pc, #276] @ (8002aa8 ) 8002992: 881a ldrh r2, [r3, #0] 8002994: 4b3a ldr r3, [pc, #232] @ (8002a80 ) 8002996: 801a strh r2, [r3, #0] stCiclo=omchiusura8; 8002998: 4b3d ldr r3, [pc, #244] @ (8002a90 ) 800299a: 222a movs r2, #42 @ 0x2a 800299c: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 800299e: 4b3d ldr r3, [pc, #244] @ (8002a94 ) 80029a0: 881b ldrh r3, [r3, #0] 80029a2: f003 0302 and.w r3, r3, #2 80029a6: 2b00 cmp r3, #0 80029a8: f000 816d beq.w 8002c86 80029ac: 4b38 ldr r3, [pc, #224] @ (8002a90 ) 80029ae: 2231 movs r2, #49 @ 0x31 80029b0: 701a strb r2, [r3, #0] break; 80029b2: e168 b.n 8002c86 case omchiusura8: if(rtCiclo==0){ 80029b4: 4b32 ldr r3, [pc, #200] @ (8002a80 ) 80029b6: 881b ldrh r3, [r3, #0] 80029b8: b29b uxth r3, r3 80029ba: 2b00 cmp r3, #0 80029bc: d110 bne.n 80029e0 (void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT); 80029be: 4b38 ldr r3, [pc, #224] @ (8002aa0 ) 80029c0: 881b ldrh r3, [r3, #0] 80029c2: b2da uxtb r2, r3 80029c4: 4b30 ldr r3, [pc, #192] @ (8002a88 ) 80029c6: 881b ldrh r3, [r3, #0] 80029c8: b2db uxtb r3, r3 80029ca: 2100 movs r1, #0 80029cc: 9101 str r1, [sp, #4] 80029ce: 9300 str r3, [sp, #0] 80029d0: 2300 movs r3, #0 80029d2: 2100 movs r1, #0 80029d4: 2002 movs r0, #2 80029d6: f001 f84d bl 8003a74 stCiclo=omchiusura9; 80029da: 4b2d ldr r3, [pc, #180] @ (8002a90 ) 80029dc: 222b movs r2, #43 @ 0x2b 80029de: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80029e0: 4b2c ldr r3, [pc, #176] @ (8002a94 ) 80029e2: 881b ldrh r3, [r3, #0] 80029e4: f003 0302 and.w r3, r3, #2 80029e8: 2b00 cmp r3, #0 80029ea: f000 814e beq.w 8002c8a 80029ee: 4b28 ldr r3, [pc, #160] @ (8002a90 ) 80029f0: 2231 movs r2, #49 @ 0x31 80029f2: 701a strb r2, [r3, #0] break; 80029f4: e149 b.n 8002c8a case omchiusura9: if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){ 80029f6: 4b2a ldr r3, [pc, #168] @ (8002aa0 ) 80029f8: 881b ldrh r3, [r3, #0] 80029fa: b2da uxtb r2, r3 80029fc: 4b22 ldr r3, [pc, #136] @ (8002a88 ) 80029fe: 881b ldrh r3, [r3, #0] 8002a00: b2db uxtb r3, r3 8002a02: 210a movs r1, #10 8002a04: 9101 str r1, [sp, #4] 8002a06: 9300 str r3, [sp, #0] 8002a08: 2300 movs r3, #0 8002a0a: 2100 movs r1, #0 8002a0c: 2002 movs r0, #2 8002a0e: f001 f831 bl 8003a74 8002a12: 4603 mov r3, r0 8002a14: 2b00 cmp r3, #0 8002a16: d106 bne.n 8002a26 rtCiclo=t2ch; 8002a18: 4b24 ldr r3, [pc, #144] @ (8002aac ) 8002a1a: 881a ldrh r2, [r3, #0] 8002a1c: 4b18 ldr r3, [pc, #96] @ (8002a80 ) 8002a1e: 801a strh r2, [r3, #0] stCiclo=omchiusura10; 8002a20: 4b1b ldr r3, [pc, #108] @ (8002a90 ) 8002a22: 222c movs r2, #44 @ 0x2c 8002a24: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002a26: 4b1b ldr r3, [pc, #108] @ (8002a94 ) 8002a28: 881b ldrh r3, [r3, #0] 8002a2a: f003 0302 and.w r3, r3, #2 8002a2e: 2b00 cmp r3, #0 8002a30: f000 812d beq.w 8002c8e 8002a34: 4b16 ldr r3, [pc, #88] @ (8002a90 ) 8002a36: 2231 movs r2, #49 @ 0x31 8002a38: 701a strb r2, [r3, #0] break; 8002a3a: e128 b.n 8002c8e case omchiusura10: if(rtCiclo==0){ 8002a3c: 4b10 ldr r3, [pc, #64] @ (8002a80 ) 8002a3e: 881b ldrh r3, [r3, #0] 8002a40: b29b uxth r3, r3 8002a42: 2b00 cmp r3, #0 8002a44: d110 bne.n 8002a68 (void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT); 8002a46: 4b17 ldr r3, [pc, #92] @ (8002aa4 ) 8002a48: 881b ldrh r3, [r3, #0] 8002a4a: b2da uxtb r2, r3 8002a4c: 4b0e ldr r3, [pc, #56] @ (8002a88 ) 8002a4e: 881b ldrh r3, [r3, #0] 8002a50: b2db uxtb r3, r3 8002a52: 2100 movs r1, #0 8002a54: 9101 str r1, [sp, #4] 8002a56: 9300 str r3, [sp, #0] 8002a58: 2300 movs r3, #0 8002a5a: 2101 movs r1, #1 8002a5c: 2004 movs r0, #4 8002a5e: f001 f809 bl 8003a74 stCiclo=omchiusura11; 8002a62: 4b0b ldr r3, [pc, #44] @ (8002a90 ) 8002a64: 222d movs r2, #45 @ 0x2d 8002a66: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002a68: 4b0a ldr r3, [pc, #40] @ (8002a94 ) 8002a6a: 881b ldrh r3, [r3, #0] 8002a6c: f003 0302 and.w r3, r3, #2 8002a70: 2b00 cmp r3, #0 8002a72: f000 810e beq.w 8002c92 8002a76: 4b06 ldr r3, [pc, #24] @ (8002a90 ) 8002a78: 2231 movs r2, #49 @ 0x31 8002a7a: 701a strb r2, [r3, #0] break; 8002a7c: e109 b.n 8002c92 8002a7e: bf00 nop 8002a80: 200003f4 .word 0x200003f4 8002a84: 20000400 .word 0x20000400 8002a88: 2000041a .word 0x2000041a 8002a8c: 200003f8 .word 0x200003f8 8002a90: 20000432 .word 0x20000432 8002a94: 20000430 .word 0x20000430 8002a98: 20000418 .word 0x20000418 8002a9c: 20000428 .word 0x20000428 8002aa0: 200003fc .word 0x200003fc 8002aa4: 20000404 .word 0x20000404 8002aa8: 20000414 .word 0x20000414 8002aac: 20000412 .word 0x20000412 case omchiusura11: if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){ 8002ab0: 4b7f ldr r3, [pc, #508] @ (8002cb0 ) 8002ab2: 881b ldrh r3, [r3, #0] 8002ab4: b2da uxtb r2, r3 8002ab6: 4b7f ldr r3, [pc, #508] @ (8002cb4 ) 8002ab8: 881b ldrh r3, [r3, #0] 8002aba: b2db uxtb r3, r3 8002abc: 210a movs r1, #10 8002abe: 9101 str r1, [sp, #4] 8002ac0: 9300 str r3, [sp, #0] 8002ac2: 2300 movs r3, #0 8002ac4: 2101 movs r1, #1 8002ac6: 2004 movs r0, #4 8002ac8: f000 ffd4 bl 8003a74 8002acc: 4603 mov r3, r0 8002ace: 2b00 cmp r3, #0 8002ad0: d106 bne.n 8002ae0 rtCiclo=twch; 8002ad2: 4b79 ldr r3, [pc, #484] @ (8002cb8 ) 8002ad4: 881a ldrh r2, [r3, #0] 8002ad6: 4b79 ldr r3, [pc, #484] @ (8002cbc ) 8002ad8: 801a strh r2, [r3, #0] stCiclo=omchiusura14; 8002ada: 4b79 ldr r3, [pc, #484] @ (8002cc0 ) 8002adc: 2230 movs r2, #48 @ 0x30 8002ade: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002ae0: 4b78 ldr r3, [pc, #480] @ (8002cc4 ) 8002ae2: 881b ldrh r3, [r3, #0] 8002ae4: f003 0302 and.w r3, r3, #2 8002ae8: 2b00 cmp r3, #0 8002aea: f000 80d4 beq.w 8002c96 8002aee: 4b74 ldr r3, [pc, #464] @ (8002cc0 ) 8002af0: 2231 movs r2, #49 @ 0x31 8002af2: 701a strb r2, [r3, #0] break; 8002af4: e0cf b.n 8002c96 case omchiusura12: if(rtCiclo==0){ 8002af6: 4b71 ldr r3, [pc, #452] @ (8002cbc ) 8002af8: 881b ldrh r3, [r3, #0] 8002afa: b29b uxth r3, r3 8002afc: 2b00 cmp r3, #0 8002afe: d102 bne.n 8002b06 //(void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT); stCiclo=omchiusura14; 8002b00: 4b6f ldr r3, [pc, #444] @ (8002cc0 ) 8002b02: 2230 movs r2, #48 @ 0x30 8002b04: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002b06: 4b6f ldr r3, [pc, #444] @ (8002cc4 ) 8002b08: 881b ldrh r3, [r3, #0] 8002b0a: f003 0302 and.w r3, r3, #2 8002b0e: 2b00 cmp r3, #0 8002b10: f000 80c3 beq.w 8002c9a 8002b14: 4b6a ldr r3, [pc, #424] @ (8002cc0 ) 8002b16: 2231 movs r2, #49 @ 0x31 8002b18: 701a strb r2, [r3, #0] break; 8002b1a: e0be b.n 8002c9a case omchiusura13: if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){ 8002b1c: 4b64 ldr r3, [pc, #400] @ (8002cb0 ) 8002b1e: 881b ldrh r3, [r3, #0] 8002b20: b2da uxtb r2, r3 8002b22: 4b64 ldr r3, [pc, #400] @ (8002cb4 ) 8002b24: 881b ldrh r3, [r3, #0] 8002b26: b2db uxtb r3, r3 8002b28: 210a movs r1, #10 8002b2a: 9101 str r1, [sp, #4] 8002b2c: 9300 str r3, [sp, #0] 8002b2e: 2300 movs r3, #0 8002b30: 2101 movs r1, #1 8002b32: 2004 movs r0, #4 8002b34: f000 ff9e bl 8003a74 8002b38: 4603 mov r3, r0 8002b3a: 2b00 cmp r3, #0 8002b3c: d106 bne.n 8002b4c rtCiclo=twch; 8002b3e: 4b5e ldr r3, [pc, #376] @ (8002cb8 ) 8002b40: 881a ldrh r2, [r3, #0] 8002b42: 4b5e ldr r3, [pc, #376] @ (8002cbc ) 8002b44: 801a strh r2, [r3, #0] stCiclo=omchiusura14; 8002b46: 4b5e ldr r3, [pc, #376] @ (8002cc0 ) 8002b48: 2230 movs r2, #48 @ 0x30 8002b4a: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002b4c: 4b5d ldr r3, [pc, #372] @ (8002cc4 ) 8002b4e: 881b ldrh r3, [r3, #0] 8002b50: f003 0302 and.w r3, r3, #2 8002b54: 2b00 cmp r3, #0 8002b56: f000 80a2 beq.w 8002c9e 8002b5a: 4b59 ldr r3, [pc, #356] @ (8002cc0 ) 8002b5c: 2231 movs r2, #49 @ 0x31 8002b5e: 701a strb r2, [r3, #0] break; 8002b60: e09d b.n 8002c9e case omchiusura14: if((rtCiclo==0)&&(pulsanti==0)){ 8002b62: 4b56 ldr r3, [pc, #344] @ (8002cbc ) 8002b64: 881b ldrh r3, [r3, #0] 8002b66: b29b uxth r3, r3 8002b68: 2b00 cmp r3, #0 8002b6a: d109 bne.n 8002b80 8002b6c: 4b56 ldr r3, [pc, #344] @ (8002cc8 ) 8002b6e: 781b ldrb r3, [r3, #0] 8002b70: 2b00 cmp r3, #0 8002b72: d105 bne.n 8002b80 stBuz=bzoff; 8002b74: 4b55 ldr r3, [pc, #340] @ (8002ccc ) 8002b76: 2200 movs r2, #0 8002b78: 701a strb r2, [r3, #0] stCiclo=omchiuso; 8002b7a: 4b51 ldr r3, [pc, #324] @ (8002cc0 ) 8002b7c: 2200 movs r2, #0 8002b7e: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002b80: 4b50 ldr r3, [pc, #320] @ (8002cc4 ) 8002b82: 881b ldrh r3, [r3, #0] 8002b84: f003 0302 and.w r3, r3, #2 8002b88: 2b00 cmp r3, #0 8002b8a: f000 808a beq.w 8002ca2 8002b8e: 4b4c ldr r3, [pc, #304] @ (8002cc0 ) 8002b90: 2231 movs r2, #49 @ 0x31 8002b92: 701a strb r2, [r3, #0] break; 8002b94: e085 b.n 8002ca2 case omstopchiusura: SetMotPerc(M1,FW,0); 8002b96: 2200 movs r2, #0 8002b98: 2100 movs r1, #0 8002b9a: 2001 movs r0, #1 8002b9c: f000 fdea bl 8003774 SetMotPerc(M2,FW,0); 8002ba0: 2200 movs r2, #0 8002ba2: 2100 movs r1, #0 8002ba4: 2002 movs r0, #2 8002ba6: f000 fde5 bl 8003774 SetMotPerc(M3,FW,0); 8002baa: 2200 movs r2, #0 8002bac: 2100 movs r1, #0 8002bae: 2003 movs r0, #3 8002bb0: f000 fde0 bl 8003774 SetMotPerc(M4,FW,0); 8002bb4: 2200 movs r2, #0 8002bb6: 2100 movs r1, #0 8002bb8: 2004 movs r0, #4 8002bba: f000 fddb bl 8003774 if(pulsanti==0){ 8002bbe: 4b42 ldr r3, [pc, #264] @ (8002cc8 ) 8002bc0: 781b ldrb r3, [r3, #0] 8002bc2: 2b00 cmp r3, #0 8002bc4: d16f bne.n 8002ca6 stBuz=bzoff; 8002bc6: 4b41 ldr r3, [pc, #260] @ (8002ccc ) 8002bc8: 2200 movs r2, #0 8002bca: 701a strb r2, [r3, #0] stCiclo=omaperto; 8002bcc: 4b3c ldr r3, [pc, #240] @ (8002cc0 ) 8002bce: 2222 movs r2, #34 @ 0x22 8002bd0: 701a strb r2, [r3, #0] stPulsanti&=(~P1STOP); 8002bd2: 4b3c ldr r3, [pc, #240] @ (8002cc4 ) 8002bd4: 881b ldrh r3, [r3, #0] 8002bd6: f023 0302 bic.w r3, r3, #2 8002bda: b29a uxth r2, r3 8002bdc: 4b39 ldr r3, [pc, #228] @ (8002cc4 ) 8002bde: 801a strh r2, [r3, #0] } break; 8002be0: e061 b.n 8002ca6 break; 8002be2: bf00 nop 8002be4: e060 b.n 8002ca8 break; 8002be6: bf00 nop 8002be8: e05e b.n 8002ca8 break; 8002bea: bf00 nop 8002bec: e05c b.n 8002ca8 break; 8002bee: bf00 nop 8002bf0: e05a b.n 8002ca8 break; 8002bf2: bf00 nop 8002bf4: e058 b.n 8002ca8 break; 8002bf6: bf00 nop 8002bf8: e056 b.n 8002ca8 break; 8002bfa: bf00 nop 8002bfc: e054 b.n 8002ca8 break; 8002bfe: bf00 nop 8002c00: e052 b.n 8002ca8 break; 8002c02: bf00 nop 8002c04: e050 b.n 8002ca8 break; 8002c06: bf00 nop 8002c08: e04e b.n 8002ca8 break; 8002c0a: bf00 nop 8002c0c: e04c b.n 8002ca8 break; 8002c0e: bf00 nop 8002c10: e04a b.n 8002ca8 break; 8002c12: bf00 nop 8002c14: e048 b.n 8002ca8 break; 8002c16: bf00 nop 8002c18: e046 b.n 8002ca8 break; 8002c1a: bf00 nop 8002c1c: e044 b.n 8002ca8 break; 8002c1e: bf00 nop 8002c20: e042 b.n 8002ca8 break; 8002c22: bf00 nop 8002c24: e040 b.n 8002ca8 break; 8002c26: bf00 nop 8002c28: e03e b.n 8002ca8 break; 8002c2a: bf00 nop 8002c2c: e03c b.n 8002ca8 break; 8002c2e: bf00 nop 8002c30: e03a b.n 8002ca8 break; 8002c32: bf00 nop 8002c34: e038 b.n 8002ca8 break; 8002c36: bf00 nop 8002c38: e036 b.n 8002ca8 break; 8002c3a: bf00 nop 8002c3c: e034 b.n 8002ca8 break; 8002c3e: bf00 nop 8002c40: e032 b.n 8002ca8 break; 8002c42: bf00 nop 8002c44: e030 b.n 8002ca8 break; 8002c46: bf00 nop 8002c48: e02e b.n 8002ca8 break; 8002c4a: bf00 nop 8002c4c: e02c b.n 8002ca8 break; 8002c4e: bf00 nop 8002c50: e02a b.n 8002ca8 break; 8002c52: bf00 nop 8002c54: e028 b.n 8002ca8 break; 8002c56: bf00 nop 8002c58: e026 b.n 8002ca8 break; 8002c5a: bf00 nop 8002c5c: e024 b.n 8002ca8 break; 8002c5e: bf00 nop 8002c60: e022 b.n 8002ca8 break; 8002c62: bf00 nop 8002c64: e020 b.n 8002ca8 break; 8002c66: bf00 nop 8002c68: e01e b.n 8002ca8 break; 8002c6a: bf00 nop 8002c6c: e01c b.n 8002ca8 break; 8002c6e: bf00 nop 8002c70: e01a b.n 8002ca8 break; 8002c72: bf00 nop 8002c74: e018 b.n 8002ca8 break; 8002c76: bf00 nop 8002c78: e016 b.n 8002ca8 break; 8002c7a: bf00 nop 8002c7c: e014 b.n 8002ca8 break; 8002c7e: bf00 nop 8002c80: e012 b.n 8002ca8 break; 8002c82: bf00 nop 8002c84: e010 b.n 8002ca8 break; 8002c86: bf00 nop 8002c88: e00e b.n 8002ca8 break; 8002c8a: bf00 nop 8002c8c: e00c b.n 8002ca8 break; 8002c8e: bf00 nop 8002c90: e00a b.n 8002ca8 break; 8002c92: bf00 nop 8002c94: e008 b.n 8002ca8 break; 8002c96: bf00 nop 8002c98: e006 b.n 8002ca8 break; 8002c9a: bf00 nop 8002c9c: e004 b.n 8002ca8 break; 8002c9e: bf00 nop 8002ca0: e002 b.n 8002ca8 break; 8002ca2: bf00 nop 8002ca4: e000 b.n 8002ca8 break; 8002ca6: bf00 nop } } 8002ca8: bf00 nop 8002caa: 46bd mov sp, r7 8002cac: bd80 pop {r7, pc} 8002cae: bf00 nop 8002cb0: 20000404 .word 0x20000404 8002cb4: 2000041a .word 0x2000041a 8002cb8: 20000418 .word 0x20000418 8002cbc: 200003f4 .word 0x200003f4 8002cc0: 20000432 .word 0x20000432 8002cc4: 20000430 .word 0x20000430 8002cc8: 200003e8 .word 0x200003e8 8002ccc: 20000433 .word 0x20000433 08002cd0
: /** * @brief The application entry point. * @retval int */ int main(void) { 8002cd0: b580 push {r7, lr} 8002cd2: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8002cd4: f001 f9bc bl 8004050 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8002cd8: f000 f850 bl 8002d7c /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8002cdc: f000 fab2 bl 8003244 MX_DMA_Init(); 8002ce0: f000 fa92 bl 8003208 MX_USB_DEVICE_Init(); 8002ce4: f009 fe6c bl 800c9c0 MX_TIM2_Init(); 8002ce8: f000 f91e bl 8002f28 MX_TIM4_Init(); 8002cec: f000 f9c0 bl 8003070 MX_ADC1_Init(); 8002cf0: f000 f8a2 bl 8002e38 MX_USART1_UART_Init(); 8002cf4: f000 fa5e bl 80031b4 /* USER CODE BEGIN 2 */ HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS); 8002cf8: 2205 movs r2, #5 8002cfa: 491c ldr r1, [pc, #112] @ (8002d6c ) 8002cfc: 481c ldr r0, [pc, #112] @ (8002d70 ) 8002cfe: f001 fae1 bl 80042c4 StopMot(timMot1,FWMot1); 8002d02: 2100 movs r1, #0 8002d04: 481b ldr r0, [pc, #108] @ (8002d74 ) 8002d06: f000 fb62 bl 80033ce StopMot(timMot1,BWMot1); 8002d0a: 2104 movs r1, #4 8002d0c: 4819 ldr r0, [pc, #100] @ (8002d74 ) 8002d0e: f000 fb5e bl 80033ce StopMot(timMot2,FWMot2); 8002d12: 2108 movs r1, #8 8002d14: 4817 ldr r0, [pc, #92] @ (8002d74 ) 8002d16: f000 fb5a bl 80033ce StopMot(timMot2,BWMot2); 8002d1a: 210c movs r1, #12 8002d1c: 4815 ldr r0, [pc, #84] @ (8002d74 ) 8002d1e: f000 fb56 bl 80033ce StopMot(timMot3,FWMot3); 8002d22: 2100 movs r1, #0 8002d24: 4814 ldr r0, [pc, #80] @ (8002d78 ) 8002d26: f000 fb52 bl 80033ce StopMot(timMot3,BWMot3); 8002d2a: 2104 movs r1, #4 8002d2c: 4812 ldr r0, [pc, #72] @ (8002d78 ) 8002d2e: f000 fb4e bl 80033ce StopMot(timMot4,FWMot4); 8002d32: 2108 movs r1, #8 8002d34: 4810 ldr r0, [pc, #64] @ (8002d78 ) 8002d36: f000 fb4a bl 80033ce StopMot(timMot4,BWMot4); 8002d3a: 210c movs r1, #12 8002d3c: 480e ldr r0, [pc, #56] @ (8002d78 ) 8002d3e: f000 fb46 bl 80033ce //CDC_Transmit_FS((uint8_t*)"Start\r\n", 7); //while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY); if (EE_Init() != EE_OK){ 8002d42: f7fe fa39 bl 80011b8 8002d46: 4603 mov r3, r0 8002d48: 2b00 cmp r3, #0 8002d4a: d001 beq.n 8002d50 for(;;);//errore eeprom 8002d4c: bf00 nop 8002d4e: e7fd b.n 8002d4c } loadEE(); 8002d50: f7fe face bl 80012f0 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1){ manageCDC(); 8002d54: f7fd fb52 bl 80003fc manageAdc(); 8002d58: f7fd fa00 bl 800015c managePulsanti(); 8002d5c: f7fe fd38 bl 80017d0 manageCiclo(); 8002d60: f7fe fe86 bl 8001a70 debug(); 8002d64: f7fe f832 bl 8000dcc manageCDC(); 8002d68: bf00 nop 8002d6a: e7f3 b.n 8002d54 8002d6c: 200001f4 .word 0x200001f4 8002d70: 2000029c .word 0x2000029c 8002d74: 20000310 .word 0x20000310 8002d78: 20000358 .word 0x20000358 08002d7c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8002d7c: b580 push {r7, lr} 8002d7e: b094 sub sp, #80 @ 0x50 8002d80: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8002d82: f107 0328 add.w r3, r7, #40 @ 0x28 8002d86: 2228 movs r2, #40 @ 0x28 8002d88: 2100 movs r1, #0 8002d8a: 4618 mov r0, r3 8002d8c: f00a fb54 bl 800d438 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8002d90: f107 0314 add.w r3, r7, #20 8002d94: 2200 movs r2, #0 8002d96: 601a str r2, [r3, #0] 8002d98: 605a str r2, [r3, #4] 8002d9a: 609a str r2, [r3, #8] 8002d9c: 60da str r2, [r3, #12] 8002d9e: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002da0: 1d3b adds r3, r7, #4 8002da2: 2200 movs r2, #0 8002da4: 601a str r2, [r3, #0] 8002da6: 605a str r2, [r3, #4] 8002da8: 609a str r2, [r3, #8] 8002daa: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8002dac: 2301 movs r3, #1 8002dae: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8002db0: f44f 3380 mov.w r3, #65536 @ 0x10000 8002db4: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 8002db6: 2300 movs r3, #0 8002db8: 633b str r3, [r7, #48] @ 0x30 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8002dba: 2301 movs r3, #1 8002dbc: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8002dbe: 2302 movs r3, #2 8002dc0: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8002dc2: f44f 3380 mov.w r3, #65536 @ 0x10000 8002dc6: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; 8002dc8: f44f 1380 mov.w r3, #1048576 @ 0x100000 8002dcc: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002dce: f107 0328 add.w r3, r7, #40 @ 0x28 8002dd2: 4618 mov r0, r3 8002dd4: f004 f998 bl 8007108 8002dd8: 4603 mov r3, r0 8002dda: 2b00 cmp r3, #0 8002ddc: d001 beq.n 8002de2 { Error_Handler(); 8002dde: f000 fadb bl 8003398 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002de2: 230f movs r3, #15 8002de4: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8002de6: 2302 movs r3, #2 8002de8: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8002dea: 2300 movs r3, #0 8002dec: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8002dee: f44f 6380 mov.w r3, #1024 @ 0x400 8002df2: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8002df4: 2300 movs r3, #0 8002df6: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8002df8: f107 0314 add.w r3, r7, #20 8002dfc: 2102 movs r1, #2 8002dfe: 4618 mov r0, r3 8002e00: f004 fc04 bl 800760c 8002e04: 4603 mov r3, r0 8002e06: 2b00 cmp r3, #0 8002e08: d001 beq.n 8002e0e { Error_Handler(); 8002e0a: f000 fac5 bl 8003398 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB; 8002e0e: 2312 movs r3, #18 8002e10: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 8002e12: f44f 4300 mov.w r3, #32768 @ 0x8000 8002e16: 60fb str r3, [r7, #12] PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; 8002e18: 2300 movs r3, #0 8002e1a: 613b str r3, [r7, #16] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8002e1c: 1d3b adds r3, r7, #4 8002e1e: 4618 mov r0, r3 8002e20: f004 fd84 bl 800792c 8002e24: 4603 mov r3, r0 8002e26: 2b00 cmp r3, #0 8002e28: d001 beq.n 8002e2e { Error_Handler(); 8002e2a: f000 fab5 bl 8003398 } } 8002e2e: bf00 nop 8002e30: 3750 adds r7, #80 @ 0x50 8002e32: 46bd mov sp, r7 8002e34: bd80 pop {r7, pc} ... 08002e38 : * @brief ADC1 Initialization Function * @param None * @retval None */ static void MX_ADC1_Init(void) { 8002e38: b580 push {r7, lr} 8002e3a: b084 sub sp, #16 8002e3c: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 8002e3e: 1d3b adds r3, r7, #4 8002e40: 2200 movs r2, #0 8002e42: 601a str r2, [r3, #0] 8002e44: 605a str r2, [r3, #4] 8002e46: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 8002e48: 4b35 ldr r3, [pc, #212] @ (8002f20 ) 8002e4a: 4a36 ldr r2, [pc, #216] @ (8002f24 ) 8002e4c: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 8002e4e: 4b34 ldr r3, [pc, #208] @ (8002f20 ) 8002e50: f44f 7280 mov.w r2, #256 @ 0x100 8002e54: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; 8002e56: 4b32 ldr r3, [pc, #200] @ (8002f20 ) 8002e58: 2201 movs r2, #1 8002e5a: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 8002e5c: 4b30 ldr r3, [pc, #192] @ (8002f20 ) 8002e5e: 2200 movs r2, #0 8002e60: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8002e62: 4b2f ldr r3, [pc, #188] @ (8002f20 ) 8002e64: f44f 2260 mov.w r2, #917504 @ 0xe0000 8002e68: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8002e6a: 4b2d ldr r3, [pc, #180] @ (8002f20 ) 8002e6c: 2200 movs r2, #0 8002e6e: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 5; 8002e70: 4b2b ldr r3, [pc, #172] @ (8002f20 ) 8002e72: 2205 movs r2, #5 8002e74: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 8002e76: 482a ldr r0, [pc, #168] @ (8002f20 ) 8002e78: f001 f94c bl 8004114 8002e7c: 4603 mov r3, r0 8002e7e: 2b00 cmp r3, #0 8002e80: d001 beq.n 8002e86 { Error_Handler(); 8002e82: f000 fa89 bl 8003398 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_4; 8002e86: 2304 movs r3, #4 8002e88: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 8002e8a: 2301 movs r3, #1 8002e8c: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5; 8002e8e: 2303 movs r3, #3 8002e90: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8002e92: 1d3b adds r3, r7, #4 8002e94: 4619 mov r1, r3 8002e96: 4822 ldr r0, [pc, #136] @ (8002f20 ) 8002e98: f001 fb0e bl 80044b8 8002e9c: 4603 mov r3, r0 8002e9e: 2b00 cmp r3, #0 8002ea0: d001 beq.n 8002ea6 { Error_Handler(); 8002ea2: f000 fa79 bl 8003398 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_5; 8002ea6: 2305 movs r3, #5 8002ea8: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_2; 8002eaa: 2302 movs r3, #2 8002eac: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8002eae: 1d3b adds r3, r7, #4 8002eb0: 4619 mov r1, r3 8002eb2: 481b ldr r0, [pc, #108] @ (8002f20 ) 8002eb4: f001 fb00 bl 80044b8 8002eb8: 4603 mov r3, r0 8002eba: 2b00 cmp r3, #0 8002ebc: d001 beq.n 8002ec2 { Error_Handler(); 8002ebe: f000 fa6b bl 8003398 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_6; 8002ec2: 2306 movs r3, #6 8002ec4: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_3; 8002ec6: 2303 movs r3, #3 8002ec8: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8002eca: 1d3b adds r3, r7, #4 8002ecc: 4619 mov r1, r3 8002ece: 4814 ldr r0, [pc, #80] @ (8002f20 ) 8002ed0: f001 faf2 bl 80044b8 8002ed4: 4603 mov r3, r0 8002ed6: 2b00 cmp r3, #0 8002ed8: d001 beq.n 8002ede { Error_Handler(); 8002eda: f000 fa5d bl 8003398 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_7; 8002ede: 2307 movs r3, #7 8002ee0: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_4; 8002ee2: 2304 movs r3, #4 8002ee4: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8002ee6: 1d3b adds r3, r7, #4 8002ee8: 4619 mov r1, r3 8002eea: 480d ldr r0, [pc, #52] @ (8002f20 ) 8002eec: f001 fae4 bl 80044b8 8002ef0: 4603 mov r3, r0 8002ef2: 2b00 cmp r3, #0 8002ef4: d001 beq.n 8002efa { Error_Handler(); 8002ef6: f000 fa4f bl 8003398 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 8002efa: 2308 movs r3, #8 8002efc: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_5; 8002efe: 2305 movs r3, #5 8002f00: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8002f02: 1d3b adds r3, r7, #4 8002f04: 4619 mov r1, r3 8002f06: 4806 ldr r0, [pc, #24] @ (8002f20 ) 8002f08: f001 fad6 bl 80044b8 8002f0c: 4603 mov r3, r0 8002f0e: 2b00 cmp r3, #0 8002f10: d001 beq.n 8002f16 { Error_Handler(); 8002f12: f000 fa41 bl 8003398 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 8002f16: bf00 nop 8002f18: 3710 adds r7, #16 8002f1a: 46bd mov sp, r7 8002f1c: bd80 pop {r7, pc} 8002f1e: bf00 nop 8002f20: 2000029c .word 0x2000029c 8002f24: 40012400 .word 0x40012400 08002f28 : * @brief TIM2 Initialization Function * @param None * @retval None */ static void MX_TIM2_Init(void) { 8002f28: b580 push {r7, lr} 8002f2a: b08e sub sp, #56 @ 0x38 8002f2c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 8002f2e: f107 0328 add.w r3, r7, #40 @ 0x28 8002f32: 2200 movs r2, #0 8002f34: 601a str r2, [r3, #0] 8002f36: 605a str r2, [r3, #4] 8002f38: 609a str r2, [r3, #8] 8002f3a: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8002f3c: f107 0320 add.w r3, r7, #32 8002f40: 2200 movs r2, #0 8002f42: 601a str r2, [r3, #0] 8002f44: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 8002f46: 1d3b adds r3, r7, #4 8002f48: 2200 movs r2, #0 8002f4a: 601a str r2, [r3, #0] 8002f4c: 605a str r2, [r3, #4] 8002f4e: 609a str r2, [r3, #8] 8002f50: 60da str r2, [r3, #12] 8002f52: 611a str r2, [r3, #16] 8002f54: 615a str r2, [r3, #20] 8002f56: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; 8002f58: 4b44 ldr r3, [pc, #272] @ (800306c ) 8002f5a: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 8002f5e: 601a str r2, [r3, #0] htim2.Init.Prescaler = 0; 8002f60: 4b42 ldr r3, [pc, #264] @ (800306c ) 8002f62: 2200 movs r2, #0 8002f64: 605a str r2, [r3, #4] htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 8002f66: 4b41 ldr r3, [pc, #260] @ (800306c ) 8002f68: 2200 movs r2, #0 8002f6a: 609a str r2, [r3, #8] htim2.Init.Period = 17999; 8002f6c: 4b3f ldr r3, [pc, #252] @ (800306c ) 8002f6e: f244 624f movw r2, #17999 @ 0x464f 8002f72: 60da str r2, [r3, #12] htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 8002f74: 4b3d ldr r3, [pc, #244] @ (800306c ) 8002f76: 2200 movs r2, #0 8002f78: 611a str r2, [r3, #16] htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8002f7a: 4b3c ldr r3, [pc, #240] @ (800306c ) 8002f7c: 2200 movs r2, #0 8002f7e: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim2) != HAL_OK) 8002f80: 483a ldr r0, [pc, #232] @ (800306c ) 8002f82: f004 fd89 bl 8007a98 8002f86: 4603 mov r3, r0 8002f88: 2b00 cmp r3, #0 8002f8a: d001 beq.n 8002f90 { Error_Handler(); 8002f8c: f000 fa04 bl 8003398 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 8002f90: f44f 5380 mov.w r3, #4096 @ 0x1000 8002f94: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) 8002f96: f107 0328 add.w r3, r7, #40 @ 0x28 8002f9a: 4619 mov r1, r3 8002f9c: 4833 ldr r0, [pc, #204] @ (800306c ) 8002f9e: f004 ffeb bl 8007f78 8002fa2: 4603 mov r3, r0 8002fa4: 2b00 cmp r3, #0 8002fa6: d001 beq.n 8002fac { Error_Handler(); 8002fa8: f000 f9f6 bl 8003398 } if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 8002fac: 482f ldr r0, [pc, #188] @ (800306c ) 8002fae: f004 fdc2 bl 8007b36 8002fb2: 4603 mov r3, r0 8002fb4: 2b00 cmp r3, #0 8002fb6: d001 beq.n 8002fbc { Error_Handler(); 8002fb8: f000 f9ee bl 8003398 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8002fbc: 2300 movs r3, #0 8002fbe: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8002fc0: 2300 movs r3, #0 8002fc2: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 8002fc4: f107 0320 add.w r3, r7, #32 8002fc8: 4619 mov r1, r3 8002fca: 4828 ldr r0, [pc, #160] @ (800306c ) 8002fcc: f005 fb74 bl 80086b8 8002fd0: 4603 mov r3, r0 8002fd2: 2b00 cmp r3, #0 8002fd4: d001 beq.n 8002fda { Error_Handler(); 8002fd6: f000 f9df bl 8003398 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 8002fda: 2360 movs r3, #96 @ 0x60 8002fdc: 607b str r3, [r7, #4] sConfigOC.Pulse = 1000; 8002fde: f44f 737a mov.w r3, #1000 @ 0x3e8 8002fe2: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8002fe4: 2300 movs r3, #0 8002fe6: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 8002fe8: 2304 movs r3, #4 8002fea: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 8002fec: 1d3b adds r3, r7, #4 8002fee: 2200 movs r2, #0 8002ff0: 4619 mov r1, r3 8002ff2: 481e ldr r0, [pc, #120] @ (800306c ) 8002ff4: f004 fefe bl 8007df4 8002ff8: 4603 mov r3, r0 8002ffa: 2b00 cmp r3, #0 8002ffc: d001 beq.n 8003002 { Error_Handler(); 8002ffe: f000 f9cb bl 8003398 } sConfigOC.Pulse = 2000; 8003002: f44f 63fa mov.w r3, #2000 @ 0x7d0 8003006: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 8003008: 1d3b adds r3, r7, #4 800300a: 2204 movs r2, #4 800300c: 4619 mov r1, r3 800300e: 4817 ldr r0, [pc, #92] @ (800306c ) 8003010: f004 fef0 bl 8007df4 8003014: 4603 mov r3, r0 8003016: 2b00 cmp r3, #0 8003018: d001 beq.n 800301e { Error_Handler(); 800301a: f000 f9bd bl 8003398 } sConfigOC.Pulse = 3000; 800301e: f640 33b8 movw r3, #3000 @ 0xbb8 8003022: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 8003024: 2300 movs r3, #0 8003026: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 8003028: 1d3b adds r3, r7, #4 800302a: 2208 movs r2, #8 800302c: 4619 mov r1, r3 800302e: 480f ldr r0, [pc, #60] @ (800306c ) 8003030: f004 fee0 bl 8007df4 8003034: 4603 mov r3, r0 8003036: 2b00 cmp r3, #0 8003038: d001 beq.n 800303e { Error_Handler(); 800303a: f000 f9ad bl 8003398 } sConfigOC.Pulse = 4000; 800303e: f44f 637a mov.w r3, #4000 @ 0xfa0 8003042: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 8003044: 2304 movs r3, #4 8003046: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 8003048: 1d3b adds r3, r7, #4 800304a: 220c movs r2, #12 800304c: 4619 mov r1, r3 800304e: 4807 ldr r0, [pc, #28] @ (800306c ) 8003050: f004 fed0 bl 8007df4 8003054: 4603 mov r3, r0 8003056: 2b00 cmp r3, #0 8003058: d001 beq.n 800305e { Error_Handler(); 800305a: f000 f99d bl 8003398 } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ HAL_TIM_MspPostInit(&htim2); 800305e: 4803 ldr r0, [pc, #12] @ (800306c ) 8003060: f000 feb2 bl 8003dc8 } 8003064: bf00 nop 8003066: 3738 adds r7, #56 @ 0x38 8003068: 46bd mov sp, r7 800306a: bd80 pop {r7, pc} 800306c: 20000310 .word 0x20000310 08003070 : * @brief TIM4 Initialization Function * @param None * @retval None */ static void MX_TIM4_Init(void) { 8003070: b580 push {r7, lr} 8003072: b08e sub sp, #56 @ 0x38 8003074: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 8003076: f107 0328 add.w r3, r7, #40 @ 0x28 800307a: 2200 movs r2, #0 800307c: 601a str r2, [r3, #0] 800307e: 605a str r2, [r3, #4] 8003080: 609a str r2, [r3, #8] 8003082: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8003084: f107 0320 add.w r3, r7, #32 8003088: 2200 movs r2, #0 800308a: 601a str r2, [r3, #0] 800308c: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 800308e: 1d3b adds r3, r7, #4 8003090: 2200 movs r2, #0 8003092: 601a str r2, [r3, #0] 8003094: 605a str r2, [r3, #4] 8003096: 609a str r2, [r3, #8] 8003098: 60da str r2, [r3, #12] 800309a: 611a str r2, [r3, #16] 800309c: 615a str r2, [r3, #20] 800309e: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 80030a0: 4b42 ldr r3, [pc, #264] @ (80031ac ) 80030a2: 4a43 ldr r2, [pc, #268] @ (80031b0 ) 80030a4: 601a str r2, [r3, #0] htim4.Init.Prescaler = 0; 80030a6: 4b41 ldr r3, [pc, #260] @ (80031ac ) 80030a8: 2200 movs r2, #0 80030aa: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 80030ac: 4b3f ldr r3, [pc, #252] @ (80031ac ) 80030ae: 2200 movs r2, #0 80030b0: 609a str r2, [r3, #8] htim4.Init.Period = 17999; 80030b2: 4b3e ldr r3, [pc, #248] @ (80031ac ) 80030b4: f244 624f movw r2, #17999 @ 0x464f 80030b8: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80030ba: 4b3c ldr r3, [pc, #240] @ (80031ac ) 80030bc: 2200 movs r2, #0 80030be: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80030c0: 4b3a ldr r3, [pc, #232] @ (80031ac ) 80030c2: 2200 movs r2, #0 80030c4: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 80030c6: 4839 ldr r0, [pc, #228] @ (80031ac ) 80030c8: f004 fce6 bl 8007a98 80030cc: 4603 mov r3, r0 80030ce: 2b00 cmp r3, #0 80030d0: d001 beq.n 80030d6 { Error_Handler(); 80030d2: f000 f961 bl 8003398 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 80030d6: f44f 5380 mov.w r3, #4096 @ 0x1000 80030da: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 80030dc: f107 0328 add.w r3, r7, #40 @ 0x28 80030e0: 4619 mov r1, r3 80030e2: 4832 ldr r0, [pc, #200] @ (80031ac ) 80030e4: f004 ff48 bl 8007f78 80030e8: 4603 mov r3, r0 80030ea: 2b00 cmp r3, #0 80030ec: d001 beq.n 80030f2 { Error_Handler(); 80030ee: f000 f953 bl 8003398 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 80030f2: 482e ldr r0, [pc, #184] @ (80031ac ) 80030f4: f004 fd1f bl 8007b36 80030f8: 4603 mov r3, r0 80030fa: 2b00 cmp r3, #0 80030fc: d001 beq.n 8003102 { Error_Handler(); 80030fe: f000 f94b bl 8003398 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8003102: 2300 movs r3, #0 8003104: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8003106: 2300 movs r3, #0 8003108: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 800310a: f107 0320 add.w r3, r7, #32 800310e: 4619 mov r1, r3 8003110: 4826 ldr r0, [pc, #152] @ (80031ac ) 8003112: f005 fad1 bl 80086b8 8003116: 4603 mov r3, r0 8003118: 2b00 cmp r3, #0 800311a: d001 beq.n 8003120 { Error_Handler(); 800311c: f000 f93c bl 8003398 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 8003120: 2360 movs r3, #96 @ 0x60 8003122: 607b str r3, [r7, #4] sConfigOC.Pulse = 5000; 8003124: f241 3388 movw r3, #5000 @ 0x1388 8003128: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800312a: 2300 movs r3, #0 800312c: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 800312e: 2304 movs r3, #4 8003130: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 8003132: 1d3b adds r3, r7, #4 8003134: 2200 movs r2, #0 8003136: 4619 mov r1, r3 8003138: 481c ldr r0, [pc, #112] @ (80031ac ) 800313a: f004 fe5b bl 8007df4 800313e: 4603 mov r3, r0 8003140: 2b00 cmp r3, #0 8003142: d001 beq.n 8003148 { Error_Handler(); 8003144: f000 f928 bl 8003398 } sConfigOC.Pulse = 6000; 8003148: f241 7370 movw r3, #6000 @ 0x1770 800314c: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 800314e: 1d3b adds r3, r7, #4 8003150: 2204 movs r2, #4 8003152: 4619 mov r1, r3 8003154: 4815 ldr r0, [pc, #84] @ (80031ac ) 8003156: f004 fe4d bl 8007df4 800315a: 4603 mov r3, r0 800315c: 2b00 cmp r3, #0 800315e: d001 beq.n 8003164 { Error_Handler(); 8003160: f000 f91a bl 8003398 } sConfigOC.Pulse = 7000; 8003164: f641 3358 movw r3, #7000 @ 0x1b58 8003168: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 800316a: 1d3b adds r3, r7, #4 800316c: 2208 movs r2, #8 800316e: 4619 mov r1, r3 8003170: 480e ldr r0, [pc, #56] @ (80031ac ) 8003172: f004 fe3f bl 8007df4 8003176: 4603 mov r3, r0 8003178: 2b00 cmp r3, #0 800317a: d001 beq.n 8003180 { Error_Handler(); 800317c: f000 f90c bl 8003398 } sConfigOC.Pulse = 8000; 8003180: f44f 53fa mov.w r3, #8000 @ 0x1f40 8003184: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 8003186: 1d3b adds r3, r7, #4 8003188: 220c movs r2, #12 800318a: 4619 mov r1, r3 800318c: 4807 ldr r0, [pc, #28] @ (80031ac ) 800318e: f004 fe31 bl 8007df4 8003192: 4603 mov r3, r0 8003194: 2b00 cmp r3, #0 8003196: d001 beq.n 800319c { Error_Handler(); 8003198: f000 f8fe bl 8003398 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 800319c: 4803 ldr r0, [pc, #12] @ (80031ac ) 800319e: f000 fe13 bl 8003dc8 } 80031a2: bf00 nop 80031a4: 3738 adds r7, #56 @ 0x38 80031a6: 46bd mov sp, r7 80031a8: bd80 pop {r7, pc} 80031aa: bf00 nop 80031ac: 20000358 .word 0x20000358 80031b0: 40000800 .word 0x40000800 080031b4 : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 80031b4: b580 push {r7, lr} 80031b6: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 80031b8: 4b11 ldr r3, [pc, #68] @ (8003200 ) 80031ba: 4a12 ldr r2, [pc, #72] @ (8003204 ) 80031bc: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 80031be: 4b10 ldr r3, [pc, #64] @ (8003200 ) 80031c0: f44f 32e1 mov.w r2, #115200 @ 0x1c200 80031c4: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 80031c6: 4b0e ldr r3, [pc, #56] @ (8003200 ) 80031c8: 2200 movs r2, #0 80031ca: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 80031cc: 4b0c ldr r3, [pc, #48] @ (8003200 ) 80031ce: 2200 movs r2, #0 80031d0: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 80031d2: 4b0b ldr r3, [pc, #44] @ (8003200 ) 80031d4: 2200 movs r2, #0 80031d6: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80031d8: 4b09 ldr r3, [pc, #36] @ (8003200 ) 80031da: 220c movs r2, #12 80031dc: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80031de: 4b08 ldr r3, [pc, #32] @ (8003200 ) 80031e0: 2200 movs r2, #0 80031e2: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80031e4: 4b06 ldr r3, [pc, #24] @ (8003200 ) 80031e6: 2200 movs r2, #0 80031e8: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 80031ea: 4805 ldr r0, [pc, #20] @ (8003200 ) 80031ec: f005 fac2 bl 8008774 80031f0: 4603 mov r3, r0 80031f2: 2b00 cmp r3, #0 80031f4: d001 beq.n 80031fa { Error_Handler(); 80031f6: f000 f8cf bl 8003398 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 80031fa: bf00 nop 80031fc: bd80 pop {r7, pc} 80031fe: bf00 nop 8003200: 200003a0 .word 0x200003a0 8003204: 40013800 .word 0x40013800 08003208 : /** * Enable DMA controller clock */ static void MX_DMA_Init(void) { 8003208: b580 push {r7, lr} 800320a: b082 sub sp, #8 800320c: af00 add r7, sp, #0 /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); 800320e: 4b0c ldr r3, [pc, #48] @ (8003240 ) 8003210: 695b ldr r3, [r3, #20] 8003212: 4a0b ldr r2, [pc, #44] @ (8003240 ) 8003214: f043 0301 orr.w r3, r3, #1 8003218: 6153 str r3, [r2, #20] 800321a: 4b09 ldr r3, [pc, #36] @ (8003240 ) 800321c: 695b ldr r3, [r3, #20] 800321e: f003 0301 and.w r3, r3, #1 8003222: 607b str r3, [r7, #4] 8003224: 687b ldr r3, [r7, #4] /* DMA interrupt init */ /* DMA1_Channel1_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 8003226: 2200 movs r2, #0 8003228: 2100 movs r1, #0 800322a: 200b movs r0, #11 800322c: f001 fc15 bl 8004a5a HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 8003230: 200b movs r0, #11 8003232: f001 fc2e bl 8004a92 } 8003236: bf00 nop 8003238: 3708 adds r7, #8 800323a: 46bd mov sp, r7 800323c: bd80 pop {r7, pc} 800323e: bf00 nop 8003240: 40021000 .word 0x40021000 08003244 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8003244: b580 push {r7, lr} 8003246: b088 sub sp, #32 8003248: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800324a: f107 0310 add.w r3, r7, #16 800324e: 2200 movs r2, #0 8003250: 601a str r2, [r3, #0] 8003252: 605a str r2, [r3, #4] 8003254: 609a str r2, [r3, #8] 8003256: 60da str r2, [r3, #12] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8003258: 4b4b ldr r3, [pc, #300] @ (8003388 ) 800325a: 699b ldr r3, [r3, #24] 800325c: 4a4a ldr r2, [pc, #296] @ (8003388 ) 800325e: f043 0310 orr.w r3, r3, #16 8003262: 6193 str r3, [r2, #24] 8003264: 4b48 ldr r3, [pc, #288] @ (8003388 ) 8003266: 699b ldr r3, [r3, #24] 8003268: f003 0310 and.w r3, r3, #16 800326c: 60fb str r3, [r7, #12] 800326e: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); 8003270: 4b45 ldr r3, [pc, #276] @ (8003388 ) 8003272: 699b ldr r3, [r3, #24] 8003274: 4a44 ldr r2, [pc, #272] @ (8003388 ) 8003276: f043 0320 orr.w r3, r3, #32 800327a: 6193 str r3, [r2, #24] 800327c: 4b42 ldr r3, [pc, #264] @ (8003388 ) 800327e: 699b ldr r3, [r3, #24] 8003280: f003 0320 and.w r3, r3, #32 8003284: 60bb str r3, [r7, #8] 8003286: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 8003288: 4b3f ldr r3, [pc, #252] @ (8003388 ) 800328a: 699b ldr r3, [r3, #24] 800328c: 4a3e ldr r2, [pc, #248] @ (8003388 ) 800328e: f043 0304 orr.w r3, r3, #4 8003292: 6193 str r3, [r2, #24] 8003294: 4b3c ldr r3, [pc, #240] @ (8003388 ) 8003296: 699b ldr r3, [r3, #24] 8003298: f003 0304 and.w r3, r3, #4 800329c: 607b str r3, [r7, #4] 800329e: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); 80032a0: 4b39 ldr r3, [pc, #228] @ (8003388 ) 80032a2: 699b ldr r3, [r3, #24] 80032a4: 4a38 ldr r2, [pc, #224] @ (8003388 ) 80032a6: f043 0308 orr.w r3, r3, #8 80032aa: 6193 str r3, [r2, #24] 80032ac: 4b36 ldr r3, [pc, #216] @ (8003388 ) 80032ae: 699b ldr r3, [r3, #24] 80032b0: f003 0308 and.w r3, r3, #8 80032b4: 603b str r3, [r7, #0] 80032b6: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET); 80032b8: 2200 movs r2, #0 80032ba: f44f 5100 mov.w r1, #8192 @ 0x2000 80032be: 4833 ldr r0, [pc, #204] @ (800338c ) 80032c0: f002 f991 bl 80055e6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin 80032c4: 2200 movs r2, #0 80032c6: f640 413e movw r1, #3134 @ 0xc3e 80032ca: 4831 ldr r0, [pc, #196] @ (8003390 ) 80032cc: f002 f98b bl 80055e6 |EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET); 80032d0: 2200 movs r2, #0 80032d2: f44f 4101 mov.w r1, #33024 @ 0x8100 80032d6: 482f ldr r0, [pc, #188] @ (8003394 ) 80032d8: f002 f985 bl 80055e6 /*Configure GPIO pin : LED2_Pin */ GPIO_InitStruct.Pin = LED2_Pin; 80032dc: f44f 5300 mov.w r3, #8192 @ 0x2000 80032e0: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80032e2: 2301 movs r3, #1 80032e4: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80032e6: 2300 movs r3, #0 80032e8: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80032ea: 2302 movs r3, #2 80032ec: 61fb str r3, [r7, #28] HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct); 80032ee: f107 0310 add.w r3, r7, #16 80032f2: 4619 mov r1, r3 80032f4: 4825 ldr r0, [pc, #148] @ (800338c ) 80032f6: f001 ffdb bl 80052b0 /*Configure GPIO pins : P1_Pin P2_Pin */ GPIO_InitStruct.Pin = P1_Pin|P2_Pin; 80032fa: f44f 4340 mov.w r3, #49152 @ 0xc000 80032fe: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8003300: 2300 movs r3, #0 8003302: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003304: 2300 movs r3, #0 8003306: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8003308: f107 0310 add.w r3, r7, #16 800330c: 4619 mov r1, r3 800330e: 481f ldr r0, [pc, #124] @ (800338c ) 8003310: f001 ffce bl 80052b0 /*Configure GPIO pin : AIN1_Pin */ GPIO_InitStruct.Pin = AIN1_Pin; 8003314: 2310 movs r3, #16 8003316: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8003318: 2303 movs r3, #3 800331a: 617b str r3, [r7, #20] HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct); 800331c: f107 0310 add.w r3, r7, #16 8003320: 4619 mov r1, r3 8003322: 481c ldr r0, [pc, #112] @ (8003394 ) 8003324: f001 ffc4 bl 80052b0 /*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin EXP1_Pin EXP2_Pin EXP3_Pin */ GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin 8003328: f640 433e movw r3, #3134 @ 0xc3e 800332c: 613b str r3, [r7, #16] |EXP1_Pin|EXP2_Pin|EXP3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800332e: 2301 movs r3, #1 8003330: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003332: 2300 movs r3, #0 8003334: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003336: 2302 movs r3, #2 8003338: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800333a: f107 0310 add.w r3, r7, #16 800333e: 4619 mov r1, r3 8003340: 4813 ldr r0, [pc, #76] @ (8003390 ) 8003342: f001 ffb5 bl 80052b0 /*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */ GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin; 8003346: f44f 4370 mov.w r3, #61440 @ 0xf000 800334a: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800334c: 2300 movs r3, #0 800334e: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003350: 2300 movs r3, #0 8003352: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8003354: f107 0310 add.w r3, r7, #16 8003358: 4619 mov r1, r3 800335a: 480d ldr r0, [pc, #52] @ (8003390 ) 800335c: f001 ffa8 bl 80052b0 /*Configure GPIO pins : BUZ_Pin LED1_Pin */ GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin; 8003360: f44f 4301 mov.w r3, #33024 @ 0x8100 8003364: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8003366: 2301 movs r3, #1 8003368: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800336a: 2300 movs r3, #0 800336c: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800336e: 2302 movs r3, #2 8003370: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003372: f107 0310 add.w r3, r7, #16 8003376: 4619 mov r1, r3 8003378: 4806 ldr r0, [pc, #24] @ (8003394 ) 800337a: f001 ff99 bl 80052b0 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 800337e: bf00 nop 8003380: 3720 adds r7, #32 8003382: 46bd mov sp, r7 8003384: bd80 pop {r7, pc} 8003386: bf00 nop 8003388: 40021000 .word 0x40021000 800338c: 40011000 .word 0x40011000 8003390: 40010c00 .word 0x40010c00 8003394: 40010800 .word 0x40010800 08003398 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8003398: b480 push {r7} 800339a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800339c: b672 cpsid i } 800339e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 80033a0: bf00 nop 80033a2: e7fd b.n 80033a0 080033a4 : extern TIM_HandleTypeDef htim3; extern TIM_HandleTypeDef htim4; extern volatile uint8_t rtramp[4]; extern uint8_t mrampstart[4]; bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel) { 80033a4: b580 push {r7, lr} 80033a6: b084 sub sp, #16 80033a8: af00 add r7, sp, #0 80033aa: 6078 str r0, [r7, #4] 80033ac: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel); 80033ae: 6839 ldr r1, [r7, #0] 80033b0: 6878 ldr r0, [r7, #4] 80033b2: f004 fea8 bl 8008106 80033b6: 4603 mov r3, r0 80033b8: 73fb strb r3, [r7, #15] return (chState == HAL_TIM_CHANNEL_STATE_BUSY); 80033ba: 7bfb ldrb r3, [r7, #15] 80033bc: 2b02 cmp r3, #2 80033be: bf0c ite eq 80033c0: 2301 moveq r3, #1 80033c2: 2300 movne r3, #0 80033c4: b2db uxtb r3, r3 } 80033c6: 4618 mov r0, r3 80033c8: 3710 adds r7, #16 80033ca: 46bd mov sp, r7 80033cc: bd80 pop {r7, pc} 080033ce : void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){ 80033ce: b580 push {r7, lr} 80033d0: b082 sub sp, #8 80033d2: af00 add r7, sp, #0 80033d4: 6078 str r0, [r7, #4] 80033d6: 6039 str r1, [r7, #0] HAL_TIM_PWM_Stop(htim, Channel); 80033d8: 6839 ldr r1, [r7, #0] 80033da: 6878 ldr r0, [r7, #4] 80033dc: f004 fca6 bl 8007d2c } 80033e0: bf00 nop 80033e2: 3708 adds r7, #8 80033e4: 46bd mov sp, r7 80033e6: bd80 pop {r7, pc} 080033e8 : void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 80033e8: b580 push {r7, lr} 80033ea: b084 sub sp, #16 80033ec: af00 add r7, sp, #0 80033ee: 60f8 str r0, [r7, #12] 80033f0: 60b9 str r1, [r7, #8] 80033f2: 4613 mov r3, r2 80033f4: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80033f6: 68bb ldr r3, [r7, #8] 80033f8: 2b00 cmp r3, #0 80033fa: d104 bne.n 8003406 80033fc: 68fb ldr r3, [r7, #12] 80033fe: 681b ldr r3, [r3, #0] 8003400: 88fa ldrh r2, [r7, #6] 8003402: 635a str r2, [r3, #52] @ 0x34 8003404: e013 b.n 800342e 8003406: 68bb ldr r3, [r7, #8] 8003408: 2b04 cmp r3, #4 800340a: d104 bne.n 8003416 800340c: 68fb ldr r3, [r7, #12] 800340e: 681a ldr r2, [r3, #0] 8003410: 88fb ldrh r3, [r7, #6] 8003412: 6393 str r3, [r2, #56] @ 0x38 8003414: e00b b.n 800342e 8003416: 68bb ldr r3, [r7, #8] 8003418: 2b08 cmp r3, #8 800341a: d104 bne.n 8003426 800341c: 68fb ldr r3, [r7, #12] 800341e: 681a ldr r2, [r3, #0] 8003420: 88fb ldrh r3, [r7, #6] 8003422: 63d3 str r3, [r2, #60] @ 0x3c 8003424: e003 b.n 800342e 8003426: 68fb ldr r3, [r7, #12] 8003428: 681a ldr r2, [r3, #0] 800342a: 88fb ldrh r3, [r7, #6] 800342c: 6413 str r3, [r2, #64] @ 0x40 HAL_TIM_PWM_Start(htim, Channel); 800342e: 68b9 ldr r1, [r7, #8] 8003430: 68f8 ldr r0, [r7, #12] 8003432: f004 fbd9 bl 8007be8 } 8003436: bf00 nop 8003438: 3710 adds r7, #16 800343a: 46bd mov sp, r7 800343c: bd80 pop {r7, pc} 0800343e : void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 800343e: b480 push {r7} 8003440: b085 sub sp, #20 8003442: af00 add r7, sp, #0 8003444: 60f8 str r0, [r7, #12] 8003446: 60b9 str r1, [r7, #8] 8003448: 4613 mov r3, r2 800344a: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 800344c: 68bb ldr r3, [r7, #8] 800344e: 2b00 cmp r3, #0 8003450: d104 bne.n 800345c 8003452: 68fb ldr r3, [r7, #12] 8003454: 681b ldr r3, [r3, #0] 8003456: 88fa ldrh r2, [r7, #6] 8003458: 635a str r2, [r3, #52] @ 0x34 } 800345a: e013 b.n 8003484 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 800345c: 68bb ldr r3, [r7, #8] 800345e: 2b04 cmp r3, #4 8003460: d104 bne.n 800346c 8003462: 68fb ldr r3, [r7, #12] 8003464: 681a ldr r2, [r3, #0] 8003466: 88fb ldrh r3, [r7, #6] 8003468: 6393 str r3, [r2, #56] @ 0x38 } 800346a: e00b b.n 8003484 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 800346c: 68bb ldr r3, [r7, #8] 800346e: 2b08 cmp r3, #8 8003470: d104 bne.n 800347c 8003472: 68fb ldr r3, [r7, #12] 8003474: 681a ldr r2, [r3, #0] 8003476: 88fb ldrh r3, [r7, #6] 8003478: 63d3 str r3, [r2, #60] @ 0x3c } 800347a: e003 b.n 8003484 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 800347c: 68fb ldr r3, [r7, #12] 800347e: 681a ldr r2, [r3, #0] 8003480: 88fb ldrh r3, [r7, #6] 8003482: 6413 str r3, [r2, #64] @ 0x40 } 8003484: bf00 nop 8003486: 3714 adds r7, #20 8003488: 46bd mov sp, r7 800348a: bc80 pop {r7} 800348c: 4770 bx lr ... 08003490 : void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){ 8003490: b580 push {r7, lr} 8003492: b082 sub sp, #8 8003494: af00 add r7, sp, #0 8003496: 4603 mov r3, r0 8003498: 71fb strb r3, [r7, #7] 800349a: 460b mov r3, r1 800349c: 71bb strb r3, [r7, #6] 800349e: 4613 mov r3, r2 80034a0: 80bb strh r3, [r7, #4] switch(mot){ 80034a2: 79fb ldrb r3, [r7, #7] 80034a4: 3b01 subs r3, #1 80034a6: 2b03 cmp r3, #3 80034a8: f200 8158 bhi.w 800375c 80034ac: a201 add r2, pc, #4 @ (adr r2, 80034b4 ) 80034ae: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80034b2: bf00 nop 80034b4: 080034c5 .word 0x080034c5 80034b8: 08003567 .word 0x08003567 80034bc: 08003609 .word 0x08003609 80034c0: 080036b3 .word 0x080036b3 case 1: if(dir==FW){ 80034c4: 79bb ldrb r3, [r7, #6] 80034c6: 2b00 cmp r3, #0 80034c8: d126 bne.n 8003518 if(pwmval==0){ 80034ca: 88bb ldrh r3, [r7, #4] 80034cc: 2b00 cmp r3, #0 80034ce: d109 bne.n 80034e4 StopMot(timMot1,FWMot1); 80034d0: 2100 movs r1, #0 80034d2: 48a5 ldr r0, [pc, #660] @ (8003768 ) 80034d4: f7ff ff7b bl 80033ce HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 80034d8: 2200 movs r2, #0 80034da: 2102 movs r1, #2 80034dc: 48a3 ldr r0, [pc, #652] @ (800376c ) 80034de: f002 f882 bl 80055e6 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); StartMot(timMot1,BWMot1,pwmval); } } break; 80034e2: e13c b.n 800375e }else if(IsPwmRunning(timMot1, FWMot1)){ 80034e4: 2100 movs r1, #0 80034e6: 48a0 ldr r0, [pc, #640] @ (8003768 ) 80034e8: f7ff ff5c bl 80033a4 80034ec: 4603 mov r3, r0 80034ee: 2b00 cmp r3, #0 80034f0: d006 beq.n 8003500 SetMotPwm(timMot1,FWMot1,pwmval); 80034f2: 88bb ldrh r3, [r7, #4] 80034f4: 461a mov r2, r3 80034f6: 2100 movs r1, #0 80034f8: 489b ldr r0, [pc, #620] @ (8003768 ) 80034fa: f7ff ffa0 bl 800343e break; 80034fe: e12e b.n 800375e HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 8003500: 2201 movs r2, #1 8003502: 2102 movs r1, #2 8003504: 4899 ldr r0, [pc, #612] @ (800376c ) 8003506: f002 f86e bl 80055e6 StartMot(timMot1,FWMot1,pwmval); 800350a: 88bb ldrh r3, [r7, #4] 800350c: 461a mov r2, r3 800350e: 2100 movs r1, #0 8003510: 4895 ldr r0, [pc, #596] @ (8003768 ) 8003512: f7ff ff69 bl 80033e8 break; 8003516: e122 b.n 800375e if(pwmval==0){ 8003518: 88bb ldrh r3, [r7, #4] 800351a: 2b00 cmp r3, #0 800351c: d109 bne.n 8003532 StopMot(timMot1,BWMot1); 800351e: 2104 movs r1, #4 8003520: 4891 ldr r0, [pc, #580] @ (8003768 ) 8003522: f7ff ff54 bl 80033ce HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8003526: 2200 movs r2, #0 8003528: 2102 movs r1, #2 800352a: 4890 ldr r0, [pc, #576] @ (800376c ) 800352c: f002 f85b bl 80055e6 break; 8003530: e115 b.n 800375e }else if(IsPwmRunning(timMot1, BWMot1)){ 8003532: 2104 movs r1, #4 8003534: 488c ldr r0, [pc, #560] @ (8003768 ) 8003536: f7ff ff35 bl 80033a4 800353a: 4603 mov r3, r0 800353c: 2b00 cmp r3, #0 800353e: d006 beq.n 800354e SetMotPwm(timMot1,BWMot1,pwmval); 8003540: 88bb ldrh r3, [r7, #4] 8003542: 461a mov r2, r3 8003544: 2104 movs r1, #4 8003546: 4888 ldr r0, [pc, #544] @ (8003768 ) 8003548: f7ff ff79 bl 800343e break; 800354c: e107 b.n 800375e HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 800354e: 2201 movs r2, #1 8003550: 2102 movs r1, #2 8003552: 4886 ldr r0, [pc, #536] @ (800376c ) 8003554: f002 f847 bl 80055e6 StartMot(timMot1,BWMot1,pwmval); 8003558: 88bb ldrh r3, [r7, #4] 800355a: 461a mov r2, r3 800355c: 2104 movs r1, #4 800355e: 4882 ldr r0, [pc, #520] @ (8003768 ) 8003560: f7ff ff42 bl 80033e8 break; 8003564: e0fb b.n 800375e case 2: if(dir==FW){ 8003566: 79bb ldrb r3, [r7, #6] 8003568: 2b00 cmp r3, #0 800356a: d126 bne.n 80035ba if(pwmval==0){ 800356c: 88bb ldrh r3, [r7, #4] 800356e: 2b00 cmp r3, #0 8003570: d109 bne.n 8003586 StopMot(timMot2,FWMot2); 8003572: 2108 movs r1, #8 8003574: 487c ldr r0, [pc, #496] @ (8003768 ) 8003576: f7ff ff2a bl 80033ce HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 800357a: 2200 movs r2, #0 800357c: 2104 movs r1, #4 800357e: 487b ldr r0, [pc, #492] @ (800376c ) 8003580: f002 f831 bl 80055e6 }else{ HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); StartMot(timMot2,BWMot2,pwmval); } } break; 8003584: e0eb b.n 800375e }else if(IsPwmRunning(timMot2, FWMot2)){ 8003586: 2108 movs r1, #8 8003588: 4877 ldr r0, [pc, #476] @ (8003768 ) 800358a: f7ff ff0b bl 80033a4 800358e: 4603 mov r3, r0 8003590: 2b00 cmp r3, #0 8003592: d006 beq.n 80035a2 SetMotPwm(timMot2,FWMot2,pwmval); 8003594: 88bb ldrh r3, [r7, #4] 8003596: 461a mov r2, r3 8003598: 2108 movs r1, #8 800359a: 4873 ldr r0, [pc, #460] @ (8003768 ) 800359c: f7ff ff4f bl 800343e break; 80035a0: e0dd b.n 800375e HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 80035a2: 2201 movs r2, #1 80035a4: 2104 movs r1, #4 80035a6: 4871 ldr r0, [pc, #452] @ (800376c ) 80035a8: f002 f81d bl 80055e6 StartMot(timMot2,FWMot2,pwmval); 80035ac: 88bb ldrh r3, [r7, #4] 80035ae: 461a mov r2, r3 80035b0: 2108 movs r1, #8 80035b2: 486d ldr r0, [pc, #436] @ (8003768 ) 80035b4: f7ff ff18 bl 80033e8 break; 80035b8: e0d1 b.n 800375e if(pwmval==0){ 80035ba: 88bb ldrh r3, [r7, #4] 80035bc: 2b00 cmp r3, #0 80035be: d109 bne.n 80035d4 StopMot(timMot2,BWMot2); 80035c0: 210c movs r1, #12 80035c2: 4869 ldr r0, [pc, #420] @ (8003768 ) 80035c4: f7ff ff03 bl 80033ce HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 80035c8: 2200 movs r2, #0 80035ca: 2104 movs r1, #4 80035cc: 4867 ldr r0, [pc, #412] @ (800376c ) 80035ce: f002 f80a bl 80055e6 break; 80035d2: e0c4 b.n 800375e }else if(IsPwmRunning(timMot2, BWMot2)){ 80035d4: 210c movs r1, #12 80035d6: 4864 ldr r0, [pc, #400] @ (8003768 ) 80035d8: f7ff fee4 bl 80033a4 80035dc: 4603 mov r3, r0 80035de: 2b00 cmp r3, #0 80035e0: d006 beq.n 80035f0 SetMotPwm(timMot2,BWMot2,pwmval); 80035e2: 88bb ldrh r3, [r7, #4] 80035e4: 461a mov r2, r3 80035e6: 210c movs r1, #12 80035e8: 485f ldr r0, [pc, #380] @ (8003768 ) 80035ea: f7ff ff28 bl 800343e break; 80035ee: e0b6 b.n 800375e HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 80035f0: 2201 movs r2, #1 80035f2: 2104 movs r1, #4 80035f4: 485d ldr r0, [pc, #372] @ (800376c ) 80035f6: f001 fff6 bl 80055e6 StartMot(timMot2,BWMot2,pwmval); 80035fa: 88bb ldrh r3, [r7, #4] 80035fc: 461a mov r2, r3 80035fe: 210c movs r1, #12 8003600: 4859 ldr r0, [pc, #356] @ (8003768 ) 8003602: f7ff fef1 bl 80033e8 break; 8003606: e0aa b.n 800375e case 3: if(dir==FW){ 8003608: 79bb ldrb r3, [r7, #6] 800360a: 2b00 cmp r3, #0 800360c: d128 bne.n 8003660 if(pwmval==0){ 800360e: 88bb ldrh r3, [r7, #4] 8003610: 2b00 cmp r3, #0 8003612: d10a bne.n 800362a StopMot(timMot3,FWMot3); 8003614: 2100 movs r1, #0 8003616: 4856 ldr r0, [pc, #344] @ (8003770 ) 8003618: f7ff fed9 bl 80033ce HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 800361c: 2200 movs r2, #0 800361e: f44f 6180 mov.w r1, #1024 @ 0x400 8003622: 4852 ldr r0, [pc, #328] @ (800376c ) 8003624: f001 ffdf bl 80055e6 }else{ HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); StartMot(timMot3,BWMot3,pwmval); } } break; 8003628: e099 b.n 800375e }else if(IsPwmRunning(timMot3, FWMot3)){ 800362a: 2100 movs r1, #0 800362c: 4850 ldr r0, [pc, #320] @ (8003770 ) 800362e: f7ff feb9 bl 80033a4 8003632: 4603 mov r3, r0 8003634: 2b00 cmp r3, #0 8003636: d006 beq.n 8003646 SetMotPwm(timMot3,FWMot3,pwmval); 8003638: 88bb ldrh r3, [r7, #4] 800363a: 461a mov r2, r3 800363c: 2100 movs r1, #0 800363e: 484c ldr r0, [pc, #304] @ (8003770 ) 8003640: f7ff fefd bl 800343e break; 8003644: e08b b.n 800375e HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8003646: 2201 movs r2, #1 8003648: f44f 6180 mov.w r1, #1024 @ 0x400 800364c: 4847 ldr r0, [pc, #284] @ (800376c ) 800364e: f001 ffca bl 80055e6 StartMot(timMot3,FWMot3,pwmval); 8003652: 88bb ldrh r3, [r7, #4] 8003654: 461a mov r2, r3 8003656: 2100 movs r1, #0 8003658: 4845 ldr r0, [pc, #276] @ (8003770 ) 800365a: f7ff fec5 bl 80033e8 break; 800365e: e07e b.n 800375e if(pwmval==0){ 8003660: 88bb ldrh r3, [r7, #4] 8003662: 2b00 cmp r3, #0 8003664: d10a bne.n 800367c StopMot(timMot3,BWMot3); 8003666: 2104 movs r1, #4 8003668: 4841 ldr r0, [pc, #260] @ (8003770 ) 800366a: f7ff feb0 bl 80033ce HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 800366e: 2200 movs r2, #0 8003670: f44f 6180 mov.w r1, #1024 @ 0x400 8003674: 483d ldr r0, [pc, #244] @ (800376c ) 8003676: f001 ffb6 bl 80055e6 break; 800367a: e070 b.n 800375e }else if(IsPwmRunning(timMot3, BWMot3)){ 800367c: 2104 movs r1, #4 800367e: 483c ldr r0, [pc, #240] @ (8003770 ) 8003680: f7ff fe90 bl 80033a4 8003684: 4603 mov r3, r0 8003686: 2b00 cmp r3, #0 8003688: d006 beq.n 8003698 SetMotPwm(timMot3,BWMot3,pwmval); 800368a: 88bb ldrh r3, [r7, #4] 800368c: 461a mov r2, r3 800368e: 2104 movs r1, #4 8003690: 4837 ldr r0, [pc, #220] @ (8003770 ) 8003692: f7ff fed4 bl 800343e break; 8003696: e062 b.n 800375e HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8003698: 2201 movs r2, #1 800369a: f44f 6180 mov.w r1, #1024 @ 0x400 800369e: 4833 ldr r0, [pc, #204] @ (800376c ) 80036a0: f001 ffa1 bl 80055e6 StartMot(timMot3,BWMot3,pwmval); 80036a4: 88bb ldrh r3, [r7, #4] 80036a6: 461a mov r2, r3 80036a8: 2104 movs r1, #4 80036aa: 4831 ldr r0, [pc, #196] @ (8003770 ) 80036ac: f7ff fe9c bl 80033e8 break; 80036b0: e055 b.n 800375e case 4: if(dir==FW){ 80036b2: 79bb ldrb r3, [r7, #6] 80036b4: 2b00 cmp r3, #0 80036b6: d128 bne.n 800370a if(pwmval==0){ 80036b8: 88bb ldrh r3, [r7, #4] 80036ba: 2b00 cmp r3, #0 80036bc: d10a bne.n 80036d4 StopMot(timMot4,FWMot4); 80036be: 2108 movs r1, #8 80036c0: 482b ldr r0, [pc, #172] @ (8003770 ) 80036c2: f7ff fe84 bl 80033ce HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 80036c6: 2200 movs r2, #0 80036c8: f44f 6100 mov.w r1, #2048 @ 0x800 80036cc: 4827 ldr r0, [pc, #156] @ (800376c ) 80036ce: f001 ff8a bl 80055e6 }else{ HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); StartMot(timMot4,BWMot4,pwmval); } } break; 80036d2: e044 b.n 800375e }else if(IsPwmRunning(timMot4, FWMot4)){ 80036d4: 2108 movs r1, #8 80036d6: 4826 ldr r0, [pc, #152] @ (8003770 ) 80036d8: f7ff fe64 bl 80033a4 80036dc: 4603 mov r3, r0 80036de: 2b00 cmp r3, #0 80036e0: d006 beq.n 80036f0 SetMotPwm(timMot4,FWMot4,pwmval); 80036e2: 88bb ldrh r3, [r7, #4] 80036e4: 461a mov r2, r3 80036e6: 2108 movs r1, #8 80036e8: 4821 ldr r0, [pc, #132] @ (8003770 ) 80036ea: f7ff fea8 bl 800343e break; 80036ee: e036 b.n 800375e HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 80036f0: 2201 movs r2, #1 80036f2: f44f 6100 mov.w r1, #2048 @ 0x800 80036f6: 481d ldr r0, [pc, #116] @ (800376c ) 80036f8: f001 ff75 bl 80055e6 StartMot(timMot4,FWMot4,pwmval); 80036fc: 88bb ldrh r3, [r7, #4] 80036fe: 461a mov r2, r3 8003700: 2108 movs r1, #8 8003702: 481b ldr r0, [pc, #108] @ (8003770 ) 8003704: f7ff fe70 bl 80033e8 break; 8003708: e029 b.n 800375e if(pwmval==0){ 800370a: 88bb ldrh r3, [r7, #4] 800370c: 2b00 cmp r3, #0 800370e: d10a bne.n 8003726 StopMot(timMot4,BWMot4); 8003710: 210c movs r1, #12 8003712: 4817 ldr r0, [pc, #92] @ (8003770 ) 8003714: f7ff fe5b bl 80033ce HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 8003718: 2200 movs r2, #0 800371a: f44f 6100 mov.w r1, #2048 @ 0x800 800371e: 4813 ldr r0, [pc, #76] @ (800376c ) 8003720: f001 ff61 bl 80055e6 break; 8003724: e01b b.n 800375e }else if(IsPwmRunning(timMot4, BWMot4)){ 8003726: 210c movs r1, #12 8003728: 4811 ldr r0, [pc, #68] @ (8003770 ) 800372a: f7ff fe3b bl 80033a4 800372e: 4603 mov r3, r0 8003730: 2b00 cmp r3, #0 8003732: d006 beq.n 8003742 SetMotPwm(timMot4,BWMot4,pwmval); 8003734: 88bb ldrh r3, [r7, #4] 8003736: 461a mov r2, r3 8003738: 210c movs r1, #12 800373a: 480d ldr r0, [pc, #52] @ (8003770 ) 800373c: f7ff fe7f bl 800343e break; 8003740: e00d b.n 800375e HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8003742: 2201 movs r2, #1 8003744: f44f 6100 mov.w r1, #2048 @ 0x800 8003748: 4808 ldr r0, [pc, #32] @ (800376c ) 800374a: f001 ff4c bl 80055e6 StartMot(timMot4,BWMot4,pwmval); 800374e: 88bb ldrh r3, [r7, #4] 8003750: 461a mov r2, r3 8003752: 210c movs r1, #12 8003754: 4806 ldr r0, [pc, #24] @ (8003770 ) 8003756: f7ff fe47 bl 80033e8 break; 800375a: e000 b.n 800375e default: break; 800375c: bf00 nop } } 800375e: bf00 nop 8003760: 3708 adds r7, #8 8003762: 46bd mov sp, r7 8003764: bd80 pop {r7, pc} 8003766: bf00 nop 8003768: 20000310 .word 0x20000310 800376c: 40010c00 .word 0x40010c00 8003770: 20000358 .word 0x20000358 08003774 : void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){ 8003774: b580 push {r7, lr} 8003776: b084 sub sp, #16 8003778: af00 add r7, sp, #0 800377a: 4603 mov r3, r0 800377c: 71fb strb r3, [r7, #7] 800377e: 460b mov r3, r1 8003780: 71bb strb r3, [r7, #6] 8003782: 4613 mov r3, r2 8003784: 717b strb r3, [r7, #5] uint16_t pwmval; uint32_t tempval; tempval=perc; 8003786: 797b ldrb r3, [r7, #5] 8003788: 60fb str r3, [r7, #12] tempval*=16384; 800378a: 68fb ldr r3, [r7, #12] 800378c: 039b lsls r3, r3, #14 800378e: 60fb str r3, [r7, #12] tempval/=100; 8003790: 68fb ldr r3, [r7, #12] 8003792: 4ab4 ldr r2, [pc, #720] @ (8003a64 ) 8003794: fba2 2303 umull r2, r3, r2, r3 8003798: 095b lsrs r3, r3, #5 800379a: 60fb str r3, [r7, #12] pwmval=(uint16_t)tempval; 800379c: 68fb ldr r3, [r7, #12] 800379e: 817b strh r3, [r7, #10] switch(mot){ 80037a0: 79fb ldrb r3, [r7, #7] 80037a2: 3b01 subs r3, #1 80037a4: 2b03 cmp r3, #3 80037a6: f200 8157 bhi.w 8003a58 80037aa: a201 add r2, pc, #4 @ (adr r2, 80037b0 ) 80037ac: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80037b0: 080037c1 .word 0x080037c1 80037b4: 08003863 .word 0x08003863 80037b8: 08003905 .word 0x08003905 80037bc: 080039af .word 0x080039af case 1: if(dir==FW){ 80037c0: 79bb ldrb r3, [r7, #6] 80037c2: 2b00 cmp r3, #0 80037c4: d126 bne.n 8003814 if(pwmval==0){ 80037c6: 897b ldrh r3, [r7, #10] 80037c8: 2b00 cmp r3, #0 80037ca: d109 bne.n 80037e0 StopMot(timMot1,FWMot1); 80037cc: 2100 movs r1, #0 80037ce: 48a6 ldr r0, [pc, #664] @ (8003a68 ) 80037d0: f7ff fdfd bl 80033ce HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 80037d4: 2200 movs r2, #0 80037d6: 2102 movs r1, #2 80037d8: 48a4 ldr r0, [pc, #656] @ (8003a6c ) 80037da: f001 ff04 bl 80055e6 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); StartMot(timMot1,BWMot1,pwmval); } } break; 80037de: e13c b.n 8003a5a }else if(IsPwmRunning(timMot1, FWMot1)){ 80037e0: 2100 movs r1, #0 80037e2: 48a1 ldr r0, [pc, #644] @ (8003a68 ) 80037e4: f7ff fdde bl 80033a4 80037e8: 4603 mov r3, r0 80037ea: 2b00 cmp r3, #0 80037ec: d006 beq.n 80037fc SetMotPwm(timMot1,FWMot1,pwmval); 80037ee: 897b ldrh r3, [r7, #10] 80037f0: 461a mov r2, r3 80037f2: 2100 movs r1, #0 80037f4: 489c ldr r0, [pc, #624] @ (8003a68 ) 80037f6: f7ff fe22 bl 800343e break; 80037fa: e12e b.n 8003a5a HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 80037fc: 2201 movs r2, #1 80037fe: 2102 movs r1, #2 8003800: 489a ldr r0, [pc, #616] @ (8003a6c ) 8003802: f001 fef0 bl 80055e6 StartMot(timMot1,FWMot1,pwmval); 8003806: 897b ldrh r3, [r7, #10] 8003808: 461a mov r2, r3 800380a: 2100 movs r1, #0 800380c: 4896 ldr r0, [pc, #600] @ (8003a68 ) 800380e: f7ff fdeb bl 80033e8 break; 8003812: e122 b.n 8003a5a if(pwmval==0){ 8003814: 897b ldrh r3, [r7, #10] 8003816: 2b00 cmp r3, #0 8003818: d109 bne.n 800382e StopMot(timMot1,BWMot1); 800381a: 2104 movs r1, #4 800381c: 4892 ldr r0, [pc, #584] @ (8003a68 ) 800381e: f7ff fdd6 bl 80033ce HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8003822: 2200 movs r2, #0 8003824: 2102 movs r1, #2 8003826: 4891 ldr r0, [pc, #580] @ (8003a6c ) 8003828: f001 fedd bl 80055e6 break; 800382c: e115 b.n 8003a5a }else if(IsPwmRunning(timMot1, BWMot1)){ 800382e: 2104 movs r1, #4 8003830: 488d ldr r0, [pc, #564] @ (8003a68 ) 8003832: f7ff fdb7 bl 80033a4 8003836: 4603 mov r3, r0 8003838: 2b00 cmp r3, #0 800383a: d006 beq.n 800384a SetMotPwm(timMot1,BWMot1,pwmval); 800383c: 897b ldrh r3, [r7, #10] 800383e: 461a mov r2, r3 8003840: 2104 movs r1, #4 8003842: 4889 ldr r0, [pc, #548] @ (8003a68 ) 8003844: f7ff fdfb bl 800343e break; 8003848: e107 b.n 8003a5a HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 800384a: 2201 movs r2, #1 800384c: 2102 movs r1, #2 800384e: 4887 ldr r0, [pc, #540] @ (8003a6c ) 8003850: f001 fec9 bl 80055e6 StartMot(timMot1,BWMot1,pwmval); 8003854: 897b ldrh r3, [r7, #10] 8003856: 461a mov r2, r3 8003858: 2104 movs r1, #4 800385a: 4883 ldr r0, [pc, #524] @ (8003a68 ) 800385c: f7ff fdc4 bl 80033e8 break; 8003860: e0fb b.n 8003a5a case 2: if(dir==FW){ 8003862: 79bb ldrb r3, [r7, #6] 8003864: 2b00 cmp r3, #0 8003866: d126 bne.n 80038b6 if(pwmval==0){ 8003868: 897b ldrh r3, [r7, #10] 800386a: 2b00 cmp r3, #0 800386c: d109 bne.n 8003882 StopMot(timMot2,FWMot2); 800386e: 2108 movs r1, #8 8003870: 487d ldr r0, [pc, #500] @ (8003a68 ) 8003872: f7ff fdac bl 80033ce HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 8003876: 2200 movs r2, #0 8003878: 2104 movs r1, #4 800387a: 487c ldr r0, [pc, #496] @ (8003a6c ) 800387c: f001 feb3 bl 80055e6 }else{ HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); StartMot(timMot2,BWMot2,pwmval); } } break; 8003880: e0eb b.n 8003a5a }else if(IsPwmRunning(timMot2, FWMot2)){ 8003882: 2108 movs r1, #8 8003884: 4878 ldr r0, [pc, #480] @ (8003a68 ) 8003886: f7ff fd8d bl 80033a4 800388a: 4603 mov r3, r0 800388c: 2b00 cmp r3, #0 800388e: d006 beq.n 800389e SetMotPwm(timMot2,FWMot2,pwmval); 8003890: 897b ldrh r3, [r7, #10] 8003892: 461a mov r2, r3 8003894: 2108 movs r1, #8 8003896: 4874 ldr r0, [pc, #464] @ (8003a68 ) 8003898: f7ff fdd1 bl 800343e break; 800389c: e0dd b.n 8003a5a HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 800389e: 2201 movs r2, #1 80038a0: 2104 movs r1, #4 80038a2: 4872 ldr r0, [pc, #456] @ (8003a6c ) 80038a4: f001 fe9f bl 80055e6 StartMot(timMot2,FWMot2,pwmval); 80038a8: 897b ldrh r3, [r7, #10] 80038aa: 461a mov r2, r3 80038ac: 2108 movs r1, #8 80038ae: 486e ldr r0, [pc, #440] @ (8003a68 ) 80038b0: f7ff fd9a bl 80033e8 break; 80038b4: e0d1 b.n 8003a5a if(pwmval==0){ 80038b6: 897b ldrh r3, [r7, #10] 80038b8: 2b00 cmp r3, #0 80038ba: d109 bne.n 80038d0 StopMot(timMot2,BWMot2); 80038bc: 210c movs r1, #12 80038be: 486a ldr r0, [pc, #424] @ (8003a68 ) 80038c0: f7ff fd85 bl 80033ce HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 80038c4: 2200 movs r2, #0 80038c6: 2104 movs r1, #4 80038c8: 4868 ldr r0, [pc, #416] @ (8003a6c ) 80038ca: f001 fe8c bl 80055e6 break; 80038ce: e0c4 b.n 8003a5a }else if(IsPwmRunning(timMot2, BWMot2)){ 80038d0: 210c movs r1, #12 80038d2: 4865 ldr r0, [pc, #404] @ (8003a68 ) 80038d4: f7ff fd66 bl 80033a4 80038d8: 4603 mov r3, r0 80038da: 2b00 cmp r3, #0 80038dc: d006 beq.n 80038ec SetMotPwm(timMot2,BWMot2,pwmval); 80038de: 897b ldrh r3, [r7, #10] 80038e0: 461a mov r2, r3 80038e2: 210c movs r1, #12 80038e4: 4860 ldr r0, [pc, #384] @ (8003a68 ) 80038e6: f7ff fdaa bl 800343e break; 80038ea: e0b6 b.n 8003a5a HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 80038ec: 2201 movs r2, #1 80038ee: 2104 movs r1, #4 80038f0: 485e ldr r0, [pc, #376] @ (8003a6c ) 80038f2: f001 fe78 bl 80055e6 StartMot(timMot2,BWMot2,pwmval); 80038f6: 897b ldrh r3, [r7, #10] 80038f8: 461a mov r2, r3 80038fa: 210c movs r1, #12 80038fc: 485a ldr r0, [pc, #360] @ (8003a68 ) 80038fe: f7ff fd73 bl 80033e8 break; 8003902: e0aa b.n 8003a5a case 3: if(dir==FW){ 8003904: 79bb ldrb r3, [r7, #6] 8003906: 2b00 cmp r3, #0 8003908: d128 bne.n 800395c if(pwmval==0){ 800390a: 897b ldrh r3, [r7, #10] 800390c: 2b00 cmp r3, #0 800390e: d10a bne.n 8003926 StopMot(timMot3,FWMot3); 8003910: 2100 movs r1, #0 8003912: 4857 ldr r0, [pc, #348] @ (8003a70 ) 8003914: f7ff fd5b bl 80033ce HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8003918: 2200 movs r2, #0 800391a: f44f 6180 mov.w r1, #1024 @ 0x400 800391e: 4853 ldr r0, [pc, #332] @ (8003a6c ) 8003920: f001 fe61 bl 80055e6 }else{ HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); StartMot(timMot3,BWMot3,pwmval); } } break; 8003924: e099 b.n 8003a5a }else if(IsPwmRunning(timMot3, FWMot3)){ 8003926: 2100 movs r1, #0 8003928: 4851 ldr r0, [pc, #324] @ (8003a70 ) 800392a: f7ff fd3b bl 80033a4 800392e: 4603 mov r3, r0 8003930: 2b00 cmp r3, #0 8003932: d006 beq.n 8003942 SetMotPwm(timMot3,FWMot3,pwmval); 8003934: 897b ldrh r3, [r7, #10] 8003936: 461a mov r2, r3 8003938: 2100 movs r1, #0 800393a: 484d ldr r0, [pc, #308] @ (8003a70 ) 800393c: f7ff fd7f bl 800343e break; 8003940: e08b b.n 8003a5a HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8003942: 2201 movs r2, #1 8003944: f44f 6180 mov.w r1, #1024 @ 0x400 8003948: 4848 ldr r0, [pc, #288] @ (8003a6c ) 800394a: f001 fe4c bl 80055e6 StartMot(timMot3,FWMot3,pwmval); 800394e: 897b ldrh r3, [r7, #10] 8003950: 461a mov r2, r3 8003952: 2100 movs r1, #0 8003954: 4846 ldr r0, [pc, #280] @ (8003a70 ) 8003956: f7ff fd47 bl 80033e8 break; 800395a: e07e b.n 8003a5a if(pwmval==0){ 800395c: 897b ldrh r3, [r7, #10] 800395e: 2b00 cmp r3, #0 8003960: d10a bne.n 8003978 StopMot(timMot3,BWMot3); 8003962: 2104 movs r1, #4 8003964: 4842 ldr r0, [pc, #264] @ (8003a70 ) 8003966: f7ff fd32 bl 80033ce HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 800396a: 2200 movs r2, #0 800396c: f44f 6180 mov.w r1, #1024 @ 0x400 8003970: 483e ldr r0, [pc, #248] @ (8003a6c ) 8003972: f001 fe38 bl 80055e6 break; 8003976: e070 b.n 8003a5a }else if(IsPwmRunning(timMot3, BWMot3)){ 8003978: 2104 movs r1, #4 800397a: 483d ldr r0, [pc, #244] @ (8003a70 ) 800397c: f7ff fd12 bl 80033a4 8003980: 4603 mov r3, r0 8003982: 2b00 cmp r3, #0 8003984: d006 beq.n 8003994 SetMotPwm(timMot3,BWMot3,pwmval); 8003986: 897b ldrh r3, [r7, #10] 8003988: 461a mov r2, r3 800398a: 2104 movs r1, #4 800398c: 4838 ldr r0, [pc, #224] @ (8003a70 ) 800398e: f7ff fd56 bl 800343e break; 8003992: e062 b.n 8003a5a HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8003994: 2201 movs r2, #1 8003996: f44f 6180 mov.w r1, #1024 @ 0x400 800399a: 4834 ldr r0, [pc, #208] @ (8003a6c ) 800399c: f001 fe23 bl 80055e6 StartMot(timMot3,BWMot3,pwmval); 80039a0: 897b ldrh r3, [r7, #10] 80039a2: 461a mov r2, r3 80039a4: 2104 movs r1, #4 80039a6: 4832 ldr r0, [pc, #200] @ (8003a70 ) 80039a8: f7ff fd1e bl 80033e8 break; 80039ac: e055 b.n 8003a5a case 4: if(dir==FW){ 80039ae: 79bb ldrb r3, [r7, #6] 80039b0: 2b00 cmp r3, #0 80039b2: d128 bne.n 8003a06 if(pwmval==0){ 80039b4: 897b ldrh r3, [r7, #10] 80039b6: 2b00 cmp r3, #0 80039b8: d10a bne.n 80039d0 StopMot(timMot4,FWMot4); 80039ba: 2108 movs r1, #8 80039bc: 482c ldr r0, [pc, #176] @ (8003a70 ) 80039be: f7ff fd06 bl 80033ce HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 80039c2: 2200 movs r2, #0 80039c4: f44f 6100 mov.w r1, #2048 @ 0x800 80039c8: 4828 ldr r0, [pc, #160] @ (8003a6c ) 80039ca: f001 fe0c bl 80055e6 }else{ HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); StartMot(timMot4,BWMot4,pwmval); } } break; 80039ce: e044 b.n 8003a5a }else if(IsPwmRunning(timMot4, FWMot4)){ 80039d0: 2108 movs r1, #8 80039d2: 4827 ldr r0, [pc, #156] @ (8003a70 ) 80039d4: f7ff fce6 bl 80033a4 80039d8: 4603 mov r3, r0 80039da: 2b00 cmp r3, #0 80039dc: d006 beq.n 80039ec SetMotPwm(timMot4,FWMot4,pwmval); 80039de: 897b ldrh r3, [r7, #10] 80039e0: 461a mov r2, r3 80039e2: 2108 movs r1, #8 80039e4: 4822 ldr r0, [pc, #136] @ (8003a70 ) 80039e6: f7ff fd2a bl 800343e break; 80039ea: e036 b.n 8003a5a HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 80039ec: 2201 movs r2, #1 80039ee: f44f 6100 mov.w r1, #2048 @ 0x800 80039f2: 481e ldr r0, [pc, #120] @ (8003a6c ) 80039f4: f001 fdf7 bl 80055e6 StartMot(timMot4,FWMot4,pwmval); 80039f8: 897b ldrh r3, [r7, #10] 80039fa: 461a mov r2, r3 80039fc: 2108 movs r1, #8 80039fe: 481c ldr r0, [pc, #112] @ (8003a70 ) 8003a00: f7ff fcf2 bl 80033e8 break; 8003a04: e029 b.n 8003a5a if(pwmval==0){ 8003a06: 897b ldrh r3, [r7, #10] 8003a08: 2b00 cmp r3, #0 8003a0a: d10a bne.n 8003a22 StopMot(timMot4,BWMot4); 8003a0c: 210c movs r1, #12 8003a0e: 4818 ldr r0, [pc, #96] @ (8003a70 ) 8003a10: f7ff fcdd bl 80033ce HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 8003a14: 2200 movs r2, #0 8003a16: f44f 6100 mov.w r1, #2048 @ 0x800 8003a1a: 4814 ldr r0, [pc, #80] @ (8003a6c ) 8003a1c: f001 fde3 bl 80055e6 break; 8003a20: e01b b.n 8003a5a }else if(IsPwmRunning(timMot4, BWMot4)){ 8003a22: 210c movs r1, #12 8003a24: 4812 ldr r0, [pc, #72] @ (8003a70 ) 8003a26: f7ff fcbd bl 80033a4 8003a2a: 4603 mov r3, r0 8003a2c: 2b00 cmp r3, #0 8003a2e: d006 beq.n 8003a3e SetMotPwm(timMot4,BWMot4,pwmval); 8003a30: 897b ldrh r3, [r7, #10] 8003a32: 461a mov r2, r3 8003a34: 210c movs r1, #12 8003a36: 480e ldr r0, [pc, #56] @ (8003a70 ) 8003a38: f7ff fd01 bl 800343e break; 8003a3c: e00d b.n 8003a5a HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8003a3e: 2201 movs r2, #1 8003a40: f44f 6100 mov.w r1, #2048 @ 0x800 8003a44: 4809 ldr r0, [pc, #36] @ (8003a6c ) 8003a46: f001 fdce bl 80055e6 StartMot(timMot4,BWMot4,pwmval); 8003a4a: 897b ldrh r3, [r7, #10] 8003a4c: 461a mov r2, r3 8003a4e: 210c movs r1, #12 8003a50: 4807 ldr r0, [pc, #28] @ (8003a70 ) 8003a52: f7ff fcc9 bl 80033e8 break; 8003a56: e000 b.n 8003a5a default: break; 8003a58: bf00 nop } } 8003a5a: bf00 nop 8003a5c: 3710 adds r7, #16 8003a5e: 46bd mov sp, r7 8003a60: bd80 pop {r7, pc} 8003a62: bf00 nop 8003a64: 51eb851f .word 0x51eb851f 8003a68: 20000310 .word 0x20000310 8003a6c: 40010c00 .word 0x40010c00 8003a70: 20000358 .word 0x20000358 08003a74 : uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){ 8003a74: b590 push {r4, r7, lr} 8003a76: b085 sub sp, #20 8003a78: af00 add r7, sp, #0 8003a7a: 4604 mov r4, r0 8003a7c: 4608 mov r0, r1 8003a7e: 4611 mov r1, r2 8003a80: 461a mov r2, r3 8003a82: 4623 mov r3, r4 8003a84: 71fb strb r3, [r7, #7] 8003a86: 4603 mov r3, r0 8003a88: 71bb strb r3, [r7, #6] 8003a8a: 460b mov r3, r1 8003a8c: 717b strb r3, [r7, #5] 8003a8e: 4613 mov r3, r2 8003a90: 713b strb r3, [r7, #4] static uint8_t memrtramp[4]; uint16_t delta; switch(mode){ 8003a92: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 8003a96: 2b00 cmp r3, #0 8003a98: d002 beq.n 8003aa0 8003a9a: 2b0a cmp r3, #10 8003a9c: d013 beq.n 8003ac6 8003a9e: e0a5 b.n 8003bec case RAMPINIT: memrtramp[mot-1]=percStart=tr; 8003aa0: f897 3020 ldrb.w r3, [r7, #32] 8003aa4: 717b strb r3, [r7, #5] 8003aa6: 79fb ldrb r3, [r7, #7] 8003aa8: 3b01 subs r3, #1 8003aaa: 4953 ldr r1, [pc, #332] @ (8003bf8 ) 8003aac: 797a ldrb r2, [r7, #5] 8003aae: 54ca strb r2, [r1, r3] SetMotPerc(mot,dir,mrampstart[mot-1]); 8003ab0: 79fb ldrb r3, [r7, #7] 8003ab2: 3b01 subs r3, #1 8003ab4: 4a51 ldr r2, [pc, #324] @ (8003bfc ) 8003ab6: 5cd2 ldrb r2, [r2, r3] 8003ab8: 79b9 ldrb r1, [r7, #6] 8003aba: 79fb ldrb r3, [r7, #7] 8003abc: 4618 mov r0, r3 8003abe: f7ff fe59 bl 8003774 return DONE; 8003ac2: 2300 movs r3, #0 8003ac4: e093 b.n 8003bee case RAMPRUN: if(memrtramp[mot-1]!=rtramp[mot-1]){ 8003ac6: 79fb ldrb r3, [r7, #7] 8003ac8: 3b01 subs r3, #1 8003aca: 4a4b ldr r2, [pc, #300] @ (8003bf8 ) 8003acc: 5cd2 ldrb r2, [r2, r3] 8003ace: 79fb ldrb r3, [r7, #7] 8003ad0: 3b01 subs r3, #1 8003ad2: 494b ldr r1, [pc, #300] @ (8003c00 ) 8003ad4: 5ccb ldrb r3, [r1, r3] 8003ad6: b2db uxtb r3, r3 8003ad8: 429a cmp r2, r3 8003ada: f000 8085 beq.w 8003be8 memrtramp[mot-1]=rtramp[mot-1]; 8003ade: 79fb ldrb r3, [r7, #7] 8003ae0: 1e5a subs r2, r3, #1 8003ae2: 79fb ldrb r3, [r7, #7] 8003ae4: 3b01 subs r3, #1 8003ae6: 4946 ldr r1, [pc, #280] @ (8003c00 ) 8003ae8: 5c8a ldrb r2, [r1, r2] 8003aea: b2d1 uxtb r1, r2 8003aec: 4a42 ldr r2, [pc, #264] @ (8003bf8 ) 8003aee: 54d1 strb r1, [r2, r3] if(rtramp[mot-1]){ 8003af0: 79fb ldrb r3, [r7, #7] 8003af2: 3b01 subs r3, #1 8003af4: 4a42 ldr r2, [pc, #264] @ (8003c00 ) 8003af6: 5cd3 ldrb r3, [r2, r3] 8003af8: b2db uxtb r3, r3 8003afa: 2b00 cmp r3, #0 8003afc: d06c beq.n 8003bd8 if(mrampstart[mot-1]>percEnd){ 8003afe: 79fb ldrb r3, [r7, #7] 8003b00: 3b01 subs r3, #1 8003b02: 4a3e ldr r2, [pc, #248] @ (8003bfc ) 8003b04: 5cd3 ldrb r3, [r2, r3] 8003b06: 793a ldrb r2, [r7, #4] 8003b08: 429a cmp r2, r3 8003b0a: d22b bcs.n 8003b64 delta=mrampstart[mot-1]-percEnd; 8003b0c: 79fb ldrb r3, [r7, #7] 8003b0e: 3b01 subs r3, #1 8003b10: 4a3a ldr r2, [pc, #232] @ (8003bfc ) 8003b12: 5cd3 ldrb r3, [r2, r3] 8003b14: 461a mov r2, r3 8003b16: 793b ldrb r3, [r7, #4] 8003b18: b29b uxth r3, r3 8003b1a: 1ad3 subs r3, r2, r3 8003b1c: 81fb strh r3, [r7, #14] delta=delta*(uint16_t)(tr-rtramp[mot-1]); 8003b1e: f897 3020 ldrb.w r3, [r7, #32] 8003b22: b29b uxth r3, r3 8003b24: 79fa ldrb r2, [r7, #7] 8003b26: 3a01 subs r2, #1 8003b28: 4935 ldr r1, [pc, #212] @ (8003c00 ) 8003b2a: 5c8a ldrb r2, [r1, r2] 8003b2c: b2d2 uxtb r2, r2 8003b2e: 1a9b subs r3, r3, r2 8003b30: b29b uxth r3, r3 8003b32: 89fa ldrh r2, [r7, #14] 8003b34: fb02 f303 mul.w r3, r2, r3 8003b38: 81fb strh r3, [r7, #14] delta=delta/tr; 8003b3a: 89fa ldrh r2, [r7, #14] 8003b3c: f897 3020 ldrb.w r3, [r7, #32] 8003b40: fb92 f3f3 sdiv r3, r2, r3 8003b44: 81fb strh r3, [r7, #14] SetMotPerc(mot,dir,mrampstart[mot-1]-delta); 8003b46: 79fb ldrb r3, [r7, #7] 8003b48: 3b01 subs r3, #1 8003b4a: 4a2c ldr r2, [pc, #176] @ (8003bfc ) 8003b4c: 5cd2 ldrb r2, [r2, r3] 8003b4e: 89fb ldrh r3, [r7, #14] 8003b50: b2db uxtb r3, r3 8003b52: 1ad3 subs r3, r2, r3 8003b54: b2da uxtb r2, r3 8003b56: 79b9 ldrb r1, [r7, #6] 8003b58: 79fb ldrb r3, [r7, #7] 8003b5a: 4618 mov r0, r3 8003b5c: f7ff fe0a bl 8003774 return RUNNING; 8003b60: 2301 movs r3, #1 8003b62: e044 b.n 8003bee }else if(mrampstart[mot-1]) 8003b6a: 5cd3 ldrb r3, [r2, r3] 8003b6c: 793a ldrb r2, [r7, #4] 8003b6e: 429a cmp r2, r3 8003b70: d92a bls.n 8003bc8 delta=percEnd-mrampstart[mot-1]; 8003b72: 793b ldrb r3, [r7, #4] 8003b74: b29b uxth r3, r3 8003b76: 79fa ldrb r2, [r7, #7] 8003b78: 3a01 subs r2, #1 8003b7a: 4920 ldr r1, [pc, #128] @ (8003bfc ) 8003b7c: 5c8a ldrb r2, [r1, r2] 8003b7e: 1a9b subs r3, r3, r2 8003b80: 81fb strh r3, [r7, #14] delta=delta*(uint16_t)(tr-rtramp[mot-1]); 8003b82: f897 3020 ldrb.w r3, [r7, #32] 8003b86: b29b uxth r3, r3 8003b88: 79fa ldrb r2, [r7, #7] 8003b8a: 3a01 subs r2, #1 8003b8c: 491c ldr r1, [pc, #112] @ (8003c00 ) 8003b8e: 5c8a ldrb r2, [r1, r2] 8003b90: b2d2 uxtb r2, r2 8003b92: 1a9b subs r3, r3, r2 8003b94: b29b uxth r3, r3 8003b96: 89fa ldrh r2, [r7, #14] 8003b98: fb02 f303 mul.w r3, r2, r3 8003b9c: 81fb strh r3, [r7, #14] delta=delta/tr; 8003b9e: 89fa ldrh r2, [r7, #14] 8003ba0: f897 3020 ldrb.w r3, [r7, #32] 8003ba4: fb92 f3f3 sdiv r3, r2, r3 8003ba8: 81fb strh r3, [r7, #14] SetMotPerc(mot,dir,mrampstart[mot-1]+delta); 8003baa: 79fb ldrb r3, [r7, #7] 8003bac: 3b01 subs r3, #1 8003bae: 4a13 ldr r2, [pc, #76] @ (8003bfc ) 8003bb0: 5cd2 ldrb r2, [r2, r3] 8003bb2: 89fb ldrh r3, [r7, #14] 8003bb4: b2db uxtb r3, r3 8003bb6: 4413 add r3, r2 8003bb8: b2da uxtb r2, r3 8003bba: 79b9 ldrb r1, [r7, #6] 8003bbc: 79fb ldrb r3, [r7, #7] 8003bbe: 4618 mov r0, r3 8003bc0: f7ff fdd8 bl 8003774 return RUNNING; 8003bc4: 2301 movs r3, #1 8003bc6: e012 b.n 8003bee }else{ SetMotPerc(mot,dir,percEnd); 8003bc8: 793a ldrb r2, [r7, #4] 8003bca: 79b9 ldrb r1, [r7, #6] 8003bcc: 79fb ldrb r3, [r7, #7] 8003bce: 4618 mov r0, r3 8003bd0: f7ff fdd0 bl 8003774 return DONE; 8003bd4: 2300 movs r3, #0 8003bd6: e00a b.n 8003bee } }else{ SetMotPerc(mot,dir,percEnd); 8003bd8: 793a ldrb r2, [r7, #4] 8003bda: 79b9 ldrb r1, [r7, #6] 8003bdc: 79fb ldrb r3, [r7, #7] 8003bde: 4618 mov r0, r3 8003be0: f7ff fdc8 bl 8003774 return DONE; 8003be4: 2300 movs r3, #0 8003be6: e002 b.n 8003bee } }else return RUNNING; 8003be8: 2301 movs r3, #1 8003bea: e000 b.n 8003bee break; } return DONE; 8003bec: 2300 movs r3, #0 } 8003bee: 4618 mov r0, r3 8003bf0: 3714 adds r7, #20 8003bf2: 46bd mov sp, r7 8003bf4: bd90 pop {r4, r7, pc} 8003bf6: bf00 nop 8003bf8: 20000440 .word 0x20000440 8003bfc: 20000428 .word 0x20000428 8003c00: 200003ec .word 0x200003ec 08003c04 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8003c04: b480 push {r7} 8003c06: b085 sub sp, #20 8003c08: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8003c0a: 4b15 ldr r3, [pc, #84] @ (8003c60 ) 8003c0c: 699b ldr r3, [r3, #24] 8003c0e: 4a14 ldr r2, [pc, #80] @ (8003c60 ) 8003c10: f043 0301 orr.w r3, r3, #1 8003c14: 6193 str r3, [r2, #24] 8003c16: 4b12 ldr r3, [pc, #72] @ (8003c60 ) 8003c18: 699b ldr r3, [r3, #24] 8003c1a: f003 0301 and.w r3, r3, #1 8003c1e: 60bb str r3, [r7, #8] 8003c20: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 8003c22: 4b0f ldr r3, [pc, #60] @ (8003c60 ) 8003c24: 69db ldr r3, [r3, #28] 8003c26: 4a0e ldr r2, [pc, #56] @ (8003c60 ) 8003c28: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8003c2c: 61d3 str r3, [r2, #28] 8003c2e: 4b0c ldr r3, [pc, #48] @ (8003c60 ) 8003c30: 69db ldr r3, [r3, #28] 8003c32: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003c36: 607b str r3, [r7, #4] 8003c38: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8003c3a: 4b0a ldr r3, [pc, #40] @ (8003c64 ) 8003c3c: 685b ldr r3, [r3, #4] 8003c3e: 60fb str r3, [r7, #12] 8003c40: 68fb ldr r3, [r7, #12] 8003c42: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 8003c46: 60fb str r3, [r7, #12] 8003c48: 68fb ldr r3, [r7, #12] 8003c4a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8003c4e: 60fb str r3, [r7, #12] 8003c50: 4a04 ldr r2, [pc, #16] @ (8003c64 ) 8003c52: 68fb ldr r3, [r7, #12] 8003c54: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8003c56: bf00 nop 8003c58: 3714 adds r7, #20 8003c5a: 46bd mov sp, r7 8003c5c: bc80 pop {r7} 8003c5e: 4770 bx lr 8003c60: 40021000 .word 0x40021000 8003c64: 40010000 .word 0x40010000 08003c68 : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { 8003c68: b580 push {r7, lr} 8003c6a: b08a sub sp, #40 @ 0x28 8003c6c: af00 add r7, sp, #0 8003c6e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003c70: f107 0318 add.w r3, r7, #24 8003c74: 2200 movs r2, #0 8003c76: 601a str r2, [r3, #0] 8003c78: 605a str r2, [r3, #4] 8003c7a: 609a str r2, [r3, #8] 8003c7c: 60da str r2, [r3, #12] if(hadc->Instance==ADC1) 8003c7e: 687b ldr r3, [r7, #4] 8003c80: 681b ldr r3, [r3, #0] 8003c82: 4a33 ldr r2, [pc, #204] @ (8003d50 ) 8003c84: 4293 cmp r3, r2 8003c86: d15f bne.n 8003d48 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8003c88: 4b32 ldr r3, [pc, #200] @ (8003d54 ) 8003c8a: 699b ldr r3, [r3, #24] 8003c8c: 4a31 ldr r2, [pc, #196] @ (8003d54 ) 8003c8e: f443 7300 orr.w r3, r3, #512 @ 0x200 8003c92: 6193 str r3, [r2, #24] 8003c94: 4b2f ldr r3, [pc, #188] @ (8003d54 ) 8003c96: 699b ldr r3, [r3, #24] 8003c98: f403 7300 and.w r3, r3, #512 @ 0x200 8003c9c: 617b str r3, [r7, #20] 8003c9e: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8003ca0: 4b2c ldr r3, [pc, #176] @ (8003d54 ) 8003ca2: 699b ldr r3, [r3, #24] 8003ca4: 4a2b ldr r2, [pc, #172] @ (8003d54 ) 8003ca6: f043 0304 orr.w r3, r3, #4 8003caa: 6193 str r3, [r2, #24] 8003cac: 4b29 ldr r3, [pc, #164] @ (8003d54 ) 8003cae: 699b ldr r3, [r3, #24] 8003cb0: f003 0304 and.w r3, r3, #4 8003cb4: 613b str r3, [r7, #16] 8003cb6: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8003cb8: 4b26 ldr r3, [pc, #152] @ (8003d54 ) 8003cba: 699b ldr r3, [r3, #24] 8003cbc: 4a25 ldr r2, [pc, #148] @ (8003d54 ) 8003cbe: f043 0308 orr.w r3, r3, #8 8003cc2: 6193 str r3, [r2, #24] 8003cc4: 4b23 ldr r3, [pc, #140] @ (8003d54 ) 8003cc6: 699b ldr r3, [r3, #24] 8003cc8: f003 0308 and.w r3, r3, #8 8003ccc: 60fb str r3, [r7, #12] 8003cce: 68fb ldr r3, [r7, #12] PA5 ------> ADC1_IN5 PA6 ------> ADC1_IN6 PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin; 8003cd0: 23f0 movs r3, #240 @ 0xf0 8003cd2: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8003cd4: 2303 movs r3, #3 8003cd6: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003cd8: f107 0318 add.w r3, r7, #24 8003cdc: 4619 mov r1, r3 8003cde: 481e ldr r0, [pc, #120] @ (8003d58 ) 8003ce0: f001 fae6 bl 80052b0 GPIO_InitStruct.Pin = ANEM_Pin; 8003ce4: 2301 movs r3, #1 8003ce6: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8003ce8: 2303 movs r3, #3 8003cea: 61fb str r3, [r7, #28] HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct); 8003cec: f107 0318 add.w r3, r7, #24 8003cf0: 4619 mov r1, r3 8003cf2: 481a ldr r0, [pc, #104] @ (8003d5c ) 8003cf4: f001 fadc bl 80052b0 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; 8003cf8: 4b19 ldr r3, [pc, #100] @ (8003d60 ) 8003cfa: 4a1a ldr r2, [pc, #104] @ (8003d64 ) 8003cfc: 601a str r2, [r3, #0] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8003cfe: 4b18 ldr r3, [pc, #96] @ (8003d60 ) 8003d00: 2200 movs r2, #0 8003d02: 605a str r2, [r3, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 8003d04: 4b16 ldr r3, [pc, #88] @ (8003d60 ) 8003d06: 2200 movs r2, #0 8003d08: 609a str r2, [r3, #8] hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8003d0a: 4b15 ldr r3, [pc, #84] @ (8003d60 ) 8003d0c: 2280 movs r2, #128 @ 0x80 8003d0e: 60da str r2, [r3, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 8003d10: 4b13 ldr r3, [pc, #76] @ (8003d60 ) 8003d12: f44f 7280 mov.w r2, #256 @ 0x100 8003d16: 611a str r2, [r3, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 8003d18: 4b11 ldr r3, [pc, #68] @ (8003d60 ) 8003d1a: f44f 6280 mov.w r2, #1024 @ 0x400 8003d1e: 615a str r2, [r3, #20] hdma_adc1.Init.Mode = DMA_CIRCULAR; 8003d20: 4b0f ldr r3, [pc, #60] @ (8003d60 ) 8003d22: 2220 movs r2, #32 8003d24: 619a str r2, [r3, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 8003d26: 4b0e ldr r3, [pc, #56] @ (8003d60 ) 8003d28: 2200 movs r2, #0 8003d2a: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8003d2c: 480c ldr r0, [pc, #48] @ (8003d60 ) 8003d2e: f000 fed1 bl 8004ad4 8003d32: 4603 mov r3, r0 8003d34: 2b00 cmp r3, #0 8003d36: d001 beq.n 8003d3c { Error_Handler(); 8003d38: f7ff fb2e bl 8003398 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 8003d3c: 687b ldr r3, [r7, #4] 8003d3e: 4a08 ldr r2, [pc, #32] @ (8003d60 ) 8003d40: 621a str r2, [r3, #32] 8003d42: 4a07 ldr r2, [pc, #28] @ (8003d60 ) 8003d44: 687b ldr r3, [r7, #4] 8003d46: 6253 str r3, [r2, #36] @ 0x24 /* USER CODE END ADC1_MspInit 1 */ } } 8003d48: bf00 nop 8003d4a: 3728 adds r7, #40 @ 0x28 8003d4c: 46bd mov sp, r7 8003d4e: bd80 pop {r7, pc} 8003d50: 40012400 .word 0x40012400 8003d54: 40021000 .word 0x40021000 8003d58: 40010800 .word 0x40010800 8003d5c: 40010c00 .word 0x40010c00 8003d60: 200002cc .word 0x200002cc 8003d64: 40020008 .word 0x40020008 08003d68 : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 8003d68: b480 push {r7} 8003d6a: b085 sub sp, #20 8003d6c: af00 add r7, sp, #0 8003d6e: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM2) 8003d70: 687b ldr r3, [r7, #4] 8003d72: 681b ldr r3, [r3, #0] 8003d74: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8003d78: d10c bne.n 8003d94 { /* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE END TIM2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM2_CLK_ENABLE(); 8003d7a: 4b11 ldr r3, [pc, #68] @ (8003dc0 ) 8003d7c: 69db ldr r3, [r3, #28] 8003d7e: 4a10 ldr r2, [pc, #64] @ (8003dc0 ) 8003d80: f043 0301 orr.w r3, r3, #1 8003d84: 61d3 str r3, [r2, #28] 8003d86: 4b0e ldr r3, [pc, #56] @ (8003dc0 ) 8003d88: 69db ldr r3, [r3, #28] 8003d8a: f003 0301 and.w r3, r3, #1 8003d8e: 60fb str r3, [r7, #12] 8003d90: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 8003d92: e010 b.n 8003db6 else if(htim_base->Instance==TIM4) 8003d94: 687b ldr r3, [r7, #4] 8003d96: 681b ldr r3, [r3, #0] 8003d98: 4a0a ldr r2, [pc, #40] @ (8003dc4 ) 8003d9a: 4293 cmp r3, r2 8003d9c: d10b bne.n 8003db6 __HAL_RCC_TIM4_CLK_ENABLE(); 8003d9e: 4b08 ldr r3, [pc, #32] @ (8003dc0 ) 8003da0: 69db ldr r3, [r3, #28] 8003da2: 4a07 ldr r2, [pc, #28] @ (8003dc0 ) 8003da4: f043 0304 orr.w r3, r3, #4 8003da8: 61d3 str r3, [r2, #28] 8003daa: 4b05 ldr r3, [pc, #20] @ (8003dc0 ) 8003dac: 69db ldr r3, [r3, #28] 8003dae: f003 0304 and.w r3, r3, #4 8003db2: 60bb str r3, [r7, #8] 8003db4: 68bb ldr r3, [r7, #8] } 8003db6: bf00 nop 8003db8: 3714 adds r7, #20 8003dba: 46bd mov sp, r7 8003dbc: bc80 pop {r7} 8003dbe: 4770 bx lr 8003dc0: 40021000 .word 0x40021000 8003dc4: 40000800 .word 0x40000800 08003dc8 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 8003dc8: b580 push {r7, lr} 8003dca: b088 sub sp, #32 8003dcc: af00 add r7, sp, #0 8003dce: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003dd0: f107 0310 add.w r3, r7, #16 8003dd4: 2200 movs r2, #0 8003dd6: 601a str r2, [r3, #0] 8003dd8: 605a str r2, [r3, #4] 8003dda: 609a str r2, [r3, #8] 8003ddc: 60da str r2, [r3, #12] if(htim->Instance==TIM2) 8003dde: 687b ldr r3, [r7, #4] 8003de0: 681b ldr r3, [r3, #0] 8003de2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8003de6: d118 bne.n 8003e1a { /* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8003de8: 4b1d ldr r3, [pc, #116] @ (8003e60 ) 8003dea: 699b ldr r3, [r3, #24] 8003dec: 4a1c ldr r2, [pc, #112] @ (8003e60 ) 8003dee: f043 0304 orr.w r3, r3, #4 8003df2: 6193 str r3, [r2, #24] 8003df4: 4b1a ldr r3, [pc, #104] @ (8003e60 ) 8003df6: 699b ldr r3, [r3, #24] 8003df8: f003 0304 and.w r3, r3, #4 8003dfc: 60fb str r3, [r7, #12] 8003dfe: 68fb ldr r3, [r7, #12] PA0-WKUP ------> TIM2_CH1 PA1 ------> TIM2_CH2 PA2 ------> TIM2_CH3 PA3 ------> TIM2_CH4 */ GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin; 8003e00: 230f movs r3, #15 8003e02: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003e04: 2302 movs r3, #2 8003e06: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003e08: 2302 movs r3, #2 8003e0a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003e0c: f107 0310 add.w r3, r7, #16 8003e10: 4619 mov r1, r3 8003e12: 4814 ldr r0, [pc, #80] @ (8003e64 ) 8003e14: f001 fa4c bl 80052b0 /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 8003e18: e01d b.n 8003e56 else if(htim->Instance==TIM4) 8003e1a: 687b ldr r3, [r7, #4] 8003e1c: 681b ldr r3, [r3, #0] 8003e1e: 4a12 ldr r2, [pc, #72] @ (8003e68 ) 8003e20: 4293 cmp r3, r2 8003e22: d118 bne.n 8003e56 __HAL_RCC_GPIOB_CLK_ENABLE(); 8003e24: 4b0e ldr r3, [pc, #56] @ (8003e60 ) 8003e26: 699b ldr r3, [r3, #24] 8003e28: 4a0d ldr r2, [pc, #52] @ (8003e60 ) 8003e2a: f043 0308 orr.w r3, r3, #8 8003e2e: 6193 str r3, [r2, #24] 8003e30: 4b0b ldr r3, [pc, #44] @ (8003e60 ) 8003e32: 699b ldr r3, [r3, #24] 8003e34: f003 0308 and.w r3, r3, #8 8003e38: 60bb str r3, [r7, #8] 8003e3a: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin; 8003e3c: f44f 7370 mov.w r3, #960 @ 0x3c0 8003e40: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003e42: 2302 movs r3, #2 8003e44: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003e46: 2302 movs r3, #2 8003e48: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8003e4a: f107 0310 add.w r3, r7, #16 8003e4e: 4619 mov r1, r3 8003e50: 4806 ldr r0, [pc, #24] @ (8003e6c ) 8003e52: f001 fa2d bl 80052b0 } 8003e56: bf00 nop 8003e58: 3720 adds r7, #32 8003e5a: 46bd mov sp, r7 8003e5c: bd80 pop {r7, pc} 8003e5e: bf00 nop 8003e60: 40021000 .word 0x40021000 8003e64: 40010800 .word 0x40010800 8003e68: 40000800 .word 0x40000800 8003e6c: 40010c00 .word 0x40010c00 08003e70 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8003e70: b580 push {r7, lr} 8003e72: b088 sub sp, #32 8003e74: af00 add r7, sp, #0 8003e76: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003e78: f107 0310 add.w r3, r7, #16 8003e7c: 2200 movs r2, #0 8003e7e: 601a str r2, [r3, #0] 8003e80: 605a str r2, [r3, #4] 8003e82: 609a str r2, [r3, #8] 8003e84: 60da str r2, [r3, #12] if(huart->Instance==USART1) 8003e86: 687b ldr r3, [r7, #4] 8003e88: 681b ldr r3, [r3, #0] 8003e8a: 4a1c ldr r2, [pc, #112] @ (8003efc ) 8003e8c: 4293 cmp r3, r2 8003e8e: d131 bne.n 8003ef4 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8003e90: 4b1b ldr r3, [pc, #108] @ (8003f00 ) 8003e92: 699b ldr r3, [r3, #24] 8003e94: 4a1a ldr r2, [pc, #104] @ (8003f00 ) 8003e96: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8003e9a: 6193 str r3, [r2, #24] 8003e9c: 4b18 ldr r3, [pc, #96] @ (8003f00 ) 8003e9e: 699b ldr r3, [r3, #24] 8003ea0: f403 4380 and.w r3, r3, #16384 @ 0x4000 8003ea4: 60fb str r3, [r7, #12] 8003ea6: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8003ea8: 4b15 ldr r3, [pc, #84] @ (8003f00 ) 8003eaa: 699b ldr r3, [r3, #24] 8003eac: 4a14 ldr r2, [pc, #80] @ (8003f00 ) 8003eae: f043 0304 orr.w r3, r3, #4 8003eb2: 6193 str r3, [r2, #24] 8003eb4: 4b12 ldr r3, [pc, #72] @ (8003f00 ) 8003eb6: 699b ldr r3, [r3, #24] 8003eb8: f003 0304 and.w r3, r3, #4 8003ebc: 60bb str r3, [r7, #8] 8003ebe: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; 8003ec0: f44f 7300 mov.w r3, #512 @ 0x200 8003ec4: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003ec6: 2302 movs r3, #2 8003ec8: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 8003eca: 2303 movs r3, #3 8003ecc: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003ece: f107 0310 add.w r3, r7, #16 8003ed2: 4619 mov r1, r3 8003ed4: 480b ldr r0, [pc, #44] @ (8003f04 ) 8003ed6: f001 f9eb bl 80052b0 GPIO_InitStruct.Pin = GPIO_PIN_10; 8003eda: f44f 6380 mov.w r3, #1024 @ 0x400 8003ede: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8003ee0: 2300 movs r3, #0 8003ee2: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003ee4: 2300 movs r3, #0 8003ee6: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003ee8: f107 0310 add.w r3, r7, #16 8003eec: 4619 mov r1, r3 8003eee: 4805 ldr r0, [pc, #20] @ (8003f04 ) 8003ef0: f001 f9de bl 80052b0 /* USER CODE END USART1_MspInit 1 */ } } 8003ef4: bf00 nop 8003ef6: 3720 adds r7, #32 8003ef8: 46bd mov sp, r7 8003efa: bd80 pop {r7, pc} 8003efc: 40013800 .word 0x40013800 8003f00: 40021000 .word 0x40021000 8003f04: 40010800 .word 0x40010800 08003f08 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8003f08: b480 push {r7} 8003f0a: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8003f0c: bf00 nop 8003f0e: e7fd b.n 8003f0c 08003f10 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8003f10: b480 push {r7} 8003f12: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8003f14: bf00 nop 8003f16: e7fd b.n 8003f14 08003f18 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8003f18: b480 push {r7} 8003f1a: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8003f1c: bf00 nop 8003f1e: e7fd b.n 8003f1c 08003f20 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8003f20: b480 push {r7} 8003f22: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8003f24: bf00 nop 8003f26: e7fd b.n 8003f24 08003f28 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8003f28: b480 push {r7} 8003f2a: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8003f2c: bf00 nop 8003f2e: e7fd b.n 8003f2c 08003f30 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8003f30: b480 push {r7} 8003f32: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8003f34: bf00 nop 8003f36: 46bd mov sp, r7 8003f38: bc80 pop {r7} 8003f3a: 4770 bx lr 08003f3c : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8003f3c: b480 push {r7} 8003f3e: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8003f40: bf00 nop 8003f42: 46bd mov sp, r7 8003f44: bc80 pop {r7} 8003f46: 4770 bx lr 08003f48 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8003f48: b480 push {r7} 8003f4a: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8003f4c: bf00 nop 8003f4e: 46bd mov sp, r7 8003f50: bc80 pop {r7} 8003f52: 4770 bx lr 08003f54 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8003f54: b580 push {r7, lr} 8003f56: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8003f58: f000 f8c0 bl 80040dc /* USER CODE BEGIN SysTick_IRQn 1 */ HAL_SYSTICK_IRQHandler(); 8003f5c: f000 fdb3 bl 8004ac6 /* USER CODE END SysTick_IRQn 1 */ } 8003f60: bf00 nop 8003f62: bd80 pop {r7, pc} 08003f64 : /** * @brief This function handles DMA1 channel1 global interrupt. */ void DMA1_Channel1_IRQHandler(void) { 8003f64: b580 push {r7, lr} 8003f66: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 8003f68: 4802 ldr r0, [pc, #8] @ (8003f74 ) 8003f6a: f000 fe6d bl 8004c48 /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ /* USER CODE END DMA1_Channel1_IRQn 1 */ } 8003f6e: bf00 nop 8003f70: bd80 pop {r7, pc} 8003f72: bf00 nop 8003f74: 200002cc .word 0x200002cc 08003f78 : /** * @brief This function handles USB low priority or CAN RX0 interrupts. */ void USB_LP_CAN1_RX0_IRQHandler(void) { 8003f78: b580 push {r7, lr} 8003f7a: af00 add r7, sp, #0 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */ HAL_PCD_IRQHandler(&hpcd_USB_FS); 8003f7c: 4802 ldr r0, [pc, #8] @ (8003f88 ) 8003f7e: f001 fc7f bl 8005880 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */ } 8003f82: bf00 nop 8003f84: bd80 pop {r7, pc} 8003f86: bf00 nop 8003f88: 2000123c .word 0x2000123c 08003f8c <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8003f8c: b580 push {r7, lr} 8003f8e: b086 sub sp, #24 8003f90: af00 add r7, sp, #0 8003f92: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8003f94: 4a14 ldr r2, [pc, #80] @ (8003fe8 <_sbrk+0x5c>) 8003f96: 4b15 ldr r3, [pc, #84] @ (8003fec <_sbrk+0x60>) 8003f98: 1ad3 subs r3, r2, r3 8003f9a: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8003f9c: 697b ldr r3, [r7, #20] 8003f9e: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8003fa0: 4b13 ldr r3, [pc, #76] @ (8003ff0 <_sbrk+0x64>) 8003fa2: 681b ldr r3, [r3, #0] 8003fa4: 2b00 cmp r3, #0 8003fa6: d102 bne.n 8003fae <_sbrk+0x22> { __sbrk_heap_end = &_end; 8003fa8: 4b11 ldr r3, [pc, #68] @ (8003ff0 <_sbrk+0x64>) 8003faa: 4a12 ldr r2, [pc, #72] @ (8003ff4 <_sbrk+0x68>) 8003fac: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 8003fae: 4b10 ldr r3, [pc, #64] @ (8003ff0 <_sbrk+0x64>) 8003fb0: 681a ldr r2, [r3, #0] 8003fb2: 687b ldr r3, [r7, #4] 8003fb4: 4413 add r3, r2 8003fb6: 693a ldr r2, [r7, #16] 8003fb8: 429a cmp r2, r3 8003fba: d207 bcs.n 8003fcc <_sbrk+0x40> { errno = ENOMEM; 8003fbc: f009 fa44 bl 800d448 <__errno> 8003fc0: 4603 mov r3, r0 8003fc2: 220c movs r2, #12 8003fc4: 601a str r2, [r3, #0] return (void *)-1; 8003fc6: f04f 33ff mov.w r3, #4294967295 8003fca: e009 b.n 8003fe0 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 8003fcc: 4b08 ldr r3, [pc, #32] @ (8003ff0 <_sbrk+0x64>) 8003fce: 681b ldr r3, [r3, #0] 8003fd0: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8003fd2: 4b07 ldr r3, [pc, #28] @ (8003ff0 <_sbrk+0x64>) 8003fd4: 681a ldr r2, [r3, #0] 8003fd6: 687b ldr r3, [r7, #4] 8003fd8: 4413 add r3, r2 8003fda: 4a05 ldr r2, [pc, #20] @ (8003ff0 <_sbrk+0x64>) 8003fdc: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 8003fde: 68fb ldr r3, [r7, #12] } 8003fe0: 4618 mov r0, r3 8003fe2: 3718 adds r7, #24 8003fe4: 46bd mov sp, r7 8003fe6: bd80 pop {r7, pc} 8003fe8: 20005000 .word 0x20005000 8003fec: 00000400 .word 0x00000400 8003ff0: 20000444 .word 0x20000444 8003ff4: 20001880 .word 0x20001880 08003ff8 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 8003ff8: b480 push {r7} 8003ffa: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 8003ffc: bf00 nop 8003ffe: 46bd mov sp, r7 8004000: bc80 pop {r7} 8004002: 4770 bx lr 08004004 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 8004004: f7ff fff8 bl 8003ff8 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8004008: 480b ldr r0, [pc, #44] @ (8004038 ) ldr r1, =_edata 800400a: 490c ldr r1, [pc, #48] @ (800403c ) ldr r2, =_sidata 800400c: 4a0c ldr r2, [pc, #48] @ (8004040 ) movs r3, #0 800400e: 2300 movs r3, #0 b LoopCopyDataInit 8004010: e002 b.n 8004018 08004012 : CopyDataInit: ldr r4, [r2, r3] 8004012: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8004014: 50c4 str r4, [r0, r3] adds r3, r3, #4 8004016: 3304 adds r3, #4 08004018 : LoopCopyDataInit: adds r4, r0, r3 8004018: 18c4 adds r4, r0, r3 cmp r4, r1 800401a: 428c cmp r4, r1 bcc CopyDataInit 800401c: d3f9 bcc.n 8004012 /* Zero fill the bss segment. */ ldr r2, =_sbss 800401e: 4a09 ldr r2, [pc, #36] @ (8004044 ) ldr r4, =_ebss 8004020: 4c09 ldr r4, [pc, #36] @ (8004048 ) movs r3, #0 8004022: 2300 movs r3, #0 b LoopFillZerobss 8004024: e001 b.n 800402a 08004026 : FillZerobss: str r3, [r2] 8004026: 6013 str r3, [r2, #0] adds r2, r2, #4 8004028: 3204 adds r2, #4 0800402a : LoopFillZerobss: cmp r2, r4 800402a: 42a2 cmp r2, r4 bcc FillZerobss 800402c: d3fb bcc.n 8004026 /* Call static constructors */ bl __libc_init_array 800402e: f009 fa11 bl 800d454 <__libc_init_array> /* Call the application's entry point.*/ bl main 8004032: f7fe fe4d bl 8002cd0
bx lr 8004036: 4770 bx lr ldr r0, =_sdata 8004038: 20000000 .word 0x20000000 ldr r1, =_edata 800403c: 200001d4 .word 0x200001d4 ldr r2, =_sidata 8004040: 0800e114 .word 0x0800e114 ldr r2, =_sbss 8004044: 200001d8 .word 0x200001d8 ldr r4, =_ebss 8004048: 2000187c .word 0x2000187c 0800404c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 800404c: e7fe b.n 800404c ... 08004050 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8004050: b580 push {r7, lr} 8004052: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8004054: 4b08 ldr r3, [pc, #32] @ (8004078 ) 8004056: 681b ldr r3, [r3, #0] 8004058: 4a07 ldr r2, [pc, #28] @ (8004078 ) 800405a: f043 0310 orr.w r3, r3, #16 800405e: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8004060: 2003 movs r0, #3 8004062: f000 fcef bl 8004a44 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8004066: 200f movs r0, #15 8004068: f000 f808 bl 800407c /* Init the low level hardware */ HAL_MspInit(); 800406c: f7ff fdca bl 8003c04 /* Return function status */ return HAL_OK; 8004070: 2300 movs r3, #0 } 8004072: 4618 mov r0, r3 8004074: bd80 pop {r7, pc} 8004076: bf00 nop 8004078: 40022000 .word 0x40022000 0800407c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800407c: b580 push {r7, lr} 800407e: b082 sub sp, #8 8004080: af00 add r7, sp, #0 8004082: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8004084: 4b12 ldr r3, [pc, #72] @ (80040d0 ) 8004086: 681a ldr r2, [r3, #0] 8004088: 4b12 ldr r3, [pc, #72] @ (80040d4 ) 800408a: 781b ldrb r3, [r3, #0] 800408c: 4619 mov r1, r3 800408e: f44f 737a mov.w r3, #1000 @ 0x3e8 8004092: fbb3 f3f1 udiv r3, r3, r1 8004096: fbb2 f3f3 udiv r3, r2, r3 800409a: 4618 mov r0, r3 800409c: f000 fd07 bl 8004aae 80040a0: 4603 mov r3, r0 80040a2: 2b00 cmp r3, #0 80040a4: d001 beq.n 80040aa { return HAL_ERROR; 80040a6: 2301 movs r3, #1 80040a8: e00e b.n 80040c8 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 80040aa: 687b ldr r3, [r7, #4] 80040ac: 2b0f cmp r3, #15 80040ae: d80a bhi.n 80040c6 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 80040b0: 2200 movs r2, #0 80040b2: 6879 ldr r1, [r7, #4] 80040b4: f04f 30ff mov.w r0, #4294967295 80040b8: f000 fccf bl 8004a5a uwTickPrio = TickPriority; 80040bc: 4a06 ldr r2, [pc, #24] @ (80040d8 ) 80040be: 687b ldr r3, [r7, #4] 80040c0: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 80040c2: 2300 movs r3, #0 80040c4: e000 b.n 80040c8 return HAL_ERROR; 80040c6: 2301 movs r3, #1 } 80040c8: 4618 mov r0, r3 80040ca: 3708 adds r7, #8 80040cc: 46bd mov sp, r7 80040ce: bd80 pop {r7, pc} 80040d0: 20000008 .word 0x20000008 80040d4: 20000010 .word 0x20000010 80040d8: 2000000c .word 0x2000000c 080040dc : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 80040dc: b480 push {r7} 80040de: af00 add r7, sp, #0 uwTick += uwTickFreq; 80040e0: 4b05 ldr r3, [pc, #20] @ (80040f8 ) 80040e2: 781b ldrb r3, [r3, #0] 80040e4: 461a mov r2, r3 80040e6: 4b05 ldr r3, [pc, #20] @ (80040fc ) 80040e8: 681b ldr r3, [r3, #0] 80040ea: 4413 add r3, r2 80040ec: 4a03 ldr r2, [pc, #12] @ (80040fc ) 80040ee: 6013 str r3, [r2, #0] } 80040f0: bf00 nop 80040f2: 46bd mov sp, r7 80040f4: bc80 pop {r7} 80040f6: 4770 bx lr 80040f8: 20000010 .word 0x20000010 80040fc: 20000448 .word 0x20000448 08004100 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8004100: b480 push {r7} 8004102: af00 add r7, sp, #0 return uwTick; 8004104: 4b02 ldr r3, [pc, #8] @ (8004110 ) 8004106: 681b ldr r3, [r3, #0] } 8004108: 4618 mov r0, r3 800410a: 46bd mov sp, r7 800410c: bc80 pop {r7} 800410e: 4770 bx lr 8004110: 20000448 .word 0x20000448 08004114 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 8004114: b580 push {r7, lr} 8004116: b086 sub sp, #24 8004118: af00 add r7, sp, #0 800411a: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 800411c: 2300 movs r3, #0 800411e: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 8004120: 2300 movs r3, #0 8004122: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 8004124: 2300 movs r3, #0 8004126: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 8004128: 2300 movs r3, #0 800412a: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 800412c: 687b ldr r3, [r7, #4] 800412e: 2b00 cmp r3, #0 8004130: d101 bne.n 8004136 { return HAL_ERROR; 8004132: 2301 movs r3, #1 8004134: e0be b.n 80042b4 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 8004136: 687b ldr r3, [r7, #4] 8004138: 689b ldr r3, [r3, #8] 800413a: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 800413c: 687b ldr r3, [r7, #4] 800413e: 6a9b ldr r3, [r3, #40] @ 0x28 8004140: 2b00 cmp r3, #0 8004142: d109 bne.n 8004158 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 8004144: 687b ldr r3, [r7, #4] 8004146: 2200 movs r2, #0 8004148: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 800414a: 687b ldr r3, [r7, #4] 800414c: 2200 movs r2, #0 800414e: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 8004152: 6878 ldr r0, [r7, #4] 8004154: f7ff fd88 bl 8003c68 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8004158: 6878 ldr r0, [r7, #4] 800415a: f000 faff bl 800475c 800415e: 4603 mov r3, r0 8004160: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 8004162: 687b ldr r3, [r7, #4] 8004164: 6a9b ldr r3, [r3, #40] @ 0x28 8004166: f003 0310 and.w r3, r3, #16 800416a: 2b00 cmp r3, #0 800416c: f040 8099 bne.w 80042a2 8004170: 7dfb ldrb r3, [r7, #23] 8004172: 2b00 cmp r3, #0 8004174: f040 8095 bne.w 80042a2 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8004178: 687b ldr r3, [r7, #4] 800417a: 6a9b ldr r3, [r3, #40] @ 0x28 800417c: f423 5388 bic.w r3, r3, #4352 @ 0x1100 8004180: f023 0302 bic.w r3, r3, #2 8004184: f043 0202 orr.w r2, r3, #2 8004188: 687b ldr r3, [r7, #4] 800418a: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 800418c: 687b ldr r3, [r7, #4] 800418e: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8004190: 687b ldr r3, [r7, #4] 8004192: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 8004194: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 8004196: 687b ldr r3, [r7, #4] 8004198: 7b1b ldrb r3, [r3, #12] 800419a: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 800419c: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 800419e: 68ba ldr r2, [r7, #8] 80041a0: 4313 orrs r3, r2 80041a2: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 80041a4: 687b ldr r3, [r7, #4] 80041a6: 689b ldr r3, [r3, #8] 80041a8: f5b3 7f80 cmp.w r3, #256 @ 0x100 80041ac: d003 beq.n 80041b6 80041ae: 687b ldr r3, [r7, #4] 80041b0: 689b ldr r3, [r3, #8] 80041b2: 2b01 cmp r3, #1 80041b4: d102 bne.n 80041bc 80041b6: f44f 7380 mov.w r3, #256 @ 0x100 80041ba: e000 b.n 80041be 80041bc: 2300 movs r3, #0 80041be: 693a ldr r2, [r7, #16] 80041c0: 4313 orrs r3, r2 80041c2: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 80041c4: 687b ldr r3, [r7, #4] 80041c6: 7d1b ldrb r3, [r3, #20] 80041c8: 2b01 cmp r3, #1 80041ca: d119 bne.n 8004200 { if (hadc->Init.ContinuousConvMode == DISABLE) 80041cc: 687b ldr r3, [r7, #4] 80041ce: 7b1b ldrb r3, [r3, #12] 80041d0: 2b00 cmp r3, #0 80041d2: d109 bne.n 80041e8 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 80041d4: 687b ldr r3, [r7, #4] 80041d6: 699b ldr r3, [r3, #24] 80041d8: 3b01 subs r3, #1 80041da: 035a lsls r2, r3, #13 80041dc: 693b ldr r3, [r7, #16] 80041de: 4313 orrs r3, r2 80041e0: f443 6300 orr.w r3, r3, #2048 @ 0x800 80041e4: 613b str r3, [r7, #16] 80041e6: e00b b.n 8004200 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 80041e8: 687b ldr r3, [r7, #4] 80041ea: 6a9b ldr r3, [r3, #40] @ 0x28 80041ec: f043 0220 orr.w r2, r3, #32 80041f0: 687b ldr r3, [r7, #4] 80041f2: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80041f4: 687b ldr r3, [r7, #4] 80041f6: 6adb ldr r3, [r3, #44] @ 0x2c 80041f8: f043 0201 orr.w r2, r3, #1 80041fc: 687b ldr r3, [r7, #4] 80041fe: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 8004200: 687b ldr r3, [r7, #4] 8004202: 681b ldr r3, [r3, #0] 8004204: 685b ldr r3, [r3, #4] 8004206: f423 4169 bic.w r1, r3, #59648 @ 0xe900 800420a: 687b ldr r3, [r7, #4] 800420c: 681b ldr r3, [r3, #0] 800420e: 693a ldr r2, [r7, #16] 8004210: 430a orrs r2, r1 8004212: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 8004214: 687b ldr r3, [r7, #4] 8004216: 681b ldr r3, [r3, #0] 8004218: 689a ldr r2, [r3, #8] 800421a: 4b28 ldr r3, [pc, #160] @ (80042bc ) 800421c: 4013 ands r3, r2 800421e: 687a ldr r2, [r7, #4] 8004220: 6812 ldr r2, [r2, #0] 8004222: 68b9 ldr r1, [r7, #8] 8004224: 430b orrs r3, r1 8004226: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 8004228: 687b ldr r3, [r7, #4] 800422a: 689b ldr r3, [r3, #8] 800422c: f5b3 7f80 cmp.w r3, #256 @ 0x100 8004230: d003 beq.n 800423a 8004232: 687b ldr r3, [r7, #4] 8004234: 689b ldr r3, [r3, #8] 8004236: 2b01 cmp r3, #1 8004238: d104 bne.n 8004244 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 800423a: 687b ldr r3, [r7, #4] 800423c: 691b ldr r3, [r3, #16] 800423e: 3b01 subs r3, #1 8004240: 051b lsls r3, r3, #20 8004242: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 8004244: 687b ldr r3, [r7, #4] 8004246: 681b ldr r3, [r3, #0] 8004248: 6adb ldr r3, [r3, #44] @ 0x2c 800424a: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 800424e: 687b ldr r3, [r7, #4] 8004250: 681b ldr r3, [r3, #0] 8004252: 68fa ldr r2, [r7, #12] 8004254: 430a orrs r2, r1 8004256: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8004258: 687b ldr r3, [r7, #4] 800425a: 681b ldr r3, [r3, #0] 800425c: 689a ldr r2, [r3, #8] 800425e: 4b18 ldr r3, [pc, #96] @ (80042c0 ) 8004260: 4013 ands r3, r2 8004262: 68ba ldr r2, [r7, #8] 8004264: 429a cmp r2, r3 8004266: d10b bne.n 8004280 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 8004268: 687b ldr r3, [r7, #4] 800426a: 2200 movs r2, #0 800426c: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 800426e: 687b ldr r3, [r7, #4] 8004270: 6a9b ldr r3, [r3, #40] @ 0x28 8004272: f023 0303 bic.w r3, r3, #3 8004276: f043 0201 orr.w r2, r3, #1 800427a: 687b ldr r3, [r7, #4] 800427c: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 800427e: e018 b.n 80042b2 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 8004280: 687b ldr r3, [r7, #4] 8004282: 6a9b ldr r3, [r3, #40] @ 0x28 8004284: f023 0312 bic.w r3, r3, #18 8004288: f043 0210 orr.w r2, r3, #16 800428c: 687b ldr r3, [r7, #4] 800428e: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8004290: 687b ldr r3, [r7, #4] 8004292: 6adb ldr r3, [r3, #44] @ 0x2c 8004294: f043 0201 orr.w r2, r3, #1 8004298: 687b ldr r3, [r7, #4] 800429a: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 800429c: 2301 movs r3, #1 800429e: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80042a0: e007 b.n 80042b2 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80042a2: 687b ldr r3, [r7, #4] 80042a4: 6a9b ldr r3, [r3, #40] @ 0x28 80042a6: f043 0210 orr.w r2, r3, #16 80042aa: 687b ldr r3, [r7, #4] 80042ac: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 80042ae: 2301 movs r3, #1 80042b0: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 80042b2: 7dfb ldrb r3, [r7, #23] } 80042b4: 4618 mov r0, r3 80042b6: 3718 adds r7, #24 80042b8: 46bd mov sp, r7 80042ba: bd80 pop {r7, pc} 80042bc: ffe1f7fd .word 0xffe1f7fd 80042c0: ff1f0efe .word 0xff1f0efe 080042c4 : * @param pData: The destination Buffer address. * @param Length: The length of data to be transferred from ADC peripheral to memory. * @retval None */ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { 80042c4: b580 push {r7, lr} 80042c6: b086 sub sp, #24 80042c8: af00 add r7, sp, #0 80042ca: 60f8 str r0, [r7, #12] 80042cc: 60b9 str r1, [r7, #8] 80042ce: 607a str r2, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80042d0: 2300 movs r3, #0 80042d2: 75fb strb r3, [r7, #23] assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance)); /* Verification if multimode is disabled (for devices with several ADC) */ /* If multimode is enabled, dedicated function multimode conversion */ /* start DMA must be used. */ if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 80042d4: 68fb ldr r3, [r7, #12] 80042d6: 681b ldr r3, [r3, #0] 80042d8: 4a64 ldr r2, [pc, #400] @ (800446c ) 80042da: 4293 cmp r3, r2 80042dc: d004 beq.n 80042e8 80042de: 68fb ldr r3, [r7, #12] 80042e0: 681b ldr r3, [r3, #0] 80042e2: 4a63 ldr r2, [pc, #396] @ (8004470 ) 80042e4: 4293 cmp r3, r2 80042e6: d106 bne.n 80042f6 80042e8: 4b60 ldr r3, [pc, #384] @ (800446c ) 80042ea: 685b ldr r3, [r3, #4] 80042ec: f403 2370 and.w r3, r3, #983040 @ 0xf0000 80042f0: 2b00 cmp r3, #0 80042f2: f040 80b3 bne.w 800445c { /* Process locked */ __HAL_LOCK(hadc); 80042f6: 68fb ldr r3, [r7, #12] 80042f8: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 80042fc: 2b01 cmp r3, #1 80042fe: d101 bne.n 8004304 8004300: 2302 movs r3, #2 8004302: e0ae b.n 8004462 8004304: 68fb ldr r3, [r7, #12] 8004306: 2201 movs r2, #1 8004308: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 800430c: 68f8 ldr r0, [r7, #12] 800430e: f000 f9cb bl 80046a8 8004312: 4603 mov r3, r0 8004314: 75fb strb r3, [r7, #23] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 8004316: 7dfb ldrb r3, [r7, #23] 8004318: 2b00 cmp r3, #0 800431a: f040 809a bne.w 8004452 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 800431e: 68fb ldr r3, [r7, #12] 8004320: 6a9b ldr r3, [r3, #40] @ 0x28 8004322: f423 6370 bic.w r3, r3, #3840 @ 0xf00 8004326: f023 0301 bic.w r3, r3, #1 800432a: f443 7280 orr.w r2, r3, #256 @ 0x100 800432e: 68fb ldr r3, [r7, #12] 8004330: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 8004332: 68fb ldr r3, [r7, #12] 8004334: 681b ldr r3, [r3, #0] 8004336: 4a4e ldr r2, [pc, #312] @ (8004470 ) 8004338: 4293 cmp r3, r2 800433a: d105 bne.n 8004348 800433c: 4b4b ldr r3, [pc, #300] @ (800446c ) 800433e: 685b ldr r3, [r3, #4] 8004340: f403 2370 and.w r3, r3, #983040 @ 0xf0000 8004344: 2b00 cmp r3, #0 8004346: d115 bne.n 8004374 { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8004348: 68fb ldr r3, [r7, #12] 800434a: 6a9b ldr r3, [r3, #40] @ 0x28 800434c: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 8004350: 68fb ldr r3, [r7, #12] 8004352: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 8004354: 68fb ldr r3, [r7, #12] 8004356: 681b ldr r3, [r3, #0] 8004358: 685b ldr r3, [r3, #4] 800435a: f403 6380 and.w r3, r3, #1024 @ 0x400 800435e: 2b00 cmp r3, #0 8004360: d026 beq.n 80043b0 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 8004362: 68fb ldr r3, [r7, #12] 8004364: 6a9b ldr r3, [r3, #40] @ 0x28 8004366: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800436a: f443 5280 orr.w r2, r3, #4096 @ 0x1000 800436e: 68fb ldr r3, [r7, #12] 8004370: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 8004372: e01d b.n 80043b0 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8004374: 68fb ldr r3, [r7, #12] 8004376: 6a9b ldr r3, [r3, #40] @ 0x28 8004378: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 800437c: 68fb ldr r3, [r7, #12] 800437e: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 8004380: 68fb ldr r3, [r7, #12] 8004382: 681b ldr r3, [r3, #0] 8004384: 4a39 ldr r2, [pc, #228] @ (800446c ) 8004386: 4293 cmp r3, r2 8004388: d004 beq.n 8004394 800438a: 68fb ldr r3, [r7, #12] 800438c: 681b ldr r3, [r3, #0] 800438e: 4a38 ldr r2, [pc, #224] @ (8004470 ) 8004390: 4293 cmp r3, r2 8004392: d10d bne.n 80043b0 8004394: 4b35 ldr r3, [pc, #212] @ (800446c ) 8004396: 685b ldr r3, [r3, #4] 8004398: f403 6380 and.w r3, r3, #1024 @ 0x400 800439c: 2b00 cmp r3, #0 800439e: d007 beq.n 80043b0 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 80043a0: 68fb ldr r3, [r7, #12] 80043a2: 6a9b ldr r3, [r3, #40] @ 0x28 80043a4: f423 5340 bic.w r3, r3, #12288 @ 0x3000 80043a8: f443 5280 orr.w r2, r3, #4096 @ 0x1000 80043ac: 68fb ldr r3, [r7, #12] 80043ae: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 80043b0: 68fb ldr r3, [r7, #12] 80043b2: 6a9b ldr r3, [r3, #40] @ 0x28 80043b4: f403 5380 and.w r3, r3, #4096 @ 0x1000 80043b8: 2b00 cmp r3, #0 80043ba: d006 beq.n 80043ca { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 80043bc: 68fb ldr r3, [r7, #12] 80043be: 6adb ldr r3, [r3, #44] @ 0x2c 80043c0: f023 0206 bic.w r2, r3, #6 80043c4: 68fb ldr r3, [r7, #12] 80043c6: 62da str r2, [r3, #44] @ 0x2c 80043c8: e002 b.n 80043d0 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 80043ca: 68fb ldr r3, [r7, #12] 80043cc: 2200 movs r2, #0 80043ce: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 80043d0: 68fb ldr r3, [r7, #12] 80043d2: 2200 movs r2, #0 80043d4: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Set the DMA transfer complete callback */ hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 80043d8: 68fb ldr r3, [r7, #12] 80043da: 6a1b ldr r3, [r3, #32] 80043dc: 4a25 ldr r2, [pc, #148] @ (8004474 ) 80043de: 629a str r2, [r3, #40] @ 0x28 /* Set the DMA half transfer complete callback */ hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 80043e0: 68fb ldr r3, [r7, #12] 80043e2: 6a1b ldr r3, [r3, #32] 80043e4: 4a24 ldr r2, [pc, #144] @ (8004478 ) 80043e6: 62da str r2, [r3, #44] @ 0x2c /* Set the DMA error callback */ hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 80043e8: 68fb ldr r3, [r7, #12] 80043ea: 6a1b ldr r3, [r3, #32] 80043ec: 4a23 ldr r2, [pc, #140] @ (800447c ) 80043ee: 631a str r2, [r3, #48] @ 0x30 /* start (in case of SW start): */ /* Clear regular group conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC */ /* operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 80043f0: 68fb ldr r3, [r7, #12] 80043f2: 681b ldr r3, [r3, #0] 80043f4: f06f 0202 mvn.w r2, #2 80043f8: 601a str r2, [r3, #0] /* Enable ADC DMA mode */ SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 80043fa: 68fb ldr r3, [r7, #12] 80043fc: 681b ldr r3, [r3, #0] 80043fe: 689a ldr r2, [r3, #8] 8004400: 68fb ldr r3, [r7, #12] 8004402: 681b ldr r3, [r3, #0] 8004404: f442 7280 orr.w r2, r2, #256 @ 0x100 8004408: 609a str r2, [r3, #8] /* Start the DMA channel */ HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 800440a: 68fb ldr r3, [r7, #12] 800440c: 6a18 ldr r0, [r3, #32] 800440e: 68fb ldr r3, [r7, #12] 8004410: 681b ldr r3, [r3, #0] 8004412: 334c adds r3, #76 @ 0x4c 8004414: 4619 mov r1, r3 8004416: 68ba ldr r2, [r7, #8] 8004418: 687b ldr r3, [r7, #4] 800441a: f000 fbb5 bl 8004b88 /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ /* If external trigger has been selected, conversion will start at next */ /* trigger event. */ if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) 800441e: 68fb ldr r3, [r7, #12] 8004420: 681b ldr r3, [r3, #0] 8004422: 689b ldr r3, [r3, #8] 8004424: f403 2360 and.w r3, r3, #917504 @ 0xe0000 8004428: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 800442c: d108 bne.n 8004440 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 800442e: 68fb ldr r3, [r7, #12] 8004430: 681b ldr r3, [r3, #0] 8004432: 689a ldr r2, [r3, #8] 8004434: 68fb ldr r3, [r7, #12] 8004436: 681b ldr r3, [r3, #0] 8004438: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 800443c: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 800443e: e00f b.n 8004460 } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 8004440: 68fb ldr r3, [r7, #12] 8004442: 681b ldr r3, [r3, #0] 8004444: 689a ldr r2, [r3, #8] 8004446: 68fb ldr r3, [r7, #12] 8004448: 681b ldr r3, [r3, #0] 800444a: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 800444e: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 8004450: e006 b.n 8004460 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 8004452: 68fb ldr r3, [r7, #12] 8004454: 2200 movs r2, #0 8004456: f883 2024 strb.w r2, [r3, #36] @ 0x24 if (tmp_hal_status == HAL_OK) 800445a: e001 b.n 8004460 } } else { tmp_hal_status = HAL_ERROR; 800445c: 2301 movs r3, #1 800445e: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8004460: 7dfb ldrb r3, [r7, #23] } 8004462: 4618 mov r0, r3 8004464: 3718 adds r7, #24 8004466: 46bd mov sp, r7 8004468: bd80 pop {r7, pc} 800446a: bf00 nop 800446c: 40012400 .word 0x40012400 8004470: 40012800 .word 0x40012800 8004474: 080047df .word 0x080047df 8004478: 0800485b .word 0x0800485b 800447c: 08004877 .word 0x08004877 08004480 : * @brief Conversion complete callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { 8004480: b480 push {r7} 8004482: b083 sub sp, #12 8004484: af00 add r7, sp, #0 8004486: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvCpltCallback must be implemented in the user file. */ } 8004488: bf00 nop 800448a: 370c adds r7, #12 800448c: 46bd mov sp, r7 800448e: bc80 pop {r7} 8004490: 4770 bx lr 08004492 : * @brief Conversion DMA half-transfer callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) { 8004492: b480 push {r7} 8004494: b083 sub sp, #12 8004496: af00 add r7, sp, #0 8004498: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. */ } 800449a: bf00 nop 800449c: 370c adds r7, #12 800449e: 46bd mov sp, r7 80044a0: bc80 pop {r7} 80044a2: 4770 bx lr 080044a4 : * (ADC conversion with interruption or transfer by DMA) * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) { 80044a4: b480 push {r7} 80044a6: b083 sub sp, #12 80044a8: af00 add r7, sp, #0 80044aa: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ErrorCallback must be implemented in the user file. */ } 80044ac: bf00 nop 80044ae: 370c adds r7, #12 80044b0: 46bd mov sp, r7 80044b2: bc80 pop {r7} 80044b4: 4770 bx lr ... 080044b8 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 80044b8: b480 push {r7} 80044ba: b085 sub sp, #20 80044bc: af00 add r7, sp, #0 80044be: 6078 str r0, [r7, #4] 80044c0: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80044c2: 2300 movs r3, #0 80044c4: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 80044c6: 2300 movs r3, #0 80044c8: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 80044ca: 687b ldr r3, [r7, #4] 80044cc: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 80044d0: 2b01 cmp r3, #1 80044d2: d101 bne.n 80044d8 80044d4: 2302 movs r3, #2 80044d6: e0dc b.n 8004692 80044d8: 687b ldr r3, [r7, #4] 80044da: 2201 movs r2, #1 80044dc: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 80044e0: 683b ldr r3, [r7, #0] 80044e2: 685b ldr r3, [r3, #4] 80044e4: 2b06 cmp r3, #6 80044e6: d81c bhi.n 8004522 { MODIFY_REG(hadc->Instance->SQR3 , 80044e8: 687b ldr r3, [r7, #4] 80044ea: 681b ldr r3, [r3, #0] 80044ec: 6b59 ldr r1, [r3, #52] @ 0x34 80044ee: 683b ldr r3, [r7, #0] 80044f0: 685a ldr r2, [r3, #4] 80044f2: 4613 mov r3, r2 80044f4: 009b lsls r3, r3, #2 80044f6: 4413 add r3, r2 80044f8: 3b05 subs r3, #5 80044fa: 221f movs r2, #31 80044fc: fa02 f303 lsl.w r3, r2, r3 8004500: 43db mvns r3, r3 8004502: 4019 ands r1, r3 8004504: 683b ldr r3, [r7, #0] 8004506: 6818 ldr r0, [r3, #0] 8004508: 683b ldr r3, [r7, #0] 800450a: 685a ldr r2, [r3, #4] 800450c: 4613 mov r3, r2 800450e: 009b lsls r3, r3, #2 8004510: 4413 add r3, r2 8004512: 3b05 subs r3, #5 8004514: fa00 f203 lsl.w r2, r0, r3 8004518: 687b ldr r3, [r7, #4] 800451a: 681b ldr r3, [r3, #0] 800451c: 430a orrs r2, r1 800451e: 635a str r2, [r3, #52] @ 0x34 8004520: e03c b.n 800459c ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 8004522: 683b ldr r3, [r7, #0] 8004524: 685b ldr r3, [r3, #4] 8004526: 2b0c cmp r3, #12 8004528: d81c bhi.n 8004564 { MODIFY_REG(hadc->Instance->SQR2 , 800452a: 687b ldr r3, [r7, #4] 800452c: 681b ldr r3, [r3, #0] 800452e: 6b19 ldr r1, [r3, #48] @ 0x30 8004530: 683b ldr r3, [r7, #0] 8004532: 685a ldr r2, [r3, #4] 8004534: 4613 mov r3, r2 8004536: 009b lsls r3, r3, #2 8004538: 4413 add r3, r2 800453a: 3b23 subs r3, #35 @ 0x23 800453c: 221f movs r2, #31 800453e: fa02 f303 lsl.w r3, r2, r3 8004542: 43db mvns r3, r3 8004544: 4019 ands r1, r3 8004546: 683b ldr r3, [r7, #0] 8004548: 6818 ldr r0, [r3, #0] 800454a: 683b ldr r3, [r7, #0] 800454c: 685a ldr r2, [r3, #4] 800454e: 4613 mov r3, r2 8004550: 009b lsls r3, r3, #2 8004552: 4413 add r3, r2 8004554: 3b23 subs r3, #35 @ 0x23 8004556: fa00 f203 lsl.w r2, r0, r3 800455a: 687b ldr r3, [r7, #4] 800455c: 681b ldr r3, [r3, #0] 800455e: 430a orrs r2, r1 8004560: 631a str r2, [r3, #48] @ 0x30 8004562: e01b b.n 800459c ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 8004564: 687b ldr r3, [r7, #4] 8004566: 681b ldr r3, [r3, #0] 8004568: 6ad9 ldr r1, [r3, #44] @ 0x2c 800456a: 683b ldr r3, [r7, #0] 800456c: 685a ldr r2, [r3, #4] 800456e: 4613 mov r3, r2 8004570: 009b lsls r3, r3, #2 8004572: 4413 add r3, r2 8004574: 3b41 subs r3, #65 @ 0x41 8004576: 221f movs r2, #31 8004578: fa02 f303 lsl.w r3, r2, r3 800457c: 43db mvns r3, r3 800457e: 4019 ands r1, r3 8004580: 683b ldr r3, [r7, #0] 8004582: 6818 ldr r0, [r3, #0] 8004584: 683b ldr r3, [r7, #0] 8004586: 685a ldr r2, [r3, #4] 8004588: 4613 mov r3, r2 800458a: 009b lsls r3, r3, #2 800458c: 4413 add r3, r2 800458e: 3b41 subs r3, #65 @ 0x41 8004590: fa00 f203 lsl.w r2, r0, r3 8004594: 687b ldr r3, [r7, #4] 8004596: 681b ldr r3, [r3, #0] 8004598: 430a orrs r2, r1 800459a: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 800459c: 683b ldr r3, [r7, #0] 800459e: 681b ldr r3, [r3, #0] 80045a0: 2b09 cmp r3, #9 80045a2: d91c bls.n 80045de { MODIFY_REG(hadc->Instance->SMPR1 , 80045a4: 687b ldr r3, [r7, #4] 80045a6: 681b ldr r3, [r3, #0] 80045a8: 68d9 ldr r1, [r3, #12] 80045aa: 683b ldr r3, [r7, #0] 80045ac: 681a ldr r2, [r3, #0] 80045ae: 4613 mov r3, r2 80045b0: 005b lsls r3, r3, #1 80045b2: 4413 add r3, r2 80045b4: 3b1e subs r3, #30 80045b6: 2207 movs r2, #7 80045b8: fa02 f303 lsl.w r3, r2, r3 80045bc: 43db mvns r3, r3 80045be: 4019 ands r1, r3 80045c0: 683b ldr r3, [r7, #0] 80045c2: 6898 ldr r0, [r3, #8] 80045c4: 683b ldr r3, [r7, #0] 80045c6: 681a ldr r2, [r3, #0] 80045c8: 4613 mov r3, r2 80045ca: 005b lsls r3, r3, #1 80045cc: 4413 add r3, r2 80045ce: 3b1e subs r3, #30 80045d0: fa00 f203 lsl.w r2, r0, r3 80045d4: 687b ldr r3, [r7, #4] 80045d6: 681b ldr r3, [r3, #0] 80045d8: 430a orrs r2, r1 80045da: 60da str r2, [r3, #12] 80045dc: e019 b.n 8004612 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 80045de: 687b ldr r3, [r7, #4] 80045e0: 681b ldr r3, [r3, #0] 80045e2: 6919 ldr r1, [r3, #16] 80045e4: 683b ldr r3, [r7, #0] 80045e6: 681a ldr r2, [r3, #0] 80045e8: 4613 mov r3, r2 80045ea: 005b lsls r3, r3, #1 80045ec: 4413 add r3, r2 80045ee: 2207 movs r2, #7 80045f0: fa02 f303 lsl.w r3, r2, r3 80045f4: 43db mvns r3, r3 80045f6: 4019 ands r1, r3 80045f8: 683b ldr r3, [r7, #0] 80045fa: 6898 ldr r0, [r3, #8] 80045fc: 683b ldr r3, [r7, #0] 80045fe: 681a ldr r2, [r3, #0] 8004600: 4613 mov r3, r2 8004602: 005b lsls r3, r3, #1 8004604: 4413 add r3, r2 8004606: fa00 f203 lsl.w r2, r0, r3 800460a: 687b ldr r3, [r7, #4] 800460c: 681b ldr r3, [r3, #0] 800460e: 430a orrs r2, r1 8004610: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8004612: 683b ldr r3, [r7, #0] 8004614: 681b ldr r3, [r3, #0] 8004616: 2b10 cmp r3, #16 8004618: d003 beq.n 8004622 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 800461a: 683b ldr r3, [r7, #0] 800461c: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 800461e: 2b11 cmp r3, #17 8004620: d132 bne.n 8004688 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 8004622: 687b ldr r3, [r7, #4] 8004624: 681b ldr r3, [r3, #0] 8004626: 4a1d ldr r2, [pc, #116] @ (800469c ) 8004628: 4293 cmp r3, r2 800462a: d125 bne.n 8004678 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 800462c: 687b ldr r3, [r7, #4] 800462e: 681b ldr r3, [r3, #0] 8004630: 689b ldr r3, [r3, #8] 8004632: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8004636: 2b00 cmp r3, #0 8004638: d126 bne.n 8004688 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 800463a: 687b ldr r3, [r7, #4] 800463c: 681b ldr r3, [r3, #0] 800463e: 689a ldr r2, [r3, #8] 8004640: 687b ldr r3, [r7, #4] 8004642: 681b ldr r3, [r3, #0] 8004644: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 8004648: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 800464a: 683b ldr r3, [r7, #0] 800464c: 681b ldr r3, [r3, #0] 800464e: 2b10 cmp r3, #16 8004650: d11a bne.n 8004688 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8004652: 4b13 ldr r3, [pc, #76] @ (80046a0 ) 8004654: 681b ldr r3, [r3, #0] 8004656: 4a13 ldr r2, [pc, #76] @ (80046a4 ) 8004658: fba2 2303 umull r2, r3, r2, r3 800465c: 0c9a lsrs r2, r3, #18 800465e: 4613 mov r3, r2 8004660: 009b lsls r3, r3, #2 8004662: 4413 add r3, r2 8004664: 005b lsls r3, r3, #1 8004666: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8004668: e002 b.n 8004670 { wait_loop_index--; 800466a: 68bb ldr r3, [r7, #8] 800466c: 3b01 subs r3, #1 800466e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8004670: 68bb ldr r3, [r7, #8] 8004672: 2b00 cmp r3, #0 8004674: d1f9 bne.n 800466a 8004676: e007 b.n 8004688 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8004678: 687b ldr r3, [r7, #4] 800467a: 6a9b ldr r3, [r3, #40] @ 0x28 800467c: f043 0220 orr.w r2, r3, #32 8004680: 687b ldr r3, [r7, #4] 8004682: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8004684: 2301 movs r3, #1 8004686: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 8004688: 687b ldr r3, [r7, #4] 800468a: 2200 movs r2, #0 800468c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8004690: 7bfb ldrb r3, [r7, #15] } 8004692: 4618 mov r0, r3 8004694: 3714 adds r7, #20 8004696: 46bd mov sp, r7 8004698: bc80 pop {r7} 800469a: 4770 bx lr 800469c: 40012400 .word 0x40012400 80046a0: 20000008 .word 0x20000008 80046a4: 431bde83 .word 0x431bde83 080046a8 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 80046a8: b580 push {r7, lr} 80046aa: b084 sub sp, #16 80046ac: af00 add r7, sp, #0 80046ae: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 80046b0: 2300 movs r3, #0 80046b2: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 80046b4: 2300 movs r3, #0 80046b6: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 80046b8: 687b ldr r3, [r7, #4] 80046ba: 681b ldr r3, [r3, #0] 80046bc: 689b ldr r3, [r3, #8] 80046be: f003 0301 and.w r3, r3, #1 80046c2: 2b01 cmp r3, #1 80046c4: d040 beq.n 8004748 { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 80046c6: 687b ldr r3, [r7, #4] 80046c8: 681b ldr r3, [r3, #0] 80046ca: 689a ldr r2, [r3, #8] 80046cc: 687b ldr r3, [r7, #4] 80046ce: 681b ldr r3, [r3, #0] 80046d0: f042 0201 orr.w r2, r2, #1 80046d4: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 80046d6: 4b1f ldr r3, [pc, #124] @ (8004754 ) 80046d8: 681b ldr r3, [r3, #0] 80046da: 4a1f ldr r2, [pc, #124] @ (8004758 ) 80046dc: fba2 2303 umull r2, r3, r2, r3 80046e0: 0c9b lsrs r3, r3, #18 80046e2: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 80046e4: e002 b.n 80046ec { wait_loop_index--; 80046e6: 68bb ldr r3, [r7, #8] 80046e8: 3b01 subs r3, #1 80046ea: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 80046ec: 68bb ldr r3, [r7, #8] 80046ee: 2b00 cmp r3, #0 80046f0: d1f9 bne.n 80046e6 } /* Get tick count */ tickstart = HAL_GetTick(); 80046f2: f7ff fd05 bl 8004100 80046f6: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 80046f8: e01f b.n 800473a { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 80046fa: f7ff fd01 bl 8004100 80046fe: 4602 mov r2, r0 8004700: 68fb ldr r3, [r7, #12] 8004702: 1ad3 subs r3, r2, r3 8004704: 2b02 cmp r3, #2 8004706: d918 bls.n 800473a { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 8004708: 687b ldr r3, [r7, #4] 800470a: 681b ldr r3, [r3, #0] 800470c: 689b ldr r3, [r3, #8] 800470e: f003 0301 and.w r3, r3, #1 8004712: 2b01 cmp r3, #1 8004714: d011 beq.n 800473a { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8004716: 687b ldr r3, [r7, #4] 8004718: 6a9b ldr r3, [r3, #40] @ 0x28 800471a: f043 0210 orr.w r2, r3, #16 800471e: 687b ldr r3, [r7, #4] 8004720: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8004722: 687b ldr r3, [r7, #4] 8004724: 6adb ldr r3, [r3, #44] @ 0x2c 8004726: f043 0201 orr.w r2, r3, #1 800472a: 687b ldr r3, [r7, #4] 800472c: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 800472e: 687b ldr r3, [r7, #4] 8004730: 2200 movs r2, #0 8004732: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8004736: 2301 movs r3, #1 8004738: e007 b.n 800474a while(ADC_IS_ENABLE(hadc) == RESET) 800473a: 687b ldr r3, [r7, #4] 800473c: 681b ldr r3, [r3, #0] 800473e: 689b ldr r3, [r3, #8] 8004740: f003 0301 and.w r3, r3, #1 8004744: 2b01 cmp r3, #1 8004746: d1d8 bne.n 80046fa } } } /* Return HAL status */ return HAL_OK; 8004748: 2300 movs r3, #0 } 800474a: 4618 mov r0, r3 800474c: 3710 adds r7, #16 800474e: 46bd mov sp, r7 8004750: bd80 pop {r7, pc} 8004752: bf00 nop 8004754: 20000008 .word 0x20000008 8004758: 431bde83 .word 0x431bde83 0800475c : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 800475c: b580 push {r7, lr} 800475e: b084 sub sp, #16 8004760: af00 add r7, sp, #0 8004762: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8004764: 2300 movs r3, #0 8004766: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 8004768: 687b ldr r3, [r7, #4] 800476a: 681b ldr r3, [r3, #0] 800476c: 689b ldr r3, [r3, #8] 800476e: f003 0301 and.w r3, r3, #1 8004772: 2b01 cmp r3, #1 8004774: d12e bne.n 80047d4 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 8004776: 687b ldr r3, [r7, #4] 8004778: 681b ldr r3, [r3, #0] 800477a: 689a ldr r2, [r3, #8] 800477c: 687b ldr r3, [r7, #4] 800477e: 681b ldr r3, [r3, #0] 8004780: f022 0201 bic.w r2, r2, #1 8004784: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 8004786: f7ff fcbb bl 8004100 800478a: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 800478c: e01b b.n 80047c6 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 800478e: f7ff fcb7 bl 8004100 8004792: 4602 mov r2, r0 8004794: 68fb ldr r3, [r7, #12] 8004796: 1ad3 subs r3, r2, r3 8004798: 2b02 cmp r3, #2 800479a: d914 bls.n 80047c6 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 800479c: 687b ldr r3, [r7, #4] 800479e: 681b ldr r3, [r3, #0] 80047a0: 689b ldr r3, [r3, #8] 80047a2: f003 0301 and.w r3, r3, #1 80047a6: 2b01 cmp r3, #1 80047a8: d10d bne.n 80047c6 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80047aa: 687b ldr r3, [r7, #4] 80047ac: 6a9b ldr r3, [r3, #40] @ 0x28 80047ae: f043 0210 orr.w r2, r3, #16 80047b2: 687b ldr r3, [r7, #4] 80047b4: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80047b6: 687b ldr r3, [r7, #4] 80047b8: 6adb ldr r3, [r3, #44] @ 0x2c 80047ba: f043 0201 orr.w r2, r3, #1 80047be: 687b ldr r3, [r7, #4] 80047c0: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 80047c2: 2301 movs r3, #1 80047c4: e007 b.n 80047d6 while(ADC_IS_ENABLE(hadc) != RESET) 80047c6: 687b ldr r3, [r7, #4] 80047c8: 681b ldr r3, [r3, #0] 80047ca: 689b ldr r3, [r3, #8] 80047cc: f003 0301 and.w r3, r3, #1 80047d0: 2b01 cmp r3, #1 80047d2: d0dc beq.n 800478e } } } /* Return HAL status */ return HAL_OK; 80047d4: 2300 movs r3, #0 } 80047d6: 4618 mov r0, r3 80047d8: 3710 adds r7, #16 80047da: 46bd mov sp, r7 80047dc: bd80 pop {r7, pc} 080047de : * @brief DMA transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { 80047de: b580 push {r7, lr} 80047e0: b084 sub sp, #16 80047e2: af00 add r7, sp, #0 80047e4: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 80047e6: 687b ldr r3, [r7, #4] 80047e8: 6a5b ldr r3, [r3, #36] @ 0x24 80047ea: 60fb str r3, [r7, #12] /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 80047ec: 68fb ldr r3, [r7, #12] 80047ee: 6a9b ldr r3, [r3, #40] @ 0x28 80047f0: f003 0350 and.w r3, r3, #80 @ 0x50 80047f4: 2b00 cmp r3, #0 80047f6: d127 bne.n 8004848 { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 80047f8: 68fb ldr r3, [r7, #12] 80047fa: 6a9b ldr r3, [r3, #40] @ 0x28 80047fc: f443 7200 orr.w r2, r3, #512 @ 0x200 8004800: 68fb ldr r3, [r7, #12] 8004802: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8004804: 68fb ldr r3, [r7, #12] 8004806: 681b ldr r3, [r3, #0] 8004808: 689b ldr r3, [r3, #8] 800480a: f403 2360 and.w r3, r3, #917504 @ 0xe0000 800480e: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 8004812: d115 bne.n 8004840 (hadc->Init.ContinuousConvMode == DISABLE) ) 8004814: 68fb ldr r3, [r7, #12] 8004816: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8004818: 2b00 cmp r3, #0 800481a: d111 bne.n 8004840 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 800481c: 68fb ldr r3, [r7, #12] 800481e: 6a9b ldr r3, [r3, #40] @ 0x28 8004820: f423 7280 bic.w r2, r3, #256 @ 0x100 8004824: 68fb ldr r3, [r7, #12] 8004826: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8004828: 68fb ldr r3, [r7, #12] 800482a: 6a9b ldr r3, [r3, #40] @ 0x28 800482c: f403 5380 and.w r3, r3, #4096 @ 0x1000 8004830: 2b00 cmp r3, #0 8004832: d105 bne.n 8004840 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8004834: 68fb ldr r3, [r7, #12] 8004836: 6a9b ldr r3, [r3, #40] @ 0x28 8004838: f043 0201 orr.w r2, r3, #1 800483c: 68fb ldr r3, [r7, #12] 800483e: 629a str r2, [r3, #40] @ 0x28 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 8004840: 68f8 ldr r0, [r7, #12] 8004842: f7ff fe1d bl 8004480 else { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); } } 8004846: e004 b.n 8004852 hadc->DMA_Handle->XferErrorCallback(hdma); 8004848: 68fb ldr r3, [r7, #12] 800484a: 6a1b ldr r3, [r3, #32] 800484c: 6b1b ldr r3, [r3, #48] @ 0x30 800484e: 6878 ldr r0, [r7, #4] 8004850: 4798 blx r3 } 8004852: bf00 nop 8004854: 3710 adds r7, #16 8004856: 46bd mov sp, r7 8004858: bd80 pop {r7, pc} 0800485a : * @brief DMA half transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 800485a: b580 push {r7, lr} 800485c: b084 sub sp, #16 800485e: af00 add r7, sp, #0 8004860: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8004862: 687b ldr r3, [r7, #4] 8004864: 6a5b ldr r3, [r3, #36] @ 0x24 8004866: 60fb str r3, [r7, #12] /* Half conversion callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvHalfCpltCallback(hadc); #else HAL_ADC_ConvHalfCpltCallback(hadc); 8004868: 68f8 ldr r0, [r7, #12] 800486a: f7ff fe12 bl 8004492 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 800486e: bf00 nop 8004870: 3710 adds r7, #16 8004872: 46bd mov sp, r7 8004874: bd80 pop {r7, pc} 08004876 : * @brief DMA error callback * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAError(DMA_HandleTypeDef *hdma) { 8004876: b580 push {r7, lr} 8004878: b084 sub sp, #16 800487a: af00 add r7, sp, #0 800487c: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800487e: 687b ldr r3, [r7, #4] 8004880: 6a5b ldr r3, [r3, #36] @ 0x24 8004882: 60fb str r3, [r7, #12] /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 8004884: 68fb ldr r3, [r7, #12] 8004886: 6a9b ldr r3, [r3, #40] @ 0x28 8004888: f043 0240 orr.w r2, r3, #64 @ 0x40 800488c: 68fb ldr r3, [r7, #12] 800488e: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to DMA error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 8004890: 68fb ldr r3, [r7, #12] 8004892: 6adb ldr r3, [r3, #44] @ 0x2c 8004894: f043 0204 orr.w r2, r3, #4 8004898: 68fb ldr r3, [r7, #12] 800489a: 62da str r2, [r3, #44] @ 0x2c /* Error callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ErrorCallback(hadc); #else HAL_ADC_ErrorCallback(hadc); 800489c: 68f8 ldr r0, [r7, #12] 800489e: f7ff fe01 bl 80044a4 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 80048a2: bf00 nop 80048a4: 3710 adds r7, #16 80048a6: 46bd mov sp, r7 80048a8: bd80 pop {r7, pc} ... 080048ac <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80048ac: b480 push {r7} 80048ae: b085 sub sp, #20 80048b0: af00 add r7, sp, #0 80048b2: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80048b4: 687b ldr r3, [r7, #4] 80048b6: f003 0307 and.w r3, r3, #7 80048ba: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 80048bc: 4b0c ldr r3, [pc, #48] @ (80048f0 <__NVIC_SetPriorityGrouping+0x44>) 80048be: 68db ldr r3, [r3, #12] 80048c0: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80048c2: 68ba ldr r2, [r7, #8] 80048c4: f64f 03ff movw r3, #63743 @ 0xf8ff 80048c8: 4013 ands r3, r2 80048ca: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80048cc: 68fb ldr r3, [r7, #12] 80048ce: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80048d0: 68bb ldr r3, [r7, #8] 80048d2: 4313 orrs r3, r2 reg_value = (reg_value | 80048d4: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 80048d8: f443 3300 orr.w r3, r3, #131072 @ 0x20000 80048dc: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 80048de: 4a04 ldr r2, [pc, #16] @ (80048f0 <__NVIC_SetPriorityGrouping+0x44>) 80048e0: 68bb ldr r3, [r7, #8] 80048e2: 60d3 str r3, [r2, #12] } 80048e4: bf00 nop 80048e6: 3714 adds r7, #20 80048e8: 46bd mov sp, r7 80048ea: bc80 pop {r7} 80048ec: 4770 bx lr 80048ee: bf00 nop 80048f0: e000ed00 .word 0xe000ed00 080048f4 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 80048f4: b480 push {r7} 80048f6: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80048f8: 4b04 ldr r3, [pc, #16] @ (800490c <__NVIC_GetPriorityGrouping+0x18>) 80048fa: 68db ldr r3, [r3, #12] 80048fc: 0a1b lsrs r3, r3, #8 80048fe: f003 0307 and.w r3, r3, #7 } 8004902: 4618 mov r0, r3 8004904: 46bd mov sp, r7 8004906: bc80 pop {r7} 8004908: 4770 bx lr 800490a: bf00 nop 800490c: e000ed00 .word 0xe000ed00 08004910 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8004910: b480 push {r7} 8004912: b083 sub sp, #12 8004914: af00 add r7, sp, #0 8004916: 4603 mov r3, r0 8004918: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 800491a: f997 3007 ldrsb.w r3, [r7, #7] 800491e: 2b00 cmp r3, #0 8004920: db0b blt.n 800493a <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8004922: 79fb ldrb r3, [r7, #7] 8004924: f003 021f and.w r2, r3, #31 8004928: 4906 ldr r1, [pc, #24] @ (8004944 <__NVIC_EnableIRQ+0x34>) 800492a: f997 3007 ldrsb.w r3, [r7, #7] 800492e: 095b lsrs r3, r3, #5 8004930: 2001 movs r0, #1 8004932: fa00 f202 lsl.w r2, r0, r2 8004936: f841 2023 str.w r2, [r1, r3, lsl #2] } } 800493a: bf00 nop 800493c: 370c adds r7, #12 800493e: 46bd mov sp, r7 8004940: bc80 pop {r7} 8004942: 4770 bx lr 8004944: e000e100 .word 0xe000e100 08004948 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8004948: b480 push {r7} 800494a: b083 sub sp, #12 800494c: af00 add r7, sp, #0 800494e: 4603 mov r3, r0 8004950: 6039 str r1, [r7, #0] 8004952: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8004954: f997 3007 ldrsb.w r3, [r7, #7] 8004958: 2b00 cmp r3, #0 800495a: db0a blt.n 8004972 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800495c: 683b ldr r3, [r7, #0] 800495e: b2da uxtb r2, r3 8004960: 490c ldr r1, [pc, #48] @ (8004994 <__NVIC_SetPriority+0x4c>) 8004962: f997 3007 ldrsb.w r3, [r7, #7] 8004966: 0112 lsls r2, r2, #4 8004968: b2d2 uxtb r2, r2 800496a: 440b add r3, r1 800496c: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8004970: e00a b.n 8004988 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004972: 683b ldr r3, [r7, #0] 8004974: b2da uxtb r2, r3 8004976: 4908 ldr r1, [pc, #32] @ (8004998 <__NVIC_SetPriority+0x50>) 8004978: 79fb ldrb r3, [r7, #7] 800497a: f003 030f and.w r3, r3, #15 800497e: 3b04 subs r3, #4 8004980: 0112 lsls r2, r2, #4 8004982: b2d2 uxtb r2, r2 8004984: 440b add r3, r1 8004986: 761a strb r2, [r3, #24] } 8004988: bf00 nop 800498a: 370c adds r7, #12 800498c: 46bd mov sp, r7 800498e: bc80 pop {r7} 8004990: 4770 bx lr 8004992: bf00 nop 8004994: e000e100 .word 0xe000e100 8004998: e000ed00 .word 0xe000ed00 0800499c : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 800499c: b480 push {r7} 800499e: b089 sub sp, #36 @ 0x24 80049a0: af00 add r7, sp, #0 80049a2: 60f8 str r0, [r7, #12] 80049a4: 60b9 str r1, [r7, #8] 80049a6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80049a8: 68fb ldr r3, [r7, #12] 80049aa: f003 0307 and.w r3, r3, #7 80049ae: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80049b0: 69fb ldr r3, [r7, #28] 80049b2: f1c3 0307 rsb r3, r3, #7 80049b6: 2b04 cmp r3, #4 80049b8: bf28 it cs 80049ba: 2304 movcs r3, #4 80049bc: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80049be: 69fb ldr r3, [r7, #28] 80049c0: 3304 adds r3, #4 80049c2: 2b06 cmp r3, #6 80049c4: d902 bls.n 80049cc 80049c6: 69fb ldr r3, [r7, #28] 80049c8: 3b03 subs r3, #3 80049ca: e000 b.n 80049ce 80049cc: 2300 movs r3, #0 80049ce: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80049d0: f04f 32ff mov.w r2, #4294967295 80049d4: 69bb ldr r3, [r7, #24] 80049d6: fa02 f303 lsl.w r3, r2, r3 80049da: 43da mvns r2, r3 80049dc: 68bb ldr r3, [r7, #8] 80049de: 401a ands r2, r3 80049e0: 697b ldr r3, [r7, #20] 80049e2: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 80049e4: f04f 31ff mov.w r1, #4294967295 80049e8: 697b ldr r3, [r7, #20] 80049ea: fa01 f303 lsl.w r3, r1, r3 80049ee: 43d9 mvns r1, r3 80049f0: 687b ldr r3, [r7, #4] 80049f2: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80049f4: 4313 orrs r3, r2 ); } 80049f6: 4618 mov r0, r3 80049f8: 3724 adds r7, #36 @ 0x24 80049fa: 46bd mov sp, r7 80049fc: bc80 pop {r7} 80049fe: 4770 bx lr 08004a00 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8004a00: b580 push {r7, lr} 8004a02: b082 sub sp, #8 8004a04: af00 add r7, sp, #0 8004a06: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8004a08: 687b ldr r3, [r7, #4] 8004a0a: 3b01 subs r3, #1 8004a0c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8004a10: d301 bcc.n 8004a16 { return (1UL); /* Reload value impossible */ 8004a12: 2301 movs r3, #1 8004a14: e00f b.n 8004a36 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8004a16: 4a0a ldr r2, [pc, #40] @ (8004a40 ) 8004a18: 687b ldr r3, [r7, #4] 8004a1a: 3b01 subs r3, #1 8004a1c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8004a1e: 210f movs r1, #15 8004a20: f04f 30ff mov.w r0, #4294967295 8004a24: f7ff ff90 bl 8004948 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8004a28: 4b05 ldr r3, [pc, #20] @ (8004a40 ) 8004a2a: 2200 movs r2, #0 8004a2c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8004a2e: 4b04 ldr r3, [pc, #16] @ (8004a40 ) 8004a30: 2207 movs r2, #7 8004a32: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8004a34: 2300 movs r3, #0 } 8004a36: 4618 mov r0, r3 8004a38: 3708 adds r7, #8 8004a3a: 46bd mov sp, r7 8004a3c: bd80 pop {r7, pc} 8004a3e: bf00 nop 8004a40: e000e010 .word 0xe000e010 08004a44 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8004a44: b580 push {r7, lr} 8004a46: b082 sub sp, #8 8004a48: af00 add r7, sp, #0 8004a4a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8004a4c: 6878 ldr r0, [r7, #4] 8004a4e: f7ff ff2d bl 80048ac <__NVIC_SetPriorityGrouping> } 8004a52: bf00 nop 8004a54: 3708 adds r7, #8 8004a56: 46bd mov sp, r7 8004a58: bd80 pop {r7, pc} 08004a5a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8004a5a: b580 push {r7, lr} 8004a5c: b086 sub sp, #24 8004a5e: af00 add r7, sp, #0 8004a60: 4603 mov r3, r0 8004a62: 60b9 str r1, [r7, #8] 8004a64: 607a str r2, [r7, #4] 8004a66: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8004a68: 2300 movs r3, #0 8004a6a: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8004a6c: f7ff ff42 bl 80048f4 <__NVIC_GetPriorityGrouping> 8004a70: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8004a72: 687a ldr r2, [r7, #4] 8004a74: 68b9 ldr r1, [r7, #8] 8004a76: 6978 ldr r0, [r7, #20] 8004a78: f7ff ff90 bl 800499c 8004a7c: 4602 mov r2, r0 8004a7e: f997 300f ldrsb.w r3, [r7, #15] 8004a82: 4611 mov r1, r2 8004a84: 4618 mov r0, r3 8004a86: f7ff ff5f bl 8004948 <__NVIC_SetPriority> } 8004a8a: bf00 nop 8004a8c: 3718 adds r7, #24 8004a8e: 46bd mov sp, r7 8004a90: bd80 pop {r7, pc} 08004a92 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8004a92: b580 push {r7, lr} 8004a94: b082 sub sp, #8 8004a96: af00 add r7, sp, #0 8004a98: 4603 mov r3, r0 8004a9a: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8004a9c: f997 3007 ldrsb.w r3, [r7, #7] 8004aa0: 4618 mov r0, r3 8004aa2: f7ff ff35 bl 8004910 <__NVIC_EnableIRQ> } 8004aa6: bf00 nop 8004aa8: 3708 adds r7, #8 8004aaa: 46bd mov sp, r7 8004aac: bd80 pop {r7, pc} 08004aae : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8004aae: b580 push {r7, lr} 8004ab0: b082 sub sp, #8 8004ab2: af00 add r7, sp, #0 8004ab4: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8004ab6: 6878 ldr r0, [r7, #4] 8004ab8: f7ff ffa2 bl 8004a00 8004abc: 4603 mov r3, r0 } 8004abe: 4618 mov r0, r3 8004ac0: 3708 adds r7, #8 8004ac2: 46bd mov sp, r7 8004ac4: bd80 pop {r7, pc} 08004ac6 : /** * @brief This function handles SYSTICK interrupt request. * @retval None */ void HAL_SYSTICK_IRQHandler(void) { 8004ac6: b580 push {r7, lr} 8004ac8: af00 add r7, sp, #0 HAL_SYSTICK_Callback(); 8004aca: f7fc fcab bl 8001424 } 8004ace: bf00 nop 8004ad0: bd80 pop {r7, pc} ... 08004ad4 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 8004ad4: b480 push {r7} 8004ad6: b085 sub sp, #20 8004ad8: af00 add r7, sp, #0 8004ada: 6078 str r0, [r7, #4] uint32_t tmp = 0U; 8004adc: 2300 movs r3, #0 8004ade: 60fb str r3, [r7, #12] /* Check the DMA handle allocation */ if(hdma == NULL) 8004ae0: 687b ldr r3, [r7, #4] 8004ae2: 2b00 cmp r3, #0 8004ae4: d101 bne.n 8004aea { return HAL_ERROR; 8004ae6: 2301 movs r3, #1 8004ae8: e043 b.n 8004b72 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; hdma->DmaBaseAddress = DMA2; } #else /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 8004aea: 687b ldr r3, [r7, #4] 8004aec: 681b ldr r3, [r3, #0] 8004aee: 461a mov r2, r3 8004af0: 4b22 ldr r3, [pc, #136] @ (8004b7c ) 8004af2: 4413 add r3, r2 8004af4: 4a22 ldr r2, [pc, #136] @ (8004b80 ) 8004af6: fba2 2303 umull r2, r3, r2, r3 8004afa: 091b lsrs r3, r3, #4 8004afc: 009a lsls r2, r3, #2 8004afe: 687b ldr r3, [r7, #4] 8004b00: 641a str r2, [r3, #64] @ 0x40 hdma->DmaBaseAddress = DMA1; 8004b02: 687b ldr r3, [r7, #4] 8004b04: 4a1f ldr r2, [pc, #124] @ (8004b84 ) 8004b06: 63da str r2, [r3, #60] @ 0x3c #endif /* DMA2 */ /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8004b08: 687b ldr r3, [r7, #4] 8004b0a: 2202 movs r2, #2 8004b0c: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Get the CR register value */ tmp = hdma->Instance->CCR; 8004b10: 687b ldr r3, [r7, #4] 8004b12: 681b ldr r3, [r3, #0] 8004b14: 681b ldr r3, [r3, #0] 8004b16: 60fb str r3, [r7, #12] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8004b18: 68fb ldr r3, [r7, #12] 8004b1a: f423 537f bic.w r3, r3, #16320 @ 0x3fc0 8004b1e: f023 0330 bic.w r3, r3, #48 @ 0x30 8004b22: 60fb str r3, [r7, #12] DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 8004b24: 687b ldr r3, [r7, #4] 8004b26: 685a ldr r2, [r3, #4] hdma->Init.PeriphInc | hdma->Init.MemInc | 8004b28: 687b ldr r3, [r7, #4] 8004b2a: 689b ldr r3, [r3, #8] tmp |= hdma->Init.Direction | 8004b2c: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | 8004b2e: 687b ldr r3, [r7, #4] 8004b30: 68db ldr r3, [r3, #12] 8004b32: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8004b34: 687b ldr r3, [r7, #4] 8004b36: 691b ldr r3, [r3, #16] hdma->Init.PeriphInc | hdma->Init.MemInc | 8004b38: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8004b3a: 687b ldr r3, [r7, #4] 8004b3c: 695b ldr r3, [r3, #20] 8004b3e: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8004b40: 687b ldr r3, [r7, #4] 8004b42: 699b ldr r3, [r3, #24] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8004b44: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8004b46: 687b ldr r3, [r7, #4] 8004b48: 69db ldr r3, [r3, #28] 8004b4a: 4313 orrs r3, r2 tmp |= hdma->Init.Direction | 8004b4c: 68fa ldr r2, [r7, #12] 8004b4e: 4313 orrs r3, r2 8004b50: 60fb str r3, [r7, #12] /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 8004b52: 687b ldr r3, [r7, #4] 8004b54: 681b ldr r3, [r3, #0] 8004b56: 68fa ldr r2, [r7, #12] 8004b58: 601a str r2, [r3, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8004b5a: 687b ldr r3, [r7, #4] 8004b5c: 2200 movs r2, #0 8004b5e: 639a str r2, [r3, #56] @ 0x38 /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 8004b60: 687b ldr r3, [r7, #4] 8004b62: 2201 movs r2, #1 8004b64: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8004b68: 687b ldr r3, [r7, #4] 8004b6a: 2200 movs r2, #0 8004b6c: f883 2020 strb.w r2, [r3, #32] return HAL_OK; 8004b70: 2300 movs r3, #0 } 8004b72: 4618 mov r0, r3 8004b74: 3714 adds r7, #20 8004b76: 46bd mov sp, r7 8004b78: bc80 pop {r7} 8004b7a: 4770 bx lr 8004b7c: bffdfff8 .word 0xbffdfff8 8004b80: cccccccd .word 0xcccccccd 8004b84: 40020000 .word 0x40020000 08004b88 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8004b88: b580 push {r7, lr} 8004b8a: b086 sub sp, #24 8004b8c: af00 add r7, sp, #0 8004b8e: 60f8 str r0, [r7, #12] 8004b90: 60b9 str r1, [r7, #8] 8004b92: 607a str r2, [r7, #4] 8004b94: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8004b96: 2300 movs r3, #0 8004b98: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8004b9a: 68fb ldr r3, [r7, #12] 8004b9c: f893 3020 ldrb.w r3, [r3, #32] 8004ba0: 2b01 cmp r3, #1 8004ba2: d101 bne.n 8004ba8 8004ba4: 2302 movs r3, #2 8004ba6: e04b b.n 8004c40 8004ba8: 68fb ldr r3, [r7, #12] 8004baa: 2201 movs r2, #1 8004bac: f883 2020 strb.w r2, [r3, #32] if(HAL_DMA_STATE_READY == hdma->State) 8004bb0: 68fb ldr r3, [r7, #12] 8004bb2: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8004bb6: b2db uxtb r3, r3 8004bb8: 2b01 cmp r3, #1 8004bba: d13a bne.n 8004c32 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8004bbc: 68fb ldr r3, [r7, #12] 8004bbe: 2202 movs r2, #2 8004bc0: f883 2021 strb.w r2, [r3, #33] @ 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8004bc4: 68fb ldr r3, [r7, #12] 8004bc6: 2200 movs r2, #0 8004bc8: 639a str r2, [r3, #56] @ 0x38 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8004bca: 68fb ldr r3, [r7, #12] 8004bcc: 681b ldr r3, [r3, #0] 8004bce: 681a ldr r2, [r3, #0] 8004bd0: 68fb ldr r3, [r7, #12] 8004bd2: 681b ldr r3, [r3, #0] 8004bd4: f022 0201 bic.w r2, r2, #1 8004bd8: 601a str r2, [r3, #0] /* Configure the source, destination address and the data length & clear flags*/ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 8004bda: 683b ldr r3, [r7, #0] 8004bdc: 687a ldr r2, [r7, #4] 8004bde: 68b9 ldr r1, [r7, #8] 8004be0: 68f8 ldr r0, [r7, #12] 8004be2: f000 f937 bl 8004e54 /* Enable the transfer complete interrupt */ /* Enable the transfer Error interrupt */ if(NULL != hdma->XferHalfCpltCallback) 8004be6: 68fb ldr r3, [r7, #12] 8004be8: 6adb ldr r3, [r3, #44] @ 0x2c 8004bea: 2b00 cmp r3, #0 8004bec: d008 beq.n 8004c00 { /* Enable the Half transfer complete interrupt as well */ __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004bee: 68fb ldr r3, [r7, #12] 8004bf0: 681b ldr r3, [r3, #0] 8004bf2: 681a ldr r2, [r3, #0] 8004bf4: 68fb ldr r3, [r7, #12] 8004bf6: 681b ldr r3, [r3, #0] 8004bf8: f042 020e orr.w r2, r2, #14 8004bfc: 601a str r2, [r3, #0] 8004bfe: e00f b.n 8004c20 } else { __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8004c00: 68fb ldr r3, [r7, #12] 8004c02: 681b ldr r3, [r3, #0] 8004c04: 681a ldr r2, [r3, #0] 8004c06: 68fb ldr r3, [r7, #12] 8004c08: 681b ldr r3, [r3, #0] 8004c0a: f022 0204 bic.w r2, r2, #4 8004c0e: 601a str r2, [r3, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8004c10: 68fb ldr r3, [r7, #12] 8004c12: 681b ldr r3, [r3, #0] 8004c14: 681a ldr r2, [r3, #0] 8004c16: 68fb ldr r3, [r7, #12] 8004c18: 681b ldr r3, [r3, #0] 8004c1a: f042 020a orr.w r2, r2, #10 8004c1e: 601a str r2, [r3, #0] } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); 8004c20: 68fb ldr r3, [r7, #12] 8004c22: 681b ldr r3, [r3, #0] 8004c24: 681a ldr r2, [r3, #0] 8004c26: 68fb ldr r3, [r7, #12] 8004c28: 681b ldr r3, [r3, #0] 8004c2a: f042 0201 orr.w r2, r2, #1 8004c2e: 601a str r2, [r3, #0] 8004c30: e005 b.n 8004c3e } else { /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004c32: 68fb ldr r3, [r7, #12] 8004c34: 2200 movs r2, #0 8004c36: f883 2020 strb.w r2, [r3, #32] /* Remain BUSY */ status = HAL_BUSY; 8004c3a: 2302 movs r3, #2 8004c3c: 75fb strb r3, [r7, #23] } return status; 8004c3e: 7dfb ldrb r3, [r7, #23] } 8004c40: 4618 mov r0, r3 8004c42: 3718 adds r7, #24 8004c44: 46bd mov sp, r7 8004c46: bd80 pop {r7, pc} 08004c48 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { 8004c48: b580 push {r7, lr} 8004c4a: b084 sub sp, #16 8004c4c: af00 add r7, sp, #0 8004c4e: 6078 str r0, [r7, #4] uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8004c50: 687b ldr r3, [r7, #4] 8004c52: 6bdb ldr r3, [r3, #60] @ 0x3c 8004c54: 681b ldr r3, [r3, #0] 8004c56: 60fb str r3, [r7, #12] uint32_t source_it = hdma->Instance->CCR; 8004c58: 687b ldr r3, [r7, #4] 8004c5a: 681b ldr r3, [r3, #0] 8004c5c: 681b ldr r3, [r3, #0] 8004c5e: 60bb str r3, [r7, #8] /* Half Transfer Complete Interrupt management ******************************/ if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8004c60: 687b ldr r3, [r7, #4] 8004c62: 6c1b ldr r3, [r3, #64] @ 0x40 8004c64: 2204 movs r2, #4 8004c66: 409a lsls r2, r3 8004c68: 68fb ldr r3, [r7, #12] 8004c6a: 4013 ands r3, r2 8004c6c: 2b00 cmp r3, #0 8004c6e: d04f beq.n 8004d10 8004c70: 68bb ldr r3, [r7, #8] 8004c72: f003 0304 and.w r3, r3, #4 8004c76: 2b00 cmp r3, #0 8004c78: d04a beq.n 8004d10 { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8004c7a: 687b ldr r3, [r7, #4] 8004c7c: 681b ldr r3, [r3, #0] 8004c7e: 681b ldr r3, [r3, #0] 8004c80: f003 0320 and.w r3, r3, #32 8004c84: 2b00 cmp r3, #0 8004c86: d107 bne.n 8004c98 { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8004c88: 687b ldr r3, [r7, #4] 8004c8a: 681b ldr r3, [r3, #0] 8004c8c: 681a ldr r2, [r3, #0] 8004c8e: 687b ldr r3, [r7, #4] 8004c90: 681b ldr r3, [r3, #0] 8004c92: f022 0204 bic.w r2, r2, #4 8004c96: 601a str r2, [r3, #0] } /* Clear the half transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 8004c98: 687b ldr r3, [r7, #4] 8004c9a: 681b ldr r3, [r3, #0] 8004c9c: 4a66 ldr r2, [pc, #408] @ (8004e38 ) 8004c9e: 4293 cmp r3, r2 8004ca0: d029 beq.n 8004cf6 8004ca2: 687b ldr r3, [r7, #4] 8004ca4: 681b ldr r3, [r3, #0] 8004ca6: 4a65 ldr r2, [pc, #404] @ (8004e3c ) 8004ca8: 4293 cmp r3, r2 8004caa: d022 beq.n 8004cf2 8004cac: 687b ldr r3, [r7, #4] 8004cae: 681b ldr r3, [r3, #0] 8004cb0: 4a63 ldr r2, [pc, #396] @ (8004e40 ) 8004cb2: 4293 cmp r3, r2 8004cb4: d01a beq.n 8004cec 8004cb6: 687b ldr r3, [r7, #4] 8004cb8: 681b ldr r3, [r3, #0] 8004cba: 4a62 ldr r2, [pc, #392] @ (8004e44 ) 8004cbc: 4293 cmp r3, r2 8004cbe: d012 beq.n 8004ce6 8004cc0: 687b ldr r3, [r7, #4] 8004cc2: 681b ldr r3, [r3, #0] 8004cc4: 4a60 ldr r2, [pc, #384] @ (8004e48 ) 8004cc6: 4293 cmp r3, r2 8004cc8: d00a beq.n 8004ce0 8004cca: 687b ldr r3, [r7, #4] 8004ccc: 681b ldr r3, [r3, #0] 8004cce: 4a5f ldr r2, [pc, #380] @ (8004e4c ) 8004cd0: 4293 cmp r3, r2 8004cd2: d102 bne.n 8004cda 8004cd4: f44f 0380 mov.w r3, #4194304 @ 0x400000 8004cd8: e00e b.n 8004cf8 8004cda: f04f 6380 mov.w r3, #67108864 @ 0x4000000 8004cde: e00b b.n 8004cf8 8004ce0: f44f 2380 mov.w r3, #262144 @ 0x40000 8004ce4: e008 b.n 8004cf8 8004ce6: f44f 4380 mov.w r3, #16384 @ 0x4000 8004cea: e005 b.n 8004cf8 8004cec: f44f 6380 mov.w r3, #1024 @ 0x400 8004cf0: e002 b.n 8004cf8 8004cf2: 2340 movs r3, #64 @ 0x40 8004cf4: e000 b.n 8004cf8 8004cf6: 2304 movs r3, #4 8004cf8: 4a55 ldr r2, [pc, #340] @ (8004e50 ) 8004cfa: 6053 str r3, [r2, #4] /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) 8004cfc: 687b ldr r3, [r7, #4] 8004cfe: 6adb ldr r3, [r3, #44] @ 0x2c 8004d00: 2b00 cmp r3, #0 8004d02: f000 8094 beq.w 8004e2e { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); 8004d06: 687b ldr r3, [r7, #4] 8004d08: 6adb ldr r3, [r3, #44] @ 0x2c 8004d0a: 6878 ldr r0, [r7, #4] 8004d0c: 4798 blx r3 if(hdma->XferHalfCpltCallback != NULL) 8004d0e: e08e b.n 8004e2e } } /* Transfer Complete Interrupt management ***********************************/ else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8004d10: 687b ldr r3, [r7, #4] 8004d12: 6c1b ldr r3, [r3, #64] @ 0x40 8004d14: 2202 movs r2, #2 8004d16: 409a lsls r2, r3 8004d18: 68fb ldr r3, [r7, #12] 8004d1a: 4013 ands r3, r2 8004d1c: 2b00 cmp r3, #0 8004d1e: d056 beq.n 8004dce 8004d20: 68bb ldr r3, [r7, #8] 8004d22: f003 0302 and.w r3, r3, #2 8004d26: 2b00 cmp r3, #0 8004d28: d051 beq.n 8004dce { if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8004d2a: 687b ldr r3, [r7, #4] 8004d2c: 681b ldr r3, [r3, #0] 8004d2e: 681b ldr r3, [r3, #0] 8004d30: f003 0320 and.w r3, r3, #32 8004d34: 2b00 cmp r3, #0 8004d36: d10b bne.n 8004d50 { /* Disable the transfer complete and error interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8004d38: 687b ldr r3, [r7, #4] 8004d3a: 681b ldr r3, [r3, #0] 8004d3c: 681a ldr r2, [r3, #0] 8004d3e: 687b ldr r3, [r7, #4] 8004d40: 681b ldr r3, [r3, #0] 8004d42: f022 020a bic.w r2, r2, #10 8004d46: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8004d48: 687b ldr r3, [r7, #4] 8004d4a: 2201 movs r2, #1 8004d4c: f883 2021 strb.w r2, [r3, #33] @ 0x21 } /* Clear the transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8004d50: 687b ldr r3, [r7, #4] 8004d52: 681b ldr r3, [r3, #0] 8004d54: 4a38 ldr r2, [pc, #224] @ (8004e38 ) 8004d56: 4293 cmp r3, r2 8004d58: d029 beq.n 8004dae 8004d5a: 687b ldr r3, [r7, #4] 8004d5c: 681b ldr r3, [r3, #0] 8004d5e: 4a37 ldr r2, [pc, #220] @ (8004e3c ) 8004d60: 4293 cmp r3, r2 8004d62: d022 beq.n 8004daa 8004d64: 687b ldr r3, [r7, #4] 8004d66: 681b ldr r3, [r3, #0] 8004d68: 4a35 ldr r2, [pc, #212] @ (8004e40 ) 8004d6a: 4293 cmp r3, r2 8004d6c: d01a beq.n 8004da4 8004d6e: 687b ldr r3, [r7, #4] 8004d70: 681b ldr r3, [r3, #0] 8004d72: 4a34 ldr r2, [pc, #208] @ (8004e44 ) 8004d74: 4293 cmp r3, r2 8004d76: d012 beq.n 8004d9e 8004d78: 687b ldr r3, [r7, #4] 8004d7a: 681b ldr r3, [r3, #0] 8004d7c: 4a32 ldr r2, [pc, #200] @ (8004e48 ) 8004d7e: 4293 cmp r3, r2 8004d80: d00a beq.n 8004d98 8004d82: 687b ldr r3, [r7, #4] 8004d84: 681b ldr r3, [r3, #0] 8004d86: 4a31 ldr r2, [pc, #196] @ (8004e4c ) 8004d88: 4293 cmp r3, r2 8004d8a: d102 bne.n 8004d92 8004d8c: f44f 1300 mov.w r3, #2097152 @ 0x200000 8004d90: e00e b.n 8004db0 8004d92: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8004d96: e00b b.n 8004db0 8004d98: f44f 3300 mov.w r3, #131072 @ 0x20000 8004d9c: e008 b.n 8004db0 8004d9e: f44f 5300 mov.w r3, #8192 @ 0x2000 8004da2: e005 b.n 8004db0 8004da4: f44f 7300 mov.w r3, #512 @ 0x200 8004da8: e002 b.n 8004db0 8004daa: 2320 movs r3, #32 8004dac: e000 b.n 8004db0 8004dae: 2302 movs r3, #2 8004db0: 4a27 ldr r2, [pc, #156] @ (8004e50 ) 8004db2: 6053 str r3, [r2, #4] /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004db4: 687b ldr r3, [r7, #4] 8004db6: 2200 movs r2, #0 8004db8: f883 2020 strb.w r2, [r3, #32] if(hdma->XferCpltCallback != NULL) 8004dbc: 687b ldr r3, [r7, #4] 8004dbe: 6a9b ldr r3, [r3, #40] @ 0x28 8004dc0: 2b00 cmp r3, #0 8004dc2: d034 beq.n 8004e2e { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); 8004dc4: 687b ldr r3, [r7, #4] 8004dc6: 6a9b ldr r3, [r3, #40] @ 0x28 8004dc8: 6878 ldr r0, [r7, #4] 8004dca: 4798 blx r3 if(hdma->XferCpltCallback != NULL) 8004dcc: e02f b.n 8004e2e } } /* Transfer Error Interrupt management **************************************/ else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8004dce: 687b ldr r3, [r7, #4] 8004dd0: 6c1b ldr r3, [r3, #64] @ 0x40 8004dd2: 2208 movs r2, #8 8004dd4: 409a lsls r2, r3 8004dd6: 68fb ldr r3, [r7, #12] 8004dd8: 4013 ands r3, r2 8004dda: 2b00 cmp r3, #0 8004ddc: d028 beq.n 8004e30 8004dde: 68bb ldr r3, [r7, #8] 8004de0: f003 0308 and.w r3, r3, #8 8004de4: 2b00 cmp r3, #0 8004de6: d023 beq.n 8004e30 { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004de8: 687b ldr r3, [r7, #4] 8004dea: 681b ldr r3, [r3, #0] 8004dec: 681a ldr r2, [r3, #0] 8004dee: 687b ldr r3, [r7, #4] 8004df0: 681b ldr r3, [r3, #0] 8004df2: f022 020e bic.w r2, r2, #14 8004df6: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8004df8: 687b ldr r3, [r7, #4] 8004dfa: 6c1a ldr r2, [r3, #64] @ 0x40 8004dfc: 687b ldr r3, [r7, #4] 8004dfe: 6bdb ldr r3, [r3, #60] @ 0x3c 8004e00: 2101 movs r1, #1 8004e02: fa01 f202 lsl.w r2, r1, r2 8004e06: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; 8004e08: 687b ldr r3, [r7, #4] 8004e0a: 2201 movs r2, #1 8004e0c: 639a str r2, [r3, #56] @ 0x38 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8004e0e: 687b ldr r3, [r7, #4] 8004e10: 2201 movs r2, #1 8004e12: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004e16: 687b ldr r3, [r7, #4] 8004e18: 2200 movs r2, #0 8004e1a: f883 2020 strb.w r2, [r3, #32] if (hdma->XferErrorCallback != NULL) 8004e1e: 687b ldr r3, [r7, #4] 8004e20: 6b1b ldr r3, [r3, #48] @ 0x30 8004e22: 2b00 cmp r3, #0 8004e24: d004 beq.n 8004e30 { /* Transfer error callback */ hdma->XferErrorCallback(hdma); 8004e26: 687b ldr r3, [r7, #4] 8004e28: 6b1b ldr r3, [r3, #48] @ 0x30 8004e2a: 6878 ldr r0, [r7, #4] 8004e2c: 4798 blx r3 } } return; 8004e2e: bf00 nop 8004e30: bf00 nop } 8004e32: 3710 adds r7, #16 8004e34: 46bd mov sp, r7 8004e36: bd80 pop {r7, pc} 8004e38: 40020008 .word 0x40020008 8004e3c: 4002001c .word 0x4002001c 8004e40: 40020030 .word 0x40020030 8004e44: 40020044 .word 0x40020044 8004e48: 40020058 .word 0x40020058 8004e4c: 4002006c .word 0x4002006c 8004e50: 40020000 .word 0x40020000 08004e54 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8004e54: b480 push {r7} 8004e56: b085 sub sp, #20 8004e58: af00 add r7, sp, #0 8004e5a: 60f8 str r0, [r7, #12] 8004e5c: 60b9 str r1, [r7, #8] 8004e5e: 607a str r2, [r7, #4] 8004e60: 603b str r3, [r7, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8004e62: 68fb ldr r3, [r7, #12] 8004e64: 6c1a ldr r2, [r3, #64] @ 0x40 8004e66: 68fb ldr r3, [r7, #12] 8004e68: 6bdb ldr r3, [r3, #60] @ 0x3c 8004e6a: 2101 movs r1, #1 8004e6c: fa01 f202 lsl.w r2, r1, r2 8004e70: 605a str r2, [r3, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8004e72: 68fb ldr r3, [r7, #12] 8004e74: 681b ldr r3, [r3, #0] 8004e76: 683a ldr r2, [r7, #0] 8004e78: 605a str r2, [r3, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8004e7a: 68fb ldr r3, [r7, #12] 8004e7c: 685b ldr r3, [r3, #4] 8004e7e: 2b10 cmp r3, #16 8004e80: d108 bne.n 8004e94 { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8004e82: 68fb ldr r3, [r7, #12] 8004e84: 681b ldr r3, [r3, #0] 8004e86: 687a ldr r2, [r7, #4] 8004e88: 609a str r2, [r3, #8] /* Configure DMA Channel source address */ hdma->Instance->CMAR = SrcAddress; 8004e8a: 68fb ldr r3, [r7, #12] 8004e8c: 681b ldr r3, [r3, #0] 8004e8e: 68ba ldr r2, [r7, #8] 8004e90: 60da str r2, [r3, #12] hdma->Instance->CPAR = SrcAddress; /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; } } 8004e92: e007 b.n 8004ea4 hdma->Instance->CPAR = SrcAddress; 8004e94: 68fb ldr r3, [r7, #12] 8004e96: 681b ldr r3, [r3, #0] 8004e98: 68ba ldr r2, [r7, #8] 8004e9a: 609a str r2, [r3, #8] hdma->Instance->CMAR = DstAddress; 8004e9c: 68fb ldr r3, [r7, #12] 8004e9e: 681b ldr r3, [r3, #0] 8004ea0: 687a ldr r2, [r7, #4] 8004ea2: 60da str r2, [r3, #12] } 8004ea4: bf00 nop 8004ea6: 3714 adds r7, #20 8004ea8: 46bd mov sp, r7 8004eaa: bc80 pop {r7} 8004eac: 4770 bx lr ... 08004eb0 : * @param Data: Specifies the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { 8004eb0: b5f0 push {r4, r5, r6, r7, lr} 8004eb2: b087 sub sp, #28 8004eb4: af00 add r7, sp, #0 8004eb6: 60f8 str r0, [r7, #12] 8004eb8: 60b9 str r1, [r7, #8] 8004eba: e9c7 2300 strd r2, r3, [r7] HAL_StatusTypeDef status = HAL_ERROR; 8004ebe: 2301 movs r3, #1 8004ec0: 75fb strb r3, [r7, #23] uint8_t index = 0; 8004ec2: 2300 movs r3, #0 8004ec4: 75bb strb r3, [r7, #22] uint8_t nbiterations = 0; 8004ec6: 2300 movs r3, #0 8004ec8: 757b strb r3, [r7, #21] /* Process Locked */ __HAL_LOCK(&pFlash); 8004eca: 4b2f ldr r3, [pc, #188] @ (8004f88 ) 8004ecc: 7e1b ldrb r3, [r3, #24] 8004ece: 2b01 cmp r3, #1 8004ed0: d101 bne.n 8004ed6 8004ed2: 2302 movs r3, #2 8004ed4: e054 b.n 8004f80 8004ed6: 4b2c ldr r3, [pc, #176] @ (8004f88 ) 8004ed8: 2201 movs r2, #1 8004eda: 761a strb r2, [r3, #24] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8004edc: f24c 3050 movw r0, #50000 @ 0xc350 8004ee0: f000 f8a8 bl 8005034 8004ee4: 4603 mov r3, r0 8004ee6: 75fb strb r3, [r7, #23] /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE); } #endif /* FLASH_BANK2_END */ if(status == HAL_OK) 8004ee8: 7dfb ldrb r3, [r7, #23] 8004eea: 2b00 cmp r3, #0 8004eec: d144 bne.n 8004f78 { if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8004eee: 68fb ldr r3, [r7, #12] 8004ef0: 2b01 cmp r3, #1 8004ef2: d102 bne.n 8004efa { /* Program halfword (16-bit) at a specified address. */ nbiterations = 1U; 8004ef4: 2301 movs r3, #1 8004ef6: 757b strb r3, [r7, #21] 8004ef8: e007 b.n 8004f0a } else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) 8004efa: 68fb ldr r3, [r7, #12] 8004efc: 2b02 cmp r3, #2 8004efe: d102 bne.n 8004f06 { /* Program word (32-bit = 2*16-bit) at a specified address. */ nbiterations = 2U; 8004f00: 2302 movs r3, #2 8004f02: 757b strb r3, [r7, #21] 8004f04: e001 b.n 8004f0a } else { /* Program double word (64-bit = 4*16-bit) at a specified address. */ nbiterations = 4U; 8004f06: 2304 movs r3, #4 8004f08: 757b strb r3, [r7, #21] } for (index = 0U; index < nbiterations; index++) 8004f0a: 2300 movs r3, #0 8004f0c: 75bb strb r3, [r7, #22] 8004f0e: e02d b.n 8004f6c { FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8004f10: 7dbb ldrb r3, [r7, #22] 8004f12: 005a lsls r2, r3, #1 8004f14: 68bb ldr r3, [r7, #8] 8004f16: eb02 0c03 add.w ip, r2, r3 8004f1a: 7dbb ldrb r3, [r7, #22] 8004f1c: 0119 lsls r1, r3, #4 8004f1e: e9d7 2300 ldrd r2, r3, [r7] 8004f22: f1c1 0620 rsb r6, r1, #32 8004f26: f1a1 0020 sub.w r0, r1, #32 8004f2a: fa22 f401 lsr.w r4, r2, r1 8004f2e: fa03 f606 lsl.w r6, r3, r6 8004f32: 4334 orrs r4, r6 8004f34: fa23 f000 lsr.w r0, r3, r0 8004f38: 4304 orrs r4, r0 8004f3a: fa23 f501 lsr.w r5, r3, r1 8004f3e: b2a3 uxth r3, r4 8004f40: 4619 mov r1, r3 8004f42: 4660 mov r0, ip 8004f44: f000 f85a bl 8004ffc #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8004f48: f24c 3050 movw r0, #50000 @ 0xc350 8004f4c: f000 f872 bl 8005034 8004f50: 4603 mov r3, r0 8004f52: 75fb strb r3, [r7, #23] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 8004f54: 4b0d ldr r3, [pc, #52] @ (8004f8c ) 8004f56: 691b ldr r3, [r3, #16] 8004f58: 4a0c ldr r2, [pc, #48] @ (8004f8c ) 8004f5a: f023 0301 bic.w r3, r3, #1 8004f5e: 6113 str r3, [r2, #16] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* In case of error, stop programation procedure */ if (status != HAL_OK) 8004f60: 7dfb ldrb r3, [r7, #23] 8004f62: 2b00 cmp r3, #0 8004f64: d107 bne.n 8004f76 for (index = 0U; index < nbiterations; index++) 8004f66: 7dbb ldrb r3, [r7, #22] 8004f68: 3301 adds r3, #1 8004f6a: 75bb strb r3, [r7, #22] 8004f6c: 7dba ldrb r2, [r7, #22] 8004f6e: 7d7b ldrb r3, [r7, #21] 8004f70: 429a cmp r2, r3 8004f72: d3cd bcc.n 8004f10 8004f74: e000 b.n 8004f78 { break; 8004f76: bf00 nop } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 8004f78: 4b03 ldr r3, [pc, #12] @ (8004f88 ) 8004f7a: 2200 movs r2, #0 8004f7c: 761a strb r2, [r3, #24] return status; 8004f7e: 7dfb ldrb r3, [r7, #23] } 8004f80: 4618 mov r0, r3 8004f82: 371c adds r7, #28 8004f84: 46bd mov sp, r7 8004f86: bdf0 pop {r4, r5, r6, r7, pc} 8004f88: 20000450 .word 0x20000450 8004f8c: 40022000 .word 0x40022000 08004f90 : /** * @brief Unlock the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Unlock(void) { 8004f90: b480 push {r7} 8004f92: b083 sub sp, #12 8004f94: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 8004f96: 2300 movs r3, #0 8004f98: 71fb strb r3, [r7, #7] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8004f9a: 4b0d ldr r3, [pc, #52] @ (8004fd0 ) 8004f9c: 691b ldr r3, [r3, #16] 8004f9e: f003 0380 and.w r3, r3, #128 @ 0x80 8004fa2: 2b00 cmp r3, #0 8004fa4: d00d beq.n 8004fc2 { /* Authorize the FLASH Registers access */ WRITE_REG(FLASH->KEYR, FLASH_KEY1); 8004fa6: 4b0a ldr r3, [pc, #40] @ (8004fd0 ) 8004fa8: 4a0a ldr r2, [pc, #40] @ (8004fd4 ) 8004faa: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 8004fac: 4b08 ldr r3, [pc, #32] @ (8004fd0 ) 8004fae: 4a0a ldr r2, [pc, #40] @ (8004fd8 ) 8004fb0: 605a str r2, [r3, #4] /* Verify Flash is unlocked */ if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8004fb2: 4b07 ldr r3, [pc, #28] @ (8004fd0 ) 8004fb4: 691b ldr r3, [r3, #16] 8004fb6: f003 0380 and.w r3, r3, #128 @ 0x80 8004fba: 2b00 cmp r3, #0 8004fbc: d001 beq.n 8004fc2 { status = HAL_ERROR; 8004fbe: 2301 movs r3, #1 8004fc0: 71fb strb r3, [r7, #7] status = HAL_ERROR; } } #endif /* FLASH_BANK2_END */ return status; 8004fc2: 79fb ldrb r3, [r7, #7] } 8004fc4: 4618 mov r0, r3 8004fc6: 370c adds r7, #12 8004fc8: 46bd mov sp, r7 8004fca: bc80 pop {r7} 8004fcc: 4770 bx lr 8004fce: bf00 nop 8004fd0: 40022000 .word 0x40022000 8004fd4: 45670123 .word 0x45670123 8004fd8: cdef89ab .word 0xcdef89ab 08004fdc : /** * @brief Locks the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Lock(void) { 8004fdc: b480 push {r7} 8004fde: af00 add r7, sp, #0 /* Set the LOCK Bit to lock the FLASH Registers access */ SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8004fe0: 4b05 ldr r3, [pc, #20] @ (8004ff8 ) 8004fe2: 691b ldr r3, [r3, #16] 8004fe4: 4a04 ldr r2, [pc, #16] @ (8004ff8 ) 8004fe6: f043 0380 orr.w r3, r3, #128 @ 0x80 8004fea: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) /* Set the LOCK Bit to lock the FLASH BANK2 Registers access */ SET_BIT(FLASH->CR2, FLASH_CR2_LOCK); #endif /* FLASH_BANK2_END */ return HAL_OK; 8004fec: 2300 movs r3, #0 } 8004fee: 4618 mov r0, r3 8004ff0: 46bd mov sp, r7 8004ff2: bc80 pop {r7} 8004ff4: 4770 bx lr 8004ff6: bf00 nop 8004ff8: 40022000 .word 0x40022000 08004ffc : * @param Address specify the address to be programmed. * @param Data specify the data to be programmed. * @retval None */ static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) { 8004ffc: b480 push {r7} 8004ffe: b083 sub sp, #12 8005000: af00 add r7, sp, #0 8005002: 6078 str r0, [r7, #4] 8005004: 460b mov r3, r1 8005006: 807b strh r3, [r7, #2] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8005008: 4b08 ldr r3, [pc, #32] @ (800502c ) 800500a: 2200 movs r2, #0 800500c: 61da str r2, [r3, #28] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Proceed to program the new data */ SET_BIT(FLASH->CR, FLASH_CR_PG); 800500e: 4b08 ldr r3, [pc, #32] @ (8005030 ) 8005010: 691b ldr r3, [r3, #16] 8005012: 4a07 ldr r2, [pc, #28] @ (8005030 ) 8005014: f043 0301 orr.w r3, r3, #1 8005018: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* Write data in the address */ *(__IO uint16_t*)Address = Data; 800501a: 687b ldr r3, [r7, #4] 800501c: 887a ldrh r2, [r7, #2] 800501e: 801a strh r2, [r3, #0] } 8005020: bf00 nop 8005022: 370c adds r7, #12 8005024: 46bd mov sp, r7 8005026: bc80 pop {r7} 8005028: 4770 bx lr 800502a: bf00 nop 800502c: 20000450 .word 0x20000450 8005030: 40022000 .word 0x40022000 08005034 : * @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operation timeout * @retval HAL Status */ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) { 8005034: b580 push {r7, lr} 8005036: b084 sub sp, #16 8005038: af00 add r7, sp, #0 800503a: 6078 str r0, [r7, #4] /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. Even if the FLASH operation fails, the BUSY flag will be reset and an error flag will be set */ uint32_t tickstart = HAL_GetTick(); 800503c: f7ff f860 bl 8004100 8005040: 60f8 str r0, [r7, #12] while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8005042: e010 b.n 8005066 { if (Timeout != HAL_MAX_DELAY) 8005044: 687b ldr r3, [r7, #4] 8005046: f1b3 3fff cmp.w r3, #4294967295 800504a: d00c beq.n 8005066 { if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 800504c: 687b ldr r3, [r7, #4] 800504e: 2b00 cmp r3, #0 8005050: d007 beq.n 8005062 8005052: f7ff f855 bl 8004100 8005056: 4602 mov r2, r0 8005058: 68fb ldr r3, [r7, #12] 800505a: 1ad3 subs r3, r2, r3 800505c: 687a ldr r2, [r7, #4] 800505e: 429a cmp r2, r3 8005060: d201 bcs.n 8005066 { return HAL_TIMEOUT; 8005062: 2303 movs r3, #3 8005064: e025 b.n 80050b2 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 8005066: 4b15 ldr r3, [pc, #84] @ (80050bc ) 8005068: 68db ldr r3, [r3, #12] 800506a: f003 0301 and.w r3, r3, #1 800506e: 2b00 cmp r3, #0 8005070: d1e8 bne.n 8005044 } } } /* Check FLASH End of Operation flag */ if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8005072: 4b12 ldr r3, [pc, #72] @ (80050bc ) 8005074: 68db ldr r3, [r3, #12] 8005076: f003 0320 and.w r3, r3, #32 800507a: 2b00 cmp r3, #0 800507c: d002 beq.n 8005084 { /* Clear FLASH End of Operation pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 800507e: 4b0f ldr r3, [pc, #60] @ (80050bc ) 8005080: 2220 movs r2, #32 8005082: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8005084: 4b0d ldr r3, [pc, #52] @ (80050bc ) 8005086: 68db ldr r3, [r3, #12] 8005088: f003 0310 and.w r3, r3, #16 800508c: 2b00 cmp r3, #0 800508e: d10b bne.n 80050a8 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8005090: 4b0a ldr r3, [pc, #40] @ (80050bc ) 8005092: 69db ldr r3, [r3, #28] 8005094: f003 0301 and.w r3, r3, #1 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8005098: 2b00 cmp r3, #0 800509a: d105 bne.n 80050a8 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 800509c: 4b07 ldr r3, [pc, #28] @ (80050bc ) 800509e: 68db ldr r3, [r3, #12] 80050a0: f003 0304 and.w r3, r3, #4 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80050a4: 2b00 cmp r3, #0 80050a6: d003 beq.n 80050b0 { /*Save the error code*/ FLASH_SetErrorCode(); 80050a8: f000 f80a bl 80050c0 return HAL_ERROR; 80050ac: 2301 movs r3, #1 80050ae: e000 b.n 80050b2 } /* There is no error flag set */ return HAL_OK; 80050b0: 2300 movs r3, #0 } 80050b2: 4618 mov r0, r3 80050b4: 3710 adds r7, #16 80050b6: 46bd mov sp, r7 80050b8: bd80 pop {r7, pc} 80050ba: bf00 nop 80050bc: 40022000 .word 0x40022000 080050c0 : /** * @brief Set the specific FLASH error flag. * @retval None */ static void FLASH_SetErrorCode(void) { 80050c0: b480 push {r7} 80050c2: b083 sub sp, #12 80050c4: af00 add r7, sp, #0 uint32_t flags = 0U; 80050c6: 2300 movs r3, #0 80050c8: 607b str r3, [r7, #4] #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 80050ca: 4b23 ldr r3, [pc, #140] @ (8005158 ) 80050cc: 68db ldr r3, [r3, #12] 80050ce: f003 0310 and.w r3, r3, #16 80050d2: 2b00 cmp r3, #0 80050d4: d009 beq.n 80050ea #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 80050d6: 4b21 ldr r3, [pc, #132] @ (800515c ) 80050d8: 69db ldr r3, [r3, #28] 80050da: f043 0302 orr.w r3, r3, #2 80050de: 4a1f ldr r2, [pc, #124] @ (800515c ) 80050e0: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 80050e2: 687b ldr r3, [r7, #4] 80050e4: f043 0310 orr.w r3, r3, #16 80050e8: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80050ea: 4b1b ldr r3, [pc, #108] @ (8005158 ) 80050ec: 68db ldr r3, [r3, #12] 80050ee: f003 0304 and.w r3, r3, #4 80050f2: 2b00 cmp r3, #0 80050f4: d009 beq.n 800510a #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 80050f6: 4b19 ldr r3, [pc, #100] @ (800515c ) 80050f8: 69db ldr r3, [r3, #28] 80050fa: f043 0301 orr.w r3, r3, #1 80050fe: 4a17 ldr r2, [pc, #92] @ (800515c ) 8005100: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 8005102: 687b ldr r3, [r7, #4] 8005104: f043 0304 orr.w r3, r3, #4 8005108: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 800510a: 4b13 ldr r3, [pc, #76] @ (8005158 ) 800510c: 69db ldr r3, [r3, #28] 800510e: f003 0301 and.w r3, r3, #1 8005112: 2b00 cmp r3, #0 8005114: d00b beq.n 800512e { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 8005116: 4b11 ldr r3, [pc, #68] @ (800515c ) 8005118: 69db ldr r3, [r3, #28] 800511a: f043 0304 orr.w r3, r3, #4 800511e: 4a0f ldr r2, [pc, #60] @ (800515c ) 8005120: 61d3 str r3, [r2, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 8005122: 4b0d ldr r3, [pc, #52] @ (8005158 ) 8005124: 69db ldr r3, [r3, #28] 8005126: 4a0c ldr r2, [pc, #48] @ (8005158 ) 8005128: f023 0301 bic.w r3, r3, #1 800512c: 61d3 str r3, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 800512e: 687b ldr r3, [r7, #4] 8005130: f240 1201 movw r2, #257 @ 0x101 8005134: 4293 cmp r3, r2 8005136: d106 bne.n 8005146 8005138: 4b07 ldr r3, [pc, #28] @ (8005158 ) 800513a: 69db ldr r3, [r3, #28] 800513c: 4a06 ldr r2, [pc, #24] @ (8005158 ) 800513e: f023 0301 bic.w r3, r3, #1 8005142: 61d3 str r3, [r2, #28] } 8005144: e002 b.n 800514c __HAL_FLASH_CLEAR_FLAG(flags); 8005146: 4a04 ldr r2, [pc, #16] @ (8005158 ) 8005148: 687b ldr r3, [r7, #4] 800514a: 60d3 str r3, [r2, #12] } 800514c: bf00 nop 800514e: 370c adds r7, #12 8005150: 46bd mov sp, r7 8005152: bc80 pop {r7} 8005154: 4770 bx lr 8005156: bf00 nop 8005158: 40022000 .word 0x40022000 800515c: 20000450 .word 0x20000450 08005160 : * (0xFFFFFFFF means that all the pages have been correctly erased) * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { 8005160: b580 push {r7, lr} 8005162: b084 sub sp, #16 8005164: af00 add r7, sp, #0 8005166: 6078 str r0, [r7, #4] 8005168: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_ERROR; 800516a: 2301 movs r3, #1 800516c: 73fb strb r3, [r7, #15] uint32_t address = 0U; 800516e: 2300 movs r3, #0 8005170: 60bb str r3, [r7, #8] /* Process Locked */ __HAL_LOCK(&pFlash); 8005172: 4b2f ldr r3, [pc, #188] @ (8005230 ) 8005174: 7e1b ldrb r3, [r3, #24] 8005176: 2b01 cmp r3, #1 8005178: d101 bne.n 800517e 800517a: 2302 movs r3, #2 800517c: e053 b.n 8005226 800517e: 4b2c ldr r3, [pc, #176] @ (8005230 ) 8005180: 2201 movs r2, #1 8005182: 761a strb r2, [r3, #24] /* Check the parameters */ assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8005184: 687b ldr r3, [r7, #4] 8005186: 681b ldr r3, [r3, #0] 8005188: 2b02 cmp r3, #2 800518a: d116 bne.n 80051ba else #endif /* FLASH_BANK2_END */ { /* Mass Erase requested for Bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800518c: f24c 3050 movw r0, #50000 @ 0xc350 8005190: f7ff ff50 bl 8005034 8005194: 4603 mov r3, r0 8005196: 2b00 cmp r3, #0 8005198: d141 bne.n 800521e { /*Mass erase to be done*/ FLASH_MassErase(FLASH_BANK_1); 800519a: 2001 movs r0, #1 800519c: f000 f84c bl 8005238 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80051a0: f24c 3050 movw r0, #50000 @ 0xc350 80051a4: f7ff ff46 bl 8005034 80051a8: 4603 mov r3, r0 80051aa: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the MER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 80051ac: 4b21 ldr r3, [pc, #132] @ (8005234 ) 80051ae: 691b ldr r3, [r3, #16] 80051b0: 4a20 ldr r2, [pc, #128] @ (8005234 ) 80051b2: f023 0304 bic.w r3, r3, #4 80051b6: 6113 str r3, [r2, #16] 80051b8: e031 b.n 800521e else #endif /* FLASH_BANK2_END */ { /* Page Erase requested on address located on bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80051ba: f24c 3050 movw r0, #50000 @ 0xc350 80051be: f7ff ff39 bl 8005034 80051c2: 4603 mov r3, r0 80051c4: 2b00 cmp r3, #0 80051c6: d12a bne.n 800521e { /*Initialization of PageError variable*/ *PageError = 0xFFFFFFFFU; 80051c8: 683b ldr r3, [r7, #0] 80051ca: f04f 32ff mov.w r2, #4294967295 80051ce: 601a str r2, [r3, #0] /* Erase page by page to be done*/ for(address = pEraseInit->PageAddress; 80051d0: 687b ldr r3, [r7, #4] 80051d2: 689b ldr r3, [r3, #8] 80051d4: 60bb str r3, [r7, #8] 80051d6: e019 b.n 800520c address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); address += FLASH_PAGE_SIZE) { FLASH_PageErase(address); 80051d8: 68b8 ldr r0, [r7, #8] 80051da: f000 f849 bl 8005270 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80051de: f24c 3050 movw r0, #50000 @ 0xc350 80051e2: f7ff ff27 bl 8005034 80051e6: 4603 mov r3, r0 80051e8: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the PER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 80051ea: 4b12 ldr r3, [pc, #72] @ (8005234 ) 80051ec: 691b ldr r3, [r3, #16] 80051ee: 4a11 ldr r2, [pc, #68] @ (8005234 ) 80051f0: f023 0302 bic.w r3, r3, #2 80051f4: 6113 str r3, [r2, #16] if (status != HAL_OK) 80051f6: 7bfb ldrb r3, [r7, #15] 80051f8: 2b00 cmp r3, #0 80051fa: d003 beq.n 8005204 { /* In case of error, stop erase procedure and return the faulty address */ *PageError = address; 80051fc: 683b ldr r3, [r7, #0] 80051fe: 68ba ldr r2, [r7, #8] 8005200: 601a str r2, [r3, #0] break; 8005202: e00c b.n 800521e address += FLASH_PAGE_SIZE) 8005204: 68bb ldr r3, [r7, #8] 8005206: f503 6380 add.w r3, r3, #1024 @ 0x400 800520a: 60bb str r3, [r7, #8] address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 800520c: 687b ldr r3, [r7, #4] 800520e: 68db ldr r3, [r3, #12] 8005210: 029a lsls r2, r3, #10 8005212: 687b ldr r3, [r7, #4] 8005214: 689b ldr r3, [r3, #8] 8005216: 4413 add r3, r2 8005218: 68ba ldr r2, [r7, #8] 800521a: 429a cmp r2, r3 800521c: d3dc bcc.n 80051d8 } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 800521e: 4b04 ldr r3, [pc, #16] @ (8005230 ) 8005220: 2200 movs r2, #0 8005222: 761a strb r2, [r3, #24] return status; 8005224: 7bfb ldrb r3, [r7, #15] } 8005226: 4618 mov r0, r3 8005228: 3710 adds r7, #16 800522a: 46bd mov sp, r7 800522c: bd80 pop {r7, pc} 800522e: bf00 nop 8005230: 20000450 .word 0x20000450 8005234: 40022000 .word 0x40022000 08005238 : @endif * * @retval None */ static void FLASH_MassErase(uint32_t Banks) { 8005238: b480 push {r7} 800523a: b083 sub sp, #12 800523c: af00 add r7, sp, #0 800523e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8005240: 4b09 ldr r3, [pc, #36] @ (8005268 ) 8005242: 2200 movs r2, #0 8005244: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 8005246: 4b09 ldr r3, [pc, #36] @ (800526c ) 8005248: 691b ldr r3, [r3, #16] 800524a: 4a08 ldr r2, [pc, #32] @ (800526c ) 800524c: f043 0304 orr.w r3, r3, #4 8005250: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8005252: 4b06 ldr r3, [pc, #24] @ (800526c ) 8005254: 691b ldr r3, [r3, #16] 8005256: 4a05 ldr r2, [pc, #20] @ (800526c ) 8005258: f043 0340 orr.w r3, r3, #64 @ 0x40 800525c: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 800525e: bf00 nop 8005260: 370c adds r7, #12 8005262: 46bd mov sp, r7 8005264: bc80 pop {r7} 8005266: 4770 bx lr 8005268: 20000450 .word 0x20000450 800526c: 40022000 .word 0x40022000 08005270 : * The value of this parameter depend on device used within the same series * * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { 8005270: b480 push {r7} 8005272: b083 sub sp, #12 8005274: af00 add r7, sp, #0 8005276: 6078 str r0, [r7, #4] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8005278: 4b0b ldr r3, [pc, #44] @ (80052a8 ) 800527a: 2200 movs r2, #0 800527c: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 800527e: 4b0b ldr r3, [pc, #44] @ (80052ac ) 8005280: 691b ldr r3, [r3, #16] 8005282: 4a0a ldr r2, [pc, #40] @ (80052ac ) 8005284: f043 0302 orr.w r3, r3, #2 8005288: 6113 str r3, [r2, #16] WRITE_REG(FLASH->AR, PageAddress); 800528a: 4a08 ldr r2, [pc, #32] @ (80052ac ) 800528c: 687b ldr r3, [r7, #4] 800528e: 6153 str r3, [r2, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8005290: 4b06 ldr r3, [pc, #24] @ (80052ac ) 8005292: 691b ldr r3, [r3, #16] 8005294: 4a05 ldr r2, [pc, #20] @ (80052ac ) 8005296: f043 0340 orr.w r3, r3, #64 @ 0x40 800529a: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 800529c: bf00 nop 800529e: 370c adds r7, #12 80052a0: 46bd mov sp, r7 80052a2: bc80 pop {r7} 80052a4: 4770 bx lr 80052a6: bf00 nop 80052a8: 20000450 .word 0x20000450 80052ac: 40022000 .word 0x40022000 080052b0 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80052b0: b480 push {r7} 80052b2: b08b sub sp, #44 @ 0x2c 80052b4: af00 add r7, sp, #0 80052b6: 6078 str r0, [r7, #4] 80052b8: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 80052ba: 2300 movs r3, #0 80052bc: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 80052be: 2300 movs r3, #0 80052c0: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80052c2: e169 b.n 8005598 { /* Get the IO position */ ioposition = (0x01uL << position); 80052c4: 2201 movs r2, #1 80052c6: 6a7b ldr r3, [r7, #36] @ 0x24 80052c8: fa02 f303 lsl.w r3, r2, r3 80052cc: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80052ce: 683b ldr r3, [r7, #0] 80052d0: 681b ldr r3, [r3, #0] 80052d2: 69fa ldr r2, [r7, #28] 80052d4: 4013 ands r3, r2 80052d6: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 80052d8: 69ba ldr r2, [r7, #24] 80052da: 69fb ldr r3, [r7, #28] 80052dc: 429a cmp r2, r3 80052de: f040 8158 bne.w 8005592 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 80052e2: 683b ldr r3, [r7, #0] 80052e4: 685b ldr r3, [r3, #4] 80052e6: 4a9a ldr r2, [pc, #616] @ (8005550 ) 80052e8: 4293 cmp r3, r2 80052ea: d05e beq.n 80053aa 80052ec: 4a98 ldr r2, [pc, #608] @ (8005550 ) 80052ee: 4293 cmp r3, r2 80052f0: d875 bhi.n 80053de 80052f2: 4a98 ldr r2, [pc, #608] @ (8005554 ) 80052f4: 4293 cmp r3, r2 80052f6: d058 beq.n 80053aa 80052f8: 4a96 ldr r2, [pc, #600] @ (8005554 ) 80052fa: 4293 cmp r3, r2 80052fc: d86f bhi.n 80053de 80052fe: 4a96 ldr r2, [pc, #600] @ (8005558 ) 8005300: 4293 cmp r3, r2 8005302: d052 beq.n 80053aa 8005304: 4a94 ldr r2, [pc, #592] @ (8005558 ) 8005306: 4293 cmp r3, r2 8005308: d869 bhi.n 80053de 800530a: 4a94 ldr r2, [pc, #592] @ (800555c ) 800530c: 4293 cmp r3, r2 800530e: d04c beq.n 80053aa 8005310: 4a92 ldr r2, [pc, #584] @ (800555c ) 8005312: 4293 cmp r3, r2 8005314: d863 bhi.n 80053de 8005316: 4a92 ldr r2, [pc, #584] @ (8005560 ) 8005318: 4293 cmp r3, r2 800531a: d046 beq.n 80053aa 800531c: 4a90 ldr r2, [pc, #576] @ (8005560 ) 800531e: 4293 cmp r3, r2 8005320: d85d bhi.n 80053de 8005322: 2b12 cmp r3, #18 8005324: d82a bhi.n 800537c 8005326: 2b12 cmp r3, #18 8005328: d859 bhi.n 80053de 800532a: a201 add r2, pc, #4 @ (adr r2, 8005330 ) 800532c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8005330: 080053ab .word 0x080053ab 8005334: 08005385 .word 0x08005385 8005338: 08005397 .word 0x08005397 800533c: 080053d9 .word 0x080053d9 8005340: 080053df .word 0x080053df 8005344: 080053df .word 0x080053df 8005348: 080053df .word 0x080053df 800534c: 080053df .word 0x080053df 8005350: 080053df .word 0x080053df 8005354: 080053df .word 0x080053df 8005358: 080053df .word 0x080053df 800535c: 080053df .word 0x080053df 8005360: 080053df .word 0x080053df 8005364: 080053df .word 0x080053df 8005368: 080053df .word 0x080053df 800536c: 080053df .word 0x080053df 8005370: 080053df .word 0x080053df 8005374: 0800538d .word 0x0800538d 8005378: 080053a1 .word 0x080053a1 800537c: 4a79 ldr r2, [pc, #484] @ (8005564 ) 800537e: 4293 cmp r3, r2 8005380: d013 beq.n 80053aa config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8005382: e02c b.n 80053de config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8005384: 683b ldr r3, [r7, #0] 8005386: 68db ldr r3, [r3, #12] 8005388: 623b str r3, [r7, #32] break; 800538a: e029 b.n 80053e0 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 800538c: 683b ldr r3, [r7, #0] 800538e: 68db ldr r3, [r3, #12] 8005390: 3304 adds r3, #4 8005392: 623b str r3, [r7, #32] break; 8005394: e024 b.n 80053e0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 8005396: 683b ldr r3, [r7, #0] 8005398: 68db ldr r3, [r3, #12] 800539a: 3308 adds r3, #8 800539c: 623b str r3, [r7, #32] break; 800539e: e01f b.n 80053e0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80053a0: 683b ldr r3, [r7, #0] 80053a2: 68db ldr r3, [r3, #12] 80053a4: 330c adds r3, #12 80053a6: 623b str r3, [r7, #32] break; 80053a8: e01a b.n 80053e0 if (GPIO_Init->Pull == GPIO_NOPULL) 80053aa: 683b ldr r3, [r7, #0] 80053ac: 689b ldr r3, [r3, #8] 80053ae: 2b00 cmp r3, #0 80053b0: d102 bne.n 80053b8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80053b2: 2304 movs r3, #4 80053b4: 623b str r3, [r7, #32] break; 80053b6: e013 b.n 80053e0 else if (GPIO_Init->Pull == GPIO_PULLUP) 80053b8: 683b ldr r3, [r7, #0] 80053ba: 689b ldr r3, [r3, #8] 80053bc: 2b01 cmp r3, #1 80053be: d105 bne.n 80053cc config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80053c0: 2308 movs r3, #8 80053c2: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 80053c4: 687b ldr r3, [r7, #4] 80053c6: 69fa ldr r2, [r7, #28] 80053c8: 611a str r2, [r3, #16] break; 80053ca: e009 b.n 80053e0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80053cc: 2308 movs r3, #8 80053ce: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 80053d0: 687b ldr r3, [r7, #4] 80053d2: 69fa ldr r2, [r7, #28] 80053d4: 615a str r2, [r3, #20] break; 80053d6: e003 b.n 80053e0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80053d8: 2300 movs r3, #0 80053da: 623b str r3, [r7, #32] break; 80053dc: e000 b.n 80053e0 break; 80053de: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80053e0: 69bb ldr r3, [r7, #24] 80053e2: 2bff cmp r3, #255 @ 0xff 80053e4: d801 bhi.n 80053ea 80053e6: 687b ldr r3, [r7, #4] 80053e8: e001 b.n 80053ee 80053ea: 687b ldr r3, [r7, #4] 80053ec: 3304 adds r3, #4 80053ee: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 80053f0: 69bb ldr r3, [r7, #24] 80053f2: 2bff cmp r3, #255 @ 0xff 80053f4: d802 bhi.n 80053fc 80053f6: 6a7b ldr r3, [r7, #36] @ 0x24 80053f8: 009b lsls r3, r3, #2 80053fa: e002 b.n 8005402 80053fc: 6a7b ldr r3, [r7, #36] @ 0x24 80053fe: 3b08 subs r3, #8 8005400: 009b lsls r3, r3, #2 8005402: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 8005404: 697b ldr r3, [r7, #20] 8005406: 681a ldr r2, [r3, #0] 8005408: 210f movs r1, #15 800540a: 693b ldr r3, [r7, #16] 800540c: fa01 f303 lsl.w r3, r1, r3 8005410: 43db mvns r3, r3 8005412: 401a ands r2, r3 8005414: 6a39 ldr r1, [r7, #32] 8005416: 693b ldr r3, [r7, #16] 8005418: fa01 f303 lsl.w r3, r1, r3 800541c: 431a orrs r2, r3 800541e: 697b ldr r3, [r7, #20] 8005420: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8005422: 683b ldr r3, [r7, #0] 8005424: 685b ldr r3, [r3, #4] 8005426: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800542a: 2b00 cmp r3, #0 800542c: f000 80b1 beq.w 8005592 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8005430: 4b4d ldr r3, [pc, #308] @ (8005568 ) 8005432: 699b ldr r3, [r3, #24] 8005434: 4a4c ldr r2, [pc, #304] @ (8005568 ) 8005436: f043 0301 orr.w r3, r3, #1 800543a: 6193 str r3, [r2, #24] 800543c: 4b4a ldr r3, [pc, #296] @ (8005568 ) 800543e: 699b ldr r3, [r3, #24] 8005440: f003 0301 and.w r3, r3, #1 8005444: 60bb str r3, [r7, #8] 8005446: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8005448: 4a48 ldr r2, [pc, #288] @ (800556c ) 800544a: 6a7b ldr r3, [r7, #36] @ 0x24 800544c: 089b lsrs r3, r3, #2 800544e: 3302 adds r3, #2 8005450: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8005454: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 8005456: 6a7b ldr r3, [r7, #36] @ 0x24 8005458: f003 0303 and.w r3, r3, #3 800545c: 009b lsls r3, r3, #2 800545e: 220f movs r2, #15 8005460: fa02 f303 lsl.w r3, r2, r3 8005464: 43db mvns r3, r3 8005466: 68fa ldr r2, [r7, #12] 8005468: 4013 ands r3, r2 800546a: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 800546c: 687b ldr r3, [r7, #4] 800546e: 4a40 ldr r2, [pc, #256] @ (8005570 ) 8005470: 4293 cmp r3, r2 8005472: d013 beq.n 800549c 8005474: 687b ldr r3, [r7, #4] 8005476: 4a3f ldr r2, [pc, #252] @ (8005574 ) 8005478: 4293 cmp r3, r2 800547a: d00d beq.n 8005498 800547c: 687b ldr r3, [r7, #4] 800547e: 4a3e ldr r2, [pc, #248] @ (8005578 ) 8005480: 4293 cmp r3, r2 8005482: d007 beq.n 8005494 8005484: 687b ldr r3, [r7, #4] 8005486: 4a3d ldr r2, [pc, #244] @ (800557c ) 8005488: 4293 cmp r3, r2 800548a: d101 bne.n 8005490 800548c: 2303 movs r3, #3 800548e: e006 b.n 800549e 8005490: 2304 movs r3, #4 8005492: e004 b.n 800549e 8005494: 2302 movs r3, #2 8005496: e002 b.n 800549e 8005498: 2301 movs r3, #1 800549a: e000 b.n 800549e 800549c: 2300 movs r3, #0 800549e: 6a7a ldr r2, [r7, #36] @ 0x24 80054a0: f002 0203 and.w r2, r2, #3 80054a4: 0092 lsls r2, r2, #2 80054a6: 4093 lsls r3, r2 80054a8: 68fa ldr r2, [r7, #12] 80054aa: 4313 orrs r3, r2 80054ac: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 80054ae: 492f ldr r1, [pc, #188] @ (800556c ) 80054b0: 6a7b ldr r3, [r7, #36] @ 0x24 80054b2: 089b lsrs r3, r3, #2 80054b4: 3302 adds r3, #2 80054b6: 68fa ldr r2, [r7, #12] 80054b8: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 80054bc: 683b ldr r3, [r7, #0] 80054be: 685b ldr r3, [r3, #4] 80054c0: f403 1380 and.w r3, r3, #1048576 @ 0x100000 80054c4: 2b00 cmp r3, #0 80054c6: d006 beq.n 80054d6 { SET_BIT(EXTI->RTSR, iocurrent); 80054c8: 4b2d ldr r3, [pc, #180] @ (8005580 ) 80054ca: 689a ldr r2, [r3, #8] 80054cc: 492c ldr r1, [pc, #176] @ (8005580 ) 80054ce: 69bb ldr r3, [r7, #24] 80054d0: 4313 orrs r3, r2 80054d2: 608b str r3, [r1, #8] 80054d4: e006 b.n 80054e4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 80054d6: 4b2a ldr r3, [pc, #168] @ (8005580 ) 80054d8: 689a ldr r2, [r3, #8] 80054da: 69bb ldr r3, [r7, #24] 80054dc: 43db mvns r3, r3 80054de: 4928 ldr r1, [pc, #160] @ (8005580 ) 80054e0: 4013 ands r3, r2 80054e2: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 80054e4: 683b ldr r3, [r7, #0] 80054e6: 685b ldr r3, [r3, #4] 80054e8: f403 1300 and.w r3, r3, #2097152 @ 0x200000 80054ec: 2b00 cmp r3, #0 80054ee: d006 beq.n 80054fe { SET_BIT(EXTI->FTSR, iocurrent); 80054f0: 4b23 ldr r3, [pc, #140] @ (8005580 ) 80054f2: 68da ldr r2, [r3, #12] 80054f4: 4922 ldr r1, [pc, #136] @ (8005580 ) 80054f6: 69bb ldr r3, [r7, #24] 80054f8: 4313 orrs r3, r2 80054fa: 60cb str r3, [r1, #12] 80054fc: e006 b.n 800550c } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 80054fe: 4b20 ldr r3, [pc, #128] @ (8005580 ) 8005500: 68da ldr r2, [r3, #12] 8005502: 69bb ldr r3, [r7, #24] 8005504: 43db mvns r3, r3 8005506: 491e ldr r1, [pc, #120] @ (8005580 ) 8005508: 4013 ands r3, r2 800550a: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 800550c: 683b ldr r3, [r7, #0] 800550e: 685b ldr r3, [r3, #4] 8005510: f403 3300 and.w r3, r3, #131072 @ 0x20000 8005514: 2b00 cmp r3, #0 8005516: d006 beq.n 8005526 { SET_BIT(EXTI->EMR, iocurrent); 8005518: 4b19 ldr r3, [pc, #100] @ (8005580 ) 800551a: 685a ldr r2, [r3, #4] 800551c: 4918 ldr r1, [pc, #96] @ (8005580 ) 800551e: 69bb ldr r3, [r7, #24] 8005520: 4313 orrs r3, r2 8005522: 604b str r3, [r1, #4] 8005524: e006 b.n 8005534 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8005526: 4b16 ldr r3, [pc, #88] @ (8005580 ) 8005528: 685a ldr r2, [r3, #4] 800552a: 69bb ldr r3, [r7, #24] 800552c: 43db mvns r3, r3 800552e: 4914 ldr r1, [pc, #80] @ (8005580 ) 8005530: 4013 ands r3, r2 8005532: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8005534: 683b ldr r3, [r7, #0] 8005536: 685b ldr r3, [r3, #4] 8005538: f403 3380 and.w r3, r3, #65536 @ 0x10000 800553c: 2b00 cmp r3, #0 800553e: d021 beq.n 8005584 { SET_BIT(EXTI->IMR, iocurrent); 8005540: 4b0f ldr r3, [pc, #60] @ (8005580 ) 8005542: 681a ldr r2, [r3, #0] 8005544: 490e ldr r1, [pc, #56] @ (8005580 ) 8005546: 69bb ldr r3, [r7, #24] 8005548: 4313 orrs r3, r2 800554a: 600b str r3, [r1, #0] 800554c: e021 b.n 8005592 800554e: bf00 nop 8005550: 10320000 .word 0x10320000 8005554: 10310000 .word 0x10310000 8005558: 10220000 .word 0x10220000 800555c: 10210000 .word 0x10210000 8005560: 10120000 .word 0x10120000 8005564: 10110000 .word 0x10110000 8005568: 40021000 .word 0x40021000 800556c: 40010000 .word 0x40010000 8005570: 40010800 .word 0x40010800 8005574: 40010c00 .word 0x40010c00 8005578: 40011000 .word 0x40011000 800557c: 40011400 .word 0x40011400 8005580: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8005584: 4b0b ldr r3, [pc, #44] @ (80055b4 ) 8005586: 681a ldr r2, [r3, #0] 8005588: 69bb ldr r3, [r7, #24] 800558a: 43db mvns r3, r3 800558c: 4909 ldr r1, [pc, #36] @ (80055b4 ) 800558e: 4013 ands r3, r2 8005590: 600b str r3, [r1, #0] } } } position++; 8005592: 6a7b ldr r3, [r7, #36] @ 0x24 8005594: 3301 adds r3, #1 8005596: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 8005598: 683b ldr r3, [r7, #0] 800559a: 681a ldr r2, [r3, #0] 800559c: 6a7b ldr r3, [r7, #36] @ 0x24 800559e: fa22 f303 lsr.w r3, r2, r3 80055a2: 2b00 cmp r3, #0 80055a4: f47f ae8e bne.w 80052c4 } } 80055a8: bf00 nop 80055aa: bf00 nop 80055ac: 372c adds r7, #44 @ 0x2c 80055ae: 46bd mov sp, r7 80055b0: bc80 pop {r7} 80055b2: 4770 bx lr 80055b4: 40010400 .word 0x40010400 080055b8 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 80055b8: b480 push {r7} 80055ba: b085 sub sp, #20 80055bc: af00 add r7, sp, #0 80055be: 6078 str r0, [r7, #4] 80055c0: 460b mov r3, r1 80055c2: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 80055c4: 687b ldr r3, [r7, #4] 80055c6: 689a ldr r2, [r3, #8] 80055c8: 887b ldrh r3, [r7, #2] 80055ca: 4013 ands r3, r2 80055cc: 2b00 cmp r3, #0 80055ce: d002 beq.n 80055d6 { bitstatus = GPIO_PIN_SET; 80055d0: 2301 movs r3, #1 80055d2: 73fb strb r3, [r7, #15] 80055d4: e001 b.n 80055da } else { bitstatus = GPIO_PIN_RESET; 80055d6: 2300 movs r3, #0 80055d8: 73fb strb r3, [r7, #15] } return bitstatus; 80055da: 7bfb ldrb r3, [r7, #15] } 80055dc: 4618 mov r0, r3 80055de: 3714 adds r7, #20 80055e0: 46bd mov sp, r7 80055e2: bc80 pop {r7} 80055e4: 4770 bx lr 080055e6 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 80055e6: b480 push {r7} 80055e8: b083 sub sp, #12 80055ea: af00 add r7, sp, #0 80055ec: 6078 str r0, [r7, #4] 80055ee: 460b mov r3, r1 80055f0: 807b strh r3, [r7, #2] 80055f2: 4613 mov r3, r2 80055f4: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 80055f6: 787b ldrb r3, [r7, #1] 80055f8: 2b00 cmp r3, #0 80055fa: d003 beq.n 8005604 { GPIOx->BSRR = GPIO_Pin; 80055fc: 887a ldrh r2, [r7, #2] 80055fe: 687b ldr r3, [r7, #4] 8005600: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 8005602: e003 b.n 800560c GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8005604: 887b ldrh r3, [r7, #2] 8005606: 041a lsls r2, r3, #16 8005608: 687b ldr r3, [r7, #4] 800560a: 611a str r2, [r3, #16] } 800560c: bf00 nop 800560e: 370c adds r7, #12 8005610: 46bd mov sp, r7 8005612: bc80 pop {r7} 8005614: 4770 bx lr 08005616 : * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8005616: b480 push {r7} 8005618: b085 sub sp, #20 800561a: af00 add r7, sp, #0 800561c: 6078 str r0, [r7, #4] 800561e: 460b mov r3, r1 8005620: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; 8005622: 687b ldr r3, [r7, #4] 8005624: 68db ldr r3, [r3, #12] 8005626: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); 8005628: 887a ldrh r2, [r7, #2] 800562a: 68fb ldr r3, [r7, #12] 800562c: 4013 ands r3, r2 800562e: 041a lsls r2, r3, #16 8005630: 68fb ldr r3, [r7, #12] 8005632: 43d9 mvns r1, r3 8005634: 887b ldrh r3, [r7, #2] 8005636: 400b ands r3, r1 8005638: 431a orrs r2, r3 800563a: 687b ldr r3, [r7, #4] 800563c: 611a str r2, [r3, #16] } 800563e: bf00 nop 8005640: 3714 adds r7, #20 8005642: 46bd mov sp, r7 8005644: bc80 pop {r7} 8005646: 4770 bx lr 08005648 : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { 8005648: b580 push {r7, lr} 800564a: b084 sub sp, #16 800564c: af00 add r7, sp, #0 800564e: 6078 str r0, [r7, #4] uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) 8005650: 687b ldr r3, [r7, #4] 8005652: 2b00 cmp r3, #0 8005654: d101 bne.n 800565a { return HAL_ERROR; 8005656: 2301 movs r3, #1 8005658: e0e8 b.n 800582c } /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); if (hpcd->State == HAL_PCD_STATE_RESET) 800565a: 687b ldr r3, [r7, #4] 800565c: f893 3291 ldrb.w r3, [r3, #657] @ 0x291 8005660: b2db uxtb r3, r3 8005662: 2b00 cmp r3, #0 8005664: d106 bne.n 8005674 { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; 8005666: 687b ldr r3, [r7, #4] 8005668: 2200 movs r2, #0 800566a: f883 2290 strb.w r2, [r3, #656] @ 0x290 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); 800566e: 6878 ldr r0, [r7, #4] 8005670: f007 fc16 bl 800cea0 #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; 8005674: 687b ldr r3, [r7, #4] 8005676: 2203 movs r2, #3 8005678: f883 2291 strb.w r2, [r3, #657] @ 0x291 /* Disable DMA mode for FS instance */ hpcd->Init.dma_enable = 0U; 800567c: 687b ldr r3, [r7, #4] 800567e: 2200 movs r2, #0 8005680: 715a strb r2, [r3, #5] /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); 8005682: 687b ldr r3, [r7, #4] 8005684: 681b ldr r3, [r3, #0] 8005686: 4618 mov r0, r3 8005688: f003 fabb bl 8008c02 /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) 800568c: 687b ldr r3, [r7, #4] 800568e: 6818 ldr r0, [r3, #0] 8005690: 687b ldr r3, [r7, #4] 8005692: 3304 adds r3, #4 8005694: cb0e ldmia r3, {r1, r2, r3} 8005696: f003 fa91 bl 8008bbc 800569a: 4603 mov r3, r0 800569c: 2b00 cmp r3, #0 800569e: d005 beq.n 80056ac { hpcd->State = HAL_PCD_STATE_ERROR; 80056a0: 687b ldr r3, [r7, #4] 80056a2: 2202 movs r2, #2 80056a4: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 80056a8: 2301 movs r3, #1 80056aa: e0bf b.n 800582c } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) 80056ac: 687b ldr r3, [r7, #4] 80056ae: 681b ldr r3, [r3, #0] 80056b0: 2100 movs r1, #0 80056b2: 4618 mov r0, r3 80056b4: f003 fabf bl 8008c36 80056b8: 4603 mov r3, r0 80056ba: 2b00 cmp r3, #0 80056bc: d005 beq.n 80056ca { hpcd->State = HAL_PCD_STATE_ERROR; 80056be: 687b ldr r3, [r7, #4] 80056c0: 2202 movs r2, #2 80056c2: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 80056c6: 2301 movs r3, #1 80056c8: e0b0 b.n 800582c } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80056ca: 2300 movs r3, #0 80056cc: 73fb strb r3, [r7, #15] 80056ce: e03e b.n 800574e { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; 80056d0: 7bfa ldrb r2, [r7, #15] 80056d2: 6879 ldr r1, [r7, #4] 80056d4: 4613 mov r3, r2 80056d6: 009b lsls r3, r3, #2 80056d8: 4413 add r3, r2 80056da: 00db lsls r3, r3, #3 80056dc: 440b add r3, r1 80056de: 3311 adds r3, #17 80056e0: 2201 movs r2, #1 80056e2: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; 80056e4: 7bfa ldrb r2, [r7, #15] 80056e6: 6879 ldr r1, [r7, #4] 80056e8: 4613 mov r3, r2 80056ea: 009b lsls r3, r3, #2 80056ec: 4413 add r3, r2 80056ee: 00db lsls r3, r3, #3 80056f0: 440b add r3, r1 80056f2: 3310 adds r3, #16 80056f4: 7bfa ldrb r2, [r7, #15] 80056f6: 701a strb r2, [r3, #0] #if defined (USB_OTG_FS) hpcd->IN_ep[i].tx_fifo_num = i; #endif /* defined (USB_OTG_FS) */ /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; 80056f8: 7bfa ldrb r2, [r7, #15] 80056fa: 6879 ldr r1, [r7, #4] 80056fc: 4613 mov r3, r2 80056fe: 009b lsls r3, r3, #2 8005700: 4413 add r3, r2 8005702: 00db lsls r3, r3, #3 8005704: 440b add r3, r1 8005706: 3313 adds r3, #19 8005708: 2200 movs r2, #0 800570a: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; 800570c: 7bfa ldrb r2, [r7, #15] 800570e: 6879 ldr r1, [r7, #4] 8005710: 4613 mov r3, r2 8005712: 009b lsls r3, r3, #2 8005714: 4413 add r3, r2 8005716: 00db lsls r3, r3, #3 8005718: 440b add r3, r1 800571a: 3320 adds r3, #32 800571c: 2200 movs r2, #0 800571e: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; 8005720: 7bfa ldrb r2, [r7, #15] 8005722: 6879 ldr r1, [r7, #4] 8005724: 4613 mov r3, r2 8005726: 009b lsls r3, r3, #2 8005728: 4413 add r3, r2 800572a: 00db lsls r3, r3, #3 800572c: 440b add r3, r1 800572e: 3324 adds r3, #36 @ 0x24 8005730: 2200 movs r2, #0 8005732: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; 8005734: 7bfb ldrb r3, [r7, #15] 8005736: 6879 ldr r1, [r7, #4] 8005738: 1c5a adds r2, r3, #1 800573a: 4613 mov r3, r2 800573c: 009b lsls r3, r3, #2 800573e: 4413 add r3, r2 8005740: 00db lsls r3, r3, #3 8005742: 440b add r3, r1 8005744: 2200 movs r2, #0 8005746: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8005748: 7bfb ldrb r3, [r7, #15] 800574a: 3301 adds r3, #1 800574c: 73fb strb r3, [r7, #15] 800574e: 687b ldr r3, [r7, #4] 8005750: 791b ldrb r3, [r3, #4] 8005752: 7bfa ldrb r2, [r7, #15] 8005754: 429a cmp r2, r3 8005756: d3bb bcc.n 80056d0 } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8005758: 2300 movs r3, #0 800575a: 73fb strb r3, [r7, #15] 800575c: e044 b.n 80057e8 { hpcd->OUT_ep[i].is_in = 0U; 800575e: 7bfa ldrb r2, [r7, #15] 8005760: 6879 ldr r1, [r7, #4] 8005762: 4613 mov r3, r2 8005764: 009b lsls r3, r3, #2 8005766: 4413 add r3, r2 8005768: 00db lsls r3, r3, #3 800576a: 440b add r3, r1 800576c: f203 1351 addw r3, r3, #337 @ 0x151 8005770: 2200 movs r2, #0 8005772: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; 8005774: 7bfa ldrb r2, [r7, #15] 8005776: 6879 ldr r1, [r7, #4] 8005778: 4613 mov r3, r2 800577a: 009b lsls r3, r3, #2 800577c: 4413 add r3, r2 800577e: 00db lsls r3, r3, #3 8005780: 440b add r3, r1 8005782: f503 73a8 add.w r3, r3, #336 @ 0x150 8005786: 7bfa ldrb r2, [r7, #15] 8005788: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; 800578a: 7bfa ldrb r2, [r7, #15] 800578c: 6879 ldr r1, [r7, #4] 800578e: 4613 mov r3, r2 8005790: 009b lsls r3, r3, #2 8005792: 4413 add r3, r2 8005794: 00db lsls r3, r3, #3 8005796: 440b add r3, r1 8005798: f203 1353 addw r3, r3, #339 @ 0x153 800579c: 2200 movs r2, #0 800579e: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; 80057a0: 7bfa ldrb r2, [r7, #15] 80057a2: 6879 ldr r1, [r7, #4] 80057a4: 4613 mov r3, r2 80057a6: 009b lsls r3, r3, #2 80057a8: 4413 add r3, r2 80057aa: 00db lsls r3, r3, #3 80057ac: 440b add r3, r1 80057ae: f503 73b0 add.w r3, r3, #352 @ 0x160 80057b2: 2200 movs r2, #0 80057b4: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; 80057b6: 7bfa ldrb r2, [r7, #15] 80057b8: 6879 ldr r1, [r7, #4] 80057ba: 4613 mov r3, r2 80057bc: 009b lsls r3, r3, #2 80057be: 4413 add r3, r2 80057c0: 00db lsls r3, r3, #3 80057c2: 440b add r3, r1 80057c4: f503 73b2 add.w r3, r3, #356 @ 0x164 80057c8: 2200 movs r2, #0 80057ca: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; 80057cc: 7bfa ldrb r2, [r7, #15] 80057ce: 6879 ldr r1, [r7, #4] 80057d0: 4613 mov r3, r2 80057d2: 009b lsls r3, r3, #2 80057d4: 4413 add r3, r2 80057d6: 00db lsls r3, r3, #3 80057d8: 440b add r3, r1 80057da: f503 73b4 add.w r3, r3, #360 @ 0x168 80057de: 2200 movs r2, #0 80057e0: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80057e2: 7bfb ldrb r3, [r7, #15] 80057e4: 3301 adds r3, #1 80057e6: 73fb strb r3, [r7, #15] 80057e8: 687b ldr r3, [r7, #4] 80057ea: 791b ldrb r3, [r3, #4] 80057ec: 7bfa ldrb r2, [r7, #15] 80057ee: 429a cmp r2, r3 80057f0: d3b5 bcc.n 800575e } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) 80057f2: 687b ldr r3, [r7, #4] 80057f4: 6818 ldr r0, [r3, #0] 80057f6: 687b ldr r3, [r7, #4] 80057f8: 3304 adds r3, #4 80057fa: cb0e ldmia r3, {r1, r2, r3} 80057fc: f003 fa27 bl 8008c4e 8005800: 4603 mov r3, r0 8005802: 2b00 cmp r3, #0 8005804: d005 beq.n 8005812 { hpcd->State = HAL_PCD_STATE_ERROR; 8005806: 687b ldr r3, [r7, #4] 8005808: 2202 movs r2, #2 800580a: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 800580e: 2301 movs r3, #1 8005810: e00c b.n 800582c } hpcd->USB_Address = 0U; 8005812: 687b ldr r3, [r7, #4] 8005814: 2200 movs r2, #0 8005816: 735a strb r2, [r3, #13] hpcd->State = HAL_PCD_STATE_READY; 8005818: 687b ldr r3, [r7, #4] 800581a: 2201 movs r2, #1 800581c: f883 2291 strb.w r2, [r3, #657] @ 0x291 (void)USB_DevDisconnect(hpcd->Instance); 8005820: 687b ldr r3, [r7, #4] 8005822: 681b ldr r3, [r3, #0] 8005824: 4618 mov r0, r3 8005826: f005 fca6 bl 800b176 return HAL_OK; 800582a: 2300 movs r3, #0 } 800582c: 4618 mov r0, r3 800582e: 3710 adds r7, #16 8005830: 46bd mov sp, r7 8005832: bd80 pop {r7, pc} 08005834 : * @brief Start the USB device * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) { 8005834: b580 push {r7, lr} 8005836: b082 sub sp, #8 8005838: af00 add r7, sp, #0 800583a: 6078 str r0, [r7, #4] __HAL_LOCK(hpcd); 800583c: 687b ldr r3, [r7, #4] 800583e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005842: 2b01 cmp r3, #1 8005844: d101 bne.n 800584a 8005846: 2302 movs r3, #2 8005848: e016 b.n 8005878 800584a: 687b ldr r3, [r7, #4] 800584c: 2201 movs r2, #1 800584e: f883 2290 strb.w r2, [r3, #656] @ 0x290 __HAL_PCD_ENABLE(hpcd); 8005852: 687b ldr r3, [r7, #4] 8005854: 681b ldr r3, [r3, #0] 8005856: 4618 mov r0, r3 8005858: f003 f9bd bl 8008bd6 #if defined (USB) HAL_PCDEx_SetConnectionState(hpcd, 1U); 800585c: 2101 movs r1, #1 800585e: 6878 ldr r0, [r7, #4] 8005860: f007 fd91 bl 800d386 #endif /* defined (USB) */ (void)USB_DevConnect(hpcd->Instance); 8005864: 687b ldr r3, [r7, #4] 8005866: 681b ldr r3, [r3, #0] 8005868: 4618 mov r0, r3 800586a: f005 fc7a bl 800b162 __HAL_UNLOCK(hpcd); 800586e: 687b ldr r3, [r7, #4] 8005870: 2200 movs r2, #0 8005872: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005876: 2300 movs r3, #0 } 8005878: 4618 mov r0, r3 800587a: 3708 adds r7, #8 800587c: 46bd mov sp, r7 800587e: bd80 pop {r7, pc} 08005880 : * @brief This function handles PCD interrupt request. * @param hpcd PCD handle * @retval HAL status */ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { 8005880: b580 push {r7, lr} 8005882: b088 sub sp, #32 8005884: af00 add r7, sp, #0 8005886: 6078 str r0, [r7, #4] uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance); 8005888: 687b ldr r3, [r7, #4] 800588a: 681b ldr r3, [r3, #0] 800588c: 4618 mov r0, r3 800588e: f005 fc7c bl 800b18a 8005892: 61b8 str r0, [r7, #24] uint16_t store_ep[8]; uint8_t i; if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR) 8005894: 69bb ldr r3, [r7, #24] 8005896: f403 4300 and.w r3, r3, #32768 @ 0x8000 800589a: 2b00 cmp r3, #0 800589c: d003 beq.n 80058a6 { /* servicing of the endpoint correct transfer interrupt */ /* clear of the CTR flag into the sub */ (void)PCD_EP_ISR_Handler(hpcd); 800589e: 6878 ldr r0, [r7, #4] 80058a0: f000 fb1a bl 8005ed8 return; 80058a4: e119 b.n 8005ada } if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET) 80058a6: 69bb ldr r3, [r7, #24] 80058a8: f403 6380 and.w r3, r3, #1024 @ 0x400 80058ac: 2b00 cmp r3, #0 80058ae: d013 beq.n 80058d8 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 80058b0: 687b ldr r3, [r7, #4] 80058b2: 681b ldr r3, [r3, #0] 80058b4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 80058b8: b29a uxth r2, r3 80058ba: 687b ldr r3, [r7, #4] 80058bc: 681b ldr r3, [r3, #0] 80058be: f422 6280 bic.w r2, r2, #1024 @ 0x400 80058c2: b292 uxth r2, r2 80058c4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResetCallback(hpcd); #else HAL_PCD_ResetCallback(hpcd); 80058c8: 6878 ldr r0, [r7, #4] 80058ca: f007 fb64 bl 800cf96 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ (void)HAL_PCD_SetAddress(hpcd, 0U); 80058ce: 2100 movs r1, #0 80058d0: 6878 ldr r0, [r7, #4] 80058d2: f000 f905 bl 8005ae0 return; 80058d6: e100 b.n 8005ada } if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR) 80058d8: 69bb ldr r3, [r7, #24] 80058da: f403 4380 and.w r3, r3, #16384 @ 0x4000 80058de: 2b00 cmp r3, #0 80058e0: d00c beq.n 80058fc { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); 80058e2: 687b ldr r3, [r7, #4] 80058e4: 681b ldr r3, [r3, #0] 80058e6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 80058ea: b29a uxth r2, r3 80058ec: 687b ldr r3, [r7, #4] 80058ee: 681b ldr r3, [r3, #0] 80058f0: f422 4280 bic.w r2, r2, #16384 @ 0x4000 80058f4: b292 uxth r2, r2 80058f6: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 80058fa: e0ee b.n 8005ada } if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR) 80058fc: 69bb ldr r3, [r7, #24] 80058fe: f403 5300 and.w r3, r3, #8192 @ 0x2000 8005902: 2b00 cmp r3, #0 8005904: d00c beq.n 8005920 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); 8005906: 687b ldr r3, [r7, #4] 8005908: 681b ldr r3, [r3, #0] 800590a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 800590e: b29a uxth r2, r3 8005910: 687b ldr r3, [r7, #4] 8005912: 681b ldr r3, [r3, #0] 8005914: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8005918: b292 uxth r2, r2 800591a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 800591e: e0dc b.n 8005ada } if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP) 8005920: 69bb ldr r3, [r7, #24] 8005922: f403 5380 and.w r3, r3, #4096 @ 0x1000 8005926: 2b00 cmp r3, #0 8005928: d027 beq.n 800597a { hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE); 800592a: 687b ldr r3, [r7, #4] 800592c: 681b ldr r3, [r3, #0] 800592e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005932: b29a uxth r2, r3 8005934: 687b ldr r3, [r7, #4] 8005936: 681b ldr r3, [r3, #0] 8005938: f022 0204 bic.w r2, r2, #4 800593c: b292 uxth r2, r2 800593e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); 8005942: 687b ldr r3, [r7, #4] 8005944: 681b ldr r3, [r3, #0] 8005946: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 800594a: b29a uxth r2, r3 800594c: 687b ldr r3, [r7, #4] 800594e: 681b ldr r3, [r3, #0] 8005950: f022 0208 bic.w r2, r2, #8 8005954: b292 uxth r2, r2 8005956: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResumeCallback(hpcd); #else HAL_PCD_ResumeCallback(hpcd); 800595a: 6878 ldr r0, [r7, #4] 800595c: f007 fb54 bl 800d008 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); 8005960: 687b ldr r3, [r7, #4] 8005962: 681b ldr r3, [r3, #0] 8005964: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005968: b29a uxth r2, r3 800596a: 687b ldr r3, [r7, #4] 800596c: 681b ldr r3, [r3, #0] 800596e: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8005972: b292 uxth r2, r2 8005974: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8005978: e0af b.n 8005ada } if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP) 800597a: 69bb ldr r3, [r7, #24] 800597c: f403 6300 and.w r3, r3, #2048 @ 0x800 8005980: 2b00 cmp r3, #0 8005982: f000 8083 beq.w 8005a8c { /* WA: To Clear Wakeup flag if raised with suspend signal */ /* Store Endpoint registers */ for (i = 0U; i < 8U; i++) 8005986: 2300 movs r3, #0 8005988: 77fb strb r3, [r7, #31] 800598a: e010 b.n 80059ae { store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i); 800598c: 687b ldr r3, [r7, #4] 800598e: 681b ldr r3, [r3, #0] 8005990: 461a mov r2, r3 8005992: 7ffb ldrb r3, [r7, #31] 8005994: 009b lsls r3, r3, #2 8005996: 441a add r2, r3 8005998: 7ffb ldrb r3, [r7, #31] 800599a: 8812 ldrh r2, [r2, #0] 800599c: b292 uxth r2, r2 800599e: 005b lsls r3, r3, #1 80059a0: 3320 adds r3, #32 80059a2: 443b add r3, r7 80059a4: f823 2c18 strh.w r2, [r3, #-24] for (i = 0U; i < 8U; i++) 80059a8: 7ffb ldrb r3, [r7, #31] 80059aa: 3301 adds r3, #1 80059ac: 77fb strb r3, [r7, #31] 80059ae: 7ffb ldrb r3, [r7, #31] 80059b0: 2b07 cmp r3, #7 80059b2: d9eb bls.n 800598c } /* FORCE RESET */ hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES); 80059b4: 687b ldr r3, [r7, #4] 80059b6: 681b ldr r3, [r3, #0] 80059b8: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 80059bc: b29a uxth r2, r3 80059be: 687b ldr r3, [r7, #4] 80059c0: 681b ldr r3, [r3, #0] 80059c2: f042 0201 orr.w r2, r2, #1 80059c6: b292 uxth r2, r2 80059c8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CLEAR RESET */ hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES); 80059cc: 687b ldr r3, [r7, #4] 80059ce: 681b ldr r3, [r3, #0] 80059d0: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 80059d4: b29a uxth r2, r3 80059d6: 687b ldr r3, [r7, #4] 80059d8: 681b ldr r3, [r3, #0] 80059da: f022 0201 bic.w r2, r2, #1 80059de: b292 uxth r2, r2 80059e0: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* wait for reset flag in ISTR */ while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U) 80059e4: bf00 nop 80059e6: 687b ldr r3, [r7, #4] 80059e8: 681b ldr r3, [r3, #0] 80059ea: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 80059ee: b29b uxth r3, r3 80059f0: f403 6380 and.w r3, r3, #1024 @ 0x400 80059f4: 2b00 cmp r3, #0 80059f6: d0f6 beq.n 80059e6 { } /* Clear Reset Flag */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 80059f8: 687b ldr r3, [r7, #4] 80059fa: 681b ldr r3, [r3, #0] 80059fc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005a00: b29a uxth r2, r3 8005a02: 687b ldr r3, [r7, #4] 8005a04: 681b ldr r3, [r3, #0] 8005a06: f422 6280 bic.w r2, r2, #1024 @ 0x400 8005a0a: b292 uxth r2, r2 8005a0c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Restore Registre */ for (i = 0U; i < 8U; i++) 8005a10: 2300 movs r3, #0 8005a12: 77fb strb r3, [r7, #31] 8005a14: e00f b.n 8005a36 { PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]); 8005a16: 7ffb ldrb r3, [r7, #31] 8005a18: 687a ldr r2, [r7, #4] 8005a1a: 6812 ldr r2, [r2, #0] 8005a1c: 4611 mov r1, r2 8005a1e: 7ffa ldrb r2, [r7, #31] 8005a20: 0092 lsls r2, r2, #2 8005a22: 440a add r2, r1 8005a24: 005b lsls r3, r3, #1 8005a26: 3320 adds r3, #32 8005a28: 443b add r3, r7 8005a2a: f833 3c18 ldrh.w r3, [r3, #-24] 8005a2e: 8013 strh r3, [r2, #0] for (i = 0U; i < 8U; i++) 8005a30: 7ffb ldrb r3, [r7, #31] 8005a32: 3301 adds r3, #1 8005a34: 77fb strb r3, [r7, #31] 8005a36: 7ffb ldrb r3, [r7, #31] 8005a38: 2b07 cmp r3, #7 8005a3a: d9ec bls.n 8005a16 } /* Force low-power mode in the macrocell */ hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP; 8005a3c: 687b ldr r3, [r7, #4] 8005a3e: 681b ldr r3, [r3, #0] 8005a40: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005a44: b29a uxth r2, r3 8005a46: 687b ldr r3, [r7, #4] 8005a48: 681b ldr r3, [r3, #0] 8005a4a: f042 0208 orr.w r2, r2, #8 8005a4e: b292 uxth r2, r2 8005a50: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); 8005a54: 687b ldr r3, [r7, #4] 8005a56: 681b ldr r3, [r3, #0] 8005a58: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005a5c: b29a uxth r2, r3 8005a5e: 687b ldr r3, [r7, #4] 8005a60: 681b ldr r3, [r3, #0] 8005a62: f422 6200 bic.w r2, r2, #2048 @ 0x800 8005a66: b292 uxth r2, r2 8005a68: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE; 8005a6c: 687b ldr r3, [r7, #4] 8005a6e: 681b ldr r3, [r3, #0] 8005a70: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005a74: b29a uxth r2, r3 8005a76: 687b ldr r3, [r7, #4] 8005a78: 681b ldr r3, [r3, #0] 8005a7a: f042 0204 orr.w r2, r2, #4 8005a7e: b292 uxth r2, r2 8005a80: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 8005a84: 6878 ldr r0, [r7, #4] 8005a86: f007 faa5 bl 800cfd4 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8005a8a: e026 b.n 8005ada } if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF) 8005a8c: 69bb ldr r3, [r7, #24] 8005a8e: f403 7300 and.w r3, r3, #512 @ 0x200 8005a92: 2b00 cmp r3, #0 8005a94: d00f beq.n 8005ab6 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); 8005a96: 687b ldr r3, [r7, #4] 8005a98: 681b ldr r3, [r3, #0] 8005a9a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005a9e: b29a uxth r2, r3 8005aa0: 687b ldr r3, [r7, #4] 8005aa2: 681b ldr r3, [r3, #0] 8005aa4: f422 7200 bic.w r2, r2, #512 @ 0x200 8005aa8: b292 uxth r2, r2 8005aaa: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SOFCallback(hpcd); #else HAL_PCD_SOFCallback(hpcd); 8005aae: 6878 ldr r0, [r7, #4] 8005ab0: f007 fa63 bl 800cf7a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8005ab4: e011 b.n 8005ada } if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF) 8005ab6: 69bb ldr r3, [r7, #24] 8005ab8: f403 7380 and.w r3, r3, #256 @ 0x100 8005abc: 2b00 cmp r3, #0 8005abe: d00c beq.n 8005ada { /* clear ESOF flag in ISTR */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); 8005ac0: 687b ldr r3, [r7, #4] 8005ac2: 681b ldr r3, [r3, #0] 8005ac4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005ac8: b29a uxth r2, r3 8005aca: 687b ldr r3, [r7, #4] 8005acc: 681b ldr r3, [r3, #0] 8005ace: f422 7280 bic.w r2, r2, #256 @ 0x100 8005ad2: b292 uxth r2, r2 8005ad4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8005ad8: bf00 nop } } 8005ada: 3720 adds r7, #32 8005adc: 46bd mov sp, r7 8005ade: bd80 pop {r7, pc} 08005ae0 : * @param hpcd PCD handle * @param address new device address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) { 8005ae0: b580 push {r7, lr} 8005ae2: b082 sub sp, #8 8005ae4: af00 add r7, sp, #0 8005ae6: 6078 str r0, [r7, #4] 8005ae8: 460b mov r3, r1 8005aea: 70fb strb r3, [r7, #3] __HAL_LOCK(hpcd); 8005aec: 687b ldr r3, [r7, #4] 8005aee: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005af2: 2b01 cmp r3, #1 8005af4: d101 bne.n 8005afa 8005af6: 2302 movs r3, #2 8005af8: e012 b.n 8005b20 8005afa: 687b ldr r3, [r7, #4] 8005afc: 2201 movs r2, #1 8005afe: f883 2290 strb.w r2, [r3, #656] @ 0x290 hpcd->USB_Address = address; 8005b02: 687b ldr r3, [r7, #4] 8005b04: 78fa ldrb r2, [r7, #3] 8005b06: 735a strb r2, [r3, #13] (void)USB_SetDevAddress(hpcd->Instance, address); 8005b08: 687b ldr r3, [r7, #4] 8005b0a: 681b ldr r3, [r3, #0] 8005b0c: 78fa ldrb r2, [r7, #3] 8005b0e: 4611 mov r1, r2 8005b10: 4618 mov r0, r3 8005b12: f005 fb13 bl 800b13c __HAL_UNLOCK(hpcd); 8005b16: 687b ldr r3, [r7, #4] 8005b18: 2200 movs r2, #0 8005b1a: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005b1e: 2300 movs r3, #0 } 8005b20: 4618 mov r0, r3 8005b22: 3708 adds r7, #8 8005b24: 46bd mov sp, r7 8005b26: bd80 pop {r7, pc} 08005b28 : * @param ep_type endpoint type * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { 8005b28: b580 push {r7, lr} 8005b2a: b084 sub sp, #16 8005b2c: af00 add r7, sp, #0 8005b2e: 6078 str r0, [r7, #4] 8005b30: 4608 mov r0, r1 8005b32: 4611 mov r1, r2 8005b34: 461a mov r2, r3 8005b36: 4603 mov r3, r0 8005b38: 70fb strb r3, [r7, #3] 8005b3a: 460b mov r3, r1 8005b3c: 803b strh r3, [r7, #0] 8005b3e: 4613 mov r3, r2 8005b40: 70bb strb r3, [r7, #2] HAL_StatusTypeDef ret = HAL_OK; 8005b42: 2300 movs r3, #0 8005b44: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8005b46: f997 3003 ldrsb.w r3, [r7, #3] 8005b4a: 2b00 cmp r3, #0 8005b4c: da0e bge.n 8005b6c { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005b4e: 78fb ldrb r3, [r7, #3] 8005b50: f003 0207 and.w r2, r3, #7 8005b54: 4613 mov r3, r2 8005b56: 009b lsls r3, r3, #2 8005b58: 4413 add r3, r2 8005b5a: 00db lsls r3, r3, #3 8005b5c: 3310 adds r3, #16 8005b5e: 687a ldr r2, [r7, #4] 8005b60: 4413 add r3, r2 8005b62: 60fb str r3, [r7, #12] ep->is_in = 1U; 8005b64: 68fb ldr r3, [r7, #12] 8005b66: 2201 movs r2, #1 8005b68: 705a strb r2, [r3, #1] 8005b6a: e00e b.n 8005b8a } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8005b6c: 78fb ldrb r3, [r7, #3] 8005b6e: f003 0207 and.w r2, r3, #7 8005b72: 4613 mov r3, r2 8005b74: 009b lsls r3, r3, #2 8005b76: 4413 add r3, r2 8005b78: 00db lsls r3, r3, #3 8005b7a: f503 73a8 add.w r3, r3, #336 @ 0x150 8005b7e: 687a ldr r2, [r7, #4] 8005b80: 4413 add r3, r2 8005b82: 60fb str r3, [r7, #12] ep->is_in = 0U; 8005b84: 68fb ldr r3, [r7, #12] 8005b86: 2200 movs r2, #0 8005b88: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8005b8a: 78fb ldrb r3, [r7, #3] 8005b8c: f003 0307 and.w r3, r3, #7 8005b90: b2da uxtb r2, r3 8005b92: 68fb ldr r3, [r7, #12] 8005b94: 701a strb r2, [r3, #0] ep->maxpacket = ep_mps; 8005b96: 883a ldrh r2, [r7, #0] 8005b98: 68fb ldr r3, [r7, #12] 8005b9a: 611a str r2, [r3, #16] ep->type = ep_type; 8005b9c: 68fb ldr r3, [r7, #12] 8005b9e: 78ba ldrb r2, [r7, #2] 8005ba0: 70da strb r2, [r3, #3] ep->tx_fifo_num = ep->num; } #endif /* defined (USB_OTG_FS) */ /* Set initial data PID. */ if (ep_type == EP_TYPE_BULK) 8005ba2: 78bb ldrb r3, [r7, #2] 8005ba4: 2b02 cmp r3, #2 8005ba6: d102 bne.n 8005bae { ep->data_pid_start = 0U; 8005ba8: 68fb ldr r3, [r7, #12] 8005baa: 2200 movs r2, #0 8005bac: 711a strb r2, [r3, #4] } __HAL_LOCK(hpcd); 8005bae: 687b ldr r3, [r7, #4] 8005bb0: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005bb4: 2b01 cmp r3, #1 8005bb6: d101 bne.n 8005bbc 8005bb8: 2302 movs r3, #2 8005bba: e00e b.n 8005bda 8005bbc: 687b ldr r3, [r7, #4] 8005bbe: 2201 movs r2, #1 8005bc0: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_ActivateEndpoint(hpcd->Instance, ep); 8005bc4: 687b ldr r3, [r7, #4] 8005bc6: 681b ldr r3, [r3, #0] 8005bc8: 68f9 ldr r1, [r7, #12] 8005bca: 4618 mov r0, r3 8005bcc: f003 f85c bl 8008c88 __HAL_UNLOCK(hpcd); 8005bd0: 687b ldr r3, [r7, #4] 8005bd2: 2200 movs r2, #0 8005bd4: f883 2290 strb.w r2, [r3, #656] @ 0x290 return ret; 8005bd8: 7afb ldrb r3, [r7, #11] } 8005bda: 4618 mov r0, r3 8005bdc: 3710 adds r7, #16 8005bde: 46bd mov sp, r7 8005be0: bd80 pop {r7, pc} 08005be2 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8005be2: b580 push {r7, lr} 8005be4: b084 sub sp, #16 8005be6: af00 add r7, sp, #0 8005be8: 6078 str r0, [r7, #4] 8005bea: 460b mov r3, r1 8005bec: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8005bee: f997 3003 ldrsb.w r3, [r7, #3] 8005bf2: 2b00 cmp r3, #0 8005bf4: da0e bge.n 8005c14 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005bf6: 78fb ldrb r3, [r7, #3] 8005bf8: f003 0207 and.w r2, r3, #7 8005bfc: 4613 mov r3, r2 8005bfe: 009b lsls r3, r3, #2 8005c00: 4413 add r3, r2 8005c02: 00db lsls r3, r3, #3 8005c04: 3310 adds r3, #16 8005c06: 687a ldr r2, [r7, #4] 8005c08: 4413 add r3, r2 8005c0a: 60fb str r3, [r7, #12] ep->is_in = 1U; 8005c0c: 68fb ldr r3, [r7, #12] 8005c0e: 2201 movs r2, #1 8005c10: 705a strb r2, [r3, #1] 8005c12: e00e b.n 8005c32 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8005c14: 78fb ldrb r3, [r7, #3] 8005c16: f003 0207 and.w r2, r3, #7 8005c1a: 4613 mov r3, r2 8005c1c: 009b lsls r3, r3, #2 8005c1e: 4413 add r3, r2 8005c20: 00db lsls r3, r3, #3 8005c22: f503 73a8 add.w r3, r3, #336 @ 0x150 8005c26: 687a ldr r2, [r7, #4] 8005c28: 4413 add r3, r2 8005c2a: 60fb str r3, [r7, #12] ep->is_in = 0U; 8005c2c: 68fb ldr r3, [r7, #12] 8005c2e: 2200 movs r2, #0 8005c30: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8005c32: 78fb ldrb r3, [r7, #3] 8005c34: f003 0307 and.w r3, r3, #7 8005c38: b2da uxtb r2, r3 8005c3a: 68fb ldr r3, [r7, #12] 8005c3c: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8005c3e: 687b ldr r3, [r7, #4] 8005c40: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005c44: 2b01 cmp r3, #1 8005c46: d101 bne.n 8005c4c 8005c48: 2302 movs r3, #2 8005c4a: e00e b.n 8005c6a 8005c4c: 687b ldr r3, [r7, #4] 8005c4e: 2201 movs r2, #1 8005c50: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_DeactivateEndpoint(hpcd->Instance, ep); 8005c54: 687b ldr r3, [r7, #4] 8005c56: 681b ldr r3, [r3, #0] 8005c58: 68f9 ldr r1, [r7, #12] 8005c5a: 4618 mov r0, r3 8005c5c: f003 fbd4 bl 8009408 __HAL_UNLOCK(hpcd); 8005c60: 687b ldr r3, [r7, #4] 8005c62: 2200 movs r2, #0 8005c64: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005c68: 2300 movs r3, #0 } 8005c6a: 4618 mov r0, r3 8005c6c: 3710 adds r7, #16 8005c6e: 46bd mov sp, r7 8005c70: bd80 pop {r7, pc} 08005c72 : * @param pBuf pointer to the reception buffer * @param len amount of data to be received * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8005c72: b580 push {r7, lr} 8005c74: b086 sub sp, #24 8005c76: af00 add r7, sp, #0 8005c78: 60f8 str r0, [r7, #12] 8005c7a: 607a str r2, [r7, #4] 8005c7c: 603b str r3, [r7, #0] 8005c7e: 460b mov r3, r1 8005c80: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8005c82: 7afb ldrb r3, [r7, #11] 8005c84: f003 0207 and.w r2, r3, #7 8005c88: 4613 mov r3, r2 8005c8a: 009b lsls r3, r3, #2 8005c8c: 4413 add r3, r2 8005c8e: 00db lsls r3, r3, #3 8005c90: f503 73a8 add.w r3, r3, #336 @ 0x150 8005c94: 68fa ldr r2, [r7, #12] 8005c96: 4413 add r3, r2 8005c98: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8005c9a: 697b ldr r3, [r7, #20] 8005c9c: 687a ldr r2, [r7, #4] 8005c9e: 615a str r2, [r3, #20] ep->xfer_len = len; 8005ca0: 697b ldr r3, [r7, #20] 8005ca2: 683a ldr r2, [r7, #0] 8005ca4: 619a str r2, [r3, #24] ep->xfer_count = 0U; 8005ca6: 697b ldr r3, [r7, #20] 8005ca8: 2200 movs r2, #0 8005caa: 61da str r2, [r3, #28] ep->is_in = 0U; 8005cac: 697b ldr r3, [r7, #20] 8005cae: 2200 movs r2, #0 8005cb0: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8005cb2: 7afb ldrb r3, [r7, #11] 8005cb4: f003 0307 and.w r3, r3, #7 8005cb8: b2da uxtb r2, r3 8005cba: 697b ldr r3, [r7, #20] 8005cbc: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8005cbe: 68fb ldr r3, [r7, #12] 8005cc0: 681b ldr r3, [r3, #0] 8005cc2: 6979 ldr r1, [r7, #20] 8005cc4: 4618 mov r0, r3 8005cc6: f003 fd8b bl 80097e0 return HAL_OK; 8005cca: 2300 movs r3, #0 } 8005ccc: 4618 mov r0, r3 8005cce: 3718 adds r7, #24 8005cd0: 46bd mov sp, r7 8005cd2: bd80 pop {r7, pc} 08005cd4 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval Data Size */ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr) { 8005cd4: b480 push {r7} 8005cd6: b083 sub sp, #12 8005cd8: af00 add r7, sp, #0 8005cda: 6078 str r0, [r7, #4] 8005cdc: 460b mov r3, r1 8005cde: 70fb strb r3, [r7, #3] return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; 8005ce0: 78fb ldrb r3, [r7, #3] 8005ce2: f003 0207 and.w r2, r3, #7 8005ce6: 6879 ldr r1, [r7, #4] 8005ce8: 4613 mov r3, r2 8005cea: 009b lsls r3, r3, #2 8005cec: 4413 add r3, r2 8005cee: 00db lsls r3, r3, #3 8005cf0: 440b add r3, r1 8005cf2: f503 73b6 add.w r3, r3, #364 @ 0x16c 8005cf6: 681b ldr r3, [r3, #0] } 8005cf8: 4618 mov r0, r3 8005cfa: 370c adds r7, #12 8005cfc: 46bd mov sp, r7 8005cfe: bc80 pop {r7} 8005d00: 4770 bx lr 08005d02 : * @param pBuf pointer to the transmission buffer * @param len amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8005d02: b580 push {r7, lr} 8005d04: b086 sub sp, #24 8005d06: af00 add r7, sp, #0 8005d08: 60f8 str r0, [r7, #12] 8005d0a: 607a str r2, [r7, #4] 8005d0c: 603b str r3, [r7, #0] 8005d0e: 460b mov r3, r1 8005d10: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005d12: 7afb ldrb r3, [r7, #11] 8005d14: f003 0207 and.w r2, r3, #7 8005d18: 4613 mov r3, r2 8005d1a: 009b lsls r3, r3, #2 8005d1c: 4413 add r3, r2 8005d1e: 00db lsls r3, r3, #3 8005d20: 3310 adds r3, #16 8005d22: 68fa ldr r2, [r7, #12] 8005d24: 4413 add r3, r2 8005d26: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8005d28: 697b ldr r3, [r7, #20] 8005d2a: 687a ldr r2, [r7, #4] 8005d2c: 615a str r2, [r3, #20] ep->xfer_len = len; 8005d2e: 697b ldr r3, [r7, #20] 8005d30: 683a ldr r2, [r7, #0] 8005d32: 619a str r2, [r3, #24] #if defined (USB) ep->xfer_fill_db = 1U; 8005d34: 697b ldr r3, [r7, #20] 8005d36: 2201 movs r2, #1 8005d38: f883 2024 strb.w r2, [r3, #36] @ 0x24 ep->xfer_len_db = len; 8005d3c: 697b ldr r3, [r7, #20] 8005d3e: 683a ldr r2, [r7, #0] 8005d40: 621a str r2, [r3, #32] #endif /* defined (USB) */ ep->xfer_count = 0U; 8005d42: 697b ldr r3, [r7, #20] 8005d44: 2200 movs r2, #0 8005d46: 61da str r2, [r3, #28] ep->is_in = 1U; 8005d48: 697b ldr r3, [r7, #20] 8005d4a: 2201 movs r2, #1 8005d4c: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8005d4e: 7afb ldrb r3, [r7, #11] 8005d50: f003 0307 and.w r3, r3, #7 8005d54: b2da uxtb r2, r3 8005d56: 697b ldr r3, [r7, #20] 8005d58: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8005d5a: 68fb ldr r3, [r7, #12] 8005d5c: 681b ldr r3, [r3, #0] 8005d5e: 6979 ldr r1, [r7, #20] 8005d60: 4618 mov r0, r3 8005d62: f003 fd3d bl 80097e0 return HAL_OK; 8005d66: 2300 movs r3, #0 } 8005d68: 4618 mov r0, r3 8005d6a: 3718 adds r7, #24 8005d6c: 46bd mov sp, r7 8005d6e: bd80 pop {r7, pc} 08005d70 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8005d70: b580 push {r7, lr} 8005d72: b084 sub sp, #16 8005d74: af00 add r7, sp, #0 8005d76: 6078 str r0, [r7, #4] 8005d78: 460b mov r3, r1 8005d7a: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) 8005d7c: 78fb ldrb r3, [r7, #3] 8005d7e: f003 0307 and.w r3, r3, #7 8005d82: 687a ldr r2, [r7, #4] 8005d84: 7912 ldrb r2, [r2, #4] 8005d86: 4293 cmp r3, r2 8005d88: d901 bls.n 8005d8e { return HAL_ERROR; 8005d8a: 2301 movs r3, #1 8005d8c: e04c b.n 8005e28 } if ((0x80U & ep_addr) == 0x80U) 8005d8e: f997 3003 ldrsb.w r3, [r7, #3] 8005d92: 2b00 cmp r3, #0 8005d94: da0e bge.n 8005db4 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005d96: 78fb ldrb r3, [r7, #3] 8005d98: f003 0207 and.w r2, r3, #7 8005d9c: 4613 mov r3, r2 8005d9e: 009b lsls r3, r3, #2 8005da0: 4413 add r3, r2 8005da2: 00db lsls r3, r3, #3 8005da4: 3310 adds r3, #16 8005da6: 687a ldr r2, [r7, #4] 8005da8: 4413 add r3, r2 8005daa: 60fb str r3, [r7, #12] ep->is_in = 1U; 8005dac: 68fb ldr r3, [r7, #12] 8005dae: 2201 movs r2, #1 8005db0: 705a strb r2, [r3, #1] 8005db2: e00c b.n 8005dce } else { ep = &hpcd->OUT_ep[ep_addr]; 8005db4: 78fa ldrb r2, [r7, #3] 8005db6: 4613 mov r3, r2 8005db8: 009b lsls r3, r3, #2 8005dba: 4413 add r3, r2 8005dbc: 00db lsls r3, r3, #3 8005dbe: f503 73a8 add.w r3, r3, #336 @ 0x150 8005dc2: 687a ldr r2, [r7, #4] 8005dc4: 4413 add r3, r2 8005dc6: 60fb str r3, [r7, #12] ep->is_in = 0U; 8005dc8: 68fb ldr r3, [r7, #12] 8005dca: 2200 movs r2, #0 8005dcc: 705a strb r2, [r3, #1] } ep->is_stall = 1U; 8005dce: 68fb ldr r3, [r7, #12] 8005dd0: 2201 movs r2, #1 8005dd2: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8005dd4: 78fb ldrb r3, [r7, #3] 8005dd6: f003 0307 and.w r3, r3, #7 8005dda: b2da uxtb r2, r3 8005ddc: 68fb ldr r3, [r7, #12] 8005dde: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8005de0: 687b ldr r3, [r7, #4] 8005de2: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005de6: 2b01 cmp r3, #1 8005de8: d101 bne.n 8005dee 8005dea: 2302 movs r3, #2 8005dec: e01c b.n 8005e28 8005dee: 687b ldr r3, [r7, #4] 8005df0: 2201 movs r2, #1 8005df2: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPSetStall(hpcd->Instance, ep); 8005df6: 687b ldr r3, [r7, #4] 8005df8: 681b ldr r3, [r3, #0] 8005dfa: 68f9 ldr r1, [r7, #12] 8005dfc: 4618 mov r0, r3 8005dfe: f005 f8a0 bl 800af42 if ((ep_addr & EP_ADDR_MSK) == 0U) 8005e02: 78fb ldrb r3, [r7, #3] 8005e04: f003 0307 and.w r3, r3, #7 8005e08: 2b00 cmp r3, #0 8005e0a: d108 bne.n 8005e1e { (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup); 8005e0c: 687b ldr r3, [r7, #4] 8005e0e: 681a ldr r2, [r3, #0] 8005e10: 687b ldr r3, [r7, #4] 8005e12: f503 7326 add.w r3, r3, #664 @ 0x298 8005e16: 4619 mov r1, r3 8005e18: 4610 mov r0, r2 8005e1a: f005 f9c5 bl 800b1a8 } __HAL_UNLOCK(hpcd); 8005e1e: 687b ldr r3, [r7, #4] 8005e20: 2200 movs r2, #0 8005e22: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005e26: 2300 movs r3, #0 } 8005e28: 4618 mov r0, r3 8005e2a: 3710 adds r7, #16 8005e2c: 46bd mov sp, r7 8005e2e: bd80 pop {r7, pc} 08005e30 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8005e30: b580 push {r7, lr} 8005e32: b084 sub sp, #16 8005e34: af00 add r7, sp, #0 8005e36: 6078 str r0, [r7, #4] 8005e38: 460b mov r3, r1 8005e3a: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) 8005e3c: 78fb ldrb r3, [r7, #3] 8005e3e: f003 030f and.w r3, r3, #15 8005e42: 687a ldr r2, [r7, #4] 8005e44: 7912 ldrb r2, [r2, #4] 8005e46: 4293 cmp r3, r2 8005e48: d901 bls.n 8005e4e { return HAL_ERROR; 8005e4a: 2301 movs r3, #1 8005e4c: e040 b.n 8005ed0 } if ((0x80U & ep_addr) == 0x80U) 8005e4e: f997 3003 ldrsb.w r3, [r7, #3] 8005e52: 2b00 cmp r3, #0 8005e54: da0e bge.n 8005e74 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005e56: 78fb ldrb r3, [r7, #3] 8005e58: f003 0207 and.w r2, r3, #7 8005e5c: 4613 mov r3, r2 8005e5e: 009b lsls r3, r3, #2 8005e60: 4413 add r3, r2 8005e62: 00db lsls r3, r3, #3 8005e64: 3310 adds r3, #16 8005e66: 687a ldr r2, [r7, #4] 8005e68: 4413 add r3, r2 8005e6a: 60fb str r3, [r7, #12] ep->is_in = 1U; 8005e6c: 68fb ldr r3, [r7, #12] 8005e6e: 2201 movs r2, #1 8005e70: 705a strb r2, [r3, #1] 8005e72: e00e b.n 8005e92 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8005e74: 78fb ldrb r3, [r7, #3] 8005e76: f003 0207 and.w r2, r3, #7 8005e7a: 4613 mov r3, r2 8005e7c: 009b lsls r3, r3, #2 8005e7e: 4413 add r3, r2 8005e80: 00db lsls r3, r3, #3 8005e82: f503 73a8 add.w r3, r3, #336 @ 0x150 8005e86: 687a ldr r2, [r7, #4] 8005e88: 4413 add r3, r2 8005e8a: 60fb str r3, [r7, #12] ep->is_in = 0U; 8005e8c: 68fb ldr r3, [r7, #12] 8005e8e: 2200 movs r2, #0 8005e90: 705a strb r2, [r3, #1] } ep->is_stall = 0U; 8005e92: 68fb ldr r3, [r7, #12] 8005e94: 2200 movs r2, #0 8005e96: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8005e98: 78fb ldrb r3, [r7, #3] 8005e9a: f003 0307 and.w r3, r3, #7 8005e9e: b2da uxtb r2, r3 8005ea0: 68fb ldr r3, [r7, #12] 8005ea2: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8005ea4: 687b ldr r3, [r7, #4] 8005ea6: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005eaa: 2b01 cmp r3, #1 8005eac: d101 bne.n 8005eb2 8005eae: 2302 movs r3, #2 8005eb0: e00e b.n 8005ed0 8005eb2: 687b ldr r3, [r7, #4] 8005eb4: 2201 movs r2, #1 8005eb6: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPClearStall(hpcd->Instance, ep); 8005eba: 687b ldr r3, [r7, #4] 8005ebc: 681b ldr r3, [r3, #0] 8005ebe: 68f9 ldr r1, [r7, #12] 8005ec0: 4618 mov r0, r3 8005ec2: f005 f88e bl 800afe2 __HAL_UNLOCK(hpcd); 8005ec6: 687b ldr r3, [r7, #4] 8005ec8: 2200 movs r2, #0 8005eca: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005ece: 2300 movs r3, #0 } 8005ed0: 4618 mov r0, r3 8005ed2: 3710 adds r7, #16 8005ed4: 46bd mov sp, r7 8005ed6: bd80 pop {r7, pc} 08005ed8 : * @brief This function handles PCD Endpoint interrupt request. * @param hpcd PCD handle * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) { 8005ed8: b580 push {r7, lr} 8005eda: b096 sub sp, #88 @ 0x58 8005edc: af00 add r7, sp, #0 8005ede: 6078 str r0, [r7, #4] #if (USE_USB_DOUBLE_BUFFER != 1U) count = 0U; #endif /* USE_USB_DOUBLE_BUFFER */ /* stay in loop while pending interrupts */ while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 8005ee0: e3bb b.n 800665a { wIstr = hpcd->Instance->ISTR; 8005ee2: 687b ldr r3, [r7, #4] 8005ee4: 681b ldr r3, [r3, #0] 8005ee6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005eea: f8a7 304e strh.w r3, [r7, #78] @ 0x4e /* extract highest priority endpoint number */ epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); 8005eee: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8005ef2: b2db uxtb r3, r3 8005ef4: f003 030f and.w r3, r3, #15 8005ef8: f887 304d strb.w r3, [r7, #77] @ 0x4d if (epindex == 0U) 8005efc: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8005f00: 2b00 cmp r3, #0 8005f02: f040 8175 bne.w 80061f0 { /* Decode and service control endpoint interrupt */ /* DIR bit = origin of the interrupt */ if ((wIstr & USB_ISTR_DIR) == 0U) 8005f06: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8005f0a: f003 0310 and.w r3, r3, #16 8005f0e: 2b00 cmp r3, #0 8005f10: d14e bne.n 8005fb0 { /* DIR = 0 */ /* DIR = 0 => IN int */ /* DIR = 0 implies that (EP_CTR_TX = 1) always */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); 8005f12: 687b ldr r3, [r7, #4] 8005f14: 681b ldr r3, [r3, #0] 8005f16: 881b ldrh r3, [r3, #0] 8005f18: b29b uxth r3, r3 8005f1a: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 8005f1e: f023 0370 bic.w r3, r3, #112 @ 0x70 8005f22: 81fb strh r3, [r7, #14] 8005f24: 687b ldr r3, [r7, #4] 8005f26: 681a ldr r2, [r3, #0] 8005f28: 89fb ldrh r3, [r7, #14] 8005f2a: ea6f 4343 mvn.w r3, r3, lsl #17 8005f2e: ea6f 4353 mvn.w r3, r3, lsr #17 8005f32: b29b uxth r3, r3 8005f34: 8013 strh r3, [r2, #0] ep = &hpcd->IN_ep[0]; 8005f36: 687b ldr r3, [r7, #4] 8005f38: 3310 adds r3, #16 8005f3a: 657b str r3, [r7, #84] @ 0x54 ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 8005f3c: 687b ldr r3, [r7, #4] 8005f3e: 681b ldr r3, [r3, #0] 8005f40: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8005f44: b29b uxth r3, r3 8005f46: 461a mov r2, r3 8005f48: 6d7b ldr r3, [r7, #84] @ 0x54 8005f4a: 781b ldrb r3, [r3, #0] 8005f4c: 00db lsls r3, r3, #3 8005f4e: 4413 add r3, r2 8005f50: 3302 adds r3, #2 8005f52: 005b lsls r3, r3, #1 8005f54: 687a ldr r2, [r7, #4] 8005f56: 6812 ldr r2, [r2, #0] 8005f58: 4413 add r3, r2 8005f5a: f503 6380 add.w r3, r3, #1024 @ 0x400 8005f5e: 881b ldrh r3, [r3, #0] 8005f60: f3c3 0209 ubfx r2, r3, #0, #10 8005f64: 6d7b ldr r3, [r7, #84] @ 0x54 8005f66: 61da str r2, [r3, #28] ep->xfer_buff += ep->xfer_count; 8005f68: 6d7b ldr r3, [r7, #84] @ 0x54 8005f6a: 695a ldr r2, [r3, #20] 8005f6c: 6d7b ldr r3, [r7, #84] @ 0x54 8005f6e: 69db ldr r3, [r3, #28] 8005f70: 441a add r2, r3 8005f72: 6d7b ldr r3, [r7, #84] @ 0x54 8005f74: 615a str r2, [r3, #20] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, 0U); #else HAL_PCD_DataInStageCallback(hpcd, 0U); 8005f76: 2100 movs r1, #0 8005f78: 6878 ldr r0, [r7, #4] 8005f7a: f006 ffe4 bl 800cf46 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U)) 8005f7e: 687b ldr r3, [r7, #4] 8005f80: 7b5b ldrb r3, [r3, #13] 8005f82: b2db uxtb r3, r3 8005f84: 2b00 cmp r3, #0 8005f86: f000 8368 beq.w 800665a 8005f8a: 6d7b ldr r3, [r7, #84] @ 0x54 8005f8c: 699b ldr r3, [r3, #24] 8005f8e: 2b00 cmp r3, #0 8005f90: f040 8363 bne.w 800665a { hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF); 8005f94: 687b ldr r3, [r7, #4] 8005f96: 7b5b ldrb r3, [r3, #13] 8005f98: b2db uxtb r3, r3 8005f9a: f063 037f orn r3, r3, #127 @ 0x7f 8005f9e: b2da uxtb r2, r3 8005fa0: 687b ldr r3, [r7, #4] 8005fa2: 681b ldr r3, [r3, #0] 8005fa4: f8a3 204c strh.w r2, [r3, #76] @ 0x4c hpcd->USB_Address = 0U; 8005fa8: 687b ldr r3, [r7, #4] 8005faa: 2200 movs r2, #0 8005fac: 735a strb r2, [r3, #13] 8005fae: e354 b.n 800665a { /* DIR = 1 */ /* DIR = 1 & CTR_RX => SETUP or OUT int */ /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ ep = &hpcd->OUT_ep[0]; 8005fb0: 687b ldr r3, [r7, #4] 8005fb2: f503 73a8 add.w r3, r3, #336 @ 0x150 8005fb6: 657b str r3, [r7, #84] @ 0x54 wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 8005fb8: 687b ldr r3, [r7, #4] 8005fba: 681b ldr r3, [r3, #0] 8005fbc: 881b ldrh r3, [r3, #0] 8005fbe: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_SETUP) != 0U) 8005fc2: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8005fc6: f403 6300 and.w r3, r3, #2048 @ 0x800 8005fca: 2b00 cmp r3, #0 8005fcc: d034 beq.n 8006038 { /* Get SETUP Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8005fce: 687b ldr r3, [r7, #4] 8005fd0: 681b ldr r3, [r3, #0] 8005fd2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8005fd6: b29b uxth r3, r3 8005fd8: 461a mov r2, r3 8005fda: 6d7b ldr r3, [r7, #84] @ 0x54 8005fdc: 781b ldrb r3, [r3, #0] 8005fde: 00db lsls r3, r3, #3 8005fe0: 4413 add r3, r2 8005fe2: 3306 adds r3, #6 8005fe4: 005b lsls r3, r3, #1 8005fe6: 687a ldr r2, [r7, #4] 8005fe8: 6812 ldr r2, [r2, #0] 8005fea: 4413 add r3, r2 8005fec: f503 6380 add.w r3, r3, #1024 @ 0x400 8005ff0: 881b ldrh r3, [r3, #0] 8005ff2: f3c3 0209 ubfx r2, r3, #0, #10 8005ff6: 6d7b ldr r3, [r7, #84] @ 0x54 8005ff8: 61da str r2, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 8005ffa: 687b ldr r3, [r7, #4] 8005ffc: 6818 ldr r0, [r3, #0] 8005ffe: 687b ldr r3, [r7, #4] 8006000: f503 7126 add.w r1, r3, #664 @ 0x298 8006004: 6d7b ldr r3, [r7, #84] @ 0x54 8006006: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 8006008: 6d7b ldr r3, [r7, #84] @ 0x54 800600a: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 800600c: b29b uxth r3, r3 800600e: f005 f91c bl 800b24a /* SETUP bit kept frozen while CTR_RX = 1 */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 8006012: 687b ldr r3, [r7, #4] 8006014: 681b ldr r3, [r3, #0] 8006016: 881b ldrh r3, [r3, #0] 8006018: b29a uxth r2, r3 800601a: f640 738f movw r3, #3983 @ 0xf8f 800601e: 4013 ands r3, r2 8006020: 823b strh r3, [r7, #16] 8006022: 687b ldr r3, [r7, #4] 8006024: 681b ldr r3, [r3, #0] 8006026: 8a3a ldrh r2, [r7, #16] 8006028: f042 0280 orr.w r2, r2, #128 @ 0x80 800602c: b292 uxth r2, r2 800602e: 801a strh r2, [r3, #0] /* Process SETUP Packet*/ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SetupStageCallback(hpcd); #else HAL_PCD_SetupStageCallback(hpcd); 8006030: 6878 ldr r0, [r7, #4] 8006032: f006 ff5b bl 800ceec 8006036: e310 b.n 800665a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else if ((wEPVal & USB_EP_CTR_RX) != 0U) 8006038: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 800603c: 2b00 cmp r3, #0 800603e: f280 830c bge.w 800665a { PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 8006042: 687b ldr r3, [r7, #4] 8006044: 681b ldr r3, [r3, #0] 8006046: 881b ldrh r3, [r3, #0] 8006048: b29a uxth r2, r3 800604a: f640 738f movw r3, #3983 @ 0xf8f 800604e: 4013 ands r3, r2 8006050: 83fb strh r3, [r7, #30] 8006052: 687b ldr r3, [r7, #4] 8006054: 681b ldr r3, [r3, #0] 8006056: 8bfa ldrh r2, [r7, #30] 8006058: f042 0280 orr.w r2, r2, #128 @ 0x80 800605c: b292 uxth r2, r2 800605e: 801a strh r2, [r3, #0] /* Get Control Data OUT Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8006060: 687b ldr r3, [r7, #4] 8006062: 681b ldr r3, [r3, #0] 8006064: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006068: b29b uxth r3, r3 800606a: 461a mov r2, r3 800606c: 6d7b ldr r3, [r7, #84] @ 0x54 800606e: 781b ldrb r3, [r3, #0] 8006070: 00db lsls r3, r3, #3 8006072: 4413 add r3, r2 8006074: 3306 adds r3, #6 8006076: 005b lsls r3, r3, #1 8006078: 687a ldr r2, [r7, #4] 800607a: 6812 ldr r2, [r2, #0] 800607c: 4413 add r3, r2 800607e: f503 6380 add.w r3, r3, #1024 @ 0x400 8006082: 881b ldrh r3, [r3, #0] 8006084: f3c3 0209 ubfx r2, r3, #0, #10 8006088: 6d7b ldr r3, [r7, #84] @ 0x54 800608a: 61da str r2, [r3, #28] if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) 800608c: 6d7b ldr r3, [r7, #84] @ 0x54 800608e: 69db ldr r3, [r3, #28] 8006090: 2b00 cmp r3, #0 8006092: d019 beq.n 80060c8 8006094: 6d7b ldr r3, [r7, #84] @ 0x54 8006096: 695b ldr r3, [r3, #20] 8006098: 2b00 cmp r3, #0 800609a: d015 beq.n 80060c8 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 800609c: 687b ldr r3, [r7, #4] 800609e: 6818 ldr r0, [r3, #0] 80060a0: 6d7b ldr r3, [r7, #84] @ 0x54 80060a2: 6959 ldr r1, [r3, #20] 80060a4: 6d7b ldr r3, [r7, #84] @ 0x54 80060a6: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 80060a8: 6d7b ldr r3, [r7, #84] @ 0x54 80060aa: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 80060ac: b29b uxth r3, r3 80060ae: f005 f8cc bl 800b24a ep->xfer_buff += ep->xfer_count; 80060b2: 6d7b ldr r3, [r7, #84] @ 0x54 80060b4: 695a ldr r2, [r3, #20] 80060b6: 6d7b ldr r3, [r7, #84] @ 0x54 80060b8: 69db ldr r3, [r3, #28] 80060ba: 441a add r2, r3 80060bc: 6d7b ldr r3, [r7, #84] @ 0x54 80060be: 615a str r2, [r3, #20] /* Process Control Data OUT Packet */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, 0U); #else HAL_PCD_DataOutStageCallback(hpcd, 0U); 80060c0: 2100 movs r1, #0 80060c2: 6878 ldr r0, [r7, #4] 80060c4: f006 ff24 bl 800cf10 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 80060c8: 687b ldr r3, [r7, #4] 80060ca: 681b ldr r3, [r3, #0] 80060cc: 881b ldrh r3, [r3, #0] 80060ce: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) 80060d2: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80060d6: f403 6300 and.w r3, r3, #2048 @ 0x800 80060da: 2b00 cmp r3, #0 80060dc: f040 82bd bne.w 800665a 80060e0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80060e4: f403 5340 and.w r3, r3, #12288 @ 0x3000 80060e8: f5b3 5f40 cmp.w r3, #12288 @ 0x3000 80060ec: f000 82b5 beq.w 800665a { PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); 80060f0: 687b ldr r3, [r7, #4] 80060f2: 681b ldr r3, [r3, #0] 80060f4: 61bb str r3, [r7, #24] 80060f6: 687b ldr r3, [r7, #4] 80060f8: 681b ldr r3, [r3, #0] 80060fa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80060fe: b29b uxth r3, r3 8006100: 461a mov r2, r3 8006102: 69bb ldr r3, [r7, #24] 8006104: 4413 add r3, r2 8006106: 61bb str r3, [r7, #24] 8006108: 69bb ldr r3, [r7, #24] 800610a: f203 430c addw r3, r3, #1036 @ 0x40c 800610e: 617b str r3, [r7, #20] 8006110: 697b ldr r3, [r7, #20] 8006112: 881b ldrh r3, [r3, #0] 8006114: b29b uxth r3, r3 8006116: f3c3 0309 ubfx r3, r3, #0, #10 800611a: b29a uxth r2, r3 800611c: 697b ldr r3, [r7, #20] 800611e: 801a strh r2, [r3, #0] 8006120: 6d7b ldr r3, [r7, #84] @ 0x54 8006122: 691b ldr r3, [r3, #16] 8006124: 2b3e cmp r3, #62 @ 0x3e 8006126: d91d bls.n 8006164 8006128: 6d7b ldr r3, [r7, #84] @ 0x54 800612a: 691b ldr r3, [r3, #16] 800612c: 095b lsrs r3, r3, #5 800612e: 647b str r3, [r7, #68] @ 0x44 8006130: 6d7b ldr r3, [r7, #84] @ 0x54 8006132: 691b ldr r3, [r3, #16] 8006134: f003 031f and.w r3, r3, #31 8006138: 2b00 cmp r3, #0 800613a: d102 bne.n 8006142 800613c: 6c7b ldr r3, [r7, #68] @ 0x44 800613e: 3b01 subs r3, #1 8006140: 647b str r3, [r7, #68] @ 0x44 8006142: 697b ldr r3, [r7, #20] 8006144: 881b ldrh r3, [r3, #0] 8006146: b29a uxth r2, r3 8006148: 6c7b ldr r3, [r7, #68] @ 0x44 800614a: b29b uxth r3, r3 800614c: 029b lsls r3, r3, #10 800614e: b29b uxth r3, r3 8006150: 4313 orrs r3, r2 8006152: b29b uxth r3, r3 8006154: ea6f 4343 mvn.w r3, r3, lsl #17 8006158: ea6f 4353 mvn.w r3, r3, lsr #17 800615c: b29a uxth r2, r3 800615e: 697b ldr r3, [r7, #20] 8006160: 801a strh r2, [r3, #0] 8006162: e026 b.n 80061b2 8006164: 6d7b ldr r3, [r7, #84] @ 0x54 8006166: 691b ldr r3, [r3, #16] 8006168: 2b00 cmp r3, #0 800616a: d10a bne.n 8006182 800616c: 697b ldr r3, [r7, #20] 800616e: 881b ldrh r3, [r3, #0] 8006170: b29b uxth r3, r3 8006172: ea6f 4343 mvn.w r3, r3, lsl #17 8006176: ea6f 4353 mvn.w r3, r3, lsr #17 800617a: b29a uxth r2, r3 800617c: 697b ldr r3, [r7, #20] 800617e: 801a strh r2, [r3, #0] 8006180: e017 b.n 80061b2 8006182: 6d7b ldr r3, [r7, #84] @ 0x54 8006184: 691b ldr r3, [r3, #16] 8006186: 085b lsrs r3, r3, #1 8006188: 647b str r3, [r7, #68] @ 0x44 800618a: 6d7b ldr r3, [r7, #84] @ 0x54 800618c: 691b ldr r3, [r3, #16] 800618e: f003 0301 and.w r3, r3, #1 8006192: 2b00 cmp r3, #0 8006194: d002 beq.n 800619c 8006196: 6c7b ldr r3, [r7, #68] @ 0x44 8006198: 3301 adds r3, #1 800619a: 647b str r3, [r7, #68] @ 0x44 800619c: 697b ldr r3, [r7, #20] 800619e: 881b ldrh r3, [r3, #0] 80061a0: b29a uxth r2, r3 80061a2: 6c7b ldr r3, [r7, #68] @ 0x44 80061a4: b29b uxth r3, r3 80061a6: 029b lsls r3, r3, #10 80061a8: b29b uxth r3, r3 80061aa: 4313 orrs r3, r2 80061ac: b29a uxth r2, r3 80061ae: 697b ldr r3, [r7, #20] 80061b0: 801a strh r2, [r3, #0] PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); 80061b2: 687b ldr r3, [r7, #4] 80061b4: 681b ldr r3, [r3, #0] 80061b6: 881b ldrh r3, [r3, #0] 80061b8: b29b uxth r3, r3 80061ba: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80061be: f023 0370 bic.w r3, r3, #112 @ 0x70 80061c2: 827b strh r3, [r7, #18] 80061c4: 8a7b ldrh r3, [r7, #18] 80061c6: f483 5380 eor.w r3, r3, #4096 @ 0x1000 80061ca: 827b strh r3, [r7, #18] 80061cc: 8a7b ldrh r3, [r7, #18] 80061ce: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80061d2: 827b strh r3, [r7, #18] 80061d4: 687b ldr r3, [r7, #4] 80061d6: 681a ldr r2, [r3, #0] 80061d8: 8a7b ldrh r3, [r7, #18] 80061da: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80061de: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80061e2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80061e6: f043 0380 orr.w r3, r3, #128 @ 0x80 80061ea: b29b uxth r3, r3 80061ec: 8013 strh r3, [r2, #0] 80061ee: e234 b.n 800665a } else { /* Decode and service non control endpoints interrupt */ /* process related endpoint register */ wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); 80061f0: 687b ldr r3, [r7, #4] 80061f2: 681b ldr r3, [r3, #0] 80061f4: 461a mov r2, r3 80061f6: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 80061fa: 009b lsls r3, r3, #2 80061fc: 4413 add r3, r2 80061fe: 881b ldrh r3, [r3, #0] 8006200: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_CTR_RX) != 0U) 8006204: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 8006208: 2b00 cmp r3, #0 800620a: f280 80fc bge.w 8006406 { /* clear int flag */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); 800620e: 687b ldr r3, [r7, #4] 8006210: 681b ldr r3, [r3, #0] 8006212: 461a mov r2, r3 8006214: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8006218: 009b lsls r3, r3, #2 800621a: 4413 add r3, r2 800621c: 881b ldrh r3, [r3, #0] 800621e: b29a uxth r2, r3 8006220: f640 738f movw r3, #3983 @ 0xf8f 8006224: 4013 ands r3, r2 8006226: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 800622a: 687b ldr r3, [r7, #4] 800622c: 681b ldr r3, [r3, #0] 800622e: 461a mov r2, r3 8006230: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8006234: 009b lsls r3, r3, #2 8006236: 4413 add r3, r2 8006238: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48 800623c: f042 0280 orr.w r2, r2, #128 @ 0x80 8006240: b292 uxth r2, r2 8006242: 801a strh r2, [r3, #0] ep = &hpcd->OUT_ep[epindex]; 8006244: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 8006248: 4613 mov r3, r2 800624a: 009b lsls r3, r3, #2 800624c: 4413 add r3, r2 800624e: 00db lsls r3, r3, #3 8006250: f503 73a8 add.w r3, r3, #336 @ 0x150 8006254: 687a ldr r2, [r7, #4] 8006256: 4413 add r3, r2 8006258: 657b str r3, [r7, #84] @ 0x54 /* OUT Single Buffering */ if (ep->doublebuffer == 0U) 800625a: 6d7b ldr r3, [r7, #84] @ 0x54 800625c: 7b1b ldrb r3, [r3, #12] 800625e: 2b00 cmp r3, #0 8006260: d125 bne.n 80062ae { count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8006262: 687b ldr r3, [r7, #4] 8006264: 681b ldr r3, [r3, #0] 8006266: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800626a: b29b uxth r3, r3 800626c: 461a mov r2, r3 800626e: 6d7b ldr r3, [r7, #84] @ 0x54 8006270: 781b ldrb r3, [r3, #0] 8006272: 00db lsls r3, r3, #3 8006274: 4413 add r3, r2 8006276: 3306 adds r3, #6 8006278: 005b lsls r3, r3, #1 800627a: 687a ldr r2, [r7, #4] 800627c: 6812 ldr r2, [r2, #0] 800627e: 4413 add r3, r2 8006280: f503 6380 add.w r3, r3, #1024 @ 0x400 8006284: 881b ldrh r3, [r3, #0] 8006286: f3c3 0309 ubfx r3, r3, #0, #10 800628a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 800628e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8006292: 2b00 cmp r3, #0 8006294: f000 8092 beq.w 80063bc { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); 8006298: 687b ldr r3, [r7, #4] 800629a: 6818 ldr r0, [r3, #0] 800629c: 6d7b ldr r3, [r7, #84] @ 0x54 800629e: 6959 ldr r1, [r3, #20] 80062a0: 6d7b ldr r3, [r7, #84] @ 0x54 80062a2: 88da ldrh r2, [r3, #6] 80062a4: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80062a8: f004 ffcf bl 800b24a 80062ac: e086 b.n 80063bc } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* manage double buffer bulk out */ if (ep->type == EP_TYPE_BULK) 80062ae: 6d7b ldr r3, [r7, #84] @ 0x54 80062b0: 78db ldrb r3, [r3, #3] 80062b2: 2b02 cmp r3, #2 80062b4: d10a bne.n 80062cc { count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal); 80062b6: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80062ba: 461a mov r2, r3 80062bc: 6d79 ldr r1, [r7, #84] @ 0x54 80062be: 6878 ldr r0, [r7, #4] 80062c0: f000 f9d9 bl 8006676 80062c4: 4603 mov r3, r0 80062c6: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 80062ca: e077 b.n 80063bc } else /* manage double buffer iso out */ { /* free EP OUT Buffer */ PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 80062cc: 687b ldr r3, [r7, #4] 80062ce: 681b ldr r3, [r3, #0] 80062d0: 461a mov r2, r3 80062d2: 6d7b ldr r3, [r7, #84] @ 0x54 80062d4: 781b ldrb r3, [r3, #0] 80062d6: 009b lsls r3, r3, #2 80062d8: 4413 add r3, r2 80062da: 881b ldrh r3, [r3, #0] 80062dc: b29b uxth r3, r3 80062de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80062e2: f023 0370 bic.w r3, r3, #112 @ 0x70 80062e6: f8a7 3052 strh.w r3, [r7, #82] @ 0x52 80062ea: 687b ldr r3, [r7, #4] 80062ec: 681b ldr r3, [r3, #0] 80062ee: 461a mov r2, r3 80062f0: 6d7b ldr r3, [r7, #84] @ 0x54 80062f2: 781b ldrb r3, [r3, #0] 80062f4: 009b lsls r3, r3, #2 80062f6: 441a add r2, r3 80062f8: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52 80062fc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006300: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006304: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006308: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800630c: b29b uxth r3, r3 800630e: 8013 strh r3, [r2, #0] if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) 8006310: 687b ldr r3, [r7, #4] 8006312: 681b ldr r3, [r3, #0] 8006314: 461a mov r2, r3 8006316: 6d7b ldr r3, [r7, #84] @ 0x54 8006318: 781b ldrb r3, [r3, #0] 800631a: 009b lsls r3, r3, #2 800631c: 4413 add r3, r2 800631e: 881b ldrh r3, [r3, #0] 8006320: b29b uxth r3, r3 8006322: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006326: 2b00 cmp r3, #0 8006328: d024 beq.n 8006374 { /* read from endpoint BUF0Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 800632a: 687b ldr r3, [r7, #4] 800632c: 681b ldr r3, [r3, #0] 800632e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006332: b29b uxth r3, r3 8006334: 461a mov r2, r3 8006336: 6d7b ldr r3, [r7, #84] @ 0x54 8006338: 781b ldrb r3, [r3, #0] 800633a: 00db lsls r3, r3, #3 800633c: 4413 add r3, r2 800633e: 3302 adds r3, #2 8006340: 005b lsls r3, r3, #1 8006342: 687a ldr r2, [r7, #4] 8006344: 6812 ldr r2, [r2, #0] 8006346: 4413 add r3, r2 8006348: f503 6380 add.w r3, r3, #1024 @ 0x400 800634c: 881b ldrh r3, [r3, #0] 800634e: f3c3 0309 ubfx r3, r3, #0, #10 8006352: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 8006356: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 800635a: 2b00 cmp r3, #0 800635c: d02e beq.n 80063bc { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 800635e: 687b ldr r3, [r7, #4] 8006360: 6818 ldr r0, [r3, #0] 8006362: 6d7b ldr r3, [r7, #84] @ 0x54 8006364: 6959 ldr r1, [r3, #20] 8006366: 6d7b ldr r3, [r7, #84] @ 0x54 8006368: 891a ldrh r2, [r3, #8] 800636a: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 800636e: f004 ff6c bl 800b24a 8006372: e023 b.n 80063bc } } else { /* read from endpoint BUF1Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8006374: 687b ldr r3, [r7, #4] 8006376: 681b ldr r3, [r3, #0] 8006378: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800637c: b29b uxth r3, r3 800637e: 461a mov r2, r3 8006380: 6d7b ldr r3, [r7, #84] @ 0x54 8006382: 781b ldrb r3, [r3, #0] 8006384: 00db lsls r3, r3, #3 8006386: 4413 add r3, r2 8006388: 3306 adds r3, #6 800638a: 005b lsls r3, r3, #1 800638c: 687a ldr r2, [r7, #4] 800638e: 6812 ldr r2, [r2, #0] 8006390: 4413 add r3, r2 8006392: f503 6380 add.w r3, r3, #1024 @ 0x400 8006396: 881b ldrh r3, [r3, #0] 8006398: f3c3 0309 ubfx r3, r3, #0, #10 800639c: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 80063a0: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80063a4: 2b00 cmp r3, #0 80063a6: d009 beq.n 80063bc { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 80063a8: 687b ldr r3, [r7, #4] 80063aa: 6818 ldr r0, [r3, #0] 80063ac: 6d7b ldr r3, [r7, #84] @ 0x54 80063ae: 6959 ldr r1, [r3, #20] 80063b0: 6d7b ldr r3, [r7, #84] @ 0x54 80063b2: 895a ldrh r2, [r3, #10] 80063b4: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80063b8: f004 ff47 bl 800b24a } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; 80063bc: 6d7b ldr r3, [r7, #84] @ 0x54 80063be: 69da ldr r2, [r3, #28] 80063c0: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80063c4: 441a add r2, r3 80063c6: 6d7b ldr r3, [r7, #84] @ 0x54 80063c8: 61da str r2, [r3, #28] ep->xfer_buff += count; 80063ca: 6d7b ldr r3, [r7, #84] @ 0x54 80063cc: 695a ldr r2, [r3, #20] 80063ce: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80063d2: 441a add r2, r3 80063d4: 6d7b ldr r3, [r7, #84] @ 0x54 80063d6: 615a str r2, [r3, #20] if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) 80063d8: 6d7b ldr r3, [r7, #84] @ 0x54 80063da: 699b ldr r3, [r3, #24] 80063dc: 2b00 cmp r3, #0 80063de: d005 beq.n 80063ec 80063e0: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50 80063e4: 6d7b ldr r3, [r7, #84] @ 0x54 80063e6: 691b ldr r3, [r3, #16] 80063e8: 429a cmp r2, r3 80063ea: d206 bcs.n 80063fa { /* RX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, ep->num); #else HAL_PCD_DataOutStageCallback(hpcd, ep->num); 80063ec: 6d7b ldr r3, [r7, #84] @ 0x54 80063ee: 781b ldrb r3, [r3, #0] 80063f0: 4619 mov r1, r3 80063f2: 6878 ldr r0, [r7, #4] 80063f4: f006 fd8c bl 800cf10 80063f8: e005 b.n 8006406 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { (void)USB_EPStartXfer(hpcd->Instance, ep); 80063fa: 687b ldr r3, [r7, #4] 80063fc: 681b ldr r3, [r3, #0] 80063fe: 6d79 ldr r1, [r7, #84] @ 0x54 8006400: 4618 mov r0, r3 8006402: f003 f9ed bl 80097e0 } } if ((wEPVal & USB_EP_CTR_TX) != 0U) 8006406: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800640a: f003 0380 and.w r3, r3, #128 @ 0x80 800640e: 2b00 cmp r3, #0 8006410: f000 8123 beq.w 800665a { ep = &hpcd->IN_ep[epindex]; 8006414: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 8006418: 4613 mov r3, r2 800641a: 009b lsls r3, r3, #2 800641c: 4413 add r3, r2 800641e: 00db lsls r3, r3, #3 8006420: 3310 adds r3, #16 8006422: 687a ldr r2, [r7, #4] 8006424: 4413 add r3, r2 8006426: 657b str r3, [r7, #84] @ 0x54 /* clear int flag */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); 8006428: 687b ldr r3, [r7, #4] 800642a: 681b ldr r3, [r3, #0] 800642c: 461a mov r2, r3 800642e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8006432: 009b lsls r3, r3, #2 8006434: 4413 add r3, r2 8006436: 881b ldrh r3, [r3, #0] 8006438: b29b uxth r3, r3 800643a: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 800643e: f023 0370 bic.w r3, r3, #112 @ 0x70 8006442: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 8006446: 687b ldr r3, [r7, #4] 8006448: 681b ldr r3, [r3, #0] 800644a: 461a mov r2, r3 800644c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8006450: 009b lsls r3, r3, #2 8006452: 441a add r2, r3 8006454: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 8006458: ea6f 4343 mvn.w r3, r3, lsl #17 800645c: ea6f 4353 mvn.w r3, r3, lsr #17 8006460: b29b uxth r3, r3 8006462: 8013 strh r3, [r2, #0] if (ep->type == EP_TYPE_ISOC) 8006464: 6d7b ldr r3, [r7, #84] @ 0x54 8006466: 78db ldrb r3, [r3, #3] 8006468: 2b01 cmp r3, #1 800646a: f040 80a2 bne.w 80065b2 { ep->xfer_len = 0U; 800646e: 6d7b ldr r3, [r7, #84] @ 0x54 8006470: 2200 movs r2, #0 8006472: 619a str r2, [r3, #24] #if (USE_USB_DOUBLE_BUFFER == 1U) if (ep->doublebuffer != 0U) 8006474: 6d7b ldr r3, [r7, #84] @ 0x54 8006476: 7b1b ldrb r3, [r3, #12] 8006478: 2b00 cmp r3, #0 800647a: f000 8093 beq.w 80065a4 { if ((wEPVal & USB_EP_DTOG_TX) != 0U) 800647e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8006482: f003 0340 and.w r3, r3, #64 @ 0x40 8006486: 2b00 cmp r3, #0 8006488: d046 beq.n 8006518 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 800648a: 6d7b ldr r3, [r7, #84] @ 0x54 800648c: 785b ldrb r3, [r3, #1] 800648e: 2b00 cmp r3, #0 8006490: d126 bne.n 80064e0 8006492: 687b ldr r3, [r7, #4] 8006494: 681b ldr r3, [r3, #0] 8006496: 627b str r3, [r7, #36] @ 0x24 8006498: 687b ldr r3, [r7, #4] 800649a: 681b ldr r3, [r3, #0] 800649c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80064a0: b29b uxth r3, r3 80064a2: 461a mov r2, r3 80064a4: 6a7b ldr r3, [r7, #36] @ 0x24 80064a6: 4413 add r3, r2 80064a8: 627b str r3, [r7, #36] @ 0x24 80064aa: 6d7b ldr r3, [r7, #84] @ 0x54 80064ac: 781b ldrb r3, [r3, #0] 80064ae: 011a lsls r2, r3, #4 80064b0: 6a7b ldr r3, [r7, #36] @ 0x24 80064b2: 4413 add r3, r2 80064b4: f203 4304 addw r3, r3, #1028 @ 0x404 80064b8: 623b str r3, [r7, #32] 80064ba: 6a3b ldr r3, [r7, #32] 80064bc: 881b ldrh r3, [r3, #0] 80064be: b29b uxth r3, r3 80064c0: f3c3 0309 ubfx r3, r3, #0, #10 80064c4: b29a uxth r2, r3 80064c6: 6a3b ldr r3, [r7, #32] 80064c8: 801a strh r2, [r3, #0] 80064ca: 6a3b ldr r3, [r7, #32] 80064cc: 881b ldrh r3, [r3, #0] 80064ce: b29b uxth r3, r3 80064d0: ea6f 4343 mvn.w r3, r3, lsl #17 80064d4: ea6f 4353 mvn.w r3, r3, lsr #17 80064d8: b29a uxth r2, r3 80064da: 6a3b ldr r3, [r7, #32] 80064dc: 801a strh r2, [r3, #0] 80064de: e061 b.n 80065a4 80064e0: 6d7b ldr r3, [r7, #84] @ 0x54 80064e2: 785b ldrb r3, [r3, #1] 80064e4: 2b01 cmp r3, #1 80064e6: d15d bne.n 80065a4 80064e8: 687b ldr r3, [r7, #4] 80064ea: 681b ldr r3, [r3, #0] 80064ec: 62fb str r3, [r7, #44] @ 0x2c 80064ee: 687b ldr r3, [r7, #4] 80064f0: 681b ldr r3, [r3, #0] 80064f2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80064f6: b29b uxth r3, r3 80064f8: 461a mov r2, r3 80064fa: 6afb ldr r3, [r7, #44] @ 0x2c 80064fc: 4413 add r3, r2 80064fe: 62fb str r3, [r7, #44] @ 0x2c 8006500: 6d7b ldr r3, [r7, #84] @ 0x54 8006502: 781b ldrb r3, [r3, #0] 8006504: 011a lsls r2, r3, #4 8006506: 6afb ldr r3, [r7, #44] @ 0x2c 8006508: 4413 add r3, r2 800650a: f203 4304 addw r3, r3, #1028 @ 0x404 800650e: 62bb str r3, [r7, #40] @ 0x28 8006510: 6abb ldr r3, [r7, #40] @ 0x28 8006512: 2200 movs r2, #0 8006514: 801a strh r2, [r3, #0] 8006516: e045 b.n 80065a4 } else { PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8006518: 687b ldr r3, [r7, #4] 800651a: 681b ldr r3, [r3, #0] 800651c: 63fb str r3, [r7, #60] @ 0x3c 800651e: 6d7b ldr r3, [r7, #84] @ 0x54 8006520: 785b ldrb r3, [r3, #1] 8006522: 2b00 cmp r3, #0 8006524: d126 bne.n 8006574 8006526: 687b ldr r3, [r7, #4] 8006528: 681b ldr r3, [r3, #0] 800652a: 637b str r3, [r7, #52] @ 0x34 800652c: 687b ldr r3, [r7, #4] 800652e: 681b ldr r3, [r3, #0] 8006530: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006534: b29b uxth r3, r3 8006536: 461a mov r2, r3 8006538: 6b7b ldr r3, [r7, #52] @ 0x34 800653a: 4413 add r3, r2 800653c: 637b str r3, [r7, #52] @ 0x34 800653e: 6d7b ldr r3, [r7, #84] @ 0x54 8006540: 781b ldrb r3, [r3, #0] 8006542: 011a lsls r2, r3, #4 8006544: 6b7b ldr r3, [r7, #52] @ 0x34 8006546: 4413 add r3, r2 8006548: f203 430c addw r3, r3, #1036 @ 0x40c 800654c: 633b str r3, [r7, #48] @ 0x30 800654e: 6b3b ldr r3, [r7, #48] @ 0x30 8006550: 881b ldrh r3, [r3, #0] 8006552: b29b uxth r3, r3 8006554: f3c3 0309 ubfx r3, r3, #0, #10 8006558: b29a uxth r2, r3 800655a: 6b3b ldr r3, [r7, #48] @ 0x30 800655c: 801a strh r2, [r3, #0] 800655e: 6b3b ldr r3, [r7, #48] @ 0x30 8006560: 881b ldrh r3, [r3, #0] 8006562: b29b uxth r3, r3 8006564: ea6f 4343 mvn.w r3, r3, lsl #17 8006568: ea6f 4353 mvn.w r3, r3, lsr #17 800656c: b29a uxth r2, r3 800656e: 6b3b ldr r3, [r7, #48] @ 0x30 8006570: 801a strh r2, [r3, #0] 8006572: e017 b.n 80065a4 8006574: 6d7b ldr r3, [r7, #84] @ 0x54 8006576: 785b ldrb r3, [r3, #1] 8006578: 2b01 cmp r3, #1 800657a: d113 bne.n 80065a4 800657c: 687b ldr r3, [r7, #4] 800657e: 681b ldr r3, [r3, #0] 8006580: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006584: b29b uxth r3, r3 8006586: 461a mov r2, r3 8006588: 6bfb ldr r3, [r7, #60] @ 0x3c 800658a: 4413 add r3, r2 800658c: 63fb str r3, [r7, #60] @ 0x3c 800658e: 6d7b ldr r3, [r7, #84] @ 0x54 8006590: 781b ldrb r3, [r3, #0] 8006592: 011a lsls r2, r3, #4 8006594: 6bfb ldr r3, [r7, #60] @ 0x3c 8006596: 4413 add r3, r2 8006598: f203 430c addw r3, r3, #1036 @ 0x40c 800659c: 63bb str r3, [r7, #56] @ 0x38 800659e: 6bbb ldr r3, [r7, #56] @ 0x38 80065a0: 2200 movs r2, #0 80065a2: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 80065a4: 6d7b ldr r3, [r7, #84] @ 0x54 80065a6: 781b ldrb r3, [r3, #0] 80065a8: 4619 mov r1, r3 80065aa: 6878 ldr r0, [r7, #4] 80065ac: f006 fccb bl 800cf46 80065b0: e053 b.n 800665a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Manage Single Buffer Transaction */ if ((wEPVal & USB_EP_KIND) == 0U) 80065b2: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80065b6: f403 7380 and.w r3, r3, #256 @ 0x100 80065ba: 2b00 cmp r3, #0 80065bc: d146 bne.n 800664c { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 80065be: 687b ldr r3, [r7, #4] 80065c0: 681b ldr r3, [r3, #0] 80065c2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80065c6: b29b uxth r3, r3 80065c8: 461a mov r2, r3 80065ca: 6d7b ldr r3, [r7, #84] @ 0x54 80065cc: 781b ldrb r3, [r3, #0] 80065ce: 00db lsls r3, r3, #3 80065d0: 4413 add r3, r2 80065d2: 3302 adds r3, #2 80065d4: 005b lsls r3, r3, #1 80065d6: 687a ldr r2, [r7, #4] 80065d8: 6812 ldr r2, [r2, #0] 80065da: 4413 add r3, r2 80065dc: f503 6380 add.w r3, r3, #1024 @ 0x400 80065e0: 881b ldrh r3, [r3, #0] 80065e2: f3c3 0309 ubfx r3, r3, #0, #10 80065e6: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 if (ep->xfer_len > TxPctSize) 80065ea: 6d7b ldr r3, [r7, #84] @ 0x54 80065ec: 699a ldr r2, [r3, #24] 80065ee: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 80065f2: 429a cmp r2, r3 80065f4: d907 bls.n 8006606 { ep->xfer_len -= TxPctSize; 80065f6: 6d7b ldr r3, [r7, #84] @ 0x54 80065f8: 699a ldr r2, [r3, #24] 80065fa: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 80065fe: 1ad2 subs r2, r2, r3 8006600: 6d7b ldr r3, [r7, #84] @ 0x54 8006602: 619a str r2, [r3, #24] 8006604: e002 b.n 800660c } else { ep->xfer_len = 0U; 8006606: 6d7b ldr r3, [r7, #84] @ 0x54 8006608: 2200 movs r2, #0 800660a: 619a str r2, [r3, #24] } /* Zero Length Packet? */ if (ep->xfer_len == 0U) 800660c: 6d7b ldr r3, [r7, #84] @ 0x54 800660e: 699b ldr r3, [r3, #24] 8006610: 2b00 cmp r3, #0 8006612: d106 bne.n 8006622 { /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8006614: 6d7b ldr r3, [r7, #84] @ 0x54 8006616: 781b ldrb r3, [r3, #0] 8006618: 4619 mov r1, r3 800661a: 6878 ldr r0, [r7, #4] 800661c: f006 fc93 bl 800cf46 8006620: e01b b.n 800665a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Transfer is not yet Done */ ep->xfer_buff += TxPctSize; 8006622: 6d7b ldr r3, [r7, #84] @ 0x54 8006624: 695a ldr r2, [r3, #20] 8006626: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 800662a: 441a add r2, r3 800662c: 6d7b ldr r3, [r7, #84] @ 0x54 800662e: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8006630: 6d7b ldr r3, [r7, #84] @ 0x54 8006632: 69da ldr r2, [r3, #28] 8006634: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8006638: 441a add r2, r3 800663a: 6d7b ldr r3, [r7, #84] @ 0x54 800663c: 61da str r2, [r3, #28] (void)USB_EPStartXfer(hpcd->Instance, ep); 800663e: 687b ldr r3, [r7, #4] 8006640: 681b ldr r3, [r3, #0] 8006642: 6d79 ldr r1, [r7, #84] @ 0x54 8006644: 4618 mov r0, r3 8006646: f003 f8cb bl 80097e0 800664a: e006 b.n 800665a } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */ else { (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); 800664c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8006650: 461a mov r2, r3 8006652: 6d79 ldr r1, [r7, #84] @ 0x54 8006654: 6878 ldr r0, [r7, #4] 8006656: f000 f91b bl 8006890 while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 800665a: 687b ldr r3, [r7, #4] 800665c: 681b ldr r3, [r3, #0] 800665e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006662: b29b uxth r3, r3 8006664: b21b sxth r3, r3 8006666: 2b00 cmp r3, #0 8006668: f6ff ac3b blt.w 8005ee2 } } } } return HAL_OK; 800666c: 2300 movs r3, #0 } 800666e: 4618 mov r0, r3 8006670: 3758 adds r7, #88 @ 0x58 8006672: 46bd mov sp, r7 8006674: bd80 pop {r7, pc} 08006676 : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 8006676: b580 push {r7, lr} 8006678: b088 sub sp, #32 800667a: af00 add r7, sp, #0 800667c: 60f8 str r0, [r7, #12] 800667e: 60b9 str r1, [r7, #8] 8006680: 4613 mov r3, r2 8006682: 80fb strh r3, [r7, #6] uint16_t count; /* Manage Buffer0 OUT */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8006684: 88fb ldrh r3, [r7, #6] 8006686: f403 4380 and.w r3, r3, #16384 @ 0x4000 800668a: 2b00 cmp r3, #0 800668c: d07e beq.n 800678c { /* Get count of received Data on buffer0 */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 800668e: 68fb ldr r3, [r7, #12] 8006690: 681b ldr r3, [r3, #0] 8006692: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006696: b29b uxth r3, r3 8006698: 461a mov r2, r3 800669a: 68bb ldr r3, [r7, #8] 800669c: 781b ldrb r3, [r3, #0] 800669e: 00db lsls r3, r3, #3 80066a0: 4413 add r3, r2 80066a2: 3302 adds r3, #2 80066a4: 005b lsls r3, r3, #1 80066a6: 68fa ldr r2, [r7, #12] 80066a8: 6812 ldr r2, [r2, #0] 80066aa: 4413 add r3, r2 80066ac: f503 6380 add.w r3, r3, #1024 @ 0x400 80066b0: 881b ldrh r3, [r3, #0] 80066b2: f3c3 0309 ubfx r3, r3, #0, #10 80066b6: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 80066b8: 68bb ldr r3, [r7, #8] 80066ba: 699a ldr r2, [r3, #24] 80066bc: 8b7b ldrh r3, [r7, #26] 80066be: 429a cmp r2, r3 80066c0: d306 bcc.n 80066d0 { ep->xfer_len -= count; 80066c2: 68bb ldr r3, [r7, #8] 80066c4: 699a ldr r2, [r3, #24] 80066c6: 8b7b ldrh r3, [r7, #26] 80066c8: 1ad2 subs r2, r2, r3 80066ca: 68bb ldr r3, [r7, #8] 80066cc: 619a str r2, [r3, #24] 80066ce: e002 b.n 80066d6 } else { ep->xfer_len = 0U; 80066d0: 68bb ldr r3, [r7, #8] 80066d2: 2200 movs r2, #0 80066d4: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 80066d6: 68bb ldr r3, [r7, #8] 80066d8: 699b ldr r3, [r3, #24] 80066da: 2b00 cmp r3, #0 80066dc: d123 bne.n 8006726 { /* set NAK to OUT endpoint since double buffer is enabled */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 80066de: 68fb ldr r3, [r7, #12] 80066e0: 681b ldr r3, [r3, #0] 80066e2: 461a mov r2, r3 80066e4: 68bb ldr r3, [r7, #8] 80066e6: 781b ldrb r3, [r3, #0] 80066e8: 009b lsls r3, r3, #2 80066ea: 4413 add r3, r2 80066ec: 881b ldrh r3, [r3, #0] 80066ee: b29b uxth r3, r3 80066f0: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80066f4: f023 0370 bic.w r3, r3, #112 @ 0x70 80066f8: 833b strh r3, [r7, #24] 80066fa: 8b3b ldrh r3, [r7, #24] 80066fc: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8006700: 833b strh r3, [r7, #24] 8006702: 68fb ldr r3, [r7, #12] 8006704: 681b ldr r3, [r3, #0] 8006706: 461a mov r2, r3 8006708: 68bb ldr r3, [r7, #8] 800670a: 781b ldrb r3, [r3, #0] 800670c: 009b lsls r3, r3, #2 800670e: 441a add r2, r3 8006710: 8b3b ldrh r3, [r7, #24] 8006712: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006716: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800671a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800671e: f043 0380 orr.w r3, r3, #128 @ 0x80 8006722: b29b uxth r3, r3 8006724: 8013 strh r3, [r2, #0] } /* Check if Buffer1 is in blocked state which requires to toggle */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 8006726: 88fb ldrh r3, [r7, #6] 8006728: f003 0340 and.w r3, r3, #64 @ 0x40 800672c: 2b00 cmp r3, #0 800672e: d01f beq.n 8006770 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 8006730: 68fb ldr r3, [r7, #12] 8006732: 681b ldr r3, [r3, #0] 8006734: 461a mov r2, r3 8006736: 68bb ldr r3, [r7, #8] 8006738: 781b ldrb r3, [r3, #0] 800673a: 009b lsls r3, r3, #2 800673c: 4413 add r3, r2 800673e: 881b ldrh r3, [r3, #0] 8006740: b29b uxth r3, r3 8006742: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006746: f023 0370 bic.w r3, r3, #112 @ 0x70 800674a: 82fb strh r3, [r7, #22] 800674c: 68fb ldr r3, [r7, #12] 800674e: 681b ldr r3, [r3, #0] 8006750: 461a mov r2, r3 8006752: 68bb ldr r3, [r7, #8] 8006754: 781b ldrb r3, [r3, #0] 8006756: 009b lsls r3, r3, #2 8006758: 441a add r2, r3 800675a: 8afb ldrh r3, [r7, #22] 800675c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006760: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006764: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006768: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800676c: b29b uxth r3, r3 800676e: 8013 strh r3, [r2, #0] } if (count != 0U) 8006770: 8b7b ldrh r3, [r7, #26] 8006772: 2b00 cmp r3, #0 8006774: f000 8087 beq.w 8006886 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 8006778: 68fb ldr r3, [r7, #12] 800677a: 6818 ldr r0, [r3, #0] 800677c: 68bb ldr r3, [r7, #8] 800677e: 6959 ldr r1, [r3, #20] 8006780: 68bb ldr r3, [r7, #8] 8006782: 891a ldrh r2, [r3, #8] 8006784: 8b7b ldrh r3, [r7, #26] 8006786: f004 fd60 bl 800b24a 800678a: e07c b.n 8006886 } /* Manage Buffer 1 DTOG_RX=0 */ else { /* Get count of received data */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 800678c: 68fb ldr r3, [r7, #12] 800678e: 681b ldr r3, [r3, #0] 8006790: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006794: b29b uxth r3, r3 8006796: 461a mov r2, r3 8006798: 68bb ldr r3, [r7, #8] 800679a: 781b ldrb r3, [r3, #0] 800679c: 00db lsls r3, r3, #3 800679e: 4413 add r3, r2 80067a0: 3306 adds r3, #6 80067a2: 005b lsls r3, r3, #1 80067a4: 68fa ldr r2, [r7, #12] 80067a6: 6812 ldr r2, [r2, #0] 80067a8: 4413 add r3, r2 80067aa: f503 6380 add.w r3, r3, #1024 @ 0x400 80067ae: 881b ldrh r3, [r3, #0] 80067b0: f3c3 0309 ubfx r3, r3, #0, #10 80067b4: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 80067b6: 68bb ldr r3, [r7, #8] 80067b8: 699a ldr r2, [r3, #24] 80067ba: 8b7b ldrh r3, [r7, #26] 80067bc: 429a cmp r2, r3 80067be: d306 bcc.n 80067ce { ep->xfer_len -= count; 80067c0: 68bb ldr r3, [r7, #8] 80067c2: 699a ldr r2, [r3, #24] 80067c4: 8b7b ldrh r3, [r7, #26] 80067c6: 1ad2 subs r2, r2, r3 80067c8: 68bb ldr r3, [r7, #8] 80067ca: 619a str r2, [r3, #24] 80067cc: e002 b.n 80067d4 } else { ep->xfer_len = 0U; 80067ce: 68bb ldr r3, [r7, #8] 80067d0: 2200 movs r2, #0 80067d2: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 80067d4: 68bb ldr r3, [r7, #8] 80067d6: 699b ldr r3, [r3, #24] 80067d8: 2b00 cmp r3, #0 80067da: d123 bne.n 8006824 { /* set NAK on the current endpoint */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 80067dc: 68fb ldr r3, [r7, #12] 80067de: 681b ldr r3, [r3, #0] 80067e0: 461a mov r2, r3 80067e2: 68bb ldr r3, [r7, #8] 80067e4: 781b ldrb r3, [r3, #0] 80067e6: 009b lsls r3, r3, #2 80067e8: 4413 add r3, r2 80067ea: 881b ldrh r3, [r3, #0] 80067ec: b29b uxth r3, r3 80067ee: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80067f2: f023 0370 bic.w r3, r3, #112 @ 0x70 80067f6: 83fb strh r3, [r7, #30] 80067f8: 8bfb ldrh r3, [r7, #30] 80067fa: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80067fe: 83fb strh r3, [r7, #30] 8006800: 68fb ldr r3, [r7, #12] 8006802: 681b ldr r3, [r3, #0] 8006804: 461a mov r2, r3 8006806: 68bb ldr r3, [r7, #8] 8006808: 781b ldrb r3, [r3, #0] 800680a: 009b lsls r3, r3, #2 800680c: 441a add r2, r3 800680e: 8bfb ldrh r3, [r7, #30] 8006810: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006814: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006818: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800681c: f043 0380 orr.w r3, r3, #128 @ 0x80 8006820: b29b uxth r3, r3 8006822: 8013 strh r3, [r2, #0] } /*Need to FreeUser Buffer*/ if ((wEPVal & USB_EP_DTOG_TX) == 0U) 8006824: 88fb ldrh r3, [r7, #6] 8006826: f003 0340 and.w r3, r3, #64 @ 0x40 800682a: 2b00 cmp r3, #0 800682c: d11f bne.n 800686e { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 800682e: 68fb ldr r3, [r7, #12] 8006830: 681b ldr r3, [r3, #0] 8006832: 461a mov r2, r3 8006834: 68bb ldr r3, [r7, #8] 8006836: 781b ldrb r3, [r3, #0] 8006838: 009b lsls r3, r3, #2 800683a: 4413 add r3, r2 800683c: 881b ldrh r3, [r3, #0] 800683e: b29b uxth r3, r3 8006840: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006844: f023 0370 bic.w r3, r3, #112 @ 0x70 8006848: 83bb strh r3, [r7, #28] 800684a: 68fb ldr r3, [r7, #12] 800684c: 681b ldr r3, [r3, #0] 800684e: 461a mov r2, r3 8006850: 68bb ldr r3, [r7, #8] 8006852: 781b ldrb r3, [r3, #0] 8006854: 009b lsls r3, r3, #2 8006856: 441a add r2, r3 8006858: 8bbb ldrh r3, [r7, #28] 800685a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800685e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006862: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006866: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800686a: b29b uxth r3, r3 800686c: 8013 strh r3, [r2, #0] } if (count != 0U) 800686e: 8b7b ldrh r3, [r7, #26] 8006870: 2b00 cmp r3, #0 8006872: d008 beq.n 8006886 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 8006874: 68fb ldr r3, [r7, #12] 8006876: 6818 ldr r0, [r3, #0] 8006878: 68bb ldr r3, [r7, #8] 800687a: 6959 ldr r1, [r3, #20] 800687c: 68bb ldr r3, [r7, #8] 800687e: 895a ldrh r2, [r3, #10] 8006880: 8b7b ldrh r3, [r7, #26] 8006882: f004 fce2 bl 800b24a } } return count; 8006886: 8b7b ldrh r3, [r7, #26] } 8006888: 4618 mov r0, r3 800688a: 3720 adds r7, #32 800688c: 46bd mov sp, r7 800688e: bd80 pop {r7, pc} 08006890 : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 8006890: b580 push {r7, lr} 8006892: b0a4 sub sp, #144 @ 0x90 8006894: af00 add r7, sp, #0 8006896: 60f8 str r0, [r7, #12] 8006898: 60b9 str r1, [r7, #8] 800689a: 4613 mov r3, r2 800689c: 80fb strh r3, [r7, #6] uint32_t len; uint16_t TxPctSize; /* Data Buffer0 ACK received */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 800689e: 88fb ldrh r3, [r7, #6] 80068a0: f003 0340 and.w r3, r3, #64 @ 0x40 80068a4: 2b00 cmp r3, #0 80068a6: f000 81dd beq.w 8006c64 { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 80068aa: 68fb ldr r3, [r7, #12] 80068ac: 681b ldr r3, [r3, #0] 80068ae: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80068b2: b29b uxth r3, r3 80068b4: 461a mov r2, r3 80068b6: 68bb ldr r3, [r7, #8] 80068b8: 781b ldrb r3, [r3, #0] 80068ba: 00db lsls r3, r3, #3 80068bc: 4413 add r3, r2 80068be: 3302 adds r3, #2 80068c0: 005b lsls r3, r3, #1 80068c2: 68fa ldr r2, [r7, #12] 80068c4: 6812 ldr r2, [r2, #0] 80068c6: 4413 add r3, r2 80068c8: f503 6380 add.w r3, r3, #1024 @ 0x400 80068cc: 881b ldrh r3, [r3, #0] 80068ce: f3c3 0309 ubfx r3, r3, #0, #10 80068d2: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len > TxPctSize) 80068d6: 68bb ldr r3, [r7, #8] 80068d8: 699a ldr r2, [r3, #24] 80068da: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80068de: 429a cmp r2, r3 80068e0: d907 bls.n 80068f2 { ep->xfer_len -= TxPctSize; 80068e2: 68bb ldr r3, [r7, #8] 80068e4: 699a ldr r2, [r3, #24] 80068e6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80068ea: 1ad2 subs r2, r2, r3 80068ec: 68bb ldr r3, [r7, #8] 80068ee: 619a str r2, [r3, #24] 80068f0: e002 b.n 80068f8 } else { ep->xfer_len = 0U; 80068f2: 68bb ldr r3, [r7, #8] 80068f4: 2200 movs r2, #0 80068f6: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 80068f8: 68bb ldr r3, [r7, #8] 80068fa: 699b ldr r3, [r3, #24] 80068fc: 2b00 cmp r3, #0 80068fe: f040 80b9 bne.w 8006a74 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8006902: 68bb ldr r3, [r7, #8] 8006904: 785b ldrb r3, [r3, #1] 8006906: 2b00 cmp r3, #0 8006908: d126 bne.n 8006958 800690a: 68fb ldr r3, [r7, #12] 800690c: 681b ldr r3, [r3, #0] 800690e: 62fb str r3, [r7, #44] @ 0x2c 8006910: 68fb ldr r3, [r7, #12] 8006912: 681b ldr r3, [r3, #0] 8006914: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006918: b29b uxth r3, r3 800691a: 461a mov r2, r3 800691c: 6afb ldr r3, [r7, #44] @ 0x2c 800691e: 4413 add r3, r2 8006920: 62fb str r3, [r7, #44] @ 0x2c 8006922: 68bb ldr r3, [r7, #8] 8006924: 781b ldrb r3, [r3, #0] 8006926: 011a lsls r2, r3, #4 8006928: 6afb ldr r3, [r7, #44] @ 0x2c 800692a: 4413 add r3, r2 800692c: f203 4304 addw r3, r3, #1028 @ 0x404 8006930: 62bb str r3, [r7, #40] @ 0x28 8006932: 6abb ldr r3, [r7, #40] @ 0x28 8006934: 881b ldrh r3, [r3, #0] 8006936: b29b uxth r3, r3 8006938: f3c3 0309 ubfx r3, r3, #0, #10 800693c: b29a uxth r2, r3 800693e: 6abb ldr r3, [r7, #40] @ 0x28 8006940: 801a strh r2, [r3, #0] 8006942: 6abb ldr r3, [r7, #40] @ 0x28 8006944: 881b ldrh r3, [r3, #0] 8006946: b29b uxth r3, r3 8006948: ea6f 4343 mvn.w r3, r3, lsl #17 800694c: ea6f 4353 mvn.w r3, r3, lsr #17 8006950: b29a uxth r2, r3 8006952: 6abb ldr r3, [r7, #40] @ 0x28 8006954: 801a strh r2, [r3, #0] 8006956: e01a b.n 800698e 8006958: 68bb ldr r3, [r7, #8] 800695a: 785b ldrb r3, [r3, #1] 800695c: 2b01 cmp r3, #1 800695e: d116 bne.n 800698e 8006960: 68fb ldr r3, [r7, #12] 8006962: 681b ldr r3, [r3, #0] 8006964: 637b str r3, [r7, #52] @ 0x34 8006966: 68fb ldr r3, [r7, #12] 8006968: 681b ldr r3, [r3, #0] 800696a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800696e: b29b uxth r3, r3 8006970: 461a mov r2, r3 8006972: 6b7b ldr r3, [r7, #52] @ 0x34 8006974: 4413 add r3, r2 8006976: 637b str r3, [r7, #52] @ 0x34 8006978: 68bb ldr r3, [r7, #8] 800697a: 781b ldrb r3, [r3, #0] 800697c: 011a lsls r2, r3, #4 800697e: 6b7b ldr r3, [r7, #52] @ 0x34 8006980: 4413 add r3, r2 8006982: f203 4304 addw r3, r3, #1028 @ 0x404 8006986: 633b str r3, [r7, #48] @ 0x30 8006988: 6b3b ldr r3, [r7, #48] @ 0x30 800698a: 2200 movs r2, #0 800698c: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 800698e: 68fb ldr r3, [r7, #12] 8006990: 681b ldr r3, [r3, #0] 8006992: 627b str r3, [r7, #36] @ 0x24 8006994: 68bb ldr r3, [r7, #8] 8006996: 785b ldrb r3, [r3, #1] 8006998: 2b00 cmp r3, #0 800699a: d126 bne.n 80069ea 800699c: 68fb ldr r3, [r7, #12] 800699e: 681b ldr r3, [r3, #0] 80069a0: 61fb str r3, [r7, #28] 80069a2: 68fb ldr r3, [r7, #12] 80069a4: 681b ldr r3, [r3, #0] 80069a6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80069aa: b29b uxth r3, r3 80069ac: 461a mov r2, r3 80069ae: 69fb ldr r3, [r7, #28] 80069b0: 4413 add r3, r2 80069b2: 61fb str r3, [r7, #28] 80069b4: 68bb ldr r3, [r7, #8] 80069b6: 781b ldrb r3, [r3, #0] 80069b8: 011a lsls r2, r3, #4 80069ba: 69fb ldr r3, [r7, #28] 80069bc: 4413 add r3, r2 80069be: f203 430c addw r3, r3, #1036 @ 0x40c 80069c2: 61bb str r3, [r7, #24] 80069c4: 69bb ldr r3, [r7, #24] 80069c6: 881b ldrh r3, [r3, #0] 80069c8: b29b uxth r3, r3 80069ca: f3c3 0309 ubfx r3, r3, #0, #10 80069ce: b29a uxth r2, r3 80069d0: 69bb ldr r3, [r7, #24] 80069d2: 801a strh r2, [r3, #0] 80069d4: 69bb ldr r3, [r7, #24] 80069d6: 881b ldrh r3, [r3, #0] 80069d8: b29b uxth r3, r3 80069da: ea6f 4343 mvn.w r3, r3, lsl #17 80069de: ea6f 4353 mvn.w r3, r3, lsr #17 80069e2: b29a uxth r2, r3 80069e4: 69bb ldr r3, [r7, #24] 80069e6: 801a strh r2, [r3, #0] 80069e8: e017 b.n 8006a1a 80069ea: 68bb ldr r3, [r7, #8] 80069ec: 785b ldrb r3, [r3, #1] 80069ee: 2b01 cmp r3, #1 80069f0: d113 bne.n 8006a1a 80069f2: 68fb ldr r3, [r7, #12] 80069f4: 681b ldr r3, [r3, #0] 80069f6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80069fa: b29b uxth r3, r3 80069fc: 461a mov r2, r3 80069fe: 6a7b ldr r3, [r7, #36] @ 0x24 8006a00: 4413 add r3, r2 8006a02: 627b str r3, [r7, #36] @ 0x24 8006a04: 68bb ldr r3, [r7, #8] 8006a06: 781b ldrb r3, [r3, #0] 8006a08: 011a lsls r2, r3, #4 8006a0a: 6a7b ldr r3, [r7, #36] @ 0x24 8006a0c: 4413 add r3, r2 8006a0e: f203 430c addw r3, r3, #1036 @ 0x40c 8006a12: 623b str r3, [r7, #32] 8006a14: 6a3b ldr r3, [r7, #32] 8006a16: 2200 movs r2, #0 8006a18: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8006a1a: 68bb ldr r3, [r7, #8] 8006a1c: 781b ldrb r3, [r3, #0] 8006a1e: 4619 mov r1, r3 8006a20: 68f8 ldr r0, [r7, #12] 8006a22: f006 fa90 bl 800cf46 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8006a26: 88fb ldrh r3, [r7, #6] 8006a28: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006a2c: 2b00 cmp r3, #0 8006a2e: f000 82fc beq.w 800702a { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8006a32: 68fb ldr r3, [r7, #12] 8006a34: 681b ldr r3, [r3, #0] 8006a36: 461a mov r2, r3 8006a38: 68bb ldr r3, [r7, #8] 8006a3a: 781b ldrb r3, [r3, #0] 8006a3c: 009b lsls r3, r3, #2 8006a3e: 4413 add r3, r2 8006a40: 881b ldrh r3, [r3, #0] 8006a42: b29b uxth r3, r3 8006a44: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006a48: f023 0370 bic.w r3, r3, #112 @ 0x70 8006a4c: 82fb strh r3, [r7, #22] 8006a4e: 68fb ldr r3, [r7, #12] 8006a50: 681b ldr r3, [r3, #0] 8006a52: 461a mov r2, r3 8006a54: 68bb ldr r3, [r7, #8] 8006a56: 781b ldrb r3, [r3, #0] 8006a58: 009b lsls r3, r3, #2 8006a5a: 441a add r2, r3 8006a5c: 8afb ldrh r3, [r7, #22] 8006a5e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006a62: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006a66: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006a6a: f043 0380 orr.w r3, r3, #128 @ 0x80 8006a6e: b29b uxth r3, r3 8006a70: 8013 strh r3, [r2, #0] 8006a72: e2da b.n 800702a } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8006a74: 88fb ldrh r3, [r7, #6] 8006a76: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006a7a: 2b00 cmp r3, #0 8006a7c: d021 beq.n 8006ac2 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8006a7e: 68fb ldr r3, [r7, #12] 8006a80: 681b ldr r3, [r3, #0] 8006a82: 461a mov r2, r3 8006a84: 68bb ldr r3, [r7, #8] 8006a86: 781b ldrb r3, [r3, #0] 8006a88: 009b lsls r3, r3, #2 8006a8a: 4413 add r3, r2 8006a8c: 881b ldrh r3, [r3, #0] 8006a8e: b29b uxth r3, r3 8006a90: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006a94: f023 0370 bic.w r3, r3, #112 @ 0x70 8006a98: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8006a9c: 68fb ldr r3, [r7, #12] 8006a9e: 681b ldr r3, [r3, #0] 8006aa0: 461a mov r2, r3 8006aa2: 68bb ldr r3, [r7, #8] 8006aa4: 781b ldrb r3, [r3, #0] 8006aa6: 009b lsls r3, r3, #2 8006aa8: 441a add r2, r3 8006aaa: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8006aae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006ab2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006ab6: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006aba: f043 0380 orr.w r3, r3, #128 @ 0x80 8006abe: b29b uxth r3, r3 8006ac0: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 8006ac2: 68bb ldr r3, [r7, #8] 8006ac4: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8006ac8: 2b01 cmp r3, #1 8006aca: f040 82ae bne.w 800702a { ep->xfer_buff += TxPctSize; 8006ace: 68bb ldr r3, [r7, #8] 8006ad0: 695a ldr r2, [r3, #20] 8006ad2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006ad6: 441a add r2, r3 8006ad8: 68bb ldr r3, [r7, #8] 8006ada: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8006adc: 68bb ldr r3, [r7, #8] 8006ade: 69da ldr r2, [r3, #28] 8006ae0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006ae4: 441a add r2, r3 8006ae6: 68bb ldr r3, [r7, #8] 8006ae8: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8006aea: 68bb ldr r3, [r7, #8] 8006aec: 6a1a ldr r2, [r3, #32] 8006aee: 68bb ldr r3, [r7, #8] 8006af0: 691b ldr r3, [r3, #16] 8006af2: 429a cmp r2, r3 8006af4: d30b bcc.n 8006b0e { len = ep->maxpacket; 8006af6: 68bb ldr r3, [r7, #8] 8006af8: 691b ldr r3, [r3, #16] 8006afa: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 8006afe: 68bb ldr r3, [r7, #8] 8006b00: 6a1a ldr r2, [r3, #32] 8006b02: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006b06: 1ad2 subs r2, r2, r3 8006b08: 68bb ldr r3, [r7, #8] 8006b0a: 621a str r2, [r3, #32] 8006b0c: e017 b.n 8006b3e } else if (ep->xfer_len_db == 0U) 8006b0e: 68bb ldr r3, [r7, #8] 8006b10: 6a1b ldr r3, [r3, #32] 8006b12: 2b00 cmp r3, #0 8006b14: d108 bne.n 8006b28 { len = TxPctSize; 8006b16: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006b1a: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 8006b1e: 68bb ldr r3, [r7, #8] 8006b20: 2200 movs r2, #0 8006b22: f883 2024 strb.w r2, [r3, #36] @ 0x24 8006b26: e00a b.n 8006b3e } else { ep->xfer_fill_db = 0U; 8006b28: 68bb ldr r3, [r7, #8] 8006b2a: 2200 movs r2, #0 8006b2c: f883 2024 strb.w r2, [r3, #36] @ 0x24 len = ep->xfer_len_db; 8006b30: 68bb ldr r3, [r7, #8] 8006b32: 6a1b ldr r3, [r3, #32] 8006b34: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8006b38: 68bb ldr r3, [r7, #8] 8006b3a: 2200 movs r2, #0 8006b3c: 621a str r2, [r3, #32] } /* Write remaining Data to Buffer */ /* Set the Double buffer counter for pma buffer1 */ PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len); 8006b3e: 68bb ldr r3, [r7, #8] 8006b40: 785b ldrb r3, [r3, #1] 8006b42: 2b00 cmp r3, #0 8006b44: d165 bne.n 8006c12 8006b46: 68fb ldr r3, [r7, #12] 8006b48: 681b ldr r3, [r3, #0] 8006b4a: 63fb str r3, [r7, #60] @ 0x3c 8006b4c: 68fb ldr r3, [r7, #12] 8006b4e: 681b ldr r3, [r3, #0] 8006b50: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006b54: b29b uxth r3, r3 8006b56: 461a mov r2, r3 8006b58: 6bfb ldr r3, [r7, #60] @ 0x3c 8006b5a: 4413 add r3, r2 8006b5c: 63fb str r3, [r7, #60] @ 0x3c 8006b5e: 68bb ldr r3, [r7, #8] 8006b60: 781b ldrb r3, [r3, #0] 8006b62: 011a lsls r2, r3, #4 8006b64: 6bfb ldr r3, [r7, #60] @ 0x3c 8006b66: 4413 add r3, r2 8006b68: f203 4304 addw r3, r3, #1028 @ 0x404 8006b6c: 63bb str r3, [r7, #56] @ 0x38 8006b6e: 6bbb ldr r3, [r7, #56] @ 0x38 8006b70: 881b ldrh r3, [r3, #0] 8006b72: b29b uxth r3, r3 8006b74: f3c3 0309 ubfx r3, r3, #0, #10 8006b78: b29a uxth r2, r3 8006b7a: 6bbb ldr r3, [r7, #56] @ 0x38 8006b7c: 801a strh r2, [r3, #0] 8006b7e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006b82: 2b3e cmp r3, #62 @ 0x3e 8006b84: d91d bls.n 8006bc2 8006b86: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006b8a: 095b lsrs r3, r3, #5 8006b8c: 64bb str r3, [r7, #72] @ 0x48 8006b8e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006b92: f003 031f and.w r3, r3, #31 8006b96: 2b00 cmp r3, #0 8006b98: d102 bne.n 8006ba0 8006b9a: 6cbb ldr r3, [r7, #72] @ 0x48 8006b9c: 3b01 subs r3, #1 8006b9e: 64bb str r3, [r7, #72] @ 0x48 8006ba0: 6bbb ldr r3, [r7, #56] @ 0x38 8006ba2: 881b ldrh r3, [r3, #0] 8006ba4: b29a uxth r2, r3 8006ba6: 6cbb ldr r3, [r7, #72] @ 0x48 8006ba8: b29b uxth r3, r3 8006baa: 029b lsls r3, r3, #10 8006bac: b29b uxth r3, r3 8006bae: 4313 orrs r3, r2 8006bb0: b29b uxth r3, r3 8006bb2: ea6f 4343 mvn.w r3, r3, lsl #17 8006bb6: ea6f 4353 mvn.w r3, r3, lsr #17 8006bba: b29a uxth r2, r3 8006bbc: 6bbb ldr r3, [r7, #56] @ 0x38 8006bbe: 801a strh r2, [r3, #0] 8006bc0: e044 b.n 8006c4c 8006bc2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006bc6: 2b00 cmp r3, #0 8006bc8: d10a bne.n 8006be0 8006bca: 6bbb ldr r3, [r7, #56] @ 0x38 8006bcc: 881b ldrh r3, [r3, #0] 8006bce: b29b uxth r3, r3 8006bd0: ea6f 4343 mvn.w r3, r3, lsl #17 8006bd4: ea6f 4353 mvn.w r3, r3, lsr #17 8006bd8: b29a uxth r2, r3 8006bda: 6bbb ldr r3, [r7, #56] @ 0x38 8006bdc: 801a strh r2, [r3, #0] 8006bde: e035 b.n 8006c4c 8006be0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006be4: 085b lsrs r3, r3, #1 8006be6: 64bb str r3, [r7, #72] @ 0x48 8006be8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006bec: f003 0301 and.w r3, r3, #1 8006bf0: 2b00 cmp r3, #0 8006bf2: d002 beq.n 8006bfa 8006bf4: 6cbb ldr r3, [r7, #72] @ 0x48 8006bf6: 3301 adds r3, #1 8006bf8: 64bb str r3, [r7, #72] @ 0x48 8006bfa: 6bbb ldr r3, [r7, #56] @ 0x38 8006bfc: 881b ldrh r3, [r3, #0] 8006bfe: b29a uxth r2, r3 8006c00: 6cbb ldr r3, [r7, #72] @ 0x48 8006c02: b29b uxth r3, r3 8006c04: 029b lsls r3, r3, #10 8006c06: b29b uxth r3, r3 8006c08: 4313 orrs r3, r2 8006c0a: b29a uxth r2, r3 8006c0c: 6bbb ldr r3, [r7, #56] @ 0x38 8006c0e: 801a strh r2, [r3, #0] 8006c10: e01c b.n 8006c4c 8006c12: 68bb ldr r3, [r7, #8] 8006c14: 785b ldrb r3, [r3, #1] 8006c16: 2b01 cmp r3, #1 8006c18: d118 bne.n 8006c4c 8006c1a: 68fb ldr r3, [r7, #12] 8006c1c: 681b ldr r3, [r3, #0] 8006c1e: 647b str r3, [r7, #68] @ 0x44 8006c20: 68fb ldr r3, [r7, #12] 8006c22: 681b ldr r3, [r3, #0] 8006c24: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006c28: b29b uxth r3, r3 8006c2a: 461a mov r2, r3 8006c2c: 6c7b ldr r3, [r7, #68] @ 0x44 8006c2e: 4413 add r3, r2 8006c30: 647b str r3, [r7, #68] @ 0x44 8006c32: 68bb ldr r3, [r7, #8] 8006c34: 781b ldrb r3, [r3, #0] 8006c36: 011a lsls r2, r3, #4 8006c38: 6c7b ldr r3, [r7, #68] @ 0x44 8006c3a: 4413 add r3, r2 8006c3c: f203 4304 addw r3, r3, #1028 @ 0x404 8006c40: 643b str r3, [r7, #64] @ 0x40 8006c42: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006c46: b29a uxth r2, r3 8006c48: 6c3b ldr r3, [r7, #64] @ 0x40 8006c4a: 801a strh r2, [r3, #0] /* Copy user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len); 8006c4c: 68fb ldr r3, [r7, #12] 8006c4e: 6818 ldr r0, [r3, #0] 8006c50: 68bb ldr r3, [r7, #8] 8006c52: 6959 ldr r1, [r3, #20] 8006c54: 68bb ldr r3, [r7, #8] 8006c56: 891a ldrh r2, [r3, #8] 8006c58: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006c5c: b29b uxth r3, r3 8006c5e: f004 faae bl 800b1be 8006c62: e1e2 b.n 800702a } } else /* Data Buffer1 ACK received */ { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8006c64: 68fb ldr r3, [r7, #12] 8006c66: 681b ldr r3, [r3, #0] 8006c68: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006c6c: b29b uxth r3, r3 8006c6e: 461a mov r2, r3 8006c70: 68bb ldr r3, [r7, #8] 8006c72: 781b ldrb r3, [r3, #0] 8006c74: 00db lsls r3, r3, #3 8006c76: 4413 add r3, r2 8006c78: 3306 adds r3, #6 8006c7a: 005b lsls r3, r3, #1 8006c7c: 68fa ldr r2, [r7, #12] 8006c7e: 6812 ldr r2, [r2, #0] 8006c80: 4413 add r3, r2 8006c82: f503 6380 add.w r3, r3, #1024 @ 0x400 8006c86: 881b ldrh r3, [r3, #0] 8006c88: f3c3 0309 ubfx r3, r3, #0, #10 8006c8c: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len >= TxPctSize) 8006c90: 68bb ldr r3, [r7, #8] 8006c92: 699a ldr r2, [r3, #24] 8006c94: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006c98: 429a cmp r2, r3 8006c9a: d307 bcc.n 8006cac { ep->xfer_len -= TxPctSize; 8006c9c: 68bb ldr r3, [r7, #8] 8006c9e: 699a ldr r2, [r3, #24] 8006ca0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006ca4: 1ad2 subs r2, r2, r3 8006ca6: 68bb ldr r3, [r7, #8] 8006ca8: 619a str r2, [r3, #24] 8006caa: e002 b.n 8006cb2 } else { ep->xfer_len = 0U; 8006cac: 68bb ldr r3, [r7, #8] 8006cae: 2200 movs r2, #0 8006cb0: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 8006cb2: 68bb ldr r3, [r7, #8] 8006cb4: 699b ldr r3, [r3, #24] 8006cb6: 2b00 cmp r3, #0 8006cb8: f040 80c0 bne.w 8006e3c { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8006cbc: 68bb ldr r3, [r7, #8] 8006cbe: 785b ldrb r3, [r3, #1] 8006cc0: 2b00 cmp r3, #0 8006cc2: d126 bne.n 8006d12 8006cc4: 68fb ldr r3, [r7, #12] 8006cc6: 681b ldr r3, [r3, #0] 8006cc8: 67fb str r3, [r7, #124] @ 0x7c 8006cca: 68fb ldr r3, [r7, #12] 8006ccc: 681b ldr r3, [r3, #0] 8006cce: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006cd2: b29b uxth r3, r3 8006cd4: 461a mov r2, r3 8006cd6: 6ffb ldr r3, [r7, #124] @ 0x7c 8006cd8: 4413 add r3, r2 8006cda: 67fb str r3, [r7, #124] @ 0x7c 8006cdc: 68bb ldr r3, [r7, #8] 8006cde: 781b ldrb r3, [r3, #0] 8006ce0: 011a lsls r2, r3, #4 8006ce2: 6ffb ldr r3, [r7, #124] @ 0x7c 8006ce4: 4413 add r3, r2 8006ce6: f203 4304 addw r3, r3, #1028 @ 0x404 8006cea: 67bb str r3, [r7, #120] @ 0x78 8006cec: 6fbb ldr r3, [r7, #120] @ 0x78 8006cee: 881b ldrh r3, [r3, #0] 8006cf0: b29b uxth r3, r3 8006cf2: f3c3 0309 ubfx r3, r3, #0, #10 8006cf6: b29a uxth r2, r3 8006cf8: 6fbb ldr r3, [r7, #120] @ 0x78 8006cfa: 801a strh r2, [r3, #0] 8006cfc: 6fbb ldr r3, [r7, #120] @ 0x78 8006cfe: 881b ldrh r3, [r3, #0] 8006d00: b29b uxth r3, r3 8006d02: ea6f 4343 mvn.w r3, r3, lsl #17 8006d06: ea6f 4353 mvn.w r3, r3, lsr #17 8006d0a: b29a uxth r2, r3 8006d0c: 6fbb ldr r3, [r7, #120] @ 0x78 8006d0e: 801a strh r2, [r3, #0] 8006d10: e01a b.n 8006d48 8006d12: 68bb ldr r3, [r7, #8] 8006d14: 785b ldrb r3, [r3, #1] 8006d16: 2b01 cmp r3, #1 8006d18: d116 bne.n 8006d48 8006d1a: 68fb ldr r3, [r7, #12] 8006d1c: 681b ldr r3, [r3, #0] 8006d1e: 667b str r3, [r7, #100] @ 0x64 8006d20: 68fb ldr r3, [r7, #12] 8006d22: 681b ldr r3, [r3, #0] 8006d24: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006d28: b29b uxth r3, r3 8006d2a: 461a mov r2, r3 8006d2c: 6e7b ldr r3, [r7, #100] @ 0x64 8006d2e: 4413 add r3, r2 8006d30: 667b str r3, [r7, #100] @ 0x64 8006d32: 68bb ldr r3, [r7, #8] 8006d34: 781b ldrb r3, [r3, #0] 8006d36: 011a lsls r2, r3, #4 8006d38: 6e7b ldr r3, [r7, #100] @ 0x64 8006d3a: 4413 add r3, r2 8006d3c: f203 4304 addw r3, r3, #1028 @ 0x404 8006d40: 663b str r3, [r7, #96] @ 0x60 8006d42: 6e3b ldr r3, [r7, #96] @ 0x60 8006d44: 2200 movs r2, #0 8006d46: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8006d48: 68fb ldr r3, [r7, #12] 8006d4a: 681b ldr r3, [r3, #0] 8006d4c: 677b str r3, [r7, #116] @ 0x74 8006d4e: 68bb ldr r3, [r7, #8] 8006d50: 785b ldrb r3, [r3, #1] 8006d52: 2b00 cmp r3, #0 8006d54: d12b bne.n 8006dae 8006d56: 68fb ldr r3, [r7, #12] 8006d58: 681b ldr r3, [r3, #0] 8006d5a: 66fb str r3, [r7, #108] @ 0x6c 8006d5c: 68fb ldr r3, [r7, #12] 8006d5e: 681b ldr r3, [r3, #0] 8006d60: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006d64: b29b uxth r3, r3 8006d66: 461a mov r2, r3 8006d68: 6efb ldr r3, [r7, #108] @ 0x6c 8006d6a: 4413 add r3, r2 8006d6c: 66fb str r3, [r7, #108] @ 0x6c 8006d6e: 68bb ldr r3, [r7, #8] 8006d70: 781b ldrb r3, [r3, #0] 8006d72: 011a lsls r2, r3, #4 8006d74: 6efb ldr r3, [r7, #108] @ 0x6c 8006d76: 4413 add r3, r2 8006d78: f203 430c addw r3, r3, #1036 @ 0x40c 8006d7c: f8c7 3080 str.w r3, [r7, #128] @ 0x80 8006d80: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8006d84: 881b ldrh r3, [r3, #0] 8006d86: b29b uxth r3, r3 8006d88: f3c3 0309 ubfx r3, r3, #0, #10 8006d8c: b29a uxth r2, r3 8006d8e: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8006d92: 801a strh r2, [r3, #0] 8006d94: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8006d98: 881b ldrh r3, [r3, #0] 8006d9a: b29b uxth r3, r3 8006d9c: ea6f 4343 mvn.w r3, r3, lsl #17 8006da0: ea6f 4353 mvn.w r3, r3, lsr #17 8006da4: b29a uxth r2, r3 8006da6: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8006daa: 801a strh r2, [r3, #0] 8006dac: e017 b.n 8006dde 8006dae: 68bb ldr r3, [r7, #8] 8006db0: 785b ldrb r3, [r3, #1] 8006db2: 2b01 cmp r3, #1 8006db4: d113 bne.n 8006dde 8006db6: 68fb ldr r3, [r7, #12] 8006db8: 681b ldr r3, [r3, #0] 8006dba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006dbe: b29b uxth r3, r3 8006dc0: 461a mov r2, r3 8006dc2: 6f7b ldr r3, [r7, #116] @ 0x74 8006dc4: 4413 add r3, r2 8006dc6: 677b str r3, [r7, #116] @ 0x74 8006dc8: 68bb ldr r3, [r7, #8] 8006dca: 781b ldrb r3, [r3, #0] 8006dcc: 011a lsls r2, r3, #4 8006dce: 6f7b ldr r3, [r7, #116] @ 0x74 8006dd0: 4413 add r3, r2 8006dd2: f203 430c addw r3, r3, #1036 @ 0x40c 8006dd6: 673b str r3, [r7, #112] @ 0x70 8006dd8: 6f3b ldr r3, [r7, #112] @ 0x70 8006dda: 2200 movs r2, #0 8006ddc: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8006dde: 68bb ldr r3, [r7, #8] 8006de0: 781b ldrb r3, [r3, #0] 8006de2: 4619 mov r1, r3 8006de4: 68f8 ldr r0, [r7, #12] 8006de6: f006 f8ae bl 800cf46 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8006dea: 88fb ldrh r3, [r7, #6] 8006dec: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006df0: 2b00 cmp r3, #0 8006df2: f040 811a bne.w 800702a { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8006df6: 68fb ldr r3, [r7, #12] 8006df8: 681b ldr r3, [r3, #0] 8006dfa: 461a mov r2, r3 8006dfc: 68bb ldr r3, [r7, #8] 8006dfe: 781b ldrb r3, [r3, #0] 8006e00: 009b lsls r3, r3, #2 8006e02: 4413 add r3, r2 8006e04: 881b ldrh r3, [r3, #0] 8006e06: b29b uxth r3, r3 8006e08: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006e0c: f023 0370 bic.w r3, r3, #112 @ 0x70 8006e10: f8a7 3088 strh.w r3, [r7, #136] @ 0x88 8006e14: 68fb ldr r3, [r7, #12] 8006e16: 681b ldr r3, [r3, #0] 8006e18: 461a mov r2, r3 8006e1a: 68bb ldr r3, [r7, #8] 8006e1c: 781b ldrb r3, [r3, #0] 8006e1e: 009b lsls r3, r3, #2 8006e20: 441a add r2, r3 8006e22: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88 8006e26: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006e2a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006e2e: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006e32: f043 0380 orr.w r3, r3, #128 @ 0x80 8006e36: b29b uxth r3, r3 8006e38: 8013 strh r3, [r2, #0] 8006e3a: e0f6 b.n 800702a } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8006e3c: 88fb ldrh r3, [r7, #6] 8006e3e: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006e42: 2b00 cmp r3, #0 8006e44: d121 bne.n 8006e8a { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8006e46: 68fb ldr r3, [r7, #12] 8006e48: 681b ldr r3, [r3, #0] 8006e4a: 461a mov r2, r3 8006e4c: 68bb ldr r3, [r7, #8] 8006e4e: 781b ldrb r3, [r3, #0] 8006e50: 009b lsls r3, r3, #2 8006e52: 4413 add r3, r2 8006e54: 881b ldrh r3, [r3, #0] 8006e56: b29b uxth r3, r3 8006e58: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006e5c: f023 0370 bic.w r3, r3, #112 @ 0x70 8006e60: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 8006e64: 68fb ldr r3, [r7, #12] 8006e66: 681b ldr r3, [r3, #0] 8006e68: 461a mov r2, r3 8006e6a: 68bb ldr r3, [r7, #8] 8006e6c: 781b ldrb r3, [r3, #0] 8006e6e: 009b lsls r3, r3, #2 8006e70: 441a add r2, r3 8006e72: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8006e76: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006e7a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006e7e: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006e82: f043 0380 orr.w r3, r3, #128 @ 0x80 8006e86: b29b uxth r3, r3 8006e88: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 8006e8a: 68bb ldr r3, [r7, #8] 8006e8c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8006e90: 2b01 cmp r3, #1 8006e92: f040 80ca bne.w 800702a { ep->xfer_buff += TxPctSize; 8006e96: 68bb ldr r3, [r7, #8] 8006e98: 695a ldr r2, [r3, #20] 8006e9a: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006e9e: 441a add r2, r3 8006ea0: 68bb ldr r3, [r7, #8] 8006ea2: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8006ea4: 68bb ldr r3, [r7, #8] 8006ea6: 69da ldr r2, [r3, #28] 8006ea8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006eac: 441a add r2, r3 8006eae: 68bb ldr r3, [r7, #8] 8006eb0: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8006eb2: 68bb ldr r3, [r7, #8] 8006eb4: 6a1a ldr r2, [r3, #32] 8006eb6: 68bb ldr r3, [r7, #8] 8006eb8: 691b ldr r3, [r3, #16] 8006eba: 429a cmp r2, r3 8006ebc: d30b bcc.n 8006ed6 { len = ep->maxpacket; 8006ebe: 68bb ldr r3, [r7, #8] 8006ec0: 691b ldr r3, [r3, #16] 8006ec2: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 8006ec6: 68bb ldr r3, [r7, #8] 8006ec8: 6a1a ldr r2, [r3, #32] 8006eca: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006ece: 1ad2 subs r2, r2, r3 8006ed0: 68bb ldr r3, [r7, #8] 8006ed2: 621a str r2, [r3, #32] 8006ed4: e017 b.n 8006f06 } else if (ep->xfer_len_db == 0U) 8006ed6: 68bb ldr r3, [r7, #8] 8006ed8: 6a1b ldr r3, [r3, #32] 8006eda: 2b00 cmp r3, #0 8006edc: d108 bne.n 8006ef0 { len = TxPctSize; 8006ede: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006ee2: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 8006ee6: 68bb ldr r3, [r7, #8] 8006ee8: 2200 movs r2, #0 8006eea: f883 2024 strb.w r2, [r3, #36] @ 0x24 8006eee: e00a b.n 8006f06 } else { len = ep->xfer_len_db; 8006ef0: 68bb ldr r3, [r7, #8] 8006ef2: 6a1b ldr r3, [r3, #32] 8006ef4: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8006ef8: 68bb ldr r3, [r7, #8] 8006efa: 2200 movs r2, #0 8006efc: 621a str r2, [r3, #32] ep->xfer_fill_db = 0; 8006efe: 68bb ldr r3, [r7, #8] 8006f00: 2200 movs r2, #0 8006f02: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len); 8006f06: 68fb ldr r3, [r7, #12] 8006f08: 681b ldr r3, [r3, #0] 8006f0a: 657b str r3, [r7, #84] @ 0x54 8006f0c: 68bb ldr r3, [r7, #8] 8006f0e: 785b ldrb r3, [r3, #1] 8006f10: 2b00 cmp r3, #0 8006f12: d165 bne.n 8006fe0 8006f14: 68fb ldr r3, [r7, #12] 8006f16: 681b ldr r3, [r3, #0] 8006f18: 65fb str r3, [r7, #92] @ 0x5c 8006f1a: 68fb ldr r3, [r7, #12] 8006f1c: 681b ldr r3, [r3, #0] 8006f1e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006f22: b29b uxth r3, r3 8006f24: 461a mov r2, r3 8006f26: 6dfb ldr r3, [r7, #92] @ 0x5c 8006f28: 4413 add r3, r2 8006f2a: 65fb str r3, [r7, #92] @ 0x5c 8006f2c: 68bb ldr r3, [r7, #8] 8006f2e: 781b ldrb r3, [r3, #0] 8006f30: 011a lsls r2, r3, #4 8006f32: 6dfb ldr r3, [r7, #92] @ 0x5c 8006f34: 4413 add r3, r2 8006f36: f203 430c addw r3, r3, #1036 @ 0x40c 8006f3a: 65bb str r3, [r7, #88] @ 0x58 8006f3c: 6dbb ldr r3, [r7, #88] @ 0x58 8006f3e: 881b ldrh r3, [r3, #0] 8006f40: b29b uxth r3, r3 8006f42: f3c3 0309 ubfx r3, r3, #0, #10 8006f46: b29a uxth r2, r3 8006f48: 6dbb ldr r3, [r7, #88] @ 0x58 8006f4a: 801a strh r2, [r3, #0] 8006f4c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006f50: 2b3e cmp r3, #62 @ 0x3e 8006f52: d91d bls.n 8006f90 8006f54: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006f58: 095b lsrs r3, r3, #5 8006f5a: 66bb str r3, [r7, #104] @ 0x68 8006f5c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006f60: f003 031f and.w r3, r3, #31 8006f64: 2b00 cmp r3, #0 8006f66: d102 bne.n 8006f6e 8006f68: 6ebb ldr r3, [r7, #104] @ 0x68 8006f6a: 3b01 subs r3, #1 8006f6c: 66bb str r3, [r7, #104] @ 0x68 8006f6e: 6dbb ldr r3, [r7, #88] @ 0x58 8006f70: 881b ldrh r3, [r3, #0] 8006f72: b29a uxth r2, r3 8006f74: 6ebb ldr r3, [r7, #104] @ 0x68 8006f76: b29b uxth r3, r3 8006f78: 029b lsls r3, r3, #10 8006f7a: b29b uxth r3, r3 8006f7c: 4313 orrs r3, r2 8006f7e: b29b uxth r3, r3 8006f80: ea6f 4343 mvn.w r3, r3, lsl #17 8006f84: ea6f 4353 mvn.w r3, r3, lsr #17 8006f88: b29a uxth r2, r3 8006f8a: 6dbb ldr r3, [r7, #88] @ 0x58 8006f8c: 801a strh r2, [r3, #0] 8006f8e: e041 b.n 8007014 8006f90: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006f94: 2b00 cmp r3, #0 8006f96: d10a bne.n 8006fae 8006f98: 6dbb ldr r3, [r7, #88] @ 0x58 8006f9a: 881b ldrh r3, [r3, #0] 8006f9c: b29b uxth r3, r3 8006f9e: ea6f 4343 mvn.w r3, r3, lsl #17 8006fa2: ea6f 4353 mvn.w r3, r3, lsr #17 8006fa6: b29a uxth r2, r3 8006fa8: 6dbb ldr r3, [r7, #88] @ 0x58 8006faa: 801a strh r2, [r3, #0] 8006fac: e032 b.n 8007014 8006fae: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006fb2: 085b lsrs r3, r3, #1 8006fb4: 66bb str r3, [r7, #104] @ 0x68 8006fb6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006fba: f003 0301 and.w r3, r3, #1 8006fbe: 2b00 cmp r3, #0 8006fc0: d002 beq.n 8006fc8 8006fc2: 6ebb ldr r3, [r7, #104] @ 0x68 8006fc4: 3301 adds r3, #1 8006fc6: 66bb str r3, [r7, #104] @ 0x68 8006fc8: 6dbb ldr r3, [r7, #88] @ 0x58 8006fca: 881b ldrh r3, [r3, #0] 8006fcc: b29a uxth r2, r3 8006fce: 6ebb ldr r3, [r7, #104] @ 0x68 8006fd0: b29b uxth r3, r3 8006fd2: 029b lsls r3, r3, #10 8006fd4: b29b uxth r3, r3 8006fd6: 4313 orrs r3, r2 8006fd8: b29a uxth r2, r3 8006fda: 6dbb ldr r3, [r7, #88] @ 0x58 8006fdc: 801a strh r2, [r3, #0] 8006fde: e019 b.n 8007014 8006fe0: 68bb ldr r3, [r7, #8] 8006fe2: 785b ldrb r3, [r3, #1] 8006fe4: 2b01 cmp r3, #1 8006fe6: d115 bne.n 8007014 8006fe8: 68fb ldr r3, [r7, #12] 8006fea: 681b ldr r3, [r3, #0] 8006fec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006ff0: b29b uxth r3, r3 8006ff2: 461a mov r2, r3 8006ff4: 6d7b ldr r3, [r7, #84] @ 0x54 8006ff6: 4413 add r3, r2 8006ff8: 657b str r3, [r7, #84] @ 0x54 8006ffa: 68bb ldr r3, [r7, #8] 8006ffc: 781b ldrb r3, [r3, #0] 8006ffe: 011a lsls r2, r3, #4 8007000: 6d7b ldr r3, [r7, #84] @ 0x54 8007002: 4413 add r3, r2 8007004: f203 430c addw r3, r3, #1036 @ 0x40c 8007008: 653b str r3, [r7, #80] @ 0x50 800700a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800700e: b29a uxth r2, r3 8007010: 6d3b ldr r3, [r7, #80] @ 0x50 8007012: 801a strh r2, [r3, #0] /* Copy the user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len); 8007014: 68fb ldr r3, [r7, #12] 8007016: 6818 ldr r0, [r3, #0] 8007018: 68bb ldr r3, [r7, #8] 800701a: 6959 ldr r1, [r3, #20] 800701c: 68bb ldr r3, [r7, #8] 800701e: 895a ldrh r2, [r3, #10] 8007020: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007024: b29b uxth r3, r3 8007026: f004 f8ca bl 800b1be } } } /*enable endpoint IN*/ PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID); 800702a: 68fb ldr r3, [r7, #12] 800702c: 681b ldr r3, [r3, #0] 800702e: 461a mov r2, r3 8007030: 68bb ldr r3, [r7, #8] 8007032: 781b ldrb r3, [r3, #0] 8007034: 009b lsls r3, r3, #2 8007036: 4413 add r3, r2 8007038: 881b ldrh r3, [r3, #0] 800703a: b29b uxth r3, r3 800703c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007040: f023 0340 bic.w r3, r3, #64 @ 0x40 8007044: 82bb strh r3, [r7, #20] 8007046: 8abb ldrh r3, [r7, #20] 8007048: f083 0310 eor.w r3, r3, #16 800704c: 82bb strh r3, [r7, #20] 800704e: 8abb ldrh r3, [r7, #20] 8007050: f083 0320 eor.w r3, r3, #32 8007054: 82bb strh r3, [r7, #20] 8007056: 68fb ldr r3, [r7, #12] 8007058: 681b ldr r3, [r3, #0] 800705a: 461a mov r2, r3 800705c: 68bb ldr r3, [r7, #8] 800705e: 781b ldrb r3, [r3, #0] 8007060: 009b lsls r3, r3, #2 8007062: 441a add r2, r3 8007064: 8abb ldrh r3, [r7, #20] 8007066: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800706a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800706e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007072: f043 0380 orr.w r3, r3, #128 @ 0x80 8007076: b29b uxth r3, r3 8007078: 8013 strh r3, [r2, #0] return HAL_OK; 800707a: 2300 movs r3, #0 } 800707c: 4618 mov r0, r3 800707e: 3790 adds r7, #144 @ 0x90 8007080: 46bd mov sp, r7 8007082: bd80 pop {r7, pc} 08007084 : * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, uint16_t ep_kind, uint32_t pmaadress) { 8007084: b480 push {r7} 8007086: b087 sub sp, #28 8007088: af00 add r7, sp, #0 800708a: 60f8 str r0, [r7, #12] 800708c: 607b str r3, [r7, #4] 800708e: 460b mov r3, r1 8007090: 817b strh r3, [r7, #10] 8007092: 4613 mov r3, r2 8007094: 813b strh r3, [r7, #8] PCD_EPTypeDef *ep; /* initialize ep structure*/ if ((0x80U & ep_addr) == 0x80U) 8007096: 897b ldrh r3, [r7, #10] 8007098: f003 0380 and.w r3, r3, #128 @ 0x80 800709c: b29b uxth r3, r3 800709e: 2b00 cmp r3, #0 80070a0: d00b beq.n 80070ba { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 80070a2: 897b ldrh r3, [r7, #10] 80070a4: f003 0207 and.w r2, r3, #7 80070a8: 4613 mov r3, r2 80070aa: 009b lsls r3, r3, #2 80070ac: 4413 add r3, r2 80070ae: 00db lsls r3, r3, #3 80070b0: 3310 adds r3, #16 80070b2: 68fa ldr r2, [r7, #12] 80070b4: 4413 add r3, r2 80070b6: 617b str r3, [r7, #20] 80070b8: e009 b.n 80070ce } else { ep = &hpcd->OUT_ep[ep_addr]; 80070ba: 897a ldrh r2, [r7, #10] 80070bc: 4613 mov r3, r2 80070be: 009b lsls r3, r3, #2 80070c0: 4413 add r3, r2 80070c2: 00db lsls r3, r3, #3 80070c4: f503 73a8 add.w r3, r3, #336 @ 0x150 80070c8: 68fa ldr r2, [r7, #12] 80070ca: 4413 add r3, r2 80070cc: 617b str r3, [r7, #20] } /* Here we check if the endpoint is single or double Buffer*/ if (ep_kind == PCD_SNG_BUF) 80070ce: 893b ldrh r3, [r7, #8] 80070d0: 2b00 cmp r3, #0 80070d2: d107 bne.n 80070e4 { /* Single Buffer */ ep->doublebuffer = 0U; 80070d4: 697b ldr r3, [r7, #20] 80070d6: 2200 movs r2, #0 80070d8: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaadress = (uint16_t)pmaadress; 80070da: 687b ldr r3, [r7, #4] 80070dc: b29a uxth r2, r3 80070de: 697b ldr r3, [r7, #20] 80070e0: 80da strh r2, [r3, #6] 80070e2: e00b b.n 80070fc } #if (USE_USB_DOUBLE_BUFFER == 1U) else /* USB_DBL_BUF */ { /* Double Buffer Endpoint */ ep->doublebuffer = 1U; 80070e4: 697b ldr r3, [r7, #20] 80070e6: 2201 movs r2, #1 80070e8: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 80070ea: 687b ldr r3, [r7, #4] 80070ec: b29a uxth r2, r3 80070ee: 697b ldr r3, [r7, #20] 80070f0: 811a strh r2, [r3, #8] ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 80070f2: 687b ldr r3, [r7, #4] 80070f4: 0c1b lsrs r3, r3, #16 80070f6: b29a uxth r2, r3 80070f8: 697b ldr r3, [r7, #20] 80070fa: 815a strh r2, [r3, #10] } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 80070fc: 2300 movs r3, #0 } 80070fe: 4618 mov r0, r3 8007100: 371c adds r7, #28 8007102: 46bd mov sp, r7 8007104: bc80 pop {r7} 8007106: 4770 bx lr 08007108 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8007108: b580 push {r7, lr} 800710a: b086 sub sp, #24 800710c: af00 add r7, sp, #0 800710e: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8007110: 687b ldr r3, [r7, #4] 8007112: 2b00 cmp r3, #0 8007114: d101 bne.n 800711a { return HAL_ERROR; 8007116: 2301 movs r3, #1 8007118: e272 b.n 8007600 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800711a: 687b ldr r3, [r7, #4] 800711c: 681b ldr r3, [r3, #0] 800711e: f003 0301 and.w r3, r3, #1 8007122: 2b00 cmp r3, #0 8007124: f000 8087 beq.w 8007236 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8007128: 4b92 ldr r3, [pc, #584] @ (8007374 ) 800712a: 685b ldr r3, [r3, #4] 800712c: f003 030c and.w r3, r3, #12 8007130: 2b04 cmp r3, #4 8007132: d00c beq.n 800714e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 8007134: 4b8f ldr r3, [pc, #572] @ (8007374 ) 8007136: 685b ldr r3, [r3, #4] 8007138: f003 030c and.w r3, r3, #12 800713c: 2b08 cmp r3, #8 800713e: d112 bne.n 8007166 8007140: 4b8c ldr r3, [pc, #560] @ (8007374 ) 8007142: 685b ldr r3, [r3, #4] 8007144: f403 3380 and.w r3, r3, #65536 @ 0x10000 8007148: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800714c: d10b bne.n 8007166 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800714e: 4b89 ldr r3, [pc, #548] @ (8007374 ) 8007150: 681b ldr r3, [r3, #0] 8007152: f403 3300 and.w r3, r3, #131072 @ 0x20000 8007156: 2b00 cmp r3, #0 8007158: d06c beq.n 8007234 800715a: 687b ldr r3, [r7, #4] 800715c: 685b ldr r3, [r3, #4] 800715e: 2b00 cmp r3, #0 8007160: d168 bne.n 8007234 { return HAL_ERROR; 8007162: 2301 movs r3, #1 8007164: e24c b.n 8007600 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8007166: 687b ldr r3, [r7, #4] 8007168: 685b ldr r3, [r3, #4] 800716a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800716e: d106 bne.n 800717e 8007170: 4b80 ldr r3, [pc, #512] @ (8007374 ) 8007172: 681b ldr r3, [r3, #0] 8007174: 4a7f ldr r2, [pc, #508] @ (8007374 ) 8007176: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800717a: 6013 str r3, [r2, #0] 800717c: e02e b.n 80071dc 800717e: 687b ldr r3, [r7, #4] 8007180: 685b ldr r3, [r3, #4] 8007182: 2b00 cmp r3, #0 8007184: d10c bne.n 80071a0 8007186: 4b7b ldr r3, [pc, #492] @ (8007374 ) 8007188: 681b ldr r3, [r3, #0] 800718a: 4a7a ldr r2, [pc, #488] @ (8007374 ) 800718c: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8007190: 6013 str r3, [r2, #0] 8007192: 4b78 ldr r3, [pc, #480] @ (8007374 ) 8007194: 681b ldr r3, [r3, #0] 8007196: 4a77 ldr r2, [pc, #476] @ (8007374 ) 8007198: f423 2380 bic.w r3, r3, #262144 @ 0x40000 800719c: 6013 str r3, [r2, #0] 800719e: e01d b.n 80071dc 80071a0: 687b ldr r3, [r7, #4] 80071a2: 685b ldr r3, [r3, #4] 80071a4: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 80071a8: d10c bne.n 80071c4 80071aa: 4b72 ldr r3, [pc, #456] @ (8007374 ) 80071ac: 681b ldr r3, [r3, #0] 80071ae: 4a71 ldr r2, [pc, #452] @ (8007374 ) 80071b0: f443 2380 orr.w r3, r3, #262144 @ 0x40000 80071b4: 6013 str r3, [r2, #0] 80071b6: 4b6f ldr r3, [pc, #444] @ (8007374 ) 80071b8: 681b ldr r3, [r3, #0] 80071ba: 4a6e ldr r2, [pc, #440] @ (8007374 ) 80071bc: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80071c0: 6013 str r3, [r2, #0] 80071c2: e00b b.n 80071dc 80071c4: 4b6b ldr r3, [pc, #428] @ (8007374 ) 80071c6: 681b ldr r3, [r3, #0] 80071c8: 4a6a ldr r2, [pc, #424] @ (8007374 ) 80071ca: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80071ce: 6013 str r3, [r2, #0] 80071d0: 4b68 ldr r3, [pc, #416] @ (8007374 ) 80071d2: 681b ldr r3, [r3, #0] 80071d4: 4a67 ldr r2, [pc, #412] @ (8007374 ) 80071d6: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80071da: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 80071dc: 687b ldr r3, [r7, #4] 80071de: 685b ldr r3, [r3, #4] 80071e0: 2b00 cmp r3, #0 80071e2: d013 beq.n 800720c { /* Get Start Tick */ tickstart = HAL_GetTick(); 80071e4: f7fc ff8c bl 8004100 80071e8: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80071ea: e008 b.n 80071fe { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 80071ec: f7fc ff88 bl 8004100 80071f0: 4602 mov r2, r0 80071f2: 693b ldr r3, [r7, #16] 80071f4: 1ad3 subs r3, r2, r3 80071f6: 2b64 cmp r3, #100 @ 0x64 80071f8: d901 bls.n 80071fe { return HAL_TIMEOUT; 80071fa: 2303 movs r3, #3 80071fc: e200 b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80071fe: 4b5d ldr r3, [pc, #372] @ (8007374 ) 8007200: 681b ldr r3, [r3, #0] 8007202: f403 3300 and.w r3, r3, #131072 @ 0x20000 8007206: 2b00 cmp r3, #0 8007208: d0f0 beq.n 80071ec 800720a: e014 b.n 8007236 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 800720c: f7fc ff78 bl 8004100 8007210: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8007212: e008 b.n 8007226 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8007214: f7fc ff74 bl 8004100 8007218: 4602 mov r2, r0 800721a: 693b ldr r3, [r7, #16] 800721c: 1ad3 subs r3, r2, r3 800721e: 2b64 cmp r3, #100 @ 0x64 8007220: d901 bls.n 8007226 { return HAL_TIMEOUT; 8007222: 2303 movs r3, #3 8007224: e1ec b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8007226: 4b53 ldr r3, [pc, #332] @ (8007374 ) 8007228: 681b ldr r3, [r3, #0] 800722a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800722e: 2b00 cmp r3, #0 8007230: d1f0 bne.n 8007214 8007232: e000 b.n 8007236 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8007234: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8007236: 687b ldr r3, [r7, #4] 8007238: 681b ldr r3, [r3, #0] 800723a: f003 0302 and.w r3, r3, #2 800723e: 2b00 cmp r3, #0 8007240: d063 beq.n 800730a /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 8007242: 4b4c ldr r3, [pc, #304] @ (8007374 ) 8007244: 685b ldr r3, [r3, #4] 8007246: f003 030c and.w r3, r3, #12 800724a: 2b00 cmp r3, #0 800724c: d00b beq.n 8007266 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 800724e: 4b49 ldr r3, [pc, #292] @ (8007374 ) 8007250: 685b ldr r3, [r3, #4] 8007252: f003 030c and.w r3, r3, #12 8007256: 2b08 cmp r3, #8 8007258: d11c bne.n 8007294 800725a: 4b46 ldr r3, [pc, #280] @ (8007374 ) 800725c: 685b ldr r3, [r3, #4] 800725e: f403 3380 and.w r3, r3, #65536 @ 0x10000 8007262: 2b00 cmp r3, #0 8007264: d116 bne.n 8007294 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8007266: 4b43 ldr r3, [pc, #268] @ (8007374 ) 8007268: 681b ldr r3, [r3, #0] 800726a: f003 0302 and.w r3, r3, #2 800726e: 2b00 cmp r3, #0 8007270: d005 beq.n 800727e 8007272: 687b ldr r3, [r7, #4] 8007274: 691b ldr r3, [r3, #16] 8007276: 2b01 cmp r3, #1 8007278: d001 beq.n 800727e { return HAL_ERROR; 800727a: 2301 movs r3, #1 800727c: e1c0 b.n 8007600 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 800727e: 4b3d ldr r3, [pc, #244] @ (8007374 ) 8007280: 681b ldr r3, [r3, #0] 8007282: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8007286: 687b ldr r3, [r7, #4] 8007288: 695b ldr r3, [r3, #20] 800728a: 00db lsls r3, r3, #3 800728c: 4939 ldr r1, [pc, #228] @ (8007374 ) 800728e: 4313 orrs r3, r2 8007290: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8007292: e03a b.n 800730a } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8007294: 687b ldr r3, [r7, #4] 8007296: 691b ldr r3, [r3, #16] 8007298: 2b00 cmp r3, #0 800729a: d020 beq.n 80072de { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 800729c: 4b36 ldr r3, [pc, #216] @ (8007378 ) 800729e: 2201 movs r2, #1 80072a0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80072a2: f7fc ff2d bl 8004100 80072a6: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80072a8: e008 b.n 80072bc { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80072aa: f7fc ff29 bl 8004100 80072ae: 4602 mov r2, r0 80072b0: 693b ldr r3, [r7, #16] 80072b2: 1ad3 subs r3, r2, r3 80072b4: 2b02 cmp r3, #2 80072b6: d901 bls.n 80072bc { return HAL_TIMEOUT; 80072b8: 2303 movs r3, #3 80072ba: e1a1 b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80072bc: 4b2d ldr r3, [pc, #180] @ (8007374 ) 80072be: 681b ldr r3, [r3, #0] 80072c0: f003 0302 and.w r3, r3, #2 80072c4: 2b00 cmp r3, #0 80072c6: d0f0 beq.n 80072aa } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80072c8: 4b2a ldr r3, [pc, #168] @ (8007374 ) 80072ca: 681b ldr r3, [r3, #0] 80072cc: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80072d0: 687b ldr r3, [r7, #4] 80072d2: 695b ldr r3, [r3, #20] 80072d4: 00db lsls r3, r3, #3 80072d6: 4927 ldr r1, [pc, #156] @ (8007374 ) 80072d8: 4313 orrs r3, r2 80072da: 600b str r3, [r1, #0] 80072dc: e015 b.n 800730a } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80072de: 4b26 ldr r3, [pc, #152] @ (8007378 ) 80072e0: 2200 movs r2, #0 80072e2: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80072e4: f7fc ff0c bl 8004100 80072e8: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80072ea: e008 b.n 80072fe { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80072ec: f7fc ff08 bl 8004100 80072f0: 4602 mov r2, r0 80072f2: 693b ldr r3, [r7, #16] 80072f4: 1ad3 subs r3, r2, r3 80072f6: 2b02 cmp r3, #2 80072f8: d901 bls.n 80072fe { return HAL_TIMEOUT; 80072fa: 2303 movs r3, #3 80072fc: e180 b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80072fe: 4b1d ldr r3, [pc, #116] @ (8007374 ) 8007300: 681b ldr r3, [r3, #0] 8007302: f003 0302 and.w r3, r3, #2 8007306: 2b00 cmp r3, #0 8007308: d1f0 bne.n 80072ec } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 800730a: 687b ldr r3, [r7, #4] 800730c: 681b ldr r3, [r3, #0] 800730e: f003 0308 and.w r3, r3, #8 8007312: 2b00 cmp r3, #0 8007314: d03a beq.n 800738c { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8007316: 687b ldr r3, [r7, #4] 8007318: 699b ldr r3, [r3, #24] 800731a: 2b00 cmp r3, #0 800731c: d019 beq.n 8007352 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 800731e: 4b17 ldr r3, [pc, #92] @ (800737c ) 8007320: 2201 movs r2, #1 8007322: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007324: f7fc feec bl 8004100 8007328: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800732a: e008 b.n 800733e { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 800732c: f7fc fee8 bl 8004100 8007330: 4602 mov r2, r0 8007332: 693b ldr r3, [r7, #16] 8007334: 1ad3 subs r3, r2, r3 8007336: 2b02 cmp r3, #2 8007338: d901 bls.n 800733e { return HAL_TIMEOUT; 800733a: 2303 movs r3, #3 800733c: e160 b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800733e: 4b0d ldr r3, [pc, #52] @ (8007374 ) 8007340: 6a5b ldr r3, [r3, #36] @ 0x24 8007342: f003 0302 and.w r3, r3, #2 8007346: 2b00 cmp r3, #0 8007348: d0f0 beq.n 800732c } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 800734a: 2001 movs r0, #1 800734c: f000 fad0 bl 80078f0 8007350: e01c b.n 800738c } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8007352: 4b0a ldr r3, [pc, #40] @ (800737c ) 8007354: 2200 movs r2, #0 8007356: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007358: f7fc fed2 bl 8004100 800735c: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 800735e: e00f b.n 8007380 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8007360: f7fc fece bl 8004100 8007364: 4602 mov r2, r0 8007366: 693b ldr r3, [r7, #16] 8007368: 1ad3 subs r3, r2, r3 800736a: 2b02 cmp r3, #2 800736c: d908 bls.n 8007380 { return HAL_TIMEOUT; 800736e: 2303 movs r3, #3 8007370: e146 b.n 8007600 8007372: bf00 nop 8007374: 40021000 .word 0x40021000 8007378: 42420000 .word 0x42420000 800737c: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8007380: 4b92 ldr r3, [pc, #584] @ (80075cc ) 8007382: 6a5b ldr r3, [r3, #36] @ 0x24 8007384: f003 0302 and.w r3, r3, #2 8007388: 2b00 cmp r3, #0 800738a: d1e9 bne.n 8007360 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 800738c: 687b ldr r3, [r7, #4] 800738e: 681b ldr r3, [r3, #0] 8007390: f003 0304 and.w r3, r3, #4 8007394: 2b00 cmp r3, #0 8007396: f000 80a6 beq.w 80074e6 { FlagStatus pwrclkchanged = RESET; 800739a: 2300 movs r3, #0 800739c: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 800739e: 4b8b ldr r3, [pc, #556] @ (80075cc ) 80073a0: 69db ldr r3, [r3, #28] 80073a2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80073a6: 2b00 cmp r3, #0 80073a8: d10d bne.n 80073c6 { __HAL_RCC_PWR_CLK_ENABLE(); 80073aa: 4b88 ldr r3, [pc, #544] @ (80075cc ) 80073ac: 69db ldr r3, [r3, #28] 80073ae: 4a87 ldr r2, [pc, #540] @ (80075cc ) 80073b0: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80073b4: 61d3 str r3, [r2, #28] 80073b6: 4b85 ldr r3, [pc, #532] @ (80075cc ) 80073b8: 69db ldr r3, [r3, #28] 80073ba: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80073be: 60bb str r3, [r7, #8] 80073c0: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 80073c2: 2301 movs r3, #1 80073c4: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80073c6: 4b82 ldr r3, [pc, #520] @ (80075d0 ) 80073c8: 681b ldr r3, [r3, #0] 80073ca: f403 7380 and.w r3, r3, #256 @ 0x100 80073ce: 2b00 cmp r3, #0 80073d0: d118 bne.n 8007404 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80073d2: 4b7f ldr r3, [pc, #508] @ (80075d0 ) 80073d4: 681b ldr r3, [r3, #0] 80073d6: 4a7e ldr r2, [pc, #504] @ (80075d0 ) 80073d8: f443 7380 orr.w r3, r3, #256 @ 0x100 80073dc: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80073de: f7fc fe8f bl 8004100 80073e2: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80073e4: e008 b.n 80073f8 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80073e6: f7fc fe8b bl 8004100 80073ea: 4602 mov r2, r0 80073ec: 693b ldr r3, [r7, #16] 80073ee: 1ad3 subs r3, r2, r3 80073f0: 2b64 cmp r3, #100 @ 0x64 80073f2: d901 bls.n 80073f8 { return HAL_TIMEOUT; 80073f4: 2303 movs r3, #3 80073f6: e103 b.n 8007600 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80073f8: 4b75 ldr r3, [pc, #468] @ (80075d0 ) 80073fa: 681b ldr r3, [r3, #0] 80073fc: f403 7380 and.w r3, r3, #256 @ 0x100 8007400: 2b00 cmp r3, #0 8007402: d0f0 beq.n 80073e6 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8007404: 687b ldr r3, [r7, #4] 8007406: 68db ldr r3, [r3, #12] 8007408: 2b01 cmp r3, #1 800740a: d106 bne.n 800741a 800740c: 4b6f ldr r3, [pc, #444] @ (80075cc ) 800740e: 6a1b ldr r3, [r3, #32] 8007410: 4a6e ldr r2, [pc, #440] @ (80075cc ) 8007412: f043 0301 orr.w r3, r3, #1 8007416: 6213 str r3, [r2, #32] 8007418: e02d b.n 8007476 800741a: 687b ldr r3, [r7, #4] 800741c: 68db ldr r3, [r3, #12] 800741e: 2b00 cmp r3, #0 8007420: d10c bne.n 800743c 8007422: 4b6a ldr r3, [pc, #424] @ (80075cc ) 8007424: 6a1b ldr r3, [r3, #32] 8007426: 4a69 ldr r2, [pc, #420] @ (80075cc ) 8007428: f023 0301 bic.w r3, r3, #1 800742c: 6213 str r3, [r2, #32] 800742e: 4b67 ldr r3, [pc, #412] @ (80075cc ) 8007430: 6a1b ldr r3, [r3, #32] 8007432: 4a66 ldr r2, [pc, #408] @ (80075cc ) 8007434: f023 0304 bic.w r3, r3, #4 8007438: 6213 str r3, [r2, #32] 800743a: e01c b.n 8007476 800743c: 687b ldr r3, [r7, #4] 800743e: 68db ldr r3, [r3, #12] 8007440: 2b05 cmp r3, #5 8007442: d10c bne.n 800745e 8007444: 4b61 ldr r3, [pc, #388] @ (80075cc ) 8007446: 6a1b ldr r3, [r3, #32] 8007448: 4a60 ldr r2, [pc, #384] @ (80075cc ) 800744a: f043 0304 orr.w r3, r3, #4 800744e: 6213 str r3, [r2, #32] 8007450: 4b5e ldr r3, [pc, #376] @ (80075cc ) 8007452: 6a1b ldr r3, [r3, #32] 8007454: 4a5d ldr r2, [pc, #372] @ (80075cc ) 8007456: f043 0301 orr.w r3, r3, #1 800745a: 6213 str r3, [r2, #32] 800745c: e00b b.n 8007476 800745e: 4b5b ldr r3, [pc, #364] @ (80075cc ) 8007460: 6a1b ldr r3, [r3, #32] 8007462: 4a5a ldr r2, [pc, #360] @ (80075cc ) 8007464: f023 0301 bic.w r3, r3, #1 8007468: 6213 str r3, [r2, #32] 800746a: 4b58 ldr r3, [pc, #352] @ (80075cc ) 800746c: 6a1b ldr r3, [r3, #32] 800746e: 4a57 ldr r2, [pc, #348] @ (80075cc ) 8007470: f023 0304 bic.w r3, r3, #4 8007474: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8007476: 687b ldr r3, [r7, #4] 8007478: 68db ldr r3, [r3, #12] 800747a: 2b00 cmp r3, #0 800747c: d015 beq.n 80074aa { /* Get Start Tick */ tickstart = HAL_GetTick(); 800747e: f7fc fe3f bl 8004100 8007482: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8007484: e00a b.n 800749c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8007486: f7fc fe3b bl 8004100 800748a: 4602 mov r2, r0 800748c: 693b ldr r3, [r7, #16] 800748e: 1ad3 subs r3, r2, r3 8007490: f241 3288 movw r2, #5000 @ 0x1388 8007494: 4293 cmp r3, r2 8007496: d901 bls.n 800749c { return HAL_TIMEOUT; 8007498: 2303 movs r3, #3 800749a: e0b1 b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 800749c: 4b4b ldr r3, [pc, #300] @ (80075cc ) 800749e: 6a1b ldr r3, [r3, #32] 80074a0: f003 0302 and.w r3, r3, #2 80074a4: 2b00 cmp r3, #0 80074a6: d0ee beq.n 8007486 80074a8: e014 b.n 80074d4 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80074aa: f7fc fe29 bl 8004100 80074ae: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80074b0: e00a b.n 80074c8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80074b2: f7fc fe25 bl 8004100 80074b6: 4602 mov r2, r0 80074b8: 693b ldr r3, [r7, #16] 80074ba: 1ad3 subs r3, r2, r3 80074bc: f241 3288 movw r2, #5000 @ 0x1388 80074c0: 4293 cmp r3, r2 80074c2: d901 bls.n 80074c8 { return HAL_TIMEOUT; 80074c4: 2303 movs r3, #3 80074c6: e09b b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80074c8: 4b40 ldr r3, [pc, #256] @ (80075cc ) 80074ca: 6a1b ldr r3, [r3, #32] 80074cc: f003 0302 and.w r3, r3, #2 80074d0: 2b00 cmp r3, #0 80074d2: d1ee bne.n 80074b2 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 80074d4: 7dfb ldrb r3, [r7, #23] 80074d6: 2b01 cmp r3, #1 80074d8: d105 bne.n 80074e6 { __HAL_RCC_PWR_CLK_DISABLE(); 80074da: 4b3c ldr r3, [pc, #240] @ (80075cc ) 80074dc: 69db ldr r3, [r3, #28] 80074de: 4a3b ldr r2, [pc, #236] @ (80075cc ) 80074e0: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80074e4: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80074e6: 687b ldr r3, [r7, #4] 80074e8: 69db ldr r3, [r3, #28] 80074ea: 2b00 cmp r3, #0 80074ec: f000 8087 beq.w 80075fe { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 80074f0: 4b36 ldr r3, [pc, #216] @ (80075cc ) 80074f2: 685b ldr r3, [r3, #4] 80074f4: f003 030c and.w r3, r3, #12 80074f8: 2b08 cmp r3, #8 80074fa: d061 beq.n 80075c0 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80074fc: 687b ldr r3, [r7, #4] 80074fe: 69db ldr r3, [r3, #28] 8007500: 2b02 cmp r3, #2 8007502: d146 bne.n 8007592 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8007504: 4b33 ldr r3, [pc, #204] @ (80075d4 ) 8007506: 2200 movs r2, #0 8007508: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800750a: f7fc fdf9 bl 8004100 800750e: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8007510: e008 b.n 8007524 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8007512: f7fc fdf5 bl 8004100 8007516: 4602 mov r2, r0 8007518: 693b ldr r3, [r7, #16] 800751a: 1ad3 subs r3, r2, r3 800751c: 2b02 cmp r3, #2 800751e: d901 bls.n 8007524 { return HAL_TIMEOUT; 8007520: 2303 movs r3, #3 8007522: e06d b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8007524: 4b29 ldr r3, [pc, #164] @ (80075cc ) 8007526: 681b ldr r3, [r3, #0] 8007528: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800752c: 2b00 cmp r3, #0 800752e: d1f0 bne.n 8007512 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8007530: 687b ldr r3, [r7, #4] 8007532: 6a1b ldr r3, [r3, #32] 8007534: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8007538: d108 bne.n 800754c /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 800753a: 4b24 ldr r3, [pc, #144] @ (80075cc ) 800753c: 685b ldr r3, [r3, #4] 800753e: f423 3200 bic.w r2, r3, #131072 @ 0x20000 8007542: 687b ldr r3, [r7, #4] 8007544: 689b ldr r3, [r3, #8] 8007546: 4921 ldr r1, [pc, #132] @ (80075cc ) 8007548: 4313 orrs r3, r2 800754a: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 800754c: 4b1f ldr r3, [pc, #124] @ (80075cc ) 800754e: 685b ldr r3, [r3, #4] 8007550: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 8007554: 687b ldr r3, [r7, #4] 8007556: 6a19 ldr r1, [r3, #32] 8007558: 687b ldr r3, [r7, #4] 800755a: 6a5b ldr r3, [r3, #36] @ 0x24 800755c: 430b orrs r3, r1 800755e: 491b ldr r1, [pc, #108] @ (80075cc ) 8007560: 4313 orrs r3, r2 8007562: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8007564: 4b1b ldr r3, [pc, #108] @ (80075d4 ) 8007566: 2201 movs r2, #1 8007568: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800756a: f7fc fdc9 bl 8004100 800756e: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8007570: e008 b.n 8007584 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8007572: f7fc fdc5 bl 8004100 8007576: 4602 mov r2, r0 8007578: 693b ldr r3, [r7, #16] 800757a: 1ad3 subs r3, r2, r3 800757c: 2b02 cmp r3, #2 800757e: d901 bls.n 8007584 { return HAL_TIMEOUT; 8007580: 2303 movs r3, #3 8007582: e03d b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8007584: 4b11 ldr r3, [pc, #68] @ (80075cc ) 8007586: 681b ldr r3, [r3, #0] 8007588: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800758c: 2b00 cmp r3, #0 800758e: d0f0 beq.n 8007572 8007590: e035 b.n 80075fe } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8007592: 4b10 ldr r3, [pc, #64] @ (80075d4 ) 8007594: 2200 movs r2, #0 8007596: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007598: f7fc fdb2 bl 8004100 800759c: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800759e: e008 b.n 80075b2 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80075a0: f7fc fdae bl 8004100 80075a4: 4602 mov r2, r0 80075a6: 693b ldr r3, [r7, #16] 80075a8: 1ad3 subs r3, r2, r3 80075aa: 2b02 cmp r3, #2 80075ac: d901 bls.n 80075b2 { return HAL_TIMEOUT; 80075ae: 2303 movs r3, #3 80075b0: e026 b.n 8007600 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80075b2: 4b06 ldr r3, [pc, #24] @ (80075cc ) 80075b4: 681b ldr r3, [r3, #0] 80075b6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80075ba: 2b00 cmp r3, #0 80075bc: d1f0 bne.n 80075a0 80075be: e01e b.n 80075fe } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 80075c0: 687b ldr r3, [r7, #4] 80075c2: 69db ldr r3, [r3, #28] 80075c4: 2b01 cmp r3, #1 80075c6: d107 bne.n 80075d8 { return HAL_ERROR; 80075c8: 2301 movs r3, #1 80075ca: e019 b.n 8007600 80075cc: 40021000 .word 0x40021000 80075d0: 40007000 .word 0x40007000 80075d4: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 80075d8: 4b0b ldr r3, [pc, #44] @ (8007608 ) 80075da: 685b ldr r3, [r3, #4] 80075dc: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80075de: 68fb ldr r3, [r7, #12] 80075e0: f403 3280 and.w r2, r3, #65536 @ 0x10000 80075e4: 687b ldr r3, [r7, #4] 80075e6: 6a1b ldr r3, [r3, #32] 80075e8: 429a cmp r2, r3 80075ea: d106 bne.n 80075fa (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 80075ec: 68fb ldr r3, [r7, #12] 80075ee: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 80075f2: 687b ldr r3, [r7, #4] 80075f4: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80075f6: 429a cmp r2, r3 80075f8: d001 beq.n 80075fe { return HAL_ERROR; 80075fa: 2301 movs r3, #1 80075fc: e000 b.n 8007600 } } } } return HAL_OK; 80075fe: 2300 movs r3, #0 } 8007600: 4618 mov r0, r3 8007602: 3718 adds r7, #24 8007604: 46bd mov sp, r7 8007606: bd80 pop {r7, pc} 8007608: 40021000 .word 0x40021000 0800760c : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 800760c: b580 push {r7, lr} 800760e: b084 sub sp, #16 8007610: af00 add r7, sp, #0 8007612: 6078 str r0, [r7, #4] 8007614: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8007616: 687b ldr r3, [r7, #4] 8007618: 2b00 cmp r3, #0 800761a: d101 bne.n 8007620 { return HAL_ERROR; 800761c: 2301 movs r3, #1 800761e: e0d0 b.n 80077c2 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8007620: 4b6a ldr r3, [pc, #424] @ (80077cc ) 8007622: 681b ldr r3, [r3, #0] 8007624: f003 0307 and.w r3, r3, #7 8007628: 683a ldr r2, [r7, #0] 800762a: 429a cmp r2, r3 800762c: d910 bls.n 8007650 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800762e: 4b67 ldr r3, [pc, #412] @ (80077cc ) 8007630: 681b ldr r3, [r3, #0] 8007632: f023 0207 bic.w r2, r3, #7 8007636: 4965 ldr r1, [pc, #404] @ (80077cc ) 8007638: 683b ldr r3, [r7, #0] 800763a: 4313 orrs r3, r2 800763c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800763e: 4b63 ldr r3, [pc, #396] @ (80077cc ) 8007640: 681b ldr r3, [r3, #0] 8007642: f003 0307 and.w r3, r3, #7 8007646: 683a ldr r2, [r7, #0] 8007648: 429a cmp r2, r3 800764a: d001 beq.n 8007650 { return HAL_ERROR; 800764c: 2301 movs r3, #1 800764e: e0b8 b.n 80077c2 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8007650: 687b ldr r3, [r7, #4] 8007652: 681b ldr r3, [r3, #0] 8007654: f003 0302 and.w r3, r3, #2 8007658: 2b00 cmp r3, #0 800765a: d020 beq.n 800769e { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800765c: 687b ldr r3, [r7, #4] 800765e: 681b ldr r3, [r3, #0] 8007660: f003 0304 and.w r3, r3, #4 8007664: 2b00 cmp r3, #0 8007666: d005 beq.n 8007674 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8007668: 4b59 ldr r3, [pc, #356] @ (80077d0 ) 800766a: 685b ldr r3, [r3, #4] 800766c: 4a58 ldr r2, [pc, #352] @ (80077d0 ) 800766e: f443 63e0 orr.w r3, r3, #1792 @ 0x700 8007672: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8007674: 687b ldr r3, [r7, #4] 8007676: 681b ldr r3, [r3, #0] 8007678: f003 0308 and.w r3, r3, #8 800767c: 2b00 cmp r3, #0 800767e: d005 beq.n 800768c { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8007680: 4b53 ldr r3, [pc, #332] @ (80077d0 ) 8007682: 685b ldr r3, [r3, #4] 8007684: 4a52 ldr r2, [pc, #328] @ (80077d0 ) 8007686: f443 5360 orr.w r3, r3, #14336 @ 0x3800 800768a: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 800768c: 4b50 ldr r3, [pc, #320] @ (80077d0 ) 800768e: 685b ldr r3, [r3, #4] 8007690: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8007694: 687b ldr r3, [r7, #4] 8007696: 689b ldr r3, [r3, #8] 8007698: 494d ldr r1, [pc, #308] @ (80077d0 ) 800769a: 4313 orrs r3, r2 800769c: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 800769e: 687b ldr r3, [r7, #4] 80076a0: 681b ldr r3, [r3, #0] 80076a2: f003 0301 and.w r3, r3, #1 80076a6: 2b00 cmp r3, #0 80076a8: d040 beq.n 800772c { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80076aa: 687b ldr r3, [r7, #4] 80076ac: 685b ldr r3, [r3, #4] 80076ae: 2b01 cmp r3, #1 80076b0: d107 bne.n 80076c2 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80076b2: 4b47 ldr r3, [pc, #284] @ (80077d0 ) 80076b4: 681b ldr r3, [r3, #0] 80076b6: f403 3300 and.w r3, r3, #131072 @ 0x20000 80076ba: 2b00 cmp r3, #0 80076bc: d115 bne.n 80076ea { return HAL_ERROR; 80076be: 2301 movs r3, #1 80076c0: e07f b.n 80077c2 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 80076c2: 687b ldr r3, [r7, #4] 80076c4: 685b ldr r3, [r3, #4] 80076c6: 2b02 cmp r3, #2 80076c8: d107 bne.n 80076da { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80076ca: 4b41 ldr r3, [pc, #260] @ (80077d0 ) 80076cc: 681b ldr r3, [r3, #0] 80076ce: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80076d2: 2b00 cmp r3, #0 80076d4: d109 bne.n 80076ea { return HAL_ERROR; 80076d6: 2301 movs r3, #1 80076d8: e073 b.n 80077c2 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80076da: 4b3d ldr r3, [pc, #244] @ (80077d0 ) 80076dc: 681b ldr r3, [r3, #0] 80076de: f003 0302 and.w r3, r3, #2 80076e2: 2b00 cmp r3, #0 80076e4: d101 bne.n 80076ea { return HAL_ERROR; 80076e6: 2301 movs r3, #1 80076e8: e06b b.n 80077c2 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80076ea: 4b39 ldr r3, [pc, #228] @ (80077d0 ) 80076ec: 685b ldr r3, [r3, #4] 80076ee: f023 0203 bic.w r2, r3, #3 80076f2: 687b ldr r3, [r7, #4] 80076f4: 685b ldr r3, [r3, #4] 80076f6: 4936 ldr r1, [pc, #216] @ (80077d0 ) 80076f8: 4313 orrs r3, r2 80076fa: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 80076fc: f7fc fd00 bl 8004100 8007700: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8007702: e00a b.n 800771a { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8007704: f7fc fcfc bl 8004100 8007708: 4602 mov r2, r0 800770a: 68fb ldr r3, [r7, #12] 800770c: 1ad3 subs r3, r2, r3 800770e: f241 3288 movw r2, #5000 @ 0x1388 8007712: 4293 cmp r3, r2 8007714: d901 bls.n 800771a { return HAL_TIMEOUT; 8007716: 2303 movs r3, #3 8007718: e053 b.n 80077c2 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 800771a: 4b2d ldr r3, [pc, #180] @ (80077d0 ) 800771c: 685b ldr r3, [r3, #4] 800771e: f003 020c and.w r2, r3, #12 8007722: 687b ldr r3, [r7, #4] 8007724: 685b ldr r3, [r3, #4] 8007726: 009b lsls r3, r3, #2 8007728: 429a cmp r2, r3 800772a: d1eb bne.n 8007704 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 800772c: 4b27 ldr r3, [pc, #156] @ (80077cc ) 800772e: 681b ldr r3, [r3, #0] 8007730: f003 0307 and.w r3, r3, #7 8007734: 683a ldr r2, [r7, #0] 8007736: 429a cmp r2, r3 8007738: d210 bcs.n 800775c { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800773a: 4b24 ldr r3, [pc, #144] @ (80077cc ) 800773c: 681b ldr r3, [r3, #0] 800773e: f023 0207 bic.w r2, r3, #7 8007742: 4922 ldr r1, [pc, #136] @ (80077cc ) 8007744: 683b ldr r3, [r7, #0] 8007746: 4313 orrs r3, r2 8007748: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800774a: 4b20 ldr r3, [pc, #128] @ (80077cc ) 800774c: 681b ldr r3, [r3, #0] 800774e: f003 0307 and.w r3, r3, #7 8007752: 683a ldr r2, [r7, #0] 8007754: 429a cmp r2, r3 8007756: d001 beq.n 800775c { return HAL_ERROR; 8007758: 2301 movs r3, #1 800775a: e032 b.n 80077c2 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 800775c: 687b ldr r3, [r7, #4] 800775e: 681b ldr r3, [r3, #0] 8007760: f003 0304 and.w r3, r3, #4 8007764: 2b00 cmp r3, #0 8007766: d008 beq.n 800777a { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8007768: 4b19 ldr r3, [pc, #100] @ (80077d0 ) 800776a: 685b ldr r3, [r3, #4] 800776c: f423 62e0 bic.w r2, r3, #1792 @ 0x700 8007770: 687b ldr r3, [r7, #4] 8007772: 68db ldr r3, [r3, #12] 8007774: 4916 ldr r1, [pc, #88] @ (80077d0 ) 8007776: 4313 orrs r3, r2 8007778: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800777a: 687b ldr r3, [r7, #4] 800777c: 681b ldr r3, [r3, #0] 800777e: f003 0308 and.w r3, r3, #8 8007782: 2b00 cmp r3, #0 8007784: d009 beq.n 800779a { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8007786: 4b12 ldr r3, [pc, #72] @ (80077d0 ) 8007788: 685b ldr r3, [r3, #4] 800778a: f423 5260 bic.w r2, r3, #14336 @ 0x3800 800778e: 687b ldr r3, [r7, #4] 8007790: 691b ldr r3, [r3, #16] 8007792: 00db lsls r3, r3, #3 8007794: 490e ldr r1, [pc, #56] @ (80077d0 ) 8007796: 4313 orrs r3, r2 8007798: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 800779a: f000 f821 bl 80077e0 800779e: 4602 mov r2, r0 80077a0: 4b0b ldr r3, [pc, #44] @ (80077d0 ) 80077a2: 685b ldr r3, [r3, #4] 80077a4: 091b lsrs r3, r3, #4 80077a6: f003 030f and.w r3, r3, #15 80077aa: 490a ldr r1, [pc, #40] @ (80077d4 ) 80077ac: 5ccb ldrb r3, [r1, r3] 80077ae: fa22 f303 lsr.w r3, r2, r3 80077b2: 4a09 ldr r2, [pc, #36] @ (80077d8 ) 80077b4: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 80077b6: 4b09 ldr r3, [pc, #36] @ (80077dc ) 80077b8: 681b ldr r3, [r3, #0] 80077ba: 4618 mov r0, r3 80077bc: f7fc fc5e bl 800407c return HAL_OK; 80077c0: 2300 movs r3, #0 } 80077c2: 4618 mov r0, r3 80077c4: 3710 adds r7, #16 80077c6: 46bd mov sp, r7 80077c8: bd80 pop {r7, pc} 80077ca: bf00 nop 80077cc: 40022000 .word 0x40022000 80077d0: 40021000 .word 0x40021000 80077d4: 0800e0a4 .word 0x0800e0a4 80077d8: 20000008 .word 0x20000008 80077dc: 2000000c .word 0x2000000c 080077e0 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80077e0: b480 push {r7} 80077e2: b087 sub sp, #28 80077e4: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 80077e6: 2300 movs r3, #0 80077e8: 60fb str r3, [r7, #12] 80077ea: 2300 movs r3, #0 80077ec: 60bb str r3, [r7, #8] 80077ee: 2300 movs r3, #0 80077f0: 617b str r3, [r7, #20] 80077f2: 2300 movs r3, #0 80077f4: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; 80077f6: 2300 movs r3, #0 80077f8: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 80077fa: 4b1e ldr r3, [pc, #120] @ (8007874 ) 80077fc: 685b ldr r3, [r3, #4] 80077fe: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 8007800: 68fb ldr r3, [r7, #12] 8007802: f003 030c and.w r3, r3, #12 8007806: 2b04 cmp r3, #4 8007808: d002 beq.n 8007810 800780a: 2b08 cmp r3, #8 800780c: d003 beq.n 8007816 800780e: e027 b.n 8007860 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 8007810: 4b19 ldr r3, [pc, #100] @ (8007878 ) 8007812: 613b str r3, [r7, #16] break; 8007814: e027 b.n 8007866 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8007816: 68fb ldr r3, [r7, #12] 8007818: 0c9b lsrs r3, r3, #18 800781a: f003 030f and.w r3, r3, #15 800781e: 4a17 ldr r2, [pc, #92] @ (800787c ) 8007820: 5cd3 ldrb r3, [r2, r3] 8007822: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8007824: 68fb ldr r3, [r7, #12] 8007826: f403 3380 and.w r3, r3, #65536 @ 0x10000 800782a: 2b00 cmp r3, #0 800782c: d010 beq.n 8007850 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 800782e: 4b11 ldr r3, [pc, #68] @ (8007874 ) 8007830: 685b ldr r3, [r3, #4] 8007832: 0c5b lsrs r3, r3, #17 8007834: f003 0301 and.w r3, r3, #1 8007838: 4a11 ldr r2, [pc, #68] @ (8007880 ) 800783a: 5cd3 ldrb r3, [r2, r3] 800783c: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 800783e: 687b ldr r3, [r7, #4] 8007840: 4a0d ldr r2, [pc, #52] @ (8007878 ) 8007842: fb03 f202 mul.w r2, r3, r2 8007846: 68bb ldr r3, [r7, #8] 8007848: fbb2 f3f3 udiv r3, r2, r3 800784c: 617b str r3, [r7, #20] 800784e: e004 b.n 800785a #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8007850: 687b ldr r3, [r7, #4] 8007852: 4a0c ldr r2, [pc, #48] @ (8007884 ) 8007854: fb02 f303 mul.w r3, r2, r3 8007858: 617b str r3, [r7, #20] } sysclockfreq = pllclk; 800785a: 697b ldr r3, [r7, #20] 800785c: 613b str r3, [r7, #16] break; 800785e: e002 b.n 8007866 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8007860: 4b09 ldr r3, [pc, #36] @ (8007888 ) 8007862: 613b str r3, [r7, #16] break; 8007864: bf00 nop } } return sysclockfreq; 8007866: 693b ldr r3, [r7, #16] } 8007868: 4618 mov r0, r3 800786a: 371c adds r7, #28 800786c: 46bd mov sp, r7 800786e: bc80 pop {r7} 8007870: 4770 bx lr 8007872: bf00 nop 8007874: 40021000 .word 0x40021000 8007878: 00b71b00 .word 0x00b71b00 800787c: 0800e0bc .word 0x0800e0bc 8007880: 0800e0cc .word 0x0800e0cc 8007884: 003d0900 .word 0x003d0900 8007888: 007a1200 .word 0x007a1200 0800788c : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 800788c: b480 push {r7} 800788e: af00 add r7, sp, #0 return SystemCoreClock; 8007890: 4b02 ldr r3, [pc, #8] @ (800789c ) 8007892: 681b ldr r3, [r3, #0] } 8007894: 4618 mov r0, r3 8007896: 46bd mov sp, r7 8007898: bc80 pop {r7} 800789a: 4770 bx lr 800789c: 20000008 .word 0x20000008 080078a0 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 80078a0: b580 push {r7, lr} 80078a2: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 80078a4: f7ff fff2 bl 800788c 80078a8: 4602 mov r2, r0 80078aa: 4b05 ldr r3, [pc, #20] @ (80078c0 ) 80078ac: 685b ldr r3, [r3, #4] 80078ae: 0a1b lsrs r3, r3, #8 80078b0: f003 0307 and.w r3, r3, #7 80078b4: 4903 ldr r1, [pc, #12] @ (80078c4 ) 80078b6: 5ccb ldrb r3, [r1, r3] 80078b8: fa22 f303 lsr.w r3, r2, r3 } 80078bc: 4618 mov r0, r3 80078be: bd80 pop {r7, pc} 80078c0: 40021000 .word 0x40021000 80078c4: 0800e0b4 .word 0x0800e0b4 080078c8 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 80078c8: b580 push {r7, lr} 80078ca: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 80078cc: f7ff ffde bl 800788c 80078d0: 4602 mov r2, r0 80078d2: 4b05 ldr r3, [pc, #20] @ (80078e8 ) 80078d4: 685b ldr r3, [r3, #4] 80078d6: 0adb lsrs r3, r3, #11 80078d8: f003 0307 and.w r3, r3, #7 80078dc: 4903 ldr r1, [pc, #12] @ (80078ec ) 80078de: 5ccb ldrb r3, [r1, r3] 80078e0: fa22 f303 lsr.w r3, r2, r3 } 80078e4: 4618 mov r0, r3 80078e6: bd80 pop {r7, pc} 80078e8: 40021000 .word 0x40021000 80078ec: 0800e0b4 .word 0x0800e0b4 080078f0 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 80078f0: b480 push {r7} 80078f2: b085 sub sp, #20 80078f4: af00 add r7, sp, #0 80078f6: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 80078f8: 4b0a ldr r3, [pc, #40] @ (8007924 ) 80078fa: 681b ldr r3, [r3, #0] 80078fc: 4a0a ldr r2, [pc, #40] @ (8007928 ) 80078fe: fba2 2303 umull r2, r3, r2, r3 8007902: 0a5b lsrs r3, r3, #9 8007904: 687a ldr r2, [r7, #4] 8007906: fb02 f303 mul.w r3, r2, r3 800790a: 60fb str r3, [r7, #12] do { __NOP(); 800790c: bf00 nop } while (Delay --); 800790e: 68fb ldr r3, [r7, #12] 8007910: 1e5a subs r2, r3, #1 8007912: 60fa str r2, [r7, #12] 8007914: 2b00 cmp r3, #0 8007916: d1f9 bne.n 800790c } 8007918: bf00 nop 800791a: bf00 nop 800791c: 3714 adds r7, #20 800791e: 46bd mov sp, r7 8007920: bc80 pop {r7} 8007922: 4770 bx lr 8007924: 20000008 .word 0x20000008 8007928: 10624dd3 .word 0x10624dd3 0800792c : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 800792c: b580 push {r7, lr} 800792e: b086 sub sp, #24 8007930: af00 add r7, sp, #0 8007932: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 8007934: 2300 movs r3, #0 8007936: 613b str r3, [r7, #16] 8007938: 2300 movs r3, #0 800793a: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 800793c: 687b ldr r3, [r7, #4] 800793e: 681b ldr r3, [r3, #0] 8007940: f003 0301 and.w r3, r3, #1 8007944: 2b00 cmp r3, #0 8007946: d07d beq.n 8007a44 { FlagStatus pwrclkchanged = RESET; 8007948: 2300 movs r3, #0 800794a: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 800794c: 4b4f ldr r3, [pc, #316] @ (8007a8c ) 800794e: 69db ldr r3, [r3, #28] 8007950: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8007954: 2b00 cmp r3, #0 8007956: d10d bne.n 8007974 { __HAL_RCC_PWR_CLK_ENABLE(); 8007958: 4b4c ldr r3, [pc, #304] @ (8007a8c ) 800795a: 69db ldr r3, [r3, #28] 800795c: 4a4b ldr r2, [pc, #300] @ (8007a8c ) 800795e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8007962: 61d3 str r3, [r2, #28] 8007964: 4b49 ldr r3, [pc, #292] @ (8007a8c ) 8007966: 69db ldr r3, [r3, #28] 8007968: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800796c: 60bb str r3, [r7, #8] 800796e: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8007970: 2301 movs r3, #1 8007972: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007974: 4b46 ldr r3, [pc, #280] @ (8007a90 ) 8007976: 681b ldr r3, [r3, #0] 8007978: f403 7380 and.w r3, r3, #256 @ 0x100 800797c: 2b00 cmp r3, #0 800797e: d118 bne.n 80079b2 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8007980: 4b43 ldr r3, [pc, #268] @ (8007a90 ) 8007982: 681b ldr r3, [r3, #0] 8007984: 4a42 ldr r2, [pc, #264] @ (8007a90 ) 8007986: f443 7380 orr.w r3, r3, #256 @ 0x100 800798a: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 800798c: f7fc fbb8 bl 8004100 8007990: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007992: e008 b.n 80079a6 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8007994: f7fc fbb4 bl 8004100 8007998: 4602 mov r2, r0 800799a: 693b ldr r3, [r7, #16] 800799c: 1ad3 subs r3, r2, r3 800799e: 2b64 cmp r3, #100 @ 0x64 80079a0: d901 bls.n 80079a6 { return HAL_TIMEOUT; 80079a2: 2303 movs r3, #3 80079a4: e06d b.n 8007a82 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80079a6: 4b3a ldr r3, [pc, #232] @ (8007a90 ) 80079a8: 681b ldr r3, [r3, #0] 80079aa: f403 7380 and.w r3, r3, #256 @ 0x100 80079ae: 2b00 cmp r3, #0 80079b0: d0f0 beq.n 8007994 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 80079b2: 4b36 ldr r3, [pc, #216] @ (8007a8c ) 80079b4: 6a1b ldr r3, [r3, #32] 80079b6: f403 7340 and.w r3, r3, #768 @ 0x300 80079ba: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 80079bc: 68fb ldr r3, [r7, #12] 80079be: 2b00 cmp r3, #0 80079c0: d02e beq.n 8007a20 80079c2: 687b ldr r3, [r7, #4] 80079c4: 685b ldr r3, [r3, #4] 80079c6: f403 7340 and.w r3, r3, #768 @ 0x300 80079ca: 68fa ldr r2, [r7, #12] 80079cc: 429a cmp r2, r3 80079ce: d027 beq.n 8007a20 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 80079d0: 4b2e ldr r3, [pc, #184] @ (8007a8c ) 80079d2: 6a1b ldr r3, [r3, #32] 80079d4: f423 7340 bic.w r3, r3, #768 @ 0x300 80079d8: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 80079da: 4b2e ldr r3, [pc, #184] @ (8007a94 ) 80079dc: 2201 movs r2, #1 80079de: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 80079e0: 4b2c ldr r3, [pc, #176] @ (8007a94 ) 80079e2: 2200 movs r2, #0 80079e4: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 80079e6: 4a29 ldr r2, [pc, #164] @ (8007a8c ) 80079e8: 68fb ldr r3, [r7, #12] 80079ea: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 80079ec: 68fb ldr r3, [r7, #12] 80079ee: f003 0301 and.w r3, r3, #1 80079f2: 2b00 cmp r3, #0 80079f4: d014 beq.n 8007a20 { /* Get Start Tick */ tickstart = HAL_GetTick(); 80079f6: f7fc fb83 bl 8004100 80079fa: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80079fc: e00a b.n 8007a14 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80079fe: f7fc fb7f bl 8004100 8007a02: 4602 mov r2, r0 8007a04: 693b ldr r3, [r7, #16] 8007a06: 1ad3 subs r3, r2, r3 8007a08: f241 3288 movw r2, #5000 @ 0x1388 8007a0c: 4293 cmp r3, r2 8007a0e: d901 bls.n 8007a14 { return HAL_TIMEOUT; 8007a10: 2303 movs r3, #3 8007a12: e036 b.n 8007a82 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8007a14: 4b1d ldr r3, [pc, #116] @ (8007a8c ) 8007a16: 6a1b ldr r3, [r3, #32] 8007a18: f003 0302 and.w r3, r3, #2 8007a1c: 2b00 cmp r3, #0 8007a1e: d0ee beq.n 80079fe } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8007a20: 4b1a ldr r3, [pc, #104] @ (8007a8c ) 8007a22: 6a1b ldr r3, [r3, #32] 8007a24: f423 7240 bic.w r2, r3, #768 @ 0x300 8007a28: 687b ldr r3, [r7, #4] 8007a2a: 685b ldr r3, [r3, #4] 8007a2c: 4917 ldr r1, [pc, #92] @ (8007a8c ) 8007a2e: 4313 orrs r3, r2 8007a30: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8007a32: 7dfb ldrb r3, [r7, #23] 8007a34: 2b01 cmp r3, #1 8007a36: d105 bne.n 8007a44 { __HAL_RCC_PWR_CLK_DISABLE(); 8007a38: 4b14 ldr r3, [pc, #80] @ (8007a8c ) 8007a3a: 69db ldr r3, [r3, #28] 8007a3c: 4a13 ldr r2, [pc, #76] @ (8007a8c ) 8007a3e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8007a42: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8007a44: 687b ldr r3, [r7, #4] 8007a46: 681b ldr r3, [r3, #0] 8007a48: f003 0302 and.w r3, r3, #2 8007a4c: 2b00 cmp r3, #0 8007a4e: d008 beq.n 8007a62 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8007a50: 4b0e ldr r3, [pc, #56] @ (8007a8c ) 8007a52: 685b ldr r3, [r3, #4] 8007a54: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8007a58: 687b ldr r3, [r7, #4] 8007a5a: 689b ldr r3, [r3, #8] 8007a5c: 490b ldr r1, [pc, #44] @ (8007a8c ) 8007a5e: 4313 orrs r3, r2 8007a60: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8007a62: 687b ldr r3, [r7, #4] 8007a64: 681b ldr r3, [r3, #0] 8007a66: f003 0310 and.w r3, r3, #16 8007a6a: 2b00 cmp r3, #0 8007a6c: d008 beq.n 8007a80 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8007a6e: 4b07 ldr r3, [pc, #28] @ (8007a8c ) 8007a70: 685b ldr r3, [r3, #4] 8007a72: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 8007a76: 687b ldr r3, [r7, #4] 8007a78: 68db ldr r3, [r3, #12] 8007a7a: 4904 ldr r1, [pc, #16] @ (8007a8c ) 8007a7c: 4313 orrs r3, r2 8007a7e: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8007a80: 2300 movs r3, #0 } 8007a82: 4618 mov r0, r3 8007a84: 3718 adds r7, #24 8007a86: 46bd mov sp, r7 8007a88: bd80 pop {r7, pc} 8007a8a: bf00 nop 8007a8c: 40021000 .word 0x40021000 8007a90: 40007000 .word 0x40007000 8007a94: 42420440 .word 0x42420440 08007a98 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8007a98: b580 push {r7, lr} 8007a9a: b082 sub sp, #8 8007a9c: af00 add r7, sp, #0 8007a9e: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8007aa0: 687b ldr r3, [r7, #4] 8007aa2: 2b00 cmp r3, #0 8007aa4: d101 bne.n 8007aaa { return HAL_ERROR; 8007aa6: 2301 movs r3, #1 8007aa8: e041 b.n 8007b2e assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8007aaa: 687b ldr r3, [r7, #4] 8007aac: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8007ab0: b2db uxtb r3, r3 8007ab2: 2b00 cmp r3, #0 8007ab4: d106 bne.n 8007ac4 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8007ab6: 687b ldr r3, [r7, #4] 8007ab8: 2200 movs r2, #0 8007aba: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8007abe: 6878 ldr r0, [r7, #4] 8007ac0: f7fc f952 bl 8003d68 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8007ac4: 687b ldr r3, [r7, #4] 8007ac6: 2202 movs r2, #2 8007ac8: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8007acc: 687b ldr r3, [r7, #4] 8007ace: 681a ldr r2, [r3, #0] 8007ad0: 687b ldr r3, [r7, #4] 8007ad2: 3304 adds r3, #4 8007ad4: 4619 mov r1, r3 8007ad6: 4610 mov r0, r2 8007ad8: f000 fb3e bl 8008158 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8007adc: 687b ldr r3, [r7, #4] 8007ade: 2201 movs r2, #1 8007ae0: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8007ae4: 687b ldr r3, [r7, #4] 8007ae6: 2201 movs r2, #1 8007ae8: f883 203e strb.w r2, [r3, #62] @ 0x3e 8007aec: 687b ldr r3, [r7, #4] 8007aee: 2201 movs r2, #1 8007af0: f883 203f strb.w r2, [r3, #63] @ 0x3f 8007af4: 687b ldr r3, [r7, #4] 8007af6: 2201 movs r2, #1 8007af8: f883 2040 strb.w r2, [r3, #64] @ 0x40 8007afc: 687b ldr r3, [r7, #4] 8007afe: 2201 movs r2, #1 8007b00: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8007b04: 687b ldr r3, [r7, #4] 8007b06: 2201 movs r2, #1 8007b08: f883 2042 strb.w r2, [r3, #66] @ 0x42 8007b0c: 687b ldr r3, [r7, #4] 8007b0e: 2201 movs r2, #1 8007b10: f883 2043 strb.w r2, [r3, #67] @ 0x43 8007b14: 687b ldr r3, [r7, #4] 8007b16: 2201 movs r2, #1 8007b18: f883 2044 strb.w r2, [r3, #68] @ 0x44 8007b1c: 687b ldr r3, [r7, #4] 8007b1e: 2201 movs r2, #1 8007b20: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8007b24: 687b ldr r3, [r7, #4] 8007b26: 2201 movs r2, #1 8007b28: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8007b2c: 2300 movs r3, #0 } 8007b2e: 4618 mov r0, r3 8007b30: 3708 adds r7, #8 8007b32: 46bd mov sp, r7 8007b34: bd80 pop {r7, pc} 08007b36 : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8007b36: b580 push {r7, lr} 8007b38: b082 sub sp, #8 8007b3a: af00 add r7, sp, #0 8007b3c: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8007b3e: 687b ldr r3, [r7, #4] 8007b40: 2b00 cmp r3, #0 8007b42: d101 bne.n 8007b48 { return HAL_ERROR; 8007b44: 2301 movs r3, #1 8007b46: e041 b.n 8007bcc assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8007b48: 687b ldr r3, [r7, #4] 8007b4a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8007b4e: b2db uxtb r3, r3 8007b50: 2b00 cmp r3, #0 8007b52: d106 bne.n 8007b62 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8007b54: 687b ldr r3, [r7, #4] 8007b56: 2200 movs r2, #0 8007b58: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8007b5c: 6878 ldr r0, [r7, #4] 8007b5e: f000 f839 bl 8007bd4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8007b62: 687b ldr r3, [r7, #4] 8007b64: 2202 movs r2, #2 8007b66: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8007b6a: 687b ldr r3, [r7, #4] 8007b6c: 681a ldr r2, [r3, #0] 8007b6e: 687b ldr r3, [r7, #4] 8007b70: 3304 adds r3, #4 8007b72: 4619 mov r1, r3 8007b74: 4610 mov r0, r2 8007b76: f000 faef bl 8008158 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8007b7a: 687b ldr r3, [r7, #4] 8007b7c: 2201 movs r2, #1 8007b7e: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8007b82: 687b ldr r3, [r7, #4] 8007b84: 2201 movs r2, #1 8007b86: f883 203e strb.w r2, [r3, #62] @ 0x3e 8007b8a: 687b ldr r3, [r7, #4] 8007b8c: 2201 movs r2, #1 8007b8e: f883 203f strb.w r2, [r3, #63] @ 0x3f 8007b92: 687b ldr r3, [r7, #4] 8007b94: 2201 movs r2, #1 8007b96: f883 2040 strb.w r2, [r3, #64] @ 0x40 8007b9a: 687b ldr r3, [r7, #4] 8007b9c: 2201 movs r2, #1 8007b9e: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8007ba2: 687b ldr r3, [r7, #4] 8007ba4: 2201 movs r2, #1 8007ba6: f883 2042 strb.w r2, [r3, #66] @ 0x42 8007baa: 687b ldr r3, [r7, #4] 8007bac: 2201 movs r2, #1 8007bae: f883 2043 strb.w r2, [r3, #67] @ 0x43 8007bb2: 687b ldr r3, [r7, #4] 8007bb4: 2201 movs r2, #1 8007bb6: f883 2044 strb.w r2, [r3, #68] @ 0x44 8007bba: 687b ldr r3, [r7, #4] 8007bbc: 2201 movs r2, #1 8007bbe: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8007bc2: 687b ldr r3, [r7, #4] 8007bc4: 2201 movs r2, #1 8007bc6: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8007bca: 2300 movs r3, #0 } 8007bcc: 4618 mov r0, r3 8007bce: 3708 adds r7, #8 8007bd0: 46bd mov sp, r7 8007bd2: bd80 pop {r7, pc} 08007bd4 : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 8007bd4: b480 push {r7} 8007bd6: b083 sub sp, #12 8007bd8: af00 add r7, sp, #0 8007bda: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 8007bdc: bf00 nop 8007bde: 370c adds r7, #12 8007be0: 46bd mov sp, r7 8007be2: bc80 pop {r7} 8007be4: 4770 bx lr ... 08007be8 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8007be8: b580 push {r7, lr} 8007bea: b084 sub sp, #16 8007bec: af00 add r7, sp, #0 8007bee: 6078 str r0, [r7, #4] 8007bf0: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8007bf2: 683b ldr r3, [r7, #0] 8007bf4: 2b00 cmp r3, #0 8007bf6: d109 bne.n 8007c0c 8007bf8: 687b ldr r3, [r7, #4] 8007bfa: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8007bfe: b2db uxtb r3, r3 8007c00: 2b01 cmp r3, #1 8007c02: bf14 ite ne 8007c04: 2301 movne r3, #1 8007c06: 2300 moveq r3, #0 8007c08: b2db uxtb r3, r3 8007c0a: e022 b.n 8007c52 8007c0c: 683b ldr r3, [r7, #0] 8007c0e: 2b04 cmp r3, #4 8007c10: d109 bne.n 8007c26 8007c12: 687b ldr r3, [r7, #4] 8007c14: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8007c18: b2db uxtb r3, r3 8007c1a: 2b01 cmp r3, #1 8007c1c: bf14 ite ne 8007c1e: 2301 movne r3, #1 8007c20: 2300 moveq r3, #0 8007c22: b2db uxtb r3, r3 8007c24: e015 b.n 8007c52 8007c26: 683b ldr r3, [r7, #0] 8007c28: 2b08 cmp r3, #8 8007c2a: d109 bne.n 8007c40 8007c2c: 687b ldr r3, [r7, #4] 8007c2e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8007c32: b2db uxtb r3, r3 8007c34: 2b01 cmp r3, #1 8007c36: bf14 ite ne 8007c38: 2301 movne r3, #1 8007c3a: 2300 moveq r3, #0 8007c3c: b2db uxtb r3, r3 8007c3e: e008 b.n 8007c52 8007c40: 687b ldr r3, [r7, #4] 8007c42: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8007c46: b2db uxtb r3, r3 8007c48: 2b01 cmp r3, #1 8007c4a: bf14 ite ne 8007c4c: 2301 movne r3, #1 8007c4e: 2300 moveq r3, #0 8007c50: b2db uxtb r3, r3 8007c52: 2b00 cmp r3, #0 8007c54: d001 beq.n 8007c5a { return HAL_ERROR; 8007c56: 2301 movs r3, #1 8007c58: e05e b.n 8007d18 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8007c5a: 683b ldr r3, [r7, #0] 8007c5c: 2b00 cmp r3, #0 8007c5e: d104 bne.n 8007c6a 8007c60: 687b ldr r3, [r7, #4] 8007c62: 2202 movs r2, #2 8007c64: f883 203e strb.w r2, [r3, #62] @ 0x3e 8007c68: e013 b.n 8007c92 8007c6a: 683b ldr r3, [r7, #0] 8007c6c: 2b04 cmp r3, #4 8007c6e: d104 bne.n 8007c7a 8007c70: 687b ldr r3, [r7, #4] 8007c72: 2202 movs r2, #2 8007c74: f883 203f strb.w r2, [r3, #63] @ 0x3f 8007c78: e00b b.n 8007c92 8007c7a: 683b ldr r3, [r7, #0] 8007c7c: 2b08 cmp r3, #8 8007c7e: d104 bne.n 8007c8a 8007c80: 687b ldr r3, [r7, #4] 8007c82: 2202 movs r2, #2 8007c84: f883 2040 strb.w r2, [r3, #64] @ 0x40 8007c88: e003 b.n 8007c92 8007c8a: 687b ldr r3, [r7, #4] 8007c8c: 2202 movs r2, #2 8007c8e: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8007c92: 687b ldr r3, [r7, #4] 8007c94: 681b ldr r3, [r3, #0] 8007c96: 2201 movs r2, #1 8007c98: 6839 ldr r1, [r7, #0] 8007c9a: 4618 mov r0, r3 8007c9c: f000 fce8 bl 8008670 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8007ca0: 687b ldr r3, [r7, #4] 8007ca2: 681b ldr r3, [r3, #0] 8007ca4: 4a1e ldr r2, [pc, #120] @ (8007d20 ) 8007ca6: 4293 cmp r3, r2 8007ca8: d107 bne.n 8007cba { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8007caa: 687b ldr r3, [r7, #4] 8007cac: 681b ldr r3, [r3, #0] 8007cae: 6c5a ldr r2, [r3, #68] @ 0x44 8007cb0: 687b ldr r3, [r7, #4] 8007cb2: 681b ldr r3, [r3, #0] 8007cb4: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8007cb8: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8007cba: 687b ldr r3, [r7, #4] 8007cbc: 681b ldr r3, [r3, #0] 8007cbe: 4a18 ldr r2, [pc, #96] @ (8007d20 ) 8007cc0: 4293 cmp r3, r2 8007cc2: d00e beq.n 8007ce2 8007cc4: 687b ldr r3, [r7, #4] 8007cc6: 681b ldr r3, [r3, #0] 8007cc8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8007ccc: d009 beq.n 8007ce2 8007cce: 687b ldr r3, [r7, #4] 8007cd0: 681b ldr r3, [r3, #0] 8007cd2: 4a14 ldr r2, [pc, #80] @ (8007d24 ) 8007cd4: 4293 cmp r3, r2 8007cd6: d004 beq.n 8007ce2 8007cd8: 687b ldr r3, [r7, #4] 8007cda: 681b ldr r3, [r3, #0] 8007cdc: 4a12 ldr r2, [pc, #72] @ (8007d28 ) 8007cde: 4293 cmp r3, r2 8007ce0: d111 bne.n 8007d06 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8007ce2: 687b ldr r3, [r7, #4] 8007ce4: 681b ldr r3, [r3, #0] 8007ce6: 689b ldr r3, [r3, #8] 8007ce8: f003 0307 and.w r3, r3, #7 8007cec: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8007cee: 68fb ldr r3, [r7, #12] 8007cf0: 2b06 cmp r3, #6 8007cf2: d010 beq.n 8007d16 { __HAL_TIM_ENABLE(htim); 8007cf4: 687b ldr r3, [r7, #4] 8007cf6: 681b ldr r3, [r3, #0] 8007cf8: 681a ldr r2, [r3, #0] 8007cfa: 687b ldr r3, [r7, #4] 8007cfc: 681b ldr r3, [r3, #0] 8007cfe: f042 0201 orr.w r2, r2, #1 8007d02: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8007d04: e007 b.n 8007d16 } } else { __HAL_TIM_ENABLE(htim); 8007d06: 687b ldr r3, [r7, #4] 8007d08: 681b ldr r3, [r3, #0] 8007d0a: 681a ldr r2, [r3, #0] 8007d0c: 687b ldr r3, [r7, #4] 8007d0e: 681b ldr r3, [r3, #0] 8007d10: f042 0201 orr.w r2, r2, #1 8007d14: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8007d16: 2300 movs r3, #0 } 8007d18: 4618 mov r0, r3 8007d1a: 3710 adds r7, #16 8007d1c: 46bd mov sp, r7 8007d1e: bd80 pop {r7, pc} 8007d20: 40012c00 .word 0x40012c00 8007d24: 40000400 .word 0x40000400 8007d28: 40000800 .word 0x40000800 08007d2c : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) { 8007d2c: b580 push {r7, lr} 8007d2e: b082 sub sp, #8 8007d30: af00 add r7, sp, #0 8007d32: 6078 str r0, [r7, #4] 8007d34: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Disable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); 8007d36: 687b ldr r3, [r7, #4] 8007d38: 681b ldr r3, [r3, #0] 8007d3a: 2200 movs r2, #0 8007d3c: 6839 ldr r1, [r7, #0] 8007d3e: 4618 mov r0, r3 8007d40: f000 fc96 bl 8008670 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8007d44: 687b ldr r3, [r7, #4] 8007d46: 681b ldr r3, [r3, #0] 8007d48: 4a29 ldr r2, [pc, #164] @ (8007df0 ) 8007d4a: 4293 cmp r3, r2 8007d4c: d117 bne.n 8007d7e { /* Disable the Main Output */ __HAL_TIM_MOE_DISABLE(htim); 8007d4e: 687b ldr r3, [r7, #4] 8007d50: 681b ldr r3, [r3, #0] 8007d52: 6a1a ldr r2, [r3, #32] 8007d54: f241 1311 movw r3, #4369 @ 0x1111 8007d58: 4013 ands r3, r2 8007d5a: 2b00 cmp r3, #0 8007d5c: d10f bne.n 8007d7e 8007d5e: 687b ldr r3, [r7, #4] 8007d60: 681b ldr r3, [r3, #0] 8007d62: 6a1a ldr r2, [r3, #32] 8007d64: f240 4344 movw r3, #1092 @ 0x444 8007d68: 4013 ands r3, r2 8007d6a: 2b00 cmp r3, #0 8007d6c: d107 bne.n 8007d7e 8007d6e: 687b ldr r3, [r7, #4] 8007d70: 681b ldr r3, [r3, #0] 8007d72: 6c5a ldr r2, [r3, #68] @ 0x44 8007d74: 687b ldr r3, [r7, #4] 8007d76: 681b ldr r3, [r3, #0] 8007d78: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8007d7c: 645a str r2, [r3, #68] @ 0x44 } /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); 8007d7e: 687b ldr r3, [r7, #4] 8007d80: 681b ldr r3, [r3, #0] 8007d82: 6a1a ldr r2, [r3, #32] 8007d84: f241 1311 movw r3, #4369 @ 0x1111 8007d88: 4013 ands r3, r2 8007d8a: 2b00 cmp r3, #0 8007d8c: d10f bne.n 8007dae 8007d8e: 687b ldr r3, [r7, #4] 8007d90: 681b ldr r3, [r3, #0] 8007d92: 6a1a ldr r2, [r3, #32] 8007d94: f240 4344 movw r3, #1092 @ 0x444 8007d98: 4013 ands r3, r2 8007d9a: 2b00 cmp r3, #0 8007d9c: d107 bne.n 8007dae 8007d9e: 687b ldr r3, [r7, #4] 8007da0: 681b ldr r3, [r3, #0] 8007da2: 681a ldr r2, [r3, #0] 8007da4: 687b ldr r3, [r7, #4] 8007da6: 681b ldr r3, [r3, #0] 8007da8: f022 0201 bic.w r2, r2, #1 8007dac: 601a str r2, [r3, #0] /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 8007dae: 683b ldr r3, [r7, #0] 8007db0: 2b00 cmp r3, #0 8007db2: d104 bne.n 8007dbe 8007db4: 687b ldr r3, [r7, #4] 8007db6: 2201 movs r2, #1 8007db8: f883 203e strb.w r2, [r3, #62] @ 0x3e 8007dbc: e013 b.n 8007de6 8007dbe: 683b ldr r3, [r7, #0] 8007dc0: 2b04 cmp r3, #4 8007dc2: d104 bne.n 8007dce 8007dc4: 687b ldr r3, [r7, #4] 8007dc6: 2201 movs r2, #1 8007dc8: f883 203f strb.w r2, [r3, #63] @ 0x3f 8007dcc: e00b b.n 8007de6 8007dce: 683b ldr r3, [r7, #0] 8007dd0: 2b08 cmp r3, #8 8007dd2: d104 bne.n 8007dde 8007dd4: 687b ldr r3, [r7, #4] 8007dd6: 2201 movs r2, #1 8007dd8: f883 2040 strb.w r2, [r3, #64] @ 0x40 8007ddc: e003 b.n 8007de6 8007dde: 687b ldr r3, [r7, #4] 8007de0: 2201 movs r2, #1 8007de2: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Return function status */ return HAL_OK; 8007de6: 2300 movs r3, #0 } 8007de8: 4618 mov r0, r3 8007dea: 3708 adds r7, #8 8007dec: 46bd mov sp, r7 8007dee: bd80 pop {r7, pc} 8007df0: 40012c00 .word 0x40012c00 08007df4 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8007df4: b580 push {r7, lr} 8007df6: b086 sub sp, #24 8007df8: af00 add r7, sp, #0 8007dfa: 60f8 str r0, [r7, #12] 8007dfc: 60b9 str r1, [r7, #8] 8007dfe: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8007e00: 2300 movs r3, #0 8007e02: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8007e04: 68fb ldr r3, [r7, #12] 8007e06: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8007e0a: 2b01 cmp r3, #1 8007e0c: d101 bne.n 8007e12 8007e0e: 2302 movs r3, #2 8007e10: e0ae b.n 8007f70 8007e12: 68fb ldr r3, [r7, #12] 8007e14: 2201 movs r2, #1 8007e16: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8007e1a: 687b ldr r3, [r7, #4] 8007e1c: 2b0c cmp r3, #12 8007e1e: f200 809f bhi.w 8007f60 8007e22: a201 add r2, pc, #4 @ (adr r2, 8007e28 ) 8007e24: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8007e28: 08007e5d .word 0x08007e5d 8007e2c: 08007f61 .word 0x08007f61 8007e30: 08007f61 .word 0x08007f61 8007e34: 08007f61 .word 0x08007f61 8007e38: 08007e9d .word 0x08007e9d 8007e3c: 08007f61 .word 0x08007f61 8007e40: 08007f61 .word 0x08007f61 8007e44: 08007f61 .word 0x08007f61 8007e48: 08007edf .word 0x08007edf 8007e4c: 08007f61 .word 0x08007f61 8007e50: 08007f61 .word 0x08007f61 8007e54: 08007f61 .word 0x08007f61 8007e58: 08007f1f .word 0x08007f1f { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8007e5c: 68fb ldr r3, [r7, #12] 8007e5e: 681b ldr r3, [r3, #0] 8007e60: 68b9 ldr r1, [r7, #8] 8007e62: 4618 mov r0, r3 8007e64: f000 f9e6 bl 8008234 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 8007e68: 68fb ldr r3, [r7, #12] 8007e6a: 681b ldr r3, [r3, #0] 8007e6c: 699a ldr r2, [r3, #24] 8007e6e: 68fb ldr r3, [r7, #12] 8007e70: 681b ldr r3, [r3, #0] 8007e72: f042 0208 orr.w r2, r2, #8 8007e76: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 8007e78: 68fb ldr r3, [r7, #12] 8007e7a: 681b ldr r3, [r3, #0] 8007e7c: 699a ldr r2, [r3, #24] 8007e7e: 68fb ldr r3, [r7, #12] 8007e80: 681b ldr r3, [r3, #0] 8007e82: f022 0204 bic.w r2, r2, #4 8007e86: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 8007e88: 68fb ldr r3, [r7, #12] 8007e8a: 681b ldr r3, [r3, #0] 8007e8c: 6999 ldr r1, [r3, #24] 8007e8e: 68bb ldr r3, [r7, #8] 8007e90: 691a ldr r2, [r3, #16] 8007e92: 68fb ldr r3, [r7, #12] 8007e94: 681b ldr r3, [r3, #0] 8007e96: 430a orrs r2, r1 8007e98: 619a str r2, [r3, #24] break; 8007e9a: e064 b.n 8007f66 { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8007e9c: 68fb ldr r3, [r7, #12] 8007e9e: 681b ldr r3, [r3, #0] 8007ea0: 68b9 ldr r1, [r7, #8] 8007ea2: 4618 mov r0, r3 8007ea4: f000 fa2c bl 8008300 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 8007ea8: 68fb ldr r3, [r7, #12] 8007eaa: 681b ldr r3, [r3, #0] 8007eac: 699a ldr r2, [r3, #24] 8007eae: 68fb ldr r3, [r7, #12] 8007eb0: 681b ldr r3, [r3, #0] 8007eb2: f442 6200 orr.w r2, r2, #2048 @ 0x800 8007eb6: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 8007eb8: 68fb ldr r3, [r7, #12] 8007eba: 681b ldr r3, [r3, #0] 8007ebc: 699a ldr r2, [r3, #24] 8007ebe: 68fb ldr r3, [r7, #12] 8007ec0: 681b ldr r3, [r3, #0] 8007ec2: f422 6280 bic.w r2, r2, #1024 @ 0x400 8007ec6: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 8007ec8: 68fb ldr r3, [r7, #12] 8007eca: 681b ldr r3, [r3, #0] 8007ecc: 6999 ldr r1, [r3, #24] 8007ece: 68bb ldr r3, [r7, #8] 8007ed0: 691b ldr r3, [r3, #16] 8007ed2: 021a lsls r2, r3, #8 8007ed4: 68fb ldr r3, [r7, #12] 8007ed6: 681b ldr r3, [r3, #0] 8007ed8: 430a orrs r2, r1 8007eda: 619a str r2, [r3, #24] break; 8007edc: e043 b.n 8007f66 { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8007ede: 68fb ldr r3, [r7, #12] 8007ee0: 681b ldr r3, [r3, #0] 8007ee2: 68b9 ldr r1, [r7, #8] 8007ee4: 4618 mov r0, r3 8007ee6: f000 fa75 bl 80083d4 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 8007eea: 68fb ldr r3, [r7, #12] 8007eec: 681b ldr r3, [r3, #0] 8007eee: 69da ldr r2, [r3, #28] 8007ef0: 68fb ldr r3, [r7, #12] 8007ef2: 681b ldr r3, [r3, #0] 8007ef4: f042 0208 orr.w r2, r2, #8 8007ef8: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 8007efa: 68fb ldr r3, [r7, #12] 8007efc: 681b ldr r3, [r3, #0] 8007efe: 69da ldr r2, [r3, #28] 8007f00: 68fb ldr r3, [r7, #12] 8007f02: 681b ldr r3, [r3, #0] 8007f04: f022 0204 bic.w r2, r2, #4 8007f08: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 8007f0a: 68fb ldr r3, [r7, #12] 8007f0c: 681b ldr r3, [r3, #0] 8007f0e: 69d9 ldr r1, [r3, #28] 8007f10: 68bb ldr r3, [r7, #8] 8007f12: 691a ldr r2, [r3, #16] 8007f14: 68fb ldr r3, [r7, #12] 8007f16: 681b ldr r3, [r3, #0] 8007f18: 430a orrs r2, r1 8007f1a: 61da str r2, [r3, #28] break; 8007f1c: e023 b.n 8007f66 { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 8007f1e: 68fb ldr r3, [r7, #12] 8007f20: 681b ldr r3, [r3, #0] 8007f22: 68b9 ldr r1, [r7, #8] 8007f24: 4618 mov r0, r3 8007f26: f000 fabf bl 80084a8 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 8007f2a: 68fb ldr r3, [r7, #12] 8007f2c: 681b ldr r3, [r3, #0] 8007f2e: 69da ldr r2, [r3, #28] 8007f30: 68fb ldr r3, [r7, #12] 8007f32: 681b ldr r3, [r3, #0] 8007f34: f442 6200 orr.w r2, r2, #2048 @ 0x800 8007f38: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 8007f3a: 68fb ldr r3, [r7, #12] 8007f3c: 681b ldr r3, [r3, #0] 8007f3e: 69da ldr r2, [r3, #28] 8007f40: 68fb ldr r3, [r7, #12] 8007f42: 681b ldr r3, [r3, #0] 8007f44: f422 6280 bic.w r2, r2, #1024 @ 0x400 8007f48: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 8007f4a: 68fb ldr r3, [r7, #12] 8007f4c: 681b ldr r3, [r3, #0] 8007f4e: 69d9 ldr r1, [r3, #28] 8007f50: 68bb ldr r3, [r7, #8] 8007f52: 691b ldr r3, [r3, #16] 8007f54: 021a lsls r2, r3, #8 8007f56: 68fb ldr r3, [r7, #12] 8007f58: 681b ldr r3, [r3, #0] 8007f5a: 430a orrs r2, r1 8007f5c: 61da str r2, [r3, #28] break; 8007f5e: e002 b.n 8007f66 } default: status = HAL_ERROR; 8007f60: 2301 movs r3, #1 8007f62: 75fb strb r3, [r7, #23] break; 8007f64: bf00 nop } __HAL_UNLOCK(htim); 8007f66: 68fb ldr r3, [r7, #12] 8007f68: 2200 movs r2, #0 8007f6a: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8007f6e: 7dfb ldrb r3, [r7, #23] } 8007f70: 4618 mov r0, r3 8007f72: 3718 adds r7, #24 8007f74: 46bd mov sp, r7 8007f76: bd80 pop {r7, pc} 08007f78 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 8007f78: b580 push {r7, lr} 8007f7a: b084 sub sp, #16 8007f7c: af00 add r7, sp, #0 8007f7e: 6078 str r0, [r7, #4] 8007f80: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8007f82: 2300 movs r3, #0 8007f84: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 8007f86: 687b ldr r3, [r7, #4] 8007f88: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8007f8c: 2b01 cmp r3, #1 8007f8e: d101 bne.n 8007f94 8007f90: 2302 movs r3, #2 8007f92: e0b4 b.n 80080fe 8007f94: 687b ldr r3, [r7, #4] 8007f96: 2201 movs r2, #1 8007f98: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 8007f9c: 687b ldr r3, [r7, #4] 8007f9e: 2202 movs r2, #2 8007fa0: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 8007fa4: 687b ldr r3, [r7, #4] 8007fa6: 681b ldr r3, [r3, #0] 8007fa8: 689b ldr r3, [r3, #8] 8007faa: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 8007fac: 68bb ldr r3, [r7, #8] 8007fae: f023 0377 bic.w r3, r3, #119 @ 0x77 8007fb2: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8007fb4: 68bb ldr r3, [r7, #8] 8007fb6: f423 437f bic.w r3, r3, #65280 @ 0xff00 8007fba: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 8007fbc: 687b ldr r3, [r7, #4] 8007fbe: 681b ldr r3, [r3, #0] 8007fc0: 68ba ldr r2, [r7, #8] 8007fc2: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 8007fc4: 683b ldr r3, [r7, #0] 8007fc6: 681b ldr r3, [r3, #0] 8007fc8: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8007fcc: d03e beq.n 800804c 8007fce: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8007fd2: f200 8087 bhi.w 80080e4 8007fd6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8007fda: f000 8086 beq.w 80080ea 8007fde: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8007fe2: d87f bhi.n 80080e4 8007fe4: 2b70 cmp r3, #112 @ 0x70 8007fe6: d01a beq.n 800801e 8007fe8: 2b70 cmp r3, #112 @ 0x70 8007fea: d87b bhi.n 80080e4 8007fec: 2b60 cmp r3, #96 @ 0x60 8007fee: d050 beq.n 8008092 8007ff0: 2b60 cmp r3, #96 @ 0x60 8007ff2: d877 bhi.n 80080e4 8007ff4: 2b50 cmp r3, #80 @ 0x50 8007ff6: d03c beq.n 8008072 8007ff8: 2b50 cmp r3, #80 @ 0x50 8007ffa: d873 bhi.n 80080e4 8007ffc: 2b40 cmp r3, #64 @ 0x40 8007ffe: d058 beq.n 80080b2 8008000: 2b40 cmp r3, #64 @ 0x40 8008002: d86f bhi.n 80080e4 8008004: 2b30 cmp r3, #48 @ 0x30 8008006: d064 beq.n 80080d2 8008008: 2b30 cmp r3, #48 @ 0x30 800800a: d86b bhi.n 80080e4 800800c: 2b20 cmp r3, #32 800800e: d060 beq.n 80080d2 8008010: 2b20 cmp r3, #32 8008012: d867 bhi.n 80080e4 8008014: 2b00 cmp r3, #0 8008016: d05c beq.n 80080d2 8008018: 2b10 cmp r3, #16 800801a: d05a beq.n 80080d2 800801c: e062 b.n 80080e4 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 800801e: 687b ldr r3, [r7, #4] 8008020: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8008022: 683b ldr r3, [r7, #0] 8008024: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8008026: 683b ldr r3, [r7, #0] 8008028: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 800802a: 683b ldr r3, [r7, #0] 800802c: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 800802e: f000 fb00 bl 8008632 /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 8008032: 687b ldr r3, [r7, #4] 8008034: 681b ldr r3, [r3, #0] 8008036: 689b ldr r3, [r3, #8] 8008038: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 800803a: 68bb ldr r3, [r7, #8] 800803c: f043 0377 orr.w r3, r3, #119 @ 0x77 8008040: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8008042: 687b ldr r3, [r7, #4] 8008044: 681b ldr r3, [r3, #0] 8008046: 68ba ldr r2, [r7, #8] 8008048: 609a str r2, [r3, #8] break; 800804a: e04f b.n 80080ec assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 800804c: 687b ldr r3, [r7, #4] 800804e: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8008050: 683b ldr r3, [r7, #0] 8008052: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 8008054: 683b ldr r3, [r7, #0] 8008056: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8008058: 683b ldr r3, [r7, #0] 800805a: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 800805c: f000 fae9 bl 8008632 /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 8008060: 687b ldr r3, [r7, #4] 8008062: 681b ldr r3, [r3, #0] 8008064: 689a ldr r2, [r3, #8] 8008066: 687b ldr r3, [r7, #4] 8008068: 681b ldr r3, [r3, #0] 800806a: f442 4280 orr.w r2, r2, #16384 @ 0x4000 800806e: 609a str r2, [r3, #8] break; 8008070: e03c b.n 80080ec /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8008072: 687b ldr r3, [r7, #4] 8008074: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8008076: 683b ldr r3, [r7, #0] 8008078: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 800807a: 683b ldr r3, [r7, #0] 800807c: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 800807e: 461a mov r2, r3 8008080: f000 fa60 bl 8008544 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 8008084: 687b ldr r3, [r7, #4] 8008086: 681b ldr r3, [r3, #0] 8008088: 2150 movs r1, #80 @ 0x50 800808a: 4618 mov r0, r3 800808c: f000 fab7 bl 80085fe break; 8008090: e02c b.n 80080ec /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 8008092: 687b ldr r3, [r7, #4] 8008094: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 8008096: 683b ldr r3, [r7, #0] 8008098: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 800809a: 683b ldr r3, [r7, #0] 800809c: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 800809e: 461a mov r2, r3 80080a0: f000 fa7e bl 80085a0 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 80080a4: 687b ldr r3, [r7, #4] 80080a6: 681b ldr r3, [r3, #0] 80080a8: 2160 movs r1, #96 @ 0x60 80080aa: 4618 mov r0, r3 80080ac: f000 faa7 bl 80085fe break; 80080b0: e01c b.n 80080ec /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 80080b2: 687b ldr r3, [r7, #4] 80080b4: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 80080b6: 683b ldr r3, [r7, #0] 80080b8: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 80080ba: 683b ldr r3, [r7, #0] 80080bc: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 80080be: 461a mov r2, r3 80080c0: f000 fa40 bl 8008544 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 80080c4: 687b ldr r3, [r7, #4] 80080c6: 681b ldr r3, [r3, #0] 80080c8: 2140 movs r1, #64 @ 0x40 80080ca: 4618 mov r0, r3 80080cc: f000 fa97 bl 80085fe break; 80080d0: e00c b.n 80080ec case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 80080d2: 687b ldr r3, [r7, #4] 80080d4: 681a ldr r2, [r3, #0] 80080d6: 683b ldr r3, [r7, #0] 80080d8: 681b ldr r3, [r3, #0] 80080da: 4619 mov r1, r3 80080dc: 4610 mov r0, r2 80080de: f000 fa8e bl 80085fe break; 80080e2: e003 b.n 80080ec } default: status = HAL_ERROR; 80080e4: 2301 movs r3, #1 80080e6: 73fb strb r3, [r7, #15] break; 80080e8: e000 b.n 80080ec break; 80080ea: bf00 nop } htim->State = HAL_TIM_STATE_READY; 80080ec: 687b ldr r3, [r7, #4] 80080ee: 2201 movs r2, #1 80080f0: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 80080f4: 687b ldr r3, [r7, #4] 80080f6: 2200 movs r2, #0 80080f8: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 80080fc: 7bfb ldrb r3, [r7, #15] } 80080fe: 4618 mov r0, r3 8008100: 3710 adds r7, #16 8008102: 46bd mov sp, r7 8008104: bd80 pop {r7, pc} 08008106 : * @arg TIM_CHANNEL_5: TIM Channel 5 * @arg TIM_CHANNEL_6: TIM Channel 6 * @retval TIM Channel state */ HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel) { 8008106: b480 push {r7} 8008108: b085 sub sp, #20 800810a: af00 add r7, sp, #0 800810c: 6078 str r0, [r7, #4] 800810e: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef channel_state; /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); 8008110: 683b ldr r3, [r7, #0] 8008112: 2b00 cmp r3, #0 8008114: d104 bne.n 8008120 8008116: 687b ldr r3, [r7, #4] 8008118: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 800811c: b2db uxtb r3, r3 800811e: e013 b.n 8008148 8008120: 683b ldr r3, [r7, #0] 8008122: 2b04 cmp r3, #4 8008124: d104 bne.n 8008130 8008126: 687b ldr r3, [r7, #4] 8008128: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 800812c: b2db uxtb r3, r3 800812e: e00b b.n 8008148 8008130: 683b ldr r3, [r7, #0] 8008132: 2b08 cmp r3, #8 8008134: d104 bne.n 8008140 8008136: 687b ldr r3, [r7, #4] 8008138: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 800813c: b2db uxtb r3, r3 800813e: e003 b.n 8008148 8008140: 687b ldr r3, [r7, #4] 8008142: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8008146: b2db uxtb r3, r3 8008148: 73fb strb r3, [r7, #15] return channel_state; 800814a: 7bfb ldrb r3, [r7, #15] } 800814c: 4618 mov r0, r3 800814e: 3714 adds r7, #20 8008150: 46bd mov sp, r7 8008152: bc80 pop {r7} 8008154: 4770 bx lr ... 08008158 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 8008158: b480 push {r7} 800815a: b085 sub sp, #20 800815c: af00 add r7, sp, #0 800815e: 6078 str r0, [r7, #4] 8008160: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 8008162: 687b ldr r3, [r7, #4] 8008164: 681b ldr r3, [r3, #0] 8008166: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8008168: 687b ldr r3, [r7, #4] 800816a: 4a2f ldr r2, [pc, #188] @ (8008228 ) 800816c: 4293 cmp r3, r2 800816e: d00b beq.n 8008188 8008170: 687b ldr r3, [r7, #4] 8008172: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8008176: d007 beq.n 8008188 8008178: 687b ldr r3, [r7, #4] 800817a: 4a2c ldr r2, [pc, #176] @ (800822c ) 800817c: 4293 cmp r3, r2 800817e: d003 beq.n 8008188 8008180: 687b ldr r3, [r7, #4] 8008182: 4a2b ldr r2, [pc, #172] @ (8008230 ) 8008184: 4293 cmp r3, r2 8008186: d108 bne.n 800819a { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8008188: 68fb ldr r3, [r7, #12] 800818a: f023 0370 bic.w r3, r3, #112 @ 0x70 800818e: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 8008190: 683b ldr r3, [r7, #0] 8008192: 685b ldr r3, [r3, #4] 8008194: 68fa ldr r2, [r7, #12] 8008196: 4313 orrs r3, r2 8008198: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800819a: 687b ldr r3, [r7, #4] 800819c: 4a22 ldr r2, [pc, #136] @ (8008228 ) 800819e: 4293 cmp r3, r2 80081a0: d00b beq.n 80081ba 80081a2: 687b ldr r3, [r7, #4] 80081a4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80081a8: d007 beq.n 80081ba 80081aa: 687b ldr r3, [r7, #4] 80081ac: 4a1f ldr r2, [pc, #124] @ (800822c ) 80081ae: 4293 cmp r3, r2 80081b0: d003 beq.n 80081ba 80081b2: 687b ldr r3, [r7, #4] 80081b4: 4a1e ldr r2, [pc, #120] @ (8008230 ) 80081b6: 4293 cmp r3, r2 80081b8: d108 bne.n 80081cc { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 80081ba: 68fb ldr r3, [r7, #12] 80081bc: f423 7340 bic.w r3, r3, #768 @ 0x300 80081c0: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 80081c2: 683b ldr r3, [r7, #0] 80081c4: 68db ldr r3, [r3, #12] 80081c6: 68fa ldr r2, [r7, #12] 80081c8: 4313 orrs r3, r2 80081ca: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80081cc: 68fb ldr r3, [r7, #12] 80081ce: f023 0280 bic.w r2, r3, #128 @ 0x80 80081d2: 683b ldr r3, [r7, #0] 80081d4: 695b ldr r3, [r3, #20] 80081d6: 4313 orrs r3, r2 80081d8: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 80081da: 687b ldr r3, [r7, #4] 80081dc: 68fa ldr r2, [r7, #12] 80081de: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80081e0: 683b ldr r3, [r7, #0] 80081e2: 689a ldr r2, [r3, #8] 80081e4: 687b ldr r3, [r7, #4] 80081e6: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 80081e8: 683b ldr r3, [r7, #0] 80081ea: 681a ldr r2, [r3, #0] 80081ec: 687b ldr r3, [r7, #4] 80081ee: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 80081f0: 687b ldr r3, [r7, #4] 80081f2: 4a0d ldr r2, [pc, #52] @ (8008228 ) 80081f4: 4293 cmp r3, r2 80081f6: d103 bne.n 8008200 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 80081f8: 683b ldr r3, [r7, #0] 80081fa: 691a ldr r2, [r3, #16] 80081fc: 687b ldr r3, [r7, #4] 80081fe: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8008200: 687b ldr r3, [r7, #4] 8008202: 2201 movs r2, #1 8008204: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 8008206: 687b ldr r3, [r7, #4] 8008208: 691b ldr r3, [r3, #16] 800820a: f003 0301 and.w r3, r3, #1 800820e: 2b00 cmp r3, #0 8008210: d005 beq.n 800821e { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 8008212: 687b ldr r3, [r7, #4] 8008214: 691b ldr r3, [r3, #16] 8008216: f023 0201 bic.w r2, r3, #1 800821a: 687b ldr r3, [r7, #4] 800821c: 611a str r2, [r3, #16] } } 800821e: bf00 nop 8008220: 3714 adds r7, #20 8008222: 46bd mov sp, r7 8008224: bc80 pop {r7} 8008226: 4770 bx lr 8008228: 40012c00 .word 0x40012c00 800822c: 40000400 .word 0x40000400 8008230: 40000800 .word 0x40000800 08008234 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8008234: b480 push {r7} 8008236: b087 sub sp, #28 8008238: af00 add r7, sp, #0 800823a: 6078 str r0, [r7, #4] 800823c: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800823e: 687b ldr r3, [r7, #4] 8008240: 6a1b ldr r3, [r3, #32] 8008242: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 8008244: 687b ldr r3, [r7, #4] 8008246: 6a1b ldr r3, [r3, #32] 8008248: f023 0201 bic.w r2, r3, #1 800824c: 687b ldr r3, [r7, #4] 800824e: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8008250: 687b ldr r3, [r7, #4] 8008252: 685b ldr r3, [r3, #4] 8008254: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8008256: 687b ldr r3, [r7, #4] 8008258: 699b ldr r3, [r3, #24] 800825a: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 800825c: 68fb ldr r3, [r7, #12] 800825e: f023 0370 bic.w r3, r3, #112 @ 0x70 8008262: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 8008264: 68fb ldr r3, [r7, #12] 8008266: f023 0303 bic.w r3, r3, #3 800826a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 800826c: 683b ldr r3, [r7, #0] 800826e: 681b ldr r3, [r3, #0] 8008270: 68fa ldr r2, [r7, #12] 8008272: 4313 orrs r3, r2 8008274: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 8008276: 697b ldr r3, [r7, #20] 8008278: f023 0302 bic.w r3, r3, #2 800827c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 800827e: 683b ldr r3, [r7, #0] 8008280: 689b ldr r3, [r3, #8] 8008282: 697a ldr r2, [r7, #20] 8008284: 4313 orrs r3, r2 8008286: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 8008288: 687b ldr r3, [r7, #4] 800828a: 4a1c ldr r2, [pc, #112] @ (80082fc ) 800828c: 4293 cmp r3, r2 800828e: d10c bne.n 80082aa { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 8008290: 697b ldr r3, [r7, #20] 8008292: f023 0308 bic.w r3, r3, #8 8008296: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 8008298: 683b ldr r3, [r7, #0] 800829a: 68db ldr r3, [r3, #12] 800829c: 697a ldr r2, [r7, #20] 800829e: 4313 orrs r3, r2 80082a0: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 80082a2: 697b ldr r3, [r7, #20] 80082a4: f023 0304 bic.w r3, r3, #4 80082a8: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80082aa: 687b ldr r3, [r7, #4] 80082ac: 4a13 ldr r2, [pc, #76] @ (80082fc ) 80082ae: 4293 cmp r3, r2 80082b0: d111 bne.n 80082d6 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 80082b2: 693b ldr r3, [r7, #16] 80082b4: f423 7380 bic.w r3, r3, #256 @ 0x100 80082b8: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 80082ba: 693b ldr r3, [r7, #16] 80082bc: f423 7300 bic.w r3, r3, #512 @ 0x200 80082c0: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 80082c2: 683b ldr r3, [r7, #0] 80082c4: 695b ldr r3, [r3, #20] 80082c6: 693a ldr r2, [r7, #16] 80082c8: 4313 orrs r3, r2 80082ca: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 80082cc: 683b ldr r3, [r7, #0] 80082ce: 699b ldr r3, [r3, #24] 80082d0: 693a ldr r2, [r7, #16] 80082d2: 4313 orrs r3, r2 80082d4: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80082d6: 687b ldr r3, [r7, #4] 80082d8: 693a ldr r2, [r7, #16] 80082da: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80082dc: 687b ldr r3, [r7, #4] 80082de: 68fa ldr r2, [r7, #12] 80082e0: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 80082e2: 683b ldr r3, [r7, #0] 80082e4: 685a ldr r2, [r3, #4] 80082e6: 687b ldr r3, [r7, #4] 80082e8: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80082ea: 687b ldr r3, [r7, #4] 80082ec: 697a ldr r2, [r7, #20] 80082ee: 621a str r2, [r3, #32] } 80082f0: bf00 nop 80082f2: 371c adds r7, #28 80082f4: 46bd mov sp, r7 80082f6: bc80 pop {r7} 80082f8: 4770 bx lr 80082fa: bf00 nop 80082fc: 40012c00 .word 0x40012c00 08008300 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8008300: b480 push {r7} 8008302: b087 sub sp, #28 8008304: af00 add r7, sp, #0 8008306: 6078 str r0, [r7, #4] 8008308: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800830a: 687b ldr r3, [r7, #4] 800830c: 6a1b ldr r3, [r3, #32] 800830e: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8008310: 687b ldr r3, [r7, #4] 8008312: 6a1b ldr r3, [r3, #32] 8008314: f023 0210 bic.w r2, r3, #16 8008318: 687b ldr r3, [r7, #4] 800831a: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 800831c: 687b ldr r3, [r7, #4] 800831e: 685b ldr r3, [r3, #4] 8008320: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8008322: 687b ldr r3, [r7, #4] 8008324: 699b ldr r3, [r3, #24] 8008326: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8008328: 68fb ldr r3, [r7, #12] 800832a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800832e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 8008330: 68fb ldr r3, [r7, #12] 8008332: f423 7340 bic.w r3, r3, #768 @ 0x300 8008336: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8008338: 683b ldr r3, [r7, #0] 800833a: 681b ldr r3, [r3, #0] 800833c: 021b lsls r3, r3, #8 800833e: 68fa ldr r2, [r7, #12] 8008340: 4313 orrs r3, r2 8008342: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 8008344: 697b ldr r3, [r7, #20] 8008346: f023 0320 bic.w r3, r3, #32 800834a: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 800834c: 683b ldr r3, [r7, #0] 800834e: 689b ldr r3, [r3, #8] 8008350: 011b lsls r3, r3, #4 8008352: 697a ldr r2, [r7, #20] 8008354: 4313 orrs r3, r2 8008356: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8008358: 687b ldr r3, [r7, #4] 800835a: 4a1d ldr r2, [pc, #116] @ (80083d0 ) 800835c: 4293 cmp r3, r2 800835e: d10d bne.n 800837c { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8008360: 697b ldr r3, [r7, #20] 8008362: f023 0380 bic.w r3, r3, #128 @ 0x80 8008366: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 8008368: 683b ldr r3, [r7, #0] 800836a: 68db ldr r3, [r3, #12] 800836c: 011b lsls r3, r3, #4 800836e: 697a ldr r2, [r7, #20] 8008370: 4313 orrs r3, r2 8008372: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8008374: 697b ldr r3, [r7, #20] 8008376: f023 0340 bic.w r3, r3, #64 @ 0x40 800837a: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 800837c: 687b ldr r3, [r7, #4] 800837e: 4a14 ldr r2, [pc, #80] @ (80083d0 ) 8008380: 4293 cmp r3, r2 8008382: d113 bne.n 80083ac /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 8008384: 693b ldr r3, [r7, #16] 8008386: f423 6380 bic.w r3, r3, #1024 @ 0x400 800838a: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 800838c: 693b ldr r3, [r7, #16] 800838e: f423 6300 bic.w r3, r3, #2048 @ 0x800 8008392: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 8008394: 683b ldr r3, [r7, #0] 8008396: 695b ldr r3, [r3, #20] 8008398: 009b lsls r3, r3, #2 800839a: 693a ldr r2, [r7, #16] 800839c: 4313 orrs r3, r2 800839e: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 80083a0: 683b ldr r3, [r7, #0] 80083a2: 699b ldr r3, [r3, #24] 80083a4: 009b lsls r3, r3, #2 80083a6: 693a ldr r2, [r7, #16] 80083a8: 4313 orrs r3, r2 80083aa: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80083ac: 687b ldr r3, [r7, #4] 80083ae: 693a ldr r2, [r7, #16] 80083b0: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80083b2: 687b ldr r3, [r7, #4] 80083b4: 68fa ldr r2, [r7, #12] 80083b6: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 80083b8: 683b ldr r3, [r7, #0] 80083ba: 685a ldr r2, [r3, #4] 80083bc: 687b ldr r3, [r7, #4] 80083be: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80083c0: 687b ldr r3, [r7, #4] 80083c2: 697a ldr r2, [r7, #20] 80083c4: 621a str r2, [r3, #32] } 80083c6: bf00 nop 80083c8: 371c adds r7, #28 80083ca: 46bd mov sp, r7 80083cc: bc80 pop {r7} 80083ce: 4770 bx lr 80083d0: 40012c00 .word 0x40012c00 080083d4 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80083d4: b480 push {r7} 80083d6: b087 sub sp, #28 80083d8: af00 add r7, sp, #0 80083da: 6078 str r0, [r7, #4] 80083dc: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80083de: 687b ldr r3, [r7, #4] 80083e0: 6a1b ldr r3, [r3, #32] 80083e2: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 80083e4: 687b ldr r3, [r7, #4] 80083e6: 6a1b ldr r3, [r3, #32] 80083e8: f423 7280 bic.w r2, r3, #256 @ 0x100 80083ec: 687b ldr r3, [r7, #4] 80083ee: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80083f0: 687b ldr r3, [r7, #4] 80083f2: 685b ldr r3, [r3, #4] 80083f4: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80083f6: 687b ldr r3, [r7, #4] 80083f8: 69db ldr r3, [r3, #28] 80083fa: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 80083fc: 68fb ldr r3, [r7, #12] 80083fe: f023 0370 bic.w r3, r3, #112 @ 0x70 8008402: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 8008404: 68fb ldr r3, [r7, #12] 8008406: f023 0303 bic.w r3, r3, #3 800840a: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 800840c: 683b ldr r3, [r7, #0] 800840e: 681b ldr r3, [r3, #0] 8008410: 68fa ldr r2, [r7, #12] 8008412: 4313 orrs r3, r2 8008414: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 8008416: 697b ldr r3, [r7, #20] 8008418: f423 7300 bic.w r3, r3, #512 @ 0x200 800841c: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 800841e: 683b ldr r3, [r7, #0] 8008420: 689b ldr r3, [r3, #8] 8008422: 021b lsls r3, r3, #8 8008424: 697a ldr r2, [r7, #20] 8008426: 4313 orrs r3, r2 8008428: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 800842a: 687b ldr r3, [r7, #4] 800842c: 4a1d ldr r2, [pc, #116] @ (80084a4 ) 800842e: 4293 cmp r3, r2 8008430: d10d bne.n 800844e { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 8008432: 697b ldr r3, [r7, #20] 8008434: f423 6300 bic.w r3, r3, #2048 @ 0x800 8008438: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 800843a: 683b ldr r3, [r7, #0] 800843c: 68db ldr r3, [r3, #12] 800843e: 021b lsls r3, r3, #8 8008440: 697a ldr r2, [r7, #20] 8008442: 4313 orrs r3, r2 8008444: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 8008446: 697b ldr r3, [r7, #20] 8008448: f423 6380 bic.w r3, r3, #1024 @ 0x400 800844c: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 800844e: 687b ldr r3, [r7, #4] 8008450: 4a14 ldr r2, [pc, #80] @ (80084a4 ) 8008452: 4293 cmp r3, r2 8008454: d113 bne.n 800847e /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 8008456: 693b ldr r3, [r7, #16] 8008458: f423 5380 bic.w r3, r3, #4096 @ 0x1000 800845c: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 800845e: 693b ldr r3, [r7, #16] 8008460: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8008464: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 8008466: 683b ldr r3, [r7, #0] 8008468: 695b ldr r3, [r3, #20] 800846a: 011b lsls r3, r3, #4 800846c: 693a ldr r2, [r7, #16] 800846e: 4313 orrs r3, r2 8008470: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 8008472: 683b ldr r3, [r7, #0] 8008474: 699b ldr r3, [r3, #24] 8008476: 011b lsls r3, r3, #4 8008478: 693a ldr r2, [r7, #16] 800847a: 4313 orrs r3, r2 800847c: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800847e: 687b ldr r3, [r7, #4] 8008480: 693a ldr r2, [r7, #16] 8008482: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8008484: 687b ldr r3, [r7, #4] 8008486: 68fa ldr r2, [r7, #12] 8008488: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 800848a: 683b ldr r3, [r7, #0] 800848c: 685a ldr r2, [r3, #4] 800848e: 687b ldr r3, [r7, #4] 8008490: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8008492: 687b ldr r3, [r7, #4] 8008494: 697a ldr r2, [r7, #20] 8008496: 621a str r2, [r3, #32] } 8008498: bf00 nop 800849a: 371c adds r7, #28 800849c: 46bd mov sp, r7 800849e: bc80 pop {r7} 80084a0: 4770 bx lr 80084a2: bf00 nop 80084a4: 40012c00 .word 0x40012c00 080084a8 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80084a8: b480 push {r7} 80084aa: b087 sub sp, #28 80084ac: af00 add r7, sp, #0 80084ae: 6078 str r0, [r7, #4] 80084b0: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80084b2: 687b ldr r3, [r7, #4] 80084b4: 6a1b ldr r3, [r3, #32] 80084b6: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 80084b8: 687b ldr r3, [r7, #4] 80084ba: 6a1b ldr r3, [r3, #32] 80084bc: f423 5280 bic.w r2, r3, #4096 @ 0x1000 80084c0: 687b ldr r3, [r7, #4] 80084c2: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80084c4: 687b ldr r3, [r7, #4] 80084c6: 685b ldr r3, [r3, #4] 80084c8: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80084ca: 687b ldr r3, [r7, #4] 80084cc: 69db ldr r3, [r3, #28] 80084ce: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 80084d0: 68fb ldr r3, [r7, #12] 80084d2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80084d6: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 80084d8: 68fb ldr r3, [r7, #12] 80084da: f423 7340 bic.w r3, r3, #768 @ 0x300 80084de: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 80084e0: 683b ldr r3, [r7, #0] 80084e2: 681b ldr r3, [r3, #0] 80084e4: 021b lsls r3, r3, #8 80084e6: 68fa ldr r2, [r7, #12] 80084e8: 4313 orrs r3, r2 80084ea: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 80084ec: 693b ldr r3, [r7, #16] 80084ee: f423 5300 bic.w r3, r3, #8192 @ 0x2000 80084f2: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 80084f4: 683b ldr r3, [r7, #0] 80084f6: 689b ldr r3, [r3, #8] 80084f8: 031b lsls r3, r3, #12 80084fa: 693a ldr r2, [r7, #16] 80084fc: 4313 orrs r3, r2 80084fe: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8008500: 687b ldr r3, [r7, #4] 8008502: 4a0f ldr r2, [pc, #60] @ (8008540 ) 8008504: 4293 cmp r3, r2 8008506: d109 bne.n 800851c { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8008508: 697b ldr r3, [r7, #20] 800850a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800850e: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8008510: 683b ldr r3, [r7, #0] 8008512: 695b ldr r3, [r3, #20] 8008514: 019b lsls r3, r3, #6 8008516: 697a ldr r2, [r7, #20] 8008518: 4313 orrs r3, r2 800851a: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800851c: 687b ldr r3, [r7, #4] 800851e: 697a ldr r2, [r7, #20] 8008520: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8008522: 687b ldr r3, [r7, #4] 8008524: 68fa ldr r2, [r7, #12] 8008526: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8008528: 683b ldr r3, [r7, #0] 800852a: 685a ldr r2, [r3, #4] 800852c: 687b ldr r3, [r7, #4] 800852e: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8008530: 687b ldr r3, [r7, #4] 8008532: 693a ldr r2, [r7, #16] 8008534: 621a str r2, [r3, #32] } 8008536: bf00 nop 8008538: 371c adds r7, #28 800853a: 46bd mov sp, r7 800853c: bc80 pop {r7} 800853e: 4770 bx lr 8008540: 40012c00 .word 0x40012c00 08008544 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8008544: b480 push {r7} 8008546: b087 sub sp, #28 8008548: af00 add r7, sp, #0 800854a: 60f8 str r0, [r7, #12] 800854c: 60b9 str r1, [r7, #8] 800854e: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 8008550: 68fb ldr r3, [r7, #12] 8008552: 6a1b ldr r3, [r3, #32] 8008554: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 8008556: 68fb ldr r3, [r7, #12] 8008558: 6a1b ldr r3, [r3, #32] 800855a: f023 0201 bic.w r2, r3, #1 800855e: 68fb ldr r3, [r7, #12] 8008560: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8008562: 68fb ldr r3, [r7, #12] 8008564: 699b ldr r3, [r3, #24] 8008566: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 8008568: 693b ldr r3, [r7, #16] 800856a: f023 03f0 bic.w r3, r3, #240 @ 0xf0 800856e: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 8008570: 687b ldr r3, [r7, #4] 8008572: 011b lsls r3, r3, #4 8008574: 693a ldr r2, [r7, #16] 8008576: 4313 orrs r3, r2 8008578: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 800857a: 697b ldr r3, [r7, #20] 800857c: f023 030a bic.w r3, r3, #10 8008580: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 8008582: 697a ldr r2, [r7, #20] 8008584: 68bb ldr r3, [r7, #8] 8008586: 4313 orrs r3, r2 8008588: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 800858a: 68fb ldr r3, [r7, #12] 800858c: 693a ldr r2, [r7, #16] 800858e: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8008590: 68fb ldr r3, [r7, #12] 8008592: 697a ldr r2, [r7, #20] 8008594: 621a str r2, [r3, #32] } 8008596: bf00 nop 8008598: 371c adds r7, #28 800859a: 46bd mov sp, r7 800859c: bc80 pop {r7} 800859e: 4770 bx lr 080085a0 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 80085a0: b480 push {r7} 80085a2: b087 sub sp, #28 80085a4: af00 add r7, sp, #0 80085a6: 60f8 str r0, [r7, #12] 80085a8: 60b9 str r1, [r7, #8] 80085aa: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 80085ac: 68fb ldr r3, [r7, #12] 80085ae: 6a1b ldr r3, [r3, #32] 80085b0: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 80085b2: 68fb ldr r3, [r7, #12] 80085b4: 6a1b ldr r3, [r3, #32] 80085b6: f023 0210 bic.w r2, r3, #16 80085ba: 68fb ldr r3, [r7, #12] 80085bc: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 80085be: 68fb ldr r3, [r7, #12] 80085c0: 699b ldr r3, [r3, #24] 80085c2: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 80085c4: 693b ldr r3, [r7, #16] 80085c6: f423 4370 bic.w r3, r3, #61440 @ 0xf000 80085ca: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 80085cc: 687b ldr r3, [r7, #4] 80085ce: 031b lsls r3, r3, #12 80085d0: 693a ldr r2, [r7, #16] 80085d2: 4313 orrs r3, r2 80085d4: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 80085d6: 697b ldr r3, [r7, #20] 80085d8: f023 03a0 bic.w r3, r3, #160 @ 0xa0 80085dc: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 80085de: 68bb ldr r3, [r7, #8] 80085e0: 011b lsls r3, r3, #4 80085e2: 697a ldr r2, [r7, #20] 80085e4: 4313 orrs r3, r2 80085e6: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 80085e8: 68fb ldr r3, [r7, #12] 80085ea: 693a ldr r2, [r7, #16] 80085ec: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 80085ee: 68fb ldr r3, [r7, #12] 80085f0: 697a ldr r2, [r7, #20] 80085f2: 621a str r2, [r3, #32] } 80085f4: bf00 nop 80085f6: 371c adds r7, #28 80085f8: 46bd mov sp, r7 80085fa: bc80 pop {r7} 80085fc: 4770 bx lr 080085fe : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 80085fe: b480 push {r7} 8008600: b085 sub sp, #20 8008602: af00 add r7, sp, #0 8008604: 6078 str r0, [r7, #4] 8008606: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 8008608: 687b ldr r3, [r7, #4] 800860a: 689b ldr r3, [r3, #8] 800860c: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 800860e: 68fb ldr r3, [r7, #12] 8008610: f023 0370 bic.w r3, r3, #112 @ 0x70 8008614: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 8008616: 683a ldr r2, [r7, #0] 8008618: 68fb ldr r3, [r7, #12] 800861a: 4313 orrs r3, r2 800861c: f043 0307 orr.w r3, r3, #7 8008620: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8008622: 687b ldr r3, [r7, #4] 8008624: 68fa ldr r2, [r7, #12] 8008626: 609a str r2, [r3, #8] } 8008628: bf00 nop 800862a: 3714 adds r7, #20 800862c: 46bd mov sp, r7 800862e: bc80 pop {r7} 8008630: 4770 bx lr 08008632 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 8008632: b480 push {r7} 8008634: b087 sub sp, #28 8008636: af00 add r7, sp, #0 8008638: 60f8 str r0, [r7, #12] 800863a: 60b9 str r1, [r7, #8] 800863c: 607a str r2, [r7, #4] 800863e: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 8008640: 68fb ldr r3, [r7, #12] 8008642: 689b ldr r3, [r3, #8] 8008644: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8008646: 697b ldr r3, [r7, #20] 8008648: f423 437f bic.w r3, r3, #65280 @ 0xff00 800864c: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 800864e: 683b ldr r3, [r7, #0] 8008650: 021a lsls r2, r3, #8 8008652: 687b ldr r3, [r7, #4] 8008654: 431a orrs r2, r3 8008656: 68bb ldr r3, [r7, #8] 8008658: 4313 orrs r3, r2 800865a: 697a ldr r2, [r7, #20] 800865c: 4313 orrs r3, r2 800865e: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8008660: 68fb ldr r3, [r7, #12] 8008662: 697a ldr r2, [r7, #20] 8008664: 609a str r2, [r3, #8] } 8008666: bf00 nop 8008668: 371c adds r7, #28 800866a: 46bd mov sp, r7 800866c: bc80 pop {r7} 800866e: 4770 bx lr 08008670 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 8008670: b480 push {r7} 8008672: b087 sub sp, #28 8008674: af00 add r7, sp, #0 8008676: 60f8 str r0, [r7, #12] 8008678: 60b9 str r1, [r7, #8] 800867a: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 800867c: 68bb ldr r3, [r7, #8] 800867e: f003 031f and.w r3, r3, #31 8008682: 2201 movs r2, #1 8008684: fa02 f303 lsl.w r3, r2, r3 8008688: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 800868a: 68fb ldr r3, [r7, #12] 800868c: 6a1a ldr r2, [r3, #32] 800868e: 697b ldr r3, [r7, #20] 8008690: 43db mvns r3, r3 8008692: 401a ands r2, r3 8008694: 68fb ldr r3, [r7, #12] 8008696: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 8008698: 68fb ldr r3, [r7, #12] 800869a: 6a1a ldr r2, [r3, #32] 800869c: 68bb ldr r3, [r7, #8] 800869e: f003 031f and.w r3, r3, #31 80086a2: 6879 ldr r1, [r7, #4] 80086a4: fa01 f303 lsl.w r3, r1, r3 80086a8: 431a orrs r2, r3 80086aa: 68fb ldr r3, [r7, #12] 80086ac: 621a str r2, [r3, #32] } 80086ae: bf00 nop 80086b0: 371c adds r7, #28 80086b2: 46bd mov sp, r7 80086b4: bc80 pop {r7} 80086b6: 4770 bx lr 080086b8 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 80086b8: b480 push {r7} 80086ba: b085 sub sp, #20 80086bc: af00 add r7, sp, #0 80086be: 6078 str r0, [r7, #4] 80086c0: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 80086c2: 687b ldr r3, [r7, #4] 80086c4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80086c8: 2b01 cmp r3, #1 80086ca: d101 bne.n 80086d0 80086cc: 2302 movs r3, #2 80086ce: e046 b.n 800875e 80086d0: 687b ldr r3, [r7, #4] 80086d2: 2201 movs r2, #1 80086d4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 80086d8: 687b ldr r3, [r7, #4] 80086da: 2202 movs r2, #2 80086dc: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 80086e0: 687b ldr r3, [r7, #4] 80086e2: 681b ldr r3, [r3, #0] 80086e4: 685b ldr r3, [r3, #4] 80086e6: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 80086e8: 687b ldr r3, [r7, #4] 80086ea: 681b ldr r3, [r3, #0] 80086ec: 689b ldr r3, [r3, #8] 80086ee: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 80086f0: 68fb ldr r3, [r7, #12] 80086f2: f023 0370 bic.w r3, r3, #112 @ 0x70 80086f6: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 80086f8: 683b ldr r3, [r7, #0] 80086fa: 681b ldr r3, [r3, #0] 80086fc: 68fa ldr r2, [r7, #12] 80086fe: 4313 orrs r3, r2 8008700: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8008702: 687b ldr r3, [r7, #4] 8008704: 681b ldr r3, [r3, #0] 8008706: 68fa ldr r2, [r7, #12] 8008708: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 800870a: 687b ldr r3, [r7, #4] 800870c: 681b ldr r3, [r3, #0] 800870e: 4a16 ldr r2, [pc, #88] @ (8008768 ) 8008710: 4293 cmp r3, r2 8008712: d00e beq.n 8008732 8008714: 687b ldr r3, [r7, #4] 8008716: 681b ldr r3, [r3, #0] 8008718: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 800871c: d009 beq.n 8008732 800871e: 687b ldr r3, [r7, #4] 8008720: 681b ldr r3, [r3, #0] 8008722: 4a12 ldr r2, [pc, #72] @ (800876c ) 8008724: 4293 cmp r3, r2 8008726: d004 beq.n 8008732 8008728: 687b ldr r3, [r7, #4] 800872a: 681b ldr r3, [r3, #0] 800872c: 4a10 ldr r2, [pc, #64] @ (8008770 ) 800872e: 4293 cmp r3, r2 8008730: d10c bne.n 800874c { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 8008732: 68bb ldr r3, [r7, #8] 8008734: f023 0380 bic.w r3, r3, #128 @ 0x80 8008738: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 800873a: 683b ldr r3, [r7, #0] 800873c: 685b ldr r3, [r3, #4] 800873e: 68ba ldr r2, [r7, #8] 8008740: 4313 orrs r3, r2 8008742: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8008744: 687b ldr r3, [r7, #4] 8008746: 681b ldr r3, [r3, #0] 8008748: 68ba ldr r2, [r7, #8] 800874a: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 800874c: 687b ldr r3, [r7, #4] 800874e: 2201 movs r2, #1 8008750: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8008754: 687b ldr r3, [r7, #4] 8008756: 2200 movs r2, #0 8008758: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 800875c: 2300 movs r3, #0 } 800875e: 4618 mov r0, r3 8008760: 3714 adds r7, #20 8008762: 46bd mov sp, r7 8008764: bc80 pop {r7} 8008766: 4770 bx lr 8008768: 40012c00 .word 0x40012c00 800876c: 40000400 .word 0x40000400 8008770: 40000800 .word 0x40000800 08008774 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8008774: b580 push {r7, lr} 8008776: b082 sub sp, #8 8008778: af00 add r7, sp, #0 800877a: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 800877c: 687b ldr r3, [r7, #4] 800877e: 2b00 cmp r3, #0 8008780: d101 bne.n 8008786 { return HAL_ERROR; 8008782: 2301 movs r3, #1 8008784: e042 b.n 800880c assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 8008786: 687b ldr r3, [r7, #4] 8008788: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800878c: b2db uxtb r3, r3 800878e: 2b00 cmp r3, #0 8008790: d106 bne.n 80087a0 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 8008792: 687b ldr r3, [r7, #4] 8008794: 2200 movs r2, #0 8008796: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 800879a: 6878 ldr r0, [r7, #4] 800879c: f7fb fb68 bl 8003e70 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 80087a0: 687b ldr r3, [r7, #4] 80087a2: 2224 movs r2, #36 @ 0x24 80087a4: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 80087a8: 687b ldr r3, [r7, #4] 80087aa: 681b ldr r3, [r3, #0] 80087ac: 68da ldr r2, [r3, #12] 80087ae: 687b ldr r3, [r7, #4] 80087b0: 681b ldr r3, [r3, #0] 80087b2: f422 5200 bic.w r2, r2, #8192 @ 0x2000 80087b6: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 80087b8: 6878 ldr r0, [r7, #4] 80087ba: f000 f971 bl 8008aa0 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 80087be: 687b ldr r3, [r7, #4] 80087c0: 681b ldr r3, [r3, #0] 80087c2: 691a ldr r2, [r3, #16] 80087c4: 687b ldr r3, [r7, #4] 80087c6: 681b ldr r3, [r3, #0] 80087c8: f422 4290 bic.w r2, r2, #18432 @ 0x4800 80087cc: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 80087ce: 687b ldr r3, [r7, #4] 80087d0: 681b ldr r3, [r3, #0] 80087d2: 695a ldr r2, [r3, #20] 80087d4: 687b ldr r3, [r7, #4] 80087d6: 681b ldr r3, [r3, #0] 80087d8: f022 022a bic.w r2, r2, #42 @ 0x2a 80087dc: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 80087de: 687b ldr r3, [r7, #4] 80087e0: 681b ldr r3, [r3, #0] 80087e2: 68da ldr r2, [r3, #12] 80087e4: 687b ldr r3, [r7, #4] 80087e6: 681b ldr r3, [r3, #0] 80087e8: f442 5200 orr.w r2, r2, #8192 @ 0x2000 80087ec: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 80087ee: 687b ldr r3, [r7, #4] 80087f0: 2200 movs r2, #0 80087f2: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 80087f4: 687b ldr r3, [r7, #4] 80087f6: 2220 movs r2, #32 80087f8: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 80087fc: 687b ldr r3, [r7, #4] 80087fe: 2220 movs r2, #32 8008800: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 8008804: 687b ldr r3, [r7, #4] 8008806: 2200 movs r2, #0 8008808: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 800880a: 2300 movs r3, #0 } 800880c: 4618 mov r0, r3 800880e: 3708 adds r7, #8 8008810: 46bd mov sp, r7 8008812: bd80 pop {r7, pc} 08008814 : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8008814: b580 push {r7, lr} 8008816: b08a sub sp, #40 @ 0x28 8008818: af02 add r7, sp, #8 800881a: 60f8 str r0, [r7, #12] 800881c: 60b9 str r1, [r7, #8] 800881e: 603b str r3, [r7, #0] 8008820: 4613 mov r3, r2 8008822: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; 8008824: 2300 movs r3, #0 8008826: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8008828: 68fb ldr r3, [r7, #12] 800882a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800882e: b2db uxtb r3, r3 8008830: 2b20 cmp r3, #32 8008832: d175 bne.n 8008920 { if ((pData == NULL) || (Size == 0U)) 8008834: 68bb ldr r3, [r7, #8] 8008836: 2b00 cmp r3, #0 8008838: d002 beq.n 8008840 800883a: 88fb ldrh r3, [r7, #6] 800883c: 2b00 cmp r3, #0 800883e: d101 bne.n 8008844 { return HAL_ERROR; 8008840: 2301 movs r3, #1 8008842: e06e b.n 8008922 } huart->ErrorCode = HAL_UART_ERROR_NONE; 8008844: 68fb ldr r3, [r7, #12] 8008846: 2200 movs r2, #0 8008848: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; 800884a: 68fb ldr r3, [r7, #12] 800884c: 2221 movs r2, #33 @ 0x21 800884e: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 8008852: f7fb fc55 bl 8004100 8008856: 6178 str r0, [r7, #20] huart->TxXferSize = Size; 8008858: 68fb ldr r3, [r7, #12] 800885a: 88fa ldrh r2, [r7, #6] 800885c: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 800885e: 68fb ldr r3, [r7, #12] 8008860: 88fa ldrh r2, [r7, #6] 8008862: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8008864: 68fb ldr r3, [r7, #12] 8008866: 689b ldr r3, [r3, #8] 8008868: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 800886c: d108 bne.n 8008880 800886e: 68fb ldr r3, [r7, #12] 8008870: 691b ldr r3, [r3, #16] 8008872: 2b00 cmp r3, #0 8008874: d104 bne.n 8008880 { pdata8bits = NULL; 8008876: 2300 movs r3, #0 8008878: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; 800887a: 68bb ldr r3, [r7, #8] 800887c: 61bb str r3, [r7, #24] 800887e: e003 b.n 8008888 } else { pdata8bits = pData; 8008880: 68bb ldr r3, [r7, #8] 8008882: 61fb str r3, [r7, #28] pdata16bits = NULL; 8008884: 2300 movs r3, #0 8008886: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) 8008888: e02e b.n 80088e8 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 800888a: 683b ldr r3, [r7, #0] 800888c: 9300 str r3, [sp, #0] 800888e: 697b ldr r3, [r7, #20] 8008890: 2200 movs r2, #0 8008892: 2180 movs r1, #128 @ 0x80 8008894: 68f8 ldr r0, [r7, #12] 8008896: f000 f848 bl 800892a 800889a: 4603 mov r3, r0 800889c: 2b00 cmp r3, #0 800889e: d005 beq.n 80088ac { huart->gState = HAL_UART_STATE_READY; 80088a0: 68fb ldr r3, [r7, #12] 80088a2: 2220 movs r2, #32 80088a4: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; 80088a8: 2303 movs r3, #3 80088aa: e03a b.n 8008922 } if (pdata8bits == NULL) 80088ac: 69fb ldr r3, [r7, #28] 80088ae: 2b00 cmp r3, #0 80088b0: d10b bne.n 80088ca { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); 80088b2: 69bb ldr r3, [r7, #24] 80088b4: 881b ldrh r3, [r3, #0] 80088b6: 461a mov r2, r3 80088b8: 68fb ldr r3, [r7, #12] 80088ba: 681b ldr r3, [r3, #0] 80088bc: f3c2 0208 ubfx r2, r2, #0, #9 80088c0: 605a str r2, [r3, #4] pdata16bits++; 80088c2: 69bb ldr r3, [r7, #24] 80088c4: 3302 adds r3, #2 80088c6: 61bb str r3, [r7, #24] 80088c8: e007 b.n 80088da } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); 80088ca: 69fb ldr r3, [r7, #28] 80088cc: 781a ldrb r2, [r3, #0] 80088ce: 68fb ldr r3, [r7, #12] 80088d0: 681b ldr r3, [r3, #0] 80088d2: 605a str r2, [r3, #4] pdata8bits++; 80088d4: 69fb ldr r3, [r7, #28] 80088d6: 3301 adds r3, #1 80088d8: 61fb str r3, [r7, #28] } huart->TxXferCount--; 80088da: 68fb ldr r3, [r7, #12] 80088dc: 8cdb ldrh r3, [r3, #38] @ 0x26 80088de: b29b uxth r3, r3 80088e0: 3b01 subs r3, #1 80088e2: b29a uxth r2, r3 80088e4: 68fb ldr r3, [r7, #12] 80088e6: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) 80088e8: 68fb ldr r3, [r7, #12] 80088ea: 8cdb ldrh r3, [r3, #38] @ 0x26 80088ec: b29b uxth r3, r3 80088ee: 2b00 cmp r3, #0 80088f0: d1cb bne.n 800888a } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 80088f2: 683b ldr r3, [r7, #0] 80088f4: 9300 str r3, [sp, #0] 80088f6: 697b ldr r3, [r7, #20] 80088f8: 2200 movs r2, #0 80088fa: 2140 movs r1, #64 @ 0x40 80088fc: 68f8 ldr r0, [r7, #12] 80088fe: f000 f814 bl 800892a 8008902: 4603 mov r3, r0 8008904: 2b00 cmp r3, #0 8008906: d005 beq.n 8008914 { huart->gState = HAL_UART_STATE_READY; 8008908: 68fb ldr r3, [r7, #12] 800890a: 2220 movs r2, #32 800890c: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; 8008910: 2303 movs r3, #3 8008912: e006 b.n 8008922 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8008914: 68fb ldr r3, [r7, #12] 8008916: 2220 movs r2, #32 8008918: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; 800891c: 2300 movs r3, #0 800891e: e000 b.n 8008922 } else { return HAL_BUSY; 8008920: 2302 movs r3, #2 } } 8008922: 4618 mov r0, r3 8008924: 3720 adds r7, #32 8008926: 46bd mov sp, r7 8008928: bd80 pop {r7, pc} 0800892a : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { 800892a: b580 push {r7, lr} 800892c: b086 sub sp, #24 800892e: af00 add r7, sp, #0 8008930: 60f8 str r0, [r7, #12] 8008932: 60b9 str r1, [r7, #8] 8008934: 603b str r3, [r7, #0] 8008936: 4613 mov r3, r2 8008938: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 800893a: e03b b.n 80089b4 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 800893c: 6a3b ldr r3, [r7, #32] 800893e: f1b3 3fff cmp.w r3, #4294967295 8008942: d037 beq.n 80089b4 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8008944: f7fb fbdc bl 8004100 8008948: 4602 mov r2, r0 800894a: 683b ldr r3, [r7, #0] 800894c: 1ad3 subs r3, r2, r3 800894e: 6a3a ldr r2, [r7, #32] 8008950: 429a cmp r2, r3 8008952: d302 bcc.n 800895a 8008954: 6a3b ldr r3, [r7, #32] 8008956: 2b00 cmp r3, #0 8008958: d101 bne.n 800895e { return HAL_TIMEOUT; 800895a: 2303 movs r3, #3 800895c: e03a b.n 80089d4 } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) 800895e: 68fb ldr r3, [r7, #12] 8008960: 681b ldr r3, [r3, #0] 8008962: 68db ldr r3, [r3, #12] 8008964: f003 0304 and.w r3, r3, #4 8008968: 2b00 cmp r3, #0 800896a: d023 beq.n 80089b4 800896c: 68bb ldr r3, [r7, #8] 800896e: 2b80 cmp r3, #128 @ 0x80 8008970: d020 beq.n 80089b4 8008972: 68bb ldr r3, [r7, #8] 8008974: 2b40 cmp r3, #64 @ 0x40 8008976: d01d beq.n 80089b4 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) 8008978: 68fb ldr r3, [r7, #12] 800897a: 681b ldr r3, [r3, #0] 800897c: 681b ldr r3, [r3, #0] 800897e: f003 0308 and.w r3, r3, #8 8008982: 2b08 cmp r3, #8 8008984: d116 bne.n 80089b4 { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); 8008986: 2300 movs r3, #0 8008988: 617b str r3, [r7, #20] 800898a: 68fb ldr r3, [r7, #12] 800898c: 681b ldr r3, [r3, #0] 800898e: 681b ldr r3, [r3, #0] 8008990: 617b str r3, [r7, #20] 8008992: 68fb ldr r3, [r7, #12] 8008994: 681b ldr r3, [r3, #0] 8008996: 685b ldr r3, [r3, #4] 8008998: 617b str r3, [r7, #20] 800899a: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); 800899c: 68f8 ldr r0, [r7, #12] 800899e: f000 f81d bl 80089dc huart->ErrorCode = HAL_UART_ERROR_ORE; 80089a2: 68fb ldr r3, [r7, #12] 80089a4: 2208 movs r2, #8 80089a6: 645a str r2, [r3, #68] @ 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); 80089a8: 68fb ldr r3, [r7, #12] 80089aa: 2200 movs r2, #0 80089ac: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 80089b0: 2301 movs r3, #1 80089b2: e00f b.n 80089d4 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 80089b4: 68fb ldr r3, [r7, #12] 80089b6: 681b ldr r3, [r3, #0] 80089b8: 681a ldr r2, [r3, #0] 80089ba: 68bb ldr r3, [r7, #8] 80089bc: 4013 ands r3, r2 80089be: 68ba ldr r2, [r7, #8] 80089c0: 429a cmp r2, r3 80089c2: bf0c ite eq 80089c4: 2301 moveq r3, #1 80089c6: 2300 movne r3, #0 80089c8: b2db uxtb r3, r3 80089ca: 461a mov r2, r3 80089cc: 79fb ldrb r3, [r7, #7] 80089ce: 429a cmp r2, r3 80089d0: d0b4 beq.n 800893c } } } } return HAL_OK; 80089d2: 2300 movs r3, #0 } 80089d4: 4618 mov r0, r3 80089d6: 3718 adds r7, #24 80089d8: 46bd mov sp, r7 80089da: bd80 pop {r7, pc} 080089dc : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 80089dc: b480 push {r7} 80089de: b095 sub sp, #84 @ 0x54 80089e0: af00 add r7, sp, #0 80089e2: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80089e4: 687b ldr r3, [r7, #4] 80089e6: 681b ldr r3, [r3, #0] 80089e8: 330c adds r3, #12 80089ea: 637b str r3, [r7, #52] @ 0x34 */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80089ec: 6b7b ldr r3, [r7, #52] @ 0x34 80089ee: e853 3f00 ldrex r3, [r3] 80089f2: 633b str r3, [r7, #48] @ 0x30 return(result); 80089f4: 6b3b ldr r3, [r7, #48] @ 0x30 80089f6: f423 7390 bic.w r3, r3, #288 @ 0x120 80089fa: 64fb str r3, [r7, #76] @ 0x4c 80089fc: 687b ldr r3, [r7, #4] 80089fe: 681b ldr r3, [r3, #0] 8008a00: 330c adds r3, #12 8008a02: 6cfa ldr r2, [r7, #76] @ 0x4c 8008a04: 643a str r2, [r7, #64] @ 0x40 8008a06: 63fb str r3, [r7, #60] @ 0x3c */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8008a08: 6bf9 ldr r1, [r7, #60] @ 0x3c 8008a0a: 6c3a ldr r2, [r7, #64] @ 0x40 8008a0c: e841 2300 strex r3, r2, [r1] 8008a10: 63bb str r3, [r7, #56] @ 0x38 return(result); 8008a12: 6bbb ldr r3, [r7, #56] @ 0x38 8008a14: 2b00 cmp r3, #0 8008a16: d1e5 bne.n 80089e4 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8008a18: 687b ldr r3, [r7, #4] 8008a1a: 681b ldr r3, [r3, #0] 8008a1c: 3314 adds r3, #20 8008a1e: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8008a20: 6a3b ldr r3, [r7, #32] 8008a22: e853 3f00 ldrex r3, [r3] 8008a26: 61fb str r3, [r7, #28] return(result); 8008a28: 69fb ldr r3, [r7, #28] 8008a2a: f023 0301 bic.w r3, r3, #1 8008a2e: 64bb str r3, [r7, #72] @ 0x48 8008a30: 687b ldr r3, [r7, #4] 8008a32: 681b ldr r3, [r3, #0] 8008a34: 3314 adds r3, #20 8008a36: 6cba ldr r2, [r7, #72] @ 0x48 8008a38: 62fa str r2, [r7, #44] @ 0x2c 8008a3a: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8008a3c: 6ab9 ldr r1, [r7, #40] @ 0x28 8008a3e: 6afa ldr r2, [r7, #44] @ 0x2c 8008a40: e841 2300 strex r3, r2, [r1] 8008a44: 627b str r3, [r7, #36] @ 0x24 return(result); 8008a46: 6a7b ldr r3, [r7, #36] @ 0x24 8008a48: 2b00 cmp r3, #0 8008a4a: d1e5 bne.n 8008a18 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8008a4c: 687b ldr r3, [r7, #4] 8008a4e: 6b1b ldr r3, [r3, #48] @ 0x30 8008a50: 2b01 cmp r3, #1 8008a52: d119 bne.n 8008a88 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8008a54: 687b ldr r3, [r7, #4] 8008a56: 681b ldr r3, [r3, #0] 8008a58: 330c adds r3, #12 8008a5a: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8008a5c: 68fb ldr r3, [r7, #12] 8008a5e: e853 3f00 ldrex r3, [r3] 8008a62: 60bb str r3, [r7, #8] return(result); 8008a64: 68bb ldr r3, [r7, #8] 8008a66: f023 0310 bic.w r3, r3, #16 8008a6a: 647b str r3, [r7, #68] @ 0x44 8008a6c: 687b ldr r3, [r7, #4] 8008a6e: 681b ldr r3, [r3, #0] 8008a70: 330c adds r3, #12 8008a72: 6c7a ldr r2, [r7, #68] @ 0x44 8008a74: 61ba str r2, [r7, #24] 8008a76: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8008a78: 6979 ldr r1, [r7, #20] 8008a7a: 69ba ldr r2, [r7, #24] 8008a7c: e841 2300 strex r3, r2, [r1] 8008a80: 613b str r3, [r7, #16] return(result); 8008a82: 693b ldr r3, [r7, #16] 8008a84: 2b00 cmp r3, #0 8008a86: d1e5 bne.n 8008a54 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8008a88: 687b ldr r3, [r7, #4] 8008a8a: 2220 movs r2, #32 8008a8c: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8008a90: 687b ldr r3, [r7, #4] 8008a92: 2200 movs r2, #0 8008a94: 631a str r2, [r3, #48] @ 0x30 } 8008a96: bf00 nop 8008a98: 3754 adds r7, #84 @ 0x54 8008a9a: 46bd mov sp, r7 8008a9c: bc80 pop {r7} 8008a9e: 4770 bx lr 08008aa0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8008aa0: b580 push {r7, lr} 8008aa2: b084 sub sp, #16 8008aa4: af00 add r7, sp, #0 8008aa6: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8008aa8: 687b ldr r3, [r7, #4] 8008aaa: 681b ldr r3, [r3, #0] 8008aac: 691b ldr r3, [r3, #16] 8008aae: f423 5140 bic.w r1, r3, #12288 @ 0x3000 8008ab2: 687b ldr r3, [r7, #4] 8008ab4: 68da ldr r2, [r3, #12] 8008ab6: 687b ldr r3, [r7, #4] 8008ab8: 681b ldr r3, [r3, #0] 8008aba: 430a orrs r2, r1 8008abc: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8008abe: 687b ldr r3, [r7, #4] 8008ac0: 689a ldr r2, [r3, #8] 8008ac2: 687b ldr r3, [r7, #4] 8008ac4: 691b ldr r3, [r3, #16] 8008ac6: 431a orrs r2, r3 8008ac8: 687b ldr r3, [r7, #4] 8008aca: 695b ldr r3, [r3, #20] 8008acc: 4313 orrs r3, r2 8008ace: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 8008ad0: 687b ldr r3, [r7, #4] 8008ad2: 681b ldr r3, [r3, #0] 8008ad4: 68db ldr r3, [r3, #12] 8008ad6: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 8008ada: f023 030c bic.w r3, r3, #12 8008ade: 687a ldr r2, [r7, #4] 8008ae0: 6812 ldr r2, [r2, #0] 8008ae2: 68b9 ldr r1, [r7, #8] 8008ae4: 430b orrs r3, r1 8008ae6: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8008ae8: 687b ldr r3, [r7, #4] 8008aea: 681b ldr r3, [r3, #0] 8008aec: 695b ldr r3, [r3, #20] 8008aee: f423 7140 bic.w r1, r3, #768 @ 0x300 8008af2: 687b ldr r3, [r7, #4] 8008af4: 699a ldr r2, [r3, #24] 8008af6: 687b ldr r3, [r7, #4] 8008af8: 681b ldr r3, [r3, #0] 8008afa: 430a orrs r2, r1 8008afc: 615a str r2, [r3, #20] if(huart->Instance == USART1) 8008afe: 687b ldr r3, [r7, #4] 8008b00: 681b ldr r3, [r3, #0] 8008b02: 4a2c ldr r2, [pc, #176] @ (8008bb4 ) 8008b04: 4293 cmp r3, r2 8008b06: d103 bne.n 8008b10 { pclk = HAL_RCC_GetPCLK2Freq(); 8008b08: f7fe fede bl 80078c8 8008b0c: 60f8 str r0, [r7, #12] 8008b0e: e002 b.n 8008b16 } else { pclk = HAL_RCC_GetPCLK1Freq(); 8008b10: f7fe fec6 bl 80078a0 8008b14: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8008b16: 68fa ldr r2, [r7, #12] 8008b18: 4613 mov r3, r2 8008b1a: 009b lsls r3, r3, #2 8008b1c: 4413 add r3, r2 8008b1e: 009a lsls r2, r3, #2 8008b20: 441a add r2, r3 8008b22: 687b ldr r3, [r7, #4] 8008b24: 685b ldr r3, [r3, #4] 8008b26: 009b lsls r3, r3, #2 8008b28: fbb2 f3f3 udiv r3, r2, r3 8008b2c: 4a22 ldr r2, [pc, #136] @ (8008bb8 ) 8008b2e: fba2 2303 umull r2, r3, r2, r3 8008b32: 095b lsrs r3, r3, #5 8008b34: 0119 lsls r1, r3, #4 8008b36: 68fa ldr r2, [r7, #12] 8008b38: 4613 mov r3, r2 8008b3a: 009b lsls r3, r3, #2 8008b3c: 4413 add r3, r2 8008b3e: 009a lsls r2, r3, #2 8008b40: 441a add r2, r3 8008b42: 687b ldr r3, [r7, #4] 8008b44: 685b ldr r3, [r3, #4] 8008b46: 009b lsls r3, r3, #2 8008b48: fbb2 f2f3 udiv r2, r2, r3 8008b4c: 4b1a ldr r3, [pc, #104] @ (8008bb8 ) 8008b4e: fba3 0302 umull r0, r3, r3, r2 8008b52: 095b lsrs r3, r3, #5 8008b54: 2064 movs r0, #100 @ 0x64 8008b56: fb00 f303 mul.w r3, r0, r3 8008b5a: 1ad3 subs r3, r2, r3 8008b5c: 011b lsls r3, r3, #4 8008b5e: 3332 adds r3, #50 @ 0x32 8008b60: 4a15 ldr r2, [pc, #84] @ (8008bb8 ) 8008b62: fba2 2303 umull r2, r3, r2, r3 8008b66: 095b lsrs r3, r3, #5 8008b68: f003 03f0 and.w r3, r3, #240 @ 0xf0 8008b6c: 4419 add r1, r3 8008b6e: 68fa ldr r2, [r7, #12] 8008b70: 4613 mov r3, r2 8008b72: 009b lsls r3, r3, #2 8008b74: 4413 add r3, r2 8008b76: 009a lsls r2, r3, #2 8008b78: 441a add r2, r3 8008b7a: 687b ldr r3, [r7, #4] 8008b7c: 685b ldr r3, [r3, #4] 8008b7e: 009b lsls r3, r3, #2 8008b80: fbb2 f2f3 udiv r2, r2, r3 8008b84: 4b0c ldr r3, [pc, #48] @ (8008bb8 ) 8008b86: fba3 0302 umull r0, r3, r3, r2 8008b8a: 095b lsrs r3, r3, #5 8008b8c: 2064 movs r0, #100 @ 0x64 8008b8e: fb00 f303 mul.w r3, r0, r3 8008b92: 1ad3 subs r3, r2, r3 8008b94: 011b lsls r3, r3, #4 8008b96: 3332 adds r3, #50 @ 0x32 8008b98: 4a07 ldr r2, [pc, #28] @ (8008bb8 ) 8008b9a: fba2 2303 umull r2, r3, r2, r3 8008b9e: 095b lsrs r3, r3, #5 8008ba0: f003 020f and.w r2, r3, #15 8008ba4: 687b ldr r3, [r7, #4] 8008ba6: 681b ldr r3, [r3, #0] 8008ba8: 440a add r2, r1 8008baa: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 8008bac: bf00 nop 8008bae: 3710 adds r7, #16 8008bb0: 46bd mov sp, r7 8008bb2: bd80 pop {r7, pc} 8008bb4: 40013800 .word 0x40013800 8008bb8: 51eb851f .word 0x51eb851f 08008bbc : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8008bbc: b480 push {r7} 8008bbe: b085 sub sp, #20 8008bc0: af00 add r7, sp, #0 8008bc2: 60f8 str r0, [r7, #12] 8008bc4: 4638 mov r0, r7 8008bc6: e880 000e stmia.w r0, {r1, r2, r3} /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8008bca: 2300 movs r3, #0 } 8008bcc: 4618 mov r0, r3 8008bce: 3714 adds r7, #20 8008bd0: 46bd mov sp, r7 8008bd2: bc80 pop {r7} 8008bd4: 4770 bx lr 08008bd6 : * Enables the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) { 8008bd6: b480 push {r7} 8008bd8: b085 sub sp, #20 8008bda: af00 add r7, sp, #0 8008bdc: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Clear pending interrupts */ USBx->ISTR = 0U; 8008bde: 687b ldr r3, [r7, #4] 8008be0: 2200 movs r2, #0 8008be2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8008be6: f44f 433f mov.w r3, #48896 @ 0xbf00 8008bea: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Set interrupt mask */ USBx->CNTR = (uint16_t)winterruptmask; 8008bec: 68fb ldr r3, [r7, #12] 8008bee: b29a uxth r2, r3 8008bf0: 687b ldr r3, [r7, #4] 8008bf2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8008bf6: 2300 movs r3, #0 } 8008bf8: 4618 mov r0, r3 8008bfa: 3714 adds r7, #20 8008bfc: 46bd mov sp, r7 8008bfe: bc80 pop {r7} 8008c00: 4770 bx lr 08008c02 : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) { 8008c02: b480 push {r7} 8008c04: b085 sub sp, #20 8008c06: af00 add r7, sp, #0 8008c08: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8008c0a: f44f 433f mov.w r3, #48896 @ 0xbf00 8008c0e: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Clear interrupt mask */ USBx->CNTR &= (uint16_t)(~winterruptmask); 8008c10: 687b ldr r3, [r7, #4] 8008c12: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8008c16: b29a uxth r2, r3 8008c18: 68fb ldr r3, [r7, #12] 8008c1a: b29b uxth r3, r3 8008c1c: 43db mvns r3, r3 8008c1e: b29b uxth r3, r3 8008c20: 4013 ands r3, r2 8008c22: b29a uxth r2, r3 8008c24: 687b ldr r3, [r7, #4] 8008c26: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8008c2a: 2300 movs r3, #0 } 8008c2c: 4618 mov r0, r3 8008c2e: 3714 adds r7, #20 8008c30: 46bd mov sp, r7 8008c32: bc80 pop {r7} 8008c34: 4770 bx lr 08008c36 : * This parameter can be one of the these values: * @arg USB_DEVICE_MODE Peripheral mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) { 8008c36: b480 push {r7} 8008c38: b083 sub sp, #12 8008c3a: af00 add r7, sp, #0 8008c3c: 6078 str r0, [r7, #4] 8008c3e: 460b mov r3, r1 8008c40: 70fb strb r3, [r7, #3] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8008c42: 2300 movs r3, #0 } 8008c44: 4618 mov r0, r3 8008c46: 370c adds r7, #12 8008c48: 46bd mov sp, r7 8008c4a: bc80 pop {r7} 8008c4c: 4770 bx lr 08008c4e : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8008c4e: b480 push {r7} 8008c50: b085 sub sp, #20 8008c52: af00 add r7, sp, #0 8008c54: 60f8 str r0, [r7, #12] 8008c56: 4638 mov r0, r7 8008c58: e880 000e stmia.w r0, {r1, r2, r3} /* Prevent unused argument(s) compilation warning */ UNUSED(cfg); /* Init Device */ /* CNTR_FRES = 1 */ USBx->CNTR = (uint16_t)USB_CNTR_FRES; 8008c5c: 68fb ldr r3, [r7, #12] 8008c5e: 2201 movs r2, #1 8008c60: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CNTR_FRES = 0 */ USBx->CNTR = 0U; 8008c64: 68fb ldr r3, [r7, #12] 8008c66: 2200 movs r2, #0 8008c68: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* Clear pending interrupts */ USBx->ISTR = 0U; 8008c6c: 68fb ldr r3, [r7, #12] 8008c6e: 2200 movs r2, #0 8008c70: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /*Set Btable Address*/ USBx->BTABLE = BTABLE_ADDRESS; 8008c74: 68fb ldr r3, [r7, #12] 8008c76: 2200 movs r2, #0 8008c78: f8a3 2050 strh.w r2, [r3, #80] @ 0x50 return HAL_OK; 8008c7c: 2300 movs r3, #0 } 8008c7e: 4618 mov r0, r3 8008c80: 3714 adds r7, #20 8008c82: 46bd mov sp, r7 8008c84: bc80 pop {r7} 8008c86: 4770 bx lr 08008c88 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8008c88: b480 push {r7} 8008c8a: b09d sub sp, #116 @ 0x74 8008c8c: af00 add r7, sp, #0 8008c8e: 6078 str r0, [r7, #4] 8008c90: 6039 str r1, [r7, #0] HAL_StatusTypeDef ret = HAL_OK; 8008c92: 2300 movs r3, #0 8008c94: f887 306f strb.w r3, [r7, #111] @ 0x6f uint16_t wEpRegVal; wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; 8008c98: 687a ldr r2, [r7, #4] 8008c9a: 683b ldr r3, [r7, #0] 8008c9c: 781b ldrb r3, [r3, #0] 8008c9e: 009b lsls r3, r3, #2 8008ca0: 4413 add r3, r2 8008ca2: 881b ldrh r3, [r3, #0] 8008ca4: b29b uxth r3, r3 8008ca6: f423 43ec bic.w r3, r3, #30208 @ 0x7600 8008caa: f023 0370 bic.w r3, r3, #112 @ 0x70 8008cae: f8a7 306c strh.w r3, [r7, #108] @ 0x6c /* initialize Endpoint */ switch (ep->type) 8008cb2: 683b ldr r3, [r7, #0] 8008cb4: 78db ldrb r3, [r3, #3] 8008cb6: 2b03 cmp r3, #3 8008cb8: d81f bhi.n 8008cfa 8008cba: a201 add r2, pc, #4 @ (adr r2, 8008cc0 ) 8008cbc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8008cc0: 08008cd1 .word 0x08008cd1 8008cc4: 08008ced .word 0x08008ced 8008cc8: 08008d03 .word 0x08008d03 8008ccc: 08008cdf .word 0x08008cdf { case EP_TYPE_CTRL: wEpRegVal |= USB_EP_CONTROL; 8008cd0: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8008cd4: f443 7300 orr.w r3, r3, #512 @ 0x200 8008cd8: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8008cdc: e012 b.n 8008d04 case EP_TYPE_BULK: wEpRegVal |= USB_EP_BULK; break; case EP_TYPE_INTR: wEpRegVal |= USB_EP_INTERRUPT; 8008cde: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8008ce2: f443 63c0 orr.w r3, r3, #1536 @ 0x600 8008ce6: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8008cea: e00b b.n 8008d04 case EP_TYPE_ISOC: wEpRegVal |= USB_EP_ISOCHRONOUS; 8008cec: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8008cf0: f443 6380 orr.w r3, r3, #1024 @ 0x400 8008cf4: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8008cf8: e004 b.n 8008d04 default: ret = HAL_ERROR; 8008cfa: 2301 movs r3, #1 8008cfc: f887 306f strb.w r3, [r7, #111] @ 0x6f break; 8008d00: e000 b.n 8008d04 break; 8008d02: bf00 nop } PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); 8008d04: 687a ldr r2, [r7, #4] 8008d06: 683b ldr r3, [r7, #0] 8008d08: 781b ldrb r3, [r3, #0] 8008d0a: 009b lsls r3, r3, #2 8008d0c: 441a add r2, r3 8008d0e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8008d12: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008d16: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008d1a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008d1e: f043 0380 orr.w r3, r3, #128 @ 0x80 8008d22: b29b uxth r3, r3 8008d24: 8013 strh r3, [r2, #0] PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); 8008d26: 687a ldr r2, [r7, #4] 8008d28: 683b ldr r3, [r7, #0] 8008d2a: 781b ldrb r3, [r3, #0] 8008d2c: 009b lsls r3, r3, #2 8008d2e: 4413 add r3, r2 8008d30: 881b ldrh r3, [r3, #0] 8008d32: b29b uxth r3, r3 8008d34: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008d38: f023 0370 bic.w r3, r3, #112 @ 0x70 8008d3c: b29b uxth r3, r3 8008d3e: 683a ldr r2, [r7, #0] 8008d40: 7812 ldrb r2, [r2, #0] 8008d42: 4313 orrs r3, r2 8008d44: f8a7 3066 strh.w r3, [r7, #102] @ 0x66 8008d48: 687a ldr r2, [r7, #4] 8008d4a: 683b ldr r3, [r7, #0] 8008d4c: 781b ldrb r3, [r3, #0] 8008d4e: 009b lsls r3, r3, #2 8008d50: 441a add r2, r3 8008d52: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66 8008d56: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008d5a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008d5e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008d62: f043 0380 orr.w r3, r3, #128 @ 0x80 8008d66: b29b uxth r3, r3 8008d68: 8013 strh r3, [r2, #0] if (ep->doublebuffer == 0U) 8008d6a: 683b ldr r3, [r7, #0] 8008d6c: 7b1b ldrb r3, [r3, #12] 8008d6e: 2b00 cmp r3, #0 8008d70: f040 8178 bne.w 8009064 { if (ep->is_in != 0U) 8008d74: 683b ldr r3, [r7, #0] 8008d76: 785b ldrb r3, [r3, #1] 8008d78: 2b00 cmp r3, #0 8008d7a: f000 8084 beq.w 8008e86 { /*Set the endpoint Transmit buffer address */ PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); 8008d7e: 687b ldr r3, [r7, #4] 8008d80: 61bb str r3, [r7, #24] 8008d82: 687b ldr r3, [r7, #4] 8008d84: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008d88: b29b uxth r3, r3 8008d8a: 461a mov r2, r3 8008d8c: 69bb ldr r3, [r7, #24] 8008d8e: 4413 add r3, r2 8008d90: 61bb str r3, [r7, #24] 8008d92: 683b ldr r3, [r7, #0] 8008d94: 781b ldrb r3, [r3, #0] 8008d96: 011a lsls r2, r3, #4 8008d98: 69bb ldr r3, [r7, #24] 8008d9a: 4413 add r3, r2 8008d9c: f503 6380 add.w r3, r3, #1024 @ 0x400 8008da0: 617b str r3, [r7, #20] 8008da2: 683b ldr r3, [r7, #0] 8008da4: 88db ldrh r3, [r3, #6] 8008da6: 085b lsrs r3, r3, #1 8008da8: b29b uxth r3, r3 8008daa: 005b lsls r3, r3, #1 8008dac: b29a uxth r2, r3 8008dae: 697b ldr r3, [r7, #20] 8008db0: 801a strh r2, [r3, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8008db2: 687a ldr r2, [r7, #4] 8008db4: 683b ldr r3, [r7, #0] 8008db6: 781b ldrb r3, [r3, #0] 8008db8: 009b lsls r3, r3, #2 8008dba: 4413 add r3, r2 8008dbc: 881b ldrh r3, [r3, #0] 8008dbe: 827b strh r3, [r7, #18] 8008dc0: 8a7b ldrh r3, [r7, #18] 8008dc2: f003 0340 and.w r3, r3, #64 @ 0x40 8008dc6: 2b00 cmp r3, #0 8008dc8: d01b beq.n 8008e02 8008dca: 687a ldr r2, [r7, #4] 8008dcc: 683b ldr r3, [r7, #0] 8008dce: 781b ldrb r3, [r3, #0] 8008dd0: 009b lsls r3, r3, #2 8008dd2: 4413 add r3, r2 8008dd4: 881b ldrh r3, [r3, #0] 8008dd6: b29b uxth r3, r3 8008dd8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008ddc: f023 0370 bic.w r3, r3, #112 @ 0x70 8008de0: 823b strh r3, [r7, #16] 8008de2: 687a ldr r2, [r7, #4] 8008de4: 683b ldr r3, [r7, #0] 8008de6: 781b ldrb r3, [r3, #0] 8008de8: 009b lsls r3, r3, #2 8008dea: 441a add r2, r3 8008dec: 8a3b ldrh r3, [r7, #16] 8008dee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008df2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008df6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008dfa: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8008dfe: b29b uxth r3, r3 8008e00: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 8008e02: 683b ldr r3, [r7, #0] 8008e04: 78db ldrb r3, [r3, #3] 8008e06: 2b01 cmp r3, #1 8008e08: d020 beq.n 8008e4c { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 8008e0a: 687a ldr r2, [r7, #4] 8008e0c: 683b ldr r3, [r7, #0] 8008e0e: 781b ldrb r3, [r3, #0] 8008e10: 009b lsls r3, r3, #2 8008e12: 4413 add r3, r2 8008e14: 881b ldrh r3, [r3, #0] 8008e16: b29b uxth r3, r3 8008e18: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008e1c: f023 0340 bic.w r3, r3, #64 @ 0x40 8008e20: 81bb strh r3, [r7, #12] 8008e22: 89bb ldrh r3, [r7, #12] 8008e24: f083 0320 eor.w r3, r3, #32 8008e28: 81bb strh r3, [r7, #12] 8008e2a: 687a ldr r2, [r7, #4] 8008e2c: 683b ldr r3, [r7, #0] 8008e2e: 781b ldrb r3, [r3, #0] 8008e30: 009b lsls r3, r3, #2 8008e32: 441a add r2, r3 8008e34: 89bb ldrh r3, [r7, #12] 8008e36: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008e3a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008e3e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008e42: f043 0380 orr.w r3, r3, #128 @ 0x80 8008e46: b29b uxth r3, r3 8008e48: 8013 strh r3, [r2, #0] 8008e4a: e2d5 b.n 80093f8 } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8008e4c: 687a ldr r2, [r7, #4] 8008e4e: 683b ldr r3, [r7, #0] 8008e50: 781b ldrb r3, [r3, #0] 8008e52: 009b lsls r3, r3, #2 8008e54: 4413 add r3, r2 8008e56: 881b ldrh r3, [r3, #0] 8008e58: b29b uxth r3, r3 8008e5a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008e5e: f023 0340 bic.w r3, r3, #64 @ 0x40 8008e62: 81fb strh r3, [r7, #14] 8008e64: 687a ldr r2, [r7, #4] 8008e66: 683b ldr r3, [r7, #0] 8008e68: 781b ldrb r3, [r3, #0] 8008e6a: 009b lsls r3, r3, #2 8008e6c: 441a add r2, r3 8008e6e: 89fb ldrh r3, [r7, #14] 8008e70: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008e74: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008e78: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008e7c: f043 0380 orr.w r3, r3, #128 @ 0x80 8008e80: b29b uxth r3, r3 8008e82: 8013 strh r3, [r2, #0] 8008e84: e2b8 b.n 80093f8 } } else { /* Set the endpoint Receive buffer address */ PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); 8008e86: 687b ldr r3, [r7, #4] 8008e88: 633b str r3, [r7, #48] @ 0x30 8008e8a: 687b ldr r3, [r7, #4] 8008e8c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008e90: b29b uxth r3, r3 8008e92: 461a mov r2, r3 8008e94: 6b3b ldr r3, [r7, #48] @ 0x30 8008e96: 4413 add r3, r2 8008e98: 633b str r3, [r7, #48] @ 0x30 8008e9a: 683b ldr r3, [r7, #0] 8008e9c: 781b ldrb r3, [r3, #0] 8008e9e: 011a lsls r2, r3, #4 8008ea0: 6b3b ldr r3, [r7, #48] @ 0x30 8008ea2: 4413 add r3, r2 8008ea4: f503 6381 add.w r3, r3, #1032 @ 0x408 8008ea8: 62fb str r3, [r7, #44] @ 0x2c 8008eaa: 683b ldr r3, [r7, #0] 8008eac: 88db ldrh r3, [r3, #6] 8008eae: 085b lsrs r3, r3, #1 8008eb0: b29b uxth r3, r3 8008eb2: 005b lsls r3, r3, #1 8008eb4: b29a uxth r2, r3 8008eb6: 6afb ldr r3, [r7, #44] @ 0x2c 8008eb8: 801a strh r2, [r3, #0] /* Set the endpoint Receive buffer counter */ PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); 8008eba: 687b ldr r3, [r7, #4] 8008ebc: 62bb str r3, [r7, #40] @ 0x28 8008ebe: 687b ldr r3, [r7, #4] 8008ec0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008ec4: b29b uxth r3, r3 8008ec6: 461a mov r2, r3 8008ec8: 6abb ldr r3, [r7, #40] @ 0x28 8008eca: 4413 add r3, r2 8008ecc: 62bb str r3, [r7, #40] @ 0x28 8008ece: 683b ldr r3, [r7, #0] 8008ed0: 781b ldrb r3, [r3, #0] 8008ed2: 011a lsls r2, r3, #4 8008ed4: 6abb ldr r3, [r7, #40] @ 0x28 8008ed6: 4413 add r3, r2 8008ed8: f203 430c addw r3, r3, #1036 @ 0x40c 8008edc: 627b str r3, [r7, #36] @ 0x24 8008ede: 6a7b ldr r3, [r7, #36] @ 0x24 8008ee0: 881b ldrh r3, [r3, #0] 8008ee2: b29b uxth r3, r3 8008ee4: f3c3 0309 ubfx r3, r3, #0, #10 8008ee8: b29a uxth r2, r3 8008eea: 6a7b ldr r3, [r7, #36] @ 0x24 8008eec: 801a strh r2, [r3, #0] 8008eee: 683b ldr r3, [r7, #0] 8008ef0: 691b ldr r3, [r3, #16] 8008ef2: 2b3e cmp r3, #62 @ 0x3e 8008ef4: d91d bls.n 8008f32 8008ef6: 683b ldr r3, [r7, #0] 8008ef8: 691b ldr r3, [r3, #16] 8008efa: 095b lsrs r3, r3, #5 8008efc: 66bb str r3, [r7, #104] @ 0x68 8008efe: 683b ldr r3, [r7, #0] 8008f00: 691b ldr r3, [r3, #16] 8008f02: f003 031f and.w r3, r3, #31 8008f06: 2b00 cmp r3, #0 8008f08: d102 bne.n 8008f10 8008f0a: 6ebb ldr r3, [r7, #104] @ 0x68 8008f0c: 3b01 subs r3, #1 8008f0e: 66bb str r3, [r7, #104] @ 0x68 8008f10: 6a7b ldr r3, [r7, #36] @ 0x24 8008f12: 881b ldrh r3, [r3, #0] 8008f14: b29a uxth r2, r3 8008f16: 6ebb ldr r3, [r7, #104] @ 0x68 8008f18: b29b uxth r3, r3 8008f1a: 029b lsls r3, r3, #10 8008f1c: b29b uxth r3, r3 8008f1e: 4313 orrs r3, r2 8008f20: b29b uxth r3, r3 8008f22: ea6f 4343 mvn.w r3, r3, lsl #17 8008f26: ea6f 4353 mvn.w r3, r3, lsr #17 8008f2a: b29a uxth r2, r3 8008f2c: 6a7b ldr r3, [r7, #36] @ 0x24 8008f2e: 801a strh r2, [r3, #0] 8008f30: e026 b.n 8008f80 8008f32: 683b ldr r3, [r7, #0] 8008f34: 691b ldr r3, [r3, #16] 8008f36: 2b00 cmp r3, #0 8008f38: d10a bne.n 8008f50 8008f3a: 6a7b ldr r3, [r7, #36] @ 0x24 8008f3c: 881b ldrh r3, [r3, #0] 8008f3e: b29b uxth r3, r3 8008f40: ea6f 4343 mvn.w r3, r3, lsl #17 8008f44: ea6f 4353 mvn.w r3, r3, lsr #17 8008f48: b29a uxth r2, r3 8008f4a: 6a7b ldr r3, [r7, #36] @ 0x24 8008f4c: 801a strh r2, [r3, #0] 8008f4e: e017 b.n 8008f80 8008f50: 683b ldr r3, [r7, #0] 8008f52: 691b ldr r3, [r3, #16] 8008f54: 085b lsrs r3, r3, #1 8008f56: 66bb str r3, [r7, #104] @ 0x68 8008f58: 683b ldr r3, [r7, #0] 8008f5a: 691b ldr r3, [r3, #16] 8008f5c: f003 0301 and.w r3, r3, #1 8008f60: 2b00 cmp r3, #0 8008f62: d002 beq.n 8008f6a 8008f64: 6ebb ldr r3, [r7, #104] @ 0x68 8008f66: 3301 adds r3, #1 8008f68: 66bb str r3, [r7, #104] @ 0x68 8008f6a: 6a7b ldr r3, [r7, #36] @ 0x24 8008f6c: 881b ldrh r3, [r3, #0] 8008f6e: b29a uxth r2, r3 8008f70: 6ebb ldr r3, [r7, #104] @ 0x68 8008f72: b29b uxth r3, r3 8008f74: 029b lsls r3, r3, #10 8008f76: b29b uxth r3, r3 8008f78: 4313 orrs r3, r2 8008f7a: b29a uxth r2, r3 8008f7c: 6a7b ldr r3, [r7, #36] @ 0x24 8008f7e: 801a strh r2, [r3, #0] PCD_CLEAR_RX_DTOG(USBx, ep->num); 8008f80: 687a ldr r2, [r7, #4] 8008f82: 683b ldr r3, [r7, #0] 8008f84: 781b ldrb r3, [r3, #0] 8008f86: 009b lsls r3, r3, #2 8008f88: 4413 add r3, r2 8008f8a: 881b ldrh r3, [r3, #0] 8008f8c: 847b strh r3, [r7, #34] @ 0x22 8008f8e: 8c7b ldrh r3, [r7, #34] @ 0x22 8008f90: f403 4380 and.w r3, r3, #16384 @ 0x4000 8008f94: 2b00 cmp r3, #0 8008f96: d01b beq.n 8008fd0 8008f98: 687a ldr r2, [r7, #4] 8008f9a: 683b ldr r3, [r7, #0] 8008f9c: 781b ldrb r3, [r3, #0] 8008f9e: 009b lsls r3, r3, #2 8008fa0: 4413 add r3, r2 8008fa2: 881b ldrh r3, [r3, #0] 8008fa4: b29b uxth r3, r3 8008fa6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008faa: f023 0370 bic.w r3, r3, #112 @ 0x70 8008fae: 843b strh r3, [r7, #32] 8008fb0: 687a ldr r2, [r7, #4] 8008fb2: 683b ldr r3, [r7, #0] 8008fb4: 781b ldrb r3, [r3, #0] 8008fb6: 009b lsls r3, r3, #2 8008fb8: 441a add r2, r3 8008fba: 8c3b ldrh r3, [r7, #32] 8008fbc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008fc0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008fc4: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8008fc8: f043 0380 orr.w r3, r3, #128 @ 0x80 8008fcc: b29b uxth r3, r3 8008fce: 8013 strh r3, [r2, #0] if (ep->num == 0U) 8008fd0: 683b ldr r3, [r7, #0] 8008fd2: 781b ldrb r3, [r3, #0] 8008fd4: 2b00 cmp r3, #0 8008fd6: d124 bne.n 8009022 { /* Configure VALID status for EP0 */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 8008fd8: 687a ldr r2, [r7, #4] 8008fda: 683b ldr r3, [r7, #0] 8008fdc: 781b ldrb r3, [r3, #0] 8008fde: 009b lsls r3, r3, #2 8008fe0: 4413 add r3, r2 8008fe2: 881b ldrh r3, [r3, #0] 8008fe4: b29b uxth r3, r3 8008fe6: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8008fea: f023 0370 bic.w r3, r3, #112 @ 0x70 8008fee: 83bb strh r3, [r7, #28] 8008ff0: 8bbb ldrh r3, [r7, #28] 8008ff2: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8008ff6: 83bb strh r3, [r7, #28] 8008ff8: 8bbb ldrh r3, [r7, #28] 8008ffa: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8008ffe: 83bb strh r3, [r7, #28] 8009000: 687a ldr r2, [r7, #4] 8009002: 683b ldr r3, [r7, #0] 8009004: 781b ldrb r3, [r3, #0] 8009006: 009b lsls r3, r3, #2 8009008: 441a add r2, r3 800900a: 8bbb ldrh r3, [r7, #28] 800900c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009010: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009014: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009018: f043 0380 orr.w r3, r3, #128 @ 0x80 800901c: b29b uxth r3, r3 800901e: 8013 strh r3, [r2, #0] 8009020: e1ea b.n 80093f8 } else { /* Configure NAK status for OUT Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK); 8009022: 687a ldr r2, [r7, #4] 8009024: 683b ldr r3, [r7, #0] 8009026: 781b ldrb r3, [r3, #0] 8009028: 009b lsls r3, r3, #2 800902a: 4413 add r3, r2 800902c: 881b ldrh r3, [r3, #0] 800902e: b29b uxth r3, r3 8009030: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8009034: f023 0370 bic.w r3, r3, #112 @ 0x70 8009038: 83fb strh r3, [r7, #30] 800903a: 8bfb ldrh r3, [r7, #30] 800903c: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8009040: 83fb strh r3, [r7, #30] 8009042: 687a ldr r2, [r7, #4] 8009044: 683b ldr r3, [r7, #0] 8009046: 781b ldrb r3, [r3, #0] 8009048: 009b lsls r3, r3, #2 800904a: 441a add r2, r3 800904c: 8bfb ldrh r3, [r7, #30] 800904e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009052: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009056: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800905a: f043 0380 orr.w r3, r3, #128 @ 0x80 800905e: b29b uxth r3, r3 8009060: 8013 strh r3, [r2, #0] 8009062: e1c9 b.n 80093f8 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->type == EP_TYPE_BULK) 8009064: 683b ldr r3, [r7, #0] 8009066: 78db ldrb r3, [r3, #3] 8009068: 2b02 cmp r3, #2 800906a: d11e bne.n 80090aa { /* Set bulk endpoint as double buffered */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 800906c: 687a ldr r2, [r7, #4] 800906e: 683b ldr r3, [r7, #0] 8009070: 781b ldrb r3, [r3, #0] 8009072: 009b lsls r3, r3, #2 8009074: 4413 add r3, r2 8009076: 881b ldrh r3, [r3, #0] 8009078: b29b uxth r3, r3 800907a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800907e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009082: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 8009086: 687a ldr r2, [r7, #4] 8009088: 683b ldr r3, [r7, #0] 800908a: 781b ldrb r3, [r3, #0] 800908c: 009b lsls r3, r3, #2 800908e: 441a add r2, r3 8009090: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 8009094: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009098: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800909c: f443 4301 orr.w r3, r3, #33024 @ 0x8100 80090a0: f043 0380 orr.w r3, r3, #128 @ 0x80 80090a4: b29b uxth r3, r3 80090a6: 8013 strh r3, [r2, #0] 80090a8: e01d b.n 80090e6 } else { /* Set the ISOC endpoint in double buffer mode */ PCD_CLEAR_EP_KIND(USBx, ep->num); 80090aa: 687a ldr r2, [r7, #4] 80090ac: 683b ldr r3, [r7, #0] 80090ae: 781b ldrb r3, [r3, #0] 80090b0: 009b lsls r3, r3, #2 80090b2: 4413 add r3, r2 80090b4: 881b ldrh r3, [r3, #0] 80090b6: b29b uxth r3, r3 80090b8: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 80090bc: f023 0370 bic.w r3, r3, #112 @ 0x70 80090c0: f8a7 3064 strh.w r3, [r7, #100] @ 0x64 80090c4: 687a ldr r2, [r7, #4] 80090c6: 683b ldr r3, [r7, #0] 80090c8: 781b ldrb r3, [r3, #0] 80090ca: 009b lsls r3, r3, #2 80090cc: 441a add r2, r3 80090ce: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64 80090d2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80090d6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80090da: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80090de: f043 0380 orr.w r3, r3, #128 @ 0x80 80090e2: b29b uxth r3, r3 80090e4: 8013 strh r3, [r2, #0] } /* Set buffer address for double buffered mode */ PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); 80090e6: 687b ldr r3, [r7, #4] 80090e8: 65fb str r3, [r7, #92] @ 0x5c 80090ea: 687b ldr r3, [r7, #4] 80090ec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80090f0: b29b uxth r3, r3 80090f2: 461a mov r2, r3 80090f4: 6dfb ldr r3, [r7, #92] @ 0x5c 80090f6: 4413 add r3, r2 80090f8: 65fb str r3, [r7, #92] @ 0x5c 80090fa: 683b ldr r3, [r7, #0] 80090fc: 781b ldrb r3, [r3, #0] 80090fe: 011a lsls r2, r3, #4 8009100: 6dfb ldr r3, [r7, #92] @ 0x5c 8009102: 4413 add r3, r2 8009104: f503 6380 add.w r3, r3, #1024 @ 0x400 8009108: 65bb str r3, [r7, #88] @ 0x58 800910a: 683b ldr r3, [r7, #0] 800910c: 891b ldrh r3, [r3, #8] 800910e: 085b lsrs r3, r3, #1 8009110: b29b uxth r3, r3 8009112: 005b lsls r3, r3, #1 8009114: b29a uxth r2, r3 8009116: 6dbb ldr r3, [r7, #88] @ 0x58 8009118: 801a strh r2, [r3, #0] 800911a: 687b ldr r3, [r7, #4] 800911c: 657b str r3, [r7, #84] @ 0x54 800911e: 687b ldr r3, [r7, #4] 8009120: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009124: b29b uxth r3, r3 8009126: 461a mov r2, r3 8009128: 6d7b ldr r3, [r7, #84] @ 0x54 800912a: 4413 add r3, r2 800912c: 657b str r3, [r7, #84] @ 0x54 800912e: 683b ldr r3, [r7, #0] 8009130: 781b ldrb r3, [r3, #0] 8009132: 011a lsls r2, r3, #4 8009134: 6d7b ldr r3, [r7, #84] @ 0x54 8009136: 4413 add r3, r2 8009138: f503 6381 add.w r3, r3, #1032 @ 0x408 800913c: 653b str r3, [r7, #80] @ 0x50 800913e: 683b ldr r3, [r7, #0] 8009140: 895b ldrh r3, [r3, #10] 8009142: 085b lsrs r3, r3, #1 8009144: b29b uxth r3, r3 8009146: 005b lsls r3, r3, #1 8009148: b29a uxth r2, r3 800914a: 6d3b ldr r3, [r7, #80] @ 0x50 800914c: 801a strh r2, [r3, #0] if (ep->is_in == 0U) 800914e: 683b ldr r3, [r7, #0] 8009150: 785b ldrb r3, [r3, #1] 8009152: 2b00 cmp r3, #0 8009154: f040 8093 bne.w 800927e { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 8009158: 687a ldr r2, [r7, #4] 800915a: 683b ldr r3, [r7, #0] 800915c: 781b ldrb r3, [r3, #0] 800915e: 009b lsls r3, r3, #2 8009160: 4413 add r3, r2 8009162: 881b ldrh r3, [r3, #0] 8009164: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 8009168: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 800916c: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009170: 2b00 cmp r3, #0 8009172: d01b beq.n 80091ac 8009174: 687a ldr r2, [r7, #4] 8009176: 683b ldr r3, [r7, #0] 8009178: 781b ldrb r3, [r3, #0] 800917a: 009b lsls r3, r3, #2 800917c: 4413 add r3, r2 800917e: 881b ldrh r3, [r3, #0] 8009180: b29b uxth r3, r3 8009182: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009186: f023 0370 bic.w r3, r3, #112 @ 0x70 800918a: 87fb strh r3, [r7, #62] @ 0x3e 800918c: 687a ldr r2, [r7, #4] 800918e: 683b ldr r3, [r7, #0] 8009190: 781b ldrb r3, [r3, #0] 8009192: 009b lsls r3, r3, #2 8009194: 441a add r2, r3 8009196: 8ffb ldrh r3, [r7, #62] @ 0x3e 8009198: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800919c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80091a0: f443 4340 orr.w r3, r3, #49152 @ 0xc000 80091a4: f043 0380 orr.w r3, r3, #128 @ 0x80 80091a8: b29b uxth r3, r3 80091aa: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 80091ac: 687a ldr r2, [r7, #4] 80091ae: 683b ldr r3, [r7, #0] 80091b0: 781b ldrb r3, [r3, #0] 80091b2: 009b lsls r3, r3, #2 80091b4: 4413 add r3, r2 80091b6: 881b ldrh r3, [r3, #0] 80091b8: 87bb strh r3, [r7, #60] @ 0x3c 80091ba: 8fbb ldrh r3, [r7, #60] @ 0x3c 80091bc: f003 0340 and.w r3, r3, #64 @ 0x40 80091c0: 2b00 cmp r3, #0 80091c2: d01b beq.n 80091fc 80091c4: 687a ldr r2, [r7, #4] 80091c6: 683b ldr r3, [r7, #0] 80091c8: 781b ldrb r3, [r3, #0] 80091ca: 009b lsls r3, r3, #2 80091cc: 4413 add r3, r2 80091ce: 881b ldrh r3, [r3, #0] 80091d0: b29b uxth r3, r3 80091d2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80091d6: f023 0370 bic.w r3, r3, #112 @ 0x70 80091da: 877b strh r3, [r7, #58] @ 0x3a 80091dc: 687a ldr r2, [r7, #4] 80091de: 683b ldr r3, [r7, #0] 80091e0: 781b ldrb r3, [r3, #0] 80091e2: 009b lsls r3, r3, #2 80091e4: 441a add r2, r3 80091e6: 8f7b ldrh r3, [r7, #58] @ 0x3a 80091e8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80091ec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80091f0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80091f4: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80091f8: b29b uxth r3, r3 80091fa: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 80091fc: 687a ldr r2, [r7, #4] 80091fe: 683b ldr r3, [r7, #0] 8009200: 781b ldrb r3, [r3, #0] 8009202: 009b lsls r3, r3, #2 8009204: 4413 add r3, r2 8009206: 881b ldrh r3, [r3, #0] 8009208: b29b uxth r3, r3 800920a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800920e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009212: 873b strh r3, [r7, #56] @ 0x38 8009214: 8f3b ldrh r3, [r7, #56] @ 0x38 8009216: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800921a: 873b strh r3, [r7, #56] @ 0x38 800921c: 8f3b ldrh r3, [r7, #56] @ 0x38 800921e: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8009222: 873b strh r3, [r7, #56] @ 0x38 8009224: 687a ldr r2, [r7, #4] 8009226: 683b ldr r3, [r7, #0] 8009228: 781b ldrb r3, [r3, #0] 800922a: 009b lsls r3, r3, #2 800922c: 441a add r2, r3 800922e: 8f3b ldrh r3, [r7, #56] @ 0x38 8009230: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009234: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009238: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800923c: f043 0380 orr.w r3, r3, #128 @ 0x80 8009240: b29b uxth r3, r3 8009242: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009244: 687a ldr r2, [r7, #4] 8009246: 683b ldr r3, [r7, #0] 8009248: 781b ldrb r3, [r3, #0] 800924a: 009b lsls r3, r3, #2 800924c: 4413 add r3, r2 800924e: 881b ldrh r3, [r3, #0] 8009250: b29b uxth r3, r3 8009252: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009256: f023 0340 bic.w r3, r3, #64 @ 0x40 800925a: 86fb strh r3, [r7, #54] @ 0x36 800925c: 687a ldr r2, [r7, #4] 800925e: 683b ldr r3, [r7, #0] 8009260: 781b ldrb r3, [r3, #0] 8009262: 009b lsls r3, r3, #2 8009264: 441a add r2, r3 8009266: 8efb ldrh r3, [r7, #54] @ 0x36 8009268: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800926c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009270: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009274: f043 0380 orr.w r3, r3, #128 @ 0x80 8009278: b29b uxth r3, r3 800927a: 8013 strh r3, [r2, #0] 800927c: e0bc b.n 80093f8 } else { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 800927e: 687a ldr r2, [r7, #4] 8009280: 683b ldr r3, [r7, #0] 8009282: 781b ldrb r3, [r3, #0] 8009284: 009b lsls r3, r3, #2 8009286: 4413 add r3, r2 8009288: 881b ldrh r3, [r3, #0] 800928a: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 800928e: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8009292: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009296: 2b00 cmp r3, #0 8009298: d01d beq.n 80092d6 800929a: 687a ldr r2, [r7, #4] 800929c: 683b ldr r3, [r7, #0] 800929e: 781b ldrb r3, [r3, #0] 80092a0: 009b lsls r3, r3, #2 80092a2: 4413 add r3, r2 80092a4: 881b ldrh r3, [r3, #0] 80092a6: b29b uxth r3, r3 80092a8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80092ac: f023 0370 bic.w r3, r3, #112 @ 0x70 80092b0: f8a7 304c strh.w r3, [r7, #76] @ 0x4c 80092b4: 687a ldr r2, [r7, #4] 80092b6: 683b ldr r3, [r7, #0] 80092b8: 781b ldrb r3, [r3, #0] 80092ba: 009b lsls r3, r3, #2 80092bc: 441a add r2, r3 80092be: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c 80092c2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80092c6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80092ca: f443 4340 orr.w r3, r3, #49152 @ 0xc000 80092ce: f043 0380 orr.w r3, r3, #128 @ 0x80 80092d2: b29b uxth r3, r3 80092d4: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 80092d6: 687a ldr r2, [r7, #4] 80092d8: 683b ldr r3, [r7, #0] 80092da: 781b ldrb r3, [r3, #0] 80092dc: 009b lsls r3, r3, #2 80092de: 4413 add r3, r2 80092e0: 881b ldrh r3, [r3, #0] 80092e2: f8a7 304a strh.w r3, [r7, #74] @ 0x4a 80092e6: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80092ea: f003 0340 and.w r3, r3, #64 @ 0x40 80092ee: 2b00 cmp r3, #0 80092f0: d01d beq.n 800932e 80092f2: 687a ldr r2, [r7, #4] 80092f4: 683b ldr r3, [r7, #0] 80092f6: 781b ldrb r3, [r3, #0] 80092f8: 009b lsls r3, r3, #2 80092fa: 4413 add r3, r2 80092fc: 881b ldrh r3, [r3, #0] 80092fe: b29b uxth r3, r3 8009300: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009304: f023 0370 bic.w r3, r3, #112 @ 0x70 8009308: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 800930c: 687a ldr r2, [r7, #4] 800930e: 683b ldr r3, [r7, #0] 8009310: 781b ldrb r3, [r3, #0] 8009312: 009b lsls r3, r3, #2 8009314: 441a add r2, r3 8009316: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48 800931a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800931e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009322: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009326: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800932a: b29b uxth r3, r3 800932c: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 800932e: 683b ldr r3, [r7, #0] 8009330: 78db ldrb r3, [r3, #3] 8009332: 2b01 cmp r3, #1 8009334: d024 beq.n 8009380 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 8009336: 687a ldr r2, [r7, #4] 8009338: 683b ldr r3, [r7, #0] 800933a: 781b ldrb r3, [r3, #0] 800933c: 009b lsls r3, r3, #2 800933e: 4413 add r3, r2 8009340: 881b ldrh r3, [r3, #0] 8009342: b29b uxth r3, r3 8009344: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009348: f023 0340 bic.w r3, r3, #64 @ 0x40 800934c: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 8009350: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 8009354: f083 0320 eor.w r3, r3, #32 8009358: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 800935c: 687a ldr r2, [r7, #4] 800935e: 683b ldr r3, [r7, #0] 8009360: 781b ldrb r3, [r3, #0] 8009362: 009b lsls r3, r3, #2 8009364: 441a add r2, r3 8009366: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 800936a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800936e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009372: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009376: f043 0380 orr.w r3, r3, #128 @ 0x80 800937a: b29b uxth r3, r3 800937c: 8013 strh r3, [r2, #0] 800937e: e01d b.n 80093bc } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009380: 687a ldr r2, [r7, #4] 8009382: 683b ldr r3, [r7, #0] 8009384: 781b ldrb r3, [r3, #0] 8009386: 009b lsls r3, r3, #2 8009388: 4413 add r3, r2 800938a: 881b ldrh r3, [r3, #0] 800938c: b29b uxth r3, r3 800938e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009392: f023 0340 bic.w r3, r3, #64 @ 0x40 8009396: f8a7 3046 strh.w r3, [r7, #70] @ 0x46 800939a: 687a ldr r2, [r7, #4] 800939c: 683b ldr r3, [r7, #0] 800939e: 781b ldrb r3, [r3, #0] 80093a0: 009b lsls r3, r3, #2 80093a2: 441a add r2, r3 80093a4: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46 80093a8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80093ac: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80093b0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80093b4: f043 0380 orr.w r3, r3, #128 @ 0x80 80093b8: b29b uxth r3, r3 80093ba: 8013 strh r3, [r2, #0] } PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 80093bc: 687a ldr r2, [r7, #4] 80093be: 683b ldr r3, [r7, #0] 80093c0: 781b ldrb r3, [r3, #0] 80093c2: 009b lsls r3, r3, #2 80093c4: 4413 add r3, r2 80093c6: 881b ldrh r3, [r3, #0] 80093c8: b29b uxth r3, r3 80093ca: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80093ce: f023 0370 bic.w r3, r3, #112 @ 0x70 80093d2: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 80093d6: 687a ldr r2, [r7, #4] 80093d8: 683b ldr r3, [r7, #0] 80093da: 781b ldrb r3, [r3, #0] 80093dc: 009b lsls r3, r3, #2 80093de: 441a add r2, r3 80093e0: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 80093e4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80093e8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80093ec: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80093f0: f043 0380 orr.w r3, r3, #128 @ 0x80 80093f4: b29b uxth r3, r3 80093f6: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return ret; 80093f8: f897 306f ldrb.w r3, [r7, #111] @ 0x6f } 80093fc: 4618 mov r0, r3 80093fe: 3774 adds r7, #116 @ 0x74 8009400: 46bd mov sp, r7 8009402: bc80 pop {r7} 8009404: 4770 bx lr 8009406: bf00 nop 08009408 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8009408: b480 push {r7} 800940a: b08d sub sp, #52 @ 0x34 800940c: af00 add r7, sp, #0 800940e: 6078 str r0, [r7, #4] 8009410: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 8009412: 683b ldr r3, [r7, #0] 8009414: 7b1b ldrb r3, [r3, #12] 8009416: 2b00 cmp r3, #0 8009418: f040 808e bne.w 8009538 { if (ep->is_in != 0U) 800941c: 683b ldr r3, [r7, #0] 800941e: 785b ldrb r3, [r3, #1] 8009420: 2b00 cmp r3, #0 8009422: d044 beq.n 80094ae { PCD_CLEAR_TX_DTOG(USBx, ep->num); 8009424: 687a ldr r2, [r7, #4] 8009426: 683b ldr r3, [r7, #0] 8009428: 781b ldrb r3, [r3, #0] 800942a: 009b lsls r3, r3, #2 800942c: 4413 add r3, r2 800942e: 881b ldrh r3, [r3, #0] 8009430: 81bb strh r3, [r7, #12] 8009432: 89bb ldrh r3, [r7, #12] 8009434: f003 0340 and.w r3, r3, #64 @ 0x40 8009438: 2b00 cmp r3, #0 800943a: d01b beq.n 8009474 800943c: 687a ldr r2, [r7, #4] 800943e: 683b ldr r3, [r7, #0] 8009440: 781b ldrb r3, [r3, #0] 8009442: 009b lsls r3, r3, #2 8009444: 4413 add r3, r2 8009446: 881b ldrh r3, [r3, #0] 8009448: b29b uxth r3, r3 800944a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800944e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009452: 817b strh r3, [r7, #10] 8009454: 687a ldr r2, [r7, #4] 8009456: 683b ldr r3, [r7, #0] 8009458: 781b ldrb r3, [r3, #0] 800945a: 009b lsls r3, r3, #2 800945c: 441a add r2, r3 800945e: 897b ldrh r3, [r7, #10] 8009460: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009464: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009468: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800946c: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8009470: b29b uxth r3, r3 8009472: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009474: 687a ldr r2, [r7, #4] 8009476: 683b ldr r3, [r7, #0] 8009478: 781b ldrb r3, [r3, #0] 800947a: 009b lsls r3, r3, #2 800947c: 4413 add r3, r2 800947e: 881b ldrh r3, [r3, #0] 8009480: b29b uxth r3, r3 8009482: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009486: f023 0340 bic.w r3, r3, #64 @ 0x40 800948a: 813b strh r3, [r7, #8] 800948c: 687a ldr r2, [r7, #4] 800948e: 683b ldr r3, [r7, #0] 8009490: 781b ldrb r3, [r3, #0] 8009492: 009b lsls r3, r3, #2 8009494: 441a add r2, r3 8009496: 893b ldrh r3, [r7, #8] 8009498: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800949c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80094a0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80094a4: f043 0380 orr.w r3, r3, #128 @ 0x80 80094a8: b29b uxth r3, r3 80094aa: 8013 strh r3, [r2, #0] 80094ac: e192 b.n 80097d4 } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 80094ae: 687a ldr r2, [r7, #4] 80094b0: 683b ldr r3, [r7, #0] 80094b2: 781b ldrb r3, [r3, #0] 80094b4: 009b lsls r3, r3, #2 80094b6: 4413 add r3, r2 80094b8: 881b ldrh r3, [r3, #0] 80094ba: 827b strh r3, [r7, #18] 80094bc: 8a7b ldrh r3, [r7, #18] 80094be: f403 4380 and.w r3, r3, #16384 @ 0x4000 80094c2: 2b00 cmp r3, #0 80094c4: d01b beq.n 80094fe 80094c6: 687a ldr r2, [r7, #4] 80094c8: 683b ldr r3, [r7, #0] 80094ca: 781b ldrb r3, [r3, #0] 80094cc: 009b lsls r3, r3, #2 80094ce: 4413 add r3, r2 80094d0: 881b ldrh r3, [r3, #0] 80094d2: b29b uxth r3, r3 80094d4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80094d8: f023 0370 bic.w r3, r3, #112 @ 0x70 80094dc: 823b strh r3, [r7, #16] 80094de: 687a ldr r2, [r7, #4] 80094e0: 683b ldr r3, [r7, #0] 80094e2: 781b ldrb r3, [r3, #0] 80094e4: 009b lsls r3, r3, #2 80094e6: 441a add r2, r3 80094e8: 8a3b ldrh r3, [r7, #16] 80094ea: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80094ee: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80094f2: f443 4340 orr.w r3, r3, #49152 @ 0xc000 80094f6: f043 0380 orr.w r3, r3, #128 @ 0x80 80094fa: b29b uxth r3, r3 80094fc: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 80094fe: 687a ldr r2, [r7, #4] 8009500: 683b ldr r3, [r7, #0] 8009502: 781b ldrb r3, [r3, #0] 8009504: 009b lsls r3, r3, #2 8009506: 4413 add r3, r2 8009508: 881b ldrh r3, [r3, #0] 800950a: b29b uxth r3, r3 800950c: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8009510: f023 0370 bic.w r3, r3, #112 @ 0x70 8009514: 81fb strh r3, [r7, #14] 8009516: 687a ldr r2, [r7, #4] 8009518: 683b ldr r3, [r7, #0] 800951a: 781b ldrb r3, [r3, #0] 800951c: 009b lsls r3, r3, #2 800951e: 441a add r2, r3 8009520: 89fb ldrh r3, [r7, #14] 8009522: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009526: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800952a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800952e: f043 0380 orr.w r3, r3, #128 @ 0x80 8009532: b29b uxth r3, r3 8009534: 8013 strh r3, [r2, #0] 8009536: e14d b.n 80097d4 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->is_in == 0U) 8009538: 683b ldr r3, [r7, #0] 800953a: 785b ldrb r3, [r3, #1] 800953c: 2b00 cmp r3, #0 800953e: f040 80a5 bne.w 800968c { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 8009542: 687a ldr r2, [r7, #4] 8009544: 683b ldr r3, [r7, #0] 8009546: 781b ldrb r3, [r3, #0] 8009548: 009b lsls r3, r3, #2 800954a: 4413 add r3, r2 800954c: 881b ldrh r3, [r3, #0] 800954e: 843b strh r3, [r7, #32] 8009550: 8c3b ldrh r3, [r7, #32] 8009552: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009556: 2b00 cmp r3, #0 8009558: d01b beq.n 8009592 800955a: 687a ldr r2, [r7, #4] 800955c: 683b ldr r3, [r7, #0] 800955e: 781b ldrb r3, [r3, #0] 8009560: 009b lsls r3, r3, #2 8009562: 4413 add r3, r2 8009564: 881b ldrh r3, [r3, #0] 8009566: b29b uxth r3, r3 8009568: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800956c: f023 0370 bic.w r3, r3, #112 @ 0x70 8009570: 83fb strh r3, [r7, #30] 8009572: 687a ldr r2, [r7, #4] 8009574: 683b ldr r3, [r7, #0] 8009576: 781b ldrb r3, [r3, #0] 8009578: 009b lsls r3, r3, #2 800957a: 441a add r2, r3 800957c: 8bfb ldrh r3, [r7, #30] 800957e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009582: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009586: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800958a: f043 0380 orr.w r3, r3, #128 @ 0x80 800958e: b29b uxth r3, r3 8009590: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8009592: 687a ldr r2, [r7, #4] 8009594: 683b ldr r3, [r7, #0] 8009596: 781b ldrb r3, [r3, #0] 8009598: 009b lsls r3, r3, #2 800959a: 4413 add r3, r2 800959c: 881b ldrh r3, [r3, #0] 800959e: 83bb strh r3, [r7, #28] 80095a0: 8bbb ldrh r3, [r7, #28] 80095a2: f003 0340 and.w r3, r3, #64 @ 0x40 80095a6: 2b00 cmp r3, #0 80095a8: d01b beq.n 80095e2 80095aa: 687a ldr r2, [r7, #4] 80095ac: 683b ldr r3, [r7, #0] 80095ae: 781b ldrb r3, [r3, #0] 80095b0: 009b lsls r3, r3, #2 80095b2: 4413 add r3, r2 80095b4: 881b ldrh r3, [r3, #0] 80095b6: b29b uxth r3, r3 80095b8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80095bc: f023 0370 bic.w r3, r3, #112 @ 0x70 80095c0: 837b strh r3, [r7, #26] 80095c2: 687a ldr r2, [r7, #4] 80095c4: 683b ldr r3, [r7, #0] 80095c6: 781b ldrb r3, [r3, #0] 80095c8: 009b lsls r3, r3, #2 80095ca: 441a add r2, r3 80095cc: 8b7b ldrh r3, [r7, #26] 80095ce: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80095d2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80095d6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80095da: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80095de: b29b uxth r3, r3 80095e0: 8013 strh r3, [r2, #0] /* Reset value of the data toggle bits for the endpoint out*/ PCD_TX_DTOG(USBx, ep->num); 80095e2: 687a ldr r2, [r7, #4] 80095e4: 683b ldr r3, [r7, #0] 80095e6: 781b ldrb r3, [r3, #0] 80095e8: 009b lsls r3, r3, #2 80095ea: 4413 add r3, r2 80095ec: 881b ldrh r3, [r3, #0] 80095ee: b29b uxth r3, r3 80095f0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80095f4: f023 0370 bic.w r3, r3, #112 @ 0x70 80095f8: 833b strh r3, [r7, #24] 80095fa: 687a ldr r2, [r7, #4] 80095fc: 683b ldr r3, [r7, #0] 80095fe: 781b ldrb r3, [r3, #0] 8009600: 009b lsls r3, r3, #2 8009602: 441a add r2, r3 8009604: 8b3b ldrh r3, [r7, #24] 8009606: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800960a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800960e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009612: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8009616: b29b uxth r3, r3 8009618: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800961a: 687a ldr r2, [r7, #4] 800961c: 683b ldr r3, [r7, #0] 800961e: 781b ldrb r3, [r3, #0] 8009620: 009b lsls r3, r3, #2 8009622: 4413 add r3, r2 8009624: 881b ldrh r3, [r3, #0] 8009626: b29b uxth r3, r3 8009628: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800962c: f023 0370 bic.w r3, r3, #112 @ 0x70 8009630: 82fb strh r3, [r7, #22] 8009632: 687a ldr r2, [r7, #4] 8009634: 683b ldr r3, [r7, #0] 8009636: 781b ldrb r3, [r3, #0] 8009638: 009b lsls r3, r3, #2 800963a: 441a add r2, r3 800963c: 8afb ldrh r3, [r7, #22] 800963e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009642: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009646: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800964a: f043 0380 orr.w r3, r3, #128 @ 0x80 800964e: b29b uxth r3, r3 8009650: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009652: 687a ldr r2, [r7, #4] 8009654: 683b ldr r3, [r7, #0] 8009656: 781b ldrb r3, [r3, #0] 8009658: 009b lsls r3, r3, #2 800965a: 4413 add r3, r2 800965c: 881b ldrh r3, [r3, #0] 800965e: b29b uxth r3, r3 8009660: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009664: f023 0340 bic.w r3, r3, #64 @ 0x40 8009668: 82bb strh r3, [r7, #20] 800966a: 687a ldr r2, [r7, #4] 800966c: 683b ldr r3, [r7, #0] 800966e: 781b ldrb r3, [r3, #0] 8009670: 009b lsls r3, r3, #2 8009672: 441a add r2, r3 8009674: 8abb ldrh r3, [r7, #20] 8009676: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800967a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800967e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009682: f043 0380 orr.w r3, r3, #128 @ 0x80 8009686: b29b uxth r3, r3 8009688: 8013 strh r3, [r2, #0] 800968a: e0a3 b.n 80097d4 } else { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 800968c: 687a ldr r2, [r7, #4] 800968e: 683b ldr r3, [r7, #0] 8009690: 781b ldrb r3, [r3, #0] 8009692: 009b lsls r3, r3, #2 8009694: 4413 add r3, r2 8009696: 881b ldrh r3, [r3, #0] 8009698: 85fb strh r3, [r7, #46] @ 0x2e 800969a: 8dfb ldrh r3, [r7, #46] @ 0x2e 800969c: f403 4380 and.w r3, r3, #16384 @ 0x4000 80096a0: 2b00 cmp r3, #0 80096a2: d01b beq.n 80096dc 80096a4: 687a ldr r2, [r7, #4] 80096a6: 683b ldr r3, [r7, #0] 80096a8: 781b ldrb r3, [r3, #0] 80096aa: 009b lsls r3, r3, #2 80096ac: 4413 add r3, r2 80096ae: 881b ldrh r3, [r3, #0] 80096b0: b29b uxth r3, r3 80096b2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80096b6: f023 0370 bic.w r3, r3, #112 @ 0x70 80096ba: 85bb strh r3, [r7, #44] @ 0x2c 80096bc: 687a ldr r2, [r7, #4] 80096be: 683b ldr r3, [r7, #0] 80096c0: 781b ldrb r3, [r3, #0] 80096c2: 009b lsls r3, r3, #2 80096c4: 441a add r2, r3 80096c6: 8dbb ldrh r3, [r7, #44] @ 0x2c 80096c8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80096cc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80096d0: f443 4340 orr.w r3, r3, #49152 @ 0xc000 80096d4: f043 0380 orr.w r3, r3, #128 @ 0x80 80096d8: b29b uxth r3, r3 80096da: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 80096dc: 687a ldr r2, [r7, #4] 80096de: 683b ldr r3, [r7, #0] 80096e0: 781b ldrb r3, [r3, #0] 80096e2: 009b lsls r3, r3, #2 80096e4: 4413 add r3, r2 80096e6: 881b ldrh r3, [r3, #0] 80096e8: 857b strh r3, [r7, #42] @ 0x2a 80096ea: 8d7b ldrh r3, [r7, #42] @ 0x2a 80096ec: f003 0340 and.w r3, r3, #64 @ 0x40 80096f0: 2b00 cmp r3, #0 80096f2: d01b beq.n 800972c 80096f4: 687a ldr r2, [r7, #4] 80096f6: 683b ldr r3, [r7, #0] 80096f8: 781b ldrb r3, [r3, #0] 80096fa: 009b lsls r3, r3, #2 80096fc: 4413 add r3, r2 80096fe: 881b ldrh r3, [r3, #0] 8009700: b29b uxth r3, r3 8009702: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009706: f023 0370 bic.w r3, r3, #112 @ 0x70 800970a: 853b strh r3, [r7, #40] @ 0x28 800970c: 687a ldr r2, [r7, #4] 800970e: 683b ldr r3, [r7, #0] 8009710: 781b ldrb r3, [r3, #0] 8009712: 009b lsls r3, r3, #2 8009714: 441a add r2, r3 8009716: 8d3b ldrh r3, [r7, #40] @ 0x28 8009718: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800971c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009720: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009724: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8009728: b29b uxth r3, r3 800972a: 8013 strh r3, [r2, #0] PCD_RX_DTOG(USBx, ep->num); 800972c: 687a ldr r2, [r7, #4] 800972e: 683b ldr r3, [r7, #0] 8009730: 781b ldrb r3, [r3, #0] 8009732: 009b lsls r3, r3, #2 8009734: 4413 add r3, r2 8009736: 881b ldrh r3, [r3, #0] 8009738: b29b uxth r3, r3 800973a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800973e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009742: 84fb strh r3, [r7, #38] @ 0x26 8009744: 687a ldr r2, [r7, #4] 8009746: 683b ldr r3, [r7, #0] 8009748: 781b ldrb r3, [r3, #0] 800974a: 009b lsls r3, r3, #2 800974c: 441a add r2, r3 800974e: 8cfb ldrh r3, [r7, #38] @ 0x26 8009750: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009754: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009758: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800975c: f043 0380 orr.w r3, r3, #128 @ 0x80 8009760: b29b uxth r3, r3 8009762: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint*/ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009764: 687a ldr r2, [r7, #4] 8009766: 683b ldr r3, [r7, #0] 8009768: 781b ldrb r3, [r3, #0] 800976a: 009b lsls r3, r3, #2 800976c: 4413 add r3, r2 800976e: 881b ldrh r3, [r3, #0] 8009770: b29b uxth r3, r3 8009772: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009776: f023 0340 bic.w r3, r3, #64 @ 0x40 800977a: 84bb strh r3, [r7, #36] @ 0x24 800977c: 687a ldr r2, [r7, #4] 800977e: 683b ldr r3, [r7, #0] 8009780: 781b ldrb r3, [r3, #0] 8009782: 009b lsls r3, r3, #2 8009784: 441a add r2, r3 8009786: 8cbb ldrh r3, [r7, #36] @ 0x24 8009788: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800978c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009790: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009794: f043 0380 orr.w r3, r3, #128 @ 0x80 8009798: b29b uxth r3, r3 800979a: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800979c: 687a ldr r2, [r7, #4] 800979e: 683b ldr r3, [r7, #0] 80097a0: 781b ldrb r3, [r3, #0] 80097a2: 009b lsls r3, r3, #2 80097a4: 4413 add r3, r2 80097a6: 881b ldrh r3, [r3, #0] 80097a8: b29b uxth r3, r3 80097aa: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80097ae: f023 0370 bic.w r3, r3, #112 @ 0x70 80097b2: 847b strh r3, [r7, #34] @ 0x22 80097b4: 687a ldr r2, [r7, #4] 80097b6: 683b ldr r3, [r7, #0] 80097b8: 781b ldrb r3, [r3, #0] 80097ba: 009b lsls r3, r3, #2 80097bc: 441a add r2, r3 80097be: 8c7b ldrh r3, [r7, #34] @ 0x22 80097c0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80097c4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80097c8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80097cc: f043 0380 orr.w r3, r3, #128 @ 0x80 80097d0: b29b uxth r3, r3 80097d2: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 80097d4: 2300 movs r3, #0 } 80097d6: 4618 mov r0, r3 80097d8: 3734 adds r7, #52 @ 0x34 80097da: 46bd mov sp, r7 80097dc: bc80 pop {r7} 80097de: 4770 bx lr 080097e0 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 80097e0: b580 push {r7, lr} 80097e2: b0c2 sub sp, #264 @ 0x108 80097e4: af00 add r7, sp, #0 80097e6: f507 7384 add.w r3, r7, #264 @ 0x108 80097ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80097ee: 6018 str r0, [r3, #0] 80097f0: f507 7384 add.w r3, r7, #264 @ 0x108 80097f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80097f8: 6019 str r1, [r3, #0] uint16_t pmabuffer; uint16_t wEPVal; #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* IN endpoint */ if (ep->is_in == 1U) 80097fa: f507 7384 add.w r3, r7, #264 @ 0x108 80097fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009802: 681b ldr r3, [r3, #0] 8009804: 785b ldrb r3, [r3, #1] 8009806: 2b01 cmp r3, #1 8009808: f040 86b7 bne.w 800a57a { /*Multi packet transfer*/ if (ep->xfer_len > ep->maxpacket) 800980c: f507 7384 add.w r3, r7, #264 @ 0x108 8009810: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009814: 681b ldr r3, [r3, #0] 8009816: 699a ldr r2, [r3, #24] 8009818: f507 7384 add.w r3, r7, #264 @ 0x108 800981c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009820: 681b ldr r3, [r3, #0] 8009822: 691b ldr r3, [r3, #16] 8009824: 429a cmp r2, r3 8009826: d908 bls.n 800983a { len = ep->maxpacket; 8009828: f507 7384 add.w r3, r7, #264 @ 0x108 800982c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009830: 681b ldr r3, [r3, #0] 8009832: 691b ldr r3, [r3, #16] 8009834: f8c7 3104 str.w r3, [r7, #260] @ 0x104 8009838: e007 b.n 800984a } else { len = ep->xfer_len; 800983a: f507 7384 add.w r3, r7, #264 @ 0x108 800983e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009842: 681b ldr r3, [r3, #0] 8009844: 699b ldr r3, [r3, #24] 8009846: f8c7 3104 str.w r3, [r7, #260] @ 0x104 } /* configure and validate Tx endpoint */ if (ep->doublebuffer == 0U) 800984a: f507 7384 add.w r3, r7, #264 @ 0x108 800984e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009852: 681b ldr r3, [r3, #0] 8009854: 7b1b ldrb r3, [r3, #12] 8009856: 2b00 cmp r3, #0 8009858: d13a bne.n 80098d0 { USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); 800985a: f507 7384 add.w r3, r7, #264 @ 0x108 800985e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009862: 681b ldr r3, [r3, #0] 8009864: 6959 ldr r1, [r3, #20] 8009866: f507 7384 add.w r3, r7, #264 @ 0x108 800986a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800986e: 681b ldr r3, [r3, #0] 8009870: 88da ldrh r2, [r3, #6] 8009872: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009876: b29b uxth r3, r3 8009878: f507 7084 add.w r0, r7, #264 @ 0x108 800987c: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8009880: 6800 ldr r0, [r0, #0] 8009882: f001 fc9c bl 800b1be PCD_SET_EP_TX_CNT(USBx, ep->num, len); 8009886: f507 7384 add.w r3, r7, #264 @ 0x108 800988a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800988e: 681b ldr r3, [r3, #0] 8009890: 613b str r3, [r7, #16] 8009892: f507 7384 add.w r3, r7, #264 @ 0x108 8009896: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800989a: 681b ldr r3, [r3, #0] 800989c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80098a0: b29b uxth r3, r3 80098a2: 461a mov r2, r3 80098a4: 693b ldr r3, [r7, #16] 80098a6: 4413 add r3, r2 80098a8: 613b str r3, [r7, #16] 80098aa: f507 7384 add.w r3, r7, #264 @ 0x108 80098ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80098b2: 681b ldr r3, [r3, #0] 80098b4: 781b ldrb r3, [r3, #0] 80098b6: 011a lsls r2, r3, #4 80098b8: 693b ldr r3, [r7, #16] 80098ba: 4413 add r3, r2 80098bc: f203 4304 addw r3, r3, #1028 @ 0x404 80098c0: 60fb str r3, [r7, #12] 80098c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80098c6: b29a uxth r2, r3 80098c8: 68fb ldr r3, [r7, #12] 80098ca: 801a strh r2, [r3, #0] 80098cc: f000 be1f b.w 800a50e } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* double buffer bulk management */ if (ep->type == EP_TYPE_BULK) 80098d0: f507 7384 add.w r3, r7, #264 @ 0x108 80098d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80098d8: 681b ldr r3, [r3, #0] 80098da: 78db ldrb r3, [r3, #3] 80098dc: 2b02 cmp r3, #2 80098de: f040 8462 bne.w 800a1a6 { if (ep->xfer_len_db > ep->maxpacket) 80098e2: f507 7384 add.w r3, r7, #264 @ 0x108 80098e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80098ea: 681b ldr r3, [r3, #0] 80098ec: 6a1a ldr r2, [r3, #32] 80098ee: f507 7384 add.w r3, r7, #264 @ 0x108 80098f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80098f6: 681b ldr r3, [r3, #0] 80098f8: 691b ldr r3, [r3, #16] 80098fa: 429a cmp r2, r3 80098fc: f240 83df bls.w 800a0be { /* enable double buffer */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 8009900: f507 7384 add.w r3, r7, #264 @ 0x108 8009904: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009908: 681a ldr r2, [r3, #0] 800990a: f507 7384 add.w r3, r7, #264 @ 0x108 800990e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009912: 681b ldr r3, [r3, #0] 8009914: 781b ldrb r3, [r3, #0] 8009916: 009b lsls r3, r3, #2 8009918: 4413 add r3, r2 800991a: 881b ldrh r3, [r3, #0] 800991c: b29b uxth r3, r3 800991e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009922: f023 0370 bic.w r3, r3, #112 @ 0x70 8009926: f8a7 3056 strh.w r3, [r7, #86] @ 0x56 800992a: f507 7384 add.w r3, r7, #264 @ 0x108 800992e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009932: 681a ldr r2, [r3, #0] 8009934: f507 7384 add.w r3, r7, #264 @ 0x108 8009938: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800993c: 681b ldr r3, [r3, #0] 800993e: 781b ldrb r3, [r3, #0] 8009940: 009b lsls r3, r3, #2 8009942: 441a add r2, r3 8009944: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56 8009948: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800994c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009950: f443 4301 orr.w r3, r3, #33024 @ 0x8100 8009954: f043 0380 orr.w r3, r3, #128 @ 0x80 8009958: b29b uxth r3, r3 800995a: 8013 strh r3, [r2, #0] /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 800995c: f507 7384 add.w r3, r7, #264 @ 0x108 8009960: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009964: 681b ldr r3, [r3, #0] 8009966: 6a1a ldr r2, [r3, #32] 8009968: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800996c: 1ad2 subs r2, r2, r3 800996e: f507 7384 add.w r3, r7, #264 @ 0x108 8009972: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009976: 681b ldr r3, [r3, #0] 8009978: 621a str r2, [r3, #32] /* Fill the two first buffer in the Buffer0 & Buffer1 */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 800997a: f507 7384 add.w r3, r7, #264 @ 0x108 800997e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009982: 681a ldr r2, [r3, #0] 8009984: f507 7384 add.w r3, r7, #264 @ 0x108 8009988: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800998c: 681b ldr r3, [r3, #0] 800998e: 781b ldrb r3, [r3, #0] 8009990: 009b lsls r3, r3, #2 8009992: 4413 add r3, r2 8009994: 881b ldrh r3, [r3, #0] 8009996: b29b uxth r3, r3 8009998: f003 0340 and.w r3, r3, #64 @ 0x40 800999c: 2b00 cmp r3, #0 800999e: f000 81c7 beq.w 8009d30 { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 80099a2: f507 7384 add.w r3, r7, #264 @ 0x108 80099a6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80099aa: 681b ldr r3, [r3, #0] 80099ac: 633b str r3, [r7, #48] @ 0x30 80099ae: f507 7384 add.w r3, r7, #264 @ 0x108 80099b2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80099b6: 681b ldr r3, [r3, #0] 80099b8: 785b ldrb r3, [r3, #1] 80099ba: 2b00 cmp r3, #0 80099bc: d177 bne.n 8009aae 80099be: f507 7384 add.w r3, r7, #264 @ 0x108 80099c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80099c6: 681b ldr r3, [r3, #0] 80099c8: 62bb str r3, [r7, #40] @ 0x28 80099ca: f507 7384 add.w r3, r7, #264 @ 0x108 80099ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80099d2: 681b ldr r3, [r3, #0] 80099d4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80099d8: b29b uxth r3, r3 80099da: 461a mov r2, r3 80099dc: 6abb ldr r3, [r7, #40] @ 0x28 80099de: 4413 add r3, r2 80099e0: 62bb str r3, [r7, #40] @ 0x28 80099e2: f507 7384 add.w r3, r7, #264 @ 0x108 80099e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80099ea: 681b ldr r3, [r3, #0] 80099ec: 781b ldrb r3, [r3, #0] 80099ee: 011a lsls r2, r3, #4 80099f0: 6abb ldr r3, [r7, #40] @ 0x28 80099f2: 4413 add r3, r2 80099f4: f203 430c addw r3, r3, #1036 @ 0x40c 80099f8: 627b str r3, [r7, #36] @ 0x24 80099fa: 6a7b ldr r3, [r7, #36] @ 0x24 80099fc: 881b ldrh r3, [r3, #0] 80099fe: b29b uxth r3, r3 8009a00: f3c3 0309 ubfx r3, r3, #0, #10 8009a04: b29a uxth r2, r3 8009a06: 6a7b ldr r3, [r7, #36] @ 0x24 8009a08: 801a strh r2, [r3, #0] 8009a0a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009a0e: 2b3e cmp r3, #62 @ 0x3e 8009a10: d921 bls.n 8009a56 8009a12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009a16: 095b lsrs r3, r3, #5 8009a18: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8009a1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009a20: f003 031f and.w r3, r3, #31 8009a24: 2b00 cmp r3, #0 8009a26: d104 bne.n 8009a32 8009a28: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8009a2c: 3b01 subs r3, #1 8009a2e: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8009a32: 6a7b ldr r3, [r7, #36] @ 0x24 8009a34: 881b ldrh r3, [r3, #0] 8009a36: b29a uxth r2, r3 8009a38: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8009a3c: b29b uxth r3, r3 8009a3e: 029b lsls r3, r3, #10 8009a40: b29b uxth r3, r3 8009a42: 4313 orrs r3, r2 8009a44: b29b uxth r3, r3 8009a46: ea6f 4343 mvn.w r3, r3, lsl #17 8009a4a: ea6f 4353 mvn.w r3, r3, lsr #17 8009a4e: b29a uxth r2, r3 8009a50: 6a7b ldr r3, [r7, #36] @ 0x24 8009a52: 801a strh r2, [r3, #0] 8009a54: e050 b.n 8009af8 8009a56: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009a5a: 2b00 cmp r3, #0 8009a5c: d10a bne.n 8009a74 8009a5e: 6a7b ldr r3, [r7, #36] @ 0x24 8009a60: 881b ldrh r3, [r3, #0] 8009a62: b29b uxth r3, r3 8009a64: ea6f 4343 mvn.w r3, r3, lsl #17 8009a68: ea6f 4353 mvn.w r3, r3, lsr #17 8009a6c: b29a uxth r2, r3 8009a6e: 6a7b ldr r3, [r7, #36] @ 0x24 8009a70: 801a strh r2, [r3, #0] 8009a72: e041 b.n 8009af8 8009a74: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009a78: 085b lsrs r3, r3, #1 8009a7a: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8009a7e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009a82: f003 0301 and.w r3, r3, #1 8009a86: 2b00 cmp r3, #0 8009a88: d004 beq.n 8009a94 8009a8a: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8009a8e: 3301 adds r3, #1 8009a90: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8009a94: 6a7b ldr r3, [r7, #36] @ 0x24 8009a96: 881b ldrh r3, [r3, #0] 8009a98: b29a uxth r2, r3 8009a9a: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8009a9e: b29b uxth r3, r3 8009aa0: 029b lsls r3, r3, #10 8009aa2: b29b uxth r3, r3 8009aa4: 4313 orrs r3, r2 8009aa6: b29a uxth r2, r3 8009aa8: 6a7b ldr r3, [r7, #36] @ 0x24 8009aaa: 801a strh r2, [r3, #0] 8009aac: e024 b.n 8009af8 8009aae: f507 7384 add.w r3, r7, #264 @ 0x108 8009ab2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ab6: 681b ldr r3, [r3, #0] 8009ab8: 785b ldrb r3, [r3, #1] 8009aba: 2b01 cmp r3, #1 8009abc: d11c bne.n 8009af8 8009abe: f507 7384 add.w r3, r7, #264 @ 0x108 8009ac2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009ac6: 681b ldr r3, [r3, #0] 8009ac8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009acc: b29b uxth r3, r3 8009ace: 461a mov r2, r3 8009ad0: 6b3b ldr r3, [r7, #48] @ 0x30 8009ad2: 4413 add r3, r2 8009ad4: 633b str r3, [r7, #48] @ 0x30 8009ad6: f507 7384 add.w r3, r7, #264 @ 0x108 8009ada: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ade: 681b ldr r3, [r3, #0] 8009ae0: 781b ldrb r3, [r3, #0] 8009ae2: 011a lsls r2, r3, #4 8009ae4: 6b3b ldr r3, [r7, #48] @ 0x30 8009ae6: 4413 add r3, r2 8009ae8: f203 430c addw r3, r3, #1036 @ 0x40c 8009aec: 62fb str r3, [r7, #44] @ 0x2c 8009aee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009af2: b29a uxth r2, r3 8009af4: 6afb ldr r3, [r7, #44] @ 0x2c 8009af6: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 8009af8: f507 7384 add.w r3, r7, #264 @ 0x108 8009afc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b00: 681b ldr r3, [r3, #0] 8009b02: 895b ldrh r3, [r3, #10] 8009b04: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8009b08: f507 7384 add.w r3, r7, #264 @ 0x108 8009b0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b10: 681b ldr r3, [r3, #0] 8009b12: 6959 ldr r1, [r3, #20] 8009b14: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009b18: b29b uxth r3, r3 8009b1a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8009b1e: f507 7084 add.w r0, r7, #264 @ 0x108 8009b22: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8009b26: 6800 ldr r0, [r0, #0] 8009b28: f001 fb49 bl 800b1be ep->xfer_buff += len; 8009b2c: f507 7384 add.w r3, r7, #264 @ 0x108 8009b30: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b34: 681b ldr r3, [r3, #0] 8009b36: 695a ldr r2, [r3, #20] 8009b38: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009b3c: 441a add r2, r3 8009b3e: f507 7384 add.w r3, r7, #264 @ 0x108 8009b42: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b46: 681b ldr r3, [r3, #0] 8009b48: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 8009b4a: f507 7384 add.w r3, r7, #264 @ 0x108 8009b4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b52: 681b ldr r3, [r3, #0] 8009b54: 6a1a ldr r2, [r3, #32] 8009b56: f507 7384 add.w r3, r7, #264 @ 0x108 8009b5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b5e: 681b ldr r3, [r3, #0] 8009b60: 691b ldr r3, [r3, #16] 8009b62: 429a cmp r2, r3 8009b64: d90f bls.n 8009b86 { ep->xfer_len_db -= len; 8009b66: f507 7384 add.w r3, r7, #264 @ 0x108 8009b6a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b6e: 681b ldr r3, [r3, #0] 8009b70: 6a1a ldr r2, [r3, #32] 8009b72: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009b76: 1ad2 subs r2, r2, r3 8009b78: f507 7384 add.w r3, r7, #264 @ 0x108 8009b7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b80: 681b ldr r3, [r3, #0] 8009b82: 621a str r2, [r3, #32] 8009b84: e00e b.n 8009ba4 } else { len = ep->xfer_len_db; 8009b86: f507 7384 add.w r3, r7, #264 @ 0x108 8009b8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b8e: 681b ldr r3, [r3, #0] 8009b90: 6a1b ldr r3, [r3, #32] 8009b92: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 8009b96: f507 7384 add.w r3, r7, #264 @ 0x108 8009b9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b9e: 681b ldr r3, [r3, #0] 8009ba0: 2200 movs r2, #0 8009ba2: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 8009ba4: f507 7384 add.w r3, r7, #264 @ 0x108 8009ba8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009bac: 681b ldr r3, [r3, #0] 8009bae: 785b ldrb r3, [r3, #1] 8009bb0: 2b00 cmp r3, #0 8009bb2: d177 bne.n 8009ca4 8009bb4: f507 7384 add.w r3, r7, #264 @ 0x108 8009bb8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009bbc: 681b ldr r3, [r3, #0] 8009bbe: 61bb str r3, [r7, #24] 8009bc0: f507 7384 add.w r3, r7, #264 @ 0x108 8009bc4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009bc8: 681b ldr r3, [r3, #0] 8009bca: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009bce: b29b uxth r3, r3 8009bd0: 461a mov r2, r3 8009bd2: 69bb ldr r3, [r7, #24] 8009bd4: 4413 add r3, r2 8009bd6: 61bb str r3, [r7, #24] 8009bd8: f507 7384 add.w r3, r7, #264 @ 0x108 8009bdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009be0: 681b ldr r3, [r3, #0] 8009be2: 781b ldrb r3, [r3, #0] 8009be4: 011a lsls r2, r3, #4 8009be6: 69bb ldr r3, [r7, #24] 8009be8: 4413 add r3, r2 8009bea: f203 4304 addw r3, r3, #1028 @ 0x404 8009bee: 617b str r3, [r7, #20] 8009bf0: 697b ldr r3, [r7, #20] 8009bf2: 881b ldrh r3, [r3, #0] 8009bf4: b29b uxth r3, r3 8009bf6: f3c3 0309 ubfx r3, r3, #0, #10 8009bfa: b29a uxth r2, r3 8009bfc: 697b ldr r3, [r7, #20] 8009bfe: 801a strh r2, [r3, #0] 8009c00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c04: 2b3e cmp r3, #62 @ 0x3e 8009c06: d921 bls.n 8009c4c 8009c08: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c0c: 095b lsrs r3, r3, #5 8009c0e: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8009c12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c16: f003 031f and.w r3, r3, #31 8009c1a: 2b00 cmp r3, #0 8009c1c: d104 bne.n 8009c28 8009c1e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8009c22: 3b01 subs r3, #1 8009c24: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8009c28: 697b ldr r3, [r7, #20] 8009c2a: 881b ldrh r3, [r3, #0] 8009c2c: b29a uxth r2, r3 8009c2e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8009c32: b29b uxth r3, r3 8009c34: 029b lsls r3, r3, #10 8009c36: b29b uxth r3, r3 8009c38: 4313 orrs r3, r2 8009c3a: b29b uxth r3, r3 8009c3c: ea6f 4343 mvn.w r3, r3, lsl #17 8009c40: ea6f 4353 mvn.w r3, r3, lsr #17 8009c44: b29a uxth r2, r3 8009c46: 697b ldr r3, [r7, #20] 8009c48: 801a strh r2, [r3, #0] 8009c4a: e056 b.n 8009cfa 8009c4c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c50: 2b00 cmp r3, #0 8009c52: d10a bne.n 8009c6a 8009c54: 697b ldr r3, [r7, #20] 8009c56: 881b ldrh r3, [r3, #0] 8009c58: b29b uxth r3, r3 8009c5a: ea6f 4343 mvn.w r3, r3, lsl #17 8009c5e: ea6f 4353 mvn.w r3, r3, lsr #17 8009c62: b29a uxth r2, r3 8009c64: 697b ldr r3, [r7, #20] 8009c66: 801a strh r2, [r3, #0] 8009c68: e047 b.n 8009cfa 8009c6a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c6e: 085b lsrs r3, r3, #1 8009c70: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8009c74: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c78: f003 0301 and.w r3, r3, #1 8009c7c: 2b00 cmp r3, #0 8009c7e: d004 beq.n 8009c8a 8009c80: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8009c84: 3301 adds r3, #1 8009c86: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8009c8a: 697b ldr r3, [r7, #20] 8009c8c: 881b ldrh r3, [r3, #0] 8009c8e: b29a uxth r2, r3 8009c90: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8009c94: b29b uxth r3, r3 8009c96: 029b lsls r3, r3, #10 8009c98: b29b uxth r3, r3 8009c9a: 4313 orrs r3, r2 8009c9c: b29a uxth r2, r3 8009c9e: 697b ldr r3, [r7, #20] 8009ca0: 801a strh r2, [r3, #0] 8009ca2: e02a b.n 8009cfa 8009ca4: f507 7384 add.w r3, r7, #264 @ 0x108 8009ca8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009cac: 681b ldr r3, [r3, #0] 8009cae: 785b ldrb r3, [r3, #1] 8009cb0: 2b01 cmp r3, #1 8009cb2: d122 bne.n 8009cfa 8009cb4: f507 7384 add.w r3, r7, #264 @ 0x108 8009cb8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009cbc: 681b ldr r3, [r3, #0] 8009cbe: 623b str r3, [r7, #32] 8009cc0: f507 7384 add.w r3, r7, #264 @ 0x108 8009cc4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009cc8: 681b ldr r3, [r3, #0] 8009cca: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009cce: b29b uxth r3, r3 8009cd0: 461a mov r2, r3 8009cd2: 6a3b ldr r3, [r7, #32] 8009cd4: 4413 add r3, r2 8009cd6: 623b str r3, [r7, #32] 8009cd8: f507 7384 add.w r3, r7, #264 @ 0x108 8009cdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ce0: 681b ldr r3, [r3, #0] 8009ce2: 781b ldrb r3, [r3, #0] 8009ce4: 011a lsls r2, r3, #4 8009ce6: 6a3b ldr r3, [r7, #32] 8009ce8: 4413 add r3, r2 8009cea: f203 4304 addw r3, r3, #1028 @ 0x404 8009cee: 61fb str r3, [r7, #28] 8009cf0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009cf4: b29a uxth r2, r3 8009cf6: 69fb ldr r3, [r7, #28] 8009cf8: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8009cfa: f507 7384 add.w r3, r7, #264 @ 0x108 8009cfe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d02: 681b ldr r3, [r3, #0] 8009d04: 891b ldrh r3, [r3, #8] 8009d06: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8009d0a: f507 7384 add.w r3, r7, #264 @ 0x108 8009d0e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d12: 681b ldr r3, [r3, #0] 8009d14: 6959 ldr r1, [r3, #20] 8009d16: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009d1a: b29b uxth r3, r3 8009d1c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8009d20: f507 7084 add.w r0, r7, #264 @ 0x108 8009d24: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8009d28: 6800 ldr r0, [r0, #0] 8009d2a: f001 fa48 bl 800b1be 8009d2e: e3ee b.n 800a50e } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 8009d30: f507 7384 add.w r3, r7, #264 @ 0x108 8009d34: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d38: 681b ldr r3, [r3, #0] 8009d3a: 785b ldrb r3, [r3, #1] 8009d3c: 2b00 cmp r3, #0 8009d3e: d177 bne.n 8009e30 8009d40: f507 7384 add.w r3, r7, #264 @ 0x108 8009d44: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009d48: 681b ldr r3, [r3, #0] 8009d4a: 64bb str r3, [r7, #72] @ 0x48 8009d4c: f507 7384 add.w r3, r7, #264 @ 0x108 8009d50: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009d54: 681b ldr r3, [r3, #0] 8009d56: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009d5a: b29b uxth r3, r3 8009d5c: 461a mov r2, r3 8009d5e: 6cbb ldr r3, [r7, #72] @ 0x48 8009d60: 4413 add r3, r2 8009d62: 64bb str r3, [r7, #72] @ 0x48 8009d64: f507 7384 add.w r3, r7, #264 @ 0x108 8009d68: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d6c: 681b ldr r3, [r3, #0] 8009d6e: 781b ldrb r3, [r3, #0] 8009d70: 011a lsls r2, r3, #4 8009d72: 6cbb ldr r3, [r7, #72] @ 0x48 8009d74: 4413 add r3, r2 8009d76: f203 4304 addw r3, r3, #1028 @ 0x404 8009d7a: 647b str r3, [r7, #68] @ 0x44 8009d7c: 6c7b ldr r3, [r7, #68] @ 0x44 8009d7e: 881b ldrh r3, [r3, #0] 8009d80: b29b uxth r3, r3 8009d82: f3c3 0309 ubfx r3, r3, #0, #10 8009d86: b29a uxth r2, r3 8009d88: 6c7b ldr r3, [r7, #68] @ 0x44 8009d8a: 801a strh r2, [r3, #0] 8009d8c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009d90: 2b3e cmp r3, #62 @ 0x3e 8009d92: d921 bls.n 8009dd8 8009d94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009d98: 095b lsrs r3, r3, #5 8009d9a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8009d9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009da2: f003 031f and.w r3, r3, #31 8009da6: 2b00 cmp r3, #0 8009da8: d104 bne.n 8009db4 8009daa: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8009dae: 3b01 subs r3, #1 8009db0: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8009db4: 6c7b ldr r3, [r7, #68] @ 0x44 8009db6: 881b ldrh r3, [r3, #0] 8009db8: b29a uxth r2, r3 8009dba: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8009dbe: b29b uxth r3, r3 8009dc0: 029b lsls r3, r3, #10 8009dc2: b29b uxth r3, r3 8009dc4: 4313 orrs r3, r2 8009dc6: b29b uxth r3, r3 8009dc8: ea6f 4343 mvn.w r3, r3, lsl #17 8009dcc: ea6f 4353 mvn.w r3, r3, lsr #17 8009dd0: b29a uxth r2, r3 8009dd2: 6c7b ldr r3, [r7, #68] @ 0x44 8009dd4: 801a strh r2, [r3, #0] 8009dd6: e056 b.n 8009e86 8009dd8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009ddc: 2b00 cmp r3, #0 8009dde: d10a bne.n 8009df6 8009de0: 6c7b ldr r3, [r7, #68] @ 0x44 8009de2: 881b ldrh r3, [r3, #0] 8009de4: b29b uxth r3, r3 8009de6: ea6f 4343 mvn.w r3, r3, lsl #17 8009dea: ea6f 4353 mvn.w r3, r3, lsr #17 8009dee: b29a uxth r2, r3 8009df0: 6c7b ldr r3, [r7, #68] @ 0x44 8009df2: 801a strh r2, [r3, #0] 8009df4: e047 b.n 8009e86 8009df6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009dfa: 085b lsrs r3, r3, #1 8009dfc: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8009e00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009e04: f003 0301 and.w r3, r3, #1 8009e08: 2b00 cmp r3, #0 8009e0a: d004 beq.n 8009e16 8009e0c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8009e10: 3301 adds r3, #1 8009e12: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8009e16: 6c7b ldr r3, [r7, #68] @ 0x44 8009e18: 881b ldrh r3, [r3, #0] 8009e1a: b29a uxth r2, r3 8009e1c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8009e20: b29b uxth r3, r3 8009e22: 029b lsls r3, r3, #10 8009e24: b29b uxth r3, r3 8009e26: 4313 orrs r3, r2 8009e28: b29a uxth r2, r3 8009e2a: 6c7b ldr r3, [r7, #68] @ 0x44 8009e2c: 801a strh r2, [r3, #0] 8009e2e: e02a b.n 8009e86 8009e30: f507 7384 add.w r3, r7, #264 @ 0x108 8009e34: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009e38: 681b ldr r3, [r3, #0] 8009e3a: 785b ldrb r3, [r3, #1] 8009e3c: 2b01 cmp r3, #1 8009e3e: d122 bne.n 8009e86 8009e40: f507 7384 add.w r3, r7, #264 @ 0x108 8009e44: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009e48: 681b ldr r3, [r3, #0] 8009e4a: 653b str r3, [r7, #80] @ 0x50 8009e4c: f507 7384 add.w r3, r7, #264 @ 0x108 8009e50: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009e54: 681b ldr r3, [r3, #0] 8009e56: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009e5a: b29b uxth r3, r3 8009e5c: 461a mov r2, r3 8009e5e: 6d3b ldr r3, [r7, #80] @ 0x50 8009e60: 4413 add r3, r2 8009e62: 653b str r3, [r7, #80] @ 0x50 8009e64: f507 7384 add.w r3, r7, #264 @ 0x108 8009e68: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009e6c: 681b ldr r3, [r3, #0] 8009e6e: 781b ldrb r3, [r3, #0] 8009e70: 011a lsls r2, r3, #4 8009e72: 6d3b ldr r3, [r7, #80] @ 0x50 8009e74: 4413 add r3, r2 8009e76: f203 4304 addw r3, r3, #1028 @ 0x404 8009e7a: 64fb str r3, [r7, #76] @ 0x4c 8009e7c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009e80: b29a uxth r2, r3 8009e82: 6cfb ldr r3, [r7, #76] @ 0x4c 8009e84: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8009e86: f507 7384 add.w r3, r7, #264 @ 0x108 8009e8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009e8e: 681b ldr r3, [r3, #0] 8009e90: 891b ldrh r3, [r3, #8] 8009e92: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8009e96: f507 7384 add.w r3, r7, #264 @ 0x108 8009e9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009e9e: 681b ldr r3, [r3, #0] 8009ea0: 6959 ldr r1, [r3, #20] 8009ea2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009ea6: b29b uxth r3, r3 8009ea8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8009eac: f507 7084 add.w r0, r7, #264 @ 0x108 8009eb0: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8009eb4: 6800 ldr r0, [r0, #0] 8009eb6: f001 f982 bl 800b1be ep->xfer_buff += len; 8009eba: f507 7384 add.w r3, r7, #264 @ 0x108 8009ebe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ec2: 681b ldr r3, [r3, #0] 8009ec4: 695a ldr r2, [r3, #20] 8009ec6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009eca: 441a add r2, r3 8009ecc: f507 7384 add.w r3, r7, #264 @ 0x108 8009ed0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ed4: 681b ldr r3, [r3, #0] 8009ed6: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 8009ed8: f507 7384 add.w r3, r7, #264 @ 0x108 8009edc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ee0: 681b ldr r3, [r3, #0] 8009ee2: 6a1a ldr r2, [r3, #32] 8009ee4: f507 7384 add.w r3, r7, #264 @ 0x108 8009ee8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009eec: 681b ldr r3, [r3, #0] 8009eee: 691b ldr r3, [r3, #16] 8009ef0: 429a cmp r2, r3 8009ef2: d90f bls.n 8009f14 { ep->xfer_len_db -= len; 8009ef4: f507 7384 add.w r3, r7, #264 @ 0x108 8009ef8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009efc: 681b ldr r3, [r3, #0] 8009efe: 6a1a ldr r2, [r3, #32] 8009f00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009f04: 1ad2 subs r2, r2, r3 8009f06: f507 7384 add.w r3, r7, #264 @ 0x108 8009f0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009f0e: 681b ldr r3, [r3, #0] 8009f10: 621a str r2, [r3, #32] 8009f12: e00e b.n 8009f32 } else { len = ep->xfer_len_db; 8009f14: f507 7384 add.w r3, r7, #264 @ 0x108 8009f18: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009f1c: 681b ldr r3, [r3, #0] 8009f1e: 6a1b ldr r3, [r3, #32] 8009f20: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 8009f24: f507 7384 add.w r3, r7, #264 @ 0x108 8009f28: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009f2c: 681b ldr r3, [r3, #0] 8009f2e: 2200 movs r2, #0 8009f30: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 8009f32: f507 7384 add.w r3, r7, #264 @ 0x108 8009f36: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009f3a: 681b ldr r3, [r3, #0] 8009f3c: 643b str r3, [r7, #64] @ 0x40 8009f3e: f507 7384 add.w r3, r7, #264 @ 0x108 8009f42: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009f46: 681b ldr r3, [r3, #0] 8009f48: 785b ldrb r3, [r3, #1] 8009f4a: 2b00 cmp r3, #0 8009f4c: d177 bne.n 800a03e 8009f4e: f507 7384 add.w r3, r7, #264 @ 0x108 8009f52: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009f56: 681b ldr r3, [r3, #0] 8009f58: 63bb str r3, [r7, #56] @ 0x38 8009f5a: f507 7384 add.w r3, r7, #264 @ 0x108 8009f5e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009f62: 681b ldr r3, [r3, #0] 8009f64: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009f68: b29b uxth r3, r3 8009f6a: 461a mov r2, r3 8009f6c: 6bbb ldr r3, [r7, #56] @ 0x38 8009f6e: 4413 add r3, r2 8009f70: 63bb str r3, [r7, #56] @ 0x38 8009f72: f507 7384 add.w r3, r7, #264 @ 0x108 8009f76: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009f7a: 681b ldr r3, [r3, #0] 8009f7c: 781b ldrb r3, [r3, #0] 8009f7e: 011a lsls r2, r3, #4 8009f80: 6bbb ldr r3, [r7, #56] @ 0x38 8009f82: 4413 add r3, r2 8009f84: f203 430c addw r3, r3, #1036 @ 0x40c 8009f88: 637b str r3, [r7, #52] @ 0x34 8009f8a: 6b7b ldr r3, [r7, #52] @ 0x34 8009f8c: 881b ldrh r3, [r3, #0] 8009f8e: b29b uxth r3, r3 8009f90: f3c3 0309 ubfx r3, r3, #0, #10 8009f94: b29a uxth r2, r3 8009f96: 6b7b ldr r3, [r7, #52] @ 0x34 8009f98: 801a strh r2, [r3, #0] 8009f9a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009f9e: 2b3e cmp r3, #62 @ 0x3e 8009fa0: d921 bls.n 8009fe6 8009fa2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009fa6: 095b lsrs r3, r3, #5 8009fa8: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 8009fac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009fb0: f003 031f and.w r3, r3, #31 8009fb4: 2b00 cmp r3, #0 8009fb6: d104 bne.n 8009fc2 8009fb8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8009fbc: 3b01 subs r3, #1 8009fbe: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 8009fc2: 6b7b ldr r3, [r7, #52] @ 0x34 8009fc4: 881b ldrh r3, [r3, #0] 8009fc6: b29a uxth r2, r3 8009fc8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8009fcc: b29b uxth r3, r3 8009fce: 029b lsls r3, r3, #10 8009fd0: b29b uxth r3, r3 8009fd2: 4313 orrs r3, r2 8009fd4: b29b uxth r3, r3 8009fd6: ea6f 4343 mvn.w r3, r3, lsl #17 8009fda: ea6f 4353 mvn.w r3, r3, lsr #17 8009fde: b29a uxth r2, r3 8009fe0: 6b7b ldr r3, [r7, #52] @ 0x34 8009fe2: 801a strh r2, [r3, #0] 8009fe4: e050 b.n 800a088 8009fe6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009fea: 2b00 cmp r3, #0 8009fec: d10a bne.n 800a004 8009fee: 6b7b ldr r3, [r7, #52] @ 0x34 8009ff0: 881b ldrh r3, [r3, #0] 8009ff2: b29b uxth r3, r3 8009ff4: ea6f 4343 mvn.w r3, r3, lsl #17 8009ff8: ea6f 4353 mvn.w r3, r3, lsr #17 8009ffc: b29a uxth r2, r3 8009ffe: 6b7b ldr r3, [r7, #52] @ 0x34 800a000: 801a strh r2, [r3, #0] 800a002: e041 b.n 800a088 800a004: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a008: 085b lsrs r3, r3, #1 800a00a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800a00e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a012: f003 0301 and.w r3, r3, #1 800a016: 2b00 cmp r3, #0 800a018: d004 beq.n 800a024 800a01a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800a01e: 3301 adds r3, #1 800a020: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800a024: 6b7b ldr r3, [r7, #52] @ 0x34 800a026: 881b ldrh r3, [r3, #0] 800a028: b29a uxth r2, r3 800a02a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800a02e: b29b uxth r3, r3 800a030: 029b lsls r3, r3, #10 800a032: b29b uxth r3, r3 800a034: 4313 orrs r3, r2 800a036: b29a uxth r2, r3 800a038: 6b7b ldr r3, [r7, #52] @ 0x34 800a03a: 801a strh r2, [r3, #0] 800a03c: e024 b.n 800a088 800a03e: f507 7384 add.w r3, r7, #264 @ 0x108 800a042: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a046: 681b ldr r3, [r3, #0] 800a048: 785b ldrb r3, [r3, #1] 800a04a: 2b01 cmp r3, #1 800a04c: d11c bne.n 800a088 800a04e: f507 7384 add.w r3, r7, #264 @ 0x108 800a052: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a056: 681b ldr r3, [r3, #0] 800a058: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a05c: b29b uxth r3, r3 800a05e: 461a mov r2, r3 800a060: 6c3b ldr r3, [r7, #64] @ 0x40 800a062: 4413 add r3, r2 800a064: 643b str r3, [r7, #64] @ 0x40 800a066: f507 7384 add.w r3, r7, #264 @ 0x108 800a06a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a06e: 681b ldr r3, [r3, #0] 800a070: 781b ldrb r3, [r3, #0] 800a072: 011a lsls r2, r3, #4 800a074: 6c3b ldr r3, [r7, #64] @ 0x40 800a076: 4413 add r3, r2 800a078: f203 430c addw r3, r3, #1036 @ 0x40c 800a07c: 63fb str r3, [r7, #60] @ 0x3c 800a07e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a082: b29a uxth r2, r3 800a084: 6bfb ldr r3, [r7, #60] @ 0x3c 800a086: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 800a088: f507 7384 add.w r3, r7, #264 @ 0x108 800a08c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a090: 681b ldr r3, [r3, #0] 800a092: 895b ldrh r3, [r3, #10] 800a094: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a098: f507 7384 add.w r3, r7, #264 @ 0x108 800a09c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a0a0: 681b ldr r3, [r3, #0] 800a0a2: 6959 ldr r1, [r3, #20] 800a0a4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a0a8: b29b uxth r3, r3 800a0aa: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a0ae: f507 7084 add.w r0, r7, #264 @ 0x108 800a0b2: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a0b6: 6800 ldr r0, [r0, #0] 800a0b8: f001 f881 bl 800b1be 800a0bc: e227 b.n 800a50e } } /* auto Switch to single buffer mode when transfer xfer_len_db; 800a0be: f507 7384 add.w r3, r7, #264 @ 0x108 800a0c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a0c6: 681b ldr r3, [r3, #0] 800a0c8: 6a1b ldr r3, [r3, #32] 800a0ca: f8c7 3104 str.w r3, [r7, #260] @ 0x104 /* disable double buffer mode for Bulk endpoint */ PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num); 800a0ce: f507 7384 add.w r3, r7, #264 @ 0x108 800a0d2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a0d6: 681a ldr r2, [r3, #0] 800a0d8: f507 7384 add.w r3, r7, #264 @ 0x108 800a0dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a0e0: 681b ldr r3, [r3, #0] 800a0e2: 781b ldrb r3, [r3, #0] 800a0e4: 009b lsls r3, r3, #2 800a0e6: 4413 add r3, r2 800a0e8: 881b ldrh r3, [r3, #0] 800a0ea: b29b uxth r3, r3 800a0ec: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 800a0f0: f023 0370 bic.w r3, r3, #112 @ 0x70 800a0f4: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 800a0f8: f507 7384 add.w r3, r7, #264 @ 0x108 800a0fc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a100: 681a ldr r2, [r3, #0] 800a102: f507 7384 add.w r3, r7, #264 @ 0x108 800a106: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a10a: 681b ldr r3, [r3, #0] 800a10c: 781b ldrb r3, [r3, #0] 800a10e: 009b lsls r3, r3, #2 800a110: 441a add r2, r3 800a112: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 800a116: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a11a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a11e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a122: f043 0380 orr.w r3, r3, #128 @ 0x80 800a126: b29b uxth r3, r3 800a128: 8013 strh r3, [r2, #0] /* Set Tx count with nbre of byte to be transmitted */ PCD_SET_EP_TX_CNT(USBx, ep->num, len); 800a12a: f507 7384 add.w r3, r7, #264 @ 0x108 800a12e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a132: 681b ldr r3, [r3, #0] 800a134: 65fb str r3, [r7, #92] @ 0x5c 800a136: f507 7384 add.w r3, r7, #264 @ 0x108 800a13a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a13e: 681b ldr r3, [r3, #0] 800a140: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a144: b29b uxth r3, r3 800a146: 461a mov r2, r3 800a148: 6dfb ldr r3, [r7, #92] @ 0x5c 800a14a: 4413 add r3, r2 800a14c: 65fb str r3, [r7, #92] @ 0x5c 800a14e: f507 7384 add.w r3, r7, #264 @ 0x108 800a152: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a156: 681b ldr r3, [r3, #0] 800a158: 781b ldrb r3, [r3, #0] 800a15a: 011a lsls r2, r3, #4 800a15c: 6dfb ldr r3, [r7, #92] @ 0x5c 800a15e: 4413 add r3, r2 800a160: f203 4304 addw r3, r3, #1028 @ 0x404 800a164: 65bb str r3, [r7, #88] @ 0x58 800a166: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a16a: b29a uxth r2, r3 800a16c: 6dbb ldr r3, [r7, #88] @ 0x58 800a16e: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800a170: f507 7384 add.w r3, r7, #264 @ 0x108 800a174: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a178: 681b ldr r3, [r3, #0] 800a17a: 891b ldrh r3, [r3, #8] 800a17c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a180: f507 7384 add.w r3, r7, #264 @ 0x108 800a184: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a188: 681b ldr r3, [r3, #0] 800a18a: 6959 ldr r1, [r3, #20] 800a18c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a190: b29b uxth r3, r3 800a192: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a196: f507 7084 add.w r0, r7, #264 @ 0x108 800a19a: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a19e: 6800 ldr r0, [r0, #0] 800a1a0: f001 f80d bl 800b1be 800a1a4: e1b3 b.n 800a50e } } else /* manage isochronous double buffer IN mode */ { /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 800a1a6: f507 7384 add.w r3, r7, #264 @ 0x108 800a1aa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a1ae: 681b ldr r3, [r3, #0] 800a1b0: 6a1a ldr r2, [r3, #32] 800a1b2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a1b6: 1ad2 subs r2, r2, r3 800a1b8: f507 7384 add.w r3, r7, #264 @ 0x108 800a1bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a1c0: 681b ldr r3, [r3, #0] 800a1c2: 621a str r2, [r3, #32] /* Fill the data buffer */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 800a1c4: f507 7384 add.w r3, r7, #264 @ 0x108 800a1c8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a1cc: 681a ldr r2, [r3, #0] 800a1ce: f507 7384 add.w r3, r7, #264 @ 0x108 800a1d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a1d6: 681b ldr r3, [r3, #0] 800a1d8: 781b ldrb r3, [r3, #0] 800a1da: 009b lsls r3, r3, #2 800a1dc: 4413 add r3, r2 800a1de: 881b ldrh r3, [r3, #0] 800a1e0: b29b uxth r3, r3 800a1e2: f003 0340 and.w r3, r3, #64 @ 0x40 800a1e6: 2b00 cmp r3, #0 800a1e8: f000 80c6 beq.w 800a378 { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 800a1ec: f507 7384 add.w r3, r7, #264 @ 0x108 800a1f0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a1f4: 681b ldr r3, [r3, #0] 800a1f6: 673b str r3, [r7, #112] @ 0x70 800a1f8: f507 7384 add.w r3, r7, #264 @ 0x108 800a1fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a200: 681b ldr r3, [r3, #0] 800a202: 785b ldrb r3, [r3, #1] 800a204: 2b00 cmp r3, #0 800a206: d177 bne.n 800a2f8 800a208: f507 7384 add.w r3, r7, #264 @ 0x108 800a20c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a210: 681b ldr r3, [r3, #0] 800a212: 66bb str r3, [r7, #104] @ 0x68 800a214: f507 7384 add.w r3, r7, #264 @ 0x108 800a218: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a21c: 681b ldr r3, [r3, #0] 800a21e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a222: b29b uxth r3, r3 800a224: 461a mov r2, r3 800a226: 6ebb ldr r3, [r7, #104] @ 0x68 800a228: 4413 add r3, r2 800a22a: 66bb str r3, [r7, #104] @ 0x68 800a22c: f507 7384 add.w r3, r7, #264 @ 0x108 800a230: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a234: 681b ldr r3, [r3, #0] 800a236: 781b ldrb r3, [r3, #0] 800a238: 011a lsls r2, r3, #4 800a23a: 6ebb ldr r3, [r7, #104] @ 0x68 800a23c: 4413 add r3, r2 800a23e: f203 430c addw r3, r3, #1036 @ 0x40c 800a242: 667b str r3, [r7, #100] @ 0x64 800a244: 6e7b ldr r3, [r7, #100] @ 0x64 800a246: 881b ldrh r3, [r3, #0] 800a248: b29b uxth r3, r3 800a24a: f3c3 0309 ubfx r3, r3, #0, #10 800a24e: b29a uxth r2, r3 800a250: 6e7b ldr r3, [r7, #100] @ 0x64 800a252: 801a strh r2, [r3, #0] 800a254: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a258: 2b3e cmp r3, #62 @ 0x3e 800a25a: d921 bls.n 800a2a0 800a25c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a260: 095b lsrs r3, r3, #5 800a262: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800a266: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a26a: f003 031f and.w r3, r3, #31 800a26e: 2b00 cmp r3, #0 800a270: d104 bne.n 800a27c 800a272: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800a276: 3b01 subs r3, #1 800a278: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800a27c: 6e7b ldr r3, [r7, #100] @ 0x64 800a27e: 881b ldrh r3, [r3, #0] 800a280: b29a uxth r2, r3 800a282: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800a286: b29b uxth r3, r3 800a288: 029b lsls r3, r3, #10 800a28a: b29b uxth r3, r3 800a28c: 4313 orrs r3, r2 800a28e: b29b uxth r3, r3 800a290: ea6f 4343 mvn.w r3, r3, lsl #17 800a294: ea6f 4353 mvn.w r3, r3, lsr #17 800a298: b29a uxth r2, r3 800a29a: 6e7b ldr r3, [r7, #100] @ 0x64 800a29c: 801a strh r2, [r3, #0] 800a29e: e050 b.n 800a342 800a2a0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a2a4: 2b00 cmp r3, #0 800a2a6: d10a bne.n 800a2be 800a2a8: 6e7b ldr r3, [r7, #100] @ 0x64 800a2aa: 881b ldrh r3, [r3, #0] 800a2ac: b29b uxth r3, r3 800a2ae: ea6f 4343 mvn.w r3, r3, lsl #17 800a2b2: ea6f 4353 mvn.w r3, r3, lsr #17 800a2b6: b29a uxth r2, r3 800a2b8: 6e7b ldr r3, [r7, #100] @ 0x64 800a2ba: 801a strh r2, [r3, #0] 800a2bc: e041 b.n 800a342 800a2be: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a2c2: 085b lsrs r3, r3, #1 800a2c4: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800a2c8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a2cc: f003 0301 and.w r3, r3, #1 800a2d0: 2b00 cmp r3, #0 800a2d2: d004 beq.n 800a2de 800a2d4: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800a2d8: 3301 adds r3, #1 800a2da: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800a2de: 6e7b ldr r3, [r7, #100] @ 0x64 800a2e0: 881b ldrh r3, [r3, #0] 800a2e2: b29a uxth r2, r3 800a2e4: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800a2e8: b29b uxth r3, r3 800a2ea: 029b lsls r3, r3, #10 800a2ec: b29b uxth r3, r3 800a2ee: 4313 orrs r3, r2 800a2f0: b29a uxth r2, r3 800a2f2: 6e7b ldr r3, [r7, #100] @ 0x64 800a2f4: 801a strh r2, [r3, #0] 800a2f6: e024 b.n 800a342 800a2f8: f507 7384 add.w r3, r7, #264 @ 0x108 800a2fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a300: 681b ldr r3, [r3, #0] 800a302: 785b ldrb r3, [r3, #1] 800a304: 2b01 cmp r3, #1 800a306: d11c bne.n 800a342 800a308: f507 7384 add.w r3, r7, #264 @ 0x108 800a30c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a310: 681b ldr r3, [r3, #0] 800a312: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a316: b29b uxth r3, r3 800a318: 461a mov r2, r3 800a31a: 6f3b ldr r3, [r7, #112] @ 0x70 800a31c: 4413 add r3, r2 800a31e: 673b str r3, [r7, #112] @ 0x70 800a320: f507 7384 add.w r3, r7, #264 @ 0x108 800a324: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a328: 681b ldr r3, [r3, #0] 800a32a: 781b ldrb r3, [r3, #0] 800a32c: 011a lsls r2, r3, #4 800a32e: 6f3b ldr r3, [r7, #112] @ 0x70 800a330: 4413 add r3, r2 800a332: f203 430c addw r3, r3, #1036 @ 0x40c 800a336: 66fb str r3, [r7, #108] @ 0x6c 800a338: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a33c: b29a uxth r2, r3 800a33e: 6efb ldr r3, [r7, #108] @ 0x6c 800a340: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 800a342: f507 7384 add.w r3, r7, #264 @ 0x108 800a346: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a34a: 681b ldr r3, [r3, #0] 800a34c: 895b ldrh r3, [r3, #10] 800a34e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a352: f507 7384 add.w r3, r7, #264 @ 0x108 800a356: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a35a: 681b ldr r3, [r3, #0] 800a35c: 6959 ldr r1, [r3, #20] 800a35e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a362: b29b uxth r3, r3 800a364: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a368: f507 7084 add.w r0, r7, #264 @ 0x108 800a36c: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a370: 6800 ldr r0, [r0, #0] 800a372: f000 ff24 bl 800b1be 800a376: e0ca b.n 800a50e } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 800a378: f507 7384 add.w r3, r7, #264 @ 0x108 800a37c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a380: 681b ldr r3, [r3, #0] 800a382: 785b ldrb r3, [r3, #1] 800a384: 2b00 cmp r3, #0 800a386: d177 bne.n 800a478 800a388: f507 7384 add.w r3, r7, #264 @ 0x108 800a38c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a390: 681b ldr r3, [r3, #0] 800a392: 67fb str r3, [r7, #124] @ 0x7c 800a394: f507 7384 add.w r3, r7, #264 @ 0x108 800a398: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a39c: 681b ldr r3, [r3, #0] 800a39e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a3a2: b29b uxth r3, r3 800a3a4: 461a mov r2, r3 800a3a6: 6ffb ldr r3, [r7, #124] @ 0x7c 800a3a8: 4413 add r3, r2 800a3aa: 67fb str r3, [r7, #124] @ 0x7c 800a3ac: f507 7384 add.w r3, r7, #264 @ 0x108 800a3b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a3b4: 681b ldr r3, [r3, #0] 800a3b6: 781b ldrb r3, [r3, #0] 800a3b8: 011a lsls r2, r3, #4 800a3ba: 6ffb ldr r3, [r7, #124] @ 0x7c 800a3bc: 4413 add r3, r2 800a3be: f203 4304 addw r3, r3, #1028 @ 0x404 800a3c2: 67bb str r3, [r7, #120] @ 0x78 800a3c4: 6fbb ldr r3, [r7, #120] @ 0x78 800a3c6: 881b ldrh r3, [r3, #0] 800a3c8: b29b uxth r3, r3 800a3ca: f3c3 0309 ubfx r3, r3, #0, #10 800a3ce: b29a uxth r2, r3 800a3d0: 6fbb ldr r3, [r7, #120] @ 0x78 800a3d2: 801a strh r2, [r3, #0] 800a3d4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a3d8: 2b3e cmp r3, #62 @ 0x3e 800a3da: d921 bls.n 800a420 800a3dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a3e0: 095b lsrs r3, r3, #5 800a3e2: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800a3e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a3ea: f003 031f and.w r3, r3, #31 800a3ee: 2b00 cmp r3, #0 800a3f0: d104 bne.n 800a3fc 800a3f2: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800a3f6: 3b01 subs r3, #1 800a3f8: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800a3fc: 6fbb ldr r3, [r7, #120] @ 0x78 800a3fe: 881b ldrh r3, [r3, #0] 800a400: b29a uxth r2, r3 800a402: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800a406: b29b uxth r3, r3 800a408: 029b lsls r3, r3, #10 800a40a: b29b uxth r3, r3 800a40c: 4313 orrs r3, r2 800a40e: b29b uxth r3, r3 800a410: ea6f 4343 mvn.w r3, r3, lsl #17 800a414: ea6f 4353 mvn.w r3, r3, lsr #17 800a418: b29a uxth r2, r3 800a41a: 6fbb ldr r3, [r7, #120] @ 0x78 800a41c: 801a strh r2, [r3, #0] 800a41e: e05c b.n 800a4da 800a420: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a424: 2b00 cmp r3, #0 800a426: d10a bne.n 800a43e 800a428: 6fbb ldr r3, [r7, #120] @ 0x78 800a42a: 881b ldrh r3, [r3, #0] 800a42c: b29b uxth r3, r3 800a42e: ea6f 4343 mvn.w r3, r3, lsl #17 800a432: ea6f 4353 mvn.w r3, r3, lsr #17 800a436: b29a uxth r2, r3 800a438: 6fbb ldr r3, [r7, #120] @ 0x78 800a43a: 801a strh r2, [r3, #0] 800a43c: e04d b.n 800a4da 800a43e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a442: 085b lsrs r3, r3, #1 800a444: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800a448: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a44c: f003 0301 and.w r3, r3, #1 800a450: 2b00 cmp r3, #0 800a452: d004 beq.n 800a45e 800a454: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800a458: 3301 adds r3, #1 800a45a: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800a45e: 6fbb ldr r3, [r7, #120] @ 0x78 800a460: 881b ldrh r3, [r3, #0] 800a462: b29a uxth r2, r3 800a464: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800a468: b29b uxth r3, r3 800a46a: 029b lsls r3, r3, #10 800a46c: b29b uxth r3, r3 800a46e: 4313 orrs r3, r2 800a470: b29a uxth r2, r3 800a472: 6fbb ldr r3, [r7, #120] @ 0x78 800a474: 801a strh r2, [r3, #0] 800a476: e030 b.n 800a4da 800a478: f507 7384 add.w r3, r7, #264 @ 0x108 800a47c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a480: 681b ldr r3, [r3, #0] 800a482: 785b ldrb r3, [r3, #1] 800a484: 2b01 cmp r3, #1 800a486: d128 bne.n 800a4da 800a488: f507 7384 add.w r3, r7, #264 @ 0x108 800a48c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a490: 681b ldr r3, [r3, #0] 800a492: f8c7 3084 str.w r3, [r7, #132] @ 0x84 800a496: f507 7384 add.w r3, r7, #264 @ 0x108 800a49a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a49e: 681b ldr r3, [r3, #0] 800a4a0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a4a4: b29b uxth r3, r3 800a4a6: 461a mov r2, r3 800a4a8: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 800a4ac: 4413 add r3, r2 800a4ae: f8c7 3084 str.w r3, [r7, #132] @ 0x84 800a4b2: f507 7384 add.w r3, r7, #264 @ 0x108 800a4b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a4ba: 681b ldr r3, [r3, #0] 800a4bc: 781b ldrb r3, [r3, #0] 800a4be: 011a lsls r2, r3, #4 800a4c0: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 800a4c4: 4413 add r3, r2 800a4c6: f203 4304 addw r3, r3, #1028 @ 0x404 800a4ca: f8c7 3080 str.w r3, [r7, #128] @ 0x80 800a4ce: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a4d2: b29a uxth r2, r3 800a4d4: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 800a4d8: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800a4da: f507 7384 add.w r3, r7, #264 @ 0x108 800a4de: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a4e2: 681b ldr r3, [r3, #0] 800a4e4: 891b ldrh r3, [r3, #8] 800a4e6: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a4ea: f507 7384 add.w r3, r7, #264 @ 0x108 800a4ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a4f2: 681b ldr r3, [r3, #0] 800a4f4: 6959 ldr r1, [r3, #20] 800a4f6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a4fa: b29b uxth r3, r3 800a4fc: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a500: f507 7084 add.w r0, r7, #264 @ 0x108 800a504: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a508: 6800 ldr r0, [r0, #0] 800a50a: f000 fe58 bl 800b1be } } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); 800a50e: f507 7384 add.w r3, r7, #264 @ 0x108 800a512: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a516: 681a ldr r2, [r3, #0] 800a518: f507 7384 add.w r3, r7, #264 @ 0x108 800a51c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a520: 681b ldr r3, [r3, #0] 800a522: 781b ldrb r3, [r3, #0] 800a524: 009b lsls r3, r3, #2 800a526: 4413 add r3, r2 800a528: 881b ldrh r3, [r3, #0] 800a52a: b29b uxth r3, r3 800a52c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a530: f023 0340 bic.w r3, r3, #64 @ 0x40 800a534: 817b strh r3, [r7, #10] 800a536: 897b ldrh r3, [r7, #10] 800a538: f083 0310 eor.w r3, r3, #16 800a53c: 817b strh r3, [r7, #10] 800a53e: 897b ldrh r3, [r7, #10] 800a540: f083 0320 eor.w r3, r3, #32 800a544: 817b strh r3, [r7, #10] 800a546: f507 7384 add.w r3, r7, #264 @ 0x108 800a54a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a54e: 681a ldr r2, [r3, #0] 800a550: f507 7384 add.w r3, r7, #264 @ 0x108 800a554: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a558: 681b ldr r3, [r3, #0] 800a55a: 781b ldrb r3, [r3, #0] 800a55c: 009b lsls r3, r3, #2 800a55e: 441a add r2, r3 800a560: 897b ldrh r3, [r7, #10] 800a562: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a566: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a56a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a56e: f043 0380 orr.w r3, r3, #128 @ 0x80 800a572: b29b uxth r3, r3 800a574: 8013 strh r3, [r2, #0] 800a576: f000 bcde b.w 800af36 } else /* OUT endpoint */ { if (ep->doublebuffer == 0U) 800a57a: f507 7384 add.w r3, r7, #264 @ 0x108 800a57e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a582: 681b ldr r3, [r3, #0] 800a584: 7b1b ldrb r3, [r3, #12] 800a586: 2b00 cmp r3, #0 800a588: f040 80bb bne.w 800a702 { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 800a58c: f507 7384 add.w r3, r7, #264 @ 0x108 800a590: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a594: 681b ldr r3, [r3, #0] 800a596: 699a ldr r2, [r3, #24] 800a598: f507 7384 add.w r3, r7, #264 @ 0x108 800a59c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a5a0: 681b ldr r3, [r3, #0] 800a5a2: 691b ldr r3, [r3, #16] 800a5a4: 429a cmp r2, r3 800a5a6: d917 bls.n 800a5d8 { len = ep->maxpacket; 800a5a8: f507 7384 add.w r3, r7, #264 @ 0x108 800a5ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a5b0: 681b ldr r3, [r3, #0] 800a5b2: 691b ldr r3, [r3, #16] 800a5b4: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 800a5b8: f507 7384 add.w r3, r7, #264 @ 0x108 800a5bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a5c0: 681b ldr r3, [r3, #0] 800a5c2: 699a ldr r2, [r3, #24] 800a5c4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a5c8: 1ad2 subs r2, r2, r3 800a5ca: f507 7384 add.w r3, r7, #264 @ 0x108 800a5ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a5d2: 681b ldr r3, [r3, #0] 800a5d4: 619a str r2, [r3, #24] 800a5d6: e00e b.n 800a5f6 } else { len = ep->xfer_len; 800a5d8: f507 7384 add.w r3, r7, #264 @ 0x108 800a5dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a5e0: 681b ldr r3, [r3, #0] 800a5e2: 699b ldr r3, [r3, #24] 800a5e4: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 800a5e8: f507 7384 add.w r3, r7, #264 @ 0x108 800a5ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a5f0: 681b ldr r3, [r3, #0] 800a5f2: 2200 movs r2, #0 800a5f4: 619a str r2, [r3, #24] } /* configure and validate Rx endpoint */ PCD_SET_EP_RX_CNT(USBx, ep->num, len); 800a5f6: f507 7384 add.w r3, r7, #264 @ 0x108 800a5fa: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a5fe: 681b ldr r3, [r3, #0] 800a600: f8c7 3090 str.w r3, [r7, #144] @ 0x90 800a604: f507 7384 add.w r3, r7, #264 @ 0x108 800a608: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a60c: 681b ldr r3, [r3, #0] 800a60e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a612: b29b uxth r3, r3 800a614: 461a mov r2, r3 800a616: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 800a61a: 4413 add r3, r2 800a61c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 800a620: f507 7384 add.w r3, r7, #264 @ 0x108 800a624: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a628: 681b ldr r3, [r3, #0] 800a62a: 781b ldrb r3, [r3, #0] 800a62c: 011a lsls r2, r3, #4 800a62e: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 800a632: 4413 add r3, r2 800a634: f203 430c addw r3, r3, #1036 @ 0x40c 800a638: f8c7 308c str.w r3, [r7, #140] @ 0x8c 800a63c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a640: 881b ldrh r3, [r3, #0] 800a642: b29b uxth r3, r3 800a644: f3c3 0309 ubfx r3, r3, #0, #10 800a648: b29a uxth r2, r3 800a64a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a64e: 801a strh r2, [r3, #0] 800a650: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a654: 2b3e cmp r3, #62 @ 0x3e 800a656: d924 bls.n 800a6a2 800a658: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a65c: 095b lsrs r3, r3, #5 800a65e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800a662: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a666: f003 031f and.w r3, r3, #31 800a66a: 2b00 cmp r3, #0 800a66c: d104 bne.n 800a678 800a66e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800a672: 3b01 subs r3, #1 800a674: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800a678: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a67c: 881b ldrh r3, [r3, #0] 800a67e: b29a uxth r2, r3 800a680: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800a684: b29b uxth r3, r3 800a686: 029b lsls r3, r3, #10 800a688: b29b uxth r3, r3 800a68a: 4313 orrs r3, r2 800a68c: b29b uxth r3, r3 800a68e: ea6f 4343 mvn.w r3, r3, lsl #17 800a692: ea6f 4353 mvn.w r3, r3, lsr #17 800a696: b29a uxth r2, r3 800a698: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a69c: 801a strh r2, [r3, #0] 800a69e: f000 bc10 b.w 800aec2 800a6a2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a6a6: 2b00 cmp r3, #0 800a6a8: d10c bne.n 800a6c4 800a6aa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a6ae: 881b ldrh r3, [r3, #0] 800a6b0: b29b uxth r3, r3 800a6b2: ea6f 4343 mvn.w r3, r3, lsl #17 800a6b6: ea6f 4353 mvn.w r3, r3, lsr #17 800a6ba: b29a uxth r2, r3 800a6bc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a6c0: 801a strh r2, [r3, #0] 800a6c2: e3fe b.n 800aec2 800a6c4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a6c8: 085b lsrs r3, r3, #1 800a6ca: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800a6ce: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a6d2: f003 0301 and.w r3, r3, #1 800a6d6: 2b00 cmp r3, #0 800a6d8: d004 beq.n 800a6e4 800a6da: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800a6de: 3301 adds r3, #1 800a6e0: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800a6e4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a6e8: 881b ldrh r3, [r3, #0] 800a6ea: b29a uxth r2, r3 800a6ec: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800a6f0: b29b uxth r3, r3 800a6f2: 029b lsls r3, r3, #10 800a6f4: b29b uxth r3, r3 800a6f6: 4313 orrs r3, r2 800a6f8: b29a uxth r2, r3 800a6fa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a6fe: 801a strh r2, [r3, #0] 800a700: e3df b.n 800aec2 #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */ /* Set the Double buffer counter */ if (ep->type == EP_TYPE_BULK) 800a702: f507 7384 add.w r3, r7, #264 @ 0x108 800a706: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a70a: 681b ldr r3, [r3, #0] 800a70c: 78db ldrb r3, [r3, #3] 800a70e: 2b02 cmp r3, #2 800a710: f040 8218 bne.w 800ab44 { PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); 800a714: f507 7384 add.w r3, r7, #264 @ 0x108 800a718: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a71c: 681b ldr r3, [r3, #0] 800a71e: 785b ldrb r3, [r3, #1] 800a720: 2b00 cmp r3, #0 800a722: f040 809d bne.w 800a860 800a726: f507 7384 add.w r3, r7, #264 @ 0x108 800a72a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a72e: 681b ldr r3, [r3, #0] 800a730: f8c7 30ac str.w r3, [r7, #172] @ 0xac 800a734: f507 7384 add.w r3, r7, #264 @ 0x108 800a738: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a73c: 681b ldr r3, [r3, #0] 800a73e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a742: b29b uxth r3, r3 800a744: 461a mov r2, r3 800a746: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 800a74a: 4413 add r3, r2 800a74c: f8c7 30ac str.w r3, [r7, #172] @ 0xac 800a750: f507 7384 add.w r3, r7, #264 @ 0x108 800a754: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a758: 681b ldr r3, [r3, #0] 800a75a: 781b ldrb r3, [r3, #0] 800a75c: 011a lsls r2, r3, #4 800a75e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 800a762: 4413 add r3, r2 800a764: f203 4304 addw r3, r3, #1028 @ 0x404 800a768: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 800a76c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a770: 881b ldrh r3, [r3, #0] 800a772: b29b uxth r3, r3 800a774: f3c3 0309 ubfx r3, r3, #0, #10 800a778: b29a uxth r2, r3 800a77a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a77e: 801a strh r2, [r3, #0] 800a780: f507 7384 add.w r3, r7, #264 @ 0x108 800a784: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a788: 681b ldr r3, [r3, #0] 800a78a: 691b ldr r3, [r3, #16] 800a78c: 2b3e cmp r3, #62 @ 0x3e 800a78e: d92b bls.n 800a7e8 800a790: f507 7384 add.w r3, r7, #264 @ 0x108 800a794: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a798: 681b ldr r3, [r3, #0] 800a79a: 691b ldr r3, [r3, #16] 800a79c: 095b lsrs r3, r3, #5 800a79e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800a7a2: f507 7384 add.w r3, r7, #264 @ 0x108 800a7a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a7aa: 681b ldr r3, [r3, #0] 800a7ac: 691b ldr r3, [r3, #16] 800a7ae: f003 031f and.w r3, r3, #31 800a7b2: 2b00 cmp r3, #0 800a7b4: d104 bne.n 800a7c0 800a7b6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800a7ba: 3b01 subs r3, #1 800a7bc: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800a7c0: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a7c4: 881b ldrh r3, [r3, #0] 800a7c6: b29a uxth r2, r3 800a7c8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800a7cc: b29b uxth r3, r3 800a7ce: 029b lsls r3, r3, #10 800a7d0: b29b uxth r3, r3 800a7d2: 4313 orrs r3, r2 800a7d4: b29b uxth r3, r3 800a7d6: ea6f 4343 mvn.w r3, r3, lsl #17 800a7da: ea6f 4353 mvn.w r3, r3, lsr #17 800a7de: b29a uxth r2, r3 800a7e0: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a7e4: 801a strh r2, [r3, #0] 800a7e6: e070 b.n 800a8ca 800a7e8: f507 7384 add.w r3, r7, #264 @ 0x108 800a7ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a7f0: 681b ldr r3, [r3, #0] 800a7f2: 691b ldr r3, [r3, #16] 800a7f4: 2b00 cmp r3, #0 800a7f6: d10c bne.n 800a812 800a7f8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a7fc: 881b ldrh r3, [r3, #0] 800a7fe: b29b uxth r3, r3 800a800: ea6f 4343 mvn.w r3, r3, lsl #17 800a804: ea6f 4353 mvn.w r3, r3, lsr #17 800a808: b29a uxth r2, r3 800a80a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a80e: 801a strh r2, [r3, #0] 800a810: e05b b.n 800a8ca 800a812: f507 7384 add.w r3, r7, #264 @ 0x108 800a816: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a81a: 681b ldr r3, [r3, #0] 800a81c: 691b ldr r3, [r3, #16] 800a81e: 085b lsrs r3, r3, #1 800a820: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800a824: f507 7384 add.w r3, r7, #264 @ 0x108 800a828: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a82c: 681b ldr r3, [r3, #0] 800a82e: 691b ldr r3, [r3, #16] 800a830: f003 0301 and.w r3, r3, #1 800a834: 2b00 cmp r3, #0 800a836: d004 beq.n 800a842 800a838: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800a83c: 3301 adds r3, #1 800a83e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800a842: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a846: 881b ldrh r3, [r3, #0] 800a848: b29a uxth r2, r3 800a84a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800a84e: b29b uxth r3, r3 800a850: 029b lsls r3, r3, #10 800a852: b29b uxth r3, r3 800a854: 4313 orrs r3, r2 800a856: b29a uxth r2, r3 800a858: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a85c: 801a strh r2, [r3, #0] 800a85e: e034 b.n 800a8ca 800a860: f507 7384 add.w r3, r7, #264 @ 0x108 800a864: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a868: 681b ldr r3, [r3, #0] 800a86a: 785b ldrb r3, [r3, #1] 800a86c: 2b01 cmp r3, #1 800a86e: d12c bne.n 800a8ca 800a870: f507 7384 add.w r3, r7, #264 @ 0x108 800a874: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a878: 681b ldr r3, [r3, #0] 800a87a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 800a87e: f507 7384 add.w r3, r7, #264 @ 0x108 800a882: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a886: 681b ldr r3, [r3, #0] 800a888: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a88c: b29b uxth r3, r3 800a88e: 461a mov r2, r3 800a890: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 800a894: 4413 add r3, r2 800a896: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 800a89a: f507 7384 add.w r3, r7, #264 @ 0x108 800a89e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a8a2: 681b ldr r3, [r3, #0] 800a8a4: 781b ldrb r3, [r3, #0] 800a8a6: 011a lsls r2, r3, #4 800a8a8: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 800a8ac: 4413 add r3, r2 800a8ae: f203 4304 addw r3, r3, #1028 @ 0x404 800a8b2: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 800a8b6: f507 7384 add.w r3, r7, #264 @ 0x108 800a8ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a8be: 681b ldr r3, [r3, #0] 800a8c0: 691b ldr r3, [r3, #16] 800a8c2: b29a uxth r2, r3 800a8c4: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0 800a8c8: 801a strh r2, [r3, #0] 800a8ca: f507 7384 add.w r3, r7, #264 @ 0x108 800a8ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a8d2: 681b ldr r3, [r3, #0] 800a8d4: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 800a8d8: f507 7384 add.w r3, r7, #264 @ 0x108 800a8dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a8e0: 681b ldr r3, [r3, #0] 800a8e2: 785b ldrb r3, [r3, #1] 800a8e4: 2b00 cmp r3, #0 800a8e6: f040 809d bne.w 800aa24 800a8ea: f507 7384 add.w r3, r7, #264 @ 0x108 800a8ee: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a8f2: 681b ldr r3, [r3, #0] 800a8f4: f8c7 309c str.w r3, [r7, #156] @ 0x9c 800a8f8: f507 7384 add.w r3, r7, #264 @ 0x108 800a8fc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a900: 681b ldr r3, [r3, #0] 800a902: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a906: b29b uxth r3, r3 800a908: 461a mov r2, r3 800a90a: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 800a90e: 4413 add r3, r2 800a910: f8c7 309c str.w r3, [r7, #156] @ 0x9c 800a914: f507 7384 add.w r3, r7, #264 @ 0x108 800a918: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a91c: 681b ldr r3, [r3, #0] 800a91e: 781b ldrb r3, [r3, #0] 800a920: 011a lsls r2, r3, #4 800a922: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 800a926: 4413 add r3, r2 800a928: f203 430c addw r3, r3, #1036 @ 0x40c 800a92c: f8c7 3098 str.w r3, [r7, #152] @ 0x98 800a930: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800a934: 881b ldrh r3, [r3, #0] 800a936: b29b uxth r3, r3 800a938: f3c3 0309 ubfx r3, r3, #0, #10 800a93c: b29a uxth r2, r3 800a93e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800a942: 801a strh r2, [r3, #0] 800a944: f507 7384 add.w r3, r7, #264 @ 0x108 800a948: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a94c: 681b ldr r3, [r3, #0] 800a94e: 691b ldr r3, [r3, #16] 800a950: 2b3e cmp r3, #62 @ 0x3e 800a952: d92b bls.n 800a9ac 800a954: f507 7384 add.w r3, r7, #264 @ 0x108 800a958: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a95c: 681b ldr r3, [r3, #0] 800a95e: 691b ldr r3, [r3, #16] 800a960: 095b lsrs r3, r3, #5 800a962: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800a966: f507 7384 add.w r3, r7, #264 @ 0x108 800a96a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a96e: 681b ldr r3, [r3, #0] 800a970: 691b ldr r3, [r3, #16] 800a972: f003 031f and.w r3, r3, #31 800a976: 2b00 cmp r3, #0 800a978: d104 bne.n 800a984 800a97a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800a97e: 3b01 subs r3, #1 800a980: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800a984: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800a988: 881b ldrh r3, [r3, #0] 800a98a: b29a uxth r2, r3 800a98c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800a990: b29b uxth r3, r3 800a992: 029b lsls r3, r3, #10 800a994: b29b uxth r3, r3 800a996: 4313 orrs r3, r2 800a998: b29b uxth r3, r3 800a99a: ea6f 4343 mvn.w r3, r3, lsl #17 800a99e: ea6f 4353 mvn.w r3, r3, lsr #17 800a9a2: b29a uxth r2, r3 800a9a4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800a9a8: 801a strh r2, [r3, #0] 800a9aa: e069 b.n 800aa80 800a9ac: f507 7384 add.w r3, r7, #264 @ 0x108 800a9b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a9b4: 681b ldr r3, [r3, #0] 800a9b6: 691b ldr r3, [r3, #16] 800a9b8: 2b00 cmp r3, #0 800a9ba: d10c bne.n 800a9d6 800a9bc: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800a9c0: 881b ldrh r3, [r3, #0] 800a9c2: b29b uxth r3, r3 800a9c4: ea6f 4343 mvn.w r3, r3, lsl #17 800a9c8: ea6f 4353 mvn.w r3, r3, lsr #17 800a9cc: b29a uxth r2, r3 800a9ce: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800a9d2: 801a strh r2, [r3, #0] 800a9d4: e054 b.n 800aa80 800a9d6: f507 7384 add.w r3, r7, #264 @ 0x108 800a9da: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a9de: 681b ldr r3, [r3, #0] 800a9e0: 691b ldr r3, [r3, #16] 800a9e2: 085b lsrs r3, r3, #1 800a9e4: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800a9e8: f507 7384 add.w r3, r7, #264 @ 0x108 800a9ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a9f0: 681b ldr r3, [r3, #0] 800a9f2: 691b ldr r3, [r3, #16] 800a9f4: f003 0301 and.w r3, r3, #1 800a9f8: 2b00 cmp r3, #0 800a9fa: d004 beq.n 800aa06 800a9fc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800aa00: 3301 adds r3, #1 800aa02: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800aa06: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800aa0a: 881b ldrh r3, [r3, #0] 800aa0c: b29a uxth r2, r3 800aa0e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800aa12: b29b uxth r3, r3 800aa14: 029b lsls r3, r3, #10 800aa16: b29b uxth r3, r3 800aa18: 4313 orrs r3, r2 800aa1a: b29a uxth r2, r3 800aa1c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800aa20: 801a strh r2, [r3, #0] 800aa22: e02d b.n 800aa80 800aa24: f507 7384 add.w r3, r7, #264 @ 0x108 800aa28: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa2c: 681b ldr r3, [r3, #0] 800aa2e: 785b ldrb r3, [r3, #1] 800aa30: 2b01 cmp r3, #1 800aa32: d125 bne.n 800aa80 800aa34: f507 7384 add.w r3, r7, #264 @ 0x108 800aa38: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aa3c: 681b ldr r3, [r3, #0] 800aa3e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800aa42: b29b uxth r3, r3 800aa44: 461a mov r2, r3 800aa46: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 800aa4a: 4413 add r3, r2 800aa4c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 800aa50: f507 7384 add.w r3, r7, #264 @ 0x108 800aa54: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa58: 681b ldr r3, [r3, #0] 800aa5a: 781b ldrb r3, [r3, #0] 800aa5c: 011a lsls r2, r3, #4 800aa5e: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 800aa62: 4413 add r3, r2 800aa64: f203 430c addw r3, r3, #1036 @ 0x40c 800aa68: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 800aa6c: f507 7384 add.w r3, r7, #264 @ 0x108 800aa70: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa74: 681b ldr r3, [r3, #0] 800aa76: 691b ldr r3, [r3, #16] 800aa78: b29a uxth r2, r3 800aa7a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 800aa7e: 801a strh r2, [r3, #0] /* Coming from ISR */ if (ep->xfer_count != 0U) 800aa80: f507 7384 add.w r3, r7, #264 @ 0x108 800aa84: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa88: 681b ldr r3, [r3, #0] 800aa8a: 69db ldr r3, [r3, #28] 800aa8c: 2b00 cmp r3, #0 800aa8e: f000 8218 beq.w 800aec2 { /* update last value to check if there is blocking state */ wEPVal = PCD_GET_ENDPOINT(USBx, ep->num); 800aa92: f507 7384 add.w r3, r7, #264 @ 0x108 800aa96: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aa9a: 681a ldr r2, [r3, #0] 800aa9c: f507 7384 add.w r3, r7, #264 @ 0x108 800aaa0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aaa4: 681b ldr r3, [r3, #0] 800aaa6: 781b ldrb r3, [r3, #0] 800aaa8: 009b lsls r3, r3, #2 800aaaa: 4413 add r3, r2 800aaac: 881b ldrh r3, [r3, #0] 800aaae: f8a7 3096 strh.w r3, [r7, #150] @ 0x96 /*Blocking State */ if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 800aab2: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800aab6: f403 4380 and.w r3, r3, #16384 @ 0x4000 800aaba: 2b00 cmp r3, #0 800aabc: d005 beq.n 800aaca 800aabe: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800aac2: f003 0340 and.w r3, r3, #64 @ 0x40 800aac6: 2b00 cmp r3, #0 800aac8: d10d bne.n 800aae6 (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 800aaca: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800aace: f403 4380 and.w r3, r3, #16384 @ 0x4000 if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 800aad2: 2b00 cmp r3, #0 800aad4: f040 81f5 bne.w 800aec2 (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 800aad8: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800aadc: f003 0340 and.w r3, r3, #64 @ 0x40 800aae0: 2b00 cmp r3, #0 800aae2: f040 81ee bne.w 800aec2 { PCD_FREE_USER_BUFFER(USBx, ep->num, 0U); 800aae6: f507 7384 add.w r3, r7, #264 @ 0x108 800aaea: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aaee: 681a ldr r2, [r3, #0] 800aaf0: f507 7384 add.w r3, r7, #264 @ 0x108 800aaf4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aaf8: 681b ldr r3, [r3, #0] 800aafa: 781b ldrb r3, [r3, #0] 800aafc: 009b lsls r3, r3, #2 800aafe: 4413 add r3, r2 800ab00: 881b ldrh r3, [r3, #0] 800ab02: b29b uxth r3, r3 800ab04: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800ab08: f023 0370 bic.w r3, r3, #112 @ 0x70 800ab0c: f8a7 3094 strh.w r3, [r7, #148] @ 0x94 800ab10: f507 7384 add.w r3, r7, #264 @ 0x108 800ab14: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ab18: 681a ldr r2, [r3, #0] 800ab1a: f507 7384 add.w r3, r7, #264 @ 0x108 800ab1e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab22: 681b ldr r3, [r3, #0] 800ab24: 781b ldrb r3, [r3, #0] 800ab26: 009b lsls r3, r3, #2 800ab28: 441a add r2, r3 800ab2a: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94 800ab2e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800ab32: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800ab36: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800ab3a: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800ab3e: b29b uxth r3, r3 800ab40: 8013 strh r3, [r2, #0] 800ab42: e1be b.n 800aec2 } } } /* iso out double */ else if (ep->type == EP_TYPE_ISOC) 800ab44: f507 7384 add.w r3, r7, #264 @ 0x108 800ab48: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab4c: 681b ldr r3, [r3, #0] 800ab4e: 78db ldrb r3, [r3, #3] 800ab50: 2b01 cmp r3, #1 800ab52: f040 81b4 bne.w 800aebe { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 800ab56: f507 7384 add.w r3, r7, #264 @ 0x108 800ab5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab5e: 681b ldr r3, [r3, #0] 800ab60: 699a ldr r2, [r3, #24] 800ab62: f507 7384 add.w r3, r7, #264 @ 0x108 800ab66: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab6a: 681b ldr r3, [r3, #0] 800ab6c: 691b ldr r3, [r3, #16] 800ab6e: 429a cmp r2, r3 800ab70: d917 bls.n 800aba2 { len = ep->maxpacket; 800ab72: f507 7384 add.w r3, r7, #264 @ 0x108 800ab76: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab7a: 681b ldr r3, [r3, #0] 800ab7c: 691b ldr r3, [r3, #16] 800ab7e: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 800ab82: f507 7384 add.w r3, r7, #264 @ 0x108 800ab86: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab8a: 681b ldr r3, [r3, #0] 800ab8c: 699a ldr r2, [r3, #24] 800ab8e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ab92: 1ad2 subs r2, r2, r3 800ab94: f507 7384 add.w r3, r7, #264 @ 0x108 800ab98: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab9c: 681b ldr r3, [r3, #0] 800ab9e: 619a str r2, [r3, #24] 800aba0: e00e b.n 800abc0 } else { len = ep->xfer_len; 800aba2: f507 7384 add.w r3, r7, #264 @ 0x108 800aba6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800abaa: 681b ldr r3, [r3, #0] 800abac: 699b ldr r3, [r3, #24] 800abae: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 800abb2: f507 7384 add.w r3, r7, #264 @ 0x108 800abb6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800abba: 681b ldr r3, [r3, #0] 800abbc: 2200 movs r2, #0 800abbe: 619a str r2, [r3, #24] } PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); 800abc0: f507 7384 add.w r3, r7, #264 @ 0x108 800abc4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800abc8: 681b ldr r3, [r3, #0] 800abca: 785b ldrb r3, [r3, #1] 800abcc: 2b00 cmp r3, #0 800abce: f040 8085 bne.w 800acdc 800abd2: f507 7384 add.w r3, r7, #264 @ 0x108 800abd6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800abda: 681b ldr r3, [r3, #0] 800abdc: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 800abe0: f507 7384 add.w r3, r7, #264 @ 0x108 800abe4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800abe8: 681b ldr r3, [r3, #0] 800abea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800abee: b29b uxth r3, r3 800abf0: 461a mov r2, r3 800abf2: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 800abf6: 4413 add r3, r2 800abf8: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 800abfc: f507 7384 add.w r3, r7, #264 @ 0x108 800ac00: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ac04: 681b ldr r3, [r3, #0] 800ac06: 781b ldrb r3, [r3, #0] 800ac08: 011a lsls r2, r3, #4 800ac0a: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 800ac0e: 4413 add r3, r2 800ac10: f203 4304 addw r3, r3, #1028 @ 0x404 800ac14: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 800ac18: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ac1c: 881b ldrh r3, [r3, #0] 800ac1e: b29b uxth r3, r3 800ac20: f3c3 0309 ubfx r3, r3, #0, #10 800ac24: b29a uxth r2, r3 800ac26: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ac2a: 801a strh r2, [r3, #0] 800ac2c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac30: 2b3e cmp r3, #62 @ 0x3e 800ac32: d923 bls.n 800ac7c 800ac34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac38: 095b lsrs r3, r3, #5 800ac3a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800ac3e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac42: f003 031f and.w r3, r3, #31 800ac46: 2b00 cmp r3, #0 800ac48: d104 bne.n 800ac54 800ac4a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800ac4e: 3b01 subs r3, #1 800ac50: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800ac54: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ac58: 881b ldrh r3, [r3, #0] 800ac5a: b29a uxth r2, r3 800ac5c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800ac60: b29b uxth r3, r3 800ac62: 029b lsls r3, r3, #10 800ac64: b29b uxth r3, r3 800ac66: 4313 orrs r3, r2 800ac68: b29b uxth r3, r3 800ac6a: ea6f 4343 mvn.w r3, r3, lsl #17 800ac6e: ea6f 4353 mvn.w r3, r3, lsr #17 800ac72: b29a uxth r2, r3 800ac74: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ac78: 801a strh r2, [r3, #0] 800ac7a: e060 b.n 800ad3e 800ac7c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ac80: 2b00 cmp r3, #0 800ac82: d10c bne.n 800ac9e 800ac84: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ac88: 881b ldrh r3, [r3, #0] 800ac8a: b29b uxth r3, r3 800ac8c: ea6f 4343 mvn.w r3, r3, lsl #17 800ac90: ea6f 4353 mvn.w r3, r3, lsr #17 800ac94: b29a uxth r2, r3 800ac96: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ac9a: 801a strh r2, [r3, #0] 800ac9c: e04f b.n 800ad3e 800ac9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aca2: 085b lsrs r3, r3, #1 800aca4: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800aca8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800acac: f003 0301 and.w r3, r3, #1 800acb0: 2b00 cmp r3, #0 800acb2: d004 beq.n 800acbe 800acb4: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800acb8: 3301 adds r3, #1 800acba: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800acbe: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800acc2: 881b ldrh r3, [r3, #0] 800acc4: b29a uxth r2, r3 800acc6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800acca: b29b uxth r3, r3 800accc: 029b lsls r3, r3, #10 800acce: b29b uxth r3, r3 800acd0: 4313 orrs r3, r2 800acd2: b29a uxth r2, r3 800acd4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800acd8: 801a strh r2, [r3, #0] 800acda: e030 b.n 800ad3e 800acdc: f507 7384 add.w r3, r7, #264 @ 0x108 800ace0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ace4: 681b ldr r3, [r3, #0] 800ace6: 785b ldrb r3, [r3, #1] 800ace8: 2b01 cmp r3, #1 800acea: d128 bne.n 800ad3e 800acec: f507 7384 add.w r3, r7, #264 @ 0x108 800acf0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800acf4: 681b ldr r3, [r3, #0] 800acf6: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 800acfa: f507 7384 add.w r3, r7, #264 @ 0x108 800acfe: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ad02: 681b ldr r3, [r3, #0] 800ad04: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800ad08: b29b uxth r3, r3 800ad0a: 461a mov r2, r3 800ad0c: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 800ad10: 4413 add r3, r2 800ad12: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 800ad16: f507 7384 add.w r3, r7, #264 @ 0x108 800ad1a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad1e: 681b ldr r3, [r3, #0] 800ad20: 781b ldrb r3, [r3, #0] 800ad22: 011a lsls r2, r3, #4 800ad24: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 800ad28: 4413 add r3, r2 800ad2a: f203 4304 addw r3, r3, #1028 @ 0x404 800ad2e: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 800ad32: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ad36: b29a uxth r2, r3 800ad38: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0 800ad3c: 801a strh r2, [r3, #0] 800ad3e: f507 7384 add.w r3, r7, #264 @ 0x108 800ad42: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ad46: 681b ldr r3, [r3, #0] 800ad48: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 800ad4c: f507 7384 add.w r3, r7, #264 @ 0x108 800ad50: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad54: 681b ldr r3, [r3, #0] 800ad56: 785b ldrb r3, [r3, #1] 800ad58: 2b00 cmp r3, #0 800ad5a: f040 8085 bne.w 800ae68 800ad5e: f507 7384 add.w r3, r7, #264 @ 0x108 800ad62: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ad66: 681b ldr r3, [r3, #0] 800ad68: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 800ad6c: f507 7384 add.w r3, r7, #264 @ 0x108 800ad70: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ad74: 681b ldr r3, [r3, #0] 800ad76: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800ad7a: b29b uxth r3, r3 800ad7c: 461a mov r2, r3 800ad7e: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 800ad82: 4413 add r3, r2 800ad84: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 800ad88: f507 7384 add.w r3, r7, #264 @ 0x108 800ad8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad90: 681b ldr r3, [r3, #0] 800ad92: 781b ldrb r3, [r3, #0] 800ad94: 011a lsls r2, r3, #4 800ad96: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 800ad9a: 4413 add r3, r2 800ad9c: f203 430c addw r3, r3, #1036 @ 0x40c 800ada0: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 800ada4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800ada8: 881b ldrh r3, [r3, #0] 800adaa: b29b uxth r3, r3 800adac: f3c3 0309 ubfx r3, r3, #0, #10 800adb0: b29a uxth r2, r3 800adb2: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800adb6: 801a strh r2, [r3, #0] 800adb8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800adbc: 2b3e cmp r3, #62 @ 0x3e 800adbe: d923 bls.n 800ae08 800adc0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800adc4: 095b lsrs r3, r3, #5 800adc6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800adca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800adce: f003 031f and.w r3, r3, #31 800add2: 2b00 cmp r3, #0 800add4: d104 bne.n 800ade0 800add6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800adda: 3b01 subs r3, #1 800addc: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800ade0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800ade4: 881b ldrh r3, [r3, #0] 800ade6: b29a uxth r2, r3 800ade8: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800adec: b29b uxth r3, r3 800adee: 029b lsls r3, r3, #10 800adf0: b29b uxth r3, r3 800adf2: 4313 orrs r3, r2 800adf4: b29b uxth r3, r3 800adf6: ea6f 4343 mvn.w r3, r3, lsl #17 800adfa: ea6f 4353 mvn.w r3, r3, lsr #17 800adfe: b29a uxth r2, r3 800ae00: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800ae04: 801a strh r2, [r3, #0] 800ae06: e05c b.n 800aec2 800ae08: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ae0c: 2b00 cmp r3, #0 800ae0e: d10c bne.n 800ae2a 800ae10: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800ae14: 881b ldrh r3, [r3, #0] 800ae16: b29b uxth r3, r3 800ae18: ea6f 4343 mvn.w r3, r3, lsl #17 800ae1c: ea6f 4353 mvn.w r3, r3, lsr #17 800ae20: b29a uxth r2, r3 800ae22: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800ae26: 801a strh r2, [r3, #0] 800ae28: e04b b.n 800aec2 800ae2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ae2e: 085b lsrs r3, r3, #1 800ae30: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800ae34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ae38: f003 0301 and.w r3, r3, #1 800ae3c: 2b00 cmp r3, #0 800ae3e: d004 beq.n 800ae4a 800ae40: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800ae44: 3301 adds r3, #1 800ae46: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800ae4a: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800ae4e: 881b ldrh r3, [r3, #0] 800ae50: b29a uxth r2, r3 800ae52: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800ae56: b29b uxth r3, r3 800ae58: 029b lsls r3, r3, #10 800ae5a: b29b uxth r3, r3 800ae5c: 4313 orrs r3, r2 800ae5e: b29a uxth r2, r3 800ae60: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800ae64: 801a strh r2, [r3, #0] 800ae66: e02c b.n 800aec2 800ae68: f507 7384 add.w r3, r7, #264 @ 0x108 800ae6c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ae70: 681b ldr r3, [r3, #0] 800ae72: 785b ldrb r3, [r3, #1] 800ae74: 2b01 cmp r3, #1 800ae76: d124 bne.n 800aec2 800ae78: f507 7384 add.w r3, r7, #264 @ 0x108 800ae7c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ae80: 681b ldr r3, [r3, #0] 800ae82: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800ae86: b29b uxth r3, r3 800ae88: 461a mov r2, r3 800ae8a: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 800ae8e: 4413 add r3, r2 800ae90: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 800ae94: f507 7384 add.w r3, r7, #264 @ 0x108 800ae98: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ae9c: 681b ldr r3, [r3, #0] 800ae9e: 781b ldrb r3, [r3, #0] 800aea0: 011a lsls r2, r3, #4 800aea2: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 800aea6: 4413 add r3, r2 800aea8: f203 430c addw r3, r3, #1036 @ 0x40c 800aeac: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 800aeb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aeb4: b29a uxth r2, r3 800aeb6: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0 800aeba: 801a strh r2, [r3, #0] 800aebc: e001 b.n 800aec2 } else { return HAL_ERROR; 800aebe: 2301 movs r3, #1 800aec0: e03a b.n 800af38 } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800aec2: f507 7384 add.w r3, r7, #264 @ 0x108 800aec6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aeca: 681a ldr r2, [r3, #0] 800aecc: f507 7384 add.w r3, r7, #264 @ 0x108 800aed0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aed4: 681b ldr r3, [r3, #0] 800aed6: 781b ldrb r3, [r3, #0] 800aed8: 009b lsls r3, r3, #2 800aeda: 4413 add r3, r2 800aedc: 881b ldrh r3, [r3, #0] 800aede: b29b uxth r3, r3 800aee0: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800aee4: f023 0370 bic.w r3, r3, #112 @ 0x70 800aee8: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800aeec: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800aef0: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800aef4: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800aef8: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800aefc: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800af00: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800af04: f507 7384 add.w r3, r7, #264 @ 0x108 800af08: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800af0c: 681a ldr r2, [r3, #0] 800af0e: f507 7384 add.w r3, r7, #264 @ 0x108 800af12: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af16: 681b ldr r3, [r3, #0] 800af18: 781b ldrb r3, [r3, #0] 800af1a: 009b lsls r3, r3, #2 800af1c: 441a add r2, r3 800af1e: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800af22: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800af26: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800af2a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800af2e: f043 0380 orr.w r3, r3, #128 @ 0x80 800af32: b29b uxth r3, r3 800af34: 8013 strh r3, [r2, #0] } return HAL_OK; 800af36: 2300 movs r3, #0 } 800af38: 4618 mov r0, r3 800af3a: f507 7784 add.w r7, r7, #264 @ 0x108 800af3e: 46bd mov sp, r7 800af40: bd80 pop {r7, pc} 0800af42 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800af42: b480 push {r7} 800af44: b085 sub sp, #20 800af46: af00 add r7, sp, #0 800af48: 6078 str r0, [r7, #4] 800af4a: 6039 str r1, [r7, #0] if (ep->is_in != 0U) 800af4c: 683b ldr r3, [r7, #0] 800af4e: 785b ldrb r3, [r3, #1] 800af50: 2b00 cmp r3, #0 800af52: d020 beq.n 800af96 { PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); 800af54: 687a ldr r2, [r7, #4] 800af56: 683b ldr r3, [r7, #0] 800af58: 781b ldrb r3, [r3, #0] 800af5a: 009b lsls r3, r3, #2 800af5c: 4413 add r3, r2 800af5e: 881b ldrh r3, [r3, #0] 800af60: b29b uxth r3, r3 800af62: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800af66: f023 0340 bic.w r3, r3, #64 @ 0x40 800af6a: 81bb strh r3, [r7, #12] 800af6c: 89bb ldrh r3, [r7, #12] 800af6e: f083 0310 eor.w r3, r3, #16 800af72: 81bb strh r3, [r7, #12] 800af74: 687a ldr r2, [r7, #4] 800af76: 683b ldr r3, [r7, #0] 800af78: 781b ldrb r3, [r3, #0] 800af7a: 009b lsls r3, r3, #2 800af7c: 441a add r2, r3 800af7e: 89bb ldrh r3, [r7, #12] 800af80: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800af84: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800af88: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800af8c: f043 0380 orr.w r3, r3, #128 @ 0x80 800af90: b29b uxth r3, r3 800af92: 8013 strh r3, [r2, #0] 800af94: e01f b.n 800afd6 } else { PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); 800af96: 687a ldr r2, [r7, #4] 800af98: 683b ldr r3, [r7, #0] 800af9a: 781b ldrb r3, [r3, #0] 800af9c: 009b lsls r3, r3, #2 800af9e: 4413 add r3, r2 800afa0: 881b ldrh r3, [r3, #0] 800afa2: b29b uxth r3, r3 800afa4: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800afa8: f023 0370 bic.w r3, r3, #112 @ 0x70 800afac: 81fb strh r3, [r7, #14] 800afae: 89fb ldrh r3, [r7, #14] 800afb0: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800afb4: 81fb strh r3, [r7, #14] 800afb6: 687a ldr r2, [r7, #4] 800afb8: 683b ldr r3, [r7, #0] 800afba: 781b ldrb r3, [r3, #0] 800afbc: 009b lsls r3, r3, #2 800afbe: 441a add r2, r3 800afc0: 89fb ldrh r3, [r7, #14] 800afc2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800afc6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800afca: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800afce: f043 0380 orr.w r3, r3, #128 @ 0x80 800afd2: b29b uxth r3, r3 800afd4: 8013 strh r3, [r2, #0] } return HAL_OK; 800afd6: 2300 movs r3, #0 } 800afd8: 4618 mov r0, r3 800afda: 3714 adds r7, #20 800afdc: 46bd mov sp, r7 800afde: bc80 pop {r7} 800afe0: 4770 bx lr 0800afe2 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800afe2: b480 push {r7} 800afe4: b087 sub sp, #28 800afe6: af00 add r7, sp, #0 800afe8: 6078 str r0, [r7, #4] 800afea: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 800afec: 683b ldr r3, [r7, #0] 800afee: 7b1b ldrb r3, [r3, #12] 800aff0: 2b00 cmp r3, #0 800aff2: f040 809d bne.w 800b130 { if (ep->is_in != 0U) 800aff6: 683b ldr r3, [r7, #0] 800aff8: 785b ldrb r3, [r3, #1] 800affa: 2b00 cmp r3, #0 800affc: d04c beq.n 800b098 { PCD_CLEAR_TX_DTOG(USBx, ep->num); 800affe: 687a ldr r2, [r7, #4] 800b000: 683b ldr r3, [r7, #0] 800b002: 781b ldrb r3, [r3, #0] 800b004: 009b lsls r3, r3, #2 800b006: 4413 add r3, r2 800b008: 881b ldrh r3, [r3, #0] 800b00a: 823b strh r3, [r7, #16] 800b00c: 8a3b ldrh r3, [r7, #16] 800b00e: f003 0340 and.w r3, r3, #64 @ 0x40 800b012: 2b00 cmp r3, #0 800b014: d01b beq.n 800b04e 800b016: 687a ldr r2, [r7, #4] 800b018: 683b ldr r3, [r7, #0] 800b01a: 781b ldrb r3, [r3, #0] 800b01c: 009b lsls r3, r3, #2 800b01e: 4413 add r3, r2 800b020: 881b ldrh r3, [r3, #0] 800b022: b29b uxth r3, r3 800b024: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800b028: f023 0370 bic.w r3, r3, #112 @ 0x70 800b02c: 81fb strh r3, [r7, #14] 800b02e: 687a ldr r2, [r7, #4] 800b030: 683b ldr r3, [r7, #0] 800b032: 781b ldrb r3, [r3, #0] 800b034: 009b lsls r3, r3, #2 800b036: 441a add r2, r3 800b038: 89fb ldrh r3, [r7, #14] 800b03a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b03e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b042: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b046: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800b04a: b29b uxth r3, r3 800b04c: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 800b04e: 683b ldr r3, [r7, #0] 800b050: 78db ldrb r3, [r3, #3] 800b052: 2b01 cmp r3, #1 800b054: d06c beq.n 800b130 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 800b056: 687a ldr r2, [r7, #4] 800b058: 683b ldr r3, [r7, #0] 800b05a: 781b ldrb r3, [r3, #0] 800b05c: 009b lsls r3, r3, #2 800b05e: 4413 add r3, r2 800b060: 881b ldrh r3, [r3, #0] 800b062: b29b uxth r3, r3 800b064: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800b068: f023 0340 bic.w r3, r3, #64 @ 0x40 800b06c: 81bb strh r3, [r7, #12] 800b06e: 89bb ldrh r3, [r7, #12] 800b070: f083 0320 eor.w r3, r3, #32 800b074: 81bb strh r3, [r7, #12] 800b076: 687a ldr r2, [r7, #4] 800b078: 683b ldr r3, [r7, #0] 800b07a: 781b ldrb r3, [r3, #0] 800b07c: 009b lsls r3, r3, #2 800b07e: 441a add r2, r3 800b080: 89bb ldrh r3, [r7, #12] 800b082: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b086: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b08a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b08e: f043 0380 orr.w r3, r3, #128 @ 0x80 800b092: b29b uxth r3, r3 800b094: 8013 strh r3, [r2, #0] 800b096: e04b b.n 800b130 } } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 800b098: 687a ldr r2, [r7, #4] 800b09a: 683b ldr r3, [r7, #0] 800b09c: 781b ldrb r3, [r3, #0] 800b09e: 009b lsls r3, r3, #2 800b0a0: 4413 add r3, r2 800b0a2: 881b ldrh r3, [r3, #0] 800b0a4: 82fb strh r3, [r7, #22] 800b0a6: 8afb ldrh r3, [r7, #22] 800b0a8: f403 4380 and.w r3, r3, #16384 @ 0x4000 800b0ac: 2b00 cmp r3, #0 800b0ae: d01b beq.n 800b0e8 800b0b0: 687a ldr r2, [r7, #4] 800b0b2: 683b ldr r3, [r7, #0] 800b0b4: 781b ldrb r3, [r3, #0] 800b0b6: 009b lsls r3, r3, #2 800b0b8: 4413 add r3, r2 800b0ba: 881b ldrh r3, [r3, #0] 800b0bc: b29b uxth r3, r3 800b0be: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800b0c2: f023 0370 bic.w r3, r3, #112 @ 0x70 800b0c6: 82bb strh r3, [r7, #20] 800b0c8: 687a ldr r2, [r7, #4] 800b0ca: 683b ldr r3, [r7, #0] 800b0cc: 781b ldrb r3, [r3, #0] 800b0ce: 009b lsls r3, r3, #2 800b0d0: 441a add r2, r3 800b0d2: 8abb ldrh r3, [r7, #20] 800b0d4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b0d8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b0dc: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800b0e0: f043 0380 orr.w r3, r3, #128 @ 0x80 800b0e4: b29b uxth r3, r3 800b0e6: 8013 strh r3, [r2, #0] /* Configure VALID status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800b0e8: 687a ldr r2, [r7, #4] 800b0ea: 683b ldr r3, [r7, #0] 800b0ec: 781b ldrb r3, [r3, #0] 800b0ee: 009b lsls r3, r3, #2 800b0f0: 4413 add r3, r2 800b0f2: 881b ldrh r3, [r3, #0] 800b0f4: b29b uxth r3, r3 800b0f6: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800b0fa: f023 0370 bic.w r3, r3, #112 @ 0x70 800b0fe: 827b strh r3, [r7, #18] 800b100: 8a7b ldrh r3, [r7, #18] 800b102: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800b106: 827b strh r3, [r7, #18] 800b108: 8a7b ldrh r3, [r7, #18] 800b10a: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800b10e: 827b strh r3, [r7, #18] 800b110: 687a ldr r2, [r7, #4] 800b112: 683b ldr r3, [r7, #0] 800b114: 781b ldrb r3, [r3, #0] 800b116: 009b lsls r3, r3, #2 800b118: 441a add r2, r3 800b11a: 8a7b ldrh r3, [r7, #18] 800b11c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b120: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b124: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b128: f043 0380 orr.w r3, r3, #128 @ 0x80 800b12c: b29b uxth r3, r3 800b12e: 8013 strh r3, [r2, #0] } } return HAL_OK; 800b130: 2300 movs r3, #0 } 800b132: 4618 mov r0, r3 800b134: 371c adds r7, #28 800b136: 46bd mov sp, r7 800b138: bc80 pop {r7} 800b13a: 4770 bx lr 0800b13c : * @param address new device address to be assigned * This parameter can be a value from 0 to 255 * @retval HAL status */ HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) { 800b13c: b480 push {r7} 800b13e: b083 sub sp, #12 800b140: af00 add r7, sp, #0 800b142: 6078 str r0, [r7, #4] 800b144: 460b mov r3, r1 800b146: 70fb strb r3, [r7, #3] if (address == 0U) 800b148: 78fb ldrb r3, [r7, #3] 800b14a: 2b00 cmp r3, #0 800b14c: d103 bne.n 800b156 { /* set device address and enable function */ USBx->DADDR = (uint16_t)USB_DADDR_EF; 800b14e: 687b ldr r3, [r7, #4] 800b150: 2280 movs r2, #128 @ 0x80 800b152: f8a3 204c strh.w r2, [r3, #76] @ 0x4c } return HAL_OK; 800b156: 2300 movs r3, #0 } 800b158: 4618 mov r0, r3 800b15a: 370c adds r7, #12 800b15c: 46bd mov sp, r7 800b15e: bc80 pop {r7} 800b160: 4770 bx lr 0800b162 : * @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx) { 800b162: b480 push {r7} 800b164: b083 sub sp, #12 800b166: af00 add r7, sp, #0 800b168: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800b16a: 2300 movs r3, #0 } 800b16c: 4618 mov r0, r3 800b16e: 370c adds r7, #12 800b170: 46bd mov sp, r7 800b172: bc80 pop {r7} 800b174: 4770 bx lr 0800b176 : * @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) { 800b176: b480 push {r7} 800b178: b083 sub sp, #12 800b17a: af00 add r7, sp, #0 800b17c: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800b17e: 2300 movs r3, #0 } 800b180: 4618 mov r0, r3 800b182: 370c adds r7, #12 800b184: 46bd mov sp, r7 800b186: bc80 pop {r7} 800b188: 4770 bx lr 0800b18a : * @brief USB_ReadInterrupts return the global USB interrupt status * @param USBx Selected device * @retval USB Global Interrupt status */ uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx) { 800b18a: b480 push {r7} 800b18c: b085 sub sp, #20 800b18e: af00 add r7, sp, #0 800b190: 6078 str r0, [r7, #4] uint32_t tmpreg; tmpreg = USBx->ISTR; 800b192: 687b ldr r3, [r7, #4] 800b194: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 800b198: b29b uxth r3, r3 800b19a: 60fb str r3, [r7, #12] return tmpreg; 800b19c: 68fb ldr r3, [r7, #12] } 800b19e: 4618 mov r0, r3 800b1a0: 3714 adds r7, #20 800b1a2: 46bd mov sp, r7 800b1a4: bc80 pop {r7} 800b1a6: 4770 bx lr 0800b1a8 : * @param USBx Selected device * @param psetup pointer to setup packet * @retval HAL status */ HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup) { 800b1a8: b480 push {r7} 800b1aa: b083 sub sp, #12 800b1ac: af00 add r7, sp, #0 800b1ae: 6078 str r0, [r7, #4] 800b1b0: 6039 str r1, [r7, #0] UNUSED(psetup); /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800b1b2: 2300 movs r3, #0 } 800b1b4: 4618 mov r0, r3 800b1b6: 370c adds r7, #12 800b1b8: 46bd mov sp, r7 800b1ba: bc80 pop {r7} 800b1bc: 4770 bx lr 0800b1be : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800b1be: b480 push {r7} 800b1c0: b08b sub sp, #44 @ 0x2c 800b1c2: af00 add r7, sp, #0 800b1c4: 60f8 str r0, [r7, #12] 800b1c6: 60b9 str r1, [r7, #8] 800b1c8: 4611 mov r1, r2 800b1ca: 461a mov r2, r3 800b1cc: 460b mov r3, r1 800b1ce: 80fb strh r3, [r7, #6] 800b1d0: 4613 mov r3, r2 800b1d2: 80bb strh r3, [r7, #4] uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; 800b1d4: 88bb ldrh r3, [r7, #4] 800b1d6: 3301 adds r3, #1 800b1d8: 085b lsrs r3, r3, #1 800b1da: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 800b1dc: 68fb ldr r3, [r7, #12] 800b1de: 617b str r3, [r7, #20] uint32_t count; uint16_t WrVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 800b1e0: 68bb ldr r3, [r7, #8] 800b1e2: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 800b1e4: 88fb ldrh r3, [r7, #6] 800b1e6: 005a lsls r2, r3, #1 800b1e8: 697b ldr r3, [r7, #20] 800b1ea: 4413 add r3, r2 800b1ec: f503 6380 add.w r3, r3, #1024 @ 0x400 800b1f0: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800b1f2: 69bb ldr r3, [r7, #24] 800b1f4: 627b str r3, [r7, #36] @ 0x24 800b1f6: e01f b.n 800b238 { WrVal = pBuf[0]; 800b1f8: 69fb ldr r3, [r7, #28] 800b1fa: 781b ldrb r3, [r3, #0] 800b1fc: 827b strh r3, [r7, #18] WrVal |= (uint16_t)pBuf[1] << 8; 800b1fe: 69fb ldr r3, [r7, #28] 800b200: 3301 adds r3, #1 800b202: 781b ldrb r3, [r3, #0] 800b204: b21b sxth r3, r3 800b206: 021b lsls r3, r3, #8 800b208: b21a sxth r2, r3 800b20a: f9b7 3012 ldrsh.w r3, [r7, #18] 800b20e: 4313 orrs r3, r2 800b210: b21b sxth r3, r3 800b212: 827b strh r3, [r7, #18] *pdwVal = (WrVal & 0xFFFFU); 800b214: 6a3b ldr r3, [r7, #32] 800b216: 8a7a ldrh r2, [r7, #18] 800b218: 801a strh r2, [r3, #0] pdwVal++; 800b21a: 6a3b ldr r3, [r7, #32] 800b21c: 3302 adds r3, #2 800b21e: 623b str r3, [r7, #32] #if PMA_ACCESS > 1U pdwVal++; 800b220: 6a3b ldr r3, [r7, #32] 800b222: 3302 adds r3, #2 800b224: 623b str r3, [r7, #32] #endif /* PMA_ACCESS */ pBuf++; 800b226: 69fb ldr r3, [r7, #28] 800b228: 3301 adds r3, #1 800b22a: 61fb str r3, [r7, #28] pBuf++; 800b22c: 69fb ldr r3, [r7, #28] 800b22e: 3301 adds r3, #1 800b230: 61fb str r3, [r7, #28] for (count = n; count != 0U; count--) 800b232: 6a7b ldr r3, [r7, #36] @ 0x24 800b234: 3b01 subs r3, #1 800b236: 627b str r3, [r7, #36] @ 0x24 800b238: 6a7b ldr r3, [r7, #36] @ 0x24 800b23a: 2b00 cmp r3, #0 800b23c: d1dc bne.n 800b1f8 } } 800b23e: bf00 nop 800b240: bf00 nop 800b242: 372c adds r7, #44 @ 0x2c 800b244: 46bd mov sp, r7 800b246: bc80 pop {r7} 800b248: 4770 bx lr 0800b24a : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800b24a: b480 push {r7} 800b24c: b08b sub sp, #44 @ 0x2c 800b24e: af00 add r7, sp, #0 800b250: 60f8 str r0, [r7, #12] 800b252: 60b9 str r1, [r7, #8] 800b254: 4611 mov r1, r2 800b256: 461a mov r2, r3 800b258: 460b mov r3, r1 800b25a: 80fb strh r3, [r7, #6] 800b25c: 4613 mov r3, r2 800b25e: 80bb strh r3, [r7, #4] uint32_t n = (uint32_t)wNBytes >> 1; 800b260: 88bb ldrh r3, [r7, #4] 800b262: 085b lsrs r3, r3, #1 800b264: b29b uxth r3, r3 800b266: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 800b268: 68fb ldr r3, [r7, #12] 800b26a: 617b str r3, [r7, #20] uint32_t count; uint32_t RdVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 800b26c: 68bb ldr r3, [r7, #8] 800b26e: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 800b270: 88fb ldrh r3, [r7, #6] 800b272: 005a lsls r2, r3, #1 800b274: 697b ldr r3, [r7, #20] 800b276: 4413 add r3, r2 800b278: f503 6380 add.w r3, r3, #1024 @ 0x400 800b27c: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800b27e: 69bb ldr r3, [r7, #24] 800b280: 627b str r3, [r7, #36] @ 0x24 800b282: e01b b.n 800b2bc { RdVal = *(__IO uint16_t *)pdwVal; 800b284: 6a3b ldr r3, [r7, #32] 800b286: 881b ldrh r3, [r3, #0] 800b288: b29b uxth r3, r3 800b28a: 613b str r3, [r7, #16] pdwVal++; 800b28c: 6a3b ldr r3, [r7, #32] 800b28e: 3302 adds r3, #2 800b290: 623b str r3, [r7, #32] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 800b292: 693b ldr r3, [r7, #16] 800b294: b2da uxtb r2, r3 800b296: 69fb ldr r3, [r7, #28] 800b298: 701a strb r2, [r3, #0] pBuf++; 800b29a: 69fb ldr r3, [r7, #28] 800b29c: 3301 adds r3, #1 800b29e: 61fb str r3, [r7, #28] *pBuf = (uint8_t)((RdVal >> 8) & 0xFFU); 800b2a0: 693b ldr r3, [r7, #16] 800b2a2: 0a1b lsrs r3, r3, #8 800b2a4: b2da uxtb r2, r3 800b2a6: 69fb ldr r3, [r7, #28] 800b2a8: 701a strb r2, [r3, #0] pBuf++; 800b2aa: 69fb ldr r3, [r7, #28] 800b2ac: 3301 adds r3, #1 800b2ae: 61fb str r3, [r7, #28] #if PMA_ACCESS > 1U pdwVal++; 800b2b0: 6a3b ldr r3, [r7, #32] 800b2b2: 3302 adds r3, #2 800b2b4: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800b2b6: 6a7b ldr r3, [r7, #36] @ 0x24 800b2b8: 3b01 subs r3, #1 800b2ba: 627b str r3, [r7, #36] @ 0x24 800b2bc: 6a7b ldr r3, [r7, #36] @ 0x24 800b2be: 2b00 cmp r3, #0 800b2c0: d1e0 bne.n 800b284 #endif /* PMA_ACCESS */ } if ((wNBytes % 2U) != 0U) 800b2c2: 88bb ldrh r3, [r7, #4] 800b2c4: f003 0301 and.w r3, r3, #1 800b2c8: b29b uxth r3, r3 800b2ca: 2b00 cmp r3, #0 800b2cc: d007 beq.n 800b2de { RdVal = *pdwVal; 800b2ce: 6a3b ldr r3, [r7, #32] 800b2d0: 881b ldrh r3, [r3, #0] 800b2d2: b29b uxth r3, r3 800b2d4: 613b str r3, [r7, #16] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 800b2d6: 693b ldr r3, [r7, #16] 800b2d8: b2da uxtb r2, r3 800b2da: 69fb ldr r3, [r7, #28] 800b2dc: 701a strb r2, [r3, #0] } } 800b2de: bf00 nop 800b2e0: 372c adds r7, #44 @ 0x2c 800b2e2: 46bd mov sp, r7 800b2e4: bc80 pop {r7} 800b2e6: 4770 bx lr 0800b2e8 : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800b2e8: b580 push {r7, lr} 800b2ea: b084 sub sp, #16 800b2ec: af00 add r7, sp, #0 800b2ee: 6078 str r0, [r7, #4] 800b2f0: 460b mov r3, r1 800b2f2: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 800b2f4: 2300 movs r3, #0 800b2f6: 73fb strb r3, [r7, #15] USBD_CDC_HandleTypeDef *hcdc; if (pdev->dev_speed == USBD_SPEED_HIGH) 800b2f8: 687b ldr r3, [r7, #4] 800b2fa: 7c1b ldrb r3, [r3, #16] 800b2fc: 2b00 cmp r3, #0 800b2fe: d115 bne.n 800b32c { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 800b300: f44f 7300 mov.w r3, #512 @ 0x200 800b304: 2202 movs r2, #2 800b306: 2181 movs r1, #129 @ 0x81 800b308: 6878 ldr r0, [r7, #4] 800b30a: f001 ff00 bl 800d10e CDC_DATA_HS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 800b30e: 687b ldr r3, [r7, #4] 800b310: 2201 movs r2, #1 800b312: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 800b314: f44f 7300 mov.w r3, #512 @ 0x200 800b318: 2202 movs r2, #2 800b31a: 2101 movs r1, #1 800b31c: 6878 ldr r0, [r7, #4] 800b31e: f001 fef6 bl 800d10e CDC_DATA_HS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 800b322: 687b ldr r3, [r7, #4] 800b324: 2201 movs r2, #1 800b326: f8c3 216c str.w r2, [r3, #364] @ 0x16c 800b32a: e012 b.n 800b352 } else { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 800b32c: 2340 movs r3, #64 @ 0x40 800b32e: 2202 movs r2, #2 800b330: 2181 movs r1, #129 @ 0x81 800b332: 6878 ldr r0, [r7, #4] 800b334: f001 feeb bl 800d10e CDC_DATA_FS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 800b338: 687b ldr r3, [r7, #4] 800b33a: 2201 movs r2, #1 800b33c: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 800b33e: 2340 movs r3, #64 @ 0x40 800b340: 2202 movs r2, #2 800b342: 2101 movs r1, #1 800b344: 6878 ldr r0, [r7, #4] 800b346: f001 fee2 bl 800d10e CDC_DATA_FS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 800b34a: 687b ldr r3, [r7, #4] 800b34c: 2201 movs r2, #1 800b34e: f8c3 216c str.w r2, [r3, #364] @ 0x16c } /* Open Command IN EP */ USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE); 800b352: 2308 movs r3, #8 800b354: 2203 movs r2, #3 800b356: 2182 movs r1, #130 @ 0x82 800b358: 6878 ldr r0, [r7, #4] 800b35a: f001 fed8 bl 800d10e pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U; 800b35e: 687b ldr r3, [r7, #4] 800b360: 2201 movs r2, #1 800b362: 641a str r2, [r3, #64] @ 0x40 pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef)); 800b364: f44f 7007 mov.w r0, #540 @ 0x21c 800b368: f001 fff8 bl 800d35c 800b36c: 4602 mov r2, r0 800b36e: 687b ldr r3, [r7, #4] 800b370: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 if (pdev->pClassData == NULL) 800b374: 687b ldr r3, [r7, #4] 800b376: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b37a: 2b00 cmp r3, #0 800b37c: d102 bne.n 800b384 { ret = 1U; 800b37e: 2301 movs r3, #1 800b380: 73fb strb r3, [r7, #15] 800b382: e026 b.n 800b3d2 } else { hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b384: 687b ldr r3, [r7, #4] 800b386: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b38a: 60bb str r3, [r7, #8] /* Init physical Interface components */ ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init(); 800b38c: 687b ldr r3, [r7, #4] 800b38e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b392: 681b ldr r3, [r3, #0] 800b394: 4798 blx r3 /* Init Xfer states */ hcdc->TxState = 0U; 800b396: 68bb ldr r3, [r7, #8] 800b398: 2200 movs r2, #0 800b39a: f8c3 2214 str.w r2, [r3, #532] @ 0x214 hcdc->RxState = 0U; 800b39e: 68bb ldr r3, [r7, #8] 800b3a0: 2200 movs r2, #0 800b3a2: f8c3 2218 str.w r2, [r3, #536] @ 0x218 if (pdev->dev_speed == USBD_SPEED_HIGH) 800b3a6: 687b ldr r3, [r7, #4] 800b3a8: 7c1b ldrb r3, [r3, #16] 800b3aa: 2b00 cmp r3, #0 800b3ac: d109 bne.n 800b3c2 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 800b3ae: 68bb ldr r3, [r7, #8] 800b3b0: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800b3b4: f44f 7300 mov.w r3, #512 @ 0x200 800b3b8: 2101 movs r1, #1 800b3ba: 6878 ldr r0, [r7, #4] 800b3bc: f001 ff97 bl 800d2ee 800b3c0: e007 b.n 800b3d2 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 800b3c2: 68bb ldr r3, [r7, #8] 800b3c4: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800b3c8: 2340 movs r3, #64 @ 0x40 800b3ca: 2101 movs r1, #1 800b3cc: 6878 ldr r0, [r7, #4] 800b3ce: f001 ff8e bl 800d2ee CDC_DATA_FS_OUT_PACKET_SIZE); } } return ret; 800b3d2: 7bfb ldrb r3, [r7, #15] } 800b3d4: 4618 mov r0, r3 800b3d6: 3710 adds r7, #16 800b3d8: 46bd mov sp, r7 800b3da: bd80 pop {r7, pc} 0800b3dc : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800b3dc: b580 push {r7, lr} 800b3de: b084 sub sp, #16 800b3e0: af00 add r7, sp, #0 800b3e2: 6078 str r0, [r7, #4] 800b3e4: 460b mov r3, r1 800b3e6: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 800b3e8: 2300 movs r3, #0 800b3ea: 73fb strb r3, [r7, #15] /* Close EP IN */ USBD_LL_CloseEP(pdev, CDC_IN_EP); 800b3ec: 2181 movs r1, #129 @ 0x81 800b3ee: 6878 ldr r0, [r7, #4] 800b3f0: f001 feb3 bl 800d15a pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U; 800b3f4: 687b ldr r3, [r7, #4] 800b3f6: 2200 movs r2, #0 800b3f8: 62da str r2, [r3, #44] @ 0x2c /* Close EP OUT */ USBD_LL_CloseEP(pdev, CDC_OUT_EP); 800b3fa: 2101 movs r1, #1 800b3fc: 6878 ldr r0, [r7, #4] 800b3fe: f001 feac bl 800d15a pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U; 800b402: 687b ldr r3, [r7, #4] 800b404: 2200 movs r2, #0 800b406: f8c3 216c str.w r2, [r3, #364] @ 0x16c /* Close Command IN EP */ USBD_LL_CloseEP(pdev, CDC_CMD_EP); 800b40a: 2182 movs r1, #130 @ 0x82 800b40c: 6878 ldr r0, [r7, #4] 800b40e: f001 fea4 bl 800d15a pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U; 800b412: 687b ldr r3, [r7, #4] 800b414: 2200 movs r2, #0 800b416: 641a str r2, [r3, #64] @ 0x40 /* DeInit physical Interface components */ if (pdev->pClassData != NULL) 800b418: 687b ldr r3, [r7, #4] 800b41a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b41e: 2b00 cmp r3, #0 800b420: d00e beq.n 800b440 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit(); 800b422: 687b ldr r3, [r7, #4] 800b424: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b428: 685b ldr r3, [r3, #4] 800b42a: 4798 blx r3 USBD_free(pdev->pClassData); 800b42c: 687b ldr r3, [r7, #4] 800b42e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b432: 4618 mov r0, r3 800b434: f001 ff9e bl 800d374 pdev->pClassData = NULL; 800b438: 687b ldr r3, [r7, #4] 800b43a: 2200 movs r2, #0 800b43c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 } return ret; 800b440: 7bfb ldrb r3, [r7, #15] } 800b442: 4618 mov r0, r3 800b444: 3710 adds r7, #16 800b446: 46bd mov sp, r7 800b448: bd80 pop {r7, pc} 0800b44a : * @param req: usb requests * @retval status */ static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800b44a: b580 push {r7, lr} 800b44c: b086 sub sp, #24 800b44e: af00 add r7, sp, #0 800b450: 6078 str r0, [r7, #4] 800b452: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b454: 687b ldr r3, [r7, #4] 800b456: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b45a: 613b str r3, [r7, #16] uint8_t ifalt = 0U; 800b45c: 2300 movs r3, #0 800b45e: 73fb strb r3, [r7, #15] uint16_t status_info = 0U; 800b460: 2300 movs r3, #0 800b462: 81bb strh r3, [r7, #12] uint8_t ret = USBD_OK; 800b464: 2300 movs r3, #0 800b466: 75fb strb r3, [r7, #23] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800b468: 683b ldr r3, [r7, #0] 800b46a: 781b ldrb r3, [r3, #0] 800b46c: f003 0360 and.w r3, r3, #96 @ 0x60 800b470: 2b00 cmp r3, #0 800b472: d039 beq.n 800b4e8 800b474: 2b20 cmp r3, #32 800b476: d17f bne.n 800b578 { case USB_REQ_TYPE_CLASS : if (req->wLength) 800b478: 683b ldr r3, [r7, #0] 800b47a: 88db ldrh r3, [r3, #6] 800b47c: 2b00 cmp r3, #0 800b47e: d029 beq.n 800b4d4 { if (req->bmRequest & 0x80U) 800b480: 683b ldr r3, [r7, #0] 800b482: 781b ldrb r3, [r3, #0] 800b484: b25b sxtb r3, r3 800b486: 2b00 cmp r3, #0 800b488: da11 bge.n 800b4ae { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800b48a: 687b ldr r3, [r7, #4] 800b48c: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b490: 689b ldr r3, [r3, #8] 800b492: 683a ldr r2, [r7, #0] 800b494: 7850 ldrb r0, [r2, #1] (uint8_t *)(void *)hcdc->data, 800b496: 6939 ldr r1, [r7, #16] ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800b498: 683a ldr r2, [r7, #0] 800b49a: 88d2 ldrh r2, [r2, #6] 800b49c: 4798 blx r3 req->wLength); USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 800b49e: 6939 ldr r1, [r7, #16] 800b4a0: 683b ldr r3, [r7, #0] 800b4a2: 88db ldrh r3, [r3, #6] 800b4a4: 461a mov r2, r3 800b4a6: 6878 ldr r0, [r7, #4] 800b4a8: f001 fa06 bl 800c8b8 else { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, (uint8_t *)(void *)req, 0U); } break; 800b4ac: e06b b.n 800b586 hcdc->CmdOpCode = req->bRequest; 800b4ae: 683b ldr r3, [r7, #0] 800b4b0: 785a ldrb r2, [r3, #1] 800b4b2: 693b ldr r3, [r7, #16] 800b4b4: f883 2200 strb.w r2, [r3, #512] @ 0x200 hcdc->CmdLength = (uint8_t)req->wLength; 800b4b8: 683b ldr r3, [r7, #0] 800b4ba: 88db ldrh r3, [r3, #6] 800b4bc: b2da uxtb r2, r3 800b4be: 693b ldr r3, [r7, #16] 800b4c0: f883 2201 strb.w r2, [r3, #513] @ 0x201 USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 800b4c4: 6939 ldr r1, [r7, #16] 800b4c6: 683b ldr r3, [r7, #0] 800b4c8: 88db ldrh r3, [r3, #6] 800b4ca: 461a mov r2, r3 800b4cc: 6878 ldr r0, [r7, #4] 800b4ce: f001 fa21 bl 800c914 break; 800b4d2: e058 b.n 800b586 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800b4d4: 687b ldr r3, [r7, #4] 800b4d6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b4da: 689b ldr r3, [r3, #8] 800b4dc: 683a ldr r2, [r7, #0] 800b4de: 7850 ldrb r0, [r2, #1] 800b4e0: 2200 movs r2, #0 800b4e2: 6839 ldr r1, [r7, #0] 800b4e4: 4798 blx r3 break; 800b4e6: e04e b.n 800b586 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800b4e8: 683b ldr r3, [r7, #0] 800b4ea: 785b ldrb r3, [r3, #1] 800b4ec: 2b0b cmp r3, #11 800b4ee: d02e beq.n 800b54e 800b4f0: 2b0b cmp r3, #11 800b4f2: dc38 bgt.n 800b566 800b4f4: 2b00 cmp r3, #0 800b4f6: d002 beq.n 800b4fe 800b4f8: 2b0a cmp r3, #10 800b4fa: d014 beq.n 800b526 800b4fc: e033 b.n 800b566 { case USB_REQ_GET_STATUS: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800b4fe: 687b ldr r3, [r7, #4] 800b500: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800b504: 2b03 cmp r3, #3 800b506: d107 bne.n 800b518 { USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U); 800b508: f107 030c add.w r3, r7, #12 800b50c: 2202 movs r2, #2 800b50e: 4619 mov r1, r3 800b510: 6878 ldr r0, [r7, #4] 800b512: f001 f9d1 bl 800c8b8 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800b516: e02e b.n 800b576 USBD_CtlError(pdev, req); 800b518: 6839 ldr r1, [r7, #0] 800b51a: 6878 ldr r0, [r7, #4] 800b51c: f001 f962 bl 800c7e4 ret = USBD_FAIL; 800b520: 2302 movs r3, #2 800b522: 75fb strb r3, [r7, #23] break; 800b524: e027 b.n 800b576 case USB_REQ_GET_INTERFACE: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800b526: 687b ldr r3, [r7, #4] 800b528: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800b52c: 2b03 cmp r3, #3 800b52e: d107 bne.n 800b540 { USBD_CtlSendData(pdev, &ifalt, 1U); 800b530: f107 030f add.w r3, r7, #15 800b534: 2201 movs r2, #1 800b536: 4619 mov r1, r3 800b538: 6878 ldr r0, [r7, #4] 800b53a: f001 f9bd bl 800c8b8 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800b53e: e01a b.n 800b576 USBD_CtlError(pdev, req); 800b540: 6839 ldr r1, [r7, #0] 800b542: 6878 ldr r0, [r7, #4] 800b544: f001 f94e bl 800c7e4 ret = USBD_FAIL; 800b548: 2302 movs r3, #2 800b54a: 75fb strb r3, [r7, #23] break; 800b54c: e013 b.n 800b576 case USB_REQ_SET_INTERFACE: if (pdev->dev_state != USBD_STATE_CONFIGURED) 800b54e: 687b ldr r3, [r7, #4] 800b550: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800b554: 2b03 cmp r3, #3 800b556: d00d beq.n 800b574 { USBD_CtlError(pdev, req); 800b558: 6839 ldr r1, [r7, #0] 800b55a: 6878 ldr r0, [r7, #4] 800b55c: f001 f942 bl 800c7e4 ret = USBD_FAIL; 800b560: 2302 movs r3, #2 800b562: 75fb strb r3, [r7, #23] } break; 800b564: e006 b.n 800b574 default: USBD_CtlError(pdev, req); 800b566: 6839 ldr r1, [r7, #0] 800b568: 6878 ldr r0, [r7, #4] 800b56a: f001 f93b bl 800c7e4 ret = USBD_FAIL; 800b56e: 2302 movs r3, #2 800b570: 75fb strb r3, [r7, #23] break; 800b572: e000 b.n 800b576 break; 800b574: bf00 nop } break; 800b576: e006 b.n 800b586 default: USBD_CtlError(pdev, req); 800b578: 6839 ldr r1, [r7, #0] 800b57a: 6878 ldr r0, [r7, #4] 800b57c: f001 f932 bl 800c7e4 ret = USBD_FAIL; 800b580: 2302 movs r3, #2 800b582: 75fb strb r3, [r7, #23] break; 800b584: bf00 nop } return ret; 800b586: 7dfb ldrb r3, [r7, #23] } 800b588: 4618 mov r0, r3 800b58a: 3718 adds r7, #24 800b58c: 46bd mov sp, r7 800b58e: bd80 pop {r7, pc} 0800b590 : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { 800b590: b580 push {r7, lr} 800b592: b084 sub sp, #16 800b594: af00 add r7, sp, #0 800b596: 6078 str r0, [r7, #4] 800b598: 460b mov r3, r1 800b59a: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData; 800b59c: 687b ldr r3, [r7, #4] 800b59e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b5a2: 60fb str r3, [r7, #12] PCD_HandleTypeDef *hpcd = pdev->pData; 800b5a4: 687b ldr r3, [r7, #4] 800b5a6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b5aa: 60bb str r3, [r7, #8] if (pdev->pClassData != NULL) 800b5ac: 687b ldr r3, [r7, #4] 800b5ae: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b5b2: 2b00 cmp r3, #0 800b5b4: d03a beq.n 800b62c { if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U)) 800b5b6: 78fa ldrb r2, [r7, #3] 800b5b8: 6879 ldr r1, [r7, #4] 800b5ba: 4613 mov r3, r2 800b5bc: 009b lsls r3, r3, #2 800b5be: 4413 add r3, r2 800b5c0: 009b lsls r3, r3, #2 800b5c2: 440b add r3, r1 800b5c4: 331c adds r3, #28 800b5c6: 681b ldr r3, [r3, #0] 800b5c8: 2b00 cmp r3, #0 800b5ca: d029 beq.n 800b620 800b5cc: 78fa ldrb r2, [r7, #3] 800b5ce: 6879 ldr r1, [r7, #4] 800b5d0: 4613 mov r3, r2 800b5d2: 009b lsls r3, r3, #2 800b5d4: 4413 add r3, r2 800b5d6: 009b lsls r3, r3, #2 800b5d8: 440b add r3, r1 800b5da: 331c adds r3, #28 800b5dc: 681a ldr r2, [r3, #0] 800b5de: 78f9 ldrb r1, [r7, #3] 800b5e0: 68b8 ldr r0, [r7, #8] 800b5e2: 460b mov r3, r1 800b5e4: 009b lsls r3, r3, #2 800b5e6: 440b add r3, r1 800b5e8: 00db lsls r3, r3, #3 800b5ea: 4403 add r3, r0 800b5ec: 3320 adds r3, #32 800b5ee: 681b ldr r3, [r3, #0] 800b5f0: fbb2 f1f3 udiv r1, r2, r3 800b5f4: fb01 f303 mul.w r3, r1, r3 800b5f8: 1ad3 subs r3, r2, r3 800b5fa: 2b00 cmp r3, #0 800b5fc: d110 bne.n 800b620 { /* Update the packet total length */ pdev->ep_in[epnum].total_length = 0U; 800b5fe: 78fa ldrb r2, [r7, #3] 800b600: 6879 ldr r1, [r7, #4] 800b602: 4613 mov r3, r2 800b604: 009b lsls r3, r3, #2 800b606: 4413 add r3, r2 800b608: 009b lsls r3, r3, #2 800b60a: 440b add r3, r1 800b60c: 331c adds r3, #28 800b60e: 2200 movs r2, #0 800b610: 601a str r2, [r3, #0] /* Send ZLP */ USBD_LL_Transmit(pdev, epnum, NULL, 0U); 800b612: 78f9 ldrb r1, [r7, #3] 800b614: 2300 movs r3, #0 800b616: 2200 movs r2, #0 800b618: 6878 ldr r0, [r7, #4] 800b61a: f001 fe45 bl 800d2a8 800b61e: e003 b.n 800b628 } else { hcdc->TxState = 0U; 800b620: 68fb ldr r3, [r7, #12] 800b622: 2200 movs r2, #0 800b624: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } return USBD_OK; 800b628: 2300 movs r3, #0 800b62a: e000 b.n 800b62e } else { return USBD_FAIL; 800b62c: 2302 movs r3, #2 } } 800b62e: 4618 mov r0, r3 800b630: 3710 adds r7, #16 800b632: 46bd mov sp, r7 800b634: bd80 pop {r7, pc} 0800b636 : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum) { 800b636: b580 push {r7, lr} 800b638: b084 sub sp, #16 800b63a: af00 add r7, sp, #0 800b63c: 6078 str r0, [r7, #4] 800b63e: 460b mov r3, r1 800b640: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b642: 687b ldr r3, [r7, #4] 800b644: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b648: 60fb str r3, [r7, #12] /* Get the received data length */ hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum); 800b64a: 78fb ldrb r3, [r7, #3] 800b64c: 4619 mov r1, r3 800b64e: 6878 ldr r0, [r7, #4] 800b650: f001 fe70 bl 800d334 800b654: 4602 mov r2, r0 800b656: 68fb ldr r3, [r7, #12] 800b658: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* USB data will be immediately processed, this allow next USB traffic being NAKed till the end of the application Xfer */ if (pdev->pClassData != NULL) 800b65c: 687b ldr r3, [r7, #4] 800b65e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b662: 2b00 cmp r3, #0 800b664: d00d beq.n 800b682 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength); 800b666: 687b ldr r3, [r7, #4] 800b668: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b66c: 68db ldr r3, [r3, #12] 800b66e: 68fa ldr r2, [r7, #12] 800b670: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204 800b674: 68fa ldr r2, [r7, #12] 800b676: f502 7203 add.w r2, r2, #524 @ 0x20c 800b67a: 4611 mov r1, r2 800b67c: 4798 blx r3 return USBD_OK; 800b67e: 2300 movs r3, #0 800b680: e000 b.n 800b684 } else { return USBD_FAIL; 800b682: 2302 movs r3, #2 } } 800b684: 4618 mov r0, r3 800b686: 3710 adds r7, #16 800b688: 46bd mov sp, r7 800b68a: bd80 pop {r7, pc} 0800b68c : * Handle EP0 Rx Ready event * @param pdev: device instance * @retval status */ static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev) { 800b68c: b580 push {r7, lr} 800b68e: b084 sub sp, #16 800b690: af00 add r7, sp, #0 800b692: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b694: 687b ldr r3, [r7, #4] 800b696: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b69a: 60fb str r3, [r7, #12] if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU)) 800b69c: 687b ldr r3, [r7, #4] 800b69e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b6a2: 2b00 cmp r3, #0 800b6a4: d014 beq.n 800b6d0 800b6a6: 68fb ldr r3, [r7, #12] 800b6a8: f893 3200 ldrb.w r3, [r3, #512] @ 0x200 800b6ac: 2bff cmp r3, #255 @ 0xff 800b6ae: d00f beq.n 800b6d0 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 800b6b0: 687b ldr r3, [r7, #4] 800b6b2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b6b6: 689b ldr r3, [r3, #8] 800b6b8: 68fa ldr r2, [r7, #12] 800b6ba: f892 0200 ldrb.w r0, [r2, #512] @ 0x200 (uint8_t *)(void *)hcdc->data, 800b6be: 68f9 ldr r1, [r7, #12] (uint16_t)hcdc->CmdLength); 800b6c0: 68fa ldr r2, [r7, #12] 800b6c2: f892 2201 ldrb.w r2, [r2, #513] @ 0x201 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 800b6c6: 4798 blx r3 hcdc->CmdOpCode = 0xFFU; 800b6c8: 68fb ldr r3, [r7, #12] 800b6ca: 22ff movs r2, #255 @ 0xff 800b6cc: f883 2200 strb.w r2, [r3, #512] @ 0x200 } return USBD_OK; 800b6d0: 2300 movs r3, #0 } 800b6d2: 4618 mov r0, r3 800b6d4: 3710 adds r7, #16 800b6d6: 46bd mov sp, r7 800b6d8: bd80 pop {r7, pc} ... 0800b6dc : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length) { 800b6dc: b480 push {r7} 800b6de: b083 sub sp, #12 800b6e0: af00 add r7, sp, #0 800b6e2: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgFSDesc); 800b6e4: 687b ldr r3, [r7, #4] 800b6e6: 2243 movs r2, #67 @ 0x43 800b6e8: 801a strh r2, [r3, #0] return USBD_CDC_CfgFSDesc; 800b6ea: 4b03 ldr r3, [pc, #12] @ (800b6f8 ) } 800b6ec: 4618 mov r0, r3 800b6ee: 370c adds r7, #12 800b6f0: 46bd mov sp, r7 800b6f2: bc80 pop {r7} 800b6f4: 4770 bx lr 800b6f6: bf00 nop 800b6f8: 2000009c .word 0x2000009c 0800b6fc : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length) { 800b6fc: b480 push {r7} 800b6fe: b083 sub sp, #12 800b700: af00 add r7, sp, #0 800b702: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgHSDesc); 800b704: 687b ldr r3, [r7, #4] 800b706: 2243 movs r2, #67 @ 0x43 800b708: 801a strh r2, [r3, #0] return USBD_CDC_CfgHSDesc; 800b70a: 4b03 ldr r3, [pc, #12] @ (800b718 ) } 800b70c: 4618 mov r0, r3 800b70e: 370c adds r7, #12 800b710: 46bd mov sp, r7 800b712: bc80 pop {r7} 800b714: 4770 bx lr 800b716: bf00 nop 800b718: 20000058 .word 0x20000058 0800b71c : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length) { 800b71c: b480 push {r7} 800b71e: b083 sub sp, #12 800b720: af00 add r7, sp, #0 800b722: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_OtherSpeedCfgDesc); 800b724: 687b ldr r3, [r7, #4] 800b726: 2243 movs r2, #67 @ 0x43 800b728: 801a strh r2, [r3, #0] return USBD_CDC_OtherSpeedCfgDesc; 800b72a: 4b03 ldr r3, [pc, #12] @ (800b738 ) } 800b72c: 4618 mov r0, r3 800b72e: 370c adds r7, #12 800b730: 46bd mov sp, r7 800b732: bc80 pop {r7} 800b734: 4770 bx lr 800b736: bf00 nop 800b738: 200000e0 .word 0x200000e0 0800b73c : * return Device Qualifier descriptor * @param length : pointer data length * @retval pointer to descriptor buffer */ uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length) { 800b73c: b480 push {r7} 800b73e: b083 sub sp, #12 800b740: af00 add r7, sp, #0 800b742: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_DeviceQualifierDesc); 800b744: 687b ldr r3, [r7, #4] 800b746: 220a movs r2, #10 800b748: 801a strh r2, [r3, #0] return USBD_CDC_DeviceQualifierDesc; 800b74a: 4b03 ldr r3, [pc, #12] @ (800b758 ) } 800b74c: 4618 mov r0, r3 800b74e: 370c adds r7, #12 800b750: 46bd mov sp, r7 800b752: bc80 pop {r7} 800b754: 4770 bx lr 800b756: bf00 nop 800b758: 20000014 .word 0x20000014 0800b75c : * @param fops: CD Interface callback * @retval status */ uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev, USBD_CDC_ItfTypeDef *fops) { 800b75c: b480 push {r7} 800b75e: b085 sub sp, #20 800b760: af00 add r7, sp, #0 800b762: 6078 str r0, [r7, #4] 800b764: 6039 str r1, [r7, #0] uint8_t ret = USBD_FAIL; 800b766: 2302 movs r3, #2 800b768: 73fb strb r3, [r7, #15] if (fops != NULL) 800b76a: 683b ldr r3, [r7, #0] 800b76c: 2b00 cmp r3, #0 800b76e: d005 beq.n 800b77c { pdev->pUserData = fops; 800b770: 687b ldr r3, [r7, #4] 800b772: 683a ldr r2, [r7, #0] 800b774: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc ret = USBD_OK; 800b778: 2300 movs r3, #0 800b77a: 73fb strb r3, [r7, #15] } return ret; 800b77c: 7bfb ldrb r3, [r7, #15] } 800b77e: 4618 mov r0, r3 800b780: 3714 adds r7, #20 800b782: 46bd mov sp, r7 800b784: bc80 pop {r7} 800b786: 4770 bx lr 0800b788 : * @retval status */ uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff, uint16_t length) { 800b788: b480 push {r7} 800b78a: b087 sub sp, #28 800b78c: af00 add r7, sp, #0 800b78e: 60f8 str r0, [r7, #12] 800b790: 60b9 str r1, [r7, #8] 800b792: 4613 mov r3, r2 800b794: 80fb strh r3, [r7, #6] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b796: 68fb ldr r3, [r7, #12] 800b798: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b79c: 617b str r3, [r7, #20] hcdc->TxBuffer = pbuff; 800b79e: 697b ldr r3, [r7, #20] 800b7a0: 68ba ldr r2, [r7, #8] 800b7a2: f8c3 2208 str.w r2, [r3, #520] @ 0x208 hcdc->TxLength = length; 800b7a6: 88fa ldrh r2, [r7, #6] 800b7a8: 697b ldr r3, [r7, #20] 800b7aa: f8c3 2210 str.w r2, [r3, #528] @ 0x210 return USBD_OK; 800b7ae: 2300 movs r3, #0 } 800b7b0: 4618 mov r0, r3 800b7b2: 371c adds r7, #28 800b7b4: 46bd mov sp, r7 800b7b6: bc80 pop {r7} 800b7b8: 4770 bx lr 0800b7ba : * @param pbuff: Rx Buffer * @retval status */ uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff) { 800b7ba: b480 push {r7} 800b7bc: b085 sub sp, #20 800b7be: af00 add r7, sp, #0 800b7c0: 6078 str r0, [r7, #4] 800b7c2: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b7c4: 687b ldr r3, [r7, #4] 800b7c6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b7ca: 60fb str r3, [r7, #12] hcdc->RxBuffer = pbuff; 800b7cc: 68fb ldr r3, [r7, #12] 800b7ce: 683a ldr r2, [r7, #0] 800b7d0: f8c3 2204 str.w r2, [r3, #516] @ 0x204 return USBD_OK; 800b7d4: 2300 movs r3, #0 } 800b7d6: 4618 mov r0, r3 800b7d8: 3714 adds r7, #20 800b7da: 46bd mov sp, r7 800b7dc: bc80 pop {r7} 800b7de: 4770 bx lr 0800b7e0 : * Transmit packet on IN endpoint * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev) { 800b7e0: b580 push {r7, lr} 800b7e2: b084 sub sp, #16 800b7e4: af00 add r7, sp, #0 800b7e6: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b7e8: 687b ldr r3, [r7, #4] 800b7ea: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b7ee: 60fb str r3, [r7, #12] if (pdev->pClassData != NULL) 800b7f0: 687b ldr r3, [r7, #4] 800b7f2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b7f6: 2b00 cmp r3, #0 800b7f8: d01c beq.n 800b834 { if (hcdc->TxState == 0U) 800b7fa: 68fb ldr r3, [r7, #12] 800b7fc: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 800b800: 2b00 cmp r3, #0 800b802: d115 bne.n 800b830 { /* Tx Transfer in progress */ hcdc->TxState = 1U; 800b804: 68fb ldr r3, [r7, #12] 800b806: 2201 movs r2, #1 800b808: f8c3 2214 str.w r2, [r3, #532] @ 0x214 /* Update the packet total length */ pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength; 800b80c: 68fb ldr r3, [r7, #12] 800b80e: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210 800b812: 687b ldr r3, [r7, #4] 800b814: 631a str r2, [r3, #48] @ 0x30 /* Transmit next packet */ USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 800b816: 68fb ldr r3, [r7, #12] 800b818: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208 (uint16_t)hcdc->TxLength); 800b81c: 68fb ldr r3, [r7, #12] 800b81e: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210 USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 800b822: b29b uxth r3, r3 800b824: 2181 movs r1, #129 @ 0x81 800b826: 6878 ldr r0, [r7, #4] 800b828: f001 fd3e bl 800d2a8 return USBD_OK; 800b82c: 2300 movs r3, #0 800b82e: e002 b.n 800b836 } else { return USBD_BUSY; 800b830: 2301 movs r3, #1 800b832: e000 b.n 800b836 } } else { return USBD_FAIL; 800b834: 2302 movs r3, #2 } } 800b836: 4618 mov r0, r3 800b838: 3710 adds r7, #16 800b83a: 46bd mov sp, r7 800b83c: bd80 pop {r7, pc} 0800b83e : * prepare OUT Endpoint for reception * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev) { 800b83e: b580 push {r7, lr} 800b840: b084 sub sp, #16 800b842: af00 add r7, sp, #0 800b844: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b846: 687b ldr r3, [r7, #4] 800b848: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b84c: 60fb str r3, [r7, #12] /* Suspend or Resume USB Out process */ if (pdev->pClassData != NULL) 800b84e: 687b ldr r3, [r7, #4] 800b850: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b854: 2b00 cmp r3, #0 800b856: d017 beq.n 800b888 { if (pdev->dev_speed == USBD_SPEED_HIGH) 800b858: 687b ldr r3, [r7, #4] 800b85a: 7c1b ldrb r3, [r3, #16] 800b85c: 2b00 cmp r3, #0 800b85e: d109 bne.n 800b874 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 800b860: 68fb ldr r3, [r7, #12] 800b862: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800b866: f44f 7300 mov.w r3, #512 @ 0x200 800b86a: 2101 movs r1, #1 800b86c: 6878 ldr r0, [r7, #4] 800b86e: f001 fd3e bl 800d2ee 800b872: e007 b.n 800b884 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 800b874: 68fb ldr r3, [r7, #12] 800b876: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800b87a: 2340 movs r3, #64 @ 0x40 800b87c: 2101 movs r1, #1 800b87e: 6878 ldr r0, [r7, #4] 800b880: f001 fd35 bl 800d2ee CDC_OUT_EP, hcdc->RxBuffer, CDC_DATA_FS_OUT_PACKET_SIZE); } return USBD_OK; 800b884: 2300 movs r3, #0 800b886: e000 b.n 800b88a } else { return USBD_FAIL; 800b888: 2302 movs r3, #2 } } 800b88a: 4618 mov r0, r3 800b88c: 3710 adds r7, #16 800b88e: 46bd mov sp, r7 800b890: bd80 pop {r7, pc} 0800b892 : * @param id: Low level core index * @retval None */ USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) { 800b892: b580 push {r7, lr} 800b894: b084 sub sp, #16 800b896: af00 add r7, sp, #0 800b898: 60f8 str r0, [r7, #12] 800b89a: 60b9 str r1, [r7, #8] 800b89c: 4613 mov r3, r2 800b89e: 71fb strb r3, [r7, #7] /* Check whether the USB Host handle is valid */ if (pdev == NULL) 800b8a0: 68fb ldr r3, [r7, #12] 800b8a2: 2b00 cmp r3, #0 800b8a4: d101 bne.n 800b8aa { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Device handle"); #endif return USBD_FAIL; 800b8a6: 2302 movs r3, #2 800b8a8: e01a b.n 800b8e0 } /* Unlink previous class*/ if (pdev->pClass != NULL) 800b8aa: 68fb ldr r3, [r7, #12] 800b8ac: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800b8b0: 2b00 cmp r3, #0 800b8b2: d003 beq.n 800b8bc { pdev->pClass = NULL; 800b8b4: 68fb ldr r3, [r7, #12] 800b8b6: 2200 movs r2, #0 800b8b8: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 } /* Assign USBD Descriptors */ if (pdesc != NULL) 800b8bc: 68bb ldr r3, [r7, #8] 800b8be: 2b00 cmp r3, #0 800b8c0: d003 beq.n 800b8ca { pdev->pDesc = pdesc; 800b8c2: 68fb ldr r3, [r7, #12] 800b8c4: 68ba ldr r2, [r7, #8] 800b8c6: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0 } /* Set Device initial State */ pdev->dev_state = USBD_STATE_DEFAULT; 800b8ca: 68fb ldr r3, [r7, #12] 800b8cc: 2201 movs r2, #1 800b8ce: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->id = id; 800b8d2: 68fb ldr r3, [r7, #12] 800b8d4: 79fa ldrb r2, [r7, #7] 800b8d6: 701a strb r2, [r3, #0] /* Initialize low level driver */ USBD_LL_Init(pdev); 800b8d8: 68f8 ldr r0, [r7, #12] 800b8da: f001 fba3 bl 800d024 return USBD_OK; 800b8de: 2300 movs r3, #0 } 800b8e0: 4618 mov r0, r3 800b8e2: 3710 adds r7, #16 800b8e4: 46bd mov sp, r7 800b8e6: bd80 pop {r7, pc} 0800b8e8 : * @param pDevice : Device Handle * @param pclass: Class handle * @retval USBD Status */ USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) { 800b8e8: b480 push {r7} 800b8ea: b085 sub sp, #20 800b8ec: af00 add r7, sp, #0 800b8ee: 6078 str r0, [r7, #4] 800b8f0: 6039 str r1, [r7, #0] USBD_StatusTypeDef status = USBD_OK; 800b8f2: 2300 movs r3, #0 800b8f4: 73fb strb r3, [r7, #15] if (pclass != NULL) 800b8f6: 683b ldr r3, [r7, #0] 800b8f8: 2b00 cmp r3, #0 800b8fa: d006 beq.n 800b90a { /* link the class to the USB Device handle */ pdev->pClass = pclass; 800b8fc: 687b ldr r3, [r7, #4] 800b8fe: 683a ldr r2, [r7, #0] 800b900: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 status = USBD_OK; 800b904: 2300 movs r3, #0 800b906: 73fb strb r3, [r7, #15] 800b908: e001 b.n 800b90e else { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Class handle"); #endif status = USBD_FAIL; 800b90a: 2302 movs r3, #2 800b90c: 73fb strb r3, [r7, #15] } return status; 800b90e: 7bfb ldrb r3, [r7, #15] } 800b910: 4618 mov r0, r3 800b912: 3714 adds r7, #20 800b914: 46bd mov sp, r7 800b916: bc80 pop {r7} 800b918: 4770 bx lr 0800b91a : * Start the USB Device Core. * @param pdev: Device Handle * @retval USBD Status */ USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev) { 800b91a: b580 push {r7, lr} 800b91c: b082 sub sp, #8 800b91e: af00 add r7, sp, #0 800b920: 6078 str r0, [r7, #4] /* Start the low level driver */ USBD_LL_Start(pdev); 800b922: 6878 ldr r0, [r7, #4] 800b924: f001 fbd8 bl 800d0d8 return USBD_OK; 800b928: 2300 movs r3, #0 } 800b92a: 4618 mov r0, r3 800b92c: 3708 adds r7, #8 800b92e: 46bd mov sp, r7 800b930: bd80 pop {r7, pc} 0800b932 : * Launch test mode process * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev) { 800b932: b480 push {r7} 800b934: b083 sub sp, #12 800b936: af00 add r7, sp, #0 800b938: 6078 str r0, [r7, #4] /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 800b93a: 2300 movs r3, #0 } 800b93c: 4618 mov r0, r3 800b93e: 370c adds r7, #12 800b940: 46bd mov sp, r7 800b942: bc80 pop {r7} 800b944: 4770 bx lr 0800b946 : * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800b946: b580 push {r7, lr} 800b948: b084 sub sp, #16 800b94a: af00 add r7, sp, #0 800b94c: 6078 str r0, [r7, #4] 800b94e: 460b mov r3, r1 800b950: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_FAIL; 800b952: 2302 movs r3, #2 800b954: 73fb strb r3, [r7, #15] if (pdev->pClass != NULL) 800b956: 687b ldr r3, [r7, #4] 800b958: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800b95c: 2b00 cmp r3, #0 800b95e: d00c beq.n 800b97a { /* Set configuration and Start the Class*/ if (pdev->pClass->Init(pdev, cfgidx) == 0U) 800b960: 687b ldr r3, [r7, #4] 800b962: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800b966: 681b ldr r3, [r3, #0] 800b968: 78fa ldrb r2, [r7, #3] 800b96a: 4611 mov r1, r2 800b96c: 6878 ldr r0, [r7, #4] 800b96e: 4798 blx r3 800b970: 4603 mov r3, r0 800b972: 2b00 cmp r3, #0 800b974: d101 bne.n 800b97a { ret = USBD_OK; 800b976: 2300 movs r3, #0 800b978: 73fb strb r3, [r7, #15] } } return ret; 800b97a: 7bfb ldrb r3, [r7, #15] } 800b97c: 4618 mov r0, r3 800b97e: 3710 adds r7, #16 800b980: 46bd mov sp, r7 800b982: bd80 pop {r7, pc} 0800b984 : * @param pdev: device instance * @param cfgidx: configuration index * @retval status: USBD_StatusTypeDef */ USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800b984: b580 push {r7, lr} 800b986: b082 sub sp, #8 800b988: af00 add r7, sp, #0 800b98a: 6078 str r0, [r7, #4] 800b98c: 460b mov r3, r1 800b98e: 70fb strb r3, [r7, #3] /* Clear configuration and De-initialize the Class process*/ pdev->pClass->DeInit(pdev, cfgidx); 800b990: 687b ldr r3, [r7, #4] 800b992: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800b996: 685b ldr r3, [r3, #4] 800b998: 78fa ldrb r2, [r7, #3] 800b99a: 4611 mov r1, r2 800b99c: 6878 ldr r0, [r7, #4] 800b99e: 4798 blx r3 return USBD_OK; 800b9a0: 2300 movs r3, #0 } 800b9a2: 4618 mov r0, r3 800b9a4: 3708 adds r7, #8 800b9a6: 46bd mov sp, r7 800b9a8: bd80 pop {r7, pc} 0800b9aa : * Handle the setup stage * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) { 800b9aa: b580 push {r7, lr} 800b9ac: b082 sub sp, #8 800b9ae: af00 add r7, sp, #0 800b9b0: 6078 str r0, [r7, #4] 800b9b2: 6039 str r1, [r7, #0] USBD_ParseSetupRequest(&pdev->request, psetup); 800b9b4: 687b ldr r3, [r7, #4] 800b9b6: f503 732a add.w r3, r3, #680 @ 0x2a8 800b9ba: 6839 ldr r1, [r7, #0] 800b9bc: 4618 mov r0, r3 800b9be: f000 fed8 bl 800c772 pdev->ep0_state = USBD_EP0_SETUP; 800b9c2: 687b ldr r3, [r7, #4] 800b9c4: 2201 movs r2, #1 800b9c6: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep0_data_len = pdev->request.wLength; 800b9ca: 687b ldr r3, [r7, #4] 800b9cc: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 800b9d0: 461a mov r2, r3 800b9d2: 687b ldr r3, [r7, #4] 800b9d4: f8c3 2298 str.w r2, [r3, #664] @ 0x298 switch (pdev->request.bmRequest & 0x1FU) 800b9d8: 687b ldr r3, [r7, #4] 800b9da: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 800b9de: f003 031f and.w r3, r3, #31 800b9e2: 2b02 cmp r3, #2 800b9e4: d016 beq.n 800ba14 800b9e6: 2b02 cmp r3, #2 800b9e8: d81c bhi.n 800ba24 800b9ea: 2b00 cmp r3, #0 800b9ec: d002 beq.n 800b9f4 800b9ee: 2b01 cmp r3, #1 800b9f0: d008 beq.n 800ba04 800b9f2: e017 b.n 800ba24 { case USB_REQ_RECIPIENT_DEVICE: USBD_StdDevReq(pdev, &pdev->request); 800b9f4: 687b ldr r3, [r7, #4] 800b9f6: f503 732a add.w r3, r3, #680 @ 0x2a8 800b9fa: 4619 mov r1, r3 800b9fc: 6878 ldr r0, [r7, #4] 800b9fe: f000 f9cb bl 800bd98 break; 800ba02: e01a b.n 800ba3a case USB_REQ_RECIPIENT_INTERFACE: USBD_StdItfReq(pdev, &pdev->request); 800ba04: 687b ldr r3, [r7, #4] 800ba06: f503 732a add.w r3, r3, #680 @ 0x2a8 800ba0a: 4619 mov r1, r3 800ba0c: 6878 ldr r0, [r7, #4] 800ba0e: f000 fa2d bl 800be6c break; 800ba12: e012 b.n 800ba3a case USB_REQ_RECIPIENT_ENDPOINT: USBD_StdEPReq(pdev, &pdev->request); 800ba14: 687b ldr r3, [r7, #4] 800ba16: f503 732a add.w r3, r3, #680 @ 0x2a8 800ba1a: 4619 mov r1, r3 800ba1c: 6878 ldr r0, [r7, #4] 800ba1e: f000 fa6d bl 800befc break; 800ba22: e00a b.n 800ba3a default: USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U)); 800ba24: 687b ldr r3, [r7, #4] 800ba26: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 800ba2a: f023 037f bic.w r3, r3, #127 @ 0x7f 800ba2e: b2db uxtb r3, r3 800ba30: 4619 mov r1, r3 800ba32: 6878 ldr r0, [r7, #4] 800ba34: f001 fbb0 bl 800d198 break; 800ba38: bf00 nop } return USBD_OK; 800ba3a: 2300 movs r3, #0 } 800ba3c: 4618 mov r0, r3 800ba3e: 3708 adds r7, #8 800ba40: 46bd mov sp, r7 800ba42: bd80 pop {r7, pc} 0800ba44 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 800ba44: b580 push {r7, lr} 800ba46: b086 sub sp, #24 800ba48: af00 add r7, sp, #0 800ba4a: 60f8 str r0, [r7, #12] 800ba4c: 460b mov r3, r1 800ba4e: 607a str r2, [r7, #4] 800ba50: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 800ba52: 7afb ldrb r3, [r7, #11] 800ba54: 2b00 cmp r3, #0 800ba56: d14b bne.n 800baf0 { pep = &pdev->ep_out[0]; 800ba58: 68fb ldr r3, [r7, #12] 800ba5a: f503 73aa add.w r3, r3, #340 @ 0x154 800ba5e: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_OUT) 800ba60: 68fb ldr r3, [r7, #12] 800ba62: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800ba66: 2b03 cmp r3, #3 800ba68: d134 bne.n 800bad4 { if (pep->rem_length > pep->maxpacket) 800ba6a: 697b ldr r3, [r7, #20] 800ba6c: 68da ldr r2, [r3, #12] 800ba6e: 697b ldr r3, [r7, #20] 800ba70: 691b ldr r3, [r3, #16] 800ba72: 429a cmp r2, r3 800ba74: d919 bls.n 800baaa { pep->rem_length -= pep->maxpacket; 800ba76: 697b ldr r3, [r7, #20] 800ba78: 68da ldr r2, [r3, #12] 800ba7a: 697b ldr r3, [r7, #20] 800ba7c: 691b ldr r3, [r3, #16] 800ba7e: 1ad2 subs r2, r2, r3 800ba80: 697b ldr r3, [r7, #20] 800ba82: 60da str r2, [r3, #12] USBD_CtlContinueRx(pdev, pdata, (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800ba84: 697b ldr r3, [r7, #20] 800ba86: 68da ldr r2, [r3, #12] 800ba88: 697b ldr r3, [r7, #20] 800ba8a: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 800ba8c: 429a cmp r2, r3 800ba8e: d203 bcs.n 800ba98 (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800ba90: 697b ldr r3, [r7, #20] 800ba92: 68db ldr r3, [r3, #12] USBD_CtlContinueRx(pdev, pdata, 800ba94: b29b uxth r3, r3 800ba96: e002 b.n 800ba9e (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800ba98: 697b ldr r3, [r7, #20] 800ba9a: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 800ba9c: b29b uxth r3, r3 800ba9e: 461a mov r2, r3 800baa0: 6879 ldr r1, [r7, #4] 800baa2: 68f8 ldr r0, [r7, #12] 800baa4: f000 ff54 bl 800c950 800baa8: e038 b.n 800bb1c } else { if ((pdev->pClass->EP0_RxReady != NULL) && 800baaa: 68fb ldr r3, [r7, #12] 800baac: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bab0: 691b ldr r3, [r3, #16] 800bab2: 2b00 cmp r3, #0 800bab4: d00a beq.n 800bacc (pdev->dev_state == USBD_STATE_CONFIGURED)) 800bab6: 68fb ldr r3, [r7, #12] 800bab8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_RxReady != NULL) && 800babc: 2b03 cmp r3, #3 800babe: d105 bne.n 800bacc { pdev->pClass->EP0_RxReady(pdev); 800bac0: 68fb ldr r3, [r7, #12] 800bac2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bac6: 691b ldr r3, [r3, #16] 800bac8: 68f8 ldr r0, [r7, #12] 800baca: 4798 blx r3 } USBD_CtlSendStatus(pdev); 800bacc: 68f8 ldr r0, [r7, #12] 800bace: f000 ff51 bl 800c974 800bad2: e023 b.n 800bb1c } } else { if (pdev->ep0_state == USBD_EP0_STATUS_OUT) 800bad4: 68fb ldr r3, [r7, #12] 800bad6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800bada: 2b05 cmp r3, #5 800badc: d11e bne.n 800bb1c { /* * STATUS PHASE completed, update ep0_state to idle */ pdev->ep0_state = USBD_EP0_IDLE; 800bade: 68fb ldr r3, [r7, #12] 800bae0: 2200 movs r2, #0 800bae2: f8c3 2294 str.w r2, [r3, #660] @ 0x294 USBD_LL_StallEP(pdev, 0U); 800bae6: 2100 movs r1, #0 800bae8: 68f8 ldr r0, [r7, #12] 800baea: f001 fb55 bl 800d198 800baee: e015 b.n 800bb1c } } } else if ((pdev->pClass->DataOut != NULL) && 800baf0: 68fb ldr r3, [r7, #12] 800baf2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800baf6: 699b ldr r3, [r3, #24] 800baf8: 2b00 cmp r3, #0 800bafa: d00d beq.n 800bb18 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800bafc: 68fb ldr r3, [r7, #12] 800bafe: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataOut != NULL) && 800bb02: 2b03 cmp r3, #3 800bb04: d108 bne.n 800bb18 { pdev->pClass->DataOut(pdev, epnum); 800bb06: 68fb ldr r3, [r7, #12] 800bb08: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bb0c: 699b ldr r3, [r3, #24] 800bb0e: 7afa ldrb r2, [r7, #11] 800bb10: 4611 mov r1, r2 800bb12: 68f8 ldr r0, [r7, #12] 800bb14: 4798 blx r3 800bb16: e001 b.n 800bb1c } else { /* should never be in this condition */ return USBD_FAIL; 800bb18: 2302 movs r3, #2 800bb1a: e000 b.n 800bb1e } return USBD_OK; 800bb1c: 2300 movs r3, #0 } 800bb1e: 4618 mov r0, r3 800bb20: 3718 adds r7, #24 800bb22: 46bd mov sp, r7 800bb24: bd80 pop {r7, pc} 0800bb26 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 800bb26: b580 push {r7, lr} 800bb28: b086 sub sp, #24 800bb2a: af00 add r7, sp, #0 800bb2c: 60f8 str r0, [r7, #12] 800bb2e: 460b mov r3, r1 800bb30: 607a str r2, [r7, #4] 800bb32: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 800bb34: 7afb ldrb r3, [r7, #11] 800bb36: 2b00 cmp r3, #0 800bb38: d17f bne.n 800bc3a { pep = &pdev->ep_in[0]; 800bb3a: 68fb ldr r3, [r7, #12] 800bb3c: 3314 adds r3, #20 800bb3e: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_IN) 800bb40: 68fb ldr r3, [r7, #12] 800bb42: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800bb46: 2b02 cmp r3, #2 800bb48: d15c bne.n 800bc04 { if (pep->rem_length > pep->maxpacket) 800bb4a: 697b ldr r3, [r7, #20] 800bb4c: 68da ldr r2, [r3, #12] 800bb4e: 697b ldr r3, [r7, #20] 800bb50: 691b ldr r3, [r3, #16] 800bb52: 429a cmp r2, r3 800bb54: d915 bls.n 800bb82 { pep->rem_length -= pep->maxpacket; 800bb56: 697b ldr r3, [r7, #20] 800bb58: 68da ldr r2, [r3, #12] 800bb5a: 697b ldr r3, [r7, #20] 800bb5c: 691b ldr r3, [r3, #16] 800bb5e: 1ad2 subs r2, r2, r3 800bb60: 697b ldr r3, [r7, #20] 800bb62: 60da str r2, [r3, #12] USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length); 800bb64: 697b ldr r3, [r7, #20] 800bb66: 68db ldr r3, [r3, #12] 800bb68: b29b uxth r3, r3 800bb6a: 461a mov r2, r3 800bb6c: 6879 ldr r1, [r7, #4] 800bb6e: 68f8 ldr r0, [r7, #12] 800bb70: f000 febe bl 800c8f0 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800bb74: 2300 movs r3, #0 800bb76: 2200 movs r2, #0 800bb78: 2100 movs r1, #0 800bb7a: 68f8 ldr r0, [r7, #12] 800bb7c: f001 fbb7 bl 800d2ee 800bb80: e04e b.n 800bc20 } else { /* last packet is MPS multiple, so send ZLP packet */ if ((pep->total_length % pep->maxpacket == 0U) && 800bb82: 697b ldr r3, [r7, #20] 800bb84: 689b ldr r3, [r3, #8] 800bb86: 697a ldr r2, [r7, #20] 800bb88: 6912 ldr r2, [r2, #16] 800bb8a: fbb3 f1f2 udiv r1, r3, r2 800bb8e: fb01 f202 mul.w r2, r1, r2 800bb92: 1a9b subs r3, r3, r2 800bb94: 2b00 cmp r3, #0 800bb96: d11c bne.n 800bbd2 (pep->total_length >= pep->maxpacket) && 800bb98: 697b ldr r3, [r7, #20] 800bb9a: 689a ldr r2, [r3, #8] 800bb9c: 697b ldr r3, [r7, #20] 800bb9e: 691b ldr r3, [r3, #16] if ((pep->total_length % pep->maxpacket == 0U) && 800bba0: 429a cmp r2, r3 800bba2: d316 bcc.n 800bbd2 (pep->total_length < pdev->ep0_data_len)) 800bba4: 697b ldr r3, [r7, #20] 800bba6: 689a ldr r2, [r3, #8] 800bba8: 68fb ldr r3, [r7, #12] 800bbaa: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298 (pep->total_length >= pep->maxpacket) && 800bbae: 429a cmp r2, r3 800bbb0: d20f bcs.n 800bbd2 { USBD_CtlContinueSendData(pdev, NULL, 0U); 800bbb2: 2200 movs r2, #0 800bbb4: 2100 movs r1, #0 800bbb6: 68f8 ldr r0, [r7, #12] 800bbb8: f000 fe9a bl 800c8f0 pdev->ep0_data_len = 0U; 800bbbc: 68fb ldr r3, [r7, #12] 800bbbe: 2200 movs r2, #0 800bbc0: f8c3 2298 str.w r2, [r3, #664] @ 0x298 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800bbc4: 2300 movs r3, #0 800bbc6: 2200 movs r2, #0 800bbc8: 2100 movs r1, #0 800bbca: 68f8 ldr r0, [r7, #12] 800bbcc: f001 fb8f bl 800d2ee 800bbd0: e026 b.n 800bc20 } else { if ((pdev->pClass->EP0_TxSent != NULL) && 800bbd2: 68fb ldr r3, [r7, #12] 800bbd4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bbd8: 68db ldr r3, [r3, #12] 800bbda: 2b00 cmp r3, #0 800bbdc: d00a beq.n 800bbf4 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800bbde: 68fb ldr r3, [r7, #12] 800bbe0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_TxSent != NULL) && 800bbe4: 2b03 cmp r3, #3 800bbe6: d105 bne.n 800bbf4 { pdev->pClass->EP0_TxSent(pdev); 800bbe8: 68fb ldr r3, [r7, #12] 800bbea: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bbee: 68db ldr r3, [r3, #12] 800bbf0: 68f8 ldr r0, [r7, #12] 800bbf2: 4798 blx r3 } USBD_LL_StallEP(pdev, 0x80U); 800bbf4: 2180 movs r1, #128 @ 0x80 800bbf6: 68f8 ldr r0, [r7, #12] 800bbf8: f001 face bl 800d198 USBD_CtlReceiveStatus(pdev); 800bbfc: 68f8 ldr r0, [r7, #12] 800bbfe: f000 fecc bl 800c99a 800bc02: e00d b.n 800bc20 } } } else { if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 800bc04: 68fb ldr r3, [r7, #12] 800bc06: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800bc0a: 2b04 cmp r3, #4 800bc0c: d004 beq.n 800bc18 (pdev->ep0_state == USBD_EP0_IDLE)) 800bc0e: 68fb ldr r3, [r7, #12] 800bc10: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 800bc14: 2b00 cmp r3, #0 800bc16: d103 bne.n 800bc20 { USBD_LL_StallEP(pdev, 0x80U); 800bc18: 2180 movs r1, #128 @ 0x80 800bc1a: 68f8 ldr r0, [r7, #12] 800bc1c: f001 fabc bl 800d198 } } if (pdev->dev_test_mode == 1U) 800bc20: 68fb ldr r3, [r7, #12] 800bc22: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0 800bc26: 2b01 cmp r3, #1 800bc28: d11d bne.n 800bc66 { USBD_RunTestMode(pdev); 800bc2a: 68f8 ldr r0, [r7, #12] 800bc2c: f7ff fe81 bl 800b932 pdev->dev_test_mode = 0U; 800bc30: 68fb ldr r3, [r7, #12] 800bc32: 2200 movs r2, #0 800bc34: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 800bc38: e015 b.n 800bc66 } } else if ((pdev->pClass->DataIn != NULL) && 800bc3a: 68fb ldr r3, [r7, #12] 800bc3c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bc40: 695b ldr r3, [r3, #20] 800bc42: 2b00 cmp r3, #0 800bc44: d00d beq.n 800bc62 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800bc46: 68fb ldr r3, [r7, #12] 800bc48: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataIn != NULL) && 800bc4c: 2b03 cmp r3, #3 800bc4e: d108 bne.n 800bc62 { pdev->pClass->DataIn(pdev, epnum); 800bc50: 68fb ldr r3, [r7, #12] 800bc52: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bc56: 695b ldr r3, [r3, #20] 800bc58: 7afa ldrb r2, [r7, #11] 800bc5a: 4611 mov r1, r2 800bc5c: 68f8 ldr r0, [r7, #12] 800bc5e: 4798 blx r3 800bc60: e001 b.n 800bc66 } else { /* should never be in this condition */ return USBD_FAIL; 800bc62: 2302 movs r3, #2 800bc64: e000 b.n 800bc68 } return USBD_OK; 800bc66: 2300 movs r3, #0 } 800bc68: 4618 mov r0, r3 800bc6a: 3718 adds r7, #24 800bc6c: 46bd mov sp, r7 800bc6e: bd80 pop {r7, pc} 0800bc70 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) { 800bc70: b580 push {r7, lr} 800bc72: b082 sub sp, #8 800bc74: af00 add r7, sp, #0 800bc76: 6078 str r0, [r7, #4] /* Open EP0 OUT */ USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 800bc78: 2340 movs r3, #64 @ 0x40 800bc7a: 2200 movs r2, #0 800bc7c: 2100 movs r1, #0 800bc7e: 6878 ldr r0, [r7, #4] 800bc80: f001 fa45 bl 800d10e pdev->ep_out[0x00U & 0xFU].is_used = 1U; 800bc84: 687b ldr r3, [r7, #4] 800bc86: 2201 movs r2, #1 800bc88: f8c3 2158 str.w r2, [r3, #344] @ 0x158 pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; 800bc8c: 687b ldr r3, [r7, #4] 800bc8e: 2240 movs r2, #64 @ 0x40 800bc90: f8c3 2164 str.w r2, [r3, #356] @ 0x164 /* Open EP0 IN */ USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 800bc94: 2340 movs r3, #64 @ 0x40 800bc96: 2200 movs r2, #0 800bc98: 2180 movs r1, #128 @ 0x80 800bc9a: 6878 ldr r0, [r7, #4] 800bc9c: f001 fa37 bl 800d10e pdev->ep_in[0x80U & 0xFU].is_used = 1U; 800bca0: 687b ldr r3, [r7, #4] 800bca2: 2201 movs r2, #1 800bca4: 619a str r2, [r3, #24] pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; 800bca6: 687b ldr r3, [r7, #4] 800bca8: 2240 movs r2, #64 @ 0x40 800bcaa: 625a str r2, [r3, #36] @ 0x24 /* Upon Reset call user call back */ pdev->dev_state = USBD_STATE_DEFAULT; 800bcac: 687b ldr r3, [r7, #4] 800bcae: 2201 movs r2, #1 800bcb0: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->ep0_state = USBD_EP0_IDLE; 800bcb4: 687b ldr r3, [r7, #4] 800bcb6: 2200 movs r2, #0 800bcb8: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->dev_config = 0U; 800bcbc: 687b ldr r3, [r7, #4] 800bcbe: 2200 movs r2, #0 800bcc0: 605a str r2, [r3, #4] pdev->dev_remote_wakeup = 0U; 800bcc2: 687b ldr r3, [r7, #4] 800bcc4: 2200 movs r2, #0 800bcc6: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 if (pdev->pClassData) 800bcca: 687b ldr r3, [r7, #4] 800bccc: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800bcd0: 2b00 cmp r3, #0 800bcd2: d009 beq.n 800bce8 { pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config); 800bcd4: 687b ldr r3, [r7, #4] 800bcd6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bcda: 685b ldr r3, [r3, #4] 800bcdc: 687a ldr r2, [r7, #4] 800bcde: 6852 ldr r2, [r2, #4] 800bce0: b2d2 uxtb r2, r2 800bce2: 4611 mov r1, r2 800bce4: 6878 ldr r0, [r7, #4] 800bce6: 4798 blx r3 } return USBD_OK; 800bce8: 2300 movs r3, #0 } 800bcea: 4618 mov r0, r3 800bcec: 3708 adds r7, #8 800bcee: 46bd mov sp, r7 800bcf0: bd80 pop {r7, pc} 0800bcf2 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) { 800bcf2: b480 push {r7} 800bcf4: b083 sub sp, #12 800bcf6: af00 add r7, sp, #0 800bcf8: 6078 str r0, [r7, #4] 800bcfa: 460b mov r3, r1 800bcfc: 70fb strb r3, [r7, #3] pdev->dev_speed = speed; 800bcfe: 687b ldr r3, [r7, #4] 800bd00: 78fa ldrb r2, [r7, #3] 800bd02: 741a strb r2, [r3, #16] return USBD_OK; 800bd04: 2300 movs r3, #0 } 800bd06: 4618 mov r0, r3 800bd08: 370c adds r7, #12 800bd0a: 46bd mov sp, r7 800bd0c: bc80 pop {r7} 800bd0e: 4770 bx lr 0800bd10 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) { 800bd10: b480 push {r7} 800bd12: b083 sub sp, #12 800bd14: af00 add r7, sp, #0 800bd16: 6078 str r0, [r7, #4] pdev->dev_old_state = pdev->dev_state; 800bd18: 687b ldr r3, [r7, #4] 800bd1a: f893 229c ldrb.w r2, [r3, #668] @ 0x29c 800bd1e: 687b ldr r3, [r7, #4] 800bd20: f883 229d strb.w r2, [r3, #669] @ 0x29d pdev->dev_state = USBD_STATE_SUSPENDED; 800bd24: 687b ldr r3, [r7, #4] 800bd26: 2204 movs r2, #4 800bd28: f883 229c strb.w r2, [r3, #668] @ 0x29c return USBD_OK; 800bd2c: 2300 movs r3, #0 } 800bd2e: 4618 mov r0, r3 800bd30: 370c adds r7, #12 800bd32: 46bd mov sp, r7 800bd34: bc80 pop {r7} 800bd36: 4770 bx lr 0800bd38 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) { 800bd38: b480 push {r7} 800bd3a: b083 sub sp, #12 800bd3c: af00 add r7, sp, #0 800bd3e: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_SUSPENDED) 800bd40: 687b ldr r3, [r7, #4] 800bd42: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800bd46: 2b04 cmp r3, #4 800bd48: d105 bne.n 800bd56 { pdev->dev_state = pdev->dev_old_state; 800bd4a: 687b ldr r3, [r7, #4] 800bd4c: f893 229d ldrb.w r2, [r3, #669] @ 0x29d 800bd50: 687b ldr r3, [r7, #4] 800bd52: f883 229c strb.w r2, [r3, #668] @ 0x29c } return USBD_OK; 800bd56: 2300 movs r3, #0 } 800bd58: 4618 mov r0, r3 800bd5a: 370c adds r7, #12 800bd5c: 46bd mov sp, r7 800bd5e: bc80 pop {r7} 800bd60: 4770 bx lr 0800bd62 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) { 800bd62: b580 push {r7, lr} 800bd64: b082 sub sp, #8 800bd66: af00 add r7, sp, #0 800bd68: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_CONFIGURED) 800bd6a: 687b ldr r3, [r7, #4] 800bd6c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800bd70: 2b03 cmp r3, #3 800bd72: d10b bne.n 800bd8c { if (pdev->pClass->SOF != NULL) 800bd74: 687b ldr r3, [r7, #4] 800bd76: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bd7a: 69db ldr r3, [r3, #28] 800bd7c: 2b00 cmp r3, #0 800bd7e: d005 beq.n 800bd8c { pdev->pClass->SOF(pdev); 800bd80: 687b ldr r3, [r7, #4] 800bd82: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bd86: 69db ldr r3, [r3, #28] 800bd88: 6878 ldr r0, [r7, #4] 800bd8a: 4798 blx r3 } } return USBD_OK; 800bd8c: 2300 movs r3, #0 } 800bd8e: 4618 mov r0, r3 800bd90: 3708 adds r7, #8 800bd92: 46bd mov sp, r7 800bd94: bd80 pop {r7, pc} ... 0800bd98 : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800bd98: b580 push {r7, lr} 800bd9a: b084 sub sp, #16 800bd9c: af00 add r7, sp, #0 800bd9e: 6078 str r0, [r7, #4] 800bda0: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800bda2: 2300 movs r3, #0 800bda4: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800bda6: 683b ldr r3, [r7, #0] 800bda8: 781b ldrb r3, [r3, #0] 800bdaa: f003 0360 and.w r3, r3, #96 @ 0x60 800bdae: 2b40 cmp r3, #64 @ 0x40 800bdb0: d005 beq.n 800bdbe 800bdb2: 2b40 cmp r3, #64 @ 0x40 800bdb4: d84f bhi.n 800be56 800bdb6: 2b00 cmp r3, #0 800bdb8: d009 beq.n 800bdce 800bdba: 2b20 cmp r3, #32 800bdbc: d14b bne.n 800be56 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 800bdbe: 687b ldr r3, [r7, #4] 800bdc0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bdc4: 689b ldr r3, [r3, #8] 800bdc6: 6839 ldr r1, [r7, #0] 800bdc8: 6878 ldr r0, [r7, #4] 800bdca: 4798 blx r3 break; 800bdcc: e048 b.n 800be60 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800bdce: 683b ldr r3, [r7, #0] 800bdd0: 785b ldrb r3, [r3, #1] 800bdd2: 2b09 cmp r3, #9 800bdd4: d839 bhi.n 800be4a 800bdd6: a201 add r2, pc, #4 @ (adr r2, 800bddc ) 800bdd8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800bddc: 0800be2d .word 0x0800be2d 800bde0: 0800be41 .word 0x0800be41 800bde4: 0800be4b .word 0x0800be4b 800bde8: 0800be37 .word 0x0800be37 800bdec: 0800be4b .word 0x0800be4b 800bdf0: 0800be0f .word 0x0800be0f 800bdf4: 0800be05 .word 0x0800be05 800bdf8: 0800be4b .word 0x0800be4b 800bdfc: 0800be23 .word 0x0800be23 800be00: 0800be19 .word 0x0800be19 { case USB_REQ_GET_DESCRIPTOR: USBD_GetDescriptor(pdev, req); 800be04: 6839 ldr r1, [r7, #0] 800be06: 6878 ldr r0, [r7, #4] 800be08: f000 f9dc bl 800c1c4 break; 800be0c: e022 b.n 800be54 case USB_REQ_SET_ADDRESS: USBD_SetAddress(pdev, req); 800be0e: 6839 ldr r1, [r7, #0] 800be10: 6878 ldr r0, [r7, #4] 800be12: f000 fb3f bl 800c494 break; 800be16: e01d b.n 800be54 case USB_REQ_SET_CONFIGURATION: USBD_SetConfig(pdev, req); 800be18: 6839 ldr r1, [r7, #0] 800be1a: 6878 ldr r0, [r7, #4] 800be1c: f000 fb7e bl 800c51c break; 800be20: e018 b.n 800be54 case USB_REQ_GET_CONFIGURATION: USBD_GetConfig(pdev, req); 800be22: 6839 ldr r1, [r7, #0] 800be24: 6878 ldr r0, [r7, #4] 800be26: f000 fc07 bl 800c638 break; 800be2a: e013 b.n 800be54 case USB_REQ_GET_STATUS: USBD_GetStatus(pdev, req); 800be2c: 6839 ldr r1, [r7, #0] 800be2e: 6878 ldr r0, [r7, #4] 800be30: f000 fc37 bl 800c6a2 break; 800be34: e00e b.n 800be54 case USB_REQ_SET_FEATURE: USBD_SetFeature(pdev, req); 800be36: 6839 ldr r1, [r7, #0] 800be38: 6878 ldr r0, [r7, #4] 800be3a: f000 fc65 bl 800c708 break; 800be3e: e009 b.n 800be54 case USB_REQ_CLEAR_FEATURE: USBD_ClrFeature(pdev, req); 800be40: 6839 ldr r1, [r7, #0] 800be42: 6878 ldr r0, [r7, #4] 800be44: f000 fc74 bl 800c730 break; 800be48: e004 b.n 800be54 default: USBD_CtlError(pdev, req); 800be4a: 6839 ldr r1, [r7, #0] 800be4c: 6878 ldr r0, [r7, #4] 800be4e: f000 fcc9 bl 800c7e4 break; 800be52: bf00 nop } break; 800be54: e004 b.n 800be60 default: USBD_CtlError(pdev, req); 800be56: 6839 ldr r1, [r7, #0] 800be58: 6878 ldr r0, [r7, #4] 800be5a: f000 fcc3 bl 800c7e4 break; 800be5e: bf00 nop } return ret; 800be60: 7bfb ldrb r3, [r7, #15] } 800be62: 4618 mov r0, r3 800be64: 3710 adds r7, #16 800be66: 46bd mov sp, r7 800be68: bd80 pop {r7, pc} 800be6a: bf00 nop 0800be6c : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800be6c: b580 push {r7, lr} 800be6e: b084 sub sp, #16 800be70: af00 add r7, sp, #0 800be72: 6078 str r0, [r7, #4] 800be74: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800be76: 2300 movs r3, #0 800be78: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800be7a: 683b ldr r3, [r7, #0] 800be7c: 781b ldrb r3, [r3, #0] 800be7e: f003 0360 and.w r3, r3, #96 @ 0x60 800be82: 2b40 cmp r3, #64 @ 0x40 800be84: d005 beq.n 800be92 800be86: 2b40 cmp r3, #64 @ 0x40 800be88: d82e bhi.n 800bee8 800be8a: 2b00 cmp r3, #0 800be8c: d001 beq.n 800be92 800be8e: 2b20 cmp r3, #32 800be90: d12a bne.n 800bee8 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: case USB_REQ_TYPE_STANDARD: switch (pdev->dev_state) 800be92: 687b ldr r3, [r7, #4] 800be94: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800be98: 3b01 subs r3, #1 800be9a: 2b02 cmp r3, #2 800be9c: d81d bhi.n 800beda { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) 800be9e: 683b ldr r3, [r7, #0] 800bea0: 889b ldrh r3, [r3, #4] 800bea2: b2db uxtb r3, r3 800bea4: 2b01 cmp r3, #1 800bea6: d813 bhi.n 800bed0 { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 800bea8: 687b ldr r3, [r7, #4] 800beaa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800beae: 689b ldr r3, [r3, #8] 800beb0: 6839 ldr r1, [r7, #0] 800beb2: 6878 ldr r0, [r7, #4] 800beb4: 4798 blx r3 800beb6: 4603 mov r3, r0 800beb8: 73fb strb r3, [r7, #15] if ((req->wLength == 0U) && (ret == USBD_OK)) 800beba: 683b ldr r3, [r7, #0] 800bebc: 88db ldrh r3, [r3, #6] 800bebe: 2b00 cmp r3, #0 800bec0: d110 bne.n 800bee4 800bec2: 7bfb ldrb r3, [r7, #15] 800bec4: 2b00 cmp r3, #0 800bec6: d10d bne.n 800bee4 { USBD_CtlSendStatus(pdev); 800bec8: 6878 ldr r0, [r7, #4] 800beca: f000 fd53 bl 800c974 } else { USBD_CtlError(pdev, req); } break; 800bece: e009 b.n 800bee4 USBD_CtlError(pdev, req); 800bed0: 6839 ldr r1, [r7, #0] 800bed2: 6878 ldr r0, [r7, #4] 800bed4: f000 fc86 bl 800c7e4 break; 800bed8: e004 b.n 800bee4 default: USBD_CtlError(pdev, req); 800beda: 6839 ldr r1, [r7, #0] 800bedc: 6878 ldr r0, [r7, #4] 800bede: f000 fc81 bl 800c7e4 break; 800bee2: e000 b.n 800bee6 break; 800bee4: bf00 nop } break; 800bee6: e004 b.n 800bef2 default: USBD_CtlError(pdev, req); 800bee8: 6839 ldr r1, [r7, #0] 800beea: 6878 ldr r0, [r7, #4] 800beec: f000 fc7a bl 800c7e4 break; 800bef0: bf00 nop } return USBD_OK; 800bef2: 2300 movs r3, #0 } 800bef4: 4618 mov r0, r3 800bef6: 3710 adds r7, #16 800bef8: 46bd mov sp, r7 800befa: bd80 pop {r7, pc} 0800befc : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800befc: b580 push {r7, lr} 800befe: b084 sub sp, #16 800bf00: af00 add r7, sp, #0 800bf02: 6078 str r0, [r7, #4] 800bf04: 6039 str r1, [r7, #0] USBD_EndpointTypeDef *pep; uint8_t ep_addr; USBD_StatusTypeDef ret = USBD_OK; 800bf06: 2300 movs r3, #0 800bf08: 73fb strb r3, [r7, #15] ep_addr = LOBYTE(req->wIndex); 800bf0a: 683b ldr r3, [r7, #0] 800bf0c: 889b ldrh r3, [r3, #4] 800bf0e: 73bb strb r3, [r7, #14] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800bf10: 683b ldr r3, [r7, #0] 800bf12: 781b ldrb r3, [r3, #0] 800bf14: f003 0360 and.w r3, r3, #96 @ 0x60 800bf18: 2b40 cmp r3, #64 @ 0x40 800bf1a: d007 beq.n 800bf2c 800bf1c: 2b40 cmp r3, #64 @ 0x40 800bf1e: f200 8146 bhi.w 800c1ae 800bf22: 2b00 cmp r3, #0 800bf24: d00a beq.n 800bf3c 800bf26: 2b20 cmp r3, #32 800bf28: f040 8141 bne.w 800c1ae { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 800bf2c: 687b ldr r3, [r7, #4] 800bf2e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bf32: 689b ldr r3, [r3, #8] 800bf34: 6839 ldr r1, [r7, #0] 800bf36: 6878 ldr r0, [r7, #4] 800bf38: 4798 blx r3 break; 800bf3a: e13d b.n 800c1b8 case USB_REQ_TYPE_STANDARD: /* Check if it is a class request */ if ((req->bmRequest & 0x60U) == 0x20U) 800bf3c: 683b ldr r3, [r7, #0] 800bf3e: 781b ldrb r3, [r3, #0] 800bf40: f003 0360 and.w r3, r3, #96 @ 0x60 800bf44: 2b20 cmp r3, #32 800bf46: d10a bne.n 800bf5e { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 800bf48: 687b ldr r3, [r7, #4] 800bf4a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bf4e: 689b ldr r3, [r3, #8] 800bf50: 6839 ldr r1, [r7, #0] 800bf52: 6878 ldr r0, [r7, #4] 800bf54: 4798 blx r3 800bf56: 4603 mov r3, r0 800bf58: 73fb strb r3, [r7, #15] return ret; 800bf5a: 7bfb ldrb r3, [r7, #15] 800bf5c: e12d b.n 800c1ba } switch (req->bRequest) 800bf5e: 683b ldr r3, [r7, #0] 800bf60: 785b ldrb r3, [r3, #1] 800bf62: 2b03 cmp r3, #3 800bf64: d007 beq.n 800bf76 800bf66: 2b03 cmp r3, #3 800bf68: f300 811b bgt.w 800c1a2 800bf6c: 2b00 cmp r3, #0 800bf6e: d072 beq.n 800c056 800bf70: 2b01 cmp r3, #1 800bf72: d03a beq.n 800bfea 800bf74: e115 b.n 800c1a2 { case USB_REQ_SET_FEATURE: switch (pdev->dev_state) 800bf76: 687b ldr r3, [r7, #4] 800bf78: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800bf7c: 2b02 cmp r3, #2 800bf7e: d002 beq.n 800bf86 800bf80: 2b03 cmp r3, #3 800bf82: d015 beq.n 800bfb0 800bf84: e02b b.n 800bfde { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800bf86: 7bbb ldrb r3, [r7, #14] 800bf88: 2b00 cmp r3, #0 800bf8a: d00c beq.n 800bfa6 800bf8c: 7bbb ldrb r3, [r7, #14] 800bf8e: 2b80 cmp r3, #128 @ 0x80 800bf90: d009 beq.n 800bfa6 { USBD_LL_StallEP(pdev, ep_addr); 800bf92: 7bbb ldrb r3, [r7, #14] 800bf94: 4619 mov r1, r3 800bf96: 6878 ldr r0, [r7, #4] 800bf98: f001 f8fe bl 800d198 USBD_LL_StallEP(pdev, 0x80U); 800bf9c: 2180 movs r1, #128 @ 0x80 800bf9e: 6878 ldr r0, [r7, #4] 800bfa0: f001 f8fa bl 800d198 } else { USBD_CtlError(pdev, req); } break; 800bfa4: e020 b.n 800bfe8 USBD_CtlError(pdev, req); 800bfa6: 6839 ldr r1, [r7, #0] 800bfa8: 6878 ldr r0, [r7, #4] 800bfaa: f000 fc1b bl 800c7e4 break; 800bfae: e01b b.n 800bfe8 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 800bfb0: 683b ldr r3, [r7, #0] 800bfb2: 885b ldrh r3, [r3, #2] 800bfb4: 2b00 cmp r3, #0 800bfb6: d10e bne.n 800bfd6 { if ((ep_addr != 0x00U) && 800bfb8: 7bbb ldrb r3, [r7, #14] 800bfba: 2b00 cmp r3, #0 800bfbc: d00b beq.n 800bfd6 800bfbe: 7bbb ldrb r3, [r7, #14] 800bfc0: 2b80 cmp r3, #128 @ 0x80 800bfc2: d008 beq.n 800bfd6 (ep_addr != 0x80U) && (req->wLength == 0x00U)) 800bfc4: 683b ldr r3, [r7, #0] 800bfc6: 88db ldrh r3, [r3, #6] 800bfc8: 2b00 cmp r3, #0 800bfca: d104 bne.n 800bfd6 { USBD_LL_StallEP(pdev, ep_addr); 800bfcc: 7bbb ldrb r3, [r7, #14] 800bfce: 4619 mov r1, r3 800bfd0: 6878 ldr r0, [r7, #4] 800bfd2: f001 f8e1 bl 800d198 } } USBD_CtlSendStatus(pdev); 800bfd6: 6878 ldr r0, [r7, #4] 800bfd8: f000 fccc bl 800c974 break; 800bfdc: e004 b.n 800bfe8 default: USBD_CtlError(pdev, req); 800bfde: 6839 ldr r1, [r7, #0] 800bfe0: 6878 ldr r0, [r7, #4] 800bfe2: f000 fbff bl 800c7e4 break; 800bfe6: bf00 nop } break; 800bfe8: e0e0 b.n 800c1ac case USB_REQ_CLEAR_FEATURE: switch (pdev->dev_state) 800bfea: 687b ldr r3, [r7, #4] 800bfec: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800bff0: 2b02 cmp r3, #2 800bff2: d002 beq.n 800bffa 800bff4: 2b03 cmp r3, #3 800bff6: d015 beq.n 800c024 800bff8: e026 b.n 800c048 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800bffa: 7bbb ldrb r3, [r7, #14] 800bffc: 2b00 cmp r3, #0 800bffe: d00c beq.n 800c01a 800c000: 7bbb ldrb r3, [r7, #14] 800c002: 2b80 cmp r3, #128 @ 0x80 800c004: d009 beq.n 800c01a { USBD_LL_StallEP(pdev, ep_addr); 800c006: 7bbb ldrb r3, [r7, #14] 800c008: 4619 mov r1, r3 800c00a: 6878 ldr r0, [r7, #4] 800c00c: f001 f8c4 bl 800d198 USBD_LL_StallEP(pdev, 0x80U); 800c010: 2180 movs r1, #128 @ 0x80 800c012: 6878 ldr r0, [r7, #4] 800c014: f001 f8c0 bl 800d198 } else { USBD_CtlError(pdev, req); } break; 800c018: e01c b.n 800c054 USBD_CtlError(pdev, req); 800c01a: 6839 ldr r1, [r7, #0] 800c01c: 6878 ldr r0, [r7, #4] 800c01e: f000 fbe1 bl 800c7e4 break; 800c022: e017 b.n 800c054 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 800c024: 683b ldr r3, [r7, #0] 800c026: 885b ldrh r3, [r3, #2] 800c028: 2b00 cmp r3, #0 800c02a: d112 bne.n 800c052 { if ((ep_addr & 0x7FU) != 0x00U) 800c02c: 7bbb ldrb r3, [r7, #14] 800c02e: f003 037f and.w r3, r3, #127 @ 0x7f 800c032: 2b00 cmp r3, #0 800c034: d004 beq.n 800c040 { USBD_LL_ClearStallEP(pdev, ep_addr); 800c036: 7bbb ldrb r3, [r7, #14] 800c038: 4619 mov r1, r3 800c03a: 6878 ldr r0, [r7, #4] 800c03c: f001 f8cb bl 800d1d6 } USBD_CtlSendStatus(pdev); 800c040: 6878 ldr r0, [r7, #4] 800c042: f000 fc97 bl 800c974 } break; 800c046: e004 b.n 800c052 default: USBD_CtlError(pdev, req); 800c048: 6839 ldr r1, [r7, #0] 800c04a: 6878 ldr r0, [r7, #4] 800c04c: f000 fbca bl 800c7e4 break; 800c050: e000 b.n 800c054 break; 800c052: bf00 nop } break; 800c054: e0aa b.n 800c1ac case USB_REQ_GET_STATUS: switch (pdev->dev_state) 800c056: 687b ldr r3, [r7, #4] 800c058: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c05c: 2b02 cmp r3, #2 800c05e: d002 beq.n 800c066 800c060: 2b03 cmp r3, #3 800c062: d032 beq.n 800c0ca 800c064: e097 b.n 800c196 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800c066: 7bbb ldrb r3, [r7, #14] 800c068: 2b00 cmp r3, #0 800c06a: d007 beq.n 800c07c 800c06c: 7bbb ldrb r3, [r7, #14] 800c06e: 2b80 cmp r3, #128 @ 0x80 800c070: d004 beq.n 800c07c { USBD_CtlError(pdev, req); 800c072: 6839 ldr r1, [r7, #0] 800c074: 6878 ldr r0, [r7, #4] 800c076: f000 fbb5 bl 800c7e4 break; 800c07a: e091 b.n 800c1a0 } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800c07c: f997 300e ldrsb.w r3, [r7, #14] 800c080: 2b00 cmp r3, #0 800c082: da0b bge.n 800c09c 800c084: 7bbb ldrb r3, [r7, #14] 800c086: f003 027f and.w r2, r3, #127 @ 0x7f 800c08a: 4613 mov r3, r2 800c08c: 009b lsls r3, r3, #2 800c08e: 4413 add r3, r2 800c090: 009b lsls r3, r3, #2 800c092: 3310 adds r3, #16 800c094: 687a ldr r2, [r7, #4] 800c096: 4413 add r3, r2 800c098: 3304 adds r3, #4 800c09a: e00b b.n 800c0b4 &pdev->ep_out[ep_addr & 0x7FU]; 800c09c: 7bbb ldrb r3, [r7, #14] 800c09e: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800c0a2: 4613 mov r3, r2 800c0a4: 009b lsls r3, r3, #2 800c0a6: 4413 add r3, r2 800c0a8: 009b lsls r3, r3, #2 800c0aa: f503 73a8 add.w r3, r3, #336 @ 0x150 800c0ae: 687a ldr r2, [r7, #4] 800c0b0: 4413 add r3, r2 800c0b2: 3304 adds r3, #4 800c0b4: 60bb str r3, [r7, #8] pep->status = 0x0000U; 800c0b6: 68bb ldr r3, [r7, #8] 800c0b8: 2200 movs r2, #0 800c0ba: 601a str r2, [r3, #0] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 800c0bc: 68bb ldr r3, [r7, #8] 800c0be: 2202 movs r2, #2 800c0c0: 4619 mov r1, r3 800c0c2: 6878 ldr r0, [r7, #4] 800c0c4: f000 fbf8 bl 800c8b8 break; 800c0c8: e06a b.n 800c1a0 case USBD_STATE_CONFIGURED: if ((ep_addr & 0x80U) == 0x80U) 800c0ca: f997 300e ldrsb.w r3, [r7, #14] 800c0ce: 2b00 cmp r3, #0 800c0d0: da11 bge.n 800c0f6 { if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U) 800c0d2: 7bbb ldrb r3, [r7, #14] 800c0d4: f003 020f and.w r2, r3, #15 800c0d8: 6879 ldr r1, [r7, #4] 800c0da: 4613 mov r3, r2 800c0dc: 009b lsls r3, r3, #2 800c0de: 4413 add r3, r2 800c0e0: 009b lsls r3, r3, #2 800c0e2: 440b add r3, r1 800c0e4: 3318 adds r3, #24 800c0e6: 681b ldr r3, [r3, #0] 800c0e8: 2b00 cmp r3, #0 800c0ea: d117 bne.n 800c11c { USBD_CtlError(pdev, req); 800c0ec: 6839 ldr r1, [r7, #0] 800c0ee: 6878 ldr r0, [r7, #4] 800c0f0: f000 fb78 bl 800c7e4 break; 800c0f4: e054 b.n 800c1a0 } } else { if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U) 800c0f6: 7bbb ldrb r3, [r7, #14] 800c0f8: f003 020f and.w r2, r3, #15 800c0fc: 6879 ldr r1, [r7, #4] 800c0fe: 4613 mov r3, r2 800c100: 009b lsls r3, r3, #2 800c102: 4413 add r3, r2 800c104: 009b lsls r3, r3, #2 800c106: 440b add r3, r1 800c108: f503 73ac add.w r3, r3, #344 @ 0x158 800c10c: 681b ldr r3, [r3, #0] 800c10e: 2b00 cmp r3, #0 800c110: d104 bne.n 800c11c { USBD_CtlError(pdev, req); 800c112: 6839 ldr r1, [r7, #0] 800c114: 6878 ldr r0, [r7, #4] 800c116: f000 fb65 bl 800c7e4 break; 800c11a: e041 b.n 800c1a0 } } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800c11c: f997 300e ldrsb.w r3, [r7, #14] 800c120: 2b00 cmp r3, #0 800c122: da0b bge.n 800c13c 800c124: 7bbb ldrb r3, [r7, #14] 800c126: f003 027f and.w r2, r3, #127 @ 0x7f 800c12a: 4613 mov r3, r2 800c12c: 009b lsls r3, r3, #2 800c12e: 4413 add r3, r2 800c130: 009b lsls r3, r3, #2 800c132: 3310 adds r3, #16 800c134: 687a ldr r2, [r7, #4] 800c136: 4413 add r3, r2 800c138: 3304 adds r3, #4 800c13a: e00b b.n 800c154 &pdev->ep_out[ep_addr & 0x7FU]; 800c13c: 7bbb ldrb r3, [r7, #14] 800c13e: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800c142: 4613 mov r3, r2 800c144: 009b lsls r3, r3, #2 800c146: 4413 add r3, r2 800c148: 009b lsls r3, r3, #2 800c14a: f503 73a8 add.w r3, r3, #336 @ 0x150 800c14e: 687a ldr r2, [r7, #4] 800c150: 4413 add r3, r2 800c152: 3304 adds r3, #4 800c154: 60bb str r3, [r7, #8] if ((ep_addr == 0x00U) || (ep_addr == 0x80U)) 800c156: 7bbb ldrb r3, [r7, #14] 800c158: 2b00 cmp r3, #0 800c15a: d002 beq.n 800c162 800c15c: 7bbb ldrb r3, [r7, #14] 800c15e: 2b80 cmp r3, #128 @ 0x80 800c160: d103 bne.n 800c16a { pep->status = 0x0000U; 800c162: 68bb ldr r3, [r7, #8] 800c164: 2200 movs r2, #0 800c166: 601a str r2, [r3, #0] 800c168: e00e b.n 800c188 } else if (USBD_LL_IsStallEP(pdev, ep_addr)) 800c16a: 7bbb ldrb r3, [r7, #14] 800c16c: 4619 mov r1, r3 800c16e: 6878 ldr r0, [r7, #4] 800c170: f001 f850 bl 800d214 800c174: 4603 mov r3, r0 800c176: 2b00 cmp r3, #0 800c178: d003 beq.n 800c182 { pep->status = 0x0001U; 800c17a: 68bb ldr r3, [r7, #8] 800c17c: 2201 movs r2, #1 800c17e: 601a str r2, [r3, #0] 800c180: e002 b.n 800c188 } else { pep->status = 0x0000U; 800c182: 68bb ldr r3, [r7, #8] 800c184: 2200 movs r2, #0 800c186: 601a str r2, [r3, #0] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 800c188: 68bb ldr r3, [r7, #8] 800c18a: 2202 movs r2, #2 800c18c: 4619 mov r1, r3 800c18e: 6878 ldr r0, [r7, #4] 800c190: f000 fb92 bl 800c8b8 break; 800c194: e004 b.n 800c1a0 default: USBD_CtlError(pdev, req); 800c196: 6839 ldr r1, [r7, #0] 800c198: 6878 ldr r0, [r7, #4] 800c19a: f000 fb23 bl 800c7e4 break; 800c19e: bf00 nop } break; 800c1a0: e004 b.n 800c1ac default: USBD_CtlError(pdev, req); 800c1a2: 6839 ldr r1, [r7, #0] 800c1a4: 6878 ldr r0, [r7, #4] 800c1a6: f000 fb1d bl 800c7e4 break; 800c1aa: bf00 nop } break; 800c1ac: e004 b.n 800c1b8 default: USBD_CtlError(pdev, req); 800c1ae: 6839 ldr r1, [r7, #0] 800c1b0: 6878 ldr r0, [r7, #4] 800c1b2: f000 fb17 bl 800c7e4 break; 800c1b6: bf00 nop } return ret; 800c1b8: 7bfb ldrb r3, [r7, #15] } 800c1ba: 4618 mov r0, r3 800c1bc: 3710 adds r7, #16 800c1be: 46bd mov sp, r7 800c1c0: bd80 pop {r7, pc} ... 0800c1c4 : * @param req: usb request * @retval status */ static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c1c4: b580 push {r7, lr} 800c1c6: b084 sub sp, #16 800c1c8: af00 add r7, sp, #0 800c1ca: 6078 str r0, [r7, #4] 800c1cc: 6039 str r1, [r7, #0] uint16_t len = 0U; 800c1ce: 2300 movs r3, #0 800c1d0: 813b strh r3, [r7, #8] uint8_t *pbuf = NULL; 800c1d2: 2300 movs r3, #0 800c1d4: 60fb str r3, [r7, #12] uint8_t err = 0U; 800c1d6: 2300 movs r3, #0 800c1d8: 72fb strb r3, [r7, #11] switch (req->wValue >> 8) 800c1da: 683b ldr r3, [r7, #0] 800c1dc: 885b ldrh r3, [r3, #2] 800c1de: 0a1b lsrs r3, r3, #8 800c1e0: b29b uxth r3, r3 800c1e2: 3b01 subs r3, #1 800c1e4: 2b06 cmp r3, #6 800c1e6: f200 8128 bhi.w 800c43a 800c1ea: a201 add r2, pc, #4 @ (adr r2, 800c1f0 ) 800c1ec: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800c1f0: 0800c20d .word 0x0800c20d 800c1f4: 0800c225 .word 0x0800c225 800c1f8: 0800c265 .word 0x0800c265 800c1fc: 0800c43b .word 0x0800c43b 800c200: 0800c43b .word 0x0800c43b 800c204: 0800c3db .word 0x0800c3db 800c208: 0800c407 .word 0x0800c407 err++; } break; #endif case USB_DESC_TYPE_DEVICE: pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); 800c20c: 687b ldr r3, [r7, #4] 800c20e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c212: 681b ldr r3, [r3, #0] 800c214: 687a ldr r2, [r7, #4] 800c216: 7c12 ldrb r2, [r2, #16] 800c218: f107 0108 add.w r1, r7, #8 800c21c: 4610 mov r0, r2 800c21e: 4798 blx r3 800c220: 60f8 str r0, [r7, #12] break; 800c222: e112 b.n 800c44a case USB_DESC_TYPE_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800c224: 687b ldr r3, [r7, #4] 800c226: 7c1b ldrb r3, [r3, #16] 800c228: 2b00 cmp r3, #0 800c22a: d10d bne.n 800c248 { pbuf = pdev->pClass->GetHSConfigDescriptor(&len); 800c22c: 687b ldr r3, [r7, #4] 800c22e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c232: 6a9b ldr r3, [r3, #40] @ 0x28 800c234: f107 0208 add.w r2, r7, #8 800c238: 4610 mov r0, r2 800c23a: 4798 blx r3 800c23c: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800c23e: 68fb ldr r3, [r7, #12] 800c240: 3301 adds r3, #1 800c242: 2202 movs r2, #2 800c244: 701a strb r2, [r3, #0] else { pbuf = pdev->pClass->GetFSConfigDescriptor(&len); pbuf[1] = USB_DESC_TYPE_CONFIGURATION; } break; 800c246: e100 b.n 800c44a pbuf = pdev->pClass->GetFSConfigDescriptor(&len); 800c248: 687b ldr r3, [r7, #4] 800c24a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c24e: 6adb ldr r3, [r3, #44] @ 0x2c 800c250: f107 0208 add.w r2, r7, #8 800c254: 4610 mov r0, r2 800c256: 4798 blx r3 800c258: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800c25a: 68fb ldr r3, [r7, #12] 800c25c: 3301 adds r3, #1 800c25e: 2202 movs r2, #2 800c260: 701a strb r2, [r3, #0] break; 800c262: e0f2 b.n 800c44a case USB_DESC_TYPE_STRING: switch ((uint8_t)(req->wValue)) 800c264: 683b ldr r3, [r7, #0] 800c266: 885b ldrh r3, [r3, #2] 800c268: b2db uxtb r3, r3 800c26a: 2b05 cmp r3, #5 800c26c: f200 80ac bhi.w 800c3c8 800c270: a201 add r2, pc, #4 @ (adr r2, 800c278 ) 800c272: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800c276: bf00 nop 800c278: 0800c291 .word 0x0800c291 800c27c: 0800c2c5 .word 0x0800c2c5 800c280: 0800c2f9 .word 0x0800c2f9 800c284: 0800c32d .word 0x0800c32d 800c288: 0800c361 .word 0x0800c361 800c28c: 0800c395 .word 0x0800c395 { case USBD_IDX_LANGID_STR: if (pdev->pDesc->GetLangIDStrDescriptor != NULL) 800c290: 687b ldr r3, [r7, #4] 800c292: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c296: 685b ldr r3, [r3, #4] 800c298: 2b00 cmp r3, #0 800c29a: d00b beq.n 800c2b4 { pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); 800c29c: 687b ldr r3, [r7, #4] 800c29e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c2a2: 685b ldr r3, [r3, #4] 800c2a4: 687a ldr r2, [r7, #4] 800c2a6: 7c12 ldrb r2, [r2, #16] 800c2a8: f107 0108 add.w r1, r7, #8 800c2ac: 4610 mov r0, r2 800c2ae: 4798 blx r3 800c2b0: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c2b2: e091 b.n 800c3d8 USBD_CtlError(pdev, req); 800c2b4: 6839 ldr r1, [r7, #0] 800c2b6: 6878 ldr r0, [r7, #4] 800c2b8: f000 fa94 bl 800c7e4 err++; 800c2bc: 7afb ldrb r3, [r7, #11] 800c2be: 3301 adds r3, #1 800c2c0: 72fb strb r3, [r7, #11] break; 800c2c2: e089 b.n 800c3d8 case USBD_IDX_MFC_STR: if (pdev->pDesc->GetManufacturerStrDescriptor != NULL) 800c2c4: 687b ldr r3, [r7, #4] 800c2c6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c2ca: 689b ldr r3, [r3, #8] 800c2cc: 2b00 cmp r3, #0 800c2ce: d00b beq.n 800c2e8 { pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); 800c2d0: 687b ldr r3, [r7, #4] 800c2d2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c2d6: 689b ldr r3, [r3, #8] 800c2d8: 687a ldr r2, [r7, #4] 800c2da: 7c12 ldrb r2, [r2, #16] 800c2dc: f107 0108 add.w r1, r7, #8 800c2e0: 4610 mov r0, r2 800c2e2: 4798 blx r3 800c2e4: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c2e6: e077 b.n 800c3d8 USBD_CtlError(pdev, req); 800c2e8: 6839 ldr r1, [r7, #0] 800c2ea: 6878 ldr r0, [r7, #4] 800c2ec: f000 fa7a bl 800c7e4 err++; 800c2f0: 7afb ldrb r3, [r7, #11] 800c2f2: 3301 adds r3, #1 800c2f4: 72fb strb r3, [r7, #11] break; 800c2f6: e06f b.n 800c3d8 case USBD_IDX_PRODUCT_STR: if (pdev->pDesc->GetProductStrDescriptor != NULL) 800c2f8: 687b ldr r3, [r7, #4] 800c2fa: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c2fe: 68db ldr r3, [r3, #12] 800c300: 2b00 cmp r3, #0 800c302: d00b beq.n 800c31c { pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); 800c304: 687b ldr r3, [r7, #4] 800c306: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c30a: 68db ldr r3, [r3, #12] 800c30c: 687a ldr r2, [r7, #4] 800c30e: 7c12 ldrb r2, [r2, #16] 800c310: f107 0108 add.w r1, r7, #8 800c314: 4610 mov r0, r2 800c316: 4798 blx r3 800c318: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c31a: e05d b.n 800c3d8 USBD_CtlError(pdev, req); 800c31c: 6839 ldr r1, [r7, #0] 800c31e: 6878 ldr r0, [r7, #4] 800c320: f000 fa60 bl 800c7e4 err++; 800c324: 7afb ldrb r3, [r7, #11] 800c326: 3301 adds r3, #1 800c328: 72fb strb r3, [r7, #11] break; 800c32a: e055 b.n 800c3d8 case USBD_IDX_SERIAL_STR: if (pdev->pDesc->GetSerialStrDescriptor != NULL) 800c32c: 687b ldr r3, [r7, #4] 800c32e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c332: 691b ldr r3, [r3, #16] 800c334: 2b00 cmp r3, #0 800c336: d00b beq.n 800c350 { pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); 800c338: 687b ldr r3, [r7, #4] 800c33a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c33e: 691b ldr r3, [r3, #16] 800c340: 687a ldr r2, [r7, #4] 800c342: 7c12 ldrb r2, [r2, #16] 800c344: f107 0108 add.w r1, r7, #8 800c348: 4610 mov r0, r2 800c34a: 4798 blx r3 800c34c: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c34e: e043 b.n 800c3d8 USBD_CtlError(pdev, req); 800c350: 6839 ldr r1, [r7, #0] 800c352: 6878 ldr r0, [r7, #4] 800c354: f000 fa46 bl 800c7e4 err++; 800c358: 7afb ldrb r3, [r7, #11] 800c35a: 3301 adds r3, #1 800c35c: 72fb strb r3, [r7, #11] break; 800c35e: e03b b.n 800c3d8 case USBD_IDX_CONFIG_STR: if (pdev->pDesc->GetConfigurationStrDescriptor != NULL) 800c360: 687b ldr r3, [r7, #4] 800c362: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c366: 695b ldr r3, [r3, #20] 800c368: 2b00 cmp r3, #0 800c36a: d00b beq.n 800c384 { pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); 800c36c: 687b ldr r3, [r7, #4] 800c36e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c372: 695b ldr r3, [r3, #20] 800c374: 687a ldr r2, [r7, #4] 800c376: 7c12 ldrb r2, [r2, #16] 800c378: f107 0108 add.w r1, r7, #8 800c37c: 4610 mov r0, r2 800c37e: 4798 blx r3 800c380: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c382: e029 b.n 800c3d8 USBD_CtlError(pdev, req); 800c384: 6839 ldr r1, [r7, #0] 800c386: 6878 ldr r0, [r7, #4] 800c388: f000 fa2c bl 800c7e4 err++; 800c38c: 7afb ldrb r3, [r7, #11] 800c38e: 3301 adds r3, #1 800c390: 72fb strb r3, [r7, #11] break; 800c392: e021 b.n 800c3d8 case USBD_IDX_INTERFACE_STR: if (pdev->pDesc->GetInterfaceStrDescriptor != NULL) 800c394: 687b ldr r3, [r7, #4] 800c396: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c39a: 699b ldr r3, [r3, #24] 800c39c: 2b00 cmp r3, #0 800c39e: d00b beq.n 800c3b8 { pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); 800c3a0: 687b ldr r3, [r7, #4] 800c3a2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c3a6: 699b ldr r3, [r3, #24] 800c3a8: 687a ldr r2, [r7, #4] 800c3aa: 7c12 ldrb r2, [r2, #16] 800c3ac: f107 0108 add.w r1, r7, #8 800c3b0: 4610 mov r0, r2 800c3b2: 4798 blx r3 800c3b4: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c3b6: e00f b.n 800c3d8 USBD_CtlError(pdev, req); 800c3b8: 6839 ldr r1, [r7, #0] 800c3ba: 6878 ldr r0, [r7, #4] 800c3bc: f000 fa12 bl 800c7e4 err++; 800c3c0: 7afb ldrb r3, [r7, #11] 800c3c2: 3301 adds r3, #1 800c3c4: 72fb strb r3, [r7, #11] break; 800c3c6: e007 b.n 800c3d8 USBD_CtlError(pdev, req); err++; } break; #else USBD_CtlError(pdev, req); 800c3c8: 6839 ldr r1, [r7, #0] 800c3ca: 6878 ldr r0, [r7, #4] 800c3cc: f000 fa0a bl 800c7e4 err++; 800c3d0: 7afb ldrb r3, [r7, #11] 800c3d2: 3301 adds r3, #1 800c3d4: 72fb strb r3, [r7, #11] #endif } break; 800c3d6: e038 b.n 800c44a 800c3d8: e037 b.n 800c44a case USB_DESC_TYPE_DEVICE_QUALIFIER: if (pdev->dev_speed == USBD_SPEED_HIGH) 800c3da: 687b ldr r3, [r7, #4] 800c3dc: 7c1b ldrb r3, [r3, #16] 800c3de: 2b00 cmp r3, #0 800c3e0: d109 bne.n 800c3f6 { pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len); 800c3e2: 687b ldr r3, [r7, #4] 800c3e4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c3e8: 6b5b ldr r3, [r3, #52] @ 0x34 800c3ea: f107 0208 add.w r2, r7, #8 800c3ee: 4610 mov r0, r2 800c3f0: 4798 blx r3 800c3f2: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c3f4: e029 b.n 800c44a USBD_CtlError(pdev, req); 800c3f6: 6839 ldr r1, [r7, #0] 800c3f8: 6878 ldr r0, [r7, #4] 800c3fa: f000 f9f3 bl 800c7e4 err++; 800c3fe: 7afb ldrb r3, [r7, #11] 800c400: 3301 adds r3, #1 800c402: 72fb strb r3, [r7, #11] break; 800c404: e021 b.n 800c44a case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800c406: 687b ldr r3, [r7, #4] 800c408: 7c1b ldrb r3, [r3, #16] 800c40a: 2b00 cmp r3, #0 800c40c: d10d bne.n 800c42a { pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len); 800c40e: 687b ldr r3, [r7, #4] 800c410: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c414: 6b1b ldr r3, [r3, #48] @ 0x30 800c416: f107 0208 add.w r2, r7, #8 800c41a: 4610 mov r0, r2 800c41c: 4798 blx r3 800c41e: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; 800c420: 68fb ldr r3, [r7, #12] 800c422: 3301 adds r3, #1 800c424: 2207 movs r2, #7 800c426: 701a strb r2, [r3, #0] else { USBD_CtlError(pdev, req); err++; } break; 800c428: e00f b.n 800c44a USBD_CtlError(pdev, req); 800c42a: 6839 ldr r1, [r7, #0] 800c42c: 6878 ldr r0, [r7, #4] 800c42e: f000 f9d9 bl 800c7e4 err++; 800c432: 7afb ldrb r3, [r7, #11] 800c434: 3301 adds r3, #1 800c436: 72fb strb r3, [r7, #11] break; 800c438: e007 b.n 800c44a default: USBD_CtlError(pdev, req); 800c43a: 6839 ldr r1, [r7, #0] 800c43c: 6878 ldr r0, [r7, #4] 800c43e: f000 f9d1 bl 800c7e4 err++; 800c442: 7afb ldrb r3, [r7, #11] 800c444: 3301 adds r3, #1 800c446: 72fb strb r3, [r7, #11] break; 800c448: bf00 nop } if (err != 0U) 800c44a: 7afb ldrb r3, [r7, #11] 800c44c: 2b00 cmp r3, #0 800c44e: d11c bne.n 800c48a { return; } else { if ((len != 0U) && (req->wLength != 0U)) 800c450: 893b ldrh r3, [r7, #8] 800c452: 2b00 cmp r3, #0 800c454: d011 beq.n 800c47a 800c456: 683b ldr r3, [r7, #0] 800c458: 88db ldrh r3, [r3, #6] 800c45a: 2b00 cmp r3, #0 800c45c: d00d beq.n 800c47a { len = MIN(len, req->wLength); 800c45e: 683b ldr r3, [r7, #0] 800c460: 88da ldrh r2, [r3, #6] 800c462: 893b ldrh r3, [r7, #8] 800c464: 4293 cmp r3, r2 800c466: bf28 it cs 800c468: 4613 movcs r3, r2 800c46a: b29b uxth r3, r3 800c46c: 813b strh r3, [r7, #8] (void)USBD_CtlSendData(pdev, pbuf, len); 800c46e: 893b ldrh r3, [r7, #8] 800c470: 461a mov r2, r3 800c472: 68f9 ldr r1, [r7, #12] 800c474: 6878 ldr r0, [r7, #4] 800c476: f000 fa1f bl 800c8b8 } if (req->wLength == 0U) 800c47a: 683b ldr r3, [r7, #0] 800c47c: 88db ldrh r3, [r3, #6] 800c47e: 2b00 cmp r3, #0 800c480: d104 bne.n 800c48c { (void)USBD_CtlSendStatus(pdev); 800c482: 6878 ldr r0, [r7, #4] 800c484: f000 fa76 bl 800c974 800c488: e000 b.n 800c48c return; 800c48a: bf00 nop } } } 800c48c: 3710 adds r7, #16 800c48e: 46bd mov sp, r7 800c490: bd80 pop {r7, pc} 800c492: bf00 nop 0800c494 : * @param req: usb request * @retval status */ static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c494: b580 push {r7, lr} 800c496: b084 sub sp, #16 800c498: af00 add r7, sp, #0 800c49a: 6078 str r0, [r7, #4] 800c49c: 6039 str r1, [r7, #0] uint8_t dev_addr; if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U)) 800c49e: 683b ldr r3, [r7, #0] 800c4a0: 889b ldrh r3, [r3, #4] 800c4a2: 2b00 cmp r3, #0 800c4a4: d130 bne.n 800c508 800c4a6: 683b ldr r3, [r7, #0] 800c4a8: 88db ldrh r3, [r3, #6] 800c4aa: 2b00 cmp r3, #0 800c4ac: d12c bne.n 800c508 800c4ae: 683b ldr r3, [r7, #0] 800c4b0: 885b ldrh r3, [r3, #2] 800c4b2: 2b7f cmp r3, #127 @ 0x7f 800c4b4: d828 bhi.n 800c508 { dev_addr = (uint8_t)(req->wValue) & 0x7FU; 800c4b6: 683b ldr r3, [r7, #0] 800c4b8: 885b ldrh r3, [r3, #2] 800c4ba: b2db uxtb r3, r3 800c4bc: f003 037f and.w r3, r3, #127 @ 0x7f 800c4c0: 73fb strb r3, [r7, #15] if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c4c2: 687b ldr r3, [r7, #4] 800c4c4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c4c8: 2b03 cmp r3, #3 800c4ca: d104 bne.n 800c4d6 { USBD_CtlError(pdev, req); 800c4cc: 6839 ldr r1, [r7, #0] 800c4ce: 6878 ldr r0, [r7, #4] 800c4d0: f000 f988 bl 800c7e4 if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c4d4: e01d b.n 800c512 } else { pdev->dev_address = dev_addr; 800c4d6: 687b ldr r3, [r7, #4] 800c4d8: 7bfa ldrb r2, [r7, #15] 800c4da: f883 229e strb.w r2, [r3, #670] @ 0x29e USBD_LL_SetUSBAddress(pdev, dev_addr); 800c4de: 7bfb ldrb r3, [r7, #15] 800c4e0: 4619 mov r1, r3 800c4e2: 6878 ldr r0, [r7, #4] 800c4e4: f000 fec1 bl 800d26a USBD_CtlSendStatus(pdev); 800c4e8: 6878 ldr r0, [r7, #4] 800c4ea: f000 fa43 bl 800c974 if (dev_addr != 0U) 800c4ee: 7bfb ldrb r3, [r7, #15] 800c4f0: 2b00 cmp r3, #0 800c4f2: d004 beq.n 800c4fe { pdev->dev_state = USBD_STATE_ADDRESSED; 800c4f4: 687b ldr r3, [r7, #4] 800c4f6: 2202 movs r2, #2 800c4f8: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c4fc: e009 b.n 800c512 } else { pdev->dev_state = USBD_STATE_DEFAULT; 800c4fe: 687b ldr r3, [r7, #4] 800c500: 2201 movs r2, #1 800c502: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c506: e004 b.n 800c512 } } } else { USBD_CtlError(pdev, req); 800c508: 6839 ldr r1, [r7, #0] 800c50a: 6878 ldr r0, [r7, #4] 800c50c: f000 f96a bl 800c7e4 } } 800c510: bf00 nop 800c512: bf00 nop 800c514: 3710 adds r7, #16 800c516: 46bd mov sp, r7 800c518: bd80 pop {r7, pc} ... 0800c51c : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c51c: b580 push {r7, lr} 800c51e: b082 sub sp, #8 800c520: af00 add r7, sp, #0 800c522: 6078 str r0, [r7, #4] 800c524: 6039 str r1, [r7, #0] static uint8_t cfgidx; cfgidx = (uint8_t)(req->wValue); 800c526: 683b ldr r3, [r7, #0] 800c528: 885b ldrh r3, [r3, #2] 800c52a: b2da uxtb r2, r3 800c52c: 4b41 ldr r3, [pc, #260] @ (800c634 ) 800c52e: 701a strb r2, [r3, #0] if (cfgidx > USBD_MAX_NUM_CONFIGURATION) 800c530: 4b40 ldr r3, [pc, #256] @ (800c634 ) 800c532: 781b ldrb r3, [r3, #0] 800c534: 2b01 cmp r3, #1 800c536: d904 bls.n 800c542 { USBD_CtlError(pdev, req); 800c538: 6839 ldr r1, [r7, #0] 800c53a: 6878 ldr r0, [r7, #4] 800c53c: f000 f952 bl 800c7e4 800c540: e075 b.n 800c62e } else { switch (pdev->dev_state) 800c542: 687b ldr r3, [r7, #4] 800c544: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c548: 2b02 cmp r3, #2 800c54a: d002 beq.n 800c552 800c54c: 2b03 cmp r3, #3 800c54e: d023 beq.n 800c598 800c550: e062 b.n 800c618 { case USBD_STATE_ADDRESSED: if (cfgidx) 800c552: 4b38 ldr r3, [pc, #224] @ (800c634 ) 800c554: 781b ldrb r3, [r3, #0] 800c556: 2b00 cmp r3, #0 800c558: d01a beq.n 800c590 { pdev->dev_config = cfgidx; 800c55a: 4b36 ldr r3, [pc, #216] @ (800c634 ) 800c55c: 781b ldrb r3, [r3, #0] 800c55e: 461a mov r2, r3 800c560: 687b ldr r3, [r7, #4] 800c562: 605a str r2, [r3, #4] pdev->dev_state = USBD_STATE_CONFIGURED; 800c564: 687b ldr r3, [r7, #4] 800c566: 2203 movs r2, #3 800c568: f883 229c strb.w r2, [r3, #668] @ 0x29c if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800c56c: 4b31 ldr r3, [pc, #196] @ (800c634 ) 800c56e: 781b ldrb r3, [r3, #0] 800c570: 4619 mov r1, r3 800c572: 6878 ldr r0, [r7, #4] 800c574: f7ff f9e7 bl 800b946 800c578: 4603 mov r3, r0 800c57a: 2b02 cmp r3, #2 800c57c: d104 bne.n 800c588 { USBD_CtlError(pdev, req); 800c57e: 6839 ldr r1, [r7, #0] 800c580: 6878 ldr r0, [r7, #4] 800c582: f000 f92f bl 800c7e4 return; 800c586: e052 b.n 800c62e } USBD_CtlSendStatus(pdev); 800c588: 6878 ldr r0, [r7, #4] 800c58a: f000 f9f3 bl 800c974 } else { USBD_CtlSendStatus(pdev); } break; 800c58e: e04e b.n 800c62e USBD_CtlSendStatus(pdev); 800c590: 6878 ldr r0, [r7, #4] 800c592: f000 f9ef bl 800c974 break; 800c596: e04a b.n 800c62e case USBD_STATE_CONFIGURED: if (cfgidx == 0U) 800c598: 4b26 ldr r3, [pc, #152] @ (800c634 ) 800c59a: 781b ldrb r3, [r3, #0] 800c59c: 2b00 cmp r3, #0 800c59e: d112 bne.n 800c5c6 { pdev->dev_state = USBD_STATE_ADDRESSED; 800c5a0: 687b ldr r3, [r7, #4] 800c5a2: 2202 movs r2, #2 800c5a4: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->dev_config = cfgidx; 800c5a8: 4b22 ldr r3, [pc, #136] @ (800c634 ) 800c5aa: 781b ldrb r3, [r3, #0] 800c5ac: 461a mov r2, r3 800c5ae: 687b ldr r3, [r7, #4] 800c5b0: 605a str r2, [r3, #4] USBD_ClrClassConfig(pdev, cfgidx); 800c5b2: 4b20 ldr r3, [pc, #128] @ (800c634 ) 800c5b4: 781b ldrb r3, [r3, #0] 800c5b6: 4619 mov r1, r3 800c5b8: 6878 ldr r0, [r7, #4] 800c5ba: f7ff f9e3 bl 800b984 USBD_CtlSendStatus(pdev); 800c5be: 6878 ldr r0, [r7, #4] 800c5c0: f000 f9d8 bl 800c974 } else { USBD_CtlSendStatus(pdev); } break; 800c5c4: e033 b.n 800c62e else if (cfgidx != pdev->dev_config) 800c5c6: 4b1b ldr r3, [pc, #108] @ (800c634 ) 800c5c8: 781b ldrb r3, [r3, #0] 800c5ca: 461a mov r2, r3 800c5cc: 687b ldr r3, [r7, #4] 800c5ce: 685b ldr r3, [r3, #4] 800c5d0: 429a cmp r2, r3 800c5d2: d01d beq.n 800c610 USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 800c5d4: 687b ldr r3, [r7, #4] 800c5d6: 685b ldr r3, [r3, #4] 800c5d8: b2db uxtb r3, r3 800c5da: 4619 mov r1, r3 800c5dc: 6878 ldr r0, [r7, #4] 800c5de: f7ff f9d1 bl 800b984 pdev->dev_config = cfgidx; 800c5e2: 4b14 ldr r3, [pc, #80] @ (800c634 ) 800c5e4: 781b ldrb r3, [r3, #0] 800c5e6: 461a mov r2, r3 800c5e8: 687b ldr r3, [r7, #4] 800c5ea: 605a str r2, [r3, #4] if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800c5ec: 4b11 ldr r3, [pc, #68] @ (800c634 ) 800c5ee: 781b ldrb r3, [r3, #0] 800c5f0: 4619 mov r1, r3 800c5f2: 6878 ldr r0, [r7, #4] 800c5f4: f7ff f9a7 bl 800b946 800c5f8: 4603 mov r3, r0 800c5fa: 2b02 cmp r3, #2 800c5fc: d104 bne.n 800c608 USBD_CtlError(pdev, req); 800c5fe: 6839 ldr r1, [r7, #0] 800c600: 6878 ldr r0, [r7, #4] 800c602: f000 f8ef bl 800c7e4 return; 800c606: e012 b.n 800c62e USBD_CtlSendStatus(pdev); 800c608: 6878 ldr r0, [r7, #4] 800c60a: f000 f9b3 bl 800c974 break; 800c60e: e00e b.n 800c62e USBD_CtlSendStatus(pdev); 800c610: 6878 ldr r0, [r7, #4] 800c612: f000 f9af bl 800c974 break; 800c616: e00a b.n 800c62e default: USBD_CtlError(pdev, req); 800c618: 6839 ldr r1, [r7, #0] 800c61a: 6878 ldr r0, [r7, #4] 800c61c: f000 f8e2 bl 800c7e4 USBD_ClrClassConfig(pdev, cfgidx); 800c620: 4b04 ldr r3, [pc, #16] @ (800c634 ) 800c622: 781b ldrb r3, [r3, #0] 800c624: 4619 mov r1, r3 800c626: 6878 ldr r0, [r7, #4] 800c628: f7ff f9ac bl 800b984 break; 800c62c: bf00 nop } } } 800c62e: 3708 adds r7, #8 800c630: 46bd mov sp, r7 800c632: bd80 pop {r7, pc} 800c634: 20000470 .word 0x20000470 0800c638 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c638: b580 push {r7, lr} 800c63a: b082 sub sp, #8 800c63c: af00 add r7, sp, #0 800c63e: 6078 str r0, [r7, #4] 800c640: 6039 str r1, [r7, #0] if (req->wLength != 1U) 800c642: 683b ldr r3, [r7, #0] 800c644: 88db ldrh r3, [r3, #6] 800c646: 2b01 cmp r3, #1 800c648: d004 beq.n 800c654 { USBD_CtlError(pdev, req); 800c64a: 6839 ldr r1, [r7, #0] 800c64c: 6878 ldr r0, [r7, #4] 800c64e: f000 f8c9 bl 800c7e4 default: USBD_CtlError(pdev, req); break; } } } 800c652: e022 b.n 800c69a switch (pdev->dev_state) 800c654: 687b ldr r3, [r7, #4] 800c656: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c65a: 2b02 cmp r3, #2 800c65c: dc02 bgt.n 800c664 800c65e: 2b00 cmp r3, #0 800c660: dc03 bgt.n 800c66a 800c662: e015 b.n 800c690 800c664: 2b03 cmp r3, #3 800c666: d00b beq.n 800c680 800c668: e012 b.n 800c690 pdev->dev_default_config = 0U; 800c66a: 687b ldr r3, [r7, #4] 800c66c: 2200 movs r2, #0 800c66e: 609a str r2, [r3, #8] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U); 800c670: 687b ldr r3, [r7, #4] 800c672: 3308 adds r3, #8 800c674: 2201 movs r2, #1 800c676: 4619 mov r1, r3 800c678: 6878 ldr r0, [r7, #4] 800c67a: f000 f91d bl 800c8b8 break; 800c67e: e00c b.n 800c69a USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U); 800c680: 687b ldr r3, [r7, #4] 800c682: 3304 adds r3, #4 800c684: 2201 movs r2, #1 800c686: 4619 mov r1, r3 800c688: 6878 ldr r0, [r7, #4] 800c68a: f000 f915 bl 800c8b8 break; 800c68e: e004 b.n 800c69a USBD_CtlError(pdev, req); 800c690: 6839 ldr r1, [r7, #0] 800c692: 6878 ldr r0, [r7, #4] 800c694: f000 f8a6 bl 800c7e4 break; 800c698: bf00 nop } 800c69a: bf00 nop 800c69c: 3708 adds r7, #8 800c69e: 46bd mov sp, r7 800c6a0: bd80 pop {r7, pc} 0800c6a2 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c6a2: b580 push {r7, lr} 800c6a4: b082 sub sp, #8 800c6a6: af00 add r7, sp, #0 800c6a8: 6078 str r0, [r7, #4] 800c6aa: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800c6ac: 687b ldr r3, [r7, #4] 800c6ae: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c6b2: 3b01 subs r3, #1 800c6b4: 2b02 cmp r3, #2 800c6b6: d81e bhi.n 800c6f6 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wLength != 0x2U) 800c6b8: 683b ldr r3, [r7, #0] 800c6ba: 88db ldrh r3, [r3, #6] 800c6bc: 2b02 cmp r3, #2 800c6be: d004 beq.n 800c6ca { USBD_CtlError(pdev, req); 800c6c0: 6839 ldr r1, [r7, #0] 800c6c2: 6878 ldr r0, [r7, #4] 800c6c4: f000 f88e bl 800c7e4 break; 800c6c8: e01a b.n 800c700 } #if (USBD_SELF_POWERED == 1U) pdev->dev_config_status = USB_CONFIG_SELF_POWERED; 800c6ca: 687b ldr r3, [r7, #4] 800c6cc: 2201 movs r2, #1 800c6ce: 60da str r2, [r3, #12] #else pdev->dev_config_status = 0U; #endif if (pdev->dev_remote_wakeup) 800c6d0: 687b ldr r3, [r7, #4] 800c6d2: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4 800c6d6: 2b00 cmp r3, #0 800c6d8: d005 beq.n 800c6e6 { pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; 800c6da: 687b ldr r3, [r7, #4] 800c6dc: 68db ldr r3, [r3, #12] 800c6de: f043 0202 orr.w r2, r3, #2 800c6e2: 687b ldr r3, [r7, #4] 800c6e4: 60da str r2, [r3, #12] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U); 800c6e6: 687b ldr r3, [r7, #4] 800c6e8: 330c adds r3, #12 800c6ea: 2202 movs r2, #2 800c6ec: 4619 mov r1, r3 800c6ee: 6878 ldr r0, [r7, #4] 800c6f0: f000 f8e2 bl 800c8b8 break; 800c6f4: e004 b.n 800c700 default: USBD_CtlError(pdev, req); 800c6f6: 6839 ldr r1, [r7, #0] 800c6f8: 6878 ldr r0, [r7, #4] 800c6fa: f000 f873 bl 800c7e4 break; 800c6fe: bf00 nop } } 800c700: bf00 nop 800c702: 3708 adds r7, #8 800c704: 46bd mov sp, r7 800c706: bd80 pop {r7, pc} 0800c708 : * @param req: usb request * @retval status */ static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c708: b580 push {r7, lr} 800c70a: b082 sub sp, #8 800c70c: af00 add r7, sp, #0 800c70e: 6078 str r0, [r7, #4] 800c710: 6039 str r1, [r7, #0] if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800c712: 683b ldr r3, [r7, #0] 800c714: 885b ldrh r3, [r3, #2] 800c716: 2b01 cmp r3, #1 800c718: d106 bne.n 800c728 { pdev->dev_remote_wakeup = 1U; 800c71a: 687b ldr r3, [r7, #4] 800c71c: 2201 movs r2, #1 800c71e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800c722: 6878 ldr r0, [r7, #4] 800c724: f000 f926 bl 800c974 } } 800c728: bf00 nop 800c72a: 3708 adds r7, #8 800c72c: 46bd mov sp, r7 800c72e: bd80 pop {r7, pc} 0800c730 : * @param req: usb request * @retval status */ static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c730: b580 push {r7, lr} 800c732: b082 sub sp, #8 800c734: af00 add r7, sp, #0 800c736: 6078 str r0, [r7, #4] 800c738: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800c73a: 687b ldr r3, [r7, #4] 800c73c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c740: 3b01 subs r3, #1 800c742: 2b02 cmp r3, #2 800c744: d80b bhi.n 800c75e { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800c746: 683b ldr r3, [r7, #0] 800c748: 885b ldrh r3, [r3, #2] 800c74a: 2b01 cmp r3, #1 800c74c: d10c bne.n 800c768 { pdev->dev_remote_wakeup = 0U; 800c74e: 687b ldr r3, [r7, #4] 800c750: 2200 movs r2, #0 800c752: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800c756: 6878 ldr r0, [r7, #4] 800c758: f000 f90c bl 800c974 } break; 800c75c: e004 b.n 800c768 default: USBD_CtlError(pdev, req); 800c75e: 6839 ldr r1, [r7, #0] 800c760: 6878 ldr r0, [r7, #4] 800c762: f000 f83f bl 800c7e4 break; 800c766: e000 b.n 800c76a break; 800c768: bf00 nop } } 800c76a: bf00 nop 800c76c: 3708 adds r7, #8 800c76e: 46bd mov sp, r7 800c770: bd80 pop {r7, pc} 0800c772 : * @param req: usb request * @retval None */ void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) { 800c772: b480 push {r7} 800c774: b083 sub sp, #12 800c776: af00 add r7, sp, #0 800c778: 6078 str r0, [r7, #4] 800c77a: 6039 str r1, [r7, #0] req->bmRequest = *(uint8_t *)(pdata); 800c77c: 683b ldr r3, [r7, #0] 800c77e: 781a ldrb r2, [r3, #0] 800c780: 687b ldr r3, [r7, #4] 800c782: 701a strb r2, [r3, #0] req->bRequest = *(uint8_t *)(pdata + 1U); 800c784: 683b ldr r3, [r7, #0] 800c786: 785a ldrb r2, [r3, #1] 800c788: 687b ldr r3, [r7, #4] 800c78a: 705a strb r2, [r3, #1] req->wValue = SWAPBYTE(pdata + 2U); 800c78c: 683b ldr r3, [r7, #0] 800c78e: 3302 adds r3, #2 800c790: 781b ldrb r3, [r3, #0] 800c792: 461a mov r2, r3 800c794: 683b ldr r3, [r7, #0] 800c796: 3303 adds r3, #3 800c798: 781b ldrb r3, [r3, #0] 800c79a: 021b lsls r3, r3, #8 800c79c: b29b uxth r3, r3 800c79e: 4413 add r3, r2 800c7a0: b29a uxth r2, r3 800c7a2: 687b ldr r3, [r7, #4] 800c7a4: 805a strh r2, [r3, #2] req->wIndex = SWAPBYTE(pdata + 4U); 800c7a6: 683b ldr r3, [r7, #0] 800c7a8: 3304 adds r3, #4 800c7aa: 781b ldrb r3, [r3, #0] 800c7ac: 461a mov r2, r3 800c7ae: 683b ldr r3, [r7, #0] 800c7b0: 3305 adds r3, #5 800c7b2: 781b ldrb r3, [r3, #0] 800c7b4: 021b lsls r3, r3, #8 800c7b6: b29b uxth r3, r3 800c7b8: 4413 add r3, r2 800c7ba: b29a uxth r2, r3 800c7bc: 687b ldr r3, [r7, #4] 800c7be: 809a strh r2, [r3, #4] req->wLength = SWAPBYTE(pdata + 6U); 800c7c0: 683b ldr r3, [r7, #0] 800c7c2: 3306 adds r3, #6 800c7c4: 781b ldrb r3, [r3, #0] 800c7c6: 461a mov r2, r3 800c7c8: 683b ldr r3, [r7, #0] 800c7ca: 3307 adds r3, #7 800c7cc: 781b ldrb r3, [r3, #0] 800c7ce: 021b lsls r3, r3, #8 800c7d0: b29b uxth r3, r3 800c7d2: 4413 add r3, r2 800c7d4: b29a uxth r2, r3 800c7d6: 687b ldr r3, [r7, #4] 800c7d8: 80da strh r2, [r3, #6] } 800c7da: bf00 nop 800c7dc: 370c adds r7, #12 800c7de: 46bd mov sp, r7 800c7e0: bc80 pop {r7} 800c7e2: 4770 bx lr 0800c7e4 : * @retval None */ void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c7e4: b580 push {r7, lr} 800c7e6: b082 sub sp, #8 800c7e8: af00 add r7, sp, #0 800c7ea: 6078 str r0, [r7, #4] 800c7ec: 6039 str r1, [r7, #0] USBD_LL_StallEP(pdev, 0x80U); 800c7ee: 2180 movs r1, #128 @ 0x80 800c7f0: 6878 ldr r0, [r7, #4] 800c7f2: f000 fcd1 bl 800d198 USBD_LL_StallEP(pdev, 0U); 800c7f6: 2100 movs r1, #0 800c7f8: 6878 ldr r0, [r7, #4] 800c7fa: f000 fccd bl 800d198 } 800c7fe: bf00 nop 800c800: 3708 adds r7, #8 800c802: 46bd mov sp, r7 800c804: bd80 pop {r7, pc} 0800c806 : * @param unicode : Formatted string buffer (unicode) * @param len : descriptor length * @retval None */ void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) { 800c806: b580 push {r7, lr} 800c808: b086 sub sp, #24 800c80a: af00 add r7, sp, #0 800c80c: 60f8 str r0, [r7, #12] 800c80e: 60b9 str r1, [r7, #8] 800c810: 607a str r2, [r7, #4] uint8_t idx = 0U; 800c812: 2300 movs r3, #0 800c814: 75fb strb r3, [r7, #23] if (desc != NULL) 800c816: 68fb ldr r3, [r7, #12] 800c818: 2b00 cmp r3, #0 800c81a: d032 beq.n 800c882 { *len = (uint16_t)USBD_GetLen(desc) * 2U + 2U; 800c81c: 68f8 ldr r0, [r7, #12] 800c81e: f000 f834 bl 800c88a 800c822: 4603 mov r3, r0 800c824: 3301 adds r3, #1 800c826: b29b uxth r3, r3 800c828: 005b lsls r3, r3, #1 800c82a: b29a uxth r2, r3 800c82c: 687b ldr r3, [r7, #4] 800c82e: 801a strh r2, [r3, #0] unicode[idx++] = *(uint8_t *)(void *)len; 800c830: 7dfb ldrb r3, [r7, #23] 800c832: 1c5a adds r2, r3, #1 800c834: 75fa strb r2, [r7, #23] 800c836: 461a mov r2, r3 800c838: 68bb ldr r3, [r7, #8] 800c83a: 4413 add r3, r2 800c83c: 687a ldr r2, [r7, #4] 800c83e: 7812 ldrb r2, [r2, #0] 800c840: 701a strb r2, [r3, #0] unicode[idx++] = USB_DESC_TYPE_STRING; 800c842: 7dfb ldrb r3, [r7, #23] 800c844: 1c5a adds r2, r3, #1 800c846: 75fa strb r2, [r7, #23] 800c848: 461a mov r2, r3 800c84a: 68bb ldr r3, [r7, #8] 800c84c: 4413 add r3, r2 800c84e: 2203 movs r2, #3 800c850: 701a strb r2, [r3, #0] while (*desc != '\0') 800c852: e012 b.n 800c87a { unicode[idx++] = *desc++; 800c854: 68fb ldr r3, [r7, #12] 800c856: 1c5a adds r2, r3, #1 800c858: 60fa str r2, [r7, #12] 800c85a: 7dfa ldrb r2, [r7, #23] 800c85c: 1c51 adds r1, r2, #1 800c85e: 75f9 strb r1, [r7, #23] 800c860: 4611 mov r1, r2 800c862: 68ba ldr r2, [r7, #8] 800c864: 440a add r2, r1 800c866: 781b ldrb r3, [r3, #0] 800c868: 7013 strb r3, [r2, #0] unicode[idx++] = 0U; 800c86a: 7dfb ldrb r3, [r7, #23] 800c86c: 1c5a adds r2, r3, #1 800c86e: 75fa strb r2, [r7, #23] 800c870: 461a mov r2, r3 800c872: 68bb ldr r3, [r7, #8] 800c874: 4413 add r3, r2 800c876: 2200 movs r2, #0 800c878: 701a strb r2, [r3, #0] while (*desc != '\0') 800c87a: 68fb ldr r3, [r7, #12] 800c87c: 781b ldrb r3, [r3, #0] 800c87e: 2b00 cmp r3, #0 800c880: d1e8 bne.n 800c854 } } } 800c882: bf00 nop 800c884: 3718 adds r7, #24 800c886: 46bd mov sp, r7 800c888: bd80 pop {r7, pc} 0800c88a : * return the string length * @param buf : pointer to the ascii string buffer * @retval string length */ static uint8_t USBD_GetLen(uint8_t *buf) { 800c88a: b480 push {r7} 800c88c: b085 sub sp, #20 800c88e: af00 add r7, sp, #0 800c890: 6078 str r0, [r7, #4] uint8_t len = 0U; 800c892: 2300 movs r3, #0 800c894: 73fb strb r3, [r7, #15] while (*buf != '\0') 800c896: e005 b.n 800c8a4 { len++; 800c898: 7bfb ldrb r3, [r7, #15] 800c89a: 3301 adds r3, #1 800c89c: 73fb strb r3, [r7, #15] buf++; 800c89e: 687b ldr r3, [r7, #4] 800c8a0: 3301 adds r3, #1 800c8a2: 607b str r3, [r7, #4] while (*buf != '\0') 800c8a4: 687b ldr r3, [r7, #4] 800c8a6: 781b ldrb r3, [r3, #0] 800c8a8: 2b00 cmp r3, #0 800c8aa: d1f5 bne.n 800c898 } return len; 800c8ac: 7bfb ldrb r3, [r7, #15] } 800c8ae: 4618 mov r0, r3 800c8b0: 3714 adds r7, #20 800c8b2: 46bd mov sp, r7 800c8b4: bc80 pop {r7} 800c8b6: 4770 bx lr 0800c8b8 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800c8b8: b580 push {r7, lr} 800c8ba: b084 sub sp, #16 800c8bc: af00 add r7, sp, #0 800c8be: 60f8 str r0, [r7, #12] 800c8c0: 60b9 str r1, [r7, #8] 800c8c2: 4613 mov r3, r2 800c8c4: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_IN; 800c8c6: 68fb ldr r3, [r7, #12] 800c8c8: 2202 movs r2, #2 800c8ca: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_in[0].total_length = len; 800c8ce: 88fa ldrh r2, [r7, #6] 800c8d0: 68fb ldr r3, [r7, #12] 800c8d2: 61da str r2, [r3, #28] pdev->ep_in[0].rem_length = len; 800c8d4: 88fa ldrh r2, [r7, #6] 800c8d6: 68fb ldr r3, [r7, #12] 800c8d8: 621a str r2, [r3, #32] /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800c8da: 88fb ldrh r3, [r7, #6] 800c8dc: 68ba ldr r2, [r7, #8] 800c8de: 2100 movs r1, #0 800c8e0: 68f8 ldr r0, [r7, #12] 800c8e2: f000 fce1 bl 800d2a8 return USBD_OK; 800c8e6: 2300 movs r3, #0 } 800c8e8: 4618 mov r0, r3 800c8ea: 3710 adds r7, #16 800c8ec: 46bd mov sp, r7 800c8ee: bd80 pop {r7, pc} 0800c8f0 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800c8f0: b580 push {r7, lr} 800c8f2: b084 sub sp, #16 800c8f4: af00 add r7, sp, #0 800c8f6: 60f8 str r0, [r7, #12] 800c8f8: 60b9 str r1, [r7, #8] 800c8fa: 4613 mov r3, r2 800c8fc: 80fb strh r3, [r7, #6] /* Start the next transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800c8fe: 88fb ldrh r3, [r7, #6] 800c900: 68ba ldr r2, [r7, #8] 800c902: 2100 movs r1, #0 800c904: 68f8 ldr r0, [r7, #12] 800c906: f000 fccf bl 800d2a8 return USBD_OK; 800c90a: 2300 movs r3, #0 } 800c90c: 4618 mov r0, r3 800c90e: 3710 adds r7, #16 800c910: 46bd mov sp, r7 800c912: bd80 pop {r7, pc} 0800c914 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800c914: b580 push {r7, lr} 800c916: b084 sub sp, #16 800c918: af00 add r7, sp, #0 800c91a: 60f8 str r0, [r7, #12] 800c91c: 60b9 str r1, [r7, #8] 800c91e: 4613 mov r3, r2 800c920: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_OUT; 800c922: 68fb ldr r3, [r7, #12] 800c924: 2203 movs r2, #3 800c926: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_out[0].total_length = len; 800c92a: 88fa ldrh r2, [r7, #6] 800c92c: 68fb ldr r3, [r7, #12] 800c92e: f8c3 215c str.w r2, [r3, #348] @ 0x15c pdev->ep_out[0].rem_length = len; 800c932: 88fa ldrh r2, [r7, #6] 800c934: 68fb ldr r3, [r7, #12] 800c936: f8c3 2160 str.w r2, [r3, #352] @ 0x160 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800c93a: 88fb ldrh r3, [r7, #6] 800c93c: 68ba ldr r2, [r7, #8] 800c93e: 2100 movs r1, #0 800c940: 68f8 ldr r0, [r7, #12] 800c942: f000 fcd4 bl 800d2ee return USBD_OK; 800c946: 2300 movs r3, #0 } 800c948: 4618 mov r0, r3 800c94a: 3710 adds r7, #16 800c94c: 46bd mov sp, r7 800c94e: bd80 pop {r7, pc} 0800c950 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800c950: b580 push {r7, lr} 800c952: b084 sub sp, #16 800c954: af00 add r7, sp, #0 800c956: 60f8 str r0, [r7, #12] 800c958: 60b9 str r1, [r7, #8] 800c95a: 4613 mov r3, r2 800c95c: 80fb strh r3, [r7, #6] USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800c95e: 88fb ldrh r3, [r7, #6] 800c960: 68ba ldr r2, [r7, #8] 800c962: 2100 movs r1, #0 800c964: 68f8 ldr r0, [r7, #12] 800c966: f000 fcc2 bl 800d2ee return USBD_OK; 800c96a: 2300 movs r3, #0 } 800c96c: 4618 mov r0, r3 800c96e: 3710 adds r7, #16 800c970: 46bd mov sp, r7 800c972: bd80 pop {r7, pc} 0800c974 : * send zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) { 800c974: b580 push {r7, lr} 800c976: b082 sub sp, #8 800c978: af00 add r7, sp, #0 800c97a: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_IN; 800c97c: 687b ldr r3, [r7, #4] 800c97e: 2204 movs r2, #4 800c980: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); 800c984: 2300 movs r3, #0 800c986: 2200 movs r2, #0 800c988: 2100 movs r1, #0 800c98a: 6878 ldr r0, [r7, #4] 800c98c: f000 fc8c bl 800d2a8 return USBD_OK; 800c990: 2300 movs r3, #0 } 800c992: 4618 mov r0, r3 800c994: 3708 adds r7, #8 800c996: 46bd mov sp, r7 800c998: bd80 pop {r7, pc} 0800c99a : * receive zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) { 800c99a: b580 push {r7, lr} 800c99c: b082 sub sp, #8 800c99e: af00 add r7, sp, #0 800c9a0: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_OUT; 800c9a2: 687b ldr r3, [r7, #4] 800c9a4: 2205 movs r2, #5 800c9a6: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800c9aa: 2300 movs r3, #0 800c9ac: 2200 movs r2, #0 800c9ae: 2100 movs r1, #0 800c9b0: 6878 ldr r0, [r7, #4] 800c9b2: f000 fc9c bl 800d2ee return USBD_OK; 800c9b6: 2300 movs r3, #0 } 800c9b8: 4618 mov r0, r3 800c9ba: 3708 adds r7, #8 800c9bc: 46bd mov sp, r7 800c9be: bd80 pop {r7, pc} 0800c9c0 : /** * Init USB device Library, add supported class and start the library * @retval None */ void MX_USB_DEVICE_Init(void) { 800c9c0: b580 push {r7, lr} 800c9c2: af00 add r7, sp, #0 /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ /* USER CODE END USB_DEVICE_Init_PreTreatment */ /* Init Device Library, add supported class and start the library. */ if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK) 800c9c4: 2200 movs r2, #0 800c9c6: 4912 ldr r1, [pc, #72] @ (800ca10 ) 800c9c8: 4812 ldr r0, [pc, #72] @ (800ca14 ) 800c9ca: f7fe ff62 bl 800b892 800c9ce: 4603 mov r3, r0 800c9d0: 2b00 cmp r3, #0 800c9d2: d001 beq.n 800c9d8 { Error_Handler(); 800c9d4: f7f6 fce0 bl 8003398 } if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK) 800c9d8: 490f ldr r1, [pc, #60] @ (800ca18 ) 800c9da: 480e ldr r0, [pc, #56] @ (800ca14 ) 800c9dc: f7fe ff84 bl 800b8e8 800c9e0: 4603 mov r3, r0 800c9e2: 2b00 cmp r3, #0 800c9e4: d001 beq.n 800c9ea { Error_Handler(); 800c9e6: f7f6 fcd7 bl 8003398 } if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK) 800c9ea: 490c ldr r1, [pc, #48] @ (800ca1c ) 800c9ec: 4809 ldr r0, [pc, #36] @ (800ca14 ) 800c9ee: f7fe feb5 bl 800b75c 800c9f2: 4603 mov r3, r0 800c9f4: 2b00 cmp r3, #0 800c9f6: d001 beq.n 800c9fc { Error_Handler(); 800c9f8: f7f6 fcce bl 8003398 } if (USBD_Start(&hUsbDeviceFS) != USBD_OK) 800c9fc: 4805 ldr r0, [pc, #20] @ (800ca14 ) 800c9fe: f7fe ff8c bl 800b91a 800ca02: 4603 mov r3, r0 800ca04: 2b00 cmp r3, #0 800ca06: d001 beq.n 800ca0c { Error_Handler(); 800ca08: f7f6 fcc6 bl 8003398 } /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ /* USER CODE END USB_DEVICE_Init_PostTreatment */ } 800ca0c: bf00 nop 800ca0e: bd80 pop {r7, pc} 800ca10: 20000134 .word 0x20000134 800ca14: 20000474 .word 0x20000474 800ca18: 20000020 .word 0x20000020 800ca1c: 20000124 .word 0x20000124 0800ca20 : /* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ #define RX_FIFO_SZ 256 static uint8_t rx_fifo[RX_FIFO_SZ]; static volatile uint16_t rx_head = 0, rx_tail = 0; static void fifo_push(const uint8_t* data, uint32_t len) { 800ca20: b480 push {r7} 800ca22: b085 sub sp, #20 800ca24: af00 add r7, sp, #0 800ca26: 6078 str r0, [r7, #4] 800ca28: 6039 str r1, [r7, #0] while (len--) { 800ca2a: e01e b.n 800ca6a uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u); 800ca2c: 4b14 ldr r3, [pc, #80] @ (800ca80 ) 800ca2e: 881b ldrh r3, [r3, #0] 800ca30: b29b uxth r3, r3 800ca32: 3301 adds r3, #1 800ca34: b29b uxth r3, r3 800ca36: b2db uxtb r3, r3 800ca38: 81fb strh r3, [r7, #14] if (next == (rx_tail & (RX_FIFO_SZ - 1u))) { 800ca3a: 89fa ldrh r2, [r7, #14] 800ca3c: 4b11 ldr r3, [pc, #68] @ (800ca84 ) 800ca3e: 881b ldrh r3, [r3, #0] 800ca40: b29b uxth r3, r3 800ca42: b2db uxtb r3, r3 800ca44: 429a cmp r2, r3 800ca46: d103 bne.n 800ca50 /* overflow — drop byte (or set a flag) */ data++; 800ca48: 687b ldr r3, [r7, #4] 800ca4a: 3301 adds r3, #1 800ca4c: 607b str r3, [r7, #4] continue; 800ca4e: e00c b.n 800ca6a } rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++; 800ca50: 687b ldr r3, [r7, #4] 800ca52: 1c5a adds r2, r3, #1 800ca54: 607a str r2, [r7, #4] 800ca56: 4a0a ldr r2, [pc, #40] @ (800ca80 ) 800ca58: 8812 ldrh r2, [r2, #0] 800ca5a: b292 uxth r2, r2 800ca5c: b2d2 uxtb r2, r2 800ca5e: 7819 ldrb r1, [r3, #0] 800ca60: 4b09 ldr r3, [pc, #36] @ (800ca88 ) 800ca62: 5499 strb r1, [r3, r2] rx_head = next; 800ca64: 4a06 ldr r2, [pc, #24] @ (800ca80 ) 800ca66: 89fb ldrh r3, [r7, #14] 800ca68: 8013 strh r3, [r2, #0] while (len--) { 800ca6a: 683b ldr r3, [r7, #0] 800ca6c: 1e5a subs r2, r3, #1 800ca6e: 603a str r2, [r7, #0] 800ca70: 2b00 cmp r3, #0 800ca72: d1db bne.n 800ca2c } } 800ca74: bf00 nop 800ca76: bf00 nop 800ca78: 3714 adds r7, #20 800ca7a: 46bd mov sp, r7 800ca7c: bc80 pop {r7} 800ca7e: 4770 bx lr 800ca80: 20001038 .word 0x20001038 800ca84: 2000103a .word 0x2000103a 800ca88: 20000f38 .word 0x20000f38 0800ca8c : uint32_t CDC_Available(void) { 800ca8c: b480 push {r7} 800ca8e: af00 add r7, sp, #0 return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u)); 800ca90: 4b06 ldr r3, [pc, #24] @ (800caac ) 800ca92: 881b ldrh r3, [r3, #0] 800ca94: b29a uxth r2, r3 800ca96: 4b06 ldr r3, [pc, #24] @ (800cab0 ) 800ca98: 881b ldrh r3, [r3, #0] 800ca9a: b29b uxth r3, r3 800ca9c: 1ad3 subs r3, r2, r3 800ca9e: b29b uxth r3, r3 800caa0: b2db uxtb r3, r3 } 800caa2: 4618 mov r0, r3 800caa4: 46bd mov sp, r7 800caa6: bc80 pop {r7} 800caa8: 4770 bx lr 800caaa: bf00 nop 800caac: 20001038 .word 0x20001038 800cab0: 2000103a .word 0x2000103a 0800cab4 : int CDC_ReadByte(void) { 800cab4: b480 push {r7} 800cab6: b083 sub sp, #12 800cab8: af00 add r7, sp, #0 if (rx_tail == rx_head) return -1; 800caba: 4b10 ldr r3, [pc, #64] @ (800cafc ) 800cabc: 881b ldrh r3, [r3, #0] 800cabe: b29a uxth r2, r3 800cac0: 4b0f ldr r3, [pc, #60] @ (800cb00 ) 800cac2: 881b ldrh r3, [r3, #0] 800cac4: b29b uxth r3, r3 800cac6: 429a cmp r2, r3 800cac8: d102 bne.n 800cad0 800caca: f04f 33ff mov.w r3, #4294967295 800cace: e010 b.n 800caf2 int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)]; 800cad0: 4b0a ldr r3, [pc, #40] @ (800cafc ) 800cad2: 881b ldrh r3, [r3, #0] 800cad4: b29b uxth r3, r3 800cad6: b2db uxtb r3, r3 800cad8: 4a0a ldr r2, [pc, #40] @ (800cb04 ) 800cada: 5cd3 ldrb r3, [r2, r3] 800cadc: 607b str r3, [r7, #4] rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u); 800cade: 4b07 ldr r3, [pc, #28] @ (800cafc ) 800cae0: 881b ldrh r3, [r3, #0] 800cae2: b29b uxth r3, r3 800cae4: 3301 adds r3, #1 800cae6: b29b uxth r3, r3 800cae8: b2db uxtb r3, r3 800caea: b29a uxth r2, r3 800caec: 4b03 ldr r3, [pc, #12] @ (800cafc ) 800caee: 801a strh r2, [r3, #0] return b; 800caf0: 687b ldr r3, [r7, #4] } 800caf2: 4618 mov r0, r3 800caf4: 370c adds r7, #12 800caf6: 46bd mov sp, r7 800caf8: bc80 pop {r7} 800cafa: 4770 bx lr 800cafc: 2000103a .word 0x2000103a 800cb00: 20001038 .word 0x20001038 800cb04: 20000f38 .word 0x20000f38 0800cb08 : /** * @brief Initializes the CDC media low layer over the FS USB IP * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Init_FS(void) { 800cb08: b580 push {r7, lr} 800cb0a: af00 add r7, sp, #0 /* USER CODE BEGIN 3 */ /* Set Application Buffers */ USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0); 800cb0c: 2200 movs r2, #0 800cb0e: 4905 ldr r1, [pc, #20] @ (800cb24 ) 800cb10: 4805 ldr r0, [pc, #20] @ (800cb28 ) 800cb12: f7fe fe39 bl 800b788 USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS); 800cb16: 4905 ldr r1, [pc, #20] @ (800cb2c ) 800cb18: 4803 ldr r0, [pc, #12] @ (800cb28 ) 800cb1a: f7fe fe4e bl 800b7ba return (USBD_OK); 800cb1e: 2300 movs r3, #0 /* USER CODE END 3 */ } 800cb20: 4618 mov r0, r3 800cb22: bd80 pop {r7, pc} 800cb24: 20000b38 .word 0x20000b38 800cb28: 20000474 .word 0x20000474 800cb2c: 20000738 .word 0x20000738 0800cb30 : /** * @brief DeInitializes the CDC media low layer * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_DeInit_FS(void) { 800cb30: b480 push {r7} 800cb32: af00 add r7, sp, #0 /* USER CODE BEGIN 4 */ return (USBD_OK); 800cb34: 2300 movs r3, #0 /* USER CODE END 4 */ } 800cb36: 4618 mov r0, r3 800cb38: 46bd mov sp, r7 800cb3a: bc80 pop {r7} 800cb3c: 4770 bx lr ... 0800cb40 : * @param pbuf: Buffer containing command data (request parameters) * @param length: Number of data to be sent (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length) { 800cb40: b480 push {r7} 800cb42: b083 sub sp, #12 800cb44: af00 add r7, sp, #0 800cb46: 4603 mov r3, r0 800cb48: 6039 str r1, [r7, #0] 800cb4a: 71fb strb r3, [r7, #7] 800cb4c: 4613 mov r3, r2 800cb4e: 80bb strh r3, [r7, #4] /* USER CODE BEGIN 5 */ switch(cmd) 800cb50: 79fb ldrb r3, [r7, #7] 800cb52: 2b23 cmp r3, #35 @ 0x23 800cb54: d84a bhi.n 800cbec 800cb56: a201 add r2, pc, #4 @ (adr r2, 800cb5c ) 800cb58: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cb5c: 0800cbed .word 0x0800cbed 800cb60: 0800cbed .word 0x0800cbed 800cb64: 0800cbed .word 0x0800cbed 800cb68: 0800cbed .word 0x0800cbed 800cb6c: 0800cbed .word 0x0800cbed 800cb70: 0800cbed .word 0x0800cbed 800cb74: 0800cbed .word 0x0800cbed 800cb78: 0800cbed .word 0x0800cbed 800cb7c: 0800cbed .word 0x0800cbed 800cb80: 0800cbed .word 0x0800cbed 800cb84: 0800cbed .word 0x0800cbed 800cb88: 0800cbed .word 0x0800cbed 800cb8c: 0800cbed .word 0x0800cbed 800cb90: 0800cbed .word 0x0800cbed 800cb94: 0800cbed .word 0x0800cbed 800cb98: 0800cbed .word 0x0800cbed 800cb9c: 0800cbed .word 0x0800cbed 800cba0: 0800cbed .word 0x0800cbed 800cba4: 0800cbed .word 0x0800cbed 800cba8: 0800cbed .word 0x0800cbed 800cbac: 0800cbed .word 0x0800cbed 800cbb0: 0800cbed .word 0x0800cbed 800cbb4: 0800cbed .word 0x0800cbed 800cbb8: 0800cbed .word 0x0800cbed 800cbbc: 0800cbed .word 0x0800cbed 800cbc0: 0800cbed .word 0x0800cbed 800cbc4: 0800cbed .word 0x0800cbed 800cbc8: 0800cbed .word 0x0800cbed 800cbcc: 0800cbed .word 0x0800cbed 800cbd0: 0800cbed .word 0x0800cbed 800cbd4: 0800cbed .word 0x0800cbed 800cbd8: 0800cbed .word 0x0800cbed 800cbdc: 0800cbed .word 0x0800cbed 800cbe0: 0800cbed .word 0x0800cbed 800cbe4: 0800cbed .word 0x0800cbed 800cbe8: 0800cbed .word 0x0800cbed case CDC_SEND_BREAK: break; default: break; 800cbec: bf00 nop } return (USBD_OK); 800cbee: 2300 movs r3, #0 /* USER CODE END 5 */ } 800cbf0: 4618 mov r0, r3 800cbf2: 370c adds r7, #12 800cbf4: 46bd mov sp, r7 800cbf6: bc80 pop {r7} 800cbf8: 4770 bx lr 800cbfa: bf00 nop 0800cbfc : * @param Buf: Buffer of data to be received * @param Len: Number of data received (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len) { 800cbfc: b580 push {r7, lr} 800cbfe: b082 sub sp, #8 800cc00: af00 add r7, sp, #0 800cc02: 6078 str r0, [r7, #4] 800cc04: 6039 str r1, [r7, #0] /* USER CODE BEGIN 6 */ if (*Len) fifo_push(Buf, *Len); 800cc06: 683b ldr r3, [r7, #0] 800cc08: 681b ldr r3, [r3, #0] 800cc0a: 2b00 cmp r3, #0 800cc0c: d005 beq.n 800cc1a 800cc0e: 683b ldr r3, [r7, #0] 800cc10: 681b ldr r3, [r3, #0] 800cc12: 4619 mov r1, r3 800cc14: 6878 ldr r0, [r7, #4] 800cc16: f7ff ff03 bl 800ca20 USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); 800cc1a: 6879 ldr r1, [r7, #4] 800cc1c: 4805 ldr r0, [pc, #20] @ (800cc34 ) 800cc1e: f7fe fdcc bl 800b7ba USBD_CDC_ReceivePacket(&hUsbDeviceFS); 800cc22: 4804 ldr r0, [pc, #16] @ (800cc34 ) 800cc24: f7fe fe0b bl 800b83e return (USBD_OK); 800cc28: 2300 movs r3, #0 /* USER CODE END 6 */ } 800cc2a: 4618 mov r0, r3 800cc2c: 3708 adds r7, #8 800cc2e: 46bd mov sp, r7 800cc30: bd80 pop {r7, pc} 800cc32: bf00 nop 800cc34: 20000474 .word 0x20000474 0800cc38 : * @param Buf: Buffer of data to be sent * @param Len: Number of data to be sent (in bytes) * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY */ uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) { 800cc38: b580 push {r7, lr} 800cc3a: b084 sub sp, #16 800cc3c: af00 add r7, sp, #0 800cc3e: 6078 str r0, [r7, #4] 800cc40: 460b mov r3, r1 800cc42: 807b strh r3, [r7, #2] uint8_t result = USBD_OK; 800cc44: 2300 movs r3, #0 800cc46: 73fb strb r3, [r7, #15] /* USER CODE BEGIN 7 */ USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData; 800cc48: 4b0d ldr r3, [pc, #52] @ (800cc80 ) 800cc4a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800cc4e: 60bb str r3, [r7, #8] if (hcdc->TxState != 0){ 800cc50: 68bb ldr r3, [r7, #8] 800cc52: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 800cc56: 2b00 cmp r3, #0 800cc58: d001 beq.n 800cc5e return USBD_BUSY; 800cc5a: 2301 movs r3, #1 800cc5c: e00b b.n 800cc76 } USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len); 800cc5e: 887b ldrh r3, [r7, #2] 800cc60: 461a mov r2, r3 800cc62: 6879 ldr r1, [r7, #4] 800cc64: 4806 ldr r0, [pc, #24] @ (800cc80 ) 800cc66: f7fe fd8f bl 800b788 result = USBD_CDC_TransmitPacket(&hUsbDeviceFS); 800cc6a: 4805 ldr r0, [pc, #20] @ (800cc80 ) 800cc6c: f7fe fdb8 bl 800b7e0 800cc70: 4603 mov r3, r0 800cc72: 73fb strb r3, [r7, #15] /* USER CODE END 7 */ return result; 800cc74: 7bfb ldrb r3, [r7, #15] } 800cc76: 4618 mov r0, r3 800cc78: 3710 adds r7, #16 800cc7a: 46bd mov sp, r7 800cc7c: bd80 pop {r7, pc} 800cc7e: bf00 nop 800cc80: 20000474 .word 0x20000474 0800cc84 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cc84: b480 push {r7} 800cc86: b083 sub sp, #12 800cc88: af00 add r7, sp, #0 800cc8a: 4603 mov r3, r0 800cc8c: 6039 str r1, [r7, #0] 800cc8e: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_DeviceDesc); 800cc90: 683b ldr r3, [r7, #0] 800cc92: 2212 movs r2, #18 800cc94: 801a strh r2, [r3, #0] return USBD_FS_DeviceDesc; 800cc96: 4b03 ldr r3, [pc, #12] @ (800cca4 ) } 800cc98: 4618 mov r0, r3 800cc9a: 370c adds r7, #12 800cc9c: 46bd mov sp, r7 800cc9e: bc80 pop {r7} 800cca0: 4770 bx lr 800cca2: bf00 nop 800cca4: 20000150 .word 0x20000150 0800cca8 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cca8: b480 push {r7} 800ccaa: b083 sub sp, #12 800ccac: af00 add r7, sp, #0 800ccae: 4603 mov r3, r0 800ccb0: 6039 str r1, [r7, #0] 800ccb2: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_LangIDDesc); 800ccb4: 683b ldr r3, [r7, #0] 800ccb6: 2204 movs r2, #4 800ccb8: 801a strh r2, [r3, #0] return USBD_LangIDDesc; 800ccba: 4b03 ldr r3, [pc, #12] @ (800ccc8 ) } 800ccbc: 4618 mov r0, r3 800ccbe: 370c adds r7, #12 800ccc0: 46bd mov sp, r7 800ccc2: bc80 pop {r7} 800ccc4: 4770 bx lr 800ccc6: bf00 nop 800ccc8: 20000164 .word 0x20000164 0800cccc : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cccc: b580 push {r7, lr} 800ccce: b082 sub sp, #8 800ccd0: af00 add r7, sp, #0 800ccd2: 4603 mov r3, r0 800ccd4: 6039 str r1, [r7, #0] 800ccd6: 71fb strb r3, [r7, #7] if(speed == 0) 800ccd8: 79fb ldrb r3, [r7, #7] 800ccda: 2b00 cmp r3, #0 800ccdc: d105 bne.n 800ccea { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800ccde: 683a ldr r2, [r7, #0] 800cce0: 4907 ldr r1, [pc, #28] @ (800cd00 ) 800cce2: 4808 ldr r0, [pc, #32] @ (800cd04 ) 800cce4: f7ff fd8f bl 800c806 800cce8: e004 b.n 800ccf4 } else { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800ccea: 683a ldr r2, [r7, #0] 800ccec: 4904 ldr r1, [pc, #16] @ (800cd00 ) 800ccee: 4805 ldr r0, [pc, #20] @ (800cd04 ) 800ccf0: f7ff fd89 bl 800c806 } return USBD_StrDesc; 800ccf4: 4b02 ldr r3, [pc, #8] @ (800cd00 ) } 800ccf6: 4618 mov r0, r3 800ccf8: 3708 adds r7, #8 800ccfa: 46bd mov sp, r7 800ccfc: bd80 pop {r7, pc} 800ccfe: bf00 nop 800cd00: 2000103c .word 0x2000103c 800cd04: 0800df9c .word 0x0800df9c 0800cd08 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cd08: b580 push {r7, lr} 800cd0a: b082 sub sp, #8 800cd0c: af00 add r7, sp, #0 800cd0e: 4603 mov r3, r0 800cd10: 6039 str r1, [r7, #0] 800cd12: 71fb strb r3, [r7, #7] UNUSED(speed); USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 800cd14: 683a ldr r2, [r7, #0] 800cd16: 4904 ldr r1, [pc, #16] @ (800cd28 ) 800cd18: 4804 ldr r0, [pc, #16] @ (800cd2c ) 800cd1a: f7ff fd74 bl 800c806 return USBD_StrDesc; 800cd1e: 4b02 ldr r3, [pc, #8] @ (800cd28 ) } 800cd20: 4618 mov r0, r3 800cd22: 3708 adds r7, #8 800cd24: 46bd mov sp, r7 800cd26: bd80 pop {r7, pc} 800cd28: 2000103c .word 0x2000103c 800cd2c: 0800dfb4 .word 0x0800dfb4 0800cd30 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cd30: b580 push {r7, lr} 800cd32: b082 sub sp, #8 800cd34: af00 add r7, sp, #0 800cd36: 4603 mov r3, r0 800cd38: 6039 str r1, [r7, #0] 800cd3a: 71fb strb r3, [r7, #7] UNUSED(speed); *length = USB_SIZ_STRING_SERIAL; 800cd3c: 683b ldr r3, [r7, #0] 800cd3e: 221a movs r2, #26 800cd40: 801a strh r2, [r3, #0] /* Update the serial number string descriptor with the data from the unique * ID */ Get_SerialNum(); 800cd42: f000 f843 bl 800cdcc /* USER CODE BEGIN USBD_FS_SerialStrDescriptor */ /* USER CODE END USBD_FS_SerialStrDescriptor */ return (uint8_t *) USBD_StringSerial; 800cd46: 4b02 ldr r3, [pc, #8] @ (800cd50 ) } 800cd48: 4618 mov r0, r3 800cd4a: 3708 adds r7, #8 800cd4c: 46bd mov sp, r7 800cd4e: bd80 pop {r7, pc} 800cd50: 20000168 .word 0x20000168 0800cd54 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cd54: b580 push {r7, lr} 800cd56: b082 sub sp, #8 800cd58: af00 add r7, sp, #0 800cd5a: 4603 mov r3, r0 800cd5c: 6039 str r1, [r7, #0] 800cd5e: 71fb strb r3, [r7, #7] if(speed == USBD_SPEED_HIGH) 800cd60: 79fb ldrb r3, [r7, #7] 800cd62: 2b00 cmp r3, #0 800cd64: d105 bne.n 800cd72 { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800cd66: 683a ldr r2, [r7, #0] 800cd68: 4907 ldr r1, [pc, #28] @ (800cd88 ) 800cd6a: 4808 ldr r0, [pc, #32] @ (800cd8c ) 800cd6c: f7ff fd4b bl 800c806 800cd70: e004 b.n 800cd7c } else { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800cd72: 683a ldr r2, [r7, #0] 800cd74: 4904 ldr r1, [pc, #16] @ (800cd88 ) 800cd76: 4805 ldr r0, [pc, #20] @ (800cd8c ) 800cd78: f7ff fd45 bl 800c806 } return USBD_StrDesc; 800cd7c: 4b02 ldr r3, [pc, #8] @ (800cd88 ) } 800cd7e: 4618 mov r0, r3 800cd80: 3708 adds r7, #8 800cd82: 46bd mov sp, r7 800cd84: bd80 pop {r7, pc} 800cd86: bf00 nop 800cd88: 2000103c .word 0x2000103c 800cd8c: 0800dfc8 .word 0x0800dfc8 0800cd90 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cd90: b580 push {r7, lr} 800cd92: b082 sub sp, #8 800cd94: af00 add r7, sp, #0 800cd96: 4603 mov r3, r0 800cd98: 6039 str r1, [r7, #0] 800cd9a: 71fb strb r3, [r7, #7] if(speed == 0) 800cd9c: 79fb ldrb r3, [r7, #7] 800cd9e: 2b00 cmp r3, #0 800cda0: d105 bne.n 800cdae { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800cda2: 683a ldr r2, [r7, #0] 800cda4: 4907 ldr r1, [pc, #28] @ (800cdc4 ) 800cda6: 4808 ldr r0, [pc, #32] @ (800cdc8 ) 800cda8: f7ff fd2d bl 800c806 800cdac: e004 b.n 800cdb8 } else { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800cdae: 683a ldr r2, [r7, #0] 800cdb0: 4904 ldr r1, [pc, #16] @ (800cdc4 ) 800cdb2: 4805 ldr r0, [pc, #20] @ (800cdc8 ) 800cdb4: f7ff fd27 bl 800c806 } return USBD_StrDesc; 800cdb8: 4b02 ldr r3, [pc, #8] @ (800cdc4 ) } 800cdba: 4618 mov r0, r3 800cdbc: 3708 adds r7, #8 800cdbe: 46bd mov sp, r7 800cdc0: bd80 pop {r7, pc} 800cdc2: bf00 nop 800cdc4: 2000103c .word 0x2000103c 800cdc8: 0800dfd4 .word 0x0800dfd4 0800cdcc : * @brief Create the serial number string descriptor * @param None * @retval None */ static void Get_SerialNum(void) { 800cdcc: b580 push {r7, lr} 800cdce: b084 sub sp, #16 800cdd0: af00 add r7, sp, #0 uint32_t deviceserial0; uint32_t deviceserial1; uint32_t deviceserial2; deviceserial0 = *(uint32_t *) DEVICE_ID1; 800cdd2: 4b0f ldr r3, [pc, #60] @ (800ce10 ) 800cdd4: 681b ldr r3, [r3, #0] 800cdd6: 60fb str r3, [r7, #12] deviceserial1 = *(uint32_t *) DEVICE_ID2; 800cdd8: 4b0e ldr r3, [pc, #56] @ (800ce14 ) 800cdda: 681b ldr r3, [r3, #0] 800cddc: 60bb str r3, [r7, #8] deviceserial2 = *(uint32_t *) DEVICE_ID3; 800cdde: 4b0e ldr r3, [pc, #56] @ (800ce18 ) 800cde0: 681b ldr r3, [r3, #0] 800cde2: 607b str r3, [r7, #4] deviceserial0 += deviceserial2; 800cde4: 68fa ldr r2, [r7, #12] 800cde6: 687b ldr r3, [r7, #4] 800cde8: 4413 add r3, r2 800cdea: 60fb str r3, [r7, #12] if (deviceserial0 != 0) 800cdec: 68fb ldr r3, [r7, #12] 800cdee: 2b00 cmp r3, #0 800cdf0: d009 beq.n 800ce06 { IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8); 800cdf2: 2208 movs r2, #8 800cdf4: 4909 ldr r1, [pc, #36] @ (800ce1c ) 800cdf6: 68f8 ldr r0, [r7, #12] 800cdf8: f000 f814 bl 800ce24 IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4); 800cdfc: 2204 movs r2, #4 800cdfe: 4908 ldr r1, [pc, #32] @ (800ce20 ) 800ce00: 68b8 ldr r0, [r7, #8] 800ce02: f000 f80f bl 800ce24 } } 800ce06: bf00 nop 800ce08: 3710 adds r7, #16 800ce0a: 46bd mov sp, r7 800ce0c: bd80 pop {r7, pc} 800ce0e: bf00 nop 800ce10: 1ffff7e8 .word 0x1ffff7e8 800ce14: 1ffff7ec .word 0x1ffff7ec 800ce18: 1ffff7f0 .word 0x1ffff7f0 800ce1c: 2000016a .word 0x2000016a 800ce20: 2000017a .word 0x2000017a 0800ce24 : * @param pbuf: pointer to the buffer * @param len: buffer length * @retval None */ static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len) { 800ce24: b480 push {r7} 800ce26: b087 sub sp, #28 800ce28: af00 add r7, sp, #0 800ce2a: 60f8 str r0, [r7, #12] 800ce2c: 60b9 str r1, [r7, #8] 800ce2e: 4613 mov r3, r2 800ce30: 71fb strb r3, [r7, #7] uint8_t idx = 0; 800ce32: 2300 movs r3, #0 800ce34: 75fb strb r3, [r7, #23] for (idx = 0; idx < len; idx++) 800ce36: 2300 movs r3, #0 800ce38: 75fb strb r3, [r7, #23] 800ce3a: e027 b.n 800ce8c { if (((value >> 28)) < 0xA) 800ce3c: 68fb ldr r3, [r7, #12] 800ce3e: 0f1b lsrs r3, r3, #28 800ce40: 2b09 cmp r3, #9 800ce42: d80b bhi.n 800ce5c { pbuf[2 * idx] = (value >> 28) + '0'; 800ce44: 68fb ldr r3, [r7, #12] 800ce46: 0f1b lsrs r3, r3, #28 800ce48: b2da uxtb r2, r3 800ce4a: 7dfb ldrb r3, [r7, #23] 800ce4c: 005b lsls r3, r3, #1 800ce4e: 4619 mov r1, r3 800ce50: 68bb ldr r3, [r7, #8] 800ce52: 440b add r3, r1 800ce54: 3230 adds r2, #48 @ 0x30 800ce56: b2d2 uxtb r2, r2 800ce58: 701a strb r2, [r3, #0] 800ce5a: e00a b.n 800ce72 } else { pbuf[2 * idx] = (value >> 28) + 'A' - 10; 800ce5c: 68fb ldr r3, [r7, #12] 800ce5e: 0f1b lsrs r3, r3, #28 800ce60: b2da uxtb r2, r3 800ce62: 7dfb ldrb r3, [r7, #23] 800ce64: 005b lsls r3, r3, #1 800ce66: 4619 mov r1, r3 800ce68: 68bb ldr r3, [r7, #8] 800ce6a: 440b add r3, r1 800ce6c: 3237 adds r2, #55 @ 0x37 800ce6e: b2d2 uxtb r2, r2 800ce70: 701a strb r2, [r3, #0] } value = value << 4; 800ce72: 68fb ldr r3, [r7, #12] 800ce74: 011b lsls r3, r3, #4 800ce76: 60fb str r3, [r7, #12] pbuf[2 * idx + 1] = 0; 800ce78: 7dfb ldrb r3, [r7, #23] 800ce7a: 005b lsls r3, r3, #1 800ce7c: 3301 adds r3, #1 800ce7e: 68ba ldr r2, [r7, #8] 800ce80: 4413 add r3, r2 800ce82: 2200 movs r2, #0 800ce84: 701a strb r2, [r3, #0] for (idx = 0; idx < len; idx++) 800ce86: 7dfb ldrb r3, [r7, #23] 800ce88: 3301 adds r3, #1 800ce8a: 75fb strb r3, [r7, #23] 800ce8c: 7dfa ldrb r2, [r7, #23] 800ce8e: 79fb ldrb r3, [r7, #7] 800ce90: 429a cmp r2, r3 800ce92: d3d3 bcc.n 800ce3c } } 800ce94: bf00 nop 800ce96: bf00 nop 800ce98: 371c adds r7, #28 800ce9a: 46bd mov sp, r7 800ce9c: bc80 pop {r7} 800ce9e: 4770 bx lr 0800cea0 : LL Driver Callbacks (PCD -> USB Device Library) *******************************************************************************/ /* MSP Init */ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) { 800cea0: b580 push {r7, lr} 800cea2: b084 sub sp, #16 800cea4: af00 add r7, sp, #0 800cea6: 6078 str r0, [r7, #4] if(pcdHandle->Instance==USB) 800cea8: 687b ldr r3, [r7, #4] 800ceaa: 681b ldr r3, [r3, #0] 800ceac: 4a0d ldr r2, [pc, #52] @ (800cee4 ) 800ceae: 4293 cmp r3, r2 800ceb0: d113 bne.n 800ceda { /* USER CODE BEGIN USB_MspInit 0 */ /* USER CODE END USB_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USB_CLK_ENABLE(); 800ceb2: 4b0d ldr r3, [pc, #52] @ (800cee8 ) 800ceb4: 69db ldr r3, [r3, #28] 800ceb6: 4a0c ldr r2, [pc, #48] @ (800cee8 ) 800ceb8: f443 0300 orr.w r3, r3, #8388608 @ 0x800000 800cebc: 61d3 str r3, [r2, #28] 800cebe: 4b0a ldr r3, [pc, #40] @ (800cee8 ) 800cec0: 69db ldr r3, [r3, #28] 800cec2: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800cec6: 60fb str r3, [r7, #12] 800cec8: 68fb ldr r3, [r7, #12] /* Peripheral interrupt init */ HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0); 800ceca: 2200 movs r2, #0 800cecc: 2100 movs r1, #0 800cece: 2014 movs r0, #20 800ced0: f7f7 fdc3 bl 8004a5a HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn); 800ced4: 2014 movs r0, #20 800ced6: f7f7 fddc bl 8004a92 /* USER CODE BEGIN USB_MspInit 1 */ /* USER CODE END USB_MspInit 1 */ } } 800ceda: bf00 nop 800cedc: 3710 adds r7, #16 800cede: 46bd mov sp, r7 800cee0: bd80 pop {r7, pc} 800cee2: bf00 nop 800cee4: 40005c00 .word 0x40005c00 800cee8: 40021000 .word 0x40021000 0800ceec : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800ceec: b580 push {r7, lr} 800ceee: b082 sub sp, #8 800cef0: af00 add r7, sp, #0 800cef2: 6078 str r0, [r7, #4] USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); 800cef4: 687b ldr r3, [r7, #4] 800cef6: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800cefa: 687b ldr r3, [r7, #4] 800cefc: f503 7326 add.w r3, r3, #664 @ 0x298 800cf00: 4619 mov r1, r3 800cf02: 4610 mov r0, r2 800cf04: f7fe fd51 bl 800b9aa } 800cf08: bf00 nop 800cf0a: 3708 adds r7, #8 800cf0c: 46bd mov sp, r7 800cf0e: bd80 pop {r7, pc} 0800cf10 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800cf10: b580 push {r7, lr} 800cf12: b082 sub sp, #8 800cf14: af00 add r7, sp, #0 800cf16: 6078 str r0, [r7, #4] 800cf18: 460b mov r3, r1 800cf1a: 70fb strb r3, [r7, #3] USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); 800cf1c: 687b ldr r3, [r7, #4] 800cf1e: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800cf22: 78fa ldrb r2, [r7, #3] 800cf24: 6879 ldr r1, [r7, #4] 800cf26: 4613 mov r3, r2 800cf28: 009b lsls r3, r3, #2 800cf2a: 4413 add r3, r2 800cf2c: 00db lsls r3, r3, #3 800cf2e: 440b add r3, r1 800cf30: f503 73b2 add.w r3, r3, #356 @ 0x164 800cf34: 681a ldr r2, [r3, #0] 800cf36: 78fb ldrb r3, [r7, #3] 800cf38: 4619 mov r1, r3 800cf3a: f7fe fd83 bl 800ba44 } 800cf3e: bf00 nop 800cf40: 3708 adds r7, #8 800cf42: 46bd mov sp, r7 800cf44: bd80 pop {r7, pc} 0800cf46 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800cf46: b580 push {r7, lr} 800cf48: b082 sub sp, #8 800cf4a: af00 add r7, sp, #0 800cf4c: 6078 str r0, [r7, #4] 800cf4e: 460b mov r3, r1 800cf50: 70fb strb r3, [r7, #3] USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); 800cf52: 687b ldr r3, [r7, #4] 800cf54: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800cf58: 78fa ldrb r2, [r7, #3] 800cf5a: 6879 ldr r1, [r7, #4] 800cf5c: 4613 mov r3, r2 800cf5e: 009b lsls r3, r3, #2 800cf60: 4413 add r3, r2 800cf62: 00db lsls r3, r3, #3 800cf64: 440b add r3, r1 800cf66: 3324 adds r3, #36 @ 0x24 800cf68: 681a ldr r2, [r3, #0] 800cf6a: 78fb ldrb r3, [r7, #3] 800cf6c: 4619 mov r1, r3 800cf6e: f7fe fdda bl 800bb26 } 800cf72: bf00 nop 800cf74: 3708 adds r7, #8 800cf76: 46bd mov sp, r7 800cf78: bd80 pop {r7, pc} 0800cf7a : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800cf7a: b580 push {r7, lr} 800cf7c: b082 sub sp, #8 800cf7e: af00 add r7, sp, #0 800cf80: 6078 str r0, [r7, #4] USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); 800cf82: 687b ldr r3, [r7, #4] 800cf84: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800cf88: 4618 mov r0, r3 800cf8a: f7fe feea bl 800bd62 } 800cf8e: bf00 nop 800cf90: 3708 adds r7, #8 800cf92: 46bd mov sp, r7 800cf94: bd80 pop {r7, pc} 0800cf96 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800cf96: b580 push {r7, lr} 800cf98: b084 sub sp, #16 800cf9a: af00 add r7, sp, #0 800cf9c: 6078 str r0, [r7, #4] USBD_SpeedTypeDef speed = USBD_SPEED_FULL; 800cf9e: 2301 movs r3, #1 800cfa0: 73fb strb r3, [r7, #15] if ( hpcd->Init.speed != PCD_SPEED_FULL) 800cfa2: 687b ldr r3, [r7, #4] 800cfa4: 799b ldrb r3, [r3, #6] 800cfa6: 2b02 cmp r3, #2 800cfa8: d001 beq.n 800cfae { Error_Handler(); 800cfaa: f7f6 f9f5 bl 8003398 } /* Set Speed. */ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); 800cfae: 687b ldr r3, [r7, #4] 800cfb0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800cfb4: 7bfa ldrb r2, [r7, #15] 800cfb6: 4611 mov r1, r2 800cfb8: 4618 mov r0, r3 800cfba: f7fe fe9a bl 800bcf2 /* Reset Device. */ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); 800cfbe: 687b ldr r3, [r7, #4] 800cfc0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800cfc4: 4618 mov r0, r3 800cfc6: f7fe fe53 bl 800bc70 } 800cfca: bf00 nop 800cfcc: 3710 adds r7, #16 800cfce: 46bd mov sp, r7 800cfd0: bd80 pop {r7, pc} ... 0800cfd4 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800cfd4: b580 push {r7, lr} 800cfd6: b082 sub sp, #8 800cfd8: af00 add r7, sp, #0 800cfda: 6078 str r0, [r7, #4] /* Inform USB library that core enters in suspend Mode. */ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); 800cfdc: 687b ldr r3, [r7, #4] 800cfde: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800cfe2: 4618 mov r0, r3 800cfe4: f7fe fe94 bl 800bd10 /* Enter in STOP mode. */ /* USER CODE BEGIN 2 */ if (hpcd->Init.low_power_enable) 800cfe8: 687b ldr r3, [r7, #4] 800cfea: 7a9b ldrb r3, [r3, #10] 800cfec: 2b00 cmp r3, #0 800cfee: d005 beq.n 800cffc { /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 800cff0: 4b04 ldr r3, [pc, #16] @ (800d004 ) 800cff2: 691b ldr r3, [r3, #16] 800cff4: 4a03 ldr r2, [pc, #12] @ (800d004 ) 800cff6: f043 0306 orr.w r3, r3, #6 800cffa: 6113 str r3, [r2, #16] } /* USER CODE END 2 */ } 800cffc: bf00 nop 800cffe: 3708 adds r7, #8 800d000: 46bd mov sp, r7 800d002: bd80 pop {r7, pc} 800d004: e000ed00 .word 0xe000ed00 0800d008 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d008: b580 push {r7, lr} 800d00a: b082 sub sp, #8 800d00c: af00 add r7, sp, #0 800d00e: 6078 str r0, [r7, #4] /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); 800d010: 687b ldr r3, [r7, #4] 800d012: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800d016: 4618 mov r0, r3 800d018: f7fe fe8e bl 800bd38 } 800d01c: bf00 nop 800d01e: 3708 adds r7, #8 800d020: 46bd mov sp, r7 800d022: bd80 pop {r7, pc} 0800d024 : * @brief Initializes the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) { 800d024: b580 push {r7, lr} 800d026: b082 sub sp, #8 800d028: af00 add r7, sp, #0 800d02a: 6078 str r0, [r7, #4] /* Init USB Ip. */ /* Link the driver to the stack. */ hpcd_USB_FS.pData = pdev; 800d02c: 4a28 ldr r2, [pc, #160] @ (800d0d0 ) 800d02e: 687b ldr r3, [r7, #4] 800d030: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4 pdev->pData = &hpcd_USB_FS; 800d034: 687b ldr r3, [r7, #4] 800d036: 4a26 ldr r2, [pc, #152] @ (800d0d0 ) 800d038: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0 hpcd_USB_FS.Instance = USB; 800d03c: 4b24 ldr r3, [pc, #144] @ (800d0d0 ) 800d03e: 4a25 ldr r2, [pc, #148] @ (800d0d4 ) 800d040: 601a str r2, [r3, #0] hpcd_USB_FS.Init.dev_endpoints = 8; 800d042: 4b23 ldr r3, [pc, #140] @ (800d0d0 ) 800d044: 2208 movs r2, #8 800d046: 711a strb r2, [r3, #4] hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; 800d048: 4b21 ldr r3, [pc, #132] @ (800d0d0 ) 800d04a: 2202 movs r2, #2 800d04c: 719a strb r2, [r3, #6] hpcd_USB_FS.Init.low_power_enable = DISABLE; 800d04e: 4b20 ldr r3, [pc, #128] @ (800d0d0 ) 800d050: 2200 movs r2, #0 800d052: 729a strb r2, [r3, #10] hpcd_USB_FS.Init.lpm_enable = DISABLE; 800d054: 4b1e ldr r3, [pc, #120] @ (800d0d0 ) 800d056: 2200 movs r2, #0 800d058: 72da strb r2, [r3, #11] hpcd_USB_FS.Init.battery_charging_enable = DISABLE; 800d05a: 4b1d ldr r3, [pc, #116] @ (800d0d0 ) 800d05c: 2200 movs r2, #0 800d05e: 731a strb r2, [r3, #12] if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) 800d060: 481b ldr r0, [pc, #108] @ (800d0d0 ) 800d062: f7f8 faf1 bl 8005648 800d066: 4603 mov r3, r0 800d068: 2b00 cmp r3, #0 800d06a: d001 beq.n 800d070 { Error_Handler( ); 800d06c: f7f6 f994 bl 8003398 HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback); HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback); HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* USER CODE BEGIN EndPoint_Configuration */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18); 800d070: 687b ldr r3, [r7, #4] 800d072: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d076: 2318 movs r3, #24 800d078: 2200 movs r2, #0 800d07a: 2100 movs r1, #0 800d07c: f7fa f802 bl 8007084 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58); 800d080: 687b ldr r3, [r7, #4] 800d082: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d086: 2358 movs r3, #88 @ 0x58 800d088: 2200 movs r2, #0 800d08a: 2180 movs r1, #128 @ 0x80 800d08c: f7f9 fffa bl 8007084 /* USER CODE END EndPoint_Configuration */ /* USER CODE BEGIN EndPoint_Configuration_CDC */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0); 800d090: 687b ldr r3, [r7, #4] 800d092: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d096: 23c0 movs r3, #192 @ 0xc0 800d098: 2200 movs r2, #0 800d09a: 2181 movs r1, #129 @ 0x81 800d09c: f7f9 fff2 bl 8007084 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110); 800d0a0: 687b ldr r3, [r7, #4] 800d0a2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d0a6: f44f 7388 mov.w r3, #272 @ 0x110 800d0aa: 2200 movs r2, #0 800d0ac: 2101 movs r1, #1 800d0ae: f7f9 ffe9 bl 8007084 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100); 800d0b2: 687b ldr r3, [r7, #4] 800d0b4: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d0b8: f44f 7380 mov.w r3, #256 @ 0x100 800d0bc: 2200 movs r2, #0 800d0be: 2182 movs r1, #130 @ 0x82 800d0c0: f7f9 ffe0 bl 8007084 /* USER CODE END EndPoint_Configuration_CDC */ return USBD_OK; 800d0c4: 2300 movs r3, #0 } 800d0c6: 4618 mov r0, r3 800d0c8: 3708 adds r7, #8 800d0ca: 46bd mov sp, r7 800d0cc: bd80 pop {r7, pc} 800d0ce: bf00 nop 800d0d0: 2000123c .word 0x2000123c 800d0d4: 40005c00 .word 0x40005c00 0800d0d8 : * @brief Starts the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) { 800d0d8: b580 push {r7, lr} 800d0da: b084 sub sp, #16 800d0dc: af00 add r7, sp, #0 800d0de: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_status = HAL_OK; 800d0e0: 2300 movs r3, #0 800d0e2: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d0e4: 2300 movs r3, #0 800d0e6: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_Start(pdev->pData); 800d0e8: 687b ldr r3, [r7, #4] 800d0ea: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d0ee: 4618 mov r0, r3 800d0f0: f7f8 fba0 bl 8005834 800d0f4: 4603 mov r3, r0 800d0f6: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d0f8: 7bfb ldrb r3, [r7, #15] 800d0fa: 4618 mov r0, r3 800d0fc: f000 f94e bl 800d39c 800d100: 4603 mov r3, r0 800d102: 73bb strb r3, [r7, #14] return usb_status; 800d104: 7bbb ldrb r3, [r7, #14] } 800d106: 4618 mov r0, r3 800d108: 3710 adds r7, #16 800d10a: 46bd mov sp, r7 800d10c: bd80 pop {r7, pc} 0800d10e : * @param ep_type: Endpoint type * @param ep_mps: Endpoint max packet size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) { 800d10e: b580 push {r7, lr} 800d110: b084 sub sp, #16 800d112: af00 add r7, sp, #0 800d114: 6078 str r0, [r7, #4] 800d116: 4608 mov r0, r1 800d118: 4611 mov r1, r2 800d11a: 461a mov r2, r3 800d11c: 4603 mov r3, r0 800d11e: 70fb strb r3, [r7, #3] 800d120: 460b mov r3, r1 800d122: 70bb strb r3, [r7, #2] 800d124: 4613 mov r3, r2 800d126: 803b strh r3, [r7, #0] HAL_StatusTypeDef hal_status = HAL_OK; 800d128: 2300 movs r3, #0 800d12a: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d12c: 2300 movs r3, #0 800d12e: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); 800d130: 687b ldr r3, [r7, #4] 800d132: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d136: 78bb ldrb r3, [r7, #2] 800d138: 883a ldrh r2, [r7, #0] 800d13a: 78f9 ldrb r1, [r7, #3] 800d13c: f7f8 fcf4 bl 8005b28 800d140: 4603 mov r3, r0 800d142: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d144: 7bfb ldrb r3, [r7, #15] 800d146: 4618 mov r0, r3 800d148: f000 f928 bl 800d39c 800d14c: 4603 mov r3, r0 800d14e: 73bb strb r3, [r7, #14] return usb_status; 800d150: 7bbb ldrb r3, [r7, #14] } 800d152: 4618 mov r0, r3 800d154: 3710 adds r7, #16 800d156: 46bd mov sp, r7 800d158: bd80 pop {r7, pc} 0800d15a : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d15a: b580 push {r7, lr} 800d15c: b084 sub sp, #16 800d15e: af00 add r7, sp, #0 800d160: 6078 str r0, [r7, #4] 800d162: 460b mov r3, r1 800d164: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800d166: 2300 movs r3, #0 800d168: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d16a: 2300 movs r3, #0 800d16c: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); 800d16e: 687b ldr r3, [r7, #4] 800d170: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d174: 78fa ldrb r2, [r7, #3] 800d176: 4611 mov r1, r2 800d178: 4618 mov r0, r3 800d17a: f7f8 fd32 bl 8005be2 800d17e: 4603 mov r3, r0 800d180: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d182: 7bfb ldrb r3, [r7, #15] 800d184: 4618 mov r0, r3 800d186: f000 f909 bl 800d39c 800d18a: 4603 mov r3, r0 800d18c: 73bb strb r3, [r7, #14] return usb_status; 800d18e: 7bbb ldrb r3, [r7, #14] } 800d190: 4618 mov r0, r3 800d192: 3710 adds r7, #16 800d194: 46bd mov sp, r7 800d196: bd80 pop {r7, pc} 0800d198 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d198: b580 push {r7, lr} 800d19a: b084 sub sp, #16 800d19c: af00 add r7, sp, #0 800d19e: 6078 str r0, [r7, #4] 800d1a0: 460b mov r3, r1 800d1a2: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800d1a4: 2300 movs r3, #0 800d1a6: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d1a8: 2300 movs r3, #0 800d1aa: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); 800d1ac: 687b ldr r3, [r7, #4] 800d1ae: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d1b2: 78fa ldrb r2, [r7, #3] 800d1b4: 4611 mov r1, r2 800d1b6: 4618 mov r0, r3 800d1b8: f7f8 fdda bl 8005d70 800d1bc: 4603 mov r3, r0 800d1be: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d1c0: 7bfb ldrb r3, [r7, #15] 800d1c2: 4618 mov r0, r3 800d1c4: f000 f8ea bl 800d39c 800d1c8: 4603 mov r3, r0 800d1ca: 73bb strb r3, [r7, #14] return usb_status; 800d1cc: 7bbb ldrb r3, [r7, #14] } 800d1ce: 4618 mov r0, r3 800d1d0: 3710 adds r7, #16 800d1d2: 46bd mov sp, r7 800d1d4: bd80 pop {r7, pc} 0800d1d6 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d1d6: b580 push {r7, lr} 800d1d8: b084 sub sp, #16 800d1da: af00 add r7, sp, #0 800d1dc: 6078 str r0, [r7, #4] 800d1de: 460b mov r3, r1 800d1e0: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800d1e2: 2300 movs r3, #0 800d1e4: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d1e6: 2300 movs r3, #0 800d1e8: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); 800d1ea: 687b ldr r3, [r7, #4] 800d1ec: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d1f0: 78fa ldrb r2, [r7, #3] 800d1f2: 4611 mov r1, r2 800d1f4: 4618 mov r0, r3 800d1f6: f7f8 fe1b bl 8005e30 800d1fa: 4603 mov r3, r0 800d1fc: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d1fe: 7bfb ldrb r3, [r7, #15] 800d200: 4618 mov r0, r3 800d202: f000 f8cb bl 800d39c 800d206: 4603 mov r3, r0 800d208: 73bb strb r3, [r7, #14] return usb_status; 800d20a: 7bbb ldrb r3, [r7, #14] } 800d20c: 4618 mov r0, r3 800d20e: 3710 adds r7, #16 800d210: 46bd mov sp, r7 800d212: bd80 pop {r7, pc} 0800d214 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Stall (1: Yes, 0: No) */ uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d214: b480 push {r7} 800d216: b085 sub sp, #20 800d218: af00 add r7, sp, #0 800d21a: 6078 str r0, [r7, #4] 800d21c: 460b mov r3, r1 800d21e: 70fb strb r3, [r7, #3] PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; 800d220: 687b ldr r3, [r7, #4] 800d222: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d226: 60fb str r3, [r7, #12] if((ep_addr & 0x80) == 0x80) 800d228: f997 3003 ldrsb.w r3, [r7, #3] 800d22c: 2b00 cmp r3, #0 800d22e: da0b bge.n 800d248 { return hpcd->IN_ep[ep_addr & 0x7F].is_stall; 800d230: 78fb ldrb r3, [r7, #3] 800d232: f003 027f and.w r2, r3, #127 @ 0x7f 800d236: 68f9 ldr r1, [r7, #12] 800d238: 4613 mov r3, r2 800d23a: 009b lsls r3, r3, #2 800d23c: 4413 add r3, r2 800d23e: 00db lsls r3, r3, #3 800d240: 440b add r3, r1 800d242: 3312 adds r3, #18 800d244: 781b ldrb r3, [r3, #0] 800d246: e00b b.n 800d260 } else { return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; 800d248: 78fb ldrb r3, [r7, #3] 800d24a: f003 027f and.w r2, r3, #127 @ 0x7f 800d24e: 68f9 ldr r1, [r7, #12] 800d250: 4613 mov r3, r2 800d252: 009b lsls r3, r3, #2 800d254: 4413 add r3, r2 800d256: 00db lsls r3, r3, #3 800d258: 440b add r3, r1 800d25a: f503 73a9 add.w r3, r3, #338 @ 0x152 800d25e: 781b ldrb r3, [r3, #0] } } 800d260: 4618 mov r0, r3 800d262: 3714 adds r7, #20 800d264: 46bd mov sp, r7 800d266: bc80 pop {r7} 800d268: 4770 bx lr 0800d26a : * @param pdev: Device handle * @param dev_addr: Device address * @retval USBD status */ USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) { 800d26a: b580 push {r7, lr} 800d26c: b084 sub sp, #16 800d26e: af00 add r7, sp, #0 800d270: 6078 str r0, [r7, #4] 800d272: 460b mov r3, r1 800d274: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800d276: 2300 movs r3, #0 800d278: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d27a: 2300 movs r3, #0 800d27c: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); 800d27e: 687b ldr r3, [r7, #4] 800d280: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d284: 78fa ldrb r2, [r7, #3] 800d286: 4611 mov r1, r2 800d288: 4618 mov r0, r3 800d28a: f7f8 fc29 bl 8005ae0 800d28e: 4603 mov r3, r0 800d290: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d292: 7bfb ldrb r3, [r7, #15] 800d294: 4618 mov r0, r3 800d296: f000 f881 bl 800d39c 800d29a: 4603 mov r3, r0 800d29c: 73bb strb r3, [r7, #14] return usb_status; 800d29e: 7bbb ldrb r3, [r7, #14] } 800d2a0: 4618 mov r0, r3 800d2a2: 3710 adds r7, #16 800d2a4: 46bd mov sp, r7 800d2a6: bd80 pop {r7, pc} 0800d2a8 : * @param pbuf: Pointer to data to be sent * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800d2a8: b580 push {r7, lr} 800d2aa: b086 sub sp, #24 800d2ac: af00 add r7, sp, #0 800d2ae: 60f8 str r0, [r7, #12] 800d2b0: 607a str r2, [r7, #4] 800d2b2: 461a mov r2, r3 800d2b4: 460b mov r3, r1 800d2b6: 72fb strb r3, [r7, #11] 800d2b8: 4613 mov r3, r2 800d2ba: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800d2bc: 2300 movs r3, #0 800d2be: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800d2c0: 2300 movs r3, #0 800d2c2: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); 800d2c4: 68fb ldr r3, [r7, #12] 800d2c6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d2ca: 893b ldrh r3, [r7, #8] 800d2cc: 7af9 ldrb r1, [r7, #11] 800d2ce: 687a ldr r2, [r7, #4] 800d2d0: f7f8 fd17 bl 8005d02 800d2d4: 4603 mov r3, r0 800d2d6: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800d2d8: 7dfb ldrb r3, [r7, #23] 800d2da: 4618 mov r0, r3 800d2dc: f000 f85e bl 800d39c 800d2e0: 4603 mov r3, r0 800d2e2: 75bb strb r3, [r7, #22] return usb_status; 800d2e4: 7dbb ldrb r3, [r7, #22] } 800d2e6: 4618 mov r0, r3 800d2e8: 3718 adds r7, #24 800d2ea: 46bd mov sp, r7 800d2ec: bd80 pop {r7, pc} 0800d2ee : * @param pbuf: Pointer to data to be received * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800d2ee: b580 push {r7, lr} 800d2f0: b086 sub sp, #24 800d2f2: af00 add r7, sp, #0 800d2f4: 60f8 str r0, [r7, #12] 800d2f6: 607a str r2, [r7, #4] 800d2f8: 461a mov r2, r3 800d2fa: 460b mov r3, r1 800d2fc: 72fb strb r3, [r7, #11] 800d2fe: 4613 mov r3, r2 800d300: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800d302: 2300 movs r3, #0 800d304: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800d306: 2300 movs r3, #0 800d308: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); 800d30a: 68fb ldr r3, [r7, #12] 800d30c: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d310: 893b ldrh r3, [r7, #8] 800d312: 7af9 ldrb r1, [r7, #11] 800d314: 687a ldr r2, [r7, #4] 800d316: f7f8 fcac bl 8005c72 800d31a: 4603 mov r3, r0 800d31c: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800d31e: 7dfb ldrb r3, [r7, #23] 800d320: 4618 mov r0, r3 800d322: f000 f83b bl 800d39c 800d326: 4603 mov r3, r0 800d328: 75bb strb r3, [r7, #22] return usb_status; 800d32a: 7dbb ldrb r3, [r7, #22] } 800d32c: 4618 mov r0, r3 800d32e: 3718 adds r7, #24 800d330: 46bd mov sp, r7 800d332: bd80 pop {r7, pc} 0800d334 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Received Data Size */ uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d334: b580 push {r7, lr} 800d336: b082 sub sp, #8 800d338: af00 add r7, sp, #0 800d33a: 6078 str r0, [r7, #4] 800d33c: 460b mov r3, r1 800d33e: 70fb strb r3, [r7, #3] return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); 800d340: 687b ldr r3, [r7, #4] 800d342: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d346: 78fa ldrb r2, [r7, #3] 800d348: 4611 mov r1, r2 800d34a: 4618 mov r0, r3 800d34c: f7f8 fcc2 bl 8005cd4 800d350: 4603 mov r3, r0 } 800d352: 4618 mov r0, r3 800d354: 3708 adds r7, #8 800d356: 46bd mov sp, r7 800d358: bd80 pop {r7, pc} ... 0800d35c : * @brief Static single allocation. * @param size: Size of allocated memory * @retval None */ void *USBD_static_malloc(uint32_t size) { 800d35c: b480 push {r7} 800d35e: b083 sub sp, #12 800d360: af00 add r7, sp, #0 800d362: 6078 str r0, [r7, #4] static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ return mem; 800d364: 4b02 ldr r3, [pc, #8] @ (800d370 ) } 800d366: 4618 mov r0, r3 800d368: 370c adds r7, #12 800d36a: 46bd mov sp, r7 800d36c: bc80 pop {r7} 800d36e: 4770 bx lr 800d370: 20001514 .word 0x20001514 0800d374 : * @brief Dummy memory free * @param p: Pointer to allocated memory address * @retval None */ void USBD_static_free(void *p) { 800d374: b480 push {r7} 800d376: b083 sub sp, #12 800d378: af00 add r7, sp, #0 800d37a: 6078 str r0, [r7, #4] } 800d37c: bf00 nop 800d37e: 370c adds r7, #12 800d380: 46bd mov sp, r7 800d382: bc80 pop {r7} 800d384: 4770 bx lr 0800d386 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #else void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d386: b480 push {r7} 800d388: b083 sub sp, #12 800d38a: af00 add r7, sp, #0 800d38c: 6078 str r0, [r7, #4] 800d38e: 460b mov r3, r1 800d390: 70fb strb r3, [r7, #3] { /* Configure High connection state. */ } /* USER CODE END 6 */ } 800d392: bf00 nop 800d394: 370c adds r7, #12 800d396: 46bd mov sp, r7 800d398: bc80 pop {r7} 800d39a: 4770 bx lr 0800d39c : * @brief Returns the USB status depending on the HAL status: * @param hal_status: HAL status * @retval USB status */ USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) { 800d39c: b480 push {r7} 800d39e: b085 sub sp, #20 800d3a0: af00 add r7, sp, #0 800d3a2: 4603 mov r3, r0 800d3a4: 71fb strb r3, [r7, #7] USBD_StatusTypeDef usb_status = USBD_OK; 800d3a6: 2300 movs r3, #0 800d3a8: 73fb strb r3, [r7, #15] switch (hal_status) 800d3aa: 79fb ldrb r3, [r7, #7] 800d3ac: 2b03 cmp r3, #3 800d3ae: d817 bhi.n 800d3e0 800d3b0: a201 add r2, pc, #4 @ (adr r2, 800d3b8 ) 800d3b2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d3b6: bf00 nop 800d3b8: 0800d3c9 .word 0x0800d3c9 800d3bc: 0800d3cf .word 0x0800d3cf 800d3c0: 0800d3d5 .word 0x0800d3d5 800d3c4: 0800d3db .word 0x0800d3db { case HAL_OK : usb_status = USBD_OK; 800d3c8: 2300 movs r3, #0 800d3ca: 73fb strb r3, [r7, #15] break; 800d3cc: e00b b.n 800d3e6 case HAL_ERROR : usb_status = USBD_FAIL; 800d3ce: 2302 movs r3, #2 800d3d0: 73fb strb r3, [r7, #15] break; 800d3d2: e008 b.n 800d3e6 case HAL_BUSY : usb_status = USBD_BUSY; 800d3d4: 2301 movs r3, #1 800d3d6: 73fb strb r3, [r7, #15] break; 800d3d8: e005 b.n 800d3e6 case HAL_TIMEOUT : usb_status = USBD_FAIL; 800d3da: 2302 movs r3, #2 800d3dc: 73fb strb r3, [r7, #15] break; 800d3de: e002 b.n 800d3e6 default : usb_status = USBD_FAIL; 800d3e0: 2302 movs r3, #2 800d3e2: 73fb strb r3, [r7, #15] break; 800d3e4: bf00 nop } return usb_status; 800d3e6: 7bfb ldrb r3, [r7, #15] } 800d3e8: 4618 mov r0, r3 800d3ea: 3714 adds r7, #20 800d3ec: 46bd mov sp, r7 800d3ee: bc80 pop {r7} 800d3f0: 4770 bx lr 800d3f2: bf00 nop 0800d3f4 : 800d3f4: b40e push {r1, r2, r3} 800d3f6: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000 800d3fa: b510 push {r4, lr} 800d3fc: 2400 movs r4, #0 800d3fe: b09d sub sp, #116 @ 0x74 800d400: ab1f add r3, sp, #124 @ 0x7c 800d402: 9002 str r0, [sp, #8] 800d404: 9006 str r0, [sp, #24] 800d406: 9107 str r1, [sp, #28] 800d408: 9104 str r1, [sp, #16] 800d40a: 4809 ldr r0, [pc, #36] @ (800d430 ) 800d40c: 4909 ldr r1, [pc, #36] @ (800d434 ) 800d40e: f853 2b04 ldr.w r2, [r3], #4 800d412: 9105 str r1, [sp, #20] 800d414: 6800 ldr r0, [r0, #0] 800d416: a902 add r1, sp, #8 800d418: 9301 str r3, [sp, #4] 800d41a: 941b str r4, [sp, #108] @ 0x6c 800d41c: f000 f992 bl 800d744 <_svfiprintf_r> 800d420: 9b02 ldr r3, [sp, #8] 800d422: 701c strb r4, [r3, #0] 800d424: b01d add sp, #116 @ 0x74 800d426: e8bd 4010 ldmia.w sp!, {r4, lr} 800d42a: b003 add sp, #12 800d42c: 4770 bx lr 800d42e: bf00 nop 800d430: 20000184 .word 0x20000184 800d434: ffff0208 .word 0xffff0208 0800d438 : 800d438: 4603 mov r3, r0 800d43a: 4402 add r2, r0 800d43c: 4293 cmp r3, r2 800d43e: d100 bne.n 800d442 800d440: 4770 bx lr 800d442: f803 1b01 strb.w r1, [r3], #1 800d446: e7f9 b.n 800d43c 0800d448 <__errno>: 800d448: 4b01 ldr r3, [pc, #4] @ (800d450 <__errno+0x8>) 800d44a: 6818 ldr r0, [r3, #0] 800d44c: 4770 bx lr 800d44e: bf00 nop 800d450: 20000184 .word 0x20000184 0800d454 <__libc_init_array>: 800d454: b570 push {r4, r5, r6, lr} 800d456: 2600 movs r6, #0 800d458: 4d0c ldr r5, [pc, #48] @ (800d48c <__libc_init_array+0x38>) 800d45a: 4c0d ldr r4, [pc, #52] @ (800d490 <__libc_init_array+0x3c>) 800d45c: 1b64 subs r4, r4, r5 800d45e: 10a4 asrs r4, r4, #2 800d460: 42a6 cmp r6, r4 800d462: d109 bne.n 800d478 <__libc_init_array+0x24> 800d464: f000 fc76 bl 800dd54 <_init> 800d468: 2600 movs r6, #0 800d46a: 4d0a ldr r5, [pc, #40] @ (800d494 <__libc_init_array+0x40>) 800d46c: 4c0a ldr r4, [pc, #40] @ (800d498 <__libc_init_array+0x44>) 800d46e: 1b64 subs r4, r4, r5 800d470: 10a4 asrs r4, r4, #2 800d472: 42a6 cmp r6, r4 800d474: d105 bne.n 800d482 <__libc_init_array+0x2e> 800d476: bd70 pop {r4, r5, r6, pc} 800d478: f855 3b04 ldr.w r3, [r5], #4 800d47c: 4798 blx r3 800d47e: 3601 adds r6, #1 800d480: e7ee b.n 800d460 <__libc_init_array+0xc> 800d482: f855 3b04 ldr.w r3, [r5], #4 800d486: 4798 blx r3 800d488: 3601 adds r6, #1 800d48a: e7f2 b.n 800d472 <__libc_init_array+0x1e> 800d48c: 0800e10c .word 0x0800e10c 800d490: 0800e10c .word 0x0800e10c 800d494: 0800e10c .word 0x0800e10c 800d498: 0800e110 .word 0x0800e110 0800d49c <__retarget_lock_acquire_recursive>: 800d49c: 4770 bx lr 0800d49e <__retarget_lock_release_recursive>: 800d49e: 4770 bx lr 0800d4a0 <_free_r>: 800d4a0: b538 push {r3, r4, r5, lr} 800d4a2: 4605 mov r5, r0 800d4a4: 2900 cmp r1, #0 800d4a6: d040 beq.n 800d52a <_free_r+0x8a> 800d4a8: f851 3c04 ldr.w r3, [r1, #-4] 800d4ac: 1f0c subs r4, r1, #4 800d4ae: 2b00 cmp r3, #0 800d4b0: bfb8 it lt 800d4b2: 18e4 addlt r4, r4, r3 800d4b4: f000 f8de bl 800d674 <__malloc_lock> 800d4b8: 4a1c ldr r2, [pc, #112] @ (800d52c <_free_r+0x8c>) 800d4ba: 6813 ldr r3, [r2, #0] 800d4bc: b933 cbnz r3, 800d4cc <_free_r+0x2c> 800d4be: 6063 str r3, [r4, #4] 800d4c0: 6014 str r4, [r2, #0] 800d4c2: 4628 mov r0, r5 800d4c4: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800d4c8: f000 b8da b.w 800d680 <__malloc_unlock> 800d4cc: 42a3 cmp r3, r4 800d4ce: d908 bls.n 800d4e2 <_free_r+0x42> 800d4d0: 6820 ldr r0, [r4, #0] 800d4d2: 1821 adds r1, r4, r0 800d4d4: 428b cmp r3, r1 800d4d6: bf01 itttt eq 800d4d8: 6819 ldreq r1, [r3, #0] 800d4da: 685b ldreq r3, [r3, #4] 800d4dc: 1809 addeq r1, r1, r0 800d4de: 6021 streq r1, [r4, #0] 800d4e0: e7ed b.n 800d4be <_free_r+0x1e> 800d4e2: 461a mov r2, r3 800d4e4: 685b ldr r3, [r3, #4] 800d4e6: b10b cbz r3, 800d4ec <_free_r+0x4c> 800d4e8: 42a3 cmp r3, r4 800d4ea: d9fa bls.n 800d4e2 <_free_r+0x42> 800d4ec: 6811 ldr r1, [r2, #0] 800d4ee: 1850 adds r0, r2, r1 800d4f0: 42a0 cmp r0, r4 800d4f2: d10b bne.n 800d50c <_free_r+0x6c> 800d4f4: 6820 ldr r0, [r4, #0] 800d4f6: 4401 add r1, r0 800d4f8: 1850 adds r0, r2, r1 800d4fa: 4283 cmp r3, r0 800d4fc: 6011 str r1, [r2, #0] 800d4fe: d1e0 bne.n 800d4c2 <_free_r+0x22> 800d500: 6818 ldr r0, [r3, #0] 800d502: 685b ldr r3, [r3, #4] 800d504: 4408 add r0, r1 800d506: 6010 str r0, [r2, #0] 800d508: 6053 str r3, [r2, #4] 800d50a: e7da b.n 800d4c2 <_free_r+0x22> 800d50c: d902 bls.n 800d514 <_free_r+0x74> 800d50e: 230c movs r3, #12 800d510: 602b str r3, [r5, #0] 800d512: e7d6 b.n 800d4c2 <_free_r+0x22> 800d514: 6820 ldr r0, [r4, #0] 800d516: 1821 adds r1, r4, r0 800d518: 428b cmp r3, r1 800d51a: bf01 itttt eq 800d51c: 6819 ldreq r1, [r3, #0] 800d51e: 685b ldreq r3, [r3, #4] 800d520: 1809 addeq r1, r1, r0 800d522: 6021 streq r1, [r4, #0] 800d524: 6063 str r3, [r4, #4] 800d526: 6054 str r4, [r2, #4] 800d528: e7cb b.n 800d4c2 <_free_r+0x22> 800d52a: bd38 pop {r3, r4, r5, pc} 800d52c: 20001878 .word 0x20001878 0800d530 : 800d530: b570 push {r4, r5, r6, lr} 800d532: 4e0f ldr r6, [pc, #60] @ (800d570 ) 800d534: 460c mov r4, r1 800d536: 6831 ldr r1, [r6, #0] 800d538: 4605 mov r5, r0 800d53a: b911 cbnz r1, 800d542 800d53c: f000 fba8 bl 800dc90 <_sbrk_r> 800d540: 6030 str r0, [r6, #0] 800d542: 4621 mov r1, r4 800d544: 4628 mov r0, r5 800d546: f000 fba3 bl 800dc90 <_sbrk_r> 800d54a: 1c43 adds r3, r0, #1 800d54c: d103 bne.n 800d556 800d54e: f04f 34ff mov.w r4, #4294967295 800d552: 4620 mov r0, r4 800d554: bd70 pop {r4, r5, r6, pc} 800d556: 1cc4 adds r4, r0, #3 800d558: f024 0403 bic.w r4, r4, #3 800d55c: 42a0 cmp r0, r4 800d55e: d0f8 beq.n 800d552 800d560: 1a21 subs r1, r4, r0 800d562: 4628 mov r0, r5 800d564: f000 fb94 bl 800dc90 <_sbrk_r> 800d568: 3001 adds r0, #1 800d56a: d1f2 bne.n 800d552 800d56c: e7ef b.n 800d54e 800d56e: bf00 nop 800d570: 20001874 .word 0x20001874 0800d574 <_malloc_r>: 800d574: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800d578: 1ccd adds r5, r1, #3 800d57a: f025 0503 bic.w r5, r5, #3 800d57e: 3508 adds r5, #8 800d580: 2d0c cmp r5, #12 800d582: bf38 it cc 800d584: 250c movcc r5, #12 800d586: 2d00 cmp r5, #0 800d588: 4606 mov r6, r0 800d58a: db01 blt.n 800d590 <_malloc_r+0x1c> 800d58c: 42a9 cmp r1, r5 800d58e: d904 bls.n 800d59a <_malloc_r+0x26> 800d590: 230c movs r3, #12 800d592: 6033 str r3, [r6, #0] 800d594: 2000 movs r0, #0 800d596: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800d59a: f8df 80d4 ldr.w r8, [pc, #212] @ 800d670 <_malloc_r+0xfc> 800d59e: f000 f869 bl 800d674 <__malloc_lock> 800d5a2: f8d8 3000 ldr.w r3, [r8] 800d5a6: 461c mov r4, r3 800d5a8: bb44 cbnz r4, 800d5fc <_malloc_r+0x88> 800d5aa: 4629 mov r1, r5 800d5ac: 4630 mov r0, r6 800d5ae: f7ff ffbf bl 800d530 800d5b2: 1c43 adds r3, r0, #1 800d5b4: 4604 mov r4, r0 800d5b6: d158 bne.n 800d66a <_malloc_r+0xf6> 800d5b8: f8d8 4000 ldr.w r4, [r8] 800d5bc: 4627 mov r7, r4 800d5be: 2f00 cmp r7, #0 800d5c0: d143 bne.n 800d64a <_malloc_r+0xd6> 800d5c2: 2c00 cmp r4, #0 800d5c4: d04b beq.n 800d65e <_malloc_r+0xea> 800d5c6: 6823 ldr r3, [r4, #0] 800d5c8: 4639 mov r1, r7 800d5ca: 4630 mov r0, r6 800d5cc: eb04 0903 add.w r9, r4, r3 800d5d0: f000 fb5e bl 800dc90 <_sbrk_r> 800d5d4: 4581 cmp r9, r0 800d5d6: d142 bne.n 800d65e <_malloc_r+0xea> 800d5d8: 6821 ldr r1, [r4, #0] 800d5da: 4630 mov r0, r6 800d5dc: 1a6d subs r5, r5, r1 800d5de: 4629 mov r1, r5 800d5e0: f7ff ffa6 bl 800d530 800d5e4: 3001 adds r0, #1 800d5e6: d03a beq.n 800d65e <_malloc_r+0xea> 800d5e8: 6823 ldr r3, [r4, #0] 800d5ea: 442b add r3, r5 800d5ec: 6023 str r3, [r4, #0] 800d5ee: f8d8 3000 ldr.w r3, [r8] 800d5f2: 685a ldr r2, [r3, #4] 800d5f4: bb62 cbnz r2, 800d650 <_malloc_r+0xdc> 800d5f6: f8c8 7000 str.w r7, [r8] 800d5fa: e00f b.n 800d61c <_malloc_r+0xa8> 800d5fc: 6822 ldr r2, [r4, #0] 800d5fe: 1b52 subs r2, r2, r5 800d600: d420 bmi.n 800d644 <_malloc_r+0xd0> 800d602: 2a0b cmp r2, #11 800d604: d917 bls.n 800d636 <_malloc_r+0xc2> 800d606: 1961 adds r1, r4, r5 800d608: 42a3 cmp r3, r4 800d60a: 6025 str r5, [r4, #0] 800d60c: bf18 it ne 800d60e: 6059 strne r1, [r3, #4] 800d610: 6863 ldr r3, [r4, #4] 800d612: bf08 it eq 800d614: f8c8 1000 streq.w r1, [r8] 800d618: 5162 str r2, [r4, r5] 800d61a: 604b str r3, [r1, #4] 800d61c: 4630 mov r0, r6 800d61e: f000 f82f bl 800d680 <__malloc_unlock> 800d622: f104 000b add.w r0, r4, #11 800d626: 1d23 adds r3, r4, #4 800d628: f020 0007 bic.w r0, r0, #7 800d62c: 1ac2 subs r2, r0, r3 800d62e: bf1c itt ne 800d630: 1a1b subne r3, r3, r0 800d632: 50a3 strne r3, [r4, r2] 800d634: e7af b.n 800d596 <_malloc_r+0x22> 800d636: 6862 ldr r2, [r4, #4] 800d638: 42a3 cmp r3, r4 800d63a: bf0c ite eq 800d63c: f8c8 2000 streq.w r2, [r8] 800d640: 605a strne r2, [r3, #4] 800d642: e7eb b.n 800d61c <_malloc_r+0xa8> 800d644: 4623 mov r3, r4 800d646: 6864 ldr r4, [r4, #4] 800d648: e7ae b.n 800d5a8 <_malloc_r+0x34> 800d64a: 463c mov r4, r7 800d64c: 687f ldr r7, [r7, #4] 800d64e: e7b6 b.n 800d5be <_malloc_r+0x4a> 800d650: 461a mov r2, r3 800d652: 685b ldr r3, [r3, #4] 800d654: 42a3 cmp r3, r4 800d656: d1fb bne.n 800d650 <_malloc_r+0xdc> 800d658: 2300 movs r3, #0 800d65a: 6053 str r3, [r2, #4] 800d65c: e7de b.n 800d61c <_malloc_r+0xa8> 800d65e: 230c movs r3, #12 800d660: 4630 mov r0, r6 800d662: 6033 str r3, [r6, #0] 800d664: f000 f80c bl 800d680 <__malloc_unlock> 800d668: e794 b.n 800d594 <_malloc_r+0x20> 800d66a: 6005 str r5, [r0, #0] 800d66c: e7d6 b.n 800d61c <_malloc_r+0xa8> 800d66e: bf00 nop 800d670: 20001878 .word 0x20001878 0800d674 <__malloc_lock>: 800d674: 4801 ldr r0, [pc, #4] @ (800d67c <__malloc_lock+0x8>) 800d676: f7ff bf11 b.w 800d49c <__retarget_lock_acquire_recursive> 800d67a: bf00 nop 800d67c: 20001870 .word 0x20001870 0800d680 <__malloc_unlock>: 800d680: 4801 ldr r0, [pc, #4] @ (800d688 <__malloc_unlock+0x8>) 800d682: f7ff bf0c b.w 800d49e <__retarget_lock_release_recursive> 800d686: bf00 nop 800d688: 20001870 .word 0x20001870 0800d68c <__ssputs_r>: 800d68c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800d690: 461f mov r7, r3 800d692: 688e ldr r6, [r1, #8] 800d694: 4682 mov sl, r0 800d696: 42be cmp r6, r7 800d698: 460c mov r4, r1 800d69a: 4690 mov r8, r2 800d69c: 680b ldr r3, [r1, #0] 800d69e: d82d bhi.n 800d6fc <__ssputs_r+0x70> 800d6a0: f9b1 200c ldrsh.w r2, [r1, #12] 800d6a4: f412 6f90 tst.w r2, #1152 @ 0x480 800d6a8: d026 beq.n 800d6f8 <__ssputs_r+0x6c> 800d6aa: 6965 ldr r5, [r4, #20] 800d6ac: 6909 ldr r1, [r1, #16] 800d6ae: eb05 0545 add.w r5, r5, r5, lsl #1 800d6b2: eba3 0901 sub.w r9, r3, r1 800d6b6: eb05 75d5 add.w r5, r5, r5, lsr #31 800d6ba: 1c7b adds r3, r7, #1 800d6bc: 444b add r3, r9 800d6be: 106d asrs r5, r5, #1 800d6c0: 429d cmp r5, r3 800d6c2: bf38 it cc 800d6c4: 461d movcc r5, r3 800d6c6: 0553 lsls r3, r2, #21 800d6c8: d527 bpl.n 800d71a <__ssputs_r+0x8e> 800d6ca: 4629 mov r1, r5 800d6cc: f7ff ff52 bl 800d574 <_malloc_r> 800d6d0: 4606 mov r6, r0 800d6d2: b360 cbz r0, 800d72e <__ssputs_r+0xa2> 800d6d4: 464a mov r2, r9 800d6d6: 6921 ldr r1, [r4, #16] 800d6d8: f000 faf8 bl 800dccc 800d6dc: 89a3 ldrh r3, [r4, #12] 800d6de: f423 6390 bic.w r3, r3, #1152 @ 0x480 800d6e2: f043 0380 orr.w r3, r3, #128 @ 0x80 800d6e6: 81a3 strh r3, [r4, #12] 800d6e8: 6126 str r6, [r4, #16] 800d6ea: 444e add r6, r9 800d6ec: 6026 str r6, [r4, #0] 800d6ee: 463e mov r6, r7 800d6f0: 6165 str r5, [r4, #20] 800d6f2: eba5 0509 sub.w r5, r5, r9 800d6f6: 60a5 str r5, [r4, #8] 800d6f8: 42be cmp r6, r7 800d6fa: d900 bls.n 800d6fe <__ssputs_r+0x72> 800d6fc: 463e mov r6, r7 800d6fe: 4632 mov r2, r6 800d700: 4641 mov r1, r8 800d702: 6820 ldr r0, [r4, #0] 800d704: f000 faaa bl 800dc5c 800d708: 2000 movs r0, #0 800d70a: 68a3 ldr r3, [r4, #8] 800d70c: 1b9b subs r3, r3, r6 800d70e: 60a3 str r3, [r4, #8] 800d710: 6823 ldr r3, [r4, #0] 800d712: 4433 add r3, r6 800d714: 6023 str r3, [r4, #0] 800d716: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800d71a: 462a mov r2, r5 800d71c: f000 fae4 bl 800dce8 <_realloc_r> 800d720: 4606 mov r6, r0 800d722: 2800 cmp r0, #0 800d724: d1e0 bne.n 800d6e8 <__ssputs_r+0x5c> 800d726: 4650 mov r0, sl 800d728: 6921 ldr r1, [r4, #16] 800d72a: f7ff feb9 bl 800d4a0 <_free_r> 800d72e: 230c movs r3, #12 800d730: f8ca 3000 str.w r3, [sl] 800d734: 89a3 ldrh r3, [r4, #12] 800d736: f04f 30ff mov.w r0, #4294967295 800d73a: f043 0340 orr.w r3, r3, #64 @ 0x40 800d73e: 81a3 strh r3, [r4, #12] 800d740: e7e9 b.n 800d716 <__ssputs_r+0x8a> ... 0800d744 <_svfiprintf_r>: 800d744: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800d748: 4698 mov r8, r3 800d74a: 898b ldrh r3, [r1, #12] 800d74c: 4607 mov r7, r0 800d74e: 061b lsls r3, r3, #24 800d750: 460d mov r5, r1 800d752: 4614 mov r4, r2 800d754: b09d sub sp, #116 @ 0x74 800d756: d510 bpl.n 800d77a <_svfiprintf_r+0x36> 800d758: 690b ldr r3, [r1, #16] 800d75a: b973 cbnz r3, 800d77a <_svfiprintf_r+0x36> 800d75c: 2140 movs r1, #64 @ 0x40 800d75e: f7ff ff09 bl 800d574 <_malloc_r> 800d762: 6028 str r0, [r5, #0] 800d764: 6128 str r0, [r5, #16] 800d766: b930 cbnz r0, 800d776 <_svfiprintf_r+0x32> 800d768: 230c movs r3, #12 800d76a: 603b str r3, [r7, #0] 800d76c: f04f 30ff mov.w r0, #4294967295 800d770: b01d add sp, #116 @ 0x74 800d772: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800d776: 2340 movs r3, #64 @ 0x40 800d778: 616b str r3, [r5, #20] 800d77a: 2300 movs r3, #0 800d77c: 9309 str r3, [sp, #36] @ 0x24 800d77e: 2320 movs r3, #32 800d780: f88d 3029 strb.w r3, [sp, #41] @ 0x29 800d784: 2330 movs r3, #48 @ 0x30 800d786: f04f 0901 mov.w r9, #1 800d78a: f8cd 800c str.w r8, [sp, #12] 800d78e: f8df 8198 ldr.w r8, [pc, #408] @ 800d928 <_svfiprintf_r+0x1e4> 800d792: f88d 302a strb.w r3, [sp, #42] @ 0x2a 800d796: 4623 mov r3, r4 800d798: 469a mov sl, r3 800d79a: f813 2b01 ldrb.w r2, [r3], #1 800d79e: b10a cbz r2, 800d7a4 <_svfiprintf_r+0x60> 800d7a0: 2a25 cmp r2, #37 @ 0x25 800d7a2: d1f9 bne.n 800d798 <_svfiprintf_r+0x54> 800d7a4: ebba 0b04 subs.w fp, sl, r4 800d7a8: d00b beq.n 800d7c2 <_svfiprintf_r+0x7e> 800d7aa: 465b mov r3, fp 800d7ac: 4622 mov r2, r4 800d7ae: 4629 mov r1, r5 800d7b0: 4638 mov r0, r7 800d7b2: f7ff ff6b bl 800d68c <__ssputs_r> 800d7b6: 3001 adds r0, #1 800d7b8: f000 80a7 beq.w 800d90a <_svfiprintf_r+0x1c6> 800d7bc: 9a09 ldr r2, [sp, #36] @ 0x24 800d7be: 445a add r2, fp 800d7c0: 9209 str r2, [sp, #36] @ 0x24 800d7c2: f89a 3000 ldrb.w r3, [sl] 800d7c6: 2b00 cmp r3, #0 800d7c8: f000 809f beq.w 800d90a <_svfiprintf_r+0x1c6> 800d7cc: 2300 movs r3, #0 800d7ce: f04f 32ff mov.w r2, #4294967295 800d7d2: e9cd 2305 strd r2, r3, [sp, #20] 800d7d6: f10a 0a01 add.w sl, sl, #1 800d7da: 9304 str r3, [sp, #16] 800d7dc: 9307 str r3, [sp, #28] 800d7de: f88d 3053 strb.w r3, [sp, #83] @ 0x53 800d7e2: 931a str r3, [sp, #104] @ 0x68 800d7e4: 4654 mov r4, sl 800d7e6: 2205 movs r2, #5 800d7e8: f814 1b01 ldrb.w r1, [r4], #1 800d7ec: 484e ldr r0, [pc, #312] @ (800d928 <_svfiprintf_r+0x1e4>) 800d7ee: f000 fa5f bl 800dcb0 800d7f2: 9a04 ldr r2, [sp, #16] 800d7f4: b9d8 cbnz r0, 800d82e <_svfiprintf_r+0xea> 800d7f6: 06d0 lsls r0, r2, #27 800d7f8: bf44 itt mi 800d7fa: 2320 movmi r3, #32 800d7fc: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800d800: 0711 lsls r1, r2, #28 800d802: bf44 itt mi 800d804: 232b movmi r3, #43 @ 0x2b 800d806: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800d80a: f89a 3000 ldrb.w r3, [sl] 800d80e: 2b2a cmp r3, #42 @ 0x2a 800d810: d015 beq.n 800d83e <_svfiprintf_r+0xfa> 800d812: 4654 mov r4, sl 800d814: 2000 movs r0, #0 800d816: f04f 0c0a mov.w ip, #10 800d81a: 9a07 ldr r2, [sp, #28] 800d81c: 4621 mov r1, r4 800d81e: f811 3b01 ldrb.w r3, [r1], #1 800d822: 3b30 subs r3, #48 @ 0x30 800d824: 2b09 cmp r3, #9 800d826: d94b bls.n 800d8c0 <_svfiprintf_r+0x17c> 800d828: b1b0 cbz r0, 800d858 <_svfiprintf_r+0x114> 800d82a: 9207 str r2, [sp, #28] 800d82c: e014 b.n 800d858 <_svfiprintf_r+0x114> 800d82e: eba0 0308 sub.w r3, r0, r8 800d832: fa09 f303 lsl.w r3, r9, r3 800d836: 4313 orrs r3, r2 800d838: 46a2 mov sl, r4 800d83a: 9304 str r3, [sp, #16] 800d83c: e7d2 b.n 800d7e4 <_svfiprintf_r+0xa0> 800d83e: 9b03 ldr r3, [sp, #12] 800d840: 1d19 adds r1, r3, #4 800d842: 681b ldr r3, [r3, #0] 800d844: 9103 str r1, [sp, #12] 800d846: 2b00 cmp r3, #0 800d848: bfbb ittet lt 800d84a: 425b neglt r3, r3 800d84c: f042 0202 orrlt.w r2, r2, #2 800d850: 9307 strge r3, [sp, #28] 800d852: 9307 strlt r3, [sp, #28] 800d854: bfb8 it lt 800d856: 9204 strlt r2, [sp, #16] 800d858: 7823 ldrb r3, [r4, #0] 800d85a: 2b2e cmp r3, #46 @ 0x2e 800d85c: d10a bne.n 800d874 <_svfiprintf_r+0x130> 800d85e: 7863 ldrb r3, [r4, #1] 800d860: 2b2a cmp r3, #42 @ 0x2a 800d862: d132 bne.n 800d8ca <_svfiprintf_r+0x186> 800d864: 9b03 ldr r3, [sp, #12] 800d866: 3402 adds r4, #2 800d868: 1d1a adds r2, r3, #4 800d86a: 681b ldr r3, [r3, #0] 800d86c: 9203 str r2, [sp, #12] 800d86e: ea43 73e3 orr.w r3, r3, r3, asr #31 800d872: 9305 str r3, [sp, #20] 800d874: f8df a0b4 ldr.w sl, [pc, #180] @ 800d92c <_svfiprintf_r+0x1e8> 800d878: 2203 movs r2, #3 800d87a: 4650 mov r0, sl 800d87c: 7821 ldrb r1, [r4, #0] 800d87e: f000 fa17 bl 800dcb0 800d882: b138 cbz r0, 800d894 <_svfiprintf_r+0x150> 800d884: 2240 movs r2, #64 @ 0x40 800d886: 9b04 ldr r3, [sp, #16] 800d888: eba0 000a sub.w r0, r0, sl 800d88c: 4082 lsls r2, r0 800d88e: 4313 orrs r3, r2 800d890: 3401 adds r4, #1 800d892: 9304 str r3, [sp, #16] 800d894: f814 1b01 ldrb.w r1, [r4], #1 800d898: 2206 movs r2, #6 800d89a: 4825 ldr r0, [pc, #148] @ (800d930 <_svfiprintf_r+0x1ec>) 800d89c: f88d 1028 strb.w r1, [sp, #40] @ 0x28 800d8a0: f000 fa06 bl 800dcb0 800d8a4: 2800 cmp r0, #0 800d8a6: d036 beq.n 800d916 <_svfiprintf_r+0x1d2> 800d8a8: 4b22 ldr r3, [pc, #136] @ (800d934 <_svfiprintf_r+0x1f0>) 800d8aa: bb1b cbnz r3, 800d8f4 <_svfiprintf_r+0x1b0> 800d8ac: 9b03 ldr r3, [sp, #12] 800d8ae: 3307 adds r3, #7 800d8b0: f023 0307 bic.w r3, r3, #7 800d8b4: 3308 adds r3, #8 800d8b6: 9303 str r3, [sp, #12] 800d8b8: 9b09 ldr r3, [sp, #36] @ 0x24 800d8ba: 4433 add r3, r6 800d8bc: 9309 str r3, [sp, #36] @ 0x24 800d8be: e76a b.n 800d796 <_svfiprintf_r+0x52> 800d8c0: 460c mov r4, r1 800d8c2: 2001 movs r0, #1 800d8c4: fb0c 3202 mla r2, ip, r2, r3 800d8c8: e7a8 b.n 800d81c <_svfiprintf_r+0xd8> 800d8ca: 2300 movs r3, #0 800d8cc: f04f 0c0a mov.w ip, #10 800d8d0: 4619 mov r1, r3 800d8d2: 3401 adds r4, #1 800d8d4: 9305 str r3, [sp, #20] 800d8d6: 4620 mov r0, r4 800d8d8: f810 2b01 ldrb.w r2, [r0], #1 800d8dc: 3a30 subs r2, #48 @ 0x30 800d8de: 2a09 cmp r2, #9 800d8e0: d903 bls.n 800d8ea <_svfiprintf_r+0x1a6> 800d8e2: 2b00 cmp r3, #0 800d8e4: d0c6 beq.n 800d874 <_svfiprintf_r+0x130> 800d8e6: 9105 str r1, [sp, #20] 800d8e8: e7c4 b.n 800d874 <_svfiprintf_r+0x130> 800d8ea: 4604 mov r4, r0 800d8ec: 2301 movs r3, #1 800d8ee: fb0c 2101 mla r1, ip, r1, r2 800d8f2: e7f0 b.n 800d8d6 <_svfiprintf_r+0x192> 800d8f4: ab03 add r3, sp, #12 800d8f6: 9300 str r3, [sp, #0] 800d8f8: 462a mov r2, r5 800d8fa: 4638 mov r0, r7 800d8fc: 4b0e ldr r3, [pc, #56] @ (800d938 <_svfiprintf_r+0x1f4>) 800d8fe: a904 add r1, sp, #16 800d900: f3af 8000 nop.w 800d904: 1c42 adds r2, r0, #1 800d906: 4606 mov r6, r0 800d908: d1d6 bne.n 800d8b8 <_svfiprintf_r+0x174> 800d90a: 89ab ldrh r3, [r5, #12] 800d90c: 065b lsls r3, r3, #25 800d90e: f53f af2d bmi.w 800d76c <_svfiprintf_r+0x28> 800d912: 9809 ldr r0, [sp, #36] @ 0x24 800d914: e72c b.n 800d770 <_svfiprintf_r+0x2c> 800d916: ab03 add r3, sp, #12 800d918: 9300 str r3, [sp, #0] 800d91a: 462a mov r2, r5 800d91c: 4638 mov r0, r7 800d91e: 4b06 ldr r3, [pc, #24] @ (800d938 <_svfiprintf_r+0x1f4>) 800d920: a904 add r1, sp, #16 800d922: f000 f87d bl 800da20 <_printf_i> 800d926: e7ed b.n 800d904 <_svfiprintf_r+0x1c0> 800d928: 0800e0ce .word 0x0800e0ce 800d92c: 0800e0d4 .word 0x0800e0d4 800d930: 0800e0d8 .word 0x0800e0d8 800d934: 00000000 .word 0x00000000 800d938: 0800d68d .word 0x0800d68d 0800d93c <_printf_common>: 800d93c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800d940: 4616 mov r6, r2 800d942: 4698 mov r8, r3 800d944: 688a ldr r2, [r1, #8] 800d946: 690b ldr r3, [r1, #16] 800d948: 4607 mov r7, r0 800d94a: 4293 cmp r3, r2 800d94c: bfb8 it lt 800d94e: 4613 movlt r3, r2 800d950: 6033 str r3, [r6, #0] 800d952: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 800d956: 460c mov r4, r1 800d958: f8dd 9020 ldr.w r9, [sp, #32] 800d95c: b10a cbz r2, 800d962 <_printf_common+0x26> 800d95e: 3301 adds r3, #1 800d960: 6033 str r3, [r6, #0] 800d962: 6823 ldr r3, [r4, #0] 800d964: 0699 lsls r1, r3, #26 800d966: bf42 ittt mi 800d968: 6833 ldrmi r3, [r6, #0] 800d96a: 3302 addmi r3, #2 800d96c: 6033 strmi r3, [r6, #0] 800d96e: 6825 ldr r5, [r4, #0] 800d970: f015 0506 ands.w r5, r5, #6 800d974: d106 bne.n 800d984 <_printf_common+0x48> 800d976: f104 0a19 add.w sl, r4, #25 800d97a: 68e3 ldr r3, [r4, #12] 800d97c: 6832 ldr r2, [r6, #0] 800d97e: 1a9b subs r3, r3, r2 800d980: 42ab cmp r3, r5 800d982: dc2b bgt.n 800d9dc <_printf_common+0xa0> 800d984: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 800d988: 6822 ldr r2, [r4, #0] 800d98a: 3b00 subs r3, #0 800d98c: bf18 it ne 800d98e: 2301 movne r3, #1 800d990: 0692 lsls r2, r2, #26 800d992: d430 bmi.n 800d9f6 <_printf_common+0xba> 800d994: 4641 mov r1, r8 800d996: 4638 mov r0, r7 800d998: f104 0243 add.w r2, r4, #67 @ 0x43 800d99c: 47c8 blx r9 800d99e: 3001 adds r0, #1 800d9a0: d023 beq.n 800d9ea <_printf_common+0xae> 800d9a2: 6823 ldr r3, [r4, #0] 800d9a4: 6922 ldr r2, [r4, #16] 800d9a6: f003 0306 and.w r3, r3, #6 800d9aa: 2b04 cmp r3, #4 800d9ac: bf14 ite ne 800d9ae: 2500 movne r5, #0 800d9b0: 6833 ldreq r3, [r6, #0] 800d9b2: f04f 0600 mov.w r6, #0 800d9b6: bf08 it eq 800d9b8: 68e5 ldreq r5, [r4, #12] 800d9ba: f104 041a add.w r4, r4, #26 800d9be: bf08 it eq 800d9c0: 1aed subeq r5, r5, r3 800d9c2: f854 3c12 ldr.w r3, [r4, #-18] 800d9c6: bf08 it eq 800d9c8: ea25 75e5 biceq.w r5, r5, r5, asr #31 800d9cc: 4293 cmp r3, r2 800d9ce: bfc4 itt gt 800d9d0: 1a9b subgt r3, r3, r2 800d9d2: 18ed addgt r5, r5, r3 800d9d4: 42b5 cmp r5, r6 800d9d6: d11a bne.n 800da0e <_printf_common+0xd2> 800d9d8: 2000 movs r0, #0 800d9da: e008 b.n 800d9ee <_printf_common+0xb2> 800d9dc: 2301 movs r3, #1 800d9de: 4652 mov r2, sl 800d9e0: 4641 mov r1, r8 800d9e2: 4638 mov r0, r7 800d9e4: 47c8 blx r9 800d9e6: 3001 adds r0, #1 800d9e8: d103 bne.n 800d9f2 <_printf_common+0xb6> 800d9ea: f04f 30ff mov.w r0, #4294967295 800d9ee: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800d9f2: 3501 adds r5, #1 800d9f4: e7c1 b.n 800d97a <_printf_common+0x3e> 800d9f6: 2030 movs r0, #48 @ 0x30 800d9f8: 18e1 adds r1, r4, r3 800d9fa: f881 0043 strb.w r0, [r1, #67] @ 0x43 800d9fe: 1c5a adds r2, r3, #1 800da00: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 800da04: 4422 add r2, r4 800da06: 3302 adds r3, #2 800da08: f882 1043 strb.w r1, [r2, #67] @ 0x43 800da0c: e7c2 b.n 800d994 <_printf_common+0x58> 800da0e: 2301 movs r3, #1 800da10: 4622 mov r2, r4 800da12: 4641 mov r1, r8 800da14: 4638 mov r0, r7 800da16: 47c8 blx r9 800da18: 3001 adds r0, #1 800da1a: d0e6 beq.n 800d9ea <_printf_common+0xae> 800da1c: 3601 adds r6, #1 800da1e: e7d9 b.n 800d9d4 <_printf_common+0x98> 0800da20 <_printf_i>: 800da20: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 800da24: 7e0f ldrb r7, [r1, #24] 800da26: 4691 mov r9, r2 800da28: 2f78 cmp r7, #120 @ 0x78 800da2a: 4680 mov r8, r0 800da2c: 460c mov r4, r1 800da2e: 469a mov sl, r3 800da30: 9e0c ldr r6, [sp, #48] @ 0x30 800da32: f101 0243 add.w r2, r1, #67 @ 0x43 800da36: d807 bhi.n 800da48 <_printf_i+0x28> 800da38: 2f62 cmp r7, #98 @ 0x62 800da3a: d80a bhi.n 800da52 <_printf_i+0x32> 800da3c: 2f00 cmp r7, #0 800da3e: f000 80d1 beq.w 800dbe4 <_printf_i+0x1c4> 800da42: 2f58 cmp r7, #88 @ 0x58 800da44: f000 80b8 beq.w 800dbb8 <_printf_i+0x198> 800da48: f104 0642 add.w r6, r4, #66 @ 0x42 800da4c: f884 7042 strb.w r7, [r4, #66] @ 0x42 800da50: e03a b.n 800dac8 <_printf_i+0xa8> 800da52: f1a7 0363 sub.w r3, r7, #99 @ 0x63 800da56: 2b15 cmp r3, #21 800da58: d8f6 bhi.n 800da48 <_printf_i+0x28> 800da5a: a101 add r1, pc, #4 @ (adr r1, 800da60 <_printf_i+0x40>) 800da5c: f851 f023 ldr.w pc, [r1, r3, lsl #2] 800da60: 0800dab9 .word 0x0800dab9 800da64: 0800dacd .word 0x0800dacd 800da68: 0800da49 .word 0x0800da49 800da6c: 0800da49 .word 0x0800da49 800da70: 0800da49 .word 0x0800da49 800da74: 0800da49 .word 0x0800da49 800da78: 0800dacd .word 0x0800dacd 800da7c: 0800da49 .word 0x0800da49 800da80: 0800da49 .word 0x0800da49 800da84: 0800da49 .word 0x0800da49 800da88: 0800da49 .word 0x0800da49 800da8c: 0800dbcb .word 0x0800dbcb 800da90: 0800daf7 .word 0x0800daf7 800da94: 0800db85 .word 0x0800db85 800da98: 0800da49 .word 0x0800da49 800da9c: 0800da49 .word 0x0800da49 800daa0: 0800dbed .word 0x0800dbed 800daa4: 0800da49 .word 0x0800da49 800daa8: 0800daf7 .word 0x0800daf7 800daac: 0800da49 .word 0x0800da49 800dab0: 0800da49 .word 0x0800da49 800dab4: 0800db8d .word 0x0800db8d 800dab8: 6833 ldr r3, [r6, #0] 800daba: 1d1a adds r2, r3, #4 800dabc: 681b ldr r3, [r3, #0] 800dabe: 6032 str r2, [r6, #0] 800dac0: f104 0642 add.w r6, r4, #66 @ 0x42 800dac4: f884 3042 strb.w r3, [r4, #66] @ 0x42 800dac8: 2301 movs r3, #1 800daca: e09c b.n 800dc06 <_printf_i+0x1e6> 800dacc: 6833 ldr r3, [r6, #0] 800dace: 6820 ldr r0, [r4, #0] 800dad0: 1d19 adds r1, r3, #4 800dad2: 6031 str r1, [r6, #0] 800dad4: 0606 lsls r6, r0, #24 800dad6: d501 bpl.n 800dadc <_printf_i+0xbc> 800dad8: 681d ldr r5, [r3, #0] 800dada: e003 b.n 800dae4 <_printf_i+0xc4> 800dadc: 0645 lsls r5, r0, #25 800dade: d5fb bpl.n 800dad8 <_printf_i+0xb8> 800dae0: f9b3 5000 ldrsh.w r5, [r3] 800dae4: 2d00 cmp r5, #0 800dae6: da03 bge.n 800daf0 <_printf_i+0xd0> 800dae8: 232d movs r3, #45 @ 0x2d 800daea: 426d negs r5, r5 800daec: f884 3043 strb.w r3, [r4, #67] @ 0x43 800daf0: 230a movs r3, #10 800daf2: 4858 ldr r0, [pc, #352] @ (800dc54 <_printf_i+0x234>) 800daf4: e011 b.n 800db1a <_printf_i+0xfa> 800daf6: 6821 ldr r1, [r4, #0] 800daf8: 6833 ldr r3, [r6, #0] 800dafa: 0608 lsls r0, r1, #24 800dafc: f853 5b04 ldr.w r5, [r3], #4 800db00: d402 bmi.n 800db08 <_printf_i+0xe8> 800db02: 0649 lsls r1, r1, #25 800db04: bf48 it mi 800db06: b2ad uxthmi r5, r5 800db08: 2f6f cmp r7, #111 @ 0x6f 800db0a: 6033 str r3, [r6, #0] 800db0c: bf14 ite ne 800db0e: 230a movne r3, #10 800db10: 2308 moveq r3, #8 800db12: 4850 ldr r0, [pc, #320] @ (800dc54 <_printf_i+0x234>) 800db14: 2100 movs r1, #0 800db16: f884 1043 strb.w r1, [r4, #67] @ 0x43 800db1a: 6866 ldr r6, [r4, #4] 800db1c: 2e00 cmp r6, #0 800db1e: 60a6 str r6, [r4, #8] 800db20: db05 blt.n 800db2e <_printf_i+0x10e> 800db22: 6821 ldr r1, [r4, #0] 800db24: 432e orrs r6, r5 800db26: f021 0104 bic.w r1, r1, #4 800db2a: 6021 str r1, [r4, #0] 800db2c: d04b beq.n 800dbc6 <_printf_i+0x1a6> 800db2e: 4616 mov r6, r2 800db30: fbb5 f1f3 udiv r1, r5, r3 800db34: fb03 5711 mls r7, r3, r1, r5 800db38: 5dc7 ldrb r7, [r0, r7] 800db3a: f806 7d01 strb.w r7, [r6, #-1]! 800db3e: 462f mov r7, r5 800db40: 42bb cmp r3, r7 800db42: 460d mov r5, r1 800db44: d9f4 bls.n 800db30 <_printf_i+0x110> 800db46: 2b08 cmp r3, #8 800db48: d10b bne.n 800db62 <_printf_i+0x142> 800db4a: 6823 ldr r3, [r4, #0] 800db4c: 07df lsls r7, r3, #31 800db4e: d508 bpl.n 800db62 <_printf_i+0x142> 800db50: 6923 ldr r3, [r4, #16] 800db52: 6861 ldr r1, [r4, #4] 800db54: 4299 cmp r1, r3 800db56: bfde ittt le 800db58: 2330 movle r3, #48 @ 0x30 800db5a: f806 3c01 strble.w r3, [r6, #-1] 800db5e: f106 36ff addle.w r6, r6, #4294967295 800db62: 1b92 subs r2, r2, r6 800db64: 6122 str r2, [r4, #16] 800db66: 464b mov r3, r9 800db68: 4621 mov r1, r4 800db6a: 4640 mov r0, r8 800db6c: f8cd a000 str.w sl, [sp] 800db70: aa03 add r2, sp, #12 800db72: f7ff fee3 bl 800d93c <_printf_common> 800db76: 3001 adds r0, #1 800db78: d14a bne.n 800dc10 <_printf_i+0x1f0> 800db7a: f04f 30ff mov.w r0, #4294967295 800db7e: b004 add sp, #16 800db80: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800db84: 6823 ldr r3, [r4, #0] 800db86: f043 0320 orr.w r3, r3, #32 800db8a: 6023 str r3, [r4, #0] 800db8c: 2778 movs r7, #120 @ 0x78 800db8e: 4832 ldr r0, [pc, #200] @ (800dc58 <_printf_i+0x238>) 800db90: f884 7045 strb.w r7, [r4, #69] @ 0x45 800db94: 6823 ldr r3, [r4, #0] 800db96: 6831 ldr r1, [r6, #0] 800db98: 061f lsls r7, r3, #24 800db9a: f851 5b04 ldr.w r5, [r1], #4 800db9e: d402 bmi.n 800dba6 <_printf_i+0x186> 800dba0: 065f lsls r7, r3, #25 800dba2: bf48 it mi 800dba4: b2ad uxthmi r5, r5 800dba6: 6031 str r1, [r6, #0] 800dba8: 07d9 lsls r1, r3, #31 800dbaa: bf44 itt mi 800dbac: f043 0320 orrmi.w r3, r3, #32 800dbb0: 6023 strmi r3, [r4, #0] 800dbb2: b11d cbz r5, 800dbbc <_printf_i+0x19c> 800dbb4: 2310 movs r3, #16 800dbb6: e7ad b.n 800db14 <_printf_i+0xf4> 800dbb8: 4826 ldr r0, [pc, #152] @ (800dc54 <_printf_i+0x234>) 800dbba: e7e9 b.n 800db90 <_printf_i+0x170> 800dbbc: 6823 ldr r3, [r4, #0] 800dbbe: f023 0320 bic.w r3, r3, #32 800dbc2: 6023 str r3, [r4, #0] 800dbc4: e7f6 b.n 800dbb4 <_printf_i+0x194> 800dbc6: 4616 mov r6, r2 800dbc8: e7bd b.n 800db46 <_printf_i+0x126> 800dbca: 6833 ldr r3, [r6, #0] 800dbcc: 6825 ldr r5, [r4, #0] 800dbce: 1d18 adds r0, r3, #4 800dbd0: 6961 ldr r1, [r4, #20] 800dbd2: 6030 str r0, [r6, #0] 800dbd4: 062e lsls r6, r5, #24 800dbd6: 681b ldr r3, [r3, #0] 800dbd8: d501 bpl.n 800dbde <_printf_i+0x1be> 800dbda: 6019 str r1, [r3, #0] 800dbdc: e002 b.n 800dbe4 <_printf_i+0x1c4> 800dbde: 0668 lsls r0, r5, #25 800dbe0: d5fb bpl.n 800dbda <_printf_i+0x1ba> 800dbe2: 8019 strh r1, [r3, #0] 800dbe4: 2300 movs r3, #0 800dbe6: 4616 mov r6, r2 800dbe8: 6123 str r3, [r4, #16] 800dbea: e7bc b.n 800db66 <_printf_i+0x146> 800dbec: 6833 ldr r3, [r6, #0] 800dbee: 2100 movs r1, #0 800dbf0: 1d1a adds r2, r3, #4 800dbf2: 6032 str r2, [r6, #0] 800dbf4: 681e ldr r6, [r3, #0] 800dbf6: 6862 ldr r2, [r4, #4] 800dbf8: 4630 mov r0, r6 800dbfa: f000 f859 bl 800dcb0 800dbfe: b108 cbz r0, 800dc04 <_printf_i+0x1e4> 800dc00: 1b80 subs r0, r0, r6 800dc02: 6060 str r0, [r4, #4] 800dc04: 6863 ldr r3, [r4, #4] 800dc06: 6123 str r3, [r4, #16] 800dc08: 2300 movs r3, #0 800dc0a: f884 3043 strb.w r3, [r4, #67] @ 0x43 800dc0e: e7aa b.n 800db66 <_printf_i+0x146> 800dc10: 4632 mov r2, r6 800dc12: 4649 mov r1, r9 800dc14: 4640 mov r0, r8 800dc16: 6923 ldr r3, [r4, #16] 800dc18: 47d0 blx sl 800dc1a: 3001 adds r0, #1 800dc1c: d0ad beq.n 800db7a <_printf_i+0x15a> 800dc1e: 6823 ldr r3, [r4, #0] 800dc20: 079b lsls r3, r3, #30 800dc22: d413 bmi.n 800dc4c <_printf_i+0x22c> 800dc24: 68e0 ldr r0, [r4, #12] 800dc26: 9b03 ldr r3, [sp, #12] 800dc28: 4298 cmp r0, r3 800dc2a: bfb8 it lt 800dc2c: 4618 movlt r0, r3 800dc2e: e7a6 b.n 800db7e <_printf_i+0x15e> 800dc30: 2301 movs r3, #1 800dc32: 4632 mov r2, r6 800dc34: 4649 mov r1, r9 800dc36: 4640 mov r0, r8 800dc38: 47d0 blx sl 800dc3a: 3001 adds r0, #1 800dc3c: d09d beq.n 800db7a <_printf_i+0x15a> 800dc3e: 3501 adds r5, #1 800dc40: 68e3 ldr r3, [r4, #12] 800dc42: 9903 ldr r1, [sp, #12] 800dc44: 1a5b subs r3, r3, r1 800dc46: 42ab cmp r3, r5 800dc48: dcf2 bgt.n 800dc30 <_printf_i+0x210> 800dc4a: e7eb b.n 800dc24 <_printf_i+0x204> 800dc4c: 2500 movs r5, #0 800dc4e: f104 0619 add.w r6, r4, #25 800dc52: e7f5 b.n 800dc40 <_printf_i+0x220> 800dc54: 0800e0df .word 0x0800e0df 800dc58: 0800e0f0 .word 0x0800e0f0 0800dc5c : 800dc5c: 4288 cmp r0, r1 800dc5e: b510 push {r4, lr} 800dc60: eb01 0402 add.w r4, r1, r2 800dc64: d902 bls.n 800dc6c 800dc66: 4284 cmp r4, r0 800dc68: 4623 mov r3, r4 800dc6a: d807 bhi.n 800dc7c 800dc6c: 1e43 subs r3, r0, #1 800dc6e: 42a1 cmp r1, r4 800dc70: d008 beq.n 800dc84 800dc72: f811 2b01 ldrb.w r2, [r1], #1 800dc76: f803 2f01 strb.w r2, [r3, #1]! 800dc7a: e7f8 b.n 800dc6e 800dc7c: 4601 mov r1, r0 800dc7e: 4402 add r2, r0 800dc80: 428a cmp r2, r1 800dc82: d100 bne.n 800dc86 800dc84: bd10 pop {r4, pc} 800dc86: f813 4d01 ldrb.w r4, [r3, #-1]! 800dc8a: f802 4d01 strb.w r4, [r2, #-1]! 800dc8e: e7f7 b.n 800dc80 0800dc90 <_sbrk_r>: 800dc90: b538 push {r3, r4, r5, lr} 800dc92: 2300 movs r3, #0 800dc94: 4d05 ldr r5, [pc, #20] @ (800dcac <_sbrk_r+0x1c>) 800dc96: 4604 mov r4, r0 800dc98: 4608 mov r0, r1 800dc9a: 602b str r3, [r5, #0] 800dc9c: f7f6 f976 bl 8003f8c <_sbrk> 800dca0: 1c43 adds r3, r0, #1 800dca2: d102 bne.n 800dcaa <_sbrk_r+0x1a> 800dca4: 682b ldr r3, [r5, #0] 800dca6: b103 cbz r3, 800dcaa <_sbrk_r+0x1a> 800dca8: 6023 str r3, [r4, #0] 800dcaa: bd38 pop {r3, r4, r5, pc} 800dcac: 2000186c .word 0x2000186c 0800dcb0 : 800dcb0: 4603 mov r3, r0 800dcb2: b510 push {r4, lr} 800dcb4: b2c9 uxtb r1, r1 800dcb6: 4402 add r2, r0 800dcb8: 4293 cmp r3, r2 800dcba: 4618 mov r0, r3 800dcbc: d101 bne.n 800dcc2 800dcbe: 2000 movs r0, #0 800dcc0: e003 b.n 800dcca 800dcc2: 7804 ldrb r4, [r0, #0] 800dcc4: 3301 adds r3, #1 800dcc6: 428c cmp r4, r1 800dcc8: d1f6 bne.n 800dcb8 800dcca: bd10 pop {r4, pc} 0800dccc : 800dccc: 440a add r2, r1 800dcce: 4291 cmp r1, r2 800dcd0: f100 33ff add.w r3, r0, #4294967295 800dcd4: d100 bne.n 800dcd8 800dcd6: 4770 bx lr 800dcd8: b510 push {r4, lr} 800dcda: f811 4b01 ldrb.w r4, [r1], #1 800dcde: 4291 cmp r1, r2 800dce0: f803 4f01 strb.w r4, [r3, #1]! 800dce4: d1f9 bne.n 800dcda 800dce6: bd10 pop {r4, pc} 0800dce8 <_realloc_r>: 800dce8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800dcec: 4607 mov r7, r0 800dcee: 4614 mov r4, r2 800dcf0: 460d mov r5, r1 800dcf2: b921 cbnz r1, 800dcfe <_realloc_r+0x16> 800dcf4: 4611 mov r1, r2 800dcf6: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800dcfa: f7ff bc3b b.w 800d574 <_malloc_r> 800dcfe: b92a cbnz r2, 800dd0c <_realloc_r+0x24> 800dd00: f7ff fbce bl 800d4a0 <_free_r> 800dd04: 4625 mov r5, r4 800dd06: 4628 mov r0, r5 800dd08: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800dd0c: f000 f81a bl 800dd44 <_malloc_usable_size_r> 800dd10: 4284 cmp r4, r0 800dd12: 4606 mov r6, r0 800dd14: d802 bhi.n 800dd1c <_realloc_r+0x34> 800dd16: ebb4 0f50 cmp.w r4, r0, lsr #1 800dd1a: d8f4 bhi.n 800dd06 <_realloc_r+0x1e> 800dd1c: 4621 mov r1, r4 800dd1e: 4638 mov r0, r7 800dd20: f7ff fc28 bl 800d574 <_malloc_r> 800dd24: 4680 mov r8, r0 800dd26: b908 cbnz r0, 800dd2c <_realloc_r+0x44> 800dd28: 4645 mov r5, r8 800dd2a: e7ec b.n 800dd06 <_realloc_r+0x1e> 800dd2c: 42b4 cmp r4, r6 800dd2e: 4622 mov r2, r4 800dd30: 4629 mov r1, r5 800dd32: bf28 it cs 800dd34: 4632 movcs r2, r6 800dd36: f7ff ffc9 bl 800dccc 800dd3a: 4629 mov r1, r5 800dd3c: 4638 mov r0, r7 800dd3e: f7ff fbaf bl 800d4a0 <_free_r> 800dd42: e7f1 b.n 800dd28 <_realloc_r+0x40> 0800dd44 <_malloc_usable_size_r>: 800dd44: f851 3c04 ldr.w r3, [r1, #-4] 800dd48: 1f18 subs r0, r3, #4 800dd4a: 2b00 cmp r3, #0 800dd4c: bfbc itt lt 800dd4e: 580b ldrlt r3, [r1, r0] 800dd50: 18c0 addlt r0, r0, r3 800dd52: 4770 bx lr 0800dd54 <_init>: 800dd54: b5f8 push {r3, r4, r5, r6, r7, lr} 800dd56: bf00 nop 800dd58: bcf8 pop {r3, r4, r5, r6, r7} 800dd5a: bc08 pop {r3} 800dd5c: 469e mov lr, r3 800dd5e: 4770 bx lr 0800dd60 <_fini>: 800dd60: b5f8 push {r3, r4, r5, r6, r7, lr} 800dd62: bf00 nop 800dd64: bcf8 pop {r3, r4, r5, r6, r7} 800dd66: bc08 pop {r3} 800dd68: 469e mov lr, r3 800dd6a: 4770 bx lr