AUTOM10.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000de04 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000338 0800df10 0800df10 0000ef10 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800e248 0800e248 000101d4 2**0 CONTENTS, READONLY 4 .ARM 00000008 0800e248 0800e248 0000f248 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 0800e250 0800e250 000101d4 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800e250 0800e250 0000f250 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 0800e254 0800e254 0000f254 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 000001d4 20000000 0800e258 00010000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 000016a4 200001d8 0800e42c 000101d8 2**3 ALLOC 10 ._user_heap_stack 00000604 2000187c 0800e42c 0001087c 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 000101d4 2**0 CONTENTS, READONLY 12 .debug_info 00019530 00000000 00000000 000101fd 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00004732 00000000 00000000 0002972d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001648 00000000 00000000 0002de60 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 00001116 00000000 00000000 0002f4a8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 0001cc9e 00000000 00000000 000305be 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001e25d 00000000 00000000 0004d25c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 00095cfc 00000000 00000000 0006b4b9 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 001011b5 2**0 CONTENTS, READONLY 20 .debug_frame 00006010 00000000 00000000 001011f8 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000052 00000000 00000000 00107208 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 0800010c <__do_global_dtors_aux>: 800010c: b510 push {r4, lr} 800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>) 8000110: 7823 ldrb r3, [r4, #0] 8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16> 8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>) 8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12> 8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>) 800011a: f3af 8000 nop.w 800011e: 2301 movs r3, #1 8000120: 7023 strb r3, [r4, #0] 8000122: bd10 pop {r4, pc} 8000124: 200001d8 .word 0x200001d8 8000128: 00000000 .word 0x00000000 800012c: 0800def8 .word 0x0800def8 08000130 : 8000130: b508 push {r3, lr} 8000132: 4b03 ldr r3, [pc, #12] @ (8000140 ) 8000134: b11b cbz r3, 800013e 8000136: 4903 ldr r1, [pc, #12] @ (8000144 ) 8000138: 4803 ldr r0, [pc, #12] @ (8000148 ) 800013a: f3af 8000 nop.w 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 8000144: 200001dc .word 0x200001dc 8000148: 0800def8 .word 0x0800def8 0800014c : 800014c: 4603 mov r3, r0 800014e: f813 2b01 ldrb.w r2, [r3], #1 8000152: 2a00 cmp r2, #0 8000154: d1fb bne.n 800014e 8000156: 1a18 subs r0, r3, r0 8000158: 3801 subs r0, #1 800015a: 4770 bx lr 0800015c : uint16_t ch5 ; uint16_t ch6 ; uint16_t ch7 ; uint16_t ch8 ; void manageAdc(void){ 800015c: b480 push {r7} 800015e: af00 add r7, sp, #0 if (adc_avg_ready) 8000160: 4b12 ldr r3, [pc, #72] @ (80001ac ) 8000162: 781b ldrb r3, [r3, #0] 8000164: b2db uxtb r3, r3 8000166: 2b00 cmp r3, #0 8000168: d01b beq.n 80001a2 { adc_avg_ready = 0; 800016a: 4b10 ldr r3, [pc, #64] @ (80001ac ) 800016c: 2200 movs r2, #0 800016e: 701a strb r2, [r3, #0] // Read averaged channels (example mapping) ch4 = adc_avg[0]; 8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 ) 8000172: 881b ldrh r3, [r3, #0] 8000174: b29a uxth r2, r3 8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 ) 8000178: 801a strh r2, [r3, #0] ch5 = adc_avg[1]; 800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 ) 800017c: 885b ldrh r3, [r3, #2] 800017e: b29a uxth r2, r3 8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 ) 8000182: 801a strh r2, [r3, #0] ch6 = adc_avg[2]; 8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 ) 8000186: 889b ldrh r3, [r3, #4] 8000188: b29a uxth r2, r3 800018a: 4b0c ldr r3, [pc, #48] @ (80001bc ) 800018c: 801a strh r2, [r3, #0] ch7 = adc_avg[3]; 800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 ) 8000190: 88db ldrh r3, [r3, #6] 8000192: b29a uxth r2, r3 8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 ) 8000196: 801a strh r2, [r3, #0] ch8 = adc_avg[4]; 8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 ) 800019a: 891b ldrh r3, [r3, #8] 800019c: b29a uxth r2, r3 800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 ) 80001a0: 801a strh r2, [r3, #0] // Use them (convert to volts, control, etc.) // float v4 = (3.3f * ch4) / 4095.0f; } } 80001a2: bf00 nop 80001a4: 46bd mov sp, r7 80001a6: bc80 pop {r7} 80001a8: 4770 bx lr 80001aa: bf00 nop 80001ac: 20000221 .word 0x20000221 80001b0: 20000200 .word 0x20000200 80001b4: 20000222 .word 0x20000222 80001b8: 20000224 .word 0x20000224 80001bc: 20000226 .word 0x20000226 80001c0: 20000228 .word 0x20000228 80001c4: 2000022a .word 0x2000022a 080001c8 : void readAdc(void){ 80001c8: b480 push {r7} 80001ca: b083 sub sp, #12 80001cc: af00 add r7, sp, #0 for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001ce: 2300 movs r3, #0 80001d0: 71fb strb r3, [r7, #7] 80001d2: e010 b.n 80001f6 { adc_sum[i] += adc_dma_buf[i]; 80001d4: 79fb ldrb r3, [r7, #7] 80001d6: 4a21 ldr r2, [pc, #132] @ (800025c ) 80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 80001dc: b299 uxth r1, r3 80001de: 79fb ldrb r3, [r7, #7] 80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 ) 80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2] 80001e6: 79fb ldrb r3, [r7, #7] 80001e8: 440a add r2, r1 80001ea: 491d ldr r1, [pc, #116] @ (8000260 ) 80001ec: f841 2023 str.w r2, [r1, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001f0: 79fb ldrb r3, [r7, #7] 80001f2: 3301 adds r3, #1 80001f4: 71fb strb r3, [r7, #7] 80001f6: 79fb ldrb r3, [r7, #7] 80001f8: 2b04 cmp r3, #4 80001fa: d9eb bls.n 80001d4 } adc_sum_count++; 80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 ) 80001fe: 781b ldrb r3, [r3, #0] 8000200: 3301 adds r3, #1 8000202: b2da uxtb r2, r3 8000204: 4b17 ldr r3, [pc, #92] @ (8000264 ) 8000206: 701a strb r2, [r3, #0] /* When we collected ADC_AVG_WINDOW samples → compute average */ if (adc_sum_count >= ADC_AVG_WINDOW) 8000208: 4b16 ldr r3, [pc, #88] @ (8000264 ) 800020a: 781b ldrb r3, [r3, #0] 800020c: 2b04 cmp r3, #4 800020e: d920 bls.n 8000252 { for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 8000210: 2300 movs r3, #0 8000212: 71bb strb r3, [r7, #6] 8000214: e014 b.n 8000240 { adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW); 8000216: 79bb ldrb r3, [r7, #6] 8000218: 4a11 ldr r2, [pc, #68] @ (8000260 ) 800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800021e: 4a12 ldr r2, [pc, #72] @ (8000268 ) 8000220: fba2 2303 umull r2, r3, r2, r3 8000224: 089a lsrs r2, r3, #2 8000226: 79bb ldrb r3, [r7, #6] 8000228: b291 uxth r1, r2 800022a: 4a10 ldr r2, [pc, #64] @ (800026c ) 800022c: f822 1013 strh.w r1, [r2, r3, lsl #1] adc_sum[i] = 0; 8000230: 79bb ldrb r3, [r7, #6] 8000232: 4a0b ldr r2, [pc, #44] @ (8000260 ) 8000234: 2100 movs r1, #0 8000236: f842 1023 str.w r1, [r2, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 800023a: 79bb ldrb r3, [r7, #6] 800023c: 3301 adds r3, #1 800023e: 71bb strb r3, [r7, #6] 8000240: 79bb ldrb r3, [r7, #6] 8000242: 2b04 cmp r3, #4 8000244: d9e7 bls.n 8000216 } adc_sum_count = 0; 8000246: 4b07 ldr r3, [pc, #28] @ (8000264 ) 8000248: 2200 movs r2, #0 800024a: 701a strb r2, [r3, #0] adc_avg_ready = 1; // tell main loop new data is ready 800024c: 4b08 ldr r3, [pc, #32] @ (8000270 ) 800024e: 2201 movs r2, #1 8000250: 701a strb r2, [r3, #0] } } 8000252: bf00 nop 8000254: 370c adds r7, #12 8000256: 46bd mov sp, r7 8000258: bc80 pop {r7} 800025a: 4770 bx lr 800025c: 200001f4 .word 0x200001f4 8000260: 2000020c .word 0x2000020c 8000264: 20000220 .word 0x20000220 8000268: cccccccd .word 0xcccccccd 800026c: 20000200 .word 0x20000200 8000270: 20000221 .word 0x20000221 08000274 : uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data); uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data); void loadEE(void); /* Pseudo-array accessor EEW[idx] */ static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value) { 8000274: b580 push {r7, lr} 8000276: b082 sub sp, #8 8000278: af00 add r7, sp, #0 800027a: 4603 mov r3, r0 800027c: 6039 str r1, [r7, #0] 800027e: 71fb strb r3, [r7, #7] return EE_ReadVariable(EEW_ADDR(idx), value); 8000280: 79fb ldrb r3, [r7, #7] 8000282: b29b uxth r3, r3 8000284: 3301 adds r3, #1 8000286: b29b uxth r3, r3 8000288: 6839 ldr r1, [r7, #0] 800028a: 4618 mov r0, r3 800028c: f000 ffda bl 8001244 8000290: 4603 mov r3, r0 } 8000292: 4618 mov r0, r3 8000294: 3708 adds r7, #8 8000296: 46bd mov sp, r7 8000298: bd80 pop {r7, pc} 0800029a : static inline uint16_t EEW_Write(uint8_t idx, uint16_t value) { 800029a: b580 push {r7, lr} 800029c: b082 sub sp, #8 800029e: af00 add r7, sp, #0 80002a0: 4603 mov r3, r0 80002a2: 460a mov r2, r1 80002a4: 71fb strb r3, [r7, #7] 80002a6: 4613 mov r3, r2 80002a8: 80bb strh r3, [r7, #4] return EE_WriteVariable(EEW_ADDR(idx), value); 80002aa: 79fb ldrb r3, [r7, #7] 80002ac: b29b uxth r3, r3 80002ae: 3301 adds r3, #1 80002b0: b29b uxth r3, r3 80002b2: 88ba ldrh r2, [r7, #4] 80002b4: 4611 mov r1, r2 80002b6: 4618 mov r0, r3 80002b8: f000 ffe0 bl 800127c 80002bc: 4603 mov r3, r0 } 80002be: 4618 mov r0, r3 80002c0: 3708 adds r7, #8 80002c2: 46bd mov sp, r7 80002c4: bd80 pop {r7, pc} 080002c6 : extern const uint8_t deftab[]; extern omCiclo_st stCiclo; extern omCiclo_st memstCiclo; extern uint8_t stPulsanti; bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){ 80002c6: b490 push {r4, r7} 80002c8: b082 sub sp, #8 80002ca: af00 add r7, sp, #0 80002cc: 4604 mov r4, r0 80002ce: 4608 mov r0, r1 80002d0: 4611 mov r1, r2 80002d2: 461a mov r2, r3 80002d4: 4623 mov r3, r4 80002d6: 71fb strb r3, [r7, #7] 80002d8: 4603 mov r3, r0 80002da: 71bb strb r3, [r7, #6] 80002dc: 460b mov r3, r1 80002de: 717b strb r3, [r7, #5] 80002e0: 4613 mov r3, r2 80002e2: 713b strb r3, [r7, #4] if((c1>='0')&&(c1<='9')){ 80002e4: 79fb ldrb r3, [r7, #7] 80002e6: 2b2f cmp r3, #47 @ 0x2f 80002e8: d906 bls.n 80002f8 80002ea: 79fb ldrb r3, [r7, #7] 80002ec: 2b39 cmp r3, #57 @ 0x39 80002ee: d803 bhi.n 80002f8 c1-='0'; 80002f0: 79fb ldrb r3, [r7, #7] 80002f2: 3b30 subs r3, #48 @ 0x30 80002f4: 71fb strb r3, [r7, #7] 80002f6: e00b b.n 8000310 }else if((c1>='a')&&(c1<='f')){ 80002f8: 79fb ldrb r3, [r7, #7] 80002fa: 2b60 cmp r3, #96 @ 0x60 80002fc: d906 bls.n 800030c 80002fe: 79fb ldrb r3, [r7, #7] 8000300: 2b66 cmp r3, #102 @ 0x66 8000302: d803 bhi.n 800030c c1=(c1-'a')+10; 8000304: 79fb ldrb r3, [r7, #7] 8000306: 3b57 subs r3, #87 @ 0x57 8000308: 71fb strb r3, [r7, #7] 800030a: e001 b.n 8000310 }else return false; 800030c: 2300 movs r3, #0 800030e: e070 b.n 80003f2 if((c2>='0')&&(c2<='9')){ 8000310: 79bb ldrb r3, [r7, #6] 8000312: 2b2f cmp r3, #47 @ 0x2f 8000314: d906 bls.n 8000324 8000316: 79bb ldrb r3, [r7, #6] 8000318: 2b39 cmp r3, #57 @ 0x39 800031a: d803 bhi.n 8000324 c2-='0'; 800031c: 79bb ldrb r3, [r7, #6] 800031e: 3b30 subs r3, #48 @ 0x30 8000320: 71bb strb r3, [r7, #6] 8000322: e00b b.n 800033c }else if((c2>='a')&&(c2<='f')){ 8000324: 79bb ldrb r3, [r7, #6] 8000326: 2b60 cmp r3, #96 @ 0x60 8000328: d906 bls.n 8000338 800032a: 79bb ldrb r3, [r7, #6] 800032c: 2b66 cmp r3, #102 @ 0x66 800032e: d803 bhi.n 8000338 c2=(c2-'a')+10; 8000330: 79bb ldrb r3, [r7, #6] 8000332: 3b57 subs r3, #87 @ 0x57 8000334: 71bb strb r3, [r7, #6] 8000336: e001 b.n 800033c }else return false; 8000338: 2300 movs r3, #0 800033a: e05a b.n 80003f2 if((c3>='0')&&(c3<='9')){ 800033c: 797b ldrb r3, [r7, #5] 800033e: 2b2f cmp r3, #47 @ 0x2f 8000340: d906 bls.n 8000350 8000342: 797b ldrb r3, [r7, #5] 8000344: 2b39 cmp r3, #57 @ 0x39 8000346: d803 bhi.n 8000350 c3-='0'; 8000348: 797b ldrb r3, [r7, #5] 800034a: 3b30 subs r3, #48 @ 0x30 800034c: 717b strb r3, [r7, #5] 800034e: e00b b.n 8000368 }else if((c3>='a')&&(c3<='f')){ 8000350: 797b ldrb r3, [r7, #5] 8000352: 2b60 cmp r3, #96 @ 0x60 8000354: d906 bls.n 8000364 8000356: 797b ldrb r3, [r7, #5] 8000358: 2b66 cmp r3, #102 @ 0x66 800035a: d803 bhi.n 8000364 c3=(c3-'a')+10; 800035c: 797b ldrb r3, [r7, #5] 800035e: 3b57 subs r3, #87 @ 0x57 8000360: 717b strb r3, [r7, #5] 8000362: e001 b.n 8000368 }else return false; 8000364: 2300 movs r3, #0 8000366: e044 b.n 80003f2 if((c4>='0')&&(c4<='9')){ 8000368: 793b ldrb r3, [r7, #4] 800036a: 2b2f cmp r3, #47 @ 0x2f 800036c: d906 bls.n 800037c 800036e: 793b ldrb r3, [r7, #4] 8000370: 2b39 cmp r3, #57 @ 0x39 8000372: d803 bhi.n 800037c c4-='0'; 8000374: 793b ldrb r3, [r7, #4] 8000376: 3b30 subs r3, #48 @ 0x30 8000378: 713b strb r3, [r7, #4] 800037a: e00b b.n 8000394 }else if((c4>='a')&&(c4<='f')){ 800037c: 793b ldrb r3, [r7, #4] 800037e: 2b60 cmp r3, #96 @ 0x60 8000380: d906 bls.n 8000390 8000382: 793b ldrb r3, [r7, #4] 8000384: 2b66 cmp r3, #102 @ 0x66 8000386: d803 bhi.n 8000390 c4=(c4-'a')+10; 8000388: 793b ldrb r3, [r7, #4] 800038a: 3b57 subs r3, #87 @ 0x57 800038c: 713b strb r3, [r7, #4] 800038e: e001 b.n 8000394 }else return false; 8000390: 2300 movs r3, #0 8000392: e02e b.n 80003f2 *retval=c1; 8000394: 79fb ldrb r3, [r7, #7] 8000396: b29a uxth r2, r3 8000398: 693b ldr r3, [r7, #16] 800039a: 801a strh r2, [r3, #0] *retval*=16; 800039c: 693b ldr r3, [r7, #16] 800039e: 881b ldrh r3, [r3, #0] 80003a0: 011b lsls r3, r3, #4 80003a2: b29a uxth r2, r3 80003a4: 693b ldr r3, [r7, #16] 80003a6: 801a strh r2, [r3, #0] *retval+=c2; 80003a8: 693b ldr r3, [r7, #16] 80003aa: 881a ldrh r2, [r3, #0] 80003ac: 79bb ldrb r3, [r7, #6] 80003ae: b29b uxth r3, r3 80003b0: 4413 add r3, r2 80003b2: b29a uxth r2, r3 80003b4: 693b ldr r3, [r7, #16] 80003b6: 801a strh r2, [r3, #0] *retval*=16; 80003b8: 693b ldr r3, [r7, #16] 80003ba: 881b ldrh r3, [r3, #0] 80003bc: 011b lsls r3, r3, #4 80003be: b29a uxth r2, r3 80003c0: 693b ldr r3, [r7, #16] 80003c2: 801a strh r2, [r3, #0] *retval+=c3; 80003c4: 693b ldr r3, [r7, #16] 80003c6: 881a ldrh r2, [r3, #0] 80003c8: 797b ldrb r3, [r7, #5] 80003ca: b29b uxth r3, r3 80003cc: 4413 add r3, r2 80003ce: b29a uxth r2, r3 80003d0: 693b ldr r3, [r7, #16] 80003d2: 801a strh r2, [r3, #0] *retval*=16; 80003d4: 693b ldr r3, [r7, #16] 80003d6: 881b ldrh r3, [r3, #0] 80003d8: 011b lsls r3, r3, #4 80003da: b29a uxth r2, r3 80003dc: 693b ldr r3, [r7, #16] 80003de: 801a strh r2, [r3, #0] *retval+=c4; 80003e0: 693b ldr r3, [r7, #16] 80003e2: 881a ldrh r2, [r3, #0] 80003e4: 793b ldrb r3, [r7, #4] 80003e6: b29b uxth r3, r3 80003e8: 4413 add r3, r2 80003ea: b29a uxth r2, r3 80003ec: 693b ldr r3, [r7, #16] 80003ee: 801a strh r2, [r3, #0] return true; 80003f0: 2301 movs r3, #1 } 80003f2: 4618 mov r0, r3 80003f4: 3708 adds r7, #8 80003f6: 46bd mov sp, r7 80003f8: bc90 pop {r4, r7} 80003fa: 4770 bx lr 080003fc : void manageCDC(void){ 80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8000400: b0a7 sub sp, #156 @ 0x9c 8000402: af06 add r7, sp, #24 uint16_t val; uint16_t st; uint16_t eeadd; uint8_t i; if (CDC_Available()) { 8000404: f00c fc14 bl 800cc30 8000408: 4603 mov r3, r0 800040a: 2b00 cmp r3, #0 800040c: f000 84d4 beq.w 8000db8 int rx = CDC_ReadByte(); 8000410: f00c fc22 bl 800cc58 8000414: 67b8 str r0, [r7, #120] @ 0x78 if (rx < 0) return; 8000416: 6fbb ldr r3, [r7, #120] @ 0x78 8000418: 2b00 cmp r3, #0 800041a: f2c0 84cc blt.w 8000db6 //uint8_t out = (uint8_t)c; //if (out >= 'a' && out <= 'z') out -= 32; // to upper rxbuf[rxidx]=rx; 800041e: 4bad ldr r3, [pc, #692] @ (80006d4 ) 8000420: 781b ldrb r3, [r3, #0] 8000422: 461a mov r2, r3 8000424: 6fbb ldr r3, [r7, #120] @ 0x78 8000426: b2d9 uxtb r1, r3 8000428: 4bab ldr r3, [pc, #684] @ (80006d8 ) 800042a: 5499 strb r1, [r3, r2] while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo 800042c: bf00 nop 800042e: 4ba9 ldr r3, [pc, #676] @ (80006d4 ) 8000430: 781b ldrb r3, [r3, #0] 8000432: 461a mov r2, r3 8000434: 4ba8 ldr r3, [pc, #672] @ (80006d8 ) 8000436: 4413 add r3, r2 8000438: 2101 movs r1, #1 800043a: 4618 mov r0, r3 800043c: f00c fcce bl 800cddc 8000440: 4603 mov r3, r0 8000442: 2b01 cmp r3, #1 8000444: d0f3 beq.n 800042e if((rx==0x0d)||(rx==0x0a)){ 8000446: 6fbb ldr r3, [r7, #120] @ 0x78 8000448: 2b0d cmp r3, #13 800044a: d003 beq.n 8000454 800044c: 6fbb ldr r3, [r7, #120] @ 0x78 800044e: 2b0a cmp r3, #10 8000450: f040 84aa bne.w 8000da8 if(rxidx){ 8000454: 4b9f ldr r3, [pc, #636] @ (80006d4 ) 8000456: 781b ldrb r3, [r3, #0] 8000458: 2b00 cmp r3, #0 800045a: f000 84a1 beq.w 8000da0 switch(rxbuf[0]){ 800045e: 4b9e ldr r3, [pc, #632] @ (80006d8 ) 8000460: 781b ldrb r3, [r3, #0] 8000462: 2b6d cmp r3, #109 @ 0x6d 8000464: f000 80fb beq.w 800065e 8000468: 2b6d cmp r3, #109 @ 0x6d 800046a: f300 8487 bgt.w 8000d7c 800046e: 2b69 cmp r3, #105 @ 0x69 8000470: d00a beq.n 8000488 8000472: 2b69 cmp r3, #105 @ 0x69 8000474: f300 8482 bgt.w 8000d7c 8000478: 2b49 cmp r3, #73 @ 0x49 800047a: f000 80df beq.w 800063c 800047e: 2b65 cmp r3, #101 @ 0x65 8000480: f000 8228 beq.w 80008d4 8000484: f000 bc7a b.w 8000d7c case 'i': sprintf((char*)s,"info\n"); 8000488: f107 030c add.w r3, r7, #12 800048c: 4993 ldr r1, [pc, #588] @ (80006dc ) 800048e: 4618 mov r0, r3 8000490: f00d f882 bl 800d598 while (CDC_Transmit_FS(s, 5) == USBD_BUSY); 8000494: bf00 nop 8000496: f107 030c add.w r3, r7, #12 800049a: 2105 movs r1, #5 800049c: 4618 mov r0, r3 800049e: f00c fc9d bl 800cddc 80004a2: 4603 mov r3, r0 80004a4: 2b01 cmp r3, #1 80004a6: d0f6 beq.n 8000496 sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4)); 80004a8: 2100 movs r1, #0 80004aa: 488d ldr r0, [pc, #564] @ (80006e0 ) 80004ac: f003 f84c bl 8003548 80004b0: 4603 mov r3, r0 80004b2: 4698 mov r8, r3 80004b4: 2104 movs r1, #4 80004b6: 488a ldr r0, [pc, #552] @ (80006e0 ) 80004b8: f003 f846 bl 8003548 80004bc: 4603 mov r3, r0 80004be: 4699 mov r9, r3 80004c0: 2108 movs r1, #8 80004c2: 4887 ldr r0, [pc, #540] @ (80006e0 ) 80004c4: f003 f840 bl 8003548 80004c8: 4603 mov r3, r0 80004ca: 461c mov r4, r3 80004cc: 210c movs r1, #12 80004ce: 4884 ldr r0, [pc, #528] @ (80006e0 ) 80004d0: f003 f83a bl 8003548 80004d4: 4603 mov r3, r0 80004d6: 461d mov r5, r3 80004d8: 2100 movs r1, #0 80004da: 4882 ldr r0, [pc, #520] @ (80006e4 ) 80004dc: f003 f834 bl 8003548 80004e0: 4603 mov r3, r0 80004e2: 461e mov r6, r3 80004e4: 2104 movs r1, #4 80004e6: 487f ldr r0, [pc, #508] @ (80006e4 ) 80004e8: f003 f82e bl 8003548 80004ec: 4603 mov r3, r0 80004ee: 607b str r3, [r7, #4] 80004f0: 2108 movs r1, #8 80004f2: 487c ldr r0, [pc, #496] @ (80006e4 ) 80004f4: f003 f828 bl 8003548 80004f8: 4603 mov r3, r0 80004fa: 603b str r3, [r7, #0] 80004fc: 210c movs r1, #12 80004fe: 4879 ldr r0, [pc, #484] @ (80006e4 ) 8000500: f003 f822 bl 8003548 8000504: 4603 mov r3, r0 8000506: f107 000c add.w r0, r7, #12 800050a: 9305 str r3, [sp, #20] 800050c: 683a ldr r2, [r7, #0] 800050e: 9204 str r2, [sp, #16] 8000510: 687b ldr r3, [r7, #4] 8000512: 9303 str r3, [sp, #12] 8000514: 9602 str r6, [sp, #8] 8000516: 9501 str r5, [sp, #4] 8000518: 9400 str r4, [sp, #0] 800051a: 464b mov r3, r9 800051c: 4642 mov r2, r8 800051e: 4972 ldr r1, [pc, #456] @ (80006e8 ) 8000520: f00d f83a bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000524: bf00 nop 8000526: f107 030c add.w r3, r7, #12 800052a: 4618 mov r0, r3 800052c: f7ff fe0e bl 800014c 8000530: 4603 mov r3, r0 8000532: b29a uxth r2, r3 8000534: f107 030c add.w r3, r7, #12 8000538: 4611 mov r1, r2 800053a: 4618 mov r0, r3 800053c: f00c fc4e bl 800cddc 8000540: 4603 mov r3, r0 8000542: 2b01 cmp r3, #1 8000544: d0ef beq.n 8000526 sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4)); 8000546: 4b66 ldr r3, [pc, #408] @ (80006e0 ) 8000548: 681b ldr r3, [r3, #0] 800054a: 6b5b ldr r3, [r3, #52] @ 0x34 800054c: 607b str r3, [r7, #4] 800054e: 4b64 ldr r3, [pc, #400] @ (80006e0 ) 8000550: 681b ldr r3, [r3, #0] 8000552: 6b99 ldr r1, [r3, #56] @ 0x38 8000554: 6039 str r1, [r7, #0] 8000556: 4b62 ldr r3, [pc, #392] @ (80006e0 ) 8000558: 681b ldr r3, [r3, #0] 800055a: 6bdb ldr r3, [r3, #60] @ 0x3c 800055c: 4a60 ldr r2, [pc, #384] @ (80006e0 ) 800055e: 6812 ldr r2, [r2, #0] 8000560: 6c12 ldr r2, [r2, #64] @ 0x40 8000562: 4960 ldr r1, [pc, #384] @ (80006e4 ) 8000564: 6809 ldr r1, [r1, #0] 8000566: 6b49 ldr r1, [r1, #52] @ 0x34 8000568: 485e ldr r0, [pc, #376] @ (80006e4 ) 800056a: 6800 ldr r0, [r0, #0] 800056c: 6b80 ldr r0, [r0, #56] @ 0x38 800056e: 4c5d ldr r4, [pc, #372] @ (80006e4 ) 8000570: 6824 ldr r4, [r4, #0] 8000572: 6be4 ldr r4, [r4, #60] @ 0x3c 8000574: 4d5b ldr r5, [pc, #364] @ (80006e4 ) 8000576: 682d ldr r5, [r5, #0] 8000578: 6c2d ldr r5, [r5, #64] @ 0x40 800057a: f107 060c add.w r6, r7, #12 800057e: 9505 str r5, [sp, #20] 8000580: 9404 str r4, [sp, #16] 8000582: 9003 str r0, [sp, #12] 8000584: 9102 str r1, [sp, #8] 8000586: 9201 str r2, [sp, #4] 8000588: 9300 str r3, [sp, #0] 800058a: 683b ldr r3, [r7, #0] 800058c: 687a ldr r2, [r7, #4] 800058e: 4957 ldr r1, [pc, #348] @ (80006ec ) 8000590: 4630 mov r0, r6 8000592: f00d f801 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000596: bf00 nop 8000598: f107 030c add.w r3, r7, #12 800059c: 4618 mov r0, r3 800059e: f7ff fdd5 bl 800014c 80005a2: 4603 mov r3, r0 80005a4: b29a uxth r2, r3 80005a6: f107 030c add.w r3, r7, #12 80005aa: 4611 mov r1, r2 80005ac: 4618 mov r0, r3 80005ae: f00c fc15 bl 800cddc 80005b2: 4603 mov r3, r0 80005b4: 2b01 cmp r3, #1 80005b6: d0ef beq.n 8000598 sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8); 80005b8: 4b4d ldr r3, [pc, #308] @ (80006f0 ) 80005ba: 781b ldrb r3, [r3, #0] 80005bc: 461d mov r5, r3 80005be: 4b4d ldr r3, [pc, #308] @ (80006f4 ) 80005c0: 881b ldrh r3, [r3, #0] 80005c2: 461e mov r6, r3 80005c4: 4b4c ldr r3, [pc, #304] @ (80006f8 ) 80005c6: 881b ldrh r3, [r3, #0] 80005c8: 461a mov r2, r3 80005ca: 4b4c ldr r3, [pc, #304] @ (80006fc ) 80005cc: 881b ldrh r3, [r3, #0] 80005ce: 4619 mov r1, r3 80005d0: 4b4b ldr r3, [pc, #300] @ (8000700 ) 80005d2: 881b ldrh r3, [r3, #0] 80005d4: 461c mov r4, r3 80005d6: 4b4b ldr r3, [pc, #300] @ (8000704 ) 80005d8: 881b ldrh r3, [r3, #0] 80005da: f107 000c add.w r0, r7, #12 80005de: 9303 str r3, [sp, #12] 80005e0: 9402 str r4, [sp, #8] 80005e2: 9101 str r1, [sp, #4] 80005e4: 9200 str r2, [sp, #0] 80005e6: 4633 mov r3, r6 80005e8: 462a mov r2, r5 80005ea: 4947 ldr r1, [pc, #284] @ (8000708 ) 80005ec: f00c ffd4 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80005f0: bf00 nop 80005f2: f107 030c add.w r3, r7, #12 80005f6: 4618 mov r0, r3 80005f8: f7ff fda8 bl 800014c 80005fc: 4603 mov r3, r0 80005fe: b29a uxth r2, r3 8000600: f107 030c add.w r3, r7, #12 8000604: 4611 mov r1, r2 8000606: 4618 mov r0, r3 8000608: f00c fbe8 bl 800cddc 800060c: 4603 mov r3, r0 800060e: 2b01 cmp r3, #1 8000610: d0ef beq.n 80005f2 sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti); 8000612: 4b3e ldr r3, [pc, #248] @ (800070c ) 8000614: 781b ldrb r3, [r3, #0] 8000616: 461a mov r2, r3 8000618: 4b3d ldr r3, [pc, #244] @ (8000710 ) 800061a: 781b ldrb r3, [r3, #0] 800061c: f107 000c add.w r0, r7, #12 8000620: 493c ldr r1, [pc, #240] @ (8000714 ) 8000622: f00c ffb9 bl 800d598 while (CDC_Transmit_FS(s, 31) == USBD_BUSY); 8000626: bf00 nop 8000628: f107 030c add.w r3, r7, #12 800062c: 211f movs r1, #31 800062e: 4618 mov r0, r3 8000630: f00c fbd4 bl 800cddc 8000634: 4603 mov r3, r0 8000636: 2b01 cmp r3, #1 8000638: d0f6 beq.n 8000628 break; 800063a: e3b1 b.n 8000da0 case 'I': sprintf((char*)s,"\nID000000"); 800063c: f107 030c add.w r3, r7, #12 8000640: 4935 ldr r1, [pc, #212] @ (8000718 ) 8000642: 4618 mov r0, r3 8000644: f00c ffa8 bl 800d598 while (CDC_Transmit_FS(s, 9) == USBD_BUSY); 8000648: bf00 nop 800064a: f107 030c add.w r3, r7, #12 800064e: 2109 movs r1, #9 8000650: 4618 mov r0, r3 8000652: f00c fbc3 bl 800cddc 8000656: 4603 mov r3, r0 8000658: 2b01 cmp r3, #1 800065a: d0f6 beq.n 800064a break; 800065c: e3a0 b.n 8000da0 case 'm': if(rxidx==8){ 800065e: 4b1d ldr r3, [pc, #116] @ (80006d4 ) 8000660: 781b ldrb r3, [r3, #0] 8000662: 2b08 cmp r3, #8 8000664: f040 8124 bne.w 80008b0 if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){ 8000668: 4b1b ldr r3, [pc, #108] @ (80006d8 ) 800066a: 785b ldrb r3, [r3, #1] 800066c: 2b30 cmp r3, #48 @ 0x30 800066e: f240 810e bls.w 800088e 8000672: 4b19 ldr r3, [pc, #100] @ (80006d8 ) 8000674: 785b ldrb r3, [r3, #1] 8000676: 2b34 cmp r3, #52 @ 0x34 8000678: f200 8109 bhi.w 800088e mot=rxbuf[1]-='0'; 800067c: 4b16 ldr r3, [pc, #88] @ (80006d8 ) 800067e: 785b ldrb r3, [r3, #1] 8000680: 3b30 subs r3, #48 @ 0x30 8000682: b2da uxtb r2, r3 8000684: 4b14 ldr r3, [pc, #80] @ (80006d8 ) 8000686: 705a strb r2, [r3, #1] 8000688: 4b13 ldr r3, [pc, #76] @ (80006d8 ) 800068a: 785b ldrb r3, [r3, #1] 800068c: f887 3077 strb.w r3, [r7, #119] @ 0x77 if(rxbuf[2]=='f'){ 8000690: 4b11 ldr r3, [pc, #68] @ (80006d8 ) 8000692: 789b ldrb r3, [r3, #2] 8000694: 2b66 cmp r3, #102 @ 0x66 8000696: d103 bne.n 80006a0 dir=FW; 8000698: 2300 movs r3, #0 800069a: f887 307f strb.w r3, [r7, #127] @ 0x7f 800069e: e03f b.n 8000720 }else if(rxbuf[2]=='b'){ 80006a0: 4b0d ldr r3, [pc, #52] @ (80006d8 ) 80006a2: 789b ldrb r3, [r3, #2] 80006a4: 2b62 cmp r3, #98 @ 0x62 80006a6: d103 bne.n 80006b0 dir=BW; 80006a8: 2301 movs r3, #1 80006aa: f887 307f strb.w r3, [r7, #127] @ 0x7f 80006ae: e037 b.n 8000720 }else{ sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore 80006b0: f107 030c add.w r3, r7, #12 80006b4: 4919 ldr r1, [pc, #100] @ (800071c ) 80006b6: 4618 mov r0, r3 80006b8: f00c ff6e bl 800d598 while (CDC_Transmit_FS(s, 16) == USBD_BUSY); 80006bc: bf00 nop 80006be: f107 030c add.w r3, r7, #12 80006c2: 2110 movs r1, #16 80006c4: 4618 mov r0, r3 80006c6: f00c fb89 bl 800cddc 80006ca: 4603 mov r3, r0 80006cc: 2b01 cmp r3, #1 80006ce: d0f6 beq.n 80006be break; 80006d0: e366 b.n 8000da0 80006d2: bf00 nop 80006d4: 2000022c .word 0x2000022c 80006d8: 20000230 .word 0x20000230 80006dc: 0800df10 .word 0x0800df10 80006e0: 20000310 .word 0x20000310 80006e4: 20000358 .word 0x20000358 80006e8: 0800df18 .word 0x0800df18 80006ec: 0800df30 .word 0x0800df30 80006f0: 200003e8 .word 0x200003e8 80006f4: 20000222 .word 0x20000222 80006f8: 20000224 .word 0x20000224 80006fc: 20000226 .word 0x20000226 8000700: 20000228 .word 0x20000228 8000704: 2000022a .word 0x2000022a 8000708: 0800df64 .word 0x0800df64 800070c: 20000432 .word 0x20000432 8000710: 20000430 .word 0x20000430 8000714: 0800df9c .word 0x0800df9c 8000718: 0800dfbc .word 0x0800dfbc 800071c: 0800dfc8 .word 0x0800dfc8 } if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 8000720: 4bb4 ldr r3, [pc, #720] @ (80009f4 ) 8000722: 78db ldrb r3, [r3, #3] 8000724: 2b2f cmp r3, #47 @ 0x2f 8000726: f240 80a1 bls.w 800086c 800072a: 4bb2 ldr r3, [pc, #712] @ (80009f4 ) 800072c: 78db ldrb r3, [r3, #3] 800072e: 2b39 cmp r3, #57 @ 0x39 8000730: f200 809c bhi.w 800086c 8000734: 4baf ldr r3, [pc, #700] @ (80009f4 ) 8000736: 791b ldrb r3, [r3, #4] 8000738: 2b2f cmp r3, #47 @ 0x2f 800073a: f240 8097 bls.w 800086c 800073e: 4bad ldr r3, [pc, #692] @ (80009f4 ) 8000740: 791b ldrb r3, [r3, #4] 8000742: 2b39 cmp r3, #57 @ 0x39 8000744: f200 8092 bhi.w 800086c 8000748: 4baa ldr r3, [pc, #680] @ (80009f4 ) 800074a: 795b ldrb r3, [r3, #5] 800074c: 2b2f cmp r3, #47 @ 0x2f 800074e: f240 808d bls.w 800086c 8000752: 4ba8 ldr r3, [pc, #672] @ (80009f4 ) 8000754: 795b ldrb r3, [r3, #5] 8000756: 2b39 cmp r3, #57 @ 0x39 8000758: f200 8088 bhi.w 800086c 800075c: 4ba5 ldr r3, [pc, #660] @ (80009f4 ) 800075e: 799b ldrb r3, [r3, #6] 8000760: 2b2f cmp r3, #47 @ 0x2f 8000762: f240 8083 bls.w 800086c 8000766: 4ba3 ldr r3, [pc, #652] @ (80009f4 ) 8000768: 799b ldrb r3, [r3, #6] 800076a: 2b39 cmp r3, #57 @ 0x39 800076c: d87e bhi.n 800086c 800076e: 4ba1 ldr r3, [pc, #644] @ (80009f4 ) 8000770: 79db ldrb r3, [r3, #7] 8000772: 2b2f cmp r3, #47 @ 0x2f 8000774: d97a bls.n 800086c 8000776: 4b9f ldr r3, [pc, #636] @ (80009f4 ) 8000778: 79db ldrb r3, [r3, #7] 800077a: 2b39 cmp r3, #57 @ 0x39 800077c: d876 bhi.n 800086c dm=rxbuf[3]-='0'; 800077e: 4b9d ldr r3, [pc, #628] @ (80009f4 ) 8000780: 78db ldrb r3, [r3, #3] 8000782: 3b30 subs r3, #48 @ 0x30 8000784: b2da uxtb r2, r3 8000786: 4b9b ldr r3, [pc, #620] @ (80009f4 ) 8000788: 70da strb r2, [r3, #3] 800078a: 4b9a ldr r3, [pc, #616] @ (80009f4 ) 800078c: 78db ldrb r3, [r3, #3] 800078e: f887 3076 strb.w r3, [r7, #118] @ 0x76 m=rxbuf[4]-='0'; 8000792: 4b98 ldr r3, [pc, #608] @ (80009f4 ) 8000794: 791b ldrb r3, [r3, #4] 8000796: 3b30 subs r3, #48 @ 0x30 8000798: b2da uxtb r2, r3 800079a: 4b96 ldr r3, [pc, #600] @ (80009f4 ) 800079c: 711a strb r2, [r3, #4] 800079e: 4b95 ldr r3, [pc, #596] @ (80009f4 ) 80007a0: 791b ldrb r3, [r3, #4] 80007a2: f887 3075 strb.w r3, [r7, #117] @ 0x75 c=rxbuf[5]-='0'; 80007a6: 4b93 ldr r3, [pc, #588] @ (80009f4 ) 80007a8: 795b ldrb r3, [r3, #5] 80007aa: 3b30 subs r3, #48 @ 0x30 80007ac: b2da uxtb r2, r3 80007ae: 4b91 ldr r3, [pc, #580] @ (80009f4 ) 80007b0: 715a strb r2, [r3, #5] 80007b2: 4b90 ldr r3, [pc, #576] @ (80009f4 ) 80007b4: 795b ldrb r3, [r3, #5] 80007b6: f887 3074 strb.w r3, [r7, #116] @ 0x74 d=rxbuf[6]-='0'; 80007ba: 4b8e ldr r3, [pc, #568] @ (80009f4 ) 80007bc: 799b ldrb r3, [r3, #6] 80007be: 3b30 subs r3, #48 @ 0x30 80007c0: b2da uxtb r2, r3 80007c2: 4b8c ldr r3, [pc, #560] @ (80009f4 ) 80007c4: 719a strb r2, [r3, #6] 80007c6: 4b8b ldr r3, [pc, #556] @ (80009f4 ) 80007c8: 799b ldrb r3, [r3, #6] 80007ca: f887 3073 strb.w r3, [r7, #115] @ 0x73 u=rxbuf[7]-='0'; 80007ce: 4b89 ldr r3, [pc, #548] @ (80009f4 ) 80007d0: 79db ldrb r3, [r3, #7] 80007d2: 3b30 subs r3, #48 @ 0x30 80007d4: b2da uxtb r2, r3 80007d6: 4b87 ldr r3, [pc, #540] @ (80009f4 ) 80007d8: 71da strb r2, [r3, #7] 80007da: 4b86 ldr r3, [pc, #536] @ (80009f4 ) 80007dc: 79db ldrb r3, [r3, #7] 80007de: f887 3072 strb.w r3, [r7, #114] @ 0x72 val=dm; 80007e2: f897 3076 ldrb.w r3, [r7, #118] @ 0x76 80007e6: b29b uxth r3, r3 80007e8: 817b strh r3, [r7, #10] val*=10; 80007ea: 897b ldrh r3, [r7, #10] 80007ec: 461a mov r2, r3 80007ee: 0092 lsls r2, r2, #2 80007f0: 4413 add r3, r2 80007f2: 005b lsls r3, r3, #1 80007f4: b29b uxth r3, r3 80007f6: 817b strh r3, [r7, #10] val+=m; 80007f8: f897 3075 ldrb.w r3, [r7, #117] @ 0x75 80007fc: b29a uxth r2, r3 80007fe: 897b ldrh r3, [r7, #10] 8000800: 4413 add r3, r2 8000802: b29b uxth r3, r3 8000804: 817b strh r3, [r7, #10] val*=10; 8000806: 897b ldrh r3, [r7, #10] 8000808: 461a mov r2, r3 800080a: 0092 lsls r2, r2, #2 800080c: 4413 add r3, r2 800080e: 005b lsls r3, r3, #1 8000810: b29b uxth r3, r3 8000812: 817b strh r3, [r7, #10] val+=c; 8000814: f897 3074 ldrb.w r3, [r7, #116] @ 0x74 8000818: b29a uxth r2, r3 800081a: 897b ldrh r3, [r7, #10] 800081c: 4413 add r3, r2 800081e: b29b uxth r3, r3 8000820: 817b strh r3, [r7, #10] val*=10; 8000822: 897b ldrh r3, [r7, #10] 8000824: 461a mov r2, r3 8000826: 0092 lsls r2, r2, #2 8000828: 4413 add r3, r2 800082a: 005b lsls r3, r3, #1 800082c: b29b uxth r3, r3 800082e: 817b strh r3, [r7, #10] val+=d; 8000830: f897 3073 ldrb.w r3, [r7, #115] @ 0x73 8000834: b29a uxth r2, r3 8000836: 897b ldrh r3, [r7, #10] 8000838: 4413 add r3, r2 800083a: b29b uxth r3, r3 800083c: 817b strh r3, [r7, #10] val*=10; 800083e: 897b ldrh r3, [r7, #10] 8000840: 461a mov r2, r3 8000842: 0092 lsls r2, r2, #2 8000844: 4413 add r3, r2 8000846: 005b lsls r3, r3, #1 8000848: b29b uxth r3, r3 800084a: 817b strh r3, [r7, #10] val+=u; 800084c: f897 3072 ldrb.w r3, [r7, #114] @ 0x72 8000850: b29a uxth r2, r3 8000852: 897b ldrh r3, [r7, #10] 8000854: 4413 add r3, r2 8000856: b29b uxth r3, r3 8000858: 817b strh r3, [r7, #10] SetMot(mot,dir,val); 800085a: 897a ldrh r2, [r7, #10] 800085c: f897 107f ldrb.w r1, [r7, #127] @ 0x7f 8000860: f897 3077 ldrb.w r3, [r7, #119] @ 0x77 8000864: 4618 mov r0, r3 8000866: f002 fee5 bl 8003634 if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 800086a: e032 b.n 80008d2 }else{ sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore 800086c: f107 030c add.w r3, r7, #12 8000870: 4961 ldr r1, [pc, #388] @ (80009f8 ) 8000872: 4618 mov r0, r3 8000874: f00c fe90 bl 800d598 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 8000878: bf00 nop 800087a: f107 030c add.w r3, r7, #12 800087e: 2113 movs r1, #19 8000880: 4618 mov r0, r3 8000882: f00c faab bl 800cddc 8000886: 4603 mov r3, r0 8000888: 2b01 cmp r3, #1 800088a: d0f6 beq.n 800087a if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 800088c: e021 b.n 80008d2 } }else{ sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore 800088e: f107 030c add.w r3, r7, #12 8000892: 495a ldr r1, [pc, #360] @ (80009fc ) 8000894: 4618 mov r0, r3 8000896: f00c fe7f bl 800d598 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 800089a: bf00 nop 800089c: f107 030c add.w r3, r7, #12 80008a0: 2113 movs r1, #19 80008a2: 4618 mov r0, r3 80008a4: f00c fa9a bl 800cddc 80008a8: 4603 mov r3, r0 80008aa: 2b01 cmp r3, #1 80008ac: d0f6 beq.n 800089c } }else{ sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore while (CDC_Transmit_FS(s, 10) == USBD_BUSY); } break; 80008ae: e277 b.n 8000da0 sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore 80008b0: f107 030c add.w r3, r7, #12 80008b4: 4952 ldr r1, [pc, #328] @ (8000a00 ) 80008b6: 4618 mov r0, r3 80008b8: f00c fe6e bl 800d598 while (CDC_Transmit_FS(s, 10) == USBD_BUSY); 80008bc: bf00 nop 80008be: f107 030c add.w r3, r7, #12 80008c2: 210a movs r1, #10 80008c4: 4618 mov r0, r3 80008c6: f00c fa89 bl 800cddc 80008ca: 4603 mov r3, r0 80008cc: 2b01 cmp r3, #1 80008ce: d0f6 beq.n 80008be break; 80008d0: e266 b.n 8000da0 80008d2: e265 b.n 8000da0 case 'e': if(rxidx>1){ 80008d4: 4b4b ldr r3, [pc, #300] @ (8000a04 ) 80008d6: 781b ldrb r3, [r3, #0] 80008d8: 2b01 cmp r3, #1 80008da: f240 8237 bls.w 8000d4c if(rxbuf[1]=='r'){ 80008de: 4b45 ldr r3, [pc, #276] @ (80009f4 ) 80008e0: 785b ldrb r3, [r3, #1] 80008e2: 2b72 cmp r3, #114 @ 0x72 80008e4: f040 8098 bne.w 8000a18 if(rxidx==4){ 80008e8: 4b46 ldr r3, [pc, #280] @ (8000a04 ) 80008ea: 781b ldrb r3, [r3, #0] 80008ec: 2b04 cmp r3, #4 80008ee: d169 bne.n 80009c4 if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 80008f0: 4b40 ldr r3, [pc, #256] @ (80009f4 ) 80008f2: 789a ldrb r2, [r3, #2] 80008f4: 4b3f ldr r3, [pc, #252] @ (80009f4 ) 80008f6: 78d9 ldrb r1, [r3, #3] 80008f8: f107 0308 add.w r3, r7, #8 80008fc: 9300 str r3, [sp, #0] 80008fe: 460b mov r3, r1 8000900: 2130 movs r1, #48 @ 0x30 8000902: 2030 movs r0, #48 @ 0x30 8000904: f7ff fcdf bl 80002c6 8000908: 4603 mov r3, r0 800090a: 2b00 cmp r3, #0 800090c: d042 beq.n 8000994 st=EEW_Read(eeadd, &val); 800090e: 893b ldrh r3, [r7, #8] 8000910: b2db uxtb r3, r3 8000912: f107 020a add.w r2, r7, #10 8000916: 4611 mov r1, r2 8000918: 4618 mov r0, r3 800091a: f7ff fcab bl 8000274 800091e: 4603 mov r3, r0 8000920: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK){ 8000924: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000928: 2b00 cmp r3, #0 800092a: d119 bne.n 8000960 sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val); 800092c: 893b ldrh r3, [r7, #8] 800092e: 461a mov r2, r3 8000930: 897b ldrh r3, [r7, #10] 8000932: f107 000c add.w r0, r7, #12 8000936: 4934 ldr r1, [pc, #208] @ (8000a08 ) 8000938: f00c fe2e bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 800093c: bf00 nop 800093e: f107 030c add.w r3, r7, #12 8000942: 4618 mov r0, r3 8000944: f7ff fc02 bl 800014c 8000948: 4603 mov r3, r0 800094a: b29a uxth r2, r3 800094c: f107 030c add.w r3, r7, #12 8000950: 4611 mov r1, r2 8000952: 4618 mov r0, r3 8000954: f00c fa42 bl 800cddc 8000958: 4603 mov r3, r0 800095a: 2b01 cmp r3, #1 800095c: d0ef beq.n 800093e } }else{ sprintf((char*)s,"\n?eraa | ewaavvvv"); while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); } break; 800095e: e21e b.n 8000d9e sprintf((char*)s,"\nee read error %d",st); 8000960: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000964: f107 030c add.w r3, r7, #12 8000968: 4928 ldr r1, [pc, #160] @ (8000a0c ) 800096a: 4618 mov r0, r3 800096c: f00c fe14 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000970: bf00 nop 8000972: f107 030c add.w r3, r7, #12 8000976: 4618 mov r0, r3 8000978: f7ff fbe8 bl 800014c 800097c: 4603 mov r3, r0 800097e: b29a uxth r2, r3 8000980: f107 030c add.w r3, r7, #12 8000984: 4611 mov r1, r2 8000986: 4618 mov r0, r3 8000988: f00c fa28 bl 800cddc 800098c: 4603 mov r3, r0 800098e: 2b01 cmp r3, #1 8000990: d0ef beq.n 8000972 break; 8000992: e204 b.n 8000d9e sprintf((char*)s,"\n?eraa hex values"); 8000994: f107 030c add.w r3, r7, #12 8000998: 491d ldr r1, [pc, #116] @ (8000a10 ) 800099a: 4618 mov r0, r3 800099c: f00c fdfc bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80009a0: bf00 nop 80009a2: f107 030c add.w r3, r7, #12 80009a6: 4618 mov r0, r3 80009a8: f7ff fbd0 bl 800014c 80009ac: 4603 mov r3, r0 80009ae: b29a uxth r2, r3 80009b0: f107 030c add.w r3, r7, #12 80009b4: 4611 mov r1, r2 80009b6: 4618 mov r0, r3 80009b8: f00c fa10 bl 800cddc 80009bc: 4603 mov r3, r0 80009be: 2b01 cmp r3, #1 80009c0: d0ef beq.n 80009a2 break; 80009c2: e1ec b.n 8000d9e sprintf((char*)s,"\n?eraa"); 80009c4: f107 030c add.w r3, r7, #12 80009c8: 4912 ldr r1, [pc, #72] @ (8000a14 ) 80009ca: 4618 mov r0, r3 80009cc: f00c fde4 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80009d0: bf00 nop 80009d2: f107 030c add.w r3, r7, #12 80009d6: 4618 mov r0, r3 80009d8: f7ff fbb8 bl 800014c 80009dc: 4603 mov r3, r0 80009de: b29a uxth r2, r3 80009e0: f107 030c add.w r3, r7, #12 80009e4: 4611 mov r1, r2 80009e6: 4618 mov r0, r3 80009e8: f00c f9f8 bl 800cddc 80009ec: 4603 mov r3, r0 80009ee: 2b01 cmp r3, #1 80009f0: d0ef beq.n 80009d2 break; 80009f2: e1d4 b.n 8000d9e 80009f4: 20000230 .word 0x20000230 80009f8: 0800dfdc .word 0x0800dfdc 80009fc: 0800dffc .word 0x0800dffc 8000a00: 0800e010 .word 0x0800e010 8000a04: 2000022c .word 0x2000022c 8000a08: 0800e01c .word 0x0800e01c 8000a0c: 0800e030 .word 0x0800e030 8000a10: 0800e044 .word 0x0800e044 8000a14: 0800e058 .word 0x0800e058 }else if(rxbuf[1]=='w'){ 8000a18: 4bbe ldr r3, [pc, #760] @ (8000d14 ) 8000a1a: 785b ldrb r3, [r3, #1] 8000a1c: 2b77 cmp r3, #119 @ 0x77 8000a1e: d169 bne.n 8000af4 if(rxidx==8){ 8000a20: 4bbd ldr r3, [pc, #756] @ (8000d18 ) 8000a22: 781b ldrb r3, [r3, #0] 8000a24: 2b08 cmp r3, #8 8000a26: d14d bne.n 8000ac4 if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 8000a28: 4bba ldr r3, [pc, #744] @ (8000d14 ) 8000a2a: 789a ldrb r2, [r3, #2] 8000a2c: 4bb9 ldr r3, [pc, #740] @ (8000d14 ) 8000a2e: 78d9 ldrb r1, [r3, #3] 8000a30: f107 0308 add.w r3, r7, #8 8000a34: 9300 str r3, [sp, #0] 8000a36: 460b mov r3, r1 8000a38: 2130 movs r1, #48 @ 0x30 8000a3a: 2030 movs r0, #48 @ 0x30 8000a3c: f7ff fc43 bl 80002c6 8000a40: 4603 mov r3, r0 8000a42: 2b00 cmp r3, #0 8000a44: d037 beq.n 8000ab6 if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){ 8000a46: 4bb3 ldr r3, [pc, #716] @ (8000d14 ) 8000a48: 7918 ldrb r0, [r3, #4] 8000a4a: 4bb2 ldr r3, [pc, #712] @ (8000d14 ) 8000a4c: 7959 ldrb r1, [r3, #5] 8000a4e: 4bb1 ldr r3, [pc, #708] @ (8000d14 ) 8000a50: 799a ldrb r2, [r3, #6] 8000a52: 4bb0 ldr r3, [pc, #704] @ (8000d14 ) 8000a54: 79dc ldrb r4, [r3, #7] 8000a56: f107 030a add.w r3, r7, #10 8000a5a: 9300 str r3, [sp, #0] 8000a5c: 4623 mov r3, r4 8000a5e: f7ff fc32 bl 80002c6 8000a62: 4603 mov r3, r0 8000a64: 2b00 cmp r3, #0 8000a66: d01f beq.n 8000aa8 st=EEW_Write(eeadd, val); 8000a68: 893b ldrh r3, [r7, #8] 8000a6a: b2db uxtb r3, r3 8000a6c: 897a ldrh r2, [r7, #10] 8000a6e: 4611 mov r1, r2 8000a70: 4618 mov r0, r3 8000a72: f7ff fc12 bl 800029a 8000a76: 4603 mov r3, r0 8000a78: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val); 8000a7c: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000a80: 2b00 cmp r3, #0 8000a82: d108 bne.n 8000a96 8000a84: 893b ldrh r3, [r7, #8] 8000a86: 461a mov r2, r3 8000a88: 897b ldrh r3, [r7, #10] 8000a8a: f107 000c add.w r0, r7, #12 8000a8e: 49a3 ldr r1, [pc, #652] @ (8000d1c ) 8000a90: f00c fd82 bl 800d598 8000a94: e01c b.n 8000ad0 else sprintf((char*)s,"\nee write error %d", st); 8000a96: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000a9a: f107 030c add.w r3, r7, #12 8000a9e: 49a0 ldr r1, [pc, #640] @ (8000d20 ) 8000aa0: 4618 mov r0, r3 8000aa2: f00c fd79 bl 800d598 8000aa6: e013 b.n 8000ad0 }else sprintf((char*)s,"\n?ewaavvvv hex values"); 8000aa8: f107 030c add.w r3, r7, #12 8000aac: 499d ldr r1, [pc, #628] @ (8000d24 ) 8000aae: 4618 mov r0, r3 8000ab0: f00c fd72 bl 800d598 8000ab4: e00c b.n 8000ad0 }else sprintf((char*)s,"\n?ewaa hex values"); 8000ab6: f107 030c add.w r3, r7, #12 8000aba: 499b ldr r1, [pc, #620] @ (8000d28 ) 8000abc: 4618 mov r0, r3 8000abe: f00c fd6b bl 800d598 8000ac2: e005 b.n 8000ad0 }else sprintf((char*)s,"\n?ewaavvvv"); 8000ac4: f107 030c add.w r3, r7, #12 8000ac8: 4998 ldr r1, [pc, #608] @ (8000d2c ) 8000aca: 4618 mov r0, r3 8000acc: f00c fd64 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000ad0: bf00 nop 8000ad2: f107 030c add.w r3, r7, #12 8000ad6: 4618 mov r0, r3 8000ad8: f7ff fb38 bl 800014c 8000adc: 4603 mov r3, r0 8000ade: b29a uxth r2, r3 8000ae0: f107 030c add.w r3, r7, #12 8000ae4: 4611 mov r1, r2 8000ae6: 4618 mov r0, r3 8000ae8: f00c f978 bl 800cddc 8000aec: 4603 mov r3, r0 8000aee: 2b01 cmp r3, #1 8000af0: d0ef beq.n 8000ad2 break; 8000af2: e154 b.n 8000d9e }else if(rxbuf[1]=='d'){ 8000af4: 4b87 ldr r3, [pc, #540] @ (8000d14 ) 8000af6: 785b ldrb r3, [r3, #1] 8000af8: 2b64 cmp r3, #100 @ 0x64 8000afa: f040 808b bne.w 8000c14 if(rxidx==2){ 8000afe: 4b86 ldr r3, [pc, #536] @ (8000d18 ) 8000b00: 781b ldrb r3, [r3, #0] 8000b02: 2b02 cmp r3, #2 8000b04: d16e bne.n 8000be4 for(i=0;i<32;i++){ 8000b06: 2300 movs r3, #0 8000b08: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000b0c: e046 b.n 8000b9c st=EEW_Read(i, &val); 8000b0e: f107 020a add.w r2, r7, #10 8000b12: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b16: 4611 mov r1, r2 8000b18: 4618 mov r0, r3 8000b1a: f7ff fbab bl 8000274 8000b1e: 4603 mov r3, r0 8000b20: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK){ 8000b24: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000b28: 2b00 cmp r3, #0 8000b2a: d119 bne.n 8000b60 sprintf((char*)s,"\n0x%02x=%5d ",i,val); 8000b2c: f897 207e ldrb.w r2, [r7, #126] @ 0x7e 8000b30: 897b ldrh r3, [r7, #10] 8000b32: f107 000c add.w r0, r7, #12 8000b36: 497e ldr r1, [pc, #504] @ (8000d30 ) 8000b38: f00c fd2e bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b3c: bf00 nop 8000b3e: f107 030c add.w r3, r7, #12 8000b42: 4618 mov r0, r3 8000b44: f7ff fb02 bl 800014c 8000b48: 4603 mov r3, r0 8000b4a: b29a uxth r2, r3 8000b4c: f107 030c add.w r3, r7, #12 8000b50: 4611 mov r1, r2 8000b52: 4618 mov r0, r3 8000b54: f00c f942 bl 800cddc 8000b58: 4603 mov r3, r0 8000b5a: 2b01 cmp r3, #1 8000b5c: d0ef beq.n 8000b3e 8000b5e: e018 b.n 8000b92 sprintf((char*)s,"rderr %d ",st); 8000b60: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000b64: f107 030c add.w r3, r7, #12 8000b68: 4972 ldr r1, [pc, #456] @ (8000d34 ) 8000b6a: 4618 mov r0, r3 8000b6c: f00c fd14 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b70: bf00 nop 8000b72: f107 030c add.w r3, r7, #12 8000b76: 4618 mov r0, r3 8000b78: f7ff fae8 bl 800014c 8000b7c: 4603 mov r3, r0 8000b7e: b29a uxth r2, r3 8000b80: f107 030c add.w r3, r7, #12 8000b84: 4611 mov r1, r2 8000b86: 4618 mov r0, r3 8000b88: f00c f928 bl 800cddc 8000b8c: 4603 mov r3, r0 8000b8e: 2b01 cmp r3, #1 8000b90: d0ef beq.n 8000b72 for(i=0;i<32;i++){ 8000b92: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b96: 3301 adds r3, #1 8000b98: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000b9c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000ba0: 2b1f cmp r3, #31 8000ba2: d9b4 bls.n 8000b0e if((i%4)==0){ 8000ba4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000ba8: f003 0303 and.w r3, r3, #3 8000bac: b2db uxtb r3, r3 8000bae: 2b00 cmp r3, #0 8000bb0: f040 80f5 bne.w 8000d9e sprintf((char*)s,"\n"); 8000bb4: f107 030c add.w r3, r7, #12 8000bb8: 495f ldr r1, [pc, #380] @ (8000d38 ) 8000bba: 4618 mov r0, r3 8000bbc: f00c fcec bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000bc0: bf00 nop 8000bc2: f107 030c add.w r3, r7, #12 8000bc6: 4618 mov r0, r3 8000bc8: f7ff fac0 bl 800014c 8000bcc: 4603 mov r3, r0 8000bce: b29a uxth r2, r3 8000bd0: f107 030c add.w r3, r7, #12 8000bd4: 4611 mov r1, r2 8000bd6: 4618 mov r0, r3 8000bd8: f00c f900 bl 800cddc 8000bdc: 4603 mov r3, r0 8000bde: 2b01 cmp r3, #1 8000be0: d0ef beq.n 8000bc2 break; 8000be2: e0dc b.n 8000d9e sprintf((char*)s,"\n?ed"); 8000be4: f107 030c add.w r3, r7, #12 8000be8: 4954 ldr r1, [pc, #336] @ (8000d3c ) 8000bea: 4618 mov r0, r3 8000bec: f00c fcd4 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000bf0: bf00 nop 8000bf2: f107 030c add.w r3, r7, #12 8000bf6: 4618 mov r0, r3 8000bf8: f7ff faa8 bl 800014c 8000bfc: 4603 mov r3, r0 8000bfe: b29a uxth r2, r3 8000c00: f107 030c add.w r3, r7, #12 8000c04: 4611 mov r1, r2 8000c06: 4618 mov r0, r3 8000c08: f00c f8e8 bl 800cddc 8000c0c: 4603 mov r3, r0 8000c0e: 2b01 cmp r3, #1 8000c10: d0ef beq.n 8000bf2 break; 8000c12: e0c4 b.n 8000d9e }else if(rxbuf[1]=='x'){ 8000c14: 4b3f ldr r3, [pc, #252] @ (8000d14 ) 8000c16: 785b ldrb r3, [r3, #1] 8000c18: 2b78 cmp r3, #120 @ 0x78 8000c1a: d162 bne.n 8000ce2 if(rxidx==2){ 8000c1c: 4b3e ldr r3, [pc, #248] @ (8000d18 ) 8000c1e: 781b ldrb r3, [r3, #0] 8000c20: 2b02 cmp r3, #2 8000c22: d146 bne.n 8000cb2 for(i=0;i<32;i++){ 8000c24: 2300 movs r3, #0 8000c26: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000c2a: e03b b.n 8000ca4 st=EEW_Write(i,deftab[i]); 8000c2c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c30: 4a43 ldr r2, [pc, #268] @ (8000d40 ) 8000c32: 5cd3 ldrb r3, [r2, r3] 8000c34: 461a mov r2, r3 8000c36: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c3a: 4611 mov r1, r2 8000c3c: 4618 mov r0, r3 8000c3e: f7ff fb2c bl 800029a 8000c42: 4603 mov r3, r0 8000c44: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",i,deftab[i]); 8000c48: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000c4c: 2b00 cmp r3, #0 8000c4e: d10b bne.n 8000c68 8000c50: f897 207e ldrb.w r2, [r7, #126] @ 0x7e 8000c54: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c58: 4939 ldr r1, [pc, #228] @ (8000d40 ) 8000c5a: 5ccb ldrb r3, [r1, r3] 8000c5c: f107 000c add.w r0, r7, #12 8000c60: 492e ldr r1, [pc, #184] @ (8000d1c ) 8000c62: f00c fc99 bl 800d598 8000c66: e007 b.n 8000c78 else sprintf((char*)s,"\nee write error %d", st); 8000c68: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000c6c: f107 030c add.w r3, r7, #12 8000c70: 492b ldr r1, [pc, #172] @ (8000d20 ) 8000c72: 4618 mov r0, r3 8000c74: f00c fc90 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000c78: bf00 nop 8000c7a: f107 030c add.w r3, r7, #12 8000c7e: 4618 mov r0, r3 8000c80: f7ff fa64 bl 800014c 8000c84: 4603 mov r3, r0 8000c86: b29a uxth r2, r3 8000c88: f107 030c add.w r3, r7, #12 8000c8c: 4611 mov r1, r2 8000c8e: 4618 mov r0, r3 8000c90: f00c f8a4 bl 800cddc 8000c94: 4603 mov r3, r0 8000c96: 2b01 cmp r3, #1 8000c98: d0ef beq.n 8000c7a for(i=0;i<32;i++){ 8000c9a: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c9e: 3301 adds r3, #1 8000ca0: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000ca4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000ca8: 2b1f cmp r3, #31 8000caa: d9bf bls.n 8000c2c loadEE(); 8000cac: f000 fb20 bl 80012f0 break; 8000cb0: e075 b.n 8000d9e sprintf((char*)s,"\n?ex"); 8000cb2: f107 030c add.w r3, r7, #12 8000cb6: 4923 ldr r1, [pc, #140] @ (8000d44 ) 8000cb8: 4618 mov r0, r3 8000cba: f00c fc6d bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000cbe: bf00 nop 8000cc0: f107 030c add.w r3, r7, #12 8000cc4: 4618 mov r0, r3 8000cc6: f7ff fa41 bl 800014c 8000cca: 4603 mov r3, r0 8000ccc: b29a uxth r2, r3 8000cce: f107 030c add.w r3, r7, #12 8000cd2: 4611 mov r1, r2 8000cd4: 4618 mov r0, r3 8000cd6: f00c f881 bl 800cddc 8000cda: 4603 mov r3, r0 8000cdc: 2b01 cmp r3, #1 8000cde: d0ef beq.n 8000cc0 break; 8000ce0: e05d b.n 8000d9e sprintf((char*)s,"\n?er|w|d|x"); 8000ce2: f107 030c add.w r3, r7, #12 8000ce6: 4918 ldr r1, [pc, #96] @ (8000d48 ) 8000ce8: 4618 mov r0, r3 8000cea: f00c fc55 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000cee: bf00 nop 8000cf0: f107 030c add.w r3, r7, #12 8000cf4: 4618 mov r0, r3 8000cf6: f7ff fa29 bl 800014c 8000cfa: 4603 mov r3, r0 8000cfc: b29a uxth r2, r3 8000cfe: f107 030c add.w r3, r7, #12 8000d02: 4611 mov r1, r2 8000d04: 4618 mov r0, r3 8000d06: f00c f869 bl 800cddc 8000d0a: 4603 mov r3, r0 8000d0c: 2b01 cmp r3, #1 8000d0e: d0ef beq.n 8000cf0 break; 8000d10: e045 b.n 8000d9e 8000d12: bf00 nop 8000d14: 20000230 .word 0x20000230 8000d18: 2000022c .word 0x2000022c 8000d1c: 0800e060 .word 0x0800e060 8000d20: 0800e074 .word 0x0800e074 8000d24: 0800e088 .word 0x0800e088 8000d28: 0800e0a0 .word 0x0800e0a0 8000d2c: 0800e0b4 .word 0x0800e0b4 8000d30: 0800e0c0 .word 0x0800e0c0 8000d34: 0800e0d0 .word 0x0800e0d0 8000d38: 0800e0dc .word 0x0800e0dc 8000d3c: 0800e0e0 .word 0x0800e0e0 8000d40: 0800e188 .word 0x0800e188 8000d44: 0800e0e8 .word 0x0800e0e8 8000d48: 0800e0f0 .word 0x0800e0f0 sprintf((char*)s,"\n?eraa | ewaavvvv"); 8000d4c: f107 030c add.w r3, r7, #12 8000d50: 491b ldr r1, [pc, #108] @ (8000dc0 ) 8000d52: 4618 mov r0, r3 8000d54: f00c fc20 bl 800d598 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000d58: bf00 nop 8000d5a: f107 030c add.w r3, r7, #12 8000d5e: 4618 mov r0, r3 8000d60: f7ff f9f4 bl 800014c 8000d64: 4603 mov r3, r0 8000d66: b29a uxth r2, r3 8000d68: f107 030c add.w r3, r7, #12 8000d6c: 4611 mov r1, r2 8000d6e: 4618 mov r0, r3 8000d70: f00c f834 bl 800cddc 8000d74: 4603 mov r3, r0 8000d76: 2b01 cmp r3, #1 8000d78: d0ef beq.n 8000d5a break; 8000d7a: e010 b.n 8000d9e default: sprintf((char*)s,"\n?"); 8000d7c: f107 030c add.w r3, r7, #12 8000d80: 4910 ldr r1, [pc, #64] @ (8000dc4 ) 8000d82: 4618 mov r0, r3 8000d84: f00c fc08 bl 800d598 while (CDC_Transmit_FS(s, 2) == USBD_BUSY); 8000d88: bf00 nop 8000d8a: f107 030c add.w r3, r7, #12 8000d8e: 2102 movs r1, #2 8000d90: 4618 mov r0, r3 8000d92: f00c f823 bl 800cddc 8000d96: 4603 mov r3, r0 8000d98: 2b01 cmp r3, #1 8000d9a: d0f6 beq.n 8000d8a break; 8000d9c: e000 b.n 8000da0 break; 8000d9e: bf00 nop } } rxidx=0; 8000da0: 4b09 ldr r3, [pc, #36] @ (8000dc8 ) 8000da2: 2200 movs r2, #0 8000da4: 701a strb r2, [r3, #0] 8000da6: e007 b.n 8000db8 }else rxidx++; 8000da8: 4b07 ldr r3, [pc, #28] @ (8000dc8 ) 8000daa: 781b ldrb r3, [r3, #0] 8000dac: 3301 adds r3, #1 8000dae: b2da uxtb r2, r3 8000db0: 4b05 ldr r3, [pc, #20] @ (8000dc8 ) 8000db2: 701a strb r2, [r3, #0] 8000db4: e000 b.n 8000db8 if (rx < 0) return; 8000db6: bf00 nop // tiny spin or yield } } 8000db8: 3784 adds r7, #132 @ 0x84 8000dba: 46bd mov sp, r7 8000dbc: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8000dc0: 0800e0fc .word 0x0800e0fc 8000dc4: 0800e110 .word 0x0800e110 8000dc8: 2000022c .word 0x2000022c 08000dcc : extern UART_HandleTypeDef huart1; extern uint8_t pulsanti; extern uint16_t stPulsanti; extern omCiclo_st stCiclo; void debug(void){ 8000dcc: b580 push {r7, lr} 8000dce: b09a sub sp, #104 @ 0x68 8000dd0: af00 add r7, sp, #0 static uint8_t mempulsanti=0; static uint16_t memstPulsanti=0; static omCiclo_st memstCiclo=omchiuso; char s [100]; if(mempulsanti!=pulsanti){ 8000dd2: 4b2f ldr r3, [pc, #188] @ (8000e90 ) 8000dd4: 781a ldrb r2, [r3, #0] 8000dd6: 4b2f ldr r3, [pc, #188] @ (8000e94 ) 8000dd8: 781b ldrb r3, [r3, #0] 8000dda: 429a cmp r2, r3 8000ddc: d017 beq.n 8000e0e mempulsanti=pulsanti; 8000dde: 4b2d ldr r3, [pc, #180] @ (8000e94 ) 8000de0: 781a ldrb r2, [r3, #0] 8000de2: 4b2b ldr r3, [pc, #172] @ (8000e90 ) 8000de4: 701a strb r2, [r3, #0] sprintf(s,"\npulsanti=%X",pulsanti); 8000de6: 4b2b ldr r3, [pc, #172] @ (8000e94 ) 8000de8: 781b ldrb r3, [r3, #0] 8000dea: 461a mov r2, r3 8000dec: 1d3b adds r3, r7, #4 8000dee: 492a ldr r1, [pc, #168] @ (8000e98 ) 8000df0: 4618 mov r0, r3 8000df2: f00c fbd1 bl 800d598 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8000df6: 1d3b adds r3, r7, #4 8000df8: 4618 mov r0, r3 8000dfa: f7ff f9a7 bl 800014c 8000dfe: 4603 mov r3, r0 8000e00: b29a uxth r2, r3 8000e02: 1d39 adds r1, r7, #4 8000e04: f04f 33ff mov.w r3, #4294967295 8000e08: 4824 ldr r0, [pc, #144] @ (8000e9c ) 8000e0a: f007 fdd5 bl 80089b8 } if(memstPulsanti!=stPulsanti){ 8000e0e: 4b24 ldr r3, [pc, #144] @ (8000ea0 ) 8000e10: 881a ldrh r2, [r3, #0] 8000e12: 4b24 ldr r3, [pc, #144] @ (8000ea4 ) 8000e14: 881b ldrh r3, [r3, #0] 8000e16: 429a cmp r2, r3 8000e18: d017 beq.n 8000e4a memstPulsanti=stPulsanti; 8000e1a: 4b22 ldr r3, [pc, #136] @ (8000ea4 ) 8000e1c: 881a ldrh r2, [r3, #0] 8000e1e: 4b20 ldr r3, [pc, #128] @ (8000ea0 ) 8000e20: 801a strh r2, [r3, #0] sprintf(s,"\nstpulsanti=%X",stPulsanti); 8000e22: 4b20 ldr r3, [pc, #128] @ (8000ea4 ) 8000e24: 881b ldrh r3, [r3, #0] 8000e26: 461a mov r2, r3 8000e28: 1d3b adds r3, r7, #4 8000e2a: 491f ldr r1, [pc, #124] @ (8000ea8 ) 8000e2c: 4618 mov r0, r3 8000e2e: f00c fbb3 bl 800d598 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8000e32: 1d3b adds r3, r7, #4 8000e34: 4618 mov r0, r3 8000e36: f7ff f989 bl 800014c 8000e3a: 4603 mov r3, r0 8000e3c: b29a uxth r2, r3 8000e3e: 1d39 adds r1, r7, #4 8000e40: f04f 33ff mov.w r3, #4294967295 8000e44: 4815 ldr r0, [pc, #84] @ (8000e9c ) 8000e46: f007 fdb7 bl 80089b8 } if(memstCiclo!=stCiclo){ 8000e4a: 4b18 ldr r3, [pc, #96] @ (8000eac ) 8000e4c: 781a ldrb r2, [r3, #0] 8000e4e: 4b18 ldr r3, [pc, #96] @ (8000eb0 ) 8000e50: 781b ldrb r3, [r3, #0] 8000e52: 429a cmp r2, r3 8000e54: d017 beq.n 8000e86 memstCiclo=stCiclo; 8000e56: 4b16 ldr r3, [pc, #88] @ (8000eb0 ) 8000e58: 781a ldrb r2, [r3, #0] 8000e5a: 4b14 ldr r3, [pc, #80] @ (8000eac ) 8000e5c: 701a strb r2, [r3, #0] sprintf(s,"\nstCiclo=%d",stCiclo); 8000e5e: 4b14 ldr r3, [pc, #80] @ (8000eb0 ) 8000e60: 781b ldrb r3, [r3, #0] 8000e62: 461a mov r2, r3 8000e64: 1d3b adds r3, r7, #4 8000e66: 4913 ldr r1, [pc, #76] @ (8000eb4 ) 8000e68: 4618 mov r0, r3 8000e6a: f00c fb95 bl 800d598 HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY); 8000e6e: 1d3b adds r3, r7, #4 8000e70: 4618 mov r0, r3 8000e72: f7ff f96b bl 800014c 8000e76: 4603 mov r3, r0 8000e78: b29a uxth r2, r3 8000e7a: 1d39 adds r1, r7, #4 8000e7c: f04f 33ff mov.w r3, #4294967295 8000e80: 4806 ldr r0, [pc, #24] @ (8000e9c ) 8000e82: f007 fd99 bl 80089b8 } } 8000e86: bf00 nop 8000e88: 3768 adds r7, #104 @ 0x68 8000e8a: 46bd mov sp, r7 8000e8c: bd80 pop {r7, pc} 8000e8e: bf00 nop 8000e90: 20000294 .word 0x20000294 8000e94: 200003e8 .word 0x200003e8 8000e98: 0800e114 .word 0x0800e114 8000e9c: 200003a0 .word 0x200003a0 8000ea0: 20000296 .word 0x20000296 8000ea4: 20000430 .word 0x20000430 8000ea8: 0800e124 .word 0x0800e124 8000eac: 20000298 .word 0x20000298 8000eb0: 20000432 .word 0x20000432 8000eb4: 0800e134 .word 0x0800e134 08000eb8 : { 8000eb8: b580 push {r7, lr} 8000eba: b082 sub sp, #8 8000ebc: af00 add r7, sp, #0 8000ebe: 4603 mov r3, r0 8000ec0: 6039 str r1, [r7, #0] 8000ec2: 71fb strb r3, [r7, #7] return EE_ReadVariable(EEW_ADDR(idx), value); 8000ec4: 79fb ldrb r3, [r7, #7] 8000ec6: b29b uxth r3, r3 8000ec8: 3301 adds r3, #1 8000eca: b29b uxth r3, r3 8000ecc: 6839 ldr r1, [r7, #0] 8000ece: 4618 mov r0, r3 8000ed0: f000 f9b8 bl 8001244 8000ed4: 4603 mov r3, r0 } 8000ed6: 4618 mov r0, r3 8000ed8: 3708 adds r7, #8 8000eda: 46bd mov sp, r7 8000edc: bd80 pop {r7, pc} 08000ede : /* ========================================================================= */ /* --- Internal helpers ---------------------------------------------------- */ static uint16_t EE_GetPageStatus(uint32_t pageBase) { 8000ede: b480 push {r7} 8000ee0: b083 sub sp, #12 8000ee2: af00 add r7, sp, #0 8000ee4: 6078 str r0, [r7, #4] return *(__IO uint16_t *)pageBase; 8000ee6: 687b ldr r3, [r7, #4] 8000ee8: 881b ldrh r3, [r3, #0] 8000eea: b29b uxth r3, r3 } 8000eec: 4618 mov r0, r3 8000eee: 370c adds r7, #12 8000ef0: 46bd mov sp, r7 8000ef2: bc80 pop {r7} 8000ef4: 4770 bx lr 08000ef6 : static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data) { 8000ef6: b5b0 push {r4, r5, r7, lr} 8000ef8: b084 sub sp, #16 8000efa: af00 add r7, sp, #0 8000efc: 6078 str r0, [r7, #4] 8000efe: 460b mov r3, r1 8000f00: 807b strh r3, [r7, #2] HAL_StatusTypeDef status; HAL_FLASH_Unlock(); 8000f02: f004 f917 bl 8005134 status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data); 8000f06: 887b ldrh r3, [r7, #2] 8000f08: 2200 movs r2, #0 8000f0a: 461c mov r4, r3 8000f0c: 4615 mov r5, r2 8000f0e: 4622 mov r2, r4 8000f10: 462b mov r3, r5 8000f12: 6879 ldr r1, [r7, #4] 8000f14: 2001 movs r0, #1 8000f16: f004 f89d bl 8005054 8000f1a: 4603 mov r3, r0 8000f1c: 73fb strb r3, [r7, #15] HAL_FLASH_Lock(); 8000f1e: f004 f92f bl 8005180 return status; 8000f22: 7bfb ldrb r3, [r7, #15] } 8000f24: 4618 mov r0, r3 8000f26: 3710 adds r7, #16 8000f28: 46bd mov sp, r7 8000f2a: bdb0 pop {r4, r5, r7, pc} 08000f2c : static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress) { 8000f2c: b580 push {r7, lr} 8000f2e: b088 sub sp, #32 8000f30: af00 add r7, sp, #0 8000f32: 6078 str r0, [r7, #4] HAL_StatusTypeDef status; FLASH_EraseInitTypeDef EraseInit; uint32_t PageError = 0; 8000f34: 2300 movs r3, #0 8000f36: 60bb str r3, [r7, #8] HAL_FLASH_Unlock(); 8000f38: f004 f8fc bl 8005134 EraseInit.TypeErase = FLASH_TYPEERASE_PAGES; 8000f3c: 2300 movs r3, #0 8000f3e: 60fb str r3, [r7, #12] EraseInit.PageAddress = PageAddress; 8000f40: 687b ldr r3, [r7, #4] 8000f42: 617b str r3, [r7, #20] EraseInit.NbPages = 1; 8000f44: 2301 movs r3, #1 8000f46: 61bb str r3, [r7, #24] status = HAL_FLASHEx_Erase(&EraseInit, &PageError); 8000f48: f107 0208 add.w r2, r7, #8 8000f4c: f107 030c add.w r3, r7, #12 8000f50: 4611 mov r1, r2 8000f52: 4618 mov r0, r3 8000f54: f004 f9d6 bl 8005304 8000f58: 4603 mov r3, r0 8000f5a: 77fb strb r3, [r7, #31] HAL_FLASH_Lock(); 8000f5c: f004 f910 bl 8005180 return status; 8000f60: 7ffb ldrb r3, [r7, #31] } 8000f62: 4618 mov r0, r3 8000f64: 3720 adds r7, #32 8000f66: 46bd mov sp, r7 8000f68: bd80 pop {r7, pc} 08000f6a : /* Find first free record address in given page (returns 0 if full) */ static uint32_t EE_FindFreeAddress(uint32_t pageBase) { 8000f6a: b480 push {r7} 8000f6c: b087 sub sp, #28 8000f6e: af00 add r7, sp, #0 8000f70: 6078 str r0, [r7, #4] uint32_t addr = pageBase + 2U; /* Skip status word */ 8000f72: 687b ldr r3, [r7, #4] 8000f74: 3302 adds r3, #2 8000f76: 617b str r3, [r7, #20] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8000f78: 687b ldr r3, [r7, #4] 8000f7a: f503 6380 add.w r3, r3, #1024 @ 0x400 8000f7e: 613b str r3, [r7, #16] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 8000f80: e00c b.n 8000f9c { uint16_t vaddr = *(__IO uint16_t *)addr; 8000f82: 697b ldr r3, [r7, #20] 8000f84: 881b ldrh r3, [r3, #0] 8000f86: 81fb strh r3, [r7, #14] if (vaddr == 0xFFFFU) 8000f88: 89fb ldrh r3, [r7, #14] 8000f8a: f64f 72ff movw r2, #65535 @ 0xffff 8000f8e: 4293 cmp r3, r2 8000f90: d101 bne.n 8000f96 { /* Empty slot */ return addr; 8000f92: 697b ldr r3, [r7, #20] 8000f94: e008 b.n 8000fa8 } addr += sizeof(EE_Record_t); 8000f96: 697b ldr r3, [r7, #20] 8000f98: 3304 adds r3, #4 8000f9a: 617b str r3, [r7, #20] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 8000f9c: 693b ldr r3, [r7, #16] 8000f9e: 3b03 subs r3, #3 8000fa0: 697a ldr r2, [r7, #20] 8000fa2: 429a cmp r2, r3 8000fa4: d3ed bcc.n 8000f82 } return 0U; /* No space */ 8000fa6: 2300 movs r3, #0 } 8000fa8: 4618 mov r0, r3 8000faa: 371c adds r7, #28 8000fac: 46bd mov sp, r7 8000fae: bc80 pop {r7} 8000fb0: 4770 bx lr 08000fb2 : /* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */ /* Find latest value of VirtAddress in a specific page (scan forward) */ static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data) { 8000fb2: b480 push {r7} 8000fb4: b089 sub sp, #36 @ 0x24 8000fb6: af00 add r7, sp, #0 8000fb8: 60f8 str r0, [r7, #12] 8000fba: 460b mov r3, r1 8000fbc: 607a str r2, [r7, #4] 8000fbe: 817b strh r3, [r7, #10] uint32_t addr = pageBase + 2U; // skip status halfword 8000fc0: 68fb ldr r3, [r7, #12] 8000fc2: 3302 adds r3, #2 8000fc4: 61fb str r3, [r7, #28] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8000fc6: 68fb ldr r3, [r7, #12] 8000fc8: f503 6380 add.w r3, r3, #1024 @ 0x400 8000fcc: 617b str r3, [r7, #20] EE_Status result = EE_NOT_FOUND; 8000fce: 2302 movs r3, #2 8000fd0: 76fb strb r3, [r7, #27] uint16_t lastVal = 0; 8000fd2: 2300 movs r3, #0 8000fd4: 833b strh r3, [r7, #24] if (Data == NULL) 8000fd6: 687b ldr r3, [r7, #4] 8000fd8: 2b00 cmp r3, #0 8000fda: d118 bne.n 800100e return EE_ERROR; 8000fdc: 2301 movs r3, #1 8000fde: e024 b.n 800102a while (addr <= (pageEnd - sizeof(EE_Record_t))) { uint16_t vaddr = *(__IO uint16_t *)addr; 8000fe0: 69fb ldr r3, [r7, #28] 8000fe2: 881b ldrh r3, [r3, #0] 8000fe4: 827b strh r3, [r7, #18] if (vaddr == 0xFFFFU) 8000fe6: 8a7b ldrh r3, [r7, #18] 8000fe8: f64f 72ff movw r2, #65535 @ 0xffff 8000fec: 4293 cmp r3, r2 8000fee: d014 beq.n 800101a { // First empty slot => no more records in this page break; } uint16_t value = *(__IO uint16_t *)(addr + 2U); 8000ff0: 69fb ldr r3, [r7, #28] 8000ff2: 3302 adds r3, #2 8000ff4: 881b ldrh r3, [r3, #0] 8000ff6: 823b strh r3, [r7, #16] if (vaddr == VirtAddress) 8000ff8: 8a7a ldrh r2, [r7, #18] 8000ffa: 897b ldrh r3, [r7, #10] 8000ffc: 429a cmp r2, r3 8000ffe: d103 bne.n 8001008 { lastVal = value; // keep most recent 8001000: 8a3b ldrh r3, [r7, #16] 8001002: 833b strh r3, [r7, #24] result = EE_OK; 8001004: 2300 movs r3, #0 8001006: 76fb strb r3, [r7, #27] } addr += sizeof(EE_Record_t); // move 4 bytes forward 8001008: 69fb ldr r3, [r7, #28] 800100a: 3304 adds r3, #4 800100c: 61fb str r3, [r7, #28] while (addr <= (pageEnd - sizeof(EE_Record_t))) 800100e: 697b ldr r3, [r7, #20] 8001010: 3b04 subs r3, #4 8001012: 69fa ldr r2, [r7, #28] 8001014: 429a cmp r2, r3 8001016: d9e3 bls.n 8000fe0 8001018: e000 b.n 800101c break; 800101a: bf00 nop } if (result == EE_OK) 800101c: 7efb ldrb r3, [r7, #27] 800101e: 2b00 cmp r3, #0 8001020: d102 bne.n 8001028 *Data = lastVal; 8001022: 687b ldr r3, [r7, #4] 8001024: 8b3a ldrh r2, [r7, #24] 8001026: 801a strh r2, [r3, #0] return result; 8001028: 7efb ldrb r3, [r7, #27] } 800102a: 4618 mov r0, r3 800102c: 3724 adds r7, #36 @ 0x24 800102e: 46bd mov sp, r7 8001030: bc80 pop {r7} 8001032: 4770 bx lr 08001034 : /* Format both pages: erase and set PAGE0 as VALID */ static EE_Status EE_Format(void) { 8001034: b580 push {r7, lr} 8001036: af00 add r7, sp, #0 if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK) 8001038: 480f ldr r0, [pc, #60] @ (8001078 ) 800103a: f7ff ff77 bl 8000f2c 800103e: 4603 mov r3, r0 8001040: 2b00 cmp r3, #0 8001042: d001 beq.n 8001048 return EE_STATUS_ERROR; 8001044: 2301 movs r3, #1 8001046: e015 b.n 8001074 if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK) 8001048: 480c ldr r0, [pc, #48] @ (800107c ) 800104a: f7ff ff6f bl 8000f2c 800104e: 4603 mov r3, r0 8001050: 2b00 cmp r3, #0 8001052: d001 beq.n 8001058 return EE_STATUS_ERROR; 8001054: 2301 movs r3, #1 8001056: e00d b.n 8001074 if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK) 8001058: f64a 21aa movw r1, #43690 @ 0xaaaa 800105c: 4806 ldr r0, [pc, #24] @ (8001078 ) 800105e: f7ff ff4a bl 8000ef6 8001062: 4603 mov r3, r0 8001064: 2b00 cmp r3, #0 8001066: d001 beq.n 800106c return EE_STATUS_ERROR; 8001068: 2301 movs r3, #1 800106a: e003 b.n 8001074 /* PAGE1 will remain erased (status = 0xFFFF) */ EE_ActivePageBase = EE_PAGE0_BASE; 800106c: 4b04 ldr r3, [pc, #16] @ (8001080 ) 800106e: 4a02 ldr r2, [pc, #8] @ (8001078 ) 8001070: 601a str r2, [r3, #0] return EE_STATUS_OK; 8001072: 2300 movs r3, #0 } 8001074: 4618 mov r0, r3 8001076: bd80 pop {r7, pc} 8001078: 0800f800 .word 0x0800f800 800107c: 0800fc00 .word 0x0800fc00 8001080: 20000000 .word 0x20000000 08001084 : /* Get the base of the other page */ static uint32_t EE_GetOtherPageBase(uint32_t pageBase) { 8001084: b480 push {r7} 8001086: b083 sub sp, #12 8001088: af00 add r7, sp, #0 800108a: 6078 str r0, [r7, #4] return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE; 800108c: 687b ldr r3, [r7, #4] 800108e: 4a05 ldr r2, [pc, #20] @ (80010a4 ) 8001090: 4293 cmp r3, r2 8001092: d101 bne.n 8001098 8001094: 4b04 ldr r3, [pc, #16] @ (80010a8 ) 8001096: e000 b.n 800109a 8001098: 4b02 ldr r3, [pc, #8] @ (80010a4 ) } 800109a: 4618 mov r0, r3 800109c: 370c adds r7, #12 800109e: 46bd mov sp, r7 80010a0: bc80 pop {r7} 80010a2: 4770 bx lr 80010a4: 0800f800 .word 0x0800f800 80010a8: 0800fc00 .word 0x0800fc00 080010ac : /* Page transfer (garbage collection + new write) */ static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data) { 80010ac: b580 push {r7, lr} 80010ae: b088 sub sp, #32 80010b0: af00 add r7, sp, #0 80010b2: 4603 mov r3, r0 80010b4: 460a mov r2, r1 80010b6: 80fb strh r3, [r7, #6] 80010b8: 4613 mov r3, r2 80010ba: 80bb strh r3, [r7, #4] uint32_t oldBase = EE_ActivePageBase; 80010bc: 4b3c ldr r3, [pc, #240] @ (80011b0 ) 80010be: 681b ldr r3, [r3, #0] 80010c0: 617b str r3, [r7, #20] uint32_t newBase = EE_GetOtherPageBase(oldBase); 80010c2: 6978 ldr r0, [r7, #20] 80010c4: f7ff ffde bl 8001084 80010c8: 6138 str r0, [r7, #16] uint32_t addr; uint16_t value; EE_Status st; /* Erase new page */ if (EE_FlashErasePage(newBase) != HAL_OK) 80010ca: 6938 ldr r0, [r7, #16] 80010cc: f7ff ff2e bl 8000f2c 80010d0: 4603 mov r3, r0 80010d2: 2b00 cmp r3, #0 80010d4: d001 beq.n 80010da return EE_STATUS_ERROR; 80010d6: 2301 movs r3, #1 80010d8: e065 b.n 80011a6 /* Mark new page as RECEIVE */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK) 80010da: f245 5155 movw r1, #21845 @ 0x5555 80010de: 6938 ldr r0, [r7, #16] 80010e0: f7ff ff09 bl 8000ef6 80010e4: 4603 mov r3, r0 80010e6: 2b00 cmp r3, #0 80010e8: d001 beq.n 80010ee return EE_STATUS_ERROR; 80010ea: 2301 movs r3, #1 80010ec: e05b b.n 80011a6 /* Start writing records just after status */ addr = newBase + 2U; 80010ee: 693b ldr r3, [r7, #16] 80010f0: 3302 adds r3, #2 80010f2: 61fb str r3, [r7, #28] /* For each known virtual variable */ for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 80010f4: 2300 movs r3, #0 80010f6: 837b strh r3, [r7, #26] 80010f8: e03c b.n 8001174 { uint16_t vaddr = EE_VirtAddrs[i]; 80010fa: 8b7b ldrh r3, [r7, #26] 80010fc: 4a2d ldr r2, [pc, #180] @ (80011b4 ) 80010fe: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 8001102: 81fb strh r3, [r7, #14] if (vaddr == VirtAddress) 8001104: 89fa ldrh r2, [r7, #14] 8001106: 88fb ldrh r3, [r7, #6] 8001108: 429a cmp r2, r3 800110a: d102 bne.n 8001112 { /* Use the new data passed into PageTransfer */ value = Data; 800110c: 88bb ldrh r3, [r7, #4] 800110e: 817b strh r3, [r7, #10] 8001110: e00b b.n 800112a } else { /* Read latest value from old active page */ st = EE_FindInPage(oldBase, vaddr, &value); 8001112: f107 020a add.w r2, r7, #10 8001116: 89fb ldrh r3, [r7, #14] 8001118: 4619 mov r1, r3 800111a: 6978 ldr r0, [r7, #20] 800111c: f7ff ff49 bl 8000fb2 8001120: 4603 mov r3, r0 8001122: 737b strb r3, [r7, #13] if (st != EE_STATUS_OK) 8001124: 7b7b ldrb r3, [r7, #13] 8001126: 2b00 cmp r3, #0 8001128: d120 bne.n 800116c continue; } } /* Write record to new page */ if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK) 800112a: 89fb ldrh r3, [r7, #14] 800112c: 4619 mov r1, r3 800112e: 69f8 ldr r0, [r7, #28] 8001130: f7ff fee1 bl 8000ef6 8001134: 4603 mov r3, r0 8001136: 2b00 cmp r3, #0 8001138: d001 beq.n 800113e return EE_STATUS_ERROR; 800113a: 2301 movs r3, #1 800113c: e033 b.n 80011a6 if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK) 800113e: 69fb ldr r3, [r7, #28] 8001140: 3302 adds r3, #2 8001142: 897a ldrh r2, [r7, #10] 8001144: 4611 mov r1, r2 8001146: 4618 mov r0, r3 8001148: f7ff fed5 bl 8000ef6 800114c: 4603 mov r3, r0 800114e: 2b00 cmp r3, #0 8001150: d001 beq.n 8001156 return EE_STATUS_ERROR; 8001152: 2301 movs r3, #1 8001154: e027 b.n 80011a6 addr += sizeof(EE_Record_t); 8001156: 69fb ldr r3, [r7, #28] 8001158: 3304 adds r3, #4 800115a: 61fb str r3, [r7, #28] if (addr >= (newBase + EE_PAGE_SIZE)) 800115c: 693b ldr r3, [r7, #16] 800115e: f503 6380 add.w r3, r3, #1024 @ 0x400 8001162: 69fa ldr r2, [r7, #28] 8001164: 429a cmp r2, r3 8001166: d302 bcc.n 800116e return EE_STATUS_NO_SPACE; 8001168: 2303 movs r3, #3 800116a: e01c b.n 80011a6 continue; 800116c: bf00 nop for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 800116e: 8b7b ldrh r3, [r7, #26] 8001170: 3301 adds r3, #1 8001172: 837b strh r3, [r7, #26] 8001174: 8b7b ldrh r3, [r7, #26] 8001176: 2b1f cmp r3, #31 8001178: d9bf bls.n 80010fa } /* Erase old page */ if (EE_FlashErasePage(oldBase) != HAL_OK) 800117a: 6978 ldr r0, [r7, #20] 800117c: f7ff fed6 bl 8000f2c 8001180: 4603 mov r3, r0 8001182: 2b00 cmp r3, #0 8001184: d001 beq.n 800118a return EE_STATUS_ERROR; 8001186: 2301 movs r3, #1 8001188: e00d b.n 80011a6 /* Mark new page as VALID */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK) 800118a: f64a 21aa movw r1, #43690 @ 0xaaaa 800118e: 6938 ldr r0, [r7, #16] 8001190: f7ff feb1 bl 8000ef6 8001194: 4603 mov r3, r0 8001196: 2b00 cmp r3, #0 8001198: d001 beq.n 800119e return EE_STATUS_ERROR; 800119a: 2301 movs r3, #1 800119c: e003 b.n 80011a6 /* Update active page */ EE_ActivePageBase = newBase; 800119e: 4a04 ldr r2, [pc, #16] @ (80011b0 ) 80011a0: 693b ldr r3, [r7, #16] 80011a2: 6013 str r3, [r2, #0] return EE_STATUS_OK; 80011a4: 2300 movs r3, #0 } 80011a6: 4618 mov r0, r3 80011a8: 3720 adds r7, #32 80011aa: 46bd mov sp, r7 80011ac: bd80 pop {r7, pc} 80011ae: bf00 nop 80011b0: 20000000 .word 0x20000000 80011b4: 0800e1a8 .word 0x0800e1a8 080011b8 : * - Checks page statuses and chooses the active page. * - If inconsistent or blank, formats pages. * PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...) */ uint16_t EE_Init(void) { 80011b8: b580 push {r7, lr} 80011ba: b082 sub sp, #8 80011bc: af00 add r7, sp, #0 uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE); 80011be: 481e ldr r0, [pc, #120] @ (8001238 ) 80011c0: f7ff fe8d bl 8000ede 80011c4: 4603 mov r3, r0 80011c6: 80fb strh r3, [r7, #6] uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE); 80011c8: 481c ldr r0, [pc, #112] @ (800123c ) 80011ca: f7ff fe88 bl 8000ede 80011ce: 4603 mov r3, r0 80011d0: 80bb strh r3, [r7, #4] if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED)) 80011d2: 88fb ldrh r3, [r7, #6] 80011d4: f64f 72ff movw r2, #65535 @ 0xffff 80011d8: 4293 cmp r3, r2 80011da: d108 bne.n 80011ee 80011dc: 88bb ldrh r3, [r7, #4] 80011de: f64f 72ff movw r2, #65535 @ 0xffff 80011e2: 4293 cmp r3, r2 80011e4: d103 bne.n 80011ee { /* Fresh device -> format */ return (uint16_t)EE_Format(); 80011e6: f7ff ff25 bl 8001034 80011ea: 4603 mov r3, r0 80011ec: e020 b.n 8001230 } else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED)) 80011ee: 88fb ldrh r3, [r7, #6] 80011f0: f64a 22aa movw r2, #43690 @ 0xaaaa 80011f4: 4293 cmp r3, r2 80011f6: d109 bne.n 800120c 80011f8: 88bb ldrh r3, [r7, #4] 80011fa: f64f 72ff movw r2, #65535 @ 0xffff 80011fe: 4293 cmp r3, r2 8001200: d104 bne.n 800120c { EE_ActivePageBase = EE_PAGE0_BASE; 8001202: 4b0f ldr r3, [pc, #60] @ (8001240 ) 8001204: 4a0c ldr r2, [pc, #48] @ (8001238 ) 8001206: 601a str r2, [r3, #0] return EE_OK; 8001208: 2300 movs r3, #0 800120a: e011 b.n 8001230 } else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED)) 800120c: 88bb ldrh r3, [r7, #4] 800120e: f64a 22aa movw r2, #43690 @ 0xaaaa 8001212: 4293 cmp r3, r2 8001214: d109 bne.n 800122a 8001216: 88fb ldrh r3, [r7, #6] 8001218: f64f 72ff movw r2, #65535 @ 0xffff 800121c: 4293 cmp r3, r2 800121e: d104 bne.n 800122a { EE_ActivePageBase = EE_PAGE1_BASE; 8001220: 4b07 ldr r3, [pc, #28] @ (8001240 ) 8001222: 4a06 ldr r2, [pc, #24] @ (800123c ) 8001224: 601a str r2, [r3, #0] return EE_OK; 8001226: 2300 movs r3, #0 8001228: e002 b.n 8001230 } else { /* Any weird or inconsistent state -> reformat */ return (uint16_t)EE_Format(); 800122a: f7ff ff03 bl 8001034 800122e: 4603 mov r3, r0 } } 8001230: 4618 mov r0, r3 8001232: 3708 adds r7, #8 8001234: 46bd mov sp, r7 8001236: bd80 pop {r7, pc} 8001238: 0800f800 .word 0x0800f800 800123c: 0800fc00 .word 0x0800fc00 8001240: 20000000 .word 0x20000000 08001244 : /* * Read a 16-bit variable by its virtual address. * PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t) */ uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data) { 8001244: b580 push {r7, lr} 8001246: b084 sub sp, #16 8001248: af00 add r7, sp, #0 800124a: 4603 mov r3, r0 800124c: 6039 str r1, [r7, #0] 800124e: 80fb strh r3, [r7, #6] EE_Status st; if (Data == NULL) 8001250: 683b ldr r3, [r7, #0] 8001252: 2b00 cmp r3, #0 8001254: d101 bne.n 800125a return EE_ERROR; 8001256: 2301 movs r3, #1 8001258: e00a b.n 8001270 st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data); 800125a: 4b07 ldr r3, [pc, #28] @ (8001278 ) 800125c: 681b ldr r3, [r3, #0] 800125e: 88f9 ldrh r1, [r7, #6] 8001260: 683a ldr r2, [r7, #0] 8001262: 4618 mov r0, r3 8001264: f7ff fea5 bl 8000fb2 8001268: 4603 mov r3, r0 800126a: 73fb strb r3, [r7, #15] return (uint16_t)st; 800126c: 7bfb ldrb r3, [r7, #15] 800126e: b29b uxth r3, r3 } 8001270: 4618 mov r0, r3 8001272: 3710 adds r7, #16 8001274: 46bd mov sp, r7 8001276: bd80 pop {r7, pc} 8001278: 20000000 .word 0x20000000 0800127c : * - Writes a new record in the active page. * - If the page is full, triggers a page transfer (GC). * PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t) */ uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data) { 800127c: b580 push {r7, lr} 800127e: b084 sub sp, #16 8001280: af00 add r7, sp, #0 8001282: 4603 mov r3, r0 8001284: 460a mov r2, r1 8001286: 80fb strh r3, [r7, #6] 8001288: 4613 mov r3, r2 800128a: 80bb strh r3, [r7, #4] uint32_t freeAddr; EE_Status st; /* Find free space in active page */ freeAddr = EE_FindFreeAddress(EE_ActivePageBase); 800128c: 4b17 ldr r3, [pc, #92] @ (80012ec ) 800128e: 681b ldr r3, [r3, #0] 8001290: 4618 mov r0, r3 8001292: f7ff fe6a bl 8000f6a 8001296: 60f8 str r0, [r7, #12] if (freeAddr != 0U) 8001298: 68fb ldr r3, [r7, #12] 800129a: 2b00 cmp r3, #0 800129c: d017 beq.n 80012ce { /* Write new record */ if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK) 800129e: 88fb ldrh r3, [r7, #6] 80012a0: 4619 mov r1, r3 80012a2: 68f8 ldr r0, [r7, #12] 80012a4: f7ff fe27 bl 8000ef6 80012a8: 4603 mov r3, r0 80012aa: 2b00 cmp r3, #0 80012ac: d001 beq.n 80012b2 return EE_ERROR; 80012ae: 2301 movs r3, #1 80012b0: e017 b.n 80012e2 if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK) 80012b2: 68fb ldr r3, [r7, #12] 80012b4: 3302 adds r3, #2 80012b6: 88ba ldrh r2, [r7, #4] 80012b8: 4611 mov r1, r2 80012ba: 4618 mov r0, r3 80012bc: f7ff fe1b bl 8000ef6 80012c0: 4603 mov r3, r0 80012c2: 2b00 cmp r3, #0 80012c4: d001 beq.n 80012ca return EE_ERROR; 80012c6: 2301 movs r3, #1 80012c8: e00b b.n 80012e2 return EE_OK; 80012ca: 2300 movs r3, #0 80012cc: e009 b.n 80012e2 } /* No space -> page transfer */ st = EE_PageTransfer(VirtAddress, Data); 80012ce: 88ba ldrh r2, [r7, #4] 80012d0: 88fb ldrh r3, [r7, #6] 80012d2: 4611 mov r1, r2 80012d4: 4618 mov r0, r3 80012d6: f7ff fee9 bl 80010ac 80012da: 4603 mov r3, r0 80012dc: 72fb strb r3, [r7, #11] return (uint16_t)st; 80012de: 7afb ldrb r3, [r7, #11] 80012e0: b29b uxth r3, r3 } 80012e2: 4618 mov r0, r3 80012e4: 3710 adds r7, #16 80012e6: 46bd mov sp, r7 80012e8: bd80 pop {r7, pc} 80012ea: bf00 nop 80012ec: 20000000 .word 0x20000000 080012f0 : void loadEE(void){ 80012f0: b580 push {r7, lr} 80012f2: af00 add r7, sp, #0 EEW_Read(M1PWMAP, &m1pwmap); 80012f4: 4930 ldr r1, [pc, #192] @ (80013b8 ) 80012f6: 2000 movs r0, #0 80012f8: f7ff fdde bl 8000eb8 EEW_Read(M1PWMCH, &m1pwmch); 80012fc: 492f ldr r1, [pc, #188] @ (80013bc ) 80012fe: 2001 movs r0, #1 8001300: f7ff fdda bl 8000eb8 EEW_Read(M2PWMAP, &m2pwmap); 8001304: 492e ldr r1, [pc, #184] @ (80013c0 ) 8001306: 2002 movs r0, #2 8001308: f7ff fdd6 bl 8000eb8 EEW_Read(M2PWMCH, &m2pwmch); 800130c: 492d ldr r1, [pc, #180] @ (80013c4 ) 800130e: 2003 movs r0, #3 8001310: f7ff fdd2 bl 8000eb8 EEW_Read(M3PWMAP, &m3pwmap); 8001314: 492c ldr r1, [pc, #176] @ (80013c8 ) 8001316: 2004 movs r0, #4 8001318: f7ff fdce bl 8000eb8 EEW_Read(M3PWMCH, &m3pwmch); 800131c: 492b ldr r1, [pc, #172] @ (80013cc ) 800131e: 2005 movs r0, #5 8001320: f7ff fdca bl 8000eb8 EEW_Read(M4PWMAP, &m4pwmap); 8001324: 492a ldr r1, [pc, #168] @ (80013d0 ) 8001326: 2006 movs r0, #6 8001328: f7ff fdc6 bl 8000eb8 EEW_Read(M4PWMCH, &m4pwmch); 800132c: 4929 ldr r1, [pc, #164] @ (80013d4 ) 800132e: 2007 movs r0, #7 8001330: f7ff fdc2 bl 8000eb8 EEW_Read(T1AP, &t1ap); 8001334: 4928 ldr r1, [pc, #160] @ (80013d8 ) 8001336: 200c movs r0, #12 8001338: f7ff fdbe bl 8000eb8 EEW_Read(T2AP, &t2ap); 800133c: 4927 ldr r1, [pc, #156] @ (80013dc ) 800133e: 200d movs r0, #13 8001340: f7ff fdba bl 8000eb8 EEW_Read(T3AP, &t3ap); 8001344: 4926 ldr r1, [pc, #152] @ (80013e0 ) 8001346: 200e movs r0, #14 8001348: f7ff fdb6 bl 8000eb8 EEW_Read(T4AP, &t4ap); 800134c: 4925 ldr r1, [pc, #148] @ (80013e4 ) 800134e: 200f movs r0, #15 8001350: f7ff fdb2 bl 8000eb8 EEW_Read(TWAP, &twap); 8001354: 4924 ldr r1, [pc, #144] @ (80013e8 ) 8001356: 2010 movs r0, #16 8001358: f7ff fdae bl 8000eb8 EEW_Read(T1CH, &t1ch); 800135c: 4923 ldr r1, [pc, #140] @ (80013ec ) 800135e: 2011 movs r0, #17 8001360: f7ff fdaa bl 8000eb8 EEW_Read(T2CH, &t2ch); 8001364: 4922 ldr r1, [pc, #136] @ (80013f0 ) 8001366: 2012 movs r0, #18 8001368: f7ff fda6 bl 8000eb8 EEW_Read(T3CH, &t3ch); 800136c: 4921 ldr r1, [pc, #132] @ (80013f4 ) 800136e: 2013 movs r0, #19 8001370: f7ff fda2 bl 8000eb8 EEW_Read(T4CH, &t4ch); 8001374: 4920 ldr r1, [pc, #128] @ (80013f8 ) 8001376: 2014 movs r0, #20 8001378: f7ff fd9e bl 8000eb8 EEW_Read(TWCH, &twch); 800137c: 491f ldr r1, [pc, #124] @ (80013fc ) 800137e: 2015 movs r0, #21 8001380: f7ff fd9a bl 8000eb8 EEW_Read(M1PWMMAN, &m1pwmMan); 8001384: 491e ldr r1, [pc, #120] @ (8001400 ) 8001386: 201a movs r0, #26 8001388: f7ff fd96 bl 8000eb8 EEW_Read(M2PWMMAN, &m2pwmMan); 800138c: 491d ldr r1, [pc, #116] @ (8001404 ) 800138e: 201b movs r0, #27 8001390: f7ff fd92 bl 8000eb8 EEW_Read(M3PWMMAN, &m3pwmMan); 8001394: 491c ldr r1, [pc, #112] @ (8001408 ) 8001396: 201c movs r0, #28 8001398: f7ff fd8e bl 8000eb8 EEW_Read(M4PWMMAN, &m4pwmMan); 800139c: 491b ldr r1, [pc, #108] @ (800140c ) 800139e: 201d movs r0, #29 80013a0: f7ff fd8a bl 8000eb8 EEW_Read(TRAMPMAN, &trampman); 80013a4: 491a ldr r1, [pc, #104] @ (8001410 ) 80013a6: 201e movs r0, #30 80013a8: f7ff fd86 bl 8000eb8 EEW_Read(TRAMP, &tramp); 80013ac: 4919 ldr r1, [pc, #100] @ (8001414 ) 80013ae: 201f movs r0, #31 80013b0: f7ff fd82 bl 8000eb8 } 80013b4: bf00 nop 80013b6: bd80 pop {r7, pc} 80013b8: 200003f6 .word 0x200003f6 80013bc: 200003f8 .word 0x200003f8 80013c0: 200003fa .word 0x200003fa 80013c4: 200003fc .word 0x200003fc 80013c8: 200003fe .word 0x200003fe 80013cc: 20000400 .word 0x20000400 80013d0: 20000402 .word 0x20000402 80013d4: 20000404 .word 0x20000404 80013d8: 20000406 .word 0x20000406 80013dc: 20000408 .word 0x20000408 80013e0: 2000040a .word 0x2000040a 80013e4: 2000040c .word 0x2000040c 80013e8: 2000040e .word 0x2000040e 80013ec: 20000410 .word 0x20000410 80013f0: 20000412 .word 0x20000412 80013f4: 20000414 .word 0x20000414 80013f8: 20000416 .word 0x20000416 80013fc: 20000418 .word 0x20000418 8001400: 2000041e .word 0x2000041e 8001404: 20000420 .word 0x20000420 8001408: 20000422 .word 0x20000422 800140c: 20000424 .word 0x20000424 8001410: 2000041c .word 0x2000041c 8001414: 2000041a .word 0x2000041a 08001418 : /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_SYSTICK_Callback(void){ 8001418: b580 push {r7, lr} 800141a: b082 sub sp, #8 800141c: af00 add r7, sp, #0 static uint8_t c1s = 0; static uint8_t inidx=0; static uint8_t inbuf[4]; uint8_t i; if (++c10ms >= 10) { // 10 ms 800141e: 4b7c ldr r3, [pc, #496] @ (8001610 ) 8001420: 781b ldrb r3, [r3, #0] 8001422: 3301 adds r3, #1 8001424: b2da uxtb r2, r3 8001426: 4b7a ldr r3, [pc, #488] @ (8001610 ) 8001428: 701a strb r2, [r3, #0] 800142a: 4b79 ldr r3, [pc, #484] @ (8001610 ) 800142c: 781b ldrb r3, [r3, #0] 800142e: 2b09 cmp r3, #9 8001430: f240 8196 bls.w 8001760 c10ms = 0; 8001434: 4b76 ldr r3, [pc, #472] @ (8001610 ) 8001436: 2200 movs r2, #0 8001438: 701a strb r2, [r3, #0] if(rtP1)rtP1--; 800143a: 4b76 ldr r3, [pc, #472] @ (8001614 ) 800143c: 781b ldrb r3, [r3, #0] 800143e: b2db uxtb r3, r3 8001440: 2b00 cmp r3, #0 8001442: d006 beq.n 8001452 8001444: 4b73 ldr r3, [pc, #460] @ (8001614 ) 8001446: 781b ldrb r3, [r3, #0] 8001448: b2db uxtb r3, r3 800144a: 3b01 subs r3, #1 800144c: b2da uxtb r2, r3 800144e: 4b71 ldr r3, [pc, #452] @ (8001614 ) 8001450: 701a strb r2, [r3, #0] if(rtP2)rtP2--; 8001452: 4b71 ldr r3, [pc, #452] @ (8001618 ) 8001454: 781b ldrb r3, [r3, #0] 8001456: b2db uxtb r3, r3 8001458: 2b00 cmp r3, #0 800145a: d006 beq.n 800146a 800145c: 4b6e ldr r3, [pc, #440] @ (8001618 ) 800145e: 781b ldrb r3, [r3, #0] 8001460: b2db uxtb r3, r3 8001462: 3b01 subs r3, #1 8001464: b2da uxtb r2, r3 8001466: 4b6c ldr r3, [pc, #432] @ (8001618 ) 8001468: 701a strb r2, [r3, #0] if(rtTLC)rtTLC--; 800146a: 4b6c ldr r3, [pc, #432] @ (800161c ) 800146c: 781b ldrb r3, [r3, #0] 800146e: b2db uxtb r3, r3 8001470: 2b00 cmp r3, #0 8001472: d006 beq.n 8001482 8001474: 4b69 ldr r3, [pc, #420] @ (800161c ) 8001476: 781b ldrb r3, [r3, #0] 8001478: b2db uxtb r3, r3 800147a: 3b01 subs r3, #1 800147c: b2da uxtb r2, r3 800147e: 4b67 ldr r3, [pc, #412] @ (800161c ) 8001480: 701a strb r2, [r3, #0] //**** legge i tasti******************************************************************************** inidx++; 8001482: 4b67 ldr r3, [pc, #412] @ (8001620 ) 8001484: 781b ldrb r3, [r3, #0] 8001486: 3301 adds r3, #1 8001488: b2da uxtb r2, r3 800148a: 4b65 ldr r3, [pc, #404] @ (8001620 ) 800148c: 701a strb r2, [r3, #0] inidx&=0x03; 800148e: 4b64 ldr r3, [pc, #400] @ (8001620 ) 8001490: 781b ldrb r3, [r3, #0] 8001492: f003 0303 and.w r3, r3, #3 8001496: b2da uxtb r2, r3 8001498: 4b61 ldr r3, [pc, #388] @ (8001620 ) 800149a: 701a strb r2, [r3, #0] if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1); 800149c: f44f 4180 mov.w r1, #16384 @ 0x4000 80014a0: 4860 ldr r0, [pc, #384] @ (8001624 ) 80014a2: f004 f95b bl 800575c 80014a6: 4603 mov r3, r0 80014a8: 2b00 cmp r3, #0 80014aa: d10c bne.n 80014c6 80014ac: 4b5c ldr r3, [pc, #368] @ (8001620 ) 80014ae: 781b ldrb r3, [r3, #0] 80014b0: 461a mov r2, r3 80014b2: 4b5d ldr r3, [pc, #372] @ (8001628 ) 80014b4: 5c9b ldrb r3, [r3, r2] 80014b6: 4a5a ldr r2, [pc, #360] @ (8001620 ) 80014b8: 7812 ldrb r2, [r2, #0] 80014ba: f043 0301 orr.w r3, r3, #1 80014be: b2d9 uxtb r1, r3 80014c0: 4b59 ldr r3, [pc, #356] @ (8001628 ) 80014c2: 5499 strb r1, [r3, r2] 80014c4: e00b b.n 80014de 80014c6: 4b56 ldr r3, [pc, #344] @ (8001620 ) 80014c8: 781b ldrb r3, [r3, #0] 80014ca: 461a mov r2, r3 80014cc: 4b56 ldr r3, [pc, #344] @ (8001628 ) 80014ce: 5c9b ldrb r3, [r3, r2] 80014d0: 4a53 ldr r2, [pc, #332] @ (8001620 ) 80014d2: 7812 ldrb r2, [r2, #0] 80014d4: f023 0301 bic.w r3, r3, #1 80014d8: b2d9 uxtb r1, r3 80014da: 4b53 ldr r3, [pc, #332] @ (8001628 ) 80014dc: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2); 80014de: f44f 4100 mov.w r1, #32768 @ 0x8000 80014e2: 4850 ldr r0, [pc, #320] @ (8001624 ) 80014e4: f004 f93a bl 800575c 80014e8: 4603 mov r3, r0 80014ea: 2b00 cmp r3, #0 80014ec: d10c bne.n 8001508 80014ee: 4b4c ldr r3, [pc, #304] @ (8001620 ) 80014f0: 781b ldrb r3, [r3, #0] 80014f2: 461a mov r2, r3 80014f4: 4b4c ldr r3, [pc, #304] @ (8001628 ) 80014f6: 5c9b ldrb r3, [r3, r2] 80014f8: 4a49 ldr r2, [pc, #292] @ (8001620 ) 80014fa: 7812 ldrb r2, [r2, #0] 80014fc: f043 0302 orr.w r3, r3, #2 8001500: b2d9 uxtb r1, r3 8001502: 4b49 ldr r3, [pc, #292] @ (8001628 ) 8001504: 5499 strb r1, [r3, r2] 8001506: e00b b.n 8001520 8001508: 4b45 ldr r3, [pc, #276] @ (8001620 ) 800150a: 781b ldrb r3, [r3, #0] 800150c: 461a mov r2, r3 800150e: 4b46 ldr r3, [pc, #280] @ (8001628 ) 8001510: 5c9b ldrb r3, [r3, r2] 8001512: 4a43 ldr r2, [pc, #268] @ (8001620 ) 8001514: 7812 ldrb r2, [r2, #0] 8001516: f023 0302 bic.w r3, r3, #2 800151a: b2d9 uxtb r1, r3 800151c: 4b42 ldr r3, [pc, #264] @ (8001628 ) 800151e: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH1;else inbuf[inidx]&=(~INCH1); 8001520: f44f 5180 mov.w r1, #4096 @ 0x1000 8001524: 4841 ldr r0, [pc, #260] @ (800162c ) 8001526: f004 f919 bl 800575c 800152a: 4603 mov r3, r0 800152c: 2b00 cmp r3, #0 800152e: d10c bne.n 800154a 8001530: 4b3b ldr r3, [pc, #236] @ (8001620 ) 8001532: 781b ldrb r3, [r3, #0] 8001534: 461a mov r2, r3 8001536: 4b3c ldr r3, [pc, #240] @ (8001628 ) 8001538: 5c9b ldrb r3, [r3, r2] 800153a: 4a39 ldr r2, [pc, #228] @ (8001620 ) 800153c: 7812 ldrb r2, [r2, #0] 800153e: f043 0304 orr.w r3, r3, #4 8001542: b2d9 uxtb r1, r3 8001544: 4b38 ldr r3, [pc, #224] @ (8001628 ) 8001546: 5499 strb r1, [r3, r2] 8001548: e00b b.n 8001562 800154a: 4b35 ldr r3, [pc, #212] @ (8001620 ) 800154c: 781b ldrb r3, [r3, #0] 800154e: 461a mov r2, r3 8001550: 4b35 ldr r3, [pc, #212] @ (8001628 ) 8001552: 5c9b ldrb r3, [r3, r2] 8001554: 4a32 ldr r2, [pc, #200] @ (8001620 ) 8001556: 7812 ldrb r2, [r2, #0] 8001558: f023 0304 bic.w r3, r3, #4 800155c: b2d9 uxtb r1, r3 800155e: 4b32 ldr r3, [pc, #200] @ (8001628 ) 8001560: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH2;else inbuf[inidx]&=(~INCH2); 8001562: f44f 5100 mov.w r1, #8192 @ 0x2000 8001566: 4831 ldr r0, [pc, #196] @ (800162c ) 8001568: f004 f8f8 bl 800575c 800156c: 4603 mov r3, r0 800156e: 2b00 cmp r3, #0 8001570: d10c bne.n 800158c 8001572: 4b2b ldr r3, [pc, #172] @ (8001620 ) 8001574: 781b ldrb r3, [r3, #0] 8001576: 461a mov r2, r3 8001578: 4b2b ldr r3, [pc, #172] @ (8001628 ) 800157a: 5c9b ldrb r3, [r3, r2] 800157c: 4a28 ldr r2, [pc, #160] @ (8001620 ) 800157e: 7812 ldrb r2, [r2, #0] 8001580: f043 0308 orr.w r3, r3, #8 8001584: b2d9 uxtb r1, r3 8001586: 4b28 ldr r3, [pc, #160] @ (8001628 ) 8001588: 5499 strb r1, [r3, r2] 800158a: e00b b.n 80015a4 800158c: 4b24 ldr r3, [pc, #144] @ (8001620 ) 800158e: 781b ldrb r3, [r3, #0] 8001590: 461a mov r2, r3 8001592: 4b25 ldr r3, [pc, #148] @ (8001628 ) 8001594: 5c9b ldrb r3, [r3, r2] 8001596: 4a22 ldr r2, [pc, #136] @ (8001620 ) 8001598: 7812 ldrb r2, [r2, #0] 800159a: f023 0308 bic.w r3, r3, #8 800159e: b2d9 uxtb r1, r3 80015a0: 4b21 ldr r3, [pc, #132] @ (8001628 ) 80015a2: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH3;else inbuf[inidx]&=(~INCH3); 80015a4: f44f 4180 mov.w r1, #16384 @ 0x4000 80015a8: 4820 ldr r0, [pc, #128] @ (800162c ) 80015aa: f004 f8d7 bl 800575c 80015ae: 4603 mov r3, r0 80015b0: 2b00 cmp r3, #0 80015b2: d10c bne.n 80015ce 80015b4: 4b1a ldr r3, [pc, #104] @ (8001620 ) 80015b6: 781b ldrb r3, [r3, #0] 80015b8: 461a mov r2, r3 80015ba: 4b1b ldr r3, [pc, #108] @ (8001628 ) 80015bc: 5c9b ldrb r3, [r3, r2] 80015be: 4a18 ldr r2, [pc, #96] @ (8001620 ) 80015c0: 7812 ldrb r2, [r2, #0] 80015c2: f043 0310 orr.w r3, r3, #16 80015c6: b2d9 uxtb r1, r3 80015c8: 4b17 ldr r3, [pc, #92] @ (8001628 ) 80015ca: 5499 strb r1, [r3, r2] 80015cc: e00b b.n 80015e6 80015ce: 4b14 ldr r3, [pc, #80] @ (8001620 ) 80015d0: 781b ldrb r3, [r3, #0] 80015d2: 461a mov r2, r3 80015d4: 4b14 ldr r3, [pc, #80] @ (8001628 ) 80015d6: 5c9b ldrb r3, [r3, r2] 80015d8: 4a11 ldr r2, [pc, #68] @ (8001620 ) 80015da: 7812 ldrb r2, [r2, #0] 80015dc: f023 0310 bic.w r3, r3, #16 80015e0: b2d9 uxtb r1, r3 80015e2: 4b11 ldr r3, [pc, #68] @ (8001628 ) 80015e4: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH4;else inbuf[inidx]&=(~INCH4); 80015e6: f44f 4100 mov.w r1, #32768 @ 0x8000 80015ea: 4810 ldr r0, [pc, #64] @ (800162c ) 80015ec: f004 f8b6 bl 800575c 80015f0: 4603 mov r3, r0 80015f2: 2b00 cmp r3, #0 80015f4: d11c bne.n 8001630 80015f6: 4b0a ldr r3, [pc, #40] @ (8001620 ) 80015f8: 781b ldrb r3, [r3, #0] 80015fa: 461a mov r2, r3 80015fc: 4b0a ldr r3, [pc, #40] @ (8001628 ) 80015fe: 5c9b ldrb r3, [r3, r2] 8001600: 4a07 ldr r2, [pc, #28] @ (8001620 ) 8001602: 7812 ldrb r2, [r2, #0] 8001604: f043 0320 orr.w r3, r3, #32 8001608: b2d9 uxtb r1, r3 800160a: 4b07 ldr r3, [pc, #28] @ (8001628 ) 800160c: 5499 strb r1, [r3, r2] 800160e: e01b b.n 8001648 8001610: 20000434 .word 0x20000434 8001614: 20000004 .word 0x20000004 8001618: 20000005 .word 0x20000005 800161c: 20000006 .word 0x20000006 8001620: 20000435 .word 0x20000435 8001624: 40011000 .word 0x40011000 8001628: 20000438 .word 0x20000438 800162c: 40010c00 .word 0x40010c00 8001630: 4b4d ldr r3, [pc, #308] @ (8001768 ) 8001632: 781b ldrb r3, [r3, #0] 8001634: 461a mov r2, r3 8001636: 4b4d ldr r3, [pc, #308] @ (800176c ) 8001638: 5c9b ldrb r3, [r3, r2] 800163a: 4a4b ldr r2, [pc, #300] @ (8001768 ) 800163c: 7812 ldrb r2, [r2, #0] 800163e: f023 0320 bic.w r3, r3, #32 8001642: b2d9 uxtb r1, r3 8001644: 4b49 ldr r3, [pc, #292] @ (800176c ) 8001646: 5499 strb r1, [r3, r2] pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]); 8001648: 4b48 ldr r3, [pc, #288] @ (800176c ) 800164a: 781a ldrb r2, [r3, #0] 800164c: 4b47 ldr r3, [pc, #284] @ (800176c ) 800164e: 785b ldrb r3, [r3, #1] 8001650: 4013 ands r3, r2 8001652: b2da uxtb r2, r3 8001654: 4b45 ldr r3, [pc, #276] @ (800176c ) 8001656: 789b ldrb r3, [r3, #2] 8001658: 4013 ands r3, r2 800165a: b2da uxtb r2, r3 800165c: 4b43 ldr r3, [pc, #268] @ (800176c ) 800165e: 78db ldrb r3, [r3, #3] 8001660: 4013 ands r3, r2 8001662: b2da uxtb r2, r3 8001664: 4b42 ldr r3, [pc, #264] @ (8001770 ) 8001666: 781b ldrb r3, [r3, #0] 8001668: 4313 orrs r3, r2 800166a: b2da uxtb r2, r3 800166c: 4b40 ldr r3, [pc, #256] @ (8001770 ) 800166e: 701a strb r2, [r3, #0] pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]); 8001670: 4b3e ldr r3, [pc, #248] @ (800176c ) 8001672: 781a ldrb r2, [r3, #0] 8001674: 4b3d ldr r3, [pc, #244] @ (800176c ) 8001676: 785b ldrb r3, [r3, #1] 8001678: 4313 orrs r3, r2 800167a: b2da uxtb r2, r3 800167c: 4b3b ldr r3, [pc, #236] @ (800176c ) 800167e: 789b ldrb r3, [r3, #2] 8001680: 4313 orrs r3, r2 8001682: b2da uxtb r2, r3 8001684: 4b39 ldr r3, [pc, #228] @ (800176c ) 8001686: 78db ldrb r3, [r3, #3] 8001688: 4313 orrs r3, r2 800168a: b2da uxtb r2, r3 800168c: 4b38 ldr r3, [pc, #224] @ (8001770 ) 800168e: 781b ldrb r3, [r3, #0] 8001690: 4013 ands r3, r2 8001692: b2da uxtb r2, r3 8001694: 4b36 ldr r3, [pc, #216] @ (8001770 ) 8001696: 701a strb r2, [r3, #0] //**** legge adc *********************************************************************************** readAdc(); 8001698: f7fe fd96 bl 80001c8 if (++c100ms >= 10) { // 10 ms 800169c: 4b35 ldr r3, [pc, #212] @ (8001774 ) 800169e: 781b ldrb r3, [r3, #0] 80016a0: 3301 adds r3, #1 80016a2: b2da uxtb r2, r3 80016a4: 4b33 ldr r3, [pc, #204] @ (8001774 ) 80016a6: 701a strb r2, [r3, #0] 80016a8: 4b32 ldr r3, [pc, #200] @ (8001774 ) 80016aa: 781b ldrb r3, [r3, #0] 80016ac: 2b09 cmp r3, #9 80016ae: d957 bls.n 8001760 c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop 80016b0: 4b30 ldr r3, [pc, #192] @ (8001774 ) 80016b2: 2200 movs r2, #0 80016b4: 701a strb r2, [r3, #0] for(i=0;i<4;i++){ 80016b6: 2300 movs r3, #0 80016b8: 71fb strb r3, [r7, #7] 80016ba: e013 b.n 80016e4 if(rtramp[i])rtramp[i]--; 80016bc: 79fb ldrb r3, [r7, #7] 80016be: 4a2e ldr r2, [pc, #184] @ (8001778 ) 80016c0: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 80016c4: b29b uxth r3, r3 80016c6: 2b00 cmp r3, #0 80016c8: d009 beq.n 80016de 80016ca: 79fb ldrb r3, [r7, #7] 80016cc: 4a2a ldr r2, [pc, #168] @ (8001778 ) 80016ce: f832 2013 ldrh.w r2, [r2, r3, lsl #1] 80016d2: b292 uxth r2, r2 80016d4: 3a01 subs r2, #1 80016d6: b291 uxth r1, r2 80016d8: 4a27 ldr r2, [pc, #156] @ (8001778 ) 80016da: f822 1013 strh.w r1, [r2, r3, lsl #1] for(i=0;i<4;i++){ 80016de: 79fb ldrb r3, [r7, #7] 80016e0: 3301 adds r3, #1 80016e2: 71fb strb r3, [r7, #7] 80016e4: 79fb ldrb r3, [r7, #7] 80016e6: 2b03 cmp r3, #3 80016e8: d9e8 bls.n 80016bc } //**** gestione buzzer ***************************************************************************** if(stBuz==bzmoving){ 80016ea: 4b24 ldr r3, [pc, #144] @ (800177c ) 80016ec: 781b ldrb r3, [r3, #0] 80016ee: b2db uxtb r3, r3 80016f0: 2b01 cmp r3, #1 80016f2: d111 bne.n 8001718 if(c1s>=5)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET); 80016f4: 4b22 ldr r3, [pc, #136] @ (8001780 ) 80016f6: 781b ldrb r3, [r3, #0] 80016f8: 2b04 cmp r3, #4 80016fa: d906 bls.n 800170a 80016fc: 2200 movs r2, #0 80016fe: f44f 7180 mov.w r1, #256 @ 0x100 8001702: 4820 ldr r0, [pc, #128] @ (8001784 ) 8001704: f004 f841 bl 800578a 8001708: e00c b.n 8001724 800170a: 2201 movs r2, #1 800170c: f44f 7180 mov.w r1, #256 @ 0x100 8001710: 481c ldr r0, [pc, #112] @ (8001784 ) 8001712: f004 f83a bl 800578a 8001716: e005 b.n 8001724 }else{//bzoff HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET); 8001718: 2200 movs r2, #0 800171a: f44f 7180 mov.w r1, #256 @ 0x100 800171e: 4819 ldr r0, [pc, #100] @ (8001784 ) 8001720: f004 f833 bl 800578a } //************************************************************************************************** if (++c1s >= 10) { // 10 ms 8001724: 4b16 ldr r3, [pc, #88] @ (8001780 ) 8001726: 781b ldrb r3, [r3, #0] 8001728: 3301 adds r3, #1 800172a: b2da uxtb r2, r3 800172c: 4b14 ldr r3, [pc, #80] @ (8001780 ) 800172e: 701a strb r2, [r3, #0] 8001730: 4b13 ldr r3, [pc, #76] @ (8001780 ) 8001732: 781b ldrb r3, [r3, #0] 8001734: 2b09 cmp r3, #9 8001736: d913 bls.n 8001760 c1s = 0; 8001738: 4b11 ldr r3, [pc, #68] @ (8001780 ) 800173a: 2200 movs r2, #0 800173c: 701a strb r2, [r3, #0] if(rtCiclo)rtCiclo--; 800173e: 4b12 ldr r3, [pc, #72] @ (8001788 ) 8001740: 881b ldrh r3, [r3, #0] 8001742: b29b uxth r3, r3 8001744: 2b00 cmp r3, #0 8001746: d006 beq.n 8001756 8001748: 4b0f ldr r3, [pc, #60] @ (8001788 ) 800174a: 881b ldrh r3, [r3, #0] 800174c: b29b uxth r3, r3 800174e: 3b01 subs r3, #1 8001750: b29a uxth r2, r3 8001752: 4b0d ldr r3, [pc, #52] @ (8001788 ) 8001754: 801a strh r2, [r3, #0] HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin); 8001756: f44f 5100 mov.w r1, #8192 @ 0x2000 800175a: 480c ldr r0, [pc, #48] @ (800178c ) 800175c: f004 f82d bl 80057ba } } } } 8001760: bf00 nop 8001762: 3708 adds r7, #8 8001764: 46bd mov sp, r7 8001766: bd80 pop {r7, pc} 8001768: 20000435 .word 0x20000435 800176c: 20000438 .word 0x20000438 8001770: 200003e8 .word 0x200003e8 8001774: 2000043c .word 0x2000043c 8001778: 200003ec .word 0x200003ec 800177c: 20000433 .word 0x20000433 8001780: 2000043d .word 0x2000043d 8001784: 40010800 .word 0x40010800 8001788: 200003f4 .word 0x200003f4 800178c: 40011000 .word 0x40011000 08001790 : void managePulsanti(void){ 8001790: b480 push {r7} 8001792: af00 add r7, sp, #0 if(pulsanti&INP1){ 8001794: 4b9f ldr r3, [pc, #636] @ (8001a14 ) 8001796: 781b ldrb r3, [r3, #0] 8001798: f003 0301 and.w r3, r3, #1 800179c: 2b00 cmp r3, #0 800179e: d00c beq.n 80017ba if(rtP1==0)stPulsanti|=P1START; 80017a0: 4b9d ldr r3, [pc, #628] @ (8001a18 ) 80017a2: 781b ldrb r3, [r3, #0] 80017a4: b2db uxtb r3, r3 80017a6: 2b00 cmp r3, #0 80017a8: d124 bne.n 80017f4 80017aa: 4b9c ldr r3, [pc, #624] @ (8001a1c ) 80017ac: 881b ldrh r3, [r3, #0] 80017ae: f043 0301 orr.w r3, r3, #1 80017b2: b29a uxth r2, r3 80017b4: 4b99 ldr r3, [pc, #612] @ (8001a1c ) 80017b6: 801a strh r2, [r3, #0] 80017b8: e01c b.n 80017f4 }else{ if(stPulsanti&P1START)stPulsanti&=(~P1START); 80017ba: 4b98 ldr r3, [pc, #608] @ (8001a1c ) 80017bc: 881b ldrh r3, [r3, #0] 80017be: f003 0301 and.w r3, r3, #1 80017c2: 2b00 cmp r3, #0 80017c4: d007 beq.n 80017d6 80017c6: 4b95 ldr r3, [pc, #596] @ (8001a1c ) 80017c8: 881b ldrh r3, [r3, #0] 80017ca: f023 0301 bic.w r3, r3, #1 80017ce: b29a uxth r2, r3 80017d0: 4b92 ldr r3, [pc, #584] @ (8001a1c ) 80017d2: 801a strh r2, [r3, #0] 80017d4: e00b b.n 80017ee else if(rtP1<=190){ 80017d6: 4b90 ldr r3, [pc, #576] @ (8001a18 ) 80017d8: 781b ldrb r3, [r3, #0] 80017da: b2db uxtb r3, r3 80017dc: 2bbe cmp r3, #190 @ 0xbe 80017de: d806 bhi.n 80017ee stPulsanti|=P1STOP; 80017e0: 4b8e ldr r3, [pc, #568] @ (8001a1c ) 80017e2: 881b ldrh r3, [r3, #0] 80017e4: f043 0302 orr.w r3, r3, #2 80017e8: b29a uxth r2, r3 80017ea: 4b8c ldr r3, [pc, #560] @ (8001a1c ) 80017ec: 801a strh r2, [r3, #0] } rtP1=200; 80017ee: 4b8a ldr r3, [pc, #552] @ (8001a18 ) 80017f0: 22c8 movs r2, #200 @ 0xc8 80017f2: 701a strb r2, [r3, #0] } if(pulsanti&INP2){ 80017f4: 4b87 ldr r3, [pc, #540] @ (8001a14 ) 80017f6: 781b ldrb r3, [r3, #0] 80017f8: f003 0302 and.w r3, r3, #2 80017fc: 2b00 cmp r3, #0 80017fe: d00c beq.n 800181a if(rtP2==0)stPulsanti|=P2START; 8001800: 4b87 ldr r3, [pc, #540] @ (8001a20 ) 8001802: 781b ldrb r3, [r3, #0] 8001804: b2db uxtb r3, r3 8001806: 2b00 cmp r3, #0 8001808: d124 bne.n 8001854 800180a: 4b84 ldr r3, [pc, #528] @ (8001a1c ) 800180c: 881b ldrh r3, [r3, #0] 800180e: f043 0304 orr.w r3, r3, #4 8001812: b29a uxth r2, r3 8001814: 4b81 ldr r3, [pc, #516] @ (8001a1c ) 8001816: 801a strh r2, [r3, #0] 8001818: e01c b.n 8001854 }else{ if(stPulsanti&P2START)stPulsanti&=(~P2START); 800181a: 4b80 ldr r3, [pc, #512] @ (8001a1c ) 800181c: 881b ldrh r3, [r3, #0] 800181e: f003 0304 and.w r3, r3, #4 8001822: 2b00 cmp r3, #0 8001824: d007 beq.n 8001836 8001826: 4b7d ldr r3, [pc, #500] @ (8001a1c ) 8001828: 881b ldrh r3, [r3, #0] 800182a: f023 0304 bic.w r3, r3, #4 800182e: b29a uxth r2, r3 8001830: 4b7a ldr r3, [pc, #488] @ (8001a1c ) 8001832: 801a strh r2, [r3, #0] 8001834: e00b b.n 800184e else if(rtP2<=190)stPulsanti|=P2STOP; 8001836: 4b7a ldr r3, [pc, #488] @ (8001a20 ) 8001838: 781b ldrb r3, [r3, #0] 800183a: b2db uxtb r3, r3 800183c: 2bbe cmp r3, #190 @ 0xbe 800183e: d806 bhi.n 800184e 8001840: 4b76 ldr r3, [pc, #472] @ (8001a1c ) 8001842: 881b ldrh r3, [r3, #0] 8001844: f043 0308 orr.w r3, r3, #8 8001848: b29a uxth r2, r3 800184a: 4b74 ldr r3, [pc, #464] @ (8001a1c ) 800184c: 801a strh r2, [r3, #0] rtP2=200; 800184e: 4b74 ldr r3, [pc, #464] @ (8001a20 ) 8001850: 22c8 movs r2, #200 @ 0xc8 8001852: 701a strb r2, [r3, #0] } stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW)); 8001854: 4b71 ldr r3, [pc, #452] @ (8001a1c ) 8001856: 2200 movs r2, #0 8001858: 801a strh r2, [r3, #0] if(stPulsanti==0){ 800185a: 4b70 ldr r3, [pc, #448] @ (8001a1c ) 800185c: 881b ldrh r3, [r3, #0] 800185e: 2b00 cmp r3, #0 8001860: f040 80d3 bne.w 8001a0a switch(pulsanti&0x3c){ 8001864: 4b6b ldr r3, [pc, #428] @ (8001a14 ) 8001866: 781b ldrb r3, [r3, #0] 8001868: f003 033c and.w r3, r3, #60 @ 0x3c 800186c: 2b30 cmp r3, #48 @ 0x30 800186e: f200 80ba bhi.w 80019e6 8001872: a201 add r2, pc, #4 @ (adr r2, 8001878 ) 8001874: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001878: 0800193d .word 0x0800193d 800187c: 080019e7 .word 0x080019e7 8001880: 080019e7 .word 0x080019e7 8001884: 080019e7 .word 0x080019e7 8001888: 08001999 .word 0x08001999 800188c: 080019e7 .word 0x080019e7 8001890: 080019e7 .word 0x080019e7 8001894: 080019e7 .word 0x080019e7 8001898: 0800194b .word 0x0800194b 800189c: 080019e7 .word 0x080019e7 80018a0: 080019e7 .word 0x080019e7 80018a4: 080019e7 .word 0x080019e7 80018a8: 080019cd .word 0x080019cd 80018ac: 080019e7 .word 0x080019e7 80018b0: 080019e7 .word 0x080019e7 80018b4: 080019e7 .word 0x080019e7 80018b8: 08001965 .word 0x08001965 80018bc: 080019e7 .word 0x080019e7 80018c0: 080019e7 .word 0x080019e7 80018c4: 080019e7 .word 0x080019e7 80018c8: 080019e7 .word 0x080019e7 80018cc: 080019e7 .word 0x080019e7 80018d0: 080019e7 .word 0x080019e7 80018d4: 080019e7 .word 0x080019e7 80018d8: 080019e7 .word 0x080019e7 80018dc: 080019e7 .word 0x080019e7 80018e0: 080019e7 .word 0x080019e7 80018e4: 080019e7 .word 0x080019e7 80018e8: 080019e7 .word 0x080019e7 80018ec: 080019e7 .word 0x080019e7 80018f0: 080019e7 .word 0x080019e7 80018f4: 080019e7 .word 0x080019e7 80018f8: 0800197f .word 0x0800197f 80018fc: 080019e7 .word 0x080019e7 8001900: 080019e7 .word 0x080019e7 8001904: 080019e7 .word 0x080019e7 8001908: 080019e7 .word 0x080019e7 800190c: 080019e7 .word 0x080019e7 8001910: 080019e7 .word 0x080019e7 8001914: 080019e7 .word 0x080019e7 8001918: 080019e7 .word 0x080019e7 800191c: 080019e7 .word 0x080019e7 8001920: 080019e7 .word 0x080019e7 8001924: 080019e7 .word 0x080019e7 8001928: 080019e7 .word 0x080019e7 800192c: 080019e7 .word 0x080019e7 8001930: 080019e7 .word 0x080019e7 8001934: 080019e7 .word 0x080019e7 8001938: 080019b3 .word 0x080019b3 case 0x00: rtTLC=100; 800193c: 4b39 ldr r3, [pc, #228] @ (8001a24 ) 800193e: 2264 movs r2, #100 @ 0x64 8001940: 701a strb r2, [r3, #0] stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW)); 8001942: 4b36 ldr r3, [pc, #216] @ (8001a1c ) 8001944: 2200 movs r2, #0 8001946: 801a strh r2, [r3, #0] break; 8001948: e05f b.n 8001a0a case 0x08://tlc1 if(rtTLC==0)stPulsanti|=M1FW; 800194a: 4b36 ldr r3, [pc, #216] @ (8001a24 ) 800194c: 781b ldrb r3, [r3, #0] 800194e: b2db uxtb r3, r3 8001950: 2b00 cmp r3, #0 8001952: d14f bne.n 80019f4 8001954: 4b31 ldr r3, [pc, #196] @ (8001a1c ) 8001956: 881b ldrh r3, [r3, #0] 8001958: f043 0310 orr.w r3, r3, #16 800195c: b29a uxth r2, r3 800195e: 4b2f ldr r3, [pc, #188] @ (8001a1c ) 8001960: 801a strh r2, [r3, #0] break; 8001962: e047 b.n 80019f4 case 0x10://tlc2 if(rtTLC==0)stPulsanti|=M1BW; 8001964: 4b2f ldr r3, [pc, #188] @ (8001a24 ) 8001966: 781b ldrb r3, [r3, #0] 8001968: b2db uxtb r3, r3 800196a: 2b00 cmp r3, #0 800196c: d144 bne.n 80019f8 800196e: 4b2b ldr r3, [pc, #172] @ (8001a1c ) 8001970: 881b ldrh r3, [r3, #0] 8001972: f043 0320 orr.w r3, r3, #32 8001976: b29a uxth r2, r3 8001978: 4b28 ldr r3, [pc, #160] @ (8001a1c ) 800197a: 801a strh r2, [r3, #0] break; 800197c: e03c b.n 80019f8 case 0x20://tlc3 if(rtTLC==0)stPulsanti|=M3FW; 800197e: 4b29 ldr r3, [pc, #164] @ (8001a24 ) 8001980: 781b ldrb r3, [r3, #0] 8001982: b2db uxtb r3, r3 8001984: 2b00 cmp r3, #0 8001986: d139 bne.n 80019fc 8001988: 4b24 ldr r3, [pc, #144] @ (8001a1c ) 800198a: 881b ldrh r3, [r3, #0] 800198c: f443 7380 orr.w r3, r3, #256 @ 0x100 8001990: b29a uxth r2, r3 8001992: 4b22 ldr r3, [pc, #136] @ (8001a1c ) 8001994: 801a strh r2, [r3, #0] break; 8001996: e031 b.n 80019fc case 0x04://tlc4 if(rtTLC==0)stPulsanti|=M3BW; 8001998: 4b22 ldr r3, [pc, #136] @ (8001a24 ) 800199a: 781b ldrb r3, [r3, #0] 800199c: b2db uxtb r3, r3 800199e: 2b00 cmp r3, #0 80019a0: d12e bne.n 8001a00 80019a2: 4b1e ldr r3, [pc, #120] @ (8001a1c ) 80019a4: 881b ldrh r3, [r3, #0] 80019a6: f443 7300 orr.w r3, r3, #512 @ 0x200 80019aa: b29a uxth r2, r3 80019ac: 4b1b ldr r3, [pc, #108] @ (8001a1c ) 80019ae: 801a strh r2, [r3, #0] break; 80019b0: e026 b.n 8001a00 case 0x30://tlc5 if(rtTLC==0)stPulsanti|=M4FW; 80019b2: 4b1c ldr r3, [pc, #112] @ (8001a24 ) 80019b4: 781b ldrb r3, [r3, #0] 80019b6: b2db uxtb r3, r3 80019b8: 2b00 cmp r3, #0 80019ba: d123 bne.n 8001a04 80019bc: 4b17 ldr r3, [pc, #92] @ (8001a1c ) 80019be: 881b ldrh r3, [r3, #0] 80019c0: f443 6380 orr.w r3, r3, #1024 @ 0x400 80019c4: b29a uxth r2, r3 80019c6: 4b15 ldr r3, [pc, #84] @ (8001a1c ) 80019c8: 801a strh r2, [r3, #0] break; 80019ca: e01b b.n 8001a04 case 0x0c://tlc6 if(rtTLC==0)stPulsanti|=M4BW; 80019cc: 4b15 ldr r3, [pc, #84] @ (8001a24 ) 80019ce: 781b ldrb r3, [r3, #0] 80019d0: b2db uxtb r3, r3 80019d2: 2b00 cmp r3, #0 80019d4: d118 bne.n 8001a08 80019d6: 4b11 ldr r3, [pc, #68] @ (8001a1c ) 80019d8: 881b ldrh r3, [r3, #0] 80019da: f443 6300 orr.w r3, r3, #2048 @ 0x800 80019de: b29a uxth r2, r3 80019e0: 4b0e ldr r3, [pc, #56] @ (8001a1c ) 80019e2: 801a strh r2, [r3, #0] break; 80019e4: e010 b.n 8001a08 default: rtTLC=100; 80019e6: 4b0f ldr r3, [pc, #60] @ (8001a24 ) 80019e8: 2264 movs r2, #100 @ 0x64 80019ea: 701a strb r2, [r3, #0] stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW)); 80019ec: 4b0b ldr r3, [pc, #44] @ (8001a1c ) 80019ee: 2200 movs r2, #0 80019f0: 801a strh r2, [r3, #0] break; 80019f2: e00a b.n 8001a0a break; 80019f4: bf00 nop 80019f6: e008 b.n 8001a0a break; 80019f8: bf00 nop 80019fa: e006 b.n 8001a0a break; 80019fc: bf00 nop 80019fe: e004 b.n 8001a0a break; 8001a00: bf00 nop 8001a02: e002 b.n 8001a0a break; 8001a04: bf00 nop 8001a06: e000 b.n 8001a0a break; 8001a08: bf00 nop } } } 8001a0a: bf00 nop 8001a0c: 46bd mov sp, r7 8001a0e: bc80 pop {r7} 8001a10: 4770 bx lr 8001a12: bf00 nop 8001a14: 200003e8 .word 0x200003e8 8001a18: 20000004 .word 0x20000004 8001a1c: 20000430 .word 0x20000430 8001a20: 20000005 .word 0x20000005 8001a24: 20000006 .word 0x20000006 08001a28 : void manageCiclo(void){ 8001a28: b580 push {r7, lr} 8001a2a: b082 sub sp, #8 8001a2c: af02 add r7, sp, #8 switch(stCiclo){ 8001a2e: 4ba7 ldr r3, [pc, #668] @ (8001ccc ) 8001a30: 781b ldrb r3, [r3, #0] 8001a32: 2b30 cmp r3, #48 @ 0x30 8001a34: f201 820a bhi.w 8002e4c 8001a38: a201 add r2, pc, #4 @ (adr r2, 8001a40 ) 8001a3a: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001a3e: bf00 nop 8001a40: 08001b05 .word 0x08001b05 8001a44: 08001d73 .word 0x08001d73 8001a48: 08001da9 .word 0x08001da9 8001a4c: 08001ddf .word 0x08001ddf 8001a50: 08001e15 .word 0x08001e15 8001a54: 08001e4b .word 0x08001e4b 8001a58: 08001e81 .word 0x08001e81 8001a5c: 08001eb7 .word 0x08001eb7 8001a60: 08001eed .word 0x08001eed 8001a64: 08001f23 .word 0x08001f23 8001a68: 08001f7d .word 0x08001f7d 8001a6c: 08001fb3 .word 0x08001fb3 8001a70: 08001fe9 .word 0x08001fe9 8001a74: 0800201f .word 0x0800201f 8001a78: 08002055 .word 0x08002055 8001a7c: 0800208b .word 0x0800208b 8001a80: 080020c1 .word 0x080020c1 8001a84: 080020f7 .word 0x080020f7 8001a88: 08002161 .word 0x08002161 8001a8c: 080021af .word 0x080021af 8001a90: 08002225 .word 0x08002225 8001a94: 0800226d .word 0x0800226d 8001a98: 080022b7 .word 0x080022b7 8001a9c: 08002305 .word 0x08002305 8001aa0: 0800234f .word 0x0800234f 8001aa4: 0800239d .word 0x0800239d 8001aa8: 080023fd .word 0x080023fd 8001aac: 08002467 .word 0x08002467 8001ab0: 080024e1 .word 0x080024e1 8001ab4: 0800252f .word 0x0800252f 8001ab8: 08002573 .word 0x08002573 8001abc: 080025bb .word 0x080025bb 8001ac0: 080025f1 .word 0x080025f1 8001ac4: 0800263f .word 0x0800263f 8001ac8: 080028a7 .word 0x080028a7 8001acc: 080028f3 .word 0x080028f3 8001ad0: 0800293b .word 0x0800293b 8001ad4: 08002987 .word 0x08002987 8001ad8: 08002a19 .word 0x08002a19 8001adc: 08002a81 .word 0x08002a81 8001ae0: 08002aeb .word 0x08002aeb 8001ae4: 08002b5f .word 0x08002b5f 8001ae8: 08002ba1 .word 0x08002ba1 8001aec: 08002be7 .word 0x08002be7 8001af0: 08002c29 .word 0x08002c29 8001af4: 08002c6f .word 0x08002c6f 8001af8: 08002cc5 .word 0x08002cc5 8001afc: 08002d0b .word 0x08002d0b 8001b00: 08002d3f .word 0x08002d3f case omchiuso: if(stPulsanti&P1START){ 8001b04: 4b72 ldr r3, [pc, #456] @ (8001cd0 ) 8001b06: 881b ldrh r3, [r3, #0] 8001b08: f003 0301 and.w r3, r3, #1 8001b0c: 2b00 cmp r3, #0 8001b0e: d018 beq.n 8001b42 stBuz=bzmoving; 8001b10: 4b70 ldr r3, [pc, #448] @ (8001cd4 ) 8001b12: 2201 movs r2, #1 8001b14: 701a strb r2, [r3, #0] (void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT); 8001b16: 4b70 ldr r3, [pc, #448] @ (8001cd8 ) 8001b18: 885b ldrh r3, [r3, #2] 8001b1a: b2da uxtb r2, r3 8001b1c: 4b6f ldr r3, [pc, #444] @ (8001cdc ) 8001b1e: 881b ldrh r3, [r3, #0] 8001b20: b2d9 uxtb r1, r3 8001b22: 4b6f ldr r3, [pc, #444] @ (8001ce0 ) 8001b24: 881b ldrh r3, [r3, #0] 8001b26: b2db uxtb r3, r3 8001b28: 2000 movs r0, #0 8001b2a: 9001 str r0, [sp, #4] 8001b2c: 9300 str r3, [sp, #0] 8001b2e: 460b mov r3, r1 8001b30: 2101 movs r1, #1 8001b32: 2002 movs r0, #2 8001b34: f002 f870 bl 8003c18 stCiclo=omapertura1; 8001b38: 4b64 ldr r3, [pc, #400] @ (8001ccc ) 8001b3a: 2212 movs r2, #18 8001b3c: 701a strb r2, [r3, #0] }else if(stPulsanti&M4BW){ stBuz=bzmoving; (void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); stCiclo=omM4bw1; } break; 8001b3e: f001 b924 b.w 8002d8a }else if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8001b42: 4b63 ldr r3, [pc, #396] @ (8001cd0 ) 8001b44: 881b ldrh r3, [r3, #0] 8001b46: f003 0302 and.w r3, r3, #2 8001b4a: 2b00 cmp r3, #0 8001b4c: d004 beq.n 8001b58 8001b4e: 4b5f ldr r3, [pc, #380] @ (8001ccc ) 8001b50: 2220 movs r2, #32 8001b52: 701a strb r2, [r3, #0] break; 8001b54: f001 b919 b.w 8002d8a else if(stPulsanti&M1FW){ 8001b58: 4b5d ldr r3, [pc, #372] @ (8001cd0 ) 8001b5a: 881b ldrh r3, [r3, #0] 8001b5c: f003 0310 and.w r3, r3, #16 8001b60: 2b00 cmp r3, #0 8001b62: d018 beq.n 8001b96 stBuz=bzmoving; 8001b64: 4b5b ldr r3, [pc, #364] @ (8001cd4 ) 8001b66: 2201 movs r2, #1 8001b68: 701a strb r2, [r3, #0] (void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT); 8001b6a: 4b5b ldr r3, [pc, #364] @ (8001cd8 ) 8001b6c: 881b ldrh r3, [r3, #0] 8001b6e: b2da uxtb r2, r3 8001b70: 4b5c ldr r3, [pc, #368] @ (8001ce4 ) 8001b72: 881b ldrh r3, [r3, #0] 8001b74: b2d9 uxtb r1, r3 8001b76: 4b5c ldr r3, [pc, #368] @ (8001ce8 ) 8001b78: 881b ldrh r3, [r3, #0] 8001b7a: b2db uxtb r3, r3 8001b7c: 2000 movs r0, #0 8001b7e: 9001 str r0, [sp, #4] 8001b80: 9300 str r3, [sp, #0] 8001b82: 460b mov r3, r1 8001b84: 2100 movs r1, #0 8001b86: 2001 movs r0, #1 8001b88: f002 f846 bl 8003c18 stCiclo=omM1fw1; 8001b8c: 4b4f ldr r3, [pc, #316] @ (8001ccc ) 8001b8e: 2201 movs r2, #1 8001b90: 701a strb r2, [r3, #0] break; 8001b92: f001 b8fa b.w 8002d8a }else if(stPulsanti&M1BW){ 8001b96: 4b4e ldr r3, [pc, #312] @ (8001cd0 ) 8001b98: 881b ldrh r3, [r3, #0] 8001b9a: f003 0320 and.w r3, r3, #32 8001b9e: 2b00 cmp r3, #0 8001ba0: d018 beq.n 8001bd4 stBuz=bzmoving; 8001ba2: 4b4c ldr r3, [pc, #304] @ (8001cd4 ) 8001ba4: 2201 movs r2, #1 8001ba6: 701a strb r2, [r3, #0] (void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT); 8001ba8: 4b4b ldr r3, [pc, #300] @ (8001cd8 ) 8001baa: 881b ldrh r3, [r3, #0] 8001bac: b2da uxtb r2, r3 8001bae: 4b4d ldr r3, [pc, #308] @ (8001ce4 ) 8001bb0: 881b ldrh r3, [r3, #0] 8001bb2: b2d9 uxtb r1, r3 8001bb4: 4b4c ldr r3, [pc, #304] @ (8001ce8 ) 8001bb6: 881b ldrh r3, [r3, #0] 8001bb8: b2db uxtb r3, r3 8001bba: 2000 movs r0, #0 8001bbc: 9001 str r0, [sp, #4] 8001bbe: 9300 str r3, [sp, #0] 8001bc0: 460b mov r3, r1 8001bc2: 2101 movs r1, #1 8001bc4: 2001 movs r0, #1 8001bc6: f002 f827 bl 8003c18 stCiclo=omM1bw1; 8001bca: 4b40 ldr r3, [pc, #256] @ (8001ccc ) 8001bcc: 2203 movs r2, #3 8001bce: 701a strb r2, [r3, #0] break; 8001bd0: f001 b8db b.w 8002d8a }else if(stPulsanti&M2FW){ 8001bd4: 4b3e ldr r3, [pc, #248] @ (8001cd0 ) 8001bd6: 881b ldrh r3, [r3, #0] 8001bd8: f003 0340 and.w r3, r3, #64 @ 0x40 8001bdc: 2b00 cmp r3, #0 8001bde: d018 beq.n 8001c12 stBuz=bzmoving; 8001be0: 4b3c ldr r3, [pc, #240] @ (8001cd4 ) 8001be2: 2201 movs r2, #1 8001be4: 701a strb r2, [r3, #0] (void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT); 8001be6: 4b3c ldr r3, [pc, #240] @ (8001cd8 ) 8001be8: 885b ldrh r3, [r3, #2] 8001bea: b2da uxtb r2, r3 8001bec: 4b3f ldr r3, [pc, #252] @ (8001cec ) 8001bee: 881b ldrh r3, [r3, #0] 8001bf0: b2d9 uxtb r1, r3 8001bf2: 4b3d ldr r3, [pc, #244] @ (8001ce8 ) 8001bf4: 881b ldrh r3, [r3, #0] 8001bf6: b2db uxtb r3, r3 8001bf8: 2000 movs r0, #0 8001bfa: 9001 str r0, [sp, #4] 8001bfc: 9300 str r3, [sp, #0] 8001bfe: 460b mov r3, r1 8001c00: 2100 movs r1, #0 8001c02: 2002 movs r0, #2 8001c04: f002 f808 bl 8003c18 stCiclo=omM2fw1; 8001c08: 4b30 ldr r3, [pc, #192] @ (8001ccc ) 8001c0a: 2205 movs r2, #5 8001c0c: 701a strb r2, [r3, #0] break; 8001c0e: f001 b8bc b.w 8002d8a }else if(stPulsanti&M2BW){ 8001c12: 4b2f ldr r3, [pc, #188] @ (8001cd0 ) 8001c14: 881b ldrh r3, [r3, #0] 8001c16: f003 0380 and.w r3, r3, #128 @ 0x80 8001c1a: 2b00 cmp r3, #0 8001c1c: d018 beq.n 8001c50 stBuz=bzmoving; 8001c1e: 4b2d ldr r3, [pc, #180] @ (8001cd4 ) 8001c20: 2201 movs r2, #1 8001c22: 701a strb r2, [r3, #0] (void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT); 8001c24: 4b2c ldr r3, [pc, #176] @ (8001cd8 ) 8001c26: 885b ldrh r3, [r3, #2] 8001c28: b2da uxtb r2, r3 8001c2a: 4b30 ldr r3, [pc, #192] @ (8001cec ) 8001c2c: 881b ldrh r3, [r3, #0] 8001c2e: b2d9 uxtb r1, r3 8001c30: 4b2d ldr r3, [pc, #180] @ (8001ce8 ) 8001c32: 881b ldrh r3, [r3, #0] 8001c34: b2db uxtb r3, r3 8001c36: 2000 movs r0, #0 8001c38: 9001 str r0, [sp, #4] 8001c3a: 9300 str r3, [sp, #0] 8001c3c: 460b mov r3, r1 8001c3e: 2101 movs r1, #1 8001c40: 2002 movs r0, #2 8001c42: f001 ffe9 bl 8003c18 stCiclo=omM2bw1; 8001c46: 4b21 ldr r3, [pc, #132] @ (8001ccc ) 8001c48: 2207 movs r2, #7 8001c4a: 701a strb r2, [r3, #0] break; 8001c4c: f001 b89d b.w 8002d8a }else if(stPulsanti&M3FW){ 8001c50: 4b1f ldr r3, [pc, #124] @ (8001cd0 ) 8001c52: 881b ldrh r3, [r3, #0] 8001c54: f403 7380 and.w r3, r3, #256 @ 0x100 8001c58: 2b00 cmp r3, #0 8001c5a: d018 beq.n 8001c8e stBuz=bzmoving; 8001c5c: 4b1d ldr r3, [pc, #116] @ (8001cd4 ) 8001c5e: 2201 movs r2, #1 8001c60: 701a strb r2, [r3, #0] (void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT); 8001c62: 4b1d ldr r3, [pc, #116] @ (8001cd8 ) 8001c64: 889b ldrh r3, [r3, #4] 8001c66: b2da uxtb r2, r3 8001c68: 4b21 ldr r3, [pc, #132] @ (8001cf0 ) 8001c6a: 881b ldrh r3, [r3, #0] 8001c6c: b2d9 uxtb r1, r3 8001c6e: 4b1e ldr r3, [pc, #120] @ (8001ce8 ) 8001c70: 881b ldrh r3, [r3, #0] 8001c72: b2db uxtb r3, r3 8001c74: 2000 movs r0, #0 8001c76: 9001 str r0, [sp, #4] 8001c78: 9300 str r3, [sp, #0] 8001c7a: 460b mov r3, r1 8001c7c: 2100 movs r1, #0 8001c7e: 2003 movs r0, #3 8001c80: f001 ffca bl 8003c18 stCiclo=omM3fw1; 8001c84: 4b11 ldr r3, [pc, #68] @ (8001ccc ) 8001c86: 2209 movs r2, #9 8001c88: 701a strb r2, [r3, #0] break; 8001c8a: f001 b87e b.w 8002d8a }else if(stPulsanti&M3BW){ 8001c8e: 4b10 ldr r3, [pc, #64] @ (8001cd0 ) 8001c90: 881b ldrh r3, [r3, #0] 8001c92: f403 7300 and.w r3, r3, #512 @ 0x200 8001c96: 2b00 cmp r3, #0 8001c98: d02c beq.n 8001cf4 stBuz=bzmoving; 8001c9a: 4b0e ldr r3, [pc, #56] @ (8001cd4 ) 8001c9c: 2201 movs r2, #1 8001c9e: 701a strb r2, [r3, #0] (void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT); 8001ca0: 4b0d ldr r3, [pc, #52] @ (8001cd8 ) 8001ca2: 889b ldrh r3, [r3, #4] 8001ca4: b2da uxtb r2, r3 8001ca6: 4b12 ldr r3, [pc, #72] @ (8001cf0 ) 8001ca8: 881b ldrh r3, [r3, #0] 8001caa: b2d9 uxtb r1, r3 8001cac: 4b0e ldr r3, [pc, #56] @ (8001ce8 ) 8001cae: 881b ldrh r3, [r3, #0] 8001cb0: b2db uxtb r3, r3 8001cb2: 2000 movs r0, #0 8001cb4: 9001 str r0, [sp, #4] 8001cb6: 9300 str r3, [sp, #0] 8001cb8: 460b mov r3, r1 8001cba: 2101 movs r1, #1 8001cbc: 2003 movs r0, #3 8001cbe: f001 ffab bl 8003c18 stCiclo=omM3bw1; 8001cc2: 4b02 ldr r3, [pc, #8] @ (8001ccc ) 8001cc4: 220b movs r2, #11 8001cc6: 701a strb r2, [r3, #0] break; 8001cc8: f001 b85f b.w 8002d8a 8001ccc: 20000432 .word 0x20000432 8001cd0: 20000430 .word 0x20000430 8001cd4: 20000433 .word 0x20000433 8001cd8: 20000428 .word 0x20000428 8001cdc: 200003fa .word 0x200003fa 8001ce0: 2000041a .word 0x2000041a 8001ce4: 2000041e .word 0x2000041e 8001ce8: 2000041c .word 0x2000041c 8001cec: 20000420 .word 0x20000420 8001cf0: 20000422 .word 0x20000422 }else if(stPulsanti&M4FW){ 8001cf4: 4b98 ldr r3, [pc, #608] @ (8001f58 ) 8001cf6: 881b ldrh r3, [r3, #0] 8001cf8: f403 6380 and.w r3, r3, #1024 @ 0x400 8001cfc: 2b00 cmp r3, #0 8001cfe: d018 beq.n 8001d32 stBuz=bzmoving; 8001d00: 4b96 ldr r3, [pc, #600] @ (8001f5c ) 8001d02: 2201 movs r2, #1 8001d04: 701a strb r2, [r3, #0] (void)ramp(M4,FW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); 8001d06: 4b96 ldr r3, [pc, #600] @ (8001f60 ) 8001d08: 88db ldrh r3, [r3, #6] 8001d0a: b2da uxtb r2, r3 8001d0c: 4b95 ldr r3, [pc, #596] @ (8001f64 ) 8001d0e: 881b ldrh r3, [r3, #0] 8001d10: b2d9 uxtb r1, r3 8001d12: 4b95 ldr r3, [pc, #596] @ (8001f68 ) 8001d14: 881b ldrh r3, [r3, #0] 8001d16: b2db uxtb r3, r3 8001d18: 2000 movs r0, #0 8001d1a: 9001 str r0, [sp, #4] 8001d1c: 9300 str r3, [sp, #0] 8001d1e: 460b mov r3, r1 8001d20: 2100 movs r1, #0 8001d22: 2004 movs r0, #4 8001d24: f001 ff78 bl 8003c18 stCiclo=omM4fw1; 8001d28: 4b90 ldr r3, [pc, #576] @ (8001f6c ) 8001d2a: 220d movs r2, #13 8001d2c: 701a strb r2, [r3, #0] break; 8001d2e: f001 b82c b.w 8002d8a }else if(stPulsanti&M4BW){ 8001d32: 4b89 ldr r3, [pc, #548] @ (8001f58 ) 8001d34: 881b ldrh r3, [r3, #0] 8001d36: f403 6300 and.w r3, r3, #2048 @ 0x800 8001d3a: 2b00 cmp r3, #0 8001d3c: f001 8025 beq.w 8002d8a stBuz=bzmoving; 8001d40: 4b86 ldr r3, [pc, #536] @ (8001f5c ) 8001d42: 2201 movs r2, #1 8001d44: 701a strb r2, [r3, #0] (void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); 8001d46: 4b86 ldr r3, [pc, #536] @ (8001f60 ) 8001d48: 88db ldrh r3, [r3, #6] 8001d4a: b2da uxtb r2, r3 8001d4c: 4b85 ldr r3, [pc, #532] @ (8001f64 ) 8001d4e: 881b ldrh r3, [r3, #0] 8001d50: b2d9 uxtb r1, r3 8001d52: 4b85 ldr r3, [pc, #532] @ (8001f68 ) 8001d54: 881b ldrh r3, [r3, #0] 8001d56: b2db uxtb r3, r3 8001d58: 2000 movs r0, #0 8001d5a: 9001 str r0, [sp, #4] 8001d5c: 9300 str r3, [sp, #0] 8001d5e: 460b mov r3, r1 8001d60: 2101 movs r1, #1 8001d62: 2004 movs r0, #4 8001d64: f001 ff58 bl 8003c18 stCiclo=omM4bw1; 8001d68: 4b80 ldr r3, [pc, #512] @ (8001f6c ) 8001d6a: 220f movs r2, #15 8001d6c: 701a strb r2, [r3, #0] break; 8001d6e: f001 b80c b.w 8002d8a case omM1fw1: (void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN); 8001d72: 4b7b ldr r3, [pc, #492] @ (8001f60 ) 8001d74: 881b ldrh r3, [r3, #0] 8001d76: b2da uxtb r2, r3 8001d78: 4b7d ldr r3, [pc, #500] @ (8001f70 ) 8001d7a: 881b ldrh r3, [r3, #0] 8001d7c: b2d9 uxtb r1, r3 8001d7e: 4b7a ldr r3, [pc, #488] @ (8001f68 ) 8001d80: 881b ldrh r3, [r3, #0] 8001d82: b2db uxtb r3, r3 8001d84: 200a movs r0, #10 8001d86: 9001 str r0, [sp, #4] 8001d88: 9300 str r3, [sp, #0] 8001d8a: 460b mov r3, r1 8001d8c: 2100 movs r1, #0 8001d8e: 2001 movs r0, #1 8001d90: f001 ff42 bl 8003c18 if(pulsanti==0)stCiclo=omM1fw2; 8001d94: 4b77 ldr r3, [pc, #476] @ (8001f74 ) 8001d96: 781b ldrb r3, [r3, #0] 8001d98: 2b00 cmp r3, #0 8001d9a: f040 87f8 bne.w 8002d8e 8001d9e: 4b73 ldr r3, [pc, #460] @ (8001f6c ) 8001da0: 2202 movs r2, #2 8001da2: 701a strb r2, [r3, #0] break; 8001da4: f000 bff3 b.w 8002d8e case omM1fw2: (void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN); 8001da8: 4b6d ldr r3, [pc, #436] @ (8001f60 ) 8001daa: 881b ldrh r3, [r3, #0] 8001dac: b2da uxtb r2, r3 8001dae: 4b70 ldr r3, [pc, #448] @ (8001f70 ) 8001db0: 881b ldrh r3, [r3, #0] 8001db2: b2d9 uxtb r1, r3 8001db4: 4b6c ldr r3, [pc, #432] @ (8001f68 ) 8001db6: 881b ldrh r3, [r3, #0] 8001db8: b2db uxtb r3, r3 8001dba: 200a movs r0, #10 8001dbc: 9001 str r0, [sp, #4] 8001dbe: 9300 str r3, [sp, #0] 8001dc0: 460b mov r3, r1 8001dc2: 2100 movs r1, #0 8001dc4: 2001 movs r0, #1 8001dc6: f001 ff27 bl 8003c18 if(pulsanti)stCiclo=omStopMan; 8001dca: 4b6a ldr r3, [pc, #424] @ (8001f74 ) 8001dcc: 781b ldrb r3, [r3, #0] 8001dce: 2b00 cmp r3, #0 8001dd0: f000 87df beq.w 8002d92 8001dd4: 4b65 ldr r3, [pc, #404] @ (8001f6c ) 8001dd6: 2211 movs r2, #17 8001dd8: 701a strb r2, [r3, #0] break; 8001dda: f000 bfda b.w 8002d92 case omM1bw1: (void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN); 8001dde: 4b60 ldr r3, [pc, #384] @ (8001f60 ) 8001de0: 881b ldrh r3, [r3, #0] 8001de2: b2da uxtb r2, r3 8001de4: 4b62 ldr r3, [pc, #392] @ (8001f70 ) 8001de6: 881b ldrh r3, [r3, #0] 8001de8: b2d9 uxtb r1, r3 8001dea: 4b5f ldr r3, [pc, #380] @ (8001f68 ) 8001dec: 881b ldrh r3, [r3, #0] 8001dee: b2db uxtb r3, r3 8001df0: 200a movs r0, #10 8001df2: 9001 str r0, [sp, #4] 8001df4: 9300 str r3, [sp, #0] 8001df6: 460b mov r3, r1 8001df8: 2101 movs r1, #1 8001dfa: 2001 movs r0, #1 8001dfc: f001 ff0c bl 8003c18 if(pulsanti==0)stCiclo=omM1bw2; 8001e00: 4b5c ldr r3, [pc, #368] @ (8001f74 ) 8001e02: 781b ldrb r3, [r3, #0] 8001e04: 2b00 cmp r3, #0 8001e06: f040 87c6 bne.w 8002d96 8001e0a: 4b58 ldr r3, [pc, #352] @ (8001f6c ) 8001e0c: 2204 movs r2, #4 8001e0e: 701a strb r2, [r3, #0] break; 8001e10: f000 bfc1 b.w 8002d96 case omM1bw2: (void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN); 8001e14: 4b52 ldr r3, [pc, #328] @ (8001f60 ) 8001e16: 881b ldrh r3, [r3, #0] 8001e18: b2da uxtb r2, r3 8001e1a: 4b55 ldr r3, [pc, #340] @ (8001f70 ) 8001e1c: 881b ldrh r3, [r3, #0] 8001e1e: b2d9 uxtb r1, r3 8001e20: 4b51 ldr r3, [pc, #324] @ (8001f68 ) 8001e22: 881b ldrh r3, [r3, #0] 8001e24: b2db uxtb r3, r3 8001e26: 200a movs r0, #10 8001e28: 9001 str r0, [sp, #4] 8001e2a: 9300 str r3, [sp, #0] 8001e2c: 460b mov r3, r1 8001e2e: 2101 movs r1, #1 8001e30: 2001 movs r0, #1 8001e32: f001 fef1 bl 8003c18 if(pulsanti)stCiclo=omStopMan; 8001e36: 4b4f ldr r3, [pc, #316] @ (8001f74 ) 8001e38: 781b ldrb r3, [r3, #0] 8001e3a: 2b00 cmp r3, #0 8001e3c: f000 87ad beq.w 8002d9a 8001e40: 4b4a ldr r3, [pc, #296] @ (8001f6c ) 8001e42: 2211 movs r2, #17 8001e44: 701a strb r2, [r3, #0] break; 8001e46: f000 bfa8 b.w 8002d9a case omM2fw1: (void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN); 8001e4a: 4b45 ldr r3, [pc, #276] @ (8001f60 ) 8001e4c: 885b ldrh r3, [r3, #2] 8001e4e: b2da uxtb r2, r3 8001e50: 4b49 ldr r3, [pc, #292] @ (8001f78 ) 8001e52: 881b ldrh r3, [r3, #0] 8001e54: b2d9 uxtb r1, r3 8001e56: 4b44 ldr r3, [pc, #272] @ (8001f68 ) 8001e58: 881b ldrh r3, [r3, #0] 8001e5a: b2db uxtb r3, r3 8001e5c: 200a movs r0, #10 8001e5e: 9001 str r0, [sp, #4] 8001e60: 9300 str r3, [sp, #0] 8001e62: 460b mov r3, r1 8001e64: 2100 movs r1, #0 8001e66: 2002 movs r0, #2 8001e68: f001 fed6 bl 8003c18 if(pulsanti==0)stCiclo=omM2fw2; 8001e6c: 4b41 ldr r3, [pc, #260] @ (8001f74 ) 8001e6e: 781b ldrb r3, [r3, #0] 8001e70: 2b00 cmp r3, #0 8001e72: f040 8794 bne.w 8002d9e 8001e76: 4b3d ldr r3, [pc, #244] @ (8001f6c ) 8001e78: 2206 movs r2, #6 8001e7a: 701a strb r2, [r3, #0] break; 8001e7c: f000 bf8f b.w 8002d9e case omM2fw2: (void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN); 8001e80: 4b37 ldr r3, [pc, #220] @ (8001f60 ) 8001e82: 885b ldrh r3, [r3, #2] 8001e84: b2da uxtb r2, r3 8001e86: 4b3c ldr r3, [pc, #240] @ (8001f78 ) 8001e88: 881b ldrh r3, [r3, #0] 8001e8a: b2d9 uxtb r1, r3 8001e8c: 4b36 ldr r3, [pc, #216] @ (8001f68 ) 8001e8e: 881b ldrh r3, [r3, #0] 8001e90: b2db uxtb r3, r3 8001e92: 200a movs r0, #10 8001e94: 9001 str r0, [sp, #4] 8001e96: 9300 str r3, [sp, #0] 8001e98: 460b mov r3, r1 8001e9a: 2100 movs r1, #0 8001e9c: 2002 movs r0, #2 8001e9e: f001 febb bl 8003c18 if(pulsanti)stCiclo=omStopMan; 8001ea2: 4b34 ldr r3, [pc, #208] @ (8001f74 ) 8001ea4: 781b ldrb r3, [r3, #0] 8001ea6: 2b00 cmp r3, #0 8001ea8: f000 877b beq.w 8002da2 8001eac: 4b2f ldr r3, [pc, #188] @ (8001f6c ) 8001eae: 2211 movs r2, #17 8001eb0: 701a strb r2, [r3, #0] break; 8001eb2: f000 bf76 b.w 8002da2 case omM2bw1: (void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN); 8001eb6: 4b2a ldr r3, [pc, #168] @ (8001f60 ) 8001eb8: 885b ldrh r3, [r3, #2] 8001eba: b2da uxtb r2, r3 8001ebc: 4b2e ldr r3, [pc, #184] @ (8001f78 ) 8001ebe: 881b ldrh r3, [r3, #0] 8001ec0: b2d9 uxtb r1, r3 8001ec2: 4b29 ldr r3, [pc, #164] @ (8001f68 ) 8001ec4: 881b ldrh r3, [r3, #0] 8001ec6: b2db uxtb r3, r3 8001ec8: 200a movs r0, #10 8001eca: 9001 str r0, [sp, #4] 8001ecc: 9300 str r3, [sp, #0] 8001ece: 460b mov r3, r1 8001ed0: 2101 movs r1, #1 8001ed2: 2002 movs r0, #2 8001ed4: f001 fea0 bl 8003c18 if(pulsanti==0)stCiclo=omM2bw2; 8001ed8: 4b26 ldr r3, [pc, #152] @ (8001f74 ) 8001eda: 781b ldrb r3, [r3, #0] 8001edc: 2b00 cmp r3, #0 8001ede: f040 8762 bne.w 8002da6 8001ee2: 4b22 ldr r3, [pc, #136] @ (8001f6c ) 8001ee4: 2208 movs r2, #8 8001ee6: 701a strb r2, [r3, #0] break; 8001ee8: f000 bf5d b.w 8002da6 case omM2bw2: (void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN); 8001eec: 4b1c ldr r3, [pc, #112] @ (8001f60 ) 8001eee: 885b ldrh r3, [r3, #2] 8001ef0: b2da uxtb r2, r3 8001ef2: 4b21 ldr r3, [pc, #132] @ (8001f78 ) 8001ef4: 881b ldrh r3, [r3, #0] 8001ef6: b2d9 uxtb r1, r3 8001ef8: 4b1b ldr r3, [pc, #108] @ (8001f68 ) 8001efa: 881b ldrh r3, [r3, #0] 8001efc: b2db uxtb r3, r3 8001efe: 200a movs r0, #10 8001f00: 9001 str r0, [sp, #4] 8001f02: 9300 str r3, [sp, #0] 8001f04: 460b mov r3, r1 8001f06: 2101 movs r1, #1 8001f08: 2002 movs r0, #2 8001f0a: f001 fe85 bl 8003c18 if(pulsanti)stCiclo=omStopMan; 8001f0e: 4b19 ldr r3, [pc, #100] @ (8001f74 ) 8001f10: 781b ldrb r3, [r3, #0] 8001f12: 2b00 cmp r3, #0 8001f14: f000 8749 beq.w 8002daa 8001f18: 4b14 ldr r3, [pc, #80] @ (8001f6c ) 8001f1a: 2211 movs r2, #17 8001f1c: 701a strb r2, [r3, #0] break; 8001f1e: f000 bf44 b.w 8002daa case omM3fw1: (void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN); 8001f22: 4b0f ldr r3, [pc, #60] @ (8001f60 ) 8001f24: 889b ldrh r3, [r3, #4] 8001f26: b2da uxtb r2, r3 8001f28: 4b0e ldr r3, [pc, #56] @ (8001f64 ) 8001f2a: 881b ldrh r3, [r3, #0] 8001f2c: b2d9 uxtb r1, r3 8001f2e: 4b0e ldr r3, [pc, #56] @ (8001f68 ) 8001f30: 881b ldrh r3, [r3, #0] 8001f32: b2db uxtb r3, r3 8001f34: 200a movs r0, #10 8001f36: 9001 str r0, [sp, #4] 8001f38: 9300 str r3, [sp, #0] 8001f3a: 460b mov r3, r1 8001f3c: 2100 movs r1, #0 8001f3e: 2003 movs r0, #3 8001f40: f001 fe6a bl 8003c18 if(pulsanti==0)stCiclo=omM3fw2; 8001f44: 4b0b ldr r3, [pc, #44] @ (8001f74 ) 8001f46: 781b ldrb r3, [r3, #0] 8001f48: 2b00 cmp r3, #0 8001f4a: f040 8730 bne.w 8002dae 8001f4e: 4b07 ldr r3, [pc, #28] @ (8001f6c ) 8001f50: 220a movs r2, #10 8001f52: 701a strb r2, [r3, #0] break; 8001f54: f000 bf2b b.w 8002dae 8001f58: 20000430 .word 0x20000430 8001f5c: 20000433 .word 0x20000433 8001f60: 20000428 .word 0x20000428 8001f64: 20000422 .word 0x20000422 8001f68: 2000041c .word 0x2000041c 8001f6c: 20000432 .word 0x20000432 8001f70: 2000041e .word 0x2000041e 8001f74: 200003e8 .word 0x200003e8 8001f78: 20000420 .word 0x20000420 case omM3fw2: (void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN); 8001f7c: 4b9d ldr r3, [pc, #628] @ (80021f4 ) 8001f7e: 889b ldrh r3, [r3, #4] 8001f80: b2da uxtb r2, r3 8001f82: 4b9d ldr r3, [pc, #628] @ (80021f8 ) 8001f84: 881b ldrh r3, [r3, #0] 8001f86: b2d9 uxtb r1, r3 8001f88: 4b9c ldr r3, [pc, #624] @ (80021fc ) 8001f8a: 881b ldrh r3, [r3, #0] 8001f8c: b2db uxtb r3, r3 8001f8e: 200a movs r0, #10 8001f90: 9001 str r0, [sp, #4] 8001f92: 9300 str r3, [sp, #0] 8001f94: 460b mov r3, r1 8001f96: 2100 movs r1, #0 8001f98: 2003 movs r0, #3 8001f9a: f001 fe3d bl 8003c18 if(pulsanti)stCiclo=omStopMan; 8001f9e: 4b98 ldr r3, [pc, #608] @ (8002200 ) 8001fa0: 781b ldrb r3, [r3, #0] 8001fa2: 2b00 cmp r3, #0 8001fa4: f000 8705 beq.w 8002db2 8001fa8: 4b96 ldr r3, [pc, #600] @ (8002204 ) 8001faa: 2211 movs r2, #17 8001fac: 701a strb r2, [r3, #0] break; 8001fae: f000 bf00 b.w 8002db2 case omM3bw1: (void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN); 8001fb2: 4b90 ldr r3, [pc, #576] @ (80021f4 ) 8001fb4: 889b ldrh r3, [r3, #4] 8001fb6: b2da uxtb r2, r3 8001fb8: 4b8f ldr r3, [pc, #572] @ (80021f8 ) 8001fba: 881b ldrh r3, [r3, #0] 8001fbc: b2d9 uxtb r1, r3 8001fbe: 4b8f ldr r3, [pc, #572] @ (80021fc ) 8001fc0: 881b ldrh r3, [r3, #0] 8001fc2: b2db uxtb r3, r3 8001fc4: 200a movs r0, #10 8001fc6: 9001 str r0, [sp, #4] 8001fc8: 9300 str r3, [sp, #0] 8001fca: 460b mov r3, r1 8001fcc: 2101 movs r1, #1 8001fce: 2003 movs r0, #3 8001fd0: f001 fe22 bl 8003c18 if(pulsanti==0)stCiclo=omM3bw2; 8001fd4: 4b8a ldr r3, [pc, #552] @ (8002200 ) 8001fd6: 781b ldrb r3, [r3, #0] 8001fd8: 2b00 cmp r3, #0 8001fda: f040 86ec bne.w 8002db6 8001fde: 4b89 ldr r3, [pc, #548] @ (8002204 ) 8001fe0: 220c movs r2, #12 8001fe2: 701a strb r2, [r3, #0] break; 8001fe4: f000 bee7 b.w 8002db6 case omM3bw2: (void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN); 8001fe8: 4b82 ldr r3, [pc, #520] @ (80021f4 ) 8001fea: 889b ldrh r3, [r3, #4] 8001fec: b2da uxtb r2, r3 8001fee: 4b82 ldr r3, [pc, #520] @ (80021f8 ) 8001ff0: 881b ldrh r3, [r3, #0] 8001ff2: b2d9 uxtb r1, r3 8001ff4: 4b81 ldr r3, [pc, #516] @ (80021fc ) 8001ff6: 881b ldrh r3, [r3, #0] 8001ff8: b2db uxtb r3, r3 8001ffa: 200a movs r0, #10 8001ffc: 9001 str r0, [sp, #4] 8001ffe: 9300 str r3, [sp, #0] 8002000: 460b mov r3, r1 8002002: 2101 movs r1, #1 8002004: 2003 movs r0, #3 8002006: f001 fe07 bl 8003c18 if(pulsanti)stCiclo=omStopMan; 800200a: 4b7d ldr r3, [pc, #500] @ (8002200 ) 800200c: 781b ldrb r3, [r3, #0] 800200e: 2b00 cmp r3, #0 8002010: f000 86d3 beq.w 8002dba 8002014: 4b7b ldr r3, [pc, #492] @ (8002204 ) 8002016: 2211 movs r2, #17 8002018: 701a strb r2, [r3, #0] break; 800201a: f000 bece b.w 8002dba case omM4fw1: (void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN); 800201e: 4b75 ldr r3, [pc, #468] @ (80021f4 ) 8002020: 88db ldrh r3, [r3, #6] 8002022: b2da uxtb r2, r3 8002024: 4b78 ldr r3, [pc, #480] @ (8002208 ) 8002026: 881b ldrh r3, [r3, #0] 8002028: b2d9 uxtb r1, r3 800202a: 4b74 ldr r3, [pc, #464] @ (80021fc ) 800202c: 881b ldrh r3, [r3, #0] 800202e: b2db uxtb r3, r3 8002030: 200a movs r0, #10 8002032: 9001 str r0, [sp, #4] 8002034: 9300 str r3, [sp, #0] 8002036: 460b mov r3, r1 8002038: 2100 movs r1, #0 800203a: 2004 movs r0, #4 800203c: f001 fdec bl 8003c18 if(pulsanti==0)stCiclo=omM4fw2; 8002040: 4b6f ldr r3, [pc, #444] @ (8002200 ) 8002042: 781b ldrb r3, [r3, #0] 8002044: 2b00 cmp r3, #0 8002046: f040 86ba bne.w 8002dbe 800204a: 4b6e ldr r3, [pc, #440] @ (8002204 ) 800204c: 220e movs r2, #14 800204e: 701a strb r2, [r3, #0] break; 8002050: f000 beb5 b.w 8002dbe case omM4fw2: (void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN); 8002054: 4b67 ldr r3, [pc, #412] @ (80021f4 ) 8002056: 88db ldrh r3, [r3, #6] 8002058: b2da uxtb r2, r3 800205a: 4b6b ldr r3, [pc, #428] @ (8002208 ) 800205c: 881b ldrh r3, [r3, #0] 800205e: b2d9 uxtb r1, r3 8002060: 4b66 ldr r3, [pc, #408] @ (80021fc ) 8002062: 881b ldrh r3, [r3, #0] 8002064: b2db uxtb r3, r3 8002066: 200a movs r0, #10 8002068: 9001 str r0, [sp, #4] 800206a: 9300 str r3, [sp, #0] 800206c: 460b mov r3, r1 800206e: 2100 movs r1, #0 8002070: 2004 movs r0, #4 8002072: f001 fdd1 bl 8003c18 if(pulsanti)stCiclo=omStopMan; 8002076: 4b62 ldr r3, [pc, #392] @ (8002200 ) 8002078: 781b ldrb r3, [r3, #0] 800207a: 2b00 cmp r3, #0 800207c: f000 86a1 beq.w 8002dc2 8002080: 4b60 ldr r3, [pc, #384] @ (8002204 ) 8002082: 2211 movs r2, #17 8002084: 701a strb r2, [r3, #0] break; 8002086: f000 be9c b.w 8002dc2 case omM4bw1: (void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN); 800208a: 4b5a ldr r3, [pc, #360] @ (80021f4 ) 800208c: 88db ldrh r3, [r3, #6] 800208e: b2da uxtb r2, r3 8002090: 4b5d ldr r3, [pc, #372] @ (8002208 ) 8002092: 881b ldrh r3, [r3, #0] 8002094: b2d9 uxtb r1, r3 8002096: 4b59 ldr r3, [pc, #356] @ (80021fc ) 8002098: 881b ldrh r3, [r3, #0] 800209a: b2db uxtb r3, r3 800209c: 200a movs r0, #10 800209e: 9001 str r0, [sp, #4] 80020a0: 9300 str r3, [sp, #0] 80020a2: 460b mov r3, r1 80020a4: 2101 movs r1, #1 80020a6: 2004 movs r0, #4 80020a8: f001 fdb6 bl 8003c18 if(pulsanti==0)stCiclo=omM4bw2; 80020ac: 4b54 ldr r3, [pc, #336] @ (8002200 ) 80020ae: 781b ldrb r3, [r3, #0] 80020b0: 2b00 cmp r3, #0 80020b2: f040 8688 bne.w 8002dc6 80020b6: 4b53 ldr r3, [pc, #332] @ (8002204 ) 80020b8: 2210 movs r2, #16 80020ba: 701a strb r2, [r3, #0] break; 80020bc: f000 be83 b.w 8002dc6 case omM4bw2: (void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN); 80020c0: 4b4c ldr r3, [pc, #304] @ (80021f4 ) 80020c2: 88db ldrh r3, [r3, #6] 80020c4: b2da uxtb r2, r3 80020c6: 4b50 ldr r3, [pc, #320] @ (8002208 ) 80020c8: 881b ldrh r3, [r3, #0] 80020ca: b2d9 uxtb r1, r3 80020cc: 4b4b ldr r3, [pc, #300] @ (80021fc ) 80020ce: 881b ldrh r3, [r3, #0] 80020d0: b2db uxtb r3, r3 80020d2: 200a movs r0, #10 80020d4: 9001 str r0, [sp, #4] 80020d6: 9300 str r3, [sp, #0] 80020d8: 460b mov r3, r1 80020da: 2101 movs r1, #1 80020dc: 2004 movs r0, #4 80020de: f001 fd9b bl 8003c18 if(pulsanti)stCiclo=omStopMan; 80020e2: 4b47 ldr r3, [pc, #284] @ (8002200 ) 80020e4: 781b ldrb r3, [r3, #0] 80020e6: 2b00 cmp r3, #0 80020e8: f000 866f beq.w 8002dca 80020ec: 4b45 ldr r3, [pc, #276] @ (8002204 ) 80020ee: 2211 movs r2, #17 80020f0: 701a strb r2, [r3, #0] break; 80020f2: f000 be6a b.w 8002dca case omStopMan: SetMotPerc(M1,FW,0); 80020f6: 2200 movs r2, #0 80020f8: 2100 movs r1, #0 80020fa: 2001 movs r0, #1 80020fc: f001 fc0c bl 8003918 SetMotPerc(M2,FW,0); 8002100: 2200 movs r2, #0 8002102: 2100 movs r1, #0 8002104: 2002 movs r0, #2 8002106: f001 fc07 bl 8003918 SetMotPerc(M3,FW,0); 800210a: 2200 movs r2, #0 800210c: 2100 movs r1, #0 800210e: 2003 movs r0, #3 8002110: f001 fc02 bl 8003918 SetMotPerc(M4,FW,0); 8002114: 2200 movs r2, #0 8002116: 2100 movs r1, #0 8002118: 2004 movs r0, #4 800211a: f001 fbfd bl 8003918 SetMotPerc(M1,BW,0); 800211e: 2200 movs r2, #0 8002120: 2101 movs r1, #1 8002122: 2001 movs r0, #1 8002124: f001 fbf8 bl 8003918 SetMotPerc(M2,BW,0); 8002128: 2200 movs r2, #0 800212a: 2101 movs r1, #1 800212c: 2002 movs r0, #2 800212e: f001 fbf3 bl 8003918 SetMotPerc(M3,BW,0); 8002132: 2200 movs r2, #0 8002134: 2101 movs r1, #1 8002136: 2003 movs r0, #3 8002138: f001 fbee bl 8003918 SetMotPerc(M4,BW,0); 800213c: 2200 movs r2, #0 800213e: 2101 movs r1, #1 8002140: 2004 movs r0, #4 8002142: f001 fbe9 bl 8003918 if(pulsanti==0){ 8002146: 4b2e ldr r3, [pc, #184] @ (8002200 ) 8002148: 781b ldrb r3, [r3, #0] 800214a: 2b00 cmp r3, #0 800214c: f040 863f bne.w 8002dce stBuz=bzoff; 8002150: 4b2e ldr r3, [pc, #184] @ (800220c ) 8002152: 2200 movs r2, #0 8002154: 701a strb r2, [r3, #0] stCiclo=omaperto; 8002156: 4b2b ldr r3, [pc, #172] @ (8002204 ) 8002158: 2221 movs r2, #33 @ 0x21 800215a: 701a strb r2, [r3, #0] } break; 800215c: f000 be37 b.w 8002dce case omapertura1: if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){ 8002160: 4b24 ldr r3, [pc, #144] @ (80021f4 ) 8002162: 885b ldrh r3, [r3, #2] 8002164: b2da uxtb r2, r3 8002166: 4b2a ldr r3, [pc, #168] @ (8002210 ) 8002168: 881b ldrh r3, [r3, #0] 800216a: b2d9 uxtb r1, r3 800216c: 4b29 ldr r3, [pc, #164] @ (8002214 ) 800216e: 881b ldrh r3, [r3, #0] 8002170: b2db uxtb r3, r3 8002172: 200a movs r0, #10 8002174: 9001 str r0, [sp, #4] 8002176: 9300 str r3, [sp, #0] 8002178: 460b mov r3, r1 800217a: 2101 movs r1, #1 800217c: 2002 movs r0, #2 800217e: f001 fd4b bl 8003c18 8002182: 4603 mov r3, r0 8002184: 2b00 cmp r3, #0 8002186: d106 bne.n 8002196 rtCiclo=t1ap; 8002188: 4b23 ldr r3, [pc, #140] @ (8002218 ) 800218a: 881a ldrh r2, [r3, #0] 800218c: 4b23 ldr r3, [pc, #140] @ (800221c ) 800218e: 801a strh r2, [r3, #0] stCiclo=omapertura2; 8002190: 4b1c ldr r3, [pc, #112] @ (8002204 ) 8002192: 2213 movs r2, #19 8002194: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8002196: 4b22 ldr r3, [pc, #136] @ (8002220 ) 8002198: 881b ldrh r3, [r3, #0] 800219a: f003 0302 and.w r3, r3, #2 800219e: 2b00 cmp r3, #0 80021a0: f000 8617 beq.w 8002dd2 80021a4: 4b17 ldr r3, [pc, #92] @ (8002204 ) 80021a6: 2220 movs r2, #32 80021a8: 701a strb r2, [r3, #0] break; 80021aa: f000 be12 b.w 8002dd2 case omapertura2: if(rtCiclo==0){ 80021ae: 4b1b ldr r3, [pc, #108] @ (800221c ) 80021b0: 881b ldrh r3, [r3, #0] 80021b2: b29b uxth r3, r3 80021b4: 2b00 cmp r3, #0 80021b6: d110 bne.n 80021da (void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT); 80021b8: 4b15 ldr r3, [pc, #84] @ (8002210 ) 80021ba: 881b ldrh r3, [r3, #0] 80021bc: b2da uxtb r2, r3 80021be: 4b15 ldr r3, [pc, #84] @ (8002214 ) 80021c0: 881b ldrh r3, [r3, #0] 80021c2: b2db uxtb r3, r3 80021c4: 2100 movs r1, #0 80021c6: 9101 str r1, [sp, #4] 80021c8: 9300 str r3, [sp, #0] 80021ca: 2300 movs r3, #0 80021cc: 2101 movs r1, #1 80021ce: 2002 movs r0, #2 80021d0: f001 fd22 bl 8003c18 stCiclo=omapertura3; 80021d4: 4b0b ldr r3, [pc, #44] @ (8002204 ) 80021d6: 2214 movs r2, #20 80021d8: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80021da: 4b11 ldr r3, [pc, #68] @ (8002220 ) 80021dc: 881b ldrh r3, [r3, #0] 80021de: f003 0302 and.w r3, r3, #2 80021e2: 2b00 cmp r3, #0 80021e4: f000 85f7 beq.w 8002dd6 80021e8: 4b06 ldr r3, [pc, #24] @ (8002204 ) 80021ea: 2220 movs r2, #32 80021ec: 701a strb r2, [r3, #0] break; 80021ee: f000 bdf2 b.w 8002dd6 80021f2: bf00 nop 80021f4: 20000428 .word 0x20000428 80021f8: 20000422 .word 0x20000422 80021fc: 2000041c .word 0x2000041c 8002200: 200003e8 .word 0x200003e8 8002204: 20000432 .word 0x20000432 8002208: 20000424 .word 0x20000424 800220c: 20000433 .word 0x20000433 8002210: 200003fa .word 0x200003fa 8002214: 2000041a .word 0x2000041a 8002218: 20000406 .word 0x20000406 800221c: 200003f4 .word 0x200003f4 8002220: 20000430 .word 0x20000430 case omapertura3: if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){ 8002224: 4ba2 ldr r3, [pc, #648] @ (80024b0 ) 8002226: 881b ldrh r3, [r3, #0] 8002228: b2da uxtb r2, r3 800222a: 4ba2 ldr r3, [pc, #648] @ (80024b4 ) 800222c: 881b ldrh r3, [r3, #0] 800222e: b2db uxtb r3, r3 8002230: 210a movs r1, #10 8002232: 9101 str r1, [sp, #4] 8002234: 9300 str r3, [sp, #0] 8002236: 2300 movs r3, #0 8002238: 2101 movs r1, #1 800223a: 2002 movs r0, #2 800223c: f001 fcec bl 8003c18 8002240: 4603 mov r3, r0 8002242: 2b00 cmp r3, #0 8002244: d106 bne.n 8002254 rtCiclo=twap; 8002246: 4b9c ldr r3, [pc, #624] @ (80024b8 ) 8002248: 881a ldrh r2, [r3, #0] 800224a: 4b9c ldr r3, [pc, #624] @ (80024bc ) 800224c: 801a strh r2, [r3, #0] stCiclo=omapertura4; 800224e: 4b9c ldr r3, [pc, #624] @ (80024c0 ) 8002250: 2215 movs r2, #21 8002252: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8002254: 4b9b ldr r3, [pc, #620] @ (80024c4 ) 8002256: 881b ldrh r3, [r3, #0] 8002258: f003 0302 and.w r3, r3, #2 800225c: 2b00 cmp r3, #0 800225e: f000 85bc beq.w 8002dda 8002262: 4b97 ldr r3, [pc, #604] @ (80024c0 ) 8002264: 2220 movs r2, #32 8002266: 701a strb r2, [r3, #0] break; 8002268: f000 bdb7 b.w 8002dda case omapertura4: if(rtCiclo==0){ 800226c: 4b93 ldr r3, [pc, #588] @ (80024bc ) 800226e: 881b ldrh r3, [r3, #0] 8002270: b29b uxth r3, r3 8002272: 2b00 cmp r3, #0 8002274: d113 bne.n 800229e (void)ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT); 8002276: 4b94 ldr r3, [pc, #592] @ (80024c8 ) 8002278: 881b ldrh r3, [r3, #0] 800227a: b2da uxtb r2, r3 800227c: 4b93 ldr r3, [pc, #588] @ (80024cc ) 800227e: 881b ldrh r3, [r3, #0] 8002280: b2d9 uxtb r1, r3 8002282: 4b8c ldr r3, [pc, #560] @ (80024b4 ) 8002284: 881b ldrh r3, [r3, #0] 8002286: b2db uxtb r3, r3 8002288: 2000 movs r0, #0 800228a: 9001 str r0, [sp, #4] 800228c: 9300 str r3, [sp, #0] 800228e: 460b mov r3, r1 8002290: 2100 movs r1, #0 8002292: 2001 movs r0, #1 8002294: f001 fcc0 bl 8003c18 stCiclo=omapertura5; 8002298: 4b89 ldr r3, [pc, #548] @ (80024c0 ) 800229a: 2216 movs r2, #22 800229c: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800229e: 4b89 ldr r3, [pc, #548] @ (80024c4 ) 80022a0: 881b ldrh r3, [r3, #0] 80022a2: f003 0302 and.w r3, r3, #2 80022a6: 2b00 cmp r3, #0 80022a8: f000 8599 beq.w 8002dde 80022ac: 4b84 ldr r3, [pc, #528] @ (80024c0 ) 80022ae: 2220 movs r2, #32 80022b0: 701a strb r2, [r3, #0] break; 80022b2: f000 bd94 b.w 8002dde case omapertura5: if(ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){ 80022b6: 4b84 ldr r3, [pc, #528] @ (80024c8 ) 80022b8: 881b ldrh r3, [r3, #0] 80022ba: b2da uxtb r2, r3 80022bc: 4b83 ldr r3, [pc, #524] @ (80024cc ) 80022be: 881b ldrh r3, [r3, #0] 80022c0: b2d9 uxtb r1, r3 80022c2: 4b7c ldr r3, [pc, #496] @ (80024b4 ) 80022c4: 881b ldrh r3, [r3, #0] 80022c6: b2db uxtb r3, r3 80022c8: 200a movs r0, #10 80022ca: 9001 str r0, [sp, #4] 80022cc: 9300 str r3, [sp, #0] 80022ce: 460b mov r3, r1 80022d0: 2100 movs r1, #0 80022d2: 2001 movs r0, #1 80022d4: f001 fca0 bl 8003c18 80022d8: 4603 mov r3, r0 80022da: 2b00 cmp r3, #0 80022dc: d106 bne.n 80022ec rtCiclo=t2ap; 80022de: 4b7c ldr r3, [pc, #496] @ (80024d0 ) 80022e0: 881a ldrh r2, [r3, #0] 80022e2: 4b76 ldr r3, [pc, #472] @ (80024bc ) 80022e4: 801a strh r2, [r3, #0] stCiclo=omapertura6; 80022e6: 4b76 ldr r3, [pc, #472] @ (80024c0 ) 80022e8: 2217 movs r2, #23 80022ea: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80022ec: 4b75 ldr r3, [pc, #468] @ (80024c4 ) 80022ee: 881b ldrh r3, [r3, #0] 80022f0: f003 0302 and.w r3, r3, #2 80022f4: 2b00 cmp r3, #0 80022f6: f000 8574 beq.w 8002de2 80022fa: 4b71 ldr r3, [pc, #452] @ (80024c0 ) 80022fc: 2220 movs r2, #32 80022fe: 701a strb r2, [r3, #0] break; 8002300: f000 bd6f b.w 8002de2 case omapertura6: if(rtCiclo==0){ 8002304: 4b6d ldr r3, [pc, #436] @ (80024bc ) 8002306: 881b ldrh r3, [r3, #0] 8002308: b29b uxth r3, r3 800230a: 2b00 cmp r3, #0 800230c: d113 bne.n 8002336 (void)ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPINIT); 800230e: 4b6e ldr r3, [pc, #440] @ (80024c8 ) 8002310: 889b ldrh r3, [r3, #4] 8002312: b2da uxtb r2, r3 8002314: 4b6f ldr r3, [pc, #444] @ (80024d4 ) 8002316: 881b ldrh r3, [r3, #0] 8002318: b2d9 uxtb r1, r3 800231a: 4b66 ldr r3, [pc, #408] @ (80024b4 ) 800231c: 881b ldrh r3, [r3, #0] 800231e: b2db uxtb r3, r3 8002320: 2000 movs r0, #0 8002322: 9001 str r0, [sp, #4] 8002324: 9300 str r3, [sp, #0] 8002326: 460b mov r3, r1 8002328: 2100 movs r1, #0 800232a: 2003 movs r0, #3 800232c: f001 fc74 bl 8003c18 stCiclo=omapertura7; 8002330: 4b63 ldr r3, [pc, #396] @ (80024c0 ) 8002332: 2218 movs r2, #24 8002334: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8002336: 4b63 ldr r3, [pc, #396] @ (80024c4 ) 8002338: 881b ldrh r3, [r3, #0] 800233a: f003 0302 and.w r3, r3, #2 800233e: 2b00 cmp r3, #0 8002340: f000 8551 beq.w 8002de6 8002344: 4b5e ldr r3, [pc, #376] @ (80024c0 ) 8002346: 2220 movs r2, #32 8002348: 701a strb r2, [r3, #0] break; 800234a: f000 bd4c b.w 8002de6 case omapertura7: if(ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){ 800234e: 4b5e ldr r3, [pc, #376] @ (80024c8 ) 8002350: 889b ldrh r3, [r3, #4] 8002352: b2da uxtb r2, r3 8002354: 4b5f ldr r3, [pc, #380] @ (80024d4 ) 8002356: 881b ldrh r3, [r3, #0] 8002358: b2d9 uxtb r1, r3 800235a: 4b56 ldr r3, [pc, #344] @ (80024b4 ) 800235c: 881b ldrh r3, [r3, #0] 800235e: b2db uxtb r3, r3 8002360: 200a movs r0, #10 8002362: 9001 str r0, [sp, #4] 8002364: 9300 str r3, [sp, #0] 8002366: 460b mov r3, r1 8002368: 2100 movs r1, #0 800236a: 2003 movs r0, #3 800236c: f001 fc54 bl 8003c18 8002370: 4603 mov r3, r0 8002372: 2b00 cmp r3, #0 8002374: d106 bne.n 8002384 rtCiclo=t3ap; 8002376: 4b58 ldr r3, [pc, #352] @ (80024d8 ) 8002378: 881a ldrh r2, [r3, #0] 800237a: 4b50 ldr r3, [pc, #320] @ (80024bc ) 800237c: 801a strh r2, [r3, #0] stCiclo=omapertura8; 800237e: 4b50 ldr r3, [pc, #320] @ (80024c0 ) 8002380: 2219 movs r2, #25 8002382: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8002384: 4b4f ldr r3, [pc, #316] @ (80024c4 ) 8002386: 881b ldrh r3, [r3, #0] 8002388: f003 0302 and.w r3, r3, #2 800238c: 2b00 cmp r3, #0 800238e: f000 852c beq.w 8002dea 8002392: 4b4b ldr r3, [pc, #300] @ (80024c0 ) 8002394: 2220 movs r2, #32 8002396: 701a strb r2, [r3, #0] break; 8002398: f000 bd27 b.w 8002dea case omapertura8: if(rtCiclo==0){ 800239c: 4b47 ldr r3, [pc, #284] @ (80024bc ) 800239e: 881b ldrh r3, [r3, #0] 80023a0: b29b uxth r3, r3 80023a2: 2b00 cmp r3, #0 80023a4: d11e bne.n 80023e4 (void)ramp(M3,FW,m3pwmap,0,tramp,RAMPINIT); 80023a6: 4b4b ldr r3, [pc, #300] @ (80024d4 ) 80023a8: 881b ldrh r3, [r3, #0] 80023aa: b2da uxtb r2, r3 80023ac: 4b41 ldr r3, [pc, #260] @ (80024b4 ) 80023ae: 881b ldrh r3, [r3, #0] 80023b0: b2db uxtb r3, r3 80023b2: 2100 movs r1, #0 80023b4: 9101 str r1, [sp, #4] 80023b6: 9300 str r3, [sp, #0] 80023b8: 2300 movs r3, #0 80023ba: 2100 movs r1, #0 80023bc: 2003 movs r0, #3 80023be: f001 fc2b bl 8003c18 (void)ramp(M1,FW,m1pwmap,0,tramp,RAMPINIT); 80023c2: 4b42 ldr r3, [pc, #264] @ (80024cc ) 80023c4: 881b ldrh r3, [r3, #0] 80023c6: b2da uxtb r2, r3 80023c8: 4b3a ldr r3, [pc, #232] @ (80024b4 ) 80023ca: 881b ldrh r3, [r3, #0] 80023cc: b2db uxtb r3, r3 80023ce: 2100 movs r1, #0 80023d0: 9101 str r1, [sp, #4] 80023d2: 9300 str r3, [sp, #0] 80023d4: 2300 movs r3, #0 80023d6: 2100 movs r1, #0 80023d8: 2001 movs r0, #1 80023da: f001 fc1d bl 8003c18 stCiclo=omapertura9; 80023de: 4b38 ldr r3, [pc, #224] @ (80024c0 ) 80023e0: 221a movs r2, #26 80023e2: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80023e4: 4b37 ldr r3, [pc, #220] @ (80024c4 ) 80023e6: 881b ldrh r3, [r3, #0] 80023e8: f003 0302 and.w r3, r3, #2 80023ec: 2b00 cmp r3, #0 80023ee: f000 84fe beq.w 8002dee 80023f2: 4b33 ldr r3, [pc, #204] @ (80024c0 ) 80023f4: 2220 movs r2, #32 80023f6: 701a strb r2, [r3, #0] break; 80023f8: f000 bcf9 b.w 8002dee case omapertura9: if((ramp(M3,FW,m3pwmap,0,tramp,RAMPRUN)==DONE)&&(ramp(M1,FW,m1pwmap,0,tramp,RAMPRUN)==DONE)){ 80023fc: 4b35 ldr r3, [pc, #212] @ (80024d4 ) 80023fe: 881b ldrh r3, [r3, #0] 8002400: b2da uxtb r2, r3 8002402: 4b2c ldr r3, [pc, #176] @ (80024b4 ) 8002404: 881b ldrh r3, [r3, #0] 8002406: b2db uxtb r3, r3 8002408: 210a movs r1, #10 800240a: 9101 str r1, [sp, #4] 800240c: 9300 str r3, [sp, #0] 800240e: 2300 movs r3, #0 8002410: 2100 movs r1, #0 8002412: 2003 movs r0, #3 8002414: f001 fc00 bl 8003c18 8002418: 4603 mov r3, r0 800241a: 2b00 cmp r3, #0 800241c: d117 bne.n 800244e 800241e: 4b2b ldr r3, [pc, #172] @ (80024cc ) 8002420: 881b ldrh r3, [r3, #0] 8002422: b2da uxtb r2, r3 8002424: 4b23 ldr r3, [pc, #140] @ (80024b4 ) 8002426: 881b ldrh r3, [r3, #0] 8002428: b2db uxtb r3, r3 800242a: 210a movs r1, #10 800242c: 9101 str r1, [sp, #4] 800242e: 9300 str r3, [sp, #0] 8002430: 2300 movs r3, #0 8002432: 2100 movs r1, #0 8002434: 2001 movs r0, #1 8002436: f001 fbef bl 8003c18 800243a: 4603 mov r3, r0 800243c: 2b00 cmp r3, #0 800243e: d106 bne.n 800244e rtCiclo=twap; 8002440: 4b1d ldr r3, [pc, #116] @ (80024b8 ) 8002442: 881a ldrh r2, [r3, #0] 8002444: 4b1d ldr r3, [pc, #116] @ (80024bc ) 8002446: 801a strh r2, [r3, #0] stCiclo=omapertura10; 8002448: 4b1d ldr r3, [pc, #116] @ (80024c0 ) 800244a: 221b movs r2, #27 800244c: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800244e: 4b1d ldr r3, [pc, #116] @ (80024c4 ) 8002450: 881b ldrh r3, [r3, #0] 8002452: f003 0302 and.w r3, r3, #2 8002456: 2b00 cmp r3, #0 8002458: f000 84cb beq.w 8002df2 800245c: 4b18 ldr r3, [pc, #96] @ (80024c0 ) 800245e: 2220 movs r2, #32 8002460: 701a strb r2, [r3, #0] break; 8002462: f000 bcc6 b.w 8002df2 case omapertura10: if(rtCiclo==0){ 8002466: 4b15 ldr r3, [pc, #84] @ (80024bc ) 8002468: 881b ldrh r3, [r3, #0] 800246a: b29b uxth r3, r3 800246c: 2b00 cmp r3, #0 800246e: d113 bne.n 8002498 (void)ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPINIT); 8002470: 4b15 ldr r3, [pc, #84] @ (80024c8 ) 8002472: 88db ldrh r3, [r3, #6] 8002474: b2da uxtb r2, r3 8002476: 4b19 ldr r3, [pc, #100] @ (80024dc ) 8002478: 881b ldrh r3, [r3, #0] 800247a: b2d9 uxtb r1, r3 800247c: 4b0d ldr r3, [pc, #52] @ (80024b4 ) 800247e: 881b ldrh r3, [r3, #0] 8002480: b2db uxtb r3, r3 8002482: 2000 movs r0, #0 8002484: 9001 str r0, [sp, #4] 8002486: 9300 str r3, [sp, #0] 8002488: 460b mov r3, r1 800248a: 2100 movs r1, #0 800248c: 2004 movs r0, #4 800248e: f001 fbc3 bl 8003c18 stCiclo=omapertura11; 8002492: 4b0b ldr r3, [pc, #44] @ (80024c0 ) 8002494: 221c movs r2, #28 8002496: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8002498: 4b0a ldr r3, [pc, #40] @ (80024c4 ) 800249a: 881b ldrh r3, [r3, #0] 800249c: f003 0302 and.w r3, r3, #2 80024a0: 2b00 cmp r3, #0 80024a2: f000 84a8 beq.w 8002df6 80024a6: 4b06 ldr r3, [pc, #24] @ (80024c0 ) 80024a8: 2220 movs r2, #32 80024aa: 701a strb r2, [r3, #0] break; 80024ac: f000 bca3 b.w 8002df6 80024b0: 200003fa .word 0x200003fa 80024b4: 2000041a .word 0x2000041a 80024b8: 2000040e .word 0x2000040e 80024bc: 200003f4 .word 0x200003f4 80024c0: 20000432 .word 0x20000432 80024c4: 20000430 .word 0x20000430 80024c8: 20000428 .word 0x20000428 80024cc: 200003f6 .word 0x200003f6 80024d0: 20000408 .word 0x20000408 80024d4: 200003fe .word 0x200003fe 80024d8: 2000040a .word 0x2000040a 80024dc: 20000402 .word 0x20000402 case omapertura11: if(ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){ 80024e0: 4b97 ldr r3, [pc, #604] @ (8002740 ) 80024e2: 88db ldrh r3, [r3, #6] 80024e4: b2da uxtb r2, r3 80024e6: 4b97 ldr r3, [pc, #604] @ (8002744 ) 80024e8: 881b ldrh r3, [r3, #0] 80024ea: b2d9 uxtb r1, r3 80024ec: 4b96 ldr r3, [pc, #600] @ (8002748 ) 80024ee: 881b ldrh r3, [r3, #0] 80024f0: b2db uxtb r3, r3 80024f2: 200a movs r0, #10 80024f4: 9001 str r0, [sp, #4] 80024f6: 9300 str r3, [sp, #0] 80024f8: 460b mov r3, r1 80024fa: 2100 movs r1, #0 80024fc: 2004 movs r0, #4 80024fe: f001 fb8b bl 8003c18 8002502: 4603 mov r3, r0 8002504: 2b00 cmp r3, #0 8002506: d106 bne.n 8002516 rtCiclo=t4ap; 8002508: 4b90 ldr r3, [pc, #576] @ (800274c ) 800250a: 881a ldrh r2, [r3, #0] 800250c: 4b90 ldr r3, [pc, #576] @ (8002750 ) 800250e: 801a strh r2, [r3, #0] stCiclo=omapertura12; 8002510: 4b90 ldr r3, [pc, #576] @ (8002754 ) 8002512: 221d movs r2, #29 8002514: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8002516: 4b90 ldr r3, [pc, #576] @ (8002758 ) 8002518: 881b ldrh r3, [r3, #0] 800251a: f003 0302 and.w r3, r3, #2 800251e: 2b00 cmp r3, #0 8002520: f000 846b beq.w 8002dfa 8002524: 4b8b ldr r3, [pc, #556] @ (8002754 ) 8002526: 2220 movs r2, #32 8002528: 701a strb r2, [r3, #0] break; 800252a: f000 bc66 b.w 8002dfa case omapertura12: if(rtCiclo==0){ 800252e: 4b88 ldr r3, [pc, #544] @ (8002750 ) 8002530: 881b ldrh r3, [r3, #0] 8002532: b29b uxth r3, r3 8002534: 2b00 cmp r3, #0 8002536: d110 bne.n 800255a (void)ramp(M4,FW,m4pwmap,0,tramp,RAMPINIT); 8002538: 4b82 ldr r3, [pc, #520] @ (8002744 ) 800253a: 881b ldrh r3, [r3, #0] 800253c: b2da uxtb r2, r3 800253e: 4b82 ldr r3, [pc, #520] @ (8002748 ) 8002540: 881b ldrh r3, [r3, #0] 8002542: b2db uxtb r3, r3 8002544: 2100 movs r1, #0 8002546: 9101 str r1, [sp, #4] 8002548: 9300 str r3, [sp, #0] 800254a: 2300 movs r3, #0 800254c: 2100 movs r1, #0 800254e: 2004 movs r0, #4 8002550: f001 fb62 bl 8003c18 stCiclo=omapertura13; 8002554: 4b7f ldr r3, [pc, #508] @ (8002754 ) 8002556: 221e movs r2, #30 8002558: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800255a: 4b7f ldr r3, [pc, #508] @ (8002758 ) 800255c: 881b ldrh r3, [r3, #0] 800255e: f003 0302 and.w r3, r3, #2 8002562: 2b00 cmp r3, #0 8002564: f000 844b beq.w 8002dfe 8002568: 4b7a ldr r3, [pc, #488] @ (8002754 ) 800256a: 2220 movs r2, #32 800256c: 701a strb r2, [r3, #0] break; 800256e: f000 bc46 b.w 8002dfe case omapertura13: if(ramp(M4,FW,m4pwmap,0,tramp,RAMPRUN)==DONE){ 8002572: 4b74 ldr r3, [pc, #464] @ (8002744 ) 8002574: 881b ldrh r3, [r3, #0] 8002576: b2da uxtb r2, r3 8002578: 4b73 ldr r3, [pc, #460] @ (8002748 ) 800257a: 881b ldrh r3, [r3, #0] 800257c: b2db uxtb r3, r3 800257e: 210a movs r1, #10 8002580: 9101 str r1, [sp, #4] 8002582: 9300 str r3, [sp, #0] 8002584: 2300 movs r3, #0 8002586: 2100 movs r1, #0 8002588: 2004 movs r0, #4 800258a: f001 fb45 bl 8003c18 800258e: 4603 mov r3, r0 8002590: 2b00 cmp r3, #0 8002592: d106 bne.n 80025a2 rtCiclo=twap; 8002594: 4b71 ldr r3, [pc, #452] @ (800275c ) 8002596: 881a ldrh r2, [r3, #0] 8002598: 4b6d ldr r3, [pc, #436] @ (8002750 ) 800259a: 801a strh r2, [r3, #0] stCiclo=omapertura14; 800259c: 4b6d ldr r3, [pc, #436] @ (8002754 ) 800259e: 221f movs r2, #31 80025a0: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80025a2: 4b6d ldr r3, [pc, #436] @ (8002758 ) 80025a4: 881b ldrh r3, [r3, #0] 80025a6: f003 0302 and.w r3, r3, #2 80025aa: 2b00 cmp r3, #0 80025ac: f000 8429 beq.w 8002e02 80025b0: 4b68 ldr r3, [pc, #416] @ (8002754 ) 80025b2: 2220 movs r2, #32 80025b4: 701a strb r2, [r3, #0] break; 80025b6: f000 bc24 b.w 8002e02 case omapertura14: if((rtCiclo==0)&&(pulsanti==0)){ 80025ba: 4b65 ldr r3, [pc, #404] @ (8002750 ) 80025bc: 881b ldrh r3, [r3, #0] 80025be: b29b uxth r3, r3 80025c0: 2b00 cmp r3, #0 80025c2: d109 bne.n 80025d8 80025c4: 4b66 ldr r3, [pc, #408] @ (8002760 ) 80025c6: 781b ldrb r3, [r3, #0] 80025c8: 2b00 cmp r3, #0 80025ca: d105 bne.n 80025d8 stBuz=bzoff; 80025cc: 4b65 ldr r3, [pc, #404] @ (8002764 ) 80025ce: 2200 movs r2, #0 80025d0: 701a strb r2, [r3, #0] stCiclo=omaperto; 80025d2: 4b60 ldr r3, [pc, #384] @ (8002754 ) 80025d4: 2221 movs r2, #33 @ 0x21 80025d6: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80025d8: 4b5f ldr r3, [pc, #380] @ (8002758 ) 80025da: 881b ldrh r3, [r3, #0] 80025dc: f003 0302 and.w r3, r3, #2 80025e0: 2b00 cmp r3, #0 80025e2: f000 8410 beq.w 8002e06 80025e6: 4b5b ldr r3, [pc, #364] @ (8002754 ) 80025e8: 2220 movs r2, #32 80025ea: 701a strb r2, [r3, #0] break; 80025ec: f000 bc0b b.w 8002e06 case omstopapertura: SetMotPerc(M1,FW,0); 80025f0: 2200 movs r2, #0 80025f2: 2100 movs r1, #0 80025f4: 2001 movs r0, #1 80025f6: f001 f98f bl 8003918 SetMotPerc(M2,FW,0); 80025fa: 2200 movs r2, #0 80025fc: 2100 movs r1, #0 80025fe: 2002 movs r0, #2 8002600: f001 f98a bl 8003918 SetMotPerc(M3,FW,0); 8002604: 2200 movs r2, #0 8002606: 2100 movs r1, #0 8002608: 2003 movs r0, #3 800260a: f001 f985 bl 8003918 SetMotPerc(M4,FW,0); 800260e: 2200 movs r2, #0 8002610: 2100 movs r1, #0 8002612: 2004 movs r0, #4 8002614: f001 f980 bl 8003918 if(pulsanti==0){ 8002618: 4b51 ldr r3, [pc, #324] @ (8002760 ) 800261a: 781b ldrb r3, [r3, #0] 800261c: 2b00 cmp r3, #0 800261e: f040 83f4 bne.w 8002e0a stBuz=bzoff; 8002622: 4b50 ldr r3, [pc, #320] @ (8002764 ) 8002624: 2200 movs r2, #0 8002626: 701a strb r2, [r3, #0] stCiclo=omchiuso; 8002628: 4b4a ldr r3, [pc, #296] @ (8002754 ) 800262a: 2200 movs r2, #0 800262c: 701a strb r2, [r3, #0] stPulsanti&=(~P1STOP); 800262e: 4b4a ldr r3, [pc, #296] @ (8002758 ) 8002630: 881b ldrh r3, [r3, #0] 8002632: f023 0302 bic.w r3, r3, #2 8002636: b29a uxth r2, r3 8002638: 4b47 ldr r3, [pc, #284] @ (8002758 ) 800263a: 801a strh r2, [r3, #0] } break; 800263c: e3e5 b.n 8002e0a case omaperto: if(stPulsanti&P1START){ 800263e: 4b46 ldr r3, [pc, #280] @ (8002758 ) 8002640: 881b ldrh r3, [r3, #0] 8002642: f003 0301 and.w r3, r3, #1 8002646: 2b00 cmp r3, #0 8002648: d016 beq.n 8002678 stBuz=bzmoving; 800264a: 4b46 ldr r3, [pc, #280] @ (8002764 ) 800264c: 2201 movs r2, #1 800264e: 701a strb r2, [r3, #0] (void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT); 8002650: 4b3b ldr r3, [pc, #236] @ (8002740 ) 8002652: 881b ldrh r3, [r3, #0] 8002654: b2da uxtb r2, r3 8002656: 4b44 ldr r3, [pc, #272] @ (8002768 ) 8002658: 881b ldrh r3, [r3, #0] 800265a: b2d9 uxtb r1, r3 800265c: 4b3a ldr r3, [pc, #232] @ (8002748 ) 800265e: 881b ldrh r3, [r3, #0] 8002660: b2db uxtb r3, r3 8002662: 2000 movs r0, #0 8002664: 9001 str r0, [sp, #4] 8002666: 9300 str r3, [sp, #0] 8002668: 460b mov r3, r1 800266a: 2101 movs r1, #1 800266c: 2001 movs r0, #1 800266e: f001 fad3 bl 8003c18 stCiclo=omchiusura1; 8002672: 4b38 ldr r3, [pc, #224] @ (8002754 ) 8002674: 2222 movs r2, #34 @ 0x22 8002676: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002678: 4b37 ldr r3, [pc, #220] @ (8002758 ) 800267a: 881b ldrh r3, [r3, #0] 800267c: f003 0302 and.w r3, r3, #2 8002680: 2b00 cmp r3, #0 8002682: d003 beq.n 800268c 8002684: 4b33 ldr r3, [pc, #204] @ (8002754 ) 8002686: 2230 movs r2, #48 @ 0x30 8002688: 701a strb r2, [r3, #0] }else if(stPulsanti&M4BW){ stBuz=bzmoving; (void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); stCiclo=omM4bw1; } break; 800268a: e3c0 b.n 8002e0e else if(stPulsanti&M1FW){ 800268c: 4b32 ldr r3, [pc, #200] @ (8002758 ) 800268e: 881b ldrh r3, [r3, #0] 8002690: f003 0310 and.w r3, r3, #16 8002694: 2b00 cmp r3, #0 8002696: d017 beq.n 80026c8 stBuz=bzmoving; 8002698: 4b32 ldr r3, [pc, #200] @ (8002764 ) 800269a: 2201 movs r2, #1 800269c: 701a strb r2, [r3, #0] (void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT); 800269e: 4b28 ldr r3, [pc, #160] @ (8002740 ) 80026a0: 881b ldrh r3, [r3, #0] 80026a2: b2da uxtb r2, r3 80026a4: 4b31 ldr r3, [pc, #196] @ (800276c ) 80026a6: 881b ldrh r3, [r3, #0] 80026a8: b2d9 uxtb r1, r3 80026aa: 4b31 ldr r3, [pc, #196] @ (8002770 ) 80026ac: 881b ldrh r3, [r3, #0] 80026ae: b2db uxtb r3, r3 80026b0: 2000 movs r0, #0 80026b2: 9001 str r0, [sp, #4] 80026b4: 9300 str r3, [sp, #0] 80026b6: 460b mov r3, r1 80026b8: 2100 movs r1, #0 80026ba: 2001 movs r0, #1 80026bc: f001 faac bl 8003c18 stCiclo=omM1fw1; 80026c0: 4b24 ldr r3, [pc, #144] @ (8002754 ) 80026c2: 2201 movs r2, #1 80026c4: 701a strb r2, [r3, #0] break; 80026c6: e3a2 b.n 8002e0e }else if(stPulsanti&M1BW){ 80026c8: 4b23 ldr r3, [pc, #140] @ (8002758 ) 80026ca: 881b ldrh r3, [r3, #0] 80026cc: f003 0320 and.w r3, r3, #32 80026d0: 2b00 cmp r3, #0 80026d2: d017 beq.n 8002704 stBuz=bzmoving; 80026d4: 4b23 ldr r3, [pc, #140] @ (8002764 ) 80026d6: 2201 movs r2, #1 80026d8: 701a strb r2, [r3, #0] (void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT); 80026da: 4b19 ldr r3, [pc, #100] @ (8002740 ) 80026dc: 881b ldrh r3, [r3, #0] 80026de: b2da uxtb r2, r3 80026e0: 4b22 ldr r3, [pc, #136] @ (800276c ) 80026e2: 881b ldrh r3, [r3, #0] 80026e4: b2d9 uxtb r1, r3 80026e6: 4b22 ldr r3, [pc, #136] @ (8002770 ) 80026e8: 881b ldrh r3, [r3, #0] 80026ea: b2db uxtb r3, r3 80026ec: 2000 movs r0, #0 80026ee: 9001 str r0, [sp, #4] 80026f0: 9300 str r3, [sp, #0] 80026f2: 460b mov r3, r1 80026f4: 2101 movs r1, #1 80026f6: 2001 movs r0, #1 80026f8: f001 fa8e bl 8003c18 stCiclo=omM1bw1; 80026fc: 4b15 ldr r3, [pc, #84] @ (8002754 ) 80026fe: 2203 movs r2, #3 8002700: 701a strb r2, [r3, #0] break; 8002702: e384 b.n 8002e0e }else if(stPulsanti&M2FW){ 8002704: 4b14 ldr r3, [pc, #80] @ (8002758 ) 8002706: 881b ldrh r3, [r3, #0] 8002708: f003 0340 and.w r3, r3, #64 @ 0x40 800270c: 2b00 cmp r3, #0 800270e: d033 beq.n 8002778 stBuz=bzmoving; 8002710: 4b14 ldr r3, [pc, #80] @ (8002764 ) 8002712: 2201 movs r2, #1 8002714: 701a strb r2, [r3, #0] (void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT); 8002716: 4b0a ldr r3, [pc, #40] @ (8002740 ) 8002718: 885b ldrh r3, [r3, #2] 800271a: b2da uxtb r2, r3 800271c: 4b15 ldr r3, [pc, #84] @ (8002774 ) 800271e: 881b ldrh r3, [r3, #0] 8002720: b2d9 uxtb r1, r3 8002722: 4b13 ldr r3, [pc, #76] @ (8002770 ) 8002724: 881b ldrh r3, [r3, #0] 8002726: b2db uxtb r3, r3 8002728: 2000 movs r0, #0 800272a: 9001 str r0, [sp, #4] 800272c: 9300 str r3, [sp, #0] 800272e: 460b mov r3, r1 8002730: 2100 movs r1, #0 8002732: 2002 movs r0, #2 8002734: f001 fa70 bl 8003c18 stCiclo=omM2fw1; 8002738: 4b06 ldr r3, [pc, #24] @ (8002754 ) 800273a: 2205 movs r2, #5 800273c: 701a strb r2, [r3, #0] break; 800273e: e366 b.n 8002e0e 8002740: 20000428 .word 0x20000428 8002744: 20000402 .word 0x20000402 8002748: 2000041a .word 0x2000041a 800274c: 2000040c .word 0x2000040c 8002750: 200003f4 .word 0x200003f4 8002754: 20000432 .word 0x20000432 8002758: 20000430 .word 0x20000430 800275c: 2000040e .word 0x2000040e 8002760: 200003e8 .word 0x200003e8 8002764: 20000433 .word 0x20000433 8002768: 200003f8 .word 0x200003f8 800276c: 2000041e .word 0x2000041e 8002770: 2000041c .word 0x2000041c 8002774: 20000420 .word 0x20000420 }else if(stPulsanti&M2BW){ 8002778: 4b9a ldr r3, [pc, #616] @ (80029e4 ) 800277a: 881b ldrh r3, [r3, #0] 800277c: f003 0380 and.w r3, r3, #128 @ 0x80 8002780: 2b00 cmp r3, #0 8002782: d017 beq.n 80027b4 stBuz=bzmoving; 8002784: 4b98 ldr r3, [pc, #608] @ (80029e8 ) 8002786: 2201 movs r2, #1 8002788: 701a strb r2, [r3, #0] (void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT); 800278a: 4b98 ldr r3, [pc, #608] @ (80029ec ) 800278c: 885b ldrh r3, [r3, #2] 800278e: b2da uxtb r2, r3 8002790: 4b97 ldr r3, [pc, #604] @ (80029f0 ) 8002792: 881b ldrh r3, [r3, #0] 8002794: b2d9 uxtb r1, r3 8002796: 4b97 ldr r3, [pc, #604] @ (80029f4 ) 8002798: 881b ldrh r3, [r3, #0] 800279a: b2db uxtb r3, r3 800279c: 2000 movs r0, #0 800279e: 9001 str r0, [sp, #4] 80027a0: 9300 str r3, [sp, #0] 80027a2: 460b mov r3, r1 80027a4: 2101 movs r1, #1 80027a6: 2002 movs r0, #2 80027a8: f001 fa36 bl 8003c18 stCiclo=omM2bw1; 80027ac: 4b92 ldr r3, [pc, #584] @ (80029f8 ) 80027ae: 2207 movs r2, #7 80027b0: 701a strb r2, [r3, #0] break; 80027b2: e32c b.n 8002e0e }else if(stPulsanti&M3FW){ 80027b4: 4b8b ldr r3, [pc, #556] @ (80029e4 ) 80027b6: 881b ldrh r3, [r3, #0] 80027b8: f403 7380 and.w r3, r3, #256 @ 0x100 80027bc: 2b00 cmp r3, #0 80027be: d017 beq.n 80027f0 stBuz=bzmoving; 80027c0: 4b89 ldr r3, [pc, #548] @ (80029e8 ) 80027c2: 2201 movs r2, #1 80027c4: 701a strb r2, [r3, #0] (void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT); 80027c6: 4b89 ldr r3, [pc, #548] @ (80029ec ) 80027c8: 889b ldrh r3, [r3, #4] 80027ca: b2da uxtb r2, r3 80027cc: 4b8b ldr r3, [pc, #556] @ (80029fc ) 80027ce: 881b ldrh r3, [r3, #0] 80027d0: b2d9 uxtb r1, r3 80027d2: 4b88 ldr r3, [pc, #544] @ (80029f4 ) 80027d4: 881b ldrh r3, [r3, #0] 80027d6: b2db uxtb r3, r3 80027d8: 2000 movs r0, #0 80027da: 9001 str r0, [sp, #4] 80027dc: 9300 str r3, [sp, #0] 80027de: 460b mov r3, r1 80027e0: 2100 movs r1, #0 80027e2: 2003 movs r0, #3 80027e4: f001 fa18 bl 8003c18 stCiclo=omM3fw1; 80027e8: 4b83 ldr r3, [pc, #524] @ (80029f8 ) 80027ea: 2209 movs r2, #9 80027ec: 701a strb r2, [r3, #0] break; 80027ee: e30e b.n 8002e0e }else if(stPulsanti&M3BW){ 80027f0: 4b7c ldr r3, [pc, #496] @ (80029e4 ) 80027f2: 881b ldrh r3, [r3, #0] 80027f4: f403 7300 and.w r3, r3, #512 @ 0x200 80027f8: 2b00 cmp r3, #0 80027fa: d017 beq.n 800282c stBuz=bzmoving; 80027fc: 4b7a ldr r3, [pc, #488] @ (80029e8 ) 80027fe: 2201 movs r2, #1 8002800: 701a strb r2, [r3, #0] (void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT); 8002802: 4b7a ldr r3, [pc, #488] @ (80029ec ) 8002804: 889b ldrh r3, [r3, #4] 8002806: b2da uxtb r2, r3 8002808: 4b7c ldr r3, [pc, #496] @ (80029fc ) 800280a: 881b ldrh r3, [r3, #0] 800280c: b2d9 uxtb r1, r3 800280e: 4b79 ldr r3, [pc, #484] @ (80029f4 ) 8002810: 881b ldrh r3, [r3, #0] 8002812: b2db uxtb r3, r3 8002814: 2000 movs r0, #0 8002816: 9001 str r0, [sp, #4] 8002818: 9300 str r3, [sp, #0] 800281a: 460b mov r3, r1 800281c: 2101 movs r1, #1 800281e: 2003 movs r0, #3 8002820: f001 f9fa bl 8003c18 stCiclo=omM3bw1; 8002824: 4b74 ldr r3, [pc, #464] @ (80029f8 ) 8002826: 220b movs r2, #11 8002828: 701a strb r2, [r3, #0] break; 800282a: e2f0 b.n 8002e0e }else if(stPulsanti&M4FW){ 800282c: 4b6d ldr r3, [pc, #436] @ (80029e4 ) 800282e: 881b ldrh r3, [r3, #0] 8002830: f403 6380 and.w r3, r3, #1024 @ 0x400 8002834: 2b00 cmp r3, #0 8002836: d017 beq.n 8002868 stBuz=bzmoving; 8002838: 4b6b ldr r3, [pc, #428] @ (80029e8 ) 800283a: 2201 movs r2, #1 800283c: 701a strb r2, [r3, #0] (void)ramp(M4,FW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); 800283e: 4b6b ldr r3, [pc, #428] @ (80029ec ) 8002840: 88db ldrh r3, [r3, #6] 8002842: b2da uxtb r2, r3 8002844: 4b6d ldr r3, [pc, #436] @ (80029fc ) 8002846: 881b ldrh r3, [r3, #0] 8002848: b2d9 uxtb r1, r3 800284a: 4b6a ldr r3, [pc, #424] @ (80029f4 ) 800284c: 881b ldrh r3, [r3, #0] 800284e: b2db uxtb r3, r3 8002850: 2000 movs r0, #0 8002852: 9001 str r0, [sp, #4] 8002854: 9300 str r3, [sp, #0] 8002856: 460b mov r3, r1 8002858: 2100 movs r1, #0 800285a: 2004 movs r0, #4 800285c: f001 f9dc bl 8003c18 stCiclo=omM4fw1; 8002860: 4b65 ldr r3, [pc, #404] @ (80029f8 ) 8002862: 220d movs r2, #13 8002864: 701a strb r2, [r3, #0] break; 8002866: e2d2 b.n 8002e0e }else if(stPulsanti&M4BW){ 8002868: 4b5e ldr r3, [pc, #376] @ (80029e4 ) 800286a: 881b ldrh r3, [r3, #0] 800286c: f403 6300 and.w r3, r3, #2048 @ 0x800 8002870: 2b00 cmp r3, #0 8002872: f000 82cc beq.w 8002e0e stBuz=bzmoving; 8002876: 4b5c ldr r3, [pc, #368] @ (80029e8 ) 8002878: 2201 movs r2, #1 800287a: 701a strb r2, [r3, #0] (void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT); 800287c: 4b5b ldr r3, [pc, #364] @ (80029ec ) 800287e: 88db ldrh r3, [r3, #6] 8002880: b2da uxtb r2, r3 8002882: 4b5e ldr r3, [pc, #376] @ (80029fc ) 8002884: 881b ldrh r3, [r3, #0] 8002886: b2d9 uxtb r1, r3 8002888: 4b5a ldr r3, [pc, #360] @ (80029f4 ) 800288a: 881b ldrh r3, [r3, #0] 800288c: b2db uxtb r3, r3 800288e: 2000 movs r0, #0 8002890: 9001 str r0, [sp, #4] 8002892: 9300 str r3, [sp, #0] 8002894: 460b mov r3, r1 8002896: 2101 movs r1, #1 8002898: 2004 movs r0, #4 800289a: f001 f9bd bl 8003c18 stCiclo=omM4bw1; 800289e: 4b56 ldr r3, [pc, #344] @ (80029f8 ) 80028a0: 220f movs r2, #15 80028a2: 701a strb r2, [r3, #0] break; 80028a4: e2b3 b.n 8002e0e case omchiusura1: if(ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){ 80028a6: 4b51 ldr r3, [pc, #324] @ (80029ec ) 80028a8: 881b ldrh r3, [r3, #0] 80028aa: b2da uxtb r2, r3 80028ac: 4b54 ldr r3, [pc, #336] @ (8002a00 ) 80028ae: 881b ldrh r3, [r3, #0] 80028b0: b2d9 uxtb r1, r3 80028b2: 4b54 ldr r3, [pc, #336] @ (8002a04 ) 80028b4: 881b ldrh r3, [r3, #0] 80028b6: b2db uxtb r3, r3 80028b8: 200a movs r0, #10 80028ba: 9001 str r0, [sp, #4] 80028bc: 9300 str r3, [sp, #0] 80028be: 460b mov r3, r1 80028c0: 2101 movs r1, #1 80028c2: 2001 movs r0, #1 80028c4: f001 f9a8 bl 8003c18 80028c8: 4603 mov r3, r0 80028ca: 2b00 cmp r3, #0 80028cc: d106 bne.n 80028dc rtCiclo=t4ch; 80028ce: 4b4e ldr r3, [pc, #312] @ (8002a08 ) 80028d0: 881a ldrh r2, [r3, #0] 80028d2: 4b4e ldr r3, [pc, #312] @ (8002a0c ) 80028d4: 801a strh r2, [r3, #0] stCiclo=omchiusura2; 80028d6: 4b48 ldr r3, [pc, #288] @ (80029f8 ) 80028d8: 2223 movs r2, #35 @ 0x23 80028da: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80028dc: 4b41 ldr r3, [pc, #260] @ (80029e4 ) 80028de: 881b ldrh r3, [r3, #0] 80028e0: f003 0302 and.w r3, r3, #2 80028e4: 2b00 cmp r3, #0 80028e6: f000 8294 beq.w 8002e12 80028ea: 4b43 ldr r3, [pc, #268] @ (80029f8 ) 80028ec: 2230 movs r2, #48 @ 0x30 80028ee: 701a strb r2, [r3, #0] break; 80028f0: e28f b.n 8002e12 case omchiusura2: if(rtCiclo==0){ 80028f2: 4b46 ldr r3, [pc, #280] @ (8002a0c ) 80028f4: 881b ldrh r3, [r3, #0] 80028f6: b29b uxth r3, r3 80028f8: 2b00 cmp r3, #0 80028fa: d113 bne.n 8002924 (void)ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPINIT); 80028fc: 4b3b ldr r3, [pc, #236] @ (80029ec ) 80028fe: 889b ldrh r3, [r3, #4] 8002900: b2da uxtb r2, r3 8002902: 4b43 ldr r3, [pc, #268] @ (8002a10 ) 8002904: 881b ldrh r3, [r3, #0] 8002906: b2d9 uxtb r1, r3 8002908: 4b3e ldr r3, [pc, #248] @ (8002a04 ) 800290a: 881b ldrh r3, [r3, #0] 800290c: b2db uxtb r3, r3 800290e: 2000 movs r0, #0 8002910: 9001 str r0, [sp, #4] 8002912: 9300 str r3, [sp, #0] 8002914: 460b mov r3, r1 8002916: 2101 movs r1, #1 8002918: 2003 movs r0, #3 800291a: f001 f97d bl 8003c18 stCiclo=omchiusura3; 800291e: 4b36 ldr r3, [pc, #216] @ (80029f8 ) 8002920: 2224 movs r2, #36 @ 0x24 8002922: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002924: 4b2f ldr r3, [pc, #188] @ (80029e4 ) 8002926: 881b ldrh r3, [r3, #0] 8002928: f003 0302 and.w r3, r3, #2 800292c: 2b00 cmp r3, #0 800292e: f000 8272 beq.w 8002e16 8002932: 4b31 ldr r3, [pc, #196] @ (80029f8 ) 8002934: 2230 movs r2, #48 @ 0x30 8002936: 701a strb r2, [r3, #0] break; 8002938: e26d b.n 8002e16 case omchiusura3: if(ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){ 800293a: 4b2c ldr r3, [pc, #176] @ (80029ec ) 800293c: 889b ldrh r3, [r3, #4] 800293e: b2da uxtb r2, r3 8002940: 4b33 ldr r3, [pc, #204] @ (8002a10 ) 8002942: 881b ldrh r3, [r3, #0] 8002944: b2d9 uxtb r1, r3 8002946: 4b2f ldr r3, [pc, #188] @ (8002a04 ) 8002948: 881b ldrh r3, [r3, #0] 800294a: b2db uxtb r3, r3 800294c: 200a movs r0, #10 800294e: 9001 str r0, [sp, #4] 8002950: 9300 str r3, [sp, #0] 8002952: 460b mov r3, r1 8002954: 2101 movs r1, #1 8002956: 2003 movs r0, #3 8002958: f001 f95e bl 8003c18 800295c: 4603 mov r3, r0 800295e: 2b00 cmp r3, #0 8002960: d106 bne.n 8002970 rtCiclo=t1ch; 8002962: 4b2c ldr r3, [pc, #176] @ (8002a14 ) 8002964: 881a ldrh r2, [r3, #0] 8002966: 4b29 ldr r3, [pc, #164] @ (8002a0c ) 8002968: 801a strh r2, [r3, #0] stCiclo=omchiusura4; 800296a: 4b23 ldr r3, [pc, #140] @ (80029f8 ) 800296c: 2225 movs r2, #37 @ 0x25 800296e: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002970: 4b1c ldr r3, [pc, #112] @ (80029e4 ) 8002972: 881b ldrh r3, [r3, #0] 8002974: f003 0302 and.w r3, r3, #2 8002978: 2b00 cmp r3, #0 800297a: f000 824e beq.w 8002e1a 800297e: 4b1e ldr r3, [pc, #120] @ (80029f8 ) 8002980: 2230 movs r2, #48 @ 0x30 8002982: 701a strb r2, [r3, #0] break; 8002984: e249 b.n 8002e1a case omchiusura4: if(rtCiclo==0){ 8002986: 4b21 ldr r3, [pc, #132] @ (8002a0c ) 8002988: 881b ldrh r3, [r3, #0] 800298a: b29b uxth r3, r3 800298c: 2b00 cmp r3, #0 800298e: d11e bne.n 80029ce (void)ramp(M3,BW,m3pwmch,0,tramp,RAMPINIT); 8002990: 4b1f ldr r3, [pc, #124] @ (8002a10 ) 8002992: 881b ldrh r3, [r3, #0] 8002994: b2da uxtb r2, r3 8002996: 4b1b ldr r3, [pc, #108] @ (8002a04 ) 8002998: 881b ldrh r3, [r3, #0] 800299a: b2db uxtb r3, r3 800299c: 2100 movs r1, #0 800299e: 9101 str r1, [sp, #4] 80029a0: 9300 str r3, [sp, #0] 80029a2: 2300 movs r3, #0 80029a4: 2101 movs r1, #1 80029a6: 2003 movs r0, #3 80029a8: f001 f936 bl 8003c18 (void)ramp(M1,BW,m1pwmch,0,tramp,RAMPINIT); 80029ac: 4b14 ldr r3, [pc, #80] @ (8002a00 ) 80029ae: 881b ldrh r3, [r3, #0] 80029b0: b2da uxtb r2, r3 80029b2: 4b14 ldr r3, [pc, #80] @ (8002a04 ) 80029b4: 881b ldrh r3, [r3, #0] 80029b6: b2db uxtb r3, r3 80029b8: 2100 movs r1, #0 80029ba: 9101 str r1, [sp, #4] 80029bc: 9300 str r3, [sp, #0] 80029be: 2300 movs r3, #0 80029c0: 2101 movs r1, #1 80029c2: 2001 movs r0, #1 80029c4: f001 f928 bl 8003c18 stCiclo=omchiusura5; 80029c8: 4b0b ldr r3, [pc, #44] @ (80029f8 ) 80029ca: 2226 movs r2, #38 @ 0x26 80029cc: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80029ce: 4b05 ldr r3, [pc, #20] @ (80029e4 ) 80029d0: 881b ldrh r3, [r3, #0] 80029d2: f003 0302 and.w r3, r3, #2 80029d6: 2b00 cmp r3, #0 80029d8: f000 8221 beq.w 8002e1e 80029dc: 4b06 ldr r3, [pc, #24] @ (80029f8 ) 80029de: 2230 movs r2, #48 @ 0x30 80029e0: 701a strb r2, [r3, #0] break; 80029e2: e21c b.n 8002e1e 80029e4: 20000430 .word 0x20000430 80029e8: 20000433 .word 0x20000433 80029ec: 20000428 .word 0x20000428 80029f0: 20000420 .word 0x20000420 80029f4: 2000041c .word 0x2000041c 80029f8: 20000432 .word 0x20000432 80029fc: 20000422 .word 0x20000422 8002a00: 200003f8 .word 0x200003f8 8002a04: 2000041a .word 0x2000041a 8002a08: 20000416 .word 0x20000416 8002a0c: 200003f4 .word 0x200003f4 8002a10: 20000400 .word 0x20000400 8002a14: 20000410 .word 0x20000410 case omchiusura5: if((ramp(M3,BW,m3pwmch,0,tramp,RAMPRUN)==DONE)&&(ramp(M1,BW,m1pwmch,0,tramp,RAMPRUN)==DONE)){ 8002a18: 4b9e ldr r3, [pc, #632] @ (8002c94 ) 8002a1a: 881b ldrh r3, [r3, #0] 8002a1c: b2da uxtb r2, r3 8002a1e: 4b9e ldr r3, [pc, #632] @ (8002c98 ) 8002a20: 881b ldrh r3, [r3, #0] 8002a22: b2db uxtb r3, r3 8002a24: 210a movs r1, #10 8002a26: 9101 str r1, [sp, #4] 8002a28: 9300 str r3, [sp, #0] 8002a2a: 2300 movs r3, #0 8002a2c: 2101 movs r1, #1 8002a2e: 2003 movs r0, #3 8002a30: f001 f8f2 bl 8003c18 8002a34: 4603 mov r3, r0 8002a36: 2b00 cmp r3, #0 8002a38: d117 bne.n 8002a6a 8002a3a: 4b98 ldr r3, [pc, #608] @ (8002c9c ) 8002a3c: 881b ldrh r3, [r3, #0] 8002a3e: b2da uxtb r2, r3 8002a40: 4b95 ldr r3, [pc, #596] @ (8002c98 ) 8002a42: 881b ldrh r3, [r3, #0] 8002a44: b2db uxtb r3, r3 8002a46: 210a movs r1, #10 8002a48: 9101 str r1, [sp, #4] 8002a4a: 9300 str r3, [sp, #0] 8002a4c: 2300 movs r3, #0 8002a4e: 2101 movs r1, #1 8002a50: 2001 movs r0, #1 8002a52: f001 f8e1 bl 8003c18 8002a56: 4603 mov r3, r0 8002a58: 2b00 cmp r3, #0 8002a5a: d106 bne.n 8002a6a rtCiclo=twch; 8002a5c: 4b90 ldr r3, [pc, #576] @ (8002ca0 ) 8002a5e: 881a ldrh r2, [r3, #0] 8002a60: 4b90 ldr r3, [pc, #576] @ (8002ca4 ) 8002a62: 801a strh r2, [r3, #0] stCiclo=omchiusura6; 8002a64: 4b90 ldr r3, [pc, #576] @ (8002ca8 ) 8002a66: 2227 movs r2, #39 @ 0x27 8002a68: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002a6a: 4b90 ldr r3, [pc, #576] @ (8002cac ) 8002a6c: 881b ldrh r3, [r3, #0] 8002a6e: f003 0302 and.w r3, r3, #2 8002a72: 2b00 cmp r3, #0 8002a74: f000 81d5 beq.w 8002e22 8002a78: 4b8b ldr r3, [pc, #556] @ (8002ca8 ) 8002a7a: 2230 movs r2, #48 @ 0x30 8002a7c: 701a strb r2, [r3, #0] break; 8002a7e: e1d0 b.n 8002e22 case omchiusura6: if(rtCiclo==0){ 8002a80: 4b88 ldr r3, [pc, #544] @ (8002ca4 ) 8002a82: 881b ldrh r3, [r3, #0] 8002a84: b29b uxth r3, r3 8002a86: 2b00 cmp r3, #0 8002a88: d124 bne.n 8002ad4 (void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT); 8002a8a: 4b89 ldr r3, [pc, #548] @ (8002cb0 ) 8002a8c: 885b ldrh r3, [r3, #2] 8002a8e: b2da uxtb r2, r3 8002a90: 4b88 ldr r3, [pc, #544] @ (8002cb4 ) 8002a92: 881b ldrh r3, [r3, #0] 8002a94: b2d9 uxtb r1, r3 8002a96: 4b80 ldr r3, [pc, #512] @ (8002c98 ) 8002a98: 881b ldrh r3, [r3, #0] 8002a9a: b2db uxtb r3, r3 8002a9c: 2000 movs r0, #0 8002a9e: 9001 str r0, [sp, #4] 8002aa0: 9300 str r3, [sp, #0] 8002aa2: 460b mov r3, r1 8002aa4: 2100 movs r1, #0 8002aa6: 2002 movs r0, #2 8002aa8: f001 f8b6 bl 8003c18 (void)ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT); 8002aac: 4b80 ldr r3, [pc, #512] @ (8002cb0 ) 8002aae: 88db ldrh r3, [r3, #6] 8002ab0: b2da uxtb r2, r3 8002ab2: 4b81 ldr r3, [pc, #516] @ (8002cb8 ) 8002ab4: 881b ldrh r3, [r3, #0] 8002ab6: b2d9 uxtb r1, r3 8002ab8: 4b77 ldr r3, [pc, #476] @ (8002c98 ) 8002aba: 881b ldrh r3, [r3, #0] 8002abc: b2db uxtb r3, r3 8002abe: 2000 movs r0, #0 8002ac0: 9001 str r0, [sp, #4] 8002ac2: 9300 str r3, [sp, #0] 8002ac4: 460b mov r3, r1 8002ac6: 2101 movs r1, #1 8002ac8: 2004 movs r0, #4 8002aca: f001 f8a5 bl 8003c18 stCiclo=omchiusura7; 8002ace: 4b76 ldr r3, [pc, #472] @ (8002ca8 ) 8002ad0: 2228 movs r2, #40 @ 0x28 8002ad2: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002ad4: 4b75 ldr r3, [pc, #468] @ (8002cac ) 8002ad6: 881b ldrh r3, [r3, #0] 8002ad8: f003 0302 and.w r3, r3, #2 8002adc: 2b00 cmp r3, #0 8002ade: f000 81a2 beq.w 8002e26 8002ae2: 4b71 ldr r3, [pc, #452] @ (8002ca8 ) 8002ae4: 2230 movs r2, #48 @ 0x30 8002ae6: 701a strb r2, [r3, #0] break; 8002ae8: e19d b.n 8002e26 case omchiusura7: if((ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE)&&(ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE)){ 8002aea: 4b71 ldr r3, [pc, #452] @ (8002cb0 ) 8002aec: 885b ldrh r3, [r3, #2] 8002aee: b2da uxtb r2, r3 8002af0: 4b70 ldr r3, [pc, #448] @ (8002cb4 ) 8002af2: 881b ldrh r3, [r3, #0] 8002af4: b2d9 uxtb r1, r3 8002af6: 4b68 ldr r3, [pc, #416] @ (8002c98 ) 8002af8: 881b ldrh r3, [r3, #0] 8002afa: b2db uxtb r3, r3 8002afc: 200a movs r0, #10 8002afe: 9001 str r0, [sp, #4] 8002b00: 9300 str r3, [sp, #0] 8002b02: 460b mov r3, r1 8002b04: 2100 movs r1, #0 8002b06: 2002 movs r0, #2 8002b08: f001 f886 bl 8003c18 8002b0c: 4603 mov r3, r0 8002b0e: 2b00 cmp r3, #0 8002b10: d11a bne.n 8002b48 8002b12: 4b67 ldr r3, [pc, #412] @ (8002cb0 ) 8002b14: 88db ldrh r3, [r3, #6] 8002b16: b2da uxtb r2, r3 8002b18: 4b67 ldr r3, [pc, #412] @ (8002cb8 ) 8002b1a: 881b ldrh r3, [r3, #0] 8002b1c: b2d9 uxtb r1, r3 8002b1e: 4b5e ldr r3, [pc, #376] @ (8002c98 ) 8002b20: 881b ldrh r3, [r3, #0] 8002b22: b2db uxtb r3, r3 8002b24: 200a movs r0, #10 8002b26: 9001 str r0, [sp, #4] 8002b28: 9300 str r3, [sp, #0] 8002b2a: 460b mov r3, r1 8002b2c: 2101 movs r1, #1 8002b2e: 2004 movs r0, #4 8002b30: f001 f872 bl 8003c18 8002b34: 4603 mov r3, r0 8002b36: 2b00 cmp r3, #0 8002b38: d106 bne.n 8002b48 rtCiclo=t3ch; 8002b3a: 4b60 ldr r3, [pc, #384] @ (8002cbc ) 8002b3c: 881a ldrh r2, [r3, #0] 8002b3e: 4b59 ldr r3, [pc, #356] @ (8002ca4 ) 8002b40: 801a strh r2, [r3, #0] stCiclo=omchiusura8; 8002b42: 4b59 ldr r3, [pc, #356] @ (8002ca8 ) 8002b44: 2229 movs r2, #41 @ 0x29 8002b46: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002b48: 4b58 ldr r3, [pc, #352] @ (8002cac ) 8002b4a: 881b ldrh r3, [r3, #0] 8002b4c: f003 0302 and.w r3, r3, #2 8002b50: 2b00 cmp r3, #0 8002b52: f000 816a beq.w 8002e2a 8002b56: 4b54 ldr r3, [pc, #336] @ (8002ca8 ) 8002b58: 2230 movs r2, #48 @ 0x30 8002b5a: 701a strb r2, [r3, #0] break; 8002b5c: e165 b.n 8002e2a case omchiusura8: if(rtCiclo==0){ 8002b5e: 4b51 ldr r3, [pc, #324] @ (8002ca4 ) 8002b60: 881b ldrh r3, [r3, #0] 8002b62: b29b uxth r3, r3 8002b64: 2b00 cmp r3, #0 8002b66: d110 bne.n 8002b8a (void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT); 8002b68: 4b52 ldr r3, [pc, #328] @ (8002cb4 ) 8002b6a: 881b ldrh r3, [r3, #0] 8002b6c: b2da uxtb r2, r3 8002b6e: 4b4a ldr r3, [pc, #296] @ (8002c98 ) 8002b70: 881b ldrh r3, [r3, #0] 8002b72: b2db uxtb r3, r3 8002b74: 2100 movs r1, #0 8002b76: 9101 str r1, [sp, #4] 8002b78: 9300 str r3, [sp, #0] 8002b7a: 2300 movs r3, #0 8002b7c: 2100 movs r1, #0 8002b7e: 2002 movs r0, #2 8002b80: f001 f84a bl 8003c18 stCiclo=omchiusura9; 8002b84: 4b48 ldr r3, [pc, #288] @ (8002ca8 ) 8002b86: 222a movs r2, #42 @ 0x2a 8002b88: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002b8a: 4b48 ldr r3, [pc, #288] @ (8002cac ) 8002b8c: 881b ldrh r3, [r3, #0] 8002b8e: f003 0302 and.w r3, r3, #2 8002b92: 2b00 cmp r3, #0 8002b94: f000 814b beq.w 8002e2e 8002b98: 4b43 ldr r3, [pc, #268] @ (8002ca8 ) 8002b9a: 2230 movs r2, #48 @ 0x30 8002b9c: 701a strb r2, [r3, #0] break; 8002b9e: e146 b.n 8002e2e case omchiusura9: if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){ 8002ba0: 4b44 ldr r3, [pc, #272] @ (8002cb4 ) 8002ba2: 881b ldrh r3, [r3, #0] 8002ba4: b2da uxtb r2, r3 8002ba6: 4b3c ldr r3, [pc, #240] @ (8002c98 ) 8002ba8: 881b ldrh r3, [r3, #0] 8002baa: b2db uxtb r3, r3 8002bac: 210a movs r1, #10 8002bae: 9101 str r1, [sp, #4] 8002bb0: 9300 str r3, [sp, #0] 8002bb2: 2300 movs r3, #0 8002bb4: 2100 movs r1, #0 8002bb6: 2002 movs r0, #2 8002bb8: f001 f82e bl 8003c18 8002bbc: 4603 mov r3, r0 8002bbe: 2b00 cmp r3, #0 8002bc0: d106 bne.n 8002bd0 rtCiclo=t2ch; 8002bc2: 4b3f ldr r3, [pc, #252] @ (8002cc0 ) 8002bc4: 881a ldrh r2, [r3, #0] 8002bc6: 4b37 ldr r3, [pc, #220] @ (8002ca4 ) 8002bc8: 801a strh r2, [r3, #0] stCiclo=omchiusura10; 8002bca: 4b37 ldr r3, [pc, #220] @ (8002ca8 ) 8002bcc: 222b movs r2, #43 @ 0x2b 8002bce: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002bd0: 4b36 ldr r3, [pc, #216] @ (8002cac ) 8002bd2: 881b ldrh r3, [r3, #0] 8002bd4: f003 0302 and.w r3, r3, #2 8002bd8: 2b00 cmp r3, #0 8002bda: f000 812a beq.w 8002e32 8002bde: 4b32 ldr r3, [pc, #200] @ (8002ca8 ) 8002be0: 2230 movs r2, #48 @ 0x30 8002be2: 701a strb r2, [r3, #0] break; 8002be4: e125 b.n 8002e32 case omchiusura10: if(rtCiclo==0){ 8002be6: 4b2f ldr r3, [pc, #188] @ (8002ca4 ) 8002be8: 881b ldrh r3, [r3, #0] 8002bea: b29b uxth r3, r3 8002bec: 2b00 cmp r3, #0 8002bee: d110 bne.n 8002c12 (void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT); 8002bf0: 4b31 ldr r3, [pc, #196] @ (8002cb8 ) 8002bf2: 881b ldrh r3, [r3, #0] 8002bf4: b2da uxtb r2, r3 8002bf6: 4b28 ldr r3, [pc, #160] @ (8002c98 ) 8002bf8: 881b ldrh r3, [r3, #0] 8002bfa: b2db uxtb r3, r3 8002bfc: 2100 movs r1, #0 8002bfe: 9101 str r1, [sp, #4] 8002c00: 9300 str r3, [sp, #0] 8002c02: 2300 movs r3, #0 8002c04: 2101 movs r1, #1 8002c06: 2004 movs r0, #4 8002c08: f001 f806 bl 8003c18 stCiclo=omchiusura11; 8002c0c: 4b26 ldr r3, [pc, #152] @ (8002ca8 ) 8002c0e: 222c movs r2, #44 @ 0x2c 8002c10: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002c12: 4b26 ldr r3, [pc, #152] @ (8002cac ) 8002c14: 881b ldrh r3, [r3, #0] 8002c16: f003 0302 and.w r3, r3, #2 8002c1a: 2b00 cmp r3, #0 8002c1c: f000 810b beq.w 8002e36 8002c20: 4b21 ldr r3, [pc, #132] @ (8002ca8 ) 8002c22: 2230 movs r2, #48 @ 0x30 8002c24: 701a strb r2, [r3, #0] break; 8002c26: e106 b.n 8002e36 case omchiusura11: if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){ 8002c28: 4b23 ldr r3, [pc, #140] @ (8002cb8 ) 8002c2a: 881b ldrh r3, [r3, #0] 8002c2c: b2da uxtb r2, r3 8002c2e: 4b1a ldr r3, [pc, #104] @ (8002c98 ) 8002c30: 881b ldrh r3, [r3, #0] 8002c32: b2db uxtb r3, r3 8002c34: 210a movs r1, #10 8002c36: 9101 str r1, [sp, #4] 8002c38: 9300 str r3, [sp, #0] 8002c3a: 2300 movs r3, #0 8002c3c: 2101 movs r1, #1 8002c3e: 2004 movs r0, #4 8002c40: f000 ffea bl 8003c18 8002c44: 4603 mov r3, r0 8002c46: 2b00 cmp r3, #0 8002c48: d106 bne.n 8002c58 rtCiclo=twch; 8002c4a: 4b15 ldr r3, [pc, #84] @ (8002ca0 ) 8002c4c: 881a ldrh r2, [r3, #0] 8002c4e: 4b15 ldr r3, [pc, #84] @ (8002ca4 ) 8002c50: 801a strh r2, [r3, #0] stCiclo=omchiusura14; 8002c52: 4b15 ldr r3, [pc, #84] @ (8002ca8 ) 8002c54: 222f movs r2, #47 @ 0x2f 8002c56: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002c58: 4b14 ldr r3, [pc, #80] @ (8002cac ) 8002c5a: 881b ldrh r3, [r3, #0] 8002c5c: f003 0302 and.w r3, r3, #2 8002c60: 2b00 cmp r3, #0 8002c62: f000 80ea beq.w 8002e3a 8002c66: 4b10 ldr r3, [pc, #64] @ (8002ca8 ) 8002c68: 2230 movs r2, #48 @ 0x30 8002c6a: 701a strb r2, [r3, #0] break; 8002c6c: e0e5 b.n 8002e3a case omchiusura12: if(rtCiclo==0){ 8002c6e: 4b0d ldr r3, [pc, #52] @ (8002ca4 ) 8002c70: 881b ldrh r3, [r3, #0] 8002c72: b29b uxth r3, r3 8002c74: 2b00 cmp r3, #0 8002c76: d102 bne.n 8002c7e //(void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT); stCiclo=omchiusura14; 8002c78: 4b0b ldr r3, [pc, #44] @ (8002ca8 ) 8002c7a: 222f movs r2, #47 @ 0x2f 8002c7c: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002c7e: 4b0b ldr r3, [pc, #44] @ (8002cac ) 8002c80: 881b ldrh r3, [r3, #0] 8002c82: f003 0302 and.w r3, r3, #2 8002c86: 2b00 cmp r3, #0 8002c88: f000 80d9 beq.w 8002e3e 8002c8c: 4b06 ldr r3, [pc, #24] @ (8002ca8 ) 8002c8e: 2230 movs r2, #48 @ 0x30 8002c90: 701a strb r2, [r3, #0] break; 8002c92: e0d4 b.n 8002e3e 8002c94: 20000400 .word 0x20000400 8002c98: 2000041a .word 0x2000041a 8002c9c: 200003f8 .word 0x200003f8 8002ca0: 20000418 .word 0x20000418 8002ca4: 200003f4 .word 0x200003f4 8002ca8: 20000432 .word 0x20000432 8002cac: 20000430 .word 0x20000430 8002cb0: 20000428 .word 0x20000428 8002cb4: 200003fc .word 0x200003fc 8002cb8: 20000404 .word 0x20000404 8002cbc: 20000414 .word 0x20000414 8002cc0: 20000412 .word 0x20000412 case omchiusura13: if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){ 8002cc4: 4b63 ldr r3, [pc, #396] @ (8002e54 ) 8002cc6: 881b ldrh r3, [r3, #0] 8002cc8: b2da uxtb r2, r3 8002cca: 4b63 ldr r3, [pc, #396] @ (8002e58 ) 8002ccc: 881b ldrh r3, [r3, #0] 8002cce: b2db uxtb r3, r3 8002cd0: 210a movs r1, #10 8002cd2: 9101 str r1, [sp, #4] 8002cd4: 9300 str r3, [sp, #0] 8002cd6: 2300 movs r3, #0 8002cd8: 2101 movs r1, #1 8002cda: 2004 movs r0, #4 8002cdc: f000 ff9c bl 8003c18 8002ce0: 4603 mov r3, r0 8002ce2: 2b00 cmp r3, #0 8002ce4: d106 bne.n 8002cf4 rtCiclo=twch; 8002ce6: 4b5d ldr r3, [pc, #372] @ (8002e5c ) 8002ce8: 881a ldrh r2, [r3, #0] 8002cea: 4b5d ldr r3, [pc, #372] @ (8002e60 ) 8002cec: 801a strh r2, [r3, #0] stCiclo=omchiusura14; 8002cee: 4b5d ldr r3, [pc, #372] @ (8002e64 ) 8002cf0: 222f movs r2, #47 @ 0x2f 8002cf2: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002cf4: 4b5c ldr r3, [pc, #368] @ (8002e68 ) 8002cf6: 881b ldrh r3, [r3, #0] 8002cf8: f003 0302 and.w r3, r3, #2 8002cfc: 2b00 cmp r3, #0 8002cfe: f000 80a0 beq.w 8002e42 8002d02: 4b58 ldr r3, [pc, #352] @ (8002e64 ) 8002d04: 2230 movs r2, #48 @ 0x30 8002d06: 701a strb r2, [r3, #0] break; 8002d08: e09b b.n 8002e42 case omchiusura14: if((rtCiclo==0)&&(pulsanti==0)){ 8002d0a: 4b55 ldr r3, [pc, #340] @ (8002e60 ) 8002d0c: 881b ldrh r3, [r3, #0] 8002d0e: b29b uxth r3, r3 8002d10: 2b00 cmp r3, #0 8002d12: d109 bne.n 8002d28 8002d14: 4b55 ldr r3, [pc, #340] @ (8002e6c ) 8002d16: 781b ldrb r3, [r3, #0] 8002d18: 2b00 cmp r3, #0 8002d1a: d105 bne.n 8002d28 stBuz=bzoff; 8002d1c: 4b54 ldr r3, [pc, #336] @ (8002e70 ) 8002d1e: 2200 movs r2, #0 8002d20: 701a strb r2, [r3, #0] stCiclo=omchiuso; 8002d22: 4b50 ldr r3, [pc, #320] @ (8002e64 ) 8002d24: 2200 movs r2, #0 8002d26: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8002d28: 4b4f ldr r3, [pc, #316] @ (8002e68 ) 8002d2a: 881b ldrh r3, [r3, #0] 8002d2c: f003 0302 and.w r3, r3, #2 8002d30: 2b00 cmp r3, #0 8002d32: f000 8088 beq.w 8002e46 8002d36: 4b4b ldr r3, [pc, #300] @ (8002e64 ) 8002d38: 2230 movs r2, #48 @ 0x30 8002d3a: 701a strb r2, [r3, #0] break; 8002d3c: e083 b.n 8002e46 case omstopchiusura: SetMotPerc(M1,FW,0); 8002d3e: 2200 movs r2, #0 8002d40: 2100 movs r1, #0 8002d42: 2001 movs r0, #1 8002d44: f000 fde8 bl 8003918 SetMotPerc(M2,FW,0); 8002d48: 2200 movs r2, #0 8002d4a: 2100 movs r1, #0 8002d4c: 2002 movs r0, #2 8002d4e: f000 fde3 bl 8003918 SetMotPerc(M3,FW,0); 8002d52: 2200 movs r2, #0 8002d54: 2100 movs r1, #0 8002d56: 2003 movs r0, #3 8002d58: f000 fdde bl 8003918 SetMotPerc(M4,FW,0); 8002d5c: 2200 movs r2, #0 8002d5e: 2100 movs r1, #0 8002d60: 2004 movs r0, #4 8002d62: f000 fdd9 bl 8003918 if(pulsanti==0){ 8002d66: 4b41 ldr r3, [pc, #260] @ (8002e6c ) 8002d68: 781b ldrb r3, [r3, #0] 8002d6a: 2b00 cmp r3, #0 8002d6c: d16d bne.n 8002e4a stBuz=bzoff; 8002d6e: 4b40 ldr r3, [pc, #256] @ (8002e70 ) 8002d70: 2200 movs r2, #0 8002d72: 701a strb r2, [r3, #0] stCiclo=omaperto; 8002d74: 4b3b ldr r3, [pc, #236] @ (8002e64 ) 8002d76: 2221 movs r2, #33 @ 0x21 8002d78: 701a strb r2, [r3, #0] stPulsanti&=(~P1STOP); 8002d7a: 4b3b ldr r3, [pc, #236] @ (8002e68 ) 8002d7c: 881b ldrh r3, [r3, #0] 8002d7e: f023 0302 bic.w r3, r3, #2 8002d82: b29a uxth r2, r3 8002d84: 4b38 ldr r3, [pc, #224] @ (8002e68 ) 8002d86: 801a strh r2, [r3, #0] } break; 8002d88: e05f b.n 8002e4a break; 8002d8a: bf00 nop 8002d8c: e05e b.n 8002e4c break; 8002d8e: bf00 nop 8002d90: e05c b.n 8002e4c break; 8002d92: bf00 nop 8002d94: e05a b.n 8002e4c break; 8002d96: bf00 nop 8002d98: e058 b.n 8002e4c break; 8002d9a: bf00 nop 8002d9c: e056 b.n 8002e4c break; 8002d9e: bf00 nop 8002da0: e054 b.n 8002e4c break; 8002da2: bf00 nop 8002da4: e052 b.n 8002e4c break; 8002da6: bf00 nop 8002da8: e050 b.n 8002e4c break; 8002daa: bf00 nop 8002dac: e04e b.n 8002e4c break; 8002dae: bf00 nop 8002db0: e04c b.n 8002e4c break; 8002db2: bf00 nop 8002db4: e04a b.n 8002e4c break; 8002db6: bf00 nop 8002db8: e048 b.n 8002e4c break; 8002dba: bf00 nop 8002dbc: e046 b.n 8002e4c break; 8002dbe: bf00 nop 8002dc0: e044 b.n 8002e4c break; 8002dc2: bf00 nop 8002dc4: e042 b.n 8002e4c break; 8002dc6: bf00 nop 8002dc8: e040 b.n 8002e4c break; 8002dca: bf00 nop 8002dcc: e03e b.n 8002e4c break; 8002dce: bf00 nop 8002dd0: e03c b.n 8002e4c break; 8002dd2: bf00 nop 8002dd4: e03a b.n 8002e4c break; 8002dd6: bf00 nop 8002dd8: e038 b.n 8002e4c break; 8002dda: bf00 nop 8002ddc: e036 b.n 8002e4c break; 8002dde: bf00 nop 8002de0: e034 b.n 8002e4c break; 8002de2: bf00 nop 8002de4: e032 b.n 8002e4c break; 8002de6: bf00 nop 8002de8: e030 b.n 8002e4c break; 8002dea: bf00 nop 8002dec: e02e b.n 8002e4c break; 8002dee: bf00 nop 8002df0: e02c b.n 8002e4c break; 8002df2: bf00 nop 8002df4: e02a b.n 8002e4c break; 8002df6: bf00 nop 8002df8: e028 b.n 8002e4c break; 8002dfa: bf00 nop 8002dfc: e026 b.n 8002e4c break; 8002dfe: bf00 nop 8002e00: e024 b.n 8002e4c break; 8002e02: bf00 nop 8002e04: e022 b.n 8002e4c break; 8002e06: bf00 nop 8002e08: e020 b.n 8002e4c break; 8002e0a: bf00 nop 8002e0c: e01e b.n 8002e4c break; 8002e0e: bf00 nop 8002e10: e01c b.n 8002e4c break; 8002e12: bf00 nop 8002e14: e01a b.n 8002e4c break; 8002e16: bf00 nop 8002e18: e018 b.n 8002e4c break; 8002e1a: bf00 nop 8002e1c: e016 b.n 8002e4c break; 8002e1e: bf00 nop 8002e20: e014 b.n 8002e4c break; 8002e22: bf00 nop 8002e24: e012 b.n 8002e4c break; 8002e26: bf00 nop 8002e28: e010 b.n 8002e4c break; 8002e2a: bf00 nop 8002e2c: e00e b.n 8002e4c break; 8002e2e: bf00 nop 8002e30: e00c b.n 8002e4c break; 8002e32: bf00 nop 8002e34: e00a b.n 8002e4c break; 8002e36: bf00 nop 8002e38: e008 b.n 8002e4c break; 8002e3a: bf00 nop 8002e3c: e006 b.n 8002e4c break; 8002e3e: bf00 nop 8002e40: e004 b.n 8002e4c break; 8002e42: bf00 nop 8002e44: e002 b.n 8002e4c break; 8002e46: bf00 nop 8002e48: e000 b.n 8002e4c break; 8002e4a: bf00 nop } } 8002e4c: bf00 nop 8002e4e: 46bd mov sp, r7 8002e50: bd80 pop {r7, pc} 8002e52: bf00 nop 8002e54: 20000404 .word 0x20000404 8002e58: 2000041a .word 0x2000041a 8002e5c: 20000418 .word 0x20000418 8002e60: 200003f4 .word 0x200003f4 8002e64: 20000432 .word 0x20000432 8002e68: 20000430 .word 0x20000430 8002e6c: 200003e8 .word 0x200003e8 8002e70: 20000433 .word 0x20000433 08002e74
: /** * @brief The application entry point. * @retval int */ int main(void) { 8002e74: b580 push {r7, lr} 8002e76: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8002e78: f001 f9bc bl 80041f4 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8002e7c: f000 f850 bl 8002f20 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8002e80: f000 fab2 bl 80033e8 MX_DMA_Init(); 8002e84: f000 fa92 bl 80033ac MX_USB_DEVICE_Init(); 8002e88: f009 fe6c bl 800cb64 MX_TIM2_Init(); 8002e8c: f000 f91e bl 80030cc MX_TIM4_Init(); 8002e90: f000 f9c0 bl 8003214 MX_ADC1_Init(); 8002e94: f000 f8a2 bl 8002fdc MX_USART1_UART_Init(); 8002e98: f000 fa5e bl 8003358 /* USER CODE BEGIN 2 */ HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS); 8002e9c: 2205 movs r2, #5 8002e9e: 491c ldr r1, [pc, #112] @ (8002f10 ) 8002ea0: 481c ldr r0, [pc, #112] @ (8002f14 ) 8002ea2: f001 fae1 bl 8004468 StopMot(timMot1,FWMot1); 8002ea6: 2100 movs r1, #0 8002ea8: 481b ldr r0, [pc, #108] @ (8002f18 ) 8002eaa: f000 fb62 bl 8003572 StopMot(timMot1,BWMot1); 8002eae: 2104 movs r1, #4 8002eb0: 4819 ldr r0, [pc, #100] @ (8002f18 ) 8002eb2: f000 fb5e bl 8003572 StopMot(timMot2,FWMot2); 8002eb6: 2108 movs r1, #8 8002eb8: 4817 ldr r0, [pc, #92] @ (8002f18 ) 8002eba: f000 fb5a bl 8003572 StopMot(timMot2,BWMot2); 8002ebe: 210c movs r1, #12 8002ec0: 4815 ldr r0, [pc, #84] @ (8002f18 ) 8002ec2: f000 fb56 bl 8003572 StopMot(timMot3,FWMot3); 8002ec6: 2100 movs r1, #0 8002ec8: 4814 ldr r0, [pc, #80] @ (8002f1c ) 8002eca: f000 fb52 bl 8003572 StopMot(timMot3,BWMot3); 8002ece: 2104 movs r1, #4 8002ed0: 4812 ldr r0, [pc, #72] @ (8002f1c ) 8002ed2: f000 fb4e bl 8003572 StopMot(timMot4,FWMot4); 8002ed6: 2108 movs r1, #8 8002ed8: 4810 ldr r0, [pc, #64] @ (8002f1c ) 8002eda: f000 fb4a bl 8003572 StopMot(timMot4,BWMot4); 8002ede: 210c movs r1, #12 8002ee0: 480e ldr r0, [pc, #56] @ (8002f1c ) 8002ee2: f000 fb46 bl 8003572 //CDC_Transmit_FS((uint8_t*)"Start\r\n", 7); //while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY); if (EE_Init() != EE_OK){ 8002ee6: f7fe f967 bl 80011b8 8002eea: 4603 mov r3, r0 8002eec: 2b00 cmp r3, #0 8002eee: d001 beq.n 8002ef4 for(;;);//errore eeprom 8002ef0: bf00 nop 8002ef2: e7fd b.n 8002ef0 } loadEE(); 8002ef4: f7fe f9fc bl 80012f0 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1){ manageCDC(); 8002ef8: f7fd fa80 bl 80003fc manageAdc(); 8002efc: f7fd f92e bl 800015c managePulsanti(); 8002f00: f7fe fc46 bl 8001790 manageCiclo(); 8002f04: f7fe fd90 bl 8001a28 debug(); 8002f08: f7fd ff60 bl 8000dcc manageCDC(); 8002f0c: bf00 nop 8002f0e: e7f3 b.n 8002ef8 8002f10: 200001f4 .word 0x200001f4 8002f14: 2000029c .word 0x2000029c 8002f18: 20000310 .word 0x20000310 8002f1c: 20000358 .word 0x20000358 08002f20 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8002f20: b580 push {r7, lr} 8002f22: b094 sub sp, #80 @ 0x50 8002f24: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8002f26: f107 0328 add.w r3, r7, #40 @ 0x28 8002f2a: 2228 movs r2, #40 @ 0x28 8002f2c: 2100 movs r1, #0 8002f2e: 4618 mov r0, r3 8002f30: f00a fb54 bl 800d5dc RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8002f34: f107 0314 add.w r3, r7, #20 8002f38: 2200 movs r2, #0 8002f3a: 601a str r2, [r3, #0] 8002f3c: 605a str r2, [r3, #4] 8002f3e: 609a str r2, [r3, #8] 8002f40: 60da str r2, [r3, #12] 8002f42: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002f44: 1d3b adds r3, r7, #4 8002f46: 2200 movs r2, #0 8002f48: 601a str r2, [r3, #0] 8002f4a: 605a str r2, [r3, #4] 8002f4c: 609a str r2, [r3, #8] 8002f4e: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8002f50: 2301 movs r3, #1 8002f52: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8002f54: f44f 3380 mov.w r3, #65536 @ 0x10000 8002f58: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 8002f5a: 2300 movs r3, #0 8002f5c: 633b str r3, [r7, #48] @ 0x30 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8002f5e: 2301 movs r3, #1 8002f60: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8002f62: 2302 movs r3, #2 8002f64: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 8002f66: f44f 3380 mov.w r3, #65536 @ 0x10000 8002f6a: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; 8002f6c: f44f 1380 mov.w r3, #1048576 @ 0x100000 8002f70: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002f72: f107 0328 add.w r3, r7, #40 @ 0x28 8002f76: 4618 mov r0, r3 8002f78: f004 f998 bl 80072ac 8002f7c: 4603 mov r3, r0 8002f7e: 2b00 cmp r3, #0 8002f80: d001 beq.n 8002f86 { Error_Handler(); 8002f82: f000 fadb bl 800353c } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002f86: 230f movs r3, #15 8002f88: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8002f8a: 2302 movs r3, #2 8002f8c: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8002f8e: 2300 movs r3, #0 8002f90: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8002f92: f44f 6380 mov.w r3, #1024 @ 0x400 8002f96: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8002f98: 2300 movs r3, #0 8002f9a: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8002f9c: f107 0314 add.w r3, r7, #20 8002fa0: 2102 movs r1, #2 8002fa2: 4618 mov r0, r3 8002fa4: f004 fc04 bl 80077b0 8002fa8: 4603 mov r3, r0 8002faa: 2b00 cmp r3, #0 8002fac: d001 beq.n 8002fb2 { Error_Handler(); 8002fae: f000 fac5 bl 800353c } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB; 8002fb2: 2312 movs r3, #18 8002fb4: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 8002fb6: f44f 4300 mov.w r3, #32768 @ 0x8000 8002fba: 60fb str r3, [r7, #12] PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; 8002fbc: 2300 movs r3, #0 8002fbe: 613b str r3, [r7, #16] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8002fc0: 1d3b adds r3, r7, #4 8002fc2: 4618 mov r0, r3 8002fc4: f004 fd84 bl 8007ad0 8002fc8: 4603 mov r3, r0 8002fca: 2b00 cmp r3, #0 8002fcc: d001 beq.n 8002fd2 { Error_Handler(); 8002fce: f000 fab5 bl 800353c } } 8002fd2: bf00 nop 8002fd4: 3750 adds r7, #80 @ 0x50 8002fd6: 46bd mov sp, r7 8002fd8: bd80 pop {r7, pc} ... 08002fdc : * @brief ADC1 Initialization Function * @param None * @retval None */ static void MX_ADC1_Init(void) { 8002fdc: b580 push {r7, lr} 8002fde: b084 sub sp, #16 8002fe0: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 8002fe2: 1d3b adds r3, r7, #4 8002fe4: 2200 movs r2, #0 8002fe6: 601a str r2, [r3, #0] 8002fe8: 605a str r2, [r3, #4] 8002fea: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 8002fec: 4b35 ldr r3, [pc, #212] @ (80030c4 ) 8002fee: 4a36 ldr r2, [pc, #216] @ (80030c8 ) 8002ff0: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 8002ff2: 4b34 ldr r3, [pc, #208] @ (80030c4 ) 8002ff4: f44f 7280 mov.w r2, #256 @ 0x100 8002ff8: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; 8002ffa: 4b32 ldr r3, [pc, #200] @ (80030c4 ) 8002ffc: 2201 movs r2, #1 8002ffe: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 8003000: 4b30 ldr r3, [pc, #192] @ (80030c4 ) 8003002: 2200 movs r2, #0 8003004: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 8003006: 4b2f ldr r3, [pc, #188] @ (80030c4 ) 8003008: f44f 2260 mov.w r2, #917504 @ 0xe0000 800300c: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 800300e: 4b2d ldr r3, [pc, #180] @ (80030c4 ) 8003010: 2200 movs r2, #0 8003012: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 5; 8003014: 4b2b ldr r3, [pc, #172] @ (80030c4 ) 8003016: 2205 movs r2, #5 8003018: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 800301a: 482a ldr r0, [pc, #168] @ (80030c4 ) 800301c: f001 f94c bl 80042b8 8003020: 4603 mov r3, r0 8003022: 2b00 cmp r3, #0 8003024: d001 beq.n 800302a { Error_Handler(); 8003026: f000 fa89 bl 800353c } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_4; 800302a: 2304 movs r3, #4 800302c: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 800302e: 2301 movs r3, #1 8003030: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5; 8003032: 2303 movs r3, #3 8003034: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8003036: 1d3b adds r3, r7, #4 8003038: 4619 mov r1, r3 800303a: 4822 ldr r0, [pc, #136] @ (80030c4 ) 800303c: f001 fb0e bl 800465c 8003040: 4603 mov r3, r0 8003042: 2b00 cmp r3, #0 8003044: d001 beq.n 800304a { Error_Handler(); 8003046: f000 fa79 bl 800353c } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_5; 800304a: 2305 movs r3, #5 800304c: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_2; 800304e: 2302 movs r3, #2 8003050: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8003052: 1d3b adds r3, r7, #4 8003054: 4619 mov r1, r3 8003056: 481b ldr r0, [pc, #108] @ (80030c4 ) 8003058: f001 fb00 bl 800465c 800305c: 4603 mov r3, r0 800305e: 2b00 cmp r3, #0 8003060: d001 beq.n 8003066 { Error_Handler(); 8003062: f000 fa6b bl 800353c } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_6; 8003066: 2306 movs r3, #6 8003068: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_3; 800306a: 2303 movs r3, #3 800306c: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800306e: 1d3b adds r3, r7, #4 8003070: 4619 mov r1, r3 8003072: 4814 ldr r0, [pc, #80] @ (80030c4 ) 8003074: f001 faf2 bl 800465c 8003078: 4603 mov r3, r0 800307a: 2b00 cmp r3, #0 800307c: d001 beq.n 8003082 { Error_Handler(); 800307e: f000 fa5d bl 800353c } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_7; 8003082: 2307 movs r3, #7 8003084: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_4; 8003086: 2304 movs r3, #4 8003088: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800308a: 1d3b adds r3, r7, #4 800308c: 4619 mov r1, r3 800308e: 480d ldr r0, [pc, #52] @ (80030c4 ) 8003090: f001 fae4 bl 800465c 8003094: 4603 mov r3, r0 8003096: 2b00 cmp r3, #0 8003098: d001 beq.n 800309e { Error_Handler(); 800309a: f000 fa4f bl 800353c } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 800309e: 2308 movs r3, #8 80030a0: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_5; 80030a2: 2305 movs r3, #5 80030a4: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80030a6: 1d3b adds r3, r7, #4 80030a8: 4619 mov r1, r3 80030aa: 4806 ldr r0, [pc, #24] @ (80030c4 ) 80030ac: f001 fad6 bl 800465c 80030b0: 4603 mov r3, r0 80030b2: 2b00 cmp r3, #0 80030b4: d001 beq.n 80030ba { Error_Handler(); 80030b6: f000 fa41 bl 800353c } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 80030ba: bf00 nop 80030bc: 3710 adds r7, #16 80030be: 46bd mov sp, r7 80030c0: bd80 pop {r7, pc} 80030c2: bf00 nop 80030c4: 2000029c .word 0x2000029c 80030c8: 40012400 .word 0x40012400 080030cc : * @brief TIM2 Initialization Function * @param None * @retval None */ static void MX_TIM2_Init(void) { 80030cc: b580 push {r7, lr} 80030ce: b08e sub sp, #56 @ 0x38 80030d0: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 80030d2: f107 0328 add.w r3, r7, #40 @ 0x28 80030d6: 2200 movs r2, #0 80030d8: 601a str r2, [r3, #0] 80030da: 605a str r2, [r3, #4] 80030dc: 609a str r2, [r3, #8] 80030de: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 80030e0: f107 0320 add.w r3, r7, #32 80030e4: 2200 movs r2, #0 80030e6: 601a str r2, [r3, #0] 80030e8: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 80030ea: 1d3b adds r3, r7, #4 80030ec: 2200 movs r2, #0 80030ee: 601a str r2, [r3, #0] 80030f0: 605a str r2, [r3, #4] 80030f2: 609a str r2, [r3, #8] 80030f4: 60da str r2, [r3, #12] 80030f6: 611a str r2, [r3, #16] 80030f8: 615a str r2, [r3, #20] 80030fa: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; 80030fc: 4b44 ldr r3, [pc, #272] @ (8003210 ) 80030fe: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 8003102: 601a str r2, [r3, #0] htim2.Init.Prescaler = 0; 8003104: 4b42 ldr r3, [pc, #264] @ (8003210 ) 8003106: 2200 movs r2, #0 8003108: 605a str r2, [r3, #4] htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 800310a: 4b41 ldr r3, [pc, #260] @ (8003210 ) 800310c: 2200 movs r2, #0 800310e: 609a str r2, [r3, #8] htim2.Init.Period = 17999; 8003110: 4b3f ldr r3, [pc, #252] @ (8003210 ) 8003112: f244 624f movw r2, #17999 @ 0x464f 8003116: 60da str r2, [r3, #12] htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 8003118: 4b3d ldr r3, [pc, #244] @ (8003210 ) 800311a: 2200 movs r2, #0 800311c: 611a str r2, [r3, #16] htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 800311e: 4b3c ldr r3, [pc, #240] @ (8003210 ) 8003120: 2200 movs r2, #0 8003122: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim2) != HAL_OK) 8003124: 483a ldr r0, [pc, #232] @ (8003210 ) 8003126: f004 fd89 bl 8007c3c 800312a: 4603 mov r3, r0 800312c: 2b00 cmp r3, #0 800312e: d001 beq.n 8003134 { Error_Handler(); 8003130: f000 fa04 bl 800353c } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 8003134: f44f 5380 mov.w r3, #4096 @ 0x1000 8003138: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) 800313a: f107 0328 add.w r3, r7, #40 @ 0x28 800313e: 4619 mov r1, r3 8003140: 4833 ldr r0, [pc, #204] @ (8003210 ) 8003142: f004 ffeb bl 800811c 8003146: 4603 mov r3, r0 8003148: 2b00 cmp r3, #0 800314a: d001 beq.n 8003150 { Error_Handler(); 800314c: f000 f9f6 bl 800353c } if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 8003150: 482f ldr r0, [pc, #188] @ (8003210 ) 8003152: f004 fdc2 bl 8007cda 8003156: 4603 mov r3, r0 8003158: 2b00 cmp r3, #0 800315a: d001 beq.n 8003160 { Error_Handler(); 800315c: f000 f9ee bl 800353c } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8003160: 2300 movs r3, #0 8003162: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8003164: 2300 movs r3, #0 8003166: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 8003168: f107 0320 add.w r3, r7, #32 800316c: 4619 mov r1, r3 800316e: 4828 ldr r0, [pc, #160] @ (8003210 ) 8003170: f005 fb74 bl 800885c 8003174: 4603 mov r3, r0 8003176: 2b00 cmp r3, #0 8003178: d001 beq.n 800317e { Error_Handler(); 800317a: f000 f9df bl 800353c } sConfigOC.OCMode = TIM_OCMODE_PWM1; 800317e: 2360 movs r3, #96 @ 0x60 8003180: 607b str r3, [r7, #4] sConfigOC.Pulse = 1000; 8003182: f44f 737a mov.w r3, #1000 @ 0x3e8 8003186: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8003188: 2300 movs r3, #0 800318a: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 800318c: 2304 movs r3, #4 800318e: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 8003190: 1d3b adds r3, r7, #4 8003192: 2200 movs r2, #0 8003194: 4619 mov r1, r3 8003196: 481e ldr r0, [pc, #120] @ (8003210 ) 8003198: f004 fefe bl 8007f98 800319c: 4603 mov r3, r0 800319e: 2b00 cmp r3, #0 80031a0: d001 beq.n 80031a6 { Error_Handler(); 80031a2: f000 f9cb bl 800353c } sConfigOC.Pulse = 2000; 80031a6: f44f 63fa mov.w r3, #2000 @ 0x7d0 80031aa: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 80031ac: 1d3b adds r3, r7, #4 80031ae: 2204 movs r2, #4 80031b0: 4619 mov r1, r3 80031b2: 4817 ldr r0, [pc, #92] @ (8003210 ) 80031b4: f004 fef0 bl 8007f98 80031b8: 4603 mov r3, r0 80031ba: 2b00 cmp r3, #0 80031bc: d001 beq.n 80031c2 { Error_Handler(); 80031be: f000 f9bd bl 800353c } sConfigOC.Pulse = 3000; 80031c2: f640 33b8 movw r3, #3000 @ 0xbb8 80031c6: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 80031c8: 2300 movs r3, #0 80031ca: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 80031cc: 1d3b adds r3, r7, #4 80031ce: 2208 movs r2, #8 80031d0: 4619 mov r1, r3 80031d2: 480f ldr r0, [pc, #60] @ (8003210 ) 80031d4: f004 fee0 bl 8007f98 80031d8: 4603 mov r3, r0 80031da: 2b00 cmp r3, #0 80031dc: d001 beq.n 80031e2 { Error_Handler(); 80031de: f000 f9ad bl 800353c } sConfigOC.Pulse = 4000; 80031e2: f44f 637a mov.w r3, #4000 @ 0xfa0 80031e6: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 80031e8: 2304 movs r3, #4 80031ea: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 80031ec: 1d3b adds r3, r7, #4 80031ee: 220c movs r2, #12 80031f0: 4619 mov r1, r3 80031f2: 4807 ldr r0, [pc, #28] @ (8003210 ) 80031f4: f004 fed0 bl 8007f98 80031f8: 4603 mov r3, r0 80031fa: 2b00 cmp r3, #0 80031fc: d001 beq.n 8003202 { Error_Handler(); 80031fe: f000 f99d bl 800353c } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ HAL_TIM_MspPostInit(&htim2); 8003202: 4803 ldr r0, [pc, #12] @ (8003210 ) 8003204: f000 feb2 bl 8003f6c } 8003208: bf00 nop 800320a: 3738 adds r7, #56 @ 0x38 800320c: 46bd mov sp, r7 800320e: bd80 pop {r7, pc} 8003210: 20000310 .word 0x20000310 08003214 : * @brief TIM4 Initialization Function * @param None * @retval None */ static void MX_TIM4_Init(void) { 8003214: b580 push {r7, lr} 8003216: b08e sub sp, #56 @ 0x38 8003218: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 800321a: f107 0328 add.w r3, r7, #40 @ 0x28 800321e: 2200 movs r2, #0 8003220: 601a str r2, [r3, #0] 8003222: 605a str r2, [r3, #4] 8003224: 609a str r2, [r3, #8] 8003226: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8003228: f107 0320 add.w r3, r7, #32 800322c: 2200 movs r2, #0 800322e: 601a str r2, [r3, #0] 8003230: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 8003232: 1d3b adds r3, r7, #4 8003234: 2200 movs r2, #0 8003236: 601a str r2, [r3, #0] 8003238: 605a str r2, [r3, #4] 800323a: 609a str r2, [r3, #8] 800323c: 60da str r2, [r3, #12] 800323e: 611a str r2, [r3, #16] 8003240: 615a str r2, [r3, #20] 8003242: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 8003244: 4b42 ldr r3, [pc, #264] @ (8003350 ) 8003246: 4a43 ldr r2, [pc, #268] @ (8003354 ) 8003248: 601a str r2, [r3, #0] htim4.Init.Prescaler = 0; 800324a: 4b41 ldr r3, [pc, #260] @ (8003350 ) 800324c: 2200 movs r2, #0 800324e: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 8003250: 4b3f ldr r3, [pc, #252] @ (8003350 ) 8003252: 2200 movs r2, #0 8003254: 609a str r2, [r3, #8] htim4.Init.Period = 17999; 8003256: 4b3e ldr r3, [pc, #248] @ (8003350 ) 8003258: f244 624f movw r2, #17999 @ 0x464f 800325c: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800325e: 4b3c ldr r3, [pc, #240] @ (8003350 ) 8003260: 2200 movs r2, #0 8003262: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8003264: 4b3a ldr r3, [pc, #232] @ (8003350 ) 8003266: 2200 movs r2, #0 8003268: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 800326a: 4839 ldr r0, [pc, #228] @ (8003350 ) 800326c: f004 fce6 bl 8007c3c 8003270: 4603 mov r3, r0 8003272: 2b00 cmp r3, #0 8003274: d001 beq.n 800327a { Error_Handler(); 8003276: f000 f961 bl 800353c } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 800327a: f44f 5380 mov.w r3, #4096 @ 0x1000 800327e: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 8003280: f107 0328 add.w r3, r7, #40 @ 0x28 8003284: 4619 mov r1, r3 8003286: 4832 ldr r0, [pc, #200] @ (8003350 ) 8003288: f004 ff48 bl 800811c 800328c: 4603 mov r3, r0 800328e: 2b00 cmp r3, #0 8003290: d001 beq.n 8003296 { Error_Handler(); 8003292: f000 f953 bl 800353c } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 8003296: 482e ldr r0, [pc, #184] @ (8003350 ) 8003298: f004 fd1f bl 8007cda 800329c: 4603 mov r3, r0 800329e: 2b00 cmp r3, #0 80032a0: d001 beq.n 80032a6 { Error_Handler(); 80032a2: f000 f94b bl 800353c } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80032a6: 2300 movs r3, #0 80032a8: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80032aa: 2300 movs r3, #0 80032ac: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 80032ae: f107 0320 add.w r3, r7, #32 80032b2: 4619 mov r1, r3 80032b4: 4826 ldr r0, [pc, #152] @ (8003350 ) 80032b6: f005 fad1 bl 800885c 80032ba: 4603 mov r3, r0 80032bc: 2b00 cmp r3, #0 80032be: d001 beq.n 80032c4 { Error_Handler(); 80032c0: f000 f93c bl 800353c } sConfigOC.OCMode = TIM_OCMODE_PWM1; 80032c4: 2360 movs r3, #96 @ 0x60 80032c6: 607b str r3, [r7, #4] sConfigOC.Pulse = 5000; 80032c8: f241 3388 movw r3, #5000 @ 0x1388 80032cc: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 80032ce: 2300 movs r3, #0 80032d0: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 80032d2: 2304 movs r3, #4 80032d4: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 80032d6: 1d3b adds r3, r7, #4 80032d8: 2200 movs r2, #0 80032da: 4619 mov r1, r3 80032dc: 481c ldr r0, [pc, #112] @ (8003350 ) 80032de: f004 fe5b bl 8007f98 80032e2: 4603 mov r3, r0 80032e4: 2b00 cmp r3, #0 80032e6: d001 beq.n 80032ec { Error_Handler(); 80032e8: f000 f928 bl 800353c } sConfigOC.Pulse = 6000; 80032ec: f241 7370 movw r3, #6000 @ 0x1770 80032f0: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 80032f2: 1d3b adds r3, r7, #4 80032f4: 2204 movs r2, #4 80032f6: 4619 mov r1, r3 80032f8: 4815 ldr r0, [pc, #84] @ (8003350 ) 80032fa: f004 fe4d bl 8007f98 80032fe: 4603 mov r3, r0 8003300: 2b00 cmp r3, #0 8003302: d001 beq.n 8003308 { Error_Handler(); 8003304: f000 f91a bl 800353c } sConfigOC.Pulse = 7000; 8003308: f641 3358 movw r3, #7000 @ 0x1b58 800330c: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 800330e: 1d3b adds r3, r7, #4 8003310: 2208 movs r2, #8 8003312: 4619 mov r1, r3 8003314: 480e ldr r0, [pc, #56] @ (8003350 ) 8003316: f004 fe3f bl 8007f98 800331a: 4603 mov r3, r0 800331c: 2b00 cmp r3, #0 800331e: d001 beq.n 8003324 { Error_Handler(); 8003320: f000 f90c bl 800353c } sConfigOC.Pulse = 8000; 8003324: f44f 53fa mov.w r3, #8000 @ 0x1f40 8003328: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 800332a: 1d3b adds r3, r7, #4 800332c: 220c movs r2, #12 800332e: 4619 mov r1, r3 8003330: 4807 ldr r0, [pc, #28] @ (8003350 ) 8003332: f004 fe31 bl 8007f98 8003336: 4603 mov r3, r0 8003338: 2b00 cmp r3, #0 800333a: d001 beq.n 8003340 { Error_Handler(); 800333c: f000 f8fe bl 800353c } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 8003340: 4803 ldr r0, [pc, #12] @ (8003350 ) 8003342: f000 fe13 bl 8003f6c } 8003346: bf00 nop 8003348: 3738 adds r7, #56 @ 0x38 800334a: 46bd mov sp, r7 800334c: bd80 pop {r7, pc} 800334e: bf00 nop 8003350: 20000358 .word 0x20000358 8003354: 40000800 .word 0x40000800 08003358 : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 8003358: b580 push {r7, lr} 800335a: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 800335c: 4b11 ldr r3, [pc, #68] @ (80033a4 ) 800335e: 4a12 ldr r2, [pc, #72] @ (80033a8 ) 8003360: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 8003362: 4b10 ldr r3, [pc, #64] @ (80033a4 ) 8003364: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8003368: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 800336a: 4b0e ldr r3, [pc, #56] @ (80033a4 ) 800336c: 2200 movs r2, #0 800336e: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8003370: 4b0c ldr r3, [pc, #48] @ (80033a4 ) 8003372: 2200 movs r2, #0 8003374: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8003376: 4b0b ldr r3, [pc, #44] @ (80033a4 ) 8003378: 2200 movs r2, #0 800337a: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800337c: 4b09 ldr r3, [pc, #36] @ (80033a4 ) 800337e: 220c movs r2, #12 8003380: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8003382: 4b08 ldr r3, [pc, #32] @ (80033a4 ) 8003384: 2200 movs r2, #0 8003386: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8003388: 4b06 ldr r3, [pc, #24] @ (80033a4 ) 800338a: 2200 movs r2, #0 800338c: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 800338e: 4805 ldr r0, [pc, #20] @ (80033a4 ) 8003390: f005 fac2 bl 8008918 8003394: 4603 mov r3, r0 8003396: 2b00 cmp r3, #0 8003398: d001 beq.n 800339e { Error_Handler(); 800339a: f000 f8cf bl 800353c } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 800339e: bf00 nop 80033a0: bd80 pop {r7, pc} 80033a2: bf00 nop 80033a4: 200003a0 .word 0x200003a0 80033a8: 40013800 .word 0x40013800 080033ac : /** * Enable DMA controller clock */ static void MX_DMA_Init(void) { 80033ac: b580 push {r7, lr} 80033ae: b082 sub sp, #8 80033b0: af00 add r7, sp, #0 /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); 80033b2: 4b0c ldr r3, [pc, #48] @ (80033e4 ) 80033b4: 695b ldr r3, [r3, #20] 80033b6: 4a0b ldr r2, [pc, #44] @ (80033e4 ) 80033b8: f043 0301 orr.w r3, r3, #1 80033bc: 6153 str r3, [r2, #20] 80033be: 4b09 ldr r3, [pc, #36] @ (80033e4 ) 80033c0: 695b ldr r3, [r3, #20] 80033c2: f003 0301 and.w r3, r3, #1 80033c6: 607b str r3, [r7, #4] 80033c8: 687b ldr r3, [r7, #4] /* DMA interrupt init */ /* DMA1_Channel1_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 80033ca: 2200 movs r2, #0 80033cc: 2100 movs r1, #0 80033ce: 200b movs r0, #11 80033d0: f001 fc15 bl 8004bfe HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 80033d4: 200b movs r0, #11 80033d6: f001 fc2e bl 8004c36 } 80033da: bf00 nop 80033dc: 3708 adds r7, #8 80033de: 46bd mov sp, r7 80033e0: bd80 pop {r7, pc} 80033e2: bf00 nop 80033e4: 40021000 .word 0x40021000 080033e8 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 80033e8: b580 push {r7, lr} 80033ea: b088 sub sp, #32 80033ec: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80033ee: f107 0310 add.w r3, r7, #16 80033f2: 2200 movs r2, #0 80033f4: 601a str r2, [r3, #0] 80033f6: 605a str r2, [r3, #4] 80033f8: 609a str r2, [r3, #8] 80033fa: 60da str r2, [r3, #12] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 80033fc: 4b4b ldr r3, [pc, #300] @ (800352c ) 80033fe: 699b ldr r3, [r3, #24] 8003400: 4a4a ldr r2, [pc, #296] @ (800352c ) 8003402: f043 0310 orr.w r3, r3, #16 8003406: 6193 str r3, [r2, #24] 8003408: 4b48 ldr r3, [pc, #288] @ (800352c ) 800340a: 699b ldr r3, [r3, #24] 800340c: f003 0310 and.w r3, r3, #16 8003410: 60fb str r3, [r7, #12] 8003412: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); 8003414: 4b45 ldr r3, [pc, #276] @ (800352c ) 8003416: 699b ldr r3, [r3, #24] 8003418: 4a44 ldr r2, [pc, #272] @ (800352c ) 800341a: f043 0320 orr.w r3, r3, #32 800341e: 6193 str r3, [r2, #24] 8003420: 4b42 ldr r3, [pc, #264] @ (800352c ) 8003422: 699b ldr r3, [r3, #24] 8003424: f003 0320 and.w r3, r3, #32 8003428: 60bb str r3, [r7, #8] 800342a: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 800342c: 4b3f ldr r3, [pc, #252] @ (800352c ) 800342e: 699b ldr r3, [r3, #24] 8003430: 4a3e ldr r2, [pc, #248] @ (800352c ) 8003432: f043 0304 orr.w r3, r3, #4 8003436: 6193 str r3, [r2, #24] 8003438: 4b3c ldr r3, [pc, #240] @ (800352c ) 800343a: 699b ldr r3, [r3, #24] 800343c: f003 0304 and.w r3, r3, #4 8003440: 607b str r3, [r7, #4] 8003442: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); 8003444: 4b39 ldr r3, [pc, #228] @ (800352c ) 8003446: 699b ldr r3, [r3, #24] 8003448: 4a38 ldr r2, [pc, #224] @ (800352c ) 800344a: f043 0308 orr.w r3, r3, #8 800344e: 6193 str r3, [r2, #24] 8003450: 4b36 ldr r3, [pc, #216] @ (800352c ) 8003452: 699b ldr r3, [r3, #24] 8003454: f003 0308 and.w r3, r3, #8 8003458: 603b str r3, [r7, #0] 800345a: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET); 800345c: 2200 movs r2, #0 800345e: f44f 5100 mov.w r1, #8192 @ 0x2000 8003462: 4833 ldr r0, [pc, #204] @ (8003530 ) 8003464: f002 f991 bl 800578a /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin 8003468: 2200 movs r2, #0 800346a: f640 413e movw r1, #3134 @ 0xc3e 800346e: 4831 ldr r0, [pc, #196] @ (8003534 ) 8003470: f002 f98b bl 800578a |EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET); 8003474: 2200 movs r2, #0 8003476: f44f 4101 mov.w r1, #33024 @ 0x8100 800347a: 482f ldr r0, [pc, #188] @ (8003538 ) 800347c: f002 f985 bl 800578a /*Configure GPIO pin : LED2_Pin */ GPIO_InitStruct.Pin = LED2_Pin; 8003480: f44f 5300 mov.w r3, #8192 @ 0x2000 8003484: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8003486: 2301 movs r3, #1 8003488: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800348a: 2300 movs r3, #0 800348c: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800348e: 2302 movs r3, #2 8003490: 61fb str r3, [r7, #28] HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct); 8003492: f107 0310 add.w r3, r7, #16 8003496: 4619 mov r1, r3 8003498: 4825 ldr r0, [pc, #148] @ (8003530 ) 800349a: f001 ffdb bl 8005454 /*Configure GPIO pins : P1_Pin P2_Pin */ GPIO_InitStruct.Pin = P1_Pin|P2_Pin; 800349e: f44f 4340 mov.w r3, #49152 @ 0xc000 80034a2: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80034a4: 2300 movs r3, #0 80034a6: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80034a8: 2300 movs r3, #0 80034aa: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80034ac: f107 0310 add.w r3, r7, #16 80034b0: 4619 mov r1, r3 80034b2: 481f ldr r0, [pc, #124] @ (8003530 ) 80034b4: f001 ffce bl 8005454 /*Configure GPIO pin : AIN1_Pin */ GPIO_InitStruct.Pin = AIN1_Pin; 80034b8: 2310 movs r3, #16 80034ba: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80034bc: 2303 movs r3, #3 80034be: 617b str r3, [r7, #20] HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct); 80034c0: f107 0310 add.w r3, r7, #16 80034c4: 4619 mov r1, r3 80034c6: 481c ldr r0, [pc, #112] @ (8003538 ) 80034c8: f001 ffc4 bl 8005454 /*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin EXP1_Pin EXP2_Pin EXP3_Pin */ GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin 80034cc: f640 433e movw r3, #3134 @ 0xc3e 80034d0: 613b str r3, [r7, #16] |EXP1_Pin|EXP2_Pin|EXP3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80034d2: 2301 movs r3, #1 80034d4: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80034d6: 2300 movs r3, #0 80034d8: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80034da: 2302 movs r3, #2 80034dc: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80034de: f107 0310 add.w r3, r7, #16 80034e2: 4619 mov r1, r3 80034e4: 4813 ldr r0, [pc, #76] @ (8003534 ) 80034e6: f001 ffb5 bl 8005454 /*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */ GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin; 80034ea: f44f 4370 mov.w r3, #61440 @ 0xf000 80034ee: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80034f0: 2300 movs r3, #0 80034f2: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80034f4: 2300 movs r3, #0 80034f6: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80034f8: f107 0310 add.w r3, r7, #16 80034fc: 4619 mov r1, r3 80034fe: 480d ldr r0, [pc, #52] @ (8003534 ) 8003500: f001 ffa8 bl 8005454 /*Configure GPIO pins : BUZ_Pin LED1_Pin */ GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin; 8003504: f44f 4301 mov.w r3, #33024 @ 0x8100 8003508: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800350a: 2301 movs r3, #1 800350c: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 800350e: 2300 movs r3, #0 8003510: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003512: 2302 movs r3, #2 8003514: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003516: f107 0310 add.w r3, r7, #16 800351a: 4619 mov r1, r3 800351c: 4806 ldr r0, [pc, #24] @ (8003538 ) 800351e: f001 ff99 bl 8005454 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 8003522: bf00 nop 8003524: 3720 adds r7, #32 8003526: 46bd mov sp, r7 8003528: bd80 pop {r7, pc} 800352a: bf00 nop 800352c: 40021000 .word 0x40021000 8003530: 40011000 .word 0x40011000 8003534: 40010c00 .word 0x40010c00 8003538: 40010800 .word 0x40010800 0800353c : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 800353c: b480 push {r7} 800353e: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8003540: b672 cpsid i } 8003542: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8003544: bf00 nop 8003546: e7fd b.n 8003544 08003548 : extern TIM_HandleTypeDef htim3; extern TIM_HandleTypeDef htim4; extern volatile uint8_t rtramp[4]; extern uint8_t mrampstart[4]; bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel) { 8003548: b580 push {r7, lr} 800354a: b084 sub sp, #16 800354c: af00 add r7, sp, #0 800354e: 6078 str r0, [r7, #4] 8003550: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel); 8003552: 6839 ldr r1, [r7, #0] 8003554: 6878 ldr r0, [r7, #4] 8003556: f004 fea8 bl 80082aa 800355a: 4603 mov r3, r0 800355c: 73fb strb r3, [r7, #15] return (chState == HAL_TIM_CHANNEL_STATE_BUSY); 800355e: 7bfb ldrb r3, [r7, #15] 8003560: 2b02 cmp r3, #2 8003562: bf0c ite eq 8003564: 2301 moveq r3, #1 8003566: 2300 movne r3, #0 8003568: b2db uxtb r3, r3 } 800356a: 4618 mov r0, r3 800356c: 3710 adds r7, #16 800356e: 46bd mov sp, r7 8003570: bd80 pop {r7, pc} 08003572 : void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){ 8003572: b580 push {r7, lr} 8003574: b082 sub sp, #8 8003576: af00 add r7, sp, #0 8003578: 6078 str r0, [r7, #4] 800357a: 6039 str r1, [r7, #0] HAL_TIM_PWM_Stop(htim, Channel); 800357c: 6839 ldr r1, [r7, #0] 800357e: 6878 ldr r0, [r7, #4] 8003580: f004 fca6 bl 8007ed0 } 8003584: bf00 nop 8003586: 3708 adds r7, #8 8003588: 46bd mov sp, r7 800358a: bd80 pop {r7, pc} 0800358c : void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 800358c: b580 push {r7, lr} 800358e: b084 sub sp, #16 8003590: af00 add r7, sp, #0 8003592: 60f8 str r0, [r7, #12] 8003594: 60b9 str r1, [r7, #8] 8003596: 4613 mov r3, r2 8003598: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 800359a: 68bb ldr r3, [r7, #8] 800359c: 2b00 cmp r3, #0 800359e: d104 bne.n 80035aa 80035a0: 68fb ldr r3, [r7, #12] 80035a2: 681b ldr r3, [r3, #0] 80035a4: 88fa ldrh r2, [r7, #6] 80035a6: 635a str r2, [r3, #52] @ 0x34 80035a8: e013 b.n 80035d2 80035aa: 68bb ldr r3, [r7, #8] 80035ac: 2b04 cmp r3, #4 80035ae: d104 bne.n 80035ba 80035b0: 68fb ldr r3, [r7, #12] 80035b2: 681a ldr r2, [r3, #0] 80035b4: 88fb ldrh r3, [r7, #6] 80035b6: 6393 str r3, [r2, #56] @ 0x38 80035b8: e00b b.n 80035d2 80035ba: 68bb ldr r3, [r7, #8] 80035bc: 2b08 cmp r3, #8 80035be: d104 bne.n 80035ca 80035c0: 68fb ldr r3, [r7, #12] 80035c2: 681a ldr r2, [r3, #0] 80035c4: 88fb ldrh r3, [r7, #6] 80035c6: 63d3 str r3, [r2, #60] @ 0x3c 80035c8: e003 b.n 80035d2 80035ca: 68fb ldr r3, [r7, #12] 80035cc: 681a ldr r2, [r3, #0] 80035ce: 88fb ldrh r3, [r7, #6] 80035d0: 6413 str r3, [r2, #64] @ 0x40 HAL_TIM_PWM_Start(htim, Channel); 80035d2: 68b9 ldr r1, [r7, #8] 80035d4: 68f8 ldr r0, [r7, #12] 80035d6: f004 fbd9 bl 8007d8c } 80035da: bf00 nop 80035dc: 3710 adds r7, #16 80035de: 46bd mov sp, r7 80035e0: bd80 pop {r7, pc} 080035e2 : void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 80035e2: b480 push {r7} 80035e4: b085 sub sp, #20 80035e6: af00 add r7, sp, #0 80035e8: 60f8 str r0, [r7, #12] 80035ea: 60b9 str r1, [r7, #8] 80035ec: 4613 mov r3, r2 80035ee: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 80035f0: 68bb ldr r3, [r7, #8] 80035f2: 2b00 cmp r3, #0 80035f4: d104 bne.n 8003600 80035f6: 68fb ldr r3, [r7, #12] 80035f8: 681b ldr r3, [r3, #0] 80035fa: 88fa ldrh r2, [r7, #6] 80035fc: 635a str r2, [r3, #52] @ 0x34 } 80035fe: e013 b.n 8003628 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8003600: 68bb ldr r3, [r7, #8] 8003602: 2b04 cmp r3, #4 8003604: d104 bne.n 8003610 8003606: 68fb ldr r3, [r7, #12] 8003608: 681a ldr r2, [r3, #0] 800360a: 88fb ldrh r3, [r7, #6] 800360c: 6393 str r3, [r2, #56] @ 0x38 } 800360e: e00b b.n 8003628 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8003610: 68bb ldr r3, [r7, #8] 8003612: 2b08 cmp r3, #8 8003614: d104 bne.n 8003620 8003616: 68fb ldr r3, [r7, #12] 8003618: 681a ldr r2, [r3, #0] 800361a: 88fb ldrh r3, [r7, #6] 800361c: 63d3 str r3, [r2, #60] @ 0x3c } 800361e: e003 b.n 8003628 __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8003620: 68fb ldr r3, [r7, #12] 8003622: 681a ldr r2, [r3, #0] 8003624: 88fb ldrh r3, [r7, #6] 8003626: 6413 str r3, [r2, #64] @ 0x40 } 8003628: bf00 nop 800362a: 3714 adds r7, #20 800362c: 46bd mov sp, r7 800362e: bc80 pop {r7} 8003630: 4770 bx lr ... 08003634 : void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){ 8003634: b580 push {r7, lr} 8003636: b082 sub sp, #8 8003638: af00 add r7, sp, #0 800363a: 4603 mov r3, r0 800363c: 71fb strb r3, [r7, #7] 800363e: 460b mov r3, r1 8003640: 71bb strb r3, [r7, #6] 8003642: 4613 mov r3, r2 8003644: 80bb strh r3, [r7, #4] switch(mot){ 8003646: 79fb ldrb r3, [r7, #7] 8003648: 3b01 subs r3, #1 800364a: 2b03 cmp r3, #3 800364c: f200 8158 bhi.w 8003900 8003650: a201 add r2, pc, #4 @ (adr r2, 8003658 ) 8003652: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003656: bf00 nop 8003658: 08003669 .word 0x08003669 800365c: 0800370b .word 0x0800370b 8003660: 080037ad .word 0x080037ad 8003664: 08003857 .word 0x08003857 case 1: if(dir==FW){ 8003668: 79bb ldrb r3, [r7, #6] 800366a: 2b00 cmp r3, #0 800366c: d126 bne.n 80036bc if(pwmval==0){ 800366e: 88bb ldrh r3, [r7, #4] 8003670: 2b00 cmp r3, #0 8003672: d109 bne.n 8003688 StopMot(timMot1,FWMot1); 8003674: 2100 movs r1, #0 8003676: 48a5 ldr r0, [pc, #660] @ (800390c ) 8003678: f7ff ff7b bl 8003572 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 800367c: 2200 movs r2, #0 800367e: 2102 movs r1, #2 8003680: 48a3 ldr r0, [pc, #652] @ (8003910 ) 8003682: f002 f882 bl 800578a HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); StartMot(timMot1,BWMot1,pwmval); } } break; 8003686: e13c b.n 8003902 }else if(IsPwmRunning(timMot1, FWMot1)){ 8003688: 2100 movs r1, #0 800368a: 48a0 ldr r0, [pc, #640] @ (800390c ) 800368c: f7ff ff5c bl 8003548 8003690: 4603 mov r3, r0 8003692: 2b00 cmp r3, #0 8003694: d006 beq.n 80036a4 SetMotPwm(timMot1,FWMot1,pwmval); 8003696: 88bb ldrh r3, [r7, #4] 8003698: 461a mov r2, r3 800369a: 2100 movs r1, #0 800369c: 489b ldr r0, [pc, #620] @ (800390c ) 800369e: f7ff ffa0 bl 80035e2 break; 80036a2: e12e b.n 8003902 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 80036a4: 2201 movs r2, #1 80036a6: 2102 movs r1, #2 80036a8: 4899 ldr r0, [pc, #612] @ (8003910 ) 80036aa: f002 f86e bl 800578a StartMot(timMot1,FWMot1,pwmval); 80036ae: 88bb ldrh r3, [r7, #4] 80036b0: 461a mov r2, r3 80036b2: 2100 movs r1, #0 80036b4: 4895 ldr r0, [pc, #596] @ (800390c ) 80036b6: f7ff ff69 bl 800358c break; 80036ba: e122 b.n 8003902 if(pwmval==0){ 80036bc: 88bb ldrh r3, [r7, #4] 80036be: 2b00 cmp r3, #0 80036c0: d109 bne.n 80036d6 StopMot(timMot1,BWMot1); 80036c2: 2104 movs r1, #4 80036c4: 4891 ldr r0, [pc, #580] @ (800390c ) 80036c6: f7ff ff54 bl 8003572 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 80036ca: 2200 movs r2, #0 80036cc: 2102 movs r1, #2 80036ce: 4890 ldr r0, [pc, #576] @ (8003910 ) 80036d0: f002 f85b bl 800578a break; 80036d4: e115 b.n 8003902 }else if(IsPwmRunning(timMot1, BWMot1)){ 80036d6: 2104 movs r1, #4 80036d8: 488c ldr r0, [pc, #560] @ (800390c ) 80036da: f7ff ff35 bl 8003548 80036de: 4603 mov r3, r0 80036e0: 2b00 cmp r3, #0 80036e2: d006 beq.n 80036f2 SetMotPwm(timMot1,BWMot1,pwmval); 80036e4: 88bb ldrh r3, [r7, #4] 80036e6: 461a mov r2, r3 80036e8: 2104 movs r1, #4 80036ea: 4888 ldr r0, [pc, #544] @ (800390c ) 80036ec: f7ff ff79 bl 80035e2 break; 80036f0: e107 b.n 8003902 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 80036f2: 2201 movs r2, #1 80036f4: 2102 movs r1, #2 80036f6: 4886 ldr r0, [pc, #536] @ (8003910 ) 80036f8: f002 f847 bl 800578a StartMot(timMot1,BWMot1,pwmval); 80036fc: 88bb ldrh r3, [r7, #4] 80036fe: 461a mov r2, r3 8003700: 2104 movs r1, #4 8003702: 4882 ldr r0, [pc, #520] @ (800390c ) 8003704: f7ff ff42 bl 800358c break; 8003708: e0fb b.n 8003902 case 2: if(dir==FW){ 800370a: 79bb ldrb r3, [r7, #6] 800370c: 2b00 cmp r3, #0 800370e: d126 bne.n 800375e if(pwmval==0){ 8003710: 88bb ldrh r3, [r7, #4] 8003712: 2b00 cmp r3, #0 8003714: d109 bne.n 800372a StopMot(timMot2,FWMot2); 8003716: 2108 movs r1, #8 8003718: 487c ldr r0, [pc, #496] @ (800390c ) 800371a: f7ff ff2a bl 8003572 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 800371e: 2200 movs r2, #0 8003720: 2104 movs r1, #4 8003722: 487b ldr r0, [pc, #492] @ (8003910 ) 8003724: f002 f831 bl 800578a }else{ HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); StartMot(timMot2,BWMot2,pwmval); } } break; 8003728: e0eb b.n 8003902 }else if(IsPwmRunning(timMot2, FWMot2)){ 800372a: 2108 movs r1, #8 800372c: 4877 ldr r0, [pc, #476] @ (800390c ) 800372e: f7ff ff0b bl 8003548 8003732: 4603 mov r3, r0 8003734: 2b00 cmp r3, #0 8003736: d006 beq.n 8003746 SetMotPwm(timMot2,FWMot2,pwmval); 8003738: 88bb ldrh r3, [r7, #4] 800373a: 461a mov r2, r3 800373c: 2108 movs r1, #8 800373e: 4873 ldr r0, [pc, #460] @ (800390c ) 8003740: f7ff ff4f bl 80035e2 break; 8003744: e0dd b.n 8003902 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8003746: 2201 movs r2, #1 8003748: 2104 movs r1, #4 800374a: 4871 ldr r0, [pc, #452] @ (8003910 ) 800374c: f002 f81d bl 800578a StartMot(timMot2,FWMot2,pwmval); 8003750: 88bb ldrh r3, [r7, #4] 8003752: 461a mov r2, r3 8003754: 2108 movs r1, #8 8003756: 486d ldr r0, [pc, #436] @ (800390c ) 8003758: f7ff ff18 bl 800358c break; 800375c: e0d1 b.n 8003902 if(pwmval==0){ 800375e: 88bb ldrh r3, [r7, #4] 8003760: 2b00 cmp r3, #0 8003762: d109 bne.n 8003778 StopMot(timMot2,BWMot2); 8003764: 210c movs r1, #12 8003766: 4869 ldr r0, [pc, #420] @ (800390c ) 8003768: f7ff ff03 bl 8003572 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 800376c: 2200 movs r2, #0 800376e: 2104 movs r1, #4 8003770: 4867 ldr r0, [pc, #412] @ (8003910 ) 8003772: f002 f80a bl 800578a break; 8003776: e0c4 b.n 8003902 }else if(IsPwmRunning(timMot2, BWMot2)){ 8003778: 210c movs r1, #12 800377a: 4864 ldr r0, [pc, #400] @ (800390c ) 800377c: f7ff fee4 bl 8003548 8003780: 4603 mov r3, r0 8003782: 2b00 cmp r3, #0 8003784: d006 beq.n 8003794 SetMotPwm(timMot2,BWMot2,pwmval); 8003786: 88bb ldrh r3, [r7, #4] 8003788: 461a mov r2, r3 800378a: 210c movs r1, #12 800378c: 485f ldr r0, [pc, #380] @ (800390c ) 800378e: f7ff ff28 bl 80035e2 break; 8003792: e0b6 b.n 8003902 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8003794: 2201 movs r2, #1 8003796: 2104 movs r1, #4 8003798: 485d ldr r0, [pc, #372] @ (8003910 ) 800379a: f001 fff6 bl 800578a StartMot(timMot2,BWMot2,pwmval); 800379e: 88bb ldrh r3, [r7, #4] 80037a0: 461a mov r2, r3 80037a2: 210c movs r1, #12 80037a4: 4859 ldr r0, [pc, #356] @ (800390c ) 80037a6: f7ff fef1 bl 800358c break; 80037aa: e0aa b.n 8003902 case 3: if(dir==FW){ 80037ac: 79bb ldrb r3, [r7, #6] 80037ae: 2b00 cmp r3, #0 80037b0: d128 bne.n 8003804 if(pwmval==0){ 80037b2: 88bb ldrh r3, [r7, #4] 80037b4: 2b00 cmp r3, #0 80037b6: d10a bne.n 80037ce StopMot(timMot3,FWMot3); 80037b8: 2100 movs r1, #0 80037ba: 4856 ldr r0, [pc, #344] @ (8003914 ) 80037bc: f7ff fed9 bl 8003572 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 80037c0: 2200 movs r2, #0 80037c2: f44f 6180 mov.w r1, #1024 @ 0x400 80037c6: 4852 ldr r0, [pc, #328] @ (8003910 ) 80037c8: f001 ffdf bl 800578a }else{ HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); StartMot(timMot3,BWMot3,pwmval); } } break; 80037cc: e099 b.n 8003902 }else if(IsPwmRunning(timMot3, FWMot3)){ 80037ce: 2100 movs r1, #0 80037d0: 4850 ldr r0, [pc, #320] @ (8003914 ) 80037d2: f7ff feb9 bl 8003548 80037d6: 4603 mov r3, r0 80037d8: 2b00 cmp r3, #0 80037da: d006 beq.n 80037ea SetMotPwm(timMot3,FWMot3,pwmval); 80037dc: 88bb ldrh r3, [r7, #4] 80037de: 461a mov r2, r3 80037e0: 2100 movs r1, #0 80037e2: 484c ldr r0, [pc, #304] @ (8003914 ) 80037e4: f7ff fefd bl 80035e2 break; 80037e8: e08b b.n 8003902 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 80037ea: 2201 movs r2, #1 80037ec: f44f 6180 mov.w r1, #1024 @ 0x400 80037f0: 4847 ldr r0, [pc, #284] @ (8003910 ) 80037f2: f001 ffca bl 800578a StartMot(timMot3,FWMot3,pwmval); 80037f6: 88bb ldrh r3, [r7, #4] 80037f8: 461a mov r2, r3 80037fa: 2100 movs r1, #0 80037fc: 4845 ldr r0, [pc, #276] @ (8003914 ) 80037fe: f7ff fec5 bl 800358c break; 8003802: e07e b.n 8003902 if(pwmval==0){ 8003804: 88bb ldrh r3, [r7, #4] 8003806: 2b00 cmp r3, #0 8003808: d10a bne.n 8003820 StopMot(timMot3,BWMot3); 800380a: 2104 movs r1, #4 800380c: 4841 ldr r0, [pc, #260] @ (8003914 ) 800380e: f7ff feb0 bl 8003572 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8003812: 2200 movs r2, #0 8003814: f44f 6180 mov.w r1, #1024 @ 0x400 8003818: 483d ldr r0, [pc, #244] @ (8003910 ) 800381a: f001 ffb6 bl 800578a break; 800381e: e070 b.n 8003902 }else if(IsPwmRunning(timMot3, BWMot3)){ 8003820: 2104 movs r1, #4 8003822: 483c ldr r0, [pc, #240] @ (8003914 ) 8003824: f7ff fe90 bl 8003548 8003828: 4603 mov r3, r0 800382a: 2b00 cmp r3, #0 800382c: d006 beq.n 800383c SetMotPwm(timMot3,BWMot3,pwmval); 800382e: 88bb ldrh r3, [r7, #4] 8003830: 461a mov r2, r3 8003832: 2104 movs r1, #4 8003834: 4837 ldr r0, [pc, #220] @ (8003914 ) 8003836: f7ff fed4 bl 80035e2 break; 800383a: e062 b.n 8003902 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 800383c: 2201 movs r2, #1 800383e: f44f 6180 mov.w r1, #1024 @ 0x400 8003842: 4833 ldr r0, [pc, #204] @ (8003910 ) 8003844: f001 ffa1 bl 800578a StartMot(timMot3,BWMot3,pwmval); 8003848: 88bb ldrh r3, [r7, #4] 800384a: 461a mov r2, r3 800384c: 2104 movs r1, #4 800384e: 4831 ldr r0, [pc, #196] @ (8003914 ) 8003850: f7ff fe9c bl 800358c break; 8003854: e055 b.n 8003902 case 4: if(dir==FW){ 8003856: 79bb ldrb r3, [r7, #6] 8003858: 2b00 cmp r3, #0 800385a: d128 bne.n 80038ae if(pwmval==0){ 800385c: 88bb ldrh r3, [r7, #4] 800385e: 2b00 cmp r3, #0 8003860: d10a bne.n 8003878 StopMot(timMot4,FWMot4); 8003862: 2108 movs r1, #8 8003864: 482b ldr r0, [pc, #172] @ (8003914 ) 8003866: f7ff fe84 bl 8003572 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 800386a: 2200 movs r2, #0 800386c: f44f 6100 mov.w r1, #2048 @ 0x800 8003870: 4827 ldr r0, [pc, #156] @ (8003910 ) 8003872: f001 ff8a bl 800578a }else{ HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); StartMot(timMot4,BWMot4,pwmval); } } break; 8003876: e044 b.n 8003902 }else if(IsPwmRunning(timMot4, FWMot4)){ 8003878: 2108 movs r1, #8 800387a: 4826 ldr r0, [pc, #152] @ (8003914 ) 800387c: f7ff fe64 bl 8003548 8003880: 4603 mov r3, r0 8003882: 2b00 cmp r3, #0 8003884: d006 beq.n 8003894 SetMotPwm(timMot4,FWMot4,pwmval); 8003886: 88bb ldrh r3, [r7, #4] 8003888: 461a mov r2, r3 800388a: 2108 movs r1, #8 800388c: 4821 ldr r0, [pc, #132] @ (8003914 ) 800388e: f7ff fea8 bl 80035e2 break; 8003892: e036 b.n 8003902 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8003894: 2201 movs r2, #1 8003896: f44f 6100 mov.w r1, #2048 @ 0x800 800389a: 481d ldr r0, [pc, #116] @ (8003910 ) 800389c: f001 ff75 bl 800578a StartMot(timMot4,FWMot4,pwmval); 80038a0: 88bb ldrh r3, [r7, #4] 80038a2: 461a mov r2, r3 80038a4: 2108 movs r1, #8 80038a6: 481b ldr r0, [pc, #108] @ (8003914 ) 80038a8: f7ff fe70 bl 800358c break; 80038ac: e029 b.n 8003902 if(pwmval==0){ 80038ae: 88bb ldrh r3, [r7, #4] 80038b0: 2b00 cmp r3, #0 80038b2: d10a bne.n 80038ca StopMot(timMot4,BWMot4); 80038b4: 210c movs r1, #12 80038b6: 4817 ldr r0, [pc, #92] @ (8003914 ) 80038b8: f7ff fe5b bl 8003572 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 80038bc: 2200 movs r2, #0 80038be: f44f 6100 mov.w r1, #2048 @ 0x800 80038c2: 4813 ldr r0, [pc, #76] @ (8003910 ) 80038c4: f001 ff61 bl 800578a break; 80038c8: e01b b.n 8003902 }else if(IsPwmRunning(timMot4, BWMot4)){ 80038ca: 210c movs r1, #12 80038cc: 4811 ldr r0, [pc, #68] @ (8003914 ) 80038ce: f7ff fe3b bl 8003548 80038d2: 4603 mov r3, r0 80038d4: 2b00 cmp r3, #0 80038d6: d006 beq.n 80038e6 SetMotPwm(timMot4,BWMot4,pwmval); 80038d8: 88bb ldrh r3, [r7, #4] 80038da: 461a mov r2, r3 80038dc: 210c movs r1, #12 80038de: 480d ldr r0, [pc, #52] @ (8003914 ) 80038e0: f7ff fe7f bl 80035e2 break; 80038e4: e00d b.n 8003902 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 80038e6: 2201 movs r2, #1 80038e8: f44f 6100 mov.w r1, #2048 @ 0x800 80038ec: 4808 ldr r0, [pc, #32] @ (8003910 ) 80038ee: f001 ff4c bl 800578a StartMot(timMot4,BWMot4,pwmval); 80038f2: 88bb ldrh r3, [r7, #4] 80038f4: 461a mov r2, r3 80038f6: 210c movs r1, #12 80038f8: 4806 ldr r0, [pc, #24] @ (8003914 ) 80038fa: f7ff fe47 bl 800358c break; 80038fe: e000 b.n 8003902 default: break; 8003900: bf00 nop } } 8003902: bf00 nop 8003904: 3708 adds r7, #8 8003906: 46bd mov sp, r7 8003908: bd80 pop {r7, pc} 800390a: bf00 nop 800390c: 20000310 .word 0x20000310 8003910: 40010c00 .word 0x40010c00 8003914: 20000358 .word 0x20000358 08003918 : void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){ 8003918: b580 push {r7, lr} 800391a: b084 sub sp, #16 800391c: af00 add r7, sp, #0 800391e: 4603 mov r3, r0 8003920: 71fb strb r3, [r7, #7] 8003922: 460b mov r3, r1 8003924: 71bb strb r3, [r7, #6] 8003926: 4613 mov r3, r2 8003928: 717b strb r3, [r7, #5] uint16_t pwmval; uint32_t tempval; tempval=perc; 800392a: 797b ldrb r3, [r7, #5] 800392c: 60fb str r3, [r7, #12] tempval*=16384; 800392e: 68fb ldr r3, [r7, #12] 8003930: 039b lsls r3, r3, #14 8003932: 60fb str r3, [r7, #12] tempval/=100; 8003934: 68fb ldr r3, [r7, #12] 8003936: 4ab4 ldr r2, [pc, #720] @ (8003c08 ) 8003938: fba2 2303 umull r2, r3, r2, r3 800393c: 095b lsrs r3, r3, #5 800393e: 60fb str r3, [r7, #12] pwmval=(uint16_t)tempval; 8003940: 68fb ldr r3, [r7, #12] 8003942: 817b strh r3, [r7, #10] switch(mot){ 8003944: 79fb ldrb r3, [r7, #7] 8003946: 3b01 subs r3, #1 8003948: 2b03 cmp r3, #3 800394a: f200 8157 bhi.w 8003bfc 800394e: a201 add r2, pc, #4 @ (adr r2, 8003954 ) 8003950: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003954: 08003965 .word 0x08003965 8003958: 08003a07 .word 0x08003a07 800395c: 08003aa9 .word 0x08003aa9 8003960: 08003b53 .word 0x08003b53 case 1: if(dir==FW){ 8003964: 79bb ldrb r3, [r7, #6] 8003966: 2b00 cmp r3, #0 8003968: d126 bne.n 80039b8 if(pwmval==0){ 800396a: 897b ldrh r3, [r7, #10] 800396c: 2b00 cmp r3, #0 800396e: d109 bne.n 8003984 StopMot(timMot1,FWMot1); 8003970: 2100 movs r1, #0 8003972: 48a6 ldr r0, [pc, #664] @ (8003c0c ) 8003974: f7ff fdfd bl 8003572 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8003978: 2200 movs r2, #0 800397a: 2102 movs r1, #2 800397c: 48a4 ldr r0, [pc, #656] @ (8003c10 ) 800397e: f001 ff04 bl 800578a HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); StartMot(timMot1,BWMot1,pwmval); } } break; 8003982: e13c b.n 8003bfe }else if(IsPwmRunning(timMot1, FWMot1)){ 8003984: 2100 movs r1, #0 8003986: 48a1 ldr r0, [pc, #644] @ (8003c0c ) 8003988: f7ff fdde bl 8003548 800398c: 4603 mov r3, r0 800398e: 2b00 cmp r3, #0 8003990: d006 beq.n 80039a0 SetMotPwm(timMot1,FWMot1,pwmval); 8003992: 897b ldrh r3, [r7, #10] 8003994: 461a mov r2, r3 8003996: 2100 movs r1, #0 8003998: 489c ldr r0, [pc, #624] @ (8003c0c ) 800399a: f7ff fe22 bl 80035e2 break; 800399e: e12e b.n 8003bfe HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 80039a0: 2201 movs r2, #1 80039a2: 2102 movs r1, #2 80039a4: 489a ldr r0, [pc, #616] @ (8003c10 ) 80039a6: f001 fef0 bl 800578a StartMot(timMot1,FWMot1,pwmval); 80039aa: 897b ldrh r3, [r7, #10] 80039ac: 461a mov r2, r3 80039ae: 2100 movs r1, #0 80039b0: 4896 ldr r0, [pc, #600] @ (8003c0c ) 80039b2: f7ff fdeb bl 800358c break; 80039b6: e122 b.n 8003bfe if(pwmval==0){ 80039b8: 897b ldrh r3, [r7, #10] 80039ba: 2b00 cmp r3, #0 80039bc: d109 bne.n 80039d2 StopMot(timMot1,BWMot1); 80039be: 2104 movs r1, #4 80039c0: 4892 ldr r0, [pc, #584] @ (8003c0c ) 80039c2: f7ff fdd6 bl 8003572 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 80039c6: 2200 movs r2, #0 80039c8: 2102 movs r1, #2 80039ca: 4891 ldr r0, [pc, #580] @ (8003c10 ) 80039cc: f001 fedd bl 800578a break; 80039d0: e115 b.n 8003bfe }else if(IsPwmRunning(timMot1, BWMot1)){ 80039d2: 2104 movs r1, #4 80039d4: 488d ldr r0, [pc, #564] @ (8003c0c ) 80039d6: f7ff fdb7 bl 8003548 80039da: 4603 mov r3, r0 80039dc: 2b00 cmp r3, #0 80039de: d006 beq.n 80039ee SetMotPwm(timMot1,BWMot1,pwmval); 80039e0: 897b ldrh r3, [r7, #10] 80039e2: 461a mov r2, r3 80039e4: 2104 movs r1, #4 80039e6: 4889 ldr r0, [pc, #548] @ (8003c0c ) 80039e8: f7ff fdfb bl 80035e2 break; 80039ec: e107 b.n 8003bfe HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 80039ee: 2201 movs r2, #1 80039f0: 2102 movs r1, #2 80039f2: 4887 ldr r0, [pc, #540] @ (8003c10 ) 80039f4: f001 fec9 bl 800578a StartMot(timMot1,BWMot1,pwmval); 80039f8: 897b ldrh r3, [r7, #10] 80039fa: 461a mov r2, r3 80039fc: 2104 movs r1, #4 80039fe: 4883 ldr r0, [pc, #524] @ (8003c0c ) 8003a00: f7ff fdc4 bl 800358c break; 8003a04: e0fb b.n 8003bfe case 2: if(dir==FW){ 8003a06: 79bb ldrb r3, [r7, #6] 8003a08: 2b00 cmp r3, #0 8003a0a: d126 bne.n 8003a5a if(pwmval==0){ 8003a0c: 897b ldrh r3, [r7, #10] 8003a0e: 2b00 cmp r3, #0 8003a10: d109 bne.n 8003a26 StopMot(timMot2,FWMot2); 8003a12: 2108 movs r1, #8 8003a14: 487d ldr r0, [pc, #500] @ (8003c0c ) 8003a16: f7ff fdac bl 8003572 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 8003a1a: 2200 movs r2, #0 8003a1c: 2104 movs r1, #4 8003a1e: 487c ldr r0, [pc, #496] @ (8003c10 ) 8003a20: f001 feb3 bl 800578a }else{ HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); StartMot(timMot2,BWMot2,pwmval); } } break; 8003a24: e0eb b.n 8003bfe }else if(IsPwmRunning(timMot2, FWMot2)){ 8003a26: 2108 movs r1, #8 8003a28: 4878 ldr r0, [pc, #480] @ (8003c0c ) 8003a2a: f7ff fd8d bl 8003548 8003a2e: 4603 mov r3, r0 8003a30: 2b00 cmp r3, #0 8003a32: d006 beq.n 8003a42 SetMotPwm(timMot2,FWMot2,pwmval); 8003a34: 897b ldrh r3, [r7, #10] 8003a36: 461a mov r2, r3 8003a38: 2108 movs r1, #8 8003a3a: 4874 ldr r0, [pc, #464] @ (8003c0c ) 8003a3c: f7ff fdd1 bl 80035e2 break; 8003a40: e0dd b.n 8003bfe HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8003a42: 2201 movs r2, #1 8003a44: 2104 movs r1, #4 8003a46: 4872 ldr r0, [pc, #456] @ (8003c10 ) 8003a48: f001 fe9f bl 800578a StartMot(timMot2,FWMot2,pwmval); 8003a4c: 897b ldrh r3, [r7, #10] 8003a4e: 461a mov r2, r3 8003a50: 2108 movs r1, #8 8003a52: 486e ldr r0, [pc, #440] @ (8003c0c ) 8003a54: f7ff fd9a bl 800358c break; 8003a58: e0d1 b.n 8003bfe if(pwmval==0){ 8003a5a: 897b ldrh r3, [r7, #10] 8003a5c: 2b00 cmp r3, #0 8003a5e: d109 bne.n 8003a74 StopMot(timMot2,BWMot2); 8003a60: 210c movs r1, #12 8003a62: 486a ldr r0, [pc, #424] @ (8003c0c ) 8003a64: f7ff fd85 bl 8003572 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 8003a68: 2200 movs r2, #0 8003a6a: 2104 movs r1, #4 8003a6c: 4868 ldr r0, [pc, #416] @ (8003c10 ) 8003a6e: f001 fe8c bl 800578a break; 8003a72: e0c4 b.n 8003bfe }else if(IsPwmRunning(timMot2, BWMot2)){ 8003a74: 210c movs r1, #12 8003a76: 4865 ldr r0, [pc, #404] @ (8003c0c ) 8003a78: f7ff fd66 bl 8003548 8003a7c: 4603 mov r3, r0 8003a7e: 2b00 cmp r3, #0 8003a80: d006 beq.n 8003a90 SetMotPwm(timMot2,BWMot2,pwmval); 8003a82: 897b ldrh r3, [r7, #10] 8003a84: 461a mov r2, r3 8003a86: 210c movs r1, #12 8003a88: 4860 ldr r0, [pc, #384] @ (8003c0c ) 8003a8a: f7ff fdaa bl 80035e2 break; 8003a8e: e0b6 b.n 8003bfe HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8003a90: 2201 movs r2, #1 8003a92: 2104 movs r1, #4 8003a94: 485e ldr r0, [pc, #376] @ (8003c10 ) 8003a96: f001 fe78 bl 800578a StartMot(timMot2,BWMot2,pwmval); 8003a9a: 897b ldrh r3, [r7, #10] 8003a9c: 461a mov r2, r3 8003a9e: 210c movs r1, #12 8003aa0: 485a ldr r0, [pc, #360] @ (8003c0c ) 8003aa2: f7ff fd73 bl 800358c break; 8003aa6: e0aa b.n 8003bfe case 3: if(dir==FW){ 8003aa8: 79bb ldrb r3, [r7, #6] 8003aaa: 2b00 cmp r3, #0 8003aac: d128 bne.n 8003b00 if(pwmval==0){ 8003aae: 897b ldrh r3, [r7, #10] 8003ab0: 2b00 cmp r3, #0 8003ab2: d10a bne.n 8003aca StopMot(timMot3,FWMot3); 8003ab4: 2100 movs r1, #0 8003ab6: 4857 ldr r0, [pc, #348] @ (8003c14 ) 8003ab8: f7ff fd5b bl 8003572 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8003abc: 2200 movs r2, #0 8003abe: f44f 6180 mov.w r1, #1024 @ 0x400 8003ac2: 4853 ldr r0, [pc, #332] @ (8003c10 ) 8003ac4: f001 fe61 bl 800578a }else{ HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); StartMot(timMot3,BWMot3,pwmval); } } break; 8003ac8: e099 b.n 8003bfe }else if(IsPwmRunning(timMot3, FWMot3)){ 8003aca: 2100 movs r1, #0 8003acc: 4851 ldr r0, [pc, #324] @ (8003c14 ) 8003ace: f7ff fd3b bl 8003548 8003ad2: 4603 mov r3, r0 8003ad4: 2b00 cmp r3, #0 8003ad6: d006 beq.n 8003ae6 SetMotPwm(timMot3,FWMot3,pwmval); 8003ad8: 897b ldrh r3, [r7, #10] 8003ada: 461a mov r2, r3 8003adc: 2100 movs r1, #0 8003ade: 484d ldr r0, [pc, #308] @ (8003c14 ) 8003ae0: f7ff fd7f bl 80035e2 break; 8003ae4: e08b b.n 8003bfe HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8003ae6: 2201 movs r2, #1 8003ae8: f44f 6180 mov.w r1, #1024 @ 0x400 8003aec: 4848 ldr r0, [pc, #288] @ (8003c10 ) 8003aee: f001 fe4c bl 800578a StartMot(timMot3,FWMot3,pwmval); 8003af2: 897b ldrh r3, [r7, #10] 8003af4: 461a mov r2, r3 8003af6: 2100 movs r1, #0 8003af8: 4846 ldr r0, [pc, #280] @ (8003c14 ) 8003afa: f7ff fd47 bl 800358c break; 8003afe: e07e b.n 8003bfe if(pwmval==0){ 8003b00: 897b ldrh r3, [r7, #10] 8003b02: 2b00 cmp r3, #0 8003b04: d10a bne.n 8003b1c StopMot(timMot3,BWMot3); 8003b06: 2104 movs r1, #4 8003b08: 4842 ldr r0, [pc, #264] @ (8003c14 ) 8003b0a: f7ff fd32 bl 8003572 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8003b0e: 2200 movs r2, #0 8003b10: f44f 6180 mov.w r1, #1024 @ 0x400 8003b14: 483e ldr r0, [pc, #248] @ (8003c10 ) 8003b16: f001 fe38 bl 800578a break; 8003b1a: e070 b.n 8003bfe }else if(IsPwmRunning(timMot3, BWMot3)){ 8003b1c: 2104 movs r1, #4 8003b1e: 483d ldr r0, [pc, #244] @ (8003c14 ) 8003b20: f7ff fd12 bl 8003548 8003b24: 4603 mov r3, r0 8003b26: 2b00 cmp r3, #0 8003b28: d006 beq.n 8003b38 SetMotPwm(timMot3,BWMot3,pwmval); 8003b2a: 897b ldrh r3, [r7, #10] 8003b2c: 461a mov r2, r3 8003b2e: 2104 movs r1, #4 8003b30: 4838 ldr r0, [pc, #224] @ (8003c14 ) 8003b32: f7ff fd56 bl 80035e2 break; 8003b36: e062 b.n 8003bfe HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8003b38: 2201 movs r2, #1 8003b3a: f44f 6180 mov.w r1, #1024 @ 0x400 8003b3e: 4834 ldr r0, [pc, #208] @ (8003c10 ) 8003b40: f001 fe23 bl 800578a StartMot(timMot3,BWMot3,pwmval); 8003b44: 897b ldrh r3, [r7, #10] 8003b46: 461a mov r2, r3 8003b48: 2104 movs r1, #4 8003b4a: 4832 ldr r0, [pc, #200] @ (8003c14 ) 8003b4c: f7ff fd1e bl 800358c break; 8003b50: e055 b.n 8003bfe case 4: if(dir==FW){ 8003b52: 79bb ldrb r3, [r7, #6] 8003b54: 2b00 cmp r3, #0 8003b56: d128 bne.n 8003baa if(pwmval==0){ 8003b58: 897b ldrh r3, [r7, #10] 8003b5a: 2b00 cmp r3, #0 8003b5c: d10a bne.n 8003b74 StopMot(timMot4,FWMot4); 8003b5e: 2108 movs r1, #8 8003b60: 482c ldr r0, [pc, #176] @ (8003c14 ) 8003b62: f7ff fd06 bl 8003572 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 8003b66: 2200 movs r2, #0 8003b68: f44f 6100 mov.w r1, #2048 @ 0x800 8003b6c: 4828 ldr r0, [pc, #160] @ (8003c10 ) 8003b6e: f001 fe0c bl 800578a }else{ HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); StartMot(timMot4,BWMot4,pwmval); } } break; 8003b72: e044 b.n 8003bfe }else if(IsPwmRunning(timMot4, FWMot4)){ 8003b74: 2108 movs r1, #8 8003b76: 4827 ldr r0, [pc, #156] @ (8003c14 ) 8003b78: f7ff fce6 bl 8003548 8003b7c: 4603 mov r3, r0 8003b7e: 2b00 cmp r3, #0 8003b80: d006 beq.n 8003b90 SetMotPwm(timMot4,FWMot4,pwmval); 8003b82: 897b ldrh r3, [r7, #10] 8003b84: 461a mov r2, r3 8003b86: 2108 movs r1, #8 8003b88: 4822 ldr r0, [pc, #136] @ (8003c14 ) 8003b8a: f7ff fd2a bl 80035e2 break; 8003b8e: e036 b.n 8003bfe HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8003b90: 2201 movs r2, #1 8003b92: f44f 6100 mov.w r1, #2048 @ 0x800 8003b96: 481e ldr r0, [pc, #120] @ (8003c10 ) 8003b98: f001 fdf7 bl 800578a StartMot(timMot4,FWMot4,pwmval); 8003b9c: 897b ldrh r3, [r7, #10] 8003b9e: 461a mov r2, r3 8003ba0: 2108 movs r1, #8 8003ba2: 481c ldr r0, [pc, #112] @ (8003c14 ) 8003ba4: f7ff fcf2 bl 800358c break; 8003ba8: e029 b.n 8003bfe if(pwmval==0){ 8003baa: 897b ldrh r3, [r7, #10] 8003bac: 2b00 cmp r3, #0 8003bae: d10a bne.n 8003bc6 StopMot(timMot4,BWMot4); 8003bb0: 210c movs r1, #12 8003bb2: 4818 ldr r0, [pc, #96] @ (8003c14 ) 8003bb4: f7ff fcdd bl 8003572 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 8003bb8: 2200 movs r2, #0 8003bba: f44f 6100 mov.w r1, #2048 @ 0x800 8003bbe: 4814 ldr r0, [pc, #80] @ (8003c10 ) 8003bc0: f001 fde3 bl 800578a break; 8003bc4: e01b b.n 8003bfe }else if(IsPwmRunning(timMot4, BWMot4)){ 8003bc6: 210c movs r1, #12 8003bc8: 4812 ldr r0, [pc, #72] @ (8003c14 ) 8003bca: f7ff fcbd bl 8003548 8003bce: 4603 mov r3, r0 8003bd0: 2b00 cmp r3, #0 8003bd2: d006 beq.n 8003be2 SetMotPwm(timMot4,BWMot4,pwmval); 8003bd4: 897b ldrh r3, [r7, #10] 8003bd6: 461a mov r2, r3 8003bd8: 210c movs r1, #12 8003bda: 480e ldr r0, [pc, #56] @ (8003c14 ) 8003bdc: f7ff fd01 bl 80035e2 break; 8003be0: e00d b.n 8003bfe HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8003be2: 2201 movs r2, #1 8003be4: f44f 6100 mov.w r1, #2048 @ 0x800 8003be8: 4809 ldr r0, [pc, #36] @ (8003c10 ) 8003bea: f001 fdce bl 800578a StartMot(timMot4,BWMot4,pwmval); 8003bee: 897b ldrh r3, [r7, #10] 8003bf0: 461a mov r2, r3 8003bf2: 210c movs r1, #12 8003bf4: 4807 ldr r0, [pc, #28] @ (8003c14 ) 8003bf6: f7ff fcc9 bl 800358c break; 8003bfa: e000 b.n 8003bfe default: break; 8003bfc: bf00 nop } } 8003bfe: bf00 nop 8003c00: 3710 adds r7, #16 8003c02: 46bd mov sp, r7 8003c04: bd80 pop {r7, pc} 8003c06: bf00 nop 8003c08: 51eb851f .word 0x51eb851f 8003c0c: 20000310 .word 0x20000310 8003c10: 40010c00 .word 0x40010c00 8003c14: 20000358 .word 0x20000358 08003c18 : uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){ 8003c18: b590 push {r4, r7, lr} 8003c1a: b085 sub sp, #20 8003c1c: af00 add r7, sp, #0 8003c1e: 4604 mov r4, r0 8003c20: 4608 mov r0, r1 8003c22: 4611 mov r1, r2 8003c24: 461a mov r2, r3 8003c26: 4623 mov r3, r4 8003c28: 71fb strb r3, [r7, #7] 8003c2a: 4603 mov r3, r0 8003c2c: 71bb strb r3, [r7, #6] 8003c2e: 460b mov r3, r1 8003c30: 717b strb r3, [r7, #5] 8003c32: 4613 mov r3, r2 8003c34: 713b strb r3, [r7, #4] static uint8_t memrtramp[4]; uint16_t delta; switch(mode){ 8003c36: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 8003c3a: 2b00 cmp r3, #0 8003c3c: d002 beq.n 8003c44 8003c3e: 2b0a cmp r3, #10 8003c40: d013 beq.n 8003c6a 8003c42: e0a5 b.n 8003d90 case RAMPINIT: memrtramp[mot-1]=percStart=tr; 8003c44: f897 3020 ldrb.w r3, [r7, #32] 8003c48: 717b strb r3, [r7, #5] 8003c4a: 79fb ldrb r3, [r7, #7] 8003c4c: 3b01 subs r3, #1 8003c4e: 4953 ldr r1, [pc, #332] @ (8003d9c ) 8003c50: 797a ldrb r2, [r7, #5] 8003c52: 54ca strb r2, [r1, r3] SetMotPerc(mot,dir,mrampstart[mot-1]); 8003c54: 79fb ldrb r3, [r7, #7] 8003c56: 3b01 subs r3, #1 8003c58: 4a51 ldr r2, [pc, #324] @ (8003da0 ) 8003c5a: 5cd2 ldrb r2, [r2, r3] 8003c5c: 79b9 ldrb r1, [r7, #6] 8003c5e: 79fb ldrb r3, [r7, #7] 8003c60: 4618 mov r0, r3 8003c62: f7ff fe59 bl 8003918 return DONE; 8003c66: 2300 movs r3, #0 8003c68: e093 b.n 8003d92 case RAMPRUN: if(memrtramp[mot-1]!=rtramp[mot-1]){ 8003c6a: 79fb ldrb r3, [r7, #7] 8003c6c: 3b01 subs r3, #1 8003c6e: 4a4b ldr r2, [pc, #300] @ (8003d9c ) 8003c70: 5cd2 ldrb r2, [r2, r3] 8003c72: 79fb ldrb r3, [r7, #7] 8003c74: 3b01 subs r3, #1 8003c76: 494b ldr r1, [pc, #300] @ (8003da4 ) 8003c78: 5ccb ldrb r3, [r1, r3] 8003c7a: b2db uxtb r3, r3 8003c7c: 429a cmp r2, r3 8003c7e: f000 8085 beq.w 8003d8c memrtramp[mot-1]=rtramp[mot-1]; 8003c82: 79fb ldrb r3, [r7, #7] 8003c84: 1e5a subs r2, r3, #1 8003c86: 79fb ldrb r3, [r7, #7] 8003c88: 3b01 subs r3, #1 8003c8a: 4946 ldr r1, [pc, #280] @ (8003da4 ) 8003c8c: 5c8a ldrb r2, [r1, r2] 8003c8e: b2d1 uxtb r1, r2 8003c90: 4a42 ldr r2, [pc, #264] @ (8003d9c ) 8003c92: 54d1 strb r1, [r2, r3] if(rtramp[mot-1]){ 8003c94: 79fb ldrb r3, [r7, #7] 8003c96: 3b01 subs r3, #1 8003c98: 4a42 ldr r2, [pc, #264] @ (8003da4 ) 8003c9a: 5cd3 ldrb r3, [r2, r3] 8003c9c: b2db uxtb r3, r3 8003c9e: 2b00 cmp r3, #0 8003ca0: d06c beq.n 8003d7c if(mrampstart[mot-1]>percEnd){ 8003ca2: 79fb ldrb r3, [r7, #7] 8003ca4: 3b01 subs r3, #1 8003ca6: 4a3e ldr r2, [pc, #248] @ (8003da0 ) 8003ca8: 5cd3 ldrb r3, [r2, r3] 8003caa: 793a ldrb r2, [r7, #4] 8003cac: 429a cmp r2, r3 8003cae: d22b bcs.n 8003d08 delta=mrampstart[mot-1]-percEnd; 8003cb0: 79fb ldrb r3, [r7, #7] 8003cb2: 3b01 subs r3, #1 8003cb4: 4a3a ldr r2, [pc, #232] @ (8003da0 ) 8003cb6: 5cd3 ldrb r3, [r2, r3] 8003cb8: 461a mov r2, r3 8003cba: 793b ldrb r3, [r7, #4] 8003cbc: b29b uxth r3, r3 8003cbe: 1ad3 subs r3, r2, r3 8003cc0: 81fb strh r3, [r7, #14] delta=delta*(uint16_t)(tr-rtramp[mot-1]); 8003cc2: f897 3020 ldrb.w r3, [r7, #32] 8003cc6: b29b uxth r3, r3 8003cc8: 79fa ldrb r2, [r7, #7] 8003cca: 3a01 subs r2, #1 8003ccc: 4935 ldr r1, [pc, #212] @ (8003da4 ) 8003cce: 5c8a ldrb r2, [r1, r2] 8003cd0: b2d2 uxtb r2, r2 8003cd2: 1a9b subs r3, r3, r2 8003cd4: b29b uxth r3, r3 8003cd6: 89fa ldrh r2, [r7, #14] 8003cd8: fb02 f303 mul.w r3, r2, r3 8003cdc: 81fb strh r3, [r7, #14] delta=delta/tr; 8003cde: 89fa ldrh r2, [r7, #14] 8003ce0: f897 3020 ldrb.w r3, [r7, #32] 8003ce4: fb92 f3f3 sdiv r3, r2, r3 8003ce8: 81fb strh r3, [r7, #14] SetMotPerc(mot,dir,mrampstart[mot-1]-delta); 8003cea: 79fb ldrb r3, [r7, #7] 8003cec: 3b01 subs r3, #1 8003cee: 4a2c ldr r2, [pc, #176] @ (8003da0 ) 8003cf0: 5cd2 ldrb r2, [r2, r3] 8003cf2: 89fb ldrh r3, [r7, #14] 8003cf4: b2db uxtb r3, r3 8003cf6: 1ad3 subs r3, r2, r3 8003cf8: b2da uxtb r2, r3 8003cfa: 79b9 ldrb r1, [r7, #6] 8003cfc: 79fb ldrb r3, [r7, #7] 8003cfe: 4618 mov r0, r3 8003d00: f7ff fe0a bl 8003918 return RUNNING; 8003d04: 2301 movs r3, #1 8003d06: e044 b.n 8003d92 }else if(mrampstart[mot-1]) 8003d0e: 5cd3 ldrb r3, [r2, r3] 8003d10: 793a ldrb r2, [r7, #4] 8003d12: 429a cmp r2, r3 8003d14: d92a bls.n 8003d6c delta=percEnd-mrampstart[mot-1]; 8003d16: 793b ldrb r3, [r7, #4] 8003d18: b29b uxth r3, r3 8003d1a: 79fa ldrb r2, [r7, #7] 8003d1c: 3a01 subs r2, #1 8003d1e: 4920 ldr r1, [pc, #128] @ (8003da0 ) 8003d20: 5c8a ldrb r2, [r1, r2] 8003d22: 1a9b subs r3, r3, r2 8003d24: 81fb strh r3, [r7, #14] delta=delta*(uint16_t)(tr-rtramp[mot-1]); 8003d26: f897 3020 ldrb.w r3, [r7, #32] 8003d2a: b29b uxth r3, r3 8003d2c: 79fa ldrb r2, [r7, #7] 8003d2e: 3a01 subs r2, #1 8003d30: 491c ldr r1, [pc, #112] @ (8003da4 ) 8003d32: 5c8a ldrb r2, [r1, r2] 8003d34: b2d2 uxtb r2, r2 8003d36: 1a9b subs r3, r3, r2 8003d38: b29b uxth r3, r3 8003d3a: 89fa ldrh r2, [r7, #14] 8003d3c: fb02 f303 mul.w r3, r2, r3 8003d40: 81fb strh r3, [r7, #14] delta=delta/tr; 8003d42: 89fa ldrh r2, [r7, #14] 8003d44: f897 3020 ldrb.w r3, [r7, #32] 8003d48: fb92 f3f3 sdiv r3, r2, r3 8003d4c: 81fb strh r3, [r7, #14] SetMotPerc(mot,dir,mrampstart[mot-1]+delta); 8003d4e: 79fb ldrb r3, [r7, #7] 8003d50: 3b01 subs r3, #1 8003d52: 4a13 ldr r2, [pc, #76] @ (8003da0 ) 8003d54: 5cd2 ldrb r2, [r2, r3] 8003d56: 89fb ldrh r3, [r7, #14] 8003d58: b2db uxtb r3, r3 8003d5a: 4413 add r3, r2 8003d5c: b2da uxtb r2, r3 8003d5e: 79b9 ldrb r1, [r7, #6] 8003d60: 79fb ldrb r3, [r7, #7] 8003d62: 4618 mov r0, r3 8003d64: f7ff fdd8 bl 8003918 return RUNNING; 8003d68: 2301 movs r3, #1 8003d6a: e012 b.n 8003d92 }else{ SetMotPerc(mot,dir,percEnd); 8003d6c: 793a ldrb r2, [r7, #4] 8003d6e: 79b9 ldrb r1, [r7, #6] 8003d70: 79fb ldrb r3, [r7, #7] 8003d72: 4618 mov r0, r3 8003d74: f7ff fdd0 bl 8003918 return DONE; 8003d78: 2300 movs r3, #0 8003d7a: e00a b.n 8003d92 } }else{ SetMotPerc(mot,dir,percEnd); 8003d7c: 793a ldrb r2, [r7, #4] 8003d7e: 79b9 ldrb r1, [r7, #6] 8003d80: 79fb ldrb r3, [r7, #7] 8003d82: 4618 mov r0, r3 8003d84: f7ff fdc8 bl 8003918 return DONE; 8003d88: 2300 movs r3, #0 8003d8a: e002 b.n 8003d92 } }else return RUNNING; 8003d8c: 2301 movs r3, #1 8003d8e: e000 b.n 8003d92 break; } return DONE; 8003d90: 2300 movs r3, #0 } 8003d92: 4618 mov r0, r3 8003d94: 3714 adds r7, #20 8003d96: 46bd mov sp, r7 8003d98: bd90 pop {r4, r7, pc} 8003d9a: bf00 nop 8003d9c: 20000440 .word 0x20000440 8003da0: 20000428 .word 0x20000428 8003da4: 200003ec .word 0x200003ec 08003da8 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8003da8: b480 push {r7} 8003daa: b085 sub sp, #20 8003dac: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8003dae: 4b15 ldr r3, [pc, #84] @ (8003e04 ) 8003db0: 699b ldr r3, [r3, #24] 8003db2: 4a14 ldr r2, [pc, #80] @ (8003e04 ) 8003db4: f043 0301 orr.w r3, r3, #1 8003db8: 6193 str r3, [r2, #24] 8003dba: 4b12 ldr r3, [pc, #72] @ (8003e04 ) 8003dbc: 699b ldr r3, [r3, #24] 8003dbe: f003 0301 and.w r3, r3, #1 8003dc2: 60bb str r3, [r7, #8] 8003dc4: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 8003dc6: 4b0f ldr r3, [pc, #60] @ (8003e04 ) 8003dc8: 69db ldr r3, [r3, #28] 8003dca: 4a0e ldr r2, [pc, #56] @ (8003e04 ) 8003dcc: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8003dd0: 61d3 str r3, [r2, #28] 8003dd2: 4b0c ldr r3, [pc, #48] @ (8003e04 ) 8003dd4: 69db ldr r3, [r3, #28] 8003dd6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003dda: 607b str r3, [r7, #4] 8003ddc: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8003dde: 4b0a ldr r3, [pc, #40] @ (8003e08 ) 8003de0: 685b ldr r3, [r3, #4] 8003de2: 60fb str r3, [r7, #12] 8003de4: 68fb ldr r3, [r7, #12] 8003de6: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 8003dea: 60fb str r3, [r7, #12] 8003dec: 68fb ldr r3, [r7, #12] 8003dee: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8003df2: 60fb str r3, [r7, #12] 8003df4: 4a04 ldr r2, [pc, #16] @ (8003e08 ) 8003df6: 68fb ldr r3, [r7, #12] 8003df8: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8003dfa: bf00 nop 8003dfc: 3714 adds r7, #20 8003dfe: 46bd mov sp, r7 8003e00: bc80 pop {r7} 8003e02: 4770 bx lr 8003e04: 40021000 .word 0x40021000 8003e08: 40010000 .word 0x40010000 08003e0c : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { 8003e0c: b580 push {r7, lr} 8003e0e: b08a sub sp, #40 @ 0x28 8003e10: af00 add r7, sp, #0 8003e12: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003e14: f107 0318 add.w r3, r7, #24 8003e18: 2200 movs r2, #0 8003e1a: 601a str r2, [r3, #0] 8003e1c: 605a str r2, [r3, #4] 8003e1e: 609a str r2, [r3, #8] 8003e20: 60da str r2, [r3, #12] if(hadc->Instance==ADC1) 8003e22: 687b ldr r3, [r7, #4] 8003e24: 681b ldr r3, [r3, #0] 8003e26: 4a33 ldr r2, [pc, #204] @ (8003ef4 ) 8003e28: 4293 cmp r3, r2 8003e2a: d15f bne.n 8003eec { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 8003e2c: 4b32 ldr r3, [pc, #200] @ (8003ef8 ) 8003e2e: 699b ldr r3, [r3, #24] 8003e30: 4a31 ldr r2, [pc, #196] @ (8003ef8 ) 8003e32: f443 7300 orr.w r3, r3, #512 @ 0x200 8003e36: 6193 str r3, [r2, #24] 8003e38: 4b2f ldr r3, [pc, #188] @ (8003ef8 ) 8003e3a: 699b ldr r3, [r3, #24] 8003e3c: f403 7300 and.w r3, r3, #512 @ 0x200 8003e40: 617b str r3, [r7, #20] 8003e42: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8003e44: 4b2c ldr r3, [pc, #176] @ (8003ef8 ) 8003e46: 699b ldr r3, [r3, #24] 8003e48: 4a2b ldr r2, [pc, #172] @ (8003ef8 ) 8003e4a: f043 0304 orr.w r3, r3, #4 8003e4e: 6193 str r3, [r2, #24] 8003e50: 4b29 ldr r3, [pc, #164] @ (8003ef8 ) 8003e52: 699b ldr r3, [r3, #24] 8003e54: f003 0304 and.w r3, r3, #4 8003e58: 613b str r3, [r7, #16] 8003e5a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 8003e5c: 4b26 ldr r3, [pc, #152] @ (8003ef8 ) 8003e5e: 699b ldr r3, [r3, #24] 8003e60: 4a25 ldr r2, [pc, #148] @ (8003ef8 ) 8003e62: f043 0308 orr.w r3, r3, #8 8003e66: 6193 str r3, [r2, #24] 8003e68: 4b23 ldr r3, [pc, #140] @ (8003ef8 ) 8003e6a: 699b ldr r3, [r3, #24] 8003e6c: f003 0308 and.w r3, r3, #8 8003e70: 60fb str r3, [r7, #12] 8003e72: 68fb ldr r3, [r7, #12] PA5 ------> ADC1_IN5 PA6 ------> ADC1_IN6 PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin; 8003e74: 23f0 movs r3, #240 @ 0xf0 8003e76: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8003e78: 2303 movs r3, #3 8003e7a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003e7c: f107 0318 add.w r3, r7, #24 8003e80: 4619 mov r1, r3 8003e82: 481e ldr r0, [pc, #120] @ (8003efc ) 8003e84: f001 fae6 bl 8005454 GPIO_InitStruct.Pin = ANEM_Pin; 8003e88: 2301 movs r3, #1 8003e8a: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8003e8c: 2303 movs r3, #3 8003e8e: 61fb str r3, [r7, #28] HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct); 8003e90: f107 0318 add.w r3, r7, #24 8003e94: 4619 mov r1, r3 8003e96: 481a ldr r0, [pc, #104] @ (8003f00 ) 8003e98: f001 fadc bl 8005454 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; 8003e9c: 4b19 ldr r3, [pc, #100] @ (8003f04 ) 8003e9e: 4a1a ldr r2, [pc, #104] @ (8003f08 ) 8003ea0: 601a str r2, [r3, #0] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8003ea2: 4b18 ldr r3, [pc, #96] @ (8003f04 ) 8003ea4: 2200 movs r2, #0 8003ea6: 605a str r2, [r3, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 8003ea8: 4b16 ldr r3, [pc, #88] @ (8003f04 ) 8003eaa: 2200 movs r2, #0 8003eac: 609a str r2, [r3, #8] hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8003eae: 4b15 ldr r3, [pc, #84] @ (8003f04 ) 8003eb0: 2280 movs r2, #128 @ 0x80 8003eb2: 60da str r2, [r3, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 8003eb4: 4b13 ldr r3, [pc, #76] @ (8003f04 ) 8003eb6: f44f 7280 mov.w r2, #256 @ 0x100 8003eba: 611a str r2, [r3, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 8003ebc: 4b11 ldr r3, [pc, #68] @ (8003f04 ) 8003ebe: f44f 6280 mov.w r2, #1024 @ 0x400 8003ec2: 615a str r2, [r3, #20] hdma_adc1.Init.Mode = DMA_CIRCULAR; 8003ec4: 4b0f ldr r3, [pc, #60] @ (8003f04 ) 8003ec6: 2220 movs r2, #32 8003ec8: 619a str r2, [r3, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 8003eca: 4b0e ldr r3, [pc, #56] @ (8003f04 ) 8003ecc: 2200 movs r2, #0 8003ece: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8003ed0: 480c ldr r0, [pc, #48] @ (8003f04 ) 8003ed2: f000 fed1 bl 8004c78 8003ed6: 4603 mov r3, r0 8003ed8: 2b00 cmp r3, #0 8003eda: d001 beq.n 8003ee0 { Error_Handler(); 8003edc: f7ff fb2e bl 800353c } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 8003ee0: 687b ldr r3, [r7, #4] 8003ee2: 4a08 ldr r2, [pc, #32] @ (8003f04 ) 8003ee4: 621a str r2, [r3, #32] 8003ee6: 4a07 ldr r2, [pc, #28] @ (8003f04 ) 8003ee8: 687b ldr r3, [r7, #4] 8003eea: 6253 str r3, [r2, #36] @ 0x24 /* USER CODE END ADC1_MspInit 1 */ } } 8003eec: bf00 nop 8003eee: 3728 adds r7, #40 @ 0x28 8003ef0: 46bd mov sp, r7 8003ef2: bd80 pop {r7, pc} 8003ef4: 40012400 .word 0x40012400 8003ef8: 40021000 .word 0x40021000 8003efc: 40010800 .word 0x40010800 8003f00: 40010c00 .word 0x40010c00 8003f04: 200002cc .word 0x200002cc 8003f08: 40020008 .word 0x40020008 08003f0c : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 8003f0c: b480 push {r7} 8003f0e: b085 sub sp, #20 8003f10: af00 add r7, sp, #0 8003f12: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM2) 8003f14: 687b ldr r3, [r7, #4] 8003f16: 681b ldr r3, [r3, #0] 8003f18: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8003f1c: d10c bne.n 8003f38 { /* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE END TIM2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM2_CLK_ENABLE(); 8003f1e: 4b11 ldr r3, [pc, #68] @ (8003f64 ) 8003f20: 69db ldr r3, [r3, #28] 8003f22: 4a10 ldr r2, [pc, #64] @ (8003f64 ) 8003f24: f043 0301 orr.w r3, r3, #1 8003f28: 61d3 str r3, [r2, #28] 8003f2a: 4b0e ldr r3, [pc, #56] @ (8003f64 ) 8003f2c: 69db ldr r3, [r3, #28] 8003f2e: f003 0301 and.w r3, r3, #1 8003f32: 60fb str r3, [r7, #12] 8003f34: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 8003f36: e010 b.n 8003f5a else if(htim_base->Instance==TIM4) 8003f38: 687b ldr r3, [r7, #4] 8003f3a: 681b ldr r3, [r3, #0] 8003f3c: 4a0a ldr r2, [pc, #40] @ (8003f68 ) 8003f3e: 4293 cmp r3, r2 8003f40: d10b bne.n 8003f5a __HAL_RCC_TIM4_CLK_ENABLE(); 8003f42: 4b08 ldr r3, [pc, #32] @ (8003f64 ) 8003f44: 69db ldr r3, [r3, #28] 8003f46: 4a07 ldr r2, [pc, #28] @ (8003f64 ) 8003f48: f043 0304 orr.w r3, r3, #4 8003f4c: 61d3 str r3, [r2, #28] 8003f4e: 4b05 ldr r3, [pc, #20] @ (8003f64 ) 8003f50: 69db ldr r3, [r3, #28] 8003f52: f003 0304 and.w r3, r3, #4 8003f56: 60bb str r3, [r7, #8] 8003f58: 68bb ldr r3, [r7, #8] } 8003f5a: bf00 nop 8003f5c: 3714 adds r7, #20 8003f5e: 46bd mov sp, r7 8003f60: bc80 pop {r7} 8003f62: 4770 bx lr 8003f64: 40021000 .word 0x40021000 8003f68: 40000800 .word 0x40000800 08003f6c : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 8003f6c: b580 push {r7, lr} 8003f6e: b088 sub sp, #32 8003f70: af00 add r7, sp, #0 8003f72: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003f74: f107 0310 add.w r3, r7, #16 8003f78: 2200 movs r2, #0 8003f7a: 601a str r2, [r3, #0] 8003f7c: 605a str r2, [r3, #4] 8003f7e: 609a str r2, [r3, #8] 8003f80: 60da str r2, [r3, #12] if(htim->Instance==TIM2) 8003f82: 687b ldr r3, [r7, #4] 8003f84: 681b ldr r3, [r3, #0] 8003f86: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8003f8a: d118 bne.n 8003fbe { /* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8003f8c: 4b1d ldr r3, [pc, #116] @ (8004004 ) 8003f8e: 699b ldr r3, [r3, #24] 8003f90: 4a1c ldr r2, [pc, #112] @ (8004004 ) 8003f92: f043 0304 orr.w r3, r3, #4 8003f96: 6193 str r3, [r2, #24] 8003f98: 4b1a ldr r3, [pc, #104] @ (8004004 ) 8003f9a: 699b ldr r3, [r3, #24] 8003f9c: f003 0304 and.w r3, r3, #4 8003fa0: 60fb str r3, [r7, #12] 8003fa2: 68fb ldr r3, [r7, #12] PA0-WKUP ------> TIM2_CH1 PA1 ------> TIM2_CH2 PA2 ------> TIM2_CH3 PA3 ------> TIM2_CH4 */ GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin; 8003fa4: 230f movs r3, #15 8003fa6: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003fa8: 2302 movs r3, #2 8003faa: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003fac: 2302 movs r3, #2 8003fae: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003fb0: f107 0310 add.w r3, r7, #16 8003fb4: 4619 mov r1, r3 8003fb6: 4814 ldr r0, [pc, #80] @ (8004008 ) 8003fb8: f001 fa4c bl 8005454 /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 8003fbc: e01d b.n 8003ffa else if(htim->Instance==TIM4) 8003fbe: 687b ldr r3, [r7, #4] 8003fc0: 681b ldr r3, [r3, #0] 8003fc2: 4a12 ldr r2, [pc, #72] @ (800400c ) 8003fc4: 4293 cmp r3, r2 8003fc6: d118 bne.n 8003ffa __HAL_RCC_GPIOB_CLK_ENABLE(); 8003fc8: 4b0e ldr r3, [pc, #56] @ (8004004 ) 8003fca: 699b ldr r3, [r3, #24] 8003fcc: 4a0d ldr r2, [pc, #52] @ (8004004 ) 8003fce: f043 0308 orr.w r3, r3, #8 8003fd2: 6193 str r3, [r2, #24] 8003fd4: 4b0b ldr r3, [pc, #44] @ (8004004 ) 8003fd6: 699b ldr r3, [r3, #24] 8003fd8: f003 0308 and.w r3, r3, #8 8003fdc: 60bb str r3, [r7, #8] 8003fde: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin; 8003fe0: f44f 7370 mov.w r3, #960 @ 0x3c0 8003fe4: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003fe6: 2302 movs r3, #2 8003fe8: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003fea: 2302 movs r3, #2 8003fec: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8003fee: f107 0310 add.w r3, r7, #16 8003ff2: 4619 mov r1, r3 8003ff4: 4806 ldr r0, [pc, #24] @ (8004010 ) 8003ff6: f001 fa2d bl 8005454 } 8003ffa: bf00 nop 8003ffc: 3720 adds r7, #32 8003ffe: 46bd mov sp, r7 8004000: bd80 pop {r7, pc} 8004002: bf00 nop 8004004: 40021000 .word 0x40021000 8004008: 40010800 .word 0x40010800 800400c: 40000800 .word 0x40000800 8004010: 40010c00 .word 0x40010c00 08004014 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8004014: b580 push {r7, lr} 8004016: b088 sub sp, #32 8004018: af00 add r7, sp, #0 800401a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800401c: f107 0310 add.w r3, r7, #16 8004020: 2200 movs r2, #0 8004022: 601a str r2, [r3, #0] 8004024: 605a str r2, [r3, #4] 8004026: 609a str r2, [r3, #8] 8004028: 60da str r2, [r3, #12] if(huart->Instance==USART1) 800402a: 687b ldr r3, [r7, #4] 800402c: 681b ldr r3, [r3, #0] 800402e: 4a1c ldr r2, [pc, #112] @ (80040a0 ) 8004030: 4293 cmp r3, r2 8004032: d131 bne.n 8004098 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8004034: 4b1b ldr r3, [pc, #108] @ (80040a4 ) 8004036: 699b ldr r3, [r3, #24] 8004038: 4a1a ldr r2, [pc, #104] @ (80040a4 ) 800403a: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800403e: 6193 str r3, [r2, #24] 8004040: 4b18 ldr r3, [pc, #96] @ (80040a4 ) 8004042: 699b ldr r3, [r3, #24] 8004044: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004048: 60fb str r3, [r7, #12] 800404a: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 800404c: 4b15 ldr r3, [pc, #84] @ (80040a4 ) 800404e: 699b ldr r3, [r3, #24] 8004050: 4a14 ldr r2, [pc, #80] @ (80040a4 ) 8004052: f043 0304 orr.w r3, r3, #4 8004056: 6193 str r3, [r2, #24] 8004058: 4b12 ldr r3, [pc, #72] @ (80040a4 ) 800405a: 699b ldr r3, [r3, #24] 800405c: f003 0304 and.w r3, r3, #4 8004060: 60bb str r3, [r7, #8] 8004062: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; 8004064: f44f 7300 mov.w r3, #512 @ 0x200 8004068: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800406a: 2302 movs r3, #2 800406c: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 800406e: 2303 movs r3, #3 8004070: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8004072: f107 0310 add.w r3, r7, #16 8004076: 4619 mov r1, r3 8004078: 480b ldr r0, [pc, #44] @ (80040a8 ) 800407a: f001 f9eb bl 8005454 GPIO_InitStruct.Pin = GPIO_PIN_10; 800407e: f44f 6380 mov.w r3, #1024 @ 0x400 8004082: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8004084: 2300 movs r3, #0 8004086: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8004088: 2300 movs r3, #0 800408a: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800408c: f107 0310 add.w r3, r7, #16 8004090: 4619 mov r1, r3 8004092: 4805 ldr r0, [pc, #20] @ (80040a8 ) 8004094: f001 f9de bl 8005454 /* USER CODE END USART1_MspInit 1 */ } } 8004098: bf00 nop 800409a: 3720 adds r7, #32 800409c: 46bd mov sp, r7 800409e: bd80 pop {r7, pc} 80040a0: 40013800 .word 0x40013800 80040a4: 40021000 .word 0x40021000 80040a8: 40010800 .word 0x40010800 080040ac : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 80040ac: b480 push {r7} 80040ae: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 80040b0: bf00 nop 80040b2: e7fd b.n 80040b0 080040b4 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80040b4: b480 push {r7} 80040b6: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 80040b8: bf00 nop 80040ba: e7fd b.n 80040b8 080040bc : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80040bc: b480 push {r7} 80040be: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 80040c0: bf00 nop 80040c2: e7fd b.n 80040c0 080040c4 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 80040c4: b480 push {r7} 80040c6: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 80040c8: bf00 nop 80040ca: e7fd b.n 80040c8 080040cc : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80040cc: b480 push {r7} 80040ce: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 80040d0: bf00 nop 80040d2: e7fd b.n 80040d0 080040d4 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 80040d4: b480 push {r7} 80040d6: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 80040d8: bf00 nop 80040da: 46bd mov sp, r7 80040dc: bc80 pop {r7} 80040de: 4770 bx lr 080040e0 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 80040e0: b480 push {r7} 80040e2: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 80040e4: bf00 nop 80040e6: 46bd mov sp, r7 80040e8: bc80 pop {r7} 80040ea: 4770 bx lr 080040ec : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80040ec: b480 push {r7} 80040ee: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 80040f0: bf00 nop 80040f2: 46bd mov sp, r7 80040f4: bc80 pop {r7} 80040f6: 4770 bx lr 080040f8 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 80040f8: b580 push {r7, lr} 80040fa: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 80040fc: f000 f8c0 bl 8004280 /* USER CODE BEGIN SysTick_IRQn 1 */ HAL_SYSTICK_IRQHandler(); 8004100: f000 fdb3 bl 8004c6a /* USER CODE END SysTick_IRQn 1 */ } 8004104: bf00 nop 8004106: bd80 pop {r7, pc} 08004108 : /** * @brief This function handles DMA1 channel1 global interrupt. */ void DMA1_Channel1_IRQHandler(void) { 8004108: b580 push {r7, lr} 800410a: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 800410c: 4802 ldr r0, [pc, #8] @ (8004118 ) 800410e: f000 fe6d bl 8004dec /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ /* USER CODE END DMA1_Channel1_IRQn 1 */ } 8004112: bf00 nop 8004114: bd80 pop {r7, pc} 8004116: bf00 nop 8004118: 200002cc .word 0x200002cc 0800411c : /** * @brief This function handles USB low priority or CAN RX0 interrupts. */ void USB_LP_CAN1_RX0_IRQHandler(void) { 800411c: b580 push {r7, lr} 800411e: af00 add r7, sp, #0 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */ HAL_PCD_IRQHandler(&hpcd_USB_FS); 8004120: 4802 ldr r0, [pc, #8] @ (800412c ) 8004122: f001 fc7f bl 8005a24 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */ } 8004126: bf00 nop 8004128: bd80 pop {r7, pc} 800412a: bf00 nop 800412c: 2000123c .word 0x2000123c 08004130 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8004130: b580 push {r7, lr} 8004132: b086 sub sp, #24 8004134: af00 add r7, sp, #0 8004136: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8004138: 4a14 ldr r2, [pc, #80] @ (800418c <_sbrk+0x5c>) 800413a: 4b15 ldr r3, [pc, #84] @ (8004190 <_sbrk+0x60>) 800413c: 1ad3 subs r3, r2, r3 800413e: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8004140: 697b ldr r3, [r7, #20] 8004142: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8004144: 4b13 ldr r3, [pc, #76] @ (8004194 <_sbrk+0x64>) 8004146: 681b ldr r3, [r3, #0] 8004148: 2b00 cmp r3, #0 800414a: d102 bne.n 8004152 <_sbrk+0x22> { __sbrk_heap_end = &_end; 800414c: 4b11 ldr r3, [pc, #68] @ (8004194 <_sbrk+0x64>) 800414e: 4a12 ldr r2, [pc, #72] @ (8004198 <_sbrk+0x68>) 8004150: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 8004152: 4b10 ldr r3, [pc, #64] @ (8004194 <_sbrk+0x64>) 8004154: 681a ldr r2, [r3, #0] 8004156: 687b ldr r3, [r7, #4] 8004158: 4413 add r3, r2 800415a: 693a ldr r2, [r7, #16] 800415c: 429a cmp r2, r3 800415e: d207 bcs.n 8004170 <_sbrk+0x40> { errno = ENOMEM; 8004160: f009 fa44 bl 800d5ec <__errno> 8004164: 4603 mov r3, r0 8004166: 220c movs r2, #12 8004168: 601a str r2, [r3, #0] return (void *)-1; 800416a: f04f 33ff mov.w r3, #4294967295 800416e: e009 b.n 8004184 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 8004170: 4b08 ldr r3, [pc, #32] @ (8004194 <_sbrk+0x64>) 8004172: 681b ldr r3, [r3, #0] 8004174: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8004176: 4b07 ldr r3, [pc, #28] @ (8004194 <_sbrk+0x64>) 8004178: 681a ldr r2, [r3, #0] 800417a: 687b ldr r3, [r7, #4] 800417c: 4413 add r3, r2 800417e: 4a05 ldr r2, [pc, #20] @ (8004194 <_sbrk+0x64>) 8004180: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 8004182: 68fb ldr r3, [r7, #12] } 8004184: 4618 mov r0, r3 8004186: 3718 adds r7, #24 8004188: 46bd mov sp, r7 800418a: bd80 pop {r7, pc} 800418c: 20005000 .word 0x20005000 8004190: 00000400 .word 0x00000400 8004194: 20000444 .word 0x20000444 8004198: 20001880 .word 0x20001880 0800419c : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 800419c: b480 push {r7} 800419e: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 80041a0: bf00 nop 80041a2: 46bd mov sp, r7 80041a4: bc80 pop {r7} 80041a6: 4770 bx lr 080041a8 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 80041a8: f7ff fff8 bl 800419c /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 80041ac: 480b ldr r0, [pc, #44] @ (80041dc ) ldr r1, =_edata 80041ae: 490c ldr r1, [pc, #48] @ (80041e0 ) ldr r2, =_sidata 80041b0: 4a0c ldr r2, [pc, #48] @ (80041e4 ) movs r3, #0 80041b2: 2300 movs r3, #0 b LoopCopyDataInit 80041b4: e002 b.n 80041bc 080041b6 : CopyDataInit: ldr r4, [r2, r3] 80041b6: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 80041b8: 50c4 str r4, [r0, r3] adds r3, r3, #4 80041ba: 3304 adds r3, #4 080041bc : LoopCopyDataInit: adds r4, r0, r3 80041bc: 18c4 adds r4, r0, r3 cmp r4, r1 80041be: 428c cmp r4, r1 bcc CopyDataInit 80041c0: d3f9 bcc.n 80041b6 /* Zero fill the bss segment. */ ldr r2, =_sbss 80041c2: 4a09 ldr r2, [pc, #36] @ (80041e8 ) ldr r4, =_ebss 80041c4: 4c09 ldr r4, [pc, #36] @ (80041ec ) movs r3, #0 80041c6: 2300 movs r3, #0 b LoopFillZerobss 80041c8: e001 b.n 80041ce 080041ca : FillZerobss: str r3, [r2] 80041ca: 6013 str r3, [r2, #0] adds r2, r2, #4 80041cc: 3204 adds r2, #4 080041ce : LoopFillZerobss: cmp r2, r4 80041ce: 42a2 cmp r2, r4 bcc FillZerobss 80041d0: d3fb bcc.n 80041ca /* Call static constructors */ bl __libc_init_array 80041d2: f009 fa11 bl 800d5f8 <__libc_init_array> /* Call the application's entry point.*/ bl main 80041d6: f7fe fe4d bl 8002e74
bx lr 80041da: 4770 bx lr ldr r0, =_sdata 80041dc: 20000000 .word 0x20000000 ldr r1, =_edata 80041e0: 200001d4 .word 0x200001d4 ldr r2, =_sidata 80041e4: 0800e258 .word 0x0800e258 ldr r2, =_sbss 80041e8: 200001d8 .word 0x200001d8 ldr r4, =_ebss 80041ec: 2000187c .word 0x2000187c 080041f0 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 80041f0: e7fe b.n 80041f0 ... 080041f4 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 80041f4: b580 push {r7, lr} 80041f6: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 80041f8: 4b08 ldr r3, [pc, #32] @ (800421c ) 80041fa: 681b ldr r3, [r3, #0] 80041fc: 4a07 ldr r2, [pc, #28] @ (800421c ) 80041fe: f043 0310 orr.w r3, r3, #16 8004202: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8004204: 2003 movs r0, #3 8004206: f000 fcef bl 8004be8 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 800420a: 200f movs r0, #15 800420c: f000 f808 bl 8004220 /* Init the low level hardware */ HAL_MspInit(); 8004210: f7ff fdca bl 8003da8 /* Return function status */ return HAL_OK; 8004214: 2300 movs r3, #0 } 8004216: 4618 mov r0, r3 8004218: bd80 pop {r7, pc} 800421a: bf00 nop 800421c: 40022000 .word 0x40022000 08004220 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8004220: b580 push {r7, lr} 8004222: b082 sub sp, #8 8004224: af00 add r7, sp, #0 8004226: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8004228: 4b12 ldr r3, [pc, #72] @ (8004274 ) 800422a: 681a ldr r2, [r3, #0] 800422c: 4b12 ldr r3, [pc, #72] @ (8004278 ) 800422e: 781b ldrb r3, [r3, #0] 8004230: 4619 mov r1, r3 8004232: f44f 737a mov.w r3, #1000 @ 0x3e8 8004236: fbb3 f3f1 udiv r3, r3, r1 800423a: fbb2 f3f3 udiv r3, r2, r3 800423e: 4618 mov r0, r3 8004240: f000 fd07 bl 8004c52 8004244: 4603 mov r3, r0 8004246: 2b00 cmp r3, #0 8004248: d001 beq.n 800424e { return HAL_ERROR; 800424a: 2301 movs r3, #1 800424c: e00e b.n 800426c } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800424e: 687b ldr r3, [r7, #4] 8004250: 2b0f cmp r3, #15 8004252: d80a bhi.n 800426a { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8004254: 2200 movs r2, #0 8004256: 6879 ldr r1, [r7, #4] 8004258: f04f 30ff mov.w r0, #4294967295 800425c: f000 fccf bl 8004bfe uwTickPrio = TickPriority; 8004260: 4a06 ldr r2, [pc, #24] @ (800427c ) 8004262: 687b ldr r3, [r7, #4] 8004264: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8004266: 2300 movs r3, #0 8004268: e000 b.n 800426c return HAL_ERROR; 800426a: 2301 movs r3, #1 } 800426c: 4618 mov r0, r3 800426e: 3708 adds r7, #8 8004270: 46bd mov sp, r7 8004272: bd80 pop {r7, pc} 8004274: 20000008 .word 0x20000008 8004278: 20000010 .word 0x20000010 800427c: 2000000c .word 0x2000000c 08004280 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8004280: b480 push {r7} 8004282: af00 add r7, sp, #0 uwTick += uwTickFreq; 8004284: 4b05 ldr r3, [pc, #20] @ (800429c ) 8004286: 781b ldrb r3, [r3, #0] 8004288: 461a mov r2, r3 800428a: 4b05 ldr r3, [pc, #20] @ (80042a0 ) 800428c: 681b ldr r3, [r3, #0] 800428e: 4413 add r3, r2 8004290: 4a03 ldr r2, [pc, #12] @ (80042a0 ) 8004292: 6013 str r3, [r2, #0] } 8004294: bf00 nop 8004296: 46bd mov sp, r7 8004298: bc80 pop {r7} 800429a: 4770 bx lr 800429c: 20000010 .word 0x20000010 80042a0: 20000448 .word 0x20000448 080042a4 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 80042a4: b480 push {r7} 80042a6: af00 add r7, sp, #0 return uwTick; 80042a8: 4b02 ldr r3, [pc, #8] @ (80042b4 ) 80042aa: 681b ldr r3, [r3, #0] } 80042ac: 4618 mov r0, r3 80042ae: 46bd mov sp, r7 80042b0: bc80 pop {r7} 80042b2: 4770 bx lr 80042b4: 20000448 .word 0x20000448 080042b8 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 80042b8: b580 push {r7, lr} 80042ba: b086 sub sp, #24 80042bc: af00 add r7, sp, #0 80042be: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80042c0: 2300 movs r3, #0 80042c2: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 80042c4: 2300 movs r3, #0 80042c6: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 80042c8: 2300 movs r3, #0 80042ca: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 80042cc: 2300 movs r3, #0 80042ce: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 80042d0: 687b ldr r3, [r7, #4] 80042d2: 2b00 cmp r3, #0 80042d4: d101 bne.n 80042da { return HAL_ERROR; 80042d6: 2301 movs r3, #1 80042d8: e0be b.n 8004458 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 80042da: 687b ldr r3, [r7, #4] 80042dc: 689b ldr r3, [r3, #8] 80042de: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 80042e0: 687b ldr r3, [r7, #4] 80042e2: 6a9b ldr r3, [r3, #40] @ 0x28 80042e4: 2b00 cmp r3, #0 80042e6: d109 bne.n 80042fc { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 80042e8: 687b ldr r3, [r7, #4] 80042ea: 2200 movs r2, #0 80042ec: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 80042ee: 687b ldr r3, [r7, #4] 80042f0: 2200 movs r2, #0 80042f2: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 80042f6: 6878 ldr r0, [r7, #4] 80042f8: f7ff fd88 bl 8003e0c /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 80042fc: 6878 ldr r0, [r7, #4] 80042fe: f000 faff bl 8004900 8004302: 4603 mov r3, r0 8004304: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 8004306: 687b ldr r3, [r7, #4] 8004308: 6a9b ldr r3, [r3, #40] @ 0x28 800430a: f003 0310 and.w r3, r3, #16 800430e: 2b00 cmp r3, #0 8004310: f040 8099 bne.w 8004446 8004314: 7dfb ldrb r3, [r7, #23] 8004316: 2b00 cmp r3, #0 8004318: f040 8095 bne.w 8004446 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 800431c: 687b ldr r3, [r7, #4] 800431e: 6a9b ldr r3, [r3, #40] @ 0x28 8004320: f423 5388 bic.w r3, r3, #4352 @ 0x1100 8004324: f023 0302 bic.w r3, r3, #2 8004328: f043 0202 orr.w r2, r3, #2 800432c: 687b ldr r3, [r7, #4] 800432e: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 8004330: 687b ldr r3, [r7, #4] 8004332: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8004334: 687b ldr r3, [r7, #4] 8004336: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 8004338: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 800433a: 687b ldr r3, [r7, #4] 800433c: 7b1b ldrb r3, [r3, #12] 800433e: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8004340: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 8004342: 68ba ldr r2, [r7, #8] 8004344: 4313 orrs r3, r2 8004346: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 8004348: 687b ldr r3, [r7, #4] 800434a: 689b ldr r3, [r3, #8] 800434c: f5b3 7f80 cmp.w r3, #256 @ 0x100 8004350: d003 beq.n 800435a 8004352: 687b ldr r3, [r7, #4] 8004354: 689b ldr r3, [r3, #8] 8004356: 2b01 cmp r3, #1 8004358: d102 bne.n 8004360 800435a: f44f 7380 mov.w r3, #256 @ 0x100 800435e: e000 b.n 8004362 8004360: 2300 movs r3, #0 8004362: 693a ldr r2, [r7, #16] 8004364: 4313 orrs r3, r2 8004366: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 8004368: 687b ldr r3, [r7, #4] 800436a: 7d1b ldrb r3, [r3, #20] 800436c: 2b01 cmp r3, #1 800436e: d119 bne.n 80043a4 { if (hadc->Init.ContinuousConvMode == DISABLE) 8004370: 687b ldr r3, [r7, #4] 8004372: 7b1b ldrb r3, [r3, #12] 8004374: 2b00 cmp r3, #0 8004376: d109 bne.n 800438c { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 8004378: 687b ldr r3, [r7, #4] 800437a: 699b ldr r3, [r3, #24] 800437c: 3b01 subs r3, #1 800437e: 035a lsls r2, r3, #13 8004380: 693b ldr r3, [r7, #16] 8004382: 4313 orrs r3, r2 8004384: f443 6300 orr.w r3, r3, #2048 @ 0x800 8004388: 613b str r3, [r7, #16] 800438a: e00b b.n 80043a4 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800438c: 687b ldr r3, [r7, #4] 800438e: 6a9b ldr r3, [r3, #40] @ 0x28 8004390: f043 0220 orr.w r2, r3, #32 8004394: 687b ldr r3, [r7, #4] 8004396: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8004398: 687b ldr r3, [r7, #4] 800439a: 6adb ldr r3, [r3, #44] @ 0x2c 800439c: f043 0201 orr.w r2, r3, #1 80043a0: 687b ldr r3, [r7, #4] 80043a2: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 80043a4: 687b ldr r3, [r7, #4] 80043a6: 681b ldr r3, [r3, #0] 80043a8: 685b ldr r3, [r3, #4] 80043aa: f423 4169 bic.w r1, r3, #59648 @ 0xe900 80043ae: 687b ldr r3, [r7, #4] 80043b0: 681b ldr r3, [r3, #0] 80043b2: 693a ldr r2, [r7, #16] 80043b4: 430a orrs r2, r1 80043b6: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 80043b8: 687b ldr r3, [r7, #4] 80043ba: 681b ldr r3, [r3, #0] 80043bc: 689a ldr r2, [r3, #8] 80043be: 4b28 ldr r3, [pc, #160] @ (8004460 ) 80043c0: 4013 ands r3, r2 80043c2: 687a ldr r2, [r7, #4] 80043c4: 6812 ldr r2, [r2, #0] 80043c6: 68b9 ldr r1, [r7, #8] 80043c8: 430b orrs r3, r1 80043ca: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 80043cc: 687b ldr r3, [r7, #4] 80043ce: 689b ldr r3, [r3, #8] 80043d0: f5b3 7f80 cmp.w r3, #256 @ 0x100 80043d4: d003 beq.n 80043de 80043d6: 687b ldr r3, [r7, #4] 80043d8: 689b ldr r3, [r3, #8] 80043da: 2b01 cmp r3, #1 80043dc: d104 bne.n 80043e8 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 80043de: 687b ldr r3, [r7, #4] 80043e0: 691b ldr r3, [r3, #16] 80043e2: 3b01 subs r3, #1 80043e4: 051b lsls r3, r3, #20 80043e6: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 80043e8: 687b ldr r3, [r7, #4] 80043ea: 681b ldr r3, [r3, #0] 80043ec: 6adb ldr r3, [r3, #44] @ 0x2c 80043ee: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 80043f2: 687b ldr r3, [r7, #4] 80043f4: 681b ldr r3, [r3, #0] 80043f6: 68fa ldr r2, [r7, #12] 80043f8: 430a orrs r2, r1 80043fa: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80043fc: 687b ldr r3, [r7, #4] 80043fe: 681b ldr r3, [r3, #0] 8004400: 689a ldr r2, [r3, #8] 8004402: 4b18 ldr r3, [pc, #96] @ (8004464 ) 8004404: 4013 ands r3, r2 8004406: 68ba ldr r2, [r7, #8] 8004408: 429a cmp r2, r3 800440a: d10b bne.n 8004424 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 800440c: 687b ldr r3, [r7, #4] 800440e: 2200 movs r2, #0 8004410: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 8004412: 687b ldr r3, [r7, #4] 8004414: 6a9b ldr r3, [r3, #40] @ 0x28 8004416: f023 0303 bic.w r3, r3, #3 800441a: f043 0201 orr.w r2, r3, #1 800441e: 687b ldr r3, [r7, #4] 8004420: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8004422: e018 b.n 8004456 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 8004424: 687b ldr r3, [r7, #4] 8004426: 6a9b ldr r3, [r3, #40] @ 0x28 8004428: f023 0312 bic.w r3, r3, #18 800442c: f043 0210 orr.w r2, r3, #16 8004430: 687b ldr r3, [r7, #4] 8004432: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8004434: 687b ldr r3, [r7, #4] 8004436: 6adb ldr r3, [r3, #44] @ 0x2c 8004438: f043 0201 orr.w r2, r3, #1 800443c: 687b ldr r3, [r7, #4] 800443e: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 8004440: 2301 movs r3, #1 8004442: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8004444: e007 b.n 8004456 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8004446: 687b ldr r3, [r7, #4] 8004448: 6a9b ldr r3, [r3, #40] @ 0x28 800444a: f043 0210 orr.w r2, r3, #16 800444e: 687b ldr r3, [r7, #4] 8004450: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8004452: 2301 movs r3, #1 8004454: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8004456: 7dfb ldrb r3, [r7, #23] } 8004458: 4618 mov r0, r3 800445a: 3718 adds r7, #24 800445c: 46bd mov sp, r7 800445e: bd80 pop {r7, pc} 8004460: ffe1f7fd .word 0xffe1f7fd 8004464: ff1f0efe .word 0xff1f0efe 08004468 : * @param pData: The destination Buffer address. * @param Length: The length of data to be transferred from ADC peripheral to memory. * @retval None */ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { 8004468: b580 push {r7, lr} 800446a: b086 sub sp, #24 800446c: af00 add r7, sp, #0 800446e: 60f8 str r0, [r7, #12] 8004470: 60b9 str r1, [r7, #8] 8004472: 607a str r2, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8004474: 2300 movs r3, #0 8004476: 75fb strb r3, [r7, #23] assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance)); /* Verification if multimode is disabled (for devices with several ADC) */ /* If multimode is enabled, dedicated function multimode conversion */ /* start DMA must be used. */ if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 8004478: 68fb ldr r3, [r7, #12] 800447a: 681b ldr r3, [r3, #0] 800447c: 4a64 ldr r2, [pc, #400] @ (8004610 ) 800447e: 4293 cmp r3, r2 8004480: d004 beq.n 800448c 8004482: 68fb ldr r3, [r7, #12] 8004484: 681b ldr r3, [r3, #0] 8004486: 4a63 ldr r2, [pc, #396] @ (8004614 ) 8004488: 4293 cmp r3, r2 800448a: d106 bne.n 800449a 800448c: 4b60 ldr r3, [pc, #384] @ (8004610 ) 800448e: 685b ldr r3, [r3, #4] 8004490: f403 2370 and.w r3, r3, #983040 @ 0xf0000 8004494: 2b00 cmp r3, #0 8004496: f040 80b3 bne.w 8004600 { /* Process locked */ __HAL_LOCK(hadc); 800449a: 68fb ldr r3, [r7, #12] 800449c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 80044a0: 2b01 cmp r3, #1 80044a2: d101 bne.n 80044a8 80044a4: 2302 movs r3, #2 80044a6: e0ae b.n 8004606 80044a8: 68fb ldr r3, [r7, #12] 80044aa: 2201 movs r2, #1 80044ac: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 80044b0: 68f8 ldr r0, [r7, #12] 80044b2: f000 f9cb bl 800484c 80044b6: 4603 mov r3, r0 80044b8: 75fb strb r3, [r7, #23] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 80044ba: 7dfb ldrb r3, [r7, #23] 80044bc: 2b00 cmp r3, #0 80044be: f040 809a bne.w 80045f6 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 80044c2: 68fb ldr r3, [r7, #12] 80044c4: 6a9b ldr r3, [r3, #40] @ 0x28 80044c6: f423 6370 bic.w r3, r3, #3840 @ 0xf00 80044ca: f023 0301 bic.w r3, r3, #1 80044ce: f443 7280 orr.w r2, r3, #256 @ 0x100 80044d2: 68fb ldr r3, [r7, #12] 80044d4: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 80044d6: 68fb ldr r3, [r7, #12] 80044d8: 681b ldr r3, [r3, #0] 80044da: 4a4e ldr r2, [pc, #312] @ (8004614 ) 80044dc: 4293 cmp r3, r2 80044de: d105 bne.n 80044ec 80044e0: 4b4b ldr r3, [pc, #300] @ (8004610 ) 80044e2: 685b ldr r3, [r3, #4] 80044e4: f403 2370 and.w r3, r3, #983040 @ 0xf0000 80044e8: 2b00 cmp r3, #0 80044ea: d115 bne.n 8004518 { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 80044ec: 68fb ldr r3, [r7, #12] 80044ee: 6a9b ldr r3, [r3, #40] @ 0x28 80044f0: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 80044f4: 68fb ldr r3, [r7, #12] 80044f6: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 80044f8: 68fb ldr r3, [r7, #12] 80044fa: 681b ldr r3, [r3, #0] 80044fc: 685b ldr r3, [r3, #4] 80044fe: f403 6380 and.w r3, r3, #1024 @ 0x400 8004502: 2b00 cmp r3, #0 8004504: d026 beq.n 8004554 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 8004506: 68fb ldr r3, [r7, #12] 8004508: 6a9b ldr r3, [r3, #40] @ 0x28 800450a: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800450e: f443 5280 orr.w r2, r3, #4096 @ 0x1000 8004512: 68fb ldr r3, [r7, #12] 8004514: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 8004516: e01d b.n 8004554 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8004518: 68fb ldr r3, [r7, #12] 800451a: 6a9b ldr r3, [r3, #40] @ 0x28 800451c: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 8004520: 68fb ldr r3, [r7, #12] 8004522: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 8004524: 68fb ldr r3, [r7, #12] 8004526: 681b ldr r3, [r3, #0] 8004528: 4a39 ldr r2, [pc, #228] @ (8004610 ) 800452a: 4293 cmp r3, r2 800452c: d004 beq.n 8004538 800452e: 68fb ldr r3, [r7, #12] 8004530: 681b ldr r3, [r3, #0] 8004532: 4a38 ldr r2, [pc, #224] @ (8004614 ) 8004534: 4293 cmp r3, r2 8004536: d10d bne.n 8004554 8004538: 4b35 ldr r3, [pc, #212] @ (8004610 ) 800453a: 685b ldr r3, [r3, #4] 800453c: f403 6380 and.w r3, r3, #1024 @ 0x400 8004540: 2b00 cmp r3, #0 8004542: d007 beq.n 8004554 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 8004544: 68fb ldr r3, [r7, #12] 8004546: 6a9b ldr r3, [r3, #40] @ 0x28 8004548: f423 5340 bic.w r3, r3, #12288 @ 0x3000 800454c: f443 5280 orr.w r2, r3, #4096 @ 0x1000 8004550: 68fb ldr r3, [r7, #12] 8004552: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8004554: 68fb ldr r3, [r7, #12] 8004556: 6a9b ldr r3, [r3, #40] @ 0x28 8004558: f403 5380 and.w r3, r3, #4096 @ 0x1000 800455c: 2b00 cmp r3, #0 800455e: d006 beq.n 800456e { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 8004560: 68fb ldr r3, [r7, #12] 8004562: 6adb ldr r3, [r3, #44] @ 0x2c 8004564: f023 0206 bic.w r2, r3, #6 8004568: 68fb ldr r3, [r7, #12] 800456a: 62da str r2, [r3, #44] @ 0x2c 800456c: e002 b.n 8004574 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 800456e: 68fb ldr r3, [r7, #12] 8004570: 2200 movs r2, #0 8004572: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 8004574: 68fb ldr r3, [r7, #12] 8004576: 2200 movs r2, #0 8004578: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Set the DMA transfer complete callback */ hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 800457c: 68fb ldr r3, [r7, #12] 800457e: 6a1b ldr r3, [r3, #32] 8004580: 4a25 ldr r2, [pc, #148] @ (8004618 ) 8004582: 629a str r2, [r3, #40] @ 0x28 /* Set the DMA half transfer complete callback */ hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 8004584: 68fb ldr r3, [r7, #12] 8004586: 6a1b ldr r3, [r3, #32] 8004588: 4a24 ldr r2, [pc, #144] @ (800461c ) 800458a: 62da str r2, [r3, #44] @ 0x2c /* Set the DMA error callback */ hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 800458c: 68fb ldr r3, [r7, #12] 800458e: 6a1b ldr r3, [r3, #32] 8004590: 4a23 ldr r2, [pc, #140] @ (8004620 ) 8004592: 631a str r2, [r3, #48] @ 0x30 /* start (in case of SW start): */ /* Clear regular group conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC */ /* operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 8004594: 68fb ldr r3, [r7, #12] 8004596: 681b ldr r3, [r3, #0] 8004598: f06f 0202 mvn.w r2, #2 800459c: 601a str r2, [r3, #0] /* Enable ADC DMA mode */ SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 800459e: 68fb ldr r3, [r7, #12] 80045a0: 681b ldr r3, [r3, #0] 80045a2: 689a ldr r2, [r3, #8] 80045a4: 68fb ldr r3, [r7, #12] 80045a6: 681b ldr r3, [r3, #0] 80045a8: f442 7280 orr.w r2, r2, #256 @ 0x100 80045ac: 609a str r2, [r3, #8] /* Start the DMA channel */ HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 80045ae: 68fb ldr r3, [r7, #12] 80045b0: 6a18 ldr r0, [r3, #32] 80045b2: 68fb ldr r3, [r7, #12] 80045b4: 681b ldr r3, [r3, #0] 80045b6: 334c adds r3, #76 @ 0x4c 80045b8: 4619 mov r1, r3 80045ba: 68ba ldr r2, [r7, #8] 80045bc: 687b ldr r3, [r7, #4] 80045be: f000 fbb5 bl 8004d2c /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ /* If external trigger has been selected, conversion will start at next */ /* trigger event. */ if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) 80045c2: 68fb ldr r3, [r7, #12] 80045c4: 681b ldr r3, [r3, #0] 80045c6: 689b ldr r3, [r3, #8] 80045c8: f403 2360 and.w r3, r3, #917504 @ 0xe0000 80045cc: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 80045d0: d108 bne.n 80045e4 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 80045d2: 68fb ldr r3, [r7, #12] 80045d4: 681b ldr r3, [r3, #0] 80045d6: 689a ldr r2, [r3, #8] 80045d8: 68fb ldr r3, [r7, #12] 80045da: 681b ldr r3, [r3, #0] 80045dc: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 80045e0: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 80045e2: e00f b.n 8004604 } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 80045e4: 68fb ldr r3, [r7, #12] 80045e6: 681b ldr r3, [r3, #0] 80045e8: 689a ldr r2, [r3, #8] 80045ea: 68fb ldr r3, [r7, #12] 80045ec: 681b ldr r3, [r3, #0] 80045ee: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 80045f2: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 80045f4: e006 b.n 8004604 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 80045f6: 68fb ldr r3, [r7, #12] 80045f8: 2200 movs r2, #0 80045fa: f883 2024 strb.w r2, [r3, #36] @ 0x24 if (tmp_hal_status == HAL_OK) 80045fe: e001 b.n 8004604 } } else { tmp_hal_status = HAL_ERROR; 8004600: 2301 movs r3, #1 8004602: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8004604: 7dfb ldrb r3, [r7, #23] } 8004606: 4618 mov r0, r3 8004608: 3718 adds r7, #24 800460a: 46bd mov sp, r7 800460c: bd80 pop {r7, pc} 800460e: bf00 nop 8004610: 40012400 .word 0x40012400 8004614: 40012800 .word 0x40012800 8004618: 08004983 .word 0x08004983 800461c: 080049ff .word 0x080049ff 8004620: 08004a1b .word 0x08004a1b 08004624 : * @brief Conversion complete callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { 8004624: b480 push {r7} 8004626: b083 sub sp, #12 8004628: af00 add r7, sp, #0 800462a: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvCpltCallback must be implemented in the user file. */ } 800462c: bf00 nop 800462e: 370c adds r7, #12 8004630: 46bd mov sp, r7 8004632: bc80 pop {r7} 8004634: 4770 bx lr 08004636 : * @brief Conversion DMA half-transfer callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) { 8004636: b480 push {r7} 8004638: b083 sub sp, #12 800463a: af00 add r7, sp, #0 800463c: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. */ } 800463e: bf00 nop 8004640: 370c adds r7, #12 8004642: 46bd mov sp, r7 8004644: bc80 pop {r7} 8004646: 4770 bx lr 08004648 : * (ADC conversion with interruption or transfer by DMA) * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) { 8004648: b480 push {r7} 800464a: b083 sub sp, #12 800464c: af00 add r7, sp, #0 800464e: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ErrorCallback must be implemented in the user file. */ } 8004650: bf00 nop 8004652: 370c adds r7, #12 8004654: 46bd mov sp, r7 8004656: bc80 pop {r7} 8004658: 4770 bx lr ... 0800465c : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 800465c: b480 push {r7} 800465e: b085 sub sp, #20 8004660: af00 add r7, sp, #0 8004662: 6078 str r0, [r7, #4] 8004664: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8004666: 2300 movs r3, #0 8004668: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 800466a: 2300 movs r3, #0 800466c: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 800466e: 687b ldr r3, [r7, #4] 8004670: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8004674: 2b01 cmp r3, #1 8004676: d101 bne.n 800467c 8004678: 2302 movs r3, #2 800467a: e0dc b.n 8004836 800467c: 687b ldr r3, [r7, #4] 800467e: 2201 movs r2, #1 8004680: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 8004684: 683b ldr r3, [r7, #0] 8004686: 685b ldr r3, [r3, #4] 8004688: 2b06 cmp r3, #6 800468a: d81c bhi.n 80046c6 { MODIFY_REG(hadc->Instance->SQR3 , 800468c: 687b ldr r3, [r7, #4] 800468e: 681b ldr r3, [r3, #0] 8004690: 6b59 ldr r1, [r3, #52] @ 0x34 8004692: 683b ldr r3, [r7, #0] 8004694: 685a ldr r2, [r3, #4] 8004696: 4613 mov r3, r2 8004698: 009b lsls r3, r3, #2 800469a: 4413 add r3, r2 800469c: 3b05 subs r3, #5 800469e: 221f movs r2, #31 80046a0: fa02 f303 lsl.w r3, r2, r3 80046a4: 43db mvns r3, r3 80046a6: 4019 ands r1, r3 80046a8: 683b ldr r3, [r7, #0] 80046aa: 6818 ldr r0, [r3, #0] 80046ac: 683b ldr r3, [r7, #0] 80046ae: 685a ldr r2, [r3, #4] 80046b0: 4613 mov r3, r2 80046b2: 009b lsls r3, r3, #2 80046b4: 4413 add r3, r2 80046b6: 3b05 subs r3, #5 80046b8: fa00 f203 lsl.w r2, r0, r3 80046bc: 687b ldr r3, [r7, #4] 80046be: 681b ldr r3, [r3, #0] 80046c0: 430a orrs r2, r1 80046c2: 635a str r2, [r3, #52] @ 0x34 80046c4: e03c b.n 8004740 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 80046c6: 683b ldr r3, [r7, #0] 80046c8: 685b ldr r3, [r3, #4] 80046ca: 2b0c cmp r3, #12 80046cc: d81c bhi.n 8004708 { MODIFY_REG(hadc->Instance->SQR2 , 80046ce: 687b ldr r3, [r7, #4] 80046d0: 681b ldr r3, [r3, #0] 80046d2: 6b19 ldr r1, [r3, #48] @ 0x30 80046d4: 683b ldr r3, [r7, #0] 80046d6: 685a ldr r2, [r3, #4] 80046d8: 4613 mov r3, r2 80046da: 009b lsls r3, r3, #2 80046dc: 4413 add r3, r2 80046de: 3b23 subs r3, #35 @ 0x23 80046e0: 221f movs r2, #31 80046e2: fa02 f303 lsl.w r3, r2, r3 80046e6: 43db mvns r3, r3 80046e8: 4019 ands r1, r3 80046ea: 683b ldr r3, [r7, #0] 80046ec: 6818 ldr r0, [r3, #0] 80046ee: 683b ldr r3, [r7, #0] 80046f0: 685a ldr r2, [r3, #4] 80046f2: 4613 mov r3, r2 80046f4: 009b lsls r3, r3, #2 80046f6: 4413 add r3, r2 80046f8: 3b23 subs r3, #35 @ 0x23 80046fa: fa00 f203 lsl.w r2, r0, r3 80046fe: 687b ldr r3, [r7, #4] 8004700: 681b ldr r3, [r3, #0] 8004702: 430a orrs r2, r1 8004704: 631a str r2, [r3, #48] @ 0x30 8004706: e01b b.n 8004740 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 8004708: 687b ldr r3, [r7, #4] 800470a: 681b ldr r3, [r3, #0] 800470c: 6ad9 ldr r1, [r3, #44] @ 0x2c 800470e: 683b ldr r3, [r7, #0] 8004710: 685a ldr r2, [r3, #4] 8004712: 4613 mov r3, r2 8004714: 009b lsls r3, r3, #2 8004716: 4413 add r3, r2 8004718: 3b41 subs r3, #65 @ 0x41 800471a: 221f movs r2, #31 800471c: fa02 f303 lsl.w r3, r2, r3 8004720: 43db mvns r3, r3 8004722: 4019 ands r1, r3 8004724: 683b ldr r3, [r7, #0] 8004726: 6818 ldr r0, [r3, #0] 8004728: 683b ldr r3, [r7, #0] 800472a: 685a ldr r2, [r3, #4] 800472c: 4613 mov r3, r2 800472e: 009b lsls r3, r3, #2 8004730: 4413 add r3, r2 8004732: 3b41 subs r3, #65 @ 0x41 8004734: fa00 f203 lsl.w r2, r0, r3 8004738: 687b ldr r3, [r7, #4] 800473a: 681b ldr r3, [r3, #0] 800473c: 430a orrs r2, r1 800473e: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 8004740: 683b ldr r3, [r7, #0] 8004742: 681b ldr r3, [r3, #0] 8004744: 2b09 cmp r3, #9 8004746: d91c bls.n 8004782 { MODIFY_REG(hadc->Instance->SMPR1 , 8004748: 687b ldr r3, [r7, #4] 800474a: 681b ldr r3, [r3, #0] 800474c: 68d9 ldr r1, [r3, #12] 800474e: 683b ldr r3, [r7, #0] 8004750: 681a ldr r2, [r3, #0] 8004752: 4613 mov r3, r2 8004754: 005b lsls r3, r3, #1 8004756: 4413 add r3, r2 8004758: 3b1e subs r3, #30 800475a: 2207 movs r2, #7 800475c: fa02 f303 lsl.w r3, r2, r3 8004760: 43db mvns r3, r3 8004762: 4019 ands r1, r3 8004764: 683b ldr r3, [r7, #0] 8004766: 6898 ldr r0, [r3, #8] 8004768: 683b ldr r3, [r7, #0] 800476a: 681a ldr r2, [r3, #0] 800476c: 4613 mov r3, r2 800476e: 005b lsls r3, r3, #1 8004770: 4413 add r3, r2 8004772: 3b1e subs r3, #30 8004774: fa00 f203 lsl.w r2, r0, r3 8004778: 687b ldr r3, [r7, #4] 800477a: 681b ldr r3, [r3, #0] 800477c: 430a orrs r2, r1 800477e: 60da str r2, [r3, #12] 8004780: e019 b.n 80047b6 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 8004782: 687b ldr r3, [r7, #4] 8004784: 681b ldr r3, [r3, #0] 8004786: 6919 ldr r1, [r3, #16] 8004788: 683b ldr r3, [r7, #0] 800478a: 681a ldr r2, [r3, #0] 800478c: 4613 mov r3, r2 800478e: 005b lsls r3, r3, #1 8004790: 4413 add r3, r2 8004792: 2207 movs r2, #7 8004794: fa02 f303 lsl.w r3, r2, r3 8004798: 43db mvns r3, r3 800479a: 4019 ands r1, r3 800479c: 683b ldr r3, [r7, #0] 800479e: 6898 ldr r0, [r3, #8] 80047a0: 683b ldr r3, [r7, #0] 80047a2: 681a ldr r2, [r3, #0] 80047a4: 4613 mov r3, r2 80047a6: 005b lsls r3, r3, #1 80047a8: 4413 add r3, r2 80047aa: fa00 f203 lsl.w r2, r0, r3 80047ae: 687b ldr r3, [r7, #4] 80047b0: 681b ldr r3, [r3, #0] 80047b2: 430a orrs r2, r1 80047b4: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 80047b6: 683b ldr r3, [r7, #0] 80047b8: 681b ldr r3, [r3, #0] 80047ba: 2b10 cmp r3, #16 80047bc: d003 beq.n 80047c6 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 80047be: 683b ldr r3, [r7, #0] 80047c0: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 80047c2: 2b11 cmp r3, #17 80047c4: d132 bne.n 800482c { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 80047c6: 687b ldr r3, [r7, #4] 80047c8: 681b ldr r3, [r3, #0] 80047ca: 4a1d ldr r2, [pc, #116] @ (8004840 ) 80047cc: 4293 cmp r3, r2 80047ce: d125 bne.n 800481c { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 80047d0: 687b ldr r3, [r7, #4] 80047d2: 681b ldr r3, [r3, #0] 80047d4: 689b ldr r3, [r3, #8] 80047d6: f403 0300 and.w r3, r3, #8388608 @ 0x800000 80047da: 2b00 cmp r3, #0 80047dc: d126 bne.n 800482c { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 80047de: 687b ldr r3, [r7, #4] 80047e0: 681b ldr r3, [r3, #0] 80047e2: 689a ldr r2, [r3, #8] 80047e4: 687b ldr r3, [r7, #4] 80047e6: 681b ldr r3, [r3, #0] 80047e8: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 80047ec: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 80047ee: 683b ldr r3, [r7, #0] 80047f0: 681b ldr r3, [r3, #0] 80047f2: 2b10 cmp r3, #16 80047f4: d11a bne.n 800482c { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 80047f6: 4b13 ldr r3, [pc, #76] @ (8004844 ) 80047f8: 681b ldr r3, [r3, #0] 80047fa: 4a13 ldr r2, [pc, #76] @ (8004848 ) 80047fc: fba2 2303 umull r2, r3, r2, r3 8004800: 0c9a lsrs r2, r3, #18 8004802: 4613 mov r3, r2 8004804: 009b lsls r3, r3, #2 8004806: 4413 add r3, r2 8004808: 005b lsls r3, r3, #1 800480a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 800480c: e002 b.n 8004814 { wait_loop_index--; 800480e: 68bb ldr r3, [r7, #8] 8004810: 3b01 subs r3, #1 8004812: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8004814: 68bb ldr r3, [r7, #8] 8004816: 2b00 cmp r3, #0 8004818: d1f9 bne.n 800480e 800481a: e007 b.n 800482c } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 800481c: 687b ldr r3, [r7, #4] 800481e: 6a9b ldr r3, [r3, #40] @ 0x28 8004820: f043 0220 orr.w r2, r3, #32 8004824: 687b ldr r3, [r7, #4] 8004826: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8004828: 2301 movs r3, #1 800482a: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 800482c: 687b ldr r3, [r7, #4] 800482e: 2200 movs r2, #0 8004830: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8004834: 7bfb ldrb r3, [r7, #15] } 8004836: 4618 mov r0, r3 8004838: 3714 adds r7, #20 800483a: 46bd mov sp, r7 800483c: bc80 pop {r7} 800483e: 4770 bx lr 8004840: 40012400 .word 0x40012400 8004844: 20000008 .word 0x20000008 8004848: 431bde83 .word 0x431bde83 0800484c : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 800484c: b580 push {r7, lr} 800484e: b084 sub sp, #16 8004850: af00 add r7, sp, #0 8004852: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8004854: 2300 movs r3, #0 8004856: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 8004858: 2300 movs r3, #0 800485a: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 800485c: 687b ldr r3, [r7, #4] 800485e: 681b ldr r3, [r3, #0] 8004860: 689b ldr r3, [r3, #8] 8004862: f003 0301 and.w r3, r3, #1 8004866: 2b01 cmp r3, #1 8004868: d040 beq.n 80048ec { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 800486a: 687b ldr r3, [r7, #4] 800486c: 681b ldr r3, [r3, #0] 800486e: 689a ldr r2, [r3, #8] 8004870: 687b ldr r3, [r7, #4] 8004872: 681b ldr r3, [r3, #0] 8004874: f042 0201 orr.w r2, r2, #1 8004878: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 800487a: 4b1f ldr r3, [pc, #124] @ (80048f8 ) 800487c: 681b ldr r3, [r3, #0] 800487e: 4a1f ldr r2, [pc, #124] @ (80048fc ) 8004880: fba2 2303 umull r2, r3, r2, r3 8004884: 0c9b lsrs r3, r3, #18 8004886: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8004888: e002 b.n 8004890 { wait_loop_index--; 800488a: 68bb ldr r3, [r7, #8] 800488c: 3b01 subs r3, #1 800488e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8004890: 68bb ldr r3, [r7, #8] 8004892: 2b00 cmp r3, #0 8004894: d1f9 bne.n 800488a } /* Get tick count */ tickstart = HAL_GetTick(); 8004896: f7ff fd05 bl 80042a4 800489a: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 800489c: e01f b.n 80048de { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 800489e: f7ff fd01 bl 80042a4 80048a2: 4602 mov r2, r0 80048a4: 68fb ldr r3, [r7, #12] 80048a6: 1ad3 subs r3, r2, r3 80048a8: 2b02 cmp r3, #2 80048aa: d918 bls.n 80048de { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 80048ac: 687b ldr r3, [r7, #4] 80048ae: 681b ldr r3, [r3, #0] 80048b0: 689b ldr r3, [r3, #8] 80048b2: f003 0301 and.w r3, r3, #1 80048b6: 2b01 cmp r3, #1 80048b8: d011 beq.n 80048de { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80048ba: 687b ldr r3, [r7, #4] 80048bc: 6a9b ldr r3, [r3, #40] @ 0x28 80048be: f043 0210 orr.w r2, r3, #16 80048c2: 687b ldr r3, [r7, #4] 80048c4: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80048c6: 687b ldr r3, [r7, #4] 80048c8: 6adb ldr r3, [r3, #44] @ 0x2c 80048ca: f043 0201 orr.w r2, r3, #1 80048ce: 687b ldr r3, [r7, #4] 80048d0: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 80048d2: 687b ldr r3, [r7, #4] 80048d4: 2200 movs r2, #0 80048d6: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 80048da: 2301 movs r3, #1 80048dc: e007 b.n 80048ee while(ADC_IS_ENABLE(hadc) == RESET) 80048de: 687b ldr r3, [r7, #4] 80048e0: 681b ldr r3, [r3, #0] 80048e2: 689b ldr r3, [r3, #8] 80048e4: f003 0301 and.w r3, r3, #1 80048e8: 2b01 cmp r3, #1 80048ea: d1d8 bne.n 800489e } } } /* Return HAL status */ return HAL_OK; 80048ec: 2300 movs r3, #0 } 80048ee: 4618 mov r0, r3 80048f0: 3710 adds r7, #16 80048f2: 46bd mov sp, r7 80048f4: bd80 pop {r7, pc} 80048f6: bf00 nop 80048f8: 20000008 .word 0x20000008 80048fc: 431bde83 .word 0x431bde83 08004900 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 8004900: b580 push {r7, lr} 8004902: b084 sub sp, #16 8004904: af00 add r7, sp, #0 8004906: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8004908: 2300 movs r3, #0 800490a: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 800490c: 687b ldr r3, [r7, #4] 800490e: 681b ldr r3, [r3, #0] 8004910: 689b ldr r3, [r3, #8] 8004912: f003 0301 and.w r3, r3, #1 8004916: 2b01 cmp r3, #1 8004918: d12e bne.n 8004978 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 800491a: 687b ldr r3, [r7, #4] 800491c: 681b ldr r3, [r3, #0] 800491e: 689a ldr r2, [r3, #8] 8004920: 687b ldr r3, [r7, #4] 8004922: 681b ldr r3, [r3, #0] 8004924: f022 0201 bic.w r2, r2, #1 8004928: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 800492a: f7ff fcbb bl 80042a4 800492e: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 8004930: e01b b.n 800496a { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 8004932: f7ff fcb7 bl 80042a4 8004936: 4602 mov r2, r0 8004938: 68fb ldr r3, [r7, #12] 800493a: 1ad3 subs r3, r2, r3 800493c: 2b02 cmp r3, #2 800493e: d914 bls.n 800496a { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 8004940: 687b ldr r3, [r7, #4] 8004942: 681b ldr r3, [r3, #0] 8004944: 689b ldr r3, [r3, #8] 8004946: f003 0301 and.w r3, r3, #1 800494a: 2b01 cmp r3, #1 800494c: d10d bne.n 800496a { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 800494e: 687b ldr r3, [r7, #4] 8004950: 6a9b ldr r3, [r3, #40] @ 0x28 8004952: f043 0210 orr.w r2, r3, #16 8004956: 687b ldr r3, [r7, #4] 8004958: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800495a: 687b ldr r3, [r7, #4] 800495c: 6adb ldr r3, [r3, #44] @ 0x2c 800495e: f043 0201 orr.w r2, r3, #1 8004962: 687b ldr r3, [r7, #4] 8004964: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 8004966: 2301 movs r3, #1 8004968: e007 b.n 800497a while(ADC_IS_ENABLE(hadc) != RESET) 800496a: 687b ldr r3, [r7, #4] 800496c: 681b ldr r3, [r3, #0] 800496e: 689b ldr r3, [r3, #8] 8004970: f003 0301 and.w r3, r3, #1 8004974: 2b01 cmp r3, #1 8004976: d0dc beq.n 8004932 } } } /* Return HAL status */ return HAL_OK; 8004978: 2300 movs r3, #0 } 800497a: 4618 mov r0, r3 800497c: 3710 adds r7, #16 800497e: 46bd mov sp, r7 8004980: bd80 pop {r7, pc} 08004982 : * @brief DMA transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { 8004982: b580 push {r7, lr} 8004984: b084 sub sp, #16 8004986: af00 add r7, sp, #0 8004988: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 800498a: 687b ldr r3, [r7, #4] 800498c: 6a5b ldr r3, [r3, #36] @ 0x24 800498e: 60fb str r3, [r7, #12] /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 8004990: 68fb ldr r3, [r7, #12] 8004992: 6a9b ldr r3, [r3, #40] @ 0x28 8004994: f003 0350 and.w r3, r3, #80 @ 0x50 8004998: 2b00 cmp r3, #0 800499a: d127 bne.n 80049ec { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 800499c: 68fb ldr r3, [r7, #12] 800499e: 6a9b ldr r3, [r3, #40] @ 0x28 80049a0: f443 7200 orr.w r2, r3, #512 @ 0x200 80049a4: 68fb ldr r3, [r7, #12] 80049a6: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 80049a8: 68fb ldr r3, [r7, #12] 80049aa: 681b ldr r3, [r3, #0] 80049ac: 689b ldr r3, [r3, #8] 80049ae: f403 2360 and.w r3, r3, #917504 @ 0xe0000 80049b2: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 80049b6: d115 bne.n 80049e4 (hadc->Init.ContinuousConvMode == DISABLE) ) 80049b8: 68fb ldr r3, [r7, #12] 80049ba: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 80049bc: 2b00 cmp r3, #0 80049be: d111 bne.n 80049e4 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 80049c0: 68fb ldr r3, [r7, #12] 80049c2: 6a9b ldr r3, [r3, #40] @ 0x28 80049c4: f423 7280 bic.w r2, r3, #256 @ 0x100 80049c8: 68fb ldr r3, [r7, #12] 80049ca: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 80049cc: 68fb ldr r3, [r7, #12] 80049ce: 6a9b ldr r3, [r3, #40] @ 0x28 80049d0: f403 5380 and.w r3, r3, #4096 @ 0x1000 80049d4: 2b00 cmp r3, #0 80049d6: d105 bne.n 80049e4 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 80049d8: 68fb ldr r3, [r7, #12] 80049da: 6a9b ldr r3, [r3, #40] @ 0x28 80049dc: f043 0201 orr.w r2, r3, #1 80049e0: 68fb ldr r3, [r7, #12] 80049e2: 629a str r2, [r3, #40] @ 0x28 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 80049e4: 68f8 ldr r0, [r7, #12] 80049e6: f7ff fe1d bl 8004624 else { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); } } 80049ea: e004 b.n 80049f6 hadc->DMA_Handle->XferErrorCallback(hdma); 80049ec: 68fb ldr r3, [r7, #12] 80049ee: 6a1b ldr r3, [r3, #32] 80049f0: 6b1b ldr r3, [r3, #48] @ 0x30 80049f2: 6878 ldr r0, [r7, #4] 80049f4: 4798 blx r3 } 80049f6: bf00 nop 80049f8: 3710 adds r7, #16 80049fa: 46bd mov sp, r7 80049fc: bd80 pop {r7, pc} 080049fe : * @brief DMA half transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 80049fe: b580 push {r7, lr} 8004a00: b084 sub sp, #16 8004a02: af00 add r7, sp, #0 8004a04: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8004a06: 687b ldr r3, [r7, #4] 8004a08: 6a5b ldr r3, [r3, #36] @ 0x24 8004a0a: 60fb str r3, [r7, #12] /* Half conversion callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvHalfCpltCallback(hadc); #else HAL_ADC_ConvHalfCpltCallback(hadc); 8004a0c: 68f8 ldr r0, [r7, #12] 8004a0e: f7ff fe12 bl 8004636 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 8004a12: bf00 nop 8004a14: 3710 adds r7, #16 8004a16: 46bd mov sp, r7 8004a18: bd80 pop {r7, pc} 08004a1a : * @brief DMA error callback * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAError(DMA_HandleTypeDef *hdma) { 8004a1a: b580 push {r7, lr} 8004a1c: b084 sub sp, #16 8004a1e: af00 add r7, sp, #0 8004a20: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8004a22: 687b ldr r3, [r7, #4] 8004a24: 6a5b ldr r3, [r3, #36] @ 0x24 8004a26: 60fb str r3, [r7, #12] /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 8004a28: 68fb ldr r3, [r7, #12] 8004a2a: 6a9b ldr r3, [r3, #40] @ 0x28 8004a2c: f043 0240 orr.w r2, r3, #64 @ 0x40 8004a30: 68fb ldr r3, [r7, #12] 8004a32: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to DMA error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 8004a34: 68fb ldr r3, [r7, #12] 8004a36: 6adb ldr r3, [r3, #44] @ 0x2c 8004a38: f043 0204 orr.w r2, r3, #4 8004a3c: 68fb ldr r3, [r7, #12] 8004a3e: 62da str r2, [r3, #44] @ 0x2c /* Error callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ErrorCallback(hadc); #else HAL_ADC_ErrorCallback(hadc); 8004a40: 68f8 ldr r0, [r7, #12] 8004a42: f7ff fe01 bl 8004648 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 8004a46: bf00 nop 8004a48: 3710 adds r7, #16 8004a4a: 46bd mov sp, r7 8004a4c: bd80 pop {r7, pc} ... 08004a50 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8004a50: b480 push {r7} 8004a52: b085 sub sp, #20 8004a54: af00 add r7, sp, #0 8004a56: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8004a58: 687b ldr r3, [r7, #4] 8004a5a: f003 0307 and.w r3, r3, #7 8004a5e: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8004a60: 4b0c ldr r3, [pc, #48] @ (8004a94 <__NVIC_SetPriorityGrouping+0x44>) 8004a62: 68db ldr r3, [r3, #12] 8004a64: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8004a66: 68ba ldr r2, [r7, #8] 8004a68: f64f 03ff movw r3, #63743 @ 0xf8ff 8004a6c: 4013 ands r3, r2 8004a6e: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8004a70: 68fb ldr r3, [r7, #12] 8004a72: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8004a74: 68bb ldr r3, [r7, #8] 8004a76: 4313 orrs r3, r2 reg_value = (reg_value | 8004a78: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8004a7c: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8004a80: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8004a82: 4a04 ldr r2, [pc, #16] @ (8004a94 <__NVIC_SetPriorityGrouping+0x44>) 8004a84: 68bb ldr r3, [r7, #8] 8004a86: 60d3 str r3, [r2, #12] } 8004a88: bf00 nop 8004a8a: 3714 adds r7, #20 8004a8c: 46bd mov sp, r7 8004a8e: bc80 pop {r7} 8004a90: 4770 bx lr 8004a92: bf00 nop 8004a94: e000ed00 .word 0xe000ed00 08004a98 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8004a98: b480 push {r7} 8004a9a: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8004a9c: 4b04 ldr r3, [pc, #16] @ (8004ab0 <__NVIC_GetPriorityGrouping+0x18>) 8004a9e: 68db ldr r3, [r3, #12] 8004aa0: 0a1b lsrs r3, r3, #8 8004aa2: f003 0307 and.w r3, r3, #7 } 8004aa6: 4618 mov r0, r3 8004aa8: 46bd mov sp, r7 8004aaa: bc80 pop {r7} 8004aac: 4770 bx lr 8004aae: bf00 nop 8004ab0: e000ed00 .word 0xe000ed00 08004ab4 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8004ab4: b480 push {r7} 8004ab6: b083 sub sp, #12 8004ab8: af00 add r7, sp, #0 8004aba: 4603 mov r3, r0 8004abc: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8004abe: f997 3007 ldrsb.w r3, [r7, #7] 8004ac2: 2b00 cmp r3, #0 8004ac4: db0b blt.n 8004ade <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8004ac6: 79fb ldrb r3, [r7, #7] 8004ac8: f003 021f and.w r2, r3, #31 8004acc: 4906 ldr r1, [pc, #24] @ (8004ae8 <__NVIC_EnableIRQ+0x34>) 8004ace: f997 3007 ldrsb.w r3, [r7, #7] 8004ad2: 095b lsrs r3, r3, #5 8004ad4: 2001 movs r0, #1 8004ad6: fa00 f202 lsl.w r2, r0, r2 8004ada: f841 2023 str.w r2, [r1, r3, lsl #2] } } 8004ade: bf00 nop 8004ae0: 370c adds r7, #12 8004ae2: 46bd mov sp, r7 8004ae4: bc80 pop {r7} 8004ae6: 4770 bx lr 8004ae8: e000e100 .word 0xe000e100 08004aec <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8004aec: b480 push {r7} 8004aee: b083 sub sp, #12 8004af0: af00 add r7, sp, #0 8004af2: 4603 mov r3, r0 8004af4: 6039 str r1, [r7, #0] 8004af6: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8004af8: f997 3007 ldrsb.w r3, [r7, #7] 8004afc: 2b00 cmp r3, #0 8004afe: db0a blt.n 8004b16 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004b00: 683b ldr r3, [r7, #0] 8004b02: b2da uxtb r2, r3 8004b04: 490c ldr r1, [pc, #48] @ (8004b38 <__NVIC_SetPriority+0x4c>) 8004b06: f997 3007 ldrsb.w r3, [r7, #7] 8004b0a: 0112 lsls r2, r2, #4 8004b0c: b2d2 uxtb r2, r2 8004b0e: 440b add r3, r1 8004b10: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8004b14: e00a b.n 8004b2c <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8004b16: 683b ldr r3, [r7, #0] 8004b18: b2da uxtb r2, r3 8004b1a: 4908 ldr r1, [pc, #32] @ (8004b3c <__NVIC_SetPriority+0x50>) 8004b1c: 79fb ldrb r3, [r7, #7] 8004b1e: f003 030f and.w r3, r3, #15 8004b22: 3b04 subs r3, #4 8004b24: 0112 lsls r2, r2, #4 8004b26: b2d2 uxtb r2, r2 8004b28: 440b add r3, r1 8004b2a: 761a strb r2, [r3, #24] } 8004b2c: bf00 nop 8004b2e: 370c adds r7, #12 8004b30: 46bd mov sp, r7 8004b32: bc80 pop {r7} 8004b34: 4770 bx lr 8004b36: bf00 nop 8004b38: e000e100 .word 0xe000e100 8004b3c: e000ed00 .word 0xe000ed00 08004b40 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8004b40: b480 push {r7} 8004b42: b089 sub sp, #36 @ 0x24 8004b44: af00 add r7, sp, #0 8004b46: 60f8 str r0, [r7, #12] 8004b48: 60b9 str r1, [r7, #8] 8004b4a: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8004b4c: 68fb ldr r3, [r7, #12] 8004b4e: f003 0307 and.w r3, r3, #7 8004b52: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8004b54: 69fb ldr r3, [r7, #28] 8004b56: f1c3 0307 rsb r3, r3, #7 8004b5a: 2b04 cmp r3, #4 8004b5c: bf28 it cs 8004b5e: 2304 movcs r3, #4 8004b60: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8004b62: 69fb ldr r3, [r7, #28] 8004b64: 3304 adds r3, #4 8004b66: 2b06 cmp r3, #6 8004b68: d902 bls.n 8004b70 8004b6a: 69fb ldr r3, [r7, #28] 8004b6c: 3b03 subs r3, #3 8004b6e: e000 b.n 8004b72 8004b70: 2300 movs r3, #0 8004b72: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004b74: f04f 32ff mov.w r2, #4294967295 8004b78: 69bb ldr r3, [r7, #24] 8004b7a: fa02 f303 lsl.w r3, r2, r3 8004b7e: 43da mvns r2, r3 8004b80: 68bb ldr r3, [r7, #8] 8004b82: 401a ands r2, r3 8004b84: 697b ldr r3, [r7, #20] 8004b86: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8004b88: f04f 31ff mov.w r1, #4294967295 8004b8c: 697b ldr r3, [r7, #20] 8004b8e: fa01 f303 lsl.w r3, r1, r3 8004b92: 43d9 mvns r1, r3 8004b94: 687b ldr r3, [r7, #4] 8004b96: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8004b98: 4313 orrs r3, r2 ); } 8004b9a: 4618 mov r0, r3 8004b9c: 3724 adds r7, #36 @ 0x24 8004b9e: 46bd mov sp, r7 8004ba0: bc80 pop {r7} 8004ba2: 4770 bx lr 08004ba4 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8004ba4: b580 push {r7, lr} 8004ba6: b082 sub sp, #8 8004ba8: af00 add r7, sp, #0 8004baa: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8004bac: 687b ldr r3, [r7, #4] 8004bae: 3b01 subs r3, #1 8004bb0: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8004bb4: d301 bcc.n 8004bba { return (1UL); /* Reload value impossible */ 8004bb6: 2301 movs r3, #1 8004bb8: e00f b.n 8004bda } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8004bba: 4a0a ldr r2, [pc, #40] @ (8004be4 ) 8004bbc: 687b ldr r3, [r7, #4] 8004bbe: 3b01 subs r3, #1 8004bc0: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8004bc2: 210f movs r1, #15 8004bc4: f04f 30ff mov.w r0, #4294967295 8004bc8: f7ff ff90 bl 8004aec <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8004bcc: 4b05 ldr r3, [pc, #20] @ (8004be4 ) 8004bce: 2200 movs r2, #0 8004bd0: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8004bd2: 4b04 ldr r3, [pc, #16] @ (8004be4 ) 8004bd4: 2207 movs r2, #7 8004bd6: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8004bd8: 2300 movs r3, #0 } 8004bda: 4618 mov r0, r3 8004bdc: 3708 adds r7, #8 8004bde: 46bd mov sp, r7 8004be0: bd80 pop {r7, pc} 8004be2: bf00 nop 8004be4: e000e010 .word 0xe000e010 08004be8 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8004be8: b580 push {r7, lr} 8004bea: b082 sub sp, #8 8004bec: af00 add r7, sp, #0 8004bee: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8004bf0: 6878 ldr r0, [r7, #4] 8004bf2: f7ff ff2d bl 8004a50 <__NVIC_SetPriorityGrouping> } 8004bf6: bf00 nop 8004bf8: 3708 adds r7, #8 8004bfa: 46bd mov sp, r7 8004bfc: bd80 pop {r7, pc} 08004bfe : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8004bfe: b580 push {r7, lr} 8004c00: b086 sub sp, #24 8004c02: af00 add r7, sp, #0 8004c04: 4603 mov r3, r0 8004c06: 60b9 str r1, [r7, #8] 8004c08: 607a str r2, [r7, #4] 8004c0a: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8004c0c: 2300 movs r3, #0 8004c0e: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8004c10: f7ff ff42 bl 8004a98 <__NVIC_GetPriorityGrouping> 8004c14: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8004c16: 687a ldr r2, [r7, #4] 8004c18: 68b9 ldr r1, [r7, #8] 8004c1a: 6978 ldr r0, [r7, #20] 8004c1c: f7ff ff90 bl 8004b40 8004c20: 4602 mov r2, r0 8004c22: f997 300f ldrsb.w r3, [r7, #15] 8004c26: 4611 mov r1, r2 8004c28: 4618 mov r0, r3 8004c2a: f7ff ff5f bl 8004aec <__NVIC_SetPriority> } 8004c2e: bf00 nop 8004c30: 3718 adds r7, #24 8004c32: 46bd mov sp, r7 8004c34: bd80 pop {r7, pc} 08004c36 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8004c36: b580 push {r7, lr} 8004c38: b082 sub sp, #8 8004c3a: af00 add r7, sp, #0 8004c3c: 4603 mov r3, r0 8004c3e: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8004c40: f997 3007 ldrsb.w r3, [r7, #7] 8004c44: 4618 mov r0, r3 8004c46: f7ff ff35 bl 8004ab4 <__NVIC_EnableIRQ> } 8004c4a: bf00 nop 8004c4c: 3708 adds r7, #8 8004c4e: 46bd mov sp, r7 8004c50: bd80 pop {r7, pc} 08004c52 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8004c52: b580 push {r7, lr} 8004c54: b082 sub sp, #8 8004c56: af00 add r7, sp, #0 8004c58: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8004c5a: 6878 ldr r0, [r7, #4] 8004c5c: f7ff ffa2 bl 8004ba4 8004c60: 4603 mov r3, r0 } 8004c62: 4618 mov r0, r3 8004c64: 3708 adds r7, #8 8004c66: 46bd mov sp, r7 8004c68: bd80 pop {r7, pc} 08004c6a : /** * @brief This function handles SYSTICK interrupt request. * @retval None */ void HAL_SYSTICK_IRQHandler(void) { 8004c6a: b580 push {r7, lr} 8004c6c: af00 add r7, sp, #0 HAL_SYSTICK_Callback(); 8004c6e: f7fc fbd3 bl 8001418 } 8004c72: bf00 nop 8004c74: bd80 pop {r7, pc} ... 08004c78 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 8004c78: b480 push {r7} 8004c7a: b085 sub sp, #20 8004c7c: af00 add r7, sp, #0 8004c7e: 6078 str r0, [r7, #4] uint32_t tmp = 0U; 8004c80: 2300 movs r3, #0 8004c82: 60fb str r3, [r7, #12] /* Check the DMA handle allocation */ if(hdma == NULL) 8004c84: 687b ldr r3, [r7, #4] 8004c86: 2b00 cmp r3, #0 8004c88: d101 bne.n 8004c8e { return HAL_ERROR; 8004c8a: 2301 movs r3, #1 8004c8c: e043 b.n 8004d16 hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; hdma->DmaBaseAddress = DMA2; } #else /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 8004c8e: 687b ldr r3, [r7, #4] 8004c90: 681b ldr r3, [r3, #0] 8004c92: 461a mov r2, r3 8004c94: 4b22 ldr r3, [pc, #136] @ (8004d20 ) 8004c96: 4413 add r3, r2 8004c98: 4a22 ldr r2, [pc, #136] @ (8004d24 ) 8004c9a: fba2 2303 umull r2, r3, r2, r3 8004c9e: 091b lsrs r3, r3, #4 8004ca0: 009a lsls r2, r3, #2 8004ca2: 687b ldr r3, [r7, #4] 8004ca4: 641a str r2, [r3, #64] @ 0x40 hdma->DmaBaseAddress = DMA1; 8004ca6: 687b ldr r3, [r7, #4] 8004ca8: 4a1f ldr r2, [pc, #124] @ (8004d28 ) 8004caa: 63da str r2, [r3, #60] @ 0x3c #endif /* DMA2 */ /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8004cac: 687b ldr r3, [r7, #4] 8004cae: 2202 movs r2, #2 8004cb0: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Get the CR register value */ tmp = hdma->Instance->CCR; 8004cb4: 687b ldr r3, [r7, #4] 8004cb6: 681b ldr r3, [r3, #0] 8004cb8: 681b ldr r3, [r3, #0] 8004cba: 60fb str r3, [r7, #12] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8004cbc: 68fb ldr r3, [r7, #12] 8004cbe: f423 537f bic.w r3, r3, #16320 @ 0x3fc0 8004cc2: f023 0330 bic.w r3, r3, #48 @ 0x30 8004cc6: 60fb str r3, [r7, #12] DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 8004cc8: 687b ldr r3, [r7, #4] 8004cca: 685a ldr r2, [r3, #4] hdma->Init.PeriphInc | hdma->Init.MemInc | 8004ccc: 687b ldr r3, [r7, #4] 8004cce: 689b ldr r3, [r3, #8] tmp |= hdma->Init.Direction | 8004cd0: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | 8004cd2: 687b ldr r3, [r7, #4] 8004cd4: 68db ldr r3, [r3, #12] 8004cd6: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8004cd8: 687b ldr r3, [r7, #4] 8004cda: 691b ldr r3, [r3, #16] hdma->Init.PeriphInc | hdma->Init.MemInc | 8004cdc: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8004cde: 687b ldr r3, [r7, #4] 8004ce0: 695b ldr r3, [r3, #20] 8004ce2: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8004ce4: 687b ldr r3, [r7, #4] 8004ce6: 699b ldr r3, [r3, #24] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8004ce8: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8004cea: 687b ldr r3, [r7, #4] 8004cec: 69db ldr r3, [r3, #28] 8004cee: 4313 orrs r3, r2 tmp |= hdma->Init.Direction | 8004cf0: 68fa ldr r2, [r7, #12] 8004cf2: 4313 orrs r3, r2 8004cf4: 60fb str r3, [r7, #12] /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 8004cf6: 687b ldr r3, [r7, #4] 8004cf8: 681b ldr r3, [r3, #0] 8004cfa: 68fa ldr r2, [r7, #12] 8004cfc: 601a str r2, [r3, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8004cfe: 687b ldr r3, [r7, #4] 8004d00: 2200 movs r2, #0 8004d02: 639a str r2, [r3, #56] @ 0x38 /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 8004d04: 687b ldr r3, [r7, #4] 8004d06: 2201 movs r2, #1 8004d08: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8004d0c: 687b ldr r3, [r7, #4] 8004d0e: 2200 movs r2, #0 8004d10: f883 2020 strb.w r2, [r3, #32] return HAL_OK; 8004d14: 2300 movs r3, #0 } 8004d16: 4618 mov r0, r3 8004d18: 3714 adds r7, #20 8004d1a: 46bd mov sp, r7 8004d1c: bc80 pop {r7} 8004d1e: 4770 bx lr 8004d20: bffdfff8 .word 0xbffdfff8 8004d24: cccccccd .word 0xcccccccd 8004d28: 40020000 .word 0x40020000 08004d2c : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8004d2c: b580 push {r7, lr} 8004d2e: b086 sub sp, #24 8004d30: af00 add r7, sp, #0 8004d32: 60f8 str r0, [r7, #12] 8004d34: 60b9 str r1, [r7, #8] 8004d36: 607a str r2, [r7, #4] 8004d38: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8004d3a: 2300 movs r3, #0 8004d3c: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8004d3e: 68fb ldr r3, [r7, #12] 8004d40: f893 3020 ldrb.w r3, [r3, #32] 8004d44: 2b01 cmp r3, #1 8004d46: d101 bne.n 8004d4c 8004d48: 2302 movs r3, #2 8004d4a: e04b b.n 8004de4 8004d4c: 68fb ldr r3, [r7, #12] 8004d4e: 2201 movs r2, #1 8004d50: f883 2020 strb.w r2, [r3, #32] if(HAL_DMA_STATE_READY == hdma->State) 8004d54: 68fb ldr r3, [r7, #12] 8004d56: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8004d5a: b2db uxtb r3, r3 8004d5c: 2b01 cmp r3, #1 8004d5e: d13a bne.n 8004dd6 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8004d60: 68fb ldr r3, [r7, #12] 8004d62: 2202 movs r2, #2 8004d64: f883 2021 strb.w r2, [r3, #33] @ 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8004d68: 68fb ldr r3, [r7, #12] 8004d6a: 2200 movs r2, #0 8004d6c: 639a str r2, [r3, #56] @ 0x38 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 8004d6e: 68fb ldr r3, [r7, #12] 8004d70: 681b ldr r3, [r3, #0] 8004d72: 681a ldr r2, [r3, #0] 8004d74: 68fb ldr r3, [r7, #12] 8004d76: 681b ldr r3, [r3, #0] 8004d78: f022 0201 bic.w r2, r2, #1 8004d7c: 601a str r2, [r3, #0] /* Configure the source, destination address and the data length & clear flags*/ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 8004d7e: 683b ldr r3, [r7, #0] 8004d80: 687a ldr r2, [r7, #4] 8004d82: 68b9 ldr r1, [r7, #8] 8004d84: 68f8 ldr r0, [r7, #12] 8004d86: f000 f937 bl 8004ff8 /* Enable the transfer complete interrupt */ /* Enable the transfer Error interrupt */ if(NULL != hdma->XferHalfCpltCallback) 8004d8a: 68fb ldr r3, [r7, #12] 8004d8c: 6adb ldr r3, [r3, #44] @ 0x2c 8004d8e: 2b00 cmp r3, #0 8004d90: d008 beq.n 8004da4 { /* Enable the Half transfer complete interrupt as well */ __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004d92: 68fb ldr r3, [r7, #12] 8004d94: 681b ldr r3, [r3, #0] 8004d96: 681a ldr r2, [r3, #0] 8004d98: 68fb ldr r3, [r7, #12] 8004d9a: 681b ldr r3, [r3, #0] 8004d9c: f042 020e orr.w r2, r2, #14 8004da0: 601a str r2, [r3, #0] 8004da2: e00f b.n 8004dc4 } else { __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8004da4: 68fb ldr r3, [r7, #12] 8004da6: 681b ldr r3, [r3, #0] 8004da8: 681a ldr r2, [r3, #0] 8004daa: 68fb ldr r3, [r7, #12] 8004dac: 681b ldr r3, [r3, #0] 8004dae: f022 0204 bic.w r2, r2, #4 8004db2: 601a str r2, [r3, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8004db4: 68fb ldr r3, [r7, #12] 8004db6: 681b ldr r3, [r3, #0] 8004db8: 681a ldr r2, [r3, #0] 8004dba: 68fb ldr r3, [r7, #12] 8004dbc: 681b ldr r3, [r3, #0] 8004dbe: f042 020a orr.w r2, r2, #10 8004dc2: 601a str r2, [r3, #0] } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); 8004dc4: 68fb ldr r3, [r7, #12] 8004dc6: 681b ldr r3, [r3, #0] 8004dc8: 681a ldr r2, [r3, #0] 8004dca: 68fb ldr r3, [r7, #12] 8004dcc: 681b ldr r3, [r3, #0] 8004dce: f042 0201 orr.w r2, r2, #1 8004dd2: 601a str r2, [r3, #0] 8004dd4: e005 b.n 8004de2 } else { /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004dd6: 68fb ldr r3, [r7, #12] 8004dd8: 2200 movs r2, #0 8004dda: f883 2020 strb.w r2, [r3, #32] /* Remain BUSY */ status = HAL_BUSY; 8004dde: 2302 movs r3, #2 8004de0: 75fb strb r3, [r7, #23] } return status; 8004de2: 7dfb ldrb r3, [r7, #23] } 8004de4: 4618 mov r0, r3 8004de6: 3718 adds r7, #24 8004de8: 46bd mov sp, r7 8004dea: bd80 pop {r7, pc} 08004dec : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { 8004dec: b580 push {r7, lr} 8004dee: b084 sub sp, #16 8004df0: af00 add r7, sp, #0 8004df2: 6078 str r0, [r7, #4] uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8004df4: 687b ldr r3, [r7, #4] 8004df6: 6bdb ldr r3, [r3, #60] @ 0x3c 8004df8: 681b ldr r3, [r3, #0] 8004dfa: 60fb str r3, [r7, #12] uint32_t source_it = hdma->Instance->CCR; 8004dfc: 687b ldr r3, [r7, #4] 8004dfe: 681b ldr r3, [r3, #0] 8004e00: 681b ldr r3, [r3, #0] 8004e02: 60bb str r3, [r7, #8] /* Half Transfer Complete Interrupt management ******************************/ if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8004e04: 687b ldr r3, [r7, #4] 8004e06: 6c1b ldr r3, [r3, #64] @ 0x40 8004e08: 2204 movs r2, #4 8004e0a: 409a lsls r2, r3 8004e0c: 68fb ldr r3, [r7, #12] 8004e0e: 4013 ands r3, r2 8004e10: 2b00 cmp r3, #0 8004e12: d04f beq.n 8004eb4 8004e14: 68bb ldr r3, [r7, #8] 8004e16: f003 0304 and.w r3, r3, #4 8004e1a: 2b00 cmp r3, #0 8004e1c: d04a beq.n 8004eb4 { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8004e1e: 687b ldr r3, [r7, #4] 8004e20: 681b ldr r3, [r3, #0] 8004e22: 681b ldr r3, [r3, #0] 8004e24: f003 0320 and.w r3, r3, #32 8004e28: 2b00 cmp r3, #0 8004e2a: d107 bne.n 8004e3c { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8004e2c: 687b ldr r3, [r7, #4] 8004e2e: 681b ldr r3, [r3, #0] 8004e30: 681a ldr r2, [r3, #0] 8004e32: 687b ldr r3, [r7, #4] 8004e34: 681b ldr r3, [r3, #0] 8004e36: f022 0204 bic.w r2, r2, #4 8004e3a: 601a str r2, [r3, #0] } /* Clear the half transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 8004e3c: 687b ldr r3, [r7, #4] 8004e3e: 681b ldr r3, [r3, #0] 8004e40: 4a66 ldr r2, [pc, #408] @ (8004fdc ) 8004e42: 4293 cmp r3, r2 8004e44: d029 beq.n 8004e9a 8004e46: 687b ldr r3, [r7, #4] 8004e48: 681b ldr r3, [r3, #0] 8004e4a: 4a65 ldr r2, [pc, #404] @ (8004fe0 ) 8004e4c: 4293 cmp r3, r2 8004e4e: d022 beq.n 8004e96 8004e50: 687b ldr r3, [r7, #4] 8004e52: 681b ldr r3, [r3, #0] 8004e54: 4a63 ldr r2, [pc, #396] @ (8004fe4 ) 8004e56: 4293 cmp r3, r2 8004e58: d01a beq.n 8004e90 8004e5a: 687b ldr r3, [r7, #4] 8004e5c: 681b ldr r3, [r3, #0] 8004e5e: 4a62 ldr r2, [pc, #392] @ (8004fe8 ) 8004e60: 4293 cmp r3, r2 8004e62: d012 beq.n 8004e8a 8004e64: 687b ldr r3, [r7, #4] 8004e66: 681b ldr r3, [r3, #0] 8004e68: 4a60 ldr r2, [pc, #384] @ (8004fec ) 8004e6a: 4293 cmp r3, r2 8004e6c: d00a beq.n 8004e84 8004e6e: 687b ldr r3, [r7, #4] 8004e70: 681b ldr r3, [r3, #0] 8004e72: 4a5f ldr r2, [pc, #380] @ (8004ff0 ) 8004e74: 4293 cmp r3, r2 8004e76: d102 bne.n 8004e7e 8004e78: f44f 0380 mov.w r3, #4194304 @ 0x400000 8004e7c: e00e b.n 8004e9c 8004e7e: f04f 6380 mov.w r3, #67108864 @ 0x4000000 8004e82: e00b b.n 8004e9c 8004e84: f44f 2380 mov.w r3, #262144 @ 0x40000 8004e88: e008 b.n 8004e9c 8004e8a: f44f 4380 mov.w r3, #16384 @ 0x4000 8004e8e: e005 b.n 8004e9c 8004e90: f44f 6380 mov.w r3, #1024 @ 0x400 8004e94: e002 b.n 8004e9c 8004e96: 2340 movs r3, #64 @ 0x40 8004e98: e000 b.n 8004e9c 8004e9a: 2304 movs r3, #4 8004e9c: 4a55 ldr r2, [pc, #340] @ (8004ff4 ) 8004e9e: 6053 str r3, [r2, #4] /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) 8004ea0: 687b ldr r3, [r7, #4] 8004ea2: 6adb ldr r3, [r3, #44] @ 0x2c 8004ea4: 2b00 cmp r3, #0 8004ea6: f000 8094 beq.w 8004fd2 { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); 8004eaa: 687b ldr r3, [r7, #4] 8004eac: 6adb ldr r3, [r3, #44] @ 0x2c 8004eae: 6878 ldr r0, [r7, #4] 8004eb0: 4798 blx r3 if(hdma->XferHalfCpltCallback != NULL) 8004eb2: e08e b.n 8004fd2 } } /* Transfer Complete Interrupt management ***********************************/ else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8004eb4: 687b ldr r3, [r7, #4] 8004eb6: 6c1b ldr r3, [r3, #64] @ 0x40 8004eb8: 2202 movs r2, #2 8004eba: 409a lsls r2, r3 8004ebc: 68fb ldr r3, [r7, #12] 8004ebe: 4013 ands r3, r2 8004ec0: 2b00 cmp r3, #0 8004ec2: d056 beq.n 8004f72 8004ec4: 68bb ldr r3, [r7, #8] 8004ec6: f003 0302 and.w r3, r3, #2 8004eca: 2b00 cmp r3, #0 8004ecc: d051 beq.n 8004f72 { if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8004ece: 687b ldr r3, [r7, #4] 8004ed0: 681b ldr r3, [r3, #0] 8004ed2: 681b ldr r3, [r3, #0] 8004ed4: f003 0320 and.w r3, r3, #32 8004ed8: 2b00 cmp r3, #0 8004eda: d10b bne.n 8004ef4 { /* Disable the transfer complete and error interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8004edc: 687b ldr r3, [r7, #4] 8004ede: 681b ldr r3, [r3, #0] 8004ee0: 681a ldr r2, [r3, #0] 8004ee2: 687b ldr r3, [r7, #4] 8004ee4: 681b ldr r3, [r3, #0] 8004ee6: f022 020a bic.w r2, r2, #10 8004eea: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8004eec: 687b ldr r3, [r7, #4] 8004eee: 2201 movs r2, #1 8004ef0: f883 2021 strb.w r2, [r3, #33] @ 0x21 } /* Clear the transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8004ef4: 687b ldr r3, [r7, #4] 8004ef6: 681b ldr r3, [r3, #0] 8004ef8: 4a38 ldr r2, [pc, #224] @ (8004fdc ) 8004efa: 4293 cmp r3, r2 8004efc: d029 beq.n 8004f52 8004efe: 687b ldr r3, [r7, #4] 8004f00: 681b ldr r3, [r3, #0] 8004f02: 4a37 ldr r2, [pc, #220] @ (8004fe0 ) 8004f04: 4293 cmp r3, r2 8004f06: d022 beq.n 8004f4e 8004f08: 687b ldr r3, [r7, #4] 8004f0a: 681b ldr r3, [r3, #0] 8004f0c: 4a35 ldr r2, [pc, #212] @ (8004fe4 ) 8004f0e: 4293 cmp r3, r2 8004f10: d01a beq.n 8004f48 8004f12: 687b ldr r3, [r7, #4] 8004f14: 681b ldr r3, [r3, #0] 8004f16: 4a34 ldr r2, [pc, #208] @ (8004fe8 ) 8004f18: 4293 cmp r3, r2 8004f1a: d012 beq.n 8004f42 8004f1c: 687b ldr r3, [r7, #4] 8004f1e: 681b ldr r3, [r3, #0] 8004f20: 4a32 ldr r2, [pc, #200] @ (8004fec ) 8004f22: 4293 cmp r3, r2 8004f24: d00a beq.n 8004f3c 8004f26: 687b ldr r3, [r7, #4] 8004f28: 681b ldr r3, [r3, #0] 8004f2a: 4a31 ldr r2, [pc, #196] @ (8004ff0 ) 8004f2c: 4293 cmp r3, r2 8004f2e: d102 bne.n 8004f36 8004f30: f44f 1300 mov.w r3, #2097152 @ 0x200000 8004f34: e00e b.n 8004f54 8004f36: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8004f3a: e00b b.n 8004f54 8004f3c: f44f 3300 mov.w r3, #131072 @ 0x20000 8004f40: e008 b.n 8004f54 8004f42: f44f 5300 mov.w r3, #8192 @ 0x2000 8004f46: e005 b.n 8004f54 8004f48: f44f 7300 mov.w r3, #512 @ 0x200 8004f4c: e002 b.n 8004f54 8004f4e: 2320 movs r3, #32 8004f50: e000 b.n 8004f54 8004f52: 2302 movs r3, #2 8004f54: 4a27 ldr r2, [pc, #156] @ (8004ff4 ) 8004f56: 6053 str r3, [r2, #4] /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004f58: 687b ldr r3, [r7, #4] 8004f5a: 2200 movs r2, #0 8004f5c: f883 2020 strb.w r2, [r3, #32] if(hdma->XferCpltCallback != NULL) 8004f60: 687b ldr r3, [r7, #4] 8004f62: 6a9b ldr r3, [r3, #40] @ 0x28 8004f64: 2b00 cmp r3, #0 8004f66: d034 beq.n 8004fd2 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); 8004f68: 687b ldr r3, [r7, #4] 8004f6a: 6a9b ldr r3, [r3, #40] @ 0x28 8004f6c: 6878 ldr r0, [r7, #4] 8004f6e: 4798 blx r3 if(hdma->XferCpltCallback != NULL) 8004f70: e02f b.n 8004fd2 } } /* Transfer Error Interrupt management **************************************/ else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 8004f72: 687b ldr r3, [r7, #4] 8004f74: 6c1b ldr r3, [r3, #64] @ 0x40 8004f76: 2208 movs r2, #8 8004f78: 409a lsls r2, r3 8004f7a: 68fb ldr r3, [r7, #12] 8004f7c: 4013 ands r3, r2 8004f7e: 2b00 cmp r3, #0 8004f80: d028 beq.n 8004fd4 8004f82: 68bb ldr r3, [r7, #8] 8004f84: f003 0308 and.w r3, r3, #8 8004f88: 2b00 cmp r3, #0 8004f8a: d023 beq.n 8004fd4 { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004f8c: 687b ldr r3, [r7, #4] 8004f8e: 681b ldr r3, [r3, #0] 8004f90: 681a ldr r2, [r3, #0] 8004f92: 687b ldr r3, [r7, #4] 8004f94: 681b ldr r3, [r3, #0] 8004f96: f022 020e bic.w r2, r2, #14 8004f9a: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8004f9c: 687b ldr r3, [r7, #4] 8004f9e: 6c1a ldr r2, [r3, #64] @ 0x40 8004fa0: 687b ldr r3, [r7, #4] 8004fa2: 6bdb ldr r3, [r3, #60] @ 0x3c 8004fa4: 2101 movs r1, #1 8004fa6: fa01 f202 lsl.w r2, r1, r2 8004faa: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; 8004fac: 687b ldr r3, [r7, #4] 8004fae: 2201 movs r2, #1 8004fb0: 639a str r2, [r3, #56] @ 0x38 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8004fb2: 687b ldr r3, [r7, #4] 8004fb4: 2201 movs r2, #1 8004fb6: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004fba: 687b ldr r3, [r7, #4] 8004fbc: 2200 movs r2, #0 8004fbe: f883 2020 strb.w r2, [r3, #32] if (hdma->XferErrorCallback != NULL) 8004fc2: 687b ldr r3, [r7, #4] 8004fc4: 6b1b ldr r3, [r3, #48] @ 0x30 8004fc6: 2b00 cmp r3, #0 8004fc8: d004 beq.n 8004fd4 { /* Transfer error callback */ hdma->XferErrorCallback(hdma); 8004fca: 687b ldr r3, [r7, #4] 8004fcc: 6b1b ldr r3, [r3, #48] @ 0x30 8004fce: 6878 ldr r0, [r7, #4] 8004fd0: 4798 blx r3 } } return; 8004fd2: bf00 nop 8004fd4: bf00 nop } 8004fd6: 3710 adds r7, #16 8004fd8: 46bd mov sp, r7 8004fda: bd80 pop {r7, pc} 8004fdc: 40020008 .word 0x40020008 8004fe0: 4002001c .word 0x4002001c 8004fe4: 40020030 .word 0x40020030 8004fe8: 40020044 .word 0x40020044 8004fec: 40020058 .word 0x40020058 8004ff0: 4002006c .word 0x4002006c 8004ff4: 40020000 .word 0x40020000 08004ff8 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 8004ff8: b480 push {r7} 8004ffa: b085 sub sp, #20 8004ffc: af00 add r7, sp, #0 8004ffe: 60f8 str r0, [r7, #12] 8005000: 60b9 str r1, [r7, #8] 8005002: 607a str r2, [r7, #4] 8005004: 603b str r3, [r7, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8005006: 68fb ldr r3, [r7, #12] 8005008: 6c1a ldr r2, [r3, #64] @ 0x40 800500a: 68fb ldr r3, [r7, #12] 800500c: 6bdb ldr r3, [r3, #60] @ 0x3c 800500e: 2101 movs r1, #1 8005010: fa01 f202 lsl.w r2, r1, r2 8005014: 605a str r2, [r3, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 8005016: 68fb ldr r3, [r7, #12] 8005018: 681b ldr r3, [r3, #0] 800501a: 683a ldr r2, [r7, #0] 800501c: 605a str r2, [r3, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 800501e: 68fb ldr r3, [r7, #12] 8005020: 685b ldr r3, [r3, #4] 8005022: 2b10 cmp r3, #16 8005024: d108 bne.n 8005038 { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 8005026: 68fb ldr r3, [r7, #12] 8005028: 681b ldr r3, [r3, #0] 800502a: 687a ldr r2, [r7, #4] 800502c: 609a str r2, [r3, #8] /* Configure DMA Channel source address */ hdma->Instance->CMAR = SrcAddress; 800502e: 68fb ldr r3, [r7, #12] 8005030: 681b ldr r3, [r3, #0] 8005032: 68ba ldr r2, [r7, #8] 8005034: 60da str r2, [r3, #12] hdma->Instance->CPAR = SrcAddress; /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; } } 8005036: e007 b.n 8005048 hdma->Instance->CPAR = SrcAddress; 8005038: 68fb ldr r3, [r7, #12] 800503a: 681b ldr r3, [r3, #0] 800503c: 68ba ldr r2, [r7, #8] 800503e: 609a str r2, [r3, #8] hdma->Instance->CMAR = DstAddress; 8005040: 68fb ldr r3, [r7, #12] 8005042: 681b ldr r3, [r3, #0] 8005044: 687a ldr r2, [r7, #4] 8005046: 60da str r2, [r3, #12] } 8005048: bf00 nop 800504a: 3714 adds r7, #20 800504c: 46bd mov sp, r7 800504e: bc80 pop {r7} 8005050: 4770 bx lr ... 08005054 : * @param Data: Specifies the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { 8005054: b5f0 push {r4, r5, r6, r7, lr} 8005056: b087 sub sp, #28 8005058: af00 add r7, sp, #0 800505a: 60f8 str r0, [r7, #12] 800505c: 60b9 str r1, [r7, #8] 800505e: e9c7 2300 strd r2, r3, [r7] HAL_StatusTypeDef status = HAL_ERROR; 8005062: 2301 movs r3, #1 8005064: 75fb strb r3, [r7, #23] uint8_t index = 0; 8005066: 2300 movs r3, #0 8005068: 75bb strb r3, [r7, #22] uint8_t nbiterations = 0; 800506a: 2300 movs r3, #0 800506c: 757b strb r3, [r7, #21] /* Process Locked */ __HAL_LOCK(&pFlash); 800506e: 4b2f ldr r3, [pc, #188] @ (800512c ) 8005070: 7e1b ldrb r3, [r3, #24] 8005072: 2b01 cmp r3, #1 8005074: d101 bne.n 800507a 8005076: 2302 movs r3, #2 8005078: e054 b.n 8005124 800507a: 4b2c ldr r3, [pc, #176] @ (800512c ) 800507c: 2201 movs r2, #1 800507e: 761a strb r2, [r3, #24] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8005080: f24c 3050 movw r0, #50000 @ 0xc350 8005084: f000 f8a8 bl 80051d8 8005088: 4603 mov r3, r0 800508a: 75fb strb r3, [r7, #23] /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE); } #endif /* FLASH_BANK2_END */ if(status == HAL_OK) 800508c: 7dfb ldrb r3, [r7, #23] 800508e: 2b00 cmp r3, #0 8005090: d144 bne.n 800511c { if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8005092: 68fb ldr r3, [r7, #12] 8005094: 2b01 cmp r3, #1 8005096: d102 bne.n 800509e { /* Program halfword (16-bit) at a specified address. */ nbiterations = 1U; 8005098: 2301 movs r3, #1 800509a: 757b strb r3, [r7, #21] 800509c: e007 b.n 80050ae } else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) 800509e: 68fb ldr r3, [r7, #12] 80050a0: 2b02 cmp r3, #2 80050a2: d102 bne.n 80050aa { /* Program word (32-bit = 2*16-bit) at a specified address. */ nbiterations = 2U; 80050a4: 2302 movs r3, #2 80050a6: 757b strb r3, [r7, #21] 80050a8: e001 b.n 80050ae } else { /* Program double word (64-bit = 4*16-bit) at a specified address. */ nbiterations = 4U; 80050aa: 2304 movs r3, #4 80050ac: 757b strb r3, [r7, #21] } for (index = 0U; index < nbiterations; index++) 80050ae: 2300 movs r3, #0 80050b0: 75bb strb r3, [r7, #22] 80050b2: e02d b.n 8005110 { FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 80050b4: 7dbb ldrb r3, [r7, #22] 80050b6: 005a lsls r2, r3, #1 80050b8: 68bb ldr r3, [r7, #8] 80050ba: eb02 0c03 add.w ip, r2, r3 80050be: 7dbb ldrb r3, [r7, #22] 80050c0: 0119 lsls r1, r3, #4 80050c2: e9d7 2300 ldrd r2, r3, [r7] 80050c6: f1c1 0620 rsb r6, r1, #32 80050ca: f1a1 0020 sub.w r0, r1, #32 80050ce: fa22 f401 lsr.w r4, r2, r1 80050d2: fa03 f606 lsl.w r6, r3, r6 80050d6: 4334 orrs r4, r6 80050d8: fa23 f000 lsr.w r0, r3, r0 80050dc: 4304 orrs r4, r0 80050de: fa23 f501 lsr.w r5, r3, r1 80050e2: b2a3 uxth r3, r4 80050e4: 4619 mov r1, r3 80050e6: 4660 mov r0, ip 80050e8: f000 f85a bl 80051a0 #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 80050ec: f24c 3050 movw r0, #50000 @ 0xc350 80050f0: f000 f872 bl 80051d8 80050f4: 4603 mov r3, r0 80050f6: 75fb strb r3, [r7, #23] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 80050f8: 4b0d ldr r3, [pc, #52] @ (8005130 ) 80050fa: 691b ldr r3, [r3, #16] 80050fc: 4a0c ldr r2, [pc, #48] @ (8005130 ) 80050fe: f023 0301 bic.w r3, r3, #1 8005102: 6113 str r3, [r2, #16] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* In case of error, stop programation procedure */ if (status != HAL_OK) 8005104: 7dfb ldrb r3, [r7, #23] 8005106: 2b00 cmp r3, #0 8005108: d107 bne.n 800511a for (index = 0U; index < nbiterations; index++) 800510a: 7dbb ldrb r3, [r7, #22] 800510c: 3301 adds r3, #1 800510e: 75bb strb r3, [r7, #22] 8005110: 7dba ldrb r2, [r7, #22] 8005112: 7d7b ldrb r3, [r7, #21] 8005114: 429a cmp r2, r3 8005116: d3cd bcc.n 80050b4 8005118: e000 b.n 800511c { break; 800511a: bf00 nop } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 800511c: 4b03 ldr r3, [pc, #12] @ (800512c ) 800511e: 2200 movs r2, #0 8005120: 761a strb r2, [r3, #24] return status; 8005122: 7dfb ldrb r3, [r7, #23] } 8005124: 4618 mov r0, r3 8005126: 371c adds r7, #28 8005128: 46bd mov sp, r7 800512a: bdf0 pop {r4, r5, r6, r7, pc} 800512c: 20000450 .word 0x20000450 8005130: 40022000 .word 0x40022000 08005134 : /** * @brief Unlock the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Unlock(void) { 8005134: b480 push {r7} 8005136: b083 sub sp, #12 8005138: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 800513a: 2300 movs r3, #0 800513c: 71fb strb r3, [r7, #7] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 800513e: 4b0d ldr r3, [pc, #52] @ (8005174 ) 8005140: 691b ldr r3, [r3, #16] 8005142: f003 0380 and.w r3, r3, #128 @ 0x80 8005146: 2b00 cmp r3, #0 8005148: d00d beq.n 8005166 { /* Authorize the FLASH Registers access */ WRITE_REG(FLASH->KEYR, FLASH_KEY1); 800514a: 4b0a ldr r3, [pc, #40] @ (8005174 ) 800514c: 4a0a ldr r2, [pc, #40] @ (8005178 ) 800514e: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 8005150: 4b08 ldr r3, [pc, #32] @ (8005174 ) 8005152: 4a0a ldr r2, [pc, #40] @ (800517c ) 8005154: 605a str r2, [r3, #4] /* Verify Flash is unlocked */ if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 8005156: 4b07 ldr r3, [pc, #28] @ (8005174 ) 8005158: 691b ldr r3, [r3, #16] 800515a: f003 0380 and.w r3, r3, #128 @ 0x80 800515e: 2b00 cmp r3, #0 8005160: d001 beq.n 8005166 { status = HAL_ERROR; 8005162: 2301 movs r3, #1 8005164: 71fb strb r3, [r7, #7] status = HAL_ERROR; } } #endif /* FLASH_BANK2_END */ return status; 8005166: 79fb ldrb r3, [r7, #7] } 8005168: 4618 mov r0, r3 800516a: 370c adds r7, #12 800516c: 46bd mov sp, r7 800516e: bc80 pop {r7} 8005170: 4770 bx lr 8005172: bf00 nop 8005174: 40022000 .word 0x40022000 8005178: 45670123 .word 0x45670123 800517c: cdef89ab .word 0xcdef89ab 08005180 : /** * @brief Locks the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Lock(void) { 8005180: b480 push {r7} 8005182: af00 add r7, sp, #0 /* Set the LOCK Bit to lock the FLASH Registers access */ SET_BIT(FLASH->CR, FLASH_CR_LOCK); 8005184: 4b05 ldr r3, [pc, #20] @ (800519c ) 8005186: 691b ldr r3, [r3, #16] 8005188: 4a04 ldr r2, [pc, #16] @ (800519c ) 800518a: f043 0380 orr.w r3, r3, #128 @ 0x80 800518e: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) /* Set the LOCK Bit to lock the FLASH BANK2 Registers access */ SET_BIT(FLASH->CR2, FLASH_CR2_LOCK); #endif /* FLASH_BANK2_END */ return HAL_OK; 8005190: 2300 movs r3, #0 } 8005192: 4618 mov r0, r3 8005194: 46bd mov sp, r7 8005196: bc80 pop {r7} 8005198: 4770 bx lr 800519a: bf00 nop 800519c: 40022000 .word 0x40022000 080051a0 : * @param Address specify the address to be programmed. * @param Data specify the data to be programmed. * @retval None */ static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) { 80051a0: b480 push {r7} 80051a2: b083 sub sp, #12 80051a4: af00 add r7, sp, #0 80051a6: 6078 str r0, [r7, #4] 80051a8: 460b mov r3, r1 80051aa: 807b strh r3, [r7, #2] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80051ac: 4b08 ldr r3, [pc, #32] @ (80051d0 ) 80051ae: 2200 movs r2, #0 80051b0: 61da str r2, [r3, #28] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Proceed to program the new data */ SET_BIT(FLASH->CR, FLASH_CR_PG); 80051b2: 4b08 ldr r3, [pc, #32] @ (80051d4 ) 80051b4: 691b ldr r3, [r3, #16] 80051b6: 4a07 ldr r2, [pc, #28] @ (80051d4 ) 80051b8: f043 0301 orr.w r3, r3, #1 80051bc: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* Write data in the address */ *(__IO uint16_t*)Address = Data; 80051be: 687b ldr r3, [r7, #4] 80051c0: 887a ldrh r2, [r7, #2] 80051c2: 801a strh r2, [r3, #0] } 80051c4: bf00 nop 80051c6: 370c adds r7, #12 80051c8: 46bd mov sp, r7 80051ca: bc80 pop {r7} 80051cc: 4770 bx lr 80051ce: bf00 nop 80051d0: 20000450 .word 0x20000450 80051d4: 40022000 .word 0x40022000 080051d8 : * @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operation timeout * @retval HAL Status */ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) { 80051d8: b580 push {r7, lr} 80051da: b084 sub sp, #16 80051dc: af00 add r7, sp, #0 80051de: 6078 str r0, [r7, #4] /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. Even if the FLASH operation fails, the BUSY flag will be reset and an error flag will be set */ uint32_t tickstart = HAL_GetTick(); 80051e0: f7ff f860 bl 80042a4 80051e4: 60f8 str r0, [r7, #12] while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 80051e6: e010 b.n 800520a { if (Timeout != HAL_MAX_DELAY) 80051e8: 687b ldr r3, [r7, #4] 80051ea: f1b3 3fff cmp.w r3, #4294967295 80051ee: d00c beq.n 800520a { if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 80051f0: 687b ldr r3, [r7, #4] 80051f2: 2b00 cmp r3, #0 80051f4: d007 beq.n 8005206 80051f6: f7ff f855 bl 80042a4 80051fa: 4602 mov r2, r0 80051fc: 68fb ldr r3, [r7, #12] 80051fe: 1ad3 subs r3, r2, r3 8005200: 687a ldr r2, [r7, #4] 8005202: 429a cmp r2, r3 8005204: d201 bcs.n 800520a { return HAL_TIMEOUT; 8005206: 2303 movs r3, #3 8005208: e025 b.n 8005256 while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 800520a: 4b15 ldr r3, [pc, #84] @ (8005260 ) 800520c: 68db ldr r3, [r3, #12] 800520e: f003 0301 and.w r3, r3, #1 8005212: 2b00 cmp r3, #0 8005214: d1e8 bne.n 80051e8 } } } /* Check FLASH End of Operation flag */ if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 8005216: 4b12 ldr r3, [pc, #72] @ (8005260 ) 8005218: 68db ldr r3, [r3, #12] 800521a: f003 0320 and.w r3, r3, #32 800521e: 2b00 cmp r3, #0 8005220: d002 beq.n 8005228 { /* Clear FLASH End of Operation pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 8005222: 4b0f ldr r3, [pc, #60] @ (8005260 ) 8005224: 2220 movs r2, #32 8005226: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 8005228: 4b0d ldr r3, [pc, #52] @ (8005260 ) 800522a: 68db ldr r3, [r3, #12] 800522c: f003 0310 and.w r3, r3, #16 8005230: 2b00 cmp r3, #0 8005232: d10b bne.n 800524c __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8005234: 4b0a ldr r3, [pc, #40] @ (8005260 ) 8005236: 69db ldr r3, [r3, #28] 8005238: f003 0301 and.w r3, r3, #1 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 800523c: 2b00 cmp r3, #0 800523e: d105 bne.n 800524c __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8005240: 4b07 ldr r3, [pc, #28] @ (8005260 ) 8005242: 68db ldr r3, [r3, #12] 8005244: f003 0304 and.w r3, r3, #4 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 8005248: 2b00 cmp r3, #0 800524a: d003 beq.n 8005254 { /*Save the error code*/ FLASH_SetErrorCode(); 800524c: f000 f80a bl 8005264 return HAL_ERROR; 8005250: 2301 movs r3, #1 8005252: e000 b.n 8005256 } /* There is no error flag set */ return HAL_OK; 8005254: 2300 movs r3, #0 } 8005256: 4618 mov r0, r3 8005258: 3710 adds r7, #16 800525a: 46bd mov sp, r7 800525c: bd80 pop {r7, pc} 800525e: bf00 nop 8005260: 40022000 .word 0x40022000 08005264 : /** * @brief Set the specific FLASH error flag. * @retval None */ static void FLASH_SetErrorCode(void) { 8005264: b480 push {r7} 8005266: b083 sub sp, #12 8005268: af00 add r7, sp, #0 uint32_t flags = 0U; 800526a: 2300 movs r3, #0 800526c: 607b str r3, [r7, #4] #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 800526e: 4b23 ldr r3, [pc, #140] @ (80052fc ) 8005270: 68db ldr r3, [r3, #12] 8005272: f003 0310 and.w r3, r3, #16 8005276: 2b00 cmp r3, #0 8005278: d009 beq.n 800528e #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 800527a: 4b21 ldr r3, [pc, #132] @ (8005300 ) 800527c: 69db ldr r3, [r3, #28] 800527e: f043 0302 orr.w r3, r3, #2 8005282: 4a1f ldr r2, [pc, #124] @ (8005300 ) 8005284: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 8005286: 687b ldr r3, [r7, #4] 8005288: f043 0310 orr.w r3, r3, #16 800528c: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 800528e: 4b1b ldr r3, [pc, #108] @ (80052fc ) 8005290: 68db ldr r3, [r3, #12] 8005292: f003 0304 and.w r3, r3, #4 8005296: 2b00 cmp r3, #0 8005298: d009 beq.n 80052ae #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 800529a: 4b19 ldr r3, [pc, #100] @ (8005300 ) 800529c: 69db ldr r3, [r3, #28] 800529e: f043 0301 orr.w r3, r3, #1 80052a2: 4a17 ldr r2, [pc, #92] @ (8005300 ) 80052a4: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 80052a6: 687b ldr r3, [r7, #4] 80052a8: f043 0304 orr.w r3, r3, #4 80052ac: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 80052ae: 4b13 ldr r3, [pc, #76] @ (80052fc ) 80052b0: 69db ldr r3, [r3, #28] 80052b2: f003 0301 and.w r3, r3, #1 80052b6: 2b00 cmp r3, #0 80052b8: d00b beq.n 80052d2 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 80052ba: 4b11 ldr r3, [pc, #68] @ (8005300 ) 80052bc: 69db ldr r3, [r3, #28] 80052be: f043 0304 orr.w r3, r3, #4 80052c2: 4a0f ldr r2, [pc, #60] @ (8005300 ) 80052c4: 61d3 str r3, [r2, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 80052c6: 4b0d ldr r3, [pc, #52] @ (80052fc ) 80052c8: 69db ldr r3, [r3, #28] 80052ca: 4a0c ldr r2, [pc, #48] @ (80052fc ) 80052cc: f023 0301 bic.w r3, r3, #1 80052d0: 61d3 str r3, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 80052d2: 687b ldr r3, [r7, #4] 80052d4: f240 1201 movw r2, #257 @ 0x101 80052d8: 4293 cmp r3, r2 80052da: d106 bne.n 80052ea 80052dc: 4b07 ldr r3, [pc, #28] @ (80052fc ) 80052de: 69db ldr r3, [r3, #28] 80052e0: 4a06 ldr r2, [pc, #24] @ (80052fc ) 80052e2: f023 0301 bic.w r3, r3, #1 80052e6: 61d3 str r3, [r2, #28] } 80052e8: e002 b.n 80052f0 __HAL_FLASH_CLEAR_FLAG(flags); 80052ea: 4a04 ldr r2, [pc, #16] @ (80052fc ) 80052ec: 687b ldr r3, [r7, #4] 80052ee: 60d3 str r3, [r2, #12] } 80052f0: bf00 nop 80052f2: 370c adds r7, #12 80052f4: 46bd mov sp, r7 80052f6: bc80 pop {r7} 80052f8: 4770 bx lr 80052fa: bf00 nop 80052fc: 40022000 .word 0x40022000 8005300: 20000450 .word 0x20000450 08005304 : * (0xFFFFFFFF means that all the pages have been correctly erased) * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { 8005304: b580 push {r7, lr} 8005306: b084 sub sp, #16 8005308: af00 add r7, sp, #0 800530a: 6078 str r0, [r7, #4] 800530c: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_ERROR; 800530e: 2301 movs r3, #1 8005310: 73fb strb r3, [r7, #15] uint32_t address = 0U; 8005312: 2300 movs r3, #0 8005314: 60bb str r3, [r7, #8] /* Process Locked */ __HAL_LOCK(&pFlash); 8005316: 4b2f ldr r3, [pc, #188] @ (80053d4 ) 8005318: 7e1b ldrb r3, [r3, #24] 800531a: 2b01 cmp r3, #1 800531c: d101 bne.n 8005322 800531e: 2302 movs r3, #2 8005320: e053 b.n 80053ca 8005322: 4b2c ldr r3, [pc, #176] @ (80053d4 ) 8005324: 2201 movs r2, #1 8005326: 761a strb r2, [r3, #24] /* Check the parameters */ assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 8005328: 687b ldr r3, [r7, #4] 800532a: 681b ldr r3, [r3, #0] 800532c: 2b02 cmp r3, #2 800532e: d116 bne.n 800535e else #endif /* FLASH_BANK2_END */ { /* Mass Erase requested for Bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 8005330: f24c 3050 movw r0, #50000 @ 0xc350 8005334: f7ff ff50 bl 80051d8 8005338: 4603 mov r3, r0 800533a: 2b00 cmp r3, #0 800533c: d141 bne.n 80053c2 { /*Mass erase to be done*/ FLASH_MassErase(FLASH_BANK_1); 800533e: 2001 movs r0, #1 8005340: f000 f84c bl 80053dc /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8005344: f24c 3050 movw r0, #50000 @ 0xc350 8005348: f7ff ff46 bl 80051d8 800534c: 4603 mov r3, r0 800534e: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the MER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 8005350: 4b21 ldr r3, [pc, #132] @ (80053d8 ) 8005352: 691b ldr r3, [r3, #16] 8005354: 4a20 ldr r2, [pc, #128] @ (80053d8 ) 8005356: f023 0304 bic.w r3, r3, #4 800535a: 6113 str r3, [r2, #16] 800535c: e031 b.n 80053c2 else #endif /* FLASH_BANK2_END */ { /* Page Erase requested on address located on bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 800535e: f24c 3050 movw r0, #50000 @ 0xc350 8005362: f7ff ff39 bl 80051d8 8005366: 4603 mov r3, r0 8005368: 2b00 cmp r3, #0 800536a: d12a bne.n 80053c2 { /*Initialization of PageError variable*/ *PageError = 0xFFFFFFFFU; 800536c: 683b ldr r3, [r7, #0] 800536e: f04f 32ff mov.w r2, #4294967295 8005372: 601a str r2, [r3, #0] /* Erase page by page to be done*/ for(address = pEraseInit->PageAddress; 8005374: 687b ldr r3, [r7, #4] 8005376: 689b ldr r3, [r3, #8] 8005378: 60bb str r3, [r7, #8] 800537a: e019 b.n 80053b0 address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); address += FLASH_PAGE_SIZE) { FLASH_PageErase(address); 800537c: 68b8 ldr r0, [r7, #8] 800537e: f000 f849 bl 8005414 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 8005382: f24c 3050 movw r0, #50000 @ 0xc350 8005386: f7ff ff27 bl 80051d8 800538a: 4603 mov r3, r0 800538c: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the PER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 800538e: 4b12 ldr r3, [pc, #72] @ (80053d8 ) 8005390: 691b ldr r3, [r3, #16] 8005392: 4a11 ldr r2, [pc, #68] @ (80053d8 ) 8005394: f023 0302 bic.w r3, r3, #2 8005398: 6113 str r3, [r2, #16] if (status != HAL_OK) 800539a: 7bfb ldrb r3, [r7, #15] 800539c: 2b00 cmp r3, #0 800539e: d003 beq.n 80053a8 { /* In case of error, stop erase procedure and return the faulty address */ *PageError = address; 80053a0: 683b ldr r3, [r7, #0] 80053a2: 68ba ldr r2, [r7, #8] 80053a4: 601a str r2, [r3, #0] break; 80053a6: e00c b.n 80053c2 address += FLASH_PAGE_SIZE) 80053a8: 68bb ldr r3, [r7, #8] 80053aa: f503 6380 add.w r3, r3, #1024 @ 0x400 80053ae: 60bb str r3, [r7, #8] address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 80053b0: 687b ldr r3, [r7, #4] 80053b2: 68db ldr r3, [r3, #12] 80053b4: 029a lsls r2, r3, #10 80053b6: 687b ldr r3, [r7, #4] 80053b8: 689b ldr r3, [r3, #8] 80053ba: 4413 add r3, r2 80053bc: 68ba ldr r2, [r7, #8] 80053be: 429a cmp r2, r3 80053c0: d3dc bcc.n 800537c } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 80053c2: 4b04 ldr r3, [pc, #16] @ (80053d4 ) 80053c4: 2200 movs r2, #0 80053c6: 761a strb r2, [r3, #24] return status; 80053c8: 7bfb ldrb r3, [r7, #15] } 80053ca: 4618 mov r0, r3 80053cc: 3710 adds r7, #16 80053ce: 46bd mov sp, r7 80053d0: bd80 pop {r7, pc} 80053d2: bf00 nop 80053d4: 20000450 .word 0x20000450 80053d8: 40022000 .word 0x40022000 080053dc : @endif * * @retval None */ static void FLASH_MassErase(uint32_t Banks) { 80053dc: b480 push {r7} 80053de: b083 sub sp, #12 80053e0: af00 add r7, sp, #0 80053e2: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 80053e4: 4b09 ldr r3, [pc, #36] @ (800540c ) 80053e6: 2200 movs r2, #0 80053e8: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 80053ea: 4b09 ldr r3, [pc, #36] @ (8005410 ) 80053ec: 691b ldr r3, [r3, #16] 80053ee: 4a08 ldr r2, [pc, #32] @ (8005410 ) 80053f0: f043 0304 orr.w r3, r3, #4 80053f4: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80053f6: 4b06 ldr r3, [pc, #24] @ (8005410 ) 80053f8: 691b ldr r3, [r3, #16] 80053fa: 4a05 ldr r2, [pc, #20] @ (8005410 ) 80053fc: f043 0340 orr.w r3, r3, #64 @ 0x40 8005400: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 8005402: bf00 nop 8005404: 370c adds r7, #12 8005406: 46bd mov sp, r7 8005408: bc80 pop {r7} 800540a: 4770 bx lr 800540c: 20000450 .word 0x20000450 8005410: 40022000 .word 0x40022000 08005414 : * The value of this parameter depend on device used within the same series * * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { 8005414: b480 push {r7} 8005416: b083 sub sp, #12 8005418: af00 add r7, sp, #0 800541a: 6078 str r0, [r7, #4] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 800541c: 4b0b ldr r3, [pc, #44] @ (800544c ) 800541e: 2200 movs r2, #0 8005420: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 8005422: 4b0b ldr r3, [pc, #44] @ (8005450 ) 8005424: 691b ldr r3, [r3, #16] 8005426: 4a0a ldr r2, [pc, #40] @ (8005450 ) 8005428: f043 0302 orr.w r3, r3, #2 800542c: 6113 str r3, [r2, #16] WRITE_REG(FLASH->AR, PageAddress); 800542e: 4a08 ldr r2, [pc, #32] @ (8005450 ) 8005430: 687b ldr r3, [r7, #4] 8005432: 6153 str r3, [r2, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 8005434: 4b06 ldr r3, [pc, #24] @ (8005450 ) 8005436: 691b ldr r3, [r3, #16] 8005438: 4a05 ldr r2, [pc, #20] @ (8005450 ) 800543a: f043 0340 orr.w r3, r3, #64 @ 0x40 800543e: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 8005440: bf00 nop 8005442: 370c adds r7, #12 8005444: 46bd mov sp, r7 8005446: bc80 pop {r7} 8005448: 4770 bx lr 800544a: bf00 nop 800544c: 20000450 .word 0x20000450 8005450: 40022000 .word 0x40022000 08005454 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8005454: b480 push {r7} 8005456: b08b sub sp, #44 @ 0x2c 8005458: af00 add r7, sp, #0 800545a: 6078 str r0, [r7, #4] 800545c: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 800545e: 2300 movs r3, #0 8005460: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 8005462: 2300 movs r3, #0 8005464: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 8005466: e169 b.n 800573c { /* Get the IO position */ ioposition = (0x01uL << position); 8005468: 2201 movs r2, #1 800546a: 6a7b ldr r3, [r7, #36] @ 0x24 800546c: fa02 f303 lsl.w r3, r2, r3 8005470: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 8005472: 683b ldr r3, [r7, #0] 8005474: 681b ldr r3, [r3, #0] 8005476: 69fa ldr r2, [r7, #28] 8005478: 4013 ands r3, r2 800547a: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 800547c: 69ba ldr r2, [r7, #24] 800547e: 69fb ldr r3, [r7, #28] 8005480: 429a cmp r2, r3 8005482: f040 8158 bne.w 8005736 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 8005486: 683b ldr r3, [r7, #0] 8005488: 685b ldr r3, [r3, #4] 800548a: 4a9a ldr r2, [pc, #616] @ (80056f4 ) 800548c: 4293 cmp r3, r2 800548e: d05e beq.n 800554e 8005490: 4a98 ldr r2, [pc, #608] @ (80056f4 ) 8005492: 4293 cmp r3, r2 8005494: d875 bhi.n 8005582 8005496: 4a98 ldr r2, [pc, #608] @ (80056f8 ) 8005498: 4293 cmp r3, r2 800549a: d058 beq.n 800554e 800549c: 4a96 ldr r2, [pc, #600] @ (80056f8 ) 800549e: 4293 cmp r3, r2 80054a0: d86f bhi.n 8005582 80054a2: 4a96 ldr r2, [pc, #600] @ (80056fc ) 80054a4: 4293 cmp r3, r2 80054a6: d052 beq.n 800554e 80054a8: 4a94 ldr r2, [pc, #592] @ (80056fc ) 80054aa: 4293 cmp r3, r2 80054ac: d869 bhi.n 8005582 80054ae: 4a94 ldr r2, [pc, #592] @ (8005700 ) 80054b0: 4293 cmp r3, r2 80054b2: d04c beq.n 800554e 80054b4: 4a92 ldr r2, [pc, #584] @ (8005700 ) 80054b6: 4293 cmp r3, r2 80054b8: d863 bhi.n 8005582 80054ba: 4a92 ldr r2, [pc, #584] @ (8005704 ) 80054bc: 4293 cmp r3, r2 80054be: d046 beq.n 800554e 80054c0: 4a90 ldr r2, [pc, #576] @ (8005704 ) 80054c2: 4293 cmp r3, r2 80054c4: d85d bhi.n 8005582 80054c6: 2b12 cmp r3, #18 80054c8: d82a bhi.n 8005520 80054ca: 2b12 cmp r3, #18 80054cc: d859 bhi.n 8005582 80054ce: a201 add r2, pc, #4 @ (adr r2, 80054d4 ) 80054d0: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80054d4: 0800554f .word 0x0800554f 80054d8: 08005529 .word 0x08005529 80054dc: 0800553b .word 0x0800553b 80054e0: 0800557d .word 0x0800557d 80054e4: 08005583 .word 0x08005583 80054e8: 08005583 .word 0x08005583 80054ec: 08005583 .word 0x08005583 80054f0: 08005583 .word 0x08005583 80054f4: 08005583 .word 0x08005583 80054f8: 08005583 .word 0x08005583 80054fc: 08005583 .word 0x08005583 8005500: 08005583 .word 0x08005583 8005504: 08005583 .word 0x08005583 8005508: 08005583 .word 0x08005583 800550c: 08005583 .word 0x08005583 8005510: 08005583 .word 0x08005583 8005514: 08005583 .word 0x08005583 8005518: 08005531 .word 0x08005531 800551c: 08005545 .word 0x08005545 8005520: 4a79 ldr r2, [pc, #484] @ (8005708 ) 8005522: 4293 cmp r3, r2 8005524: d013 beq.n 800554e config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 8005526: e02c b.n 8005582 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 8005528: 683b ldr r3, [r7, #0] 800552a: 68db ldr r3, [r3, #12] 800552c: 623b str r3, [r7, #32] break; 800552e: e029 b.n 8005584 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 8005530: 683b ldr r3, [r7, #0] 8005532: 68db ldr r3, [r3, #12] 8005534: 3304 adds r3, #4 8005536: 623b str r3, [r7, #32] break; 8005538: e024 b.n 8005584 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 800553a: 683b ldr r3, [r7, #0] 800553c: 68db ldr r3, [r3, #12] 800553e: 3308 adds r3, #8 8005540: 623b str r3, [r7, #32] break; 8005542: e01f b.n 8005584 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 8005544: 683b ldr r3, [r7, #0] 8005546: 68db ldr r3, [r3, #12] 8005548: 330c adds r3, #12 800554a: 623b str r3, [r7, #32] break; 800554c: e01a b.n 8005584 if (GPIO_Init->Pull == GPIO_NOPULL) 800554e: 683b ldr r3, [r7, #0] 8005550: 689b ldr r3, [r3, #8] 8005552: 2b00 cmp r3, #0 8005554: d102 bne.n 800555c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 8005556: 2304 movs r3, #4 8005558: 623b str r3, [r7, #32] break; 800555a: e013 b.n 8005584 else if (GPIO_Init->Pull == GPIO_PULLUP) 800555c: 683b ldr r3, [r7, #0] 800555e: 689b ldr r3, [r3, #8] 8005560: 2b01 cmp r3, #1 8005562: d105 bne.n 8005570 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8005564: 2308 movs r3, #8 8005566: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 8005568: 687b ldr r3, [r7, #4] 800556a: 69fa ldr r2, [r7, #28] 800556c: 611a str r2, [r3, #16] break; 800556e: e009 b.n 8005584 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 8005570: 2308 movs r3, #8 8005572: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 8005574: 687b ldr r3, [r7, #4] 8005576: 69fa ldr r2, [r7, #28] 8005578: 615a str r2, [r3, #20] break; 800557a: e003 b.n 8005584 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 800557c: 2300 movs r3, #0 800557e: 623b str r3, [r7, #32] break; 8005580: e000 b.n 8005584 break; 8005582: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 8005584: 69bb ldr r3, [r7, #24] 8005586: 2bff cmp r3, #255 @ 0xff 8005588: d801 bhi.n 800558e 800558a: 687b ldr r3, [r7, #4] 800558c: e001 b.n 8005592 800558e: 687b ldr r3, [r7, #4] 8005590: 3304 adds r3, #4 8005592: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 8005594: 69bb ldr r3, [r7, #24] 8005596: 2bff cmp r3, #255 @ 0xff 8005598: d802 bhi.n 80055a0 800559a: 6a7b ldr r3, [r7, #36] @ 0x24 800559c: 009b lsls r3, r3, #2 800559e: e002 b.n 80055a6 80055a0: 6a7b ldr r3, [r7, #36] @ 0x24 80055a2: 3b08 subs r3, #8 80055a4: 009b lsls r3, r3, #2 80055a6: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 80055a8: 697b ldr r3, [r7, #20] 80055aa: 681a ldr r2, [r3, #0] 80055ac: 210f movs r1, #15 80055ae: 693b ldr r3, [r7, #16] 80055b0: fa01 f303 lsl.w r3, r1, r3 80055b4: 43db mvns r3, r3 80055b6: 401a ands r2, r3 80055b8: 6a39 ldr r1, [r7, #32] 80055ba: 693b ldr r3, [r7, #16] 80055bc: fa01 f303 lsl.w r3, r1, r3 80055c0: 431a orrs r2, r3 80055c2: 697b ldr r3, [r7, #20] 80055c4: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 80055c6: 683b ldr r3, [r7, #0] 80055c8: 685b ldr r3, [r3, #4] 80055ca: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80055ce: 2b00 cmp r3, #0 80055d0: f000 80b1 beq.w 8005736 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 80055d4: 4b4d ldr r3, [pc, #308] @ (800570c ) 80055d6: 699b ldr r3, [r3, #24] 80055d8: 4a4c ldr r2, [pc, #304] @ (800570c ) 80055da: f043 0301 orr.w r3, r3, #1 80055de: 6193 str r3, [r2, #24] 80055e0: 4b4a ldr r3, [pc, #296] @ (800570c ) 80055e2: 699b ldr r3, [r3, #24] 80055e4: f003 0301 and.w r3, r3, #1 80055e8: 60bb str r3, [r7, #8] 80055ea: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 80055ec: 4a48 ldr r2, [pc, #288] @ (8005710 ) 80055ee: 6a7b ldr r3, [r7, #36] @ 0x24 80055f0: 089b lsrs r3, r3, #2 80055f2: 3302 adds r3, #2 80055f4: f852 3023 ldr.w r3, [r2, r3, lsl #2] 80055f8: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 80055fa: 6a7b ldr r3, [r7, #36] @ 0x24 80055fc: f003 0303 and.w r3, r3, #3 8005600: 009b lsls r3, r3, #2 8005602: 220f movs r2, #15 8005604: fa02 f303 lsl.w r3, r2, r3 8005608: 43db mvns r3, r3 800560a: 68fa ldr r2, [r7, #12] 800560c: 4013 ands r3, r2 800560e: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8005610: 687b ldr r3, [r7, #4] 8005612: 4a40 ldr r2, [pc, #256] @ (8005714 ) 8005614: 4293 cmp r3, r2 8005616: d013 beq.n 8005640 8005618: 687b ldr r3, [r7, #4] 800561a: 4a3f ldr r2, [pc, #252] @ (8005718 ) 800561c: 4293 cmp r3, r2 800561e: d00d beq.n 800563c 8005620: 687b ldr r3, [r7, #4] 8005622: 4a3e ldr r2, [pc, #248] @ (800571c ) 8005624: 4293 cmp r3, r2 8005626: d007 beq.n 8005638 8005628: 687b ldr r3, [r7, #4] 800562a: 4a3d ldr r2, [pc, #244] @ (8005720 ) 800562c: 4293 cmp r3, r2 800562e: d101 bne.n 8005634 8005630: 2303 movs r3, #3 8005632: e006 b.n 8005642 8005634: 2304 movs r3, #4 8005636: e004 b.n 8005642 8005638: 2302 movs r3, #2 800563a: e002 b.n 8005642 800563c: 2301 movs r3, #1 800563e: e000 b.n 8005642 8005640: 2300 movs r3, #0 8005642: 6a7a ldr r2, [r7, #36] @ 0x24 8005644: f002 0203 and.w r2, r2, #3 8005648: 0092 lsls r2, r2, #2 800564a: 4093 lsls r3, r2 800564c: 68fa ldr r2, [r7, #12] 800564e: 4313 orrs r3, r2 8005650: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 8005652: 492f ldr r1, [pc, #188] @ (8005710 ) 8005654: 6a7b ldr r3, [r7, #36] @ 0x24 8005656: 089b lsrs r3, r3, #2 8005658: 3302 adds r3, #2 800565a: 68fa ldr r2, [r7, #12] 800565c: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8005660: 683b ldr r3, [r7, #0] 8005662: 685b ldr r3, [r3, #4] 8005664: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8005668: 2b00 cmp r3, #0 800566a: d006 beq.n 800567a { SET_BIT(EXTI->RTSR, iocurrent); 800566c: 4b2d ldr r3, [pc, #180] @ (8005724 ) 800566e: 689a ldr r2, [r3, #8] 8005670: 492c ldr r1, [pc, #176] @ (8005724 ) 8005672: 69bb ldr r3, [r7, #24] 8005674: 4313 orrs r3, r2 8005676: 608b str r3, [r1, #8] 8005678: e006 b.n 8005688 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 800567a: 4b2a ldr r3, [pc, #168] @ (8005724 ) 800567c: 689a ldr r2, [r3, #8] 800567e: 69bb ldr r3, [r7, #24] 8005680: 43db mvns r3, r3 8005682: 4928 ldr r1, [pc, #160] @ (8005724 ) 8005684: 4013 ands r3, r2 8005686: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8005688: 683b ldr r3, [r7, #0] 800568a: 685b ldr r3, [r3, #4] 800568c: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8005690: 2b00 cmp r3, #0 8005692: d006 beq.n 80056a2 { SET_BIT(EXTI->FTSR, iocurrent); 8005694: 4b23 ldr r3, [pc, #140] @ (8005724 ) 8005696: 68da ldr r2, [r3, #12] 8005698: 4922 ldr r1, [pc, #136] @ (8005724 ) 800569a: 69bb ldr r3, [r7, #24] 800569c: 4313 orrs r3, r2 800569e: 60cb str r3, [r1, #12] 80056a0: e006 b.n 80056b0 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 80056a2: 4b20 ldr r3, [pc, #128] @ (8005724 ) 80056a4: 68da ldr r2, [r3, #12] 80056a6: 69bb ldr r3, [r7, #24] 80056a8: 43db mvns r3, r3 80056aa: 491e ldr r1, [pc, #120] @ (8005724 ) 80056ac: 4013 ands r3, r2 80056ae: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 80056b0: 683b ldr r3, [r7, #0] 80056b2: 685b ldr r3, [r3, #4] 80056b4: f403 3300 and.w r3, r3, #131072 @ 0x20000 80056b8: 2b00 cmp r3, #0 80056ba: d006 beq.n 80056ca { SET_BIT(EXTI->EMR, iocurrent); 80056bc: 4b19 ldr r3, [pc, #100] @ (8005724 ) 80056be: 685a ldr r2, [r3, #4] 80056c0: 4918 ldr r1, [pc, #96] @ (8005724 ) 80056c2: 69bb ldr r3, [r7, #24] 80056c4: 4313 orrs r3, r2 80056c6: 604b str r3, [r1, #4] 80056c8: e006 b.n 80056d8 } else { CLEAR_BIT(EXTI->EMR, iocurrent); 80056ca: 4b16 ldr r3, [pc, #88] @ (8005724 ) 80056cc: 685a ldr r2, [r3, #4] 80056ce: 69bb ldr r3, [r7, #24] 80056d0: 43db mvns r3, r3 80056d2: 4914 ldr r1, [pc, #80] @ (8005724 ) 80056d4: 4013 ands r3, r2 80056d6: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 80056d8: 683b ldr r3, [r7, #0] 80056da: 685b ldr r3, [r3, #4] 80056dc: f403 3380 and.w r3, r3, #65536 @ 0x10000 80056e0: 2b00 cmp r3, #0 80056e2: d021 beq.n 8005728 { SET_BIT(EXTI->IMR, iocurrent); 80056e4: 4b0f ldr r3, [pc, #60] @ (8005724 ) 80056e6: 681a ldr r2, [r3, #0] 80056e8: 490e ldr r1, [pc, #56] @ (8005724 ) 80056ea: 69bb ldr r3, [r7, #24] 80056ec: 4313 orrs r3, r2 80056ee: 600b str r3, [r1, #0] 80056f0: e021 b.n 8005736 80056f2: bf00 nop 80056f4: 10320000 .word 0x10320000 80056f8: 10310000 .word 0x10310000 80056fc: 10220000 .word 0x10220000 8005700: 10210000 .word 0x10210000 8005704: 10120000 .word 0x10120000 8005708: 10110000 .word 0x10110000 800570c: 40021000 .word 0x40021000 8005710: 40010000 .word 0x40010000 8005714: 40010800 .word 0x40010800 8005718: 40010c00 .word 0x40010c00 800571c: 40011000 .word 0x40011000 8005720: 40011400 .word 0x40011400 8005724: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8005728: 4b0b ldr r3, [pc, #44] @ (8005758 ) 800572a: 681a ldr r2, [r3, #0] 800572c: 69bb ldr r3, [r7, #24] 800572e: 43db mvns r3, r3 8005730: 4909 ldr r1, [pc, #36] @ (8005758 ) 8005732: 4013 ands r3, r2 8005734: 600b str r3, [r1, #0] } } } position++; 8005736: 6a7b ldr r3, [r7, #36] @ 0x24 8005738: 3301 adds r3, #1 800573a: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 800573c: 683b ldr r3, [r7, #0] 800573e: 681a ldr r2, [r3, #0] 8005740: 6a7b ldr r3, [r7, #36] @ 0x24 8005742: fa22 f303 lsr.w r3, r2, r3 8005746: 2b00 cmp r3, #0 8005748: f47f ae8e bne.w 8005468 } } 800574c: bf00 nop 800574e: bf00 nop 8005750: 372c adds r7, #44 @ 0x2c 8005752: 46bd mov sp, r7 8005754: bc80 pop {r7} 8005756: 4770 bx lr 8005758: 40010400 .word 0x40010400 0800575c : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 800575c: b480 push {r7} 800575e: b085 sub sp, #20 8005760: af00 add r7, sp, #0 8005762: 6078 str r0, [r7, #4] 8005764: 460b mov r3, r1 8005766: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8005768: 687b ldr r3, [r7, #4] 800576a: 689a ldr r2, [r3, #8] 800576c: 887b ldrh r3, [r7, #2] 800576e: 4013 ands r3, r2 8005770: 2b00 cmp r3, #0 8005772: d002 beq.n 800577a { bitstatus = GPIO_PIN_SET; 8005774: 2301 movs r3, #1 8005776: 73fb strb r3, [r7, #15] 8005778: e001 b.n 800577e } else { bitstatus = GPIO_PIN_RESET; 800577a: 2300 movs r3, #0 800577c: 73fb strb r3, [r7, #15] } return bitstatus; 800577e: 7bfb ldrb r3, [r7, #15] } 8005780: 4618 mov r0, r3 8005782: 3714 adds r7, #20 8005784: 46bd mov sp, r7 8005786: bc80 pop {r7} 8005788: 4770 bx lr 0800578a : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 800578a: b480 push {r7} 800578c: b083 sub sp, #12 800578e: af00 add r7, sp, #0 8005790: 6078 str r0, [r7, #4] 8005792: 460b mov r3, r1 8005794: 807b strh r3, [r7, #2] 8005796: 4613 mov r3, r2 8005798: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 800579a: 787b ldrb r3, [r7, #1] 800579c: 2b00 cmp r3, #0 800579e: d003 beq.n 80057a8 { GPIOx->BSRR = GPIO_Pin; 80057a0: 887a ldrh r2, [r7, #2] 80057a2: 687b ldr r3, [r7, #4] 80057a4: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 80057a6: e003 b.n 80057b0 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 80057a8: 887b ldrh r3, [r7, #2] 80057aa: 041a lsls r2, r3, #16 80057ac: 687b ldr r3, [r7, #4] 80057ae: 611a str r2, [r3, #16] } 80057b0: bf00 nop 80057b2: 370c adds r7, #12 80057b4: 46bd mov sp, r7 80057b6: bc80 pop {r7} 80057b8: 4770 bx lr 080057ba : * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 80057ba: b480 push {r7} 80057bc: b085 sub sp, #20 80057be: af00 add r7, sp, #0 80057c0: 6078 str r0, [r7, #4] 80057c2: 460b mov r3, r1 80057c4: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; 80057c6: 687b ldr r3, [r7, #4] 80057c8: 68db ldr r3, [r3, #12] 80057ca: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); 80057cc: 887a ldrh r2, [r7, #2] 80057ce: 68fb ldr r3, [r7, #12] 80057d0: 4013 ands r3, r2 80057d2: 041a lsls r2, r3, #16 80057d4: 68fb ldr r3, [r7, #12] 80057d6: 43d9 mvns r1, r3 80057d8: 887b ldrh r3, [r7, #2] 80057da: 400b ands r3, r1 80057dc: 431a orrs r2, r3 80057de: 687b ldr r3, [r7, #4] 80057e0: 611a str r2, [r3, #16] } 80057e2: bf00 nop 80057e4: 3714 adds r7, #20 80057e6: 46bd mov sp, r7 80057e8: bc80 pop {r7} 80057ea: 4770 bx lr 080057ec : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { 80057ec: b580 push {r7, lr} 80057ee: b084 sub sp, #16 80057f0: af00 add r7, sp, #0 80057f2: 6078 str r0, [r7, #4] uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) 80057f4: 687b ldr r3, [r7, #4] 80057f6: 2b00 cmp r3, #0 80057f8: d101 bne.n 80057fe { return HAL_ERROR; 80057fa: 2301 movs r3, #1 80057fc: e0e8 b.n 80059d0 } /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); if (hpcd->State == HAL_PCD_STATE_RESET) 80057fe: 687b ldr r3, [r7, #4] 8005800: f893 3291 ldrb.w r3, [r3, #657] @ 0x291 8005804: b2db uxtb r3, r3 8005806: 2b00 cmp r3, #0 8005808: d106 bne.n 8005818 { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; 800580a: 687b ldr r3, [r7, #4] 800580c: 2200 movs r2, #0 800580e: f883 2290 strb.w r2, [r3, #656] @ 0x290 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); 8005812: 6878 ldr r0, [r7, #4] 8005814: f007 fc16 bl 800d044 #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; 8005818: 687b ldr r3, [r7, #4] 800581a: 2203 movs r2, #3 800581c: f883 2291 strb.w r2, [r3, #657] @ 0x291 /* Disable DMA mode for FS instance */ hpcd->Init.dma_enable = 0U; 8005820: 687b ldr r3, [r7, #4] 8005822: 2200 movs r2, #0 8005824: 715a strb r2, [r3, #5] /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); 8005826: 687b ldr r3, [r7, #4] 8005828: 681b ldr r3, [r3, #0] 800582a: 4618 mov r0, r3 800582c: f003 fabb bl 8008da6 /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8005830: 687b ldr r3, [r7, #4] 8005832: 6818 ldr r0, [r3, #0] 8005834: 687b ldr r3, [r7, #4] 8005836: 3304 adds r3, #4 8005838: cb0e ldmia r3, {r1, r2, r3} 800583a: f003 fa91 bl 8008d60 800583e: 4603 mov r3, r0 8005840: 2b00 cmp r3, #0 8005842: d005 beq.n 8005850 { hpcd->State = HAL_PCD_STATE_ERROR; 8005844: 687b ldr r3, [r7, #4] 8005846: 2202 movs r2, #2 8005848: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 800584c: 2301 movs r3, #1 800584e: e0bf b.n 80059d0 } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) 8005850: 687b ldr r3, [r7, #4] 8005852: 681b ldr r3, [r3, #0] 8005854: 2100 movs r1, #0 8005856: 4618 mov r0, r3 8005858: f003 fabf bl 8008dda 800585c: 4603 mov r3, r0 800585e: 2b00 cmp r3, #0 8005860: d005 beq.n 800586e { hpcd->State = HAL_PCD_STATE_ERROR; 8005862: 687b ldr r3, [r7, #4] 8005864: 2202 movs r2, #2 8005866: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 800586a: 2301 movs r3, #1 800586c: e0b0 b.n 80059d0 } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 800586e: 2300 movs r3, #0 8005870: 73fb strb r3, [r7, #15] 8005872: e03e b.n 80058f2 { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; 8005874: 7bfa ldrb r2, [r7, #15] 8005876: 6879 ldr r1, [r7, #4] 8005878: 4613 mov r3, r2 800587a: 009b lsls r3, r3, #2 800587c: 4413 add r3, r2 800587e: 00db lsls r3, r3, #3 8005880: 440b add r3, r1 8005882: 3311 adds r3, #17 8005884: 2201 movs r2, #1 8005886: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; 8005888: 7bfa ldrb r2, [r7, #15] 800588a: 6879 ldr r1, [r7, #4] 800588c: 4613 mov r3, r2 800588e: 009b lsls r3, r3, #2 8005890: 4413 add r3, r2 8005892: 00db lsls r3, r3, #3 8005894: 440b add r3, r1 8005896: 3310 adds r3, #16 8005898: 7bfa ldrb r2, [r7, #15] 800589a: 701a strb r2, [r3, #0] #if defined (USB_OTG_FS) hpcd->IN_ep[i].tx_fifo_num = i; #endif /* defined (USB_OTG_FS) */ /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; 800589c: 7bfa ldrb r2, [r7, #15] 800589e: 6879 ldr r1, [r7, #4] 80058a0: 4613 mov r3, r2 80058a2: 009b lsls r3, r3, #2 80058a4: 4413 add r3, r2 80058a6: 00db lsls r3, r3, #3 80058a8: 440b add r3, r1 80058aa: 3313 adds r3, #19 80058ac: 2200 movs r2, #0 80058ae: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; 80058b0: 7bfa ldrb r2, [r7, #15] 80058b2: 6879 ldr r1, [r7, #4] 80058b4: 4613 mov r3, r2 80058b6: 009b lsls r3, r3, #2 80058b8: 4413 add r3, r2 80058ba: 00db lsls r3, r3, #3 80058bc: 440b add r3, r1 80058be: 3320 adds r3, #32 80058c0: 2200 movs r2, #0 80058c2: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; 80058c4: 7bfa ldrb r2, [r7, #15] 80058c6: 6879 ldr r1, [r7, #4] 80058c8: 4613 mov r3, r2 80058ca: 009b lsls r3, r3, #2 80058cc: 4413 add r3, r2 80058ce: 00db lsls r3, r3, #3 80058d0: 440b add r3, r1 80058d2: 3324 adds r3, #36 @ 0x24 80058d4: 2200 movs r2, #0 80058d6: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; 80058d8: 7bfb ldrb r3, [r7, #15] 80058da: 6879 ldr r1, [r7, #4] 80058dc: 1c5a adds r2, r3, #1 80058de: 4613 mov r3, r2 80058e0: 009b lsls r3, r3, #2 80058e2: 4413 add r3, r2 80058e4: 00db lsls r3, r3, #3 80058e6: 440b add r3, r1 80058e8: 2200 movs r2, #0 80058ea: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80058ec: 7bfb ldrb r3, [r7, #15] 80058ee: 3301 adds r3, #1 80058f0: 73fb strb r3, [r7, #15] 80058f2: 687b ldr r3, [r7, #4] 80058f4: 791b ldrb r3, [r3, #4] 80058f6: 7bfa ldrb r2, [r7, #15] 80058f8: 429a cmp r2, r3 80058fa: d3bb bcc.n 8005874 } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80058fc: 2300 movs r3, #0 80058fe: 73fb strb r3, [r7, #15] 8005900: e044 b.n 800598c { hpcd->OUT_ep[i].is_in = 0U; 8005902: 7bfa ldrb r2, [r7, #15] 8005904: 6879 ldr r1, [r7, #4] 8005906: 4613 mov r3, r2 8005908: 009b lsls r3, r3, #2 800590a: 4413 add r3, r2 800590c: 00db lsls r3, r3, #3 800590e: 440b add r3, r1 8005910: f203 1351 addw r3, r3, #337 @ 0x151 8005914: 2200 movs r2, #0 8005916: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; 8005918: 7bfa ldrb r2, [r7, #15] 800591a: 6879 ldr r1, [r7, #4] 800591c: 4613 mov r3, r2 800591e: 009b lsls r3, r3, #2 8005920: 4413 add r3, r2 8005922: 00db lsls r3, r3, #3 8005924: 440b add r3, r1 8005926: f503 73a8 add.w r3, r3, #336 @ 0x150 800592a: 7bfa ldrb r2, [r7, #15] 800592c: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; 800592e: 7bfa ldrb r2, [r7, #15] 8005930: 6879 ldr r1, [r7, #4] 8005932: 4613 mov r3, r2 8005934: 009b lsls r3, r3, #2 8005936: 4413 add r3, r2 8005938: 00db lsls r3, r3, #3 800593a: 440b add r3, r1 800593c: f203 1353 addw r3, r3, #339 @ 0x153 8005940: 2200 movs r2, #0 8005942: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; 8005944: 7bfa ldrb r2, [r7, #15] 8005946: 6879 ldr r1, [r7, #4] 8005948: 4613 mov r3, r2 800594a: 009b lsls r3, r3, #2 800594c: 4413 add r3, r2 800594e: 00db lsls r3, r3, #3 8005950: 440b add r3, r1 8005952: f503 73b0 add.w r3, r3, #352 @ 0x160 8005956: 2200 movs r2, #0 8005958: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; 800595a: 7bfa ldrb r2, [r7, #15] 800595c: 6879 ldr r1, [r7, #4] 800595e: 4613 mov r3, r2 8005960: 009b lsls r3, r3, #2 8005962: 4413 add r3, r2 8005964: 00db lsls r3, r3, #3 8005966: 440b add r3, r1 8005968: f503 73b2 add.w r3, r3, #356 @ 0x164 800596c: 2200 movs r2, #0 800596e: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; 8005970: 7bfa ldrb r2, [r7, #15] 8005972: 6879 ldr r1, [r7, #4] 8005974: 4613 mov r3, r2 8005976: 009b lsls r3, r3, #2 8005978: 4413 add r3, r2 800597a: 00db lsls r3, r3, #3 800597c: 440b add r3, r1 800597e: f503 73b4 add.w r3, r3, #360 @ 0x168 8005982: 2200 movs r2, #0 8005984: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8005986: 7bfb ldrb r3, [r7, #15] 8005988: 3301 adds r3, #1 800598a: 73fb strb r3, [r7, #15] 800598c: 687b ldr r3, [r7, #4] 800598e: 791b ldrb r3, [r3, #4] 8005990: 7bfa ldrb r2, [r7, #15] 8005992: 429a cmp r2, r3 8005994: d3b5 bcc.n 8005902 } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8005996: 687b ldr r3, [r7, #4] 8005998: 6818 ldr r0, [r3, #0] 800599a: 687b ldr r3, [r7, #4] 800599c: 3304 adds r3, #4 800599e: cb0e ldmia r3, {r1, r2, r3} 80059a0: f003 fa27 bl 8008df2 80059a4: 4603 mov r3, r0 80059a6: 2b00 cmp r3, #0 80059a8: d005 beq.n 80059b6 { hpcd->State = HAL_PCD_STATE_ERROR; 80059aa: 687b ldr r3, [r7, #4] 80059ac: 2202 movs r2, #2 80059ae: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 80059b2: 2301 movs r3, #1 80059b4: e00c b.n 80059d0 } hpcd->USB_Address = 0U; 80059b6: 687b ldr r3, [r7, #4] 80059b8: 2200 movs r2, #0 80059ba: 735a strb r2, [r3, #13] hpcd->State = HAL_PCD_STATE_READY; 80059bc: 687b ldr r3, [r7, #4] 80059be: 2201 movs r2, #1 80059c0: f883 2291 strb.w r2, [r3, #657] @ 0x291 (void)USB_DevDisconnect(hpcd->Instance); 80059c4: 687b ldr r3, [r7, #4] 80059c6: 681b ldr r3, [r3, #0] 80059c8: 4618 mov r0, r3 80059ca: f005 fca6 bl 800b31a return HAL_OK; 80059ce: 2300 movs r3, #0 } 80059d0: 4618 mov r0, r3 80059d2: 3710 adds r7, #16 80059d4: 46bd mov sp, r7 80059d6: bd80 pop {r7, pc} 080059d8 : * @brief Start the USB device * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) { 80059d8: b580 push {r7, lr} 80059da: b082 sub sp, #8 80059dc: af00 add r7, sp, #0 80059de: 6078 str r0, [r7, #4] __HAL_LOCK(hpcd); 80059e0: 687b ldr r3, [r7, #4] 80059e2: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 80059e6: 2b01 cmp r3, #1 80059e8: d101 bne.n 80059ee 80059ea: 2302 movs r3, #2 80059ec: e016 b.n 8005a1c 80059ee: 687b ldr r3, [r7, #4] 80059f0: 2201 movs r2, #1 80059f2: f883 2290 strb.w r2, [r3, #656] @ 0x290 __HAL_PCD_ENABLE(hpcd); 80059f6: 687b ldr r3, [r7, #4] 80059f8: 681b ldr r3, [r3, #0] 80059fa: 4618 mov r0, r3 80059fc: f003 f9bd bl 8008d7a #if defined (USB) HAL_PCDEx_SetConnectionState(hpcd, 1U); 8005a00: 2101 movs r1, #1 8005a02: 6878 ldr r0, [r7, #4] 8005a04: f007 fd91 bl 800d52a #endif /* defined (USB) */ (void)USB_DevConnect(hpcd->Instance); 8005a08: 687b ldr r3, [r7, #4] 8005a0a: 681b ldr r3, [r3, #0] 8005a0c: 4618 mov r0, r3 8005a0e: f005 fc7a bl 800b306 __HAL_UNLOCK(hpcd); 8005a12: 687b ldr r3, [r7, #4] 8005a14: 2200 movs r2, #0 8005a16: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005a1a: 2300 movs r3, #0 } 8005a1c: 4618 mov r0, r3 8005a1e: 3708 adds r7, #8 8005a20: 46bd mov sp, r7 8005a22: bd80 pop {r7, pc} 08005a24 : * @brief This function handles PCD interrupt request. * @param hpcd PCD handle * @retval HAL status */ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { 8005a24: b580 push {r7, lr} 8005a26: b088 sub sp, #32 8005a28: af00 add r7, sp, #0 8005a2a: 6078 str r0, [r7, #4] uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance); 8005a2c: 687b ldr r3, [r7, #4] 8005a2e: 681b ldr r3, [r3, #0] 8005a30: 4618 mov r0, r3 8005a32: f005 fc7c bl 800b32e 8005a36: 61b8 str r0, [r7, #24] uint16_t store_ep[8]; uint8_t i; if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR) 8005a38: 69bb ldr r3, [r7, #24] 8005a3a: f403 4300 and.w r3, r3, #32768 @ 0x8000 8005a3e: 2b00 cmp r3, #0 8005a40: d003 beq.n 8005a4a { /* servicing of the endpoint correct transfer interrupt */ /* clear of the CTR flag into the sub */ (void)PCD_EP_ISR_Handler(hpcd); 8005a42: 6878 ldr r0, [r7, #4] 8005a44: f000 fb1a bl 800607c return; 8005a48: e119 b.n 8005c7e } if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET) 8005a4a: 69bb ldr r3, [r7, #24] 8005a4c: f403 6380 and.w r3, r3, #1024 @ 0x400 8005a50: 2b00 cmp r3, #0 8005a52: d013 beq.n 8005a7c { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 8005a54: 687b ldr r3, [r7, #4] 8005a56: 681b ldr r3, [r3, #0] 8005a58: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005a5c: b29a uxth r2, r3 8005a5e: 687b ldr r3, [r7, #4] 8005a60: 681b ldr r3, [r3, #0] 8005a62: f422 6280 bic.w r2, r2, #1024 @ 0x400 8005a66: b292 uxth r2, r2 8005a68: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResetCallback(hpcd); #else HAL_PCD_ResetCallback(hpcd); 8005a6c: 6878 ldr r0, [r7, #4] 8005a6e: f007 fb64 bl 800d13a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ (void)HAL_PCD_SetAddress(hpcd, 0U); 8005a72: 2100 movs r1, #0 8005a74: 6878 ldr r0, [r7, #4] 8005a76: f000 f905 bl 8005c84 return; 8005a7a: e100 b.n 8005c7e } if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR) 8005a7c: 69bb ldr r3, [r7, #24] 8005a7e: f403 4380 and.w r3, r3, #16384 @ 0x4000 8005a82: 2b00 cmp r3, #0 8005a84: d00c beq.n 8005aa0 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); 8005a86: 687b ldr r3, [r7, #4] 8005a88: 681b ldr r3, [r3, #0] 8005a8a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005a8e: b29a uxth r2, r3 8005a90: 687b ldr r3, [r7, #4] 8005a92: 681b ldr r3, [r3, #0] 8005a94: f422 4280 bic.w r2, r2, #16384 @ 0x4000 8005a98: b292 uxth r2, r2 8005a9a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8005a9e: e0ee b.n 8005c7e } if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR) 8005aa0: 69bb ldr r3, [r7, #24] 8005aa2: f403 5300 and.w r3, r3, #8192 @ 0x2000 8005aa6: 2b00 cmp r3, #0 8005aa8: d00c beq.n 8005ac4 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); 8005aaa: 687b ldr r3, [r7, #4] 8005aac: 681b ldr r3, [r3, #0] 8005aae: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005ab2: b29a uxth r2, r3 8005ab4: 687b ldr r3, [r7, #4] 8005ab6: 681b ldr r3, [r3, #0] 8005ab8: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8005abc: b292 uxth r2, r2 8005abe: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8005ac2: e0dc b.n 8005c7e } if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP) 8005ac4: 69bb ldr r3, [r7, #24] 8005ac6: f403 5380 and.w r3, r3, #4096 @ 0x1000 8005aca: 2b00 cmp r3, #0 8005acc: d027 beq.n 8005b1e { hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE); 8005ace: 687b ldr r3, [r7, #4] 8005ad0: 681b ldr r3, [r3, #0] 8005ad2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005ad6: b29a uxth r2, r3 8005ad8: 687b ldr r3, [r7, #4] 8005ada: 681b ldr r3, [r3, #0] 8005adc: f022 0204 bic.w r2, r2, #4 8005ae0: b292 uxth r2, r2 8005ae2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); 8005ae6: 687b ldr r3, [r7, #4] 8005ae8: 681b ldr r3, [r3, #0] 8005aea: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005aee: b29a uxth r2, r3 8005af0: 687b ldr r3, [r7, #4] 8005af2: 681b ldr r3, [r3, #0] 8005af4: f022 0208 bic.w r2, r2, #8 8005af8: b292 uxth r2, r2 8005afa: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResumeCallback(hpcd); #else HAL_PCD_ResumeCallback(hpcd); 8005afe: 6878 ldr r0, [r7, #4] 8005b00: f007 fb54 bl 800d1ac #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); 8005b04: 687b ldr r3, [r7, #4] 8005b06: 681b ldr r3, [r3, #0] 8005b08: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005b0c: b29a uxth r2, r3 8005b0e: 687b ldr r3, [r7, #4] 8005b10: 681b ldr r3, [r3, #0] 8005b12: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8005b16: b292 uxth r2, r2 8005b18: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8005b1c: e0af b.n 8005c7e } if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP) 8005b1e: 69bb ldr r3, [r7, #24] 8005b20: f403 6300 and.w r3, r3, #2048 @ 0x800 8005b24: 2b00 cmp r3, #0 8005b26: f000 8083 beq.w 8005c30 { /* WA: To Clear Wakeup flag if raised with suspend signal */ /* Store Endpoint registers */ for (i = 0U; i < 8U; i++) 8005b2a: 2300 movs r3, #0 8005b2c: 77fb strb r3, [r7, #31] 8005b2e: e010 b.n 8005b52 { store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i); 8005b30: 687b ldr r3, [r7, #4] 8005b32: 681b ldr r3, [r3, #0] 8005b34: 461a mov r2, r3 8005b36: 7ffb ldrb r3, [r7, #31] 8005b38: 009b lsls r3, r3, #2 8005b3a: 441a add r2, r3 8005b3c: 7ffb ldrb r3, [r7, #31] 8005b3e: 8812 ldrh r2, [r2, #0] 8005b40: b292 uxth r2, r2 8005b42: 005b lsls r3, r3, #1 8005b44: 3320 adds r3, #32 8005b46: 443b add r3, r7 8005b48: f823 2c18 strh.w r2, [r3, #-24] for (i = 0U; i < 8U; i++) 8005b4c: 7ffb ldrb r3, [r7, #31] 8005b4e: 3301 adds r3, #1 8005b50: 77fb strb r3, [r7, #31] 8005b52: 7ffb ldrb r3, [r7, #31] 8005b54: 2b07 cmp r3, #7 8005b56: d9eb bls.n 8005b30 } /* FORCE RESET */ hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES); 8005b58: 687b ldr r3, [r7, #4] 8005b5a: 681b ldr r3, [r3, #0] 8005b5c: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005b60: b29a uxth r2, r3 8005b62: 687b ldr r3, [r7, #4] 8005b64: 681b ldr r3, [r3, #0] 8005b66: f042 0201 orr.w r2, r2, #1 8005b6a: b292 uxth r2, r2 8005b6c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CLEAR RESET */ hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES); 8005b70: 687b ldr r3, [r7, #4] 8005b72: 681b ldr r3, [r3, #0] 8005b74: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005b78: b29a uxth r2, r3 8005b7a: 687b ldr r3, [r7, #4] 8005b7c: 681b ldr r3, [r3, #0] 8005b7e: f022 0201 bic.w r2, r2, #1 8005b82: b292 uxth r2, r2 8005b84: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* wait for reset flag in ISTR */ while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U) 8005b88: bf00 nop 8005b8a: 687b ldr r3, [r7, #4] 8005b8c: 681b ldr r3, [r3, #0] 8005b8e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005b92: b29b uxth r3, r3 8005b94: f403 6380 and.w r3, r3, #1024 @ 0x400 8005b98: 2b00 cmp r3, #0 8005b9a: d0f6 beq.n 8005b8a { } /* Clear Reset Flag */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 8005b9c: 687b ldr r3, [r7, #4] 8005b9e: 681b ldr r3, [r3, #0] 8005ba0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005ba4: b29a uxth r2, r3 8005ba6: 687b ldr r3, [r7, #4] 8005ba8: 681b ldr r3, [r3, #0] 8005baa: f422 6280 bic.w r2, r2, #1024 @ 0x400 8005bae: b292 uxth r2, r2 8005bb0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Restore Registre */ for (i = 0U; i < 8U; i++) 8005bb4: 2300 movs r3, #0 8005bb6: 77fb strb r3, [r7, #31] 8005bb8: e00f b.n 8005bda { PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]); 8005bba: 7ffb ldrb r3, [r7, #31] 8005bbc: 687a ldr r2, [r7, #4] 8005bbe: 6812 ldr r2, [r2, #0] 8005bc0: 4611 mov r1, r2 8005bc2: 7ffa ldrb r2, [r7, #31] 8005bc4: 0092 lsls r2, r2, #2 8005bc6: 440a add r2, r1 8005bc8: 005b lsls r3, r3, #1 8005bca: 3320 adds r3, #32 8005bcc: 443b add r3, r7 8005bce: f833 3c18 ldrh.w r3, [r3, #-24] 8005bd2: 8013 strh r3, [r2, #0] for (i = 0U; i < 8U; i++) 8005bd4: 7ffb ldrb r3, [r7, #31] 8005bd6: 3301 adds r3, #1 8005bd8: 77fb strb r3, [r7, #31] 8005bda: 7ffb ldrb r3, [r7, #31] 8005bdc: 2b07 cmp r3, #7 8005bde: d9ec bls.n 8005bba } /* Force low-power mode in the macrocell */ hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP; 8005be0: 687b ldr r3, [r7, #4] 8005be2: 681b ldr r3, [r3, #0] 8005be4: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005be8: b29a uxth r2, r3 8005bea: 687b ldr r3, [r7, #4] 8005bec: 681b ldr r3, [r3, #0] 8005bee: f042 0208 orr.w r2, r2, #8 8005bf2: b292 uxth r2, r2 8005bf4: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); 8005bf8: 687b ldr r3, [r7, #4] 8005bfa: 681b ldr r3, [r3, #0] 8005bfc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005c00: b29a uxth r2, r3 8005c02: 687b ldr r3, [r7, #4] 8005c04: 681b ldr r3, [r3, #0] 8005c06: f422 6200 bic.w r2, r2, #2048 @ 0x800 8005c0a: b292 uxth r2, r2 8005c0c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE; 8005c10: 687b ldr r3, [r7, #4] 8005c12: 681b ldr r3, [r3, #0] 8005c14: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8005c18: b29a uxth r2, r3 8005c1a: 687b ldr r3, [r7, #4] 8005c1c: 681b ldr r3, [r3, #0] 8005c1e: f042 0204 orr.w r2, r2, #4 8005c22: b292 uxth r2, r2 8005c24: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 8005c28: 6878 ldr r0, [r7, #4] 8005c2a: f007 faa5 bl 800d178 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8005c2e: e026 b.n 8005c7e } if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF) 8005c30: 69bb ldr r3, [r7, #24] 8005c32: f403 7300 and.w r3, r3, #512 @ 0x200 8005c36: 2b00 cmp r3, #0 8005c38: d00f beq.n 8005c5a { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); 8005c3a: 687b ldr r3, [r7, #4] 8005c3c: 681b ldr r3, [r3, #0] 8005c3e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005c42: b29a uxth r2, r3 8005c44: 687b ldr r3, [r7, #4] 8005c46: 681b ldr r3, [r3, #0] 8005c48: f422 7200 bic.w r2, r2, #512 @ 0x200 8005c4c: b292 uxth r2, r2 8005c4e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SOFCallback(hpcd); #else HAL_PCD_SOFCallback(hpcd); 8005c52: 6878 ldr r0, [r7, #4] 8005c54: f007 fa63 bl 800d11e #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8005c58: e011 b.n 8005c7e } if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF) 8005c5a: 69bb ldr r3, [r7, #24] 8005c5c: f403 7380 and.w r3, r3, #256 @ 0x100 8005c60: 2b00 cmp r3, #0 8005c62: d00c beq.n 8005c7e { /* clear ESOF flag in ISTR */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); 8005c64: 687b ldr r3, [r7, #4] 8005c66: 681b ldr r3, [r3, #0] 8005c68: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8005c6c: b29a uxth r2, r3 8005c6e: 687b ldr r3, [r7, #4] 8005c70: 681b ldr r3, [r3, #0] 8005c72: f422 7280 bic.w r2, r2, #256 @ 0x100 8005c76: b292 uxth r2, r2 8005c78: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8005c7c: bf00 nop } } 8005c7e: 3720 adds r7, #32 8005c80: 46bd mov sp, r7 8005c82: bd80 pop {r7, pc} 08005c84 : * @param hpcd PCD handle * @param address new device address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) { 8005c84: b580 push {r7, lr} 8005c86: b082 sub sp, #8 8005c88: af00 add r7, sp, #0 8005c8a: 6078 str r0, [r7, #4] 8005c8c: 460b mov r3, r1 8005c8e: 70fb strb r3, [r7, #3] __HAL_LOCK(hpcd); 8005c90: 687b ldr r3, [r7, #4] 8005c92: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005c96: 2b01 cmp r3, #1 8005c98: d101 bne.n 8005c9e 8005c9a: 2302 movs r3, #2 8005c9c: e012 b.n 8005cc4 8005c9e: 687b ldr r3, [r7, #4] 8005ca0: 2201 movs r2, #1 8005ca2: f883 2290 strb.w r2, [r3, #656] @ 0x290 hpcd->USB_Address = address; 8005ca6: 687b ldr r3, [r7, #4] 8005ca8: 78fa ldrb r2, [r7, #3] 8005caa: 735a strb r2, [r3, #13] (void)USB_SetDevAddress(hpcd->Instance, address); 8005cac: 687b ldr r3, [r7, #4] 8005cae: 681b ldr r3, [r3, #0] 8005cb0: 78fa ldrb r2, [r7, #3] 8005cb2: 4611 mov r1, r2 8005cb4: 4618 mov r0, r3 8005cb6: f005 fb13 bl 800b2e0 __HAL_UNLOCK(hpcd); 8005cba: 687b ldr r3, [r7, #4] 8005cbc: 2200 movs r2, #0 8005cbe: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005cc2: 2300 movs r3, #0 } 8005cc4: 4618 mov r0, r3 8005cc6: 3708 adds r7, #8 8005cc8: 46bd mov sp, r7 8005cca: bd80 pop {r7, pc} 08005ccc : * @param ep_type endpoint type * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { 8005ccc: b580 push {r7, lr} 8005cce: b084 sub sp, #16 8005cd0: af00 add r7, sp, #0 8005cd2: 6078 str r0, [r7, #4] 8005cd4: 4608 mov r0, r1 8005cd6: 4611 mov r1, r2 8005cd8: 461a mov r2, r3 8005cda: 4603 mov r3, r0 8005cdc: 70fb strb r3, [r7, #3] 8005cde: 460b mov r3, r1 8005ce0: 803b strh r3, [r7, #0] 8005ce2: 4613 mov r3, r2 8005ce4: 70bb strb r3, [r7, #2] HAL_StatusTypeDef ret = HAL_OK; 8005ce6: 2300 movs r3, #0 8005ce8: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8005cea: f997 3003 ldrsb.w r3, [r7, #3] 8005cee: 2b00 cmp r3, #0 8005cf0: da0e bge.n 8005d10 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005cf2: 78fb ldrb r3, [r7, #3] 8005cf4: f003 0207 and.w r2, r3, #7 8005cf8: 4613 mov r3, r2 8005cfa: 009b lsls r3, r3, #2 8005cfc: 4413 add r3, r2 8005cfe: 00db lsls r3, r3, #3 8005d00: 3310 adds r3, #16 8005d02: 687a ldr r2, [r7, #4] 8005d04: 4413 add r3, r2 8005d06: 60fb str r3, [r7, #12] ep->is_in = 1U; 8005d08: 68fb ldr r3, [r7, #12] 8005d0a: 2201 movs r2, #1 8005d0c: 705a strb r2, [r3, #1] 8005d0e: e00e b.n 8005d2e } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8005d10: 78fb ldrb r3, [r7, #3] 8005d12: f003 0207 and.w r2, r3, #7 8005d16: 4613 mov r3, r2 8005d18: 009b lsls r3, r3, #2 8005d1a: 4413 add r3, r2 8005d1c: 00db lsls r3, r3, #3 8005d1e: f503 73a8 add.w r3, r3, #336 @ 0x150 8005d22: 687a ldr r2, [r7, #4] 8005d24: 4413 add r3, r2 8005d26: 60fb str r3, [r7, #12] ep->is_in = 0U; 8005d28: 68fb ldr r3, [r7, #12] 8005d2a: 2200 movs r2, #0 8005d2c: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8005d2e: 78fb ldrb r3, [r7, #3] 8005d30: f003 0307 and.w r3, r3, #7 8005d34: b2da uxtb r2, r3 8005d36: 68fb ldr r3, [r7, #12] 8005d38: 701a strb r2, [r3, #0] ep->maxpacket = ep_mps; 8005d3a: 883a ldrh r2, [r7, #0] 8005d3c: 68fb ldr r3, [r7, #12] 8005d3e: 611a str r2, [r3, #16] ep->type = ep_type; 8005d40: 68fb ldr r3, [r7, #12] 8005d42: 78ba ldrb r2, [r7, #2] 8005d44: 70da strb r2, [r3, #3] ep->tx_fifo_num = ep->num; } #endif /* defined (USB_OTG_FS) */ /* Set initial data PID. */ if (ep_type == EP_TYPE_BULK) 8005d46: 78bb ldrb r3, [r7, #2] 8005d48: 2b02 cmp r3, #2 8005d4a: d102 bne.n 8005d52 { ep->data_pid_start = 0U; 8005d4c: 68fb ldr r3, [r7, #12] 8005d4e: 2200 movs r2, #0 8005d50: 711a strb r2, [r3, #4] } __HAL_LOCK(hpcd); 8005d52: 687b ldr r3, [r7, #4] 8005d54: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005d58: 2b01 cmp r3, #1 8005d5a: d101 bne.n 8005d60 8005d5c: 2302 movs r3, #2 8005d5e: e00e b.n 8005d7e 8005d60: 687b ldr r3, [r7, #4] 8005d62: 2201 movs r2, #1 8005d64: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_ActivateEndpoint(hpcd->Instance, ep); 8005d68: 687b ldr r3, [r7, #4] 8005d6a: 681b ldr r3, [r3, #0] 8005d6c: 68f9 ldr r1, [r7, #12] 8005d6e: 4618 mov r0, r3 8005d70: f003 f85c bl 8008e2c __HAL_UNLOCK(hpcd); 8005d74: 687b ldr r3, [r7, #4] 8005d76: 2200 movs r2, #0 8005d78: f883 2290 strb.w r2, [r3, #656] @ 0x290 return ret; 8005d7c: 7afb ldrb r3, [r7, #11] } 8005d7e: 4618 mov r0, r3 8005d80: 3710 adds r7, #16 8005d82: 46bd mov sp, r7 8005d84: bd80 pop {r7, pc} 08005d86 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8005d86: b580 push {r7, lr} 8005d88: b084 sub sp, #16 8005d8a: af00 add r7, sp, #0 8005d8c: 6078 str r0, [r7, #4] 8005d8e: 460b mov r3, r1 8005d90: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8005d92: f997 3003 ldrsb.w r3, [r7, #3] 8005d96: 2b00 cmp r3, #0 8005d98: da0e bge.n 8005db8 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005d9a: 78fb ldrb r3, [r7, #3] 8005d9c: f003 0207 and.w r2, r3, #7 8005da0: 4613 mov r3, r2 8005da2: 009b lsls r3, r3, #2 8005da4: 4413 add r3, r2 8005da6: 00db lsls r3, r3, #3 8005da8: 3310 adds r3, #16 8005daa: 687a ldr r2, [r7, #4] 8005dac: 4413 add r3, r2 8005dae: 60fb str r3, [r7, #12] ep->is_in = 1U; 8005db0: 68fb ldr r3, [r7, #12] 8005db2: 2201 movs r2, #1 8005db4: 705a strb r2, [r3, #1] 8005db6: e00e b.n 8005dd6 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8005db8: 78fb ldrb r3, [r7, #3] 8005dba: f003 0207 and.w r2, r3, #7 8005dbe: 4613 mov r3, r2 8005dc0: 009b lsls r3, r3, #2 8005dc2: 4413 add r3, r2 8005dc4: 00db lsls r3, r3, #3 8005dc6: f503 73a8 add.w r3, r3, #336 @ 0x150 8005dca: 687a ldr r2, [r7, #4] 8005dcc: 4413 add r3, r2 8005dce: 60fb str r3, [r7, #12] ep->is_in = 0U; 8005dd0: 68fb ldr r3, [r7, #12] 8005dd2: 2200 movs r2, #0 8005dd4: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8005dd6: 78fb ldrb r3, [r7, #3] 8005dd8: f003 0307 and.w r3, r3, #7 8005ddc: b2da uxtb r2, r3 8005dde: 68fb ldr r3, [r7, #12] 8005de0: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8005de2: 687b ldr r3, [r7, #4] 8005de4: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005de8: 2b01 cmp r3, #1 8005dea: d101 bne.n 8005df0 8005dec: 2302 movs r3, #2 8005dee: e00e b.n 8005e0e 8005df0: 687b ldr r3, [r7, #4] 8005df2: 2201 movs r2, #1 8005df4: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_DeactivateEndpoint(hpcd->Instance, ep); 8005df8: 687b ldr r3, [r7, #4] 8005dfa: 681b ldr r3, [r3, #0] 8005dfc: 68f9 ldr r1, [r7, #12] 8005dfe: 4618 mov r0, r3 8005e00: f003 fbd4 bl 80095ac __HAL_UNLOCK(hpcd); 8005e04: 687b ldr r3, [r7, #4] 8005e06: 2200 movs r2, #0 8005e08: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005e0c: 2300 movs r3, #0 } 8005e0e: 4618 mov r0, r3 8005e10: 3710 adds r7, #16 8005e12: 46bd mov sp, r7 8005e14: bd80 pop {r7, pc} 08005e16 : * @param pBuf pointer to the reception buffer * @param len amount of data to be received * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8005e16: b580 push {r7, lr} 8005e18: b086 sub sp, #24 8005e1a: af00 add r7, sp, #0 8005e1c: 60f8 str r0, [r7, #12] 8005e1e: 607a str r2, [r7, #4] 8005e20: 603b str r3, [r7, #0] 8005e22: 460b mov r3, r1 8005e24: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8005e26: 7afb ldrb r3, [r7, #11] 8005e28: f003 0207 and.w r2, r3, #7 8005e2c: 4613 mov r3, r2 8005e2e: 009b lsls r3, r3, #2 8005e30: 4413 add r3, r2 8005e32: 00db lsls r3, r3, #3 8005e34: f503 73a8 add.w r3, r3, #336 @ 0x150 8005e38: 68fa ldr r2, [r7, #12] 8005e3a: 4413 add r3, r2 8005e3c: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8005e3e: 697b ldr r3, [r7, #20] 8005e40: 687a ldr r2, [r7, #4] 8005e42: 615a str r2, [r3, #20] ep->xfer_len = len; 8005e44: 697b ldr r3, [r7, #20] 8005e46: 683a ldr r2, [r7, #0] 8005e48: 619a str r2, [r3, #24] ep->xfer_count = 0U; 8005e4a: 697b ldr r3, [r7, #20] 8005e4c: 2200 movs r2, #0 8005e4e: 61da str r2, [r3, #28] ep->is_in = 0U; 8005e50: 697b ldr r3, [r7, #20] 8005e52: 2200 movs r2, #0 8005e54: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8005e56: 7afb ldrb r3, [r7, #11] 8005e58: f003 0307 and.w r3, r3, #7 8005e5c: b2da uxtb r2, r3 8005e5e: 697b ldr r3, [r7, #20] 8005e60: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8005e62: 68fb ldr r3, [r7, #12] 8005e64: 681b ldr r3, [r3, #0] 8005e66: 6979 ldr r1, [r7, #20] 8005e68: 4618 mov r0, r3 8005e6a: f003 fd8b bl 8009984 return HAL_OK; 8005e6e: 2300 movs r3, #0 } 8005e70: 4618 mov r0, r3 8005e72: 3718 adds r7, #24 8005e74: 46bd mov sp, r7 8005e76: bd80 pop {r7, pc} 08005e78 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval Data Size */ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr) { 8005e78: b480 push {r7} 8005e7a: b083 sub sp, #12 8005e7c: af00 add r7, sp, #0 8005e7e: 6078 str r0, [r7, #4] 8005e80: 460b mov r3, r1 8005e82: 70fb strb r3, [r7, #3] return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; 8005e84: 78fb ldrb r3, [r7, #3] 8005e86: f003 0207 and.w r2, r3, #7 8005e8a: 6879 ldr r1, [r7, #4] 8005e8c: 4613 mov r3, r2 8005e8e: 009b lsls r3, r3, #2 8005e90: 4413 add r3, r2 8005e92: 00db lsls r3, r3, #3 8005e94: 440b add r3, r1 8005e96: f503 73b6 add.w r3, r3, #364 @ 0x16c 8005e9a: 681b ldr r3, [r3, #0] } 8005e9c: 4618 mov r0, r3 8005e9e: 370c adds r7, #12 8005ea0: 46bd mov sp, r7 8005ea2: bc80 pop {r7} 8005ea4: 4770 bx lr 08005ea6 : * @param pBuf pointer to the transmission buffer * @param len amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8005ea6: b580 push {r7, lr} 8005ea8: b086 sub sp, #24 8005eaa: af00 add r7, sp, #0 8005eac: 60f8 str r0, [r7, #12] 8005eae: 607a str r2, [r7, #4] 8005eb0: 603b str r3, [r7, #0] 8005eb2: 460b mov r3, r1 8005eb4: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005eb6: 7afb ldrb r3, [r7, #11] 8005eb8: f003 0207 and.w r2, r3, #7 8005ebc: 4613 mov r3, r2 8005ebe: 009b lsls r3, r3, #2 8005ec0: 4413 add r3, r2 8005ec2: 00db lsls r3, r3, #3 8005ec4: 3310 adds r3, #16 8005ec6: 68fa ldr r2, [r7, #12] 8005ec8: 4413 add r3, r2 8005eca: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8005ecc: 697b ldr r3, [r7, #20] 8005ece: 687a ldr r2, [r7, #4] 8005ed0: 615a str r2, [r3, #20] ep->xfer_len = len; 8005ed2: 697b ldr r3, [r7, #20] 8005ed4: 683a ldr r2, [r7, #0] 8005ed6: 619a str r2, [r3, #24] #if defined (USB) ep->xfer_fill_db = 1U; 8005ed8: 697b ldr r3, [r7, #20] 8005eda: 2201 movs r2, #1 8005edc: f883 2024 strb.w r2, [r3, #36] @ 0x24 ep->xfer_len_db = len; 8005ee0: 697b ldr r3, [r7, #20] 8005ee2: 683a ldr r2, [r7, #0] 8005ee4: 621a str r2, [r3, #32] #endif /* defined (USB) */ ep->xfer_count = 0U; 8005ee6: 697b ldr r3, [r7, #20] 8005ee8: 2200 movs r2, #0 8005eea: 61da str r2, [r3, #28] ep->is_in = 1U; 8005eec: 697b ldr r3, [r7, #20] 8005eee: 2201 movs r2, #1 8005ef0: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8005ef2: 7afb ldrb r3, [r7, #11] 8005ef4: f003 0307 and.w r3, r3, #7 8005ef8: b2da uxtb r2, r3 8005efa: 697b ldr r3, [r7, #20] 8005efc: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8005efe: 68fb ldr r3, [r7, #12] 8005f00: 681b ldr r3, [r3, #0] 8005f02: 6979 ldr r1, [r7, #20] 8005f04: 4618 mov r0, r3 8005f06: f003 fd3d bl 8009984 return HAL_OK; 8005f0a: 2300 movs r3, #0 } 8005f0c: 4618 mov r0, r3 8005f0e: 3718 adds r7, #24 8005f10: 46bd mov sp, r7 8005f12: bd80 pop {r7, pc} 08005f14 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8005f14: b580 push {r7, lr} 8005f16: b084 sub sp, #16 8005f18: af00 add r7, sp, #0 8005f1a: 6078 str r0, [r7, #4] 8005f1c: 460b mov r3, r1 8005f1e: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) 8005f20: 78fb ldrb r3, [r7, #3] 8005f22: f003 0307 and.w r3, r3, #7 8005f26: 687a ldr r2, [r7, #4] 8005f28: 7912 ldrb r2, [r2, #4] 8005f2a: 4293 cmp r3, r2 8005f2c: d901 bls.n 8005f32 { return HAL_ERROR; 8005f2e: 2301 movs r3, #1 8005f30: e04c b.n 8005fcc } if ((0x80U & ep_addr) == 0x80U) 8005f32: f997 3003 ldrsb.w r3, [r7, #3] 8005f36: 2b00 cmp r3, #0 8005f38: da0e bge.n 8005f58 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005f3a: 78fb ldrb r3, [r7, #3] 8005f3c: f003 0207 and.w r2, r3, #7 8005f40: 4613 mov r3, r2 8005f42: 009b lsls r3, r3, #2 8005f44: 4413 add r3, r2 8005f46: 00db lsls r3, r3, #3 8005f48: 3310 adds r3, #16 8005f4a: 687a ldr r2, [r7, #4] 8005f4c: 4413 add r3, r2 8005f4e: 60fb str r3, [r7, #12] ep->is_in = 1U; 8005f50: 68fb ldr r3, [r7, #12] 8005f52: 2201 movs r2, #1 8005f54: 705a strb r2, [r3, #1] 8005f56: e00c b.n 8005f72 } else { ep = &hpcd->OUT_ep[ep_addr]; 8005f58: 78fa ldrb r2, [r7, #3] 8005f5a: 4613 mov r3, r2 8005f5c: 009b lsls r3, r3, #2 8005f5e: 4413 add r3, r2 8005f60: 00db lsls r3, r3, #3 8005f62: f503 73a8 add.w r3, r3, #336 @ 0x150 8005f66: 687a ldr r2, [r7, #4] 8005f68: 4413 add r3, r2 8005f6a: 60fb str r3, [r7, #12] ep->is_in = 0U; 8005f6c: 68fb ldr r3, [r7, #12] 8005f6e: 2200 movs r2, #0 8005f70: 705a strb r2, [r3, #1] } ep->is_stall = 1U; 8005f72: 68fb ldr r3, [r7, #12] 8005f74: 2201 movs r2, #1 8005f76: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8005f78: 78fb ldrb r3, [r7, #3] 8005f7a: f003 0307 and.w r3, r3, #7 8005f7e: b2da uxtb r2, r3 8005f80: 68fb ldr r3, [r7, #12] 8005f82: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8005f84: 687b ldr r3, [r7, #4] 8005f86: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8005f8a: 2b01 cmp r3, #1 8005f8c: d101 bne.n 8005f92 8005f8e: 2302 movs r3, #2 8005f90: e01c b.n 8005fcc 8005f92: 687b ldr r3, [r7, #4] 8005f94: 2201 movs r2, #1 8005f96: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPSetStall(hpcd->Instance, ep); 8005f9a: 687b ldr r3, [r7, #4] 8005f9c: 681b ldr r3, [r3, #0] 8005f9e: 68f9 ldr r1, [r7, #12] 8005fa0: 4618 mov r0, r3 8005fa2: f005 f8a0 bl 800b0e6 if ((ep_addr & EP_ADDR_MSK) == 0U) 8005fa6: 78fb ldrb r3, [r7, #3] 8005fa8: f003 0307 and.w r3, r3, #7 8005fac: 2b00 cmp r3, #0 8005fae: d108 bne.n 8005fc2 { (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup); 8005fb0: 687b ldr r3, [r7, #4] 8005fb2: 681a ldr r2, [r3, #0] 8005fb4: 687b ldr r3, [r7, #4] 8005fb6: f503 7326 add.w r3, r3, #664 @ 0x298 8005fba: 4619 mov r1, r3 8005fbc: 4610 mov r0, r2 8005fbe: f005 f9c5 bl 800b34c } __HAL_UNLOCK(hpcd); 8005fc2: 687b ldr r3, [r7, #4] 8005fc4: 2200 movs r2, #0 8005fc6: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8005fca: 2300 movs r3, #0 } 8005fcc: 4618 mov r0, r3 8005fce: 3710 adds r7, #16 8005fd0: 46bd mov sp, r7 8005fd2: bd80 pop {r7, pc} 08005fd4 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8005fd4: b580 push {r7, lr} 8005fd6: b084 sub sp, #16 8005fd8: af00 add r7, sp, #0 8005fda: 6078 str r0, [r7, #4] 8005fdc: 460b mov r3, r1 8005fde: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) 8005fe0: 78fb ldrb r3, [r7, #3] 8005fe2: f003 030f and.w r3, r3, #15 8005fe6: 687a ldr r2, [r7, #4] 8005fe8: 7912 ldrb r2, [r2, #4] 8005fea: 4293 cmp r3, r2 8005fec: d901 bls.n 8005ff2 { return HAL_ERROR; 8005fee: 2301 movs r3, #1 8005ff0: e040 b.n 8006074 } if ((0x80U & ep_addr) == 0x80U) 8005ff2: f997 3003 ldrsb.w r3, [r7, #3] 8005ff6: 2b00 cmp r3, #0 8005ff8: da0e bge.n 8006018 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8005ffa: 78fb ldrb r3, [r7, #3] 8005ffc: f003 0207 and.w r2, r3, #7 8006000: 4613 mov r3, r2 8006002: 009b lsls r3, r3, #2 8006004: 4413 add r3, r2 8006006: 00db lsls r3, r3, #3 8006008: 3310 adds r3, #16 800600a: 687a ldr r2, [r7, #4] 800600c: 4413 add r3, r2 800600e: 60fb str r3, [r7, #12] ep->is_in = 1U; 8006010: 68fb ldr r3, [r7, #12] 8006012: 2201 movs r2, #1 8006014: 705a strb r2, [r3, #1] 8006016: e00e b.n 8006036 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8006018: 78fb ldrb r3, [r7, #3] 800601a: f003 0207 and.w r2, r3, #7 800601e: 4613 mov r3, r2 8006020: 009b lsls r3, r3, #2 8006022: 4413 add r3, r2 8006024: 00db lsls r3, r3, #3 8006026: f503 73a8 add.w r3, r3, #336 @ 0x150 800602a: 687a ldr r2, [r7, #4] 800602c: 4413 add r3, r2 800602e: 60fb str r3, [r7, #12] ep->is_in = 0U; 8006030: 68fb ldr r3, [r7, #12] 8006032: 2200 movs r2, #0 8006034: 705a strb r2, [r3, #1] } ep->is_stall = 0U; 8006036: 68fb ldr r3, [r7, #12] 8006038: 2200 movs r2, #0 800603a: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 800603c: 78fb ldrb r3, [r7, #3] 800603e: f003 0307 and.w r3, r3, #7 8006042: b2da uxtb r2, r3 8006044: 68fb ldr r3, [r7, #12] 8006046: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8006048: 687b ldr r3, [r7, #4] 800604a: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 800604e: 2b01 cmp r3, #1 8006050: d101 bne.n 8006056 8006052: 2302 movs r3, #2 8006054: e00e b.n 8006074 8006056: 687b ldr r3, [r7, #4] 8006058: 2201 movs r2, #1 800605a: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPClearStall(hpcd->Instance, ep); 800605e: 687b ldr r3, [r7, #4] 8006060: 681b ldr r3, [r3, #0] 8006062: 68f9 ldr r1, [r7, #12] 8006064: 4618 mov r0, r3 8006066: f005 f88e bl 800b186 __HAL_UNLOCK(hpcd); 800606a: 687b ldr r3, [r7, #4] 800606c: 2200 movs r2, #0 800606e: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8006072: 2300 movs r3, #0 } 8006074: 4618 mov r0, r3 8006076: 3710 adds r7, #16 8006078: 46bd mov sp, r7 800607a: bd80 pop {r7, pc} 0800607c : * @brief This function handles PCD Endpoint interrupt request. * @param hpcd PCD handle * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) { 800607c: b580 push {r7, lr} 800607e: b096 sub sp, #88 @ 0x58 8006080: af00 add r7, sp, #0 8006082: 6078 str r0, [r7, #4] #if (USE_USB_DOUBLE_BUFFER != 1U) count = 0U; #endif /* USE_USB_DOUBLE_BUFFER */ /* stay in loop while pending interrupts */ while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 8006084: e3bb b.n 80067fe { wIstr = hpcd->Instance->ISTR; 8006086: 687b ldr r3, [r7, #4] 8006088: 681b ldr r3, [r3, #0] 800608a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 800608e: f8a7 304e strh.w r3, [r7, #78] @ 0x4e /* extract highest priority endpoint number */ epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); 8006092: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8006096: b2db uxtb r3, r3 8006098: f003 030f and.w r3, r3, #15 800609c: f887 304d strb.w r3, [r7, #77] @ 0x4d if (epindex == 0U) 80060a0: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 80060a4: 2b00 cmp r3, #0 80060a6: f040 8175 bne.w 8006394 { /* Decode and service control endpoint interrupt */ /* DIR bit = origin of the interrupt */ if ((wIstr & USB_ISTR_DIR) == 0U) 80060aa: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 80060ae: f003 0310 and.w r3, r3, #16 80060b2: 2b00 cmp r3, #0 80060b4: d14e bne.n 8006154 { /* DIR = 0 */ /* DIR = 0 => IN int */ /* DIR = 0 implies that (EP_CTR_TX = 1) always */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); 80060b6: 687b ldr r3, [r7, #4] 80060b8: 681b ldr r3, [r3, #0] 80060ba: 881b ldrh r3, [r3, #0] 80060bc: b29b uxth r3, r3 80060be: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 80060c2: f023 0370 bic.w r3, r3, #112 @ 0x70 80060c6: 81fb strh r3, [r7, #14] 80060c8: 687b ldr r3, [r7, #4] 80060ca: 681a ldr r2, [r3, #0] 80060cc: 89fb ldrh r3, [r7, #14] 80060ce: ea6f 4343 mvn.w r3, r3, lsl #17 80060d2: ea6f 4353 mvn.w r3, r3, lsr #17 80060d6: b29b uxth r3, r3 80060d8: 8013 strh r3, [r2, #0] ep = &hpcd->IN_ep[0]; 80060da: 687b ldr r3, [r7, #4] 80060dc: 3310 adds r3, #16 80060de: 657b str r3, [r7, #84] @ 0x54 ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 80060e0: 687b ldr r3, [r7, #4] 80060e2: 681b ldr r3, [r3, #0] 80060e4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80060e8: b29b uxth r3, r3 80060ea: 461a mov r2, r3 80060ec: 6d7b ldr r3, [r7, #84] @ 0x54 80060ee: 781b ldrb r3, [r3, #0] 80060f0: 00db lsls r3, r3, #3 80060f2: 4413 add r3, r2 80060f4: 3302 adds r3, #2 80060f6: 005b lsls r3, r3, #1 80060f8: 687a ldr r2, [r7, #4] 80060fa: 6812 ldr r2, [r2, #0] 80060fc: 4413 add r3, r2 80060fe: f503 6380 add.w r3, r3, #1024 @ 0x400 8006102: 881b ldrh r3, [r3, #0] 8006104: f3c3 0209 ubfx r2, r3, #0, #10 8006108: 6d7b ldr r3, [r7, #84] @ 0x54 800610a: 61da str r2, [r3, #28] ep->xfer_buff += ep->xfer_count; 800610c: 6d7b ldr r3, [r7, #84] @ 0x54 800610e: 695a ldr r2, [r3, #20] 8006110: 6d7b ldr r3, [r7, #84] @ 0x54 8006112: 69db ldr r3, [r3, #28] 8006114: 441a add r2, r3 8006116: 6d7b ldr r3, [r7, #84] @ 0x54 8006118: 615a str r2, [r3, #20] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, 0U); #else HAL_PCD_DataInStageCallback(hpcd, 0U); 800611a: 2100 movs r1, #0 800611c: 6878 ldr r0, [r7, #4] 800611e: f006 ffe4 bl 800d0ea #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U)) 8006122: 687b ldr r3, [r7, #4] 8006124: 7b5b ldrb r3, [r3, #13] 8006126: b2db uxtb r3, r3 8006128: 2b00 cmp r3, #0 800612a: f000 8368 beq.w 80067fe 800612e: 6d7b ldr r3, [r7, #84] @ 0x54 8006130: 699b ldr r3, [r3, #24] 8006132: 2b00 cmp r3, #0 8006134: f040 8363 bne.w 80067fe { hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF); 8006138: 687b ldr r3, [r7, #4] 800613a: 7b5b ldrb r3, [r3, #13] 800613c: b2db uxtb r3, r3 800613e: f063 037f orn r3, r3, #127 @ 0x7f 8006142: b2da uxtb r2, r3 8006144: 687b ldr r3, [r7, #4] 8006146: 681b ldr r3, [r3, #0] 8006148: f8a3 204c strh.w r2, [r3, #76] @ 0x4c hpcd->USB_Address = 0U; 800614c: 687b ldr r3, [r7, #4] 800614e: 2200 movs r2, #0 8006150: 735a strb r2, [r3, #13] 8006152: e354 b.n 80067fe { /* DIR = 1 */ /* DIR = 1 & CTR_RX => SETUP or OUT int */ /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ ep = &hpcd->OUT_ep[0]; 8006154: 687b ldr r3, [r7, #4] 8006156: f503 73a8 add.w r3, r3, #336 @ 0x150 800615a: 657b str r3, [r7, #84] @ 0x54 wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 800615c: 687b ldr r3, [r7, #4] 800615e: 681b ldr r3, [r3, #0] 8006160: 881b ldrh r3, [r3, #0] 8006162: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_SETUP) != 0U) 8006166: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800616a: f403 6300 and.w r3, r3, #2048 @ 0x800 800616e: 2b00 cmp r3, #0 8006170: d034 beq.n 80061dc { /* Get SETUP Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8006172: 687b ldr r3, [r7, #4] 8006174: 681b ldr r3, [r3, #0] 8006176: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800617a: b29b uxth r3, r3 800617c: 461a mov r2, r3 800617e: 6d7b ldr r3, [r7, #84] @ 0x54 8006180: 781b ldrb r3, [r3, #0] 8006182: 00db lsls r3, r3, #3 8006184: 4413 add r3, r2 8006186: 3306 adds r3, #6 8006188: 005b lsls r3, r3, #1 800618a: 687a ldr r2, [r7, #4] 800618c: 6812 ldr r2, [r2, #0] 800618e: 4413 add r3, r2 8006190: f503 6380 add.w r3, r3, #1024 @ 0x400 8006194: 881b ldrh r3, [r3, #0] 8006196: f3c3 0209 ubfx r2, r3, #0, #10 800619a: 6d7b ldr r3, [r7, #84] @ 0x54 800619c: 61da str r2, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 800619e: 687b ldr r3, [r7, #4] 80061a0: 6818 ldr r0, [r3, #0] 80061a2: 687b ldr r3, [r7, #4] 80061a4: f503 7126 add.w r1, r3, #664 @ 0x298 80061a8: 6d7b ldr r3, [r7, #84] @ 0x54 80061aa: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 80061ac: 6d7b ldr r3, [r7, #84] @ 0x54 80061ae: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 80061b0: b29b uxth r3, r3 80061b2: f005 f91c bl 800b3ee /* SETUP bit kept frozen while CTR_RX = 1 */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 80061b6: 687b ldr r3, [r7, #4] 80061b8: 681b ldr r3, [r3, #0] 80061ba: 881b ldrh r3, [r3, #0] 80061bc: b29a uxth r2, r3 80061be: f640 738f movw r3, #3983 @ 0xf8f 80061c2: 4013 ands r3, r2 80061c4: 823b strh r3, [r7, #16] 80061c6: 687b ldr r3, [r7, #4] 80061c8: 681b ldr r3, [r3, #0] 80061ca: 8a3a ldrh r2, [r7, #16] 80061cc: f042 0280 orr.w r2, r2, #128 @ 0x80 80061d0: b292 uxth r2, r2 80061d2: 801a strh r2, [r3, #0] /* Process SETUP Packet*/ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SetupStageCallback(hpcd); #else HAL_PCD_SetupStageCallback(hpcd); 80061d4: 6878 ldr r0, [r7, #4] 80061d6: f006 ff5b bl 800d090 80061da: e310 b.n 80067fe #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else if ((wEPVal & USB_EP_CTR_RX) != 0U) 80061dc: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 80061e0: 2b00 cmp r3, #0 80061e2: f280 830c bge.w 80067fe { PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 80061e6: 687b ldr r3, [r7, #4] 80061e8: 681b ldr r3, [r3, #0] 80061ea: 881b ldrh r3, [r3, #0] 80061ec: b29a uxth r2, r3 80061ee: f640 738f movw r3, #3983 @ 0xf8f 80061f2: 4013 ands r3, r2 80061f4: 83fb strh r3, [r7, #30] 80061f6: 687b ldr r3, [r7, #4] 80061f8: 681b ldr r3, [r3, #0] 80061fa: 8bfa ldrh r2, [r7, #30] 80061fc: f042 0280 orr.w r2, r2, #128 @ 0x80 8006200: b292 uxth r2, r2 8006202: 801a strh r2, [r3, #0] /* Get Control Data OUT Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8006204: 687b ldr r3, [r7, #4] 8006206: 681b ldr r3, [r3, #0] 8006208: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800620c: b29b uxth r3, r3 800620e: 461a mov r2, r3 8006210: 6d7b ldr r3, [r7, #84] @ 0x54 8006212: 781b ldrb r3, [r3, #0] 8006214: 00db lsls r3, r3, #3 8006216: 4413 add r3, r2 8006218: 3306 adds r3, #6 800621a: 005b lsls r3, r3, #1 800621c: 687a ldr r2, [r7, #4] 800621e: 6812 ldr r2, [r2, #0] 8006220: 4413 add r3, r2 8006222: f503 6380 add.w r3, r3, #1024 @ 0x400 8006226: 881b ldrh r3, [r3, #0] 8006228: f3c3 0209 ubfx r2, r3, #0, #10 800622c: 6d7b ldr r3, [r7, #84] @ 0x54 800622e: 61da str r2, [r3, #28] if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) 8006230: 6d7b ldr r3, [r7, #84] @ 0x54 8006232: 69db ldr r3, [r3, #28] 8006234: 2b00 cmp r3, #0 8006236: d019 beq.n 800626c 8006238: 6d7b ldr r3, [r7, #84] @ 0x54 800623a: 695b ldr r3, [r3, #20] 800623c: 2b00 cmp r3, #0 800623e: d015 beq.n 800626c { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 8006240: 687b ldr r3, [r7, #4] 8006242: 6818 ldr r0, [r3, #0] 8006244: 6d7b ldr r3, [r7, #84] @ 0x54 8006246: 6959 ldr r1, [r3, #20] 8006248: 6d7b ldr r3, [r7, #84] @ 0x54 800624a: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 800624c: 6d7b ldr r3, [r7, #84] @ 0x54 800624e: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 8006250: b29b uxth r3, r3 8006252: f005 f8cc bl 800b3ee ep->xfer_buff += ep->xfer_count; 8006256: 6d7b ldr r3, [r7, #84] @ 0x54 8006258: 695a ldr r2, [r3, #20] 800625a: 6d7b ldr r3, [r7, #84] @ 0x54 800625c: 69db ldr r3, [r3, #28] 800625e: 441a add r2, r3 8006260: 6d7b ldr r3, [r7, #84] @ 0x54 8006262: 615a str r2, [r3, #20] /* Process Control Data OUT Packet */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, 0U); #else HAL_PCD_DataOutStageCallback(hpcd, 0U); 8006264: 2100 movs r1, #0 8006266: 6878 ldr r0, [r7, #4] 8006268: f006 ff24 bl 800d0b4 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 800626c: 687b ldr r3, [r7, #4] 800626e: 681b ldr r3, [r3, #0] 8006270: 881b ldrh r3, [r3, #0] 8006272: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) 8006276: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800627a: f403 6300 and.w r3, r3, #2048 @ 0x800 800627e: 2b00 cmp r3, #0 8006280: f040 82bd bne.w 80067fe 8006284: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8006288: f403 5340 and.w r3, r3, #12288 @ 0x3000 800628c: f5b3 5f40 cmp.w r3, #12288 @ 0x3000 8006290: f000 82b5 beq.w 80067fe { PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); 8006294: 687b ldr r3, [r7, #4] 8006296: 681b ldr r3, [r3, #0] 8006298: 61bb str r3, [r7, #24] 800629a: 687b ldr r3, [r7, #4] 800629c: 681b ldr r3, [r3, #0] 800629e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80062a2: b29b uxth r3, r3 80062a4: 461a mov r2, r3 80062a6: 69bb ldr r3, [r7, #24] 80062a8: 4413 add r3, r2 80062aa: 61bb str r3, [r7, #24] 80062ac: 69bb ldr r3, [r7, #24] 80062ae: f203 430c addw r3, r3, #1036 @ 0x40c 80062b2: 617b str r3, [r7, #20] 80062b4: 697b ldr r3, [r7, #20] 80062b6: 881b ldrh r3, [r3, #0] 80062b8: b29b uxth r3, r3 80062ba: f3c3 0309 ubfx r3, r3, #0, #10 80062be: b29a uxth r2, r3 80062c0: 697b ldr r3, [r7, #20] 80062c2: 801a strh r2, [r3, #0] 80062c4: 6d7b ldr r3, [r7, #84] @ 0x54 80062c6: 691b ldr r3, [r3, #16] 80062c8: 2b3e cmp r3, #62 @ 0x3e 80062ca: d91d bls.n 8006308 80062cc: 6d7b ldr r3, [r7, #84] @ 0x54 80062ce: 691b ldr r3, [r3, #16] 80062d0: 095b lsrs r3, r3, #5 80062d2: 647b str r3, [r7, #68] @ 0x44 80062d4: 6d7b ldr r3, [r7, #84] @ 0x54 80062d6: 691b ldr r3, [r3, #16] 80062d8: f003 031f and.w r3, r3, #31 80062dc: 2b00 cmp r3, #0 80062de: d102 bne.n 80062e6 80062e0: 6c7b ldr r3, [r7, #68] @ 0x44 80062e2: 3b01 subs r3, #1 80062e4: 647b str r3, [r7, #68] @ 0x44 80062e6: 697b ldr r3, [r7, #20] 80062e8: 881b ldrh r3, [r3, #0] 80062ea: b29a uxth r2, r3 80062ec: 6c7b ldr r3, [r7, #68] @ 0x44 80062ee: b29b uxth r3, r3 80062f0: 029b lsls r3, r3, #10 80062f2: b29b uxth r3, r3 80062f4: 4313 orrs r3, r2 80062f6: b29b uxth r3, r3 80062f8: ea6f 4343 mvn.w r3, r3, lsl #17 80062fc: ea6f 4353 mvn.w r3, r3, lsr #17 8006300: b29a uxth r2, r3 8006302: 697b ldr r3, [r7, #20] 8006304: 801a strh r2, [r3, #0] 8006306: e026 b.n 8006356 8006308: 6d7b ldr r3, [r7, #84] @ 0x54 800630a: 691b ldr r3, [r3, #16] 800630c: 2b00 cmp r3, #0 800630e: d10a bne.n 8006326 8006310: 697b ldr r3, [r7, #20] 8006312: 881b ldrh r3, [r3, #0] 8006314: b29b uxth r3, r3 8006316: ea6f 4343 mvn.w r3, r3, lsl #17 800631a: ea6f 4353 mvn.w r3, r3, lsr #17 800631e: b29a uxth r2, r3 8006320: 697b ldr r3, [r7, #20] 8006322: 801a strh r2, [r3, #0] 8006324: e017 b.n 8006356 8006326: 6d7b ldr r3, [r7, #84] @ 0x54 8006328: 691b ldr r3, [r3, #16] 800632a: 085b lsrs r3, r3, #1 800632c: 647b str r3, [r7, #68] @ 0x44 800632e: 6d7b ldr r3, [r7, #84] @ 0x54 8006330: 691b ldr r3, [r3, #16] 8006332: f003 0301 and.w r3, r3, #1 8006336: 2b00 cmp r3, #0 8006338: d002 beq.n 8006340 800633a: 6c7b ldr r3, [r7, #68] @ 0x44 800633c: 3301 adds r3, #1 800633e: 647b str r3, [r7, #68] @ 0x44 8006340: 697b ldr r3, [r7, #20] 8006342: 881b ldrh r3, [r3, #0] 8006344: b29a uxth r2, r3 8006346: 6c7b ldr r3, [r7, #68] @ 0x44 8006348: b29b uxth r3, r3 800634a: 029b lsls r3, r3, #10 800634c: b29b uxth r3, r3 800634e: 4313 orrs r3, r2 8006350: b29a uxth r2, r3 8006352: 697b ldr r3, [r7, #20] 8006354: 801a strh r2, [r3, #0] PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); 8006356: 687b ldr r3, [r7, #4] 8006358: 681b ldr r3, [r3, #0] 800635a: 881b ldrh r3, [r3, #0] 800635c: b29b uxth r3, r3 800635e: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8006362: f023 0370 bic.w r3, r3, #112 @ 0x70 8006366: 827b strh r3, [r7, #18] 8006368: 8a7b ldrh r3, [r7, #18] 800636a: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800636e: 827b strh r3, [r7, #18] 8006370: 8a7b ldrh r3, [r7, #18] 8006372: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8006376: 827b strh r3, [r7, #18] 8006378: 687b ldr r3, [r7, #4] 800637a: 681a ldr r2, [r3, #0] 800637c: 8a7b ldrh r3, [r7, #18] 800637e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006382: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006386: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800638a: f043 0380 orr.w r3, r3, #128 @ 0x80 800638e: b29b uxth r3, r3 8006390: 8013 strh r3, [r2, #0] 8006392: e234 b.n 80067fe } else { /* Decode and service non control endpoints interrupt */ /* process related endpoint register */ wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); 8006394: 687b ldr r3, [r7, #4] 8006396: 681b ldr r3, [r3, #0] 8006398: 461a mov r2, r3 800639a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 800639e: 009b lsls r3, r3, #2 80063a0: 4413 add r3, r2 80063a2: 881b ldrh r3, [r3, #0] 80063a4: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_CTR_RX) != 0U) 80063a8: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 80063ac: 2b00 cmp r3, #0 80063ae: f280 80fc bge.w 80065aa { /* clear int flag */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); 80063b2: 687b ldr r3, [r7, #4] 80063b4: 681b ldr r3, [r3, #0] 80063b6: 461a mov r2, r3 80063b8: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 80063bc: 009b lsls r3, r3, #2 80063be: 4413 add r3, r2 80063c0: 881b ldrh r3, [r3, #0] 80063c2: b29a uxth r2, r3 80063c4: f640 738f movw r3, #3983 @ 0xf8f 80063c8: 4013 ands r3, r2 80063ca: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 80063ce: 687b ldr r3, [r7, #4] 80063d0: 681b ldr r3, [r3, #0] 80063d2: 461a mov r2, r3 80063d4: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 80063d8: 009b lsls r3, r3, #2 80063da: 4413 add r3, r2 80063dc: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48 80063e0: f042 0280 orr.w r2, r2, #128 @ 0x80 80063e4: b292 uxth r2, r2 80063e6: 801a strh r2, [r3, #0] ep = &hpcd->OUT_ep[epindex]; 80063e8: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 80063ec: 4613 mov r3, r2 80063ee: 009b lsls r3, r3, #2 80063f0: 4413 add r3, r2 80063f2: 00db lsls r3, r3, #3 80063f4: f503 73a8 add.w r3, r3, #336 @ 0x150 80063f8: 687a ldr r2, [r7, #4] 80063fa: 4413 add r3, r2 80063fc: 657b str r3, [r7, #84] @ 0x54 /* OUT Single Buffering */ if (ep->doublebuffer == 0U) 80063fe: 6d7b ldr r3, [r7, #84] @ 0x54 8006400: 7b1b ldrb r3, [r3, #12] 8006402: 2b00 cmp r3, #0 8006404: d125 bne.n 8006452 { count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8006406: 687b ldr r3, [r7, #4] 8006408: 681b ldr r3, [r3, #0] 800640a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800640e: b29b uxth r3, r3 8006410: 461a mov r2, r3 8006412: 6d7b ldr r3, [r7, #84] @ 0x54 8006414: 781b ldrb r3, [r3, #0] 8006416: 00db lsls r3, r3, #3 8006418: 4413 add r3, r2 800641a: 3306 adds r3, #6 800641c: 005b lsls r3, r3, #1 800641e: 687a ldr r2, [r7, #4] 8006420: 6812 ldr r2, [r2, #0] 8006422: 4413 add r3, r2 8006424: f503 6380 add.w r3, r3, #1024 @ 0x400 8006428: 881b ldrh r3, [r3, #0] 800642a: f3c3 0309 ubfx r3, r3, #0, #10 800642e: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 8006432: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8006436: 2b00 cmp r3, #0 8006438: f000 8092 beq.w 8006560 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); 800643c: 687b ldr r3, [r7, #4] 800643e: 6818 ldr r0, [r3, #0] 8006440: 6d7b ldr r3, [r7, #84] @ 0x54 8006442: 6959 ldr r1, [r3, #20] 8006444: 6d7b ldr r3, [r7, #84] @ 0x54 8006446: 88da ldrh r2, [r3, #6] 8006448: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 800644c: f004 ffcf bl 800b3ee 8006450: e086 b.n 8006560 } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* manage double buffer bulk out */ if (ep->type == EP_TYPE_BULK) 8006452: 6d7b ldr r3, [r7, #84] @ 0x54 8006454: 78db ldrb r3, [r3, #3] 8006456: 2b02 cmp r3, #2 8006458: d10a bne.n 8006470 { count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal); 800645a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800645e: 461a mov r2, r3 8006460: 6d79 ldr r1, [r7, #84] @ 0x54 8006462: 6878 ldr r0, [r7, #4] 8006464: f000 f9d9 bl 800681a 8006468: 4603 mov r3, r0 800646a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 800646e: e077 b.n 8006560 } else /* manage double buffer iso out */ { /* free EP OUT Buffer */ PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 8006470: 687b ldr r3, [r7, #4] 8006472: 681b ldr r3, [r3, #0] 8006474: 461a mov r2, r3 8006476: 6d7b ldr r3, [r7, #84] @ 0x54 8006478: 781b ldrb r3, [r3, #0] 800647a: 009b lsls r3, r3, #2 800647c: 4413 add r3, r2 800647e: 881b ldrh r3, [r3, #0] 8006480: b29b uxth r3, r3 8006482: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006486: f023 0370 bic.w r3, r3, #112 @ 0x70 800648a: f8a7 3052 strh.w r3, [r7, #82] @ 0x52 800648e: 687b ldr r3, [r7, #4] 8006490: 681b ldr r3, [r3, #0] 8006492: 461a mov r2, r3 8006494: 6d7b ldr r3, [r7, #84] @ 0x54 8006496: 781b ldrb r3, [r3, #0] 8006498: 009b lsls r3, r3, #2 800649a: 441a add r2, r3 800649c: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52 80064a0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80064a4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80064a8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80064ac: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80064b0: b29b uxth r3, r3 80064b2: 8013 strh r3, [r2, #0] if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) 80064b4: 687b ldr r3, [r7, #4] 80064b6: 681b ldr r3, [r3, #0] 80064b8: 461a mov r2, r3 80064ba: 6d7b ldr r3, [r7, #84] @ 0x54 80064bc: 781b ldrb r3, [r3, #0] 80064be: 009b lsls r3, r3, #2 80064c0: 4413 add r3, r2 80064c2: 881b ldrh r3, [r3, #0] 80064c4: b29b uxth r3, r3 80064c6: f403 4380 and.w r3, r3, #16384 @ 0x4000 80064ca: 2b00 cmp r3, #0 80064cc: d024 beq.n 8006518 { /* read from endpoint BUF0Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 80064ce: 687b ldr r3, [r7, #4] 80064d0: 681b ldr r3, [r3, #0] 80064d2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80064d6: b29b uxth r3, r3 80064d8: 461a mov r2, r3 80064da: 6d7b ldr r3, [r7, #84] @ 0x54 80064dc: 781b ldrb r3, [r3, #0] 80064de: 00db lsls r3, r3, #3 80064e0: 4413 add r3, r2 80064e2: 3302 adds r3, #2 80064e4: 005b lsls r3, r3, #1 80064e6: 687a ldr r2, [r7, #4] 80064e8: 6812 ldr r2, [r2, #0] 80064ea: 4413 add r3, r2 80064ec: f503 6380 add.w r3, r3, #1024 @ 0x400 80064f0: 881b ldrh r3, [r3, #0] 80064f2: f3c3 0309 ubfx r3, r3, #0, #10 80064f6: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 80064fa: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80064fe: 2b00 cmp r3, #0 8006500: d02e beq.n 8006560 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 8006502: 687b ldr r3, [r7, #4] 8006504: 6818 ldr r0, [r3, #0] 8006506: 6d7b ldr r3, [r7, #84] @ 0x54 8006508: 6959 ldr r1, [r3, #20] 800650a: 6d7b ldr r3, [r7, #84] @ 0x54 800650c: 891a ldrh r2, [r3, #8] 800650e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8006512: f004 ff6c bl 800b3ee 8006516: e023 b.n 8006560 } } else { /* read from endpoint BUF1Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8006518: 687b ldr r3, [r7, #4] 800651a: 681b ldr r3, [r3, #0] 800651c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006520: b29b uxth r3, r3 8006522: 461a mov r2, r3 8006524: 6d7b ldr r3, [r7, #84] @ 0x54 8006526: 781b ldrb r3, [r3, #0] 8006528: 00db lsls r3, r3, #3 800652a: 4413 add r3, r2 800652c: 3306 adds r3, #6 800652e: 005b lsls r3, r3, #1 8006530: 687a ldr r2, [r7, #4] 8006532: 6812 ldr r2, [r2, #0] 8006534: 4413 add r3, r2 8006536: f503 6380 add.w r3, r3, #1024 @ 0x400 800653a: 881b ldrh r3, [r3, #0] 800653c: f3c3 0309 ubfx r3, r3, #0, #10 8006540: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 8006544: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8006548: 2b00 cmp r3, #0 800654a: d009 beq.n 8006560 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 800654c: 687b ldr r3, [r7, #4] 800654e: 6818 ldr r0, [r3, #0] 8006550: 6d7b ldr r3, [r7, #84] @ 0x54 8006552: 6959 ldr r1, [r3, #20] 8006554: 6d7b ldr r3, [r7, #84] @ 0x54 8006556: 895a ldrh r2, [r3, #10] 8006558: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 800655c: f004 ff47 bl 800b3ee } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; 8006560: 6d7b ldr r3, [r7, #84] @ 0x54 8006562: 69da ldr r2, [r3, #28] 8006564: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8006568: 441a add r2, r3 800656a: 6d7b ldr r3, [r7, #84] @ 0x54 800656c: 61da str r2, [r3, #28] ep->xfer_buff += count; 800656e: 6d7b ldr r3, [r7, #84] @ 0x54 8006570: 695a ldr r2, [r3, #20] 8006572: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8006576: 441a add r2, r3 8006578: 6d7b ldr r3, [r7, #84] @ 0x54 800657a: 615a str r2, [r3, #20] if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) 800657c: 6d7b ldr r3, [r7, #84] @ 0x54 800657e: 699b ldr r3, [r3, #24] 8006580: 2b00 cmp r3, #0 8006582: d005 beq.n 8006590 8006584: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50 8006588: 6d7b ldr r3, [r7, #84] @ 0x54 800658a: 691b ldr r3, [r3, #16] 800658c: 429a cmp r2, r3 800658e: d206 bcs.n 800659e { /* RX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, ep->num); #else HAL_PCD_DataOutStageCallback(hpcd, ep->num); 8006590: 6d7b ldr r3, [r7, #84] @ 0x54 8006592: 781b ldrb r3, [r3, #0] 8006594: 4619 mov r1, r3 8006596: 6878 ldr r0, [r7, #4] 8006598: f006 fd8c bl 800d0b4 800659c: e005 b.n 80065aa #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { (void)USB_EPStartXfer(hpcd->Instance, ep); 800659e: 687b ldr r3, [r7, #4] 80065a0: 681b ldr r3, [r3, #0] 80065a2: 6d79 ldr r1, [r7, #84] @ 0x54 80065a4: 4618 mov r0, r3 80065a6: f003 f9ed bl 8009984 } } if ((wEPVal & USB_EP_CTR_TX) != 0U) 80065aa: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80065ae: f003 0380 and.w r3, r3, #128 @ 0x80 80065b2: 2b00 cmp r3, #0 80065b4: f000 8123 beq.w 80067fe { ep = &hpcd->IN_ep[epindex]; 80065b8: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 80065bc: 4613 mov r3, r2 80065be: 009b lsls r3, r3, #2 80065c0: 4413 add r3, r2 80065c2: 00db lsls r3, r3, #3 80065c4: 3310 adds r3, #16 80065c6: 687a ldr r2, [r7, #4] 80065c8: 4413 add r3, r2 80065ca: 657b str r3, [r7, #84] @ 0x54 /* clear int flag */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); 80065cc: 687b ldr r3, [r7, #4] 80065ce: 681b ldr r3, [r3, #0] 80065d0: 461a mov r2, r3 80065d2: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 80065d6: 009b lsls r3, r3, #2 80065d8: 4413 add r3, r2 80065da: 881b ldrh r3, [r3, #0] 80065dc: b29b uxth r3, r3 80065de: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 80065e2: f023 0370 bic.w r3, r3, #112 @ 0x70 80065e6: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 80065ea: 687b ldr r3, [r7, #4] 80065ec: 681b ldr r3, [r3, #0] 80065ee: 461a mov r2, r3 80065f0: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 80065f4: 009b lsls r3, r3, #2 80065f6: 441a add r2, r3 80065f8: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 80065fc: ea6f 4343 mvn.w r3, r3, lsl #17 8006600: ea6f 4353 mvn.w r3, r3, lsr #17 8006604: b29b uxth r3, r3 8006606: 8013 strh r3, [r2, #0] if (ep->type == EP_TYPE_ISOC) 8006608: 6d7b ldr r3, [r7, #84] @ 0x54 800660a: 78db ldrb r3, [r3, #3] 800660c: 2b01 cmp r3, #1 800660e: f040 80a2 bne.w 8006756 { ep->xfer_len = 0U; 8006612: 6d7b ldr r3, [r7, #84] @ 0x54 8006614: 2200 movs r2, #0 8006616: 619a str r2, [r3, #24] #if (USE_USB_DOUBLE_BUFFER == 1U) if (ep->doublebuffer != 0U) 8006618: 6d7b ldr r3, [r7, #84] @ 0x54 800661a: 7b1b ldrb r3, [r3, #12] 800661c: 2b00 cmp r3, #0 800661e: f000 8093 beq.w 8006748 { if ((wEPVal & USB_EP_DTOG_TX) != 0U) 8006622: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8006626: f003 0340 and.w r3, r3, #64 @ 0x40 800662a: 2b00 cmp r3, #0 800662c: d046 beq.n 80066bc { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 800662e: 6d7b ldr r3, [r7, #84] @ 0x54 8006630: 785b ldrb r3, [r3, #1] 8006632: 2b00 cmp r3, #0 8006634: d126 bne.n 8006684 8006636: 687b ldr r3, [r7, #4] 8006638: 681b ldr r3, [r3, #0] 800663a: 627b str r3, [r7, #36] @ 0x24 800663c: 687b ldr r3, [r7, #4] 800663e: 681b ldr r3, [r3, #0] 8006640: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006644: b29b uxth r3, r3 8006646: 461a mov r2, r3 8006648: 6a7b ldr r3, [r7, #36] @ 0x24 800664a: 4413 add r3, r2 800664c: 627b str r3, [r7, #36] @ 0x24 800664e: 6d7b ldr r3, [r7, #84] @ 0x54 8006650: 781b ldrb r3, [r3, #0] 8006652: 011a lsls r2, r3, #4 8006654: 6a7b ldr r3, [r7, #36] @ 0x24 8006656: 4413 add r3, r2 8006658: f203 4304 addw r3, r3, #1028 @ 0x404 800665c: 623b str r3, [r7, #32] 800665e: 6a3b ldr r3, [r7, #32] 8006660: 881b ldrh r3, [r3, #0] 8006662: b29b uxth r3, r3 8006664: f3c3 0309 ubfx r3, r3, #0, #10 8006668: b29a uxth r2, r3 800666a: 6a3b ldr r3, [r7, #32] 800666c: 801a strh r2, [r3, #0] 800666e: 6a3b ldr r3, [r7, #32] 8006670: 881b ldrh r3, [r3, #0] 8006672: b29b uxth r3, r3 8006674: ea6f 4343 mvn.w r3, r3, lsl #17 8006678: ea6f 4353 mvn.w r3, r3, lsr #17 800667c: b29a uxth r2, r3 800667e: 6a3b ldr r3, [r7, #32] 8006680: 801a strh r2, [r3, #0] 8006682: e061 b.n 8006748 8006684: 6d7b ldr r3, [r7, #84] @ 0x54 8006686: 785b ldrb r3, [r3, #1] 8006688: 2b01 cmp r3, #1 800668a: d15d bne.n 8006748 800668c: 687b ldr r3, [r7, #4] 800668e: 681b ldr r3, [r3, #0] 8006690: 62fb str r3, [r7, #44] @ 0x2c 8006692: 687b ldr r3, [r7, #4] 8006694: 681b ldr r3, [r3, #0] 8006696: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800669a: b29b uxth r3, r3 800669c: 461a mov r2, r3 800669e: 6afb ldr r3, [r7, #44] @ 0x2c 80066a0: 4413 add r3, r2 80066a2: 62fb str r3, [r7, #44] @ 0x2c 80066a4: 6d7b ldr r3, [r7, #84] @ 0x54 80066a6: 781b ldrb r3, [r3, #0] 80066a8: 011a lsls r2, r3, #4 80066aa: 6afb ldr r3, [r7, #44] @ 0x2c 80066ac: 4413 add r3, r2 80066ae: f203 4304 addw r3, r3, #1028 @ 0x404 80066b2: 62bb str r3, [r7, #40] @ 0x28 80066b4: 6abb ldr r3, [r7, #40] @ 0x28 80066b6: 2200 movs r2, #0 80066b8: 801a strh r2, [r3, #0] 80066ba: e045 b.n 8006748 } else { PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 80066bc: 687b ldr r3, [r7, #4] 80066be: 681b ldr r3, [r3, #0] 80066c0: 63fb str r3, [r7, #60] @ 0x3c 80066c2: 6d7b ldr r3, [r7, #84] @ 0x54 80066c4: 785b ldrb r3, [r3, #1] 80066c6: 2b00 cmp r3, #0 80066c8: d126 bne.n 8006718 80066ca: 687b ldr r3, [r7, #4] 80066cc: 681b ldr r3, [r3, #0] 80066ce: 637b str r3, [r7, #52] @ 0x34 80066d0: 687b ldr r3, [r7, #4] 80066d2: 681b ldr r3, [r3, #0] 80066d4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80066d8: b29b uxth r3, r3 80066da: 461a mov r2, r3 80066dc: 6b7b ldr r3, [r7, #52] @ 0x34 80066de: 4413 add r3, r2 80066e0: 637b str r3, [r7, #52] @ 0x34 80066e2: 6d7b ldr r3, [r7, #84] @ 0x54 80066e4: 781b ldrb r3, [r3, #0] 80066e6: 011a lsls r2, r3, #4 80066e8: 6b7b ldr r3, [r7, #52] @ 0x34 80066ea: 4413 add r3, r2 80066ec: f203 430c addw r3, r3, #1036 @ 0x40c 80066f0: 633b str r3, [r7, #48] @ 0x30 80066f2: 6b3b ldr r3, [r7, #48] @ 0x30 80066f4: 881b ldrh r3, [r3, #0] 80066f6: b29b uxth r3, r3 80066f8: f3c3 0309 ubfx r3, r3, #0, #10 80066fc: b29a uxth r2, r3 80066fe: 6b3b ldr r3, [r7, #48] @ 0x30 8006700: 801a strh r2, [r3, #0] 8006702: 6b3b ldr r3, [r7, #48] @ 0x30 8006704: 881b ldrh r3, [r3, #0] 8006706: b29b uxth r3, r3 8006708: ea6f 4343 mvn.w r3, r3, lsl #17 800670c: ea6f 4353 mvn.w r3, r3, lsr #17 8006710: b29a uxth r2, r3 8006712: 6b3b ldr r3, [r7, #48] @ 0x30 8006714: 801a strh r2, [r3, #0] 8006716: e017 b.n 8006748 8006718: 6d7b ldr r3, [r7, #84] @ 0x54 800671a: 785b ldrb r3, [r3, #1] 800671c: 2b01 cmp r3, #1 800671e: d113 bne.n 8006748 8006720: 687b ldr r3, [r7, #4] 8006722: 681b ldr r3, [r3, #0] 8006724: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006728: b29b uxth r3, r3 800672a: 461a mov r2, r3 800672c: 6bfb ldr r3, [r7, #60] @ 0x3c 800672e: 4413 add r3, r2 8006730: 63fb str r3, [r7, #60] @ 0x3c 8006732: 6d7b ldr r3, [r7, #84] @ 0x54 8006734: 781b ldrb r3, [r3, #0] 8006736: 011a lsls r2, r3, #4 8006738: 6bfb ldr r3, [r7, #60] @ 0x3c 800673a: 4413 add r3, r2 800673c: f203 430c addw r3, r3, #1036 @ 0x40c 8006740: 63bb str r3, [r7, #56] @ 0x38 8006742: 6bbb ldr r3, [r7, #56] @ 0x38 8006744: 2200 movs r2, #0 8006746: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8006748: 6d7b ldr r3, [r7, #84] @ 0x54 800674a: 781b ldrb r3, [r3, #0] 800674c: 4619 mov r1, r3 800674e: 6878 ldr r0, [r7, #4] 8006750: f006 fccb bl 800d0ea 8006754: e053 b.n 80067fe #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Manage Single Buffer Transaction */ if ((wEPVal & USB_EP_KIND) == 0U) 8006756: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800675a: f403 7380 and.w r3, r3, #256 @ 0x100 800675e: 2b00 cmp r3, #0 8006760: d146 bne.n 80067f0 { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 8006762: 687b ldr r3, [r7, #4] 8006764: 681b ldr r3, [r3, #0] 8006766: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800676a: b29b uxth r3, r3 800676c: 461a mov r2, r3 800676e: 6d7b ldr r3, [r7, #84] @ 0x54 8006770: 781b ldrb r3, [r3, #0] 8006772: 00db lsls r3, r3, #3 8006774: 4413 add r3, r2 8006776: 3302 adds r3, #2 8006778: 005b lsls r3, r3, #1 800677a: 687a ldr r2, [r7, #4] 800677c: 6812 ldr r2, [r2, #0] 800677e: 4413 add r3, r2 8006780: f503 6380 add.w r3, r3, #1024 @ 0x400 8006784: 881b ldrh r3, [r3, #0] 8006786: f3c3 0309 ubfx r3, r3, #0, #10 800678a: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 if (ep->xfer_len > TxPctSize) 800678e: 6d7b ldr r3, [r7, #84] @ 0x54 8006790: 699a ldr r2, [r3, #24] 8006792: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8006796: 429a cmp r2, r3 8006798: d907 bls.n 80067aa { ep->xfer_len -= TxPctSize; 800679a: 6d7b ldr r3, [r7, #84] @ 0x54 800679c: 699a ldr r2, [r3, #24] 800679e: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 80067a2: 1ad2 subs r2, r2, r3 80067a4: 6d7b ldr r3, [r7, #84] @ 0x54 80067a6: 619a str r2, [r3, #24] 80067a8: e002 b.n 80067b0 } else { ep->xfer_len = 0U; 80067aa: 6d7b ldr r3, [r7, #84] @ 0x54 80067ac: 2200 movs r2, #0 80067ae: 619a str r2, [r3, #24] } /* Zero Length Packet? */ if (ep->xfer_len == 0U) 80067b0: 6d7b ldr r3, [r7, #84] @ 0x54 80067b2: 699b ldr r3, [r3, #24] 80067b4: 2b00 cmp r3, #0 80067b6: d106 bne.n 80067c6 { /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 80067b8: 6d7b ldr r3, [r7, #84] @ 0x54 80067ba: 781b ldrb r3, [r3, #0] 80067bc: 4619 mov r1, r3 80067be: 6878 ldr r0, [r7, #4] 80067c0: f006 fc93 bl 800d0ea 80067c4: e01b b.n 80067fe #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Transfer is not yet Done */ ep->xfer_buff += TxPctSize; 80067c6: 6d7b ldr r3, [r7, #84] @ 0x54 80067c8: 695a ldr r2, [r3, #20] 80067ca: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 80067ce: 441a add r2, r3 80067d0: 6d7b ldr r3, [r7, #84] @ 0x54 80067d2: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 80067d4: 6d7b ldr r3, [r7, #84] @ 0x54 80067d6: 69da ldr r2, [r3, #28] 80067d8: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 80067dc: 441a add r2, r3 80067de: 6d7b ldr r3, [r7, #84] @ 0x54 80067e0: 61da str r2, [r3, #28] (void)USB_EPStartXfer(hpcd->Instance, ep); 80067e2: 687b ldr r3, [r7, #4] 80067e4: 681b ldr r3, [r3, #0] 80067e6: 6d79 ldr r1, [r7, #84] @ 0x54 80067e8: 4618 mov r0, r3 80067ea: f003 f8cb bl 8009984 80067ee: e006 b.n 80067fe } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */ else { (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); 80067f0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80067f4: 461a mov r2, r3 80067f6: 6d79 ldr r1, [r7, #84] @ 0x54 80067f8: 6878 ldr r0, [r7, #4] 80067fa: f000 f91b bl 8006a34 while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 80067fe: 687b ldr r3, [r7, #4] 8006800: 681b ldr r3, [r3, #0] 8006802: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8006806: b29b uxth r3, r3 8006808: b21b sxth r3, r3 800680a: 2b00 cmp r3, #0 800680c: f6ff ac3b blt.w 8006086 } } } } return HAL_OK; 8006810: 2300 movs r3, #0 } 8006812: 4618 mov r0, r3 8006814: 3758 adds r7, #88 @ 0x58 8006816: 46bd mov sp, r7 8006818: bd80 pop {r7, pc} 0800681a : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 800681a: b580 push {r7, lr} 800681c: b088 sub sp, #32 800681e: af00 add r7, sp, #0 8006820: 60f8 str r0, [r7, #12] 8006822: 60b9 str r1, [r7, #8] 8006824: 4613 mov r3, r2 8006826: 80fb strh r3, [r7, #6] uint16_t count; /* Manage Buffer0 OUT */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8006828: 88fb ldrh r3, [r7, #6] 800682a: f403 4380 and.w r3, r3, #16384 @ 0x4000 800682e: 2b00 cmp r3, #0 8006830: d07e beq.n 8006930 { /* Get count of received Data on buffer0 */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 8006832: 68fb ldr r3, [r7, #12] 8006834: 681b ldr r3, [r3, #0] 8006836: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800683a: b29b uxth r3, r3 800683c: 461a mov r2, r3 800683e: 68bb ldr r3, [r7, #8] 8006840: 781b ldrb r3, [r3, #0] 8006842: 00db lsls r3, r3, #3 8006844: 4413 add r3, r2 8006846: 3302 adds r3, #2 8006848: 005b lsls r3, r3, #1 800684a: 68fa ldr r2, [r7, #12] 800684c: 6812 ldr r2, [r2, #0] 800684e: 4413 add r3, r2 8006850: f503 6380 add.w r3, r3, #1024 @ 0x400 8006854: 881b ldrh r3, [r3, #0] 8006856: f3c3 0309 ubfx r3, r3, #0, #10 800685a: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 800685c: 68bb ldr r3, [r7, #8] 800685e: 699a ldr r2, [r3, #24] 8006860: 8b7b ldrh r3, [r7, #26] 8006862: 429a cmp r2, r3 8006864: d306 bcc.n 8006874 { ep->xfer_len -= count; 8006866: 68bb ldr r3, [r7, #8] 8006868: 699a ldr r2, [r3, #24] 800686a: 8b7b ldrh r3, [r7, #26] 800686c: 1ad2 subs r2, r2, r3 800686e: 68bb ldr r3, [r7, #8] 8006870: 619a str r2, [r3, #24] 8006872: e002 b.n 800687a } else { ep->xfer_len = 0U; 8006874: 68bb ldr r3, [r7, #8] 8006876: 2200 movs r2, #0 8006878: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 800687a: 68bb ldr r3, [r7, #8] 800687c: 699b ldr r3, [r3, #24] 800687e: 2b00 cmp r3, #0 8006880: d123 bne.n 80068ca { /* set NAK to OUT endpoint since double buffer is enabled */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 8006882: 68fb ldr r3, [r7, #12] 8006884: 681b ldr r3, [r3, #0] 8006886: 461a mov r2, r3 8006888: 68bb ldr r3, [r7, #8] 800688a: 781b ldrb r3, [r3, #0] 800688c: 009b lsls r3, r3, #2 800688e: 4413 add r3, r2 8006890: 881b ldrh r3, [r3, #0] 8006892: b29b uxth r3, r3 8006894: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8006898: f023 0370 bic.w r3, r3, #112 @ 0x70 800689c: 833b strh r3, [r7, #24] 800689e: 8b3b ldrh r3, [r7, #24] 80068a0: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80068a4: 833b strh r3, [r7, #24] 80068a6: 68fb ldr r3, [r7, #12] 80068a8: 681b ldr r3, [r3, #0] 80068aa: 461a mov r2, r3 80068ac: 68bb ldr r3, [r7, #8] 80068ae: 781b ldrb r3, [r3, #0] 80068b0: 009b lsls r3, r3, #2 80068b2: 441a add r2, r3 80068b4: 8b3b ldrh r3, [r7, #24] 80068b6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80068ba: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80068be: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80068c2: f043 0380 orr.w r3, r3, #128 @ 0x80 80068c6: b29b uxth r3, r3 80068c8: 8013 strh r3, [r2, #0] } /* Check if Buffer1 is in blocked state which requires to toggle */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 80068ca: 88fb ldrh r3, [r7, #6] 80068cc: f003 0340 and.w r3, r3, #64 @ 0x40 80068d0: 2b00 cmp r3, #0 80068d2: d01f beq.n 8006914 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 80068d4: 68fb ldr r3, [r7, #12] 80068d6: 681b ldr r3, [r3, #0] 80068d8: 461a mov r2, r3 80068da: 68bb ldr r3, [r7, #8] 80068dc: 781b ldrb r3, [r3, #0] 80068de: 009b lsls r3, r3, #2 80068e0: 4413 add r3, r2 80068e2: 881b ldrh r3, [r3, #0] 80068e4: b29b uxth r3, r3 80068e6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80068ea: f023 0370 bic.w r3, r3, #112 @ 0x70 80068ee: 82fb strh r3, [r7, #22] 80068f0: 68fb ldr r3, [r7, #12] 80068f2: 681b ldr r3, [r3, #0] 80068f4: 461a mov r2, r3 80068f6: 68bb ldr r3, [r7, #8] 80068f8: 781b ldrb r3, [r3, #0] 80068fa: 009b lsls r3, r3, #2 80068fc: 441a add r2, r3 80068fe: 8afb ldrh r3, [r7, #22] 8006900: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006904: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006908: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800690c: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8006910: b29b uxth r3, r3 8006912: 8013 strh r3, [r2, #0] } if (count != 0U) 8006914: 8b7b ldrh r3, [r7, #26] 8006916: 2b00 cmp r3, #0 8006918: f000 8087 beq.w 8006a2a { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 800691c: 68fb ldr r3, [r7, #12] 800691e: 6818 ldr r0, [r3, #0] 8006920: 68bb ldr r3, [r7, #8] 8006922: 6959 ldr r1, [r3, #20] 8006924: 68bb ldr r3, [r7, #8] 8006926: 891a ldrh r2, [r3, #8] 8006928: 8b7b ldrh r3, [r7, #26] 800692a: f004 fd60 bl 800b3ee 800692e: e07c b.n 8006a2a } /* Manage Buffer 1 DTOG_RX=0 */ else { /* Get count of received data */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8006930: 68fb ldr r3, [r7, #12] 8006932: 681b ldr r3, [r3, #0] 8006934: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006938: b29b uxth r3, r3 800693a: 461a mov r2, r3 800693c: 68bb ldr r3, [r7, #8] 800693e: 781b ldrb r3, [r3, #0] 8006940: 00db lsls r3, r3, #3 8006942: 4413 add r3, r2 8006944: 3306 adds r3, #6 8006946: 005b lsls r3, r3, #1 8006948: 68fa ldr r2, [r7, #12] 800694a: 6812 ldr r2, [r2, #0] 800694c: 4413 add r3, r2 800694e: f503 6380 add.w r3, r3, #1024 @ 0x400 8006952: 881b ldrh r3, [r3, #0] 8006954: f3c3 0309 ubfx r3, r3, #0, #10 8006958: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 800695a: 68bb ldr r3, [r7, #8] 800695c: 699a ldr r2, [r3, #24] 800695e: 8b7b ldrh r3, [r7, #26] 8006960: 429a cmp r2, r3 8006962: d306 bcc.n 8006972 { ep->xfer_len -= count; 8006964: 68bb ldr r3, [r7, #8] 8006966: 699a ldr r2, [r3, #24] 8006968: 8b7b ldrh r3, [r7, #26] 800696a: 1ad2 subs r2, r2, r3 800696c: 68bb ldr r3, [r7, #8] 800696e: 619a str r2, [r3, #24] 8006970: e002 b.n 8006978 } else { ep->xfer_len = 0U; 8006972: 68bb ldr r3, [r7, #8] 8006974: 2200 movs r2, #0 8006976: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 8006978: 68bb ldr r3, [r7, #8] 800697a: 699b ldr r3, [r3, #24] 800697c: 2b00 cmp r3, #0 800697e: d123 bne.n 80069c8 { /* set NAK on the current endpoint */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 8006980: 68fb ldr r3, [r7, #12] 8006982: 681b ldr r3, [r3, #0] 8006984: 461a mov r2, r3 8006986: 68bb ldr r3, [r7, #8] 8006988: 781b ldrb r3, [r3, #0] 800698a: 009b lsls r3, r3, #2 800698c: 4413 add r3, r2 800698e: 881b ldrh r3, [r3, #0] 8006990: b29b uxth r3, r3 8006992: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8006996: f023 0370 bic.w r3, r3, #112 @ 0x70 800699a: 83fb strh r3, [r7, #30] 800699c: 8bfb ldrh r3, [r7, #30] 800699e: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80069a2: 83fb strh r3, [r7, #30] 80069a4: 68fb ldr r3, [r7, #12] 80069a6: 681b ldr r3, [r3, #0] 80069a8: 461a mov r2, r3 80069aa: 68bb ldr r3, [r7, #8] 80069ac: 781b ldrb r3, [r3, #0] 80069ae: 009b lsls r3, r3, #2 80069b0: 441a add r2, r3 80069b2: 8bfb ldrh r3, [r7, #30] 80069b4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80069b8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80069bc: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80069c0: f043 0380 orr.w r3, r3, #128 @ 0x80 80069c4: b29b uxth r3, r3 80069c6: 8013 strh r3, [r2, #0] } /*Need to FreeUser Buffer*/ if ((wEPVal & USB_EP_DTOG_TX) == 0U) 80069c8: 88fb ldrh r3, [r7, #6] 80069ca: f003 0340 and.w r3, r3, #64 @ 0x40 80069ce: 2b00 cmp r3, #0 80069d0: d11f bne.n 8006a12 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 80069d2: 68fb ldr r3, [r7, #12] 80069d4: 681b ldr r3, [r3, #0] 80069d6: 461a mov r2, r3 80069d8: 68bb ldr r3, [r7, #8] 80069da: 781b ldrb r3, [r3, #0] 80069dc: 009b lsls r3, r3, #2 80069de: 4413 add r3, r2 80069e0: 881b ldrh r3, [r3, #0] 80069e2: b29b uxth r3, r3 80069e4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80069e8: f023 0370 bic.w r3, r3, #112 @ 0x70 80069ec: 83bb strh r3, [r7, #28] 80069ee: 68fb ldr r3, [r7, #12] 80069f0: 681b ldr r3, [r3, #0] 80069f2: 461a mov r2, r3 80069f4: 68bb ldr r3, [r7, #8] 80069f6: 781b ldrb r3, [r3, #0] 80069f8: 009b lsls r3, r3, #2 80069fa: 441a add r2, r3 80069fc: 8bbb ldrh r3, [r7, #28] 80069fe: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006a02: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006a06: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006a0a: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8006a0e: b29b uxth r3, r3 8006a10: 8013 strh r3, [r2, #0] } if (count != 0U) 8006a12: 8b7b ldrh r3, [r7, #26] 8006a14: 2b00 cmp r3, #0 8006a16: d008 beq.n 8006a2a { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 8006a18: 68fb ldr r3, [r7, #12] 8006a1a: 6818 ldr r0, [r3, #0] 8006a1c: 68bb ldr r3, [r7, #8] 8006a1e: 6959 ldr r1, [r3, #20] 8006a20: 68bb ldr r3, [r7, #8] 8006a22: 895a ldrh r2, [r3, #10] 8006a24: 8b7b ldrh r3, [r7, #26] 8006a26: f004 fce2 bl 800b3ee } } return count; 8006a2a: 8b7b ldrh r3, [r7, #26] } 8006a2c: 4618 mov r0, r3 8006a2e: 3720 adds r7, #32 8006a30: 46bd mov sp, r7 8006a32: bd80 pop {r7, pc} 08006a34 : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 8006a34: b580 push {r7, lr} 8006a36: b0a4 sub sp, #144 @ 0x90 8006a38: af00 add r7, sp, #0 8006a3a: 60f8 str r0, [r7, #12] 8006a3c: 60b9 str r1, [r7, #8] 8006a3e: 4613 mov r3, r2 8006a40: 80fb strh r3, [r7, #6] uint32_t len; uint16_t TxPctSize; /* Data Buffer0 ACK received */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 8006a42: 88fb ldrh r3, [r7, #6] 8006a44: f003 0340 and.w r3, r3, #64 @ 0x40 8006a48: 2b00 cmp r3, #0 8006a4a: f000 81dd beq.w 8006e08 { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 8006a4e: 68fb ldr r3, [r7, #12] 8006a50: 681b ldr r3, [r3, #0] 8006a52: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006a56: b29b uxth r3, r3 8006a58: 461a mov r2, r3 8006a5a: 68bb ldr r3, [r7, #8] 8006a5c: 781b ldrb r3, [r3, #0] 8006a5e: 00db lsls r3, r3, #3 8006a60: 4413 add r3, r2 8006a62: 3302 adds r3, #2 8006a64: 005b lsls r3, r3, #1 8006a66: 68fa ldr r2, [r7, #12] 8006a68: 6812 ldr r2, [r2, #0] 8006a6a: 4413 add r3, r2 8006a6c: f503 6380 add.w r3, r3, #1024 @ 0x400 8006a70: 881b ldrh r3, [r3, #0] 8006a72: f3c3 0309 ubfx r3, r3, #0, #10 8006a76: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len > TxPctSize) 8006a7a: 68bb ldr r3, [r7, #8] 8006a7c: 699a ldr r2, [r3, #24] 8006a7e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006a82: 429a cmp r2, r3 8006a84: d907 bls.n 8006a96 { ep->xfer_len -= TxPctSize; 8006a86: 68bb ldr r3, [r7, #8] 8006a88: 699a ldr r2, [r3, #24] 8006a8a: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006a8e: 1ad2 subs r2, r2, r3 8006a90: 68bb ldr r3, [r7, #8] 8006a92: 619a str r2, [r3, #24] 8006a94: e002 b.n 8006a9c } else { ep->xfer_len = 0U; 8006a96: 68bb ldr r3, [r7, #8] 8006a98: 2200 movs r2, #0 8006a9a: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 8006a9c: 68bb ldr r3, [r7, #8] 8006a9e: 699b ldr r3, [r3, #24] 8006aa0: 2b00 cmp r3, #0 8006aa2: f040 80b9 bne.w 8006c18 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8006aa6: 68bb ldr r3, [r7, #8] 8006aa8: 785b ldrb r3, [r3, #1] 8006aaa: 2b00 cmp r3, #0 8006aac: d126 bne.n 8006afc 8006aae: 68fb ldr r3, [r7, #12] 8006ab0: 681b ldr r3, [r3, #0] 8006ab2: 62fb str r3, [r7, #44] @ 0x2c 8006ab4: 68fb ldr r3, [r7, #12] 8006ab6: 681b ldr r3, [r3, #0] 8006ab8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006abc: b29b uxth r3, r3 8006abe: 461a mov r2, r3 8006ac0: 6afb ldr r3, [r7, #44] @ 0x2c 8006ac2: 4413 add r3, r2 8006ac4: 62fb str r3, [r7, #44] @ 0x2c 8006ac6: 68bb ldr r3, [r7, #8] 8006ac8: 781b ldrb r3, [r3, #0] 8006aca: 011a lsls r2, r3, #4 8006acc: 6afb ldr r3, [r7, #44] @ 0x2c 8006ace: 4413 add r3, r2 8006ad0: f203 4304 addw r3, r3, #1028 @ 0x404 8006ad4: 62bb str r3, [r7, #40] @ 0x28 8006ad6: 6abb ldr r3, [r7, #40] @ 0x28 8006ad8: 881b ldrh r3, [r3, #0] 8006ada: b29b uxth r3, r3 8006adc: f3c3 0309 ubfx r3, r3, #0, #10 8006ae0: b29a uxth r2, r3 8006ae2: 6abb ldr r3, [r7, #40] @ 0x28 8006ae4: 801a strh r2, [r3, #0] 8006ae6: 6abb ldr r3, [r7, #40] @ 0x28 8006ae8: 881b ldrh r3, [r3, #0] 8006aea: b29b uxth r3, r3 8006aec: ea6f 4343 mvn.w r3, r3, lsl #17 8006af0: ea6f 4353 mvn.w r3, r3, lsr #17 8006af4: b29a uxth r2, r3 8006af6: 6abb ldr r3, [r7, #40] @ 0x28 8006af8: 801a strh r2, [r3, #0] 8006afa: e01a b.n 8006b32 8006afc: 68bb ldr r3, [r7, #8] 8006afe: 785b ldrb r3, [r3, #1] 8006b00: 2b01 cmp r3, #1 8006b02: d116 bne.n 8006b32 8006b04: 68fb ldr r3, [r7, #12] 8006b06: 681b ldr r3, [r3, #0] 8006b08: 637b str r3, [r7, #52] @ 0x34 8006b0a: 68fb ldr r3, [r7, #12] 8006b0c: 681b ldr r3, [r3, #0] 8006b0e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006b12: b29b uxth r3, r3 8006b14: 461a mov r2, r3 8006b16: 6b7b ldr r3, [r7, #52] @ 0x34 8006b18: 4413 add r3, r2 8006b1a: 637b str r3, [r7, #52] @ 0x34 8006b1c: 68bb ldr r3, [r7, #8] 8006b1e: 781b ldrb r3, [r3, #0] 8006b20: 011a lsls r2, r3, #4 8006b22: 6b7b ldr r3, [r7, #52] @ 0x34 8006b24: 4413 add r3, r2 8006b26: f203 4304 addw r3, r3, #1028 @ 0x404 8006b2a: 633b str r3, [r7, #48] @ 0x30 8006b2c: 6b3b ldr r3, [r7, #48] @ 0x30 8006b2e: 2200 movs r2, #0 8006b30: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8006b32: 68fb ldr r3, [r7, #12] 8006b34: 681b ldr r3, [r3, #0] 8006b36: 627b str r3, [r7, #36] @ 0x24 8006b38: 68bb ldr r3, [r7, #8] 8006b3a: 785b ldrb r3, [r3, #1] 8006b3c: 2b00 cmp r3, #0 8006b3e: d126 bne.n 8006b8e 8006b40: 68fb ldr r3, [r7, #12] 8006b42: 681b ldr r3, [r3, #0] 8006b44: 61fb str r3, [r7, #28] 8006b46: 68fb ldr r3, [r7, #12] 8006b48: 681b ldr r3, [r3, #0] 8006b4a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006b4e: b29b uxth r3, r3 8006b50: 461a mov r2, r3 8006b52: 69fb ldr r3, [r7, #28] 8006b54: 4413 add r3, r2 8006b56: 61fb str r3, [r7, #28] 8006b58: 68bb ldr r3, [r7, #8] 8006b5a: 781b ldrb r3, [r3, #0] 8006b5c: 011a lsls r2, r3, #4 8006b5e: 69fb ldr r3, [r7, #28] 8006b60: 4413 add r3, r2 8006b62: f203 430c addw r3, r3, #1036 @ 0x40c 8006b66: 61bb str r3, [r7, #24] 8006b68: 69bb ldr r3, [r7, #24] 8006b6a: 881b ldrh r3, [r3, #0] 8006b6c: b29b uxth r3, r3 8006b6e: f3c3 0309 ubfx r3, r3, #0, #10 8006b72: b29a uxth r2, r3 8006b74: 69bb ldr r3, [r7, #24] 8006b76: 801a strh r2, [r3, #0] 8006b78: 69bb ldr r3, [r7, #24] 8006b7a: 881b ldrh r3, [r3, #0] 8006b7c: b29b uxth r3, r3 8006b7e: ea6f 4343 mvn.w r3, r3, lsl #17 8006b82: ea6f 4353 mvn.w r3, r3, lsr #17 8006b86: b29a uxth r2, r3 8006b88: 69bb ldr r3, [r7, #24] 8006b8a: 801a strh r2, [r3, #0] 8006b8c: e017 b.n 8006bbe 8006b8e: 68bb ldr r3, [r7, #8] 8006b90: 785b ldrb r3, [r3, #1] 8006b92: 2b01 cmp r3, #1 8006b94: d113 bne.n 8006bbe 8006b96: 68fb ldr r3, [r7, #12] 8006b98: 681b ldr r3, [r3, #0] 8006b9a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006b9e: b29b uxth r3, r3 8006ba0: 461a mov r2, r3 8006ba2: 6a7b ldr r3, [r7, #36] @ 0x24 8006ba4: 4413 add r3, r2 8006ba6: 627b str r3, [r7, #36] @ 0x24 8006ba8: 68bb ldr r3, [r7, #8] 8006baa: 781b ldrb r3, [r3, #0] 8006bac: 011a lsls r2, r3, #4 8006bae: 6a7b ldr r3, [r7, #36] @ 0x24 8006bb0: 4413 add r3, r2 8006bb2: f203 430c addw r3, r3, #1036 @ 0x40c 8006bb6: 623b str r3, [r7, #32] 8006bb8: 6a3b ldr r3, [r7, #32] 8006bba: 2200 movs r2, #0 8006bbc: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8006bbe: 68bb ldr r3, [r7, #8] 8006bc0: 781b ldrb r3, [r3, #0] 8006bc2: 4619 mov r1, r3 8006bc4: 68f8 ldr r0, [r7, #12] 8006bc6: f006 fa90 bl 800d0ea #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8006bca: 88fb ldrh r3, [r7, #6] 8006bcc: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006bd0: 2b00 cmp r3, #0 8006bd2: f000 82fc beq.w 80071ce { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8006bd6: 68fb ldr r3, [r7, #12] 8006bd8: 681b ldr r3, [r3, #0] 8006bda: 461a mov r2, r3 8006bdc: 68bb ldr r3, [r7, #8] 8006bde: 781b ldrb r3, [r3, #0] 8006be0: 009b lsls r3, r3, #2 8006be2: 4413 add r3, r2 8006be4: 881b ldrh r3, [r3, #0] 8006be6: b29b uxth r3, r3 8006be8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006bec: f023 0370 bic.w r3, r3, #112 @ 0x70 8006bf0: 82fb strh r3, [r7, #22] 8006bf2: 68fb ldr r3, [r7, #12] 8006bf4: 681b ldr r3, [r3, #0] 8006bf6: 461a mov r2, r3 8006bf8: 68bb ldr r3, [r7, #8] 8006bfa: 781b ldrb r3, [r3, #0] 8006bfc: 009b lsls r3, r3, #2 8006bfe: 441a add r2, r3 8006c00: 8afb ldrh r3, [r7, #22] 8006c02: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006c06: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006c0a: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006c0e: f043 0380 orr.w r3, r3, #128 @ 0x80 8006c12: b29b uxth r3, r3 8006c14: 8013 strh r3, [r2, #0] 8006c16: e2da b.n 80071ce } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8006c18: 88fb ldrh r3, [r7, #6] 8006c1a: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006c1e: 2b00 cmp r3, #0 8006c20: d021 beq.n 8006c66 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8006c22: 68fb ldr r3, [r7, #12] 8006c24: 681b ldr r3, [r3, #0] 8006c26: 461a mov r2, r3 8006c28: 68bb ldr r3, [r7, #8] 8006c2a: 781b ldrb r3, [r3, #0] 8006c2c: 009b lsls r3, r3, #2 8006c2e: 4413 add r3, r2 8006c30: 881b ldrh r3, [r3, #0] 8006c32: b29b uxth r3, r3 8006c34: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006c38: f023 0370 bic.w r3, r3, #112 @ 0x70 8006c3c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8006c40: 68fb ldr r3, [r7, #12] 8006c42: 681b ldr r3, [r3, #0] 8006c44: 461a mov r2, r3 8006c46: 68bb ldr r3, [r7, #8] 8006c48: 781b ldrb r3, [r3, #0] 8006c4a: 009b lsls r3, r3, #2 8006c4c: 441a add r2, r3 8006c4e: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8006c52: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006c56: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006c5a: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006c5e: f043 0380 orr.w r3, r3, #128 @ 0x80 8006c62: b29b uxth r3, r3 8006c64: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 8006c66: 68bb ldr r3, [r7, #8] 8006c68: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8006c6c: 2b01 cmp r3, #1 8006c6e: f040 82ae bne.w 80071ce { ep->xfer_buff += TxPctSize; 8006c72: 68bb ldr r3, [r7, #8] 8006c74: 695a ldr r2, [r3, #20] 8006c76: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006c7a: 441a add r2, r3 8006c7c: 68bb ldr r3, [r7, #8] 8006c7e: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8006c80: 68bb ldr r3, [r7, #8] 8006c82: 69da ldr r2, [r3, #28] 8006c84: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006c88: 441a add r2, r3 8006c8a: 68bb ldr r3, [r7, #8] 8006c8c: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8006c8e: 68bb ldr r3, [r7, #8] 8006c90: 6a1a ldr r2, [r3, #32] 8006c92: 68bb ldr r3, [r7, #8] 8006c94: 691b ldr r3, [r3, #16] 8006c96: 429a cmp r2, r3 8006c98: d30b bcc.n 8006cb2 { len = ep->maxpacket; 8006c9a: 68bb ldr r3, [r7, #8] 8006c9c: 691b ldr r3, [r3, #16] 8006c9e: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 8006ca2: 68bb ldr r3, [r7, #8] 8006ca4: 6a1a ldr r2, [r3, #32] 8006ca6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006caa: 1ad2 subs r2, r2, r3 8006cac: 68bb ldr r3, [r7, #8] 8006cae: 621a str r2, [r3, #32] 8006cb0: e017 b.n 8006ce2 } else if (ep->xfer_len_db == 0U) 8006cb2: 68bb ldr r3, [r7, #8] 8006cb4: 6a1b ldr r3, [r3, #32] 8006cb6: 2b00 cmp r3, #0 8006cb8: d108 bne.n 8006ccc { len = TxPctSize; 8006cba: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006cbe: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 8006cc2: 68bb ldr r3, [r7, #8] 8006cc4: 2200 movs r2, #0 8006cc6: f883 2024 strb.w r2, [r3, #36] @ 0x24 8006cca: e00a b.n 8006ce2 } else { ep->xfer_fill_db = 0U; 8006ccc: 68bb ldr r3, [r7, #8] 8006cce: 2200 movs r2, #0 8006cd0: f883 2024 strb.w r2, [r3, #36] @ 0x24 len = ep->xfer_len_db; 8006cd4: 68bb ldr r3, [r7, #8] 8006cd6: 6a1b ldr r3, [r3, #32] 8006cd8: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8006cdc: 68bb ldr r3, [r7, #8] 8006cde: 2200 movs r2, #0 8006ce0: 621a str r2, [r3, #32] } /* Write remaining Data to Buffer */ /* Set the Double buffer counter for pma buffer1 */ PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len); 8006ce2: 68bb ldr r3, [r7, #8] 8006ce4: 785b ldrb r3, [r3, #1] 8006ce6: 2b00 cmp r3, #0 8006ce8: d165 bne.n 8006db6 8006cea: 68fb ldr r3, [r7, #12] 8006cec: 681b ldr r3, [r3, #0] 8006cee: 63fb str r3, [r7, #60] @ 0x3c 8006cf0: 68fb ldr r3, [r7, #12] 8006cf2: 681b ldr r3, [r3, #0] 8006cf4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006cf8: b29b uxth r3, r3 8006cfa: 461a mov r2, r3 8006cfc: 6bfb ldr r3, [r7, #60] @ 0x3c 8006cfe: 4413 add r3, r2 8006d00: 63fb str r3, [r7, #60] @ 0x3c 8006d02: 68bb ldr r3, [r7, #8] 8006d04: 781b ldrb r3, [r3, #0] 8006d06: 011a lsls r2, r3, #4 8006d08: 6bfb ldr r3, [r7, #60] @ 0x3c 8006d0a: 4413 add r3, r2 8006d0c: f203 4304 addw r3, r3, #1028 @ 0x404 8006d10: 63bb str r3, [r7, #56] @ 0x38 8006d12: 6bbb ldr r3, [r7, #56] @ 0x38 8006d14: 881b ldrh r3, [r3, #0] 8006d16: b29b uxth r3, r3 8006d18: f3c3 0309 ubfx r3, r3, #0, #10 8006d1c: b29a uxth r2, r3 8006d1e: 6bbb ldr r3, [r7, #56] @ 0x38 8006d20: 801a strh r2, [r3, #0] 8006d22: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006d26: 2b3e cmp r3, #62 @ 0x3e 8006d28: d91d bls.n 8006d66 8006d2a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006d2e: 095b lsrs r3, r3, #5 8006d30: 64bb str r3, [r7, #72] @ 0x48 8006d32: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006d36: f003 031f and.w r3, r3, #31 8006d3a: 2b00 cmp r3, #0 8006d3c: d102 bne.n 8006d44 8006d3e: 6cbb ldr r3, [r7, #72] @ 0x48 8006d40: 3b01 subs r3, #1 8006d42: 64bb str r3, [r7, #72] @ 0x48 8006d44: 6bbb ldr r3, [r7, #56] @ 0x38 8006d46: 881b ldrh r3, [r3, #0] 8006d48: b29a uxth r2, r3 8006d4a: 6cbb ldr r3, [r7, #72] @ 0x48 8006d4c: b29b uxth r3, r3 8006d4e: 029b lsls r3, r3, #10 8006d50: b29b uxth r3, r3 8006d52: 4313 orrs r3, r2 8006d54: b29b uxth r3, r3 8006d56: ea6f 4343 mvn.w r3, r3, lsl #17 8006d5a: ea6f 4353 mvn.w r3, r3, lsr #17 8006d5e: b29a uxth r2, r3 8006d60: 6bbb ldr r3, [r7, #56] @ 0x38 8006d62: 801a strh r2, [r3, #0] 8006d64: e044 b.n 8006df0 8006d66: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006d6a: 2b00 cmp r3, #0 8006d6c: d10a bne.n 8006d84 8006d6e: 6bbb ldr r3, [r7, #56] @ 0x38 8006d70: 881b ldrh r3, [r3, #0] 8006d72: b29b uxth r3, r3 8006d74: ea6f 4343 mvn.w r3, r3, lsl #17 8006d78: ea6f 4353 mvn.w r3, r3, lsr #17 8006d7c: b29a uxth r2, r3 8006d7e: 6bbb ldr r3, [r7, #56] @ 0x38 8006d80: 801a strh r2, [r3, #0] 8006d82: e035 b.n 8006df0 8006d84: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006d88: 085b lsrs r3, r3, #1 8006d8a: 64bb str r3, [r7, #72] @ 0x48 8006d8c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006d90: f003 0301 and.w r3, r3, #1 8006d94: 2b00 cmp r3, #0 8006d96: d002 beq.n 8006d9e 8006d98: 6cbb ldr r3, [r7, #72] @ 0x48 8006d9a: 3301 adds r3, #1 8006d9c: 64bb str r3, [r7, #72] @ 0x48 8006d9e: 6bbb ldr r3, [r7, #56] @ 0x38 8006da0: 881b ldrh r3, [r3, #0] 8006da2: b29a uxth r2, r3 8006da4: 6cbb ldr r3, [r7, #72] @ 0x48 8006da6: b29b uxth r3, r3 8006da8: 029b lsls r3, r3, #10 8006daa: b29b uxth r3, r3 8006dac: 4313 orrs r3, r2 8006dae: b29a uxth r2, r3 8006db0: 6bbb ldr r3, [r7, #56] @ 0x38 8006db2: 801a strh r2, [r3, #0] 8006db4: e01c b.n 8006df0 8006db6: 68bb ldr r3, [r7, #8] 8006db8: 785b ldrb r3, [r3, #1] 8006dba: 2b01 cmp r3, #1 8006dbc: d118 bne.n 8006df0 8006dbe: 68fb ldr r3, [r7, #12] 8006dc0: 681b ldr r3, [r3, #0] 8006dc2: 647b str r3, [r7, #68] @ 0x44 8006dc4: 68fb ldr r3, [r7, #12] 8006dc6: 681b ldr r3, [r3, #0] 8006dc8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006dcc: b29b uxth r3, r3 8006dce: 461a mov r2, r3 8006dd0: 6c7b ldr r3, [r7, #68] @ 0x44 8006dd2: 4413 add r3, r2 8006dd4: 647b str r3, [r7, #68] @ 0x44 8006dd6: 68bb ldr r3, [r7, #8] 8006dd8: 781b ldrb r3, [r3, #0] 8006dda: 011a lsls r2, r3, #4 8006ddc: 6c7b ldr r3, [r7, #68] @ 0x44 8006dde: 4413 add r3, r2 8006de0: f203 4304 addw r3, r3, #1028 @ 0x404 8006de4: 643b str r3, [r7, #64] @ 0x40 8006de6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006dea: b29a uxth r2, r3 8006dec: 6c3b ldr r3, [r7, #64] @ 0x40 8006dee: 801a strh r2, [r3, #0] /* Copy user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len); 8006df0: 68fb ldr r3, [r7, #12] 8006df2: 6818 ldr r0, [r3, #0] 8006df4: 68bb ldr r3, [r7, #8] 8006df6: 6959 ldr r1, [r3, #20] 8006df8: 68bb ldr r3, [r7, #8] 8006dfa: 891a ldrh r2, [r3, #8] 8006dfc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8006e00: b29b uxth r3, r3 8006e02: f004 faae bl 800b362 8006e06: e1e2 b.n 80071ce } } else /* Data Buffer1 ACK received */ { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8006e08: 68fb ldr r3, [r7, #12] 8006e0a: 681b ldr r3, [r3, #0] 8006e0c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006e10: b29b uxth r3, r3 8006e12: 461a mov r2, r3 8006e14: 68bb ldr r3, [r7, #8] 8006e16: 781b ldrb r3, [r3, #0] 8006e18: 00db lsls r3, r3, #3 8006e1a: 4413 add r3, r2 8006e1c: 3306 adds r3, #6 8006e1e: 005b lsls r3, r3, #1 8006e20: 68fa ldr r2, [r7, #12] 8006e22: 6812 ldr r2, [r2, #0] 8006e24: 4413 add r3, r2 8006e26: f503 6380 add.w r3, r3, #1024 @ 0x400 8006e2a: 881b ldrh r3, [r3, #0] 8006e2c: f3c3 0309 ubfx r3, r3, #0, #10 8006e30: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len >= TxPctSize) 8006e34: 68bb ldr r3, [r7, #8] 8006e36: 699a ldr r2, [r3, #24] 8006e38: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006e3c: 429a cmp r2, r3 8006e3e: d307 bcc.n 8006e50 { ep->xfer_len -= TxPctSize; 8006e40: 68bb ldr r3, [r7, #8] 8006e42: 699a ldr r2, [r3, #24] 8006e44: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8006e48: 1ad2 subs r2, r2, r3 8006e4a: 68bb ldr r3, [r7, #8] 8006e4c: 619a str r2, [r3, #24] 8006e4e: e002 b.n 8006e56 } else { ep->xfer_len = 0U; 8006e50: 68bb ldr r3, [r7, #8] 8006e52: 2200 movs r2, #0 8006e54: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 8006e56: 68bb ldr r3, [r7, #8] 8006e58: 699b ldr r3, [r3, #24] 8006e5a: 2b00 cmp r3, #0 8006e5c: f040 80c0 bne.w 8006fe0 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8006e60: 68bb ldr r3, [r7, #8] 8006e62: 785b ldrb r3, [r3, #1] 8006e64: 2b00 cmp r3, #0 8006e66: d126 bne.n 8006eb6 8006e68: 68fb ldr r3, [r7, #12] 8006e6a: 681b ldr r3, [r3, #0] 8006e6c: 67fb str r3, [r7, #124] @ 0x7c 8006e6e: 68fb ldr r3, [r7, #12] 8006e70: 681b ldr r3, [r3, #0] 8006e72: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006e76: b29b uxth r3, r3 8006e78: 461a mov r2, r3 8006e7a: 6ffb ldr r3, [r7, #124] @ 0x7c 8006e7c: 4413 add r3, r2 8006e7e: 67fb str r3, [r7, #124] @ 0x7c 8006e80: 68bb ldr r3, [r7, #8] 8006e82: 781b ldrb r3, [r3, #0] 8006e84: 011a lsls r2, r3, #4 8006e86: 6ffb ldr r3, [r7, #124] @ 0x7c 8006e88: 4413 add r3, r2 8006e8a: f203 4304 addw r3, r3, #1028 @ 0x404 8006e8e: 67bb str r3, [r7, #120] @ 0x78 8006e90: 6fbb ldr r3, [r7, #120] @ 0x78 8006e92: 881b ldrh r3, [r3, #0] 8006e94: b29b uxth r3, r3 8006e96: f3c3 0309 ubfx r3, r3, #0, #10 8006e9a: b29a uxth r2, r3 8006e9c: 6fbb ldr r3, [r7, #120] @ 0x78 8006e9e: 801a strh r2, [r3, #0] 8006ea0: 6fbb ldr r3, [r7, #120] @ 0x78 8006ea2: 881b ldrh r3, [r3, #0] 8006ea4: b29b uxth r3, r3 8006ea6: ea6f 4343 mvn.w r3, r3, lsl #17 8006eaa: ea6f 4353 mvn.w r3, r3, lsr #17 8006eae: b29a uxth r2, r3 8006eb0: 6fbb ldr r3, [r7, #120] @ 0x78 8006eb2: 801a strh r2, [r3, #0] 8006eb4: e01a b.n 8006eec 8006eb6: 68bb ldr r3, [r7, #8] 8006eb8: 785b ldrb r3, [r3, #1] 8006eba: 2b01 cmp r3, #1 8006ebc: d116 bne.n 8006eec 8006ebe: 68fb ldr r3, [r7, #12] 8006ec0: 681b ldr r3, [r3, #0] 8006ec2: 667b str r3, [r7, #100] @ 0x64 8006ec4: 68fb ldr r3, [r7, #12] 8006ec6: 681b ldr r3, [r3, #0] 8006ec8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006ecc: b29b uxth r3, r3 8006ece: 461a mov r2, r3 8006ed0: 6e7b ldr r3, [r7, #100] @ 0x64 8006ed2: 4413 add r3, r2 8006ed4: 667b str r3, [r7, #100] @ 0x64 8006ed6: 68bb ldr r3, [r7, #8] 8006ed8: 781b ldrb r3, [r3, #0] 8006eda: 011a lsls r2, r3, #4 8006edc: 6e7b ldr r3, [r7, #100] @ 0x64 8006ede: 4413 add r3, r2 8006ee0: f203 4304 addw r3, r3, #1028 @ 0x404 8006ee4: 663b str r3, [r7, #96] @ 0x60 8006ee6: 6e3b ldr r3, [r7, #96] @ 0x60 8006ee8: 2200 movs r2, #0 8006eea: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8006eec: 68fb ldr r3, [r7, #12] 8006eee: 681b ldr r3, [r3, #0] 8006ef0: 677b str r3, [r7, #116] @ 0x74 8006ef2: 68bb ldr r3, [r7, #8] 8006ef4: 785b ldrb r3, [r3, #1] 8006ef6: 2b00 cmp r3, #0 8006ef8: d12b bne.n 8006f52 8006efa: 68fb ldr r3, [r7, #12] 8006efc: 681b ldr r3, [r3, #0] 8006efe: 66fb str r3, [r7, #108] @ 0x6c 8006f00: 68fb ldr r3, [r7, #12] 8006f02: 681b ldr r3, [r3, #0] 8006f04: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006f08: b29b uxth r3, r3 8006f0a: 461a mov r2, r3 8006f0c: 6efb ldr r3, [r7, #108] @ 0x6c 8006f0e: 4413 add r3, r2 8006f10: 66fb str r3, [r7, #108] @ 0x6c 8006f12: 68bb ldr r3, [r7, #8] 8006f14: 781b ldrb r3, [r3, #0] 8006f16: 011a lsls r2, r3, #4 8006f18: 6efb ldr r3, [r7, #108] @ 0x6c 8006f1a: 4413 add r3, r2 8006f1c: f203 430c addw r3, r3, #1036 @ 0x40c 8006f20: f8c7 3080 str.w r3, [r7, #128] @ 0x80 8006f24: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8006f28: 881b ldrh r3, [r3, #0] 8006f2a: b29b uxth r3, r3 8006f2c: f3c3 0309 ubfx r3, r3, #0, #10 8006f30: b29a uxth r2, r3 8006f32: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8006f36: 801a strh r2, [r3, #0] 8006f38: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8006f3c: 881b ldrh r3, [r3, #0] 8006f3e: b29b uxth r3, r3 8006f40: ea6f 4343 mvn.w r3, r3, lsl #17 8006f44: ea6f 4353 mvn.w r3, r3, lsr #17 8006f48: b29a uxth r2, r3 8006f4a: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8006f4e: 801a strh r2, [r3, #0] 8006f50: e017 b.n 8006f82 8006f52: 68bb ldr r3, [r7, #8] 8006f54: 785b ldrb r3, [r3, #1] 8006f56: 2b01 cmp r3, #1 8006f58: d113 bne.n 8006f82 8006f5a: 68fb ldr r3, [r7, #12] 8006f5c: 681b ldr r3, [r3, #0] 8006f5e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8006f62: b29b uxth r3, r3 8006f64: 461a mov r2, r3 8006f66: 6f7b ldr r3, [r7, #116] @ 0x74 8006f68: 4413 add r3, r2 8006f6a: 677b str r3, [r7, #116] @ 0x74 8006f6c: 68bb ldr r3, [r7, #8] 8006f6e: 781b ldrb r3, [r3, #0] 8006f70: 011a lsls r2, r3, #4 8006f72: 6f7b ldr r3, [r7, #116] @ 0x74 8006f74: 4413 add r3, r2 8006f76: f203 430c addw r3, r3, #1036 @ 0x40c 8006f7a: 673b str r3, [r7, #112] @ 0x70 8006f7c: 6f3b ldr r3, [r7, #112] @ 0x70 8006f7e: 2200 movs r2, #0 8006f80: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8006f82: 68bb ldr r3, [r7, #8] 8006f84: 781b ldrb r3, [r3, #0] 8006f86: 4619 mov r1, r3 8006f88: 68f8 ldr r0, [r7, #12] 8006f8a: f006 f8ae bl 800d0ea #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8006f8e: 88fb ldrh r3, [r7, #6] 8006f90: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006f94: 2b00 cmp r3, #0 8006f96: f040 811a bne.w 80071ce { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8006f9a: 68fb ldr r3, [r7, #12] 8006f9c: 681b ldr r3, [r3, #0] 8006f9e: 461a mov r2, r3 8006fa0: 68bb ldr r3, [r7, #8] 8006fa2: 781b ldrb r3, [r3, #0] 8006fa4: 009b lsls r3, r3, #2 8006fa6: 4413 add r3, r2 8006fa8: 881b ldrh r3, [r3, #0] 8006faa: b29b uxth r3, r3 8006fac: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006fb0: f023 0370 bic.w r3, r3, #112 @ 0x70 8006fb4: f8a7 3088 strh.w r3, [r7, #136] @ 0x88 8006fb8: 68fb ldr r3, [r7, #12] 8006fba: 681b ldr r3, [r3, #0] 8006fbc: 461a mov r2, r3 8006fbe: 68bb ldr r3, [r7, #8] 8006fc0: 781b ldrb r3, [r3, #0] 8006fc2: 009b lsls r3, r3, #2 8006fc4: 441a add r2, r3 8006fc6: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88 8006fca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006fce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006fd2: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8006fd6: f043 0380 orr.w r3, r3, #128 @ 0x80 8006fda: b29b uxth r3, r3 8006fdc: 8013 strh r3, [r2, #0] 8006fde: e0f6 b.n 80071ce } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8006fe0: 88fb ldrh r3, [r7, #6] 8006fe2: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006fe6: 2b00 cmp r3, #0 8006fe8: d121 bne.n 800702e { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8006fea: 68fb ldr r3, [r7, #12] 8006fec: 681b ldr r3, [r3, #0] 8006fee: 461a mov r2, r3 8006ff0: 68bb ldr r3, [r7, #8] 8006ff2: 781b ldrb r3, [r3, #0] 8006ff4: 009b lsls r3, r3, #2 8006ff6: 4413 add r3, r2 8006ff8: 881b ldrh r3, [r3, #0] 8006ffa: b29b uxth r3, r3 8006ffc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007000: f023 0370 bic.w r3, r3, #112 @ 0x70 8007004: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 8007008: 68fb ldr r3, [r7, #12] 800700a: 681b ldr r3, [r3, #0] 800700c: 461a mov r2, r3 800700e: 68bb ldr r3, [r7, #8] 8007010: 781b ldrb r3, [r3, #0] 8007012: 009b lsls r3, r3, #2 8007014: 441a add r2, r3 8007016: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 800701a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800701e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007022: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007026: f043 0380 orr.w r3, r3, #128 @ 0x80 800702a: b29b uxth r3, r3 800702c: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 800702e: 68bb ldr r3, [r7, #8] 8007030: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8007034: 2b01 cmp r3, #1 8007036: f040 80ca bne.w 80071ce { ep->xfer_buff += TxPctSize; 800703a: 68bb ldr r3, [r7, #8] 800703c: 695a ldr r2, [r3, #20] 800703e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007042: 441a add r2, r3 8007044: 68bb ldr r3, [r7, #8] 8007046: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8007048: 68bb ldr r3, [r7, #8] 800704a: 69da ldr r2, [r3, #28] 800704c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007050: 441a add r2, r3 8007052: 68bb ldr r3, [r7, #8] 8007054: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8007056: 68bb ldr r3, [r7, #8] 8007058: 6a1a ldr r2, [r3, #32] 800705a: 68bb ldr r3, [r7, #8] 800705c: 691b ldr r3, [r3, #16] 800705e: 429a cmp r2, r3 8007060: d30b bcc.n 800707a { len = ep->maxpacket; 8007062: 68bb ldr r3, [r7, #8] 8007064: 691b ldr r3, [r3, #16] 8007066: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 800706a: 68bb ldr r3, [r7, #8] 800706c: 6a1a ldr r2, [r3, #32] 800706e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007072: 1ad2 subs r2, r2, r3 8007074: 68bb ldr r3, [r7, #8] 8007076: 621a str r2, [r3, #32] 8007078: e017 b.n 80070aa } else if (ep->xfer_len_db == 0U) 800707a: 68bb ldr r3, [r7, #8] 800707c: 6a1b ldr r3, [r3, #32] 800707e: 2b00 cmp r3, #0 8007080: d108 bne.n 8007094 { len = TxPctSize; 8007082: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8007086: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 800708a: 68bb ldr r3, [r7, #8] 800708c: 2200 movs r2, #0 800708e: f883 2024 strb.w r2, [r3, #36] @ 0x24 8007092: e00a b.n 80070aa } else { len = ep->xfer_len_db; 8007094: 68bb ldr r3, [r7, #8] 8007096: 6a1b ldr r3, [r3, #32] 8007098: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 800709c: 68bb ldr r3, [r7, #8] 800709e: 2200 movs r2, #0 80070a0: 621a str r2, [r3, #32] ep->xfer_fill_db = 0; 80070a2: 68bb ldr r3, [r7, #8] 80070a4: 2200 movs r2, #0 80070a6: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len); 80070aa: 68fb ldr r3, [r7, #12] 80070ac: 681b ldr r3, [r3, #0] 80070ae: 657b str r3, [r7, #84] @ 0x54 80070b0: 68bb ldr r3, [r7, #8] 80070b2: 785b ldrb r3, [r3, #1] 80070b4: 2b00 cmp r3, #0 80070b6: d165 bne.n 8007184 80070b8: 68fb ldr r3, [r7, #12] 80070ba: 681b ldr r3, [r3, #0] 80070bc: 65fb str r3, [r7, #92] @ 0x5c 80070be: 68fb ldr r3, [r7, #12] 80070c0: 681b ldr r3, [r3, #0] 80070c2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80070c6: b29b uxth r3, r3 80070c8: 461a mov r2, r3 80070ca: 6dfb ldr r3, [r7, #92] @ 0x5c 80070cc: 4413 add r3, r2 80070ce: 65fb str r3, [r7, #92] @ 0x5c 80070d0: 68bb ldr r3, [r7, #8] 80070d2: 781b ldrb r3, [r3, #0] 80070d4: 011a lsls r2, r3, #4 80070d6: 6dfb ldr r3, [r7, #92] @ 0x5c 80070d8: 4413 add r3, r2 80070da: f203 430c addw r3, r3, #1036 @ 0x40c 80070de: 65bb str r3, [r7, #88] @ 0x58 80070e0: 6dbb ldr r3, [r7, #88] @ 0x58 80070e2: 881b ldrh r3, [r3, #0] 80070e4: b29b uxth r3, r3 80070e6: f3c3 0309 ubfx r3, r3, #0, #10 80070ea: b29a uxth r2, r3 80070ec: 6dbb ldr r3, [r7, #88] @ 0x58 80070ee: 801a strh r2, [r3, #0] 80070f0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80070f4: 2b3e cmp r3, #62 @ 0x3e 80070f6: d91d bls.n 8007134 80070f8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80070fc: 095b lsrs r3, r3, #5 80070fe: 66bb str r3, [r7, #104] @ 0x68 8007100: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007104: f003 031f and.w r3, r3, #31 8007108: 2b00 cmp r3, #0 800710a: d102 bne.n 8007112 800710c: 6ebb ldr r3, [r7, #104] @ 0x68 800710e: 3b01 subs r3, #1 8007110: 66bb str r3, [r7, #104] @ 0x68 8007112: 6dbb ldr r3, [r7, #88] @ 0x58 8007114: 881b ldrh r3, [r3, #0] 8007116: b29a uxth r2, r3 8007118: 6ebb ldr r3, [r7, #104] @ 0x68 800711a: b29b uxth r3, r3 800711c: 029b lsls r3, r3, #10 800711e: b29b uxth r3, r3 8007120: 4313 orrs r3, r2 8007122: b29b uxth r3, r3 8007124: ea6f 4343 mvn.w r3, r3, lsl #17 8007128: ea6f 4353 mvn.w r3, r3, lsr #17 800712c: b29a uxth r2, r3 800712e: 6dbb ldr r3, [r7, #88] @ 0x58 8007130: 801a strh r2, [r3, #0] 8007132: e041 b.n 80071b8 8007134: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007138: 2b00 cmp r3, #0 800713a: d10a bne.n 8007152 800713c: 6dbb ldr r3, [r7, #88] @ 0x58 800713e: 881b ldrh r3, [r3, #0] 8007140: b29b uxth r3, r3 8007142: ea6f 4343 mvn.w r3, r3, lsl #17 8007146: ea6f 4353 mvn.w r3, r3, lsr #17 800714a: b29a uxth r2, r3 800714c: 6dbb ldr r3, [r7, #88] @ 0x58 800714e: 801a strh r2, [r3, #0] 8007150: e032 b.n 80071b8 8007152: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8007156: 085b lsrs r3, r3, #1 8007158: 66bb str r3, [r7, #104] @ 0x68 800715a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800715e: f003 0301 and.w r3, r3, #1 8007162: 2b00 cmp r3, #0 8007164: d002 beq.n 800716c 8007166: 6ebb ldr r3, [r7, #104] @ 0x68 8007168: 3301 adds r3, #1 800716a: 66bb str r3, [r7, #104] @ 0x68 800716c: 6dbb ldr r3, [r7, #88] @ 0x58 800716e: 881b ldrh r3, [r3, #0] 8007170: b29a uxth r2, r3 8007172: 6ebb ldr r3, [r7, #104] @ 0x68 8007174: b29b uxth r3, r3 8007176: 029b lsls r3, r3, #10 8007178: b29b uxth r3, r3 800717a: 4313 orrs r3, r2 800717c: b29a uxth r2, r3 800717e: 6dbb ldr r3, [r7, #88] @ 0x58 8007180: 801a strh r2, [r3, #0] 8007182: e019 b.n 80071b8 8007184: 68bb ldr r3, [r7, #8] 8007186: 785b ldrb r3, [r3, #1] 8007188: 2b01 cmp r3, #1 800718a: d115 bne.n 80071b8 800718c: 68fb ldr r3, [r7, #12] 800718e: 681b ldr r3, [r3, #0] 8007190: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007194: b29b uxth r3, r3 8007196: 461a mov r2, r3 8007198: 6d7b ldr r3, [r7, #84] @ 0x54 800719a: 4413 add r3, r2 800719c: 657b str r3, [r7, #84] @ 0x54 800719e: 68bb ldr r3, [r7, #8] 80071a0: 781b ldrb r3, [r3, #0] 80071a2: 011a lsls r2, r3, #4 80071a4: 6d7b ldr r3, [r7, #84] @ 0x54 80071a6: 4413 add r3, r2 80071a8: f203 430c addw r3, r3, #1036 @ 0x40c 80071ac: 653b str r3, [r7, #80] @ 0x50 80071ae: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80071b2: b29a uxth r2, r3 80071b4: 6d3b ldr r3, [r7, #80] @ 0x50 80071b6: 801a strh r2, [r3, #0] /* Copy the user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len); 80071b8: 68fb ldr r3, [r7, #12] 80071ba: 6818 ldr r0, [r3, #0] 80071bc: 68bb ldr r3, [r7, #8] 80071be: 6959 ldr r1, [r3, #20] 80071c0: 68bb ldr r3, [r7, #8] 80071c2: 895a ldrh r2, [r3, #10] 80071c4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80071c8: b29b uxth r3, r3 80071ca: f004 f8ca bl 800b362 } } } /*enable endpoint IN*/ PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID); 80071ce: 68fb ldr r3, [r7, #12] 80071d0: 681b ldr r3, [r3, #0] 80071d2: 461a mov r2, r3 80071d4: 68bb ldr r3, [r7, #8] 80071d6: 781b ldrb r3, [r3, #0] 80071d8: 009b lsls r3, r3, #2 80071da: 4413 add r3, r2 80071dc: 881b ldrh r3, [r3, #0] 80071de: b29b uxth r3, r3 80071e0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80071e4: f023 0340 bic.w r3, r3, #64 @ 0x40 80071e8: 82bb strh r3, [r7, #20] 80071ea: 8abb ldrh r3, [r7, #20] 80071ec: f083 0310 eor.w r3, r3, #16 80071f0: 82bb strh r3, [r7, #20] 80071f2: 8abb ldrh r3, [r7, #20] 80071f4: f083 0320 eor.w r3, r3, #32 80071f8: 82bb strh r3, [r7, #20] 80071fa: 68fb ldr r3, [r7, #12] 80071fc: 681b ldr r3, [r3, #0] 80071fe: 461a mov r2, r3 8007200: 68bb ldr r3, [r7, #8] 8007202: 781b ldrb r3, [r3, #0] 8007204: 009b lsls r3, r3, #2 8007206: 441a add r2, r3 8007208: 8abb ldrh r3, [r7, #20] 800720a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800720e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007212: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007216: f043 0380 orr.w r3, r3, #128 @ 0x80 800721a: b29b uxth r3, r3 800721c: 8013 strh r3, [r2, #0] return HAL_OK; 800721e: 2300 movs r3, #0 } 8007220: 4618 mov r0, r3 8007222: 3790 adds r7, #144 @ 0x90 8007224: 46bd mov sp, r7 8007226: bd80 pop {r7, pc} 08007228 : * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, uint16_t ep_kind, uint32_t pmaadress) { 8007228: b480 push {r7} 800722a: b087 sub sp, #28 800722c: af00 add r7, sp, #0 800722e: 60f8 str r0, [r7, #12] 8007230: 607b str r3, [r7, #4] 8007232: 460b mov r3, r1 8007234: 817b strh r3, [r7, #10] 8007236: 4613 mov r3, r2 8007238: 813b strh r3, [r7, #8] PCD_EPTypeDef *ep; /* initialize ep structure*/ if ((0x80U & ep_addr) == 0x80U) 800723a: 897b ldrh r3, [r7, #10] 800723c: f003 0380 and.w r3, r3, #128 @ 0x80 8007240: b29b uxth r3, r3 8007242: 2b00 cmp r3, #0 8007244: d00b beq.n 800725e { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8007246: 897b ldrh r3, [r7, #10] 8007248: f003 0207 and.w r2, r3, #7 800724c: 4613 mov r3, r2 800724e: 009b lsls r3, r3, #2 8007250: 4413 add r3, r2 8007252: 00db lsls r3, r3, #3 8007254: 3310 adds r3, #16 8007256: 68fa ldr r2, [r7, #12] 8007258: 4413 add r3, r2 800725a: 617b str r3, [r7, #20] 800725c: e009 b.n 8007272 } else { ep = &hpcd->OUT_ep[ep_addr]; 800725e: 897a ldrh r2, [r7, #10] 8007260: 4613 mov r3, r2 8007262: 009b lsls r3, r3, #2 8007264: 4413 add r3, r2 8007266: 00db lsls r3, r3, #3 8007268: f503 73a8 add.w r3, r3, #336 @ 0x150 800726c: 68fa ldr r2, [r7, #12] 800726e: 4413 add r3, r2 8007270: 617b str r3, [r7, #20] } /* Here we check if the endpoint is single or double Buffer*/ if (ep_kind == PCD_SNG_BUF) 8007272: 893b ldrh r3, [r7, #8] 8007274: 2b00 cmp r3, #0 8007276: d107 bne.n 8007288 { /* Single Buffer */ ep->doublebuffer = 0U; 8007278: 697b ldr r3, [r7, #20] 800727a: 2200 movs r2, #0 800727c: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaadress = (uint16_t)pmaadress; 800727e: 687b ldr r3, [r7, #4] 8007280: b29a uxth r2, r3 8007282: 697b ldr r3, [r7, #20] 8007284: 80da strh r2, [r3, #6] 8007286: e00b b.n 80072a0 } #if (USE_USB_DOUBLE_BUFFER == 1U) else /* USB_DBL_BUF */ { /* Double Buffer Endpoint */ ep->doublebuffer = 1U; 8007288: 697b ldr r3, [r7, #20] 800728a: 2201 movs r2, #1 800728c: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 800728e: 687b ldr r3, [r7, #4] 8007290: b29a uxth r2, r3 8007292: 697b ldr r3, [r7, #20] 8007294: 811a strh r2, [r3, #8] ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 8007296: 687b ldr r3, [r7, #4] 8007298: 0c1b lsrs r3, r3, #16 800729a: b29a uxth r2, r3 800729c: 697b ldr r3, [r7, #20] 800729e: 815a strh r2, [r3, #10] } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 80072a0: 2300 movs r3, #0 } 80072a2: 4618 mov r0, r3 80072a4: 371c adds r7, #28 80072a6: 46bd mov sp, r7 80072a8: bc80 pop {r7} 80072aa: 4770 bx lr 080072ac : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 80072ac: b580 push {r7, lr} 80072ae: b086 sub sp, #24 80072b0: af00 add r7, sp, #0 80072b2: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 80072b4: 687b ldr r3, [r7, #4] 80072b6: 2b00 cmp r3, #0 80072b8: d101 bne.n 80072be { return HAL_ERROR; 80072ba: 2301 movs r3, #1 80072bc: e272 b.n 80077a4 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 80072be: 687b ldr r3, [r7, #4] 80072c0: 681b ldr r3, [r3, #0] 80072c2: f003 0301 and.w r3, r3, #1 80072c6: 2b00 cmp r3, #0 80072c8: f000 8087 beq.w 80073da { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 80072cc: 4b92 ldr r3, [pc, #584] @ (8007518 ) 80072ce: 685b ldr r3, [r3, #4] 80072d0: f003 030c and.w r3, r3, #12 80072d4: 2b04 cmp r3, #4 80072d6: d00c beq.n 80072f2 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 80072d8: 4b8f ldr r3, [pc, #572] @ (8007518 ) 80072da: 685b ldr r3, [r3, #4] 80072dc: f003 030c and.w r3, r3, #12 80072e0: 2b08 cmp r3, #8 80072e2: d112 bne.n 800730a 80072e4: 4b8c ldr r3, [pc, #560] @ (8007518 ) 80072e6: 685b ldr r3, [r3, #4] 80072e8: f403 3380 and.w r3, r3, #65536 @ 0x10000 80072ec: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 80072f0: d10b bne.n 800730a { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80072f2: 4b89 ldr r3, [pc, #548] @ (8007518 ) 80072f4: 681b ldr r3, [r3, #0] 80072f6: f403 3300 and.w r3, r3, #131072 @ 0x20000 80072fa: 2b00 cmp r3, #0 80072fc: d06c beq.n 80073d8 80072fe: 687b ldr r3, [r7, #4] 8007300: 685b ldr r3, [r3, #4] 8007302: 2b00 cmp r3, #0 8007304: d168 bne.n 80073d8 { return HAL_ERROR; 8007306: 2301 movs r3, #1 8007308: e24c b.n 80077a4 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800730a: 687b ldr r3, [r7, #4] 800730c: 685b ldr r3, [r3, #4] 800730e: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8007312: d106 bne.n 8007322 8007314: 4b80 ldr r3, [pc, #512] @ (8007518 ) 8007316: 681b ldr r3, [r3, #0] 8007318: 4a7f ldr r2, [pc, #508] @ (8007518 ) 800731a: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800731e: 6013 str r3, [r2, #0] 8007320: e02e b.n 8007380 8007322: 687b ldr r3, [r7, #4] 8007324: 685b ldr r3, [r3, #4] 8007326: 2b00 cmp r3, #0 8007328: d10c bne.n 8007344 800732a: 4b7b ldr r3, [pc, #492] @ (8007518 ) 800732c: 681b ldr r3, [r3, #0] 800732e: 4a7a ldr r2, [pc, #488] @ (8007518 ) 8007330: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8007334: 6013 str r3, [r2, #0] 8007336: 4b78 ldr r3, [pc, #480] @ (8007518 ) 8007338: 681b ldr r3, [r3, #0] 800733a: 4a77 ldr r2, [pc, #476] @ (8007518 ) 800733c: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8007340: 6013 str r3, [r2, #0] 8007342: e01d b.n 8007380 8007344: 687b ldr r3, [r7, #4] 8007346: 685b ldr r3, [r3, #4] 8007348: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 800734c: d10c bne.n 8007368 800734e: 4b72 ldr r3, [pc, #456] @ (8007518 ) 8007350: 681b ldr r3, [r3, #0] 8007352: 4a71 ldr r2, [pc, #452] @ (8007518 ) 8007354: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8007358: 6013 str r3, [r2, #0] 800735a: 4b6f ldr r3, [pc, #444] @ (8007518 ) 800735c: 681b ldr r3, [r3, #0] 800735e: 4a6e ldr r2, [pc, #440] @ (8007518 ) 8007360: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8007364: 6013 str r3, [r2, #0] 8007366: e00b b.n 8007380 8007368: 4b6b ldr r3, [pc, #428] @ (8007518 ) 800736a: 681b ldr r3, [r3, #0] 800736c: 4a6a ldr r2, [pc, #424] @ (8007518 ) 800736e: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8007372: 6013 str r3, [r2, #0] 8007374: 4b68 ldr r3, [pc, #416] @ (8007518 ) 8007376: 681b ldr r3, [r3, #0] 8007378: 4a67 ldr r2, [pc, #412] @ (8007518 ) 800737a: f423 2380 bic.w r3, r3, #262144 @ 0x40000 800737e: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 8007380: 687b ldr r3, [r7, #4] 8007382: 685b ldr r3, [r3, #4] 8007384: 2b00 cmp r3, #0 8007386: d013 beq.n 80073b0 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8007388: f7fc ff8c bl 80042a4 800738c: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800738e: e008 b.n 80073a2 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8007390: f7fc ff88 bl 80042a4 8007394: 4602 mov r2, r0 8007396: 693b ldr r3, [r7, #16] 8007398: 1ad3 subs r3, r2, r3 800739a: 2b64 cmp r3, #100 @ 0x64 800739c: d901 bls.n 80073a2 { return HAL_TIMEOUT; 800739e: 2303 movs r3, #3 80073a0: e200 b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80073a2: 4b5d ldr r3, [pc, #372] @ (8007518 ) 80073a4: 681b ldr r3, [r3, #0] 80073a6: f403 3300 and.w r3, r3, #131072 @ 0x20000 80073aa: 2b00 cmp r3, #0 80073ac: d0f0 beq.n 8007390 80073ae: e014 b.n 80073da } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80073b0: f7fc ff78 bl 80042a4 80073b4: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 80073b6: e008 b.n 80073ca { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 80073b8: f7fc ff74 bl 80042a4 80073bc: 4602 mov r2, r0 80073be: 693b ldr r3, [r7, #16] 80073c0: 1ad3 subs r3, r2, r3 80073c2: 2b64 cmp r3, #100 @ 0x64 80073c4: d901 bls.n 80073ca { return HAL_TIMEOUT; 80073c6: 2303 movs r3, #3 80073c8: e1ec b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 80073ca: 4b53 ldr r3, [pc, #332] @ (8007518 ) 80073cc: 681b ldr r3, [r3, #0] 80073ce: f403 3300 and.w r3, r3, #131072 @ 0x20000 80073d2: 2b00 cmp r3, #0 80073d4: d1f0 bne.n 80073b8 80073d6: e000 b.n 80073da if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80073d8: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 80073da: 687b ldr r3, [r7, #4] 80073dc: 681b ldr r3, [r3, #0] 80073de: f003 0302 and.w r3, r3, #2 80073e2: 2b00 cmp r3, #0 80073e4: d063 beq.n 80074ae /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80073e6: 4b4c ldr r3, [pc, #304] @ (8007518 ) 80073e8: 685b ldr r3, [r3, #4] 80073ea: f003 030c and.w r3, r3, #12 80073ee: 2b00 cmp r3, #0 80073f0: d00b beq.n 800740a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 80073f2: 4b49 ldr r3, [pc, #292] @ (8007518 ) 80073f4: 685b ldr r3, [r3, #4] 80073f6: f003 030c and.w r3, r3, #12 80073fa: 2b08 cmp r3, #8 80073fc: d11c bne.n 8007438 80073fe: 4b46 ldr r3, [pc, #280] @ (8007518 ) 8007400: 685b ldr r3, [r3, #4] 8007402: f403 3380 and.w r3, r3, #65536 @ 0x10000 8007406: 2b00 cmp r3, #0 8007408: d116 bne.n 8007438 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800740a: 4b43 ldr r3, [pc, #268] @ (8007518 ) 800740c: 681b ldr r3, [r3, #0] 800740e: f003 0302 and.w r3, r3, #2 8007412: 2b00 cmp r3, #0 8007414: d005 beq.n 8007422 8007416: 687b ldr r3, [r7, #4] 8007418: 691b ldr r3, [r3, #16] 800741a: 2b01 cmp r3, #1 800741c: d001 beq.n 8007422 { return HAL_ERROR; 800741e: 2301 movs r3, #1 8007420: e1c0 b.n 80077a4 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8007422: 4b3d ldr r3, [pc, #244] @ (8007518 ) 8007424: 681b ldr r3, [r3, #0] 8007426: f023 02f8 bic.w r2, r3, #248 @ 0xf8 800742a: 687b ldr r3, [r7, #4] 800742c: 695b ldr r3, [r3, #20] 800742e: 00db lsls r3, r3, #3 8007430: 4939 ldr r1, [pc, #228] @ (8007518 ) 8007432: 4313 orrs r3, r2 8007434: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8007436: e03a b.n 80074ae } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8007438: 687b ldr r3, [r7, #4] 800743a: 691b ldr r3, [r3, #16] 800743c: 2b00 cmp r3, #0 800743e: d020 beq.n 8007482 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 8007440: 4b36 ldr r3, [pc, #216] @ (800751c ) 8007442: 2201 movs r2, #1 8007444: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007446: f7fc ff2d bl 80042a4 800744a: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800744c: e008 b.n 8007460 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 800744e: f7fc ff29 bl 80042a4 8007452: 4602 mov r2, r0 8007454: 693b ldr r3, [r7, #16] 8007456: 1ad3 subs r3, r2, r3 8007458: 2b02 cmp r3, #2 800745a: d901 bls.n 8007460 { return HAL_TIMEOUT; 800745c: 2303 movs r3, #3 800745e: e1a1 b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8007460: 4b2d ldr r3, [pc, #180] @ (8007518 ) 8007462: 681b ldr r3, [r3, #0] 8007464: f003 0302 and.w r3, r3, #2 8007468: 2b00 cmp r3, #0 800746a: d0f0 beq.n 800744e } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 800746c: 4b2a ldr r3, [pc, #168] @ (8007518 ) 800746e: 681b ldr r3, [r3, #0] 8007470: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8007474: 687b ldr r3, [r7, #4] 8007476: 695b ldr r3, [r3, #20] 8007478: 00db lsls r3, r3, #3 800747a: 4927 ldr r1, [pc, #156] @ (8007518 ) 800747c: 4313 orrs r3, r2 800747e: 600b str r3, [r1, #0] 8007480: e015 b.n 80074ae } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 8007482: 4b26 ldr r3, [pc, #152] @ (800751c ) 8007484: 2200 movs r2, #0 8007486: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8007488: f7fc ff0c bl 80042a4 800748c: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800748e: e008 b.n 80074a2 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8007490: f7fc ff08 bl 80042a4 8007494: 4602 mov r2, r0 8007496: 693b ldr r3, [r7, #16] 8007498: 1ad3 subs r3, r2, r3 800749a: 2b02 cmp r3, #2 800749c: d901 bls.n 80074a2 { return HAL_TIMEOUT; 800749e: 2303 movs r3, #3 80074a0: e180 b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80074a2: 4b1d ldr r3, [pc, #116] @ (8007518 ) 80074a4: 681b ldr r3, [r3, #0] 80074a6: f003 0302 and.w r3, r3, #2 80074aa: 2b00 cmp r3, #0 80074ac: d1f0 bne.n 8007490 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 80074ae: 687b ldr r3, [r7, #4] 80074b0: 681b ldr r3, [r3, #0] 80074b2: f003 0308 and.w r3, r3, #8 80074b6: 2b00 cmp r3, #0 80074b8: d03a beq.n 8007530 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 80074ba: 687b ldr r3, [r7, #4] 80074bc: 699b ldr r3, [r3, #24] 80074be: 2b00 cmp r3, #0 80074c0: d019 beq.n 80074f6 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 80074c2: 4b17 ldr r3, [pc, #92] @ (8007520 ) 80074c4: 2201 movs r2, #1 80074c6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80074c8: f7fc feec bl 80042a4 80074cc: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80074ce: e008 b.n 80074e2 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 80074d0: f7fc fee8 bl 80042a4 80074d4: 4602 mov r2, r0 80074d6: 693b ldr r3, [r7, #16] 80074d8: 1ad3 subs r3, r2, r3 80074da: 2b02 cmp r3, #2 80074dc: d901 bls.n 80074e2 { return HAL_TIMEOUT; 80074de: 2303 movs r3, #3 80074e0: e160 b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80074e2: 4b0d ldr r3, [pc, #52] @ (8007518 ) 80074e4: 6a5b ldr r3, [r3, #36] @ 0x24 80074e6: f003 0302 and.w r3, r3, #2 80074ea: 2b00 cmp r3, #0 80074ec: d0f0 beq.n 80074d0 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 80074ee: 2001 movs r0, #1 80074f0: f000 fad0 bl 8007a94 80074f4: e01c b.n 8007530 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 80074f6: 4b0a ldr r3, [pc, #40] @ (8007520 ) 80074f8: 2200 movs r2, #0 80074fa: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80074fc: f7fc fed2 bl 80042a4 8007500: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8007502: e00f b.n 8007524 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8007504: f7fc fece bl 80042a4 8007508: 4602 mov r2, r0 800750a: 693b ldr r3, [r7, #16] 800750c: 1ad3 subs r3, r2, r3 800750e: 2b02 cmp r3, #2 8007510: d908 bls.n 8007524 { return HAL_TIMEOUT; 8007512: 2303 movs r3, #3 8007514: e146 b.n 80077a4 8007516: bf00 nop 8007518: 40021000 .word 0x40021000 800751c: 42420000 .word 0x42420000 8007520: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8007524: 4b92 ldr r3, [pc, #584] @ (8007770 ) 8007526: 6a5b ldr r3, [r3, #36] @ 0x24 8007528: f003 0302 and.w r3, r3, #2 800752c: 2b00 cmp r3, #0 800752e: d1e9 bne.n 8007504 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8007530: 687b ldr r3, [r7, #4] 8007532: 681b ldr r3, [r3, #0] 8007534: f003 0304 and.w r3, r3, #4 8007538: 2b00 cmp r3, #0 800753a: f000 80a6 beq.w 800768a { FlagStatus pwrclkchanged = RESET; 800753e: 2300 movs r3, #0 8007540: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8007542: 4b8b ldr r3, [pc, #556] @ (8007770 ) 8007544: 69db ldr r3, [r3, #28] 8007546: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800754a: 2b00 cmp r3, #0 800754c: d10d bne.n 800756a { __HAL_RCC_PWR_CLK_ENABLE(); 800754e: 4b88 ldr r3, [pc, #544] @ (8007770 ) 8007550: 69db ldr r3, [r3, #28] 8007552: 4a87 ldr r2, [pc, #540] @ (8007770 ) 8007554: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8007558: 61d3 str r3, [r2, #28] 800755a: 4b85 ldr r3, [pc, #532] @ (8007770 ) 800755c: 69db ldr r3, [r3, #28] 800755e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8007562: 60bb str r3, [r7, #8] 8007564: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8007566: 2301 movs r3, #1 8007568: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800756a: 4b82 ldr r3, [pc, #520] @ (8007774 ) 800756c: 681b ldr r3, [r3, #0] 800756e: f403 7380 and.w r3, r3, #256 @ 0x100 8007572: 2b00 cmp r3, #0 8007574: d118 bne.n 80075a8 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8007576: 4b7f ldr r3, [pc, #508] @ (8007774 ) 8007578: 681b ldr r3, [r3, #0] 800757a: 4a7e ldr r2, [pc, #504] @ (8007774 ) 800757c: f443 7380 orr.w r3, r3, #256 @ 0x100 8007580: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8007582: f7fc fe8f bl 80042a4 8007586: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007588: e008 b.n 800759c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800758a: f7fc fe8b bl 80042a4 800758e: 4602 mov r2, r0 8007590: 693b ldr r3, [r7, #16] 8007592: 1ad3 subs r3, r2, r3 8007594: 2b64 cmp r3, #100 @ 0x64 8007596: d901 bls.n 800759c { return HAL_TIMEOUT; 8007598: 2303 movs r3, #3 800759a: e103 b.n 80077a4 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800759c: 4b75 ldr r3, [pc, #468] @ (8007774 ) 800759e: 681b ldr r3, [r3, #0] 80075a0: f403 7380 and.w r3, r3, #256 @ 0x100 80075a4: 2b00 cmp r3, #0 80075a6: d0f0 beq.n 800758a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 80075a8: 687b ldr r3, [r7, #4] 80075aa: 68db ldr r3, [r3, #12] 80075ac: 2b01 cmp r3, #1 80075ae: d106 bne.n 80075be 80075b0: 4b6f ldr r3, [pc, #444] @ (8007770 ) 80075b2: 6a1b ldr r3, [r3, #32] 80075b4: 4a6e ldr r2, [pc, #440] @ (8007770 ) 80075b6: f043 0301 orr.w r3, r3, #1 80075ba: 6213 str r3, [r2, #32] 80075bc: e02d b.n 800761a 80075be: 687b ldr r3, [r7, #4] 80075c0: 68db ldr r3, [r3, #12] 80075c2: 2b00 cmp r3, #0 80075c4: d10c bne.n 80075e0 80075c6: 4b6a ldr r3, [pc, #424] @ (8007770 ) 80075c8: 6a1b ldr r3, [r3, #32] 80075ca: 4a69 ldr r2, [pc, #420] @ (8007770 ) 80075cc: f023 0301 bic.w r3, r3, #1 80075d0: 6213 str r3, [r2, #32] 80075d2: 4b67 ldr r3, [pc, #412] @ (8007770 ) 80075d4: 6a1b ldr r3, [r3, #32] 80075d6: 4a66 ldr r2, [pc, #408] @ (8007770 ) 80075d8: f023 0304 bic.w r3, r3, #4 80075dc: 6213 str r3, [r2, #32] 80075de: e01c b.n 800761a 80075e0: 687b ldr r3, [r7, #4] 80075e2: 68db ldr r3, [r3, #12] 80075e4: 2b05 cmp r3, #5 80075e6: d10c bne.n 8007602 80075e8: 4b61 ldr r3, [pc, #388] @ (8007770 ) 80075ea: 6a1b ldr r3, [r3, #32] 80075ec: 4a60 ldr r2, [pc, #384] @ (8007770 ) 80075ee: f043 0304 orr.w r3, r3, #4 80075f2: 6213 str r3, [r2, #32] 80075f4: 4b5e ldr r3, [pc, #376] @ (8007770 ) 80075f6: 6a1b ldr r3, [r3, #32] 80075f8: 4a5d ldr r2, [pc, #372] @ (8007770 ) 80075fa: f043 0301 orr.w r3, r3, #1 80075fe: 6213 str r3, [r2, #32] 8007600: e00b b.n 800761a 8007602: 4b5b ldr r3, [pc, #364] @ (8007770 ) 8007604: 6a1b ldr r3, [r3, #32] 8007606: 4a5a ldr r2, [pc, #360] @ (8007770 ) 8007608: f023 0301 bic.w r3, r3, #1 800760c: 6213 str r3, [r2, #32] 800760e: 4b58 ldr r3, [pc, #352] @ (8007770 ) 8007610: 6a1b ldr r3, [r3, #32] 8007612: 4a57 ldr r2, [pc, #348] @ (8007770 ) 8007614: f023 0304 bic.w r3, r3, #4 8007618: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 800761a: 687b ldr r3, [r7, #4] 800761c: 68db ldr r3, [r3, #12] 800761e: 2b00 cmp r3, #0 8007620: d015 beq.n 800764e { /* Get Start Tick */ tickstart = HAL_GetTick(); 8007622: f7fc fe3f bl 80042a4 8007626: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8007628: e00a b.n 8007640 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 800762a: f7fc fe3b bl 80042a4 800762e: 4602 mov r2, r0 8007630: 693b ldr r3, [r7, #16] 8007632: 1ad3 subs r3, r2, r3 8007634: f241 3288 movw r2, #5000 @ 0x1388 8007638: 4293 cmp r3, r2 800763a: d901 bls.n 8007640 { return HAL_TIMEOUT; 800763c: 2303 movs r3, #3 800763e: e0b1 b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8007640: 4b4b ldr r3, [pc, #300] @ (8007770 ) 8007642: 6a1b ldr r3, [r3, #32] 8007644: f003 0302 and.w r3, r3, #2 8007648: 2b00 cmp r3, #0 800764a: d0ee beq.n 800762a 800764c: e014 b.n 8007678 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 800764e: f7fc fe29 bl 80042a4 8007652: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8007654: e00a b.n 800766c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8007656: f7fc fe25 bl 80042a4 800765a: 4602 mov r2, r0 800765c: 693b ldr r3, [r7, #16] 800765e: 1ad3 subs r3, r2, r3 8007660: f241 3288 movw r2, #5000 @ 0x1388 8007664: 4293 cmp r3, r2 8007666: d901 bls.n 800766c { return HAL_TIMEOUT; 8007668: 2303 movs r3, #3 800766a: e09b b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 800766c: 4b40 ldr r3, [pc, #256] @ (8007770 ) 800766e: 6a1b ldr r3, [r3, #32] 8007670: f003 0302 and.w r3, r3, #2 8007674: 2b00 cmp r3, #0 8007676: d1ee bne.n 8007656 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8007678: 7dfb ldrb r3, [r7, #23] 800767a: 2b01 cmp r3, #1 800767c: d105 bne.n 800768a { __HAL_RCC_PWR_CLK_DISABLE(); 800767e: 4b3c ldr r3, [pc, #240] @ (8007770 ) 8007680: 69db ldr r3, [r3, #28] 8007682: 4a3b ldr r2, [pc, #236] @ (8007770 ) 8007684: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8007688: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 800768a: 687b ldr r3, [r7, #4] 800768c: 69db ldr r3, [r3, #28] 800768e: 2b00 cmp r3, #0 8007690: f000 8087 beq.w 80077a2 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8007694: 4b36 ldr r3, [pc, #216] @ (8007770 ) 8007696: 685b ldr r3, [r3, #4] 8007698: f003 030c and.w r3, r3, #12 800769c: 2b08 cmp r3, #8 800769e: d061 beq.n 8007764 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80076a0: 687b ldr r3, [r7, #4] 80076a2: 69db ldr r3, [r3, #28] 80076a4: 2b02 cmp r3, #2 80076a6: d146 bne.n 8007736 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 80076a8: 4b33 ldr r3, [pc, #204] @ (8007778 ) 80076aa: 2200 movs r2, #0 80076ac: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80076ae: f7fc fdf9 bl 80042a4 80076b2: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80076b4: e008 b.n 80076c8 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80076b6: f7fc fdf5 bl 80042a4 80076ba: 4602 mov r2, r0 80076bc: 693b ldr r3, [r7, #16] 80076be: 1ad3 subs r3, r2, r3 80076c0: 2b02 cmp r3, #2 80076c2: d901 bls.n 80076c8 { return HAL_TIMEOUT; 80076c4: 2303 movs r3, #3 80076c6: e06d b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80076c8: 4b29 ldr r3, [pc, #164] @ (8007770 ) 80076ca: 681b ldr r3, [r3, #0] 80076cc: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80076d0: 2b00 cmp r3, #0 80076d2: d1f0 bne.n 80076b6 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 80076d4: 687b ldr r3, [r7, #4] 80076d6: 6a1b ldr r3, [r3, #32] 80076d8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 80076dc: d108 bne.n 80076f0 /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 80076de: 4b24 ldr r3, [pc, #144] @ (8007770 ) 80076e0: 685b ldr r3, [r3, #4] 80076e2: f423 3200 bic.w r2, r3, #131072 @ 0x20000 80076e6: 687b ldr r3, [r7, #4] 80076e8: 689b ldr r3, [r3, #8] 80076ea: 4921 ldr r1, [pc, #132] @ (8007770 ) 80076ec: 4313 orrs r3, r2 80076ee: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 80076f0: 4b1f ldr r3, [pc, #124] @ (8007770 ) 80076f2: 685b ldr r3, [r3, #4] 80076f4: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 80076f8: 687b ldr r3, [r7, #4] 80076fa: 6a19 ldr r1, [r3, #32] 80076fc: 687b ldr r3, [r7, #4] 80076fe: 6a5b ldr r3, [r3, #36] @ 0x24 8007700: 430b orrs r3, r1 8007702: 491b ldr r1, [pc, #108] @ (8007770 ) 8007704: 4313 orrs r3, r2 8007706: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8007708: 4b1b ldr r3, [pc, #108] @ (8007778 ) 800770a: 2201 movs r2, #1 800770c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800770e: f7fc fdc9 bl 80042a4 8007712: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8007714: e008 b.n 8007728 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8007716: f7fc fdc5 bl 80042a4 800771a: 4602 mov r2, r0 800771c: 693b ldr r3, [r7, #16] 800771e: 1ad3 subs r3, r2, r3 8007720: 2b02 cmp r3, #2 8007722: d901 bls.n 8007728 { return HAL_TIMEOUT; 8007724: 2303 movs r3, #3 8007726: e03d b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8007728: 4b11 ldr r3, [pc, #68] @ (8007770 ) 800772a: 681b ldr r3, [r3, #0] 800772c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8007730: 2b00 cmp r3, #0 8007732: d0f0 beq.n 8007716 8007734: e035 b.n 80077a2 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8007736: 4b10 ldr r3, [pc, #64] @ (8007778 ) 8007738: 2200 movs r2, #0 800773a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800773c: f7fc fdb2 bl 80042a4 8007740: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8007742: e008 b.n 8007756 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8007744: f7fc fdae bl 80042a4 8007748: 4602 mov r2, r0 800774a: 693b ldr r3, [r7, #16] 800774c: 1ad3 subs r3, r2, r3 800774e: 2b02 cmp r3, #2 8007750: d901 bls.n 8007756 { return HAL_TIMEOUT; 8007752: 2303 movs r3, #3 8007754: e026 b.n 80077a4 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8007756: 4b06 ldr r3, [pc, #24] @ (8007770 ) 8007758: 681b ldr r3, [r3, #0] 800775a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800775e: 2b00 cmp r3, #0 8007760: d1f0 bne.n 8007744 8007762: e01e b.n 80077a2 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8007764: 687b ldr r3, [r7, #4] 8007766: 69db ldr r3, [r3, #28] 8007768: 2b01 cmp r3, #1 800776a: d107 bne.n 800777c { return HAL_ERROR; 800776c: 2301 movs r3, #1 800776e: e019 b.n 80077a4 8007770: 40021000 .word 0x40021000 8007774: 40007000 .word 0x40007000 8007778: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 800777c: 4b0b ldr r3, [pc, #44] @ (80077ac ) 800777e: 685b ldr r3, [r3, #4] 8007780: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8007782: 68fb ldr r3, [r7, #12] 8007784: f403 3280 and.w r2, r3, #65536 @ 0x10000 8007788: 687b ldr r3, [r7, #4] 800778a: 6a1b ldr r3, [r3, #32] 800778c: 429a cmp r2, r3 800778e: d106 bne.n 800779e (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8007790: 68fb ldr r3, [r7, #12] 8007792: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 8007796: 687b ldr r3, [r7, #4] 8007798: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 800779a: 429a cmp r2, r3 800779c: d001 beq.n 80077a2 { return HAL_ERROR; 800779e: 2301 movs r3, #1 80077a0: e000 b.n 80077a4 } } } } return HAL_OK; 80077a2: 2300 movs r3, #0 } 80077a4: 4618 mov r0, r3 80077a6: 3718 adds r7, #24 80077a8: 46bd mov sp, r7 80077aa: bd80 pop {r7, pc} 80077ac: 40021000 .word 0x40021000 080077b0 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 80077b0: b580 push {r7, lr} 80077b2: b084 sub sp, #16 80077b4: af00 add r7, sp, #0 80077b6: 6078 str r0, [r7, #4] 80077b8: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 80077ba: 687b ldr r3, [r7, #4] 80077bc: 2b00 cmp r3, #0 80077be: d101 bne.n 80077c4 { return HAL_ERROR; 80077c0: 2301 movs r3, #1 80077c2: e0d0 b.n 8007966 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 80077c4: 4b6a ldr r3, [pc, #424] @ (8007970 ) 80077c6: 681b ldr r3, [r3, #0] 80077c8: f003 0307 and.w r3, r3, #7 80077cc: 683a ldr r2, [r7, #0] 80077ce: 429a cmp r2, r3 80077d0: d910 bls.n 80077f4 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80077d2: 4b67 ldr r3, [pc, #412] @ (8007970 ) 80077d4: 681b ldr r3, [r3, #0] 80077d6: f023 0207 bic.w r2, r3, #7 80077da: 4965 ldr r1, [pc, #404] @ (8007970 ) 80077dc: 683b ldr r3, [r7, #0] 80077de: 4313 orrs r3, r2 80077e0: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80077e2: 4b63 ldr r3, [pc, #396] @ (8007970 ) 80077e4: 681b ldr r3, [r3, #0] 80077e6: f003 0307 and.w r3, r3, #7 80077ea: 683a ldr r2, [r7, #0] 80077ec: 429a cmp r2, r3 80077ee: d001 beq.n 80077f4 { return HAL_ERROR; 80077f0: 2301 movs r3, #1 80077f2: e0b8 b.n 8007966 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 80077f4: 687b ldr r3, [r7, #4] 80077f6: 681b ldr r3, [r3, #0] 80077f8: f003 0302 and.w r3, r3, #2 80077fc: 2b00 cmp r3, #0 80077fe: d020 beq.n 8007842 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8007800: 687b ldr r3, [r7, #4] 8007802: 681b ldr r3, [r3, #0] 8007804: f003 0304 and.w r3, r3, #4 8007808: 2b00 cmp r3, #0 800780a: d005 beq.n 8007818 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 800780c: 4b59 ldr r3, [pc, #356] @ (8007974 ) 800780e: 685b ldr r3, [r3, #4] 8007810: 4a58 ldr r2, [pc, #352] @ (8007974 ) 8007812: f443 63e0 orr.w r3, r3, #1792 @ 0x700 8007816: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8007818: 687b ldr r3, [r7, #4] 800781a: 681b ldr r3, [r3, #0] 800781c: f003 0308 and.w r3, r3, #8 8007820: 2b00 cmp r3, #0 8007822: d005 beq.n 8007830 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8007824: 4b53 ldr r3, [pc, #332] @ (8007974 ) 8007826: 685b ldr r3, [r3, #4] 8007828: 4a52 ldr r2, [pc, #328] @ (8007974 ) 800782a: f443 5360 orr.w r3, r3, #14336 @ 0x3800 800782e: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8007830: 4b50 ldr r3, [pc, #320] @ (8007974 ) 8007832: 685b ldr r3, [r3, #4] 8007834: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8007838: 687b ldr r3, [r7, #4] 800783a: 689b ldr r3, [r3, #8] 800783c: 494d ldr r1, [pc, #308] @ (8007974 ) 800783e: 4313 orrs r3, r2 8007840: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8007842: 687b ldr r3, [r7, #4] 8007844: 681b ldr r3, [r3, #0] 8007846: f003 0301 and.w r3, r3, #1 800784a: 2b00 cmp r3, #0 800784c: d040 beq.n 80078d0 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 800784e: 687b ldr r3, [r7, #4] 8007850: 685b ldr r3, [r3, #4] 8007852: 2b01 cmp r3, #1 8007854: d107 bne.n 8007866 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8007856: 4b47 ldr r3, [pc, #284] @ (8007974 ) 8007858: 681b ldr r3, [r3, #0] 800785a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800785e: 2b00 cmp r3, #0 8007860: d115 bne.n 800788e { return HAL_ERROR; 8007862: 2301 movs r3, #1 8007864: e07f b.n 8007966 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8007866: 687b ldr r3, [r7, #4] 8007868: 685b ldr r3, [r3, #4] 800786a: 2b02 cmp r3, #2 800786c: d107 bne.n 800787e { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 800786e: 4b41 ldr r3, [pc, #260] @ (8007974 ) 8007870: 681b ldr r3, [r3, #0] 8007872: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8007876: 2b00 cmp r3, #0 8007878: d109 bne.n 800788e { return HAL_ERROR; 800787a: 2301 movs r3, #1 800787c: e073 b.n 8007966 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800787e: 4b3d ldr r3, [pc, #244] @ (8007974 ) 8007880: 681b ldr r3, [r3, #0] 8007882: f003 0302 and.w r3, r3, #2 8007886: 2b00 cmp r3, #0 8007888: d101 bne.n 800788e { return HAL_ERROR; 800788a: 2301 movs r3, #1 800788c: e06b b.n 8007966 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 800788e: 4b39 ldr r3, [pc, #228] @ (8007974 ) 8007890: 685b ldr r3, [r3, #4] 8007892: f023 0203 bic.w r2, r3, #3 8007896: 687b ldr r3, [r7, #4] 8007898: 685b ldr r3, [r3, #4] 800789a: 4936 ldr r1, [pc, #216] @ (8007974 ) 800789c: 4313 orrs r3, r2 800789e: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 80078a0: f7fc fd00 bl 80042a4 80078a4: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80078a6: e00a b.n 80078be { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 80078a8: f7fc fcfc bl 80042a4 80078ac: 4602 mov r2, r0 80078ae: 68fb ldr r3, [r7, #12] 80078b0: 1ad3 subs r3, r2, r3 80078b2: f241 3288 movw r2, #5000 @ 0x1388 80078b6: 4293 cmp r3, r2 80078b8: d901 bls.n 80078be { return HAL_TIMEOUT; 80078ba: 2303 movs r3, #3 80078bc: e053 b.n 8007966 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80078be: 4b2d ldr r3, [pc, #180] @ (8007974 ) 80078c0: 685b ldr r3, [r3, #4] 80078c2: f003 020c and.w r2, r3, #12 80078c6: 687b ldr r3, [r7, #4] 80078c8: 685b ldr r3, [r3, #4] 80078ca: 009b lsls r3, r3, #2 80078cc: 429a cmp r2, r3 80078ce: d1eb bne.n 80078a8 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 80078d0: 4b27 ldr r3, [pc, #156] @ (8007970 ) 80078d2: 681b ldr r3, [r3, #0] 80078d4: f003 0307 and.w r3, r3, #7 80078d8: 683a ldr r2, [r7, #0] 80078da: 429a cmp r2, r3 80078dc: d210 bcs.n 8007900 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80078de: 4b24 ldr r3, [pc, #144] @ (8007970 ) 80078e0: 681b ldr r3, [r3, #0] 80078e2: f023 0207 bic.w r2, r3, #7 80078e6: 4922 ldr r1, [pc, #136] @ (8007970 ) 80078e8: 683b ldr r3, [r7, #0] 80078ea: 4313 orrs r3, r2 80078ec: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80078ee: 4b20 ldr r3, [pc, #128] @ (8007970 ) 80078f0: 681b ldr r3, [r3, #0] 80078f2: f003 0307 and.w r3, r3, #7 80078f6: 683a ldr r2, [r7, #0] 80078f8: 429a cmp r2, r3 80078fa: d001 beq.n 8007900 { return HAL_ERROR; 80078fc: 2301 movs r3, #1 80078fe: e032 b.n 8007966 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8007900: 687b ldr r3, [r7, #4] 8007902: 681b ldr r3, [r3, #0] 8007904: f003 0304 and.w r3, r3, #4 8007908: 2b00 cmp r3, #0 800790a: d008 beq.n 800791e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 800790c: 4b19 ldr r3, [pc, #100] @ (8007974 ) 800790e: 685b ldr r3, [r3, #4] 8007910: f423 62e0 bic.w r2, r3, #1792 @ 0x700 8007914: 687b ldr r3, [r7, #4] 8007916: 68db ldr r3, [r3, #12] 8007918: 4916 ldr r1, [pc, #88] @ (8007974 ) 800791a: 4313 orrs r3, r2 800791c: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800791e: 687b ldr r3, [r7, #4] 8007920: 681b ldr r3, [r3, #0] 8007922: f003 0308 and.w r3, r3, #8 8007926: 2b00 cmp r3, #0 8007928: d009 beq.n 800793e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 800792a: 4b12 ldr r3, [pc, #72] @ (8007974 ) 800792c: 685b ldr r3, [r3, #4] 800792e: f423 5260 bic.w r2, r3, #14336 @ 0x3800 8007932: 687b ldr r3, [r7, #4] 8007934: 691b ldr r3, [r3, #16] 8007936: 00db lsls r3, r3, #3 8007938: 490e ldr r1, [pc, #56] @ (8007974 ) 800793a: 4313 orrs r3, r2 800793c: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 800793e: f000 f821 bl 8007984 8007942: 4602 mov r2, r0 8007944: 4b0b ldr r3, [pc, #44] @ (8007974 ) 8007946: 685b ldr r3, [r3, #4] 8007948: 091b lsrs r3, r3, #4 800794a: f003 030f and.w r3, r3, #15 800794e: 490a ldr r1, [pc, #40] @ (8007978 ) 8007950: 5ccb ldrb r3, [r1, r3] 8007952: fa22 f303 lsr.w r3, r2, r3 8007956: 4a09 ldr r2, [pc, #36] @ (800797c ) 8007958: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 800795a: 4b09 ldr r3, [pc, #36] @ (8007980 ) 800795c: 681b ldr r3, [r3, #0] 800795e: 4618 mov r0, r3 8007960: f7fc fc5e bl 8004220 return HAL_OK; 8007964: 2300 movs r3, #0 } 8007966: 4618 mov r0, r3 8007968: 3710 adds r7, #16 800796a: 46bd mov sp, r7 800796c: bd80 pop {r7, pc} 800796e: bf00 nop 8007970: 40022000 .word 0x40022000 8007974: 40021000 .word 0x40021000 8007978: 0800e1e8 .word 0x0800e1e8 800797c: 20000008 .word 0x20000008 8007980: 2000000c .word 0x2000000c 08007984 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8007984: b480 push {r7} 8007986: b087 sub sp, #28 8007988: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 800798a: 2300 movs r3, #0 800798c: 60fb str r3, [r7, #12] 800798e: 2300 movs r3, #0 8007990: 60bb str r3, [r7, #8] 8007992: 2300 movs r3, #0 8007994: 617b str r3, [r7, #20] 8007996: 2300 movs r3, #0 8007998: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; 800799a: 2300 movs r3, #0 800799c: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 800799e: 4b1e ldr r3, [pc, #120] @ (8007a18 ) 80079a0: 685b ldr r3, [r3, #4] 80079a2: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 80079a4: 68fb ldr r3, [r7, #12] 80079a6: f003 030c and.w r3, r3, #12 80079aa: 2b04 cmp r3, #4 80079ac: d002 beq.n 80079b4 80079ae: 2b08 cmp r3, #8 80079b0: d003 beq.n 80079ba 80079b2: e027 b.n 8007a04 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 80079b4: 4b19 ldr r3, [pc, #100] @ (8007a1c ) 80079b6: 613b str r3, [r7, #16] break; 80079b8: e027 b.n 8007a0a } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 80079ba: 68fb ldr r3, [r7, #12] 80079bc: 0c9b lsrs r3, r3, #18 80079be: f003 030f and.w r3, r3, #15 80079c2: 4a17 ldr r2, [pc, #92] @ (8007a20 ) 80079c4: 5cd3 ldrb r3, [r2, r3] 80079c6: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 80079c8: 68fb ldr r3, [r7, #12] 80079ca: f403 3380 and.w r3, r3, #65536 @ 0x10000 80079ce: 2b00 cmp r3, #0 80079d0: d010 beq.n 80079f4 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 80079d2: 4b11 ldr r3, [pc, #68] @ (8007a18 ) 80079d4: 685b ldr r3, [r3, #4] 80079d6: 0c5b lsrs r3, r3, #17 80079d8: f003 0301 and.w r3, r3, #1 80079dc: 4a11 ldr r2, [pc, #68] @ (8007a24 ) 80079de: 5cd3 ldrb r3, [r2, r3] 80079e0: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 80079e2: 687b ldr r3, [r7, #4] 80079e4: 4a0d ldr r2, [pc, #52] @ (8007a1c ) 80079e6: fb03 f202 mul.w r2, r3, r2 80079ea: 68bb ldr r3, [r7, #8] 80079ec: fbb2 f3f3 udiv r3, r2, r3 80079f0: 617b str r3, [r7, #20] 80079f2: e004 b.n 80079fe #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 80079f4: 687b ldr r3, [r7, #4] 80079f6: 4a0c ldr r2, [pc, #48] @ (8007a28 ) 80079f8: fb02 f303 mul.w r3, r2, r3 80079fc: 617b str r3, [r7, #20] } sysclockfreq = pllclk; 80079fe: 697b ldr r3, [r7, #20] 8007a00: 613b str r3, [r7, #16] break; 8007a02: e002 b.n 8007a0a } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8007a04: 4b09 ldr r3, [pc, #36] @ (8007a2c ) 8007a06: 613b str r3, [r7, #16] break; 8007a08: bf00 nop } } return sysclockfreq; 8007a0a: 693b ldr r3, [r7, #16] } 8007a0c: 4618 mov r0, r3 8007a0e: 371c adds r7, #28 8007a10: 46bd mov sp, r7 8007a12: bc80 pop {r7} 8007a14: 4770 bx lr 8007a16: bf00 nop 8007a18: 40021000 .word 0x40021000 8007a1c: 00b71b00 .word 0x00b71b00 8007a20: 0800e200 .word 0x0800e200 8007a24: 0800e210 .word 0x0800e210 8007a28: 003d0900 .word 0x003d0900 8007a2c: 007a1200 .word 0x007a1200 08007a30 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 8007a30: b480 push {r7} 8007a32: af00 add r7, sp, #0 return SystemCoreClock; 8007a34: 4b02 ldr r3, [pc, #8] @ (8007a40 ) 8007a36: 681b ldr r3, [r3, #0] } 8007a38: 4618 mov r0, r3 8007a3a: 46bd mov sp, r7 8007a3c: bc80 pop {r7} 8007a3e: 4770 bx lr 8007a40: 20000008 .word 0x20000008 08007a44 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8007a44: b580 push {r7, lr} 8007a46: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8007a48: f7ff fff2 bl 8007a30 8007a4c: 4602 mov r2, r0 8007a4e: 4b05 ldr r3, [pc, #20] @ (8007a64 ) 8007a50: 685b ldr r3, [r3, #4] 8007a52: 0a1b lsrs r3, r3, #8 8007a54: f003 0307 and.w r3, r3, #7 8007a58: 4903 ldr r1, [pc, #12] @ (8007a68 ) 8007a5a: 5ccb ldrb r3, [r1, r3] 8007a5c: fa22 f303 lsr.w r3, r2, r3 } 8007a60: 4618 mov r0, r3 8007a62: bd80 pop {r7, pc} 8007a64: 40021000 .word 0x40021000 8007a68: 0800e1f8 .word 0x0800e1f8 08007a6c : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 8007a6c: b580 push {r7, lr} 8007a6e: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8007a70: f7ff ffde bl 8007a30 8007a74: 4602 mov r2, r0 8007a76: 4b05 ldr r3, [pc, #20] @ (8007a8c ) 8007a78: 685b ldr r3, [r3, #4] 8007a7a: 0adb lsrs r3, r3, #11 8007a7c: f003 0307 and.w r3, r3, #7 8007a80: 4903 ldr r1, [pc, #12] @ (8007a90 ) 8007a82: 5ccb ldrb r3, [r1, r3] 8007a84: fa22 f303 lsr.w r3, r2, r3 } 8007a88: 4618 mov r0, r3 8007a8a: bd80 pop {r7, pc} 8007a8c: 40021000 .word 0x40021000 8007a90: 0800e1f8 .word 0x0800e1f8 08007a94 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 8007a94: b480 push {r7} 8007a96: b085 sub sp, #20 8007a98: af00 add r7, sp, #0 8007a9a: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8007a9c: 4b0a ldr r3, [pc, #40] @ (8007ac8 ) 8007a9e: 681b ldr r3, [r3, #0] 8007aa0: 4a0a ldr r2, [pc, #40] @ (8007acc ) 8007aa2: fba2 2303 umull r2, r3, r2, r3 8007aa6: 0a5b lsrs r3, r3, #9 8007aa8: 687a ldr r2, [r7, #4] 8007aaa: fb02 f303 mul.w r3, r2, r3 8007aae: 60fb str r3, [r7, #12] do { __NOP(); 8007ab0: bf00 nop } while (Delay --); 8007ab2: 68fb ldr r3, [r7, #12] 8007ab4: 1e5a subs r2, r3, #1 8007ab6: 60fa str r2, [r7, #12] 8007ab8: 2b00 cmp r3, #0 8007aba: d1f9 bne.n 8007ab0 } 8007abc: bf00 nop 8007abe: bf00 nop 8007ac0: 3714 adds r7, #20 8007ac2: 46bd mov sp, r7 8007ac4: bc80 pop {r7} 8007ac6: 4770 bx lr 8007ac8: 20000008 .word 0x20000008 8007acc: 10624dd3 .word 0x10624dd3 08007ad0 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 8007ad0: b580 push {r7, lr} 8007ad2: b086 sub sp, #24 8007ad4: af00 add r7, sp, #0 8007ad6: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 8007ad8: 2300 movs r3, #0 8007ada: 613b str r3, [r7, #16] 8007adc: 2300 movs r3, #0 8007ade: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8007ae0: 687b ldr r3, [r7, #4] 8007ae2: 681b ldr r3, [r3, #0] 8007ae4: f003 0301 and.w r3, r3, #1 8007ae8: 2b00 cmp r3, #0 8007aea: d07d beq.n 8007be8 { FlagStatus pwrclkchanged = RESET; 8007aec: 2300 movs r3, #0 8007aee: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8007af0: 4b4f ldr r3, [pc, #316] @ (8007c30 ) 8007af2: 69db ldr r3, [r3, #28] 8007af4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8007af8: 2b00 cmp r3, #0 8007afa: d10d bne.n 8007b18 { __HAL_RCC_PWR_CLK_ENABLE(); 8007afc: 4b4c ldr r3, [pc, #304] @ (8007c30 ) 8007afe: 69db ldr r3, [r3, #28] 8007b00: 4a4b ldr r2, [pc, #300] @ (8007c30 ) 8007b02: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8007b06: 61d3 str r3, [r2, #28] 8007b08: 4b49 ldr r3, [pc, #292] @ (8007c30 ) 8007b0a: 69db ldr r3, [r3, #28] 8007b0c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8007b10: 60bb str r3, [r7, #8] 8007b12: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8007b14: 2301 movs r3, #1 8007b16: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007b18: 4b46 ldr r3, [pc, #280] @ (8007c34 ) 8007b1a: 681b ldr r3, [r3, #0] 8007b1c: f403 7380 and.w r3, r3, #256 @ 0x100 8007b20: 2b00 cmp r3, #0 8007b22: d118 bne.n 8007b56 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8007b24: 4b43 ldr r3, [pc, #268] @ (8007c34 ) 8007b26: 681b ldr r3, [r3, #0] 8007b28: 4a42 ldr r2, [pc, #264] @ (8007c34 ) 8007b2a: f443 7380 orr.w r3, r3, #256 @ 0x100 8007b2e: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8007b30: f7fc fbb8 bl 80042a4 8007b34: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007b36: e008 b.n 8007b4a { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8007b38: f7fc fbb4 bl 80042a4 8007b3c: 4602 mov r2, r0 8007b3e: 693b ldr r3, [r7, #16] 8007b40: 1ad3 subs r3, r2, r3 8007b42: 2b64 cmp r3, #100 @ 0x64 8007b44: d901 bls.n 8007b4a { return HAL_TIMEOUT; 8007b46: 2303 movs r3, #3 8007b48: e06d b.n 8007c26 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8007b4a: 4b3a ldr r3, [pc, #232] @ (8007c34 ) 8007b4c: 681b ldr r3, [r3, #0] 8007b4e: f403 7380 and.w r3, r3, #256 @ 0x100 8007b52: 2b00 cmp r3, #0 8007b54: d0f0 beq.n 8007b38 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 8007b56: 4b36 ldr r3, [pc, #216] @ (8007c30 ) 8007b58: 6a1b ldr r3, [r3, #32] 8007b5a: f403 7340 and.w r3, r3, #768 @ 0x300 8007b5e: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8007b60: 68fb ldr r3, [r7, #12] 8007b62: 2b00 cmp r3, #0 8007b64: d02e beq.n 8007bc4 8007b66: 687b ldr r3, [r7, #4] 8007b68: 685b ldr r3, [r3, #4] 8007b6a: f403 7340 and.w r3, r3, #768 @ 0x300 8007b6e: 68fa ldr r2, [r7, #12] 8007b70: 429a cmp r2, r3 8007b72: d027 beq.n 8007bc4 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8007b74: 4b2e ldr r3, [pc, #184] @ (8007c30 ) 8007b76: 6a1b ldr r3, [r3, #32] 8007b78: f423 7340 bic.w r3, r3, #768 @ 0x300 8007b7c: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8007b7e: 4b2e ldr r3, [pc, #184] @ (8007c38 ) 8007b80: 2201 movs r2, #1 8007b82: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8007b84: 4b2c ldr r3, [pc, #176] @ (8007c38 ) 8007b86: 2200 movs r2, #0 8007b88: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 8007b8a: 4a29 ldr r2, [pc, #164] @ (8007c30 ) 8007b8c: 68fb ldr r3, [r7, #12] 8007b8e: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8007b90: 68fb ldr r3, [r7, #12] 8007b92: f003 0301 and.w r3, r3, #1 8007b96: 2b00 cmp r3, #0 8007b98: d014 beq.n 8007bc4 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8007b9a: f7fc fb83 bl 80042a4 8007b9e: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8007ba0: e00a b.n 8007bb8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8007ba2: f7fc fb7f bl 80042a4 8007ba6: 4602 mov r2, r0 8007ba8: 693b ldr r3, [r7, #16] 8007baa: 1ad3 subs r3, r2, r3 8007bac: f241 3288 movw r2, #5000 @ 0x1388 8007bb0: 4293 cmp r3, r2 8007bb2: d901 bls.n 8007bb8 { return HAL_TIMEOUT; 8007bb4: 2303 movs r3, #3 8007bb6: e036 b.n 8007c26 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8007bb8: 4b1d ldr r3, [pc, #116] @ (8007c30 ) 8007bba: 6a1b ldr r3, [r3, #32] 8007bbc: f003 0302 and.w r3, r3, #2 8007bc0: 2b00 cmp r3, #0 8007bc2: d0ee beq.n 8007ba2 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8007bc4: 4b1a ldr r3, [pc, #104] @ (8007c30 ) 8007bc6: 6a1b ldr r3, [r3, #32] 8007bc8: f423 7240 bic.w r2, r3, #768 @ 0x300 8007bcc: 687b ldr r3, [r7, #4] 8007bce: 685b ldr r3, [r3, #4] 8007bd0: 4917 ldr r1, [pc, #92] @ (8007c30 ) 8007bd2: 4313 orrs r3, r2 8007bd4: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8007bd6: 7dfb ldrb r3, [r7, #23] 8007bd8: 2b01 cmp r3, #1 8007bda: d105 bne.n 8007be8 { __HAL_RCC_PWR_CLK_DISABLE(); 8007bdc: 4b14 ldr r3, [pc, #80] @ (8007c30 ) 8007bde: 69db ldr r3, [r3, #28] 8007be0: 4a13 ldr r2, [pc, #76] @ (8007c30 ) 8007be2: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8007be6: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8007be8: 687b ldr r3, [r7, #4] 8007bea: 681b ldr r3, [r3, #0] 8007bec: f003 0302 and.w r3, r3, #2 8007bf0: 2b00 cmp r3, #0 8007bf2: d008 beq.n 8007c06 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8007bf4: 4b0e ldr r3, [pc, #56] @ (8007c30 ) 8007bf6: 685b ldr r3, [r3, #4] 8007bf8: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8007bfc: 687b ldr r3, [r7, #4] 8007bfe: 689b ldr r3, [r3, #8] 8007c00: 490b ldr r1, [pc, #44] @ (8007c30 ) 8007c02: 4313 orrs r3, r2 8007c04: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8007c06: 687b ldr r3, [r7, #4] 8007c08: 681b ldr r3, [r3, #0] 8007c0a: f003 0310 and.w r3, r3, #16 8007c0e: 2b00 cmp r3, #0 8007c10: d008 beq.n 8007c24 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8007c12: 4b07 ldr r3, [pc, #28] @ (8007c30 ) 8007c14: 685b ldr r3, [r3, #4] 8007c16: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 8007c1a: 687b ldr r3, [r7, #4] 8007c1c: 68db ldr r3, [r3, #12] 8007c1e: 4904 ldr r1, [pc, #16] @ (8007c30 ) 8007c20: 4313 orrs r3, r2 8007c22: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8007c24: 2300 movs r3, #0 } 8007c26: 4618 mov r0, r3 8007c28: 3718 adds r7, #24 8007c2a: 46bd mov sp, r7 8007c2c: bd80 pop {r7, pc} 8007c2e: bf00 nop 8007c30: 40021000 .word 0x40021000 8007c34: 40007000 .word 0x40007000 8007c38: 42420440 .word 0x42420440 08007c3c : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8007c3c: b580 push {r7, lr} 8007c3e: b082 sub sp, #8 8007c40: af00 add r7, sp, #0 8007c42: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8007c44: 687b ldr r3, [r7, #4] 8007c46: 2b00 cmp r3, #0 8007c48: d101 bne.n 8007c4e { return HAL_ERROR; 8007c4a: 2301 movs r3, #1 8007c4c: e041 b.n 8007cd2 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8007c4e: 687b ldr r3, [r7, #4] 8007c50: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8007c54: b2db uxtb r3, r3 8007c56: 2b00 cmp r3, #0 8007c58: d106 bne.n 8007c68 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8007c5a: 687b ldr r3, [r7, #4] 8007c5c: 2200 movs r2, #0 8007c5e: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8007c62: 6878 ldr r0, [r7, #4] 8007c64: f7fc f952 bl 8003f0c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8007c68: 687b ldr r3, [r7, #4] 8007c6a: 2202 movs r2, #2 8007c6c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8007c70: 687b ldr r3, [r7, #4] 8007c72: 681a ldr r2, [r3, #0] 8007c74: 687b ldr r3, [r7, #4] 8007c76: 3304 adds r3, #4 8007c78: 4619 mov r1, r3 8007c7a: 4610 mov r0, r2 8007c7c: f000 fb3e bl 80082fc /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8007c80: 687b ldr r3, [r7, #4] 8007c82: 2201 movs r2, #1 8007c84: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8007c88: 687b ldr r3, [r7, #4] 8007c8a: 2201 movs r2, #1 8007c8c: f883 203e strb.w r2, [r3, #62] @ 0x3e 8007c90: 687b ldr r3, [r7, #4] 8007c92: 2201 movs r2, #1 8007c94: f883 203f strb.w r2, [r3, #63] @ 0x3f 8007c98: 687b ldr r3, [r7, #4] 8007c9a: 2201 movs r2, #1 8007c9c: f883 2040 strb.w r2, [r3, #64] @ 0x40 8007ca0: 687b ldr r3, [r7, #4] 8007ca2: 2201 movs r2, #1 8007ca4: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8007ca8: 687b ldr r3, [r7, #4] 8007caa: 2201 movs r2, #1 8007cac: f883 2042 strb.w r2, [r3, #66] @ 0x42 8007cb0: 687b ldr r3, [r7, #4] 8007cb2: 2201 movs r2, #1 8007cb4: f883 2043 strb.w r2, [r3, #67] @ 0x43 8007cb8: 687b ldr r3, [r7, #4] 8007cba: 2201 movs r2, #1 8007cbc: f883 2044 strb.w r2, [r3, #68] @ 0x44 8007cc0: 687b ldr r3, [r7, #4] 8007cc2: 2201 movs r2, #1 8007cc4: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8007cc8: 687b ldr r3, [r7, #4] 8007cca: 2201 movs r2, #1 8007ccc: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8007cd0: 2300 movs r3, #0 } 8007cd2: 4618 mov r0, r3 8007cd4: 3708 adds r7, #8 8007cd6: 46bd mov sp, r7 8007cd8: bd80 pop {r7, pc} 08007cda : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 8007cda: b580 push {r7, lr} 8007cdc: b082 sub sp, #8 8007cde: af00 add r7, sp, #0 8007ce0: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8007ce2: 687b ldr r3, [r7, #4] 8007ce4: 2b00 cmp r3, #0 8007ce6: d101 bne.n 8007cec { return HAL_ERROR; 8007ce8: 2301 movs r3, #1 8007cea: e041 b.n 8007d70 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8007cec: 687b ldr r3, [r7, #4] 8007cee: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8007cf2: b2db uxtb r3, r3 8007cf4: 2b00 cmp r3, #0 8007cf6: d106 bne.n 8007d06 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8007cf8: 687b ldr r3, [r7, #4] 8007cfa: 2200 movs r2, #0 8007cfc: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8007d00: 6878 ldr r0, [r7, #4] 8007d02: f000 f839 bl 8007d78 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8007d06: 687b ldr r3, [r7, #4] 8007d08: 2202 movs r2, #2 8007d0a: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8007d0e: 687b ldr r3, [r7, #4] 8007d10: 681a ldr r2, [r3, #0] 8007d12: 687b ldr r3, [r7, #4] 8007d14: 3304 adds r3, #4 8007d16: 4619 mov r1, r3 8007d18: 4610 mov r0, r2 8007d1a: f000 faef bl 80082fc /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8007d1e: 687b ldr r3, [r7, #4] 8007d20: 2201 movs r2, #1 8007d22: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8007d26: 687b ldr r3, [r7, #4] 8007d28: 2201 movs r2, #1 8007d2a: f883 203e strb.w r2, [r3, #62] @ 0x3e 8007d2e: 687b ldr r3, [r7, #4] 8007d30: 2201 movs r2, #1 8007d32: f883 203f strb.w r2, [r3, #63] @ 0x3f 8007d36: 687b ldr r3, [r7, #4] 8007d38: 2201 movs r2, #1 8007d3a: f883 2040 strb.w r2, [r3, #64] @ 0x40 8007d3e: 687b ldr r3, [r7, #4] 8007d40: 2201 movs r2, #1 8007d42: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8007d46: 687b ldr r3, [r7, #4] 8007d48: 2201 movs r2, #1 8007d4a: f883 2042 strb.w r2, [r3, #66] @ 0x42 8007d4e: 687b ldr r3, [r7, #4] 8007d50: 2201 movs r2, #1 8007d52: f883 2043 strb.w r2, [r3, #67] @ 0x43 8007d56: 687b ldr r3, [r7, #4] 8007d58: 2201 movs r2, #1 8007d5a: f883 2044 strb.w r2, [r3, #68] @ 0x44 8007d5e: 687b ldr r3, [r7, #4] 8007d60: 2201 movs r2, #1 8007d62: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8007d66: 687b ldr r3, [r7, #4] 8007d68: 2201 movs r2, #1 8007d6a: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8007d6e: 2300 movs r3, #0 } 8007d70: 4618 mov r0, r3 8007d72: 3708 adds r7, #8 8007d74: 46bd mov sp, r7 8007d76: bd80 pop {r7, pc} 08007d78 : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 8007d78: b480 push {r7} 8007d7a: b083 sub sp, #12 8007d7c: af00 add r7, sp, #0 8007d7e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 8007d80: bf00 nop 8007d82: 370c adds r7, #12 8007d84: 46bd mov sp, r7 8007d86: bc80 pop {r7} 8007d88: 4770 bx lr ... 08007d8c : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8007d8c: b580 push {r7, lr} 8007d8e: b084 sub sp, #16 8007d90: af00 add r7, sp, #0 8007d92: 6078 str r0, [r7, #4] 8007d94: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 8007d96: 683b ldr r3, [r7, #0] 8007d98: 2b00 cmp r3, #0 8007d9a: d109 bne.n 8007db0 8007d9c: 687b ldr r3, [r7, #4] 8007d9e: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8007da2: b2db uxtb r3, r3 8007da4: 2b01 cmp r3, #1 8007da6: bf14 ite ne 8007da8: 2301 movne r3, #1 8007daa: 2300 moveq r3, #0 8007dac: b2db uxtb r3, r3 8007dae: e022 b.n 8007df6 8007db0: 683b ldr r3, [r7, #0] 8007db2: 2b04 cmp r3, #4 8007db4: d109 bne.n 8007dca 8007db6: 687b ldr r3, [r7, #4] 8007db8: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8007dbc: b2db uxtb r3, r3 8007dbe: 2b01 cmp r3, #1 8007dc0: bf14 ite ne 8007dc2: 2301 movne r3, #1 8007dc4: 2300 moveq r3, #0 8007dc6: b2db uxtb r3, r3 8007dc8: e015 b.n 8007df6 8007dca: 683b ldr r3, [r7, #0] 8007dcc: 2b08 cmp r3, #8 8007dce: d109 bne.n 8007de4 8007dd0: 687b ldr r3, [r7, #4] 8007dd2: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8007dd6: b2db uxtb r3, r3 8007dd8: 2b01 cmp r3, #1 8007dda: bf14 ite ne 8007ddc: 2301 movne r3, #1 8007dde: 2300 moveq r3, #0 8007de0: b2db uxtb r3, r3 8007de2: e008 b.n 8007df6 8007de4: 687b ldr r3, [r7, #4] 8007de6: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8007dea: b2db uxtb r3, r3 8007dec: 2b01 cmp r3, #1 8007dee: bf14 ite ne 8007df0: 2301 movne r3, #1 8007df2: 2300 moveq r3, #0 8007df4: b2db uxtb r3, r3 8007df6: 2b00 cmp r3, #0 8007df8: d001 beq.n 8007dfe { return HAL_ERROR; 8007dfa: 2301 movs r3, #1 8007dfc: e05e b.n 8007ebc } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8007dfe: 683b ldr r3, [r7, #0] 8007e00: 2b00 cmp r3, #0 8007e02: d104 bne.n 8007e0e 8007e04: 687b ldr r3, [r7, #4] 8007e06: 2202 movs r2, #2 8007e08: f883 203e strb.w r2, [r3, #62] @ 0x3e 8007e0c: e013 b.n 8007e36 8007e0e: 683b ldr r3, [r7, #0] 8007e10: 2b04 cmp r3, #4 8007e12: d104 bne.n 8007e1e 8007e14: 687b ldr r3, [r7, #4] 8007e16: 2202 movs r2, #2 8007e18: f883 203f strb.w r2, [r3, #63] @ 0x3f 8007e1c: e00b b.n 8007e36 8007e1e: 683b ldr r3, [r7, #0] 8007e20: 2b08 cmp r3, #8 8007e22: d104 bne.n 8007e2e 8007e24: 687b ldr r3, [r7, #4] 8007e26: 2202 movs r2, #2 8007e28: f883 2040 strb.w r2, [r3, #64] @ 0x40 8007e2c: e003 b.n 8007e36 8007e2e: 687b ldr r3, [r7, #4] 8007e30: 2202 movs r2, #2 8007e32: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 8007e36: 687b ldr r3, [r7, #4] 8007e38: 681b ldr r3, [r3, #0] 8007e3a: 2201 movs r2, #1 8007e3c: 6839 ldr r1, [r7, #0] 8007e3e: 4618 mov r0, r3 8007e40: f000 fce8 bl 8008814 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8007e44: 687b ldr r3, [r7, #4] 8007e46: 681b ldr r3, [r3, #0] 8007e48: 4a1e ldr r2, [pc, #120] @ (8007ec4 ) 8007e4a: 4293 cmp r3, r2 8007e4c: d107 bne.n 8007e5e { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 8007e4e: 687b ldr r3, [r7, #4] 8007e50: 681b ldr r3, [r3, #0] 8007e52: 6c5a ldr r2, [r3, #68] @ 0x44 8007e54: 687b ldr r3, [r7, #4] 8007e56: 681b ldr r3, [r3, #0] 8007e58: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8007e5c: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8007e5e: 687b ldr r3, [r7, #4] 8007e60: 681b ldr r3, [r3, #0] 8007e62: 4a18 ldr r2, [pc, #96] @ (8007ec4 ) 8007e64: 4293 cmp r3, r2 8007e66: d00e beq.n 8007e86 8007e68: 687b ldr r3, [r7, #4] 8007e6a: 681b ldr r3, [r3, #0] 8007e6c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8007e70: d009 beq.n 8007e86 8007e72: 687b ldr r3, [r7, #4] 8007e74: 681b ldr r3, [r3, #0] 8007e76: 4a14 ldr r2, [pc, #80] @ (8007ec8 ) 8007e78: 4293 cmp r3, r2 8007e7a: d004 beq.n 8007e86 8007e7c: 687b ldr r3, [r7, #4] 8007e7e: 681b ldr r3, [r3, #0] 8007e80: 4a12 ldr r2, [pc, #72] @ (8007ecc ) 8007e82: 4293 cmp r3, r2 8007e84: d111 bne.n 8007eaa { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8007e86: 687b ldr r3, [r7, #4] 8007e88: 681b ldr r3, [r3, #0] 8007e8a: 689b ldr r3, [r3, #8] 8007e8c: f003 0307 and.w r3, r3, #7 8007e90: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8007e92: 68fb ldr r3, [r7, #12] 8007e94: 2b06 cmp r3, #6 8007e96: d010 beq.n 8007eba { __HAL_TIM_ENABLE(htim); 8007e98: 687b ldr r3, [r7, #4] 8007e9a: 681b ldr r3, [r3, #0] 8007e9c: 681a ldr r2, [r3, #0] 8007e9e: 687b ldr r3, [r7, #4] 8007ea0: 681b ldr r3, [r3, #0] 8007ea2: f042 0201 orr.w r2, r2, #1 8007ea6: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8007ea8: e007 b.n 8007eba } } else { __HAL_TIM_ENABLE(htim); 8007eaa: 687b ldr r3, [r7, #4] 8007eac: 681b ldr r3, [r3, #0] 8007eae: 681a ldr r2, [r3, #0] 8007eb0: 687b ldr r3, [r7, #4] 8007eb2: 681b ldr r3, [r3, #0] 8007eb4: f042 0201 orr.w r2, r2, #1 8007eb8: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 8007eba: 2300 movs r3, #0 } 8007ebc: 4618 mov r0, r3 8007ebe: 3710 adds r7, #16 8007ec0: 46bd mov sp, r7 8007ec2: bd80 pop {r7, pc} 8007ec4: 40012c00 .word 0x40012c00 8007ec8: 40000400 .word 0x40000400 8007ecc: 40000800 .word 0x40000800 08007ed0 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) { 8007ed0: b580 push {r7, lr} 8007ed2: b082 sub sp, #8 8007ed4: af00 add r7, sp, #0 8007ed6: 6078 str r0, [r7, #4] 8007ed8: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Disable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); 8007eda: 687b ldr r3, [r7, #4] 8007edc: 681b ldr r3, [r3, #0] 8007ede: 2200 movs r2, #0 8007ee0: 6839 ldr r1, [r7, #0] 8007ee2: 4618 mov r0, r3 8007ee4: f000 fc96 bl 8008814 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 8007ee8: 687b ldr r3, [r7, #4] 8007eea: 681b ldr r3, [r3, #0] 8007eec: 4a29 ldr r2, [pc, #164] @ (8007f94 ) 8007eee: 4293 cmp r3, r2 8007ef0: d117 bne.n 8007f22 { /* Disable the Main Output */ __HAL_TIM_MOE_DISABLE(htim); 8007ef2: 687b ldr r3, [r7, #4] 8007ef4: 681b ldr r3, [r3, #0] 8007ef6: 6a1a ldr r2, [r3, #32] 8007ef8: f241 1311 movw r3, #4369 @ 0x1111 8007efc: 4013 ands r3, r2 8007efe: 2b00 cmp r3, #0 8007f00: d10f bne.n 8007f22 8007f02: 687b ldr r3, [r7, #4] 8007f04: 681b ldr r3, [r3, #0] 8007f06: 6a1a ldr r2, [r3, #32] 8007f08: f240 4344 movw r3, #1092 @ 0x444 8007f0c: 4013 ands r3, r2 8007f0e: 2b00 cmp r3, #0 8007f10: d107 bne.n 8007f22 8007f12: 687b ldr r3, [r7, #4] 8007f14: 681b ldr r3, [r3, #0] 8007f16: 6c5a ldr r2, [r3, #68] @ 0x44 8007f18: 687b ldr r3, [r7, #4] 8007f1a: 681b ldr r3, [r3, #0] 8007f1c: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8007f20: 645a str r2, [r3, #68] @ 0x44 } /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); 8007f22: 687b ldr r3, [r7, #4] 8007f24: 681b ldr r3, [r3, #0] 8007f26: 6a1a ldr r2, [r3, #32] 8007f28: f241 1311 movw r3, #4369 @ 0x1111 8007f2c: 4013 ands r3, r2 8007f2e: 2b00 cmp r3, #0 8007f30: d10f bne.n 8007f52 8007f32: 687b ldr r3, [r7, #4] 8007f34: 681b ldr r3, [r3, #0] 8007f36: 6a1a ldr r2, [r3, #32] 8007f38: f240 4344 movw r3, #1092 @ 0x444 8007f3c: 4013 ands r3, r2 8007f3e: 2b00 cmp r3, #0 8007f40: d107 bne.n 8007f52 8007f42: 687b ldr r3, [r7, #4] 8007f44: 681b ldr r3, [r3, #0] 8007f46: 681a ldr r2, [r3, #0] 8007f48: 687b ldr r3, [r7, #4] 8007f4a: 681b ldr r3, [r3, #0] 8007f4c: f022 0201 bic.w r2, r2, #1 8007f50: 601a str r2, [r3, #0] /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 8007f52: 683b ldr r3, [r7, #0] 8007f54: 2b00 cmp r3, #0 8007f56: d104 bne.n 8007f62 8007f58: 687b ldr r3, [r7, #4] 8007f5a: 2201 movs r2, #1 8007f5c: f883 203e strb.w r2, [r3, #62] @ 0x3e 8007f60: e013 b.n 8007f8a 8007f62: 683b ldr r3, [r7, #0] 8007f64: 2b04 cmp r3, #4 8007f66: d104 bne.n 8007f72 8007f68: 687b ldr r3, [r7, #4] 8007f6a: 2201 movs r2, #1 8007f6c: f883 203f strb.w r2, [r3, #63] @ 0x3f 8007f70: e00b b.n 8007f8a 8007f72: 683b ldr r3, [r7, #0] 8007f74: 2b08 cmp r3, #8 8007f76: d104 bne.n 8007f82 8007f78: 687b ldr r3, [r7, #4] 8007f7a: 2201 movs r2, #1 8007f7c: f883 2040 strb.w r2, [r3, #64] @ 0x40 8007f80: e003 b.n 8007f8a 8007f82: 687b ldr r3, [r7, #4] 8007f84: 2201 movs r2, #1 8007f86: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Return function status */ return HAL_OK; 8007f8a: 2300 movs r3, #0 } 8007f8c: 4618 mov r0, r3 8007f8e: 3708 adds r7, #8 8007f90: 46bd mov sp, r7 8007f92: bd80 pop {r7, pc} 8007f94: 40012c00 .word 0x40012c00 08007f98 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8007f98: b580 push {r7, lr} 8007f9a: b086 sub sp, #24 8007f9c: af00 add r7, sp, #0 8007f9e: 60f8 str r0, [r7, #12] 8007fa0: 60b9 str r1, [r7, #8] 8007fa2: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8007fa4: 2300 movs r3, #0 8007fa6: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 8007fa8: 68fb ldr r3, [r7, #12] 8007faa: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8007fae: 2b01 cmp r3, #1 8007fb0: d101 bne.n 8007fb6 8007fb2: 2302 movs r3, #2 8007fb4: e0ae b.n 8008114 8007fb6: 68fb ldr r3, [r7, #12] 8007fb8: 2201 movs r2, #1 8007fba: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8007fbe: 687b ldr r3, [r7, #4] 8007fc0: 2b0c cmp r3, #12 8007fc2: f200 809f bhi.w 8008104 8007fc6: a201 add r2, pc, #4 @ (adr r2, 8007fcc ) 8007fc8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8007fcc: 08008001 .word 0x08008001 8007fd0: 08008105 .word 0x08008105 8007fd4: 08008105 .word 0x08008105 8007fd8: 08008105 .word 0x08008105 8007fdc: 08008041 .word 0x08008041 8007fe0: 08008105 .word 0x08008105 8007fe4: 08008105 .word 0x08008105 8007fe8: 08008105 .word 0x08008105 8007fec: 08008083 .word 0x08008083 8007ff0: 08008105 .word 0x08008105 8007ff4: 08008105 .word 0x08008105 8007ff8: 08008105 .word 0x08008105 8007ffc: 080080c3 .word 0x080080c3 { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8008000: 68fb ldr r3, [r7, #12] 8008002: 681b ldr r3, [r3, #0] 8008004: 68b9 ldr r1, [r7, #8] 8008006: 4618 mov r0, r3 8008008: f000 f9e6 bl 80083d8 /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 800800c: 68fb ldr r3, [r7, #12] 800800e: 681b ldr r3, [r3, #0] 8008010: 699a ldr r2, [r3, #24] 8008012: 68fb ldr r3, [r7, #12] 8008014: 681b ldr r3, [r3, #0] 8008016: f042 0208 orr.w r2, r2, #8 800801a: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 800801c: 68fb ldr r3, [r7, #12] 800801e: 681b ldr r3, [r3, #0] 8008020: 699a ldr r2, [r3, #24] 8008022: 68fb ldr r3, [r7, #12] 8008024: 681b ldr r3, [r3, #0] 8008026: f022 0204 bic.w r2, r2, #4 800802a: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 800802c: 68fb ldr r3, [r7, #12] 800802e: 681b ldr r3, [r3, #0] 8008030: 6999 ldr r1, [r3, #24] 8008032: 68bb ldr r3, [r7, #8] 8008034: 691a ldr r2, [r3, #16] 8008036: 68fb ldr r3, [r7, #12] 8008038: 681b ldr r3, [r3, #0] 800803a: 430a orrs r2, r1 800803c: 619a str r2, [r3, #24] break; 800803e: e064 b.n 800810a { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 8008040: 68fb ldr r3, [r7, #12] 8008042: 681b ldr r3, [r3, #0] 8008044: 68b9 ldr r1, [r7, #8] 8008046: 4618 mov r0, r3 8008048: f000 fa2c bl 80084a4 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 800804c: 68fb ldr r3, [r7, #12] 800804e: 681b ldr r3, [r3, #0] 8008050: 699a ldr r2, [r3, #24] 8008052: 68fb ldr r3, [r7, #12] 8008054: 681b ldr r3, [r3, #0] 8008056: f442 6200 orr.w r2, r2, #2048 @ 0x800 800805a: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 800805c: 68fb ldr r3, [r7, #12] 800805e: 681b ldr r3, [r3, #0] 8008060: 699a ldr r2, [r3, #24] 8008062: 68fb ldr r3, [r7, #12] 8008064: 681b ldr r3, [r3, #0] 8008066: f422 6280 bic.w r2, r2, #1024 @ 0x400 800806a: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 800806c: 68fb ldr r3, [r7, #12] 800806e: 681b ldr r3, [r3, #0] 8008070: 6999 ldr r1, [r3, #24] 8008072: 68bb ldr r3, [r7, #8] 8008074: 691b ldr r3, [r3, #16] 8008076: 021a lsls r2, r3, #8 8008078: 68fb ldr r3, [r7, #12] 800807a: 681b ldr r3, [r3, #0] 800807c: 430a orrs r2, r1 800807e: 619a str r2, [r3, #24] break; 8008080: e043 b.n 800810a { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 8008082: 68fb ldr r3, [r7, #12] 8008084: 681b ldr r3, [r3, #0] 8008086: 68b9 ldr r1, [r7, #8] 8008088: 4618 mov r0, r3 800808a: f000 fa75 bl 8008578 /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 800808e: 68fb ldr r3, [r7, #12] 8008090: 681b ldr r3, [r3, #0] 8008092: 69da ldr r2, [r3, #28] 8008094: 68fb ldr r3, [r7, #12] 8008096: 681b ldr r3, [r3, #0] 8008098: f042 0208 orr.w r2, r2, #8 800809c: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 800809e: 68fb ldr r3, [r7, #12] 80080a0: 681b ldr r3, [r3, #0] 80080a2: 69da ldr r2, [r3, #28] 80080a4: 68fb ldr r3, [r7, #12] 80080a6: 681b ldr r3, [r3, #0] 80080a8: f022 0204 bic.w r2, r2, #4 80080ac: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 80080ae: 68fb ldr r3, [r7, #12] 80080b0: 681b ldr r3, [r3, #0] 80080b2: 69d9 ldr r1, [r3, #28] 80080b4: 68bb ldr r3, [r7, #8] 80080b6: 691a ldr r2, [r3, #16] 80080b8: 68fb ldr r3, [r7, #12] 80080ba: 681b ldr r3, [r3, #0] 80080bc: 430a orrs r2, r1 80080be: 61da str r2, [r3, #28] break; 80080c0: e023 b.n 800810a { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 80080c2: 68fb ldr r3, [r7, #12] 80080c4: 681b ldr r3, [r3, #0] 80080c6: 68b9 ldr r1, [r7, #8] 80080c8: 4618 mov r0, r3 80080ca: f000 fabf bl 800864c /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 80080ce: 68fb ldr r3, [r7, #12] 80080d0: 681b ldr r3, [r3, #0] 80080d2: 69da ldr r2, [r3, #28] 80080d4: 68fb ldr r3, [r7, #12] 80080d6: 681b ldr r3, [r3, #0] 80080d8: f442 6200 orr.w r2, r2, #2048 @ 0x800 80080dc: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 80080de: 68fb ldr r3, [r7, #12] 80080e0: 681b ldr r3, [r3, #0] 80080e2: 69da ldr r2, [r3, #28] 80080e4: 68fb ldr r3, [r7, #12] 80080e6: 681b ldr r3, [r3, #0] 80080e8: f422 6280 bic.w r2, r2, #1024 @ 0x400 80080ec: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 80080ee: 68fb ldr r3, [r7, #12] 80080f0: 681b ldr r3, [r3, #0] 80080f2: 69d9 ldr r1, [r3, #28] 80080f4: 68bb ldr r3, [r7, #8] 80080f6: 691b ldr r3, [r3, #16] 80080f8: 021a lsls r2, r3, #8 80080fa: 68fb ldr r3, [r7, #12] 80080fc: 681b ldr r3, [r3, #0] 80080fe: 430a orrs r2, r1 8008100: 61da str r2, [r3, #28] break; 8008102: e002 b.n 800810a } default: status = HAL_ERROR; 8008104: 2301 movs r3, #1 8008106: 75fb strb r3, [r7, #23] break; 8008108: bf00 nop } __HAL_UNLOCK(htim); 800810a: 68fb ldr r3, [r7, #12] 800810c: 2200 movs r2, #0 800810e: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8008112: 7dfb ldrb r3, [r7, #23] } 8008114: 4618 mov r0, r3 8008116: 3718 adds r7, #24 8008118: 46bd mov sp, r7 800811a: bd80 pop {r7, pc} 0800811c : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 800811c: b580 push {r7, lr} 800811e: b084 sub sp, #16 8008120: af00 add r7, sp, #0 8008122: 6078 str r0, [r7, #4] 8008124: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 8008126: 2300 movs r3, #0 8008128: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 800812a: 687b ldr r3, [r7, #4] 800812c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8008130: 2b01 cmp r3, #1 8008132: d101 bne.n 8008138 8008134: 2302 movs r3, #2 8008136: e0b4 b.n 80082a2 8008138: 687b ldr r3, [r7, #4] 800813a: 2201 movs r2, #1 800813c: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 8008140: 687b ldr r3, [r7, #4] 8008142: 2202 movs r2, #2 8008144: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 8008148: 687b ldr r3, [r7, #4] 800814a: 681b ldr r3, [r3, #0] 800814c: 689b ldr r3, [r3, #8] 800814e: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 8008150: 68bb ldr r3, [r7, #8] 8008152: f023 0377 bic.w r3, r3, #119 @ 0x77 8008156: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8008158: 68bb ldr r3, [r7, #8] 800815a: f423 437f bic.w r3, r3, #65280 @ 0xff00 800815e: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 8008160: 687b ldr r3, [r7, #4] 8008162: 681b ldr r3, [r3, #0] 8008164: 68ba ldr r2, [r7, #8] 8008166: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 8008168: 683b ldr r3, [r7, #0] 800816a: 681b ldr r3, [r3, #0] 800816c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8008170: d03e beq.n 80081f0 8008172: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8008176: f200 8087 bhi.w 8008288 800817a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 800817e: f000 8086 beq.w 800828e 8008182: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8008186: d87f bhi.n 8008288 8008188: 2b70 cmp r3, #112 @ 0x70 800818a: d01a beq.n 80081c2 800818c: 2b70 cmp r3, #112 @ 0x70 800818e: d87b bhi.n 8008288 8008190: 2b60 cmp r3, #96 @ 0x60 8008192: d050 beq.n 8008236 8008194: 2b60 cmp r3, #96 @ 0x60 8008196: d877 bhi.n 8008288 8008198: 2b50 cmp r3, #80 @ 0x50 800819a: d03c beq.n 8008216 800819c: 2b50 cmp r3, #80 @ 0x50 800819e: d873 bhi.n 8008288 80081a0: 2b40 cmp r3, #64 @ 0x40 80081a2: d058 beq.n 8008256 80081a4: 2b40 cmp r3, #64 @ 0x40 80081a6: d86f bhi.n 8008288 80081a8: 2b30 cmp r3, #48 @ 0x30 80081aa: d064 beq.n 8008276 80081ac: 2b30 cmp r3, #48 @ 0x30 80081ae: d86b bhi.n 8008288 80081b0: 2b20 cmp r3, #32 80081b2: d060 beq.n 8008276 80081b4: 2b20 cmp r3, #32 80081b6: d867 bhi.n 8008288 80081b8: 2b00 cmp r3, #0 80081ba: d05c beq.n 8008276 80081bc: 2b10 cmp r3, #16 80081be: d05a beq.n 8008276 80081c0: e062 b.n 8008288 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 80081c2: 687b ldr r3, [r7, #4] 80081c4: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 80081c6: 683b ldr r3, [r7, #0] 80081c8: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 80081ca: 683b ldr r3, [r7, #0] 80081cc: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 80081ce: 683b ldr r3, [r7, #0] 80081d0: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 80081d2: f000 fb00 bl 80087d6 /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 80081d6: 687b ldr r3, [r7, #4] 80081d8: 681b ldr r3, [r3, #0] 80081da: 689b ldr r3, [r3, #8] 80081dc: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 80081de: 68bb ldr r3, [r7, #8] 80081e0: f043 0377 orr.w r3, r3, #119 @ 0x77 80081e4: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80081e6: 687b ldr r3, [r7, #4] 80081e8: 681b ldr r3, [r3, #0] 80081ea: 68ba ldr r2, [r7, #8] 80081ec: 609a str r2, [r3, #8] break; 80081ee: e04f b.n 8008290 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 80081f0: 687b ldr r3, [r7, #4] 80081f2: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 80081f4: 683b ldr r3, [r7, #0] 80081f6: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 80081f8: 683b ldr r3, [r7, #0] 80081fa: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 80081fc: 683b ldr r3, [r7, #0] 80081fe: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8008200: f000 fae9 bl 80087d6 /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 8008204: 687b ldr r3, [r7, #4] 8008206: 681b ldr r3, [r3, #0] 8008208: 689a ldr r2, [r3, #8] 800820a: 687b ldr r3, [r7, #4] 800820c: 681b ldr r3, [r3, #0] 800820e: f442 4280 orr.w r2, r2, #16384 @ 0x4000 8008212: 609a str r2, [r3, #8] break; 8008214: e03c b.n 8008290 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8008216: 687b ldr r3, [r7, #4] 8008218: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 800821a: 683b ldr r3, [r7, #0] 800821c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 800821e: 683b ldr r3, [r7, #0] 8008220: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8008222: 461a mov r2, r3 8008224: f000 fa60 bl 80086e8 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 8008228: 687b ldr r3, [r7, #4] 800822a: 681b ldr r3, [r3, #0] 800822c: 2150 movs r1, #80 @ 0x50 800822e: 4618 mov r0, r3 8008230: f000 fab7 bl 80087a2 break; 8008234: e02c b.n 8008290 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 8008236: 687b ldr r3, [r7, #4] 8008238: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 800823a: 683b ldr r3, [r7, #0] 800823c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 800823e: 683b ldr r3, [r7, #0] 8008240: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 8008242: 461a mov r2, r3 8008244: f000 fa7e bl 8008744 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 8008248: 687b ldr r3, [r7, #4] 800824a: 681b ldr r3, [r3, #0] 800824c: 2160 movs r1, #96 @ 0x60 800824e: 4618 mov r0, r3 8008250: f000 faa7 bl 80087a2 break; 8008254: e01c b.n 8008290 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 8008256: 687b ldr r3, [r7, #4] 8008258: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 800825a: 683b ldr r3, [r7, #0] 800825c: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 800825e: 683b ldr r3, [r7, #0] 8008260: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8008262: 461a mov r2, r3 8008264: f000 fa40 bl 80086e8 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 8008268: 687b ldr r3, [r7, #4] 800826a: 681b ldr r3, [r3, #0] 800826c: 2140 movs r1, #64 @ 0x40 800826e: 4618 mov r0, r3 8008270: f000 fa97 bl 80087a2 break; 8008274: e00c b.n 8008290 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 8008276: 687b ldr r3, [r7, #4] 8008278: 681a ldr r2, [r3, #0] 800827a: 683b ldr r3, [r7, #0] 800827c: 681b ldr r3, [r3, #0] 800827e: 4619 mov r1, r3 8008280: 4610 mov r0, r2 8008282: f000 fa8e bl 80087a2 break; 8008286: e003 b.n 8008290 } default: status = HAL_ERROR; 8008288: 2301 movs r3, #1 800828a: 73fb strb r3, [r7, #15] break; 800828c: e000 b.n 8008290 break; 800828e: bf00 nop } htim->State = HAL_TIM_STATE_READY; 8008290: 687b ldr r3, [r7, #4] 8008292: 2201 movs r2, #1 8008294: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8008298: 687b ldr r3, [r7, #4] 800829a: 2200 movs r2, #0 800829c: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 80082a0: 7bfb ldrb r3, [r7, #15] } 80082a2: 4618 mov r0, r3 80082a4: 3710 adds r7, #16 80082a6: 46bd mov sp, r7 80082a8: bd80 pop {r7, pc} 080082aa : * @arg TIM_CHANNEL_5: TIM Channel 5 * @arg TIM_CHANNEL_6: TIM Channel 6 * @retval TIM Channel state */ HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel) { 80082aa: b480 push {r7} 80082ac: b085 sub sp, #20 80082ae: af00 add r7, sp, #0 80082b0: 6078 str r0, [r7, #4] 80082b2: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef channel_state; /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); 80082b4: 683b ldr r3, [r7, #0] 80082b6: 2b00 cmp r3, #0 80082b8: d104 bne.n 80082c4 80082ba: 687b ldr r3, [r7, #4] 80082bc: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 80082c0: b2db uxtb r3, r3 80082c2: e013 b.n 80082ec 80082c4: 683b ldr r3, [r7, #0] 80082c6: 2b04 cmp r3, #4 80082c8: d104 bne.n 80082d4 80082ca: 687b ldr r3, [r7, #4] 80082cc: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 80082d0: b2db uxtb r3, r3 80082d2: e00b b.n 80082ec 80082d4: 683b ldr r3, [r7, #0] 80082d6: 2b08 cmp r3, #8 80082d8: d104 bne.n 80082e4 80082da: 687b ldr r3, [r7, #4] 80082dc: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 80082e0: b2db uxtb r3, r3 80082e2: e003 b.n 80082ec 80082e4: 687b ldr r3, [r7, #4] 80082e6: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80082ea: b2db uxtb r3, r3 80082ec: 73fb strb r3, [r7, #15] return channel_state; 80082ee: 7bfb ldrb r3, [r7, #15] } 80082f0: 4618 mov r0, r3 80082f2: 3714 adds r7, #20 80082f4: 46bd mov sp, r7 80082f6: bc80 pop {r7} 80082f8: 4770 bx lr ... 080082fc : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 80082fc: b480 push {r7} 80082fe: b085 sub sp, #20 8008300: af00 add r7, sp, #0 8008302: 6078 str r0, [r7, #4] 8008304: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 8008306: 687b ldr r3, [r7, #4] 8008308: 681b ldr r3, [r3, #0] 800830a: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 800830c: 687b ldr r3, [r7, #4] 800830e: 4a2f ldr r2, [pc, #188] @ (80083cc ) 8008310: 4293 cmp r3, r2 8008312: d00b beq.n 800832c 8008314: 687b ldr r3, [r7, #4] 8008316: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 800831a: d007 beq.n 800832c 800831c: 687b ldr r3, [r7, #4] 800831e: 4a2c ldr r2, [pc, #176] @ (80083d0 ) 8008320: 4293 cmp r3, r2 8008322: d003 beq.n 800832c 8008324: 687b ldr r3, [r7, #4] 8008326: 4a2b ldr r2, [pc, #172] @ (80083d4 ) 8008328: 4293 cmp r3, r2 800832a: d108 bne.n 800833e { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 800832c: 68fb ldr r3, [r7, #12] 800832e: f023 0370 bic.w r3, r3, #112 @ 0x70 8008332: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 8008334: 683b ldr r3, [r7, #0] 8008336: 685b ldr r3, [r3, #4] 8008338: 68fa ldr r2, [r7, #12] 800833a: 4313 orrs r3, r2 800833c: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800833e: 687b ldr r3, [r7, #4] 8008340: 4a22 ldr r2, [pc, #136] @ (80083cc ) 8008342: 4293 cmp r3, r2 8008344: d00b beq.n 800835e 8008346: 687b ldr r3, [r7, #4] 8008348: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 800834c: d007 beq.n 800835e 800834e: 687b ldr r3, [r7, #4] 8008350: 4a1f ldr r2, [pc, #124] @ (80083d0 ) 8008352: 4293 cmp r3, r2 8008354: d003 beq.n 800835e 8008356: 687b ldr r3, [r7, #4] 8008358: 4a1e ldr r2, [pc, #120] @ (80083d4 ) 800835a: 4293 cmp r3, r2 800835c: d108 bne.n 8008370 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 800835e: 68fb ldr r3, [r7, #12] 8008360: f423 7340 bic.w r3, r3, #768 @ 0x300 8008364: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 8008366: 683b ldr r3, [r7, #0] 8008368: 68db ldr r3, [r3, #12] 800836a: 68fa ldr r2, [r7, #12] 800836c: 4313 orrs r3, r2 800836e: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 8008370: 68fb ldr r3, [r7, #12] 8008372: f023 0280 bic.w r2, r3, #128 @ 0x80 8008376: 683b ldr r3, [r7, #0] 8008378: 695b ldr r3, [r3, #20] 800837a: 4313 orrs r3, r2 800837c: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 800837e: 687b ldr r3, [r7, #4] 8008380: 68fa ldr r2, [r7, #12] 8008382: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8008384: 683b ldr r3, [r7, #0] 8008386: 689a ldr r2, [r3, #8] 8008388: 687b ldr r3, [r7, #4] 800838a: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 800838c: 683b ldr r3, [r7, #0] 800838e: 681a ldr r2, [r3, #0] 8008390: 687b ldr r3, [r7, #4] 8008392: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8008394: 687b ldr r3, [r7, #4] 8008396: 4a0d ldr r2, [pc, #52] @ (80083cc ) 8008398: 4293 cmp r3, r2 800839a: d103 bne.n 80083a4 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 800839c: 683b ldr r3, [r7, #0] 800839e: 691a ldr r2, [r3, #16] 80083a0: 687b ldr r3, [r7, #4] 80083a2: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 80083a4: 687b ldr r3, [r7, #4] 80083a6: 2201 movs r2, #1 80083a8: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 80083aa: 687b ldr r3, [r7, #4] 80083ac: 691b ldr r3, [r3, #16] 80083ae: f003 0301 and.w r3, r3, #1 80083b2: 2b00 cmp r3, #0 80083b4: d005 beq.n 80083c2 { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 80083b6: 687b ldr r3, [r7, #4] 80083b8: 691b ldr r3, [r3, #16] 80083ba: f023 0201 bic.w r2, r3, #1 80083be: 687b ldr r3, [r7, #4] 80083c0: 611a str r2, [r3, #16] } } 80083c2: bf00 nop 80083c4: 3714 adds r7, #20 80083c6: 46bd mov sp, r7 80083c8: bc80 pop {r7} 80083ca: 4770 bx lr 80083cc: 40012c00 .word 0x40012c00 80083d0: 40000400 .word 0x40000400 80083d4: 40000800 .word 0x40000800 080083d8 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80083d8: b480 push {r7} 80083da: b087 sub sp, #28 80083dc: af00 add r7, sp, #0 80083de: 6078 str r0, [r7, #4] 80083e0: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80083e2: 687b ldr r3, [r7, #4] 80083e4: 6a1b ldr r3, [r3, #32] 80083e6: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 80083e8: 687b ldr r3, [r7, #4] 80083ea: 6a1b ldr r3, [r3, #32] 80083ec: f023 0201 bic.w r2, r3, #1 80083f0: 687b ldr r3, [r7, #4] 80083f2: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80083f4: 687b ldr r3, [r7, #4] 80083f6: 685b ldr r3, [r3, #4] 80083f8: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 80083fa: 687b ldr r3, [r7, #4] 80083fc: 699b ldr r3, [r3, #24] 80083fe: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 8008400: 68fb ldr r3, [r7, #12] 8008402: f023 0370 bic.w r3, r3, #112 @ 0x70 8008406: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 8008408: 68fb ldr r3, [r7, #12] 800840a: f023 0303 bic.w r3, r3, #3 800840e: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8008410: 683b ldr r3, [r7, #0] 8008412: 681b ldr r3, [r3, #0] 8008414: 68fa ldr r2, [r7, #12] 8008416: 4313 orrs r3, r2 8008418: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 800841a: 697b ldr r3, [r7, #20] 800841c: f023 0302 bic.w r3, r3, #2 8008420: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 8008422: 683b ldr r3, [r7, #0] 8008424: 689b ldr r3, [r3, #8] 8008426: 697a ldr r2, [r7, #20] 8008428: 4313 orrs r3, r2 800842a: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 800842c: 687b ldr r3, [r7, #4] 800842e: 4a1c ldr r2, [pc, #112] @ (80084a0 ) 8008430: 4293 cmp r3, r2 8008432: d10c bne.n 800844e { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 8008434: 697b ldr r3, [r7, #20] 8008436: f023 0308 bic.w r3, r3, #8 800843a: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 800843c: 683b ldr r3, [r7, #0] 800843e: 68db ldr r3, [r3, #12] 8008440: 697a ldr r2, [r7, #20] 8008442: 4313 orrs r3, r2 8008444: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 8008446: 697b ldr r3, [r7, #20] 8008448: f023 0304 bic.w r3, r3, #4 800844c: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 800844e: 687b ldr r3, [r7, #4] 8008450: 4a13 ldr r2, [pc, #76] @ (80084a0 ) 8008452: 4293 cmp r3, r2 8008454: d111 bne.n 800847a /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 8008456: 693b ldr r3, [r7, #16] 8008458: f423 7380 bic.w r3, r3, #256 @ 0x100 800845c: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 800845e: 693b ldr r3, [r7, #16] 8008460: f423 7300 bic.w r3, r3, #512 @ 0x200 8008464: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 8008466: 683b ldr r3, [r7, #0] 8008468: 695b ldr r3, [r3, #20] 800846a: 693a ldr r2, [r7, #16] 800846c: 4313 orrs r3, r2 800846e: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 8008470: 683b ldr r3, [r7, #0] 8008472: 699b ldr r3, [r3, #24] 8008474: 693a ldr r2, [r7, #16] 8008476: 4313 orrs r3, r2 8008478: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800847a: 687b ldr r3, [r7, #4] 800847c: 693a ldr r2, [r7, #16] 800847e: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8008480: 687b ldr r3, [r7, #4] 8008482: 68fa ldr r2, [r7, #12] 8008484: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 8008486: 683b ldr r3, [r7, #0] 8008488: 685a ldr r2, [r3, #4] 800848a: 687b ldr r3, [r7, #4] 800848c: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 800848e: 687b ldr r3, [r7, #4] 8008490: 697a ldr r2, [r7, #20] 8008492: 621a str r2, [r3, #32] } 8008494: bf00 nop 8008496: 371c adds r7, #28 8008498: 46bd mov sp, r7 800849a: bc80 pop {r7} 800849c: 4770 bx lr 800849e: bf00 nop 80084a0: 40012c00 .word 0x40012c00 080084a4 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80084a4: b480 push {r7} 80084a6: b087 sub sp, #28 80084a8: af00 add r7, sp, #0 80084aa: 6078 str r0, [r7, #4] 80084ac: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80084ae: 687b ldr r3, [r7, #4] 80084b0: 6a1b ldr r3, [r3, #32] 80084b2: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 80084b4: 687b ldr r3, [r7, #4] 80084b6: 6a1b ldr r3, [r3, #32] 80084b8: f023 0210 bic.w r2, r3, #16 80084bc: 687b ldr r3, [r7, #4] 80084be: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80084c0: 687b ldr r3, [r7, #4] 80084c2: 685b ldr r3, [r3, #4] 80084c4: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 80084c6: 687b ldr r3, [r7, #4] 80084c8: 699b ldr r3, [r3, #24] 80084ca: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 80084cc: 68fb ldr r3, [r7, #12] 80084ce: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80084d2: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 80084d4: 68fb ldr r3, [r7, #12] 80084d6: f423 7340 bic.w r3, r3, #768 @ 0x300 80084da: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 80084dc: 683b ldr r3, [r7, #0] 80084de: 681b ldr r3, [r3, #0] 80084e0: 021b lsls r3, r3, #8 80084e2: 68fa ldr r2, [r7, #12] 80084e4: 4313 orrs r3, r2 80084e6: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 80084e8: 697b ldr r3, [r7, #20] 80084ea: f023 0320 bic.w r3, r3, #32 80084ee: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 80084f0: 683b ldr r3, [r7, #0] 80084f2: 689b ldr r3, [r3, #8] 80084f4: 011b lsls r3, r3, #4 80084f6: 697a ldr r2, [r7, #20] 80084f8: 4313 orrs r3, r2 80084fa: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 80084fc: 687b ldr r3, [r7, #4] 80084fe: 4a1d ldr r2, [pc, #116] @ (8008574 ) 8008500: 4293 cmp r3, r2 8008502: d10d bne.n 8008520 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8008504: 697b ldr r3, [r7, #20] 8008506: f023 0380 bic.w r3, r3, #128 @ 0x80 800850a: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 800850c: 683b ldr r3, [r7, #0] 800850e: 68db ldr r3, [r3, #12] 8008510: 011b lsls r3, r3, #4 8008512: 697a ldr r2, [r7, #20] 8008514: 4313 orrs r3, r2 8008516: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8008518: 697b ldr r3, [r7, #20] 800851a: f023 0340 bic.w r3, r3, #64 @ 0x40 800851e: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8008520: 687b ldr r3, [r7, #4] 8008522: 4a14 ldr r2, [pc, #80] @ (8008574 ) 8008524: 4293 cmp r3, r2 8008526: d113 bne.n 8008550 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 8008528: 693b ldr r3, [r7, #16] 800852a: f423 6380 bic.w r3, r3, #1024 @ 0x400 800852e: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 8008530: 693b ldr r3, [r7, #16] 8008532: f423 6300 bic.w r3, r3, #2048 @ 0x800 8008536: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 8008538: 683b ldr r3, [r7, #0] 800853a: 695b ldr r3, [r3, #20] 800853c: 009b lsls r3, r3, #2 800853e: 693a ldr r2, [r7, #16] 8008540: 4313 orrs r3, r2 8008542: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 8008544: 683b ldr r3, [r7, #0] 8008546: 699b ldr r3, [r3, #24] 8008548: 009b lsls r3, r3, #2 800854a: 693a ldr r2, [r7, #16] 800854c: 4313 orrs r3, r2 800854e: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8008550: 687b ldr r3, [r7, #4] 8008552: 693a ldr r2, [r7, #16] 8008554: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8008556: 687b ldr r3, [r7, #4] 8008558: 68fa ldr r2, [r7, #12] 800855a: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 800855c: 683b ldr r3, [r7, #0] 800855e: 685a ldr r2, [r3, #4] 8008560: 687b ldr r3, [r7, #4] 8008562: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8008564: 687b ldr r3, [r7, #4] 8008566: 697a ldr r2, [r7, #20] 8008568: 621a str r2, [r3, #32] } 800856a: bf00 nop 800856c: 371c adds r7, #28 800856e: 46bd mov sp, r7 8008570: bc80 pop {r7} 8008572: 4770 bx lr 8008574: 40012c00 .word 0x40012c00 08008578 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8008578: b480 push {r7} 800857a: b087 sub sp, #28 800857c: af00 add r7, sp, #0 800857e: 6078 str r0, [r7, #4] 8008580: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8008582: 687b ldr r3, [r7, #4] 8008584: 6a1b ldr r3, [r3, #32] 8008586: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 8008588: 687b ldr r3, [r7, #4] 800858a: 6a1b ldr r3, [r3, #32] 800858c: f423 7280 bic.w r2, r3, #256 @ 0x100 8008590: 687b ldr r3, [r7, #4] 8008592: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8008594: 687b ldr r3, [r7, #4] 8008596: 685b ldr r3, [r3, #4] 8008598: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 800859a: 687b ldr r3, [r7, #4] 800859c: 69db ldr r3, [r3, #28] 800859e: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 80085a0: 68fb ldr r3, [r7, #12] 80085a2: f023 0370 bic.w r3, r3, #112 @ 0x70 80085a6: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 80085a8: 68fb ldr r3, [r7, #12] 80085aa: f023 0303 bic.w r3, r3, #3 80085ae: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 80085b0: 683b ldr r3, [r7, #0] 80085b2: 681b ldr r3, [r3, #0] 80085b4: 68fa ldr r2, [r7, #12] 80085b6: 4313 orrs r3, r2 80085b8: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 80085ba: 697b ldr r3, [r7, #20] 80085bc: f423 7300 bic.w r3, r3, #512 @ 0x200 80085c0: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 80085c2: 683b ldr r3, [r7, #0] 80085c4: 689b ldr r3, [r3, #8] 80085c6: 021b lsls r3, r3, #8 80085c8: 697a ldr r2, [r7, #20] 80085ca: 4313 orrs r3, r2 80085cc: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 80085ce: 687b ldr r3, [r7, #4] 80085d0: 4a1d ldr r2, [pc, #116] @ (8008648 ) 80085d2: 4293 cmp r3, r2 80085d4: d10d bne.n 80085f2 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 80085d6: 697b ldr r3, [r7, #20] 80085d8: f423 6300 bic.w r3, r3, #2048 @ 0x800 80085dc: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 80085de: 683b ldr r3, [r7, #0] 80085e0: 68db ldr r3, [r3, #12] 80085e2: 021b lsls r3, r3, #8 80085e4: 697a ldr r2, [r7, #20] 80085e6: 4313 orrs r3, r2 80085e8: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 80085ea: 697b ldr r3, [r7, #20] 80085ec: f423 6380 bic.w r3, r3, #1024 @ 0x400 80085f0: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80085f2: 687b ldr r3, [r7, #4] 80085f4: 4a14 ldr r2, [pc, #80] @ (8008648 ) 80085f6: 4293 cmp r3, r2 80085f8: d113 bne.n 8008622 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 80085fa: 693b ldr r3, [r7, #16] 80085fc: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8008600: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 8008602: 693b ldr r3, [r7, #16] 8008604: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8008608: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 800860a: 683b ldr r3, [r7, #0] 800860c: 695b ldr r3, [r3, #20] 800860e: 011b lsls r3, r3, #4 8008610: 693a ldr r2, [r7, #16] 8008612: 4313 orrs r3, r2 8008614: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 8008616: 683b ldr r3, [r7, #0] 8008618: 699b ldr r3, [r3, #24] 800861a: 011b lsls r3, r3, #4 800861c: 693a ldr r2, [r7, #16] 800861e: 4313 orrs r3, r2 8008620: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8008622: 687b ldr r3, [r7, #4] 8008624: 693a ldr r2, [r7, #16] 8008626: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8008628: 687b ldr r3, [r7, #4] 800862a: 68fa ldr r2, [r7, #12] 800862c: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 800862e: 683b ldr r3, [r7, #0] 8008630: 685a ldr r2, [r3, #4] 8008632: 687b ldr r3, [r7, #4] 8008634: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8008636: 687b ldr r3, [r7, #4] 8008638: 697a ldr r2, [r7, #20] 800863a: 621a str r2, [r3, #32] } 800863c: bf00 nop 800863e: 371c adds r7, #28 8008640: 46bd mov sp, r7 8008642: bc80 pop {r7} 8008644: 4770 bx lr 8008646: bf00 nop 8008648: 40012c00 .word 0x40012c00 0800864c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 800864c: b480 push {r7} 800864e: b087 sub sp, #28 8008650: af00 add r7, sp, #0 8008652: 6078 str r0, [r7, #4] 8008654: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8008656: 687b ldr r3, [r7, #4] 8008658: 6a1b ldr r3, [r3, #32] 800865a: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 800865c: 687b ldr r3, [r7, #4] 800865e: 6a1b ldr r3, [r3, #32] 8008660: f423 5280 bic.w r2, r3, #4096 @ 0x1000 8008664: 687b ldr r3, [r7, #4] 8008666: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8008668: 687b ldr r3, [r7, #4] 800866a: 685b ldr r3, [r3, #4] 800866c: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 800866e: 687b ldr r3, [r7, #4] 8008670: 69db ldr r3, [r3, #28] 8008672: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 8008674: 68fb ldr r3, [r7, #12] 8008676: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800867a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 800867c: 68fb ldr r3, [r7, #12] 800867e: f423 7340 bic.w r3, r3, #768 @ 0x300 8008682: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8008684: 683b ldr r3, [r7, #0] 8008686: 681b ldr r3, [r3, #0] 8008688: 021b lsls r3, r3, #8 800868a: 68fa ldr r2, [r7, #12] 800868c: 4313 orrs r3, r2 800868e: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 8008690: 693b ldr r3, [r7, #16] 8008692: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8008696: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8008698: 683b ldr r3, [r7, #0] 800869a: 689b ldr r3, [r3, #8] 800869c: 031b lsls r3, r3, #12 800869e: 693a ldr r2, [r7, #16] 80086a0: 4313 orrs r3, r2 80086a2: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 80086a4: 687b ldr r3, [r7, #4] 80086a6: 4a0f ldr r2, [pc, #60] @ (80086e4 ) 80086a8: 4293 cmp r3, r2 80086aa: d109 bne.n 80086c0 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 80086ac: 697b ldr r3, [r7, #20] 80086ae: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80086b2: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 80086b4: 683b ldr r3, [r7, #0] 80086b6: 695b ldr r3, [r3, #20] 80086b8: 019b lsls r3, r3, #6 80086ba: 697a ldr r2, [r7, #20] 80086bc: 4313 orrs r3, r2 80086be: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80086c0: 687b ldr r3, [r7, #4] 80086c2: 697a ldr r2, [r7, #20] 80086c4: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 80086c6: 687b ldr r3, [r7, #4] 80086c8: 68fa ldr r2, [r7, #12] 80086ca: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 80086cc: 683b ldr r3, [r7, #0] 80086ce: 685a ldr r2, [r3, #4] 80086d0: 687b ldr r3, [r7, #4] 80086d2: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80086d4: 687b ldr r3, [r7, #4] 80086d6: 693a ldr r2, [r7, #16] 80086d8: 621a str r2, [r3, #32] } 80086da: bf00 nop 80086dc: 371c adds r7, #28 80086de: 46bd mov sp, r7 80086e0: bc80 pop {r7} 80086e2: 4770 bx lr 80086e4: 40012c00 .word 0x40012c00 080086e8 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 80086e8: b480 push {r7} 80086ea: b087 sub sp, #28 80086ec: af00 add r7, sp, #0 80086ee: 60f8 str r0, [r7, #12] 80086f0: 60b9 str r1, [r7, #8] 80086f2: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 80086f4: 68fb ldr r3, [r7, #12] 80086f6: 6a1b ldr r3, [r3, #32] 80086f8: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 80086fa: 68fb ldr r3, [r7, #12] 80086fc: 6a1b ldr r3, [r3, #32] 80086fe: f023 0201 bic.w r2, r3, #1 8008702: 68fb ldr r3, [r7, #12] 8008704: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8008706: 68fb ldr r3, [r7, #12] 8008708: 699b ldr r3, [r3, #24] 800870a: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 800870c: 693b ldr r3, [r7, #16] 800870e: f023 03f0 bic.w r3, r3, #240 @ 0xf0 8008712: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 8008714: 687b ldr r3, [r7, #4] 8008716: 011b lsls r3, r3, #4 8008718: 693a ldr r2, [r7, #16] 800871a: 4313 orrs r3, r2 800871c: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 800871e: 697b ldr r3, [r7, #20] 8008720: f023 030a bic.w r3, r3, #10 8008724: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 8008726: 697a ldr r2, [r7, #20] 8008728: 68bb ldr r3, [r7, #8] 800872a: 4313 orrs r3, r2 800872c: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 800872e: 68fb ldr r3, [r7, #12] 8008730: 693a ldr r2, [r7, #16] 8008732: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8008734: 68fb ldr r3, [r7, #12] 8008736: 697a ldr r2, [r7, #20] 8008738: 621a str r2, [r3, #32] } 800873a: bf00 nop 800873c: 371c adds r7, #28 800873e: 46bd mov sp, r7 8008740: bc80 pop {r7} 8008742: 4770 bx lr 08008744 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8008744: b480 push {r7} 8008746: b087 sub sp, #28 8008748: af00 add r7, sp, #0 800874a: 60f8 str r0, [r7, #12] 800874c: 60b9 str r1, [r7, #8] 800874e: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 8008750: 68fb ldr r3, [r7, #12] 8008752: 6a1b ldr r3, [r3, #32] 8008754: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 8008756: 68fb ldr r3, [r7, #12] 8008758: 6a1b ldr r3, [r3, #32] 800875a: f023 0210 bic.w r2, r3, #16 800875e: 68fb ldr r3, [r7, #12] 8008760: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8008762: 68fb ldr r3, [r7, #12] 8008764: 699b ldr r3, [r3, #24] 8008766: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 8008768: 693b ldr r3, [r7, #16] 800876a: f423 4370 bic.w r3, r3, #61440 @ 0xf000 800876e: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 8008770: 687b ldr r3, [r7, #4] 8008772: 031b lsls r3, r3, #12 8008774: 693a ldr r2, [r7, #16] 8008776: 4313 orrs r3, r2 8008778: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 800877a: 697b ldr r3, [r7, #20] 800877c: f023 03a0 bic.w r3, r3, #160 @ 0xa0 8008780: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 8008782: 68bb ldr r3, [r7, #8] 8008784: 011b lsls r3, r3, #4 8008786: 697a ldr r2, [r7, #20] 8008788: 4313 orrs r3, r2 800878a: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 800878c: 68fb ldr r3, [r7, #12] 800878e: 693a ldr r2, [r7, #16] 8008790: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8008792: 68fb ldr r3, [r7, #12] 8008794: 697a ldr r2, [r7, #20] 8008796: 621a str r2, [r3, #32] } 8008798: bf00 nop 800879a: 371c adds r7, #28 800879c: 46bd mov sp, r7 800879e: bc80 pop {r7} 80087a0: 4770 bx lr 080087a2 : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 80087a2: b480 push {r7} 80087a4: b085 sub sp, #20 80087a6: af00 add r7, sp, #0 80087a8: 6078 str r0, [r7, #4] 80087aa: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 80087ac: 687b ldr r3, [r7, #4] 80087ae: 689b ldr r3, [r3, #8] 80087b0: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 80087b2: 68fb ldr r3, [r7, #12] 80087b4: f023 0370 bic.w r3, r3, #112 @ 0x70 80087b8: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 80087ba: 683a ldr r2, [r7, #0] 80087bc: 68fb ldr r3, [r7, #12] 80087be: 4313 orrs r3, r2 80087c0: f043 0307 orr.w r3, r3, #7 80087c4: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 80087c6: 687b ldr r3, [r7, #4] 80087c8: 68fa ldr r2, [r7, #12] 80087ca: 609a str r2, [r3, #8] } 80087cc: bf00 nop 80087ce: 3714 adds r7, #20 80087d0: 46bd mov sp, r7 80087d2: bc80 pop {r7} 80087d4: 4770 bx lr 080087d6 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 80087d6: b480 push {r7} 80087d8: b087 sub sp, #28 80087da: af00 add r7, sp, #0 80087dc: 60f8 str r0, [r7, #12] 80087de: 60b9 str r1, [r7, #8] 80087e0: 607a str r2, [r7, #4] 80087e2: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 80087e4: 68fb ldr r3, [r7, #12] 80087e6: 689b ldr r3, [r3, #8] 80087e8: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 80087ea: 697b ldr r3, [r7, #20] 80087ec: f423 437f bic.w r3, r3, #65280 @ 0xff00 80087f0: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 80087f2: 683b ldr r3, [r7, #0] 80087f4: 021a lsls r2, r3, #8 80087f6: 687b ldr r3, [r7, #4] 80087f8: 431a orrs r2, r3 80087fa: 68bb ldr r3, [r7, #8] 80087fc: 4313 orrs r3, r2 80087fe: 697a ldr r2, [r7, #20] 8008800: 4313 orrs r3, r2 8008802: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8008804: 68fb ldr r3, [r7, #12] 8008806: 697a ldr r2, [r7, #20] 8008808: 609a str r2, [r3, #8] } 800880a: bf00 nop 800880c: 371c adds r7, #28 800880e: 46bd mov sp, r7 8008810: bc80 pop {r7} 8008812: 4770 bx lr 08008814 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 8008814: b480 push {r7} 8008816: b087 sub sp, #28 8008818: af00 add r7, sp, #0 800881a: 60f8 str r0, [r7, #12] 800881c: 60b9 str r1, [r7, #8] 800881e: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 8008820: 68bb ldr r3, [r7, #8] 8008822: f003 031f and.w r3, r3, #31 8008826: 2201 movs r2, #1 8008828: fa02 f303 lsl.w r3, r2, r3 800882c: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 800882e: 68fb ldr r3, [r7, #12] 8008830: 6a1a ldr r2, [r3, #32] 8008832: 697b ldr r3, [r7, #20] 8008834: 43db mvns r3, r3 8008836: 401a ands r2, r3 8008838: 68fb ldr r3, [r7, #12] 800883a: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 800883c: 68fb ldr r3, [r7, #12] 800883e: 6a1a ldr r2, [r3, #32] 8008840: 68bb ldr r3, [r7, #8] 8008842: f003 031f and.w r3, r3, #31 8008846: 6879 ldr r1, [r7, #4] 8008848: fa01 f303 lsl.w r3, r1, r3 800884c: 431a orrs r2, r3 800884e: 68fb ldr r3, [r7, #12] 8008850: 621a str r2, [r3, #32] } 8008852: bf00 nop 8008854: 371c adds r7, #28 8008856: 46bd mov sp, r7 8008858: bc80 pop {r7} 800885a: 4770 bx lr 0800885c : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 800885c: b480 push {r7} 800885e: b085 sub sp, #20 8008860: af00 add r7, sp, #0 8008862: 6078 str r0, [r7, #4] 8008864: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 8008866: 687b ldr r3, [r7, #4] 8008868: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 800886c: 2b01 cmp r3, #1 800886e: d101 bne.n 8008874 8008870: 2302 movs r3, #2 8008872: e046 b.n 8008902 8008874: 687b ldr r3, [r7, #4] 8008876: 2201 movs r2, #1 8008878: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 800887c: 687b ldr r3, [r7, #4] 800887e: 2202 movs r2, #2 8008880: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8008884: 687b ldr r3, [r7, #4] 8008886: 681b ldr r3, [r3, #0] 8008888: 685b ldr r3, [r3, #4] 800888a: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 800888c: 687b ldr r3, [r7, #4] 800888e: 681b ldr r3, [r3, #0] 8008890: 689b ldr r3, [r3, #8] 8008892: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8008894: 68fb ldr r3, [r7, #12] 8008896: f023 0370 bic.w r3, r3, #112 @ 0x70 800889a: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 800889c: 683b ldr r3, [r7, #0] 800889e: 681b ldr r3, [r3, #0] 80088a0: 68fa ldr r2, [r7, #12] 80088a2: 4313 orrs r3, r2 80088a4: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 80088a6: 687b ldr r3, [r7, #4] 80088a8: 681b ldr r3, [r3, #0] 80088aa: 68fa ldr r2, [r7, #12] 80088ac: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 80088ae: 687b ldr r3, [r7, #4] 80088b0: 681b ldr r3, [r3, #0] 80088b2: 4a16 ldr r2, [pc, #88] @ (800890c ) 80088b4: 4293 cmp r3, r2 80088b6: d00e beq.n 80088d6 80088b8: 687b ldr r3, [r7, #4] 80088ba: 681b ldr r3, [r3, #0] 80088bc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80088c0: d009 beq.n 80088d6 80088c2: 687b ldr r3, [r7, #4] 80088c4: 681b ldr r3, [r3, #0] 80088c6: 4a12 ldr r2, [pc, #72] @ (8008910 ) 80088c8: 4293 cmp r3, r2 80088ca: d004 beq.n 80088d6 80088cc: 687b ldr r3, [r7, #4] 80088ce: 681b ldr r3, [r3, #0] 80088d0: 4a10 ldr r2, [pc, #64] @ (8008914 ) 80088d2: 4293 cmp r3, r2 80088d4: d10c bne.n 80088f0 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 80088d6: 68bb ldr r3, [r7, #8] 80088d8: f023 0380 bic.w r3, r3, #128 @ 0x80 80088dc: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 80088de: 683b ldr r3, [r7, #0] 80088e0: 685b ldr r3, [r3, #4] 80088e2: 68ba ldr r2, [r7, #8] 80088e4: 4313 orrs r3, r2 80088e6: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80088e8: 687b ldr r3, [r7, #4] 80088ea: 681b ldr r3, [r3, #0] 80088ec: 68ba ldr r2, [r7, #8] 80088ee: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 80088f0: 687b ldr r3, [r7, #4] 80088f2: 2201 movs r2, #1 80088f4: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 80088f8: 687b ldr r3, [r7, #4] 80088fa: 2200 movs r2, #0 80088fc: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8008900: 2300 movs r3, #0 } 8008902: 4618 mov r0, r3 8008904: 3714 adds r7, #20 8008906: 46bd mov sp, r7 8008908: bc80 pop {r7} 800890a: 4770 bx lr 800890c: 40012c00 .word 0x40012c00 8008910: 40000400 .word 0x40000400 8008914: 40000800 .word 0x40000800 08008918 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8008918: b580 push {r7, lr} 800891a: b082 sub sp, #8 800891c: af00 add r7, sp, #0 800891e: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 8008920: 687b ldr r3, [r7, #4] 8008922: 2b00 cmp r3, #0 8008924: d101 bne.n 800892a { return HAL_ERROR; 8008926: 2301 movs r3, #1 8008928: e042 b.n 80089b0 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 800892a: 687b ldr r3, [r7, #4] 800892c: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8008930: b2db uxtb r3, r3 8008932: 2b00 cmp r3, #0 8008934: d106 bne.n 8008944 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 8008936: 687b ldr r3, [r7, #4] 8008938: 2200 movs r2, #0 800893a: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 800893e: 6878 ldr r0, [r7, #4] 8008940: f7fb fb68 bl 8004014 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 8008944: 687b ldr r3, [r7, #4] 8008946: 2224 movs r2, #36 @ 0x24 8008948: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 800894c: 687b ldr r3, [r7, #4] 800894e: 681b ldr r3, [r3, #0] 8008950: 68da ldr r2, [r3, #12] 8008952: 687b ldr r3, [r7, #4] 8008954: 681b ldr r3, [r3, #0] 8008956: f422 5200 bic.w r2, r2, #8192 @ 0x2000 800895a: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 800895c: 6878 ldr r0, [r7, #4] 800895e: f000 f971 bl 8008c44 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8008962: 687b ldr r3, [r7, #4] 8008964: 681b ldr r3, [r3, #0] 8008966: 691a ldr r2, [r3, #16] 8008968: 687b ldr r3, [r7, #4] 800896a: 681b ldr r3, [r3, #0] 800896c: f422 4290 bic.w r2, r2, #18432 @ 0x4800 8008970: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8008972: 687b ldr r3, [r7, #4] 8008974: 681b ldr r3, [r3, #0] 8008976: 695a ldr r2, [r3, #20] 8008978: 687b ldr r3, [r7, #4] 800897a: 681b ldr r3, [r3, #0] 800897c: f022 022a bic.w r2, r2, #42 @ 0x2a 8008980: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 8008982: 687b ldr r3, [r7, #4] 8008984: 681b ldr r3, [r3, #0] 8008986: 68da ldr r2, [r3, #12] 8008988: 687b ldr r3, [r7, #4] 800898a: 681b ldr r3, [r3, #0] 800898c: f442 5200 orr.w r2, r2, #8192 @ 0x2000 8008990: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8008992: 687b ldr r3, [r7, #4] 8008994: 2200 movs r2, #0 8008996: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 8008998: 687b ldr r3, [r7, #4] 800899a: 2220 movs r2, #32 800899c: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 80089a0: 687b ldr r3, [r7, #4] 80089a2: 2220 movs r2, #32 80089a4: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 80089a8: 687b ldr r3, [r7, #4] 80089aa: 2200 movs r2, #0 80089ac: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 80089ae: 2300 movs r3, #0 } 80089b0: 4618 mov r0, r3 80089b2: 3708 adds r7, #8 80089b4: 46bd mov sp, r7 80089b6: bd80 pop {r7, pc} 080089b8 : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { 80089b8: b580 push {r7, lr} 80089ba: b08a sub sp, #40 @ 0x28 80089bc: af02 add r7, sp, #8 80089be: 60f8 str r0, [r7, #12] 80089c0: 60b9 str r1, [r7, #8] 80089c2: 603b str r3, [r7, #0] 80089c4: 4613 mov r3, r2 80089c6: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; 80089c8: 2300 movs r3, #0 80089ca: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 80089cc: 68fb ldr r3, [r7, #12] 80089ce: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80089d2: b2db uxtb r3, r3 80089d4: 2b20 cmp r3, #32 80089d6: d175 bne.n 8008ac4 { if ((pData == NULL) || (Size == 0U)) 80089d8: 68bb ldr r3, [r7, #8] 80089da: 2b00 cmp r3, #0 80089dc: d002 beq.n 80089e4 80089de: 88fb ldrh r3, [r7, #6] 80089e0: 2b00 cmp r3, #0 80089e2: d101 bne.n 80089e8 { return HAL_ERROR; 80089e4: 2301 movs r3, #1 80089e6: e06e b.n 8008ac6 } huart->ErrorCode = HAL_UART_ERROR_NONE; 80089e8: 68fb ldr r3, [r7, #12] 80089ea: 2200 movs r2, #0 80089ec: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; 80089ee: 68fb ldr r3, [r7, #12] 80089f0: 2221 movs r2, #33 @ 0x21 80089f2: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 80089f6: f7fb fc55 bl 80042a4 80089fa: 6178 str r0, [r7, #20] huart->TxXferSize = Size; 80089fc: 68fb ldr r3, [r7, #12] 80089fe: 88fa ldrh r2, [r7, #6] 8008a00: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 8008a02: 68fb ldr r3, [r7, #12] 8008a04: 88fa ldrh r2, [r7, #6] 8008a06: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8008a08: 68fb ldr r3, [r7, #12] 8008a0a: 689b ldr r3, [r3, #8] 8008a0c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8008a10: d108 bne.n 8008a24 8008a12: 68fb ldr r3, [r7, #12] 8008a14: 691b ldr r3, [r3, #16] 8008a16: 2b00 cmp r3, #0 8008a18: d104 bne.n 8008a24 { pdata8bits = NULL; 8008a1a: 2300 movs r3, #0 8008a1c: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; 8008a1e: 68bb ldr r3, [r7, #8] 8008a20: 61bb str r3, [r7, #24] 8008a22: e003 b.n 8008a2c } else { pdata8bits = pData; 8008a24: 68bb ldr r3, [r7, #8] 8008a26: 61fb str r3, [r7, #28] pdata16bits = NULL; 8008a28: 2300 movs r3, #0 8008a2a: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) 8008a2c: e02e b.n 8008a8c { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 8008a2e: 683b ldr r3, [r7, #0] 8008a30: 9300 str r3, [sp, #0] 8008a32: 697b ldr r3, [r7, #20] 8008a34: 2200 movs r2, #0 8008a36: 2180 movs r1, #128 @ 0x80 8008a38: 68f8 ldr r0, [r7, #12] 8008a3a: f000 f848 bl 8008ace 8008a3e: 4603 mov r3, r0 8008a40: 2b00 cmp r3, #0 8008a42: d005 beq.n 8008a50 { huart->gState = HAL_UART_STATE_READY; 8008a44: 68fb ldr r3, [r7, #12] 8008a46: 2220 movs r2, #32 8008a48: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; 8008a4c: 2303 movs r3, #3 8008a4e: e03a b.n 8008ac6 } if (pdata8bits == NULL) 8008a50: 69fb ldr r3, [r7, #28] 8008a52: 2b00 cmp r3, #0 8008a54: d10b bne.n 8008a6e { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); 8008a56: 69bb ldr r3, [r7, #24] 8008a58: 881b ldrh r3, [r3, #0] 8008a5a: 461a mov r2, r3 8008a5c: 68fb ldr r3, [r7, #12] 8008a5e: 681b ldr r3, [r3, #0] 8008a60: f3c2 0208 ubfx r2, r2, #0, #9 8008a64: 605a str r2, [r3, #4] pdata16bits++; 8008a66: 69bb ldr r3, [r7, #24] 8008a68: 3302 adds r3, #2 8008a6a: 61bb str r3, [r7, #24] 8008a6c: e007 b.n 8008a7e } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); 8008a6e: 69fb ldr r3, [r7, #28] 8008a70: 781a ldrb r2, [r3, #0] 8008a72: 68fb ldr r3, [r7, #12] 8008a74: 681b ldr r3, [r3, #0] 8008a76: 605a str r2, [r3, #4] pdata8bits++; 8008a78: 69fb ldr r3, [r7, #28] 8008a7a: 3301 adds r3, #1 8008a7c: 61fb str r3, [r7, #28] } huart->TxXferCount--; 8008a7e: 68fb ldr r3, [r7, #12] 8008a80: 8cdb ldrh r3, [r3, #38] @ 0x26 8008a82: b29b uxth r3, r3 8008a84: 3b01 subs r3, #1 8008a86: b29a uxth r2, r3 8008a88: 68fb ldr r3, [r7, #12] 8008a8a: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) 8008a8c: 68fb ldr r3, [r7, #12] 8008a8e: 8cdb ldrh r3, [r3, #38] @ 0x26 8008a90: b29b uxth r3, r3 8008a92: 2b00 cmp r3, #0 8008a94: d1cb bne.n 8008a2e } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8008a96: 683b ldr r3, [r7, #0] 8008a98: 9300 str r3, [sp, #0] 8008a9a: 697b ldr r3, [r7, #20] 8008a9c: 2200 movs r2, #0 8008a9e: 2140 movs r1, #64 @ 0x40 8008aa0: 68f8 ldr r0, [r7, #12] 8008aa2: f000 f814 bl 8008ace 8008aa6: 4603 mov r3, r0 8008aa8: 2b00 cmp r3, #0 8008aaa: d005 beq.n 8008ab8 { huart->gState = HAL_UART_STATE_READY; 8008aac: 68fb ldr r3, [r7, #12] 8008aae: 2220 movs r2, #32 8008ab0: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; 8008ab4: 2303 movs r3, #3 8008ab6: e006 b.n 8008ac6 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8008ab8: 68fb ldr r3, [r7, #12] 8008aba: 2220 movs r2, #32 8008abc: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; 8008ac0: 2300 movs r3, #0 8008ac2: e000 b.n 8008ac6 } else { return HAL_BUSY; 8008ac4: 2302 movs r3, #2 } } 8008ac6: 4618 mov r0, r3 8008ac8: 3720 adds r7, #32 8008aca: 46bd mov sp, r7 8008acc: bd80 pop {r7, pc} 08008ace : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { 8008ace: b580 push {r7, lr} 8008ad0: b086 sub sp, #24 8008ad2: af00 add r7, sp, #0 8008ad4: 60f8 str r0, [r7, #12] 8008ad6: 60b9 str r1, [r7, #8] 8008ad8: 603b str r3, [r7, #0] 8008ada: 4613 mov r3, r2 8008adc: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8008ade: e03b b.n 8008b58 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8008ae0: 6a3b ldr r3, [r7, #32] 8008ae2: f1b3 3fff cmp.w r3, #4294967295 8008ae6: d037 beq.n 8008b58 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8008ae8: f7fb fbdc bl 80042a4 8008aec: 4602 mov r2, r0 8008aee: 683b ldr r3, [r7, #0] 8008af0: 1ad3 subs r3, r2, r3 8008af2: 6a3a ldr r2, [r7, #32] 8008af4: 429a cmp r2, r3 8008af6: d302 bcc.n 8008afe 8008af8: 6a3b ldr r3, [r7, #32] 8008afa: 2b00 cmp r3, #0 8008afc: d101 bne.n 8008b02 { return HAL_TIMEOUT; 8008afe: 2303 movs r3, #3 8008b00: e03a b.n 8008b78 } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) 8008b02: 68fb ldr r3, [r7, #12] 8008b04: 681b ldr r3, [r3, #0] 8008b06: 68db ldr r3, [r3, #12] 8008b08: f003 0304 and.w r3, r3, #4 8008b0c: 2b00 cmp r3, #0 8008b0e: d023 beq.n 8008b58 8008b10: 68bb ldr r3, [r7, #8] 8008b12: 2b80 cmp r3, #128 @ 0x80 8008b14: d020 beq.n 8008b58 8008b16: 68bb ldr r3, [r7, #8] 8008b18: 2b40 cmp r3, #64 @ 0x40 8008b1a: d01d beq.n 8008b58 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) 8008b1c: 68fb ldr r3, [r7, #12] 8008b1e: 681b ldr r3, [r3, #0] 8008b20: 681b ldr r3, [r3, #0] 8008b22: f003 0308 and.w r3, r3, #8 8008b26: 2b08 cmp r3, #8 8008b28: d116 bne.n 8008b58 { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); 8008b2a: 2300 movs r3, #0 8008b2c: 617b str r3, [r7, #20] 8008b2e: 68fb ldr r3, [r7, #12] 8008b30: 681b ldr r3, [r3, #0] 8008b32: 681b ldr r3, [r3, #0] 8008b34: 617b str r3, [r7, #20] 8008b36: 68fb ldr r3, [r7, #12] 8008b38: 681b ldr r3, [r3, #0] 8008b3a: 685b ldr r3, [r3, #4] 8008b3c: 617b str r3, [r7, #20] 8008b3e: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); 8008b40: 68f8 ldr r0, [r7, #12] 8008b42: f000 f81d bl 8008b80 huart->ErrorCode = HAL_UART_ERROR_ORE; 8008b46: 68fb ldr r3, [r7, #12] 8008b48: 2208 movs r2, #8 8008b4a: 645a str r2, [r3, #68] @ 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); 8008b4c: 68fb ldr r3, [r7, #12] 8008b4e: 2200 movs r2, #0 8008b50: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8008b54: 2301 movs r3, #1 8008b56: e00f b.n 8008b78 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8008b58: 68fb ldr r3, [r7, #12] 8008b5a: 681b ldr r3, [r3, #0] 8008b5c: 681a ldr r2, [r3, #0] 8008b5e: 68bb ldr r3, [r7, #8] 8008b60: 4013 ands r3, r2 8008b62: 68ba ldr r2, [r7, #8] 8008b64: 429a cmp r2, r3 8008b66: bf0c ite eq 8008b68: 2301 moveq r3, #1 8008b6a: 2300 movne r3, #0 8008b6c: b2db uxtb r3, r3 8008b6e: 461a mov r2, r3 8008b70: 79fb ldrb r3, [r7, #7] 8008b72: 429a cmp r2, r3 8008b74: d0b4 beq.n 8008ae0 } } } } return HAL_OK; 8008b76: 2300 movs r3, #0 } 8008b78: 4618 mov r0, r3 8008b7a: 3718 adds r7, #24 8008b7c: 46bd mov sp, r7 8008b7e: bd80 pop {r7, pc} 08008b80 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 8008b80: b480 push {r7} 8008b82: b095 sub sp, #84 @ 0x54 8008b84: af00 add r7, sp, #0 8008b86: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8008b88: 687b ldr r3, [r7, #4] 8008b8a: 681b ldr r3, [r3, #0] 8008b8c: 330c adds r3, #12 8008b8e: 637b str r3, [r7, #52] @ 0x34 */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8008b90: 6b7b ldr r3, [r7, #52] @ 0x34 8008b92: e853 3f00 ldrex r3, [r3] 8008b96: 633b str r3, [r7, #48] @ 0x30 return(result); 8008b98: 6b3b ldr r3, [r7, #48] @ 0x30 8008b9a: f423 7390 bic.w r3, r3, #288 @ 0x120 8008b9e: 64fb str r3, [r7, #76] @ 0x4c 8008ba0: 687b ldr r3, [r7, #4] 8008ba2: 681b ldr r3, [r3, #0] 8008ba4: 330c adds r3, #12 8008ba6: 6cfa ldr r2, [r7, #76] @ 0x4c 8008ba8: 643a str r2, [r7, #64] @ 0x40 8008baa: 63fb str r3, [r7, #60] @ 0x3c */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8008bac: 6bf9 ldr r1, [r7, #60] @ 0x3c 8008bae: 6c3a ldr r2, [r7, #64] @ 0x40 8008bb0: e841 2300 strex r3, r2, [r1] 8008bb4: 63bb str r3, [r7, #56] @ 0x38 return(result); 8008bb6: 6bbb ldr r3, [r7, #56] @ 0x38 8008bb8: 2b00 cmp r3, #0 8008bba: d1e5 bne.n 8008b88 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8008bbc: 687b ldr r3, [r7, #4] 8008bbe: 681b ldr r3, [r3, #0] 8008bc0: 3314 adds r3, #20 8008bc2: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8008bc4: 6a3b ldr r3, [r7, #32] 8008bc6: e853 3f00 ldrex r3, [r3] 8008bca: 61fb str r3, [r7, #28] return(result); 8008bcc: 69fb ldr r3, [r7, #28] 8008bce: f023 0301 bic.w r3, r3, #1 8008bd2: 64bb str r3, [r7, #72] @ 0x48 8008bd4: 687b ldr r3, [r7, #4] 8008bd6: 681b ldr r3, [r3, #0] 8008bd8: 3314 adds r3, #20 8008bda: 6cba ldr r2, [r7, #72] @ 0x48 8008bdc: 62fa str r2, [r7, #44] @ 0x2c 8008bde: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8008be0: 6ab9 ldr r1, [r7, #40] @ 0x28 8008be2: 6afa ldr r2, [r7, #44] @ 0x2c 8008be4: e841 2300 strex r3, r2, [r1] 8008be8: 627b str r3, [r7, #36] @ 0x24 return(result); 8008bea: 6a7b ldr r3, [r7, #36] @ 0x24 8008bec: 2b00 cmp r3, #0 8008bee: d1e5 bne.n 8008bbc /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8008bf0: 687b ldr r3, [r7, #4] 8008bf2: 6b1b ldr r3, [r3, #48] @ 0x30 8008bf4: 2b01 cmp r3, #1 8008bf6: d119 bne.n 8008c2c { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8008bf8: 687b ldr r3, [r7, #4] 8008bfa: 681b ldr r3, [r3, #0] 8008bfc: 330c adds r3, #12 8008bfe: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8008c00: 68fb ldr r3, [r7, #12] 8008c02: e853 3f00 ldrex r3, [r3] 8008c06: 60bb str r3, [r7, #8] return(result); 8008c08: 68bb ldr r3, [r7, #8] 8008c0a: f023 0310 bic.w r3, r3, #16 8008c0e: 647b str r3, [r7, #68] @ 0x44 8008c10: 687b ldr r3, [r7, #4] 8008c12: 681b ldr r3, [r3, #0] 8008c14: 330c adds r3, #12 8008c16: 6c7a ldr r2, [r7, #68] @ 0x44 8008c18: 61ba str r2, [r7, #24] 8008c1a: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8008c1c: 6979 ldr r1, [r7, #20] 8008c1e: 69ba ldr r2, [r7, #24] 8008c20: e841 2300 strex r3, r2, [r1] 8008c24: 613b str r3, [r7, #16] return(result); 8008c26: 693b ldr r3, [r7, #16] 8008c28: 2b00 cmp r3, #0 8008c2a: d1e5 bne.n 8008bf8 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8008c2c: 687b ldr r3, [r7, #4] 8008c2e: 2220 movs r2, #32 8008c30: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8008c34: 687b ldr r3, [r7, #4] 8008c36: 2200 movs r2, #0 8008c38: 631a str r2, [r3, #48] @ 0x30 } 8008c3a: bf00 nop 8008c3c: 3754 adds r7, #84 @ 0x54 8008c3e: 46bd mov sp, r7 8008c40: bc80 pop {r7} 8008c42: 4770 bx lr 08008c44 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8008c44: b580 push {r7, lr} 8008c46: b084 sub sp, #16 8008c48: af00 add r7, sp, #0 8008c4a: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8008c4c: 687b ldr r3, [r7, #4] 8008c4e: 681b ldr r3, [r3, #0] 8008c50: 691b ldr r3, [r3, #16] 8008c52: f423 5140 bic.w r1, r3, #12288 @ 0x3000 8008c56: 687b ldr r3, [r7, #4] 8008c58: 68da ldr r2, [r3, #12] 8008c5a: 687b ldr r3, [r7, #4] 8008c5c: 681b ldr r3, [r3, #0] 8008c5e: 430a orrs r2, r1 8008c60: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8008c62: 687b ldr r3, [r7, #4] 8008c64: 689a ldr r2, [r3, #8] 8008c66: 687b ldr r3, [r7, #4] 8008c68: 691b ldr r3, [r3, #16] 8008c6a: 431a orrs r2, r3 8008c6c: 687b ldr r3, [r7, #4] 8008c6e: 695b ldr r3, [r3, #20] 8008c70: 4313 orrs r3, r2 8008c72: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 8008c74: 687b ldr r3, [r7, #4] 8008c76: 681b ldr r3, [r3, #0] 8008c78: 68db ldr r3, [r3, #12] 8008c7a: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 8008c7e: f023 030c bic.w r3, r3, #12 8008c82: 687a ldr r2, [r7, #4] 8008c84: 6812 ldr r2, [r2, #0] 8008c86: 68b9 ldr r1, [r7, #8] 8008c88: 430b orrs r3, r1 8008c8a: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8008c8c: 687b ldr r3, [r7, #4] 8008c8e: 681b ldr r3, [r3, #0] 8008c90: 695b ldr r3, [r3, #20] 8008c92: f423 7140 bic.w r1, r3, #768 @ 0x300 8008c96: 687b ldr r3, [r7, #4] 8008c98: 699a ldr r2, [r3, #24] 8008c9a: 687b ldr r3, [r7, #4] 8008c9c: 681b ldr r3, [r3, #0] 8008c9e: 430a orrs r2, r1 8008ca0: 615a str r2, [r3, #20] if(huart->Instance == USART1) 8008ca2: 687b ldr r3, [r7, #4] 8008ca4: 681b ldr r3, [r3, #0] 8008ca6: 4a2c ldr r2, [pc, #176] @ (8008d58 ) 8008ca8: 4293 cmp r3, r2 8008caa: d103 bne.n 8008cb4 { pclk = HAL_RCC_GetPCLK2Freq(); 8008cac: f7fe fede bl 8007a6c 8008cb0: 60f8 str r0, [r7, #12] 8008cb2: e002 b.n 8008cba } else { pclk = HAL_RCC_GetPCLK1Freq(); 8008cb4: f7fe fec6 bl 8007a44 8008cb8: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8008cba: 68fa ldr r2, [r7, #12] 8008cbc: 4613 mov r3, r2 8008cbe: 009b lsls r3, r3, #2 8008cc0: 4413 add r3, r2 8008cc2: 009a lsls r2, r3, #2 8008cc4: 441a add r2, r3 8008cc6: 687b ldr r3, [r7, #4] 8008cc8: 685b ldr r3, [r3, #4] 8008cca: 009b lsls r3, r3, #2 8008ccc: fbb2 f3f3 udiv r3, r2, r3 8008cd0: 4a22 ldr r2, [pc, #136] @ (8008d5c ) 8008cd2: fba2 2303 umull r2, r3, r2, r3 8008cd6: 095b lsrs r3, r3, #5 8008cd8: 0119 lsls r1, r3, #4 8008cda: 68fa ldr r2, [r7, #12] 8008cdc: 4613 mov r3, r2 8008cde: 009b lsls r3, r3, #2 8008ce0: 4413 add r3, r2 8008ce2: 009a lsls r2, r3, #2 8008ce4: 441a add r2, r3 8008ce6: 687b ldr r3, [r7, #4] 8008ce8: 685b ldr r3, [r3, #4] 8008cea: 009b lsls r3, r3, #2 8008cec: fbb2 f2f3 udiv r2, r2, r3 8008cf0: 4b1a ldr r3, [pc, #104] @ (8008d5c ) 8008cf2: fba3 0302 umull r0, r3, r3, r2 8008cf6: 095b lsrs r3, r3, #5 8008cf8: 2064 movs r0, #100 @ 0x64 8008cfa: fb00 f303 mul.w r3, r0, r3 8008cfe: 1ad3 subs r3, r2, r3 8008d00: 011b lsls r3, r3, #4 8008d02: 3332 adds r3, #50 @ 0x32 8008d04: 4a15 ldr r2, [pc, #84] @ (8008d5c ) 8008d06: fba2 2303 umull r2, r3, r2, r3 8008d0a: 095b lsrs r3, r3, #5 8008d0c: f003 03f0 and.w r3, r3, #240 @ 0xf0 8008d10: 4419 add r1, r3 8008d12: 68fa ldr r2, [r7, #12] 8008d14: 4613 mov r3, r2 8008d16: 009b lsls r3, r3, #2 8008d18: 4413 add r3, r2 8008d1a: 009a lsls r2, r3, #2 8008d1c: 441a add r2, r3 8008d1e: 687b ldr r3, [r7, #4] 8008d20: 685b ldr r3, [r3, #4] 8008d22: 009b lsls r3, r3, #2 8008d24: fbb2 f2f3 udiv r2, r2, r3 8008d28: 4b0c ldr r3, [pc, #48] @ (8008d5c ) 8008d2a: fba3 0302 umull r0, r3, r3, r2 8008d2e: 095b lsrs r3, r3, #5 8008d30: 2064 movs r0, #100 @ 0x64 8008d32: fb00 f303 mul.w r3, r0, r3 8008d36: 1ad3 subs r3, r2, r3 8008d38: 011b lsls r3, r3, #4 8008d3a: 3332 adds r3, #50 @ 0x32 8008d3c: 4a07 ldr r2, [pc, #28] @ (8008d5c ) 8008d3e: fba2 2303 umull r2, r3, r2, r3 8008d42: 095b lsrs r3, r3, #5 8008d44: f003 020f and.w r2, r3, #15 8008d48: 687b ldr r3, [r7, #4] 8008d4a: 681b ldr r3, [r3, #0] 8008d4c: 440a add r2, r1 8008d4e: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 8008d50: bf00 nop 8008d52: 3710 adds r7, #16 8008d54: 46bd mov sp, r7 8008d56: bd80 pop {r7, pc} 8008d58: 40013800 .word 0x40013800 8008d5c: 51eb851f .word 0x51eb851f 08008d60 : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8008d60: b480 push {r7} 8008d62: b085 sub sp, #20 8008d64: af00 add r7, sp, #0 8008d66: 60f8 str r0, [r7, #12] 8008d68: 4638 mov r0, r7 8008d6a: e880 000e stmia.w r0, {r1, r2, r3} /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8008d6e: 2300 movs r3, #0 } 8008d70: 4618 mov r0, r3 8008d72: 3714 adds r7, #20 8008d74: 46bd mov sp, r7 8008d76: bc80 pop {r7} 8008d78: 4770 bx lr 08008d7a : * Enables the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) { 8008d7a: b480 push {r7} 8008d7c: b085 sub sp, #20 8008d7e: af00 add r7, sp, #0 8008d80: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Clear pending interrupts */ USBx->ISTR = 0U; 8008d82: 687b ldr r3, [r7, #4] 8008d84: 2200 movs r2, #0 8008d86: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8008d8a: f44f 433f mov.w r3, #48896 @ 0xbf00 8008d8e: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Set interrupt mask */ USBx->CNTR = (uint16_t)winterruptmask; 8008d90: 68fb ldr r3, [r7, #12] 8008d92: b29a uxth r2, r3 8008d94: 687b ldr r3, [r7, #4] 8008d96: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8008d9a: 2300 movs r3, #0 } 8008d9c: 4618 mov r0, r3 8008d9e: 3714 adds r7, #20 8008da0: 46bd mov sp, r7 8008da2: bc80 pop {r7} 8008da4: 4770 bx lr 08008da6 : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) { 8008da6: b480 push {r7} 8008da8: b085 sub sp, #20 8008daa: af00 add r7, sp, #0 8008dac: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8008dae: f44f 433f mov.w r3, #48896 @ 0xbf00 8008db2: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Clear interrupt mask */ USBx->CNTR &= (uint16_t)(~winterruptmask); 8008db4: 687b ldr r3, [r7, #4] 8008db6: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8008dba: b29a uxth r2, r3 8008dbc: 68fb ldr r3, [r7, #12] 8008dbe: b29b uxth r3, r3 8008dc0: 43db mvns r3, r3 8008dc2: b29b uxth r3, r3 8008dc4: 4013 ands r3, r2 8008dc6: b29a uxth r2, r3 8008dc8: 687b ldr r3, [r7, #4] 8008dca: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8008dce: 2300 movs r3, #0 } 8008dd0: 4618 mov r0, r3 8008dd2: 3714 adds r7, #20 8008dd4: 46bd mov sp, r7 8008dd6: bc80 pop {r7} 8008dd8: 4770 bx lr 08008dda : * This parameter can be one of the these values: * @arg USB_DEVICE_MODE Peripheral mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) { 8008dda: b480 push {r7} 8008ddc: b083 sub sp, #12 8008dde: af00 add r7, sp, #0 8008de0: 6078 str r0, [r7, #4] 8008de2: 460b mov r3, r1 8008de4: 70fb strb r3, [r7, #3] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8008de6: 2300 movs r3, #0 } 8008de8: 4618 mov r0, r3 8008dea: 370c adds r7, #12 8008dec: 46bd mov sp, r7 8008dee: bc80 pop {r7} 8008df0: 4770 bx lr 08008df2 : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8008df2: b480 push {r7} 8008df4: b085 sub sp, #20 8008df6: af00 add r7, sp, #0 8008df8: 60f8 str r0, [r7, #12] 8008dfa: 4638 mov r0, r7 8008dfc: e880 000e stmia.w r0, {r1, r2, r3} /* Prevent unused argument(s) compilation warning */ UNUSED(cfg); /* Init Device */ /* CNTR_FRES = 1 */ USBx->CNTR = (uint16_t)USB_CNTR_FRES; 8008e00: 68fb ldr r3, [r7, #12] 8008e02: 2201 movs r2, #1 8008e04: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CNTR_FRES = 0 */ USBx->CNTR = 0U; 8008e08: 68fb ldr r3, [r7, #12] 8008e0a: 2200 movs r2, #0 8008e0c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* Clear pending interrupts */ USBx->ISTR = 0U; 8008e10: 68fb ldr r3, [r7, #12] 8008e12: 2200 movs r2, #0 8008e14: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /*Set Btable Address*/ USBx->BTABLE = BTABLE_ADDRESS; 8008e18: 68fb ldr r3, [r7, #12] 8008e1a: 2200 movs r2, #0 8008e1c: f8a3 2050 strh.w r2, [r3, #80] @ 0x50 return HAL_OK; 8008e20: 2300 movs r3, #0 } 8008e22: 4618 mov r0, r3 8008e24: 3714 adds r7, #20 8008e26: 46bd mov sp, r7 8008e28: bc80 pop {r7} 8008e2a: 4770 bx lr 08008e2c : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8008e2c: b480 push {r7} 8008e2e: b09d sub sp, #116 @ 0x74 8008e30: af00 add r7, sp, #0 8008e32: 6078 str r0, [r7, #4] 8008e34: 6039 str r1, [r7, #0] HAL_StatusTypeDef ret = HAL_OK; 8008e36: 2300 movs r3, #0 8008e38: f887 306f strb.w r3, [r7, #111] @ 0x6f uint16_t wEpRegVal; wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; 8008e3c: 687a ldr r2, [r7, #4] 8008e3e: 683b ldr r3, [r7, #0] 8008e40: 781b ldrb r3, [r3, #0] 8008e42: 009b lsls r3, r3, #2 8008e44: 4413 add r3, r2 8008e46: 881b ldrh r3, [r3, #0] 8008e48: b29b uxth r3, r3 8008e4a: f423 43ec bic.w r3, r3, #30208 @ 0x7600 8008e4e: f023 0370 bic.w r3, r3, #112 @ 0x70 8008e52: f8a7 306c strh.w r3, [r7, #108] @ 0x6c /* initialize Endpoint */ switch (ep->type) 8008e56: 683b ldr r3, [r7, #0] 8008e58: 78db ldrb r3, [r3, #3] 8008e5a: 2b03 cmp r3, #3 8008e5c: d81f bhi.n 8008e9e 8008e5e: a201 add r2, pc, #4 @ (adr r2, 8008e64 ) 8008e60: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8008e64: 08008e75 .word 0x08008e75 8008e68: 08008e91 .word 0x08008e91 8008e6c: 08008ea7 .word 0x08008ea7 8008e70: 08008e83 .word 0x08008e83 { case EP_TYPE_CTRL: wEpRegVal |= USB_EP_CONTROL; 8008e74: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8008e78: f443 7300 orr.w r3, r3, #512 @ 0x200 8008e7c: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8008e80: e012 b.n 8008ea8 case EP_TYPE_BULK: wEpRegVal |= USB_EP_BULK; break; case EP_TYPE_INTR: wEpRegVal |= USB_EP_INTERRUPT; 8008e82: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8008e86: f443 63c0 orr.w r3, r3, #1536 @ 0x600 8008e8a: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8008e8e: e00b b.n 8008ea8 case EP_TYPE_ISOC: wEpRegVal |= USB_EP_ISOCHRONOUS; 8008e90: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8008e94: f443 6380 orr.w r3, r3, #1024 @ 0x400 8008e98: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8008e9c: e004 b.n 8008ea8 default: ret = HAL_ERROR; 8008e9e: 2301 movs r3, #1 8008ea0: f887 306f strb.w r3, [r7, #111] @ 0x6f break; 8008ea4: e000 b.n 8008ea8 break; 8008ea6: bf00 nop } PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); 8008ea8: 687a ldr r2, [r7, #4] 8008eaa: 683b ldr r3, [r7, #0] 8008eac: 781b ldrb r3, [r3, #0] 8008eae: 009b lsls r3, r3, #2 8008eb0: 441a add r2, r3 8008eb2: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8008eb6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008eba: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008ebe: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008ec2: f043 0380 orr.w r3, r3, #128 @ 0x80 8008ec6: b29b uxth r3, r3 8008ec8: 8013 strh r3, [r2, #0] PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); 8008eca: 687a ldr r2, [r7, #4] 8008ecc: 683b ldr r3, [r7, #0] 8008ece: 781b ldrb r3, [r3, #0] 8008ed0: 009b lsls r3, r3, #2 8008ed2: 4413 add r3, r2 8008ed4: 881b ldrh r3, [r3, #0] 8008ed6: b29b uxth r3, r3 8008ed8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008edc: f023 0370 bic.w r3, r3, #112 @ 0x70 8008ee0: b29b uxth r3, r3 8008ee2: 683a ldr r2, [r7, #0] 8008ee4: 7812 ldrb r2, [r2, #0] 8008ee6: 4313 orrs r3, r2 8008ee8: f8a7 3066 strh.w r3, [r7, #102] @ 0x66 8008eec: 687a ldr r2, [r7, #4] 8008eee: 683b ldr r3, [r7, #0] 8008ef0: 781b ldrb r3, [r3, #0] 8008ef2: 009b lsls r3, r3, #2 8008ef4: 441a add r2, r3 8008ef6: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66 8008efa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008efe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008f02: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008f06: f043 0380 orr.w r3, r3, #128 @ 0x80 8008f0a: b29b uxth r3, r3 8008f0c: 8013 strh r3, [r2, #0] if (ep->doublebuffer == 0U) 8008f0e: 683b ldr r3, [r7, #0] 8008f10: 7b1b ldrb r3, [r3, #12] 8008f12: 2b00 cmp r3, #0 8008f14: f040 8178 bne.w 8009208 { if (ep->is_in != 0U) 8008f18: 683b ldr r3, [r7, #0] 8008f1a: 785b ldrb r3, [r3, #1] 8008f1c: 2b00 cmp r3, #0 8008f1e: f000 8084 beq.w 800902a { /*Set the endpoint Transmit buffer address */ PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); 8008f22: 687b ldr r3, [r7, #4] 8008f24: 61bb str r3, [r7, #24] 8008f26: 687b ldr r3, [r7, #4] 8008f28: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008f2c: b29b uxth r3, r3 8008f2e: 461a mov r2, r3 8008f30: 69bb ldr r3, [r7, #24] 8008f32: 4413 add r3, r2 8008f34: 61bb str r3, [r7, #24] 8008f36: 683b ldr r3, [r7, #0] 8008f38: 781b ldrb r3, [r3, #0] 8008f3a: 011a lsls r2, r3, #4 8008f3c: 69bb ldr r3, [r7, #24] 8008f3e: 4413 add r3, r2 8008f40: f503 6380 add.w r3, r3, #1024 @ 0x400 8008f44: 617b str r3, [r7, #20] 8008f46: 683b ldr r3, [r7, #0] 8008f48: 88db ldrh r3, [r3, #6] 8008f4a: 085b lsrs r3, r3, #1 8008f4c: b29b uxth r3, r3 8008f4e: 005b lsls r3, r3, #1 8008f50: b29a uxth r2, r3 8008f52: 697b ldr r3, [r7, #20] 8008f54: 801a strh r2, [r3, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8008f56: 687a ldr r2, [r7, #4] 8008f58: 683b ldr r3, [r7, #0] 8008f5a: 781b ldrb r3, [r3, #0] 8008f5c: 009b lsls r3, r3, #2 8008f5e: 4413 add r3, r2 8008f60: 881b ldrh r3, [r3, #0] 8008f62: 827b strh r3, [r7, #18] 8008f64: 8a7b ldrh r3, [r7, #18] 8008f66: f003 0340 and.w r3, r3, #64 @ 0x40 8008f6a: 2b00 cmp r3, #0 8008f6c: d01b beq.n 8008fa6 8008f6e: 687a ldr r2, [r7, #4] 8008f70: 683b ldr r3, [r7, #0] 8008f72: 781b ldrb r3, [r3, #0] 8008f74: 009b lsls r3, r3, #2 8008f76: 4413 add r3, r2 8008f78: 881b ldrh r3, [r3, #0] 8008f7a: b29b uxth r3, r3 8008f7c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008f80: f023 0370 bic.w r3, r3, #112 @ 0x70 8008f84: 823b strh r3, [r7, #16] 8008f86: 687a ldr r2, [r7, #4] 8008f88: 683b ldr r3, [r7, #0] 8008f8a: 781b ldrb r3, [r3, #0] 8008f8c: 009b lsls r3, r3, #2 8008f8e: 441a add r2, r3 8008f90: 8a3b ldrh r3, [r7, #16] 8008f92: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008f96: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008f9a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008f9e: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8008fa2: b29b uxth r3, r3 8008fa4: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 8008fa6: 683b ldr r3, [r7, #0] 8008fa8: 78db ldrb r3, [r3, #3] 8008faa: 2b01 cmp r3, #1 8008fac: d020 beq.n 8008ff0 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 8008fae: 687a ldr r2, [r7, #4] 8008fb0: 683b ldr r3, [r7, #0] 8008fb2: 781b ldrb r3, [r3, #0] 8008fb4: 009b lsls r3, r3, #2 8008fb6: 4413 add r3, r2 8008fb8: 881b ldrh r3, [r3, #0] 8008fba: b29b uxth r3, r3 8008fbc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008fc0: f023 0340 bic.w r3, r3, #64 @ 0x40 8008fc4: 81bb strh r3, [r7, #12] 8008fc6: 89bb ldrh r3, [r7, #12] 8008fc8: f083 0320 eor.w r3, r3, #32 8008fcc: 81bb strh r3, [r7, #12] 8008fce: 687a ldr r2, [r7, #4] 8008fd0: 683b ldr r3, [r7, #0] 8008fd2: 781b ldrb r3, [r3, #0] 8008fd4: 009b lsls r3, r3, #2 8008fd6: 441a add r2, r3 8008fd8: 89bb ldrh r3, [r7, #12] 8008fda: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008fde: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008fe2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008fe6: f043 0380 orr.w r3, r3, #128 @ 0x80 8008fea: b29b uxth r3, r3 8008fec: 8013 strh r3, [r2, #0] 8008fee: e2d5 b.n 800959c } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8008ff0: 687a ldr r2, [r7, #4] 8008ff2: 683b ldr r3, [r7, #0] 8008ff4: 781b ldrb r3, [r3, #0] 8008ff6: 009b lsls r3, r3, #2 8008ff8: 4413 add r3, r2 8008ffa: 881b ldrh r3, [r3, #0] 8008ffc: b29b uxth r3, r3 8008ffe: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009002: f023 0340 bic.w r3, r3, #64 @ 0x40 8009006: 81fb strh r3, [r7, #14] 8009008: 687a ldr r2, [r7, #4] 800900a: 683b ldr r3, [r7, #0] 800900c: 781b ldrb r3, [r3, #0] 800900e: 009b lsls r3, r3, #2 8009010: 441a add r2, r3 8009012: 89fb ldrh r3, [r7, #14] 8009014: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009018: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800901c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009020: f043 0380 orr.w r3, r3, #128 @ 0x80 8009024: b29b uxth r3, r3 8009026: 8013 strh r3, [r2, #0] 8009028: e2b8 b.n 800959c } } else { /* Set the endpoint Receive buffer address */ PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); 800902a: 687b ldr r3, [r7, #4] 800902c: 633b str r3, [r7, #48] @ 0x30 800902e: 687b ldr r3, [r7, #4] 8009030: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009034: b29b uxth r3, r3 8009036: 461a mov r2, r3 8009038: 6b3b ldr r3, [r7, #48] @ 0x30 800903a: 4413 add r3, r2 800903c: 633b str r3, [r7, #48] @ 0x30 800903e: 683b ldr r3, [r7, #0] 8009040: 781b ldrb r3, [r3, #0] 8009042: 011a lsls r2, r3, #4 8009044: 6b3b ldr r3, [r7, #48] @ 0x30 8009046: 4413 add r3, r2 8009048: f503 6381 add.w r3, r3, #1032 @ 0x408 800904c: 62fb str r3, [r7, #44] @ 0x2c 800904e: 683b ldr r3, [r7, #0] 8009050: 88db ldrh r3, [r3, #6] 8009052: 085b lsrs r3, r3, #1 8009054: b29b uxth r3, r3 8009056: 005b lsls r3, r3, #1 8009058: b29a uxth r2, r3 800905a: 6afb ldr r3, [r7, #44] @ 0x2c 800905c: 801a strh r2, [r3, #0] /* Set the endpoint Receive buffer counter */ PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); 800905e: 687b ldr r3, [r7, #4] 8009060: 62bb str r3, [r7, #40] @ 0x28 8009062: 687b ldr r3, [r7, #4] 8009064: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009068: b29b uxth r3, r3 800906a: 461a mov r2, r3 800906c: 6abb ldr r3, [r7, #40] @ 0x28 800906e: 4413 add r3, r2 8009070: 62bb str r3, [r7, #40] @ 0x28 8009072: 683b ldr r3, [r7, #0] 8009074: 781b ldrb r3, [r3, #0] 8009076: 011a lsls r2, r3, #4 8009078: 6abb ldr r3, [r7, #40] @ 0x28 800907a: 4413 add r3, r2 800907c: f203 430c addw r3, r3, #1036 @ 0x40c 8009080: 627b str r3, [r7, #36] @ 0x24 8009082: 6a7b ldr r3, [r7, #36] @ 0x24 8009084: 881b ldrh r3, [r3, #0] 8009086: b29b uxth r3, r3 8009088: f3c3 0309 ubfx r3, r3, #0, #10 800908c: b29a uxth r2, r3 800908e: 6a7b ldr r3, [r7, #36] @ 0x24 8009090: 801a strh r2, [r3, #0] 8009092: 683b ldr r3, [r7, #0] 8009094: 691b ldr r3, [r3, #16] 8009096: 2b3e cmp r3, #62 @ 0x3e 8009098: d91d bls.n 80090d6 800909a: 683b ldr r3, [r7, #0] 800909c: 691b ldr r3, [r3, #16] 800909e: 095b lsrs r3, r3, #5 80090a0: 66bb str r3, [r7, #104] @ 0x68 80090a2: 683b ldr r3, [r7, #0] 80090a4: 691b ldr r3, [r3, #16] 80090a6: f003 031f and.w r3, r3, #31 80090aa: 2b00 cmp r3, #0 80090ac: d102 bne.n 80090b4 80090ae: 6ebb ldr r3, [r7, #104] @ 0x68 80090b0: 3b01 subs r3, #1 80090b2: 66bb str r3, [r7, #104] @ 0x68 80090b4: 6a7b ldr r3, [r7, #36] @ 0x24 80090b6: 881b ldrh r3, [r3, #0] 80090b8: b29a uxth r2, r3 80090ba: 6ebb ldr r3, [r7, #104] @ 0x68 80090bc: b29b uxth r3, r3 80090be: 029b lsls r3, r3, #10 80090c0: b29b uxth r3, r3 80090c2: 4313 orrs r3, r2 80090c4: b29b uxth r3, r3 80090c6: ea6f 4343 mvn.w r3, r3, lsl #17 80090ca: ea6f 4353 mvn.w r3, r3, lsr #17 80090ce: b29a uxth r2, r3 80090d0: 6a7b ldr r3, [r7, #36] @ 0x24 80090d2: 801a strh r2, [r3, #0] 80090d4: e026 b.n 8009124 80090d6: 683b ldr r3, [r7, #0] 80090d8: 691b ldr r3, [r3, #16] 80090da: 2b00 cmp r3, #0 80090dc: d10a bne.n 80090f4 80090de: 6a7b ldr r3, [r7, #36] @ 0x24 80090e0: 881b ldrh r3, [r3, #0] 80090e2: b29b uxth r3, r3 80090e4: ea6f 4343 mvn.w r3, r3, lsl #17 80090e8: ea6f 4353 mvn.w r3, r3, lsr #17 80090ec: b29a uxth r2, r3 80090ee: 6a7b ldr r3, [r7, #36] @ 0x24 80090f0: 801a strh r2, [r3, #0] 80090f2: e017 b.n 8009124 80090f4: 683b ldr r3, [r7, #0] 80090f6: 691b ldr r3, [r3, #16] 80090f8: 085b lsrs r3, r3, #1 80090fa: 66bb str r3, [r7, #104] @ 0x68 80090fc: 683b ldr r3, [r7, #0] 80090fe: 691b ldr r3, [r3, #16] 8009100: f003 0301 and.w r3, r3, #1 8009104: 2b00 cmp r3, #0 8009106: d002 beq.n 800910e 8009108: 6ebb ldr r3, [r7, #104] @ 0x68 800910a: 3301 adds r3, #1 800910c: 66bb str r3, [r7, #104] @ 0x68 800910e: 6a7b ldr r3, [r7, #36] @ 0x24 8009110: 881b ldrh r3, [r3, #0] 8009112: b29a uxth r2, r3 8009114: 6ebb ldr r3, [r7, #104] @ 0x68 8009116: b29b uxth r3, r3 8009118: 029b lsls r3, r3, #10 800911a: b29b uxth r3, r3 800911c: 4313 orrs r3, r2 800911e: b29a uxth r2, r3 8009120: 6a7b ldr r3, [r7, #36] @ 0x24 8009122: 801a strh r2, [r3, #0] PCD_CLEAR_RX_DTOG(USBx, ep->num); 8009124: 687a ldr r2, [r7, #4] 8009126: 683b ldr r3, [r7, #0] 8009128: 781b ldrb r3, [r3, #0] 800912a: 009b lsls r3, r3, #2 800912c: 4413 add r3, r2 800912e: 881b ldrh r3, [r3, #0] 8009130: 847b strh r3, [r7, #34] @ 0x22 8009132: 8c7b ldrh r3, [r7, #34] @ 0x22 8009134: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009138: 2b00 cmp r3, #0 800913a: d01b beq.n 8009174 800913c: 687a ldr r2, [r7, #4] 800913e: 683b ldr r3, [r7, #0] 8009140: 781b ldrb r3, [r3, #0] 8009142: 009b lsls r3, r3, #2 8009144: 4413 add r3, r2 8009146: 881b ldrh r3, [r3, #0] 8009148: b29b uxth r3, r3 800914a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800914e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009152: 843b strh r3, [r7, #32] 8009154: 687a ldr r2, [r7, #4] 8009156: 683b ldr r3, [r7, #0] 8009158: 781b ldrb r3, [r3, #0] 800915a: 009b lsls r3, r3, #2 800915c: 441a add r2, r3 800915e: 8c3b ldrh r3, [r7, #32] 8009160: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009164: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009168: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800916c: f043 0380 orr.w r3, r3, #128 @ 0x80 8009170: b29b uxth r3, r3 8009172: 8013 strh r3, [r2, #0] if (ep->num == 0U) 8009174: 683b ldr r3, [r7, #0] 8009176: 781b ldrb r3, [r3, #0] 8009178: 2b00 cmp r3, #0 800917a: d124 bne.n 80091c6 { /* Configure VALID status for EP0 */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800917c: 687a ldr r2, [r7, #4] 800917e: 683b ldr r3, [r7, #0] 8009180: 781b ldrb r3, [r3, #0] 8009182: 009b lsls r3, r3, #2 8009184: 4413 add r3, r2 8009186: 881b ldrh r3, [r3, #0] 8009188: b29b uxth r3, r3 800918a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800918e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009192: 83bb strh r3, [r7, #28] 8009194: 8bbb ldrh r3, [r7, #28] 8009196: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800919a: 83bb strh r3, [r7, #28] 800919c: 8bbb ldrh r3, [r7, #28] 800919e: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80091a2: 83bb strh r3, [r7, #28] 80091a4: 687a ldr r2, [r7, #4] 80091a6: 683b ldr r3, [r7, #0] 80091a8: 781b ldrb r3, [r3, #0] 80091aa: 009b lsls r3, r3, #2 80091ac: 441a add r2, r3 80091ae: 8bbb ldrh r3, [r7, #28] 80091b0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80091b4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80091b8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80091bc: f043 0380 orr.w r3, r3, #128 @ 0x80 80091c0: b29b uxth r3, r3 80091c2: 8013 strh r3, [r2, #0] 80091c4: e1ea b.n 800959c } else { /* Configure NAK status for OUT Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK); 80091c6: 687a ldr r2, [r7, #4] 80091c8: 683b ldr r3, [r7, #0] 80091ca: 781b ldrb r3, [r3, #0] 80091cc: 009b lsls r3, r3, #2 80091ce: 4413 add r3, r2 80091d0: 881b ldrh r3, [r3, #0] 80091d2: b29b uxth r3, r3 80091d4: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80091d8: f023 0370 bic.w r3, r3, #112 @ 0x70 80091dc: 83fb strh r3, [r7, #30] 80091de: 8bfb ldrh r3, [r7, #30] 80091e0: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80091e4: 83fb strh r3, [r7, #30] 80091e6: 687a ldr r2, [r7, #4] 80091e8: 683b ldr r3, [r7, #0] 80091ea: 781b ldrb r3, [r3, #0] 80091ec: 009b lsls r3, r3, #2 80091ee: 441a add r2, r3 80091f0: 8bfb ldrh r3, [r7, #30] 80091f2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80091f6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80091fa: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80091fe: f043 0380 orr.w r3, r3, #128 @ 0x80 8009202: b29b uxth r3, r3 8009204: 8013 strh r3, [r2, #0] 8009206: e1c9 b.n 800959c } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->type == EP_TYPE_BULK) 8009208: 683b ldr r3, [r7, #0] 800920a: 78db ldrb r3, [r3, #3] 800920c: 2b02 cmp r3, #2 800920e: d11e bne.n 800924e { /* Set bulk endpoint as double buffered */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 8009210: 687a ldr r2, [r7, #4] 8009212: 683b ldr r3, [r7, #0] 8009214: 781b ldrb r3, [r3, #0] 8009216: 009b lsls r3, r3, #2 8009218: 4413 add r3, r2 800921a: 881b ldrh r3, [r3, #0] 800921c: b29b uxth r3, r3 800921e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009222: f023 0370 bic.w r3, r3, #112 @ 0x70 8009226: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 800922a: 687a ldr r2, [r7, #4] 800922c: 683b ldr r3, [r7, #0] 800922e: 781b ldrb r3, [r3, #0] 8009230: 009b lsls r3, r3, #2 8009232: 441a add r2, r3 8009234: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 8009238: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800923c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009240: f443 4301 orr.w r3, r3, #33024 @ 0x8100 8009244: f043 0380 orr.w r3, r3, #128 @ 0x80 8009248: b29b uxth r3, r3 800924a: 8013 strh r3, [r2, #0] 800924c: e01d b.n 800928a } else { /* Set the ISOC endpoint in double buffer mode */ PCD_CLEAR_EP_KIND(USBx, ep->num); 800924e: 687a ldr r2, [r7, #4] 8009250: 683b ldr r3, [r7, #0] 8009252: 781b ldrb r3, [r3, #0] 8009254: 009b lsls r3, r3, #2 8009256: 4413 add r3, r2 8009258: 881b ldrh r3, [r3, #0] 800925a: b29b uxth r3, r3 800925c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 8009260: f023 0370 bic.w r3, r3, #112 @ 0x70 8009264: f8a7 3064 strh.w r3, [r7, #100] @ 0x64 8009268: 687a ldr r2, [r7, #4] 800926a: 683b ldr r3, [r7, #0] 800926c: 781b ldrb r3, [r3, #0] 800926e: 009b lsls r3, r3, #2 8009270: 441a add r2, r3 8009272: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64 8009276: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800927a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800927e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009282: f043 0380 orr.w r3, r3, #128 @ 0x80 8009286: b29b uxth r3, r3 8009288: 8013 strh r3, [r2, #0] } /* Set buffer address for double buffered mode */ PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); 800928a: 687b ldr r3, [r7, #4] 800928c: 65fb str r3, [r7, #92] @ 0x5c 800928e: 687b ldr r3, [r7, #4] 8009290: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009294: b29b uxth r3, r3 8009296: 461a mov r2, r3 8009298: 6dfb ldr r3, [r7, #92] @ 0x5c 800929a: 4413 add r3, r2 800929c: 65fb str r3, [r7, #92] @ 0x5c 800929e: 683b ldr r3, [r7, #0] 80092a0: 781b ldrb r3, [r3, #0] 80092a2: 011a lsls r2, r3, #4 80092a4: 6dfb ldr r3, [r7, #92] @ 0x5c 80092a6: 4413 add r3, r2 80092a8: f503 6380 add.w r3, r3, #1024 @ 0x400 80092ac: 65bb str r3, [r7, #88] @ 0x58 80092ae: 683b ldr r3, [r7, #0] 80092b0: 891b ldrh r3, [r3, #8] 80092b2: 085b lsrs r3, r3, #1 80092b4: b29b uxth r3, r3 80092b6: 005b lsls r3, r3, #1 80092b8: b29a uxth r2, r3 80092ba: 6dbb ldr r3, [r7, #88] @ 0x58 80092bc: 801a strh r2, [r3, #0] 80092be: 687b ldr r3, [r7, #4] 80092c0: 657b str r3, [r7, #84] @ 0x54 80092c2: 687b ldr r3, [r7, #4] 80092c4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80092c8: b29b uxth r3, r3 80092ca: 461a mov r2, r3 80092cc: 6d7b ldr r3, [r7, #84] @ 0x54 80092ce: 4413 add r3, r2 80092d0: 657b str r3, [r7, #84] @ 0x54 80092d2: 683b ldr r3, [r7, #0] 80092d4: 781b ldrb r3, [r3, #0] 80092d6: 011a lsls r2, r3, #4 80092d8: 6d7b ldr r3, [r7, #84] @ 0x54 80092da: 4413 add r3, r2 80092dc: f503 6381 add.w r3, r3, #1032 @ 0x408 80092e0: 653b str r3, [r7, #80] @ 0x50 80092e2: 683b ldr r3, [r7, #0] 80092e4: 895b ldrh r3, [r3, #10] 80092e6: 085b lsrs r3, r3, #1 80092e8: b29b uxth r3, r3 80092ea: 005b lsls r3, r3, #1 80092ec: b29a uxth r2, r3 80092ee: 6d3b ldr r3, [r7, #80] @ 0x50 80092f0: 801a strh r2, [r3, #0] if (ep->is_in == 0U) 80092f2: 683b ldr r3, [r7, #0] 80092f4: 785b ldrb r3, [r3, #1] 80092f6: 2b00 cmp r3, #0 80092f8: f040 8093 bne.w 8009422 { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 80092fc: 687a ldr r2, [r7, #4] 80092fe: 683b ldr r3, [r7, #0] 8009300: 781b ldrb r3, [r3, #0] 8009302: 009b lsls r3, r3, #2 8009304: 4413 add r3, r2 8009306: 881b ldrh r3, [r3, #0] 8009308: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 800930c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8009310: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009314: 2b00 cmp r3, #0 8009316: d01b beq.n 8009350 8009318: 687a ldr r2, [r7, #4] 800931a: 683b ldr r3, [r7, #0] 800931c: 781b ldrb r3, [r3, #0] 800931e: 009b lsls r3, r3, #2 8009320: 4413 add r3, r2 8009322: 881b ldrh r3, [r3, #0] 8009324: b29b uxth r3, r3 8009326: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800932a: f023 0370 bic.w r3, r3, #112 @ 0x70 800932e: 87fb strh r3, [r7, #62] @ 0x3e 8009330: 687a ldr r2, [r7, #4] 8009332: 683b ldr r3, [r7, #0] 8009334: 781b ldrb r3, [r3, #0] 8009336: 009b lsls r3, r3, #2 8009338: 441a add r2, r3 800933a: 8ffb ldrh r3, [r7, #62] @ 0x3e 800933c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009340: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009344: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8009348: f043 0380 orr.w r3, r3, #128 @ 0x80 800934c: b29b uxth r3, r3 800934e: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8009350: 687a ldr r2, [r7, #4] 8009352: 683b ldr r3, [r7, #0] 8009354: 781b ldrb r3, [r3, #0] 8009356: 009b lsls r3, r3, #2 8009358: 4413 add r3, r2 800935a: 881b ldrh r3, [r3, #0] 800935c: 87bb strh r3, [r7, #60] @ 0x3c 800935e: 8fbb ldrh r3, [r7, #60] @ 0x3c 8009360: f003 0340 and.w r3, r3, #64 @ 0x40 8009364: 2b00 cmp r3, #0 8009366: d01b beq.n 80093a0 8009368: 687a ldr r2, [r7, #4] 800936a: 683b ldr r3, [r7, #0] 800936c: 781b ldrb r3, [r3, #0] 800936e: 009b lsls r3, r3, #2 8009370: 4413 add r3, r2 8009372: 881b ldrh r3, [r3, #0] 8009374: b29b uxth r3, r3 8009376: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800937a: f023 0370 bic.w r3, r3, #112 @ 0x70 800937e: 877b strh r3, [r7, #58] @ 0x3a 8009380: 687a ldr r2, [r7, #4] 8009382: 683b ldr r3, [r7, #0] 8009384: 781b ldrb r3, [r3, #0] 8009386: 009b lsls r3, r3, #2 8009388: 441a add r2, r3 800938a: 8f7b ldrh r3, [r7, #58] @ 0x3a 800938c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009390: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009394: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009398: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800939c: b29b uxth r3, r3 800939e: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 80093a0: 687a ldr r2, [r7, #4] 80093a2: 683b ldr r3, [r7, #0] 80093a4: 781b ldrb r3, [r3, #0] 80093a6: 009b lsls r3, r3, #2 80093a8: 4413 add r3, r2 80093aa: 881b ldrh r3, [r3, #0] 80093ac: b29b uxth r3, r3 80093ae: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80093b2: f023 0370 bic.w r3, r3, #112 @ 0x70 80093b6: 873b strh r3, [r7, #56] @ 0x38 80093b8: 8f3b ldrh r3, [r7, #56] @ 0x38 80093ba: f483 5380 eor.w r3, r3, #4096 @ 0x1000 80093be: 873b strh r3, [r7, #56] @ 0x38 80093c0: 8f3b ldrh r3, [r7, #56] @ 0x38 80093c2: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80093c6: 873b strh r3, [r7, #56] @ 0x38 80093c8: 687a ldr r2, [r7, #4] 80093ca: 683b ldr r3, [r7, #0] 80093cc: 781b ldrb r3, [r3, #0] 80093ce: 009b lsls r3, r3, #2 80093d0: 441a add r2, r3 80093d2: 8f3b ldrh r3, [r7, #56] @ 0x38 80093d4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80093d8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80093dc: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80093e0: f043 0380 orr.w r3, r3, #128 @ 0x80 80093e4: b29b uxth r3, r3 80093e6: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80093e8: 687a ldr r2, [r7, #4] 80093ea: 683b ldr r3, [r7, #0] 80093ec: 781b ldrb r3, [r3, #0] 80093ee: 009b lsls r3, r3, #2 80093f0: 4413 add r3, r2 80093f2: 881b ldrh r3, [r3, #0] 80093f4: b29b uxth r3, r3 80093f6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80093fa: f023 0340 bic.w r3, r3, #64 @ 0x40 80093fe: 86fb strh r3, [r7, #54] @ 0x36 8009400: 687a ldr r2, [r7, #4] 8009402: 683b ldr r3, [r7, #0] 8009404: 781b ldrb r3, [r3, #0] 8009406: 009b lsls r3, r3, #2 8009408: 441a add r2, r3 800940a: 8efb ldrh r3, [r7, #54] @ 0x36 800940c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009410: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009414: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009418: f043 0380 orr.w r3, r3, #128 @ 0x80 800941c: b29b uxth r3, r3 800941e: 8013 strh r3, [r2, #0] 8009420: e0bc b.n 800959c } else { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 8009422: 687a ldr r2, [r7, #4] 8009424: 683b ldr r3, [r7, #0] 8009426: 781b ldrb r3, [r3, #0] 8009428: 009b lsls r3, r3, #2 800942a: 4413 add r3, r2 800942c: 881b ldrh r3, [r3, #0] 800942e: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 8009432: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8009436: f403 4380 and.w r3, r3, #16384 @ 0x4000 800943a: 2b00 cmp r3, #0 800943c: d01d beq.n 800947a 800943e: 687a ldr r2, [r7, #4] 8009440: 683b ldr r3, [r7, #0] 8009442: 781b ldrb r3, [r3, #0] 8009444: 009b lsls r3, r3, #2 8009446: 4413 add r3, r2 8009448: 881b ldrh r3, [r3, #0] 800944a: b29b uxth r3, r3 800944c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009450: f023 0370 bic.w r3, r3, #112 @ 0x70 8009454: f8a7 304c strh.w r3, [r7, #76] @ 0x4c 8009458: 687a ldr r2, [r7, #4] 800945a: 683b ldr r3, [r7, #0] 800945c: 781b ldrb r3, [r3, #0] 800945e: 009b lsls r3, r3, #2 8009460: 441a add r2, r3 8009462: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c 8009466: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800946a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800946e: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8009472: f043 0380 orr.w r3, r3, #128 @ 0x80 8009476: b29b uxth r3, r3 8009478: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 800947a: 687a ldr r2, [r7, #4] 800947c: 683b ldr r3, [r7, #0] 800947e: 781b ldrb r3, [r3, #0] 8009480: 009b lsls r3, r3, #2 8009482: 4413 add r3, r2 8009484: 881b ldrh r3, [r3, #0] 8009486: f8a7 304a strh.w r3, [r7, #74] @ 0x4a 800948a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800948e: f003 0340 and.w r3, r3, #64 @ 0x40 8009492: 2b00 cmp r3, #0 8009494: d01d beq.n 80094d2 8009496: 687a ldr r2, [r7, #4] 8009498: 683b ldr r3, [r7, #0] 800949a: 781b ldrb r3, [r3, #0] 800949c: 009b lsls r3, r3, #2 800949e: 4413 add r3, r2 80094a0: 881b ldrh r3, [r3, #0] 80094a2: b29b uxth r3, r3 80094a4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80094a8: f023 0370 bic.w r3, r3, #112 @ 0x70 80094ac: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 80094b0: 687a ldr r2, [r7, #4] 80094b2: 683b ldr r3, [r7, #0] 80094b4: 781b ldrb r3, [r3, #0] 80094b6: 009b lsls r3, r3, #2 80094b8: 441a add r2, r3 80094ba: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48 80094be: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80094c2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80094c6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80094ca: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80094ce: b29b uxth r3, r3 80094d0: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 80094d2: 683b ldr r3, [r7, #0] 80094d4: 78db ldrb r3, [r3, #3] 80094d6: 2b01 cmp r3, #1 80094d8: d024 beq.n 8009524 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 80094da: 687a ldr r2, [r7, #4] 80094dc: 683b ldr r3, [r7, #0] 80094de: 781b ldrb r3, [r3, #0] 80094e0: 009b lsls r3, r3, #2 80094e2: 4413 add r3, r2 80094e4: 881b ldrh r3, [r3, #0] 80094e6: b29b uxth r3, r3 80094e8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80094ec: f023 0340 bic.w r3, r3, #64 @ 0x40 80094f0: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 80094f4: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 80094f8: f083 0320 eor.w r3, r3, #32 80094fc: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 8009500: 687a ldr r2, [r7, #4] 8009502: 683b ldr r3, [r7, #0] 8009504: 781b ldrb r3, [r3, #0] 8009506: 009b lsls r3, r3, #2 8009508: 441a add r2, r3 800950a: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 800950e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009512: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009516: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800951a: f043 0380 orr.w r3, r3, #128 @ 0x80 800951e: b29b uxth r3, r3 8009520: 8013 strh r3, [r2, #0] 8009522: e01d b.n 8009560 } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009524: 687a ldr r2, [r7, #4] 8009526: 683b ldr r3, [r7, #0] 8009528: 781b ldrb r3, [r3, #0] 800952a: 009b lsls r3, r3, #2 800952c: 4413 add r3, r2 800952e: 881b ldrh r3, [r3, #0] 8009530: b29b uxth r3, r3 8009532: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009536: f023 0340 bic.w r3, r3, #64 @ 0x40 800953a: f8a7 3046 strh.w r3, [r7, #70] @ 0x46 800953e: 687a ldr r2, [r7, #4] 8009540: 683b ldr r3, [r7, #0] 8009542: 781b ldrb r3, [r3, #0] 8009544: 009b lsls r3, r3, #2 8009546: 441a add r2, r3 8009548: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46 800954c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009550: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009554: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009558: f043 0380 orr.w r3, r3, #128 @ 0x80 800955c: b29b uxth r3, r3 800955e: 8013 strh r3, [r2, #0] } PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 8009560: 687a ldr r2, [r7, #4] 8009562: 683b ldr r3, [r7, #0] 8009564: 781b ldrb r3, [r3, #0] 8009566: 009b lsls r3, r3, #2 8009568: 4413 add r3, r2 800956a: 881b ldrh r3, [r3, #0] 800956c: b29b uxth r3, r3 800956e: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8009572: f023 0370 bic.w r3, r3, #112 @ 0x70 8009576: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 800957a: 687a ldr r2, [r7, #4] 800957c: 683b ldr r3, [r7, #0] 800957e: 781b ldrb r3, [r3, #0] 8009580: 009b lsls r3, r3, #2 8009582: 441a add r2, r3 8009584: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 8009588: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800958c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009590: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009594: f043 0380 orr.w r3, r3, #128 @ 0x80 8009598: b29b uxth r3, r3 800959a: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return ret; 800959c: f897 306f ldrb.w r3, [r7, #111] @ 0x6f } 80095a0: 4618 mov r0, r3 80095a2: 3774 adds r7, #116 @ 0x74 80095a4: 46bd mov sp, r7 80095a6: bc80 pop {r7} 80095a8: 4770 bx lr 80095aa: bf00 nop 080095ac : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 80095ac: b480 push {r7} 80095ae: b08d sub sp, #52 @ 0x34 80095b0: af00 add r7, sp, #0 80095b2: 6078 str r0, [r7, #4] 80095b4: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 80095b6: 683b ldr r3, [r7, #0] 80095b8: 7b1b ldrb r3, [r3, #12] 80095ba: 2b00 cmp r3, #0 80095bc: f040 808e bne.w 80096dc { if (ep->is_in != 0U) 80095c0: 683b ldr r3, [r7, #0] 80095c2: 785b ldrb r3, [r3, #1] 80095c4: 2b00 cmp r3, #0 80095c6: d044 beq.n 8009652 { PCD_CLEAR_TX_DTOG(USBx, ep->num); 80095c8: 687a ldr r2, [r7, #4] 80095ca: 683b ldr r3, [r7, #0] 80095cc: 781b ldrb r3, [r3, #0] 80095ce: 009b lsls r3, r3, #2 80095d0: 4413 add r3, r2 80095d2: 881b ldrh r3, [r3, #0] 80095d4: 81bb strh r3, [r7, #12] 80095d6: 89bb ldrh r3, [r7, #12] 80095d8: f003 0340 and.w r3, r3, #64 @ 0x40 80095dc: 2b00 cmp r3, #0 80095de: d01b beq.n 8009618 80095e0: 687a ldr r2, [r7, #4] 80095e2: 683b ldr r3, [r7, #0] 80095e4: 781b ldrb r3, [r3, #0] 80095e6: 009b lsls r3, r3, #2 80095e8: 4413 add r3, r2 80095ea: 881b ldrh r3, [r3, #0] 80095ec: b29b uxth r3, r3 80095ee: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80095f2: f023 0370 bic.w r3, r3, #112 @ 0x70 80095f6: 817b strh r3, [r7, #10] 80095f8: 687a ldr r2, [r7, #4] 80095fa: 683b ldr r3, [r7, #0] 80095fc: 781b ldrb r3, [r3, #0] 80095fe: 009b lsls r3, r3, #2 8009600: 441a add r2, r3 8009602: 897b ldrh r3, [r7, #10] 8009604: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009608: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800960c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009610: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8009614: b29b uxth r3, r3 8009616: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009618: 687a ldr r2, [r7, #4] 800961a: 683b ldr r3, [r7, #0] 800961c: 781b ldrb r3, [r3, #0] 800961e: 009b lsls r3, r3, #2 8009620: 4413 add r3, r2 8009622: 881b ldrh r3, [r3, #0] 8009624: b29b uxth r3, r3 8009626: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800962a: f023 0340 bic.w r3, r3, #64 @ 0x40 800962e: 813b strh r3, [r7, #8] 8009630: 687a ldr r2, [r7, #4] 8009632: 683b ldr r3, [r7, #0] 8009634: 781b ldrb r3, [r3, #0] 8009636: 009b lsls r3, r3, #2 8009638: 441a add r2, r3 800963a: 893b ldrh r3, [r7, #8] 800963c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009640: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009644: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009648: f043 0380 orr.w r3, r3, #128 @ 0x80 800964c: b29b uxth r3, r3 800964e: 8013 strh r3, [r2, #0] 8009650: e192 b.n 8009978 } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 8009652: 687a ldr r2, [r7, #4] 8009654: 683b ldr r3, [r7, #0] 8009656: 781b ldrb r3, [r3, #0] 8009658: 009b lsls r3, r3, #2 800965a: 4413 add r3, r2 800965c: 881b ldrh r3, [r3, #0] 800965e: 827b strh r3, [r7, #18] 8009660: 8a7b ldrh r3, [r7, #18] 8009662: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009666: 2b00 cmp r3, #0 8009668: d01b beq.n 80096a2 800966a: 687a ldr r2, [r7, #4] 800966c: 683b ldr r3, [r7, #0] 800966e: 781b ldrb r3, [r3, #0] 8009670: 009b lsls r3, r3, #2 8009672: 4413 add r3, r2 8009674: 881b ldrh r3, [r3, #0] 8009676: b29b uxth r3, r3 8009678: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800967c: f023 0370 bic.w r3, r3, #112 @ 0x70 8009680: 823b strh r3, [r7, #16] 8009682: 687a ldr r2, [r7, #4] 8009684: 683b ldr r3, [r7, #0] 8009686: 781b ldrb r3, [r3, #0] 8009688: 009b lsls r3, r3, #2 800968a: 441a add r2, r3 800968c: 8a3b ldrh r3, [r7, #16] 800968e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009692: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009696: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800969a: f043 0380 orr.w r3, r3, #128 @ 0x80 800969e: b29b uxth r3, r3 80096a0: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 80096a2: 687a ldr r2, [r7, #4] 80096a4: 683b ldr r3, [r7, #0] 80096a6: 781b ldrb r3, [r3, #0] 80096a8: 009b lsls r3, r3, #2 80096aa: 4413 add r3, r2 80096ac: 881b ldrh r3, [r3, #0] 80096ae: b29b uxth r3, r3 80096b0: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80096b4: f023 0370 bic.w r3, r3, #112 @ 0x70 80096b8: 81fb strh r3, [r7, #14] 80096ba: 687a ldr r2, [r7, #4] 80096bc: 683b ldr r3, [r7, #0] 80096be: 781b ldrb r3, [r3, #0] 80096c0: 009b lsls r3, r3, #2 80096c2: 441a add r2, r3 80096c4: 89fb ldrh r3, [r7, #14] 80096c6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80096ca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80096ce: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80096d2: f043 0380 orr.w r3, r3, #128 @ 0x80 80096d6: b29b uxth r3, r3 80096d8: 8013 strh r3, [r2, #0] 80096da: e14d b.n 8009978 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->is_in == 0U) 80096dc: 683b ldr r3, [r7, #0] 80096de: 785b ldrb r3, [r3, #1] 80096e0: 2b00 cmp r3, #0 80096e2: f040 80a5 bne.w 8009830 { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 80096e6: 687a ldr r2, [r7, #4] 80096e8: 683b ldr r3, [r7, #0] 80096ea: 781b ldrb r3, [r3, #0] 80096ec: 009b lsls r3, r3, #2 80096ee: 4413 add r3, r2 80096f0: 881b ldrh r3, [r3, #0] 80096f2: 843b strh r3, [r7, #32] 80096f4: 8c3b ldrh r3, [r7, #32] 80096f6: f403 4380 and.w r3, r3, #16384 @ 0x4000 80096fa: 2b00 cmp r3, #0 80096fc: d01b beq.n 8009736 80096fe: 687a ldr r2, [r7, #4] 8009700: 683b ldr r3, [r7, #0] 8009702: 781b ldrb r3, [r3, #0] 8009704: 009b lsls r3, r3, #2 8009706: 4413 add r3, r2 8009708: 881b ldrh r3, [r3, #0] 800970a: b29b uxth r3, r3 800970c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009710: f023 0370 bic.w r3, r3, #112 @ 0x70 8009714: 83fb strh r3, [r7, #30] 8009716: 687a ldr r2, [r7, #4] 8009718: 683b ldr r3, [r7, #0] 800971a: 781b ldrb r3, [r3, #0] 800971c: 009b lsls r3, r3, #2 800971e: 441a add r2, r3 8009720: 8bfb ldrh r3, [r7, #30] 8009722: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009726: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800972a: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800972e: f043 0380 orr.w r3, r3, #128 @ 0x80 8009732: b29b uxth r3, r3 8009734: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8009736: 687a ldr r2, [r7, #4] 8009738: 683b ldr r3, [r7, #0] 800973a: 781b ldrb r3, [r3, #0] 800973c: 009b lsls r3, r3, #2 800973e: 4413 add r3, r2 8009740: 881b ldrh r3, [r3, #0] 8009742: 83bb strh r3, [r7, #28] 8009744: 8bbb ldrh r3, [r7, #28] 8009746: f003 0340 and.w r3, r3, #64 @ 0x40 800974a: 2b00 cmp r3, #0 800974c: d01b beq.n 8009786 800974e: 687a ldr r2, [r7, #4] 8009750: 683b ldr r3, [r7, #0] 8009752: 781b ldrb r3, [r3, #0] 8009754: 009b lsls r3, r3, #2 8009756: 4413 add r3, r2 8009758: 881b ldrh r3, [r3, #0] 800975a: b29b uxth r3, r3 800975c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009760: f023 0370 bic.w r3, r3, #112 @ 0x70 8009764: 837b strh r3, [r7, #26] 8009766: 687a ldr r2, [r7, #4] 8009768: 683b ldr r3, [r7, #0] 800976a: 781b ldrb r3, [r3, #0] 800976c: 009b lsls r3, r3, #2 800976e: 441a add r2, r3 8009770: 8b7b ldrh r3, [r7, #26] 8009772: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009776: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800977a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800977e: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8009782: b29b uxth r3, r3 8009784: 8013 strh r3, [r2, #0] /* Reset value of the data toggle bits for the endpoint out*/ PCD_TX_DTOG(USBx, ep->num); 8009786: 687a ldr r2, [r7, #4] 8009788: 683b ldr r3, [r7, #0] 800978a: 781b ldrb r3, [r3, #0] 800978c: 009b lsls r3, r3, #2 800978e: 4413 add r3, r2 8009790: 881b ldrh r3, [r3, #0] 8009792: b29b uxth r3, r3 8009794: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009798: f023 0370 bic.w r3, r3, #112 @ 0x70 800979c: 833b strh r3, [r7, #24] 800979e: 687a ldr r2, [r7, #4] 80097a0: 683b ldr r3, [r7, #0] 80097a2: 781b ldrb r3, [r3, #0] 80097a4: 009b lsls r3, r3, #2 80097a6: 441a add r2, r3 80097a8: 8b3b ldrh r3, [r7, #24] 80097aa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80097ae: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80097b2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80097b6: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80097ba: b29b uxth r3, r3 80097bc: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 80097be: 687a ldr r2, [r7, #4] 80097c0: 683b ldr r3, [r7, #0] 80097c2: 781b ldrb r3, [r3, #0] 80097c4: 009b lsls r3, r3, #2 80097c6: 4413 add r3, r2 80097c8: 881b ldrh r3, [r3, #0] 80097ca: b29b uxth r3, r3 80097cc: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80097d0: f023 0370 bic.w r3, r3, #112 @ 0x70 80097d4: 82fb strh r3, [r7, #22] 80097d6: 687a ldr r2, [r7, #4] 80097d8: 683b ldr r3, [r7, #0] 80097da: 781b ldrb r3, [r3, #0] 80097dc: 009b lsls r3, r3, #2 80097de: 441a add r2, r3 80097e0: 8afb ldrh r3, [r7, #22] 80097e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80097e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80097ea: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80097ee: f043 0380 orr.w r3, r3, #128 @ 0x80 80097f2: b29b uxth r3, r3 80097f4: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80097f6: 687a ldr r2, [r7, #4] 80097f8: 683b ldr r3, [r7, #0] 80097fa: 781b ldrb r3, [r3, #0] 80097fc: 009b lsls r3, r3, #2 80097fe: 4413 add r3, r2 8009800: 881b ldrh r3, [r3, #0] 8009802: b29b uxth r3, r3 8009804: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009808: f023 0340 bic.w r3, r3, #64 @ 0x40 800980c: 82bb strh r3, [r7, #20] 800980e: 687a ldr r2, [r7, #4] 8009810: 683b ldr r3, [r7, #0] 8009812: 781b ldrb r3, [r3, #0] 8009814: 009b lsls r3, r3, #2 8009816: 441a add r2, r3 8009818: 8abb ldrh r3, [r7, #20] 800981a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800981e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009822: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009826: f043 0380 orr.w r3, r3, #128 @ 0x80 800982a: b29b uxth r3, r3 800982c: 8013 strh r3, [r2, #0] 800982e: e0a3 b.n 8009978 } else { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 8009830: 687a ldr r2, [r7, #4] 8009832: 683b ldr r3, [r7, #0] 8009834: 781b ldrb r3, [r3, #0] 8009836: 009b lsls r3, r3, #2 8009838: 4413 add r3, r2 800983a: 881b ldrh r3, [r3, #0] 800983c: 85fb strh r3, [r7, #46] @ 0x2e 800983e: 8dfb ldrh r3, [r7, #46] @ 0x2e 8009840: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009844: 2b00 cmp r3, #0 8009846: d01b beq.n 8009880 8009848: 687a ldr r2, [r7, #4] 800984a: 683b ldr r3, [r7, #0] 800984c: 781b ldrb r3, [r3, #0] 800984e: 009b lsls r3, r3, #2 8009850: 4413 add r3, r2 8009852: 881b ldrh r3, [r3, #0] 8009854: b29b uxth r3, r3 8009856: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800985a: f023 0370 bic.w r3, r3, #112 @ 0x70 800985e: 85bb strh r3, [r7, #44] @ 0x2c 8009860: 687a ldr r2, [r7, #4] 8009862: 683b ldr r3, [r7, #0] 8009864: 781b ldrb r3, [r3, #0] 8009866: 009b lsls r3, r3, #2 8009868: 441a add r2, r3 800986a: 8dbb ldrh r3, [r7, #44] @ 0x2c 800986c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009870: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009874: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8009878: f043 0380 orr.w r3, r3, #128 @ 0x80 800987c: b29b uxth r3, r3 800987e: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8009880: 687a ldr r2, [r7, #4] 8009882: 683b ldr r3, [r7, #0] 8009884: 781b ldrb r3, [r3, #0] 8009886: 009b lsls r3, r3, #2 8009888: 4413 add r3, r2 800988a: 881b ldrh r3, [r3, #0] 800988c: 857b strh r3, [r7, #42] @ 0x2a 800988e: 8d7b ldrh r3, [r7, #42] @ 0x2a 8009890: f003 0340 and.w r3, r3, #64 @ 0x40 8009894: 2b00 cmp r3, #0 8009896: d01b beq.n 80098d0 8009898: 687a ldr r2, [r7, #4] 800989a: 683b ldr r3, [r7, #0] 800989c: 781b ldrb r3, [r3, #0] 800989e: 009b lsls r3, r3, #2 80098a0: 4413 add r3, r2 80098a2: 881b ldrh r3, [r3, #0] 80098a4: b29b uxth r3, r3 80098a6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80098aa: f023 0370 bic.w r3, r3, #112 @ 0x70 80098ae: 853b strh r3, [r7, #40] @ 0x28 80098b0: 687a ldr r2, [r7, #4] 80098b2: 683b ldr r3, [r7, #0] 80098b4: 781b ldrb r3, [r3, #0] 80098b6: 009b lsls r3, r3, #2 80098b8: 441a add r2, r3 80098ba: 8d3b ldrh r3, [r7, #40] @ 0x28 80098bc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80098c0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80098c4: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80098c8: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80098cc: b29b uxth r3, r3 80098ce: 8013 strh r3, [r2, #0] PCD_RX_DTOG(USBx, ep->num); 80098d0: 687a ldr r2, [r7, #4] 80098d2: 683b ldr r3, [r7, #0] 80098d4: 781b ldrb r3, [r3, #0] 80098d6: 009b lsls r3, r3, #2 80098d8: 4413 add r3, r2 80098da: 881b ldrh r3, [r3, #0] 80098dc: b29b uxth r3, r3 80098de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80098e2: f023 0370 bic.w r3, r3, #112 @ 0x70 80098e6: 84fb strh r3, [r7, #38] @ 0x26 80098e8: 687a ldr r2, [r7, #4] 80098ea: 683b ldr r3, [r7, #0] 80098ec: 781b ldrb r3, [r3, #0] 80098ee: 009b lsls r3, r3, #2 80098f0: 441a add r2, r3 80098f2: 8cfb ldrh r3, [r7, #38] @ 0x26 80098f4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80098f8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80098fc: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8009900: f043 0380 orr.w r3, r3, #128 @ 0x80 8009904: b29b uxth r3, r3 8009906: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint*/ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8009908: 687a ldr r2, [r7, #4] 800990a: 683b ldr r3, [r7, #0] 800990c: 781b ldrb r3, [r3, #0] 800990e: 009b lsls r3, r3, #2 8009910: 4413 add r3, r2 8009912: 881b ldrh r3, [r3, #0] 8009914: b29b uxth r3, r3 8009916: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800991a: f023 0340 bic.w r3, r3, #64 @ 0x40 800991e: 84bb strh r3, [r7, #36] @ 0x24 8009920: 687a ldr r2, [r7, #4] 8009922: 683b ldr r3, [r7, #0] 8009924: 781b ldrb r3, [r3, #0] 8009926: 009b lsls r3, r3, #2 8009928: 441a add r2, r3 800992a: 8cbb ldrh r3, [r7, #36] @ 0x24 800992c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009930: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009934: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009938: f043 0380 orr.w r3, r3, #128 @ 0x80 800993c: b29b uxth r3, r3 800993e: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 8009940: 687a ldr r2, [r7, #4] 8009942: 683b ldr r3, [r7, #0] 8009944: 781b ldrb r3, [r3, #0] 8009946: 009b lsls r3, r3, #2 8009948: 4413 add r3, r2 800994a: 881b ldrh r3, [r3, #0] 800994c: b29b uxth r3, r3 800994e: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8009952: f023 0370 bic.w r3, r3, #112 @ 0x70 8009956: 847b strh r3, [r7, #34] @ 0x22 8009958: 687a ldr r2, [r7, #4] 800995a: 683b ldr r3, [r7, #0] 800995c: 781b ldrb r3, [r3, #0] 800995e: 009b lsls r3, r3, #2 8009960: 441a add r2, r3 8009962: 8c7b ldrh r3, [r7, #34] @ 0x22 8009964: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009968: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800996c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009970: f043 0380 orr.w r3, r3, #128 @ 0x80 8009974: b29b uxth r3, r3 8009976: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 8009978: 2300 movs r3, #0 } 800997a: 4618 mov r0, r3 800997c: 3734 adds r7, #52 @ 0x34 800997e: 46bd mov sp, r7 8009980: bc80 pop {r7} 8009982: 4770 bx lr 08009984 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8009984: b580 push {r7, lr} 8009986: b0c2 sub sp, #264 @ 0x108 8009988: af00 add r7, sp, #0 800998a: f507 7384 add.w r3, r7, #264 @ 0x108 800998e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009992: 6018 str r0, [r3, #0] 8009994: f507 7384 add.w r3, r7, #264 @ 0x108 8009998: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800999c: 6019 str r1, [r3, #0] uint16_t pmabuffer; uint16_t wEPVal; #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* IN endpoint */ if (ep->is_in == 1U) 800999e: f507 7384 add.w r3, r7, #264 @ 0x108 80099a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80099a6: 681b ldr r3, [r3, #0] 80099a8: 785b ldrb r3, [r3, #1] 80099aa: 2b01 cmp r3, #1 80099ac: f040 86b7 bne.w 800a71e { /*Multi packet transfer*/ if (ep->xfer_len > ep->maxpacket) 80099b0: f507 7384 add.w r3, r7, #264 @ 0x108 80099b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80099b8: 681b ldr r3, [r3, #0] 80099ba: 699a ldr r2, [r3, #24] 80099bc: f507 7384 add.w r3, r7, #264 @ 0x108 80099c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80099c4: 681b ldr r3, [r3, #0] 80099c6: 691b ldr r3, [r3, #16] 80099c8: 429a cmp r2, r3 80099ca: d908 bls.n 80099de { len = ep->maxpacket; 80099cc: f507 7384 add.w r3, r7, #264 @ 0x108 80099d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80099d4: 681b ldr r3, [r3, #0] 80099d6: 691b ldr r3, [r3, #16] 80099d8: f8c7 3104 str.w r3, [r7, #260] @ 0x104 80099dc: e007 b.n 80099ee } else { len = ep->xfer_len; 80099de: f507 7384 add.w r3, r7, #264 @ 0x108 80099e2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80099e6: 681b ldr r3, [r3, #0] 80099e8: 699b ldr r3, [r3, #24] 80099ea: f8c7 3104 str.w r3, [r7, #260] @ 0x104 } /* configure and validate Tx endpoint */ if (ep->doublebuffer == 0U) 80099ee: f507 7384 add.w r3, r7, #264 @ 0x108 80099f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80099f6: 681b ldr r3, [r3, #0] 80099f8: 7b1b ldrb r3, [r3, #12] 80099fa: 2b00 cmp r3, #0 80099fc: d13a bne.n 8009a74 { USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); 80099fe: f507 7384 add.w r3, r7, #264 @ 0x108 8009a02: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009a06: 681b ldr r3, [r3, #0] 8009a08: 6959 ldr r1, [r3, #20] 8009a0a: f507 7384 add.w r3, r7, #264 @ 0x108 8009a0e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009a12: 681b ldr r3, [r3, #0] 8009a14: 88da ldrh r2, [r3, #6] 8009a16: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009a1a: b29b uxth r3, r3 8009a1c: f507 7084 add.w r0, r7, #264 @ 0x108 8009a20: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8009a24: 6800 ldr r0, [r0, #0] 8009a26: f001 fc9c bl 800b362 PCD_SET_EP_TX_CNT(USBx, ep->num, len); 8009a2a: f507 7384 add.w r3, r7, #264 @ 0x108 8009a2e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009a32: 681b ldr r3, [r3, #0] 8009a34: 613b str r3, [r7, #16] 8009a36: f507 7384 add.w r3, r7, #264 @ 0x108 8009a3a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009a3e: 681b ldr r3, [r3, #0] 8009a40: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009a44: b29b uxth r3, r3 8009a46: 461a mov r2, r3 8009a48: 693b ldr r3, [r7, #16] 8009a4a: 4413 add r3, r2 8009a4c: 613b str r3, [r7, #16] 8009a4e: f507 7384 add.w r3, r7, #264 @ 0x108 8009a52: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009a56: 681b ldr r3, [r3, #0] 8009a58: 781b ldrb r3, [r3, #0] 8009a5a: 011a lsls r2, r3, #4 8009a5c: 693b ldr r3, [r7, #16] 8009a5e: 4413 add r3, r2 8009a60: f203 4304 addw r3, r3, #1028 @ 0x404 8009a64: 60fb str r3, [r7, #12] 8009a66: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009a6a: b29a uxth r2, r3 8009a6c: 68fb ldr r3, [r7, #12] 8009a6e: 801a strh r2, [r3, #0] 8009a70: f000 be1f b.w 800a6b2 } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* double buffer bulk management */ if (ep->type == EP_TYPE_BULK) 8009a74: f507 7384 add.w r3, r7, #264 @ 0x108 8009a78: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009a7c: 681b ldr r3, [r3, #0] 8009a7e: 78db ldrb r3, [r3, #3] 8009a80: 2b02 cmp r3, #2 8009a82: f040 8462 bne.w 800a34a { if (ep->xfer_len_db > ep->maxpacket) 8009a86: f507 7384 add.w r3, r7, #264 @ 0x108 8009a8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009a8e: 681b ldr r3, [r3, #0] 8009a90: 6a1a ldr r2, [r3, #32] 8009a92: f507 7384 add.w r3, r7, #264 @ 0x108 8009a96: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009a9a: 681b ldr r3, [r3, #0] 8009a9c: 691b ldr r3, [r3, #16] 8009a9e: 429a cmp r2, r3 8009aa0: f240 83df bls.w 800a262 { /* enable double buffer */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 8009aa4: f507 7384 add.w r3, r7, #264 @ 0x108 8009aa8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009aac: 681a ldr r2, [r3, #0] 8009aae: f507 7384 add.w r3, r7, #264 @ 0x108 8009ab2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ab6: 681b ldr r3, [r3, #0] 8009ab8: 781b ldrb r3, [r3, #0] 8009aba: 009b lsls r3, r3, #2 8009abc: 4413 add r3, r2 8009abe: 881b ldrh r3, [r3, #0] 8009ac0: b29b uxth r3, r3 8009ac2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8009ac6: f023 0370 bic.w r3, r3, #112 @ 0x70 8009aca: f8a7 3056 strh.w r3, [r7, #86] @ 0x56 8009ace: f507 7384 add.w r3, r7, #264 @ 0x108 8009ad2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009ad6: 681a ldr r2, [r3, #0] 8009ad8: f507 7384 add.w r3, r7, #264 @ 0x108 8009adc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ae0: 681b ldr r3, [r3, #0] 8009ae2: 781b ldrb r3, [r3, #0] 8009ae4: 009b lsls r3, r3, #2 8009ae6: 441a add r2, r3 8009ae8: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56 8009aec: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009af0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009af4: f443 4301 orr.w r3, r3, #33024 @ 0x8100 8009af8: f043 0380 orr.w r3, r3, #128 @ 0x80 8009afc: b29b uxth r3, r3 8009afe: 8013 strh r3, [r2, #0] /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 8009b00: f507 7384 add.w r3, r7, #264 @ 0x108 8009b04: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b08: 681b ldr r3, [r3, #0] 8009b0a: 6a1a ldr r2, [r3, #32] 8009b0c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009b10: 1ad2 subs r2, r2, r3 8009b12: f507 7384 add.w r3, r7, #264 @ 0x108 8009b16: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b1a: 681b ldr r3, [r3, #0] 8009b1c: 621a str r2, [r3, #32] /* Fill the two first buffer in the Buffer0 & Buffer1 */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 8009b1e: f507 7384 add.w r3, r7, #264 @ 0x108 8009b22: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009b26: 681a ldr r2, [r3, #0] 8009b28: f507 7384 add.w r3, r7, #264 @ 0x108 8009b2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b30: 681b ldr r3, [r3, #0] 8009b32: 781b ldrb r3, [r3, #0] 8009b34: 009b lsls r3, r3, #2 8009b36: 4413 add r3, r2 8009b38: 881b ldrh r3, [r3, #0] 8009b3a: b29b uxth r3, r3 8009b3c: f003 0340 and.w r3, r3, #64 @ 0x40 8009b40: 2b00 cmp r3, #0 8009b42: f000 81c7 beq.w 8009ed4 { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 8009b46: f507 7384 add.w r3, r7, #264 @ 0x108 8009b4a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009b4e: 681b ldr r3, [r3, #0] 8009b50: 633b str r3, [r7, #48] @ 0x30 8009b52: f507 7384 add.w r3, r7, #264 @ 0x108 8009b56: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b5a: 681b ldr r3, [r3, #0] 8009b5c: 785b ldrb r3, [r3, #1] 8009b5e: 2b00 cmp r3, #0 8009b60: d177 bne.n 8009c52 8009b62: f507 7384 add.w r3, r7, #264 @ 0x108 8009b66: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009b6a: 681b ldr r3, [r3, #0] 8009b6c: 62bb str r3, [r7, #40] @ 0x28 8009b6e: f507 7384 add.w r3, r7, #264 @ 0x108 8009b72: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009b76: 681b ldr r3, [r3, #0] 8009b78: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009b7c: b29b uxth r3, r3 8009b7e: 461a mov r2, r3 8009b80: 6abb ldr r3, [r7, #40] @ 0x28 8009b82: 4413 add r3, r2 8009b84: 62bb str r3, [r7, #40] @ 0x28 8009b86: f507 7384 add.w r3, r7, #264 @ 0x108 8009b8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009b8e: 681b ldr r3, [r3, #0] 8009b90: 781b ldrb r3, [r3, #0] 8009b92: 011a lsls r2, r3, #4 8009b94: 6abb ldr r3, [r7, #40] @ 0x28 8009b96: 4413 add r3, r2 8009b98: f203 430c addw r3, r3, #1036 @ 0x40c 8009b9c: 627b str r3, [r7, #36] @ 0x24 8009b9e: 6a7b ldr r3, [r7, #36] @ 0x24 8009ba0: 881b ldrh r3, [r3, #0] 8009ba2: b29b uxth r3, r3 8009ba4: f3c3 0309 ubfx r3, r3, #0, #10 8009ba8: b29a uxth r2, r3 8009baa: 6a7b ldr r3, [r7, #36] @ 0x24 8009bac: 801a strh r2, [r3, #0] 8009bae: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009bb2: 2b3e cmp r3, #62 @ 0x3e 8009bb4: d921 bls.n 8009bfa 8009bb6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009bba: 095b lsrs r3, r3, #5 8009bbc: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8009bc0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009bc4: f003 031f and.w r3, r3, #31 8009bc8: 2b00 cmp r3, #0 8009bca: d104 bne.n 8009bd6 8009bcc: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8009bd0: 3b01 subs r3, #1 8009bd2: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8009bd6: 6a7b ldr r3, [r7, #36] @ 0x24 8009bd8: 881b ldrh r3, [r3, #0] 8009bda: b29a uxth r2, r3 8009bdc: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8009be0: b29b uxth r3, r3 8009be2: 029b lsls r3, r3, #10 8009be4: b29b uxth r3, r3 8009be6: 4313 orrs r3, r2 8009be8: b29b uxth r3, r3 8009bea: ea6f 4343 mvn.w r3, r3, lsl #17 8009bee: ea6f 4353 mvn.w r3, r3, lsr #17 8009bf2: b29a uxth r2, r3 8009bf4: 6a7b ldr r3, [r7, #36] @ 0x24 8009bf6: 801a strh r2, [r3, #0] 8009bf8: e050 b.n 8009c9c 8009bfa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009bfe: 2b00 cmp r3, #0 8009c00: d10a bne.n 8009c18 8009c02: 6a7b ldr r3, [r7, #36] @ 0x24 8009c04: 881b ldrh r3, [r3, #0] 8009c06: b29b uxth r3, r3 8009c08: ea6f 4343 mvn.w r3, r3, lsl #17 8009c0c: ea6f 4353 mvn.w r3, r3, lsr #17 8009c10: b29a uxth r2, r3 8009c12: 6a7b ldr r3, [r7, #36] @ 0x24 8009c14: 801a strh r2, [r3, #0] 8009c16: e041 b.n 8009c9c 8009c18: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c1c: 085b lsrs r3, r3, #1 8009c1e: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8009c22: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c26: f003 0301 and.w r3, r3, #1 8009c2a: 2b00 cmp r3, #0 8009c2c: d004 beq.n 8009c38 8009c2e: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8009c32: 3301 adds r3, #1 8009c34: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8009c38: 6a7b ldr r3, [r7, #36] @ 0x24 8009c3a: 881b ldrh r3, [r3, #0] 8009c3c: b29a uxth r2, r3 8009c3e: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8009c42: b29b uxth r3, r3 8009c44: 029b lsls r3, r3, #10 8009c46: b29b uxth r3, r3 8009c48: 4313 orrs r3, r2 8009c4a: b29a uxth r2, r3 8009c4c: 6a7b ldr r3, [r7, #36] @ 0x24 8009c4e: 801a strh r2, [r3, #0] 8009c50: e024 b.n 8009c9c 8009c52: f507 7384 add.w r3, r7, #264 @ 0x108 8009c56: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009c5a: 681b ldr r3, [r3, #0] 8009c5c: 785b ldrb r3, [r3, #1] 8009c5e: 2b01 cmp r3, #1 8009c60: d11c bne.n 8009c9c 8009c62: f507 7384 add.w r3, r7, #264 @ 0x108 8009c66: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009c6a: 681b ldr r3, [r3, #0] 8009c6c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009c70: b29b uxth r3, r3 8009c72: 461a mov r2, r3 8009c74: 6b3b ldr r3, [r7, #48] @ 0x30 8009c76: 4413 add r3, r2 8009c78: 633b str r3, [r7, #48] @ 0x30 8009c7a: f507 7384 add.w r3, r7, #264 @ 0x108 8009c7e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009c82: 681b ldr r3, [r3, #0] 8009c84: 781b ldrb r3, [r3, #0] 8009c86: 011a lsls r2, r3, #4 8009c88: 6b3b ldr r3, [r7, #48] @ 0x30 8009c8a: 4413 add r3, r2 8009c8c: f203 430c addw r3, r3, #1036 @ 0x40c 8009c90: 62fb str r3, [r7, #44] @ 0x2c 8009c92: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009c96: b29a uxth r2, r3 8009c98: 6afb ldr r3, [r7, #44] @ 0x2c 8009c9a: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 8009c9c: f507 7384 add.w r3, r7, #264 @ 0x108 8009ca0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ca4: 681b ldr r3, [r3, #0] 8009ca6: 895b ldrh r3, [r3, #10] 8009ca8: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8009cac: f507 7384 add.w r3, r7, #264 @ 0x108 8009cb0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009cb4: 681b ldr r3, [r3, #0] 8009cb6: 6959 ldr r1, [r3, #20] 8009cb8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009cbc: b29b uxth r3, r3 8009cbe: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8009cc2: f507 7084 add.w r0, r7, #264 @ 0x108 8009cc6: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8009cca: 6800 ldr r0, [r0, #0] 8009ccc: f001 fb49 bl 800b362 ep->xfer_buff += len; 8009cd0: f507 7384 add.w r3, r7, #264 @ 0x108 8009cd4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009cd8: 681b ldr r3, [r3, #0] 8009cda: 695a ldr r2, [r3, #20] 8009cdc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009ce0: 441a add r2, r3 8009ce2: f507 7384 add.w r3, r7, #264 @ 0x108 8009ce6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009cea: 681b ldr r3, [r3, #0] 8009cec: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 8009cee: f507 7384 add.w r3, r7, #264 @ 0x108 8009cf2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009cf6: 681b ldr r3, [r3, #0] 8009cf8: 6a1a ldr r2, [r3, #32] 8009cfa: f507 7384 add.w r3, r7, #264 @ 0x108 8009cfe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d02: 681b ldr r3, [r3, #0] 8009d04: 691b ldr r3, [r3, #16] 8009d06: 429a cmp r2, r3 8009d08: d90f bls.n 8009d2a { ep->xfer_len_db -= len; 8009d0a: f507 7384 add.w r3, r7, #264 @ 0x108 8009d0e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d12: 681b ldr r3, [r3, #0] 8009d14: 6a1a ldr r2, [r3, #32] 8009d16: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009d1a: 1ad2 subs r2, r2, r3 8009d1c: f507 7384 add.w r3, r7, #264 @ 0x108 8009d20: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d24: 681b ldr r3, [r3, #0] 8009d26: 621a str r2, [r3, #32] 8009d28: e00e b.n 8009d48 } else { len = ep->xfer_len_db; 8009d2a: f507 7384 add.w r3, r7, #264 @ 0x108 8009d2e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d32: 681b ldr r3, [r3, #0] 8009d34: 6a1b ldr r3, [r3, #32] 8009d36: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 8009d3a: f507 7384 add.w r3, r7, #264 @ 0x108 8009d3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d42: 681b ldr r3, [r3, #0] 8009d44: 2200 movs r2, #0 8009d46: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 8009d48: f507 7384 add.w r3, r7, #264 @ 0x108 8009d4c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d50: 681b ldr r3, [r3, #0] 8009d52: 785b ldrb r3, [r3, #1] 8009d54: 2b00 cmp r3, #0 8009d56: d177 bne.n 8009e48 8009d58: f507 7384 add.w r3, r7, #264 @ 0x108 8009d5c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009d60: 681b ldr r3, [r3, #0] 8009d62: 61bb str r3, [r7, #24] 8009d64: f507 7384 add.w r3, r7, #264 @ 0x108 8009d68: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009d6c: 681b ldr r3, [r3, #0] 8009d6e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009d72: b29b uxth r3, r3 8009d74: 461a mov r2, r3 8009d76: 69bb ldr r3, [r7, #24] 8009d78: 4413 add r3, r2 8009d7a: 61bb str r3, [r7, #24] 8009d7c: f507 7384 add.w r3, r7, #264 @ 0x108 8009d80: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009d84: 681b ldr r3, [r3, #0] 8009d86: 781b ldrb r3, [r3, #0] 8009d88: 011a lsls r2, r3, #4 8009d8a: 69bb ldr r3, [r7, #24] 8009d8c: 4413 add r3, r2 8009d8e: f203 4304 addw r3, r3, #1028 @ 0x404 8009d92: 617b str r3, [r7, #20] 8009d94: 697b ldr r3, [r7, #20] 8009d96: 881b ldrh r3, [r3, #0] 8009d98: b29b uxth r3, r3 8009d9a: f3c3 0309 ubfx r3, r3, #0, #10 8009d9e: b29a uxth r2, r3 8009da0: 697b ldr r3, [r7, #20] 8009da2: 801a strh r2, [r3, #0] 8009da4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009da8: 2b3e cmp r3, #62 @ 0x3e 8009daa: d921 bls.n 8009df0 8009dac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009db0: 095b lsrs r3, r3, #5 8009db2: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8009db6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009dba: f003 031f and.w r3, r3, #31 8009dbe: 2b00 cmp r3, #0 8009dc0: d104 bne.n 8009dcc 8009dc2: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8009dc6: 3b01 subs r3, #1 8009dc8: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8009dcc: 697b ldr r3, [r7, #20] 8009dce: 881b ldrh r3, [r3, #0] 8009dd0: b29a uxth r2, r3 8009dd2: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8009dd6: b29b uxth r3, r3 8009dd8: 029b lsls r3, r3, #10 8009dda: b29b uxth r3, r3 8009ddc: 4313 orrs r3, r2 8009dde: b29b uxth r3, r3 8009de0: ea6f 4343 mvn.w r3, r3, lsl #17 8009de4: ea6f 4353 mvn.w r3, r3, lsr #17 8009de8: b29a uxth r2, r3 8009dea: 697b ldr r3, [r7, #20] 8009dec: 801a strh r2, [r3, #0] 8009dee: e056 b.n 8009e9e 8009df0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009df4: 2b00 cmp r3, #0 8009df6: d10a bne.n 8009e0e 8009df8: 697b ldr r3, [r7, #20] 8009dfa: 881b ldrh r3, [r3, #0] 8009dfc: b29b uxth r3, r3 8009dfe: ea6f 4343 mvn.w r3, r3, lsl #17 8009e02: ea6f 4353 mvn.w r3, r3, lsr #17 8009e06: b29a uxth r2, r3 8009e08: 697b ldr r3, [r7, #20] 8009e0a: 801a strh r2, [r3, #0] 8009e0c: e047 b.n 8009e9e 8009e0e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009e12: 085b lsrs r3, r3, #1 8009e14: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8009e18: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009e1c: f003 0301 and.w r3, r3, #1 8009e20: 2b00 cmp r3, #0 8009e22: d004 beq.n 8009e2e 8009e24: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8009e28: 3301 adds r3, #1 8009e2a: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8009e2e: 697b ldr r3, [r7, #20] 8009e30: 881b ldrh r3, [r3, #0] 8009e32: b29a uxth r2, r3 8009e34: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8009e38: b29b uxth r3, r3 8009e3a: 029b lsls r3, r3, #10 8009e3c: b29b uxth r3, r3 8009e3e: 4313 orrs r3, r2 8009e40: b29a uxth r2, r3 8009e42: 697b ldr r3, [r7, #20] 8009e44: 801a strh r2, [r3, #0] 8009e46: e02a b.n 8009e9e 8009e48: f507 7384 add.w r3, r7, #264 @ 0x108 8009e4c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009e50: 681b ldr r3, [r3, #0] 8009e52: 785b ldrb r3, [r3, #1] 8009e54: 2b01 cmp r3, #1 8009e56: d122 bne.n 8009e9e 8009e58: f507 7384 add.w r3, r7, #264 @ 0x108 8009e5c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009e60: 681b ldr r3, [r3, #0] 8009e62: 623b str r3, [r7, #32] 8009e64: f507 7384 add.w r3, r7, #264 @ 0x108 8009e68: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009e6c: 681b ldr r3, [r3, #0] 8009e6e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009e72: b29b uxth r3, r3 8009e74: 461a mov r2, r3 8009e76: 6a3b ldr r3, [r7, #32] 8009e78: 4413 add r3, r2 8009e7a: 623b str r3, [r7, #32] 8009e7c: f507 7384 add.w r3, r7, #264 @ 0x108 8009e80: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009e84: 681b ldr r3, [r3, #0] 8009e86: 781b ldrb r3, [r3, #0] 8009e88: 011a lsls r2, r3, #4 8009e8a: 6a3b ldr r3, [r7, #32] 8009e8c: 4413 add r3, r2 8009e8e: f203 4304 addw r3, r3, #1028 @ 0x404 8009e92: 61fb str r3, [r7, #28] 8009e94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009e98: b29a uxth r2, r3 8009e9a: 69fb ldr r3, [r7, #28] 8009e9c: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8009e9e: f507 7384 add.w r3, r7, #264 @ 0x108 8009ea2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009ea6: 681b ldr r3, [r3, #0] 8009ea8: 891b ldrh r3, [r3, #8] 8009eaa: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8009eae: f507 7384 add.w r3, r7, #264 @ 0x108 8009eb2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009eb6: 681b ldr r3, [r3, #0] 8009eb8: 6959 ldr r1, [r3, #20] 8009eba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009ebe: b29b uxth r3, r3 8009ec0: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8009ec4: f507 7084 add.w r0, r7, #264 @ 0x108 8009ec8: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8009ecc: 6800 ldr r0, [r0, #0] 8009ece: f001 fa48 bl 800b362 8009ed2: e3ee b.n 800a6b2 } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 8009ed4: f507 7384 add.w r3, r7, #264 @ 0x108 8009ed8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009edc: 681b ldr r3, [r3, #0] 8009ede: 785b ldrb r3, [r3, #1] 8009ee0: 2b00 cmp r3, #0 8009ee2: d177 bne.n 8009fd4 8009ee4: f507 7384 add.w r3, r7, #264 @ 0x108 8009ee8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009eec: 681b ldr r3, [r3, #0] 8009eee: 64bb str r3, [r7, #72] @ 0x48 8009ef0: f507 7384 add.w r3, r7, #264 @ 0x108 8009ef4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009ef8: 681b ldr r3, [r3, #0] 8009efa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009efe: b29b uxth r3, r3 8009f00: 461a mov r2, r3 8009f02: 6cbb ldr r3, [r7, #72] @ 0x48 8009f04: 4413 add r3, r2 8009f06: 64bb str r3, [r7, #72] @ 0x48 8009f08: f507 7384 add.w r3, r7, #264 @ 0x108 8009f0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009f10: 681b ldr r3, [r3, #0] 8009f12: 781b ldrb r3, [r3, #0] 8009f14: 011a lsls r2, r3, #4 8009f16: 6cbb ldr r3, [r7, #72] @ 0x48 8009f18: 4413 add r3, r2 8009f1a: f203 4304 addw r3, r3, #1028 @ 0x404 8009f1e: 647b str r3, [r7, #68] @ 0x44 8009f20: 6c7b ldr r3, [r7, #68] @ 0x44 8009f22: 881b ldrh r3, [r3, #0] 8009f24: b29b uxth r3, r3 8009f26: f3c3 0309 ubfx r3, r3, #0, #10 8009f2a: b29a uxth r2, r3 8009f2c: 6c7b ldr r3, [r7, #68] @ 0x44 8009f2e: 801a strh r2, [r3, #0] 8009f30: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009f34: 2b3e cmp r3, #62 @ 0x3e 8009f36: d921 bls.n 8009f7c 8009f38: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009f3c: 095b lsrs r3, r3, #5 8009f3e: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8009f42: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009f46: f003 031f and.w r3, r3, #31 8009f4a: 2b00 cmp r3, #0 8009f4c: d104 bne.n 8009f58 8009f4e: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8009f52: 3b01 subs r3, #1 8009f54: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8009f58: 6c7b ldr r3, [r7, #68] @ 0x44 8009f5a: 881b ldrh r3, [r3, #0] 8009f5c: b29a uxth r2, r3 8009f5e: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8009f62: b29b uxth r3, r3 8009f64: 029b lsls r3, r3, #10 8009f66: b29b uxth r3, r3 8009f68: 4313 orrs r3, r2 8009f6a: b29b uxth r3, r3 8009f6c: ea6f 4343 mvn.w r3, r3, lsl #17 8009f70: ea6f 4353 mvn.w r3, r3, lsr #17 8009f74: b29a uxth r2, r3 8009f76: 6c7b ldr r3, [r7, #68] @ 0x44 8009f78: 801a strh r2, [r3, #0] 8009f7a: e056 b.n 800a02a 8009f7c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009f80: 2b00 cmp r3, #0 8009f82: d10a bne.n 8009f9a 8009f84: 6c7b ldr r3, [r7, #68] @ 0x44 8009f86: 881b ldrh r3, [r3, #0] 8009f88: b29b uxth r3, r3 8009f8a: ea6f 4343 mvn.w r3, r3, lsl #17 8009f8e: ea6f 4353 mvn.w r3, r3, lsr #17 8009f92: b29a uxth r2, r3 8009f94: 6c7b ldr r3, [r7, #68] @ 0x44 8009f96: 801a strh r2, [r3, #0] 8009f98: e047 b.n 800a02a 8009f9a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009f9e: 085b lsrs r3, r3, #1 8009fa0: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8009fa4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009fa8: f003 0301 and.w r3, r3, #1 8009fac: 2b00 cmp r3, #0 8009fae: d004 beq.n 8009fba 8009fb0: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8009fb4: 3301 adds r3, #1 8009fb6: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8009fba: 6c7b ldr r3, [r7, #68] @ 0x44 8009fbc: 881b ldrh r3, [r3, #0] 8009fbe: b29a uxth r2, r3 8009fc0: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8009fc4: b29b uxth r3, r3 8009fc6: 029b lsls r3, r3, #10 8009fc8: b29b uxth r3, r3 8009fca: 4313 orrs r3, r2 8009fcc: b29a uxth r2, r3 8009fce: 6c7b ldr r3, [r7, #68] @ 0x44 8009fd0: 801a strh r2, [r3, #0] 8009fd2: e02a b.n 800a02a 8009fd4: f507 7384 add.w r3, r7, #264 @ 0x108 8009fd8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009fdc: 681b ldr r3, [r3, #0] 8009fde: 785b ldrb r3, [r3, #1] 8009fe0: 2b01 cmp r3, #1 8009fe2: d122 bne.n 800a02a 8009fe4: f507 7384 add.w r3, r7, #264 @ 0x108 8009fe8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009fec: 681b ldr r3, [r3, #0] 8009fee: 653b str r3, [r7, #80] @ 0x50 8009ff0: f507 7384 add.w r3, r7, #264 @ 0x108 8009ff4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009ff8: 681b ldr r3, [r3, #0] 8009ffa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009ffe: b29b uxth r3, r3 800a000: 461a mov r2, r3 800a002: 6d3b ldr r3, [r7, #80] @ 0x50 800a004: 4413 add r3, r2 800a006: 653b str r3, [r7, #80] @ 0x50 800a008: f507 7384 add.w r3, r7, #264 @ 0x108 800a00c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a010: 681b ldr r3, [r3, #0] 800a012: 781b ldrb r3, [r3, #0] 800a014: 011a lsls r2, r3, #4 800a016: 6d3b ldr r3, [r7, #80] @ 0x50 800a018: 4413 add r3, r2 800a01a: f203 4304 addw r3, r3, #1028 @ 0x404 800a01e: 64fb str r3, [r7, #76] @ 0x4c 800a020: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a024: b29a uxth r2, r3 800a026: 6cfb ldr r3, [r7, #76] @ 0x4c 800a028: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800a02a: f507 7384 add.w r3, r7, #264 @ 0x108 800a02e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a032: 681b ldr r3, [r3, #0] 800a034: 891b ldrh r3, [r3, #8] 800a036: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a03a: f507 7384 add.w r3, r7, #264 @ 0x108 800a03e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a042: 681b ldr r3, [r3, #0] 800a044: 6959 ldr r1, [r3, #20] 800a046: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a04a: b29b uxth r3, r3 800a04c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a050: f507 7084 add.w r0, r7, #264 @ 0x108 800a054: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a058: 6800 ldr r0, [r0, #0] 800a05a: f001 f982 bl 800b362 ep->xfer_buff += len; 800a05e: f507 7384 add.w r3, r7, #264 @ 0x108 800a062: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a066: 681b ldr r3, [r3, #0] 800a068: 695a ldr r2, [r3, #20] 800a06a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a06e: 441a add r2, r3 800a070: f507 7384 add.w r3, r7, #264 @ 0x108 800a074: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a078: 681b ldr r3, [r3, #0] 800a07a: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 800a07c: f507 7384 add.w r3, r7, #264 @ 0x108 800a080: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a084: 681b ldr r3, [r3, #0] 800a086: 6a1a ldr r2, [r3, #32] 800a088: f507 7384 add.w r3, r7, #264 @ 0x108 800a08c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a090: 681b ldr r3, [r3, #0] 800a092: 691b ldr r3, [r3, #16] 800a094: 429a cmp r2, r3 800a096: d90f bls.n 800a0b8 { ep->xfer_len_db -= len; 800a098: f507 7384 add.w r3, r7, #264 @ 0x108 800a09c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a0a0: 681b ldr r3, [r3, #0] 800a0a2: 6a1a ldr r2, [r3, #32] 800a0a4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a0a8: 1ad2 subs r2, r2, r3 800a0aa: f507 7384 add.w r3, r7, #264 @ 0x108 800a0ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a0b2: 681b ldr r3, [r3, #0] 800a0b4: 621a str r2, [r3, #32] 800a0b6: e00e b.n 800a0d6 } else { len = ep->xfer_len_db; 800a0b8: f507 7384 add.w r3, r7, #264 @ 0x108 800a0bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a0c0: 681b ldr r3, [r3, #0] 800a0c2: 6a1b ldr r3, [r3, #32] 800a0c4: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 800a0c8: f507 7384 add.w r3, r7, #264 @ 0x108 800a0cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a0d0: 681b ldr r3, [r3, #0] 800a0d2: 2200 movs r2, #0 800a0d4: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 800a0d6: f507 7384 add.w r3, r7, #264 @ 0x108 800a0da: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a0de: 681b ldr r3, [r3, #0] 800a0e0: 643b str r3, [r7, #64] @ 0x40 800a0e2: f507 7384 add.w r3, r7, #264 @ 0x108 800a0e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a0ea: 681b ldr r3, [r3, #0] 800a0ec: 785b ldrb r3, [r3, #1] 800a0ee: 2b00 cmp r3, #0 800a0f0: d177 bne.n 800a1e2 800a0f2: f507 7384 add.w r3, r7, #264 @ 0x108 800a0f6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a0fa: 681b ldr r3, [r3, #0] 800a0fc: 63bb str r3, [r7, #56] @ 0x38 800a0fe: f507 7384 add.w r3, r7, #264 @ 0x108 800a102: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a106: 681b ldr r3, [r3, #0] 800a108: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a10c: b29b uxth r3, r3 800a10e: 461a mov r2, r3 800a110: 6bbb ldr r3, [r7, #56] @ 0x38 800a112: 4413 add r3, r2 800a114: 63bb str r3, [r7, #56] @ 0x38 800a116: f507 7384 add.w r3, r7, #264 @ 0x108 800a11a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a11e: 681b ldr r3, [r3, #0] 800a120: 781b ldrb r3, [r3, #0] 800a122: 011a lsls r2, r3, #4 800a124: 6bbb ldr r3, [r7, #56] @ 0x38 800a126: 4413 add r3, r2 800a128: f203 430c addw r3, r3, #1036 @ 0x40c 800a12c: 637b str r3, [r7, #52] @ 0x34 800a12e: 6b7b ldr r3, [r7, #52] @ 0x34 800a130: 881b ldrh r3, [r3, #0] 800a132: b29b uxth r3, r3 800a134: f3c3 0309 ubfx r3, r3, #0, #10 800a138: b29a uxth r2, r3 800a13a: 6b7b ldr r3, [r7, #52] @ 0x34 800a13c: 801a strh r2, [r3, #0] 800a13e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a142: 2b3e cmp r3, #62 @ 0x3e 800a144: d921 bls.n 800a18a 800a146: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a14a: 095b lsrs r3, r3, #5 800a14c: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800a150: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a154: f003 031f and.w r3, r3, #31 800a158: 2b00 cmp r3, #0 800a15a: d104 bne.n 800a166 800a15c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800a160: 3b01 subs r3, #1 800a162: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800a166: 6b7b ldr r3, [r7, #52] @ 0x34 800a168: 881b ldrh r3, [r3, #0] 800a16a: b29a uxth r2, r3 800a16c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800a170: b29b uxth r3, r3 800a172: 029b lsls r3, r3, #10 800a174: b29b uxth r3, r3 800a176: 4313 orrs r3, r2 800a178: b29b uxth r3, r3 800a17a: ea6f 4343 mvn.w r3, r3, lsl #17 800a17e: ea6f 4353 mvn.w r3, r3, lsr #17 800a182: b29a uxth r2, r3 800a184: 6b7b ldr r3, [r7, #52] @ 0x34 800a186: 801a strh r2, [r3, #0] 800a188: e050 b.n 800a22c 800a18a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a18e: 2b00 cmp r3, #0 800a190: d10a bne.n 800a1a8 800a192: 6b7b ldr r3, [r7, #52] @ 0x34 800a194: 881b ldrh r3, [r3, #0] 800a196: b29b uxth r3, r3 800a198: ea6f 4343 mvn.w r3, r3, lsl #17 800a19c: ea6f 4353 mvn.w r3, r3, lsr #17 800a1a0: b29a uxth r2, r3 800a1a2: 6b7b ldr r3, [r7, #52] @ 0x34 800a1a4: 801a strh r2, [r3, #0] 800a1a6: e041 b.n 800a22c 800a1a8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a1ac: 085b lsrs r3, r3, #1 800a1ae: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800a1b2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a1b6: f003 0301 and.w r3, r3, #1 800a1ba: 2b00 cmp r3, #0 800a1bc: d004 beq.n 800a1c8 800a1be: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800a1c2: 3301 adds r3, #1 800a1c4: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800a1c8: 6b7b ldr r3, [r7, #52] @ 0x34 800a1ca: 881b ldrh r3, [r3, #0] 800a1cc: b29a uxth r2, r3 800a1ce: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800a1d2: b29b uxth r3, r3 800a1d4: 029b lsls r3, r3, #10 800a1d6: b29b uxth r3, r3 800a1d8: 4313 orrs r3, r2 800a1da: b29a uxth r2, r3 800a1dc: 6b7b ldr r3, [r7, #52] @ 0x34 800a1de: 801a strh r2, [r3, #0] 800a1e0: e024 b.n 800a22c 800a1e2: f507 7384 add.w r3, r7, #264 @ 0x108 800a1e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a1ea: 681b ldr r3, [r3, #0] 800a1ec: 785b ldrb r3, [r3, #1] 800a1ee: 2b01 cmp r3, #1 800a1f0: d11c bne.n 800a22c 800a1f2: f507 7384 add.w r3, r7, #264 @ 0x108 800a1f6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a1fa: 681b ldr r3, [r3, #0] 800a1fc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a200: b29b uxth r3, r3 800a202: 461a mov r2, r3 800a204: 6c3b ldr r3, [r7, #64] @ 0x40 800a206: 4413 add r3, r2 800a208: 643b str r3, [r7, #64] @ 0x40 800a20a: f507 7384 add.w r3, r7, #264 @ 0x108 800a20e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a212: 681b ldr r3, [r3, #0] 800a214: 781b ldrb r3, [r3, #0] 800a216: 011a lsls r2, r3, #4 800a218: 6c3b ldr r3, [r7, #64] @ 0x40 800a21a: 4413 add r3, r2 800a21c: f203 430c addw r3, r3, #1036 @ 0x40c 800a220: 63fb str r3, [r7, #60] @ 0x3c 800a222: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a226: b29a uxth r2, r3 800a228: 6bfb ldr r3, [r7, #60] @ 0x3c 800a22a: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 800a22c: f507 7384 add.w r3, r7, #264 @ 0x108 800a230: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a234: 681b ldr r3, [r3, #0] 800a236: 895b ldrh r3, [r3, #10] 800a238: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a23c: f507 7384 add.w r3, r7, #264 @ 0x108 800a240: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a244: 681b ldr r3, [r3, #0] 800a246: 6959 ldr r1, [r3, #20] 800a248: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a24c: b29b uxth r3, r3 800a24e: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a252: f507 7084 add.w r0, r7, #264 @ 0x108 800a256: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a25a: 6800 ldr r0, [r0, #0] 800a25c: f001 f881 bl 800b362 800a260: e227 b.n 800a6b2 } } /* auto Switch to single buffer mode when transfer xfer_len_db; 800a262: f507 7384 add.w r3, r7, #264 @ 0x108 800a266: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a26a: 681b ldr r3, [r3, #0] 800a26c: 6a1b ldr r3, [r3, #32] 800a26e: f8c7 3104 str.w r3, [r7, #260] @ 0x104 /* disable double buffer mode for Bulk endpoint */ PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num); 800a272: f507 7384 add.w r3, r7, #264 @ 0x108 800a276: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a27a: 681a ldr r2, [r3, #0] 800a27c: f507 7384 add.w r3, r7, #264 @ 0x108 800a280: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a284: 681b ldr r3, [r3, #0] 800a286: 781b ldrb r3, [r3, #0] 800a288: 009b lsls r3, r3, #2 800a28a: 4413 add r3, r2 800a28c: 881b ldrh r3, [r3, #0] 800a28e: b29b uxth r3, r3 800a290: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 800a294: f023 0370 bic.w r3, r3, #112 @ 0x70 800a298: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 800a29c: f507 7384 add.w r3, r7, #264 @ 0x108 800a2a0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a2a4: 681a ldr r2, [r3, #0] 800a2a6: f507 7384 add.w r3, r7, #264 @ 0x108 800a2aa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a2ae: 681b ldr r3, [r3, #0] 800a2b0: 781b ldrb r3, [r3, #0] 800a2b2: 009b lsls r3, r3, #2 800a2b4: 441a add r2, r3 800a2b6: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 800a2ba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a2be: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a2c2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a2c6: f043 0380 orr.w r3, r3, #128 @ 0x80 800a2ca: b29b uxth r3, r3 800a2cc: 8013 strh r3, [r2, #0] /* Set Tx count with nbre of byte to be transmitted */ PCD_SET_EP_TX_CNT(USBx, ep->num, len); 800a2ce: f507 7384 add.w r3, r7, #264 @ 0x108 800a2d2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a2d6: 681b ldr r3, [r3, #0] 800a2d8: 65fb str r3, [r7, #92] @ 0x5c 800a2da: f507 7384 add.w r3, r7, #264 @ 0x108 800a2de: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a2e2: 681b ldr r3, [r3, #0] 800a2e4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a2e8: b29b uxth r3, r3 800a2ea: 461a mov r2, r3 800a2ec: 6dfb ldr r3, [r7, #92] @ 0x5c 800a2ee: 4413 add r3, r2 800a2f0: 65fb str r3, [r7, #92] @ 0x5c 800a2f2: f507 7384 add.w r3, r7, #264 @ 0x108 800a2f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a2fa: 681b ldr r3, [r3, #0] 800a2fc: 781b ldrb r3, [r3, #0] 800a2fe: 011a lsls r2, r3, #4 800a300: 6dfb ldr r3, [r7, #92] @ 0x5c 800a302: 4413 add r3, r2 800a304: f203 4304 addw r3, r3, #1028 @ 0x404 800a308: 65bb str r3, [r7, #88] @ 0x58 800a30a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a30e: b29a uxth r2, r3 800a310: 6dbb ldr r3, [r7, #88] @ 0x58 800a312: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800a314: f507 7384 add.w r3, r7, #264 @ 0x108 800a318: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a31c: 681b ldr r3, [r3, #0] 800a31e: 891b ldrh r3, [r3, #8] 800a320: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a324: f507 7384 add.w r3, r7, #264 @ 0x108 800a328: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a32c: 681b ldr r3, [r3, #0] 800a32e: 6959 ldr r1, [r3, #20] 800a330: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a334: b29b uxth r3, r3 800a336: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a33a: f507 7084 add.w r0, r7, #264 @ 0x108 800a33e: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a342: 6800 ldr r0, [r0, #0] 800a344: f001 f80d bl 800b362 800a348: e1b3 b.n 800a6b2 } } else /* manage isochronous double buffer IN mode */ { /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 800a34a: f507 7384 add.w r3, r7, #264 @ 0x108 800a34e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a352: 681b ldr r3, [r3, #0] 800a354: 6a1a ldr r2, [r3, #32] 800a356: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a35a: 1ad2 subs r2, r2, r3 800a35c: f507 7384 add.w r3, r7, #264 @ 0x108 800a360: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a364: 681b ldr r3, [r3, #0] 800a366: 621a str r2, [r3, #32] /* Fill the data buffer */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 800a368: f507 7384 add.w r3, r7, #264 @ 0x108 800a36c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a370: 681a ldr r2, [r3, #0] 800a372: f507 7384 add.w r3, r7, #264 @ 0x108 800a376: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a37a: 681b ldr r3, [r3, #0] 800a37c: 781b ldrb r3, [r3, #0] 800a37e: 009b lsls r3, r3, #2 800a380: 4413 add r3, r2 800a382: 881b ldrh r3, [r3, #0] 800a384: b29b uxth r3, r3 800a386: f003 0340 and.w r3, r3, #64 @ 0x40 800a38a: 2b00 cmp r3, #0 800a38c: f000 80c6 beq.w 800a51c { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 800a390: f507 7384 add.w r3, r7, #264 @ 0x108 800a394: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a398: 681b ldr r3, [r3, #0] 800a39a: 673b str r3, [r7, #112] @ 0x70 800a39c: f507 7384 add.w r3, r7, #264 @ 0x108 800a3a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a3a4: 681b ldr r3, [r3, #0] 800a3a6: 785b ldrb r3, [r3, #1] 800a3a8: 2b00 cmp r3, #0 800a3aa: d177 bne.n 800a49c 800a3ac: f507 7384 add.w r3, r7, #264 @ 0x108 800a3b0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a3b4: 681b ldr r3, [r3, #0] 800a3b6: 66bb str r3, [r7, #104] @ 0x68 800a3b8: f507 7384 add.w r3, r7, #264 @ 0x108 800a3bc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a3c0: 681b ldr r3, [r3, #0] 800a3c2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a3c6: b29b uxth r3, r3 800a3c8: 461a mov r2, r3 800a3ca: 6ebb ldr r3, [r7, #104] @ 0x68 800a3cc: 4413 add r3, r2 800a3ce: 66bb str r3, [r7, #104] @ 0x68 800a3d0: f507 7384 add.w r3, r7, #264 @ 0x108 800a3d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a3d8: 681b ldr r3, [r3, #0] 800a3da: 781b ldrb r3, [r3, #0] 800a3dc: 011a lsls r2, r3, #4 800a3de: 6ebb ldr r3, [r7, #104] @ 0x68 800a3e0: 4413 add r3, r2 800a3e2: f203 430c addw r3, r3, #1036 @ 0x40c 800a3e6: 667b str r3, [r7, #100] @ 0x64 800a3e8: 6e7b ldr r3, [r7, #100] @ 0x64 800a3ea: 881b ldrh r3, [r3, #0] 800a3ec: b29b uxth r3, r3 800a3ee: f3c3 0309 ubfx r3, r3, #0, #10 800a3f2: b29a uxth r2, r3 800a3f4: 6e7b ldr r3, [r7, #100] @ 0x64 800a3f6: 801a strh r2, [r3, #0] 800a3f8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a3fc: 2b3e cmp r3, #62 @ 0x3e 800a3fe: d921 bls.n 800a444 800a400: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a404: 095b lsrs r3, r3, #5 800a406: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800a40a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a40e: f003 031f and.w r3, r3, #31 800a412: 2b00 cmp r3, #0 800a414: d104 bne.n 800a420 800a416: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800a41a: 3b01 subs r3, #1 800a41c: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800a420: 6e7b ldr r3, [r7, #100] @ 0x64 800a422: 881b ldrh r3, [r3, #0] 800a424: b29a uxth r2, r3 800a426: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800a42a: b29b uxth r3, r3 800a42c: 029b lsls r3, r3, #10 800a42e: b29b uxth r3, r3 800a430: 4313 orrs r3, r2 800a432: b29b uxth r3, r3 800a434: ea6f 4343 mvn.w r3, r3, lsl #17 800a438: ea6f 4353 mvn.w r3, r3, lsr #17 800a43c: b29a uxth r2, r3 800a43e: 6e7b ldr r3, [r7, #100] @ 0x64 800a440: 801a strh r2, [r3, #0] 800a442: e050 b.n 800a4e6 800a444: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a448: 2b00 cmp r3, #0 800a44a: d10a bne.n 800a462 800a44c: 6e7b ldr r3, [r7, #100] @ 0x64 800a44e: 881b ldrh r3, [r3, #0] 800a450: b29b uxth r3, r3 800a452: ea6f 4343 mvn.w r3, r3, lsl #17 800a456: ea6f 4353 mvn.w r3, r3, lsr #17 800a45a: b29a uxth r2, r3 800a45c: 6e7b ldr r3, [r7, #100] @ 0x64 800a45e: 801a strh r2, [r3, #0] 800a460: e041 b.n 800a4e6 800a462: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a466: 085b lsrs r3, r3, #1 800a468: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800a46c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a470: f003 0301 and.w r3, r3, #1 800a474: 2b00 cmp r3, #0 800a476: d004 beq.n 800a482 800a478: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800a47c: 3301 adds r3, #1 800a47e: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800a482: 6e7b ldr r3, [r7, #100] @ 0x64 800a484: 881b ldrh r3, [r3, #0] 800a486: b29a uxth r2, r3 800a488: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 800a48c: b29b uxth r3, r3 800a48e: 029b lsls r3, r3, #10 800a490: b29b uxth r3, r3 800a492: 4313 orrs r3, r2 800a494: b29a uxth r2, r3 800a496: 6e7b ldr r3, [r7, #100] @ 0x64 800a498: 801a strh r2, [r3, #0] 800a49a: e024 b.n 800a4e6 800a49c: f507 7384 add.w r3, r7, #264 @ 0x108 800a4a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a4a4: 681b ldr r3, [r3, #0] 800a4a6: 785b ldrb r3, [r3, #1] 800a4a8: 2b01 cmp r3, #1 800a4aa: d11c bne.n 800a4e6 800a4ac: f507 7384 add.w r3, r7, #264 @ 0x108 800a4b0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a4b4: 681b ldr r3, [r3, #0] 800a4b6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a4ba: b29b uxth r3, r3 800a4bc: 461a mov r2, r3 800a4be: 6f3b ldr r3, [r7, #112] @ 0x70 800a4c0: 4413 add r3, r2 800a4c2: 673b str r3, [r7, #112] @ 0x70 800a4c4: f507 7384 add.w r3, r7, #264 @ 0x108 800a4c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a4cc: 681b ldr r3, [r3, #0] 800a4ce: 781b ldrb r3, [r3, #0] 800a4d0: 011a lsls r2, r3, #4 800a4d2: 6f3b ldr r3, [r7, #112] @ 0x70 800a4d4: 4413 add r3, r2 800a4d6: f203 430c addw r3, r3, #1036 @ 0x40c 800a4da: 66fb str r3, [r7, #108] @ 0x6c 800a4dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a4e0: b29a uxth r2, r3 800a4e2: 6efb ldr r3, [r7, #108] @ 0x6c 800a4e4: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 800a4e6: f507 7384 add.w r3, r7, #264 @ 0x108 800a4ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a4ee: 681b ldr r3, [r3, #0] 800a4f0: 895b ldrh r3, [r3, #10] 800a4f2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a4f6: f507 7384 add.w r3, r7, #264 @ 0x108 800a4fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a4fe: 681b ldr r3, [r3, #0] 800a500: 6959 ldr r1, [r3, #20] 800a502: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a506: b29b uxth r3, r3 800a508: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a50c: f507 7084 add.w r0, r7, #264 @ 0x108 800a510: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a514: 6800 ldr r0, [r0, #0] 800a516: f000 ff24 bl 800b362 800a51a: e0ca b.n 800a6b2 } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 800a51c: f507 7384 add.w r3, r7, #264 @ 0x108 800a520: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a524: 681b ldr r3, [r3, #0] 800a526: 785b ldrb r3, [r3, #1] 800a528: 2b00 cmp r3, #0 800a52a: d177 bne.n 800a61c 800a52c: f507 7384 add.w r3, r7, #264 @ 0x108 800a530: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a534: 681b ldr r3, [r3, #0] 800a536: 67fb str r3, [r7, #124] @ 0x7c 800a538: f507 7384 add.w r3, r7, #264 @ 0x108 800a53c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a540: 681b ldr r3, [r3, #0] 800a542: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a546: b29b uxth r3, r3 800a548: 461a mov r2, r3 800a54a: 6ffb ldr r3, [r7, #124] @ 0x7c 800a54c: 4413 add r3, r2 800a54e: 67fb str r3, [r7, #124] @ 0x7c 800a550: f507 7384 add.w r3, r7, #264 @ 0x108 800a554: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a558: 681b ldr r3, [r3, #0] 800a55a: 781b ldrb r3, [r3, #0] 800a55c: 011a lsls r2, r3, #4 800a55e: 6ffb ldr r3, [r7, #124] @ 0x7c 800a560: 4413 add r3, r2 800a562: f203 4304 addw r3, r3, #1028 @ 0x404 800a566: 67bb str r3, [r7, #120] @ 0x78 800a568: 6fbb ldr r3, [r7, #120] @ 0x78 800a56a: 881b ldrh r3, [r3, #0] 800a56c: b29b uxth r3, r3 800a56e: f3c3 0309 ubfx r3, r3, #0, #10 800a572: b29a uxth r2, r3 800a574: 6fbb ldr r3, [r7, #120] @ 0x78 800a576: 801a strh r2, [r3, #0] 800a578: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a57c: 2b3e cmp r3, #62 @ 0x3e 800a57e: d921 bls.n 800a5c4 800a580: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a584: 095b lsrs r3, r3, #5 800a586: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800a58a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a58e: f003 031f and.w r3, r3, #31 800a592: 2b00 cmp r3, #0 800a594: d104 bne.n 800a5a0 800a596: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800a59a: 3b01 subs r3, #1 800a59c: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800a5a0: 6fbb ldr r3, [r7, #120] @ 0x78 800a5a2: 881b ldrh r3, [r3, #0] 800a5a4: b29a uxth r2, r3 800a5a6: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800a5aa: b29b uxth r3, r3 800a5ac: 029b lsls r3, r3, #10 800a5ae: b29b uxth r3, r3 800a5b0: 4313 orrs r3, r2 800a5b2: b29b uxth r3, r3 800a5b4: ea6f 4343 mvn.w r3, r3, lsl #17 800a5b8: ea6f 4353 mvn.w r3, r3, lsr #17 800a5bc: b29a uxth r2, r3 800a5be: 6fbb ldr r3, [r7, #120] @ 0x78 800a5c0: 801a strh r2, [r3, #0] 800a5c2: e05c b.n 800a67e 800a5c4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a5c8: 2b00 cmp r3, #0 800a5ca: d10a bne.n 800a5e2 800a5cc: 6fbb ldr r3, [r7, #120] @ 0x78 800a5ce: 881b ldrh r3, [r3, #0] 800a5d0: b29b uxth r3, r3 800a5d2: ea6f 4343 mvn.w r3, r3, lsl #17 800a5d6: ea6f 4353 mvn.w r3, r3, lsr #17 800a5da: b29a uxth r2, r3 800a5dc: 6fbb ldr r3, [r7, #120] @ 0x78 800a5de: 801a strh r2, [r3, #0] 800a5e0: e04d b.n 800a67e 800a5e2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a5e6: 085b lsrs r3, r3, #1 800a5e8: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800a5ec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a5f0: f003 0301 and.w r3, r3, #1 800a5f4: 2b00 cmp r3, #0 800a5f6: d004 beq.n 800a602 800a5f8: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800a5fc: 3301 adds r3, #1 800a5fe: f8c7 30ec str.w r3, [r7, #236] @ 0xec 800a602: 6fbb ldr r3, [r7, #120] @ 0x78 800a604: 881b ldrh r3, [r3, #0] 800a606: b29a uxth r2, r3 800a608: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 800a60c: b29b uxth r3, r3 800a60e: 029b lsls r3, r3, #10 800a610: b29b uxth r3, r3 800a612: 4313 orrs r3, r2 800a614: b29a uxth r2, r3 800a616: 6fbb ldr r3, [r7, #120] @ 0x78 800a618: 801a strh r2, [r3, #0] 800a61a: e030 b.n 800a67e 800a61c: f507 7384 add.w r3, r7, #264 @ 0x108 800a620: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a624: 681b ldr r3, [r3, #0] 800a626: 785b ldrb r3, [r3, #1] 800a628: 2b01 cmp r3, #1 800a62a: d128 bne.n 800a67e 800a62c: f507 7384 add.w r3, r7, #264 @ 0x108 800a630: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a634: 681b ldr r3, [r3, #0] 800a636: f8c7 3084 str.w r3, [r7, #132] @ 0x84 800a63a: f507 7384 add.w r3, r7, #264 @ 0x108 800a63e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a642: 681b ldr r3, [r3, #0] 800a644: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a648: b29b uxth r3, r3 800a64a: 461a mov r2, r3 800a64c: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 800a650: 4413 add r3, r2 800a652: f8c7 3084 str.w r3, [r7, #132] @ 0x84 800a656: f507 7384 add.w r3, r7, #264 @ 0x108 800a65a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a65e: 681b ldr r3, [r3, #0] 800a660: 781b ldrb r3, [r3, #0] 800a662: 011a lsls r2, r3, #4 800a664: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 800a668: 4413 add r3, r2 800a66a: f203 4304 addw r3, r3, #1028 @ 0x404 800a66e: f8c7 3080 str.w r3, [r7, #128] @ 0x80 800a672: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a676: b29a uxth r2, r3 800a678: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 800a67c: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 800a67e: f507 7384 add.w r3, r7, #264 @ 0x108 800a682: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a686: 681b ldr r3, [r3, #0] 800a688: 891b ldrh r3, [r3, #8] 800a68a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800a68e: f507 7384 add.w r3, r7, #264 @ 0x108 800a692: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a696: 681b ldr r3, [r3, #0] 800a698: 6959 ldr r1, [r3, #20] 800a69a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a69e: b29b uxth r3, r3 800a6a0: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800a6a4: f507 7084 add.w r0, r7, #264 @ 0x108 800a6a8: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800a6ac: 6800 ldr r0, [r0, #0] 800a6ae: f000 fe58 bl 800b362 } } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); 800a6b2: f507 7384 add.w r3, r7, #264 @ 0x108 800a6b6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a6ba: 681a ldr r2, [r3, #0] 800a6bc: f507 7384 add.w r3, r7, #264 @ 0x108 800a6c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a6c4: 681b ldr r3, [r3, #0] 800a6c6: 781b ldrb r3, [r3, #0] 800a6c8: 009b lsls r3, r3, #2 800a6ca: 4413 add r3, r2 800a6cc: 881b ldrh r3, [r3, #0] 800a6ce: b29b uxth r3, r3 800a6d0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800a6d4: f023 0340 bic.w r3, r3, #64 @ 0x40 800a6d8: 817b strh r3, [r7, #10] 800a6da: 897b ldrh r3, [r7, #10] 800a6dc: f083 0310 eor.w r3, r3, #16 800a6e0: 817b strh r3, [r7, #10] 800a6e2: 897b ldrh r3, [r7, #10] 800a6e4: f083 0320 eor.w r3, r3, #32 800a6e8: 817b strh r3, [r7, #10] 800a6ea: f507 7384 add.w r3, r7, #264 @ 0x108 800a6ee: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a6f2: 681a ldr r2, [r3, #0] 800a6f4: f507 7384 add.w r3, r7, #264 @ 0x108 800a6f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a6fc: 681b ldr r3, [r3, #0] 800a6fe: 781b ldrb r3, [r3, #0] 800a700: 009b lsls r3, r3, #2 800a702: 441a add r2, r3 800a704: 897b ldrh r3, [r7, #10] 800a706: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800a70a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800a70e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800a712: f043 0380 orr.w r3, r3, #128 @ 0x80 800a716: b29b uxth r3, r3 800a718: 8013 strh r3, [r2, #0] 800a71a: f000 bcde b.w 800b0da } else /* OUT endpoint */ { if (ep->doublebuffer == 0U) 800a71e: f507 7384 add.w r3, r7, #264 @ 0x108 800a722: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a726: 681b ldr r3, [r3, #0] 800a728: 7b1b ldrb r3, [r3, #12] 800a72a: 2b00 cmp r3, #0 800a72c: f040 80bb bne.w 800a8a6 { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 800a730: f507 7384 add.w r3, r7, #264 @ 0x108 800a734: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a738: 681b ldr r3, [r3, #0] 800a73a: 699a ldr r2, [r3, #24] 800a73c: f507 7384 add.w r3, r7, #264 @ 0x108 800a740: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a744: 681b ldr r3, [r3, #0] 800a746: 691b ldr r3, [r3, #16] 800a748: 429a cmp r2, r3 800a74a: d917 bls.n 800a77c { len = ep->maxpacket; 800a74c: f507 7384 add.w r3, r7, #264 @ 0x108 800a750: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a754: 681b ldr r3, [r3, #0] 800a756: 691b ldr r3, [r3, #16] 800a758: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 800a75c: f507 7384 add.w r3, r7, #264 @ 0x108 800a760: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a764: 681b ldr r3, [r3, #0] 800a766: 699a ldr r2, [r3, #24] 800a768: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a76c: 1ad2 subs r2, r2, r3 800a76e: f507 7384 add.w r3, r7, #264 @ 0x108 800a772: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a776: 681b ldr r3, [r3, #0] 800a778: 619a str r2, [r3, #24] 800a77a: e00e b.n 800a79a } else { len = ep->xfer_len; 800a77c: f507 7384 add.w r3, r7, #264 @ 0x108 800a780: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a784: 681b ldr r3, [r3, #0] 800a786: 699b ldr r3, [r3, #24] 800a788: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 800a78c: f507 7384 add.w r3, r7, #264 @ 0x108 800a790: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a794: 681b ldr r3, [r3, #0] 800a796: 2200 movs r2, #0 800a798: 619a str r2, [r3, #24] } /* configure and validate Rx endpoint */ PCD_SET_EP_RX_CNT(USBx, ep->num, len); 800a79a: f507 7384 add.w r3, r7, #264 @ 0x108 800a79e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a7a2: 681b ldr r3, [r3, #0] 800a7a4: f8c7 3090 str.w r3, [r7, #144] @ 0x90 800a7a8: f507 7384 add.w r3, r7, #264 @ 0x108 800a7ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a7b0: 681b ldr r3, [r3, #0] 800a7b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a7b6: b29b uxth r3, r3 800a7b8: 461a mov r2, r3 800a7ba: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 800a7be: 4413 add r3, r2 800a7c0: f8c7 3090 str.w r3, [r7, #144] @ 0x90 800a7c4: f507 7384 add.w r3, r7, #264 @ 0x108 800a7c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a7cc: 681b ldr r3, [r3, #0] 800a7ce: 781b ldrb r3, [r3, #0] 800a7d0: 011a lsls r2, r3, #4 800a7d2: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 800a7d6: 4413 add r3, r2 800a7d8: f203 430c addw r3, r3, #1036 @ 0x40c 800a7dc: f8c7 308c str.w r3, [r7, #140] @ 0x8c 800a7e0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a7e4: 881b ldrh r3, [r3, #0] 800a7e6: b29b uxth r3, r3 800a7e8: f3c3 0309 ubfx r3, r3, #0, #10 800a7ec: b29a uxth r2, r3 800a7ee: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a7f2: 801a strh r2, [r3, #0] 800a7f4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a7f8: 2b3e cmp r3, #62 @ 0x3e 800a7fa: d924 bls.n 800a846 800a7fc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a800: 095b lsrs r3, r3, #5 800a802: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800a806: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a80a: f003 031f and.w r3, r3, #31 800a80e: 2b00 cmp r3, #0 800a810: d104 bne.n 800a81c 800a812: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800a816: 3b01 subs r3, #1 800a818: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800a81c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a820: 881b ldrh r3, [r3, #0] 800a822: b29a uxth r2, r3 800a824: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800a828: b29b uxth r3, r3 800a82a: 029b lsls r3, r3, #10 800a82c: b29b uxth r3, r3 800a82e: 4313 orrs r3, r2 800a830: b29b uxth r3, r3 800a832: ea6f 4343 mvn.w r3, r3, lsl #17 800a836: ea6f 4353 mvn.w r3, r3, lsr #17 800a83a: b29a uxth r2, r3 800a83c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a840: 801a strh r2, [r3, #0] 800a842: f000 bc10 b.w 800b066 800a846: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a84a: 2b00 cmp r3, #0 800a84c: d10c bne.n 800a868 800a84e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a852: 881b ldrh r3, [r3, #0] 800a854: b29b uxth r3, r3 800a856: ea6f 4343 mvn.w r3, r3, lsl #17 800a85a: ea6f 4353 mvn.w r3, r3, lsr #17 800a85e: b29a uxth r2, r3 800a860: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a864: 801a strh r2, [r3, #0] 800a866: e3fe b.n 800b066 800a868: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a86c: 085b lsrs r3, r3, #1 800a86e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800a872: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800a876: f003 0301 and.w r3, r3, #1 800a87a: 2b00 cmp r3, #0 800a87c: d004 beq.n 800a888 800a87e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800a882: 3301 adds r3, #1 800a884: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800a888: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a88c: 881b ldrh r3, [r3, #0] 800a88e: b29a uxth r2, r3 800a890: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800a894: b29b uxth r3, r3 800a896: 029b lsls r3, r3, #10 800a898: b29b uxth r3, r3 800a89a: 4313 orrs r3, r2 800a89c: b29a uxth r2, r3 800a89e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800a8a2: 801a strh r2, [r3, #0] 800a8a4: e3df b.n 800b066 #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */ /* Set the Double buffer counter */ if (ep->type == EP_TYPE_BULK) 800a8a6: f507 7384 add.w r3, r7, #264 @ 0x108 800a8aa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a8ae: 681b ldr r3, [r3, #0] 800a8b0: 78db ldrb r3, [r3, #3] 800a8b2: 2b02 cmp r3, #2 800a8b4: f040 8218 bne.w 800ace8 { PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); 800a8b8: f507 7384 add.w r3, r7, #264 @ 0x108 800a8bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a8c0: 681b ldr r3, [r3, #0] 800a8c2: 785b ldrb r3, [r3, #1] 800a8c4: 2b00 cmp r3, #0 800a8c6: f040 809d bne.w 800aa04 800a8ca: f507 7384 add.w r3, r7, #264 @ 0x108 800a8ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a8d2: 681b ldr r3, [r3, #0] 800a8d4: f8c7 30ac str.w r3, [r7, #172] @ 0xac 800a8d8: f507 7384 add.w r3, r7, #264 @ 0x108 800a8dc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800a8e0: 681b ldr r3, [r3, #0] 800a8e2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800a8e6: b29b uxth r3, r3 800a8e8: 461a mov r2, r3 800a8ea: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 800a8ee: 4413 add r3, r2 800a8f0: f8c7 30ac str.w r3, [r7, #172] @ 0xac 800a8f4: f507 7384 add.w r3, r7, #264 @ 0x108 800a8f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a8fc: 681b ldr r3, [r3, #0] 800a8fe: 781b ldrb r3, [r3, #0] 800a900: 011a lsls r2, r3, #4 800a902: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 800a906: 4413 add r3, r2 800a908: f203 4304 addw r3, r3, #1028 @ 0x404 800a90c: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 800a910: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a914: 881b ldrh r3, [r3, #0] 800a916: b29b uxth r3, r3 800a918: f3c3 0309 ubfx r3, r3, #0, #10 800a91c: b29a uxth r2, r3 800a91e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a922: 801a strh r2, [r3, #0] 800a924: f507 7384 add.w r3, r7, #264 @ 0x108 800a928: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a92c: 681b ldr r3, [r3, #0] 800a92e: 691b ldr r3, [r3, #16] 800a930: 2b3e cmp r3, #62 @ 0x3e 800a932: d92b bls.n 800a98c 800a934: f507 7384 add.w r3, r7, #264 @ 0x108 800a938: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a93c: 681b ldr r3, [r3, #0] 800a93e: 691b ldr r3, [r3, #16] 800a940: 095b lsrs r3, r3, #5 800a942: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800a946: f507 7384 add.w r3, r7, #264 @ 0x108 800a94a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a94e: 681b ldr r3, [r3, #0] 800a950: 691b ldr r3, [r3, #16] 800a952: f003 031f and.w r3, r3, #31 800a956: 2b00 cmp r3, #0 800a958: d104 bne.n 800a964 800a95a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800a95e: 3b01 subs r3, #1 800a960: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800a964: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a968: 881b ldrh r3, [r3, #0] 800a96a: b29a uxth r2, r3 800a96c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800a970: b29b uxth r3, r3 800a972: 029b lsls r3, r3, #10 800a974: b29b uxth r3, r3 800a976: 4313 orrs r3, r2 800a978: b29b uxth r3, r3 800a97a: ea6f 4343 mvn.w r3, r3, lsl #17 800a97e: ea6f 4353 mvn.w r3, r3, lsr #17 800a982: b29a uxth r2, r3 800a984: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a988: 801a strh r2, [r3, #0] 800a98a: e070 b.n 800aa6e 800a98c: f507 7384 add.w r3, r7, #264 @ 0x108 800a990: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a994: 681b ldr r3, [r3, #0] 800a996: 691b ldr r3, [r3, #16] 800a998: 2b00 cmp r3, #0 800a99a: d10c bne.n 800a9b6 800a99c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a9a0: 881b ldrh r3, [r3, #0] 800a9a2: b29b uxth r3, r3 800a9a4: ea6f 4343 mvn.w r3, r3, lsl #17 800a9a8: ea6f 4353 mvn.w r3, r3, lsr #17 800a9ac: b29a uxth r2, r3 800a9ae: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a9b2: 801a strh r2, [r3, #0] 800a9b4: e05b b.n 800aa6e 800a9b6: f507 7384 add.w r3, r7, #264 @ 0x108 800a9ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a9be: 681b ldr r3, [r3, #0] 800a9c0: 691b ldr r3, [r3, #16] 800a9c2: 085b lsrs r3, r3, #1 800a9c4: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800a9c8: f507 7384 add.w r3, r7, #264 @ 0x108 800a9cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800a9d0: 681b ldr r3, [r3, #0] 800a9d2: 691b ldr r3, [r3, #16] 800a9d4: f003 0301 and.w r3, r3, #1 800a9d8: 2b00 cmp r3, #0 800a9da: d004 beq.n 800a9e6 800a9dc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800a9e0: 3301 adds r3, #1 800a9e2: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 800a9e6: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800a9ea: 881b ldrh r3, [r3, #0] 800a9ec: b29a uxth r2, r3 800a9ee: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800a9f2: b29b uxth r3, r3 800a9f4: 029b lsls r3, r3, #10 800a9f6: b29b uxth r3, r3 800a9f8: 4313 orrs r3, r2 800a9fa: b29a uxth r2, r3 800a9fc: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 800aa00: 801a strh r2, [r3, #0] 800aa02: e034 b.n 800aa6e 800aa04: f507 7384 add.w r3, r7, #264 @ 0x108 800aa08: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa0c: 681b ldr r3, [r3, #0] 800aa0e: 785b ldrb r3, [r3, #1] 800aa10: 2b01 cmp r3, #1 800aa12: d12c bne.n 800aa6e 800aa14: f507 7384 add.w r3, r7, #264 @ 0x108 800aa18: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aa1c: 681b ldr r3, [r3, #0] 800aa1e: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 800aa22: f507 7384 add.w r3, r7, #264 @ 0x108 800aa26: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aa2a: 681b ldr r3, [r3, #0] 800aa2c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800aa30: b29b uxth r3, r3 800aa32: 461a mov r2, r3 800aa34: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 800aa38: 4413 add r3, r2 800aa3a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 800aa3e: f507 7384 add.w r3, r7, #264 @ 0x108 800aa42: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa46: 681b ldr r3, [r3, #0] 800aa48: 781b ldrb r3, [r3, #0] 800aa4a: 011a lsls r2, r3, #4 800aa4c: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 800aa50: 4413 add r3, r2 800aa52: f203 4304 addw r3, r3, #1028 @ 0x404 800aa56: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 800aa5a: f507 7384 add.w r3, r7, #264 @ 0x108 800aa5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa62: 681b ldr r3, [r3, #0] 800aa64: 691b ldr r3, [r3, #16] 800aa66: b29a uxth r2, r3 800aa68: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0 800aa6c: 801a strh r2, [r3, #0] 800aa6e: f507 7384 add.w r3, r7, #264 @ 0x108 800aa72: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aa76: 681b ldr r3, [r3, #0] 800aa78: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 800aa7c: f507 7384 add.w r3, r7, #264 @ 0x108 800aa80: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aa84: 681b ldr r3, [r3, #0] 800aa86: 785b ldrb r3, [r3, #1] 800aa88: 2b00 cmp r3, #0 800aa8a: f040 809d bne.w 800abc8 800aa8e: f507 7384 add.w r3, r7, #264 @ 0x108 800aa92: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aa96: 681b ldr r3, [r3, #0] 800aa98: f8c7 309c str.w r3, [r7, #156] @ 0x9c 800aa9c: f507 7384 add.w r3, r7, #264 @ 0x108 800aaa0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aaa4: 681b ldr r3, [r3, #0] 800aaa6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800aaaa: b29b uxth r3, r3 800aaac: 461a mov r2, r3 800aaae: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 800aab2: 4413 add r3, r2 800aab4: f8c7 309c str.w r3, [r7, #156] @ 0x9c 800aab8: f507 7384 add.w r3, r7, #264 @ 0x108 800aabc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aac0: 681b ldr r3, [r3, #0] 800aac2: 781b ldrb r3, [r3, #0] 800aac4: 011a lsls r2, r3, #4 800aac6: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 800aaca: 4413 add r3, r2 800aacc: f203 430c addw r3, r3, #1036 @ 0x40c 800aad0: f8c7 3098 str.w r3, [r7, #152] @ 0x98 800aad4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800aad8: 881b ldrh r3, [r3, #0] 800aada: b29b uxth r3, r3 800aadc: f3c3 0309 ubfx r3, r3, #0, #10 800aae0: b29a uxth r2, r3 800aae2: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800aae6: 801a strh r2, [r3, #0] 800aae8: f507 7384 add.w r3, r7, #264 @ 0x108 800aaec: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aaf0: 681b ldr r3, [r3, #0] 800aaf2: 691b ldr r3, [r3, #16] 800aaf4: 2b3e cmp r3, #62 @ 0x3e 800aaf6: d92b bls.n 800ab50 800aaf8: f507 7384 add.w r3, r7, #264 @ 0x108 800aafc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab00: 681b ldr r3, [r3, #0] 800ab02: 691b ldr r3, [r3, #16] 800ab04: 095b lsrs r3, r3, #5 800ab06: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800ab0a: f507 7384 add.w r3, r7, #264 @ 0x108 800ab0e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab12: 681b ldr r3, [r3, #0] 800ab14: 691b ldr r3, [r3, #16] 800ab16: f003 031f and.w r3, r3, #31 800ab1a: 2b00 cmp r3, #0 800ab1c: d104 bne.n 800ab28 800ab1e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800ab22: 3b01 subs r3, #1 800ab24: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800ab28: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800ab2c: 881b ldrh r3, [r3, #0] 800ab2e: b29a uxth r2, r3 800ab30: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800ab34: b29b uxth r3, r3 800ab36: 029b lsls r3, r3, #10 800ab38: b29b uxth r3, r3 800ab3a: 4313 orrs r3, r2 800ab3c: b29b uxth r3, r3 800ab3e: ea6f 4343 mvn.w r3, r3, lsl #17 800ab42: ea6f 4353 mvn.w r3, r3, lsr #17 800ab46: b29a uxth r2, r3 800ab48: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800ab4c: 801a strh r2, [r3, #0] 800ab4e: e069 b.n 800ac24 800ab50: f507 7384 add.w r3, r7, #264 @ 0x108 800ab54: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab58: 681b ldr r3, [r3, #0] 800ab5a: 691b ldr r3, [r3, #16] 800ab5c: 2b00 cmp r3, #0 800ab5e: d10c bne.n 800ab7a 800ab60: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800ab64: 881b ldrh r3, [r3, #0] 800ab66: b29b uxth r3, r3 800ab68: ea6f 4343 mvn.w r3, r3, lsl #17 800ab6c: ea6f 4353 mvn.w r3, r3, lsr #17 800ab70: b29a uxth r2, r3 800ab72: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800ab76: 801a strh r2, [r3, #0] 800ab78: e054 b.n 800ac24 800ab7a: f507 7384 add.w r3, r7, #264 @ 0x108 800ab7e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab82: 681b ldr r3, [r3, #0] 800ab84: 691b ldr r3, [r3, #16] 800ab86: 085b lsrs r3, r3, #1 800ab88: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800ab8c: f507 7384 add.w r3, r7, #264 @ 0x108 800ab90: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ab94: 681b ldr r3, [r3, #0] 800ab96: 691b ldr r3, [r3, #16] 800ab98: f003 0301 and.w r3, r3, #1 800ab9c: 2b00 cmp r3, #0 800ab9e: d004 beq.n 800abaa 800aba0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800aba4: 3301 adds r3, #1 800aba6: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 800abaa: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800abae: 881b ldrh r3, [r3, #0] 800abb0: b29a uxth r2, r3 800abb2: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800abb6: b29b uxth r3, r3 800abb8: 029b lsls r3, r3, #10 800abba: b29b uxth r3, r3 800abbc: 4313 orrs r3, r2 800abbe: b29a uxth r2, r3 800abc0: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 800abc4: 801a strh r2, [r3, #0] 800abc6: e02d b.n 800ac24 800abc8: f507 7384 add.w r3, r7, #264 @ 0x108 800abcc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800abd0: 681b ldr r3, [r3, #0] 800abd2: 785b ldrb r3, [r3, #1] 800abd4: 2b01 cmp r3, #1 800abd6: d125 bne.n 800ac24 800abd8: f507 7384 add.w r3, r7, #264 @ 0x108 800abdc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800abe0: 681b ldr r3, [r3, #0] 800abe2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800abe6: b29b uxth r3, r3 800abe8: 461a mov r2, r3 800abea: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 800abee: 4413 add r3, r2 800abf0: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 800abf4: f507 7384 add.w r3, r7, #264 @ 0x108 800abf8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800abfc: 681b ldr r3, [r3, #0] 800abfe: 781b ldrb r3, [r3, #0] 800ac00: 011a lsls r2, r3, #4 800ac02: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 800ac06: 4413 add r3, r2 800ac08: f203 430c addw r3, r3, #1036 @ 0x40c 800ac0c: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 800ac10: f507 7384 add.w r3, r7, #264 @ 0x108 800ac14: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ac18: 681b ldr r3, [r3, #0] 800ac1a: 691b ldr r3, [r3, #16] 800ac1c: b29a uxth r2, r3 800ac1e: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 800ac22: 801a strh r2, [r3, #0] /* Coming from ISR */ if (ep->xfer_count != 0U) 800ac24: f507 7384 add.w r3, r7, #264 @ 0x108 800ac28: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ac2c: 681b ldr r3, [r3, #0] 800ac2e: 69db ldr r3, [r3, #28] 800ac30: 2b00 cmp r3, #0 800ac32: f000 8218 beq.w 800b066 { /* update last value to check if there is blocking state */ wEPVal = PCD_GET_ENDPOINT(USBx, ep->num); 800ac36: f507 7384 add.w r3, r7, #264 @ 0x108 800ac3a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ac3e: 681a ldr r2, [r3, #0] 800ac40: f507 7384 add.w r3, r7, #264 @ 0x108 800ac44: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ac48: 681b ldr r3, [r3, #0] 800ac4a: 781b ldrb r3, [r3, #0] 800ac4c: 009b lsls r3, r3, #2 800ac4e: 4413 add r3, r2 800ac50: 881b ldrh r3, [r3, #0] 800ac52: f8a7 3096 strh.w r3, [r7, #150] @ 0x96 /*Blocking State */ if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 800ac56: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800ac5a: f403 4380 and.w r3, r3, #16384 @ 0x4000 800ac5e: 2b00 cmp r3, #0 800ac60: d005 beq.n 800ac6e 800ac62: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800ac66: f003 0340 and.w r3, r3, #64 @ 0x40 800ac6a: 2b00 cmp r3, #0 800ac6c: d10d bne.n 800ac8a (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 800ac6e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800ac72: f403 4380 and.w r3, r3, #16384 @ 0x4000 if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 800ac76: 2b00 cmp r3, #0 800ac78: f040 81f5 bne.w 800b066 (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 800ac7c: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 800ac80: f003 0340 and.w r3, r3, #64 @ 0x40 800ac84: 2b00 cmp r3, #0 800ac86: f040 81ee bne.w 800b066 { PCD_FREE_USER_BUFFER(USBx, ep->num, 0U); 800ac8a: f507 7384 add.w r3, r7, #264 @ 0x108 800ac8e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ac92: 681a ldr r2, [r3, #0] 800ac94: f507 7384 add.w r3, r7, #264 @ 0x108 800ac98: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ac9c: 681b ldr r3, [r3, #0] 800ac9e: 781b ldrb r3, [r3, #0] 800aca0: 009b lsls r3, r3, #2 800aca2: 4413 add r3, r2 800aca4: 881b ldrh r3, [r3, #0] 800aca6: b29b uxth r3, r3 800aca8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800acac: f023 0370 bic.w r3, r3, #112 @ 0x70 800acb0: f8a7 3094 strh.w r3, [r7, #148] @ 0x94 800acb4: f507 7384 add.w r3, r7, #264 @ 0x108 800acb8: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800acbc: 681a ldr r2, [r3, #0] 800acbe: f507 7384 add.w r3, r7, #264 @ 0x108 800acc2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800acc6: 681b ldr r3, [r3, #0] 800acc8: 781b ldrb r3, [r3, #0] 800acca: 009b lsls r3, r3, #2 800accc: 441a add r2, r3 800acce: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94 800acd2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800acd6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800acda: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800acde: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800ace2: b29b uxth r3, r3 800ace4: 8013 strh r3, [r2, #0] 800ace6: e1be b.n 800b066 } } } /* iso out double */ else if (ep->type == EP_TYPE_ISOC) 800ace8: f507 7384 add.w r3, r7, #264 @ 0x108 800acec: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800acf0: 681b ldr r3, [r3, #0] 800acf2: 78db ldrb r3, [r3, #3] 800acf4: 2b01 cmp r3, #1 800acf6: f040 81b4 bne.w 800b062 { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 800acfa: f507 7384 add.w r3, r7, #264 @ 0x108 800acfe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad02: 681b ldr r3, [r3, #0] 800ad04: 699a ldr r2, [r3, #24] 800ad06: f507 7384 add.w r3, r7, #264 @ 0x108 800ad0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad0e: 681b ldr r3, [r3, #0] 800ad10: 691b ldr r3, [r3, #16] 800ad12: 429a cmp r2, r3 800ad14: d917 bls.n 800ad46 { len = ep->maxpacket; 800ad16: f507 7384 add.w r3, r7, #264 @ 0x108 800ad1a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad1e: 681b ldr r3, [r3, #0] 800ad20: 691b ldr r3, [r3, #16] 800ad22: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 800ad26: f507 7384 add.w r3, r7, #264 @ 0x108 800ad2a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad2e: 681b ldr r3, [r3, #0] 800ad30: 699a ldr r2, [r3, #24] 800ad32: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ad36: 1ad2 subs r2, r2, r3 800ad38: f507 7384 add.w r3, r7, #264 @ 0x108 800ad3c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad40: 681b ldr r3, [r3, #0] 800ad42: 619a str r2, [r3, #24] 800ad44: e00e b.n 800ad64 } else { len = ep->xfer_len; 800ad46: f507 7384 add.w r3, r7, #264 @ 0x108 800ad4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad4e: 681b ldr r3, [r3, #0] 800ad50: 699b ldr r3, [r3, #24] 800ad52: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 800ad56: f507 7384 add.w r3, r7, #264 @ 0x108 800ad5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad5e: 681b ldr r3, [r3, #0] 800ad60: 2200 movs r2, #0 800ad62: 619a str r2, [r3, #24] } PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); 800ad64: f507 7384 add.w r3, r7, #264 @ 0x108 800ad68: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ad6c: 681b ldr r3, [r3, #0] 800ad6e: 785b ldrb r3, [r3, #1] 800ad70: 2b00 cmp r3, #0 800ad72: f040 8085 bne.w 800ae80 800ad76: f507 7384 add.w r3, r7, #264 @ 0x108 800ad7a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ad7e: 681b ldr r3, [r3, #0] 800ad80: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 800ad84: f507 7384 add.w r3, r7, #264 @ 0x108 800ad88: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ad8c: 681b ldr r3, [r3, #0] 800ad8e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800ad92: b29b uxth r3, r3 800ad94: 461a mov r2, r3 800ad96: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 800ad9a: 4413 add r3, r2 800ad9c: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 800ada0: f507 7384 add.w r3, r7, #264 @ 0x108 800ada4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ada8: 681b ldr r3, [r3, #0] 800adaa: 781b ldrb r3, [r3, #0] 800adac: 011a lsls r2, r3, #4 800adae: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 800adb2: 4413 add r3, r2 800adb4: f203 4304 addw r3, r3, #1028 @ 0x404 800adb8: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 800adbc: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800adc0: 881b ldrh r3, [r3, #0] 800adc2: b29b uxth r3, r3 800adc4: f3c3 0309 ubfx r3, r3, #0, #10 800adc8: b29a uxth r2, r3 800adca: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800adce: 801a strh r2, [r3, #0] 800add0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800add4: 2b3e cmp r3, #62 @ 0x3e 800add6: d923 bls.n 800ae20 800add8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800addc: 095b lsrs r3, r3, #5 800adde: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800ade2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ade6: f003 031f and.w r3, r3, #31 800adea: 2b00 cmp r3, #0 800adec: d104 bne.n 800adf8 800adee: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800adf2: 3b01 subs r3, #1 800adf4: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800adf8: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800adfc: 881b ldrh r3, [r3, #0] 800adfe: b29a uxth r2, r3 800ae00: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800ae04: b29b uxth r3, r3 800ae06: 029b lsls r3, r3, #10 800ae08: b29b uxth r3, r3 800ae0a: 4313 orrs r3, r2 800ae0c: b29b uxth r3, r3 800ae0e: ea6f 4343 mvn.w r3, r3, lsl #17 800ae12: ea6f 4353 mvn.w r3, r3, lsr #17 800ae16: b29a uxth r2, r3 800ae18: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ae1c: 801a strh r2, [r3, #0] 800ae1e: e060 b.n 800aee2 800ae20: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ae24: 2b00 cmp r3, #0 800ae26: d10c bne.n 800ae42 800ae28: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ae2c: 881b ldrh r3, [r3, #0] 800ae2e: b29b uxth r3, r3 800ae30: ea6f 4343 mvn.w r3, r3, lsl #17 800ae34: ea6f 4353 mvn.w r3, r3, lsr #17 800ae38: b29a uxth r2, r3 800ae3a: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ae3e: 801a strh r2, [r3, #0] 800ae40: e04f b.n 800aee2 800ae42: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ae46: 085b lsrs r3, r3, #1 800ae48: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800ae4c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800ae50: f003 0301 and.w r3, r3, #1 800ae54: 2b00 cmp r3, #0 800ae56: d004 beq.n 800ae62 800ae58: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800ae5c: 3301 adds r3, #1 800ae5e: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 800ae62: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ae66: 881b ldrh r3, [r3, #0] 800ae68: b29a uxth r2, r3 800ae6a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800ae6e: b29b uxth r3, r3 800ae70: 029b lsls r3, r3, #10 800ae72: b29b uxth r3, r3 800ae74: 4313 orrs r3, r2 800ae76: b29a uxth r2, r3 800ae78: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 800ae7c: 801a strh r2, [r3, #0] 800ae7e: e030 b.n 800aee2 800ae80: f507 7384 add.w r3, r7, #264 @ 0x108 800ae84: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800ae88: 681b ldr r3, [r3, #0] 800ae8a: 785b ldrb r3, [r3, #1] 800ae8c: 2b01 cmp r3, #1 800ae8e: d128 bne.n 800aee2 800ae90: f507 7384 add.w r3, r7, #264 @ 0x108 800ae94: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800ae98: 681b ldr r3, [r3, #0] 800ae9a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 800ae9e: f507 7384 add.w r3, r7, #264 @ 0x108 800aea2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aea6: 681b ldr r3, [r3, #0] 800aea8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800aeac: b29b uxth r3, r3 800aeae: 461a mov r2, r3 800aeb0: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 800aeb4: 4413 add r3, r2 800aeb6: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 800aeba: f507 7384 add.w r3, r7, #264 @ 0x108 800aebe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aec2: 681b ldr r3, [r3, #0] 800aec4: 781b ldrb r3, [r3, #0] 800aec6: 011a lsls r2, r3, #4 800aec8: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 800aecc: 4413 add r3, r2 800aece: f203 4304 addw r3, r3, #1028 @ 0x404 800aed2: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 800aed6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800aeda: b29a uxth r2, r3 800aedc: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0 800aee0: 801a strh r2, [r3, #0] 800aee2: f507 7384 add.w r3, r7, #264 @ 0x108 800aee6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800aeea: 681b ldr r3, [r3, #0] 800aeec: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 800aef0: f507 7384 add.w r3, r7, #264 @ 0x108 800aef4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800aef8: 681b ldr r3, [r3, #0] 800aefa: 785b ldrb r3, [r3, #1] 800aefc: 2b00 cmp r3, #0 800aefe: f040 8085 bne.w 800b00c 800af02: f507 7384 add.w r3, r7, #264 @ 0x108 800af06: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800af0a: 681b ldr r3, [r3, #0] 800af0c: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 800af10: f507 7384 add.w r3, r7, #264 @ 0x108 800af14: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800af18: 681b ldr r3, [r3, #0] 800af1a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800af1e: b29b uxth r3, r3 800af20: 461a mov r2, r3 800af22: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 800af26: 4413 add r3, r2 800af28: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 800af2c: f507 7384 add.w r3, r7, #264 @ 0x108 800af30: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800af34: 681b ldr r3, [r3, #0] 800af36: 781b ldrb r3, [r3, #0] 800af38: 011a lsls r2, r3, #4 800af3a: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 800af3e: 4413 add r3, r2 800af40: f203 430c addw r3, r3, #1036 @ 0x40c 800af44: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 800af48: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800af4c: 881b ldrh r3, [r3, #0] 800af4e: b29b uxth r3, r3 800af50: f3c3 0309 ubfx r3, r3, #0, #10 800af54: b29a uxth r2, r3 800af56: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800af5a: 801a strh r2, [r3, #0] 800af5c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800af60: 2b3e cmp r3, #62 @ 0x3e 800af62: d923 bls.n 800afac 800af64: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800af68: 095b lsrs r3, r3, #5 800af6a: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800af6e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800af72: f003 031f and.w r3, r3, #31 800af76: 2b00 cmp r3, #0 800af78: d104 bne.n 800af84 800af7a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800af7e: 3b01 subs r3, #1 800af80: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800af84: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800af88: 881b ldrh r3, [r3, #0] 800af8a: b29a uxth r2, r3 800af8c: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800af90: b29b uxth r3, r3 800af92: 029b lsls r3, r3, #10 800af94: b29b uxth r3, r3 800af96: 4313 orrs r3, r2 800af98: b29b uxth r3, r3 800af9a: ea6f 4343 mvn.w r3, r3, lsl #17 800af9e: ea6f 4353 mvn.w r3, r3, lsr #17 800afa2: b29a uxth r2, r3 800afa4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800afa8: 801a strh r2, [r3, #0] 800afaa: e05c b.n 800b066 800afac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800afb0: 2b00 cmp r3, #0 800afb2: d10c bne.n 800afce 800afb4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800afb8: 881b ldrh r3, [r3, #0] 800afba: b29b uxth r3, r3 800afbc: ea6f 4343 mvn.w r3, r3, lsl #17 800afc0: ea6f 4353 mvn.w r3, r3, lsr #17 800afc4: b29a uxth r2, r3 800afc6: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800afca: 801a strh r2, [r3, #0] 800afcc: e04b b.n 800b066 800afce: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800afd2: 085b lsrs r3, r3, #1 800afd4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800afd8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800afdc: f003 0301 and.w r3, r3, #1 800afe0: 2b00 cmp r3, #0 800afe2: d004 beq.n 800afee 800afe4: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800afe8: 3301 adds r3, #1 800afea: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800afee: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800aff2: 881b ldrh r3, [r3, #0] 800aff4: b29a uxth r2, r3 800aff6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 800affa: b29b uxth r3, r3 800affc: 029b lsls r3, r3, #10 800affe: b29b uxth r3, r3 800b000: 4313 orrs r3, r2 800b002: b29a uxth r2, r3 800b004: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800b008: 801a strh r2, [r3, #0] 800b00a: e02c b.n 800b066 800b00c: f507 7384 add.w r3, r7, #264 @ 0x108 800b010: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b014: 681b ldr r3, [r3, #0] 800b016: 785b ldrb r3, [r3, #1] 800b018: 2b01 cmp r3, #1 800b01a: d124 bne.n 800b066 800b01c: f507 7384 add.w r3, r7, #264 @ 0x108 800b020: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b024: 681b ldr r3, [r3, #0] 800b026: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800b02a: b29b uxth r3, r3 800b02c: 461a mov r2, r3 800b02e: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 800b032: 4413 add r3, r2 800b034: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 800b038: f507 7384 add.w r3, r7, #264 @ 0x108 800b03c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b040: 681b ldr r3, [r3, #0] 800b042: 781b ldrb r3, [r3, #0] 800b044: 011a lsls r2, r3, #4 800b046: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 800b04a: 4413 add r3, r2 800b04c: f203 430c addw r3, r3, #1036 @ 0x40c 800b050: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 800b054: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800b058: b29a uxth r2, r3 800b05a: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0 800b05e: 801a strh r2, [r3, #0] 800b060: e001 b.n 800b066 } else { return HAL_ERROR; 800b062: 2301 movs r3, #1 800b064: e03a b.n 800b0dc } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800b066: f507 7384 add.w r3, r7, #264 @ 0x108 800b06a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b06e: 681a ldr r2, [r3, #0] 800b070: f507 7384 add.w r3, r7, #264 @ 0x108 800b074: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b078: 681b ldr r3, [r3, #0] 800b07a: 781b ldrb r3, [r3, #0] 800b07c: 009b lsls r3, r3, #2 800b07e: 4413 add r3, r2 800b080: 881b ldrh r3, [r3, #0] 800b082: b29b uxth r3, r3 800b084: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800b088: f023 0370 bic.w r3, r3, #112 @ 0x70 800b08c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800b090: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800b094: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800b098: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800b09c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800b0a0: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800b0a4: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 800b0a8: f507 7384 add.w r3, r7, #264 @ 0x108 800b0ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800b0b0: 681a ldr r2, [r3, #0] 800b0b2: f507 7384 add.w r3, r7, #264 @ 0x108 800b0b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800b0ba: 681b ldr r3, [r3, #0] 800b0bc: 781b ldrb r3, [r3, #0] 800b0be: 009b lsls r3, r3, #2 800b0c0: 441a add r2, r3 800b0c2: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800b0c6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b0ca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b0ce: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b0d2: f043 0380 orr.w r3, r3, #128 @ 0x80 800b0d6: b29b uxth r3, r3 800b0d8: 8013 strh r3, [r2, #0] } return HAL_OK; 800b0da: 2300 movs r3, #0 } 800b0dc: 4618 mov r0, r3 800b0de: f507 7784 add.w r7, r7, #264 @ 0x108 800b0e2: 46bd mov sp, r7 800b0e4: bd80 pop {r7, pc} 0800b0e6 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800b0e6: b480 push {r7} 800b0e8: b085 sub sp, #20 800b0ea: af00 add r7, sp, #0 800b0ec: 6078 str r0, [r7, #4] 800b0ee: 6039 str r1, [r7, #0] if (ep->is_in != 0U) 800b0f0: 683b ldr r3, [r7, #0] 800b0f2: 785b ldrb r3, [r3, #1] 800b0f4: 2b00 cmp r3, #0 800b0f6: d020 beq.n 800b13a { PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); 800b0f8: 687a ldr r2, [r7, #4] 800b0fa: 683b ldr r3, [r7, #0] 800b0fc: 781b ldrb r3, [r3, #0] 800b0fe: 009b lsls r3, r3, #2 800b100: 4413 add r3, r2 800b102: 881b ldrh r3, [r3, #0] 800b104: b29b uxth r3, r3 800b106: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800b10a: f023 0340 bic.w r3, r3, #64 @ 0x40 800b10e: 81bb strh r3, [r7, #12] 800b110: 89bb ldrh r3, [r7, #12] 800b112: f083 0310 eor.w r3, r3, #16 800b116: 81bb strh r3, [r7, #12] 800b118: 687a ldr r2, [r7, #4] 800b11a: 683b ldr r3, [r7, #0] 800b11c: 781b ldrb r3, [r3, #0] 800b11e: 009b lsls r3, r3, #2 800b120: 441a add r2, r3 800b122: 89bb ldrh r3, [r7, #12] 800b124: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b128: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b12c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b130: f043 0380 orr.w r3, r3, #128 @ 0x80 800b134: b29b uxth r3, r3 800b136: 8013 strh r3, [r2, #0] 800b138: e01f b.n 800b17a } else { PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); 800b13a: 687a ldr r2, [r7, #4] 800b13c: 683b ldr r3, [r7, #0] 800b13e: 781b ldrb r3, [r3, #0] 800b140: 009b lsls r3, r3, #2 800b142: 4413 add r3, r2 800b144: 881b ldrh r3, [r3, #0] 800b146: b29b uxth r3, r3 800b148: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800b14c: f023 0370 bic.w r3, r3, #112 @ 0x70 800b150: 81fb strh r3, [r7, #14] 800b152: 89fb ldrh r3, [r7, #14] 800b154: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800b158: 81fb strh r3, [r7, #14] 800b15a: 687a ldr r2, [r7, #4] 800b15c: 683b ldr r3, [r7, #0] 800b15e: 781b ldrb r3, [r3, #0] 800b160: 009b lsls r3, r3, #2 800b162: 441a add r2, r3 800b164: 89fb ldrh r3, [r7, #14] 800b166: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b16a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b16e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b172: f043 0380 orr.w r3, r3, #128 @ 0x80 800b176: b29b uxth r3, r3 800b178: 8013 strh r3, [r2, #0] } return HAL_OK; 800b17a: 2300 movs r3, #0 } 800b17c: 4618 mov r0, r3 800b17e: 3714 adds r7, #20 800b180: 46bd mov sp, r7 800b182: bc80 pop {r7} 800b184: 4770 bx lr 0800b186 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800b186: b480 push {r7} 800b188: b087 sub sp, #28 800b18a: af00 add r7, sp, #0 800b18c: 6078 str r0, [r7, #4] 800b18e: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 800b190: 683b ldr r3, [r7, #0] 800b192: 7b1b ldrb r3, [r3, #12] 800b194: 2b00 cmp r3, #0 800b196: f040 809d bne.w 800b2d4 { if (ep->is_in != 0U) 800b19a: 683b ldr r3, [r7, #0] 800b19c: 785b ldrb r3, [r3, #1] 800b19e: 2b00 cmp r3, #0 800b1a0: d04c beq.n 800b23c { PCD_CLEAR_TX_DTOG(USBx, ep->num); 800b1a2: 687a ldr r2, [r7, #4] 800b1a4: 683b ldr r3, [r7, #0] 800b1a6: 781b ldrb r3, [r3, #0] 800b1a8: 009b lsls r3, r3, #2 800b1aa: 4413 add r3, r2 800b1ac: 881b ldrh r3, [r3, #0] 800b1ae: 823b strh r3, [r7, #16] 800b1b0: 8a3b ldrh r3, [r7, #16] 800b1b2: f003 0340 and.w r3, r3, #64 @ 0x40 800b1b6: 2b00 cmp r3, #0 800b1b8: d01b beq.n 800b1f2 800b1ba: 687a ldr r2, [r7, #4] 800b1bc: 683b ldr r3, [r7, #0] 800b1be: 781b ldrb r3, [r3, #0] 800b1c0: 009b lsls r3, r3, #2 800b1c2: 4413 add r3, r2 800b1c4: 881b ldrh r3, [r3, #0] 800b1c6: b29b uxth r3, r3 800b1c8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800b1cc: f023 0370 bic.w r3, r3, #112 @ 0x70 800b1d0: 81fb strh r3, [r7, #14] 800b1d2: 687a ldr r2, [r7, #4] 800b1d4: 683b ldr r3, [r7, #0] 800b1d6: 781b ldrb r3, [r3, #0] 800b1d8: 009b lsls r3, r3, #2 800b1da: 441a add r2, r3 800b1dc: 89fb ldrh r3, [r7, #14] 800b1de: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b1e2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b1e6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b1ea: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800b1ee: b29b uxth r3, r3 800b1f0: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 800b1f2: 683b ldr r3, [r7, #0] 800b1f4: 78db ldrb r3, [r3, #3] 800b1f6: 2b01 cmp r3, #1 800b1f8: d06c beq.n 800b2d4 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 800b1fa: 687a ldr r2, [r7, #4] 800b1fc: 683b ldr r3, [r7, #0] 800b1fe: 781b ldrb r3, [r3, #0] 800b200: 009b lsls r3, r3, #2 800b202: 4413 add r3, r2 800b204: 881b ldrh r3, [r3, #0] 800b206: b29b uxth r3, r3 800b208: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800b20c: f023 0340 bic.w r3, r3, #64 @ 0x40 800b210: 81bb strh r3, [r7, #12] 800b212: 89bb ldrh r3, [r7, #12] 800b214: f083 0320 eor.w r3, r3, #32 800b218: 81bb strh r3, [r7, #12] 800b21a: 687a ldr r2, [r7, #4] 800b21c: 683b ldr r3, [r7, #0] 800b21e: 781b ldrb r3, [r3, #0] 800b220: 009b lsls r3, r3, #2 800b222: 441a add r2, r3 800b224: 89bb ldrh r3, [r7, #12] 800b226: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b22a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b22e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b232: f043 0380 orr.w r3, r3, #128 @ 0x80 800b236: b29b uxth r3, r3 800b238: 8013 strh r3, [r2, #0] 800b23a: e04b b.n 800b2d4 } } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 800b23c: 687a ldr r2, [r7, #4] 800b23e: 683b ldr r3, [r7, #0] 800b240: 781b ldrb r3, [r3, #0] 800b242: 009b lsls r3, r3, #2 800b244: 4413 add r3, r2 800b246: 881b ldrh r3, [r3, #0] 800b248: 82fb strh r3, [r7, #22] 800b24a: 8afb ldrh r3, [r7, #22] 800b24c: f403 4380 and.w r3, r3, #16384 @ 0x4000 800b250: 2b00 cmp r3, #0 800b252: d01b beq.n 800b28c 800b254: 687a ldr r2, [r7, #4] 800b256: 683b ldr r3, [r7, #0] 800b258: 781b ldrb r3, [r3, #0] 800b25a: 009b lsls r3, r3, #2 800b25c: 4413 add r3, r2 800b25e: 881b ldrh r3, [r3, #0] 800b260: b29b uxth r3, r3 800b262: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800b266: f023 0370 bic.w r3, r3, #112 @ 0x70 800b26a: 82bb strh r3, [r7, #20] 800b26c: 687a ldr r2, [r7, #4] 800b26e: 683b ldr r3, [r7, #0] 800b270: 781b ldrb r3, [r3, #0] 800b272: 009b lsls r3, r3, #2 800b274: 441a add r2, r3 800b276: 8abb ldrh r3, [r7, #20] 800b278: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b27c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b280: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800b284: f043 0380 orr.w r3, r3, #128 @ 0x80 800b288: b29b uxth r3, r3 800b28a: 8013 strh r3, [r2, #0] /* Configure VALID status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800b28c: 687a ldr r2, [r7, #4] 800b28e: 683b ldr r3, [r7, #0] 800b290: 781b ldrb r3, [r3, #0] 800b292: 009b lsls r3, r3, #2 800b294: 4413 add r3, r2 800b296: 881b ldrh r3, [r3, #0] 800b298: b29b uxth r3, r3 800b29a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800b29e: f023 0370 bic.w r3, r3, #112 @ 0x70 800b2a2: 827b strh r3, [r7, #18] 800b2a4: 8a7b ldrh r3, [r7, #18] 800b2a6: f483 5380 eor.w r3, r3, #4096 @ 0x1000 800b2aa: 827b strh r3, [r7, #18] 800b2ac: 8a7b ldrh r3, [r7, #18] 800b2ae: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800b2b2: 827b strh r3, [r7, #18] 800b2b4: 687a ldr r2, [r7, #4] 800b2b6: 683b ldr r3, [r7, #0] 800b2b8: 781b ldrb r3, [r3, #0] 800b2ba: 009b lsls r3, r3, #2 800b2bc: 441a add r2, r3 800b2be: 8a7b ldrh r3, [r7, #18] 800b2c0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800b2c4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800b2c8: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b2cc: f043 0380 orr.w r3, r3, #128 @ 0x80 800b2d0: b29b uxth r3, r3 800b2d2: 8013 strh r3, [r2, #0] } } return HAL_OK; 800b2d4: 2300 movs r3, #0 } 800b2d6: 4618 mov r0, r3 800b2d8: 371c adds r7, #28 800b2da: 46bd mov sp, r7 800b2dc: bc80 pop {r7} 800b2de: 4770 bx lr 0800b2e0 : * @param address new device address to be assigned * This parameter can be a value from 0 to 255 * @retval HAL status */ HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) { 800b2e0: b480 push {r7} 800b2e2: b083 sub sp, #12 800b2e4: af00 add r7, sp, #0 800b2e6: 6078 str r0, [r7, #4] 800b2e8: 460b mov r3, r1 800b2ea: 70fb strb r3, [r7, #3] if (address == 0U) 800b2ec: 78fb ldrb r3, [r7, #3] 800b2ee: 2b00 cmp r3, #0 800b2f0: d103 bne.n 800b2fa { /* set device address and enable function */ USBx->DADDR = (uint16_t)USB_DADDR_EF; 800b2f2: 687b ldr r3, [r7, #4] 800b2f4: 2280 movs r2, #128 @ 0x80 800b2f6: f8a3 204c strh.w r2, [r3, #76] @ 0x4c } return HAL_OK; 800b2fa: 2300 movs r3, #0 } 800b2fc: 4618 mov r0, r3 800b2fe: 370c adds r7, #12 800b300: 46bd mov sp, r7 800b302: bc80 pop {r7} 800b304: 4770 bx lr 0800b306 : * @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx) { 800b306: b480 push {r7} 800b308: b083 sub sp, #12 800b30a: af00 add r7, sp, #0 800b30c: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800b30e: 2300 movs r3, #0 } 800b310: 4618 mov r0, r3 800b312: 370c adds r7, #12 800b314: 46bd mov sp, r7 800b316: bc80 pop {r7} 800b318: 4770 bx lr 0800b31a : * @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) { 800b31a: b480 push {r7} 800b31c: b083 sub sp, #12 800b31e: af00 add r7, sp, #0 800b320: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800b322: 2300 movs r3, #0 } 800b324: 4618 mov r0, r3 800b326: 370c adds r7, #12 800b328: 46bd mov sp, r7 800b32a: bc80 pop {r7} 800b32c: 4770 bx lr 0800b32e : * @brief USB_ReadInterrupts return the global USB interrupt status * @param USBx Selected device * @retval USB Global Interrupt status */ uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx) { 800b32e: b480 push {r7} 800b330: b085 sub sp, #20 800b332: af00 add r7, sp, #0 800b334: 6078 str r0, [r7, #4] uint32_t tmpreg; tmpreg = USBx->ISTR; 800b336: 687b ldr r3, [r7, #4] 800b338: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 800b33c: b29b uxth r3, r3 800b33e: 60fb str r3, [r7, #12] return tmpreg; 800b340: 68fb ldr r3, [r7, #12] } 800b342: 4618 mov r0, r3 800b344: 3714 adds r7, #20 800b346: 46bd mov sp, r7 800b348: bc80 pop {r7} 800b34a: 4770 bx lr 0800b34c : * @param USBx Selected device * @param psetup pointer to setup packet * @retval HAL status */ HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup) { 800b34c: b480 push {r7} 800b34e: b083 sub sp, #12 800b350: af00 add r7, sp, #0 800b352: 6078 str r0, [r7, #4] 800b354: 6039 str r1, [r7, #0] UNUSED(psetup); /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800b356: 2300 movs r3, #0 } 800b358: 4618 mov r0, r3 800b35a: 370c adds r7, #12 800b35c: 46bd mov sp, r7 800b35e: bc80 pop {r7} 800b360: 4770 bx lr 0800b362 : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800b362: b480 push {r7} 800b364: b08b sub sp, #44 @ 0x2c 800b366: af00 add r7, sp, #0 800b368: 60f8 str r0, [r7, #12] 800b36a: 60b9 str r1, [r7, #8] 800b36c: 4611 mov r1, r2 800b36e: 461a mov r2, r3 800b370: 460b mov r3, r1 800b372: 80fb strh r3, [r7, #6] 800b374: 4613 mov r3, r2 800b376: 80bb strh r3, [r7, #4] uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; 800b378: 88bb ldrh r3, [r7, #4] 800b37a: 3301 adds r3, #1 800b37c: 085b lsrs r3, r3, #1 800b37e: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 800b380: 68fb ldr r3, [r7, #12] 800b382: 617b str r3, [r7, #20] uint32_t count; uint16_t WrVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 800b384: 68bb ldr r3, [r7, #8] 800b386: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 800b388: 88fb ldrh r3, [r7, #6] 800b38a: 005a lsls r2, r3, #1 800b38c: 697b ldr r3, [r7, #20] 800b38e: 4413 add r3, r2 800b390: f503 6380 add.w r3, r3, #1024 @ 0x400 800b394: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800b396: 69bb ldr r3, [r7, #24] 800b398: 627b str r3, [r7, #36] @ 0x24 800b39a: e01f b.n 800b3dc { WrVal = pBuf[0]; 800b39c: 69fb ldr r3, [r7, #28] 800b39e: 781b ldrb r3, [r3, #0] 800b3a0: 827b strh r3, [r7, #18] WrVal |= (uint16_t)pBuf[1] << 8; 800b3a2: 69fb ldr r3, [r7, #28] 800b3a4: 3301 adds r3, #1 800b3a6: 781b ldrb r3, [r3, #0] 800b3a8: b21b sxth r3, r3 800b3aa: 021b lsls r3, r3, #8 800b3ac: b21a sxth r2, r3 800b3ae: f9b7 3012 ldrsh.w r3, [r7, #18] 800b3b2: 4313 orrs r3, r2 800b3b4: b21b sxth r3, r3 800b3b6: 827b strh r3, [r7, #18] *pdwVal = (WrVal & 0xFFFFU); 800b3b8: 6a3b ldr r3, [r7, #32] 800b3ba: 8a7a ldrh r2, [r7, #18] 800b3bc: 801a strh r2, [r3, #0] pdwVal++; 800b3be: 6a3b ldr r3, [r7, #32] 800b3c0: 3302 adds r3, #2 800b3c2: 623b str r3, [r7, #32] #if PMA_ACCESS > 1U pdwVal++; 800b3c4: 6a3b ldr r3, [r7, #32] 800b3c6: 3302 adds r3, #2 800b3c8: 623b str r3, [r7, #32] #endif /* PMA_ACCESS */ pBuf++; 800b3ca: 69fb ldr r3, [r7, #28] 800b3cc: 3301 adds r3, #1 800b3ce: 61fb str r3, [r7, #28] pBuf++; 800b3d0: 69fb ldr r3, [r7, #28] 800b3d2: 3301 adds r3, #1 800b3d4: 61fb str r3, [r7, #28] for (count = n; count != 0U; count--) 800b3d6: 6a7b ldr r3, [r7, #36] @ 0x24 800b3d8: 3b01 subs r3, #1 800b3da: 627b str r3, [r7, #36] @ 0x24 800b3dc: 6a7b ldr r3, [r7, #36] @ 0x24 800b3de: 2b00 cmp r3, #0 800b3e0: d1dc bne.n 800b39c } } 800b3e2: bf00 nop 800b3e4: bf00 nop 800b3e6: 372c adds r7, #44 @ 0x2c 800b3e8: 46bd mov sp, r7 800b3ea: bc80 pop {r7} 800b3ec: 4770 bx lr 0800b3ee : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800b3ee: b480 push {r7} 800b3f0: b08b sub sp, #44 @ 0x2c 800b3f2: af00 add r7, sp, #0 800b3f4: 60f8 str r0, [r7, #12] 800b3f6: 60b9 str r1, [r7, #8] 800b3f8: 4611 mov r1, r2 800b3fa: 461a mov r2, r3 800b3fc: 460b mov r3, r1 800b3fe: 80fb strh r3, [r7, #6] 800b400: 4613 mov r3, r2 800b402: 80bb strh r3, [r7, #4] uint32_t n = (uint32_t)wNBytes >> 1; 800b404: 88bb ldrh r3, [r7, #4] 800b406: 085b lsrs r3, r3, #1 800b408: b29b uxth r3, r3 800b40a: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 800b40c: 68fb ldr r3, [r7, #12] 800b40e: 617b str r3, [r7, #20] uint32_t count; uint32_t RdVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 800b410: 68bb ldr r3, [r7, #8] 800b412: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 800b414: 88fb ldrh r3, [r7, #6] 800b416: 005a lsls r2, r3, #1 800b418: 697b ldr r3, [r7, #20] 800b41a: 4413 add r3, r2 800b41c: f503 6380 add.w r3, r3, #1024 @ 0x400 800b420: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800b422: 69bb ldr r3, [r7, #24] 800b424: 627b str r3, [r7, #36] @ 0x24 800b426: e01b b.n 800b460 { RdVal = *(__IO uint16_t *)pdwVal; 800b428: 6a3b ldr r3, [r7, #32] 800b42a: 881b ldrh r3, [r3, #0] 800b42c: b29b uxth r3, r3 800b42e: 613b str r3, [r7, #16] pdwVal++; 800b430: 6a3b ldr r3, [r7, #32] 800b432: 3302 adds r3, #2 800b434: 623b str r3, [r7, #32] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 800b436: 693b ldr r3, [r7, #16] 800b438: b2da uxtb r2, r3 800b43a: 69fb ldr r3, [r7, #28] 800b43c: 701a strb r2, [r3, #0] pBuf++; 800b43e: 69fb ldr r3, [r7, #28] 800b440: 3301 adds r3, #1 800b442: 61fb str r3, [r7, #28] *pBuf = (uint8_t)((RdVal >> 8) & 0xFFU); 800b444: 693b ldr r3, [r7, #16] 800b446: 0a1b lsrs r3, r3, #8 800b448: b2da uxtb r2, r3 800b44a: 69fb ldr r3, [r7, #28] 800b44c: 701a strb r2, [r3, #0] pBuf++; 800b44e: 69fb ldr r3, [r7, #28] 800b450: 3301 adds r3, #1 800b452: 61fb str r3, [r7, #28] #if PMA_ACCESS > 1U pdwVal++; 800b454: 6a3b ldr r3, [r7, #32] 800b456: 3302 adds r3, #2 800b458: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800b45a: 6a7b ldr r3, [r7, #36] @ 0x24 800b45c: 3b01 subs r3, #1 800b45e: 627b str r3, [r7, #36] @ 0x24 800b460: 6a7b ldr r3, [r7, #36] @ 0x24 800b462: 2b00 cmp r3, #0 800b464: d1e0 bne.n 800b428 #endif /* PMA_ACCESS */ } if ((wNBytes % 2U) != 0U) 800b466: 88bb ldrh r3, [r7, #4] 800b468: f003 0301 and.w r3, r3, #1 800b46c: b29b uxth r3, r3 800b46e: 2b00 cmp r3, #0 800b470: d007 beq.n 800b482 { RdVal = *pdwVal; 800b472: 6a3b ldr r3, [r7, #32] 800b474: 881b ldrh r3, [r3, #0] 800b476: b29b uxth r3, r3 800b478: 613b str r3, [r7, #16] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 800b47a: 693b ldr r3, [r7, #16] 800b47c: b2da uxtb r2, r3 800b47e: 69fb ldr r3, [r7, #28] 800b480: 701a strb r2, [r3, #0] } } 800b482: bf00 nop 800b484: 372c adds r7, #44 @ 0x2c 800b486: 46bd mov sp, r7 800b488: bc80 pop {r7} 800b48a: 4770 bx lr 0800b48c : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800b48c: b580 push {r7, lr} 800b48e: b084 sub sp, #16 800b490: af00 add r7, sp, #0 800b492: 6078 str r0, [r7, #4] 800b494: 460b mov r3, r1 800b496: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 800b498: 2300 movs r3, #0 800b49a: 73fb strb r3, [r7, #15] USBD_CDC_HandleTypeDef *hcdc; if (pdev->dev_speed == USBD_SPEED_HIGH) 800b49c: 687b ldr r3, [r7, #4] 800b49e: 7c1b ldrb r3, [r3, #16] 800b4a0: 2b00 cmp r3, #0 800b4a2: d115 bne.n 800b4d0 { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 800b4a4: f44f 7300 mov.w r3, #512 @ 0x200 800b4a8: 2202 movs r2, #2 800b4aa: 2181 movs r1, #129 @ 0x81 800b4ac: 6878 ldr r0, [r7, #4] 800b4ae: f001 ff00 bl 800d2b2 CDC_DATA_HS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 800b4b2: 687b ldr r3, [r7, #4] 800b4b4: 2201 movs r2, #1 800b4b6: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 800b4b8: f44f 7300 mov.w r3, #512 @ 0x200 800b4bc: 2202 movs r2, #2 800b4be: 2101 movs r1, #1 800b4c0: 6878 ldr r0, [r7, #4] 800b4c2: f001 fef6 bl 800d2b2 CDC_DATA_HS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 800b4c6: 687b ldr r3, [r7, #4] 800b4c8: 2201 movs r2, #1 800b4ca: f8c3 216c str.w r2, [r3, #364] @ 0x16c 800b4ce: e012 b.n 800b4f6 } else { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 800b4d0: 2340 movs r3, #64 @ 0x40 800b4d2: 2202 movs r2, #2 800b4d4: 2181 movs r1, #129 @ 0x81 800b4d6: 6878 ldr r0, [r7, #4] 800b4d8: f001 feeb bl 800d2b2 CDC_DATA_FS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 800b4dc: 687b ldr r3, [r7, #4] 800b4de: 2201 movs r2, #1 800b4e0: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 800b4e2: 2340 movs r3, #64 @ 0x40 800b4e4: 2202 movs r2, #2 800b4e6: 2101 movs r1, #1 800b4e8: 6878 ldr r0, [r7, #4] 800b4ea: f001 fee2 bl 800d2b2 CDC_DATA_FS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 800b4ee: 687b ldr r3, [r7, #4] 800b4f0: 2201 movs r2, #1 800b4f2: f8c3 216c str.w r2, [r3, #364] @ 0x16c } /* Open Command IN EP */ USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE); 800b4f6: 2308 movs r3, #8 800b4f8: 2203 movs r2, #3 800b4fa: 2182 movs r1, #130 @ 0x82 800b4fc: 6878 ldr r0, [r7, #4] 800b4fe: f001 fed8 bl 800d2b2 pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U; 800b502: 687b ldr r3, [r7, #4] 800b504: 2201 movs r2, #1 800b506: 641a str r2, [r3, #64] @ 0x40 pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef)); 800b508: f44f 7007 mov.w r0, #540 @ 0x21c 800b50c: f001 fff8 bl 800d500 800b510: 4602 mov r2, r0 800b512: 687b ldr r3, [r7, #4] 800b514: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 if (pdev->pClassData == NULL) 800b518: 687b ldr r3, [r7, #4] 800b51a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b51e: 2b00 cmp r3, #0 800b520: d102 bne.n 800b528 { ret = 1U; 800b522: 2301 movs r3, #1 800b524: 73fb strb r3, [r7, #15] 800b526: e026 b.n 800b576 } else { hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b528: 687b ldr r3, [r7, #4] 800b52a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b52e: 60bb str r3, [r7, #8] /* Init physical Interface components */ ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init(); 800b530: 687b ldr r3, [r7, #4] 800b532: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b536: 681b ldr r3, [r3, #0] 800b538: 4798 blx r3 /* Init Xfer states */ hcdc->TxState = 0U; 800b53a: 68bb ldr r3, [r7, #8] 800b53c: 2200 movs r2, #0 800b53e: f8c3 2214 str.w r2, [r3, #532] @ 0x214 hcdc->RxState = 0U; 800b542: 68bb ldr r3, [r7, #8] 800b544: 2200 movs r2, #0 800b546: f8c3 2218 str.w r2, [r3, #536] @ 0x218 if (pdev->dev_speed == USBD_SPEED_HIGH) 800b54a: 687b ldr r3, [r7, #4] 800b54c: 7c1b ldrb r3, [r3, #16] 800b54e: 2b00 cmp r3, #0 800b550: d109 bne.n 800b566 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 800b552: 68bb ldr r3, [r7, #8] 800b554: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800b558: f44f 7300 mov.w r3, #512 @ 0x200 800b55c: 2101 movs r1, #1 800b55e: 6878 ldr r0, [r7, #4] 800b560: f001 ff97 bl 800d492 800b564: e007 b.n 800b576 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 800b566: 68bb ldr r3, [r7, #8] 800b568: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800b56c: 2340 movs r3, #64 @ 0x40 800b56e: 2101 movs r1, #1 800b570: 6878 ldr r0, [r7, #4] 800b572: f001 ff8e bl 800d492 CDC_DATA_FS_OUT_PACKET_SIZE); } } return ret; 800b576: 7bfb ldrb r3, [r7, #15] } 800b578: 4618 mov r0, r3 800b57a: 3710 adds r7, #16 800b57c: 46bd mov sp, r7 800b57e: bd80 pop {r7, pc} 0800b580 : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800b580: b580 push {r7, lr} 800b582: b084 sub sp, #16 800b584: af00 add r7, sp, #0 800b586: 6078 str r0, [r7, #4] 800b588: 460b mov r3, r1 800b58a: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 800b58c: 2300 movs r3, #0 800b58e: 73fb strb r3, [r7, #15] /* Close EP IN */ USBD_LL_CloseEP(pdev, CDC_IN_EP); 800b590: 2181 movs r1, #129 @ 0x81 800b592: 6878 ldr r0, [r7, #4] 800b594: f001 feb3 bl 800d2fe pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U; 800b598: 687b ldr r3, [r7, #4] 800b59a: 2200 movs r2, #0 800b59c: 62da str r2, [r3, #44] @ 0x2c /* Close EP OUT */ USBD_LL_CloseEP(pdev, CDC_OUT_EP); 800b59e: 2101 movs r1, #1 800b5a0: 6878 ldr r0, [r7, #4] 800b5a2: f001 feac bl 800d2fe pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U; 800b5a6: 687b ldr r3, [r7, #4] 800b5a8: 2200 movs r2, #0 800b5aa: f8c3 216c str.w r2, [r3, #364] @ 0x16c /* Close Command IN EP */ USBD_LL_CloseEP(pdev, CDC_CMD_EP); 800b5ae: 2182 movs r1, #130 @ 0x82 800b5b0: 6878 ldr r0, [r7, #4] 800b5b2: f001 fea4 bl 800d2fe pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U; 800b5b6: 687b ldr r3, [r7, #4] 800b5b8: 2200 movs r2, #0 800b5ba: 641a str r2, [r3, #64] @ 0x40 /* DeInit physical Interface components */ if (pdev->pClassData != NULL) 800b5bc: 687b ldr r3, [r7, #4] 800b5be: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b5c2: 2b00 cmp r3, #0 800b5c4: d00e beq.n 800b5e4 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit(); 800b5c6: 687b ldr r3, [r7, #4] 800b5c8: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b5cc: 685b ldr r3, [r3, #4] 800b5ce: 4798 blx r3 USBD_free(pdev->pClassData); 800b5d0: 687b ldr r3, [r7, #4] 800b5d2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b5d6: 4618 mov r0, r3 800b5d8: f001 ff9e bl 800d518 pdev->pClassData = NULL; 800b5dc: 687b ldr r3, [r7, #4] 800b5de: 2200 movs r2, #0 800b5e0: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 } return ret; 800b5e4: 7bfb ldrb r3, [r7, #15] } 800b5e6: 4618 mov r0, r3 800b5e8: 3710 adds r7, #16 800b5ea: 46bd mov sp, r7 800b5ec: bd80 pop {r7, pc} 0800b5ee : * @param req: usb requests * @retval status */ static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800b5ee: b580 push {r7, lr} 800b5f0: b086 sub sp, #24 800b5f2: af00 add r7, sp, #0 800b5f4: 6078 str r0, [r7, #4] 800b5f6: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b5f8: 687b ldr r3, [r7, #4] 800b5fa: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b5fe: 613b str r3, [r7, #16] uint8_t ifalt = 0U; 800b600: 2300 movs r3, #0 800b602: 73fb strb r3, [r7, #15] uint16_t status_info = 0U; 800b604: 2300 movs r3, #0 800b606: 81bb strh r3, [r7, #12] uint8_t ret = USBD_OK; 800b608: 2300 movs r3, #0 800b60a: 75fb strb r3, [r7, #23] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800b60c: 683b ldr r3, [r7, #0] 800b60e: 781b ldrb r3, [r3, #0] 800b610: f003 0360 and.w r3, r3, #96 @ 0x60 800b614: 2b00 cmp r3, #0 800b616: d039 beq.n 800b68c 800b618: 2b20 cmp r3, #32 800b61a: d17f bne.n 800b71c { case USB_REQ_TYPE_CLASS : if (req->wLength) 800b61c: 683b ldr r3, [r7, #0] 800b61e: 88db ldrh r3, [r3, #6] 800b620: 2b00 cmp r3, #0 800b622: d029 beq.n 800b678 { if (req->bmRequest & 0x80U) 800b624: 683b ldr r3, [r7, #0] 800b626: 781b ldrb r3, [r3, #0] 800b628: b25b sxtb r3, r3 800b62a: 2b00 cmp r3, #0 800b62c: da11 bge.n 800b652 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800b62e: 687b ldr r3, [r7, #4] 800b630: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b634: 689b ldr r3, [r3, #8] 800b636: 683a ldr r2, [r7, #0] 800b638: 7850 ldrb r0, [r2, #1] (uint8_t *)(void *)hcdc->data, 800b63a: 6939 ldr r1, [r7, #16] ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800b63c: 683a ldr r2, [r7, #0] 800b63e: 88d2 ldrh r2, [r2, #6] 800b640: 4798 blx r3 req->wLength); USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 800b642: 6939 ldr r1, [r7, #16] 800b644: 683b ldr r3, [r7, #0] 800b646: 88db ldrh r3, [r3, #6] 800b648: 461a mov r2, r3 800b64a: 6878 ldr r0, [r7, #4] 800b64c: f001 fa06 bl 800ca5c else { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, (uint8_t *)(void *)req, 0U); } break; 800b650: e06b b.n 800b72a hcdc->CmdOpCode = req->bRequest; 800b652: 683b ldr r3, [r7, #0] 800b654: 785a ldrb r2, [r3, #1] 800b656: 693b ldr r3, [r7, #16] 800b658: f883 2200 strb.w r2, [r3, #512] @ 0x200 hcdc->CmdLength = (uint8_t)req->wLength; 800b65c: 683b ldr r3, [r7, #0] 800b65e: 88db ldrh r3, [r3, #6] 800b660: b2da uxtb r2, r3 800b662: 693b ldr r3, [r7, #16] 800b664: f883 2201 strb.w r2, [r3, #513] @ 0x201 USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 800b668: 6939 ldr r1, [r7, #16] 800b66a: 683b ldr r3, [r7, #0] 800b66c: 88db ldrh r3, [r3, #6] 800b66e: 461a mov r2, r3 800b670: 6878 ldr r0, [r7, #4] 800b672: f001 fa21 bl 800cab8 break; 800b676: e058 b.n 800b72a ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 800b678: 687b ldr r3, [r7, #4] 800b67a: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b67e: 689b ldr r3, [r3, #8] 800b680: 683a ldr r2, [r7, #0] 800b682: 7850 ldrb r0, [r2, #1] 800b684: 2200 movs r2, #0 800b686: 6839 ldr r1, [r7, #0] 800b688: 4798 blx r3 break; 800b68a: e04e b.n 800b72a case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800b68c: 683b ldr r3, [r7, #0] 800b68e: 785b ldrb r3, [r3, #1] 800b690: 2b0b cmp r3, #11 800b692: d02e beq.n 800b6f2 800b694: 2b0b cmp r3, #11 800b696: dc38 bgt.n 800b70a 800b698: 2b00 cmp r3, #0 800b69a: d002 beq.n 800b6a2 800b69c: 2b0a cmp r3, #10 800b69e: d014 beq.n 800b6ca 800b6a0: e033 b.n 800b70a { case USB_REQ_GET_STATUS: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800b6a2: 687b ldr r3, [r7, #4] 800b6a4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800b6a8: 2b03 cmp r3, #3 800b6aa: d107 bne.n 800b6bc { USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U); 800b6ac: f107 030c add.w r3, r7, #12 800b6b0: 2202 movs r2, #2 800b6b2: 4619 mov r1, r3 800b6b4: 6878 ldr r0, [r7, #4] 800b6b6: f001 f9d1 bl 800ca5c else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800b6ba: e02e b.n 800b71a USBD_CtlError(pdev, req); 800b6bc: 6839 ldr r1, [r7, #0] 800b6be: 6878 ldr r0, [r7, #4] 800b6c0: f001 f962 bl 800c988 ret = USBD_FAIL; 800b6c4: 2302 movs r3, #2 800b6c6: 75fb strb r3, [r7, #23] break; 800b6c8: e027 b.n 800b71a case USB_REQ_GET_INTERFACE: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800b6ca: 687b ldr r3, [r7, #4] 800b6cc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800b6d0: 2b03 cmp r3, #3 800b6d2: d107 bne.n 800b6e4 { USBD_CtlSendData(pdev, &ifalt, 1U); 800b6d4: f107 030f add.w r3, r7, #15 800b6d8: 2201 movs r2, #1 800b6da: 4619 mov r1, r3 800b6dc: 6878 ldr r0, [r7, #4] 800b6de: f001 f9bd bl 800ca5c else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800b6e2: e01a b.n 800b71a USBD_CtlError(pdev, req); 800b6e4: 6839 ldr r1, [r7, #0] 800b6e6: 6878 ldr r0, [r7, #4] 800b6e8: f001 f94e bl 800c988 ret = USBD_FAIL; 800b6ec: 2302 movs r3, #2 800b6ee: 75fb strb r3, [r7, #23] break; 800b6f0: e013 b.n 800b71a case USB_REQ_SET_INTERFACE: if (pdev->dev_state != USBD_STATE_CONFIGURED) 800b6f2: 687b ldr r3, [r7, #4] 800b6f4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800b6f8: 2b03 cmp r3, #3 800b6fa: d00d beq.n 800b718 { USBD_CtlError(pdev, req); 800b6fc: 6839 ldr r1, [r7, #0] 800b6fe: 6878 ldr r0, [r7, #4] 800b700: f001 f942 bl 800c988 ret = USBD_FAIL; 800b704: 2302 movs r3, #2 800b706: 75fb strb r3, [r7, #23] } break; 800b708: e006 b.n 800b718 default: USBD_CtlError(pdev, req); 800b70a: 6839 ldr r1, [r7, #0] 800b70c: 6878 ldr r0, [r7, #4] 800b70e: f001 f93b bl 800c988 ret = USBD_FAIL; 800b712: 2302 movs r3, #2 800b714: 75fb strb r3, [r7, #23] break; 800b716: e000 b.n 800b71a break; 800b718: bf00 nop } break; 800b71a: e006 b.n 800b72a default: USBD_CtlError(pdev, req); 800b71c: 6839 ldr r1, [r7, #0] 800b71e: 6878 ldr r0, [r7, #4] 800b720: f001 f932 bl 800c988 ret = USBD_FAIL; 800b724: 2302 movs r3, #2 800b726: 75fb strb r3, [r7, #23] break; 800b728: bf00 nop } return ret; 800b72a: 7dfb ldrb r3, [r7, #23] } 800b72c: 4618 mov r0, r3 800b72e: 3718 adds r7, #24 800b730: 46bd mov sp, r7 800b732: bd80 pop {r7, pc} 0800b734 : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { 800b734: b580 push {r7, lr} 800b736: b084 sub sp, #16 800b738: af00 add r7, sp, #0 800b73a: 6078 str r0, [r7, #4] 800b73c: 460b mov r3, r1 800b73e: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData; 800b740: 687b ldr r3, [r7, #4] 800b742: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b746: 60fb str r3, [r7, #12] PCD_HandleTypeDef *hpcd = pdev->pData; 800b748: 687b ldr r3, [r7, #4] 800b74a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b74e: 60bb str r3, [r7, #8] if (pdev->pClassData != NULL) 800b750: 687b ldr r3, [r7, #4] 800b752: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b756: 2b00 cmp r3, #0 800b758: d03a beq.n 800b7d0 { if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U)) 800b75a: 78fa ldrb r2, [r7, #3] 800b75c: 6879 ldr r1, [r7, #4] 800b75e: 4613 mov r3, r2 800b760: 009b lsls r3, r3, #2 800b762: 4413 add r3, r2 800b764: 009b lsls r3, r3, #2 800b766: 440b add r3, r1 800b768: 331c adds r3, #28 800b76a: 681b ldr r3, [r3, #0] 800b76c: 2b00 cmp r3, #0 800b76e: d029 beq.n 800b7c4 800b770: 78fa ldrb r2, [r7, #3] 800b772: 6879 ldr r1, [r7, #4] 800b774: 4613 mov r3, r2 800b776: 009b lsls r3, r3, #2 800b778: 4413 add r3, r2 800b77a: 009b lsls r3, r3, #2 800b77c: 440b add r3, r1 800b77e: 331c adds r3, #28 800b780: 681a ldr r2, [r3, #0] 800b782: 78f9 ldrb r1, [r7, #3] 800b784: 68b8 ldr r0, [r7, #8] 800b786: 460b mov r3, r1 800b788: 009b lsls r3, r3, #2 800b78a: 440b add r3, r1 800b78c: 00db lsls r3, r3, #3 800b78e: 4403 add r3, r0 800b790: 3320 adds r3, #32 800b792: 681b ldr r3, [r3, #0] 800b794: fbb2 f1f3 udiv r1, r2, r3 800b798: fb01 f303 mul.w r3, r1, r3 800b79c: 1ad3 subs r3, r2, r3 800b79e: 2b00 cmp r3, #0 800b7a0: d110 bne.n 800b7c4 { /* Update the packet total length */ pdev->ep_in[epnum].total_length = 0U; 800b7a2: 78fa ldrb r2, [r7, #3] 800b7a4: 6879 ldr r1, [r7, #4] 800b7a6: 4613 mov r3, r2 800b7a8: 009b lsls r3, r3, #2 800b7aa: 4413 add r3, r2 800b7ac: 009b lsls r3, r3, #2 800b7ae: 440b add r3, r1 800b7b0: 331c adds r3, #28 800b7b2: 2200 movs r2, #0 800b7b4: 601a str r2, [r3, #0] /* Send ZLP */ USBD_LL_Transmit(pdev, epnum, NULL, 0U); 800b7b6: 78f9 ldrb r1, [r7, #3] 800b7b8: 2300 movs r3, #0 800b7ba: 2200 movs r2, #0 800b7bc: 6878 ldr r0, [r7, #4] 800b7be: f001 fe45 bl 800d44c 800b7c2: e003 b.n 800b7cc } else { hcdc->TxState = 0U; 800b7c4: 68fb ldr r3, [r7, #12] 800b7c6: 2200 movs r2, #0 800b7c8: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } return USBD_OK; 800b7cc: 2300 movs r3, #0 800b7ce: e000 b.n 800b7d2 } else { return USBD_FAIL; 800b7d0: 2302 movs r3, #2 } } 800b7d2: 4618 mov r0, r3 800b7d4: 3710 adds r7, #16 800b7d6: 46bd mov sp, r7 800b7d8: bd80 pop {r7, pc} 0800b7da : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum) { 800b7da: b580 push {r7, lr} 800b7dc: b084 sub sp, #16 800b7de: af00 add r7, sp, #0 800b7e0: 6078 str r0, [r7, #4] 800b7e2: 460b mov r3, r1 800b7e4: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b7e6: 687b ldr r3, [r7, #4] 800b7e8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b7ec: 60fb str r3, [r7, #12] /* Get the received data length */ hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum); 800b7ee: 78fb ldrb r3, [r7, #3] 800b7f0: 4619 mov r1, r3 800b7f2: 6878 ldr r0, [r7, #4] 800b7f4: f001 fe70 bl 800d4d8 800b7f8: 4602 mov r2, r0 800b7fa: 68fb ldr r3, [r7, #12] 800b7fc: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* USB data will be immediately processed, this allow next USB traffic being NAKed till the end of the application Xfer */ if (pdev->pClassData != NULL) 800b800: 687b ldr r3, [r7, #4] 800b802: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b806: 2b00 cmp r3, #0 800b808: d00d beq.n 800b826 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength); 800b80a: 687b ldr r3, [r7, #4] 800b80c: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b810: 68db ldr r3, [r3, #12] 800b812: 68fa ldr r2, [r7, #12] 800b814: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204 800b818: 68fa ldr r2, [r7, #12] 800b81a: f502 7203 add.w r2, r2, #524 @ 0x20c 800b81e: 4611 mov r1, r2 800b820: 4798 blx r3 return USBD_OK; 800b822: 2300 movs r3, #0 800b824: e000 b.n 800b828 } else { return USBD_FAIL; 800b826: 2302 movs r3, #2 } } 800b828: 4618 mov r0, r3 800b82a: 3710 adds r7, #16 800b82c: 46bd mov sp, r7 800b82e: bd80 pop {r7, pc} 0800b830 : * Handle EP0 Rx Ready event * @param pdev: device instance * @retval status */ static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev) { 800b830: b580 push {r7, lr} 800b832: b084 sub sp, #16 800b834: af00 add r7, sp, #0 800b836: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b838: 687b ldr r3, [r7, #4] 800b83a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b83e: 60fb str r3, [r7, #12] if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU)) 800b840: 687b ldr r3, [r7, #4] 800b842: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b846: 2b00 cmp r3, #0 800b848: d014 beq.n 800b874 800b84a: 68fb ldr r3, [r7, #12] 800b84c: f893 3200 ldrb.w r3, [r3, #512] @ 0x200 800b850: 2bff cmp r3, #255 @ 0xff 800b852: d00f beq.n 800b874 { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 800b854: 687b ldr r3, [r7, #4] 800b856: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800b85a: 689b ldr r3, [r3, #8] 800b85c: 68fa ldr r2, [r7, #12] 800b85e: f892 0200 ldrb.w r0, [r2, #512] @ 0x200 (uint8_t *)(void *)hcdc->data, 800b862: 68f9 ldr r1, [r7, #12] (uint16_t)hcdc->CmdLength); 800b864: 68fa ldr r2, [r7, #12] 800b866: f892 2201 ldrb.w r2, [r2, #513] @ 0x201 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 800b86a: 4798 blx r3 hcdc->CmdOpCode = 0xFFU; 800b86c: 68fb ldr r3, [r7, #12] 800b86e: 22ff movs r2, #255 @ 0xff 800b870: f883 2200 strb.w r2, [r3, #512] @ 0x200 } return USBD_OK; 800b874: 2300 movs r3, #0 } 800b876: 4618 mov r0, r3 800b878: 3710 adds r7, #16 800b87a: 46bd mov sp, r7 800b87c: bd80 pop {r7, pc} ... 0800b880 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length) { 800b880: b480 push {r7} 800b882: b083 sub sp, #12 800b884: af00 add r7, sp, #0 800b886: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgFSDesc); 800b888: 687b ldr r3, [r7, #4] 800b88a: 2243 movs r2, #67 @ 0x43 800b88c: 801a strh r2, [r3, #0] return USBD_CDC_CfgFSDesc; 800b88e: 4b03 ldr r3, [pc, #12] @ (800b89c ) } 800b890: 4618 mov r0, r3 800b892: 370c adds r7, #12 800b894: 46bd mov sp, r7 800b896: bc80 pop {r7} 800b898: 4770 bx lr 800b89a: bf00 nop 800b89c: 2000009c .word 0x2000009c 0800b8a0 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length) { 800b8a0: b480 push {r7} 800b8a2: b083 sub sp, #12 800b8a4: af00 add r7, sp, #0 800b8a6: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgHSDesc); 800b8a8: 687b ldr r3, [r7, #4] 800b8aa: 2243 movs r2, #67 @ 0x43 800b8ac: 801a strh r2, [r3, #0] return USBD_CDC_CfgHSDesc; 800b8ae: 4b03 ldr r3, [pc, #12] @ (800b8bc ) } 800b8b0: 4618 mov r0, r3 800b8b2: 370c adds r7, #12 800b8b4: 46bd mov sp, r7 800b8b6: bc80 pop {r7} 800b8b8: 4770 bx lr 800b8ba: bf00 nop 800b8bc: 20000058 .word 0x20000058 0800b8c0 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length) { 800b8c0: b480 push {r7} 800b8c2: b083 sub sp, #12 800b8c4: af00 add r7, sp, #0 800b8c6: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_OtherSpeedCfgDesc); 800b8c8: 687b ldr r3, [r7, #4] 800b8ca: 2243 movs r2, #67 @ 0x43 800b8cc: 801a strh r2, [r3, #0] return USBD_CDC_OtherSpeedCfgDesc; 800b8ce: 4b03 ldr r3, [pc, #12] @ (800b8dc ) } 800b8d0: 4618 mov r0, r3 800b8d2: 370c adds r7, #12 800b8d4: 46bd mov sp, r7 800b8d6: bc80 pop {r7} 800b8d8: 4770 bx lr 800b8da: bf00 nop 800b8dc: 200000e0 .word 0x200000e0 0800b8e0 : * return Device Qualifier descriptor * @param length : pointer data length * @retval pointer to descriptor buffer */ uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length) { 800b8e0: b480 push {r7} 800b8e2: b083 sub sp, #12 800b8e4: af00 add r7, sp, #0 800b8e6: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_DeviceQualifierDesc); 800b8e8: 687b ldr r3, [r7, #4] 800b8ea: 220a movs r2, #10 800b8ec: 801a strh r2, [r3, #0] return USBD_CDC_DeviceQualifierDesc; 800b8ee: 4b03 ldr r3, [pc, #12] @ (800b8fc ) } 800b8f0: 4618 mov r0, r3 800b8f2: 370c adds r7, #12 800b8f4: 46bd mov sp, r7 800b8f6: bc80 pop {r7} 800b8f8: 4770 bx lr 800b8fa: bf00 nop 800b8fc: 20000014 .word 0x20000014 0800b900 : * @param fops: CD Interface callback * @retval status */ uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev, USBD_CDC_ItfTypeDef *fops) { 800b900: b480 push {r7} 800b902: b085 sub sp, #20 800b904: af00 add r7, sp, #0 800b906: 6078 str r0, [r7, #4] 800b908: 6039 str r1, [r7, #0] uint8_t ret = USBD_FAIL; 800b90a: 2302 movs r3, #2 800b90c: 73fb strb r3, [r7, #15] if (fops != NULL) 800b90e: 683b ldr r3, [r7, #0] 800b910: 2b00 cmp r3, #0 800b912: d005 beq.n 800b920 { pdev->pUserData = fops; 800b914: 687b ldr r3, [r7, #4] 800b916: 683a ldr r2, [r7, #0] 800b918: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc ret = USBD_OK; 800b91c: 2300 movs r3, #0 800b91e: 73fb strb r3, [r7, #15] } return ret; 800b920: 7bfb ldrb r3, [r7, #15] } 800b922: 4618 mov r0, r3 800b924: 3714 adds r7, #20 800b926: 46bd mov sp, r7 800b928: bc80 pop {r7} 800b92a: 4770 bx lr 0800b92c : * @retval status */ uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff, uint16_t length) { 800b92c: b480 push {r7} 800b92e: b087 sub sp, #28 800b930: af00 add r7, sp, #0 800b932: 60f8 str r0, [r7, #12] 800b934: 60b9 str r1, [r7, #8] 800b936: 4613 mov r3, r2 800b938: 80fb strh r3, [r7, #6] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b93a: 68fb ldr r3, [r7, #12] 800b93c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b940: 617b str r3, [r7, #20] hcdc->TxBuffer = pbuff; 800b942: 697b ldr r3, [r7, #20] 800b944: 68ba ldr r2, [r7, #8] 800b946: f8c3 2208 str.w r2, [r3, #520] @ 0x208 hcdc->TxLength = length; 800b94a: 88fa ldrh r2, [r7, #6] 800b94c: 697b ldr r3, [r7, #20] 800b94e: f8c3 2210 str.w r2, [r3, #528] @ 0x210 return USBD_OK; 800b952: 2300 movs r3, #0 } 800b954: 4618 mov r0, r3 800b956: 371c adds r7, #28 800b958: 46bd mov sp, r7 800b95a: bc80 pop {r7} 800b95c: 4770 bx lr 0800b95e : * @param pbuff: Rx Buffer * @retval status */ uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff) { 800b95e: b480 push {r7} 800b960: b085 sub sp, #20 800b962: af00 add r7, sp, #0 800b964: 6078 str r0, [r7, #4] 800b966: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b968: 687b ldr r3, [r7, #4] 800b96a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b96e: 60fb str r3, [r7, #12] hcdc->RxBuffer = pbuff; 800b970: 68fb ldr r3, [r7, #12] 800b972: 683a ldr r2, [r7, #0] 800b974: f8c3 2204 str.w r2, [r3, #516] @ 0x204 return USBD_OK; 800b978: 2300 movs r3, #0 } 800b97a: 4618 mov r0, r3 800b97c: 3714 adds r7, #20 800b97e: 46bd mov sp, r7 800b980: bc80 pop {r7} 800b982: 4770 bx lr 0800b984 : * Transmit packet on IN endpoint * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev) { 800b984: b580 push {r7, lr} 800b986: b084 sub sp, #16 800b988: af00 add r7, sp, #0 800b98a: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b98c: 687b ldr r3, [r7, #4] 800b98e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b992: 60fb str r3, [r7, #12] if (pdev->pClassData != NULL) 800b994: 687b ldr r3, [r7, #4] 800b996: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b99a: 2b00 cmp r3, #0 800b99c: d01c beq.n 800b9d8 { if (hcdc->TxState == 0U) 800b99e: 68fb ldr r3, [r7, #12] 800b9a0: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 800b9a4: 2b00 cmp r3, #0 800b9a6: d115 bne.n 800b9d4 { /* Tx Transfer in progress */ hcdc->TxState = 1U; 800b9a8: 68fb ldr r3, [r7, #12] 800b9aa: 2201 movs r2, #1 800b9ac: f8c3 2214 str.w r2, [r3, #532] @ 0x214 /* Update the packet total length */ pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength; 800b9b0: 68fb ldr r3, [r7, #12] 800b9b2: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210 800b9b6: 687b ldr r3, [r7, #4] 800b9b8: 631a str r2, [r3, #48] @ 0x30 /* Transmit next packet */ USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 800b9ba: 68fb ldr r3, [r7, #12] 800b9bc: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208 (uint16_t)hcdc->TxLength); 800b9c0: 68fb ldr r3, [r7, #12] 800b9c2: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210 USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 800b9c6: b29b uxth r3, r3 800b9c8: 2181 movs r1, #129 @ 0x81 800b9ca: 6878 ldr r0, [r7, #4] 800b9cc: f001 fd3e bl 800d44c return USBD_OK; 800b9d0: 2300 movs r3, #0 800b9d2: e002 b.n 800b9da } else { return USBD_BUSY; 800b9d4: 2301 movs r3, #1 800b9d6: e000 b.n 800b9da } } else { return USBD_FAIL; 800b9d8: 2302 movs r3, #2 } } 800b9da: 4618 mov r0, r3 800b9dc: 3710 adds r7, #16 800b9de: 46bd mov sp, r7 800b9e0: bd80 pop {r7, pc} 0800b9e2 : * prepare OUT Endpoint for reception * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev) { 800b9e2: b580 push {r7, lr} 800b9e4: b084 sub sp, #16 800b9e6: af00 add r7, sp, #0 800b9e8: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 800b9ea: 687b ldr r3, [r7, #4] 800b9ec: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b9f0: 60fb str r3, [r7, #12] /* Suspend or Resume USB Out process */ if (pdev->pClassData != NULL) 800b9f2: 687b ldr r3, [r7, #4] 800b9f4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800b9f8: 2b00 cmp r3, #0 800b9fa: d017 beq.n 800ba2c { if (pdev->dev_speed == USBD_SPEED_HIGH) 800b9fc: 687b ldr r3, [r7, #4] 800b9fe: 7c1b ldrb r3, [r3, #16] 800ba00: 2b00 cmp r3, #0 800ba02: d109 bne.n 800ba18 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 800ba04: 68fb ldr r3, [r7, #12] 800ba06: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800ba0a: f44f 7300 mov.w r3, #512 @ 0x200 800ba0e: 2101 movs r1, #1 800ba10: 6878 ldr r0, [r7, #4] 800ba12: f001 fd3e bl 800d492 800ba16: e007 b.n 800ba28 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 800ba18: 68fb ldr r3, [r7, #12] 800ba1a: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 800ba1e: 2340 movs r3, #64 @ 0x40 800ba20: 2101 movs r1, #1 800ba22: 6878 ldr r0, [r7, #4] 800ba24: f001 fd35 bl 800d492 CDC_OUT_EP, hcdc->RxBuffer, CDC_DATA_FS_OUT_PACKET_SIZE); } return USBD_OK; 800ba28: 2300 movs r3, #0 800ba2a: e000 b.n 800ba2e } else { return USBD_FAIL; 800ba2c: 2302 movs r3, #2 } } 800ba2e: 4618 mov r0, r3 800ba30: 3710 adds r7, #16 800ba32: 46bd mov sp, r7 800ba34: bd80 pop {r7, pc} 0800ba36 : * @param id: Low level core index * @retval None */ USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) { 800ba36: b580 push {r7, lr} 800ba38: b084 sub sp, #16 800ba3a: af00 add r7, sp, #0 800ba3c: 60f8 str r0, [r7, #12] 800ba3e: 60b9 str r1, [r7, #8] 800ba40: 4613 mov r3, r2 800ba42: 71fb strb r3, [r7, #7] /* Check whether the USB Host handle is valid */ if (pdev == NULL) 800ba44: 68fb ldr r3, [r7, #12] 800ba46: 2b00 cmp r3, #0 800ba48: d101 bne.n 800ba4e { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Device handle"); #endif return USBD_FAIL; 800ba4a: 2302 movs r3, #2 800ba4c: e01a b.n 800ba84 } /* Unlink previous class*/ if (pdev->pClass != NULL) 800ba4e: 68fb ldr r3, [r7, #12] 800ba50: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800ba54: 2b00 cmp r3, #0 800ba56: d003 beq.n 800ba60 { pdev->pClass = NULL; 800ba58: 68fb ldr r3, [r7, #12] 800ba5a: 2200 movs r2, #0 800ba5c: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 } /* Assign USBD Descriptors */ if (pdesc != NULL) 800ba60: 68bb ldr r3, [r7, #8] 800ba62: 2b00 cmp r3, #0 800ba64: d003 beq.n 800ba6e { pdev->pDesc = pdesc; 800ba66: 68fb ldr r3, [r7, #12] 800ba68: 68ba ldr r2, [r7, #8] 800ba6a: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0 } /* Set Device initial State */ pdev->dev_state = USBD_STATE_DEFAULT; 800ba6e: 68fb ldr r3, [r7, #12] 800ba70: 2201 movs r2, #1 800ba72: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->id = id; 800ba76: 68fb ldr r3, [r7, #12] 800ba78: 79fa ldrb r2, [r7, #7] 800ba7a: 701a strb r2, [r3, #0] /* Initialize low level driver */ USBD_LL_Init(pdev); 800ba7c: 68f8 ldr r0, [r7, #12] 800ba7e: f001 fba3 bl 800d1c8 return USBD_OK; 800ba82: 2300 movs r3, #0 } 800ba84: 4618 mov r0, r3 800ba86: 3710 adds r7, #16 800ba88: 46bd mov sp, r7 800ba8a: bd80 pop {r7, pc} 0800ba8c : * @param pDevice : Device Handle * @param pclass: Class handle * @retval USBD Status */ USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) { 800ba8c: b480 push {r7} 800ba8e: b085 sub sp, #20 800ba90: af00 add r7, sp, #0 800ba92: 6078 str r0, [r7, #4] 800ba94: 6039 str r1, [r7, #0] USBD_StatusTypeDef status = USBD_OK; 800ba96: 2300 movs r3, #0 800ba98: 73fb strb r3, [r7, #15] if (pclass != NULL) 800ba9a: 683b ldr r3, [r7, #0] 800ba9c: 2b00 cmp r3, #0 800ba9e: d006 beq.n 800baae { /* link the class to the USB Device handle */ pdev->pClass = pclass; 800baa0: 687b ldr r3, [r7, #4] 800baa2: 683a ldr r2, [r7, #0] 800baa4: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 status = USBD_OK; 800baa8: 2300 movs r3, #0 800baaa: 73fb strb r3, [r7, #15] 800baac: e001 b.n 800bab2 else { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Class handle"); #endif status = USBD_FAIL; 800baae: 2302 movs r3, #2 800bab0: 73fb strb r3, [r7, #15] } return status; 800bab2: 7bfb ldrb r3, [r7, #15] } 800bab4: 4618 mov r0, r3 800bab6: 3714 adds r7, #20 800bab8: 46bd mov sp, r7 800baba: bc80 pop {r7} 800babc: 4770 bx lr 0800babe : * Start the USB Device Core. * @param pdev: Device Handle * @retval USBD Status */ USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev) { 800babe: b580 push {r7, lr} 800bac0: b082 sub sp, #8 800bac2: af00 add r7, sp, #0 800bac4: 6078 str r0, [r7, #4] /* Start the low level driver */ USBD_LL_Start(pdev); 800bac6: 6878 ldr r0, [r7, #4] 800bac8: f001 fbd8 bl 800d27c return USBD_OK; 800bacc: 2300 movs r3, #0 } 800bace: 4618 mov r0, r3 800bad0: 3708 adds r7, #8 800bad2: 46bd mov sp, r7 800bad4: bd80 pop {r7, pc} 0800bad6 : * Launch test mode process * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev) { 800bad6: b480 push {r7} 800bad8: b083 sub sp, #12 800bada: af00 add r7, sp, #0 800badc: 6078 str r0, [r7, #4] /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 800bade: 2300 movs r3, #0 } 800bae0: 4618 mov r0, r3 800bae2: 370c adds r7, #12 800bae4: 46bd mov sp, r7 800bae6: bc80 pop {r7} 800bae8: 4770 bx lr 0800baea : * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800baea: b580 push {r7, lr} 800baec: b084 sub sp, #16 800baee: af00 add r7, sp, #0 800baf0: 6078 str r0, [r7, #4] 800baf2: 460b mov r3, r1 800baf4: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_FAIL; 800baf6: 2302 movs r3, #2 800baf8: 73fb strb r3, [r7, #15] if (pdev->pClass != NULL) 800bafa: 687b ldr r3, [r7, #4] 800bafc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bb00: 2b00 cmp r3, #0 800bb02: d00c beq.n 800bb1e { /* Set configuration and Start the Class*/ if (pdev->pClass->Init(pdev, cfgidx) == 0U) 800bb04: 687b ldr r3, [r7, #4] 800bb06: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bb0a: 681b ldr r3, [r3, #0] 800bb0c: 78fa ldrb r2, [r7, #3] 800bb0e: 4611 mov r1, r2 800bb10: 6878 ldr r0, [r7, #4] 800bb12: 4798 blx r3 800bb14: 4603 mov r3, r0 800bb16: 2b00 cmp r3, #0 800bb18: d101 bne.n 800bb1e { ret = USBD_OK; 800bb1a: 2300 movs r3, #0 800bb1c: 73fb strb r3, [r7, #15] } } return ret; 800bb1e: 7bfb ldrb r3, [r7, #15] } 800bb20: 4618 mov r0, r3 800bb22: 3710 adds r7, #16 800bb24: 46bd mov sp, r7 800bb26: bd80 pop {r7, pc} 0800bb28 : * @param pdev: device instance * @param cfgidx: configuration index * @retval status: USBD_StatusTypeDef */ USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800bb28: b580 push {r7, lr} 800bb2a: b082 sub sp, #8 800bb2c: af00 add r7, sp, #0 800bb2e: 6078 str r0, [r7, #4] 800bb30: 460b mov r3, r1 800bb32: 70fb strb r3, [r7, #3] /* Clear configuration and De-initialize the Class process*/ pdev->pClass->DeInit(pdev, cfgidx); 800bb34: 687b ldr r3, [r7, #4] 800bb36: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bb3a: 685b ldr r3, [r3, #4] 800bb3c: 78fa ldrb r2, [r7, #3] 800bb3e: 4611 mov r1, r2 800bb40: 6878 ldr r0, [r7, #4] 800bb42: 4798 blx r3 return USBD_OK; 800bb44: 2300 movs r3, #0 } 800bb46: 4618 mov r0, r3 800bb48: 3708 adds r7, #8 800bb4a: 46bd mov sp, r7 800bb4c: bd80 pop {r7, pc} 0800bb4e : * Handle the setup stage * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) { 800bb4e: b580 push {r7, lr} 800bb50: b082 sub sp, #8 800bb52: af00 add r7, sp, #0 800bb54: 6078 str r0, [r7, #4] 800bb56: 6039 str r1, [r7, #0] USBD_ParseSetupRequest(&pdev->request, psetup); 800bb58: 687b ldr r3, [r7, #4] 800bb5a: f503 732a add.w r3, r3, #680 @ 0x2a8 800bb5e: 6839 ldr r1, [r7, #0] 800bb60: 4618 mov r0, r3 800bb62: f000 fed8 bl 800c916 pdev->ep0_state = USBD_EP0_SETUP; 800bb66: 687b ldr r3, [r7, #4] 800bb68: 2201 movs r2, #1 800bb6a: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep0_data_len = pdev->request.wLength; 800bb6e: 687b ldr r3, [r7, #4] 800bb70: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 800bb74: 461a mov r2, r3 800bb76: 687b ldr r3, [r7, #4] 800bb78: f8c3 2298 str.w r2, [r3, #664] @ 0x298 switch (pdev->request.bmRequest & 0x1FU) 800bb7c: 687b ldr r3, [r7, #4] 800bb7e: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 800bb82: f003 031f and.w r3, r3, #31 800bb86: 2b02 cmp r3, #2 800bb88: d016 beq.n 800bbb8 800bb8a: 2b02 cmp r3, #2 800bb8c: d81c bhi.n 800bbc8 800bb8e: 2b00 cmp r3, #0 800bb90: d002 beq.n 800bb98 800bb92: 2b01 cmp r3, #1 800bb94: d008 beq.n 800bba8 800bb96: e017 b.n 800bbc8 { case USB_REQ_RECIPIENT_DEVICE: USBD_StdDevReq(pdev, &pdev->request); 800bb98: 687b ldr r3, [r7, #4] 800bb9a: f503 732a add.w r3, r3, #680 @ 0x2a8 800bb9e: 4619 mov r1, r3 800bba0: 6878 ldr r0, [r7, #4] 800bba2: f000 f9cb bl 800bf3c break; 800bba6: e01a b.n 800bbde case USB_REQ_RECIPIENT_INTERFACE: USBD_StdItfReq(pdev, &pdev->request); 800bba8: 687b ldr r3, [r7, #4] 800bbaa: f503 732a add.w r3, r3, #680 @ 0x2a8 800bbae: 4619 mov r1, r3 800bbb0: 6878 ldr r0, [r7, #4] 800bbb2: f000 fa2d bl 800c010 break; 800bbb6: e012 b.n 800bbde case USB_REQ_RECIPIENT_ENDPOINT: USBD_StdEPReq(pdev, &pdev->request); 800bbb8: 687b ldr r3, [r7, #4] 800bbba: f503 732a add.w r3, r3, #680 @ 0x2a8 800bbbe: 4619 mov r1, r3 800bbc0: 6878 ldr r0, [r7, #4] 800bbc2: f000 fa6d bl 800c0a0 break; 800bbc6: e00a b.n 800bbde default: USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U)); 800bbc8: 687b ldr r3, [r7, #4] 800bbca: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 800bbce: f023 037f bic.w r3, r3, #127 @ 0x7f 800bbd2: b2db uxtb r3, r3 800bbd4: 4619 mov r1, r3 800bbd6: 6878 ldr r0, [r7, #4] 800bbd8: f001 fbb0 bl 800d33c break; 800bbdc: bf00 nop } return USBD_OK; 800bbde: 2300 movs r3, #0 } 800bbe0: 4618 mov r0, r3 800bbe2: 3708 adds r7, #8 800bbe4: 46bd mov sp, r7 800bbe6: bd80 pop {r7, pc} 0800bbe8 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 800bbe8: b580 push {r7, lr} 800bbea: b086 sub sp, #24 800bbec: af00 add r7, sp, #0 800bbee: 60f8 str r0, [r7, #12] 800bbf0: 460b mov r3, r1 800bbf2: 607a str r2, [r7, #4] 800bbf4: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 800bbf6: 7afb ldrb r3, [r7, #11] 800bbf8: 2b00 cmp r3, #0 800bbfa: d14b bne.n 800bc94 { pep = &pdev->ep_out[0]; 800bbfc: 68fb ldr r3, [r7, #12] 800bbfe: f503 73aa add.w r3, r3, #340 @ 0x154 800bc02: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_OUT) 800bc04: 68fb ldr r3, [r7, #12] 800bc06: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800bc0a: 2b03 cmp r3, #3 800bc0c: d134 bne.n 800bc78 { if (pep->rem_length > pep->maxpacket) 800bc0e: 697b ldr r3, [r7, #20] 800bc10: 68da ldr r2, [r3, #12] 800bc12: 697b ldr r3, [r7, #20] 800bc14: 691b ldr r3, [r3, #16] 800bc16: 429a cmp r2, r3 800bc18: d919 bls.n 800bc4e { pep->rem_length -= pep->maxpacket; 800bc1a: 697b ldr r3, [r7, #20] 800bc1c: 68da ldr r2, [r3, #12] 800bc1e: 697b ldr r3, [r7, #20] 800bc20: 691b ldr r3, [r3, #16] 800bc22: 1ad2 subs r2, r2, r3 800bc24: 697b ldr r3, [r7, #20] 800bc26: 60da str r2, [r3, #12] USBD_CtlContinueRx(pdev, pdata, (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800bc28: 697b ldr r3, [r7, #20] 800bc2a: 68da ldr r2, [r3, #12] 800bc2c: 697b ldr r3, [r7, #20] 800bc2e: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 800bc30: 429a cmp r2, r3 800bc32: d203 bcs.n 800bc3c (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800bc34: 697b ldr r3, [r7, #20] 800bc36: 68db ldr r3, [r3, #12] USBD_CtlContinueRx(pdev, pdata, 800bc38: b29b uxth r3, r3 800bc3a: e002 b.n 800bc42 (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 800bc3c: 697b ldr r3, [r7, #20] 800bc3e: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 800bc40: b29b uxth r3, r3 800bc42: 461a mov r2, r3 800bc44: 6879 ldr r1, [r7, #4] 800bc46: 68f8 ldr r0, [r7, #12] 800bc48: f000 ff54 bl 800caf4 800bc4c: e038 b.n 800bcc0 } else { if ((pdev->pClass->EP0_RxReady != NULL) && 800bc4e: 68fb ldr r3, [r7, #12] 800bc50: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bc54: 691b ldr r3, [r3, #16] 800bc56: 2b00 cmp r3, #0 800bc58: d00a beq.n 800bc70 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800bc5a: 68fb ldr r3, [r7, #12] 800bc5c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_RxReady != NULL) && 800bc60: 2b03 cmp r3, #3 800bc62: d105 bne.n 800bc70 { pdev->pClass->EP0_RxReady(pdev); 800bc64: 68fb ldr r3, [r7, #12] 800bc66: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bc6a: 691b ldr r3, [r3, #16] 800bc6c: 68f8 ldr r0, [r7, #12] 800bc6e: 4798 blx r3 } USBD_CtlSendStatus(pdev); 800bc70: 68f8 ldr r0, [r7, #12] 800bc72: f000 ff51 bl 800cb18 800bc76: e023 b.n 800bcc0 } } else { if (pdev->ep0_state == USBD_EP0_STATUS_OUT) 800bc78: 68fb ldr r3, [r7, #12] 800bc7a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800bc7e: 2b05 cmp r3, #5 800bc80: d11e bne.n 800bcc0 { /* * STATUS PHASE completed, update ep0_state to idle */ pdev->ep0_state = USBD_EP0_IDLE; 800bc82: 68fb ldr r3, [r7, #12] 800bc84: 2200 movs r2, #0 800bc86: f8c3 2294 str.w r2, [r3, #660] @ 0x294 USBD_LL_StallEP(pdev, 0U); 800bc8a: 2100 movs r1, #0 800bc8c: 68f8 ldr r0, [r7, #12] 800bc8e: f001 fb55 bl 800d33c 800bc92: e015 b.n 800bcc0 } } } else if ((pdev->pClass->DataOut != NULL) && 800bc94: 68fb ldr r3, [r7, #12] 800bc96: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bc9a: 699b ldr r3, [r3, #24] 800bc9c: 2b00 cmp r3, #0 800bc9e: d00d beq.n 800bcbc (pdev->dev_state == USBD_STATE_CONFIGURED)) 800bca0: 68fb ldr r3, [r7, #12] 800bca2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataOut != NULL) && 800bca6: 2b03 cmp r3, #3 800bca8: d108 bne.n 800bcbc { pdev->pClass->DataOut(pdev, epnum); 800bcaa: 68fb ldr r3, [r7, #12] 800bcac: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bcb0: 699b ldr r3, [r3, #24] 800bcb2: 7afa ldrb r2, [r7, #11] 800bcb4: 4611 mov r1, r2 800bcb6: 68f8 ldr r0, [r7, #12] 800bcb8: 4798 blx r3 800bcba: e001 b.n 800bcc0 } else { /* should never be in this condition */ return USBD_FAIL; 800bcbc: 2302 movs r3, #2 800bcbe: e000 b.n 800bcc2 } return USBD_OK; 800bcc0: 2300 movs r3, #0 } 800bcc2: 4618 mov r0, r3 800bcc4: 3718 adds r7, #24 800bcc6: 46bd mov sp, r7 800bcc8: bd80 pop {r7, pc} 0800bcca : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 800bcca: b580 push {r7, lr} 800bccc: b086 sub sp, #24 800bcce: af00 add r7, sp, #0 800bcd0: 60f8 str r0, [r7, #12] 800bcd2: 460b mov r3, r1 800bcd4: 607a str r2, [r7, #4] 800bcd6: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 800bcd8: 7afb ldrb r3, [r7, #11] 800bcda: 2b00 cmp r3, #0 800bcdc: d17f bne.n 800bdde { pep = &pdev->ep_in[0]; 800bcde: 68fb ldr r3, [r7, #12] 800bce0: 3314 adds r3, #20 800bce2: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_IN) 800bce4: 68fb ldr r3, [r7, #12] 800bce6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800bcea: 2b02 cmp r3, #2 800bcec: d15c bne.n 800bda8 { if (pep->rem_length > pep->maxpacket) 800bcee: 697b ldr r3, [r7, #20] 800bcf0: 68da ldr r2, [r3, #12] 800bcf2: 697b ldr r3, [r7, #20] 800bcf4: 691b ldr r3, [r3, #16] 800bcf6: 429a cmp r2, r3 800bcf8: d915 bls.n 800bd26 { pep->rem_length -= pep->maxpacket; 800bcfa: 697b ldr r3, [r7, #20] 800bcfc: 68da ldr r2, [r3, #12] 800bcfe: 697b ldr r3, [r7, #20] 800bd00: 691b ldr r3, [r3, #16] 800bd02: 1ad2 subs r2, r2, r3 800bd04: 697b ldr r3, [r7, #20] 800bd06: 60da str r2, [r3, #12] USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length); 800bd08: 697b ldr r3, [r7, #20] 800bd0a: 68db ldr r3, [r3, #12] 800bd0c: b29b uxth r3, r3 800bd0e: 461a mov r2, r3 800bd10: 6879 ldr r1, [r7, #4] 800bd12: 68f8 ldr r0, [r7, #12] 800bd14: f000 febe bl 800ca94 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800bd18: 2300 movs r3, #0 800bd1a: 2200 movs r2, #0 800bd1c: 2100 movs r1, #0 800bd1e: 68f8 ldr r0, [r7, #12] 800bd20: f001 fbb7 bl 800d492 800bd24: e04e b.n 800bdc4 } else { /* last packet is MPS multiple, so send ZLP packet */ if ((pep->total_length % pep->maxpacket == 0U) && 800bd26: 697b ldr r3, [r7, #20] 800bd28: 689b ldr r3, [r3, #8] 800bd2a: 697a ldr r2, [r7, #20] 800bd2c: 6912 ldr r2, [r2, #16] 800bd2e: fbb3 f1f2 udiv r1, r3, r2 800bd32: fb01 f202 mul.w r2, r1, r2 800bd36: 1a9b subs r3, r3, r2 800bd38: 2b00 cmp r3, #0 800bd3a: d11c bne.n 800bd76 (pep->total_length >= pep->maxpacket) && 800bd3c: 697b ldr r3, [r7, #20] 800bd3e: 689a ldr r2, [r3, #8] 800bd40: 697b ldr r3, [r7, #20] 800bd42: 691b ldr r3, [r3, #16] if ((pep->total_length % pep->maxpacket == 0U) && 800bd44: 429a cmp r2, r3 800bd46: d316 bcc.n 800bd76 (pep->total_length < pdev->ep0_data_len)) 800bd48: 697b ldr r3, [r7, #20] 800bd4a: 689a ldr r2, [r3, #8] 800bd4c: 68fb ldr r3, [r7, #12] 800bd4e: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298 (pep->total_length >= pep->maxpacket) && 800bd52: 429a cmp r2, r3 800bd54: d20f bcs.n 800bd76 { USBD_CtlContinueSendData(pdev, NULL, 0U); 800bd56: 2200 movs r2, #0 800bd58: 2100 movs r1, #0 800bd5a: 68f8 ldr r0, [r7, #12] 800bd5c: f000 fe9a bl 800ca94 pdev->ep0_data_len = 0U; 800bd60: 68fb ldr r3, [r7, #12] 800bd62: 2200 movs r2, #0 800bd64: f8c3 2298 str.w r2, [r3, #664] @ 0x298 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800bd68: 2300 movs r3, #0 800bd6a: 2200 movs r2, #0 800bd6c: 2100 movs r1, #0 800bd6e: 68f8 ldr r0, [r7, #12] 800bd70: f001 fb8f bl 800d492 800bd74: e026 b.n 800bdc4 } else { if ((pdev->pClass->EP0_TxSent != NULL) && 800bd76: 68fb ldr r3, [r7, #12] 800bd78: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bd7c: 68db ldr r3, [r3, #12] 800bd7e: 2b00 cmp r3, #0 800bd80: d00a beq.n 800bd98 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800bd82: 68fb ldr r3, [r7, #12] 800bd84: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_TxSent != NULL) && 800bd88: 2b03 cmp r3, #3 800bd8a: d105 bne.n 800bd98 { pdev->pClass->EP0_TxSent(pdev); 800bd8c: 68fb ldr r3, [r7, #12] 800bd8e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bd92: 68db ldr r3, [r3, #12] 800bd94: 68f8 ldr r0, [r7, #12] 800bd96: 4798 blx r3 } USBD_LL_StallEP(pdev, 0x80U); 800bd98: 2180 movs r1, #128 @ 0x80 800bd9a: 68f8 ldr r0, [r7, #12] 800bd9c: f001 face bl 800d33c USBD_CtlReceiveStatus(pdev); 800bda0: 68f8 ldr r0, [r7, #12] 800bda2: f000 fecc bl 800cb3e 800bda6: e00d b.n 800bdc4 } } } else { if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 800bda8: 68fb ldr r3, [r7, #12] 800bdaa: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800bdae: 2b04 cmp r3, #4 800bdb0: d004 beq.n 800bdbc (pdev->ep0_state == USBD_EP0_IDLE)) 800bdb2: 68fb ldr r3, [r7, #12] 800bdb4: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 800bdb8: 2b00 cmp r3, #0 800bdba: d103 bne.n 800bdc4 { USBD_LL_StallEP(pdev, 0x80U); 800bdbc: 2180 movs r1, #128 @ 0x80 800bdbe: 68f8 ldr r0, [r7, #12] 800bdc0: f001 fabc bl 800d33c } } if (pdev->dev_test_mode == 1U) 800bdc4: 68fb ldr r3, [r7, #12] 800bdc6: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0 800bdca: 2b01 cmp r3, #1 800bdcc: d11d bne.n 800be0a { USBD_RunTestMode(pdev); 800bdce: 68f8 ldr r0, [r7, #12] 800bdd0: f7ff fe81 bl 800bad6 pdev->dev_test_mode = 0U; 800bdd4: 68fb ldr r3, [r7, #12] 800bdd6: 2200 movs r2, #0 800bdd8: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 800bddc: e015 b.n 800be0a } } else if ((pdev->pClass->DataIn != NULL) && 800bdde: 68fb ldr r3, [r7, #12] 800bde0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bde4: 695b ldr r3, [r3, #20] 800bde6: 2b00 cmp r3, #0 800bde8: d00d beq.n 800be06 (pdev->dev_state == USBD_STATE_CONFIGURED)) 800bdea: 68fb ldr r3, [r7, #12] 800bdec: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataIn != NULL) && 800bdf0: 2b03 cmp r3, #3 800bdf2: d108 bne.n 800be06 { pdev->pClass->DataIn(pdev, epnum); 800bdf4: 68fb ldr r3, [r7, #12] 800bdf6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bdfa: 695b ldr r3, [r3, #20] 800bdfc: 7afa ldrb r2, [r7, #11] 800bdfe: 4611 mov r1, r2 800be00: 68f8 ldr r0, [r7, #12] 800be02: 4798 blx r3 800be04: e001 b.n 800be0a } else { /* should never be in this condition */ return USBD_FAIL; 800be06: 2302 movs r3, #2 800be08: e000 b.n 800be0c } return USBD_OK; 800be0a: 2300 movs r3, #0 } 800be0c: 4618 mov r0, r3 800be0e: 3718 adds r7, #24 800be10: 46bd mov sp, r7 800be12: bd80 pop {r7, pc} 0800be14 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) { 800be14: b580 push {r7, lr} 800be16: b082 sub sp, #8 800be18: af00 add r7, sp, #0 800be1a: 6078 str r0, [r7, #4] /* Open EP0 OUT */ USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 800be1c: 2340 movs r3, #64 @ 0x40 800be1e: 2200 movs r2, #0 800be20: 2100 movs r1, #0 800be22: 6878 ldr r0, [r7, #4] 800be24: f001 fa45 bl 800d2b2 pdev->ep_out[0x00U & 0xFU].is_used = 1U; 800be28: 687b ldr r3, [r7, #4] 800be2a: 2201 movs r2, #1 800be2c: f8c3 2158 str.w r2, [r3, #344] @ 0x158 pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; 800be30: 687b ldr r3, [r7, #4] 800be32: 2240 movs r2, #64 @ 0x40 800be34: f8c3 2164 str.w r2, [r3, #356] @ 0x164 /* Open EP0 IN */ USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 800be38: 2340 movs r3, #64 @ 0x40 800be3a: 2200 movs r2, #0 800be3c: 2180 movs r1, #128 @ 0x80 800be3e: 6878 ldr r0, [r7, #4] 800be40: f001 fa37 bl 800d2b2 pdev->ep_in[0x80U & 0xFU].is_used = 1U; 800be44: 687b ldr r3, [r7, #4] 800be46: 2201 movs r2, #1 800be48: 619a str r2, [r3, #24] pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; 800be4a: 687b ldr r3, [r7, #4] 800be4c: 2240 movs r2, #64 @ 0x40 800be4e: 625a str r2, [r3, #36] @ 0x24 /* Upon Reset call user call back */ pdev->dev_state = USBD_STATE_DEFAULT; 800be50: 687b ldr r3, [r7, #4] 800be52: 2201 movs r2, #1 800be54: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->ep0_state = USBD_EP0_IDLE; 800be58: 687b ldr r3, [r7, #4] 800be5a: 2200 movs r2, #0 800be5c: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->dev_config = 0U; 800be60: 687b ldr r3, [r7, #4] 800be62: 2200 movs r2, #0 800be64: 605a str r2, [r3, #4] pdev->dev_remote_wakeup = 0U; 800be66: 687b ldr r3, [r7, #4] 800be68: 2200 movs r2, #0 800be6a: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 if (pdev->pClassData) 800be6e: 687b ldr r3, [r7, #4] 800be70: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800be74: 2b00 cmp r3, #0 800be76: d009 beq.n 800be8c { pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config); 800be78: 687b ldr r3, [r7, #4] 800be7a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800be7e: 685b ldr r3, [r3, #4] 800be80: 687a ldr r2, [r7, #4] 800be82: 6852 ldr r2, [r2, #4] 800be84: b2d2 uxtb r2, r2 800be86: 4611 mov r1, r2 800be88: 6878 ldr r0, [r7, #4] 800be8a: 4798 blx r3 } return USBD_OK; 800be8c: 2300 movs r3, #0 } 800be8e: 4618 mov r0, r3 800be90: 3708 adds r7, #8 800be92: 46bd mov sp, r7 800be94: bd80 pop {r7, pc} 0800be96 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) { 800be96: b480 push {r7} 800be98: b083 sub sp, #12 800be9a: af00 add r7, sp, #0 800be9c: 6078 str r0, [r7, #4] 800be9e: 460b mov r3, r1 800bea0: 70fb strb r3, [r7, #3] pdev->dev_speed = speed; 800bea2: 687b ldr r3, [r7, #4] 800bea4: 78fa ldrb r2, [r7, #3] 800bea6: 741a strb r2, [r3, #16] return USBD_OK; 800bea8: 2300 movs r3, #0 } 800beaa: 4618 mov r0, r3 800beac: 370c adds r7, #12 800beae: 46bd mov sp, r7 800beb0: bc80 pop {r7} 800beb2: 4770 bx lr 0800beb4 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) { 800beb4: b480 push {r7} 800beb6: b083 sub sp, #12 800beb8: af00 add r7, sp, #0 800beba: 6078 str r0, [r7, #4] pdev->dev_old_state = pdev->dev_state; 800bebc: 687b ldr r3, [r7, #4] 800bebe: f893 229c ldrb.w r2, [r3, #668] @ 0x29c 800bec2: 687b ldr r3, [r7, #4] 800bec4: f883 229d strb.w r2, [r3, #669] @ 0x29d pdev->dev_state = USBD_STATE_SUSPENDED; 800bec8: 687b ldr r3, [r7, #4] 800beca: 2204 movs r2, #4 800becc: f883 229c strb.w r2, [r3, #668] @ 0x29c return USBD_OK; 800bed0: 2300 movs r3, #0 } 800bed2: 4618 mov r0, r3 800bed4: 370c adds r7, #12 800bed6: 46bd mov sp, r7 800bed8: bc80 pop {r7} 800beda: 4770 bx lr 0800bedc : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) { 800bedc: b480 push {r7} 800bede: b083 sub sp, #12 800bee0: af00 add r7, sp, #0 800bee2: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_SUSPENDED) 800bee4: 687b ldr r3, [r7, #4] 800bee6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800beea: 2b04 cmp r3, #4 800beec: d105 bne.n 800befa { pdev->dev_state = pdev->dev_old_state; 800beee: 687b ldr r3, [r7, #4] 800bef0: f893 229d ldrb.w r2, [r3, #669] @ 0x29d 800bef4: 687b ldr r3, [r7, #4] 800bef6: f883 229c strb.w r2, [r3, #668] @ 0x29c } return USBD_OK; 800befa: 2300 movs r3, #0 } 800befc: 4618 mov r0, r3 800befe: 370c adds r7, #12 800bf00: 46bd mov sp, r7 800bf02: bc80 pop {r7} 800bf04: 4770 bx lr 0800bf06 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) { 800bf06: b580 push {r7, lr} 800bf08: b082 sub sp, #8 800bf0a: af00 add r7, sp, #0 800bf0c: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_CONFIGURED) 800bf0e: 687b ldr r3, [r7, #4] 800bf10: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800bf14: 2b03 cmp r3, #3 800bf16: d10b bne.n 800bf30 { if (pdev->pClass->SOF != NULL) 800bf18: 687b ldr r3, [r7, #4] 800bf1a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bf1e: 69db ldr r3, [r3, #28] 800bf20: 2b00 cmp r3, #0 800bf22: d005 beq.n 800bf30 { pdev->pClass->SOF(pdev); 800bf24: 687b ldr r3, [r7, #4] 800bf26: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bf2a: 69db ldr r3, [r3, #28] 800bf2c: 6878 ldr r0, [r7, #4] 800bf2e: 4798 blx r3 } } return USBD_OK; 800bf30: 2300 movs r3, #0 } 800bf32: 4618 mov r0, r3 800bf34: 3708 adds r7, #8 800bf36: 46bd mov sp, r7 800bf38: bd80 pop {r7, pc} ... 0800bf3c : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800bf3c: b580 push {r7, lr} 800bf3e: b084 sub sp, #16 800bf40: af00 add r7, sp, #0 800bf42: 6078 str r0, [r7, #4] 800bf44: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800bf46: 2300 movs r3, #0 800bf48: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800bf4a: 683b ldr r3, [r7, #0] 800bf4c: 781b ldrb r3, [r3, #0] 800bf4e: f003 0360 and.w r3, r3, #96 @ 0x60 800bf52: 2b40 cmp r3, #64 @ 0x40 800bf54: d005 beq.n 800bf62 800bf56: 2b40 cmp r3, #64 @ 0x40 800bf58: d84f bhi.n 800bffa 800bf5a: 2b00 cmp r3, #0 800bf5c: d009 beq.n 800bf72 800bf5e: 2b20 cmp r3, #32 800bf60: d14b bne.n 800bffa { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 800bf62: 687b ldr r3, [r7, #4] 800bf64: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800bf68: 689b ldr r3, [r3, #8] 800bf6a: 6839 ldr r1, [r7, #0] 800bf6c: 6878 ldr r0, [r7, #4] 800bf6e: 4798 blx r3 break; 800bf70: e048 b.n 800c004 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800bf72: 683b ldr r3, [r7, #0] 800bf74: 785b ldrb r3, [r3, #1] 800bf76: 2b09 cmp r3, #9 800bf78: d839 bhi.n 800bfee 800bf7a: a201 add r2, pc, #4 @ (adr r2, 800bf80 ) 800bf7c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800bf80: 0800bfd1 .word 0x0800bfd1 800bf84: 0800bfe5 .word 0x0800bfe5 800bf88: 0800bfef .word 0x0800bfef 800bf8c: 0800bfdb .word 0x0800bfdb 800bf90: 0800bfef .word 0x0800bfef 800bf94: 0800bfb3 .word 0x0800bfb3 800bf98: 0800bfa9 .word 0x0800bfa9 800bf9c: 0800bfef .word 0x0800bfef 800bfa0: 0800bfc7 .word 0x0800bfc7 800bfa4: 0800bfbd .word 0x0800bfbd { case USB_REQ_GET_DESCRIPTOR: USBD_GetDescriptor(pdev, req); 800bfa8: 6839 ldr r1, [r7, #0] 800bfaa: 6878 ldr r0, [r7, #4] 800bfac: f000 f9dc bl 800c368 break; 800bfb0: e022 b.n 800bff8 case USB_REQ_SET_ADDRESS: USBD_SetAddress(pdev, req); 800bfb2: 6839 ldr r1, [r7, #0] 800bfb4: 6878 ldr r0, [r7, #4] 800bfb6: f000 fb3f bl 800c638 break; 800bfba: e01d b.n 800bff8 case USB_REQ_SET_CONFIGURATION: USBD_SetConfig(pdev, req); 800bfbc: 6839 ldr r1, [r7, #0] 800bfbe: 6878 ldr r0, [r7, #4] 800bfc0: f000 fb7e bl 800c6c0 break; 800bfc4: e018 b.n 800bff8 case USB_REQ_GET_CONFIGURATION: USBD_GetConfig(pdev, req); 800bfc6: 6839 ldr r1, [r7, #0] 800bfc8: 6878 ldr r0, [r7, #4] 800bfca: f000 fc07 bl 800c7dc break; 800bfce: e013 b.n 800bff8 case USB_REQ_GET_STATUS: USBD_GetStatus(pdev, req); 800bfd0: 6839 ldr r1, [r7, #0] 800bfd2: 6878 ldr r0, [r7, #4] 800bfd4: f000 fc37 bl 800c846 break; 800bfd8: e00e b.n 800bff8 case USB_REQ_SET_FEATURE: USBD_SetFeature(pdev, req); 800bfda: 6839 ldr r1, [r7, #0] 800bfdc: 6878 ldr r0, [r7, #4] 800bfde: f000 fc65 bl 800c8ac break; 800bfe2: e009 b.n 800bff8 case USB_REQ_CLEAR_FEATURE: USBD_ClrFeature(pdev, req); 800bfe4: 6839 ldr r1, [r7, #0] 800bfe6: 6878 ldr r0, [r7, #4] 800bfe8: f000 fc74 bl 800c8d4 break; 800bfec: e004 b.n 800bff8 default: USBD_CtlError(pdev, req); 800bfee: 6839 ldr r1, [r7, #0] 800bff0: 6878 ldr r0, [r7, #4] 800bff2: f000 fcc9 bl 800c988 break; 800bff6: bf00 nop } break; 800bff8: e004 b.n 800c004 default: USBD_CtlError(pdev, req); 800bffa: 6839 ldr r1, [r7, #0] 800bffc: 6878 ldr r0, [r7, #4] 800bffe: f000 fcc3 bl 800c988 break; 800c002: bf00 nop } return ret; 800c004: 7bfb ldrb r3, [r7, #15] } 800c006: 4618 mov r0, r3 800c008: 3710 adds r7, #16 800c00a: 46bd mov sp, r7 800c00c: bd80 pop {r7, pc} 800c00e: bf00 nop 0800c010 : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c010: b580 push {r7, lr} 800c012: b084 sub sp, #16 800c014: af00 add r7, sp, #0 800c016: 6078 str r0, [r7, #4] 800c018: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800c01a: 2300 movs r3, #0 800c01c: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800c01e: 683b ldr r3, [r7, #0] 800c020: 781b ldrb r3, [r3, #0] 800c022: f003 0360 and.w r3, r3, #96 @ 0x60 800c026: 2b40 cmp r3, #64 @ 0x40 800c028: d005 beq.n 800c036 800c02a: 2b40 cmp r3, #64 @ 0x40 800c02c: d82e bhi.n 800c08c 800c02e: 2b00 cmp r3, #0 800c030: d001 beq.n 800c036 800c032: 2b20 cmp r3, #32 800c034: d12a bne.n 800c08c { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: case USB_REQ_TYPE_STANDARD: switch (pdev->dev_state) 800c036: 687b ldr r3, [r7, #4] 800c038: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c03c: 3b01 subs r3, #1 800c03e: 2b02 cmp r3, #2 800c040: d81d bhi.n 800c07e { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) 800c042: 683b ldr r3, [r7, #0] 800c044: 889b ldrh r3, [r3, #4] 800c046: b2db uxtb r3, r3 800c048: 2b01 cmp r3, #1 800c04a: d813 bhi.n 800c074 { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 800c04c: 687b ldr r3, [r7, #4] 800c04e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c052: 689b ldr r3, [r3, #8] 800c054: 6839 ldr r1, [r7, #0] 800c056: 6878 ldr r0, [r7, #4] 800c058: 4798 blx r3 800c05a: 4603 mov r3, r0 800c05c: 73fb strb r3, [r7, #15] if ((req->wLength == 0U) && (ret == USBD_OK)) 800c05e: 683b ldr r3, [r7, #0] 800c060: 88db ldrh r3, [r3, #6] 800c062: 2b00 cmp r3, #0 800c064: d110 bne.n 800c088 800c066: 7bfb ldrb r3, [r7, #15] 800c068: 2b00 cmp r3, #0 800c06a: d10d bne.n 800c088 { USBD_CtlSendStatus(pdev); 800c06c: 6878 ldr r0, [r7, #4] 800c06e: f000 fd53 bl 800cb18 } else { USBD_CtlError(pdev, req); } break; 800c072: e009 b.n 800c088 USBD_CtlError(pdev, req); 800c074: 6839 ldr r1, [r7, #0] 800c076: 6878 ldr r0, [r7, #4] 800c078: f000 fc86 bl 800c988 break; 800c07c: e004 b.n 800c088 default: USBD_CtlError(pdev, req); 800c07e: 6839 ldr r1, [r7, #0] 800c080: 6878 ldr r0, [r7, #4] 800c082: f000 fc81 bl 800c988 break; 800c086: e000 b.n 800c08a break; 800c088: bf00 nop } break; 800c08a: e004 b.n 800c096 default: USBD_CtlError(pdev, req); 800c08c: 6839 ldr r1, [r7, #0] 800c08e: 6878 ldr r0, [r7, #4] 800c090: f000 fc7a bl 800c988 break; 800c094: bf00 nop } return USBD_OK; 800c096: 2300 movs r3, #0 } 800c098: 4618 mov r0, r3 800c09a: 3710 adds r7, #16 800c09c: 46bd mov sp, r7 800c09e: bd80 pop {r7, pc} 0800c0a0 : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c0a0: b580 push {r7, lr} 800c0a2: b084 sub sp, #16 800c0a4: af00 add r7, sp, #0 800c0a6: 6078 str r0, [r7, #4] 800c0a8: 6039 str r1, [r7, #0] USBD_EndpointTypeDef *pep; uint8_t ep_addr; USBD_StatusTypeDef ret = USBD_OK; 800c0aa: 2300 movs r3, #0 800c0ac: 73fb strb r3, [r7, #15] ep_addr = LOBYTE(req->wIndex); 800c0ae: 683b ldr r3, [r7, #0] 800c0b0: 889b ldrh r3, [r3, #4] 800c0b2: 73bb strb r3, [r7, #14] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800c0b4: 683b ldr r3, [r7, #0] 800c0b6: 781b ldrb r3, [r3, #0] 800c0b8: f003 0360 and.w r3, r3, #96 @ 0x60 800c0bc: 2b40 cmp r3, #64 @ 0x40 800c0be: d007 beq.n 800c0d0 800c0c0: 2b40 cmp r3, #64 @ 0x40 800c0c2: f200 8146 bhi.w 800c352 800c0c6: 2b00 cmp r3, #0 800c0c8: d00a beq.n 800c0e0 800c0ca: 2b20 cmp r3, #32 800c0cc: f040 8141 bne.w 800c352 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 800c0d0: 687b ldr r3, [r7, #4] 800c0d2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c0d6: 689b ldr r3, [r3, #8] 800c0d8: 6839 ldr r1, [r7, #0] 800c0da: 6878 ldr r0, [r7, #4] 800c0dc: 4798 blx r3 break; 800c0de: e13d b.n 800c35c case USB_REQ_TYPE_STANDARD: /* Check if it is a class request */ if ((req->bmRequest & 0x60U) == 0x20U) 800c0e0: 683b ldr r3, [r7, #0] 800c0e2: 781b ldrb r3, [r3, #0] 800c0e4: f003 0360 and.w r3, r3, #96 @ 0x60 800c0e8: 2b20 cmp r3, #32 800c0ea: d10a bne.n 800c102 { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 800c0ec: 687b ldr r3, [r7, #4] 800c0ee: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c0f2: 689b ldr r3, [r3, #8] 800c0f4: 6839 ldr r1, [r7, #0] 800c0f6: 6878 ldr r0, [r7, #4] 800c0f8: 4798 blx r3 800c0fa: 4603 mov r3, r0 800c0fc: 73fb strb r3, [r7, #15] return ret; 800c0fe: 7bfb ldrb r3, [r7, #15] 800c100: e12d b.n 800c35e } switch (req->bRequest) 800c102: 683b ldr r3, [r7, #0] 800c104: 785b ldrb r3, [r3, #1] 800c106: 2b03 cmp r3, #3 800c108: d007 beq.n 800c11a 800c10a: 2b03 cmp r3, #3 800c10c: f300 811b bgt.w 800c346 800c110: 2b00 cmp r3, #0 800c112: d072 beq.n 800c1fa 800c114: 2b01 cmp r3, #1 800c116: d03a beq.n 800c18e 800c118: e115 b.n 800c346 { case USB_REQ_SET_FEATURE: switch (pdev->dev_state) 800c11a: 687b ldr r3, [r7, #4] 800c11c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c120: 2b02 cmp r3, #2 800c122: d002 beq.n 800c12a 800c124: 2b03 cmp r3, #3 800c126: d015 beq.n 800c154 800c128: e02b b.n 800c182 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800c12a: 7bbb ldrb r3, [r7, #14] 800c12c: 2b00 cmp r3, #0 800c12e: d00c beq.n 800c14a 800c130: 7bbb ldrb r3, [r7, #14] 800c132: 2b80 cmp r3, #128 @ 0x80 800c134: d009 beq.n 800c14a { USBD_LL_StallEP(pdev, ep_addr); 800c136: 7bbb ldrb r3, [r7, #14] 800c138: 4619 mov r1, r3 800c13a: 6878 ldr r0, [r7, #4] 800c13c: f001 f8fe bl 800d33c USBD_LL_StallEP(pdev, 0x80U); 800c140: 2180 movs r1, #128 @ 0x80 800c142: 6878 ldr r0, [r7, #4] 800c144: f001 f8fa bl 800d33c } else { USBD_CtlError(pdev, req); } break; 800c148: e020 b.n 800c18c USBD_CtlError(pdev, req); 800c14a: 6839 ldr r1, [r7, #0] 800c14c: 6878 ldr r0, [r7, #4] 800c14e: f000 fc1b bl 800c988 break; 800c152: e01b b.n 800c18c case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 800c154: 683b ldr r3, [r7, #0] 800c156: 885b ldrh r3, [r3, #2] 800c158: 2b00 cmp r3, #0 800c15a: d10e bne.n 800c17a { if ((ep_addr != 0x00U) && 800c15c: 7bbb ldrb r3, [r7, #14] 800c15e: 2b00 cmp r3, #0 800c160: d00b beq.n 800c17a 800c162: 7bbb ldrb r3, [r7, #14] 800c164: 2b80 cmp r3, #128 @ 0x80 800c166: d008 beq.n 800c17a (ep_addr != 0x80U) && (req->wLength == 0x00U)) 800c168: 683b ldr r3, [r7, #0] 800c16a: 88db ldrh r3, [r3, #6] 800c16c: 2b00 cmp r3, #0 800c16e: d104 bne.n 800c17a { USBD_LL_StallEP(pdev, ep_addr); 800c170: 7bbb ldrb r3, [r7, #14] 800c172: 4619 mov r1, r3 800c174: 6878 ldr r0, [r7, #4] 800c176: f001 f8e1 bl 800d33c } } USBD_CtlSendStatus(pdev); 800c17a: 6878 ldr r0, [r7, #4] 800c17c: f000 fccc bl 800cb18 break; 800c180: e004 b.n 800c18c default: USBD_CtlError(pdev, req); 800c182: 6839 ldr r1, [r7, #0] 800c184: 6878 ldr r0, [r7, #4] 800c186: f000 fbff bl 800c988 break; 800c18a: bf00 nop } break; 800c18c: e0e0 b.n 800c350 case USB_REQ_CLEAR_FEATURE: switch (pdev->dev_state) 800c18e: 687b ldr r3, [r7, #4] 800c190: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c194: 2b02 cmp r3, #2 800c196: d002 beq.n 800c19e 800c198: 2b03 cmp r3, #3 800c19a: d015 beq.n 800c1c8 800c19c: e026 b.n 800c1ec { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800c19e: 7bbb ldrb r3, [r7, #14] 800c1a0: 2b00 cmp r3, #0 800c1a2: d00c beq.n 800c1be 800c1a4: 7bbb ldrb r3, [r7, #14] 800c1a6: 2b80 cmp r3, #128 @ 0x80 800c1a8: d009 beq.n 800c1be { USBD_LL_StallEP(pdev, ep_addr); 800c1aa: 7bbb ldrb r3, [r7, #14] 800c1ac: 4619 mov r1, r3 800c1ae: 6878 ldr r0, [r7, #4] 800c1b0: f001 f8c4 bl 800d33c USBD_LL_StallEP(pdev, 0x80U); 800c1b4: 2180 movs r1, #128 @ 0x80 800c1b6: 6878 ldr r0, [r7, #4] 800c1b8: f001 f8c0 bl 800d33c } else { USBD_CtlError(pdev, req); } break; 800c1bc: e01c b.n 800c1f8 USBD_CtlError(pdev, req); 800c1be: 6839 ldr r1, [r7, #0] 800c1c0: 6878 ldr r0, [r7, #4] 800c1c2: f000 fbe1 bl 800c988 break; 800c1c6: e017 b.n 800c1f8 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 800c1c8: 683b ldr r3, [r7, #0] 800c1ca: 885b ldrh r3, [r3, #2] 800c1cc: 2b00 cmp r3, #0 800c1ce: d112 bne.n 800c1f6 { if ((ep_addr & 0x7FU) != 0x00U) 800c1d0: 7bbb ldrb r3, [r7, #14] 800c1d2: f003 037f and.w r3, r3, #127 @ 0x7f 800c1d6: 2b00 cmp r3, #0 800c1d8: d004 beq.n 800c1e4 { USBD_LL_ClearStallEP(pdev, ep_addr); 800c1da: 7bbb ldrb r3, [r7, #14] 800c1dc: 4619 mov r1, r3 800c1de: 6878 ldr r0, [r7, #4] 800c1e0: f001 f8cb bl 800d37a } USBD_CtlSendStatus(pdev); 800c1e4: 6878 ldr r0, [r7, #4] 800c1e6: f000 fc97 bl 800cb18 } break; 800c1ea: e004 b.n 800c1f6 default: USBD_CtlError(pdev, req); 800c1ec: 6839 ldr r1, [r7, #0] 800c1ee: 6878 ldr r0, [r7, #4] 800c1f0: f000 fbca bl 800c988 break; 800c1f4: e000 b.n 800c1f8 break; 800c1f6: bf00 nop } break; 800c1f8: e0aa b.n 800c350 case USB_REQ_GET_STATUS: switch (pdev->dev_state) 800c1fa: 687b ldr r3, [r7, #4] 800c1fc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c200: 2b02 cmp r3, #2 800c202: d002 beq.n 800c20a 800c204: 2b03 cmp r3, #3 800c206: d032 beq.n 800c26e 800c208: e097 b.n 800c33a { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800c20a: 7bbb ldrb r3, [r7, #14] 800c20c: 2b00 cmp r3, #0 800c20e: d007 beq.n 800c220 800c210: 7bbb ldrb r3, [r7, #14] 800c212: 2b80 cmp r3, #128 @ 0x80 800c214: d004 beq.n 800c220 { USBD_CtlError(pdev, req); 800c216: 6839 ldr r1, [r7, #0] 800c218: 6878 ldr r0, [r7, #4] 800c21a: f000 fbb5 bl 800c988 break; 800c21e: e091 b.n 800c344 } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800c220: f997 300e ldrsb.w r3, [r7, #14] 800c224: 2b00 cmp r3, #0 800c226: da0b bge.n 800c240 800c228: 7bbb ldrb r3, [r7, #14] 800c22a: f003 027f and.w r2, r3, #127 @ 0x7f 800c22e: 4613 mov r3, r2 800c230: 009b lsls r3, r3, #2 800c232: 4413 add r3, r2 800c234: 009b lsls r3, r3, #2 800c236: 3310 adds r3, #16 800c238: 687a ldr r2, [r7, #4] 800c23a: 4413 add r3, r2 800c23c: 3304 adds r3, #4 800c23e: e00b b.n 800c258 &pdev->ep_out[ep_addr & 0x7FU]; 800c240: 7bbb ldrb r3, [r7, #14] 800c242: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800c246: 4613 mov r3, r2 800c248: 009b lsls r3, r3, #2 800c24a: 4413 add r3, r2 800c24c: 009b lsls r3, r3, #2 800c24e: f503 73a8 add.w r3, r3, #336 @ 0x150 800c252: 687a ldr r2, [r7, #4] 800c254: 4413 add r3, r2 800c256: 3304 adds r3, #4 800c258: 60bb str r3, [r7, #8] pep->status = 0x0000U; 800c25a: 68bb ldr r3, [r7, #8] 800c25c: 2200 movs r2, #0 800c25e: 601a str r2, [r3, #0] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 800c260: 68bb ldr r3, [r7, #8] 800c262: 2202 movs r2, #2 800c264: 4619 mov r1, r3 800c266: 6878 ldr r0, [r7, #4] 800c268: f000 fbf8 bl 800ca5c break; 800c26c: e06a b.n 800c344 case USBD_STATE_CONFIGURED: if ((ep_addr & 0x80U) == 0x80U) 800c26e: f997 300e ldrsb.w r3, [r7, #14] 800c272: 2b00 cmp r3, #0 800c274: da11 bge.n 800c29a { if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U) 800c276: 7bbb ldrb r3, [r7, #14] 800c278: f003 020f and.w r2, r3, #15 800c27c: 6879 ldr r1, [r7, #4] 800c27e: 4613 mov r3, r2 800c280: 009b lsls r3, r3, #2 800c282: 4413 add r3, r2 800c284: 009b lsls r3, r3, #2 800c286: 440b add r3, r1 800c288: 3318 adds r3, #24 800c28a: 681b ldr r3, [r3, #0] 800c28c: 2b00 cmp r3, #0 800c28e: d117 bne.n 800c2c0 { USBD_CtlError(pdev, req); 800c290: 6839 ldr r1, [r7, #0] 800c292: 6878 ldr r0, [r7, #4] 800c294: f000 fb78 bl 800c988 break; 800c298: e054 b.n 800c344 } } else { if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U) 800c29a: 7bbb ldrb r3, [r7, #14] 800c29c: f003 020f and.w r2, r3, #15 800c2a0: 6879 ldr r1, [r7, #4] 800c2a2: 4613 mov r3, r2 800c2a4: 009b lsls r3, r3, #2 800c2a6: 4413 add r3, r2 800c2a8: 009b lsls r3, r3, #2 800c2aa: 440b add r3, r1 800c2ac: f503 73ac add.w r3, r3, #344 @ 0x158 800c2b0: 681b ldr r3, [r3, #0] 800c2b2: 2b00 cmp r3, #0 800c2b4: d104 bne.n 800c2c0 { USBD_CtlError(pdev, req); 800c2b6: 6839 ldr r1, [r7, #0] 800c2b8: 6878 ldr r0, [r7, #4] 800c2ba: f000 fb65 bl 800c988 break; 800c2be: e041 b.n 800c344 } } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800c2c0: f997 300e ldrsb.w r3, [r7, #14] 800c2c4: 2b00 cmp r3, #0 800c2c6: da0b bge.n 800c2e0 800c2c8: 7bbb ldrb r3, [r7, #14] 800c2ca: f003 027f and.w r2, r3, #127 @ 0x7f 800c2ce: 4613 mov r3, r2 800c2d0: 009b lsls r3, r3, #2 800c2d2: 4413 add r3, r2 800c2d4: 009b lsls r3, r3, #2 800c2d6: 3310 adds r3, #16 800c2d8: 687a ldr r2, [r7, #4] 800c2da: 4413 add r3, r2 800c2dc: 3304 adds r3, #4 800c2de: e00b b.n 800c2f8 &pdev->ep_out[ep_addr & 0x7FU]; 800c2e0: 7bbb ldrb r3, [r7, #14] 800c2e2: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800c2e6: 4613 mov r3, r2 800c2e8: 009b lsls r3, r3, #2 800c2ea: 4413 add r3, r2 800c2ec: 009b lsls r3, r3, #2 800c2ee: f503 73a8 add.w r3, r3, #336 @ 0x150 800c2f2: 687a ldr r2, [r7, #4] 800c2f4: 4413 add r3, r2 800c2f6: 3304 adds r3, #4 800c2f8: 60bb str r3, [r7, #8] if ((ep_addr == 0x00U) || (ep_addr == 0x80U)) 800c2fa: 7bbb ldrb r3, [r7, #14] 800c2fc: 2b00 cmp r3, #0 800c2fe: d002 beq.n 800c306 800c300: 7bbb ldrb r3, [r7, #14] 800c302: 2b80 cmp r3, #128 @ 0x80 800c304: d103 bne.n 800c30e { pep->status = 0x0000U; 800c306: 68bb ldr r3, [r7, #8] 800c308: 2200 movs r2, #0 800c30a: 601a str r2, [r3, #0] 800c30c: e00e b.n 800c32c } else if (USBD_LL_IsStallEP(pdev, ep_addr)) 800c30e: 7bbb ldrb r3, [r7, #14] 800c310: 4619 mov r1, r3 800c312: 6878 ldr r0, [r7, #4] 800c314: f001 f850 bl 800d3b8 800c318: 4603 mov r3, r0 800c31a: 2b00 cmp r3, #0 800c31c: d003 beq.n 800c326 { pep->status = 0x0001U; 800c31e: 68bb ldr r3, [r7, #8] 800c320: 2201 movs r2, #1 800c322: 601a str r2, [r3, #0] 800c324: e002 b.n 800c32c } else { pep->status = 0x0000U; 800c326: 68bb ldr r3, [r7, #8] 800c328: 2200 movs r2, #0 800c32a: 601a str r2, [r3, #0] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 800c32c: 68bb ldr r3, [r7, #8] 800c32e: 2202 movs r2, #2 800c330: 4619 mov r1, r3 800c332: 6878 ldr r0, [r7, #4] 800c334: f000 fb92 bl 800ca5c break; 800c338: e004 b.n 800c344 default: USBD_CtlError(pdev, req); 800c33a: 6839 ldr r1, [r7, #0] 800c33c: 6878 ldr r0, [r7, #4] 800c33e: f000 fb23 bl 800c988 break; 800c342: bf00 nop } break; 800c344: e004 b.n 800c350 default: USBD_CtlError(pdev, req); 800c346: 6839 ldr r1, [r7, #0] 800c348: 6878 ldr r0, [r7, #4] 800c34a: f000 fb1d bl 800c988 break; 800c34e: bf00 nop } break; 800c350: e004 b.n 800c35c default: USBD_CtlError(pdev, req); 800c352: 6839 ldr r1, [r7, #0] 800c354: 6878 ldr r0, [r7, #4] 800c356: f000 fb17 bl 800c988 break; 800c35a: bf00 nop } return ret; 800c35c: 7bfb ldrb r3, [r7, #15] } 800c35e: 4618 mov r0, r3 800c360: 3710 adds r7, #16 800c362: 46bd mov sp, r7 800c364: bd80 pop {r7, pc} ... 0800c368 : * @param req: usb request * @retval status */ static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c368: b580 push {r7, lr} 800c36a: b084 sub sp, #16 800c36c: af00 add r7, sp, #0 800c36e: 6078 str r0, [r7, #4] 800c370: 6039 str r1, [r7, #0] uint16_t len = 0U; 800c372: 2300 movs r3, #0 800c374: 813b strh r3, [r7, #8] uint8_t *pbuf = NULL; 800c376: 2300 movs r3, #0 800c378: 60fb str r3, [r7, #12] uint8_t err = 0U; 800c37a: 2300 movs r3, #0 800c37c: 72fb strb r3, [r7, #11] switch (req->wValue >> 8) 800c37e: 683b ldr r3, [r7, #0] 800c380: 885b ldrh r3, [r3, #2] 800c382: 0a1b lsrs r3, r3, #8 800c384: b29b uxth r3, r3 800c386: 3b01 subs r3, #1 800c388: 2b06 cmp r3, #6 800c38a: f200 8128 bhi.w 800c5de 800c38e: a201 add r2, pc, #4 @ (adr r2, 800c394 ) 800c390: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800c394: 0800c3b1 .word 0x0800c3b1 800c398: 0800c3c9 .word 0x0800c3c9 800c39c: 0800c409 .word 0x0800c409 800c3a0: 0800c5df .word 0x0800c5df 800c3a4: 0800c5df .word 0x0800c5df 800c3a8: 0800c57f .word 0x0800c57f 800c3ac: 0800c5ab .word 0x0800c5ab err++; } break; #endif case USB_DESC_TYPE_DEVICE: pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); 800c3b0: 687b ldr r3, [r7, #4] 800c3b2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c3b6: 681b ldr r3, [r3, #0] 800c3b8: 687a ldr r2, [r7, #4] 800c3ba: 7c12 ldrb r2, [r2, #16] 800c3bc: f107 0108 add.w r1, r7, #8 800c3c0: 4610 mov r0, r2 800c3c2: 4798 blx r3 800c3c4: 60f8 str r0, [r7, #12] break; 800c3c6: e112 b.n 800c5ee case USB_DESC_TYPE_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800c3c8: 687b ldr r3, [r7, #4] 800c3ca: 7c1b ldrb r3, [r3, #16] 800c3cc: 2b00 cmp r3, #0 800c3ce: d10d bne.n 800c3ec { pbuf = pdev->pClass->GetHSConfigDescriptor(&len); 800c3d0: 687b ldr r3, [r7, #4] 800c3d2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c3d6: 6a9b ldr r3, [r3, #40] @ 0x28 800c3d8: f107 0208 add.w r2, r7, #8 800c3dc: 4610 mov r0, r2 800c3de: 4798 blx r3 800c3e0: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800c3e2: 68fb ldr r3, [r7, #12] 800c3e4: 3301 adds r3, #1 800c3e6: 2202 movs r2, #2 800c3e8: 701a strb r2, [r3, #0] else { pbuf = pdev->pClass->GetFSConfigDescriptor(&len); pbuf[1] = USB_DESC_TYPE_CONFIGURATION; } break; 800c3ea: e100 b.n 800c5ee pbuf = pdev->pClass->GetFSConfigDescriptor(&len); 800c3ec: 687b ldr r3, [r7, #4] 800c3ee: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c3f2: 6adb ldr r3, [r3, #44] @ 0x2c 800c3f4: f107 0208 add.w r2, r7, #8 800c3f8: 4610 mov r0, r2 800c3fa: 4798 blx r3 800c3fc: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800c3fe: 68fb ldr r3, [r7, #12] 800c400: 3301 adds r3, #1 800c402: 2202 movs r2, #2 800c404: 701a strb r2, [r3, #0] break; 800c406: e0f2 b.n 800c5ee case USB_DESC_TYPE_STRING: switch ((uint8_t)(req->wValue)) 800c408: 683b ldr r3, [r7, #0] 800c40a: 885b ldrh r3, [r3, #2] 800c40c: b2db uxtb r3, r3 800c40e: 2b05 cmp r3, #5 800c410: f200 80ac bhi.w 800c56c 800c414: a201 add r2, pc, #4 @ (adr r2, 800c41c ) 800c416: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800c41a: bf00 nop 800c41c: 0800c435 .word 0x0800c435 800c420: 0800c469 .word 0x0800c469 800c424: 0800c49d .word 0x0800c49d 800c428: 0800c4d1 .word 0x0800c4d1 800c42c: 0800c505 .word 0x0800c505 800c430: 0800c539 .word 0x0800c539 { case USBD_IDX_LANGID_STR: if (pdev->pDesc->GetLangIDStrDescriptor != NULL) 800c434: 687b ldr r3, [r7, #4] 800c436: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c43a: 685b ldr r3, [r3, #4] 800c43c: 2b00 cmp r3, #0 800c43e: d00b beq.n 800c458 { pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); 800c440: 687b ldr r3, [r7, #4] 800c442: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c446: 685b ldr r3, [r3, #4] 800c448: 687a ldr r2, [r7, #4] 800c44a: 7c12 ldrb r2, [r2, #16] 800c44c: f107 0108 add.w r1, r7, #8 800c450: 4610 mov r0, r2 800c452: 4798 blx r3 800c454: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c456: e091 b.n 800c57c USBD_CtlError(pdev, req); 800c458: 6839 ldr r1, [r7, #0] 800c45a: 6878 ldr r0, [r7, #4] 800c45c: f000 fa94 bl 800c988 err++; 800c460: 7afb ldrb r3, [r7, #11] 800c462: 3301 adds r3, #1 800c464: 72fb strb r3, [r7, #11] break; 800c466: e089 b.n 800c57c case USBD_IDX_MFC_STR: if (pdev->pDesc->GetManufacturerStrDescriptor != NULL) 800c468: 687b ldr r3, [r7, #4] 800c46a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c46e: 689b ldr r3, [r3, #8] 800c470: 2b00 cmp r3, #0 800c472: d00b beq.n 800c48c { pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); 800c474: 687b ldr r3, [r7, #4] 800c476: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c47a: 689b ldr r3, [r3, #8] 800c47c: 687a ldr r2, [r7, #4] 800c47e: 7c12 ldrb r2, [r2, #16] 800c480: f107 0108 add.w r1, r7, #8 800c484: 4610 mov r0, r2 800c486: 4798 blx r3 800c488: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c48a: e077 b.n 800c57c USBD_CtlError(pdev, req); 800c48c: 6839 ldr r1, [r7, #0] 800c48e: 6878 ldr r0, [r7, #4] 800c490: f000 fa7a bl 800c988 err++; 800c494: 7afb ldrb r3, [r7, #11] 800c496: 3301 adds r3, #1 800c498: 72fb strb r3, [r7, #11] break; 800c49a: e06f b.n 800c57c case USBD_IDX_PRODUCT_STR: if (pdev->pDesc->GetProductStrDescriptor != NULL) 800c49c: 687b ldr r3, [r7, #4] 800c49e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c4a2: 68db ldr r3, [r3, #12] 800c4a4: 2b00 cmp r3, #0 800c4a6: d00b beq.n 800c4c0 { pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); 800c4a8: 687b ldr r3, [r7, #4] 800c4aa: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c4ae: 68db ldr r3, [r3, #12] 800c4b0: 687a ldr r2, [r7, #4] 800c4b2: 7c12 ldrb r2, [r2, #16] 800c4b4: f107 0108 add.w r1, r7, #8 800c4b8: 4610 mov r0, r2 800c4ba: 4798 blx r3 800c4bc: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c4be: e05d b.n 800c57c USBD_CtlError(pdev, req); 800c4c0: 6839 ldr r1, [r7, #0] 800c4c2: 6878 ldr r0, [r7, #4] 800c4c4: f000 fa60 bl 800c988 err++; 800c4c8: 7afb ldrb r3, [r7, #11] 800c4ca: 3301 adds r3, #1 800c4cc: 72fb strb r3, [r7, #11] break; 800c4ce: e055 b.n 800c57c case USBD_IDX_SERIAL_STR: if (pdev->pDesc->GetSerialStrDescriptor != NULL) 800c4d0: 687b ldr r3, [r7, #4] 800c4d2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c4d6: 691b ldr r3, [r3, #16] 800c4d8: 2b00 cmp r3, #0 800c4da: d00b beq.n 800c4f4 { pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); 800c4dc: 687b ldr r3, [r7, #4] 800c4de: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c4e2: 691b ldr r3, [r3, #16] 800c4e4: 687a ldr r2, [r7, #4] 800c4e6: 7c12 ldrb r2, [r2, #16] 800c4e8: f107 0108 add.w r1, r7, #8 800c4ec: 4610 mov r0, r2 800c4ee: 4798 blx r3 800c4f0: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c4f2: e043 b.n 800c57c USBD_CtlError(pdev, req); 800c4f4: 6839 ldr r1, [r7, #0] 800c4f6: 6878 ldr r0, [r7, #4] 800c4f8: f000 fa46 bl 800c988 err++; 800c4fc: 7afb ldrb r3, [r7, #11] 800c4fe: 3301 adds r3, #1 800c500: 72fb strb r3, [r7, #11] break; 800c502: e03b b.n 800c57c case USBD_IDX_CONFIG_STR: if (pdev->pDesc->GetConfigurationStrDescriptor != NULL) 800c504: 687b ldr r3, [r7, #4] 800c506: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c50a: 695b ldr r3, [r3, #20] 800c50c: 2b00 cmp r3, #0 800c50e: d00b beq.n 800c528 { pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); 800c510: 687b ldr r3, [r7, #4] 800c512: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c516: 695b ldr r3, [r3, #20] 800c518: 687a ldr r2, [r7, #4] 800c51a: 7c12 ldrb r2, [r2, #16] 800c51c: f107 0108 add.w r1, r7, #8 800c520: 4610 mov r0, r2 800c522: 4798 blx r3 800c524: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c526: e029 b.n 800c57c USBD_CtlError(pdev, req); 800c528: 6839 ldr r1, [r7, #0] 800c52a: 6878 ldr r0, [r7, #4] 800c52c: f000 fa2c bl 800c988 err++; 800c530: 7afb ldrb r3, [r7, #11] 800c532: 3301 adds r3, #1 800c534: 72fb strb r3, [r7, #11] break; 800c536: e021 b.n 800c57c case USBD_IDX_INTERFACE_STR: if (pdev->pDesc->GetInterfaceStrDescriptor != NULL) 800c538: 687b ldr r3, [r7, #4] 800c53a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c53e: 699b ldr r3, [r3, #24] 800c540: 2b00 cmp r3, #0 800c542: d00b beq.n 800c55c { pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); 800c544: 687b ldr r3, [r7, #4] 800c546: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800c54a: 699b ldr r3, [r3, #24] 800c54c: 687a ldr r2, [r7, #4] 800c54e: 7c12 ldrb r2, [r2, #16] 800c550: f107 0108 add.w r1, r7, #8 800c554: 4610 mov r0, r2 800c556: 4798 blx r3 800c558: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c55a: e00f b.n 800c57c USBD_CtlError(pdev, req); 800c55c: 6839 ldr r1, [r7, #0] 800c55e: 6878 ldr r0, [r7, #4] 800c560: f000 fa12 bl 800c988 err++; 800c564: 7afb ldrb r3, [r7, #11] 800c566: 3301 adds r3, #1 800c568: 72fb strb r3, [r7, #11] break; 800c56a: e007 b.n 800c57c USBD_CtlError(pdev, req); err++; } break; #else USBD_CtlError(pdev, req); 800c56c: 6839 ldr r1, [r7, #0] 800c56e: 6878 ldr r0, [r7, #4] 800c570: f000 fa0a bl 800c988 err++; 800c574: 7afb ldrb r3, [r7, #11] 800c576: 3301 adds r3, #1 800c578: 72fb strb r3, [r7, #11] #endif } break; 800c57a: e038 b.n 800c5ee 800c57c: e037 b.n 800c5ee case USB_DESC_TYPE_DEVICE_QUALIFIER: if (pdev->dev_speed == USBD_SPEED_HIGH) 800c57e: 687b ldr r3, [r7, #4] 800c580: 7c1b ldrb r3, [r3, #16] 800c582: 2b00 cmp r3, #0 800c584: d109 bne.n 800c59a { pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len); 800c586: 687b ldr r3, [r7, #4] 800c588: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c58c: 6b5b ldr r3, [r3, #52] @ 0x34 800c58e: f107 0208 add.w r2, r7, #8 800c592: 4610 mov r0, r2 800c594: 4798 blx r3 800c596: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800c598: e029 b.n 800c5ee USBD_CtlError(pdev, req); 800c59a: 6839 ldr r1, [r7, #0] 800c59c: 6878 ldr r0, [r7, #4] 800c59e: f000 f9f3 bl 800c988 err++; 800c5a2: 7afb ldrb r3, [r7, #11] 800c5a4: 3301 adds r3, #1 800c5a6: 72fb strb r3, [r7, #11] break; 800c5a8: e021 b.n 800c5ee case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800c5aa: 687b ldr r3, [r7, #4] 800c5ac: 7c1b ldrb r3, [r3, #16] 800c5ae: 2b00 cmp r3, #0 800c5b0: d10d bne.n 800c5ce { pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len); 800c5b2: 687b ldr r3, [r7, #4] 800c5b4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800c5b8: 6b1b ldr r3, [r3, #48] @ 0x30 800c5ba: f107 0208 add.w r2, r7, #8 800c5be: 4610 mov r0, r2 800c5c0: 4798 blx r3 800c5c2: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; 800c5c4: 68fb ldr r3, [r7, #12] 800c5c6: 3301 adds r3, #1 800c5c8: 2207 movs r2, #7 800c5ca: 701a strb r2, [r3, #0] else { USBD_CtlError(pdev, req); err++; } break; 800c5cc: e00f b.n 800c5ee USBD_CtlError(pdev, req); 800c5ce: 6839 ldr r1, [r7, #0] 800c5d0: 6878 ldr r0, [r7, #4] 800c5d2: f000 f9d9 bl 800c988 err++; 800c5d6: 7afb ldrb r3, [r7, #11] 800c5d8: 3301 adds r3, #1 800c5da: 72fb strb r3, [r7, #11] break; 800c5dc: e007 b.n 800c5ee default: USBD_CtlError(pdev, req); 800c5de: 6839 ldr r1, [r7, #0] 800c5e0: 6878 ldr r0, [r7, #4] 800c5e2: f000 f9d1 bl 800c988 err++; 800c5e6: 7afb ldrb r3, [r7, #11] 800c5e8: 3301 adds r3, #1 800c5ea: 72fb strb r3, [r7, #11] break; 800c5ec: bf00 nop } if (err != 0U) 800c5ee: 7afb ldrb r3, [r7, #11] 800c5f0: 2b00 cmp r3, #0 800c5f2: d11c bne.n 800c62e { return; } else { if ((len != 0U) && (req->wLength != 0U)) 800c5f4: 893b ldrh r3, [r7, #8] 800c5f6: 2b00 cmp r3, #0 800c5f8: d011 beq.n 800c61e 800c5fa: 683b ldr r3, [r7, #0] 800c5fc: 88db ldrh r3, [r3, #6] 800c5fe: 2b00 cmp r3, #0 800c600: d00d beq.n 800c61e { len = MIN(len, req->wLength); 800c602: 683b ldr r3, [r7, #0] 800c604: 88da ldrh r2, [r3, #6] 800c606: 893b ldrh r3, [r7, #8] 800c608: 4293 cmp r3, r2 800c60a: bf28 it cs 800c60c: 4613 movcs r3, r2 800c60e: b29b uxth r3, r3 800c610: 813b strh r3, [r7, #8] (void)USBD_CtlSendData(pdev, pbuf, len); 800c612: 893b ldrh r3, [r7, #8] 800c614: 461a mov r2, r3 800c616: 68f9 ldr r1, [r7, #12] 800c618: 6878 ldr r0, [r7, #4] 800c61a: f000 fa1f bl 800ca5c } if (req->wLength == 0U) 800c61e: 683b ldr r3, [r7, #0] 800c620: 88db ldrh r3, [r3, #6] 800c622: 2b00 cmp r3, #0 800c624: d104 bne.n 800c630 { (void)USBD_CtlSendStatus(pdev); 800c626: 6878 ldr r0, [r7, #4] 800c628: f000 fa76 bl 800cb18 800c62c: e000 b.n 800c630 return; 800c62e: bf00 nop } } } 800c630: 3710 adds r7, #16 800c632: 46bd mov sp, r7 800c634: bd80 pop {r7, pc} 800c636: bf00 nop 0800c638 : * @param req: usb request * @retval status */ static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c638: b580 push {r7, lr} 800c63a: b084 sub sp, #16 800c63c: af00 add r7, sp, #0 800c63e: 6078 str r0, [r7, #4] 800c640: 6039 str r1, [r7, #0] uint8_t dev_addr; if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U)) 800c642: 683b ldr r3, [r7, #0] 800c644: 889b ldrh r3, [r3, #4] 800c646: 2b00 cmp r3, #0 800c648: d130 bne.n 800c6ac 800c64a: 683b ldr r3, [r7, #0] 800c64c: 88db ldrh r3, [r3, #6] 800c64e: 2b00 cmp r3, #0 800c650: d12c bne.n 800c6ac 800c652: 683b ldr r3, [r7, #0] 800c654: 885b ldrh r3, [r3, #2] 800c656: 2b7f cmp r3, #127 @ 0x7f 800c658: d828 bhi.n 800c6ac { dev_addr = (uint8_t)(req->wValue) & 0x7FU; 800c65a: 683b ldr r3, [r7, #0] 800c65c: 885b ldrh r3, [r3, #2] 800c65e: b2db uxtb r3, r3 800c660: f003 037f and.w r3, r3, #127 @ 0x7f 800c664: 73fb strb r3, [r7, #15] if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c666: 687b ldr r3, [r7, #4] 800c668: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c66c: 2b03 cmp r3, #3 800c66e: d104 bne.n 800c67a { USBD_CtlError(pdev, req); 800c670: 6839 ldr r1, [r7, #0] 800c672: 6878 ldr r0, [r7, #4] 800c674: f000 f988 bl 800c988 if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c678: e01d b.n 800c6b6 } else { pdev->dev_address = dev_addr; 800c67a: 687b ldr r3, [r7, #4] 800c67c: 7bfa ldrb r2, [r7, #15] 800c67e: f883 229e strb.w r2, [r3, #670] @ 0x29e USBD_LL_SetUSBAddress(pdev, dev_addr); 800c682: 7bfb ldrb r3, [r7, #15] 800c684: 4619 mov r1, r3 800c686: 6878 ldr r0, [r7, #4] 800c688: f000 fec1 bl 800d40e USBD_CtlSendStatus(pdev); 800c68c: 6878 ldr r0, [r7, #4] 800c68e: f000 fa43 bl 800cb18 if (dev_addr != 0U) 800c692: 7bfb ldrb r3, [r7, #15] 800c694: 2b00 cmp r3, #0 800c696: d004 beq.n 800c6a2 { pdev->dev_state = USBD_STATE_ADDRESSED; 800c698: 687b ldr r3, [r7, #4] 800c69a: 2202 movs r2, #2 800c69c: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c6a0: e009 b.n 800c6b6 } else { pdev->dev_state = USBD_STATE_DEFAULT; 800c6a2: 687b ldr r3, [r7, #4] 800c6a4: 2201 movs r2, #1 800c6a6: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800c6aa: e004 b.n 800c6b6 } } } else { USBD_CtlError(pdev, req); 800c6ac: 6839 ldr r1, [r7, #0] 800c6ae: 6878 ldr r0, [r7, #4] 800c6b0: f000 f96a bl 800c988 } } 800c6b4: bf00 nop 800c6b6: bf00 nop 800c6b8: 3710 adds r7, #16 800c6ba: 46bd mov sp, r7 800c6bc: bd80 pop {r7, pc} ... 0800c6c0 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c6c0: b580 push {r7, lr} 800c6c2: b082 sub sp, #8 800c6c4: af00 add r7, sp, #0 800c6c6: 6078 str r0, [r7, #4] 800c6c8: 6039 str r1, [r7, #0] static uint8_t cfgidx; cfgidx = (uint8_t)(req->wValue); 800c6ca: 683b ldr r3, [r7, #0] 800c6cc: 885b ldrh r3, [r3, #2] 800c6ce: b2da uxtb r2, r3 800c6d0: 4b41 ldr r3, [pc, #260] @ (800c7d8 ) 800c6d2: 701a strb r2, [r3, #0] if (cfgidx > USBD_MAX_NUM_CONFIGURATION) 800c6d4: 4b40 ldr r3, [pc, #256] @ (800c7d8 ) 800c6d6: 781b ldrb r3, [r3, #0] 800c6d8: 2b01 cmp r3, #1 800c6da: d904 bls.n 800c6e6 { USBD_CtlError(pdev, req); 800c6dc: 6839 ldr r1, [r7, #0] 800c6de: 6878 ldr r0, [r7, #4] 800c6e0: f000 f952 bl 800c988 800c6e4: e075 b.n 800c7d2 } else { switch (pdev->dev_state) 800c6e6: 687b ldr r3, [r7, #4] 800c6e8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c6ec: 2b02 cmp r3, #2 800c6ee: d002 beq.n 800c6f6 800c6f0: 2b03 cmp r3, #3 800c6f2: d023 beq.n 800c73c 800c6f4: e062 b.n 800c7bc { case USBD_STATE_ADDRESSED: if (cfgidx) 800c6f6: 4b38 ldr r3, [pc, #224] @ (800c7d8 ) 800c6f8: 781b ldrb r3, [r3, #0] 800c6fa: 2b00 cmp r3, #0 800c6fc: d01a beq.n 800c734 { pdev->dev_config = cfgidx; 800c6fe: 4b36 ldr r3, [pc, #216] @ (800c7d8 ) 800c700: 781b ldrb r3, [r3, #0] 800c702: 461a mov r2, r3 800c704: 687b ldr r3, [r7, #4] 800c706: 605a str r2, [r3, #4] pdev->dev_state = USBD_STATE_CONFIGURED; 800c708: 687b ldr r3, [r7, #4] 800c70a: 2203 movs r2, #3 800c70c: f883 229c strb.w r2, [r3, #668] @ 0x29c if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800c710: 4b31 ldr r3, [pc, #196] @ (800c7d8 ) 800c712: 781b ldrb r3, [r3, #0] 800c714: 4619 mov r1, r3 800c716: 6878 ldr r0, [r7, #4] 800c718: f7ff f9e7 bl 800baea 800c71c: 4603 mov r3, r0 800c71e: 2b02 cmp r3, #2 800c720: d104 bne.n 800c72c { USBD_CtlError(pdev, req); 800c722: 6839 ldr r1, [r7, #0] 800c724: 6878 ldr r0, [r7, #4] 800c726: f000 f92f bl 800c988 return; 800c72a: e052 b.n 800c7d2 } USBD_CtlSendStatus(pdev); 800c72c: 6878 ldr r0, [r7, #4] 800c72e: f000 f9f3 bl 800cb18 } else { USBD_CtlSendStatus(pdev); } break; 800c732: e04e b.n 800c7d2 USBD_CtlSendStatus(pdev); 800c734: 6878 ldr r0, [r7, #4] 800c736: f000 f9ef bl 800cb18 break; 800c73a: e04a b.n 800c7d2 case USBD_STATE_CONFIGURED: if (cfgidx == 0U) 800c73c: 4b26 ldr r3, [pc, #152] @ (800c7d8 ) 800c73e: 781b ldrb r3, [r3, #0] 800c740: 2b00 cmp r3, #0 800c742: d112 bne.n 800c76a { pdev->dev_state = USBD_STATE_ADDRESSED; 800c744: 687b ldr r3, [r7, #4] 800c746: 2202 movs r2, #2 800c748: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->dev_config = cfgidx; 800c74c: 4b22 ldr r3, [pc, #136] @ (800c7d8 ) 800c74e: 781b ldrb r3, [r3, #0] 800c750: 461a mov r2, r3 800c752: 687b ldr r3, [r7, #4] 800c754: 605a str r2, [r3, #4] USBD_ClrClassConfig(pdev, cfgidx); 800c756: 4b20 ldr r3, [pc, #128] @ (800c7d8 ) 800c758: 781b ldrb r3, [r3, #0] 800c75a: 4619 mov r1, r3 800c75c: 6878 ldr r0, [r7, #4] 800c75e: f7ff f9e3 bl 800bb28 USBD_CtlSendStatus(pdev); 800c762: 6878 ldr r0, [r7, #4] 800c764: f000 f9d8 bl 800cb18 } else { USBD_CtlSendStatus(pdev); } break; 800c768: e033 b.n 800c7d2 else if (cfgidx != pdev->dev_config) 800c76a: 4b1b ldr r3, [pc, #108] @ (800c7d8 ) 800c76c: 781b ldrb r3, [r3, #0] 800c76e: 461a mov r2, r3 800c770: 687b ldr r3, [r7, #4] 800c772: 685b ldr r3, [r3, #4] 800c774: 429a cmp r2, r3 800c776: d01d beq.n 800c7b4 USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 800c778: 687b ldr r3, [r7, #4] 800c77a: 685b ldr r3, [r3, #4] 800c77c: b2db uxtb r3, r3 800c77e: 4619 mov r1, r3 800c780: 6878 ldr r0, [r7, #4] 800c782: f7ff f9d1 bl 800bb28 pdev->dev_config = cfgidx; 800c786: 4b14 ldr r3, [pc, #80] @ (800c7d8 ) 800c788: 781b ldrb r3, [r3, #0] 800c78a: 461a mov r2, r3 800c78c: 687b ldr r3, [r7, #4] 800c78e: 605a str r2, [r3, #4] if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800c790: 4b11 ldr r3, [pc, #68] @ (800c7d8 ) 800c792: 781b ldrb r3, [r3, #0] 800c794: 4619 mov r1, r3 800c796: 6878 ldr r0, [r7, #4] 800c798: f7ff f9a7 bl 800baea 800c79c: 4603 mov r3, r0 800c79e: 2b02 cmp r3, #2 800c7a0: d104 bne.n 800c7ac USBD_CtlError(pdev, req); 800c7a2: 6839 ldr r1, [r7, #0] 800c7a4: 6878 ldr r0, [r7, #4] 800c7a6: f000 f8ef bl 800c988 return; 800c7aa: e012 b.n 800c7d2 USBD_CtlSendStatus(pdev); 800c7ac: 6878 ldr r0, [r7, #4] 800c7ae: f000 f9b3 bl 800cb18 break; 800c7b2: e00e b.n 800c7d2 USBD_CtlSendStatus(pdev); 800c7b4: 6878 ldr r0, [r7, #4] 800c7b6: f000 f9af bl 800cb18 break; 800c7ba: e00a b.n 800c7d2 default: USBD_CtlError(pdev, req); 800c7bc: 6839 ldr r1, [r7, #0] 800c7be: 6878 ldr r0, [r7, #4] 800c7c0: f000 f8e2 bl 800c988 USBD_ClrClassConfig(pdev, cfgidx); 800c7c4: 4b04 ldr r3, [pc, #16] @ (800c7d8 ) 800c7c6: 781b ldrb r3, [r3, #0] 800c7c8: 4619 mov r1, r3 800c7ca: 6878 ldr r0, [r7, #4] 800c7cc: f7ff f9ac bl 800bb28 break; 800c7d0: bf00 nop } } } 800c7d2: 3708 adds r7, #8 800c7d4: 46bd mov sp, r7 800c7d6: bd80 pop {r7, pc} 800c7d8: 20000470 .word 0x20000470 0800c7dc : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c7dc: b580 push {r7, lr} 800c7de: b082 sub sp, #8 800c7e0: af00 add r7, sp, #0 800c7e2: 6078 str r0, [r7, #4] 800c7e4: 6039 str r1, [r7, #0] if (req->wLength != 1U) 800c7e6: 683b ldr r3, [r7, #0] 800c7e8: 88db ldrh r3, [r3, #6] 800c7ea: 2b01 cmp r3, #1 800c7ec: d004 beq.n 800c7f8 { USBD_CtlError(pdev, req); 800c7ee: 6839 ldr r1, [r7, #0] 800c7f0: 6878 ldr r0, [r7, #4] 800c7f2: f000 f8c9 bl 800c988 default: USBD_CtlError(pdev, req); break; } } } 800c7f6: e022 b.n 800c83e switch (pdev->dev_state) 800c7f8: 687b ldr r3, [r7, #4] 800c7fa: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c7fe: 2b02 cmp r3, #2 800c800: dc02 bgt.n 800c808 800c802: 2b00 cmp r3, #0 800c804: dc03 bgt.n 800c80e 800c806: e015 b.n 800c834 800c808: 2b03 cmp r3, #3 800c80a: d00b beq.n 800c824 800c80c: e012 b.n 800c834 pdev->dev_default_config = 0U; 800c80e: 687b ldr r3, [r7, #4] 800c810: 2200 movs r2, #0 800c812: 609a str r2, [r3, #8] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U); 800c814: 687b ldr r3, [r7, #4] 800c816: 3308 adds r3, #8 800c818: 2201 movs r2, #1 800c81a: 4619 mov r1, r3 800c81c: 6878 ldr r0, [r7, #4] 800c81e: f000 f91d bl 800ca5c break; 800c822: e00c b.n 800c83e USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U); 800c824: 687b ldr r3, [r7, #4] 800c826: 3304 adds r3, #4 800c828: 2201 movs r2, #1 800c82a: 4619 mov r1, r3 800c82c: 6878 ldr r0, [r7, #4] 800c82e: f000 f915 bl 800ca5c break; 800c832: e004 b.n 800c83e USBD_CtlError(pdev, req); 800c834: 6839 ldr r1, [r7, #0] 800c836: 6878 ldr r0, [r7, #4] 800c838: f000 f8a6 bl 800c988 break; 800c83c: bf00 nop } 800c83e: bf00 nop 800c840: 3708 adds r7, #8 800c842: 46bd mov sp, r7 800c844: bd80 pop {r7, pc} 0800c846 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c846: b580 push {r7, lr} 800c848: b082 sub sp, #8 800c84a: af00 add r7, sp, #0 800c84c: 6078 str r0, [r7, #4] 800c84e: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800c850: 687b ldr r3, [r7, #4] 800c852: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c856: 3b01 subs r3, #1 800c858: 2b02 cmp r3, #2 800c85a: d81e bhi.n 800c89a { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wLength != 0x2U) 800c85c: 683b ldr r3, [r7, #0] 800c85e: 88db ldrh r3, [r3, #6] 800c860: 2b02 cmp r3, #2 800c862: d004 beq.n 800c86e { USBD_CtlError(pdev, req); 800c864: 6839 ldr r1, [r7, #0] 800c866: 6878 ldr r0, [r7, #4] 800c868: f000 f88e bl 800c988 break; 800c86c: e01a b.n 800c8a4 } #if (USBD_SELF_POWERED == 1U) pdev->dev_config_status = USB_CONFIG_SELF_POWERED; 800c86e: 687b ldr r3, [r7, #4] 800c870: 2201 movs r2, #1 800c872: 60da str r2, [r3, #12] #else pdev->dev_config_status = 0U; #endif if (pdev->dev_remote_wakeup) 800c874: 687b ldr r3, [r7, #4] 800c876: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4 800c87a: 2b00 cmp r3, #0 800c87c: d005 beq.n 800c88a { pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; 800c87e: 687b ldr r3, [r7, #4] 800c880: 68db ldr r3, [r3, #12] 800c882: f043 0202 orr.w r2, r3, #2 800c886: 687b ldr r3, [r7, #4] 800c888: 60da str r2, [r3, #12] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U); 800c88a: 687b ldr r3, [r7, #4] 800c88c: 330c adds r3, #12 800c88e: 2202 movs r2, #2 800c890: 4619 mov r1, r3 800c892: 6878 ldr r0, [r7, #4] 800c894: f000 f8e2 bl 800ca5c break; 800c898: e004 b.n 800c8a4 default: USBD_CtlError(pdev, req); 800c89a: 6839 ldr r1, [r7, #0] 800c89c: 6878 ldr r0, [r7, #4] 800c89e: f000 f873 bl 800c988 break; 800c8a2: bf00 nop } } 800c8a4: bf00 nop 800c8a6: 3708 adds r7, #8 800c8a8: 46bd mov sp, r7 800c8aa: bd80 pop {r7, pc} 0800c8ac : * @param req: usb request * @retval status */ static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c8ac: b580 push {r7, lr} 800c8ae: b082 sub sp, #8 800c8b0: af00 add r7, sp, #0 800c8b2: 6078 str r0, [r7, #4] 800c8b4: 6039 str r1, [r7, #0] if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800c8b6: 683b ldr r3, [r7, #0] 800c8b8: 885b ldrh r3, [r3, #2] 800c8ba: 2b01 cmp r3, #1 800c8bc: d106 bne.n 800c8cc { pdev->dev_remote_wakeup = 1U; 800c8be: 687b ldr r3, [r7, #4] 800c8c0: 2201 movs r2, #1 800c8c2: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800c8c6: 6878 ldr r0, [r7, #4] 800c8c8: f000 f926 bl 800cb18 } } 800c8cc: bf00 nop 800c8ce: 3708 adds r7, #8 800c8d0: 46bd mov sp, r7 800c8d2: bd80 pop {r7, pc} 0800c8d4 : * @param req: usb request * @retval status */ static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c8d4: b580 push {r7, lr} 800c8d6: b082 sub sp, #8 800c8d8: af00 add r7, sp, #0 800c8da: 6078 str r0, [r7, #4] 800c8dc: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800c8de: 687b ldr r3, [r7, #4] 800c8e0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800c8e4: 3b01 subs r3, #1 800c8e6: 2b02 cmp r3, #2 800c8e8: d80b bhi.n 800c902 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800c8ea: 683b ldr r3, [r7, #0] 800c8ec: 885b ldrh r3, [r3, #2] 800c8ee: 2b01 cmp r3, #1 800c8f0: d10c bne.n 800c90c { pdev->dev_remote_wakeup = 0U; 800c8f2: 687b ldr r3, [r7, #4] 800c8f4: 2200 movs r2, #0 800c8f6: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800c8fa: 6878 ldr r0, [r7, #4] 800c8fc: f000 f90c bl 800cb18 } break; 800c900: e004 b.n 800c90c default: USBD_CtlError(pdev, req); 800c902: 6839 ldr r1, [r7, #0] 800c904: 6878 ldr r0, [r7, #4] 800c906: f000 f83f bl 800c988 break; 800c90a: e000 b.n 800c90e break; 800c90c: bf00 nop } } 800c90e: bf00 nop 800c910: 3708 adds r7, #8 800c912: 46bd mov sp, r7 800c914: bd80 pop {r7, pc} 0800c916 : * @param req: usb request * @retval None */ void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) { 800c916: b480 push {r7} 800c918: b083 sub sp, #12 800c91a: af00 add r7, sp, #0 800c91c: 6078 str r0, [r7, #4] 800c91e: 6039 str r1, [r7, #0] req->bmRequest = *(uint8_t *)(pdata); 800c920: 683b ldr r3, [r7, #0] 800c922: 781a ldrb r2, [r3, #0] 800c924: 687b ldr r3, [r7, #4] 800c926: 701a strb r2, [r3, #0] req->bRequest = *(uint8_t *)(pdata + 1U); 800c928: 683b ldr r3, [r7, #0] 800c92a: 785a ldrb r2, [r3, #1] 800c92c: 687b ldr r3, [r7, #4] 800c92e: 705a strb r2, [r3, #1] req->wValue = SWAPBYTE(pdata + 2U); 800c930: 683b ldr r3, [r7, #0] 800c932: 3302 adds r3, #2 800c934: 781b ldrb r3, [r3, #0] 800c936: 461a mov r2, r3 800c938: 683b ldr r3, [r7, #0] 800c93a: 3303 adds r3, #3 800c93c: 781b ldrb r3, [r3, #0] 800c93e: 021b lsls r3, r3, #8 800c940: b29b uxth r3, r3 800c942: 4413 add r3, r2 800c944: b29a uxth r2, r3 800c946: 687b ldr r3, [r7, #4] 800c948: 805a strh r2, [r3, #2] req->wIndex = SWAPBYTE(pdata + 4U); 800c94a: 683b ldr r3, [r7, #0] 800c94c: 3304 adds r3, #4 800c94e: 781b ldrb r3, [r3, #0] 800c950: 461a mov r2, r3 800c952: 683b ldr r3, [r7, #0] 800c954: 3305 adds r3, #5 800c956: 781b ldrb r3, [r3, #0] 800c958: 021b lsls r3, r3, #8 800c95a: b29b uxth r3, r3 800c95c: 4413 add r3, r2 800c95e: b29a uxth r2, r3 800c960: 687b ldr r3, [r7, #4] 800c962: 809a strh r2, [r3, #4] req->wLength = SWAPBYTE(pdata + 6U); 800c964: 683b ldr r3, [r7, #0] 800c966: 3306 adds r3, #6 800c968: 781b ldrb r3, [r3, #0] 800c96a: 461a mov r2, r3 800c96c: 683b ldr r3, [r7, #0] 800c96e: 3307 adds r3, #7 800c970: 781b ldrb r3, [r3, #0] 800c972: 021b lsls r3, r3, #8 800c974: b29b uxth r3, r3 800c976: 4413 add r3, r2 800c978: b29a uxth r2, r3 800c97a: 687b ldr r3, [r7, #4] 800c97c: 80da strh r2, [r3, #6] } 800c97e: bf00 nop 800c980: 370c adds r7, #12 800c982: 46bd mov sp, r7 800c984: bc80 pop {r7} 800c986: 4770 bx lr 0800c988 : * @retval None */ void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800c988: b580 push {r7, lr} 800c98a: b082 sub sp, #8 800c98c: af00 add r7, sp, #0 800c98e: 6078 str r0, [r7, #4] 800c990: 6039 str r1, [r7, #0] USBD_LL_StallEP(pdev, 0x80U); 800c992: 2180 movs r1, #128 @ 0x80 800c994: 6878 ldr r0, [r7, #4] 800c996: f000 fcd1 bl 800d33c USBD_LL_StallEP(pdev, 0U); 800c99a: 2100 movs r1, #0 800c99c: 6878 ldr r0, [r7, #4] 800c99e: f000 fccd bl 800d33c } 800c9a2: bf00 nop 800c9a4: 3708 adds r7, #8 800c9a6: 46bd mov sp, r7 800c9a8: bd80 pop {r7, pc} 0800c9aa : * @param unicode : Formatted string buffer (unicode) * @param len : descriptor length * @retval None */ void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) { 800c9aa: b580 push {r7, lr} 800c9ac: b086 sub sp, #24 800c9ae: af00 add r7, sp, #0 800c9b0: 60f8 str r0, [r7, #12] 800c9b2: 60b9 str r1, [r7, #8] 800c9b4: 607a str r2, [r7, #4] uint8_t idx = 0U; 800c9b6: 2300 movs r3, #0 800c9b8: 75fb strb r3, [r7, #23] if (desc != NULL) 800c9ba: 68fb ldr r3, [r7, #12] 800c9bc: 2b00 cmp r3, #0 800c9be: d032 beq.n 800ca26 { *len = (uint16_t)USBD_GetLen(desc) * 2U + 2U; 800c9c0: 68f8 ldr r0, [r7, #12] 800c9c2: f000 f834 bl 800ca2e 800c9c6: 4603 mov r3, r0 800c9c8: 3301 adds r3, #1 800c9ca: b29b uxth r3, r3 800c9cc: 005b lsls r3, r3, #1 800c9ce: b29a uxth r2, r3 800c9d0: 687b ldr r3, [r7, #4] 800c9d2: 801a strh r2, [r3, #0] unicode[idx++] = *(uint8_t *)(void *)len; 800c9d4: 7dfb ldrb r3, [r7, #23] 800c9d6: 1c5a adds r2, r3, #1 800c9d8: 75fa strb r2, [r7, #23] 800c9da: 461a mov r2, r3 800c9dc: 68bb ldr r3, [r7, #8] 800c9de: 4413 add r3, r2 800c9e0: 687a ldr r2, [r7, #4] 800c9e2: 7812 ldrb r2, [r2, #0] 800c9e4: 701a strb r2, [r3, #0] unicode[idx++] = USB_DESC_TYPE_STRING; 800c9e6: 7dfb ldrb r3, [r7, #23] 800c9e8: 1c5a adds r2, r3, #1 800c9ea: 75fa strb r2, [r7, #23] 800c9ec: 461a mov r2, r3 800c9ee: 68bb ldr r3, [r7, #8] 800c9f0: 4413 add r3, r2 800c9f2: 2203 movs r2, #3 800c9f4: 701a strb r2, [r3, #0] while (*desc != '\0') 800c9f6: e012 b.n 800ca1e { unicode[idx++] = *desc++; 800c9f8: 68fb ldr r3, [r7, #12] 800c9fa: 1c5a adds r2, r3, #1 800c9fc: 60fa str r2, [r7, #12] 800c9fe: 7dfa ldrb r2, [r7, #23] 800ca00: 1c51 adds r1, r2, #1 800ca02: 75f9 strb r1, [r7, #23] 800ca04: 4611 mov r1, r2 800ca06: 68ba ldr r2, [r7, #8] 800ca08: 440a add r2, r1 800ca0a: 781b ldrb r3, [r3, #0] 800ca0c: 7013 strb r3, [r2, #0] unicode[idx++] = 0U; 800ca0e: 7dfb ldrb r3, [r7, #23] 800ca10: 1c5a adds r2, r3, #1 800ca12: 75fa strb r2, [r7, #23] 800ca14: 461a mov r2, r3 800ca16: 68bb ldr r3, [r7, #8] 800ca18: 4413 add r3, r2 800ca1a: 2200 movs r2, #0 800ca1c: 701a strb r2, [r3, #0] while (*desc != '\0') 800ca1e: 68fb ldr r3, [r7, #12] 800ca20: 781b ldrb r3, [r3, #0] 800ca22: 2b00 cmp r3, #0 800ca24: d1e8 bne.n 800c9f8 } } } 800ca26: bf00 nop 800ca28: 3718 adds r7, #24 800ca2a: 46bd mov sp, r7 800ca2c: bd80 pop {r7, pc} 0800ca2e : * return the string length * @param buf : pointer to the ascii string buffer * @retval string length */ static uint8_t USBD_GetLen(uint8_t *buf) { 800ca2e: b480 push {r7} 800ca30: b085 sub sp, #20 800ca32: af00 add r7, sp, #0 800ca34: 6078 str r0, [r7, #4] uint8_t len = 0U; 800ca36: 2300 movs r3, #0 800ca38: 73fb strb r3, [r7, #15] while (*buf != '\0') 800ca3a: e005 b.n 800ca48 { len++; 800ca3c: 7bfb ldrb r3, [r7, #15] 800ca3e: 3301 adds r3, #1 800ca40: 73fb strb r3, [r7, #15] buf++; 800ca42: 687b ldr r3, [r7, #4] 800ca44: 3301 adds r3, #1 800ca46: 607b str r3, [r7, #4] while (*buf != '\0') 800ca48: 687b ldr r3, [r7, #4] 800ca4a: 781b ldrb r3, [r3, #0] 800ca4c: 2b00 cmp r3, #0 800ca4e: d1f5 bne.n 800ca3c } return len; 800ca50: 7bfb ldrb r3, [r7, #15] } 800ca52: 4618 mov r0, r3 800ca54: 3714 adds r7, #20 800ca56: 46bd mov sp, r7 800ca58: bc80 pop {r7} 800ca5a: 4770 bx lr 0800ca5c : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800ca5c: b580 push {r7, lr} 800ca5e: b084 sub sp, #16 800ca60: af00 add r7, sp, #0 800ca62: 60f8 str r0, [r7, #12] 800ca64: 60b9 str r1, [r7, #8] 800ca66: 4613 mov r3, r2 800ca68: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_IN; 800ca6a: 68fb ldr r3, [r7, #12] 800ca6c: 2202 movs r2, #2 800ca6e: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_in[0].total_length = len; 800ca72: 88fa ldrh r2, [r7, #6] 800ca74: 68fb ldr r3, [r7, #12] 800ca76: 61da str r2, [r3, #28] pdev->ep_in[0].rem_length = len; 800ca78: 88fa ldrh r2, [r7, #6] 800ca7a: 68fb ldr r3, [r7, #12] 800ca7c: 621a str r2, [r3, #32] /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800ca7e: 88fb ldrh r3, [r7, #6] 800ca80: 68ba ldr r2, [r7, #8] 800ca82: 2100 movs r1, #0 800ca84: 68f8 ldr r0, [r7, #12] 800ca86: f000 fce1 bl 800d44c return USBD_OK; 800ca8a: 2300 movs r3, #0 } 800ca8c: 4618 mov r0, r3 800ca8e: 3710 adds r7, #16 800ca90: 46bd mov sp, r7 800ca92: bd80 pop {r7, pc} 0800ca94 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800ca94: b580 push {r7, lr} 800ca96: b084 sub sp, #16 800ca98: af00 add r7, sp, #0 800ca9a: 60f8 str r0, [r7, #12] 800ca9c: 60b9 str r1, [r7, #8] 800ca9e: 4613 mov r3, r2 800caa0: 80fb strh r3, [r7, #6] /* Start the next transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800caa2: 88fb ldrh r3, [r7, #6] 800caa4: 68ba ldr r2, [r7, #8] 800caa6: 2100 movs r1, #0 800caa8: 68f8 ldr r0, [r7, #12] 800caaa: f000 fccf bl 800d44c return USBD_OK; 800caae: 2300 movs r3, #0 } 800cab0: 4618 mov r0, r3 800cab2: 3710 adds r7, #16 800cab4: 46bd mov sp, r7 800cab6: bd80 pop {r7, pc} 0800cab8 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800cab8: b580 push {r7, lr} 800caba: b084 sub sp, #16 800cabc: af00 add r7, sp, #0 800cabe: 60f8 str r0, [r7, #12] 800cac0: 60b9 str r1, [r7, #8] 800cac2: 4613 mov r3, r2 800cac4: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_OUT; 800cac6: 68fb ldr r3, [r7, #12] 800cac8: 2203 movs r2, #3 800caca: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_out[0].total_length = len; 800cace: 88fa ldrh r2, [r7, #6] 800cad0: 68fb ldr r3, [r7, #12] 800cad2: f8c3 215c str.w r2, [r3, #348] @ 0x15c pdev->ep_out[0].rem_length = len; 800cad6: 88fa ldrh r2, [r7, #6] 800cad8: 68fb ldr r3, [r7, #12] 800cada: f8c3 2160 str.w r2, [r3, #352] @ 0x160 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800cade: 88fb ldrh r3, [r7, #6] 800cae0: 68ba ldr r2, [r7, #8] 800cae2: 2100 movs r1, #0 800cae4: 68f8 ldr r0, [r7, #12] 800cae6: f000 fcd4 bl 800d492 return USBD_OK; 800caea: 2300 movs r3, #0 } 800caec: 4618 mov r0, r3 800caee: 3710 adds r7, #16 800caf0: 46bd mov sp, r7 800caf2: bd80 pop {r7, pc} 0800caf4 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800caf4: b580 push {r7, lr} 800caf6: b084 sub sp, #16 800caf8: af00 add r7, sp, #0 800cafa: 60f8 str r0, [r7, #12] 800cafc: 60b9 str r1, [r7, #8] 800cafe: 4613 mov r3, r2 800cb00: 80fb strh r3, [r7, #6] USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800cb02: 88fb ldrh r3, [r7, #6] 800cb04: 68ba ldr r2, [r7, #8] 800cb06: 2100 movs r1, #0 800cb08: 68f8 ldr r0, [r7, #12] 800cb0a: f000 fcc2 bl 800d492 return USBD_OK; 800cb0e: 2300 movs r3, #0 } 800cb10: 4618 mov r0, r3 800cb12: 3710 adds r7, #16 800cb14: 46bd mov sp, r7 800cb16: bd80 pop {r7, pc} 0800cb18 : * send zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) { 800cb18: b580 push {r7, lr} 800cb1a: b082 sub sp, #8 800cb1c: af00 add r7, sp, #0 800cb1e: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_IN; 800cb20: 687b ldr r3, [r7, #4] 800cb22: 2204 movs r2, #4 800cb24: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); 800cb28: 2300 movs r3, #0 800cb2a: 2200 movs r2, #0 800cb2c: 2100 movs r1, #0 800cb2e: 6878 ldr r0, [r7, #4] 800cb30: f000 fc8c bl 800d44c return USBD_OK; 800cb34: 2300 movs r3, #0 } 800cb36: 4618 mov r0, r3 800cb38: 3708 adds r7, #8 800cb3a: 46bd mov sp, r7 800cb3c: bd80 pop {r7, pc} 0800cb3e : * receive zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) { 800cb3e: b580 push {r7, lr} 800cb40: b082 sub sp, #8 800cb42: af00 add r7, sp, #0 800cb44: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_OUT; 800cb46: 687b ldr r3, [r7, #4] 800cb48: 2205 movs r2, #5 800cb4a: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800cb4e: 2300 movs r3, #0 800cb50: 2200 movs r2, #0 800cb52: 2100 movs r1, #0 800cb54: 6878 ldr r0, [r7, #4] 800cb56: f000 fc9c bl 800d492 return USBD_OK; 800cb5a: 2300 movs r3, #0 } 800cb5c: 4618 mov r0, r3 800cb5e: 3708 adds r7, #8 800cb60: 46bd mov sp, r7 800cb62: bd80 pop {r7, pc} 0800cb64 : /** * Init USB device Library, add supported class and start the library * @retval None */ void MX_USB_DEVICE_Init(void) { 800cb64: b580 push {r7, lr} 800cb66: af00 add r7, sp, #0 /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ /* USER CODE END USB_DEVICE_Init_PreTreatment */ /* Init Device Library, add supported class and start the library. */ if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK) 800cb68: 2200 movs r2, #0 800cb6a: 4912 ldr r1, [pc, #72] @ (800cbb4 ) 800cb6c: 4812 ldr r0, [pc, #72] @ (800cbb8 ) 800cb6e: f7fe ff62 bl 800ba36 800cb72: 4603 mov r3, r0 800cb74: 2b00 cmp r3, #0 800cb76: d001 beq.n 800cb7c { Error_Handler(); 800cb78: f7f6 fce0 bl 800353c } if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK) 800cb7c: 490f ldr r1, [pc, #60] @ (800cbbc ) 800cb7e: 480e ldr r0, [pc, #56] @ (800cbb8 ) 800cb80: f7fe ff84 bl 800ba8c 800cb84: 4603 mov r3, r0 800cb86: 2b00 cmp r3, #0 800cb88: d001 beq.n 800cb8e { Error_Handler(); 800cb8a: f7f6 fcd7 bl 800353c } if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK) 800cb8e: 490c ldr r1, [pc, #48] @ (800cbc0 ) 800cb90: 4809 ldr r0, [pc, #36] @ (800cbb8 ) 800cb92: f7fe feb5 bl 800b900 800cb96: 4603 mov r3, r0 800cb98: 2b00 cmp r3, #0 800cb9a: d001 beq.n 800cba0 { Error_Handler(); 800cb9c: f7f6 fcce bl 800353c } if (USBD_Start(&hUsbDeviceFS) != USBD_OK) 800cba0: 4805 ldr r0, [pc, #20] @ (800cbb8 ) 800cba2: f7fe ff8c bl 800babe 800cba6: 4603 mov r3, r0 800cba8: 2b00 cmp r3, #0 800cbaa: d001 beq.n 800cbb0 { Error_Handler(); 800cbac: f7f6 fcc6 bl 800353c } /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ /* USER CODE END USB_DEVICE_Init_PostTreatment */ } 800cbb0: bf00 nop 800cbb2: bd80 pop {r7, pc} 800cbb4: 20000134 .word 0x20000134 800cbb8: 20000474 .word 0x20000474 800cbbc: 20000020 .word 0x20000020 800cbc0: 20000124 .word 0x20000124 0800cbc4 : /* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ #define RX_FIFO_SZ 256 static uint8_t rx_fifo[RX_FIFO_SZ]; static volatile uint16_t rx_head = 0, rx_tail = 0; static void fifo_push(const uint8_t* data, uint32_t len) { 800cbc4: b480 push {r7} 800cbc6: b085 sub sp, #20 800cbc8: af00 add r7, sp, #0 800cbca: 6078 str r0, [r7, #4] 800cbcc: 6039 str r1, [r7, #0] while (len--) { 800cbce: e01e b.n 800cc0e uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u); 800cbd0: 4b14 ldr r3, [pc, #80] @ (800cc24 ) 800cbd2: 881b ldrh r3, [r3, #0] 800cbd4: b29b uxth r3, r3 800cbd6: 3301 adds r3, #1 800cbd8: b29b uxth r3, r3 800cbda: b2db uxtb r3, r3 800cbdc: 81fb strh r3, [r7, #14] if (next == (rx_tail & (RX_FIFO_SZ - 1u))) { 800cbde: 89fa ldrh r2, [r7, #14] 800cbe0: 4b11 ldr r3, [pc, #68] @ (800cc28 ) 800cbe2: 881b ldrh r3, [r3, #0] 800cbe4: b29b uxth r3, r3 800cbe6: b2db uxtb r3, r3 800cbe8: 429a cmp r2, r3 800cbea: d103 bne.n 800cbf4 /* overflow — drop byte (or set a flag) */ data++; 800cbec: 687b ldr r3, [r7, #4] 800cbee: 3301 adds r3, #1 800cbf0: 607b str r3, [r7, #4] continue; 800cbf2: e00c b.n 800cc0e } rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++; 800cbf4: 687b ldr r3, [r7, #4] 800cbf6: 1c5a adds r2, r3, #1 800cbf8: 607a str r2, [r7, #4] 800cbfa: 4a0a ldr r2, [pc, #40] @ (800cc24 ) 800cbfc: 8812 ldrh r2, [r2, #0] 800cbfe: b292 uxth r2, r2 800cc00: b2d2 uxtb r2, r2 800cc02: 7819 ldrb r1, [r3, #0] 800cc04: 4b09 ldr r3, [pc, #36] @ (800cc2c ) 800cc06: 5499 strb r1, [r3, r2] rx_head = next; 800cc08: 4a06 ldr r2, [pc, #24] @ (800cc24 ) 800cc0a: 89fb ldrh r3, [r7, #14] 800cc0c: 8013 strh r3, [r2, #0] while (len--) { 800cc0e: 683b ldr r3, [r7, #0] 800cc10: 1e5a subs r2, r3, #1 800cc12: 603a str r2, [r7, #0] 800cc14: 2b00 cmp r3, #0 800cc16: d1db bne.n 800cbd0 } } 800cc18: bf00 nop 800cc1a: bf00 nop 800cc1c: 3714 adds r7, #20 800cc1e: 46bd mov sp, r7 800cc20: bc80 pop {r7} 800cc22: 4770 bx lr 800cc24: 20001038 .word 0x20001038 800cc28: 2000103a .word 0x2000103a 800cc2c: 20000f38 .word 0x20000f38 0800cc30 : uint32_t CDC_Available(void) { 800cc30: b480 push {r7} 800cc32: af00 add r7, sp, #0 return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u)); 800cc34: 4b06 ldr r3, [pc, #24] @ (800cc50 ) 800cc36: 881b ldrh r3, [r3, #0] 800cc38: b29a uxth r2, r3 800cc3a: 4b06 ldr r3, [pc, #24] @ (800cc54 ) 800cc3c: 881b ldrh r3, [r3, #0] 800cc3e: b29b uxth r3, r3 800cc40: 1ad3 subs r3, r2, r3 800cc42: b29b uxth r3, r3 800cc44: b2db uxtb r3, r3 } 800cc46: 4618 mov r0, r3 800cc48: 46bd mov sp, r7 800cc4a: bc80 pop {r7} 800cc4c: 4770 bx lr 800cc4e: bf00 nop 800cc50: 20001038 .word 0x20001038 800cc54: 2000103a .word 0x2000103a 0800cc58 : int CDC_ReadByte(void) { 800cc58: b480 push {r7} 800cc5a: b083 sub sp, #12 800cc5c: af00 add r7, sp, #0 if (rx_tail == rx_head) return -1; 800cc5e: 4b10 ldr r3, [pc, #64] @ (800cca0 ) 800cc60: 881b ldrh r3, [r3, #0] 800cc62: b29a uxth r2, r3 800cc64: 4b0f ldr r3, [pc, #60] @ (800cca4 ) 800cc66: 881b ldrh r3, [r3, #0] 800cc68: b29b uxth r3, r3 800cc6a: 429a cmp r2, r3 800cc6c: d102 bne.n 800cc74 800cc6e: f04f 33ff mov.w r3, #4294967295 800cc72: e010 b.n 800cc96 int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)]; 800cc74: 4b0a ldr r3, [pc, #40] @ (800cca0 ) 800cc76: 881b ldrh r3, [r3, #0] 800cc78: b29b uxth r3, r3 800cc7a: b2db uxtb r3, r3 800cc7c: 4a0a ldr r2, [pc, #40] @ (800cca8 ) 800cc7e: 5cd3 ldrb r3, [r2, r3] 800cc80: 607b str r3, [r7, #4] rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u); 800cc82: 4b07 ldr r3, [pc, #28] @ (800cca0 ) 800cc84: 881b ldrh r3, [r3, #0] 800cc86: b29b uxth r3, r3 800cc88: 3301 adds r3, #1 800cc8a: b29b uxth r3, r3 800cc8c: b2db uxtb r3, r3 800cc8e: b29a uxth r2, r3 800cc90: 4b03 ldr r3, [pc, #12] @ (800cca0 ) 800cc92: 801a strh r2, [r3, #0] return b; 800cc94: 687b ldr r3, [r7, #4] } 800cc96: 4618 mov r0, r3 800cc98: 370c adds r7, #12 800cc9a: 46bd mov sp, r7 800cc9c: bc80 pop {r7} 800cc9e: 4770 bx lr 800cca0: 2000103a .word 0x2000103a 800cca4: 20001038 .word 0x20001038 800cca8: 20000f38 .word 0x20000f38 0800ccac : /** * @brief Initializes the CDC media low layer over the FS USB IP * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Init_FS(void) { 800ccac: b580 push {r7, lr} 800ccae: af00 add r7, sp, #0 /* USER CODE BEGIN 3 */ /* Set Application Buffers */ USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0); 800ccb0: 2200 movs r2, #0 800ccb2: 4905 ldr r1, [pc, #20] @ (800ccc8 ) 800ccb4: 4805 ldr r0, [pc, #20] @ (800cccc ) 800ccb6: f7fe fe39 bl 800b92c USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS); 800ccba: 4905 ldr r1, [pc, #20] @ (800ccd0 ) 800ccbc: 4803 ldr r0, [pc, #12] @ (800cccc ) 800ccbe: f7fe fe4e bl 800b95e return (USBD_OK); 800ccc2: 2300 movs r3, #0 /* USER CODE END 3 */ } 800ccc4: 4618 mov r0, r3 800ccc6: bd80 pop {r7, pc} 800ccc8: 20000b38 .word 0x20000b38 800cccc: 20000474 .word 0x20000474 800ccd0: 20000738 .word 0x20000738 0800ccd4 : /** * @brief DeInitializes the CDC media low layer * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_DeInit_FS(void) { 800ccd4: b480 push {r7} 800ccd6: af00 add r7, sp, #0 /* USER CODE BEGIN 4 */ return (USBD_OK); 800ccd8: 2300 movs r3, #0 /* USER CODE END 4 */ } 800ccda: 4618 mov r0, r3 800ccdc: 46bd mov sp, r7 800ccde: bc80 pop {r7} 800cce0: 4770 bx lr ... 0800cce4 : * @param pbuf: Buffer containing command data (request parameters) * @param length: Number of data to be sent (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length) { 800cce4: b480 push {r7} 800cce6: b083 sub sp, #12 800cce8: af00 add r7, sp, #0 800ccea: 4603 mov r3, r0 800ccec: 6039 str r1, [r7, #0] 800ccee: 71fb strb r3, [r7, #7] 800ccf0: 4613 mov r3, r2 800ccf2: 80bb strh r3, [r7, #4] /* USER CODE BEGIN 5 */ switch(cmd) 800ccf4: 79fb ldrb r3, [r7, #7] 800ccf6: 2b23 cmp r3, #35 @ 0x23 800ccf8: d84a bhi.n 800cd90 800ccfa: a201 add r2, pc, #4 @ (adr r2, 800cd00 ) 800ccfc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800cd00: 0800cd91 .word 0x0800cd91 800cd04: 0800cd91 .word 0x0800cd91 800cd08: 0800cd91 .word 0x0800cd91 800cd0c: 0800cd91 .word 0x0800cd91 800cd10: 0800cd91 .word 0x0800cd91 800cd14: 0800cd91 .word 0x0800cd91 800cd18: 0800cd91 .word 0x0800cd91 800cd1c: 0800cd91 .word 0x0800cd91 800cd20: 0800cd91 .word 0x0800cd91 800cd24: 0800cd91 .word 0x0800cd91 800cd28: 0800cd91 .word 0x0800cd91 800cd2c: 0800cd91 .word 0x0800cd91 800cd30: 0800cd91 .word 0x0800cd91 800cd34: 0800cd91 .word 0x0800cd91 800cd38: 0800cd91 .word 0x0800cd91 800cd3c: 0800cd91 .word 0x0800cd91 800cd40: 0800cd91 .word 0x0800cd91 800cd44: 0800cd91 .word 0x0800cd91 800cd48: 0800cd91 .word 0x0800cd91 800cd4c: 0800cd91 .word 0x0800cd91 800cd50: 0800cd91 .word 0x0800cd91 800cd54: 0800cd91 .word 0x0800cd91 800cd58: 0800cd91 .word 0x0800cd91 800cd5c: 0800cd91 .word 0x0800cd91 800cd60: 0800cd91 .word 0x0800cd91 800cd64: 0800cd91 .word 0x0800cd91 800cd68: 0800cd91 .word 0x0800cd91 800cd6c: 0800cd91 .word 0x0800cd91 800cd70: 0800cd91 .word 0x0800cd91 800cd74: 0800cd91 .word 0x0800cd91 800cd78: 0800cd91 .word 0x0800cd91 800cd7c: 0800cd91 .word 0x0800cd91 800cd80: 0800cd91 .word 0x0800cd91 800cd84: 0800cd91 .word 0x0800cd91 800cd88: 0800cd91 .word 0x0800cd91 800cd8c: 0800cd91 .word 0x0800cd91 case CDC_SEND_BREAK: break; default: break; 800cd90: bf00 nop } return (USBD_OK); 800cd92: 2300 movs r3, #0 /* USER CODE END 5 */ } 800cd94: 4618 mov r0, r3 800cd96: 370c adds r7, #12 800cd98: 46bd mov sp, r7 800cd9a: bc80 pop {r7} 800cd9c: 4770 bx lr 800cd9e: bf00 nop 0800cda0 : * @param Buf: Buffer of data to be received * @param Len: Number of data received (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len) { 800cda0: b580 push {r7, lr} 800cda2: b082 sub sp, #8 800cda4: af00 add r7, sp, #0 800cda6: 6078 str r0, [r7, #4] 800cda8: 6039 str r1, [r7, #0] /* USER CODE BEGIN 6 */ if (*Len) fifo_push(Buf, *Len); 800cdaa: 683b ldr r3, [r7, #0] 800cdac: 681b ldr r3, [r3, #0] 800cdae: 2b00 cmp r3, #0 800cdb0: d005 beq.n 800cdbe 800cdb2: 683b ldr r3, [r7, #0] 800cdb4: 681b ldr r3, [r3, #0] 800cdb6: 4619 mov r1, r3 800cdb8: 6878 ldr r0, [r7, #4] 800cdba: f7ff ff03 bl 800cbc4 USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); 800cdbe: 6879 ldr r1, [r7, #4] 800cdc0: 4805 ldr r0, [pc, #20] @ (800cdd8 ) 800cdc2: f7fe fdcc bl 800b95e USBD_CDC_ReceivePacket(&hUsbDeviceFS); 800cdc6: 4804 ldr r0, [pc, #16] @ (800cdd8 ) 800cdc8: f7fe fe0b bl 800b9e2 return (USBD_OK); 800cdcc: 2300 movs r3, #0 /* USER CODE END 6 */ } 800cdce: 4618 mov r0, r3 800cdd0: 3708 adds r7, #8 800cdd2: 46bd mov sp, r7 800cdd4: bd80 pop {r7, pc} 800cdd6: bf00 nop 800cdd8: 20000474 .word 0x20000474 0800cddc : * @param Buf: Buffer of data to be sent * @param Len: Number of data to be sent (in bytes) * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY */ uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) { 800cddc: b580 push {r7, lr} 800cdde: b084 sub sp, #16 800cde0: af00 add r7, sp, #0 800cde2: 6078 str r0, [r7, #4] 800cde4: 460b mov r3, r1 800cde6: 807b strh r3, [r7, #2] uint8_t result = USBD_OK; 800cde8: 2300 movs r3, #0 800cdea: 73fb strb r3, [r7, #15] /* USER CODE BEGIN 7 */ USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData; 800cdec: 4b0d ldr r3, [pc, #52] @ (800ce24 ) 800cdee: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800cdf2: 60bb str r3, [r7, #8] if (hcdc->TxState != 0){ 800cdf4: 68bb ldr r3, [r7, #8] 800cdf6: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 800cdfa: 2b00 cmp r3, #0 800cdfc: d001 beq.n 800ce02 return USBD_BUSY; 800cdfe: 2301 movs r3, #1 800ce00: e00b b.n 800ce1a } USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len); 800ce02: 887b ldrh r3, [r7, #2] 800ce04: 461a mov r2, r3 800ce06: 6879 ldr r1, [r7, #4] 800ce08: 4806 ldr r0, [pc, #24] @ (800ce24 ) 800ce0a: f7fe fd8f bl 800b92c result = USBD_CDC_TransmitPacket(&hUsbDeviceFS); 800ce0e: 4805 ldr r0, [pc, #20] @ (800ce24 ) 800ce10: f7fe fdb8 bl 800b984 800ce14: 4603 mov r3, r0 800ce16: 73fb strb r3, [r7, #15] /* USER CODE END 7 */ return result; 800ce18: 7bfb ldrb r3, [r7, #15] } 800ce1a: 4618 mov r0, r3 800ce1c: 3710 adds r7, #16 800ce1e: 46bd mov sp, r7 800ce20: bd80 pop {r7, pc} 800ce22: bf00 nop 800ce24: 20000474 .word 0x20000474 0800ce28 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ce28: b480 push {r7} 800ce2a: b083 sub sp, #12 800ce2c: af00 add r7, sp, #0 800ce2e: 4603 mov r3, r0 800ce30: 6039 str r1, [r7, #0] 800ce32: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_DeviceDesc); 800ce34: 683b ldr r3, [r7, #0] 800ce36: 2212 movs r2, #18 800ce38: 801a strh r2, [r3, #0] return USBD_FS_DeviceDesc; 800ce3a: 4b03 ldr r3, [pc, #12] @ (800ce48 ) } 800ce3c: 4618 mov r0, r3 800ce3e: 370c adds r7, #12 800ce40: 46bd mov sp, r7 800ce42: bc80 pop {r7} 800ce44: 4770 bx lr 800ce46: bf00 nop 800ce48: 20000150 .word 0x20000150 0800ce4c : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ce4c: b480 push {r7} 800ce4e: b083 sub sp, #12 800ce50: af00 add r7, sp, #0 800ce52: 4603 mov r3, r0 800ce54: 6039 str r1, [r7, #0] 800ce56: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_LangIDDesc); 800ce58: 683b ldr r3, [r7, #0] 800ce5a: 2204 movs r2, #4 800ce5c: 801a strh r2, [r3, #0] return USBD_LangIDDesc; 800ce5e: 4b03 ldr r3, [pc, #12] @ (800ce6c ) } 800ce60: 4618 mov r0, r3 800ce62: 370c adds r7, #12 800ce64: 46bd mov sp, r7 800ce66: bc80 pop {r7} 800ce68: 4770 bx lr 800ce6a: bf00 nop 800ce6c: 20000164 .word 0x20000164 0800ce70 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ce70: b580 push {r7, lr} 800ce72: b082 sub sp, #8 800ce74: af00 add r7, sp, #0 800ce76: 4603 mov r3, r0 800ce78: 6039 str r1, [r7, #0] 800ce7a: 71fb strb r3, [r7, #7] if(speed == 0) 800ce7c: 79fb ldrb r3, [r7, #7] 800ce7e: 2b00 cmp r3, #0 800ce80: d105 bne.n 800ce8e { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800ce82: 683a ldr r2, [r7, #0] 800ce84: 4907 ldr r1, [pc, #28] @ (800cea4 ) 800ce86: 4808 ldr r0, [pc, #32] @ (800cea8 ) 800ce88: f7ff fd8f bl 800c9aa 800ce8c: e004 b.n 800ce98 } else { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800ce8e: 683a ldr r2, [r7, #0] 800ce90: 4904 ldr r1, [pc, #16] @ (800cea4 ) 800ce92: 4805 ldr r0, [pc, #20] @ (800cea8 ) 800ce94: f7ff fd89 bl 800c9aa } return USBD_StrDesc; 800ce98: 4b02 ldr r3, [pc, #8] @ (800cea4 ) } 800ce9a: 4618 mov r0, r3 800ce9c: 3708 adds r7, #8 800ce9e: 46bd mov sp, r7 800cea0: bd80 pop {r7, pc} 800cea2: bf00 nop 800cea4: 2000103c .word 0x2000103c 800cea8: 0800e140 .word 0x0800e140 0800ceac : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ceac: b580 push {r7, lr} 800ceae: b082 sub sp, #8 800ceb0: af00 add r7, sp, #0 800ceb2: 4603 mov r3, r0 800ceb4: 6039 str r1, [r7, #0] 800ceb6: 71fb strb r3, [r7, #7] UNUSED(speed); USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 800ceb8: 683a ldr r2, [r7, #0] 800ceba: 4904 ldr r1, [pc, #16] @ (800cecc ) 800cebc: 4804 ldr r0, [pc, #16] @ (800ced0 ) 800cebe: f7ff fd74 bl 800c9aa return USBD_StrDesc; 800cec2: 4b02 ldr r3, [pc, #8] @ (800cecc ) } 800cec4: 4618 mov r0, r3 800cec6: 3708 adds r7, #8 800cec8: 46bd mov sp, r7 800ceca: bd80 pop {r7, pc} 800cecc: 2000103c .word 0x2000103c 800ced0: 0800e158 .word 0x0800e158 0800ced4 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800ced4: b580 push {r7, lr} 800ced6: b082 sub sp, #8 800ced8: af00 add r7, sp, #0 800ceda: 4603 mov r3, r0 800cedc: 6039 str r1, [r7, #0] 800cede: 71fb strb r3, [r7, #7] UNUSED(speed); *length = USB_SIZ_STRING_SERIAL; 800cee0: 683b ldr r3, [r7, #0] 800cee2: 221a movs r2, #26 800cee4: 801a strh r2, [r3, #0] /* Update the serial number string descriptor with the data from the unique * ID */ Get_SerialNum(); 800cee6: f000 f843 bl 800cf70 /* USER CODE BEGIN USBD_FS_SerialStrDescriptor */ /* USER CODE END USBD_FS_SerialStrDescriptor */ return (uint8_t *) USBD_StringSerial; 800ceea: 4b02 ldr r3, [pc, #8] @ (800cef4 ) } 800ceec: 4618 mov r0, r3 800ceee: 3708 adds r7, #8 800cef0: 46bd mov sp, r7 800cef2: bd80 pop {r7, pc} 800cef4: 20000168 .word 0x20000168 0800cef8 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cef8: b580 push {r7, lr} 800cefa: b082 sub sp, #8 800cefc: af00 add r7, sp, #0 800cefe: 4603 mov r3, r0 800cf00: 6039 str r1, [r7, #0] 800cf02: 71fb strb r3, [r7, #7] if(speed == USBD_SPEED_HIGH) 800cf04: 79fb ldrb r3, [r7, #7] 800cf06: 2b00 cmp r3, #0 800cf08: d105 bne.n 800cf16 { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800cf0a: 683a ldr r2, [r7, #0] 800cf0c: 4907 ldr r1, [pc, #28] @ (800cf2c ) 800cf0e: 4808 ldr r0, [pc, #32] @ (800cf30 ) 800cf10: f7ff fd4b bl 800c9aa 800cf14: e004 b.n 800cf20 } else { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800cf16: 683a ldr r2, [r7, #0] 800cf18: 4904 ldr r1, [pc, #16] @ (800cf2c ) 800cf1a: 4805 ldr r0, [pc, #20] @ (800cf30 ) 800cf1c: f7ff fd45 bl 800c9aa } return USBD_StrDesc; 800cf20: 4b02 ldr r3, [pc, #8] @ (800cf2c ) } 800cf22: 4618 mov r0, r3 800cf24: 3708 adds r7, #8 800cf26: 46bd mov sp, r7 800cf28: bd80 pop {r7, pc} 800cf2a: bf00 nop 800cf2c: 2000103c .word 0x2000103c 800cf30: 0800e16c .word 0x0800e16c 0800cf34 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800cf34: b580 push {r7, lr} 800cf36: b082 sub sp, #8 800cf38: af00 add r7, sp, #0 800cf3a: 4603 mov r3, r0 800cf3c: 6039 str r1, [r7, #0] 800cf3e: 71fb strb r3, [r7, #7] if(speed == 0) 800cf40: 79fb ldrb r3, [r7, #7] 800cf42: 2b00 cmp r3, #0 800cf44: d105 bne.n 800cf52 { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800cf46: 683a ldr r2, [r7, #0] 800cf48: 4907 ldr r1, [pc, #28] @ (800cf68 ) 800cf4a: 4808 ldr r0, [pc, #32] @ (800cf6c ) 800cf4c: f7ff fd2d bl 800c9aa 800cf50: e004 b.n 800cf5c } else { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800cf52: 683a ldr r2, [r7, #0] 800cf54: 4904 ldr r1, [pc, #16] @ (800cf68 ) 800cf56: 4805 ldr r0, [pc, #20] @ (800cf6c ) 800cf58: f7ff fd27 bl 800c9aa } return USBD_StrDesc; 800cf5c: 4b02 ldr r3, [pc, #8] @ (800cf68 ) } 800cf5e: 4618 mov r0, r3 800cf60: 3708 adds r7, #8 800cf62: 46bd mov sp, r7 800cf64: bd80 pop {r7, pc} 800cf66: bf00 nop 800cf68: 2000103c .word 0x2000103c 800cf6c: 0800e178 .word 0x0800e178 0800cf70 : * @brief Create the serial number string descriptor * @param None * @retval None */ static void Get_SerialNum(void) { 800cf70: b580 push {r7, lr} 800cf72: b084 sub sp, #16 800cf74: af00 add r7, sp, #0 uint32_t deviceserial0; uint32_t deviceserial1; uint32_t deviceserial2; deviceserial0 = *(uint32_t *) DEVICE_ID1; 800cf76: 4b0f ldr r3, [pc, #60] @ (800cfb4 ) 800cf78: 681b ldr r3, [r3, #0] 800cf7a: 60fb str r3, [r7, #12] deviceserial1 = *(uint32_t *) DEVICE_ID2; 800cf7c: 4b0e ldr r3, [pc, #56] @ (800cfb8 ) 800cf7e: 681b ldr r3, [r3, #0] 800cf80: 60bb str r3, [r7, #8] deviceserial2 = *(uint32_t *) DEVICE_ID3; 800cf82: 4b0e ldr r3, [pc, #56] @ (800cfbc ) 800cf84: 681b ldr r3, [r3, #0] 800cf86: 607b str r3, [r7, #4] deviceserial0 += deviceserial2; 800cf88: 68fa ldr r2, [r7, #12] 800cf8a: 687b ldr r3, [r7, #4] 800cf8c: 4413 add r3, r2 800cf8e: 60fb str r3, [r7, #12] if (deviceserial0 != 0) 800cf90: 68fb ldr r3, [r7, #12] 800cf92: 2b00 cmp r3, #0 800cf94: d009 beq.n 800cfaa { IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8); 800cf96: 2208 movs r2, #8 800cf98: 4909 ldr r1, [pc, #36] @ (800cfc0 ) 800cf9a: 68f8 ldr r0, [r7, #12] 800cf9c: f000 f814 bl 800cfc8 IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4); 800cfa0: 2204 movs r2, #4 800cfa2: 4908 ldr r1, [pc, #32] @ (800cfc4 ) 800cfa4: 68b8 ldr r0, [r7, #8] 800cfa6: f000 f80f bl 800cfc8 } } 800cfaa: bf00 nop 800cfac: 3710 adds r7, #16 800cfae: 46bd mov sp, r7 800cfb0: bd80 pop {r7, pc} 800cfb2: bf00 nop 800cfb4: 1ffff7e8 .word 0x1ffff7e8 800cfb8: 1ffff7ec .word 0x1ffff7ec 800cfbc: 1ffff7f0 .word 0x1ffff7f0 800cfc0: 2000016a .word 0x2000016a 800cfc4: 2000017a .word 0x2000017a 0800cfc8 : * @param pbuf: pointer to the buffer * @param len: buffer length * @retval None */ static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len) { 800cfc8: b480 push {r7} 800cfca: b087 sub sp, #28 800cfcc: af00 add r7, sp, #0 800cfce: 60f8 str r0, [r7, #12] 800cfd0: 60b9 str r1, [r7, #8] 800cfd2: 4613 mov r3, r2 800cfd4: 71fb strb r3, [r7, #7] uint8_t idx = 0; 800cfd6: 2300 movs r3, #0 800cfd8: 75fb strb r3, [r7, #23] for (idx = 0; idx < len; idx++) 800cfda: 2300 movs r3, #0 800cfdc: 75fb strb r3, [r7, #23] 800cfde: e027 b.n 800d030 { if (((value >> 28)) < 0xA) 800cfe0: 68fb ldr r3, [r7, #12] 800cfe2: 0f1b lsrs r3, r3, #28 800cfe4: 2b09 cmp r3, #9 800cfe6: d80b bhi.n 800d000 { pbuf[2 * idx] = (value >> 28) + '0'; 800cfe8: 68fb ldr r3, [r7, #12] 800cfea: 0f1b lsrs r3, r3, #28 800cfec: b2da uxtb r2, r3 800cfee: 7dfb ldrb r3, [r7, #23] 800cff0: 005b lsls r3, r3, #1 800cff2: 4619 mov r1, r3 800cff4: 68bb ldr r3, [r7, #8] 800cff6: 440b add r3, r1 800cff8: 3230 adds r2, #48 @ 0x30 800cffa: b2d2 uxtb r2, r2 800cffc: 701a strb r2, [r3, #0] 800cffe: e00a b.n 800d016 } else { pbuf[2 * idx] = (value >> 28) + 'A' - 10; 800d000: 68fb ldr r3, [r7, #12] 800d002: 0f1b lsrs r3, r3, #28 800d004: b2da uxtb r2, r3 800d006: 7dfb ldrb r3, [r7, #23] 800d008: 005b lsls r3, r3, #1 800d00a: 4619 mov r1, r3 800d00c: 68bb ldr r3, [r7, #8] 800d00e: 440b add r3, r1 800d010: 3237 adds r2, #55 @ 0x37 800d012: b2d2 uxtb r2, r2 800d014: 701a strb r2, [r3, #0] } value = value << 4; 800d016: 68fb ldr r3, [r7, #12] 800d018: 011b lsls r3, r3, #4 800d01a: 60fb str r3, [r7, #12] pbuf[2 * idx + 1] = 0; 800d01c: 7dfb ldrb r3, [r7, #23] 800d01e: 005b lsls r3, r3, #1 800d020: 3301 adds r3, #1 800d022: 68ba ldr r2, [r7, #8] 800d024: 4413 add r3, r2 800d026: 2200 movs r2, #0 800d028: 701a strb r2, [r3, #0] for (idx = 0; idx < len; idx++) 800d02a: 7dfb ldrb r3, [r7, #23] 800d02c: 3301 adds r3, #1 800d02e: 75fb strb r3, [r7, #23] 800d030: 7dfa ldrb r2, [r7, #23] 800d032: 79fb ldrb r3, [r7, #7] 800d034: 429a cmp r2, r3 800d036: d3d3 bcc.n 800cfe0 } } 800d038: bf00 nop 800d03a: bf00 nop 800d03c: 371c adds r7, #28 800d03e: 46bd mov sp, r7 800d040: bc80 pop {r7} 800d042: 4770 bx lr 0800d044 : LL Driver Callbacks (PCD -> USB Device Library) *******************************************************************************/ /* MSP Init */ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) { 800d044: b580 push {r7, lr} 800d046: b084 sub sp, #16 800d048: af00 add r7, sp, #0 800d04a: 6078 str r0, [r7, #4] if(pcdHandle->Instance==USB) 800d04c: 687b ldr r3, [r7, #4] 800d04e: 681b ldr r3, [r3, #0] 800d050: 4a0d ldr r2, [pc, #52] @ (800d088 ) 800d052: 4293 cmp r3, r2 800d054: d113 bne.n 800d07e { /* USER CODE BEGIN USB_MspInit 0 */ /* USER CODE END USB_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USB_CLK_ENABLE(); 800d056: 4b0d ldr r3, [pc, #52] @ (800d08c ) 800d058: 69db ldr r3, [r3, #28] 800d05a: 4a0c ldr r2, [pc, #48] @ (800d08c ) 800d05c: f443 0300 orr.w r3, r3, #8388608 @ 0x800000 800d060: 61d3 str r3, [r2, #28] 800d062: 4b0a ldr r3, [pc, #40] @ (800d08c ) 800d064: 69db ldr r3, [r3, #28] 800d066: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800d06a: 60fb str r3, [r7, #12] 800d06c: 68fb ldr r3, [r7, #12] /* Peripheral interrupt init */ HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0); 800d06e: 2200 movs r2, #0 800d070: 2100 movs r1, #0 800d072: 2014 movs r0, #20 800d074: f7f7 fdc3 bl 8004bfe HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn); 800d078: 2014 movs r0, #20 800d07a: f7f7 fddc bl 8004c36 /* USER CODE BEGIN USB_MspInit 1 */ /* USER CODE END USB_MspInit 1 */ } } 800d07e: bf00 nop 800d080: 3710 adds r7, #16 800d082: 46bd mov sp, r7 800d084: bd80 pop {r7, pc} 800d086: bf00 nop 800d088: 40005c00 .word 0x40005c00 800d08c: 40021000 .word 0x40021000 0800d090 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d090: b580 push {r7, lr} 800d092: b082 sub sp, #8 800d094: af00 add r7, sp, #0 800d096: 6078 str r0, [r7, #4] USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); 800d098: 687b ldr r3, [r7, #4] 800d09a: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800d09e: 687b ldr r3, [r7, #4] 800d0a0: f503 7326 add.w r3, r3, #664 @ 0x298 800d0a4: 4619 mov r1, r3 800d0a6: 4610 mov r0, r2 800d0a8: f7fe fd51 bl 800bb4e } 800d0ac: bf00 nop 800d0ae: 3708 adds r7, #8 800d0b0: 46bd mov sp, r7 800d0b2: bd80 pop {r7, pc} 0800d0b4 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d0b4: b580 push {r7, lr} 800d0b6: b082 sub sp, #8 800d0b8: af00 add r7, sp, #0 800d0ba: 6078 str r0, [r7, #4] 800d0bc: 460b mov r3, r1 800d0be: 70fb strb r3, [r7, #3] USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); 800d0c0: 687b ldr r3, [r7, #4] 800d0c2: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800d0c6: 78fa ldrb r2, [r7, #3] 800d0c8: 6879 ldr r1, [r7, #4] 800d0ca: 4613 mov r3, r2 800d0cc: 009b lsls r3, r3, #2 800d0ce: 4413 add r3, r2 800d0d0: 00db lsls r3, r3, #3 800d0d2: 440b add r3, r1 800d0d4: f503 73b2 add.w r3, r3, #356 @ 0x164 800d0d8: 681a ldr r2, [r3, #0] 800d0da: 78fb ldrb r3, [r7, #3] 800d0dc: 4619 mov r1, r3 800d0de: f7fe fd83 bl 800bbe8 } 800d0e2: bf00 nop 800d0e4: 3708 adds r7, #8 800d0e6: 46bd mov sp, r7 800d0e8: bd80 pop {r7, pc} 0800d0ea : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d0ea: b580 push {r7, lr} 800d0ec: b082 sub sp, #8 800d0ee: af00 add r7, sp, #0 800d0f0: 6078 str r0, [r7, #4] 800d0f2: 460b mov r3, r1 800d0f4: 70fb strb r3, [r7, #3] USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); 800d0f6: 687b ldr r3, [r7, #4] 800d0f8: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800d0fc: 78fa ldrb r2, [r7, #3] 800d0fe: 6879 ldr r1, [r7, #4] 800d100: 4613 mov r3, r2 800d102: 009b lsls r3, r3, #2 800d104: 4413 add r3, r2 800d106: 00db lsls r3, r3, #3 800d108: 440b add r3, r1 800d10a: 3324 adds r3, #36 @ 0x24 800d10c: 681a ldr r2, [r3, #0] 800d10e: 78fb ldrb r3, [r7, #3] 800d110: 4619 mov r1, r3 800d112: f7fe fdda bl 800bcca } 800d116: bf00 nop 800d118: 3708 adds r7, #8 800d11a: 46bd mov sp, r7 800d11c: bd80 pop {r7, pc} 0800d11e : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d11e: b580 push {r7, lr} 800d120: b082 sub sp, #8 800d122: af00 add r7, sp, #0 800d124: 6078 str r0, [r7, #4] USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); 800d126: 687b ldr r3, [r7, #4] 800d128: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800d12c: 4618 mov r0, r3 800d12e: f7fe feea bl 800bf06 } 800d132: bf00 nop 800d134: 3708 adds r7, #8 800d136: 46bd mov sp, r7 800d138: bd80 pop {r7, pc} 0800d13a : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d13a: b580 push {r7, lr} 800d13c: b084 sub sp, #16 800d13e: af00 add r7, sp, #0 800d140: 6078 str r0, [r7, #4] USBD_SpeedTypeDef speed = USBD_SPEED_FULL; 800d142: 2301 movs r3, #1 800d144: 73fb strb r3, [r7, #15] if ( hpcd->Init.speed != PCD_SPEED_FULL) 800d146: 687b ldr r3, [r7, #4] 800d148: 799b ldrb r3, [r3, #6] 800d14a: 2b02 cmp r3, #2 800d14c: d001 beq.n 800d152 { Error_Handler(); 800d14e: f7f6 f9f5 bl 800353c } /* Set Speed. */ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); 800d152: 687b ldr r3, [r7, #4] 800d154: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800d158: 7bfa ldrb r2, [r7, #15] 800d15a: 4611 mov r1, r2 800d15c: 4618 mov r0, r3 800d15e: f7fe fe9a bl 800be96 /* Reset Device. */ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); 800d162: 687b ldr r3, [r7, #4] 800d164: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800d168: 4618 mov r0, r3 800d16a: f7fe fe53 bl 800be14 } 800d16e: bf00 nop 800d170: 3710 adds r7, #16 800d172: 46bd mov sp, r7 800d174: bd80 pop {r7, pc} ... 0800d178 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d178: b580 push {r7, lr} 800d17a: b082 sub sp, #8 800d17c: af00 add r7, sp, #0 800d17e: 6078 str r0, [r7, #4] /* Inform USB library that core enters in suspend Mode. */ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); 800d180: 687b ldr r3, [r7, #4] 800d182: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800d186: 4618 mov r0, r3 800d188: f7fe fe94 bl 800beb4 /* Enter in STOP mode. */ /* USER CODE BEGIN 2 */ if (hpcd->Init.low_power_enable) 800d18c: 687b ldr r3, [r7, #4] 800d18e: 7a9b ldrb r3, [r3, #10] 800d190: 2b00 cmp r3, #0 800d192: d005 beq.n 800d1a0 { /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 800d194: 4b04 ldr r3, [pc, #16] @ (800d1a8 ) 800d196: 691b ldr r3, [r3, #16] 800d198: 4a03 ldr r2, [pc, #12] @ (800d1a8 ) 800d19a: f043 0306 orr.w r3, r3, #6 800d19e: 6113 str r3, [r2, #16] } /* USER CODE END 2 */ } 800d1a0: bf00 nop 800d1a2: 3708 adds r7, #8 800d1a4: 46bd mov sp, r7 800d1a6: bd80 pop {r7, pc} 800d1a8: e000ed00 .word 0xe000ed00 0800d1ac : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d1ac: b580 push {r7, lr} 800d1ae: b082 sub sp, #8 800d1b0: af00 add r7, sp, #0 800d1b2: 6078 str r0, [r7, #4] /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); 800d1b4: 687b ldr r3, [r7, #4] 800d1b6: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800d1ba: 4618 mov r0, r3 800d1bc: f7fe fe8e bl 800bedc } 800d1c0: bf00 nop 800d1c2: 3708 adds r7, #8 800d1c4: 46bd mov sp, r7 800d1c6: bd80 pop {r7, pc} 0800d1c8 : * @brief Initializes the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) { 800d1c8: b580 push {r7, lr} 800d1ca: b082 sub sp, #8 800d1cc: af00 add r7, sp, #0 800d1ce: 6078 str r0, [r7, #4] /* Init USB Ip. */ /* Link the driver to the stack. */ hpcd_USB_FS.pData = pdev; 800d1d0: 4a28 ldr r2, [pc, #160] @ (800d274 ) 800d1d2: 687b ldr r3, [r7, #4] 800d1d4: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4 pdev->pData = &hpcd_USB_FS; 800d1d8: 687b ldr r3, [r7, #4] 800d1da: 4a26 ldr r2, [pc, #152] @ (800d274 ) 800d1dc: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0 hpcd_USB_FS.Instance = USB; 800d1e0: 4b24 ldr r3, [pc, #144] @ (800d274 ) 800d1e2: 4a25 ldr r2, [pc, #148] @ (800d278 ) 800d1e4: 601a str r2, [r3, #0] hpcd_USB_FS.Init.dev_endpoints = 8; 800d1e6: 4b23 ldr r3, [pc, #140] @ (800d274 ) 800d1e8: 2208 movs r2, #8 800d1ea: 711a strb r2, [r3, #4] hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; 800d1ec: 4b21 ldr r3, [pc, #132] @ (800d274 ) 800d1ee: 2202 movs r2, #2 800d1f0: 719a strb r2, [r3, #6] hpcd_USB_FS.Init.low_power_enable = DISABLE; 800d1f2: 4b20 ldr r3, [pc, #128] @ (800d274 ) 800d1f4: 2200 movs r2, #0 800d1f6: 729a strb r2, [r3, #10] hpcd_USB_FS.Init.lpm_enable = DISABLE; 800d1f8: 4b1e ldr r3, [pc, #120] @ (800d274 ) 800d1fa: 2200 movs r2, #0 800d1fc: 72da strb r2, [r3, #11] hpcd_USB_FS.Init.battery_charging_enable = DISABLE; 800d1fe: 4b1d ldr r3, [pc, #116] @ (800d274 ) 800d200: 2200 movs r2, #0 800d202: 731a strb r2, [r3, #12] if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) 800d204: 481b ldr r0, [pc, #108] @ (800d274 ) 800d206: f7f8 faf1 bl 80057ec 800d20a: 4603 mov r3, r0 800d20c: 2b00 cmp r3, #0 800d20e: d001 beq.n 800d214 { Error_Handler( ); 800d210: f7f6 f994 bl 800353c HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback); HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback); HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* USER CODE BEGIN EndPoint_Configuration */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18); 800d214: 687b ldr r3, [r7, #4] 800d216: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d21a: 2318 movs r3, #24 800d21c: 2200 movs r2, #0 800d21e: 2100 movs r1, #0 800d220: f7fa f802 bl 8007228 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58); 800d224: 687b ldr r3, [r7, #4] 800d226: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d22a: 2358 movs r3, #88 @ 0x58 800d22c: 2200 movs r2, #0 800d22e: 2180 movs r1, #128 @ 0x80 800d230: f7f9 fffa bl 8007228 /* USER CODE END EndPoint_Configuration */ /* USER CODE BEGIN EndPoint_Configuration_CDC */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0); 800d234: 687b ldr r3, [r7, #4] 800d236: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d23a: 23c0 movs r3, #192 @ 0xc0 800d23c: 2200 movs r2, #0 800d23e: 2181 movs r1, #129 @ 0x81 800d240: f7f9 fff2 bl 8007228 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110); 800d244: 687b ldr r3, [r7, #4] 800d246: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d24a: f44f 7388 mov.w r3, #272 @ 0x110 800d24e: 2200 movs r2, #0 800d250: 2101 movs r1, #1 800d252: f7f9 ffe9 bl 8007228 HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100); 800d256: 687b ldr r3, [r7, #4] 800d258: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d25c: f44f 7380 mov.w r3, #256 @ 0x100 800d260: 2200 movs r2, #0 800d262: 2182 movs r1, #130 @ 0x82 800d264: f7f9 ffe0 bl 8007228 /* USER CODE END EndPoint_Configuration_CDC */ return USBD_OK; 800d268: 2300 movs r3, #0 } 800d26a: 4618 mov r0, r3 800d26c: 3708 adds r7, #8 800d26e: 46bd mov sp, r7 800d270: bd80 pop {r7, pc} 800d272: bf00 nop 800d274: 2000123c .word 0x2000123c 800d278: 40005c00 .word 0x40005c00 0800d27c : * @brief Starts the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) { 800d27c: b580 push {r7, lr} 800d27e: b084 sub sp, #16 800d280: af00 add r7, sp, #0 800d282: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_status = HAL_OK; 800d284: 2300 movs r3, #0 800d286: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d288: 2300 movs r3, #0 800d28a: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_Start(pdev->pData); 800d28c: 687b ldr r3, [r7, #4] 800d28e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d292: 4618 mov r0, r3 800d294: f7f8 fba0 bl 80059d8 800d298: 4603 mov r3, r0 800d29a: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d29c: 7bfb ldrb r3, [r7, #15] 800d29e: 4618 mov r0, r3 800d2a0: f000 f94e bl 800d540 800d2a4: 4603 mov r3, r0 800d2a6: 73bb strb r3, [r7, #14] return usb_status; 800d2a8: 7bbb ldrb r3, [r7, #14] } 800d2aa: 4618 mov r0, r3 800d2ac: 3710 adds r7, #16 800d2ae: 46bd mov sp, r7 800d2b0: bd80 pop {r7, pc} 0800d2b2 : * @param ep_type: Endpoint type * @param ep_mps: Endpoint max packet size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) { 800d2b2: b580 push {r7, lr} 800d2b4: b084 sub sp, #16 800d2b6: af00 add r7, sp, #0 800d2b8: 6078 str r0, [r7, #4] 800d2ba: 4608 mov r0, r1 800d2bc: 4611 mov r1, r2 800d2be: 461a mov r2, r3 800d2c0: 4603 mov r3, r0 800d2c2: 70fb strb r3, [r7, #3] 800d2c4: 460b mov r3, r1 800d2c6: 70bb strb r3, [r7, #2] 800d2c8: 4613 mov r3, r2 800d2ca: 803b strh r3, [r7, #0] HAL_StatusTypeDef hal_status = HAL_OK; 800d2cc: 2300 movs r3, #0 800d2ce: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d2d0: 2300 movs r3, #0 800d2d2: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); 800d2d4: 687b ldr r3, [r7, #4] 800d2d6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d2da: 78bb ldrb r3, [r7, #2] 800d2dc: 883a ldrh r2, [r7, #0] 800d2de: 78f9 ldrb r1, [r7, #3] 800d2e0: f7f8 fcf4 bl 8005ccc 800d2e4: 4603 mov r3, r0 800d2e6: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d2e8: 7bfb ldrb r3, [r7, #15] 800d2ea: 4618 mov r0, r3 800d2ec: f000 f928 bl 800d540 800d2f0: 4603 mov r3, r0 800d2f2: 73bb strb r3, [r7, #14] return usb_status; 800d2f4: 7bbb ldrb r3, [r7, #14] } 800d2f6: 4618 mov r0, r3 800d2f8: 3710 adds r7, #16 800d2fa: 46bd mov sp, r7 800d2fc: bd80 pop {r7, pc} 0800d2fe : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d2fe: b580 push {r7, lr} 800d300: b084 sub sp, #16 800d302: af00 add r7, sp, #0 800d304: 6078 str r0, [r7, #4] 800d306: 460b mov r3, r1 800d308: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800d30a: 2300 movs r3, #0 800d30c: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d30e: 2300 movs r3, #0 800d310: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); 800d312: 687b ldr r3, [r7, #4] 800d314: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d318: 78fa ldrb r2, [r7, #3] 800d31a: 4611 mov r1, r2 800d31c: 4618 mov r0, r3 800d31e: f7f8 fd32 bl 8005d86 800d322: 4603 mov r3, r0 800d324: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d326: 7bfb ldrb r3, [r7, #15] 800d328: 4618 mov r0, r3 800d32a: f000 f909 bl 800d540 800d32e: 4603 mov r3, r0 800d330: 73bb strb r3, [r7, #14] return usb_status; 800d332: 7bbb ldrb r3, [r7, #14] } 800d334: 4618 mov r0, r3 800d336: 3710 adds r7, #16 800d338: 46bd mov sp, r7 800d33a: bd80 pop {r7, pc} 0800d33c : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d33c: b580 push {r7, lr} 800d33e: b084 sub sp, #16 800d340: af00 add r7, sp, #0 800d342: 6078 str r0, [r7, #4] 800d344: 460b mov r3, r1 800d346: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800d348: 2300 movs r3, #0 800d34a: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d34c: 2300 movs r3, #0 800d34e: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); 800d350: 687b ldr r3, [r7, #4] 800d352: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d356: 78fa ldrb r2, [r7, #3] 800d358: 4611 mov r1, r2 800d35a: 4618 mov r0, r3 800d35c: f7f8 fdda bl 8005f14 800d360: 4603 mov r3, r0 800d362: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d364: 7bfb ldrb r3, [r7, #15] 800d366: 4618 mov r0, r3 800d368: f000 f8ea bl 800d540 800d36c: 4603 mov r3, r0 800d36e: 73bb strb r3, [r7, #14] return usb_status; 800d370: 7bbb ldrb r3, [r7, #14] } 800d372: 4618 mov r0, r3 800d374: 3710 adds r7, #16 800d376: 46bd mov sp, r7 800d378: bd80 pop {r7, pc} 0800d37a : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d37a: b580 push {r7, lr} 800d37c: b084 sub sp, #16 800d37e: af00 add r7, sp, #0 800d380: 6078 str r0, [r7, #4] 800d382: 460b mov r3, r1 800d384: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800d386: 2300 movs r3, #0 800d388: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d38a: 2300 movs r3, #0 800d38c: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); 800d38e: 687b ldr r3, [r7, #4] 800d390: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d394: 78fa ldrb r2, [r7, #3] 800d396: 4611 mov r1, r2 800d398: 4618 mov r0, r3 800d39a: f7f8 fe1b bl 8005fd4 800d39e: 4603 mov r3, r0 800d3a0: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d3a2: 7bfb ldrb r3, [r7, #15] 800d3a4: 4618 mov r0, r3 800d3a6: f000 f8cb bl 800d540 800d3aa: 4603 mov r3, r0 800d3ac: 73bb strb r3, [r7, #14] return usb_status; 800d3ae: 7bbb ldrb r3, [r7, #14] } 800d3b0: 4618 mov r0, r3 800d3b2: 3710 adds r7, #16 800d3b4: 46bd mov sp, r7 800d3b6: bd80 pop {r7, pc} 0800d3b8 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Stall (1: Yes, 0: No) */ uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d3b8: b480 push {r7} 800d3ba: b085 sub sp, #20 800d3bc: af00 add r7, sp, #0 800d3be: 6078 str r0, [r7, #4] 800d3c0: 460b mov r3, r1 800d3c2: 70fb strb r3, [r7, #3] PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; 800d3c4: 687b ldr r3, [r7, #4] 800d3c6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d3ca: 60fb str r3, [r7, #12] if((ep_addr & 0x80) == 0x80) 800d3cc: f997 3003 ldrsb.w r3, [r7, #3] 800d3d0: 2b00 cmp r3, #0 800d3d2: da0b bge.n 800d3ec { return hpcd->IN_ep[ep_addr & 0x7F].is_stall; 800d3d4: 78fb ldrb r3, [r7, #3] 800d3d6: f003 027f and.w r2, r3, #127 @ 0x7f 800d3da: 68f9 ldr r1, [r7, #12] 800d3dc: 4613 mov r3, r2 800d3de: 009b lsls r3, r3, #2 800d3e0: 4413 add r3, r2 800d3e2: 00db lsls r3, r3, #3 800d3e4: 440b add r3, r1 800d3e6: 3312 adds r3, #18 800d3e8: 781b ldrb r3, [r3, #0] 800d3ea: e00b b.n 800d404 } else { return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; 800d3ec: 78fb ldrb r3, [r7, #3] 800d3ee: f003 027f and.w r2, r3, #127 @ 0x7f 800d3f2: 68f9 ldr r1, [r7, #12] 800d3f4: 4613 mov r3, r2 800d3f6: 009b lsls r3, r3, #2 800d3f8: 4413 add r3, r2 800d3fa: 00db lsls r3, r3, #3 800d3fc: 440b add r3, r1 800d3fe: f503 73a9 add.w r3, r3, #338 @ 0x152 800d402: 781b ldrb r3, [r3, #0] } } 800d404: 4618 mov r0, r3 800d406: 3714 adds r7, #20 800d408: 46bd mov sp, r7 800d40a: bc80 pop {r7} 800d40c: 4770 bx lr 0800d40e : * @param pdev: Device handle * @param dev_addr: Device address * @retval USBD status */ USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) { 800d40e: b580 push {r7, lr} 800d410: b084 sub sp, #16 800d412: af00 add r7, sp, #0 800d414: 6078 str r0, [r7, #4] 800d416: 460b mov r3, r1 800d418: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800d41a: 2300 movs r3, #0 800d41c: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800d41e: 2300 movs r3, #0 800d420: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); 800d422: 687b ldr r3, [r7, #4] 800d424: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d428: 78fa ldrb r2, [r7, #3] 800d42a: 4611 mov r1, r2 800d42c: 4618 mov r0, r3 800d42e: f7f8 fc29 bl 8005c84 800d432: 4603 mov r3, r0 800d434: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800d436: 7bfb ldrb r3, [r7, #15] 800d438: 4618 mov r0, r3 800d43a: f000 f881 bl 800d540 800d43e: 4603 mov r3, r0 800d440: 73bb strb r3, [r7, #14] return usb_status; 800d442: 7bbb ldrb r3, [r7, #14] } 800d444: 4618 mov r0, r3 800d446: 3710 adds r7, #16 800d448: 46bd mov sp, r7 800d44a: bd80 pop {r7, pc} 0800d44c : * @param pbuf: Pointer to data to be sent * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800d44c: b580 push {r7, lr} 800d44e: b086 sub sp, #24 800d450: af00 add r7, sp, #0 800d452: 60f8 str r0, [r7, #12] 800d454: 607a str r2, [r7, #4] 800d456: 461a mov r2, r3 800d458: 460b mov r3, r1 800d45a: 72fb strb r3, [r7, #11] 800d45c: 4613 mov r3, r2 800d45e: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800d460: 2300 movs r3, #0 800d462: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800d464: 2300 movs r3, #0 800d466: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); 800d468: 68fb ldr r3, [r7, #12] 800d46a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d46e: 893b ldrh r3, [r7, #8] 800d470: 7af9 ldrb r1, [r7, #11] 800d472: 687a ldr r2, [r7, #4] 800d474: f7f8 fd17 bl 8005ea6 800d478: 4603 mov r3, r0 800d47a: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800d47c: 7dfb ldrb r3, [r7, #23] 800d47e: 4618 mov r0, r3 800d480: f000 f85e bl 800d540 800d484: 4603 mov r3, r0 800d486: 75bb strb r3, [r7, #22] return usb_status; 800d488: 7dbb ldrb r3, [r7, #22] } 800d48a: 4618 mov r0, r3 800d48c: 3718 adds r7, #24 800d48e: 46bd mov sp, r7 800d490: bd80 pop {r7, pc} 0800d492 : * @param pbuf: Pointer to data to be received * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800d492: b580 push {r7, lr} 800d494: b086 sub sp, #24 800d496: af00 add r7, sp, #0 800d498: 60f8 str r0, [r7, #12] 800d49a: 607a str r2, [r7, #4] 800d49c: 461a mov r2, r3 800d49e: 460b mov r3, r1 800d4a0: 72fb strb r3, [r7, #11] 800d4a2: 4613 mov r3, r2 800d4a4: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800d4a6: 2300 movs r3, #0 800d4a8: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800d4aa: 2300 movs r3, #0 800d4ac: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); 800d4ae: 68fb ldr r3, [r7, #12] 800d4b0: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800d4b4: 893b ldrh r3, [r7, #8] 800d4b6: 7af9 ldrb r1, [r7, #11] 800d4b8: 687a ldr r2, [r7, #4] 800d4ba: f7f8 fcac bl 8005e16 800d4be: 4603 mov r3, r0 800d4c0: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800d4c2: 7dfb ldrb r3, [r7, #23] 800d4c4: 4618 mov r0, r3 800d4c6: f000 f83b bl 800d540 800d4ca: 4603 mov r3, r0 800d4cc: 75bb strb r3, [r7, #22] return usb_status; 800d4ce: 7dbb ldrb r3, [r7, #22] } 800d4d0: 4618 mov r0, r3 800d4d2: 3718 adds r7, #24 800d4d4: 46bd mov sp, r7 800d4d6: bd80 pop {r7, pc} 0800d4d8 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Received Data Size */ uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800d4d8: b580 push {r7, lr} 800d4da: b082 sub sp, #8 800d4dc: af00 add r7, sp, #0 800d4de: 6078 str r0, [r7, #4] 800d4e0: 460b mov r3, r1 800d4e2: 70fb strb r3, [r7, #3] return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); 800d4e4: 687b ldr r3, [r7, #4] 800d4e6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800d4ea: 78fa ldrb r2, [r7, #3] 800d4ec: 4611 mov r1, r2 800d4ee: 4618 mov r0, r3 800d4f0: f7f8 fcc2 bl 8005e78 800d4f4: 4603 mov r3, r0 } 800d4f6: 4618 mov r0, r3 800d4f8: 3708 adds r7, #8 800d4fa: 46bd mov sp, r7 800d4fc: bd80 pop {r7, pc} ... 0800d500 : * @brief Static single allocation. * @param size: Size of allocated memory * @retval None */ void *USBD_static_malloc(uint32_t size) { 800d500: b480 push {r7} 800d502: b083 sub sp, #12 800d504: af00 add r7, sp, #0 800d506: 6078 str r0, [r7, #4] static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ return mem; 800d508: 4b02 ldr r3, [pc, #8] @ (800d514 ) } 800d50a: 4618 mov r0, r3 800d50c: 370c adds r7, #12 800d50e: 46bd mov sp, r7 800d510: bc80 pop {r7} 800d512: 4770 bx lr 800d514: 20001514 .word 0x20001514 0800d518 : * @brief Dummy memory free * @param p: Pointer to allocated memory address * @retval None */ void USBD_static_free(void *p) { 800d518: b480 push {r7} 800d51a: b083 sub sp, #12 800d51c: af00 add r7, sp, #0 800d51e: 6078 str r0, [r7, #4] } 800d520: bf00 nop 800d522: 370c adds r7, #12 800d524: 46bd mov sp, r7 800d526: bc80 pop {r7} 800d528: 4770 bx lr 0800d52a : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #else void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800d52a: b480 push {r7} 800d52c: b083 sub sp, #12 800d52e: af00 add r7, sp, #0 800d530: 6078 str r0, [r7, #4] 800d532: 460b mov r3, r1 800d534: 70fb strb r3, [r7, #3] { /* Configure High connection state. */ } /* USER CODE END 6 */ } 800d536: bf00 nop 800d538: 370c adds r7, #12 800d53a: 46bd mov sp, r7 800d53c: bc80 pop {r7} 800d53e: 4770 bx lr 0800d540 : * @brief Returns the USB status depending on the HAL status: * @param hal_status: HAL status * @retval USB status */ USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) { 800d540: b480 push {r7} 800d542: b085 sub sp, #20 800d544: af00 add r7, sp, #0 800d546: 4603 mov r3, r0 800d548: 71fb strb r3, [r7, #7] USBD_StatusTypeDef usb_status = USBD_OK; 800d54a: 2300 movs r3, #0 800d54c: 73fb strb r3, [r7, #15] switch (hal_status) 800d54e: 79fb ldrb r3, [r7, #7] 800d550: 2b03 cmp r3, #3 800d552: d817 bhi.n 800d584 800d554: a201 add r2, pc, #4 @ (adr r2, 800d55c ) 800d556: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800d55a: bf00 nop 800d55c: 0800d56d .word 0x0800d56d 800d560: 0800d573 .word 0x0800d573 800d564: 0800d579 .word 0x0800d579 800d568: 0800d57f .word 0x0800d57f { case HAL_OK : usb_status = USBD_OK; 800d56c: 2300 movs r3, #0 800d56e: 73fb strb r3, [r7, #15] break; 800d570: e00b b.n 800d58a case HAL_ERROR : usb_status = USBD_FAIL; 800d572: 2302 movs r3, #2 800d574: 73fb strb r3, [r7, #15] break; 800d576: e008 b.n 800d58a case HAL_BUSY : usb_status = USBD_BUSY; 800d578: 2301 movs r3, #1 800d57a: 73fb strb r3, [r7, #15] break; 800d57c: e005 b.n 800d58a case HAL_TIMEOUT : usb_status = USBD_FAIL; 800d57e: 2302 movs r3, #2 800d580: 73fb strb r3, [r7, #15] break; 800d582: e002 b.n 800d58a default : usb_status = USBD_FAIL; 800d584: 2302 movs r3, #2 800d586: 73fb strb r3, [r7, #15] break; 800d588: bf00 nop } return usb_status; 800d58a: 7bfb ldrb r3, [r7, #15] } 800d58c: 4618 mov r0, r3 800d58e: 3714 adds r7, #20 800d590: 46bd mov sp, r7 800d592: bc80 pop {r7} 800d594: 4770 bx lr 800d596: bf00 nop 0800d598 : 800d598: b40e push {r1, r2, r3} 800d59a: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000 800d59e: b510 push {r4, lr} 800d5a0: 2400 movs r4, #0 800d5a2: b09d sub sp, #116 @ 0x74 800d5a4: ab1f add r3, sp, #124 @ 0x7c 800d5a6: 9002 str r0, [sp, #8] 800d5a8: 9006 str r0, [sp, #24] 800d5aa: 9107 str r1, [sp, #28] 800d5ac: 9104 str r1, [sp, #16] 800d5ae: 4809 ldr r0, [pc, #36] @ (800d5d4 ) 800d5b0: 4909 ldr r1, [pc, #36] @ (800d5d8 ) 800d5b2: f853 2b04 ldr.w r2, [r3], #4 800d5b6: 9105 str r1, [sp, #20] 800d5b8: 6800 ldr r0, [r0, #0] 800d5ba: a902 add r1, sp, #8 800d5bc: 9301 str r3, [sp, #4] 800d5be: 941b str r4, [sp, #108] @ 0x6c 800d5c0: f000 f992 bl 800d8e8 <_svfiprintf_r> 800d5c4: 9b02 ldr r3, [sp, #8] 800d5c6: 701c strb r4, [r3, #0] 800d5c8: b01d add sp, #116 @ 0x74 800d5ca: e8bd 4010 ldmia.w sp!, {r4, lr} 800d5ce: b003 add sp, #12 800d5d0: 4770 bx lr 800d5d2: bf00 nop 800d5d4: 20000184 .word 0x20000184 800d5d8: ffff0208 .word 0xffff0208 0800d5dc : 800d5dc: 4603 mov r3, r0 800d5de: 4402 add r2, r0 800d5e0: 4293 cmp r3, r2 800d5e2: d100 bne.n 800d5e6 800d5e4: 4770 bx lr 800d5e6: f803 1b01 strb.w r1, [r3], #1 800d5ea: e7f9 b.n 800d5e0 0800d5ec <__errno>: 800d5ec: 4b01 ldr r3, [pc, #4] @ (800d5f4 <__errno+0x8>) 800d5ee: 6818 ldr r0, [r3, #0] 800d5f0: 4770 bx lr 800d5f2: bf00 nop 800d5f4: 20000184 .word 0x20000184 0800d5f8 <__libc_init_array>: 800d5f8: b570 push {r4, r5, r6, lr} 800d5fa: 2600 movs r6, #0 800d5fc: 4d0c ldr r5, [pc, #48] @ (800d630 <__libc_init_array+0x38>) 800d5fe: 4c0d ldr r4, [pc, #52] @ (800d634 <__libc_init_array+0x3c>) 800d600: 1b64 subs r4, r4, r5 800d602: 10a4 asrs r4, r4, #2 800d604: 42a6 cmp r6, r4 800d606: d109 bne.n 800d61c <__libc_init_array+0x24> 800d608: f000 fc76 bl 800def8 <_init> 800d60c: 2600 movs r6, #0 800d60e: 4d0a ldr r5, [pc, #40] @ (800d638 <__libc_init_array+0x40>) 800d610: 4c0a ldr r4, [pc, #40] @ (800d63c <__libc_init_array+0x44>) 800d612: 1b64 subs r4, r4, r5 800d614: 10a4 asrs r4, r4, #2 800d616: 42a6 cmp r6, r4 800d618: d105 bne.n 800d626 <__libc_init_array+0x2e> 800d61a: bd70 pop {r4, r5, r6, pc} 800d61c: f855 3b04 ldr.w r3, [r5], #4 800d620: 4798 blx r3 800d622: 3601 adds r6, #1 800d624: e7ee b.n 800d604 <__libc_init_array+0xc> 800d626: f855 3b04 ldr.w r3, [r5], #4 800d62a: 4798 blx r3 800d62c: 3601 adds r6, #1 800d62e: e7f2 b.n 800d616 <__libc_init_array+0x1e> 800d630: 0800e250 .word 0x0800e250 800d634: 0800e250 .word 0x0800e250 800d638: 0800e250 .word 0x0800e250 800d63c: 0800e254 .word 0x0800e254 0800d640 <__retarget_lock_acquire_recursive>: 800d640: 4770 bx lr 0800d642 <__retarget_lock_release_recursive>: 800d642: 4770 bx lr 0800d644 <_free_r>: 800d644: b538 push {r3, r4, r5, lr} 800d646: 4605 mov r5, r0 800d648: 2900 cmp r1, #0 800d64a: d040 beq.n 800d6ce <_free_r+0x8a> 800d64c: f851 3c04 ldr.w r3, [r1, #-4] 800d650: 1f0c subs r4, r1, #4 800d652: 2b00 cmp r3, #0 800d654: bfb8 it lt 800d656: 18e4 addlt r4, r4, r3 800d658: f000 f8de bl 800d818 <__malloc_lock> 800d65c: 4a1c ldr r2, [pc, #112] @ (800d6d0 <_free_r+0x8c>) 800d65e: 6813 ldr r3, [r2, #0] 800d660: b933 cbnz r3, 800d670 <_free_r+0x2c> 800d662: 6063 str r3, [r4, #4] 800d664: 6014 str r4, [r2, #0] 800d666: 4628 mov r0, r5 800d668: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800d66c: f000 b8da b.w 800d824 <__malloc_unlock> 800d670: 42a3 cmp r3, r4 800d672: d908 bls.n 800d686 <_free_r+0x42> 800d674: 6820 ldr r0, [r4, #0] 800d676: 1821 adds r1, r4, r0 800d678: 428b cmp r3, r1 800d67a: bf01 itttt eq 800d67c: 6819 ldreq r1, [r3, #0] 800d67e: 685b ldreq r3, [r3, #4] 800d680: 1809 addeq r1, r1, r0 800d682: 6021 streq r1, [r4, #0] 800d684: e7ed b.n 800d662 <_free_r+0x1e> 800d686: 461a mov r2, r3 800d688: 685b ldr r3, [r3, #4] 800d68a: b10b cbz r3, 800d690 <_free_r+0x4c> 800d68c: 42a3 cmp r3, r4 800d68e: d9fa bls.n 800d686 <_free_r+0x42> 800d690: 6811 ldr r1, [r2, #0] 800d692: 1850 adds r0, r2, r1 800d694: 42a0 cmp r0, r4 800d696: d10b bne.n 800d6b0 <_free_r+0x6c> 800d698: 6820 ldr r0, [r4, #0] 800d69a: 4401 add r1, r0 800d69c: 1850 adds r0, r2, r1 800d69e: 4283 cmp r3, r0 800d6a0: 6011 str r1, [r2, #0] 800d6a2: d1e0 bne.n 800d666 <_free_r+0x22> 800d6a4: 6818 ldr r0, [r3, #0] 800d6a6: 685b ldr r3, [r3, #4] 800d6a8: 4408 add r0, r1 800d6aa: 6010 str r0, [r2, #0] 800d6ac: 6053 str r3, [r2, #4] 800d6ae: e7da b.n 800d666 <_free_r+0x22> 800d6b0: d902 bls.n 800d6b8 <_free_r+0x74> 800d6b2: 230c movs r3, #12 800d6b4: 602b str r3, [r5, #0] 800d6b6: e7d6 b.n 800d666 <_free_r+0x22> 800d6b8: 6820 ldr r0, [r4, #0] 800d6ba: 1821 adds r1, r4, r0 800d6bc: 428b cmp r3, r1 800d6be: bf01 itttt eq 800d6c0: 6819 ldreq r1, [r3, #0] 800d6c2: 685b ldreq r3, [r3, #4] 800d6c4: 1809 addeq r1, r1, r0 800d6c6: 6021 streq r1, [r4, #0] 800d6c8: 6063 str r3, [r4, #4] 800d6ca: 6054 str r4, [r2, #4] 800d6cc: e7cb b.n 800d666 <_free_r+0x22> 800d6ce: bd38 pop {r3, r4, r5, pc} 800d6d0: 20001878 .word 0x20001878 0800d6d4 : 800d6d4: b570 push {r4, r5, r6, lr} 800d6d6: 4e0f ldr r6, [pc, #60] @ (800d714 ) 800d6d8: 460c mov r4, r1 800d6da: 6831 ldr r1, [r6, #0] 800d6dc: 4605 mov r5, r0 800d6de: b911 cbnz r1, 800d6e6 800d6e0: f000 fba8 bl 800de34 <_sbrk_r> 800d6e4: 6030 str r0, [r6, #0] 800d6e6: 4621 mov r1, r4 800d6e8: 4628 mov r0, r5 800d6ea: f000 fba3 bl 800de34 <_sbrk_r> 800d6ee: 1c43 adds r3, r0, #1 800d6f0: d103 bne.n 800d6fa 800d6f2: f04f 34ff mov.w r4, #4294967295 800d6f6: 4620 mov r0, r4 800d6f8: bd70 pop {r4, r5, r6, pc} 800d6fa: 1cc4 adds r4, r0, #3 800d6fc: f024 0403 bic.w r4, r4, #3 800d700: 42a0 cmp r0, r4 800d702: d0f8 beq.n 800d6f6 800d704: 1a21 subs r1, r4, r0 800d706: 4628 mov r0, r5 800d708: f000 fb94 bl 800de34 <_sbrk_r> 800d70c: 3001 adds r0, #1 800d70e: d1f2 bne.n 800d6f6 800d710: e7ef b.n 800d6f2 800d712: bf00 nop 800d714: 20001874 .word 0x20001874 0800d718 <_malloc_r>: 800d718: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800d71c: 1ccd adds r5, r1, #3 800d71e: f025 0503 bic.w r5, r5, #3 800d722: 3508 adds r5, #8 800d724: 2d0c cmp r5, #12 800d726: bf38 it cc 800d728: 250c movcc r5, #12 800d72a: 2d00 cmp r5, #0 800d72c: 4606 mov r6, r0 800d72e: db01 blt.n 800d734 <_malloc_r+0x1c> 800d730: 42a9 cmp r1, r5 800d732: d904 bls.n 800d73e <_malloc_r+0x26> 800d734: 230c movs r3, #12 800d736: 6033 str r3, [r6, #0] 800d738: 2000 movs r0, #0 800d73a: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800d73e: f8df 80d4 ldr.w r8, [pc, #212] @ 800d814 <_malloc_r+0xfc> 800d742: f000 f869 bl 800d818 <__malloc_lock> 800d746: f8d8 3000 ldr.w r3, [r8] 800d74a: 461c mov r4, r3 800d74c: bb44 cbnz r4, 800d7a0 <_malloc_r+0x88> 800d74e: 4629 mov r1, r5 800d750: 4630 mov r0, r6 800d752: f7ff ffbf bl 800d6d4 800d756: 1c43 adds r3, r0, #1 800d758: 4604 mov r4, r0 800d75a: d158 bne.n 800d80e <_malloc_r+0xf6> 800d75c: f8d8 4000 ldr.w r4, [r8] 800d760: 4627 mov r7, r4 800d762: 2f00 cmp r7, #0 800d764: d143 bne.n 800d7ee <_malloc_r+0xd6> 800d766: 2c00 cmp r4, #0 800d768: d04b beq.n 800d802 <_malloc_r+0xea> 800d76a: 6823 ldr r3, [r4, #0] 800d76c: 4639 mov r1, r7 800d76e: 4630 mov r0, r6 800d770: eb04 0903 add.w r9, r4, r3 800d774: f000 fb5e bl 800de34 <_sbrk_r> 800d778: 4581 cmp r9, r0 800d77a: d142 bne.n 800d802 <_malloc_r+0xea> 800d77c: 6821 ldr r1, [r4, #0] 800d77e: 4630 mov r0, r6 800d780: 1a6d subs r5, r5, r1 800d782: 4629 mov r1, r5 800d784: f7ff ffa6 bl 800d6d4 800d788: 3001 adds r0, #1 800d78a: d03a beq.n 800d802 <_malloc_r+0xea> 800d78c: 6823 ldr r3, [r4, #0] 800d78e: 442b add r3, r5 800d790: 6023 str r3, [r4, #0] 800d792: f8d8 3000 ldr.w r3, [r8] 800d796: 685a ldr r2, [r3, #4] 800d798: bb62 cbnz r2, 800d7f4 <_malloc_r+0xdc> 800d79a: f8c8 7000 str.w r7, [r8] 800d79e: e00f b.n 800d7c0 <_malloc_r+0xa8> 800d7a0: 6822 ldr r2, [r4, #0] 800d7a2: 1b52 subs r2, r2, r5 800d7a4: d420 bmi.n 800d7e8 <_malloc_r+0xd0> 800d7a6: 2a0b cmp r2, #11 800d7a8: d917 bls.n 800d7da <_malloc_r+0xc2> 800d7aa: 1961 adds r1, r4, r5 800d7ac: 42a3 cmp r3, r4 800d7ae: 6025 str r5, [r4, #0] 800d7b0: bf18 it ne 800d7b2: 6059 strne r1, [r3, #4] 800d7b4: 6863 ldr r3, [r4, #4] 800d7b6: bf08 it eq 800d7b8: f8c8 1000 streq.w r1, [r8] 800d7bc: 5162 str r2, [r4, r5] 800d7be: 604b str r3, [r1, #4] 800d7c0: 4630 mov r0, r6 800d7c2: f000 f82f bl 800d824 <__malloc_unlock> 800d7c6: f104 000b add.w r0, r4, #11 800d7ca: 1d23 adds r3, r4, #4 800d7cc: f020 0007 bic.w r0, r0, #7 800d7d0: 1ac2 subs r2, r0, r3 800d7d2: bf1c itt ne 800d7d4: 1a1b subne r3, r3, r0 800d7d6: 50a3 strne r3, [r4, r2] 800d7d8: e7af b.n 800d73a <_malloc_r+0x22> 800d7da: 6862 ldr r2, [r4, #4] 800d7dc: 42a3 cmp r3, r4 800d7de: bf0c ite eq 800d7e0: f8c8 2000 streq.w r2, [r8] 800d7e4: 605a strne r2, [r3, #4] 800d7e6: e7eb b.n 800d7c0 <_malloc_r+0xa8> 800d7e8: 4623 mov r3, r4 800d7ea: 6864 ldr r4, [r4, #4] 800d7ec: e7ae b.n 800d74c <_malloc_r+0x34> 800d7ee: 463c mov r4, r7 800d7f0: 687f ldr r7, [r7, #4] 800d7f2: e7b6 b.n 800d762 <_malloc_r+0x4a> 800d7f4: 461a mov r2, r3 800d7f6: 685b ldr r3, [r3, #4] 800d7f8: 42a3 cmp r3, r4 800d7fa: d1fb bne.n 800d7f4 <_malloc_r+0xdc> 800d7fc: 2300 movs r3, #0 800d7fe: 6053 str r3, [r2, #4] 800d800: e7de b.n 800d7c0 <_malloc_r+0xa8> 800d802: 230c movs r3, #12 800d804: 4630 mov r0, r6 800d806: 6033 str r3, [r6, #0] 800d808: f000 f80c bl 800d824 <__malloc_unlock> 800d80c: e794 b.n 800d738 <_malloc_r+0x20> 800d80e: 6005 str r5, [r0, #0] 800d810: e7d6 b.n 800d7c0 <_malloc_r+0xa8> 800d812: bf00 nop 800d814: 20001878 .word 0x20001878 0800d818 <__malloc_lock>: 800d818: 4801 ldr r0, [pc, #4] @ (800d820 <__malloc_lock+0x8>) 800d81a: f7ff bf11 b.w 800d640 <__retarget_lock_acquire_recursive> 800d81e: bf00 nop 800d820: 20001870 .word 0x20001870 0800d824 <__malloc_unlock>: 800d824: 4801 ldr r0, [pc, #4] @ (800d82c <__malloc_unlock+0x8>) 800d826: f7ff bf0c b.w 800d642 <__retarget_lock_release_recursive> 800d82a: bf00 nop 800d82c: 20001870 .word 0x20001870 0800d830 <__ssputs_r>: 800d830: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800d834: 461f mov r7, r3 800d836: 688e ldr r6, [r1, #8] 800d838: 4682 mov sl, r0 800d83a: 42be cmp r6, r7 800d83c: 460c mov r4, r1 800d83e: 4690 mov r8, r2 800d840: 680b ldr r3, [r1, #0] 800d842: d82d bhi.n 800d8a0 <__ssputs_r+0x70> 800d844: f9b1 200c ldrsh.w r2, [r1, #12] 800d848: f412 6f90 tst.w r2, #1152 @ 0x480 800d84c: d026 beq.n 800d89c <__ssputs_r+0x6c> 800d84e: 6965 ldr r5, [r4, #20] 800d850: 6909 ldr r1, [r1, #16] 800d852: eb05 0545 add.w r5, r5, r5, lsl #1 800d856: eba3 0901 sub.w r9, r3, r1 800d85a: eb05 75d5 add.w r5, r5, r5, lsr #31 800d85e: 1c7b adds r3, r7, #1 800d860: 444b add r3, r9 800d862: 106d asrs r5, r5, #1 800d864: 429d cmp r5, r3 800d866: bf38 it cc 800d868: 461d movcc r5, r3 800d86a: 0553 lsls r3, r2, #21 800d86c: d527 bpl.n 800d8be <__ssputs_r+0x8e> 800d86e: 4629 mov r1, r5 800d870: f7ff ff52 bl 800d718 <_malloc_r> 800d874: 4606 mov r6, r0 800d876: b360 cbz r0, 800d8d2 <__ssputs_r+0xa2> 800d878: 464a mov r2, r9 800d87a: 6921 ldr r1, [r4, #16] 800d87c: f000 faf8 bl 800de70 800d880: 89a3 ldrh r3, [r4, #12] 800d882: f423 6390 bic.w r3, r3, #1152 @ 0x480 800d886: f043 0380 orr.w r3, r3, #128 @ 0x80 800d88a: 81a3 strh r3, [r4, #12] 800d88c: 6126 str r6, [r4, #16] 800d88e: 444e add r6, r9 800d890: 6026 str r6, [r4, #0] 800d892: 463e mov r6, r7 800d894: 6165 str r5, [r4, #20] 800d896: eba5 0509 sub.w r5, r5, r9 800d89a: 60a5 str r5, [r4, #8] 800d89c: 42be cmp r6, r7 800d89e: d900 bls.n 800d8a2 <__ssputs_r+0x72> 800d8a0: 463e mov r6, r7 800d8a2: 4632 mov r2, r6 800d8a4: 4641 mov r1, r8 800d8a6: 6820 ldr r0, [r4, #0] 800d8a8: f000 faaa bl 800de00 800d8ac: 2000 movs r0, #0 800d8ae: 68a3 ldr r3, [r4, #8] 800d8b0: 1b9b subs r3, r3, r6 800d8b2: 60a3 str r3, [r4, #8] 800d8b4: 6823 ldr r3, [r4, #0] 800d8b6: 4433 add r3, r6 800d8b8: 6023 str r3, [r4, #0] 800d8ba: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800d8be: 462a mov r2, r5 800d8c0: f000 fae4 bl 800de8c <_realloc_r> 800d8c4: 4606 mov r6, r0 800d8c6: 2800 cmp r0, #0 800d8c8: d1e0 bne.n 800d88c <__ssputs_r+0x5c> 800d8ca: 4650 mov r0, sl 800d8cc: 6921 ldr r1, [r4, #16] 800d8ce: f7ff feb9 bl 800d644 <_free_r> 800d8d2: 230c movs r3, #12 800d8d4: f8ca 3000 str.w r3, [sl] 800d8d8: 89a3 ldrh r3, [r4, #12] 800d8da: f04f 30ff mov.w r0, #4294967295 800d8de: f043 0340 orr.w r3, r3, #64 @ 0x40 800d8e2: 81a3 strh r3, [r4, #12] 800d8e4: e7e9 b.n 800d8ba <__ssputs_r+0x8a> ... 0800d8e8 <_svfiprintf_r>: 800d8e8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800d8ec: 4698 mov r8, r3 800d8ee: 898b ldrh r3, [r1, #12] 800d8f0: 4607 mov r7, r0 800d8f2: 061b lsls r3, r3, #24 800d8f4: 460d mov r5, r1 800d8f6: 4614 mov r4, r2 800d8f8: b09d sub sp, #116 @ 0x74 800d8fa: d510 bpl.n 800d91e <_svfiprintf_r+0x36> 800d8fc: 690b ldr r3, [r1, #16] 800d8fe: b973 cbnz r3, 800d91e <_svfiprintf_r+0x36> 800d900: 2140 movs r1, #64 @ 0x40 800d902: f7ff ff09 bl 800d718 <_malloc_r> 800d906: 6028 str r0, [r5, #0] 800d908: 6128 str r0, [r5, #16] 800d90a: b930 cbnz r0, 800d91a <_svfiprintf_r+0x32> 800d90c: 230c movs r3, #12 800d90e: 603b str r3, [r7, #0] 800d910: f04f 30ff mov.w r0, #4294967295 800d914: b01d add sp, #116 @ 0x74 800d916: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800d91a: 2340 movs r3, #64 @ 0x40 800d91c: 616b str r3, [r5, #20] 800d91e: 2300 movs r3, #0 800d920: 9309 str r3, [sp, #36] @ 0x24 800d922: 2320 movs r3, #32 800d924: f88d 3029 strb.w r3, [sp, #41] @ 0x29 800d928: 2330 movs r3, #48 @ 0x30 800d92a: f04f 0901 mov.w r9, #1 800d92e: f8cd 800c str.w r8, [sp, #12] 800d932: f8df 8198 ldr.w r8, [pc, #408] @ 800dacc <_svfiprintf_r+0x1e4> 800d936: f88d 302a strb.w r3, [sp, #42] @ 0x2a 800d93a: 4623 mov r3, r4 800d93c: 469a mov sl, r3 800d93e: f813 2b01 ldrb.w r2, [r3], #1 800d942: b10a cbz r2, 800d948 <_svfiprintf_r+0x60> 800d944: 2a25 cmp r2, #37 @ 0x25 800d946: d1f9 bne.n 800d93c <_svfiprintf_r+0x54> 800d948: ebba 0b04 subs.w fp, sl, r4 800d94c: d00b beq.n 800d966 <_svfiprintf_r+0x7e> 800d94e: 465b mov r3, fp 800d950: 4622 mov r2, r4 800d952: 4629 mov r1, r5 800d954: 4638 mov r0, r7 800d956: f7ff ff6b bl 800d830 <__ssputs_r> 800d95a: 3001 adds r0, #1 800d95c: f000 80a7 beq.w 800daae <_svfiprintf_r+0x1c6> 800d960: 9a09 ldr r2, [sp, #36] @ 0x24 800d962: 445a add r2, fp 800d964: 9209 str r2, [sp, #36] @ 0x24 800d966: f89a 3000 ldrb.w r3, [sl] 800d96a: 2b00 cmp r3, #0 800d96c: f000 809f beq.w 800daae <_svfiprintf_r+0x1c6> 800d970: 2300 movs r3, #0 800d972: f04f 32ff mov.w r2, #4294967295 800d976: e9cd 2305 strd r2, r3, [sp, #20] 800d97a: f10a 0a01 add.w sl, sl, #1 800d97e: 9304 str r3, [sp, #16] 800d980: 9307 str r3, [sp, #28] 800d982: f88d 3053 strb.w r3, [sp, #83] @ 0x53 800d986: 931a str r3, [sp, #104] @ 0x68 800d988: 4654 mov r4, sl 800d98a: 2205 movs r2, #5 800d98c: f814 1b01 ldrb.w r1, [r4], #1 800d990: 484e ldr r0, [pc, #312] @ (800dacc <_svfiprintf_r+0x1e4>) 800d992: f000 fa5f bl 800de54 800d996: 9a04 ldr r2, [sp, #16] 800d998: b9d8 cbnz r0, 800d9d2 <_svfiprintf_r+0xea> 800d99a: 06d0 lsls r0, r2, #27 800d99c: bf44 itt mi 800d99e: 2320 movmi r3, #32 800d9a0: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800d9a4: 0711 lsls r1, r2, #28 800d9a6: bf44 itt mi 800d9a8: 232b movmi r3, #43 @ 0x2b 800d9aa: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800d9ae: f89a 3000 ldrb.w r3, [sl] 800d9b2: 2b2a cmp r3, #42 @ 0x2a 800d9b4: d015 beq.n 800d9e2 <_svfiprintf_r+0xfa> 800d9b6: 4654 mov r4, sl 800d9b8: 2000 movs r0, #0 800d9ba: f04f 0c0a mov.w ip, #10 800d9be: 9a07 ldr r2, [sp, #28] 800d9c0: 4621 mov r1, r4 800d9c2: f811 3b01 ldrb.w r3, [r1], #1 800d9c6: 3b30 subs r3, #48 @ 0x30 800d9c8: 2b09 cmp r3, #9 800d9ca: d94b bls.n 800da64 <_svfiprintf_r+0x17c> 800d9cc: b1b0 cbz r0, 800d9fc <_svfiprintf_r+0x114> 800d9ce: 9207 str r2, [sp, #28] 800d9d0: e014 b.n 800d9fc <_svfiprintf_r+0x114> 800d9d2: eba0 0308 sub.w r3, r0, r8 800d9d6: fa09 f303 lsl.w r3, r9, r3 800d9da: 4313 orrs r3, r2 800d9dc: 46a2 mov sl, r4 800d9de: 9304 str r3, [sp, #16] 800d9e0: e7d2 b.n 800d988 <_svfiprintf_r+0xa0> 800d9e2: 9b03 ldr r3, [sp, #12] 800d9e4: 1d19 adds r1, r3, #4 800d9e6: 681b ldr r3, [r3, #0] 800d9e8: 9103 str r1, [sp, #12] 800d9ea: 2b00 cmp r3, #0 800d9ec: bfbb ittet lt 800d9ee: 425b neglt r3, r3 800d9f0: f042 0202 orrlt.w r2, r2, #2 800d9f4: 9307 strge r3, [sp, #28] 800d9f6: 9307 strlt r3, [sp, #28] 800d9f8: bfb8 it lt 800d9fa: 9204 strlt r2, [sp, #16] 800d9fc: 7823 ldrb r3, [r4, #0] 800d9fe: 2b2e cmp r3, #46 @ 0x2e 800da00: d10a bne.n 800da18 <_svfiprintf_r+0x130> 800da02: 7863 ldrb r3, [r4, #1] 800da04: 2b2a cmp r3, #42 @ 0x2a 800da06: d132 bne.n 800da6e <_svfiprintf_r+0x186> 800da08: 9b03 ldr r3, [sp, #12] 800da0a: 3402 adds r4, #2 800da0c: 1d1a adds r2, r3, #4 800da0e: 681b ldr r3, [r3, #0] 800da10: 9203 str r2, [sp, #12] 800da12: ea43 73e3 orr.w r3, r3, r3, asr #31 800da16: 9305 str r3, [sp, #20] 800da18: f8df a0b4 ldr.w sl, [pc, #180] @ 800dad0 <_svfiprintf_r+0x1e8> 800da1c: 2203 movs r2, #3 800da1e: 4650 mov r0, sl 800da20: 7821 ldrb r1, [r4, #0] 800da22: f000 fa17 bl 800de54 800da26: b138 cbz r0, 800da38 <_svfiprintf_r+0x150> 800da28: 2240 movs r2, #64 @ 0x40 800da2a: 9b04 ldr r3, [sp, #16] 800da2c: eba0 000a sub.w r0, r0, sl 800da30: 4082 lsls r2, r0 800da32: 4313 orrs r3, r2 800da34: 3401 adds r4, #1 800da36: 9304 str r3, [sp, #16] 800da38: f814 1b01 ldrb.w r1, [r4], #1 800da3c: 2206 movs r2, #6 800da3e: 4825 ldr r0, [pc, #148] @ (800dad4 <_svfiprintf_r+0x1ec>) 800da40: f88d 1028 strb.w r1, [sp, #40] @ 0x28 800da44: f000 fa06 bl 800de54 800da48: 2800 cmp r0, #0 800da4a: d036 beq.n 800daba <_svfiprintf_r+0x1d2> 800da4c: 4b22 ldr r3, [pc, #136] @ (800dad8 <_svfiprintf_r+0x1f0>) 800da4e: bb1b cbnz r3, 800da98 <_svfiprintf_r+0x1b0> 800da50: 9b03 ldr r3, [sp, #12] 800da52: 3307 adds r3, #7 800da54: f023 0307 bic.w r3, r3, #7 800da58: 3308 adds r3, #8 800da5a: 9303 str r3, [sp, #12] 800da5c: 9b09 ldr r3, [sp, #36] @ 0x24 800da5e: 4433 add r3, r6 800da60: 9309 str r3, [sp, #36] @ 0x24 800da62: e76a b.n 800d93a <_svfiprintf_r+0x52> 800da64: 460c mov r4, r1 800da66: 2001 movs r0, #1 800da68: fb0c 3202 mla r2, ip, r2, r3 800da6c: e7a8 b.n 800d9c0 <_svfiprintf_r+0xd8> 800da6e: 2300 movs r3, #0 800da70: f04f 0c0a mov.w ip, #10 800da74: 4619 mov r1, r3 800da76: 3401 adds r4, #1 800da78: 9305 str r3, [sp, #20] 800da7a: 4620 mov r0, r4 800da7c: f810 2b01 ldrb.w r2, [r0], #1 800da80: 3a30 subs r2, #48 @ 0x30 800da82: 2a09 cmp r2, #9 800da84: d903 bls.n 800da8e <_svfiprintf_r+0x1a6> 800da86: 2b00 cmp r3, #0 800da88: d0c6 beq.n 800da18 <_svfiprintf_r+0x130> 800da8a: 9105 str r1, [sp, #20] 800da8c: e7c4 b.n 800da18 <_svfiprintf_r+0x130> 800da8e: 4604 mov r4, r0 800da90: 2301 movs r3, #1 800da92: fb0c 2101 mla r1, ip, r1, r2 800da96: e7f0 b.n 800da7a <_svfiprintf_r+0x192> 800da98: ab03 add r3, sp, #12 800da9a: 9300 str r3, [sp, #0] 800da9c: 462a mov r2, r5 800da9e: 4638 mov r0, r7 800daa0: 4b0e ldr r3, [pc, #56] @ (800dadc <_svfiprintf_r+0x1f4>) 800daa2: a904 add r1, sp, #16 800daa4: f3af 8000 nop.w 800daa8: 1c42 adds r2, r0, #1 800daaa: 4606 mov r6, r0 800daac: d1d6 bne.n 800da5c <_svfiprintf_r+0x174> 800daae: 89ab ldrh r3, [r5, #12] 800dab0: 065b lsls r3, r3, #25 800dab2: f53f af2d bmi.w 800d910 <_svfiprintf_r+0x28> 800dab6: 9809 ldr r0, [sp, #36] @ 0x24 800dab8: e72c b.n 800d914 <_svfiprintf_r+0x2c> 800daba: ab03 add r3, sp, #12 800dabc: 9300 str r3, [sp, #0] 800dabe: 462a mov r2, r5 800dac0: 4638 mov r0, r7 800dac2: 4b06 ldr r3, [pc, #24] @ (800dadc <_svfiprintf_r+0x1f4>) 800dac4: a904 add r1, sp, #16 800dac6: f000 f87d bl 800dbc4 <_printf_i> 800daca: e7ed b.n 800daa8 <_svfiprintf_r+0x1c0> 800dacc: 0800e212 .word 0x0800e212 800dad0: 0800e218 .word 0x0800e218 800dad4: 0800e21c .word 0x0800e21c 800dad8: 00000000 .word 0x00000000 800dadc: 0800d831 .word 0x0800d831 0800dae0 <_printf_common>: 800dae0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800dae4: 4616 mov r6, r2 800dae6: 4698 mov r8, r3 800dae8: 688a ldr r2, [r1, #8] 800daea: 690b ldr r3, [r1, #16] 800daec: 4607 mov r7, r0 800daee: 4293 cmp r3, r2 800daf0: bfb8 it lt 800daf2: 4613 movlt r3, r2 800daf4: 6033 str r3, [r6, #0] 800daf6: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 800dafa: 460c mov r4, r1 800dafc: f8dd 9020 ldr.w r9, [sp, #32] 800db00: b10a cbz r2, 800db06 <_printf_common+0x26> 800db02: 3301 adds r3, #1 800db04: 6033 str r3, [r6, #0] 800db06: 6823 ldr r3, [r4, #0] 800db08: 0699 lsls r1, r3, #26 800db0a: bf42 ittt mi 800db0c: 6833 ldrmi r3, [r6, #0] 800db0e: 3302 addmi r3, #2 800db10: 6033 strmi r3, [r6, #0] 800db12: 6825 ldr r5, [r4, #0] 800db14: f015 0506 ands.w r5, r5, #6 800db18: d106 bne.n 800db28 <_printf_common+0x48> 800db1a: f104 0a19 add.w sl, r4, #25 800db1e: 68e3 ldr r3, [r4, #12] 800db20: 6832 ldr r2, [r6, #0] 800db22: 1a9b subs r3, r3, r2 800db24: 42ab cmp r3, r5 800db26: dc2b bgt.n 800db80 <_printf_common+0xa0> 800db28: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 800db2c: 6822 ldr r2, [r4, #0] 800db2e: 3b00 subs r3, #0 800db30: bf18 it ne 800db32: 2301 movne r3, #1 800db34: 0692 lsls r2, r2, #26 800db36: d430 bmi.n 800db9a <_printf_common+0xba> 800db38: 4641 mov r1, r8 800db3a: 4638 mov r0, r7 800db3c: f104 0243 add.w r2, r4, #67 @ 0x43 800db40: 47c8 blx r9 800db42: 3001 adds r0, #1 800db44: d023 beq.n 800db8e <_printf_common+0xae> 800db46: 6823 ldr r3, [r4, #0] 800db48: 6922 ldr r2, [r4, #16] 800db4a: f003 0306 and.w r3, r3, #6 800db4e: 2b04 cmp r3, #4 800db50: bf14 ite ne 800db52: 2500 movne r5, #0 800db54: 6833 ldreq r3, [r6, #0] 800db56: f04f 0600 mov.w r6, #0 800db5a: bf08 it eq 800db5c: 68e5 ldreq r5, [r4, #12] 800db5e: f104 041a add.w r4, r4, #26 800db62: bf08 it eq 800db64: 1aed subeq r5, r5, r3 800db66: f854 3c12 ldr.w r3, [r4, #-18] 800db6a: bf08 it eq 800db6c: ea25 75e5 biceq.w r5, r5, r5, asr #31 800db70: 4293 cmp r3, r2 800db72: bfc4 itt gt 800db74: 1a9b subgt r3, r3, r2 800db76: 18ed addgt r5, r5, r3 800db78: 42b5 cmp r5, r6 800db7a: d11a bne.n 800dbb2 <_printf_common+0xd2> 800db7c: 2000 movs r0, #0 800db7e: e008 b.n 800db92 <_printf_common+0xb2> 800db80: 2301 movs r3, #1 800db82: 4652 mov r2, sl 800db84: 4641 mov r1, r8 800db86: 4638 mov r0, r7 800db88: 47c8 blx r9 800db8a: 3001 adds r0, #1 800db8c: d103 bne.n 800db96 <_printf_common+0xb6> 800db8e: f04f 30ff mov.w r0, #4294967295 800db92: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800db96: 3501 adds r5, #1 800db98: e7c1 b.n 800db1e <_printf_common+0x3e> 800db9a: 2030 movs r0, #48 @ 0x30 800db9c: 18e1 adds r1, r4, r3 800db9e: f881 0043 strb.w r0, [r1, #67] @ 0x43 800dba2: 1c5a adds r2, r3, #1 800dba4: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 800dba8: 4422 add r2, r4 800dbaa: 3302 adds r3, #2 800dbac: f882 1043 strb.w r1, [r2, #67] @ 0x43 800dbb0: e7c2 b.n 800db38 <_printf_common+0x58> 800dbb2: 2301 movs r3, #1 800dbb4: 4622 mov r2, r4 800dbb6: 4641 mov r1, r8 800dbb8: 4638 mov r0, r7 800dbba: 47c8 blx r9 800dbbc: 3001 adds r0, #1 800dbbe: d0e6 beq.n 800db8e <_printf_common+0xae> 800dbc0: 3601 adds r6, #1 800dbc2: e7d9 b.n 800db78 <_printf_common+0x98> 0800dbc4 <_printf_i>: 800dbc4: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 800dbc8: 7e0f ldrb r7, [r1, #24] 800dbca: 4691 mov r9, r2 800dbcc: 2f78 cmp r7, #120 @ 0x78 800dbce: 4680 mov r8, r0 800dbd0: 460c mov r4, r1 800dbd2: 469a mov sl, r3 800dbd4: 9e0c ldr r6, [sp, #48] @ 0x30 800dbd6: f101 0243 add.w r2, r1, #67 @ 0x43 800dbda: d807 bhi.n 800dbec <_printf_i+0x28> 800dbdc: 2f62 cmp r7, #98 @ 0x62 800dbde: d80a bhi.n 800dbf6 <_printf_i+0x32> 800dbe0: 2f00 cmp r7, #0 800dbe2: f000 80d1 beq.w 800dd88 <_printf_i+0x1c4> 800dbe6: 2f58 cmp r7, #88 @ 0x58 800dbe8: f000 80b8 beq.w 800dd5c <_printf_i+0x198> 800dbec: f104 0642 add.w r6, r4, #66 @ 0x42 800dbf0: f884 7042 strb.w r7, [r4, #66] @ 0x42 800dbf4: e03a b.n 800dc6c <_printf_i+0xa8> 800dbf6: f1a7 0363 sub.w r3, r7, #99 @ 0x63 800dbfa: 2b15 cmp r3, #21 800dbfc: d8f6 bhi.n 800dbec <_printf_i+0x28> 800dbfe: a101 add r1, pc, #4 @ (adr r1, 800dc04 <_printf_i+0x40>) 800dc00: f851 f023 ldr.w pc, [r1, r3, lsl #2] 800dc04: 0800dc5d .word 0x0800dc5d 800dc08: 0800dc71 .word 0x0800dc71 800dc0c: 0800dbed .word 0x0800dbed 800dc10: 0800dbed .word 0x0800dbed 800dc14: 0800dbed .word 0x0800dbed 800dc18: 0800dbed .word 0x0800dbed 800dc1c: 0800dc71 .word 0x0800dc71 800dc20: 0800dbed .word 0x0800dbed 800dc24: 0800dbed .word 0x0800dbed 800dc28: 0800dbed .word 0x0800dbed 800dc2c: 0800dbed .word 0x0800dbed 800dc30: 0800dd6f .word 0x0800dd6f 800dc34: 0800dc9b .word 0x0800dc9b 800dc38: 0800dd29 .word 0x0800dd29 800dc3c: 0800dbed .word 0x0800dbed 800dc40: 0800dbed .word 0x0800dbed 800dc44: 0800dd91 .word 0x0800dd91 800dc48: 0800dbed .word 0x0800dbed 800dc4c: 0800dc9b .word 0x0800dc9b 800dc50: 0800dbed .word 0x0800dbed 800dc54: 0800dbed .word 0x0800dbed 800dc58: 0800dd31 .word 0x0800dd31 800dc5c: 6833 ldr r3, [r6, #0] 800dc5e: 1d1a adds r2, r3, #4 800dc60: 681b ldr r3, [r3, #0] 800dc62: 6032 str r2, [r6, #0] 800dc64: f104 0642 add.w r6, r4, #66 @ 0x42 800dc68: f884 3042 strb.w r3, [r4, #66] @ 0x42 800dc6c: 2301 movs r3, #1 800dc6e: e09c b.n 800ddaa <_printf_i+0x1e6> 800dc70: 6833 ldr r3, [r6, #0] 800dc72: 6820 ldr r0, [r4, #0] 800dc74: 1d19 adds r1, r3, #4 800dc76: 6031 str r1, [r6, #0] 800dc78: 0606 lsls r6, r0, #24 800dc7a: d501 bpl.n 800dc80 <_printf_i+0xbc> 800dc7c: 681d ldr r5, [r3, #0] 800dc7e: e003 b.n 800dc88 <_printf_i+0xc4> 800dc80: 0645 lsls r5, r0, #25 800dc82: d5fb bpl.n 800dc7c <_printf_i+0xb8> 800dc84: f9b3 5000 ldrsh.w r5, [r3] 800dc88: 2d00 cmp r5, #0 800dc8a: da03 bge.n 800dc94 <_printf_i+0xd0> 800dc8c: 232d movs r3, #45 @ 0x2d 800dc8e: 426d negs r5, r5 800dc90: f884 3043 strb.w r3, [r4, #67] @ 0x43 800dc94: 230a movs r3, #10 800dc96: 4858 ldr r0, [pc, #352] @ (800ddf8 <_printf_i+0x234>) 800dc98: e011 b.n 800dcbe <_printf_i+0xfa> 800dc9a: 6821 ldr r1, [r4, #0] 800dc9c: 6833 ldr r3, [r6, #0] 800dc9e: 0608 lsls r0, r1, #24 800dca0: f853 5b04 ldr.w r5, [r3], #4 800dca4: d402 bmi.n 800dcac <_printf_i+0xe8> 800dca6: 0649 lsls r1, r1, #25 800dca8: bf48 it mi 800dcaa: b2ad uxthmi r5, r5 800dcac: 2f6f cmp r7, #111 @ 0x6f 800dcae: 6033 str r3, [r6, #0] 800dcb0: bf14 ite ne 800dcb2: 230a movne r3, #10 800dcb4: 2308 moveq r3, #8 800dcb6: 4850 ldr r0, [pc, #320] @ (800ddf8 <_printf_i+0x234>) 800dcb8: 2100 movs r1, #0 800dcba: f884 1043 strb.w r1, [r4, #67] @ 0x43 800dcbe: 6866 ldr r6, [r4, #4] 800dcc0: 2e00 cmp r6, #0 800dcc2: 60a6 str r6, [r4, #8] 800dcc4: db05 blt.n 800dcd2 <_printf_i+0x10e> 800dcc6: 6821 ldr r1, [r4, #0] 800dcc8: 432e orrs r6, r5 800dcca: f021 0104 bic.w r1, r1, #4 800dcce: 6021 str r1, [r4, #0] 800dcd0: d04b beq.n 800dd6a <_printf_i+0x1a6> 800dcd2: 4616 mov r6, r2 800dcd4: fbb5 f1f3 udiv r1, r5, r3 800dcd8: fb03 5711 mls r7, r3, r1, r5 800dcdc: 5dc7 ldrb r7, [r0, r7] 800dcde: f806 7d01 strb.w r7, [r6, #-1]! 800dce2: 462f mov r7, r5 800dce4: 42bb cmp r3, r7 800dce6: 460d mov r5, r1 800dce8: d9f4 bls.n 800dcd4 <_printf_i+0x110> 800dcea: 2b08 cmp r3, #8 800dcec: d10b bne.n 800dd06 <_printf_i+0x142> 800dcee: 6823 ldr r3, [r4, #0] 800dcf0: 07df lsls r7, r3, #31 800dcf2: d508 bpl.n 800dd06 <_printf_i+0x142> 800dcf4: 6923 ldr r3, [r4, #16] 800dcf6: 6861 ldr r1, [r4, #4] 800dcf8: 4299 cmp r1, r3 800dcfa: bfde ittt le 800dcfc: 2330 movle r3, #48 @ 0x30 800dcfe: f806 3c01 strble.w r3, [r6, #-1] 800dd02: f106 36ff addle.w r6, r6, #4294967295 800dd06: 1b92 subs r2, r2, r6 800dd08: 6122 str r2, [r4, #16] 800dd0a: 464b mov r3, r9 800dd0c: 4621 mov r1, r4 800dd0e: 4640 mov r0, r8 800dd10: f8cd a000 str.w sl, [sp] 800dd14: aa03 add r2, sp, #12 800dd16: f7ff fee3 bl 800dae0 <_printf_common> 800dd1a: 3001 adds r0, #1 800dd1c: d14a bne.n 800ddb4 <_printf_i+0x1f0> 800dd1e: f04f 30ff mov.w r0, #4294967295 800dd22: b004 add sp, #16 800dd24: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800dd28: 6823 ldr r3, [r4, #0] 800dd2a: f043 0320 orr.w r3, r3, #32 800dd2e: 6023 str r3, [r4, #0] 800dd30: 2778 movs r7, #120 @ 0x78 800dd32: 4832 ldr r0, [pc, #200] @ (800ddfc <_printf_i+0x238>) 800dd34: f884 7045 strb.w r7, [r4, #69] @ 0x45 800dd38: 6823 ldr r3, [r4, #0] 800dd3a: 6831 ldr r1, [r6, #0] 800dd3c: 061f lsls r7, r3, #24 800dd3e: f851 5b04 ldr.w r5, [r1], #4 800dd42: d402 bmi.n 800dd4a <_printf_i+0x186> 800dd44: 065f lsls r7, r3, #25 800dd46: bf48 it mi 800dd48: b2ad uxthmi r5, r5 800dd4a: 6031 str r1, [r6, #0] 800dd4c: 07d9 lsls r1, r3, #31 800dd4e: bf44 itt mi 800dd50: f043 0320 orrmi.w r3, r3, #32 800dd54: 6023 strmi r3, [r4, #0] 800dd56: b11d cbz r5, 800dd60 <_printf_i+0x19c> 800dd58: 2310 movs r3, #16 800dd5a: e7ad b.n 800dcb8 <_printf_i+0xf4> 800dd5c: 4826 ldr r0, [pc, #152] @ (800ddf8 <_printf_i+0x234>) 800dd5e: e7e9 b.n 800dd34 <_printf_i+0x170> 800dd60: 6823 ldr r3, [r4, #0] 800dd62: f023 0320 bic.w r3, r3, #32 800dd66: 6023 str r3, [r4, #0] 800dd68: e7f6 b.n 800dd58 <_printf_i+0x194> 800dd6a: 4616 mov r6, r2 800dd6c: e7bd b.n 800dcea <_printf_i+0x126> 800dd6e: 6833 ldr r3, [r6, #0] 800dd70: 6825 ldr r5, [r4, #0] 800dd72: 1d18 adds r0, r3, #4 800dd74: 6961 ldr r1, [r4, #20] 800dd76: 6030 str r0, [r6, #0] 800dd78: 062e lsls r6, r5, #24 800dd7a: 681b ldr r3, [r3, #0] 800dd7c: d501 bpl.n 800dd82 <_printf_i+0x1be> 800dd7e: 6019 str r1, [r3, #0] 800dd80: e002 b.n 800dd88 <_printf_i+0x1c4> 800dd82: 0668 lsls r0, r5, #25 800dd84: d5fb bpl.n 800dd7e <_printf_i+0x1ba> 800dd86: 8019 strh r1, [r3, #0] 800dd88: 2300 movs r3, #0 800dd8a: 4616 mov r6, r2 800dd8c: 6123 str r3, [r4, #16] 800dd8e: e7bc b.n 800dd0a <_printf_i+0x146> 800dd90: 6833 ldr r3, [r6, #0] 800dd92: 2100 movs r1, #0 800dd94: 1d1a adds r2, r3, #4 800dd96: 6032 str r2, [r6, #0] 800dd98: 681e ldr r6, [r3, #0] 800dd9a: 6862 ldr r2, [r4, #4] 800dd9c: 4630 mov r0, r6 800dd9e: f000 f859 bl 800de54 800dda2: b108 cbz r0, 800dda8 <_printf_i+0x1e4> 800dda4: 1b80 subs r0, r0, r6 800dda6: 6060 str r0, [r4, #4] 800dda8: 6863 ldr r3, [r4, #4] 800ddaa: 6123 str r3, [r4, #16] 800ddac: 2300 movs r3, #0 800ddae: f884 3043 strb.w r3, [r4, #67] @ 0x43 800ddb2: e7aa b.n 800dd0a <_printf_i+0x146> 800ddb4: 4632 mov r2, r6 800ddb6: 4649 mov r1, r9 800ddb8: 4640 mov r0, r8 800ddba: 6923 ldr r3, [r4, #16] 800ddbc: 47d0 blx sl 800ddbe: 3001 adds r0, #1 800ddc0: d0ad beq.n 800dd1e <_printf_i+0x15a> 800ddc2: 6823 ldr r3, [r4, #0] 800ddc4: 079b lsls r3, r3, #30 800ddc6: d413 bmi.n 800ddf0 <_printf_i+0x22c> 800ddc8: 68e0 ldr r0, [r4, #12] 800ddca: 9b03 ldr r3, [sp, #12] 800ddcc: 4298 cmp r0, r3 800ddce: bfb8 it lt 800ddd0: 4618 movlt r0, r3 800ddd2: e7a6 b.n 800dd22 <_printf_i+0x15e> 800ddd4: 2301 movs r3, #1 800ddd6: 4632 mov r2, r6 800ddd8: 4649 mov r1, r9 800ddda: 4640 mov r0, r8 800dddc: 47d0 blx sl 800ddde: 3001 adds r0, #1 800dde0: d09d beq.n 800dd1e <_printf_i+0x15a> 800dde2: 3501 adds r5, #1 800dde4: 68e3 ldr r3, [r4, #12] 800dde6: 9903 ldr r1, [sp, #12] 800dde8: 1a5b subs r3, r3, r1 800ddea: 42ab cmp r3, r5 800ddec: dcf2 bgt.n 800ddd4 <_printf_i+0x210> 800ddee: e7eb b.n 800ddc8 <_printf_i+0x204> 800ddf0: 2500 movs r5, #0 800ddf2: f104 0619 add.w r6, r4, #25 800ddf6: e7f5 b.n 800dde4 <_printf_i+0x220> 800ddf8: 0800e223 .word 0x0800e223 800ddfc: 0800e234 .word 0x0800e234 0800de00 : 800de00: 4288 cmp r0, r1 800de02: b510 push {r4, lr} 800de04: eb01 0402 add.w r4, r1, r2 800de08: d902 bls.n 800de10 800de0a: 4284 cmp r4, r0 800de0c: 4623 mov r3, r4 800de0e: d807 bhi.n 800de20 800de10: 1e43 subs r3, r0, #1 800de12: 42a1 cmp r1, r4 800de14: d008 beq.n 800de28 800de16: f811 2b01 ldrb.w r2, [r1], #1 800de1a: f803 2f01 strb.w r2, [r3, #1]! 800de1e: e7f8 b.n 800de12 800de20: 4601 mov r1, r0 800de22: 4402 add r2, r0 800de24: 428a cmp r2, r1 800de26: d100 bne.n 800de2a 800de28: bd10 pop {r4, pc} 800de2a: f813 4d01 ldrb.w r4, [r3, #-1]! 800de2e: f802 4d01 strb.w r4, [r2, #-1]! 800de32: e7f7 b.n 800de24 0800de34 <_sbrk_r>: 800de34: b538 push {r3, r4, r5, lr} 800de36: 2300 movs r3, #0 800de38: 4d05 ldr r5, [pc, #20] @ (800de50 <_sbrk_r+0x1c>) 800de3a: 4604 mov r4, r0 800de3c: 4608 mov r0, r1 800de3e: 602b str r3, [r5, #0] 800de40: f7f6 f976 bl 8004130 <_sbrk> 800de44: 1c43 adds r3, r0, #1 800de46: d102 bne.n 800de4e <_sbrk_r+0x1a> 800de48: 682b ldr r3, [r5, #0] 800de4a: b103 cbz r3, 800de4e <_sbrk_r+0x1a> 800de4c: 6023 str r3, [r4, #0] 800de4e: bd38 pop {r3, r4, r5, pc} 800de50: 2000186c .word 0x2000186c 0800de54 : 800de54: 4603 mov r3, r0 800de56: b510 push {r4, lr} 800de58: b2c9 uxtb r1, r1 800de5a: 4402 add r2, r0 800de5c: 4293 cmp r3, r2 800de5e: 4618 mov r0, r3 800de60: d101 bne.n 800de66 800de62: 2000 movs r0, #0 800de64: e003 b.n 800de6e 800de66: 7804 ldrb r4, [r0, #0] 800de68: 3301 adds r3, #1 800de6a: 428c cmp r4, r1 800de6c: d1f6 bne.n 800de5c 800de6e: bd10 pop {r4, pc} 0800de70 : 800de70: 440a add r2, r1 800de72: 4291 cmp r1, r2 800de74: f100 33ff add.w r3, r0, #4294967295 800de78: d100 bne.n 800de7c 800de7a: 4770 bx lr 800de7c: b510 push {r4, lr} 800de7e: f811 4b01 ldrb.w r4, [r1], #1 800de82: 4291 cmp r1, r2 800de84: f803 4f01 strb.w r4, [r3, #1]! 800de88: d1f9 bne.n 800de7e 800de8a: bd10 pop {r4, pc} 0800de8c <_realloc_r>: 800de8c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800de90: 4607 mov r7, r0 800de92: 4614 mov r4, r2 800de94: 460d mov r5, r1 800de96: b921 cbnz r1, 800dea2 <_realloc_r+0x16> 800de98: 4611 mov r1, r2 800de9a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800de9e: f7ff bc3b b.w 800d718 <_malloc_r> 800dea2: b92a cbnz r2, 800deb0 <_realloc_r+0x24> 800dea4: f7ff fbce bl 800d644 <_free_r> 800dea8: 4625 mov r5, r4 800deaa: 4628 mov r0, r5 800deac: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800deb0: f000 f81a bl 800dee8 <_malloc_usable_size_r> 800deb4: 4284 cmp r4, r0 800deb6: 4606 mov r6, r0 800deb8: d802 bhi.n 800dec0 <_realloc_r+0x34> 800deba: ebb4 0f50 cmp.w r4, r0, lsr #1 800debe: d8f4 bhi.n 800deaa <_realloc_r+0x1e> 800dec0: 4621 mov r1, r4 800dec2: 4638 mov r0, r7 800dec4: f7ff fc28 bl 800d718 <_malloc_r> 800dec8: 4680 mov r8, r0 800deca: b908 cbnz r0, 800ded0 <_realloc_r+0x44> 800decc: 4645 mov r5, r8 800dece: e7ec b.n 800deaa <_realloc_r+0x1e> 800ded0: 42b4 cmp r4, r6 800ded2: 4622 mov r2, r4 800ded4: 4629 mov r1, r5 800ded6: bf28 it cs 800ded8: 4632 movcs r2, r6 800deda: f7ff ffc9 bl 800de70 800dede: 4629 mov r1, r5 800dee0: 4638 mov r0, r7 800dee2: f7ff fbaf bl 800d644 <_free_r> 800dee6: e7f1 b.n 800decc <_realloc_r+0x40> 0800dee8 <_malloc_usable_size_r>: 800dee8: f851 3c04 ldr.w r3, [r1, #-4] 800deec: 1f18 subs r0, r3, #4 800deee: 2b00 cmp r3, #0 800def0: bfbc itt lt 800def2: 580b ldrlt r3, [r1, r0] 800def4: 18c0 addlt r0, r0, r3 800def6: 4770 bx lr 0800def8 <_init>: 800def8: b5f8 push {r3, r4, r5, r6, r7, lr} 800defa: bf00 nop 800defc: bcf8 pop {r3, r4, r5, r6, r7} 800defe: bc08 pop {r3} 800df00: 469e mov lr, r3 800df02: 4770 bx lr 0800df04 <_fini>: 800df04: b5f8 push {r3, r4, r5, r6, r7, lr} 800df06: bf00 nop 800df08: bcf8 pop {r3, r4, r5, r6, r7} 800df0a: bc08 pop {r3} 800df0c: 469e mov lr, r3 800df0e: 4770 bx lr