AUTOM10.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0000beec 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 000002ec 0800bff8 0800bff8 0000cff8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 0800c2e4 0800c2e4 0000e1d0 2**0 CONTENTS, READONLY 4 .ARM 00000008 0800c2e4 0800c2e4 0000d2e4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 0800c2ec 0800c2ec 0000e1d0 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 0800c2ec 0800c2ec 0000d2ec 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 0800c2f0 0800c2f0 0000d2f0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 000001d0 20000000 0800c2f4 0000e000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 0000164c 200001d0 0800c4c4 0000e1d0 2**3 ALLOC 10 ._user_heap_stack 00000604 2000181c 0800c4c4 0000e81c 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 0000e1d0 2**0 CONTENTS, READONLY 12 .debug_info 000186ab 00000000 00000000 0000e1f9 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00004546 00000000 00000000 000268a4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001610 00000000 00000000 0002adf0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 000010ee 00000000 00000000 0002c400 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 0001c748 00000000 00000000 0002d4ee 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001d04f 00000000 00000000 00049c36 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000958c6 00000000 00000000 00066c85 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 000fc54b 2**0 CONTENTS, READONLY 20 .debug_frame 00005f60 00000000 00000000 000fc590 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000052 00000000 00000000 001024f0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 0800010c <__do_global_dtors_aux>: 800010c: b510 push {r4, lr} 800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>) 8000110: 7823 ldrb r3, [r4, #0] 8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16> 8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>) 8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12> 8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>) 800011a: f3af 8000 nop.w 800011e: 2301 movs r3, #1 8000120: 7023 strb r3, [r4, #0] 8000122: bd10 pop {r4, pc} 8000124: 200001d0 .word 0x200001d0 8000128: 00000000 .word 0x00000000 800012c: 0800bfe0 .word 0x0800bfe0 08000130 : 8000130: b508 push {r3, lr} 8000132: 4b03 ldr r3, [pc, #12] @ (8000140 ) 8000134: b11b cbz r3, 800013e 8000136: 4903 ldr r1, [pc, #12] @ (8000144 ) 8000138: 4803 ldr r0, [pc, #12] @ (8000148 ) 800013a: f3af 8000 nop.w 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 8000144: 200001d4 .word 0x200001d4 8000148: 0800bfe0 .word 0x0800bfe0 0800014c : 800014c: 4603 mov r3, r0 800014e: f813 2b01 ldrb.w r2, [r3], #1 8000152: 2a00 cmp r2, #0 8000154: d1fb bne.n 800014e 8000156: 1a18 subs r0, r3, r0 8000158: 3801 subs r0, #1 800015a: 4770 bx lr 0800015c : uint16_t ch5 ; uint16_t ch6 ; uint16_t ch7 ; uint16_t ch8 ; void manageAdc(void){ 800015c: b480 push {r7} 800015e: af00 add r7, sp, #0 if (adc_avg_ready) 8000160: 4b12 ldr r3, [pc, #72] @ (80001ac ) 8000162: 781b ldrb r3, [r3, #0] 8000164: b2db uxtb r3, r3 8000166: 2b00 cmp r3, #0 8000168: d01b beq.n 80001a2 { adc_avg_ready = 0; 800016a: 4b10 ldr r3, [pc, #64] @ (80001ac ) 800016c: 2200 movs r2, #0 800016e: 701a strb r2, [r3, #0] // Read averaged channels (example mapping) ch4 = adc_avg[0]; 8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 ) 8000172: 881b ldrh r3, [r3, #0] 8000174: b29a uxth r2, r3 8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 ) 8000178: 801a strh r2, [r3, #0] ch5 = adc_avg[1]; 800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 ) 800017c: 885b ldrh r3, [r3, #2] 800017e: b29a uxth r2, r3 8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 ) 8000182: 801a strh r2, [r3, #0] ch6 = adc_avg[2]; 8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 ) 8000186: 889b ldrh r3, [r3, #4] 8000188: b29a uxth r2, r3 800018a: 4b0c ldr r3, [pc, #48] @ (80001bc ) 800018c: 801a strh r2, [r3, #0] ch7 = adc_avg[3]; 800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 ) 8000190: 88db ldrh r3, [r3, #6] 8000192: b29a uxth r2, r3 8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 ) 8000196: 801a strh r2, [r3, #0] ch8 = adc_avg[4]; 8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 ) 800019a: 891b ldrh r3, [r3, #8] 800019c: b29a uxth r2, r3 800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 ) 80001a0: 801a strh r2, [r3, #0] // Use them (convert to volts, control, etc.) // float v4 = (3.3f * ch4) / 4095.0f; } } 80001a2: bf00 nop 80001a4: 46bd mov sp, r7 80001a6: bc80 pop {r7} 80001a8: 4770 bx lr 80001aa: bf00 nop 80001ac: 20000219 .word 0x20000219 80001b0: 200001f8 .word 0x200001f8 80001b4: 2000021a .word 0x2000021a 80001b8: 2000021c .word 0x2000021c 80001bc: 2000021e .word 0x2000021e 80001c0: 20000220 .word 0x20000220 80001c4: 20000222 .word 0x20000222 080001c8 : void readAdc(void){ 80001c8: b480 push {r7} 80001ca: b083 sub sp, #12 80001cc: af00 add r7, sp, #0 for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001ce: 2300 movs r3, #0 80001d0: 71fb strb r3, [r7, #7] 80001d2: e010 b.n 80001f6 { adc_sum[i] += adc_dma_buf[i]; 80001d4: 79fb ldrb r3, [r7, #7] 80001d6: 4a21 ldr r2, [pc, #132] @ (800025c ) 80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 80001dc: b299 uxth r1, r3 80001de: 79fb ldrb r3, [r7, #7] 80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 ) 80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2] 80001e6: 79fb ldrb r3, [r7, #7] 80001e8: 440a add r2, r1 80001ea: 491d ldr r1, [pc, #116] @ (8000260 ) 80001ec: f841 2023 str.w r2, [r1, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 80001f0: 79fb ldrb r3, [r7, #7] 80001f2: 3301 adds r3, #1 80001f4: 71fb strb r3, [r7, #7] 80001f6: 79fb ldrb r3, [r7, #7] 80001f8: 2b04 cmp r3, #4 80001fa: d9eb bls.n 80001d4 } adc_sum_count++; 80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 ) 80001fe: 781b ldrb r3, [r3, #0] 8000200: 3301 adds r3, #1 8000202: b2da uxtb r2, r3 8000204: 4b17 ldr r3, [pc, #92] @ (8000264 ) 8000206: 701a strb r2, [r3, #0] /* When we collected ADC_AVG_WINDOW samples → compute average */ if (adc_sum_count >= ADC_AVG_WINDOW) 8000208: 4b16 ldr r3, [pc, #88] @ (8000264 ) 800020a: 781b ldrb r3, [r3, #0] 800020c: 2b04 cmp r3, #4 800020e: d920 bls.n 8000252 { for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 8000210: 2300 movs r3, #0 8000212: 71bb strb r3, [r7, #6] 8000214: e014 b.n 8000240 { adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW); 8000216: 79bb ldrb r3, [r7, #6] 8000218: 4a11 ldr r2, [pc, #68] @ (8000260 ) 800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800021e: 4a12 ldr r2, [pc, #72] @ (8000268 ) 8000220: fba2 2303 umull r2, r3, r2, r3 8000224: 089a lsrs r2, r3, #2 8000226: 79bb ldrb r3, [r7, #6] 8000228: b291 uxth r1, r2 800022a: 4a10 ldr r2, [pc, #64] @ (800026c ) 800022c: f822 1013 strh.w r1, [r2, r3, lsl #1] adc_sum[i] = 0; 8000230: 79bb ldrb r3, [r7, #6] 8000232: 4a0b ldr r2, [pc, #44] @ (8000260 ) 8000234: 2100 movs r1, #0 8000236: f842 1023 str.w r1, [r2, r3, lsl #2] for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++) 800023a: 79bb ldrb r3, [r7, #6] 800023c: 3301 adds r3, #1 800023e: 71bb strb r3, [r7, #6] 8000240: 79bb ldrb r3, [r7, #6] 8000242: 2b04 cmp r3, #4 8000244: d9e7 bls.n 8000216 } adc_sum_count = 0; 8000246: 4b07 ldr r3, [pc, #28] @ (8000264 ) 8000248: 2200 movs r2, #0 800024a: 701a strb r2, [r3, #0] adc_avg_ready = 1; // tell main loop new data is ready 800024c: 4b08 ldr r3, [pc, #32] @ (8000270 ) 800024e: 2201 movs r2, #1 8000250: 701a strb r2, [r3, #0] } } 8000252: bf00 nop 8000254: 370c adds r7, #12 8000256: 46bd mov sp, r7 8000258: bc80 pop {r7} 800025a: 4770 bx lr 800025c: 200001ec .word 0x200001ec 8000260: 20000204 .word 0x20000204 8000264: 20000218 .word 0x20000218 8000268: cccccccd .word 0xcccccccd 800026c: 200001f8 .word 0x200001f8 8000270: 20000219 .word 0x20000219 08000274 : uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data); uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data); /* Pseudo-array accessor EEW[idx] */ static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value) { 8000274: b580 push {r7, lr} 8000276: b082 sub sp, #8 8000278: af00 add r7, sp, #0 800027a: 4603 mov r3, r0 800027c: 6039 str r1, [r7, #0] 800027e: 71fb strb r3, [r7, #7] return EE_ReadVariable(EEW_ADDR(idx), value); 8000280: 79fb ldrb r3, [r7, #7] 8000282: b29b uxth r3, r3 8000284: 3301 adds r3, #1 8000286: b29b uxth r3, r3 8000288: 6839 ldr r1, [r7, #0] 800028a: 4618 mov r0, r3 800028c: f000 ff36 bl 80010fc 8000290: 4603 mov r3, r0 } 8000292: 4618 mov r0, r3 8000294: 3708 adds r7, #8 8000296: 46bd mov sp, r7 8000298: bd80 pop {r7, pc} 0800029a : static inline uint16_t EEW_Write(uint8_t idx, uint16_t value) { 800029a: b580 push {r7, lr} 800029c: b082 sub sp, #8 800029e: af00 add r7, sp, #0 80002a0: 4603 mov r3, r0 80002a2: 460a mov r2, r1 80002a4: 71fb strb r3, [r7, #7] 80002a6: 4613 mov r3, r2 80002a8: 80bb strh r3, [r7, #4] return EE_WriteVariable(EEW_ADDR(idx), value); 80002aa: 79fb ldrb r3, [r7, #7] 80002ac: b29b uxth r3, r3 80002ae: 3301 adds r3, #1 80002b0: b29b uxth r3, r3 80002b2: 88ba ldrh r2, [r7, #4] 80002b4: 4611 mov r1, r2 80002b6: 4618 mov r0, r3 80002b8: f000 ff3c bl 8001134 80002bc: 4603 mov r3, r0 } 80002be: 4618 mov r0, r3 80002c0: 3708 adds r7, #8 80002c2: 46bd mov sp, r7 80002c4: bd80 pop {r7, pc} 080002c6 : extern uint16_t ch6 ; extern uint16_t ch7 ; extern uint16_t ch8 ; extern const uint8_t deftab[]; bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){ 80002c6: b490 push {r4, r7} 80002c8: b082 sub sp, #8 80002ca: af00 add r7, sp, #0 80002cc: 4604 mov r4, r0 80002ce: 4608 mov r0, r1 80002d0: 4611 mov r1, r2 80002d2: 461a mov r2, r3 80002d4: 4623 mov r3, r4 80002d6: 71fb strb r3, [r7, #7] 80002d8: 4603 mov r3, r0 80002da: 71bb strb r3, [r7, #6] 80002dc: 460b mov r3, r1 80002de: 717b strb r3, [r7, #5] 80002e0: 4613 mov r3, r2 80002e2: 713b strb r3, [r7, #4] if((c1>='0')&&(c1<='9')){ 80002e4: 79fb ldrb r3, [r7, #7] 80002e6: 2b2f cmp r3, #47 @ 0x2f 80002e8: d906 bls.n 80002f8 80002ea: 79fb ldrb r3, [r7, #7] 80002ec: 2b39 cmp r3, #57 @ 0x39 80002ee: d803 bhi.n 80002f8 c1-='0'; 80002f0: 79fb ldrb r3, [r7, #7] 80002f2: 3b30 subs r3, #48 @ 0x30 80002f4: 71fb strb r3, [r7, #7] 80002f6: e00b b.n 8000310 }else if((c1>='a')&&(c1<='f')){ 80002f8: 79fb ldrb r3, [r7, #7] 80002fa: 2b60 cmp r3, #96 @ 0x60 80002fc: d906 bls.n 800030c 80002fe: 79fb ldrb r3, [r7, #7] 8000300: 2b66 cmp r3, #102 @ 0x66 8000302: d803 bhi.n 800030c c1=(c1-'a')+10; 8000304: 79fb ldrb r3, [r7, #7] 8000306: 3b57 subs r3, #87 @ 0x57 8000308: 71fb strb r3, [r7, #7] 800030a: e001 b.n 8000310 }else return false; 800030c: 2300 movs r3, #0 800030e: e070 b.n 80003f2 if((c2>='0')&&(c2<='9')){ 8000310: 79bb ldrb r3, [r7, #6] 8000312: 2b2f cmp r3, #47 @ 0x2f 8000314: d906 bls.n 8000324 8000316: 79bb ldrb r3, [r7, #6] 8000318: 2b39 cmp r3, #57 @ 0x39 800031a: d803 bhi.n 8000324 c2-='0'; 800031c: 79bb ldrb r3, [r7, #6] 800031e: 3b30 subs r3, #48 @ 0x30 8000320: 71bb strb r3, [r7, #6] 8000322: e00b b.n 800033c }else if((c2>='a')&&(c2<='f')){ 8000324: 79bb ldrb r3, [r7, #6] 8000326: 2b60 cmp r3, #96 @ 0x60 8000328: d906 bls.n 8000338 800032a: 79bb ldrb r3, [r7, #6] 800032c: 2b66 cmp r3, #102 @ 0x66 800032e: d803 bhi.n 8000338 c2=(c2-'a')+10; 8000330: 79bb ldrb r3, [r7, #6] 8000332: 3b57 subs r3, #87 @ 0x57 8000334: 71bb strb r3, [r7, #6] 8000336: e001 b.n 800033c }else return false; 8000338: 2300 movs r3, #0 800033a: e05a b.n 80003f2 if((c3>='0')&&(c3<='9')){ 800033c: 797b ldrb r3, [r7, #5] 800033e: 2b2f cmp r3, #47 @ 0x2f 8000340: d906 bls.n 8000350 8000342: 797b ldrb r3, [r7, #5] 8000344: 2b39 cmp r3, #57 @ 0x39 8000346: d803 bhi.n 8000350 c3-='0'; 8000348: 797b ldrb r3, [r7, #5] 800034a: 3b30 subs r3, #48 @ 0x30 800034c: 717b strb r3, [r7, #5] 800034e: e00b b.n 8000368 }else if((c3>='a')&&(c3<='f')){ 8000350: 797b ldrb r3, [r7, #5] 8000352: 2b60 cmp r3, #96 @ 0x60 8000354: d906 bls.n 8000364 8000356: 797b ldrb r3, [r7, #5] 8000358: 2b66 cmp r3, #102 @ 0x66 800035a: d803 bhi.n 8000364 c3=(c3-'a')+10; 800035c: 797b ldrb r3, [r7, #5] 800035e: 3b57 subs r3, #87 @ 0x57 8000360: 717b strb r3, [r7, #5] 8000362: e001 b.n 8000368 }else return false; 8000364: 2300 movs r3, #0 8000366: e044 b.n 80003f2 if((c4>='0')&&(c4<='9')){ 8000368: 793b ldrb r3, [r7, #4] 800036a: 2b2f cmp r3, #47 @ 0x2f 800036c: d906 bls.n 800037c 800036e: 793b ldrb r3, [r7, #4] 8000370: 2b39 cmp r3, #57 @ 0x39 8000372: d803 bhi.n 800037c c4-='0'; 8000374: 793b ldrb r3, [r7, #4] 8000376: 3b30 subs r3, #48 @ 0x30 8000378: 713b strb r3, [r7, #4] 800037a: e00b b.n 8000394 }else if((c4>='a')&&(c4<='f')){ 800037c: 793b ldrb r3, [r7, #4] 800037e: 2b60 cmp r3, #96 @ 0x60 8000380: d906 bls.n 8000390 8000382: 793b ldrb r3, [r7, #4] 8000384: 2b66 cmp r3, #102 @ 0x66 8000386: d803 bhi.n 8000390 c4=(c4-'a')+10; 8000388: 793b ldrb r3, [r7, #4] 800038a: 3b57 subs r3, #87 @ 0x57 800038c: 713b strb r3, [r7, #4] 800038e: e001 b.n 8000394 }else return false; 8000390: 2300 movs r3, #0 8000392: e02e b.n 80003f2 *retval=c1; 8000394: 79fb ldrb r3, [r7, #7] 8000396: b29a uxth r2, r3 8000398: 693b ldr r3, [r7, #16] 800039a: 801a strh r2, [r3, #0] *retval*=16; 800039c: 693b ldr r3, [r7, #16] 800039e: 881b ldrh r3, [r3, #0] 80003a0: 011b lsls r3, r3, #4 80003a2: b29a uxth r2, r3 80003a4: 693b ldr r3, [r7, #16] 80003a6: 801a strh r2, [r3, #0] *retval+=c2; 80003a8: 693b ldr r3, [r7, #16] 80003aa: 881a ldrh r2, [r3, #0] 80003ac: 79bb ldrb r3, [r7, #6] 80003ae: b29b uxth r3, r3 80003b0: 4413 add r3, r2 80003b2: b29a uxth r2, r3 80003b4: 693b ldr r3, [r7, #16] 80003b6: 801a strh r2, [r3, #0] *retval*=16; 80003b8: 693b ldr r3, [r7, #16] 80003ba: 881b ldrh r3, [r3, #0] 80003bc: 011b lsls r3, r3, #4 80003be: b29a uxth r2, r3 80003c0: 693b ldr r3, [r7, #16] 80003c2: 801a strh r2, [r3, #0] *retval+=c3; 80003c4: 693b ldr r3, [r7, #16] 80003c6: 881a ldrh r2, [r3, #0] 80003c8: 797b ldrb r3, [r7, #5] 80003ca: b29b uxth r3, r3 80003cc: 4413 add r3, r2 80003ce: b29a uxth r2, r3 80003d0: 693b ldr r3, [r7, #16] 80003d2: 801a strh r2, [r3, #0] *retval*=16; 80003d4: 693b ldr r3, [r7, #16] 80003d6: 881b ldrh r3, [r3, #0] 80003d8: 011b lsls r3, r3, #4 80003da: b29a uxth r2, r3 80003dc: 693b ldr r3, [r7, #16] 80003de: 801a strh r2, [r3, #0] *retval+=c4; 80003e0: 693b ldr r3, [r7, #16] 80003e2: 881a ldrh r2, [r3, #0] 80003e4: 793b ldrb r3, [r7, #4] 80003e6: b29b uxth r3, r3 80003e8: 4413 add r3, r2 80003ea: b29a uxth r2, r3 80003ec: 693b ldr r3, [r7, #16] 80003ee: 801a strh r2, [r3, #0] return true; 80003f0: 2301 movs r3, #1 } 80003f2: 4618 mov r0, r3 80003f4: 3708 adds r7, #8 80003f6: 46bd mov sp, r7 80003f8: bc90 pop {r4, r7} 80003fa: 4770 bx lr 080003fc : void manageCDC(void){ 80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8000400: b0a7 sub sp, #156 @ 0x9c 8000402: af06 add r7, sp, #24 uint16_t val; uint16_t st; uint16_t eeadd; uint8_t i; if (CDC_Available()) { 8000404: f00a fc88 bl 800ad18 8000408: 4603 mov r3, r0 800040a: 2b00 cmp r3, #0 800040c: f000 84b8 beq.w 8000d80 int rx = CDC_ReadByte(); 8000410: f00a fc96 bl 800ad40 8000414: 67b8 str r0, [r7, #120] @ 0x78 if (rx < 0) return; 8000416: 6fbb ldr r3, [r7, #120] @ 0x78 8000418: 2b00 cmp r3, #0 800041a: f2c0 84b0 blt.w 8000d7e //uint8_t out = (uint8_t)c; //if (out >= 'a' && out <= 'z') out -= 32; // to upper rxbuf[rxidx]=rx; 800041e: 4ba3 ldr r3, [pc, #652] @ (80006ac ) 8000420: 781b ldrb r3, [r3, #0] 8000422: 461a mov r2, r3 8000424: 6fbb ldr r3, [r7, #120] @ 0x78 8000426: b2d9 uxtb r1, r3 8000428: 4ba1 ldr r3, [pc, #644] @ (80006b0 ) 800042a: 5499 strb r1, [r3, r2] while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo 800042c: bf00 nop 800042e: 4b9f ldr r3, [pc, #636] @ (80006ac ) 8000430: 781b ldrb r3, [r3, #0] 8000432: 461a mov r2, r3 8000434: 4b9e ldr r3, [pc, #632] @ (80006b0 ) 8000436: 4413 add r3, r2 8000438: 2101 movs r1, #1 800043a: 4618 mov r0, r3 800043c: f00a fd42 bl 800aec4 8000440: 4603 mov r3, r0 8000442: 2b01 cmp r3, #1 8000444: d0f3 beq.n 800042e if((rx==0x0d)||(rx==0x0a)){ 8000446: 6fbb ldr r3, [r7, #120] @ 0x78 8000448: 2b0d cmp r3, #13 800044a: d003 beq.n 8000454 800044c: 6fbb ldr r3, [r7, #120] @ 0x78 800044e: 2b0a cmp r3, #10 8000450: f040 848e bne.w 8000d70 if(rxidx){ 8000454: 4b95 ldr r3, [pc, #596] @ (80006ac ) 8000456: 781b ldrb r3, [r3, #0] 8000458: 2b00 cmp r3, #0 800045a: f000 8485 beq.w 8000d68 switch(rxbuf[0]){ 800045e: 4b94 ldr r3, [pc, #592] @ (80006b0 ) 8000460: 781b ldrb r3, [r3, #0] 8000462: 2b6d cmp r3, #109 @ 0x6d 8000464: f000 80e7 beq.w 8000636 8000468: 2b6d cmp r3, #109 @ 0x6d 800046a: f300 846b bgt.w 8000d44 800046e: 2b69 cmp r3, #105 @ 0x69 8000470: d00a beq.n 8000488 8000472: 2b69 cmp r3, #105 @ 0x69 8000474: f300 8466 bgt.w 8000d44 8000478: 2b49 cmp r3, #73 @ 0x49 800047a: f000 80cb beq.w 8000614 800047e: 2b65 cmp r3, #101 @ 0x65 8000480: f000 820e beq.w 80008a0 8000484: f000 bc5e b.w 8000d44 case 'i': sprintf((char*)s,"info\n"); 8000488: f107 030c add.w r3, r7, #12 800048c: 4989 ldr r1, [pc, #548] @ (80006b4 ) 800048e: 4618 mov r0, r3 8000490: f00b f8f6 bl 800b680 while (CDC_Transmit_FS(s, 5) == USBD_BUSY); 8000494: bf00 nop 8000496: f107 030c add.w r3, r7, #12 800049a: 2105 movs r1, #5 800049c: 4618 mov r0, r3 800049e: f00a fd11 bl 800aec4 80004a2: 4603 mov r3, r0 80004a4: 2b01 cmp r3, #1 80004a6: d0f6 beq.n 8000496 sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4)); 80004a8: 2100 movs r1, #0 80004aa: 4883 ldr r0, [pc, #524] @ (80006b8 ) 80004ac: f001 fc4e bl 8001d4c 80004b0: 4603 mov r3, r0 80004b2: 4698 mov r8, r3 80004b4: 2104 movs r1, #4 80004b6: 4880 ldr r0, [pc, #512] @ (80006b8 ) 80004b8: f001 fc48 bl 8001d4c 80004bc: 4603 mov r3, r0 80004be: 4699 mov r9, r3 80004c0: 2108 movs r1, #8 80004c2: 487d ldr r0, [pc, #500] @ (80006b8 ) 80004c4: f001 fc42 bl 8001d4c 80004c8: 4603 mov r3, r0 80004ca: 461c mov r4, r3 80004cc: 210c movs r1, #12 80004ce: 487a ldr r0, [pc, #488] @ (80006b8 ) 80004d0: f001 fc3c bl 8001d4c 80004d4: 4603 mov r3, r0 80004d6: 461d mov r5, r3 80004d8: 2100 movs r1, #0 80004da: 4878 ldr r0, [pc, #480] @ (80006bc ) 80004dc: f001 fc36 bl 8001d4c 80004e0: 4603 mov r3, r0 80004e2: 461e mov r6, r3 80004e4: 2104 movs r1, #4 80004e6: 4875 ldr r0, [pc, #468] @ (80006bc ) 80004e8: f001 fc30 bl 8001d4c 80004ec: 4603 mov r3, r0 80004ee: 607b str r3, [r7, #4] 80004f0: 2108 movs r1, #8 80004f2: 4872 ldr r0, [pc, #456] @ (80006bc ) 80004f4: f001 fc2a bl 8001d4c 80004f8: 4603 mov r3, r0 80004fa: 603b str r3, [r7, #0] 80004fc: 210c movs r1, #12 80004fe: 486f ldr r0, [pc, #444] @ (80006bc ) 8000500: f001 fc24 bl 8001d4c 8000504: 4603 mov r3, r0 8000506: f107 000c add.w r0, r7, #12 800050a: 9305 str r3, [sp, #20] 800050c: 683a ldr r2, [r7, #0] 800050e: 9204 str r2, [sp, #16] 8000510: 687b ldr r3, [r7, #4] 8000512: 9303 str r3, [sp, #12] 8000514: 9602 str r6, [sp, #8] 8000516: 9501 str r5, [sp, #4] 8000518: 9400 str r4, [sp, #0] 800051a: 464b mov r3, r9 800051c: 4642 mov r2, r8 800051e: 4968 ldr r1, [pc, #416] @ (80006c0 ) 8000520: f00b f8ae bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000524: bf00 nop 8000526: f107 030c add.w r3, r7, #12 800052a: 4618 mov r0, r3 800052c: f7ff fe0e bl 800014c 8000530: 4603 mov r3, r0 8000532: b29a uxth r2, r3 8000534: f107 030c add.w r3, r7, #12 8000538: 4611 mov r1, r2 800053a: 4618 mov r0, r3 800053c: f00a fcc2 bl 800aec4 8000540: 4603 mov r3, r0 8000542: 2b01 cmp r3, #1 8000544: d0ef beq.n 8000526 sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4)); 8000546: 4b5c ldr r3, [pc, #368] @ (80006b8 ) 8000548: 681b ldr r3, [r3, #0] 800054a: 6b5b ldr r3, [r3, #52] @ 0x34 800054c: 607b str r3, [r7, #4] 800054e: 4b5a ldr r3, [pc, #360] @ (80006b8 ) 8000550: 681b ldr r3, [r3, #0] 8000552: 6b99 ldr r1, [r3, #56] @ 0x38 8000554: 6039 str r1, [r7, #0] 8000556: 4b58 ldr r3, [pc, #352] @ (80006b8 ) 8000558: 681b ldr r3, [r3, #0] 800055a: 6bdb ldr r3, [r3, #60] @ 0x3c 800055c: 4a56 ldr r2, [pc, #344] @ (80006b8 ) 800055e: 6812 ldr r2, [r2, #0] 8000560: 6c12 ldr r2, [r2, #64] @ 0x40 8000562: 4956 ldr r1, [pc, #344] @ (80006bc ) 8000564: 6809 ldr r1, [r1, #0] 8000566: 6b49 ldr r1, [r1, #52] @ 0x34 8000568: 4854 ldr r0, [pc, #336] @ (80006bc ) 800056a: 6800 ldr r0, [r0, #0] 800056c: 6b80 ldr r0, [r0, #56] @ 0x38 800056e: 4c53 ldr r4, [pc, #332] @ (80006bc ) 8000570: 6824 ldr r4, [r4, #0] 8000572: 6be4 ldr r4, [r4, #60] @ 0x3c 8000574: 4d51 ldr r5, [pc, #324] @ (80006bc ) 8000576: 682d ldr r5, [r5, #0] 8000578: 6c2d ldr r5, [r5, #64] @ 0x40 800057a: f107 060c add.w r6, r7, #12 800057e: 9505 str r5, [sp, #20] 8000580: 9404 str r4, [sp, #16] 8000582: 9003 str r0, [sp, #12] 8000584: 9102 str r1, [sp, #8] 8000586: 9201 str r2, [sp, #4] 8000588: 9300 str r3, [sp, #0] 800058a: 683b ldr r3, [r7, #0] 800058c: 687a ldr r2, [r7, #4] 800058e: 494d ldr r1, [pc, #308] @ (80006c4 ) 8000590: 4630 mov r0, r6 8000592: f00b f875 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000596: bf00 nop 8000598: f107 030c add.w r3, r7, #12 800059c: 4618 mov r0, r3 800059e: f7ff fdd5 bl 800014c 80005a2: 4603 mov r3, r0 80005a4: b29a uxth r2, r3 80005a6: f107 030c add.w r3, r7, #12 80005aa: 4611 mov r1, r2 80005ac: 4618 mov r0, r3 80005ae: f00a fc89 bl 800aec4 80005b2: 4603 mov r3, r0 80005b4: 2b01 cmp r3, #1 80005b6: d0ef beq.n 8000598 sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8); 80005b8: 4b43 ldr r3, [pc, #268] @ (80006c8 ) 80005ba: 781b ldrb r3, [r3, #0] 80005bc: 461d mov r5, r3 80005be: 4b43 ldr r3, [pc, #268] @ (80006cc ) 80005c0: 881b ldrh r3, [r3, #0] 80005c2: 461e mov r6, r3 80005c4: 4b42 ldr r3, [pc, #264] @ (80006d0 ) 80005c6: 881b ldrh r3, [r3, #0] 80005c8: 461a mov r2, r3 80005ca: 4b42 ldr r3, [pc, #264] @ (80006d4 ) 80005cc: 881b ldrh r3, [r3, #0] 80005ce: 4619 mov r1, r3 80005d0: 4b41 ldr r3, [pc, #260] @ (80006d8 ) 80005d2: 881b ldrh r3, [r3, #0] 80005d4: 461c mov r4, r3 80005d6: 4b41 ldr r3, [pc, #260] @ (80006dc ) 80005d8: 881b ldrh r3, [r3, #0] 80005da: f107 000c add.w r0, r7, #12 80005de: 9303 str r3, [sp, #12] 80005e0: 9402 str r4, [sp, #8] 80005e2: 9101 str r1, [sp, #4] 80005e4: 9200 str r2, [sp, #0] 80005e6: 4633 mov r3, r6 80005e8: 462a mov r2, r5 80005ea: 493d ldr r1, [pc, #244] @ (80006e0 ) 80005ec: f00b f848 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 80005f0: bf00 nop 80005f2: f107 030c add.w r3, r7, #12 80005f6: 4618 mov r0, r3 80005f8: f7ff fda8 bl 800014c 80005fc: 4603 mov r3, r0 80005fe: b29a uxth r2, r3 8000600: f107 030c add.w r3, r7, #12 8000604: 4611 mov r1, r2 8000606: 4618 mov r0, r3 8000608: f00a fc5c bl 800aec4 800060c: 4603 mov r3, r0 800060e: 2b01 cmp r3, #1 8000610: d0ef beq.n 80005f2 break; 8000612: e3a9 b.n 8000d68 case 'I': sprintf((char*)s,"\nID000000"); 8000614: f107 030c add.w r3, r7, #12 8000618: 4932 ldr r1, [pc, #200] @ (80006e4 ) 800061a: 4618 mov r0, r3 800061c: f00b f830 bl 800b680 while (CDC_Transmit_FS(s, 9) == USBD_BUSY); 8000620: bf00 nop 8000622: f107 030c add.w r3, r7, #12 8000626: 2109 movs r1, #9 8000628: 4618 mov r0, r3 800062a: f00a fc4b bl 800aec4 800062e: 4603 mov r3, r0 8000630: 2b01 cmp r3, #1 8000632: d0f6 beq.n 8000622 break; 8000634: e398 b.n 8000d68 case 'm': if(rxidx==8){ 8000636: 4b1d ldr r3, [pc, #116] @ (80006ac ) 8000638: 781b ldrb r3, [r3, #0] 800063a: 2b08 cmp r3, #8 800063c: f040 811e bne.w 800087c if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){ 8000640: 4b1b ldr r3, [pc, #108] @ (80006b0 ) 8000642: 785b ldrb r3, [r3, #1] 8000644: 2b30 cmp r3, #48 @ 0x30 8000646: f240 8108 bls.w 800085a 800064a: 4b19 ldr r3, [pc, #100] @ (80006b0 ) 800064c: 785b ldrb r3, [r3, #1] 800064e: 2b34 cmp r3, #52 @ 0x34 8000650: f200 8103 bhi.w 800085a mot=rxbuf[1]-='0'; 8000654: 4b16 ldr r3, [pc, #88] @ (80006b0 ) 8000656: 785b ldrb r3, [r3, #1] 8000658: 3b30 subs r3, #48 @ 0x30 800065a: b2da uxtb r2, r3 800065c: 4b14 ldr r3, [pc, #80] @ (80006b0 ) 800065e: 705a strb r2, [r3, #1] 8000660: 4b13 ldr r3, [pc, #76] @ (80006b0 ) 8000662: 785b ldrb r3, [r3, #1] 8000664: f887 3077 strb.w r3, [r7, #119] @ 0x77 if(rxbuf[2]=='f'){ 8000668: 4b11 ldr r3, [pc, #68] @ (80006b0 ) 800066a: 789b ldrb r3, [r3, #2] 800066c: 2b66 cmp r3, #102 @ 0x66 800066e: d103 bne.n 8000678 dir=FW; 8000670: 2300 movs r3, #0 8000672: f887 307f strb.w r3, [r7, #127] @ 0x7f 8000676: e039 b.n 80006ec }else if(rxbuf[2]=='b'){ 8000678: 4b0d ldr r3, [pc, #52] @ (80006b0 ) 800067a: 789b ldrb r3, [r3, #2] 800067c: 2b62 cmp r3, #98 @ 0x62 800067e: d103 bne.n 8000688 dir=BW; 8000680: 2301 movs r3, #1 8000682: f887 307f strb.w r3, [r7, #127] @ 0x7f 8000686: e031 b.n 80006ec }else{ sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore 8000688: f107 030c add.w r3, r7, #12 800068c: 4916 ldr r1, [pc, #88] @ (80006e8 ) 800068e: 4618 mov r0, r3 8000690: f00a fff6 bl 800b680 while (CDC_Transmit_FS(s, 16) == USBD_BUSY); 8000694: bf00 nop 8000696: f107 030c add.w r3, r7, #12 800069a: 2110 movs r1, #16 800069c: 4618 mov r0, r3 800069e: f00a fc11 bl 800aec4 80006a2: 4603 mov r3, r0 80006a4: 2b01 cmp r3, #1 80006a6: d0f6 beq.n 8000696 break; 80006a8: e35e b.n 8000d68 80006aa: bf00 nop 80006ac: 20000224 .word 0x20000224 80006b0: 20000228 .word 0x20000228 80006b4: 0800bff8 .word 0x0800bff8 80006b8: 20000300 .word 0x20000300 80006bc: 20000348 .word 0x20000348 80006c0: 0800c000 .word 0x0800c000 80006c4: 0800c018 .word 0x0800c018 80006c8: 200003d8 .word 0x200003d8 80006cc: 2000021a .word 0x2000021a 80006d0: 2000021c .word 0x2000021c 80006d4: 2000021e .word 0x2000021e 80006d8: 20000220 .word 0x20000220 80006dc: 20000222 .word 0x20000222 80006e0: 0800c04c .word 0x0800c04c 80006e4: 0800c084 .word 0x0800c084 80006e8: 0800c090 .word 0x0800c090 } if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 80006ec: 4bb4 ldr r3, [pc, #720] @ (80009c0 ) 80006ee: 78db ldrb r3, [r3, #3] 80006f0: 2b2f cmp r3, #47 @ 0x2f 80006f2: f240 80a1 bls.w 8000838 80006f6: 4bb2 ldr r3, [pc, #712] @ (80009c0 ) 80006f8: 78db ldrb r3, [r3, #3] 80006fa: 2b39 cmp r3, #57 @ 0x39 80006fc: f200 809c bhi.w 8000838 8000700: 4baf ldr r3, [pc, #700] @ (80009c0 ) 8000702: 791b ldrb r3, [r3, #4] 8000704: 2b2f cmp r3, #47 @ 0x2f 8000706: f240 8097 bls.w 8000838 800070a: 4bad ldr r3, [pc, #692] @ (80009c0 ) 800070c: 791b ldrb r3, [r3, #4] 800070e: 2b39 cmp r3, #57 @ 0x39 8000710: f200 8092 bhi.w 8000838 8000714: 4baa ldr r3, [pc, #680] @ (80009c0 ) 8000716: 795b ldrb r3, [r3, #5] 8000718: 2b2f cmp r3, #47 @ 0x2f 800071a: f240 808d bls.w 8000838 800071e: 4ba8 ldr r3, [pc, #672] @ (80009c0 ) 8000720: 795b ldrb r3, [r3, #5] 8000722: 2b39 cmp r3, #57 @ 0x39 8000724: f200 8088 bhi.w 8000838 8000728: 4ba5 ldr r3, [pc, #660] @ (80009c0 ) 800072a: 799b ldrb r3, [r3, #6] 800072c: 2b2f cmp r3, #47 @ 0x2f 800072e: f240 8083 bls.w 8000838 8000732: 4ba3 ldr r3, [pc, #652] @ (80009c0 ) 8000734: 799b ldrb r3, [r3, #6] 8000736: 2b39 cmp r3, #57 @ 0x39 8000738: d87e bhi.n 8000838 800073a: 4ba1 ldr r3, [pc, #644] @ (80009c0 ) 800073c: 79db ldrb r3, [r3, #7] 800073e: 2b2f cmp r3, #47 @ 0x2f 8000740: d97a bls.n 8000838 8000742: 4b9f ldr r3, [pc, #636] @ (80009c0 ) 8000744: 79db ldrb r3, [r3, #7] 8000746: 2b39 cmp r3, #57 @ 0x39 8000748: d876 bhi.n 8000838 dm=rxbuf[3]-='0'; 800074a: 4b9d ldr r3, [pc, #628] @ (80009c0 ) 800074c: 78db ldrb r3, [r3, #3] 800074e: 3b30 subs r3, #48 @ 0x30 8000750: b2da uxtb r2, r3 8000752: 4b9b ldr r3, [pc, #620] @ (80009c0 ) 8000754: 70da strb r2, [r3, #3] 8000756: 4b9a ldr r3, [pc, #616] @ (80009c0 ) 8000758: 78db ldrb r3, [r3, #3] 800075a: f887 3076 strb.w r3, [r7, #118] @ 0x76 m=rxbuf[4]-='0'; 800075e: 4b98 ldr r3, [pc, #608] @ (80009c0 ) 8000760: 791b ldrb r3, [r3, #4] 8000762: 3b30 subs r3, #48 @ 0x30 8000764: b2da uxtb r2, r3 8000766: 4b96 ldr r3, [pc, #600] @ (80009c0 ) 8000768: 711a strb r2, [r3, #4] 800076a: 4b95 ldr r3, [pc, #596] @ (80009c0 ) 800076c: 791b ldrb r3, [r3, #4] 800076e: f887 3075 strb.w r3, [r7, #117] @ 0x75 c=rxbuf[5]-='0'; 8000772: 4b93 ldr r3, [pc, #588] @ (80009c0 ) 8000774: 795b ldrb r3, [r3, #5] 8000776: 3b30 subs r3, #48 @ 0x30 8000778: b2da uxtb r2, r3 800077a: 4b91 ldr r3, [pc, #580] @ (80009c0 ) 800077c: 715a strb r2, [r3, #5] 800077e: 4b90 ldr r3, [pc, #576] @ (80009c0 ) 8000780: 795b ldrb r3, [r3, #5] 8000782: f887 3074 strb.w r3, [r7, #116] @ 0x74 d=rxbuf[6]-='0'; 8000786: 4b8e ldr r3, [pc, #568] @ (80009c0 ) 8000788: 799b ldrb r3, [r3, #6] 800078a: 3b30 subs r3, #48 @ 0x30 800078c: b2da uxtb r2, r3 800078e: 4b8c ldr r3, [pc, #560] @ (80009c0 ) 8000790: 719a strb r2, [r3, #6] 8000792: 4b8b ldr r3, [pc, #556] @ (80009c0 ) 8000794: 799b ldrb r3, [r3, #6] 8000796: f887 3073 strb.w r3, [r7, #115] @ 0x73 u=rxbuf[7]-='0'; 800079a: 4b89 ldr r3, [pc, #548] @ (80009c0 ) 800079c: 79db ldrb r3, [r3, #7] 800079e: 3b30 subs r3, #48 @ 0x30 80007a0: b2da uxtb r2, r3 80007a2: 4b87 ldr r3, [pc, #540] @ (80009c0 ) 80007a4: 71da strb r2, [r3, #7] 80007a6: 4b86 ldr r3, [pc, #536] @ (80009c0 ) 80007a8: 79db ldrb r3, [r3, #7] 80007aa: f887 3072 strb.w r3, [r7, #114] @ 0x72 val=dm; 80007ae: f897 3076 ldrb.w r3, [r7, #118] @ 0x76 80007b2: b29b uxth r3, r3 80007b4: 817b strh r3, [r7, #10] val*=10; 80007b6: 897b ldrh r3, [r7, #10] 80007b8: 461a mov r2, r3 80007ba: 0092 lsls r2, r2, #2 80007bc: 4413 add r3, r2 80007be: 005b lsls r3, r3, #1 80007c0: b29b uxth r3, r3 80007c2: 817b strh r3, [r7, #10] val+=m; 80007c4: f897 3075 ldrb.w r3, [r7, #117] @ 0x75 80007c8: b29a uxth r2, r3 80007ca: 897b ldrh r3, [r7, #10] 80007cc: 4413 add r3, r2 80007ce: b29b uxth r3, r3 80007d0: 817b strh r3, [r7, #10] val*=10; 80007d2: 897b ldrh r3, [r7, #10] 80007d4: 461a mov r2, r3 80007d6: 0092 lsls r2, r2, #2 80007d8: 4413 add r3, r2 80007da: 005b lsls r3, r3, #1 80007dc: b29b uxth r3, r3 80007de: 817b strh r3, [r7, #10] val+=c; 80007e0: f897 3074 ldrb.w r3, [r7, #116] @ 0x74 80007e4: b29a uxth r2, r3 80007e6: 897b ldrh r3, [r7, #10] 80007e8: 4413 add r3, r2 80007ea: b29b uxth r3, r3 80007ec: 817b strh r3, [r7, #10] val*=10; 80007ee: 897b ldrh r3, [r7, #10] 80007f0: 461a mov r2, r3 80007f2: 0092 lsls r2, r2, #2 80007f4: 4413 add r3, r2 80007f6: 005b lsls r3, r3, #1 80007f8: b29b uxth r3, r3 80007fa: 817b strh r3, [r7, #10] val+=d; 80007fc: f897 3073 ldrb.w r3, [r7, #115] @ 0x73 8000800: b29a uxth r2, r3 8000802: 897b ldrh r3, [r7, #10] 8000804: 4413 add r3, r2 8000806: b29b uxth r3, r3 8000808: 817b strh r3, [r7, #10] val*=10; 800080a: 897b ldrh r3, [r7, #10] 800080c: 461a mov r2, r3 800080e: 0092 lsls r2, r2, #2 8000810: 4413 add r3, r2 8000812: 005b lsls r3, r3, #1 8000814: b29b uxth r3, r3 8000816: 817b strh r3, [r7, #10] val+=u; 8000818: f897 3072 ldrb.w r3, [r7, #114] @ 0x72 800081c: b29a uxth r2, r3 800081e: 897b ldrh r3, [r7, #10] 8000820: 4413 add r3, r2 8000822: b29b uxth r3, r3 8000824: 817b strh r3, [r7, #10] SetMot(mot,dir,val); 8000826: 897a ldrh r2, [r7, #10] 8000828: f897 107f ldrb.w r1, [r7, #127] @ 0x7f 800082c: f897 3077 ldrb.w r3, [r7, #119] @ 0x77 8000830: 4618 mov r0, r3 8000832: f001 fb01 bl 8001e38 if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 8000836: e032 b.n 800089e }else{ sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore 8000838: f107 030c add.w r3, r7, #12 800083c: 4961 ldr r1, [pc, #388] @ (80009c4 ) 800083e: 4618 mov r0, r3 8000840: f00a ff1e bl 800b680 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 8000844: bf00 nop 8000846: f107 030c add.w r3, r7, #12 800084a: 2113 movs r1, #19 800084c: 4618 mov r0, r3 800084e: f00a fb39 bl 800aec4 8000852: 4603 mov r3, r0 8000854: 2b01 cmp r3, #1 8000856: d0f6 beq.n 8000846 if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){ 8000858: e021 b.n 800089e } }else{ sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore 800085a: f107 030c add.w r3, r7, #12 800085e: 495a ldr r1, [pc, #360] @ (80009c8 ) 8000860: 4618 mov r0, r3 8000862: f00a ff0d bl 800b680 while (CDC_Transmit_FS(s, 19) == USBD_BUSY); 8000866: bf00 nop 8000868: f107 030c add.w r3, r7, #12 800086c: 2113 movs r1, #19 800086e: 4618 mov r0, r3 8000870: f00a fb28 bl 800aec4 8000874: 4603 mov r3, r0 8000876: 2b01 cmp r3, #1 8000878: d0f6 beq.n 8000868 } }else{ sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore while (CDC_Transmit_FS(s, 10) == USBD_BUSY); } break; 800087a: e275 b.n 8000d68 sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore 800087c: f107 030c add.w r3, r7, #12 8000880: 4952 ldr r1, [pc, #328] @ (80009cc ) 8000882: 4618 mov r0, r3 8000884: f00a fefc bl 800b680 while (CDC_Transmit_FS(s, 10) == USBD_BUSY); 8000888: bf00 nop 800088a: f107 030c add.w r3, r7, #12 800088e: 210a movs r1, #10 8000890: 4618 mov r0, r3 8000892: f00a fb17 bl 800aec4 8000896: 4603 mov r3, r0 8000898: 2b01 cmp r3, #1 800089a: d0f6 beq.n 800088a break; 800089c: e264 b.n 8000d68 800089e: e263 b.n 8000d68 case 'e': if(rxidx>1){ 80008a0: 4b4b ldr r3, [pc, #300] @ (80009d0 ) 80008a2: 781b ldrb r3, [r3, #0] 80008a4: 2b01 cmp r3, #1 80008a6: f240 8235 bls.w 8000d14 if(rxbuf[1]=='r'){ 80008aa: 4b45 ldr r3, [pc, #276] @ (80009c0 ) 80008ac: 785b ldrb r3, [r3, #1] 80008ae: 2b72 cmp r3, #114 @ 0x72 80008b0: f040 8098 bne.w 80009e4 if(rxidx==4){ 80008b4: 4b46 ldr r3, [pc, #280] @ (80009d0 ) 80008b6: 781b ldrb r3, [r3, #0] 80008b8: 2b04 cmp r3, #4 80008ba: d169 bne.n 8000990 if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 80008bc: 4b40 ldr r3, [pc, #256] @ (80009c0 ) 80008be: 789a ldrb r2, [r3, #2] 80008c0: 4b3f ldr r3, [pc, #252] @ (80009c0 ) 80008c2: 78d9 ldrb r1, [r3, #3] 80008c4: f107 0308 add.w r3, r7, #8 80008c8: 9300 str r3, [sp, #0] 80008ca: 460b mov r3, r1 80008cc: 2130 movs r1, #48 @ 0x30 80008ce: 2030 movs r0, #48 @ 0x30 80008d0: f7ff fcf9 bl 80002c6 80008d4: 4603 mov r3, r0 80008d6: 2b00 cmp r3, #0 80008d8: d042 beq.n 8000960 st=EEW_Read(eeadd, &val); 80008da: 893b ldrh r3, [r7, #8] 80008dc: b2db uxtb r3, r3 80008de: f107 020a add.w r2, r7, #10 80008e2: 4611 mov r1, r2 80008e4: 4618 mov r0, r3 80008e6: f7ff fcc5 bl 8000274 80008ea: 4603 mov r3, r0 80008ec: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK){ 80008f0: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 80008f4: 2b00 cmp r3, #0 80008f6: d119 bne.n 800092c sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val); 80008f8: 893b ldrh r3, [r7, #8] 80008fa: 461a mov r2, r3 80008fc: 897b ldrh r3, [r7, #10] 80008fe: f107 000c add.w r0, r7, #12 8000902: 4934 ldr r1, [pc, #208] @ (80009d4 ) 8000904: f00a febc bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000908: bf00 nop 800090a: f107 030c add.w r3, r7, #12 800090e: 4618 mov r0, r3 8000910: f7ff fc1c bl 800014c 8000914: 4603 mov r3, r0 8000916: b29a uxth r2, r3 8000918: f107 030c add.w r3, r7, #12 800091c: 4611 mov r1, r2 800091e: 4618 mov r0, r3 8000920: f00a fad0 bl 800aec4 8000924: 4603 mov r3, r0 8000926: 2b01 cmp r3, #1 8000928: d0ef beq.n 800090a } }else{ sprintf((char*)s,"\n?eraa | ewaavvvv"); while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); } break; 800092a: e21c b.n 8000d66 sprintf((char*)s,"\nee read error %d",st); 800092c: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000930: f107 030c add.w r3, r7, #12 8000934: 4928 ldr r1, [pc, #160] @ (80009d8 ) 8000936: 4618 mov r0, r3 8000938: f00a fea2 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 800093c: bf00 nop 800093e: f107 030c add.w r3, r7, #12 8000942: 4618 mov r0, r3 8000944: f7ff fc02 bl 800014c 8000948: 4603 mov r3, r0 800094a: b29a uxth r2, r3 800094c: f107 030c add.w r3, r7, #12 8000950: 4611 mov r1, r2 8000952: 4618 mov r0, r3 8000954: f00a fab6 bl 800aec4 8000958: 4603 mov r3, r0 800095a: 2b01 cmp r3, #1 800095c: d0ef beq.n 800093e break; 800095e: e202 b.n 8000d66 sprintf((char*)s,"\n?eraa hex values"); 8000960: f107 030c add.w r3, r7, #12 8000964: 491d ldr r1, [pc, #116] @ (80009dc ) 8000966: 4618 mov r0, r3 8000968: f00a fe8a bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 800096c: bf00 nop 800096e: f107 030c add.w r3, r7, #12 8000972: 4618 mov r0, r3 8000974: f7ff fbea bl 800014c 8000978: 4603 mov r3, r0 800097a: b29a uxth r2, r3 800097c: f107 030c add.w r3, r7, #12 8000980: 4611 mov r1, r2 8000982: 4618 mov r0, r3 8000984: f00a fa9e bl 800aec4 8000988: 4603 mov r3, r0 800098a: 2b01 cmp r3, #1 800098c: d0ef beq.n 800096e break; 800098e: e1ea b.n 8000d66 sprintf((char*)s,"\n?eraa"); 8000990: f107 030c add.w r3, r7, #12 8000994: 4912 ldr r1, [pc, #72] @ (80009e0 ) 8000996: 4618 mov r0, r3 8000998: f00a fe72 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 800099c: bf00 nop 800099e: f107 030c add.w r3, r7, #12 80009a2: 4618 mov r0, r3 80009a4: f7ff fbd2 bl 800014c 80009a8: 4603 mov r3, r0 80009aa: b29a uxth r2, r3 80009ac: f107 030c add.w r3, r7, #12 80009b0: 4611 mov r1, r2 80009b2: 4618 mov r0, r3 80009b4: f00a fa86 bl 800aec4 80009b8: 4603 mov r3, r0 80009ba: 2b01 cmp r3, #1 80009bc: d0ef beq.n 800099e break; 80009be: e1d2 b.n 8000d66 80009c0: 20000228 .word 0x20000228 80009c4: 0800c0a4 .word 0x0800c0a4 80009c8: 0800c0c4 .word 0x0800c0c4 80009cc: 0800c0d8 .word 0x0800c0d8 80009d0: 20000224 .word 0x20000224 80009d4: 0800c0e4 .word 0x0800c0e4 80009d8: 0800c0f8 .word 0x0800c0f8 80009dc: 0800c10c .word 0x0800c10c 80009e0: 0800c120 .word 0x0800c120 }else if(rxbuf[1]=='w'){ 80009e4: 4bbd ldr r3, [pc, #756] @ (8000cdc ) 80009e6: 785b ldrb r3, [r3, #1] 80009e8: 2b77 cmp r3, #119 @ 0x77 80009ea: d169 bne.n 8000ac0 if(rxidx==8){ 80009ec: 4bbc ldr r3, [pc, #752] @ (8000ce0 ) 80009ee: 781b ldrb r3, [r3, #0] 80009f0: 2b08 cmp r3, #8 80009f2: d14d bne.n 8000a90 if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){ 80009f4: 4bb9 ldr r3, [pc, #740] @ (8000cdc ) 80009f6: 789a ldrb r2, [r3, #2] 80009f8: 4bb8 ldr r3, [pc, #736] @ (8000cdc ) 80009fa: 78d9 ldrb r1, [r3, #3] 80009fc: f107 0308 add.w r3, r7, #8 8000a00: 9300 str r3, [sp, #0] 8000a02: 460b mov r3, r1 8000a04: 2130 movs r1, #48 @ 0x30 8000a06: 2030 movs r0, #48 @ 0x30 8000a08: f7ff fc5d bl 80002c6 8000a0c: 4603 mov r3, r0 8000a0e: 2b00 cmp r3, #0 8000a10: d037 beq.n 8000a82 if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){ 8000a12: 4bb2 ldr r3, [pc, #712] @ (8000cdc ) 8000a14: 7918 ldrb r0, [r3, #4] 8000a16: 4bb1 ldr r3, [pc, #708] @ (8000cdc ) 8000a18: 7959 ldrb r1, [r3, #5] 8000a1a: 4bb0 ldr r3, [pc, #704] @ (8000cdc ) 8000a1c: 799a ldrb r2, [r3, #6] 8000a1e: 4baf ldr r3, [pc, #700] @ (8000cdc ) 8000a20: 79dc ldrb r4, [r3, #7] 8000a22: f107 030a add.w r3, r7, #10 8000a26: 9300 str r3, [sp, #0] 8000a28: 4623 mov r3, r4 8000a2a: f7ff fc4c bl 80002c6 8000a2e: 4603 mov r3, r0 8000a30: 2b00 cmp r3, #0 8000a32: d01f beq.n 8000a74 st=EEW_Write(eeadd, val); 8000a34: 893b ldrh r3, [r7, #8] 8000a36: b2db uxtb r3, r3 8000a38: 897a ldrh r2, [r7, #10] 8000a3a: 4611 mov r1, r2 8000a3c: 4618 mov r0, r3 8000a3e: f7ff fc2c bl 800029a 8000a42: 4603 mov r3, r0 8000a44: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val); 8000a48: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000a4c: 2b00 cmp r3, #0 8000a4e: d108 bne.n 8000a62 8000a50: 893b ldrh r3, [r7, #8] 8000a52: 461a mov r2, r3 8000a54: 897b ldrh r3, [r7, #10] 8000a56: f107 000c add.w r0, r7, #12 8000a5a: 49a2 ldr r1, [pc, #648] @ (8000ce4 ) 8000a5c: f00a fe10 bl 800b680 8000a60: e01c b.n 8000a9c else sprintf((char*)s,"\nee write error %d", st); 8000a62: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000a66: f107 030c add.w r3, r7, #12 8000a6a: 499f ldr r1, [pc, #636] @ (8000ce8 ) 8000a6c: 4618 mov r0, r3 8000a6e: f00a fe07 bl 800b680 8000a72: e013 b.n 8000a9c }else sprintf((char*)s,"\n?ewaavvvv hex values"); 8000a74: f107 030c add.w r3, r7, #12 8000a78: 499c ldr r1, [pc, #624] @ (8000cec ) 8000a7a: 4618 mov r0, r3 8000a7c: f00a fe00 bl 800b680 8000a80: e00c b.n 8000a9c }else sprintf((char*)s,"\n?ewaa hex values"); 8000a82: f107 030c add.w r3, r7, #12 8000a86: 499a ldr r1, [pc, #616] @ (8000cf0 ) 8000a88: 4618 mov r0, r3 8000a8a: f00a fdf9 bl 800b680 8000a8e: e005 b.n 8000a9c }else sprintf((char*)s,"\n?ewaavvvv"); 8000a90: f107 030c add.w r3, r7, #12 8000a94: 4997 ldr r1, [pc, #604] @ (8000cf4 ) 8000a96: 4618 mov r0, r3 8000a98: f00a fdf2 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000a9c: bf00 nop 8000a9e: f107 030c add.w r3, r7, #12 8000aa2: 4618 mov r0, r3 8000aa4: f7ff fb52 bl 800014c 8000aa8: 4603 mov r3, r0 8000aaa: b29a uxth r2, r3 8000aac: f107 030c add.w r3, r7, #12 8000ab0: 4611 mov r1, r2 8000ab2: 4618 mov r0, r3 8000ab4: f00a fa06 bl 800aec4 8000ab8: 4603 mov r3, r0 8000aba: 2b01 cmp r3, #1 8000abc: d0ef beq.n 8000a9e break; 8000abe: e152 b.n 8000d66 }else if(rxbuf[1]=='d'){ 8000ac0: 4b86 ldr r3, [pc, #536] @ (8000cdc ) 8000ac2: 785b ldrb r3, [r3, #1] 8000ac4: 2b64 cmp r3, #100 @ 0x64 8000ac6: f040 808b bne.w 8000be0 if(rxidx==2){ 8000aca: 4b85 ldr r3, [pc, #532] @ (8000ce0 ) 8000acc: 781b ldrb r3, [r3, #0] 8000ace: 2b02 cmp r3, #2 8000ad0: d16e bne.n 8000bb0 for(i=0;i<32;i++){ 8000ad2: 2300 movs r3, #0 8000ad4: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000ad8: e046 b.n 8000b68 st=EEW_Read(i, &val); 8000ada: f107 020a add.w r2, r7, #10 8000ade: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000ae2: 4611 mov r1, r2 8000ae4: 4618 mov r0, r3 8000ae6: f7ff fbc5 bl 8000274 8000aea: 4603 mov r3, r0 8000aec: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK){ 8000af0: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000af4: 2b00 cmp r3, #0 8000af6: d119 bne.n 8000b2c sprintf((char*)s,"0x%02x=0x%04x ",i,val); 8000af8: f897 207e ldrb.w r2, [r7, #126] @ 0x7e 8000afc: 897b ldrh r3, [r7, #10] 8000afe: f107 000c add.w r0, r7, #12 8000b02: 497d ldr r1, [pc, #500] @ (8000cf8 ) 8000b04: f00a fdbc bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b08: bf00 nop 8000b0a: f107 030c add.w r3, r7, #12 8000b0e: 4618 mov r0, r3 8000b10: f7ff fb1c bl 800014c 8000b14: 4603 mov r3, r0 8000b16: b29a uxth r2, r3 8000b18: f107 030c add.w r3, r7, #12 8000b1c: 4611 mov r1, r2 8000b1e: 4618 mov r0, r3 8000b20: f00a f9d0 bl 800aec4 8000b24: 4603 mov r3, r0 8000b26: 2b01 cmp r3, #1 8000b28: d0ef beq.n 8000b0a 8000b2a: e018 b.n 8000b5e sprintf((char*)s,"rderr %d ",st); 8000b2c: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000b30: f107 030c add.w r3, r7, #12 8000b34: 4971 ldr r1, [pc, #452] @ (8000cfc ) 8000b36: 4618 mov r0, r3 8000b38: f00a fda2 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b3c: bf00 nop 8000b3e: f107 030c add.w r3, r7, #12 8000b42: 4618 mov r0, r3 8000b44: f7ff fb02 bl 800014c 8000b48: 4603 mov r3, r0 8000b4a: b29a uxth r2, r3 8000b4c: f107 030c add.w r3, r7, #12 8000b50: 4611 mov r1, r2 8000b52: 4618 mov r0, r3 8000b54: f00a f9b6 bl 800aec4 8000b58: 4603 mov r3, r0 8000b5a: 2b01 cmp r3, #1 8000b5c: d0ef beq.n 8000b3e for(i=0;i<32;i++){ 8000b5e: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b62: 3301 adds r3, #1 8000b64: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000b68: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b6c: 2b1f cmp r3, #31 8000b6e: d9b4 bls.n 8000ada if((i%4)==0){ 8000b70: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000b74: f003 0303 and.w r3, r3, #3 8000b78: b2db uxtb r3, r3 8000b7a: 2b00 cmp r3, #0 8000b7c: f040 80f3 bne.w 8000d66 sprintf((char*)s,"\n"); 8000b80: f107 030c add.w r3, r7, #12 8000b84: 495e ldr r1, [pc, #376] @ (8000d00 ) 8000b86: 4618 mov r0, r3 8000b88: f00a fd7a bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000b8c: bf00 nop 8000b8e: f107 030c add.w r3, r7, #12 8000b92: 4618 mov r0, r3 8000b94: f7ff fada bl 800014c 8000b98: 4603 mov r3, r0 8000b9a: b29a uxth r2, r3 8000b9c: f107 030c add.w r3, r7, #12 8000ba0: 4611 mov r1, r2 8000ba2: 4618 mov r0, r3 8000ba4: f00a f98e bl 800aec4 8000ba8: 4603 mov r3, r0 8000baa: 2b01 cmp r3, #1 8000bac: d0ef beq.n 8000b8e break; 8000bae: e0da b.n 8000d66 sprintf((char*)s,"\n?ed"); 8000bb0: f107 030c add.w r3, r7, #12 8000bb4: 4953 ldr r1, [pc, #332] @ (8000d04 ) 8000bb6: 4618 mov r0, r3 8000bb8: f00a fd62 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000bbc: bf00 nop 8000bbe: f107 030c add.w r3, r7, #12 8000bc2: 4618 mov r0, r3 8000bc4: f7ff fac2 bl 800014c 8000bc8: 4603 mov r3, r0 8000bca: b29a uxth r2, r3 8000bcc: f107 030c add.w r3, r7, #12 8000bd0: 4611 mov r1, r2 8000bd2: 4618 mov r0, r3 8000bd4: f00a f976 bl 800aec4 8000bd8: 4603 mov r3, r0 8000bda: 2b01 cmp r3, #1 8000bdc: d0ef beq.n 8000bbe break; 8000bde: e0c2 b.n 8000d66 }else if(rxbuf[1]=='x'){ 8000be0: 4b3e ldr r3, [pc, #248] @ (8000cdc ) 8000be2: 785b ldrb r3, [r3, #1] 8000be4: 2b78 cmp r3, #120 @ 0x78 8000be6: d160 bne.n 8000caa if(rxidx==2){ 8000be8: 4b3d ldr r3, [pc, #244] @ (8000ce0 ) 8000bea: 781b ldrb r3, [r3, #0] 8000bec: 2b02 cmp r3, #2 8000bee: d144 bne.n 8000c7a for(i=0;i<32;i++){ 8000bf0: 2300 movs r3, #0 8000bf2: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000bf6: e03b b.n 8000c70 st=EEW_Write(i,deftab[i]); 8000bf8: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000bfc: 4a42 ldr r2, [pc, #264] @ (8000d08 ) 8000bfe: 5cd3 ldrb r3, [r2, r3] 8000c00: 461a mov r2, r3 8000c02: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c06: 4611 mov r1, r2 8000c08: 4618 mov r0, r3 8000c0a: f7ff fb46 bl 800029a 8000c0e: 4603 mov r3, r0 8000c10: f8a7 3070 strh.w r3, [r7, #112] @ 0x70 if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",i,deftab[i]); 8000c14: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70 8000c18: 2b00 cmp r3, #0 8000c1a: d10b bne.n 8000c34 8000c1c: f897 207e ldrb.w r2, [r7, #126] @ 0x7e 8000c20: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c24: 4938 ldr r1, [pc, #224] @ (8000d08 ) 8000c26: 5ccb ldrb r3, [r1, r3] 8000c28: f107 000c add.w r0, r7, #12 8000c2c: 492d ldr r1, [pc, #180] @ (8000ce4 ) 8000c2e: f00a fd27 bl 800b680 8000c32: e007 b.n 8000c44 else sprintf((char*)s,"\nee write error %d", st); 8000c34: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70 8000c38: f107 030c add.w r3, r7, #12 8000c3c: 492a ldr r1, [pc, #168] @ (8000ce8 ) 8000c3e: 4618 mov r0, r3 8000c40: f00a fd1e bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000c44: bf00 nop 8000c46: f107 030c add.w r3, r7, #12 8000c4a: 4618 mov r0, r3 8000c4c: f7ff fa7e bl 800014c 8000c50: 4603 mov r3, r0 8000c52: b29a uxth r2, r3 8000c54: f107 030c add.w r3, r7, #12 8000c58: 4611 mov r1, r2 8000c5a: 4618 mov r0, r3 8000c5c: f00a f932 bl 800aec4 8000c60: 4603 mov r3, r0 8000c62: 2b01 cmp r3, #1 8000c64: d0ef beq.n 8000c46 for(i=0;i<32;i++){ 8000c66: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c6a: 3301 adds r3, #1 8000c6c: f887 307e strb.w r3, [r7, #126] @ 0x7e 8000c70: f897 307e ldrb.w r3, [r7, #126] @ 0x7e 8000c74: 2b1f cmp r3, #31 8000c76: d9bf bls.n 8000bf8 break; 8000c78: e075 b.n 8000d66 sprintf((char*)s,"\n?ex"); 8000c7a: f107 030c add.w r3, r7, #12 8000c7e: 4923 ldr r1, [pc, #140] @ (8000d0c ) 8000c80: 4618 mov r0, r3 8000c82: f00a fcfd bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000c86: bf00 nop 8000c88: f107 030c add.w r3, r7, #12 8000c8c: 4618 mov r0, r3 8000c8e: f7ff fa5d bl 800014c 8000c92: 4603 mov r3, r0 8000c94: b29a uxth r2, r3 8000c96: f107 030c add.w r3, r7, #12 8000c9a: 4611 mov r1, r2 8000c9c: 4618 mov r0, r3 8000c9e: f00a f911 bl 800aec4 8000ca2: 4603 mov r3, r0 8000ca4: 2b01 cmp r3, #1 8000ca6: d0ef beq.n 8000c88 break; 8000ca8: e05d b.n 8000d66 sprintf((char*)s,"\n?er|w|d|x"); 8000caa: f107 030c add.w r3, r7, #12 8000cae: 4918 ldr r1, [pc, #96] @ (8000d10 ) 8000cb0: 4618 mov r0, r3 8000cb2: f00a fce5 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000cb6: bf00 nop 8000cb8: f107 030c add.w r3, r7, #12 8000cbc: 4618 mov r0, r3 8000cbe: f7ff fa45 bl 800014c 8000cc2: 4603 mov r3, r0 8000cc4: b29a uxth r2, r3 8000cc6: f107 030c add.w r3, r7, #12 8000cca: 4611 mov r1, r2 8000ccc: 4618 mov r0, r3 8000cce: f00a f8f9 bl 800aec4 8000cd2: 4603 mov r3, r0 8000cd4: 2b01 cmp r3, #1 8000cd6: d0ef beq.n 8000cb8 break; 8000cd8: e045 b.n 8000d66 8000cda: bf00 nop 8000cdc: 20000228 .word 0x20000228 8000ce0: 20000224 .word 0x20000224 8000ce4: 0800c128 .word 0x0800c128 8000ce8: 0800c13c .word 0x0800c13c 8000cec: 0800c150 .word 0x0800c150 8000cf0: 0800c168 .word 0x0800c168 8000cf4: 0800c17c .word 0x0800c17c 8000cf8: 0800c188 .word 0x0800c188 8000cfc: 0800c198 .word 0x0800c198 8000d00: 0800c1a4 .word 0x0800c1a4 8000d04: 0800c1a8 .word 0x0800c1a8 8000d08: 0800c224 .word 0x0800c224 8000d0c: 0800c1b0 .word 0x0800c1b0 8000d10: 0800c1b8 .word 0x0800c1b8 sprintf((char*)s,"\n?eraa | ewaavvvv"); 8000d14: f107 030c add.w r3, r7, #12 8000d18: 491b ldr r1, [pc, #108] @ (8000d88 ) 8000d1a: 4618 mov r0, r3 8000d1c: f00a fcb0 bl 800b680 while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY); 8000d20: bf00 nop 8000d22: f107 030c add.w r3, r7, #12 8000d26: 4618 mov r0, r3 8000d28: f7ff fa10 bl 800014c 8000d2c: 4603 mov r3, r0 8000d2e: b29a uxth r2, r3 8000d30: f107 030c add.w r3, r7, #12 8000d34: 4611 mov r1, r2 8000d36: 4618 mov r0, r3 8000d38: f00a f8c4 bl 800aec4 8000d3c: 4603 mov r3, r0 8000d3e: 2b01 cmp r3, #1 8000d40: d0ef beq.n 8000d22 break; 8000d42: e010 b.n 8000d66 default: sprintf((char*)s,"\n?"); 8000d44: f107 030c add.w r3, r7, #12 8000d48: 4910 ldr r1, [pc, #64] @ (8000d8c ) 8000d4a: 4618 mov r0, r3 8000d4c: f00a fc98 bl 800b680 while (CDC_Transmit_FS(s, 2) == USBD_BUSY); 8000d50: bf00 nop 8000d52: f107 030c add.w r3, r7, #12 8000d56: 2102 movs r1, #2 8000d58: 4618 mov r0, r3 8000d5a: f00a f8b3 bl 800aec4 8000d5e: 4603 mov r3, r0 8000d60: 2b01 cmp r3, #1 8000d62: d0f6 beq.n 8000d52 break; 8000d64: e000 b.n 8000d68 break; 8000d66: bf00 nop } } rxidx=0; 8000d68: 4b09 ldr r3, [pc, #36] @ (8000d90 ) 8000d6a: 2200 movs r2, #0 8000d6c: 701a strb r2, [r3, #0] 8000d6e: e007 b.n 8000d80 }else rxidx++; 8000d70: 4b07 ldr r3, [pc, #28] @ (8000d90 ) 8000d72: 781b ldrb r3, [r3, #0] 8000d74: 3301 adds r3, #1 8000d76: b2da uxtb r2, r3 8000d78: 4b05 ldr r3, [pc, #20] @ (8000d90 ) 8000d7a: 701a strb r2, [r3, #0] 8000d7c: e000 b.n 8000d80 if (rx < 0) return; 8000d7e: bf00 nop // tiny spin or yield } } 8000d80: 3784 adds r7, #132 @ 0x84 8000d82: 46bd mov sp, r7 8000d84: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8000d88: 0800c1c4 .word 0x0800c1c4 8000d8c: 0800c1d8 .word 0x0800c1d8 8000d90: 20000224 .word 0x20000224 08000d94 : /* ========================================================================= */ /* --- Internal helpers ---------------------------------------------------- */ static uint16_t EE_GetPageStatus(uint32_t pageBase) { 8000d94: b480 push {r7} 8000d96: b083 sub sp, #12 8000d98: af00 add r7, sp, #0 8000d9a: 6078 str r0, [r7, #4] return *(__IO uint16_t *)pageBase; 8000d9c: 687b ldr r3, [r7, #4] 8000d9e: 881b ldrh r3, [r3, #0] 8000da0: b29b uxth r3, r3 } 8000da2: 4618 mov r0, r3 8000da4: 370c adds r7, #12 8000da6: 46bd mov sp, r7 8000da8: bc80 pop {r7} 8000daa: 4770 bx lr 08000dac : static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data) { 8000dac: b5b0 push {r4, r5, r7, lr} 8000dae: b084 sub sp, #16 8000db0: af00 add r7, sp, #0 8000db2: 6078 str r0, [r7, #4] 8000db4: 460b mov r3, r1 8000db6: 807b strh r3, [r7, #2] HAL_StatusTypeDef status; HAL_FLASH_Unlock(); 8000db8: f002 fb76 bl 80034a8 status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data); 8000dbc: 887b ldrh r3, [r7, #2] 8000dbe: 2200 movs r2, #0 8000dc0: 461c mov r4, r3 8000dc2: 4615 mov r5, r2 8000dc4: 4622 mov r2, r4 8000dc6: 462b mov r3, r5 8000dc8: 6879 ldr r1, [r7, #4] 8000dca: 2001 movs r0, #1 8000dcc: f002 fafc bl 80033c8 8000dd0: 4603 mov r3, r0 8000dd2: 73fb strb r3, [r7, #15] HAL_FLASH_Lock(); 8000dd4: f002 fb8e bl 80034f4 return status; 8000dd8: 7bfb ldrb r3, [r7, #15] } 8000dda: 4618 mov r0, r3 8000ddc: 3710 adds r7, #16 8000dde: 46bd mov sp, r7 8000de0: bdb0 pop {r4, r5, r7, pc} 08000de2 : static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress) { 8000de2: b580 push {r7, lr} 8000de4: b088 sub sp, #32 8000de6: af00 add r7, sp, #0 8000de8: 6078 str r0, [r7, #4] HAL_StatusTypeDef status; FLASH_EraseInitTypeDef EraseInit; uint32_t PageError = 0; 8000dea: 2300 movs r3, #0 8000dec: 60bb str r3, [r7, #8] HAL_FLASH_Unlock(); 8000dee: f002 fb5b bl 80034a8 EraseInit.TypeErase = FLASH_TYPEERASE_PAGES; 8000df2: 2300 movs r3, #0 8000df4: 60fb str r3, [r7, #12] EraseInit.PageAddress = PageAddress; 8000df6: 687b ldr r3, [r7, #4] 8000df8: 617b str r3, [r7, #20] EraseInit.NbPages = 1; 8000dfa: 2301 movs r3, #1 8000dfc: 61bb str r3, [r7, #24] status = HAL_FLASHEx_Erase(&EraseInit, &PageError); 8000dfe: f107 0208 add.w r2, r7, #8 8000e02: f107 030c add.w r3, r7, #12 8000e06: 4611 mov r1, r2 8000e08: 4618 mov r0, r3 8000e0a: f002 fc35 bl 8003678 8000e0e: 4603 mov r3, r0 8000e10: 77fb strb r3, [r7, #31] HAL_FLASH_Lock(); 8000e12: f002 fb6f bl 80034f4 return status; 8000e16: 7ffb ldrb r3, [r7, #31] } 8000e18: 4618 mov r0, r3 8000e1a: 3720 adds r7, #32 8000e1c: 46bd mov sp, r7 8000e1e: bd80 pop {r7, pc} 08000e20 : /* Find first free record address in given page (returns 0 if full) */ static uint32_t EE_FindFreeAddress(uint32_t pageBase) { 8000e20: b480 push {r7} 8000e22: b087 sub sp, #28 8000e24: af00 add r7, sp, #0 8000e26: 6078 str r0, [r7, #4] uint32_t addr = pageBase + 2U; /* Skip status word */ 8000e28: 687b ldr r3, [r7, #4] 8000e2a: 3302 adds r3, #2 8000e2c: 617b str r3, [r7, #20] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8000e2e: 687b ldr r3, [r7, #4] 8000e30: f503 6380 add.w r3, r3, #1024 @ 0x400 8000e34: 613b str r3, [r7, #16] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 8000e36: e00c b.n 8000e52 { uint16_t vaddr = *(__IO uint16_t *)addr; 8000e38: 697b ldr r3, [r7, #20] 8000e3a: 881b ldrh r3, [r3, #0] 8000e3c: 81fb strh r3, [r7, #14] if (vaddr == 0xFFFFU) 8000e3e: 89fb ldrh r3, [r7, #14] 8000e40: f64f 72ff movw r2, #65535 @ 0xffff 8000e44: 4293 cmp r3, r2 8000e46: d101 bne.n 8000e4c { /* Empty slot */ return addr; 8000e48: 697b ldr r3, [r7, #20] 8000e4a: e008 b.n 8000e5e } addr += sizeof(EE_Record_t); 8000e4c: 697b ldr r3, [r7, #20] 8000e4e: 3304 adds r3, #4 8000e50: 617b str r3, [r7, #20] while (addr < (pageEnd - sizeof(EE_Record_t) + 1U)) 8000e52: 693b ldr r3, [r7, #16] 8000e54: 3b03 subs r3, #3 8000e56: 697a ldr r2, [r7, #20] 8000e58: 429a cmp r2, r3 8000e5a: d3ed bcc.n 8000e38 } return 0U; /* No space */ 8000e5c: 2300 movs r3, #0 } 8000e5e: 4618 mov r0, r3 8000e60: 371c adds r7, #28 8000e62: 46bd mov sp, r7 8000e64: bc80 pop {r7} 8000e66: 4770 bx lr 08000e68 : /* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */ /* Find latest value of VirtAddress in a specific page (scan forward) */ static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data) { 8000e68: b480 push {r7} 8000e6a: b089 sub sp, #36 @ 0x24 8000e6c: af00 add r7, sp, #0 8000e6e: 60f8 str r0, [r7, #12] 8000e70: 460b mov r3, r1 8000e72: 607a str r2, [r7, #4] 8000e74: 817b strh r3, [r7, #10] uint32_t addr = pageBase + 2U; // skip status halfword 8000e76: 68fb ldr r3, [r7, #12] 8000e78: 3302 adds r3, #2 8000e7a: 61fb str r3, [r7, #28] uint32_t pageEnd = pageBase + EE_PAGE_SIZE; 8000e7c: 68fb ldr r3, [r7, #12] 8000e7e: f503 6380 add.w r3, r3, #1024 @ 0x400 8000e82: 617b str r3, [r7, #20] EE_Status result = EE_NOT_FOUND; 8000e84: 2302 movs r3, #2 8000e86: 76fb strb r3, [r7, #27] uint16_t lastVal = 0; 8000e88: 2300 movs r3, #0 8000e8a: 833b strh r3, [r7, #24] if (Data == NULL) 8000e8c: 687b ldr r3, [r7, #4] 8000e8e: 2b00 cmp r3, #0 8000e90: d118 bne.n 8000ec4 return EE_ERROR; 8000e92: 2301 movs r3, #1 8000e94: e024 b.n 8000ee0 while (addr <= (pageEnd - sizeof(EE_Record_t))) { uint16_t vaddr = *(__IO uint16_t *)addr; 8000e96: 69fb ldr r3, [r7, #28] 8000e98: 881b ldrh r3, [r3, #0] 8000e9a: 827b strh r3, [r7, #18] if (vaddr == 0xFFFFU) 8000e9c: 8a7b ldrh r3, [r7, #18] 8000e9e: f64f 72ff movw r2, #65535 @ 0xffff 8000ea2: 4293 cmp r3, r2 8000ea4: d014 beq.n 8000ed0 { // First empty slot => no more records in this page break; } uint16_t value = *(__IO uint16_t *)(addr + 2U); 8000ea6: 69fb ldr r3, [r7, #28] 8000ea8: 3302 adds r3, #2 8000eaa: 881b ldrh r3, [r3, #0] 8000eac: 823b strh r3, [r7, #16] if (vaddr == VirtAddress) 8000eae: 8a7a ldrh r2, [r7, #18] 8000eb0: 897b ldrh r3, [r7, #10] 8000eb2: 429a cmp r2, r3 8000eb4: d103 bne.n 8000ebe { lastVal = value; // keep most recent 8000eb6: 8a3b ldrh r3, [r7, #16] 8000eb8: 833b strh r3, [r7, #24] result = EE_OK; 8000eba: 2300 movs r3, #0 8000ebc: 76fb strb r3, [r7, #27] } addr += sizeof(EE_Record_t); // move 4 bytes forward 8000ebe: 69fb ldr r3, [r7, #28] 8000ec0: 3304 adds r3, #4 8000ec2: 61fb str r3, [r7, #28] while (addr <= (pageEnd - sizeof(EE_Record_t))) 8000ec4: 697b ldr r3, [r7, #20] 8000ec6: 3b04 subs r3, #4 8000ec8: 69fa ldr r2, [r7, #28] 8000eca: 429a cmp r2, r3 8000ecc: d9e3 bls.n 8000e96 8000ece: e000 b.n 8000ed2 break; 8000ed0: bf00 nop } if (result == EE_OK) 8000ed2: 7efb ldrb r3, [r7, #27] 8000ed4: 2b00 cmp r3, #0 8000ed6: d102 bne.n 8000ede *Data = lastVal; 8000ed8: 687b ldr r3, [r7, #4] 8000eda: 8b3a ldrh r2, [r7, #24] 8000edc: 801a strh r2, [r3, #0] return result; 8000ede: 7efb ldrb r3, [r7, #27] } 8000ee0: 4618 mov r0, r3 8000ee2: 3724 adds r7, #36 @ 0x24 8000ee4: 46bd mov sp, r7 8000ee6: bc80 pop {r7} 8000ee8: 4770 bx lr ... 08000eec : /* Format both pages: erase and set PAGE0 as VALID */ static EE_Status EE_Format(void) { 8000eec: b580 push {r7, lr} 8000eee: af00 add r7, sp, #0 if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK) 8000ef0: 480f ldr r0, [pc, #60] @ (8000f30 ) 8000ef2: f7ff ff76 bl 8000de2 8000ef6: 4603 mov r3, r0 8000ef8: 2b00 cmp r3, #0 8000efa: d001 beq.n 8000f00 return EE_STATUS_ERROR; 8000efc: 2301 movs r3, #1 8000efe: e015 b.n 8000f2c if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK) 8000f00: 480c ldr r0, [pc, #48] @ (8000f34 ) 8000f02: f7ff ff6e bl 8000de2 8000f06: 4603 mov r3, r0 8000f08: 2b00 cmp r3, #0 8000f0a: d001 beq.n 8000f10 return EE_STATUS_ERROR; 8000f0c: 2301 movs r3, #1 8000f0e: e00d b.n 8000f2c if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK) 8000f10: f64a 21aa movw r1, #43690 @ 0xaaaa 8000f14: 4806 ldr r0, [pc, #24] @ (8000f30 ) 8000f16: f7ff ff49 bl 8000dac 8000f1a: 4603 mov r3, r0 8000f1c: 2b00 cmp r3, #0 8000f1e: d001 beq.n 8000f24 return EE_STATUS_ERROR; 8000f20: 2301 movs r3, #1 8000f22: e003 b.n 8000f2c /* PAGE1 will remain erased (status = 0xFFFF) */ EE_ActivePageBase = EE_PAGE0_BASE; 8000f24: 4b04 ldr r3, [pc, #16] @ (8000f38 ) 8000f26: 4a02 ldr r2, [pc, #8] @ (8000f30 ) 8000f28: 601a str r2, [r3, #0] return EE_STATUS_OK; 8000f2a: 2300 movs r3, #0 } 8000f2c: 4618 mov r0, r3 8000f2e: bd80 pop {r7, pc} 8000f30: 0800f800 .word 0x0800f800 8000f34: 0800fc00 .word 0x0800fc00 8000f38: 20000000 .word 0x20000000 08000f3c : /* Get the base of the other page */ static uint32_t EE_GetOtherPageBase(uint32_t pageBase) { 8000f3c: b480 push {r7} 8000f3e: b083 sub sp, #12 8000f40: af00 add r7, sp, #0 8000f42: 6078 str r0, [r7, #4] return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE; 8000f44: 687b ldr r3, [r7, #4] 8000f46: 4a05 ldr r2, [pc, #20] @ (8000f5c ) 8000f48: 4293 cmp r3, r2 8000f4a: d101 bne.n 8000f50 8000f4c: 4b04 ldr r3, [pc, #16] @ (8000f60 ) 8000f4e: e000 b.n 8000f52 8000f50: 4b02 ldr r3, [pc, #8] @ (8000f5c ) } 8000f52: 4618 mov r0, r3 8000f54: 370c adds r7, #12 8000f56: 46bd mov sp, r7 8000f58: bc80 pop {r7} 8000f5a: 4770 bx lr 8000f5c: 0800f800 .word 0x0800f800 8000f60: 0800fc00 .word 0x0800fc00 08000f64 : /* Page transfer (garbage collection + new write) */ static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data) { 8000f64: b580 push {r7, lr} 8000f66: b088 sub sp, #32 8000f68: af00 add r7, sp, #0 8000f6a: 4603 mov r3, r0 8000f6c: 460a mov r2, r1 8000f6e: 80fb strh r3, [r7, #6] 8000f70: 4613 mov r3, r2 8000f72: 80bb strh r3, [r7, #4] uint32_t oldBase = EE_ActivePageBase; 8000f74: 4b3c ldr r3, [pc, #240] @ (8001068 ) 8000f76: 681b ldr r3, [r3, #0] 8000f78: 617b str r3, [r7, #20] uint32_t newBase = EE_GetOtherPageBase(oldBase); 8000f7a: 6978 ldr r0, [r7, #20] 8000f7c: f7ff ffde bl 8000f3c 8000f80: 6138 str r0, [r7, #16] uint32_t addr; uint16_t value; EE_Status st; /* Erase new page */ if (EE_FlashErasePage(newBase) != HAL_OK) 8000f82: 6938 ldr r0, [r7, #16] 8000f84: f7ff ff2d bl 8000de2 8000f88: 4603 mov r3, r0 8000f8a: 2b00 cmp r3, #0 8000f8c: d001 beq.n 8000f92 return EE_STATUS_ERROR; 8000f8e: 2301 movs r3, #1 8000f90: e065 b.n 800105e /* Mark new page as RECEIVE */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK) 8000f92: f245 5155 movw r1, #21845 @ 0x5555 8000f96: 6938 ldr r0, [r7, #16] 8000f98: f7ff ff08 bl 8000dac 8000f9c: 4603 mov r3, r0 8000f9e: 2b00 cmp r3, #0 8000fa0: d001 beq.n 8000fa6 return EE_STATUS_ERROR; 8000fa2: 2301 movs r3, #1 8000fa4: e05b b.n 800105e /* Start writing records just after status */ addr = newBase + 2U; 8000fa6: 693b ldr r3, [r7, #16] 8000fa8: 3302 adds r3, #2 8000faa: 61fb str r3, [r7, #28] /* For each known virtual variable */ for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 8000fac: 2300 movs r3, #0 8000fae: 837b strh r3, [r7, #26] 8000fb0: e03c b.n 800102c { uint16_t vaddr = EE_VirtAddrs[i]; 8000fb2: 8b7b ldrh r3, [r7, #26] 8000fb4: 4a2d ldr r2, [pc, #180] @ (800106c ) 8000fb6: f832 3013 ldrh.w r3, [r2, r3, lsl #1] 8000fba: 81fb strh r3, [r7, #14] if (vaddr == VirtAddress) 8000fbc: 89fa ldrh r2, [r7, #14] 8000fbe: 88fb ldrh r3, [r7, #6] 8000fc0: 429a cmp r2, r3 8000fc2: d102 bne.n 8000fca { /* Use the new data passed into PageTransfer */ value = Data; 8000fc4: 88bb ldrh r3, [r7, #4] 8000fc6: 817b strh r3, [r7, #10] 8000fc8: e00b b.n 8000fe2 } else { /* Read latest value from old active page */ st = EE_FindInPage(oldBase, vaddr, &value); 8000fca: f107 020a add.w r2, r7, #10 8000fce: 89fb ldrh r3, [r7, #14] 8000fd0: 4619 mov r1, r3 8000fd2: 6978 ldr r0, [r7, #20] 8000fd4: f7ff ff48 bl 8000e68 8000fd8: 4603 mov r3, r0 8000fda: 737b strb r3, [r7, #13] if (st != EE_STATUS_OK) 8000fdc: 7b7b ldrb r3, [r7, #13] 8000fde: 2b00 cmp r3, #0 8000fe0: d120 bne.n 8001024 continue; } } /* Write record to new page */ if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK) 8000fe2: 89fb ldrh r3, [r7, #14] 8000fe4: 4619 mov r1, r3 8000fe6: 69f8 ldr r0, [r7, #28] 8000fe8: f7ff fee0 bl 8000dac 8000fec: 4603 mov r3, r0 8000fee: 2b00 cmp r3, #0 8000ff0: d001 beq.n 8000ff6 return EE_STATUS_ERROR; 8000ff2: 2301 movs r3, #1 8000ff4: e033 b.n 800105e if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK) 8000ff6: 69fb ldr r3, [r7, #28] 8000ff8: 3302 adds r3, #2 8000ffa: 897a ldrh r2, [r7, #10] 8000ffc: 4611 mov r1, r2 8000ffe: 4618 mov r0, r3 8001000: f7ff fed4 bl 8000dac 8001004: 4603 mov r3, r0 8001006: 2b00 cmp r3, #0 8001008: d001 beq.n 800100e return EE_STATUS_ERROR; 800100a: 2301 movs r3, #1 800100c: e027 b.n 800105e addr += sizeof(EE_Record_t); 800100e: 69fb ldr r3, [r7, #28] 8001010: 3304 adds r3, #4 8001012: 61fb str r3, [r7, #28] if (addr >= (newBase + EE_PAGE_SIZE)) 8001014: 693b ldr r3, [r7, #16] 8001016: f503 6380 add.w r3, r3, #1024 @ 0x400 800101a: 69fa ldr r2, [r7, #28] 800101c: 429a cmp r2, r3 800101e: d302 bcc.n 8001026 return EE_STATUS_NO_SPACE; 8001020: 2303 movs r3, #3 8001022: e01c b.n 800105e continue; 8001024: bf00 nop for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++) 8001026: 8b7b ldrh r3, [r7, #26] 8001028: 3301 adds r3, #1 800102a: 837b strh r3, [r7, #26] 800102c: 8b7b ldrh r3, [r7, #26] 800102e: 2b1f cmp r3, #31 8001030: d9bf bls.n 8000fb2 } /* Erase old page */ if (EE_FlashErasePage(oldBase) != HAL_OK) 8001032: 6978 ldr r0, [r7, #20] 8001034: f7ff fed5 bl 8000de2 8001038: 4603 mov r3, r0 800103a: 2b00 cmp r3, #0 800103c: d001 beq.n 8001042 return EE_STATUS_ERROR; 800103e: 2301 movs r3, #1 8001040: e00d b.n 800105e /* Mark new page as VALID */ if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK) 8001042: f64a 21aa movw r1, #43690 @ 0xaaaa 8001046: 6938 ldr r0, [r7, #16] 8001048: f7ff feb0 bl 8000dac 800104c: 4603 mov r3, r0 800104e: 2b00 cmp r3, #0 8001050: d001 beq.n 8001056 return EE_STATUS_ERROR; 8001052: 2301 movs r3, #1 8001054: e003 b.n 800105e /* Update active page */ EE_ActivePageBase = newBase; 8001056: 4a04 ldr r2, [pc, #16] @ (8001068 ) 8001058: 693b ldr r3, [r7, #16] 800105a: 6013 str r3, [r2, #0] return EE_STATUS_OK; 800105c: 2300 movs r3, #0 } 800105e: 4618 mov r0, r3 8001060: 3720 adds r7, #32 8001062: 46bd mov sp, r7 8001064: bd80 pop {r7, pc} 8001066: bf00 nop 8001068: 20000000 .word 0x20000000 800106c: 0800c244 .word 0x0800c244 08001070 : * - Checks page statuses and chooses the active page. * - If inconsistent or blank, formats pages. * PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...) */ uint16_t EE_Init(void) { 8001070: b580 push {r7, lr} 8001072: b082 sub sp, #8 8001074: af00 add r7, sp, #0 uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE); 8001076: 481e ldr r0, [pc, #120] @ (80010f0 ) 8001078: f7ff fe8c bl 8000d94 800107c: 4603 mov r3, r0 800107e: 80fb strh r3, [r7, #6] uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE); 8001080: 481c ldr r0, [pc, #112] @ (80010f4 ) 8001082: f7ff fe87 bl 8000d94 8001086: 4603 mov r3, r0 8001088: 80bb strh r3, [r7, #4] if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED)) 800108a: 88fb ldrh r3, [r7, #6] 800108c: f64f 72ff movw r2, #65535 @ 0xffff 8001090: 4293 cmp r3, r2 8001092: d108 bne.n 80010a6 8001094: 88bb ldrh r3, [r7, #4] 8001096: f64f 72ff movw r2, #65535 @ 0xffff 800109a: 4293 cmp r3, r2 800109c: d103 bne.n 80010a6 { /* Fresh device -> format */ return (uint16_t)EE_Format(); 800109e: f7ff ff25 bl 8000eec 80010a2: 4603 mov r3, r0 80010a4: e020 b.n 80010e8 } else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED)) 80010a6: 88fb ldrh r3, [r7, #6] 80010a8: f64a 22aa movw r2, #43690 @ 0xaaaa 80010ac: 4293 cmp r3, r2 80010ae: d109 bne.n 80010c4 80010b0: 88bb ldrh r3, [r7, #4] 80010b2: f64f 72ff movw r2, #65535 @ 0xffff 80010b6: 4293 cmp r3, r2 80010b8: d104 bne.n 80010c4 { EE_ActivePageBase = EE_PAGE0_BASE; 80010ba: 4b0f ldr r3, [pc, #60] @ (80010f8 ) 80010bc: 4a0c ldr r2, [pc, #48] @ (80010f0 ) 80010be: 601a str r2, [r3, #0] return EE_OK; 80010c0: 2300 movs r3, #0 80010c2: e011 b.n 80010e8 } else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED)) 80010c4: 88bb ldrh r3, [r7, #4] 80010c6: f64a 22aa movw r2, #43690 @ 0xaaaa 80010ca: 4293 cmp r3, r2 80010cc: d109 bne.n 80010e2 80010ce: 88fb ldrh r3, [r7, #6] 80010d0: f64f 72ff movw r2, #65535 @ 0xffff 80010d4: 4293 cmp r3, r2 80010d6: d104 bne.n 80010e2 { EE_ActivePageBase = EE_PAGE1_BASE; 80010d8: 4b07 ldr r3, [pc, #28] @ (80010f8 ) 80010da: 4a06 ldr r2, [pc, #24] @ (80010f4 ) 80010dc: 601a str r2, [r3, #0] return EE_OK; 80010de: 2300 movs r3, #0 80010e0: e002 b.n 80010e8 } else { /* Any weird or inconsistent state -> reformat */ return (uint16_t)EE_Format(); 80010e2: f7ff ff03 bl 8000eec 80010e6: 4603 mov r3, r0 } } 80010e8: 4618 mov r0, r3 80010ea: 3708 adds r7, #8 80010ec: 46bd mov sp, r7 80010ee: bd80 pop {r7, pc} 80010f0: 0800f800 .word 0x0800f800 80010f4: 0800fc00 .word 0x0800fc00 80010f8: 20000000 .word 0x20000000 080010fc : /* * Read a 16-bit variable by its virtual address. * PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t) */ uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data) { 80010fc: b580 push {r7, lr} 80010fe: b084 sub sp, #16 8001100: af00 add r7, sp, #0 8001102: 4603 mov r3, r0 8001104: 6039 str r1, [r7, #0] 8001106: 80fb strh r3, [r7, #6] EE_Status st; if (Data == NULL) 8001108: 683b ldr r3, [r7, #0] 800110a: 2b00 cmp r3, #0 800110c: d101 bne.n 8001112 return EE_ERROR; 800110e: 2301 movs r3, #1 8001110: e00a b.n 8001128 st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data); 8001112: 4b07 ldr r3, [pc, #28] @ (8001130 ) 8001114: 681b ldr r3, [r3, #0] 8001116: 88f9 ldrh r1, [r7, #6] 8001118: 683a ldr r2, [r7, #0] 800111a: 4618 mov r0, r3 800111c: f7ff fea4 bl 8000e68 8001120: 4603 mov r3, r0 8001122: 73fb strb r3, [r7, #15] return (uint16_t)st; 8001124: 7bfb ldrb r3, [r7, #15] 8001126: b29b uxth r3, r3 } 8001128: 4618 mov r0, r3 800112a: 3710 adds r7, #16 800112c: 46bd mov sp, r7 800112e: bd80 pop {r7, pc} 8001130: 20000000 .word 0x20000000 08001134 : * - Writes a new record in the active page. * - If the page is full, triggers a page transfer (GC). * PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t) */ uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data) { 8001134: b580 push {r7, lr} 8001136: b084 sub sp, #16 8001138: af00 add r7, sp, #0 800113a: 4603 mov r3, r0 800113c: 460a mov r2, r1 800113e: 80fb strh r3, [r7, #6] 8001140: 4613 mov r3, r2 8001142: 80bb strh r3, [r7, #4] uint32_t freeAddr; EE_Status st; /* Find free space in active page */ freeAddr = EE_FindFreeAddress(EE_ActivePageBase); 8001144: 4b17 ldr r3, [pc, #92] @ (80011a4 ) 8001146: 681b ldr r3, [r3, #0] 8001148: 4618 mov r0, r3 800114a: f7ff fe69 bl 8000e20 800114e: 60f8 str r0, [r7, #12] if (freeAddr != 0U) 8001150: 68fb ldr r3, [r7, #12] 8001152: 2b00 cmp r3, #0 8001154: d017 beq.n 8001186 { /* Write new record */ if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK) 8001156: 88fb ldrh r3, [r7, #6] 8001158: 4619 mov r1, r3 800115a: 68f8 ldr r0, [r7, #12] 800115c: f7ff fe26 bl 8000dac 8001160: 4603 mov r3, r0 8001162: 2b00 cmp r3, #0 8001164: d001 beq.n 800116a return EE_ERROR; 8001166: 2301 movs r3, #1 8001168: e017 b.n 800119a if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK) 800116a: 68fb ldr r3, [r7, #12] 800116c: 3302 adds r3, #2 800116e: 88ba ldrh r2, [r7, #4] 8001170: 4611 mov r1, r2 8001172: 4618 mov r0, r3 8001174: f7ff fe1a bl 8000dac 8001178: 4603 mov r3, r0 800117a: 2b00 cmp r3, #0 800117c: d001 beq.n 8001182 return EE_ERROR; 800117e: 2301 movs r3, #1 8001180: e00b b.n 800119a return EE_OK; 8001182: 2300 movs r3, #0 8001184: e009 b.n 800119a } /* No space -> page transfer */ st = EE_PageTransfer(VirtAddress, Data); 8001186: 88ba ldrh r2, [r7, #4] 8001188: 88fb ldrh r3, [r7, #6] 800118a: 4611 mov r1, r2 800118c: 4618 mov r0, r3 800118e: f7ff fee9 bl 8000f64 8001192: 4603 mov r3, r0 8001194: 72fb strb r3, [r7, #11] return (uint16_t)st; 8001196: 7afb ldrb r3, [r7, #11] 8001198: b29b uxth r3, r3 } 800119a: 4618 mov r0, r3 800119c: 3710 adds r7, #16 800119e: 46bd mov sp, r7 80011a0: bd80 pop {r7, pc} 80011a2: bf00 nop 80011a4: 20000000 .word 0x20000000 080011a8 : /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ void HAL_SYSTICK_Callback(void){ 80011a8: b580 push {r7, lr} 80011aa: af00 add r7, sp, #0 static uint8_t c100ms = 0; static uint8_t c1s = 0; static uint8_t inidx=0; static uint8_t inbuf[4]; if (++c10ms >= 10) { // 10 ms 80011ac: 4b6e ldr r3, [pc, #440] @ (8001368 ) 80011ae: 781b ldrb r3, [r3, #0] 80011b0: 3301 adds r3, #1 80011b2: b2da uxtb r2, r3 80011b4: 4b6c ldr r3, [pc, #432] @ (8001368 ) 80011b6: 701a strb r2, [r3, #0] 80011b8: 4b6b ldr r3, [pc, #428] @ (8001368 ) 80011ba: 781b ldrb r3, [r3, #0] 80011bc: 2b09 cmp r3, #9 80011be: f240 80d0 bls.w 8001362 c10ms = 0; 80011c2: 4b69 ldr r3, [pc, #420] @ (8001368 ) 80011c4: 2200 movs r2, #0 80011c6: 701a strb r2, [r3, #0] if(rtP1)rtP1--; 80011c8: 4b68 ldr r3, [pc, #416] @ (800136c ) 80011ca: 781b ldrb r3, [r3, #0] 80011cc: b2db uxtb r3, r3 80011ce: 2b00 cmp r3, #0 80011d0: d006 beq.n 80011e0 80011d2: 4b66 ldr r3, [pc, #408] @ (800136c ) 80011d4: 781b ldrb r3, [r3, #0] 80011d6: b2db uxtb r3, r3 80011d8: 3b01 subs r3, #1 80011da: b2da uxtb r2, r3 80011dc: 4b63 ldr r3, [pc, #396] @ (800136c ) 80011de: 701a strb r2, [r3, #0] if(rtP2)rtP2--; 80011e0: 4b63 ldr r3, [pc, #396] @ (8001370 ) 80011e2: 781b ldrb r3, [r3, #0] 80011e4: b2db uxtb r3, r3 80011e6: 2b00 cmp r3, #0 80011e8: d006 beq.n 80011f8 80011ea: 4b61 ldr r3, [pc, #388] @ (8001370 ) 80011ec: 781b ldrb r3, [r3, #0] 80011ee: b2db uxtb r3, r3 80011f0: 3b01 subs r3, #1 80011f2: b2da uxtb r2, r3 80011f4: 4b5e ldr r3, [pc, #376] @ (8001370 ) 80011f6: 701a strb r2, [r3, #0] //**** legge i tasti******************************************************************************** inidx++; 80011f8: 4b5e ldr r3, [pc, #376] @ (8001374 ) 80011fa: 781b ldrb r3, [r3, #0] 80011fc: 3301 adds r3, #1 80011fe: b2da uxtb r2, r3 8001200: 4b5c ldr r3, [pc, #368] @ (8001374 ) 8001202: 701a strb r2, [r3, #0] inidx&=0x03; 8001204: 4b5b ldr r3, [pc, #364] @ (8001374 ) 8001206: 781b ldrb r3, [r3, #0] 8001208: f003 0303 and.w r3, r3, #3 800120c: b2da uxtb r2, r3 800120e: 4b59 ldr r3, [pc, #356] @ (8001374 ) 8001210: 701a strb r2, [r3, #0] if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1); 8001212: f44f 4180 mov.w r1, #16384 @ 0x4000 8001216: 4858 ldr r0, [pc, #352] @ (8001378 ) 8001218: f002 fc5a bl 8003ad0 800121c: 4603 mov r3, r0 800121e: 2b00 cmp r3, #0 8001220: d10c bne.n 800123c 8001222: 4b54 ldr r3, [pc, #336] @ (8001374 ) 8001224: 781b ldrb r3, [r3, #0] 8001226: 461a mov r2, r3 8001228: 4b54 ldr r3, [pc, #336] @ (800137c ) 800122a: 5c9b ldrb r3, [r3, r2] 800122c: 4a51 ldr r2, [pc, #324] @ (8001374 ) 800122e: 7812 ldrb r2, [r2, #0] 8001230: f043 0301 orr.w r3, r3, #1 8001234: b2d9 uxtb r1, r3 8001236: 4b51 ldr r3, [pc, #324] @ (800137c ) 8001238: 5499 strb r1, [r3, r2] 800123a: e00b b.n 8001254 800123c: 4b4d ldr r3, [pc, #308] @ (8001374 ) 800123e: 781b ldrb r3, [r3, #0] 8001240: 461a mov r2, r3 8001242: 4b4e ldr r3, [pc, #312] @ (800137c ) 8001244: 5c9b ldrb r3, [r3, r2] 8001246: 4a4b ldr r2, [pc, #300] @ (8001374 ) 8001248: 7812 ldrb r2, [r2, #0] 800124a: f023 0301 bic.w r3, r3, #1 800124e: b2d9 uxtb r1, r3 8001250: 4b4a ldr r3, [pc, #296] @ (800137c ) 8001252: 5499 strb r1, [r3, r2] if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2); 8001254: f44f 4100 mov.w r1, #32768 @ 0x8000 8001258: 4847 ldr r0, [pc, #284] @ (8001378 ) 800125a: f002 fc39 bl 8003ad0 800125e: 4603 mov r3, r0 8001260: 2b00 cmp r3, #0 8001262: d10c bne.n 800127e 8001264: 4b43 ldr r3, [pc, #268] @ (8001374 ) 8001266: 781b ldrb r3, [r3, #0] 8001268: 461a mov r2, r3 800126a: 4b44 ldr r3, [pc, #272] @ (800137c ) 800126c: 5c9b ldrb r3, [r3, r2] 800126e: 4a41 ldr r2, [pc, #260] @ (8001374 ) 8001270: 7812 ldrb r2, [r2, #0] 8001272: f043 0302 orr.w r3, r3, #2 8001276: b2d9 uxtb r1, r3 8001278: 4b40 ldr r3, [pc, #256] @ (800137c ) 800127a: 5499 strb r1, [r3, r2] 800127c: e00b b.n 8001296 800127e: 4b3d ldr r3, [pc, #244] @ (8001374 ) 8001280: 781b ldrb r3, [r3, #0] 8001282: 461a mov r2, r3 8001284: 4b3d ldr r3, [pc, #244] @ (800137c ) 8001286: 5c9b ldrb r3, [r3, r2] 8001288: 4a3a ldr r2, [pc, #232] @ (8001374 ) 800128a: 7812 ldrb r2, [r2, #0] 800128c: f023 0302 bic.w r3, r3, #2 8001290: b2d9 uxtb r1, r3 8001292: 4b3a ldr r3, [pc, #232] @ (800137c ) 8001294: 5499 strb r1, [r3, r2] pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]); 8001296: 4b39 ldr r3, [pc, #228] @ (800137c ) 8001298: 781a ldrb r2, [r3, #0] 800129a: 4b38 ldr r3, [pc, #224] @ (800137c ) 800129c: 785b ldrb r3, [r3, #1] 800129e: 4013 ands r3, r2 80012a0: b2da uxtb r2, r3 80012a2: 4b36 ldr r3, [pc, #216] @ (800137c ) 80012a4: 789b ldrb r3, [r3, #2] 80012a6: 4013 ands r3, r2 80012a8: b2da uxtb r2, r3 80012aa: 4b34 ldr r3, [pc, #208] @ (800137c ) 80012ac: 78db ldrb r3, [r3, #3] 80012ae: 4013 ands r3, r2 80012b0: b2da uxtb r2, r3 80012b2: 4b33 ldr r3, [pc, #204] @ (8001380 ) 80012b4: 781b ldrb r3, [r3, #0] 80012b6: 4313 orrs r3, r2 80012b8: b2da uxtb r2, r3 80012ba: 4b31 ldr r3, [pc, #196] @ (8001380 ) 80012bc: 701a strb r2, [r3, #0] pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]); 80012be: 4b2f ldr r3, [pc, #188] @ (800137c ) 80012c0: 781a ldrb r2, [r3, #0] 80012c2: 4b2e ldr r3, [pc, #184] @ (800137c ) 80012c4: 785b ldrb r3, [r3, #1] 80012c6: 4313 orrs r3, r2 80012c8: b2da uxtb r2, r3 80012ca: 4b2c ldr r3, [pc, #176] @ (800137c ) 80012cc: 789b ldrb r3, [r3, #2] 80012ce: 4313 orrs r3, r2 80012d0: b2da uxtb r2, r3 80012d2: 4b2a ldr r3, [pc, #168] @ (800137c ) 80012d4: 78db ldrb r3, [r3, #3] 80012d6: 4313 orrs r3, r2 80012d8: b2da uxtb r2, r3 80012da: 4b29 ldr r3, [pc, #164] @ (8001380 ) 80012dc: 781b ldrb r3, [r3, #0] 80012de: 4013 ands r3, r2 80012e0: b2da uxtb r2, r3 80012e2: 4b27 ldr r3, [pc, #156] @ (8001380 ) 80012e4: 701a strb r2, [r3, #0] //**** legge adc *********************************************************************************** readAdc(); 80012e6: f7fe ff6f bl 80001c8 if (++c100ms >= 10) { // 10 ms 80012ea: 4b26 ldr r3, [pc, #152] @ (8001384 ) 80012ec: 781b ldrb r3, [r3, #0] 80012ee: 3301 adds r3, #1 80012f0: b2da uxtb r2, r3 80012f2: 4b24 ldr r3, [pc, #144] @ (8001384 ) 80012f4: 701a strb r2, [r3, #0] 80012f6: 4b23 ldr r3, [pc, #140] @ (8001384 ) 80012f8: 781b ldrb r3, [r3, #0] 80012fa: 2b09 cmp r3, #9 80012fc: d931 bls.n 8001362 c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop 80012fe: 4b21 ldr r3, [pc, #132] @ (8001384 ) 8001300: 2200 movs r2, #0 8001302: 701a strb r2, [r3, #0] //**** gestione buzzer ***************************************************************************** if(stBuz==bzmoving){ 8001304: 4b20 ldr r3, [pc, #128] @ (8001388 ) 8001306: 781b ldrb r3, [r3, #0] 8001308: b2db uxtb r3, r3 800130a: 2b01 cmp r3, #1 800130c: d111 bne.n 8001332 if(c1s>=5)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET); 800130e: 4b1f ldr r3, [pc, #124] @ (800138c ) 8001310: 781b ldrb r3, [r3, #0] 8001312: 2b04 cmp r3, #4 8001314: d906 bls.n 8001324 8001316: 2200 movs r2, #0 8001318: f44f 7180 mov.w r1, #256 @ 0x100 800131c: 481c ldr r0, [pc, #112] @ (8001390 ) 800131e: f002 fbee bl 8003afe 8001322: e00c b.n 800133e 8001324: 2201 movs r2, #1 8001326: f44f 7180 mov.w r1, #256 @ 0x100 800132a: 4819 ldr r0, [pc, #100] @ (8001390 ) 800132c: f002 fbe7 bl 8003afe 8001330: e005 b.n 800133e }else{//bzoff HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET); 8001332: 2200 movs r2, #0 8001334: f44f 7180 mov.w r1, #256 @ 0x100 8001338: 4815 ldr r0, [pc, #84] @ (8001390 ) 800133a: f002 fbe0 bl 8003afe } //************************************************************************************************** if (++c1s >= 10) { // 10 ms 800133e: 4b13 ldr r3, [pc, #76] @ (800138c ) 8001340: 781b ldrb r3, [r3, #0] 8001342: 3301 adds r3, #1 8001344: b2da uxtb r2, r3 8001346: 4b11 ldr r3, [pc, #68] @ (800138c ) 8001348: 701a strb r2, [r3, #0] 800134a: 4b10 ldr r3, [pc, #64] @ (800138c ) 800134c: 781b ldrb r3, [r3, #0] 800134e: 2b09 cmp r3, #9 8001350: d907 bls.n 8001362 c1s = 0; 8001352: 4b0e ldr r3, [pc, #56] @ (800138c ) 8001354: 2200 movs r2, #0 8001356: 701a strb r2, [r3, #0] HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin); 8001358: f44f 5100 mov.w r1, #8192 @ 0x2000 800135c: 4806 ldr r0, [pc, #24] @ (8001378 ) 800135e: f002 fbe6 bl 8003b2e } } } } 8001362: bf00 nop 8001364: bd80 pop {r7, pc} 8001366: bf00 nop 8001368: 200003de .word 0x200003de 800136c: 200003d9 .word 0x200003d9 8001370: 200003da .word 0x200003da 8001374: 200003df .word 0x200003df 8001378: 40011000 .word 0x40011000 800137c: 200003e0 .word 0x200003e0 8001380: 200003d8 .word 0x200003d8 8001384: 200003e4 .word 0x200003e4 8001388: 200003dd .word 0x200003dd 800138c: 200003e5 .word 0x200003e5 8001390: 40010800 .word 0x40010800 08001394 : void managePulsanti(void){ 8001394: b480 push {r7} 8001396: af00 add r7, sp, #0 if(pulsanti&INP1){ 8001398: 4b31 ldr r3, [pc, #196] @ (8001460 ) 800139a: 781b ldrb r3, [r3, #0] 800139c: f003 0301 and.w r3, r3, #1 80013a0: 2b00 cmp r3, #0 80013a2: d00c beq.n 80013be if(rtP1==0)stPulsanti|=P1START; 80013a4: 4b2f ldr r3, [pc, #188] @ (8001464 ) 80013a6: 781b ldrb r3, [r3, #0] 80013a8: b2db uxtb r3, r3 80013aa: 2b00 cmp r3, #0 80013ac: d124 bne.n 80013f8 80013ae: 4b2e ldr r3, [pc, #184] @ (8001468 ) 80013b0: 781b ldrb r3, [r3, #0] 80013b2: f043 0301 orr.w r3, r3, #1 80013b6: b2da uxtb r2, r3 80013b8: 4b2b ldr r3, [pc, #172] @ (8001468 ) 80013ba: 701a strb r2, [r3, #0] 80013bc: e01c b.n 80013f8 }else{ if(stPulsanti&P1START)stPulsanti&=(~P1START); 80013be: 4b2a ldr r3, [pc, #168] @ (8001468 ) 80013c0: 781b ldrb r3, [r3, #0] 80013c2: f003 0301 and.w r3, r3, #1 80013c6: 2b00 cmp r3, #0 80013c8: d007 beq.n 80013da 80013ca: 4b27 ldr r3, [pc, #156] @ (8001468 ) 80013cc: 781b ldrb r3, [r3, #0] 80013ce: f023 0301 bic.w r3, r3, #1 80013d2: b2da uxtb r2, r3 80013d4: 4b24 ldr r3, [pc, #144] @ (8001468 ) 80013d6: 701a strb r2, [r3, #0] 80013d8: e00b b.n 80013f2 else if(rtP1<=190){ 80013da: 4b22 ldr r3, [pc, #136] @ (8001464 ) 80013dc: 781b ldrb r3, [r3, #0] 80013de: b2db uxtb r3, r3 80013e0: 2bbe cmp r3, #190 @ 0xbe 80013e2: d806 bhi.n 80013f2 stPulsanti|=P1STOP; 80013e4: 4b20 ldr r3, [pc, #128] @ (8001468 ) 80013e6: 781b ldrb r3, [r3, #0] 80013e8: f043 0302 orr.w r3, r3, #2 80013ec: b2da uxtb r2, r3 80013ee: 4b1e ldr r3, [pc, #120] @ (8001468 ) 80013f0: 701a strb r2, [r3, #0] } rtP1=200; 80013f2: 4b1c ldr r3, [pc, #112] @ (8001464 ) 80013f4: 22c8 movs r2, #200 @ 0xc8 80013f6: 701a strb r2, [r3, #0] } if(pulsanti&INP2){ 80013f8: 4b19 ldr r3, [pc, #100] @ (8001460 ) 80013fa: 781b ldrb r3, [r3, #0] 80013fc: f003 0302 and.w r3, r3, #2 8001400: 2b00 cmp r3, #0 8001402: d00c beq.n 800141e if(rtP2==0)stPulsanti|=P2START; 8001404: 4b19 ldr r3, [pc, #100] @ (800146c ) 8001406: 781b ldrb r3, [r3, #0] 8001408: b2db uxtb r3, r3 800140a: 2b00 cmp r3, #0 800140c: d124 bne.n 8001458 800140e: 4b16 ldr r3, [pc, #88] @ (8001468 ) 8001410: 781b ldrb r3, [r3, #0] 8001412: f043 0304 orr.w r3, r3, #4 8001416: b2da uxtb r2, r3 8001418: 4b13 ldr r3, [pc, #76] @ (8001468 ) 800141a: 701a strb r2, [r3, #0] }else{ if(stPulsanti&P2START)stPulsanti&=(~P2START); else if(rtP2<=190)stPulsanti|=P2STOP; rtP2=200; } } 800141c: e01c b.n 8001458 if(stPulsanti&P2START)stPulsanti&=(~P2START); 800141e: 4b12 ldr r3, [pc, #72] @ (8001468 ) 8001420: 781b ldrb r3, [r3, #0] 8001422: f003 0304 and.w r3, r3, #4 8001426: 2b00 cmp r3, #0 8001428: d007 beq.n 800143a 800142a: 4b0f ldr r3, [pc, #60] @ (8001468 ) 800142c: 781b ldrb r3, [r3, #0] 800142e: f023 0304 bic.w r3, r3, #4 8001432: b2da uxtb r2, r3 8001434: 4b0c ldr r3, [pc, #48] @ (8001468 ) 8001436: 701a strb r2, [r3, #0] 8001438: e00b b.n 8001452 else if(rtP2<=190)stPulsanti|=P2STOP; 800143a: 4b0c ldr r3, [pc, #48] @ (800146c ) 800143c: 781b ldrb r3, [r3, #0] 800143e: b2db uxtb r3, r3 8001440: 2bbe cmp r3, #190 @ 0xbe 8001442: d806 bhi.n 8001452 8001444: 4b08 ldr r3, [pc, #32] @ (8001468 ) 8001446: 781b ldrb r3, [r3, #0] 8001448: f043 0308 orr.w r3, r3, #8 800144c: b2da uxtb r2, r3 800144e: 4b06 ldr r3, [pc, #24] @ (8001468 ) 8001450: 701a strb r2, [r3, #0] rtP2=200; 8001452: 4b06 ldr r3, [pc, #24] @ (800146c ) 8001454: 22c8 movs r2, #200 @ 0xc8 8001456: 701a strb r2, [r3, #0] } 8001458: bf00 nop 800145a: 46bd mov sp, r7 800145c: bc80 pop {r7} 800145e: 4770 bx lr 8001460: 200003d8 .word 0x200003d8 8001464: 200003d9 .word 0x200003d9 8001468: 200003db .word 0x200003db 800146c: 200003da .word 0x200003da 08001470 : void manageCiclo(void){ 8001470: b480 push {r7} 8001472: af00 add r7, sp, #0 switch(stCiclo){ 8001474: 4b7f ldr r3, [pc, #508] @ (8001674 ) 8001476: 781b ldrb r3, [r3, #0] 8001478: 2b0f cmp r3, #15 800147a: f200 80f7 bhi.w 800166c 800147e: a201 add r2, pc, #4 @ (adr r2, 8001484 ) 8001480: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001484: 080014c5 .word 0x080014c5 8001488: 080014f3 .word 0x080014f3 800148c: 08001509 .word 0x08001509 8001490: 0800151f .word 0x0800151f 8001494: 08001535 .word 0x08001535 8001498: 0800154b .word 0x0800154b 800149c: 0800155f .word 0x0800155f 80014a0: 08001573 .word 0x08001573 80014a4: 0800158f .word 0x0800158f 80014a8: 080015a3 .word 0x080015a3 80014ac: 080015b7 .word 0x080015b7 80014b0: 080015cb .word 0x080015cb 80014b4: 080015df .word 0x080015df 80014b8: 080015f3 .word 0x080015f3 80014bc: 08001607 .word 0x08001607 80014c0: 0800161b .word 0x0800161b case omchiuso: if(stPulsanti&P1START){ 80014c4: 4b6c ldr r3, [pc, #432] @ (8001678 ) 80014c6: 781b ldrb r3, [r3, #0] 80014c8: f003 0301 and.w r3, r3, #1 80014cc: 2b00 cmp r3, #0 80014ce: d005 beq.n 80014dc stBuz=bzmoving; 80014d0: 4b6a ldr r3, [pc, #424] @ (800167c ) 80014d2: 2201 movs r2, #1 80014d4: 701a strb r2, [r3, #0] stCiclo=omapertura1; 80014d6: 4b67 ldr r3, [pc, #412] @ (8001674 ) 80014d8: 2201 movs r2, #1 80014da: 701a strb r2, [r3, #0] } if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80014dc: 4b66 ldr r3, [pc, #408] @ (8001678 ) 80014de: 781b ldrb r3, [r3, #0] 80014e0: f003 0302 and.w r3, r3, #2 80014e4: 2b00 cmp r3, #0 80014e6: f000 80a6 beq.w 8001636 80014ea: 4b62 ldr r3, [pc, #392] @ (8001674 ) 80014ec: 2207 movs r2, #7 80014ee: 701a strb r2, [r3, #0] break; 80014f0: e0a1 b.n 8001636 case omapertura1: if(stPulsanti&P1STOP)stCiclo=omstopapertura; 80014f2: 4b61 ldr r3, [pc, #388] @ (8001678 ) 80014f4: 781b ldrb r3, [r3, #0] 80014f6: f003 0302 and.w r3, r3, #2 80014fa: 2b00 cmp r3, #0 80014fc: f000 809d beq.w 800163a 8001500: 4b5c ldr r3, [pc, #368] @ (8001674 ) 8001502: 2207 movs r2, #7 8001504: 701a strb r2, [r3, #0] break; 8001506: e098 b.n 800163a case omapertura2: if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8001508: 4b5b ldr r3, [pc, #364] @ (8001678 ) 800150a: 781b ldrb r3, [r3, #0] 800150c: f003 0302 and.w r3, r3, #2 8001510: 2b00 cmp r3, #0 8001512: f000 8094 beq.w 800163e 8001516: 4b57 ldr r3, [pc, #348] @ (8001674 ) 8001518: 2207 movs r2, #7 800151a: 701a strb r2, [r3, #0] break; 800151c: e08f b.n 800163e case omapertura3: if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800151e: 4b56 ldr r3, [pc, #344] @ (8001678 ) 8001520: 781b ldrb r3, [r3, #0] 8001522: f003 0302 and.w r3, r3, #2 8001526: 2b00 cmp r3, #0 8001528: f000 808b beq.w 8001642 800152c: 4b51 ldr r3, [pc, #324] @ (8001674 ) 800152e: 2207 movs r2, #7 8001530: 701a strb r2, [r3, #0] break; 8001532: e086 b.n 8001642 case omapertura4: if(stPulsanti&P1STOP)stCiclo=omstopapertura; 8001534: 4b50 ldr r3, [pc, #320] @ (8001678 ) 8001536: 781b ldrb r3, [r3, #0] 8001538: f003 0302 and.w r3, r3, #2 800153c: 2b00 cmp r3, #0 800153e: f000 8082 beq.w 8001646 8001542: 4b4c ldr r3, [pc, #304] @ (8001674 ) 8001544: 2207 movs r2, #7 8001546: 701a strb r2, [r3, #0] break; 8001548: e07d b.n 8001646 case omapertura5: if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800154a: 4b4b ldr r3, [pc, #300] @ (8001678 ) 800154c: 781b ldrb r3, [r3, #0] 800154e: f003 0302 and.w r3, r3, #2 8001552: 2b00 cmp r3, #0 8001554: d079 beq.n 800164a 8001556: 4b47 ldr r3, [pc, #284] @ (8001674 ) 8001558: 2207 movs r2, #7 800155a: 701a strb r2, [r3, #0] break; 800155c: e075 b.n 800164a case omapertura6: if(stPulsanti&P1STOP)stCiclo=omstopapertura; 800155e: 4b46 ldr r3, [pc, #280] @ (8001678 ) 8001560: 781b ldrb r3, [r3, #0] 8001562: f003 0302 and.w r3, r3, #2 8001566: 2b00 cmp r3, #0 8001568: d071 beq.n 800164e 800156a: 4b42 ldr r3, [pc, #264] @ (8001674 ) 800156c: 2207 movs r2, #7 800156e: 701a strb r2, [r3, #0] break; 8001570: e06d b.n 800164e case omstopapertura: stBuz=bzoff; 8001572: 4b42 ldr r3, [pc, #264] @ (800167c ) 8001574: 2200 movs r2, #0 8001576: 701a strb r2, [r3, #0] stCiclo=omchiuso; 8001578: 4b3e ldr r3, [pc, #248] @ (8001674 ) 800157a: 2200 movs r2, #0 800157c: 701a strb r2, [r3, #0] stPulsanti&=(~P1STOP); 800157e: 4b3e ldr r3, [pc, #248] @ (8001678 ) 8001580: 781b ldrb r3, [r3, #0] 8001582: f023 0302 bic.w r3, r3, #2 8001586: b2da uxtb r2, r3 8001588: 4b3b ldr r3, [pc, #236] @ (8001678 ) 800158a: 701a strb r2, [r3, #0] break; 800158c: e06e b.n 800166c case omaperto: if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 800158e: 4b3a ldr r3, [pc, #232] @ (8001678 ) 8001590: 781b ldrb r3, [r3, #0] 8001592: f003 0302 and.w r3, r3, #2 8001596: 2b00 cmp r3, #0 8001598: d05b beq.n 8001652 800159a: 4b36 ldr r3, [pc, #216] @ (8001674 ) 800159c: 220f movs r2, #15 800159e: 701a strb r2, [r3, #0] break; 80015a0: e057 b.n 8001652 case omchiusura1: if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80015a2: 4b35 ldr r3, [pc, #212] @ (8001678 ) 80015a4: 781b ldrb r3, [r3, #0] 80015a6: f003 0302 and.w r3, r3, #2 80015aa: 2b00 cmp r3, #0 80015ac: d053 beq.n 8001656 80015ae: 4b31 ldr r3, [pc, #196] @ (8001674 ) 80015b0: 220f movs r2, #15 80015b2: 701a strb r2, [r3, #0] break; 80015b4: e04f b.n 8001656 case omchiusura2: if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80015b6: 4b30 ldr r3, [pc, #192] @ (8001678 ) 80015b8: 781b ldrb r3, [r3, #0] 80015ba: f003 0302 and.w r3, r3, #2 80015be: 2b00 cmp r3, #0 80015c0: d04b beq.n 800165a 80015c2: 4b2c ldr r3, [pc, #176] @ (8001674 ) 80015c4: 220f movs r2, #15 80015c6: 701a strb r2, [r3, #0] break; 80015c8: e047 b.n 800165a case omchiusura3: if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80015ca: 4b2b ldr r3, [pc, #172] @ (8001678 ) 80015cc: 781b ldrb r3, [r3, #0] 80015ce: f003 0302 and.w r3, r3, #2 80015d2: 2b00 cmp r3, #0 80015d4: d043 beq.n 800165e 80015d6: 4b27 ldr r3, [pc, #156] @ (8001674 ) 80015d8: 220f movs r2, #15 80015da: 701a strb r2, [r3, #0] break; 80015dc: e03f b.n 800165e case omchiusura4: if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80015de: 4b26 ldr r3, [pc, #152] @ (8001678 ) 80015e0: 781b ldrb r3, [r3, #0] 80015e2: f003 0302 and.w r3, r3, #2 80015e6: 2b00 cmp r3, #0 80015e8: d03b beq.n 8001662 80015ea: 4b22 ldr r3, [pc, #136] @ (8001674 ) 80015ec: 220f movs r2, #15 80015ee: 701a strb r2, [r3, #0] break; 80015f0: e037 b.n 8001662 case omchiusura5: if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 80015f2: 4b21 ldr r3, [pc, #132] @ (8001678 ) 80015f4: 781b ldrb r3, [r3, #0] 80015f6: f003 0302 and.w r3, r3, #2 80015fa: 2b00 cmp r3, #0 80015fc: d033 beq.n 8001666 80015fe: 4b1d ldr r3, [pc, #116] @ (8001674 ) 8001600: 220f movs r2, #15 8001602: 701a strb r2, [r3, #0] break; 8001604: e02f b.n 8001666 case omchiusura6: if(stPulsanti&P1STOP)stCiclo=omstopchiusura; 8001606: 4b1c ldr r3, [pc, #112] @ (8001678 ) 8001608: 781b ldrb r3, [r3, #0] 800160a: f003 0302 and.w r3, r3, #2 800160e: 2b00 cmp r3, #0 8001610: d02b beq.n 800166a 8001612: 4b18 ldr r3, [pc, #96] @ (8001674 ) 8001614: 220f movs r2, #15 8001616: 701a strb r2, [r3, #0] break; 8001618: e027 b.n 800166a case omstopchiusura: stBuz=bzoff; 800161a: 4b18 ldr r3, [pc, #96] @ (800167c ) 800161c: 2200 movs r2, #0 800161e: 701a strb r2, [r3, #0] stCiclo=omaperto; 8001620: 4b14 ldr r3, [pc, #80] @ (8001674 ) 8001622: 2208 movs r2, #8 8001624: 701a strb r2, [r3, #0] stPulsanti&=(~P1STOP); 8001626: 4b14 ldr r3, [pc, #80] @ (8001678 ) 8001628: 781b ldrb r3, [r3, #0] 800162a: f023 0302 bic.w r3, r3, #2 800162e: b2da uxtb r2, r3 8001630: 4b11 ldr r3, [pc, #68] @ (8001678 ) 8001632: 701a strb r2, [r3, #0] break; 8001634: e01a b.n 800166c break; 8001636: bf00 nop 8001638: e018 b.n 800166c break; 800163a: bf00 nop 800163c: e016 b.n 800166c break; 800163e: bf00 nop 8001640: e014 b.n 800166c break; 8001642: bf00 nop 8001644: e012 b.n 800166c break; 8001646: bf00 nop 8001648: e010 b.n 800166c break; 800164a: bf00 nop 800164c: e00e b.n 800166c break; 800164e: bf00 nop 8001650: e00c b.n 800166c break; 8001652: bf00 nop 8001654: e00a b.n 800166c break; 8001656: bf00 nop 8001658: e008 b.n 800166c break; 800165a: bf00 nop 800165c: e006 b.n 800166c break; 800165e: bf00 nop 8001660: e004 b.n 800166c break; 8001662: bf00 nop 8001664: e002 b.n 800166c break; 8001666: bf00 nop 8001668: e000 b.n 800166c break; 800166a: bf00 nop } } 800166c: bf00 nop 800166e: 46bd mov sp, r7 8001670: bc80 pop {r7} 8001672: 4770 bx lr 8001674: 200003dc .word 0x200003dc 8001678: 200003db .word 0x200003db 800167c: 200003dd .word 0x200003dd 08001680
: /** * @brief The application entry point. * @retval int */ int main(void) { 8001680: b580 push {r7, lr} 8001682: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8001684: f000 ff70 bl 8002568 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8001688: f000 f84c bl 8001724 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800168c: f000 faae bl 8001bec MX_DMA_Init(); 8001690: f000 fa8e bl 8001bb0 MX_USB_DEVICE_Init(); 8001694: f009 fada bl 800ac4c MX_TIM2_Init(); 8001698: f000 f91a bl 80018d0 MX_TIM4_Init(); 800169c: f000 f9bc bl 8001a18 MX_ADC1_Init(); 80016a0: f000 f89e bl 80017e0 MX_USART1_UART_Init(); 80016a4: f000 fa5a bl 8001b5c /* USER CODE BEGIN 2 */ HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS); 80016a8: 2205 movs r2, #5 80016aa: 491a ldr r1, [pc, #104] @ (8001714 ) 80016ac: 481a ldr r0, [pc, #104] @ (8001718 ) 80016ae: f001 f895 bl 80027dc StopMot(timMot1,FWMot1); 80016b2: 2100 movs r1, #0 80016b4: 4819 ldr r0, [pc, #100] @ (800171c ) 80016b6: f000 fb5e bl 8001d76 StopMot(timMot1,BWMot1); 80016ba: 2104 movs r1, #4 80016bc: 4817 ldr r0, [pc, #92] @ (800171c ) 80016be: f000 fb5a bl 8001d76 StopMot(timMot2,FWMot2); 80016c2: 2108 movs r1, #8 80016c4: 4815 ldr r0, [pc, #84] @ (800171c ) 80016c6: f000 fb56 bl 8001d76 StopMot(timMot2,BWMot2); 80016ca: 210c movs r1, #12 80016cc: 4813 ldr r0, [pc, #76] @ (800171c ) 80016ce: f000 fb52 bl 8001d76 StopMot(timMot3,FWMot3); 80016d2: 2100 movs r1, #0 80016d4: 4812 ldr r0, [pc, #72] @ (8001720 ) 80016d6: f000 fb4e bl 8001d76 StopMot(timMot3,BWMot3); 80016da: 2104 movs r1, #4 80016dc: 4810 ldr r0, [pc, #64] @ (8001720 ) 80016de: f000 fb4a bl 8001d76 StopMot(timMot4,FWMot4); 80016e2: 2108 movs r1, #8 80016e4: 480e ldr r0, [pc, #56] @ (8001720 ) 80016e6: f000 fb46 bl 8001d76 StopMot(timMot4,BWMot4); 80016ea: 210c movs r1, #12 80016ec: 480c ldr r0, [pc, #48] @ (8001720 ) 80016ee: f000 fb42 bl 8001d76 //CDC_Transmit_FS((uint8_t*)"Start\r\n", 7); //while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY); if (EE_Init() != EE_OK){ 80016f2: f7ff fcbd bl 8001070 80016f6: 4603 mov r3, r0 80016f8: 2b00 cmp r3, #0 80016fa: d001 beq.n 8001700 for(;;);//errore eeprom 80016fc: bf00 nop 80016fe: e7fd b.n 80016fc /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1){ manageCDC(); 8001700: f7fe fe7c bl 80003fc manageAdc(); 8001704: f7fe fd2a bl 800015c managePulsanti(); 8001708: f7ff fe44 bl 8001394 manageCiclo(); 800170c: f7ff feb0 bl 8001470 manageCDC(); 8001710: e7f6 b.n 8001700 8001712: bf00 nop 8001714: 200001ec .word 0x200001ec 8001718: 2000028c .word 0x2000028c 800171c: 20000300 .word 0x20000300 8001720: 20000348 .word 0x20000348 08001724 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001724: b580 push {r7, lr} 8001726: b094 sub sp, #80 @ 0x50 8001728: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 800172a: f107 0328 add.w r3, r7, #40 @ 0x28 800172e: 2228 movs r2, #40 @ 0x28 8001730: 2100 movs r1, #0 8001732: 4618 mov r0, r3 8001734: f009 ffc6 bl 800b6c4 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001738: f107 0314 add.w r3, r7, #20 800173c: 2200 movs r2, #0 800173e: 601a str r2, [r3, #0] 8001740: 605a str r2, [r3, #4] 8001742: 609a str r2, [r3, #8] 8001744: 60da str r2, [r3, #12] 8001746: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8001748: 1d3b adds r3, r7, #4 800174a: 2200 movs r2, #0 800174c: 601a str r2, [r3, #0] 800174e: 605a str r2, [r3, #4] 8001750: 609a str r2, [r3, #8] 8001752: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8001754: 2301 movs r3, #1 8001756: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8001758: f44f 3380 mov.w r3, #65536 @ 0x10000 800175c: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 800175e: 2300 movs r3, #0 8001760: 633b str r3, [r7, #48] @ 0x30 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8001762: 2301 movs r3, #1 8001764: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001766: 2302 movs r3, #2 8001768: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 800176a: f44f 3380 mov.w r3, #65536 @ 0x10000 800176e: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; 8001770: f44f 1380 mov.w r3, #1048576 @ 0x100000 8001774: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001776: f107 0328 add.w r3, r7, #40 @ 0x28 800177a: 4618 mov r0, r3 800177c: f003 ff50 bl 8005620 8001780: 4603 mov r3, r0 8001782: 2b00 cmp r3, #0 8001784: d001 beq.n 800178a { Error_Handler(); 8001786: f000 fadb bl 8001d40 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800178a: 230f movs r3, #15 800178c: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 800178e: 2302 movs r3, #2 8001790: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001792: 2300 movs r3, #0 8001794: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001796: f44f 6380 mov.w r3, #1024 @ 0x400 800179a: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800179c: 2300 movs r3, #0 800179e: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 80017a0: f107 0314 add.w r3, r7, #20 80017a4: 2102 movs r1, #2 80017a6: 4618 mov r0, r3 80017a8: f004 f9bc bl 8005b24 80017ac: 4603 mov r3, r0 80017ae: 2b00 cmp r3, #0 80017b0: d001 beq.n 80017b6 { Error_Handler(); 80017b2: f000 fac5 bl 8001d40 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB; 80017b6: 2312 movs r3, #18 80017b8: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; 80017ba: f44f 4300 mov.w r3, #32768 @ 0x8000 80017be: 60fb str r3, [r7, #12] PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; 80017c0: 2300 movs r3, #0 80017c2: 613b str r3, [r7, #16] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 80017c4: 1d3b adds r3, r7, #4 80017c6: 4618 mov r0, r3 80017c8: f004 fb3c bl 8005e44 80017cc: 4603 mov r3, r0 80017ce: 2b00 cmp r3, #0 80017d0: d001 beq.n 80017d6 { Error_Handler(); 80017d2: f000 fab5 bl 8001d40 } } 80017d6: bf00 nop 80017d8: 3750 adds r7, #80 @ 0x50 80017da: 46bd mov sp, r7 80017dc: bd80 pop {r7, pc} ... 080017e0 : * @brief ADC1 Initialization Function * @param None * @retval None */ static void MX_ADC1_Init(void) { 80017e0: b580 push {r7, lr} 80017e2: b084 sub sp, #16 80017e4: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; 80017e6: 1d3b adds r3, r7, #4 80017e8: 2200 movs r2, #0 80017ea: 601a str r2, [r3, #0] 80017ec: 605a str r2, [r3, #4] 80017ee: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; 80017f0: 4b35 ldr r3, [pc, #212] @ (80018c8 ) 80017f2: 4a36 ldr r2, [pc, #216] @ (80018cc ) 80017f4: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; 80017f6: 4b34 ldr r3, [pc, #208] @ (80018c8 ) 80017f8: f44f 7280 mov.w r2, #256 @ 0x100 80017fc: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; 80017fe: 4b32 ldr r3, [pc, #200] @ (80018c8 ) 8001800: 2201 movs r2, #1 8001802: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; 8001804: 4b30 ldr r3, [pc, #192] @ (80018c8 ) 8001806: 2200 movs r2, #0 8001808: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; 800180a: 4b2f ldr r3, [pc, #188] @ (80018c8 ) 800180c: f44f 2260 mov.w r2, #917504 @ 0xe0000 8001810: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; 8001812: 4b2d ldr r3, [pc, #180] @ (80018c8 ) 8001814: 2200 movs r2, #0 8001816: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 5; 8001818: 4b2b ldr r3, [pc, #172] @ (80018c8 ) 800181a: 2205 movs r2, #5 800181c: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) 800181e: 482a ldr r0, [pc, #168] @ (80018c8 ) 8001820: f000 ff04 bl 800262c 8001824: 4603 mov r3, r0 8001826: 2b00 cmp r3, #0 8001828: d001 beq.n 800182e { Error_Handler(); 800182a: f000 fa89 bl 8001d40 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_4; 800182e: 2304 movs r3, #4 8001830: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; 8001832: 2301 movs r3, #1 8001834: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5; 8001836: 2303 movs r3, #3 8001838: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800183a: 1d3b adds r3, r7, #4 800183c: 4619 mov r1, r3 800183e: 4822 ldr r0, [pc, #136] @ (80018c8 ) 8001840: f001 f8c6 bl 80029d0 8001844: 4603 mov r3, r0 8001846: 2b00 cmp r3, #0 8001848: d001 beq.n 800184e { Error_Handler(); 800184a: f000 fa79 bl 8001d40 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_5; 800184e: 2305 movs r3, #5 8001850: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_2; 8001852: 2302 movs r3, #2 8001854: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8001856: 1d3b adds r3, r7, #4 8001858: 4619 mov r1, r3 800185a: 481b ldr r0, [pc, #108] @ (80018c8 ) 800185c: f001 f8b8 bl 80029d0 8001860: 4603 mov r3, r0 8001862: 2b00 cmp r3, #0 8001864: d001 beq.n 800186a { Error_Handler(); 8001866: f000 fa6b bl 8001d40 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_6; 800186a: 2306 movs r3, #6 800186c: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_3; 800186e: 2303 movs r3, #3 8001870: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 8001872: 1d3b adds r3, r7, #4 8001874: 4619 mov r1, r3 8001876: 4814 ldr r0, [pc, #80] @ (80018c8 ) 8001878: f001 f8aa bl 80029d0 800187c: 4603 mov r3, r0 800187e: 2b00 cmp r3, #0 8001880: d001 beq.n 8001886 { Error_Handler(); 8001882: f000 fa5d bl 8001d40 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_7; 8001886: 2307 movs r3, #7 8001888: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_4; 800188a: 2304 movs r3, #4 800188c: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 800188e: 1d3b adds r3, r7, #4 8001890: 4619 mov r1, r3 8001892: 480d ldr r0, [pc, #52] @ (80018c8 ) 8001894: f001 f89c bl 80029d0 8001898: 4603 mov r3, r0 800189a: 2b00 cmp r3, #0 800189c: d001 beq.n 80018a2 { Error_Handler(); 800189e: f000 fa4f bl 8001d40 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_8; 80018a2: 2308 movs r3, #8 80018a4: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_5; 80018a6: 2305 movs r3, #5 80018a8: 60bb str r3, [r7, #8] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) 80018aa: 1d3b adds r3, r7, #4 80018ac: 4619 mov r1, r3 80018ae: 4806 ldr r0, [pc, #24] @ (80018c8 ) 80018b0: f001 f88e bl 80029d0 80018b4: 4603 mov r3, r0 80018b6: 2b00 cmp r3, #0 80018b8: d001 beq.n 80018be { Error_Handler(); 80018ba: f000 fa41 bl 8001d40 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } 80018be: bf00 nop 80018c0: 3710 adds r7, #16 80018c2: 46bd mov sp, r7 80018c4: bd80 pop {r7, pc} 80018c6: bf00 nop 80018c8: 2000028c .word 0x2000028c 80018cc: 40012400 .word 0x40012400 080018d0 : * @brief TIM2 Initialization Function * @param None * @retval None */ static void MX_TIM2_Init(void) { 80018d0: b580 push {r7, lr} 80018d2: b08e sub sp, #56 @ 0x38 80018d4: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 80018d6: f107 0328 add.w r3, r7, #40 @ 0x28 80018da: 2200 movs r2, #0 80018dc: 601a str r2, [r3, #0] 80018de: 605a str r2, [r3, #4] 80018e0: 609a str r2, [r3, #8] 80018e2: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 80018e4: f107 0320 add.w r3, r7, #32 80018e8: 2200 movs r2, #0 80018ea: 601a str r2, [r3, #0] 80018ec: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 80018ee: 1d3b adds r3, r7, #4 80018f0: 2200 movs r2, #0 80018f2: 601a str r2, [r3, #0] 80018f4: 605a str r2, [r3, #4] 80018f6: 609a str r2, [r3, #8] 80018f8: 60da str r2, [r3, #12] 80018fa: 611a str r2, [r3, #16] 80018fc: 615a str r2, [r3, #20] 80018fe: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; 8001900: 4b44 ldr r3, [pc, #272] @ (8001a14 ) 8001902: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 8001906: 601a str r2, [r3, #0] htim2.Init.Prescaler = 0; 8001908: 4b42 ldr r3, [pc, #264] @ (8001a14 ) 800190a: 2200 movs r2, #0 800190c: 605a str r2, [r3, #4] htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 800190e: 4b41 ldr r3, [pc, #260] @ (8001a14 ) 8001910: 2200 movs r2, #0 8001912: 609a str r2, [r3, #8] htim2.Init.Period = 17999; 8001914: 4b3f ldr r3, [pc, #252] @ (8001a14 ) 8001916: f244 624f movw r2, #17999 @ 0x464f 800191a: 60da str r2, [r3, #12] htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800191c: 4b3d ldr r3, [pc, #244] @ (8001a14 ) 800191e: 2200 movs r2, #0 8001920: 611a str r2, [r3, #16] htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001922: 4b3c ldr r3, [pc, #240] @ (8001a14 ) 8001924: 2200 movs r2, #0 8001926: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim2) != HAL_OK) 8001928: 483a ldr r0, [pc, #232] @ (8001a14 ) 800192a: f004 fb41 bl 8005fb0 800192e: 4603 mov r3, r0 8001930: 2b00 cmp r3, #0 8001932: d001 beq.n 8001938 { Error_Handler(); 8001934: f000 fa04 bl 8001d40 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 8001938: f44f 5380 mov.w r3, #4096 @ 0x1000 800193c: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) 800193e: f107 0328 add.w r3, r7, #40 @ 0x28 8001942: 4619 mov r1, r3 8001944: 4833 ldr r0, [pc, #204] @ (8001a14 ) 8001946: f004 fda3 bl 8006490 800194a: 4603 mov r3, r0 800194c: 2b00 cmp r3, #0 800194e: d001 beq.n 8001954 { Error_Handler(); 8001950: f000 f9f6 bl 8001d40 } if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) 8001954: 482f ldr r0, [pc, #188] @ (8001a14 ) 8001956: f004 fb7a bl 800604e 800195a: 4603 mov r3, r0 800195c: 2b00 cmp r3, #0 800195e: d001 beq.n 8001964 { Error_Handler(); 8001960: f000 f9ee bl 8001d40 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001964: 2300 movs r3, #0 8001966: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001968: 2300 movs r3, #0 800196a: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 800196c: f107 0320 add.w r3, r7, #32 8001970: 4619 mov r1, r3 8001972: 4828 ldr r0, [pc, #160] @ (8001a14 ) 8001974: f005 f92c bl 8006bd0 8001978: 4603 mov r3, r0 800197a: 2b00 cmp r3, #0 800197c: d001 beq.n 8001982 { Error_Handler(); 800197e: f000 f9df bl 8001d40 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 8001982: 2360 movs r3, #96 @ 0x60 8001984: 607b str r3, [r7, #4] sConfigOC.Pulse = 1000; 8001986: f44f 737a mov.w r3, #1000 @ 0x3e8 800198a: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800198c: 2300 movs r3, #0 800198e: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 8001990: 2304 movs r3, #4 8001992: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 8001994: 1d3b adds r3, r7, #4 8001996: 2200 movs r2, #0 8001998: 4619 mov r1, r3 800199a: 481e ldr r0, [pc, #120] @ (8001a14 ) 800199c: f004 fcb6 bl 800630c 80019a0: 4603 mov r3, r0 80019a2: 2b00 cmp r3, #0 80019a4: d001 beq.n 80019aa { Error_Handler(); 80019a6: f000 f9cb bl 8001d40 } sConfigOC.Pulse = 2000; 80019aa: f44f 63fa mov.w r3, #2000 @ 0x7d0 80019ae: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 80019b0: 1d3b adds r3, r7, #4 80019b2: 2204 movs r2, #4 80019b4: 4619 mov r1, r3 80019b6: 4817 ldr r0, [pc, #92] @ (8001a14 ) 80019b8: f004 fca8 bl 800630c 80019bc: 4603 mov r3, r0 80019be: 2b00 cmp r3, #0 80019c0: d001 beq.n 80019c6 { Error_Handler(); 80019c2: f000 f9bd bl 8001d40 } sConfigOC.Pulse = 3000; 80019c6: f640 33b8 movw r3, #3000 @ 0xbb8 80019ca: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 80019cc: 2300 movs r3, #0 80019ce: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 80019d0: 1d3b adds r3, r7, #4 80019d2: 2208 movs r2, #8 80019d4: 4619 mov r1, r3 80019d6: 480f ldr r0, [pc, #60] @ (8001a14 ) 80019d8: f004 fc98 bl 800630c 80019dc: 4603 mov r3, r0 80019de: 2b00 cmp r3, #0 80019e0: d001 beq.n 80019e6 { Error_Handler(); 80019e2: f000 f9ad bl 8001d40 } sConfigOC.Pulse = 4000; 80019e6: f44f 637a mov.w r3, #4000 @ 0xfa0 80019ea: 60bb str r3, [r7, #8] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 80019ec: 2304 movs r3, #4 80019ee: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 80019f0: 1d3b adds r3, r7, #4 80019f2: 220c movs r2, #12 80019f4: 4619 mov r1, r3 80019f6: 4807 ldr r0, [pc, #28] @ (8001a14 ) 80019f8: f004 fc88 bl 800630c 80019fc: 4603 mov r3, r0 80019fe: 2b00 cmp r3, #0 8001a00: d001 beq.n 8001a06 { Error_Handler(); 8001a02: f000 f99d bl 8001d40 } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ HAL_TIM_MspPostInit(&htim2); 8001a06: 4803 ldr r0, [pc, #12] @ (8001a14 ) 8001a08: f000 fc6a bl 80022e0 } 8001a0c: bf00 nop 8001a0e: 3738 adds r7, #56 @ 0x38 8001a10: 46bd mov sp, r7 8001a12: bd80 pop {r7, pc} 8001a14: 20000300 .word 0x20000300 08001a18 : * @brief TIM4 Initialization Function * @param None * @retval None */ static void MX_TIM4_Init(void) { 8001a18: b580 push {r7, lr} 8001a1a: b08e sub sp, #56 @ 0x38 8001a1c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM4_Init 0 */ /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 8001a1e: f107 0328 add.w r3, r7, #40 @ 0x28 8001a22: 2200 movs r2, #0 8001a24: 601a str r2, [r3, #0] 8001a26: 605a str r2, [r3, #4] 8001a28: 609a str r2, [r3, #8] 8001a2a: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 8001a2c: f107 0320 add.w r3, r7, #32 8001a30: 2200 movs r2, #0 8001a32: 601a str r2, [r3, #0] 8001a34: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 8001a36: 1d3b adds r3, r7, #4 8001a38: 2200 movs r2, #0 8001a3a: 601a str r2, [r3, #0] 8001a3c: 605a str r2, [r3, #4] 8001a3e: 609a str r2, [r3, #8] 8001a40: 60da str r2, [r3, #12] 8001a42: 611a str r2, [r3, #16] 8001a44: 615a str r2, [r3, #20] 8001a46: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM4_Init 1 */ /* USER CODE END TIM4_Init 1 */ htim4.Instance = TIM4; 8001a48: 4b42 ldr r3, [pc, #264] @ (8001b54 ) 8001a4a: 4a43 ldr r2, [pc, #268] @ (8001b58 ) 8001a4c: 601a str r2, [r3, #0] htim4.Init.Prescaler = 0; 8001a4e: 4b41 ldr r3, [pc, #260] @ (8001b54 ) 8001a50: 2200 movs r2, #0 8001a52: 605a str r2, [r3, #4] htim4.Init.CounterMode = TIM_COUNTERMODE_UP; 8001a54: 4b3f ldr r3, [pc, #252] @ (8001b54 ) 8001a56: 2200 movs r2, #0 8001a58: 609a str r2, [r3, #8] htim4.Init.Period = 17999; 8001a5a: 4b3e ldr r3, [pc, #248] @ (8001b54 ) 8001a5c: f244 624f movw r2, #17999 @ 0x464f 8001a60: 60da str r2, [r3, #12] htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 8001a62: 4b3c ldr r3, [pc, #240] @ (8001b54 ) 8001a64: 2200 movs r2, #0 8001a66: 611a str r2, [r3, #16] htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001a68: 4b3a ldr r3, [pc, #232] @ (8001b54 ) 8001a6a: 2200 movs r2, #0 8001a6c: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim4) != HAL_OK) 8001a6e: 4839 ldr r0, [pc, #228] @ (8001b54 ) 8001a70: f004 fa9e bl 8005fb0 8001a74: 4603 mov r3, r0 8001a76: 2b00 cmp r3, #0 8001a78: d001 beq.n 8001a7e { Error_Handler(); 8001a7a: f000 f961 bl 8001d40 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 8001a7e: f44f 5380 mov.w r3, #4096 @ 0x1000 8001a82: 62bb str r3, [r7, #40] @ 0x28 if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) 8001a84: f107 0328 add.w r3, r7, #40 @ 0x28 8001a88: 4619 mov r1, r3 8001a8a: 4832 ldr r0, [pc, #200] @ (8001b54 ) 8001a8c: f004 fd00 bl 8006490 8001a90: 4603 mov r3, r0 8001a92: 2b00 cmp r3, #0 8001a94: d001 beq.n 8001a9a { Error_Handler(); 8001a96: f000 f953 bl 8001d40 } if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) 8001a9a: 482e ldr r0, [pc, #184] @ (8001b54 ) 8001a9c: f004 fad7 bl 800604e 8001aa0: 4603 mov r3, r0 8001aa2: 2b00 cmp r3, #0 8001aa4: d001 beq.n 8001aaa { Error_Handler(); 8001aa6: f000 f94b bl 8001d40 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8001aaa: 2300 movs r3, #0 8001aac: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8001aae: 2300 movs r3, #0 8001ab0: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) 8001ab2: f107 0320 add.w r3, r7, #32 8001ab6: 4619 mov r1, r3 8001ab8: 4826 ldr r0, [pc, #152] @ (8001b54 ) 8001aba: f005 f889 bl 8006bd0 8001abe: 4603 mov r3, r0 8001ac0: 2b00 cmp r3, #0 8001ac2: d001 beq.n 8001ac8 { Error_Handler(); 8001ac4: f000 f93c bl 8001d40 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 8001ac8: 2360 movs r3, #96 @ 0x60 8001aca: 607b str r3, [r7, #4] sConfigOC.Pulse = 5000; 8001acc: f241 3388 movw r3, #5000 @ 0x1388 8001ad0: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8001ad2: 2300 movs r3, #0 8001ad4: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_ENABLE; 8001ad6: 2304 movs r3, #4 8001ad8: 617b str r3, [r7, #20] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 8001ada: 1d3b adds r3, r7, #4 8001adc: 2200 movs r2, #0 8001ade: 4619 mov r1, r3 8001ae0: 481c ldr r0, [pc, #112] @ (8001b54 ) 8001ae2: f004 fc13 bl 800630c 8001ae6: 4603 mov r3, r0 8001ae8: 2b00 cmp r3, #0 8001aea: d001 beq.n 8001af0 { Error_Handler(); 8001aec: f000 f928 bl 8001d40 } sConfigOC.Pulse = 6000; 8001af0: f241 7370 movw r3, #6000 @ 0x1770 8001af4: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) 8001af6: 1d3b adds r3, r7, #4 8001af8: 2204 movs r2, #4 8001afa: 4619 mov r1, r3 8001afc: 4815 ldr r0, [pc, #84] @ (8001b54 ) 8001afe: f004 fc05 bl 800630c 8001b02: 4603 mov r3, r0 8001b04: 2b00 cmp r3, #0 8001b06: d001 beq.n 8001b0c { Error_Handler(); 8001b08: f000 f91a bl 8001d40 } sConfigOC.Pulse = 7000; 8001b0c: f641 3358 movw r3, #7000 @ 0x1b58 8001b10: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) 8001b12: 1d3b adds r3, r7, #4 8001b14: 2208 movs r2, #8 8001b16: 4619 mov r1, r3 8001b18: 480e ldr r0, [pc, #56] @ (8001b54 ) 8001b1a: f004 fbf7 bl 800630c 8001b1e: 4603 mov r3, r0 8001b20: 2b00 cmp r3, #0 8001b22: d001 beq.n 8001b28 { Error_Handler(); 8001b24: f000 f90c bl 8001d40 } sConfigOC.Pulse = 8000; 8001b28: f44f 53fa mov.w r3, #8000 @ 0x1f40 8001b2c: 60bb str r3, [r7, #8] if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK) 8001b2e: 1d3b adds r3, r7, #4 8001b30: 220c movs r2, #12 8001b32: 4619 mov r1, r3 8001b34: 4807 ldr r0, [pc, #28] @ (8001b54 ) 8001b36: f004 fbe9 bl 800630c 8001b3a: 4603 mov r3, r0 8001b3c: 2b00 cmp r3, #0 8001b3e: d001 beq.n 8001b44 { Error_Handler(); 8001b40: f000 f8fe bl 8001d40 } /* USER CODE BEGIN TIM4_Init 2 */ /* USER CODE END TIM4_Init 2 */ HAL_TIM_MspPostInit(&htim4); 8001b44: 4803 ldr r0, [pc, #12] @ (8001b54 ) 8001b46: f000 fbcb bl 80022e0 } 8001b4a: bf00 nop 8001b4c: 3738 adds r7, #56 @ 0x38 8001b4e: 46bd mov sp, r7 8001b50: bd80 pop {r7, pc} 8001b52: bf00 nop 8001b54: 20000348 .word 0x20000348 8001b58: 40000800 .word 0x40000800 08001b5c : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 8001b5c: b580 push {r7, lr} 8001b5e: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 8001b60: 4b11 ldr r3, [pc, #68] @ (8001ba8 ) 8001b62: 4a12 ldr r2, [pc, #72] @ (8001bac ) 8001b64: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 8001b66: 4b10 ldr r3, [pc, #64] @ (8001ba8 ) 8001b68: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8001b6c: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8001b6e: 4b0e ldr r3, [pc, #56] @ (8001ba8 ) 8001b70: 2200 movs r2, #0 8001b72: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8001b74: 4b0c ldr r3, [pc, #48] @ (8001ba8 ) 8001b76: 2200 movs r2, #0 8001b78: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8001b7a: 4b0b ldr r3, [pc, #44] @ (8001ba8 ) 8001b7c: 2200 movs r2, #0 8001b7e: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8001b80: 4b09 ldr r3, [pc, #36] @ (8001ba8 ) 8001b82: 220c movs r2, #12 8001b84: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8001b86: 4b08 ldr r3, [pc, #32] @ (8001ba8 ) 8001b88: 2200 movs r2, #0 8001b8a: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8001b8c: 4b06 ldr r3, [pc, #24] @ (8001ba8 ) 8001b8e: 2200 movs r2, #0 8001b90: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8001b92: 4805 ldr r0, [pc, #20] @ (8001ba8 ) 8001b94: f005 f87a bl 8006c8c 8001b98: 4603 mov r3, r0 8001b9a: 2b00 cmp r3, #0 8001b9c: d001 beq.n 8001ba2 { Error_Handler(); 8001b9e: f000 f8cf bl 8001d40 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 8001ba2: bf00 nop 8001ba4: bd80 pop {r7, pc} 8001ba6: bf00 nop 8001ba8: 20000390 .word 0x20000390 8001bac: 40013800 .word 0x40013800 08001bb0 : /** * Enable DMA controller clock */ static void MX_DMA_Init(void) { 8001bb0: b580 push {r7, lr} 8001bb2: b082 sub sp, #8 8001bb4: af00 add r7, sp, #0 /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); 8001bb6: 4b0c ldr r3, [pc, #48] @ (8001be8 ) 8001bb8: 695b ldr r3, [r3, #20] 8001bba: 4a0b ldr r2, [pc, #44] @ (8001be8 ) 8001bbc: f043 0301 orr.w r3, r3, #1 8001bc0: 6153 str r3, [r2, #20] 8001bc2: 4b09 ldr r3, [pc, #36] @ (8001be8 ) 8001bc4: 695b ldr r3, [r3, #20] 8001bc6: f003 0301 and.w r3, r3, #1 8001bca: 607b str r3, [r7, #4] 8001bcc: 687b ldr r3, [r7, #4] /* DMA interrupt init */ /* DMA1_Channel1_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); 8001bce: 2200 movs r2, #0 8001bd0: 2100 movs r1, #0 8001bd2: 200b movs r0, #11 8001bd4: f001 f9cd bl 8002f72 HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 8001bd8: 200b movs r0, #11 8001bda: f001 f9e6 bl 8002faa } 8001bde: bf00 nop 8001be0: 3708 adds r7, #8 8001be2: 46bd mov sp, r7 8001be4: bd80 pop {r7, pc} 8001be6: bf00 nop 8001be8: 40021000 .word 0x40021000 08001bec : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8001bec: b580 push {r7, lr} 8001bee: b088 sub sp, #32 8001bf0: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001bf2: f107 0310 add.w r3, r7, #16 8001bf6: 2200 movs r2, #0 8001bf8: 601a str r2, [r3, #0] 8001bfa: 605a str r2, [r3, #4] 8001bfc: 609a str r2, [r3, #8] 8001bfe: 60da str r2, [r3, #12] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8001c00: 4b4b ldr r3, [pc, #300] @ (8001d30 ) 8001c02: 699b ldr r3, [r3, #24] 8001c04: 4a4a ldr r2, [pc, #296] @ (8001d30 ) 8001c06: f043 0310 orr.w r3, r3, #16 8001c0a: 6193 str r3, [r2, #24] 8001c0c: 4b48 ldr r3, [pc, #288] @ (8001d30 ) 8001c0e: 699b ldr r3, [r3, #24] 8001c10: f003 0310 and.w r3, r3, #16 8001c14: 60fb str r3, [r7, #12] 8001c16: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); 8001c18: 4b45 ldr r3, [pc, #276] @ (8001d30 ) 8001c1a: 699b ldr r3, [r3, #24] 8001c1c: 4a44 ldr r2, [pc, #272] @ (8001d30 ) 8001c1e: f043 0320 orr.w r3, r3, #32 8001c22: 6193 str r3, [r2, #24] 8001c24: 4b42 ldr r3, [pc, #264] @ (8001d30 ) 8001c26: 699b ldr r3, [r3, #24] 8001c28: f003 0320 and.w r3, r3, #32 8001c2c: 60bb str r3, [r7, #8] 8001c2e: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c30: 4b3f ldr r3, [pc, #252] @ (8001d30 ) 8001c32: 699b ldr r3, [r3, #24] 8001c34: 4a3e ldr r2, [pc, #248] @ (8001d30 ) 8001c36: f043 0304 orr.w r3, r3, #4 8001c3a: 6193 str r3, [r2, #24] 8001c3c: 4b3c ldr r3, [pc, #240] @ (8001d30 ) 8001c3e: 699b ldr r3, [r3, #24] 8001c40: f003 0304 and.w r3, r3, #4 8001c44: 607b str r3, [r7, #4] 8001c46: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001c48: 4b39 ldr r3, [pc, #228] @ (8001d30 ) 8001c4a: 699b ldr r3, [r3, #24] 8001c4c: 4a38 ldr r2, [pc, #224] @ (8001d30 ) 8001c4e: f043 0308 orr.w r3, r3, #8 8001c52: 6193 str r3, [r2, #24] 8001c54: 4b36 ldr r3, [pc, #216] @ (8001d30 ) 8001c56: 699b ldr r3, [r3, #24] 8001c58: f003 0308 and.w r3, r3, #8 8001c5c: 603b str r3, [r7, #0] 8001c5e: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET); 8001c60: 2200 movs r2, #0 8001c62: f44f 5100 mov.w r1, #8192 @ 0x2000 8001c66: 4833 ldr r0, [pc, #204] @ (8001d34 ) 8001c68: f001 ff49 bl 8003afe /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin 8001c6c: 2200 movs r2, #0 8001c6e: f640 413e movw r1, #3134 @ 0xc3e 8001c72: 4831 ldr r0, [pc, #196] @ (8001d38 ) 8001c74: f001 ff43 bl 8003afe |EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET); 8001c78: 2200 movs r2, #0 8001c7a: f44f 4101 mov.w r1, #33024 @ 0x8100 8001c7e: 482f ldr r0, [pc, #188] @ (8001d3c ) 8001c80: f001 ff3d bl 8003afe /*Configure GPIO pin : LED2_Pin */ GPIO_InitStruct.Pin = LED2_Pin; 8001c84: f44f 5300 mov.w r3, #8192 @ 0x2000 8001c88: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001c8a: 2301 movs r3, #1 8001c8c: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001c8e: 2300 movs r3, #0 8001c90: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001c92: 2302 movs r3, #2 8001c94: 61fb str r3, [r7, #28] HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct); 8001c96: f107 0310 add.w r3, r7, #16 8001c9a: 4619 mov r1, r3 8001c9c: 4825 ldr r0, [pc, #148] @ (8001d34 ) 8001c9e: f001 fd93 bl 80037c8 /*Configure GPIO pins : P1_Pin P2_Pin */ GPIO_InitStruct.Pin = P1_Pin|P2_Pin; 8001ca2: f44f 4340 mov.w r3, #49152 @ 0xc000 8001ca6: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001ca8: 2300 movs r3, #0 8001caa: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001cac: 2300 movs r3, #0 8001cae: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8001cb0: f107 0310 add.w r3, r7, #16 8001cb4: 4619 mov r1, r3 8001cb6: 481f ldr r0, [pc, #124] @ (8001d34 ) 8001cb8: f001 fd86 bl 80037c8 /*Configure GPIO pin : AIN1_Pin */ GPIO_InitStruct.Pin = AIN1_Pin; 8001cbc: 2310 movs r3, #16 8001cbe: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8001cc0: 2303 movs r3, #3 8001cc2: 617b str r3, [r7, #20] HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct); 8001cc4: f107 0310 add.w r3, r7, #16 8001cc8: 4619 mov r1, r3 8001cca: 481c ldr r0, [pc, #112] @ (8001d3c ) 8001ccc: f001 fd7c bl 80037c8 /*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin EXP1_Pin EXP2_Pin EXP3_Pin */ GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin 8001cd0: f640 433e movw r3, #3134 @ 0xc3e 8001cd4: 613b str r3, [r7, #16] |EXP1_Pin|EXP2_Pin|EXP3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001cd6: 2301 movs r3, #1 8001cd8: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001cda: 2300 movs r3, #0 8001cdc: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001cde: 2302 movs r3, #2 8001ce0: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001ce2: f107 0310 add.w r3, r7, #16 8001ce6: 4619 mov r1, r3 8001ce8: 4813 ldr r0, [pc, #76] @ (8001d38 ) 8001cea: f001 fd6d bl 80037c8 /*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */ GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin; 8001cee: f44f 4370 mov.w r3, #61440 @ 0xf000 8001cf2: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001cf4: 2300 movs r3, #0 8001cf6: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001cf8: 2300 movs r3, #0 8001cfa: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001cfc: f107 0310 add.w r3, r7, #16 8001d00: 4619 mov r1, r3 8001d02: 480d ldr r0, [pc, #52] @ (8001d38 ) 8001d04: f001 fd60 bl 80037c8 /*Configure GPIO pins : BUZ_Pin LED1_Pin */ GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin; 8001d08: f44f 4301 mov.w r3, #33024 @ 0x8100 8001d0c: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001d0e: 2301 movs r3, #1 8001d10: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001d12: 2300 movs r3, #0 8001d14: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001d16: 2302 movs r3, #2 8001d18: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001d1a: f107 0310 add.w r3, r7, #16 8001d1e: 4619 mov r1, r3 8001d20: 4806 ldr r0, [pc, #24] @ (8001d3c ) 8001d22: f001 fd51 bl 80037c8 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 8001d26: bf00 nop 8001d28: 3720 adds r7, #32 8001d2a: 46bd mov sp, r7 8001d2c: bd80 pop {r7, pc} 8001d2e: bf00 nop 8001d30: 40021000 .word 0x40021000 8001d34: 40011000 .word 0x40011000 8001d38: 40010c00 .word 0x40010c00 8001d3c: 40010800 .word 0x40010800 08001d40 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001d40: b480 push {r7} 8001d42: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8001d44: b672 cpsid i } 8001d46: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8001d48: bf00 nop 8001d4a: e7fd b.n 8001d48 08001d4c : extern TIM_HandleTypeDef htim2; extern TIM_HandleTypeDef htim3; extern TIM_HandleTypeDef htim4; bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel) { 8001d4c: b580 push {r7, lr} 8001d4e: b084 sub sp, #16 8001d50: af00 add r7, sp, #0 8001d52: 6078 str r0, [r7, #4] 8001d54: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel); 8001d56: 6839 ldr r1, [r7, #0] 8001d58: 6878 ldr r0, [r7, #4] 8001d5a: f004 fc60 bl 800661e 8001d5e: 4603 mov r3, r0 8001d60: 73fb strb r3, [r7, #15] return (chState == HAL_TIM_CHANNEL_STATE_BUSY); 8001d62: 7bfb ldrb r3, [r7, #15] 8001d64: 2b02 cmp r3, #2 8001d66: bf0c ite eq 8001d68: 2301 moveq r3, #1 8001d6a: 2300 movne r3, #0 8001d6c: b2db uxtb r3, r3 } 8001d6e: 4618 mov r0, r3 8001d70: 3710 adds r7, #16 8001d72: 46bd mov sp, r7 8001d74: bd80 pop {r7, pc} 08001d76 : void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){ 8001d76: b580 push {r7, lr} 8001d78: b082 sub sp, #8 8001d7a: af00 add r7, sp, #0 8001d7c: 6078 str r0, [r7, #4] 8001d7e: 6039 str r1, [r7, #0] HAL_TIM_PWM_Stop(htim, Channel); 8001d80: 6839 ldr r1, [r7, #0] 8001d82: 6878 ldr r0, [r7, #4] 8001d84: f004 fa5e bl 8006244 } 8001d88: bf00 nop 8001d8a: 3708 adds r7, #8 8001d8c: 46bd mov sp, r7 8001d8e: bd80 pop {r7, pc} 08001d90 : void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 8001d90: b580 push {r7, lr} 8001d92: b084 sub sp, #16 8001d94: af00 add r7, sp, #0 8001d96: 60f8 str r0, [r7, #12] 8001d98: 60b9 str r1, [r7, #8] 8001d9a: 4613 mov r3, r2 8001d9c: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8001d9e: 68bb ldr r3, [r7, #8] 8001da0: 2b00 cmp r3, #0 8001da2: d104 bne.n 8001dae 8001da4: 68fb ldr r3, [r7, #12] 8001da6: 681b ldr r3, [r3, #0] 8001da8: 88fa ldrh r2, [r7, #6] 8001daa: 635a str r2, [r3, #52] @ 0x34 8001dac: e013 b.n 8001dd6 8001dae: 68bb ldr r3, [r7, #8] 8001db0: 2b04 cmp r3, #4 8001db2: d104 bne.n 8001dbe 8001db4: 68fb ldr r3, [r7, #12] 8001db6: 681a ldr r2, [r3, #0] 8001db8: 88fb ldrh r3, [r7, #6] 8001dba: 6393 str r3, [r2, #56] @ 0x38 8001dbc: e00b b.n 8001dd6 8001dbe: 68bb ldr r3, [r7, #8] 8001dc0: 2b08 cmp r3, #8 8001dc2: d104 bne.n 8001dce 8001dc4: 68fb ldr r3, [r7, #12] 8001dc6: 681a ldr r2, [r3, #0] 8001dc8: 88fb ldrh r3, [r7, #6] 8001dca: 63d3 str r3, [r2, #60] @ 0x3c 8001dcc: e003 b.n 8001dd6 8001dce: 68fb ldr r3, [r7, #12] 8001dd0: 681a ldr r2, [r3, #0] 8001dd2: 88fb ldrh r3, [r7, #6] 8001dd4: 6413 str r3, [r2, #64] @ 0x40 HAL_TIM_PWM_Start(htim, Channel); 8001dd6: 68b9 ldr r1, [r7, #8] 8001dd8: 68f8 ldr r0, [r7, #12] 8001dda: f004 f991 bl 8006100 } 8001dde: bf00 nop 8001de0: 3710 adds r7, #16 8001de2: 46bd mov sp, r7 8001de4: bd80 pop {r7, pc} 08001de6 : void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){ 8001de6: b480 push {r7} 8001de8: b085 sub sp, #20 8001dea: af00 add r7, sp, #0 8001dec: 60f8 str r0, [r7, #12] 8001dee: 60b9 str r1, [r7, #8] 8001df0: 4613 mov r3, r2 8001df2: 80fb strh r3, [r7, #6] __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8001df4: 68bb ldr r3, [r7, #8] 8001df6: 2b00 cmp r3, #0 8001df8: d104 bne.n 8001e04 8001dfa: 68fb ldr r3, [r7, #12] 8001dfc: 681b ldr r3, [r3, #0] 8001dfe: 88fa ldrh r2, [r7, #6] 8001e00: 635a str r2, [r3, #52] @ 0x34 } 8001e02: e013 b.n 8001e2c __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8001e04: 68bb ldr r3, [r7, #8] 8001e06: 2b04 cmp r3, #4 8001e08: d104 bne.n 8001e14 8001e0a: 68fb ldr r3, [r7, #12] 8001e0c: 681a ldr r2, [r3, #0] 8001e0e: 88fb ldrh r3, [r7, #6] 8001e10: 6393 str r3, [r2, #56] @ 0x38 } 8001e12: e00b b.n 8001e2c __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8001e14: 68bb ldr r3, [r7, #8] 8001e16: 2b08 cmp r3, #8 8001e18: d104 bne.n 8001e24 8001e1a: 68fb ldr r3, [r7, #12] 8001e1c: 681a ldr r2, [r3, #0] 8001e1e: 88fb ldrh r3, [r7, #6] 8001e20: 63d3 str r3, [r2, #60] @ 0x3c } 8001e22: e003 b.n 8001e2c __HAL_TIM_SET_COMPARE(htim, Channel, pwmval); 8001e24: 68fb ldr r3, [r7, #12] 8001e26: 681a ldr r2, [r3, #0] 8001e28: 88fb ldrh r3, [r7, #6] 8001e2a: 6413 str r3, [r2, #64] @ 0x40 } 8001e2c: bf00 nop 8001e2e: 3714 adds r7, #20 8001e30: 46bd mov sp, r7 8001e32: bc80 pop {r7} 8001e34: 4770 bx lr ... 08001e38 : void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){ 8001e38: b580 push {r7, lr} 8001e3a: b082 sub sp, #8 8001e3c: af00 add r7, sp, #0 8001e3e: 4603 mov r3, r0 8001e40: 71fb strb r3, [r7, #7] 8001e42: 460b mov r3, r1 8001e44: 71bb strb r3, [r7, #6] 8001e46: 4613 mov r3, r2 8001e48: 80bb strh r3, [r7, #4] switch(mot){ 8001e4a: 79fb ldrb r3, [r7, #7] 8001e4c: 3b01 subs r3, #1 8001e4e: 2b03 cmp r3, #3 8001e50: f200 8158 bhi.w 8002104 8001e54: a201 add r2, pc, #4 @ (adr r2, 8001e5c ) 8001e56: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001e5a: bf00 nop 8001e5c: 08001e6d .word 0x08001e6d 8001e60: 08001f0f .word 0x08001f0f 8001e64: 08001fb1 .word 0x08001fb1 8001e68: 0800205b .word 0x0800205b case 1: if(dir==FW){ 8001e6c: 79bb ldrb r3, [r7, #6] 8001e6e: 2b00 cmp r3, #0 8001e70: d126 bne.n 8001ec0 if(pwmval==0){ 8001e72: 88bb ldrh r3, [r7, #4] 8001e74: 2b00 cmp r3, #0 8001e76: d109 bne.n 8001e8c StopMot(timMot1,FWMot1); 8001e78: 2100 movs r1, #0 8001e7a: 48a5 ldr r0, [pc, #660] @ (8002110 ) 8001e7c: f7ff ff7b bl 8001d76 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8001e80: 2200 movs r2, #0 8001e82: 2102 movs r1, #2 8001e84: 48a3 ldr r0, [pc, #652] @ (8002114 ) 8001e86: f001 fe3a bl 8003afe HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); StartMot(timMot1,BWMot1,pwmval); } } break; 8001e8a: e13c b.n 8002106 }else if(IsPwmRunning(timMot1, FWMot1)){ 8001e8c: 2100 movs r1, #0 8001e8e: 48a0 ldr r0, [pc, #640] @ (8002110 ) 8001e90: f7ff ff5c bl 8001d4c 8001e94: 4603 mov r3, r0 8001e96: 2b00 cmp r3, #0 8001e98: d006 beq.n 8001ea8 SetMotPwm(timMot1,FWMot1,pwmval); 8001e9a: 88bb ldrh r3, [r7, #4] 8001e9c: 461a mov r2, r3 8001e9e: 2100 movs r1, #0 8001ea0: 489b ldr r0, [pc, #620] @ (8002110 ) 8001ea2: f7ff ffa0 bl 8001de6 break; 8001ea6: e12e b.n 8002106 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 8001ea8: 2201 movs r2, #1 8001eaa: 2102 movs r1, #2 8001eac: 4899 ldr r0, [pc, #612] @ (8002114 ) 8001eae: f001 fe26 bl 8003afe StartMot(timMot1,FWMot1,pwmval); 8001eb2: 88bb ldrh r3, [r7, #4] 8001eb4: 461a mov r2, r3 8001eb6: 2100 movs r1, #0 8001eb8: 4895 ldr r0, [pc, #596] @ (8002110 ) 8001eba: f7ff ff69 bl 8001d90 break; 8001ebe: e122 b.n 8002106 if(pwmval==0){ 8001ec0: 88bb ldrh r3, [r7, #4] 8001ec2: 2b00 cmp r3, #0 8001ec4: d109 bne.n 8001eda StopMot(timMot1,BWMot1); 8001ec6: 2104 movs r1, #4 8001ec8: 4891 ldr r0, [pc, #580] @ (8002110 ) 8001eca: f7ff ff54 bl 8001d76 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET); 8001ece: 2200 movs r2, #0 8001ed0: 2102 movs r1, #2 8001ed2: 4890 ldr r0, [pc, #576] @ (8002114 ) 8001ed4: f001 fe13 bl 8003afe break; 8001ed8: e115 b.n 8002106 }else if(IsPwmRunning(timMot1, BWMot1)){ 8001eda: 2104 movs r1, #4 8001edc: 488c ldr r0, [pc, #560] @ (8002110 ) 8001ede: f7ff ff35 bl 8001d4c 8001ee2: 4603 mov r3, r0 8001ee4: 2b00 cmp r3, #0 8001ee6: d006 beq.n 8001ef6 SetMotPwm(timMot1,BWMot1,pwmval); 8001ee8: 88bb ldrh r3, [r7, #4] 8001eea: 461a mov r2, r3 8001eec: 2104 movs r1, #4 8001eee: 4888 ldr r0, [pc, #544] @ (8002110 ) 8001ef0: f7ff ff79 bl 8001de6 break; 8001ef4: e107 b.n 8002106 HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET); 8001ef6: 2201 movs r2, #1 8001ef8: 2102 movs r1, #2 8001efa: 4886 ldr r0, [pc, #536] @ (8002114 ) 8001efc: f001 fdff bl 8003afe StartMot(timMot1,BWMot1,pwmval); 8001f00: 88bb ldrh r3, [r7, #4] 8001f02: 461a mov r2, r3 8001f04: 2104 movs r1, #4 8001f06: 4882 ldr r0, [pc, #520] @ (8002110 ) 8001f08: f7ff ff42 bl 8001d90 break; 8001f0c: e0fb b.n 8002106 case 2: if(dir==FW){ 8001f0e: 79bb ldrb r3, [r7, #6] 8001f10: 2b00 cmp r3, #0 8001f12: d126 bne.n 8001f62 if(pwmval==0){ 8001f14: 88bb ldrh r3, [r7, #4] 8001f16: 2b00 cmp r3, #0 8001f18: d109 bne.n 8001f2e StopMot(timMot2,FWMot2); 8001f1a: 2108 movs r1, #8 8001f1c: 487c ldr r0, [pc, #496] @ (8002110 ) 8001f1e: f7ff ff2a bl 8001d76 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 8001f22: 2200 movs r2, #0 8001f24: 2104 movs r1, #4 8001f26: 487b ldr r0, [pc, #492] @ (8002114 ) 8001f28: f001 fde9 bl 8003afe }else{ HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); StartMot(timMot2,BWMot2,pwmval); } } break; 8001f2c: e0eb b.n 8002106 }else if(IsPwmRunning(timMot2, FWMot2)){ 8001f2e: 2108 movs r1, #8 8001f30: 4877 ldr r0, [pc, #476] @ (8002110 ) 8001f32: f7ff ff0b bl 8001d4c 8001f36: 4603 mov r3, r0 8001f38: 2b00 cmp r3, #0 8001f3a: d006 beq.n 8001f4a SetMotPwm(timMot2,FWMot2,pwmval); 8001f3c: 88bb ldrh r3, [r7, #4] 8001f3e: 461a mov r2, r3 8001f40: 2108 movs r1, #8 8001f42: 4873 ldr r0, [pc, #460] @ (8002110 ) 8001f44: f7ff ff4f bl 8001de6 break; 8001f48: e0dd b.n 8002106 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8001f4a: 2201 movs r2, #1 8001f4c: 2104 movs r1, #4 8001f4e: 4871 ldr r0, [pc, #452] @ (8002114 ) 8001f50: f001 fdd5 bl 8003afe StartMot(timMot2,FWMot2,pwmval); 8001f54: 88bb ldrh r3, [r7, #4] 8001f56: 461a mov r2, r3 8001f58: 2108 movs r1, #8 8001f5a: 486d ldr r0, [pc, #436] @ (8002110 ) 8001f5c: f7ff ff18 bl 8001d90 break; 8001f60: e0d1 b.n 8002106 if(pwmval==0){ 8001f62: 88bb ldrh r3, [r7, #4] 8001f64: 2b00 cmp r3, #0 8001f66: d109 bne.n 8001f7c StopMot(timMot2,BWMot2); 8001f68: 210c movs r1, #12 8001f6a: 4869 ldr r0, [pc, #420] @ (8002110 ) 8001f6c: f7ff ff03 bl 8001d76 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET); 8001f70: 2200 movs r2, #0 8001f72: 2104 movs r1, #4 8001f74: 4867 ldr r0, [pc, #412] @ (8002114 ) 8001f76: f001 fdc2 bl 8003afe break; 8001f7a: e0c4 b.n 8002106 }else if(IsPwmRunning(timMot2, BWMot2)){ 8001f7c: 210c movs r1, #12 8001f7e: 4864 ldr r0, [pc, #400] @ (8002110 ) 8001f80: f7ff fee4 bl 8001d4c 8001f84: 4603 mov r3, r0 8001f86: 2b00 cmp r3, #0 8001f88: d006 beq.n 8001f98 SetMotPwm(timMot2,BWMot2,pwmval); 8001f8a: 88bb ldrh r3, [r7, #4] 8001f8c: 461a mov r2, r3 8001f8e: 210c movs r1, #12 8001f90: 485f ldr r0, [pc, #380] @ (8002110 ) 8001f92: f7ff ff28 bl 8001de6 break; 8001f96: e0b6 b.n 8002106 HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET); 8001f98: 2201 movs r2, #1 8001f9a: 2104 movs r1, #4 8001f9c: 485d ldr r0, [pc, #372] @ (8002114 ) 8001f9e: f001 fdae bl 8003afe StartMot(timMot2,BWMot2,pwmval); 8001fa2: 88bb ldrh r3, [r7, #4] 8001fa4: 461a mov r2, r3 8001fa6: 210c movs r1, #12 8001fa8: 4859 ldr r0, [pc, #356] @ (8002110 ) 8001faa: f7ff fef1 bl 8001d90 break; 8001fae: e0aa b.n 8002106 case 3: if(dir==FW){ 8001fb0: 79bb ldrb r3, [r7, #6] 8001fb2: 2b00 cmp r3, #0 8001fb4: d128 bne.n 8002008 if(pwmval==0){ 8001fb6: 88bb ldrh r3, [r7, #4] 8001fb8: 2b00 cmp r3, #0 8001fba: d10a bne.n 8001fd2 StopMot(timMot3,FWMot3); 8001fbc: 2100 movs r1, #0 8001fbe: 4856 ldr r0, [pc, #344] @ (8002118 ) 8001fc0: f7ff fed9 bl 8001d76 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8001fc4: 2200 movs r2, #0 8001fc6: f44f 6180 mov.w r1, #1024 @ 0x400 8001fca: 4852 ldr r0, [pc, #328] @ (8002114 ) 8001fcc: f001 fd97 bl 8003afe }else{ HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); StartMot(timMot3,BWMot3,pwmval); } } break; 8001fd0: e099 b.n 8002106 }else if(IsPwmRunning(timMot3, FWMot3)){ 8001fd2: 2100 movs r1, #0 8001fd4: 4850 ldr r0, [pc, #320] @ (8002118 ) 8001fd6: f7ff feb9 bl 8001d4c 8001fda: 4603 mov r3, r0 8001fdc: 2b00 cmp r3, #0 8001fde: d006 beq.n 8001fee SetMotPwm(timMot3,FWMot3,pwmval); 8001fe0: 88bb ldrh r3, [r7, #4] 8001fe2: 461a mov r2, r3 8001fe4: 2100 movs r1, #0 8001fe6: 484c ldr r0, [pc, #304] @ (8002118 ) 8001fe8: f7ff fefd bl 8001de6 break; 8001fec: e08b b.n 8002106 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8001fee: 2201 movs r2, #1 8001ff0: f44f 6180 mov.w r1, #1024 @ 0x400 8001ff4: 4847 ldr r0, [pc, #284] @ (8002114 ) 8001ff6: f001 fd82 bl 8003afe StartMot(timMot3,FWMot3,pwmval); 8001ffa: 88bb ldrh r3, [r7, #4] 8001ffc: 461a mov r2, r3 8001ffe: 2100 movs r1, #0 8002000: 4845 ldr r0, [pc, #276] @ (8002118 ) 8002002: f7ff fec5 bl 8001d90 break; 8002006: e07e b.n 8002106 if(pwmval==0){ 8002008: 88bb ldrh r3, [r7, #4] 800200a: 2b00 cmp r3, #0 800200c: d10a bne.n 8002024 StopMot(timMot3,BWMot3); 800200e: 2104 movs r1, #4 8002010: 4841 ldr r0, [pc, #260] @ (8002118 ) 8002012: f7ff feb0 bl 8001d76 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET); 8002016: 2200 movs r2, #0 8002018: f44f 6180 mov.w r1, #1024 @ 0x400 800201c: 483d ldr r0, [pc, #244] @ (8002114 ) 800201e: f001 fd6e bl 8003afe break; 8002022: e070 b.n 8002106 }else if(IsPwmRunning(timMot3, BWMot3)){ 8002024: 2104 movs r1, #4 8002026: 483c ldr r0, [pc, #240] @ (8002118 ) 8002028: f7ff fe90 bl 8001d4c 800202c: 4603 mov r3, r0 800202e: 2b00 cmp r3, #0 8002030: d006 beq.n 8002040 SetMotPwm(timMot3,BWMot3,pwmval); 8002032: 88bb ldrh r3, [r7, #4] 8002034: 461a mov r2, r3 8002036: 2104 movs r1, #4 8002038: 4837 ldr r0, [pc, #220] @ (8002118 ) 800203a: f7ff fed4 bl 8001de6 break; 800203e: e062 b.n 8002106 HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET); 8002040: 2201 movs r2, #1 8002042: f44f 6180 mov.w r1, #1024 @ 0x400 8002046: 4833 ldr r0, [pc, #204] @ (8002114 ) 8002048: f001 fd59 bl 8003afe StartMot(timMot3,BWMot3,pwmval); 800204c: 88bb ldrh r3, [r7, #4] 800204e: 461a mov r2, r3 8002050: 2104 movs r1, #4 8002052: 4831 ldr r0, [pc, #196] @ (8002118 ) 8002054: f7ff fe9c bl 8001d90 break; 8002058: e055 b.n 8002106 case 4: if(dir==FW){ 800205a: 79bb ldrb r3, [r7, #6] 800205c: 2b00 cmp r3, #0 800205e: d128 bne.n 80020b2 if(pwmval==0){ 8002060: 88bb ldrh r3, [r7, #4] 8002062: 2b00 cmp r3, #0 8002064: d10a bne.n 800207c StopMot(timMot4,FWMot4); 8002066: 2108 movs r1, #8 8002068: 482b ldr r0, [pc, #172] @ (8002118 ) 800206a: f7ff fe84 bl 8001d76 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 800206e: 2200 movs r2, #0 8002070: f44f 6100 mov.w r1, #2048 @ 0x800 8002074: 4827 ldr r0, [pc, #156] @ (8002114 ) 8002076: f001 fd42 bl 8003afe }else{ HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); StartMot(timMot4,BWMot4,pwmval); } } break; 800207a: e044 b.n 8002106 }else if(IsPwmRunning(timMot4, FWMot4)){ 800207c: 2108 movs r1, #8 800207e: 4826 ldr r0, [pc, #152] @ (8002118 ) 8002080: f7ff fe64 bl 8001d4c 8002084: 4603 mov r3, r0 8002086: 2b00 cmp r3, #0 8002088: d006 beq.n 8002098 SetMotPwm(timMot4,FWMot4,pwmval); 800208a: 88bb ldrh r3, [r7, #4] 800208c: 461a mov r2, r3 800208e: 2108 movs r1, #8 8002090: 4821 ldr r0, [pc, #132] @ (8002118 ) 8002092: f7ff fea8 bl 8001de6 break; 8002096: e036 b.n 8002106 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 8002098: 2201 movs r2, #1 800209a: f44f 6100 mov.w r1, #2048 @ 0x800 800209e: 481d ldr r0, [pc, #116] @ (8002114 ) 80020a0: f001 fd2d bl 8003afe StartMot(timMot4,FWMot4,pwmval); 80020a4: 88bb ldrh r3, [r7, #4] 80020a6: 461a mov r2, r3 80020a8: 2108 movs r1, #8 80020aa: 481b ldr r0, [pc, #108] @ (8002118 ) 80020ac: f7ff fe70 bl 8001d90 break; 80020b0: e029 b.n 8002106 if(pwmval==0){ 80020b2: 88bb ldrh r3, [r7, #4] 80020b4: 2b00 cmp r3, #0 80020b6: d10a bne.n 80020ce StopMot(timMot4,BWMot4); 80020b8: 210c movs r1, #12 80020ba: 4817 ldr r0, [pc, #92] @ (8002118 ) 80020bc: f7ff fe5b bl 8001d76 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET); 80020c0: 2200 movs r2, #0 80020c2: f44f 6100 mov.w r1, #2048 @ 0x800 80020c6: 4813 ldr r0, [pc, #76] @ (8002114 ) 80020c8: f001 fd19 bl 8003afe break; 80020cc: e01b b.n 8002106 }else if(IsPwmRunning(timMot4, BWMot4)){ 80020ce: 210c movs r1, #12 80020d0: 4811 ldr r0, [pc, #68] @ (8002118 ) 80020d2: f7ff fe3b bl 8001d4c 80020d6: 4603 mov r3, r0 80020d8: 2b00 cmp r3, #0 80020da: d006 beq.n 80020ea SetMotPwm(timMot4,BWMot4,pwmval); 80020dc: 88bb ldrh r3, [r7, #4] 80020de: 461a mov r2, r3 80020e0: 210c movs r1, #12 80020e2: 480d ldr r0, [pc, #52] @ (8002118 ) 80020e4: f7ff fe7f bl 8001de6 break; 80020e8: e00d b.n 8002106 HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET); 80020ea: 2201 movs r2, #1 80020ec: f44f 6100 mov.w r1, #2048 @ 0x800 80020f0: 4808 ldr r0, [pc, #32] @ (8002114 ) 80020f2: f001 fd04 bl 8003afe StartMot(timMot4,BWMot4,pwmval); 80020f6: 88bb ldrh r3, [r7, #4] 80020f8: 461a mov r2, r3 80020fa: 210c movs r1, #12 80020fc: 4806 ldr r0, [pc, #24] @ (8002118 ) 80020fe: f7ff fe47 bl 8001d90 break; 8002102: e000 b.n 8002106 default: break; 8002104: bf00 nop } } 8002106: bf00 nop 8002108: 3708 adds r7, #8 800210a: 46bd mov sp, r7 800210c: bd80 pop {r7, pc} 800210e: bf00 nop 8002110: 20000300 .word 0x20000300 8002114: 40010c00 .word 0x40010c00 8002118: 20000348 .word 0x20000348 0800211c : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 800211c: b480 push {r7} 800211e: b085 sub sp, #20 8002120: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 8002122: 4b15 ldr r3, [pc, #84] @ (8002178 ) 8002124: 699b ldr r3, [r3, #24] 8002126: 4a14 ldr r2, [pc, #80] @ (8002178 ) 8002128: f043 0301 orr.w r3, r3, #1 800212c: 6193 str r3, [r2, #24] 800212e: 4b12 ldr r3, [pc, #72] @ (8002178 ) 8002130: 699b ldr r3, [r3, #24] 8002132: f003 0301 and.w r3, r3, #1 8002136: 60bb str r3, [r7, #8] 8002138: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 800213a: 4b0f ldr r3, [pc, #60] @ (8002178 ) 800213c: 69db ldr r3, [r3, #28] 800213e: 4a0e ldr r2, [pc, #56] @ (8002178 ) 8002140: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8002144: 61d3 str r3, [r2, #28] 8002146: 4b0c ldr r3, [pc, #48] @ (8002178 ) 8002148: 69db ldr r3, [r3, #28] 800214a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800214e: 607b str r3, [r7, #4] 8002150: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 8002152: 4b0a ldr r3, [pc, #40] @ (800217c ) 8002154: 685b ldr r3, [r3, #4] 8002156: 60fb str r3, [r7, #12] 8002158: 68fb ldr r3, [r7, #12] 800215a: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 800215e: 60fb str r3, [r7, #12] 8002160: 68fb ldr r3, [r7, #12] 8002162: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8002166: 60fb str r3, [r7, #12] 8002168: 4a04 ldr r2, [pc, #16] @ (800217c ) 800216a: 68fb ldr r3, [r7, #12] 800216c: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 800216e: bf00 nop 8002170: 3714 adds r7, #20 8002172: 46bd mov sp, r7 8002174: bc80 pop {r7} 8002176: 4770 bx lr 8002178: 40021000 .word 0x40021000 800217c: 40010000 .word 0x40010000 08002180 : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { 8002180: b580 push {r7, lr} 8002182: b08a sub sp, #40 @ 0x28 8002184: af00 add r7, sp, #0 8002186: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002188: f107 0318 add.w r3, r7, #24 800218c: 2200 movs r2, #0 800218e: 601a str r2, [r3, #0] 8002190: 605a str r2, [r3, #4] 8002192: 609a str r2, [r3, #8] 8002194: 60da str r2, [r3, #12] if(hadc->Instance==ADC1) 8002196: 687b ldr r3, [r7, #4] 8002198: 681b ldr r3, [r3, #0] 800219a: 4a33 ldr r2, [pc, #204] @ (8002268 ) 800219c: 4293 cmp r3, r2 800219e: d15f bne.n 8002260 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); 80021a0: 4b32 ldr r3, [pc, #200] @ (800226c ) 80021a2: 699b ldr r3, [r3, #24] 80021a4: 4a31 ldr r2, [pc, #196] @ (800226c ) 80021a6: f443 7300 orr.w r3, r3, #512 @ 0x200 80021aa: 6193 str r3, [r2, #24] 80021ac: 4b2f ldr r3, [pc, #188] @ (800226c ) 80021ae: 699b ldr r3, [r3, #24] 80021b0: f403 7300 and.w r3, r3, #512 @ 0x200 80021b4: 617b str r3, [r7, #20] 80021b6: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 80021b8: 4b2c ldr r3, [pc, #176] @ (800226c ) 80021ba: 699b ldr r3, [r3, #24] 80021bc: 4a2b ldr r2, [pc, #172] @ (800226c ) 80021be: f043 0304 orr.w r3, r3, #4 80021c2: 6193 str r3, [r2, #24] 80021c4: 4b29 ldr r3, [pc, #164] @ (800226c ) 80021c6: 699b ldr r3, [r3, #24] 80021c8: f003 0304 and.w r3, r3, #4 80021cc: 613b str r3, [r7, #16] 80021ce: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 80021d0: 4b26 ldr r3, [pc, #152] @ (800226c ) 80021d2: 699b ldr r3, [r3, #24] 80021d4: 4a25 ldr r2, [pc, #148] @ (800226c ) 80021d6: f043 0308 orr.w r3, r3, #8 80021da: 6193 str r3, [r2, #24] 80021dc: 4b23 ldr r3, [pc, #140] @ (800226c ) 80021de: 699b ldr r3, [r3, #24] 80021e0: f003 0308 and.w r3, r3, #8 80021e4: 60fb str r3, [r7, #12] 80021e6: 68fb ldr r3, [r7, #12] PA5 ------> ADC1_IN5 PA6 ------> ADC1_IN6 PA7 ------> ADC1_IN7 PB0 ------> ADC1_IN8 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin; 80021e8: 23f0 movs r3, #240 @ 0xf0 80021ea: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 80021ec: 2303 movs r3, #3 80021ee: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80021f0: f107 0318 add.w r3, r7, #24 80021f4: 4619 mov r1, r3 80021f6: 481e ldr r0, [pc, #120] @ (8002270 ) 80021f8: f001 fae6 bl 80037c8 GPIO_InitStruct.Pin = ANEM_Pin; 80021fc: 2301 movs r3, #1 80021fe: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8002200: 2303 movs r3, #3 8002202: 61fb str r3, [r7, #28] HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct); 8002204: f107 0318 add.w r3, r7, #24 8002208: 4619 mov r1, r3 800220a: 481a ldr r0, [pc, #104] @ (8002274 ) 800220c: f001 fadc bl 80037c8 /* ADC1 DMA Init */ /* ADC1 Init */ hdma_adc1.Instance = DMA1_Channel1; 8002210: 4b19 ldr r3, [pc, #100] @ (8002278 ) 8002212: 4a1a ldr r2, [pc, #104] @ (800227c ) 8002214: 601a str r2, [r3, #0] hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; 8002216: 4b18 ldr r3, [pc, #96] @ (8002278 ) 8002218: 2200 movs r2, #0 800221a: 605a str r2, [r3, #4] hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; 800221c: 4b16 ldr r3, [pc, #88] @ (8002278 ) 800221e: 2200 movs r2, #0 8002220: 609a str r2, [r3, #8] hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; 8002222: 4b15 ldr r3, [pc, #84] @ (8002278 ) 8002224: 2280 movs r2, #128 @ 0x80 8002226: 60da str r2, [r3, #12] hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; 8002228: 4b13 ldr r3, [pc, #76] @ (8002278 ) 800222a: f44f 7280 mov.w r2, #256 @ 0x100 800222e: 611a str r2, [r3, #16] hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; 8002230: 4b11 ldr r3, [pc, #68] @ (8002278 ) 8002232: f44f 6280 mov.w r2, #1024 @ 0x400 8002236: 615a str r2, [r3, #20] hdma_adc1.Init.Mode = DMA_CIRCULAR; 8002238: 4b0f ldr r3, [pc, #60] @ (8002278 ) 800223a: 2220 movs r2, #32 800223c: 619a str r2, [r3, #24] hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; 800223e: 4b0e ldr r3, [pc, #56] @ (8002278 ) 8002240: 2200 movs r2, #0 8002242: 61da str r2, [r3, #28] if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) 8002244: 480c ldr r0, [pc, #48] @ (8002278 ) 8002246: f000 fed1 bl 8002fec 800224a: 4603 mov r3, r0 800224c: 2b00 cmp r3, #0 800224e: d001 beq.n 8002254 { Error_Handler(); 8002250: f7ff fd76 bl 8001d40 } __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1); 8002254: 687b ldr r3, [r7, #4] 8002256: 4a08 ldr r2, [pc, #32] @ (8002278 ) 8002258: 621a str r2, [r3, #32] 800225a: 4a07 ldr r2, [pc, #28] @ (8002278 ) 800225c: 687b ldr r3, [r7, #4] 800225e: 6253 str r3, [r2, #36] @ 0x24 /* USER CODE END ADC1_MspInit 1 */ } } 8002260: bf00 nop 8002262: 3728 adds r7, #40 @ 0x28 8002264: 46bd mov sp, r7 8002266: bd80 pop {r7, pc} 8002268: 40012400 .word 0x40012400 800226c: 40021000 .word 0x40021000 8002270: 40010800 .word 0x40010800 8002274: 40010c00 .word 0x40010c00 8002278: 200002bc .word 0x200002bc 800227c: 40020008 .word 0x40020008 08002280 : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 8002280: b480 push {r7} 8002282: b085 sub sp, #20 8002284: af00 add r7, sp, #0 8002286: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM2) 8002288: 687b ldr r3, [r7, #4] 800228a: 681b ldr r3, [r3, #0] 800228c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8002290: d10c bne.n 80022ac { /* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE END TIM2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM2_CLK_ENABLE(); 8002292: 4b11 ldr r3, [pc, #68] @ (80022d8 ) 8002294: 69db ldr r3, [r3, #28] 8002296: 4a10 ldr r2, [pc, #64] @ (80022d8 ) 8002298: f043 0301 orr.w r3, r3, #1 800229c: 61d3 str r3, [r2, #28] 800229e: 4b0e ldr r3, [pc, #56] @ (80022d8 ) 80022a0: 69db ldr r3, [r3, #28] 80022a2: f003 0301 and.w r3, r3, #1 80022a6: 60fb str r3, [r7, #12] 80022a8: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */ } } 80022aa: e010 b.n 80022ce else if(htim_base->Instance==TIM4) 80022ac: 687b ldr r3, [r7, #4] 80022ae: 681b ldr r3, [r3, #0] 80022b0: 4a0a ldr r2, [pc, #40] @ (80022dc ) 80022b2: 4293 cmp r3, r2 80022b4: d10b bne.n 80022ce __HAL_RCC_TIM4_CLK_ENABLE(); 80022b6: 4b08 ldr r3, [pc, #32] @ (80022d8 ) 80022b8: 69db ldr r3, [r3, #28] 80022ba: 4a07 ldr r2, [pc, #28] @ (80022d8 ) 80022bc: f043 0304 orr.w r3, r3, #4 80022c0: 61d3 str r3, [r2, #28] 80022c2: 4b05 ldr r3, [pc, #20] @ (80022d8 ) 80022c4: 69db ldr r3, [r3, #28] 80022c6: f003 0304 and.w r3, r3, #4 80022ca: 60bb str r3, [r7, #8] 80022cc: 68bb ldr r3, [r7, #8] } 80022ce: bf00 nop 80022d0: 3714 adds r7, #20 80022d2: 46bd mov sp, r7 80022d4: bc80 pop {r7} 80022d6: 4770 bx lr 80022d8: 40021000 .word 0x40021000 80022dc: 40000800 .word 0x40000800 080022e0 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 80022e0: b580 push {r7, lr} 80022e2: b088 sub sp, #32 80022e4: af00 add r7, sp, #0 80022e6: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80022e8: f107 0310 add.w r3, r7, #16 80022ec: 2200 movs r2, #0 80022ee: 601a str r2, [r3, #0] 80022f0: 605a str r2, [r3, #4] 80022f2: 609a str r2, [r3, #8] 80022f4: 60da str r2, [r3, #12] if(htim->Instance==TIM2) 80022f6: 687b ldr r3, [r7, #4] 80022f8: 681b ldr r3, [r3, #0] 80022fa: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80022fe: d118 bne.n 8002332 { /* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8002300: 4b1d ldr r3, [pc, #116] @ (8002378 ) 8002302: 699b ldr r3, [r3, #24] 8002304: 4a1c ldr r2, [pc, #112] @ (8002378 ) 8002306: f043 0304 orr.w r3, r3, #4 800230a: 6193 str r3, [r2, #24] 800230c: 4b1a ldr r3, [pc, #104] @ (8002378 ) 800230e: 699b ldr r3, [r3, #24] 8002310: f003 0304 and.w r3, r3, #4 8002314: 60fb str r3, [r7, #12] 8002316: 68fb ldr r3, [r7, #12] PA0-WKUP ------> TIM2_CH1 PA1 ------> TIM2_CH2 PA2 ------> TIM2_CH3 PA3 ------> TIM2_CH4 */ GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin; 8002318: 230f movs r3, #15 800231a: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800231c: 2302 movs r3, #2 800231e: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002320: 2302 movs r3, #2 8002322: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002324: f107 0310 add.w r3, r7, #16 8002328: 4619 mov r1, r3 800232a: 4814 ldr r0, [pc, #80] @ (800237c ) 800232c: f001 fa4c bl 80037c8 /* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */ } } 8002330: e01d b.n 800236e else if(htim->Instance==TIM4) 8002332: 687b ldr r3, [r7, #4] 8002334: 681b ldr r3, [r3, #0] 8002336: 4a12 ldr r2, [pc, #72] @ (8002380 ) 8002338: 4293 cmp r3, r2 800233a: d118 bne.n 800236e __HAL_RCC_GPIOB_CLK_ENABLE(); 800233c: 4b0e ldr r3, [pc, #56] @ (8002378 ) 800233e: 699b ldr r3, [r3, #24] 8002340: 4a0d ldr r2, [pc, #52] @ (8002378 ) 8002342: f043 0308 orr.w r3, r3, #8 8002346: 6193 str r3, [r2, #24] 8002348: 4b0b ldr r3, [pc, #44] @ (8002378 ) 800234a: 699b ldr r3, [r3, #24] 800234c: f003 0308 and.w r3, r3, #8 8002350: 60bb str r3, [r7, #8] 8002352: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin; 8002354: f44f 7370 mov.w r3, #960 @ 0x3c0 8002358: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800235a: 2302 movs r3, #2 800235c: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800235e: 2302 movs r3, #2 8002360: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002362: f107 0310 add.w r3, r7, #16 8002366: 4619 mov r1, r3 8002368: 4806 ldr r0, [pc, #24] @ (8002384 ) 800236a: f001 fa2d bl 80037c8 } 800236e: bf00 nop 8002370: 3720 adds r7, #32 8002372: 46bd mov sp, r7 8002374: bd80 pop {r7, pc} 8002376: bf00 nop 8002378: 40021000 .word 0x40021000 800237c: 40010800 .word 0x40010800 8002380: 40000800 .word 0x40000800 8002384: 40010c00 .word 0x40010c00 08002388 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8002388: b580 push {r7, lr} 800238a: b088 sub sp, #32 800238c: af00 add r7, sp, #0 800238e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002390: f107 0310 add.w r3, r7, #16 8002394: 2200 movs r2, #0 8002396: 601a str r2, [r3, #0] 8002398: 605a str r2, [r3, #4] 800239a: 609a str r2, [r3, #8] 800239c: 60da str r2, [r3, #12] if(huart->Instance==USART1) 800239e: 687b ldr r3, [r7, #4] 80023a0: 681b ldr r3, [r3, #0] 80023a2: 4a1c ldr r2, [pc, #112] @ (8002414 ) 80023a4: 4293 cmp r3, r2 80023a6: d131 bne.n 800240c { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 80023a8: 4b1b ldr r3, [pc, #108] @ (8002418 ) 80023aa: 699b ldr r3, [r3, #24] 80023ac: 4a1a ldr r2, [pc, #104] @ (8002418 ) 80023ae: f443 4380 orr.w r3, r3, #16384 @ 0x4000 80023b2: 6193 str r3, [r2, #24] 80023b4: 4b18 ldr r3, [pc, #96] @ (8002418 ) 80023b6: 699b ldr r3, [r3, #24] 80023b8: f403 4380 and.w r3, r3, #16384 @ 0x4000 80023bc: 60fb str r3, [r7, #12] 80023be: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 80023c0: 4b15 ldr r3, [pc, #84] @ (8002418 ) 80023c2: 699b ldr r3, [r3, #24] 80023c4: 4a14 ldr r2, [pc, #80] @ (8002418 ) 80023c6: f043 0304 orr.w r3, r3, #4 80023ca: 6193 str r3, [r2, #24] 80023cc: 4b12 ldr r3, [pc, #72] @ (8002418 ) 80023ce: 699b ldr r3, [r3, #24] 80023d0: f003 0304 and.w r3, r3, #4 80023d4: 60bb str r3, [r7, #8] 80023d6: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9; 80023d8: f44f 7300 mov.w r3, #512 @ 0x200 80023dc: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80023de: 2302 movs r3, #2 80023e0: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 80023e2: 2303 movs r3, #3 80023e4: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80023e6: f107 0310 add.w r3, r7, #16 80023ea: 4619 mov r1, r3 80023ec: 480b ldr r0, [pc, #44] @ (800241c ) 80023ee: f001 f9eb bl 80037c8 GPIO_InitStruct.Pin = GPIO_PIN_10; 80023f2: f44f 6380 mov.w r3, #1024 @ 0x400 80023f6: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80023f8: 2300 movs r3, #0 80023fa: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 80023fc: 2300 movs r3, #0 80023fe: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002400: f107 0310 add.w r3, r7, #16 8002404: 4619 mov r1, r3 8002406: 4805 ldr r0, [pc, #20] @ (800241c ) 8002408: f001 f9de bl 80037c8 /* USER CODE END USART1_MspInit 1 */ } } 800240c: bf00 nop 800240e: 3720 adds r7, #32 8002410: 46bd mov sp, r7 8002412: bd80 pop {r7, pc} 8002414: 40013800 .word 0x40013800 8002418: 40021000 .word 0x40021000 800241c: 40010800 .word 0x40010800 08002420 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8002420: b480 push {r7} 8002422: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8002424: bf00 nop 8002426: e7fd b.n 8002424 08002428 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8002428: b480 push {r7} 800242a: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 800242c: bf00 nop 800242e: e7fd b.n 800242c 08002430 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8002430: b480 push {r7} 8002432: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8002434: bf00 nop 8002436: e7fd b.n 8002434 08002438 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8002438: b480 push {r7} 800243a: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 800243c: bf00 nop 800243e: e7fd b.n 800243c 08002440 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8002440: b480 push {r7} 8002442: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8002444: bf00 nop 8002446: e7fd b.n 8002444 08002448 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8002448: b480 push {r7} 800244a: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 800244c: bf00 nop 800244e: 46bd mov sp, r7 8002450: bc80 pop {r7} 8002452: 4770 bx lr 08002454 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8002454: b480 push {r7} 8002456: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8002458: bf00 nop 800245a: 46bd mov sp, r7 800245c: bc80 pop {r7} 800245e: 4770 bx lr 08002460 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8002460: b480 push {r7} 8002462: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8002464: bf00 nop 8002466: 46bd mov sp, r7 8002468: bc80 pop {r7} 800246a: 4770 bx lr 0800246c : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 800246c: b580 push {r7, lr} 800246e: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8002470: f000 f8c0 bl 80025f4 /* USER CODE BEGIN SysTick_IRQn 1 */ HAL_SYSTICK_IRQHandler(); 8002474: f000 fdb3 bl 8002fde /* USER CODE END SysTick_IRQn 1 */ } 8002478: bf00 nop 800247a: bd80 pop {r7, pc} 0800247c : /** * @brief This function handles DMA1 channel1 global interrupt. */ void DMA1_Channel1_IRQHandler(void) { 800247c: b580 push {r7, lr} 800247e: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_adc1); 8002480: 4802 ldr r0, [pc, #8] @ (800248c ) 8002482: f000 fe6d bl 8003160 /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ /* USER CODE END DMA1_Channel1_IRQn 1 */ } 8002486: bf00 nop 8002488: bd80 pop {r7, pc} 800248a: bf00 nop 800248c: 200002bc .word 0x200002bc 08002490 : /** * @brief This function handles USB low priority or CAN RX0 interrupts. */ void USB_LP_CAN1_RX0_IRQHandler(void) { 8002490: b580 push {r7, lr} 8002492: af00 add r7, sp, #0 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */ HAL_PCD_IRQHandler(&hpcd_USB_FS); 8002494: 4802 ldr r0, [pc, #8] @ (80024a0 ) 8002496: f001 fc7f bl 8003d98 /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */ /* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */ } 800249a: bf00 nop 800249c: bd80 pop {r7, pc} 800249e: bf00 nop 80024a0: 200011dc .word 0x200011dc 080024a4 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 80024a4: b580 push {r7, lr} 80024a6: b086 sub sp, #24 80024a8: af00 add r7, sp, #0 80024aa: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 80024ac: 4a14 ldr r2, [pc, #80] @ (8002500 <_sbrk+0x5c>) 80024ae: 4b15 ldr r3, [pc, #84] @ (8002504 <_sbrk+0x60>) 80024b0: 1ad3 subs r3, r2, r3 80024b2: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 80024b4: 697b ldr r3, [r7, #20] 80024b6: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 80024b8: 4b13 ldr r3, [pc, #76] @ (8002508 <_sbrk+0x64>) 80024ba: 681b ldr r3, [r3, #0] 80024bc: 2b00 cmp r3, #0 80024be: d102 bne.n 80024c6 <_sbrk+0x22> { __sbrk_heap_end = &_end; 80024c0: 4b11 ldr r3, [pc, #68] @ (8002508 <_sbrk+0x64>) 80024c2: 4a12 ldr r2, [pc, #72] @ (800250c <_sbrk+0x68>) 80024c4: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 80024c6: 4b10 ldr r3, [pc, #64] @ (8002508 <_sbrk+0x64>) 80024c8: 681a ldr r2, [r3, #0] 80024ca: 687b ldr r3, [r7, #4] 80024cc: 4413 add r3, r2 80024ce: 693a ldr r2, [r7, #16] 80024d0: 429a cmp r2, r3 80024d2: d207 bcs.n 80024e4 <_sbrk+0x40> { errno = ENOMEM; 80024d4: f009 f8fe bl 800b6d4 <__errno> 80024d8: 4603 mov r3, r0 80024da: 220c movs r2, #12 80024dc: 601a str r2, [r3, #0] return (void *)-1; 80024de: f04f 33ff mov.w r3, #4294967295 80024e2: e009 b.n 80024f8 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 80024e4: 4b08 ldr r3, [pc, #32] @ (8002508 <_sbrk+0x64>) 80024e6: 681b ldr r3, [r3, #0] 80024e8: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 80024ea: 4b07 ldr r3, [pc, #28] @ (8002508 <_sbrk+0x64>) 80024ec: 681a ldr r2, [r3, #0] 80024ee: 687b ldr r3, [r7, #4] 80024f0: 4413 add r3, r2 80024f2: 4a05 ldr r2, [pc, #20] @ (8002508 <_sbrk+0x64>) 80024f4: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 80024f6: 68fb ldr r3, [r7, #12] } 80024f8: 4618 mov r0, r3 80024fa: 3718 adds r7, #24 80024fc: 46bd mov sp, r7 80024fe: bd80 pop {r7, pc} 8002500: 20005000 .word 0x20005000 8002504: 00000400 .word 0x00000400 8002508: 200003e8 .word 0x200003e8 800250c: 20001820 .word 0x20001820 08002510 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 8002510: b480 push {r7} 8002512: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 8002514: bf00 nop 8002516: 46bd mov sp, r7 8002518: bc80 pop {r7} 800251a: 4770 bx lr 0800251c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 800251c: f7ff fff8 bl 8002510 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8002520: 480b ldr r0, [pc, #44] @ (8002550 ) ldr r1, =_edata 8002522: 490c ldr r1, [pc, #48] @ (8002554 ) ldr r2, =_sidata 8002524: 4a0c ldr r2, [pc, #48] @ (8002558 ) movs r3, #0 8002526: 2300 movs r3, #0 b LoopCopyDataInit 8002528: e002 b.n 8002530 0800252a : CopyDataInit: ldr r4, [r2, r3] 800252a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800252c: 50c4 str r4, [r0, r3] adds r3, r3, #4 800252e: 3304 adds r3, #4 08002530 : LoopCopyDataInit: adds r4, r0, r3 8002530: 18c4 adds r4, r0, r3 cmp r4, r1 8002532: 428c cmp r4, r1 bcc CopyDataInit 8002534: d3f9 bcc.n 800252a /* Zero fill the bss segment. */ ldr r2, =_sbss 8002536: 4a09 ldr r2, [pc, #36] @ (800255c ) ldr r4, =_ebss 8002538: 4c09 ldr r4, [pc, #36] @ (8002560 ) movs r3, #0 800253a: 2300 movs r3, #0 b LoopFillZerobss 800253c: e001 b.n 8002542 0800253e : FillZerobss: str r3, [r2] 800253e: 6013 str r3, [r2, #0] adds r2, r2, #4 8002540: 3204 adds r2, #4 08002542 : LoopFillZerobss: cmp r2, r4 8002542: 42a2 cmp r2, r4 bcc FillZerobss 8002544: d3fb bcc.n 800253e /* Call static constructors */ bl __libc_init_array 8002546: f009 f8cb bl 800b6e0 <__libc_init_array> /* Call the application's entry point.*/ bl main 800254a: f7ff f899 bl 8001680
bx lr 800254e: 4770 bx lr ldr r0, =_sdata 8002550: 20000000 .word 0x20000000 ldr r1, =_edata 8002554: 200001d0 .word 0x200001d0 ldr r2, =_sidata 8002558: 0800c2f4 .word 0x0800c2f4 ldr r2, =_sbss 800255c: 200001d0 .word 0x200001d0 ldr r4, =_ebss 8002560: 2000181c .word 0x2000181c 08002564 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8002564: e7fe b.n 8002564 ... 08002568 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8002568: b580 push {r7, lr} 800256a: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 800256c: 4b08 ldr r3, [pc, #32] @ (8002590 ) 800256e: 681b ldr r3, [r3, #0] 8002570: 4a07 ldr r2, [pc, #28] @ (8002590 ) 8002572: f043 0310 orr.w r3, r3, #16 8002576: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8002578: 2003 movs r0, #3 800257a: f000 fcef bl 8002f5c /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 800257e: 200f movs r0, #15 8002580: f000 f808 bl 8002594 /* Init the low level hardware */ HAL_MspInit(); 8002584: f7ff fdca bl 800211c /* Return function status */ return HAL_OK; 8002588: 2300 movs r3, #0 } 800258a: 4618 mov r0, r3 800258c: bd80 pop {r7, pc} 800258e: bf00 nop 8002590: 40022000 .word 0x40022000 08002594 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8002594: b580 push {r7, lr} 8002596: b082 sub sp, #8 8002598: af00 add r7, sp, #0 800259a: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 800259c: 4b12 ldr r3, [pc, #72] @ (80025e8 ) 800259e: 681a ldr r2, [r3, #0] 80025a0: 4b12 ldr r3, [pc, #72] @ (80025ec ) 80025a2: 781b ldrb r3, [r3, #0] 80025a4: 4619 mov r1, r3 80025a6: f44f 737a mov.w r3, #1000 @ 0x3e8 80025aa: fbb3 f3f1 udiv r3, r3, r1 80025ae: fbb2 f3f3 udiv r3, r2, r3 80025b2: 4618 mov r0, r3 80025b4: f000 fd07 bl 8002fc6 80025b8: 4603 mov r3, r0 80025ba: 2b00 cmp r3, #0 80025bc: d001 beq.n 80025c2 { return HAL_ERROR; 80025be: 2301 movs r3, #1 80025c0: e00e b.n 80025e0 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 80025c2: 687b ldr r3, [r7, #4] 80025c4: 2b0f cmp r3, #15 80025c6: d80a bhi.n 80025de { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 80025c8: 2200 movs r2, #0 80025ca: 6879 ldr r1, [r7, #4] 80025cc: f04f 30ff mov.w r0, #4294967295 80025d0: f000 fccf bl 8002f72 uwTickPrio = TickPriority; 80025d4: 4a06 ldr r2, [pc, #24] @ (80025f0 ) 80025d6: 687b ldr r3, [r7, #4] 80025d8: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 80025da: 2300 movs r3, #0 80025dc: e000 b.n 80025e0 return HAL_ERROR; 80025de: 2301 movs r3, #1 } 80025e0: 4618 mov r0, r3 80025e2: 3708 adds r7, #8 80025e4: 46bd mov sp, r7 80025e6: bd80 pop {r7, pc} 80025e8: 20000004 .word 0x20000004 80025ec: 2000000c .word 0x2000000c 80025f0: 20000008 .word 0x20000008 080025f4 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 80025f4: b480 push {r7} 80025f6: af00 add r7, sp, #0 uwTick += uwTickFreq; 80025f8: 4b05 ldr r3, [pc, #20] @ (8002610 ) 80025fa: 781b ldrb r3, [r3, #0] 80025fc: 461a mov r2, r3 80025fe: 4b05 ldr r3, [pc, #20] @ (8002614 ) 8002600: 681b ldr r3, [r3, #0] 8002602: 4413 add r3, r2 8002604: 4a03 ldr r2, [pc, #12] @ (8002614 ) 8002606: 6013 str r3, [r2, #0] } 8002608: bf00 nop 800260a: 46bd mov sp, r7 800260c: bc80 pop {r7} 800260e: 4770 bx lr 8002610: 2000000c .word 0x2000000c 8002614: 200003ec .word 0x200003ec 08002618 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8002618: b480 push {r7} 800261a: af00 add r7, sp, #0 return uwTick; 800261c: 4b02 ldr r3, [pc, #8] @ (8002628 ) 800261e: 681b ldr r3, [r3, #0] } 8002620: 4618 mov r0, r3 8002622: 46bd mov sp, r7 8002624: bc80 pop {r7} 8002626: 4770 bx lr 8002628: 200003ec .word 0x200003ec 0800262c : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 800262c: b580 push {r7, lr} 800262e: b086 sub sp, #24 8002630: af00 add r7, sp, #0 8002632: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8002634: 2300 movs r3, #0 8002636: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 8002638: 2300 movs r3, #0 800263a: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 800263c: 2300 movs r3, #0 800263e: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 8002640: 2300 movs r3, #0 8002642: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 8002644: 687b ldr r3, [r7, #4] 8002646: 2b00 cmp r3, #0 8002648: d101 bne.n 800264e { return HAL_ERROR; 800264a: 2301 movs r3, #1 800264c: e0be b.n 80027cc assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 800264e: 687b ldr r3, [r7, #4] 8002650: 689b ldr r3, [r3, #8] 8002652: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 8002654: 687b ldr r3, [r7, #4] 8002656: 6a9b ldr r3, [r3, #40] @ 0x28 8002658: 2b00 cmp r3, #0 800265a: d109 bne.n 8002670 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 800265c: 687b ldr r3, [r7, #4] 800265e: 2200 movs r2, #0 8002660: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 8002662: 687b ldr r3, [r7, #4] 8002664: 2200 movs r2, #0 8002666: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 800266a: 6878 ldr r0, [r7, #4] 800266c: f7ff fd88 bl 8002180 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8002670: 6878 ldr r0, [r7, #4] 8002672: f000 faff bl 8002c74 8002676: 4603 mov r3, r0 8002678: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 800267a: 687b ldr r3, [r7, #4] 800267c: 6a9b ldr r3, [r3, #40] @ 0x28 800267e: f003 0310 and.w r3, r3, #16 8002682: 2b00 cmp r3, #0 8002684: f040 8099 bne.w 80027ba 8002688: 7dfb ldrb r3, [r7, #23] 800268a: 2b00 cmp r3, #0 800268c: f040 8095 bne.w 80027ba (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8002690: 687b ldr r3, [r7, #4] 8002692: 6a9b ldr r3, [r3, #40] @ 0x28 8002694: f423 5388 bic.w r3, r3, #4352 @ 0x1100 8002698: f023 0302 bic.w r3, r3, #2 800269c: f043 0202 orr.w r2, r3, #2 80026a0: 687b ldr r3, [r7, #4] 80026a2: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 80026a4: 687b ldr r3, [r7, #4] 80026a6: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 80026a8: 687b ldr r3, [r7, #4] 80026aa: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 80026ac: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 80026ae: 687b ldr r3, [r7, #4] 80026b0: 7b1b ldrb r3, [r3, #12] 80026b2: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 80026b4: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 80026b6: 68ba ldr r2, [r7, #8] 80026b8: 4313 orrs r3, r2 80026ba: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 80026bc: 687b ldr r3, [r7, #4] 80026be: 689b ldr r3, [r3, #8] 80026c0: f5b3 7f80 cmp.w r3, #256 @ 0x100 80026c4: d003 beq.n 80026ce 80026c6: 687b ldr r3, [r7, #4] 80026c8: 689b ldr r3, [r3, #8] 80026ca: 2b01 cmp r3, #1 80026cc: d102 bne.n 80026d4 80026ce: f44f 7380 mov.w r3, #256 @ 0x100 80026d2: e000 b.n 80026d6 80026d4: 2300 movs r3, #0 80026d6: 693a ldr r2, [r7, #16] 80026d8: 4313 orrs r3, r2 80026da: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 80026dc: 687b ldr r3, [r7, #4] 80026de: 7d1b ldrb r3, [r3, #20] 80026e0: 2b01 cmp r3, #1 80026e2: d119 bne.n 8002718 { if (hadc->Init.ContinuousConvMode == DISABLE) 80026e4: 687b ldr r3, [r7, #4] 80026e6: 7b1b ldrb r3, [r3, #12] 80026e8: 2b00 cmp r3, #0 80026ea: d109 bne.n 8002700 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 80026ec: 687b ldr r3, [r7, #4] 80026ee: 699b ldr r3, [r3, #24] 80026f0: 3b01 subs r3, #1 80026f2: 035a lsls r2, r3, #13 80026f4: 693b ldr r3, [r7, #16] 80026f6: 4313 orrs r3, r2 80026f8: f443 6300 orr.w r3, r3, #2048 @ 0x800 80026fc: 613b str r3, [r7, #16] 80026fe: e00b b.n 8002718 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8002700: 687b ldr r3, [r7, #4] 8002702: 6a9b ldr r3, [r3, #40] @ 0x28 8002704: f043 0220 orr.w r2, r3, #32 8002708: 687b ldr r3, [r7, #4] 800270a: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 800270c: 687b ldr r3, [r7, #4] 800270e: 6adb ldr r3, [r3, #44] @ 0x2c 8002710: f043 0201 orr.w r2, r3, #1 8002714: 687b ldr r3, [r7, #4] 8002716: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 8002718: 687b ldr r3, [r7, #4] 800271a: 681b ldr r3, [r3, #0] 800271c: 685b ldr r3, [r3, #4] 800271e: f423 4169 bic.w r1, r3, #59648 @ 0xe900 8002722: 687b ldr r3, [r7, #4] 8002724: 681b ldr r3, [r3, #0] 8002726: 693a ldr r2, [r7, #16] 8002728: 430a orrs r2, r1 800272a: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 800272c: 687b ldr r3, [r7, #4] 800272e: 681b ldr r3, [r3, #0] 8002730: 689a ldr r2, [r3, #8] 8002732: 4b28 ldr r3, [pc, #160] @ (80027d4 ) 8002734: 4013 ands r3, r2 8002736: 687a ldr r2, [r7, #4] 8002738: 6812 ldr r2, [r2, #0] 800273a: 68b9 ldr r1, [r7, #8] 800273c: 430b orrs r3, r1 800273e: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 8002740: 687b ldr r3, [r7, #4] 8002742: 689b ldr r3, [r3, #8] 8002744: f5b3 7f80 cmp.w r3, #256 @ 0x100 8002748: d003 beq.n 8002752 800274a: 687b ldr r3, [r7, #4] 800274c: 689b ldr r3, [r3, #8] 800274e: 2b01 cmp r3, #1 8002750: d104 bne.n 800275c { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 8002752: 687b ldr r3, [r7, #4] 8002754: 691b ldr r3, [r3, #16] 8002756: 3b01 subs r3, #1 8002758: 051b lsls r3, r3, #20 800275a: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 800275c: 687b ldr r3, [r7, #4] 800275e: 681b ldr r3, [r3, #0] 8002760: 6adb ldr r3, [r3, #44] @ 0x2c 8002762: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 8002766: 687b ldr r3, [r7, #4] 8002768: 681b ldr r3, [r3, #0] 800276a: 68fa ldr r2, [r7, #12] 800276c: 430a orrs r2, r1 800276e: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002770: 687b ldr r3, [r7, #4] 8002772: 681b ldr r3, [r3, #0] 8002774: 689a ldr r2, [r3, #8] 8002776: 4b18 ldr r3, [pc, #96] @ (80027d8 ) 8002778: 4013 ands r3, r2 800277a: 68ba ldr r2, [r7, #8] 800277c: 429a cmp r2, r3 800277e: d10b bne.n 8002798 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 8002780: 687b ldr r3, [r7, #4] 8002782: 2200 movs r2, #0 8002784: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 8002786: 687b ldr r3, [r7, #4] 8002788: 6a9b ldr r3, [r3, #40] @ 0x28 800278a: f023 0303 bic.w r3, r3, #3 800278e: f043 0201 orr.w r2, r3, #1 8002792: 687b ldr r3, [r7, #4] 8002794: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002796: e018 b.n 80027ca HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 8002798: 687b ldr r3, [r7, #4] 800279a: 6a9b ldr r3, [r3, #40] @ 0x28 800279c: f023 0312 bic.w r3, r3, #18 80027a0: f043 0210 orr.w r2, r3, #16 80027a4: 687b ldr r3, [r7, #4] 80027a6: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80027a8: 687b ldr r3, [r7, #4] 80027aa: 6adb ldr r3, [r3, #44] @ 0x2c 80027ac: f043 0201 orr.w r2, r3, #1 80027b0: 687b ldr r3, [r7, #4] 80027b2: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 80027b4: 2301 movs r3, #1 80027b6: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 80027b8: e007 b.n 80027ca } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80027ba: 687b ldr r3, [r7, #4] 80027bc: 6a9b ldr r3, [r3, #40] @ 0x28 80027be: f043 0210 orr.w r2, r3, #16 80027c2: 687b ldr r3, [r7, #4] 80027c4: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 80027c6: 2301 movs r3, #1 80027c8: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 80027ca: 7dfb ldrb r3, [r7, #23] } 80027cc: 4618 mov r0, r3 80027ce: 3718 adds r7, #24 80027d0: 46bd mov sp, r7 80027d2: bd80 pop {r7, pc} 80027d4: ffe1f7fd .word 0xffe1f7fd 80027d8: ff1f0efe .word 0xff1f0efe 080027dc : * @param pData: The destination Buffer address. * @param Length: The length of data to be transferred from ADC peripheral to memory. * @retval None */ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) { 80027dc: b580 push {r7, lr} 80027de: b086 sub sp, #24 80027e0: af00 add r7, sp, #0 80027e2: 60f8 str r0, [r7, #12] 80027e4: 60b9 str r1, [r7, #8] 80027e6: 607a str r2, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80027e8: 2300 movs r3, #0 80027ea: 75fb strb r3, [r7, #23] assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance)); /* Verification if multimode is disabled (for devices with several ADC) */ /* If multimode is enabled, dedicated function multimode conversion */ /* start DMA must be used. */ if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) 80027ec: 68fb ldr r3, [r7, #12] 80027ee: 681b ldr r3, [r3, #0] 80027f0: 4a64 ldr r2, [pc, #400] @ (8002984 ) 80027f2: 4293 cmp r3, r2 80027f4: d004 beq.n 8002800 80027f6: 68fb ldr r3, [r7, #12] 80027f8: 681b ldr r3, [r3, #0] 80027fa: 4a63 ldr r2, [pc, #396] @ (8002988 ) 80027fc: 4293 cmp r3, r2 80027fe: d106 bne.n 800280e 8002800: 4b60 ldr r3, [pc, #384] @ (8002984 ) 8002802: 685b ldr r3, [r3, #4] 8002804: f403 2370 and.w r3, r3, #983040 @ 0xf0000 8002808: 2b00 cmp r3, #0 800280a: f040 80b3 bne.w 8002974 { /* Process locked */ __HAL_LOCK(hadc); 800280e: 68fb ldr r3, [r7, #12] 8002810: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8002814: 2b01 cmp r3, #1 8002816: d101 bne.n 800281c 8002818: 2302 movs r3, #2 800281a: e0ae b.n 800297a 800281c: 68fb ldr r3, [r7, #12] 800281e: 2201 movs r2, #1 8002820: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); 8002824: 68f8 ldr r0, [r7, #12] 8002826: f000 f9cb bl 8002bc0 800282a: 4603 mov r3, r0 800282c: 75fb strb r3, [r7, #23] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) 800282e: 7dfb ldrb r3, [r7, #23] 8002830: 2b00 cmp r3, #0 8002832: f040 809a bne.w 800296a { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, 8002836: 68fb ldr r3, [r7, #12] 8002838: 6a9b ldr r3, [r3, #40] @ 0x28 800283a: f423 6370 bic.w r3, r3, #3840 @ 0xf00 800283e: f023 0301 bic.w r3, r3, #1 8002842: f443 7280 orr.w r2, r3, #256 @ 0x100 8002846: 68fb ldr r3, [r7, #12] 8002848: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_REG_BUSY); /* Set group injected state (from auto-injection) and multimode state */ /* for all cases of multimode: independent mode, multimode ADC master */ /* or multimode ADC slave (for devices with several ADCs): */ if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) 800284a: 68fb ldr r3, [r7, #12] 800284c: 681b ldr r3, [r3, #0] 800284e: 4a4e ldr r2, [pc, #312] @ (8002988 ) 8002850: 4293 cmp r3, r2 8002852: d105 bne.n 8002860 8002854: 4b4b ldr r3, [pc, #300] @ (8002984 ) 8002856: 685b ldr r3, [r3, #4] 8002858: f403 2370 and.w r3, r3, #983040 @ 0xf0000 800285c: 2b00 cmp r3, #0 800285e: d115 bne.n 800288c { /* Set ADC state (ADC independent or master) */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 8002860: 68fb ldr r3, [r7, #12] 8002862: 6a9b ldr r3, [r3, #40] @ 0x28 8002864: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 8002868: 68fb ldr r3, [r7, #12] 800286a: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800286c: 68fb ldr r3, [r7, #12] 800286e: 681b ldr r3, [r3, #0] 8002870: 685b ldr r3, [r3, #4] 8002872: f403 6380 and.w r3, r3, #1024 @ 0x400 8002876: 2b00 cmp r3, #0 8002878: d026 beq.n 80028c8 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 800287a: 68fb ldr r3, [r7, #12] 800287c: 6a9b ldr r3, [r3, #40] @ 0x28 800287e: f423 5340 bic.w r3, r3, #12288 @ 0x3000 8002882: f443 5280 orr.w r2, r3, #4096 @ 0x1000 8002886: 68fb ldr r3, [r7, #12] 8002888: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 800288a: e01d b.n 80028c8 } } else { /* Set ADC state (ADC slave) */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); 800288c: 68fb ldr r3, [r7, #12] 800288e: 6a9b ldr r3, [r3, #40] @ 0x28 8002890: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 8002894: 68fb ldr r3, [r7, #12] 8002896: 629a str r2, [r3, #40] @ 0x28 /* If conversions on group regular are also triggering group injected, */ /* update ADC state. */ if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) 8002898: 68fb ldr r3, [r7, #12] 800289a: 681b ldr r3, [r3, #0] 800289c: 4a39 ldr r2, [pc, #228] @ (8002984 ) 800289e: 4293 cmp r3, r2 80028a0: d004 beq.n 80028ac 80028a2: 68fb ldr r3, [r7, #12] 80028a4: 681b ldr r3, [r3, #0] 80028a6: 4a38 ldr r2, [pc, #224] @ (8002988 ) 80028a8: 4293 cmp r3, r2 80028aa: d10d bne.n 80028c8 80028ac: 4b35 ldr r3, [pc, #212] @ (8002984 ) 80028ae: 685b ldr r3, [r3, #4] 80028b0: f403 6380 and.w r3, r3, #1024 @ 0x400 80028b4: 2b00 cmp r3, #0 80028b6: d007 beq.n 80028c8 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); 80028b8: 68fb ldr r3, [r7, #12] 80028ba: 6a9b ldr r3, [r3, #40] @ 0x28 80028bc: f423 5340 bic.w r3, r3, #12288 @ 0x3000 80028c0: f443 5280 orr.w r2, r3, #4096 @ 0x1000 80028c4: 68fb ldr r3, [r7, #12] 80028c6: 629a str r2, [r3, #40] @ 0x28 } } /* State machine update: Check if an injected conversion is ongoing */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 80028c8: 68fb ldr r3, [r7, #12] 80028ca: 6a9b ldr r3, [r3, #40] @ 0x28 80028cc: f403 5380 and.w r3, r3, #4096 @ 0x1000 80028d0: 2b00 cmp r3, #0 80028d2: d006 beq.n 80028e2 { /* Reset ADC error code fields related to conversions on group regular */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); 80028d4: 68fb ldr r3, [r7, #12] 80028d6: 6adb ldr r3, [r3, #44] @ 0x2c 80028d8: f023 0206 bic.w r2, r3, #6 80028dc: 68fb ldr r3, [r7, #12] 80028de: 62da str r2, [r3, #44] @ 0x2c 80028e0: e002 b.n 80028e8 } else { /* Reset ADC all error code fields */ ADC_CLEAR_ERRORCODE(hadc); 80028e2: 68fb ldr r3, [r7, #12] 80028e4: 2200 movs r2, #0 80028e6: 62da str r2, [r3, #44] @ 0x2c } /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); 80028e8: 68fb ldr r3, [r7, #12] 80028ea: 2200 movs r2, #0 80028ec: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Set the DMA transfer complete callback */ hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; 80028f0: 68fb ldr r3, [r7, #12] 80028f2: 6a1b ldr r3, [r3, #32] 80028f4: 4a25 ldr r2, [pc, #148] @ (800298c ) 80028f6: 629a str r2, [r3, #40] @ 0x28 /* Set the DMA half transfer complete callback */ hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; 80028f8: 68fb ldr r3, [r7, #12] 80028fa: 6a1b ldr r3, [r3, #32] 80028fc: 4a24 ldr r2, [pc, #144] @ (8002990 ) 80028fe: 62da str r2, [r3, #44] @ 0x2c /* Set the DMA error callback */ hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; 8002900: 68fb ldr r3, [r7, #12] 8002902: 6a1b ldr r3, [r3, #32] 8002904: 4a23 ldr r2, [pc, #140] @ (8002994 ) 8002906: 631a str r2, [r3, #48] @ 0x30 /* start (in case of SW start): */ /* Clear regular group conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC */ /* operations) */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); 8002908: 68fb ldr r3, [r7, #12] 800290a: 681b ldr r3, [r3, #0] 800290c: f06f 0202 mvn.w r2, #2 8002910: 601a str r2, [r3, #0] /* Enable ADC DMA mode */ SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); 8002912: 68fb ldr r3, [r7, #12] 8002914: 681b ldr r3, [r3, #0] 8002916: 689a ldr r2, [r3, #8] 8002918: 68fb ldr r3, [r7, #12] 800291a: 681b ldr r3, [r3, #0] 800291c: f442 7280 orr.w r2, r2, #256 @ 0x100 8002920: 609a str r2, [r3, #8] /* Start the DMA channel */ HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); 8002922: 68fb ldr r3, [r7, #12] 8002924: 6a18 ldr r0, [r3, #32] 8002926: 68fb ldr r3, [r7, #12] 8002928: 681b ldr r3, [r3, #0] 800292a: 334c adds r3, #76 @ 0x4c 800292c: 4619 mov r1, r3 800292e: 68ba ldr r2, [r7, #8] 8002930: 687b ldr r3, [r7, #4] 8002932: f000 fbb5 bl 80030a0 /* Enable conversion of regular group. */ /* If software start has been selected, conversion starts immediately. */ /* If external trigger has been selected, conversion will start at next */ /* trigger event. */ if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) 8002936: 68fb ldr r3, [r7, #12] 8002938: 681b ldr r3, [r3, #0] 800293a: 689b ldr r3, [r3, #8] 800293c: f403 2360 and.w r3, r3, #917504 @ 0xe0000 8002940: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 8002944: d108 bne.n 8002958 { /* Start ADC conversion on regular group with SW start */ SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); 8002946: 68fb ldr r3, [r7, #12] 8002948: 681b ldr r3, [r3, #0] 800294a: 689a ldr r2, [r3, #8] 800294c: 68fb ldr r3, [r7, #12] 800294e: 681b ldr r3, [r3, #0] 8002950: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 8002954: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 8002956: e00f b.n 8002978 } else { /* Start ADC conversion on regular group with external trigger */ SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); 8002958: 68fb ldr r3, [r7, #12] 800295a: 681b ldr r3, [r3, #0] 800295c: 689a ldr r2, [r3, #8] 800295e: 68fb ldr r3, [r7, #12] 8002960: 681b ldr r3, [r3, #0] 8002962: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 8002966: 609a str r2, [r3, #8] if (tmp_hal_status == HAL_OK) 8002968: e006 b.n 8002978 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); 800296a: 68fb ldr r3, [r7, #12] 800296c: 2200 movs r2, #0 800296e: f883 2024 strb.w r2, [r3, #36] @ 0x24 if (tmp_hal_status == HAL_OK) 8002972: e001 b.n 8002978 } } else { tmp_hal_status = HAL_ERROR; 8002974: 2301 movs r3, #1 8002976: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8002978: 7dfb ldrb r3, [r7, #23] } 800297a: 4618 mov r0, r3 800297c: 3718 adds r7, #24 800297e: 46bd mov sp, r7 8002980: bd80 pop {r7, pc} 8002982: bf00 nop 8002984: 40012400 .word 0x40012400 8002988: 40012800 .word 0x40012800 800298c: 08002cf7 .word 0x08002cf7 8002990: 08002d73 .word 0x08002d73 8002994: 08002d8f .word 0x08002d8f 08002998 : * @brief Conversion complete callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { 8002998: b480 push {r7} 800299a: b083 sub sp, #12 800299c: af00 add r7, sp, #0 800299e: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvCpltCallback must be implemented in the user file. */ } 80029a0: bf00 nop 80029a2: 370c adds r7, #12 80029a4: 46bd mov sp, r7 80029a6: bc80 pop {r7} 80029a8: 4770 bx lr 080029aa : * @brief Conversion DMA half-transfer callback in non blocking mode * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) { 80029aa: b480 push {r7} 80029ac: b083 sub sp, #12 80029ae: af00 add r7, sp, #0 80029b0: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. */ } 80029b2: bf00 nop 80029b4: 370c adds r7, #12 80029b6: 46bd mov sp, r7 80029b8: bc80 pop {r7} 80029ba: 4770 bx lr 080029bc : * (ADC conversion with interruption or transfer by DMA) * @param hadc: ADC handle * @retval None */ __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) { 80029bc: b480 push {r7} 80029be: b083 sub sp, #12 80029c0: af00 add r7, sp, #0 80029c2: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(hadc); /* NOTE : This function should not be modified. When the callback is needed, function HAL_ADC_ErrorCallback must be implemented in the user file. */ } 80029c4: bf00 nop 80029c6: 370c adds r7, #12 80029c8: 46bd mov sp, r7 80029ca: bc80 pop {r7} 80029cc: 4770 bx lr ... 080029d0 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 80029d0: b480 push {r7} 80029d2: b085 sub sp, #20 80029d4: af00 add r7, sp, #0 80029d6: 6078 str r0, [r7, #4] 80029d8: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80029da: 2300 movs r3, #0 80029dc: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 80029de: 2300 movs r3, #0 80029e0: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 80029e2: 687b ldr r3, [r7, #4] 80029e4: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 80029e8: 2b01 cmp r3, #1 80029ea: d101 bne.n 80029f0 80029ec: 2302 movs r3, #2 80029ee: e0dc b.n 8002baa 80029f0: 687b ldr r3, [r7, #4] 80029f2: 2201 movs r2, #1 80029f4: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 80029f8: 683b ldr r3, [r7, #0] 80029fa: 685b ldr r3, [r3, #4] 80029fc: 2b06 cmp r3, #6 80029fe: d81c bhi.n 8002a3a { MODIFY_REG(hadc->Instance->SQR3 , 8002a00: 687b ldr r3, [r7, #4] 8002a02: 681b ldr r3, [r3, #0] 8002a04: 6b59 ldr r1, [r3, #52] @ 0x34 8002a06: 683b ldr r3, [r7, #0] 8002a08: 685a ldr r2, [r3, #4] 8002a0a: 4613 mov r3, r2 8002a0c: 009b lsls r3, r3, #2 8002a0e: 4413 add r3, r2 8002a10: 3b05 subs r3, #5 8002a12: 221f movs r2, #31 8002a14: fa02 f303 lsl.w r3, r2, r3 8002a18: 43db mvns r3, r3 8002a1a: 4019 ands r1, r3 8002a1c: 683b ldr r3, [r7, #0] 8002a1e: 6818 ldr r0, [r3, #0] 8002a20: 683b ldr r3, [r7, #0] 8002a22: 685a ldr r2, [r3, #4] 8002a24: 4613 mov r3, r2 8002a26: 009b lsls r3, r3, #2 8002a28: 4413 add r3, r2 8002a2a: 3b05 subs r3, #5 8002a2c: fa00 f203 lsl.w r2, r0, r3 8002a30: 687b ldr r3, [r7, #4] 8002a32: 681b ldr r3, [r3, #0] 8002a34: 430a orrs r2, r1 8002a36: 635a str r2, [r3, #52] @ 0x34 8002a38: e03c b.n 8002ab4 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 8002a3a: 683b ldr r3, [r7, #0] 8002a3c: 685b ldr r3, [r3, #4] 8002a3e: 2b0c cmp r3, #12 8002a40: d81c bhi.n 8002a7c { MODIFY_REG(hadc->Instance->SQR2 , 8002a42: 687b ldr r3, [r7, #4] 8002a44: 681b ldr r3, [r3, #0] 8002a46: 6b19 ldr r1, [r3, #48] @ 0x30 8002a48: 683b ldr r3, [r7, #0] 8002a4a: 685a ldr r2, [r3, #4] 8002a4c: 4613 mov r3, r2 8002a4e: 009b lsls r3, r3, #2 8002a50: 4413 add r3, r2 8002a52: 3b23 subs r3, #35 @ 0x23 8002a54: 221f movs r2, #31 8002a56: fa02 f303 lsl.w r3, r2, r3 8002a5a: 43db mvns r3, r3 8002a5c: 4019 ands r1, r3 8002a5e: 683b ldr r3, [r7, #0] 8002a60: 6818 ldr r0, [r3, #0] 8002a62: 683b ldr r3, [r7, #0] 8002a64: 685a ldr r2, [r3, #4] 8002a66: 4613 mov r3, r2 8002a68: 009b lsls r3, r3, #2 8002a6a: 4413 add r3, r2 8002a6c: 3b23 subs r3, #35 @ 0x23 8002a6e: fa00 f203 lsl.w r2, r0, r3 8002a72: 687b ldr r3, [r7, #4] 8002a74: 681b ldr r3, [r3, #0] 8002a76: 430a orrs r2, r1 8002a78: 631a str r2, [r3, #48] @ 0x30 8002a7a: e01b b.n 8002ab4 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 8002a7c: 687b ldr r3, [r7, #4] 8002a7e: 681b ldr r3, [r3, #0] 8002a80: 6ad9 ldr r1, [r3, #44] @ 0x2c 8002a82: 683b ldr r3, [r7, #0] 8002a84: 685a ldr r2, [r3, #4] 8002a86: 4613 mov r3, r2 8002a88: 009b lsls r3, r3, #2 8002a8a: 4413 add r3, r2 8002a8c: 3b41 subs r3, #65 @ 0x41 8002a8e: 221f movs r2, #31 8002a90: fa02 f303 lsl.w r3, r2, r3 8002a94: 43db mvns r3, r3 8002a96: 4019 ands r1, r3 8002a98: 683b ldr r3, [r7, #0] 8002a9a: 6818 ldr r0, [r3, #0] 8002a9c: 683b ldr r3, [r7, #0] 8002a9e: 685a ldr r2, [r3, #4] 8002aa0: 4613 mov r3, r2 8002aa2: 009b lsls r3, r3, #2 8002aa4: 4413 add r3, r2 8002aa6: 3b41 subs r3, #65 @ 0x41 8002aa8: fa00 f203 lsl.w r2, r0, r3 8002aac: 687b ldr r3, [r7, #4] 8002aae: 681b ldr r3, [r3, #0] 8002ab0: 430a orrs r2, r1 8002ab2: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 8002ab4: 683b ldr r3, [r7, #0] 8002ab6: 681b ldr r3, [r3, #0] 8002ab8: 2b09 cmp r3, #9 8002aba: d91c bls.n 8002af6 { MODIFY_REG(hadc->Instance->SMPR1 , 8002abc: 687b ldr r3, [r7, #4] 8002abe: 681b ldr r3, [r3, #0] 8002ac0: 68d9 ldr r1, [r3, #12] 8002ac2: 683b ldr r3, [r7, #0] 8002ac4: 681a ldr r2, [r3, #0] 8002ac6: 4613 mov r3, r2 8002ac8: 005b lsls r3, r3, #1 8002aca: 4413 add r3, r2 8002acc: 3b1e subs r3, #30 8002ace: 2207 movs r2, #7 8002ad0: fa02 f303 lsl.w r3, r2, r3 8002ad4: 43db mvns r3, r3 8002ad6: 4019 ands r1, r3 8002ad8: 683b ldr r3, [r7, #0] 8002ada: 6898 ldr r0, [r3, #8] 8002adc: 683b ldr r3, [r7, #0] 8002ade: 681a ldr r2, [r3, #0] 8002ae0: 4613 mov r3, r2 8002ae2: 005b lsls r3, r3, #1 8002ae4: 4413 add r3, r2 8002ae6: 3b1e subs r3, #30 8002ae8: fa00 f203 lsl.w r2, r0, r3 8002aec: 687b ldr r3, [r7, #4] 8002aee: 681b ldr r3, [r3, #0] 8002af0: 430a orrs r2, r1 8002af2: 60da str r2, [r3, #12] 8002af4: e019 b.n 8002b2a ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 8002af6: 687b ldr r3, [r7, #4] 8002af8: 681b ldr r3, [r3, #0] 8002afa: 6919 ldr r1, [r3, #16] 8002afc: 683b ldr r3, [r7, #0] 8002afe: 681a ldr r2, [r3, #0] 8002b00: 4613 mov r3, r2 8002b02: 005b lsls r3, r3, #1 8002b04: 4413 add r3, r2 8002b06: 2207 movs r2, #7 8002b08: fa02 f303 lsl.w r3, r2, r3 8002b0c: 43db mvns r3, r3 8002b0e: 4019 ands r1, r3 8002b10: 683b ldr r3, [r7, #0] 8002b12: 6898 ldr r0, [r3, #8] 8002b14: 683b ldr r3, [r7, #0] 8002b16: 681a ldr r2, [r3, #0] 8002b18: 4613 mov r3, r2 8002b1a: 005b lsls r3, r3, #1 8002b1c: 4413 add r3, r2 8002b1e: fa00 f203 lsl.w r2, r0, r3 8002b22: 687b ldr r3, [r7, #4] 8002b24: 681b ldr r3, [r3, #0] 8002b26: 430a orrs r2, r1 8002b28: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8002b2a: 683b ldr r3, [r7, #0] 8002b2c: 681b ldr r3, [r3, #0] 8002b2e: 2b10 cmp r3, #16 8002b30: d003 beq.n 8002b3a (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 8002b32: 683b ldr r3, [r7, #0] 8002b34: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8002b36: 2b11 cmp r3, #17 8002b38: d132 bne.n 8002ba0 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 8002b3a: 687b ldr r3, [r7, #4] 8002b3c: 681b ldr r3, [r3, #0] 8002b3e: 4a1d ldr r2, [pc, #116] @ (8002bb4 ) 8002b40: 4293 cmp r3, r2 8002b42: d125 bne.n 8002b90 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 8002b44: 687b ldr r3, [r7, #4] 8002b46: 681b ldr r3, [r3, #0] 8002b48: 689b ldr r3, [r3, #8] 8002b4a: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8002b4e: 2b00 cmp r3, #0 8002b50: d126 bne.n 8002ba0 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 8002b52: 687b ldr r3, [r7, #4] 8002b54: 681b ldr r3, [r3, #0] 8002b56: 689a ldr r2, [r3, #8] 8002b58: 687b ldr r3, [r7, #4] 8002b5a: 681b ldr r3, [r3, #0] 8002b5c: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 8002b60: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 8002b62: 683b ldr r3, [r7, #0] 8002b64: 681b ldr r3, [r3, #0] 8002b66: 2b10 cmp r3, #16 8002b68: d11a bne.n 8002ba0 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8002b6a: 4b13 ldr r3, [pc, #76] @ (8002bb8 ) 8002b6c: 681b ldr r3, [r3, #0] 8002b6e: 4a13 ldr r2, [pc, #76] @ (8002bbc ) 8002b70: fba2 2303 umull r2, r3, r2, r3 8002b74: 0c9a lsrs r2, r3, #18 8002b76: 4613 mov r3, r2 8002b78: 009b lsls r3, r3, #2 8002b7a: 4413 add r3, r2 8002b7c: 005b lsls r3, r3, #1 8002b7e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8002b80: e002 b.n 8002b88 { wait_loop_index--; 8002b82: 68bb ldr r3, [r7, #8] 8002b84: 3b01 subs r3, #1 8002b86: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8002b88: 68bb ldr r3, [r7, #8] 8002b8a: 2b00 cmp r3, #0 8002b8c: d1f9 bne.n 8002b82 8002b8e: e007 b.n 8002ba0 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8002b90: 687b ldr r3, [r7, #4] 8002b92: 6a9b ldr r3, [r3, #40] @ 0x28 8002b94: f043 0220 orr.w r2, r3, #32 8002b98: 687b ldr r3, [r7, #4] 8002b9a: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8002b9c: 2301 movs r3, #1 8002b9e: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 8002ba0: 687b ldr r3, [r7, #4] 8002ba2: 2200 movs r2, #0 8002ba4: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8002ba8: 7bfb ldrb r3, [r7, #15] } 8002baa: 4618 mov r0, r3 8002bac: 3714 adds r7, #20 8002bae: 46bd mov sp, r7 8002bb0: bc80 pop {r7} 8002bb2: 4770 bx lr 8002bb4: 40012400 .word 0x40012400 8002bb8: 20000004 .word 0x20000004 8002bbc: 431bde83 .word 0x431bde83 08002bc0 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) { 8002bc0: b580 push {r7, lr} 8002bc2: b084 sub sp, #16 8002bc4: af00 add r7, sp, #0 8002bc6: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8002bc8: 2300 movs r3, #0 8002bca: 60fb str r3, [r7, #12] __IO uint32_t wait_loop_index = 0U; 8002bcc: 2300 movs r3, #0 8002bce: 60bb str r3, [r7, #8] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (ADC_IS_ENABLE(hadc) == RESET) 8002bd0: 687b ldr r3, [r7, #4] 8002bd2: 681b ldr r3, [r3, #0] 8002bd4: 689b ldr r3, [r3, #8] 8002bd6: f003 0301 and.w r3, r3, #1 8002bda: 2b01 cmp r3, #1 8002bdc: d040 beq.n 8002c60 { /* Enable the Peripheral */ __HAL_ADC_ENABLE(hadc); 8002bde: 687b ldr r3, [r7, #4] 8002be0: 681b ldr r3, [r3, #0] 8002be2: 689a ldr r2, [r3, #8] 8002be4: 687b ldr r3, [r7, #4] 8002be6: 681b ldr r3, [r3, #0] 8002be8: f042 0201 orr.w r2, r2, #1 8002bec: 609a str r2, [r3, #8] /* Delay for ADC stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); 8002bee: 4b1f ldr r3, [pc, #124] @ (8002c6c ) 8002bf0: 681b ldr r3, [r3, #0] 8002bf2: 4a1f ldr r2, [pc, #124] @ (8002c70 ) 8002bf4: fba2 2303 umull r2, r3, r2, r3 8002bf8: 0c9b lsrs r3, r3, #18 8002bfa: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8002bfc: e002 b.n 8002c04 { wait_loop_index--; 8002bfe: 68bb ldr r3, [r7, #8] 8002c00: 3b01 subs r3, #1 8002c02: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8002c04: 68bb ldr r3, [r7, #8] 8002c06: 2b00 cmp r3, #0 8002c08: d1f9 bne.n 8002bfe } /* Get tick count */ tickstart = HAL_GetTick(); 8002c0a: f7ff fd05 bl 8002618 8002c0e: 60f8 str r0, [r7, #12] /* Wait for ADC effectively enabled */ while(ADC_IS_ENABLE(hadc) == RESET) 8002c10: e01f b.n 8002c52 { if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) 8002c12: f7ff fd01 bl 8002618 8002c16: 4602 mov r2, r0 8002c18: 68fb ldr r3, [r7, #12] 8002c1a: 1ad3 subs r3, r2, r3 8002c1c: 2b02 cmp r3, #2 8002c1e: d918 bls.n 8002c52 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) == RESET) 8002c20: 687b ldr r3, [r7, #4] 8002c22: 681b ldr r3, [r3, #0] 8002c24: 689b ldr r3, [r3, #8] 8002c26: f003 0301 and.w r3, r3, #1 8002c2a: 2b01 cmp r3, #1 8002c2c: d011 beq.n 8002c52 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8002c2e: 687b ldr r3, [r7, #4] 8002c30: 6a9b ldr r3, [r3, #40] @ 0x28 8002c32: f043 0210 orr.w r2, r3, #16 8002c36: 687b ldr r3, [r7, #4] 8002c38: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002c3a: 687b ldr r3, [r7, #4] 8002c3c: 6adb ldr r3, [r3, #44] @ 0x2c 8002c3e: f043 0201 orr.w r2, r3, #1 8002c42: 687b ldr r3, [r7, #4] 8002c44: 62da str r2, [r3, #44] @ 0x2c /* Process unlocked */ __HAL_UNLOCK(hadc); 8002c46: 687b ldr r3, [r7, #4] 8002c48: 2200 movs r2, #0 8002c4a: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8002c4e: 2301 movs r3, #1 8002c50: e007 b.n 8002c62 while(ADC_IS_ENABLE(hadc) == RESET) 8002c52: 687b ldr r3, [r7, #4] 8002c54: 681b ldr r3, [r3, #0] 8002c56: 689b ldr r3, [r3, #8] 8002c58: f003 0301 and.w r3, r3, #1 8002c5c: 2b01 cmp r3, #1 8002c5e: d1d8 bne.n 8002c12 } } } /* Return HAL status */ return HAL_OK; 8002c60: 2300 movs r3, #0 } 8002c62: 4618 mov r0, r3 8002c64: 3710 adds r7, #16 8002c66: 46bd mov sp, r7 8002c68: bd80 pop {r7, pc} 8002c6a: bf00 nop 8002c6c: 20000004 .word 0x20000004 8002c70: 431bde83 .word 0x431bde83 08002c74 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 8002c74: b580 push {r7, lr} 8002c76: b084 sub sp, #16 8002c78: af00 add r7, sp, #0 8002c7a: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8002c7c: 2300 movs r3, #0 8002c7e: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 8002c80: 687b ldr r3, [r7, #4] 8002c82: 681b ldr r3, [r3, #0] 8002c84: 689b ldr r3, [r3, #8] 8002c86: f003 0301 and.w r3, r3, #1 8002c8a: 2b01 cmp r3, #1 8002c8c: d12e bne.n 8002cec { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 8002c8e: 687b ldr r3, [r7, #4] 8002c90: 681b ldr r3, [r3, #0] 8002c92: 689a ldr r2, [r3, #8] 8002c94: 687b ldr r3, [r7, #4] 8002c96: 681b ldr r3, [r3, #0] 8002c98: f022 0201 bic.w r2, r2, #1 8002c9c: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 8002c9e: f7ff fcbb bl 8002618 8002ca2: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 8002ca4: e01b b.n 8002cde { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 8002ca6: f7ff fcb7 bl 8002618 8002caa: 4602 mov r2, r0 8002cac: 68fb ldr r3, [r7, #12] 8002cae: 1ad3 subs r3, r2, r3 8002cb0: 2b02 cmp r3, #2 8002cb2: d914 bls.n 8002cde { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 8002cb4: 687b ldr r3, [r7, #4] 8002cb6: 681b ldr r3, [r3, #0] 8002cb8: 689b ldr r3, [r3, #8] 8002cba: f003 0301 and.w r3, r3, #1 8002cbe: 2b01 cmp r3, #1 8002cc0: d10d bne.n 8002cde { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8002cc2: 687b ldr r3, [r7, #4] 8002cc4: 6a9b ldr r3, [r3, #40] @ 0x28 8002cc6: f043 0210 orr.w r2, r3, #16 8002cca: 687b ldr r3, [r7, #4] 8002ccc: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002cce: 687b ldr r3, [r7, #4] 8002cd0: 6adb ldr r3, [r3, #44] @ 0x2c 8002cd2: f043 0201 orr.w r2, r3, #1 8002cd6: 687b ldr r3, [r7, #4] 8002cd8: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 8002cda: 2301 movs r3, #1 8002cdc: e007 b.n 8002cee while(ADC_IS_ENABLE(hadc) != RESET) 8002cde: 687b ldr r3, [r7, #4] 8002ce0: 681b ldr r3, [r3, #0] 8002ce2: 689b ldr r3, [r3, #8] 8002ce4: f003 0301 and.w r3, r3, #1 8002ce8: 2b01 cmp r3, #1 8002cea: d0dc beq.n 8002ca6 } } } /* Return HAL status */ return HAL_OK; 8002cec: 2300 movs r3, #0 } 8002cee: 4618 mov r0, r3 8002cf0: 3710 adds r7, #16 8002cf2: 46bd mov sp, r7 8002cf4: bd80 pop {r7, pc} 08002cf6 : * @brief DMA transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) { 8002cf6: b580 push {r7, lr} 8002cf8: b084 sub sp, #16 8002cfa: af00 add r7, sp, #0 8002cfc: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8002cfe: 687b ldr r3, [r7, #4] 8002d00: 6a5b ldr r3, [r3, #36] @ 0x24 8002d02: 60fb str r3, [r7, #12] /* Update state machine on conversion status if not in error state */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) 8002d04: 68fb ldr r3, [r7, #12] 8002d06: 6a9b ldr r3, [r3, #40] @ 0x28 8002d08: f003 0350 and.w r3, r3, #80 @ 0x50 8002d0c: 2b00 cmp r3, #0 8002d0e: d127 bne.n 8002d60 { /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 8002d10: 68fb ldr r3, [r7, #12] 8002d12: 6a9b ldr r3, [r3, #40] @ 0x28 8002d14: f443 7200 orr.w r2, r3, #512 @ 0x200 8002d18: 68fb ldr r3, [r7, #12] 8002d1a: 629a str r2, [r3, #40] @ 0x28 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ /* Note: On STM32F1 devices, in case of sequencer enabled */ /* (several ranks selected), end of conversion flag is raised */ /* at the end of the sequence. */ if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8002d1c: 68fb ldr r3, [r7, #12] 8002d1e: 681b ldr r3, [r3, #0] 8002d20: 689b ldr r3, [r3, #8] 8002d22: f403 2360 and.w r3, r3, #917504 @ 0xe0000 8002d26: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 8002d2a: d115 bne.n 8002d58 (hadc->Init.ContinuousConvMode == DISABLE) ) 8002d2c: 68fb ldr r3, [r7, #12] 8002d2e: 7b1b ldrb r3, [r3, #12] if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 8002d30: 2b00 cmp r3, #0 8002d32: d111 bne.n 8002d58 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); 8002d34: 68fb ldr r3, [r7, #12] 8002d36: 6a9b ldr r3, [r3, #40] @ 0x28 8002d38: f423 7280 bic.w r2, r3, #256 @ 0x100 8002d3c: 68fb ldr r3, [r7, #12] 8002d3e: 629a str r2, [r3, #40] @ 0x28 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) 8002d40: 68fb ldr r3, [r7, #12] 8002d42: 6a9b ldr r3, [r3, #40] @ 0x28 8002d44: f403 5380 and.w r3, r3, #4096 @ 0x1000 8002d48: 2b00 cmp r3, #0 8002d4a: d105 bne.n 8002d58 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); 8002d4c: 68fb ldr r3, [r7, #12] 8002d4e: 6a9b ldr r3, [r3, #40] @ 0x28 8002d50: f043 0201 orr.w r2, r3, #1 8002d54: 68fb ldr r3, [r7, #12] 8002d56: 629a str r2, [r3, #40] @ 0x28 /* Conversion complete callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvCpltCallback(hadc); #else HAL_ADC_ConvCpltCallback(hadc); 8002d58: 68f8 ldr r0, [r7, #12] 8002d5a: f7ff fe1d bl 8002998 else { /* Call DMA error callback */ hadc->DMA_Handle->XferErrorCallback(hdma); } } 8002d5e: e004 b.n 8002d6a hadc->DMA_Handle->XferErrorCallback(hdma); 8002d60: 68fb ldr r3, [r7, #12] 8002d62: 6a1b ldr r3, [r3, #32] 8002d64: 6b1b ldr r3, [r3, #48] @ 0x30 8002d66: 6878 ldr r0, [r7, #4] 8002d68: 4798 blx r3 } 8002d6a: bf00 nop 8002d6c: 3710 adds r7, #16 8002d6e: 46bd mov sp, r7 8002d70: bd80 pop {r7, pc} 08002d72 : * @brief DMA half transfer complete callback. * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) { 8002d72: b580 push {r7, lr} 8002d74: b084 sub sp, #16 8002d76: af00 add r7, sp, #0 8002d78: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8002d7a: 687b ldr r3, [r7, #4] 8002d7c: 6a5b ldr r3, [r3, #36] @ 0x24 8002d7e: 60fb str r3, [r7, #12] /* Half conversion callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ConvHalfCpltCallback(hadc); #else HAL_ADC_ConvHalfCpltCallback(hadc); 8002d80: 68f8 ldr r0, [r7, #12] 8002d82: f7ff fe12 bl 80029aa #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 8002d86: bf00 nop 8002d88: 3710 adds r7, #16 8002d8a: 46bd mov sp, r7 8002d8c: bd80 pop {r7, pc} 08002d8e : * @brief DMA error callback * @param hdma: pointer to DMA handle. * @retval None */ void ADC_DMAError(DMA_HandleTypeDef *hdma) { 8002d8e: b580 push {r7, lr} 8002d90: b084 sub sp, #16 8002d92: af00 add r7, sp, #0 8002d94: 6078 str r0, [r7, #4] /* Retrieve ADC handle corresponding to current DMA handle */ ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; 8002d96: 687b ldr r3, [r7, #4] 8002d98: 6a5b ldr r3, [r3, #36] @ 0x24 8002d9a: 60fb str r3, [r7, #12] /* Set ADC state */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); 8002d9c: 68fb ldr r3, [r7, #12] 8002d9e: 6a9b ldr r3, [r3, #40] @ 0x28 8002da0: f043 0240 orr.w r2, r3, #64 @ 0x40 8002da4: 68fb ldr r3, [r7, #12] 8002da6: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to DMA error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); 8002da8: 68fb ldr r3, [r7, #12] 8002daa: 6adb ldr r3, [r3, #44] @ 0x2c 8002dac: f043 0204 orr.w r2, r3, #4 8002db0: 68fb ldr r3, [r7, #12] 8002db2: 62da str r2, [r3, #44] @ 0x2c /* Error callback */ #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) hadc->ErrorCallback(hadc); #else HAL_ADC_ErrorCallback(hadc); 8002db4: 68f8 ldr r0, [r7, #12] 8002db6: f7ff fe01 bl 80029bc #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ } 8002dba: bf00 nop 8002dbc: 3710 adds r7, #16 8002dbe: 46bd mov sp, r7 8002dc0: bd80 pop {r7, pc} ... 08002dc4 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8002dc4: b480 push {r7} 8002dc6: b085 sub sp, #20 8002dc8: af00 add r7, sp, #0 8002dca: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8002dcc: 687b ldr r3, [r7, #4] 8002dce: f003 0307 and.w r3, r3, #7 8002dd2: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8002dd4: 4b0c ldr r3, [pc, #48] @ (8002e08 <__NVIC_SetPriorityGrouping+0x44>) 8002dd6: 68db ldr r3, [r3, #12] 8002dd8: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8002dda: 68ba ldr r2, [r7, #8] 8002ddc: f64f 03ff movw r3, #63743 @ 0xf8ff 8002de0: 4013 ands r3, r2 8002de2: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8002de4: 68fb ldr r3, [r7, #12] 8002de6: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8002de8: 68bb ldr r3, [r7, #8] 8002dea: 4313 orrs r3, r2 reg_value = (reg_value | 8002dec: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8002df0: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8002df4: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8002df6: 4a04 ldr r2, [pc, #16] @ (8002e08 <__NVIC_SetPriorityGrouping+0x44>) 8002df8: 68bb ldr r3, [r7, #8] 8002dfa: 60d3 str r3, [r2, #12] } 8002dfc: bf00 nop 8002dfe: 3714 adds r7, #20 8002e00: 46bd mov sp, r7 8002e02: bc80 pop {r7} 8002e04: 4770 bx lr 8002e06: bf00 nop 8002e08: e000ed00 .word 0xe000ed00 08002e0c <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8002e0c: b480 push {r7} 8002e0e: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8002e10: 4b04 ldr r3, [pc, #16] @ (8002e24 <__NVIC_GetPriorityGrouping+0x18>) 8002e12: 68db ldr r3, [r3, #12] 8002e14: 0a1b lsrs r3, r3, #8 8002e16: f003 0307 and.w r3, r3, #7 } 8002e1a: 4618 mov r0, r3 8002e1c: 46bd mov sp, r7 8002e1e: bc80 pop {r7} 8002e20: 4770 bx lr 8002e22: bf00 nop 8002e24: e000ed00 .word 0xe000ed00 08002e28 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8002e28: b480 push {r7} 8002e2a: b083 sub sp, #12 8002e2c: af00 add r7, sp, #0 8002e2e: 4603 mov r3, r0 8002e30: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8002e32: f997 3007 ldrsb.w r3, [r7, #7] 8002e36: 2b00 cmp r3, #0 8002e38: db0b blt.n 8002e52 <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8002e3a: 79fb ldrb r3, [r7, #7] 8002e3c: f003 021f and.w r2, r3, #31 8002e40: 4906 ldr r1, [pc, #24] @ (8002e5c <__NVIC_EnableIRQ+0x34>) 8002e42: f997 3007 ldrsb.w r3, [r7, #7] 8002e46: 095b lsrs r3, r3, #5 8002e48: 2001 movs r0, #1 8002e4a: fa00 f202 lsl.w r2, r0, r2 8002e4e: f841 2023 str.w r2, [r1, r3, lsl #2] } } 8002e52: bf00 nop 8002e54: 370c adds r7, #12 8002e56: 46bd mov sp, r7 8002e58: bc80 pop {r7} 8002e5a: 4770 bx lr 8002e5c: e000e100 .word 0xe000e100 08002e60 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8002e60: b480 push {r7} 8002e62: b083 sub sp, #12 8002e64: af00 add r7, sp, #0 8002e66: 4603 mov r3, r0 8002e68: 6039 str r1, [r7, #0] 8002e6a: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8002e6c: f997 3007 ldrsb.w r3, [r7, #7] 8002e70: 2b00 cmp r3, #0 8002e72: db0a blt.n 8002e8a <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002e74: 683b ldr r3, [r7, #0] 8002e76: b2da uxtb r2, r3 8002e78: 490c ldr r1, [pc, #48] @ (8002eac <__NVIC_SetPriority+0x4c>) 8002e7a: f997 3007 ldrsb.w r3, [r7, #7] 8002e7e: 0112 lsls r2, r2, #4 8002e80: b2d2 uxtb r2, r2 8002e82: 440b add r3, r1 8002e84: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8002e88: e00a b.n 8002ea0 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002e8a: 683b ldr r3, [r7, #0] 8002e8c: b2da uxtb r2, r3 8002e8e: 4908 ldr r1, [pc, #32] @ (8002eb0 <__NVIC_SetPriority+0x50>) 8002e90: 79fb ldrb r3, [r7, #7] 8002e92: f003 030f and.w r3, r3, #15 8002e96: 3b04 subs r3, #4 8002e98: 0112 lsls r2, r2, #4 8002e9a: b2d2 uxtb r2, r2 8002e9c: 440b add r3, r1 8002e9e: 761a strb r2, [r3, #24] } 8002ea0: bf00 nop 8002ea2: 370c adds r7, #12 8002ea4: 46bd mov sp, r7 8002ea6: bc80 pop {r7} 8002ea8: 4770 bx lr 8002eaa: bf00 nop 8002eac: e000e100 .word 0xe000e100 8002eb0: e000ed00 .word 0xe000ed00 08002eb4 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8002eb4: b480 push {r7} 8002eb6: b089 sub sp, #36 @ 0x24 8002eb8: af00 add r7, sp, #0 8002eba: 60f8 str r0, [r7, #12] 8002ebc: 60b9 str r1, [r7, #8] 8002ebe: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8002ec0: 68fb ldr r3, [r7, #12] 8002ec2: f003 0307 and.w r3, r3, #7 8002ec6: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8002ec8: 69fb ldr r3, [r7, #28] 8002eca: f1c3 0307 rsb r3, r3, #7 8002ece: 2b04 cmp r3, #4 8002ed0: bf28 it cs 8002ed2: 2304 movcs r3, #4 8002ed4: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8002ed6: 69fb ldr r3, [r7, #28] 8002ed8: 3304 adds r3, #4 8002eda: 2b06 cmp r3, #6 8002edc: d902 bls.n 8002ee4 8002ede: 69fb ldr r3, [r7, #28] 8002ee0: 3b03 subs r3, #3 8002ee2: e000 b.n 8002ee6 8002ee4: 2300 movs r3, #0 8002ee6: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002ee8: f04f 32ff mov.w r2, #4294967295 8002eec: 69bb ldr r3, [r7, #24] 8002eee: fa02 f303 lsl.w r3, r2, r3 8002ef2: 43da mvns r2, r3 8002ef4: 68bb ldr r3, [r7, #8] 8002ef6: 401a ands r2, r3 8002ef8: 697b ldr r3, [r7, #20] 8002efa: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8002efc: f04f 31ff mov.w r1, #4294967295 8002f00: 697b ldr r3, [r7, #20] 8002f02: fa01 f303 lsl.w r3, r1, r3 8002f06: 43d9 mvns r1, r3 8002f08: 687b ldr r3, [r7, #4] 8002f0a: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002f0c: 4313 orrs r3, r2 ); } 8002f0e: 4618 mov r0, r3 8002f10: 3724 adds r7, #36 @ 0x24 8002f12: 46bd mov sp, r7 8002f14: bc80 pop {r7} 8002f16: 4770 bx lr 08002f18 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8002f18: b580 push {r7, lr} 8002f1a: b082 sub sp, #8 8002f1c: af00 add r7, sp, #0 8002f1e: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8002f20: 687b ldr r3, [r7, #4] 8002f22: 3b01 subs r3, #1 8002f24: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8002f28: d301 bcc.n 8002f2e { return (1UL); /* Reload value impossible */ 8002f2a: 2301 movs r3, #1 8002f2c: e00f b.n 8002f4e } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8002f2e: 4a0a ldr r2, [pc, #40] @ (8002f58 ) 8002f30: 687b ldr r3, [r7, #4] 8002f32: 3b01 subs r3, #1 8002f34: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8002f36: 210f movs r1, #15 8002f38: f04f 30ff mov.w r0, #4294967295 8002f3c: f7ff ff90 bl 8002e60 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8002f40: 4b05 ldr r3, [pc, #20] @ (8002f58 ) 8002f42: 2200 movs r2, #0 8002f44: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8002f46: 4b04 ldr r3, [pc, #16] @ (8002f58 ) 8002f48: 2207 movs r2, #7 8002f4a: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8002f4c: 2300 movs r3, #0 } 8002f4e: 4618 mov r0, r3 8002f50: 3708 adds r7, #8 8002f52: 46bd mov sp, r7 8002f54: bd80 pop {r7, pc} 8002f56: bf00 nop 8002f58: e000e010 .word 0xe000e010 08002f5c : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8002f5c: b580 push {r7, lr} 8002f5e: b082 sub sp, #8 8002f60: af00 add r7, sp, #0 8002f62: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8002f64: 6878 ldr r0, [r7, #4] 8002f66: f7ff ff2d bl 8002dc4 <__NVIC_SetPriorityGrouping> } 8002f6a: bf00 nop 8002f6c: 3708 adds r7, #8 8002f6e: 46bd mov sp, r7 8002f70: bd80 pop {r7, pc} 08002f72 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8002f72: b580 push {r7, lr} 8002f74: b086 sub sp, #24 8002f76: af00 add r7, sp, #0 8002f78: 4603 mov r3, r0 8002f7a: 60b9 str r1, [r7, #8] 8002f7c: 607a str r2, [r7, #4] 8002f7e: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8002f80: 2300 movs r3, #0 8002f82: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8002f84: f7ff ff42 bl 8002e0c <__NVIC_GetPriorityGrouping> 8002f88: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8002f8a: 687a ldr r2, [r7, #4] 8002f8c: 68b9 ldr r1, [r7, #8] 8002f8e: 6978 ldr r0, [r7, #20] 8002f90: f7ff ff90 bl 8002eb4 8002f94: 4602 mov r2, r0 8002f96: f997 300f ldrsb.w r3, [r7, #15] 8002f9a: 4611 mov r1, r2 8002f9c: 4618 mov r0, r3 8002f9e: f7ff ff5f bl 8002e60 <__NVIC_SetPriority> } 8002fa2: bf00 nop 8002fa4: 3718 adds r7, #24 8002fa6: 46bd mov sp, r7 8002fa8: bd80 pop {r7, pc} 08002faa : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8002faa: b580 push {r7, lr} 8002fac: b082 sub sp, #8 8002fae: af00 add r7, sp, #0 8002fb0: 4603 mov r3, r0 8002fb2: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8002fb4: f997 3007 ldrsb.w r3, [r7, #7] 8002fb8: 4618 mov r0, r3 8002fba: f7ff ff35 bl 8002e28 <__NVIC_EnableIRQ> } 8002fbe: bf00 nop 8002fc0: 3708 adds r7, #8 8002fc2: 46bd mov sp, r7 8002fc4: bd80 pop {r7, pc} 08002fc6 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8002fc6: b580 push {r7, lr} 8002fc8: b082 sub sp, #8 8002fca: af00 add r7, sp, #0 8002fcc: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 8002fce: 6878 ldr r0, [r7, #4] 8002fd0: f7ff ffa2 bl 8002f18 8002fd4: 4603 mov r3, r0 } 8002fd6: 4618 mov r0, r3 8002fd8: 3708 adds r7, #8 8002fda: 46bd mov sp, r7 8002fdc: bd80 pop {r7, pc} 08002fde : /** * @brief This function handles SYSTICK interrupt request. * @retval None */ void HAL_SYSTICK_IRQHandler(void) { 8002fde: b580 push {r7, lr} 8002fe0: af00 add r7, sp, #0 HAL_SYSTICK_Callback(); 8002fe2: f7fe f8e1 bl 80011a8 } 8002fe6: bf00 nop 8002fe8: bd80 pop {r7, pc} ... 08002fec : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { 8002fec: b480 push {r7} 8002fee: b085 sub sp, #20 8002ff0: af00 add r7, sp, #0 8002ff2: 6078 str r0, [r7, #4] uint32_t tmp = 0U; 8002ff4: 2300 movs r3, #0 8002ff6: 60fb str r3, [r7, #12] /* Check the DMA handle allocation */ if(hdma == NULL) 8002ff8: 687b ldr r3, [r7, #4] 8002ffa: 2b00 cmp r3, #0 8002ffc: d101 bne.n 8003002 { return HAL_ERROR; 8002ffe: 2301 movs r3, #1 8003000: e043 b.n 800308a hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; hdma->DmaBaseAddress = DMA2; } #else /* DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; 8003002: 687b ldr r3, [r7, #4] 8003004: 681b ldr r3, [r3, #0] 8003006: 461a mov r2, r3 8003008: 4b22 ldr r3, [pc, #136] @ (8003094 ) 800300a: 4413 add r3, r2 800300c: 4a22 ldr r2, [pc, #136] @ (8003098 ) 800300e: fba2 2303 umull r2, r3, r2, r3 8003012: 091b lsrs r3, r3, #4 8003014: 009a lsls r2, r3, #2 8003016: 687b ldr r3, [r7, #4] 8003018: 641a str r2, [r3, #64] @ 0x40 hdma->DmaBaseAddress = DMA1; 800301a: 687b ldr r3, [r7, #4] 800301c: 4a1f ldr r2, [pc, #124] @ (800309c ) 800301e: 63da str r2, [r3, #60] @ 0x3c #endif /* DMA2 */ /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8003020: 687b ldr r3, [r7, #4] 8003022: 2202 movs r2, #2 8003024: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Get the CR register value */ tmp = hdma->Instance->CCR; 8003028: 687b ldr r3, [r7, #4] 800302a: 681b ldr r3, [r3, #0] 800302c: 681b ldr r3, [r3, #0] 800302e: 60fb str r3, [r7, #12] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ 8003030: 68fb ldr r3, [r7, #12] 8003032: f423 537f bic.w r3, r3, #16320 @ 0x3fc0 8003036: f023 0330 bic.w r3, r3, #48 @ 0x30 800303a: 60fb str r3, [r7, #12] DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ DMA_CCR_DIR)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | 800303c: 687b ldr r3, [r7, #4] 800303e: 685a ldr r2, [r3, #4] hdma->Init.PeriphInc | hdma->Init.MemInc | 8003040: 687b ldr r3, [r7, #4] 8003042: 689b ldr r3, [r3, #8] tmp |= hdma->Init.Direction | 8003044: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | 8003046: 687b ldr r3, [r7, #4] 8003048: 68db ldr r3, [r3, #12] 800304a: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 800304c: 687b ldr r3, [r7, #4] 800304e: 691b ldr r3, [r3, #16] hdma->Init.PeriphInc | hdma->Init.MemInc | 8003050: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 8003052: 687b ldr r3, [r7, #4] 8003054: 695b ldr r3, [r3, #20] 8003056: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 8003058: 687b ldr r3, [r7, #4] 800305a: 699b ldr r3, [r3, #24] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 800305c: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; 800305e: 687b ldr r3, [r7, #4] 8003060: 69db ldr r3, [r3, #28] 8003062: 4313 orrs r3, r2 tmp |= hdma->Init.Direction | 8003064: 68fa ldr r2, [r7, #12] 8003066: 4313 orrs r3, r2 8003068: 60fb str r3, [r7, #12] /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; 800306a: 687b ldr r3, [r7, #4] 800306c: 681b ldr r3, [r3, #0] 800306e: 68fa ldr r2, [r7, #12] 8003070: 601a str r2, [r3, #0] /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 8003072: 687b ldr r3, [r7, #4] 8003074: 2200 movs r2, #0 8003076: 639a str r2, [r3, #56] @ 0x38 /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; 8003078: 687b ldr r3, [r7, #4] 800307a: 2201 movs r2, #1 800307c: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; 8003080: 687b ldr r3, [r7, #4] 8003082: 2200 movs r2, #0 8003084: f883 2020 strb.w r2, [r3, #32] return HAL_OK; 8003088: 2300 movs r3, #0 } 800308a: 4618 mov r0, r3 800308c: 3714 adds r7, #20 800308e: 46bd mov sp, r7 8003090: bc80 pop {r7} 8003092: 4770 bx lr 8003094: bffdfff8 .word 0xbffdfff8 8003098: cccccccd .word 0xcccccccd 800309c: 40020000 .word 0x40020000 080030a0 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 80030a0: b580 push {r7, lr} 80030a2: b086 sub sp, #24 80030a4: af00 add r7, sp, #0 80030a6: 60f8 str r0, [r7, #12] 80030a8: 60b9 str r1, [r7, #8] 80030aa: 607a str r2, [r7, #4] 80030ac: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 80030ae: 2300 movs r3, #0 80030b0: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 80030b2: 68fb ldr r3, [r7, #12] 80030b4: f893 3020 ldrb.w r3, [r3, #32] 80030b8: 2b01 cmp r3, #1 80030ba: d101 bne.n 80030c0 80030bc: 2302 movs r3, #2 80030be: e04b b.n 8003158 80030c0: 68fb ldr r3, [r7, #12] 80030c2: 2201 movs r2, #1 80030c4: f883 2020 strb.w r2, [r3, #32] if(HAL_DMA_STATE_READY == hdma->State) 80030c8: 68fb ldr r3, [r7, #12] 80030ca: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 80030ce: b2db uxtb r3, r3 80030d0: 2b01 cmp r3, #1 80030d2: d13a bne.n 800314a { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 80030d4: 68fb ldr r3, [r7, #12] 80030d6: 2202 movs r2, #2 80030d8: f883 2021 strb.w r2, [r3, #33] @ 0x21 hdma->ErrorCode = HAL_DMA_ERROR_NONE; 80030dc: 68fb ldr r3, [r7, #12] 80030de: 2200 movs r2, #0 80030e0: 639a str r2, [r3, #56] @ 0x38 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); 80030e2: 68fb ldr r3, [r7, #12] 80030e4: 681b ldr r3, [r3, #0] 80030e6: 681a ldr r2, [r3, #0] 80030e8: 68fb ldr r3, [r7, #12] 80030ea: 681b ldr r3, [r3, #0] 80030ec: f022 0201 bic.w r2, r2, #1 80030f0: 601a str r2, [r3, #0] /* Configure the source, destination address and the data length & clear flags*/ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 80030f2: 683b ldr r3, [r7, #0] 80030f4: 687a ldr r2, [r7, #4] 80030f6: 68b9 ldr r1, [r7, #8] 80030f8: 68f8 ldr r0, [r7, #12] 80030fa: f000 f937 bl 800336c /* Enable the transfer complete interrupt */ /* Enable the transfer Error interrupt */ if(NULL != hdma->XferHalfCpltCallback) 80030fe: 68fb ldr r3, [r7, #12] 8003100: 6adb ldr r3, [r3, #44] @ 0x2c 8003102: 2b00 cmp r3, #0 8003104: d008 beq.n 8003118 { /* Enable the Half transfer complete interrupt as well */ __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8003106: 68fb ldr r3, [r7, #12] 8003108: 681b ldr r3, [r3, #0] 800310a: 681a ldr r2, [r3, #0] 800310c: 68fb ldr r3, [r7, #12] 800310e: 681b ldr r3, [r3, #0] 8003110: f042 020e orr.w r2, r2, #14 8003114: 601a str r2, [r3, #0] 8003116: e00f b.n 8003138 } else { __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 8003118: 68fb ldr r3, [r7, #12] 800311a: 681b ldr r3, [r3, #0] 800311c: 681a ldr r2, [r3, #0] 800311e: 68fb ldr r3, [r7, #12] 8003120: 681b ldr r3, [r3, #0] 8003122: f022 0204 bic.w r2, r2, #4 8003126: 601a str r2, [r3, #0] __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); 8003128: 68fb ldr r3, [r7, #12] 800312a: 681b ldr r3, [r3, #0] 800312c: 681a ldr r2, [r3, #0] 800312e: 68fb ldr r3, [r7, #12] 8003130: 681b ldr r3, [r3, #0] 8003132: f042 020a orr.w r2, r2, #10 8003136: 601a str r2, [r3, #0] } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); 8003138: 68fb ldr r3, [r7, #12] 800313a: 681b ldr r3, [r3, #0] 800313c: 681a ldr r2, [r3, #0] 800313e: 68fb ldr r3, [r7, #12] 8003140: 681b ldr r3, [r3, #0] 8003142: f042 0201 orr.w r2, r2, #1 8003146: 601a str r2, [r3, #0] 8003148: e005 b.n 8003156 } else { /* Process Unlocked */ __HAL_UNLOCK(hdma); 800314a: 68fb ldr r3, [r7, #12] 800314c: 2200 movs r2, #0 800314e: f883 2020 strb.w r2, [r3, #32] /* Remain BUSY */ status = HAL_BUSY; 8003152: 2302 movs r3, #2 8003154: 75fb strb r3, [r7, #23] } return status; 8003156: 7dfb ldrb r3, [r7, #23] } 8003158: 4618 mov r0, r3 800315a: 3718 adds r7, #24 800315c: 46bd mov sp, r7 800315e: bd80 pop {r7, pc} 08003160 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { 8003160: b580 push {r7, lr} 8003162: b084 sub sp, #16 8003164: af00 add r7, sp, #0 8003166: 6078 str r0, [r7, #4] uint32_t flag_it = hdma->DmaBaseAddress->ISR; 8003168: 687b ldr r3, [r7, #4] 800316a: 6bdb ldr r3, [r3, #60] @ 0x3c 800316c: 681b ldr r3, [r3, #0] 800316e: 60fb str r3, [r7, #12] uint32_t source_it = hdma->Instance->CCR; 8003170: 687b ldr r3, [r7, #4] 8003172: 681b ldr r3, [r3, #0] 8003174: 681b ldr r3, [r3, #0] 8003176: 60bb str r3, [r7, #8] /* Half Transfer Complete Interrupt management ******************************/ if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) 8003178: 687b ldr r3, [r7, #4] 800317a: 6c1b ldr r3, [r3, #64] @ 0x40 800317c: 2204 movs r2, #4 800317e: 409a lsls r2, r3 8003180: 68fb ldr r3, [r7, #12] 8003182: 4013 ands r3, r2 8003184: 2b00 cmp r3, #0 8003186: d04f beq.n 8003228 8003188: 68bb ldr r3, [r7, #8] 800318a: f003 0304 and.w r3, r3, #4 800318e: 2b00 cmp r3, #0 8003190: d04a beq.n 8003228 { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8003192: 687b ldr r3, [r7, #4] 8003194: 681b ldr r3, [r3, #0] 8003196: 681b ldr r3, [r3, #0] 8003198: f003 0320 and.w r3, r3, #32 800319c: 2b00 cmp r3, #0 800319e: d107 bne.n 80031b0 { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); 80031a0: 687b ldr r3, [r7, #4] 80031a2: 681b ldr r3, [r3, #0] 80031a4: 681a ldr r2, [r3, #0] 80031a6: 687b ldr r3, [r7, #4] 80031a8: 681b ldr r3, [r3, #0] 80031aa: f022 0204 bic.w r2, r2, #4 80031ae: 601a str r2, [r3, #0] } /* Clear the half transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 80031b0: 687b ldr r3, [r7, #4] 80031b2: 681b ldr r3, [r3, #0] 80031b4: 4a66 ldr r2, [pc, #408] @ (8003350 ) 80031b6: 4293 cmp r3, r2 80031b8: d029 beq.n 800320e 80031ba: 687b ldr r3, [r7, #4] 80031bc: 681b ldr r3, [r3, #0] 80031be: 4a65 ldr r2, [pc, #404] @ (8003354 ) 80031c0: 4293 cmp r3, r2 80031c2: d022 beq.n 800320a 80031c4: 687b ldr r3, [r7, #4] 80031c6: 681b ldr r3, [r3, #0] 80031c8: 4a63 ldr r2, [pc, #396] @ (8003358 ) 80031ca: 4293 cmp r3, r2 80031cc: d01a beq.n 8003204 80031ce: 687b ldr r3, [r7, #4] 80031d0: 681b ldr r3, [r3, #0] 80031d2: 4a62 ldr r2, [pc, #392] @ (800335c ) 80031d4: 4293 cmp r3, r2 80031d6: d012 beq.n 80031fe 80031d8: 687b ldr r3, [r7, #4] 80031da: 681b ldr r3, [r3, #0] 80031dc: 4a60 ldr r2, [pc, #384] @ (8003360 ) 80031de: 4293 cmp r3, r2 80031e0: d00a beq.n 80031f8 80031e2: 687b ldr r3, [r7, #4] 80031e4: 681b ldr r3, [r3, #0] 80031e6: 4a5f ldr r2, [pc, #380] @ (8003364 ) 80031e8: 4293 cmp r3, r2 80031ea: d102 bne.n 80031f2 80031ec: f44f 0380 mov.w r3, #4194304 @ 0x400000 80031f0: e00e b.n 8003210 80031f2: f04f 6380 mov.w r3, #67108864 @ 0x4000000 80031f6: e00b b.n 8003210 80031f8: f44f 2380 mov.w r3, #262144 @ 0x40000 80031fc: e008 b.n 8003210 80031fe: f44f 4380 mov.w r3, #16384 @ 0x4000 8003202: e005 b.n 8003210 8003204: f44f 6380 mov.w r3, #1024 @ 0x400 8003208: e002 b.n 8003210 800320a: 2340 movs r3, #64 @ 0x40 800320c: e000 b.n 8003210 800320e: 2304 movs r3, #4 8003210: 4a55 ldr r2, [pc, #340] @ (8003368 ) 8003212: 6053 str r3, [r2, #4] /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) 8003214: 687b ldr r3, [r7, #4] 8003216: 6adb ldr r3, [r3, #44] @ 0x2c 8003218: 2b00 cmp r3, #0 800321a: f000 8094 beq.w 8003346 { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); 800321e: 687b ldr r3, [r7, #4] 8003220: 6adb ldr r3, [r3, #44] @ 0x2c 8003222: 6878 ldr r0, [r7, #4] 8003224: 4798 blx r3 if(hdma->XferHalfCpltCallback != NULL) 8003226: e08e b.n 8003346 } } /* Transfer Complete Interrupt management ***********************************/ else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) 8003228: 687b ldr r3, [r7, #4] 800322a: 6c1b ldr r3, [r3, #64] @ 0x40 800322c: 2202 movs r2, #2 800322e: 409a lsls r2, r3 8003230: 68fb ldr r3, [r7, #12] 8003232: 4013 ands r3, r2 8003234: 2b00 cmp r3, #0 8003236: d056 beq.n 80032e6 8003238: 68bb ldr r3, [r7, #8] 800323a: f003 0302 and.w r3, r3, #2 800323e: 2b00 cmp r3, #0 8003240: d051 beq.n 80032e6 { if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) 8003242: 687b ldr r3, [r7, #4] 8003244: 681b ldr r3, [r3, #0] 8003246: 681b ldr r3, [r3, #0] 8003248: f003 0320 and.w r3, r3, #32 800324c: 2b00 cmp r3, #0 800324e: d10b bne.n 8003268 { /* Disable the transfer complete and error interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); 8003250: 687b ldr r3, [r7, #4] 8003252: 681b ldr r3, [r3, #0] 8003254: 681a ldr r2, [r3, #0] 8003256: 687b ldr r3, [r7, #4] 8003258: 681b ldr r3, [r3, #0] 800325a: f022 020a bic.w r2, r2, #10 800325e: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8003260: 687b ldr r3, [r7, #4] 8003262: 2201 movs r2, #1 8003264: f883 2021 strb.w r2, [r3, #33] @ 0x21 } /* Clear the transfer complete flag */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); 8003268: 687b ldr r3, [r7, #4] 800326a: 681b ldr r3, [r3, #0] 800326c: 4a38 ldr r2, [pc, #224] @ (8003350 ) 800326e: 4293 cmp r3, r2 8003270: d029 beq.n 80032c6 8003272: 687b ldr r3, [r7, #4] 8003274: 681b ldr r3, [r3, #0] 8003276: 4a37 ldr r2, [pc, #220] @ (8003354 ) 8003278: 4293 cmp r3, r2 800327a: d022 beq.n 80032c2 800327c: 687b ldr r3, [r7, #4] 800327e: 681b ldr r3, [r3, #0] 8003280: 4a35 ldr r2, [pc, #212] @ (8003358 ) 8003282: 4293 cmp r3, r2 8003284: d01a beq.n 80032bc 8003286: 687b ldr r3, [r7, #4] 8003288: 681b ldr r3, [r3, #0] 800328a: 4a34 ldr r2, [pc, #208] @ (800335c ) 800328c: 4293 cmp r3, r2 800328e: d012 beq.n 80032b6 8003290: 687b ldr r3, [r7, #4] 8003292: 681b ldr r3, [r3, #0] 8003294: 4a32 ldr r2, [pc, #200] @ (8003360 ) 8003296: 4293 cmp r3, r2 8003298: d00a beq.n 80032b0 800329a: 687b ldr r3, [r7, #4] 800329c: 681b ldr r3, [r3, #0] 800329e: 4a31 ldr r2, [pc, #196] @ (8003364 ) 80032a0: 4293 cmp r3, r2 80032a2: d102 bne.n 80032aa 80032a4: f44f 1300 mov.w r3, #2097152 @ 0x200000 80032a8: e00e b.n 80032c8 80032aa: f04f 7300 mov.w r3, #33554432 @ 0x2000000 80032ae: e00b b.n 80032c8 80032b0: f44f 3300 mov.w r3, #131072 @ 0x20000 80032b4: e008 b.n 80032c8 80032b6: f44f 5300 mov.w r3, #8192 @ 0x2000 80032ba: e005 b.n 80032c8 80032bc: f44f 7300 mov.w r3, #512 @ 0x200 80032c0: e002 b.n 80032c8 80032c2: 2320 movs r3, #32 80032c4: e000 b.n 80032c8 80032c6: 2302 movs r3, #2 80032c8: 4a27 ldr r2, [pc, #156] @ (8003368 ) 80032ca: 6053 str r3, [r2, #4] /* Process Unlocked */ __HAL_UNLOCK(hdma); 80032cc: 687b ldr r3, [r7, #4] 80032ce: 2200 movs r2, #0 80032d0: f883 2020 strb.w r2, [r3, #32] if(hdma->XferCpltCallback != NULL) 80032d4: 687b ldr r3, [r7, #4] 80032d6: 6a9b ldr r3, [r3, #40] @ 0x28 80032d8: 2b00 cmp r3, #0 80032da: d034 beq.n 8003346 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); 80032dc: 687b ldr r3, [r7, #4] 80032de: 6a9b ldr r3, [r3, #40] @ 0x28 80032e0: 6878 ldr r0, [r7, #4] 80032e2: 4798 blx r3 if(hdma->XferCpltCallback != NULL) 80032e4: e02f b.n 8003346 } } /* Transfer Error Interrupt management **************************************/ else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) 80032e6: 687b ldr r3, [r7, #4] 80032e8: 6c1b ldr r3, [r3, #64] @ 0x40 80032ea: 2208 movs r2, #8 80032ec: 409a lsls r2, r3 80032ee: 68fb ldr r3, [r7, #12] 80032f0: 4013 ands r3, r2 80032f2: 2b00 cmp r3, #0 80032f4: d028 beq.n 8003348 80032f6: 68bb ldr r3, [r7, #8] 80032f8: f003 0308 and.w r3, r3, #8 80032fc: 2b00 cmp r3, #0 80032fe: d023 beq.n 8003348 { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8003300: 687b ldr r3, [r7, #4] 8003302: 681b ldr r3, [r3, #0] 8003304: 681a ldr r2, [r3, #0] 8003306: 687b ldr r3, [r7, #4] 8003308: 681b ldr r3, [r3, #0] 800330a: f022 020e bic.w r2, r2, #14 800330e: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8003310: 687b ldr r3, [r7, #4] 8003312: 6c1a ldr r2, [r3, #64] @ 0x40 8003314: 687b ldr r3, [r7, #4] 8003316: 6bdb ldr r3, [r3, #60] @ 0x3c 8003318: 2101 movs r1, #1 800331a: fa01 f202 lsl.w r2, r1, r2 800331e: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; 8003320: 687b ldr r3, [r7, #4] 8003322: 2201 movs r2, #1 8003324: 639a str r2, [r3, #56] @ 0x38 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8003326: 687b ldr r3, [r7, #4] 8003328: 2201 movs r2, #1 800332a: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 800332e: 687b ldr r3, [r7, #4] 8003330: 2200 movs r2, #0 8003332: f883 2020 strb.w r2, [r3, #32] if (hdma->XferErrorCallback != NULL) 8003336: 687b ldr r3, [r7, #4] 8003338: 6b1b ldr r3, [r3, #48] @ 0x30 800333a: 2b00 cmp r3, #0 800333c: d004 beq.n 8003348 { /* Transfer error callback */ hdma->XferErrorCallback(hdma); 800333e: 687b ldr r3, [r7, #4] 8003340: 6b1b ldr r3, [r3, #48] @ 0x30 8003342: 6878 ldr r0, [r7, #4] 8003344: 4798 blx r3 } } return; 8003346: bf00 nop 8003348: bf00 nop } 800334a: 3710 adds r7, #16 800334c: 46bd mov sp, r7 800334e: bd80 pop {r7, pc} 8003350: 40020008 .word 0x40020008 8003354: 4002001c .word 0x4002001c 8003358: 40020030 .word 0x40020030 800335c: 40020044 .word 0x40020044 8003360: 40020058 .word 0x40020058 8003364: 4002006c .word 0x4002006c 8003368: 40020000 .word 0x40020000 0800336c : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 800336c: b480 push {r7} 800336e: b085 sub sp, #20 8003370: af00 add r7, sp, #0 8003372: 60f8 str r0, [r7, #12] 8003374: 60b9 str r1, [r7, #8] 8003376: 607a str r2, [r7, #4] 8003378: 603b str r3, [r7, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 800337a: 68fb ldr r3, [r7, #12] 800337c: 6c1a ldr r2, [r3, #64] @ 0x40 800337e: 68fb ldr r3, [r7, #12] 8003380: 6bdb ldr r3, [r3, #60] @ 0x3c 8003382: 2101 movs r1, #1 8003384: fa01 f202 lsl.w r2, r1, r2 8003388: 605a str r2, [r3, #4] /* Configure DMA Channel data length */ hdma->Instance->CNDTR = DataLength; 800338a: 68fb ldr r3, [r7, #12] 800338c: 681b ldr r3, [r3, #0] 800338e: 683a ldr r2, [r7, #0] 8003390: 605a str r2, [r3, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 8003392: 68fb ldr r3, [r7, #12] 8003394: 685b ldr r3, [r3, #4] 8003396: 2b10 cmp r3, #16 8003398: d108 bne.n 80033ac { /* Configure DMA Channel destination address */ hdma->Instance->CPAR = DstAddress; 800339a: 68fb ldr r3, [r7, #12] 800339c: 681b ldr r3, [r3, #0] 800339e: 687a ldr r2, [r7, #4] 80033a0: 609a str r2, [r3, #8] /* Configure DMA Channel source address */ hdma->Instance->CMAR = SrcAddress; 80033a2: 68fb ldr r3, [r7, #12] 80033a4: 681b ldr r3, [r3, #0] 80033a6: 68ba ldr r2, [r7, #8] 80033a8: 60da str r2, [r3, #12] hdma->Instance->CPAR = SrcAddress; /* Configure DMA Channel destination address */ hdma->Instance->CMAR = DstAddress; } } 80033aa: e007 b.n 80033bc hdma->Instance->CPAR = SrcAddress; 80033ac: 68fb ldr r3, [r7, #12] 80033ae: 681b ldr r3, [r3, #0] 80033b0: 68ba ldr r2, [r7, #8] 80033b2: 609a str r2, [r3, #8] hdma->Instance->CMAR = DstAddress; 80033b4: 68fb ldr r3, [r7, #12] 80033b6: 681b ldr r3, [r3, #0] 80033b8: 687a ldr r2, [r7, #4] 80033ba: 60da str r2, [r3, #12] } 80033bc: bf00 nop 80033be: 3714 adds r7, #20 80033c0: 46bd mov sp, r7 80033c2: bc80 pop {r7} 80033c4: 4770 bx lr ... 080033c8 : * @param Data: Specifies the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { 80033c8: b5f0 push {r4, r5, r6, r7, lr} 80033ca: b087 sub sp, #28 80033cc: af00 add r7, sp, #0 80033ce: 60f8 str r0, [r7, #12] 80033d0: 60b9 str r1, [r7, #8] 80033d2: e9c7 2300 strd r2, r3, [r7] HAL_StatusTypeDef status = HAL_ERROR; 80033d6: 2301 movs r3, #1 80033d8: 75fb strb r3, [r7, #23] uint8_t index = 0; 80033da: 2300 movs r3, #0 80033dc: 75bb strb r3, [r7, #22] uint8_t nbiterations = 0; 80033de: 2300 movs r3, #0 80033e0: 757b strb r3, [r7, #21] /* Process Locked */ __HAL_LOCK(&pFlash); 80033e2: 4b2f ldr r3, [pc, #188] @ (80034a0 ) 80033e4: 7e1b ldrb r3, [r3, #24] 80033e6: 2b01 cmp r3, #1 80033e8: d101 bne.n 80033ee 80033ea: 2302 movs r3, #2 80033ec: e054 b.n 8003498 80033ee: 4b2c ldr r3, [pc, #176] @ (80034a0 ) 80033f0: 2201 movs r2, #1 80033f2: 761a strb r2, [r3, #24] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 80033f4: f24c 3050 movw r0, #50000 @ 0xc350 80033f8: f000 f8a8 bl 800354c 80033fc: 4603 mov r3, r0 80033fe: 75fb strb r3, [r7, #23] /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE); } #endif /* FLASH_BANK2_END */ if(status == HAL_OK) 8003400: 7dfb ldrb r3, [r7, #23] 8003402: 2b00 cmp r3, #0 8003404: d144 bne.n 8003490 { if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 8003406: 68fb ldr r3, [r7, #12] 8003408: 2b01 cmp r3, #1 800340a: d102 bne.n 8003412 { /* Program halfword (16-bit) at a specified address. */ nbiterations = 1U; 800340c: 2301 movs r3, #1 800340e: 757b strb r3, [r7, #21] 8003410: e007 b.n 8003422 } else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) 8003412: 68fb ldr r3, [r7, #12] 8003414: 2b02 cmp r3, #2 8003416: d102 bne.n 800341e { /* Program word (32-bit = 2*16-bit) at a specified address. */ nbiterations = 2U; 8003418: 2302 movs r3, #2 800341a: 757b strb r3, [r7, #21] 800341c: e001 b.n 8003422 } else { /* Program double word (64-bit = 4*16-bit) at a specified address. */ nbiterations = 4U; 800341e: 2304 movs r3, #4 8003420: 757b strb r3, [r7, #21] } for (index = 0U; index < nbiterations; index++) 8003422: 2300 movs r3, #0 8003424: 75bb strb r3, [r7, #22] 8003426: e02d b.n 8003484 { FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); 8003428: 7dbb ldrb r3, [r7, #22] 800342a: 005a lsls r2, r3, #1 800342c: 68bb ldr r3, [r7, #8] 800342e: eb02 0c03 add.w ip, r2, r3 8003432: 7dbb ldrb r3, [r7, #22] 8003434: 0119 lsls r1, r3, #4 8003436: e9d7 2300 ldrd r2, r3, [r7] 800343a: f1c1 0620 rsb r6, r1, #32 800343e: f1a1 0020 sub.w r0, r1, #32 8003442: fa22 f401 lsr.w r4, r2, r1 8003446: fa03 f606 lsl.w r6, r3, r6 800344a: 4334 orrs r4, r6 800344c: fa23 f000 lsr.w r0, r3, r0 8003450: 4304 orrs r4, r0 8003452: fa23 f501 lsr.w r5, r3, r1 8003456: b2a3 uxth r3, r4 8003458: 4619 mov r1, r3 800345a: 4660 mov r0, ip 800345c: f000 f85a bl 8003514 #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8003460: f24c 3050 movw r0, #50000 @ 0xc350 8003464: f000 f872 bl 800354c 8003468: 4603 mov r3, r0 800346a: 75fb strb r3, [r7, #23] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PG); 800346c: 4b0d ldr r3, [pc, #52] @ (80034a4 ) 800346e: 691b ldr r3, [r3, #16] 8003470: 4a0c ldr r2, [pc, #48] @ (80034a4 ) 8003472: f023 0301 bic.w r3, r3, #1 8003476: 6113 str r3, [r2, #16] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* In case of error, stop programation procedure */ if (status != HAL_OK) 8003478: 7dfb ldrb r3, [r7, #23] 800347a: 2b00 cmp r3, #0 800347c: d107 bne.n 800348e for (index = 0U; index < nbiterations; index++) 800347e: 7dbb ldrb r3, [r7, #22] 8003480: 3301 adds r3, #1 8003482: 75bb strb r3, [r7, #22] 8003484: 7dba ldrb r2, [r7, #22] 8003486: 7d7b ldrb r3, [r7, #21] 8003488: 429a cmp r2, r3 800348a: d3cd bcc.n 8003428 800348c: e000 b.n 8003490 { break; 800348e: bf00 nop } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 8003490: 4b03 ldr r3, [pc, #12] @ (80034a0 ) 8003492: 2200 movs r2, #0 8003494: 761a strb r2, [r3, #24] return status; 8003496: 7dfb ldrb r3, [r7, #23] } 8003498: 4618 mov r0, r3 800349a: 371c adds r7, #28 800349c: 46bd mov sp, r7 800349e: bdf0 pop {r4, r5, r6, r7, pc} 80034a0: 200003f0 .word 0x200003f0 80034a4: 40022000 .word 0x40022000 080034a8 : /** * @brief Unlock the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Unlock(void) { 80034a8: b480 push {r7} 80034aa: b083 sub sp, #12 80034ac: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 80034ae: 2300 movs r3, #0 80034b0: 71fb strb r3, [r7, #7] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80034b2: 4b0d ldr r3, [pc, #52] @ (80034e8 ) 80034b4: 691b ldr r3, [r3, #16] 80034b6: f003 0380 and.w r3, r3, #128 @ 0x80 80034ba: 2b00 cmp r3, #0 80034bc: d00d beq.n 80034da { /* Authorize the FLASH Registers access */ WRITE_REG(FLASH->KEYR, FLASH_KEY1); 80034be: 4b0a ldr r3, [pc, #40] @ (80034e8 ) 80034c0: 4a0a ldr r2, [pc, #40] @ (80034ec ) 80034c2: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); 80034c4: 4b08 ldr r3, [pc, #32] @ (80034e8 ) 80034c6: 4a0a ldr r2, [pc, #40] @ (80034f0 ) 80034c8: 605a str r2, [r3, #4] /* Verify Flash is unlocked */ if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) 80034ca: 4b07 ldr r3, [pc, #28] @ (80034e8 ) 80034cc: 691b ldr r3, [r3, #16] 80034ce: f003 0380 and.w r3, r3, #128 @ 0x80 80034d2: 2b00 cmp r3, #0 80034d4: d001 beq.n 80034da { status = HAL_ERROR; 80034d6: 2301 movs r3, #1 80034d8: 71fb strb r3, [r7, #7] status = HAL_ERROR; } } #endif /* FLASH_BANK2_END */ return status; 80034da: 79fb ldrb r3, [r7, #7] } 80034dc: 4618 mov r0, r3 80034de: 370c adds r7, #12 80034e0: 46bd mov sp, r7 80034e2: bc80 pop {r7} 80034e4: 4770 bx lr 80034e6: bf00 nop 80034e8: 40022000 .word 0x40022000 80034ec: 45670123 .word 0x45670123 80034f0: cdef89ab .word 0xcdef89ab 080034f4 : /** * @brief Locks the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Lock(void) { 80034f4: b480 push {r7} 80034f6: af00 add r7, sp, #0 /* Set the LOCK Bit to lock the FLASH Registers access */ SET_BIT(FLASH->CR, FLASH_CR_LOCK); 80034f8: 4b05 ldr r3, [pc, #20] @ (8003510 ) 80034fa: 691b ldr r3, [r3, #16] 80034fc: 4a04 ldr r2, [pc, #16] @ (8003510 ) 80034fe: f043 0380 orr.w r3, r3, #128 @ 0x80 8003502: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) /* Set the LOCK Bit to lock the FLASH BANK2 Registers access */ SET_BIT(FLASH->CR2, FLASH_CR2_LOCK); #endif /* FLASH_BANK2_END */ return HAL_OK; 8003504: 2300 movs r3, #0 } 8003506: 4618 mov r0, r3 8003508: 46bd mov sp, r7 800350a: bc80 pop {r7} 800350c: 4770 bx lr 800350e: bf00 nop 8003510: 40022000 .word 0x40022000 08003514 : * @param Address specify the address to be programmed. * @param Data specify the data to be programmed. * @retval None */ static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) { 8003514: b480 push {r7} 8003516: b083 sub sp, #12 8003518: af00 add r7, sp, #0 800351a: 6078 str r0, [r7, #4] 800351c: 460b mov r3, r1 800351e: 807b strh r3, [r7, #2] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8003520: 4b08 ldr r3, [pc, #32] @ (8003544 ) 8003522: 2200 movs r2, #0 8003524: 61da str r2, [r3, #28] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Proceed to program the new data */ SET_BIT(FLASH->CR, FLASH_CR_PG); 8003526: 4b08 ldr r3, [pc, #32] @ (8003548 ) 8003528: 691b ldr r3, [r3, #16] 800352a: 4a07 ldr r2, [pc, #28] @ (8003548 ) 800352c: f043 0301 orr.w r3, r3, #1 8003530: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* Write data in the address */ *(__IO uint16_t*)Address = Data; 8003532: 687b ldr r3, [r7, #4] 8003534: 887a ldrh r2, [r7, #2] 8003536: 801a strh r2, [r3, #0] } 8003538: bf00 nop 800353a: 370c adds r7, #12 800353c: 46bd mov sp, r7 800353e: bc80 pop {r7} 8003540: 4770 bx lr 8003542: bf00 nop 8003544: 200003f0 .word 0x200003f0 8003548: 40022000 .word 0x40022000 0800354c : * @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operation timeout * @retval HAL Status */ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) { 800354c: b580 push {r7, lr} 800354e: b084 sub sp, #16 8003550: af00 add r7, sp, #0 8003552: 6078 str r0, [r7, #4] /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. Even if the FLASH operation fails, the BUSY flag will be reset and an error flag will be set */ uint32_t tickstart = HAL_GetTick(); 8003554: f7ff f860 bl 8002618 8003558: 60f8 str r0, [r7, #12] while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 800355a: e010 b.n 800357e { if (Timeout != HAL_MAX_DELAY) 800355c: 687b ldr r3, [r7, #4] 800355e: f1b3 3fff cmp.w r3, #4294967295 8003562: d00c beq.n 800357e { if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) 8003564: 687b ldr r3, [r7, #4] 8003566: 2b00 cmp r3, #0 8003568: d007 beq.n 800357a 800356a: f7ff f855 bl 8002618 800356e: 4602 mov r2, r0 8003570: 68fb ldr r3, [r7, #12] 8003572: 1ad3 subs r3, r2, r3 8003574: 687a ldr r2, [r7, #4] 8003576: 429a cmp r2, r3 8003578: d201 bcs.n 800357e { return HAL_TIMEOUT; 800357a: 2303 movs r3, #3 800357c: e025 b.n 80035ca while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) 800357e: 4b15 ldr r3, [pc, #84] @ (80035d4 ) 8003580: 68db ldr r3, [r3, #12] 8003582: f003 0301 and.w r3, r3, #1 8003586: 2b00 cmp r3, #0 8003588: d1e8 bne.n 800355c } } } /* Check FLASH End of Operation flag */ if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) 800358a: 4b12 ldr r3, [pc, #72] @ (80035d4 ) 800358c: 68db ldr r3, [r3, #12] 800358e: f003 0320 and.w r3, r3, #32 8003592: 2b00 cmp r3, #0 8003594: d002 beq.n 800359c { /* Clear FLASH End of Operation pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); 8003596: 4b0f ldr r3, [pc, #60] @ (80035d4 ) 8003598: 2220 movs r2, #32 800359a: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 800359c: 4b0d ldr r3, [pc, #52] @ (80035d4 ) 800359e: 68db ldr r3, [r3, #12] 80035a0: f003 0310 and.w r3, r3, #16 80035a4: 2b00 cmp r3, #0 80035a6: d10b bne.n 80035c0 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80035a8: 4b0a ldr r3, [pc, #40] @ (80035d4 ) 80035aa: 69db ldr r3, [r3, #28] 80035ac: f003 0301 and.w r3, r3, #1 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || 80035b0: 2b00 cmp r3, #0 80035b2: d105 bne.n 80035c0 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 80035b4: 4b07 ldr r3, [pc, #28] @ (80035d4 ) 80035b6: 68db ldr r3, [r3, #12] 80035b8: f003 0304 and.w r3, r3, #4 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || 80035bc: 2b00 cmp r3, #0 80035be: d003 beq.n 80035c8 { /*Save the error code*/ FLASH_SetErrorCode(); 80035c0: f000 f80a bl 80035d8 return HAL_ERROR; 80035c4: 2301 movs r3, #1 80035c6: e000 b.n 80035ca } /* There is no error flag set */ return HAL_OK; 80035c8: 2300 movs r3, #0 } 80035ca: 4618 mov r0, r3 80035cc: 3710 adds r7, #16 80035ce: 46bd mov sp, r7 80035d0: bd80 pop {r7, pc} 80035d2: bf00 nop 80035d4: 40022000 .word 0x40022000 080035d8 : /** * @brief Set the specific FLASH error flag. * @retval None */ static void FLASH_SetErrorCode(void) { 80035d8: b480 push {r7} 80035da: b083 sub sp, #12 80035dc: af00 add r7, sp, #0 uint32_t flags = 0U; 80035de: 2300 movs r3, #0 80035e0: 607b str r3, [r7, #4] #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) 80035e2: 4b23 ldr r3, [pc, #140] @ (8003670 ) 80035e4: 68db ldr r3, [r3, #12] 80035e6: f003 0310 and.w r3, r3, #16 80035ea: 2b00 cmp r3, #0 80035ec: d009 beq.n 8003602 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; 80035ee: 4b21 ldr r3, [pc, #132] @ (8003674 ) 80035f0: 69db ldr r3, [r3, #28] 80035f2: f043 0302 orr.w r3, r3, #2 80035f6: 4a1f ldr r2, [pc, #124] @ (8003674 ) 80035f8: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; 80035fa: 687b ldr r3, [r7, #4] 80035fc: f043 0310 orr.w r3, r3, #16 8003600: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) 8003602: 4b1b ldr r3, [pc, #108] @ (8003670 ) 8003604: 68db ldr r3, [r3, #12] 8003606: f003 0304 and.w r3, r3, #4 800360a: 2b00 cmp r3, #0 800360c: d009 beq.n 8003622 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; 800360e: 4b19 ldr r3, [pc, #100] @ (8003674 ) 8003610: 69db ldr r3, [r3, #28] 8003612: f043 0301 orr.w r3, r3, #1 8003616: 4a17 ldr r2, [pc, #92] @ (8003674 ) 8003618: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; 800361a: 687b ldr r3, [r7, #4] 800361c: f043 0304 orr.w r3, r3, #4 8003620: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) 8003622: 4b13 ldr r3, [pc, #76] @ (8003670 ) 8003624: 69db ldr r3, [r3, #28] 8003626: f003 0301 and.w r3, r3, #1 800362a: 2b00 cmp r3, #0 800362c: d00b beq.n 8003646 { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; 800362e: 4b11 ldr r3, [pc, #68] @ (8003674 ) 8003630: 69db ldr r3, [r3, #28] 8003632: f043 0304 orr.w r3, r3, #4 8003636: 4a0f ldr r2, [pc, #60] @ (8003674 ) 8003638: 61d3 str r3, [r2, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); 800363a: 4b0d ldr r3, [pc, #52] @ (8003670 ) 800363c: 69db ldr r3, [r3, #28] 800363e: 4a0c ldr r2, [pc, #48] @ (8003670 ) 8003640: f023 0301 bic.w r3, r3, #1 8003644: 61d3 str r3, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); 8003646: 687b ldr r3, [r7, #4] 8003648: f240 1201 movw r2, #257 @ 0x101 800364c: 4293 cmp r3, r2 800364e: d106 bne.n 800365e 8003650: 4b07 ldr r3, [pc, #28] @ (8003670 ) 8003652: 69db ldr r3, [r3, #28] 8003654: 4a06 ldr r2, [pc, #24] @ (8003670 ) 8003656: f023 0301 bic.w r3, r3, #1 800365a: 61d3 str r3, [r2, #28] } 800365c: e002 b.n 8003664 __HAL_FLASH_CLEAR_FLAG(flags); 800365e: 4a04 ldr r2, [pc, #16] @ (8003670 ) 8003660: 687b ldr r3, [r7, #4] 8003662: 60d3 str r3, [r2, #12] } 8003664: bf00 nop 8003666: 370c adds r7, #12 8003668: 46bd mov sp, r7 800366a: bc80 pop {r7} 800366c: 4770 bx lr 800366e: bf00 nop 8003670: 40022000 .word 0x40022000 8003674: 200003f0 .word 0x200003f0 08003678 : * (0xFFFFFFFF means that all the pages have been correctly erased) * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { 8003678: b580 push {r7, lr} 800367a: b084 sub sp, #16 800367c: af00 add r7, sp, #0 800367e: 6078 str r0, [r7, #4] 8003680: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_ERROR; 8003682: 2301 movs r3, #1 8003684: 73fb strb r3, [r7, #15] uint32_t address = 0U; 8003686: 2300 movs r3, #0 8003688: 60bb str r3, [r7, #8] /* Process Locked */ __HAL_LOCK(&pFlash); 800368a: 4b2f ldr r3, [pc, #188] @ (8003748 ) 800368c: 7e1b ldrb r3, [r3, #24] 800368e: 2b01 cmp r3, #1 8003690: d101 bne.n 8003696 8003692: 2302 movs r3, #2 8003694: e053 b.n 800373e 8003696: 4b2c ldr r3, [pc, #176] @ (8003748 ) 8003698: 2201 movs r2, #1 800369a: 761a strb r2, [r3, #24] /* Check the parameters */ assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 800369c: 687b ldr r3, [r7, #4] 800369e: 681b ldr r3, [r3, #0] 80036a0: 2b02 cmp r3, #2 80036a2: d116 bne.n 80036d2 else #endif /* FLASH_BANK2_END */ { /* Mass Erase requested for Bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80036a4: f24c 3050 movw r0, #50000 @ 0xc350 80036a8: f7ff ff50 bl 800354c 80036ac: 4603 mov r3, r0 80036ae: 2b00 cmp r3, #0 80036b0: d141 bne.n 8003736 { /*Mass erase to be done*/ FLASH_MassErase(FLASH_BANK_1); 80036b2: 2001 movs r0, #1 80036b4: f000 f84c bl 8003750 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80036b8: f24c 3050 movw r0, #50000 @ 0xc350 80036bc: f7ff ff46 bl 800354c 80036c0: 4603 mov r3, r0 80036c2: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the MER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_MER); 80036c4: 4b21 ldr r3, [pc, #132] @ (800374c ) 80036c6: 691b ldr r3, [r3, #16] 80036c8: 4a20 ldr r2, [pc, #128] @ (800374c ) 80036ca: f023 0304 bic.w r3, r3, #4 80036ce: 6113 str r3, [r2, #16] 80036d0: e031 b.n 8003736 else #endif /* FLASH_BANK2_END */ { /* Page Erase requested on address located on bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) 80036d2: f24c 3050 movw r0, #50000 @ 0xc350 80036d6: f7ff ff39 bl 800354c 80036da: 4603 mov r3, r0 80036dc: 2b00 cmp r3, #0 80036de: d12a bne.n 8003736 { /*Initialization of PageError variable*/ *PageError = 0xFFFFFFFFU; 80036e0: 683b ldr r3, [r7, #0] 80036e2: f04f 32ff mov.w r2, #4294967295 80036e6: 601a str r2, [r3, #0] /* Erase page by page to be done*/ for(address = pEraseInit->PageAddress; 80036e8: 687b ldr r3, [r7, #4] 80036ea: 689b ldr r3, [r3, #8] 80036ec: 60bb str r3, [r7, #8] 80036ee: e019 b.n 8003724 address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); address += FLASH_PAGE_SIZE) { FLASH_PageErase(address); 80036f0: 68b8 ldr r0, [r7, #8] 80036f2: f000 f849 bl 8003788 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 80036f6: f24c 3050 movw r0, #50000 @ 0xc350 80036fa: f7ff ff27 bl 800354c 80036fe: 4603 mov r3, r0 8003700: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the PER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PER); 8003702: 4b12 ldr r3, [pc, #72] @ (800374c ) 8003704: 691b ldr r3, [r3, #16] 8003706: 4a11 ldr r2, [pc, #68] @ (800374c ) 8003708: f023 0302 bic.w r3, r3, #2 800370c: 6113 str r3, [r2, #16] if (status != HAL_OK) 800370e: 7bfb ldrb r3, [r7, #15] 8003710: 2b00 cmp r3, #0 8003712: d003 beq.n 800371c { /* In case of error, stop erase procedure and return the faulty address */ *PageError = address; 8003714: 683b ldr r3, [r7, #0] 8003716: 68ba ldr r2, [r7, #8] 8003718: 601a str r2, [r3, #0] break; 800371a: e00c b.n 8003736 address += FLASH_PAGE_SIZE) 800371c: 68bb ldr r3, [r7, #8] 800371e: f503 6380 add.w r3, r3, #1024 @ 0x400 8003722: 60bb str r3, [r7, #8] address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); 8003724: 687b ldr r3, [r7, #4] 8003726: 68db ldr r3, [r3, #12] 8003728: 029a lsls r2, r3, #10 800372a: 687b ldr r3, [r7, #4] 800372c: 689b ldr r3, [r3, #8] 800372e: 4413 add r3, r2 8003730: 68ba ldr r2, [r7, #8] 8003732: 429a cmp r2, r3 8003734: d3dc bcc.n 80036f0 } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); 8003736: 4b04 ldr r3, [pc, #16] @ (8003748 ) 8003738: 2200 movs r2, #0 800373a: 761a strb r2, [r3, #24] return status; 800373c: 7bfb ldrb r3, [r7, #15] } 800373e: 4618 mov r0, r3 8003740: 3710 adds r7, #16 8003742: 46bd mov sp, r7 8003744: bd80 pop {r7, pc} 8003746: bf00 nop 8003748: 200003f0 .word 0x200003f0 800374c: 40022000 .word 0x40022000 08003750 : @endif * * @retval None */ static void FLASH_MassErase(uint32_t Banks) { 8003750: b480 push {r7} 8003752: b083 sub sp, #12 8003754: af00 add r7, sp, #0 8003756: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8003758: 4b09 ldr r3, [pc, #36] @ (8003780 ) 800375a: 2200 movs r2, #0 800375c: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); 800375e: 4b09 ldr r3, [pc, #36] @ (8003784 ) 8003760: 691b ldr r3, [r3, #16] 8003762: 4a08 ldr r2, [pc, #32] @ (8003784 ) 8003764: f043 0304 orr.w r3, r3, #4 8003768: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); 800376a: 4b06 ldr r3, [pc, #24] @ (8003784 ) 800376c: 691b ldr r3, [r3, #16] 800376e: 4a05 ldr r2, [pc, #20] @ (8003784 ) 8003770: f043 0340 orr.w r3, r3, #64 @ 0x40 8003774: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 8003776: bf00 nop 8003778: 370c adds r7, #12 800377a: 46bd mov sp, r7 800377c: bc80 pop {r7} 800377e: 4770 bx lr 8003780: 200003f0 .word 0x200003f0 8003784: 40022000 .word 0x40022000 08003788 : * The value of this parameter depend on device used within the same series * * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { 8003788: b480 push {r7} 800378a: b083 sub sp, #12 800378c: af00 add r7, sp, #0 800378e: 6078 str r0, [r7, #4] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 8003790: 4b0b ldr r3, [pc, #44] @ (80037c0 ) 8003792: 2200 movs r2, #0 8003794: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); 8003796: 4b0b ldr r3, [pc, #44] @ (80037c4 ) 8003798: 691b ldr r3, [r3, #16] 800379a: 4a0a ldr r2, [pc, #40] @ (80037c4 ) 800379c: f043 0302 orr.w r3, r3, #2 80037a0: 6113 str r3, [r2, #16] WRITE_REG(FLASH->AR, PageAddress); 80037a2: 4a08 ldr r2, [pc, #32] @ (80037c4 ) 80037a4: 687b ldr r3, [r7, #4] 80037a6: 6153 str r3, [r2, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); 80037a8: 4b06 ldr r3, [pc, #24] @ (80037c4 ) 80037aa: 691b ldr r3, [r3, #16] 80037ac: 4a05 ldr r2, [pc, #20] @ (80037c4 ) 80037ae: f043 0340 orr.w r3, r3, #64 @ 0x40 80037b2: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } 80037b4: bf00 nop 80037b6: 370c adds r7, #12 80037b8: 46bd mov sp, r7 80037ba: bc80 pop {r7} 80037bc: 4770 bx lr 80037be: bf00 nop 80037c0: 200003f0 .word 0x200003f0 80037c4: 40022000 .word 0x40022000 080037c8 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80037c8: b480 push {r7} 80037ca: b08b sub sp, #44 @ 0x2c 80037cc: af00 add r7, sp, #0 80037ce: 6078 str r0, [r7, #4] 80037d0: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 80037d2: 2300 movs r3, #0 80037d4: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 80037d6: 2300 movs r3, #0 80037d8: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80037da: e169 b.n 8003ab0 { /* Get the IO position */ ioposition = (0x01uL << position); 80037dc: 2201 movs r2, #1 80037de: 6a7b ldr r3, [r7, #36] @ 0x24 80037e0: fa02 f303 lsl.w r3, r2, r3 80037e4: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80037e6: 683b ldr r3, [r7, #0] 80037e8: 681b ldr r3, [r3, #0] 80037ea: 69fa ldr r2, [r7, #28] 80037ec: 4013 ands r3, r2 80037ee: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 80037f0: 69ba ldr r2, [r7, #24] 80037f2: 69fb ldr r3, [r7, #28] 80037f4: 429a cmp r2, r3 80037f6: f040 8158 bne.w 8003aaa { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 80037fa: 683b ldr r3, [r7, #0] 80037fc: 685b ldr r3, [r3, #4] 80037fe: 4a9a ldr r2, [pc, #616] @ (8003a68 ) 8003800: 4293 cmp r3, r2 8003802: d05e beq.n 80038c2 8003804: 4a98 ldr r2, [pc, #608] @ (8003a68 ) 8003806: 4293 cmp r3, r2 8003808: d875 bhi.n 80038f6 800380a: 4a98 ldr r2, [pc, #608] @ (8003a6c ) 800380c: 4293 cmp r3, r2 800380e: d058 beq.n 80038c2 8003810: 4a96 ldr r2, [pc, #600] @ (8003a6c ) 8003812: 4293 cmp r3, r2 8003814: d86f bhi.n 80038f6 8003816: 4a96 ldr r2, [pc, #600] @ (8003a70 ) 8003818: 4293 cmp r3, r2 800381a: d052 beq.n 80038c2 800381c: 4a94 ldr r2, [pc, #592] @ (8003a70 ) 800381e: 4293 cmp r3, r2 8003820: d869 bhi.n 80038f6 8003822: 4a94 ldr r2, [pc, #592] @ (8003a74 ) 8003824: 4293 cmp r3, r2 8003826: d04c beq.n 80038c2 8003828: 4a92 ldr r2, [pc, #584] @ (8003a74 ) 800382a: 4293 cmp r3, r2 800382c: d863 bhi.n 80038f6 800382e: 4a92 ldr r2, [pc, #584] @ (8003a78 ) 8003830: 4293 cmp r3, r2 8003832: d046 beq.n 80038c2 8003834: 4a90 ldr r2, [pc, #576] @ (8003a78 ) 8003836: 4293 cmp r3, r2 8003838: d85d bhi.n 80038f6 800383a: 2b12 cmp r3, #18 800383c: d82a bhi.n 8003894 800383e: 2b12 cmp r3, #18 8003840: d859 bhi.n 80038f6 8003842: a201 add r2, pc, #4 @ (adr r2, 8003848 ) 8003844: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003848: 080038c3 .word 0x080038c3 800384c: 0800389d .word 0x0800389d 8003850: 080038af .word 0x080038af 8003854: 080038f1 .word 0x080038f1 8003858: 080038f7 .word 0x080038f7 800385c: 080038f7 .word 0x080038f7 8003860: 080038f7 .word 0x080038f7 8003864: 080038f7 .word 0x080038f7 8003868: 080038f7 .word 0x080038f7 800386c: 080038f7 .word 0x080038f7 8003870: 080038f7 .word 0x080038f7 8003874: 080038f7 .word 0x080038f7 8003878: 080038f7 .word 0x080038f7 800387c: 080038f7 .word 0x080038f7 8003880: 080038f7 .word 0x080038f7 8003884: 080038f7 .word 0x080038f7 8003888: 080038f7 .word 0x080038f7 800388c: 080038a5 .word 0x080038a5 8003890: 080038b9 .word 0x080038b9 8003894: 4a79 ldr r2, [pc, #484] @ (8003a7c ) 8003896: 4293 cmp r3, r2 8003898: d013 beq.n 80038c2 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; 800389a: e02c b.n 80038f6 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; 800389c: 683b ldr r3, [r7, #0] 800389e: 68db ldr r3, [r3, #12] 80038a0: 623b str r3, [r7, #32] break; 80038a2: e029 b.n 80038f8 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; 80038a4: 683b ldr r3, [r7, #0] 80038a6: 68db ldr r3, [r3, #12] 80038a8: 3304 adds r3, #4 80038aa: 623b str r3, [r7, #32] break; 80038ac: e024 b.n 80038f8 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; 80038ae: 683b ldr r3, [r7, #0] 80038b0: 68db ldr r3, [r3, #12] 80038b2: 3308 adds r3, #8 80038b4: 623b str r3, [r7, #32] break; 80038b6: e01f b.n 80038f8 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; 80038b8: 683b ldr r3, [r7, #0] 80038ba: 68db ldr r3, [r3, #12] 80038bc: 330c adds r3, #12 80038be: 623b str r3, [r7, #32] break; 80038c0: e01a b.n 80038f8 if (GPIO_Init->Pull == GPIO_NOPULL) 80038c2: 683b ldr r3, [r7, #0] 80038c4: 689b ldr r3, [r3, #8] 80038c6: 2b00 cmp r3, #0 80038c8: d102 bne.n 80038d0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; 80038ca: 2304 movs r3, #4 80038cc: 623b str r3, [r7, #32] break; 80038ce: e013 b.n 80038f8 else if (GPIO_Init->Pull == GPIO_PULLUP) 80038d0: 683b ldr r3, [r7, #0] 80038d2: 689b ldr r3, [r3, #8] 80038d4: 2b01 cmp r3, #1 80038d6: d105 bne.n 80038e4 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80038d8: 2308 movs r3, #8 80038da: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; 80038dc: 687b ldr r3, [r7, #4] 80038de: 69fa ldr r2, [r7, #28] 80038e0: 611a str r2, [r3, #16] break; 80038e2: e009 b.n 80038f8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; 80038e4: 2308 movs r3, #8 80038e6: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; 80038e8: 687b ldr r3, [r7, #4] 80038ea: 69fa ldr r2, [r7, #28] 80038ec: 615a str r2, [r3, #20] break; 80038ee: e003 b.n 80038f8 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; 80038f0: 2300 movs r3, #0 80038f2: 623b str r3, [r7, #32] break; 80038f4: e000 b.n 80038f8 break; 80038f6: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; 80038f8: 69bb ldr r3, [r7, #24] 80038fa: 2bff cmp r3, #255 @ 0xff 80038fc: d801 bhi.n 8003902 80038fe: 687b ldr r3, [r7, #4] 8003900: e001 b.n 8003906 8003902: 687b ldr r3, [r7, #4] 8003904: 3304 adds r3, #4 8003906: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); 8003908: 69bb ldr r3, [r7, #24] 800390a: 2bff cmp r3, #255 @ 0xff 800390c: d802 bhi.n 8003914 800390e: 6a7b ldr r3, [r7, #36] @ 0x24 8003910: 009b lsls r3, r3, #2 8003912: e002 b.n 800391a 8003914: 6a7b ldr r3, [r7, #36] @ 0x24 8003916: 3b08 subs r3, #8 8003918: 009b lsls r3, r3, #2 800391a: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); 800391c: 697b ldr r3, [r7, #20] 800391e: 681a ldr r2, [r3, #0] 8003920: 210f movs r1, #15 8003922: 693b ldr r3, [r7, #16] 8003924: fa01 f303 lsl.w r3, r1, r3 8003928: 43db mvns r3, r3 800392a: 401a ands r2, r3 800392c: 6a39 ldr r1, [r7, #32] 800392e: 693b ldr r3, [r7, #16] 8003930: fa01 f303 lsl.w r3, r1, r3 8003934: 431a orrs r2, r3 8003936: 697b ldr r3, [r7, #20] 8003938: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 800393a: 683b ldr r3, [r7, #0] 800393c: 685b ldr r3, [r3, #4] 800393e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003942: 2b00 cmp r3, #0 8003944: f000 80b1 beq.w 8003aaa { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); 8003948: 4b4d ldr r3, [pc, #308] @ (8003a80 ) 800394a: 699b ldr r3, [r3, #24] 800394c: 4a4c ldr r2, [pc, #304] @ (8003a80 ) 800394e: f043 0301 orr.w r3, r3, #1 8003952: 6193 str r3, [r2, #24] 8003954: 4b4a ldr r3, [pc, #296] @ (8003a80 ) 8003956: 699b ldr r3, [r3, #24] 8003958: f003 0301 and.w r3, r3, #1 800395c: 60bb str r3, [r7, #8] 800395e: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; 8003960: 4a48 ldr r2, [pc, #288] @ (8003a84 ) 8003962: 6a7b ldr r3, [r7, #36] @ 0x24 8003964: 089b lsrs r3, r3, #2 8003966: 3302 adds r3, #2 8003968: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800396c: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); 800396e: 6a7b ldr r3, [r7, #36] @ 0x24 8003970: f003 0303 and.w r3, r3, #3 8003974: 009b lsls r3, r3, #2 8003976: 220f movs r2, #15 8003978: fa02 f303 lsl.w r3, r2, r3 800397c: 43db mvns r3, r3 800397e: 68fa ldr r2, [r7, #12] 8003980: 4013 ands r3, r2 8003982: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); 8003984: 687b ldr r3, [r7, #4] 8003986: 4a40 ldr r2, [pc, #256] @ (8003a88 ) 8003988: 4293 cmp r3, r2 800398a: d013 beq.n 80039b4 800398c: 687b ldr r3, [r7, #4] 800398e: 4a3f ldr r2, [pc, #252] @ (8003a8c ) 8003990: 4293 cmp r3, r2 8003992: d00d beq.n 80039b0 8003994: 687b ldr r3, [r7, #4] 8003996: 4a3e ldr r2, [pc, #248] @ (8003a90 ) 8003998: 4293 cmp r3, r2 800399a: d007 beq.n 80039ac 800399c: 687b ldr r3, [r7, #4] 800399e: 4a3d ldr r2, [pc, #244] @ (8003a94 ) 80039a0: 4293 cmp r3, r2 80039a2: d101 bne.n 80039a8 80039a4: 2303 movs r3, #3 80039a6: e006 b.n 80039b6 80039a8: 2304 movs r3, #4 80039aa: e004 b.n 80039b6 80039ac: 2302 movs r3, #2 80039ae: e002 b.n 80039b6 80039b0: 2301 movs r3, #1 80039b2: e000 b.n 80039b6 80039b4: 2300 movs r3, #0 80039b6: 6a7a ldr r2, [r7, #36] @ 0x24 80039b8: f002 0203 and.w r2, r2, #3 80039bc: 0092 lsls r2, r2, #2 80039be: 4093 lsls r3, r2 80039c0: 68fa ldr r2, [r7, #12] 80039c2: 4313 orrs r3, r2 80039c4: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; 80039c6: 492f ldr r1, [pc, #188] @ (8003a84 ) 80039c8: 6a7b ldr r3, [r7, #36] @ 0x24 80039ca: 089b lsrs r3, r3, #2 80039cc: 3302 adds r3, #2 80039ce: 68fa ldr r2, [r7, #12] 80039d0: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 80039d4: 683b ldr r3, [r7, #0] 80039d6: 685b ldr r3, [r3, #4] 80039d8: f403 1380 and.w r3, r3, #1048576 @ 0x100000 80039dc: 2b00 cmp r3, #0 80039de: d006 beq.n 80039ee { SET_BIT(EXTI->RTSR, iocurrent); 80039e0: 4b2d ldr r3, [pc, #180] @ (8003a98 ) 80039e2: 689a ldr r2, [r3, #8] 80039e4: 492c ldr r1, [pc, #176] @ (8003a98 ) 80039e6: 69bb ldr r3, [r7, #24] 80039e8: 4313 orrs r3, r2 80039ea: 608b str r3, [r1, #8] 80039ec: e006 b.n 80039fc } else { CLEAR_BIT(EXTI->RTSR, iocurrent); 80039ee: 4b2a ldr r3, [pc, #168] @ (8003a98 ) 80039f0: 689a ldr r2, [r3, #8] 80039f2: 69bb ldr r3, [r7, #24] 80039f4: 43db mvns r3, r3 80039f6: 4928 ldr r1, [pc, #160] @ (8003a98 ) 80039f8: 4013 ands r3, r2 80039fa: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 80039fc: 683b ldr r3, [r7, #0] 80039fe: 685b ldr r3, [r3, #4] 8003a00: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8003a04: 2b00 cmp r3, #0 8003a06: d006 beq.n 8003a16 { SET_BIT(EXTI->FTSR, iocurrent); 8003a08: 4b23 ldr r3, [pc, #140] @ (8003a98 ) 8003a0a: 68da ldr r2, [r3, #12] 8003a0c: 4922 ldr r1, [pc, #136] @ (8003a98 ) 8003a0e: 69bb ldr r3, [r7, #24] 8003a10: 4313 orrs r3, r2 8003a12: 60cb str r3, [r1, #12] 8003a14: e006 b.n 8003a24 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); 8003a16: 4b20 ldr r3, [pc, #128] @ (8003a98 ) 8003a18: 68da ldr r2, [r3, #12] 8003a1a: 69bb ldr r3, [r7, #24] 8003a1c: 43db mvns r3, r3 8003a1e: 491e ldr r1, [pc, #120] @ (8003a98 ) 8003a20: 4013 ands r3, r2 8003a22: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 8003a24: 683b ldr r3, [r7, #0] 8003a26: 685b ldr r3, [r3, #4] 8003a28: f403 3300 and.w r3, r3, #131072 @ 0x20000 8003a2c: 2b00 cmp r3, #0 8003a2e: d006 beq.n 8003a3e { SET_BIT(EXTI->EMR, iocurrent); 8003a30: 4b19 ldr r3, [pc, #100] @ (8003a98 ) 8003a32: 685a ldr r2, [r3, #4] 8003a34: 4918 ldr r1, [pc, #96] @ (8003a98 ) 8003a36: 69bb ldr r3, [r7, #24] 8003a38: 4313 orrs r3, r2 8003a3a: 604b str r3, [r1, #4] 8003a3c: e006 b.n 8003a4c } else { CLEAR_BIT(EXTI->EMR, iocurrent); 8003a3e: 4b16 ldr r3, [pc, #88] @ (8003a98 ) 8003a40: 685a ldr r2, [r3, #4] 8003a42: 69bb ldr r3, [r7, #24] 8003a44: 43db mvns r3, r3 8003a46: 4914 ldr r1, [pc, #80] @ (8003a98 ) 8003a48: 4013 ands r3, r2 8003a4a: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 8003a4c: 683b ldr r3, [r7, #0] 8003a4e: 685b ldr r3, [r3, #4] 8003a50: f403 3380 and.w r3, r3, #65536 @ 0x10000 8003a54: 2b00 cmp r3, #0 8003a56: d021 beq.n 8003a9c { SET_BIT(EXTI->IMR, iocurrent); 8003a58: 4b0f ldr r3, [pc, #60] @ (8003a98 ) 8003a5a: 681a ldr r2, [r3, #0] 8003a5c: 490e ldr r1, [pc, #56] @ (8003a98 ) 8003a5e: 69bb ldr r3, [r7, #24] 8003a60: 4313 orrs r3, r2 8003a62: 600b str r3, [r1, #0] 8003a64: e021 b.n 8003aaa 8003a66: bf00 nop 8003a68: 10320000 .word 0x10320000 8003a6c: 10310000 .word 0x10310000 8003a70: 10220000 .word 0x10220000 8003a74: 10210000 .word 0x10210000 8003a78: 10120000 .word 0x10120000 8003a7c: 10110000 .word 0x10110000 8003a80: 40021000 .word 0x40021000 8003a84: 40010000 .word 0x40010000 8003a88: 40010800 .word 0x40010800 8003a8c: 40010c00 .word 0x40010c00 8003a90: 40011000 .word 0x40011000 8003a94: 40011400 .word 0x40011400 8003a98: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); 8003a9c: 4b0b ldr r3, [pc, #44] @ (8003acc ) 8003a9e: 681a ldr r2, [r3, #0] 8003aa0: 69bb ldr r3, [r7, #24] 8003aa2: 43db mvns r3, r3 8003aa4: 4909 ldr r1, [pc, #36] @ (8003acc ) 8003aa6: 4013 ands r3, r2 8003aa8: 600b str r3, [r1, #0] } } } position++; 8003aaa: 6a7b ldr r3, [r7, #36] @ 0x24 8003aac: 3301 adds r3, #1 8003aae: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) 8003ab0: 683b ldr r3, [r7, #0] 8003ab2: 681a ldr r2, [r3, #0] 8003ab4: 6a7b ldr r3, [r7, #36] @ 0x24 8003ab6: fa22 f303 lsr.w r3, r2, r3 8003aba: 2b00 cmp r3, #0 8003abc: f47f ae8e bne.w 80037dc } } 8003ac0: bf00 nop 8003ac2: bf00 nop 8003ac4: 372c adds r7, #44 @ 0x2c 8003ac6: 46bd mov sp, r7 8003ac8: bc80 pop {r7} 8003aca: 4770 bx lr 8003acc: 40010400 .word 0x40010400 08003ad0 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8003ad0: b480 push {r7} 8003ad2: b085 sub sp, #20 8003ad4: af00 add r7, sp, #0 8003ad6: 6078 str r0, [r7, #4] 8003ad8: 460b mov r3, r1 8003ada: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8003adc: 687b ldr r3, [r7, #4] 8003ade: 689a ldr r2, [r3, #8] 8003ae0: 887b ldrh r3, [r7, #2] 8003ae2: 4013 ands r3, r2 8003ae4: 2b00 cmp r3, #0 8003ae6: d002 beq.n 8003aee { bitstatus = GPIO_PIN_SET; 8003ae8: 2301 movs r3, #1 8003aea: 73fb strb r3, [r7, #15] 8003aec: e001 b.n 8003af2 } else { bitstatus = GPIO_PIN_RESET; 8003aee: 2300 movs r3, #0 8003af0: 73fb strb r3, [r7, #15] } return bitstatus; 8003af2: 7bfb ldrb r3, [r7, #15] } 8003af4: 4618 mov r0, r3 8003af6: 3714 adds r7, #20 8003af8: 46bd mov sp, r7 8003afa: bc80 pop {r7} 8003afc: 4770 bx lr 08003afe : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8003afe: b480 push {r7} 8003b00: b083 sub sp, #12 8003b02: af00 add r7, sp, #0 8003b04: 6078 str r0, [r7, #4] 8003b06: 460b mov r3, r1 8003b08: 807b strh r3, [r7, #2] 8003b0a: 4613 mov r3, r2 8003b0c: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8003b0e: 787b ldrb r3, [r7, #1] 8003b10: 2b00 cmp r3, #0 8003b12: d003 beq.n 8003b1c { GPIOx->BSRR = GPIO_Pin; 8003b14: 887a ldrh r2, [r7, #2] 8003b16: 687b ldr r3, [r7, #4] 8003b18: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } 8003b1a: e003 b.n 8003b24 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; 8003b1c: 887b ldrh r3, [r7, #2] 8003b1e: 041a lsls r2, r3, #16 8003b20: 687b ldr r3, [r7, #4] 8003b22: 611a str r2, [r3, #16] } 8003b24: bf00 nop 8003b26: 370c adds r7, #12 8003b28: 46bd mov sp, r7 8003b2a: bc80 pop {r7} 8003b2c: 4770 bx lr 08003b2e : * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { 8003b2e: b480 push {r7} 8003b30: b085 sub sp, #20 8003b32: af00 add r7, sp, #0 8003b34: 6078 str r0, [r7, #4] 8003b36: 460b mov r3, r1 8003b38: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; 8003b3a: 687b ldr r3, [r7, #4] 8003b3c: 68db ldr r3, [r3, #12] 8003b3e: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); 8003b40: 887a ldrh r2, [r7, #2] 8003b42: 68fb ldr r3, [r7, #12] 8003b44: 4013 ands r3, r2 8003b46: 041a lsls r2, r3, #16 8003b48: 68fb ldr r3, [r7, #12] 8003b4a: 43d9 mvns r1, r3 8003b4c: 887b ldrh r3, [r7, #2] 8003b4e: 400b ands r3, r1 8003b50: 431a orrs r2, r3 8003b52: 687b ldr r3, [r7, #4] 8003b54: 611a str r2, [r3, #16] } 8003b56: bf00 nop 8003b58: 3714 adds r7, #20 8003b5a: 46bd mov sp, r7 8003b5c: bc80 pop {r7} 8003b5e: 4770 bx lr 08003b60 : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { 8003b60: b580 push {r7, lr} 8003b62: b084 sub sp, #16 8003b64: af00 add r7, sp, #0 8003b66: 6078 str r0, [r7, #4] uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) 8003b68: 687b ldr r3, [r7, #4] 8003b6a: 2b00 cmp r3, #0 8003b6c: d101 bne.n 8003b72 { return HAL_ERROR; 8003b6e: 2301 movs r3, #1 8003b70: e0e8 b.n 8003d44 } /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); if (hpcd->State == HAL_PCD_STATE_RESET) 8003b72: 687b ldr r3, [r7, #4] 8003b74: f893 3291 ldrb.w r3, [r3, #657] @ 0x291 8003b78: b2db uxtb r3, r3 8003b7a: 2b00 cmp r3, #0 8003b7c: d106 bne.n 8003b8c { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; 8003b7e: 687b ldr r3, [r7, #4] 8003b80: 2200 movs r2, #0 8003b82: f883 2290 strb.w r2, [r3, #656] @ 0x290 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); 8003b86: 6878 ldr r0, [r7, #4] 8003b88: f007 fad0 bl 800b12c #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; 8003b8c: 687b ldr r3, [r7, #4] 8003b8e: 2203 movs r2, #3 8003b90: f883 2291 strb.w r2, [r3, #657] @ 0x291 /* Disable DMA mode for FS instance */ hpcd->Init.dma_enable = 0U; 8003b94: 687b ldr r3, [r7, #4] 8003b96: 2200 movs r2, #0 8003b98: 715a strb r2, [r3, #5] /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); 8003b9a: 687b ldr r3, [r7, #4] 8003b9c: 681b ldr r3, [r3, #0] 8003b9e: 4618 mov r0, r3 8003ba0: f003 f975 bl 8006e8e /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8003ba4: 687b ldr r3, [r7, #4] 8003ba6: 6818 ldr r0, [r3, #0] 8003ba8: 687b ldr r3, [r7, #4] 8003baa: 3304 adds r3, #4 8003bac: cb0e ldmia r3, {r1, r2, r3} 8003bae: f003 f94b bl 8006e48 8003bb2: 4603 mov r3, r0 8003bb4: 2b00 cmp r3, #0 8003bb6: d005 beq.n 8003bc4 { hpcd->State = HAL_PCD_STATE_ERROR; 8003bb8: 687b ldr r3, [r7, #4] 8003bba: 2202 movs r2, #2 8003bbc: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 8003bc0: 2301 movs r3, #1 8003bc2: e0bf b.n 8003d44 } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) 8003bc4: 687b ldr r3, [r7, #4] 8003bc6: 681b ldr r3, [r3, #0] 8003bc8: 2100 movs r1, #0 8003bca: 4618 mov r0, r3 8003bcc: f003 f979 bl 8006ec2 8003bd0: 4603 mov r3, r0 8003bd2: 2b00 cmp r3, #0 8003bd4: d005 beq.n 8003be2 { hpcd->State = HAL_PCD_STATE_ERROR; 8003bd6: 687b ldr r3, [r7, #4] 8003bd8: 2202 movs r2, #2 8003bda: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 8003bde: 2301 movs r3, #1 8003be0: e0b0 b.n 8003d44 } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8003be2: 2300 movs r3, #0 8003be4: 73fb strb r3, [r7, #15] 8003be6: e03e b.n 8003c66 { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; 8003be8: 7bfa ldrb r2, [r7, #15] 8003bea: 6879 ldr r1, [r7, #4] 8003bec: 4613 mov r3, r2 8003bee: 009b lsls r3, r3, #2 8003bf0: 4413 add r3, r2 8003bf2: 00db lsls r3, r3, #3 8003bf4: 440b add r3, r1 8003bf6: 3311 adds r3, #17 8003bf8: 2201 movs r2, #1 8003bfa: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; 8003bfc: 7bfa ldrb r2, [r7, #15] 8003bfe: 6879 ldr r1, [r7, #4] 8003c00: 4613 mov r3, r2 8003c02: 009b lsls r3, r3, #2 8003c04: 4413 add r3, r2 8003c06: 00db lsls r3, r3, #3 8003c08: 440b add r3, r1 8003c0a: 3310 adds r3, #16 8003c0c: 7bfa ldrb r2, [r7, #15] 8003c0e: 701a strb r2, [r3, #0] #if defined (USB_OTG_FS) hpcd->IN_ep[i].tx_fifo_num = i; #endif /* defined (USB_OTG_FS) */ /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; 8003c10: 7bfa ldrb r2, [r7, #15] 8003c12: 6879 ldr r1, [r7, #4] 8003c14: 4613 mov r3, r2 8003c16: 009b lsls r3, r3, #2 8003c18: 4413 add r3, r2 8003c1a: 00db lsls r3, r3, #3 8003c1c: 440b add r3, r1 8003c1e: 3313 adds r3, #19 8003c20: 2200 movs r2, #0 8003c22: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; 8003c24: 7bfa ldrb r2, [r7, #15] 8003c26: 6879 ldr r1, [r7, #4] 8003c28: 4613 mov r3, r2 8003c2a: 009b lsls r3, r3, #2 8003c2c: 4413 add r3, r2 8003c2e: 00db lsls r3, r3, #3 8003c30: 440b add r3, r1 8003c32: 3320 adds r3, #32 8003c34: 2200 movs r2, #0 8003c36: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; 8003c38: 7bfa ldrb r2, [r7, #15] 8003c3a: 6879 ldr r1, [r7, #4] 8003c3c: 4613 mov r3, r2 8003c3e: 009b lsls r3, r3, #2 8003c40: 4413 add r3, r2 8003c42: 00db lsls r3, r3, #3 8003c44: 440b add r3, r1 8003c46: 3324 adds r3, #36 @ 0x24 8003c48: 2200 movs r2, #0 8003c4a: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; 8003c4c: 7bfb ldrb r3, [r7, #15] 8003c4e: 6879 ldr r1, [r7, #4] 8003c50: 1c5a adds r2, r3, #1 8003c52: 4613 mov r3, r2 8003c54: 009b lsls r3, r3, #2 8003c56: 4413 add r3, r2 8003c58: 00db lsls r3, r3, #3 8003c5a: 440b add r3, r1 8003c5c: 2200 movs r2, #0 8003c5e: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8003c60: 7bfb ldrb r3, [r7, #15] 8003c62: 3301 adds r3, #1 8003c64: 73fb strb r3, [r7, #15] 8003c66: 687b ldr r3, [r7, #4] 8003c68: 791b ldrb r3, [r3, #4] 8003c6a: 7bfa ldrb r2, [r7, #15] 8003c6c: 429a cmp r2, r3 8003c6e: d3bb bcc.n 8003be8 } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8003c70: 2300 movs r3, #0 8003c72: 73fb strb r3, [r7, #15] 8003c74: e044 b.n 8003d00 { hpcd->OUT_ep[i].is_in = 0U; 8003c76: 7bfa ldrb r2, [r7, #15] 8003c78: 6879 ldr r1, [r7, #4] 8003c7a: 4613 mov r3, r2 8003c7c: 009b lsls r3, r3, #2 8003c7e: 4413 add r3, r2 8003c80: 00db lsls r3, r3, #3 8003c82: 440b add r3, r1 8003c84: f203 1351 addw r3, r3, #337 @ 0x151 8003c88: 2200 movs r2, #0 8003c8a: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; 8003c8c: 7bfa ldrb r2, [r7, #15] 8003c8e: 6879 ldr r1, [r7, #4] 8003c90: 4613 mov r3, r2 8003c92: 009b lsls r3, r3, #2 8003c94: 4413 add r3, r2 8003c96: 00db lsls r3, r3, #3 8003c98: 440b add r3, r1 8003c9a: f503 73a8 add.w r3, r3, #336 @ 0x150 8003c9e: 7bfa ldrb r2, [r7, #15] 8003ca0: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; 8003ca2: 7bfa ldrb r2, [r7, #15] 8003ca4: 6879 ldr r1, [r7, #4] 8003ca6: 4613 mov r3, r2 8003ca8: 009b lsls r3, r3, #2 8003caa: 4413 add r3, r2 8003cac: 00db lsls r3, r3, #3 8003cae: 440b add r3, r1 8003cb0: f203 1353 addw r3, r3, #339 @ 0x153 8003cb4: 2200 movs r2, #0 8003cb6: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; 8003cb8: 7bfa ldrb r2, [r7, #15] 8003cba: 6879 ldr r1, [r7, #4] 8003cbc: 4613 mov r3, r2 8003cbe: 009b lsls r3, r3, #2 8003cc0: 4413 add r3, r2 8003cc2: 00db lsls r3, r3, #3 8003cc4: 440b add r3, r1 8003cc6: f503 73b0 add.w r3, r3, #352 @ 0x160 8003cca: 2200 movs r2, #0 8003ccc: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; 8003cce: 7bfa ldrb r2, [r7, #15] 8003cd0: 6879 ldr r1, [r7, #4] 8003cd2: 4613 mov r3, r2 8003cd4: 009b lsls r3, r3, #2 8003cd6: 4413 add r3, r2 8003cd8: 00db lsls r3, r3, #3 8003cda: 440b add r3, r1 8003cdc: f503 73b2 add.w r3, r3, #356 @ 0x164 8003ce0: 2200 movs r2, #0 8003ce2: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; 8003ce4: 7bfa ldrb r2, [r7, #15] 8003ce6: 6879 ldr r1, [r7, #4] 8003ce8: 4613 mov r3, r2 8003cea: 009b lsls r3, r3, #2 8003cec: 4413 add r3, r2 8003cee: 00db lsls r3, r3, #3 8003cf0: 440b add r3, r1 8003cf2: f503 73b4 add.w r3, r3, #360 @ 0x168 8003cf6: 2200 movs r2, #0 8003cf8: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8003cfa: 7bfb ldrb r3, [r7, #15] 8003cfc: 3301 adds r3, #1 8003cfe: 73fb strb r3, [r7, #15] 8003d00: 687b ldr r3, [r7, #4] 8003d02: 791b ldrb r3, [r3, #4] 8003d04: 7bfa ldrb r2, [r7, #15] 8003d06: 429a cmp r2, r3 8003d08: d3b5 bcc.n 8003c76 } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8003d0a: 687b ldr r3, [r7, #4] 8003d0c: 6818 ldr r0, [r3, #0] 8003d0e: 687b ldr r3, [r7, #4] 8003d10: 3304 adds r3, #4 8003d12: cb0e ldmia r3, {r1, r2, r3} 8003d14: f003 f8e1 bl 8006eda 8003d18: 4603 mov r3, r0 8003d1a: 2b00 cmp r3, #0 8003d1c: d005 beq.n 8003d2a { hpcd->State = HAL_PCD_STATE_ERROR; 8003d1e: 687b ldr r3, [r7, #4] 8003d20: 2202 movs r2, #2 8003d22: f883 2291 strb.w r2, [r3, #657] @ 0x291 return HAL_ERROR; 8003d26: 2301 movs r3, #1 8003d28: e00c b.n 8003d44 } hpcd->USB_Address = 0U; 8003d2a: 687b ldr r3, [r7, #4] 8003d2c: 2200 movs r2, #0 8003d2e: 735a strb r2, [r3, #13] hpcd->State = HAL_PCD_STATE_READY; 8003d30: 687b ldr r3, [r7, #4] 8003d32: 2201 movs r2, #1 8003d34: f883 2291 strb.w r2, [r3, #657] @ 0x291 (void)USB_DevDisconnect(hpcd->Instance); 8003d38: 687b ldr r3, [r7, #4] 8003d3a: 681b ldr r3, [r3, #0] 8003d3c: 4618 mov r0, r3 8003d3e: f005 fb60 bl 8009402 return HAL_OK; 8003d42: 2300 movs r3, #0 } 8003d44: 4618 mov r0, r3 8003d46: 3710 adds r7, #16 8003d48: 46bd mov sp, r7 8003d4a: bd80 pop {r7, pc} 08003d4c : * @brief Start the USB device * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) { 8003d4c: b580 push {r7, lr} 8003d4e: b082 sub sp, #8 8003d50: af00 add r7, sp, #0 8003d52: 6078 str r0, [r7, #4] __HAL_LOCK(hpcd); 8003d54: 687b ldr r3, [r7, #4] 8003d56: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 8003d5a: 2b01 cmp r3, #1 8003d5c: d101 bne.n 8003d62 8003d5e: 2302 movs r3, #2 8003d60: e016 b.n 8003d90 8003d62: 687b ldr r3, [r7, #4] 8003d64: 2201 movs r2, #1 8003d66: f883 2290 strb.w r2, [r3, #656] @ 0x290 __HAL_PCD_ENABLE(hpcd); 8003d6a: 687b ldr r3, [r7, #4] 8003d6c: 681b ldr r3, [r3, #0] 8003d6e: 4618 mov r0, r3 8003d70: f003 f877 bl 8006e62 #if defined (USB) HAL_PCDEx_SetConnectionState(hpcd, 1U); 8003d74: 2101 movs r1, #1 8003d76: 6878 ldr r0, [r7, #4] 8003d78: f007 fc4b bl 800b612 #endif /* defined (USB) */ (void)USB_DevConnect(hpcd->Instance); 8003d7c: 687b ldr r3, [r7, #4] 8003d7e: 681b ldr r3, [r3, #0] 8003d80: 4618 mov r0, r3 8003d82: f005 fb34 bl 80093ee __HAL_UNLOCK(hpcd); 8003d86: 687b ldr r3, [r7, #4] 8003d88: 2200 movs r2, #0 8003d8a: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8003d8e: 2300 movs r3, #0 } 8003d90: 4618 mov r0, r3 8003d92: 3708 adds r7, #8 8003d94: 46bd mov sp, r7 8003d96: bd80 pop {r7, pc} 08003d98 : * @brief This function handles PCD interrupt request. * @param hpcd PCD handle * @retval HAL status */ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { 8003d98: b580 push {r7, lr} 8003d9a: b088 sub sp, #32 8003d9c: af00 add r7, sp, #0 8003d9e: 6078 str r0, [r7, #4] uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance); 8003da0: 687b ldr r3, [r7, #4] 8003da2: 681b ldr r3, [r3, #0] 8003da4: 4618 mov r0, r3 8003da6: f005 fb36 bl 8009416 8003daa: 61b8 str r0, [r7, #24] uint16_t store_ep[8]; uint8_t i; if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR) 8003dac: 69bb ldr r3, [r7, #24] 8003dae: f403 4300 and.w r3, r3, #32768 @ 0x8000 8003db2: 2b00 cmp r3, #0 8003db4: d003 beq.n 8003dbe { /* servicing of the endpoint correct transfer interrupt */ /* clear of the CTR flag into the sub */ (void)PCD_EP_ISR_Handler(hpcd); 8003db6: 6878 ldr r0, [r7, #4] 8003db8: f000 fb1a bl 80043f0 return; 8003dbc: e119 b.n 8003ff2 } if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET) 8003dbe: 69bb ldr r3, [r7, #24] 8003dc0: f403 6380 and.w r3, r3, #1024 @ 0x400 8003dc4: 2b00 cmp r3, #0 8003dc6: d013 beq.n 8003df0 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 8003dc8: 687b ldr r3, [r7, #4] 8003dca: 681b ldr r3, [r3, #0] 8003dcc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003dd0: b29a uxth r2, r3 8003dd2: 687b ldr r3, [r7, #4] 8003dd4: 681b ldr r3, [r3, #0] 8003dd6: f422 6280 bic.w r2, r2, #1024 @ 0x400 8003dda: b292 uxth r2, r2 8003ddc: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResetCallback(hpcd); #else HAL_PCD_ResetCallback(hpcd); 8003de0: 6878 ldr r0, [r7, #4] 8003de2: f007 fa1e bl 800b222 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ (void)HAL_PCD_SetAddress(hpcd, 0U); 8003de6: 2100 movs r1, #0 8003de8: 6878 ldr r0, [r7, #4] 8003dea: f000 f905 bl 8003ff8 return; 8003dee: e100 b.n 8003ff2 } if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR) 8003df0: 69bb ldr r3, [r7, #24] 8003df2: f403 4380 and.w r3, r3, #16384 @ 0x4000 8003df6: 2b00 cmp r3, #0 8003df8: d00c beq.n 8003e14 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); 8003dfa: 687b ldr r3, [r7, #4] 8003dfc: 681b ldr r3, [r3, #0] 8003dfe: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003e02: b29a uxth r2, r3 8003e04: 687b ldr r3, [r7, #4] 8003e06: 681b ldr r3, [r3, #0] 8003e08: f422 4280 bic.w r2, r2, #16384 @ 0x4000 8003e0c: b292 uxth r2, r2 8003e0e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8003e12: e0ee b.n 8003ff2 } if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR) 8003e14: 69bb ldr r3, [r7, #24] 8003e16: f403 5300 and.w r3, r3, #8192 @ 0x2000 8003e1a: 2b00 cmp r3, #0 8003e1c: d00c beq.n 8003e38 { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); 8003e1e: 687b ldr r3, [r7, #4] 8003e20: 681b ldr r3, [r3, #0] 8003e22: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003e26: b29a uxth r2, r3 8003e28: 687b ldr r3, [r7, #4] 8003e2a: 681b ldr r3, [r3, #0] 8003e2c: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8003e30: b292 uxth r2, r2 8003e32: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8003e36: e0dc b.n 8003ff2 } if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP) 8003e38: 69bb ldr r3, [r7, #24] 8003e3a: f403 5380 and.w r3, r3, #4096 @ 0x1000 8003e3e: 2b00 cmp r3, #0 8003e40: d027 beq.n 8003e92 { hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE); 8003e42: 687b ldr r3, [r7, #4] 8003e44: 681b ldr r3, [r3, #0] 8003e46: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003e4a: b29a uxth r2, r3 8003e4c: 687b ldr r3, [r7, #4] 8003e4e: 681b ldr r3, [r3, #0] 8003e50: f022 0204 bic.w r2, r2, #4 8003e54: b292 uxth r2, r2 8003e56: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); 8003e5a: 687b ldr r3, [r7, #4] 8003e5c: 681b ldr r3, [r3, #0] 8003e5e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003e62: b29a uxth r2, r3 8003e64: 687b ldr r3, [r7, #4] 8003e66: 681b ldr r3, [r3, #0] 8003e68: f022 0208 bic.w r2, r2, #8 8003e6c: b292 uxth r2, r2 8003e6e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResumeCallback(hpcd); #else HAL_PCD_ResumeCallback(hpcd); 8003e72: 6878 ldr r0, [r7, #4] 8003e74: f007 fa0e bl 800b294 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); 8003e78: 687b ldr r3, [r7, #4] 8003e7a: 681b ldr r3, [r3, #0] 8003e7c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003e80: b29a uxth r2, r3 8003e82: 687b ldr r3, [r7, #4] 8003e84: 681b ldr r3, [r3, #0] 8003e86: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8003e8a: b292 uxth r2, r2 8003e8c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8003e90: e0af b.n 8003ff2 } if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP) 8003e92: 69bb ldr r3, [r7, #24] 8003e94: f403 6300 and.w r3, r3, #2048 @ 0x800 8003e98: 2b00 cmp r3, #0 8003e9a: f000 8083 beq.w 8003fa4 { /* WA: To Clear Wakeup flag if raised with suspend signal */ /* Store Endpoint registers */ for (i = 0U; i < 8U; i++) 8003e9e: 2300 movs r3, #0 8003ea0: 77fb strb r3, [r7, #31] 8003ea2: e010 b.n 8003ec6 { store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i); 8003ea4: 687b ldr r3, [r7, #4] 8003ea6: 681b ldr r3, [r3, #0] 8003ea8: 461a mov r2, r3 8003eaa: 7ffb ldrb r3, [r7, #31] 8003eac: 009b lsls r3, r3, #2 8003eae: 441a add r2, r3 8003eb0: 7ffb ldrb r3, [r7, #31] 8003eb2: 8812 ldrh r2, [r2, #0] 8003eb4: b292 uxth r2, r2 8003eb6: 005b lsls r3, r3, #1 8003eb8: 3320 adds r3, #32 8003eba: 443b add r3, r7 8003ebc: f823 2c18 strh.w r2, [r3, #-24] for (i = 0U; i < 8U; i++) 8003ec0: 7ffb ldrb r3, [r7, #31] 8003ec2: 3301 adds r3, #1 8003ec4: 77fb strb r3, [r7, #31] 8003ec6: 7ffb ldrb r3, [r7, #31] 8003ec8: 2b07 cmp r3, #7 8003eca: d9eb bls.n 8003ea4 } /* FORCE RESET */ hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES); 8003ecc: 687b ldr r3, [r7, #4] 8003ece: 681b ldr r3, [r3, #0] 8003ed0: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003ed4: b29a uxth r2, r3 8003ed6: 687b ldr r3, [r7, #4] 8003ed8: 681b ldr r3, [r3, #0] 8003eda: f042 0201 orr.w r2, r2, #1 8003ede: b292 uxth r2, r2 8003ee0: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CLEAR RESET */ hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES); 8003ee4: 687b ldr r3, [r7, #4] 8003ee6: 681b ldr r3, [r3, #0] 8003ee8: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003eec: b29a uxth r2, r3 8003eee: 687b ldr r3, [r7, #4] 8003ef0: 681b ldr r3, [r3, #0] 8003ef2: f022 0201 bic.w r2, r2, #1 8003ef6: b292 uxth r2, r2 8003ef8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* wait for reset flag in ISTR */ while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U) 8003efc: bf00 nop 8003efe: 687b ldr r3, [r7, #4] 8003f00: 681b ldr r3, [r3, #0] 8003f02: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003f06: b29b uxth r3, r3 8003f08: f403 6380 and.w r3, r3, #1024 @ 0x400 8003f0c: 2b00 cmp r3, #0 8003f0e: d0f6 beq.n 8003efe { } /* Clear Reset Flag */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); 8003f10: 687b ldr r3, [r7, #4] 8003f12: 681b ldr r3, [r3, #0] 8003f14: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003f18: b29a uxth r2, r3 8003f1a: 687b ldr r3, [r7, #4] 8003f1c: 681b ldr r3, [r3, #0] 8003f1e: f422 6280 bic.w r2, r2, #1024 @ 0x400 8003f22: b292 uxth r2, r2 8003f24: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Restore Registre */ for (i = 0U; i < 8U; i++) 8003f28: 2300 movs r3, #0 8003f2a: 77fb strb r3, [r7, #31] 8003f2c: e00f b.n 8003f4e { PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]); 8003f2e: 7ffb ldrb r3, [r7, #31] 8003f30: 687a ldr r2, [r7, #4] 8003f32: 6812 ldr r2, [r2, #0] 8003f34: 4611 mov r1, r2 8003f36: 7ffa ldrb r2, [r7, #31] 8003f38: 0092 lsls r2, r2, #2 8003f3a: 440a add r2, r1 8003f3c: 005b lsls r3, r3, #1 8003f3e: 3320 adds r3, #32 8003f40: 443b add r3, r7 8003f42: f833 3c18 ldrh.w r3, [r3, #-24] 8003f46: 8013 strh r3, [r2, #0] for (i = 0U; i < 8U; i++) 8003f48: 7ffb ldrb r3, [r7, #31] 8003f4a: 3301 adds r3, #1 8003f4c: 77fb strb r3, [r7, #31] 8003f4e: 7ffb ldrb r3, [r7, #31] 8003f50: 2b07 cmp r3, #7 8003f52: d9ec bls.n 8003f2e } /* Force low-power mode in the macrocell */ hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP; 8003f54: 687b ldr r3, [r7, #4] 8003f56: 681b ldr r3, [r3, #0] 8003f58: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003f5c: b29a uxth r2, r3 8003f5e: 687b ldr r3, [r7, #4] 8003f60: 681b ldr r3, [r3, #0] 8003f62: f042 0208 orr.w r2, r2, #8 8003f66: b292 uxth r2, r2 8003f68: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); 8003f6c: 687b ldr r3, [r7, #4] 8003f6e: 681b ldr r3, [r3, #0] 8003f70: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003f74: b29a uxth r2, r3 8003f76: 687b ldr r3, [r7, #4] 8003f78: 681b ldr r3, [r3, #0] 8003f7a: f422 6200 bic.w r2, r2, #2048 @ 0x800 8003f7e: b292 uxth r2, r2 8003f80: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE; 8003f84: 687b ldr r3, [r7, #4] 8003f86: 681b ldr r3, [r3, #0] 8003f88: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8003f8c: b29a uxth r2, r3 8003f8e: 687b ldr r3, [r7, #4] 8003f90: 681b ldr r3, [r3, #0] 8003f92: f042 0204 orr.w r2, r2, #4 8003f96: b292 uxth r2, r2 8003f98: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 8003f9c: 6878 ldr r0, [r7, #4] 8003f9e: f007 f95f bl 800b260 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8003fa2: e026 b.n 8003ff2 } if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF) 8003fa4: 69bb ldr r3, [r7, #24] 8003fa6: f403 7300 and.w r3, r3, #512 @ 0x200 8003faa: 2b00 cmp r3, #0 8003fac: d00f beq.n 8003fce { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); 8003fae: 687b ldr r3, [r7, #4] 8003fb0: 681b ldr r3, [r3, #0] 8003fb2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003fb6: b29a uxth r2, r3 8003fb8: 687b ldr r3, [r7, #4] 8003fba: 681b ldr r3, [r3, #0] 8003fbc: f422 7200 bic.w r2, r2, #512 @ 0x200 8003fc0: b292 uxth r2, r2 8003fc2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SOFCallback(hpcd); #else HAL_PCD_SOFCallback(hpcd); 8003fc6: 6878 ldr r0, [r7, #4] 8003fc8: f007 f91d bl 800b206 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ return; 8003fcc: e011 b.n 8003ff2 } if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF) 8003fce: 69bb ldr r3, [r7, #24] 8003fd0: f403 7380 and.w r3, r3, #256 @ 0x100 8003fd4: 2b00 cmp r3, #0 8003fd6: d00c beq.n 8003ff2 { /* clear ESOF flag in ISTR */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); 8003fd8: 687b ldr r3, [r7, #4] 8003fda: 681b ldr r3, [r3, #0] 8003fdc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8003fe0: b29a uxth r2, r3 8003fe2: 687b ldr r3, [r7, #4] 8003fe4: 681b ldr r3, [r3, #0] 8003fe6: f422 7280 bic.w r2, r2, #256 @ 0x100 8003fea: b292 uxth r2, r2 8003fec: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 return; 8003ff0: bf00 nop } } 8003ff2: 3720 adds r7, #32 8003ff4: 46bd mov sp, r7 8003ff6: bd80 pop {r7, pc} 08003ff8 : * @param hpcd PCD handle * @param address new device address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) { 8003ff8: b580 push {r7, lr} 8003ffa: b082 sub sp, #8 8003ffc: af00 add r7, sp, #0 8003ffe: 6078 str r0, [r7, #4] 8004000: 460b mov r3, r1 8004002: 70fb strb r3, [r7, #3] __HAL_LOCK(hpcd); 8004004: 687b ldr r3, [r7, #4] 8004006: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 800400a: 2b01 cmp r3, #1 800400c: d101 bne.n 8004012 800400e: 2302 movs r3, #2 8004010: e012 b.n 8004038 8004012: 687b ldr r3, [r7, #4] 8004014: 2201 movs r2, #1 8004016: f883 2290 strb.w r2, [r3, #656] @ 0x290 hpcd->USB_Address = address; 800401a: 687b ldr r3, [r7, #4] 800401c: 78fa ldrb r2, [r7, #3] 800401e: 735a strb r2, [r3, #13] (void)USB_SetDevAddress(hpcd->Instance, address); 8004020: 687b ldr r3, [r7, #4] 8004022: 681b ldr r3, [r3, #0] 8004024: 78fa ldrb r2, [r7, #3] 8004026: 4611 mov r1, r2 8004028: 4618 mov r0, r3 800402a: f005 f9cd bl 80093c8 __HAL_UNLOCK(hpcd); 800402e: 687b ldr r3, [r7, #4] 8004030: 2200 movs r2, #0 8004032: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8004036: 2300 movs r3, #0 } 8004038: 4618 mov r0, r3 800403a: 3708 adds r7, #8 800403c: 46bd mov sp, r7 800403e: bd80 pop {r7, pc} 08004040 : * @param ep_type endpoint type * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { 8004040: b580 push {r7, lr} 8004042: b084 sub sp, #16 8004044: af00 add r7, sp, #0 8004046: 6078 str r0, [r7, #4] 8004048: 4608 mov r0, r1 800404a: 4611 mov r1, r2 800404c: 461a mov r2, r3 800404e: 4603 mov r3, r0 8004050: 70fb strb r3, [r7, #3] 8004052: 460b mov r3, r1 8004054: 803b strh r3, [r7, #0] 8004056: 4613 mov r3, r2 8004058: 70bb strb r3, [r7, #2] HAL_StatusTypeDef ret = HAL_OK; 800405a: 2300 movs r3, #0 800405c: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 800405e: f997 3003 ldrsb.w r3, [r7, #3] 8004062: 2b00 cmp r3, #0 8004064: da0e bge.n 8004084 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8004066: 78fb ldrb r3, [r7, #3] 8004068: f003 0207 and.w r2, r3, #7 800406c: 4613 mov r3, r2 800406e: 009b lsls r3, r3, #2 8004070: 4413 add r3, r2 8004072: 00db lsls r3, r3, #3 8004074: 3310 adds r3, #16 8004076: 687a ldr r2, [r7, #4] 8004078: 4413 add r3, r2 800407a: 60fb str r3, [r7, #12] ep->is_in = 1U; 800407c: 68fb ldr r3, [r7, #12] 800407e: 2201 movs r2, #1 8004080: 705a strb r2, [r3, #1] 8004082: e00e b.n 80040a2 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8004084: 78fb ldrb r3, [r7, #3] 8004086: f003 0207 and.w r2, r3, #7 800408a: 4613 mov r3, r2 800408c: 009b lsls r3, r3, #2 800408e: 4413 add r3, r2 8004090: 00db lsls r3, r3, #3 8004092: f503 73a8 add.w r3, r3, #336 @ 0x150 8004096: 687a ldr r2, [r7, #4] 8004098: 4413 add r3, r2 800409a: 60fb str r3, [r7, #12] ep->is_in = 0U; 800409c: 68fb ldr r3, [r7, #12] 800409e: 2200 movs r2, #0 80040a0: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 80040a2: 78fb ldrb r3, [r7, #3] 80040a4: f003 0307 and.w r3, r3, #7 80040a8: b2da uxtb r2, r3 80040aa: 68fb ldr r3, [r7, #12] 80040ac: 701a strb r2, [r3, #0] ep->maxpacket = ep_mps; 80040ae: 883a ldrh r2, [r7, #0] 80040b0: 68fb ldr r3, [r7, #12] 80040b2: 611a str r2, [r3, #16] ep->type = ep_type; 80040b4: 68fb ldr r3, [r7, #12] 80040b6: 78ba ldrb r2, [r7, #2] 80040b8: 70da strb r2, [r3, #3] ep->tx_fifo_num = ep->num; } #endif /* defined (USB_OTG_FS) */ /* Set initial data PID. */ if (ep_type == EP_TYPE_BULK) 80040ba: 78bb ldrb r3, [r7, #2] 80040bc: 2b02 cmp r3, #2 80040be: d102 bne.n 80040c6 { ep->data_pid_start = 0U; 80040c0: 68fb ldr r3, [r7, #12] 80040c2: 2200 movs r2, #0 80040c4: 711a strb r2, [r3, #4] } __HAL_LOCK(hpcd); 80040c6: 687b ldr r3, [r7, #4] 80040c8: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 80040cc: 2b01 cmp r3, #1 80040ce: d101 bne.n 80040d4 80040d0: 2302 movs r3, #2 80040d2: e00e b.n 80040f2 80040d4: 687b ldr r3, [r7, #4] 80040d6: 2201 movs r2, #1 80040d8: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_ActivateEndpoint(hpcd->Instance, ep); 80040dc: 687b ldr r3, [r7, #4] 80040de: 681b ldr r3, [r3, #0] 80040e0: 68f9 ldr r1, [r7, #12] 80040e2: 4618 mov r0, r3 80040e4: f002 ff16 bl 8006f14 __HAL_UNLOCK(hpcd); 80040e8: 687b ldr r3, [r7, #4] 80040ea: 2200 movs r2, #0 80040ec: f883 2290 strb.w r2, [r3, #656] @ 0x290 return ret; 80040f0: 7afb ldrb r3, [r7, #11] } 80040f2: 4618 mov r0, r3 80040f4: 3710 adds r7, #16 80040f6: 46bd mov sp, r7 80040f8: bd80 pop {r7, pc} 080040fa : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 80040fa: b580 push {r7, lr} 80040fc: b084 sub sp, #16 80040fe: af00 add r7, sp, #0 8004100: 6078 str r0, [r7, #4] 8004102: 460b mov r3, r1 8004104: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8004106: f997 3003 ldrsb.w r3, [r7, #3] 800410a: 2b00 cmp r3, #0 800410c: da0e bge.n 800412c { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 800410e: 78fb ldrb r3, [r7, #3] 8004110: f003 0207 and.w r2, r3, #7 8004114: 4613 mov r3, r2 8004116: 009b lsls r3, r3, #2 8004118: 4413 add r3, r2 800411a: 00db lsls r3, r3, #3 800411c: 3310 adds r3, #16 800411e: 687a ldr r2, [r7, #4] 8004120: 4413 add r3, r2 8004122: 60fb str r3, [r7, #12] ep->is_in = 1U; 8004124: 68fb ldr r3, [r7, #12] 8004126: 2201 movs r2, #1 8004128: 705a strb r2, [r3, #1] 800412a: e00e b.n 800414a } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 800412c: 78fb ldrb r3, [r7, #3] 800412e: f003 0207 and.w r2, r3, #7 8004132: 4613 mov r3, r2 8004134: 009b lsls r3, r3, #2 8004136: 4413 add r3, r2 8004138: 00db lsls r3, r3, #3 800413a: f503 73a8 add.w r3, r3, #336 @ 0x150 800413e: 687a ldr r2, [r7, #4] 8004140: 4413 add r3, r2 8004142: 60fb str r3, [r7, #12] ep->is_in = 0U; 8004144: 68fb ldr r3, [r7, #12] 8004146: 2200 movs r2, #0 8004148: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 800414a: 78fb ldrb r3, [r7, #3] 800414c: f003 0307 and.w r3, r3, #7 8004150: b2da uxtb r2, r3 8004152: 68fb ldr r3, [r7, #12] 8004154: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8004156: 687b ldr r3, [r7, #4] 8004158: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 800415c: 2b01 cmp r3, #1 800415e: d101 bne.n 8004164 8004160: 2302 movs r3, #2 8004162: e00e b.n 8004182 8004164: 687b ldr r3, [r7, #4] 8004166: 2201 movs r2, #1 8004168: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_DeactivateEndpoint(hpcd->Instance, ep); 800416c: 687b ldr r3, [r7, #4] 800416e: 681b ldr r3, [r3, #0] 8004170: 68f9 ldr r1, [r7, #12] 8004172: 4618 mov r0, r3 8004174: f003 fa8e bl 8007694 __HAL_UNLOCK(hpcd); 8004178: 687b ldr r3, [r7, #4] 800417a: 2200 movs r2, #0 800417c: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 8004180: 2300 movs r3, #0 } 8004182: 4618 mov r0, r3 8004184: 3710 adds r7, #16 8004186: 46bd mov sp, r7 8004188: bd80 pop {r7, pc} 0800418a : * @param pBuf pointer to the reception buffer * @param len amount of data to be received * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 800418a: b580 push {r7, lr} 800418c: b086 sub sp, #24 800418e: af00 add r7, sp, #0 8004190: 60f8 str r0, [r7, #12] 8004192: 607a str r2, [r7, #4] 8004194: 603b str r3, [r7, #0] 8004196: 460b mov r3, r1 8004198: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 800419a: 7afb ldrb r3, [r7, #11] 800419c: f003 0207 and.w r2, r3, #7 80041a0: 4613 mov r3, r2 80041a2: 009b lsls r3, r3, #2 80041a4: 4413 add r3, r2 80041a6: 00db lsls r3, r3, #3 80041a8: f503 73a8 add.w r3, r3, #336 @ 0x150 80041ac: 68fa ldr r2, [r7, #12] 80041ae: 4413 add r3, r2 80041b0: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 80041b2: 697b ldr r3, [r7, #20] 80041b4: 687a ldr r2, [r7, #4] 80041b6: 615a str r2, [r3, #20] ep->xfer_len = len; 80041b8: 697b ldr r3, [r7, #20] 80041ba: 683a ldr r2, [r7, #0] 80041bc: 619a str r2, [r3, #24] ep->xfer_count = 0U; 80041be: 697b ldr r3, [r7, #20] 80041c0: 2200 movs r2, #0 80041c2: 61da str r2, [r3, #28] ep->is_in = 0U; 80041c4: 697b ldr r3, [r7, #20] 80041c6: 2200 movs r2, #0 80041c8: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 80041ca: 7afb ldrb r3, [r7, #11] 80041cc: f003 0307 and.w r3, r3, #7 80041d0: b2da uxtb r2, r3 80041d2: 697b ldr r3, [r7, #20] 80041d4: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 80041d6: 68fb ldr r3, [r7, #12] 80041d8: 681b ldr r3, [r3, #0] 80041da: 6979 ldr r1, [r7, #20] 80041dc: 4618 mov r0, r3 80041de: f003 fc45 bl 8007a6c return HAL_OK; 80041e2: 2300 movs r3, #0 } 80041e4: 4618 mov r0, r3 80041e6: 3718 adds r7, #24 80041e8: 46bd mov sp, r7 80041ea: bd80 pop {r7, pc} 080041ec : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval Data Size */ uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr) { 80041ec: b480 push {r7} 80041ee: b083 sub sp, #12 80041f0: af00 add r7, sp, #0 80041f2: 6078 str r0, [r7, #4] 80041f4: 460b mov r3, r1 80041f6: 70fb strb r3, [r7, #3] return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; 80041f8: 78fb ldrb r3, [r7, #3] 80041fa: f003 0207 and.w r2, r3, #7 80041fe: 6879 ldr r1, [r7, #4] 8004200: 4613 mov r3, r2 8004202: 009b lsls r3, r3, #2 8004204: 4413 add r3, r2 8004206: 00db lsls r3, r3, #3 8004208: 440b add r3, r1 800420a: f503 73b6 add.w r3, r3, #364 @ 0x16c 800420e: 681b ldr r3, [r3, #0] } 8004210: 4618 mov r0, r3 8004212: 370c adds r7, #12 8004214: 46bd mov sp, r7 8004216: bc80 pop {r7} 8004218: 4770 bx lr 0800421a : * @param pBuf pointer to the transmission buffer * @param len amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 800421a: b580 push {r7, lr} 800421c: b086 sub sp, #24 800421e: af00 add r7, sp, #0 8004220: 60f8 str r0, [r7, #12] 8004222: 607a str r2, [r7, #4] 8004224: 603b str r3, [r7, #0] 8004226: 460b mov r3, r1 8004228: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 800422a: 7afb ldrb r3, [r7, #11] 800422c: f003 0207 and.w r2, r3, #7 8004230: 4613 mov r3, r2 8004232: 009b lsls r3, r3, #2 8004234: 4413 add r3, r2 8004236: 00db lsls r3, r3, #3 8004238: 3310 adds r3, #16 800423a: 68fa ldr r2, [r7, #12] 800423c: 4413 add r3, r2 800423e: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8004240: 697b ldr r3, [r7, #20] 8004242: 687a ldr r2, [r7, #4] 8004244: 615a str r2, [r3, #20] ep->xfer_len = len; 8004246: 697b ldr r3, [r7, #20] 8004248: 683a ldr r2, [r7, #0] 800424a: 619a str r2, [r3, #24] #if defined (USB) ep->xfer_fill_db = 1U; 800424c: 697b ldr r3, [r7, #20] 800424e: 2201 movs r2, #1 8004250: f883 2024 strb.w r2, [r3, #36] @ 0x24 ep->xfer_len_db = len; 8004254: 697b ldr r3, [r7, #20] 8004256: 683a ldr r2, [r7, #0] 8004258: 621a str r2, [r3, #32] #endif /* defined (USB) */ ep->xfer_count = 0U; 800425a: 697b ldr r3, [r7, #20] 800425c: 2200 movs r2, #0 800425e: 61da str r2, [r3, #28] ep->is_in = 1U; 8004260: 697b ldr r3, [r7, #20] 8004262: 2201 movs r2, #1 8004264: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8004266: 7afb ldrb r3, [r7, #11] 8004268: f003 0307 and.w r3, r3, #7 800426c: b2da uxtb r2, r3 800426e: 697b ldr r3, [r7, #20] 8004270: 701a strb r2, [r3, #0] (void)USB_EPStartXfer(hpcd->Instance, ep); 8004272: 68fb ldr r3, [r7, #12] 8004274: 681b ldr r3, [r3, #0] 8004276: 6979 ldr r1, [r7, #20] 8004278: 4618 mov r0, r3 800427a: f003 fbf7 bl 8007a6c return HAL_OK; 800427e: 2300 movs r3, #0 } 8004280: 4618 mov r0, r3 8004282: 3718 adds r7, #24 8004284: 46bd mov sp, r7 8004286: bd80 pop {r7, pc} 08004288 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8004288: b580 push {r7, lr} 800428a: b084 sub sp, #16 800428c: af00 add r7, sp, #0 800428e: 6078 str r0, [r7, #4] 8004290: 460b mov r3, r1 8004292: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) 8004294: 78fb ldrb r3, [r7, #3] 8004296: f003 0307 and.w r3, r3, #7 800429a: 687a ldr r2, [r7, #4] 800429c: 7912 ldrb r2, [r2, #4] 800429e: 4293 cmp r3, r2 80042a0: d901 bls.n 80042a6 { return HAL_ERROR; 80042a2: 2301 movs r3, #1 80042a4: e04c b.n 8004340 } if ((0x80U & ep_addr) == 0x80U) 80042a6: f997 3003 ldrsb.w r3, [r7, #3] 80042aa: 2b00 cmp r3, #0 80042ac: da0e bge.n 80042cc { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 80042ae: 78fb ldrb r3, [r7, #3] 80042b0: f003 0207 and.w r2, r3, #7 80042b4: 4613 mov r3, r2 80042b6: 009b lsls r3, r3, #2 80042b8: 4413 add r3, r2 80042ba: 00db lsls r3, r3, #3 80042bc: 3310 adds r3, #16 80042be: 687a ldr r2, [r7, #4] 80042c0: 4413 add r3, r2 80042c2: 60fb str r3, [r7, #12] ep->is_in = 1U; 80042c4: 68fb ldr r3, [r7, #12] 80042c6: 2201 movs r2, #1 80042c8: 705a strb r2, [r3, #1] 80042ca: e00c b.n 80042e6 } else { ep = &hpcd->OUT_ep[ep_addr]; 80042cc: 78fa ldrb r2, [r7, #3] 80042ce: 4613 mov r3, r2 80042d0: 009b lsls r3, r3, #2 80042d2: 4413 add r3, r2 80042d4: 00db lsls r3, r3, #3 80042d6: f503 73a8 add.w r3, r3, #336 @ 0x150 80042da: 687a ldr r2, [r7, #4] 80042dc: 4413 add r3, r2 80042de: 60fb str r3, [r7, #12] ep->is_in = 0U; 80042e0: 68fb ldr r3, [r7, #12] 80042e2: 2200 movs r2, #0 80042e4: 705a strb r2, [r3, #1] } ep->is_stall = 1U; 80042e6: 68fb ldr r3, [r7, #12] 80042e8: 2201 movs r2, #1 80042ea: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 80042ec: 78fb ldrb r3, [r7, #3] 80042ee: f003 0307 and.w r3, r3, #7 80042f2: b2da uxtb r2, r3 80042f4: 68fb ldr r3, [r7, #12] 80042f6: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 80042f8: 687b ldr r3, [r7, #4] 80042fa: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 80042fe: 2b01 cmp r3, #1 8004300: d101 bne.n 8004306 8004302: 2302 movs r3, #2 8004304: e01c b.n 8004340 8004306: 687b ldr r3, [r7, #4] 8004308: 2201 movs r2, #1 800430a: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPSetStall(hpcd->Instance, ep); 800430e: 687b ldr r3, [r7, #4] 8004310: 681b ldr r3, [r3, #0] 8004312: 68f9 ldr r1, [r7, #12] 8004314: 4618 mov r0, r3 8004316: f004 ff5a bl 80091ce if ((ep_addr & EP_ADDR_MSK) == 0U) 800431a: 78fb ldrb r3, [r7, #3] 800431c: f003 0307 and.w r3, r3, #7 8004320: 2b00 cmp r3, #0 8004322: d108 bne.n 8004336 { (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup); 8004324: 687b ldr r3, [r7, #4] 8004326: 681a ldr r2, [r3, #0] 8004328: 687b ldr r3, [r7, #4] 800432a: f503 7326 add.w r3, r3, #664 @ 0x298 800432e: 4619 mov r1, r3 8004330: 4610 mov r0, r2 8004332: f005 f87f bl 8009434 } __HAL_UNLOCK(hpcd); 8004336: 687b ldr r3, [r7, #4] 8004338: 2200 movs r2, #0 800433a: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 800433e: 2300 movs r3, #0 } 8004340: 4618 mov r0, r3 8004342: 3710 adds r7, #16 8004344: 46bd mov sp, r7 8004346: bd80 pop {r7, pc} 08004348 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8004348: b580 push {r7, lr} 800434a: b084 sub sp, #16 800434c: af00 add r7, sp, #0 800434e: 6078 str r0, [r7, #4] 8004350: 460b mov r3, r1 8004352: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) 8004354: 78fb ldrb r3, [r7, #3] 8004356: f003 030f and.w r3, r3, #15 800435a: 687a ldr r2, [r7, #4] 800435c: 7912 ldrb r2, [r2, #4] 800435e: 4293 cmp r3, r2 8004360: d901 bls.n 8004366 { return HAL_ERROR; 8004362: 2301 movs r3, #1 8004364: e040 b.n 80043e8 } if ((0x80U & ep_addr) == 0x80U) 8004366: f997 3003 ldrsb.w r3, [r7, #3] 800436a: 2b00 cmp r3, #0 800436c: da0e bge.n 800438c { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 800436e: 78fb ldrb r3, [r7, #3] 8004370: f003 0207 and.w r2, r3, #7 8004374: 4613 mov r3, r2 8004376: 009b lsls r3, r3, #2 8004378: 4413 add r3, r2 800437a: 00db lsls r3, r3, #3 800437c: 3310 adds r3, #16 800437e: 687a ldr r2, [r7, #4] 8004380: 4413 add r3, r2 8004382: 60fb str r3, [r7, #12] ep->is_in = 1U; 8004384: 68fb ldr r3, [r7, #12] 8004386: 2201 movs r2, #1 8004388: 705a strb r2, [r3, #1] 800438a: e00e b.n 80043aa } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 800438c: 78fb ldrb r3, [r7, #3] 800438e: f003 0207 and.w r2, r3, #7 8004392: 4613 mov r3, r2 8004394: 009b lsls r3, r3, #2 8004396: 4413 add r3, r2 8004398: 00db lsls r3, r3, #3 800439a: f503 73a8 add.w r3, r3, #336 @ 0x150 800439e: 687a ldr r2, [r7, #4] 80043a0: 4413 add r3, r2 80043a2: 60fb str r3, [r7, #12] ep->is_in = 0U; 80043a4: 68fb ldr r3, [r7, #12] 80043a6: 2200 movs r2, #0 80043a8: 705a strb r2, [r3, #1] } ep->is_stall = 0U; 80043aa: 68fb ldr r3, [r7, #12] 80043ac: 2200 movs r2, #0 80043ae: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 80043b0: 78fb ldrb r3, [r7, #3] 80043b2: f003 0307 and.w r3, r3, #7 80043b6: b2da uxtb r2, r3 80043b8: 68fb ldr r3, [r7, #12] 80043ba: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 80043bc: 687b ldr r3, [r7, #4] 80043be: f893 3290 ldrb.w r3, [r3, #656] @ 0x290 80043c2: 2b01 cmp r3, #1 80043c4: d101 bne.n 80043ca 80043c6: 2302 movs r3, #2 80043c8: e00e b.n 80043e8 80043ca: 687b ldr r3, [r7, #4] 80043cc: 2201 movs r2, #1 80043ce: f883 2290 strb.w r2, [r3, #656] @ 0x290 (void)USB_EPClearStall(hpcd->Instance, ep); 80043d2: 687b ldr r3, [r7, #4] 80043d4: 681b ldr r3, [r3, #0] 80043d6: 68f9 ldr r1, [r7, #12] 80043d8: 4618 mov r0, r3 80043da: f004 ff48 bl 800926e __HAL_UNLOCK(hpcd); 80043de: 687b ldr r3, [r7, #4] 80043e0: 2200 movs r2, #0 80043e2: f883 2290 strb.w r2, [r3, #656] @ 0x290 return HAL_OK; 80043e6: 2300 movs r3, #0 } 80043e8: 4618 mov r0, r3 80043ea: 3710 adds r7, #16 80043ec: 46bd mov sp, r7 80043ee: bd80 pop {r7, pc} 080043f0 : * @brief This function handles PCD Endpoint interrupt request. * @param hpcd PCD handle * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) { 80043f0: b580 push {r7, lr} 80043f2: b096 sub sp, #88 @ 0x58 80043f4: af00 add r7, sp, #0 80043f6: 6078 str r0, [r7, #4] #if (USE_USB_DOUBLE_BUFFER != 1U) count = 0U; #endif /* USE_USB_DOUBLE_BUFFER */ /* stay in loop while pending interrupts */ while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 80043f8: e3bb b.n 8004b72 { wIstr = hpcd->Instance->ISTR; 80043fa: 687b ldr r3, [r7, #4] 80043fc: 681b ldr r3, [r3, #0] 80043fe: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8004402: f8a7 304e strh.w r3, [r7, #78] @ 0x4e /* extract highest priority endpoint number */ epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); 8004406: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 800440a: b2db uxtb r3, r3 800440c: f003 030f and.w r3, r3, #15 8004410: f887 304d strb.w r3, [r7, #77] @ 0x4d if (epindex == 0U) 8004414: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8004418: 2b00 cmp r3, #0 800441a: f040 8175 bne.w 8004708 { /* Decode and service control endpoint interrupt */ /* DIR bit = origin of the interrupt */ if ((wIstr & USB_ISTR_DIR) == 0U) 800441e: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 8004422: f003 0310 and.w r3, r3, #16 8004426: 2b00 cmp r3, #0 8004428: d14e bne.n 80044c8 { /* DIR = 0 */ /* DIR = 0 => IN int */ /* DIR = 0 implies that (EP_CTR_TX = 1) always */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); 800442a: 687b ldr r3, [r7, #4] 800442c: 681b ldr r3, [r3, #0] 800442e: 881b ldrh r3, [r3, #0] 8004430: b29b uxth r3, r3 8004432: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 8004436: f023 0370 bic.w r3, r3, #112 @ 0x70 800443a: 81fb strh r3, [r7, #14] 800443c: 687b ldr r3, [r7, #4] 800443e: 681a ldr r2, [r3, #0] 8004440: 89fb ldrh r3, [r7, #14] 8004442: ea6f 4343 mvn.w r3, r3, lsl #17 8004446: ea6f 4353 mvn.w r3, r3, lsr #17 800444a: b29b uxth r3, r3 800444c: 8013 strh r3, [r2, #0] ep = &hpcd->IN_ep[0]; 800444e: 687b ldr r3, [r7, #4] 8004450: 3310 adds r3, #16 8004452: 657b str r3, [r7, #84] @ 0x54 ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 8004454: 687b ldr r3, [r7, #4] 8004456: 681b ldr r3, [r3, #0] 8004458: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800445c: b29b uxth r3, r3 800445e: 461a mov r2, r3 8004460: 6d7b ldr r3, [r7, #84] @ 0x54 8004462: 781b ldrb r3, [r3, #0] 8004464: 00db lsls r3, r3, #3 8004466: 4413 add r3, r2 8004468: 3302 adds r3, #2 800446a: 005b lsls r3, r3, #1 800446c: 687a ldr r2, [r7, #4] 800446e: 6812 ldr r2, [r2, #0] 8004470: 4413 add r3, r2 8004472: f503 6380 add.w r3, r3, #1024 @ 0x400 8004476: 881b ldrh r3, [r3, #0] 8004478: f3c3 0209 ubfx r2, r3, #0, #10 800447c: 6d7b ldr r3, [r7, #84] @ 0x54 800447e: 61da str r2, [r3, #28] ep->xfer_buff += ep->xfer_count; 8004480: 6d7b ldr r3, [r7, #84] @ 0x54 8004482: 695a ldr r2, [r3, #20] 8004484: 6d7b ldr r3, [r7, #84] @ 0x54 8004486: 69db ldr r3, [r3, #28] 8004488: 441a add r2, r3 800448a: 6d7b ldr r3, [r7, #84] @ 0x54 800448c: 615a str r2, [r3, #20] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, 0U); #else HAL_PCD_DataInStageCallback(hpcd, 0U); 800448e: 2100 movs r1, #0 8004490: 6878 ldr r0, [r7, #4] 8004492: f006 fe9e bl 800b1d2 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U)) 8004496: 687b ldr r3, [r7, #4] 8004498: 7b5b ldrb r3, [r3, #13] 800449a: b2db uxtb r3, r3 800449c: 2b00 cmp r3, #0 800449e: f000 8368 beq.w 8004b72 80044a2: 6d7b ldr r3, [r7, #84] @ 0x54 80044a4: 699b ldr r3, [r3, #24] 80044a6: 2b00 cmp r3, #0 80044a8: f040 8363 bne.w 8004b72 { hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF); 80044ac: 687b ldr r3, [r7, #4] 80044ae: 7b5b ldrb r3, [r3, #13] 80044b0: b2db uxtb r3, r3 80044b2: f063 037f orn r3, r3, #127 @ 0x7f 80044b6: b2da uxtb r2, r3 80044b8: 687b ldr r3, [r7, #4] 80044ba: 681b ldr r3, [r3, #0] 80044bc: f8a3 204c strh.w r2, [r3, #76] @ 0x4c hpcd->USB_Address = 0U; 80044c0: 687b ldr r3, [r7, #4] 80044c2: 2200 movs r2, #0 80044c4: 735a strb r2, [r3, #13] 80044c6: e354 b.n 8004b72 { /* DIR = 1 */ /* DIR = 1 & CTR_RX => SETUP or OUT int */ /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ ep = &hpcd->OUT_ep[0]; 80044c8: 687b ldr r3, [r7, #4] 80044ca: f503 73a8 add.w r3, r3, #336 @ 0x150 80044ce: 657b str r3, [r7, #84] @ 0x54 wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 80044d0: 687b ldr r3, [r7, #4] 80044d2: 681b ldr r3, [r3, #0] 80044d4: 881b ldrh r3, [r3, #0] 80044d6: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_SETUP) != 0U) 80044da: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80044de: f403 6300 and.w r3, r3, #2048 @ 0x800 80044e2: 2b00 cmp r3, #0 80044e4: d034 beq.n 8004550 { /* Get SETUP Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 80044e6: 687b ldr r3, [r7, #4] 80044e8: 681b ldr r3, [r3, #0] 80044ea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80044ee: b29b uxth r3, r3 80044f0: 461a mov r2, r3 80044f2: 6d7b ldr r3, [r7, #84] @ 0x54 80044f4: 781b ldrb r3, [r3, #0] 80044f6: 00db lsls r3, r3, #3 80044f8: 4413 add r3, r2 80044fa: 3306 adds r3, #6 80044fc: 005b lsls r3, r3, #1 80044fe: 687a ldr r2, [r7, #4] 8004500: 6812 ldr r2, [r2, #0] 8004502: 4413 add r3, r2 8004504: f503 6380 add.w r3, r3, #1024 @ 0x400 8004508: 881b ldrh r3, [r3, #0] 800450a: f3c3 0209 ubfx r2, r3, #0, #10 800450e: 6d7b ldr r3, [r7, #84] @ 0x54 8004510: 61da str r2, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 8004512: 687b ldr r3, [r7, #4] 8004514: 6818 ldr r0, [r3, #0] 8004516: 687b ldr r3, [r7, #4] 8004518: f503 7126 add.w r1, r3, #664 @ 0x298 800451c: 6d7b ldr r3, [r7, #84] @ 0x54 800451e: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 8004520: 6d7b ldr r3, [r7, #84] @ 0x54 8004522: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, 8004524: b29b uxth r3, r3 8004526: f004 ffd6 bl 80094d6 /* SETUP bit kept frozen while CTR_RX = 1 */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 800452a: 687b ldr r3, [r7, #4] 800452c: 681b ldr r3, [r3, #0] 800452e: 881b ldrh r3, [r3, #0] 8004530: b29a uxth r2, r3 8004532: f640 738f movw r3, #3983 @ 0xf8f 8004536: 4013 ands r3, r2 8004538: 823b strh r3, [r7, #16] 800453a: 687b ldr r3, [r7, #4] 800453c: 681b ldr r3, [r3, #0] 800453e: 8a3a ldrh r2, [r7, #16] 8004540: f042 0280 orr.w r2, r2, #128 @ 0x80 8004544: b292 uxth r2, r2 8004546: 801a strh r2, [r3, #0] /* Process SETUP Packet*/ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SetupStageCallback(hpcd); #else HAL_PCD_SetupStageCallback(hpcd); 8004548: 6878 ldr r0, [r7, #4] 800454a: f006 fe15 bl 800b178 800454e: e310 b.n 8004b72 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else if ((wEPVal & USB_EP_CTR_RX) != 0U) 8004550: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 8004554: 2b00 cmp r3, #0 8004556: f280 830c bge.w 8004b72 { PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); 800455a: 687b ldr r3, [r7, #4] 800455c: 681b ldr r3, [r3, #0] 800455e: 881b ldrh r3, [r3, #0] 8004560: b29a uxth r2, r3 8004562: f640 738f movw r3, #3983 @ 0xf8f 8004566: 4013 ands r3, r2 8004568: 83fb strh r3, [r7, #30] 800456a: 687b ldr r3, [r7, #4] 800456c: 681b ldr r3, [r3, #0] 800456e: 8bfa ldrh r2, [r7, #30] 8004570: f042 0280 orr.w r2, r2, #128 @ 0x80 8004574: b292 uxth r2, r2 8004576: 801a strh r2, [r3, #0] /* Get Control Data OUT Packet */ ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 8004578: 687b ldr r3, [r7, #4] 800457a: 681b ldr r3, [r3, #0] 800457c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004580: b29b uxth r3, r3 8004582: 461a mov r2, r3 8004584: 6d7b ldr r3, [r7, #84] @ 0x54 8004586: 781b ldrb r3, [r3, #0] 8004588: 00db lsls r3, r3, #3 800458a: 4413 add r3, r2 800458c: 3306 adds r3, #6 800458e: 005b lsls r3, r3, #1 8004590: 687a ldr r2, [r7, #4] 8004592: 6812 ldr r2, [r2, #0] 8004594: 4413 add r3, r2 8004596: f503 6380 add.w r3, r3, #1024 @ 0x400 800459a: 881b ldrh r3, [r3, #0] 800459c: f3c3 0209 ubfx r2, r3, #0, #10 80045a0: 6d7b ldr r3, [r7, #84] @ 0x54 80045a2: 61da str r2, [r3, #28] if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) 80045a4: 6d7b ldr r3, [r7, #84] @ 0x54 80045a6: 69db ldr r3, [r3, #28] 80045a8: 2b00 cmp r3, #0 80045aa: d019 beq.n 80045e0 80045ac: 6d7b ldr r3, [r7, #84] @ 0x54 80045ae: 695b ldr r3, [r3, #20] 80045b0: 2b00 cmp r3, #0 80045b2: d015 beq.n 80045e0 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 80045b4: 687b ldr r3, [r7, #4] 80045b6: 6818 ldr r0, [r3, #0] 80045b8: 6d7b ldr r3, [r7, #84] @ 0x54 80045ba: 6959 ldr r1, [r3, #20] 80045bc: 6d7b ldr r3, [r7, #84] @ 0x54 80045be: 88da ldrh r2, [r3, #6] ep->pmaadress, (uint16_t)ep->xfer_count); 80045c0: 6d7b ldr r3, [r7, #84] @ 0x54 80045c2: 69db ldr r3, [r3, #28] USB_ReadPMA(hpcd->Instance, ep->xfer_buff, 80045c4: b29b uxth r3, r3 80045c6: f004 ff86 bl 80094d6 ep->xfer_buff += ep->xfer_count; 80045ca: 6d7b ldr r3, [r7, #84] @ 0x54 80045cc: 695a ldr r2, [r3, #20] 80045ce: 6d7b ldr r3, [r7, #84] @ 0x54 80045d0: 69db ldr r3, [r3, #28] 80045d2: 441a add r2, r3 80045d4: 6d7b ldr r3, [r7, #84] @ 0x54 80045d6: 615a str r2, [r3, #20] /* Process Control Data OUT Packet */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, 0U); #else HAL_PCD_DataOutStageCallback(hpcd, 0U); 80045d8: 2100 movs r1, #0 80045da: 6878 ldr r0, [r7, #4] 80045dc: f006 fdde bl 800b19c #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); 80045e0: 687b ldr r3, [r7, #4] 80045e2: 681b ldr r3, [r3, #0] 80045e4: 881b ldrh r3, [r3, #0] 80045e6: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) 80045ea: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80045ee: f403 6300 and.w r3, r3, #2048 @ 0x800 80045f2: 2b00 cmp r3, #0 80045f4: f040 82bd bne.w 8004b72 80045f8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80045fc: f403 5340 and.w r3, r3, #12288 @ 0x3000 8004600: f5b3 5f40 cmp.w r3, #12288 @ 0x3000 8004604: f000 82b5 beq.w 8004b72 { PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); 8004608: 687b ldr r3, [r7, #4] 800460a: 681b ldr r3, [r3, #0] 800460c: 61bb str r3, [r7, #24] 800460e: 687b ldr r3, [r7, #4] 8004610: 681b ldr r3, [r3, #0] 8004612: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004616: b29b uxth r3, r3 8004618: 461a mov r2, r3 800461a: 69bb ldr r3, [r7, #24] 800461c: 4413 add r3, r2 800461e: 61bb str r3, [r7, #24] 8004620: 69bb ldr r3, [r7, #24] 8004622: f203 430c addw r3, r3, #1036 @ 0x40c 8004626: 617b str r3, [r7, #20] 8004628: 697b ldr r3, [r7, #20] 800462a: 881b ldrh r3, [r3, #0] 800462c: b29b uxth r3, r3 800462e: f3c3 0309 ubfx r3, r3, #0, #10 8004632: b29a uxth r2, r3 8004634: 697b ldr r3, [r7, #20] 8004636: 801a strh r2, [r3, #0] 8004638: 6d7b ldr r3, [r7, #84] @ 0x54 800463a: 691b ldr r3, [r3, #16] 800463c: 2b3e cmp r3, #62 @ 0x3e 800463e: d91d bls.n 800467c 8004640: 6d7b ldr r3, [r7, #84] @ 0x54 8004642: 691b ldr r3, [r3, #16] 8004644: 095b lsrs r3, r3, #5 8004646: 647b str r3, [r7, #68] @ 0x44 8004648: 6d7b ldr r3, [r7, #84] @ 0x54 800464a: 691b ldr r3, [r3, #16] 800464c: f003 031f and.w r3, r3, #31 8004650: 2b00 cmp r3, #0 8004652: d102 bne.n 800465a 8004654: 6c7b ldr r3, [r7, #68] @ 0x44 8004656: 3b01 subs r3, #1 8004658: 647b str r3, [r7, #68] @ 0x44 800465a: 697b ldr r3, [r7, #20] 800465c: 881b ldrh r3, [r3, #0] 800465e: b29a uxth r2, r3 8004660: 6c7b ldr r3, [r7, #68] @ 0x44 8004662: b29b uxth r3, r3 8004664: 029b lsls r3, r3, #10 8004666: b29b uxth r3, r3 8004668: 4313 orrs r3, r2 800466a: b29b uxth r3, r3 800466c: ea6f 4343 mvn.w r3, r3, lsl #17 8004670: ea6f 4353 mvn.w r3, r3, lsr #17 8004674: b29a uxth r2, r3 8004676: 697b ldr r3, [r7, #20] 8004678: 801a strh r2, [r3, #0] 800467a: e026 b.n 80046ca 800467c: 6d7b ldr r3, [r7, #84] @ 0x54 800467e: 691b ldr r3, [r3, #16] 8004680: 2b00 cmp r3, #0 8004682: d10a bne.n 800469a 8004684: 697b ldr r3, [r7, #20] 8004686: 881b ldrh r3, [r3, #0] 8004688: b29b uxth r3, r3 800468a: ea6f 4343 mvn.w r3, r3, lsl #17 800468e: ea6f 4353 mvn.w r3, r3, lsr #17 8004692: b29a uxth r2, r3 8004694: 697b ldr r3, [r7, #20] 8004696: 801a strh r2, [r3, #0] 8004698: e017 b.n 80046ca 800469a: 6d7b ldr r3, [r7, #84] @ 0x54 800469c: 691b ldr r3, [r3, #16] 800469e: 085b lsrs r3, r3, #1 80046a0: 647b str r3, [r7, #68] @ 0x44 80046a2: 6d7b ldr r3, [r7, #84] @ 0x54 80046a4: 691b ldr r3, [r3, #16] 80046a6: f003 0301 and.w r3, r3, #1 80046aa: 2b00 cmp r3, #0 80046ac: d002 beq.n 80046b4 80046ae: 6c7b ldr r3, [r7, #68] @ 0x44 80046b0: 3301 adds r3, #1 80046b2: 647b str r3, [r7, #68] @ 0x44 80046b4: 697b ldr r3, [r7, #20] 80046b6: 881b ldrh r3, [r3, #0] 80046b8: b29a uxth r2, r3 80046ba: 6c7b ldr r3, [r7, #68] @ 0x44 80046bc: b29b uxth r3, r3 80046be: 029b lsls r3, r3, #10 80046c0: b29b uxth r3, r3 80046c2: 4313 orrs r3, r2 80046c4: b29a uxth r2, r3 80046c6: 697b ldr r3, [r7, #20] 80046c8: 801a strh r2, [r3, #0] PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); 80046ca: 687b ldr r3, [r7, #4] 80046cc: 681b ldr r3, [r3, #0] 80046ce: 881b ldrh r3, [r3, #0] 80046d0: b29b uxth r3, r3 80046d2: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80046d6: f023 0370 bic.w r3, r3, #112 @ 0x70 80046da: 827b strh r3, [r7, #18] 80046dc: 8a7b ldrh r3, [r7, #18] 80046de: f483 5380 eor.w r3, r3, #4096 @ 0x1000 80046e2: 827b strh r3, [r7, #18] 80046e4: 8a7b ldrh r3, [r7, #18] 80046e6: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80046ea: 827b strh r3, [r7, #18] 80046ec: 687b ldr r3, [r7, #4] 80046ee: 681a ldr r2, [r3, #0] 80046f0: 8a7b ldrh r3, [r7, #18] 80046f2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80046f6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80046fa: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80046fe: f043 0380 orr.w r3, r3, #128 @ 0x80 8004702: b29b uxth r3, r3 8004704: 8013 strh r3, [r2, #0] 8004706: e234 b.n 8004b72 } else { /* Decode and service non control endpoints interrupt */ /* process related endpoint register */ wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); 8004708: 687b ldr r3, [r7, #4] 800470a: 681b ldr r3, [r3, #0] 800470c: 461a mov r2, r3 800470e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8004712: 009b lsls r3, r3, #2 8004714: 4413 add r3, r2 8004716: 881b ldrh r3, [r3, #0] 8004718: f8a7 304a strh.w r3, [r7, #74] @ 0x4a if ((wEPVal & USB_EP_CTR_RX) != 0U) 800471c: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a 8004720: 2b00 cmp r3, #0 8004722: f280 80fc bge.w 800491e { /* clear int flag */ PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); 8004726: 687b ldr r3, [r7, #4] 8004728: 681b ldr r3, [r3, #0] 800472a: 461a mov r2, r3 800472c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8004730: 009b lsls r3, r3, #2 8004732: 4413 add r3, r2 8004734: 881b ldrh r3, [r3, #0] 8004736: b29a uxth r2, r3 8004738: f640 738f movw r3, #3983 @ 0xf8f 800473c: 4013 ands r3, r2 800473e: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 8004742: 687b ldr r3, [r7, #4] 8004744: 681b ldr r3, [r3, #0] 8004746: 461a mov r2, r3 8004748: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 800474c: 009b lsls r3, r3, #2 800474e: 4413 add r3, r2 8004750: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48 8004754: f042 0280 orr.w r2, r2, #128 @ 0x80 8004758: b292 uxth r2, r2 800475a: 801a strh r2, [r3, #0] ep = &hpcd->OUT_ep[epindex]; 800475c: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 8004760: 4613 mov r3, r2 8004762: 009b lsls r3, r3, #2 8004764: 4413 add r3, r2 8004766: 00db lsls r3, r3, #3 8004768: f503 73a8 add.w r3, r3, #336 @ 0x150 800476c: 687a ldr r2, [r7, #4] 800476e: 4413 add r3, r2 8004770: 657b str r3, [r7, #84] @ 0x54 /* OUT Single Buffering */ if (ep->doublebuffer == 0U) 8004772: 6d7b ldr r3, [r7, #84] @ 0x54 8004774: 7b1b ldrb r3, [r3, #12] 8004776: 2b00 cmp r3, #0 8004778: d125 bne.n 80047c6 { count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); 800477a: 687b ldr r3, [r7, #4] 800477c: 681b ldr r3, [r3, #0] 800477e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004782: b29b uxth r3, r3 8004784: 461a mov r2, r3 8004786: 6d7b ldr r3, [r7, #84] @ 0x54 8004788: 781b ldrb r3, [r3, #0] 800478a: 00db lsls r3, r3, #3 800478c: 4413 add r3, r2 800478e: 3306 adds r3, #6 8004790: 005b lsls r3, r3, #1 8004792: 687a ldr r2, [r7, #4] 8004794: 6812 ldr r2, [r2, #0] 8004796: 4413 add r3, r2 8004798: f503 6380 add.w r3, r3, #1024 @ 0x400 800479c: 881b ldrh r3, [r3, #0] 800479e: f3c3 0309 ubfx r3, r3, #0, #10 80047a2: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 80047a6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80047aa: 2b00 cmp r3, #0 80047ac: f000 8092 beq.w 80048d4 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); 80047b0: 687b ldr r3, [r7, #4] 80047b2: 6818 ldr r0, [r3, #0] 80047b4: 6d7b ldr r3, [r7, #84] @ 0x54 80047b6: 6959 ldr r1, [r3, #20] 80047b8: 6d7b ldr r3, [r7, #84] @ 0x54 80047ba: 88da ldrh r2, [r3, #6] 80047bc: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80047c0: f004 fe89 bl 80094d6 80047c4: e086 b.n 80048d4 } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* manage double buffer bulk out */ if (ep->type == EP_TYPE_BULK) 80047c6: 6d7b ldr r3, [r7, #84] @ 0x54 80047c8: 78db ldrb r3, [r3, #3] 80047ca: 2b02 cmp r3, #2 80047cc: d10a bne.n 80047e4 { count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal); 80047ce: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 80047d2: 461a mov r2, r3 80047d4: 6d79 ldr r1, [r7, #84] @ 0x54 80047d6: 6878 ldr r0, [r7, #4] 80047d8: f000 f9d9 bl 8004b8e 80047dc: 4603 mov r3, r0 80047de: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 80047e2: e077 b.n 80048d4 } else /* manage double buffer iso out */ { /* free EP OUT Buffer */ PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 80047e4: 687b ldr r3, [r7, #4] 80047e6: 681b ldr r3, [r3, #0] 80047e8: 461a mov r2, r3 80047ea: 6d7b ldr r3, [r7, #84] @ 0x54 80047ec: 781b ldrb r3, [r3, #0] 80047ee: 009b lsls r3, r3, #2 80047f0: 4413 add r3, r2 80047f2: 881b ldrh r3, [r3, #0] 80047f4: b29b uxth r3, r3 80047f6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80047fa: f023 0370 bic.w r3, r3, #112 @ 0x70 80047fe: f8a7 3052 strh.w r3, [r7, #82] @ 0x52 8004802: 687b ldr r3, [r7, #4] 8004804: 681b ldr r3, [r3, #0] 8004806: 461a mov r2, r3 8004808: 6d7b ldr r3, [r7, #84] @ 0x54 800480a: 781b ldrb r3, [r3, #0] 800480c: 009b lsls r3, r3, #2 800480e: 441a add r2, r3 8004810: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52 8004814: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004818: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800481c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8004820: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8004824: b29b uxth r3, r3 8004826: 8013 strh r3, [r2, #0] if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) 8004828: 687b ldr r3, [r7, #4] 800482a: 681b ldr r3, [r3, #0] 800482c: 461a mov r2, r3 800482e: 6d7b ldr r3, [r7, #84] @ 0x54 8004830: 781b ldrb r3, [r3, #0] 8004832: 009b lsls r3, r3, #2 8004834: 4413 add r3, r2 8004836: 881b ldrh r3, [r3, #0] 8004838: b29b uxth r3, r3 800483a: f403 4380 and.w r3, r3, #16384 @ 0x4000 800483e: 2b00 cmp r3, #0 8004840: d024 beq.n 800488c { /* read from endpoint BUF0Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 8004842: 687b ldr r3, [r7, #4] 8004844: 681b ldr r3, [r3, #0] 8004846: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800484a: b29b uxth r3, r3 800484c: 461a mov r2, r3 800484e: 6d7b ldr r3, [r7, #84] @ 0x54 8004850: 781b ldrb r3, [r3, #0] 8004852: 00db lsls r3, r3, #3 8004854: 4413 add r3, r2 8004856: 3302 adds r3, #2 8004858: 005b lsls r3, r3, #1 800485a: 687a ldr r2, [r7, #4] 800485c: 6812 ldr r2, [r2, #0] 800485e: 4413 add r3, r2 8004860: f503 6380 add.w r3, r3, #1024 @ 0x400 8004864: 881b ldrh r3, [r3, #0] 8004866: f3c3 0309 ubfx r3, r3, #0, #10 800486a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 800486e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8004872: 2b00 cmp r3, #0 8004874: d02e beq.n 80048d4 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 8004876: 687b ldr r3, [r7, #4] 8004878: 6818 ldr r0, [r3, #0] 800487a: 6d7b ldr r3, [r7, #84] @ 0x54 800487c: 6959 ldr r1, [r3, #20] 800487e: 6d7b ldr r3, [r7, #84] @ 0x54 8004880: 891a ldrh r2, [r3, #8] 8004882: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 8004886: f004 fe26 bl 80094d6 800488a: e023 b.n 80048d4 } } else { /* read from endpoint BUF1Addr buffer */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 800488c: 687b ldr r3, [r7, #4] 800488e: 681b ldr r3, [r3, #0] 8004890: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004894: b29b uxth r3, r3 8004896: 461a mov r2, r3 8004898: 6d7b ldr r3, [r7, #84] @ 0x54 800489a: 781b ldrb r3, [r3, #0] 800489c: 00db lsls r3, r3, #3 800489e: 4413 add r3, r2 80048a0: 3306 adds r3, #6 80048a2: 005b lsls r3, r3, #1 80048a4: 687a ldr r2, [r7, #4] 80048a6: 6812 ldr r2, [r2, #0] 80048a8: 4413 add r3, r2 80048aa: f503 6380 add.w r3, r3, #1024 @ 0x400 80048ae: 881b ldrh r3, [r3, #0] 80048b0: f3c3 0309 ubfx r3, r3, #0, #10 80048b4: f8a7 3050 strh.w r3, [r7, #80] @ 0x50 if (count != 0U) 80048b8: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80048bc: 2b00 cmp r3, #0 80048be: d009 beq.n 80048d4 { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 80048c0: 687b ldr r3, [r7, #4] 80048c2: 6818 ldr r0, [r3, #0] 80048c4: 6d7b ldr r3, [r7, #84] @ 0x54 80048c6: 6959 ldr r1, [r3, #20] 80048c8: 6d7b ldr r3, [r7, #84] @ 0x54 80048ca: 895a ldrh r2, [r3, #10] 80048cc: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80048d0: f004 fe01 bl 80094d6 } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; 80048d4: 6d7b ldr r3, [r7, #84] @ 0x54 80048d6: 69da ldr r2, [r3, #28] 80048d8: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80048dc: 441a add r2, r3 80048de: 6d7b ldr r3, [r7, #84] @ 0x54 80048e0: 61da str r2, [r3, #28] ep->xfer_buff += count; 80048e2: 6d7b ldr r3, [r7, #84] @ 0x54 80048e4: 695a ldr r2, [r3, #20] 80048e6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50 80048ea: 441a add r2, r3 80048ec: 6d7b ldr r3, [r7, #84] @ 0x54 80048ee: 615a str r2, [r3, #20] if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) 80048f0: 6d7b ldr r3, [r7, #84] @ 0x54 80048f2: 699b ldr r3, [r3, #24] 80048f4: 2b00 cmp r3, #0 80048f6: d005 beq.n 8004904 80048f8: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50 80048fc: 6d7b ldr r3, [r7, #84] @ 0x54 80048fe: 691b ldr r3, [r3, #16] 8004900: 429a cmp r2, r3 8004902: d206 bcs.n 8004912 { /* RX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, ep->num); #else HAL_PCD_DataOutStageCallback(hpcd, ep->num); 8004904: 6d7b ldr r3, [r7, #84] @ 0x54 8004906: 781b ldrb r3, [r3, #0] 8004908: 4619 mov r1, r3 800490a: 6878 ldr r0, [r7, #4] 800490c: f006 fc46 bl 800b19c 8004910: e005 b.n 800491e #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { (void)USB_EPStartXfer(hpcd->Instance, ep); 8004912: 687b ldr r3, [r7, #4] 8004914: 681b ldr r3, [r3, #0] 8004916: 6d79 ldr r1, [r7, #84] @ 0x54 8004918: 4618 mov r0, r3 800491a: f003 f8a7 bl 8007a6c } } if ((wEPVal & USB_EP_CTR_TX) != 0U) 800491e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8004922: f003 0380 and.w r3, r3, #128 @ 0x80 8004926: 2b00 cmp r3, #0 8004928: f000 8123 beq.w 8004b72 { ep = &hpcd->IN_ep[epindex]; 800492c: f897 204d ldrb.w r2, [r7, #77] @ 0x4d 8004930: 4613 mov r3, r2 8004932: 009b lsls r3, r3, #2 8004934: 4413 add r3, r2 8004936: 00db lsls r3, r3, #3 8004938: 3310 adds r3, #16 800493a: 687a ldr r2, [r7, #4] 800493c: 4413 add r3, r2 800493e: 657b str r3, [r7, #84] @ 0x54 /* clear int flag */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); 8004940: 687b ldr r3, [r7, #4] 8004942: 681b ldr r3, [r3, #0] 8004944: 461a mov r2, r3 8004946: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 800494a: 009b lsls r3, r3, #2 800494c: 4413 add r3, r2 800494e: 881b ldrh r3, [r3, #0] 8004950: b29b uxth r3, r3 8004952: f423 43e1 bic.w r3, r3, #28800 @ 0x7080 8004956: f023 0370 bic.w r3, r3, #112 @ 0x70 800495a: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 800495e: 687b ldr r3, [r7, #4] 8004960: 681b ldr r3, [r3, #0] 8004962: 461a mov r2, r3 8004964: f897 304d ldrb.w r3, [r7, #77] @ 0x4d 8004968: 009b lsls r3, r3, #2 800496a: 441a add r2, r3 800496c: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 8004970: ea6f 4343 mvn.w r3, r3, lsl #17 8004974: ea6f 4353 mvn.w r3, r3, lsr #17 8004978: b29b uxth r3, r3 800497a: 8013 strh r3, [r2, #0] if (ep->type == EP_TYPE_ISOC) 800497c: 6d7b ldr r3, [r7, #84] @ 0x54 800497e: 78db ldrb r3, [r3, #3] 8004980: 2b01 cmp r3, #1 8004982: f040 80a2 bne.w 8004aca { ep->xfer_len = 0U; 8004986: 6d7b ldr r3, [r7, #84] @ 0x54 8004988: 2200 movs r2, #0 800498a: 619a str r2, [r3, #24] #if (USE_USB_DOUBLE_BUFFER == 1U) if (ep->doublebuffer != 0U) 800498c: 6d7b ldr r3, [r7, #84] @ 0x54 800498e: 7b1b ldrb r3, [r3, #12] 8004990: 2b00 cmp r3, #0 8004992: f000 8093 beq.w 8004abc { if ((wEPVal & USB_EP_DTOG_TX) != 0U) 8004996: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 800499a: f003 0340 and.w r3, r3, #64 @ 0x40 800499e: 2b00 cmp r3, #0 80049a0: d046 beq.n 8004a30 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 80049a2: 6d7b ldr r3, [r7, #84] @ 0x54 80049a4: 785b ldrb r3, [r3, #1] 80049a6: 2b00 cmp r3, #0 80049a8: d126 bne.n 80049f8 80049aa: 687b ldr r3, [r7, #4] 80049ac: 681b ldr r3, [r3, #0] 80049ae: 627b str r3, [r7, #36] @ 0x24 80049b0: 687b ldr r3, [r7, #4] 80049b2: 681b ldr r3, [r3, #0] 80049b4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80049b8: b29b uxth r3, r3 80049ba: 461a mov r2, r3 80049bc: 6a7b ldr r3, [r7, #36] @ 0x24 80049be: 4413 add r3, r2 80049c0: 627b str r3, [r7, #36] @ 0x24 80049c2: 6d7b ldr r3, [r7, #84] @ 0x54 80049c4: 781b ldrb r3, [r3, #0] 80049c6: 011a lsls r2, r3, #4 80049c8: 6a7b ldr r3, [r7, #36] @ 0x24 80049ca: 4413 add r3, r2 80049cc: f203 4304 addw r3, r3, #1028 @ 0x404 80049d0: 623b str r3, [r7, #32] 80049d2: 6a3b ldr r3, [r7, #32] 80049d4: 881b ldrh r3, [r3, #0] 80049d6: b29b uxth r3, r3 80049d8: f3c3 0309 ubfx r3, r3, #0, #10 80049dc: b29a uxth r2, r3 80049de: 6a3b ldr r3, [r7, #32] 80049e0: 801a strh r2, [r3, #0] 80049e2: 6a3b ldr r3, [r7, #32] 80049e4: 881b ldrh r3, [r3, #0] 80049e6: b29b uxth r3, r3 80049e8: ea6f 4343 mvn.w r3, r3, lsl #17 80049ec: ea6f 4353 mvn.w r3, r3, lsr #17 80049f0: b29a uxth r2, r3 80049f2: 6a3b ldr r3, [r7, #32] 80049f4: 801a strh r2, [r3, #0] 80049f6: e061 b.n 8004abc 80049f8: 6d7b ldr r3, [r7, #84] @ 0x54 80049fa: 785b ldrb r3, [r3, #1] 80049fc: 2b01 cmp r3, #1 80049fe: d15d bne.n 8004abc 8004a00: 687b ldr r3, [r7, #4] 8004a02: 681b ldr r3, [r3, #0] 8004a04: 62fb str r3, [r7, #44] @ 0x2c 8004a06: 687b ldr r3, [r7, #4] 8004a08: 681b ldr r3, [r3, #0] 8004a0a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004a0e: b29b uxth r3, r3 8004a10: 461a mov r2, r3 8004a12: 6afb ldr r3, [r7, #44] @ 0x2c 8004a14: 4413 add r3, r2 8004a16: 62fb str r3, [r7, #44] @ 0x2c 8004a18: 6d7b ldr r3, [r7, #84] @ 0x54 8004a1a: 781b ldrb r3, [r3, #0] 8004a1c: 011a lsls r2, r3, #4 8004a1e: 6afb ldr r3, [r7, #44] @ 0x2c 8004a20: 4413 add r3, r2 8004a22: f203 4304 addw r3, r3, #1028 @ 0x404 8004a26: 62bb str r3, [r7, #40] @ 0x28 8004a28: 6abb ldr r3, [r7, #40] @ 0x28 8004a2a: 2200 movs r2, #0 8004a2c: 801a strh r2, [r3, #0] 8004a2e: e045 b.n 8004abc } else { PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8004a30: 687b ldr r3, [r7, #4] 8004a32: 681b ldr r3, [r3, #0] 8004a34: 63fb str r3, [r7, #60] @ 0x3c 8004a36: 6d7b ldr r3, [r7, #84] @ 0x54 8004a38: 785b ldrb r3, [r3, #1] 8004a3a: 2b00 cmp r3, #0 8004a3c: d126 bne.n 8004a8c 8004a3e: 687b ldr r3, [r7, #4] 8004a40: 681b ldr r3, [r3, #0] 8004a42: 637b str r3, [r7, #52] @ 0x34 8004a44: 687b ldr r3, [r7, #4] 8004a46: 681b ldr r3, [r3, #0] 8004a48: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004a4c: b29b uxth r3, r3 8004a4e: 461a mov r2, r3 8004a50: 6b7b ldr r3, [r7, #52] @ 0x34 8004a52: 4413 add r3, r2 8004a54: 637b str r3, [r7, #52] @ 0x34 8004a56: 6d7b ldr r3, [r7, #84] @ 0x54 8004a58: 781b ldrb r3, [r3, #0] 8004a5a: 011a lsls r2, r3, #4 8004a5c: 6b7b ldr r3, [r7, #52] @ 0x34 8004a5e: 4413 add r3, r2 8004a60: f203 430c addw r3, r3, #1036 @ 0x40c 8004a64: 633b str r3, [r7, #48] @ 0x30 8004a66: 6b3b ldr r3, [r7, #48] @ 0x30 8004a68: 881b ldrh r3, [r3, #0] 8004a6a: b29b uxth r3, r3 8004a6c: f3c3 0309 ubfx r3, r3, #0, #10 8004a70: b29a uxth r2, r3 8004a72: 6b3b ldr r3, [r7, #48] @ 0x30 8004a74: 801a strh r2, [r3, #0] 8004a76: 6b3b ldr r3, [r7, #48] @ 0x30 8004a78: 881b ldrh r3, [r3, #0] 8004a7a: b29b uxth r3, r3 8004a7c: ea6f 4343 mvn.w r3, r3, lsl #17 8004a80: ea6f 4353 mvn.w r3, r3, lsr #17 8004a84: b29a uxth r2, r3 8004a86: 6b3b ldr r3, [r7, #48] @ 0x30 8004a88: 801a strh r2, [r3, #0] 8004a8a: e017 b.n 8004abc 8004a8c: 6d7b ldr r3, [r7, #84] @ 0x54 8004a8e: 785b ldrb r3, [r3, #1] 8004a90: 2b01 cmp r3, #1 8004a92: d113 bne.n 8004abc 8004a94: 687b ldr r3, [r7, #4] 8004a96: 681b ldr r3, [r3, #0] 8004a98: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004a9c: b29b uxth r3, r3 8004a9e: 461a mov r2, r3 8004aa0: 6bfb ldr r3, [r7, #60] @ 0x3c 8004aa2: 4413 add r3, r2 8004aa4: 63fb str r3, [r7, #60] @ 0x3c 8004aa6: 6d7b ldr r3, [r7, #84] @ 0x54 8004aa8: 781b ldrb r3, [r3, #0] 8004aaa: 011a lsls r2, r3, #4 8004aac: 6bfb ldr r3, [r7, #60] @ 0x3c 8004aae: 4413 add r3, r2 8004ab0: f203 430c addw r3, r3, #1036 @ 0x40c 8004ab4: 63bb str r3, [r7, #56] @ 0x38 8004ab6: 6bbb ldr r3, [r7, #56] @ 0x38 8004ab8: 2200 movs r2, #0 8004aba: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8004abc: 6d7b ldr r3, [r7, #84] @ 0x54 8004abe: 781b ldrb r3, [r3, #0] 8004ac0: 4619 mov r1, r3 8004ac2: 6878 ldr r0, [r7, #4] 8004ac4: f006 fb85 bl 800b1d2 8004ac8: e053 b.n 8004b72 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Manage Single Buffer Transaction */ if ((wEPVal & USB_EP_KIND) == 0U) 8004aca: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8004ace: f403 7380 and.w r3, r3, #256 @ 0x100 8004ad2: 2b00 cmp r3, #0 8004ad4: d146 bne.n 8004b64 { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); 8004ad6: 687b ldr r3, [r7, #4] 8004ad8: 681b ldr r3, [r3, #0] 8004ada: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004ade: b29b uxth r3, r3 8004ae0: 461a mov r2, r3 8004ae2: 6d7b ldr r3, [r7, #84] @ 0x54 8004ae4: 781b ldrb r3, [r3, #0] 8004ae6: 00db lsls r3, r3, #3 8004ae8: 4413 add r3, r2 8004aea: 3302 adds r3, #2 8004aec: 005b lsls r3, r3, #1 8004aee: 687a ldr r2, [r7, #4] 8004af0: 6812 ldr r2, [r2, #0] 8004af2: 4413 add r3, r2 8004af4: f503 6380 add.w r3, r3, #1024 @ 0x400 8004af8: 881b ldrh r3, [r3, #0] 8004afa: f3c3 0309 ubfx r3, r3, #0, #10 8004afe: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 if (ep->xfer_len > TxPctSize) 8004b02: 6d7b ldr r3, [r7, #84] @ 0x54 8004b04: 699a ldr r2, [r3, #24] 8004b06: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8004b0a: 429a cmp r2, r3 8004b0c: d907 bls.n 8004b1e { ep->xfer_len -= TxPctSize; 8004b0e: 6d7b ldr r3, [r7, #84] @ 0x54 8004b10: 699a ldr r2, [r3, #24] 8004b12: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8004b16: 1ad2 subs r2, r2, r3 8004b18: 6d7b ldr r3, [r7, #84] @ 0x54 8004b1a: 619a str r2, [r3, #24] 8004b1c: e002 b.n 8004b24 } else { ep->xfer_len = 0U; 8004b1e: 6d7b ldr r3, [r7, #84] @ 0x54 8004b20: 2200 movs r2, #0 8004b22: 619a str r2, [r3, #24] } /* Zero Length Packet? */ if (ep->xfer_len == 0U) 8004b24: 6d7b ldr r3, [r7, #84] @ 0x54 8004b26: 699b ldr r3, [r3, #24] 8004b28: 2b00 cmp r3, #0 8004b2a: d106 bne.n 8004b3a { /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8004b2c: 6d7b ldr r3, [r7, #84] @ 0x54 8004b2e: 781b ldrb r3, [r3, #0] 8004b30: 4619 mov r1, r3 8004b32: 6878 ldr r0, [r7, #4] 8004b34: f006 fb4d bl 800b1d2 8004b38: e01b b.n 8004b72 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } else { /* Transfer is not yet Done */ ep->xfer_buff += TxPctSize; 8004b3a: 6d7b ldr r3, [r7, #84] @ 0x54 8004b3c: 695a ldr r2, [r3, #20] 8004b3e: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8004b42: 441a add r2, r3 8004b44: 6d7b ldr r3, [r7, #84] @ 0x54 8004b46: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8004b48: 6d7b ldr r3, [r7, #84] @ 0x54 8004b4a: 69da ldr r2, [r3, #28] 8004b4c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 8004b50: 441a add r2, r3 8004b52: 6d7b ldr r3, [r7, #84] @ 0x54 8004b54: 61da str r2, [r3, #28] (void)USB_EPStartXfer(hpcd->Instance, ep); 8004b56: 687b ldr r3, [r7, #4] 8004b58: 681b ldr r3, [r3, #0] 8004b5a: 6d79 ldr r1, [r7, #84] @ 0x54 8004b5c: 4618 mov r0, r3 8004b5e: f002 ff85 bl 8007a6c 8004b62: e006 b.n 8004b72 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */ else { (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); 8004b64: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8004b68: 461a mov r2, r3 8004b6a: 6d79 ldr r1, [r7, #84] @ 0x54 8004b6c: 6878 ldr r0, [r7, #4] 8004b6e: f000 f91b bl 8004da8 while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) 8004b72: 687b ldr r3, [r7, #4] 8004b74: 681b ldr r3, [r3, #0] 8004b76: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8004b7a: b29b uxth r3, r3 8004b7c: b21b sxth r3, r3 8004b7e: 2b00 cmp r3, #0 8004b80: f6ff ac3b blt.w 80043fa } } } } return HAL_OK; 8004b84: 2300 movs r3, #0 } 8004b86: 4618 mov r0, r3 8004b88: 3758 adds r7, #88 @ 0x58 8004b8a: 46bd mov sp, r7 8004b8c: bd80 pop {r7, pc} 08004b8e : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 8004b8e: b580 push {r7, lr} 8004b90: b088 sub sp, #32 8004b92: af00 add r7, sp, #0 8004b94: 60f8 str r0, [r7, #12] 8004b96: 60b9 str r1, [r7, #8] 8004b98: 4613 mov r3, r2 8004b9a: 80fb strh r3, [r7, #6] uint16_t count; /* Manage Buffer0 OUT */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8004b9c: 88fb ldrh r3, [r7, #6] 8004b9e: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004ba2: 2b00 cmp r3, #0 8004ba4: d07e beq.n 8004ca4 { /* Get count of received Data on buffer0 */ count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 8004ba6: 68fb ldr r3, [r7, #12] 8004ba8: 681b ldr r3, [r3, #0] 8004baa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004bae: b29b uxth r3, r3 8004bb0: 461a mov r2, r3 8004bb2: 68bb ldr r3, [r7, #8] 8004bb4: 781b ldrb r3, [r3, #0] 8004bb6: 00db lsls r3, r3, #3 8004bb8: 4413 add r3, r2 8004bba: 3302 adds r3, #2 8004bbc: 005b lsls r3, r3, #1 8004bbe: 68fa ldr r2, [r7, #12] 8004bc0: 6812 ldr r2, [r2, #0] 8004bc2: 4413 add r3, r2 8004bc4: f503 6380 add.w r3, r3, #1024 @ 0x400 8004bc8: 881b ldrh r3, [r3, #0] 8004bca: f3c3 0309 ubfx r3, r3, #0, #10 8004bce: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 8004bd0: 68bb ldr r3, [r7, #8] 8004bd2: 699a ldr r2, [r3, #24] 8004bd4: 8b7b ldrh r3, [r7, #26] 8004bd6: 429a cmp r2, r3 8004bd8: d306 bcc.n 8004be8 { ep->xfer_len -= count; 8004bda: 68bb ldr r3, [r7, #8] 8004bdc: 699a ldr r2, [r3, #24] 8004bde: 8b7b ldrh r3, [r7, #26] 8004be0: 1ad2 subs r2, r2, r3 8004be2: 68bb ldr r3, [r7, #8] 8004be4: 619a str r2, [r3, #24] 8004be6: e002 b.n 8004bee } else { ep->xfer_len = 0U; 8004be8: 68bb ldr r3, [r7, #8] 8004bea: 2200 movs r2, #0 8004bec: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 8004bee: 68bb ldr r3, [r7, #8] 8004bf0: 699b ldr r3, [r3, #24] 8004bf2: 2b00 cmp r3, #0 8004bf4: d123 bne.n 8004c3e { /* set NAK to OUT endpoint since double buffer is enabled */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 8004bf6: 68fb ldr r3, [r7, #12] 8004bf8: 681b ldr r3, [r3, #0] 8004bfa: 461a mov r2, r3 8004bfc: 68bb ldr r3, [r7, #8] 8004bfe: 781b ldrb r3, [r3, #0] 8004c00: 009b lsls r3, r3, #2 8004c02: 4413 add r3, r2 8004c04: 881b ldrh r3, [r3, #0] 8004c06: b29b uxth r3, r3 8004c08: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8004c0c: f023 0370 bic.w r3, r3, #112 @ 0x70 8004c10: 833b strh r3, [r7, #24] 8004c12: 8b3b ldrh r3, [r7, #24] 8004c14: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8004c18: 833b strh r3, [r7, #24] 8004c1a: 68fb ldr r3, [r7, #12] 8004c1c: 681b ldr r3, [r3, #0] 8004c1e: 461a mov r2, r3 8004c20: 68bb ldr r3, [r7, #8] 8004c22: 781b ldrb r3, [r3, #0] 8004c24: 009b lsls r3, r3, #2 8004c26: 441a add r2, r3 8004c28: 8b3b ldrh r3, [r7, #24] 8004c2a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004c2e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004c32: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8004c36: f043 0380 orr.w r3, r3, #128 @ 0x80 8004c3a: b29b uxth r3, r3 8004c3c: 8013 strh r3, [r2, #0] } /* Check if Buffer1 is in blocked state which requires to toggle */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 8004c3e: 88fb ldrh r3, [r7, #6] 8004c40: f003 0340 and.w r3, r3, #64 @ 0x40 8004c44: 2b00 cmp r3, #0 8004c46: d01f beq.n 8004c88 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 8004c48: 68fb ldr r3, [r7, #12] 8004c4a: 681b ldr r3, [r3, #0] 8004c4c: 461a mov r2, r3 8004c4e: 68bb ldr r3, [r7, #8] 8004c50: 781b ldrb r3, [r3, #0] 8004c52: 009b lsls r3, r3, #2 8004c54: 4413 add r3, r2 8004c56: 881b ldrh r3, [r3, #0] 8004c58: b29b uxth r3, r3 8004c5a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004c5e: f023 0370 bic.w r3, r3, #112 @ 0x70 8004c62: 82fb strh r3, [r7, #22] 8004c64: 68fb ldr r3, [r7, #12] 8004c66: 681b ldr r3, [r3, #0] 8004c68: 461a mov r2, r3 8004c6a: 68bb ldr r3, [r7, #8] 8004c6c: 781b ldrb r3, [r3, #0] 8004c6e: 009b lsls r3, r3, #2 8004c70: 441a add r2, r3 8004c72: 8afb ldrh r3, [r7, #22] 8004c74: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004c78: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004c7c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8004c80: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8004c84: b29b uxth r3, r3 8004c86: 8013 strh r3, [r2, #0] } if (count != 0U) 8004c88: 8b7b ldrh r3, [r7, #26] 8004c8a: 2b00 cmp r3, #0 8004c8c: f000 8087 beq.w 8004d9e { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); 8004c90: 68fb ldr r3, [r7, #12] 8004c92: 6818 ldr r0, [r3, #0] 8004c94: 68bb ldr r3, [r7, #8] 8004c96: 6959 ldr r1, [r3, #20] 8004c98: 68bb ldr r3, [r7, #8] 8004c9a: 891a ldrh r2, [r3, #8] 8004c9c: 8b7b ldrh r3, [r7, #26] 8004c9e: f004 fc1a bl 80094d6 8004ca2: e07c b.n 8004d9e } /* Manage Buffer 1 DTOG_RX=0 */ else { /* Get count of received data */ count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 8004ca4: 68fb ldr r3, [r7, #12] 8004ca6: 681b ldr r3, [r3, #0] 8004ca8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004cac: b29b uxth r3, r3 8004cae: 461a mov r2, r3 8004cb0: 68bb ldr r3, [r7, #8] 8004cb2: 781b ldrb r3, [r3, #0] 8004cb4: 00db lsls r3, r3, #3 8004cb6: 4413 add r3, r2 8004cb8: 3306 adds r3, #6 8004cba: 005b lsls r3, r3, #1 8004cbc: 68fa ldr r2, [r7, #12] 8004cbe: 6812 ldr r2, [r2, #0] 8004cc0: 4413 add r3, r2 8004cc2: f503 6380 add.w r3, r3, #1024 @ 0x400 8004cc6: 881b ldrh r3, [r3, #0] 8004cc8: f3c3 0309 ubfx r3, r3, #0, #10 8004ccc: 837b strh r3, [r7, #26] if (ep->xfer_len >= count) 8004cce: 68bb ldr r3, [r7, #8] 8004cd0: 699a ldr r2, [r3, #24] 8004cd2: 8b7b ldrh r3, [r7, #26] 8004cd4: 429a cmp r2, r3 8004cd6: d306 bcc.n 8004ce6 { ep->xfer_len -= count; 8004cd8: 68bb ldr r3, [r7, #8] 8004cda: 699a ldr r2, [r3, #24] 8004cdc: 8b7b ldrh r3, [r7, #26] 8004cde: 1ad2 subs r2, r2, r3 8004ce0: 68bb ldr r3, [r7, #8] 8004ce2: 619a str r2, [r3, #24] 8004ce4: e002 b.n 8004cec } else { ep->xfer_len = 0U; 8004ce6: 68bb ldr r3, [r7, #8] 8004ce8: 2200 movs r2, #0 8004cea: 619a str r2, [r3, #24] } if (ep->xfer_len == 0U) 8004cec: 68bb ldr r3, [r7, #8] 8004cee: 699b ldr r3, [r3, #24] 8004cf0: 2b00 cmp r3, #0 8004cf2: d123 bne.n 8004d3c { /* set NAK on the current endpoint */ PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); 8004cf4: 68fb ldr r3, [r7, #12] 8004cf6: 681b ldr r3, [r3, #0] 8004cf8: 461a mov r2, r3 8004cfa: 68bb ldr r3, [r7, #8] 8004cfc: 781b ldrb r3, [r3, #0] 8004cfe: 009b lsls r3, r3, #2 8004d00: 4413 add r3, r2 8004d02: 881b ldrh r3, [r3, #0] 8004d04: b29b uxth r3, r3 8004d06: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8004d0a: f023 0370 bic.w r3, r3, #112 @ 0x70 8004d0e: 83fb strh r3, [r7, #30] 8004d10: 8bfb ldrh r3, [r7, #30] 8004d12: f483 5300 eor.w r3, r3, #8192 @ 0x2000 8004d16: 83fb strh r3, [r7, #30] 8004d18: 68fb ldr r3, [r7, #12] 8004d1a: 681b ldr r3, [r3, #0] 8004d1c: 461a mov r2, r3 8004d1e: 68bb ldr r3, [r7, #8] 8004d20: 781b ldrb r3, [r3, #0] 8004d22: 009b lsls r3, r3, #2 8004d24: 441a add r2, r3 8004d26: 8bfb ldrh r3, [r7, #30] 8004d28: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004d2c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004d30: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8004d34: f043 0380 orr.w r3, r3, #128 @ 0x80 8004d38: b29b uxth r3, r3 8004d3a: 8013 strh r3, [r2, #0] } /*Need to FreeUser Buffer*/ if ((wEPVal & USB_EP_DTOG_TX) == 0U) 8004d3c: 88fb ldrh r3, [r7, #6] 8004d3e: f003 0340 and.w r3, r3, #64 @ 0x40 8004d42: 2b00 cmp r3, #0 8004d44: d11f bne.n 8004d86 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); 8004d46: 68fb ldr r3, [r7, #12] 8004d48: 681b ldr r3, [r3, #0] 8004d4a: 461a mov r2, r3 8004d4c: 68bb ldr r3, [r7, #8] 8004d4e: 781b ldrb r3, [r3, #0] 8004d50: 009b lsls r3, r3, #2 8004d52: 4413 add r3, r2 8004d54: 881b ldrh r3, [r3, #0] 8004d56: b29b uxth r3, r3 8004d58: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004d5c: f023 0370 bic.w r3, r3, #112 @ 0x70 8004d60: 83bb strh r3, [r7, #28] 8004d62: 68fb ldr r3, [r7, #12] 8004d64: 681b ldr r3, [r3, #0] 8004d66: 461a mov r2, r3 8004d68: 68bb ldr r3, [r7, #8] 8004d6a: 781b ldrb r3, [r3, #0] 8004d6c: 009b lsls r3, r3, #2 8004d6e: 441a add r2, r3 8004d70: 8bbb ldrh r3, [r7, #28] 8004d72: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004d76: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004d7a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8004d7e: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8004d82: b29b uxth r3, r3 8004d84: 8013 strh r3, [r2, #0] } if (count != 0U) 8004d86: 8b7b ldrh r3, [r7, #26] 8004d88: 2b00 cmp r3, #0 8004d8a: d008 beq.n 8004d9e { USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); 8004d8c: 68fb ldr r3, [r7, #12] 8004d8e: 6818 ldr r0, [r3, #0] 8004d90: 68bb ldr r3, [r7, #8] 8004d92: 6959 ldr r1, [r3, #20] 8004d94: 68bb ldr r3, [r7, #8] 8004d96: 895a ldrh r2, [r3, #10] 8004d98: 8b7b ldrh r3, [r7, #26] 8004d9a: f004 fb9c bl 80094d6 } } return count; 8004d9e: 8b7b ldrh r3, [r7, #26] } 8004da0: 4618 mov r0, r3 8004da2: 3720 adds r7, #32 8004da4: 46bd mov sp, r7 8004da6: bd80 pop {r7, pc} 08004da8 : * @param wEPVal Last snapshot of EPRx register value taken in ISR * @retval HAL status */ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { 8004da8: b580 push {r7, lr} 8004daa: b0a4 sub sp, #144 @ 0x90 8004dac: af00 add r7, sp, #0 8004dae: 60f8 str r0, [r7, #12] 8004db0: 60b9 str r1, [r7, #8] 8004db2: 4613 mov r3, r2 8004db4: 80fb strh r3, [r7, #6] uint32_t len; uint16_t TxPctSize; /* Data Buffer0 ACK received */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) 8004db6: 88fb ldrh r3, [r7, #6] 8004db8: f003 0340 and.w r3, r3, #64 @ 0x40 8004dbc: 2b00 cmp r3, #0 8004dbe: f000 81dd beq.w 800517c { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); 8004dc2: 68fb ldr r3, [r7, #12] 8004dc4: 681b ldr r3, [r3, #0] 8004dc6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004dca: b29b uxth r3, r3 8004dcc: 461a mov r2, r3 8004dce: 68bb ldr r3, [r7, #8] 8004dd0: 781b ldrb r3, [r3, #0] 8004dd2: 00db lsls r3, r3, #3 8004dd4: 4413 add r3, r2 8004dd6: 3302 adds r3, #2 8004dd8: 005b lsls r3, r3, #1 8004dda: 68fa ldr r2, [r7, #12] 8004ddc: 6812 ldr r2, [r2, #0] 8004dde: 4413 add r3, r2 8004de0: f503 6380 add.w r3, r3, #1024 @ 0x400 8004de4: 881b ldrh r3, [r3, #0] 8004de6: f3c3 0309 ubfx r3, r3, #0, #10 8004dea: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len > TxPctSize) 8004dee: 68bb ldr r3, [r7, #8] 8004df0: 699a ldr r2, [r3, #24] 8004df2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004df6: 429a cmp r2, r3 8004df8: d907 bls.n 8004e0a { ep->xfer_len -= TxPctSize; 8004dfa: 68bb ldr r3, [r7, #8] 8004dfc: 699a ldr r2, [r3, #24] 8004dfe: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004e02: 1ad2 subs r2, r2, r3 8004e04: 68bb ldr r3, [r7, #8] 8004e06: 619a str r2, [r3, #24] 8004e08: e002 b.n 8004e10 } else { ep->xfer_len = 0U; 8004e0a: 68bb ldr r3, [r7, #8] 8004e0c: 2200 movs r2, #0 8004e0e: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 8004e10: 68bb ldr r3, [r7, #8] 8004e12: 699b ldr r3, [r3, #24] 8004e14: 2b00 cmp r3, #0 8004e16: f040 80b9 bne.w 8004f8c { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8004e1a: 68bb ldr r3, [r7, #8] 8004e1c: 785b ldrb r3, [r3, #1] 8004e1e: 2b00 cmp r3, #0 8004e20: d126 bne.n 8004e70 8004e22: 68fb ldr r3, [r7, #12] 8004e24: 681b ldr r3, [r3, #0] 8004e26: 62fb str r3, [r7, #44] @ 0x2c 8004e28: 68fb ldr r3, [r7, #12] 8004e2a: 681b ldr r3, [r3, #0] 8004e2c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004e30: b29b uxth r3, r3 8004e32: 461a mov r2, r3 8004e34: 6afb ldr r3, [r7, #44] @ 0x2c 8004e36: 4413 add r3, r2 8004e38: 62fb str r3, [r7, #44] @ 0x2c 8004e3a: 68bb ldr r3, [r7, #8] 8004e3c: 781b ldrb r3, [r3, #0] 8004e3e: 011a lsls r2, r3, #4 8004e40: 6afb ldr r3, [r7, #44] @ 0x2c 8004e42: 4413 add r3, r2 8004e44: f203 4304 addw r3, r3, #1028 @ 0x404 8004e48: 62bb str r3, [r7, #40] @ 0x28 8004e4a: 6abb ldr r3, [r7, #40] @ 0x28 8004e4c: 881b ldrh r3, [r3, #0] 8004e4e: b29b uxth r3, r3 8004e50: f3c3 0309 ubfx r3, r3, #0, #10 8004e54: b29a uxth r2, r3 8004e56: 6abb ldr r3, [r7, #40] @ 0x28 8004e58: 801a strh r2, [r3, #0] 8004e5a: 6abb ldr r3, [r7, #40] @ 0x28 8004e5c: 881b ldrh r3, [r3, #0] 8004e5e: b29b uxth r3, r3 8004e60: ea6f 4343 mvn.w r3, r3, lsl #17 8004e64: ea6f 4353 mvn.w r3, r3, lsr #17 8004e68: b29a uxth r2, r3 8004e6a: 6abb ldr r3, [r7, #40] @ 0x28 8004e6c: 801a strh r2, [r3, #0] 8004e6e: e01a b.n 8004ea6 8004e70: 68bb ldr r3, [r7, #8] 8004e72: 785b ldrb r3, [r3, #1] 8004e74: 2b01 cmp r3, #1 8004e76: d116 bne.n 8004ea6 8004e78: 68fb ldr r3, [r7, #12] 8004e7a: 681b ldr r3, [r3, #0] 8004e7c: 637b str r3, [r7, #52] @ 0x34 8004e7e: 68fb ldr r3, [r7, #12] 8004e80: 681b ldr r3, [r3, #0] 8004e82: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004e86: b29b uxth r3, r3 8004e88: 461a mov r2, r3 8004e8a: 6b7b ldr r3, [r7, #52] @ 0x34 8004e8c: 4413 add r3, r2 8004e8e: 637b str r3, [r7, #52] @ 0x34 8004e90: 68bb ldr r3, [r7, #8] 8004e92: 781b ldrb r3, [r3, #0] 8004e94: 011a lsls r2, r3, #4 8004e96: 6b7b ldr r3, [r7, #52] @ 0x34 8004e98: 4413 add r3, r2 8004e9a: f203 4304 addw r3, r3, #1028 @ 0x404 8004e9e: 633b str r3, [r7, #48] @ 0x30 8004ea0: 6b3b ldr r3, [r7, #48] @ 0x30 8004ea2: 2200 movs r2, #0 8004ea4: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8004ea6: 68fb ldr r3, [r7, #12] 8004ea8: 681b ldr r3, [r3, #0] 8004eaa: 627b str r3, [r7, #36] @ 0x24 8004eac: 68bb ldr r3, [r7, #8] 8004eae: 785b ldrb r3, [r3, #1] 8004eb0: 2b00 cmp r3, #0 8004eb2: d126 bne.n 8004f02 8004eb4: 68fb ldr r3, [r7, #12] 8004eb6: 681b ldr r3, [r3, #0] 8004eb8: 61fb str r3, [r7, #28] 8004eba: 68fb ldr r3, [r7, #12] 8004ebc: 681b ldr r3, [r3, #0] 8004ebe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004ec2: b29b uxth r3, r3 8004ec4: 461a mov r2, r3 8004ec6: 69fb ldr r3, [r7, #28] 8004ec8: 4413 add r3, r2 8004eca: 61fb str r3, [r7, #28] 8004ecc: 68bb ldr r3, [r7, #8] 8004ece: 781b ldrb r3, [r3, #0] 8004ed0: 011a lsls r2, r3, #4 8004ed2: 69fb ldr r3, [r7, #28] 8004ed4: 4413 add r3, r2 8004ed6: f203 430c addw r3, r3, #1036 @ 0x40c 8004eda: 61bb str r3, [r7, #24] 8004edc: 69bb ldr r3, [r7, #24] 8004ede: 881b ldrh r3, [r3, #0] 8004ee0: b29b uxth r3, r3 8004ee2: f3c3 0309 ubfx r3, r3, #0, #10 8004ee6: b29a uxth r2, r3 8004ee8: 69bb ldr r3, [r7, #24] 8004eea: 801a strh r2, [r3, #0] 8004eec: 69bb ldr r3, [r7, #24] 8004eee: 881b ldrh r3, [r3, #0] 8004ef0: b29b uxth r3, r3 8004ef2: ea6f 4343 mvn.w r3, r3, lsl #17 8004ef6: ea6f 4353 mvn.w r3, r3, lsr #17 8004efa: b29a uxth r2, r3 8004efc: 69bb ldr r3, [r7, #24] 8004efe: 801a strh r2, [r3, #0] 8004f00: e017 b.n 8004f32 8004f02: 68bb ldr r3, [r7, #8] 8004f04: 785b ldrb r3, [r3, #1] 8004f06: 2b01 cmp r3, #1 8004f08: d113 bne.n 8004f32 8004f0a: 68fb ldr r3, [r7, #12] 8004f0c: 681b ldr r3, [r3, #0] 8004f0e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8004f12: b29b uxth r3, r3 8004f14: 461a mov r2, r3 8004f16: 6a7b ldr r3, [r7, #36] @ 0x24 8004f18: 4413 add r3, r2 8004f1a: 627b str r3, [r7, #36] @ 0x24 8004f1c: 68bb ldr r3, [r7, #8] 8004f1e: 781b ldrb r3, [r3, #0] 8004f20: 011a lsls r2, r3, #4 8004f22: 6a7b ldr r3, [r7, #36] @ 0x24 8004f24: 4413 add r3, r2 8004f26: f203 430c addw r3, r3, #1036 @ 0x40c 8004f2a: 623b str r3, [r7, #32] 8004f2c: 6a3b ldr r3, [r7, #32] 8004f2e: 2200 movs r2, #0 8004f30: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 8004f32: 68bb ldr r3, [r7, #8] 8004f34: 781b ldrb r3, [r3, #0] 8004f36: 4619 mov r1, r3 8004f38: 68f8 ldr r0, [r7, #12] 8004f3a: f006 f94a bl 800b1d2 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8004f3e: 88fb ldrh r3, [r7, #6] 8004f40: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004f44: 2b00 cmp r3, #0 8004f46: f000 82fc beq.w 8005542 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8004f4a: 68fb ldr r3, [r7, #12] 8004f4c: 681b ldr r3, [r3, #0] 8004f4e: 461a mov r2, r3 8004f50: 68bb ldr r3, [r7, #8] 8004f52: 781b ldrb r3, [r3, #0] 8004f54: 009b lsls r3, r3, #2 8004f56: 4413 add r3, r2 8004f58: 881b ldrh r3, [r3, #0] 8004f5a: b29b uxth r3, r3 8004f5c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004f60: f023 0370 bic.w r3, r3, #112 @ 0x70 8004f64: 82fb strh r3, [r7, #22] 8004f66: 68fb ldr r3, [r7, #12] 8004f68: 681b ldr r3, [r3, #0] 8004f6a: 461a mov r2, r3 8004f6c: 68bb ldr r3, [r7, #8] 8004f6e: 781b ldrb r3, [r3, #0] 8004f70: 009b lsls r3, r3, #2 8004f72: 441a add r2, r3 8004f74: 8afb ldrh r3, [r7, #22] 8004f76: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004f7a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004f7e: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8004f82: f043 0380 orr.w r3, r3, #128 @ 0x80 8004f86: b29b uxth r3, r3 8004f88: 8013 strh r3, [r2, #0] 8004f8a: e2da b.n 8005542 } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) 8004f8c: 88fb ldrh r3, [r7, #6] 8004f8e: f403 4380 and.w r3, r3, #16384 @ 0x4000 8004f92: 2b00 cmp r3, #0 8004f94: d021 beq.n 8004fda { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 8004f96: 68fb ldr r3, [r7, #12] 8004f98: 681b ldr r3, [r3, #0] 8004f9a: 461a mov r2, r3 8004f9c: 68bb ldr r3, [r7, #8] 8004f9e: 781b ldrb r3, [r3, #0] 8004fa0: 009b lsls r3, r3, #2 8004fa2: 4413 add r3, r2 8004fa4: 881b ldrh r3, [r3, #0] 8004fa6: b29b uxth r3, r3 8004fa8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004fac: f023 0370 bic.w r3, r3, #112 @ 0x70 8004fb0: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8004fb4: 68fb ldr r3, [r7, #12] 8004fb6: 681b ldr r3, [r3, #0] 8004fb8: 461a mov r2, r3 8004fba: 68bb ldr r3, [r7, #8] 8004fbc: 781b ldrb r3, [r3, #0] 8004fbe: 009b lsls r3, r3, #2 8004fc0: 441a add r2, r3 8004fc2: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8004fc6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8004fca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8004fce: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8004fd2: f043 0380 orr.w r3, r3, #128 @ 0x80 8004fd6: b29b uxth r3, r3 8004fd8: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 8004fda: 68bb ldr r3, [r7, #8] 8004fdc: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8004fe0: 2b01 cmp r3, #1 8004fe2: f040 82ae bne.w 8005542 { ep->xfer_buff += TxPctSize; 8004fe6: 68bb ldr r3, [r7, #8] 8004fe8: 695a ldr r2, [r3, #20] 8004fea: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004fee: 441a add r2, r3 8004ff0: 68bb ldr r3, [r7, #8] 8004ff2: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 8004ff4: 68bb ldr r3, [r7, #8] 8004ff6: 69da ldr r2, [r3, #28] 8004ff8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8004ffc: 441a add r2, r3 8004ffe: 68bb ldr r3, [r7, #8] 8005000: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 8005002: 68bb ldr r3, [r7, #8] 8005004: 6a1a ldr r2, [r3, #32] 8005006: 68bb ldr r3, [r7, #8] 8005008: 691b ldr r3, [r3, #16] 800500a: 429a cmp r2, r3 800500c: d30b bcc.n 8005026 { len = ep->maxpacket; 800500e: 68bb ldr r3, [r7, #8] 8005010: 691b ldr r3, [r3, #16] 8005012: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 8005016: 68bb ldr r3, [r7, #8] 8005018: 6a1a ldr r2, [r3, #32] 800501a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800501e: 1ad2 subs r2, r2, r3 8005020: 68bb ldr r3, [r7, #8] 8005022: 621a str r2, [r3, #32] 8005024: e017 b.n 8005056 } else if (ep->xfer_len_db == 0U) 8005026: 68bb ldr r3, [r7, #8] 8005028: 6a1b ldr r3, [r3, #32] 800502a: 2b00 cmp r3, #0 800502c: d108 bne.n 8005040 { len = TxPctSize; 800502e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 8005032: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 8005036: 68bb ldr r3, [r7, #8] 8005038: 2200 movs r2, #0 800503a: f883 2024 strb.w r2, [r3, #36] @ 0x24 800503e: e00a b.n 8005056 } else { ep->xfer_fill_db = 0U; 8005040: 68bb ldr r3, [r7, #8] 8005042: 2200 movs r2, #0 8005044: f883 2024 strb.w r2, [r3, #36] @ 0x24 len = ep->xfer_len_db; 8005048: 68bb ldr r3, [r7, #8] 800504a: 6a1b ldr r3, [r3, #32] 800504c: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8005050: 68bb ldr r3, [r7, #8] 8005052: 2200 movs r2, #0 8005054: 621a str r2, [r3, #32] } /* Write remaining Data to Buffer */ /* Set the Double buffer counter for pma buffer1 */ PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len); 8005056: 68bb ldr r3, [r7, #8] 8005058: 785b ldrb r3, [r3, #1] 800505a: 2b00 cmp r3, #0 800505c: d165 bne.n 800512a 800505e: 68fb ldr r3, [r7, #12] 8005060: 681b ldr r3, [r3, #0] 8005062: 63fb str r3, [r7, #60] @ 0x3c 8005064: 68fb ldr r3, [r7, #12] 8005066: 681b ldr r3, [r3, #0] 8005068: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800506c: b29b uxth r3, r3 800506e: 461a mov r2, r3 8005070: 6bfb ldr r3, [r7, #60] @ 0x3c 8005072: 4413 add r3, r2 8005074: 63fb str r3, [r7, #60] @ 0x3c 8005076: 68bb ldr r3, [r7, #8] 8005078: 781b ldrb r3, [r3, #0] 800507a: 011a lsls r2, r3, #4 800507c: 6bfb ldr r3, [r7, #60] @ 0x3c 800507e: 4413 add r3, r2 8005080: f203 4304 addw r3, r3, #1028 @ 0x404 8005084: 63bb str r3, [r7, #56] @ 0x38 8005086: 6bbb ldr r3, [r7, #56] @ 0x38 8005088: 881b ldrh r3, [r3, #0] 800508a: b29b uxth r3, r3 800508c: f3c3 0309 ubfx r3, r3, #0, #10 8005090: b29a uxth r2, r3 8005092: 6bbb ldr r3, [r7, #56] @ 0x38 8005094: 801a strh r2, [r3, #0] 8005096: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800509a: 2b3e cmp r3, #62 @ 0x3e 800509c: d91d bls.n 80050da 800509e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80050a2: 095b lsrs r3, r3, #5 80050a4: 64bb str r3, [r7, #72] @ 0x48 80050a6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80050aa: f003 031f and.w r3, r3, #31 80050ae: 2b00 cmp r3, #0 80050b0: d102 bne.n 80050b8 80050b2: 6cbb ldr r3, [r7, #72] @ 0x48 80050b4: 3b01 subs r3, #1 80050b6: 64bb str r3, [r7, #72] @ 0x48 80050b8: 6bbb ldr r3, [r7, #56] @ 0x38 80050ba: 881b ldrh r3, [r3, #0] 80050bc: b29a uxth r2, r3 80050be: 6cbb ldr r3, [r7, #72] @ 0x48 80050c0: b29b uxth r3, r3 80050c2: 029b lsls r3, r3, #10 80050c4: b29b uxth r3, r3 80050c6: 4313 orrs r3, r2 80050c8: b29b uxth r3, r3 80050ca: ea6f 4343 mvn.w r3, r3, lsl #17 80050ce: ea6f 4353 mvn.w r3, r3, lsr #17 80050d2: b29a uxth r2, r3 80050d4: 6bbb ldr r3, [r7, #56] @ 0x38 80050d6: 801a strh r2, [r3, #0] 80050d8: e044 b.n 8005164 80050da: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80050de: 2b00 cmp r3, #0 80050e0: d10a bne.n 80050f8 80050e2: 6bbb ldr r3, [r7, #56] @ 0x38 80050e4: 881b ldrh r3, [r3, #0] 80050e6: b29b uxth r3, r3 80050e8: ea6f 4343 mvn.w r3, r3, lsl #17 80050ec: ea6f 4353 mvn.w r3, r3, lsr #17 80050f0: b29a uxth r2, r3 80050f2: 6bbb ldr r3, [r7, #56] @ 0x38 80050f4: 801a strh r2, [r3, #0] 80050f6: e035 b.n 8005164 80050f8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80050fc: 085b lsrs r3, r3, #1 80050fe: 64bb str r3, [r7, #72] @ 0x48 8005100: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005104: f003 0301 and.w r3, r3, #1 8005108: 2b00 cmp r3, #0 800510a: d002 beq.n 8005112 800510c: 6cbb ldr r3, [r7, #72] @ 0x48 800510e: 3301 adds r3, #1 8005110: 64bb str r3, [r7, #72] @ 0x48 8005112: 6bbb ldr r3, [r7, #56] @ 0x38 8005114: 881b ldrh r3, [r3, #0] 8005116: b29a uxth r2, r3 8005118: 6cbb ldr r3, [r7, #72] @ 0x48 800511a: b29b uxth r3, r3 800511c: 029b lsls r3, r3, #10 800511e: b29b uxth r3, r3 8005120: 4313 orrs r3, r2 8005122: b29a uxth r2, r3 8005124: 6bbb ldr r3, [r7, #56] @ 0x38 8005126: 801a strh r2, [r3, #0] 8005128: e01c b.n 8005164 800512a: 68bb ldr r3, [r7, #8] 800512c: 785b ldrb r3, [r3, #1] 800512e: 2b01 cmp r3, #1 8005130: d118 bne.n 8005164 8005132: 68fb ldr r3, [r7, #12] 8005134: 681b ldr r3, [r3, #0] 8005136: 647b str r3, [r7, #68] @ 0x44 8005138: 68fb ldr r3, [r7, #12] 800513a: 681b ldr r3, [r3, #0] 800513c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8005140: b29b uxth r3, r3 8005142: 461a mov r2, r3 8005144: 6c7b ldr r3, [r7, #68] @ 0x44 8005146: 4413 add r3, r2 8005148: 647b str r3, [r7, #68] @ 0x44 800514a: 68bb ldr r3, [r7, #8] 800514c: 781b ldrb r3, [r3, #0] 800514e: 011a lsls r2, r3, #4 8005150: 6c7b ldr r3, [r7, #68] @ 0x44 8005152: 4413 add r3, r2 8005154: f203 4304 addw r3, r3, #1028 @ 0x404 8005158: 643b str r3, [r7, #64] @ 0x40 800515a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800515e: b29a uxth r2, r3 8005160: 6c3b ldr r3, [r7, #64] @ 0x40 8005162: 801a strh r2, [r3, #0] /* Copy user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len); 8005164: 68fb ldr r3, [r7, #12] 8005166: 6818 ldr r0, [r3, #0] 8005168: 68bb ldr r3, [r7, #8] 800516a: 6959 ldr r1, [r3, #20] 800516c: 68bb ldr r3, [r7, #8] 800516e: 891a ldrh r2, [r3, #8] 8005170: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005174: b29b uxth r3, r3 8005176: f004 f968 bl 800944a 800517a: e1e2 b.n 8005542 } } else /* Data Buffer1 ACK received */ { /* multi-packet on the NON control IN endpoint */ TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); 800517c: 68fb ldr r3, [r7, #12] 800517e: 681b ldr r3, [r3, #0] 8005180: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8005184: b29b uxth r3, r3 8005186: 461a mov r2, r3 8005188: 68bb ldr r3, [r7, #8] 800518a: 781b ldrb r3, [r3, #0] 800518c: 00db lsls r3, r3, #3 800518e: 4413 add r3, r2 8005190: 3306 adds r3, #6 8005192: 005b lsls r3, r3, #1 8005194: 68fa ldr r2, [r7, #12] 8005196: 6812 ldr r2, [r2, #0] 8005198: 4413 add r3, r2 800519a: f503 6380 add.w r3, r3, #1024 @ 0x400 800519e: 881b ldrh r3, [r3, #0] 80051a0: f3c3 0309 ubfx r3, r3, #0, #10 80051a4: f8a7 3086 strh.w r3, [r7, #134] @ 0x86 if (ep->xfer_len >= TxPctSize) 80051a8: 68bb ldr r3, [r7, #8] 80051aa: 699a ldr r2, [r3, #24] 80051ac: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80051b0: 429a cmp r2, r3 80051b2: d307 bcc.n 80051c4 { ep->xfer_len -= TxPctSize; 80051b4: 68bb ldr r3, [r7, #8] 80051b6: 699a ldr r2, [r3, #24] 80051b8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80051bc: 1ad2 subs r2, r2, r3 80051be: 68bb ldr r3, [r7, #8] 80051c0: 619a str r2, [r3, #24] 80051c2: e002 b.n 80051ca } else { ep->xfer_len = 0U; 80051c4: 68bb ldr r3, [r7, #8] 80051c6: 2200 movs r2, #0 80051c8: 619a str r2, [r3, #24] } /* Transfer is completed */ if (ep->xfer_len == 0U) 80051ca: 68bb ldr r3, [r7, #8] 80051cc: 699b ldr r3, [r3, #24] 80051ce: 2b00 cmp r3, #0 80051d0: f040 80c0 bne.w 8005354 { PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 80051d4: 68bb ldr r3, [r7, #8] 80051d6: 785b ldrb r3, [r3, #1] 80051d8: 2b00 cmp r3, #0 80051da: d126 bne.n 800522a 80051dc: 68fb ldr r3, [r7, #12] 80051de: 681b ldr r3, [r3, #0] 80051e0: 67fb str r3, [r7, #124] @ 0x7c 80051e2: 68fb ldr r3, [r7, #12] 80051e4: 681b ldr r3, [r3, #0] 80051e6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80051ea: b29b uxth r3, r3 80051ec: 461a mov r2, r3 80051ee: 6ffb ldr r3, [r7, #124] @ 0x7c 80051f0: 4413 add r3, r2 80051f2: 67fb str r3, [r7, #124] @ 0x7c 80051f4: 68bb ldr r3, [r7, #8] 80051f6: 781b ldrb r3, [r3, #0] 80051f8: 011a lsls r2, r3, #4 80051fa: 6ffb ldr r3, [r7, #124] @ 0x7c 80051fc: 4413 add r3, r2 80051fe: f203 4304 addw r3, r3, #1028 @ 0x404 8005202: 67bb str r3, [r7, #120] @ 0x78 8005204: 6fbb ldr r3, [r7, #120] @ 0x78 8005206: 881b ldrh r3, [r3, #0] 8005208: b29b uxth r3, r3 800520a: f3c3 0309 ubfx r3, r3, #0, #10 800520e: b29a uxth r2, r3 8005210: 6fbb ldr r3, [r7, #120] @ 0x78 8005212: 801a strh r2, [r3, #0] 8005214: 6fbb ldr r3, [r7, #120] @ 0x78 8005216: 881b ldrh r3, [r3, #0] 8005218: b29b uxth r3, r3 800521a: ea6f 4343 mvn.w r3, r3, lsl #17 800521e: ea6f 4353 mvn.w r3, r3, lsr #17 8005222: b29a uxth r2, r3 8005224: 6fbb ldr r3, [r7, #120] @ 0x78 8005226: 801a strh r2, [r3, #0] 8005228: e01a b.n 8005260 800522a: 68bb ldr r3, [r7, #8] 800522c: 785b ldrb r3, [r3, #1] 800522e: 2b01 cmp r3, #1 8005230: d116 bne.n 8005260 8005232: 68fb ldr r3, [r7, #12] 8005234: 681b ldr r3, [r3, #0] 8005236: 667b str r3, [r7, #100] @ 0x64 8005238: 68fb ldr r3, [r7, #12] 800523a: 681b ldr r3, [r3, #0] 800523c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8005240: b29b uxth r3, r3 8005242: 461a mov r2, r3 8005244: 6e7b ldr r3, [r7, #100] @ 0x64 8005246: 4413 add r3, r2 8005248: 667b str r3, [r7, #100] @ 0x64 800524a: 68bb ldr r3, [r7, #8] 800524c: 781b ldrb r3, [r3, #0] 800524e: 011a lsls r2, r3, #4 8005250: 6e7b ldr r3, [r7, #100] @ 0x64 8005252: 4413 add r3, r2 8005254: f203 4304 addw r3, r3, #1028 @ 0x404 8005258: 663b str r3, [r7, #96] @ 0x60 800525a: 6e3b ldr r3, [r7, #96] @ 0x60 800525c: 2200 movs r2, #0 800525e: 801a strh r2, [r3, #0] PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); 8005260: 68fb ldr r3, [r7, #12] 8005262: 681b ldr r3, [r3, #0] 8005264: 677b str r3, [r7, #116] @ 0x74 8005266: 68bb ldr r3, [r7, #8] 8005268: 785b ldrb r3, [r3, #1] 800526a: 2b00 cmp r3, #0 800526c: d12b bne.n 80052c6 800526e: 68fb ldr r3, [r7, #12] 8005270: 681b ldr r3, [r3, #0] 8005272: 66fb str r3, [r7, #108] @ 0x6c 8005274: 68fb ldr r3, [r7, #12] 8005276: 681b ldr r3, [r3, #0] 8005278: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800527c: b29b uxth r3, r3 800527e: 461a mov r2, r3 8005280: 6efb ldr r3, [r7, #108] @ 0x6c 8005282: 4413 add r3, r2 8005284: 66fb str r3, [r7, #108] @ 0x6c 8005286: 68bb ldr r3, [r7, #8] 8005288: 781b ldrb r3, [r3, #0] 800528a: 011a lsls r2, r3, #4 800528c: 6efb ldr r3, [r7, #108] @ 0x6c 800528e: 4413 add r3, r2 8005290: f203 430c addw r3, r3, #1036 @ 0x40c 8005294: f8c7 3080 str.w r3, [r7, #128] @ 0x80 8005298: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 800529c: 881b ldrh r3, [r3, #0] 800529e: b29b uxth r3, r3 80052a0: f3c3 0309 ubfx r3, r3, #0, #10 80052a4: b29a uxth r2, r3 80052a6: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 80052aa: 801a strh r2, [r3, #0] 80052ac: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 80052b0: 881b ldrh r3, [r3, #0] 80052b2: b29b uxth r3, r3 80052b4: ea6f 4343 mvn.w r3, r3, lsl #17 80052b8: ea6f 4353 mvn.w r3, r3, lsr #17 80052bc: b29a uxth r2, r3 80052be: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 80052c2: 801a strh r2, [r3, #0] 80052c4: e017 b.n 80052f6 80052c6: 68bb ldr r3, [r7, #8] 80052c8: 785b ldrb r3, [r3, #1] 80052ca: 2b01 cmp r3, #1 80052cc: d113 bne.n 80052f6 80052ce: 68fb ldr r3, [r7, #12] 80052d0: 681b ldr r3, [r3, #0] 80052d2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80052d6: b29b uxth r3, r3 80052d8: 461a mov r2, r3 80052da: 6f7b ldr r3, [r7, #116] @ 0x74 80052dc: 4413 add r3, r2 80052de: 677b str r3, [r7, #116] @ 0x74 80052e0: 68bb ldr r3, [r7, #8] 80052e2: 781b ldrb r3, [r3, #0] 80052e4: 011a lsls r2, r3, #4 80052e6: 6f7b ldr r3, [r7, #116] @ 0x74 80052e8: 4413 add r3, r2 80052ea: f203 430c addw r3, r3, #1036 @ 0x40c 80052ee: 673b str r3, [r7, #112] @ 0x70 80052f0: 6f3b ldr r3, [r7, #112] @ 0x70 80052f2: 2200 movs r2, #0 80052f4: 801a strh r2, [r3, #0] /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, ep->num); #else HAL_PCD_DataInStageCallback(hpcd, ep->num); 80052f6: 68bb ldr r3, [r7, #8] 80052f8: 781b ldrb r3, [r3, #0] 80052fa: 4619 mov r1, r3 80052fc: 68f8 ldr r0, [r7, #12] 80052fe: f005 ff68 bl 800b1d2 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8005302: 88fb ldrh r3, [r7, #6] 8005304: f403 4380 and.w r3, r3, #16384 @ 0x4000 8005308: 2b00 cmp r3, #0 800530a: f040 811a bne.w 8005542 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 800530e: 68fb ldr r3, [r7, #12] 8005310: 681b ldr r3, [r3, #0] 8005312: 461a mov r2, r3 8005314: 68bb ldr r3, [r7, #8] 8005316: 781b ldrb r3, [r3, #0] 8005318: 009b lsls r3, r3, #2 800531a: 4413 add r3, r2 800531c: 881b ldrh r3, [r3, #0] 800531e: b29b uxth r3, r3 8005320: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8005324: f023 0370 bic.w r3, r3, #112 @ 0x70 8005328: f8a7 3088 strh.w r3, [r7, #136] @ 0x88 800532c: 68fb ldr r3, [r7, #12] 800532e: 681b ldr r3, [r3, #0] 8005330: 461a mov r2, r3 8005332: 68bb ldr r3, [r7, #8] 8005334: 781b ldrb r3, [r3, #0] 8005336: 009b lsls r3, r3, #2 8005338: 441a add r2, r3 800533a: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88 800533e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8005342: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8005346: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800534a: f043 0380 orr.w r3, r3, #128 @ 0x80 800534e: b29b uxth r3, r3 8005350: 8013 strh r3, [r2, #0] 8005352: e0f6 b.n 8005542 } } else /* Transfer is not yet Done */ { /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) 8005354: 88fb ldrh r3, [r7, #6] 8005356: f403 4380 and.w r3, r3, #16384 @ 0x4000 800535a: 2b00 cmp r3, #0 800535c: d121 bne.n 80053a2 { PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); 800535e: 68fb ldr r3, [r7, #12] 8005360: 681b ldr r3, [r3, #0] 8005362: 461a mov r2, r3 8005364: 68bb ldr r3, [r7, #8] 8005366: 781b ldrb r3, [r3, #0] 8005368: 009b lsls r3, r3, #2 800536a: 4413 add r3, r2 800536c: 881b ldrh r3, [r3, #0] 800536e: b29b uxth r3, r3 8005370: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8005374: f023 0370 bic.w r3, r3, #112 @ 0x70 8005378: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 800537c: 68fb ldr r3, [r7, #12] 800537e: 681b ldr r3, [r3, #0] 8005380: 461a mov r2, r3 8005382: 68bb ldr r3, [r7, #8] 8005384: 781b ldrb r3, [r3, #0] 8005386: 009b lsls r3, r3, #2 8005388: 441a add r2, r3 800538a: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 800538e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8005392: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8005396: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800539a: f043 0380 orr.w r3, r3, #128 @ 0x80 800539e: b29b uxth r3, r3 80053a0: 8013 strh r3, [r2, #0] } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) 80053a2: 68bb ldr r3, [r7, #8] 80053a4: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 80053a8: 2b01 cmp r3, #1 80053aa: f040 80ca bne.w 8005542 { ep->xfer_buff += TxPctSize; 80053ae: 68bb ldr r3, [r7, #8] 80053b0: 695a ldr r2, [r3, #20] 80053b2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80053b6: 441a add r2, r3 80053b8: 68bb ldr r3, [r7, #8] 80053ba: 615a str r2, [r3, #20] ep->xfer_count += TxPctSize; 80053bc: 68bb ldr r3, [r7, #8] 80053be: 69da ldr r2, [r3, #28] 80053c0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80053c4: 441a add r2, r3 80053c6: 68bb ldr r3, [r7, #8] 80053c8: 61da str r2, [r3, #28] /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) 80053ca: 68bb ldr r3, [r7, #8] 80053cc: 6a1a ldr r2, [r3, #32] 80053ce: 68bb ldr r3, [r7, #8] 80053d0: 691b ldr r3, [r3, #16] 80053d2: 429a cmp r2, r3 80053d4: d30b bcc.n 80053ee { len = ep->maxpacket; 80053d6: 68bb ldr r3, [r7, #8] 80053d8: 691b ldr r3, [r3, #16] 80053da: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db -= len; 80053de: 68bb ldr r3, [r7, #8] 80053e0: 6a1a ldr r2, [r3, #32] 80053e2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80053e6: 1ad2 subs r2, r2, r3 80053e8: 68bb ldr r3, [r7, #8] 80053ea: 621a str r2, [r3, #32] 80053ec: e017 b.n 800541e } else if (ep->xfer_len_db == 0U) 80053ee: 68bb ldr r3, [r7, #8] 80053f0: 6a1b ldr r3, [r3, #32] 80053f2: 2b00 cmp r3, #0 80053f4: d108 bne.n 8005408 { len = TxPctSize; 80053f6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86 80053fa: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_fill_db = 0U; 80053fe: 68bb ldr r3, [r7, #8] 8005400: 2200 movs r2, #0 8005402: f883 2024 strb.w r2, [r3, #36] @ 0x24 8005406: e00a b.n 800541e } else { len = ep->xfer_len_db; 8005408: 68bb ldr r3, [r7, #8] 800540a: 6a1b ldr r3, [r3, #32] 800540c: f8c7 308c str.w r3, [r7, #140] @ 0x8c ep->xfer_len_db = 0U; 8005410: 68bb ldr r3, [r7, #8] 8005412: 2200 movs r2, #0 8005414: 621a str r2, [r3, #32] ep->xfer_fill_db = 0; 8005416: 68bb ldr r3, [r7, #8] 8005418: 2200 movs r2, #0 800541a: f883 2024 strb.w r2, [r3, #36] @ 0x24 } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len); 800541e: 68fb ldr r3, [r7, #12] 8005420: 681b ldr r3, [r3, #0] 8005422: 657b str r3, [r7, #84] @ 0x54 8005424: 68bb ldr r3, [r7, #8] 8005426: 785b ldrb r3, [r3, #1] 8005428: 2b00 cmp r3, #0 800542a: d165 bne.n 80054f8 800542c: 68fb ldr r3, [r7, #12] 800542e: 681b ldr r3, [r3, #0] 8005430: 65fb str r3, [r7, #92] @ 0x5c 8005432: 68fb ldr r3, [r7, #12] 8005434: 681b ldr r3, [r3, #0] 8005436: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800543a: b29b uxth r3, r3 800543c: 461a mov r2, r3 800543e: 6dfb ldr r3, [r7, #92] @ 0x5c 8005440: 4413 add r3, r2 8005442: 65fb str r3, [r7, #92] @ 0x5c 8005444: 68bb ldr r3, [r7, #8] 8005446: 781b ldrb r3, [r3, #0] 8005448: 011a lsls r2, r3, #4 800544a: 6dfb ldr r3, [r7, #92] @ 0x5c 800544c: 4413 add r3, r2 800544e: f203 430c addw r3, r3, #1036 @ 0x40c 8005452: 65bb str r3, [r7, #88] @ 0x58 8005454: 6dbb ldr r3, [r7, #88] @ 0x58 8005456: 881b ldrh r3, [r3, #0] 8005458: b29b uxth r3, r3 800545a: f3c3 0309 ubfx r3, r3, #0, #10 800545e: b29a uxth r2, r3 8005460: 6dbb ldr r3, [r7, #88] @ 0x58 8005462: 801a strh r2, [r3, #0] 8005464: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005468: 2b3e cmp r3, #62 @ 0x3e 800546a: d91d bls.n 80054a8 800546c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005470: 095b lsrs r3, r3, #5 8005472: 66bb str r3, [r7, #104] @ 0x68 8005474: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005478: f003 031f and.w r3, r3, #31 800547c: 2b00 cmp r3, #0 800547e: d102 bne.n 8005486 8005480: 6ebb ldr r3, [r7, #104] @ 0x68 8005482: 3b01 subs r3, #1 8005484: 66bb str r3, [r7, #104] @ 0x68 8005486: 6dbb ldr r3, [r7, #88] @ 0x58 8005488: 881b ldrh r3, [r3, #0] 800548a: b29a uxth r2, r3 800548c: 6ebb ldr r3, [r7, #104] @ 0x68 800548e: b29b uxth r3, r3 8005490: 029b lsls r3, r3, #10 8005492: b29b uxth r3, r3 8005494: 4313 orrs r3, r2 8005496: b29b uxth r3, r3 8005498: ea6f 4343 mvn.w r3, r3, lsl #17 800549c: ea6f 4353 mvn.w r3, r3, lsr #17 80054a0: b29a uxth r2, r3 80054a2: 6dbb ldr r3, [r7, #88] @ 0x58 80054a4: 801a strh r2, [r3, #0] 80054a6: e041 b.n 800552c 80054a8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80054ac: 2b00 cmp r3, #0 80054ae: d10a bne.n 80054c6 80054b0: 6dbb ldr r3, [r7, #88] @ 0x58 80054b2: 881b ldrh r3, [r3, #0] 80054b4: b29b uxth r3, r3 80054b6: ea6f 4343 mvn.w r3, r3, lsl #17 80054ba: ea6f 4353 mvn.w r3, r3, lsr #17 80054be: b29a uxth r2, r3 80054c0: 6dbb ldr r3, [r7, #88] @ 0x58 80054c2: 801a strh r2, [r3, #0] 80054c4: e032 b.n 800552c 80054c6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80054ca: 085b lsrs r3, r3, #1 80054cc: 66bb str r3, [r7, #104] @ 0x68 80054ce: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80054d2: f003 0301 and.w r3, r3, #1 80054d6: 2b00 cmp r3, #0 80054d8: d002 beq.n 80054e0 80054da: 6ebb ldr r3, [r7, #104] @ 0x68 80054dc: 3301 adds r3, #1 80054de: 66bb str r3, [r7, #104] @ 0x68 80054e0: 6dbb ldr r3, [r7, #88] @ 0x58 80054e2: 881b ldrh r3, [r3, #0] 80054e4: b29a uxth r2, r3 80054e6: 6ebb ldr r3, [r7, #104] @ 0x68 80054e8: b29b uxth r3, r3 80054ea: 029b lsls r3, r3, #10 80054ec: b29b uxth r3, r3 80054ee: 4313 orrs r3, r2 80054f0: b29a uxth r2, r3 80054f2: 6dbb ldr r3, [r7, #88] @ 0x58 80054f4: 801a strh r2, [r3, #0] 80054f6: e019 b.n 800552c 80054f8: 68bb ldr r3, [r7, #8] 80054fa: 785b ldrb r3, [r3, #1] 80054fc: 2b01 cmp r3, #1 80054fe: d115 bne.n 800552c 8005500: 68fb ldr r3, [r7, #12] 8005502: 681b ldr r3, [r3, #0] 8005504: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8005508: b29b uxth r3, r3 800550a: 461a mov r2, r3 800550c: 6d7b ldr r3, [r7, #84] @ 0x54 800550e: 4413 add r3, r2 8005510: 657b str r3, [r7, #84] @ 0x54 8005512: 68bb ldr r3, [r7, #8] 8005514: 781b ldrb r3, [r3, #0] 8005516: 011a lsls r2, r3, #4 8005518: 6d7b ldr r3, [r7, #84] @ 0x54 800551a: 4413 add r3, r2 800551c: f203 430c addw r3, r3, #1036 @ 0x40c 8005520: 653b str r3, [r7, #80] @ 0x50 8005522: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8005526: b29a uxth r2, r3 8005528: 6d3b ldr r3, [r7, #80] @ 0x50 800552a: 801a strh r2, [r3, #0] /* Copy the user buffer to USB PMA */ USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len); 800552c: 68fb ldr r3, [r7, #12] 800552e: 6818 ldr r0, [r3, #0] 8005530: 68bb ldr r3, [r7, #8] 8005532: 6959 ldr r1, [r3, #20] 8005534: 68bb ldr r3, [r7, #8] 8005536: 895a ldrh r2, [r3, #10] 8005538: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800553c: b29b uxth r3, r3 800553e: f003 ff84 bl 800944a } } } /*enable endpoint IN*/ PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID); 8005542: 68fb ldr r3, [r7, #12] 8005544: 681b ldr r3, [r3, #0] 8005546: 461a mov r2, r3 8005548: 68bb ldr r3, [r7, #8] 800554a: 781b ldrb r3, [r3, #0] 800554c: 009b lsls r3, r3, #2 800554e: 4413 add r3, r2 8005550: 881b ldrh r3, [r3, #0] 8005552: b29b uxth r3, r3 8005554: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8005558: f023 0340 bic.w r3, r3, #64 @ 0x40 800555c: 82bb strh r3, [r7, #20] 800555e: 8abb ldrh r3, [r7, #20] 8005560: f083 0310 eor.w r3, r3, #16 8005564: 82bb strh r3, [r7, #20] 8005566: 8abb ldrh r3, [r7, #20] 8005568: f083 0320 eor.w r3, r3, #32 800556c: 82bb strh r3, [r7, #20] 800556e: 68fb ldr r3, [r7, #12] 8005570: 681b ldr r3, [r3, #0] 8005572: 461a mov r2, r3 8005574: 68bb ldr r3, [r7, #8] 8005576: 781b ldrb r3, [r3, #0] 8005578: 009b lsls r3, r3, #2 800557a: 441a add r2, r3 800557c: 8abb ldrh r3, [r7, #20] 800557e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8005582: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8005586: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800558a: f043 0380 orr.w r3, r3, #128 @ 0x80 800558e: b29b uxth r3, r3 8005590: 8013 strh r3, [r2, #0] return HAL_OK; 8005592: 2300 movs r3, #0 } 8005594: 4618 mov r0, r3 8005596: 3790 adds r7, #144 @ 0x90 8005598: 46bd mov sp, r7 800559a: bd80 pop {r7, pc} 0800559c : * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, uint16_t ep_kind, uint32_t pmaadress) { 800559c: b480 push {r7} 800559e: b087 sub sp, #28 80055a0: af00 add r7, sp, #0 80055a2: 60f8 str r0, [r7, #12] 80055a4: 607b str r3, [r7, #4] 80055a6: 460b mov r3, r1 80055a8: 817b strh r3, [r7, #10] 80055aa: 4613 mov r3, r2 80055ac: 813b strh r3, [r7, #8] PCD_EPTypeDef *ep; /* initialize ep structure*/ if ((0x80U & ep_addr) == 0x80U) 80055ae: 897b ldrh r3, [r7, #10] 80055b0: f003 0380 and.w r3, r3, #128 @ 0x80 80055b4: b29b uxth r3, r3 80055b6: 2b00 cmp r3, #0 80055b8: d00b beq.n 80055d2 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 80055ba: 897b ldrh r3, [r7, #10] 80055bc: f003 0207 and.w r2, r3, #7 80055c0: 4613 mov r3, r2 80055c2: 009b lsls r3, r3, #2 80055c4: 4413 add r3, r2 80055c6: 00db lsls r3, r3, #3 80055c8: 3310 adds r3, #16 80055ca: 68fa ldr r2, [r7, #12] 80055cc: 4413 add r3, r2 80055ce: 617b str r3, [r7, #20] 80055d0: e009 b.n 80055e6 } else { ep = &hpcd->OUT_ep[ep_addr]; 80055d2: 897a ldrh r2, [r7, #10] 80055d4: 4613 mov r3, r2 80055d6: 009b lsls r3, r3, #2 80055d8: 4413 add r3, r2 80055da: 00db lsls r3, r3, #3 80055dc: f503 73a8 add.w r3, r3, #336 @ 0x150 80055e0: 68fa ldr r2, [r7, #12] 80055e2: 4413 add r3, r2 80055e4: 617b str r3, [r7, #20] } /* Here we check if the endpoint is single or double Buffer*/ if (ep_kind == PCD_SNG_BUF) 80055e6: 893b ldrh r3, [r7, #8] 80055e8: 2b00 cmp r3, #0 80055ea: d107 bne.n 80055fc { /* Single Buffer */ ep->doublebuffer = 0U; 80055ec: 697b ldr r3, [r7, #20] 80055ee: 2200 movs r2, #0 80055f0: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaadress = (uint16_t)pmaadress; 80055f2: 687b ldr r3, [r7, #4] 80055f4: b29a uxth r2, r3 80055f6: 697b ldr r3, [r7, #20] 80055f8: 80da strh r2, [r3, #6] 80055fa: e00b b.n 8005614 } #if (USE_USB_DOUBLE_BUFFER == 1U) else /* USB_DBL_BUF */ { /* Double Buffer Endpoint */ ep->doublebuffer = 1U; 80055fc: 697b ldr r3, [r7, #20] 80055fe: 2201 movs r2, #1 8005600: 731a strb r2, [r3, #12] /* Configure the PMA */ ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); 8005602: 687b ldr r3, [r7, #4] 8005604: b29a uxth r2, r3 8005606: 697b ldr r3, [r7, #20] 8005608: 811a strh r2, [r3, #8] ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); 800560a: 687b ldr r3, [r7, #4] 800560c: 0c1b lsrs r3, r3, #16 800560e: b29a uxth r2, r3 8005610: 697b ldr r3, [r7, #20] 8005612: 815a strh r2, [r3, #10] } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 8005614: 2300 movs r3, #0 } 8005616: 4618 mov r0, r3 8005618: 371c adds r7, #28 800561a: 46bd mov sp, r7 800561c: bc80 pop {r7} 800561e: 4770 bx lr 08005620 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8005620: b580 push {r7, lr} 8005622: b086 sub sp, #24 8005624: af00 add r7, sp, #0 8005626: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8005628: 687b ldr r3, [r7, #4] 800562a: 2b00 cmp r3, #0 800562c: d101 bne.n 8005632 { return HAL_ERROR; 800562e: 2301 movs r3, #1 8005630: e272 b.n 8005b18 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005632: 687b ldr r3, [r7, #4] 8005634: 681b ldr r3, [r3, #0] 8005636: f003 0301 and.w r3, r3, #1 800563a: 2b00 cmp r3, #0 800563c: f000 8087 beq.w 800574e { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8005640: 4b92 ldr r3, [pc, #584] @ (800588c ) 8005642: 685b ldr r3, [r3, #4] 8005644: f003 030c and.w r3, r3, #12 8005648: 2b04 cmp r3, #4 800564a: d00c beq.n 8005666 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) 800564c: 4b8f ldr r3, [pc, #572] @ (800588c ) 800564e: 685b ldr r3, [r3, #4] 8005650: f003 030c and.w r3, r3, #12 8005654: 2b08 cmp r3, #8 8005656: d112 bne.n 800567e 8005658: 4b8c ldr r3, [pc, #560] @ (800588c ) 800565a: 685b ldr r3, [r3, #4] 800565c: f403 3380 and.w r3, r3, #65536 @ 0x10000 8005660: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8005664: d10b bne.n 800567e { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8005666: 4b89 ldr r3, [pc, #548] @ (800588c ) 8005668: 681b ldr r3, [r3, #0] 800566a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800566e: 2b00 cmp r3, #0 8005670: d06c beq.n 800574c 8005672: 687b ldr r3, [r7, #4] 8005674: 685b ldr r3, [r3, #4] 8005676: 2b00 cmp r3, #0 8005678: d168 bne.n 800574c { return HAL_ERROR; 800567a: 2301 movs r3, #1 800567c: e24c b.n 8005b18 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800567e: 687b ldr r3, [r7, #4] 8005680: 685b ldr r3, [r3, #4] 8005682: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8005686: d106 bne.n 8005696 8005688: 4b80 ldr r3, [pc, #512] @ (800588c ) 800568a: 681b ldr r3, [r3, #0] 800568c: 4a7f ldr r2, [pc, #508] @ (800588c ) 800568e: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8005692: 6013 str r3, [r2, #0] 8005694: e02e b.n 80056f4 8005696: 687b ldr r3, [r7, #4] 8005698: 685b ldr r3, [r3, #4] 800569a: 2b00 cmp r3, #0 800569c: d10c bne.n 80056b8 800569e: 4b7b ldr r3, [pc, #492] @ (800588c ) 80056a0: 681b ldr r3, [r3, #0] 80056a2: 4a7a ldr r2, [pc, #488] @ (800588c ) 80056a4: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80056a8: 6013 str r3, [r2, #0] 80056aa: 4b78 ldr r3, [pc, #480] @ (800588c ) 80056ac: 681b ldr r3, [r3, #0] 80056ae: 4a77 ldr r2, [pc, #476] @ (800588c ) 80056b0: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80056b4: 6013 str r3, [r2, #0] 80056b6: e01d b.n 80056f4 80056b8: 687b ldr r3, [r7, #4] 80056ba: 685b ldr r3, [r3, #4] 80056bc: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 80056c0: d10c bne.n 80056dc 80056c2: 4b72 ldr r3, [pc, #456] @ (800588c ) 80056c4: 681b ldr r3, [r3, #0] 80056c6: 4a71 ldr r2, [pc, #452] @ (800588c ) 80056c8: f443 2380 orr.w r3, r3, #262144 @ 0x40000 80056cc: 6013 str r3, [r2, #0] 80056ce: 4b6f ldr r3, [pc, #444] @ (800588c ) 80056d0: 681b ldr r3, [r3, #0] 80056d2: 4a6e ldr r2, [pc, #440] @ (800588c ) 80056d4: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80056d8: 6013 str r3, [r2, #0] 80056da: e00b b.n 80056f4 80056dc: 4b6b ldr r3, [pc, #428] @ (800588c ) 80056de: 681b ldr r3, [r3, #0] 80056e0: 4a6a ldr r2, [pc, #424] @ (800588c ) 80056e2: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80056e6: 6013 str r3, [r2, #0] 80056e8: 4b68 ldr r3, [pc, #416] @ (800588c ) 80056ea: 681b ldr r3, [r3, #0] 80056ec: 4a67 ldr r2, [pc, #412] @ (800588c ) 80056ee: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80056f2: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 80056f4: 687b ldr r3, [r7, #4] 80056f6: 685b ldr r3, [r3, #4] 80056f8: 2b00 cmp r3, #0 80056fa: d013 beq.n 8005724 { /* Get Start Tick */ tickstart = HAL_GetTick(); 80056fc: f7fc ff8c bl 8002618 8005700: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8005702: e008 b.n 8005716 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8005704: f7fc ff88 bl 8002618 8005708: 4602 mov r2, r0 800570a: 693b ldr r3, [r7, #16] 800570c: 1ad3 subs r3, r2, r3 800570e: 2b64 cmp r3, #100 @ 0x64 8005710: d901 bls.n 8005716 { return HAL_TIMEOUT; 8005712: 2303 movs r3, #3 8005714: e200 b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8005716: 4b5d ldr r3, [pc, #372] @ (800588c ) 8005718: 681b ldr r3, [r3, #0] 800571a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800571e: 2b00 cmp r3, #0 8005720: d0f0 beq.n 8005704 8005722: e014 b.n 800574e } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 8005724: f7fc ff78 bl 8002618 8005728: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800572a: e008 b.n 800573e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 800572c: f7fc ff74 bl 8002618 8005730: 4602 mov r2, r0 8005732: 693b ldr r3, [r7, #16] 8005734: 1ad3 subs r3, r2, r3 8005736: 2b64 cmp r3, #100 @ 0x64 8005738: d901 bls.n 800573e { return HAL_TIMEOUT; 800573a: 2303 movs r3, #3 800573c: e1ec b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800573e: 4b53 ldr r3, [pc, #332] @ (800588c ) 8005740: 681b ldr r3, [r3, #0] 8005742: f403 3300 and.w r3, r3, #131072 @ 0x20000 8005746: 2b00 cmp r3, #0 8005748: d1f0 bne.n 800572c 800574a: e000 b.n 800574e if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 800574c: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 800574e: 687b ldr r3, [r7, #4] 8005750: 681b ldr r3, [r3, #0] 8005752: f003 0302 and.w r3, r3, #2 8005756: 2b00 cmp r3, #0 8005758: d063 beq.n 8005822 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 800575a: 4b4c ldr r3, [pc, #304] @ (800588c ) 800575c: 685b ldr r3, [r3, #4] 800575e: f003 030c and.w r3, r3, #12 8005762: 2b00 cmp r3, #0 8005764: d00b beq.n 800577e || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) 8005766: 4b49 ldr r3, [pc, #292] @ (800588c ) 8005768: 685b ldr r3, [r3, #4] 800576a: f003 030c and.w r3, r3, #12 800576e: 2b08 cmp r3, #8 8005770: d11c bne.n 80057ac 8005772: 4b46 ldr r3, [pc, #280] @ (800588c ) 8005774: 685b ldr r3, [r3, #4] 8005776: f403 3380 and.w r3, r3, #65536 @ 0x10000 800577a: 2b00 cmp r3, #0 800577c: d116 bne.n 80057ac { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800577e: 4b43 ldr r3, [pc, #268] @ (800588c ) 8005780: 681b ldr r3, [r3, #0] 8005782: f003 0302 and.w r3, r3, #2 8005786: 2b00 cmp r3, #0 8005788: d005 beq.n 8005796 800578a: 687b ldr r3, [r7, #4] 800578c: 691b ldr r3, [r3, #16] 800578e: 2b01 cmp r3, #1 8005790: d001 beq.n 8005796 { return HAL_ERROR; 8005792: 2301 movs r3, #1 8005794: e1c0 b.n 8005b18 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8005796: 4b3d ldr r3, [pc, #244] @ (800588c ) 8005798: 681b ldr r3, [r3, #0] 800579a: f023 02f8 bic.w r2, r3, #248 @ 0xf8 800579e: 687b ldr r3, [r7, #4] 80057a0: 695b ldr r3, [r3, #20] 80057a2: 00db lsls r3, r3, #3 80057a4: 4939 ldr r1, [pc, #228] @ (800588c ) 80057a6: 4313 orrs r3, r2 80057a8: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80057aa: e03a b.n 8005822 } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 80057ac: 687b ldr r3, [r7, #4] 80057ae: 691b ldr r3, [r3, #16] 80057b0: 2b00 cmp r3, #0 80057b2: d020 beq.n 80057f6 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80057b4: 4b36 ldr r3, [pc, #216] @ (8005890 ) 80057b6: 2201 movs r2, #1 80057b8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80057ba: f7fc ff2d bl 8002618 80057be: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80057c0: e008 b.n 80057d4 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80057c2: f7fc ff29 bl 8002618 80057c6: 4602 mov r2, r0 80057c8: 693b ldr r3, [r7, #16] 80057ca: 1ad3 subs r3, r2, r3 80057cc: 2b02 cmp r3, #2 80057ce: d901 bls.n 80057d4 { return HAL_TIMEOUT; 80057d0: 2303 movs r3, #3 80057d2: e1a1 b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80057d4: 4b2d ldr r3, [pc, #180] @ (800588c ) 80057d6: 681b ldr r3, [r3, #0] 80057d8: f003 0302 and.w r3, r3, #2 80057dc: 2b00 cmp r3, #0 80057de: d0f0 beq.n 80057c2 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80057e0: 4b2a ldr r3, [pc, #168] @ (800588c ) 80057e2: 681b ldr r3, [r3, #0] 80057e4: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80057e8: 687b ldr r3, [r7, #4] 80057ea: 695b ldr r3, [r3, #20] 80057ec: 00db lsls r3, r3, #3 80057ee: 4927 ldr r1, [pc, #156] @ (800588c ) 80057f0: 4313 orrs r3, r2 80057f2: 600b str r3, [r1, #0] 80057f4: e015 b.n 8005822 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80057f6: 4b26 ldr r3, [pc, #152] @ (8005890 ) 80057f8: 2200 movs r2, #0 80057fa: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 80057fc: f7fc ff0c bl 8002618 8005800: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8005802: e008 b.n 8005816 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8005804: f7fc ff08 bl 8002618 8005808: 4602 mov r2, r0 800580a: 693b ldr r3, [r7, #16] 800580c: 1ad3 subs r3, r2, r3 800580e: 2b02 cmp r3, #2 8005810: d901 bls.n 8005816 { return HAL_TIMEOUT; 8005812: 2303 movs r3, #3 8005814: e180 b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8005816: 4b1d ldr r3, [pc, #116] @ (800588c ) 8005818: 681b ldr r3, [r3, #0] 800581a: f003 0302 and.w r3, r3, #2 800581e: 2b00 cmp r3, #0 8005820: d1f0 bne.n 8005804 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8005822: 687b ldr r3, [r7, #4] 8005824: 681b ldr r3, [r3, #0] 8005826: f003 0308 and.w r3, r3, #8 800582a: 2b00 cmp r3, #0 800582c: d03a beq.n 80058a4 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 800582e: 687b ldr r3, [r7, #4] 8005830: 699b ldr r3, [r3, #24] 8005832: 2b00 cmp r3, #0 8005834: d019 beq.n 800586a { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8005836: 4b17 ldr r3, [pc, #92] @ (8005894 ) 8005838: 2201 movs r2, #1 800583a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 800583c: f7fc feec bl 8002618 8005840: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8005842: e008 b.n 8005856 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8005844: f7fc fee8 bl 8002618 8005848: 4602 mov r2, r0 800584a: 693b ldr r3, [r7, #16] 800584c: 1ad3 subs r3, r2, r3 800584e: 2b02 cmp r3, #2 8005850: d901 bls.n 8005856 { return HAL_TIMEOUT; 8005852: 2303 movs r3, #3 8005854: e160 b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8005856: 4b0d ldr r3, [pc, #52] @ (800588c ) 8005858: 6a5b ldr r3, [r3, #36] @ 0x24 800585a: f003 0302 and.w r3, r3, #2 800585e: 2b00 cmp r3, #0 8005860: d0f0 beq.n 8005844 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); 8005862: 2001 movs r0, #1 8005864: f000 fad0 bl 8005e08 8005868: e01c b.n 80058a4 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 800586a: 4b0a ldr r3, [pc, #40] @ (8005894 ) 800586c: 2200 movs r2, #0 800586e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005870: f7fc fed2 bl 8002618 8005874: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8005876: e00f b.n 8005898 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8005878: f7fc fece bl 8002618 800587c: 4602 mov r2, r0 800587e: 693b ldr r3, [r7, #16] 8005880: 1ad3 subs r3, r2, r3 8005882: 2b02 cmp r3, #2 8005884: d908 bls.n 8005898 { return HAL_TIMEOUT; 8005886: 2303 movs r3, #3 8005888: e146 b.n 8005b18 800588a: bf00 nop 800588c: 40021000 .word 0x40021000 8005890: 42420000 .word 0x42420000 8005894: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8005898: 4b92 ldr r3, [pc, #584] @ (8005ae4 ) 800589a: 6a5b ldr r3, [r3, #36] @ 0x24 800589c: f003 0302 and.w r3, r3, #2 80058a0: 2b00 cmp r3, #0 80058a2: d1e9 bne.n 8005878 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 80058a4: 687b ldr r3, [r7, #4] 80058a6: 681b ldr r3, [r3, #0] 80058a8: f003 0304 and.w r3, r3, #4 80058ac: 2b00 cmp r3, #0 80058ae: f000 80a6 beq.w 80059fe { FlagStatus pwrclkchanged = RESET; 80058b2: 2300 movs r3, #0 80058b4: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 80058b6: 4b8b ldr r3, [pc, #556] @ (8005ae4 ) 80058b8: 69db ldr r3, [r3, #28] 80058ba: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80058be: 2b00 cmp r3, #0 80058c0: d10d bne.n 80058de { __HAL_RCC_PWR_CLK_ENABLE(); 80058c2: 4b88 ldr r3, [pc, #544] @ (8005ae4 ) 80058c4: 69db ldr r3, [r3, #28] 80058c6: 4a87 ldr r2, [pc, #540] @ (8005ae4 ) 80058c8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80058cc: 61d3 str r3, [r2, #28] 80058ce: 4b85 ldr r3, [pc, #532] @ (8005ae4 ) 80058d0: 69db ldr r3, [r3, #28] 80058d2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80058d6: 60bb str r3, [r7, #8] 80058d8: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 80058da: 2301 movs r3, #1 80058dc: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80058de: 4b82 ldr r3, [pc, #520] @ (8005ae8 ) 80058e0: 681b ldr r3, [r3, #0] 80058e2: f403 7380 and.w r3, r3, #256 @ 0x100 80058e6: 2b00 cmp r3, #0 80058e8: d118 bne.n 800591c { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80058ea: 4b7f ldr r3, [pc, #508] @ (8005ae8 ) 80058ec: 681b ldr r3, [r3, #0] 80058ee: 4a7e ldr r2, [pc, #504] @ (8005ae8 ) 80058f0: f443 7380 orr.w r3, r3, #256 @ 0x100 80058f4: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80058f6: f7fc fe8f bl 8002618 80058fa: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80058fc: e008 b.n 8005910 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80058fe: f7fc fe8b bl 8002618 8005902: 4602 mov r2, r0 8005904: 693b ldr r3, [r7, #16] 8005906: 1ad3 subs r3, r2, r3 8005908: 2b64 cmp r3, #100 @ 0x64 800590a: d901 bls.n 8005910 { return HAL_TIMEOUT; 800590c: 2303 movs r3, #3 800590e: e103 b.n 8005b18 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005910: 4b75 ldr r3, [pc, #468] @ (8005ae8 ) 8005912: 681b ldr r3, [r3, #0] 8005914: f403 7380 and.w r3, r3, #256 @ 0x100 8005918: 2b00 cmp r3, #0 800591a: d0f0 beq.n 80058fe } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 800591c: 687b ldr r3, [r7, #4] 800591e: 68db ldr r3, [r3, #12] 8005920: 2b01 cmp r3, #1 8005922: d106 bne.n 8005932 8005924: 4b6f ldr r3, [pc, #444] @ (8005ae4 ) 8005926: 6a1b ldr r3, [r3, #32] 8005928: 4a6e ldr r2, [pc, #440] @ (8005ae4 ) 800592a: f043 0301 orr.w r3, r3, #1 800592e: 6213 str r3, [r2, #32] 8005930: e02d b.n 800598e 8005932: 687b ldr r3, [r7, #4] 8005934: 68db ldr r3, [r3, #12] 8005936: 2b00 cmp r3, #0 8005938: d10c bne.n 8005954 800593a: 4b6a ldr r3, [pc, #424] @ (8005ae4 ) 800593c: 6a1b ldr r3, [r3, #32] 800593e: 4a69 ldr r2, [pc, #420] @ (8005ae4 ) 8005940: f023 0301 bic.w r3, r3, #1 8005944: 6213 str r3, [r2, #32] 8005946: 4b67 ldr r3, [pc, #412] @ (8005ae4 ) 8005948: 6a1b ldr r3, [r3, #32] 800594a: 4a66 ldr r2, [pc, #408] @ (8005ae4 ) 800594c: f023 0304 bic.w r3, r3, #4 8005950: 6213 str r3, [r2, #32] 8005952: e01c b.n 800598e 8005954: 687b ldr r3, [r7, #4] 8005956: 68db ldr r3, [r3, #12] 8005958: 2b05 cmp r3, #5 800595a: d10c bne.n 8005976 800595c: 4b61 ldr r3, [pc, #388] @ (8005ae4 ) 800595e: 6a1b ldr r3, [r3, #32] 8005960: 4a60 ldr r2, [pc, #384] @ (8005ae4 ) 8005962: f043 0304 orr.w r3, r3, #4 8005966: 6213 str r3, [r2, #32] 8005968: 4b5e ldr r3, [pc, #376] @ (8005ae4 ) 800596a: 6a1b ldr r3, [r3, #32] 800596c: 4a5d ldr r2, [pc, #372] @ (8005ae4 ) 800596e: f043 0301 orr.w r3, r3, #1 8005972: 6213 str r3, [r2, #32] 8005974: e00b b.n 800598e 8005976: 4b5b ldr r3, [pc, #364] @ (8005ae4 ) 8005978: 6a1b ldr r3, [r3, #32] 800597a: 4a5a ldr r2, [pc, #360] @ (8005ae4 ) 800597c: f023 0301 bic.w r3, r3, #1 8005980: 6213 str r3, [r2, #32] 8005982: 4b58 ldr r3, [pc, #352] @ (8005ae4 ) 8005984: 6a1b ldr r3, [r3, #32] 8005986: 4a57 ldr r2, [pc, #348] @ (8005ae4 ) 8005988: f023 0304 bic.w r3, r3, #4 800598c: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 800598e: 687b ldr r3, [r7, #4] 8005990: 68db ldr r3, [r3, #12] 8005992: 2b00 cmp r3, #0 8005994: d015 beq.n 80059c2 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8005996: f7fc fe3f bl 8002618 800599a: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 800599c: e00a b.n 80059b4 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 800599e: f7fc fe3b bl 8002618 80059a2: 4602 mov r2, r0 80059a4: 693b ldr r3, [r7, #16] 80059a6: 1ad3 subs r3, r2, r3 80059a8: f241 3288 movw r2, #5000 @ 0x1388 80059ac: 4293 cmp r3, r2 80059ae: d901 bls.n 80059b4 { return HAL_TIMEOUT; 80059b0: 2303 movs r3, #3 80059b2: e0b1 b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80059b4: 4b4b ldr r3, [pc, #300] @ (8005ae4 ) 80059b6: 6a1b ldr r3, [r3, #32] 80059b8: f003 0302 and.w r3, r3, #2 80059bc: 2b00 cmp r3, #0 80059be: d0ee beq.n 800599e 80059c0: e014 b.n 80059ec } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80059c2: f7fc fe29 bl 8002618 80059c6: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80059c8: e00a b.n 80059e0 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80059ca: f7fc fe25 bl 8002618 80059ce: 4602 mov r2, r0 80059d0: 693b ldr r3, [r7, #16] 80059d2: 1ad3 subs r3, r2, r3 80059d4: f241 3288 movw r2, #5000 @ 0x1388 80059d8: 4293 cmp r3, r2 80059da: d901 bls.n 80059e0 { return HAL_TIMEOUT; 80059dc: 2303 movs r3, #3 80059de: e09b b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80059e0: 4b40 ldr r3, [pc, #256] @ (8005ae4 ) 80059e2: 6a1b ldr r3, [r3, #32] 80059e4: f003 0302 and.w r3, r3, #2 80059e8: 2b00 cmp r3, #0 80059ea: d1ee bne.n 80059ca } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 80059ec: 7dfb ldrb r3, [r7, #23] 80059ee: 2b01 cmp r3, #1 80059f0: d105 bne.n 80059fe { __HAL_RCC_PWR_CLK_DISABLE(); 80059f2: 4b3c ldr r3, [pc, #240] @ (8005ae4 ) 80059f4: 69db ldr r3, [r3, #28] 80059f6: 4a3b ldr r2, [pc, #236] @ (8005ae4 ) 80059f8: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80059fc: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80059fe: 687b ldr r3, [r7, #4] 8005a00: 69db ldr r3, [r3, #28] 8005a02: 2b00 cmp r3, #0 8005a04: f000 8087 beq.w 8005b16 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8005a08: 4b36 ldr r3, [pc, #216] @ (8005ae4 ) 8005a0a: 685b ldr r3, [r3, #4] 8005a0c: f003 030c and.w r3, r3, #12 8005a10: 2b08 cmp r3, #8 8005a12: d061 beq.n 8005ad8 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8005a14: 687b ldr r3, [r7, #4] 8005a16: 69db ldr r3, [r3, #28] 8005a18: 2b02 cmp r3, #2 8005a1a: d146 bne.n 8005aaa /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8005a1c: 4b33 ldr r3, [pc, #204] @ (8005aec ) 8005a1e: 2200 movs r2, #0 8005a20: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005a22: f7fc fdf9 bl 8002618 8005a26: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8005a28: e008 b.n 8005a3c { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8005a2a: f7fc fdf5 bl 8002618 8005a2e: 4602 mov r2, r0 8005a30: 693b ldr r3, [r7, #16] 8005a32: 1ad3 subs r3, r2, r3 8005a34: 2b02 cmp r3, #2 8005a36: d901 bls.n 8005a3c { return HAL_TIMEOUT; 8005a38: 2303 movs r3, #3 8005a3a: e06d b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8005a3c: 4b29 ldr r3, [pc, #164] @ (8005ae4 ) 8005a3e: 681b ldr r3, [r3, #0] 8005a40: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8005a44: 2b00 cmp r3, #0 8005a46: d1f0 bne.n 8005a2a } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) 8005a48: 687b ldr r3, [r7, #4] 8005a4a: 6a1b ldr r3, [r3, #32] 8005a4c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8005a50: d108 bne.n 8005a64 /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); 8005a52: 4b24 ldr r3, [pc, #144] @ (8005ae4 ) 8005a54: 685b ldr r3, [r3, #4] 8005a56: f423 3200 bic.w r2, r3, #131072 @ 0x20000 8005a5a: 687b ldr r3, [r7, #4] 8005a5c: 689b ldr r3, [r3, #8] 8005a5e: 4921 ldr r1, [pc, #132] @ (8005ae4 ) 8005a60: 4313 orrs r3, r2 8005a62: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8005a64: 4b1f ldr r3, [pc, #124] @ (8005ae4 ) 8005a66: 685b ldr r3, [r3, #4] 8005a68: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 8005a6c: 687b ldr r3, [r7, #4] 8005a6e: 6a19 ldr r1, [r3, #32] 8005a70: 687b ldr r3, [r7, #4] 8005a72: 6a5b ldr r3, [r3, #36] @ 0x24 8005a74: 430b orrs r3, r1 8005a76: 491b ldr r1, [pc, #108] @ (8005ae4 ) 8005a78: 4313 orrs r3, r2 8005a7a: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8005a7c: 4b1b ldr r3, [pc, #108] @ (8005aec ) 8005a7e: 2201 movs r2, #1 8005a80: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005a82: f7fc fdc9 bl 8002618 8005a86: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8005a88: e008 b.n 8005a9c { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8005a8a: f7fc fdc5 bl 8002618 8005a8e: 4602 mov r2, r0 8005a90: 693b ldr r3, [r7, #16] 8005a92: 1ad3 subs r3, r2, r3 8005a94: 2b02 cmp r3, #2 8005a96: d901 bls.n 8005a9c { return HAL_TIMEOUT; 8005a98: 2303 movs r3, #3 8005a9a: e03d b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8005a9c: 4b11 ldr r3, [pc, #68] @ (8005ae4 ) 8005a9e: 681b ldr r3, [r3, #0] 8005aa0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8005aa4: 2b00 cmp r3, #0 8005aa6: d0f0 beq.n 8005a8a 8005aa8: e035 b.n 8005b16 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8005aaa: 4b10 ldr r3, [pc, #64] @ (8005aec ) 8005aac: 2200 movs r2, #0 8005aae: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005ab0: f7fc fdb2 bl 8002618 8005ab4: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8005ab6: e008 b.n 8005aca { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8005ab8: f7fc fdae bl 8002618 8005abc: 4602 mov r2, r0 8005abe: 693b ldr r3, [r7, #16] 8005ac0: 1ad3 subs r3, r2, r3 8005ac2: 2b02 cmp r3, #2 8005ac4: d901 bls.n 8005aca { return HAL_TIMEOUT; 8005ac6: 2303 movs r3, #3 8005ac8: e026 b.n 8005b18 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8005aca: 4b06 ldr r3, [pc, #24] @ (8005ae4 ) 8005acc: 681b ldr r3, [r3, #0] 8005ace: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8005ad2: 2b00 cmp r3, #0 8005ad4: d1f0 bne.n 8005ab8 8005ad6: e01e b.n 8005b16 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8005ad8: 687b ldr r3, [r7, #4] 8005ada: 69db ldr r3, [r3, #28] 8005adc: 2b01 cmp r3, #1 8005ade: d107 bne.n 8005af0 { return HAL_ERROR; 8005ae0: 2301 movs r3, #1 8005ae2: e019 b.n 8005b18 8005ae4: 40021000 .word 0x40021000 8005ae8: 40007000 .word 0x40007000 8005aec: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; 8005af0: 4b0b ldr r3, [pc, #44] @ (8005b20 ) 8005af2: 685b ldr r3, [r3, #4] 8005af4: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8005af6: 68fb ldr r3, [r7, #12] 8005af8: f403 3280 and.w r2, r3, #65536 @ 0x10000 8005afc: 687b ldr r3, [r7, #4] 8005afe: 6a1b ldr r3, [r3, #32] 8005b00: 429a cmp r2, r3 8005b02: d106 bne.n 8005b12 (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) 8005b04: 68fb ldr r3, [r7, #12] 8005b06: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 8005b0a: 687b ldr r3, [r7, #4] 8005b0c: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8005b0e: 429a cmp r2, r3 8005b10: d001 beq.n 8005b16 { return HAL_ERROR; 8005b12: 2301 movs r3, #1 8005b14: e000 b.n 8005b18 } } } } return HAL_OK; 8005b16: 2300 movs r3, #0 } 8005b18: 4618 mov r0, r3 8005b1a: 3718 adds r7, #24 8005b1c: 46bd mov sp, r7 8005b1e: bd80 pop {r7, pc} 8005b20: 40021000 .word 0x40021000 08005b24 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8005b24: b580 push {r7, lr} 8005b26: b084 sub sp, #16 8005b28: af00 add r7, sp, #0 8005b2a: 6078 str r0, [r7, #4] 8005b2c: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8005b2e: 687b ldr r3, [r7, #4] 8005b30: 2b00 cmp r3, #0 8005b32: d101 bne.n 8005b38 { return HAL_ERROR; 8005b34: 2301 movs r3, #1 8005b36: e0d0 b.n 8005cda must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8005b38: 4b6a ldr r3, [pc, #424] @ (8005ce4 ) 8005b3a: 681b ldr r3, [r3, #0] 8005b3c: f003 0307 and.w r3, r3, #7 8005b40: 683a ldr r2, [r7, #0] 8005b42: 429a cmp r2, r3 8005b44: d910 bls.n 8005b68 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8005b46: 4b67 ldr r3, [pc, #412] @ (8005ce4 ) 8005b48: 681b ldr r3, [r3, #0] 8005b4a: f023 0207 bic.w r2, r3, #7 8005b4e: 4965 ldr r1, [pc, #404] @ (8005ce4 ) 8005b50: 683b ldr r3, [r7, #0] 8005b52: 4313 orrs r3, r2 8005b54: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8005b56: 4b63 ldr r3, [pc, #396] @ (8005ce4 ) 8005b58: 681b ldr r3, [r3, #0] 8005b5a: f003 0307 and.w r3, r3, #7 8005b5e: 683a ldr r2, [r7, #0] 8005b60: 429a cmp r2, r3 8005b62: d001 beq.n 8005b68 { return HAL_ERROR; 8005b64: 2301 movs r3, #1 8005b66: e0b8 b.n 8005cda } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8005b68: 687b ldr r3, [r7, #4] 8005b6a: 681b ldr r3, [r3, #0] 8005b6c: f003 0302 and.w r3, r3, #2 8005b70: 2b00 cmp r3, #0 8005b72: d020 beq.n 8005bb6 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8005b74: 687b ldr r3, [r7, #4] 8005b76: 681b ldr r3, [r3, #0] 8005b78: f003 0304 and.w r3, r3, #4 8005b7c: 2b00 cmp r3, #0 8005b7e: d005 beq.n 8005b8c { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8005b80: 4b59 ldr r3, [pc, #356] @ (8005ce8 ) 8005b82: 685b ldr r3, [r3, #4] 8005b84: 4a58 ldr r2, [pc, #352] @ (8005ce8 ) 8005b86: f443 63e0 orr.w r3, r3, #1792 @ 0x700 8005b8a: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8005b8c: 687b ldr r3, [r7, #4] 8005b8e: 681b ldr r3, [r3, #0] 8005b90: f003 0308 and.w r3, r3, #8 8005b94: 2b00 cmp r3, #0 8005b96: d005 beq.n 8005ba4 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8005b98: 4b53 ldr r3, [pc, #332] @ (8005ce8 ) 8005b9a: 685b ldr r3, [r3, #4] 8005b9c: 4a52 ldr r2, [pc, #328] @ (8005ce8 ) 8005b9e: f443 5360 orr.w r3, r3, #14336 @ 0x3800 8005ba2: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8005ba4: 4b50 ldr r3, [pc, #320] @ (8005ce8 ) 8005ba6: 685b ldr r3, [r3, #4] 8005ba8: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8005bac: 687b ldr r3, [r7, #4] 8005bae: 689b ldr r3, [r3, #8] 8005bb0: 494d ldr r1, [pc, #308] @ (8005ce8 ) 8005bb2: 4313 orrs r3, r2 8005bb4: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8005bb6: 687b ldr r3, [r7, #4] 8005bb8: 681b ldr r3, [r3, #0] 8005bba: f003 0301 and.w r3, r3, #1 8005bbe: 2b00 cmp r3, #0 8005bc0: d040 beq.n 8005c44 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8005bc2: 687b ldr r3, [r7, #4] 8005bc4: 685b ldr r3, [r3, #4] 8005bc6: 2b01 cmp r3, #1 8005bc8: d107 bne.n 8005bda { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8005bca: 4b47 ldr r3, [pc, #284] @ (8005ce8 ) 8005bcc: 681b ldr r3, [r3, #0] 8005bce: f403 3300 and.w r3, r3, #131072 @ 0x20000 8005bd2: 2b00 cmp r3, #0 8005bd4: d115 bne.n 8005c02 { return HAL_ERROR; 8005bd6: 2301 movs r3, #1 8005bd8: e07f b.n 8005cda } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8005bda: 687b ldr r3, [r7, #4] 8005bdc: 685b ldr r3, [r3, #4] 8005bde: 2b02 cmp r3, #2 8005be0: d107 bne.n 8005bf2 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8005be2: 4b41 ldr r3, [pc, #260] @ (8005ce8 ) 8005be4: 681b ldr r3, [r3, #0] 8005be6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8005bea: 2b00 cmp r3, #0 8005bec: d109 bne.n 8005c02 { return HAL_ERROR; 8005bee: 2301 movs r3, #1 8005bf0: e073 b.n 8005cda } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8005bf2: 4b3d ldr r3, [pc, #244] @ (8005ce8 ) 8005bf4: 681b ldr r3, [r3, #0] 8005bf6: f003 0302 and.w r3, r3, #2 8005bfa: 2b00 cmp r3, #0 8005bfc: d101 bne.n 8005c02 { return HAL_ERROR; 8005bfe: 2301 movs r3, #1 8005c00: e06b b.n 8005cda } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8005c02: 4b39 ldr r3, [pc, #228] @ (8005ce8 ) 8005c04: 685b ldr r3, [r3, #4] 8005c06: f023 0203 bic.w r2, r3, #3 8005c0a: 687b ldr r3, [r7, #4] 8005c0c: 685b ldr r3, [r3, #4] 8005c0e: 4936 ldr r1, [pc, #216] @ (8005ce8 ) 8005c10: 4313 orrs r3, r2 8005c12: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); 8005c14: f7fc fd00 bl 8002618 8005c18: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8005c1a: e00a b.n 8005c32 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8005c1c: f7fc fcfc bl 8002618 8005c20: 4602 mov r2, r0 8005c22: 68fb ldr r3, [r7, #12] 8005c24: 1ad3 subs r3, r2, r3 8005c26: f241 3288 movw r2, #5000 @ 0x1388 8005c2a: 4293 cmp r3, r2 8005c2c: d901 bls.n 8005c32 { return HAL_TIMEOUT; 8005c2e: 2303 movs r3, #3 8005c30: e053 b.n 8005cda while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8005c32: 4b2d ldr r3, [pc, #180] @ (8005ce8 ) 8005c34: 685b ldr r3, [r3, #4] 8005c36: f003 020c and.w r2, r3, #12 8005c3a: 687b ldr r3, [r7, #4] 8005c3c: 685b ldr r3, [r3, #4] 8005c3e: 009b lsls r3, r3, #2 8005c40: 429a cmp r2, r3 8005c42: d1eb bne.n 8005c1c } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8005c44: 4b27 ldr r3, [pc, #156] @ (8005ce4 ) 8005c46: 681b ldr r3, [r3, #0] 8005c48: f003 0307 and.w r3, r3, #7 8005c4c: 683a ldr r2, [r7, #0] 8005c4e: 429a cmp r2, r3 8005c50: d210 bcs.n 8005c74 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8005c52: 4b24 ldr r3, [pc, #144] @ (8005ce4 ) 8005c54: 681b ldr r3, [r3, #0] 8005c56: f023 0207 bic.w r2, r3, #7 8005c5a: 4922 ldr r1, [pc, #136] @ (8005ce4 ) 8005c5c: 683b ldr r3, [r7, #0] 8005c5e: 4313 orrs r3, r2 8005c60: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8005c62: 4b20 ldr r3, [pc, #128] @ (8005ce4 ) 8005c64: 681b ldr r3, [r3, #0] 8005c66: f003 0307 and.w r3, r3, #7 8005c6a: 683a ldr r2, [r7, #0] 8005c6c: 429a cmp r2, r3 8005c6e: d001 beq.n 8005c74 { return HAL_ERROR; 8005c70: 2301 movs r3, #1 8005c72: e032 b.n 8005cda } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8005c74: 687b ldr r3, [r7, #4] 8005c76: 681b ldr r3, [r3, #0] 8005c78: f003 0304 and.w r3, r3, #4 8005c7c: 2b00 cmp r3, #0 8005c7e: d008 beq.n 8005c92 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8005c80: 4b19 ldr r3, [pc, #100] @ (8005ce8 ) 8005c82: 685b ldr r3, [r3, #4] 8005c84: f423 62e0 bic.w r2, r3, #1792 @ 0x700 8005c88: 687b ldr r3, [r7, #4] 8005c8a: 68db ldr r3, [r3, #12] 8005c8c: 4916 ldr r1, [pc, #88] @ (8005ce8 ) 8005c8e: 4313 orrs r3, r2 8005c90: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8005c92: 687b ldr r3, [r7, #4] 8005c94: 681b ldr r3, [r3, #0] 8005c96: f003 0308 and.w r3, r3, #8 8005c9a: 2b00 cmp r3, #0 8005c9c: d009 beq.n 8005cb2 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 8005c9e: 4b12 ldr r3, [pc, #72] @ (8005ce8 ) 8005ca0: 685b ldr r3, [r3, #4] 8005ca2: f423 5260 bic.w r2, r3, #14336 @ 0x3800 8005ca6: 687b ldr r3, [r7, #4] 8005ca8: 691b ldr r3, [r3, #16] 8005caa: 00db lsls r3, r3, #3 8005cac: 490e ldr r1, [pc, #56] @ (8005ce8 ) 8005cae: 4313 orrs r3, r2 8005cb0: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 8005cb2: f000 f821 bl 8005cf8 8005cb6: 4602 mov r2, r0 8005cb8: 4b0b ldr r3, [pc, #44] @ (8005ce8 ) 8005cba: 685b ldr r3, [r3, #4] 8005cbc: 091b lsrs r3, r3, #4 8005cbe: f003 030f and.w r3, r3, #15 8005cc2: 490a ldr r1, [pc, #40] @ (8005cec ) 8005cc4: 5ccb ldrb r3, [r1, r3] 8005cc6: fa22 f303 lsr.w r3, r2, r3 8005cca: 4a09 ldr r2, [pc, #36] @ (8005cf0 ) 8005ccc: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 8005cce: 4b09 ldr r3, [pc, #36] @ (8005cf4 ) 8005cd0: 681b ldr r3, [r3, #0] 8005cd2: 4618 mov r0, r3 8005cd4: f7fc fc5e bl 8002594 return HAL_OK; 8005cd8: 2300 movs r3, #0 } 8005cda: 4618 mov r0, r3 8005cdc: 3710 adds r7, #16 8005cde: 46bd mov sp, r7 8005ce0: bd80 pop {r7, pc} 8005ce2: bf00 nop 8005ce4: 40022000 .word 0x40022000 8005ce8: 40021000 .word 0x40021000 8005cec: 0800c284 .word 0x0800c284 8005cf0: 20000004 .word 0x20000004 8005cf4: 20000008 .word 0x20000008 08005cf8 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8005cf8: b480 push {r7} 8005cfa: b087 sub sp, #28 8005cfc: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; 8005cfe: 2300 movs r3, #0 8005d00: 60fb str r3, [r7, #12] 8005d02: 2300 movs r3, #0 8005d04: 60bb str r3, [r7, #8] 8005d06: 2300 movs r3, #0 8005d08: 617b str r3, [r7, #20] 8005d0a: 2300 movs r3, #0 8005d0c: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; 8005d0e: 2300 movs r3, #0 8005d10: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; 8005d12: 4b1e ldr r3, [pc, #120] @ (8005d8c ) 8005d14: 685b ldr r3, [r3, #4] 8005d16: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) 8005d18: 68fb ldr r3, [r7, #12] 8005d1a: f003 030c and.w r3, r3, #12 8005d1e: 2b04 cmp r3, #4 8005d20: d002 beq.n 8005d28 8005d22: 2b08 cmp r3, #8 8005d24: d003 beq.n 8005d2e 8005d26: e027 b.n 8005d78 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; 8005d28: 4b19 ldr r3, [pc, #100] @ (8005d90 ) 8005d2a: 613b str r3, [r7, #16] break; 8005d2c: e027 b.n 8005d7e } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; 8005d2e: 68fb ldr r3, [r7, #12] 8005d30: 0c9b lsrs r3, r3, #18 8005d32: f003 030f and.w r3, r3, #15 8005d36: 4a17 ldr r2, [pc, #92] @ (8005d94 ) 8005d38: 5cd3 ldrb r3, [r2, r3] 8005d3a: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 8005d3c: 68fb ldr r3, [r7, #12] 8005d3e: f403 3380 and.w r3, r3, #65536 @ 0x10000 8005d42: 2b00 cmp r3, #0 8005d44: d010 beq.n 8005d68 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; 8005d46: 4b11 ldr r3, [pc, #68] @ (8005d8c ) 8005d48: 685b ldr r3, [r3, #4] 8005d4a: 0c5b lsrs r3, r3, #17 8005d4c: f003 0301 and.w r3, r3, #1 8005d50: 4a11 ldr r2, [pc, #68] @ (8005d98 ) 8005d52: 5cd3 ldrb r3, [r2, r3] 8005d54: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); 8005d56: 687b ldr r3, [r7, #4] 8005d58: 4a0d ldr r2, [pc, #52] @ (8005d90 ) 8005d5a: fb03 f202 mul.w r2, r3, r2 8005d5e: 68bb ldr r3, [r7, #8] 8005d60: fbb2 f3f3 udiv r3, r2, r3 8005d64: 617b str r3, [r7, #20] 8005d66: e004 b.n 8005d72 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 8005d68: 687b ldr r3, [r7, #4] 8005d6a: 4a0c ldr r2, [pc, #48] @ (8005d9c ) 8005d6c: fb02 f303 mul.w r3, r2, r3 8005d70: 617b str r3, [r7, #20] } sysclockfreq = pllclk; 8005d72: 697b ldr r3, [r7, #20] 8005d74: 613b str r3, [r7, #16] break; 8005d76: e002 b.n 8005d7e } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; 8005d78: 4b09 ldr r3, [pc, #36] @ (8005da0 ) 8005d7a: 613b str r3, [r7, #16] break; 8005d7c: bf00 nop } } return sysclockfreq; 8005d7e: 693b ldr r3, [r7, #16] } 8005d80: 4618 mov r0, r3 8005d82: 371c adds r7, #28 8005d84: 46bd mov sp, r7 8005d86: bc80 pop {r7} 8005d88: 4770 bx lr 8005d8a: bf00 nop 8005d8c: 40021000 .word 0x40021000 8005d90: 00b71b00 .word 0x00b71b00 8005d94: 0800c29c .word 0x0800c29c 8005d98: 0800c2ac .word 0x0800c2ac 8005d9c: 003d0900 .word 0x003d0900 8005da0: 007a1200 .word 0x007a1200 08005da4 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 8005da4: b480 push {r7} 8005da6: af00 add r7, sp, #0 return SystemCoreClock; 8005da8: 4b02 ldr r3, [pc, #8] @ (8005db4 ) 8005daa: 681b ldr r3, [r3, #0] } 8005dac: 4618 mov r0, r3 8005dae: 46bd mov sp, r7 8005db0: bc80 pop {r7} 8005db2: 4770 bx lr 8005db4: 20000004 .word 0x20000004 08005db8 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8005db8: b580 push {r7, lr} 8005dba: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8005dbc: f7ff fff2 bl 8005da4 8005dc0: 4602 mov r2, r0 8005dc2: 4b05 ldr r3, [pc, #20] @ (8005dd8 ) 8005dc4: 685b ldr r3, [r3, #4] 8005dc6: 0a1b lsrs r3, r3, #8 8005dc8: f003 0307 and.w r3, r3, #7 8005dcc: 4903 ldr r1, [pc, #12] @ (8005ddc ) 8005dce: 5ccb ldrb r3, [r1, r3] 8005dd0: fa22 f303 lsr.w r3, r2, r3 } 8005dd4: 4618 mov r0, r3 8005dd6: bd80 pop {r7, pc} 8005dd8: 40021000 .word 0x40021000 8005ddc: 0800c294 .word 0x0800c294 08005de0 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 8005de0: b580 push {r7, lr} 8005de2: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8005de4: f7ff ffde bl 8005da4 8005de8: 4602 mov r2, r0 8005dea: 4b05 ldr r3, [pc, #20] @ (8005e00 ) 8005dec: 685b ldr r3, [r3, #4] 8005dee: 0adb lsrs r3, r3, #11 8005df0: f003 0307 and.w r3, r3, #7 8005df4: 4903 ldr r1, [pc, #12] @ (8005e04 ) 8005df6: 5ccb ldrb r3, [r1, r3] 8005df8: fa22 f303 lsr.w r3, r2, r3 } 8005dfc: 4618 mov r0, r3 8005dfe: bd80 pop {r7, pc} 8005e00: 40021000 .word 0x40021000 8005e04: 0800c294 .word 0x0800c294 08005e08 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { 8005e08: b480 push {r7} 8005e0a: b085 sub sp, #20 8005e0c: af00 add r7, sp, #0 8005e0e: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); 8005e10: 4b0a ldr r3, [pc, #40] @ (8005e3c ) 8005e12: 681b ldr r3, [r3, #0] 8005e14: 4a0a ldr r2, [pc, #40] @ (8005e40 ) 8005e16: fba2 2303 umull r2, r3, r2, r3 8005e1a: 0a5b lsrs r3, r3, #9 8005e1c: 687a ldr r2, [r7, #4] 8005e1e: fb02 f303 mul.w r3, r2, r3 8005e22: 60fb str r3, [r7, #12] do { __NOP(); 8005e24: bf00 nop } while (Delay --); 8005e26: 68fb ldr r3, [r7, #12] 8005e28: 1e5a subs r2, r3, #1 8005e2a: 60fa str r2, [r7, #12] 8005e2c: 2b00 cmp r3, #0 8005e2e: d1f9 bne.n 8005e24 } 8005e30: bf00 nop 8005e32: bf00 nop 8005e34: 3714 adds r7, #20 8005e36: 46bd mov sp, r7 8005e38: bc80 pop {r7} 8005e3a: 4770 bx lr 8005e3c: 20000004 .word 0x20000004 8005e40: 10624dd3 .word 0x10624dd3 08005e44 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 8005e44: b580 push {r7, lr} 8005e46: b086 sub sp, #24 8005e48: af00 add r7, sp, #0 8005e4a: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; 8005e4c: 2300 movs r3, #0 8005e4e: 613b str r3, [r7, #16] 8005e50: 2300 movs r3, #0 8005e52: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 8005e54: 687b ldr r3, [r7, #4] 8005e56: 681b ldr r3, [r3, #0] 8005e58: f003 0301 and.w r3, r3, #1 8005e5c: 2b00 cmp r3, #0 8005e5e: d07d beq.n 8005f5c { FlagStatus pwrclkchanged = RESET; 8005e60: 2300 movs r3, #0 8005e62: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8005e64: 4b4f ldr r3, [pc, #316] @ (8005fa4 ) 8005e66: 69db ldr r3, [r3, #28] 8005e68: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8005e6c: 2b00 cmp r3, #0 8005e6e: d10d bne.n 8005e8c { __HAL_RCC_PWR_CLK_ENABLE(); 8005e70: 4b4c ldr r3, [pc, #304] @ (8005fa4 ) 8005e72: 69db ldr r3, [r3, #28] 8005e74: 4a4b ldr r2, [pc, #300] @ (8005fa4 ) 8005e76: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005e7a: 61d3 str r3, [r2, #28] 8005e7c: 4b49 ldr r3, [pc, #292] @ (8005fa4 ) 8005e7e: 69db ldr r3, [r3, #28] 8005e80: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8005e84: 60bb str r3, [r7, #8] 8005e86: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8005e88: 2301 movs r3, #1 8005e8a: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005e8c: 4b46 ldr r3, [pc, #280] @ (8005fa8 ) 8005e8e: 681b ldr r3, [r3, #0] 8005e90: f403 7380 and.w r3, r3, #256 @ 0x100 8005e94: 2b00 cmp r3, #0 8005e96: d118 bne.n 8005eca { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8005e98: 4b43 ldr r3, [pc, #268] @ (8005fa8 ) 8005e9a: 681b ldr r3, [r3, #0] 8005e9c: 4a42 ldr r2, [pc, #264] @ (8005fa8 ) 8005e9e: f443 7380 orr.w r3, r3, #256 @ 0x100 8005ea2: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8005ea4: f7fc fbb8 bl 8002618 8005ea8: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005eaa: e008 b.n 8005ebe { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8005eac: f7fc fbb4 bl 8002618 8005eb0: 4602 mov r2, r0 8005eb2: 693b ldr r3, [r7, #16] 8005eb4: 1ad3 subs r3, r2, r3 8005eb6: 2b64 cmp r3, #100 @ 0x64 8005eb8: d901 bls.n 8005ebe { return HAL_TIMEOUT; 8005eba: 2303 movs r3, #3 8005ebc: e06d b.n 8005f9a while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8005ebe: 4b3a ldr r3, [pc, #232] @ (8005fa8 ) 8005ec0: 681b ldr r3, [r3, #0] 8005ec2: f403 7380 and.w r3, r3, #256 @ 0x100 8005ec6: 2b00 cmp r3, #0 8005ec8: d0f0 beq.n 8005eac } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 8005eca: 4b36 ldr r3, [pc, #216] @ (8005fa4 ) 8005ecc: 6a1b ldr r3, [r3, #32] 8005ece: f403 7340 and.w r3, r3, #768 @ 0x300 8005ed2: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8005ed4: 68fb ldr r3, [r7, #12] 8005ed6: 2b00 cmp r3, #0 8005ed8: d02e beq.n 8005f38 8005eda: 687b ldr r3, [r7, #4] 8005edc: 685b ldr r3, [r3, #4] 8005ede: f403 7340 and.w r3, r3, #768 @ 0x300 8005ee2: 68fa ldr r2, [r7, #12] 8005ee4: 429a cmp r2, r3 8005ee6: d027 beq.n 8005f38 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8005ee8: 4b2e ldr r3, [pc, #184] @ (8005fa4 ) 8005eea: 6a1b ldr r3, [r3, #32] 8005eec: f423 7340 bic.w r3, r3, #768 @ 0x300 8005ef0: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8005ef2: 4b2e ldr r3, [pc, #184] @ (8005fac ) 8005ef4: 2201 movs r2, #1 8005ef6: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8005ef8: 4b2c ldr r3, [pc, #176] @ (8005fac ) 8005efa: 2200 movs r2, #0 8005efc: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; 8005efe: 4a29 ldr r2, [pc, #164] @ (8005fa4 ) 8005f00: 68fb ldr r3, [r7, #12] 8005f02: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 8005f04: 68fb ldr r3, [r7, #12] 8005f06: f003 0301 and.w r3, r3, #1 8005f0a: 2b00 cmp r3, #0 8005f0c: d014 beq.n 8005f38 { /* Get Start Tick */ tickstart = HAL_GetTick(); 8005f0e: f7fc fb83 bl 8002618 8005f12: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8005f14: e00a b.n 8005f2c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8005f16: f7fc fb7f bl 8002618 8005f1a: 4602 mov r2, r0 8005f1c: 693b ldr r3, [r7, #16] 8005f1e: 1ad3 subs r3, r2, r3 8005f20: f241 3288 movw r2, #5000 @ 0x1388 8005f24: 4293 cmp r3, r2 8005f26: d901 bls.n 8005f2c { return HAL_TIMEOUT; 8005f28: 2303 movs r3, #3 8005f2a: e036 b.n 8005f9a while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8005f2c: 4b1d ldr r3, [pc, #116] @ (8005fa4 ) 8005f2e: 6a1b ldr r3, [r3, #32] 8005f30: f003 0302 and.w r3, r3, #2 8005f34: 2b00 cmp r3, #0 8005f36: d0ee beq.n 8005f16 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8005f38: 4b1a ldr r3, [pc, #104] @ (8005fa4 ) 8005f3a: 6a1b ldr r3, [r3, #32] 8005f3c: f423 7240 bic.w r2, r3, #768 @ 0x300 8005f40: 687b ldr r3, [r7, #4] 8005f42: 685b ldr r3, [r3, #4] 8005f44: 4917 ldr r1, [pc, #92] @ (8005fa4 ) 8005f46: 4313 orrs r3, r2 8005f48: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) 8005f4a: 7dfb ldrb r3, [r7, #23] 8005f4c: 2b01 cmp r3, #1 8005f4e: d105 bne.n 8005f5c { __HAL_RCC_PWR_CLK_DISABLE(); 8005f50: 4b14 ldr r3, [pc, #80] @ (8005fa4 ) 8005f52: 69db ldr r3, [r3, #28] 8005f54: 4a13 ldr r2, [pc, #76] @ (8005fa4 ) 8005f56: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8005f5a: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8005f5c: 687b ldr r3, [r7, #4] 8005f5e: 681b ldr r3, [r3, #0] 8005f60: f003 0302 and.w r3, r3, #2 8005f64: 2b00 cmp r3, #0 8005f66: d008 beq.n 8005f7a { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8005f68: 4b0e ldr r3, [pc, #56] @ (8005fa4 ) 8005f6a: 685b ldr r3, [r3, #4] 8005f6c: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8005f70: 687b ldr r3, [r7, #4] 8005f72: 689b ldr r3, [r3, #8] 8005f74: 490b ldr r1, [pc, #44] @ (8005fa4 ) 8005f76: 4313 orrs r3, r2 8005f78: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 8005f7a: 687b ldr r3, [r7, #4] 8005f7c: 681b ldr r3, [r3, #0] 8005f7e: f003 0310 and.w r3, r3, #16 8005f82: 2b00 cmp r3, #0 8005f84: d008 beq.n 8005f98 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 8005f86: 4b07 ldr r3, [pc, #28] @ (8005fa4 ) 8005f88: 685b ldr r3, [r3, #4] 8005f8a: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 8005f8e: 687b ldr r3, [r7, #4] 8005f90: 68db ldr r3, [r3, #12] 8005f92: 4904 ldr r1, [pc, #16] @ (8005fa4 ) 8005f94: 4313 orrs r3, r2 8005f96: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; 8005f98: 2300 movs r3, #0 } 8005f9a: 4618 mov r0, r3 8005f9c: 3718 adds r7, #24 8005f9e: 46bd mov sp, r7 8005fa0: bd80 pop {r7, pc} 8005fa2: bf00 nop 8005fa4: 40021000 .word 0x40021000 8005fa8: 40007000 .word 0x40007000 8005fac: 42420440 .word 0x42420440 08005fb0 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8005fb0: b580 push {r7, lr} 8005fb2: b082 sub sp, #8 8005fb4: af00 add r7, sp, #0 8005fb6: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8005fb8: 687b ldr r3, [r7, #4] 8005fba: 2b00 cmp r3, #0 8005fbc: d101 bne.n 8005fc2 { return HAL_ERROR; 8005fbe: 2301 movs r3, #1 8005fc0: e041 b.n 8006046 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8005fc2: 687b ldr r3, [r7, #4] 8005fc4: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8005fc8: b2db uxtb r3, r3 8005fca: 2b00 cmp r3, #0 8005fcc: d106 bne.n 8005fdc { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8005fce: 687b ldr r3, [r7, #4] 8005fd0: 2200 movs r2, #0 8005fd2: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8005fd6: 6878 ldr r0, [r7, #4] 8005fd8: f7fc f952 bl 8002280 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8005fdc: 687b ldr r3, [r7, #4] 8005fde: 2202 movs r2, #2 8005fe0: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8005fe4: 687b ldr r3, [r7, #4] 8005fe6: 681a ldr r2, [r3, #0] 8005fe8: 687b ldr r3, [r7, #4] 8005fea: 3304 adds r3, #4 8005fec: 4619 mov r1, r3 8005fee: 4610 mov r0, r2 8005ff0: f000 fb3e bl 8006670 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8005ff4: 687b ldr r3, [r7, #4] 8005ff6: 2201 movs r2, #1 8005ff8: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8005ffc: 687b ldr r3, [r7, #4] 8005ffe: 2201 movs r2, #1 8006000: f883 203e strb.w r2, [r3, #62] @ 0x3e 8006004: 687b ldr r3, [r7, #4] 8006006: 2201 movs r2, #1 8006008: f883 203f strb.w r2, [r3, #63] @ 0x3f 800600c: 687b ldr r3, [r7, #4] 800600e: 2201 movs r2, #1 8006010: f883 2040 strb.w r2, [r3, #64] @ 0x40 8006014: 687b ldr r3, [r7, #4] 8006016: 2201 movs r2, #1 8006018: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 800601c: 687b ldr r3, [r7, #4] 800601e: 2201 movs r2, #1 8006020: f883 2042 strb.w r2, [r3, #66] @ 0x42 8006024: 687b ldr r3, [r7, #4] 8006026: 2201 movs r2, #1 8006028: f883 2043 strb.w r2, [r3, #67] @ 0x43 800602c: 687b ldr r3, [r7, #4] 800602e: 2201 movs r2, #1 8006030: f883 2044 strb.w r2, [r3, #68] @ 0x44 8006034: 687b ldr r3, [r7, #4] 8006036: 2201 movs r2, #1 8006038: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 800603c: 687b ldr r3, [r7, #4] 800603e: 2201 movs r2, #1 8006040: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8006044: 2300 movs r3, #0 } 8006046: 4618 mov r0, r3 8006048: 3708 adds r7, #8 800604a: 46bd mov sp, r7 800604c: bd80 pop {r7, pc} 0800604e : * Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init() * @param htim TIM PWM handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { 800604e: b580 push {r7, lr} 8006050: b082 sub sp, #8 8006052: af00 add r7, sp, #0 8006054: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8006056: 687b ldr r3, [r7, #4] 8006058: 2b00 cmp r3, #0 800605a: d101 bne.n 8006060 { return HAL_ERROR; 800605c: 2301 movs r3, #1 800605e: e041 b.n 80060e4 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8006060: 687b ldr r3, [r7, #4] 8006062: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8006066: b2db uxtb r3, r3 8006068: 2b00 cmp r3, #0 800606a: d106 bne.n 800607a { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 800606c: 687b ldr r3, [r7, #4] 800606e: 2200 movs r2, #0 8006070: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->PWM_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_PWM_MspInit(htim); 8006074: 6878 ldr r0, [r7, #4] 8006076: f000 f839 bl 80060ec #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 800607a: 687b ldr r3, [r7, #4] 800607c: 2202 movs r2, #2 800607e: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the PWM */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8006082: 687b ldr r3, [r7, #4] 8006084: 681a ldr r2, [r3, #0] 8006086: 687b ldr r3, [r7, #4] 8006088: 3304 adds r3, #4 800608a: 4619 mov r1, r3 800608c: 4610 mov r0, r2 800608e: f000 faef bl 8006670 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8006092: 687b ldr r3, [r7, #4] 8006094: 2201 movs r2, #1 8006096: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 800609a: 687b ldr r3, [r7, #4] 800609c: 2201 movs r2, #1 800609e: f883 203e strb.w r2, [r3, #62] @ 0x3e 80060a2: 687b ldr r3, [r7, #4] 80060a4: 2201 movs r2, #1 80060a6: f883 203f strb.w r2, [r3, #63] @ 0x3f 80060aa: 687b ldr r3, [r7, #4] 80060ac: 2201 movs r2, #1 80060ae: f883 2040 strb.w r2, [r3, #64] @ 0x40 80060b2: 687b ldr r3, [r7, #4] 80060b4: 2201 movs r2, #1 80060b6: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 80060ba: 687b ldr r3, [r7, #4] 80060bc: 2201 movs r2, #1 80060be: f883 2042 strb.w r2, [r3, #66] @ 0x42 80060c2: 687b ldr r3, [r7, #4] 80060c4: 2201 movs r2, #1 80060c6: f883 2043 strb.w r2, [r3, #67] @ 0x43 80060ca: 687b ldr r3, [r7, #4] 80060cc: 2201 movs r2, #1 80060ce: f883 2044 strb.w r2, [r3, #68] @ 0x44 80060d2: 687b ldr r3, [r7, #4] 80060d4: 2201 movs r2, #1 80060d6: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 80060da: 687b ldr r3, [r7, #4] 80060dc: 2201 movs r2, #1 80060de: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 80060e2: 2300 movs r3, #0 } 80060e4: 4618 mov r0, r3 80060e6: 3708 adds r7, #8 80060e8: 46bd mov sp, r7 80060ea: bd80 pop {r7, pc} 080060ec : * @brief Initializes the TIM PWM MSP. * @param htim TIM PWM handle * @retval None */ __weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) { 80060ec: b480 push {r7} 80060ee: b083 sub sp, #12 80060f0: af00 add r7, sp, #0 80060f2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_MspInit could be implemented in the user file */ } 80060f4: bf00 nop 80060f6: 370c adds r7, #12 80060f8: 46bd mov sp, r7 80060fa: bc80 pop {r7} 80060fc: 4770 bx lr ... 08006100 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) { 8006100: b580 push {r7, lr} 8006102: b084 sub sp, #16 8006104: af00 add r7, sp, #0 8006106: 6078 str r0, [r7, #4] 8006108: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Check the TIM channel state */ if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 800610a: 683b ldr r3, [r7, #0] 800610c: 2b00 cmp r3, #0 800610e: d109 bne.n 8006124 8006110: 687b ldr r3, [r7, #4] 8006112: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8006116: b2db uxtb r3, r3 8006118: 2b01 cmp r3, #1 800611a: bf14 ite ne 800611c: 2301 movne r3, #1 800611e: 2300 moveq r3, #0 8006120: b2db uxtb r3, r3 8006122: e022 b.n 800616a 8006124: 683b ldr r3, [r7, #0] 8006126: 2b04 cmp r3, #4 8006128: d109 bne.n 800613e 800612a: 687b ldr r3, [r7, #4] 800612c: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8006130: b2db uxtb r3, r3 8006132: 2b01 cmp r3, #1 8006134: bf14 ite ne 8006136: 2301 movne r3, #1 8006138: 2300 moveq r3, #0 800613a: b2db uxtb r3, r3 800613c: e015 b.n 800616a 800613e: 683b ldr r3, [r7, #0] 8006140: 2b08 cmp r3, #8 8006142: d109 bne.n 8006158 8006144: 687b ldr r3, [r7, #4] 8006146: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 800614a: b2db uxtb r3, r3 800614c: 2b01 cmp r3, #1 800614e: bf14 ite ne 8006150: 2301 movne r3, #1 8006152: 2300 moveq r3, #0 8006154: b2db uxtb r3, r3 8006156: e008 b.n 800616a 8006158: 687b ldr r3, [r7, #4] 800615a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800615e: b2db uxtb r3, r3 8006160: 2b01 cmp r3, #1 8006162: bf14 ite ne 8006164: 2301 movne r3, #1 8006166: 2300 moveq r3, #0 8006168: b2db uxtb r3, r3 800616a: 2b00 cmp r3, #0 800616c: d001 beq.n 8006172 { return HAL_ERROR; 800616e: 2301 movs r3, #1 8006170: e05e b.n 8006230 } /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 8006172: 683b ldr r3, [r7, #0] 8006174: 2b00 cmp r3, #0 8006176: d104 bne.n 8006182 8006178: 687b ldr r3, [r7, #4] 800617a: 2202 movs r2, #2 800617c: f883 203e strb.w r2, [r3, #62] @ 0x3e 8006180: e013 b.n 80061aa 8006182: 683b ldr r3, [r7, #0] 8006184: 2b04 cmp r3, #4 8006186: d104 bne.n 8006192 8006188: 687b ldr r3, [r7, #4] 800618a: 2202 movs r2, #2 800618c: f883 203f strb.w r2, [r3, #63] @ 0x3f 8006190: e00b b.n 80061aa 8006192: 683b ldr r3, [r7, #0] 8006194: 2b08 cmp r3, #8 8006196: d104 bne.n 80061a2 8006198: 687b ldr r3, [r7, #4] 800619a: 2202 movs r2, #2 800619c: f883 2040 strb.w r2, [r3, #64] @ 0x40 80061a0: e003 b.n 80061aa 80061a2: 687b ldr r3, [r7, #4] 80061a4: 2202 movs r2, #2 80061a6: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Enable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); 80061aa: 687b ldr r3, [r7, #4] 80061ac: 681b ldr r3, [r3, #0] 80061ae: 2201 movs r2, #1 80061b0: 6839 ldr r1, [r7, #0] 80061b2: 4618 mov r0, r3 80061b4: f000 fce8 bl 8006b88 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 80061b8: 687b ldr r3, [r7, #4] 80061ba: 681b ldr r3, [r3, #0] 80061bc: 4a1e ldr r2, [pc, #120] @ (8006238 ) 80061be: 4293 cmp r3, r2 80061c0: d107 bne.n 80061d2 { /* Enable the main output */ __HAL_TIM_MOE_ENABLE(htim); 80061c2: 687b ldr r3, [r7, #4] 80061c4: 681b ldr r3, [r3, #0] 80061c6: 6c5a ldr r2, [r3, #68] @ 0x44 80061c8: 687b ldr r3, [r7, #4] 80061ca: 681b ldr r3, [r3, #0] 80061cc: f442 4200 orr.w r2, r2, #32768 @ 0x8000 80061d0: 645a str r2, [r3, #68] @ 0x44 } /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 80061d2: 687b ldr r3, [r7, #4] 80061d4: 681b ldr r3, [r3, #0] 80061d6: 4a18 ldr r2, [pc, #96] @ (8006238 ) 80061d8: 4293 cmp r3, r2 80061da: d00e beq.n 80061fa 80061dc: 687b ldr r3, [r7, #4] 80061de: 681b ldr r3, [r3, #0] 80061e0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80061e4: d009 beq.n 80061fa 80061e6: 687b ldr r3, [r7, #4] 80061e8: 681b ldr r3, [r3, #0] 80061ea: 4a14 ldr r2, [pc, #80] @ (800623c ) 80061ec: 4293 cmp r3, r2 80061ee: d004 beq.n 80061fa 80061f0: 687b ldr r3, [r7, #4] 80061f2: 681b ldr r3, [r3, #0] 80061f4: 4a12 ldr r2, [pc, #72] @ (8006240 ) 80061f6: 4293 cmp r3, r2 80061f8: d111 bne.n 800621e { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 80061fa: 687b ldr r3, [r7, #4] 80061fc: 681b ldr r3, [r3, #0] 80061fe: 689b ldr r3, [r3, #8] 8006200: f003 0307 and.w r3, r3, #7 8006204: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8006206: 68fb ldr r3, [r7, #12] 8006208: 2b06 cmp r3, #6 800620a: d010 beq.n 800622e { __HAL_TIM_ENABLE(htim); 800620c: 687b ldr r3, [r7, #4] 800620e: 681b ldr r3, [r3, #0] 8006210: 681a ldr r2, [r3, #0] 8006212: 687b ldr r3, [r7, #4] 8006214: 681b ldr r3, [r3, #0] 8006216: f042 0201 orr.w r2, r2, #1 800621a: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 800621c: e007 b.n 800622e } } else { __HAL_TIM_ENABLE(htim); 800621e: 687b ldr r3, [r7, #4] 8006220: 681b ldr r3, [r3, #0] 8006222: 681a ldr r2, [r3, #0] 8006224: 687b ldr r3, [r7, #4] 8006226: 681b ldr r3, [r3, #0] 8006228: f042 0201 orr.w r2, r2, #1 800622c: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; 800622e: 2300 movs r3, #0 } 8006230: 4618 mov r0, r3 8006232: 3710 adds r7, #16 8006234: 46bd mov sp, r7 8006236: bd80 pop {r7, pc} 8006238: 40012c00 .word 0x40012c00 800623c: 40000400 .word 0x40000400 8006240: 40000800 .word 0x40000800 08006244 : * @arg TIM_CHANNEL_3: TIM Channel 3 selected * @arg TIM_CHANNEL_4: TIM Channel 4 selected * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) { 8006244: b580 push {r7, lr} 8006246: b082 sub sp, #8 8006248: af00 add r7, sp, #0 800624a: 6078 str r0, [r7, #4] 800624c: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); /* Disable the Capture compare channel */ TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); 800624e: 687b ldr r3, [r7, #4] 8006250: 681b ldr r3, [r3, #0] 8006252: 2200 movs r2, #0 8006254: 6839 ldr r1, [r7, #0] 8006256: 4618 mov r0, r3 8006258: f000 fc96 bl 8006b88 if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 800625c: 687b ldr r3, [r7, #4] 800625e: 681b ldr r3, [r3, #0] 8006260: 4a29 ldr r2, [pc, #164] @ (8006308 ) 8006262: 4293 cmp r3, r2 8006264: d117 bne.n 8006296 { /* Disable the Main Output */ __HAL_TIM_MOE_DISABLE(htim); 8006266: 687b ldr r3, [r7, #4] 8006268: 681b ldr r3, [r3, #0] 800626a: 6a1a ldr r2, [r3, #32] 800626c: f241 1311 movw r3, #4369 @ 0x1111 8006270: 4013 ands r3, r2 8006272: 2b00 cmp r3, #0 8006274: d10f bne.n 8006296 8006276: 687b ldr r3, [r7, #4] 8006278: 681b ldr r3, [r3, #0] 800627a: 6a1a ldr r2, [r3, #32] 800627c: f240 4344 movw r3, #1092 @ 0x444 8006280: 4013 ands r3, r2 8006282: 2b00 cmp r3, #0 8006284: d107 bne.n 8006296 8006286: 687b ldr r3, [r7, #4] 8006288: 681b ldr r3, [r3, #0] 800628a: 6c5a ldr r2, [r3, #68] @ 0x44 800628c: 687b ldr r3, [r7, #4] 800628e: 681b ldr r3, [r3, #0] 8006290: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8006294: 645a str r2, [r3, #68] @ 0x44 } /* Disable the Peripheral */ __HAL_TIM_DISABLE(htim); 8006296: 687b ldr r3, [r7, #4] 8006298: 681b ldr r3, [r3, #0] 800629a: 6a1a ldr r2, [r3, #32] 800629c: f241 1311 movw r3, #4369 @ 0x1111 80062a0: 4013 ands r3, r2 80062a2: 2b00 cmp r3, #0 80062a4: d10f bne.n 80062c6 80062a6: 687b ldr r3, [r7, #4] 80062a8: 681b ldr r3, [r3, #0] 80062aa: 6a1a ldr r2, [r3, #32] 80062ac: f240 4344 movw r3, #1092 @ 0x444 80062b0: 4013 ands r3, r2 80062b2: 2b00 cmp r3, #0 80062b4: d107 bne.n 80062c6 80062b6: 687b ldr r3, [r7, #4] 80062b8: 681b ldr r3, [r3, #0] 80062ba: 681a ldr r2, [r3, #0] 80062bc: 687b ldr r3, [r7, #4] 80062be: 681b ldr r3, [r3, #0] 80062c0: f022 0201 bic.w r2, r2, #1 80062c4: 601a str r2, [r3, #0] /* Set the TIM channel state */ TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 80062c6: 683b ldr r3, [r7, #0] 80062c8: 2b00 cmp r3, #0 80062ca: d104 bne.n 80062d6 80062cc: 687b ldr r3, [r7, #4] 80062ce: 2201 movs r2, #1 80062d0: f883 203e strb.w r2, [r3, #62] @ 0x3e 80062d4: e013 b.n 80062fe 80062d6: 683b ldr r3, [r7, #0] 80062d8: 2b04 cmp r3, #4 80062da: d104 bne.n 80062e6 80062dc: 687b ldr r3, [r7, #4] 80062de: 2201 movs r2, #1 80062e0: f883 203f strb.w r2, [r3, #63] @ 0x3f 80062e4: e00b b.n 80062fe 80062e6: 683b ldr r3, [r7, #0] 80062e8: 2b08 cmp r3, #8 80062ea: d104 bne.n 80062f6 80062ec: 687b ldr r3, [r7, #4] 80062ee: 2201 movs r2, #1 80062f0: f883 2040 strb.w r2, [r3, #64] @ 0x40 80062f4: e003 b.n 80062fe 80062f6: 687b ldr r3, [r7, #4] 80062f8: 2201 movs r2, #1 80062fa: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Return function status */ return HAL_OK; 80062fe: 2300 movs r3, #0 } 8006300: 4618 mov r0, r3 8006302: 3708 adds r7, #8 8006304: 46bd mov sp, r7 8006306: bd80 pop {r7, pc} 8006308: 40012c00 .word 0x40012c00 0800630c : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 800630c: b580 push {r7, lr} 800630e: b086 sub sp, #24 8006310: af00 add r7, sp, #0 8006312: 60f8 str r0, [r7, #12] 8006314: 60b9 str r1, [r7, #8] 8006316: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8006318: 2300 movs r3, #0 800631a: 75fb strb r3, [r7, #23] assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); /* Process Locked */ __HAL_LOCK(htim); 800631c: 68fb ldr r3, [r7, #12] 800631e: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8006322: 2b01 cmp r3, #1 8006324: d101 bne.n 800632a 8006326: 2302 movs r3, #2 8006328: e0ae b.n 8006488 800632a: 68fb ldr r3, [r7, #12] 800632c: 2201 movs r2, #1 800632e: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 8006332: 687b ldr r3, [r7, #4] 8006334: 2b0c cmp r3, #12 8006336: f200 809f bhi.w 8006478 800633a: a201 add r2, pc, #4 @ (adr r2, 8006340 ) 800633c: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8006340: 08006375 .word 0x08006375 8006344: 08006479 .word 0x08006479 8006348: 08006479 .word 0x08006479 800634c: 08006479 .word 0x08006479 8006350: 080063b5 .word 0x080063b5 8006354: 08006479 .word 0x08006479 8006358: 08006479 .word 0x08006479 800635c: 08006479 .word 0x08006479 8006360: 080063f7 .word 0x080063f7 8006364: 08006479 .word 0x08006479 8006368: 08006479 .word 0x08006479 800636c: 08006479 .word 0x08006479 8006370: 08006437 .word 0x08006437 { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the Channel 1 in PWM mode */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8006374: 68fb ldr r3, [r7, #12] 8006376: 681b ldr r3, [r3, #0] 8006378: 68b9 ldr r1, [r7, #8] 800637a: 4618 mov r0, r3 800637c: f000 f9e6 bl 800674c /* Set the Preload enable bit for channel1 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; 8006380: 68fb ldr r3, [r7, #12] 8006382: 681b ldr r3, [r3, #0] 8006384: 699a ldr r2, [r3, #24] 8006386: 68fb ldr r3, [r7, #12] 8006388: 681b ldr r3, [r3, #0] 800638a: f042 0208 orr.w r2, r2, #8 800638e: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; 8006390: 68fb ldr r3, [r7, #12] 8006392: 681b ldr r3, [r3, #0] 8006394: 699a ldr r2, [r3, #24] 8006396: 68fb ldr r3, [r7, #12] 8006398: 681b ldr r3, [r3, #0] 800639a: f022 0204 bic.w r2, r2, #4 800639e: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode; 80063a0: 68fb ldr r3, [r7, #12] 80063a2: 681b ldr r3, [r3, #0] 80063a4: 6999 ldr r1, [r3, #24] 80063a6: 68bb ldr r3, [r7, #8] 80063a8: 691a ldr r2, [r3, #16] 80063aa: 68fb ldr r3, [r7, #12] 80063ac: 681b ldr r3, [r3, #0] 80063ae: 430a orrs r2, r1 80063b0: 619a str r2, [r3, #24] break; 80063b2: e064 b.n 800647e { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the Channel 2 in PWM mode */ TIM_OC2_SetConfig(htim->Instance, sConfig); 80063b4: 68fb ldr r3, [r7, #12] 80063b6: 681b ldr r3, [r3, #0] 80063b8: 68b9 ldr r1, [r7, #8] 80063ba: 4618 mov r0, r3 80063bc: f000 fa2c bl 8006818 /* Set the Preload enable bit for channel2 */ htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; 80063c0: 68fb ldr r3, [r7, #12] 80063c2: 681b ldr r3, [r3, #0] 80063c4: 699a ldr r2, [r3, #24] 80063c6: 68fb ldr r3, [r7, #12] 80063c8: 681b ldr r3, [r3, #0] 80063ca: f442 6200 orr.w r2, r2, #2048 @ 0x800 80063ce: 619a str r2, [r3, #24] /* Configure the Output Fast mode */ htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; 80063d0: 68fb ldr r3, [r7, #12] 80063d2: 681b ldr r3, [r3, #0] 80063d4: 699a ldr r2, [r3, #24] 80063d6: 68fb ldr r3, [r7, #12] 80063d8: 681b ldr r3, [r3, #0] 80063da: f422 6280 bic.w r2, r2, #1024 @ 0x400 80063de: 619a str r2, [r3, #24] htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U; 80063e0: 68fb ldr r3, [r7, #12] 80063e2: 681b ldr r3, [r3, #0] 80063e4: 6999 ldr r1, [r3, #24] 80063e6: 68bb ldr r3, [r7, #8] 80063e8: 691b ldr r3, [r3, #16] 80063ea: 021a lsls r2, r3, #8 80063ec: 68fb ldr r3, [r7, #12] 80063ee: 681b ldr r3, [r3, #0] 80063f0: 430a orrs r2, r1 80063f2: 619a str r2, [r3, #24] break; 80063f4: e043 b.n 800647e { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the Channel 3 in PWM mode */ TIM_OC3_SetConfig(htim->Instance, sConfig); 80063f6: 68fb ldr r3, [r7, #12] 80063f8: 681b ldr r3, [r3, #0] 80063fa: 68b9 ldr r1, [r7, #8] 80063fc: 4618 mov r0, r3 80063fe: f000 fa75 bl 80068ec /* Set the Preload enable bit for channel3 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; 8006402: 68fb ldr r3, [r7, #12] 8006404: 681b ldr r3, [r3, #0] 8006406: 69da ldr r2, [r3, #28] 8006408: 68fb ldr r3, [r7, #12] 800640a: 681b ldr r3, [r3, #0] 800640c: f042 0208 orr.w r2, r2, #8 8006410: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; 8006412: 68fb ldr r3, [r7, #12] 8006414: 681b ldr r3, [r3, #0] 8006416: 69da ldr r2, [r3, #28] 8006418: 68fb ldr r3, [r7, #12] 800641a: 681b ldr r3, [r3, #0] 800641c: f022 0204 bic.w r2, r2, #4 8006420: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode; 8006422: 68fb ldr r3, [r7, #12] 8006424: 681b ldr r3, [r3, #0] 8006426: 69d9 ldr r1, [r3, #28] 8006428: 68bb ldr r3, [r7, #8] 800642a: 691a ldr r2, [r3, #16] 800642c: 68fb ldr r3, [r7, #12] 800642e: 681b ldr r3, [r3, #0] 8006430: 430a orrs r2, r1 8006432: 61da str r2, [r3, #28] break; 8006434: e023 b.n 800647e { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the Channel 4 in PWM mode */ TIM_OC4_SetConfig(htim->Instance, sConfig); 8006436: 68fb ldr r3, [r7, #12] 8006438: 681b ldr r3, [r3, #0] 800643a: 68b9 ldr r1, [r7, #8] 800643c: 4618 mov r0, r3 800643e: f000 fabf bl 80069c0 /* Set the Preload enable bit for channel4 */ htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; 8006442: 68fb ldr r3, [r7, #12] 8006444: 681b ldr r3, [r3, #0] 8006446: 69da ldr r2, [r3, #28] 8006448: 68fb ldr r3, [r7, #12] 800644a: 681b ldr r3, [r3, #0] 800644c: f442 6200 orr.w r2, r2, #2048 @ 0x800 8006450: 61da str r2, [r3, #28] /* Configure the Output Fast mode */ htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; 8006452: 68fb ldr r3, [r7, #12] 8006454: 681b ldr r3, [r3, #0] 8006456: 69da ldr r2, [r3, #28] 8006458: 68fb ldr r3, [r7, #12] 800645a: 681b ldr r3, [r3, #0] 800645c: f422 6280 bic.w r2, r2, #1024 @ 0x400 8006460: 61da str r2, [r3, #28] htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U; 8006462: 68fb ldr r3, [r7, #12] 8006464: 681b ldr r3, [r3, #0] 8006466: 69d9 ldr r1, [r3, #28] 8006468: 68bb ldr r3, [r7, #8] 800646a: 691b ldr r3, [r3, #16] 800646c: 021a lsls r2, r3, #8 800646e: 68fb ldr r3, [r7, #12] 8006470: 681b ldr r3, [r3, #0] 8006472: 430a orrs r2, r1 8006474: 61da str r2, [r3, #28] break; 8006476: e002 b.n 800647e } default: status = HAL_ERROR; 8006478: 2301 movs r3, #1 800647a: 75fb strb r3, [r7, #23] break; 800647c: bf00 nop } __HAL_UNLOCK(htim); 800647e: 68fb ldr r3, [r7, #12] 8006480: 2200 movs r2, #0 8006482: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8006486: 7dfb ldrb r3, [r7, #23] } 8006488: 4618 mov r0, r3 800648a: 3718 adds r7, #24 800648c: 46bd mov sp, r7 800648e: bd80 pop {r7, pc} 08006490 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { 8006490: b580 push {r7, lr} 8006492: b084 sub sp, #16 8006494: af00 add r7, sp, #0 8006496: 6078 str r0, [r7, #4] 8006498: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 800649a: 2300 movs r3, #0 800649c: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); 800649e: 687b ldr r3, [r7, #4] 80064a0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80064a4: 2b01 cmp r3, #1 80064a6: d101 bne.n 80064ac 80064a8: 2302 movs r3, #2 80064aa: e0b4 b.n 8006616 80064ac: 687b ldr r3, [r7, #4] 80064ae: 2201 movs r2, #1 80064b0: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; 80064b4: 687b ldr r3, [r7, #4] 80064b6: 2202 movs r2, #2 80064b8: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; 80064bc: 687b ldr r3, [r7, #4] 80064be: 681b ldr r3, [r3, #0] 80064c0: 689b ldr r3, [r3, #8] 80064c2: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); 80064c4: 68bb ldr r3, [r7, #8] 80064c6: f023 0377 bic.w r3, r3, #119 @ 0x77 80064ca: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 80064cc: 68bb ldr r3, [r7, #8] 80064ce: f423 437f bic.w r3, r3, #65280 @ 0xff00 80064d2: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; 80064d4: 687b ldr r3, [r7, #4] 80064d6: 681b ldr r3, [r3, #0] 80064d8: 68ba ldr r2, [r7, #8] 80064da: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) 80064dc: 683b ldr r3, [r7, #0] 80064de: 681b ldr r3, [r3, #0] 80064e0: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 80064e4: d03e beq.n 8006564 80064e6: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 80064ea: f200 8087 bhi.w 80065fc 80064ee: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80064f2: f000 8086 beq.w 8006602 80064f6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80064fa: d87f bhi.n 80065fc 80064fc: 2b70 cmp r3, #112 @ 0x70 80064fe: d01a beq.n 8006536 8006500: 2b70 cmp r3, #112 @ 0x70 8006502: d87b bhi.n 80065fc 8006504: 2b60 cmp r3, #96 @ 0x60 8006506: d050 beq.n 80065aa 8006508: 2b60 cmp r3, #96 @ 0x60 800650a: d877 bhi.n 80065fc 800650c: 2b50 cmp r3, #80 @ 0x50 800650e: d03c beq.n 800658a 8006510: 2b50 cmp r3, #80 @ 0x50 8006512: d873 bhi.n 80065fc 8006514: 2b40 cmp r3, #64 @ 0x40 8006516: d058 beq.n 80065ca 8006518: 2b40 cmp r3, #64 @ 0x40 800651a: d86f bhi.n 80065fc 800651c: 2b30 cmp r3, #48 @ 0x30 800651e: d064 beq.n 80065ea 8006520: 2b30 cmp r3, #48 @ 0x30 8006522: d86b bhi.n 80065fc 8006524: 2b20 cmp r3, #32 8006526: d060 beq.n 80065ea 8006528: 2b20 cmp r3, #32 800652a: d867 bhi.n 80065fc 800652c: 2b00 cmp r3, #0 800652e: d05c beq.n 80065ea 8006530: 2b10 cmp r3, #16 8006532: d05a beq.n 80065ea 8006534: e062 b.n 80065fc assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8006536: 687b ldr r3, [r7, #4] 8006538: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 800653a: 683b ldr r3, [r7, #0] 800653c: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 800653e: 683b ldr r3, [r7, #0] 8006540: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8006542: 683b ldr r3, [r7, #0] 8006544: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8006546: f000 fb00 bl 8006b4a /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; 800654a: 687b ldr r3, [r7, #4] 800654c: 681b ldr r3, [r3, #0] 800654e: 689b ldr r3, [r3, #8] 8006550: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); 8006552: 68bb ldr r3, [r7, #8] 8006554: f043 0377 orr.w r3, r3, #119 @ 0x77 8006558: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 800655a: 687b ldr r3, [r7, #4] 800655c: 681b ldr r3, [r3, #0] 800655e: 68ba ldr r2, [r7, #8] 8006560: 609a str r2, [r3, #8] break; 8006562: e04f b.n 8006604 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, 8006564: 687b ldr r3, [r7, #4] 8006566: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, 8006568: 683b ldr r3, [r7, #0] 800656a: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, 800656c: 683b ldr r3, [r7, #0] 800656e: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); 8006570: 683b ldr r3, [r7, #0] 8006572: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, 8006574: f000 fae9 bl 8006b4a /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; 8006578: 687b ldr r3, [r7, #4] 800657a: 681b ldr r3, [r3, #0] 800657c: 689a ldr r2, [r3, #8] 800657e: 687b ldr r3, [r7, #4] 8006580: 681b ldr r3, [r3, #0] 8006582: f442 4280 orr.w r2, r2, #16384 @ 0x4000 8006586: 609a str r2, [r3, #8] break; 8006588: e03c b.n 8006604 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 800658a: 687b ldr r3, [r7, #4] 800658c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 800658e: 683b ldr r3, [r7, #0] 8006590: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 8006592: 683b ldr r3, [r7, #0] 8006594: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 8006596: 461a mov r2, r3 8006598: f000 fa60 bl 8006a5c TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); 800659c: 687b ldr r3, [r7, #4] 800659e: 681b ldr r3, [r3, #0] 80065a0: 2150 movs r1, #80 @ 0x50 80065a2: 4618 mov r0, r3 80065a4: f000 fab7 bl 8006b16 break; 80065a8: e02c b.n 8006604 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, 80065aa: 687b ldr r3, [r7, #4] 80065ac: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 80065ae: 683b ldr r3, [r7, #0] 80065b0: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 80065b2: 683b ldr r3, [r7, #0] 80065b4: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, 80065b6: 461a mov r2, r3 80065b8: f000 fa7e bl 8006ab8 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); 80065bc: 687b ldr r3, [r7, #4] 80065be: 681b ldr r3, [r3, #0] 80065c0: 2160 movs r1, #96 @ 0x60 80065c2: 4618 mov r0, r3 80065c4: f000 faa7 bl 8006b16 break; 80065c8: e01c b.n 8006604 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, 80065ca: 687b ldr r3, [r7, #4] 80065cc: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, 80065ce: 683b ldr r3, [r7, #0] 80065d0: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); 80065d2: 683b ldr r3, [r7, #0] 80065d4: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, 80065d6: 461a mov r2, r3 80065d8: f000 fa40 bl 8006a5c TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); 80065dc: 687b ldr r3, [r7, #4] 80065de: 681b ldr r3, [r3, #0] 80065e0: 2140 movs r1, #64 @ 0x40 80065e2: 4618 mov r0, r3 80065e4: f000 fa97 bl 8006b16 break; 80065e8: e00c b.n 8006604 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); 80065ea: 687b ldr r3, [r7, #4] 80065ec: 681a ldr r2, [r3, #0] 80065ee: 683b ldr r3, [r7, #0] 80065f0: 681b ldr r3, [r3, #0] 80065f2: 4619 mov r1, r3 80065f4: 4610 mov r0, r2 80065f6: f000 fa8e bl 8006b16 break; 80065fa: e003 b.n 8006604 } default: status = HAL_ERROR; 80065fc: 2301 movs r3, #1 80065fe: 73fb strb r3, [r7, #15] break; 8006600: e000 b.n 8006604 break; 8006602: bf00 nop } htim->State = HAL_TIM_STATE_READY; 8006604: 687b ldr r3, [r7, #4] 8006606: 2201 movs r2, #1 8006608: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 800660c: 687b ldr r3, [r7, #4] 800660e: 2200 movs r2, #0 8006610: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8006614: 7bfb ldrb r3, [r7, #15] } 8006616: 4618 mov r0, r3 8006618: 3710 adds r7, #16 800661a: 46bd mov sp, r7 800661c: bd80 pop {r7, pc} 0800661e : * @arg TIM_CHANNEL_5: TIM Channel 5 * @arg TIM_CHANNEL_6: TIM Channel 6 * @retval TIM Channel state */ HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel) { 800661e: b480 push {r7} 8006620: b085 sub sp, #20 8006622: af00 add r7, sp, #0 8006624: 6078 str r0, [r7, #4] 8006626: 6039 str r1, [r7, #0] HAL_TIM_ChannelStateTypeDef channel_state; /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); 8006628: 683b ldr r3, [r7, #0] 800662a: 2b00 cmp r3, #0 800662c: d104 bne.n 8006638 800662e: 687b ldr r3, [r7, #4] 8006630: f893 303e ldrb.w r3, [r3, #62] @ 0x3e 8006634: b2db uxtb r3, r3 8006636: e013 b.n 8006660 8006638: 683b ldr r3, [r7, #0] 800663a: 2b04 cmp r3, #4 800663c: d104 bne.n 8006648 800663e: 687b ldr r3, [r7, #4] 8006640: f893 303f ldrb.w r3, [r3, #63] @ 0x3f 8006644: b2db uxtb r3, r3 8006646: e00b b.n 8006660 8006648: 683b ldr r3, [r7, #0] 800664a: 2b08 cmp r3, #8 800664c: d104 bne.n 8006658 800664e: 687b ldr r3, [r7, #4] 8006650: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8006654: b2db uxtb r3, r3 8006656: e003 b.n 8006660 8006658: 687b ldr r3, [r7, #4] 800665a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800665e: b2db uxtb r3, r3 8006660: 73fb strb r3, [r7, #15] return channel_state; 8006662: 7bfb ldrb r3, [r7, #15] } 8006664: 4618 mov r0, r3 8006666: 3714 adds r7, #20 8006668: 46bd mov sp, r7 800666a: bc80 pop {r7} 800666c: 4770 bx lr ... 08006670 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 8006670: b480 push {r7} 8006672: b085 sub sp, #20 8006674: af00 add r7, sp, #0 8006676: 6078 str r0, [r7, #4] 8006678: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 800667a: 687b ldr r3, [r7, #4] 800667c: 681b ldr r3, [r3, #0] 800667e: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8006680: 687b ldr r3, [r7, #4] 8006682: 4a2f ldr r2, [pc, #188] @ (8006740 ) 8006684: 4293 cmp r3, r2 8006686: d00b beq.n 80066a0 8006688: 687b ldr r3, [r7, #4] 800668a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 800668e: d007 beq.n 80066a0 8006690: 687b ldr r3, [r7, #4] 8006692: 4a2c ldr r2, [pc, #176] @ (8006744 ) 8006694: 4293 cmp r3, r2 8006696: d003 beq.n 80066a0 8006698: 687b ldr r3, [r7, #4] 800669a: 4a2b ldr r2, [pc, #172] @ (8006748 ) 800669c: 4293 cmp r3, r2 800669e: d108 bne.n 80066b2 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 80066a0: 68fb ldr r3, [r7, #12] 80066a2: f023 0370 bic.w r3, r3, #112 @ 0x70 80066a6: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 80066a8: 683b ldr r3, [r7, #0] 80066aa: 685b ldr r3, [r3, #4] 80066ac: 68fa ldr r2, [r7, #12] 80066ae: 4313 orrs r3, r2 80066b0: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 80066b2: 687b ldr r3, [r7, #4] 80066b4: 4a22 ldr r2, [pc, #136] @ (8006740 ) 80066b6: 4293 cmp r3, r2 80066b8: d00b beq.n 80066d2 80066ba: 687b ldr r3, [r7, #4] 80066bc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80066c0: d007 beq.n 80066d2 80066c2: 687b ldr r3, [r7, #4] 80066c4: 4a1f ldr r2, [pc, #124] @ (8006744 ) 80066c6: 4293 cmp r3, r2 80066c8: d003 beq.n 80066d2 80066ca: 687b ldr r3, [r7, #4] 80066cc: 4a1e ldr r2, [pc, #120] @ (8006748 ) 80066ce: 4293 cmp r3, r2 80066d0: d108 bne.n 80066e4 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 80066d2: 68fb ldr r3, [r7, #12] 80066d4: f423 7340 bic.w r3, r3, #768 @ 0x300 80066d8: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 80066da: 683b ldr r3, [r7, #0] 80066dc: 68db ldr r3, [r3, #12] 80066de: 68fa ldr r2, [r7, #12] 80066e0: 4313 orrs r3, r2 80066e2: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80066e4: 68fb ldr r3, [r7, #12] 80066e6: f023 0280 bic.w r2, r3, #128 @ 0x80 80066ea: 683b ldr r3, [r7, #0] 80066ec: 695b ldr r3, [r3, #20] 80066ee: 4313 orrs r3, r2 80066f0: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 80066f2: 687b ldr r3, [r7, #4] 80066f4: 68fa ldr r2, [r7, #12] 80066f6: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80066f8: 683b ldr r3, [r7, #0] 80066fa: 689a ldr r2, [r3, #8] 80066fc: 687b ldr r3, [r7, #4] 80066fe: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8006700: 683b ldr r3, [r7, #0] 8006702: 681a ldr r2, [r3, #0] 8006704: 687b ldr r3, [r7, #4] 8006706: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8006708: 687b ldr r3, [r7, #4] 800670a: 4a0d ldr r2, [pc, #52] @ (8006740 ) 800670c: 4293 cmp r3, r2 800670e: d103 bne.n 8006718 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8006710: 683b ldr r3, [r7, #0] 8006712: 691a ldr r2, [r3, #16] 8006714: 687b ldr r3, [r7, #4] 8006716: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8006718: 687b ldr r3, [r7, #4] 800671a: 2201 movs r2, #1 800671c: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 800671e: 687b ldr r3, [r7, #4] 8006720: 691b ldr r3, [r3, #16] 8006722: f003 0301 and.w r3, r3, #1 8006726: 2b00 cmp r3, #0 8006728: d005 beq.n 8006736 { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 800672a: 687b ldr r3, [r7, #4] 800672c: 691b ldr r3, [r3, #16] 800672e: f023 0201 bic.w r2, r3, #1 8006732: 687b ldr r3, [r7, #4] 8006734: 611a str r2, [r3, #16] } } 8006736: bf00 nop 8006738: 3714 adds r7, #20 800673a: 46bd mov sp, r7 800673c: bc80 pop {r7} 800673e: 4770 bx lr 8006740: 40012c00 .word 0x40012c00 8006744: 40000400 .word 0x40000400 8006748: 40000800 .word 0x40000800 0800674c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 800674c: b480 push {r7} 800674e: b087 sub sp, #28 8006750: af00 add r7, sp, #0 8006752: 6078 str r0, [r7, #4] 8006754: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8006756: 687b ldr r3, [r7, #4] 8006758: 6a1b ldr r3, [r3, #32] 800675a: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 800675c: 687b ldr r3, [r7, #4] 800675e: 6a1b ldr r3, [r3, #32] 8006760: f023 0201 bic.w r2, r3, #1 8006764: 687b ldr r3, [r7, #4] 8006766: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8006768: 687b ldr r3, [r7, #4] 800676a: 685b ldr r3, [r3, #4] 800676c: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 800676e: 687b ldr r3, [r7, #4] 8006770: 699b ldr r3, [r3, #24] 8006772: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 8006774: 68fb ldr r3, [r7, #12] 8006776: f023 0370 bic.w r3, r3, #112 @ 0x70 800677a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 800677c: 68fb ldr r3, [r7, #12] 800677e: f023 0303 bic.w r3, r3, #3 8006782: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8006784: 683b ldr r3, [r7, #0] 8006786: 681b ldr r3, [r3, #0] 8006788: 68fa ldr r2, [r7, #12] 800678a: 4313 orrs r3, r2 800678c: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 800678e: 697b ldr r3, [r7, #20] 8006790: f023 0302 bic.w r3, r3, #2 8006794: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 8006796: 683b ldr r3, [r7, #0] 8006798: 689b ldr r3, [r3, #8] 800679a: 697a ldr r2, [r7, #20] 800679c: 4313 orrs r3, r2 800679e: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 80067a0: 687b ldr r3, [r7, #4] 80067a2: 4a1c ldr r2, [pc, #112] @ (8006814 ) 80067a4: 4293 cmp r3, r2 80067a6: d10c bne.n 80067c2 { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 80067a8: 697b ldr r3, [r7, #20] 80067aa: f023 0308 bic.w r3, r3, #8 80067ae: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 80067b0: 683b ldr r3, [r7, #0] 80067b2: 68db ldr r3, [r3, #12] 80067b4: 697a ldr r2, [r7, #20] 80067b6: 4313 orrs r3, r2 80067b8: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 80067ba: 697b ldr r3, [r7, #20] 80067bc: f023 0304 bic.w r3, r3, #4 80067c0: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80067c2: 687b ldr r3, [r7, #4] 80067c4: 4a13 ldr r2, [pc, #76] @ (8006814 ) 80067c6: 4293 cmp r3, r2 80067c8: d111 bne.n 80067ee /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 80067ca: 693b ldr r3, [r7, #16] 80067cc: f423 7380 bic.w r3, r3, #256 @ 0x100 80067d0: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 80067d2: 693b ldr r3, [r7, #16] 80067d4: f423 7300 bic.w r3, r3, #512 @ 0x200 80067d8: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 80067da: 683b ldr r3, [r7, #0] 80067dc: 695b ldr r3, [r3, #20] 80067de: 693a ldr r2, [r7, #16] 80067e0: 4313 orrs r3, r2 80067e2: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 80067e4: 683b ldr r3, [r7, #0] 80067e6: 699b ldr r3, [r3, #24] 80067e8: 693a ldr r2, [r7, #16] 80067ea: 4313 orrs r3, r2 80067ec: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80067ee: 687b ldr r3, [r7, #4] 80067f0: 693a ldr r2, [r7, #16] 80067f2: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80067f4: 687b ldr r3, [r7, #4] 80067f6: 68fa ldr r2, [r7, #12] 80067f8: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 80067fa: 683b ldr r3, [r7, #0] 80067fc: 685a ldr r2, [r3, #4] 80067fe: 687b ldr r3, [r7, #4] 8006800: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8006802: 687b ldr r3, [r7, #4] 8006804: 697a ldr r2, [r7, #20] 8006806: 621a str r2, [r3, #32] } 8006808: bf00 nop 800680a: 371c adds r7, #28 800680c: 46bd mov sp, r7 800680e: bc80 pop {r7} 8006810: 4770 bx lr 8006812: bf00 nop 8006814: 40012c00 .word 0x40012c00 08006818 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8006818: b480 push {r7} 800681a: b087 sub sp, #28 800681c: af00 add r7, sp, #0 800681e: 6078 str r0, [r7, #4] 8006820: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8006822: 687b ldr r3, [r7, #4] 8006824: 6a1b ldr r3, [r3, #32] 8006826: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8006828: 687b ldr r3, [r7, #4] 800682a: 6a1b ldr r3, [r3, #32] 800682c: f023 0210 bic.w r2, r3, #16 8006830: 687b ldr r3, [r7, #4] 8006832: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8006834: 687b ldr r3, [r7, #4] 8006836: 685b ldr r3, [r3, #4] 8006838: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 800683a: 687b ldr r3, [r7, #4] 800683c: 699b ldr r3, [r3, #24] 800683e: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8006840: 68fb ldr r3, [r7, #12] 8006842: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006846: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 8006848: 68fb ldr r3, [r7, #12] 800684a: f423 7340 bic.w r3, r3, #768 @ 0x300 800684e: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8006850: 683b ldr r3, [r7, #0] 8006852: 681b ldr r3, [r3, #0] 8006854: 021b lsls r3, r3, #8 8006856: 68fa ldr r2, [r7, #12] 8006858: 4313 orrs r3, r2 800685a: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 800685c: 697b ldr r3, [r7, #20] 800685e: f023 0320 bic.w r3, r3, #32 8006862: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 8006864: 683b ldr r3, [r7, #0] 8006866: 689b ldr r3, [r3, #8] 8006868: 011b lsls r3, r3, #4 800686a: 697a ldr r2, [r7, #20] 800686c: 4313 orrs r3, r2 800686e: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8006870: 687b ldr r3, [r7, #4] 8006872: 4a1d ldr r2, [pc, #116] @ (80068e8 ) 8006874: 4293 cmp r3, r2 8006876: d10d bne.n 8006894 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8006878: 697b ldr r3, [r7, #20] 800687a: f023 0380 bic.w r3, r3, #128 @ 0x80 800687e: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 8006880: 683b ldr r3, [r7, #0] 8006882: 68db ldr r3, [r3, #12] 8006884: 011b lsls r3, r3, #4 8006886: 697a ldr r2, [r7, #20] 8006888: 4313 orrs r3, r2 800688a: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 800688c: 697b ldr r3, [r7, #20] 800688e: f023 0340 bic.w r3, r3, #64 @ 0x40 8006892: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8006894: 687b ldr r3, [r7, #4] 8006896: 4a14 ldr r2, [pc, #80] @ (80068e8 ) 8006898: 4293 cmp r3, r2 800689a: d113 bne.n 80068c4 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 800689c: 693b ldr r3, [r7, #16] 800689e: f423 6380 bic.w r3, r3, #1024 @ 0x400 80068a2: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 80068a4: 693b ldr r3, [r7, #16] 80068a6: f423 6300 bic.w r3, r3, #2048 @ 0x800 80068aa: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 80068ac: 683b ldr r3, [r7, #0] 80068ae: 695b ldr r3, [r3, #20] 80068b0: 009b lsls r3, r3, #2 80068b2: 693a ldr r2, [r7, #16] 80068b4: 4313 orrs r3, r2 80068b6: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 80068b8: 683b ldr r3, [r7, #0] 80068ba: 699b ldr r3, [r3, #24] 80068bc: 009b lsls r3, r3, #2 80068be: 693a ldr r2, [r7, #16] 80068c0: 4313 orrs r3, r2 80068c2: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80068c4: 687b ldr r3, [r7, #4] 80068c6: 693a ldr r2, [r7, #16] 80068c8: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80068ca: 687b ldr r3, [r7, #4] 80068cc: 68fa ldr r2, [r7, #12] 80068ce: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 80068d0: 683b ldr r3, [r7, #0] 80068d2: 685a ldr r2, [r3, #4] 80068d4: 687b ldr r3, [r7, #4] 80068d6: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80068d8: 687b ldr r3, [r7, #4] 80068da: 697a ldr r2, [r7, #20] 80068dc: 621a str r2, [r3, #32] } 80068de: bf00 nop 80068e0: 371c adds r7, #28 80068e2: 46bd mov sp, r7 80068e4: bc80 pop {r7} 80068e6: 4770 bx lr 80068e8: 40012c00 .word 0x40012c00 080068ec : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80068ec: b480 push {r7} 80068ee: b087 sub sp, #28 80068f0: af00 add r7, sp, #0 80068f2: 6078 str r0, [r7, #4] 80068f4: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80068f6: 687b ldr r3, [r7, #4] 80068f8: 6a1b ldr r3, [r3, #32] 80068fa: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 80068fc: 687b ldr r3, [r7, #4] 80068fe: 6a1b ldr r3, [r3, #32] 8006900: f423 7280 bic.w r2, r3, #256 @ 0x100 8006904: 687b ldr r3, [r7, #4] 8006906: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8006908: 687b ldr r3, [r7, #4] 800690a: 685b ldr r3, [r3, #4] 800690c: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 800690e: 687b ldr r3, [r7, #4] 8006910: 69db ldr r3, [r3, #28] 8006912: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 8006914: 68fb ldr r3, [r7, #12] 8006916: f023 0370 bic.w r3, r3, #112 @ 0x70 800691a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 800691c: 68fb ldr r3, [r7, #12] 800691e: f023 0303 bic.w r3, r3, #3 8006922: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8006924: 683b ldr r3, [r7, #0] 8006926: 681b ldr r3, [r3, #0] 8006928: 68fa ldr r2, [r7, #12] 800692a: 4313 orrs r3, r2 800692c: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 800692e: 697b ldr r3, [r7, #20] 8006930: f423 7300 bic.w r3, r3, #512 @ 0x200 8006934: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 8006936: 683b ldr r3, [r7, #0] 8006938: 689b ldr r3, [r3, #8] 800693a: 021b lsls r3, r3, #8 800693c: 697a ldr r2, [r7, #20] 800693e: 4313 orrs r3, r2 8006940: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 8006942: 687b ldr r3, [r7, #4] 8006944: 4a1d ldr r2, [pc, #116] @ (80069bc ) 8006946: 4293 cmp r3, r2 8006948: d10d bne.n 8006966 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 800694a: 697b ldr r3, [r7, #20] 800694c: f423 6300 bic.w r3, r3, #2048 @ 0x800 8006950: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 8006952: 683b ldr r3, [r7, #0] 8006954: 68db ldr r3, [r3, #12] 8006956: 021b lsls r3, r3, #8 8006958: 697a ldr r2, [r7, #20] 800695a: 4313 orrs r3, r2 800695c: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 800695e: 697b ldr r3, [r7, #20] 8006960: f423 6380 bic.w r3, r3, #1024 @ 0x400 8006964: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8006966: 687b ldr r3, [r7, #4] 8006968: 4a14 ldr r2, [pc, #80] @ (80069bc ) 800696a: 4293 cmp r3, r2 800696c: d113 bne.n 8006996 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 800696e: 693b ldr r3, [r7, #16] 8006970: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8006974: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 8006976: 693b ldr r3, [r7, #16] 8006978: f423 5300 bic.w r3, r3, #8192 @ 0x2000 800697c: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 800697e: 683b ldr r3, [r7, #0] 8006980: 695b ldr r3, [r3, #20] 8006982: 011b lsls r3, r3, #4 8006984: 693a ldr r2, [r7, #16] 8006986: 4313 orrs r3, r2 8006988: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 800698a: 683b ldr r3, [r7, #0] 800698c: 699b ldr r3, [r3, #24] 800698e: 011b lsls r3, r3, #4 8006990: 693a ldr r2, [r7, #16] 8006992: 4313 orrs r3, r2 8006994: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8006996: 687b ldr r3, [r7, #4] 8006998: 693a ldr r2, [r7, #16] 800699a: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 800699c: 687b ldr r3, [r7, #4] 800699e: 68fa ldr r2, [r7, #12] 80069a0: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 80069a2: 683b ldr r3, [r7, #0] 80069a4: 685a ldr r2, [r3, #4] 80069a6: 687b ldr r3, [r7, #4] 80069a8: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80069aa: 687b ldr r3, [r7, #4] 80069ac: 697a ldr r2, [r7, #20] 80069ae: 621a str r2, [r3, #32] } 80069b0: bf00 nop 80069b2: 371c adds r7, #28 80069b4: 46bd mov sp, r7 80069b6: bc80 pop {r7} 80069b8: 4770 bx lr 80069ba: bf00 nop 80069bc: 40012c00 .word 0x40012c00 080069c0 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80069c0: b480 push {r7} 80069c2: b087 sub sp, #28 80069c4: af00 add r7, sp, #0 80069c6: 6078 str r0, [r7, #4] 80069c8: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80069ca: 687b ldr r3, [r7, #4] 80069cc: 6a1b ldr r3, [r3, #32] 80069ce: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 80069d0: 687b ldr r3, [r7, #4] 80069d2: 6a1b ldr r3, [r3, #32] 80069d4: f423 5280 bic.w r2, r3, #4096 @ 0x1000 80069d8: 687b ldr r3, [r7, #4] 80069da: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80069dc: 687b ldr r3, [r7, #4] 80069de: 685b ldr r3, [r3, #4] 80069e0: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80069e2: 687b ldr r3, [r7, #4] 80069e4: 69db ldr r3, [r3, #28] 80069e6: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 80069e8: 68fb ldr r3, [r7, #12] 80069ea: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80069ee: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 80069f0: 68fb ldr r3, [r7, #12] 80069f2: f423 7340 bic.w r3, r3, #768 @ 0x300 80069f6: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 80069f8: 683b ldr r3, [r7, #0] 80069fa: 681b ldr r3, [r3, #0] 80069fc: 021b lsls r3, r3, #8 80069fe: 68fa ldr r2, [r7, #12] 8006a00: 4313 orrs r3, r2 8006a02: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 8006a04: 693b ldr r3, [r7, #16] 8006a06: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8006a0a: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8006a0c: 683b ldr r3, [r7, #0] 8006a0e: 689b ldr r3, [r3, #8] 8006a10: 031b lsls r3, r3, #12 8006a12: 693a ldr r2, [r7, #16] 8006a14: 4313 orrs r3, r2 8006a16: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8006a18: 687b ldr r3, [r7, #4] 8006a1a: 4a0f ldr r2, [pc, #60] @ (8006a58 ) 8006a1c: 4293 cmp r3, r2 8006a1e: d109 bne.n 8006a34 { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8006a20: 697b ldr r3, [r7, #20] 8006a22: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8006a26: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8006a28: 683b ldr r3, [r7, #0] 8006a2a: 695b ldr r3, [r3, #20] 8006a2c: 019b lsls r3, r3, #6 8006a2e: 697a ldr r2, [r7, #20] 8006a30: 4313 orrs r3, r2 8006a32: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8006a34: 687b ldr r3, [r7, #4] 8006a36: 697a ldr r2, [r7, #20] 8006a38: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8006a3a: 687b ldr r3, [r7, #4] 8006a3c: 68fa ldr r2, [r7, #12] 8006a3e: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8006a40: 683b ldr r3, [r7, #0] 8006a42: 685a ldr r2, [r3, #4] 8006a44: 687b ldr r3, [r7, #4] 8006a46: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8006a48: 687b ldr r3, [r7, #4] 8006a4a: 693a ldr r2, [r7, #16] 8006a4c: 621a str r2, [r3, #32] } 8006a4e: bf00 nop 8006a50: 371c adds r7, #28 8006a52: 46bd mov sp, r7 8006a54: bc80 pop {r7} 8006a56: 4770 bx lr 8006a58: 40012c00 .word 0x40012c00 08006a5c : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8006a5c: b480 push {r7} 8006a5e: b087 sub sp, #28 8006a60: af00 add r7, sp, #0 8006a62: 60f8 str r0, [r7, #12] 8006a64: 60b9 str r1, [r7, #8] 8006a66: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; 8006a68: 68fb ldr r3, [r7, #12] 8006a6a: 6a1b ldr r3, [r3, #32] 8006a6c: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; 8006a6e: 68fb ldr r3, [r7, #12] 8006a70: 6a1b ldr r3, [r3, #32] 8006a72: f023 0201 bic.w r2, r3, #1 8006a76: 68fb ldr r3, [r7, #12] 8006a78: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8006a7a: 68fb ldr r3, [r7, #12] 8006a7c: 699b ldr r3, [r3, #24] 8006a7e: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; 8006a80: 693b ldr r3, [r7, #16] 8006a82: f023 03f0 bic.w r3, r3, #240 @ 0xf0 8006a86: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); 8006a88: 687b ldr r3, [r7, #4] 8006a8a: 011b lsls r3, r3, #4 8006a8c: 693a ldr r2, [r7, #16] 8006a8e: 4313 orrs r3, r2 8006a90: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); 8006a92: 697b ldr r3, [r7, #20] 8006a94: f023 030a bic.w r3, r3, #10 8006a98: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; 8006a9a: 697a ldr r2, [r7, #20] 8006a9c: 68bb ldr r3, [r7, #8] 8006a9e: 4313 orrs r3, r2 8006aa0: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; 8006aa2: 68fb ldr r3, [r7, #12] 8006aa4: 693a ldr r2, [r7, #16] 8006aa6: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8006aa8: 68fb ldr r3, [r7, #12] 8006aaa: 697a ldr r2, [r7, #20] 8006aac: 621a str r2, [r3, #32] } 8006aae: bf00 nop 8006ab0: 371c adds r7, #28 8006ab2: 46bd mov sp, r7 8006ab4: bc80 pop {r7} 8006ab6: 4770 bx lr 08006ab8 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { 8006ab8: b480 push {r7} 8006aba: b087 sub sp, #28 8006abc: af00 add r7, sp, #0 8006abe: 60f8 str r0, [r7, #12] 8006ac0: 60b9 str r1, [r7, #8] 8006ac2: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; 8006ac4: 68fb ldr r3, [r7, #12] 8006ac6: 6a1b ldr r3, [r3, #32] 8006ac8: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; 8006aca: 68fb ldr r3, [r7, #12] 8006acc: 6a1b ldr r3, [r3, #32] 8006ace: f023 0210 bic.w r2, r3, #16 8006ad2: 68fb ldr r3, [r7, #12] 8006ad4: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; 8006ad6: 68fb ldr r3, [r7, #12] 8006ad8: 699b ldr r3, [r3, #24] 8006ada: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; 8006adc: 693b ldr r3, [r7, #16] 8006ade: f423 4370 bic.w r3, r3, #61440 @ 0xf000 8006ae2: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); 8006ae4: 687b ldr r3, [r7, #4] 8006ae6: 031b lsls r3, r3, #12 8006ae8: 693a ldr r2, [r7, #16] 8006aea: 4313 orrs r3, r2 8006aec: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); 8006aee: 697b ldr r3, [r7, #20] 8006af0: f023 03a0 bic.w r3, r3, #160 @ 0xa0 8006af4: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); 8006af6: 68bb ldr r3, [r7, #8] 8006af8: 011b lsls r3, r3, #4 8006afa: 697a ldr r2, [r7, #20] 8006afc: 4313 orrs r3, r2 8006afe: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; 8006b00: 68fb ldr r3, [r7, #12] 8006b02: 693a ldr r2, [r7, #16] 8006b04: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; 8006b06: 68fb ldr r3, [r7, #12] 8006b08: 697a ldr r2, [r7, #20] 8006b0a: 621a str r2, [r3, #32] } 8006b0c: bf00 nop 8006b0e: 371c adds r7, #28 8006b10: 46bd mov sp, r7 8006b12: bc80 pop {r7} 8006b14: 4770 bx lr 08006b16 : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { 8006b16: b480 push {r7} 8006b18: b085 sub sp, #20 8006b1a: af00 add r7, sp, #0 8006b1c: 6078 str r0, [r7, #4] 8006b1e: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; 8006b20: 687b ldr r3, [r7, #4] 8006b22: 689b ldr r3, [r3, #8] 8006b24: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; 8006b26: 68fb ldr r3, [r7, #12] 8006b28: f023 0370 bic.w r3, r3, #112 @ 0x70 8006b2c: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); 8006b2e: 683a ldr r2, [r7, #0] 8006b30: 68fb ldr r3, [r7, #12] 8006b32: 4313 orrs r3, r2 8006b34: f043 0307 orr.w r3, r3, #7 8006b38: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8006b3a: 687b ldr r3, [r7, #4] 8006b3c: 68fa ldr r2, [r7, #12] 8006b3e: 609a str r2, [r3, #8] } 8006b40: bf00 nop 8006b42: 3714 adds r7, #20 8006b44: 46bd mov sp, r7 8006b46: bc80 pop {r7} 8006b48: 4770 bx lr 08006b4a : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { 8006b4a: b480 push {r7} 8006b4c: b087 sub sp, #28 8006b4e: af00 add r7, sp, #0 8006b50: 60f8 str r0, [r7, #12] 8006b52: 60b9 str r1, [r7, #8] 8006b54: 607a str r2, [r7, #4] 8006b56: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; 8006b58: 68fb ldr r3, [r7, #12] 8006b5a: 689b ldr r3, [r3, #8] 8006b5c: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 8006b5e: 697b ldr r3, [r7, #20] 8006b60: f423 437f bic.w r3, r3, #65280 @ 0xff00 8006b64: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); 8006b66: 683b ldr r3, [r7, #0] 8006b68: 021a lsls r2, r3, #8 8006b6a: 687b ldr r3, [r7, #4] 8006b6c: 431a orrs r2, r3 8006b6e: 68bb ldr r3, [r7, #8] 8006b70: 4313 orrs r3, r2 8006b72: 697a ldr r2, [r7, #20] 8006b74: 4313 orrs r3, r2 8006b76: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; 8006b78: 68fb ldr r3, [r7, #12] 8006b7a: 697a ldr r2, [r7, #20] 8006b7c: 609a str r2, [r3, #8] } 8006b7e: bf00 nop 8006b80: 371c adds r7, #28 8006b82: 46bd mov sp, r7 8006b84: bc80 pop {r7} 8006b86: 4770 bx lr 08006b88 : * @param ChannelState specifies the TIM Channel CCxE bit new state. * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE. * @retval None */ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState) { 8006b88: b480 push {r7} 8006b8a: b087 sub sp, #28 8006b8c: af00 add r7, sp, #0 8006b8e: 60f8 str r0, [r7, #12] 8006b90: 60b9 str r1, [r7, #8] 8006b92: 607a str r2, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(TIMx)); assert_param(IS_TIM_CHANNELS(Channel)); tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 8006b94: 68bb ldr r3, [r7, #8] 8006b96: f003 031f and.w r3, r3, #31 8006b9a: 2201 movs r2, #1 8006b9c: fa02 f303 lsl.w r3, r2, r3 8006ba0: 617b str r3, [r7, #20] /* Reset the CCxE Bit */ TIMx->CCER &= ~tmp; 8006ba2: 68fb ldr r3, [r7, #12] 8006ba4: 6a1a ldr r2, [r3, #32] 8006ba6: 697b ldr r3, [r7, #20] 8006ba8: 43db mvns r3, r3 8006baa: 401a ands r2, r3 8006bac: 68fb ldr r3, [r7, #12] 8006bae: 621a str r2, [r3, #32] /* Set or reset the CCxE Bit */ TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 8006bb0: 68fb ldr r3, [r7, #12] 8006bb2: 6a1a ldr r2, [r3, #32] 8006bb4: 68bb ldr r3, [r7, #8] 8006bb6: f003 031f and.w r3, r3, #31 8006bba: 6879 ldr r1, [r7, #4] 8006bbc: fa01 f303 lsl.w r3, r1, r3 8006bc0: 431a orrs r2, r3 8006bc2: 68fb ldr r3, [r7, #12] 8006bc4: 621a str r2, [r3, #32] } 8006bc6: bf00 nop 8006bc8: 371c adds r7, #28 8006bca: 46bd mov sp, r7 8006bcc: bc80 pop {r7} 8006bce: 4770 bx lr 08006bd0 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 8006bd0: b480 push {r7} 8006bd2: b085 sub sp, #20 8006bd4: af00 add r7, sp, #0 8006bd6: 6078 str r0, [r7, #4] 8006bd8: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 8006bda: 687b ldr r3, [r7, #4] 8006bdc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8006be0: 2b01 cmp r3, #1 8006be2: d101 bne.n 8006be8 8006be4: 2302 movs r3, #2 8006be6: e046 b.n 8006c76 8006be8: 687b ldr r3, [r7, #4] 8006bea: 2201 movs r2, #1 8006bec: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 8006bf0: 687b ldr r3, [r7, #4] 8006bf2: 2202 movs r2, #2 8006bf4: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8006bf8: 687b ldr r3, [r7, #4] 8006bfa: 681b ldr r3, [r3, #0] 8006bfc: 685b ldr r3, [r3, #4] 8006bfe: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8006c00: 687b ldr r3, [r7, #4] 8006c02: 681b ldr r3, [r3, #0] 8006c04: 689b ldr r3, [r3, #8] 8006c06: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8006c08: 68fb ldr r3, [r7, #12] 8006c0a: f023 0370 bic.w r3, r3, #112 @ 0x70 8006c0e: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 8006c10: 683b ldr r3, [r7, #0] 8006c12: 681b ldr r3, [r3, #0] 8006c14: 68fa ldr r2, [r7, #12] 8006c16: 4313 orrs r3, r2 8006c18: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8006c1a: 687b ldr r3, [r7, #4] 8006c1c: 681b ldr r3, [r3, #0] 8006c1e: 68fa ldr r2, [r7, #12] 8006c20: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8006c22: 687b ldr r3, [r7, #4] 8006c24: 681b ldr r3, [r3, #0] 8006c26: 4a16 ldr r2, [pc, #88] @ (8006c80 ) 8006c28: 4293 cmp r3, r2 8006c2a: d00e beq.n 8006c4a 8006c2c: 687b ldr r3, [r7, #4] 8006c2e: 681b ldr r3, [r3, #0] 8006c30: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8006c34: d009 beq.n 8006c4a 8006c36: 687b ldr r3, [r7, #4] 8006c38: 681b ldr r3, [r3, #0] 8006c3a: 4a12 ldr r2, [pc, #72] @ (8006c84 ) 8006c3c: 4293 cmp r3, r2 8006c3e: d004 beq.n 8006c4a 8006c40: 687b ldr r3, [r7, #4] 8006c42: 681b ldr r3, [r3, #0] 8006c44: 4a10 ldr r2, [pc, #64] @ (8006c88 ) 8006c46: 4293 cmp r3, r2 8006c48: d10c bne.n 8006c64 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 8006c4a: 68bb ldr r3, [r7, #8] 8006c4c: f023 0380 bic.w r3, r3, #128 @ 0x80 8006c50: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 8006c52: 683b ldr r3, [r7, #0] 8006c54: 685b ldr r3, [r3, #4] 8006c56: 68ba ldr r2, [r7, #8] 8006c58: 4313 orrs r3, r2 8006c5a: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8006c5c: 687b ldr r3, [r7, #4] 8006c5e: 681b ldr r3, [r3, #0] 8006c60: 68ba ldr r2, [r7, #8] 8006c62: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8006c64: 687b ldr r3, [r7, #4] 8006c66: 2201 movs r2, #1 8006c68: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8006c6c: 687b ldr r3, [r7, #4] 8006c6e: 2200 movs r2, #0 8006c70: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8006c74: 2300 movs r3, #0 } 8006c76: 4618 mov r0, r3 8006c78: 3714 adds r7, #20 8006c7a: 46bd mov sp, r7 8006c7c: bc80 pop {r7} 8006c7e: 4770 bx lr 8006c80: 40012c00 .word 0x40012c00 8006c84: 40000400 .word 0x40000400 8006c88: 40000800 .word 0x40000800 08006c8c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8006c8c: b580 push {r7, lr} 8006c8e: b082 sub sp, #8 8006c90: af00 add r7, sp, #0 8006c92: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 8006c94: 687b ldr r3, [r7, #4] 8006c96: 2b00 cmp r3, #0 8006c98: d101 bne.n 8006c9e { return HAL_ERROR; 8006c9a: 2301 movs r3, #1 8006c9c: e042 b.n 8006d24 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) 8006c9e: 687b ldr r3, [r7, #4] 8006ca0: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8006ca4: b2db uxtb r3, r3 8006ca6: 2b00 cmp r3, #0 8006ca8: d106 bne.n 8006cb8 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 8006caa: 687b ldr r3, [r7, #4] 8006cac: 2200 movs r2, #0 8006cae: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 8006cb2: 6878 ldr r0, [r7, #4] 8006cb4: f7fb fb68 bl 8002388 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 8006cb8: 687b ldr r3, [r7, #4] 8006cba: 2224 movs r2, #36 @ 0x24 8006cbc: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 8006cc0: 687b ldr r3, [r7, #4] 8006cc2: 681b ldr r3, [r3, #0] 8006cc4: 68da ldr r2, [r3, #12] 8006cc6: 687b ldr r3, [r7, #4] 8006cc8: 681b ldr r3, [r3, #0] 8006cca: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8006cce: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 8006cd0: 6878 ldr r0, [r7, #4] 8006cd2: f000 f82b bl 8006d2c /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8006cd6: 687b ldr r3, [r7, #4] 8006cd8: 681b ldr r3, [r3, #0] 8006cda: 691a ldr r2, [r3, #16] 8006cdc: 687b ldr r3, [r7, #4] 8006cde: 681b ldr r3, [r3, #0] 8006ce0: f422 4290 bic.w r2, r2, #18432 @ 0x4800 8006ce4: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8006ce6: 687b ldr r3, [r7, #4] 8006ce8: 681b ldr r3, [r3, #0] 8006cea: 695a ldr r2, [r3, #20] 8006cec: 687b ldr r3, [r7, #4] 8006cee: 681b ldr r3, [r3, #0] 8006cf0: f022 022a bic.w r2, r2, #42 @ 0x2a 8006cf4: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 8006cf6: 687b ldr r3, [r7, #4] 8006cf8: 681b ldr r3, [r3, #0] 8006cfa: 68da ldr r2, [r3, #12] 8006cfc: 687b ldr r3, [r7, #4] 8006cfe: 681b ldr r3, [r3, #0] 8006d00: f442 5200 orr.w r2, r2, #8192 @ 0x2000 8006d04: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8006d06: 687b ldr r3, [r7, #4] 8006d08: 2200 movs r2, #0 8006d0a: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 8006d0c: 687b ldr r3, [r7, #4] 8006d0e: 2220 movs r2, #32 8006d10: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8006d14: 687b ldr r3, [r7, #4] 8006d16: 2220 movs r2, #32 8006d18: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 8006d1c: 687b ldr r3, [r7, #4] 8006d1e: 2200 movs r2, #0 8006d20: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 8006d22: 2300 movs r3, #0 } 8006d24: 4618 mov r0, r3 8006d26: 3708 adds r7, #8 8006d28: 46bd mov sp, r7 8006d2a: bd80 pop {r7, pc} 08006d2c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 8006d2c: b580 push {r7, lr} 8006d2e: b084 sub sp, #16 8006d30: af00 add r7, sp, #0 8006d32: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8006d34: 687b ldr r3, [r7, #4] 8006d36: 681b ldr r3, [r3, #0] 8006d38: 691b ldr r3, [r3, #16] 8006d3a: f423 5140 bic.w r1, r3, #12288 @ 0x3000 8006d3e: 687b ldr r3, [r7, #4] 8006d40: 68da ldr r2, [r3, #12] 8006d42: 687b ldr r3, [r7, #4] 8006d44: 681b ldr r3, [r3, #0] 8006d46: 430a orrs r2, r1 8006d48: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; 8006d4a: 687b ldr r3, [r7, #4] 8006d4c: 689a ldr r2, [r3, #8] 8006d4e: 687b ldr r3, [r7, #4] 8006d50: 691b ldr r3, [r3, #16] 8006d52: 431a orrs r2, r3 8006d54: 687b ldr r3, [r7, #4] 8006d56: 695b ldr r3, [r3, #20] 8006d58: 4313 orrs r3, r2 8006d5a: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, 8006d5c: 687b ldr r3, [r7, #4] 8006d5e: 681b ldr r3, [r3, #0] 8006d60: 68db ldr r3, [r3, #12] 8006d62: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 8006d66: f023 030c bic.w r3, r3, #12 8006d6a: 687a ldr r2, [r7, #4] 8006d6c: 6812 ldr r2, [r2, #0] 8006d6e: 68b9 ldr r1, [r7, #8] 8006d70: 430b orrs r3, r1 8006d72: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8006d74: 687b ldr r3, [r7, #4] 8006d76: 681b ldr r3, [r3, #0] 8006d78: 695b ldr r3, [r3, #20] 8006d7a: f423 7140 bic.w r1, r3, #768 @ 0x300 8006d7e: 687b ldr r3, [r7, #4] 8006d80: 699a ldr r2, [r3, #24] 8006d82: 687b ldr r3, [r7, #4] 8006d84: 681b ldr r3, [r3, #0] 8006d86: 430a orrs r2, r1 8006d88: 615a str r2, [r3, #20] if(huart->Instance == USART1) 8006d8a: 687b ldr r3, [r7, #4] 8006d8c: 681b ldr r3, [r3, #0] 8006d8e: 4a2c ldr r2, [pc, #176] @ (8006e40 ) 8006d90: 4293 cmp r3, r2 8006d92: d103 bne.n 8006d9c { pclk = HAL_RCC_GetPCLK2Freq(); 8006d94: f7ff f824 bl 8005de0 8006d98: 60f8 str r0, [r7, #12] 8006d9a: e002 b.n 8006da2 } else { pclk = HAL_RCC_GetPCLK1Freq(); 8006d9c: f7ff f80c bl 8005db8 8006da0: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8006da2: 68fa ldr r2, [r7, #12] 8006da4: 4613 mov r3, r2 8006da6: 009b lsls r3, r3, #2 8006da8: 4413 add r3, r2 8006daa: 009a lsls r2, r3, #2 8006dac: 441a add r2, r3 8006dae: 687b ldr r3, [r7, #4] 8006db0: 685b ldr r3, [r3, #4] 8006db2: 009b lsls r3, r3, #2 8006db4: fbb2 f3f3 udiv r3, r2, r3 8006db8: 4a22 ldr r2, [pc, #136] @ (8006e44 ) 8006dba: fba2 2303 umull r2, r3, r2, r3 8006dbe: 095b lsrs r3, r3, #5 8006dc0: 0119 lsls r1, r3, #4 8006dc2: 68fa ldr r2, [r7, #12] 8006dc4: 4613 mov r3, r2 8006dc6: 009b lsls r3, r3, #2 8006dc8: 4413 add r3, r2 8006dca: 009a lsls r2, r3, #2 8006dcc: 441a add r2, r3 8006dce: 687b ldr r3, [r7, #4] 8006dd0: 685b ldr r3, [r3, #4] 8006dd2: 009b lsls r3, r3, #2 8006dd4: fbb2 f2f3 udiv r2, r2, r3 8006dd8: 4b1a ldr r3, [pc, #104] @ (8006e44 ) 8006dda: fba3 0302 umull r0, r3, r3, r2 8006dde: 095b lsrs r3, r3, #5 8006de0: 2064 movs r0, #100 @ 0x64 8006de2: fb00 f303 mul.w r3, r0, r3 8006de6: 1ad3 subs r3, r2, r3 8006de8: 011b lsls r3, r3, #4 8006dea: 3332 adds r3, #50 @ 0x32 8006dec: 4a15 ldr r2, [pc, #84] @ (8006e44 ) 8006dee: fba2 2303 umull r2, r3, r2, r3 8006df2: 095b lsrs r3, r3, #5 8006df4: f003 03f0 and.w r3, r3, #240 @ 0xf0 8006df8: 4419 add r1, r3 8006dfa: 68fa ldr r2, [r7, #12] 8006dfc: 4613 mov r3, r2 8006dfe: 009b lsls r3, r3, #2 8006e00: 4413 add r3, r2 8006e02: 009a lsls r2, r3, #2 8006e04: 441a add r2, r3 8006e06: 687b ldr r3, [r7, #4] 8006e08: 685b ldr r3, [r3, #4] 8006e0a: 009b lsls r3, r3, #2 8006e0c: fbb2 f2f3 udiv r2, r2, r3 8006e10: 4b0c ldr r3, [pc, #48] @ (8006e44 ) 8006e12: fba3 0302 umull r0, r3, r3, r2 8006e16: 095b lsrs r3, r3, #5 8006e18: 2064 movs r0, #100 @ 0x64 8006e1a: fb00 f303 mul.w r3, r0, r3 8006e1e: 1ad3 subs r3, r2, r3 8006e20: 011b lsls r3, r3, #4 8006e22: 3332 adds r3, #50 @ 0x32 8006e24: 4a07 ldr r2, [pc, #28] @ (8006e44 ) 8006e26: fba2 2303 umull r2, r3, r2, r3 8006e2a: 095b lsrs r3, r3, #5 8006e2c: f003 020f and.w r2, r3, #15 8006e30: 687b ldr r3, [r7, #4] 8006e32: 681b ldr r3, [r3, #0] 8006e34: 440a add r2, r1 8006e36: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } 8006e38: bf00 nop 8006e3a: 3710 adds r7, #16 8006e3c: 46bd mov sp, r7 8006e3e: bd80 pop {r7, pc} 8006e40: 40013800 .word 0x40013800 8006e44: 51eb851f .word 0x51eb851f 08006e48 : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8006e48: b480 push {r7} 8006e4a: b085 sub sp, #20 8006e4c: af00 add r7, sp, #0 8006e4e: 60f8 str r0, [r7, #12] 8006e50: 4638 mov r0, r7 8006e52: e880 000e stmia.w r0, {r1, r2, r3} /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8006e56: 2300 movs r3, #0 } 8006e58: 4618 mov r0, r3 8006e5a: 3714 adds r7, #20 8006e5c: 46bd mov sp, r7 8006e5e: bc80 pop {r7} 8006e60: 4770 bx lr 08006e62 : * Enables the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) { 8006e62: b480 push {r7} 8006e64: b085 sub sp, #20 8006e66: af00 add r7, sp, #0 8006e68: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Clear pending interrupts */ USBx->ISTR = 0U; 8006e6a: 687b ldr r3, [r7, #4] 8006e6c: 2200 movs r2, #0 8006e6e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8006e72: f44f 433f mov.w r3, #48896 @ 0xbf00 8006e76: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Set interrupt mask */ USBx->CNTR = (uint16_t)winterruptmask; 8006e78: 68fb ldr r3, [r7, #12] 8006e7a: b29a uxth r2, r3 8006e7c: 687b ldr r3, [r7, #4] 8006e7e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8006e82: 2300 movs r3, #0 } 8006e84: 4618 mov r0, r3 8006e86: 3714 adds r7, #20 8006e88: 46bd mov sp, r7 8006e8a: bc80 pop {r7} 8006e8c: 4770 bx lr 08006e8e : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) { 8006e8e: b480 push {r7} 8006e90: b085 sub sp, #20 8006e92: af00 add r7, sp, #0 8006e94: 6078 str r0, [r7, #4] uint32_t winterruptmask; /* Set winterruptmask variable */ winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | 8006e96: f44f 433f mov.w r3, #48896 @ 0xbf00 8006e9a: 60fb str r3, [r7, #12] USB_CNTR_SUSPM | USB_CNTR_ERRM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_RESETM; /* Clear interrupt mask */ USBx->CNTR &= (uint16_t)(~winterruptmask); 8006e9c: 687b ldr r3, [r7, #4] 8006e9e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40 8006ea2: b29a uxth r2, r3 8006ea4: 68fb ldr r3, [r7, #12] 8006ea6: b29b uxth r3, r3 8006ea8: 43db mvns r3, r3 8006eaa: b29b uxth r3, r3 8006eac: 4013 ands r3, r2 8006eae: b29a uxth r2, r3 8006eb0: 687b ldr r3, [r7, #4] 8006eb2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 return HAL_OK; 8006eb6: 2300 movs r3, #0 } 8006eb8: 4618 mov r0, r3 8006eba: 3714 adds r7, #20 8006ebc: 46bd mov sp, r7 8006ebe: bc80 pop {r7} 8006ec0: 4770 bx lr 08006ec2 : * This parameter can be one of the these values: * @arg USB_DEVICE_MODE Peripheral mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) { 8006ec2: b480 push {r7} 8006ec4: b083 sub sp, #12 8006ec6: af00 add r7, sp, #0 8006ec8: 6078 str r0, [r7, #4] 8006eca: 460b mov r3, r1 8006ecc: 70fb strb r3, [r7, #3] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 8006ece: 2300 movs r3, #0 } 8006ed0: 4618 mov r0, r3 8006ed2: 370c adds r7, #12 8006ed4: 46bd mov sp, r7 8006ed6: bc80 pop {r7} 8006ed8: 4770 bx lr 08006eda : * @param cfg pointer to a USB_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) { 8006eda: b480 push {r7} 8006edc: b085 sub sp, #20 8006ede: af00 add r7, sp, #0 8006ee0: 60f8 str r0, [r7, #12] 8006ee2: 4638 mov r0, r7 8006ee4: e880 000e stmia.w r0, {r1, r2, r3} /* Prevent unused argument(s) compilation warning */ UNUSED(cfg); /* Init Device */ /* CNTR_FRES = 1 */ USBx->CNTR = (uint16_t)USB_CNTR_FRES; 8006ee8: 68fb ldr r3, [r7, #12] 8006eea: 2201 movs r2, #1 8006eec: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* CNTR_FRES = 0 */ USBx->CNTR = 0U; 8006ef0: 68fb ldr r3, [r7, #12] 8006ef2: 2200 movs r2, #0 8006ef4: f8a3 2040 strh.w r2, [r3, #64] @ 0x40 /* Clear pending interrupts */ USBx->ISTR = 0U; 8006ef8: 68fb ldr r3, [r7, #12] 8006efa: 2200 movs r2, #0 8006efc: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 /*Set Btable Address*/ USBx->BTABLE = BTABLE_ADDRESS; 8006f00: 68fb ldr r3, [r7, #12] 8006f02: 2200 movs r2, #0 8006f04: f8a3 2050 strh.w r2, [r3, #80] @ 0x50 return HAL_OK; 8006f08: 2300 movs r3, #0 } 8006f0a: 4618 mov r0, r3 8006f0c: 3714 adds r7, #20 8006f0e: 46bd mov sp, r7 8006f10: bc80 pop {r7} 8006f12: 4770 bx lr 08006f14 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8006f14: b480 push {r7} 8006f16: b09d sub sp, #116 @ 0x74 8006f18: af00 add r7, sp, #0 8006f1a: 6078 str r0, [r7, #4] 8006f1c: 6039 str r1, [r7, #0] HAL_StatusTypeDef ret = HAL_OK; 8006f1e: 2300 movs r3, #0 8006f20: f887 306f strb.w r3, [r7, #111] @ 0x6f uint16_t wEpRegVal; wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; 8006f24: 687a ldr r2, [r7, #4] 8006f26: 683b ldr r3, [r7, #0] 8006f28: 781b ldrb r3, [r3, #0] 8006f2a: 009b lsls r3, r3, #2 8006f2c: 4413 add r3, r2 8006f2e: 881b ldrh r3, [r3, #0] 8006f30: b29b uxth r3, r3 8006f32: f423 43ec bic.w r3, r3, #30208 @ 0x7600 8006f36: f023 0370 bic.w r3, r3, #112 @ 0x70 8006f3a: f8a7 306c strh.w r3, [r7, #108] @ 0x6c /* initialize Endpoint */ switch (ep->type) 8006f3e: 683b ldr r3, [r7, #0] 8006f40: 78db ldrb r3, [r3, #3] 8006f42: 2b03 cmp r3, #3 8006f44: d81f bhi.n 8006f86 8006f46: a201 add r2, pc, #4 @ (adr r2, 8006f4c ) 8006f48: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8006f4c: 08006f5d .word 0x08006f5d 8006f50: 08006f79 .word 0x08006f79 8006f54: 08006f8f .word 0x08006f8f 8006f58: 08006f6b .word 0x08006f6b { case EP_TYPE_CTRL: wEpRegVal |= USB_EP_CONTROL; 8006f5c: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8006f60: f443 7300 orr.w r3, r3, #512 @ 0x200 8006f64: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8006f68: e012 b.n 8006f90 case EP_TYPE_BULK: wEpRegVal |= USB_EP_BULK; break; case EP_TYPE_INTR: wEpRegVal |= USB_EP_INTERRUPT; 8006f6a: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8006f6e: f443 63c0 orr.w r3, r3, #1536 @ 0x600 8006f72: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8006f76: e00b b.n 8006f90 case EP_TYPE_ISOC: wEpRegVal |= USB_EP_ISOCHRONOUS; 8006f78: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8006f7c: f443 6380 orr.w r3, r3, #1024 @ 0x400 8006f80: f8a7 306c strh.w r3, [r7, #108] @ 0x6c break; 8006f84: e004 b.n 8006f90 default: ret = HAL_ERROR; 8006f86: 2301 movs r3, #1 8006f88: f887 306f strb.w r3, [r7, #111] @ 0x6f break; 8006f8c: e000 b.n 8006f90 break; 8006f8e: bf00 nop } PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); 8006f90: 687a ldr r2, [r7, #4] 8006f92: 683b ldr r3, [r7, #0] 8006f94: 781b ldrb r3, [r3, #0] 8006f96: 009b lsls r3, r3, #2 8006f98: 441a add r2, r3 8006f9a: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c 8006f9e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006fa2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006fa6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006faa: f043 0380 orr.w r3, r3, #128 @ 0x80 8006fae: b29b uxth r3, r3 8006fb0: 8013 strh r3, [r2, #0] PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); 8006fb2: 687a ldr r2, [r7, #4] 8006fb4: 683b ldr r3, [r7, #0] 8006fb6: 781b ldrb r3, [r3, #0] 8006fb8: 009b lsls r3, r3, #2 8006fba: 4413 add r3, r2 8006fbc: 881b ldrh r3, [r3, #0] 8006fbe: b29b uxth r3, r3 8006fc0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8006fc4: f023 0370 bic.w r3, r3, #112 @ 0x70 8006fc8: b29b uxth r3, r3 8006fca: 683a ldr r2, [r7, #0] 8006fcc: 7812 ldrb r2, [r2, #0] 8006fce: 4313 orrs r3, r2 8006fd0: f8a7 3066 strh.w r3, [r7, #102] @ 0x66 8006fd4: 687a ldr r2, [r7, #4] 8006fd6: 683b ldr r3, [r7, #0] 8006fd8: 781b ldrb r3, [r3, #0] 8006fda: 009b lsls r3, r3, #2 8006fdc: 441a add r2, r3 8006fde: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66 8006fe2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8006fe6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8006fea: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8006fee: f043 0380 orr.w r3, r3, #128 @ 0x80 8006ff2: b29b uxth r3, r3 8006ff4: 8013 strh r3, [r2, #0] if (ep->doublebuffer == 0U) 8006ff6: 683b ldr r3, [r7, #0] 8006ff8: 7b1b ldrb r3, [r3, #12] 8006ffa: 2b00 cmp r3, #0 8006ffc: f040 8178 bne.w 80072f0 { if (ep->is_in != 0U) 8007000: 683b ldr r3, [r7, #0] 8007002: 785b ldrb r3, [r3, #1] 8007004: 2b00 cmp r3, #0 8007006: f000 8084 beq.w 8007112 { /*Set the endpoint Transmit buffer address */ PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); 800700a: 687b ldr r3, [r7, #4] 800700c: 61bb str r3, [r7, #24] 800700e: 687b ldr r3, [r7, #4] 8007010: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007014: b29b uxth r3, r3 8007016: 461a mov r2, r3 8007018: 69bb ldr r3, [r7, #24] 800701a: 4413 add r3, r2 800701c: 61bb str r3, [r7, #24] 800701e: 683b ldr r3, [r7, #0] 8007020: 781b ldrb r3, [r3, #0] 8007022: 011a lsls r2, r3, #4 8007024: 69bb ldr r3, [r7, #24] 8007026: 4413 add r3, r2 8007028: f503 6380 add.w r3, r3, #1024 @ 0x400 800702c: 617b str r3, [r7, #20] 800702e: 683b ldr r3, [r7, #0] 8007030: 88db ldrh r3, [r3, #6] 8007032: 085b lsrs r3, r3, #1 8007034: b29b uxth r3, r3 8007036: 005b lsls r3, r3, #1 8007038: b29a uxth r2, r3 800703a: 697b ldr r3, [r7, #20] 800703c: 801a strh r2, [r3, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 800703e: 687a ldr r2, [r7, #4] 8007040: 683b ldr r3, [r7, #0] 8007042: 781b ldrb r3, [r3, #0] 8007044: 009b lsls r3, r3, #2 8007046: 4413 add r3, r2 8007048: 881b ldrh r3, [r3, #0] 800704a: 827b strh r3, [r7, #18] 800704c: 8a7b ldrh r3, [r7, #18] 800704e: f003 0340 and.w r3, r3, #64 @ 0x40 8007052: 2b00 cmp r3, #0 8007054: d01b beq.n 800708e 8007056: 687a ldr r2, [r7, #4] 8007058: 683b ldr r3, [r7, #0] 800705a: 781b ldrb r3, [r3, #0] 800705c: 009b lsls r3, r3, #2 800705e: 4413 add r3, r2 8007060: 881b ldrh r3, [r3, #0] 8007062: b29b uxth r3, r3 8007064: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007068: f023 0370 bic.w r3, r3, #112 @ 0x70 800706c: 823b strh r3, [r7, #16] 800706e: 687a ldr r2, [r7, #4] 8007070: 683b ldr r3, [r7, #0] 8007072: 781b ldrb r3, [r3, #0] 8007074: 009b lsls r3, r3, #2 8007076: 441a add r2, r3 8007078: 8a3b ldrh r3, [r7, #16] 800707a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800707e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007082: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007086: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800708a: b29b uxth r3, r3 800708c: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 800708e: 683b ldr r3, [r7, #0] 8007090: 78db ldrb r3, [r3, #3] 8007092: 2b01 cmp r3, #1 8007094: d020 beq.n 80070d8 { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 8007096: 687a ldr r2, [r7, #4] 8007098: 683b ldr r3, [r7, #0] 800709a: 781b ldrb r3, [r3, #0] 800709c: 009b lsls r3, r3, #2 800709e: 4413 add r3, r2 80070a0: 881b ldrh r3, [r3, #0] 80070a2: b29b uxth r3, r3 80070a4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80070a8: f023 0340 bic.w r3, r3, #64 @ 0x40 80070ac: 81bb strh r3, [r7, #12] 80070ae: 89bb ldrh r3, [r7, #12] 80070b0: f083 0320 eor.w r3, r3, #32 80070b4: 81bb strh r3, [r7, #12] 80070b6: 687a ldr r2, [r7, #4] 80070b8: 683b ldr r3, [r7, #0] 80070ba: 781b ldrb r3, [r3, #0] 80070bc: 009b lsls r3, r3, #2 80070be: 441a add r2, r3 80070c0: 89bb ldrh r3, [r7, #12] 80070c2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80070c6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80070ca: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80070ce: f043 0380 orr.w r3, r3, #128 @ 0x80 80070d2: b29b uxth r3, r3 80070d4: 8013 strh r3, [r2, #0] 80070d6: e2d5 b.n 8007684 } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80070d8: 687a ldr r2, [r7, #4] 80070da: 683b ldr r3, [r7, #0] 80070dc: 781b ldrb r3, [r3, #0] 80070de: 009b lsls r3, r3, #2 80070e0: 4413 add r3, r2 80070e2: 881b ldrh r3, [r3, #0] 80070e4: b29b uxth r3, r3 80070e6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80070ea: f023 0340 bic.w r3, r3, #64 @ 0x40 80070ee: 81fb strh r3, [r7, #14] 80070f0: 687a ldr r2, [r7, #4] 80070f2: 683b ldr r3, [r7, #0] 80070f4: 781b ldrb r3, [r3, #0] 80070f6: 009b lsls r3, r3, #2 80070f8: 441a add r2, r3 80070fa: 89fb ldrh r3, [r7, #14] 80070fc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007100: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007104: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007108: f043 0380 orr.w r3, r3, #128 @ 0x80 800710c: b29b uxth r3, r3 800710e: 8013 strh r3, [r2, #0] 8007110: e2b8 b.n 8007684 } } else { /* Set the endpoint Receive buffer address */ PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); 8007112: 687b ldr r3, [r7, #4] 8007114: 633b str r3, [r7, #48] @ 0x30 8007116: 687b ldr r3, [r7, #4] 8007118: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800711c: b29b uxth r3, r3 800711e: 461a mov r2, r3 8007120: 6b3b ldr r3, [r7, #48] @ 0x30 8007122: 4413 add r3, r2 8007124: 633b str r3, [r7, #48] @ 0x30 8007126: 683b ldr r3, [r7, #0] 8007128: 781b ldrb r3, [r3, #0] 800712a: 011a lsls r2, r3, #4 800712c: 6b3b ldr r3, [r7, #48] @ 0x30 800712e: 4413 add r3, r2 8007130: f503 6381 add.w r3, r3, #1032 @ 0x408 8007134: 62fb str r3, [r7, #44] @ 0x2c 8007136: 683b ldr r3, [r7, #0] 8007138: 88db ldrh r3, [r3, #6] 800713a: 085b lsrs r3, r3, #1 800713c: b29b uxth r3, r3 800713e: 005b lsls r3, r3, #1 8007140: b29a uxth r2, r3 8007142: 6afb ldr r3, [r7, #44] @ 0x2c 8007144: 801a strh r2, [r3, #0] /* Set the endpoint Receive buffer counter */ PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); 8007146: 687b ldr r3, [r7, #4] 8007148: 62bb str r3, [r7, #40] @ 0x28 800714a: 687b ldr r3, [r7, #4] 800714c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007150: b29b uxth r3, r3 8007152: 461a mov r2, r3 8007154: 6abb ldr r3, [r7, #40] @ 0x28 8007156: 4413 add r3, r2 8007158: 62bb str r3, [r7, #40] @ 0x28 800715a: 683b ldr r3, [r7, #0] 800715c: 781b ldrb r3, [r3, #0] 800715e: 011a lsls r2, r3, #4 8007160: 6abb ldr r3, [r7, #40] @ 0x28 8007162: 4413 add r3, r2 8007164: f203 430c addw r3, r3, #1036 @ 0x40c 8007168: 627b str r3, [r7, #36] @ 0x24 800716a: 6a7b ldr r3, [r7, #36] @ 0x24 800716c: 881b ldrh r3, [r3, #0] 800716e: b29b uxth r3, r3 8007170: f3c3 0309 ubfx r3, r3, #0, #10 8007174: b29a uxth r2, r3 8007176: 6a7b ldr r3, [r7, #36] @ 0x24 8007178: 801a strh r2, [r3, #0] 800717a: 683b ldr r3, [r7, #0] 800717c: 691b ldr r3, [r3, #16] 800717e: 2b3e cmp r3, #62 @ 0x3e 8007180: d91d bls.n 80071be 8007182: 683b ldr r3, [r7, #0] 8007184: 691b ldr r3, [r3, #16] 8007186: 095b lsrs r3, r3, #5 8007188: 66bb str r3, [r7, #104] @ 0x68 800718a: 683b ldr r3, [r7, #0] 800718c: 691b ldr r3, [r3, #16] 800718e: f003 031f and.w r3, r3, #31 8007192: 2b00 cmp r3, #0 8007194: d102 bne.n 800719c 8007196: 6ebb ldr r3, [r7, #104] @ 0x68 8007198: 3b01 subs r3, #1 800719a: 66bb str r3, [r7, #104] @ 0x68 800719c: 6a7b ldr r3, [r7, #36] @ 0x24 800719e: 881b ldrh r3, [r3, #0] 80071a0: b29a uxth r2, r3 80071a2: 6ebb ldr r3, [r7, #104] @ 0x68 80071a4: b29b uxth r3, r3 80071a6: 029b lsls r3, r3, #10 80071a8: b29b uxth r3, r3 80071aa: 4313 orrs r3, r2 80071ac: b29b uxth r3, r3 80071ae: ea6f 4343 mvn.w r3, r3, lsl #17 80071b2: ea6f 4353 mvn.w r3, r3, lsr #17 80071b6: b29a uxth r2, r3 80071b8: 6a7b ldr r3, [r7, #36] @ 0x24 80071ba: 801a strh r2, [r3, #0] 80071bc: e026 b.n 800720c 80071be: 683b ldr r3, [r7, #0] 80071c0: 691b ldr r3, [r3, #16] 80071c2: 2b00 cmp r3, #0 80071c4: d10a bne.n 80071dc 80071c6: 6a7b ldr r3, [r7, #36] @ 0x24 80071c8: 881b ldrh r3, [r3, #0] 80071ca: b29b uxth r3, r3 80071cc: ea6f 4343 mvn.w r3, r3, lsl #17 80071d0: ea6f 4353 mvn.w r3, r3, lsr #17 80071d4: b29a uxth r2, r3 80071d6: 6a7b ldr r3, [r7, #36] @ 0x24 80071d8: 801a strh r2, [r3, #0] 80071da: e017 b.n 800720c 80071dc: 683b ldr r3, [r7, #0] 80071de: 691b ldr r3, [r3, #16] 80071e0: 085b lsrs r3, r3, #1 80071e2: 66bb str r3, [r7, #104] @ 0x68 80071e4: 683b ldr r3, [r7, #0] 80071e6: 691b ldr r3, [r3, #16] 80071e8: f003 0301 and.w r3, r3, #1 80071ec: 2b00 cmp r3, #0 80071ee: d002 beq.n 80071f6 80071f0: 6ebb ldr r3, [r7, #104] @ 0x68 80071f2: 3301 adds r3, #1 80071f4: 66bb str r3, [r7, #104] @ 0x68 80071f6: 6a7b ldr r3, [r7, #36] @ 0x24 80071f8: 881b ldrh r3, [r3, #0] 80071fa: b29a uxth r2, r3 80071fc: 6ebb ldr r3, [r7, #104] @ 0x68 80071fe: b29b uxth r3, r3 8007200: 029b lsls r3, r3, #10 8007202: b29b uxth r3, r3 8007204: 4313 orrs r3, r2 8007206: b29a uxth r2, r3 8007208: 6a7b ldr r3, [r7, #36] @ 0x24 800720a: 801a strh r2, [r3, #0] PCD_CLEAR_RX_DTOG(USBx, ep->num); 800720c: 687a ldr r2, [r7, #4] 800720e: 683b ldr r3, [r7, #0] 8007210: 781b ldrb r3, [r3, #0] 8007212: 009b lsls r3, r3, #2 8007214: 4413 add r3, r2 8007216: 881b ldrh r3, [r3, #0] 8007218: 847b strh r3, [r7, #34] @ 0x22 800721a: 8c7b ldrh r3, [r7, #34] @ 0x22 800721c: f403 4380 and.w r3, r3, #16384 @ 0x4000 8007220: 2b00 cmp r3, #0 8007222: d01b beq.n 800725c 8007224: 687a ldr r2, [r7, #4] 8007226: 683b ldr r3, [r7, #0] 8007228: 781b ldrb r3, [r3, #0] 800722a: 009b lsls r3, r3, #2 800722c: 4413 add r3, r2 800722e: 881b ldrh r3, [r3, #0] 8007230: b29b uxth r3, r3 8007232: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007236: f023 0370 bic.w r3, r3, #112 @ 0x70 800723a: 843b strh r3, [r7, #32] 800723c: 687a ldr r2, [r7, #4] 800723e: 683b ldr r3, [r7, #0] 8007240: 781b ldrb r3, [r3, #0] 8007242: 009b lsls r3, r3, #2 8007244: 441a add r2, r3 8007246: 8c3b ldrh r3, [r7, #32] 8007248: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800724c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007250: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007254: f043 0380 orr.w r3, r3, #128 @ 0x80 8007258: b29b uxth r3, r3 800725a: 8013 strh r3, [r2, #0] if (ep->num == 0U) 800725c: 683b ldr r3, [r7, #0] 800725e: 781b ldrb r3, [r3, #0] 8007260: 2b00 cmp r3, #0 8007262: d124 bne.n 80072ae { /* Configure VALID status for EP0 */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 8007264: 687a ldr r2, [r7, #4] 8007266: 683b ldr r3, [r7, #0] 8007268: 781b ldrb r3, [r3, #0] 800726a: 009b lsls r3, r3, #2 800726c: 4413 add r3, r2 800726e: 881b ldrh r3, [r3, #0] 8007270: b29b uxth r3, r3 8007272: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8007276: f023 0370 bic.w r3, r3, #112 @ 0x70 800727a: 83bb strh r3, [r7, #28] 800727c: 8bbb ldrh r3, [r7, #28] 800727e: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8007282: 83bb strh r3, [r7, #28] 8007284: 8bbb ldrh r3, [r7, #28] 8007286: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800728a: 83bb strh r3, [r7, #28] 800728c: 687a ldr r2, [r7, #4] 800728e: 683b ldr r3, [r7, #0] 8007290: 781b ldrb r3, [r3, #0] 8007292: 009b lsls r3, r3, #2 8007294: 441a add r2, r3 8007296: 8bbb ldrh r3, [r7, #28] 8007298: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800729c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80072a0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80072a4: f043 0380 orr.w r3, r3, #128 @ 0x80 80072a8: b29b uxth r3, r3 80072aa: 8013 strh r3, [r2, #0] 80072ac: e1ea b.n 8007684 } else { /* Configure NAK status for OUT Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK); 80072ae: 687a ldr r2, [r7, #4] 80072b0: 683b ldr r3, [r7, #0] 80072b2: 781b ldrb r3, [r3, #0] 80072b4: 009b lsls r3, r3, #2 80072b6: 4413 add r3, r2 80072b8: 881b ldrh r3, [r3, #0] 80072ba: b29b uxth r3, r3 80072bc: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80072c0: f023 0370 bic.w r3, r3, #112 @ 0x70 80072c4: 83fb strh r3, [r7, #30] 80072c6: 8bfb ldrh r3, [r7, #30] 80072c8: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80072cc: 83fb strh r3, [r7, #30] 80072ce: 687a ldr r2, [r7, #4] 80072d0: 683b ldr r3, [r7, #0] 80072d2: 781b ldrb r3, [r3, #0] 80072d4: 009b lsls r3, r3, #2 80072d6: 441a add r2, r3 80072d8: 8bfb ldrh r3, [r7, #30] 80072da: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80072de: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80072e2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80072e6: f043 0380 orr.w r3, r3, #128 @ 0x80 80072ea: b29b uxth r3, r3 80072ec: 8013 strh r3, [r2, #0] 80072ee: e1c9 b.n 8007684 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->type == EP_TYPE_BULK) 80072f0: 683b ldr r3, [r7, #0] 80072f2: 78db ldrb r3, [r3, #3] 80072f4: 2b02 cmp r3, #2 80072f6: d11e bne.n 8007336 { /* Set bulk endpoint as double buffered */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 80072f8: 687a ldr r2, [r7, #4] 80072fa: 683b ldr r3, [r7, #0] 80072fc: 781b ldrb r3, [r3, #0] 80072fe: 009b lsls r3, r3, #2 8007300: 4413 add r3, r2 8007302: 881b ldrh r3, [r3, #0] 8007304: b29b uxth r3, r3 8007306: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800730a: f023 0370 bic.w r3, r3, #112 @ 0x70 800730e: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 8007312: 687a ldr r2, [r7, #4] 8007314: 683b ldr r3, [r7, #0] 8007316: 781b ldrb r3, [r3, #0] 8007318: 009b lsls r3, r3, #2 800731a: 441a add r2, r3 800731c: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 8007320: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007324: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007328: f443 4301 orr.w r3, r3, #33024 @ 0x8100 800732c: f043 0380 orr.w r3, r3, #128 @ 0x80 8007330: b29b uxth r3, r3 8007332: 8013 strh r3, [r2, #0] 8007334: e01d b.n 8007372 } else { /* Set the ISOC endpoint in double buffer mode */ PCD_CLEAR_EP_KIND(USBx, ep->num); 8007336: 687a ldr r2, [r7, #4] 8007338: 683b ldr r3, [r7, #0] 800733a: 781b ldrb r3, [r3, #0] 800733c: 009b lsls r3, r3, #2 800733e: 4413 add r3, r2 8007340: 881b ldrh r3, [r3, #0] 8007342: b29b uxth r3, r3 8007344: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 8007348: f023 0370 bic.w r3, r3, #112 @ 0x70 800734c: f8a7 3064 strh.w r3, [r7, #100] @ 0x64 8007350: 687a ldr r2, [r7, #4] 8007352: 683b ldr r3, [r7, #0] 8007354: 781b ldrb r3, [r3, #0] 8007356: 009b lsls r3, r3, #2 8007358: 441a add r2, r3 800735a: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64 800735e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007362: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007366: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800736a: f043 0380 orr.w r3, r3, #128 @ 0x80 800736e: b29b uxth r3, r3 8007370: 8013 strh r3, [r2, #0] } /* Set buffer address for double buffered mode */ PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); 8007372: 687b ldr r3, [r7, #4] 8007374: 65fb str r3, [r7, #92] @ 0x5c 8007376: 687b ldr r3, [r7, #4] 8007378: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800737c: b29b uxth r3, r3 800737e: 461a mov r2, r3 8007380: 6dfb ldr r3, [r7, #92] @ 0x5c 8007382: 4413 add r3, r2 8007384: 65fb str r3, [r7, #92] @ 0x5c 8007386: 683b ldr r3, [r7, #0] 8007388: 781b ldrb r3, [r3, #0] 800738a: 011a lsls r2, r3, #4 800738c: 6dfb ldr r3, [r7, #92] @ 0x5c 800738e: 4413 add r3, r2 8007390: f503 6380 add.w r3, r3, #1024 @ 0x400 8007394: 65bb str r3, [r7, #88] @ 0x58 8007396: 683b ldr r3, [r7, #0] 8007398: 891b ldrh r3, [r3, #8] 800739a: 085b lsrs r3, r3, #1 800739c: b29b uxth r3, r3 800739e: 005b lsls r3, r3, #1 80073a0: b29a uxth r2, r3 80073a2: 6dbb ldr r3, [r7, #88] @ 0x58 80073a4: 801a strh r2, [r3, #0] 80073a6: 687b ldr r3, [r7, #4] 80073a8: 657b str r3, [r7, #84] @ 0x54 80073aa: 687b ldr r3, [r7, #4] 80073ac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80073b0: b29b uxth r3, r3 80073b2: 461a mov r2, r3 80073b4: 6d7b ldr r3, [r7, #84] @ 0x54 80073b6: 4413 add r3, r2 80073b8: 657b str r3, [r7, #84] @ 0x54 80073ba: 683b ldr r3, [r7, #0] 80073bc: 781b ldrb r3, [r3, #0] 80073be: 011a lsls r2, r3, #4 80073c0: 6d7b ldr r3, [r7, #84] @ 0x54 80073c2: 4413 add r3, r2 80073c4: f503 6381 add.w r3, r3, #1032 @ 0x408 80073c8: 653b str r3, [r7, #80] @ 0x50 80073ca: 683b ldr r3, [r7, #0] 80073cc: 895b ldrh r3, [r3, #10] 80073ce: 085b lsrs r3, r3, #1 80073d0: b29b uxth r3, r3 80073d2: 005b lsls r3, r3, #1 80073d4: b29a uxth r2, r3 80073d6: 6d3b ldr r3, [r7, #80] @ 0x50 80073d8: 801a strh r2, [r3, #0] if (ep->is_in == 0U) 80073da: 683b ldr r3, [r7, #0] 80073dc: 785b ldrb r3, [r3, #1] 80073de: 2b00 cmp r3, #0 80073e0: f040 8093 bne.w 800750a { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 80073e4: 687a ldr r2, [r7, #4] 80073e6: 683b ldr r3, [r7, #0] 80073e8: 781b ldrb r3, [r3, #0] 80073ea: 009b lsls r3, r3, #2 80073ec: 4413 add r3, r2 80073ee: 881b ldrh r3, [r3, #0] 80073f0: f8a7 3040 strh.w r3, [r7, #64] @ 0x40 80073f4: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40 80073f8: f403 4380 and.w r3, r3, #16384 @ 0x4000 80073fc: 2b00 cmp r3, #0 80073fe: d01b beq.n 8007438 8007400: 687a ldr r2, [r7, #4] 8007402: 683b ldr r3, [r7, #0] 8007404: 781b ldrb r3, [r3, #0] 8007406: 009b lsls r3, r3, #2 8007408: 4413 add r3, r2 800740a: 881b ldrh r3, [r3, #0] 800740c: b29b uxth r3, r3 800740e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007412: f023 0370 bic.w r3, r3, #112 @ 0x70 8007416: 87fb strh r3, [r7, #62] @ 0x3e 8007418: 687a ldr r2, [r7, #4] 800741a: 683b ldr r3, [r7, #0] 800741c: 781b ldrb r3, [r3, #0] 800741e: 009b lsls r3, r3, #2 8007420: 441a add r2, r3 8007422: 8ffb ldrh r3, [r7, #62] @ 0x3e 8007424: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007428: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800742c: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007430: f043 0380 orr.w r3, r3, #128 @ 0x80 8007434: b29b uxth r3, r3 8007436: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8007438: 687a ldr r2, [r7, #4] 800743a: 683b ldr r3, [r7, #0] 800743c: 781b ldrb r3, [r3, #0] 800743e: 009b lsls r3, r3, #2 8007440: 4413 add r3, r2 8007442: 881b ldrh r3, [r3, #0] 8007444: 87bb strh r3, [r7, #60] @ 0x3c 8007446: 8fbb ldrh r3, [r7, #60] @ 0x3c 8007448: f003 0340 and.w r3, r3, #64 @ 0x40 800744c: 2b00 cmp r3, #0 800744e: d01b beq.n 8007488 8007450: 687a ldr r2, [r7, #4] 8007452: 683b ldr r3, [r7, #0] 8007454: 781b ldrb r3, [r3, #0] 8007456: 009b lsls r3, r3, #2 8007458: 4413 add r3, r2 800745a: 881b ldrh r3, [r3, #0] 800745c: b29b uxth r3, r3 800745e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007462: f023 0370 bic.w r3, r3, #112 @ 0x70 8007466: 877b strh r3, [r7, #58] @ 0x3a 8007468: 687a ldr r2, [r7, #4] 800746a: 683b ldr r3, [r7, #0] 800746c: 781b ldrb r3, [r3, #0] 800746e: 009b lsls r3, r3, #2 8007470: 441a add r2, r3 8007472: 8f7b ldrh r3, [r7, #58] @ 0x3a 8007474: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007478: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800747c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007480: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8007484: b29b uxth r3, r3 8007486: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 8007488: 687a ldr r2, [r7, #4] 800748a: 683b ldr r3, [r7, #0] 800748c: 781b ldrb r3, [r3, #0] 800748e: 009b lsls r3, r3, #2 8007490: 4413 add r3, r2 8007492: 881b ldrh r3, [r3, #0] 8007494: b29b uxth r3, r3 8007496: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800749a: f023 0370 bic.w r3, r3, #112 @ 0x70 800749e: 873b strh r3, [r7, #56] @ 0x38 80074a0: 8f3b ldrh r3, [r7, #56] @ 0x38 80074a2: f483 5380 eor.w r3, r3, #4096 @ 0x1000 80074a6: 873b strh r3, [r7, #56] @ 0x38 80074a8: 8f3b ldrh r3, [r7, #56] @ 0x38 80074aa: f483 5300 eor.w r3, r3, #8192 @ 0x2000 80074ae: 873b strh r3, [r7, #56] @ 0x38 80074b0: 687a ldr r2, [r7, #4] 80074b2: 683b ldr r3, [r7, #0] 80074b4: 781b ldrb r3, [r3, #0] 80074b6: 009b lsls r3, r3, #2 80074b8: 441a add r2, r3 80074ba: 8f3b ldrh r3, [r7, #56] @ 0x38 80074bc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80074c0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80074c4: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80074c8: f043 0380 orr.w r3, r3, #128 @ 0x80 80074cc: b29b uxth r3, r3 80074ce: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80074d0: 687a ldr r2, [r7, #4] 80074d2: 683b ldr r3, [r7, #0] 80074d4: 781b ldrb r3, [r3, #0] 80074d6: 009b lsls r3, r3, #2 80074d8: 4413 add r3, r2 80074da: 881b ldrh r3, [r3, #0] 80074dc: b29b uxth r3, r3 80074de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80074e2: f023 0340 bic.w r3, r3, #64 @ 0x40 80074e6: 86fb strh r3, [r7, #54] @ 0x36 80074e8: 687a ldr r2, [r7, #4] 80074ea: 683b ldr r3, [r7, #0] 80074ec: 781b ldrb r3, [r3, #0] 80074ee: 009b lsls r3, r3, #2 80074f0: 441a add r2, r3 80074f2: 8efb ldrh r3, [r7, #54] @ 0x36 80074f4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80074f8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80074fc: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007500: f043 0380 orr.w r3, r3, #128 @ 0x80 8007504: b29b uxth r3, r3 8007506: 8013 strh r3, [r2, #0] 8007508: e0bc b.n 8007684 } else { /* Clear the data toggle bits for the endpoint IN/OUT */ PCD_CLEAR_RX_DTOG(USBx, ep->num); 800750a: 687a ldr r2, [r7, #4] 800750c: 683b ldr r3, [r7, #0] 800750e: 781b ldrb r3, [r3, #0] 8007510: 009b lsls r3, r3, #2 8007512: 4413 add r3, r2 8007514: 881b ldrh r3, [r3, #0] 8007516: f8a7 304e strh.w r3, [r7, #78] @ 0x4e 800751a: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e 800751e: f403 4380 and.w r3, r3, #16384 @ 0x4000 8007522: 2b00 cmp r3, #0 8007524: d01d beq.n 8007562 8007526: 687a ldr r2, [r7, #4] 8007528: 683b ldr r3, [r7, #0] 800752a: 781b ldrb r3, [r3, #0] 800752c: 009b lsls r3, r3, #2 800752e: 4413 add r3, r2 8007530: 881b ldrh r3, [r3, #0] 8007532: b29b uxth r3, r3 8007534: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007538: f023 0370 bic.w r3, r3, #112 @ 0x70 800753c: f8a7 304c strh.w r3, [r7, #76] @ 0x4c 8007540: 687a ldr r2, [r7, #4] 8007542: 683b ldr r3, [r7, #0] 8007544: 781b ldrb r3, [r3, #0] 8007546: 009b lsls r3, r3, #2 8007548: 441a add r2, r3 800754a: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c 800754e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007552: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007556: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800755a: f043 0380 orr.w r3, r3, #128 @ 0x80 800755e: b29b uxth r3, r3 8007560: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8007562: 687a ldr r2, [r7, #4] 8007564: 683b ldr r3, [r7, #0] 8007566: 781b ldrb r3, [r3, #0] 8007568: 009b lsls r3, r3, #2 800756a: 4413 add r3, r2 800756c: 881b ldrh r3, [r3, #0] 800756e: f8a7 304a strh.w r3, [r7, #74] @ 0x4a 8007572: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a 8007576: f003 0340 and.w r3, r3, #64 @ 0x40 800757a: 2b00 cmp r3, #0 800757c: d01d beq.n 80075ba 800757e: 687a ldr r2, [r7, #4] 8007580: 683b ldr r3, [r7, #0] 8007582: 781b ldrb r3, [r3, #0] 8007584: 009b lsls r3, r3, #2 8007586: 4413 add r3, r2 8007588: 881b ldrh r3, [r3, #0] 800758a: b29b uxth r3, r3 800758c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007590: f023 0370 bic.w r3, r3, #112 @ 0x70 8007594: f8a7 3048 strh.w r3, [r7, #72] @ 0x48 8007598: 687a ldr r2, [r7, #4] 800759a: 683b ldr r3, [r7, #0] 800759c: 781b ldrb r3, [r3, #0] 800759e: 009b lsls r3, r3, #2 80075a0: 441a add r2, r3 80075a2: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48 80075a6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80075aa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80075ae: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80075b2: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80075b6: b29b uxth r3, r3 80075b8: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 80075ba: 683b ldr r3, [r7, #0] 80075bc: 78db ldrb r3, [r3, #3] 80075be: 2b01 cmp r3, #1 80075c0: d024 beq.n 800760c { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 80075c2: 687a ldr r2, [r7, #4] 80075c4: 683b ldr r3, [r7, #0] 80075c6: 781b ldrb r3, [r3, #0] 80075c8: 009b lsls r3, r3, #2 80075ca: 4413 add r3, r2 80075cc: 881b ldrh r3, [r3, #0] 80075ce: b29b uxth r3, r3 80075d0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80075d4: f023 0340 bic.w r3, r3, #64 @ 0x40 80075d8: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 80075dc: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 80075e0: f083 0320 eor.w r3, r3, #32 80075e4: f8a7 3044 strh.w r3, [r7, #68] @ 0x44 80075e8: 687a ldr r2, [r7, #4] 80075ea: 683b ldr r3, [r7, #0] 80075ec: 781b ldrb r3, [r3, #0] 80075ee: 009b lsls r3, r3, #2 80075f0: 441a add r2, r3 80075f2: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44 80075f6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80075fa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80075fe: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007602: f043 0380 orr.w r3, r3, #128 @ 0x80 8007606: b29b uxth r3, r3 8007608: 8013 strh r3, [r2, #0] 800760a: e01d b.n 8007648 } else { /* Configure TX Endpoint to disabled state */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 800760c: 687a ldr r2, [r7, #4] 800760e: 683b ldr r3, [r7, #0] 8007610: 781b ldrb r3, [r3, #0] 8007612: 009b lsls r3, r3, #2 8007614: 4413 add r3, r2 8007616: 881b ldrh r3, [r3, #0] 8007618: b29b uxth r3, r3 800761a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800761e: f023 0340 bic.w r3, r3, #64 @ 0x40 8007622: f8a7 3046 strh.w r3, [r7, #70] @ 0x46 8007626: 687a ldr r2, [r7, #4] 8007628: 683b ldr r3, [r7, #0] 800762a: 781b ldrb r3, [r3, #0] 800762c: 009b lsls r3, r3, #2 800762e: 441a add r2, r3 8007630: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46 8007634: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007638: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800763c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007640: f043 0380 orr.w r3, r3, #128 @ 0x80 8007644: b29b uxth r3, r3 8007646: 8013 strh r3, [r2, #0] } PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 8007648: 687a ldr r2, [r7, #4] 800764a: 683b ldr r3, [r7, #0] 800764c: 781b ldrb r3, [r3, #0] 800764e: 009b lsls r3, r3, #2 8007650: 4413 add r3, r2 8007652: 881b ldrh r3, [r3, #0] 8007654: b29b uxth r3, r3 8007656: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800765a: f023 0370 bic.w r3, r3, #112 @ 0x70 800765e: f8a7 3042 strh.w r3, [r7, #66] @ 0x42 8007662: 687a ldr r2, [r7, #4] 8007664: 683b ldr r3, [r7, #0] 8007666: 781b ldrb r3, [r3, #0] 8007668: 009b lsls r3, r3, #2 800766a: 441a add r2, r3 800766c: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42 8007670: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007674: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007678: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800767c: f043 0380 orr.w r3, r3, #128 @ 0x80 8007680: b29b uxth r3, r3 8007682: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return ret; 8007684: f897 306f ldrb.w r3, [r7, #111] @ 0x6f } 8007688: 4618 mov r0, r3 800768a: 3774 adds r7, #116 @ 0x74 800768c: 46bd mov sp, r7 800768e: bc80 pop {r7} 8007690: 4770 bx lr 8007692: bf00 nop 08007694 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8007694: b480 push {r7} 8007696: b08d sub sp, #52 @ 0x34 8007698: af00 add r7, sp, #0 800769a: 6078 str r0, [r7, #4] 800769c: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 800769e: 683b ldr r3, [r7, #0] 80076a0: 7b1b ldrb r3, [r3, #12] 80076a2: 2b00 cmp r3, #0 80076a4: f040 808e bne.w 80077c4 { if (ep->is_in != 0U) 80076a8: 683b ldr r3, [r7, #0] 80076aa: 785b ldrb r3, [r3, #1] 80076ac: 2b00 cmp r3, #0 80076ae: d044 beq.n 800773a { PCD_CLEAR_TX_DTOG(USBx, ep->num); 80076b0: 687a ldr r2, [r7, #4] 80076b2: 683b ldr r3, [r7, #0] 80076b4: 781b ldrb r3, [r3, #0] 80076b6: 009b lsls r3, r3, #2 80076b8: 4413 add r3, r2 80076ba: 881b ldrh r3, [r3, #0] 80076bc: 81bb strh r3, [r7, #12] 80076be: 89bb ldrh r3, [r7, #12] 80076c0: f003 0340 and.w r3, r3, #64 @ 0x40 80076c4: 2b00 cmp r3, #0 80076c6: d01b beq.n 8007700 80076c8: 687a ldr r2, [r7, #4] 80076ca: 683b ldr r3, [r7, #0] 80076cc: 781b ldrb r3, [r3, #0] 80076ce: 009b lsls r3, r3, #2 80076d0: 4413 add r3, r2 80076d2: 881b ldrh r3, [r3, #0] 80076d4: b29b uxth r3, r3 80076d6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80076da: f023 0370 bic.w r3, r3, #112 @ 0x70 80076de: 817b strh r3, [r7, #10] 80076e0: 687a ldr r2, [r7, #4] 80076e2: 683b ldr r3, [r7, #0] 80076e4: 781b ldrb r3, [r3, #0] 80076e6: 009b lsls r3, r3, #2 80076e8: 441a add r2, r3 80076ea: 897b ldrh r3, [r7, #10] 80076ec: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80076f0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80076f4: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80076f8: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80076fc: b29b uxth r3, r3 80076fe: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 8007700: 687a ldr r2, [r7, #4] 8007702: 683b ldr r3, [r7, #0] 8007704: 781b ldrb r3, [r3, #0] 8007706: 009b lsls r3, r3, #2 8007708: 4413 add r3, r2 800770a: 881b ldrh r3, [r3, #0] 800770c: b29b uxth r3, r3 800770e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007712: f023 0340 bic.w r3, r3, #64 @ 0x40 8007716: 813b strh r3, [r7, #8] 8007718: 687a ldr r2, [r7, #4] 800771a: 683b ldr r3, [r7, #0] 800771c: 781b ldrb r3, [r3, #0] 800771e: 009b lsls r3, r3, #2 8007720: 441a add r2, r3 8007722: 893b ldrh r3, [r7, #8] 8007724: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007728: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800772c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007730: f043 0380 orr.w r3, r3, #128 @ 0x80 8007734: b29b uxth r3, r3 8007736: 8013 strh r3, [r2, #0] 8007738: e192 b.n 8007a60 } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 800773a: 687a ldr r2, [r7, #4] 800773c: 683b ldr r3, [r7, #0] 800773e: 781b ldrb r3, [r3, #0] 8007740: 009b lsls r3, r3, #2 8007742: 4413 add r3, r2 8007744: 881b ldrh r3, [r3, #0] 8007746: 827b strh r3, [r7, #18] 8007748: 8a7b ldrh r3, [r7, #18] 800774a: f403 4380 and.w r3, r3, #16384 @ 0x4000 800774e: 2b00 cmp r3, #0 8007750: d01b beq.n 800778a 8007752: 687a ldr r2, [r7, #4] 8007754: 683b ldr r3, [r7, #0] 8007756: 781b ldrb r3, [r3, #0] 8007758: 009b lsls r3, r3, #2 800775a: 4413 add r3, r2 800775c: 881b ldrh r3, [r3, #0] 800775e: b29b uxth r3, r3 8007760: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007764: f023 0370 bic.w r3, r3, #112 @ 0x70 8007768: 823b strh r3, [r7, #16] 800776a: 687a ldr r2, [r7, #4] 800776c: 683b ldr r3, [r7, #0] 800776e: 781b ldrb r3, [r3, #0] 8007770: 009b lsls r3, r3, #2 8007772: 441a add r2, r3 8007774: 8a3b ldrh r3, [r7, #16] 8007776: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800777a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800777e: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007782: f043 0380 orr.w r3, r3, #128 @ 0x80 8007786: b29b uxth r3, r3 8007788: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 800778a: 687a ldr r2, [r7, #4] 800778c: 683b ldr r3, [r7, #0] 800778e: 781b ldrb r3, [r3, #0] 8007790: 009b lsls r3, r3, #2 8007792: 4413 add r3, r2 8007794: 881b ldrh r3, [r3, #0] 8007796: b29b uxth r3, r3 8007798: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800779c: f023 0370 bic.w r3, r3, #112 @ 0x70 80077a0: 81fb strh r3, [r7, #14] 80077a2: 687a ldr r2, [r7, #4] 80077a4: 683b ldr r3, [r7, #0] 80077a6: 781b ldrb r3, [r3, #0] 80077a8: 009b lsls r3, r3, #2 80077aa: 441a add r2, r3 80077ac: 89fb ldrh r3, [r7, #14] 80077ae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80077b2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80077b6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80077ba: f043 0380 orr.w r3, r3, #128 @ 0x80 80077be: b29b uxth r3, r3 80077c0: 8013 strh r3, [r2, #0] 80077c2: e14d b.n 8007a60 } #if (USE_USB_DOUBLE_BUFFER == 1U) /* Double Buffer */ else { if (ep->is_in == 0U) 80077c4: 683b ldr r3, [r7, #0] 80077c6: 785b ldrb r3, [r3, #1] 80077c8: 2b00 cmp r3, #0 80077ca: f040 80a5 bne.w 8007918 { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 80077ce: 687a ldr r2, [r7, #4] 80077d0: 683b ldr r3, [r7, #0] 80077d2: 781b ldrb r3, [r3, #0] 80077d4: 009b lsls r3, r3, #2 80077d6: 4413 add r3, r2 80077d8: 881b ldrh r3, [r3, #0] 80077da: 843b strh r3, [r7, #32] 80077dc: 8c3b ldrh r3, [r7, #32] 80077de: f403 4380 and.w r3, r3, #16384 @ 0x4000 80077e2: 2b00 cmp r3, #0 80077e4: d01b beq.n 800781e 80077e6: 687a ldr r2, [r7, #4] 80077e8: 683b ldr r3, [r7, #0] 80077ea: 781b ldrb r3, [r3, #0] 80077ec: 009b lsls r3, r3, #2 80077ee: 4413 add r3, r2 80077f0: 881b ldrh r3, [r3, #0] 80077f2: b29b uxth r3, r3 80077f4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80077f8: f023 0370 bic.w r3, r3, #112 @ 0x70 80077fc: 83fb strh r3, [r7, #30] 80077fe: 687a ldr r2, [r7, #4] 8007800: 683b ldr r3, [r7, #0] 8007802: 781b ldrb r3, [r3, #0] 8007804: 009b lsls r3, r3, #2 8007806: 441a add r2, r3 8007808: 8bfb ldrh r3, [r7, #30] 800780a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800780e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007812: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007816: f043 0380 orr.w r3, r3, #128 @ 0x80 800781a: b29b uxth r3, r3 800781c: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 800781e: 687a ldr r2, [r7, #4] 8007820: 683b ldr r3, [r7, #0] 8007822: 781b ldrb r3, [r3, #0] 8007824: 009b lsls r3, r3, #2 8007826: 4413 add r3, r2 8007828: 881b ldrh r3, [r3, #0] 800782a: 83bb strh r3, [r7, #28] 800782c: 8bbb ldrh r3, [r7, #28] 800782e: f003 0340 and.w r3, r3, #64 @ 0x40 8007832: 2b00 cmp r3, #0 8007834: d01b beq.n 800786e 8007836: 687a ldr r2, [r7, #4] 8007838: 683b ldr r3, [r7, #0] 800783a: 781b ldrb r3, [r3, #0] 800783c: 009b lsls r3, r3, #2 800783e: 4413 add r3, r2 8007840: 881b ldrh r3, [r3, #0] 8007842: b29b uxth r3, r3 8007844: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007848: f023 0370 bic.w r3, r3, #112 @ 0x70 800784c: 837b strh r3, [r7, #26] 800784e: 687a ldr r2, [r7, #4] 8007850: 683b ldr r3, [r7, #0] 8007852: 781b ldrb r3, [r3, #0] 8007854: 009b lsls r3, r3, #2 8007856: 441a add r2, r3 8007858: 8b7b ldrh r3, [r7, #26] 800785a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 800785e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007862: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007866: f043 03c0 orr.w r3, r3, #192 @ 0xc0 800786a: b29b uxth r3, r3 800786c: 8013 strh r3, [r2, #0] /* Reset value of the data toggle bits for the endpoint out*/ PCD_TX_DTOG(USBx, ep->num); 800786e: 687a ldr r2, [r7, #4] 8007870: 683b ldr r3, [r7, #0] 8007872: 781b ldrb r3, [r3, #0] 8007874: 009b lsls r3, r3, #2 8007876: 4413 add r3, r2 8007878: 881b ldrh r3, [r3, #0] 800787a: b29b uxth r3, r3 800787c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007880: f023 0370 bic.w r3, r3, #112 @ 0x70 8007884: 833b strh r3, [r7, #24] 8007886: 687a ldr r2, [r7, #4] 8007888: 683b ldr r3, [r7, #0] 800788a: 781b ldrb r3, [r3, #0] 800788c: 009b lsls r3, r3, #2 800788e: 441a add r2, r3 8007890: 8b3b ldrh r3, [r7, #24] 8007892: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007896: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800789a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800789e: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80078a2: b29b uxth r3, r3 80078a4: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 80078a6: 687a ldr r2, [r7, #4] 80078a8: 683b ldr r3, [r7, #0] 80078aa: 781b ldrb r3, [r3, #0] 80078ac: 009b lsls r3, r3, #2 80078ae: 4413 add r3, r2 80078b0: 881b ldrh r3, [r3, #0] 80078b2: b29b uxth r3, r3 80078b4: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80078b8: f023 0370 bic.w r3, r3, #112 @ 0x70 80078bc: 82fb strh r3, [r7, #22] 80078be: 687a ldr r2, [r7, #4] 80078c0: 683b ldr r3, [r7, #0] 80078c2: 781b ldrb r3, [r3, #0] 80078c4: 009b lsls r3, r3, #2 80078c6: 441a add r2, r3 80078c8: 8afb ldrh r3, [r7, #22] 80078ca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80078ce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80078d2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80078d6: f043 0380 orr.w r3, r3, #128 @ 0x80 80078da: b29b uxth r3, r3 80078dc: 8013 strh r3, [r2, #0] PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80078de: 687a ldr r2, [r7, #4] 80078e0: 683b ldr r3, [r7, #0] 80078e2: 781b ldrb r3, [r3, #0] 80078e4: 009b lsls r3, r3, #2 80078e6: 4413 add r3, r2 80078e8: 881b ldrh r3, [r3, #0] 80078ea: b29b uxth r3, r3 80078ec: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80078f0: f023 0340 bic.w r3, r3, #64 @ 0x40 80078f4: 82bb strh r3, [r7, #20] 80078f6: 687a ldr r2, [r7, #4] 80078f8: 683b ldr r3, [r7, #0] 80078fa: 781b ldrb r3, [r3, #0] 80078fc: 009b lsls r3, r3, #2 80078fe: 441a add r2, r3 8007900: 8abb ldrh r3, [r7, #20] 8007902: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007906: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800790a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800790e: f043 0380 orr.w r3, r3, #128 @ 0x80 8007912: b29b uxth r3, r3 8007914: 8013 strh r3, [r2, #0] 8007916: e0a3 b.n 8007a60 } else { /* Clear the data toggle bits for the endpoint IN/OUT*/ PCD_CLEAR_RX_DTOG(USBx, ep->num); 8007918: 687a ldr r2, [r7, #4] 800791a: 683b ldr r3, [r7, #0] 800791c: 781b ldrb r3, [r3, #0] 800791e: 009b lsls r3, r3, #2 8007920: 4413 add r3, r2 8007922: 881b ldrh r3, [r3, #0] 8007924: 85fb strh r3, [r7, #46] @ 0x2e 8007926: 8dfb ldrh r3, [r7, #46] @ 0x2e 8007928: f403 4380 and.w r3, r3, #16384 @ 0x4000 800792c: 2b00 cmp r3, #0 800792e: d01b beq.n 8007968 8007930: 687a ldr r2, [r7, #4] 8007932: 683b ldr r3, [r7, #0] 8007934: 781b ldrb r3, [r3, #0] 8007936: 009b lsls r3, r3, #2 8007938: 4413 add r3, r2 800793a: 881b ldrh r3, [r3, #0] 800793c: b29b uxth r3, r3 800793e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007942: f023 0370 bic.w r3, r3, #112 @ 0x70 8007946: 85bb strh r3, [r7, #44] @ 0x2c 8007948: 687a ldr r2, [r7, #4] 800794a: 683b ldr r3, [r7, #0] 800794c: 781b ldrb r3, [r3, #0] 800794e: 009b lsls r3, r3, #2 8007950: 441a add r2, r3 8007952: 8dbb ldrh r3, [r7, #44] @ 0x2c 8007954: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007958: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 800795c: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8007960: f043 0380 orr.w r3, r3, #128 @ 0x80 8007964: b29b uxth r3, r3 8007966: 8013 strh r3, [r2, #0] PCD_CLEAR_TX_DTOG(USBx, ep->num); 8007968: 687a ldr r2, [r7, #4] 800796a: 683b ldr r3, [r7, #0] 800796c: 781b ldrb r3, [r3, #0] 800796e: 009b lsls r3, r3, #2 8007970: 4413 add r3, r2 8007972: 881b ldrh r3, [r3, #0] 8007974: 857b strh r3, [r7, #42] @ 0x2a 8007976: 8d7b ldrh r3, [r7, #42] @ 0x2a 8007978: f003 0340 and.w r3, r3, #64 @ 0x40 800797c: 2b00 cmp r3, #0 800797e: d01b beq.n 80079b8 8007980: 687a ldr r2, [r7, #4] 8007982: 683b ldr r3, [r7, #0] 8007984: 781b ldrb r3, [r3, #0] 8007986: 009b lsls r3, r3, #2 8007988: 4413 add r3, r2 800798a: 881b ldrh r3, [r3, #0] 800798c: b29b uxth r3, r3 800798e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007992: f023 0370 bic.w r3, r3, #112 @ 0x70 8007996: 853b strh r3, [r7, #40] @ 0x28 8007998: 687a ldr r2, [r7, #4] 800799a: 683b ldr r3, [r7, #0] 800799c: 781b ldrb r3, [r3, #0] 800799e: 009b lsls r3, r3, #2 80079a0: 441a add r2, r3 80079a2: 8d3b ldrh r3, [r7, #40] @ 0x28 80079a4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80079a8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80079ac: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80079b0: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80079b4: b29b uxth r3, r3 80079b6: 8013 strh r3, [r2, #0] PCD_RX_DTOG(USBx, ep->num); 80079b8: 687a ldr r2, [r7, #4] 80079ba: 683b ldr r3, [r7, #0] 80079bc: 781b ldrb r3, [r3, #0] 80079be: 009b lsls r3, r3, #2 80079c0: 4413 add r3, r2 80079c2: 881b ldrh r3, [r3, #0] 80079c4: b29b uxth r3, r3 80079c6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80079ca: f023 0370 bic.w r3, r3, #112 @ 0x70 80079ce: 84fb strh r3, [r7, #38] @ 0x26 80079d0: 687a ldr r2, [r7, #4] 80079d2: 683b ldr r3, [r7, #0] 80079d4: 781b ldrb r3, [r3, #0] 80079d6: 009b lsls r3, r3, #2 80079d8: 441a add r2, r3 80079da: 8cfb ldrh r3, [r7, #38] @ 0x26 80079dc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80079e0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80079e4: f443 4340 orr.w r3, r3, #49152 @ 0xc000 80079e8: f043 0380 orr.w r3, r3, #128 @ 0x80 80079ec: b29b uxth r3, r3 80079ee: 8013 strh r3, [r2, #0] /* Configure DISABLE status for the Endpoint*/ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); 80079f0: 687a ldr r2, [r7, #4] 80079f2: 683b ldr r3, [r7, #0] 80079f4: 781b ldrb r3, [r3, #0] 80079f6: 009b lsls r3, r3, #2 80079f8: 4413 add r3, r2 80079fa: 881b ldrh r3, [r3, #0] 80079fc: b29b uxth r3, r3 80079fe: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007a02: f023 0340 bic.w r3, r3, #64 @ 0x40 8007a06: 84bb strh r3, [r7, #36] @ 0x24 8007a08: 687a ldr r2, [r7, #4] 8007a0a: 683b ldr r3, [r7, #0] 8007a0c: 781b ldrb r3, [r3, #0] 8007a0e: 009b lsls r3, r3, #2 8007a10: 441a add r2, r3 8007a12: 8cbb ldrh r3, [r7, #36] @ 0x24 8007a14: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007a18: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007a1c: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007a20: f043 0380 orr.w r3, r3, #128 @ 0x80 8007a24: b29b uxth r3, r3 8007a26: 8013 strh r3, [r2, #0] PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); 8007a28: 687a ldr r2, [r7, #4] 8007a2a: 683b ldr r3, [r7, #0] 8007a2c: 781b ldrb r3, [r3, #0] 8007a2e: 009b lsls r3, r3, #2 8007a30: 4413 add r3, r2 8007a32: 881b ldrh r3, [r3, #0] 8007a34: b29b uxth r3, r3 8007a36: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8007a3a: f023 0370 bic.w r3, r3, #112 @ 0x70 8007a3e: 847b strh r3, [r7, #34] @ 0x22 8007a40: 687a ldr r2, [r7, #4] 8007a42: 683b ldr r3, [r7, #0] 8007a44: 781b ldrb r3, [r3, #0] 8007a46: 009b lsls r3, r3, #2 8007a48: 441a add r2, r3 8007a4a: 8c7b ldrh r3, [r7, #34] @ 0x22 8007a4c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007a50: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007a54: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8007a58: f043 0380 orr.w r3, r3, #128 @ 0x80 8007a5c: b29b uxth r3, r3 8007a5e: 8013 strh r3, [r2, #0] } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; 8007a60: 2300 movs r3, #0 } 8007a62: 4618 mov r0, r3 8007a64: 3734 adds r7, #52 @ 0x34 8007a66: 46bd mov sp, r7 8007a68: bc80 pop {r7} 8007a6a: 4770 bx lr 08007a6c : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 8007a6c: b580 push {r7, lr} 8007a6e: b0c2 sub sp, #264 @ 0x108 8007a70: af00 add r7, sp, #0 8007a72: f507 7384 add.w r3, r7, #264 @ 0x108 8007a76: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007a7a: 6018 str r0, [r3, #0] 8007a7c: f507 7384 add.w r3, r7, #264 @ 0x108 8007a80: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007a84: 6019 str r1, [r3, #0] uint16_t pmabuffer; uint16_t wEPVal; #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* IN endpoint */ if (ep->is_in == 1U) 8007a86: f507 7384 add.w r3, r7, #264 @ 0x108 8007a8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007a8e: 681b ldr r3, [r3, #0] 8007a90: 785b ldrb r3, [r3, #1] 8007a92: 2b01 cmp r3, #1 8007a94: f040 86b7 bne.w 8008806 { /*Multi packet transfer*/ if (ep->xfer_len > ep->maxpacket) 8007a98: f507 7384 add.w r3, r7, #264 @ 0x108 8007a9c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007aa0: 681b ldr r3, [r3, #0] 8007aa2: 699a ldr r2, [r3, #24] 8007aa4: f507 7384 add.w r3, r7, #264 @ 0x108 8007aa8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007aac: 681b ldr r3, [r3, #0] 8007aae: 691b ldr r3, [r3, #16] 8007ab0: 429a cmp r2, r3 8007ab2: d908 bls.n 8007ac6 { len = ep->maxpacket; 8007ab4: f507 7384 add.w r3, r7, #264 @ 0x108 8007ab8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007abc: 681b ldr r3, [r3, #0] 8007abe: 691b ldr r3, [r3, #16] 8007ac0: f8c7 3104 str.w r3, [r7, #260] @ 0x104 8007ac4: e007 b.n 8007ad6 } else { len = ep->xfer_len; 8007ac6: f507 7384 add.w r3, r7, #264 @ 0x108 8007aca: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007ace: 681b ldr r3, [r3, #0] 8007ad0: 699b ldr r3, [r3, #24] 8007ad2: f8c7 3104 str.w r3, [r7, #260] @ 0x104 } /* configure and validate Tx endpoint */ if (ep->doublebuffer == 0U) 8007ad6: f507 7384 add.w r3, r7, #264 @ 0x108 8007ada: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007ade: 681b ldr r3, [r3, #0] 8007ae0: 7b1b ldrb r3, [r3, #12] 8007ae2: 2b00 cmp r3, #0 8007ae4: d13a bne.n 8007b5c { USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); 8007ae6: f507 7384 add.w r3, r7, #264 @ 0x108 8007aea: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007aee: 681b ldr r3, [r3, #0] 8007af0: 6959 ldr r1, [r3, #20] 8007af2: f507 7384 add.w r3, r7, #264 @ 0x108 8007af6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007afa: 681b ldr r3, [r3, #0] 8007afc: 88da ldrh r2, [r3, #6] 8007afe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007b02: b29b uxth r3, r3 8007b04: f507 7084 add.w r0, r7, #264 @ 0x108 8007b08: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8007b0c: 6800 ldr r0, [r0, #0] 8007b0e: f001 fc9c bl 800944a PCD_SET_EP_TX_CNT(USBx, ep->num, len); 8007b12: f507 7384 add.w r3, r7, #264 @ 0x108 8007b16: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007b1a: 681b ldr r3, [r3, #0] 8007b1c: 613b str r3, [r7, #16] 8007b1e: f507 7384 add.w r3, r7, #264 @ 0x108 8007b22: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007b26: 681b ldr r3, [r3, #0] 8007b28: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007b2c: b29b uxth r3, r3 8007b2e: 461a mov r2, r3 8007b30: 693b ldr r3, [r7, #16] 8007b32: 4413 add r3, r2 8007b34: 613b str r3, [r7, #16] 8007b36: f507 7384 add.w r3, r7, #264 @ 0x108 8007b3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b3e: 681b ldr r3, [r3, #0] 8007b40: 781b ldrb r3, [r3, #0] 8007b42: 011a lsls r2, r3, #4 8007b44: 693b ldr r3, [r7, #16] 8007b46: 4413 add r3, r2 8007b48: f203 4304 addw r3, r3, #1028 @ 0x404 8007b4c: 60fb str r3, [r7, #12] 8007b4e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007b52: b29a uxth r2, r3 8007b54: 68fb ldr r3, [r7, #12] 8007b56: 801a strh r2, [r3, #0] 8007b58: f000 be1f b.w 800879a } #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* double buffer bulk management */ if (ep->type == EP_TYPE_BULK) 8007b5c: f507 7384 add.w r3, r7, #264 @ 0x108 8007b60: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b64: 681b ldr r3, [r3, #0] 8007b66: 78db ldrb r3, [r3, #3] 8007b68: 2b02 cmp r3, #2 8007b6a: f040 8462 bne.w 8008432 { if (ep->xfer_len_db > ep->maxpacket) 8007b6e: f507 7384 add.w r3, r7, #264 @ 0x108 8007b72: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b76: 681b ldr r3, [r3, #0] 8007b78: 6a1a ldr r2, [r3, #32] 8007b7a: f507 7384 add.w r3, r7, #264 @ 0x108 8007b7e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b82: 681b ldr r3, [r3, #0] 8007b84: 691b ldr r3, [r3, #16] 8007b86: 429a cmp r2, r3 8007b88: f240 83df bls.w 800834a { /* enable double buffer */ PCD_SET_BULK_EP_DBUF(USBx, ep->num); 8007b8c: f507 7384 add.w r3, r7, #264 @ 0x108 8007b90: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007b94: 681a ldr r2, [r3, #0] 8007b96: f507 7384 add.w r3, r7, #264 @ 0x108 8007b9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007b9e: 681b ldr r3, [r3, #0] 8007ba0: 781b ldrb r3, [r3, #0] 8007ba2: 009b lsls r3, r3, #2 8007ba4: 4413 add r3, r2 8007ba6: 881b ldrh r3, [r3, #0] 8007ba8: b29b uxth r3, r3 8007baa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8007bae: f023 0370 bic.w r3, r3, #112 @ 0x70 8007bb2: f8a7 3056 strh.w r3, [r7, #86] @ 0x56 8007bb6: f507 7384 add.w r3, r7, #264 @ 0x108 8007bba: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007bbe: 681a ldr r2, [r3, #0] 8007bc0: f507 7384 add.w r3, r7, #264 @ 0x108 8007bc4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007bc8: 681b ldr r3, [r3, #0] 8007bca: 781b ldrb r3, [r3, #0] 8007bcc: 009b lsls r3, r3, #2 8007bce: 441a add r2, r3 8007bd0: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56 8007bd4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8007bd8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8007bdc: f443 4301 orr.w r3, r3, #33024 @ 0x8100 8007be0: f043 0380 orr.w r3, r3, #128 @ 0x80 8007be4: b29b uxth r3, r3 8007be6: 8013 strh r3, [r2, #0] /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 8007be8: f507 7384 add.w r3, r7, #264 @ 0x108 8007bec: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007bf0: 681b ldr r3, [r3, #0] 8007bf2: 6a1a ldr r2, [r3, #32] 8007bf4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007bf8: 1ad2 subs r2, r2, r3 8007bfa: f507 7384 add.w r3, r7, #264 @ 0x108 8007bfe: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007c02: 681b ldr r3, [r3, #0] 8007c04: 621a str r2, [r3, #32] /* Fill the two first buffer in the Buffer0 & Buffer1 */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 8007c06: f507 7384 add.w r3, r7, #264 @ 0x108 8007c0a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007c0e: 681a ldr r2, [r3, #0] 8007c10: f507 7384 add.w r3, r7, #264 @ 0x108 8007c14: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007c18: 681b ldr r3, [r3, #0] 8007c1a: 781b ldrb r3, [r3, #0] 8007c1c: 009b lsls r3, r3, #2 8007c1e: 4413 add r3, r2 8007c20: 881b ldrh r3, [r3, #0] 8007c22: b29b uxth r3, r3 8007c24: f003 0340 and.w r3, r3, #64 @ 0x40 8007c28: 2b00 cmp r3, #0 8007c2a: f000 81c7 beq.w 8007fbc { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 8007c2e: f507 7384 add.w r3, r7, #264 @ 0x108 8007c32: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007c36: 681b ldr r3, [r3, #0] 8007c38: 633b str r3, [r7, #48] @ 0x30 8007c3a: f507 7384 add.w r3, r7, #264 @ 0x108 8007c3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007c42: 681b ldr r3, [r3, #0] 8007c44: 785b ldrb r3, [r3, #1] 8007c46: 2b00 cmp r3, #0 8007c48: d177 bne.n 8007d3a 8007c4a: f507 7384 add.w r3, r7, #264 @ 0x108 8007c4e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007c52: 681b ldr r3, [r3, #0] 8007c54: 62bb str r3, [r7, #40] @ 0x28 8007c56: f507 7384 add.w r3, r7, #264 @ 0x108 8007c5a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007c5e: 681b ldr r3, [r3, #0] 8007c60: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007c64: b29b uxth r3, r3 8007c66: 461a mov r2, r3 8007c68: 6abb ldr r3, [r7, #40] @ 0x28 8007c6a: 4413 add r3, r2 8007c6c: 62bb str r3, [r7, #40] @ 0x28 8007c6e: f507 7384 add.w r3, r7, #264 @ 0x108 8007c72: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007c76: 681b ldr r3, [r3, #0] 8007c78: 781b ldrb r3, [r3, #0] 8007c7a: 011a lsls r2, r3, #4 8007c7c: 6abb ldr r3, [r7, #40] @ 0x28 8007c7e: 4413 add r3, r2 8007c80: f203 430c addw r3, r3, #1036 @ 0x40c 8007c84: 627b str r3, [r7, #36] @ 0x24 8007c86: 6a7b ldr r3, [r7, #36] @ 0x24 8007c88: 881b ldrh r3, [r3, #0] 8007c8a: b29b uxth r3, r3 8007c8c: f3c3 0309 ubfx r3, r3, #0, #10 8007c90: b29a uxth r2, r3 8007c92: 6a7b ldr r3, [r7, #36] @ 0x24 8007c94: 801a strh r2, [r3, #0] 8007c96: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007c9a: 2b3e cmp r3, #62 @ 0x3e 8007c9c: d921 bls.n 8007ce2 8007c9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007ca2: 095b lsrs r3, r3, #5 8007ca4: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8007ca8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007cac: f003 031f and.w r3, r3, #31 8007cb0: 2b00 cmp r3, #0 8007cb2: d104 bne.n 8007cbe 8007cb4: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8007cb8: 3b01 subs r3, #1 8007cba: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8007cbe: 6a7b ldr r3, [r7, #36] @ 0x24 8007cc0: 881b ldrh r3, [r3, #0] 8007cc2: b29a uxth r2, r3 8007cc4: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8007cc8: b29b uxth r3, r3 8007cca: 029b lsls r3, r3, #10 8007ccc: b29b uxth r3, r3 8007cce: 4313 orrs r3, r2 8007cd0: b29b uxth r3, r3 8007cd2: ea6f 4343 mvn.w r3, r3, lsl #17 8007cd6: ea6f 4353 mvn.w r3, r3, lsr #17 8007cda: b29a uxth r2, r3 8007cdc: 6a7b ldr r3, [r7, #36] @ 0x24 8007cde: 801a strh r2, [r3, #0] 8007ce0: e050 b.n 8007d84 8007ce2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007ce6: 2b00 cmp r3, #0 8007ce8: d10a bne.n 8007d00 8007cea: 6a7b ldr r3, [r7, #36] @ 0x24 8007cec: 881b ldrh r3, [r3, #0] 8007cee: b29b uxth r3, r3 8007cf0: ea6f 4343 mvn.w r3, r3, lsl #17 8007cf4: ea6f 4353 mvn.w r3, r3, lsr #17 8007cf8: b29a uxth r2, r3 8007cfa: 6a7b ldr r3, [r7, #36] @ 0x24 8007cfc: 801a strh r2, [r3, #0] 8007cfe: e041 b.n 8007d84 8007d00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007d04: 085b lsrs r3, r3, #1 8007d06: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8007d0a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007d0e: f003 0301 and.w r3, r3, #1 8007d12: 2b00 cmp r3, #0 8007d14: d004 beq.n 8007d20 8007d16: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8007d1a: 3301 adds r3, #1 8007d1c: f8c7 3100 str.w r3, [r7, #256] @ 0x100 8007d20: 6a7b ldr r3, [r7, #36] @ 0x24 8007d22: 881b ldrh r3, [r3, #0] 8007d24: b29a uxth r2, r3 8007d26: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100 8007d2a: b29b uxth r3, r3 8007d2c: 029b lsls r3, r3, #10 8007d2e: b29b uxth r3, r3 8007d30: 4313 orrs r3, r2 8007d32: b29a uxth r2, r3 8007d34: 6a7b ldr r3, [r7, #36] @ 0x24 8007d36: 801a strh r2, [r3, #0] 8007d38: e024 b.n 8007d84 8007d3a: f507 7384 add.w r3, r7, #264 @ 0x108 8007d3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d42: 681b ldr r3, [r3, #0] 8007d44: 785b ldrb r3, [r3, #1] 8007d46: 2b01 cmp r3, #1 8007d48: d11c bne.n 8007d84 8007d4a: f507 7384 add.w r3, r7, #264 @ 0x108 8007d4e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007d52: 681b ldr r3, [r3, #0] 8007d54: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007d58: b29b uxth r3, r3 8007d5a: 461a mov r2, r3 8007d5c: 6b3b ldr r3, [r7, #48] @ 0x30 8007d5e: 4413 add r3, r2 8007d60: 633b str r3, [r7, #48] @ 0x30 8007d62: f507 7384 add.w r3, r7, #264 @ 0x108 8007d66: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d6a: 681b ldr r3, [r3, #0] 8007d6c: 781b ldrb r3, [r3, #0] 8007d6e: 011a lsls r2, r3, #4 8007d70: 6b3b ldr r3, [r7, #48] @ 0x30 8007d72: 4413 add r3, r2 8007d74: f203 430c addw r3, r3, #1036 @ 0x40c 8007d78: 62fb str r3, [r7, #44] @ 0x2c 8007d7a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007d7e: b29a uxth r2, r3 8007d80: 6afb ldr r3, [r7, #44] @ 0x2c 8007d82: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 8007d84: f507 7384 add.w r3, r7, #264 @ 0x108 8007d88: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d8c: 681b ldr r3, [r3, #0] 8007d8e: 895b ldrh r3, [r3, #10] 8007d90: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8007d94: f507 7384 add.w r3, r7, #264 @ 0x108 8007d98: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007d9c: 681b ldr r3, [r3, #0] 8007d9e: 6959 ldr r1, [r3, #20] 8007da0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007da4: b29b uxth r3, r3 8007da6: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8007daa: f507 7084 add.w r0, r7, #264 @ 0x108 8007dae: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8007db2: 6800 ldr r0, [r0, #0] 8007db4: f001 fb49 bl 800944a ep->xfer_buff += len; 8007db8: f507 7384 add.w r3, r7, #264 @ 0x108 8007dbc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007dc0: 681b ldr r3, [r3, #0] 8007dc2: 695a ldr r2, [r3, #20] 8007dc4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007dc8: 441a add r2, r3 8007dca: f507 7384 add.w r3, r7, #264 @ 0x108 8007dce: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007dd2: 681b ldr r3, [r3, #0] 8007dd4: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 8007dd6: f507 7384 add.w r3, r7, #264 @ 0x108 8007dda: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007dde: 681b ldr r3, [r3, #0] 8007de0: 6a1a ldr r2, [r3, #32] 8007de2: f507 7384 add.w r3, r7, #264 @ 0x108 8007de6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007dea: 681b ldr r3, [r3, #0] 8007dec: 691b ldr r3, [r3, #16] 8007dee: 429a cmp r2, r3 8007df0: d90f bls.n 8007e12 { ep->xfer_len_db -= len; 8007df2: f507 7384 add.w r3, r7, #264 @ 0x108 8007df6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007dfa: 681b ldr r3, [r3, #0] 8007dfc: 6a1a ldr r2, [r3, #32] 8007dfe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007e02: 1ad2 subs r2, r2, r3 8007e04: f507 7384 add.w r3, r7, #264 @ 0x108 8007e08: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007e0c: 681b ldr r3, [r3, #0] 8007e0e: 621a str r2, [r3, #32] 8007e10: e00e b.n 8007e30 } else { len = ep->xfer_len_db; 8007e12: f507 7384 add.w r3, r7, #264 @ 0x108 8007e16: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007e1a: 681b ldr r3, [r3, #0] 8007e1c: 6a1b ldr r3, [r3, #32] 8007e1e: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 8007e22: f507 7384 add.w r3, r7, #264 @ 0x108 8007e26: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007e2a: 681b ldr r3, [r3, #0] 8007e2c: 2200 movs r2, #0 8007e2e: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 8007e30: f507 7384 add.w r3, r7, #264 @ 0x108 8007e34: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007e38: 681b ldr r3, [r3, #0] 8007e3a: 785b ldrb r3, [r3, #1] 8007e3c: 2b00 cmp r3, #0 8007e3e: d177 bne.n 8007f30 8007e40: f507 7384 add.w r3, r7, #264 @ 0x108 8007e44: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007e48: 681b ldr r3, [r3, #0] 8007e4a: 61bb str r3, [r7, #24] 8007e4c: f507 7384 add.w r3, r7, #264 @ 0x108 8007e50: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007e54: 681b ldr r3, [r3, #0] 8007e56: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007e5a: b29b uxth r3, r3 8007e5c: 461a mov r2, r3 8007e5e: 69bb ldr r3, [r7, #24] 8007e60: 4413 add r3, r2 8007e62: 61bb str r3, [r7, #24] 8007e64: f507 7384 add.w r3, r7, #264 @ 0x108 8007e68: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007e6c: 681b ldr r3, [r3, #0] 8007e6e: 781b ldrb r3, [r3, #0] 8007e70: 011a lsls r2, r3, #4 8007e72: 69bb ldr r3, [r7, #24] 8007e74: 4413 add r3, r2 8007e76: f203 4304 addw r3, r3, #1028 @ 0x404 8007e7a: 617b str r3, [r7, #20] 8007e7c: 697b ldr r3, [r7, #20] 8007e7e: 881b ldrh r3, [r3, #0] 8007e80: b29b uxth r3, r3 8007e82: f3c3 0309 ubfx r3, r3, #0, #10 8007e86: b29a uxth r2, r3 8007e88: 697b ldr r3, [r7, #20] 8007e8a: 801a strh r2, [r3, #0] 8007e8c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007e90: 2b3e cmp r3, #62 @ 0x3e 8007e92: d921 bls.n 8007ed8 8007e94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007e98: 095b lsrs r3, r3, #5 8007e9a: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8007e9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007ea2: f003 031f and.w r3, r3, #31 8007ea6: 2b00 cmp r3, #0 8007ea8: d104 bne.n 8007eb4 8007eaa: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8007eae: 3b01 subs r3, #1 8007eb0: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8007eb4: 697b ldr r3, [r7, #20] 8007eb6: 881b ldrh r3, [r3, #0] 8007eb8: b29a uxth r2, r3 8007eba: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8007ebe: b29b uxth r3, r3 8007ec0: 029b lsls r3, r3, #10 8007ec2: b29b uxth r3, r3 8007ec4: 4313 orrs r3, r2 8007ec6: b29b uxth r3, r3 8007ec8: ea6f 4343 mvn.w r3, r3, lsl #17 8007ecc: ea6f 4353 mvn.w r3, r3, lsr #17 8007ed0: b29a uxth r2, r3 8007ed2: 697b ldr r3, [r7, #20] 8007ed4: 801a strh r2, [r3, #0] 8007ed6: e056 b.n 8007f86 8007ed8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007edc: 2b00 cmp r3, #0 8007ede: d10a bne.n 8007ef6 8007ee0: 697b ldr r3, [r7, #20] 8007ee2: 881b ldrh r3, [r3, #0] 8007ee4: b29b uxth r3, r3 8007ee6: ea6f 4343 mvn.w r3, r3, lsl #17 8007eea: ea6f 4353 mvn.w r3, r3, lsr #17 8007eee: b29a uxth r2, r3 8007ef0: 697b ldr r3, [r7, #20] 8007ef2: 801a strh r2, [r3, #0] 8007ef4: e047 b.n 8007f86 8007ef6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007efa: 085b lsrs r3, r3, #1 8007efc: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8007f00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007f04: f003 0301 and.w r3, r3, #1 8007f08: 2b00 cmp r3, #0 8007f0a: d004 beq.n 8007f16 8007f0c: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8007f10: 3301 adds r3, #1 8007f12: f8c7 30fc str.w r3, [r7, #252] @ 0xfc 8007f16: 697b ldr r3, [r7, #20] 8007f18: 881b ldrh r3, [r3, #0] 8007f1a: b29a uxth r2, r3 8007f1c: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8007f20: b29b uxth r3, r3 8007f22: 029b lsls r3, r3, #10 8007f24: b29b uxth r3, r3 8007f26: 4313 orrs r3, r2 8007f28: b29a uxth r2, r3 8007f2a: 697b ldr r3, [r7, #20] 8007f2c: 801a strh r2, [r3, #0] 8007f2e: e02a b.n 8007f86 8007f30: f507 7384 add.w r3, r7, #264 @ 0x108 8007f34: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007f38: 681b ldr r3, [r3, #0] 8007f3a: 785b ldrb r3, [r3, #1] 8007f3c: 2b01 cmp r3, #1 8007f3e: d122 bne.n 8007f86 8007f40: f507 7384 add.w r3, r7, #264 @ 0x108 8007f44: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007f48: 681b ldr r3, [r3, #0] 8007f4a: 623b str r3, [r7, #32] 8007f4c: f507 7384 add.w r3, r7, #264 @ 0x108 8007f50: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007f54: 681b ldr r3, [r3, #0] 8007f56: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007f5a: b29b uxth r3, r3 8007f5c: 461a mov r2, r3 8007f5e: 6a3b ldr r3, [r7, #32] 8007f60: 4413 add r3, r2 8007f62: 623b str r3, [r7, #32] 8007f64: f507 7384 add.w r3, r7, #264 @ 0x108 8007f68: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007f6c: 681b ldr r3, [r3, #0] 8007f6e: 781b ldrb r3, [r3, #0] 8007f70: 011a lsls r2, r3, #4 8007f72: 6a3b ldr r3, [r7, #32] 8007f74: 4413 add r3, r2 8007f76: f203 4304 addw r3, r3, #1028 @ 0x404 8007f7a: 61fb str r3, [r7, #28] 8007f7c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007f80: b29a uxth r2, r3 8007f82: 69fb ldr r3, [r7, #28] 8007f84: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8007f86: f507 7384 add.w r3, r7, #264 @ 0x108 8007f8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007f8e: 681b ldr r3, [r3, #0] 8007f90: 891b ldrh r3, [r3, #8] 8007f92: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8007f96: f507 7384 add.w r3, r7, #264 @ 0x108 8007f9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007f9e: 681b ldr r3, [r3, #0] 8007fa0: 6959 ldr r1, [r3, #20] 8007fa2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8007fa6: b29b uxth r3, r3 8007fa8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8007fac: f507 7084 add.w r0, r7, #264 @ 0x108 8007fb0: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8007fb4: 6800 ldr r0, [r0, #0] 8007fb6: f001 fa48 bl 800944a 8007fba: e3ee b.n 800879a } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 8007fbc: f507 7384 add.w r3, r7, #264 @ 0x108 8007fc0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007fc4: 681b ldr r3, [r3, #0] 8007fc6: 785b ldrb r3, [r3, #1] 8007fc8: 2b00 cmp r3, #0 8007fca: d177 bne.n 80080bc 8007fcc: f507 7384 add.w r3, r7, #264 @ 0x108 8007fd0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007fd4: 681b ldr r3, [r3, #0] 8007fd6: 64bb str r3, [r7, #72] @ 0x48 8007fd8: f507 7384 add.w r3, r7, #264 @ 0x108 8007fdc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8007fe0: 681b ldr r3, [r3, #0] 8007fe2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8007fe6: b29b uxth r3, r3 8007fe8: 461a mov r2, r3 8007fea: 6cbb ldr r3, [r7, #72] @ 0x48 8007fec: 4413 add r3, r2 8007fee: 64bb str r3, [r7, #72] @ 0x48 8007ff0: f507 7384 add.w r3, r7, #264 @ 0x108 8007ff4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8007ff8: 681b ldr r3, [r3, #0] 8007ffa: 781b ldrb r3, [r3, #0] 8007ffc: 011a lsls r2, r3, #4 8007ffe: 6cbb ldr r3, [r7, #72] @ 0x48 8008000: 4413 add r3, r2 8008002: f203 4304 addw r3, r3, #1028 @ 0x404 8008006: 647b str r3, [r7, #68] @ 0x44 8008008: 6c7b ldr r3, [r7, #68] @ 0x44 800800a: 881b ldrh r3, [r3, #0] 800800c: b29b uxth r3, r3 800800e: f3c3 0309 ubfx r3, r3, #0, #10 8008012: b29a uxth r2, r3 8008014: 6c7b ldr r3, [r7, #68] @ 0x44 8008016: 801a strh r2, [r3, #0] 8008018: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800801c: 2b3e cmp r3, #62 @ 0x3e 800801e: d921 bls.n 8008064 8008020: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008024: 095b lsrs r3, r3, #5 8008026: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 800802a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800802e: f003 031f and.w r3, r3, #31 8008032: 2b00 cmp r3, #0 8008034: d104 bne.n 8008040 8008036: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 800803a: 3b01 subs r3, #1 800803c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 8008040: 6c7b ldr r3, [r7, #68] @ 0x44 8008042: 881b ldrh r3, [r3, #0] 8008044: b29a uxth r2, r3 8008046: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 800804a: b29b uxth r3, r3 800804c: 029b lsls r3, r3, #10 800804e: b29b uxth r3, r3 8008050: 4313 orrs r3, r2 8008052: b29b uxth r3, r3 8008054: ea6f 4343 mvn.w r3, r3, lsl #17 8008058: ea6f 4353 mvn.w r3, r3, lsr #17 800805c: b29a uxth r2, r3 800805e: 6c7b ldr r3, [r7, #68] @ 0x44 8008060: 801a strh r2, [r3, #0] 8008062: e056 b.n 8008112 8008064: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008068: 2b00 cmp r3, #0 800806a: d10a bne.n 8008082 800806c: 6c7b ldr r3, [r7, #68] @ 0x44 800806e: 881b ldrh r3, [r3, #0] 8008070: b29b uxth r3, r3 8008072: ea6f 4343 mvn.w r3, r3, lsl #17 8008076: ea6f 4353 mvn.w r3, r3, lsr #17 800807a: b29a uxth r2, r3 800807c: 6c7b ldr r3, [r7, #68] @ 0x44 800807e: 801a strh r2, [r3, #0] 8008080: e047 b.n 8008112 8008082: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008086: 085b lsrs r3, r3, #1 8008088: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 800808c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008090: f003 0301 and.w r3, r3, #1 8008094: 2b00 cmp r3, #0 8008096: d004 beq.n 80080a2 8008098: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 800809c: 3301 adds r3, #1 800809e: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 80080a2: 6c7b ldr r3, [r7, #68] @ 0x44 80080a4: 881b ldrh r3, [r3, #0] 80080a6: b29a uxth r2, r3 80080a8: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 80080ac: b29b uxth r3, r3 80080ae: 029b lsls r3, r3, #10 80080b0: b29b uxth r3, r3 80080b2: 4313 orrs r3, r2 80080b4: b29a uxth r2, r3 80080b6: 6c7b ldr r3, [r7, #68] @ 0x44 80080b8: 801a strh r2, [r3, #0] 80080ba: e02a b.n 8008112 80080bc: f507 7384 add.w r3, r7, #264 @ 0x108 80080c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80080c4: 681b ldr r3, [r3, #0] 80080c6: 785b ldrb r3, [r3, #1] 80080c8: 2b01 cmp r3, #1 80080ca: d122 bne.n 8008112 80080cc: f507 7384 add.w r3, r7, #264 @ 0x108 80080d0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80080d4: 681b ldr r3, [r3, #0] 80080d6: 653b str r3, [r7, #80] @ 0x50 80080d8: f507 7384 add.w r3, r7, #264 @ 0x108 80080dc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80080e0: 681b ldr r3, [r3, #0] 80080e2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80080e6: b29b uxth r3, r3 80080e8: 461a mov r2, r3 80080ea: 6d3b ldr r3, [r7, #80] @ 0x50 80080ec: 4413 add r3, r2 80080ee: 653b str r3, [r7, #80] @ 0x50 80080f0: f507 7384 add.w r3, r7, #264 @ 0x108 80080f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80080f8: 681b ldr r3, [r3, #0] 80080fa: 781b ldrb r3, [r3, #0] 80080fc: 011a lsls r2, r3, #4 80080fe: 6d3b ldr r3, [r7, #80] @ 0x50 8008100: 4413 add r3, r2 8008102: f203 4304 addw r3, r3, #1028 @ 0x404 8008106: 64fb str r3, [r7, #76] @ 0x4c 8008108: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800810c: b29a uxth r2, r3 800810e: 6cfb ldr r3, [r7, #76] @ 0x4c 8008110: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8008112: f507 7384 add.w r3, r7, #264 @ 0x108 8008116: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800811a: 681b ldr r3, [r3, #0] 800811c: 891b ldrh r3, [r3, #8] 800811e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8008122: f507 7384 add.w r3, r7, #264 @ 0x108 8008126: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800812a: 681b ldr r3, [r3, #0] 800812c: 6959 ldr r1, [r3, #20] 800812e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008132: b29b uxth r3, r3 8008134: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8008138: f507 7084 add.w r0, r7, #264 @ 0x108 800813c: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8008140: 6800 ldr r0, [r0, #0] 8008142: f001 f982 bl 800944a ep->xfer_buff += len; 8008146: f507 7384 add.w r3, r7, #264 @ 0x108 800814a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800814e: 681b ldr r3, [r3, #0] 8008150: 695a ldr r2, [r3, #20] 8008152: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008156: 441a add r2, r3 8008158: f507 7384 add.w r3, r7, #264 @ 0x108 800815c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008160: 681b ldr r3, [r3, #0] 8008162: 615a str r2, [r3, #20] if (ep->xfer_len_db > ep->maxpacket) 8008164: f507 7384 add.w r3, r7, #264 @ 0x108 8008168: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800816c: 681b ldr r3, [r3, #0] 800816e: 6a1a ldr r2, [r3, #32] 8008170: f507 7384 add.w r3, r7, #264 @ 0x108 8008174: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008178: 681b ldr r3, [r3, #0] 800817a: 691b ldr r3, [r3, #16] 800817c: 429a cmp r2, r3 800817e: d90f bls.n 80081a0 { ep->xfer_len_db -= len; 8008180: f507 7384 add.w r3, r7, #264 @ 0x108 8008184: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008188: 681b ldr r3, [r3, #0] 800818a: 6a1a ldr r2, [r3, #32] 800818c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008190: 1ad2 subs r2, r2, r3 8008192: f507 7384 add.w r3, r7, #264 @ 0x108 8008196: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800819a: 681b ldr r3, [r3, #0] 800819c: 621a str r2, [r3, #32] 800819e: e00e b.n 80081be } else { len = ep->xfer_len_db; 80081a0: f507 7384 add.w r3, r7, #264 @ 0x108 80081a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80081a8: 681b ldr r3, [r3, #0] 80081aa: 6a1b ldr r3, [r3, #32] 80081ac: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len_db = 0U; 80081b0: f507 7384 add.w r3, r7, #264 @ 0x108 80081b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80081b8: 681b ldr r3, [r3, #0] 80081ba: 2200 movs r2, #0 80081bc: 621a str r2, [r3, #32] } /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 80081be: f507 7384 add.w r3, r7, #264 @ 0x108 80081c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80081c6: 681b ldr r3, [r3, #0] 80081c8: 643b str r3, [r7, #64] @ 0x40 80081ca: f507 7384 add.w r3, r7, #264 @ 0x108 80081ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80081d2: 681b ldr r3, [r3, #0] 80081d4: 785b ldrb r3, [r3, #1] 80081d6: 2b00 cmp r3, #0 80081d8: d177 bne.n 80082ca 80081da: f507 7384 add.w r3, r7, #264 @ 0x108 80081de: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80081e2: 681b ldr r3, [r3, #0] 80081e4: 63bb str r3, [r7, #56] @ 0x38 80081e6: f507 7384 add.w r3, r7, #264 @ 0x108 80081ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80081ee: 681b ldr r3, [r3, #0] 80081f0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80081f4: b29b uxth r3, r3 80081f6: 461a mov r2, r3 80081f8: 6bbb ldr r3, [r7, #56] @ 0x38 80081fa: 4413 add r3, r2 80081fc: 63bb str r3, [r7, #56] @ 0x38 80081fe: f507 7384 add.w r3, r7, #264 @ 0x108 8008202: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008206: 681b ldr r3, [r3, #0] 8008208: 781b ldrb r3, [r3, #0] 800820a: 011a lsls r2, r3, #4 800820c: 6bbb ldr r3, [r7, #56] @ 0x38 800820e: 4413 add r3, r2 8008210: f203 430c addw r3, r3, #1036 @ 0x40c 8008214: 637b str r3, [r7, #52] @ 0x34 8008216: 6b7b ldr r3, [r7, #52] @ 0x34 8008218: 881b ldrh r3, [r3, #0] 800821a: b29b uxth r3, r3 800821c: f3c3 0309 ubfx r3, r3, #0, #10 8008220: b29a uxth r2, r3 8008222: 6b7b ldr r3, [r7, #52] @ 0x34 8008224: 801a strh r2, [r3, #0] 8008226: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800822a: 2b3e cmp r3, #62 @ 0x3e 800822c: d921 bls.n 8008272 800822e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008232: 095b lsrs r3, r3, #5 8008234: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 8008238: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800823c: f003 031f and.w r3, r3, #31 8008240: 2b00 cmp r3, #0 8008242: d104 bne.n 800824e 8008244: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8008248: 3b01 subs r3, #1 800824a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800824e: 6b7b ldr r3, [r7, #52] @ 0x34 8008250: 881b ldrh r3, [r3, #0] 8008252: b29a uxth r2, r3 8008254: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8008258: b29b uxth r3, r3 800825a: 029b lsls r3, r3, #10 800825c: b29b uxth r3, r3 800825e: 4313 orrs r3, r2 8008260: b29b uxth r3, r3 8008262: ea6f 4343 mvn.w r3, r3, lsl #17 8008266: ea6f 4353 mvn.w r3, r3, lsr #17 800826a: b29a uxth r2, r3 800826c: 6b7b ldr r3, [r7, #52] @ 0x34 800826e: 801a strh r2, [r3, #0] 8008270: e050 b.n 8008314 8008272: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008276: 2b00 cmp r3, #0 8008278: d10a bne.n 8008290 800827a: 6b7b ldr r3, [r7, #52] @ 0x34 800827c: 881b ldrh r3, [r3, #0] 800827e: b29b uxth r3, r3 8008280: ea6f 4343 mvn.w r3, r3, lsl #17 8008284: ea6f 4353 mvn.w r3, r3, lsr #17 8008288: b29a uxth r2, r3 800828a: 6b7b ldr r3, [r7, #52] @ 0x34 800828c: 801a strh r2, [r3, #0] 800828e: e041 b.n 8008314 8008290: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008294: 085b lsrs r3, r3, #1 8008296: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 800829a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800829e: f003 0301 and.w r3, r3, #1 80082a2: 2b00 cmp r3, #0 80082a4: d004 beq.n 80082b0 80082a6: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80082aa: 3301 adds r3, #1 80082ac: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4 80082b0: 6b7b ldr r3, [r7, #52] @ 0x34 80082b2: 881b ldrh r3, [r3, #0] 80082b4: b29a uxth r2, r3 80082b6: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80082ba: b29b uxth r3, r3 80082bc: 029b lsls r3, r3, #10 80082be: b29b uxth r3, r3 80082c0: 4313 orrs r3, r2 80082c2: b29a uxth r2, r3 80082c4: 6b7b ldr r3, [r7, #52] @ 0x34 80082c6: 801a strh r2, [r3, #0] 80082c8: e024 b.n 8008314 80082ca: f507 7384 add.w r3, r7, #264 @ 0x108 80082ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80082d2: 681b ldr r3, [r3, #0] 80082d4: 785b ldrb r3, [r3, #1] 80082d6: 2b01 cmp r3, #1 80082d8: d11c bne.n 8008314 80082da: f507 7384 add.w r3, r7, #264 @ 0x108 80082de: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80082e2: 681b ldr r3, [r3, #0] 80082e4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80082e8: b29b uxth r3, r3 80082ea: 461a mov r2, r3 80082ec: 6c3b ldr r3, [r7, #64] @ 0x40 80082ee: 4413 add r3, r2 80082f0: 643b str r3, [r7, #64] @ 0x40 80082f2: f507 7384 add.w r3, r7, #264 @ 0x108 80082f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80082fa: 681b ldr r3, [r3, #0] 80082fc: 781b ldrb r3, [r3, #0] 80082fe: 011a lsls r2, r3, #4 8008300: 6c3b ldr r3, [r7, #64] @ 0x40 8008302: 4413 add r3, r2 8008304: f203 430c addw r3, r3, #1036 @ 0x40c 8008308: 63fb str r3, [r7, #60] @ 0x3c 800830a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800830e: b29a uxth r2, r3 8008310: 6bfb ldr r3, [r7, #60] @ 0x3c 8008312: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 8008314: f507 7384 add.w r3, r7, #264 @ 0x108 8008318: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800831c: 681b ldr r3, [r3, #0] 800831e: 895b ldrh r3, [r3, #10] 8008320: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8008324: f507 7384 add.w r3, r7, #264 @ 0x108 8008328: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800832c: 681b ldr r3, [r3, #0] 800832e: 6959 ldr r1, [r3, #20] 8008330: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008334: b29b uxth r3, r3 8008336: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800833a: f507 7084 add.w r0, r7, #264 @ 0x108 800833e: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8008342: 6800 ldr r0, [r0, #0] 8008344: f001 f881 bl 800944a 8008348: e227 b.n 800879a } } /* auto Switch to single buffer mode when transfer xfer_len_db; 800834a: f507 7384 add.w r3, r7, #264 @ 0x108 800834e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008352: 681b ldr r3, [r3, #0] 8008354: 6a1b ldr r3, [r3, #32] 8008356: f8c7 3104 str.w r3, [r7, #260] @ 0x104 /* disable double buffer mode for Bulk endpoint */ PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num); 800835a: f507 7384 add.w r3, r7, #264 @ 0x108 800835e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008362: 681a ldr r2, [r3, #0] 8008364: f507 7384 add.w r3, r7, #264 @ 0x108 8008368: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800836c: 681b ldr r3, [r3, #0] 800836e: 781b ldrb r3, [r3, #0] 8008370: 009b lsls r3, r3, #2 8008372: 4413 add r3, r2 8008374: 881b ldrh r3, [r3, #0] 8008376: b29b uxth r3, r3 8008378: f423 43e2 bic.w r3, r3, #28928 @ 0x7100 800837c: f023 0370 bic.w r3, r3, #112 @ 0x70 8008380: f8a7 3062 strh.w r3, [r7, #98] @ 0x62 8008384: f507 7384 add.w r3, r7, #264 @ 0x108 8008388: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800838c: 681a ldr r2, [r3, #0] 800838e: f507 7384 add.w r3, r7, #264 @ 0x108 8008392: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008396: 681b ldr r3, [r3, #0] 8008398: 781b ldrb r3, [r3, #0] 800839a: 009b lsls r3, r3, #2 800839c: 441a add r2, r3 800839e: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62 80083a2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80083a6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80083aa: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80083ae: f043 0380 orr.w r3, r3, #128 @ 0x80 80083b2: b29b uxth r3, r3 80083b4: 8013 strh r3, [r2, #0] /* Set Tx count with nbre of byte to be transmitted */ PCD_SET_EP_TX_CNT(USBx, ep->num, len); 80083b6: f507 7384 add.w r3, r7, #264 @ 0x108 80083ba: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80083be: 681b ldr r3, [r3, #0] 80083c0: 65fb str r3, [r7, #92] @ 0x5c 80083c2: f507 7384 add.w r3, r7, #264 @ 0x108 80083c6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80083ca: 681b ldr r3, [r3, #0] 80083cc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80083d0: b29b uxth r3, r3 80083d2: 461a mov r2, r3 80083d4: 6dfb ldr r3, [r7, #92] @ 0x5c 80083d6: 4413 add r3, r2 80083d8: 65fb str r3, [r7, #92] @ 0x5c 80083da: f507 7384 add.w r3, r7, #264 @ 0x108 80083de: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80083e2: 681b ldr r3, [r3, #0] 80083e4: 781b ldrb r3, [r3, #0] 80083e6: 011a lsls r2, r3, #4 80083e8: 6dfb ldr r3, [r7, #92] @ 0x5c 80083ea: 4413 add r3, r2 80083ec: f203 4304 addw r3, r3, #1028 @ 0x404 80083f0: 65bb str r3, [r7, #88] @ 0x58 80083f2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80083f6: b29a uxth r2, r3 80083f8: 6dbb ldr r3, [r7, #88] @ 0x58 80083fa: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 80083fc: f507 7384 add.w r3, r7, #264 @ 0x108 8008400: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008404: 681b ldr r3, [r3, #0] 8008406: 891b ldrh r3, [r3, #8] 8008408: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 800840c: f507 7384 add.w r3, r7, #264 @ 0x108 8008410: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008414: 681b ldr r3, [r3, #0] 8008416: 6959 ldr r1, [r3, #20] 8008418: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800841c: b29b uxth r3, r3 800841e: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 8008422: f507 7084 add.w r0, r7, #264 @ 0x108 8008426: f5a0 7082 sub.w r0, r0, #260 @ 0x104 800842a: 6800 ldr r0, [r0, #0] 800842c: f001 f80d bl 800944a 8008430: e1b3 b.n 800879a } } else /* manage isochronous double buffer IN mode */ { /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; 8008432: f507 7384 add.w r3, r7, #264 @ 0x108 8008436: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800843a: 681b ldr r3, [r3, #0] 800843c: 6a1a ldr r2, [r3, #32] 800843e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008442: 1ad2 subs r2, r2, r3 8008444: f507 7384 add.w r3, r7, #264 @ 0x108 8008448: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800844c: 681b ldr r3, [r3, #0] 800844e: 621a str r2, [r3, #32] /* Fill the data buffer */ if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) 8008450: f507 7384 add.w r3, r7, #264 @ 0x108 8008454: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008458: 681a ldr r2, [r3, #0] 800845a: f507 7384 add.w r3, r7, #264 @ 0x108 800845e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008462: 681b ldr r3, [r3, #0] 8008464: 781b ldrb r3, [r3, #0] 8008466: 009b lsls r3, r3, #2 8008468: 4413 add r3, r2 800846a: 881b ldrh r3, [r3, #0] 800846c: b29b uxth r3, r3 800846e: f003 0340 and.w r3, r3, #64 @ 0x40 8008472: 2b00 cmp r3, #0 8008474: f000 80c6 beq.w 8008604 { /* Set the Double buffer counter for pmabuffer1 */ PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); 8008478: f507 7384 add.w r3, r7, #264 @ 0x108 800847c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008480: 681b ldr r3, [r3, #0] 8008482: 673b str r3, [r7, #112] @ 0x70 8008484: f507 7384 add.w r3, r7, #264 @ 0x108 8008488: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800848c: 681b ldr r3, [r3, #0] 800848e: 785b ldrb r3, [r3, #1] 8008490: 2b00 cmp r3, #0 8008492: d177 bne.n 8008584 8008494: f507 7384 add.w r3, r7, #264 @ 0x108 8008498: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800849c: 681b ldr r3, [r3, #0] 800849e: 66bb str r3, [r7, #104] @ 0x68 80084a0: f507 7384 add.w r3, r7, #264 @ 0x108 80084a4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80084a8: 681b ldr r3, [r3, #0] 80084aa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80084ae: b29b uxth r3, r3 80084b0: 461a mov r2, r3 80084b2: 6ebb ldr r3, [r7, #104] @ 0x68 80084b4: 4413 add r3, r2 80084b6: 66bb str r3, [r7, #104] @ 0x68 80084b8: f507 7384 add.w r3, r7, #264 @ 0x108 80084bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80084c0: 681b ldr r3, [r3, #0] 80084c2: 781b ldrb r3, [r3, #0] 80084c4: 011a lsls r2, r3, #4 80084c6: 6ebb ldr r3, [r7, #104] @ 0x68 80084c8: 4413 add r3, r2 80084ca: f203 430c addw r3, r3, #1036 @ 0x40c 80084ce: 667b str r3, [r7, #100] @ 0x64 80084d0: 6e7b ldr r3, [r7, #100] @ 0x64 80084d2: 881b ldrh r3, [r3, #0] 80084d4: b29b uxth r3, r3 80084d6: f3c3 0309 ubfx r3, r3, #0, #10 80084da: b29a uxth r2, r3 80084dc: 6e7b ldr r3, [r7, #100] @ 0x64 80084de: 801a strh r2, [r3, #0] 80084e0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80084e4: 2b3e cmp r3, #62 @ 0x3e 80084e6: d921 bls.n 800852c 80084e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80084ec: 095b lsrs r3, r3, #5 80084ee: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 80084f2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80084f6: f003 031f and.w r3, r3, #31 80084fa: 2b00 cmp r3, #0 80084fc: d104 bne.n 8008508 80084fe: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 8008502: 3b01 subs r3, #1 8008504: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 8008508: 6e7b ldr r3, [r7, #100] @ 0x64 800850a: 881b ldrh r3, [r3, #0] 800850c: b29a uxth r2, r3 800850e: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 8008512: b29b uxth r3, r3 8008514: 029b lsls r3, r3, #10 8008516: b29b uxth r3, r3 8008518: 4313 orrs r3, r2 800851a: b29b uxth r3, r3 800851c: ea6f 4343 mvn.w r3, r3, lsl #17 8008520: ea6f 4353 mvn.w r3, r3, lsr #17 8008524: b29a uxth r2, r3 8008526: 6e7b ldr r3, [r7, #100] @ 0x64 8008528: 801a strh r2, [r3, #0] 800852a: e050 b.n 80085ce 800852c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008530: 2b00 cmp r3, #0 8008532: d10a bne.n 800854a 8008534: 6e7b ldr r3, [r7, #100] @ 0x64 8008536: 881b ldrh r3, [r3, #0] 8008538: b29b uxth r3, r3 800853a: ea6f 4343 mvn.w r3, r3, lsl #17 800853e: ea6f 4353 mvn.w r3, r3, lsr #17 8008542: b29a uxth r2, r3 8008544: 6e7b ldr r3, [r7, #100] @ 0x64 8008546: 801a strh r2, [r3, #0] 8008548: e041 b.n 80085ce 800854a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800854e: 085b lsrs r3, r3, #1 8008550: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 8008554: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008558: f003 0301 and.w r3, r3, #1 800855c: 2b00 cmp r3, #0 800855e: d004 beq.n 800856a 8008560: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 8008564: 3301 adds r3, #1 8008566: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0 800856a: 6e7b ldr r3, [r7, #100] @ 0x64 800856c: 881b ldrh r3, [r3, #0] 800856e: b29a uxth r2, r3 8008570: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0 8008574: b29b uxth r3, r3 8008576: 029b lsls r3, r3, #10 8008578: b29b uxth r3, r3 800857a: 4313 orrs r3, r2 800857c: b29a uxth r2, r3 800857e: 6e7b ldr r3, [r7, #100] @ 0x64 8008580: 801a strh r2, [r3, #0] 8008582: e024 b.n 80085ce 8008584: f507 7384 add.w r3, r7, #264 @ 0x108 8008588: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800858c: 681b ldr r3, [r3, #0] 800858e: 785b ldrb r3, [r3, #1] 8008590: 2b01 cmp r3, #1 8008592: d11c bne.n 80085ce 8008594: f507 7384 add.w r3, r7, #264 @ 0x108 8008598: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800859c: 681b ldr r3, [r3, #0] 800859e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80085a2: b29b uxth r3, r3 80085a4: 461a mov r2, r3 80085a6: 6f3b ldr r3, [r7, #112] @ 0x70 80085a8: 4413 add r3, r2 80085aa: 673b str r3, [r7, #112] @ 0x70 80085ac: f507 7384 add.w r3, r7, #264 @ 0x108 80085b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80085b4: 681b ldr r3, [r3, #0] 80085b6: 781b ldrb r3, [r3, #0] 80085b8: 011a lsls r2, r3, #4 80085ba: 6f3b ldr r3, [r7, #112] @ 0x70 80085bc: 4413 add r3, r2 80085be: f203 430c addw r3, r3, #1036 @ 0x40c 80085c2: 66fb str r3, [r7, #108] @ 0x6c 80085c4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80085c8: b29a uxth r2, r3 80085ca: 6efb ldr r3, [r7, #108] @ 0x6c 80085cc: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr1; 80085ce: f507 7384 add.w r3, r7, #264 @ 0x108 80085d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80085d6: 681b ldr r3, [r3, #0] 80085d8: 895b ldrh r3, [r3, #10] 80085da: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 80085de: f507 7384 add.w r3, r7, #264 @ 0x108 80085e2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80085e6: 681b ldr r3, [r3, #0] 80085e8: 6959 ldr r1, [r3, #20] 80085ea: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80085ee: b29b uxth r3, r3 80085f0: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 80085f4: f507 7084 add.w r0, r7, #264 @ 0x108 80085f8: f5a0 7082 sub.w r0, r0, #260 @ 0x104 80085fc: 6800 ldr r0, [r0, #0] 80085fe: f000 ff24 bl 800944a 8008602: e0ca b.n 800879a } else { /* Set the Double buffer counter for pmabuffer0 */ PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); 8008604: f507 7384 add.w r3, r7, #264 @ 0x108 8008608: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800860c: 681b ldr r3, [r3, #0] 800860e: 785b ldrb r3, [r3, #1] 8008610: 2b00 cmp r3, #0 8008612: d177 bne.n 8008704 8008614: f507 7384 add.w r3, r7, #264 @ 0x108 8008618: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800861c: 681b ldr r3, [r3, #0] 800861e: 67fb str r3, [r7, #124] @ 0x7c 8008620: f507 7384 add.w r3, r7, #264 @ 0x108 8008624: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008628: 681b ldr r3, [r3, #0] 800862a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800862e: b29b uxth r3, r3 8008630: 461a mov r2, r3 8008632: 6ffb ldr r3, [r7, #124] @ 0x7c 8008634: 4413 add r3, r2 8008636: 67fb str r3, [r7, #124] @ 0x7c 8008638: f507 7384 add.w r3, r7, #264 @ 0x108 800863c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008640: 681b ldr r3, [r3, #0] 8008642: 781b ldrb r3, [r3, #0] 8008644: 011a lsls r2, r3, #4 8008646: 6ffb ldr r3, [r7, #124] @ 0x7c 8008648: 4413 add r3, r2 800864a: f203 4304 addw r3, r3, #1028 @ 0x404 800864e: 67bb str r3, [r7, #120] @ 0x78 8008650: 6fbb ldr r3, [r7, #120] @ 0x78 8008652: 881b ldrh r3, [r3, #0] 8008654: b29b uxth r3, r3 8008656: f3c3 0309 ubfx r3, r3, #0, #10 800865a: b29a uxth r2, r3 800865c: 6fbb ldr r3, [r7, #120] @ 0x78 800865e: 801a strh r2, [r3, #0] 8008660: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008664: 2b3e cmp r3, #62 @ 0x3e 8008666: d921 bls.n 80086ac 8008668: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800866c: 095b lsrs r3, r3, #5 800866e: f8c7 30ec str.w r3, [r7, #236] @ 0xec 8008672: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008676: f003 031f and.w r3, r3, #31 800867a: 2b00 cmp r3, #0 800867c: d104 bne.n 8008688 800867e: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 8008682: 3b01 subs r3, #1 8008684: f8c7 30ec str.w r3, [r7, #236] @ 0xec 8008688: 6fbb ldr r3, [r7, #120] @ 0x78 800868a: 881b ldrh r3, [r3, #0] 800868c: b29a uxth r2, r3 800868e: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 8008692: b29b uxth r3, r3 8008694: 029b lsls r3, r3, #10 8008696: b29b uxth r3, r3 8008698: 4313 orrs r3, r2 800869a: b29b uxth r3, r3 800869c: ea6f 4343 mvn.w r3, r3, lsl #17 80086a0: ea6f 4353 mvn.w r3, r3, lsr #17 80086a4: b29a uxth r2, r3 80086a6: 6fbb ldr r3, [r7, #120] @ 0x78 80086a8: 801a strh r2, [r3, #0] 80086aa: e05c b.n 8008766 80086ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80086b0: 2b00 cmp r3, #0 80086b2: d10a bne.n 80086ca 80086b4: 6fbb ldr r3, [r7, #120] @ 0x78 80086b6: 881b ldrh r3, [r3, #0] 80086b8: b29b uxth r3, r3 80086ba: ea6f 4343 mvn.w r3, r3, lsl #17 80086be: ea6f 4353 mvn.w r3, r3, lsr #17 80086c2: b29a uxth r2, r3 80086c4: 6fbb ldr r3, [r7, #120] @ 0x78 80086c6: 801a strh r2, [r3, #0] 80086c8: e04d b.n 8008766 80086ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80086ce: 085b lsrs r3, r3, #1 80086d0: f8c7 30ec str.w r3, [r7, #236] @ 0xec 80086d4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80086d8: f003 0301 and.w r3, r3, #1 80086dc: 2b00 cmp r3, #0 80086de: d004 beq.n 80086ea 80086e0: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 80086e4: 3301 adds r3, #1 80086e6: f8c7 30ec str.w r3, [r7, #236] @ 0xec 80086ea: 6fbb ldr r3, [r7, #120] @ 0x78 80086ec: 881b ldrh r3, [r3, #0] 80086ee: b29a uxth r2, r3 80086f0: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec 80086f4: b29b uxth r3, r3 80086f6: 029b lsls r3, r3, #10 80086f8: b29b uxth r3, r3 80086fa: 4313 orrs r3, r2 80086fc: b29a uxth r2, r3 80086fe: 6fbb ldr r3, [r7, #120] @ 0x78 8008700: 801a strh r2, [r3, #0] 8008702: e030 b.n 8008766 8008704: f507 7384 add.w r3, r7, #264 @ 0x108 8008708: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800870c: 681b ldr r3, [r3, #0] 800870e: 785b ldrb r3, [r3, #1] 8008710: 2b01 cmp r3, #1 8008712: d128 bne.n 8008766 8008714: f507 7384 add.w r3, r7, #264 @ 0x108 8008718: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800871c: 681b ldr r3, [r3, #0] 800871e: f8c7 3084 str.w r3, [r7, #132] @ 0x84 8008722: f507 7384 add.w r3, r7, #264 @ 0x108 8008726: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800872a: 681b ldr r3, [r3, #0] 800872c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008730: b29b uxth r3, r3 8008732: 461a mov r2, r3 8008734: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8008738: 4413 add r3, r2 800873a: f8c7 3084 str.w r3, [r7, #132] @ 0x84 800873e: f507 7384 add.w r3, r7, #264 @ 0x108 8008742: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008746: 681b ldr r3, [r3, #0] 8008748: 781b ldrb r3, [r3, #0] 800874a: 011a lsls r2, r3, #4 800874c: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 8008750: 4413 add r3, r2 8008752: f203 4304 addw r3, r3, #1028 @ 0x404 8008756: f8c7 3080 str.w r3, [r7, #128] @ 0x80 800875a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800875e: b29a uxth r2, r3 8008760: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8008764: 801a strh r2, [r3, #0] pmabuffer = ep->pmaaddr0; 8008766: f507 7384 add.w r3, r7, #264 @ 0x108 800876a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800876e: 681b ldr r3, [r3, #0] 8008770: 891b ldrh r3, [r3, #8] 8008772: f8a7 3076 strh.w r3, [r7, #118] @ 0x76 /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); 8008776: f507 7384 add.w r3, r7, #264 @ 0x108 800877a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800877e: 681b ldr r3, [r3, #0] 8008780: 6959 ldr r1, [r3, #20] 8008782: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008786: b29b uxth r3, r3 8008788: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76 800878c: f507 7084 add.w r0, r7, #264 @ 0x108 8008790: f5a0 7082 sub.w r0, r0, #260 @ 0x104 8008794: 6800 ldr r0, [r0, #0] 8008796: f000 fe58 bl 800944a } } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); 800879a: f507 7384 add.w r3, r7, #264 @ 0x108 800879e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80087a2: 681a ldr r2, [r3, #0] 80087a4: f507 7384 add.w r3, r7, #264 @ 0x108 80087a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80087ac: 681b ldr r3, [r3, #0] 80087ae: 781b ldrb r3, [r3, #0] 80087b0: 009b lsls r3, r3, #2 80087b2: 4413 add r3, r2 80087b4: 881b ldrh r3, [r3, #0] 80087b6: b29b uxth r3, r3 80087b8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80087bc: f023 0340 bic.w r3, r3, #64 @ 0x40 80087c0: 817b strh r3, [r7, #10] 80087c2: 897b ldrh r3, [r7, #10] 80087c4: f083 0310 eor.w r3, r3, #16 80087c8: 817b strh r3, [r7, #10] 80087ca: 897b ldrh r3, [r7, #10] 80087cc: f083 0320 eor.w r3, r3, #32 80087d0: 817b strh r3, [r7, #10] 80087d2: f507 7384 add.w r3, r7, #264 @ 0x108 80087d6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80087da: 681a ldr r2, [r3, #0] 80087dc: f507 7384 add.w r3, r7, #264 @ 0x108 80087e0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80087e4: 681b ldr r3, [r3, #0] 80087e6: 781b ldrb r3, [r3, #0] 80087e8: 009b lsls r3, r3, #2 80087ea: 441a add r2, r3 80087ec: 897b ldrh r3, [r7, #10] 80087ee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80087f2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80087f6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80087fa: f043 0380 orr.w r3, r3, #128 @ 0x80 80087fe: b29b uxth r3, r3 8008800: 8013 strh r3, [r2, #0] 8008802: f000 bcde b.w 80091c2 } else /* OUT endpoint */ { if (ep->doublebuffer == 0U) 8008806: f507 7384 add.w r3, r7, #264 @ 0x108 800880a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800880e: 681b ldr r3, [r3, #0] 8008810: 7b1b ldrb r3, [r3, #12] 8008812: 2b00 cmp r3, #0 8008814: f040 80bb bne.w 800898e { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 8008818: f507 7384 add.w r3, r7, #264 @ 0x108 800881c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008820: 681b ldr r3, [r3, #0] 8008822: 699a ldr r2, [r3, #24] 8008824: f507 7384 add.w r3, r7, #264 @ 0x108 8008828: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800882c: 681b ldr r3, [r3, #0] 800882e: 691b ldr r3, [r3, #16] 8008830: 429a cmp r2, r3 8008832: d917 bls.n 8008864 { len = ep->maxpacket; 8008834: f507 7384 add.w r3, r7, #264 @ 0x108 8008838: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800883c: 681b ldr r3, [r3, #0] 800883e: 691b ldr r3, [r3, #16] 8008840: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 8008844: f507 7384 add.w r3, r7, #264 @ 0x108 8008848: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800884c: 681b ldr r3, [r3, #0] 800884e: 699a ldr r2, [r3, #24] 8008850: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008854: 1ad2 subs r2, r2, r3 8008856: f507 7384 add.w r3, r7, #264 @ 0x108 800885a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800885e: 681b ldr r3, [r3, #0] 8008860: 619a str r2, [r3, #24] 8008862: e00e b.n 8008882 } else { len = ep->xfer_len; 8008864: f507 7384 add.w r3, r7, #264 @ 0x108 8008868: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800886c: 681b ldr r3, [r3, #0] 800886e: 699b ldr r3, [r3, #24] 8008870: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 8008874: f507 7384 add.w r3, r7, #264 @ 0x108 8008878: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800887c: 681b ldr r3, [r3, #0] 800887e: 2200 movs r2, #0 8008880: 619a str r2, [r3, #24] } /* configure and validate Rx endpoint */ PCD_SET_EP_RX_CNT(USBx, ep->num, len); 8008882: f507 7384 add.w r3, r7, #264 @ 0x108 8008886: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800888a: 681b ldr r3, [r3, #0] 800888c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 8008890: f507 7384 add.w r3, r7, #264 @ 0x108 8008894: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008898: 681b ldr r3, [r3, #0] 800889a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 800889e: b29b uxth r3, r3 80088a0: 461a mov r2, r3 80088a2: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 80088a6: 4413 add r3, r2 80088a8: f8c7 3090 str.w r3, [r7, #144] @ 0x90 80088ac: f507 7384 add.w r3, r7, #264 @ 0x108 80088b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80088b4: 681b ldr r3, [r3, #0] 80088b6: 781b ldrb r3, [r3, #0] 80088b8: 011a lsls r2, r3, #4 80088ba: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90 80088be: 4413 add r3, r2 80088c0: f203 430c addw r3, r3, #1036 @ 0x40c 80088c4: f8c7 308c str.w r3, [r7, #140] @ 0x8c 80088c8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80088cc: 881b ldrh r3, [r3, #0] 80088ce: b29b uxth r3, r3 80088d0: f3c3 0309 ubfx r3, r3, #0, #10 80088d4: b29a uxth r2, r3 80088d6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 80088da: 801a strh r2, [r3, #0] 80088dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80088e0: 2b3e cmp r3, #62 @ 0x3e 80088e2: d924 bls.n 800892e 80088e4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80088e8: 095b lsrs r3, r3, #5 80088ea: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 80088ee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80088f2: f003 031f and.w r3, r3, #31 80088f6: 2b00 cmp r3, #0 80088f8: d104 bne.n 8008904 80088fa: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 80088fe: 3b01 subs r3, #1 8008900: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 8008904: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8008908: 881b ldrh r3, [r3, #0] 800890a: b29a uxth r2, r3 800890c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 8008910: b29b uxth r3, r3 8008912: 029b lsls r3, r3, #10 8008914: b29b uxth r3, r3 8008916: 4313 orrs r3, r2 8008918: b29b uxth r3, r3 800891a: ea6f 4343 mvn.w r3, r3, lsl #17 800891e: ea6f 4353 mvn.w r3, r3, lsr #17 8008922: b29a uxth r2, r3 8008924: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8008928: 801a strh r2, [r3, #0] 800892a: f000 bc10 b.w 800914e 800892e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008932: 2b00 cmp r3, #0 8008934: d10c bne.n 8008950 8008936: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800893a: 881b ldrh r3, [r3, #0] 800893c: b29b uxth r3, r3 800893e: ea6f 4343 mvn.w r3, r3, lsl #17 8008942: ea6f 4353 mvn.w r3, r3, lsr #17 8008946: b29a uxth r2, r3 8008948: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800894c: 801a strh r2, [r3, #0] 800894e: e3fe b.n 800914e 8008950: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008954: 085b lsrs r3, r3, #1 8008956: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 800895a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800895e: f003 0301 and.w r3, r3, #1 8008962: 2b00 cmp r3, #0 8008964: d004 beq.n 8008970 8008966: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800896a: 3301 adds r3, #1 800896c: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 8008970: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8008974: 881b ldrh r3, [r3, #0] 8008976: b29a uxth r2, r3 8008978: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8 800897c: b29b uxth r3, r3 800897e: 029b lsls r3, r3, #10 8008980: b29b uxth r3, r3 8008982: 4313 orrs r3, r2 8008984: b29a uxth r2, r3 8008986: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 800898a: 801a strh r2, [r3, #0] 800898c: e3df b.n 800914e #if (USE_USB_DOUBLE_BUFFER == 1U) else { /* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */ /* Set the Double buffer counter */ if (ep->type == EP_TYPE_BULK) 800898e: f507 7384 add.w r3, r7, #264 @ 0x108 8008992: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008996: 681b ldr r3, [r3, #0] 8008998: 78db ldrb r3, [r3, #3] 800899a: 2b02 cmp r3, #2 800899c: f040 8218 bne.w 8008dd0 { PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); 80089a0: f507 7384 add.w r3, r7, #264 @ 0x108 80089a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80089a8: 681b ldr r3, [r3, #0] 80089aa: 785b ldrb r3, [r3, #1] 80089ac: 2b00 cmp r3, #0 80089ae: f040 809d bne.w 8008aec 80089b2: f507 7384 add.w r3, r7, #264 @ 0x108 80089b6: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80089ba: 681b ldr r3, [r3, #0] 80089bc: f8c7 30ac str.w r3, [r7, #172] @ 0xac 80089c0: f507 7384 add.w r3, r7, #264 @ 0x108 80089c4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 80089c8: 681b ldr r3, [r3, #0] 80089ca: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 80089ce: b29b uxth r3, r3 80089d0: 461a mov r2, r3 80089d2: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 80089d6: 4413 add r3, r2 80089d8: f8c7 30ac str.w r3, [r7, #172] @ 0xac 80089dc: f507 7384 add.w r3, r7, #264 @ 0x108 80089e0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80089e4: 681b ldr r3, [r3, #0] 80089e6: 781b ldrb r3, [r3, #0] 80089e8: 011a lsls r2, r3, #4 80089ea: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 80089ee: 4413 add r3, r2 80089f0: f203 4304 addw r3, r3, #1028 @ 0x404 80089f4: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 80089f8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 80089fc: 881b ldrh r3, [r3, #0] 80089fe: b29b uxth r3, r3 8008a00: f3c3 0309 ubfx r3, r3, #0, #10 8008a04: b29a uxth r2, r3 8008a06: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008a0a: 801a strh r2, [r3, #0] 8008a0c: f507 7384 add.w r3, r7, #264 @ 0x108 8008a10: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008a14: 681b ldr r3, [r3, #0] 8008a16: 691b ldr r3, [r3, #16] 8008a18: 2b3e cmp r3, #62 @ 0x3e 8008a1a: d92b bls.n 8008a74 8008a1c: f507 7384 add.w r3, r7, #264 @ 0x108 8008a20: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008a24: 681b ldr r3, [r3, #0] 8008a26: 691b ldr r3, [r3, #16] 8008a28: 095b lsrs r3, r3, #5 8008a2a: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8008a2e: f507 7384 add.w r3, r7, #264 @ 0x108 8008a32: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008a36: 681b ldr r3, [r3, #0] 8008a38: 691b ldr r3, [r3, #16] 8008a3a: f003 031f and.w r3, r3, #31 8008a3e: 2b00 cmp r3, #0 8008a40: d104 bne.n 8008a4c 8008a42: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008a46: 3b01 subs r3, #1 8008a48: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8008a4c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008a50: 881b ldrh r3, [r3, #0] 8008a52: b29a uxth r2, r3 8008a54: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008a58: b29b uxth r3, r3 8008a5a: 029b lsls r3, r3, #10 8008a5c: b29b uxth r3, r3 8008a5e: 4313 orrs r3, r2 8008a60: b29b uxth r3, r3 8008a62: ea6f 4343 mvn.w r3, r3, lsl #17 8008a66: ea6f 4353 mvn.w r3, r3, lsr #17 8008a6a: b29a uxth r2, r3 8008a6c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008a70: 801a strh r2, [r3, #0] 8008a72: e070 b.n 8008b56 8008a74: f507 7384 add.w r3, r7, #264 @ 0x108 8008a78: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008a7c: 681b ldr r3, [r3, #0] 8008a7e: 691b ldr r3, [r3, #16] 8008a80: 2b00 cmp r3, #0 8008a82: d10c bne.n 8008a9e 8008a84: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008a88: 881b ldrh r3, [r3, #0] 8008a8a: b29b uxth r3, r3 8008a8c: ea6f 4343 mvn.w r3, r3, lsl #17 8008a90: ea6f 4353 mvn.w r3, r3, lsr #17 8008a94: b29a uxth r2, r3 8008a96: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008a9a: 801a strh r2, [r3, #0] 8008a9c: e05b b.n 8008b56 8008a9e: f507 7384 add.w r3, r7, #264 @ 0x108 8008aa2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008aa6: 681b ldr r3, [r3, #0] 8008aa8: 691b ldr r3, [r3, #16] 8008aaa: 085b lsrs r3, r3, #1 8008aac: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8008ab0: f507 7384 add.w r3, r7, #264 @ 0x108 8008ab4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008ab8: 681b ldr r3, [r3, #0] 8008aba: 691b ldr r3, [r3, #16] 8008abc: f003 0301 and.w r3, r3, #1 8008ac0: 2b00 cmp r3, #0 8008ac2: d004 beq.n 8008ace 8008ac4: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008ac8: 3301 adds r3, #1 8008aca: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8008ace: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008ad2: 881b ldrh r3, [r3, #0] 8008ad4: b29a uxth r2, r3 8008ad6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008ada: b29b uxth r3, r3 8008adc: 029b lsls r3, r3, #10 8008ade: b29b uxth r3, r3 8008ae0: 4313 orrs r3, r2 8008ae2: b29a uxth r2, r3 8008ae4: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8008ae8: 801a strh r2, [r3, #0] 8008aea: e034 b.n 8008b56 8008aec: f507 7384 add.w r3, r7, #264 @ 0x108 8008af0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008af4: 681b ldr r3, [r3, #0] 8008af6: 785b ldrb r3, [r3, #1] 8008af8: 2b01 cmp r3, #1 8008afa: d12c bne.n 8008b56 8008afc: f507 7384 add.w r3, r7, #264 @ 0x108 8008b00: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008b04: 681b ldr r3, [r3, #0] 8008b06: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8008b0a: f507 7384 add.w r3, r7, #264 @ 0x108 8008b0e: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008b12: 681b ldr r3, [r3, #0] 8008b14: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008b18: b29b uxth r3, r3 8008b1a: 461a mov r2, r3 8008b1c: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 8008b20: 4413 add r3, r2 8008b22: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8008b26: f507 7384 add.w r3, r7, #264 @ 0x108 8008b2a: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008b2e: 681b ldr r3, [r3, #0] 8008b30: 781b ldrb r3, [r3, #0] 8008b32: 011a lsls r2, r3, #4 8008b34: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4 8008b38: 4413 add r3, r2 8008b3a: f203 4304 addw r3, r3, #1028 @ 0x404 8008b3e: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8008b42: f507 7384 add.w r3, r7, #264 @ 0x108 8008b46: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008b4a: 681b ldr r3, [r3, #0] 8008b4c: 691b ldr r3, [r3, #16] 8008b4e: b29a uxth r2, r3 8008b50: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0 8008b54: 801a strh r2, [r3, #0] 8008b56: f507 7384 add.w r3, r7, #264 @ 0x108 8008b5a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008b5e: 681b ldr r3, [r3, #0] 8008b60: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 8008b64: f507 7384 add.w r3, r7, #264 @ 0x108 8008b68: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008b6c: 681b ldr r3, [r3, #0] 8008b6e: 785b ldrb r3, [r3, #1] 8008b70: 2b00 cmp r3, #0 8008b72: f040 809d bne.w 8008cb0 8008b76: f507 7384 add.w r3, r7, #264 @ 0x108 8008b7a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008b7e: 681b ldr r3, [r3, #0] 8008b80: f8c7 309c str.w r3, [r7, #156] @ 0x9c 8008b84: f507 7384 add.w r3, r7, #264 @ 0x108 8008b88: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008b8c: 681b ldr r3, [r3, #0] 8008b8e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008b92: b29b uxth r3, r3 8008b94: 461a mov r2, r3 8008b96: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 8008b9a: 4413 add r3, r2 8008b9c: f8c7 309c str.w r3, [r7, #156] @ 0x9c 8008ba0: f507 7384 add.w r3, r7, #264 @ 0x108 8008ba4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008ba8: 681b ldr r3, [r3, #0] 8008baa: 781b ldrb r3, [r3, #0] 8008bac: 011a lsls r2, r3, #4 8008bae: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 8008bb2: 4413 add r3, r2 8008bb4: f203 430c addw r3, r3, #1036 @ 0x40c 8008bb8: f8c7 3098 str.w r3, [r7, #152] @ 0x98 8008bbc: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008bc0: 881b ldrh r3, [r3, #0] 8008bc2: b29b uxth r3, r3 8008bc4: f3c3 0309 ubfx r3, r3, #0, #10 8008bc8: b29a uxth r2, r3 8008bca: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008bce: 801a strh r2, [r3, #0] 8008bd0: f507 7384 add.w r3, r7, #264 @ 0x108 8008bd4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008bd8: 681b ldr r3, [r3, #0] 8008bda: 691b ldr r3, [r3, #16] 8008bdc: 2b3e cmp r3, #62 @ 0x3e 8008bde: d92b bls.n 8008c38 8008be0: f507 7384 add.w r3, r7, #264 @ 0x108 8008be4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008be8: 681b ldr r3, [r3, #0] 8008bea: 691b ldr r3, [r3, #16] 8008bec: 095b lsrs r3, r3, #5 8008bee: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 8008bf2: f507 7384 add.w r3, r7, #264 @ 0x108 8008bf6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008bfa: 681b ldr r3, [r3, #0] 8008bfc: 691b ldr r3, [r3, #16] 8008bfe: f003 031f and.w r3, r3, #31 8008c02: 2b00 cmp r3, #0 8008c04: d104 bne.n 8008c10 8008c06: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008c0a: 3b01 subs r3, #1 8008c0c: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 8008c10: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008c14: 881b ldrh r3, [r3, #0] 8008c16: b29a uxth r2, r3 8008c18: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008c1c: b29b uxth r3, r3 8008c1e: 029b lsls r3, r3, #10 8008c20: b29b uxth r3, r3 8008c22: 4313 orrs r3, r2 8008c24: b29b uxth r3, r3 8008c26: ea6f 4343 mvn.w r3, r3, lsl #17 8008c2a: ea6f 4353 mvn.w r3, r3, lsr #17 8008c2e: b29a uxth r2, r3 8008c30: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008c34: 801a strh r2, [r3, #0] 8008c36: e069 b.n 8008d0c 8008c38: f507 7384 add.w r3, r7, #264 @ 0x108 8008c3c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008c40: 681b ldr r3, [r3, #0] 8008c42: 691b ldr r3, [r3, #16] 8008c44: 2b00 cmp r3, #0 8008c46: d10c bne.n 8008c62 8008c48: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008c4c: 881b ldrh r3, [r3, #0] 8008c4e: b29b uxth r3, r3 8008c50: ea6f 4343 mvn.w r3, r3, lsl #17 8008c54: ea6f 4353 mvn.w r3, r3, lsr #17 8008c58: b29a uxth r2, r3 8008c5a: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008c5e: 801a strh r2, [r3, #0] 8008c60: e054 b.n 8008d0c 8008c62: f507 7384 add.w r3, r7, #264 @ 0x108 8008c66: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008c6a: 681b ldr r3, [r3, #0] 8008c6c: 691b ldr r3, [r3, #16] 8008c6e: 085b lsrs r3, r3, #1 8008c70: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 8008c74: f507 7384 add.w r3, r7, #264 @ 0x108 8008c78: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008c7c: 681b ldr r3, [r3, #0] 8008c7e: 691b ldr r3, [r3, #16] 8008c80: f003 0301 and.w r3, r3, #1 8008c84: 2b00 cmp r3, #0 8008c86: d004 beq.n 8008c92 8008c88: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008c8c: 3301 adds r3, #1 8008c8e: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 8008c92: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008c96: 881b ldrh r3, [r3, #0] 8008c98: b29a uxth r2, r3 8008c9a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008c9e: b29b uxth r3, r3 8008ca0: 029b lsls r3, r3, #10 8008ca2: b29b uxth r3, r3 8008ca4: 4313 orrs r3, r2 8008ca6: b29a uxth r2, r3 8008ca8: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008cac: 801a strh r2, [r3, #0] 8008cae: e02d b.n 8008d0c 8008cb0: f507 7384 add.w r3, r7, #264 @ 0x108 8008cb4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008cb8: 681b ldr r3, [r3, #0] 8008cba: 785b ldrb r3, [r3, #1] 8008cbc: 2b01 cmp r3, #1 8008cbe: d125 bne.n 8008d0c 8008cc0: f507 7384 add.w r3, r7, #264 @ 0x108 8008cc4: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008cc8: 681b ldr r3, [r3, #0] 8008cca: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008cce: b29b uxth r3, r3 8008cd0: 461a mov r2, r3 8008cd2: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 8008cd6: 4413 add r3, r2 8008cd8: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 8008cdc: f507 7384 add.w r3, r7, #264 @ 0x108 8008ce0: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008ce4: 681b ldr r3, [r3, #0] 8008ce6: 781b ldrb r3, [r3, #0] 8008ce8: 011a lsls r2, r3, #4 8008cea: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 8008cee: 4413 add r3, r2 8008cf0: f203 430c addw r3, r3, #1036 @ 0x40c 8008cf4: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 8008cf8: f507 7384 add.w r3, r7, #264 @ 0x108 8008cfc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008d00: 681b ldr r3, [r3, #0] 8008d02: 691b ldr r3, [r3, #16] 8008d04: b29a uxth r2, r3 8008d06: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 8008d0a: 801a strh r2, [r3, #0] /* Coming from ISR */ if (ep->xfer_count != 0U) 8008d0c: f507 7384 add.w r3, r7, #264 @ 0x108 8008d10: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008d14: 681b ldr r3, [r3, #0] 8008d16: 69db ldr r3, [r3, #28] 8008d18: 2b00 cmp r3, #0 8008d1a: f000 8218 beq.w 800914e { /* update last value to check if there is blocking state */ wEPVal = PCD_GET_ENDPOINT(USBx, ep->num); 8008d1e: f507 7384 add.w r3, r7, #264 @ 0x108 8008d22: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008d26: 681a ldr r2, [r3, #0] 8008d28: f507 7384 add.w r3, r7, #264 @ 0x108 8008d2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008d30: 681b ldr r3, [r3, #0] 8008d32: 781b ldrb r3, [r3, #0] 8008d34: 009b lsls r3, r3, #2 8008d36: 4413 add r3, r2 8008d38: 881b ldrh r3, [r3, #0] 8008d3a: f8a7 3096 strh.w r3, [r7, #150] @ 0x96 /*Blocking State */ if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 8008d3e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 8008d42: f403 4380 and.w r3, r3, #16384 @ 0x4000 8008d46: 2b00 cmp r3, #0 8008d48: d005 beq.n 8008d56 8008d4a: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 8008d4e: f003 0340 and.w r3, r3, #64 @ 0x40 8008d52: 2b00 cmp r3, #0 8008d54: d10d bne.n 8008d72 (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 8008d56: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 8008d5a: f403 4380 and.w r3, r3, #16384 @ 0x4000 if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || 8008d5e: 2b00 cmp r3, #0 8008d60: f040 81f5 bne.w 800914e (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) 8008d64: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96 8008d68: f003 0340 and.w r3, r3, #64 @ 0x40 8008d6c: 2b00 cmp r3, #0 8008d6e: f040 81ee bne.w 800914e { PCD_FREE_USER_BUFFER(USBx, ep->num, 0U); 8008d72: f507 7384 add.w r3, r7, #264 @ 0x108 8008d76: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008d7a: 681a ldr r2, [r3, #0] 8008d7c: f507 7384 add.w r3, r7, #264 @ 0x108 8008d80: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008d84: 681b ldr r3, [r3, #0] 8008d86: 781b ldrb r3, [r3, #0] 8008d88: 009b lsls r3, r3, #2 8008d8a: 4413 add r3, r2 8008d8c: 881b ldrh r3, [r3, #0] 8008d8e: b29b uxth r3, r3 8008d90: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8008d94: f023 0370 bic.w r3, r3, #112 @ 0x70 8008d98: f8a7 3094 strh.w r3, [r7, #148] @ 0x94 8008d9c: f507 7384 add.w r3, r7, #264 @ 0x108 8008da0: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008da4: 681a ldr r2, [r3, #0] 8008da6: f507 7384 add.w r3, r7, #264 @ 0x108 8008daa: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008dae: 681b ldr r3, [r3, #0] 8008db0: 781b ldrb r3, [r3, #0] 8008db2: 009b lsls r3, r3, #2 8008db4: 441a add r2, r3 8008db6: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94 8008dba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8008dbe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8008dc2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8008dc6: f043 03c0 orr.w r3, r3, #192 @ 0xc0 8008dca: b29b uxth r3, r3 8008dcc: 8013 strh r3, [r2, #0] 8008dce: e1be b.n 800914e } } } /* iso out double */ else if (ep->type == EP_TYPE_ISOC) 8008dd0: f507 7384 add.w r3, r7, #264 @ 0x108 8008dd4: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008dd8: 681b ldr r3, [r3, #0] 8008dda: 78db ldrb r3, [r3, #3] 8008ddc: 2b01 cmp r3, #1 8008dde: f040 81b4 bne.w 800914a { /* Multi packet transfer */ if (ep->xfer_len > ep->maxpacket) 8008de2: f507 7384 add.w r3, r7, #264 @ 0x108 8008de6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008dea: 681b ldr r3, [r3, #0] 8008dec: 699a ldr r2, [r3, #24] 8008dee: f507 7384 add.w r3, r7, #264 @ 0x108 8008df2: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008df6: 681b ldr r3, [r3, #0] 8008df8: 691b ldr r3, [r3, #16] 8008dfa: 429a cmp r2, r3 8008dfc: d917 bls.n 8008e2e { len = ep->maxpacket; 8008dfe: f507 7384 add.w r3, r7, #264 @ 0x108 8008e02: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008e06: 681b ldr r3, [r3, #0] 8008e08: 691b ldr r3, [r3, #16] 8008e0a: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len -= len; 8008e0e: f507 7384 add.w r3, r7, #264 @ 0x108 8008e12: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008e16: 681b ldr r3, [r3, #0] 8008e18: 699a ldr r2, [r3, #24] 8008e1a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008e1e: 1ad2 subs r2, r2, r3 8008e20: f507 7384 add.w r3, r7, #264 @ 0x108 8008e24: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008e28: 681b ldr r3, [r3, #0] 8008e2a: 619a str r2, [r3, #24] 8008e2c: e00e b.n 8008e4c } else { len = ep->xfer_len; 8008e2e: f507 7384 add.w r3, r7, #264 @ 0x108 8008e32: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008e36: 681b ldr r3, [r3, #0] 8008e38: 699b ldr r3, [r3, #24] 8008e3a: f8c7 3104 str.w r3, [r7, #260] @ 0x104 ep->xfer_len = 0U; 8008e3e: f507 7384 add.w r3, r7, #264 @ 0x108 8008e42: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008e46: 681b ldr r3, [r3, #0] 8008e48: 2200 movs r2, #0 8008e4a: 619a str r2, [r3, #24] } PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); 8008e4c: f507 7384 add.w r3, r7, #264 @ 0x108 8008e50: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008e54: 681b ldr r3, [r3, #0] 8008e56: 785b ldrb r3, [r3, #1] 8008e58: 2b00 cmp r3, #0 8008e5a: f040 8085 bne.w 8008f68 8008e5e: f507 7384 add.w r3, r7, #264 @ 0x108 8008e62: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008e66: 681b ldr r3, [r3, #0] 8008e68: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 8008e6c: f507 7384 add.w r3, r7, #264 @ 0x108 8008e70: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008e74: 681b ldr r3, [r3, #0] 8008e76: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008e7a: b29b uxth r3, r3 8008e7c: 461a mov r2, r3 8008e7e: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 8008e82: 4413 add r3, r2 8008e84: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 8008e88: f507 7384 add.w r3, r7, #264 @ 0x108 8008e8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008e90: 681b ldr r3, [r3, #0] 8008e92: 781b ldrb r3, [r3, #0] 8008e94: 011a lsls r2, r3, #4 8008e96: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc 8008e9a: 4413 add r3, r2 8008e9c: f203 4304 addw r3, r3, #1028 @ 0x404 8008ea0: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8008ea4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008ea8: 881b ldrh r3, [r3, #0] 8008eaa: b29b uxth r3, r3 8008eac: f3c3 0309 ubfx r3, r3, #0, #10 8008eb0: b29a uxth r2, r3 8008eb2: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008eb6: 801a strh r2, [r3, #0] 8008eb8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008ebc: 2b3e cmp r3, #62 @ 0x3e 8008ebe: d923 bls.n 8008f08 8008ec0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008ec4: 095b lsrs r3, r3, #5 8008ec6: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 8008eca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008ece: f003 031f and.w r3, r3, #31 8008ed2: 2b00 cmp r3, #0 8008ed4: d104 bne.n 8008ee0 8008ed6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008eda: 3b01 subs r3, #1 8008edc: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 8008ee0: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008ee4: 881b ldrh r3, [r3, #0] 8008ee6: b29a uxth r2, r3 8008ee8: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008eec: b29b uxth r3, r3 8008eee: 029b lsls r3, r3, #10 8008ef0: b29b uxth r3, r3 8008ef2: 4313 orrs r3, r2 8008ef4: b29b uxth r3, r3 8008ef6: ea6f 4343 mvn.w r3, r3, lsl #17 8008efa: ea6f 4353 mvn.w r3, r3, lsr #17 8008efe: b29a uxth r2, r3 8008f00: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008f04: 801a strh r2, [r3, #0] 8008f06: e060 b.n 8008fca 8008f08: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008f0c: 2b00 cmp r3, #0 8008f0e: d10c bne.n 8008f2a 8008f10: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008f14: 881b ldrh r3, [r3, #0] 8008f16: b29b uxth r3, r3 8008f18: ea6f 4343 mvn.w r3, r3, lsl #17 8008f1c: ea6f 4353 mvn.w r3, r3, lsr #17 8008f20: b29a uxth r2, r3 8008f22: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008f26: 801a strh r2, [r3, #0] 8008f28: e04f b.n 8008fca 8008f2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008f2e: 085b lsrs r3, r3, #1 8008f30: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 8008f34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008f38: f003 0301 and.w r3, r3, #1 8008f3c: 2b00 cmp r3, #0 8008f3e: d004 beq.n 8008f4a 8008f40: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008f44: 3301 adds r3, #1 8008f46: f8c7 30dc str.w r3, [r7, #220] @ 0xdc 8008f4a: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008f4e: 881b ldrh r3, [r3, #0] 8008f50: b29a uxth r2, r3 8008f52: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008f56: b29b uxth r3, r3 8008f58: 029b lsls r3, r3, #10 8008f5a: b29b uxth r3, r3 8008f5c: 4313 orrs r3, r2 8008f5e: b29a uxth r2, r3 8008f60: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8008f64: 801a strh r2, [r3, #0] 8008f66: e030 b.n 8008fca 8008f68: f507 7384 add.w r3, r7, #264 @ 0x108 8008f6c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008f70: 681b ldr r3, [r3, #0] 8008f72: 785b ldrb r3, [r3, #1] 8008f74: 2b01 cmp r3, #1 8008f76: d128 bne.n 8008fca 8008f78: f507 7384 add.w r3, r7, #264 @ 0x108 8008f7c: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008f80: 681b ldr r3, [r3, #0] 8008f82: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 8008f86: f507 7384 add.w r3, r7, #264 @ 0x108 8008f8a: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008f8e: 681b ldr r3, [r3, #0] 8008f90: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8008f94: b29b uxth r3, r3 8008f96: 461a mov r2, r3 8008f98: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8008f9c: 4413 add r3, r2 8008f9e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 8008fa2: f507 7384 add.w r3, r7, #264 @ 0x108 8008fa6: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008faa: 681b ldr r3, [r3, #0] 8008fac: 781b ldrb r3, [r3, #0] 8008fae: 011a lsls r2, r3, #4 8008fb0: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8008fb4: 4413 add r3, r2 8008fb6: f203 4304 addw r3, r3, #1028 @ 0x404 8008fba: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 8008fbe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8008fc2: b29a uxth r2, r3 8008fc4: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0 8008fc8: 801a strh r2, [r3, #0] 8008fca: f507 7384 add.w r3, r7, #264 @ 0x108 8008fce: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008fd2: 681b ldr r3, [r3, #0] 8008fd4: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8008fd8: f507 7384 add.w r3, r7, #264 @ 0x108 8008fdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8008fe0: 681b ldr r3, [r3, #0] 8008fe2: 785b ldrb r3, [r3, #1] 8008fe4: 2b00 cmp r3, #0 8008fe6: f040 8085 bne.w 80090f4 8008fea: f507 7384 add.w r3, r7, #264 @ 0x108 8008fee: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8008ff2: 681b ldr r3, [r3, #0] 8008ff4: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 8008ff8: f507 7384 add.w r3, r7, #264 @ 0x108 8008ffc: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009000: 681b ldr r3, [r3, #0] 8009002: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009006: b29b uxth r3, r3 8009008: 461a mov r2, r3 800900a: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 800900e: 4413 add r3, r2 8009010: f8c7 30bc str.w r3, [r7, #188] @ 0xbc 8009014: f507 7384 add.w r3, r7, #264 @ 0x108 8009018: f5a3 7384 sub.w r3, r3, #264 @ 0x108 800901c: 681b ldr r3, [r3, #0] 800901e: 781b ldrb r3, [r3, #0] 8009020: 011a lsls r2, r3, #4 8009022: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc 8009026: 4413 add r3, r2 8009028: f203 430c addw r3, r3, #1036 @ 0x40c 800902c: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 8009030: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8009034: 881b ldrh r3, [r3, #0] 8009036: b29b uxth r3, r3 8009038: f3c3 0309 ubfx r3, r3, #0, #10 800903c: b29a uxth r2, r3 800903e: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8009042: 801a strh r2, [r3, #0] 8009044: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009048: 2b3e cmp r3, #62 @ 0x3e 800904a: d923 bls.n 8009094 800904c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009050: 095b lsrs r3, r3, #5 8009052: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 8009056: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 800905a: f003 031f and.w r3, r3, #31 800905e: 2b00 cmp r3, #0 8009060: d104 bne.n 800906c 8009062: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8009066: 3b01 subs r3, #1 8009068: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800906c: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8009070: 881b ldrh r3, [r3, #0] 8009072: b29a uxth r2, r3 8009074: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8009078: b29b uxth r3, r3 800907a: 029b lsls r3, r3, #10 800907c: b29b uxth r3, r3 800907e: 4313 orrs r3, r2 8009080: b29b uxth r3, r3 8009082: ea6f 4343 mvn.w r3, r3, lsl #17 8009086: ea6f 4353 mvn.w r3, r3, lsr #17 800908a: b29a uxth r2, r3 800908c: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 8009090: 801a strh r2, [r3, #0] 8009092: e05c b.n 800914e 8009094: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009098: 2b00 cmp r3, #0 800909a: d10c bne.n 80090b6 800909c: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 80090a0: 881b ldrh r3, [r3, #0] 80090a2: b29b uxth r3, r3 80090a4: ea6f 4343 mvn.w r3, r3, lsl #17 80090a8: ea6f 4353 mvn.w r3, r3, lsr #17 80090ac: b29a uxth r2, r3 80090ae: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 80090b2: 801a strh r2, [r3, #0] 80090b4: e04b b.n 800914e 80090b6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80090ba: 085b lsrs r3, r3, #1 80090bc: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 80090c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 80090c4: f003 0301 and.w r3, r3, #1 80090c8: 2b00 cmp r3, #0 80090ca: d004 beq.n 80090d6 80090cc: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 80090d0: 3301 adds r3, #1 80090d2: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 80090d6: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 80090da: 881b ldrh r3, [r3, #0] 80090dc: b29a uxth r2, r3 80090de: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 80090e2: b29b uxth r3, r3 80090e4: 029b lsls r3, r3, #10 80090e6: b29b uxth r3, r3 80090e8: 4313 orrs r3, r2 80090ea: b29a uxth r2, r3 80090ec: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 80090f0: 801a strh r2, [r3, #0] 80090f2: e02c b.n 800914e 80090f4: f507 7384 add.w r3, r7, #264 @ 0x108 80090f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80090fc: 681b ldr r3, [r3, #0] 80090fe: 785b ldrb r3, [r3, #1] 8009100: 2b01 cmp r3, #1 8009102: d124 bne.n 800914e 8009104: f507 7384 add.w r3, r7, #264 @ 0x108 8009108: f5a3 7382 sub.w r3, r3, #260 @ 0x104 800910c: 681b ldr r3, [r3, #0] 800910e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50 8009112: b29b uxth r3, r3 8009114: 461a mov r2, r3 8009116: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 800911a: 4413 add r3, r2 800911c: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 8009120: f507 7384 add.w r3, r7, #264 @ 0x108 8009124: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009128: 681b ldr r3, [r3, #0] 800912a: 781b ldrb r3, [r3, #0] 800912c: 011a lsls r2, r3, #4 800912e: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4 8009132: 4413 add r3, r2 8009134: f203 430c addw r3, r3, #1036 @ 0x40c 8009138: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 800913c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104 8009140: b29a uxth r2, r3 8009142: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0 8009146: 801a strh r2, [r3, #0] 8009148: e001 b.n 800914e } else { return HAL_ERROR; 800914a: 2301 movs r3, #1 800914c: e03a b.n 80091c4 } } #endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 800914e: f507 7384 add.w r3, r7, #264 @ 0x108 8009152: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009156: 681a ldr r2, [r3, #0] 8009158: f507 7384 add.w r3, r7, #264 @ 0x108 800915c: f5a3 7384 sub.w r3, r3, #264 @ 0x108 8009160: 681b ldr r3, [r3, #0] 8009162: 781b ldrb r3, [r3, #0] 8009164: 009b lsls r3, r3, #2 8009166: 4413 add r3, r2 8009168: 881b ldrh r3, [r3, #0] 800916a: b29b uxth r3, r3 800916c: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8009170: f023 0370 bic.w r3, r3, #112 @ 0x70 8009174: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8009178: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 800917c: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8009180: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8009184: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 8009188: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800918c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a 8009190: f507 7384 add.w r3, r7, #264 @ 0x108 8009194: f5a3 7382 sub.w r3, r3, #260 @ 0x104 8009198: 681a ldr r2, [r3, #0] 800919a: f507 7384 add.w r3, r7, #264 @ 0x108 800919e: f5a3 7384 sub.w r3, r3, #264 @ 0x108 80091a2: 681b ldr r3, [r3, #0] 80091a4: 781b ldrb r3, [r3, #0] 80091a6: 009b lsls r3, r3, #2 80091a8: 441a add r2, r3 80091aa: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a 80091ae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80091b2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80091b6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80091ba: f043 0380 orr.w r3, r3, #128 @ 0x80 80091be: b29b uxth r3, r3 80091c0: 8013 strh r3, [r2, #0] } return HAL_OK; 80091c2: 2300 movs r3, #0 } 80091c4: 4618 mov r0, r3 80091c6: f507 7784 add.w r7, r7, #264 @ 0x108 80091ca: 46bd mov sp, r7 80091cc: bd80 pop {r7, pc} 080091ce : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 80091ce: b480 push {r7} 80091d0: b085 sub sp, #20 80091d2: af00 add r7, sp, #0 80091d4: 6078 str r0, [r7, #4] 80091d6: 6039 str r1, [r7, #0] if (ep->is_in != 0U) 80091d8: 683b ldr r3, [r7, #0] 80091da: 785b ldrb r3, [r3, #1] 80091dc: 2b00 cmp r3, #0 80091de: d020 beq.n 8009222 { PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); 80091e0: 687a ldr r2, [r7, #4] 80091e2: 683b ldr r3, [r7, #0] 80091e4: 781b ldrb r3, [r3, #0] 80091e6: 009b lsls r3, r3, #2 80091e8: 4413 add r3, r2 80091ea: 881b ldrh r3, [r3, #0] 80091ec: b29b uxth r3, r3 80091ee: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80091f2: f023 0340 bic.w r3, r3, #64 @ 0x40 80091f6: 81bb strh r3, [r7, #12] 80091f8: 89bb ldrh r3, [r7, #12] 80091fa: f083 0310 eor.w r3, r3, #16 80091fe: 81bb strh r3, [r7, #12] 8009200: 687a ldr r2, [r7, #4] 8009202: 683b ldr r3, [r7, #0] 8009204: 781b ldrb r3, [r3, #0] 8009206: 009b lsls r3, r3, #2 8009208: 441a add r2, r3 800920a: 89bb ldrh r3, [r7, #12] 800920c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009210: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009214: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8009218: f043 0380 orr.w r3, r3, #128 @ 0x80 800921c: b29b uxth r3, r3 800921e: 8013 strh r3, [r2, #0] 8009220: e01f b.n 8009262 } else { PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); 8009222: 687a ldr r2, [r7, #4] 8009224: 683b ldr r3, [r7, #0] 8009226: 781b ldrb r3, [r3, #0] 8009228: 009b lsls r3, r3, #2 800922a: 4413 add r3, r2 800922c: 881b ldrh r3, [r3, #0] 800922e: b29b uxth r3, r3 8009230: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8009234: f023 0370 bic.w r3, r3, #112 @ 0x70 8009238: 81fb strh r3, [r7, #14] 800923a: 89fb ldrh r3, [r7, #14] 800923c: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8009240: 81fb strh r3, [r7, #14] 8009242: 687a ldr r2, [r7, #4] 8009244: 683b ldr r3, [r7, #0] 8009246: 781b ldrb r3, [r3, #0] 8009248: 009b lsls r3, r3, #2 800924a: 441a add r2, r3 800924c: 89fb ldrh r3, [r7, #14] 800924e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009252: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009256: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800925a: f043 0380 orr.w r3, r3, #128 @ 0x80 800925e: b29b uxth r3, r3 8009260: 8013 strh r3, [r2, #0] } return HAL_OK; 8009262: 2300 movs r3, #0 } 8009264: 4618 mov r0, r3 8009266: 3714 adds r7, #20 8009268: 46bd mov sp, r7 800926a: bc80 pop {r7} 800926c: 4770 bx lr 0800926e : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) { 800926e: b480 push {r7} 8009270: b087 sub sp, #28 8009272: af00 add r7, sp, #0 8009274: 6078 str r0, [r7, #4] 8009276: 6039 str r1, [r7, #0] if (ep->doublebuffer == 0U) 8009278: 683b ldr r3, [r7, #0] 800927a: 7b1b ldrb r3, [r3, #12] 800927c: 2b00 cmp r3, #0 800927e: f040 809d bne.w 80093bc { if (ep->is_in != 0U) 8009282: 683b ldr r3, [r7, #0] 8009284: 785b ldrb r3, [r3, #1] 8009286: 2b00 cmp r3, #0 8009288: d04c beq.n 8009324 { PCD_CLEAR_TX_DTOG(USBx, ep->num); 800928a: 687a ldr r2, [r7, #4] 800928c: 683b ldr r3, [r7, #0] 800928e: 781b ldrb r3, [r3, #0] 8009290: 009b lsls r3, r3, #2 8009292: 4413 add r3, r2 8009294: 881b ldrh r3, [r3, #0] 8009296: 823b strh r3, [r7, #16] 8009298: 8a3b ldrh r3, [r7, #16] 800929a: f003 0340 and.w r3, r3, #64 @ 0x40 800929e: 2b00 cmp r3, #0 80092a0: d01b beq.n 80092da 80092a2: 687a ldr r2, [r7, #4] 80092a4: 683b ldr r3, [r7, #0] 80092a6: 781b ldrb r3, [r3, #0] 80092a8: 009b lsls r3, r3, #2 80092aa: 4413 add r3, r2 80092ac: 881b ldrh r3, [r3, #0] 80092ae: b29b uxth r3, r3 80092b0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80092b4: f023 0370 bic.w r3, r3, #112 @ 0x70 80092b8: 81fb strh r3, [r7, #14] 80092ba: 687a ldr r2, [r7, #4] 80092bc: 683b ldr r3, [r7, #0] 80092be: 781b ldrb r3, [r3, #0] 80092c0: 009b lsls r3, r3, #2 80092c2: 441a add r2, r3 80092c4: 89fb ldrh r3, [r7, #14] 80092c6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80092ca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80092ce: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80092d2: f043 03c0 orr.w r3, r3, #192 @ 0xc0 80092d6: b29b uxth r3, r3 80092d8: 8013 strh r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 80092da: 683b ldr r3, [r7, #0] 80092dc: 78db ldrb r3, [r3, #3] 80092de: 2b01 cmp r3, #1 80092e0: d06c beq.n 80093bc { /* Configure NAK status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); 80092e2: 687a ldr r2, [r7, #4] 80092e4: 683b ldr r3, [r7, #0] 80092e6: 781b ldrb r3, [r3, #0] 80092e8: 009b lsls r3, r3, #2 80092ea: 4413 add r3, r2 80092ec: 881b ldrh r3, [r3, #0] 80092ee: b29b uxth r3, r3 80092f0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80092f4: f023 0340 bic.w r3, r3, #64 @ 0x40 80092f8: 81bb strh r3, [r7, #12] 80092fa: 89bb ldrh r3, [r7, #12] 80092fc: f083 0320 eor.w r3, r3, #32 8009300: 81bb strh r3, [r7, #12] 8009302: 687a ldr r2, [r7, #4] 8009304: 683b ldr r3, [r7, #0] 8009306: 781b ldrb r3, [r3, #0] 8009308: 009b lsls r3, r3, #2 800930a: 441a add r2, r3 800930c: 89bb ldrh r3, [r7, #12] 800930e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009312: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009316: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800931a: f043 0380 orr.w r3, r3, #128 @ 0x80 800931e: b29b uxth r3, r3 8009320: 8013 strh r3, [r2, #0] 8009322: e04b b.n 80093bc } } else { PCD_CLEAR_RX_DTOG(USBx, ep->num); 8009324: 687a ldr r2, [r7, #4] 8009326: 683b ldr r3, [r7, #0] 8009328: 781b ldrb r3, [r3, #0] 800932a: 009b lsls r3, r3, #2 800932c: 4413 add r3, r2 800932e: 881b ldrh r3, [r3, #0] 8009330: 82fb strh r3, [r7, #22] 8009332: 8afb ldrh r3, [r7, #22] 8009334: f403 4380 and.w r3, r3, #16384 @ 0x4000 8009338: 2b00 cmp r3, #0 800933a: d01b beq.n 8009374 800933c: 687a ldr r2, [r7, #4] 800933e: 683b ldr r3, [r7, #0] 8009340: 781b ldrb r3, [r3, #0] 8009342: 009b lsls r3, r3, #2 8009344: 4413 add r3, r2 8009346: 881b ldrh r3, [r3, #0] 8009348: b29b uxth r3, r3 800934a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 800934e: f023 0370 bic.w r3, r3, #112 @ 0x70 8009352: 82bb strh r3, [r7, #20] 8009354: 687a ldr r2, [r7, #4] 8009356: 683b ldr r3, [r7, #0] 8009358: 781b ldrb r3, [r3, #0] 800935a: 009b lsls r3, r3, #2 800935c: 441a add r2, r3 800935e: 8abb ldrh r3, [r7, #20] 8009360: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8009364: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 8009368: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800936c: f043 0380 orr.w r3, r3, #128 @ 0x80 8009370: b29b uxth r3, r3 8009372: 8013 strh r3, [r2, #0] /* Configure VALID status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); 8009374: 687a ldr r2, [r7, #4] 8009376: 683b ldr r3, [r7, #0] 8009378: 781b ldrb r3, [r3, #0] 800937a: 009b lsls r3, r3, #2 800937c: 4413 add r3, r2 800937e: 881b ldrh r3, [r3, #0] 8009380: b29b uxth r3, r3 8009382: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8009386: f023 0370 bic.w r3, r3, #112 @ 0x70 800938a: 827b strh r3, [r7, #18] 800938c: 8a7b ldrh r3, [r7, #18] 800938e: f483 5380 eor.w r3, r3, #4096 @ 0x1000 8009392: 827b strh r3, [r7, #18] 8009394: 8a7b ldrh r3, [r7, #18] 8009396: f483 5300 eor.w r3, r3, #8192 @ 0x2000 800939a: 827b strh r3, [r7, #18] 800939c: 687a ldr r2, [r7, #4] 800939e: 683b ldr r3, [r7, #0] 80093a0: 781b ldrb r3, [r3, #0] 80093a2: 009b lsls r3, r3, #2 80093a4: 441a add r2, r3 80093a6: 8a7b ldrh r3, [r7, #18] 80093a8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 80093ac: f443 037f orr.w r3, r3, #16711680 @ 0xff0000 80093b0: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80093b4: f043 0380 orr.w r3, r3, #128 @ 0x80 80093b8: b29b uxth r3, r3 80093ba: 8013 strh r3, [r2, #0] } } return HAL_OK; 80093bc: 2300 movs r3, #0 } 80093be: 4618 mov r0, r3 80093c0: 371c adds r7, #28 80093c2: 46bd mov sp, r7 80093c4: bc80 pop {r7} 80093c6: 4770 bx lr 080093c8 : * @param address new device address to be assigned * This parameter can be a value from 0 to 255 * @retval HAL status */ HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) { 80093c8: b480 push {r7} 80093ca: b083 sub sp, #12 80093cc: af00 add r7, sp, #0 80093ce: 6078 str r0, [r7, #4] 80093d0: 460b mov r3, r1 80093d2: 70fb strb r3, [r7, #3] if (address == 0U) 80093d4: 78fb ldrb r3, [r7, #3] 80093d6: 2b00 cmp r3, #0 80093d8: d103 bne.n 80093e2 { /* set device address and enable function */ USBx->DADDR = (uint16_t)USB_DADDR_EF; 80093da: 687b ldr r3, [r7, #4] 80093dc: 2280 movs r2, #128 @ 0x80 80093de: f8a3 204c strh.w r2, [r3, #76] @ 0x4c } return HAL_OK; 80093e2: 2300 movs r3, #0 } 80093e4: 4618 mov r0, r3 80093e6: 370c adds r7, #12 80093e8: 46bd mov sp, r7 80093ea: bc80 pop {r7} 80093ec: 4770 bx lr 080093ee : * @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx) { 80093ee: b480 push {r7} 80093f0: b083 sub sp, #12 80093f2: af00 add r7, sp, #0 80093f4: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 80093f6: 2300 movs r3, #0 } 80093f8: 4618 mov r0, r3 80093fa: 370c adds r7, #12 80093fc: 46bd mov sp, r7 80093fe: bc80 pop {r7} 8009400: 4770 bx lr 08009402 : * @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) { 8009402: b480 push {r7} 8009404: b083 sub sp, #12 8009406: af00 add r7, sp, #0 8009408: 6078 str r0, [r7, #4] /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800940a: 2300 movs r3, #0 } 800940c: 4618 mov r0, r3 800940e: 370c adds r7, #12 8009410: 46bd mov sp, r7 8009412: bc80 pop {r7} 8009414: 4770 bx lr 08009416 : * @brief USB_ReadInterrupts return the global USB interrupt status * @param USBx Selected device * @retval USB Global Interrupt status */ uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx) { 8009416: b480 push {r7} 8009418: b085 sub sp, #20 800941a: af00 add r7, sp, #0 800941c: 6078 str r0, [r7, #4] uint32_t tmpreg; tmpreg = USBx->ISTR; 800941e: 687b ldr r3, [r7, #4] 8009420: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44 8009424: b29b uxth r3, r3 8009426: 60fb str r3, [r7, #12] return tmpreg; 8009428: 68fb ldr r3, [r7, #12] } 800942a: 4618 mov r0, r3 800942c: 3714 adds r7, #20 800942e: 46bd mov sp, r7 8009430: bc80 pop {r7} 8009432: 4770 bx lr 08009434 : * @param USBx Selected device * @param psetup pointer to setup packet * @retval HAL status */ HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup) { 8009434: b480 push {r7} 8009436: b083 sub sp, #12 8009438: af00 add r7, sp, #0 800943a: 6078 str r0, [r7, #4] 800943c: 6039 str r1, [r7, #0] UNUSED(psetup); /* NOTE : - This function is not required by USB Device FS peripheral, it is used only by USB OTG FS peripheral. - This function is added to ensure compatibility across platforms. */ return HAL_OK; 800943e: 2300 movs r3, #0 } 8009440: 4618 mov r0, r3 8009442: 370c adds r7, #12 8009444: 46bd mov sp, r7 8009446: bc80 pop {r7} 8009448: 4770 bx lr 0800944a : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 800944a: b480 push {r7} 800944c: b08b sub sp, #44 @ 0x2c 800944e: af00 add r7, sp, #0 8009450: 60f8 str r0, [r7, #12] 8009452: 60b9 str r1, [r7, #8] 8009454: 4611 mov r1, r2 8009456: 461a mov r2, r3 8009458: 460b mov r3, r1 800945a: 80fb strh r3, [r7, #6] 800945c: 4613 mov r3, r2 800945e: 80bb strh r3, [r7, #4] uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; 8009460: 88bb ldrh r3, [r7, #4] 8009462: 3301 adds r3, #1 8009464: 085b lsrs r3, r3, #1 8009466: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 8009468: 68fb ldr r3, [r7, #12] 800946a: 617b str r3, [r7, #20] uint32_t count; uint16_t WrVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 800946c: 68bb ldr r3, [r7, #8] 800946e: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 8009470: 88fb ldrh r3, [r7, #6] 8009472: 005a lsls r2, r3, #1 8009474: 697b ldr r3, [r7, #20] 8009476: 4413 add r3, r2 8009478: f503 6380 add.w r3, r3, #1024 @ 0x400 800947c: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800947e: 69bb ldr r3, [r7, #24] 8009480: 627b str r3, [r7, #36] @ 0x24 8009482: e01f b.n 80094c4 { WrVal = pBuf[0]; 8009484: 69fb ldr r3, [r7, #28] 8009486: 781b ldrb r3, [r3, #0] 8009488: 827b strh r3, [r7, #18] WrVal |= (uint16_t)pBuf[1] << 8; 800948a: 69fb ldr r3, [r7, #28] 800948c: 3301 adds r3, #1 800948e: 781b ldrb r3, [r3, #0] 8009490: b21b sxth r3, r3 8009492: 021b lsls r3, r3, #8 8009494: b21a sxth r2, r3 8009496: f9b7 3012 ldrsh.w r3, [r7, #18] 800949a: 4313 orrs r3, r2 800949c: b21b sxth r3, r3 800949e: 827b strh r3, [r7, #18] *pdwVal = (WrVal & 0xFFFFU); 80094a0: 6a3b ldr r3, [r7, #32] 80094a2: 8a7a ldrh r2, [r7, #18] 80094a4: 801a strh r2, [r3, #0] pdwVal++; 80094a6: 6a3b ldr r3, [r7, #32] 80094a8: 3302 adds r3, #2 80094aa: 623b str r3, [r7, #32] #if PMA_ACCESS > 1U pdwVal++; 80094ac: 6a3b ldr r3, [r7, #32] 80094ae: 3302 adds r3, #2 80094b0: 623b str r3, [r7, #32] #endif /* PMA_ACCESS */ pBuf++; 80094b2: 69fb ldr r3, [r7, #28] 80094b4: 3301 adds r3, #1 80094b6: 61fb str r3, [r7, #28] pBuf++; 80094b8: 69fb ldr r3, [r7, #28] 80094ba: 3301 adds r3, #1 80094bc: 61fb str r3, [r7, #28] for (count = n; count != 0U; count--) 80094be: 6a7b ldr r3, [r7, #36] @ 0x24 80094c0: 3b01 subs r3, #1 80094c2: 627b str r3, [r7, #36] @ 0x24 80094c4: 6a7b ldr r3, [r7, #36] @ 0x24 80094c6: 2b00 cmp r3, #0 80094c8: d1dc bne.n 8009484 } } 80094ca: bf00 nop 80094cc: bf00 nop 80094ce: 372c adds r7, #44 @ 0x2c 80094d0: 46bd mov sp, r7 80094d2: bc80 pop {r7} 80094d4: 4770 bx lr 080094d6 : * @param wPMABufAddr address into PMA. * @param wNBytes no. of bytes to be copied. * @retval None */ void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) { 80094d6: b480 push {r7} 80094d8: b08b sub sp, #44 @ 0x2c 80094da: af00 add r7, sp, #0 80094dc: 60f8 str r0, [r7, #12] 80094de: 60b9 str r1, [r7, #8] 80094e0: 4611 mov r1, r2 80094e2: 461a mov r2, r3 80094e4: 460b mov r3, r1 80094e6: 80fb strh r3, [r7, #6] 80094e8: 4613 mov r3, r2 80094ea: 80bb strh r3, [r7, #4] uint32_t n = (uint32_t)wNBytes >> 1; 80094ec: 88bb ldrh r3, [r7, #4] 80094ee: 085b lsrs r3, r3, #1 80094f0: b29b uxth r3, r3 80094f2: 61bb str r3, [r7, #24] uint32_t BaseAddr = (uint32_t)USBx; 80094f4: 68fb ldr r3, [r7, #12] 80094f6: 617b str r3, [r7, #20] uint32_t count; uint32_t RdVal; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; 80094f8: 68bb ldr r3, [r7, #8] 80094fa: 61fb str r3, [r7, #28] pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); 80094fc: 88fb ldrh r3, [r7, #6] 80094fe: 005a lsls r2, r3, #1 8009500: 697b ldr r3, [r7, #20] 8009502: 4413 add r3, r2 8009504: f503 6380 add.w r3, r3, #1024 @ 0x400 8009508: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 800950a: 69bb ldr r3, [r7, #24] 800950c: 627b str r3, [r7, #36] @ 0x24 800950e: e01b b.n 8009548 { RdVal = *(__IO uint16_t *)pdwVal; 8009510: 6a3b ldr r3, [r7, #32] 8009512: 881b ldrh r3, [r3, #0] 8009514: b29b uxth r3, r3 8009516: 613b str r3, [r7, #16] pdwVal++; 8009518: 6a3b ldr r3, [r7, #32] 800951a: 3302 adds r3, #2 800951c: 623b str r3, [r7, #32] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 800951e: 693b ldr r3, [r7, #16] 8009520: b2da uxtb r2, r3 8009522: 69fb ldr r3, [r7, #28] 8009524: 701a strb r2, [r3, #0] pBuf++; 8009526: 69fb ldr r3, [r7, #28] 8009528: 3301 adds r3, #1 800952a: 61fb str r3, [r7, #28] *pBuf = (uint8_t)((RdVal >> 8) & 0xFFU); 800952c: 693b ldr r3, [r7, #16] 800952e: 0a1b lsrs r3, r3, #8 8009530: b2da uxtb r2, r3 8009532: 69fb ldr r3, [r7, #28] 8009534: 701a strb r2, [r3, #0] pBuf++; 8009536: 69fb ldr r3, [r7, #28] 8009538: 3301 adds r3, #1 800953a: 61fb str r3, [r7, #28] #if PMA_ACCESS > 1U pdwVal++; 800953c: 6a3b ldr r3, [r7, #32] 800953e: 3302 adds r3, #2 8009540: 623b str r3, [r7, #32] for (count = n; count != 0U; count--) 8009542: 6a7b ldr r3, [r7, #36] @ 0x24 8009544: 3b01 subs r3, #1 8009546: 627b str r3, [r7, #36] @ 0x24 8009548: 6a7b ldr r3, [r7, #36] @ 0x24 800954a: 2b00 cmp r3, #0 800954c: d1e0 bne.n 8009510 #endif /* PMA_ACCESS */ } if ((wNBytes % 2U) != 0U) 800954e: 88bb ldrh r3, [r7, #4] 8009550: f003 0301 and.w r3, r3, #1 8009554: b29b uxth r3, r3 8009556: 2b00 cmp r3, #0 8009558: d007 beq.n 800956a { RdVal = *pdwVal; 800955a: 6a3b ldr r3, [r7, #32] 800955c: 881b ldrh r3, [r3, #0] 800955e: b29b uxth r3, r3 8009560: 613b str r3, [r7, #16] *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); 8009562: 693b ldr r3, [r7, #16] 8009564: b2da uxtb r2, r3 8009566: 69fb ldr r3, [r7, #28] 8009568: 701a strb r2, [r3, #0] } } 800956a: bf00 nop 800956c: 372c adds r7, #44 @ 0x2c 800956e: 46bd mov sp, r7 8009570: bc80 pop {r7} 8009572: 4770 bx lr 08009574 : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8009574: b580 push {r7, lr} 8009576: b084 sub sp, #16 8009578: af00 add r7, sp, #0 800957a: 6078 str r0, [r7, #4] 800957c: 460b mov r3, r1 800957e: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 8009580: 2300 movs r3, #0 8009582: 73fb strb r3, [r7, #15] USBD_CDC_HandleTypeDef *hcdc; if (pdev->dev_speed == USBD_SPEED_HIGH) 8009584: 687b ldr r3, [r7, #4] 8009586: 7c1b ldrb r3, [r3, #16] 8009588: 2b00 cmp r3, #0 800958a: d115 bne.n 80095b8 { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 800958c: f44f 7300 mov.w r3, #512 @ 0x200 8009590: 2202 movs r2, #2 8009592: 2181 movs r1, #129 @ 0x81 8009594: 6878 ldr r0, [r7, #4] 8009596: f001 ff00 bl 800b39a CDC_DATA_HS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 800959a: 687b ldr r3, [r7, #4] 800959c: 2201 movs r2, #1 800959e: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 80095a0: f44f 7300 mov.w r3, #512 @ 0x200 80095a4: 2202 movs r2, #2 80095a6: 2101 movs r1, #1 80095a8: 6878 ldr r0, [r7, #4] 80095aa: f001 fef6 bl 800b39a CDC_DATA_HS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 80095ae: 687b ldr r3, [r7, #4] 80095b0: 2201 movs r2, #1 80095b2: f8c3 216c str.w r2, [r3, #364] @ 0x16c 80095b6: e012 b.n 80095de } else { /* Open EP IN */ USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK, 80095b8: 2340 movs r3, #64 @ 0x40 80095ba: 2202 movs r2, #2 80095bc: 2181 movs r1, #129 @ 0x81 80095be: 6878 ldr r0, [r7, #4] 80095c0: f001 feeb bl 800b39a CDC_DATA_FS_IN_PACKET_SIZE); pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U; 80095c4: 687b ldr r3, [r7, #4] 80095c6: 2201 movs r2, #1 80095c8: 62da str r2, [r3, #44] @ 0x2c /* Open EP OUT */ USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK, 80095ca: 2340 movs r3, #64 @ 0x40 80095cc: 2202 movs r2, #2 80095ce: 2101 movs r1, #1 80095d0: 6878 ldr r0, [r7, #4] 80095d2: f001 fee2 bl 800b39a CDC_DATA_FS_OUT_PACKET_SIZE); pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U; 80095d6: 687b ldr r3, [r7, #4] 80095d8: 2201 movs r2, #1 80095da: f8c3 216c str.w r2, [r3, #364] @ 0x16c } /* Open Command IN EP */ USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE); 80095de: 2308 movs r3, #8 80095e0: 2203 movs r2, #3 80095e2: 2182 movs r1, #130 @ 0x82 80095e4: 6878 ldr r0, [r7, #4] 80095e6: f001 fed8 bl 800b39a pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U; 80095ea: 687b ldr r3, [r7, #4] 80095ec: 2201 movs r2, #1 80095ee: 641a str r2, [r3, #64] @ 0x40 pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef)); 80095f0: f44f 7007 mov.w r0, #540 @ 0x21c 80095f4: f001 fff8 bl 800b5e8 80095f8: 4602 mov r2, r0 80095fa: 687b ldr r3, [r7, #4] 80095fc: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 if (pdev->pClassData == NULL) 8009600: 687b ldr r3, [r7, #4] 8009602: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009606: 2b00 cmp r3, #0 8009608: d102 bne.n 8009610 { ret = 1U; 800960a: 2301 movs r3, #1 800960c: 73fb strb r3, [r7, #15] 800960e: e026 b.n 800965e } else { hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009610: 687b ldr r3, [r7, #4] 8009612: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009616: 60bb str r3, [r7, #8] /* Init physical Interface components */ ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init(); 8009618: 687b ldr r3, [r7, #4] 800961a: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800961e: 681b ldr r3, [r3, #0] 8009620: 4798 blx r3 /* Init Xfer states */ hcdc->TxState = 0U; 8009622: 68bb ldr r3, [r7, #8] 8009624: 2200 movs r2, #0 8009626: f8c3 2214 str.w r2, [r3, #532] @ 0x214 hcdc->RxState = 0U; 800962a: 68bb ldr r3, [r7, #8] 800962c: 2200 movs r2, #0 800962e: f8c3 2218 str.w r2, [r3, #536] @ 0x218 if (pdev->dev_speed == USBD_SPEED_HIGH) 8009632: 687b ldr r3, [r7, #4] 8009634: 7c1b ldrb r3, [r3, #16] 8009636: 2b00 cmp r3, #0 8009638: d109 bne.n 800964e { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 800963a: 68bb ldr r3, [r7, #8] 800963c: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 8009640: f44f 7300 mov.w r3, #512 @ 0x200 8009644: 2101 movs r1, #1 8009646: 6878 ldr r0, [r7, #4] 8009648: f001 ff97 bl 800b57a 800964c: e007 b.n 800965e CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer, 800964e: 68bb ldr r3, [r7, #8] 8009650: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 8009654: 2340 movs r3, #64 @ 0x40 8009656: 2101 movs r1, #1 8009658: 6878 ldr r0, [r7, #4] 800965a: f001 ff8e bl 800b57a CDC_DATA_FS_OUT_PACKET_SIZE); } } return ret; 800965e: 7bfb ldrb r3, [r7, #15] } 8009660: 4618 mov r0, r3 8009662: 3710 adds r7, #16 8009664: 46bd mov sp, r7 8009666: bd80 pop {r7, pc} 08009668 : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8009668: b580 push {r7, lr} 800966a: b084 sub sp, #16 800966c: af00 add r7, sp, #0 800966e: 6078 str r0, [r7, #4] 8009670: 460b mov r3, r1 8009672: 70fb strb r3, [r7, #3] uint8_t ret = 0U; 8009674: 2300 movs r3, #0 8009676: 73fb strb r3, [r7, #15] /* Close EP IN */ USBD_LL_CloseEP(pdev, CDC_IN_EP); 8009678: 2181 movs r1, #129 @ 0x81 800967a: 6878 ldr r0, [r7, #4] 800967c: f001 feb3 bl 800b3e6 pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U; 8009680: 687b ldr r3, [r7, #4] 8009682: 2200 movs r2, #0 8009684: 62da str r2, [r3, #44] @ 0x2c /* Close EP OUT */ USBD_LL_CloseEP(pdev, CDC_OUT_EP); 8009686: 2101 movs r1, #1 8009688: 6878 ldr r0, [r7, #4] 800968a: f001 feac bl 800b3e6 pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U; 800968e: 687b ldr r3, [r7, #4] 8009690: 2200 movs r2, #0 8009692: f8c3 216c str.w r2, [r3, #364] @ 0x16c /* Close Command IN EP */ USBD_LL_CloseEP(pdev, CDC_CMD_EP); 8009696: 2182 movs r1, #130 @ 0x82 8009698: 6878 ldr r0, [r7, #4] 800969a: f001 fea4 bl 800b3e6 pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U; 800969e: 687b ldr r3, [r7, #4] 80096a0: 2200 movs r2, #0 80096a2: 641a str r2, [r3, #64] @ 0x40 /* DeInit physical Interface components */ if (pdev->pClassData != NULL) 80096a4: 687b ldr r3, [r7, #4] 80096a6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80096aa: 2b00 cmp r3, #0 80096ac: d00e beq.n 80096cc { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit(); 80096ae: 687b ldr r3, [r7, #4] 80096b0: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 80096b4: 685b ldr r3, [r3, #4] 80096b6: 4798 blx r3 USBD_free(pdev->pClassData); 80096b8: 687b ldr r3, [r7, #4] 80096ba: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80096be: 4618 mov r0, r3 80096c0: f001 ff9e bl 800b600 pdev->pClassData = NULL; 80096c4: 687b ldr r3, [r7, #4] 80096c6: 2200 movs r2, #0 80096c8: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 } return ret; 80096cc: 7bfb ldrb r3, [r7, #15] } 80096ce: 4618 mov r0, r3 80096d0: 3710 adds r7, #16 80096d2: 46bd mov sp, r7 80096d4: bd80 pop {r7, pc} 080096d6 : * @param req: usb requests * @retval status */ static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80096d6: b580 push {r7, lr} 80096d8: b086 sub sp, #24 80096da: af00 add r7, sp, #0 80096dc: 6078 str r0, [r7, #4] 80096de: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 80096e0: 687b ldr r3, [r7, #4] 80096e2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80096e6: 613b str r3, [r7, #16] uint8_t ifalt = 0U; 80096e8: 2300 movs r3, #0 80096ea: 73fb strb r3, [r7, #15] uint16_t status_info = 0U; 80096ec: 2300 movs r3, #0 80096ee: 81bb strh r3, [r7, #12] uint8_t ret = USBD_OK; 80096f0: 2300 movs r3, #0 80096f2: 75fb strb r3, [r7, #23] switch (req->bmRequest & USB_REQ_TYPE_MASK) 80096f4: 683b ldr r3, [r7, #0] 80096f6: 781b ldrb r3, [r3, #0] 80096f8: f003 0360 and.w r3, r3, #96 @ 0x60 80096fc: 2b00 cmp r3, #0 80096fe: d039 beq.n 8009774 8009700: 2b20 cmp r3, #32 8009702: d17f bne.n 8009804 { case USB_REQ_TYPE_CLASS : if (req->wLength) 8009704: 683b ldr r3, [r7, #0] 8009706: 88db ldrh r3, [r3, #6] 8009708: 2b00 cmp r3, #0 800970a: d029 beq.n 8009760 { if (req->bmRequest & 0x80U) 800970c: 683b ldr r3, [r7, #0] 800970e: 781b ldrb r3, [r3, #0] 8009710: b25b sxtb r3, r3 8009712: 2b00 cmp r3, #0 8009714: da11 bge.n 800973a { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 8009716: 687b ldr r3, [r7, #4] 8009718: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800971c: 689b ldr r3, [r3, #8] 800971e: 683a ldr r2, [r7, #0] 8009720: 7850 ldrb r0, [r2, #1] (uint8_t *)(void *)hcdc->data, 8009722: 6939 ldr r1, [r7, #16] ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 8009724: 683a ldr r2, [r7, #0] 8009726: 88d2 ldrh r2, [r2, #6] 8009728: 4798 blx r3 req->wLength); USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 800972a: 6939 ldr r1, [r7, #16] 800972c: 683b ldr r3, [r7, #0] 800972e: 88db ldrh r3, [r3, #6] 8009730: 461a mov r2, r3 8009732: 6878 ldr r0, [r7, #4] 8009734: f001 fa06 bl 800ab44 else { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, (uint8_t *)(void *)req, 0U); } break; 8009738: e06b b.n 8009812 hcdc->CmdOpCode = req->bRequest; 800973a: 683b ldr r3, [r7, #0] 800973c: 785a ldrb r2, [r3, #1] 800973e: 693b ldr r3, [r7, #16] 8009740: f883 2200 strb.w r2, [r3, #512] @ 0x200 hcdc->CmdLength = (uint8_t)req->wLength; 8009744: 683b ldr r3, [r7, #0] 8009746: 88db ldrh r3, [r3, #6] 8009748: b2da uxtb r2, r3 800974a: 693b ldr r3, [r7, #16] 800974c: f883 2201 strb.w r2, [r3, #513] @ 0x201 USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength); 8009750: 6939 ldr r1, [r7, #16] 8009752: 683b ldr r3, [r7, #0] 8009754: 88db ldrh r3, [r3, #6] 8009756: 461a mov r2, r3 8009758: 6878 ldr r0, [r7, #4] 800975a: f001 fa21 bl 800aba0 break; 800975e: e058 b.n 8009812 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest, 8009760: 687b ldr r3, [r7, #4] 8009762: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 8009766: 689b ldr r3, [r3, #8] 8009768: 683a ldr r2, [r7, #0] 800976a: 7850 ldrb r0, [r2, #1] 800976c: 2200 movs r2, #0 800976e: 6839 ldr r1, [r7, #0] 8009770: 4798 blx r3 break; 8009772: e04e b.n 8009812 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 8009774: 683b ldr r3, [r7, #0] 8009776: 785b ldrb r3, [r3, #1] 8009778: 2b0b cmp r3, #11 800977a: d02e beq.n 80097da 800977c: 2b0b cmp r3, #11 800977e: dc38 bgt.n 80097f2 8009780: 2b00 cmp r3, #0 8009782: d002 beq.n 800978a 8009784: 2b0a cmp r3, #10 8009786: d014 beq.n 80097b2 8009788: e033 b.n 80097f2 { case USB_REQ_GET_STATUS: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800978a: 687b ldr r3, [r7, #4] 800978c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009790: 2b03 cmp r3, #3 8009792: d107 bne.n 80097a4 { USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U); 8009794: f107 030c add.w r3, r7, #12 8009798: 2202 movs r2, #2 800979a: 4619 mov r1, r3 800979c: 6878 ldr r0, [r7, #4] 800979e: f001 f9d1 bl 800ab44 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 80097a2: e02e b.n 8009802 USBD_CtlError(pdev, req); 80097a4: 6839 ldr r1, [r7, #0] 80097a6: 6878 ldr r0, [r7, #4] 80097a8: f001 f962 bl 800aa70 ret = USBD_FAIL; 80097ac: 2302 movs r3, #2 80097ae: 75fb strb r3, [r7, #23] break; 80097b0: e027 b.n 8009802 case USB_REQ_GET_INTERFACE: if (pdev->dev_state == USBD_STATE_CONFIGURED) 80097b2: 687b ldr r3, [r7, #4] 80097b4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80097b8: 2b03 cmp r3, #3 80097ba: d107 bne.n 80097cc { USBD_CtlSendData(pdev, &ifalt, 1U); 80097bc: f107 030f add.w r3, r7, #15 80097c0: 2201 movs r2, #1 80097c2: 4619 mov r1, r3 80097c4: 6878 ldr r0, [r7, #4] 80097c6: f001 f9bd bl 800ab44 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 80097ca: e01a b.n 8009802 USBD_CtlError(pdev, req); 80097cc: 6839 ldr r1, [r7, #0] 80097ce: 6878 ldr r0, [r7, #4] 80097d0: f001 f94e bl 800aa70 ret = USBD_FAIL; 80097d4: 2302 movs r3, #2 80097d6: 75fb strb r3, [r7, #23] break; 80097d8: e013 b.n 8009802 case USB_REQ_SET_INTERFACE: if (pdev->dev_state != USBD_STATE_CONFIGURED) 80097da: 687b ldr r3, [r7, #4] 80097dc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80097e0: 2b03 cmp r3, #3 80097e2: d00d beq.n 8009800 { USBD_CtlError(pdev, req); 80097e4: 6839 ldr r1, [r7, #0] 80097e6: 6878 ldr r0, [r7, #4] 80097e8: f001 f942 bl 800aa70 ret = USBD_FAIL; 80097ec: 2302 movs r3, #2 80097ee: 75fb strb r3, [r7, #23] } break; 80097f0: e006 b.n 8009800 default: USBD_CtlError(pdev, req); 80097f2: 6839 ldr r1, [r7, #0] 80097f4: 6878 ldr r0, [r7, #4] 80097f6: f001 f93b bl 800aa70 ret = USBD_FAIL; 80097fa: 2302 movs r3, #2 80097fc: 75fb strb r3, [r7, #23] break; 80097fe: e000 b.n 8009802 break; 8009800: bf00 nop } break; 8009802: e006 b.n 8009812 default: USBD_CtlError(pdev, req); 8009804: 6839 ldr r1, [r7, #0] 8009806: 6878 ldr r0, [r7, #4] 8009808: f001 f932 bl 800aa70 ret = USBD_FAIL; 800980c: 2302 movs r3, #2 800980e: 75fb strb r3, [r7, #23] break; 8009810: bf00 nop } return ret; 8009812: 7dfb ldrb r3, [r7, #23] } 8009814: 4618 mov r0, r3 8009816: 3718 adds r7, #24 8009818: 46bd mov sp, r7 800981a: bd80 pop {r7, pc} 0800981c : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { 800981c: b580 push {r7, lr} 800981e: b084 sub sp, #16 8009820: af00 add r7, sp, #0 8009822: 6078 str r0, [r7, #4] 8009824: 460b mov r3, r1 8009826: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData; 8009828: 687b ldr r3, [r7, #4] 800982a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800982e: 60fb str r3, [r7, #12] PCD_HandleTypeDef *hpcd = pdev->pData; 8009830: 687b ldr r3, [r7, #4] 8009832: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 8009836: 60bb str r3, [r7, #8] if (pdev->pClassData != NULL) 8009838: 687b ldr r3, [r7, #4] 800983a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800983e: 2b00 cmp r3, #0 8009840: d03a beq.n 80098b8 { if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U)) 8009842: 78fa ldrb r2, [r7, #3] 8009844: 6879 ldr r1, [r7, #4] 8009846: 4613 mov r3, r2 8009848: 009b lsls r3, r3, #2 800984a: 4413 add r3, r2 800984c: 009b lsls r3, r3, #2 800984e: 440b add r3, r1 8009850: 331c adds r3, #28 8009852: 681b ldr r3, [r3, #0] 8009854: 2b00 cmp r3, #0 8009856: d029 beq.n 80098ac 8009858: 78fa ldrb r2, [r7, #3] 800985a: 6879 ldr r1, [r7, #4] 800985c: 4613 mov r3, r2 800985e: 009b lsls r3, r3, #2 8009860: 4413 add r3, r2 8009862: 009b lsls r3, r3, #2 8009864: 440b add r3, r1 8009866: 331c adds r3, #28 8009868: 681a ldr r2, [r3, #0] 800986a: 78f9 ldrb r1, [r7, #3] 800986c: 68b8 ldr r0, [r7, #8] 800986e: 460b mov r3, r1 8009870: 009b lsls r3, r3, #2 8009872: 440b add r3, r1 8009874: 00db lsls r3, r3, #3 8009876: 4403 add r3, r0 8009878: 3320 adds r3, #32 800987a: 681b ldr r3, [r3, #0] 800987c: fbb2 f1f3 udiv r1, r2, r3 8009880: fb01 f303 mul.w r3, r1, r3 8009884: 1ad3 subs r3, r2, r3 8009886: 2b00 cmp r3, #0 8009888: d110 bne.n 80098ac { /* Update the packet total length */ pdev->ep_in[epnum].total_length = 0U; 800988a: 78fa ldrb r2, [r7, #3] 800988c: 6879 ldr r1, [r7, #4] 800988e: 4613 mov r3, r2 8009890: 009b lsls r3, r3, #2 8009892: 4413 add r3, r2 8009894: 009b lsls r3, r3, #2 8009896: 440b add r3, r1 8009898: 331c adds r3, #28 800989a: 2200 movs r2, #0 800989c: 601a str r2, [r3, #0] /* Send ZLP */ USBD_LL_Transmit(pdev, epnum, NULL, 0U); 800989e: 78f9 ldrb r1, [r7, #3] 80098a0: 2300 movs r3, #0 80098a2: 2200 movs r2, #0 80098a4: 6878 ldr r0, [r7, #4] 80098a6: f001 fe45 bl 800b534 80098aa: e003 b.n 80098b4 } else { hcdc->TxState = 0U; 80098ac: 68fb ldr r3, [r7, #12] 80098ae: 2200 movs r2, #0 80098b0: f8c3 2214 str.w r2, [r3, #532] @ 0x214 } return USBD_OK; 80098b4: 2300 movs r3, #0 80098b6: e000 b.n 80098ba } else { return USBD_FAIL; 80098b8: 2302 movs r3, #2 } } 80098ba: 4618 mov r0, r3 80098bc: 3710 adds r7, #16 80098be: 46bd mov sp, r7 80098c0: bd80 pop {r7, pc} 080098c2 : * @param pdev: device instance * @param epnum: endpoint number * @retval status */ static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum) { 80098c2: b580 push {r7, lr} 80098c4: b084 sub sp, #16 80098c6: af00 add r7, sp, #0 80098c8: 6078 str r0, [r7, #4] 80098ca: 460b mov r3, r1 80098cc: 70fb strb r3, [r7, #3] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 80098ce: 687b ldr r3, [r7, #4] 80098d0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80098d4: 60fb str r3, [r7, #12] /* Get the received data length */ hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum); 80098d6: 78fb ldrb r3, [r7, #3] 80098d8: 4619 mov r1, r3 80098da: 6878 ldr r0, [r7, #4] 80098dc: f001 fe70 bl 800b5c0 80098e0: 4602 mov r2, r0 80098e2: 68fb ldr r3, [r7, #12] 80098e4: f8c3 220c str.w r2, [r3, #524] @ 0x20c /* USB data will be immediately processed, this allow next USB traffic being NAKed till the end of the application Xfer */ if (pdev->pClassData != NULL) 80098e8: 687b ldr r3, [r7, #4] 80098ea: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80098ee: 2b00 cmp r3, #0 80098f0: d00d beq.n 800990e { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength); 80098f2: 687b ldr r3, [r7, #4] 80098f4: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 80098f8: 68db ldr r3, [r3, #12] 80098fa: 68fa ldr r2, [r7, #12] 80098fc: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204 8009900: 68fa ldr r2, [r7, #12] 8009902: f502 7203 add.w r2, r2, #524 @ 0x20c 8009906: 4611 mov r1, r2 8009908: 4798 blx r3 return USBD_OK; 800990a: 2300 movs r3, #0 800990c: e000 b.n 8009910 } else { return USBD_FAIL; 800990e: 2302 movs r3, #2 } } 8009910: 4618 mov r0, r3 8009912: 3710 adds r7, #16 8009914: 46bd mov sp, r7 8009916: bd80 pop {r7, pc} 08009918 : * Handle EP0 Rx Ready event * @param pdev: device instance * @retval status */ static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev) { 8009918: b580 push {r7, lr} 800991a: b084 sub sp, #16 800991c: af00 add r7, sp, #0 800991e: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009920: 687b ldr r3, [r7, #4] 8009922: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009926: 60fb str r3, [r7, #12] if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU)) 8009928: 687b ldr r3, [r7, #4] 800992a: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 800992e: 2b00 cmp r3, #0 8009930: d014 beq.n 800995c 8009932: 68fb ldr r3, [r7, #12] 8009934: f893 3200 ldrb.w r3, [r3, #512] @ 0x200 8009938: 2bff cmp r3, #255 @ 0xff 800993a: d00f beq.n 800995c { ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 800993c: 687b ldr r3, [r7, #4] 800993e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc 8009942: 689b ldr r3, [r3, #8] 8009944: 68fa ldr r2, [r7, #12] 8009946: f892 0200 ldrb.w r0, [r2, #512] @ 0x200 (uint8_t *)(void *)hcdc->data, 800994a: 68f9 ldr r1, [r7, #12] (uint16_t)hcdc->CmdLength); 800994c: 68fa ldr r2, [r7, #12] 800994e: f892 2201 ldrb.w r2, [r2, #513] @ 0x201 ((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode, 8009952: 4798 blx r3 hcdc->CmdOpCode = 0xFFU; 8009954: 68fb ldr r3, [r7, #12] 8009956: 22ff movs r2, #255 @ 0xff 8009958: f883 2200 strb.w r2, [r3, #512] @ 0x200 } return USBD_OK; 800995c: 2300 movs r3, #0 } 800995e: 4618 mov r0, r3 8009960: 3710 adds r7, #16 8009962: 46bd mov sp, r7 8009964: bd80 pop {r7, pc} ... 08009968 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length) { 8009968: b480 push {r7} 800996a: b083 sub sp, #12 800996c: af00 add r7, sp, #0 800996e: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgFSDesc); 8009970: 687b ldr r3, [r7, #4] 8009972: 2243 movs r2, #67 @ 0x43 8009974: 801a strh r2, [r3, #0] return USBD_CDC_CfgFSDesc; 8009976: 4b03 ldr r3, [pc, #12] @ (8009984 ) } 8009978: 4618 mov r0, r3 800997a: 370c adds r7, #12 800997c: 46bd mov sp, r7 800997e: bc80 pop {r7} 8009980: 4770 bx lr 8009982: bf00 nop 8009984: 20000098 .word 0x20000098 08009988 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length) { 8009988: b480 push {r7} 800998a: b083 sub sp, #12 800998c: af00 add r7, sp, #0 800998e: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_CfgHSDesc); 8009990: 687b ldr r3, [r7, #4] 8009992: 2243 movs r2, #67 @ 0x43 8009994: 801a strh r2, [r3, #0] return USBD_CDC_CfgHSDesc; 8009996: 4b03 ldr r3, [pc, #12] @ (80099a4 ) } 8009998: 4618 mov r0, r3 800999a: 370c adds r7, #12 800999c: 46bd mov sp, r7 800999e: bc80 pop {r7} 80099a0: 4770 bx lr 80099a2: bf00 nop 80099a4: 20000054 .word 0x20000054 080099a8 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length) { 80099a8: b480 push {r7} 80099aa: b083 sub sp, #12 80099ac: af00 add r7, sp, #0 80099ae: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_OtherSpeedCfgDesc); 80099b0: 687b ldr r3, [r7, #4] 80099b2: 2243 movs r2, #67 @ 0x43 80099b4: 801a strh r2, [r3, #0] return USBD_CDC_OtherSpeedCfgDesc; 80099b6: 4b03 ldr r3, [pc, #12] @ (80099c4 ) } 80099b8: 4618 mov r0, r3 80099ba: 370c adds r7, #12 80099bc: 46bd mov sp, r7 80099be: bc80 pop {r7} 80099c0: 4770 bx lr 80099c2: bf00 nop 80099c4: 200000dc .word 0x200000dc 080099c8 : * return Device Qualifier descriptor * @param length : pointer data length * @retval pointer to descriptor buffer */ uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length) { 80099c8: b480 push {r7} 80099ca: b083 sub sp, #12 80099cc: af00 add r7, sp, #0 80099ce: 6078 str r0, [r7, #4] *length = sizeof(USBD_CDC_DeviceQualifierDesc); 80099d0: 687b ldr r3, [r7, #4] 80099d2: 220a movs r2, #10 80099d4: 801a strh r2, [r3, #0] return USBD_CDC_DeviceQualifierDesc; 80099d6: 4b03 ldr r3, [pc, #12] @ (80099e4 ) } 80099d8: 4618 mov r0, r3 80099da: 370c adds r7, #12 80099dc: 46bd mov sp, r7 80099de: bc80 pop {r7} 80099e0: 4770 bx lr 80099e2: bf00 nop 80099e4: 20000010 .word 0x20000010 080099e8 : * @param fops: CD Interface callback * @retval status */ uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev, USBD_CDC_ItfTypeDef *fops) { 80099e8: b480 push {r7} 80099ea: b085 sub sp, #20 80099ec: af00 add r7, sp, #0 80099ee: 6078 str r0, [r7, #4] 80099f0: 6039 str r1, [r7, #0] uint8_t ret = USBD_FAIL; 80099f2: 2302 movs r3, #2 80099f4: 73fb strb r3, [r7, #15] if (fops != NULL) 80099f6: 683b ldr r3, [r7, #0] 80099f8: 2b00 cmp r3, #0 80099fa: d005 beq.n 8009a08 { pdev->pUserData = fops; 80099fc: 687b ldr r3, [r7, #4] 80099fe: 683a ldr r2, [r7, #0] 8009a00: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc ret = USBD_OK; 8009a04: 2300 movs r3, #0 8009a06: 73fb strb r3, [r7, #15] } return ret; 8009a08: 7bfb ldrb r3, [r7, #15] } 8009a0a: 4618 mov r0, r3 8009a0c: 3714 adds r7, #20 8009a0e: 46bd mov sp, r7 8009a10: bc80 pop {r7} 8009a12: 4770 bx lr 08009a14 : * @retval status */ uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff, uint16_t length) { 8009a14: b480 push {r7} 8009a16: b087 sub sp, #28 8009a18: af00 add r7, sp, #0 8009a1a: 60f8 str r0, [r7, #12] 8009a1c: 60b9 str r1, [r7, #8] 8009a1e: 4613 mov r3, r2 8009a20: 80fb strh r3, [r7, #6] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009a22: 68fb ldr r3, [r7, #12] 8009a24: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009a28: 617b str r3, [r7, #20] hcdc->TxBuffer = pbuff; 8009a2a: 697b ldr r3, [r7, #20] 8009a2c: 68ba ldr r2, [r7, #8] 8009a2e: f8c3 2208 str.w r2, [r3, #520] @ 0x208 hcdc->TxLength = length; 8009a32: 88fa ldrh r2, [r7, #6] 8009a34: 697b ldr r3, [r7, #20] 8009a36: f8c3 2210 str.w r2, [r3, #528] @ 0x210 return USBD_OK; 8009a3a: 2300 movs r3, #0 } 8009a3c: 4618 mov r0, r3 8009a3e: 371c adds r7, #28 8009a40: 46bd mov sp, r7 8009a42: bc80 pop {r7} 8009a44: 4770 bx lr 08009a46 : * @param pbuff: Rx Buffer * @retval status */ uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev, uint8_t *pbuff) { 8009a46: b480 push {r7} 8009a48: b085 sub sp, #20 8009a4a: af00 add r7, sp, #0 8009a4c: 6078 str r0, [r7, #4] 8009a4e: 6039 str r1, [r7, #0] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009a50: 687b ldr r3, [r7, #4] 8009a52: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009a56: 60fb str r3, [r7, #12] hcdc->RxBuffer = pbuff; 8009a58: 68fb ldr r3, [r7, #12] 8009a5a: 683a ldr r2, [r7, #0] 8009a5c: f8c3 2204 str.w r2, [r3, #516] @ 0x204 return USBD_OK; 8009a60: 2300 movs r3, #0 } 8009a62: 4618 mov r0, r3 8009a64: 3714 adds r7, #20 8009a66: 46bd mov sp, r7 8009a68: bc80 pop {r7} 8009a6a: 4770 bx lr 08009a6c : * Transmit packet on IN endpoint * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev) { 8009a6c: b580 push {r7, lr} 8009a6e: b084 sub sp, #16 8009a70: af00 add r7, sp, #0 8009a72: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009a74: 687b ldr r3, [r7, #4] 8009a76: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009a7a: 60fb str r3, [r7, #12] if (pdev->pClassData != NULL) 8009a7c: 687b ldr r3, [r7, #4] 8009a7e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009a82: 2b00 cmp r3, #0 8009a84: d01c beq.n 8009ac0 { if (hcdc->TxState == 0U) 8009a86: 68fb ldr r3, [r7, #12] 8009a88: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 8009a8c: 2b00 cmp r3, #0 8009a8e: d115 bne.n 8009abc { /* Tx Transfer in progress */ hcdc->TxState = 1U; 8009a90: 68fb ldr r3, [r7, #12] 8009a92: 2201 movs r2, #1 8009a94: f8c3 2214 str.w r2, [r3, #532] @ 0x214 /* Update the packet total length */ pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength; 8009a98: 68fb ldr r3, [r7, #12] 8009a9a: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210 8009a9e: 687b ldr r3, [r7, #4] 8009aa0: 631a str r2, [r3, #48] @ 0x30 /* Transmit next packet */ USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 8009aa2: 68fb ldr r3, [r7, #12] 8009aa4: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208 (uint16_t)hcdc->TxLength); 8009aa8: 68fb ldr r3, [r7, #12] 8009aaa: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210 USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer, 8009aae: b29b uxth r3, r3 8009ab0: 2181 movs r1, #129 @ 0x81 8009ab2: 6878 ldr r0, [r7, #4] 8009ab4: f001 fd3e bl 800b534 return USBD_OK; 8009ab8: 2300 movs r3, #0 8009aba: e002 b.n 8009ac2 } else { return USBD_BUSY; 8009abc: 2301 movs r3, #1 8009abe: e000 b.n 8009ac2 } } else { return USBD_FAIL; 8009ac0: 2302 movs r3, #2 } } 8009ac2: 4618 mov r0, r3 8009ac4: 3710 adds r7, #16 8009ac6: 46bd mov sp, r7 8009ac8: bd80 pop {r7, pc} 08009aca : * prepare OUT Endpoint for reception * @param pdev: device instance * @retval status */ uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev) { 8009aca: b580 push {r7, lr} 8009acc: b084 sub sp, #16 8009ace: af00 add r7, sp, #0 8009ad0: 6078 str r0, [r7, #4] USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData; 8009ad2: 687b ldr r3, [r7, #4] 8009ad4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009ad8: 60fb str r3, [r7, #12] /* Suspend or Resume USB Out process */ if (pdev->pClassData != NULL) 8009ada: 687b ldr r3, [r7, #4] 8009adc: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009ae0: 2b00 cmp r3, #0 8009ae2: d017 beq.n 8009b14 { if (pdev->dev_speed == USBD_SPEED_HIGH) 8009ae4: 687b ldr r3, [r7, #4] 8009ae6: 7c1b ldrb r3, [r3, #16] 8009ae8: 2b00 cmp r3, #0 8009aea: d109 bne.n 8009b00 { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 8009aec: 68fb ldr r3, [r7, #12] 8009aee: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 8009af2: f44f 7300 mov.w r3, #512 @ 0x200 8009af6: 2101 movs r1, #1 8009af8: 6878 ldr r0, [r7, #4] 8009afa: f001 fd3e bl 800b57a 8009afe: e007 b.n 8009b10 CDC_DATA_HS_OUT_PACKET_SIZE); } else { /* Prepare Out endpoint to receive next packet */ USBD_LL_PrepareReceive(pdev, 8009b00: 68fb ldr r3, [r7, #12] 8009b02: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204 8009b06: 2340 movs r3, #64 @ 0x40 8009b08: 2101 movs r1, #1 8009b0a: 6878 ldr r0, [r7, #4] 8009b0c: f001 fd35 bl 800b57a CDC_OUT_EP, hcdc->RxBuffer, CDC_DATA_FS_OUT_PACKET_SIZE); } return USBD_OK; 8009b10: 2300 movs r3, #0 8009b12: e000 b.n 8009b16 } else { return USBD_FAIL; 8009b14: 2302 movs r3, #2 } } 8009b16: 4618 mov r0, r3 8009b18: 3710 adds r7, #16 8009b1a: 46bd mov sp, r7 8009b1c: bd80 pop {r7, pc} 08009b1e : * @param id: Low level core index * @retval None */ USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) { 8009b1e: b580 push {r7, lr} 8009b20: b084 sub sp, #16 8009b22: af00 add r7, sp, #0 8009b24: 60f8 str r0, [r7, #12] 8009b26: 60b9 str r1, [r7, #8] 8009b28: 4613 mov r3, r2 8009b2a: 71fb strb r3, [r7, #7] /* Check whether the USB Host handle is valid */ if (pdev == NULL) 8009b2c: 68fb ldr r3, [r7, #12] 8009b2e: 2b00 cmp r3, #0 8009b30: d101 bne.n 8009b36 { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Device handle"); #endif return USBD_FAIL; 8009b32: 2302 movs r3, #2 8009b34: e01a b.n 8009b6c } /* Unlink previous class*/ if (pdev->pClass != NULL) 8009b36: 68fb ldr r3, [r7, #12] 8009b38: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009b3c: 2b00 cmp r3, #0 8009b3e: d003 beq.n 8009b48 { pdev->pClass = NULL; 8009b40: 68fb ldr r3, [r7, #12] 8009b42: 2200 movs r2, #0 8009b44: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 } /* Assign USBD Descriptors */ if (pdesc != NULL) 8009b48: 68bb ldr r3, [r7, #8] 8009b4a: 2b00 cmp r3, #0 8009b4c: d003 beq.n 8009b56 { pdev->pDesc = pdesc; 8009b4e: 68fb ldr r3, [r7, #12] 8009b50: 68ba ldr r2, [r7, #8] 8009b52: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0 } /* Set Device initial State */ pdev->dev_state = USBD_STATE_DEFAULT; 8009b56: 68fb ldr r3, [r7, #12] 8009b58: 2201 movs r2, #1 8009b5a: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->id = id; 8009b5e: 68fb ldr r3, [r7, #12] 8009b60: 79fa ldrb r2, [r7, #7] 8009b62: 701a strb r2, [r3, #0] /* Initialize low level driver */ USBD_LL_Init(pdev); 8009b64: 68f8 ldr r0, [r7, #12] 8009b66: f001 fba3 bl 800b2b0 return USBD_OK; 8009b6a: 2300 movs r3, #0 } 8009b6c: 4618 mov r0, r3 8009b6e: 3710 adds r7, #16 8009b70: 46bd mov sp, r7 8009b72: bd80 pop {r7, pc} 08009b74 : * @param pDevice : Device Handle * @param pclass: Class handle * @retval USBD Status */ USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) { 8009b74: b480 push {r7} 8009b76: b085 sub sp, #20 8009b78: af00 add r7, sp, #0 8009b7a: 6078 str r0, [r7, #4] 8009b7c: 6039 str r1, [r7, #0] USBD_StatusTypeDef status = USBD_OK; 8009b7e: 2300 movs r3, #0 8009b80: 73fb strb r3, [r7, #15] if (pclass != NULL) 8009b82: 683b ldr r3, [r7, #0] 8009b84: 2b00 cmp r3, #0 8009b86: d006 beq.n 8009b96 { /* link the class to the USB Device handle */ pdev->pClass = pclass; 8009b88: 687b ldr r3, [r7, #4] 8009b8a: 683a ldr r2, [r7, #0] 8009b8c: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 status = USBD_OK; 8009b90: 2300 movs r3, #0 8009b92: 73fb strb r3, [r7, #15] 8009b94: e001 b.n 8009b9a else { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Class handle"); #endif status = USBD_FAIL; 8009b96: 2302 movs r3, #2 8009b98: 73fb strb r3, [r7, #15] } return status; 8009b9a: 7bfb ldrb r3, [r7, #15] } 8009b9c: 4618 mov r0, r3 8009b9e: 3714 adds r7, #20 8009ba0: 46bd mov sp, r7 8009ba2: bc80 pop {r7} 8009ba4: 4770 bx lr 08009ba6 : * Start the USB Device Core. * @param pdev: Device Handle * @retval USBD Status */ USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev) { 8009ba6: b580 push {r7, lr} 8009ba8: b082 sub sp, #8 8009baa: af00 add r7, sp, #0 8009bac: 6078 str r0, [r7, #4] /* Start the low level driver */ USBD_LL_Start(pdev); 8009bae: 6878 ldr r0, [r7, #4] 8009bb0: f001 fbd8 bl 800b364 return USBD_OK; 8009bb4: 2300 movs r3, #0 } 8009bb6: 4618 mov r0, r3 8009bb8: 3708 adds r7, #8 8009bba: 46bd mov sp, r7 8009bbc: bd80 pop {r7, pc} 08009bbe : * Launch test mode process * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev) { 8009bbe: b480 push {r7} 8009bc0: b083 sub sp, #12 8009bc2: af00 add r7, sp, #0 8009bc4: 6078 str r0, [r7, #4] /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 8009bc6: 2300 movs r3, #0 } 8009bc8: 4618 mov r0, r3 8009bca: 370c adds r7, #12 8009bcc: 46bd mov sp, r7 8009bce: bc80 pop {r7} 8009bd0: 4770 bx lr 08009bd2 : * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8009bd2: b580 push {r7, lr} 8009bd4: b084 sub sp, #16 8009bd6: af00 add r7, sp, #0 8009bd8: 6078 str r0, [r7, #4] 8009bda: 460b mov r3, r1 8009bdc: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_FAIL; 8009bde: 2302 movs r3, #2 8009be0: 73fb strb r3, [r7, #15] if (pdev->pClass != NULL) 8009be2: 687b ldr r3, [r7, #4] 8009be4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009be8: 2b00 cmp r3, #0 8009bea: d00c beq.n 8009c06 { /* Set configuration and Start the Class*/ if (pdev->pClass->Init(pdev, cfgidx) == 0U) 8009bec: 687b ldr r3, [r7, #4] 8009bee: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009bf2: 681b ldr r3, [r3, #0] 8009bf4: 78fa ldrb r2, [r7, #3] 8009bf6: 4611 mov r1, r2 8009bf8: 6878 ldr r0, [r7, #4] 8009bfa: 4798 blx r3 8009bfc: 4603 mov r3, r0 8009bfe: 2b00 cmp r3, #0 8009c00: d101 bne.n 8009c06 { ret = USBD_OK; 8009c02: 2300 movs r3, #0 8009c04: 73fb strb r3, [r7, #15] } } return ret; 8009c06: 7bfb ldrb r3, [r7, #15] } 8009c08: 4618 mov r0, r3 8009c0a: 3710 adds r7, #16 8009c0c: 46bd mov sp, r7 8009c0e: bd80 pop {r7, pc} 08009c10 : * @param pdev: device instance * @param cfgidx: configuration index * @retval status: USBD_StatusTypeDef */ USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8009c10: b580 push {r7, lr} 8009c12: b082 sub sp, #8 8009c14: af00 add r7, sp, #0 8009c16: 6078 str r0, [r7, #4] 8009c18: 460b mov r3, r1 8009c1a: 70fb strb r3, [r7, #3] /* Clear configuration and De-initialize the Class process*/ pdev->pClass->DeInit(pdev, cfgidx); 8009c1c: 687b ldr r3, [r7, #4] 8009c1e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009c22: 685b ldr r3, [r3, #4] 8009c24: 78fa ldrb r2, [r7, #3] 8009c26: 4611 mov r1, r2 8009c28: 6878 ldr r0, [r7, #4] 8009c2a: 4798 blx r3 return USBD_OK; 8009c2c: 2300 movs r3, #0 } 8009c2e: 4618 mov r0, r3 8009c30: 3708 adds r7, #8 8009c32: 46bd mov sp, r7 8009c34: bd80 pop {r7, pc} 08009c36 : * Handle the setup stage * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) { 8009c36: b580 push {r7, lr} 8009c38: b082 sub sp, #8 8009c3a: af00 add r7, sp, #0 8009c3c: 6078 str r0, [r7, #4] 8009c3e: 6039 str r1, [r7, #0] USBD_ParseSetupRequest(&pdev->request, psetup); 8009c40: 687b ldr r3, [r7, #4] 8009c42: f503 732a add.w r3, r3, #680 @ 0x2a8 8009c46: 6839 ldr r1, [r7, #0] 8009c48: 4618 mov r0, r3 8009c4a: f000 fed8 bl 800a9fe pdev->ep0_state = USBD_EP0_SETUP; 8009c4e: 687b ldr r3, [r7, #4] 8009c50: 2201 movs r2, #1 8009c52: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep0_data_len = pdev->request.wLength; 8009c56: 687b ldr r3, [r7, #4] 8009c58: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 8009c5c: 461a mov r2, r3 8009c5e: 687b ldr r3, [r7, #4] 8009c60: f8c3 2298 str.w r2, [r3, #664] @ 0x298 switch (pdev->request.bmRequest & 0x1FU) 8009c64: 687b ldr r3, [r7, #4] 8009c66: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 8009c6a: f003 031f and.w r3, r3, #31 8009c6e: 2b02 cmp r3, #2 8009c70: d016 beq.n 8009ca0 8009c72: 2b02 cmp r3, #2 8009c74: d81c bhi.n 8009cb0 8009c76: 2b00 cmp r3, #0 8009c78: d002 beq.n 8009c80 8009c7a: 2b01 cmp r3, #1 8009c7c: d008 beq.n 8009c90 8009c7e: e017 b.n 8009cb0 { case USB_REQ_RECIPIENT_DEVICE: USBD_StdDevReq(pdev, &pdev->request); 8009c80: 687b ldr r3, [r7, #4] 8009c82: f503 732a add.w r3, r3, #680 @ 0x2a8 8009c86: 4619 mov r1, r3 8009c88: 6878 ldr r0, [r7, #4] 8009c8a: f000 f9cb bl 800a024 break; 8009c8e: e01a b.n 8009cc6 case USB_REQ_RECIPIENT_INTERFACE: USBD_StdItfReq(pdev, &pdev->request); 8009c90: 687b ldr r3, [r7, #4] 8009c92: f503 732a add.w r3, r3, #680 @ 0x2a8 8009c96: 4619 mov r1, r3 8009c98: 6878 ldr r0, [r7, #4] 8009c9a: f000 fa2d bl 800a0f8 break; 8009c9e: e012 b.n 8009cc6 case USB_REQ_RECIPIENT_ENDPOINT: USBD_StdEPReq(pdev, &pdev->request); 8009ca0: 687b ldr r3, [r7, #4] 8009ca2: f503 732a add.w r3, r3, #680 @ 0x2a8 8009ca6: 4619 mov r1, r3 8009ca8: 6878 ldr r0, [r7, #4] 8009caa: f000 fa6d bl 800a188 break; 8009cae: e00a b.n 8009cc6 default: USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U)); 8009cb0: 687b ldr r3, [r7, #4] 8009cb2: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8 8009cb6: f023 037f bic.w r3, r3, #127 @ 0x7f 8009cba: b2db uxtb r3, r3 8009cbc: 4619 mov r1, r3 8009cbe: 6878 ldr r0, [r7, #4] 8009cc0: f001 fbb0 bl 800b424 break; 8009cc4: bf00 nop } return USBD_OK; 8009cc6: 2300 movs r3, #0 } 8009cc8: 4618 mov r0, r3 8009cca: 3708 adds r7, #8 8009ccc: 46bd mov sp, r7 8009cce: bd80 pop {r7, pc} 08009cd0 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 8009cd0: b580 push {r7, lr} 8009cd2: b086 sub sp, #24 8009cd4: af00 add r7, sp, #0 8009cd6: 60f8 str r0, [r7, #12] 8009cd8: 460b mov r3, r1 8009cda: 607a str r2, [r7, #4] 8009cdc: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 8009cde: 7afb ldrb r3, [r7, #11] 8009ce0: 2b00 cmp r3, #0 8009ce2: d14b bne.n 8009d7c { pep = &pdev->ep_out[0]; 8009ce4: 68fb ldr r3, [r7, #12] 8009ce6: f503 73aa add.w r3, r3, #340 @ 0x154 8009cea: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_OUT) 8009cec: 68fb ldr r3, [r7, #12] 8009cee: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 8009cf2: 2b03 cmp r3, #3 8009cf4: d134 bne.n 8009d60 { if (pep->rem_length > pep->maxpacket) 8009cf6: 697b ldr r3, [r7, #20] 8009cf8: 68da ldr r2, [r3, #12] 8009cfa: 697b ldr r3, [r7, #20] 8009cfc: 691b ldr r3, [r3, #16] 8009cfe: 429a cmp r2, r3 8009d00: d919 bls.n 8009d36 { pep->rem_length -= pep->maxpacket; 8009d02: 697b ldr r3, [r7, #20] 8009d04: 68da ldr r2, [r3, #12] 8009d06: 697b ldr r3, [r7, #20] 8009d08: 691b ldr r3, [r3, #16] 8009d0a: 1ad2 subs r2, r2, r3 8009d0c: 697b ldr r3, [r7, #20] 8009d0e: 60da str r2, [r3, #12] USBD_CtlContinueRx(pdev, pdata, (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 8009d10: 697b ldr r3, [r7, #20] 8009d12: 68da ldr r2, [r3, #12] 8009d14: 697b ldr r3, [r7, #20] 8009d16: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 8009d18: 429a cmp r2, r3 8009d1a: d203 bcs.n 8009d24 (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 8009d1c: 697b ldr r3, [r7, #20] 8009d1e: 68db ldr r3, [r3, #12] USBD_CtlContinueRx(pdev, pdata, 8009d20: b29b uxth r3, r3 8009d22: e002 b.n 8009d2a (uint16_t)MIN(pep->rem_length, pep->maxpacket)); 8009d24: 697b ldr r3, [r7, #20] 8009d26: 691b ldr r3, [r3, #16] USBD_CtlContinueRx(pdev, pdata, 8009d28: b29b uxth r3, r3 8009d2a: 461a mov r2, r3 8009d2c: 6879 ldr r1, [r7, #4] 8009d2e: 68f8 ldr r0, [r7, #12] 8009d30: f000 ff54 bl 800abdc 8009d34: e038 b.n 8009da8 } else { if ((pdev->pClass->EP0_RxReady != NULL) && 8009d36: 68fb ldr r3, [r7, #12] 8009d38: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009d3c: 691b ldr r3, [r3, #16] 8009d3e: 2b00 cmp r3, #0 8009d40: d00a beq.n 8009d58 (pdev->dev_state == USBD_STATE_CONFIGURED)) 8009d42: 68fb ldr r3, [r7, #12] 8009d44: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_RxReady != NULL) && 8009d48: 2b03 cmp r3, #3 8009d4a: d105 bne.n 8009d58 { pdev->pClass->EP0_RxReady(pdev); 8009d4c: 68fb ldr r3, [r7, #12] 8009d4e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009d52: 691b ldr r3, [r3, #16] 8009d54: 68f8 ldr r0, [r7, #12] 8009d56: 4798 blx r3 } USBD_CtlSendStatus(pdev); 8009d58: 68f8 ldr r0, [r7, #12] 8009d5a: f000 ff51 bl 800ac00 8009d5e: e023 b.n 8009da8 } } else { if (pdev->ep0_state == USBD_EP0_STATUS_OUT) 8009d60: 68fb ldr r3, [r7, #12] 8009d62: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 8009d66: 2b05 cmp r3, #5 8009d68: d11e bne.n 8009da8 { /* * STATUS PHASE completed, update ep0_state to idle */ pdev->ep0_state = USBD_EP0_IDLE; 8009d6a: 68fb ldr r3, [r7, #12] 8009d6c: 2200 movs r2, #0 8009d6e: f8c3 2294 str.w r2, [r3, #660] @ 0x294 USBD_LL_StallEP(pdev, 0U); 8009d72: 2100 movs r1, #0 8009d74: 68f8 ldr r0, [r7, #12] 8009d76: f001 fb55 bl 800b424 8009d7a: e015 b.n 8009da8 } } } else if ((pdev->pClass->DataOut != NULL) && 8009d7c: 68fb ldr r3, [r7, #12] 8009d7e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009d82: 699b ldr r3, [r3, #24] 8009d84: 2b00 cmp r3, #0 8009d86: d00d beq.n 8009da4 (pdev->dev_state == USBD_STATE_CONFIGURED)) 8009d88: 68fb ldr r3, [r7, #12] 8009d8a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataOut != NULL) && 8009d8e: 2b03 cmp r3, #3 8009d90: d108 bne.n 8009da4 { pdev->pClass->DataOut(pdev, epnum); 8009d92: 68fb ldr r3, [r7, #12] 8009d94: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009d98: 699b ldr r3, [r3, #24] 8009d9a: 7afa ldrb r2, [r7, #11] 8009d9c: 4611 mov r1, r2 8009d9e: 68f8 ldr r0, [r7, #12] 8009da0: 4798 blx r3 8009da2: e001 b.n 8009da8 } else { /* should never be in this condition */ return USBD_FAIL; 8009da4: 2302 movs r3, #2 8009da6: e000 b.n 8009daa } return USBD_OK; 8009da8: 2300 movs r3, #0 } 8009daa: 4618 mov r0, r3 8009dac: 3718 adds r7, #24 8009dae: 46bd mov sp, r7 8009db0: bd80 pop {r7, pc} 08009db2 : * @param epnum: endpoint index * @retval status */ USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 8009db2: b580 push {r7, lr} 8009db4: b086 sub sp, #24 8009db6: af00 add r7, sp, #0 8009db8: 60f8 str r0, [r7, #12] 8009dba: 460b mov r3, r1 8009dbc: 607a str r2, [r7, #4] 8009dbe: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; if (epnum == 0U) 8009dc0: 7afb ldrb r3, [r7, #11] 8009dc2: 2b00 cmp r3, #0 8009dc4: d17f bne.n 8009ec6 { pep = &pdev->ep_in[0]; 8009dc6: 68fb ldr r3, [r7, #12] 8009dc8: 3314 adds r3, #20 8009dca: 617b str r3, [r7, #20] if (pdev->ep0_state == USBD_EP0_DATA_IN) 8009dcc: 68fb ldr r3, [r7, #12] 8009dce: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 8009dd2: 2b02 cmp r3, #2 8009dd4: d15c bne.n 8009e90 { if (pep->rem_length > pep->maxpacket) 8009dd6: 697b ldr r3, [r7, #20] 8009dd8: 68da ldr r2, [r3, #12] 8009dda: 697b ldr r3, [r7, #20] 8009ddc: 691b ldr r3, [r3, #16] 8009dde: 429a cmp r2, r3 8009de0: d915 bls.n 8009e0e { pep->rem_length -= pep->maxpacket; 8009de2: 697b ldr r3, [r7, #20] 8009de4: 68da ldr r2, [r3, #12] 8009de6: 697b ldr r3, [r7, #20] 8009de8: 691b ldr r3, [r3, #16] 8009dea: 1ad2 subs r2, r2, r3 8009dec: 697b ldr r3, [r7, #20] 8009dee: 60da str r2, [r3, #12] USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length); 8009df0: 697b ldr r3, [r7, #20] 8009df2: 68db ldr r3, [r3, #12] 8009df4: b29b uxth r3, r3 8009df6: 461a mov r2, r3 8009df8: 6879 ldr r1, [r7, #4] 8009dfa: 68f8 ldr r0, [r7, #12] 8009dfc: f000 febe bl 800ab7c /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 8009e00: 2300 movs r3, #0 8009e02: 2200 movs r2, #0 8009e04: 2100 movs r1, #0 8009e06: 68f8 ldr r0, [r7, #12] 8009e08: f001 fbb7 bl 800b57a 8009e0c: e04e b.n 8009eac } else { /* last packet is MPS multiple, so send ZLP packet */ if ((pep->total_length % pep->maxpacket == 0U) && 8009e0e: 697b ldr r3, [r7, #20] 8009e10: 689b ldr r3, [r3, #8] 8009e12: 697a ldr r2, [r7, #20] 8009e14: 6912 ldr r2, [r2, #16] 8009e16: fbb3 f1f2 udiv r1, r3, r2 8009e1a: fb01 f202 mul.w r2, r1, r2 8009e1e: 1a9b subs r3, r3, r2 8009e20: 2b00 cmp r3, #0 8009e22: d11c bne.n 8009e5e (pep->total_length >= pep->maxpacket) && 8009e24: 697b ldr r3, [r7, #20] 8009e26: 689a ldr r2, [r3, #8] 8009e28: 697b ldr r3, [r7, #20] 8009e2a: 691b ldr r3, [r3, #16] if ((pep->total_length % pep->maxpacket == 0U) && 8009e2c: 429a cmp r2, r3 8009e2e: d316 bcc.n 8009e5e (pep->total_length < pdev->ep0_data_len)) 8009e30: 697b ldr r3, [r7, #20] 8009e32: 689a ldr r2, [r3, #8] 8009e34: 68fb ldr r3, [r7, #12] 8009e36: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298 (pep->total_length >= pep->maxpacket) && 8009e3a: 429a cmp r2, r3 8009e3c: d20f bcs.n 8009e5e { USBD_CtlContinueSendData(pdev, NULL, 0U); 8009e3e: 2200 movs r2, #0 8009e40: 2100 movs r1, #0 8009e42: 68f8 ldr r0, [r7, #12] 8009e44: f000 fe9a bl 800ab7c pdev->ep0_data_len = 0U; 8009e48: 68fb ldr r3, [r7, #12] 8009e4a: 2200 movs r2, #0 8009e4c: f8c3 2298 str.w r2, [r3, #664] @ 0x298 /* Prepare endpoint for premature end of transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 8009e50: 2300 movs r3, #0 8009e52: 2200 movs r2, #0 8009e54: 2100 movs r1, #0 8009e56: 68f8 ldr r0, [r7, #12] 8009e58: f001 fb8f bl 800b57a 8009e5c: e026 b.n 8009eac } else { if ((pdev->pClass->EP0_TxSent != NULL) && 8009e5e: 68fb ldr r3, [r7, #12] 8009e60: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009e64: 68db ldr r3, [r3, #12] 8009e66: 2b00 cmp r3, #0 8009e68: d00a beq.n 8009e80 (pdev->dev_state == USBD_STATE_CONFIGURED)) 8009e6a: 68fb ldr r3, [r7, #12] 8009e6c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c if ((pdev->pClass->EP0_TxSent != NULL) && 8009e70: 2b03 cmp r3, #3 8009e72: d105 bne.n 8009e80 { pdev->pClass->EP0_TxSent(pdev); 8009e74: 68fb ldr r3, [r7, #12] 8009e76: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009e7a: 68db ldr r3, [r3, #12] 8009e7c: 68f8 ldr r0, [r7, #12] 8009e7e: 4798 blx r3 } USBD_LL_StallEP(pdev, 0x80U); 8009e80: 2180 movs r1, #128 @ 0x80 8009e82: 68f8 ldr r0, [r7, #12] 8009e84: f001 face bl 800b424 USBD_CtlReceiveStatus(pdev); 8009e88: 68f8 ldr r0, [r7, #12] 8009e8a: f000 fecc bl 800ac26 8009e8e: e00d b.n 8009eac } } } else { if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 8009e90: 68fb ldr r3, [r7, #12] 8009e92: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 8009e96: 2b04 cmp r3, #4 8009e98: d004 beq.n 8009ea4 (pdev->ep0_state == USBD_EP0_IDLE)) 8009e9a: 68fb ldr r3, [r7, #12] 8009e9c: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 if ((pdev->ep0_state == USBD_EP0_STATUS_IN) || 8009ea0: 2b00 cmp r3, #0 8009ea2: d103 bne.n 8009eac { USBD_LL_StallEP(pdev, 0x80U); 8009ea4: 2180 movs r1, #128 @ 0x80 8009ea6: 68f8 ldr r0, [r7, #12] 8009ea8: f001 fabc bl 800b424 } } if (pdev->dev_test_mode == 1U) 8009eac: 68fb ldr r3, [r7, #12] 8009eae: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0 8009eb2: 2b01 cmp r3, #1 8009eb4: d11d bne.n 8009ef2 { USBD_RunTestMode(pdev); 8009eb6: 68f8 ldr r0, [r7, #12] 8009eb8: f7ff fe81 bl 8009bbe pdev->dev_test_mode = 0U; 8009ebc: 68fb ldr r3, [r7, #12] 8009ebe: 2200 movs r2, #0 8009ec0: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 8009ec4: e015 b.n 8009ef2 } } else if ((pdev->pClass->DataIn != NULL) && 8009ec6: 68fb ldr r3, [r7, #12] 8009ec8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009ecc: 695b ldr r3, [r3, #20] 8009ece: 2b00 cmp r3, #0 8009ed0: d00d beq.n 8009eee (pdev->dev_state == USBD_STATE_CONFIGURED)) 8009ed2: 68fb ldr r3, [r7, #12] 8009ed4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c else if ((pdev->pClass->DataIn != NULL) && 8009ed8: 2b03 cmp r3, #3 8009eda: d108 bne.n 8009eee { pdev->pClass->DataIn(pdev, epnum); 8009edc: 68fb ldr r3, [r7, #12] 8009ede: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009ee2: 695b ldr r3, [r3, #20] 8009ee4: 7afa ldrb r2, [r7, #11] 8009ee6: 4611 mov r1, r2 8009ee8: 68f8 ldr r0, [r7, #12] 8009eea: 4798 blx r3 8009eec: e001 b.n 8009ef2 } else { /* should never be in this condition */ return USBD_FAIL; 8009eee: 2302 movs r3, #2 8009ef0: e000 b.n 8009ef4 } return USBD_OK; 8009ef2: 2300 movs r3, #0 } 8009ef4: 4618 mov r0, r3 8009ef6: 3718 adds r7, #24 8009ef8: 46bd mov sp, r7 8009efa: bd80 pop {r7, pc} 08009efc : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) { 8009efc: b580 push {r7, lr} 8009efe: b082 sub sp, #8 8009f00: af00 add r7, sp, #0 8009f02: 6078 str r0, [r7, #4] /* Open EP0 OUT */ USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 8009f04: 2340 movs r3, #64 @ 0x40 8009f06: 2200 movs r2, #0 8009f08: 2100 movs r1, #0 8009f0a: 6878 ldr r0, [r7, #4] 8009f0c: f001 fa45 bl 800b39a pdev->ep_out[0x00U & 0xFU].is_used = 1U; 8009f10: 687b ldr r3, [r7, #4] 8009f12: 2201 movs r2, #1 8009f14: f8c3 2158 str.w r2, [r3, #344] @ 0x158 pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; 8009f18: 687b ldr r3, [r7, #4] 8009f1a: 2240 movs r2, #64 @ 0x40 8009f1c: f8c3 2164 str.w r2, [r3, #356] @ 0x164 /* Open EP0 IN */ USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 8009f20: 2340 movs r3, #64 @ 0x40 8009f22: 2200 movs r2, #0 8009f24: 2180 movs r1, #128 @ 0x80 8009f26: 6878 ldr r0, [r7, #4] 8009f28: f001 fa37 bl 800b39a pdev->ep_in[0x80U & 0xFU].is_used = 1U; 8009f2c: 687b ldr r3, [r7, #4] 8009f2e: 2201 movs r2, #1 8009f30: 619a str r2, [r3, #24] pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; 8009f32: 687b ldr r3, [r7, #4] 8009f34: 2240 movs r2, #64 @ 0x40 8009f36: 625a str r2, [r3, #36] @ 0x24 /* Upon Reset call user call back */ pdev->dev_state = USBD_STATE_DEFAULT; 8009f38: 687b ldr r3, [r7, #4] 8009f3a: 2201 movs r2, #1 8009f3c: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->ep0_state = USBD_EP0_IDLE; 8009f40: 687b ldr r3, [r7, #4] 8009f42: 2200 movs r2, #0 8009f44: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->dev_config = 0U; 8009f48: 687b ldr r3, [r7, #4] 8009f4a: 2200 movs r2, #0 8009f4c: 605a str r2, [r3, #4] pdev->dev_remote_wakeup = 0U; 8009f4e: 687b ldr r3, [r7, #4] 8009f50: 2200 movs r2, #0 8009f52: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 if (pdev->pClassData) 8009f56: 687b ldr r3, [r7, #4] 8009f58: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8009f5c: 2b00 cmp r3, #0 8009f5e: d009 beq.n 8009f74 { pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config); 8009f60: 687b ldr r3, [r7, #4] 8009f62: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8009f66: 685b ldr r3, [r3, #4] 8009f68: 687a ldr r2, [r7, #4] 8009f6a: 6852 ldr r2, [r2, #4] 8009f6c: b2d2 uxtb r2, r2 8009f6e: 4611 mov r1, r2 8009f70: 6878 ldr r0, [r7, #4] 8009f72: 4798 blx r3 } return USBD_OK; 8009f74: 2300 movs r3, #0 } 8009f76: 4618 mov r0, r3 8009f78: 3708 adds r7, #8 8009f7a: 46bd mov sp, r7 8009f7c: bd80 pop {r7, pc} 08009f7e : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) { 8009f7e: b480 push {r7} 8009f80: b083 sub sp, #12 8009f82: af00 add r7, sp, #0 8009f84: 6078 str r0, [r7, #4] 8009f86: 460b mov r3, r1 8009f88: 70fb strb r3, [r7, #3] pdev->dev_speed = speed; 8009f8a: 687b ldr r3, [r7, #4] 8009f8c: 78fa ldrb r2, [r7, #3] 8009f8e: 741a strb r2, [r3, #16] return USBD_OK; 8009f90: 2300 movs r3, #0 } 8009f92: 4618 mov r0, r3 8009f94: 370c adds r7, #12 8009f96: 46bd mov sp, r7 8009f98: bc80 pop {r7} 8009f9a: 4770 bx lr 08009f9c : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) { 8009f9c: b480 push {r7} 8009f9e: b083 sub sp, #12 8009fa0: af00 add r7, sp, #0 8009fa2: 6078 str r0, [r7, #4] pdev->dev_old_state = pdev->dev_state; 8009fa4: 687b ldr r3, [r7, #4] 8009fa6: f893 229c ldrb.w r2, [r3, #668] @ 0x29c 8009faa: 687b ldr r3, [r7, #4] 8009fac: f883 229d strb.w r2, [r3, #669] @ 0x29d pdev->dev_state = USBD_STATE_SUSPENDED; 8009fb0: 687b ldr r3, [r7, #4] 8009fb2: 2204 movs r2, #4 8009fb4: f883 229c strb.w r2, [r3, #668] @ 0x29c return USBD_OK; 8009fb8: 2300 movs r3, #0 } 8009fba: 4618 mov r0, r3 8009fbc: 370c adds r7, #12 8009fbe: 46bd mov sp, r7 8009fc0: bc80 pop {r7} 8009fc2: 4770 bx lr 08009fc4 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) { 8009fc4: b480 push {r7} 8009fc6: b083 sub sp, #12 8009fc8: af00 add r7, sp, #0 8009fca: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_SUSPENDED) 8009fcc: 687b ldr r3, [r7, #4] 8009fce: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009fd2: 2b04 cmp r3, #4 8009fd4: d105 bne.n 8009fe2 { pdev->dev_state = pdev->dev_old_state; 8009fd6: 687b ldr r3, [r7, #4] 8009fd8: f893 229d ldrb.w r2, [r3, #669] @ 0x29d 8009fdc: 687b ldr r3, [r7, #4] 8009fde: f883 229c strb.w r2, [r3, #668] @ 0x29c } return USBD_OK; 8009fe2: 2300 movs r3, #0 } 8009fe4: 4618 mov r0, r3 8009fe6: 370c adds r7, #12 8009fe8: 46bd mov sp, r7 8009fea: bc80 pop {r7} 8009fec: 4770 bx lr 08009fee : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) { 8009fee: b580 push {r7, lr} 8009ff0: b082 sub sp, #8 8009ff2: af00 add r7, sp, #0 8009ff4: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_CONFIGURED) 8009ff6: 687b ldr r3, [r7, #4] 8009ff8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8009ffc: 2b03 cmp r3, #3 8009ffe: d10b bne.n 800a018 { if (pdev->pClass->SOF != NULL) 800a000: 687b ldr r3, [r7, #4] 800a002: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a006: 69db ldr r3, [r3, #28] 800a008: 2b00 cmp r3, #0 800a00a: d005 beq.n 800a018 { pdev->pClass->SOF(pdev); 800a00c: 687b ldr r3, [r7, #4] 800a00e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a012: 69db ldr r3, [r3, #28] 800a014: 6878 ldr r0, [r7, #4] 800a016: 4798 blx r3 } } return USBD_OK; 800a018: 2300 movs r3, #0 } 800a01a: 4618 mov r0, r3 800a01c: 3708 adds r7, #8 800a01e: 46bd mov sp, r7 800a020: bd80 pop {r7, pc} ... 0800a024 : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a024: b580 push {r7, lr} 800a026: b084 sub sp, #16 800a028: af00 add r7, sp, #0 800a02a: 6078 str r0, [r7, #4] 800a02c: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800a02e: 2300 movs r3, #0 800a030: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800a032: 683b ldr r3, [r7, #0] 800a034: 781b ldrb r3, [r3, #0] 800a036: f003 0360 and.w r3, r3, #96 @ 0x60 800a03a: 2b40 cmp r3, #64 @ 0x40 800a03c: d005 beq.n 800a04a 800a03e: 2b40 cmp r3, #64 @ 0x40 800a040: d84f bhi.n 800a0e2 800a042: 2b00 cmp r3, #0 800a044: d009 beq.n 800a05a 800a046: 2b20 cmp r3, #32 800a048: d14b bne.n 800a0e2 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 800a04a: 687b ldr r3, [r7, #4] 800a04c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a050: 689b ldr r3, [r3, #8] 800a052: 6839 ldr r1, [r7, #0] 800a054: 6878 ldr r0, [r7, #4] 800a056: 4798 blx r3 break; 800a058: e048 b.n 800a0ec case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800a05a: 683b ldr r3, [r7, #0] 800a05c: 785b ldrb r3, [r3, #1] 800a05e: 2b09 cmp r3, #9 800a060: d839 bhi.n 800a0d6 800a062: a201 add r2, pc, #4 @ (adr r2, 800a068 ) 800a064: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a068: 0800a0b9 .word 0x0800a0b9 800a06c: 0800a0cd .word 0x0800a0cd 800a070: 0800a0d7 .word 0x0800a0d7 800a074: 0800a0c3 .word 0x0800a0c3 800a078: 0800a0d7 .word 0x0800a0d7 800a07c: 0800a09b .word 0x0800a09b 800a080: 0800a091 .word 0x0800a091 800a084: 0800a0d7 .word 0x0800a0d7 800a088: 0800a0af .word 0x0800a0af 800a08c: 0800a0a5 .word 0x0800a0a5 { case USB_REQ_GET_DESCRIPTOR: USBD_GetDescriptor(pdev, req); 800a090: 6839 ldr r1, [r7, #0] 800a092: 6878 ldr r0, [r7, #4] 800a094: f000 f9dc bl 800a450 break; 800a098: e022 b.n 800a0e0 case USB_REQ_SET_ADDRESS: USBD_SetAddress(pdev, req); 800a09a: 6839 ldr r1, [r7, #0] 800a09c: 6878 ldr r0, [r7, #4] 800a09e: f000 fb3f bl 800a720 break; 800a0a2: e01d b.n 800a0e0 case USB_REQ_SET_CONFIGURATION: USBD_SetConfig(pdev, req); 800a0a4: 6839 ldr r1, [r7, #0] 800a0a6: 6878 ldr r0, [r7, #4] 800a0a8: f000 fb7e bl 800a7a8 break; 800a0ac: e018 b.n 800a0e0 case USB_REQ_GET_CONFIGURATION: USBD_GetConfig(pdev, req); 800a0ae: 6839 ldr r1, [r7, #0] 800a0b0: 6878 ldr r0, [r7, #4] 800a0b2: f000 fc07 bl 800a8c4 break; 800a0b6: e013 b.n 800a0e0 case USB_REQ_GET_STATUS: USBD_GetStatus(pdev, req); 800a0b8: 6839 ldr r1, [r7, #0] 800a0ba: 6878 ldr r0, [r7, #4] 800a0bc: f000 fc37 bl 800a92e break; 800a0c0: e00e b.n 800a0e0 case USB_REQ_SET_FEATURE: USBD_SetFeature(pdev, req); 800a0c2: 6839 ldr r1, [r7, #0] 800a0c4: 6878 ldr r0, [r7, #4] 800a0c6: f000 fc65 bl 800a994 break; 800a0ca: e009 b.n 800a0e0 case USB_REQ_CLEAR_FEATURE: USBD_ClrFeature(pdev, req); 800a0cc: 6839 ldr r1, [r7, #0] 800a0ce: 6878 ldr r0, [r7, #4] 800a0d0: f000 fc74 bl 800a9bc break; 800a0d4: e004 b.n 800a0e0 default: USBD_CtlError(pdev, req); 800a0d6: 6839 ldr r1, [r7, #0] 800a0d8: 6878 ldr r0, [r7, #4] 800a0da: f000 fcc9 bl 800aa70 break; 800a0de: bf00 nop } break; 800a0e0: e004 b.n 800a0ec default: USBD_CtlError(pdev, req); 800a0e2: 6839 ldr r1, [r7, #0] 800a0e4: 6878 ldr r0, [r7, #4] 800a0e6: f000 fcc3 bl 800aa70 break; 800a0ea: bf00 nop } return ret; 800a0ec: 7bfb ldrb r3, [r7, #15] } 800a0ee: 4618 mov r0, r3 800a0f0: 3710 adds r7, #16 800a0f2: 46bd mov sp, r7 800a0f4: bd80 pop {r7, pc} 800a0f6: bf00 nop 0800a0f8 : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a0f8: b580 push {r7, lr} 800a0fa: b084 sub sp, #16 800a0fc: af00 add r7, sp, #0 800a0fe: 6078 str r0, [r7, #4] 800a100: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800a102: 2300 movs r3, #0 800a104: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800a106: 683b ldr r3, [r7, #0] 800a108: 781b ldrb r3, [r3, #0] 800a10a: f003 0360 and.w r3, r3, #96 @ 0x60 800a10e: 2b40 cmp r3, #64 @ 0x40 800a110: d005 beq.n 800a11e 800a112: 2b40 cmp r3, #64 @ 0x40 800a114: d82e bhi.n 800a174 800a116: 2b00 cmp r3, #0 800a118: d001 beq.n 800a11e 800a11a: 2b20 cmp r3, #32 800a11c: d12a bne.n 800a174 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: case USB_REQ_TYPE_STANDARD: switch (pdev->dev_state) 800a11e: 687b ldr r3, [r7, #4] 800a120: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a124: 3b01 subs r3, #1 800a126: 2b02 cmp r3, #2 800a128: d81d bhi.n 800a166 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) 800a12a: 683b ldr r3, [r7, #0] 800a12c: 889b ldrh r3, [r3, #4] 800a12e: b2db uxtb r3, r3 800a130: 2b01 cmp r3, #1 800a132: d813 bhi.n 800a15c { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 800a134: 687b ldr r3, [r7, #4] 800a136: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a13a: 689b ldr r3, [r3, #8] 800a13c: 6839 ldr r1, [r7, #0] 800a13e: 6878 ldr r0, [r7, #4] 800a140: 4798 blx r3 800a142: 4603 mov r3, r0 800a144: 73fb strb r3, [r7, #15] if ((req->wLength == 0U) && (ret == USBD_OK)) 800a146: 683b ldr r3, [r7, #0] 800a148: 88db ldrh r3, [r3, #6] 800a14a: 2b00 cmp r3, #0 800a14c: d110 bne.n 800a170 800a14e: 7bfb ldrb r3, [r7, #15] 800a150: 2b00 cmp r3, #0 800a152: d10d bne.n 800a170 { USBD_CtlSendStatus(pdev); 800a154: 6878 ldr r0, [r7, #4] 800a156: f000 fd53 bl 800ac00 } else { USBD_CtlError(pdev, req); } break; 800a15a: e009 b.n 800a170 USBD_CtlError(pdev, req); 800a15c: 6839 ldr r1, [r7, #0] 800a15e: 6878 ldr r0, [r7, #4] 800a160: f000 fc86 bl 800aa70 break; 800a164: e004 b.n 800a170 default: USBD_CtlError(pdev, req); 800a166: 6839 ldr r1, [r7, #0] 800a168: 6878 ldr r0, [r7, #4] 800a16a: f000 fc81 bl 800aa70 break; 800a16e: e000 b.n 800a172 break; 800a170: bf00 nop } break; 800a172: e004 b.n 800a17e default: USBD_CtlError(pdev, req); 800a174: 6839 ldr r1, [r7, #0] 800a176: 6878 ldr r0, [r7, #4] 800a178: f000 fc7a bl 800aa70 break; 800a17c: bf00 nop } return USBD_OK; 800a17e: 2300 movs r3, #0 } 800a180: 4618 mov r0, r3 800a182: 3710 adds r7, #16 800a184: 46bd mov sp, r7 800a186: bd80 pop {r7, pc} 0800a188 : * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a188: b580 push {r7, lr} 800a18a: b084 sub sp, #16 800a18c: af00 add r7, sp, #0 800a18e: 6078 str r0, [r7, #4] 800a190: 6039 str r1, [r7, #0] USBD_EndpointTypeDef *pep; uint8_t ep_addr; USBD_StatusTypeDef ret = USBD_OK; 800a192: 2300 movs r3, #0 800a194: 73fb strb r3, [r7, #15] ep_addr = LOBYTE(req->wIndex); 800a196: 683b ldr r3, [r7, #0] 800a198: 889b ldrh r3, [r3, #4] 800a19a: 73bb strb r3, [r7, #14] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800a19c: 683b ldr r3, [r7, #0] 800a19e: 781b ldrb r3, [r3, #0] 800a1a0: f003 0360 and.w r3, r3, #96 @ 0x60 800a1a4: 2b40 cmp r3, #64 @ 0x40 800a1a6: d007 beq.n 800a1b8 800a1a8: 2b40 cmp r3, #64 @ 0x40 800a1aa: f200 8146 bhi.w 800a43a 800a1ae: 2b00 cmp r3, #0 800a1b0: d00a beq.n 800a1c8 800a1b2: 2b20 cmp r3, #32 800a1b4: f040 8141 bne.w 800a43a { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: pdev->pClass->Setup(pdev, req); 800a1b8: 687b ldr r3, [r7, #4] 800a1ba: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a1be: 689b ldr r3, [r3, #8] 800a1c0: 6839 ldr r1, [r7, #0] 800a1c2: 6878 ldr r0, [r7, #4] 800a1c4: 4798 blx r3 break; 800a1c6: e13d b.n 800a444 case USB_REQ_TYPE_STANDARD: /* Check if it is a class request */ if ((req->bmRequest & 0x60U) == 0x20U) 800a1c8: 683b ldr r3, [r7, #0] 800a1ca: 781b ldrb r3, [r3, #0] 800a1cc: f003 0360 and.w r3, r3, #96 @ 0x60 800a1d0: 2b20 cmp r3, #32 800a1d2: d10a bne.n 800a1ea { ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req); 800a1d4: 687b ldr r3, [r7, #4] 800a1d6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a1da: 689b ldr r3, [r3, #8] 800a1dc: 6839 ldr r1, [r7, #0] 800a1de: 6878 ldr r0, [r7, #4] 800a1e0: 4798 blx r3 800a1e2: 4603 mov r3, r0 800a1e4: 73fb strb r3, [r7, #15] return ret; 800a1e6: 7bfb ldrb r3, [r7, #15] 800a1e8: e12d b.n 800a446 } switch (req->bRequest) 800a1ea: 683b ldr r3, [r7, #0] 800a1ec: 785b ldrb r3, [r3, #1] 800a1ee: 2b03 cmp r3, #3 800a1f0: d007 beq.n 800a202 800a1f2: 2b03 cmp r3, #3 800a1f4: f300 811b bgt.w 800a42e 800a1f8: 2b00 cmp r3, #0 800a1fa: d072 beq.n 800a2e2 800a1fc: 2b01 cmp r3, #1 800a1fe: d03a beq.n 800a276 800a200: e115 b.n 800a42e { case USB_REQ_SET_FEATURE: switch (pdev->dev_state) 800a202: 687b ldr r3, [r7, #4] 800a204: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a208: 2b02 cmp r3, #2 800a20a: d002 beq.n 800a212 800a20c: 2b03 cmp r3, #3 800a20e: d015 beq.n 800a23c 800a210: e02b b.n 800a26a { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800a212: 7bbb ldrb r3, [r7, #14] 800a214: 2b00 cmp r3, #0 800a216: d00c beq.n 800a232 800a218: 7bbb ldrb r3, [r7, #14] 800a21a: 2b80 cmp r3, #128 @ 0x80 800a21c: d009 beq.n 800a232 { USBD_LL_StallEP(pdev, ep_addr); 800a21e: 7bbb ldrb r3, [r7, #14] 800a220: 4619 mov r1, r3 800a222: 6878 ldr r0, [r7, #4] 800a224: f001 f8fe bl 800b424 USBD_LL_StallEP(pdev, 0x80U); 800a228: 2180 movs r1, #128 @ 0x80 800a22a: 6878 ldr r0, [r7, #4] 800a22c: f001 f8fa bl 800b424 } else { USBD_CtlError(pdev, req); } break; 800a230: e020 b.n 800a274 USBD_CtlError(pdev, req); 800a232: 6839 ldr r1, [r7, #0] 800a234: 6878 ldr r0, [r7, #4] 800a236: f000 fc1b bl 800aa70 break; 800a23a: e01b b.n 800a274 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 800a23c: 683b ldr r3, [r7, #0] 800a23e: 885b ldrh r3, [r3, #2] 800a240: 2b00 cmp r3, #0 800a242: d10e bne.n 800a262 { if ((ep_addr != 0x00U) && 800a244: 7bbb ldrb r3, [r7, #14] 800a246: 2b00 cmp r3, #0 800a248: d00b beq.n 800a262 800a24a: 7bbb ldrb r3, [r7, #14] 800a24c: 2b80 cmp r3, #128 @ 0x80 800a24e: d008 beq.n 800a262 (ep_addr != 0x80U) && (req->wLength == 0x00U)) 800a250: 683b ldr r3, [r7, #0] 800a252: 88db ldrh r3, [r3, #6] 800a254: 2b00 cmp r3, #0 800a256: d104 bne.n 800a262 { USBD_LL_StallEP(pdev, ep_addr); 800a258: 7bbb ldrb r3, [r7, #14] 800a25a: 4619 mov r1, r3 800a25c: 6878 ldr r0, [r7, #4] 800a25e: f001 f8e1 bl 800b424 } } USBD_CtlSendStatus(pdev); 800a262: 6878 ldr r0, [r7, #4] 800a264: f000 fccc bl 800ac00 break; 800a268: e004 b.n 800a274 default: USBD_CtlError(pdev, req); 800a26a: 6839 ldr r1, [r7, #0] 800a26c: 6878 ldr r0, [r7, #4] 800a26e: f000 fbff bl 800aa70 break; 800a272: bf00 nop } break; 800a274: e0e0 b.n 800a438 case USB_REQ_CLEAR_FEATURE: switch (pdev->dev_state) 800a276: 687b ldr r3, [r7, #4] 800a278: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a27c: 2b02 cmp r3, #2 800a27e: d002 beq.n 800a286 800a280: 2b03 cmp r3, #3 800a282: d015 beq.n 800a2b0 800a284: e026 b.n 800a2d4 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800a286: 7bbb ldrb r3, [r7, #14] 800a288: 2b00 cmp r3, #0 800a28a: d00c beq.n 800a2a6 800a28c: 7bbb ldrb r3, [r7, #14] 800a28e: 2b80 cmp r3, #128 @ 0x80 800a290: d009 beq.n 800a2a6 { USBD_LL_StallEP(pdev, ep_addr); 800a292: 7bbb ldrb r3, [r7, #14] 800a294: 4619 mov r1, r3 800a296: 6878 ldr r0, [r7, #4] 800a298: f001 f8c4 bl 800b424 USBD_LL_StallEP(pdev, 0x80U); 800a29c: 2180 movs r1, #128 @ 0x80 800a29e: 6878 ldr r0, [r7, #4] 800a2a0: f001 f8c0 bl 800b424 } else { USBD_CtlError(pdev, req); } break; 800a2a4: e01c b.n 800a2e0 USBD_CtlError(pdev, req); 800a2a6: 6839 ldr r1, [r7, #0] 800a2a8: 6878 ldr r0, [r7, #4] 800a2aa: f000 fbe1 bl 800aa70 break; 800a2ae: e017 b.n 800a2e0 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 800a2b0: 683b ldr r3, [r7, #0] 800a2b2: 885b ldrh r3, [r3, #2] 800a2b4: 2b00 cmp r3, #0 800a2b6: d112 bne.n 800a2de { if ((ep_addr & 0x7FU) != 0x00U) 800a2b8: 7bbb ldrb r3, [r7, #14] 800a2ba: f003 037f and.w r3, r3, #127 @ 0x7f 800a2be: 2b00 cmp r3, #0 800a2c0: d004 beq.n 800a2cc { USBD_LL_ClearStallEP(pdev, ep_addr); 800a2c2: 7bbb ldrb r3, [r7, #14] 800a2c4: 4619 mov r1, r3 800a2c6: 6878 ldr r0, [r7, #4] 800a2c8: f001 f8cb bl 800b462 } USBD_CtlSendStatus(pdev); 800a2cc: 6878 ldr r0, [r7, #4] 800a2ce: f000 fc97 bl 800ac00 } break; 800a2d2: e004 b.n 800a2de default: USBD_CtlError(pdev, req); 800a2d4: 6839 ldr r1, [r7, #0] 800a2d6: 6878 ldr r0, [r7, #4] 800a2d8: f000 fbca bl 800aa70 break; 800a2dc: e000 b.n 800a2e0 break; 800a2de: bf00 nop } break; 800a2e0: e0aa b.n 800a438 case USB_REQ_GET_STATUS: switch (pdev->dev_state) 800a2e2: 687b ldr r3, [r7, #4] 800a2e4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a2e8: 2b02 cmp r3, #2 800a2ea: d002 beq.n 800a2f2 800a2ec: 2b03 cmp r3, #3 800a2ee: d032 beq.n 800a356 800a2f0: e097 b.n 800a422 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800a2f2: 7bbb ldrb r3, [r7, #14] 800a2f4: 2b00 cmp r3, #0 800a2f6: d007 beq.n 800a308 800a2f8: 7bbb ldrb r3, [r7, #14] 800a2fa: 2b80 cmp r3, #128 @ 0x80 800a2fc: d004 beq.n 800a308 { USBD_CtlError(pdev, req); 800a2fe: 6839 ldr r1, [r7, #0] 800a300: 6878 ldr r0, [r7, #4] 800a302: f000 fbb5 bl 800aa70 break; 800a306: e091 b.n 800a42c } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800a308: f997 300e ldrsb.w r3, [r7, #14] 800a30c: 2b00 cmp r3, #0 800a30e: da0b bge.n 800a328 800a310: 7bbb ldrb r3, [r7, #14] 800a312: f003 027f and.w r2, r3, #127 @ 0x7f 800a316: 4613 mov r3, r2 800a318: 009b lsls r3, r3, #2 800a31a: 4413 add r3, r2 800a31c: 009b lsls r3, r3, #2 800a31e: 3310 adds r3, #16 800a320: 687a ldr r2, [r7, #4] 800a322: 4413 add r3, r2 800a324: 3304 adds r3, #4 800a326: e00b b.n 800a340 &pdev->ep_out[ep_addr & 0x7FU]; 800a328: 7bbb ldrb r3, [r7, #14] 800a32a: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800a32e: 4613 mov r3, r2 800a330: 009b lsls r3, r3, #2 800a332: 4413 add r3, r2 800a334: 009b lsls r3, r3, #2 800a336: f503 73a8 add.w r3, r3, #336 @ 0x150 800a33a: 687a ldr r2, [r7, #4] 800a33c: 4413 add r3, r2 800a33e: 3304 adds r3, #4 800a340: 60bb str r3, [r7, #8] pep->status = 0x0000U; 800a342: 68bb ldr r3, [r7, #8] 800a344: 2200 movs r2, #0 800a346: 601a str r2, [r3, #0] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 800a348: 68bb ldr r3, [r7, #8] 800a34a: 2202 movs r2, #2 800a34c: 4619 mov r1, r3 800a34e: 6878 ldr r0, [r7, #4] 800a350: f000 fbf8 bl 800ab44 break; 800a354: e06a b.n 800a42c case USBD_STATE_CONFIGURED: if ((ep_addr & 0x80U) == 0x80U) 800a356: f997 300e ldrsb.w r3, [r7, #14] 800a35a: 2b00 cmp r3, #0 800a35c: da11 bge.n 800a382 { if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U) 800a35e: 7bbb ldrb r3, [r7, #14] 800a360: f003 020f and.w r2, r3, #15 800a364: 6879 ldr r1, [r7, #4] 800a366: 4613 mov r3, r2 800a368: 009b lsls r3, r3, #2 800a36a: 4413 add r3, r2 800a36c: 009b lsls r3, r3, #2 800a36e: 440b add r3, r1 800a370: 3318 adds r3, #24 800a372: 681b ldr r3, [r3, #0] 800a374: 2b00 cmp r3, #0 800a376: d117 bne.n 800a3a8 { USBD_CtlError(pdev, req); 800a378: 6839 ldr r1, [r7, #0] 800a37a: 6878 ldr r0, [r7, #4] 800a37c: f000 fb78 bl 800aa70 break; 800a380: e054 b.n 800a42c } } else { if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U) 800a382: 7bbb ldrb r3, [r7, #14] 800a384: f003 020f and.w r2, r3, #15 800a388: 6879 ldr r1, [r7, #4] 800a38a: 4613 mov r3, r2 800a38c: 009b lsls r3, r3, #2 800a38e: 4413 add r3, r2 800a390: 009b lsls r3, r3, #2 800a392: 440b add r3, r1 800a394: f503 73ac add.w r3, r3, #344 @ 0x158 800a398: 681b ldr r3, [r3, #0] 800a39a: 2b00 cmp r3, #0 800a39c: d104 bne.n 800a3a8 { USBD_CtlError(pdev, req); 800a39e: 6839 ldr r1, [r7, #0] 800a3a0: 6878 ldr r0, [r7, #4] 800a3a2: f000 fb65 bl 800aa70 break; 800a3a6: e041 b.n 800a42c } } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800a3a8: f997 300e ldrsb.w r3, [r7, #14] 800a3ac: 2b00 cmp r3, #0 800a3ae: da0b bge.n 800a3c8 800a3b0: 7bbb ldrb r3, [r7, #14] 800a3b2: f003 027f and.w r2, r3, #127 @ 0x7f 800a3b6: 4613 mov r3, r2 800a3b8: 009b lsls r3, r3, #2 800a3ba: 4413 add r3, r2 800a3bc: 009b lsls r3, r3, #2 800a3be: 3310 adds r3, #16 800a3c0: 687a ldr r2, [r7, #4] 800a3c2: 4413 add r3, r2 800a3c4: 3304 adds r3, #4 800a3c6: e00b b.n 800a3e0 &pdev->ep_out[ep_addr & 0x7FU]; 800a3c8: 7bbb ldrb r3, [r7, #14] 800a3ca: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800a3ce: 4613 mov r3, r2 800a3d0: 009b lsls r3, r3, #2 800a3d2: 4413 add r3, r2 800a3d4: 009b lsls r3, r3, #2 800a3d6: f503 73a8 add.w r3, r3, #336 @ 0x150 800a3da: 687a ldr r2, [r7, #4] 800a3dc: 4413 add r3, r2 800a3de: 3304 adds r3, #4 800a3e0: 60bb str r3, [r7, #8] if ((ep_addr == 0x00U) || (ep_addr == 0x80U)) 800a3e2: 7bbb ldrb r3, [r7, #14] 800a3e4: 2b00 cmp r3, #0 800a3e6: d002 beq.n 800a3ee 800a3e8: 7bbb ldrb r3, [r7, #14] 800a3ea: 2b80 cmp r3, #128 @ 0x80 800a3ec: d103 bne.n 800a3f6 { pep->status = 0x0000U; 800a3ee: 68bb ldr r3, [r7, #8] 800a3f0: 2200 movs r2, #0 800a3f2: 601a str r2, [r3, #0] 800a3f4: e00e b.n 800a414 } else if (USBD_LL_IsStallEP(pdev, ep_addr)) 800a3f6: 7bbb ldrb r3, [r7, #14] 800a3f8: 4619 mov r1, r3 800a3fa: 6878 ldr r0, [r7, #4] 800a3fc: f001 f850 bl 800b4a0 800a400: 4603 mov r3, r0 800a402: 2b00 cmp r3, #0 800a404: d003 beq.n 800a40e { pep->status = 0x0001U; 800a406: 68bb ldr r3, [r7, #8] 800a408: 2201 movs r2, #1 800a40a: 601a str r2, [r3, #0] 800a40c: e002 b.n 800a414 } else { pep->status = 0x0000U; 800a40e: 68bb ldr r3, [r7, #8] 800a410: 2200 movs r2, #0 800a412: 601a str r2, [r3, #0] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U); 800a414: 68bb ldr r3, [r7, #8] 800a416: 2202 movs r2, #2 800a418: 4619 mov r1, r3 800a41a: 6878 ldr r0, [r7, #4] 800a41c: f000 fb92 bl 800ab44 break; 800a420: e004 b.n 800a42c default: USBD_CtlError(pdev, req); 800a422: 6839 ldr r1, [r7, #0] 800a424: 6878 ldr r0, [r7, #4] 800a426: f000 fb23 bl 800aa70 break; 800a42a: bf00 nop } break; 800a42c: e004 b.n 800a438 default: USBD_CtlError(pdev, req); 800a42e: 6839 ldr r1, [r7, #0] 800a430: 6878 ldr r0, [r7, #4] 800a432: f000 fb1d bl 800aa70 break; 800a436: bf00 nop } break; 800a438: e004 b.n 800a444 default: USBD_CtlError(pdev, req); 800a43a: 6839 ldr r1, [r7, #0] 800a43c: 6878 ldr r0, [r7, #4] 800a43e: f000 fb17 bl 800aa70 break; 800a442: bf00 nop } return ret; 800a444: 7bfb ldrb r3, [r7, #15] } 800a446: 4618 mov r0, r3 800a448: 3710 adds r7, #16 800a44a: 46bd mov sp, r7 800a44c: bd80 pop {r7, pc} ... 0800a450 : * @param req: usb request * @retval status */ static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a450: b580 push {r7, lr} 800a452: b084 sub sp, #16 800a454: af00 add r7, sp, #0 800a456: 6078 str r0, [r7, #4] 800a458: 6039 str r1, [r7, #0] uint16_t len = 0U; 800a45a: 2300 movs r3, #0 800a45c: 813b strh r3, [r7, #8] uint8_t *pbuf = NULL; 800a45e: 2300 movs r3, #0 800a460: 60fb str r3, [r7, #12] uint8_t err = 0U; 800a462: 2300 movs r3, #0 800a464: 72fb strb r3, [r7, #11] switch (req->wValue >> 8) 800a466: 683b ldr r3, [r7, #0] 800a468: 885b ldrh r3, [r3, #2] 800a46a: 0a1b lsrs r3, r3, #8 800a46c: b29b uxth r3, r3 800a46e: 3b01 subs r3, #1 800a470: 2b06 cmp r3, #6 800a472: f200 8128 bhi.w 800a6c6 800a476: a201 add r2, pc, #4 @ (adr r2, 800a47c ) 800a478: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a47c: 0800a499 .word 0x0800a499 800a480: 0800a4b1 .word 0x0800a4b1 800a484: 0800a4f1 .word 0x0800a4f1 800a488: 0800a6c7 .word 0x0800a6c7 800a48c: 0800a6c7 .word 0x0800a6c7 800a490: 0800a667 .word 0x0800a667 800a494: 0800a693 .word 0x0800a693 err++; } break; #endif case USB_DESC_TYPE_DEVICE: pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); 800a498: 687b ldr r3, [r7, #4] 800a49a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a49e: 681b ldr r3, [r3, #0] 800a4a0: 687a ldr r2, [r7, #4] 800a4a2: 7c12 ldrb r2, [r2, #16] 800a4a4: f107 0108 add.w r1, r7, #8 800a4a8: 4610 mov r0, r2 800a4aa: 4798 blx r3 800a4ac: 60f8 str r0, [r7, #12] break; 800a4ae: e112 b.n 800a6d6 case USB_DESC_TYPE_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800a4b0: 687b ldr r3, [r7, #4] 800a4b2: 7c1b ldrb r3, [r3, #16] 800a4b4: 2b00 cmp r3, #0 800a4b6: d10d bne.n 800a4d4 { pbuf = pdev->pClass->GetHSConfigDescriptor(&len); 800a4b8: 687b ldr r3, [r7, #4] 800a4ba: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a4be: 6a9b ldr r3, [r3, #40] @ 0x28 800a4c0: f107 0208 add.w r2, r7, #8 800a4c4: 4610 mov r0, r2 800a4c6: 4798 blx r3 800a4c8: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800a4ca: 68fb ldr r3, [r7, #12] 800a4cc: 3301 adds r3, #1 800a4ce: 2202 movs r2, #2 800a4d0: 701a strb r2, [r3, #0] else { pbuf = pdev->pClass->GetFSConfigDescriptor(&len); pbuf[1] = USB_DESC_TYPE_CONFIGURATION; } break; 800a4d2: e100 b.n 800a6d6 pbuf = pdev->pClass->GetFSConfigDescriptor(&len); 800a4d4: 687b ldr r3, [r7, #4] 800a4d6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a4da: 6adb ldr r3, [r3, #44] @ 0x2c 800a4dc: f107 0208 add.w r2, r7, #8 800a4e0: 4610 mov r0, r2 800a4e2: 4798 blx r3 800a4e4: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 800a4e6: 68fb ldr r3, [r7, #12] 800a4e8: 3301 adds r3, #1 800a4ea: 2202 movs r2, #2 800a4ec: 701a strb r2, [r3, #0] break; 800a4ee: e0f2 b.n 800a6d6 case USB_DESC_TYPE_STRING: switch ((uint8_t)(req->wValue)) 800a4f0: 683b ldr r3, [r7, #0] 800a4f2: 885b ldrh r3, [r3, #2] 800a4f4: b2db uxtb r3, r3 800a4f6: 2b05 cmp r3, #5 800a4f8: f200 80ac bhi.w 800a654 800a4fc: a201 add r2, pc, #4 @ (adr r2, 800a504 ) 800a4fe: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a502: bf00 nop 800a504: 0800a51d .word 0x0800a51d 800a508: 0800a551 .word 0x0800a551 800a50c: 0800a585 .word 0x0800a585 800a510: 0800a5b9 .word 0x0800a5b9 800a514: 0800a5ed .word 0x0800a5ed 800a518: 0800a621 .word 0x0800a621 { case USBD_IDX_LANGID_STR: if (pdev->pDesc->GetLangIDStrDescriptor != NULL) 800a51c: 687b ldr r3, [r7, #4] 800a51e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a522: 685b ldr r3, [r3, #4] 800a524: 2b00 cmp r3, #0 800a526: d00b beq.n 800a540 { pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); 800a528: 687b ldr r3, [r7, #4] 800a52a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a52e: 685b ldr r3, [r3, #4] 800a530: 687a ldr r2, [r7, #4] 800a532: 7c12 ldrb r2, [r2, #16] 800a534: f107 0108 add.w r1, r7, #8 800a538: 4610 mov r0, r2 800a53a: 4798 blx r3 800a53c: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a53e: e091 b.n 800a664 USBD_CtlError(pdev, req); 800a540: 6839 ldr r1, [r7, #0] 800a542: 6878 ldr r0, [r7, #4] 800a544: f000 fa94 bl 800aa70 err++; 800a548: 7afb ldrb r3, [r7, #11] 800a54a: 3301 adds r3, #1 800a54c: 72fb strb r3, [r7, #11] break; 800a54e: e089 b.n 800a664 case USBD_IDX_MFC_STR: if (pdev->pDesc->GetManufacturerStrDescriptor != NULL) 800a550: 687b ldr r3, [r7, #4] 800a552: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a556: 689b ldr r3, [r3, #8] 800a558: 2b00 cmp r3, #0 800a55a: d00b beq.n 800a574 { pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); 800a55c: 687b ldr r3, [r7, #4] 800a55e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a562: 689b ldr r3, [r3, #8] 800a564: 687a ldr r2, [r7, #4] 800a566: 7c12 ldrb r2, [r2, #16] 800a568: f107 0108 add.w r1, r7, #8 800a56c: 4610 mov r0, r2 800a56e: 4798 blx r3 800a570: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a572: e077 b.n 800a664 USBD_CtlError(pdev, req); 800a574: 6839 ldr r1, [r7, #0] 800a576: 6878 ldr r0, [r7, #4] 800a578: f000 fa7a bl 800aa70 err++; 800a57c: 7afb ldrb r3, [r7, #11] 800a57e: 3301 adds r3, #1 800a580: 72fb strb r3, [r7, #11] break; 800a582: e06f b.n 800a664 case USBD_IDX_PRODUCT_STR: if (pdev->pDesc->GetProductStrDescriptor != NULL) 800a584: 687b ldr r3, [r7, #4] 800a586: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a58a: 68db ldr r3, [r3, #12] 800a58c: 2b00 cmp r3, #0 800a58e: d00b beq.n 800a5a8 { pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); 800a590: 687b ldr r3, [r7, #4] 800a592: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a596: 68db ldr r3, [r3, #12] 800a598: 687a ldr r2, [r7, #4] 800a59a: 7c12 ldrb r2, [r2, #16] 800a59c: f107 0108 add.w r1, r7, #8 800a5a0: 4610 mov r0, r2 800a5a2: 4798 blx r3 800a5a4: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a5a6: e05d b.n 800a664 USBD_CtlError(pdev, req); 800a5a8: 6839 ldr r1, [r7, #0] 800a5aa: 6878 ldr r0, [r7, #4] 800a5ac: f000 fa60 bl 800aa70 err++; 800a5b0: 7afb ldrb r3, [r7, #11] 800a5b2: 3301 adds r3, #1 800a5b4: 72fb strb r3, [r7, #11] break; 800a5b6: e055 b.n 800a664 case USBD_IDX_SERIAL_STR: if (pdev->pDesc->GetSerialStrDescriptor != NULL) 800a5b8: 687b ldr r3, [r7, #4] 800a5ba: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a5be: 691b ldr r3, [r3, #16] 800a5c0: 2b00 cmp r3, #0 800a5c2: d00b beq.n 800a5dc { pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); 800a5c4: 687b ldr r3, [r7, #4] 800a5c6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a5ca: 691b ldr r3, [r3, #16] 800a5cc: 687a ldr r2, [r7, #4] 800a5ce: 7c12 ldrb r2, [r2, #16] 800a5d0: f107 0108 add.w r1, r7, #8 800a5d4: 4610 mov r0, r2 800a5d6: 4798 blx r3 800a5d8: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a5da: e043 b.n 800a664 USBD_CtlError(pdev, req); 800a5dc: 6839 ldr r1, [r7, #0] 800a5de: 6878 ldr r0, [r7, #4] 800a5e0: f000 fa46 bl 800aa70 err++; 800a5e4: 7afb ldrb r3, [r7, #11] 800a5e6: 3301 adds r3, #1 800a5e8: 72fb strb r3, [r7, #11] break; 800a5ea: e03b b.n 800a664 case USBD_IDX_CONFIG_STR: if (pdev->pDesc->GetConfigurationStrDescriptor != NULL) 800a5ec: 687b ldr r3, [r7, #4] 800a5ee: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a5f2: 695b ldr r3, [r3, #20] 800a5f4: 2b00 cmp r3, #0 800a5f6: d00b beq.n 800a610 { pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); 800a5f8: 687b ldr r3, [r7, #4] 800a5fa: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a5fe: 695b ldr r3, [r3, #20] 800a600: 687a ldr r2, [r7, #4] 800a602: 7c12 ldrb r2, [r2, #16] 800a604: f107 0108 add.w r1, r7, #8 800a608: 4610 mov r0, r2 800a60a: 4798 blx r3 800a60c: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a60e: e029 b.n 800a664 USBD_CtlError(pdev, req); 800a610: 6839 ldr r1, [r7, #0] 800a612: 6878 ldr r0, [r7, #4] 800a614: f000 fa2c bl 800aa70 err++; 800a618: 7afb ldrb r3, [r7, #11] 800a61a: 3301 adds r3, #1 800a61c: 72fb strb r3, [r7, #11] break; 800a61e: e021 b.n 800a664 case USBD_IDX_INTERFACE_STR: if (pdev->pDesc->GetInterfaceStrDescriptor != NULL) 800a620: 687b ldr r3, [r7, #4] 800a622: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a626: 699b ldr r3, [r3, #24] 800a628: 2b00 cmp r3, #0 800a62a: d00b beq.n 800a644 { pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); 800a62c: 687b ldr r3, [r7, #4] 800a62e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0 800a632: 699b ldr r3, [r3, #24] 800a634: 687a ldr r2, [r7, #4] 800a636: 7c12 ldrb r2, [r2, #16] 800a638: f107 0108 add.w r1, r7, #8 800a63c: 4610 mov r0, r2 800a63e: 4798 blx r3 800a640: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a642: e00f b.n 800a664 USBD_CtlError(pdev, req); 800a644: 6839 ldr r1, [r7, #0] 800a646: 6878 ldr r0, [r7, #4] 800a648: f000 fa12 bl 800aa70 err++; 800a64c: 7afb ldrb r3, [r7, #11] 800a64e: 3301 adds r3, #1 800a650: 72fb strb r3, [r7, #11] break; 800a652: e007 b.n 800a664 USBD_CtlError(pdev, req); err++; } break; #else USBD_CtlError(pdev, req); 800a654: 6839 ldr r1, [r7, #0] 800a656: 6878 ldr r0, [r7, #4] 800a658: f000 fa0a bl 800aa70 err++; 800a65c: 7afb ldrb r3, [r7, #11] 800a65e: 3301 adds r3, #1 800a660: 72fb strb r3, [r7, #11] #endif } break; 800a662: e038 b.n 800a6d6 800a664: e037 b.n 800a6d6 case USB_DESC_TYPE_DEVICE_QUALIFIER: if (pdev->dev_speed == USBD_SPEED_HIGH) 800a666: 687b ldr r3, [r7, #4] 800a668: 7c1b ldrb r3, [r3, #16] 800a66a: 2b00 cmp r3, #0 800a66c: d109 bne.n 800a682 { pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len); 800a66e: 687b ldr r3, [r7, #4] 800a670: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a674: 6b5b ldr r3, [r3, #52] @ 0x34 800a676: f107 0208 add.w r2, r7, #8 800a67a: 4610 mov r0, r2 800a67c: 4798 blx r3 800a67e: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800a680: e029 b.n 800a6d6 USBD_CtlError(pdev, req); 800a682: 6839 ldr r1, [r7, #0] 800a684: 6878 ldr r0, [r7, #4] 800a686: f000 f9f3 bl 800aa70 err++; 800a68a: 7afb ldrb r3, [r7, #11] 800a68c: 3301 adds r3, #1 800a68e: 72fb strb r3, [r7, #11] break; 800a690: e021 b.n 800a6d6 case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800a692: 687b ldr r3, [r7, #4] 800a694: 7c1b ldrb r3, [r3, #16] 800a696: 2b00 cmp r3, #0 800a698: d10d bne.n 800a6b6 { pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len); 800a69a: 687b ldr r3, [r7, #4] 800a69c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800a6a0: 6b1b ldr r3, [r3, #48] @ 0x30 800a6a2: f107 0208 add.w r2, r7, #8 800a6a6: 4610 mov r0, r2 800a6a8: 4798 blx r3 800a6aa: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; 800a6ac: 68fb ldr r3, [r7, #12] 800a6ae: 3301 adds r3, #1 800a6b0: 2207 movs r2, #7 800a6b2: 701a strb r2, [r3, #0] else { USBD_CtlError(pdev, req); err++; } break; 800a6b4: e00f b.n 800a6d6 USBD_CtlError(pdev, req); 800a6b6: 6839 ldr r1, [r7, #0] 800a6b8: 6878 ldr r0, [r7, #4] 800a6ba: f000 f9d9 bl 800aa70 err++; 800a6be: 7afb ldrb r3, [r7, #11] 800a6c0: 3301 adds r3, #1 800a6c2: 72fb strb r3, [r7, #11] break; 800a6c4: e007 b.n 800a6d6 default: USBD_CtlError(pdev, req); 800a6c6: 6839 ldr r1, [r7, #0] 800a6c8: 6878 ldr r0, [r7, #4] 800a6ca: f000 f9d1 bl 800aa70 err++; 800a6ce: 7afb ldrb r3, [r7, #11] 800a6d0: 3301 adds r3, #1 800a6d2: 72fb strb r3, [r7, #11] break; 800a6d4: bf00 nop } if (err != 0U) 800a6d6: 7afb ldrb r3, [r7, #11] 800a6d8: 2b00 cmp r3, #0 800a6da: d11c bne.n 800a716 { return; } else { if ((len != 0U) && (req->wLength != 0U)) 800a6dc: 893b ldrh r3, [r7, #8] 800a6de: 2b00 cmp r3, #0 800a6e0: d011 beq.n 800a706 800a6e2: 683b ldr r3, [r7, #0] 800a6e4: 88db ldrh r3, [r3, #6] 800a6e6: 2b00 cmp r3, #0 800a6e8: d00d beq.n 800a706 { len = MIN(len, req->wLength); 800a6ea: 683b ldr r3, [r7, #0] 800a6ec: 88da ldrh r2, [r3, #6] 800a6ee: 893b ldrh r3, [r7, #8] 800a6f0: 4293 cmp r3, r2 800a6f2: bf28 it cs 800a6f4: 4613 movcs r3, r2 800a6f6: b29b uxth r3, r3 800a6f8: 813b strh r3, [r7, #8] (void)USBD_CtlSendData(pdev, pbuf, len); 800a6fa: 893b ldrh r3, [r7, #8] 800a6fc: 461a mov r2, r3 800a6fe: 68f9 ldr r1, [r7, #12] 800a700: 6878 ldr r0, [r7, #4] 800a702: f000 fa1f bl 800ab44 } if (req->wLength == 0U) 800a706: 683b ldr r3, [r7, #0] 800a708: 88db ldrh r3, [r3, #6] 800a70a: 2b00 cmp r3, #0 800a70c: d104 bne.n 800a718 { (void)USBD_CtlSendStatus(pdev); 800a70e: 6878 ldr r0, [r7, #4] 800a710: f000 fa76 bl 800ac00 800a714: e000 b.n 800a718 return; 800a716: bf00 nop } } } 800a718: 3710 adds r7, #16 800a71a: 46bd mov sp, r7 800a71c: bd80 pop {r7, pc} 800a71e: bf00 nop 0800a720 : * @param req: usb request * @retval status */ static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a720: b580 push {r7, lr} 800a722: b084 sub sp, #16 800a724: af00 add r7, sp, #0 800a726: 6078 str r0, [r7, #4] 800a728: 6039 str r1, [r7, #0] uint8_t dev_addr; if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U)) 800a72a: 683b ldr r3, [r7, #0] 800a72c: 889b ldrh r3, [r3, #4] 800a72e: 2b00 cmp r3, #0 800a730: d130 bne.n 800a794 800a732: 683b ldr r3, [r7, #0] 800a734: 88db ldrh r3, [r3, #6] 800a736: 2b00 cmp r3, #0 800a738: d12c bne.n 800a794 800a73a: 683b ldr r3, [r7, #0] 800a73c: 885b ldrh r3, [r3, #2] 800a73e: 2b7f cmp r3, #127 @ 0x7f 800a740: d828 bhi.n 800a794 { dev_addr = (uint8_t)(req->wValue) & 0x7FU; 800a742: 683b ldr r3, [r7, #0] 800a744: 885b ldrh r3, [r3, #2] 800a746: b2db uxtb r3, r3 800a748: f003 037f and.w r3, r3, #127 @ 0x7f 800a74c: 73fb strb r3, [r7, #15] if (pdev->dev_state == USBD_STATE_CONFIGURED) 800a74e: 687b ldr r3, [r7, #4] 800a750: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a754: 2b03 cmp r3, #3 800a756: d104 bne.n 800a762 { USBD_CtlError(pdev, req); 800a758: 6839 ldr r1, [r7, #0] 800a75a: 6878 ldr r0, [r7, #4] 800a75c: f000 f988 bl 800aa70 if (pdev->dev_state == USBD_STATE_CONFIGURED) 800a760: e01d b.n 800a79e } else { pdev->dev_address = dev_addr; 800a762: 687b ldr r3, [r7, #4] 800a764: 7bfa ldrb r2, [r7, #15] 800a766: f883 229e strb.w r2, [r3, #670] @ 0x29e USBD_LL_SetUSBAddress(pdev, dev_addr); 800a76a: 7bfb ldrb r3, [r7, #15] 800a76c: 4619 mov r1, r3 800a76e: 6878 ldr r0, [r7, #4] 800a770: f000 fec1 bl 800b4f6 USBD_CtlSendStatus(pdev); 800a774: 6878 ldr r0, [r7, #4] 800a776: f000 fa43 bl 800ac00 if (dev_addr != 0U) 800a77a: 7bfb ldrb r3, [r7, #15] 800a77c: 2b00 cmp r3, #0 800a77e: d004 beq.n 800a78a { pdev->dev_state = USBD_STATE_ADDRESSED; 800a780: 687b ldr r3, [r7, #4] 800a782: 2202 movs r2, #2 800a784: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800a788: e009 b.n 800a79e } else { pdev->dev_state = USBD_STATE_DEFAULT; 800a78a: 687b ldr r3, [r7, #4] 800a78c: 2201 movs r2, #1 800a78e: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800a792: e004 b.n 800a79e } } } else { USBD_CtlError(pdev, req); 800a794: 6839 ldr r1, [r7, #0] 800a796: 6878 ldr r0, [r7, #4] 800a798: f000 f96a bl 800aa70 } } 800a79c: bf00 nop 800a79e: bf00 nop 800a7a0: 3710 adds r7, #16 800a7a2: 46bd mov sp, r7 800a7a4: bd80 pop {r7, pc} ... 0800a7a8 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a7a8: b580 push {r7, lr} 800a7aa: b082 sub sp, #8 800a7ac: af00 add r7, sp, #0 800a7ae: 6078 str r0, [r7, #4] 800a7b0: 6039 str r1, [r7, #0] static uint8_t cfgidx; cfgidx = (uint8_t)(req->wValue); 800a7b2: 683b ldr r3, [r7, #0] 800a7b4: 885b ldrh r3, [r3, #2] 800a7b6: b2da uxtb r2, r3 800a7b8: 4b41 ldr r3, [pc, #260] @ (800a8c0 ) 800a7ba: 701a strb r2, [r3, #0] if (cfgidx > USBD_MAX_NUM_CONFIGURATION) 800a7bc: 4b40 ldr r3, [pc, #256] @ (800a8c0 ) 800a7be: 781b ldrb r3, [r3, #0] 800a7c0: 2b01 cmp r3, #1 800a7c2: d904 bls.n 800a7ce { USBD_CtlError(pdev, req); 800a7c4: 6839 ldr r1, [r7, #0] 800a7c6: 6878 ldr r0, [r7, #4] 800a7c8: f000 f952 bl 800aa70 800a7cc: e075 b.n 800a8ba } else { switch (pdev->dev_state) 800a7ce: 687b ldr r3, [r7, #4] 800a7d0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a7d4: 2b02 cmp r3, #2 800a7d6: d002 beq.n 800a7de 800a7d8: 2b03 cmp r3, #3 800a7da: d023 beq.n 800a824 800a7dc: e062 b.n 800a8a4 { case USBD_STATE_ADDRESSED: if (cfgidx) 800a7de: 4b38 ldr r3, [pc, #224] @ (800a8c0 ) 800a7e0: 781b ldrb r3, [r3, #0] 800a7e2: 2b00 cmp r3, #0 800a7e4: d01a beq.n 800a81c { pdev->dev_config = cfgidx; 800a7e6: 4b36 ldr r3, [pc, #216] @ (800a8c0 ) 800a7e8: 781b ldrb r3, [r3, #0] 800a7ea: 461a mov r2, r3 800a7ec: 687b ldr r3, [r7, #4] 800a7ee: 605a str r2, [r3, #4] pdev->dev_state = USBD_STATE_CONFIGURED; 800a7f0: 687b ldr r3, [r7, #4] 800a7f2: 2203 movs r2, #3 800a7f4: f883 229c strb.w r2, [r3, #668] @ 0x29c if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800a7f8: 4b31 ldr r3, [pc, #196] @ (800a8c0 ) 800a7fa: 781b ldrb r3, [r3, #0] 800a7fc: 4619 mov r1, r3 800a7fe: 6878 ldr r0, [r7, #4] 800a800: f7ff f9e7 bl 8009bd2 800a804: 4603 mov r3, r0 800a806: 2b02 cmp r3, #2 800a808: d104 bne.n 800a814 { USBD_CtlError(pdev, req); 800a80a: 6839 ldr r1, [r7, #0] 800a80c: 6878 ldr r0, [r7, #4] 800a80e: f000 f92f bl 800aa70 return; 800a812: e052 b.n 800a8ba } USBD_CtlSendStatus(pdev); 800a814: 6878 ldr r0, [r7, #4] 800a816: f000 f9f3 bl 800ac00 } else { USBD_CtlSendStatus(pdev); } break; 800a81a: e04e b.n 800a8ba USBD_CtlSendStatus(pdev); 800a81c: 6878 ldr r0, [r7, #4] 800a81e: f000 f9ef bl 800ac00 break; 800a822: e04a b.n 800a8ba case USBD_STATE_CONFIGURED: if (cfgidx == 0U) 800a824: 4b26 ldr r3, [pc, #152] @ (800a8c0 ) 800a826: 781b ldrb r3, [r3, #0] 800a828: 2b00 cmp r3, #0 800a82a: d112 bne.n 800a852 { pdev->dev_state = USBD_STATE_ADDRESSED; 800a82c: 687b ldr r3, [r7, #4] 800a82e: 2202 movs r2, #2 800a830: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->dev_config = cfgidx; 800a834: 4b22 ldr r3, [pc, #136] @ (800a8c0 ) 800a836: 781b ldrb r3, [r3, #0] 800a838: 461a mov r2, r3 800a83a: 687b ldr r3, [r7, #4] 800a83c: 605a str r2, [r3, #4] USBD_ClrClassConfig(pdev, cfgidx); 800a83e: 4b20 ldr r3, [pc, #128] @ (800a8c0 ) 800a840: 781b ldrb r3, [r3, #0] 800a842: 4619 mov r1, r3 800a844: 6878 ldr r0, [r7, #4] 800a846: f7ff f9e3 bl 8009c10 USBD_CtlSendStatus(pdev); 800a84a: 6878 ldr r0, [r7, #4] 800a84c: f000 f9d8 bl 800ac00 } else { USBD_CtlSendStatus(pdev); } break; 800a850: e033 b.n 800a8ba else if (cfgidx != pdev->dev_config) 800a852: 4b1b ldr r3, [pc, #108] @ (800a8c0 ) 800a854: 781b ldrb r3, [r3, #0] 800a856: 461a mov r2, r3 800a858: 687b ldr r3, [r7, #4] 800a85a: 685b ldr r3, [r3, #4] 800a85c: 429a cmp r2, r3 800a85e: d01d beq.n 800a89c USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 800a860: 687b ldr r3, [r7, #4] 800a862: 685b ldr r3, [r3, #4] 800a864: b2db uxtb r3, r3 800a866: 4619 mov r1, r3 800a868: 6878 ldr r0, [r7, #4] 800a86a: f7ff f9d1 bl 8009c10 pdev->dev_config = cfgidx; 800a86e: 4b14 ldr r3, [pc, #80] @ (800a8c0 ) 800a870: 781b ldrb r3, [r3, #0] 800a872: 461a mov r2, r3 800a874: 687b ldr r3, [r7, #4] 800a876: 605a str r2, [r3, #4] if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL) 800a878: 4b11 ldr r3, [pc, #68] @ (800a8c0 ) 800a87a: 781b ldrb r3, [r3, #0] 800a87c: 4619 mov r1, r3 800a87e: 6878 ldr r0, [r7, #4] 800a880: f7ff f9a7 bl 8009bd2 800a884: 4603 mov r3, r0 800a886: 2b02 cmp r3, #2 800a888: d104 bne.n 800a894 USBD_CtlError(pdev, req); 800a88a: 6839 ldr r1, [r7, #0] 800a88c: 6878 ldr r0, [r7, #4] 800a88e: f000 f8ef bl 800aa70 return; 800a892: e012 b.n 800a8ba USBD_CtlSendStatus(pdev); 800a894: 6878 ldr r0, [r7, #4] 800a896: f000 f9b3 bl 800ac00 break; 800a89a: e00e b.n 800a8ba USBD_CtlSendStatus(pdev); 800a89c: 6878 ldr r0, [r7, #4] 800a89e: f000 f9af bl 800ac00 break; 800a8a2: e00a b.n 800a8ba default: USBD_CtlError(pdev, req); 800a8a4: 6839 ldr r1, [r7, #0] 800a8a6: 6878 ldr r0, [r7, #4] 800a8a8: f000 f8e2 bl 800aa70 USBD_ClrClassConfig(pdev, cfgidx); 800a8ac: 4b04 ldr r3, [pc, #16] @ (800a8c0 ) 800a8ae: 781b ldrb r3, [r3, #0] 800a8b0: 4619 mov r1, r3 800a8b2: 6878 ldr r0, [r7, #4] 800a8b4: f7ff f9ac bl 8009c10 break; 800a8b8: bf00 nop } } } 800a8ba: 3708 adds r7, #8 800a8bc: 46bd mov sp, r7 800a8be: bd80 pop {r7, pc} 800a8c0: 20000410 .word 0x20000410 0800a8c4 : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a8c4: b580 push {r7, lr} 800a8c6: b082 sub sp, #8 800a8c8: af00 add r7, sp, #0 800a8ca: 6078 str r0, [r7, #4] 800a8cc: 6039 str r1, [r7, #0] if (req->wLength != 1U) 800a8ce: 683b ldr r3, [r7, #0] 800a8d0: 88db ldrh r3, [r3, #6] 800a8d2: 2b01 cmp r3, #1 800a8d4: d004 beq.n 800a8e0 { USBD_CtlError(pdev, req); 800a8d6: 6839 ldr r1, [r7, #0] 800a8d8: 6878 ldr r0, [r7, #4] 800a8da: f000 f8c9 bl 800aa70 default: USBD_CtlError(pdev, req); break; } } } 800a8de: e022 b.n 800a926 switch (pdev->dev_state) 800a8e0: 687b ldr r3, [r7, #4] 800a8e2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a8e6: 2b02 cmp r3, #2 800a8e8: dc02 bgt.n 800a8f0 800a8ea: 2b00 cmp r3, #0 800a8ec: dc03 bgt.n 800a8f6 800a8ee: e015 b.n 800a91c 800a8f0: 2b03 cmp r3, #3 800a8f2: d00b beq.n 800a90c 800a8f4: e012 b.n 800a91c pdev->dev_default_config = 0U; 800a8f6: 687b ldr r3, [r7, #4] 800a8f8: 2200 movs r2, #0 800a8fa: 609a str r2, [r3, #8] USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U); 800a8fc: 687b ldr r3, [r7, #4] 800a8fe: 3308 adds r3, #8 800a900: 2201 movs r2, #1 800a902: 4619 mov r1, r3 800a904: 6878 ldr r0, [r7, #4] 800a906: f000 f91d bl 800ab44 break; 800a90a: e00c b.n 800a926 USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U); 800a90c: 687b ldr r3, [r7, #4] 800a90e: 3304 adds r3, #4 800a910: 2201 movs r2, #1 800a912: 4619 mov r1, r3 800a914: 6878 ldr r0, [r7, #4] 800a916: f000 f915 bl 800ab44 break; 800a91a: e004 b.n 800a926 USBD_CtlError(pdev, req); 800a91c: 6839 ldr r1, [r7, #0] 800a91e: 6878 ldr r0, [r7, #4] 800a920: f000 f8a6 bl 800aa70 break; 800a924: bf00 nop } 800a926: bf00 nop 800a928: 3708 adds r7, #8 800a92a: 46bd mov sp, r7 800a92c: bd80 pop {r7, pc} 0800a92e : * @param pdev: device instance * @param req: usb request * @retval status */ static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a92e: b580 push {r7, lr} 800a930: b082 sub sp, #8 800a932: af00 add r7, sp, #0 800a934: 6078 str r0, [r7, #4] 800a936: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800a938: 687b ldr r3, [r7, #4] 800a93a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a93e: 3b01 subs r3, #1 800a940: 2b02 cmp r3, #2 800a942: d81e bhi.n 800a982 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wLength != 0x2U) 800a944: 683b ldr r3, [r7, #0] 800a946: 88db ldrh r3, [r3, #6] 800a948: 2b02 cmp r3, #2 800a94a: d004 beq.n 800a956 { USBD_CtlError(pdev, req); 800a94c: 6839 ldr r1, [r7, #0] 800a94e: 6878 ldr r0, [r7, #4] 800a950: f000 f88e bl 800aa70 break; 800a954: e01a b.n 800a98c } #if (USBD_SELF_POWERED == 1U) pdev->dev_config_status = USB_CONFIG_SELF_POWERED; 800a956: 687b ldr r3, [r7, #4] 800a958: 2201 movs r2, #1 800a95a: 60da str r2, [r3, #12] #else pdev->dev_config_status = 0U; #endif if (pdev->dev_remote_wakeup) 800a95c: 687b ldr r3, [r7, #4] 800a95e: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4 800a962: 2b00 cmp r3, #0 800a964: d005 beq.n 800a972 { pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; 800a966: 687b ldr r3, [r7, #4] 800a968: 68db ldr r3, [r3, #12] 800a96a: f043 0202 orr.w r2, r3, #2 800a96e: 687b ldr r3, [r7, #4] 800a970: 60da str r2, [r3, #12] } USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U); 800a972: 687b ldr r3, [r7, #4] 800a974: 330c adds r3, #12 800a976: 2202 movs r2, #2 800a978: 4619 mov r1, r3 800a97a: 6878 ldr r0, [r7, #4] 800a97c: f000 f8e2 bl 800ab44 break; 800a980: e004 b.n 800a98c default: USBD_CtlError(pdev, req); 800a982: 6839 ldr r1, [r7, #0] 800a984: 6878 ldr r0, [r7, #4] 800a986: f000 f873 bl 800aa70 break; 800a98a: bf00 nop } } 800a98c: bf00 nop 800a98e: 3708 adds r7, #8 800a990: 46bd mov sp, r7 800a992: bd80 pop {r7, pc} 0800a994 : * @param req: usb request * @retval status */ static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a994: b580 push {r7, lr} 800a996: b082 sub sp, #8 800a998: af00 add r7, sp, #0 800a99a: 6078 str r0, [r7, #4] 800a99c: 6039 str r1, [r7, #0] if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800a99e: 683b ldr r3, [r7, #0] 800a9a0: 885b ldrh r3, [r3, #2] 800a9a2: 2b01 cmp r3, #1 800a9a4: d106 bne.n 800a9b4 { pdev->dev_remote_wakeup = 1U; 800a9a6: 687b ldr r3, [r7, #4] 800a9a8: 2201 movs r2, #1 800a9aa: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800a9ae: 6878 ldr r0, [r7, #4] 800a9b0: f000 f926 bl 800ac00 } } 800a9b4: bf00 nop 800a9b6: 3708 adds r7, #8 800a9b8: 46bd mov sp, r7 800a9ba: bd80 pop {r7, pc} 0800a9bc : * @param req: usb request * @retval status */ static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800a9bc: b580 push {r7, lr} 800a9be: b082 sub sp, #8 800a9c0: af00 add r7, sp, #0 800a9c2: 6078 str r0, [r7, #4] 800a9c4: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800a9c6: 687b ldr r3, [r7, #4] 800a9c8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800a9cc: 3b01 subs r3, #1 800a9ce: 2b02 cmp r3, #2 800a9d0: d80b bhi.n 800a9ea { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 800a9d2: 683b ldr r3, [r7, #0] 800a9d4: 885b ldrh r3, [r3, #2] 800a9d6: 2b01 cmp r3, #1 800a9d8: d10c bne.n 800a9f4 { pdev->dev_remote_wakeup = 0U; 800a9da: 687b ldr r3, [r7, #4] 800a9dc: 2200 movs r2, #0 800a9de: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 USBD_CtlSendStatus(pdev); 800a9e2: 6878 ldr r0, [r7, #4] 800a9e4: f000 f90c bl 800ac00 } break; 800a9e8: e004 b.n 800a9f4 default: USBD_CtlError(pdev, req); 800a9ea: 6839 ldr r1, [r7, #0] 800a9ec: 6878 ldr r0, [r7, #4] 800a9ee: f000 f83f bl 800aa70 break; 800a9f2: e000 b.n 800a9f6 break; 800a9f4: bf00 nop } } 800a9f6: bf00 nop 800a9f8: 3708 adds r7, #8 800a9fa: 46bd mov sp, r7 800a9fc: bd80 pop {r7, pc} 0800a9fe : * @param req: usb request * @retval None */ void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) { 800a9fe: b480 push {r7} 800aa00: b083 sub sp, #12 800aa02: af00 add r7, sp, #0 800aa04: 6078 str r0, [r7, #4] 800aa06: 6039 str r1, [r7, #0] req->bmRequest = *(uint8_t *)(pdata); 800aa08: 683b ldr r3, [r7, #0] 800aa0a: 781a ldrb r2, [r3, #0] 800aa0c: 687b ldr r3, [r7, #4] 800aa0e: 701a strb r2, [r3, #0] req->bRequest = *(uint8_t *)(pdata + 1U); 800aa10: 683b ldr r3, [r7, #0] 800aa12: 785a ldrb r2, [r3, #1] 800aa14: 687b ldr r3, [r7, #4] 800aa16: 705a strb r2, [r3, #1] req->wValue = SWAPBYTE(pdata + 2U); 800aa18: 683b ldr r3, [r7, #0] 800aa1a: 3302 adds r3, #2 800aa1c: 781b ldrb r3, [r3, #0] 800aa1e: 461a mov r2, r3 800aa20: 683b ldr r3, [r7, #0] 800aa22: 3303 adds r3, #3 800aa24: 781b ldrb r3, [r3, #0] 800aa26: 021b lsls r3, r3, #8 800aa28: b29b uxth r3, r3 800aa2a: 4413 add r3, r2 800aa2c: b29a uxth r2, r3 800aa2e: 687b ldr r3, [r7, #4] 800aa30: 805a strh r2, [r3, #2] req->wIndex = SWAPBYTE(pdata + 4U); 800aa32: 683b ldr r3, [r7, #0] 800aa34: 3304 adds r3, #4 800aa36: 781b ldrb r3, [r3, #0] 800aa38: 461a mov r2, r3 800aa3a: 683b ldr r3, [r7, #0] 800aa3c: 3305 adds r3, #5 800aa3e: 781b ldrb r3, [r3, #0] 800aa40: 021b lsls r3, r3, #8 800aa42: b29b uxth r3, r3 800aa44: 4413 add r3, r2 800aa46: b29a uxth r2, r3 800aa48: 687b ldr r3, [r7, #4] 800aa4a: 809a strh r2, [r3, #4] req->wLength = SWAPBYTE(pdata + 6U); 800aa4c: 683b ldr r3, [r7, #0] 800aa4e: 3306 adds r3, #6 800aa50: 781b ldrb r3, [r3, #0] 800aa52: 461a mov r2, r3 800aa54: 683b ldr r3, [r7, #0] 800aa56: 3307 adds r3, #7 800aa58: 781b ldrb r3, [r3, #0] 800aa5a: 021b lsls r3, r3, #8 800aa5c: b29b uxth r3, r3 800aa5e: 4413 add r3, r2 800aa60: b29a uxth r2, r3 800aa62: 687b ldr r3, [r7, #4] 800aa64: 80da strh r2, [r3, #6] } 800aa66: bf00 nop 800aa68: 370c adds r7, #12 800aa6a: 46bd mov sp, r7 800aa6c: bc80 pop {r7} 800aa6e: 4770 bx lr 0800aa70 : * @retval None */ void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800aa70: b580 push {r7, lr} 800aa72: b082 sub sp, #8 800aa74: af00 add r7, sp, #0 800aa76: 6078 str r0, [r7, #4] 800aa78: 6039 str r1, [r7, #0] USBD_LL_StallEP(pdev, 0x80U); 800aa7a: 2180 movs r1, #128 @ 0x80 800aa7c: 6878 ldr r0, [r7, #4] 800aa7e: f000 fcd1 bl 800b424 USBD_LL_StallEP(pdev, 0U); 800aa82: 2100 movs r1, #0 800aa84: 6878 ldr r0, [r7, #4] 800aa86: f000 fccd bl 800b424 } 800aa8a: bf00 nop 800aa8c: 3708 adds r7, #8 800aa8e: 46bd mov sp, r7 800aa90: bd80 pop {r7, pc} 0800aa92 : * @param unicode : Formatted string buffer (unicode) * @param len : descriptor length * @retval None */ void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) { 800aa92: b580 push {r7, lr} 800aa94: b086 sub sp, #24 800aa96: af00 add r7, sp, #0 800aa98: 60f8 str r0, [r7, #12] 800aa9a: 60b9 str r1, [r7, #8] 800aa9c: 607a str r2, [r7, #4] uint8_t idx = 0U; 800aa9e: 2300 movs r3, #0 800aaa0: 75fb strb r3, [r7, #23] if (desc != NULL) 800aaa2: 68fb ldr r3, [r7, #12] 800aaa4: 2b00 cmp r3, #0 800aaa6: d032 beq.n 800ab0e { *len = (uint16_t)USBD_GetLen(desc) * 2U + 2U; 800aaa8: 68f8 ldr r0, [r7, #12] 800aaaa: f000 f834 bl 800ab16 800aaae: 4603 mov r3, r0 800aab0: 3301 adds r3, #1 800aab2: b29b uxth r3, r3 800aab4: 005b lsls r3, r3, #1 800aab6: b29a uxth r2, r3 800aab8: 687b ldr r3, [r7, #4] 800aaba: 801a strh r2, [r3, #0] unicode[idx++] = *(uint8_t *)(void *)len; 800aabc: 7dfb ldrb r3, [r7, #23] 800aabe: 1c5a adds r2, r3, #1 800aac0: 75fa strb r2, [r7, #23] 800aac2: 461a mov r2, r3 800aac4: 68bb ldr r3, [r7, #8] 800aac6: 4413 add r3, r2 800aac8: 687a ldr r2, [r7, #4] 800aaca: 7812 ldrb r2, [r2, #0] 800aacc: 701a strb r2, [r3, #0] unicode[idx++] = USB_DESC_TYPE_STRING; 800aace: 7dfb ldrb r3, [r7, #23] 800aad0: 1c5a adds r2, r3, #1 800aad2: 75fa strb r2, [r7, #23] 800aad4: 461a mov r2, r3 800aad6: 68bb ldr r3, [r7, #8] 800aad8: 4413 add r3, r2 800aada: 2203 movs r2, #3 800aadc: 701a strb r2, [r3, #0] while (*desc != '\0') 800aade: e012 b.n 800ab06 { unicode[idx++] = *desc++; 800aae0: 68fb ldr r3, [r7, #12] 800aae2: 1c5a adds r2, r3, #1 800aae4: 60fa str r2, [r7, #12] 800aae6: 7dfa ldrb r2, [r7, #23] 800aae8: 1c51 adds r1, r2, #1 800aaea: 75f9 strb r1, [r7, #23] 800aaec: 4611 mov r1, r2 800aaee: 68ba ldr r2, [r7, #8] 800aaf0: 440a add r2, r1 800aaf2: 781b ldrb r3, [r3, #0] 800aaf4: 7013 strb r3, [r2, #0] unicode[idx++] = 0U; 800aaf6: 7dfb ldrb r3, [r7, #23] 800aaf8: 1c5a adds r2, r3, #1 800aafa: 75fa strb r2, [r7, #23] 800aafc: 461a mov r2, r3 800aafe: 68bb ldr r3, [r7, #8] 800ab00: 4413 add r3, r2 800ab02: 2200 movs r2, #0 800ab04: 701a strb r2, [r3, #0] while (*desc != '\0') 800ab06: 68fb ldr r3, [r7, #12] 800ab08: 781b ldrb r3, [r3, #0] 800ab0a: 2b00 cmp r3, #0 800ab0c: d1e8 bne.n 800aae0 } } } 800ab0e: bf00 nop 800ab10: 3718 adds r7, #24 800ab12: 46bd mov sp, r7 800ab14: bd80 pop {r7, pc} 0800ab16 : * return the string length * @param buf : pointer to the ascii string buffer * @retval string length */ static uint8_t USBD_GetLen(uint8_t *buf) { 800ab16: b480 push {r7} 800ab18: b085 sub sp, #20 800ab1a: af00 add r7, sp, #0 800ab1c: 6078 str r0, [r7, #4] uint8_t len = 0U; 800ab1e: 2300 movs r3, #0 800ab20: 73fb strb r3, [r7, #15] while (*buf != '\0') 800ab22: e005 b.n 800ab30 { len++; 800ab24: 7bfb ldrb r3, [r7, #15] 800ab26: 3301 adds r3, #1 800ab28: 73fb strb r3, [r7, #15] buf++; 800ab2a: 687b ldr r3, [r7, #4] 800ab2c: 3301 adds r3, #1 800ab2e: 607b str r3, [r7, #4] while (*buf != '\0') 800ab30: 687b ldr r3, [r7, #4] 800ab32: 781b ldrb r3, [r3, #0] 800ab34: 2b00 cmp r3, #0 800ab36: d1f5 bne.n 800ab24 } return len; 800ab38: 7bfb ldrb r3, [r7, #15] } 800ab3a: 4618 mov r0, r3 800ab3c: 3714 adds r7, #20 800ab3e: 46bd mov sp, r7 800ab40: bc80 pop {r7} 800ab42: 4770 bx lr 0800ab44 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800ab44: b580 push {r7, lr} 800ab46: b084 sub sp, #16 800ab48: af00 add r7, sp, #0 800ab4a: 60f8 str r0, [r7, #12] 800ab4c: 60b9 str r1, [r7, #8] 800ab4e: 4613 mov r3, r2 800ab50: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_IN; 800ab52: 68fb ldr r3, [r7, #12] 800ab54: 2202 movs r2, #2 800ab56: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_in[0].total_length = len; 800ab5a: 88fa ldrh r2, [r7, #6] 800ab5c: 68fb ldr r3, [r7, #12] 800ab5e: 61da str r2, [r3, #28] pdev->ep_in[0].rem_length = len; 800ab60: 88fa ldrh r2, [r7, #6] 800ab62: 68fb ldr r3, [r7, #12] 800ab64: 621a str r2, [r3, #32] /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800ab66: 88fb ldrh r3, [r7, #6] 800ab68: 68ba ldr r2, [r7, #8] 800ab6a: 2100 movs r1, #0 800ab6c: 68f8 ldr r0, [r7, #12] 800ab6e: f000 fce1 bl 800b534 return USBD_OK; 800ab72: 2300 movs r3, #0 } 800ab74: 4618 mov r0, r3 800ab76: 3710 adds r7, #16 800ab78: 46bd mov sp, r7 800ab7a: bd80 pop {r7, pc} 0800ab7c : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800ab7c: b580 push {r7, lr} 800ab7e: b084 sub sp, #16 800ab80: af00 add r7, sp, #0 800ab82: 60f8 str r0, [r7, #12] 800ab84: 60b9 str r1, [r7, #8] 800ab86: 4613 mov r3, r2 800ab88: 80fb strh r3, [r7, #6] /* Start the next transfer */ USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 800ab8a: 88fb ldrh r3, [r7, #6] 800ab8c: 68ba ldr r2, [r7, #8] 800ab8e: 2100 movs r1, #0 800ab90: 68f8 ldr r0, [r7, #12] 800ab92: f000 fccf bl 800b534 return USBD_OK; 800ab96: 2300 movs r3, #0 } 800ab98: 4618 mov r0, r3 800ab9a: 3710 adds r7, #16 800ab9c: 46bd mov sp, r7 800ab9e: bd80 pop {r7, pc} 0800aba0 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800aba0: b580 push {r7, lr} 800aba2: b084 sub sp, #16 800aba4: af00 add r7, sp, #0 800aba6: 60f8 str r0, [r7, #12] 800aba8: 60b9 str r1, [r7, #8] 800abaa: 4613 mov r3, r2 800abac: 80fb strh r3, [r7, #6] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_OUT; 800abae: 68fb ldr r3, [r7, #12] 800abb0: 2203 movs r2, #3 800abb2: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_out[0].total_length = len; 800abb6: 88fa ldrh r2, [r7, #6] 800abb8: 68fb ldr r3, [r7, #12] 800abba: f8c3 215c str.w r2, [r3, #348] @ 0x15c pdev->ep_out[0].rem_length = len; 800abbe: 88fa ldrh r2, [r7, #6] 800abc0: 68fb ldr r3, [r7, #12] 800abc2: f8c3 2160 str.w r2, [r3, #352] @ 0x160 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800abc6: 88fb ldrh r3, [r7, #6] 800abc8: 68ba ldr r2, [r7, #8] 800abca: 2100 movs r1, #0 800abcc: 68f8 ldr r0, [r7, #12] 800abce: f000 fcd4 bl 800b57a return USBD_OK; 800abd2: 2300 movs r3, #0 } 800abd4: 4618 mov r0, r3 800abd6: 3710 adds r7, #16 800abd8: 46bd mov sp, r7 800abda: bd80 pop {r7, pc} 0800abdc : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint16_t len) { 800abdc: b580 push {r7, lr} 800abde: b084 sub sp, #16 800abe0: af00 add r7, sp, #0 800abe2: 60f8 str r0, [r7, #12] 800abe4: 60b9 str r1, [r7, #8] 800abe6: 4613 mov r3, r2 800abe8: 80fb strh r3, [r7, #6] USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 800abea: 88fb ldrh r3, [r7, #6] 800abec: 68ba ldr r2, [r7, #8] 800abee: 2100 movs r1, #0 800abf0: 68f8 ldr r0, [r7, #12] 800abf2: f000 fcc2 bl 800b57a return USBD_OK; 800abf6: 2300 movs r3, #0 } 800abf8: 4618 mov r0, r3 800abfa: 3710 adds r7, #16 800abfc: 46bd mov sp, r7 800abfe: bd80 pop {r7, pc} 0800ac00 : * send zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) { 800ac00: b580 push {r7, lr} 800ac02: b082 sub sp, #8 800ac04: af00 add r7, sp, #0 800ac06: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_IN; 800ac08: 687b ldr r3, [r7, #4] 800ac0a: 2204 movs r2, #4 800ac0c: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); 800ac10: 2300 movs r3, #0 800ac12: 2200 movs r2, #0 800ac14: 2100 movs r1, #0 800ac16: 6878 ldr r0, [r7, #4] 800ac18: f000 fc8c bl 800b534 return USBD_OK; 800ac1c: 2300 movs r3, #0 } 800ac1e: 4618 mov r0, r3 800ac20: 3708 adds r7, #8 800ac22: 46bd mov sp, r7 800ac24: bd80 pop {r7, pc} 0800ac26 : * receive zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) { 800ac26: b580 push {r7, lr} 800ac28: b082 sub sp, #8 800ac2a: af00 add r7, sp, #0 800ac2c: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_OUT; 800ac2e: 687b ldr r3, [r7, #4] 800ac30: 2205 movs r2, #5 800ac32: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800ac36: 2300 movs r3, #0 800ac38: 2200 movs r2, #0 800ac3a: 2100 movs r1, #0 800ac3c: 6878 ldr r0, [r7, #4] 800ac3e: f000 fc9c bl 800b57a return USBD_OK; 800ac42: 2300 movs r3, #0 } 800ac44: 4618 mov r0, r3 800ac46: 3708 adds r7, #8 800ac48: 46bd mov sp, r7 800ac4a: bd80 pop {r7, pc} 0800ac4c : /** * Init USB device Library, add supported class and start the library * @retval None */ void MX_USB_DEVICE_Init(void) { 800ac4c: b580 push {r7, lr} 800ac4e: af00 add r7, sp, #0 /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ /* USER CODE END USB_DEVICE_Init_PreTreatment */ /* Init Device Library, add supported class and start the library. */ if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK) 800ac50: 2200 movs r2, #0 800ac52: 4912 ldr r1, [pc, #72] @ (800ac9c ) 800ac54: 4812 ldr r0, [pc, #72] @ (800aca0 ) 800ac56: f7fe ff62 bl 8009b1e 800ac5a: 4603 mov r3, r0 800ac5c: 2b00 cmp r3, #0 800ac5e: d001 beq.n 800ac64 { Error_Handler(); 800ac60: f7f7 f86e bl 8001d40 } if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK) 800ac64: 490f ldr r1, [pc, #60] @ (800aca4 ) 800ac66: 480e ldr r0, [pc, #56] @ (800aca0 ) 800ac68: f7fe ff84 bl 8009b74 800ac6c: 4603 mov r3, r0 800ac6e: 2b00 cmp r3, #0 800ac70: d001 beq.n 800ac76 { Error_Handler(); 800ac72: f7f7 f865 bl 8001d40 } if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK) 800ac76: 490c ldr r1, [pc, #48] @ (800aca8 ) 800ac78: 4809 ldr r0, [pc, #36] @ (800aca0 ) 800ac7a: f7fe feb5 bl 80099e8 800ac7e: 4603 mov r3, r0 800ac80: 2b00 cmp r3, #0 800ac82: d001 beq.n 800ac88 { Error_Handler(); 800ac84: f7f7 f85c bl 8001d40 } if (USBD_Start(&hUsbDeviceFS) != USBD_OK) 800ac88: 4805 ldr r0, [pc, #20] @ (800aca0 ) 800ac8a: f7fe ff8c bl 8009ba6 800ac8e: 4603 mov r3, r0 800ac90: 2b00 cmp r3, #0 800ac92: d001 beq.n 800ac98 { Error_Handler(); 800ac94: f7f7 f854 bl 8001d40 } /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ /* USER CODE END USB_DEVICE_Init_PostTreatment */ } 800ac98: bf00 nop 800ac9a: bd80 pop {r7, pc} 800ac9c: 20000130 .word 0x20000130 800aca0: 20000414 .word 0x20000414 800aca4: 2000001c .word 0x2000001c 800aca8: 20000120 .word 0x20000120 0800acac : /* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */ #define RX_FIFO_SZ 256 static uint8_t rx_fifo[RX_FIFO_SZ]; static volatile uint16_t rx_head = 0, rx_tail = 0; static void fifo_push(const uint8_t* data, uint32_t len) { 800acac: b480 push {r7} 800acae: b085 sub sp, #20 800acb0: af00 add r7, sp, #0 800acb2: 6078 str r0, [r7, #4] 800acb4: 6039 str r1, [r7, #0] while (len--) { 800acb6: e01e b.n 800acf6 uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u); 800acb8: 4b14 ldr r3, [pc, #80] @ (800ad0c ) 800acba: 881b ldrh r3, [r3, #0] 800acbc: b29b uxth r3, r3 800acbe: 3301 adds r3, #1 800acc0: b29b uxth r3, r3 800acc2: b2db uxtb r3, r3 800acc4: 81fb strh r3, [r7, #14] if (next == (rx_tail & (RX_FIFO_SZ - 1u))) { 800acc6: 89fa ldrh r2, [r7, #14] 800acc8: 4b11 ldr r3, [pc, #68] @ (800ad10 ) 800acca: 881b ldrh r3, [r3, #0] 800accc: b29b uxth r3, r3 800acce: b2db uxtb r3, r3 800acd0: 429a cmp r2, r3 800acd2: d103 bne.n 800acdc /* overflow — drop byte (or set a flag) */ data++; 800acd4: 687b ldr r3, [r7, #4] 800acd6: 3301 adds r3, #1 800acd8: 607b str r3, [r7, #4] continue; 800acda: e00c b.n 800acf6 } rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++; 800acdc: 687b ldr r3, [r7, #4] 800acde: 1c5a adds r2, r3, #1 800ace0: 607a str r2, [r7, #4] 800ace2: 4a0a ldr r2, [pc, #40] @ (800ad0c ) 800ace4: 8812 ldrh r2, [r2, #0] 800ace6: b292 uxth r2, r2 800ace8: b2d2 uxtb r2, r2 800acea: 7819 ldrb r1, [r3, #0] 800acec: 4b09 ldr r3, [pc, #36] @ (800ad14 ) 800acee: 5499 strb r1, [r3, r2] rx_head = next; 800acf0: 4a06 ldr r2, [pc, #24] @ (800ad0c ) 800acf2: 89fb ldrh r3, [r7, #14] 800acf4: 8013 strh r3, [r2, #0] while (len--) { 800acf6: 683b ldr r3, [r7, #0] 800acf8: 1e5a subs r2, r3, #1 800acfa: 603a str r2, [r7, #0] 800acfc: 2b00 cmp r3, #0 800acfe: d1db bne.n 800acb8 } } 800ad00: bf00 nop 800ad02: bf00 nop 800ad04: 3714 adds r7, #20 800ad06: 46bd mov sp, r7 800ad08: bc80 pop {r7} 800ad0a: 4770 bx lr 800ad0c: 20000fd8 .word 0x20000fd8 800ad10: 20000fda .word 0x20000fda 800ad14: 20000ed8 .word 0x20000ed8 0800ad18 : uint32_t CDC_Available(void) { 800ad18: b480 push {r7} 800ad1a: af00 add r7, sp, #0 return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u)); 800ad1c: 4b06 ldr r3, [pc, #24] @ (800ad38 ) 800ad1e: 881b ldrh r3, [r3, #0] 800ad20: b29a uxth r2, r3 800ad22: 4b06 ldr r3, [pc, #24] @ (800ad3c ) 800ad24: 881b ldrh r3, [r3, #0] 800ad26: b29b uxth r3, r3 800ad28: 1ad3 subs r3, r2, r3 800ad2a: b29b uxth r3, r3 800ad2c: b2db uxtb r3, r3 } 800ad2e: 4618 mov r0, r3 800ad30: 46bd mov sp, r7 800ad32: bc80 pop {r7} 800ad34: 4770 bx lr 800ad36: bf00 nop 800ad38: 20000fd8 .word 0x20000fd8 800ad3c: 20000fda .word 0x20000fda 0800ad40 : int CDC_ReadByte(void) { 800ad40: b480 push {r7} 800ad42: b083 sub sp, #12 800ad44: af00 add r7, sp, #0 if (rx_tail == rx_head) return -1; 800ad46: 4b10 ldr r3, [pc, #64] @ (800ad88 ) 800ad48: 881b ldrh r3, [r3, #0] 800ad4a: b29a uxth r2, r3 800ad4c: 4b0f ldr r3, [pc, #60] @ (800ad8c ) 800ad4e: 881b ldrh r3, [r3, #0] 800ad50: b29b uxth r3, r3 800ad52: 429a cmp r2, r3 800ad54: d102 bne.n 800ad5c 800ad56: f04f 33ff mov.w r3, #4294967295 800ad5a: e010 b.n 800ad7e int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)]; 800ad5c: 4b0a ldr r3, [pc, #40] @ (800ad88 ) 800ad5e: 881b ldrh r3, [r3, #0] 800ad60: b29b uxth r3, r3 800ad62: b2db uxtb r3, r3 800ad64: 4a0a ldr r2, [pc, #40] @ (800ad90 ) 800ad66: 5cd3 ldrb r3, [r2, r3] 800ad68: 607b str r3, [r7, #4] rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u); 800ad6a: 4b07 ldr r3, [pc, #28] @ (800ad88 ) 800ad6c: 881b ldrh r3, [r3, #0] 800ad6e: b29b uxth r3, r3 800ad70: 3301 adds r3, #1 800ad72: b29b uxth r3, r3 800ad74: b2db uxtb r3, r3 800ad76: b29a uxth r2, r3 800ad78: 4b03 ldr r3, [pc, #12] @ (800ad88 ) 800ad7a: 801a strh r2, [r3, #0] return b; 800ad7c: 687b ldr r3, [r7, #4] } 800ad7e: 4618 mov r0, r3 800ad80: 370c adds r7, #12 800ad82: 46bd mov sp, r7 800ad84: bc80 pop {r7} 800ad86: 4770 bx lr 800ad88: 20000fda .word 0x20000fda 800ad8c: 20000fd8 .word 0x20000fd8 800ad90: 20000ed8 .word 0x20000ed8 0800ad94 : /** * @brief Initializes the CDC media low layer over the FS USB IP * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Init_FS(void) { 800ad94: b580 push {r7, lr} 800ad96: af00 add r7, sp, #0 /* USER CODE BEGIN 3 */ /* Set Application Buffers */ USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0); 800ad98: 2200 movs r2, #0 800ad9a: 4905 ldr r1, [pc, #20] @ (800adb0 ) 800ad9c: 4805 ldr r0, [pc, #20] @ (800adb4 ) 800ad9e: f7fe fe39 bl 8009a14 USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS); 800ada2: 4905 ldr r1, [pc, #20] @ (800adb8 ) 800ada4: 4803 ldr r0, [pc, #12] @ (800adb4 ) 800ada6: f7fe fe4e bl 8009a46 return (USBD_OK); 800adaa: 2300 movs r3, #0 /* USER CODE END 3 */ } 800adac: 4618 mov r0, r3 800adae: bd80 pop {r7, pc} 800adb0: 20000ad8 .word 0x20000ad8 800adb4: 20000414 .word 0x20000414 800adb8: 200006d8 .word 0x200006d8 0800adbc : /** * @brief DeInitializes the CDC media low layer * @retval USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_DeInit_FS(void) { 800adbc: b480 push {r7} 800adbe: af00 add r7, sp, #0 /* USER CODE BEGIN 4 */ return (USBD_OK); 800adc0: 2300 movs r3, #0 /* USER CODE END 4 */ } 800adc2: 4618 mov r0, r3 800adc4: 46bd mov sp, r7 800adc6: bc80 pop {r7} 800adc8: 4770 bx lr ... 0800adcc : * @param pbuf: Buffer containing command data (request parameters) * @param length: Number of data to be sent (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length) { 800adcc: b480 push {r7} 800adce: b083 sub sp, #12 800add0: af00 add r7, sp, #0 800add2: 4603 mov r3, r0 800add4: 6039 str r1, [r7, #0] 800add6: 71fb strb r3, [r7, #7] 800add8: 4613 mov r3, r2 800adda: 80bb strh r3, [r7, #4] /* USER CODE BEGIN 5 */ switch(cmd) 800addc: 79fb ldrb r3, [r7, #7] 800adde: 2b23 cmp r3, #35 @ 0x23 800ade0: d84a bhi.n 800ae78 800ade2: a201 add r2, pc, #4 @ (adr r2, 800ade8 ) 800ade4: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800ade8: 0800ae79 .word 0x0800ae79 800adec: 0800ae79 .word 0x0800ae79 800adf0: 0800ae79 .word 0x0800ae79 800adf4: 0800ae79 .word 0x0800ae79 800adf8: 0800ae79 .word 0x0800ae79 800adfc: 0800ae79 .word 0x0800ae79 800ae00: 0800ae79 .word 0x0800ae79 800ae04: 0800ae79 .word 0x0800ae79 800ae08: 0800ae79 .word 0x0800ae79 800ae0c: 0800ae79 .word 0x0800ae79 800ae10: 0800ae79 .word 0x0800ae79 800ae14: 0800ae79 .word 0x0800ae79 800ae18: 0800ae79 .word 0x0800ae79 800ae1c: 0800ae79 .word 0x0800ae79 800ae20: 0800ae79 .word 0x0800ae79 800ae24: 0800ae79 .word 0x0800ae79 800ae28: 0800ae79 .word 0x0800ae79 800ae2c: 0800ae79 .word 0x0800ae79 800ae30: 0800ae79 .word 0x0800ae79 800ae34: 0800ae79 .word 0x0800ae79 800ae38: 0800ae79 .word 0x0800ae79 800ae3c: 0800ae79 .word 0x0800ae79 800ae40: 0800ae79 .word 0x0800ae79 800ae44: 0800ae79 .word 0x0800ae79 800ae48: 0800ae79 .word 0x0800ae79 800ae4c: 0800ae79 .word 0x0800ae79 800ae50: 0800ae79 .word 0x0800ae79 800ae54: 0800ae79 .word 0x0800ae79 800ae58: 0800ae79 .word 0x0800ae79 800ae5c: 0800ae79 .word 0x0800ae79 800ae60: 0800ae79 .word 0x0800ae79 800ae64: 0800ae79 .word 0x0800ae79 800ae68: 0800ae79 .word 0x0800ae79 800ae6c: 0800ae79 .word 0x0800ae79 800ae70: 0800ae79 .word 0x0800ae79 800ae74: 0800ae79 .word 0x0800ae79 case CDC_SEND_BREAK: break; default: break; 800ae78: bf00 nop } return (USBD_OK); 800ae7a: 2300 movs r3, #0 /* USER CODE END 5 */ } 800ae7c: 4618 mov r0, r3 800ae7e: 370c adds r7, #12 800ae80: 46bd mov sp, r7 800ae82: bc80 pop {r7} 800ae84: 4770 bx lr 800ae86: bf00 nop 0800ae88 : * @param Buf: Buffer of data to be received * @param Len: Number of data received (in bytes) * @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL */ static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len) { 800ae88: b580 push {r7, lr} 800ae8a: b082 sub sp, #8 800ae8c: af00 add r7, sp, #0 800ae8e: 6078 str r0, [r7, #4] 800ae90: 6039 str r1, [r7, #0] /* USER CODE BEGIN 6 */ if (*Len) fifo_push(Buf, *Len); 800ae92: 683b ldr r3, [r7, #0] 800ae94: 681b ldr r3, [r3, #0] 800ae96: 2b00 cmp r3, #0 800ae98: d005 beq.n 800aea6 800ae9a: 683b ldr r3, [r7, #0] 800ae9c: 681b ldr r3, [r3, #0] 800ae9e: 4619 mov r1, r3 800aea0: 6878 ldr r0, [r7, #4] 800aea2: f7ff ff03 bl 800acac USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]); 800aea6: 6879 ldr r1, [r7, #4] 800aea8: 4805 ldr r0, [pc, #20] @ (800aec0 ) 800aeaa: f7fe fdcc bl 8009a46 USBD_CDC_ReceivePacket(&hUsbDeviceFS); 800aeae: 4804 ldr r0, [pc, #16] @ (800aec0 ) 800aeb0: f7fe fe0b bl 8009aca return (USBD_OK); 800aeb4: 2300 movs r3, #0 /* USER CODE END 6 */ } 800aeb6: 4618 mov r0, r3 800aeb8: 3708 adds r7, #8 800aeba: 46bd mov sp, r7 800aebc: bd80 pop {r7, pc} 800aebe: bf00 nop 800aec0: 20000414 .word 0x20000414 0800aec4 : * @param Buf: Buffer of data to be sent * @param Len: Number of data to be sent (in bytes) * @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY */ uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len) { 800aec4: b580 push {r7, lr} 800aec6: b084 sub sp, #16 800aec8: af00 add r7, sp, #0 800aeca: 6078 str r0, [r7, #4] 800aecc: 460b mov r3, r1 800aece: 807b strh r3, [r7, #2] uint8_t result = USBD_OK; 800aed0: 2300 movs r3, #0 800aed2: 73fb strb r3, [r7, #15] /* USER CODE BEGIN 7 */ USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData; 800aed4: 4b0d ldr r3, [pc, #52] @ (800af0c ) 800aed6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800aeda: 60bb str r3, [r7, #8] if (hcdc->TxState != 0){ 800aedc: 68bb ldr r3, [r7, #8] 800aede: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214 800aee2: 2b00 cmp r3, #0 800aee4: d001 beq.n 800aeea return USBD_BUSY; 800aee6: 2301 movs r3, #1 800aee8: e00b b.n 800af02 } USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len); 800aeea: 887b ldrh r3, [r7, #2] 800aeec: 461a mov r2, r3 800aeee: 6879 ldr r1, [r7, #4] 800aef0: 4806 ldr r0, [pc, #24] @ (800af0c ) 800aef2: f7fe fd8f bl 8009a14 result = USBD_CDC_TransmitPacket(&hUsbDeviceFS); 800aef6: 4805 ldr r0, [pc, #20] @ (800af0c ) 800aef8: f7fe fdb8 bl 8009a6c 800aefc: 4603 mov r3, r0 800aefe: 73fb strb r3, [r7, #15] /* USER CODE END 7 */ return result; 800af00: 7bfb ldrb r3, [r7, #15] } 800af02: 4618 mov r0, r3 800af04: 3710 adds r7, #16 800af06: 46bd mov sp, r7 800af08: bd80 pop {r7, pc} 800af0a: bf00 nop 800af0c: 20000414 .word 0x20000414 0800af10 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800af10: b480 push {r7} 800af12: b083 sub sp, #12 800af14: af00 add r7, sp, #0 800af16: 4603 mov r3, r0 800af18: 6039 str r1, [r7, #0] 800af1a: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_DeviceDesc); 800af1c: 683b ldr r3, [r7, #0] 800af1e: 2212 movs r2, #18 800af20: 801a strh r2, [r3, #0] return USBD_FS_DeviceDesc; 800af22: 4b03 ldr r3, [pc, #12] @ (800af30 ) } 800af24: 4618 mov r0, r3 800af26: 370c adds r7, #12 800af28: 46bd mov sp, r7 800af2a: bc80 pop {r7} 800af2c: 4770 bx lr 800af2e: bf00 nop 800af30: 2000014c .word 0x2000014c 0800af34 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800af34: b480 push {r7} 800af36: b083 sub sp, #12 800af38: af00 add r7, sp, #0 800af3a: 4603 mov r3, r0 800af3c: 6039 str r1, [r7, #0] 800af3e: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_LangIDDesc); 800af40: 683b ldr r3, [r7, #0] 800af42: 2204 movs r2, #4 800af44: 801a strh r2, [r3, #0] return USBD_LangIDDesc; 800af46: 4b03 ldr r3, [pc, #12] @ (800af54 ) } 800af48: 4618 mov r0, r3 800af4a: 370c adds r7, #12 800af4c: 46bd mov sp, r7 800af4e: bc80 pop {r7} 800af50: 4770 bx lr 800af52: bf00 nop 800af54: 20000160 .word 0x20000160 0800af58 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800af58: b580 push {r7, lr} 800af5a: b082 sub sp, #8 800af5c: af00 add r7, sp, #0 800af5e: 4603 mov r3, r0 800af60: 6039 str r1, [r7, #0] 800af62: 71fb strb r3, [r7, #7] if(speed == 0) 800af64: 79fb ldrb r3, [r7, #7] 800af66: 2b00 cmp r3, #0 800af68: d105 bne.n 800af76 { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800af6a: 683a ldr r2, [r7, #0] 800af6c: 4907 ldr r1, [pc, #28] @ (800af8c ) 800af6e: 4808 ldr r0, [pc, #32] @ (800af90 ) 800af70: f7ff fd8f bl 800aa92 800af74: e004 b.n 800af80 } else { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 800af76: 683a ldr r2, [r7, #0] 800af78: 4904 ldr r1, [pc, #16] @ (800af8c ) 800af7a: 4805 ldr r0, [pc, #20] @ (800af90 ) 800af7c: f7ff fd89 bl 800aa92 } return USBD_StrDesc; 800af80: 4b02 ldr r3, [pc, #8] @ (800af8c ) } 800af82: 4618 mov r0, r3 800af84: 3708 adds r7, #8 800af86: 46bd mov sp, r7 800af88: bd80 pop {r7, pc} 800af8a: bf00 nop 800af8c: 20000fdc .word 0x20000fdc 800af90: 0800c1dc .word 0x0800c1dc 0800af94 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800af94: b580 push {r7, lr} 800af96: b082 sub sp, #8 800af98: af00 add r7, sp, #0 800af9a: 4603 mov r3, r0 800af9c: 6039 str r1, [r7, #0] 800af9e: 71fb strb r3, [r7, #7] UNUSED(speed); USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 800afa0: 683a ldr r2, [r7, #0] 800afa2: 4904 ldr r1, [pc, #16] @ (800afb4 ) 800afa4: 4804 ldr r0, [pc, #16] @ (800afb8 ) 800afa6: f7ff fd74 bl 800aa92 return USBD_StrDesc; 800afaa: 4b02 ldr r3, [pc, #8] @ (800afb4 ) } 800afac: 4618 mov r0, r3 800afae: 3708 adds r7, #8 800afb0: 46bd mov sp, r7 800afb2: bd80 pop {r7, pc} 800afb4: 20000fdc .word 0x20000fdc 800afb8: 0800c1f4 .word 0x0800c1f4 0800afbc : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800afbc: b580 push {r7, lr} 800afbe: b082 sub sp, #8 800afc0: af00 add r7, sp, #0 800afc2: 4603 mov r3, r0 800afc4: 6039 str r1, [r7, #0] 800afc6: 71fb strb r3, [r7, #7] UNUSED(speed); *length = USB_SIZ_STRING_SERIAL; 800afc8: 683b ldr r3, [r7, #0] 800afca: 221a movs r2, #26 800afcc: 801a strh r2, [r3, #0] /* Update the serial number string descriptor with the data from the unique * ID */ Get_SerialNum(); 800afce: f000 f843 bl 800b058 /* USER CODE BEGIN USBD_FS_SerialStrDescriptor */ /* USER CODE END USBD_FS_SerialStrDescriptor */ return (uint8_t *) USBD_StringSerial; 800afd2: 4b02 ldr r3, [pc, #8] @ (800afdc ) } 800afd4: 4618 mov r0, r3 800afd6: 3708 adds r7, #8 800afd8: 46bd mov sp, r7 800afda: bd80 pop {r7, pc} 800afdc: 20000164 .word 0x20000164 0800afe0 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800afe0: b580 push {r7, lr} 800afe2: b082 sub sp, #8 800afe4: af00 add r7, sp, #0 800afe6: 4603 mov r3, r0 800afe8: 6039 str r1, [r7, #0] 800afea: 71fb strb r3, [r7, #7] if(speed == USBD_SPEED_HIGH) 800afec: 79fb ldrb r3, [r7, #7] 800afee: 2b00 cmp r3, #0 800aff0: d105 bne.n 800affe { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800aff2: 683a ldr r2, [r7, #0] 800aff4: 4907 ldr r1, [pc, #28] @ (800b014 ) 800aff6: 4808 ldr r0, [pc, #32] @ (800b018 ) 800aff8: f7ff fd4b bl 800aa92 800affc: e004 b.n 800b008 } else { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800affe: 683a ldr r2, [r7, #0] 800b000: 4904 ldr r1, [pc, #16] @ (800b014 ) 800b002: 4805 ldr r0, [pc, #20] @ (800b018 ) 800b004: f7ff fd45 bl 800aa92 } return USBD_StrDesc; 800b008: 4b02 ldr r3, [pc, #8] @ (800b014 ) } 800b00a: 4618 mov r0, r3 800b00c: 3708 adds r7, #8 800b00e: 46bd mov sp, r7 800b010: bd80 pop {r7, pc} 800b012: bf00 nop 800b014: 20000fdc .word 0x20000fdc 800b018: 0800c208 .word 0x0800c208 0800b01c : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800b01c: b580 push {r7, lr} 800b01e: b082 sub sp, #8 800b020: af00 add r7, sp, #0 800b022: 4603 mov r3, r0 800b024: 6039 str r1, [r7, #0] 800b026: 71fb strb r3, [r7, #7] if(speed == 0) 800b028: 79fb ldrb r3, [r7, #7] 800b02a: 2b00 cmp r3, #0 800b02c: d105 bne.n 800b03a { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800b02e: 683a ldr r2, [r7, #0] 800b030: 4907 ldr r1, [pc, #28] @ (800b050 ) 800b032: 4808 ldr r0, [pc, #32] @ (800b054 ) 800b034: f7ff fd2d bl 800aa92 800b038: e004 b.n 800b044 } else { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 800b03a: 683a ldr r2, [r7, #0] 800b03c: 4904 ldr r1, [pc, #16] @ (800b050 ) 800b03e: 4805 ldr r0, [pc, #20] @ (800b054 ) 800b040: f7ff fd27 bl 800aa92 } return USBD_StrDesc; 800b044: 4b02 ldr r3, [pc, #8] @ (800b050 ) } 800b046: 4618 mov r0, r3 800b048: 3708 adds r7, #8 800b04a: 46bd mov sp, r7 800b04c: bd80 pop {r7, pc} 800b04e: bf00 nop 800b050: 20000fdc .word 0x20000fdc 800b054: 0800c214 .word 0x0800c214 0800b058 : * @brief Create the serial number string descriptor * @param None * @retval None */ static void Get_SerialNum(void) { 800b058: b580 push {r7, lr} 800b05a: b084 sub sp, #16 800b05c: af00 add r7, sp, #0 uint32_t deviceserial0; uint32_t deviceserial1; uint32_t deviceserial2; deviceserial0 = *(uint32_t *) DEVICE_ID1; 800b05e: 4b0f ldr r3, [pc, #60] @ (800b09c ) 800b060: 681b ldr r3, [r3, #0] 800b062: 60fb str r3, [r7, #12] deviceserial1 = *(uint32_t *) DEVICE_ID2; 800b064: 4b0e ldr r3, [pc, #56] @ (800b0a0 ) 800b066: 681b ldr r3, [r3, #0] 800b068: 60bb str r3, [r7, #8] deviceserial2 = *(uint32_t *) DEVICE_ID3; 800b06a: 4b0e ldr r3, [pc, #56] @ (800b0a4 ) 800b06c: 681b ldr r3, [r3, #0] 800b06e: 607b str r3, [r7, #4] deviceserial0 += deviceserial2; 800b070: 68fa ldr r2, [r7, #12] 800b072: 687b ldr r3, [r7, #4] 800b074: 4413 add r3, r2 800b076: 60fb str r3, [r7, #12] if (deviceserial0 != 0) 800b078: 68fb ldr r3, [r7, #12] 800b07a: 2b00 cmp r3, #0 800b07c: d009 beq.n 800b092 { IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8); 800b07e: 2208 movs r2, #8 800b080: 4909 ldr r1, [pc, #36] @ (800b0a8 ) 800b082: 68f8 ldr r0, [r7, #12] 800b084: f000 f814 bl 800b0b0 IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4); 800b088: 2204 movs r2, #4 800b08a: 4908 ldr r1, [pc, #32] @ (800b0ac ) 800b08c: 68b8 ldr r0, [r7, #8] 800b08e: f000 f80f bl 800b0b0 } } 800b092: bf00 nop 800b094: 3710 adds r7, #16 800b096: 46bd mov sp, r7 800b098: bd80 pop {r7, pc} 800b09a: bf00 nop 800b09c: 1ffff7e8 .word 0x1ffff7e8 800b0a0: 1ffff7ec .word 0x1ffff7ec 800b0a4: 1ffff7f0 .word 0x1ffff7f0 800b0a8: 20000166 .word 0x20000166 800b0ac: 20000176 .word 0x20000176 0800b0b0 : * @param pbuf: pointer to the buffer * @param len: buffer length * @retval None */ static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len) { 800b0b0: b480 push {r7} 800b0b2: b087 sub sp, #28 800b0b4: af00 add r7, sp, #0 800b0b6: 60f8 str r0, [r7, #12] 800b0b8: 60b9 str r1, [r7, #8] 800b0ba: 4613 mov r3, r2 800b0bc: 71fb strb r3, [r7, #7] uint8_t idx = 0; 800b0be: 2300 movs r3, #0 800b0c0: 75fb strb r3, [r7, #23] for (idx = 0; idx < len; idx++) 800b0c2: 2300 movs r3, #0 800b0c4: 75fb strb r3, [r7, #23] 800b0c6: e027 b.n 800b118 { if (((value >> 28)) < 0xA) 800b0c8: 68fb ldr r3, [r7, #12] 800b0ca: 0f1b lsrs r3, r3, #28 800b0cc: 2b09 cmp r3, #9 800b0ce: d80b bhi.n 800b0e8 { pbuf[2 * idx] = (value >> 28) + '0'; 800b0d0: 68fb ldr r3, [r7, #12] 800b0d2: 0f1b lsrs r3, r3, #28 800b0d4: b2da uxtb r2, r3 800b0d6: 7dfb ldrb r3, [r7, #23] 800b0d8: 005b lsls r3, r3, #1 800b0da: 4619 mov r1, r3 800b0dc: 68bb ldr r3, [r7, #8] 800b0de: 440b add r3, r1 800b0e0: 3230 adds r2, #48 @ 0x30 800b0e2: b2d2 uxtb r2, r2 800b0e4: 701a strb r2, [r3, #0] 800b0e6: e00a b.n 800b0fe } else { pbuf[2 * idx] = (value >> 28) + 'A' - 10; 800b0e8: 68fb ldr r3, [r7, #12] 800b0ea: 0f1b lsrs r3, r3, #28 800b0ec: b2da uxtb r2, r3 800b0ee: 7dfb ldrb r3, [r7, #23] 800b0f0: 005b lsls r3, r3, #1 800b0f2: 4619 mov r1, r3 800b0f4: 68bb ldr r3, [r7, #8] 800b0f6: 440b add r3, r1 800b0f8: 3237 adds r2, #55 @ 0x37 800b0fa: b2d2 uxtb r2, r2 800b0fc: 701a strb r2, [r3, #0] } value = value << 4; 800b0fe: 68fb ldr r3, [r7, #12] 800b100: 011b lsls r3, r3, #4 800b102: 60fb str r3, [r7, #12] pbuf[2 * idx + 1] = 0; 800b104: 7dfb ldrb r3, [r7, #23] 800b106: 005b lsls r3, r3, #1 800b108: 3301 adds r3, #1 800b10a: 68ba ldr r2, [r7, #8] 800b10c: 4413 add r3, r2 800b10e: 2200 movs r2, #0 800b110: 701a strb r2, [r3, #0] for (idx = 0; idx < len; idx++) 800b112: 7dfb ldrb r3, [r7, #23] 800b114: 3301 adds r3, #1 800b116: 75fb strb r3, [r7, #23] 800b118: 7dfa ldrb r2, [r7, #23] 800b11a: 79fb ldrb r3, [r7, #7] 800b11c: 429a cmp r2, r3 800b11e: d3d3 bcc.n 800b0c8 } } 800b120: bf00 nop 800b122: bf00 nop 800b124: 371c adds r7, #28 800b126: 46bd mov sp, r7 800b128: bc80 pop {r7} 800b12a: 4770 bx lr 0800b12c : LL Driver Callbacks (PCD -> USB Device Library) *******************************************************************************/ /* MSP Init */ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) { 800b12c: b580 push {r7, lr} 800b12e: b084 sub sp, #16 800b130: af00 add r7, sp, #0 800b132: 6078 str r0, [r7, #4] if(pcdHandle->Instance==USB) 800b134: 687b ldr r3, [r7, #4] 800b136: 681b ldr r3, [r3, #0] 800b138: 4a0d ldr r2, [pc, #52] @ (800b170 ) 800b13a: 4293 cmp r3, r2 800b13c: d113 bne.n 800b166 { /* USER CODE BEGIN USB_MspInit 0 */ /* USER CODE END USB_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USB_CLK_ENABLE(); 800b13e: 4b0d ldr r3, [pc, #52] @ (800b174 ) 800b140: 69db ldr r3, [r3, #28] 800b142: 4a0c ldr r2, [pc, #48] @ (800b174 ) 800b144: f443 0300 orr.w r3, r3, #8388608 @ 0x800000 800b148: 61d3 str r3, [r2, #28] 800b14a: 4b0a ldr r3, [pc, #40] @ (800b174 ) 800b14c: 69db ldr r3, [r3, #28] 800b14e: f403 0300 and.w r3, r3, #8388608 @ 0x800000 800b152: 60fb str r3, [r7, #12] 800b154: 68fb ldr r3, [r7, #12] /* Peripheral interrupt init */ HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0); 800b156: 2200 movs r2, #0 800b158: 2100 movs r1, #0 800b15a: 2014 movs r0, #20 800b15c: f7f7 ff09 bl 8002f72 HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn); 800b160: 2014 movs r0, #20 800b162: f7f7 ff22 bl 8002faa /* USER CODE BEGIN USB_MspInit 1 */ /* USER CODE END USB_MspInit 1 */ } } 800b166: bf00 nop 800b168: 3710 adds r7, #16 800b16a: 46bd mov sp, r7 800b16c: bd80 pop {r7, pc} 800b16e: bf00 nop 800b170: 40005c00 .word 0x40005c00 800b174: 40021000 .word 0x40021000 0800b178 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b178: b580 push {r7, lr} 800b17a: b082 sub sp, #8 800b17c: af00 add r7, sp, #0 800b17e: 6078 str r0, [r7, #4] USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); 800b180: 687b ldr r3, [r7, #4] 800b182: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800b186: 687b ldr r3, [r7, #4] 800b188: f503 7326 add.w r3, r3, #664 @ 0x298 800b18c: 4619 mov r1, r3 800b18e: 4610 mov r0, r2 800b190: f7fe fd51 bl 8009c36 } 800b194: bf00 nop 800b196: 3708 adds r7, #8 800b198: 46bd mov sp, r7 800b19a: bd80 pop {r7, pc} 0800b19c : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b19c: b580 push {r7, lr} 800b19e: b082 sub sp, #8 800b1a0: af00 add r7, sp, #0 800b1a2: 6078 str r0, [r7, #4] 800b1a4: 460b mov r3, r1 800b1a6: 70fb strb r3, [r7, #3] USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); 800b1a8: 687b ldr r3, [r7, #4] 800b1aa: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800b1ae: 78fa ldrb r2, [r7, #3] 800b1b0: 6879 ldr r1, [r7, #4] 800b1b2: 4613 mov r3, r2 800b1b4: 009b lsls r3, r3, #2 800b1b6: 4413 add r3, r2 800b1b8: 00db lsls r3, r3, #3 800b1ba: 440b add r3, r1 800b1bc: f503 73b2 add.w r3, r3, #356 @ 0x164 800b1c0: 681a ldr r2, [r3, #0] 800b1c2: 78fb ldrb r3, [r7, #3] 800b1c4: 4619 mov r1, r3 800b1c6: f7fe fd83 bl 8009cd0 } 800b1ca: bf00 nop 800b1cc: 3708 adds r7, #8 800b1ce: 46bd mov sp, r7 800b1d0: bd80 pop {r7, pc} 0800b1d2 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b1d2: b580 push {r7, lr} 800b1d4: b082 sub sp, #8 800b1d6: af00 add r7, sp, #0 800b1d8: 6078 str r0, [r7, #4] 800b1da: 460b mov r3, r1 800b1dc: 70fb strb r3, [r7, #3] USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); 800b1de: 687b ldr r3, [r7, #4] 800b1e0: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4 800b1e4: 78fa ldrb r2, [r7, #3] 800b1e6: 6879 ldr r1, [r7, #4] 800b1e8: 4613 mov r3, r2 800b1ea: 009b lsls r3, r3, #2 800b1ec: 4413 add r3, r2 800b1ee: 00db lsls r3, r3, #3 800b1f0: 440b add r3, r1 800b1f2: 3324 adds r3, #36 @ 0x24 800b1f4: 681a ldr r2, [r3, #0] 800b1f6: 78fb ldrb r3, [r7, #3] 800b1f8: 4619 mov r1, r3 800b1fa: f7fe fdda bl 8009db2 } 800b1fe: bf00 nop 800b200: 3708 adds r7, #8 800b202: 46bd mov sp, r7 800b204: bd80 pop {r7, pc} 0800b206 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b206: b580 push {r7, lr} 800b208: b082 sub sp, #8 800b20a: af00 add r7, sp, #0 800b20c: 6078 str r0, [r7, #4] USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); 800b20e: 687b ldr r3, [r7, #4] 800b210: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800b214: 4618 mov r0, r3 800b216: f7fe feea bl 8009fee } 800b21a: bf00 nop 800b21c: 3708 adds r7, #8 800b21e: 46bd mov sp, r7 800b220: bd80 pop {r7, pc} 0800b222 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b222: b580 push {r7, lr} 800b224: b084 sub sp, #16 800b226: af00 add r7, sp, #0 800b228: 6078 str r0, [r7, #4] USBD_SpeedTypeDef speed = USBD_SPEED_FULL; 800b22a: 2301 movs r3, #1 800b22c: 73fb strb r3, [r7, #15] if ( hpcd->Init.speed != PCD_SPEED_FULL) 800b22e: 687b ldr r3, [r7, #4] 800b230: 799b ldrb r3, [r3, #6] 800b232: 2b02 cmp r3, #2 800b234: d001 beq.n 800b23a { Error_Handler(); 800b236: f7f6 fd83 bl 8001d40 } /* Set Speed. */ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); 800b23a: 687b ldr r3, [r7, #4] 800b23c: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800b240: 7bfa ldrb r2, [r7, #15] 800b242: 4611 mov r1, r2 800b244: 4618 mov r0, r3 800b246: f7fe fe9a bl 8009f7e /* Reset Device. */ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); 800b24a: 687b ldr r3, [r7, #4] 800b24c: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800b250: 4618 mov r0, r3 800b252: f7fe fe53 bl 8009efc } 800b256: bf00 nop 800b258: 3710 adds r7, #16 800b25a: 46bd mov sp, r7 800b25c: bd80 pop {r7, pc} ... 0800b260 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b260: b580 push {r7, lr} 800b262: b082 sub sp, #8 800b264: af00 add r7, sp, #0 800b266: 6078 str r0, [r7, #4] /* Inform USB library that core enters in suspend Mode. */ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); 800b268: 687b ldr r3, [r7, #4] 800b26a: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800b26e: 4618 mov r0, r3 800b270: f7fe fe94 bl 8009f9c /* Enter in STOP mode. */ /* USER CODE BEGIN 2 */ if (hpcd->Init.low_power_enable) 800b274: 687b ldr r3, [r7, #4] 800b276: 7a9b ldrb r3, [r3, #10] 800b278: 2b00 cmp r3, #0 800b27a: d005 beq.n 800b288 { /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 800b27c: 4b04 ldr r3, [pc, #16] @ (800b290 ) 800b27e: 691b ldr r3, [r3, #16] 800b280: 4a03 ldr r2, [pc, #12] @ (800b290 ) 800b282: f043 0306 orr.w r3, r3, #6 800b286: 6113 str r3, [r2, #16] } /* USER CODE END 2 */ } 800b288: bf00 nop 800b28a: 3708 adds r7, #8 800b28c: 46bd mov sp, r7 800b28e: bd80 pop {r7, pc} 800b290: e000ed00 .word 0xe000ed00 0800b294 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b294: b580 push {r7, lr} 800b296: b082 sub sp, #8 800b298: af00 add r7, sp, #0 800b29a: 6078 str r0, [r7, #4] /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); 800b29c: 687b ldr r3, [r7, #4] 800b29e: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4 800b2a2: 4618 mov r0, r3 800b2a4: f7fe fe8e bl 8009fc4 } 800b2a8: bf00 nop 800b2aa: 3708 adds r7, #8 800b2ac: 46bd mov sp, r7 800b2ae: bd80 pop {r7, pc} 0800b2b0 : * @brief Initializes the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) { 800b2b0: b580 push {r7, lr} 800b2b2: b082 sub sp, #8 800b2b4: af00 add r7, sp, #0 800b2b6: 6078 str r0, [r7, #4] /* Init USB Ip. */ /* Link the driver to the stack. */ hpcd_USB_FS.pData = pdev; 800b2b8: 4a28 ldr r2, [pc, #160] @ (800b35c ) 800b2ba: 687b ldr r3, [r7, #4] 800b2bc: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4 pdev->pData = &hpcd_USB_FS; 800b2c0: 687b ldr r3, [r7, #4] 800b2c2: 4a26 ldr r2, [pc, #152] @ (800b35c ) 800b2c4: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0 hpcd_USB_FS.Instance = USB; 800b2c8: 4b24 ldr r3, [pc, #144] @ (800b35c ) 800b2ca: 4a25 ldr r2, [pc, #148] @ (800b360 ) 800b2cc: 601a str r2, [r3, #0] hpcd_USB_FS.Init.dev_endpoints = 8; 800b2ce: 4b23 ldr r3, [pc, #140] @ (800b35c ) 800b2d0: 2208 movs r2, #8 800b2d2: 711a strb r2, [r3, #4] hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; 800b2d4: 4b21 ldr r3, [pc, #132] @ (800b35c ) 800b2d6: 2202 movs r2, #2 800b2d8: 719a strb r2, [r3, #6] hpcd_USB_FS.Init.low_power_enable = DISABLE; 800b2da: 4b20 ldr r3, [pc, #128] @ (800b35c ) 800b2dc: 2200 movs r2, #0 800b2de: 729a strb r2, [r3, #10] hpcd_USB_FS.Init.lpm_enable = DISABLE; 800b2e0: 4b1e ldr r3, [pc, #120] @ (800b35c ) 800b2e2: 2200 movs r2, #0 800b2e4: 72da strb r2, [r3, #11] hpcd_USB_FS.Init.battery_charging_enable = DISABLE; 800b2e6: 4b1d ldr r3, [pc, #116] @ (800b35c ) 800b2e8: 2200 movs r2, #0 800b2ea: 731a strb r2, [r3, #12] if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) 800b2ec: 481b ldr r0, [pc, #108] @ (800b35c ) 800b2ee: f7f8 fc37 bl 8003b60 800b2f2: 4603 mov r3, r0 800b2f4: 2b00 cmp r3, #0 800b2f6: d001 beq.n 800b2fc { Error_Handler( ); 800b2f8: f7f6 fd22 bl 8001d40 HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback); HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback); HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ /* USER CODE BEGIN EndPoint_Configuration */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18); 800b2fc: 687b ldr r3, [r7, #4] 800b2fe: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b302: 2318 movs r3, #24 800b304: 2200 movs r2, #0 800b306: 2100 movs r1, #0 800b308: f7fa f948 bl 800559c HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58); 800b30c: 687b ldr r3, [r7, #4] 800b30e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b312: 2358 movs r3, #88 @ 0x58 800b314: 2200 movs r2, #0 800b316: 2180 movs r1, #128 @ 0x80 800b318: f7fa f940 bl 800559c /* USER CODE END EndPoint_Configuration */ /* USER CODE BEGIN EndPoint_Configuration_CDC */ HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0); 800b31c: 687b ldr r3, [r7, #4] 800b31e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b322: 23c0 movs r3, #192 @ 0xc0 800b324: 2200 movs r2, #0 800b326: 2181 movs r1, #129 @ 0x81 800b328: f7fa f938 bl 800559c HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110); 800b32c: 687b ldr r3, [r7, #4] 800b32e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b332: f44f 7388 mov.w r3, #272 @ 0x110 800b336: 2200 movs r2, #0 800b338: 2101 movs r1, #1 800b33a: f7fa f92f bl 800559c HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100); 800b33e: 687b ldr r3, [r7, #4] 800b340: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b344: f44f 7380 mov.w r3, #256 @ 0x100 800b348: 2200 movs r2, #0 800b34a: 2182 movs r1, #130 @ 0x82 800b34c: f7fa f926 bl 800559c /* USER CODE END EndPoint_Configuration_CDC */ return USBD_OK; 800b350: 2300 movs r3, #0 } 800b352: 4618 mov r0, r3 800b354: 3708 adds r7, #8 800b356: 46bd mov sp, r7 800b358: bd80 pop {r7, pc} 800b35a: bf00 nop 800b35c: 200011dc .word 0x200011dc 800b360: 40005c00 .word 0x40005c00 0800b364 : * @brief Starts the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) { 800b364: b580 push {r7, lr} 800b366: b084 sub sp, #16 800b368: af00 add r7, sp, #0 800b36a: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_status = HAL_OK; 800b36c: 2300 movs r3, #0 800b36e: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800b370: 2300 movs r3, #0 800b372: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_Start(pdev->pData); 800b374: 687b ldr r3, [r7, #4] 800b376: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b37a: 4618 mov r0, r3 800b37c: f7f8 fce6 bl 8003d4c 800b380: 4603 mov r3, r0 800b382: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b384: 7bfb ldrb r3, [r7, #15] 800b386: 4618 mov r0, r3 800b388: f000 f94e bl 800b628 800b38c: 4603 mov r3, r0 800b38e: 73bb strb r3, [r7, #14] return usb_status; 800b390: 7bbb ldrb r3, [r7, #14] } 800b392: 4618 mov r0, r3 800b394: 3710 adds r7, #16 800b396: 46bd mov sp, r7 800b398: bd80 pop {r7, pc} 0800b39a : * @param ep_type: Endpoint type * @param ep_mps: Endpoint max packet size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) { 800b39a: b580 push {r7, lr} 800b39c: b084 sub sp, #16 800b39e: af00 add r7, sp, #0 800b3a0: 6078 str r0, [r7, #4] 800b3a2: 4608 mov r0, r1 800b3a4: 4611 mov r1, r2 800b3a6: 461a mov r2, r3 800b3a8: 4603 mov r3, r0 800b3aa: 70fb strb r3, [r7, #3] 800b3ac: 460b mov r3, r1 800b3ae: 70bb strb r3, [r7, #2] 800b3b0: 4613 mov r3, r2 800b3b2: 803b strh r3, [r7, #0] HAL_StatusTypeDef hal_status = HAL_OK; 800b3b4: 2300 movs r3, #0 800b3b6: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800b3b8: 2300 movs r3, #0 800b3ba: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); 800b3bc: 687b ldr r3, [r7, #4] 800b3be: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b3c2: 78bb ldrb r3, [r7, #2] 800b3c4: 883a ldrh r2, [r7, #0] 800b3c6: 78f9 ldrb r1, [r7, #3] 800b3c8: f7f8 fe3a bl 8004040 800b3cc: 4603 mov r3, r0 800b3ce: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b3d0: 7bfb ldrb r3, [r7, #15] 800b3d2: 4618 mov r0, r3 800b3d4: f000 f928 bl 800b628 800b3d8: 4603 mov r3, r0 800b3da: 73bb strb r3, [r7, #14] return usb_status; 800b3dc: 7bbb ldrb r3, [r7, #14] } 800b3de: 4618 mov r0, r3 800b3e0: 3710 adds r7, #16 800b3e2: 46bd mov sp, r7 800b3e4: bd80 pop {r7, pc} 0800b3e6 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800b3e6: b580 push {r7, lr} 800b3e8: b084 sub sp, #16 800b3ea: af00 add r7, sp, #0 800b3ec: 6078 str r0, [r7, #4] 800b3ee: 460b mov r3, r1 800b3f0: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800b3f2: 2300 movs r3, #0 800b3f4: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800b3f6: 2300 movs r3, #0 800b3f8: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); 800b3fa: 687b ldr r3, [r7, #4] 800b3fc: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b400: 78fa ldrb r2, [r7, #3] 800b402: 4611 mov r1, r2 800b404: 4618 mov r0, r3 800b406: f7f8 fe78 bl 80040fa 800b40a: 4603 mov r3, r0 800b40c: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b40e: 7bfb ldrb r3, [r7, #15] 800b410: 4618 mov r0, r3 800b412: f000 f909 bl 800b628 800b416: 4603 mov r3, r0 800b418: 73bb strb r3, [r7, #14] return usb_status; 800b41a: 7bbb ldrb r3, [r7, #14] } 800b41c: 4618 mov r0, r3 800b41e: 3710 adds r7, #16 800b420: 46bd mov sp, r7 800b422: bd80 pop {r7, pc} 0800b424 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800b424: b580 push {r7, lr} 800b426: b084 sub sp, #16 800b428: af00 add r7, sp, #0 800b42a: 6078 str r0, [r7, #4] 800b42c: 460b mov r3, r1 800b42e: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800b430: 2300 movs r3, #0 800b432: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800b434: 2300 movs r3, #0 800b436: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); 800b438: 687b ldr r3, [r7, #4] 800b43a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b43e: 78fa ldrb r2, [r7, #3] 800b440: 4611 mov r1, r2 800b442: 4618 mov r0, r3 800b444: f7f8 ff20 bl 8004288 800b448: 4603 mov r3, r0 800b44a: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b44c: 7bfb ldrb r3, [r7, #15] 800b44e: 4618 mov r0, r3 800b450: f000 f8ea bl 800b628 800b454: 4603 mov r3, r0 800b456: 73bb strb r3, [r7, #14] return usb_status; 800b458: 7bbb ldrb r3, [r7, #14] } 800b45a: 4618 mov r0, r3 800b45c: 3710 adds r7, #16 800b45e: 46bd mov sp, r7 800b460: bd80 pop {r7, pc} 0800b462 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800b462: b580 push {r7, lr} 800b464: b084 sub sp, #16 800b466: af00 add r7, sp, #0 800b468: 6078 str r0, [r7, #4] 800b46a: 460b mov r3, r1 800b46c: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800b46e: 2300 movs r3, #0 800b470: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800b472: 2300 movs r3, #0 800b474: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); 800b476: 687b ldr r3, [r7, #4] 800b478: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b47c: 78fa ldrb r2, [r7, #3] 800b47e: 4611 mov r1, r2 800b480: 4618 mov r0, r3 800b482: f7f8 ff61 bl 8004348 800b486: 4603 mov r3, r0 800b488: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b48a: 7bfb ldrb r3, [r7, #15] 800b48c: 4618 mov r0, r3 800b48e: f000 f8cb bl 800b628 800b492: 4603 mov r3, r0 800b494: 73bb strb r3, [r7, #14] return usb_status; 800b496: 7bbb ldrb r3, [r7, #14] } 800b498: 4618 mov r0, r3 800b49a: 3710 adds r7, #16 800b49c: 46bd mov sp, r7 800b49e: bd80 pop {r7, pc} 0800b4a0 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Stall (1: Yes, 0: No) */ uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800b4a0: b480 push {r7} 800b4a2: b085 sub sp, #20 800b4a4: af00 add r7, sp, #0 800b4a6: 6078 str r0, [r7, #4] 800b4a8: 460b mov r3, r1 800b4aa: 70fb strb r3, [r7, #3] PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; 800b4ac: 687b ldr r3, [r7, #4] 800b4ae: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b4b2: 60fb str r3, [r7, #12] if((ep_addr & 0x80) == 0x80) 800b4b4: f997 3003 ldrsb.w r3, [r7, #3] 800b4b8: 2b00 cmp r3, #0 800b4ba: da0b bge.n 800b4d4 { return hpcd->IN_ep[ep_addr & 0x7F].is_stall; 800b4bc: 78fb ldrb r3, [r7, #3] 800b4be: f003 027f and.w r2, r3, #127 @ 0x7f 800b4c2: 68f9 ldr r1, [r7, #12] 800b4c4: 4613 mov r3, r2 800b4c6: 009b lsls r3, r3, #2 800b4c8: 4413 add r3, r2 800b4ca: 00db lsls r3, r3, #3 800b4cc: 440b add r3, r1 800b4ce: 3312 adds r3, #18 800b4d0: 781b ldrb r3, [r3, #0] 800b4d2: e00b b.n 800b4ec } else { return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; 800b4d4: 78fb ldrb r3, [r7, #3] 800b4d6: f003 027f and.w r2, r3, #127 @ 0x7f 800b4da: 68f9 ldr r1, [r7, #12] 800b4dc: 4613 mov r3, r2 800b4de: 009b lsls r3, r3, #2 800b4e0: 4413 add r3, r2 800b4e2: 00db lsls r3, r3, #3 800b4e4: 440b add r3, r1 800b4e6: f503 73a9 add.w r3, r3, #338 @ 0x152 800b4ea: 781b ldrb r3, [r3, #0] } } 800b4ec: 4618 mov r0, r3 800b4ee: 3714 adds r7, #20 800b4f0: 46bd mov sp, r7 800b4f2: bc80 pop {r7} 800b4f4: 4770 bx lr 0800b4f6 : * @param pdev: Device handle * @param dev_addr: Device address * @retval USBD status */ USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) { 800b4f6: b580 push {r7, lr} 800b4f8: b084 sub sp, #16 800b4fa: af00 add r7, sp, #0 800b4fc: 6078 str r0, [r7, #4] 800b4fe: 460b mov r3, r1 800b500: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800b502: 2300 movs r3, #0 800b504: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800b506: 2300 movs r3, #0 800b508: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); 800b50a: 687b ldr r3, [r7, #4] 800b50c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b510: 78fa ldrb r2, [r7, #3] 800b512: 4611 mov r1, r2 800b514: 4618 mov r0, r3 800b516: f7f8 fd6f bl 8003ff8 800b51a: 4603 mov r3, r0 800b51c: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800b51e: 7bfb ldrb r3, [r7, #15] 800b520: 4618 mov r0, r3 800b522: f000 f881 bl 800b628 800b526: 4603 mov r3, r0 800b528: 73bb strb r3, [r7, #14] return usb_status; 800b52a: 7bbb ldrb r3, [r7, #14] } 800b52c: 4618 mov r0, r3 800b52e: 3710 adds r7, #16 800b530: 46bd mov sp, r7 800b532: bd80 pop {r7, pc} 0800b534 : * @param pbuf: Pointer to data to be sent * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800b534: b580 push {r7, lr} 800b536: b086 sub sp, #24 800b538: af00 add r7, sp, #0 800b53a: 60f8 str r0, [r7, #12] 800b53c: 607a str r2, [r7, #4] 800b53e: 461a mov r2, r3 800b540: 460b mov r3, r1 800b542: 72fb strb r3, [r7, #11] 800b544: 4613 mov r3, r2 800b546: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800b548: 2300 movs r3, #0 800b54a: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800b54c: 2300 movs r3, #0 800b54e: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); 800b550: 68fb ldr r3, [r7, #12] 800b552: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b556: 893b ldrh r3, [r7, #8] 800b558: 7af9 ldrb r1, [r7, #11] 800b55a: 687a ldr r2, [r7, #4] 800b55c: f7f8 fe5d bl 800421a 800b560: 4603 mov r3, r0 800b562: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800b564: 7dfb ldrb r3, [r7, #23] 800b566: 4618 mov r0, r3 800b568: f000 f85e bl 800b628 800b56c: 4603 mov r3, r0 800b56e: 75bb strb r3, [r7, #22] return usb_status; 800b570: 7dbb ldrb r3, [r7, #22] } 800b572: 4618 mov r0, r3 800b574: 3718 adds r7, #24 800b576: 46bd mov sp, r7 800b578: bd80 pop {r7, pc} 0800b57a : * @param pbuf: Pointer to data to be received * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size) { 800b57a: b580 push {r7, lr} 800b57c: b086 sub sp, #24 800b57e: af00 add r7, sp, #0 800b580: 60f8 str r0, [r7, #12] 800b582: 607a str r2, [r7, #4] 800b584: 461a mov r2, r3 800b586: 460b mov r3, r1 800b588: 72fb strb r3, [r7, #11] 800b58a: 4613 mov r3, r2 800b58c: 813b strh r3, [r7, #8] HAL_StatusTypeDef hal_status = HAL_OK; 800b58e: 2300 movs r3, #0 800b590: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800b592: 2300 movs r3, #0 800b594: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); 800b596: 68fb ldr r3, [r7, #12] 800b598: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0 800b59c: 893b ldrh r3, [r7, #8] 800b59e: 7af9 ldrb r1, [r7, #11] 800b5a0: 687a ldr r2, [r7, #4] 800b5a2: f7f8 fdf2 bl 800418a 800b5a6: 4603 mov r3, r0 800b5a8: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800b5aa: 7dfb ldrb r3, [r7, #23] 800b5ac: 4618 mov r0, r3 800b5ae: f000 f83b bl 800b628 800b5b2: 4603 mov r3, r0 800b5b4: 75bb strb r3, [r7, #22] return usb_status; 800b5b6: 7dbb ldrb r3, [r7, #22] } 800b5b8: 4618 mov r0, r3 800b5ba: 3718 adds r7, #24 800b5bc: 46bd mov sp, r7 800b5be: bd80 pop {r7, pc} 0800b5c0 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Received Data Size */ uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800b5c0: b580 push {r7, lr} 800b5c2: b082 sub sp, #8 800b5c4: af00 add r7, sp, #0 800b5c6: 6078 str r0, [r7, #4] 800b5c8: 460b mov r3, r1 800b5ca: 70fb strb r3, [r7, #3] return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); 800b5cc: 687b ldr r3, [r7, #4] 800b5ce: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0 800b5d2: 78fa ldrb r2, [r7, #3] 800b5d4: 4611 mov r1, r2 800b5d6: 4618 mov r0, r3 800b5d8: f7f8 fe08 bl 80041ec 800b5dc: 4603 mov r3, r0 } 800b5de: 4618 mov r0, r3 800b5e0: 3708 adds r7, #8 800b5e2: 46bd mov sp, r7 800b5e4: bd80 pop {r7, pc} ... 0800b5e8 : * @brief Static single allocation. * @param size: Size of allocated memory * @retval None */ void *USBD_static_malloc(uint32_t size) { 800b5e8: b480 push {r7} 800b5ea: b083 sub sp, #12 800b5ec: af00 add r7, sp, #0 800b5ee: 6078 str r0, [r7, #4] static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ return mem; 800b5f0: 4b02 ldr r3, [pc, #8] @ (800b5fc ) } 800b5f2: 4618 mov r0, r3 800b5f4: 370c adds r7, #12 800b5f6: 46bd mov sp, r7 800b5f8: bc80 pop {r7} 800b5fa: 4770 bx lr 800b5fc: 200014b4 .word 0x200014b4 0800b600 : * @brief Dummy memory free * @param p: Pointer to allocated memory address * @retval None */ void USBD_static_free(void *p) { 800b600: b480 push {r7} 800b602: b083 sub sp, #12 800b604: af00 add r7, sp, #0 800b606: 6078 str r0, [r7, #4] } 800b608: bf00 nop 800b60a: 370c adds r7, #12 800b60c: 46bd mov sp, r7 800b60e: bc80 pop {r7} 800b610: 4770 bx lr 0800b612 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #else void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800b612: b480 push {r7} 800b614: b083 sub sp, #12 800b616: af00 add r7, sp, #0 800b618: 6078 str r0, [r7, #4] 800b61a: 460b mov r3, r1 800b61c: 70fb strb r3, [r7, #3] { /* Configure High connection state. */ } /* USER CODE END 6 */ } 800b61e: bf00 nop 800b620: 370c adds r7, #12 800b622: 46bd mov sp, r7 800b624: bc80 pop {r7} 800b626: 4770 bx lr 0800b628 : * @brief Returns the USB status depending on the HAL status: * @param hal_status: HAL status * @retval USB status */ USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) { 800b628: b480 push {r7} 800b62a: b085 sub sp, #20 800b62c: af00 add r7, sp, #0 800b62e: 4603 mov r3, r0 800b630: 71fb strb r3, [r7, #7] USBD_StatusTypeDef usb_status = USBD_OK; 800b632: 2300 movs r3, #0 800b634: 73fb strb r3, [r7, #15] switch (hal_status) 800b636: 79fb ldrb r3, [r7, #7] 800b638: 2b03 cmp r3, #3 800b63a: d817 bhi.n 800b66c 800b63c: a201 add r2, pc, #4 @ (adr r2, 800b644 ) 800b63e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800b642: bf00 nop 800b644: 0800b655 .word 0x0800b655 800b648: 0800b65b .word 0x0800b65b 800b64c: 0800b661 .word 0x0800b661 800b650: 0800b667 .word 0x0800b667 { case HAL_OK : usb_status = USBD_OK; 800b654: 2300 movs r3, #0 800b656: 73fb strb r3, [r7, #15] break; 800b658: e00b b.n 800b672 case HAL_ERROR : usb_status = USBD_FAIL; 800b65a: 2302 movs r3, #2 800b65c: 73fb strb r3, [r7, #15] break; 800b65e: e008 b.n 800b672 case HAL_BUSY : usb_status = USBD_BUSY; 800b660: 2301 movs r3, #1 800b662: 73fb strb r3, [r7, #15] break; 800b664: e005 b.n 800b672 case HAL_TIMEOUT : usb_status = USBD_FAIL; 800b666: 2302 movs r3, #2 800b668: 73fb strb r3, [r7, #15] break; 800b66a: e002 b.n 800b672 default : usb_status = USBD_FAIL; 800b66c: 2302 movs r3, #2 800b66e: 73fb strb r3, [r7, #15] break; 800b670: bf00 nop } return usb_status; 800b672: 7bfb ldrb r3, [r7, #15] } 800b674: 4618 mov r0, r3 800b676: 3714 adds r7, #20 800b678: 46bd mov sp, r7 800b67a: bc80 pop {r7} 800b67c: 4770 bx lr 800b67e: bf00 nop 0800b680 : 800b680: b40e push {r1, r2, r3} 800b682: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000 800b686: b510 push {r4, lr} 800b688: 2400 movs r4, #0 800b68a: b09d sub sp, #116 @ 0x74 800b68c: ab1f add r3, sp, #124 @ 0x7c 800b68e: 9002 str r0, [sp, #8] 800b690: 9006 str r0, [sp, #24] 800b692: 9107 str r1, [sp, #28] 800b694: 9104 str r1, [sp, #16] 800b696: 4809 ldr r0, [pc, #36] @ (800b6bc ) 800b698: 4909 ldr r1, [pc, #36] @ (800b6c0 ) 800b69a: f853 2b04 ldr.w r2, [r3], #4 800b69e: 9105 str r1, [sp, #20] 800b6a0: 6800 ldr r0, [r0, #0] 800b6a2: a902 add r1, sp, #8 800b6a4: 9301 str r3, [sp, #4] 800b6a6: 941b str r4, [sp, #108] @ 0x6c 800b6a8: f000 f992 bl 800b9d0 <_svfiprintf_r> 800b6ac: 9b02 ldr r3, [sp, #8] 800b6ae: 701c strb r4, [r3, #0] 800b6b0: b01d add sp, #116 @ 0x74 800b6b2: e8bd 4010 ldmia.w sp!, {r4, lr} 800b6b6: b003 add sp, #12 800b6b8: 4770 bx lr 800b6ba: bf00 nop 800b6bc: 20000180 .word 0x20000180 800b6c0: ffff0208 .word 0xffff0208 0800b6c4 : 800b6c4: 4603 mov r3, r0 800b6c6: 4402 add r2, r0 800b6c8: 4293 cmp r3, r2 800b6ca: d100 bne.n 800b6ce 800b6cc: 4770 bx lr 800b6ce: f803 1b01 strb.w r1, [r3], #1 800b6d2: e7f9 b.n 800b6c8 0800b6d4 <__errno>: 800b6d4: 4b01 ldr r3, [pc, #4] @ (800b6dc <__errno+0x8>) 800b6d6: 6818 ldr r0, [r3, #0] 800b6d8: 4770 bx lr 800b6da: bf00 nop 800b6dc: 20000180 .word 0x20000180 0800b6e0 <__libc_init_array>: 800b6e0: b570 push {r4, r5, r6, lr} 800b6e2: 2600 movs r6, #0 800b6e4: 4d0c ldr r5, [pc, #48] @ (800b718 <__libc_init_array+0x38>) 800b6e6: 4c0d ldr r4, [pc, #52] @ (800b71c <__libc_init_array+0x3c>) 800b6e8: 1b64 subs r4, r4, r5 800b6ea: 10a4 asrs r4, r4, #2 800b6ec: 42a6 cmp r6, r4 800b6ee: d109 bne.n 800b704 <__libc_init_array+0x24> 800b6f0: f000 fc76 bl 800bfe0 <_init> 800b6f4: 2600 movs r6, #0 800b6f6: 4d0a ldr r5, [pc, #40] @ (800b720 <__libc_init_array+0x40>) 800b6f8: 4c0a ldr r4, [pc, #40] @ (800b724 <__libc_init_array+0x44>) 800b6fa: 1b64 subs r4, r4, r5 800b6fc: 10a4 asrs r4, r4, #2 800b6fe: 42a6 cmp r6, r4 800b700: d105 bne.n 800b70e <__libc_init_array+0x2e> 800b702: bd70 pop {r4, r5, r6, pc} 800b704: f855 3b04 ldr.w r3, [r5], #4 800b708: 4798 blx r3 800b70a: 3601 adds r6, #1 800b70c: e7ee b.n 800b6ec <__libc_init_array+0xc> 800b70e: f855 3b04 ldr.w r3, [r5], #4 800b712: 4798 blx r3 800b714: 3601 adds r6, #1 800b716: e7f2 b.n 800b6fe <__libc_init_array+0x1e> 800b718: 0800c2ec .word 0x0800c2ec 800b71c: 0800c2ec .word 0x0800c2ec 800b720: 0800c2ec .word 0x0800c2ec 800b724: 0800c2f0 .word 0x0800c2f0 0800b728 <__retarget_lock_acquire_recursive>: 800b728: 4770 bx lr 0800b72a <__retarget_lock_release_recursive>: 800b72a: 4770 bx lr 0800b72c <_free_r>: 800b72c: b538 push {r3, r4, r5, lr} 800b72e: 4605 mov r5, r0 800b730: 2900 cmp r1, #0 800b732: d040 beq.n 800b7b6 <_free_r+0x8a> 800b734: f851 3c04 ldr.w r3, [r1, #-4] 800b738: 1f0c subs r4, r1, #4 800b73a: 2b00 cmp r3, #0 800b73c: bfb8 it lt 800b73e: 18e4 addlt r4, r4, r3 800b740: f000 f8de bl 800b900 <__malloc_lock> 800b744: 4a1c ldr r2, [pc, #112] @ (800b7b8 <_free_r+0x8c>) 800b746: 6813 ldr r3, [r2, #0] 800b748: b933 cbnz r3, 800b758 <_free_r+0x2c> 800b74a: 6063 str r3, [r4, #4] 800b74c: 6014 str r4, [r2, #0] 800b74e: 4628 mov r0, r5 800b750: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 800b754: f000 b8da b.w 800b90c <__malloc_unlock> 800b758: 42a3 cmp r3, r4 800b75a: d908 bls.n 800b76e <_free_r+0x42> 800b75c: 6820 ldr r0, [r4, #0] 800b75e: 1821 adds r1, r4, r0 800b760: 428b cmp r3, r1 800b762: bf01 itttt eq 800b764: 6819 ldreq r1, [r3, #0] 800b766: 685b ldreq r3, [r3, #4] 800b768: 1809 addeq r1, r1, r0 800b76a: 6021 streq r1, [r4, #0] 800b76c: e7ed b.n 800b74a <_free_r+0x1e> 800b76e: 461a mov r2, r3 800b770: 685b ldr r3, [r3, #4] 800b772: b10b cbz r3, 800b778 <_free_r+0x4c> 800b774: 42a3 cmp r3, r4 800b776: d9fa bls.n 800b76e <_free_r+0x42> 800b778: 6811 ldr r1, [r2, #0] 800b77a: 1850 adds r0, r2, r1 800b77c: 42a0 cmp r0, r4 800b77e: d10b bne.n 800b798 <_free_r+0x6c> 800b780: 6820 ldr r0, [r4, #0] 800b782: 4401 add r1, r0 800b784: 1850 adds r0, r2, r1 800b786: 4283 cmp r3, r0 800b788: 6011 str r1, [r2, #0] 800b78a: d1e0 bne.n 800b74e <_free_r+0x22> 800b78c: 6818 ldr r0, [r3, #0] 800b78e: 685b ldr r3, [r3, #4] 800b790: 4408 add r0, r1 800b792: 6010 str r0, [r2, #0] 800b794: 6053 str r3, [r2, #4] 800b796: e7da b.n 800b74e <_free_r+0x22> 800b798: d902 bls.n 800b7a0 <_free_r+0x74> 800b79a: 230c movs r3, #12 800b79c: 602b str r3, [r5, #0] 800b79e: e7d6 b.n 800b74e <_free_r+0x22> 800b7a0: 6820 ldr r0, [r4, #0] 800b7a2: 1821 adds r1, r4, r0 800b7a4: 428b cmp r3, r1 800b7a6: bf01 itttt eq 800b7a8: 6819 ldreq r1, [r3, #0] 800b7aa: 685b ldreq r3, [r3, #4] 800b7ac: 1809 addeq r1, r1, r0 800b7ae: 6021 streq r1, [r4, #0] 800b7b0: 6063 str r3, [r4, #4] 800b7b2: 6054 str r4, [r2, #4] 800b7b4: e7cb b.n 800b74e <_free_r+0x22> 800b7b6: bd38 pop {r3, r4, r5, pc} 800b7b8: 20001818 .word 0x20001818 0800b7bc : 800b7bc: b570 push {r4, r5, r6, lr} 800b7be: 4e0f ldr r6, [pc, #60] @ (800b7fc ) 800b7c0: 460c mov r4, r1 800b7c2: 6831 ldr r1, [r6, #0] 800b7c4: 4605 mov r5, r0 800b7c6: b911 cbnz r1, 800b7ce 800b7c8: f000 fba8 bl 800bf1c <_sbrk_r> 800b7cc: 6030 str r0, [r6, #0] 800b7ce: 4621 mov r1, r4 800b7d0: 4628 mov r0, r5 800b7d2: f000 fba3 bl 800bf1c <_sbrk_r> 800b7d6: 1c43 adds r3, r0, #1 800b7d8: d103 bne.n 800b7e2 800b7da: f04f 34ff mov.w r4, #4294967295 800b7de: 4620 mov r0, r4 800b7e0: bd70 pop {r4, r5, r6, pc} 800b7e2: 1cc4 adds r4, r0, #3 800b7e4: f024 0403 bic.w r4, r4, #3 800b7e8: 42a0 cmp r0, r4 800b7ea: d0f8 beq.n 800b7de 800b7ec: 1a21 subs r1, r4, r0 800b7ee: 4628 mov r0, r5 800b7f0: f000 fb94 bl 800bf1c <_sbrk_r> 800b7f4: 3001 adds r0, #1 800b7f6: d1f2 bne.n 800b7de 800b7f8: e7ef b.n 800b7da 800b7fa: bf00 nop 800b7fc: 20001814 .word 0x20001814 0800b800 <_malloc_r>: 800b800: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 800b804: 1ccd adds r5, r1, #3 800b806: f025 0503 bic.w r5, r5, #3 800b80a: 3508 adds r5, #8 800b80c: 2d0c cmp r5, #12 800b80e: bf38 it cc 800b810: 250c movcc r5, #12 800b812: 2d00 cmp r5, #0 800b814: 4606 mov r6, r0 800b816: db01 blt.n 800b81c <_malloc_r+0x1c> 800b818: 42a9 cmp r1, r5 800b81a: d904 bls.n 800b826 <_malloc_r+0x26> 800b81c: 230c movs r3, #12 800b81e: 6033 str r3, [r6, #0] 800b820: 2000 movs r0, #0 800b822: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 800b826: f8df 80d4 ldr.w r8, [pc, #212] @ 800b8fc <_malloc_r+0xfc> 800b82a: f000 f869 bl 800b900 <__malloc_lock> 800b82e: f8d8 3000 ldr.w r3, [r8] 800b832: 461c mov r4, r3 800b834: bb44 cbnz r4, 800b888 <_malloc_r+0x88> 800b836: 4629 mov r1, r5 800b838: 4630 mov r0, r6 800b83a: f7ff ffbf bl 800b7bc 800b83e: 1c43 adds r3, r0, #1 800b840: 4604 mov r4, r0 800b842: d158 bne.n 800b8f6 <_malloc_r+0xf6> 800b844: f8d8 4000 ldr.w r4, [r8] 800b848: 4627 mov r7, r4 800b84a: 2f00 cmp r7, #0 800b84c: d143 bne.n 800b8d6 <_malloc_r+0xd6> 800b84e: 2c00 cmp r4, #0 800b850: d04b beq.n 800b8ea <_malloc_r+0xea> 800b852: 6823 ldr r3, [r4, #0] 800b854: 4639 mov r1, r7 800b856: 4630 mov r0, r6 800b858: eb04 0903 add.w r9, r4, r3 800b85c: f000 fb5e bl 800bf1c <_sbrk_r> 800b860: 4581 cmp r9, r0 800b862: d142 bne.n 800b8ea <_malloc_r+0xea> 800b864: 6821 ldr r1, [r4, #0] 800b866: 4630 mov r0, r6 800b868: 1a6d subs r5, r5, r1 800b86a: 4629 mov r1, r5 800b86c: f7ff ffa6 bl 800b7bc 800b870: 3001 adds r0, #1 800b872: d03a beq.n 800b8ea <_malloc_r+0xea> 800b874: 6823 ldr r3, [r4, #0] 800b876: 442b add r3, r5 800b878: 6023 str r3, [r4, #0] 800b87a: f8d8 3000 ldr.w r3, [r8] 800b87e: 685a ldr r2, [r3, #4] 800b880: bb62 cbnz r2, 800b8dc <_malloc_r+0xdc> 800b882: f8c8 7000 str.w r7, [r8] 800b886: e00f b.n 800b8a8 <_malloc_r+0xa8> 800b888: 6822 ldr r2, [r4, #0] 800b88a: 1b52 subs r2, r2, r5 800b88c: d420 bmi.n 800b8d0 <_malloc_r+0xd0> 800b88e: 2a0b cmp r2, #11 800b890: d917 bls.n 800b8c2 <_malloc_r+0xc2> 800b892: 1961 adds r1, r4, r5 800b894: 42a3 cmp r3, r4 800b896: 6025 str r5, [r4, #0] 800b898: bf18 it ne 800b89a: 6059 strne r1, [r3, #4] 800b89c: 6863 ldr r3, [r4, #4] 800b89e: bf08 it eq 800b8a0: f8c8 1000 streq.w r1, [r8] 800b8a4: 5162 str r2, [r4, r5] 800b8a6: 604b str r3, [r1, #4] 800b8a8: 4630 mov r0, r6 800b8aa: f000 f82f bl 800b90c <__malloc_unlock> 800b8ae: f104 000b add.w r0, r4, #11 800b8b2: 1d23 adds r3, r4, #4 800b8b4: f020 0007 bic.w r0, r0, #7 800b8b8: 1ac2 subs r2, r0, r3 800b8ba: bf1c itt ne 800b8bc: 1a1b subne r3, r3, r0 800b8be: 50a3 strne r3, [r4, r2] 800b8c0: e7af b.n 800b822 <_malloc_r+0x22> 800b8c2: 6862 ldr r2, [r4, #4] 800b8c4: 42a3 cmp r3, r4 800b8c6: bf0c ite eq 800b8c8: f8c8 2000 streq.w r2, [r8] 800b8cc: 605a strne r2, [r3, #4] 800b8ce: e7eb b.n 800b8a8 <_malloc_r+0xa8> 800b8d0: 4623 mov r3, r4 800b8d2: 6864 ldr r4, [r4, #4] 800b8d4: e7ae b.n 800b834 <_malloc_r+0x34> 800b8d6: 463c mov r4, r7 800b8d8: 687f ldr r7, [r7, #4] 800b8da: e7b6 b.n 800b84a <_malloc_r+0x4a> 800b8dc: 461a mov r2, r3 800b8de: 685b ldr r3, [r3, #4] 800b8e0: 42a3 cmp r3, r4 800b8e2: d1fb bne.n 800b8dc <_malloc_r+0xdc> 800b8e4: 2300 movs r3, #0 800b8e6: 6053 str r3, [r2, #4] 800b8e8: e7de b.n 800b8a8 <_malloc_r+0xa8> 800b8ea: 230c movs r3, #12 800b8ec: 4630 mov r0, r6 800b8ee: 6033 str r3, [r6, #0] 800b8f0: f000 f80c bl 800b90c <__malloc_unlock> 800b8f4: e794 b.n 800b820 <_malloc_r+0x20> 800b8f6: 6005 str r5, [r0, #0] 800b8f8: e7d6 b.n 800b8a8 <_malloc_r+0xa8> 800b8fa: bf00 nop 800b8fc: 20001818 .word 0x20001818 0800b900 <__malloc_lock>: 800b900: 4801 ldr r0, [pc, #4] @ (800b908 <__malloc_lock+0x8>) 800b902: f7ff bf11 b.w 800b728 <__retarget_lock_acquire_recursive> 800b906: bf00 nop 800b908: 20001810 .word 0x20001810 0800b90c <__malloc_unlock>: 800b90c: 4801 ldr r0, [pc, #4] @ (800b914 <__malloc_unlock+0x8>) 800b90e: f7ff bf0c b.w 800b72a <__retarget_lock_release_recursive> 800b912: bf00 nop 800b914: 20001810 .word 0x20001810 0800b918 <__ssputs_r>: 800b918: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800b91c: 461f mov r7, r3 800b91e: 688e ldr r6, [r1, #8] 800b920: 4682 mov sl, r0 800b922: 42be cmp r6, r7 800b924: 460c mov r4, r1 800b926: 4690 mov r8, r2 800b928: 680b ldr r3, [r1, #0] 800b92a: d82d bhi.n 800b988 <__ssputs_r+0x70> 800b92c: f9b1 200c ldrsh.w r2, [r1, #12] 800b930: f412 6f90 tst.w r2, #1152 @ 0x480 800b934: d026 beq.n 800b984 <__ssputs_r+0x6c> 800b936: 6965 ldr r5, [r4, #20] 800b938: 6909 ldr r1, [r1, #16] 800b93a: eb05 0545 add.w r5, r5, r5, lsl #1 800b93e: eba3 0901 sub.w r9, r3, r1 800b942: eb05 75d5 add.w r5, r5, r5, lsr #31 800b946: 1c7b adds r3, r7, #1 800b948: 444b add r3, r9 800b94a: 106d asrs r5, r5, #1 800b94c: 429d cmp r5, r3 800b94e: bf38 it cc 800b950: 461d movcc r5, r3 800b952: 0553 lsls r3, r2, #21 800b954: d527 bpl.n 800b9a6 <__ssputs_r+0x8e> 800b956: 4629 mov r1, r5 800b958: f7ff ff52 bl 800b800 <_malloc_r> 800b95c: 4606 mov r6, r0 800b95e: b360 cbz r0, 800b9ba <__ssputs_r+0xa2> 800b960: 464a mov r2, r9 800b962: 6921 ldr r1, [r4, #16] 800b964: f000 faf8 bl 800bf58 800b968: 89a3 ldrh r3, [r4, #12] 800b96a: f423 6390 bic.w r3, r3, #1152 @ 0x480 800b96e: f043 0380 orr.w r3, r3, #128 @ 0x80 800b972: 81a3 strh r3, [r4, #12] 800b974: 6126 str r6, [r4, #16] 800b976: 444e add r6, r9 800b978: 6026 str r6, [r4, #0] 800b97a: 463e mov r6, r7 800b97c: 6165 str r5, [r4, #20] 800b97e: eba5 0509 sub.w r5, r5, r9 800b982: 60a5 str r5, [r4, #8] 800b984: 42be cmp r6, r7 800b986: d900 bls.n 800b98a <__ssputs_r+0x72> 800b988: 463e mov r6, r7 800b98a: 4632 mov r2, r6 800b98c: 4641 mov r1, r8 800b98e: 6820 ldr r0, [r4, #0] 800b990: f000 faaa bl 800bee8 800b994: 2000 movs r0, #0 800b996: 68a3 ldr r3, [r4, #8] 800b998: 1b9b subs r3, r3, r6 800b99a: 60a3 str r3, [r4, #8] 800b99c: 6823 ldr r3, [r4, #0] 800b99e: 4433 add r3, r6 800b9a0: 6023 str r3, [r4, #0] 800b9a2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800b9a6: 462a mov r2, r5 800b9a8: f000 fae4 bl 800bf74 <_realloc_r> 800b9ac: 4606 mov r6, r0 800b9ae: 2800 cmp r0, #0 800b9b0: d1e0 bne.n 800b974 <__ssputs_r+0x5c> 800b9b2: 4650 mov r0, sl 800b9b4: 6921 ldr r1, [r4, #16] 800b9b6: f7ff feb9 bl 800b72c <_free_r> 800b9ba: 230c movs r3, #12 800b9bc: f8ca 3000 str.w r3, [sl] 800b9c0: 89a3 ldrh r3, [r4, #12] 800b9c2: f04f 30ff mov.w r0, #4294967295 800b9c6: f043 0340 orr.w r3, r3, #64 @ 0x40 800b9ca: 81a3 strh r3, [r4, #12] 800b9cc: e7e9 b.n 800b9a2 <__ssputs_r+0x8a> ... 0800b9d0 <_svfiprintf_r>: 800b9d0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800b9d4: 4698 mov r8, r3 800b9d6: 898b ldrh r3, [r1, #12] 800b9d8: 4607 mov r7, r0 800b9da: 061b lsls r3, r3, #24 800b9dc: 460d mov r5, r1 800b9de: 4614 mov r4, r2 800b9e0: b09d sub sp, #116 @ 0x74 800b9e2: d510 bpl.n 800ba06 <_svfiprintf_r+0x36> 800b9e4: 690b ldr r3, [r1, #16] 800b9e6: b973 cbnz r3, 800ba06 <_svfiprintf_r+0x36> 800b9e8: 2140 movs r1, #64 @ 0x40 800b9ea: f7ff ff09 bl 800b800 <_malloc_r> 800b9ee: 6028 str r0, [r5, #0] 800b9f0: 6128 str r0, [r5, #16] 800b9f2: b930 cbnz r0, 800ba02 <_svfiprintf_r+0x32> 800b9f4: 230c movs r3, #12 800b9f6: 603b str r3, [r7, #0] 800b9f8: f04f 30ff mov.w r0, #4294967295 800b9fc: b01d add sp, #116 @ 0x74 800b9fe: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800ba02: 2340 movs r3, #64 @ 0x40 800ba04: 616b str r3, [r5, #20] 800ba06: 2300 movs r3, #0 800ba08: 9309 str r3, [sp, #36] @ 0x24 800ba0a: 2320 movs r3, #32 800ba0c: f88d 3029 strb.w r3, [sp, #41] @ 0x29 800ba10: 2330 movs r3, #48 @ 0x30 800ba12: f04f 0901 mov.w r9, #1 800ba16: f8cd 800c str.w r8, [sp, #12] 800ba1a: f8df 8198 ldr.w r8, [pc, #408] @ 800bbb4 <_svfiprintf_r+0x1e4> 800ba1e: f88d 302a strb.w r3, [sp, #42] @ 0x2a 800ba22: 4623 mov r3, r4 800ba24: 469a mov sl, r3 800ba26: f813 2b01 ldrb.w r2, [r3], #1 800ba2a: b10a cbz r2, 800ba30 <_svfiprintf_r+0x60> 800ba2c: 2a25 cmp r2, #37 @ 0x25 800ba2e: d1f9 bne.n 800ba24 <_svfiprintf_r+0x54> 800ba30: ebba 0b04 subs.w fp, sl, r4 800ba34: d00b beq.n 800ba4e <_svfiprintf_r+0x7e> 800ba36: 465b mov r3, fp 800ba38: 4622 mov r2, r4 800ba3a: 4629 mov r1, r5 800ba3c: 4638 mov r0, r7 800ba3e: f7ff ff6b bl 800b918 <__ssputs_r> 800ba42: 3001 adds r0, #1 800ba44: f000 80a7 beq.w 800bb96 <_svfiprintf_r+0x1c6> 800ba48: 9a09 ldr r2, [sp, #36] @ 0x24 800ba4a: 445a add r2, fp 800ba4c: 9209 str r2, [sp, #36] @ 0x24 800ba4e: f89a 3000 ldrb.w r3, [sl] 800ba52: 2b00 cmp r3, #0 800ba54: f000 809f beq.w 800bb96 <_svfiprintf_r+0x1c6> 800ba58: 2300 movs r3, #0 800ba5a: f04f 32ff mov.w r2, #4294967295 800ba5e: e9cd 2305 strd r2, r3, [sp, #20] 800ba62: f10a 0a01 add.w sl, sl, #1 800ba66: 9304 str r3, [sp, #16] 800ba68: 9307 str r3, [sp, #28] 800ba6a: f88d 3053 strb.w r3, [sp, #83] @ 0x53 800ba6e: 931a str r3, [sp, #104] @ 0x68 800ba70: 4654 mov r4, sl 800ba72: 2205 movs r2, #5 800ba74: f814 1b01 ldrb.w r1, [r4], #1 800ba78: 484e ldr r0, [pc, #312] @ (800bbb4 <_svfiprintf_r+0x1e4>) 800ba7a: f000 fa5f bl 800bf3c 800ba7e: 9a04 ldr r2, [sp, #16] 800ba80: b9d8 cbnz r0, 800baba <_svfiprintf_r+0xea> 800ba82: 06d0 lsls r0, r2, #27 800ba84: bf44 itt mi 800ba86: 2320 movmi r3, #32 800ba88: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800ba8c: 0711 lsls r1, r2, #28 800ba8e: bf44 itt mi 800ba90: 232b movmi r3, #43 @ 0x2b 800ba92: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 800ba96: f89a 3000 ldrb.w r3, [sl] 800ba9a: 2b2a cmp r3, #42 @ 0x2a 800ba9c: d015 beq.n 800baca <_svfiprintf_r+0xfa> 800ba9e: 4654 mov r4, sl 800baa0: 2000 movs r0, #0 800baa2: f04f 0c0a mov.w ip, #10 800baa6: 9a07 ldr r2, [sp, #28] 800baa8: 4621 mov r1, r4 800baaa: f811 3b01 ldrb.w r3, [r1], #1 800baae: 3b30 subs r3, #48 @ 0x30 800bab0: 2b09 cmp r3, #9 800bab2: d94b bls.n 800bb4c <_svfiprintf_r+0x17c> 800bab4: b1b0 cbz r0, 800bae4 <_svfiprintf_r+0x114> 800bab6: 9207 str r2, [sp, #28] 800bab8: e014 b.n 800bae4 <_svfiprintf_r+0x114> 800baba: eba0 0308 sub.w r3, r0, r8 800babe: fa09 f303 lsl.w r3, r9, r3 800bac2: 4313 orrs r3, r2 800bac4: 46a2 mov sl, r4 800bac6: 9304 str r3, [sp, #16] 800bac8: e7d2 b.n 800ba70 <_svfiprintf_r+0xa0> 800baca: 9b03 ldr r3, [sp, #12] 800bacc: 1d19 adds r1, r3, #4 800bace: 681b ldr r3, [r3, #0] 800bad0: 9103 str r1, [sp, #12] 800bad2: 2b00 cmp r3, #0 800bad4: bfbb ittet lt 800bad6: 425b neglt r3, r3 800bad8: f042 0202 orrlt.w r2, r2, #2 800badc: 9307 strge r3, [sp, #28] 800bade: 9307 strlt r3, [sp, #28] 800bae0: bfb8 it lt 800bae2: 9204 strlt r2, [sp, #16] 800bae4: 7823 ldrb r3, [r4, #0] 800bae6: 2b2e cmp r3, #46 @ 0x2e 800bae8: d10a bne.n 800bb00 <_svfiprintf_r+0x130> 800baea: 7863 ldrb r3, [r4, #1] 800baec: 2b2a cmp r3, #42 @ 0x2a 800baee: d132 bne.n 800bb56 <_svfiprintf_r+0x186> 800baf0: 9b03 ldr r3, [sp, #12] 800baf2: 3402 adds r4, #2 800baf4: 1d1a adds r2, r3, #4 800baf6: 681b ldr r3, [r3, #0] 800baf8: 9203 str r2, [sp, #12] 800bafa: ea43 73e3 orr.w r3, r3, r3, asr #31 800bafe: 9305 str r3, [sp, #20] 800bb00: f8df a0b4 ldr.w sl, [pc, #180] @ 800bbb8 <_svfiprintf_r+0x1e8> 800bb04: 2203 movs r2, #3 800bb06: 4650 mov r0, sl 800bb08: 7821 ldrb r1, [r4, #0] 800bb0a: f000 fa17 bl 800bf3c 800bb0e: b138 cbz r0, 800bb20 <_svfiprintf_r+0x150> 800bb10: 2240 movs r2, #64 @ 0x40 800bb12: 9b04 ldr r3, [sp, #16] 800bb14: eba0 000a sub.w r0, r0, sl 800bb18: 4082 lsls r2, r0 800bb1a: 4313 orrs r3, r2 800bb1c: 3401 adds r4, #1 800bb1e: 9304 str r3, [sp, #16] 800bb20: f814 1b01 ldrb.w r1, [r4], #1 800bb24: 2206 movs r2, #6 800bb26: 4825 ldr r0, [pc, #148] @ (800bbbc <_svfiprintf_r+0x1ec>) 800bb28: f88d 1028 strb.w r1, [sp, #40] @ 0x28 800bb2c: f000 fa06 bl 800bf3c 800bb30: 2800 cmp r0, #0 800bb32: d036 beq.n 800bba2 <_svfiprintf_r+0x1d2> 800bb34: 4b22 ldr r3, [pc, #136] @ (800bbc0 <_svfiprintf_r+0x1f0>) 800bb36: bb1b cbnz r3, 800bb80 <_svfiprintf_r+0x1b0> 800bb38: 9b03 ldr r3, [sp, #12] 800bb3a: 3307 adds r3, #7 800bb3c: f023 0307 bic.w r3, r3, #7 800bb40: 3308 adds r3, #8 800bb42: 9303 str r3, [sp, #12] 800bb44: 9b09 ldr r3, [sp, #36] @ 0x24 800bb46: 4433 add r3, r6 800bb48: 9309 str r3, [sp, #36] @ 0x24 800bb4a: e76a b.n 800ba22 <_svfiprintf_r+0x52> 800bb4c: 460c mov r4, r1 800bb4e: 2001 movs r0, #1 800bb50: fb0c 3202 mla r2, ip, r2, r3 800bb54: e7a8 b.n 800baa8 <_svfiprintf_r+0xd8> 800bb56: 2300 movs r3, #0 800bb58: f04f 0c0a mov.w ip, #10 800bb5c: 4619 mov r1, r3 800bb5e: 3401 adds r4, #1 800bb60: 9305 str r3, [sp, #20] 800bb62: 4620 mov r0, r4 800bb64: f810 2b01 ldrb.w r2, [r0], #1 800bb68: 3a30 subs r2, #48 @ 0x30 800bb6a: 2a09 cmp r2, #9 800bb6c: d903 bls.n 800bb76 <_svfiprintf_r+0x1a6> 800bb6e: 2b00 cmp r3, #0 800bb70: d0c6 beq.n 800bb00 <_svfiprintf_r+0x130> 800bb72: 9105 str r1, [sp, #20] 800bb74: e7c4 b.n 800bb00 <_svfiprintf_r+0x130> 800bb76: 4604 mov r4, r0 800bb78: 2301 movs r3, #1 800bb7a: fb0c 2101 mla r1, ip, r1, r2 800bb7e: e7f0 b.n 800bb62 <_svfiprintf_r+0x192> 800bb80: ab03 add r3, sp, #12 800bb82: 9300 str r3, [sp, #0] 800bb84: 462a mov r2, r5 800bb86: 4638 mov r0, r7 800bb88: 4b0e ldr r3, [pc, #56] @ (800bbc4 <_svfiprintf_r+0x1f4>) 800bb8a: a904 add r1, sp, #16 800bb8c: f3af 8000 nop.w 800bb90: 1c42 adds r2, r0, #1 800bb92: 4606 mov r6, r0 800bb94: d1d6 bne.n 800bb44 <_svfiprintf_r+0x174> 800bb96: 89ab ldrh r3, [r5, #12] 800bb98: 065b lsls r3, r3, #25 800bb9a: f53f af2d bmi.w 800b9f8 <_svfiprintf_r+0x28> 800bb9e: 9809 ldr r0, [sp, #36] @ 0x24 800bba0: e72c b.n 800b9fc <_svfiprintf_r+0x2c> 800bba2: ab03 add r3, sp, #12 800bba4: 9300 str r3, [sp, #0] 800bba6: 462a mov r2, r5 800bba8: 4638 mov r0, r7 800bbaa: 4b06 ldr r3, [pc, #24] @ (800bbc4 <_svfiprintf_r+0x1f4>) 800bbac: a904 add r1, sp, #16 800bbae: f000 f87d bl 800bcac <_printf_i> 800bbb2: e7ed b.n 800bb90 <_svfiprintf_r+0x1c0> 800bbb4: 0800c2ae .word 0x0800c2ae 800bbb8: 0800c2b4 .word 0x0800c2b4 800bbbc: 0800c2b8 .word 0x0800c2b8 800bbc0: 00000000 .word 0x00000000 800bbc4: 0800b919 .word 0x0800b919 0800bbc8 <_printf_common>: 800bbc8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800bbcc: 4616 mov r6, r2 800bbce: 4698 mov r8, r3 800bbd0: 688a ldr r2, [r1, #8] 800bbd2: 690b ldr r3, [r1, #16] 800bbd4: 4607 mov r7, r0 800bbd6: 4293 cmp r3, r2 800bbd8: bfb8 it lt 800bbda: 4613 movlt r3, r2 800bbdc: 6033 str r3, [r6, #0] 800bbde: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 800bbe2: 460c mov r4, r1 800bbe4: f8dd 9020 ldr.w r9, [sp, #32] 800bbe8: b10a cbz r2, 800bbee <_printf_common+0x26> 800bbea: 3301 adds r3, #1 800bbec: 6033 str r3, [r6, #0] 800bbee: 6823 ldr r3, [r4, #0] 800bbf0: 0699 lsls r1, r3, #26 800bbf2: bf42 ittt mi 800bbf4: 6833 ldrmi r3, [r6, #0] 800bbf6: 3302 addmi r3, #2 800bbf8: 6033 strmi r3, [r6, #0] 800bbfa: 6825 ldr r5, [r4, #0] 800bbfc: f015 0506 ands.w r5, r5, #6 800bc00: d106 bne.n 800bc10 <_printf_common+0x48> 800bc02: f104 0a19 add.w sl, r4, #25 800bc06: 68e3 ldr r3, [r4, #12] 800bc08: 6832 ldr r2, [r6, #0] 800bc0a: 1a9b subs r3, r3, r2 800bc0c: 42ab cmp r3, r5 800bc0e: dc2b bgt.n 800bc68 <_printf_common+0xa0> 800bc10: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 800bc14: 6822 ldr r2, [r4, #0] 800bc16: 3b00 subs r3, #0 800bc18: bf18 it ne 800bc1a: 2301 movne r3, #1 800bc1c: 0692 lsls r2, r2, #26 800bc1e: d430 bmi.n 800bc82 <_printf_common+0xba> 800bc20: 4641 mov r1, r8 800bc22: 4638 mov r0, r7 800bc24: f104 0243 add.w r2, r4, #67 @ 0x43 800bc28: 47c8 blx r9 800bc2a: 3001 adds r0, #1 800bc2c: d023 beq.n 800bc76 <_printf_common+0xae> 800bc2e: 6823 ldr r3, [r4, #0] 800bc30: 6922 ldr r2, [r4, #16] 800bc32: f003 0306 and.w r3, r3, #6 800bc36: 2b04 cmp r3, #4 800bc38: bf14 ite ne 800bc3a: 2500 movne r5, #0 800bc3c: 6833 ldreq r3, [r6, #0] 800bc3e: f04f 0600 mov.w r6, #0 800bc42: bf08 it eq 800bc44: 68e5 ldreq r5, [r4, #12] 800bc46: f104 041a add.w r4, r4, #26 800bc4a: bf08 it eq 800bc4c: 1aed subeq r5, r5, r3 800bc4e: f854 3c12 ldr.w r3, [r4, #-18] 800bc52: bf08 it eq 800bc54: ea25 75e5 biceq.w r5, r5, r5, asr #31 800bc58: 4293 cmp r3, r2 800bc5a: bfc4 itt gt 800bc5c: 1a9b subgt r3, r3, r2 800bc5e: 18ed addgt r5, r5, r3 800bc60: 42b5 cmp r5, r6 800bc62: d11a bne.n 800bc9a <_printf_common+0xd2> 800bc64: 2000 movs r0, #0 800bc66: e008 b.n 800bc7a <_printf_common+0xb2> 800bc68: 2301 movs r3, #1 800bc6a: 4652 mov r2, sl 800bc6c: 4641 mov r1, r8 800bc6e: 4638 mov r0, r7 800bc70: 47c8 blx r9 800bc72: 3001 adds r0, #1 800bc74: d103 bne.n 800bc7e <_printf_common+0xb6> 800bc76: f04f 30ff mov.w r0, #4294967295 800bc7a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800bc7e: 3501 adds r5, #1 800bc80: e7c1 b.n 800bc06 <_printf_common+0x3e> 800bc82: 2030 movs r0, #48 @ 0x30 800bc84: 18e1 adds r1, r4, r3 800bc86: f881 0043 strb.w r0, [r1, #67] @ 0x43 800bc8a: 1c5a adds r2, r3, #1 800bc8c: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 800bc90: 4422 add r2, r4 800bc92: 3302 adds r3, #2 800bc94: f882 1043 strb.w r1, [r2, #67] @ 0x43 800bc98: e7c2 b.n 800bc20 <_printf_common+0x58> 800bc9a: 2301 movs r3, #1 800bc9c: 4622 mov r2, r4 800bc9e: 4641 mov r1, r8 800bca0: 4638 mov r0, r7 800bca2: 47c8 blx r9 800bca4: 3001 adds r0, #1 800bca6: d0e6 beq.n 800bc76 <_printf_common+0xae> 800bca8: 3601 adds r6, #1 800bcaa: e7d9 b.n 800bc60 <_printf_common+0x98> 0800bcac <_printf_i>: 800bcac: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 800bcb0: 7e0f ldrb r7, [r1, #24] 800bcb2: 4691 mov r9, r2 800bcb4: 2f78 cmp r7, #120 @ 0x78 800bcb6: 4680 mov r8, r0 800bcb8: 460c mov r4, r1 800bcba: 469a mov sl, r3 800bcbc: 9e0c ldr r6, [sp, #48] @ 0x30 800bcbe: f101 0243 add.w r2, r1, #67 @ 0x43 800bcc2: d807 bhi.n 800bcd4 <_printf_i+0x28> 800bcc4: 2f62 cmp r7, #98 @ 0x62 800bcc6: d80a bhi.n 800bcde <_printf_i+0x32> 800bcc8: 2f00 cmp r7, #0 800bcca: f000 80d1 beq.w 800be70 <_printf_i+0x1c4> 800bcce: 2f58 cmp r7, #88 @ 0x58 800bcd0: f000 80b8 beq.w 800be44 <_printf_i+0x198> 800bcd4: f104 0642 add.w r6, r4, #66 @ 0x42 800bcd8: f884 7042 strb.w r7, [r4, #66] @ 0x42 800bcdc: e03a b.n 800bd54 <_printf_i+0xa8> 800bcde: f1a7 0363 sub.w r3, r7, #99 @ 0x63 800bce2: 2b15 cmp r3, #21 800bce4: d8f6 bhi.n 800bcd4 <_printf_i+0x28> 800bce6: a101 add r1, pc, #4 @ (adr r1, 800bcec <_printf_i+0x40>) 800bce8: f851 f023 ldr.w pc, [r1, r3, lsl #2] 800bcec: 0800bd45 .word 0x0800bd45 800bcf0: 0800bd59 .word 0x0800bd59 800bcf4: 0800bcd5 .word 0x0800bcd5 800bcf8: 0800bcd5 .word 0x0800bcd5 800bcfc: 0800bcd5 .word 0x0800bcd5 800bd00: 0800bcd5 .word 0x0800bcd5 800bd04: 0800bd59 .word 0x0800bd59 800bd08: 0800bcd5 .word 0x0800bcd5 800bd0c: 0800bcd5 .word 0x0800bcd5 800bd10: 0800bcd5 .word 0x0800bcd5 800bd14: 0800bcd5 .word 0x0800bcd5 800bd18: 0800be57 .word 0x0800be57 800bd1c: 0800bd83 .word 0x0800bd83 800bd20: 0800be11 .word 0x0800be11 800bd24: 0800bcd5 .word 0x0800bcd5 800bd28: 0800bcd5 .word 0x0800bcd5 800bd2c: 0800be79 .word 0x0800be79 800bd30: 0800bcd5 .word 0x0800bcd5 800bd34: 0800bd83 .word 0x0800bd83 800bd38: 0800bcd5 .word 0x0800bcd5 800bd3c: 0800bcd5 .word 0x0800bcd5 800bd40: 0800be19 .word 0x0800be19 800bd44: 6833 ldr r3, [r6, #0] 800bd46: 1d1a adds r2, r3, #4 800bd48: 681b ldr r3, [r3, #0] 800bd4a: 6032 str r2, [r6, #0] 800bd4c: f104 0642 add.w r6, r4, #66 @ 0x42 800bd50: f884 3042 strb.w r3, [r4, #66] @ 0x42 800bd54: 2301 movs r3, #1 800bd56: e09c b.n 800be92 <_printf_i+0x1e6> 800bd58: 6833 ldr r3, [r6, #0] 800bd5a: 6820 ldr r0, [r4, #0] 800bd5c: 1d19 adds r1, r3, #4 800bd5e: 6031 str r1, [r6, #0] 800bd60: 0606 lsls r6, r0, #24 800bd62: d501 bpl.n 800bd68 <_printf_i+0xbc> 800bd64: 681d ldr r5, [r3, #0] 800bd66: e003 b.n 800bd70 <_printf_i+0xc4> 800bd68: 0645 lsls r5, r0, #25 800bd6a: d5fb bpl.n 800bd64 <_printf_i+0xb8> 800bd6c: f9b3 5000 ldrsh.w r5, [r3] 800bd70: 2d00 cmp r5, #0 800bd72: da03 bge.n 800bd7c <_printf_i+0xd0> 800bd74: 232d movs r3, #45 @ 0x2d 800bd76: 426d negs r5, r5 800bd78: f884 3043 strb.w r3, [r4, #67] @ 0x43 800bd7c: 230a movs r3, #10 800bd7e: 4858 ldr r0, [pc, #352] @ (800bee0 <_printf_i+0x234>) 800bd80: e011 b.n 800bda6 <_printf_i+0xfa> 800bd82: 6821 ldr r1, [r4, #0] 800bd84: 6833 ldr r3, [r6, #0] 800bd86: 0608 lsls r0, r1, #24 800bd88: f853 5b04 ldr.w r5, [r3], #4 800bd8c: d402 bmi.n 800bd94 <_printf_i+0xe8> 800bd8e: 0649 lsls r1, r1, #25 800bd90: bf48 it mi 800bd92: b2ad uxthmi r5, r5 800bd94: 2f6f cmp r7, #111 @ 0x6f 800bd96: 6033 str r3, [r6, #0] 800bd98: bf14 ite ne 800bd9a: 230a movne r3, #10 800bd9c: 2308 moveq r3, #8 800bd9e: 4850 ldr r0, [pc, #320] @ (800bee0 <_printf_i+0x234>) 800bda0: 2100 movs r1, #0 800bda2: f884 1043 strb.w r1, [r4, #67] @ 0x43 800bda6: 6866 ldr r6, [r4, #4] 800bda8: 2e00 cmp r6, #0 800bdaa: 60a6 str r6, [r4, #8] 800bdac: db05 blt.n 800bdba <_printf_i+0x10e> 800bdae: 6821 ldr r1, [r4, #0] 800bdb0: 432e orrs r6, r5 800bdb2: f021 0104 bic.w r1, r1, #4 800bdb6: 6021 str r1, [r4, #0] 800bdb8: d04b beq.n 800be52 <_printf_i+0x1a6> 800bdba: 4616 mov r6, r2 800bdbc: fbb5 f1f3 udiv r1, r5, r3 800bdc0: fb03 5711 mls r7, r3, r1, r5 800bdc4: 5dc7 ldrb r7, [r0, r7] 800bdc6: f806 7d01 strb.w r7, [r6, #-1]! 800bdca: 462f mov r7, r5 800bdcc: 42bb cmp r3, r7 800bdce: 460d mov r5, r1 800bdd0: d9f4 bls.n 800bdbc <_printf_i+0x110> 800bdd2: 2b08 cmp r3, #8 800bdd4: d10b bne.n 800bdee <_printf_i+0x142> 800bdd6: 6823 ldr r3, [r4, #0] 800bdd8: 07df lsls r7, r3, #31 800bdda: d508 bpl.n 800bdee <_printf_i+0x142> 800bddc: 6923 ldr r3, [r4, #16] 800bdde: 6861 ldr r1, [r4, #4] 800bde0: 4299 cmp r1, r3 800bde2: bfde ittt le 800bde4: 2330 movle r3, #48 @ 0x30 800bde6: f806 3c01 strble.w r3, [r6, #-1] 800bdea: f106 36ff addle.w r6, r6, #4294967295 800bdee: 1b92 subs r2, r2, r6 800bdf0: 6122 str r2, [r4, #16] 800bdf2: 464b mov r3, r9 800bdf4: 4621 mov r1, r4 800bdf6: 4640 mov r0, r8 800bdf8: f8cd a000 str.w sl, [sp] 800bdfc: aa03 add r2, sp, #12 800bdfe: f7ff fee3 bl 800bbc8 <_printf_common> 800be02: 3001 adds r0, #1 800be04: d14a bne.n 800be9c <_printf_i+0x1f0> 800be06: f04f 30ff mov.w r0, #4294967295 800be0a: b004 add sp, #16 800be0c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800be10: 6823 ldr r3, [r4, #0] 800be12: f043 0320 orr.w r3, r3, #32 800be16: 6023 str r3, [r4, #0] 800be18: 2778 movs r7, #120 @ 0x78 800be1a: 4832 ldr r0, [pc, #200] @ (800bee4 <_printf_i+0x238>) 800be1c: f884 7045 strb.w r7, [r4, #69] @ 0x45 800be20: 6823 ldr r3, [r4, #0] 800be22: 6831 ldr r1, [r6, #0] 800be24: 061f lsls r7, r3, #24 800be26: f851 5b04 ldr.w r5, [r1], #4 800be2a: d402 bmi.n 800be32 <_printf_i+0x186> 800be2c: 065f lsls r7, r3, #25 800be2e: bf48 it mi 800be30: b2ad uxthmi r5, r5 800be32: 6031 str r1, [r6, #0] 800be34: 07d9 lsls r1, r3, #31 800be36: bf44 itt mi 800be38: f043 0320 orrmi.w r3, r3, #32 800be3c: 6023 strmi r3, [r4, #0] 800be3e: b11d cbz r5, 800be48 <_printf_i+0x19c> 800be40: 2310 movs r3, #16 800be42: e7ad b.n 800bda0 <_printf_i+0xf4> 800be44: 4826 ldr r0, [pc, #152] @ (800bee0 <_printf_i+0x234>) 800be46: e7e9 b.n 800be1c <_printf_i+0x170> 800be48: 6823 ldr r3, [r4, #0] 800be4a: f023 0320 bic.w r3, r3, #32 800be4e: 6023 str r3, [r4, #0] 800be50: e7f6 b.n 800be40 <_printf_i+0x194> 800be52: 4616 mov r6, r2 800be54: e7bd b.n 800bdd2 <_printf_i+0x126> 800be56: 6833 ldr r3, [r6, #0] 800be58: 6825 ldr r5, [r4, #0] 800be5a: 1d18 adds r0, r3, #4 800be5c: 6961 ldr r1, [r4, #20] 800be5e: 6030 str r0, [r6, #0] 800be60: 062e lsls r6, r5, #24 800be62: 681b ldr r3, [r3, #0] 800be64: d501 bpl.n 800be6a <_printf_i+0x1be> 800be66: 6019 str r1, [r3, #0] 800be68: e002 b.n 800be70 <_printf_i+0x1c4> 800be6a: 0668 lsls r0, r5, #25 800be6c: d5fb bpl.n 800be66 <_printf_i+0x1ba> 800be6e: 8019 strh r1, [r3, #0] 800be70: 2300 movs r3, #0 800be72: 4616 mov r6, r2 800be74: 6123 str r3, [r4, #16] 800be76: e7bc b.n 800bdf2 <_printf_i+0x146> 800be78: 6833 ldr r3, [r6, #0] 800be7a: 2100 movs r1, #0 800be7c: 1d1a adds r2, r3, #4 800be7e: 6032 str r2, [r6, #0] 800be80: 681e ldr r6, [r3, #0] 800be82: 6862 ldr r2, [r4, #4] 800be84: 4630 mov r0, r6 800be86: f000 f859 bl 800bf3c 800be8a: b108 cbz r0, 800be90 <_printf_i+0x1e4> 800be8c: 1b80 subs r0, r0, r6 800be8e: 6060 str r0, [r4, #4] 800be90: 6863 ldr r3, [r4, #4] 800be92: 6123 str r3, [r4, #16] 800be94: 2300 movs r3, #0 800be96: f884 3043 strb.w r3, [r4, #67] @ 0x43 800be9a: e7aa b.n 800bdf2 <_printf_i+0x146> 800be9c: 4632 mov r2, r6 800be9e: 4649 mov r1, r9 800bea0: 4640 mov r0, r8 800bea2: 6923 ldr r3, [r4, #16] 800bea4: 47d0 blx sl 800bea6: 3001 adds r0, #1 800bea8: d0ad beq.n 800be06 <_printf_i+0x15a> 800beaa: 6823 ldr r3, [r4, #0] 800beac: 079b lsls r3, r3, #30 800beae: d413 bmi.n 800bed8 <_printf_i+0x22c> 800beb0: 68e0 ldr r0, [r4, #12] 800beb2: 9b03 ldr r3, [sp, #12] 800beb4: 4298 cmp r0, r3 800beb6: bfb8 it lt 800beb8: 4618 movlt r0, r3 800beba: e7a6 b.n 800be0a <_printf_i+0x15e> 800bebc: 2301 movs r3, #1 800bebe: 4632 mov r2, r6 800bec0: 4649 mov r1, r9 800bec2: 4640 mov r0, r8 800bec4: 47d0 blx sl 800bec6: 3001 adds r0, #1 800bec8: d09d beq.n 800be06 <_printf_i+0x15a> 800beca: 3501 adds r5, #1 800becc: 68e3 ldr r3, [r4, #12] 800bece: 9903 ldr r1, [sp, #12] 800bed0: 1a5b subs r3, r3, r1 800bed2: 42ab cmp r3, r5 800bed4: dcf2 bgt.n 800bebc <_printf_i+0x210> 800bed6: e7eb b.n 800beb0 <_printf_i+0x204> 800bed8: 2500 movs r5, #0 800beda: f104 0619 add.w r6, r4, #25 800bede: e7f5 b.n 800becc <_printf_i+0x220> 800bee0: 0800c2bf .word 0x0800c2bf 800bee4: 0800c2d0 .word 0x0800c2d0 0800bee8 : 800bee8: 4288 cmp r0, r1 800beea: b510 push {r4, lr} 800beec: eb01 0402 add.w r4, r1, r2 800bef0: d902 bls.n 800bef8 800bef2: 4284 cmp r4, r0 800bef4: 4623 mov r3, r4 800bef6: d807 bhi.n 800bf08 800bef8: 1e43 subs r3, r0, #1 800befa: 42a1 cmp r1, r4 800befc: d008 beq.n 800bf10 800befe: f811 2b01 ldrb.w r2, [r1], #1 800bf02: f803 2f01 strb.w r2, [r3, #1]! 800bf06: e7f8 b.n 800befa 800bf08: 4601 mov r1, r0 800bf0a: 4402 add r2, r0 800bf0c: 428a cmp r2, r1 800bf0e: d100 bne.n 800bf12 800bf10: bd10 pop {r4, pc} 800bf12: f813 4d01 ldrb.w r4, [r3, #-1]! 800bf16: f802 4d01 strb.w r4, [r2, #-1]! 800bf1a: e7f7 b.n 800bf0c 0800bf1c <_sbrk_r>: 800bf1c: b538 push {r3, r4, r5, lr} 800bf1e: 2300 movs r3, #0 800bf20: 4d05 ldr r5, [pc, #20] @ (800bf38 <_sbrk_r+0x1c>) 800bf22: 4604 mov r4, r0 800bf24: 4608 mov r0, r1 800bf26: 602b str r3, [r5, #0] 800bf28: f7f6 fabc bl 80024a4 <_sbrk> 800bf2c: 1c43 adds r3, r0, #1 800bf2e: d102 bne.n 800bf36 <_sbrk_r+0x1a> 800bf30: 682b ldr r3, [r5, #0] 800bf32: b103 cbz r3, 800bf36 <_sbrk_r+0x1a> 800bf34: 6023 str r3, [r4, #0] 800bf36: bd38 pop {r3, r4, r5, pc} 800bf38: 2000180c .word 0x2000180c 0800bf3c : 800bf3c: 4603 mov r3, r0 800bf3e: b510 push {r4, lr} 800bf40: b2c9 uxtb r1, r1 800bf42: 4402 add r2, r0 800bf44: 4293 cmp r3, r2 800bf46: 4618 mov r0, r3 800bf48: d101 bne.n 800bf4e 800bf4a: 2000 movs r0, #0 800bf4c: e003 b.n 800bf56 800bf4e: 7804 ldrb r4, [r0, #0] 800bf50: 3301 adds r3, #1 800bf52: 428c cmp r4, r1 800bf54: d1f6 bne.n 800bf44 800bf56: bd10 pop {r4, pc} 0800bf58 : 800bf58: 440a add r2, r1 800bf5a: 4291 cmp r1, r2 800bf5c: f100 33ff add.w r3, r0, #4294967295 800bf60: d100 bne.n 800bf64 800bf62: 4770 bx lr 800bf64: b510 push {r4, lr} 800bf66: f811 4b01 ldrb.w r4, [r1], #1 800bf6a: 4291 cmp r1, r2 800bf6c: f803 4f01 strb.w r4, [r3, #1]! 800bf70: d1f9 bne.n 800bf66 800bf72: bd10 pop {r4, pc} 0800bf74 <_realloc_r>: 800bf74: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 800bf78: 4607 mov r7, r0 800bf7a: 4614 mov r4, r2 800bf7c: 460d mov r5, r1 800bf7e: b921 cbnz r1, 800bf8a <_realloc_r+0x16> 800bf80: 4611 mov r1, r2 800bf82: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 800bf86: f7ff bc3b b.w 800b800 <_malloc_r> 800bf8a: b92a cbnz r2, 800bf98 <_realloc_r+0x24> 800bf8c: f7ff fbce bl 800b72c <_free_r> 800bf90: 4625 mov r5, r4 800bf92: 4628 mov r0, r5 800bf94: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800bf98: f000 f81a bl 800bfd0 <_malloc_usable_size_r> 800bf9c: 4284 cmp r4, r0 800bf9e: 4606 mov r6, r0 800bfa0: d802 bhi.n 800bfa8 <_realloc_r+0x34> 800bfa2: ebb4 0f50 cmp.w r4, r0, lsr #1 800bfa6: d8f4 bhi.n 800bf92 <_realloc_r+0x1e> 800bfa8: 4621 mov r1, r4 800bfaa: 4638 mov r0, r7 800bfac: f7ff fc28 bl 800b800 <_malloc_r> 800bfb0: 4680 mov r8, r0 800bfb2: b908 cbnz r0, 800bfb8 <_realloc_r+0x44> 800bfb4: 4645 mov r5, r8 800bfb6: e7ec b.n 800bf92 <_realloc_r+0x1e> 800bfb8: 42b4 cmp r4, r6 800bfba: 4622 mov r2, r4 800bfbc: 4629 mov r1, r5 800bfbe: bf28 it cs 800bfc0: 4632 movcs r2, r6 800bfc2: f7ff ffc9 bl 800bf58 800bfc6: 4629 mov r1, r5 800bfc8: 4638 mov r0, r7 800bfca: f7ff fbaf bl 800b72c <_free_r> 800bfce: e7f1 b.n 800bfb4 <_realloc_r+0x40> 0800bfd0 <_malloc_usable_size_r>: 800bfd0: f851 3c04 ldr.w r3, [r1, #-4] 800bfd4: 1f18 subs r0, r3, #4 800bfd6: 2b00 cmp r3, #0 800bfd8: bfbc itt lt 800bfda: 580b ldrlt r3, [r1, r0] 800bfdc: 18c0 addlt r0, r0, r3 800bfde: 4770 bx lr 0800bfe0 <_init>: 800bfe0: b5f8 push {r3, r4, r5, r6, r7, lr} 800bfe2: bf00 nop 800bfe4: bcf8 pop {r3, r4, r5, r6, r7} 800bfe6: bc08 pop {r3} 800bfe8: 469e mov lr, r3 800bfea: 4770 bx lr 0800bfec <_fini>: 800bfec: b5f8 push {r3, r4, r5, r6, r7, lr} 800bfee: bf00 nop 800bff0: bcf8 pop {r3, r4, r5, r6, r7} 800bff2: bc08 pop {r3} 800bff4: 469e mov lr, r3 800bff6: 4770 bx lr