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0471607dd4a9756e99a9284ee6bf89db2d4bce02
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea 7eb7af3218 wip
2025-11-14 00:27:58 +01:00

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AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000993c 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000000b0 08009a48 08009a48 0000aa48 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 08009af8 08009af8 0000b1cc 2**0
CONTENTS, READONLY
4 .ARM 00000000 08009af8 08009af8 0000b1cc 2**0
CONTENTS, READONLY
5 .preinit_array 00000000 08009af8 08009af8 0000b1cc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 08009af8 08009af8 0000aaf8 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 08009afc 08009afc 0000aafc 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001cc 20000000 08009b00 0000b000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00001584 200001cc 08009ccc 0000b1cc 2**2
ALLOC
10 ._user_heap_stack 00000600 20001750 08009ccc 0000b750 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 0000b1cc 2**0
CONTENTS, READONLY
12 .debug_info 00012100 00000000 00000000 0000b1f5 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00003383 00000000 00000000 0001d2f5 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00001128 00000000 00000000 00020678 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00000d03 00000000 00000000 000217a0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001ac13 00000000 00000000 000224a3 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 000154b5 00000000 00000000 0003d0b6 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 0009207c 00000000 00000000 0005256b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 000e45e7 2**0
CONTENTS, READONLY
20 .debug_frame 00004b6c 00000000 00000000 000e462c 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 000e9198 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001cc .word 0x200001cc
8000128: 00000000 .word 0x00000000
800012c: 08009a30 .word 0x08009a30
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001d0 .word 0x200001d0
8000148: 08009a30 .word 0x08009a30
0800014c <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
800014c: b580 push {r7, lr}
800014e: af00 add r7, sp, #0
static unsigned char c10ms = 0;
static uint8_t c100ms = 0;
static uint8_t c1s = 0;
if (++c10ms >= 10) { // 10 ms
8000150: 4b16 ldr r3, [pc, #88] @ (80001ac <HAL_SYSTICK_Callback+0x60>)
8000152: 781b ldrb r3, [r3, #0]
8000154: 3301 adds r3, #1
8000156: b2da uxtb r2, r3
8000158: 4b14 ldr r3, [pc, #80] @ (80001ac <HAL_SYSTICK_Callback+0x60>)
800015a: 701a strb r2, [r3, #0]
800015c: 4b13 ldr r3, [pc, #76] @ (80001ac <HAL_SYSTICK_Callback+0x60>)
800015e: 781b ldrb r3, [r3, #0]
8000160: 2b09 cmp r3, #9
8000162: d921 bls.n 80001a8 <HAL_SYSTICK_Callback+0x5c>
c10ms = 0;
8000164: 4b11 ldr r3, [pc, #68] @ (80001ac <HAL_SYSTICK_Callback+0x60>)
8000166: 2200 movs r2, #0
8000168: 701a strb r2, [r3, #0]
if (++c100ms >= 10) { // 10 ms
800016a: 4b11 ldr r3, [pc, #68] @ (80001b0 <HAL_SYSTICK_Callback+0x64>)
800016c: 781b ldrb r3, [r3, #0]
800016e: 3301 adds r3, #1
8000170: b2da uxtb r2, r3
8000172: 4b0f ldr r3, [pc, #60] @ (80001b0 <HAL_SYSTICK_Callback+0x64>)
8000174: 701a strb r2, [r3, #0]
8000176: 4b0e ldr r3, [pc, #56] @ (80001b0 <HAL_SYSTICK_Callback+0x64>)
8000178: 781b ldrb r3, [r3, #0]
800017a: 2b09 cmp r3, #9
800017c: d914 bls.n 80001a8 <HAL_SYSTICK_Callback+0x5c>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
800017e: 4b0c ldr r3, [pc, #48] @ (80001b0 <HAL_SYSTICK_Callback+0x64>)
8000180: 2200 movs r2, #0
8000182: 701a strb r2, [r3, #0]
if (++c1s >= 10) { // 10 ms
8000184: 4b0b ldr r3, [pc, #44] @ (80001b4 <HAL_SYSTICK_Callback+0x68>)
8000186: 781b ldrb r3, [r3, #0]
8000188: 3301 adds r3, #1
800018a: b2da uxtb r2, r3
800018c: 4b09 ldr r3, [pc, #36] @ (80001b4 <HAL_SYSTICK_Callback+0x68>)
800018e: 701a strb r2, [r3, #0]
8000190: 4b08 ldr r3, [pc, #32] @ (80001b4 <HAL_SYSTICK_Callback+0x68>)
8000192: 781b ldrb r3, [r3, #0]
8000194: 2b09 cmp r3, #9
8000196: d907 bls.n 80001a8 <HAL_SYSTICK_Callback+0x5c>
c1s = 0;
8000198: 4b06 ldr r3, [pc, #24] @ (80001b4 <HAL_SYSTICK_Callback+0x68>)
800019a: 2200 movs r2, #0
800019c: 701a strb r2, [r3, #0]
HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13);
800019e: f44f 5100 mov.w r1, #8192 @ 0x2000
80001a2: 4805 ldr r0, [pc, #20] @ (80001b8 <HAL_SYSTICK_Callback+0x6c>)
80001a4: f001 fb36 bl 8001814 <HAL_GPIO_TogglePin>
}
}
}
}
80001a8: bf00 nop
80001aa: bd80 pop {r7, pc}
80001ac: 20000338 .word 0x20000338
80001b0: 20000339 .word 0x20000339
80001b4: 2000033a .word 0x2000033a
80001b8: 40011000 .word 0x40011000
080001bc <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
80001bc: b580 push {r7, lr}
80001be: b09a sub sp, #104 @ 0x68
80001c0: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
80001c2: f000 fe03 bl 8000dcc <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
80001c6: f000 f853 bl 8000270 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
80001ca: f000 fb95 bl 80008f8 <MX_GPIO_Init>
MX_USB_DEVICE_Init();
80001ce: f008 fa65 bl 800869c <MX_USB_DEVICE_Init>
MX_TIM2_Init();
80001d2: f000 f9a9 bl 8000528 <MX_TIM2_Init>
MX_TIM4_Init();
80001d6: f000 faed bl 80007b4 <MX_TIM4_Init>
MX_TIM3_Init();
80001da: f000 fa49 bl 8000670 <MX_TIM3_Init>
MX_ADC1_Init();
80001de: f000 f8a5 bl 800032c <MX_ADC1_Init>
MX_TIM1_Init();
80001e2: f000 f8e1 bl 80003a8 <MX_TIM1_Init>
// HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
// HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_2);
// HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_3);
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1);
80001e6: 2100 movs r1, #0
80001e8: 481d ldr r0, [pc, #116] @ (8000260 <main+0xa4>)
80001ea: f003 fdc9 bl 8003d80 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
80001ee: 2104 movs r1, #4
80001f0: 481b ldr r0, [pc, #108] @ (8000260 <main+0xa4>)
80001f2: f003 fdc5 bl 8003d80 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
80001f6: 2108 movs r1, #8
80001f8: 4819 ldr r0, [pc, #100] @ (8000260 <main+0xa4>)
80001fa: f003 fdc1 bl 8003d80 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
80001fe: 210c movs r1, #12
8000200: 4817 ldr r0, [pc, #92] @ (8000260 <main+0xa4>)
8000202: f003 fdbd bl 8003d80 <HAL_TIM_PWM_Start>
// HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1);
// HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_2);
// HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3);
// HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4);
HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1);
8000206: 2100 movs r1, #0
8000208: 4816 ldr r0, [pc, #88] @ (8000264 <main+0xa8>)
800020a: f003 fdb9 bl 8003d80 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_2);
800020e: 2104 movs r1, #4
8000210: 4814 ldr r0, [pc, #80] @ (8000264 <main+0xa8>)
8000212: f003 fdb5 bl 8003d80 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3);
8000216: 2108 movs r1, #8
8000218: 4812 ldr r0, [pc, #72] @ (8000264 <main+0xa8>)
800021a: f003 fdb1 bl 8003d80 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4);
800021e: 210c movs r1, #12
8000220: 4810 ldr r0, [pc, #64] @ (8000264 <main+0xa8>)
8000222: f003 fdad bl 8003d80 <HAL_TIM_PWM_Start>
/* USER CODE BEGIN 2 */
CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
8000226: 2107 movs r1, #7
8000228: 480f ldr r0, [pc, #60] @ (8000268 <main+0xac>)
800022a: f008 fb73 bl 8008914 <CDC_Transmit_FS>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
while (CDC_Available()) {
800022e: e011 b.n 8000254 <main+0x98>
int c = CDC_ReadByte();
8000230: f008 faae bl 8008790 <CDC_ReadByte>
8000234: 6678 str r0, [r7, #100] @ 0x64
// uint8_t out = (uint8_t)c;
// if (out >= 'a' && out <= 'z') out -= 32; // to upper
unsigned char s[100];
sprintf((char*)s,"\nc=%03d",c);
8000236: 463b mov r3, r7
8000238: 6e7a ldr r2, [r7, #100] @ 0x64
800023a: 490c ldr r1, [pc, #48] @ (800026c <main+0xb0>)
800023c: 4618 mov r0, r3
800023e: f008 ff47 bl 80090d0 <siprintf>
while (CDC_Transmit_FS(s, 6) == USBD_BUSY) {
8000242: bf00 nop
8000244: 463b mov r3, r7
8000246: 2106 movs r1, #6
8000248: 4618 mov r0, r3
800024a: f008 fb63 bl 8008914 <CDC_Transmit_FS>
800024e: 4603 mov r3, r0
8000250: 2b01 cmp r3, #1
8000252: d0f7 beq.n 8000244 <main+0x88>
while (CDC_Available()) {
8000254: f008 fa88 bl 8008768 <CDC_Available>
8000258: 4603 mov r3, r0
800025a: 2b00 cmp r3, #0
800025c: d1e8 bne.n 8000230 <main+0x74>
800025e: e7f9 b.n 8000254 <main+0x98>
8000260: 20000260 .word 0x20000260
8000264: 200002f0 .word 0x200002f0
8000268: 08009a48 .word 0x08009a48
800026c: 08009a50 .word 0x08009a50
08000270 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8000270: b580 push {r7, lr}
8000272: b094 sub sp, #80 @ 0x50
8000274: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8000276: f107 0328 add.w r3, r7, #40 @ 0x28
800027a: 2228 movs r2, #40 @ 0x28
800027c: 2100 movs r1, #0
800027e: 4618 mov r0, r3
8000280: f008 ff48 bl 8009114 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8000284: f107 0314 add.w r3, r7, #20
8000288: 2200 movs r2, #0
800028a: 601a str r2, [r3, #0]
800028c: 605a str r2, [r3, #4]
800028e: 609a str r2, [r3, #8]
8000290: 60da str r2, [r3, #12]
8000292: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
8000294: 1d3b adds r3, r7, #4
8000296: 2200 movs r2, #0
8000298: 601a str r2, [r3, #0]
800029a: 605a str r2, [r3, #4]
800029c: 609a str r2, [r3, #8]
800029e: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
80002a0: 2301 movs r3, #1
80002a2: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
80002a4: f44f 3380 mov.w r3, #65536 @ 0x10000
80002a8: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
80002aa: 2300 movs r3, #0
80002ac: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
80002ae: 2301 movs r3, #1
80002b0: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
80002b2: 2302 movs r3, #2
80002b4: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
80002b6: f44f 3380 mov.w r3, #65536 @ 0x10000
80002ba: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
80002bc: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000
80002c0: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
80002c2: f107 0328 add.w r3, r7, #40 @ 0x28
80002c6: 4618 mov r0, r3
80002c8: f003 f81e bl 8003308 <HAL_RCC_OscConfig>
80002cc: 4603 mov r3, r0
80002ce: 2b00 cmp r3, #0
80002d0: d001 beq.n 80002d6 <SystemClock_Config+0x66>
{
Error_Handler();
80002d2: f000 fb69 bl 80009a8 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
80002d6: 230f movs r3, #15
80002d8: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
80002da: 2302 movs r3, #2
80002dc: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
80002de: 2300 movs r3, #0
80002e0: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
80002e2: f44f 6380 mov.w r3, #1024 @ 0x400
80002e6: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
80002e8: 2300 movs r3, #0
80002ea: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
80002ec: f107 0314 add.w r3, r7, #20
80002f0: 2102 movs r1, #2
80002f2: 4618 mov r0, r3
80002f4: f003 fa8a bl 800380c <HAL_RCC_ClockConfig>
80002f8: 4603 mov r3, r0
80002fa: 2b00 cmp r3, #0
80002fc: d001 beq.n 8000302 <SystemClock_Config+0x92>
{
Error_Handler();
80002fe: f000 fb53 bl 80009a8 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
8000302: 2312 movs r3, #18
8000304: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
8000306: f44f 4300 mov.w r3, #32768 @ 0x8000
800030a: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
800030c: 2300 movs r3, #0
800030e: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
8000310: 1d3b adds r3, r7, #4
8000312: 4618 mov r0, r3
8000314: f003 fbd6 bl 8003ac4 <HAL_RCCEx_PeriphCLKConfig>
8000318: 4603 mov r3, r0
800031a: 2b00 cmp r3, #0
800031c: d001 beq.n 8000322 <SystemClock_Config+0xb2>
{
Error_Handler();
800031e: f000 fb43 bl 80009a8 <Error_Handler>
}
}
8000322: bf00 nop
8000324: 3750 adds r7, #80 @ 0x50
8000326: 46bd mov sp, r7
8000328: bd80 pop {r7, pc}
...
0800032c <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
800032c: b580 push {r7, lr}
800032e: b084 sub sp, #16
8000330: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
8000332: 1d3b adds r3, r7, #4
8000334: 2200 movs r2, #0
8000336: 601a str r2, [r3, #0]
8000338: 605a str r2, [r3, #4]
800033a: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
800033c: 4b18 ldr r3, [pc, #96] @ (80003a0 <MX_ADC1_Init+0x74>)
800033e: 4a19 ldr r2, [pc, #100] @ (80003a4 <MX_ADC1_Init+0x78>)
8000340: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
8000342: 4b17 ldr r3, [pc, #92] @ (80003a0 <MX_ADC1_Init+0x74>)
8000344: 2200 movs r2, #0
8000346: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = DISABLE;
8000348: 4b15 ldr r3, [pc, #84] @ (80003a0 <MX_ADC1_Init+0x74>)
800034a: 2200 movs r2, #0
800034c: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
800034e: 4b14 ldr r3, [pc, #80] @ (80003a0 <MX_ADC1_Init+0x74>)
8000350: 2200 movs r2, #0
8000352: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8000354: 4b12 ldr r3, [pc, #72] @ (80003a0 <MX_ADC1_Init+0x74>)
8000356: f44f 2260 mov.w r2, #917504 @ 0xe0000
800035a: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
800035c: 4b10 ldr r3, [pc, #64] @ (80003a0 <MX_ADC1_Init+0x74>)
800035e: 2200 movs r2, #0
8000360: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 1;
8000362: 4b0f ldr r3, [pc, #60] @ (80003a0 <MX_ADC1_Init+0x74>)
8000364: 2201 movs r2, #1
8000366: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8000368: 480d ldr r0, [pc, #52] @ (80003a0 <MX_ADC1_Init+0x74>)
800036a: f000 fd91 bl 8000e90 <HAL_ADC_Init>
800036e: 4603 mov r3, r0
8000370: 2b00 cmp r3, #0
8000372: d001 beq.n 8000378 <MX_ADC1_Init+0x4c>
{
Error_Handler();
8000374: f000 fb18 bl 80009a8 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
8000378: 2304 movs r3, #4
800037a: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
800037c: 2301 movs r3, #1
800037e: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
8000380: 2300 movs r3, #0
8000382: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8000384: 1d3b adds r3, r7, #4
8000386: 4619 mov r1, r3
8000388: 4805 ldr r0, [pc, #20] @ (80003a0 <MX_ADC1_Init+0x74>)
800038a: f000 fe59 bl 8001040 <HAL_ADC_ConfigChannel>
800038e: 4603 mov r3, r0
8000390: 2b00 cmp r3, #0
8000392: d001 beq.n 8000398 <MX_ADC1_Init+0x6c>
{
Error_Handler();
8000394: f000 fb08 bl 80009a8 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8000398: bf00 nop
800039a: 3710 adds r7, #16
800039c: 46bd mov sp, r7
800039e: bd80 pop {r7, pc}
80003a0: 200001e8 .word 0x200001e8
80003a4: 40012400 .word 0x40012400
080003a8 <MX_TIM1_Init>:
* @brief TIM1 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM1_Init(void)
{
80003a8: b580 push {r7, lr}
80003aa: b096 sub sp, #88 @ 0x58
80003ac: af00 add r7, sp, #0
/* USER CODE BEGIN TIM1_Init 0 */
/* USER CODE END TIM1_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
80003ae: f107 0348 add.w r3, r7, #72 @ 0x48
80003b2: 2200 movs r2, #0
80003b4: 601a str r2, [r3, #0]
80003b6: 605a str r2, [r3, #4]
80003b8: 609a str r2, [r3, #8]
80003ba: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
80003bc: f107 0340 add.w r3, r7, #64 @ 0x40
80003c0: 2200 movs r2, #0
80003c2: 601a str r2, [r3, #0]
80003c4: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80003c6: f107 0324 add.w r3, r7, #36 @ 0x24
80003ca: 2200 movs r2, #0
80003cc: 601a str r2, [r3, #0]
80003ce: 605a str r2, [r3, #4]
80003d0: 609a str r2, [r3, #8]
80003d2: 60da str r2, [r3, #12]
80003d4: 611a str r2, [r3, #16]
80003d6: 615a str r2, [r3, #20]
80003d8: 619a str r2, [r3, #24]
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
80003da: 1d3b adds r3, r7, #4
80003dc: 2220 movs r2, #32
80003de: 2100 movs r1, #0
80003e0: 4618 mov r0, r3
80003e2: f008 fe97 bl 8009114 <memset>
/* USER CODE BEGIN TIM1_Init 1 */
/* USER CODE END TIM1_Init 1 */
htim1.Instance = TIM1;
80003e6: 4b4e ldr r3, [pc, #312] @ (8000520 <MX_TIM1_Init+0x178>)
80003e8: 4a4e ldr r2, [pc, #312] @ (8000524 <MX_TIM1_Init+0x17c>)
80003ea: 601a str r2, [r3, #0]
htim1.Init.Prescaler = 0;
80003ec: 4b4c ldr r3, [pc, #304] @ (8000520 <MX_TIM1_Init+0x178>)
80003ee: 2200 movs r2, #0
80003f0: 605a str r2, [r3, #4]
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
80003f2: 4b4b ldr r3, [pc, #300] @ (8000520 <MX_TIM1_Init+0x178>)
80003f4: 2200 movs r2, #0
80003f6: 609a str r2, [r3, #8]
htim1.Init.Period = 17999;
80003f8: 4b49 ldr r3, [pc, #292] @ (8000520 <MX_TIM1_Init+0x178>)
80003fa: f244 624f movw r2, #17999 @ 0x464f
80003fe: 60da str r2, [r3, #12]
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8000400: 4b47 ldr r3, [pc, #284] @ (8000520 <MX_TIM1_Init+0x178>)
8000402: 2200 movs r2, #0
8000404: 611a str r2, [r3, #16]
htim1.Init.RepetitionCounter = 0;
8000406: 4b46 ldr r3, [pc, #280] @ (8000520 <MX_TIM1_Init+0x178>)
8000408: 2200 movs r2, #0
800040a: 615a str r2, [r3, #20]
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
800040c: 4b44 ldr r3, [pc, #272] @ (8000520 <MX_TIM1_Init+0x178>)
800040e: 2200 movs r2, #0
8000410: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
8000412: 4843 ldr r0, [pc, #268] @ (8000520 <MX_TIM1_Init+0x178>)
8000414: f003 fc0c bl 8003c30 <HAL_TIM_Base_Init>
8000418: 4603 mov r3, r0
800041a: 2b00 cmp r3, #0
800041c: d001 beq.n 8000422 <MX_TIM1_Init+0x7a>
{
Error_Handler();
800041e: f000 fac3 bl 80009a8 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8000422: f44f 5380 mov.w r3, #4096 @ 0x1000
8000426: 64bb str r3, [r7, #72] @ 0x48
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
8000428: f107 0348 add.w r3, r7, #72 @ 0x48
800042c: 4619 mov r1, r3
800042e: 483c ldr r0, [pc, #240] @ (8000520 <MX_TIM1_Init+0x178>)
8000430: f003 fe0a bl 8004048 <HAL_TIM_ConfigClockSource>
8000434: 4603 mov r3, r0
8000436: 2b00 cmp r3, #0
8000438: d001 beq.n 800043e <MX_TIM1_Init+0x96>
{
Error_Handler();
800043a: f000 fab5 bl 80009a8 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
800043e: 4838 ldr r0, [pc, #224] @ (8000520 <MX_TIM1_Init+0x178>)
8000440: f003 fc45 bl 8003cce <HAL_TIM_PWM_Init>
8000444: 4603 mov r3, r0
8000446: 2b00 cmp r3, #0
8000448: d001 beq.n 800044e <MX_TIM1_Init+0xa6>
{
Error_Handler();
800044a: f000 faad bl 80009a8 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
800044e: 2300 movs r3, #0
8000450: 643b str r3, [r7, #64] @ 0x40
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8000452: 2300 movs r3, #0
8000454: 647b str r3, [r7, #68] @ 0x44
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
8000456: f107 0340 add.w r3, r7, #64 @ 0x40
800045a: 4619 mov r1, r3
800045c: 4830 ldr r0, [pc, #192] @ (8000520 <MX_TIM1_Init+0x178>)
800045e: f004 f96b bl 8004738 <HAL_TIMEx_MasterConfigSynchronization>
8000462: 4603 mov r3, r0
8000464: 2b00 cmp r3, #0
8000466: d001 beq.n 800046c <MX_TIM1_Init+0xc4>
{
Error_Handler();
8000468: f000 fa9e bl 80009a8 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
800046c: 2360 movs r3, #96 @ 0x60
800046e: 627b str r3, [r7, #36] @ 0x24
sConfigOC.Pulse = 2400;
8000470: f44f 6316 mov.w r3, #2400 @ 0x960
8000474: 62bb str r3, [r7, #40] @ 0x28
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8000476: 2300 movs r3, #0
8000478: 62fb str r3, [r7, #44] @ 0x2c
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
800047a: 2300 movs r3, #0
800047c: 633b str r3, [r7, #48] @ 0x30
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800047e: 2304 movs r3, #4
8000480: 637b str r3, [r7, #52] @ 0x34
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
8000482: 2300 movs r3, #0
8000484: 63bb str r3, [r7, #56] @ 0x38
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
8000486: 2300 movs r3, #0
8000488: 63fb str r3, [r7, #60] @ 0x3c
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
800048a: f107 0324 add.w r3, r7, #36 @ 0x24
800048e: 2200 movs r2, #0
8000490: 4619 mov r1, r3
8000492: 4823 ldr r0, [pc, #140] @ (8000520 <MX_TIM1_Init+0x178>)
8000494: f003 fd16 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
8000498: 4603 mov r3, r0
800049a: 2b00 cmp r3, #0
800049c: d001 beq.n 80004a2 <MX_TIM1_Init+0xfa>
{
Error_Handler();
800049e: f000 fa83 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 5500;
80004a2: f241 537c movw r3, #5500 @ 0x157c
80004a6: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
80004a8: f107 0324 add.w r3, r7, #36 @ 0x24
80004ac: 2204 movs r2, #4
80004ae: 4619 mov r1, r3
80004b0: 481b ldr r0, [pc, #108] @ (8000520 <MX_TIM1_Init+0x178>)
80004b2: f003 fd07 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
80004b6: 4603 mov r3, r0
80004b8: 2b00 cmp r3, #0
80004ba: d001 beq.n 80004c0 <MX_TIM1_Init+0x118>
{
Error_Handler();
80004bc: f000 fa74 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 6500;
80004c0: f641 1364 movw r3, #6500 @ 0x1964
80004c4: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
80004c6: f107 0324 add.w r3, r7, #36 @ 0x24
80004ca: 2208 movs r2, #8
80004cc: 4619 mov r1, r3
80004ce: 4814 ldr r0, [pc, #80] @ (8000520 <MX_TIM1_Init+0x178>)
80004d0: f003 fcf8 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
80004d4: 4603 mov r3, r0
80004d6: 2b00 cmp r3, #0
80004d8: d001 beq.n 80004de <MX_TIM1_Init+0x136>
{
Error_Handler();
80004da: f000 fa65 bl 80009a8 <Error_Handler>
}
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
80004de: 2300 movs r3, #0
80004e0: 607b str r3, [r7, #4]
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
80004e2: 2300 movs r3, #0
80004e4: 60bb str r3, [r7, #8]
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
80004e6: 2300 movs r3, #0
80004e8: 60fb str r3, [r7, #12]
sBreakDeadTimeConfig.DeadTime = 0;
80004ea: 2300 movs r3, #0
80004ec: 613b str r3, [r7, #16]
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
80004ee: 2300 movs r3, #0
80004f0: 617b str r3, [r7, #20]
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
80004f2: f44f 5300 mov.w r3, #8192 @ 0x2000
80004f6: 61bb str r3, [r7, #24]
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
80004f8: 2300 movs r3, #0
80004fa: 623b str r3, [r7, #32]
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
80004fc: 1d3b adds r3, r7, #4
80004fe: 4619 mov r1, r3
8000500: 4807 ldr r0, [pc, #28] @ (8000520 <MX_TIM1_Init+0x178>)
8000502: f004 f977 bl 80047f4 <HAL_TIMEx_ConfigBreakDeadTime>
8000506: 4603 mov r3, r0
8000508: 2b00 cmp r3, #0
800050a: d001 beq.n 8000510 <MX_TIM1_Init+0x168>
{
Error_Handler();
800050c: f000 fa4c bl 80009a8 <Error_Handler>
}
/* USER CODE BEGIN TIM1_Init 2 */
/* USER CODE END TIM1_Init 2 */
HAL_TIM_MspPostInit(&htim1);
8000510: 4803 ldr r0, [pc, #12] @ (8000520 <MX_TIM1_Init+0x178>)
8000512: f000 fb15 bl 8000b40 <HAL_TIM_MspPostInit>
}
8000516: bf00 nop
8000518: 3758 adds r7, #88 @ 0x58
800051a: 46bd mov sp, r7
800051c: bd80 pop {r7, pc}
800051e: bf00 nop
8000520: 20000218 .word 0x20000218
8000524: 40012c00 .word 0x40012c00
08000528 <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
8000528: b580 push {r7, lr}
800052a: b08e sub sp, #56 @ 0x38
800052c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
800052e: f107 0328 add.w r3, r7, #40 @ 0x28
8000532: 2200 movs r2, #0
8000534: 601a str r2, [r3, #0]
8000536: 605a str r2, [r3, #4]
8000538: 609a str r2, [r3, #8]
800053a: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
800053c: f107 0320 add.w r3, r7, #32
8000540: 2200 movs r2, #0
8000542: 601a str r2, [r3, #0]
8000544: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8000546: 1d3b adds r3, r7, #4
8000548: 2200 movs r2, #0
800054a: 601a str r2, [r3, #0]
800054c: 605a str r2, [r3, #4]
800054e: 609a str r2, [r3, #8]
8000550: 60da str r2, [r3, #12]
8000552: 611a str r2, [r3, #16]
8000554: 615a str r2, [r3, #20]
8000556: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8000558: 4b44 ldr r3, [pc, #272] @ (800066c <MX_TIM2_Init+0x144>)
800055a: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
800055e: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8000560: 4b42 ldr r3, [pc, #264] @ (800066c <MX_TIM2_Init+0x144>)
8000562: 2200 movs r2, #0
8000564: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
8000566: 4b41 ldr r3, [pc, #260] @ (800066c <MX_TIM2_Init+0x144>)
8000568: 2200 movs r2, #0
800056a: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
800056c: 4b3f ldr r3, [pc, #252] @ (800066c <MX_TIM2_Init+0x144>)
800056e: f244 624f movw r2, #17999 @ 0x464f
8000572: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8000574: 4b3d ldr r3, [pc, #244] @ (800066c <MX_TIM2_Init+0x144>)
8000576: 2200 movs r2, #0
8000578: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
800057a: 4b3c ldr r3, [pc, #240] @ (800066c <MX_TIM2_Init+0x144>)
800057c: 2200 movs r2, #0
800057e: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
8000580: 483a ldr r0, [pc, #232] @ (800066c <MX_TIM2_Init+0x144>)
8000582: f003 fb55 bl 8003c30 <HAL_TIM_Base_Init>
8000586: 4603 mov r3, r0
8000588: 2b00 cmp r3, #0
800058a: d001 beq.n 8000590 <MX_TIM2_Init+0x68>
{
Error_Handler();
800058c: f000 fa0c bl 80009a8 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8000590: f44f 5380 mov.w r3, #4096 @ 0x1000
8000594: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
8000596: f107 0328 add.w r3, r7, #40 @ 0x28
800059a: 4619 mov r1, r3
800059c: 4833 ldr r0, [pc, #204] @ (800066c <MX_TIM2_Init+0x144>)
800059e: f003 fd53 bl 8004048 <HAL_TIM_ConfigClockSource>
80005a2: 4603 mov r3, r0
80005a4: 2b00 cmp r3, #0
80005a6: d001 beq.n 80005ac <MX_TIM2_Init+0x84>
{
Error_Handler();
80005a8: f000 f9fe bl 80009a8 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
80005ac: 482f ldr r0, [pc, #188] @ (800066c <MX_TIM2_Init+0x144>)
80005ae: f003 fb8e bl 8003cce <HAL_TIM_PWM_Init>
80005b2: 4603 mov r3, r0
80005b4: 2b00 cmp r3, #0
80005b6: d001 beq.n 80005bc <MX_TIM2_Init+0x94>
{
Error_Handler();
80005b8: f000 f9f6 bl 80009a8 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80005bc: 2300 movs r3, #0
80005be: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80005c0: 2300 movs r3, #0
80005c2: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
80005c4: f107 0320 add.w r3, r7, #32
80005c8: 4619 mov r1, r3
80005ca: 4828 ldr r0, [pc, #160] @ (800066c <MX_TIM2_Init+0x144>)
80005cc: f004 f8b4 bl 8004738 <HAL_TIMEx_MasterConfigSynchronization>
80005d0: 4603 mov r3, r0
80005d2: 2b00 cmp r3, #0
80005d4: d001 beq.n 80005da <MX_TIM2_Init+0xb2>
{
Error_Handler();
80005d6: f000 f9e7 bl 80009a8 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
80005da: 2360 movs r3, #96 @ 0x60
80005dc: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
80005de: f44f 737a mov.w r3, #1000 @ 0x3e8
80005e2: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
80005e4: 2300 movs r3, #0
80005e6: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80005e8: 2304 movs r3, #4
80005ea: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
80005ec: 1d3b adds r3, r7, #4
80005ee: 2200 movs r2, #0
80005f0: 4619 mov r1, r3
80005f2: 481e ldr r0, [pc, #120] @ (800066c <MX_TIM2_Init+0x144>)
80005f4: f003 fc66 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
80005f8: 4603 mov r3, r0
80005fa: 2b00 cmp r3, #0
80005fc: d001 beq.n 8000602 <MX_TIM2_Init+0xda>
{
Error_Handler();
80005fe: f000 f9d3 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 2000;
8000602: f44f 63fa mov.w r3, #2000 @ 0x7d0
8000606: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8000608: 1d3b adds r3, r7, #4
800060a: 2204 movs r2, #4
800060c: 4619 mov r1, r3
800060e: 4817 ldr r0, [pc, #92] @ (800066c <MX_TIM2_Init+0x144>)
8000610: f003 fc58 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
8000614: 4603 mov r3, r0
8000616: 2b00 cmp r3, #0
8000618: d001 beq.n 800061e <MX_TIM2_Init+0xf6>
{
Error_Handler();
800061a: f000 f9c5 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 3000;
800061e: f640 33b8 movw r3, #3000 @ 0xbb8
8000622: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
8000624: 2300 movs r3, #0
8000626: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8000628: 1d3b adds r3, r7, #4
800062a: 2208 movs r2, #8
800062c: 4619 mov r1, r3
800062e: 480f ldr r0, [pc, #60] @ (800066c <MX_TIM2_Init+0x144>)
8000630: f003 fc48 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
8000634: 4603 mov r3, r0
8000636: 2b00 cmp r3, #0
8000638: d001 beq.n 800063e <MX_TIM2_Init+0x116>
{
Error_Handler();
800063a: f000 f9b5 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 4000;
800063e: f44f 637a mov.w r3, #4000 @ 0xfa0
8000642: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8000644: 2304 movs r3, #4
8000646: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8000648: 1d3b adds r3, r7, #4
800064a: 220c movs r2, #12
800064c: 4619 mov r1, r3
800064e: 4807 ldr r0, [pc, #28] @ (800066c <MX_TIM2_Init+0x144>)
8000650: f003 fc38 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
8000654: 4603 mov r3, r0
8000656: 2b00 cmp r3, #0
8000658: d001 beq.n 800065e <MX_TIM2_Init+0x136>
{
Error_Handler();
800065a: f000 f9a5 bl 80009a8 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
800065e: 4803 ldr r0, [pc, #12] @ (800066c <MX_TIM2_Init+0x144>)
8000660: f000 fa6e bl 8000b40 <HAL_TIM_MspPostInit>
}
8000664: bf00 nop
8000666: 3738 adds r7, #56 @ 0x38
8000668: 46bd mov sp, r7
800066a: bd80 pop {r7, pc}
800066c: 20000260 .word 0x20000260
08000670 <MX_TIM3_Init>:
* @brief TIM3 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM3_Init(void)
{
8000670: b580 push {r7, lr}
8000672: b08e sub sp, #56 @ 0x38
8000674: af00 add r7, sp, #0
/* USER CODE BEGIN TIM3_Init 0 */
/* USER CODE END TIM3_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8000676: f107 0328 add.w r3, r7, #40 @ 0x28
800067a: 2200 movs r2, #0
800067c: 601a str r2, [r3, #0]
800067e: 605a str r2, [r3, #4]
8000680: 609a str r2, [r3, #8]
8000682: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8000684: f107 0320 add.w r3, r7, #32
8000688: 2200 movs r2, #0
800068a: 601a str r2, [r3, #0]
800068c: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
800068e: 1d3b adds r3, r7, #4
8000690: 2200 movs r2, #0
8000692: 601a str r2, [r3, #0]
8000694: 605a str r2, [r3, #4]
8000696: 609a str r2, [r3, #8]
8000698: 60da str r2, [r3, #12]
800069a: 611a str r2, [r3, #16]
800069c: 615a str r2, [r3, #20]
800069e: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3;
80006a0: 4b42 ldr r3, [pc, #264] @ (80007ac <MX_TIM3_Init+0x13c>)
80006a2: 4a43 ldr r2, [pc, #268] @ (80007b0 <MX_TIM3_Init+0x140>)
80006a4: 601a str r2, [r3, #0]
htim3.Init.Prescaler = 0;
80006a6: 4b41 ldr r3, [pc, #260] @ (80007ac <MX_TIM3_Init+0x13c>)
80006a8: 2200 movs r2, #0
80006aa: 605a str r2, [r3, #4]
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
80006ac: 4b3f ldr r3, [pc, #252] @ (80007ac <MX_TIM3_Init+0x13c>)
80006ae: 2200 movs r2, #0
80006b0: 609a str r2, [r3, #8]
htim3.Init.Period = 17999;
80006b2: 4b3e ldr r3, [pc, #248] @ (80007ac <MX_TIM3_Init+0x13c>)
80006b4: f244 624f movw r2, #17999 @ 0x464f
80006b8: 60da str r2, [r3, #12]
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80006ba: 4b3c ldr r3, [pc, #240] @ (80007ac <MX_TIM3_Init+0x13c>)
80006bc: 2200 movs r2, #0
80006be: 611a str r2, [r3, #16]
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80006c0: 4b3a ldr r3, [pc, #232] @ (80007ac <MX_TIM3_Init+0x13c>)
80006c2: 2200 movs r2, #0
80006c4: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
80006c6: 4839 ldr r0, [pc, #228] @ (80007ac <MX_TIM3_Init+0x13c>)
80006c8: f003 fab2 bl 8003c30 <HAL_TIM_Base_Init>
80006cc: 4603 mov r3, r0
80006ce: 2b00 cmp r3, #0
80006d0: d001 beq.n 80006d6 <MX_TIM3_Init+0x66>
{
Error_Handler();
80006d2: f000 f969 bl 80009a8 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80006d6: f44f 5380 mov.w r3, #4096 @ 0x1000
80006da: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
80006dc: f107 0328 add.w r3, r7, #40 @ 0x28
80006e0: 4619 mov r1, r3
80006e2: 4832 ldr r0, [pc, #200] @ (80007ac <MX_TIM3_Init+0x13c>)
80006e4: f003 fcb0 bl 8004048 <HAL_TIM_ConfigClockSource>
80006e8: 4603 mov r3, r0
80006ea: 2b00 cmp r3, #0
80006ec: d001 beq.n 80006f2 <MX_TIM3_Init+0x82>
{
Error_Handler();
80006ee: f000 f95b bl 80009a8 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
80006f2: 482e ldr r0, [pc, #184] @ (80007ac <MX_TIM3_Init+0x13c>)
80006f4: f003 faeb bl 8003cce <HAL_TIM_PWM_Init>
80006f8: 4603 mov r3, r0
80006fa: 2b00 cmp r3, #0
80006fc: d001 beq.n 8000702 <MX_TIM3_Init+0x92>
{
Error_Handler();
80006fe: f000 f953 bl 80009a8 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8000702: 2300 movs r3, #0
8000704: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8000706: 2300 movs r3, #0
8000708: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
800070a: f107 0320 add.w r3, r7, #32
800070e: 4619 mov r1, r3
8000710: 4826 ldr r0, [pc, #152] @ (80007ac <MX_TIM3_Init+0x13c>)
8000712: f004 f811 bl 8004738 <HAL_TIMEx_MasterConfigSynchronization>
8000716: 4603 mov r3, r0
8000718: 2b00 cmp r3, #0
800071a: d001 beq.n 8000720 <MX_TIM3_Init+0xb0>
{
Error_Handler();
800071c: f000 f944 bl 80009a8 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8000720: 2360 movs r3, #96 @ 0x60
8000722: 607b str r3, [r7, #4]
sConfigOC.Pulse = 9000;
8000724: f242 3328 movw r3, #9000 @ 0x2328
8000728: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
800072a: 2300 movs r3, #0
800072c: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800072e: 2304 movs r3, #4
8000730: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8000732: 1d3b adds r3, r7, #4
8000734: 2200 movs r2, #0
8000736: 4619 mov r1, r3
8000738: 481c ldr r0, [pc, #112] @ (80007ac <MX_TIM3_Init+0x13c>)
800073a: f003 fbc3 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
800073e: 4603 mov r3, r0
8000740: 2b00 cmp r3, #0
8000742: d001 beq.n 8000748 <MX_TIM3_Init+0xd8>
{
Error_Handler();
8000744: f000 f930 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 10000;
8000748: f242 7310 movw r3, #10000 @ 0x2710
800074c: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
800074e: 1d3b adds r3, r7, #4
8000750: 2204 movs r2, #4
8000752: 4619 mov r1, r3
8000754: 4815 ldr r0, [pc, #84] @ (80007ac <MX_TIM3_Init+0x13c>)
8000756: f003 fbb5 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
800075a: 4603 mov r3, r0
800075c: 2b00 cmp r3, #0
800075e: d001 beq.n 8000764 <MX_TIM3_Init+0xf4>
{
Error_Handler();
8000760: f000 f922 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 11000;
8000764: f642 23f8 movw r3, #11000 @ 0x2af8
8000768: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
800076a: 1d3b adds r3, r7, #4
800076c: 2208 movs r2, #8
800076e: 4619 mov r1, r3
8000770: 480e ldr r0, [pc, #56] @ (80007ac <MX_TIM3_Init+0x13c>)
8000772: f003 fba7 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
8000776: 4603 mov r3, r0
8000778: 2b00 cmp r3, #0
800077a: d001 beq.n 8000780 <MX_TIM3_Init+0x110>
{
Error_Handler();
800077c: f000 f914 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 12000;
8000780: f642 63e0 movw r3, #12000 @ 0x2ee0
8000784: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8000786: 1d3b adds r3, r7, #4
8000788: 220c movs r2, #12
800078a: 4619 mov r1, r3
800078c: 4807 ldr r0, [pc, #28] @ (80007ac <MX_TIM3_Init+0x13c>)
800078e: f003 fb99 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
8000792: 4603 mov r3, r0
8000794: 2b00 cmp r3, #0
8000796: d001 beq.n 800079c <MX_TIM3_Init+0x12c>
{
Error_Handler();
8000798: f000 f906 bl 80009a8 <Error_Handler>
}
/* USER CODE BEGIN TIM3_Init 2 */
/* USER CODE END TIM3_Init 2 */
HAL_TIM_MspPostInit(&htim3);
800079c: 4803 ldr r0, [pc, #12] @ (80007ac <MX_TIM3_Init+0x13c>)
800079e: f000 f9cf bl 8000b40 <HAL_TIM_MspPostInit>
}
80007a2: bf00 nop
80007a4: 3738 adds r7, #56 @ 0x38
80007a6: 46bd mov sp, r7
80007a8: bd80 pop {r7, pc}
80007aa: bf00 nop
80007ac: 200002a8 .word 0x200002a8
80007b0: 40000400 .word 0x40000400
080007b4 <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
80007b4: b580 push {r7, lr}
80007b6: b08e sub sp, #56 @ 0x38
80007b8: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
80007ba: f107 0328 add.w r3, r7, #40 @ 0x28
80007be: 2200 movs r2, #0
80007c0: 601a str r2, [r3, #0]
80007c2: 605a str r2, [r3, #4]
80007c4: 609a str r2, [r3, #8]
80007c6: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
80007c8: f107 0320 add.w r3, r7, #32
80007cc: 2200 movs r2, #0
80007ce: 601a str r2, [r3, #0]
80007d0: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80007d2: 1d3b adds r3, r7, #4
80007d4: 2200 movs r2, #0
80007d6: 601a str r2, [r3, #0]
80007d8: 605a str r2, [r3, #4]
80007da: 609a str r2, [r3, #8]
80007dc: 60da str r2, [r3, #12]
80007de: 611a str r2, [r3, #16]
80007e0: 615a str r2, [r3, #20]
80007e2: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
80007e4: 4b42 ldr r3, [pc, #264] @ (80008f0 <MX_TIM4_Init+0x13c>)
80007e6: 4a43 ldr r2, [pc, #268] @ (80008f4 <MX_TIM4_Init+0x140>)
80007e8: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
80007ea: 4b41 ldr r3, [pc, #260] @ (80008f0 <MX_TIM4_Init+0x13c>)
80007ec: 2200 movs r2, #0
80007ee: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
80007f0: 4b3f ldr r3, [pc, #252] @ (80008f0 <MX_TIM4_Init+0x13c>)
80007f2: 2200 movs r2, #0
80007f4: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
80007f6: 4b3e ldr r3, [pc, #248] @ (80008f0 <MX_TIM4_Init+0x13c>)
80007f8: f244 624f movw r2, #17999 @ 0x464f
80007fc: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80007fe: 4b3c ldr r3, [pc, #240] @ (80008f0 <MX_TIM4_Init+0x13c>)
8000800: 2200 movs r2, #0
8000802: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8000804: 4b3a ldr r3, [pc, #232] @ (80008f0 <MX_TIM4_Init+0x13c>)
8000806: 2200 movs r2, #0
8000808: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
800080a: 4839 ldr r0, [pc, #228] @ (80008f0 <MX_TIM4_Init+0x13c>)
800080c: f003 fa10 bl 8003c30 <HAL_TIM_Base_Init>
8000810: 4603 mov r3, r0
8000812: 2b00 cmp r3, #0
8000814: d001 beq.n 800081a <MX_TIM4_Init+0x66>
{
Error_Handler();
8000816: f000 f8c7 bl 80009a8 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
800081a: f44f 5380 mov.w r3, #4096 @ 0x1000
800081e: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
8000820: f107 0328 add.w r3, r7, #40 @ 0x28
8000824: 4619 mov r1, r3
8000826: 4832 ldr r0, [pc, #200] @ (80008f0 <MX_TIM4_Init+0x13c>)
8000828: f003 fc0e bl 8004048 <HAL_TIM_ConfigClockSource>
800082c: 4603 mov r3, r0
800082e: 2b00 cmp r3, #0
8000830: d001 beq.n 8000836 <MX_TIM4_Init+0x82>
{
Error_Handler();
8000832: f000 f8b9 bl 80009a8 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
8000836: 482e ldr r0, [pc, #184] @ (80008f0 <MX_TIM4_Init+0x13c>)
8000838: f003 fa49 bl 8003cce <HAL_TIM_PWM_Init>
800083c: 4603 mov r3, r0
800083e: 2b00 cmp r3, #0
8000840: d001 beq.n 8000846 <MX_TIM4_Init+0x92>
{
Error_Handler();
8000842: f000 f8b1 bl 80009a8 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8000846: 2300 movs r3, #0
8000848: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
800084a: 2300 movs r3, #0
800084c: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
800084e: f107 0320 add.w r3, r7, #32
8000852: 4619 mov r1, r3
8000854: 4826 ldr r0, [pc, #152] @ (80008f0 <MX_TIM4_Init+0x13c>)
8000856: f003 ff6f bl 8004738 <HAL_TIMEx_MasterConfigSynchronization>
800085a: 4603 mov r3, r0
800085c: 2b00 cmp r3, #0
800085e: d001 beq.n 8000864 <MX_TIM4_Init+0xb0>
{
Error_Handler();
8000860: f000 f8a2 bl 80009a8 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8000864: 2360 movs r3, #96 @ 0x60
8000866: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
8000868: f241 3388 movw r3, #5000 @ 0x1388
800086c: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
800086e: 2300 movs r3, #0
8000870: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8000872: 2304 movs r3, #4
8000874: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8000876: 1d3b adds r3, r7, #4
8000878: 2200 movs r2, #0
800087a: 4619 mov r1, r3
800087c: 481c ldr r0, [pc, #112] @ (80008f0 <MX_TIM4_Init+0x13c>)
800087e: f003 fb21 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
8000882: 4603 mov r3, r0
8000884: 2b00 cmp r3, #0
8000886: d001 beq.n 800088c <MX_TIM4_Init+0xd8>
{
Error_Handler();
8000888: f000 f88e bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 6000;
800088c: f241 7370 movw r3, #6000 @ 0x1770
8000890: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8000892: 1d3b adds r3, r7, #4
8000894: 2204 movs r2, #4
8000896: 4619 mov r1, r3
8000898: 4815 ldr r0, [pc, #84] @ (80008f0 <MX_TIM4_Init+0x13c>)
800089a: f003 fb13 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
800089e: 4603 mov r3, r0
80008a0: 2b00 cmp r3, #0
80008a2: d001 beq.n 80008a8 <MX_TIM4_Init+0xf4>
{
Error_Handler();
80008a4: f000 f880 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 7000;
80008a8: f641 3358 movw r3, #7000 @ 0x1b58
80008ac: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
80008ae: 1d3b adds r3, r7, #4
80008b0: 2208 movs r2, #8
80008b2: 4619 mov r1, r3
80008b4: 480e ldr r0, [pc, #56] @ (80008f0 <MX_TIM4_Init+0x13c>)
80008b6: f003 fb05 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
80008ba: 4603 mov r3, r0
80008bc: 2b00 cmp r3, #0
80008be: d001 beq.n 80008c4 <MX_TIM4_Init+0x110>
{
Error_Handler();
80008c0: f000 f872 bl 80009a8 <Error_Handler>
}
sConfigOC.Pulse = 8000;
80008c4: f44f 53fa mov.w r3, #8000 @ 0x1f40
80008c8: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
80008ca: 1d3b adds r3, r7, #4
80008cc: 220c movs r2, #12
80008ce: 4619 mov r1, r3
80008d0: 4807 ldr r0, [pc, #28] @ (80008f0 <MX_TIM4_Init+0x13c>)
80008d2: f003 faf7 bl 8003ec4 <HAL_TIM_PWM_ConfigChannel>
80008d6: 4603 mov r3, r0
80008d8: 2b00 cmp r3, #0
80008da: d001 beq.n 80008e0 <MX_TIM4_Init+0x12c>
{
Error_Handler();
80008dc: f000 f864 bl 80009a8 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
80008e0: 4803 ldr r0, [pc, #12] @ (80008f0 <MX_TIM4_Init+0x13c>)
80008e2: f000 f92d bl 8000b40 <HAL_TIM_MspPostInit>
}
80008e6: bf00 nop
80008e8: 3738 adds r7, #56 @ 0x38
80008ea: 46bd mov sp, r7
80008ec: bd80 pop {r7, pc}
80008ee: bf00 nop
80008f0: 200002f0 .word 0x200002f0
80008f4: 40000800 .word 0x40000800
080008f8 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
80008f8: b580 push {r7, lr}
80008fa: b088 sub sp, #32
80008fc: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
80008fe: f107 0310 add.w r3, r7, #16
8000902: 2200 movs r2, #0
8000904: 601a str r2, [r3, #0]
8000906: 605a str r2, [r3, #4]
8000908: 609a str r2, [r3, #8]
800090a: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
800090c: 4b24 ldr r3, [pc, #144] @ (80009a0 <MX_GPIO_Init+0xa8>)
800090e: 699b ldr r3, [r3, #24]
8000910: 4a23 ldr r2, [pc, #140] @ (80009a0 <MX_GPIO_Init+0xa8>)
8000912: f043 0310 orr.w r3, r3, #16
8000916: 6193 str r3, [r2, #24]
8000918: 4b21 ldr r3, [pc, #132] @ (80009a0 <MX_GPIO_Init+0xa8>)
800091a: 699b ldr r3, [r3, #24]
800091c: f003 0310 and.w r3, r3, #16
8000920: 60fb str r3, [r7, #12]
8000922: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
8000924: 4b1e ldr r3, [pc, #120] @ (80009a0 <MX_GPIO_Init+0xa8>)
8000926: 699b ldr r3, [r3, #24]
8000928: 4a1d ldr r2, [pc, #116] @ (80009a0 <MX_GPIO_Init+0xa8>)
800092a: f043 0320 orr.w r3, r3, #32
800092e: 6193 str r3, [r2, #24]
8000930: 4b1b ldr r3, [pc, #108] @ (80009a0 <MX_GPIO_Init+0xa8>)
8000932: 699b ldr r3, [r3, #24]
8000934: f003 0320 and.w r3, r3, #32
8000938: 60bb str r3, [r7, #8]
800093a: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
800093c: 4b18 ldr r3, [pc, #96] @ (80009a0 <MX_GPIO_Init+0xa8>)
800093e: 699b ldr r3, [r3, #24]
8000940: 4a17 ldr r2, [pc, #92] @ (80009a0 <MX_GPIO_Init+0xa8>)
8000942: f043 0304 orr.w r3, r3, #4
8000946: 6193 str r3, [r2, #24]
8000948: 4b15 ldr r3, [pc, #84] @ (80009a0 <MX_GPIO_Init+0xa8>)
800094a: 699b ldr r3, [r3, #24]
800094c: f003 0304 and.w r3, r3, #4
8000950: 607b str r3, [r7, #4]
8000952: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
8000954: 4b12 ldr r3, [pc, #72] @ (80009a0 <MX_GPIO_Init+0xa8>)
8000956: 699b ldr r3, [r3, #24]
8000958: 4a11 ldr r2, [pc, #68] @ (80009a0 <MX_GPIO_Init+0xa8>)
800095a: f043 0308 orr.w r3, r3, #8
800095e: 6193 str r3, [r2, #24]
8000960: 4b0f ldr r3, [pc, #60] @ (80009a0 <MX_GPIO_Init+0xa8>)
8000962: 699b ldr r3, [r3, #24]
8000964: f003 0308 and.w r3, r3, #8
8000968: 603b str r3, [r7, #0]
800096a: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
800096c: 2200 movs r2, #0
800096e: f44f 5100 mov.w r1, #8192 @ 0x2000
8000972: 480c ldr r0, [pc, #48] @ (80009a4 <MX_GPIO_Init+0xac>)
8000974: f000 ff36 bl 80017e4 <HAL_GPIO_WritePin>
/*Configure GPIO pin : PC13 */
GPIO_InitStruct.Pin = GPIO_PIN_13;
8000978: f44f 5300 mov.w r3, #8192 @ 0x2000
800097c: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800097e: 2301 movs r3, #1
8000980: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000982: 2300 movs r3, #0
8000984: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000986: 2302 movs r3, #2
8000988: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
800098a: f107 0310 add.w r3, r7, #16
800098e: 4619 mov r1, r3
8000990: 4804 ldr r0, [pc, #16] @ (80009a4 <MX_GPIO_Init+0xac>)
8000992: f000 fda3 bl 80014dc <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8000996: bf00 nop
8000998: 3720 adds r7, #32
800099a: 46bd mov sp, r7
800099c: bd80 pop {r7, pc}
800099e: bf00 nop
80009a0: 40021000 .word 0x40021000
80009a4: 40011000 .word 0x40011000
080009a8 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
80009a8: b480 push {r7}
80009aa: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
80009ac: b672 cpsid i
}
80009ae: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
80009b0: bf00 nop
80009b2: e7fd b.n 80009b0 <Error_Handler+0x8>
080009b4 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
80009b4: b480 push {r7}
80009b6: b085 sub sp, #20
80009b8: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
80009ba: 4b15 ldr r3, [pc, #84] @ (8000a10 <HAL_MspInit+0x5c>)
80009bc: 699b ldr r3, [r3, #24]
80009be: 4a14 ldr r2, [pc, #80] @ (8000a10 <HAL_MspInit+0x5c>)
80009c0: f043 0301 orr.w r3, r3, #1
80009c4: 6193 str r3, [r2, #24]
80009c6: 4b12 ldr r3, [pc, #72] @ (8000a10 <HAL_MspInit+0x5c>)
80009c8: 699b ldr r3, [r3, #24]
80009ca: f003 0301 and.w r3, r3, #1
80009ce: 60bb str r3, [r7, #8]
80009d0: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
80009d2: 4b0f ldr r3, [pc, #60] @ (8000a10 <HAL_MspInit+0x5c>)
80009d4: 69db ldr r3, [r3, #28]
80009d6: 4a0e ldr r2, [pc, #56] @ (8000a10 <HAL_MspInit+0x5c>)
80009d8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80009dc: 61d3 str r3, [r2, #28]
80009de: 4b0c ldr r3, [pc, #48] @ (8000a10 <HAL_MspInit+0x5c>)
80009e0: 69db ldr r3, [r3, #28]
80009e2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80009e6: 607b str r3, [r7, #4]
80009e8: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
*/
__HAL_AFIO_REMAP_SWJ_DISABLE();
80009ea: 4b0a ldr r3, [pc, #40] @ (8000a14 <HAL_MspInit+0x60>)
80009ec: 685b ldr r3, [r3, #4]
80009ee: 60fb str r3, [r7, #12]
80009f0: 68fb ldr r3, [r7, #12]
80009f2: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
80009f6: 60fb str r3, [r7, #12]
80009f8: 68fb ldr r3, [r7, #12]
80009fa: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000
80009fe: 60fb str r3, [r7, #12]
8000a00: 4a04 ldr r2, [pc, #16] @ (8000a14 <HAL_MspInit+0x60>)
8000a02: 68fb ldr r3, [r7, #12]
8000a04: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8000a06: bf00 nop
8000a08: 3714 adds r7, #20
8000a0a: 46bd mov sp, r7
8000a0c: bc80 pop {r7}
8000a0e: 4770 bx lr
8000a10: 40021000 .word 0x40021000
8000a14: 40010000 .word 0x40010000
08000a18 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8000a18: b580 push {r7, lr}
8000a1a: b088 sub sp, #32
8000a1c: af00 add r7, sp, #0
8000a1e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000a20: f107 0310 add.w r3, r7, #16
8000a24: 2200 movs r2, #0
8000a26: 601a str r2, [r3, #0]
8000a28: 605a str r2, [r3, #4]
8000a2a: 609a str r2, [r3, #8]
8000a2c: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
8000a2e: 687b ldr r3, [r7, #4]
8000a30: 681b ldr r3, [r3, #0]
8000a32: 4a14 ldr r2, [pc, #80] @ (8000a84 <HAL_ADC_MspInit+0x6c>)
8000a34: 4293 cmp r3, r2
8000a36: d121 bne.n 8000a7c <HAL_ADC_MspInit+0x64>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
8000a38: 4b13 ldr r3, [pc, #76] @ (8000a88 <HAL_ADC_MspInit+0x70>)
8000a3a: 699b ldr r3, [r3, #24]
8000a3c: 4a12 ldr r2, [pc, #72] @ (8000a88 <HAL_ADC_MspInit+0x70>)
8000a3e: f443 7300 orr.w r3, r3, #512 @ 0x200
8000a42: 6193 str r3, [r2, #24]
8000a44: 4b10 ldr r3, [pc, #64] @ (8000a88 <HAL_ADC_MspInit+0x70>)
8000a46: 699b ldr r3, [r3, #24]
8000a48: f403 7300 and.w r3, r3, #512 @ 0x200
8000a4c: 60fb str r3, [r7, #12]
8000a4e: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000a50: 4b0d ldr r3, [pc, #52] @ (8000a88 <HAL_ADC_MspInit+0x70>)
8000a52: 699b ldr r3, [r3, #24]
8000a54: 4a0c ldr r2, [pc, #48] @ (8000a88 <HAL_ADC_MspInit+0x70>)
8000a56: f043 0304 orr.w r3, r3, #4
8000a5a: 6193 str r3, [r2, #24]
8000a5c: 4b0a ldr r3, [pc, #40] @ (8000a88 <HAL_ADC_MspInit+0x70>)
8000a5e: 699b ldr r3, [r3, #24]
8000a60: f003 0304 and.w r3, r3, #4
8000a64: 60bb str r3, [r7, #8]
8000a66: 68bb ldr r3, [r7, #8]
/**ADC1 GPIO Configuration
PA4 ------> ADC1_IN4
PA5 ------> ADC1_IN5
*/
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
8000a68: 2330 movs r3, #48 @ 0x30
8000a6a: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8000a6c: 2303 movs r3, #3
8000a6e: 617b str r3, [r7, #20]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000a70: f107 0310 add.w r3, r7, #16
8000a74: 4619 mov r1, r3
8000a76: 4805 ldr r0, [pc, #20] @ (8000a8c <HAL_ADC_MspInit+0x74>)
8000a78: f000 fd30 bl 80014dc <HAL_GPIO_Init>
/* USER CODE END ADC1_MspInit 1 */
}
}
8000a7c: bf00 nop
8000a7e: 3720 adds r7, #32
8000a80: 46bd mov sp, r7
8000a82: bd80 pop {r7, pc}
8000a84: 40012400 .word 0x40012400
8000a88: 40021000 .word 0x40021000
8000a8c: 40010800 .word 0x40010800
08000a90 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8000a90: b480 push {r7}
8000a92: b087 sub sp, #28
8000a94: af00 add r7, sp, #0
8000a96: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM1)
8000a98: 687b ldr r3, [r7, #4]
8000a9a: 681b ldr r3, [r3, #0]
8000a9c: 4a24 ldr r2, [pc, #144] @ (8000b30 <HAL_TIM_Base_MspInit+0xa0>)
8000a9e: 4293 cmp r3, r2
8000aa0: d10c bne.n 8000abc <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM1_MspInit 0 */
/* USER CODE END TIM1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM1_CLK_ENABLE();
8000aa2: 4b24 ldr r3, [pc, #144] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000aa4: 699b ldr r3, [r3, #24]
8000aa6: 4a23 ldr r2, [pc, #140] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000aa8: f443 6300 orr.w r3, r3, #2048 @ 0x800
8000aac: 6193 str r3, [r2, #24]
8000aae: 4b21 ldr r3, [pc, #132] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000ab0: 699b ldr r3, [r3, #24]
8000ab2: f403 6300 and.w r3, r3, #2048 @ 0x800
8000ab6: 617b str r3, [r7, #20]
8000ab8: 697b ldr r3, [r7, #20]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8000aba: e034 b.n 8000b26 <HAL_TIM_Base_MspInit+0x96>
else if(htim_base->Instance==TIM2)
8000abc: 687b ldr r3, [r7, #4]
8000abe: 681b ldr r3, [r3, #0]
8000ac0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8000ac4: d10c bne.n 8000ae0 <HAL_TIM_Base_MspInit+0x50>
__HAL_RCC_TIM2_CLK_ENABLE();
8000ac6: 4b1b ldr r3, [pc, #108] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000ac8: 69db ldr r3, [r3, #28]
8000aca: 4a1a ldr r2, [pc, #104] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000acc: f043 0301 orr.w r3, r3, #1
8000ad0: 61d3 str r3, [r2, #28]
8000ad2: 4b18 ldr r3, [pc, #96] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000ad4: 69db ldr r3, [r3, #28]
8000ad6: f003 0301 and.w r3, r3, #1
8000ada: 613b str r3, [r7, #16]
8000adc: 693b ldr r3, [r7, #16]
}
8000ade: e022 b.n 8000b26 <HAL_TIM_Base_MspInit+0x96>
else if(htim_base->Instance==TIM3)
8000ae0: 687b ldr r3, [r7, #4]
8000ae2: 681b ldr r3, [r3, #0]
8000ae4: 4a14 ldr r2, [pc, #80] @ (8000b38 <HAL_TIM_Base_MspInit+0xa8>)
8000ae6: 4293 cmp r3, r2
8000ae8: d10c bne.n 8000b04 <HAL_TIM_Base_MspInit+0x74>
__HAL_RCC_TIM3_CLK_ENABLE();
8000aea: 4b12 ldr r3, [pc, #72] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000aec: 69db ldr r3, [r3, #28]
8000aee: 4a11 ldr r2, [pc, #68] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000af0: f043 0302 orr.w r3, r3, #2
8000af4: 61d3 str r3, [r2, #28]
8000af6: 4b0f ldr r3, [pc, #60] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000af8: 69db ldr r3, [r3, #28]
8000afa: f003 0302 and.w r3, r3, #2
8000afe: 60fb str r3, [r7, #12]
8000b00: 68fb ldr r3, [r7, #12]
}
8000b02: e010 b.n 8000b26 <HAL_TIM_Base_MspInit+0x96>
else if(htim_base->Instance==TIM4)
8000b04: 687b ldr r3, [r7, #4]
8000b06: 681b ldr r3, [r3, #0]
8000b08: 4a0c ldr r2, [pc, #48] @ (8000b3c <HAL_TIM_Base_MspInit+0xac>)
8000b0a: 4293 cmp r3, r2
8000b0c: d10b bne.n 8000b26 <HAL_TIM_Base_MspInit+0x96>
__HAL_RCC_TIM4_CLK_ENABLE();
8000b0e: 4b09 ldr r3, [pc, #36] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000b10: 69db ldr r3, [r3, #28]
8000b12: 4a08 ldr r2, [pc, #32] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000b14: f043 0304 orr.w r3, r3, #4
8000b18: 61d3 str r3, [r2, #28]
8000b1a: 4b06 ldr r3, [pc, #24] @ (8000b34 <HAL_TIM_Base_MspInit+0xa4>)
8000b1c: 69db ldr r3, [r3, #28]
8000b1e: f003 0304 and.w r3, r3, #4
8000b22: 60bb str r3, [r7, #8]
8000b24: 68bb ldr r3, [r7, #8]
}
8000b26: bf00 nop
8000b28: 371c adds r7, #28
8000b2a: 46bd mov sp, r7
8000b2c: bc80 pop {r7}
8000b2e: 4770 bx lr
8000b30: 40012c00 .word 0x40012c00
8000b34: 40021000 .word 0x40021000
8000b38: 40000400 .word 0x40000400
8000b3c: 40000800 .word 0x40000800
08000b40 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8000b40: b580 push {r7, lr}
8000b42: b08c sub sp, #48 @ 0x30
8000b44: af00 add r7, sp, #0
8000b46: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000b48: f107 0320 add.w r3, r7, #32
8000b4c: 2200 movs r2, #0
8000b4e: 601a str r2, [r3, #0]
8000b50: 605a str r2, [r3, #4]
8000b52: 609a str r2, [r3, #8]
8000b54: 60da str r2, [r3, #12]
if(htim->Instance==TIM1)
8000b56: 687b ldr r3, [r7, #4]
8000b58: 681b ldr r3, [r3, #0]
8000b5a: 4a49 ldr r2, [pc, #292] @ (8000c80 <HAL_TIM_MspPostInit+0x140>)
8000b5c: 4293 cmp r3, r2
8000b5e: d119 bne.n 8000b94 <HAL_TIM_MspPostInit+0x54>
{
/* USER CODE BEGIN TIM1_MspPostInit 0 */
/* USER CODE END TIM1_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8000b60: 4b48 ldr r3, [pc, #288] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000b62: 699b ldr r3, [r3, #24]
8000b64: 4a47 ldr r2, [pc, #284] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000b66: f043 0304 orr.w r3, r3, #4
8000b6a: 6193 str r3, [r2, #24]
8000b6c: 4b45 ldr r3, [pc, #276] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000b6e: 699b ldr r3, [r3, #24]
8000b70: f003 0304 and.w r3, r3, #4
8000b74: 61fb str r3, [r7, #28]
8000b76: 69fb ldr r3, [r7, #28]
/**TIM1 GPIO Configuration
PA8 ------> TIM1_CH1
PA9 ------> TIM1_CH2
PA10 ------> TIM1_CH3
*/
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10;
8000b78: f44f 63e0 mov.w r3, #1792 @ 0x700
8000b7c: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000b7e: 2302 movs r3, #2
8000b80: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b82: 2302 movs r3, #2
8000b84: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000b86: f107 0320 add.w r3, r7, #32
8000b8a: 4619 mov r1, r3
8000b8c: 483e ldr r0, [pc, #248] @ (8000c88 <HAL_TIM_MspPostInit+0x148>)
8000b8e: f000 fca5 bl 80014dc <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8000b92: e071 b.n 8000c78 <HAL_TIM_MspPostInit+0x138>
else if(htim->Instance==TIM2)
8000b94: 687b ldr r3, [r7, #4]
8000b96: 681b ldr r3, [r3, #0]
8000b98: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8000b9c: d118 bne.n 8000bd0 <HAL_TIM_MspPostInit+0x90>
__HAL_RCC_GPIOA_CLK_ENABLE();
8000b9e: 4b39 ldr r3, [pc, #228] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000ba0: 699b ldr r3, [r3, #24]
8000ba2: 4a38 ldr r2, [pc, #224] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000ba4: f043 0304 orr.w r3, r3, #4
8000ba8: 6193 str r3, [r2, #24]
8000baa: 4b36 ldr r3, [pc, #216] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000bac: 699b ldr r3, [r3, #24]
8000bae: f003 0304 and.w r3, r3, #4
8000bb2: 61bb str r3, [r7, #24]
8000bb4: 69bb ldr r3, [r7, #24]
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
8000bb6: 230f movs r3, #15
8000bb8: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000bba: 2302 movs r3, #2
8000bbc: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000bbe: 2302 movs r3, #2
8000bc0: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000bc2: f107 0320 add.w r3, r7, #32
8000bc6: 4619 mov r1, r3
8000bc8: 482f ldr r0, [pc, #188] @ (8000c88 <HAL_TIM_MspPostInit+0x148>)
8000bca: f000 fc87 bl 80014dc <HAL_GPIO_Init>
}
8000bce: e053 b.n 8000c78 <HAL_TIM_MspPostInit+0x138>
else if(htim->Instance==TIM3)
8000bd0: 687b ldr r3, [r7, #4]
8000bd2: 681b ldr r3, [r3, #0]
8000bd4: 4a2d ldr r2, [pc, #180] @ (8000c8c <HAL_TIM_MspPostInit+0x14c>)
8000bd6: 4293 cmp r3, r2
8000bd8: d130 bne.n 8000c3c <HAL_TIM_MspPostInit+0xfc>
__HAL_RCC_GPIOA_CLK_ENABLE();
8000bda: 4b2a ldr r3, [pc, #168] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000bdc: 699b ldr r3, [r3, #24]
8000bde: 4a29 ldr r2, [pc, #164] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000be0: f043 0304 orr.w r3, r3, #4
8000be4: 6193 str r3, [r2, #24]
8000be6: 4b27 ldr r3, [pc, #156] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000be8: 699b ldr r3, [r3, #24]
8000bea: f003 0304 and.w r3, r3, #4
8000bee: 617b str r3, [r7, #20]
8000bf0: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOB_CLK_ENABLE();
8000bf2: 4b24 ldr r3, [pc, #144] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000bf4: 699b ldr r3, [r3, #24]
8000bf6: 4a23 ldr r2, [pc, #140] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000bf8: f043 0308 orr.w r3, r3, #8
8000bfc: 6193 str r3, [r2, #24]
8000bfe: 4b21 ldr r3, [pc, #132] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000c00: 699b ldr r3, [r3, #24]
8000c02: f003 0308 and.w r3, r3, #8
8000c06: 613b str r3, [r7, #16]
8000c08: 693b ldr r3, [r7, #16]
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
8000c0a: 23c0 movs r3, #192 @ 0xc0
8000c0c: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c0e: 2302 movs r3, #2
8000c10: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c12: 2302 movs r3, #2
8000c14: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000c16: f107 0320 add.w r3, r7, #32
8000c1a: 4619 mov r1, r3
8000c1c: 481a ldr r0, [pc, #104] @ (8000c88 <HAL_TIM_MspPostInit+0x148>)
8000c1e: f000 fc5d bl 80014dc <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
8000c22: 2303 movs r3, #3
8000c24: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c26: 2302 movs r3, #2
8000c28: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c2a: 2302 movs r3, #2
8000c2c: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000c2e: f107 0320 add.w r3, r7, #32
8000c32: 4619 mov r1, r3
8000c34: 4816 ldr r0, [pc, #88] @ (8000c90 <HAL_TIM_MspPostInit+0x150>)
8000c36: f000 fc51 bl 80014dc <HAL_GPIO_Init>
}
8000c3a: e01d b.n 8000c78 <HAL_TIM_MspPostInit+0x138>
else if(htim->Instance==TIM4)
8000c3c: 687b ldr r3, [r7, #4]
8000c3e: 681b ldr r3, [r3, #0]
8000c40: 4a14 ldr r2, [pc, #80] @ (8000c94 <HAL_TIM_MspPostInit+0x154>)
8000c42: 4293 cmp r3, r2
8000c44: d118 bne.n 8000c78 <HAL_TIM_MspPostInit+0x138>
__HAL_RCC_GPIOB_CLK_ENABLE();
8000c46: 4b0f ldr r3, [pc, #60] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000c48: 699b ldr r3, [r3, #24]
8000c4a: 4a0e ldr r2, [pc, #56] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000c4c: f043 0308 orr.w r3, r3, #8
8000c50: 6193 str r3, [r2, #24]
8000c52: 4b0c ldr r3, [pc, #48] @ (8000c84 <HAL_TIM_MspPostInit+0x144>)
8000c54: 699b ldr r3, [r3, #24]
8000c56: f003 0308 and.w r3, r3, #8
8000c5a: 60fb str r3, [r7, #12]
8000c5c: 68fb ldr r3, [r7, #12]
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
8000c5e: f44f 7370 mov.w r3, #960 @ 0x3c0
8000c62: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c64: 2302 movs r3, #2
8000c66: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c68: 2302 movs r3, #2
8000c6a: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000c6c: f107 0320 add.w r3, r7, #32
8000c70: 4619 mov r1, r3
8000c72: 4807 ldr r0, [pc, #28] @ (8000c90 <HAL_TIM_MspPostInit+0x150>)
8000c74: f000 fc32 bl 80014dc <HAL_GPIO_Init>
}
8000c78: bf00 nop
8000c7a: 3730 adds r7, #48 @ 0x30
8000c7c: 46bd mov sp, r7
8000c7e: bd80 pop {r7, pc}
8000c80: 40012c00 .word 0x40012c00
8000c84: 40021000 .word 0x40021000
8000c88: 40010800 .word 0x40010800
8000c8c: 40000400 .word 0x40000400
8000c90: 40010c00 .word 0x40010c00
8000c94: 40000800 .word 0x40000800
08000c98 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8000c98: b480 push {r7}
8000c9a: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8000c9c: bf00 nop
8000c9e: e7fd b.n 8000c9c <NMI_Handler+0x4>
08000ca0 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8000ca0: b480 push {r7}
8000ca2: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8000ca4: bf00 nop
8000ca6: e7fd b.n 8000ca4 <HardFault_Handler+0x4>
08000ca8 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8000ca8: b480 push {r7}
8000caa: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8000cac: bf00 nop
8000cae: e7fd b.n 8000cac <MemManage_Handler+0x4>
08000cb0 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8000cb0: b480 push {r7}
8000cb2: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8000cb4: bf00 nop
8000cb6: e7fd b.n 8000cb4 <BusFault_Handler+0x4>
08000cb8 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8000cb8: b480 push {r7}
8000cba: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8000cbc: bf00 nop
8000cbe: e7fd b.n 8000cbc <UsageFault_Handler+0x4>
08000cc0 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8000cc0: b480 push {r7}
8000cc2: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8000cc4: bf00 nop
8000cc6: 46bd mov sp, r7
8000cc8: bc80 pop {r7}
8000cca: 4770 bx lr
08000ccc <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8000ccc: b480 push {r7}
8000cce: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8000cd0: bf00 nop
8000cd2: 46bd mov sp, r7
8000cd4: bc80 pop {r7}
8000cd6: 4770 bx lr
08000cd8 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8000cd8: b480 push {r7}
8000cda: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8000cdc: bf00 nop
8000cde: 46bd mov sp, r7
8000ce0: bc80 pop {r7}
8000ce2: 4770 bx lr
08000ce4 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8000ce4: b580 push {r7, lr}
8000ce6: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8000ce8: f000 f8b6 bl 8000e58 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
8000cec: f000 fbef bl 80014ce <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
8000cf0: bf00 nop
8000cf2: bd80 pop {r7, pc}
08000cf4 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8000cf4: b580 push {r7, lr}
8000cf6: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8000cf8: 4802 ldr r0, [pc, #8] @ (8000d04 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8000cfa: f000 fec0 bl 8001a7e <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8000cfe: bf00 nop
8000d00: bd80 pop {r7, pc}
8000d02: bf00 nop
8000d04: 20001110 .word 0x20001110
08000d08 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8000d08: b580 push {r7, lr}
8000d0a: b086 sub sp, #24
8000d0c: af00 add r7, sp, #0
8000d0e: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8000d10: 4a14 ldr r2, [pc, #80] @ (8000d64 <_sbrk+0x5c>)
8000d12: 4b15 ldr r3, [pc, #84] @ (8000d68 <_sbrk+0x60>)
8000d14: 1ad3 subs r3, r2, r3
8000d16: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8000d18: 697b ldr r3, [r7, #20]
8000d1a: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8000d1c: 4b13 ldr r3, [pc, #76] @ (8000d6c <_sbrk+0x64>)
8000d1e: 681b ldr r3, [r3, #0]
8000d20: 2b00 cmp r3, #0
8000d22: d102 bne.n 8000d2a <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8000d24: 4b11 ldr r3, [pc, #68] @ (8000d6c <_sbrk+0x64>)
8000d26: 4a12 ldr r2, [pc, #72] @ (8000d70 <_sbrk+0x68>)
8000d28: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8000d2a: 4b10 ldr r3, [pc, #64] @ (8000d6c <_sbrk+0x64>)
8000d2c: 681a ldr r2, [r3, #0]
8000d2e: 687b ldr r3, [r7, #4]
8000d30: 4413 add r3, r2
8000d32: 693a ldr r2, [r7, #16]
8000d34: 429a cmp r2, r3
8000d36: d207 bcs.n 8000d48 <_sbrk+0x40>
{
errno = ENOMEM;
8000d38: f008 f9f4 bl 8009124 <__errno>
8000d3c: 4603 mov r3, r0
8000d3e: 220c movs r2, #12
8000d40: 601a str r2, [r3, #0]
return (void *)-1;
8000d42: f04f 33ff mov.w r3, #4294967295
8000d46: e009 b.n 8000d5c <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8000d48: 4b08 ldr r3, [pc, #32] @ (8000d6c <_sbrk+0x64>)
8000d4a: 681b ldr r3, [r3, #0]
8000d4c: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8000d4e: 4b07 ldr r3, [pc, #28] @ (8000d6c <_sbrk+0x64>)
8000d50: 681a ldr r2, [r3, #0]
8000d52: 687b ldr r3, [r7, #4]
8000d54: 4413 add r3, r2
8000d56: 4a05 ldr r2, [pc, #20] @ (8000d6c <_sbrk+0x64>)
8000d58: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8000d5a: 68fb ldr r3, [r7, #12]
}
8000d5c: 4618 mov r0, r3
8000d5e: 3718 adds r7, #24
8000d60: 46bd mov sp, r7
8000d62: bd80 pop {r7, pc}
8000d64: 20005000 .word 0x20005000
8000d68: 00000400 .word 0x00000400
8000d6c: 2000033c .word 0x2000033c
8000d70: 20001750 .word 0x20001750
08000d74 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8000d74: b480 push {r7}
8000d76: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8000d78: bf00 nop
8000d7a: 46bd mov sp, r7
8000d7c: bc80 pop {r7}
8000d7e: 4770 bx lr
08000d80 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8000d80: f7ff fff8 bl 8000d74 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8000d84: 480b ldr r0, [pc, #44] @ (8000db4 <LoopFillZerobss+0xe>)
ldr r1, =_edata
8000d86: 490c ldr r1, [pc, #48] @ (8000db8 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8000d88: 4a0c ldr r2, [pc, #48] @ (8000dbc <LoopFillZerobss+0x16>)
movs r3, #0
8000d8a: 2300 movs r3, #0
b LoopCopyDataInit
8000d8c: e002 b.n 8000d94 <LoopCopyDataInit>
08000d8e <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8000d8e: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8000d90: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8000d92: 3304 adds r3, #4
08000d94 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8000d94: 18c4 adds r4, r0, r3
cmp r4, r1
8000d96: 428c cmp r4, r1
bcc CopyDataInit
8000d98: d3f9 bcc.n 8000d8e <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8000d9a: 4a09 ldr r2, [pc, #36] @ (8000dc0 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8000d9c: 4c09 ldr r4, [pc, #36] @ (8000dc4 <LoopFillZerobss+0x1e>)
movs r3, #0
8000d9e: 2300 movs r3, #0
b LoopFillZerobss
8000da0: e001 b.n 8000da6 <LoopFillZerobss>
08000da2 <FillZerobss>:
FillZerobss:
str r3, [r2]
8000da2: 6013 str r3, [r2, #0]
adds r2, r2, #4
8000da4: 3204 adds r2, #4
08000da6 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8000da6: 42a2 cmp r2, r4
bcc FillZerobss
8000da8: d3fb bcc.n 8000da2 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8000daa: f008 f9c1 bl 8009130 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8000dae: f7ff fa05 bl 80001bc <main>
bx lr
8000db2: 4770 bx lr
ldr r0, =_sdata
8000db4: 20000000 .word 0x20000000
ldr r1, =_edata
8000db8: 200001cc .word 0x200001cc
ldr r2, =_sidata
8000dbc: 08009b00 .word 0x08009b00
ldr r2, =_sbss
8000dc0: 200001cc .word 0x200001cc
ldr r4, =_ebss
8000dc4: 20001750 .word 0x20001750
08000dc8 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8000dc8: e7fe b.n 8000dc8 <ADC1_2_IRQHandler>
...
08000dcc <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8000dcc: b580 push {r7, lr}
8000dce: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8000dd0: 4b08 ldr r3, [pc, #32] @ (8000df4 <HAL_Init+0x28>)
8000dd2: 681b ldr r3, [r3, #0]
8000dd4: 4a07 ldr r2, [pc, #28] @ (8000df4 <HAL_Init+0x28>)
8000dd6: f043 0310 orr.w r3, r3, #16
8000dda: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8000ddc: 2003 movs r0, #3
8000dde: f000 fb35 bl 800144c <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8000de2: 200f movs r0, #15
8000de4: f000 f808 bl 8000df8 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8000de8: f7ff fde4 bl 80009b4 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8000dec: 2300 movs r3, #0
}
8000dee: 4618 mov r0, r3
8000df0: bd80 pop {r7, pc}
8000df2: bf00 nop
8000df4: 40022000 .word 0x40022000
08000df8 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8000df8: b580 push {r7, lr}
8000dfa: b082 sub sp, #8
8000dfc: af00 add r7, sp, #0
8000dfe: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8000e00: 4b12 ldr r3, [pc, #72] @ (8000e4c <HAL_InitTick+0x54>)
8000e02: 681a ldr r2, [r3, #0]
8000e04: 4b12 ldr r3, [pc, #72] @ (8000e50 <HAL_InitTick+0x58>)
8000e06: 781b ldrb r3, [r3, #0]
8000e08: 4619 mov r1, r3
8000e0a: f44f 737a mov.w r3, #1000 @ 0x3e8
8000e0e: fbb3 f3f1 udiv r3, r3, r1
8000e12: fbb2 f3f3 udiv r3, r2, r3
8000e16: 4618 mov r0, r3
8000e18: f000 fb4d bl 80014b6 <HAL_SYSTICK_Config>
8000e1c: 4603 mov r3, r0
8000e1e: 2b00 cmp r3, #0
8000e20: d001 beq.n 8000e26 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8000e22: 2301 movs r3, #1
8000e24: e00e b.n 8000e44 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8000e26: 687b ldr r3, [r7, #4]
8000e28: 2b0f cmp r3, #15
8000e2a: d80a bhi.n 8000e42 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8000e2c: 2200 movs r2, #0
8000e2e: 6879 ldr r1, [r7, #4]
8000e30: f04f 30ff mov.w r0, #4294967295
8000e34: f000 fb15 bl 8001462 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8000e38: 4a06 ldr r2, [pc, #24] @ (8000e54 <HAL_InitTick+0x5c>)
8000e3a: 687b ldr r3, [r7, #4]
8000e3c: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8000e3e: 2300 movs r3, #0
8000e40: e000 b.n 8000e44 <HAL_InitTick+0x4c>
return HAL_ERROR;
8000e42: 2301 movs r3, #1
}
8000e44: 4618 mov r0, r3
8000e46: 3708 adds r7, #8
8000e48: 46bd mov sp, r7
8000e4a: bd80 pop {r7, pc}
8000e4c: 20000000 .word 0x20000000
8000e50: 20000008 .word 0x20000008
8000e54: 20000004 .word 0x20000004
08000e58 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8000e58: b480 push {r7}
8000e5a: af00 add r7, sp, #0
uwTick += uwTickFreq;
8000e5c: 4b05 ldr r3, [pc, #20] @ (8000e74 <HAL_IncTick+0x1c>)
8000e5e: 781b ldrb r3, [r3, #0]
8000e60: 461a mov r2, r3
8000e62: 4b05 ldr r3, [pc, #20] @ (8000e78 <HAL_IncTick+0x20>)
8000e64: 681b ldr r3, [r3, #0]
8000e66: 4413 add r3, r2
8000e68: 4a03 ldr r2, [pc, #12] @ (8000e78 <HAL_IncTick+0x20>)
8000e6a: 6013 str r3, [r2, #0]
}
8000e6c: bf00 nop
8000e6e: 46bd mov sp, r7
8000e70: bc80 pop {r7}
8000e72: 4770 bx lr
8000e74: 20000008 .word 0x20000008
8000e78: 20000340 .word 0x20000340
08000e7c <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8000e7c: b480 push {r7}
8000e7e: af00 add r7, sp, #0
return uwTick;
8000e80: 4b02 ldr r3, [pc, #8] @ (8000e8c <HAL_GetTick+0x10>)
8000e82: 681b ldr r3, [r3, #0]
}
8000e84: 4618 mov r0, r3
8000e86: 46bd mov sp, r7
8000e88: bc80 pop {r7}
8000e8a: 4770 bx lr
8000e8c: 20000340 .word 0x20000340
08000e90 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8000e90: b580 push {r7, lr}
8000e92: b086 sub sp, #24
8000e94: af00 add r7, sp, #0
8000e96: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8000e98: 2300 movs r3, #0
8000e9a: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
8000e9c: 2300 movs r3, #0
8000e9e: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
8000ea0: 2300 movs r3, #0
8000ea2: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8000ea4: 2300 movs r3, #0
8000ea6: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
8000ea8: 687b ldr r3, [r7, #4]
8000eaa: 2b00 cmp r3, #0
8000eac: d101 bne.n 8000eb2 <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
8000eae: 2301 movs r3, #1
8000eb0: e0be b.n 8001030 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8000eb2: 687b ldr r3, [r7, #4]
8000eb4: 689b ldr r3, [r3, #8]
8000eb6: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
8000eb8: 687b ldr r3, [r7, #4]
8000eba: 6a9b ldr r3, [r3, #40] @ 0x28
8000ebc: 2b00 cmp r3, #0
8000ebe: d109 bne.n 8000ed4 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8000ec0: 687b ldr r3, [r7, #4]
8000ec2: 2200 movs r2, #0
8000ec4: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8000ec6: 687b ldr r3, [r7, #4]
8000ec8: 2200 movs r2, #0
8000eca: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8000ece: 6878 ldr r0, [r7, #4]
8000ed0: f7ff fda2 bl 8000a18 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
8000ed4: 6878 ldr r0, [r7, #4]
8000ed6: f000 f9ab bl 8001230 <ADC_ConversionStop_Disable>
8000eda: 4603 mov r3, r0
8000edc: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8000ede: 687b ldr r3, [r7, #4]
8000ee0: 6a9b ldr r3, [r3, #40] @ 0x28
8000ee2: f003 0310 and.w r3, r3, #16
8000ee6: 2b00 cmp r3, #0
8000ee8: f040 8099 bne.w 800101e <HAL_ADC_Init+0x18e>
8000eec: 7dfb ldrb r3, [r7, #23]
8000eee: 2b00 cmp r3, #0
8000ef0: f040 8095 bne.w 800101e <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8000ef4: 687b ldr r3, [r7, #4]
8000ef6: 6a9b ldr r3, [r3, #40] @ 0x28
8000ef8: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8000efc: f023 0302 bic.w r3, r3, #2
8000f00: f043 0202 orr.w r2, r3, #2
8000f04: 687b ldr r3, [r7, #4]
8000f06: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
8000f08: 687b ldr r3, [r7, #4]
8000f0a: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8000f0c: 687b ldr r3, [r7, #4]
8000f0e: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8000f10: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8000f12: 687b ldr r3, [r7, #4]
8000f14: 7b1b ldrb r3, [r3, #12]
8000f16: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8000f18: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
8000f1a: 68ba ldr r2, [r7, #8]
8000f1c: 4313 orrs r3, r2
8000f1e: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8000f20: 687b ldr r3, [r7, #4]
8000f22: 689b ldr r3, [r3, #8]
8000f24: f5b3 7f80 cmp.w r3, #256 @ 0x100
8000f28: d003 beq.n 8000f32 <HAL_ADC_Init+0xa2>
8000f2a: 687b ldr r3, [r7, #4]
8000f2c: 689b ldr r3, [r3, #8]
8000f2e: 2b01 cmp r3, #1
8000f30: d102 bne.n 8000f38 <HAL_ADC_Init+0xa8>
8000f32: f44f 7380 mov.w r3, #256 @ 0x100
8000f36: e000 b.n 8000f3a <HAL_ADC_Init+0xaa>
8000f38: 2300 movs r3, #0
8000f3a: 693a ldr r2, [r7, #16]
8000f3c: 4313 orrs r3, r2
8000f3e: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8000f40: 687b ldr r3, [r7, #4]
8000f42: 7d1b ldrb r3, [r3, #20]
8000f44: 2b01 cmp r3, #1
8000f46: d119 bne.n 8000f7c <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8000f48: 687b ldr r3, [r7, #4]
8000f4a: 7b1b ldrb r3, [r3, #12]
8000f4c: 2b00 cmp r3, #0
8000f4e: d109 bne.n 8000f64 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8000f50: 687b ldr r3, [r7, #4]
8000f52: 699b ldr r3, [r3, #24]
8000f54: 3b01 subs r3, #1
8000f56: 035a lsls r2, r3, #13
8000f58: 693b ldr r3, [r7, #16]
8000f5a: 4313 orrs r3, r2
8000f5c: f443 6300 orr.w r3, r3, #2048 @ 0x800
8000f60: 613b str r3, [r7, #16]
8000f62: e00b b.n 8000f7c <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8000f64: 687b ldr r3, [r7, #4]
8000f66: 6a9b ldr r3, [r3, #40] @ 0x28
8000f68: f043 0220 orr.w r2, r3, #32
8000f6c: 687b ldr r3, [r7, #4]
8000f6e: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8000f70: 687b ldr r3, [r7, #4]
8000f72: 6adb ldr r3, [r3, #44] @ 0x2c
8000f74: f043 0201 orr.w r2, r3, #1
8000f78: 687b ldr r3, [r7, #4]
8000f7a: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
8000f7c: 687b ldr r3, [r7, #4]
8000f7e: 681b ldr r3, [r3, #0]
8000f80: 685b ldr r3, [r3, #4]
8000f82: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8000f86: 687b ldr r3, [r7, #4]
8000f88: 681b ldr r3, [r3, #0]
8000f8a: 693a ldr r2, [r7, #16]
8000f8c: 430a orrs r2, r1
8000f8e: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
8000f90: 687b ldr r3, [r7, #4]
8000f92: 681b ldr r3, [r3, #0]
8000f94: 689a ldr r2, [r3, #8]
8000f96: 4b28 ldr r3, [pc, #160] @ (8001038 <HAL_ADC_Init+0x1a8>)
8000f98: 4013 ands r3, r2
8000f9a: 687a ldr r2, [r7, #4]
8000f9c: 6812 ldr r2, [r2, #0]
8000f9e: 68b9 ldr r1, [r7, #8]
8000fa0: 430b orrs r3, r1
8000fa2: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8000fa4: 687b ldr r3, [r7, #4]
8000fa6: 689b ldr r3, [r3, #8]
8000fa8: f5b3 7f80 cmp.w r3, #256 @ 0x100
8000fac: d003 beq.n 8000fb6 <HAL_ADC_Init+0x126>
8000fae: 687b ldr r3, [r7, #4]
8000fb0: 689b ldr r3, [r3, #8]
8000fb2: 2b01 cmp r3, #1
8000fb4: d104 bne.n 8000fc0 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
8000fb6: 687b ldr r3, [r7, #4]
8000fb8: 691b ldr r3, [r3, #16]
8000fba: 3b01 subs r3, #1
8000fbc: 051b lsls r3, r3, #20
8000fbe: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8000fc0: 687b ldr r3, [r7, #4]
8000fc2: 681b ldr r3, [r3, #0]
8000fc4: 6adb ldr r3, [r3, #44] @ 0x2c
8000fc6: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
8000fca: 687b ldr r3, [r7, #4]
8000fcc: 681b ldr r3, [r3, #0]
8000fce: 68fa ldr r2, [r7, #12]
8000fd0: 430a orrs r2, r1
8000fd2: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8000fd4: 687b ldr r3, [r7, #4]
8000fd6: 681b ldr r3, [r3, #0]
8000fd8: 689a ldr r2, [r3, #8]
8000fda: 4b18 ldr r3, [pc, #96] @ (800103c <HAL_ADC_Init+0x1ac>)
8000fdc: 4013 ands r3, r2
8000fde: 68ba ldr r2, [r7, #8]
8000fe0: 429a cmp r2, r3
8000fe2: d10b bne.n 8000ffc <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8000fe4: 687b ldr r3, [r7, #4]
8000fe6: 2200 movs r2, #0
8000fe8: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8000fea: 687b ldr r3, [r7, #4]
8000fec: 6a9b ldr r3, [r3, #40] @ 0x28
8000fee: f023 0303 bic.w r3, r3, #3
8000ff2: f043 0201 orr.w r2, r3, #1
8000ff6: 687b ldr r3, [r7, #4]
8000ff8: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8000ffa: e018 b.n 800102e <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8000ffc: 687b ldr r3, [r7, #4]
8000ffe: 6a9b ldr r3, [r3, #40] @ 0x28
8001000: f023 0312 bic.w r3, r3, #18
8001004: f043 0210 orr.w r2, r3, #16
8001008: 687b ldr r3, [r7, #4]
800100a: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
800100c: 687b ldr r3, [r7, #4]
800100e: 6adb ldr r3, [r3, #44] @ 0x2c
8001010: f043 0201 orr.w r2, r3, #1
8001014: 687b ldr r3, [r7, #4]
8001016: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
8001018: 2301 movs r3, #1
800101a: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
800101c: e007 b.n 800102e <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800101e: 687b ldr r3, [r7, #4]
8001020: 6a9b ldr r3, [r3, #40] @ 0x28
8001022: f043 0210 orr.w r2, r3, #16
8001026: 687b ldr r3, [r7, #4]
8001028: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
800102a: 2301 movs r3, #1
800102c: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
800102e: 7dfb ldrb r3, [r7, #23]
}
8001030: 4618 mov r0, r3
8001032: 3718 adds r7, #24
8001034: 46bd mov sp, r7
8001036: bd80 pop {r7, pc}
8001038: ffe1f7fd .word 0xffe1f7fd
800103c: ff1f0efe .word 0xff1f0efe
08001040 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8001040: b480 push {r7}
8001042: b085 sub sp, #20
8001044: af00 add r7, sp, #0
8001046: 6078 str r0, [r7, #4]
8001048: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
800104a: 2300 movs r3, #0
800104c: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
800104e: 2300 movs r3, #0
8001050: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8001052: 687b ldr r3, [r7, #4]
8001054: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8001058: 2b01 cmp r3, #1
800105a: d101 bne.n 8001060 <HAL_ADC_ConfigChannel+0x20>
800105c: 2302 movs r3, #2
800105e: e0dc b.n 800121a <HAL_ADC_ConfigChannel+0x1da>
8001060: 687b ldr r3, [r7, #4]
8001062: 2201 movs r2, #1
8001064: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
8001068: 683b ldr r3, [r7, #0]
800106a: 685b ldr r3, [r3, #4]
800106c: 2b06 cmp r3, #6
800106e: d81c bhi.n 80010aa <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8001070: 687b ldr r3, [r7, #4]
8001072: 681b ldr r3, [r3, #0]
8001074: 6b59 ldr r1, [r3, #52] @ 0x34
8001076: 683b ldr r3, [r7, #0]
8001078: 685a ldr r2, [r3, #4]
800107a: 4613 mov r3, r2
800107c: 009b lsls r3, r3, #2
800107e: 4413 add r3, r2
8001080: 3b05 subs r3, #5
8001082: 221f movs r2, #31
8001084: fa02 f303 lsl.w r3, r2, r3
8001088: 43db mvns r3, r3
800108a: 4019 ands r1, r3
800108c: 683b ldr r3, [r7, #0]
800108e: 6818 ldr r0, [r3, #0]
8001090: 683b ldr r3, [r7, #0]
8001092: 685a ldr r2, [r3, #4]
8001094: 4613 mov r3, r2
8001096: 009b lsls r3, r3, #2
8001098: 4413 add r3, r2
800109a: 3b05 subs r3, #5
800109c: fa00 f203 lsl.w r2, r0, r3
80010a0: 687b ldr r3, [r7, #4]
80010a2: 681b ldr r3, [r3, #0]
80010a4: 430a orrs r2, r1
80010a6: 635a str r2, [r3, #52] @ 0x34
80010a8: e03c b.n 8001124 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
80010aa: 683b ldr r3, [r7, #0]
80010ac: 685b ldr r3, [r3, #4]
80010ae: 2b0c cmp r3, #12
80010b0: d81c bhi.n 80010ec <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
80010b2: 687b ldr r3, [r7, #4]
80010b4: 681b ldr r3, [r3, #0]
80010b6: 6b19 ldr r1, [r3, #48] @ 0x30
80010b8: 683b ldr r3, [r7, #0]
80010ba: 685a ldr r2, [r3, #4]
80010bc: 4613 mov r3, r2
80010be: 009b lsls r3, r3, #2
80010c0: 4413 add r3, r2
80010c2: 3b23 subs r3, #35 @ 0x23
80010c4: 221f movs r2, #31
80010c6: fa02 f303 lsl.w r3, r2, r3
80010ca: 43db mvns r3, r3
80010cc: 4019 ands r1, r3
80010ce: 683b ldr r3, [r7, #0]
80010d0: 6818 ldr r0, [r3, #0]
80010d2: 683b ldr r3, [r7, #0]
80010d4: 685a ldr r2, [r3, #4]
80010d6: 4613 mov r3, r2
80010d8: 009b lsls r3, r3, #2
80010da: 4413 add r3, r2
80010dc: 3b23 subs r3, #35 @ 0x23
80010de: fa00 f203 lsl.w r2, r0, r3
80010e2: 687b ldr r3, [r7, #4]
80010e4: 681b ldr r3, [r3, #0]
80010e6: 430a orrs r2, r1
80010e8: 631a str r2, [r3, #48] @ 0x30
80010ea: e01b b.n 8001124 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
80010ec: 687b ldr r3, [r7, #4]
80010ee: 681b ldr r3, [r3, #0]
80010f0: 6ad9 ldr r1, [r3, #44] @ 0x2c
80010f2: 683b ldr r3, [r7, #0]
80010f4: 685a ldr r2, [r3, #4]
80010f6: 4613 mov r3, r2
80010f8: 009b lsls r3, r3, #2
80010fa: 4413 add r3, r2
80010fc: 3b41 subs r3, #65 @ 0x41
80010fe: 221f movs r2, #31
8001100: fa02 f303 lsl.w r3, r2, r3
8001104: 43db mvns r3, r3
8001106: 4019 ands r1, r3
8001108: 683b ldr r3, [r7, #0]
800110a: 6818 ldr r0, [r3, #0]
800110c: 683b ldr r3, [r7, #0]
800110e: 685a ldr r2, [r3, #4]
8001110: 4613 mov r3, r2
8001112: 009b lsls r3, r3, #2
8001114: 4413 add r3, r2
8001116: 3b41 subs r3, #65 @ 0x41
8001118: fa00 f203 lsl.w r2, r0, r3
800111c: 687b ldr r3, [r7, #4]
800111e: 681b ldr r3, [r3, #0]
8001120: 430a orrs r2, r1
8001122: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
8001124: 683b ldr r3, [r7, #0]
8001126: 681b ldr r3, [r3, #0]
8001128: 2b09 cmp r3, #9
800112a: d91c bls.n 8001166 <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
800112c: 687b ldr r3, [r7, #4]
800112e: 681b ldr r3, [r3, #0]
8001130: 68d9 ldr r1, [r3, #12]
8001132: 683b ldr r3, [r7, #0]
8001134: 681a ldr r2, [r3, #0]
8001136: 4613 mov r3, r2
8001138: 005b lsls r3, r3, #1
800113a: 4413 add r3, r2
800113c: 3b1e subs r3, #30
800113e: 2207 movs r2, #7
8001140: fa02 f303 lsl.w r3, r2, r3
8001144: 43db mvns r3, r3
8001146: 4019 ands r1, r3
8001148: 683b ldr r3, [r7, #0]
800114a: 6898 ldr r0, [r3, #8]
800114c: 683b ldr r3, [r7, #0]
800114e: 681a ldr r2, [r3, #0]
8001150: 4613 mov r3, r2
8001152: 005b lsls r3, r3, #1
8001154: 4413 add r3, r2
8001156: 3b1e subs r3, #30
8001158: fa00 f203 lsl.w r2, r0, r3
800115c: 687b ldr r3, [r7, #4]
800115e: 681b ldr r3, [r3, #0]
8001160: 430a orrs r2, r1
8001162: 60da str r2, [r3, #12]
8001164: e019 b.n 800119a <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8001166: 687b ldr r3, [r7, #4]
8001168: 681b ldr r3, [r3, #0]
800116a: 6919 ldr r1, [r3, #16]
800116c: 683b ldr r3, [r7, #0]
800116e: 681a ldr r2, [r3, #0]
8001170: 4613 mov r3, r2
8001172: 005b lsls r3, r3, #1
8001174: 4413 add r3, r2
8001176: 2207 movs r2, #7
8001178: fa02 f303 lsl.w r3, r2, r3
800117c: 43db mvns r3, r3
800117e: 4019 ands r1, r3
8001180: 683b ldr r3, [r7, #0]
8001182: 6898 ldr r0, [r3, #8]
8001184: 683b ldr r3, [r7, #0]
8001186: 681a ldr r2, [r3, #0]
8001188: 4613 mov r3, r2
800118a: 005b lsls r3, r3, #1
800118c: 4413 add r3, r2
800118e: fa00 f203 lsl.w r2, r0, r3
8001192: 687b ldr r3, [r7, #4]
8001194: 681b ldr r3, [r3, #0]
8001196: 430a orrs r2, r1
8001198: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
800119a: 683b ldr r3, [r7, #0]
800119c: 681b ldr r3, [r3, #0]
800119e: 2b10 cmp r3, #16
80011a0: d003 beq.n 80011aa <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
80011a2: 683b ldr r3, [r7, #0]
80011a4: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
80011a6: 2b11 cmp r3, #17
80011a8: d132 bne.n 8001210 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
80011aa: 687b ldr r3, [r7, #4]
80011ac: 681b ldr r3, [r3, #0]
80011ae: 4a1d ldr r2, [pc, #116] @ (8001224 <HAL_ADC_ConfigChannel+0x1e4>)
80011b0: 4293 cmp r3, r2
80011b2: d125 bne.n 8001200 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
80011b4: 687b ldr r3, [r7, #4]
80011b6: 681b ldr r3, [r3, #0]
80011b8: 689b ldr r3, [r3, #8]
80011ba: f403 0300 and.w r3, r3, #8388608 @ 0x800000
80011be: 2b00 cmp r3, #0
80011c0: d126 bne.n 8001210 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
80011c2: 687b ldr r3, [r7, #4]
80011c4: 681b ldr r3, [r3, #0]
80011c6: 689a ldr r2, [r3, #8]
80011c8: 687b ldr r3, [r7, #4]
80011ca: 681b ldr r3, [r3, #0]
80011cc: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
80011d0: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
80011d2: 683b ldr r3, [r7, #0]
80011d4: 681b ldr r3, [r3, #0]
80011d6: 2b10 cmp r3, #16
80011d8: d11a bne.n 8001210 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
80011da: 4b13 ldr r3, [pc, #76] @ (8001228 <HAL_ADC_ConfigChannel+0x1e8>)
80011dc: 681b ldr r3, [r3, #0]
80011de: 4a13 ldr r2, [pc, #76] @ (800122c <HAL_ADC_ConfigChannel+0x1ec>)
80011e0: fba2 2303 umull r2, r3, r2, r3
80011e4: 0c9a lsrs r2, r3, #18
80011e6: 4613 mov r3, r2
80011e8: 009b lsls r3, r3, #2
80011ea: 4413 add r3, r2
80011ec: 005b lsls r3, r3, #1
80011ee: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80011f0: e002 b.n 80011f8 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
80011f2: 68bb ldr r3, [r7, #8]
80011f4: 3b01 subs r3, #1
80011f6: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80011f8: 68bb ldr r3, [r7, #8]
80011fa: 2b00 cmp r3, #0
80011fc: d1f9 bne.n 80011f2 <HAL_ADC_ConfigChannel+0x1b2>
80011fe: e007 b.n 8001210 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8001200: 687b ldr r3, [r7, #4]
8001202: 6a9b ldr r3, [r3, #40] @ 0x28
8001204: f043 0220 orr.w r2, r3, #32
8001208: 687b ldr r3, [r7, #4]
800120a: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
800120c: 2301 movs r3, #1
800120e: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8001210: 687b ldr r3, [r7, #4]
8001212: 2200 movs r2, #0
8001214: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
8001218: 7bfb ldrb r3, [r7, #15]
}
800121a: 4618 mov r0, r3
800121c: 3714 adds r7, #20
800121e: 46bd mov sp, r7
8001220: bc80 pop {r7}
8001222: 4770 bx lr
8001224: 40012400 .word 0x40012400
8001228: 20000000 .word 0x20000000
800122c: 431bde83 .word 0x431bde83
08001230 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
8001230: b580 push {r7, lr}
8001232: b084 sub sp, #16
8001234: af00 add r7, sp, #0
8001236: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8001238: 2300 movs r3, #0
800123a: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
800123c: 687b ldr r3, [r7, #4]
800123e: 681b ldr r3, [r3, #0]
8001240: 689b ldr r3, [r3, #8]
8001242: f003 0301 and.w r3, r3, #1
8001246: 2b01 cmp r3, #1
8001248: d12e bne.n 80012a8 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
800124a: 687b ldr r3, [r7, #4]
800124c: 681b ldr r3, [r3, #0]
800124e: 689a ldr r2, [r3, #8]
8001250: 687b ldr r3, [r7, #4]
8001252: 681b ldr r3, [r3, #0]
8001254: f022 0201 bic.w r2, r2, #1
8001258: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
800125a: f7ff fe0f bl 8000e7c <HAL_GetTick>
800125e: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
8001260: e01b b.n 800129a <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
8001262: f7ff fe0b bl 8000e7c <HAL_GetTick>
8001266: 4602 mov r2, r0
8001268: 68fb ldr r3, [r7, #12]
800126a: 1ad3 subs r3, r2, r3
800126c: 2b02 cmp r3, #2
800126e: d914 bls.n 800129a <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
8001270: 687b ldr r3, [r7, #4]
8001272: 681b ldr r3, [r3, #0]
8001274: 689b ldr r3, [r3, #8]
8001276: f003 0301 and.w r3, r3, #1
800127a: 2b01 cmp r3, #1
800127c: d10d bne.n 800129a <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800127e: 687b ldr r3, [r7, #4]
8001280: 6a9b ldr r3, [r3, #40] @ 0x28
8001282: f043 0210 orr.w r2, r3, #16
8001286: 687b ldr r3, [r7, #4]
8001288: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
800128a: 687b ldr r3, [r7, #4]
800128c: 6adb ldr r3, [r3, #44] @ 0x2c
800128e: f043 0201 orr.w r2, r3, #1
8001292: 687b ldr r3, [r7, #4]
8001294: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
8001296: 2301 movs r3, #1
8001298: e007 b.n 80012aa <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
800129a: 687b ldr r3, [r7, #4]
800129c: 681b ldr r3, [r3, #0]
800129e: 689b ldr r3, [r3, #8]
80012a0: f003 0301 and.w r3, r3, #1
80012a4: 2b01 cmp r3, #1
80012a6: d0dc beq.n 8001262 <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
80012a8: 2300 movs r3, #0
}
80012aa: 4618 mov r0, r3
80012ac: 3710 adds r7, #16
80012ae: 46bd mov sp, r7
80012b0: bd80 pop {r7, pc}
...
080012b4 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80012b4: b480 push {r7}
80012b6: b085 sub sp, #20
80012b8: af00 add r7, sp, #0
80012ba: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80012bc: 687b ldr r3, [r7, #4]
80012be: f003 0307 and.w r3, r3, #7
80012c2: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
80012c4: 4b0c ldr r3, [pc, #48] @ (80012f8 <__NVIC_SetPriorityGrouping+0x44>)
80012c6: 68db ldr r3, [r3, #12]
80012c8: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
80012ca: 68ba ldr r2, [r7, #8]
80012cc: f64f 03ff movw r3, #63743 @ 0xf8ff
80012d0: 4013 ands r3, r2
80012d2: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
80012d4: 68fb ldr r3, [r7, #12]
80012d6: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
80012d8: 68bb ldr r3, [r7, #8]
80012da: 4313 orrs r3, r2
reg_value = (reg_value |
80012dc: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
80012e0: f443 3300 orr.w r3, r3, #131072 @ 0x20000
80012e4: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
80012e6: 4a04 ldr r2, [pc, #16] @ (80012f8 <__NVIC_SetPriorityGrouping+0x44>)
80012e8: 68bb ldr r3, [r7, #8]
80012ea: 60d3 str r3, [r2, #12]
}
80012ec: bf00 nop
80012ee: 3714 adds r7, #20
80012f0: 46bd mov sp, r7
80012f2: bc80 pop {r7}
80012f4: 4770 bx lr
80012f6: bf00 nop
80012f8: e000ed00 .word 0xe000ed00
080012fc <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
80012fc: b480 push {r7}
80012fe: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8001300: 4b04 ldr r3, [pc, #16] @ (8001314 <__NVIC_GetPriorityGrouping+0x18>)
8001302: 68db ldr r3, [r3, #12]
8001304: 0a1b lsrs r3, r3, #8
8001306: f003 0307 and.w r3, r3, #7
}
800130a: 4618 mov r0, r3
800130c: 46bd mov sp, r7
800130e: bc80 pop {r7}
8001310: 4770 bx lr
8001312: bf00 nop
8001314: e000ed00 .word 0xe000ed00
08001318 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8001318: b480 push {r7}
800131a: b083 sub sp, #12
800131c: af00 add r7, sp, #0
800131e: 4603 mov r3, r0
8001320: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001322: f997 3007 ldrsb.w r3, [r7, #7]
8001326: 2b00 cmp r3, #0
8001328: db0b blt.n 8001342 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
800132a: 79fb ldrb r3, [r7, #7]
800132c: f003 021f and.w r2, r3, #31
8001330: 4906 ldr r1, [pc, #24] @ (800134c <__NVIC_EnableIRQ+0x34>)
8001332: f997 3007 ldrsb.w r3, [r7, #7]
8001336: 095b lsrs r3, r3, #5
8001338: 2001 movs r0, #1
800133a: fa00 f202 lsl.w r2, r0, r2
800133e: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8001342: bf00 nop
8001344: 370c adds r7, #12
8001346: 46bd mov sp, r7
8001348: bc80 pop {r7}
800134a: 4770 bx lr
800134c: e000e100 .word 0xe000e100
08001350 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8001350: b480 push {r7}
8001352: b083 sub sp, #12
8001354: af00 add r7, sp, #0
8001356: 4603 mov r3, r0
8001358: 6039 str r1, [r7, #0]
800135a: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
800135c: f997 3007 ldrsb.w r3, [r7, #7]
8001360: 2b00 cmp r3, #0
8001362: db0a blt.n 800137a <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8001364: 683b ldr r3, [r7, #0]
8001366: b2da uxtb r2, r3
8001368: 490c ldr r1, [pc, #48] @ (800139c <__NVIC_SetPriority+0x4c>)
800136a: f997 3007 ldrsb.w r3, [r7, #7]
800136e: 0112 lsls r2, r2, #4
8001370: b2d2 uxtb r2, r2
8001372: 440b add r3, r1
8001374: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8001378: e00a b.n 8001390 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
800137a: 683b ldr r3, [r7, #0]
800137c: b2da uxtb r2, r3
800137e: 4908 ldr r1, [pc, #32] @ (80013a0 <__NVIC_SetPriority+0x50>)
8001380: 79fb ldrb r3, [r7, #7]
8001382: f003 030f and.w r3, r3, #15
8001386: 3b04 subs r3, #4
8001388: 0112 lsls r2, r2, #4
800138a: b2d2 uxtb r2, r2
800138c: 440b add r3, r1
800138e: 761a strb r2, [r3, #24]
}
8001390: bf00 nop
8001392: 370c adds r7, #12
8001394: 46bd mov sp, r7
8001396: bc80 pop {r7}
8001398: 4770 bx lr
800139a: bf00 nop
800139c: e000e100 .word 0xe000e100
80013a0: e000ed00 .word 0xe000ed00
080013a4 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
80013a4: b480 push {r7}
80013a6: b089 sub sp, #36 @ 0x24
80013a8: af00 add r7, sp, #0
80013aa: 60f8 str r0, [r7, #12]
80013ac: 60b9 str r1, [r7, #8]
80013ae: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80013b0: 68fb ldr r3, [r7, #12]
80013b2: f003 0307 and.w r3, r3, #7
80013b6: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
80013b8: 69fb ldr r3, [r7, #28]
80013ba: f1c3 0307 rsb r3, r3, #7
80013be: 2b04 cmp r3, #4
80013c0: bf28 it cs
80013c2: 2304 movcs r3, #4
80013c4: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
80013c6: 69fb ldr r3, [r7, #28]
80013c8: 3304 adds r3, #4
80013ca: 2b06 cmp r3, #6
80013cc: d902 bls.n 80013d4 <NVIC_EncodePriority+0x30>
80013ce: 69fb ldr r3, [r7, #28]
80013d0: 3b03 subs r3, #3
80013d2: e000 b.n 80013d6 <NVIC_EncodePriority+0x32>
80013d4: 2300 movs r3, #0
80013d6: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80013d8: f04f 32ff mov.w r2, #4294967295
80013dc: 69bb ldr r3, [r7, #24]
80013de: fa02 f303 lsl.w r3, r2, r3
80013e2: 43da mvns r2, r3
80013e4: 68bb ldr r3, [r7, #8]
80013e6: 401a ands r2, r3
80013e8: 697b ldr r3, [r7, #20]
80013ea: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
80013ec: f04f 31ff mov.w r1, #4294967295
80013f0: 697b ldr r3, [r7, #20]
80013f2: fa01 f303 lsl.w r3, r1, r3
80013f6: 43d9 mvns r1, r3
80013f8: 687b ldr r3, [r7, #4]
80013fa: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80013fc: 4313 orrs r3, r2
);
}
80013fe: 4618 mov r0, r3
8001400: 3724 adds r7, #36 @ 0x24
8001402: 46bd mov sp, r7
8001404: bc80 pop {r7}
8001406: 4770 bx lr
08001408 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8001408: b580 push {r7, lr}
800140a: b082 sub sp, #8
800140c: af00 add r7, sp, #0
800140e: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8001410: 687b ldr r3, [r7, #4]
8001412: 3b01 subs r3, #1
8001414: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
8001418: d301 bcc.n 800141e <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
800141a: 2301 movs r3, #1
800141c: e00f b.n 800143e <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
800141e: 4a0a ldr r2, [pc, #40] @ (8001448 <SysTick_Config+0x40>)
8001420: 687b ldr r3, [r7, #4]
8001422: 3b01 subs r3, #1
8001424: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8001426: 210f movs r1, #15
8001428: f04f 30ff mov.w r0, #4294967295
800142c: f7ff ff90 bl 8001350 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8001430: 4b05 ldr r3, [pc, #20] @ (8001448 <SysTick_Config+0x40>)
8001432: 2200 movs r2, #0
8001434: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8001436: 4b04 ldr r3, [pc, #16] @ (8001448 <SysTick_Config+0x40>)
8001438: 2207 movs r2, #7
800143a: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
800143c: 2300 movs r3, #0
}
800143e: 4618 mov r0, r3
8001440: 3708 adds r7, #8
8001442: 46bd mov sp, r7
8001444: bd80 pop {r7, pc}
8001446: bf00 nop
8001448: e000e010 .word 0xe000e010
0800144c <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
800144c: b580 push {r7, lr}
800144e: b082 sub sp, #8
8001450: af00 add r7, sp, #0
8001452: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8001454: 6878 ldr r0, [r7, #4]
8001456: f7ff ff2d bl 80012b4 <__NVIC_SetPriorityGrouping>
}
800145a: bf00 nop
800145c: 3708 adds r7, #8
800145e: 46bd mov sp, r7
8001460: bd80 pop {r7, pc}
08001462 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8001462: b580 push {r7, lr}
8001464: b086 sub sp, #24
8001466: af00 add r7, sp, #0
8001468: 4603 mov r3, r0
800146a: 60b9 str r1, [r7, #8]
800146c: 607a str r2, [r7, #4]
800146e: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8001470: 2300 movs r3, #0
8001472: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8001474: f7ff ff42 bl 80012fc <__NVIC_GetPriorityGrouping>
8001478: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
800147a: 687a ldr r2, [r7, #4]
800147c: 68b9 ldr r1, [r7, #8]
800147e: 6978 ldr r0, [r7, #20]
8001480: f7ff ff90 bl 80013a4 <NVIC_EncodePriority>
8001484: 4602 mov r2, r0
8001486: f997 300f ldrsb.w r3, [r7, #15]
800148a: 4611 mov r1, r2
800148c: 4618 mov r0, r3
800148e: f7ff ff5f bl 8001350 <__NVIC_SetPriority>
}
8001492: bf00 nop
8001494: 3718 adds r7, #24
8001496: 46bd mov sp, r7
8001498: bd80 pop {r7, pc}
0800149a <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
800149a: b580 push {r7, lr}
800149c: b082 sub sp, #8
800149e: af00 add r7, sp, #0
80014a0: 4603 mov r3, r0
80014a2: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
80014a4: f997 3007 ldrsb.w r3, [r7, #7]
80014a8: 4618 mov r0, r3
80014aa: f7ff ff35 bl 8001318 <__NVIC_EnableIRQ>
}
80014ae: bf00 nop
80014b0: 3708 adds r7, #8
80014b2: 46bd mov sp, r7
80014b4: bd80 pop {r7, pc}
080014b6 <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
80014b6: b580 push {r7, lr}
80014b8: b082 sub sp, #8
80014ba: af00 add r7, sp, #0
80014bc: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
80014be: 6878 ldr r0, [r7, #4]
80014c0: f7ff ffa2 bl 8001408 <SysTick_Config>
80014c4: 4603 mov r3, r0
}
80014c6: 4618 mov r0, r3
80014c8: 3708 adds r7, #8
80014ca: 46bd mov sp, r7
80014cc: bd80 pop {r7, pc}
080014ce <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
80014ce: b580 push {r7, lr}
80014d0: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
80014d2: f7fe fe3b bl 800014c <HAL_SYSTICK_Callback>
}
80014d6: bf00 nop
80014d8: bd80 pop {r7, pc}
...
080014dc <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
80014dc: b480 push {r7}
80014de: b08b sub sp, #44 @ 0x2c
80014e0: af00 add r7, sp, #0
80014e2: 6078 str r0, [r7, #4]
80014e4: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
80014e6: 2300 movs r3, #0
80014e8: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
80014ea: 2300 movs r3, #0
80014ec: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
80014ee: e169 b.n 80017c4 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
80014f0: 2201 movs r2, #1
80014f2: 6a7b ldr r3, [r7, #36] @ 0x24
80014f4: fa02 f303 lsl.w r3, r2, r3
80014f8: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
80014fa: 683b ldr r3, [r7, #0]
80014fc: 681b ldr r3, [r3, #0]
80014fe: 69fa ldr r2, [r7, #28]
8001500: 4013 ands r3, r2
8001502: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8001504: 69ba ldr r2, [r7, #24]
8001506: 69fb ldr r3, [r7, #28]
8001508: 429a cmp r2, r3
800150a: f040 8158 bne.w 80017be <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
800150e: 683b ldr r3, [r7, #0]
8001510: 685b ldr r3, [r3, #4]
8001512: 4a9a ldr r2, [pc, #616] @ (800177c <HAL_GPIO_Init+0x2a0>)
8001514: 4293 cmp r3, r2
8001516: d05e beq.n 80015d6 <HAL_GPIO_Init+0xfa>
8001518: 4a98 ldr r2, [pc, #608] @ (800177c <HAL_GPIO_Init+0x2a0>)
800151a: 4293 cmp r3, r2
800151c: d875 bhi.n 800160a <HAL_GPIO_Init+0x12e>
800151e: 4a98 ldr r2, [pc, #608] @ (8001780 <HAL_GPIO_Init+0x2a4>)
8001520: 4293 cmp r3, r2
8001522: d058 beq.n 80015d6 <HAL_GPIO_Init+0xfa>
8001524: 4a96 ldr r2, [pc, #600] @ (8001780 <HAL_GPIO_Init+0x2a4>)
8001526: 4293 cmp r3, r2
8001528: d86f bhi.n 800160a <HAL_GPIO_Init+0x12e>
800152a: 4a96 ldr r2, [pc, #600] @ (8001784 <HAL_GPIO_Init+0x2a8>)
800152c: 4293 cmp r3, r2
800152e: d052 beq.n 80015d6 <HAL_GPIO_Init+0xfa>
8001530: 4a94 ldr r2, [pc, #592] @ (8001784 <HAL_GPIO_Init+0x2a8>)
8001532: 4293 cmp r3, r2
8001534: d869 bhi.n 800160a <HAL_GPIO_Init+0x12e>
8001536: 4a94 ldr r2, [pc, #592] @ (8001788 <HAL_GPIO_Init+0x2ac>)
8001538: 4293 cmp r3, r2
800153a: d04c beq.n 80015d6 <HAL_GPIO_Init+0xfa>
800153c: 4a92 ldr r2, [pc, #584] @ (8001788 <HAL_GPIO_Init+0x2ac>)
800153e: 4293 cmp r3, r2
8001540: d863 bhi.n 800160a <HAL_GPIO_Init+0x12e>
8001542: 4a92 ldr r2, [pc, #584] @ (800178c <HAL_GPIO_Init+0x2b0>)
8001544: 4293 cmp r3, r2
8001546: d046 beq.n 80015d6 <HAL_GPIO_Init+0xfa>
8001548: 4a90 ldr r2, [pc, #576] @ (800178c <HAL_GPIO_Init+0x2b0>)
800154a: 4293 cmp r3, r2
800154c: d85d bhi.n 800160a <HAL_GPIO_Init+0x12e>
800154e: 2b12 cmp r3, #18
8001550: d82a bhi.n 80015a8 <HAL_GPIO_Init+0xcc>
8001552: 2b12 cmp r3, #18
8001554: d859 bhi.n 800160a <HAL_GPIO_Init+0x12e>
8001556: a201 add r2, pc, #4 @ (adr r2, 800155c <HAL_GPIO_Init+0x80>)
8001558: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800155c: 080015d7 .word 0x080015d7
8001560: 080015b1 .word 0x080015b1
8001564: 080015c3 .word 0x080015c3
8001568: 08001605 .word 0x08001605
800156c: 0800160b .word 0x0800160b
8001570: 0800160b .word 0x0800160b
8001574: 0800160b .word 0x0800160b
8001578: 0800160b .word 0x0800160b
800157c: 0800160b .word 0x0800160b
8001580: 0800160b .word 0x0800160b
8001584: 0800160b .word 0x0800160b
8001588: 0800160b .word 0x0800160b
800158c: 0800160b .word 0x0800160b
8001590: 0800160b .word 0x0800160b
8001594: 0800160b .word 0x0800160b
8001598: 0800160b .word 0x0800160b
800159c: 0800160b .word 0x0800160b
80015a0: 080015b9 .word 0x080015b9
80015a4: 080015cd .word 0x080015cd
80015a8: 4a79 ldr r2, [pc, #484] @ (8001790 <HAL_GPIO_Init+0x2b4>)
80015aa: 4293 cmp r3, r2
80015ac: d013 beq.n 80015d6 <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
80015ae: e02c b.n 800160a <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
80015b0: 683b ldr r3, [r7, #0]
80015b2: 68db ldr r3, [r3, #12]
80015b4: 623b str r3, [r7, #32]
break;
80015b6: e029 b.n 800160c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
80015b8: 683b ldr r3, [r7, #0]
80015ba: 68db ldr r3, [r3, #12]
80015bc: 3304 adds r3, #4
80015be: 623b str r3, [r7, #32]
break;
80015c0: e024 b.n 800160c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
80015c2: 683b ldr r3, [r7, #0]
80015c4: 68db ldr r3, [r3, #12]
80015c6: 3308 adds r3, #8
80015c8: 623b str r3, [r7, #32]
break;
80015ca: e01f b.n 800160c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
80015cc: 683b ldr r3, [r7, #0]
80015ce: 68db ldr r3, [r3, #12]
80015d0: 330c adds r3, #12
80015d2: 623b str r3, [r7, #32]
break;
80015d4: e01a b.n 800160c <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
80015d6: 683b ldr r3, [r7, #0]
80015d8: 689b ldr r3, [r3, #8]
80015da: 2b00 cmp r3, #0
80015dc: d102 bne.n 80015e4 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
80015de: 2304 movs r3, #4
80015e0: 623b str r3, [r7, #32]
break;
80015e2: e013 b.n 800160c <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
80015e4: 683b ldr r3, [r7, #0]
80015e6: 689b ldr r3, [r3, #8]
80015e8: 2b01 cmp r3, #1
80015ea: d105 bne.n 80015f8 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
80015ec: 2308 movs r3, #8
80015ee: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
80015f0: 687b ldr r3, [r7, #4]
80015f2: 69fa ldr r2, [r7, #28]
80015f4: 611a str r2, [r3, #16]
break;
80015f6: e009 b.n 800160c <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
80015f8: 2308 movs r3, #8
80015fa: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
80015fc: 687b ldr r3, [r7, #4]
80015fe: 69fa ldr r2, [r7, #28]
8001600: 615a str r2, [r3, #20]
break;
8001602: e003 b.n 800160c <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8001604: 2300 movs r3, #0
8001606: 623b str r3, [r7, #32]
break;
8001608: e000 b.n 800160c <HAL_GPIO_Init+0x130>
break;
800160a: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
800160c: 69bb ldr r3, [r7, #24]
800160e: 2bff cmp r3, #255 @ 0xff
8001610: d801 bhi.n 8001616 <HAL_GPIO_Init+0x13a>
8001612: 687b ldr r3, [r7, #4]
8001614: e001 b.n 800161a <HAL_GPIO_Init+0x13e>
8001616: 687b ldr r3, [r7, #4]
8001618: 3304 adds r3, #4
800161a: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
800161c: 69bb ldr r3, [r7, #24]
800161e: 2bff cmp r3, #255 @ 0xff
8001620: d802 bhi.n 8001628 <HAL_GPIO_Init+0x14c>
8001622: 6a7b ldr r3, [r7, #36] @ 0x24
8001624: 009b lsls r3, r3, #2
8001626: e002 b.n 800162e <HAL_GPIO_Init+0x152>
8001628: 6a7b ldr r3, [r7, #36] @ 0x24
800162a: 3b08 subs r3, #8
800162c: 009b lsls r3, r3, #2
800162e: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8001630: 697b ldr r3, [r7, #20]
8001632: 681a ldr r2, [r3, #0]
8001634: 210f movs r1, #15
8001636: 693b ldr r3, [r7, #16]
8001638: fa01 f303 lsl.w r3, r1, r3
800163c: 43db mvns r3, r3
800163e: 401a ands r2, r3
8001640: 6a39 ldr r1, [r7, #32]
8001642: 693b ldr r3, [r7, #16]
8001644: fa01 f303 lsl.w r3, r1, r3
8001648: 431a orrs r2, r3
800164a: 697b ldr r3, [r7, #20]
800164c: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
800164e: 683b ldr r3, [r7, #0]
8001650: 685b ldr r3, [r3, #4]
8001652: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8001656: 2b00 cmp r3, #0
8001658: f000 80b1 beq.w 80017be <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
800165c: 4b4d ldr r3, [pc, #308] @ (8001794 <HAL_GPIO_Init+0x2b8>)
800165e: 699b ldr r3, [r3, #24]
8001660: 4a4c ldr r2, [pc, #304] @ (8001794 <HAL_GPIO_Init+0x2b8>)
8001662: f043 0301 orr.w r3, r3, #1
8001666: 6193 str r3, [r2, #24]
8001668: 4b4a ldr r3, [pc, #296] @ (8001794 <HAL_GPIO_Init+0x2b8>)
800166a: 699b ldr r3, [r3, #24]
800166c: f003 0301 and.w r3, r3, #1
8001670: 60bb str r3, [r7, #8]
8001672: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8001674: 4a48 ldr r2, [pc, #288] @ (8001798 <HAL_GPIO_Init+0x2bc>)
8001676: 6a7b ldr r3, [r7, #36] @ 0x24
8001678: 089b lsrs r3, r3, #2
800167a: 3302 adds r3, #2
800167c: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8001680: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
8001682: 6a7b ldr r3, [r7, #36] @ 0x24
8001684: f003 0303 and.w r3, r3, #3
8001688: 009b lsls r3, r3, #2
800168a: 220f movs r2, #15
800168c: fa02 f303 lsl.w r3, r2, r3
8001690: 43db mvns r3, r3
8001692: 68fa ldr r2, [r7, #12]
8001694: 4013 ands r3, r2
8001696: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8001698: 687b ldr r3, [r7, #4]
800169a: 4a40 ldr r2, [pc, #256] @ (800179c <HAL_GPIO_Init+0x2c0>)
800169c: 4293 cmp r3, r2
800169e: d013 beq.n 80016c8 <HAL_GPIO_Init+0x1ec>
80016a0: 687b ldr r3, [r7, #4]
80016a2: 4a3f ldr r2, [pc, #252] @ (80017a0 <HAL_GPIO_Init+0x2c4>)
80016a4: 4293 cmp r3, r2
80016a6: d00d beq.n 80016c4 <HAL_GPIO_Init+0x1e8>
80016a8: 687b ldr r3, [r7, #4]
80016aa: 4a3e ldr r2, [pc, #248] @ (80017a4 <HAL_GPIO_Init+0x2c8>)
80016ac: 4293 cmp r3, r2
80016ae: d007 beq.n 80016c0 <HAL_GPIO_Init+0x1e4>
80016b0: 687b ldr r3, [r7, #4]
80016b2: 4a3d ldr r2, [pc, #244] @ (80017a8 <HAL_GPIO_Init+0x2cc>)
80016b4: 4293 cmp r3, r2
80016b6: d101 bne.n 80016bc <HAL_GPIO_Init+0x1e0>
80016b8: 2303 movs r3, #3
80016ba: e006 b.n 80016ca <HAL_GPIO_Init+0x1ee>
80016bc: 2304 movs r3, #4
80016be: e004 b.n 80016ca <HAL_GPIO_Init+0x1ee>
80016c0: 2302 movs r3, #2
80016c2: e002 b.n 80016ca <HAL_GPIO_Init+0x1ee>
80016c4: 2301 movs r3, #1
80016c6: e000 b.n 80016ca <HAL_GPIO_Init+0x1ee>
80016c8: 2300 movs r3, #0
80016ca: 6a7a ldr r2, [r7, #36] @ 0x24
80016cc: f002 0203 and.w r2, r2, #3
80016d0: 0092 lsls r2, r2, #2
80016d2: 4093 lsls r3, r2
80016d4: 68fa ldr r2, [r7, #12]
80016d6: 4313 orrs r3, r2
80016d8: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
80016da: 492f ldr r1, [pc, #188] @ (8001798 <HAL_GPIO_Init+0x2bc>)
80016dc: 6a7b ldr r3, [r7, #36] @ 0x24
80016de: 089b lsrs r3, r3, #2
80016e0: 3302 adds r3, #2
80016e2: 68fa ldr r2, [r7, #12]
80016e4: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
80016e8: 683b ldr r3, [r7, #0]
80016ea: 685b ldr r3, [r3, #4]
80016ec: f403 1380 and.w r3, r3, #1048576 @ 0x100000
80016f0: 2b00 cmp r3, #0
80016f2: d006 beq.n 8001702 <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
80016f4: 4b2d ldr r3, [pc, #180] @ (80017ac <HAL_GPIO_Init+0x2d0>)
80016f6: 689a ldr r2, [r3, #8]
80016f8: 492c ldr r1, [pc, #176] @ (80017ac <HAL_GPIO_Init+0x2d0>)
80016fa: 69bb ldr r3, [r7, #24]
80016fc: 4313 orrs r3, r2
80016fe: 608b str r3, [r1, #8]
8001700: e006 b.n 8001710 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
8001702: 4b2a ldr r3, [pc, #168] @ (80017ac <HAL_GPIO_Init+0x2d0>)
8001704: 689a ldr r2, [r3, #8]
8001706: 69bb ldr r3, [r7, #24]
8001708: 43db mvns r3, r3
800170a: 4928 ldr r1, [pc, #160] @ (80017ac <HAL_GPIO_Init+0x2d0>)
800170c: 4013 ands r3, r2
800170e: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8001710: 683b ldr r3, [r7, #0]
8001712: 685b ldr r3, [r3, #4]
8001714: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8001718: 2b00 cmp r3, #0
800171a: d006 beq.n 800172a <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
800171c: 4b23 ldr r3, [pc, #140] @ (80017ac <HAL_GPIO_Init+0x2d0>)
800171e: 68da ldr r2, [r3, #12]
8001720: 4922 ldr r1, [pc, #136] @ (80017ac <HAL_GPIO_Init+0x2d0>)
8001722: 69bb ldr r3, [r7, #24]
8001724: 4313 orrs r3, r2
8001726: 60cb str r3, [r1, #12]
8001728: e006 b.n 8001738 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
800172a: 4b20 ldr r3, [pc, #128] @ (80017ac <HAL_GPIO_Init+0x2d0>)
800172c: 68da ldr r2, [r3, #12]
800172e: 69bb ldr r3, [r7, #24]
8001730: 43db mvns r3, r3
8001732: 491e ldr r1, [pc, #120] @ (80017ac <HAL_GPIO_Init+0x2d0>)
8001734: 4013 ands r3, r2
8001736: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8001738: 683b ldr r3, [r7, #0]
800173a: 685b ldr r3, [r3, #4]
800173c: f403 3300 and.w r3, r3, #131072 @ 0x20000
8001740: 2b00 cmp r3, #0
8001742: d006 beq.n 8001752 <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
8001744: 4b19 ldr r3, [pc, #100] @ (80017ac <HAL_GPIO_Init+0x2d0>)
8001746: 685a ldr r2, [r3, #4]
8001748: 4918 ldr r1, [pc, #96] @ (80017ac <HAL_GPIO_Init+0x2d0>)
800174a: 69bb ldr r3, [r7, #24]
800174c: 4313 orrs r3, r2
800174e: 604b str r3, [r1, #4]
8001750: e006 b.n 8001760 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8001752: 4b16 ldr r3, [pc, #88] @ (80017ac <HAL_GPIO_Init+0x2d0>)
8001754: 685a ldr r2, [r3, #4]
8001756: 69bb ldr r3, [r7, #24]
8001758: 43db mvns r3, r3
800175a: 4914 ldr r1, [pc, #80] @ (80017ac <HAL_GPIO_Init+0x2d0>)
800175c: 4013 ands r3, r2
800175e: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8001760: 683b ldr r3, [r7, #0]
8001762: 685b ldr r3, [r3, #4]
8001764: f403 3380 and.w r3, r3, #65536 @ 0x10000
8001768: 2b00 cmp r3, #0
800176a: d021 beq.n 80017b0 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
800176c: 4b0f ldr r3, [pc, #60] @ (80017ac <HAL_GPIO_Init+0x2d0>)
800176e: 681a ldr r2, [r3, #0]
8001770: 490e ldr r1, [pc, #56] @ (80017ac <HAL_GPIO_Init+0x2d0>)
8001772: 69bb ldr r3, [r7, #24]
8001774: 4313 orrs r3, r2
8001776: 600b str r3, [r1, #0]
8001778: e021 b.n 80017be <HAL_GPIO_Init+0x2e2>
800177a: bf00 nop
800177c: 10320000 .word 0x10320000
8001780: 10310000 .word 0x10310000
8001784: 10220000 .word 0x10220000
8001788: 10210000 .word 0x10210000
800178c: 10120000 .word 0x10120000
8001790: 10110000 .word 0x10110000
8001794: 40021000 .word 0x40021000
8001798: 40010000 .word 0x40010000
800179c: 40010800 .word 0x40010800
80017a0: 40010c00 .word 0x40010c00
80017a4: 40011000 .word 0x40011000
80017a8: 40011400 .word 0x40011400
80017ac: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
80017b0: 4b0b ldr r3, [pc, #44] @ (80017e0 <HAL_GPIO_Init+0x304>)
80017b2: 681a ldr r2, [r3, #0]
80017b4: 69bb ldr r3, [r7, #24]
80017b6: 43db mvns r3, r3
80017b8: 4909 ldr r1, [pc, #36] @ (80017e0 <HAL_GPIO_Init+0x304>)
80017ba: 4013 ands r3, r2
80017bc: 600b str r3, [r1, #0]
}
}
}
position++;
80017be: 6a7b ldr r3, [r7, #36] @ 0x24
80017c0: 3301 adds r3, #1
80017c2: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
80017c4: 683b ldr r3, [r7, #0]
80017c6: 681a ldr r2, [r3, #0]
80017c8: 6a7b ldr r3, [r7, #36] @ 0x24
80017ca: fa22 f303 lsr.w r3, r2, r3
80017ce: 2b00 cmp r3, #0
80017d0: f47f ae8e bne.w 80014f0 <HAL_GPIO_Init+0x14>
}
}
80017d4: bf00 nop
80017d6: bf00 nop
80017d8: 372c adds r7, #44 @ 0x2c
80017da: 46bd mov sp, r7
80017dc: bc80 pop {r7}
80017de: 4770 bx lr
80017e0: 40010400 .word 0x40010400
080017e4 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
80017e4: b480 push {r7}
80017e6: b083 sub sp, #12
80017e8: af00 add r7, sp, #0
80017ea: 6078 str r0, [r7, #4]
80017ec: 460b mov r3, r1
80017ee: 807b strh r3, [r7, #2]
80017f0: 4613 mov r3, r2
80017f2: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
80017f4: 787b ldrb r3, [r7, #1]
80017f6: 2b00 cmp r3, #0
80017f8: d003 beq.n 8001802 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
80017fa: 887a ldrh r2, [r7, #2]
80017fc: 687b ldr r3, [r7, #4]
80017fe: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
8001800: e003 b.n 800180a <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8001802: 887b ldrh r3, [r7, #2]
8001804: 041a lsls r2, r3, #16
8001806: 687b ldr r3, [r7, #4]
8001808: 611a str r2, [r3, #16]
}
800180a: bf00 nop
800180c: 370c adds r7, #12
800180e: 46bd mov sp, r7
8001810: bc80 pop {r7}
8001812: 4770 bx lr
08001814 <HAL_GPIO_TogglePin>:
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
* @param GPIO_Pin: Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8001814: b480 push {r7}
8001816: b085 sub sp, #20
8001818: af00 add r7, sp, #0
800181a: 6078 str r0, [r7, #4]
800181c: 460b mov r3, r1
800181e: 807b strh r3, [r7, #2]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* get current Output Data Register value */
odr = GPIOx->ODR;
8001820: 687b ldr r3, [r7, #4]
8001822: 68db ldr r3, [r3, #12]
8001824: 60fb str r3, [r7, #12]
/* Set selected pins that were at low level, and reset ones that were high */
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
8001826: 887a ldrh r2, [r7, #2]
8001828: 68fb ldr r3, [r7, #12]
800182a: 4013 ands r3, r2
800182c: 041a lsls r2, r3, #16
800182e: 68fb ldr r3, [r7, #12]
8001830: 43d9 mvns r1, r3
8001832: 887b ldrh r3, [r7, #2]
8001834: 400b ands r3, r1
8001836: 431a orrs r2, r3
8001838: 687b ldr r3, [r7, #4]
800183a: 611a str r2, [r3, #16]
}
800183c: bf00 nop
800183e: 3714 adds r7, #20
8001840: 46bd mov sp, r7
8001842: bc80 pop {r7}
8001844: 4770 bx lr
08001846 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8001846: b580 push {r7, lr}
8001848: b084 sub sp, #16
800184a: af00 add r7, sp, #0
800184c: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
800184e: 687b ldr r3, [r7, #4]
8001850: 2b00 cmp r3, #0
8001852: d101 bne.n 8001858 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8001854: 2301 movs r3, #1
8001856: e0e8 b.n 8001a2a <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8001858: 687b ldr r3, [r7, #4]
800185a: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
800185e: b2db uxtb r3, r3
8001860: 2b00 cmp r3, #0
8001862: d106 bne.n 8001872 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8001864: 687b ldr r3, [r7, #4]
8001866: 2200 movs r2, #0
8001868: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
800186c: 6878 ldr r0, [r7, #4]
800186e: f007 f985 bl 8008b7c <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8001872: 687b ldr r3, [r7, #4]
8001874: 2203 movs r2, #3
8001876: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
800187a: 687b ldr r3, [r7, #4]
800187c: 2200 movs r2, #0
800187e: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8001880: 687b ldr r3, [r7, #4]
8001882: 681b ldr r3, [r3, #0]
8001884: 4618 mov r0, r3
8001886: f003 f829 bl 80048dc <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
800188a: 687b ldr r3, [r7, #4]
800188c: 6818 ldr r0, [r3, #0]
800188e: 687b ldr r3, [r7, #4]
8001890: 3304 adds r3, #4
8001892: cb0e ldmia r3, {r1, r2, r3}
8001894: f002 ffff bl 8004896 <USB_CoreInit>
8001898: 4603 mov r3, r0
800189a: 2b00 cmp r3, #0
800189c: d005 beq.n 80018aa <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800189e: 687b ldr r3, [r7, #4]
80018a0: 2202 movs r2, #2
80018a2: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80018a6: 2301 movs r3, #1
80018a8: e0bf b.n 8001a2a <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
80018aa: 687b ldr r3, [r7, #4]
80018ac: 681b ldr r3, [r3, #0]
80018ae: 2100 movs r1, #0
80018b0: 4618 mov r0, r3
80018b2: f003 f82d bl 8004910 <USB_SetCurrentMode>
80018b6: 4603 mov r3, r0
80018b8: 2b00 cmp r3, #0
80018ba: d005 beq.n 80018c8 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80018bc: 687b ldr r3, [r7, #4]
80018be: 2202 movs r2, #2
80018c0: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80018c4: 2301 movs r3, #1
80018c6: e0b0 b.n 8001a2a <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80018c8: 2300 movs r3, #0
80018ca: 73fb strb r3, [r7, #15]
80018cc: e03e b.n 800194c <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
80018ce: 7bfa ldrb r2, [r7, #15]
80018d0: 6879 ldr r1, [r7, #4]
80018d2: 4613 mov r3, r2
80018d4: 009b lsls r3, r3, #2
80018d6: 4413 add r3, r2
80018d8: 00db lsls r3, r3, #3
80018da: 440b add r3, r1
80018dc: 3311 adds r3, #17
80018de: 2201 movs r2, #1
80018e0: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
80018e2: 7bfa ldrb r2, [r7, #15]
80018e4: 6879 ldr r1, [r7, #4]
80018e6: 4613 mov r3, r2
80018e8: 009b lsls r3, r3, #2
80018ea: 4413 add r3, r2
80018ec: 00db lsls r3, r3, #3
80018ee: 440b add r3, r1
80018f0: 3310 adds r3, #16
80018f2: 7bfa ldrb r2, [r7, #15]
80018f4: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
80018f6: 7bfa ldrb r2, [r7, #15]
80018f8: 6879 ldr r1, [r7, #4]
80018fa: 4613 mov r3, r2
80018fc: 009b lsls r3, r3, #2
80018fe: 4413 add r3, r2
8001900: 00db lsls r3, r3, #3
8001902: 440b add r3, r1
8001904: 3313 adds r3, #19
8001906: 2200 movs r2, #0
8001908: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
800190a: 7bfa ldrb r2, [r7, #15]
800190c: 6879 ldr r1, [r7, #4]
800190e: 4613 mov r3, r2
8001910: 009b lsls r3, r3, #2
8001912: 4413 add r3, r2
8001914: 00db lsls r3, r3, #3
8001916: 440b add r3, r1
8001918: 3320 adds r3, #32
800191a: 2200 movs r2, #0
800191c: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
800191e: 7bfa ldrb r2, [r7, #15]
8001920: 6879 ldr r1, [r7, #4]
8001922: 4613 mov r3, r2
8001924: 009b lsls r3, r3, #2
8001926: 4413 add r3, r2
8001928: 00db lsls r3, r3, #3
800192a: 440b add r3, r1
800192c: 3324 adds r3, #36 @ 0x24
800192e: 2200 movs r2, #0
8001930: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8001932: 7bfb ldrb r3, [r7, #15]
8001934: 6879 ldr r1, [r7, #4]
8001936: 1c5a adds r2, r3, #1
8001938: 4613 mov r3, r2
800193a: 009b lsls r3, r3, #2
800193c: 4413 add r3, r2
800193e: 00db lsls r3, r3, #3
8001940: 440b add r3, r1
8001942: 2200 movs r2, #0
8001944: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001946: 7bfb ldrb r3, [r7, #15]
8001948: 3301 adds r3, #1
800194a: 73fb strb r3, [r7, #15]
800194c: 687b ldr r3, [r7, #4]
800194e: 791b ldrb r3, [r3, #4]
8001950: 7bfa ldrb r2, [r7, #15]
8001952: 429a cmp r2, r3
8001954: d3bb bcc.n 80018ce <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001956: 2300 movs r3, #0
8001958: 73fb strb r3, [r7, #15]
800195a: e044 b.n 80019e6 <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
800195c: 7bfa ldrb r2, [r7, #15]
800195e: 6879 ldr r1, [r7, #4]
8001960: 4613 mov r3, r2
8001962: 009b lsls r3, r3, #2
8001964: 4413 add r3, r2
8001966: 00db lsls r3, r3, #3
8001968: 440b add r3, r1
800196a: f203 1351 addw r3, r3, #337 @ 0x151
800196e: 2200 movs r2, #0
8001970: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8001972: 7bfa ldrb r2, [r7, #15]
8001974: 6879 ldr r1, [r7, #4]
8001976: 4613 mov r3, r2
8001978: 009b lsls r3, r3, #2
800197a: 4413 add r3, r2
800197c: 00db lsls r3, r3, #3
800197e: 440b add r3, r1
8001980: f503 73a8 add.w r3, r3, #336 @ 0x150
8001984: 7bfa ldrb r2, [r7, #15]
8001986: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8001988: 7bfa ldrb r2, [r7, #15]
800198a: 6879 ldr r1, [r7, #4]
800198c: 4613 mov r3, r2
800198e: 009b lsls r3, r3, #2
8001990: 4413 add r3, r2
8001992: 00db lsls r3, r3, #3
8001994: 440b add r3, r1
8001996: f203 1353 addw r3, r3, #339 @ 0x153
800199a: 2200 movs r2, #0
800199c: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
800199e: 7bfa ldrb r2, [r7, #15]
80019a0: 6879 ldr r1, [r7, #4]
80019a2: 4613 mov r3, r2
80019a4: 009b lsls r3, r3, #2
80019a6: 4413 add r3, r2
80019a8: 00db lsls r3, r3, #3
80019aa: 440b add r3, r1
80019ac: f503 73b0 add.w r3, r3, #352 @ 0x160
80019b0: 2200 movs r2, #0
80019b2: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
80019b4: 7bfa ldrb r2, [r7, #15]
80019b6: 6879 ldr r1, [r7, #4]
80019b8: 4613 mov r3, r2
80019ba: 009b lsls r3, r3, #2
80019bc: 4413 add r3, r2
80019be: 00db lsls r3, r3, #3
80019c0: 440b add r3, r1
80019c2: f503 73b2 add.w r3, r3, #356 @ 0x164
80019c6: 2200 movs r2, #0
80019c8: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
80019ca: 7bfa ldrb r2, [r7, #15]
80019cc: 6879 ldr r1, [r7, #4]
80019ce: 4613 mov r3, r2
80019d0: 009b lsls r3, r3, #2
80019d2: 4413 add r3, r2
80019d4: 00db lsls r3, r3, #3
80019d6: 440b add r3, r1
80019d8: f503 73b4 add.w r3, r3, #360 @ 0x168
80019dc: 2200 movs r2, #0
80019de: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80019e0: 7bfb ldrb r3, [r7, #15]
80019e2: 3301 adds r3, #1
80019e4: 73fb strb r3, [r7, #15]
80019e6: 687b ldr r3, [r7, #4]
80019e8: 791b ldrb r3, [r3, #4]
80019ea: 7bfa ldrb r2, [r7, #15]
80019ec: 429a cmp r2, r3
80019ee: d3b5 bcc.n 800195c <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80019f0: 687b ldr r3, [r7, #4]
80019f2: 6818 ldr r0, [r3, #0]
80019f4: 687b ldr r3, [r7, #4]
80019f6: 3304 adds r3, #4
80019f8: cb0e ldmia r3, {r1, r2, r3}
80019fa: f002 ff95 bl 8004928 <USB_DevInit>
80019fe: 4603 mov r3, r0
8001a00: 2b00 cmp r3, #0
8001a02: d005 beq.n 8001a10 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8001a04: 687b ldr r3, [r7, #4]
8001a06: 2202 movs r2, #2
8001a08: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8001a0c: 2301 movs r3, #1
8001a0e: e00c b.n 8001a2a <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
8001a10: 687b ldr r3, [r7, #4]
8001a12: 2200 movs r2, #0
8001a14: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
8001a16: 687b ldr r3, [r7, #4]
8001a18: 2201 movs r2, #1
8001a1a: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
8001a1e: 687b ldr r3, [r7, #4]
8001a20: 681b ldr r3, [r3, #0]
8001a22: 4618 mov r0, r3
8001a24: f005 fa15 bl 8006e52 <USB_DevDisconnect>
return HAL_OK;
8001a28: 2300 movs r3, #0
}
8001a2a: 4618 mov r0, r3
8001a2c: 3710 adds r7, #16
8001a2e: 46bd mov sp, r7
8001a30: bd80 pop {r7, pc}
08001a32 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8001a32: b580 push {r7, lr}
8001a34: b082 sub sp, #8
8001a36: af00 add r7, sp, #0
8001a38: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8001a3a: 687b ldr r3, [r7, #4]
8001a3c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001a40: 2b01 cmp r3, #1
8001a42: d101 bne.n 8001a48 <HAL_PCD_Start+0x16>
8001a44: 2302 movs r3, #2
8001a46: e016 b.n 8001a76 <HAL_PCD_Start+0x44>
8001a48: 687b ldr r3, [r7, #4]
8001a4a: 2201 movs r2, #1
8001a4c: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8001a50: 687b ldr r3, [r7, #4]
8001a52: 681b ldr r3, [r3, #0]
8001a54: 4618 mov r0, r3
8001a56: f002 ff2b bl 80048b0 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8001a5a: 2101 movs r1, #1
8001a5c: 6878 ldr r0, [r7, #4]
8001a5e: f007 fb00 bl 8009062 <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
8001a62: 687b ldr r3, [r7, #4]
8001a64: 681b ldr r3, [r3, #0]
8001a66: 4618 mov r0, r3
8001a68: f005 f9e9 bl 8006e3e <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8001a6c: 687b ldr r3, [r7, #4]
8001a6e: 2200 movs r2, #0
8001a70: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001a74: 2300 movs r3, #0
}
8001a76: 4618 mov r0, r3
8001a78: 3708 adds r7, #8
8001a7a: 46bd mov sp, r7
8001a7c: bd80 pop {r7, pc}
08001a7e <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8001a7e: b580 push {r7, lr}
8001a80: b088 sub sp, #32
8001a82: af00 add r7, sp, #0
8001a84: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8001a86: 687b ldr r3, [r7, #4]
8001a88: 681b ldr r3, [r3, #0]
8001a8a: 4618 mov r0, r3
8001a8c: f005 f9eb bl 8006e66 <USB_ReadInterrupts>
8001a90: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
8001a92: 69bb ldr r3, [r7, #24]
8001a94: f403 4300 and.w r3, r3, #32768 @ 0x8000
8001a98: 2b00 cmp r3, #0
8001a9a: d003 beq.n 8001aa4 <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8001a9c: 6878 ldr r0, [r7, #4]
8001a9e: f000 fb1a bl 80020d6 <PCD_EP_ISR_Handler>
return;
8001aa2: e119 b.n 8001cd8 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8001aa4: 69bb ldr r3, [r7, #24]
8001aa6: f403 6380 and.w r3, r3, #1024 @ 0x400
8001aaa: 2b00 cmp r3, #0
8001aac: d013 beq.n 8001ad6 <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8001aae: 687b ldr r3, [r7, #4]
8001ab0: 681b ldr r3, [r3, #0]
8001ab2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001ab6: b29a uxth r2, r3
8001ab8: 687b ldr r3, [r7, #4]
8001aba: 681b ldr r3, [r3, #0]
8001abc: f422 6280 bic.w r2, r2, #1024 @ 0x400
8001ac0: b292 uxth r2, r2
8001ac2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8001ac6: 6878 ldr r0, [r7, #4]
8001ac8: f007 f8d3 bl 8008c72 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
8001acc: 2100 movs r1, #0
8001ace: 6878 ldr r0, [r7, #4]
8001ad0: f000 f905 bl 8001cde <HAL_PCD_SetAddress>
return;
8001ad4: e100 b.n 8001cd8 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8001ad6: 69bb ldr r3, [r7, #24]
8001ad8: f403 4380 and.w r3, r3, #16384 @ 0x4000
8001adc: 2b00 cmp r3, #0
8001ade: d00c beq.n 8001afa <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8001ae0: 687b ldr r3, [r7, #4]
8001ae2: 681b ldr r3, [r3, #0]
8001ae4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001ae8: b29a uxth r2, r3
8001aea: 687b ldr r3, [r7, #4]
8001aec: 681b ldr r3, [r3, #0]
8001aee: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8001af2: b292 uxth r2, r2
8001af4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001af8: e0ee b.n 8001cd8 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
8001afa: 69bb ldr r3, [r7, #24]
8001afc: f403 5300 and.w r3, r3, #8192 @ 0x2000
8001b00: 2b00 cmp r3, #0
8001b02: d00c beq.n 8001b1e <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8001b04: 687b ldr r3, [r7, #4]
8001b06: 681b ldr r3, [r3, #0]
8001b08: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001b0c: b29a uxth r2, r3
8001b0e: 687b ldr r3, [r7, #4]
8001b10: 681b ldr r3, [r3, #0]
8001b12: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8001b16: b292 uxth r2, r2
8001b18: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001b1c: e0dc b.n 8001cd8 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8001b1e: 69bb ldr r3, [r7, #24]
8001b20: f403 5380 and.w r3, r3, #4096 @ 0x1000
8001b24: 2b00 cmp r3, #0
8001b26: d027 beq.n 8001b78 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8001b28: 687b ldr r3, [r7, #4]
8001b2a: 681b ldr r3, [r3, #0]
8001b2c: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001b30: b29a uxth r2, r3
8001b32: 687b ldr r3, [r7, #4]
8001b34: 681b ldr r3, [r3, #0]
8001b36: f022 0204 bic.w r2, r2, #4
8001b3a: b292 uxth r2, r2
8001b3c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8001b40: 687b ldr r3, [r7, #4]
8001b42: 681b ldr r3, [r3, #0]
8001b44: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001b48: b29a uxth r2, r3
8001b4a: 687b ldr r3, [r7, #4]
8001b4c: 681b ldr r3, [r3, #0]
8001b4e: f022 0208 bic.w r2, r2, #8
8001b52: b292 uxth r2, r2
8001b54: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8001b58: 6878 ldr r0, [r7, #4]
8001b5a: f007 f8c3 bl 8008ce4 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8001b5e: 687b ldr r3, [r7, #4]
8001b60: 681b ldr r3, [r3, #0]
8001b62: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001b66: b29a uxth r2, r3
8001b68: 687b ldr r3, [r7, #4]
8001b6a: 681b ldr r3, [r3, #0]
8001b6c: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8001b70: b292 uxth r2, r2
8001b72: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001b76: e0af b.n 8001cd8 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8001b78: 69bb ldr r3, [r7, #24]
8001b7a: f403 6300 and.w r3, r3, #2048 @ 0x800
8001b7e: 2b00 cmp r3, #0
8001b80: f000 8083 beq.w 8001c8a <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
8001b84: 2300 movs r3, #0
8001b86: 77fb strb r3, [r7, #31]
8001b88: e010 b.n 8001bac <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8001b8a: 687b ldr r3, [r7, #4]
8001b8c: 681b ldr r3, [r3, #0]
8001b8e: 461a mov r2, r3
8001b90: 7ffb ldrb r3, [r7, #31]
8001b92: 009b lsls r3, r3, #2
8001b94: 441a add r2, r3
8001b96: 7ffb ldrb r3, [r7, #31]
8001b98: 8812 ldrh r2, [r2, #0]
8001b9a: b292 uxth r2, r2
8001b9c: 005b lsls r3, r3, #1
8001b9e: 3320 adds r3, #32
8001ba0: 443b add r3, r7
8001ba2: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8001ba6: 7ffb ldrb r3, [r7, #31]
8001ba8: 3301 adds r3, #1
8001baa: 77fb strb r3, [r7, #31]
8001bac: 7ffb ldrb r3, [r7, #31]
8001bae: 2b07 cmp r3, #7
8001bb0: d9eb bls.n 8001b8a <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8001bb2: 687b ldr r3, [r7, #4]
8001bb4: 681b ldr r3, [r3, #0]
8001bb6: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001bba: b29a uxth r2, r3
8001bbc: 687b ldr r3, [r7, #4]
8001bbe: 681b ldr r3, [r3, #0]
8001bc0: f042 0201 orr.w r2, r2, #1
8001bc4: b292 uxth r2, r2
8001bc6: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
8001bca: 687b ldr r3, [r7, #4]
8001bcc: 681b ldr r3, [r3, #0]
8001bce: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001bd2: b29a uxth r2, r3
8001bd4: 687b ldr r3, [r7, #4]
8001bd6: 681b ldr r3, [r3, #0]
8001bd8: f022 0201 bic.w r2, r2, #1
8001bdc: b292 uxth r2, r2
8001bde: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8001be2: bf00 nop
8001be4: 687b ldr r3, [r7, #4]
8001be6: 681b ldr r3, [r3, #0]
8001be8: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001bec: b29b uxth r3, r3
8001bee: f403 6380 and.w r3, r3, #1024 @ 0x400
8001bf2: 2b00 cmp r3, #0
8001bf4: d0f6 beq.n 8001be4 <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8001bf6: 687b ldr r3, [r7, #4]
8001bf8: 681b ldr r3, [r3, #0]
8001bfa: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001bfe: b29a uxth r2, r3
8001c00: 687b ldr r3, [r7, #4]
8001c02: 681b ldr r3, [r3, #0]
8001c04: f422 6280 bic.w r2, r2, #1024 @ 0x400
8001c08: b292 uxth r2, r2
8001c0a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8001c0e: 2300 movs r3, #0
8001c10: 77fb strb r3, [r7, #31]
8001c12: e00f b.n 8001c34 <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8001c14: 7ffb ldrb r3, [r7, #31]
8001c16: 687a ldr r2, [r7, #4]
8001c18: 6812 ldr r2, [r2, #0]
8001c1a: 4611 mov r1, r2
8001c1c: 7ffa ldrb r2, [r7, #31]
8001c1e: 0092 lsls r2, r2, #2
8001c20: 440a add r2, r1
8001c22: 005b lsls r3, r3, #1
8001c24: 3320 adds r3, #32
8001c26: 443b add r3, r7
8001c28: f833 3c18 ldrh.w r3, [r3, #-24]
8001c2c: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8001c2e: 7ffb ldrb r3, [r7, #31]
8001c30: 3301 adds r3, #1
8001c32: 77fb strb r3, [r7, #31]
8001c34: 7ffb ldrb r3, [r7, #31]
8001c36: 2b07 cmp r3, #7
8001c38: d9ec bls.n 8001c14 <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8001c3a: 687b ldr r3, [r7, #4]
8001c3c: 681b ldr r3, [r3, #0]
8001c3e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001c42: b29a uxth r2, r3
8001c44: 687b ldr r3, [r7, #4]
8001c46: 681b ldr r3, [r3, #0]
8001c48: f042 0208 orr.w r2, r2, #8
8001c4c: b292 uxth r2, r2
8001c4e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8001c52: 687b ldr r3, [r7, #4]
8001c54: 681b ldr r3, [r3, #0]
8001c56: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001c5a: b29a uxth r2, r3
8001c5c: 687b ldr r3, [r7, #4]
8001c5e: 681b ldr r3, [r3, #0]
8001c60: f422 6200 bic.w r2, r2, #2048 @ 0x800
8001c64: b292 uxth r2, r2
8001c66: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8001c6a: 687b ldr r3, [r7, #4]
8001c6c: 681b ldr r3, [r3, #0]
8001c6e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001c72: b29a uxth r2, r3
8001c74: 687b ldr r3, [r7, #4]
8001c76: 681b ldr r3, [r3, #0]
8001c78: f042 0204 orr.w r2, r2, #4
8001c7c: b292 uxth r2, r2
8001c7e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8001c82: 6878 ldr r0, [r7, #4]
8001c84: f007 f814 bl 8008cb0 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8001c88: e026 b.n 8001cd8 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8001c8a: 69bb ldr r3, [r7, #24]
8001c8c: f403 7300 and.w r3, r3, #512 @ 0x200
8001c90: 2b00 cmp r3, #0
8001c92: d00f beq.n 8001cb4 <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8001c94: 687b ldr r3, [r7, #4]
8001c96: 681b ldr r3, [r3, #0]
8001c98: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001c9c: b29a uxth r2, r3
8001c9e: 687b ldr r3, [r7, #4]
8001ca0: 681b ldr r3, [r3, #0]
8001ca2: f422 7200 bic.w r2, r2, #512 @ 0x200
8001ca6: b292 uxth r2, r2
8001ca8: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8001cac: 6878 ldr r0, [r7, #4]
8001cae: f006 ffd2 bl 8008c56 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8001cb2: e011 b.n 8001cd8 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8001cb4: 69bb ldr r3, [r7, #24]
8001cb6: f403 7380 and.w r3, r3, #256 @ 0x100
8001cba: 2b00 cmp r3, #0
8001cbc: d00c beq.n 8001cd8 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8001cbe: 687b ldr r3, [r7, #4]
8001cc0: 681b ldr r3, [r3, #0]
8001cc2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001cc6: b29a uxth r2, r3
8001cc8: 687b ldr r3, [r7, #4]
8001cca: 681b ldr r3, [r3, #0]
8001ccc: f422 7280 bic.w r2, r2, #256 @ 0x100
8001cd0: b292 uxth r2, r2
8001cd2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001cd6: bf00 nop
}
}
8001cd8: 3720 adds r7, #32
8001cda: 46bd mov sp, r7
8001cdc: bd80 pop {r7, pc}
08001cde <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8001cde: b580 push {r7, lr}
8001ce0: b082 sub sp, #8
8001ce2: af00 add r7, sp, #0
8001ce4: 6078 str r0, [r7, #4]
8001ce6: 460b mov r3, r1
8001ce8: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8001cea: 687b ldr r3, [r7, #4]
8001cec: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001cf0: 2b01 cmp r3, #1
8001cf2: d101 bne.n 8001cf8 <HAL_PCD_SetAddress+0x1a>
8001cf4: 2302 movs r3, #2
8001cf6: e012 b.n 8001d1e <HAL_PCD_SetAddress+0x40>
8001cf8: 687b ldr r3, [r7, #4]
8001cfa: 2201 movs r2, #1
8001cfc: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8001d00: 687b ldr r3, [r7, #4]
8001d02: 78fa ldrb r2, [r7, #3]
8001d04: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8001d06: 687b ldr r3, [r7, #4]
8001d08: 681b ldr r3, [r3, #0]
8001d0a: 78fa ldrb r2, [r7, #3]
8001d0c: 4611 mov r1, r2
8001d0e: 4618 mov r0, r3
8001d10: f005 f882 bl 8006e18 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8001d14: 687b ldr r3, [r7, #4]
8001d16: 2200 movs r2, #0
8001d18: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001d1c: 2300 movs r3, #0
}
8001d1e: 4618 mov r0, r3
8001d20: 3708 adds r7, #8
8001d22: 46bd mov sp, r7
8001d24: bd80 pop {r7, pc}
08001d26 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8001d26: b580 push {r7, lr}
8001d28: b084 sub sp, #16
8001d2a: af00 add r7, sp, #0
8001d2c: 6078 str r0, [r7, #4]
8001d2e: 4608 mov r0, r1
8001d30: 4611 mov r1, r2
8001d32: 461a mov r2, r3
8001d34: 4603 mov r3, r0
8001d36: 70fb strb r3, [r7, #3]
8001d38: 460b mov r3, r1
8001d3a: 803b strh r3, [r7, #0]
8001d3c: 4613 mov r3, r2
8001d3e: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8001d40: 2300 movs r3, #0
8001d42: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8001d44: f997 3003 ldrsb.w r3, [r7, #3]
8001d48: 2b00 cmp r3, #0
8001d4a: da0e bge.n 8001d6a <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001d4c: 78fb ldrb r3, [r7, #3]
8001d4e: f003 0207 and.w r2, r3, #7
8001d52: 4613 mov r3, r2
8001d54: 009b lsls r3, r3, #2
8001d56: 4413 add r3, r2
8001d58: 00db lsls r3, r3, #3
8001d5a: 3310 adds r3, #16
8001d5c: 687a ldr r2, [r7, #4]
8001d5e: 4413 add r3, r2
8001d60: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001d62: 68fb ldr r3, [r7, #12]
8001d64: 2201 movs r2, #1
8001d66: 705a strb r2, [r3, #1]
8001d68: e00e b.n 8001d88 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001d6a: 78fb ldrb r3, [r7, #3]
8001d6c: f003 0207 and.w r2, r3, #7
8001d70: 4613 mov r3, r2
8001d72: 009b lsls r3, r3, #2
8001d74: 4413 add r3, r2
8001d76: 00db lsls r3, r3, #3
8001d78: f503 73a8 add.w r3, r3, #336 @ 0x150
8001d7c: 687a ldr r2, [r7, #4]
8001d7e: 4413 add r3, r2
8001d80: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001d82: 68fb ldr r3, [r7, #12]
8001d84: 2200 movs r2, #0
8001d86: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8001d88: 78fb ldrb r3, [r7, #3]
8001d8a: f003 0307 and.w r3, r3, #7
8001d8e: b2da uxtb r2, r3
8001d90: 68fb ldr r3, [r7, #12]
8001d92: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8001d94: 883a ldrh r2, [r7, #0]
8001d96: 68fb ldr r3, [r7, #12]
8001d98: 611a str r2, [r3, #16]
ep->type = ep_type;
8001d9a: 68fb ldr r3, [r7, #12]
8001d9c: 78ba ldrb r2, [r7, #2]
8001d9e: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8001da0: 78bb ldrb r3, [r7, #2]
8001da2: 2b02 cmp r3, #2
8001da4: d102 bne.n 8001dac <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8001da6: 68fb ldr r3, [r7, #12]
8001da8: 2200 movs r2, #0
8001daa: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8001dac: 687b ldr r3, [r7, #4]
8001dae: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001db2: 2b01 cmp r3, #1
8001db4: d101 bne.n 8001dba <HAL_PCD_EP_Open+0x94>
8001db6: 2302 movs r3, #2
8001db8: e00e b.n 8001dd8 <HAL_PCD_EP_Open+0xb2>
8001dba: 687b ldr r3, [r7, #4]
8001dbc: 2201 movs r2, #1
8001dbe: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8001dc2: 687b ldr r3, [r7, #4]
8001dc4: 681b ldr r3, [r3, #0]
8001dc6: 68f9 ldr r1, [r7, #12]
8001dc8: 4618 mov r0, r3
8001dca: f002 fdcb bl 8004964 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8001dce: 687b ldr r3, [r7, #4]
8001dd0: 2200 movs r2, #0
8001dd2: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
8001dd6: 7afb ldrb r3, [r7, #11]
}
8001dd8: 4618 mov r0, r3
8001dda: 3710 adds r7, #16
8001ddc: 46bd mov sp, r7
8001dde: bd80 pop {r7, pc}
08001de0 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001de0: b580 push {r7, lr}
8001de2: b084 sub sp, #16
8001de4: af00 add r7, sp, #0
8001de6: 6078 str r0, [r7, #4]
8001de8: 460b mov r3, r1
8001dea: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8001dec: f997 3003 ldrsb.w r3, [r7, #3]
8001df0: 2b00 cmp r3, #0
8001df2: da0e bge.n 8001e12 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001df4: 78fb ldrb r3, [r7, #3]
8001df6: f003 0207 and.w r2, r3, #7
8001dfa: 4613 mov r3, r2
8001dfc: 009b lsls r3, r3, #2
8001dfe: 4413 add r3, r2
8001e00: 00db lsls r3, r3, #3
8001e02: 3310 adds r3, #16
8001e04: 687a ldr r2, [r7, #4]
8001e06: 4413 add r3, r2
8001e08: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001e0a: 68fb ldr r3, [r7, #12]
8001e0c: 2201 movs r2, #1
8001e0e: 705a strb r2, [r3, #1]
8001e10: e00e b.n 8001e30 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001e12: 78fb ldrb r3, [r7, #3]
8001e14: f003 0207 and.w r2, r3, #7
8001e18: 4613 mov r3, r2
8001e1a: 009b lsls r3, r3, #2
8001e1c: 4413 add r3, r2
8001e1e: 00db lsls r3, r3, #3
8001e20: f503 73a8 add.w r3, r3, #336 @ 0x150
8001e24: 687a ldr r2, [r7, #4]
8001e26: 4413 add r3, r2
8001e28: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001e2a: 68fb ldr r3, [r7, #12]
8001e2c: 2200 movs r2, #0
8001e2e: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8001e30: 78fb ldrb r3, [r7, #3]
8001e32: f003 0307 and.w r3, r3, #7
8001e36: b2da uxtb r2, r3
8001e38: 68fb ldr r3, [r7, #12]
8001e3a: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001e3c: 687b ldr r3, [r7, #4]
8001e3e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001e42: 2b01 cmp r3, #1
8001e44: d101 bne.n 8001e4a <HAL_PCD_EP_Close+0x6a>
8001e46: 2302 movs r3, #2
8001e48: e00e b.n 8001e68 <HAL_PCD_EP_Close+0x88>
8001e4a: 687b ldr r3, [r7, #4]
8001e4c: 2201 movs r2, #1
8001e4e: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8001e52: 687b ldr r3, [r7, #4]
8001e54: 681b ldr r3, [r3, #0]
8001e56: 68f9 ldr r1, [r7, #12]
8001e58: 4618 mov r0, r3
8001e5a: f003 f943 bl 80050e4 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8001e5e: 687b ldr r3, [r7, #4]
8001e60: 2200 movs r2, #0
8001e62: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001e66: 2300 movs r3, #0
}
8001e68: 4618 mov r0, r3
8001e6a: 3710 adds r7, #16
8001e6c: 46bd mov sp, r7
8001e6e: bd80 pop {r7, pc}
08001e70 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8001e70: b580 push {r7, lr}
8001e72: b086 sub sp, #24
8001e74: af00 add r7, sp, #0
8001e76: 60f8 str r0, [r7, #12]
8001e78: 607a str r2, [r7, #4]
8001e7a: 603b str r3, [r7, #0]
8001e7c: 460b mov r3, r1
8001e7e: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001e80: 7afb ldrb r3, [r7, #11]
8001e82: f003 0207 and.w r2, r3, #7
8001e86: 4613 mov r3, r2
8001e88: 009b lsls r3, r3, #2
8001e8a: 4413 add r3, r2
8001e8c: 00db lsls r3, r3, #3
8001e8e: f503 73a8 add.w r3, r3, #336 @ 0x150
8001e92: 68fa ldr r2, [r7, #12]
8001e94: 4413 add r3, r2
8001e96: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001e98: 697b ldr r3, [r7, #20]
8001e9a: 687a ldr r2, [r7, #4]
8001e9c: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001e9e: 697b ldr r3, [r7, #20]
8001ea0: 683a ldr r2, [r7, #0]
8001ea2: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8001ea4: 697b ldr r3, [r7, #20]
8001ea6: 2200 movs r2, #0
8001ea8: 61da str r2, [r3, #28]
ep->is_in = 0U;
8001eaa: 697b ldr r3, [r7, #20]
8001eac: 2200 movs r2, #0
8001eae: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001eb0: 7afb ldrb r3, [r7, #11]
8001eb2: f003 0307 and.w r3, r3, #7
8001eb6: b2da uxtb r2, r3
8001eb8: 697b ldr r3, [r7, #20]
8001eba: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001ebc: 68fb ldr r3, [r7, #12]
8001ebe: 681b ldr r3, [r3, #0]
8001ec0: 6979 ldr r1, [r7, #20]
8001ec2: 4618 mov r0, r3
8001ec4: f003 fafa bl 80054bc <USB_EPStartXfer>
return HAL_OK;
8001ec8: 2300 movs r3, #0
}
8001eca: 4618 mov r0, r3
8001ecc: 3718 adds r7, #24
8001ece: 46bd mov sp, r7
8001ed0: bd80 pop {r7, pc}
08001ed2 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8001ed2: b480 push {r7}
8001ed4: b083 sub sp, #12
8001ed6: af00 add r7, sp, #0
8001ed8: 6078 str r0, [r7, #4]
8001eda: 460b mov r3, r1
8001edc: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8001ede: 78fb ldrb r3, [r7, #3]
8001ee0: f003 0207 and.w r2, r3, #7
8001ee4: 6879 ldr r1, [r7, #4]
8001ee6: 4613 mov r3, r2
8001ee8: 009b lsls r3, r3, #2
8001eea: 4413 add r3, r2
8001eec: 00db lsls r3, r3, #3
8001eee: 440b add r3, r1
8001ef0: f503 73b6 add.w r3, r3, #364 @ 0x16c
8001ef4: 681b ldr r3, [r3, #0]
}
8001ef6: 4618 mov r0, r3
8001ef8: 370c adds r7, #12
8001efa: 46bd mov sp, r7
8001efc: bc80 pop {r7}
8001efe: 4770 bx lr
08001f00 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8001f00: b580 push {r7, lr}
8001f02: b086 sub sp, #24
8001f04: af00 add r7, sp, #0
8001f06: 60f8 str r0, [r7, #12]
8001f08: 607a str r2, [r7, #4]
8001f0a: 603b str r3, [r7, #0]
8001f0c: 460b mov r3, r1
8001f0e: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001f10: 7afb ldrb r3, [r7, #11]
8001f12: f003 0207 and.w r2, r3, #7
8001f16: 4613 mov r3, r2
8001f18: 009b lsls r3, r3, #2
8001f1a: 4413 add r3, r2
8001f1c: 00db lsls r3, r3, #3
8001f1e: 3310 adds r3, #16
8001f20: 68fa ldr r2, [r7, #12]
8001f22: 4413 add r3, r2
8001f24: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001f26: 697b ldr r3, [r7, #20]
8001f28: 687a ldr r2, [r7, #4]
8001f2a: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001f2c: 697b ldr r3, [r7, #20]
8001f2e: 683a ldr r2, [r7, #0]
8001f30: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8001f32: 697b ldr r3, [r7, #20]
8001f34: 2201 movs r2, #1
8001f36: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
8001f3a: 697b ldr r3, [r7, #20]
8001f3c: 683a ldr r2, [r7, #0]
8001f3e: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8001f40: 697b ldr r3, [r7, #20]
8001f42: 2200 movs r2, #0
8001f44: 61da str r2, [r3, #28]
ep->is_in = 1U;
8001f46: 697b ldr r3, [r7, #20]
8001f48: 2201 movs r2, #1
8001f4a: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001f4c: 7afb ldrb r3, [r7, #11]
8001f4e: f003 0307 and.w r3, r3, #7
8001f52: b2da uxtb r2, r3
8001f54: 697b ldr r3, [r7, #20]
8001f56: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001f58: 68fb ldr r3, [r7, #12]
8001f5a: 681b ldr r3, [r3, #0]
8001f5c: 6979 ldr r1, [r7, #20]
8001f5e: 4618 mov r0, r3
8001f60: f003 faac bl 80054bc <USB_EPStartXfer>
return HAL_OK;
8001f64: 2300 movs r3, #0
}
8001f66: 4618 mov r0, r3
8001f68: 3718 adds r7, #24
8001f6a: 46bd mov sp, r7
8001f6c: bd80 pop {r7, pc}
08001f6e <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001f6e: b580 push {r7, lr}
8001f70: b084 sub sp, #16
8001f72: af00 add r7, sp, #0
8001f74: 6078 str r0, [r7, #4]
8001f76: 460b mov r3, r1
8001f78: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8001f7a: 78fb ldrb r3, [r7, #3]
8001f7c: f003 0307 and.w r3, r3, #7
8001f80: 687a ldr r2, [r7, #4]
8001f82: 7912 ldrb r2, [r2, #4]
8001f84: 4293 cmp r3, r2
8001f86: d901 bls.n 8001f8c <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8001f88: 2301 movs r3, #1
8001f8a: e04c b.n 8002026 <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8001f8c: f997 3003 ldrsb.w r3, [r7, #3]
8001f90: 2b00 cmp r3, #0
8001f92: da0e bge.n 8001fb2 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001f94: 78fb ldrb r3, [r7, #3]
8001f96: f003 0207 and.w r2, r3, #7
8001f9a: 4613 mov r3, r2
8001f9c: 009b lsls r3, r3, #2
8001f9e: 4413 add r3, r2
8001fa0: 00db lsls r3, r3, #3
8001fa2: 3310 adds r3, #16
8001fa4: 687a ldr r2, [r7, #4]
8001fa6: 4413 add r3, r2
8001fa8: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001faa: 68fb ldr r3, [r7, #12]
8001fac: 2201 movs r2, #1
8001fae: 705a strb r2, [r3, #1]
8001fb0: e00c b.n 8001fcc <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8001fb2: 78fa ldrb r2, [r7, #3]
8001fb4: 4613 mov r3, r2
8001fb6: 009b lsls r3, r3, #2
8001fb8: 4413 add r3, r2
8001fba: 00db lsls r3, r3, #3
8001fbc: f503 73a8 add.w r3, r3, #336 @ 0x150
8001fc0: 687a ldr r2, [r7, #4]
8001fc2: 4413 add r3, r2
8001fc4: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001fc6: 68fb ldr r3, [r7, #12]
8001fc8: 2200 movs r2, #0
8001fca: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8001fcc: 68fb ldr r3, [r7, #12]
8001fce: 2201 movs r2, #1
8001fd0: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8001fd2: 78fb ldrb r3, [r7, #3]
8001fd4: f003 0307 and.w r3, r3, #7
8001fd8: b2da uxtb r2, r3
8001fda: 68fb ldr r3, [r7, #12]
8001fdc: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001fde: 687b ldr r3, [r7, #4]
8001fe0: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001fe4: 2b01 cmp r3, #1
8001fe6: d101 bne.n 8001fec <HAL_PCD_EP_SetStall+0x7e>
8001fe8: 2302 movs r3, #2
8001fea: e01c b.n 8002026 <HAL_PCD_EP_SetStall+0xb8>
8001fec: 687b ldr r3, [r7, #4]
8001fee: 2201 movs r2, #1
8001ff0: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8001ff4: 687b ldr r3, [r7, #4]
8001ff6: 681b ldr r3, [r3, #0]
8001ff8: 68f9 ldr r1, [r7, #12]
8001ffa: 4618 mov r0, r3
8001ffc: f004 fe0f bl 8006c1e <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8002000: 78fb ldrb r3, [r7, #3]
8002002: f003 0307 and.w r3, r3, #7
8002006: 2b00 cmp r3, #0
8002008: d108 bne.n 800201c <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
800200a: 687b ldr r3, [r7, #4]
800200c: 681a ldr r2, [r3, #0]
800200e: 687b ldr r3, [r7, #4]
8002010: f503 7326 add.w r3, r3, #664 @ 0x298
8002014: 4619 mov r1, r3
8002016: 4610 mov r0, r2
8002018: f004 ff34 bl 8006e84 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
800201c: 687b ldr r3, [r7, #4]
800201e: 2200 movs r2, #0
8002020: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8002024: 2300 movs r3, #0
}
8002026: 4618 mov r0, r3
8002028: 3710 adds r7, #16
800202a: 46bd mov sp, r7
800202c: bd80 pop {r7, pc}
0800202e <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
800202e: b580 push {r7, lr}
8002030: b084 sub sp, #16
8002032: af00 add r7, sp, #0
8002034: 6078 str r0, [r7, #4]
8002036: 460b mov r3, r1
8002038: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
800203a: 78fb ldrb r3, [r7, #3]
800203c: f003 030f and.w r3, r3, #15
8002040: 687a ldr r2, [r7, #4]
8002042: 7912 ldrb r2, [r2, #4]
8002044: 4293 cmp r3, r2
8002046: d901 bls.n 800204c <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8002048: 2301 movs r3, #1
800204a: e040 b.n 80020ce <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
800204c: f997 3003 ldrsb.w r3, [r7, #3]
8002050: 2b00 cmp r3, #0
8002052: da0e bge.n 8002072 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002054: 78fb ldrb r3, [r7, #3]
8002056: f003 0207 and.w r2, r3, #7
800205a: 4613 mov r3, r2
800205c: 009b lsls r3, r3, #2
800205e: 4413 add r3, r2
8002060: 00db lsls r3, r3, #3
8002062: 3310 adds r3, #16
8002064: 687a ldr r2, [r7, #4]
8002066: 4413 add r3, r2
8002068: 60fb str r3, [r7, #12]
ep->is_in = 1U;
800206a: 68fb ldr r3, [r7, #12]
800206c: 2201 movs r2, #1
800206e: 705a strb r2, [r3, #1]
8002070: e00e b.n 8002090 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8002072: 78fb ldrb r3, [r7, #3]
8002074: f003 0207 and.w r2, r3, #7
8002078: 4613 mov r3, r2
800207a: 009b lsls r3, r3, #2
800207c: 4413 add r3, r2
800207e: 00db lsls r3, r3, #3
8002080: f503 73a8 add.w r3, r3, #336 @ 0x150
8002084: 687a ldr r2, [r7, #4]
8002086: 4413 add r3, r2
8002088: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800208a: 68fb ldr r3, [r7, #12]
800208c: 2200 movs r2, #0
800208e: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8002090: 68fb ldr r3, [r7, #12]
8002092: 2200 movs r2, #0
8002094: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8002096: 78fb ldrb r3, [r7, #3]
8002098: f003 0307 and.w r3, r3, #7
800209c: b2da uxtb r2, r3
800209e: 68fb ldr r3, [r7, #12]
80020a0: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80020a2: 687b ldr r3, [r7, #4]
80020a4: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80020a8: 2b01 cmp r3, #1
80020aa: d101 bne.n 80020b0 <HAL_PCD_EP_ClrStall+0x82>
80020ac: 2302 movs r3, #2
80020ae: e00e b.n 80020ce <HAL_PCD_EP_ClrStall+0xa0>
80020b0: 687b ldr r3, [r7, #4]
80020b2: 2201 movs r2, #1
80020b4: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
80020b8: 687b ldr r3, [r7, #4]
80020ba: 681b ldr r3, [r3, #0]
80020bc: 68f9 ldr r1, [r7, #12]
80020be: 4618 mov r0, r3
80020c0: f004 fdfd bl 8006cbe <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
80020c4: 687b ldr r3, [r7, #4]
80020c6: 2200 movs r2, #0
80020c8: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80020cc: 2300 movs r3, #0
}
80020ce: 4618 mov r0, r3
80020d0: 3710 adds r7, #16
80020d2: 46bd mov sp, r7
80020d4: bd80 pop {r7, pc}
080020d6 <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
80020d6: b580 push {r7, lr}
80020d8: b096 sub sp, #88 @ 0x58
80020da: af00 add r7, sp, #0
80020dc: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
80020de: e3bb b.n 8002858 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
80020e0: 687b ldr r3, [r7, #4]
80020e2: 681b ldr r3, [r3, #0]
80020e4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80020e8: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
80020ec: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80020f0: b2db uxtb r3, r3
80020f2: f003 030f and.w r3, r3, #15
80020f6: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
80020fa: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80020fe: 2b00 cmp r3, #0
8002100: f040 8175 bne.w 80023ee <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8002104: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8002108: f003 0310 and.w r3, r3, #16
800210c: 2b00 cmp r3, #0
800210e: d14e bne.n 80021ae <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8002110: 687b ldr r3, [r7, #4]
8002112: 681b ldr r3, [r3, #0]
8002114: 881b ldrh r3, [r3, #0]
8002116: b29b uxth r3, r3
8002118: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
800211c: f023 0370 bic.w r3, r3, #112 @ 0x70
8002120: 81fb strh r3, [r7, #14]
8002122: 687b ldr r3, [r7, #4]
8002124: 681a ldr r2, [r3, #0]
8002126: 89fb ldrh r3, [r7, #14]
8002128: ea6f 4343 mvn.w r3, r3, lsl #17
800212c: ea6f 4353 mvn.w r3, r3, lsr #17
8002130: b29b uxth r3, r3
8002132: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8002134: 687b ldr r3, [r7, #4]
8002136: 3310 adds r3, #16
8002138: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
800213a: 687b ldr r3, [r7, #4]
800213c: 681b ldr r3, [r3, #0]
800213e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002142: b29b uxth r3, r3
8002144: 461a mov r2, r3
8002146: 6d7b ldr r3, [r7, #84] @ 0x54
8002148: 781b ldrb r3, [r3, #0]
800214a: 00db lsls r3, r3, #3
800214c: 4413 add r3, r2
800214e: 3302 adds r3, #2
8002150: 005b lsls r3, r3, #1
8002152: 687a ldr r2, [r7, #4]
8002154: 6812 ldr r2, [r2, #0]
8002156: 4413 add r3, r2
8002158: f503 6380 add.w r3, r3, #1024 @ 0x400
800215c: 881b ldrh r3, [r3, #0]
800215e: f3c3 0209 ubfx r2, r3, #0, #10
8002162: 6d7b ldr r3, [r7, #84] @ 0x54
8002164: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
8002166: 6d7b ldr r3, [r7, #84] @ 0x54
8002168: 695a ldr r2, [r3, #20]
800216a: 6d7b ldr r3, [r7, #84] @ 0x54
800216c: 69db ldr r3, [r3, #28]
800216e: 441a add r2, r3
8002170: 6d7b ldr r3, [r7, #84] @ 0x54
8002172: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
8002174: 2100 movs r1, #0
8002176: 6878 ldr r0, [r7, #4]
8002178: f006 fd53 bl 8008c22 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
800217c: 687b ldr r3, [r7, #4]
800217e: 7b5b ldrb r3, [r3, #13]
8002180: b2db uxtb r3, r3
8002182: 2b00 cmp r3, #0
8002184: f000 8368 beq.w 8002858 <PCD_EP_ISR_Handler+0x782>
8002188: 6d7b ldr r3, [r7, #84] @ 0x54
800218a: 699b ldr r3, [r3, #24]
800218c: 2b00 cmp r3, #0
800218e: f040 8363 bne.w 8002858 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8002192: 687b ldr r3, [r7, #4]
8002194: 7b5b ldrb r3, [r3, #13]
8002196: b2db uxtb r3, r3
8002198: f063 037f orn r3, r3, #127 @ 0x7f
800219c: b2da uxtb r2, r3
800219e: 687b ldr r3, [r7, #4]
80021a0: 681b ldr r3, [r3, #0]
80021a2: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
80021a6: 687b ldr r3, [r7, #4]
80021a8: 2200 movs r2, #0
80021aa: 735a strb r2, [r3, #13]
80021ac: e354 b.n 8002858 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
80021ae: 687b ldr r3, [r7, #4]
80021b0: f503 73a8 add.w r3, r3, #336 @ 0x150
80021b4: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80021b6: 687b ldr r3, [r7, #4]
80021b8: 681b ldr r3, [r3, #0]
80021ba: 881b ldrh r3, [r3, #0]
80021bc: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
80021c0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80021c4: f403 6300 and.w r3, r3, #2048 @ 0x800
80021c8: 2b00 cmp r3, #0
80021ca: d034 beq.n 8002236 <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80021cc: 687b ldr r3, [r7, #4]
80021ce: 681b ldr r3, [r3, #0]
80021d0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80021d4: b29b uxth r3, r3
80021d6: 461a mov r2, r3
80021d8: 6d7b ldr r3, [r7, #84] @ 0x54
80021da: 781b ldrb r3, [r3, #0]
80021dc: 00db lsls r3, r3, #3
80021de: 4413 add r3, r2
80021e0: 3306 adds r3, #6
80021e2: 005b lsls r3, r3, #1
80021e4: 687a ldr r2, [r7, #4]
80021e6: 6812 ldr r2, [r2, #0]
80021e8: 4413 add r3, r2
80021ea: f503 6380 add.w r3, r3, #1024 @ 0x400
80021ee: 881b ldrh r3, [r3, #0]
80021f0: f3c3 0209 ubfx r2, r3, #0, #10
80021f4: 6d7b ldr r3, [r7, #84] @ 0x54
80021f6: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80021f8: 687b ldr r3, [r7, #4]
80021fa: 6818 ldr r0, [r3, #0]
80021fc: 687b ldr r3, [r7, #4]
80021fe: f503 7126 add.w r1, r3, #664 @ 0x298
8002202: 6d7b ldr r3, [r7, #84] @ 0x54
8002204: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8002206: 6d7b ldr r3, [r7, #84] @ 0x54
8002208: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
800220a: b29b uxth r3, r3
800220c: f004 fe8b bl 8006f26 <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8002210: 687b ldr r3, [r7, #4]
8002212: 681b ldr r3, [r3, #0]
8002214: 881b ldrh r3, [r3, #0]
8002216: b29a uxth r2, r3
8002218: f640 738f movw r3, #3983 @ 0xf8f
800221c: 4013 ands r3, r2
800221e: 823b strh r3, [r7, #16]
8002220: 687b ldr r3, [r7, #4]
8002222: 681b ldr r3, [r3, #0]
8002224: 8a3a ldrh r2, [r7, #16]
8002226: f042 0280 orr.w r2, r2, #128 @ 0x80
800222a: b292 uxth r2, r2
800222c: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
800222e: 6878 ldr r0, [r7, #4]
8002230: f006 fcca bl 8008bc8 <HAL_PCD_SetupStageCallback>
8002234: e310 b.n 8002858 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
8002236: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
800223a: 2b00 cmp r3, #0
800223c: f280 830c bge.w 8002858 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8002240: 687b ldr r3, [r7, #4]
8002242: 681b ldr r3, [r3, #0]
8002244: 881b ldrh r3, [r3, #0]
8002246: b29a uxth r2, r3
8002248: f640 738f movw r3, #3983 @ 0xf8f
800224c: 4013 ands r3, r2
800224e: 83fb strh r3, [r7, #30]
8002250: 687b ldr r3, [r7, #4]
8002252: 681b ldr r3, [r3, #0]
8002254: 8bfa ldrh r2, [r7, #30]
8002256: f042 0280 orr.w r2, r2, #128 @ 0x80
800225a: b292 uxth r2, r2
800225c: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
800225e: 687b ldr r3, [r7, #4]
8002260: 681b ldr r3, [r3, #0]
8002262: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002266: b29b uxth r3, r3
8002268: 461a mov r2, r3
800226a: 6d7b ldr r3, [r7, #84] @ 0x54
800226c: 781b ldrb r3, [r3, #0]
800226e: 00db lsls r3, r3, #3
8002270: 4413 add r3, r2
8002272: 3306 adds r3, #6
8002274: 005b lsls r3, r3, #1
8002276: 687a ldr r2, [r7, #4]
8002278: 6812 ldr r2, [r2, #0]
800227a: 4413 add r3, r2
800227c: f503 6380 add.w r3, r3, #1024 @ 0x400
8002280: 881b ldrh r3, [r3, #0]
8002282: f3c3 0209 ubfx r2, r3, #0, #10
8002286: 6d7b ldr r3, [r7, #84] @ 0x54
8002288: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
800228a: 6d7b ldr r3, [r7, #84] @ 0x54
800228c: 69db ldr r3, [r3, #28]
800228e: 2b00 cmp r3, #0
8002290: d019 beq.n 80022c6 <PCD_EP_ISR_Handler+0x1f0>
8002292: 6d7b ldr r3, [r7, #84] @ 0x54
8002294: 695b ldr r3, [r3, #20]
8002296: 2b00 cmp r3, #0
8002298: d015 beq.n 80022c6 <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
800229a: 687b ldr r3, [r7, #4]
800229c: 6818 ldr r0, [r3, #0]
800229e: 6d7b ldr r3, [r7, #84] @ 0x54
80022a0: 6959 ldr r1, [r3, #20]
80022a2: 6d7b ldr r3, [r7, #84] @ 0x54
80022a4: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80022a6: 6d7b ldr r3, [r7, #84] @ 0x54
80022a8: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80022aa: b29b uxth r3, r3
80022ac: f004 fe3b bl 8006f26 <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
80022b0: 6d7b ldr r3, [r7, #84] @ 0x54
80022b2: 695a ldr r2, [r3, #20]
80022b4: 6d7b ldr r3, [r7, #84] @ 0x54
80022b6: 69db ldr r3, [r3, #28]
80022b8: 441a add r2, r3
80022ba: 6d7b ldr r3, [r7, #84] @ 0x54
80022bc: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
80022be: 2100 movs r1, #0
80022c0: 6878 ldr r0, [r7, #4]
80022c2: f006 fc93 bl 8008bec <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80022c6: 687b ldr r3, [r7, #4]
80022c8: 681b ldr r3, [r3, #0]
80022ca: 881b ldrh r3, [r3, #0]
80022cc: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
80022d0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80022d4: f403 6300 and.w r3, r3, #2048 @ 0x800
80022d8: 2b00 cmp r3, #0
80022da: f040 82bd bne.w 8002858 <PCD_EP_ISR_Handler+0x782>
80022de: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80022e2: f403 5340 and.w r3, r3, #12288 @ 0x3000
80022e6: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
80022ea: f000 82b5 beq.w 8002858 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
80022ee: 687b ldr r3, [r7, #4]
80022f0: 681b ldr r3, [r3, #0]
80022f2: 61bb str r3, [r7, #24]
80022f4: 687b ldr r3, [r7, #4]
80022f6: 681b ldr r3, [r3, #0]
80022f8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80022fc: b29b uxth r3, r3
80022fe: 461a mov r2, r3
8002300: 69bb ldr r3, [r7, #24]
8002302: 4413 add r3, r2
8002304: 61bb str r3, [r7, #24]
8002306: 69bb ldr r3, [r7, #24]
8002308: f203 430c addw r3, r3, #1036 @ 0x40c
800230c: 617b str r3, [r7, #20]
800230e: 697b ldr r3, [r7, #20]
8002310: 881b ldrh r3, [r3, #0]
8002312: b29b uxth r3, r3
8002314: f3c3 0309 ubfx r3, r3, #0, #10
8002318: b29a uxth r2, r3
800231a: 697b ldr r3, [r7, #20]
800231c: 801a strh r2, [r3, #0]
800231e: 6d7b ldr r3, [r7, #84] @ 0x54
8002320: 691b ldr r3, [r3, #16]
8002322: 2b3e cmp r3, #62 @ 0x3e
8002324: d91d bls.n 8002362 <PCD_EP_ISR_Handler+0x28c>
8002326: 6d7b ldr r3, [r7, #84] @ 0x54
8002328: 691b ldr r3, [r3, #16]
800232a: 095b lsrs r3, r3, #5
800232c: 647b str r3, [r7, #68] @ 0x44
800232e: 6d7b ldr r3, [r7, #84] @ 0x54
8002330: 691b ldr r3, [r3, #16]
8002332: f003 031f and.w r3, r3, #31
8002336: 2b00 cmp r3, #0
8002338: d102 bne.n 8002340 <PCD_EP_ISR_Handler+0x26a>
800233a: 6c7b ldr r3, [r7, #68] @ 0x44
800233c: 3b01 subs r3, #1
800233e: 647b str r3, [r7, #68] @ 0x44
8002340: 697b ldr r3, [r7, #20]
8002342: 881b ldrh r3, [r3, #0]
8002344: b29a uxth r2, r3
8002346: 6c7b ldr r3, [r7, #68] @ 0x44
8002348: b29b uxth r3, r3
800234a: 029b lsls r3, r3, #10
800234c: b29b uxth r3, r3
800234e: 4313 orrs r3, r2
8002350: b29b uxth r3, r3
8002352: ea6f 4343 mvn.w r3, r3, lsl #17
8002356: ea6f 4353 mvn.w r3, r3, lsr #17
800235a: b29a uxth r2, r3
800235c: 697b ldr r3, [r7, #20]
800235e: 801a strh r2, [r3, #0]
8002360: e026 b.n 80023b0 <PCD_EP_ISR_Handler+0x2da>
8002362: 6d7b ldr r3, [r7, #84] @ 0x54
8002364: 691b ldr r3, [r3, #16]
8002366: 2b00 cmp r3, #0
8002368: d10a bne.n 8002380 <PCD_EP_ISR_Handler+0x2aa>
800236a: 697b ldr r3, [r7, #20]
800236c: 881b ldrh r3, [r3, #0]
800236e: b29b uxth r3, r3
8002370: ea6f 4343 mvn.w r3, r3, lsl #17
8002374: ea6f 4353 mvn.w r3, r3, lsr #17
8002378: b29a uxth r2, r3
800237a: 697b ldr r3, [r7, #20]
800237c: 801a strh r2, [r3, #0]
800237e: e017 b.n 80023b0 <PCD_EP_ISR_Handler+0x2da>
8002380: 6d7b ldr r3, [r7, #84] @ 0x54
8002382: 691b ldr r3, [r3, #16]
8002384: 085b lsrs r3, r3, #1
8002386: 647b str r3, [r7, #68] @ 0x44
8002388: 6d7b ldr r3, [r7, #84] @ 0x54
800238a: 691b ldr r3, [r3, #16]
800238c: f003 0301 and.w r3, r3, #1
8002390: 2b00 cmp r3, #0
8002392: d002 beq.n 800239a <PCD_EP_ISR_Handler+0x2c4>
8002394: 6c7b ldr r3, [r7, #68] @ 0x44
8002396: 3301 adds r3, #1
8002398: 647b str r3, [r7, #68] @ 0x44
800239a: 697b ldr r3, [r7, #20]
800239c: 881b ldrh r3, [r3, #0]
800239e: b29a uxth r2, r3
80023a0: 6c7b ldr r3, [r7, #68] @ 0x44
80023a2: b29b uxth r3, r3
80023a4: 029b lsls r3, r3, #10
80023a6: b29b uxth r3, r3
80023a8: 4313 orrs r3, r2
80023aa: b29a uxth r2, r3
80023ac: 697b ldr r3, [r7, #20]
80023ae: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
80023b0: 687b ldr r3, [r7, #4]
80023b2: 681b ldr r3, [r3, #0]
80023b4: 881b ldrh r3, [r3, #0]
80023b6: b29b uxth r3, r3
80023b8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80023bc: f023 0370 bic.w r3, r3, #112 @ 0x70
80023c0: 827b strh r3, [r7, #18]
80023c2: 8a7b ldrh r3, [r7, #18]
80023c4: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80023c8: 827b strh r3, [r7, #18]
80023ca: 8a7b ldrh r3, [r7, #18]
80023cc: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80023d0: 827b strh r3, [r7, #18]
80023d2: 687b ldr r3, [r7, #4]
80023d4: 681a ldr r2, [r3, #0]
80023d6: 8a7b ldrh r3, [r7, #18]
80023d8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80023dc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80023e0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80023e4: f043 0380 orr.w r3, r3, #128 @ 0x80
80023e8: b29b uxth r3, r3
80023ea: 8013 strh r3, [r2, #0]
80023ec: e234 b.n 8002858 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
80023ee: 687b ldr r3, [r7, #4]
80023f0: 681b ldr r3, [r3, #0]
80023f2: 461a mov r2, r3
80023f4: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80023f8: 009b lsls r3, r3, #2
80023fa: 4413 add r3, r2
80023fc: 881b ldrh r3, [r3, #0]
80023fe: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
8002402: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8002406: 2b00 cmp r3, #0
8002408: f280 80fc bge.w 8002604 <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
800240c: 687b ldr r3, [r7, #4]
800240e: 681b ldr r3, [r3, #0]
8002410: 461a mov r2, r3
8002412: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8002416: 009b lsls r3, r3, #2
8002418: 4413 add r3, r2
800241a: 881b ldrh r3, [r3, #0]
800241c: b29a uxth r2, r3
800241e: f640 738f movw r3, #3983 @ 0xf8f
8002422: 4013 ands r3, r2
8002424: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8002428: 687b ldr r3, [r7, #4]
800242a: 681b ldr r3, [r3, #0]
800242c: 461a mov r2, r3
800242e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8002432: 009b lsls r3, r3, #2
8002434: 4413 add r3, r2
8002436: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
800243a: f042 0280 orr.w r2, r2, #128 @ 0x80
800243e: b292 uxth r2, r2
8002440: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
8002442: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8002446: 4613 mov r3, r2
8002448: 009b lsls r3, r3, #2
800244a: 4413 add r3, r2
800244c: 00db lsls r3, r3, #3
800244e: f503 73a8 add.w r3, r3, #336 @ 0x150
8002452: 687a ldr r2, [r7, #4]
8002454: 4413 add r3, r2
8002456: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8002458: 6d7b ldr r3, [r7, #84] @ 0x54
800245a: 7b1b ldrb r3, [r3, #12]
800245c: 2b00 cmp r3, #0
800245e: d125 bne.n 80024ac <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8002460: 687b ldr r3, [r7, #4]
8002462: 681b ldr r3, [r3, #0]
8002464: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002468: b29b uxth r3, r3
800246a: 461a mov r2, r3
800246c: 6d7b ldr r3, [r7, #84] @ 0x54
800246e: 781b ldrb r3, [r3, #0]
8002470: 00db lsls r3, r3, #3
8002472: 4413 add r3, r2
8002474: 3306 adds r3, #6
8002476: 005b lsls r3, r3, #1
8002478: 687a ldr r2, [r7, #4]
800247a: 6812 ldr r2, [r2, #0]
800247c: 4413 add r3, r2
800247e: f503 6380 add.w r3, r3, #1024 @ 0x400
8002482: 881b ldrh r3, [r3, #0]
8002484: f3c3 0309 ubfx r3, r3, #0, #10
8002488: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800248c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8002490: 2b00 cmp r3, #0
8002492: f000 8092 beq.w 80025ba <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8002496: 687b ldr r3, [r7, #4]
8002498: 6818 ldr r0, [r3, #0]
800249a: 6d7b ldr r3, [r7, #84] @ 0x54
800249c: 6959 ldr r1, [r3, #20]
800249e: 6d7b ldr r3, [r7, #84] @ 0x54
80024a0: 88da ldrh r2, [r3, #6]
80024a2: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80024a6: f004 fd3e bl 8006f26 <USB_ReadPMA>
80024aa: e086 b.n 80025ba <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
80024ac: 6d7b ldr r3, [r7, #84] @ 0x54
80024ae: 78db ldrb r3, [r3, #3]
80024b0: 2b02 cmp r3, #2
80024b2: d10a bne.n 80024ca <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
80024b4: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80024b8: 461a mov r2, r3
80024ba: 6d79 ldr r1, [r7, #84] @ 0x54
80024bc: 6878 ldr r0, [r7, #4]
80024be: f000 f9d9 bl 8002874 <HAL_PCD_EP_DB_Receive>
80024c2: 4603 mov r3, r0
80024c4: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
80024c8: e077 b.n 80025ba <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80024ca: 687b ldr r3, [r7, #4]
80024cc: 681b ldr r3, [r3, #0]
80024ce: 461a mov r2, r3
80024d0: 6d7b ldr r3, [r7, #84] @ 0x54
80024d2: 781b ldrb r3, [r3, #0]
80024d4: 009b lsls r3, r3, #2
80024d6: 4413 add r3, r2
80024d8: 881b ldrh r3, [r3, #0]
80024da: b29b uxth r3, r3
80024dc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80024e0: f023 0370 bic.w r3, r3, #112 @ 0x70
80024e4: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
80024e8: 687b ldr r3, [r7, #4]
80024ea: 681b ldr r3, [r3, #0]
80024ec: 461a mov r2, r3
80024ee: 6d7b ldr r3, [r7, #84] @ 0x54
80024f0: 781b ldrb r3, [r3, #0]
80024f2: 009b lsls r3, r3, #2
80024f4: 441a add r2, r3
80024f6: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
80024fa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80024fe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002502: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002506: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800250a: b29b uxth r3, r3
800250c: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
800250e: 687b ldr r3, [r7, #4]
8002510: 681b ldr r3, [r3, #0]
8002512: 461a mov r2, r3
8002514: 6d7b ldr r3, [r7, #84] @ 0x54
8002516: 781b ldrb r3, [r3, #0]
8002518: 009b lsls r3, r3, #2
800251a: 4413 add r3, r2
800251c: 881b ldrh r3, [r3, #0]
800251e: b29b uxth r3, r3
8002520: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002524: 2b00 cmp r3, #0
8002526: d024 beq.n 8002572 <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002528: 687b ldr r3, [r7, #4]
800252a: 681b ldr r3, [r3, #0]
800252c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002530: b29b uxth r3, r3
8002532: 461a mov r2, r3
8002534: 6d7b ldr r3, [r7, #84] @ 0x54
8002536: 781b ldrb r3, [r3, #0]
8002538: 00db lsls r3, r3, #3
800253a: 4413 add r3, r2
800253c: 3302 adds r3, #2
800253e: 005b lsls r3, r3, #1
8002540: 687a ldr r2, [r7, #4]
8002542: 6812 ldr r2, [r2, #0]
8002544: 4413 add r3, r2
8002546: f503 6380 add.w r3, r3, #1024 @ 0x400
800254a: 881b ldrh r3, [r3, #0]
800254c: f3c3 0309 ubfx r3, r3, #0, #10
8002550: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8002554: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8002558: 2b00 cmp r3, #0
800255a: d02e beq.n 80025ba <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
800255c: 687b ldr r3, [r7, #4]
800255e: 6818 ldr r0, [r3, #0]
8002560: 6d7b ldr r3, [r7, #84] @ 0x54
8002562: 6959 ldr r1, [r3, #20]
8002564: 6d7b ldr r3, [r7, #84] @ 0x54
8002566: 891a ldrh r2, [r3, #8]
8002568: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800256c: f004 fcdb bl 8006f26 <USB_ReadPMA>
8002570: e023 b.n 80025ba <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002572: 687b ldr r3, [r7, #4]
8002574: 681b ldr r3, [r3, #0]
8002576: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800257a: b29b uxth r3, r3
800257c: 461a mov r2, r3
800257e: 6d7b ldr r3, [r7, #84] @ 0x54
8002580: 781b ldrb r3, [r3, #0]
8002582: 00db lsls r3, r3, #3
8002584: 4413 add r3, r2
8002586: 3306 adds r3, #6
8002588: 005b lsls r3, r3, #1
800258a: 687a ldr r2, [r7, #4]
800258c: 6812 ldr r2, [r2, #0]
800258e: 4413 add r3, r2
8002590: f503 6380 add.w r3, r3, #1024 @ 0x400
8002594: 881b ldrh r3, [r3, #0]
8002596: f3c3 0309 ubfx r3, r3, #0, #10
800259a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800259e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80025a2: 2b00 cmp r3, #0
80025a4: d009 beq.n 80025ba <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
80025a6: 687b ldr r3, [r7, #4]
80025a8: 6818 ldr r0, [r3, #0]
80025aa: 6d7b ldr r3, [r7, #84] @ 0x54
80025ac: 6959 ldr r1, [r3, #20]
80025ae: 6d7b ldr r3, [r7, #84] @ 0x54
80025b0: 895a ldrh r2, [r3, #10]
80025b2: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80025b6: f004 fcb6 bl 8006f26 <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
80025ba: 6d7b ldr r3, [r7, #84] @ 0x54
80025bc: 69da ldr r2, [r3, #28]
80025be: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80025c2: 441a add r2, r3
80025c4: 6d7b ldr r3, [r7, #84] @ 0x54
80025c6: 61da str r2, [r3, #28]
ep->xfer_buff += count;
80025c8: 6d7b ldr r3, [r7, #84] @ 0x54
80025ca: 695a ldr r2, [r3, #20]
80025cc: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80025d0: 441a add r2, r3
80025d2: 6d7b ldr r3, [r7, #84] @ 0x54
80025d4: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
80025d6: 6d7b ldr r3, [r7, #84] @ 0x54
80025d8: 699b ldr r3, [r3, #24]
80025da: 2b00 cmp r3, #0
80025dc: d005 beq.n 80025ea <PCD_EP_ISR_Handler+0x514>
80025de: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
80025e2: 6d7b ldr r3, [r7, #84] @ 0x54
80025e4: 691b ldr r3, [r3, #16]
80025e6: 429a cmp r2, r3
80025e8: d206 bcs.n 80025f8 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
80025ea: 6d7b ldr r3, [r7, #84] @ 0x54
80025ec: 781b ldrb r3, [r3, #0]
80025ee: 4619 mov r1, r3
80025f0: 6878 ldr r0, [r7, #4]
80025f2: f006 fafb bl 8008bec <HAL_PCD_DataOutStageCallback>
80025f6: e005 b.n 8002604 <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
80025f8: 687b ldr r3, [r7, #4]
80025fa: 681b ldr r3, [r3, #0]
80025fc: 6d79 ldr r1, [r7, #84] @ 0x54
80025fe: 4618 mov r0, r3
8002600: f002 ff5c bl 80054bc <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8002604: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8002608: f003 0380 and.w r3, r3, #128 @ 0x80
800260c: 2b00 cmp r3, #0
800260e: f000 8123 beq.w 8002858 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
8002612: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8002616: 4613 mov r3, r2
8002618: 009b lsls r3, r3, #2
800261a: 4413 add r3, r2
800261c: 00db lsls r3, r3, #3
800261e: 3310 adds r3, #16
8002620: 687a ldr r2, [r7, #4]
8002622: 4413 add r3, r2
8002624: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
8002626: 687b ldr r3, [r7, #4]
8002628: 681b ldr r3, [r3, #0]
800262a: 461a mov r2, r3
800262c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8002630: 009b lsls r3, r3, #2
8002632: 4413 add r3, r2
8002634: 881b ldrh r3, [r3, #0]
8002636: b29b uxth r3, r3
8002638: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
800263c: f023 0370 bic.w r3, r3, #112 @ 0x70
8002640: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
8002644: 687b ldr r3, [r7, #4]
8002646: 681b ldr r3, [r3, #0]
8002648: 461a mov r2, r3
800264a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800264e: 009b lsls r3, r3, #2
8002650: 441a add r2, r3
8002652: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8002656: ea6f 4343 mvn.w r3, r3, lsl #17
800265a: ea6f 4353 mvn.w r3, r3, lsr #17
800265e: b29b uxth r3, r3
8002660: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
8002662: 6d7b ldr r3, [r7, #84] @ 0x54
8002664: 78db ldrb r3, [r3, #3]
8002666: 2b01 cmp r3, #1
8002668: f040 80a2 bne.w 80027b0 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
800266c: 6d7b ldr r3, [r7, #84] @ 0x54
800266e: 2200 movs r2, #0
8002670: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
8002672: 6d7b ldr r3, [r7, #84] @ 0x54
8002674: 7b1b ldrb r3, [r3, #12]
8002676: 2b00 cmp r3, #0
8002678: f000 8093 beq.w 80027a2 <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
800267c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8002680: f003 0340 and.w r3, r3, #64 @ 0x40
8002684: 2b00 cmp r3, #0
8002686: d046 beq.n 8002716 <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002688: 6d7b ldr r3, [r7, #84] @ 0x54
800268a: 785b ldrb r3, [r3, #1]
800268c: 2b00 cmp r3, #0
800268e: d126 bne.n 80026de <PCD_EP_ISR_Handler+0x608>
8002690: 687b ldr r3, [r7, #4]
8002692: 681b ldr r3, [r3, #0]
8002694: 627b str r3, [r7, #36] @ 0x24
8002696: 687b ldr r3, [r7, #4]
8002698: 681b ldr r3, [r3, #0]
800269a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800269e: b29b uxth r3, r3
80026a0: 461a mov r2, r3
80026a2: 6a7b ldr r3, [r7, #36] @ 0x24
80026a4: 4413 add r3, r2
80026a6: 627b str r3, [r7, #36] @ 0x24
80026a8: 6d7b ldr r3, [r7, #84] @ 0x54
80026aa: 781b ldrb r3, [r3, #0]
80026ac: 011a lsls r2, r3, #4
80026ae: 6a7b ldr r3, [r7, #36] @ 0x24
80026b0: 4413 add r3, r2
80026b2: f203 4304 addw r3, r3, #1028 @ 0x404
80026b6: 623b str r3, [r7, #32]
80026b8: 6a3b ldr r3, [r7, #32]
80026ba: 881b ldrh r3, [r3, #0]
80026bc: b29b uxth r3, r3
80026be: f3c3 0309 ubfx r3, r3, #0, #10
80026c2: b29a uxth r2, r3
80026c4: 6a3b ldr r3, [r7, #32]
80026c6: 801a strh r2, [r3, #0]
80026c8: 6a3b ldr r3, [r7, #32]
80026ca: 881b ldrh r3, [r3, #0]
80026cc: b29b uxth r3, r3
80026ce: ea6f 4343 mvn.w r3, r3, lsl #17
80026d2: ea6f 4353 mvn.w r3, r3, lsr #17
80026d6: b29a uxth r2, r3
80026d8: 6a3b ldr r3, [r7, #32]
80026da: 801a strh r2, [r3, #0]
80026dc: e061 b.n 80027a2 <PCD_EP_ISR_Handler+0x6cc>
80026de: 6d7b ldr r3, [r7, #84] @ 0x54
80026e0: 785b ldrb r3, [r3, #1]
80026e2: 2b01 cmp r3, #1
80026e4: d15d bne.n 80027a2 <PCD_EP_ISR_Handler+0x6cc>
80026e6: 687b ldr r3, [r7, #4]
80026e8: 681b ldr r3, [r3, #0]
80026ea: 62fb str r3, [r7, #44] @ 0x2c
80026ec: 687b ldr r3, [r7, #4]
80026ee: 681b ldr r3, [r3, #0]
80026f0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80026f4: b29b uxth r3, r3
80026f6: 461a mov r2, r3
80026f8: 6afb ldr r3, [r7, #44] @ 0x2c
80026fa: 4413 add r3, r2
80026fc: 62fb str r3, [r7, #44] @ 0x2c
80026fe: 6d7b ldr r3, [r7, #84] @ 0x54
8002700: 781b ldrb r3, [r3, #0]
8002702: 011a lsls r2, r3, #4
8002704: 6afb ldr r3, [r7, #44] @ 0x2c
8002706: 4413 add r3, r2
8002708: f203 4304 addw r3, r3, #1028 @ 0x404
800270c: 62bb str r3, [r7, #40] @ 0x28
800270e: 6abb ldr r3, [r7, #40] @ 0x28
8002710: 2200 movs r2, #0
8002712: 801a strh r2, [r3, #0]
8002714: e045 b.n 80027a2 <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002716: 687b ldr r3, [r7, #4]
8002718: 681b ldr r3, [r3, #0]
800271a: 63fb str r3, [r7, #60] @ 0x3c
800271c: 6d7b ldr r3, [r7, #84] @ 0x54
800271e: 785b ldrb r3, [r3, #1]
8002720: 2b00 cmp r3, #0
8002722: d126 bne.n 8002772 <PCD_EP_ISR_Handler+0x69c>
8002724: 687b ldr r3, [r7, #4]
8002726: 681b ldr r3, [r3, #0]
8002728: 637b str r3, [r7, #52] @ 0x34
800272a: 687b ldr r3, [r7, #4]
800272c: 681b ldr r3, [r3, #0]
800272e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002732: b29b uxth r3, r3
8002734: 461a mov r2, r3
8002736: 6b7b ldr r3, [r7, #52] @ 0x34
8002738: 4413 add r3, r2
800273a: 637b str r3, [r7, #52] @ 0x34
800273c: 6d7b ldr r3, [r7, #84] @ 0x54
800273e: 781b ldrb r3, [r3, #0]
8002740: 011a lsls r2, r3, #4
8002742: 6b7b ldr r3, [r7, #52] @ 0x34
8002744: 4413 add r3, r2
8002746: f203 430c addw r3, r3, #1036 @ 0x40c
800274a: 633b str r3, [r7, #48] @ 0x30
800274c: 6b3b ldr r3, [r7, #48] @ 0x30
800274e: 881b ldrh r3, [r3, #0]
8002750: b29b uxth r3, r3
8002752: f3c3 0309 ubfx r3, r3, #0, #10
8002756: b29a uxth r2, r3
8002758: 6b3b ldr r3, [r7, #48] @ 0x30
800275a: 801a strh r2, [r3, #0]
800275c: 6b3b ldr r3, [r7, #48] @ 0x30
800275e: 881b ldrh r3, [r3, #0]
8002760: b29b uxth r3, r3
8002762: ea6f 4343 mvn.w r3, r3, lsl #17
8002766: ea6f 4353 mvn.w r3, r3, lsr #17
800276a: b29a uxth r2, r3
800276c: 6b3b ldr r3, [r7, #48] @ 0x30
800276e: 801a strh r2, [r3, #0]
8002770: e017 b.n 80027a2 <PCD_EP_ISR_Handler+0x6cc>
8002772: 6d7b ldr r3, [r7, #84] @ 0x54
8002774: 785b ldrb r3, [r3, #1]
8002776: 2b01 cmp r3, #1
8002778: d113 bne.n 80027a2 <PCD_EP_ISR_Handler+0x6cc>
800277a: 687b ldr r3, [r7, #4]
800277c: 681b ldr r3, [r3, #0]
800277e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002782: b29b uxth r3, r3
8002784: 461a mov r2, r3
8002786: 6bfb ldr r3, [r7, #60] @ 0x3c
8002788: 4413 add r3, r2
800278a: 63fb str r3, [r7, #60] @ 0x3c
800278c: 6d7b ldr r3, [r7, #84] @ 0x54
800278e: 781b ldrb r3, [r3, #0]
8002790: 011a lsls r2, r3, #4
8002792: 6bfb ldr r3, [r7, #60] @ 0x3c
8002794: 4413 add r3, r2
8002796: f203 430c addw r3, r3, #1036 @ 0x40c
800279a: 63bb str r3, [r7, #56] @ 0x38
800279c: 6bbb ldr r3, [r7, #56] @ 0x38
800279e: 2200 movs r2, #0
80027a0: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80027a2: 6d7b ldr r3, [r7, #84] @ 0x54
80027a4: 781b ldrb r3, [r3, #0]
80027a6: 4619 mov r1, r3
80027a8: 6878 ldr r0, [r7, #4]
80027aa: f006 fa3a bl 8008c22 <HAL_PCD_DataInStageCallback>
80027ae: e053 b.n 8002858 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
80027b0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80027b4: f403 7380 and.w r3, r3, #256 @ 0x100
80027b8: 2b00 cmp r3, #0
80027ba: d146 bne.n 800284a <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80027bc: 687b ldr r3, [r7, #4]
80027be: 681b ldr r3, [r3, #0]
80027c0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80027c4: b29b uxth r3, r3
80027c6: 461a mov r2, r3
80027c8: 6d7b ldr r3, [r7, #84] @ 0x54
80027ca: 781b ldrb r3, [r3, #0]
80027cc: 00db lsls r3, r3, #3
80027ce: 4413 add r3, r2
80027d0: 3302 adds r3, #2
80027d2: 005b lsls r3, r3, #1
80027d4: 687a ldr r2, [r7, #4]
80027d6: 6812 ldr r2, [r2, #0]
80027d8: 4413 add r3, r2
80027da: f503 6380 add.w r3, r3, #1024 @ 0x400
80027de: 881b ldrh r3, [r3, #0]
80027e0: f3c3 0309 ubfx r3, r3, #0, #10
80027e4: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
80027e8: 6d7b ldr r3, [r7, #84] @ 0x54
80027ea: 699a ldr r2, [r3, #24]
80027ec: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80027f0: 429a cmp r2, r3
80027f2: d907 bls.n 8002804 <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
80027f4: 6d7b ldr r3, [r7, #84] @ 0x54
80027f6: 699a ldr r2, [r3, #24]
80027f8: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80027fc: 1ad2 subs r2, r2, r3
80027fe: 6d7b ldr r3, [r7, #84] @ 0x54
8002800: 619a str r2, [r3, #24]
8002802: e002 b.n 800280a <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8002804: 6d7b ldr r3, [r7, #84] @ 0x54
8002806: 2200 movs r2, #0
8002808: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
800280a: 6d7b ldr r3, [r7, #84] @ 0x54
800280c: 699b ldr r3, [r3, #24]
800280e: 2b00 cmp r3, #0
8002810: d106 bne.n 8002820 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002812: 6d7b ldr r3, [r7, #84] @ 0x54
8002814: 781b ldrb r3, [r3, #0]
8002816: 4619 mov r1, r3
8002818: 6878 ldr r0, [r7, #4]
800281a: f006 fa02 bl 8008c22 <HAL_PCD_DataInStageCallback>
800281e: e01b b.n 8002858 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
8002820: 6d7b ldr r3, [r7, #84] @ 0x54
8002822: 695a ldr r2, [r3, #20]
8002824: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8002828: 441a add r2, r3
800282a: 6d7b ldr r3, [r7, #84] @ 0x54
800282c: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
800282e: 6d7b ldr r3, [r7, #84] @ 0x54
8002830: 69da ldr r2, [r3, #28]
8002832: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8002836: 441a add r2, r3
8002838: 6d7b ldr r3, [r7, #84] @ 0x54
800283a: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
800283c: 687b ldr r3, [r7, #4]
800283e: 681b ldr r3, [r3, #0]
8002840: 6d79 ldr r1, [r7, #84] @ 0x54
8002842: 4618 mov r0, r3
8002844: f002 fe3a bl 80054bc <USB_EPStartXfer>
8002848: e006 b.n 8002858 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
800284a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800284e: 461a mov r2, r3
8002850: 6d79 ldr r1, [r7, #84] @ 0x54
8002852: 6878 ldr r0, [r7, #4]
8002854: f000 f91b bl 8002a8e <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8002858: 687b ldr r3, [r7, #4]
800285a: 681b ldr r3, [r3, #0]
800285c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002860: b29b uxth r3, r3
8002862: b21b sxth r3, r3
8002864: 2b00 cmp r3, #0
8002866: f6ff ac3b blt.w 80020e0 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
800286a: 2300 movs r3, #0
}
800286c: 4618 mov r0, r3
800286e: 3758 adds r7, #88 @ 0x58
8002870: 46bd mov sp, r7
8002872: bd80 pop {r7, pc}
08002874 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8002874: b580 push {r7, lr}
8002876: b088 sub sp, #32
8002878: af00 add r7, sp, #0
800287a: 60f8 str r0, [r7, #12]
800287c: 60b9 str r1, [r7, #8]
800287e: 4613 mov r3, r2
8002880: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002882: 88fb ldrh r3, [r7, #6]
8002884: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002888: 2b00 cmp r3, #0
800288a: d07e beq.n 800298a <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
800288c: 68fb ldr r3, [r7, #12]
800288e: 681b ldr r3, [r3, #0]
8002890: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002894: b29b uxth r3, r3
8002896: 461a mov r2, r3
8002898: 68bb ldr r3, [r7, #8]
800289a: 781b ldrb r3, [r3, #0]
800289c: 00db lsls r3, r3, #3
800289e: 4413 add r3, r2
80028a0: 3302 adds r3, #2
80028a2: 005b lsls r3, r3, #1
80028a4: 68fa ldr r2, [r7, #12]
80028a6: 6812 ldr r2, [r2, #0]
80028a8: 4413 add r3, r2
80028aa: f503 6380 add.w r3, r3, #1024 @ 0x400
80028ae: 881b ldrh r3, [r3, #0]
80028b0: f3c3 0309 ubfx r3, r3, #0, #10
80028b4: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
80028b6: 68bb ldr r3, [r7, #8]
80028b8: 699a ldr r2, [r3, #24]
80028ba: 8b7b ldrh r3, [r7, #26]
80028bc: 429a cmp r2, r3
80028be: d306 bcc.n 80028ce <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
80028c0: 68bb ldr r3, [r7, #8]
80028c2: 699a ldr r2, [r3, #24]
80028c4: 8b7b ldrh r3, [r7, #26]
80028c6: 1ad2 subs r2, r2, r3
80028c8: 68bb ldr r3, [r7, #8]
80028ca: 619a str r2, [r3, #24]
80028cc: e002 b.n 80028d4 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
80028ce: 68bb ldr r3, [r7, #8]
80028d0: 2200 movs r2, #0
80028d2: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80028d4: 68bb ldr r3, [r7, #8]
80028d6: 699b ldr r3, [r3, #24]
80028d8: 2b00 cmp r3, #0
80028da: d123 bne.n 8002924 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80028dc: 68fb ldr r3, [r7, #12]
80028de: 681b ldr r3, [r3, #0]
80028e0: 461a mov r2, r3
80028e2: 68bb ldr r3, [r7, #8]
80028e4: 781b ldrb r3, [r3, #0]
80028e6: 009b lsls r3, r3, #2
80028e8: 4413 add r3, r2
80028ea: 881b ldrh r3, [r3, #0]
80028ec: b29b uxth r3, r3
80028ee: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80028f2: f023 0370 bic.w r3, r3, #112 @ 0x70
80028f6: 833b strh r3, [r7, #24]
80028f8: 8b3b ldrh r3, [r7, #24]
80028fa: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80028fe: 833b strh r3, [r7, #24]
8002900: 68fb ldr r3, [r7, #12]
8002902: 681b ldr r3, [r3, #0]
8002904: 461a mov r2, r3
8002906: 68bb ldr r3, [r7, #8]
8002908: 781b ldrb r3, [r3, #0]
800290a: 009b lsls r3, r3, #2
800290c: 441a add r2, r3
800290e: 8b3b ldrh r3, [r7, #24]
8002910: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002914: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002918: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800291c: f043 0380 orr.w r3, r3, #128 @ 0x80
8002920: b29b uxth r3, r3
8002922: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002924: 88fb ldrh r3, [r7, #6]
8002926: f003 0340 and.w r3, r3, #64 @ 0x40
800292a: 2b00 cmp r3, #0
800292c: d01f beq.n 800296e <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
800292e: 68fb ldr r3, [r7, #12]
8002930: 681b ldr r3, [r3, #0]
8002932: 461a mov r2, r3
8002934: 68bb ldr r3, [r7, #8]
8002936: 781b ldrb r3, [r3, #0]
8002938: 009b lsls r3, r3, #2
800293a: 4413 add r3, r2
800293c: 881b ldrh r3, [r3, #0]
800293e: b29b uxth r3, r3
8002940: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002944: f023 0370 bic.w r3, r3, #112 @ 0x70
8002948: 82fb strh r3, [r7, #22]
800294a: 68fb ldr r3, [r7, #12]
800294c: 681b ldr r3, [r3, #0]
800294e: 461a mov r2, r3
8002950: 68bb ldr r3, [r7, #8]
8002952: 781b ldrb r3, [r3, #0]
8002954: 009b lsls r3, r3, #2
8002956: 441a add r2, r3
8002958: 8afb ldrh r3, [r7, #22]
800295a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800295e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002962: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002966: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800296a: b29b uxth r3, r3
800296c: 8013 strh r3, [r2, #0]
}
if (count != 0U)
800296e: 8b7b ldrh r3, [r7, #26]
8002970: 2b00 cmp r3, #0
8002972: f000 8087 beq.w 8002a84 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8002976: 68fb ldr r3, [r7, #12]
8002978: 6818 ldr r0, [r3, #0]
800297a: 68bb ldr r3, [r7, #8]
800297c: 6959 ldr r1, [r3, #20]
800297e: 68bb ldr r3, [r7, #8]
8002980: 891a ldrh r2, [r3, #8]
8002982: 8b7b ldrh r3, [r7, #26]
8002984: f004 facf bl 8006f26 <USB_ReadPMA>
8002988: e07c b.n 8002a84 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800298a: 68fb ldr r3, [r7, #12]
800298c: 681b ldr r3, [r3, #0]
800298e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002992: b29b uxth r3, r3
8002994: 461a mov r2, r3
8002996: 68bb ldr r3, [r7, #8]
8002998: 781b ldrb r3, [r3, #0]
800299a: 00db lsls r3, r3, #3
800299c: 4413 add r3, r2
800299e: 3306 adds r3, #6
80029a0: 005b lsls r3, r3, #1
80029a2: 68fa ldr r2, [r7, #12]
80029a4: 6812 ldr r2, [r2, #0]
80029a6: 4413 add r3, r2
80029a8: f503 6380 add.w r3, r3, #1024 @ 0x400
80029ac: 881b ldrh r3, [r3, #0]
80029ae: f3c3 0309 ubfx r3, r3, #0, #10
80029b2: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
80029b4: 68bb ldr r3, [r7, #8]
80029b6: 699a ldr r2, [r3, #24]
80029b8: 8b7b ldrh r3, [r7, #26]
80029ba: 429a cmp r2, r3
80029bc: d306 bcc.n 80029cc <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
80029be: 68bb ldr r3, [r7, #8]
80029c0: 699a ldr r2, [r3, #24]
80029c2: 8b7b ldrh r3, [r7, #26]
80029c4: 1ad2 subs r2, r2, r3
80029c6: 68bb ldr r3, [r7, #8]
80029c8: 619a str r2, [r3, #24]
80029ca: e002 b.n 80029d2 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
80029cc: 68bb ldr r3, [r7, #8]
80029ce: 2200 movs r2, #0
80029d0: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80029d2: 68bb ldr r3, [r7, #8]
80029d4: 699b ldr r3, [r3, #24]
80029d6: 2b00 cmp r3, #0
80029d8: d123 bne.n 8002a22 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80029da: 68fb ldr r3, [r7, #12]
80029dc: 681b ldr r3, [r3, #0]
80029de: 461a mov r2, r3
80029e0: 68bb ldr r3, [r7, #8]
80029e2: 781b ldrb r3, [r3, #0]
80029e4: 009b lsls r3, r3, #2
80029e6: 4413 add r3, r2
80029e8: 881b ldrh r3, [r3, #0]
80029ea: b29b uxth r3, r3
80029ec: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80029f0: f023 0370 bic.w r3, r3, #112 @ 0x70
80029f4: 83fb strh r3, [r7, #30]
80029f6: 8bfb ldrh r3, [r7, #30]
80029f8: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80029fc: 83fb strh r3, [r7, #30]
80029fe: 68fb ldr r3, [r7, #12]
8002a00: 681b ldr r3, [r3, #0]
8002a02: 461a mov r2, r3
8002a04: 68bb ldr r3, [r7, #8]
8002a06: 781b ldrb r3, [r3, #0]
8002a08: 009b lsls r3, r3, #2
8002a0a: 441a add r2, r3
8002a0c: 8bfb ldrh r3, [r7, #30]
8002a0e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002a12: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002a16: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002a1a: f043 0380 orr.w r3, r3, #128 @ 0x80
8002a1e: b29b uxth r3, r3
8002a20: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8002a22: 88fb ldrh r3, [r7, #6]
8002a24: f003 0340 and.w r3, r3, #64 @ 0x40
8002a28: 2b00 cmp r3, #0
8002a2a: d11f bne.n 8002a6c <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8002a2c: 68fb ldr r3, [r7, #12]
8002a2e: 681b ldr r3, [r3, #0]
8002a30: 461a mov r2, r3
8002a32: 68bb ldr r3, [r7, #8]
8002a34: 781b ldrb r3, [r3, #0]
8002a36: 009b lsls r3, r3, #2
8002a38: 4413 add r3, r2
8002a3a: 881b ldrh r3, [r3, #0]
8002a3c: b29b uxth r3, r3
8002a3e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002a42: f023 0370 bic.w r3, r3, #112 @ 0x70
8002a46: 83bb strh r3, [r7, #28]
8002a48: 68fb ldr r3, [r7, #12]
8002a4a: 681b ldr r3, [r3, #0]
8002a4c: 461a mov r2, r3
8002a4e: 68bb ldr r3, [r7, #8]
8002a50: 781b ldrb r3, [r3, #0]
8002a52: 009b lsls r3, r3, #2
8002a54: 441a add r2, r3
8002a56: 8bbb ldrh r3, [r7, #28]
8002a58: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002a5c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002a60: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002a64: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8002a68: b29b uxth r3, r3
8002a6a: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002a6c: 8b7b ldrh r3, [r7, #26]
8002a6e: 2b00 cmp r3, #0
8002a70: d008 beq.n 8002a84 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8002a72: 68fb ldr r3, [r7, #12]
8002a74: 6818 ldr r0, [r3, #0]
8002a76: 68bb ldr r3, [r7, #8]
8002a78: 6959 ldr r1, [r3, #20]
8002a7a: 68bb ldr r3, [r7, #8]
8002a7c: 895a ldrh r2, [r3, #10]
8002a7e: 8b7b ldrh r3, [r7, #26]
8002a80: f004 fa51 bl 8006f26 <USB_ReadPMA>
}
}
return count;
8002a84: 8b7b ldrh r3, [r7, #26]
}
8002a86: 4618 mov r0, r3
8002a88: 3720 adds r7, #32
8002a8a: 46bd mov sp, r7
8002a8c: bd80 pop {r7, pc}
08002a8e <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8002a8e: b580 push {r7, lr}
8002a90: b0a4 sub sp, #144 @ 0x90
8002a92: af00 add r7, sp, #0
8002a94: 60f8 str r0, [r7, #12]
8002a96: 60b9 str r1, [r7, #8]
8002a98: 4613 mov r3, r2
8002a9a: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002a9c: 88fb ldrh r3, [r7, #6]
8002a9e: f003 0340 and.w r3, r3, #64 @ 0x40
8002aa2: 2b00 cmp r3, #0
8002aa4: f000 81dd beq.w 8002e62 <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002aa8: 68fb ldr r3, [r7, #12]
8002aaa: 681b ldr r3, [r3, #0]
8002aac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002ab0: b29b uxth r3, r3
8002ab2: 461a mov r2, r3
8002ab4: 68bb ldr r3, [r7, #8]
8002ab6: 781b ldrb r3, [r3, #0]
8002ab8: 00db lsls r3, r3, #3
8002aba: 4413 add r3, r2
8002abc: 3302 adds r3, #2
8002abe: 005b lsls r3, r3, #1
8002ac0: 68fa ldr r2, [r7, #12]
8002ac2: 6812 ldr r2, [r2, #0]
8002ac4: 4413 add r3, r2
8002ac6: f503 6380 add.w r3, r3, #1024 @ 0x400
8002aca: 881b ldrh r3, [r3, #0]
8002acc: f3c3 0309 ubfx r3, r3, #0, #10
8002ad0: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8002ad4: 68bb ldr r3, [r7, #8]
8002ad6: 699a ldr r2, [r3, #24]
8002ad8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002adc: 429a cmp r2, r3
8002ade: d907 bls.n 8002af0 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8002ae0: 68bb ldr r3, [r7, #8]
8002ae2: 699a ldr r2, [r3, #24]
8002ae4: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002ae8: 1ad2 subs r2, r2, r3
8002aea: 68bb ldr r3, [r7, #8]
8002aec: 619a str r2, [r3, #24]
8002aee: e002 b.n 8002af6 <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8002af0: 68bb ldr r3, [r7, #8]
8002af2: 2200 movs r2, #0
8002af4: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8002af6: 68bb ldr r3, [r7, #8]
8002af8: 699b ldr r3, [r3, #24]
8002afa: 2b00 cmp r3, #0
8002afc: f040 80b9 bne.w 8002c72 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002b00: 68bb ldr r3, [r7, #8]
8002b02: 785b ldrb r3, [r3, #1]
8002b04: 2b00 cmp r3, #0
8002b06: d126 bne.n 8002b56 <HAL_PCD_EP_DB_Transmit+0xc8>
8002b08: 68fb ldr r3, [r7, #12]
8002b0a: 681b ldr r3, [r3, #0]
8002b0c: 62fb str r3, [r7, #44] @ 0x2c
8002b0e: 68fb ldr r3, [r7, #12]
8002b10: 681b ldr r3, [r3, #0]
8002b12: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002b16: b29b uxth r3, r3
8002b18: 461a mov r2, r3
8002b1a: 6afb ldr r3, [r7, #44] @ 0x2c
8002b1c: 4413 add r3, r2
8002b1e: 62fb str r3, [r7, #44] @ 0x2c
8002b20: 68bb ldr r3, [r7, #8]
8002b22: 781b ldrb r3, [r3, #0]
8002b24: 011a lsls r2, r3, #4
8002b26: 6afb ldr r3, [r7, #44] @ 0x2c
8002b28: 4413 add r3, r2
8002b2a: f203 4304 addw r3, r3, #1028 @ 0x404
8002b2e: 62bb str r3, [r7, #40] @ 0x28
8002b30: 6abb ldr r3, [r7, #40] @ 0x28
8002b32: 881b ldrh r3, [r3, #0]
8002b34: b29b uxth r3, r3
8002b36: f3c3 0309 ubfx r3, r3, #0, #10
8002b3a: b29a uxth r2, r3
8002b3c: 6abb ldr r3, [r7, #40] @ 0x28
8002b3e: 801a strh r2, [r3, #0]
8002b40: 6abb ldr r3, [r7, #40] @ 0x28
8002b42: 881b ldrh r3, [r3, #0]
8002b44: b29b uxth r3, r3
8002b46: ea6f 4343 mvn.w r3, r3, lsl #17
8002b4a: ea6f 4353 mvn.w r3, r3, lsr #17
8002b4e: b29a uxth r2, r3
8002b50: 6abb ldr r3, [r7, #40] @ 0x28
8002b52: 801a strh r2, [r3, #0]
8002b54: e01a b.n 8002b8c <HAL_PCD_EP_DB_Transmit+0xfe>
8002b56: 68bb ldr r3, [r7, #8]
8002b58: 785b ldrb r3, [r3, #1]
8002b5a: 2b01 cmp r3, #1
8002b5c: d116 bne.n 8002b8c <HAL_PCD_EP_DB_Transmit+0xfe>
8002b5e: 68fb ldr r3, [r7, #12]
8002b60: 681b ldr r3, [r3, #0]
8002b62: 637b str r3, [r7, #52] @ 0x34
8002b64: 68fb ldr r3, [r7, #12]
8002b66: 681b ldr r3, [r3, #0]
8002b68: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002b6c: b29b uxth r3, r3
8002b6e: 461a mov r2, r3
8002b70: 6b7b ldr r3, [r7, #52] @ 0x34
8002b72: 4413 add r3, r2
8002b74: 637b str r3, [r7, #52] @ 0x34
8002b76: 68bb ldr r3, [r7, #8]
8002b78: 781b ldrb r3, [r3, #0]
8002b7a: 011a lsls r2, r3, #4
8002b7c: 6b7b ldr r3, [r7, #52] @ 0x34
8002b7e: 4413 add r3, r2
8002b80: f203 4304 addw r3, r3, #1028 @ 0x404
8002b84: 633b str r3, [r7, #48] @ 0x30
8002b86: 6b3b ldr r3, [r7, #48] @ 0x30
8002b88: 2200 movs r2, #0
8002b8a: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002b8c: 68fb ldr r3, [r7, #12]
8002b8e: 681b ldr r3, [r3, #0]
8002b90: 627b str r3, [r7, #36] @ 0x24
8002b92: 68bb ldr r3, [r7, #8]
8002b94: 785b ldrb r3, [r3, #1]
8002b96: 2b00 cmp r3, #0
8002b98: d126 bne.n 8002be8 <HAL_PCD_EP_DB_Transmit+0x15a>
8002b9a: 68fb ldr r3, [r7, #12]
8002b9c: 681b ldr r3, [r3, #0]
8002b9e: 61fb str r3, [r7, #28]
8002ba0: 68fb ldr r3, [r7, #12]
8002ba2: 681b ldr r3, [r3, #0]
8002ba4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002ba8: b29b uxth r3, r3
8002baa: 461a mov r2, r3
8002bac: 69fb ldr r3, [r7, #28]
8002bae: 4413 add r3, r2
8002bb0: 61fb str r3, [r7, #28]
8002bb2: 68bb ldr r3, [r7, #8]
8002bb4: 781b ldrb r3, [r3, #0]
8002bb6: 011a lsls r2, r3, #4
8002bb8: 69fb ldr r3, [r7, #28]
8002bba: 4413 add r3, r2
8002bbc: f203 430c addw r3, r3, #1036 @ 0x40c
8002bc0: 61bb str r3, [r7, #24]
8002bc2: 69bb ldr r3, [r7, #24]
8002bc4: 881b ldrh r3, [r3, #0]
8002bc6: b29b uxth r3, r3
8002bc8: f3c3 0309 ubfx r3, r3, #0, #10
8002bcc: b29a uxth r2, r3
8002bce: 69bb ldr r3, [r7, #24]
8002bd0: 801a strh r2, [r3, #0]
8002bd2: 69bb ldr r3, [r7, #24]
8002bd4: 881b ldrh r3, [r3, #0]
8002bd6: b29b uxth r3, r3
8002bd8: ea6f 4343 mvn.w r3, r3, lsl #17
8002bdc: ea6f 4353 mvn.w r3, r3, lsr #17
8002be0: b29a uxth r2, r3
8002be2: 69bb ldr r3, [r7, #24]
8002be4: 801a strh r2, [r3, #0]
8002be6: e017 b.n 8002c18 <HAL_PCD_EP_DB_Transmit+0x18a>
8002be8: 68bb ldr r3, [r7, #8]
8002bea: 785b ldrb r3, [r3, #1]
8002bec: 2b01 cmp r3, #1
8002bee: d113 bne.n 8002c18 <HAL_PCD_EP_DB_Transmit+0x18a>
8002bf0: 68fb ldr r3, [r7, #12]
8002bf2: 681b ldr r3, [r3, #0]
8002bf4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002bf8: b29b uxth r3, r3
8002bfa: 461a mov r2, r3
8002bfc: 6a7b ldr r3, [r7, #36] @ 0x24
8002bfe: 4413 add r3, r2
8002c00: 627b str r3, [r7, #36] @ 0x24
8002c02: 68bb ldr r3, [r7, #8]
8002c04: 781b ldrb r3, [r3, #0]
8002c06: 011a lsls r2, r3, #4
8002c08: 6a7b ldr r3, [r7, #36] @ 0x24
8002c0a: 4413 add r3, r2
8002c0c: f203 430c addw r3, r3, #1036 @ 0x40c
8002c10: 623b str r3, [r7, #32]
8002c12: 6a3b ldr r3, [r7, #32]
8002c14: 2200 movs r2, #0
8002c16: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002c18: 68bb ldr r3, [r7, #8]
8002c1a: 781b ldrb r3, [r3, #0]
8002c1c: 4619 mov r1, r3
8002c1e: 68f8 ldr r0, [r7, #12]
8002c20: f005 ffff bl 8008c22 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002c24: 88fb ldrh r3, [r7, #6]
8002c26: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002c2a: 2b00 cmp r3, #0
8002c2c: f000 82fc beq.w 8003228 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8002c30: 68fb ldr r3, [r7, #12]
8002c32: 681b ldr r3, [r3, #0]
8002c34: 461a mov r2, r3
8002c36: 68bb ldr r3, [r7, #8]
8002c38: 781b ldrb r3, [r3, #0]
8002c3a: 009b lsls r3, r3, #2
8002c3c: 4413 add r3, r2
8002c3e: 881b ldrh r3, [r3, #0]
8002c40: b29b uxth r3, r3
8002c42: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002c46: f023 0370 bic.w r3, r3, #112 @ 0x70
8002c4a: 82fb strh r3, [r7, #22]
8002c4c: 68fb ldr r3, [r7, #12]
8002c4e: 681b ldr r3, [r3, #0]
8002c50: 461a mov r2, r3
8002c52: 68bb ldr r3, [r7, #8]
8002c54: 781b ldrb r3, [r3, #0]
8002c56: 009b lsls r3, r3, #2
8002c58: 441a add r2, r3
8002c5a: 8afb ldrh r3, [r7, #22]
8002c5c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002c60: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002c64: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8002c68: f043 0380 orr.w r3, r3, #128 @ 0x80
8002c6c: b29b uxth r3, r3
8002c6e: 8013 strh r3, [r2, #0]
8002c70: e2da b.n 8003228 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002c72: 88fb ldrh r3, [r7, #6]
8002c74: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002c78: 2b00 cmp r3, #0
8002c7a: d021 beq.n 8002cc0 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8002c7c: 68fb ldr r3, [r7, #12]
8002c7e: 681b ldr r3, [r3, #0]
8002c80: 461a mov r2, r3
8002c82: 68bb ldr r3, [r7, #8]
8002c84: 781b ldrb r3, [r3, #0]
8002c86: 009b lsls r3, r3, #2
8002c88: 4413 add r3, r2
8002c8a: 881b ldrh r3, [r3, #0]
8002c8c: b29b uxth r3, r3
8002c8e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002c92: f023 0370 bic.w r3, r3, #112 @ 0x70
8002c96: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8002c9a: 68fb ldr r3, [r7, #12]
8002c9c: 681b ldr r3, [r3, #0]
8002c9e: 461a mov r2, r3
8002ca0: 68bb ldr r3, [r7, #8]
8002ca2: 781b ldrb r3, [r3, #0]
8002ca4: 009b lsls r3, r3, #2
8002ca6: 441a add r2, r3
8002ca8: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8002cac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002cb0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002cb4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8002cb8: f043 0380 orr.w r3, r3, #128 @ 0x80
8002cbc: b29b uxth r3, r3
8002cbe: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8002cc0: 68bb ldr r3, [r7, #8]
8002cc2: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8002cc6: 2b01 cmp r3, #1
8002cc8: f040 82ae bne.w 8003228 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8002ccc: 68bb ldr r3, [r7, #8]
8002cce: 695a ldr r2, [r3, #20]
8002cd0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002cd4: 441a add r2, r3
8002cd6: 68bb ldr r3, [r7, #8]
8002cd8: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8002cda: 68bb ldr r3, [r7, #8]
8002cdc: 69da ldr r2, [r3, #28]
8002cde: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002ce2: 441a add r2, r3
8002ce4: 68bb ldr r3, [r7, #8]
8002ce6: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8002ce8: 68bb ldr r3, [r7, #8]
8002cea: 6a1a ldr r2, [r3, #32]
8002cec: 68bb ldr r3, [r7, #8]
8002cee: 691b ldr r3, [r3, #16]
8002cf0: 429a cmp r2, r3
8002cf2: d30b bcc.n 8002d0c <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8002cf4: 68bb ldr r3, [r7, #8]
8002cf6: 691b ldr r3, [r3, #16]
8002cf8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8002cfc: 68bb ldr r3, [r7, #8]
8002cfe: 6a1a ldr r2, [r3, #32]
8002d00: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d04: 1ad2 subs r2, r2, r3
8002d06: 68bb ldr r3, [r7, #8]
8002d08: 621a str r2, [r3, #32]
8002d0a: e017 b.n 8002d3c <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8002d0c: 68bb ldr r3, [r7, #8]
8002d0e: 6a1b ldr r3, [r3, #32]
8002d10: 2b00 cmp r3, #0
8002d12: d108 bne.n 8002d26 <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8002d14: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002d18: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8002d1c: 68bb ldr r3, [r7, #8]
8002d1e: 2200 movs r2, #0
8002d20: f883 2024 strb.w r2, [r3, #36] @ 0x24
8002d24: e00a b.n 8002d3c <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8002d26: 68bb ldr r3, [r7, #8]
8002d28: 2200 movs r2, #0
8002d2a: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8002d2e: 68bb ldr r3, [r7, #8]
8002d30: 6a1b ldr r3, [r3, #32]
8002d32: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8002d36: 68bb ldr r3, [r7, #8]
8002d38: 2200 movs r2, #0
8002d3a: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8002d3c: 68bb ldr r3, [r7, #8]
8002d3e: 785b ldrb r3, [r3, #1]
8002d40: 2b00 cmp r3, #0
8002d42: d165 bne.n 8002e10 <HAL_PCD_EP_DB_Transmit+0x382>
8002d44: 68fb ldr r3, [r7, #12]
8002d46: 681b ldr r3, [r3, #0]
8002d48: 63fb str r3, [r7, #60] @ 0x3c
8002d4a: 68fb ldr r3, [r7, #12]
8002d4c: 681b ldr r3, [r3, #0]
8002d4e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002d52: b29b uxth r3, r3
8002d54: 461a mov r2, r3
8002d56: 6bfb ldr r3, [r7, #60] @ 0x3c
8002d58: 4413 add r3, r2
8002d5a: 63fb str r3, [r7, #60] @ 0x3c
8002d5c: 68bb ldr r3, [r7, #8]
8002d5e: 781b ldrb r3, [r3, #0]
8002d60: 011a lsls r2, r3, #4
8002d62: 6bfb ldr r3, [r7, #60] @ 0x3c
8002d64: 4413 add r3, r2
8002d66: f203 4304 addw r3, r3, #1028 @ 0x404
8002d6a: 63bb str r3, [r7, #56] @ 0x38
8002d6c: 6bbb ldr r3, [r7, #56] @ 0x38
8002d6e: 881b ldrh r3, [r3, #0]
8002d70: b29b uxth r3, r3
8002d72: f3c3 0309 ubfx r3, r3, #0, #10
8002d76: b29a uxth r2, r3
8002d78: 6bbb ldr r3, [r7, #56] @ 0x38
8002d7a: 801a strh r2, [r3, #0]
8002d7c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d80: 2b3e cmp r3, #62 @ 0x3e
8002d82: d91d bls.n 8002dc0 <HAL_PCD_EP_DB_Transmit+0x332>
8002d84: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d88: 095b lsrs r3, r3, #5
8002d8a: 64bb str r3, [r7, #72] @ 0x48
8002d8c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d90: f003 031f and.w r3, r3, #31
8002d94: 2b00 cmp r3, #0
8002d96: d102 bne.n 8002d9e <HAL_PCD_EP_DB_Transmit+0x310>
8002d98: 6cbb ldr r3, [r7, #72] @ 0x48
8002d9a: 3b01 subs r3, #1
8002d9c: 64bb str r3, [r7, #72] @ 0x48
8002d9e: 6bbb ldr r3, [r7, #56] @ 0x38
8002da0: 881b ldrh r3, [r3, #0]
8002da2: b29a uxth r2, r3
8002da4: 6cbb ldr r3, [r7, #72] @ 0x48
8002da6: b29b uxth r3, r3
8002da8: 029b lsls r3, r3, #10
8002daa: b29b uxth r3, r3
8002dac: 4313 orrs r3, r2
8002dae: b29b uxth r3, r3
8002db0: ea6f 4343 mvn.w r3, r3, lsl #17
8002db4: ea6f 4353 mvn.w r3, r3, lsr #17
8002db8: b29a uxth r2, r3
8002dba: 6bbb ldr r3, [r7, #56] @ 0x38
8002dbc: 801a strh r2, [r3, #0]
8002dbe: e044 b.n 8002e4a <HAL_PCD_EP_DB_Transmit+0x3bc>
8002dc0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002dc4: 2b00 cmp r3, #0
8002dc6: d10a bne.n 8002dde <HAL_PCD_EP_DB_Transmit+0x350>
8002dc8: 6bbb ldr r3, [r7, #56] @ 0x38
8002dca: 881b ldrh r3, [r3, #0]
8002dcc: b29b uxth r3, r3
8002dce: ea6f 4343 mvn.w r3, r3, lsl #17
8002dd2: ea6f 4353 mvn.w r3, r3, lsr #17
8002dd6: b29a uxth r2, r3
8002dd8: 6bbb ldr r3, [r7, #56] @ 0x38
8002dda: 801a strh r2, [r3, #0]
8002ddc: e035 b.n 8002e4a <HAL_PCD_EP_DB_Transmit+0x3bc>
8002dde: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002de2: 085b lsrs r3, r3, #1
8002de4: 64bb str r3, [r7, #72] @ 0x48
8002de6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002dea: f003 0301 and.w r3, r3, #1
8002dee: 2b00 cmp r3, #0
8002df0: d002 beq.n 8002df8 <HAL_PCD_EP_DB_Transmit+0x36a>
8002df2: 6cbb ldr r3, [r7, #72] @ 0x48
8002df4: 3301 adds r3, #1
8002df6: 64bb str r3, [r7, #72] @ 0x48
8002df8: 6bbb ldr r3, [r7, #56] @ 0x38
8002dfa: 881b ldrh r3, [r3, #0]
8002dfc: b29a uxth r2, r3
8002dfe: 6cbb ldr r3, [r7, #72] @ 0x48
8002e00: b29b uxth r3, r3
8002e02: 029b lsls r3, r3, #10
8002e04: b29b uxth r3, r3
8002e06: 4313 orrs r3, r2
8002e08: b29a uxth r2, r3
8002e0a: 6bbb ldr r3, [r7, #56] @ 0x38
8002e0c: 801a strh r2, [r3, #0]
8002e0e: e01c b.n 8002e4a <HAL_PCD_EP_DB_Transmit+0x3bc>
8002e10: 68bb ldr r3, [r7, #8]
8002e12: 785b ldrb r3, [r3, #1]
8002e14: 2b01 cmp r3, #1
8002e16: d118 bne.n 8002e4a <HAL_PCD_EP_DB_Transmit+0x3bc>
8002e18: 68fb ldr r3, [r7, #12]
8002e1a: 681b ldr r3, [r3, #0]
8002e1c: 647b str r3, [r7, #68] @ 0x44
8002e1e: 68fb ldr r3, [r7, #12]
8002e20: 681b ldr r3, [r3, #0]
8002e22: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002e26: b29b uxth r3, r3
8002e28: 461a mov r2, r3
8002e2a: 6c7b ldr r3, [r7, #68] @ 0x44
8002e2c: 4413 add r3, r2
8002e2e: 647b str r3, [r7, #68] @ 0x44
8002e30: 68bb ldr r3, [r7, #8]
8002e32: 781b ldrb r3, [r3, #0]
8002e34: 011a lsls r2, r3, #4
8002e36: 6c7b ldr r3, [r7, #68] @ 0x44
8002e38: 4413 add r3, r2
8002e3a: f203 4304 addw r3, r3, #1028 @ 0x404
8002e3e: 643b str r3, [r7, #64] @ 0x40
8002e40: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002e44: b29a uxth r2, r3
8002e46: 6c3b ldr r3, [r7, #64] @ 0x40
8002e48: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8002e4a: 68fb ldr r3, [r7, #12]
8002e4c: 6818 ldr r0, [r3, #0]
8002e4e: 68bb ldr r3, [r7, #8]
8002e50: 6959 ldr r1, [r3, #20]
8002e52: 68bb ldr r3, [r7, #8]
8002e54: 891a ldrh r2, [r3, #8]
8002e56: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002e5a: b29b uxth r3, r3
8002e5c: f004 f81d bl 8006e9a <USB_WritePMA>
8002e60: e1e2 b.n 8003228 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002e62: 68fb ldr r3, [r7, #12]
8002e64: 681b ldr r3, [r3, #0]
8002e66: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002e6a: b29b uxth r3, r3
8002e6c: 461a mov r2, r3
8002e6e: 68bb ldr r3, [r7, #8]
8002e70: 781b ldrb r3, [r3, #0]
8002e72: 00db lsls r3, r3, #3
8002e74: 4413 add r3, r2
8002e76: 3306 adds r3, #6
8002e78: 005b lsls r3, r3, #1
8002e7a: 68fa ldr r2, [r7, #12]
8002e7c: 6812 ldr r2, [r2, #0]
8002e7e: 4413 add r3, r2
8002e80: f503 6380 add.w r3, r3, #1024 @ 0x400
8002e84: 881b ldrh r3, [r3, #0]
8002e86: f3c3 0309 ubfx r3, r3, #0, #10
8002e8a: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8002e8e: 68bb ldr r3, [r7, #8]
8002e90: 699a ldr r2, [r3, #24]
8002e92: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002e96: 429a cmp r2, r3
8002e98: d307 bcc.n 8002eaa <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8002e9a: 68bb ldr r3, [r7, #8]
8002e9c: 699a ldr r2, [r3, #24]
8002e9e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002ea2: 1ad2 subs r2, r2, r3
8002ea4: 68bb ldr r3, [r7, #8]
8002ea6: 619a str r2, [r3, #24]
8002ea8: e002 b.n 8002eb0 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8002eaa: 68bb ldr r3, [r7, #8]
8002eac: 2200 movs r2, #0
8002eae: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8002eb0: 68bb ldr r3, [r7, #8]
8002eb2: 699b ldr r3, [r3, #24]
8002eb4: 2b00 cmp r3, #0
8002eb6: f040 80c0 bne.w 800303a <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002eba: 68bb ldr r3, [r7, #8]
8002ebc: 785b ldrb r3, [r3, #1]
8002ebe: 2b00 cmp r3, #0
8002ec0: d126 bne.n 8002f10 <HAL_PCD_EP_DB_Transmit+0x482>
8002ec2: 68fb ldr r3, [r7, #12]
8002ec4: 681b ldr r3, [r3, #0]
8002ec6: 67fb str r3, [r7, #124] @ 0x7c
8002ec8: 68fb ldr r3, [r7, #12]
8002eca: 681b ldr r3, [r3, #0]
8002ecc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002ed0: b29b uxth r3, r3
8002ed2: 461a mov r2, r3
8002ed4: 6ffb ldr r3, [r7, #124] @ 0x7c
8002ed6: 4413 add r3, r2
8002ed8: 67fb str r3, [r7, #124] @ 0x7c
8002eda: 68bb ldr r3, [r7, #8]
8002edc: 781b ldrb r3, [r3, #0]
8002ede: 011a lsls r2, r3, #4
8002ee0: 6ffb ldr r3, [r7, #124] @ 0x7c
8002ee2: 4413 add r3, r2
8002ee4: f203 4304 addw r3, r3, #1028 @ 0x404
8002ee8: 67bb str r3, [r7, #120] @ 0x78
8002eea: 6fbb ldr r3, [r7, #120] @ 0x78
8002eec: 881b ldrh r3, [r3, #0]
8002eee: b29b uxth r3, r3
8002ef0: f3c3 0309 ubfx r3, r3, #0, #10
8002ef4: b29a uxth r2, r3
8002ef6: 6fbb ldr r3, [r7, #120] @ 0x78
8002ef8: 801a strh r2, [r3, #0]
8002efa: 6fbb ldr r3, [r7, #120] @ 0x78
8002efc: 881b ldrh r3, [r3, #0]
8002efe: b29b uxth r3, r3
8002f00: ea6f 4343 mvn.w r3, r3, lsl #17
8002f04: ea6f 4353 mvn.w r3, r3, lsr #17
8002f08: b29a uxth r2, r3
8002f0a: 6fbb ldr r3, [r7, #120] @ 0x78
8002f0c: 801a strh r2, [r3, #0]
8002f0e: e01a b.n 8002f46 <HAL_PCD_EP_DB_Transmit+0x4b8>
8002f10: 68bb ldr r3, [r7, #8]
8002f12: 785b ldrb r3, [r3, #1]
8002f14: 2b01 cmp r3, #1
8002f16: d116 bne.n 8002f46 <HAL_PCD_EP_DB_Transmit+0x4b8>
8002f18: 68fb ldr r3, [r7, #12]
8002f1a: 681b ldr r3, [r3, #0]
8002f1c: 667b str r3, [r7, #100] @ 0x64
8002f1e: 68fb ldr r3, [r7, #12]
8002f20: 681b ldr r3, [r3, #0]
8002f22: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002f26: b29b uxth r3, r3
8002f28: 461a mov r2, r3
8002f2a: 6e7b ldr r3, [r7, #100] @ 0x64
8002f2c: 4413 add r3, r2
8002f2e: 667b str r3, [r7, #100] @ 0x64
8002f30: 68bb ldr r3, [r7, #8]
8002f32: 781b ldrb r3, [r3, #0]
8002f34: 011a lsls r2, r3, #4
8002f36: 6e7b ldr r3, [r7, #100] @ 0x64
8002f38: 4413 add r3, r2
8002f3a: f203 4304 addw r3, r3, #1028 @ 0x404
8002f3e: 663b str r3, [r7, #96] @ 0x60
8002f40: 6e3b ldr r3, [r7, #96] @ 0x60
8002f42: 2200 movs r2, #0
8002f44: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002f46: 68fb ldr r3, [r7, #12]
8002f48: 681b ldr r3, [r3, #0]
8002f4a: 677b str r3, [r7, #116] @ 0x74
8002f4c: 68bb ldr r3, [r7, #8]
8002f4e: 785b ldrb r3, [r3, #1]
8002f50: 2b00 cmp r3, #0
8002f52: d12b bne.n 8002fac <HAL_PCD_EP_DB_Transmit+0x51e>
8002f54: 68fb ldr r3, [r7, #12]
8002f56: 681b ldr r3, [r3, #0]
8002f58: 66fb str r3, [r7, #108] @ 0x6c
8002f5a: 68fb ldr r3, [r7, #12]
8002f5c: 681b ldr r3, [r3, #0]
8002f5e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002f62: b29b uxth r3, r3
8002f64: 461a mov r2, r3
8002f66: 6efb ldr r3, [r7, #108] @ 0x6c
8002f68: 4413 add r3, r2
8002f6a: 66fb str r3, [r7, #108] @ 0x6c
8002f6c: 68bb ldr r3, [r7, #8]
8002f6e: 781b ldrb r3, [r3, #0]
8002f70: 011a lsls r2, r3, #4
8002f72: 6efb ldr r3, [r7, #108] @ 0x6c
8002f74: 4413 add r3, r2
8002f76: f203 430c addw r3, r3, #1036 @ 0x40c
8002f7a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8002f7e: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002f82: 881b ldrh r3, [r3, #0]
8002f84: b29b uxth r3, r3
8002f86: f3c3 0309 ubfx r3, r3, #0, #10
8002f8a: b29a uxth r2, r3
8002f8c: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002f90: 801a strh r2, [r3, #0]
8002f92: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002f96: 881b ldrh r3, [r3, #0]
8002f98: b29b uxth r3, r3
8002f9a: ea6f 4343 mvn.w r3, r3, lsl #17
8002f9e: ea6f 4353 mvn.w r3, r3, lsr #17
8002fa2: b29a uxth r2, r3
8002fa4: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002fa8: 801a strh r2, [r3, #0]
8002faa: e017 b.n 8002fdc <HAL_PCD_EP_DB_Transmit+0x54e>
8002fac: 68bb ldr r3, [r7, #8]
8002fae: 785b ldrb r3, [r3, #1]
8002fb0: 2b01 cmp r3, #1
8002fb2: d113 bne.n 8002fdc <HAL_PCD_EP_DB_Transmit+0x54e>
8002fb4: 68fb ldr r3, [r7, #12]
8002fb6: 681b ldr r3, [r3, #0]
8002fb8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002fbc: b29b uxth r3, r3
8002fbe: 461a mov r2, r3
8002fc0: 6f7b ldr r3, [r7, #116] @ 0x74
8002fc2: 4413 add r3, r2
8002fc4: 677b str r3, [r7, #116] @ 0x74
8002fc6: 68bb ldr r3, [r7, #8]
8002fc8: 781b ldrb r3, [r3, #0]
8002fca: 011a lsls r2, r3, #4
8002fcc: 6f7b ldr r3, [r7, #116] @ 0x74
8002fce: 4413 add r3, r2
8002fd0: f203 430c addw r3, r3, #1036 @ 0x40c
8002fd4: 673b str r3, [r7, #112] @ 0x70
8002fd6: 6f3b ldr r3, [r7, #112] @ 0x70
8002fd8: 2200 movs r2, #0
8002fda: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002fdc: 68bb ldr r3, [r7, #8]
8002fde: 781b ldrb r3, [r3, #0]
8002fe0: 4619 mov r1, r3
8002fe2: 68f8 ldr r0, [r7, #12]
8002fe4: f005 fe1d bl 8008c22 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8002fe8: 88fb ldrh r3, [r7, #6]
8002fea: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002fee: 2b00 cmp r3, #0
8002ff0: f040 811a bne.w 8003228 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8002ff4: 68fb ldr r3, [r7, #12]
8002ff6: 681b ldr r3, [r3, #0]
8002ff8: 461a mov r2, r3
8002ffa: 68bb ldr r3, [r7, #8]
8002ffc: 781b ldrb r3, [r3, #0]
8002ffe: 009b lsls r3, r3, #2
8003000: 4413 add r3, r2
8003002: 881b ldrh r3, [r3, #0]
8003004: b29b uxth r3, r3
8003006: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800300a: f023 0370 bic.w r3, r3, #112 @ 0x70
800300e: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8003012: 68fb ldr r3, [r7, #12]
8003014: 681b ldr r3, [r3, #0]
8003016: 461a mov r2, r3
8003018: 68bb ldr r3, [r7, #8]
800301a: 781b ldrb r3, [r3, #0]
800301c: 009b lsls r3, r3, #2
800301e: 441a add r2, r3
8003020: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8003024: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003028: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800302c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8003030: f043 0380 orr.w r3, r3, #128 @ 0x80
8003034: b29b uxth r3, r3
8003036: 8013 strh r3, [r2, #0]
8003038: e0f6 b.n 8003228 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
800303a: 88fb ldrh r3, [r7, #6]
800303c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003040: 2b00 cmp r3, #0
8003042: d121 bne.n 8003088 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8003044: 68fb ldr r3, [r7, #12]
8003046: 681b ldr r3, [r3, #0]
8003048: 461a mov r2, r3
800304a: 68bb ldr r3, [r7, #8]
800304c: 781b ldrb r3, [r3, #0]
800304e: 009b lsls r3, r3, #2
8003050: 4413 add r3, r2
8003052: 881b ldrh r3, [r3, #0]
8003054: b29b uxth r3, r3
8003056: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800305a: f023 0370 bic.w r3, r3, #112 @ 0x70
800305e: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8003062: 68fb ldr r3, [r7, #12]
8003064: 681b ldr r3, [r3, #0]
8003066: 461a mov r2, r3
8003068: 68bb ldr r3, [r7, #8]
800306a: 781b ldrb r3, [r3, #0]
800306c: 009b lsls r3, r3, #2
800306e: 441a add r2, r3
8003070: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8003074: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003078: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800307c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8003080: f043 0380 orr.w r3, r3, #128 @ 0x80
8003084: b29b uxth r3, r3
8003086: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8003088: 68bb ldr r3, [r7, #8]
800308a: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
800308e: 2b01 cmp r3, #1
8003090: f040 80ca bne.w 8003228 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8003094: 68bb ldr r3, [r7, #8]
8003096: 695a ldr r2, [r3, #20]
8003098: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800309c: 441a add r2, r3
800309e: 68bb ldr r3, [r7, #8]
80030a0: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
80030a2: 68bb ldr r3, [r7, #8]
80030a4: 69da ldr r2, [r3, #28]
80030a6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80030aa: 441a add r2, r3
80030ac: 68bb ldr r3, [r7, #8]
80030ae: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
80030b0: 68bb ldr r3, [r7, #8]
80030b2: 6a1a ldr r2, [r3, #32]
80030b4: 68bb ldr r3, [r7, #8]
80030b6: 691b ldr r3, [r3, #16]
80030b8: 429a cmp r2, r3
80030ba: d30b bcc.n 80030d4 <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
80030bc: 68bb ldr r3, [r7, #8]
80030be: 691b ldr r3, [r3, #16]
80030c0: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
80030c4: 68bb ldr r3, [r7, #8]
80030c6: 6a1a ldr r2, [r3, #32]
80030c8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80030cc: 1ad2 subs r2, r2, r3
80030ce: 68bb ldr r3, [r7, #8]
80030d0: 621a str r2, [r3, #32]
80030d2: e017 b.n 8003104 <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
80030d4: 68bb ldr r3, [r7, #8]
80030d6: 6a1b ldr r3, [r3, #32]
80030d8: 2b00 cmp r3, #0
80030da: d108 bne.n 80030ee <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
80030dc: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80030e0: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
80030e4: 68bb ldr r3, [r7, #8]
80030e6: 2200 movs r2, #0
80030e8: f883 2024 strb.w r2, [r3, #36] @ 0x24
80030ec: e00a b.n 8003104 <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
80030ee: 68bb ldr r3, [r7, #8]
80030f0: 6a1b ldr r3, [r3, #32]
80030f2: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
80030f6: 68bb ldr r3, [r7, #8]
80030f8: 2200 movs r2, #0
80030fa: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
80030fc: 68bb ldr r3, [r7, #8]
80030fe: 2200 movs r2, #0
8003100: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8003104: 68fb ldr r3, [r7, #12]
8003106: 681b ldr r3, [r3, #0]
8003108: 657b str r3, [r7, #84] @ 0x54
800310a: 68bb ldr r3, [r7, #8]
800310c: 785b ldrb r3, [r3, #1]
800310e: 2b00 cmp r3, #0
8003110: d165 bne.n 80031de <HAL_PCD_EP_DB_Transmit+0x750>
8003112: 68fb ldr r3, [r7, #12]
8003114: 681b ldr r3, [r3, #0]
8003116: 65fb str r3, [r7, #92] @ 0x5c
8003118: 68fb ldr r3, [r7, #12]
800311a: 681b ldr r3, [r3, #0]
800311c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003120: b29b uxth r3, r3
8003122: 461a mov r2, r3
8003124: 6dfb ldr r3, [r7, #92] @ 0x5c
8003126: 4413 add r3, r2
8003128: 65fb str r3, [r7, #92] @ 0x5c
800312a: 68bb ldr r3, [r7, #8]
800312c: 781b ldrb r3, [r3, #0]
800312e: 011a lsls r2, r3, #4
8003130: 6dfb ldr r3, [r7, #92] @ 0x5c
8003132: 4413 add r3, r2
8003134: f203 430c addw r3, r3, #1036 @ 0x40c
8003138: 65bb str r3, [r7, #88] @ 0x58
800313a: 6dbb ldr r3, [r7, #88] @ 0x58
800313c: 881b ldrh r3, [r3, #0]
800313e: b29b uxth r3, r3
8003140: f3c3 0309 ubfx r3, r3, #0, #10
8003144: b29a uxth r2, r3
8003146: 6dbb ldr r3, [r7, #88] @ 0x58
8003148: 801a strh r2, [r3, #0]
800314a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800314e: 2b3e cmp r3, #62 @ 0x3e
8003150: d91d bls.n 800318e <HAL_PCD_EP_DB_Transmit+0x700>
8003152: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003156: 095b lsrs r3, r3, #5
8003158: 66bb str r3, [r7, #104] @ 0x68
800315a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800315e: f003 031f and.w r3, r3, #31
8003162: 2b00 cmp r3, #0
8003164: d102 bne.n 800316c <HAL_PCD_EP_DB_Transmit+0x6de>
8003166: 6ebb ldr r3, [r7, #104] @ 0x68
8003168: 3b01 subs r3, #1
800316a: 66bb str r3, [r7, #104] @ 0x68
800316c: 6dbb ldr r3, [r7, #88] @ 0x58
800316e: 881b ldrh r3, [r3, #0]
8003170: b29a uxth r2, r3
8003172: 6ebb ldr r3, [r7, #104] @ 0x68
8003174: b29b uxth r3, r3
8003176: 029b lsls r3, r3, #10
8003178: b29b uxth r3, r3
800317a: 4313 orrs r3, r2
800317c: b29b uxth r3, r3
800317e: ea6f 4343 mvn.w r3, r3, lsl #17
8003182: ea6f 4353 mvn.w r3, r3, lsr #17
8003186: b29a uxth r2, r3
8003188: 6dbb ldr r3, [r7, #88] @ 0x58
800318a: 801a strh r2, [r3, #0]
800318c: e041 b.n 8003212 <HAL_PCD_EP_DB_Transmit+0x784>
800318e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003192: 2b00 cmp r3, #0
8003194: d10a bne.n 80031ac <HAL_PCD_EP_DB_Transmit+0x71e>
8003196: 6dbb ldr r3, [r7, #88] @ 0x58
8003198: 881b ldrh r3, [r3, #0]
800319a: b29b uxth r3, r3
800319c: ea6f 4343 mvn.w r3, r3, lsl #17
80031a0: ea6f 4353 mvn.w r3, r3, lsr #17
80031a4: b29a uxth r2, r3
80031a6: 6dbb ldr r3, [r7, #88] @ 0x58
80031a8: 801a strh r2, [r3, #0]
80031aa: e032 b.n 8003212 <HAL_PCD_EP_DB_Transmit+0x784>
80031ac: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80031b0: 085b lsrs r3, r3, #1
80031b2: 66bb str r3, [r7, #104] @ 0x68
80031b4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80031b8: f003 0301 and.w r3, r3, #1
80031bc: 2b00 cmp r3, #0
80031be: d002 beq.n 80031c6 <HAL_PCD_EP_DB_Transmit+0x738>
80031c0: 6ebb ldr r3, [r7, #104] @ 0x68
80031c2: 3301 adds r3, #1
80031c4: 66bb str r3, [r7, #104] @ 0x68
80031c6: 6dbb ldr r3, [r7, #88] @ 0x58
80031c8: 881b ldrh r3, [r3, #0]
80031ca: b29a uxth r2, r3
80031cc: 6ebb ldr r3, [r7, #104] @ 0x68
80031ce: b29b uxth r3, r3
80031d0: 029b lsls r3, r3, #10
80031d2: b29b uxth r3, r3
80031d4: 4313 orrs r3, r2
80031d6: b29a uxth r2, r3
80031d8: 6dbb ldr r3, [r7, #88] @ 0x58
80031da: 801a strh r2, [r3, #0]
80031dc: e019 b.n 8003212 <HAL_PCD_EP_DB_Transmit+0x784>
80031de: 68bb ldr r3, [r7, #8]
80031e0: 785b ldrb r3, [r3, #1]
80031e2: 2b01 cmp r3, #1
80031e4: d115 bne.n 8003212 <HAL_PCD_EP_DB_Transmit+0x784>
80031e6: 68fb ldr r3, [r7, #12]
80031e8: 681b ldr r3, [r3, #0]
80031ea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80031ee: b29b uxth r3, r3
80031f0: 461a mov r2, r3
80031f2: 6d7b ldr r3, [r7, #84] @ 0x54
80031f4: 4413 add r3, r2
80031f6: 657b str r3, [r7, #84] @ 0x54
80031f8: 68bb ldr r3, [r7, #8]
80031fa: 781b ldrb r3, [r3, #0]
80031fc: 011a lsls r2, r3, #4
80031fe: 6d7b ldr r3, [r7, #84] @ 0x54
8003200: 4413 add r3, r2
8003202: f203 430c addw r3, r3, #1036 @ 0x40c
8003206: 653b str r3, [r7, #80] @ 0x50
8003208: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800320c: b29a uxth r2, r3
800320e: 6d3b ldr r3, [r7, #80] @ 0x50
8003210: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8003212: 68fb ldr r3, [r7, #12]
8003214: 6818 ldr r0, [r3, #0]
8003216: 68bb ldr r3, [r7, #8]
8003218: 6959 ldr r1, [r3, #20]
800321a: 68bb ldr r3, [r7, #8]
800321c: 895a ldrh r2, [r3, #10]
800321e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003222: b29b uxth r3, r3
8003224: f003 fe39 bl 8006e9a <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8003228: 68fb ldr r3, [r7, #12]
800322a: 681b ldr r3, [r3, #0]
800322c: 461a mov r2, r3
800322e: 68bb ldr r3, [r7, #8]
8003230: 781b ldrb r3, [r3, #0]
8003232: 009b lsls r3, r3, #2
8003234: 4413 add r3, r2
8003236: 881b ldrh r3, [r3, #0]
8003238: b29b uxth r3, r3
800323a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800323e: f023 0340 bic.w r3, r3, #64 @ 0x40
8003242: 82bb strh r3, [r7, #20]
8003244: 8abb ldrh r3, [r7, #20]
8003246: f083 0310 eor.w r3, r3, #16
800324a: 82bb strh r3, [r7, #20]
800324c: 8abb ldrh r3, [r7, #20]
800324e: f083 0320 eor.w r3, r3, #32
8003252: 82bb strh r3, [r7, #20]
8003254: 68fb ldr r3, [r7, #12]
8003256: 681b ldr r3, [r3, #0]
8003258: 461a mov r2, r3
800325a: 68bb ldr r3, [r7, #8]
800325c: 781b ldrb r3, [r3, #0]
800325e: 009b lsls r3, r3, #2
8003260: 441a add r2, r3
8003262: 8abb ldrh r3, [r7, #20]
8003264: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003268: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800326c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003270: f043 0380 orr.w r3, r3, #128 @ 0x80
8003274: b29b uxth r3, r3
8003276: 8013 strh r3, [r2, #0]
return HAL_OK;
8003278: 2300 movs r3, #0
}
800327a: 4618 mov r0, r3
800327c: 3790 adds r7, #144 @ 0x90
800327e: 46bd mov sp, r7
8003280: bd80 pop {r7, pc}
08003282 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8003282: b480 push {r7}
8003284: b087 sub sp, #28
8003286: af00 add r7, sp, #0
8003288: 60f8 str r0, [r7, #12]
800328a: 607b str r3, [r7, #4]
800328c: 460b mov r3, r1
800328e: 817b strh r3, [r7, #10]
8003290: 4613 mov r3, r2
8003292: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8003294: 897b ldrh r3, [r7, #10]
8003296: f003 0380 and.w r3, r3, #128 @ 0x80
800329a: b29b uxth r3, r3
800329c: 2b00 cmp r3, #0
800329e: d00b beq.n 80032b8 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80032a0: 897b ldrh r3, [r7, #10]
80032a2: f003 0207 and.w r2, r3, #7
80032a6: 4613 mov r3, r2
80032a8: 009b lsls r3, r3, #2
80032aa: 4413 add r3, r2
80032ac: 00db lsls r3, r3, #3
80032ae: 3310 adds r3, #16
80032b0: 68fa ldr r2, [r7, #12]
80032b2: 4413 add r3, r2
80032b4: 617b str r3, [r7, #20]
80032b6: e009 b.n 80032cc <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
80032b8: 897a ldrh r2, [r7, #10]
80032ba: 4613 mov r3, r2
80032bc: 009b lsls r3, r3, #2
80032be: 4413 add r3, r2
80032c0: 00db lsls r3, r3, #3
80032c2: f503 73a8 add.w r3, r3, #336 @ 0x150
80032c6: 68fa ldr r2, [r7, #12]
80032c8: 4413 add r3, r2
80032ca: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
80032cc: 893b ldrh r3, [r7, #8]
80032ce: 2b00 cmp r3, #0
80032d0: d107 bne.n 80032e2 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
80032d2: 697b ldr r3, [r7, #20]
80032d4: 2200 movs r2, #0
80032d6: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
80032d8: 687b ldr r3, [r7, #4]
80032da: b29a uxth r2, r3
80032dc: 697b ldr r3, [r7, #20]
80032de: 80da strh r2, [r3, #6]
80032e0: e00b b.n 80032fa <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
80032e2: 697b ldr r3, [r7, #20]
80032e4: 2201 movs r2, #1
80032e6: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
80032e8: 687b ldr r3, [r7, #4]
80032ea: b29a uxth r2, r3
80032ec: 697b ldr r3, [r7, #20]
80032ee: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
80032f0: 687b ldr r3, [r7, #4]
80032f2: 0c1b lsrs r3, r3, #16
80032f4: b29a uxth r2, r3
80032f6: 697b ldr r3, [r7, #20]
80032f8: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
80032fa: 2300 movs r3, #0
}
80032fc: 4618 mov r0, r3
80032fe: 371c adds r7, #28
8003300: 46bd mov sp, r7
8003302: bc80 pop {r7}
8003304: 4770 bx lr
...
08003308 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8003308: b580 push {r7, lr}
800330a: b086 sub sp, #24
800330c: af00 add r7, sp, #0
800330e: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8003310: 687b ldr r3, [r7, #4]
8003312: 2b00 cmp r3, #0
8003314: d101 bne.n 800331a <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8003316: 2301 movs r3, #1
8003318: e272 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
800331a: 687b ldr r3, [r7, #4]
800331c: 681b ldr r3, [r3, #0]
800331e: f003 0301 and.w r3, r3, #1
8003322: 2b00 cmp r3, #0
8003324: f000 8087 beq.w 8003436 <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8003328: 4b92 ldr r3, [pc, #584] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
800332a: 685b ldr r3, [r3, #4]
800332c: f003 030c and.w r3, r3, #12
8003330: 2b04 cmp r3, #4
8003332: d00c beq.n 800334e <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
8003334: 4b8f ldr r3, [pc, #572] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003336: 685b ldr r3, [r3, #4]
8003338: f003 030c and.w r3, r3, #12
800333c: 2b08 cmp r3, #8
800333e: d112 bne.n 8003366 <HAL_RCC_OscConfig+0x5e>
8003340: 4b8c ldr r3, [pc, #560] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003342: 685b ldr r3, [r3, #4]
8003344: f403 3380 and.w r3, r3, #65536 @ 0x10000
8003348: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800334c: d10b bne.n 8003366 <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
800334e: 4b89 ldr r3, [pc, #548] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003350: 681b ldr r3, [r3, #0]
8003352: f403 3300 and.w r3, r3, #131072 @ 0x20000
8003356: 2b00 cmp r3, #0
8003358: d06c beq.n 8003434 <HAL_RCC_OscConfig+0x12c>
800335a: 687b ldr r3, [r7, #4]
800335c: 685b ldr r3, [r3, #4]
800335e: 2b00 cmp r3, #0
8003360: d168 bne.n 8003434 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
8003362: 2301 movs r3, #1
8003364: e24c b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8003366: 687b ldr r3, [r7, #4]
8003368: 685b ldr r3, [r3, #4]
800336a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800336e: d106 bne.n 800337e <HAL_RCC_OscConfig+0x76>
8003370: 4b80 ldr r3, [pc, #512] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003372: 681b ldr r3, [r3, #0]
8003374: 4a7f ldr r2, [pc, #508] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003376: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800337a: 6013 str r3, [r2, #0]
800337c: e02e b.n 80033dc <HAL_RCC_OscConfig+0xd4>
800337e: 687b ldr r3, [r7, #4]
8003380: 685b ldr r3, [r3, #4]
8003382: 2b00 cmp r3, #0
8003384: d10c bne.n 80033a0 <HAL_RCC_OscConfig+0x98>
8003386: 4b7b ldr r3, [pc, #492] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003388: 681b ldr r3, [r3, #0]
800338a: 4a7a ldr r2, [pc, #488] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
800338c: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8003390: 6013 str r3, [r2, #0]
8003392: 4b78 ldr r3, [pc, #480] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003394: 681b ldr r3, [r3, #0]
8003396: 4a77 ldr r2, [pc, #476] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003398: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800339c: 6013 str r3, [r2, #0]
800339e: e01d b.n 80033dc <HAL_RCC_OscConfig+0xd4>
80033a0: 687b ldr r3, [r7, #4]
80033a2: 685b ldr r3, [r3, #4]
80033a4: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
80033a8: d10c bne.n 80033c4 <HAL_RCC_OscConfig+0xbc>
80033aa: 4b72 ldr r3, [pc, #456] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80033ac: 681b ldr r3, [r3, #0]
80033ae: 4a71 ldr r2, [pc, #452] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80033b0: f443 2380 orr.w r3, r3, #262144 @ 0x40000
80033b4: 6013 str r3, [r2, #0]
80033b6: 4b6f ldr r3, [pc, #444] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80033b8: 681b ldr r3, [r3, #0]
80033ba: 4a6e ldr r2, [pc, #440] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80033bc: f443 3380 orr.w r3, r3, #65536 @ 0x10000
80033c0: 6013 str r3, [r2, #0]
80033c2: e00b b.n 80033dc <HAL_RCC_OscConfig+0xd4>
80033c4: 4b6b ldr r3, [pc, #428] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80033c6: 681b ldr r3, [r3, #0]
80033c8: 4a6a ldr r2, [pc, #424] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80033ca: f423 3380 bic.w r3, r3, #65536 @ 0x10000
80033ce: 6013 str r3, [r2, #0]
80033d0: 4b68 ldr r3, [pc, #416] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80033d2: 681b ldr r3, [r3, #0]
80033d4: 4a67 ldr r2, [pc, #412] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80033d6: f423 2380 bic.w r3, r3, #262144 @ 0x40000
80033da: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
80033dc: 687b ldr r3, [r7, #4]
80033de: 685b ldr r3, [r3, #4]
80033e0: 2b00 cmp r3, #0
80033e2: d013 beq.n 800340c <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80033e4: f7fd fd4a bl 8000e7c <HAL_GetTick>
80033e8: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80033ea: e008 b.n 80033fe <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
80033ec: f7fd fd46 bl 8000e7c <HAL_GetTick>
80033f0: 4602 mov r2, r0
80033f2: 693b ldr r3, [r7, #16]
80033f4: 1ad3 subs r3, r2, r3
80033f6: 2b64 cmp r3, #100 @ 0x64
80033f8: d901 bls.n 80033fe <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
80033fa: 2303 movs r3, #3
80033fc: e200 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80033fe: 4b5d ldr r3, [pc, #372] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003400: 681b ldr r3, [r3, #0]
8003402: f403 3300 and.w r3, r3, #131072 @ 0x20000
8003406: 2b00 cmp r3, #0
8003408: d0f0 beq.n 80033ec <HAL_RCC_OscConfig+0xe4>
800340a: e014 b.n 8003436 <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800340c: f7fd fd36 bl 8000e7c <HAL_GetTick>
8003410: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8003412: e008 b.n 8003426 <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8003414: f7fd fd32 bl 8000e7c <HAL_GetTick>
8003418: 4602 mov r2, r0
800341a: 693b ldr r3, [r7, #16]
800341c: 1ad3 subs r3, r2, r3
800341e: 2b64 cmp r3, #100 @ 0x64
8003420: d901 bls.n 8003426 <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
8003422: 2303 movs r3, #3
8003424: e1ec b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8003426: 4b53 ldr r3, [pc, #332] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003428: 681b ldr r3, [r3, #0]
800342a: f403 3300 and.w r3, r3, #131072 @ 0x20000
800342e: 2b00 cmp r3, #0
8003430: d1f0 bne.n 8003414 <HAL_RCC_OscConfig+0x10c>
8003432: e000 b.n 8003436 <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8003434: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8003436: 687b ldr r3, [r7, #4]
8003438: 681b ldr r3, [r3, #0]
800343a: f003 0302 and.w r3, r3, #2
800343e: 2b00 cmp r3, #0
8003440: d063 beq.n 800350a <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
8003442: 4b4c ldr r3, [pc, #304] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003444: 685b ldr r3, [r3, #4]
8003446: f003 030c and.w r3, r3, #12
800344a: 2b00 cmp r3, #0
800344c: d00b beq.n 8003466 <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
800344e: 4b49 ldr r3, [pc, #292] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003450: 685b ldr r3, [r3, #4]
8003452: f003 030c and.w r3, r3, #12
8003456: 2b08 cmp r3, #8
8003458: d11c bne.n 8003494 <HAL_RCC_OscConfig+0x18c>
800345a: 4b46 ldr r3, [pc, #280] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
800345c: 685b ldr r3, [r3, #4]
800345e: f403 3380 and.w r3, r3, #65536 @ 0x10000
8003462: 2b00 cmp r3, #0
8003464: d116 bne.n 8003494 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003466: 4b43 ldr r3, [pc, #268] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003468: 681b ldr r3, [r3, #0]
800346a: f003 0302 and.w r3, r3, #2
800346e: 2b00 cmp r3, #0
8003470: d005 beq.n 800347e <HAL_RCC_OscConfig+0x176>
8003472: 687b ldr r3, [r7, #4]
8003474: 691b ldr r3, [r3, #16]
8003476: 2b01 cmp r3, #1
8003478: d001 beq.n 800347e <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
800347a: 2301 movs r3, #1
800347c: e1c0 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800347e: 4b3d ldr r3, [pc, #244] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003480: 681b ldr r3, [r3, #0]
8003482: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8003486: 687b ldr r3, [r7, #4]
8003488: 695b ldr r3, [r3, #20]
800348a: 00db lsls r3, r3, #3
800348c: 4939 ldr r1, [pc, #228] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
800348e: 4313 orrs r3, r2
8003490: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003492: e03a b.n 800350a <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8003494: 687b ldr r3, [r7, #4]
8003496: 691b ldr r3, [r3, #16]
8003498: 2b00 cmp r3, #0
800349a: d020 beq.n 80034de <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
800349c: 4b36 ldr r3, [pc, #216] @ (8003578 <HAL_RCC_OscConfig+0x270>)
800349e: 2201 movs r2, #1
80034a0: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80034a2: f7fd fceb bl 8000e7c <HAL_GetTick>
80034a6: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80034a8: e008 b.n 80034bc <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
80034aa: f7fd fce7 bl 8000e7c <HAL_GetTick>
80034ae: 4602 mov r2, r0
80034b0: 693b ldr r3, [r7, #16]
80034b2: 1ad3 subs r3, r2, r3
80034b4: 2b02 cmp r3, #2
80034b6: d901 bls.n 80034bc <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
80034b8: 2303 movs r3, #3
80034ba: e1a1 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80034bc: 4b2d ldr r3, [pc, #180] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80034be: 681b ldr r3, [r3, #0]
80034c0: f003 0302 and.w r3, r3, #2
80034c4: 2b00 cmp r3, #0
80034c6: d0f0 beq.n 80034aa <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
80034c8: 4b2a ldr r3, [pc, #168] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80034ca: 681b ldr r3, [r3, #0]
80034cc: f023 02f8 bic.w r2, r3, #248 @ 0xf8
80034d0: 687b ldr r3, [r7, #4]
80034d2: 695b ldr r3, [r3, #20]
80034d4: 00db lsls r3, r3, #3
80034d6: 4927 ldr r1, [pc, #156] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
80034d8: 4313 orrs r3, r2
80034da: 600b str r3, [r1, #0]
80034dc: e015 b.n 800350a <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
80034de: 4b26 ldr r3, [pc, #152] @ (8003578 <HAL_RCC_OscConfig+0x270>)
80034e0: 2200 movs r2, #0
80034e2: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80034e4: f7fd fcca bl 8000e7c <HAL_GetTick>
80034e8: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
80034ea: e008 b.n 80034fe <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
80034ec: f7fd fcc6 bl 8000e7c <HAL_GetTick>
80034f0: 4602 mov r2, r0
80034f2: 693b ldr r3, [r7, #16]
80034f4: 1ad3 subs r3, r2, r3
80034f6: 2b02 cmp r3, #2
80034f8: d901 bls.n 80034fe <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
80034fa: 2303 movs r3, #3
80034fc: e180 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
80034fe: 4b1d ldr r3, [pc, #116] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003500: 681b ldr r3, [r3, #0]
8003502: f003 0302 and.w r3, r3, #2
8003506: 2b00 cmp r3, #0
8003508: d1f0 bne.n 80034ec <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
800350a: 687b ldr r3, [r7, #4]
800350c: 681b ldr r3, [r3, #0]
800350e: f003 0308 and.w r3, r3, #8
8003512: 2b00 cmp r3, #0
8003514: d03a beq.n 800358c <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8003516: 687b ldr r3, [r7, #4]
8003518: 699b ldr r3, [r3, #24]
800351a: 2b00 cmp r3, #0
800351c: d019 beq.n 8003552 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
800351e: 4b17 ldr r3, [pc, #92] @ (800357c <HAL_RCC_OscConfig+0x274>)
8003520: 2201 movs r2, #1
8003522: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003524: f7fd fcaa bl 8000e7c <HAL_GetTick>
8003528: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
800352a: e008 b.n 800353e <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
800352c: f7fd fca6 bl 8000e7c <HAL_GetTick>
8003530: 4602 mov r2, r0
8003532: 693b ldr r3, [r7, #16]
8003534: 1ad3 subs r3, r2, r3
8003536: 2b02 cmp r3, #2
8003538: d901 bls.n 800353e <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
800353a: 2303 movs r3, #3
800353c: e160 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
800353e: 4b0d ldr r3, [pc, #52] @ (8003574 <HAL_RCC_OscConfig+0x26c>)
8003540: 6a5b ldr r3, [r3, #36] @ 0x24
8003542: f003 0302 and.w r3, r3, #2
8003546: 2b00 cmp r3, #0
8003548: d0f0 beq.n 800352c <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
800354a: 2001 movs r0, #1
800354c: f000 fa9c bl 8003a88 <RCC_Delay>
8003550: e01c b.n 800358c <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8003552: 4b0a ldr r3, [pc, #40] @ (800357c <HAL_RCC_OscConfig+0x274>)
8003554: 2200 movs r2, #0
8003556: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003558: f7fd fc90 bl 8000e7c <HAL_GetTick>
800355c: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
800355e: e00f b.n 8003580 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8003560: f7fd fc8c bl 8000e7c <HAL_GetTick>
8003564: 4602 mov r2, r0
8003566: 693b ldr r3, [r7, #16]
8003568: 1ad3 subs r3, r2, r3
800356a: 2b02 cmp r3, #2
800356c: d908 bls.n 8003580 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
800356e: 2303 movs r3, #3
8003570: e146 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
8003572: bf00 nop
8003574: 40021000 .word 0x40021000
8003578: 42420000 .word 0x42420000
800357c: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003580: 4b92 ldr r3, [pc, #584] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003582: 6a5b ldr r3, [r3, #36] @ 0x24
8003584: f003 0302 and.w r3, r3, #2
8003588: 2b00 cmp r3, #0
800358a: d1e9 bne.n 8003560 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
800358c: 687b ldr r3, [r7, #4]
800358e: 681b ldr r3, [r3, #0]
8003590: f003 0304 and.w r3, r3, #4
8003594: 2b00 cmp r3, #0
8003596: f000 80a6 beq.w 80036e6 <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
800359a: 2300 movs r3, #0
800359c: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
800359e: 4b8b ldr r3, [pc, #556] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80035a0: 69db ldr r3, [r3, #28]
80035a2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80035a6: 2b00 cmp r3, #0
80035a8: d10d bne.n 80035c6 <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
80035aa: 4b88 ldr r3, [pc, #544] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80035ac: 69db ldr r3, [r3, #28]
80035ae: 4a87 ldr r2, [pc, #540] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80035b0: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80035b4: 61d3 str r3, [r2, #28]
80035b6: 4b85 ldr r3, [pc, #532] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80035b8: 69db ldr r3, [r3, #28]
80035ba: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80035be: 60bb str r3, [r7, #8]
80035c0: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
80035c2: 2301 movs r3, #1
80035c4: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80035c6: 4b82 ldr r3, [pc, #520] @ (80037d0 <HAL_RCC_OscConfig+0x4c8>)
80035c8: 681b ldr r3, [r3, #0]
80035ca: f403 7380 and.w r3, r3, #256 @ 0x100
80035ce: 2b00 cmp r3, #0
80035d0: d118 bne.n 8003604 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
80035d2: 4b7f ldr r3, [pc, #508] @ (80037d0 <HAL_RCC_OscConfig+0x4c8>)
80035d4: 681b ldr r3, [r3, #0]
80035d6: 4a7e ldr r2, [pc, #504] @ (80037d0 <HAL_RCC_OscConfig+0x4c8>)
80035d8: f443 7380 orr.w r3, r3, #256 @ 0x100
80035dc: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
80035de: f7fd fc4d bl 8000e7c <HAL_GetTick>
80035e2: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80035e4: e008 b.n 80035f8 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
80035e6: f7fd fc49 bl 8000e7c <HAL_GetTick>
80035ea: 4602 mov r2, r0
80035ec: 693b ldr r3, [r7, #16]
80035ee: 1ad3 subs r3, r2, r3
80035f0: 2b64 cmp r3, #100 @ 0x64
80035f2: d901 bls.n 80035f8 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
80035f4: 2303 movs r3, #3
80035f6: e103 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80035f8: 4b75 ldr r3, [pc, #468] @ (80037d0 <HAL_RCC_OscConfig+0x4c8>)
80035fa: 681b ldr r3, [r3, #0]
80035fc: f403 7380 and.w r3, r3, #256 @ 0x100
8003600: 2b00 cmp r3, #0
8003602: d0f0 beq.n 80035e6 <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8003604: 687b ldr r3, [r7, #4]
8003606: 68db ldr r3, [r3, #12]
8003608: 2b01 cmp r3, #1
800360a: d106 bne.n 800361a <HAL_RCC_OscConfig+0x312>
800360c: 4b6f ldr r3, [pc, #444] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
800360e: 6a1b ldr r3, [r3, #32]
8003610: 4a6e ldr r2, [pc, #440] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003612: f043 0301 orr.w r3, r3, #1
8003616: 6213 str r3, [r2, #32]
8003618: e02d b.n 8003676 <HAL_RCC_OscConfig+0x36e>
800361a: 687b ldr r3, [r7, #4]
800361c: 68db ldr r3, [r3, #12]
800361e: 2b00 cmp r3, #0
8003620: d10c bne.n 800363c <HAL_RCC_OscConfig+0x334>
8003622: 4b6a ldr r3, [pc, #424] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003624: 6a1b ldr r3, [r3, #32]
8003626: 4a69 ldr r2, [pc, #420] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003628: f023 0301 bic.w r3, r3, #1
800362c: 6213 str r3, [r2, #32]
800362e: 4b67 ldr r3, [pc, #412] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003630: 6a1b ldr r3, [r3, #32]
8003632: 4a66 ldr r2, [pc, #408] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003634: f023 0304 bic.w r3, r3, #4
8003638: 6213 str r3, [r2, #32]
800363a: e01c b.n 8003676 <HAL_RCC_OscConfig+0x36e>
800363c: 687b ldr r3, [r7, #4]
800363e: 68db ldr r3, [r3, #12]
8003640: 2b05 cmp r3, #5
8003642: d10c bne.n 800365e <HAL_RCC_OscConfig+0x356>
8003644: 4b61 ldr r3, [pc, #388] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003646: 6a1b ldr r3, [r3, #32]
8003648: 4a60 ldr r2, [pc, #384] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
800364a: f043 0304 orr.w r3, r3, #4
800364e: 6213 str r3, [r2, #32]
8003650: 4b5e ldr r3, [pc, #376] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003652: 6a1b ldr r3, [r3, #32]
8003654: 4a5d ldr r2, [pc, #372] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003656: f043 0301 orr.w r3, r3, #1
800365a: 6213 str r3, [r2, #32]
800365c: e00b b.n 8003676 <HAL_RCC_OscConfig+0x36e>
800365e: 4b5b ldr r3, [pc, #364] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003660: 6a1b ldr r3, [r3, #32]
8003662: 4a5a ldr r2, [pc, #360] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003664: f023 0301 bic.w r3, r3, #1
8003668: 6213 str r3, [r2, #32]
800366a: 4b58 ldr r3, [pc, #352] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
800366c: 6a1b ldr r3, [r3, #32]
800366e: 4a57 ldr r2, [pc, #348] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003670: f023 0304 bic.w r3, r3, #4
8003674: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8003676: 687b ldr r3, [r7, #4]
8003678: 68db ldr r3, [r3, #12]
800367a: 2b00 cmp r3, #0
800367c: d015 beq.n 80036aa <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800367e: f7fd fbfd bl 8000e7c <HAL_GetTick>
8003682: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003684: e00a b.n 800369c <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8003686: f7fd fbf9 bl 8000e7c <HAL_GetTick>
800368a: 4602 mov r2, r0
800368c: 693b ldr r3, [r7, #16]
800368e: 1ad3 subs r3, r2, r3
8003690: f241 3288 movw r2, #5000 @ 0x1388
8003694: 4293 cmp r3, r2
8003696: d901 bls.n 800369c <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8003698: 2303 movs r3, #3
800369a: e0b1 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800369c: 4b4b ldr r3, [pc, #300] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
800369e: 6a1b ldr r3, [r3, #32]
80036a0: f003 0302 and.w r3, r3, #2
80036a4: 2b00 cmp r3, #0
80036a6: d0ee beq.n 8003686 <HAL_RCC_OscConfig+0x37e>
80036a8: e014 b.n 80036d4 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80036aa: f7fd fbe7 bl 8000e7c <HAL_GetTick>
80036ae: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80036b0: e00a b.n 80036c8 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80036b2: f7fd fbe3 bl 8000e7c <HAL_GetTick>
80036b6: 4602 mov r2, r0
80036b8: 693b ldr r3, [r7, #16]
80036ba: 1ad3 subs r3, r2, r3
80036bc: f241 3288 movw r2, #5000 @ 0x1388
80036c0: 4293 cmp r3, r2
80036c2: d901 bls.n 80036c8 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
80036c4: 2303 movs r3, #3
80036c6: e09b b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80036c8: 4b40 ldr r3, [pc, #256] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80036ca: 6a1b ldr r3, [r3, #32]
80036cc: f003 0302 and.w r3, r3, #2
80036d0: 2b00 cmp r3, #0
80036d2: d1ee bne.n 80036b2 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
80036d4: 7dfb ldrb r3, [r7, #23]
80036d6: 2b01 cmp r3, #1
80036d8: d105 bne.n 80036e6 <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
80036da: 4b3c ldr r3, [pc, #240] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80036dc: 69db ldr r3, [r3, #28]
80036de: 4a3b ldr r2, [pc, #236] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80036e0: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
80036e4: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
80036e6: 687b ldr r3, [r7, #4]
80036e8: 69db ldr r3, [r3, #28]
80036ea: 2b00 cmp r3, #0
80036ec: f000 8087 beq.w 80037fe <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
80036f0: 4b36 ldr r3, [pc, #216] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80036f2: 685b ldr r3, [r3, #4]
80036f4: f003 030c and.w r3, r3, #12
80036f8: 2b08 cmp r3, #8
80036fa: d061 beq.n 80037c0 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
80036fc: 687b ldr r3, [r7, #4]
80036fe: 69db ldr r3, [r3, #28]
8003700: 2b02 cmp r3, #2
8003702: d146 bne.n 8003792 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8003704: 4b33 ldr r3, [pc, #204] @ (80037d4 <HAL_RCC_OscConfig+0x4cc>)
8003706: 2200 movs r2, #0
8003708: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800370a: f7fd fbb7 bl 8000e7c <HAL_GetTick>
800370e: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8003710: e008 b.n 8003724 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8003712: f7fd fbb3 bl 8000e7c <HAL_GetTick>
8003716: 4602 mov r2, r0
8003718: 693b ldr r3, [r7, #16]
800371a: 1ad3 subs r3, r2, r3
800371c: 2b02 cmp r3, #2
800371e: d901 bls.n 8003724 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
8003720: 2303 movs r3, #3
8003722: e06d b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8003724: 4b29 ldr r3, [pc, #164] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003726: 681b ldr r3, [r3, #0]
8003728: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800372c: 2b00 cmp r3, #0
800372e: d1f0 bne.n 8003712 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
8003730: 687b ldr r3, [r7, #4]
8003732: 6a1b ldr r3, [r3, #32]
8003734: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8003738: d108 bne.n 800374c <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
800373a: 4b24 ldr r3, [pc, #144] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
800373c: 685b ldr r3, [r3, #4]
800373e: f423 3200 bic.w r2, r3, #131072 @ 0x20000
8003742: 687b ldr r3, [r7, #4]
8003744: 689b ldr r3, [r3, #8]
8003746: 4921 ldr r1, [pc, #132] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003748: 4313 orrs r3, r2
800374a: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
800374c: 4b1f ldr r3, [pc, #124] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
800374e: 685b ldr r3, [r3, #4]
8003750: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
8003754: 687b ldr r3, [r7, #4]
8003756: 6a19 ldr r1, [r3, #32]
8003758: 687b ldr r3, [r7, #4]
800375a: 6a5b ldr r3, [r3, #36] @ 0x24
800375c: 430b orrs r3, r1
800375e: 491b ldr r1, [pc, #108] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003760: 4313 orrs r3, r2
8003762: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8003764: 4b1b ldr r3, [pc, #108] @ (80037d4 <HAL_RCC_OscConfig+0x4cc>)
8003766: 2201 movs r2, #1
8003768: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800376a: f7fd fb87 bl 8000e7c <HAL_GetTick>
800376e: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003770: e008 b.n 8003784 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8003772: f7fd fb83 bl 8000e7c <HAL_GetTick>
8003776: 4602 mov r2, r0
8003778: 693b ldr r3, [r7, #16]
800377a: 1ad3 subs r3, r2, r3
800377c: 2b02 cmp r3, #2
800377e: d901 bls.n 8003784 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8003780: 2303 movs r3, #3
8003782: e03d b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003784: 4b11 ldr r3, [pc, #68] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
8003786: 681b ldr r3, [r3, #0]
8003788: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800378c: 2b00 cmp r3, #0
800378e: d0f0 beq.n 8003772 <HAL_RCC_OscConfig+0x46a>
8003790: e035 b.n 80037fe <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8003792: 4b10 ldr r3, [pc, #64] @ (80037d4 <HAL_RCC_OscConfig+0x4cc>)
8003794: 2200 movs r2, #0
8003796: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003798: f7fd fb70 bl 8000e7c <HAL_GetTick>
800379c: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800379e: e008 b.n 80037b2 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80037a0: f7fd fb6c bl 8000e7c <HAL_GetTick>
80037a4: 4602 mov r2, r0
80037a6: 693b ldr r3, [r7, #16]
80037a8: 1ad3 subs r3, r2, r3
80037aa: 2b02 cmp r3, #2
80037ac: d901 bls.n 80037b2 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
80037ae: 2303 movs r3, #3
80037b0: e026 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80037b2: 4b06 ldr r3, [pc, #24] @ (80037cc <HAL_RCC_OscConfig+0x4c4>)
80037b4: 681b ldr r3, [r3, #0]
80037b6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80037ba: 2b00 cmp r3, #0
80037bc: d1f0 bne.n 80037a0 <HAL_RCC_OscConfig+0x498>
80037be: e01e b.n 80037fe <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
80037c0: 687b ldr r3, [r7, #4]
80037c2: 69db ldr r3, [r3, #28]
80037c4: 2b01 cmp r3, #1
80037c6: d107 bne.n 80037d8 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
80037c8: 2301 movs r3, #1
80037ca: e019 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
80037cc: 40021000 .word 0x40021000
80037d0: 40007000 .word 0x40007000
80037d4: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
80037d8: 4b0b ldr r3, [pc, #44] @ (8003808 <HAL_RCC_OscConfig+0x500>)
80037da: 685b ldr r3, [r3, #4]
80037dc: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
80037de: 68fb ldr r3, [r7, #12]
80037e0: f403 3280 and.w r2, r3, #65536 @ 0x10000
80037e4: 687b ldr r3, [r7, #4]
80037e6: 6a1b ldr r3, [r3, #32]
80037e8: 429a cmp r2, r3
80037ea: d106 bne.n 80037fa <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
80037ec: 68fb ldr r3, [r7, #12]
80037ee: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
80037f2: 687b ldr r3, [r7, #4]
80037f4: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
80037f6: 429a cmp r2, r3
80037f8: d001 beq.n 80037fe <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
80037fa: 2301 movs r3, #1
80037fc: e000 b.n 8003800 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
80037fe: 2300 movs r3, #0
}
8003800: 4618 mov r0, r3
8003802: 3718 adds r7, #24
8003804: 46bd mov sp, r7
8003806: bd80 pop {r7, pc}
8003808: 40021000 .word 0x40021000
0800380c <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
800380c: b580 push {r7, lr}
800380e: b084 sub sp, #16
8003810: af00 add r7, sp, #0
8003812: 6078 str r0, [r7, #4]
8003814: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8003816: 687b ldr r3, [r7, #4]
8003818: 2b00 cmp r3, #0
800381a: d101 bne.n 8003820 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
800381c: 2301 movs r3, #1
800381e: e0d0 b.n 80039c2 <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8003820: 4b6a ldr r3, [pc, #424] @ (80039cc <HAL_RCC_ClockConfig+0x1c0>)
8003822: 681b ldr r3, [r3, #0]
8003824: f003 0307 and.w r3, r3, #7
8003828: 683a ldr r2, [r7, #0]
800382a: 429a cmp r2, r3
800382c: d910 bls.n 8003850 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800382e: 4b67 ldr r3, [pc, #412] @ (80039cc <HAL_RCC_ClockConfig+0x1c0>)
8003830: 681b ldr r3, [r3, #0]
8003832: f023 0207 bic.w r2, r3, #7
8003836: 4965 ldr r1, [pc, #404] @ (80039cc <HAL_RCC_ClockConfig+0x1c0>)
8003838: 683b ldr r3, [r7, #0]
800383a: 4313 orrs r3, r2
800383c: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
800383e: 4b63 ldr r3, [pc, #396] @ (80039cc <HAL_RCC_ClockConfig+0x1c0>)
8003840: 681b ldr r3, [r3, #0]
8003842: f003 0307 and.w r3, r3, #7
8003846: 683a ldr r2, [r7, #0]
8003848: 429a cmp r2, r3
800384a: d001 beq.n 8003850 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
800384c: 2301 movs r3, #1
800384e: e0b8 b.n 80039c2 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8003850: 687b ldr r3, [r7, #4]
8003852: 681b ldr r3, [r3, #0]
8003854: f003 0302 and.w r3, r3, #2
8003858: 2b00 cmp r3, #0
800385a: d020 beq.n 800389e <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800385c: 687b ldr r3, [r7, #4]
800385e: 681b ldr r3, [r3, #0]
8003860: f003 0304 and.w r3, r3, #4
8003864: 2b00 cmp r3, #0
8003866: d005 beq.n 8003874 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8003868: 4b59 ldr r3, [pc, #356] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
800386a: 685b ldr r3, [r3, #4]
800386c: 4a58 ldr r2, [pc, #352] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
800386e: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8003872: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8003874: 687b ldr r3, [r7, #4]
8003876: 681b ldr r3, [r3, #0]
8003878: f003 0308 and.w r3, r3, #8
800387c: 2b00 cmp r3, #0
800387e: d005 beq.n 800388c <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8003880: 4b53 ldr r3, [pc, #332] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
8003882: 685b ldr r3, [r3, #4]
8003884: 4a52 ldr r2, [pc, #328] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
8003886: f443 5360 orr.w r3, r3, #14336 @ 0x3800
800388a: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
800388c: 4b50 ldr r3, [pc, #320] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
800388e: 685b ldr r3, [r3, #4]
8003890: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8003894: 687b ldr r3, [r7, #4]
8003896: 689b ldr r3, [r3, #8]
8003898: 494d ldr r1, [pc, #308] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
800389a: 4313 orrs r3, r2
800389c: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
800389e: 687b ldr r3, [r7, #4]
80038a0: 681b ldr r3, [r3, #0]
80038a2: f003 0301 and.w r3, r3, #1
80038a6: 2b00 cmp r3, #0
80038a8: d040 beq.n 800392c <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
80038aa: 687b ldr r3, [r7, #4]
80038ac: 685b ldr r3, [r3, #4]
80038ae: 2b01 cmp r3, #1
80038b0: d107 bne.n 80038c2 <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80038b2: 4b47 ldr r3, [pc, #284] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
80038b4: 681b ldr r3, [r3, #0]
80038b6: f403 3300 and.w r3, r3, #131072 @ 0x20000
80038ba: 2b00 cmp r3, #0
80038bc: d115 bne.n 80038ea <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80038be: 2301 movs r3, #1
80038c0: e07f b.n 80039c2 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
80038c2: 687b ldr r3, [r7, #4]
80038c4: 685b ldr r3, [r3, #4]
80038c6: 2b02 cmp r3, #2
80038c8: d107 bne.n 80038da <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80038ca: 4b41 ldr r3, [pc, #260] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
80038cc: 681b ldr r3, [r3, #0]
80038ce: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80038d2: 2b00 cmp r3, #0
80038d4: d109 bne.n 80038ea <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80038d6: 2301 movs r3, #1
80038d8: e073 b.n 80039c2 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80038da: 4b3d ldr r3, [pc, #244] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
80038dc: 681b ldr r3, [r3, #0]
80038de: f003 0302 and.w r3, r3, #2
80038e2: 2b00 cmp r3, #0
80038e4: d101 bne.n 80038ea <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80038e6: 2301 movs r3, #1
80038e8: e06b b.n 80039c2 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
80038ea: 4b39 ldr r3, [pc, #228] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
80038ec: 685b ldr r3, [r3, #4]
80038ee: f023 0203 bic.w r2, r3, #3
80038f2: 687b ldr r3, [r7, #4]
80038f4: 685b ldr r3, [r3, #4]
80038f6: 4936 ldr r1, [pc, #216] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
80038f8: 4313 orrs r3, r2
80038fa: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
80038fc: f7fd fabe bl 8000e7c <HAL_GetTick>
8003900: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8003902: e00a b.n 800391a <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8003904: f7fd faba bl 8000e7c <HAL_GetTick>
8003908: 4602 mov r2, r0
800390a: 68fb ldr r3, [r7, #12]
800390c: 1ad3 subs r3, r2, r3
800390e: f241 3288 movw r2, #5000 @ 0x1388
8003912: 4293 cmp r3, r2
8003914: d901 bls.n 800391a <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8003916: 2303 movs r3, #3
8003918: e053 b.n 80039c2 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800391a: 4b2d ldr r3, [pc, #180] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
800391c: 685b ldr r3, [r3, #4]
800391e: f003 020c and.w r2, r3, #12
8003922: 687b ldr r3, [r7, #4]
8003924: 685b ldr r3, [r3, #4]
8003926: 009b lsls r3, r3, #2
8003928: 429a cmp r2, r3
800392a: d1eb bne.n 8003904 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
800392c: 4b27 ldr r3, [pc, #156] @ (80039cc <HAL_RCC_ClockConfig+0x1c0>)
800392e: 681b ldr r3, [r3, #0]
8003930: f003 0307 and.w r3, r3, #7
8003934: 683a ldr r2, [r7, #0]
8003936: 429a cmp r2, r3
8003938: d210 bcs.n 800395c <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800393a: 4b24 ldr r3, [pc, #144] @ (80039cc <HAL_RCC_ClockConfig+0x1c0>)
800393c: 681b ldr r3, [r3, #0]
800393e: f023 0207 bic.w r2, r3, #7
8003942: 4922 ldr r1, [pc, #136] @ (80039cc <HAL_RCC_ClockConfig+0x1c0>)
8003944: 683b ldr r3, [r7, #0]
8003946: 4313 orrs r3, r2
8003948: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
800394a: 4b20 ldr r3, [pc, #128] @ (80039cc <HAL_RCC_ClockConfig+0x1c0>)
800394c: 681b ldr r3, [r3, #0]
800394e: f003 0307 and.w r3, r3, #7
8003952: 683a ldr r2, [r7, #0]
8003954: 429a cmp r2, r3
8003956: d001 beq.n 800395c <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8003958: 2301 movs r3, #1
800395a: e032 b.n 80039c2 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800395c: 687b ldr r3, [r7, #4]
800395e: 681b ldr r3, [r3, #0]
8003960: f003 0304 and.w r3, r3, #4
8003964: 2b00 cmp r3, #0
8003966: d008 beq.n 800397a <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8003968: 4b19 ldr r3, [pc, #100] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
800396a: 685b ldr r3, [r3, #4]
800396c: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8003970: 687b ldr r3, [r7, #4]
8003972: 68db ldr r3, [r3, #12]
8003974: 4916 ldr r1, [pc, #88] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
8003976: 4313 orrs r3, r2
8003978: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800397a: 687b ldr r3, [r7, #4]
800397c: 681b ldr r3, [r3, #0]
800397e: f003 0308 and.w r3, r3, #8
8003982: 2b00 cmp r3, #0
8003984: d009 beq.n 800399a <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8003986: 4b12 ldr r3, [pc, #72] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
8003988: 685b ldr r3, [r3, #4]
800398a: f423 5260 bic.w r2, r3, #14336 @ 0x3800
800398e: 687b ldr r3, [r7, #4]
8003990: 691b ldr r3, [r3, #16]
8003992: 00db lsls r3, r3, #3
8003994: 490e ldr r1, [pc, #56] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
8003996: 4313 orrs r3, r2
8003998: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
800399a: f000 f821 bl 80039e0 <HAL_RCC_GetSysClockFreq>
800399e: 4602 mov r2, r0
80039a0: 4b0b ldr r3, [pc, #44] @ (80039d0 <HAL_RCC_ClockConfig+0x1c4>)
80039a2: 685b ldr r3, [r3, #4]
80039a4: 091b lsrs r3, r3, #4
80039a6: f003 030f and.w r3, r3, #15
80039aa: 490a ldr r1, [pc, #40] @ (80039d4 <HAL_RCC_ClockConfig+0x1c8>)
80039ac: 5ccb ldrb r3, [r1, r3]
80039ae: fa22 f303 lsr.w r3, r2, r3
80039b2: 4a09 ldr r2, [pc, #36] @ (80039d8 <HAL_RCC_ClockConfig+0x1cc>)
80039b4: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
80039b6: 4b09 ldr r3, [pc, #36] @ (80039dc <HAL_RCC_ClockConfig+0x1d0>)
80039b8: 681b ldr r3, [r3, #0]
80039ba: 4618 mov r0, r3
80039bc: f7fd fa1c bl 8000df8 <HAL_InitTick>
return HAL_OK;
80039c0: 2300 movs r3, #0
}
80039c2: 4618 mov r0, r3
80039c4: 3710 adds r7, #16
80039c6: 46bd mov sp, r7
80039c8: bd80 pop {r7, pc}
80039ca: bf00 nop
80039cc: 40022000 .word 0x40022000
80039d0: 40021000 .word 0x40021000
80039d4: 08009aa0 .word 0x08009aa0
80039d8: 20000000 .word 0x20000000
80039dc: 20000004 .word 0x20000004
080039e0 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
80039e0: b480 push {r7}
80039e2: b087 sub sp, #28
80039e4: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
80039e6: 2300 movs r3, #0
80039e8: 60fb str r3, [r7, #12]
80039ea: 2300 movs r3, #0
80039ec: 60bb str r3, [r7, #8]
80039ee: 2300 movs r3, #0
80039f0: 617b str r3, [r7, #20]
80039f2: 2300 movs r3, #0
80039f4: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
80039f6: 2300 movs r3, #0
80039f8: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
80039fa: 4b1e ldr r3, [pc, #120] @ (8003a74 <HAL_RCC_GetSysClockFreq+0x94>)
80039fc: 685b ldr r3, [r3, #4]
80039fe: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8003a00: 68fb ldr r3, [r7, #12]
8003a02: f003 030c and.w r3, r3, #12
8003a06: 2b04 cmp r3, #4
8003a08: d002 beq.n 8003a10 <HAL_RCC_GetSysClockFreq+0x30>
8003a0a: 2b08 cmp r3, #8
8003a0c: d003 beq.n 8003a16 <HAL_RCC_GetSysClockFreq+0x36>
8003a0e: e027 b.n 8003a60 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8003a10: 4b19 ldr r3, [pc, #100] @ (8003a78 <HAL_RCC_GetSysClockFreq+0x98>)
8003a12: 613b str r3, [r7, #16]
break;
8003a14: e027 b.n 8003a66 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
8003a16: 68fb ldr r3, [r7, #12]
8003a18: 0c9b lsrs r3, r3, #18
8003a1a: f003 030f and.w r3, r3, #15
8003a1e: 4a17 ldr r2, [pc, #92] @ (8003a7c <HAL_RCC_GetSysClockFreq+0x9c>)
8003a20: 5cd3 ldrb r3, [r2, r3]
8003a22: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
8003a24: 68fb ldr r3, [r7, #12]
8003a26: f403 3380 and.w r3, r3, #65536 @ 0x10000
8003a2a: 2b00 cmp r3, #0
8003a2c: d010 beq.n 8003a50 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
8003a2e: 4b11 ldr r3, [pc, #68] @ (8003a74 <HAL_RCC_GetSysClockFreq+0x94>)
8003a30: 685b ldr r3, [r3, #4]
8003a32: 0c5b lsrs r3, r3, #17
8003a34: f003 0301 and.w r3, r3, #1
8003a38: 4a11 ldr r2, [pc, #68] @ (8003a80 <HAL_RCC_GetSysClockFreq+0xa0>)
8003a3a: 5cd3 ldrb r3, [r2, r3]
8003a3c: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
8003a3e: 687b ldr r3, [r7, #4]
8003a40: 4a0d ldr r2, [pc, #52] @ (8003a78 <HAL_RCC_GetSysClockFreq+0x98>)
8003a42: fb03 f202 mul.w r2, r3, r2
8003a46: 68bb ldr r3, [r7, #8]
8003a48: fbb2 f3f3 udiv r3, r2, r3
8003a4c: 617b str r3, [r7, #20]
8003a4e: e004 b.n 8003a5a <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8003a50: 687b ldr r3, [r7, #4]
8003a52: 4a0c ldr r2, [pc, #48] @ (8003a84 <HAL_RCC_GetSysClockFreq+0xa4>)
8003a54: fb02 f303 mul.w r3, r2, r3
8003a58: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8003a5a: 697b ldr r3, [r7, #20]
8003a5c: 613b str r3, [r7, #16]
break;
8003a5e: e002 b.n 8003a66 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8003a60: 4b05 ldr r3, [pc, #20] @ (8003a78 <HAL_RCC_GetSysClockFreq+0x98>)
8003a62: 613b str r3, [r7, #16]
break;
8003a64: bf00 nop
}
}
return sysclockfreq;
8003a66: 693b ldr r3, [r7, #16]
}
8003a68: 4618 mov r0, r3
8003a6a: 371c adds r7, #28
8003a6c: 46bd mov sp, r7
8003a6e: bc80 pop {r7}
8003a70: 4770 bx lr
8003a72: bf00 nop
8003a74: 40021000 .word 0x40021000
8003a78: 007a1200 .word 0x007a1200
8003a7c: 08009ab0 .word 0x08009ab0
8003a80: 08009ac0 .word 0x08009ac0
8003a84: 003d0900 .word 0x003d0900
08003a88 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8003a88: b480 push {r7}
8003a8a: b085 sub sp, #20
8003a8c: af00 add r7, sp, #0
8003a8e: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8003a90: 4b0a ldr r3, [pc, #40] @ (8003abc <RCC_Delay+0x34>)
8003a92: 681b ldr r3, [r3, #0]
8003a94: 4a0a ldr r2, [pc, #40] @ (8003ac0 <RCC_Delay+0x38>)
8003a96: fba2 2303 umull r2, r3, r2, r3
8003a9a: 0a5b lsrs r3, r3, #9
8003a9c: 687a ldr r2, [r7, #4]
8003a9e: fb02 f303 mul.w r3, r2, r3
8003aa2: 60fb str r3, [r7, #12]
do
{
__NOP();
8003aa4: bf00 nop
}
while (Delay --);
8003aa6: 68fb ldr r3, [r7, #12]
8003aa8: 1e5a subs r2, r3, #1
8003aaa: 60fa str r2, [r7, #12]
8003aac: 2b00 cmp r3, #0
8003aae: d1f9 bne.n 8003aa4 <RCC_Delay+0x1c>
}
8003ab0: bf00 nop
8003ab2: bf00 nop
8003ab4: 3714 adds r7, #20
8003ab6: 46bd mov sp, r7
8003ab8: bc80 pop {r7}
8003aba: 4770 bx lr
8003abc: 20000000 .word 0x20000000
8003ac0: 10624dd3 .word 0x10624dd3
08003ac4 <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8003ac4: b580 push {r7, lr}
8003ac6: b086 sub sp, #24
8003ac8: af00 add r7, sp, #0
8003aca: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8003acc: 2300 movs r3, #0
8003ace: 613b str r3, [r7, #16]
8003ad0: 2300 movs r3, #0
8003ad2: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8003ad4: 687b ldr r3, [r7, #4]
8003ad6: 681b ldr r3, [r3, #0]
8003ad8: f003 0301 and.w r3, r3, #1
8003adc: 2b00 cmp r3, #0
8003ade: d07d beq.n 8003bdc <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
8003ae0: 2300 movs r3, #0
8003ae2: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8003ae4: 4b4f ldr r3, [pc, #316] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003ae6: 69db ldr r3, [r3, #28]
8003ae8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8003aec: 2b00 cmp r3, #0
8003aee: d10d bne.n 8003b0c <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8003af0: 4b4c ldr r3, [pc, #304] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003af2: 69db ldr r3, [r3, #28]
8003af4: 4a4b ldr r2, [pc, #300] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003af6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8003afa: 61d3 str r3, [r2, #28]
8003afc: 4b49 ldr r3, [pc, #292] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003afe: 69db ldr r3, [r3, #28]
8003b00: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8003b04: 60bb str r3, [r7, #8]
8003b06: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8003b08: 2301 movs r3, #1
8003b0a: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003b0c: 4b46 ldr r3, [pc, #280] @ (8003c28 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003b0e: 681b ldr r3, [r3, #0]
8003b10: f403 7380 and.w r3, r3, #256 @ 0x100
8003b14: 2b00 cmp r3, #0
8003b16: d118 bne.n 8003b4a <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8003b18: 4b43 ldr r3, [pc, #268] @ (8003c28 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003b1a: 681b ldr r3, [r3, #0]
8003b1c: 4a42 ldr r2, [pc, #264] @ (8003c28 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003b1e: f443 7380 orr.w r3, r3, #256 @ 0x100
8003b22: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8003b24: f7fd f9aa bl 8000e7c <HAL_GetTick>
8003b28: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003b2a: e008 b.n 8003b3e <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8003b2c: f7fd f9a6 bl 8000e7c <HAL_GetTick>
8003b30: 4602 mov r2, r0
8003b32: 693b ldr r3, [r7, #16]
8003b34: 1ad3 subs r3, r2, r3
8003b36: 2b64 cmp r3, #100 @ 0x64
8003b38: d901 bls.n 8003b3e <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8003b3a: 2303 movs r3, #3
8003b3c: e06d b.n 8003c1a <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003b3e: 4b3a ldr r3, [pc, #232] @ (8003c28 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003b40: 681b ldr r3, [r3, #0]
8003b42: f403 7380 and.w r3, r3, #256 @ 0x100
8003b46: 2b00 cmp r3, #0
8003b48: d0f0 beq.n 8003b2c <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8003b4a: 4b36 ldr r3, [pc, #216] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b4c: 6a1b ldr r3, [r3, #32]
8003b4e: f403 7340 and.w r3, r3, #768 @ 0x300
8003b52: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8003b54: 68fb ldr r3, [r7, #12]
8003b56: 2b00 cmp r3, #0
8003b58: d02e beq.n 8003bb8 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8003b5a: 687b ldr r3, [r7, #4]
8003b5c: 685b ldr r3, [r3, #4]
8003b5e: f403 7340 and.w r3, r3, #768 @ 0x300
8003b62: 68fa ldr r2, [r7, #12]
8003b64: 429a cmp r2, r3
8003b66: d027 beq.n 8003bb8 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8003b68: 4b2e ldr r3, [pc, #184] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b6a: 6a1b ldr r3, [r3, #32]
8003b6c: f423 7340 bic.w r3, r3, #768 @ 0x300
8003b70: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8003b72: 4b2e ldr r3, [pc, #184] @ (8003c2c <HAL_RCCEx_PeriphCLKConfig+0x168>)
8003b74: 2201 movs r2, #1
8003b76: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8003b78: 4b2c ldr r3, [pc, #176] @ (8003c2c <HAL_RCCEx_PeriphCLKConfig+0x168>)
8003b7a: 2200 movs r2, #0
8003b7c: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8003b7e: 4a29 ldr r2, [pc, #164] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b80: 68fb ldr r3, [r7, #12]
8003b82: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8003b84: 68fb ldr r3, [r7, #12]
8003b86: f003 0301 and.w r3, r3, #1
8003b8a: 2b00 cmp r3, #0
8003b8c: d014 beq.n 8003bb8 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003b8e: f7fd f975 bl 8000e7c <HAL_GetTick>
8003b92: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003b94: e00a b.n 8003bac <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8003b96: f7fd f971 bl 8000e7c <HAL_GetTick>
8003b9a: 4602 mov r2, r0
8003b9c: 693b ldr r3, [r7, #16]
8003b9e: 1ad3 subs r3, r2, r3
8003ba0: f241 3288 movw r2, #5000 @ 0x1388
8003ba4: 4293 cmp r3, r2
8003ba6: d901 bls.n 8003bac <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8003ba8: 2303 movs r3, #3
8003baa: e036 b.n 8003c1a <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003bac: 4b1d ldr r3, [pc, #116] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bae: 6a1b ldr r3, [r3, #32]
8003bb0: f003 0302 and.w r3, r3, #2
8003bb4: 2b00 cmp r3, #0
8003bb6: d0ee beq.n 8003b96 <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8003bb8: 4b1a ldr r3, [pc, #104] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bba: 6a1b ldr r3, [r3, #32]
8003bbc: f423 7240 bic.w r2, r3, #768 @ 0x300
8003bc0: 687b ldr r3, [r7, #4]
8003bc2: 685b ldr r3, [r3, #4]
8003bc4: 4917 ldr r1, [pc, #92] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bc6: 4313 orrs r3, r2
8003bc8: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8003bca: 7dfb ldrb r3, [r7, #23]
8003bcc: 2b01 cmp r3, #1
8003bce: d105 bne.n 8003bdc <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8003bd0: 4b14 ldr r3, [pc, #80] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bd2: 69db ldr r3, [r3, #28]
8003bd4: 4a13 ldr r2, [pc, #76] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bd6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8003bda: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8003bdc: 687b ldr r3, [r7, #4]
8003bde: 681b ldr r3, [r3, #0]
8003be0: f003 0302 and.w r3, r3, #2
8003be4: 2b00 cmp r3, #0
8003be6: d008 beq.n 8003bfa <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8003be8: 4b0e ldr r3, [pc, #56] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bea: 685b ldr r3, [r3, #4]
8003bec: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8003bf0: 687b ldr r3, [r7, #4]
8003bf2: 689b ldr r3, [r3, #8]
8003bf4: 490b ldr r1, [pc, #44] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bf6: 4313 orrs r3, r2
8003bf8: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8003bfa: 687b ldr r3, [r7, #4]
8003bfc: 681b ldr r3, [r3, #0]
8003bfe: f003 0310 and.w r3, r3, #16
8003c02: 2b00 cmp r3, #0
8003c04: d008 beq.n 8003c18 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8003c06: 4b07 ldr r3, [pc, #28] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003c08: 685b ldr r3, [r3, #4]
8003c0a: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8003c0e: 687b ldr r3, [r7, #4]
8003c10: 68db ldr r3, [r3, #12]
8003c12: 4904 ldr r1, [pc, #16] @ (8003c24 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003c14: 4313 orrs r3, r2
8003c16: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8003c18: 2300 movs r3, #0
}
8003c1a: 4618 mov r0, r3
8003c1c: 3718 adds r7, #24
8003c1e: 46bd mov sp, r7
8003c20: bd80 pop {r7, pc}
8003c22: bf00 nop
8003c24: 40021000 .word 0x40021000
8003c28: 40007000 .word 0x40007000
8003c2c: 42420440 .word 0x42420440
08003c30 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8003c30: b580 push {r7, lr}
8003c32: b082 sub sp, #8
8003c34: af00 add r7, sp, #0
8003c36: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8003c38: 687b ldr r3, [r7, #4]
8003c3a: 2b00 cmp r3, #0
8003c3c: d101 bne.n 8003c42 <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8003c3e: 2301 movs r3, #1
8003c40: e041 b.n 8003cc6 <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8003c42: 687b ldr r3, [r7, #4]
8003c44: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8003c48: b2db uxtb r3, r3
8003c4a: 2b00 cmp r3, #0
8003c4c: d106 bne.n 8003c5c <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8003c4e: 687b ldr r3, [r7, #4]
8003c50: 2200 movs r2, #0
8003c52: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8003c56: 6878 ldr r0, [r7, #4]
8003c58: f7fc ff1a bl 8000a90 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8003c5c: 687b ldr r3, [r7, #4]
8003c5e: 2202 movs r2, #2
8003c60: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8003c64: 687b ldr r3, [r7, #4]
8003c66: 681a ldr r2, [r3, #0]
8003c68: 687b ldr r3, [r7, #4]
8003c6a: 3304 adds r3, #4
8003c6c: 4619 mov r1, r3
8003c6e: 4610 mov r0, r2
8003c70: f000 fab2 bl 80041d8 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8003c74: 687b ldr r3, [r7, #4]
8003c76: 2201 movs r2, #1
8003c78: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003c7c: 687b ldr r3, [r7, #4]
8003c7e: 2201 movs r2, #1
8003c80: f883 203e strb.w r2, [r3, #62] @ 0x3e
8003c84: 687b ldr r3, [r7, #4]
8003c86: 2201 movs r2, #1
8003c88: f883 203f strb.w r2, [r3, #63] @ 0x3f
8003c8c: 687b ldr r3, [r7, #4]
8003c8e: 2201 movs r2, #1
8003c90: f883 2040 strb.w r2, [r3, #64] @ 0x40
8003c94: 687b ldr r3, [r7, #4]
8003c96: 2201 movs r2, #1
8003c98: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003c9c: 687b ldr r3, [r7, #4]
8003c9e: 2201 movs r2, #1
8003ca0: f883 2042 strb.w r2, [r3, #66] @ 0x42
8003ca4: 687b ldr r3, [r7, #4]
8003ca6: 2201 movs r2, #1
8003ca8: f883 2043 strb.w r2, [r3, #67] @ 0x43
8003cac: 687b ldr r3, [r7, #4]
8003cae: 2201 movs r2, #1
8003cb0: f883 2044 strb.w r2, [r3, #68] @ 0x44
8003cb4: 687b ldr r3, [r7, #4]
8003cb6: 2201 movs r2, #1
8003cb8: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8003cbc: 687b ldr r3, [r7, #4]
8003cbe: 2201 movs r2, #1
8003cc0: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8003cc4: 2300 movs r3, #0
}
8003cc6: 4618 mov r0, r3
8003cc8: 3708 adds r7, #8
8003cca: 46bd mov sp, r7
8003ccc: bd80 pop {r7, pc}
08003cce <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8003cce: b580 push {r7, lr}
8003cd0: b082 sub sp, #8
8003cd2: af00 add r7, sp, #0
8003cd4: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8003cd6: 687b ldr r3, [r7, #4]
8003cd8: 2b00 cmp r3, #0
8003cda: d101 bne.n 8003ce0 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8003cdc: 2301 movs r3, #1
8003cde: e041 b.n 8003d64 <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8003ce0: 687b ldr r3, [r7, #4]
8003ce2: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8003ce6: b2db uxtb r3, r3
8003ce8: 2b00 cmp r3, #0
8003cea: d106 bne.n 8003cfa <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8003cec: 687b ldr r3, [r7, #4]
8003cee: 2200 movs r2, #0
8003cf0: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8003cf4: 6878 ldr r0, [r7, #4]
8003cf6: f000 f839 bl 8003d6c <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8003cfa: 687b ldr r3, [r7, #4]
8003cfc: 2202 movs r2, #2
8003cfe: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8003d02: 687b ldr r3, [r7, #4]
8003d04: 681a ldr r2, [r3, #0]
8003d06: 687b ldr r3, [r7, #4]
8003d08: 3304 adds r3, #4
8003d0a: 4619 mov r1, r3
8003d0c: 4610 mov r0, r2
8003d0e: f000 fa63 bl 80041d8 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8003d12: 687b ldr r3, [r7, #4]
8003d14: 2201 movs r2, #1
8003d16: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003d1a: 687b ldr r3, [r7, #4]
8003d1c: 2201 movs r2, #1
8003d1e: f883 203e strb.w r2, [r3, #62] @ 0x3e
8003d22: 687b ldr r3, [r7, #4]
8003d24: 2201 movs r2, #1
8003d26: f883 203f strb.w r2, [r3, #63] @ 0x3f
8003d2a: 687b ldr r3, [r7, #4]
8003d2c: 2201 movs r2, #1
8003d2e: f883 2040 strb.w r2, [r3, #64] @ 0x40
8003d32: 687b ldr r3, [r7, #4]
8003d34: 2201 movs r2, #1
8003d36: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003d3a: 687b ldr r3, [r7, #4]
8003d3c: 2201 movs r2, #1
8003d3e: f883 2042 strb.w r2, [r3, #66] @ 0x42
8003d42: 687b ldr r3, [r7, #4]
8003d44: 2201 movs r2, #1
8003d46: f883 2043 strb.w r2, [r3, #67] @ 0x43
8003d4a: 687b ldr r3, [r7, #4]
8003d4c: 2201 movs r2, #1
8003d4e: f883 2044 strb.w r2, [r3, #68] @ 0x44
8003d52: 687b ldr r3, [r7, #4]
8003d54: 2201 movs r2, #1
8003d56: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8003d5a: 687b ldr r3, [r7, #4]
8003d5c: 2201 movs r2, #1
8003d5e: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8003d62: 2300 movs r3, #0
}
8003d64: 4618 mov r0, r3
8003d66: 3708 adds r7, #8
8003d68: 46bd mov sp, r7
8003d6a: bd80 pop {r7, pc}
08003d6c <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8003d6c: b480 push {r7}
8003d6e: b083 sub sp, #12
8003d70: af00 add r7, sp, #0
8003d72: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8003d74: bf00 nop
8003d76: 370c adds r7, #12
8003d78: 46bd mov sp, r7
8003d7a: bc80 pop {r7}
8003d7c: 4770 bx lr
...
08003d80 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8003d80: b580 push {r7, lr}
8003d82: b084 sub sp, #16
8003d84: af00 add r7, sp, #0
8003d86: 6078 str r0, [r7, #4]
8003d88: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8003d8a: 683b ldr r3, [r7, #0]
8003d8c: 2b00 cmp r3, #0
8003d8e: d109 bne.n 8003da4 <HAL_TIM_PWM_Start+0x24>
8003d90: 687b ldr r3, [r7, #4]
8003d92: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8003d96: b2db uxtb r3, r3
8003d98: 2b01 cmp r3, #1
8003d9a: bf14 ite ne
8003d9c: 2301 movne r3, #1
8003d9e: 2300 moveq r3, #0
8003da0: b2db uxtb r3, r3
8003da2: e022 b.n 8003dea <HAL_TIM_PWM_Start+0x6a>
8003da4: 683b ldr r3, [r7, #0]
8003da6: 2b04 cmp r3, #4
8003da8: d109 bne.n 8003dbe <HAL_TIM_PWM_Start+0x3e>
8003daa: 687b ldr r3, [r7, #4]
8003dac: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8003db0: b2db uxtb r3, r3
8003db2: 2b01 cmp r3, #1
8003db4: bf14 ite ne
8003db6: 2301 movne r3, #1
8003db8: 2300 moveq r3, #0
8003dba: b2db uxtb r3, r3
8003dbc: e015 b.n 8003dea <HAL_TIM_PWM_Start+0x6a>
8003dbe: 683b ldr r3, [r7, #0]
8003dc0: 2b08 cmp r3, #8
8003dc2: d109 bne.n 8003dd8 <HAL_TIM_PWM_Start+0x58>
8003dc4: 687b ldr r3, [r7, #4]
8003dc6: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8003dca: b2db uxtb r3, r3
8003dcc: 2b01 cmp r3, #1
8003dce: bf14 ite ne
8003dd0: 2301 movne r3, #1
8003dd2: 2300 moveq r3, #0
8003dd4: b2db uxtb r3, r3
8003dd6: e008 b.n 8003dea <HAL_TIM_PWM_Start+0x6a>
8003dd8: 687b ldr r3, [r7, #4]
8003dda: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8003dde: b2db uxtb r3, r3
8003de0: 2b01 cmp r3, #1
8003de2: bf14 ite ne
8003de4: 2301 movne r3, #1
8003de6: 2300 moveq r3, #0
8003de8: b2db uxtb r3, r3
8003dea: 2b00 cmp r3, #0
8003dec: d001 beq.n 8003df2 <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
8003dee: 2301 movs r3, #1
8003df0: e05e b.n 8003eb0 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
8003df2: 683b ldr r3, [r7, #0]
8003df4: 2b00 cmp r3, #0
8003df6: d104 bne.n 8003e02 <HAL_TIM_PWM_Start+0x82>
8003df8: 687b ldr r3, [r7, #4]
8003dfa: 2202 movs r2, #2
8003dfc: f883 203e strb.w r2, [r3, #62] @ 0x3e
8003e00: e013 b.n 8003e2a <HAL_TIM_PWM_Start+0xaa>
8003e02: 683b ldr r3, [r7, #0]
8003e04: 2b04 cmp r3, #4
8003e06: d104 bne.n 8003e12 <HAL_TIM_PWM_Start+0x92>
8003e08: 687b ldr r3, [r7, #4]
8003e0a: 2202 movs r2, #2
8003e0c: f883 203f strb.w r2, [r3, #63] @ 0x3f
8003e10: e00b b.n 8003e2a <HAL_TIM_PWM_Start+0xaa>
8003e12: 683b ldr r3, [r7, #0]
8003e14: 2b08 cmp r3, #8
8003e16: d104 bne.n 8003e22 <HAL_TIM_PWM_Start+0xa2>
8003e18: 687b ldr r3, [r7, #4]
8003e1a: 2202 movs r2, #2
8003e1c: f883 2040 strb.w r2, [r3, #64] @ 0x40
8003e20: e003 b.n 8003e2a <HAL_TIM_PWM_Start+0xaa>
8003e22: 687b ldr r3, [r7, #4]
8003e24: 2202 movs r2, #2
8003e26: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
8003e2a: 687b ldr r3, [r7, #4]
8003e2c: 681b ldr r3, [r3, #0]
8003e2e: 2201 movs r2, #1
8003e30: 6839 ldr r1, [r7, #0]
8003e32: 4618 mov r0, r3
8003e34: f000 fc5c bl 80046f0 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8003e38: 687b ldr r3, [r7, #4]
8003e3a: 681b ldr r3, [r3, #0]
8003e3c: 4a1e ldr r2, [pc, #120] @ (8003eb8 <HAL_TIM_PWM_Start+0x138>)
8003e3e: 4293 cmp r3, r2
8003e40: d107 bne.n 8003e52 <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
8003e42: 687b ldr r3, [r7, #4]
8003e44: 681b ldr r3, [r3, #0]
8003e46: 6c5a ldr r2, [r3, #68] @ 0x44
8003e48: 687b ldr r3, [r7, #4]
8003e4a: 681b ldr r3, [r3, #0]
8003e4c: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8003e50: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8003e52: 687b ldr r3, [r7, #4]
8003e54: 681b ldr r3, [r3, #0]
8003e56: 4a18 ldr r2, [pc, #96] @ (8003eb8 <HAL_TIM_PWM_Start+0x138>)
8003e58: 4293 cmp r3, r2
8003e5a: d00e beq.n 8003e7a <HAL_TIM_PWM_Start+0xfa>
8003e5c: 687b ldr r3, [r7, #4]
8003e5e: 681b ldr r3, [r3, #0]
8003e60: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8003e64: d009 beq.n 8003e7a <HAL_TIM_PWM_Start+0xfa>
8003e66: 687b ldr r3, [r7, #4]
8003e68: 681b ldr r3, [r3, #0]
8003e6a: 4a14 ldr r2, [pc, #80] @ (8003ebc <HAL_TIM_PWM_Start+0x13c>)
8003e6c: 4293 cmp r3, r2
8003e6e: d004 beq.n 8003e7a <HAL_TIM_PWM_Start+0xfa>
8003e70: 687b ldr r3, [r7, #4]
8003e72: 681b ldr r3, [r3, #0]
8003e74: 4a12 ldr r2, [pc, #72] @ (8003ec0 <HAL_TIM_PWM_Start+0x140>)
8003e76: 4293 cmp r3, r2
8003e78: d111 bne.n 8003e9e <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8003e7a: 687b ldr r3, [r7, #4]
8003e7c: 681b ldr r3, [r3, #0]
8003e7e: 689b ldr r3, [r3, #8]
8003e80: f003 0307 and.w r3, r3, #7
8003e84: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8003e86: 68fb ldr r3, [r7, #12]
8003e88: 2b06 cmp r3, #6
8003e8a: d010 beq.n 8003eae <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8003e8c: 687b ldr r3, [r7, #4]
8003e8e: 681b ldr r3, [r3, #0]
8003e90: 681a ldr r2, [r3, #0]
8003e92: 687b ldr r3, [r7, #4]
8003e94: 681b ldr r3, [r3, #0]
8003e96: f042 0201 orr.w r2, r2, #1
8003e9a: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8003e9c: e007 b.n 8003eae <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8003e9e: 687b ldr r3, [r7, #4]
8003ea0: 681b ldr r3, [r3, #0]
8003ea2: 681a ldr r2, [r3, #0]
8003ea4: 687b ldr r3, [r7, #4]
8003ea6: 681b ldr r3, [r3, #0]
8003ea8: f042 0201 orr.w r2, r2, #1
8003eac: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8003eae: 2300 movs r3, #0
}
8003eb0: 4618 mov r0, r3
8003eb2: 3710 adds r7, #16
8003eb4: 46bd mov sp, r7
8003eb6: bd80 pop {r7, pc}
8003eb8: 40012c00 .word 0x40012c00
8003ebc: 40000400 .word 0x40000400
8003ec0: 40000800 .word 0x40000800
08003ec4 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8003ec4: b580 push {r7, lr}
8003ec6: b086 sub sp, #24
8003ec8: af00 add r7, sp, #0
8003eca: 60f8 str r0, [r7, #12]
8003ecc: 60b9 str r1, [r7, #8]
8003ece: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8003ed0: 2300 movs r3, #0
8003ed2: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8003ed4: 68fb ldr r3, [r7, #12]
8003ed6: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8003eda: 2b01 cmp r3, #1
8003edc: d101 bne.n 8003ee2 <HAL_TIM_PWM_ConfigChannel+0x1e>
8003ede: 2302 movs r3, #2
8003ee0: e0ae b.n 8004040 <HAL_TIM_PWM_ConfigChannel+0x17c>
8003ee2: 68fb ldr r3, [r7, #12]
8003ee4: 2201 movs r2, #1
8003ee6: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
8003eea: 687b ldr r3, [r7, #4]
8003eec: 2b0c cmp r3, #12
8003eee: f200 809f bhi.w 8004030 <HAL_TIM_PWM_ConfigChannel+0x16c>
8003ef2: a201 add r2, pc, #4 @ (adr r2, 8003ef8 <HAL_TIM_PWM_ConfigChannel+0x34>)
8003ef4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003ef8: 08003f2d .word 0x08003f2d
8003efc: 08004031 .word 0x08004031
8003f00: 08004031 .word 0x08004031
8003f04: 08004031 .word 0x08004031
8003f08: 08003f6d .word 0x08003f6d
8003f0c: 08004031 .word 0x08004031
8003f10: 08004031 .word 0x08004031
8003f14: 08004031 .word 0x08004031
8003f18: 08003faf .word 0x08003faf
8003f1c: 08004031 .word 0x08004031
8003f20: 08004031 .word 0x08004031
8003f24: 08004031 .word 0x08004031
8003f28: 08003fef .word 0x08003fef
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
8003f2c: 68fb ldr r3, [r7, #12]
8003f2e: 681b ldr r3, [r3, #0]
8003f30: 68b9 ldr r1, [r7, #8]
8003f32: 4618 mov r0, r3
8003f34: f000 f9be bl 80042b4 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
8003f38: 68fb ldr r3, [r7, #12]
8003f3a: 681b ldr r3, [r3, #0]
8003f3c: 699a ldr r2, [r3, #24]
8003f3e: 68fb ldr r3, [r7, #12]
8003f40: 681b ldr r3, [r3, #0]
8003f42: f042 0208 orr.w r2, r2, #8
8003f46: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
8003f48: 68fb ldr r3, [r7, #12]
8003f4a: 681b ldr r3, [r3, #0]
8003f4c: 699a ldr r2, [r3, #24]
8003f4e: 68fb ldr r3, [r7, #12]
8003f50: 681b ldr r3, [r3, #0]
8003f52: f022 0204 bic.w r2, r2, #4
8003f56: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
8003f58: 68fb ldr r3, [r7, #12]
8003f5a: 681b ldr r3, [r3, #0]
8003f5c: 6999 ldr r1, [r3, #24]
8003f5e: 68bb ldr r3, [r7, #8]
8003f60: 691a ldr r2, [r3, #16]
8003f62: 68fb ldr r3, [r7, #12]
8003f64: 681b ldr r3, [r3, #0]
8003f66: 430a orrs r2, r1
8003f68: 619a str r2, [r3, #24]
break;
8003f6a: e064 b.n 8004036 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8003f6c: 68fb ldr r3, [r7, #12]
8003f6e: 681b ldr r3, [r3, #0]
8003f70: 68b9 ldr r1, [r7, #8]
8003f72: 4618 mov r0, r3
8003f74: f000 fa04 bl 8004380 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8003f78: 68fb ldr r3, [r7, #12]
8003f7a: 681b ldr r3, [r3, #0]
8003f7c: 699a ldr r2, [r3, #24]
8003f7e: 68fb ldr r3, [r7, #12]
8003f80: 681b ldr r3, [r3, #0]
8003f82: f442 6200 orr.w r2, r2, #2048 @ 0x800
8003f86: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8003f88: 68fb ldr r3, [r7, #12]
8003f8a: 681b ldr r3, [r3, #0]
8003f8c: 699a ldr r2, [r3, #24]
8003f8e: 68fb ldr r3, [r7, #12]
8003f90: 681b ldr r3, [r3, #0]
8003f92: f422 6280 bic.w r2, r2, #1024 @ 0x400
8003f96: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8003f98: 68fb ldr r3, [r7, #12]
8003f9a: 681b ldr r3, [r3, #0]
8003f9c: 6999 ldr r1, [r3, #24]
8003f9e: 68bb ldr r3, [r7, #8]
8003fa0: 691b ldr r3, [r3, #16]
8003fa2: 021a lsls r2, r3, #8
8003fa4: 68fb ldr r3, [r7, #12]
8003fa6: 681b ldr r3, [r3, #0]
8003fa8: 430a orrs r2, r1
8003faa: 619a str r2, [r3, #24]
break;
8003fac: e043 b.n 8004036 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8003fae: 68fb ldr r3, [r7, #12]
8003fb0: 681b ldr r3, [r3, #0]
8003fb2: 68b9 ldr r1, [r7, #8]
8003fb4: 4618 mov r0, r3
8003fb6: f000 fa4d bl 8004454 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
8003fba: 68fb ldr r3, [r7, #12]
8003fbc: 681b ldr r3, [r3, #0]
8003fbe: 69da ldr r2, [r3, #28]
8003fc0: 68fb ldr r3, [r7, #12]
8003fc2: 681b ldr r3, [r3, #0]
8003fc4: f042 0208 orr.w r2, r2, #8
8003fc8: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
8003fca: 68fb ldr r3, [r7, #12]
8003fcc: 681b ldr r3, [r3, #0]
8003fce: 69da ldr r2, [r3, #28]
8003fd0: 68fb ldr r3, [r7, #12]
8003fd2: 681b ldr r3, [r3, #0]
8003fd4: f022 0204 bic.w r2, r2, #4
8003fd8: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
8003fda: 68fb ldr r3, [r7, #12]
8003fdc: 681b ldr r3, [r3, #0]
8003fde: 69d9 ldr r1, [r3, #28]
8003fe0: 68bb ldr r3, [r7, #8]
8003fe2: 691a ldr r2, [r3, #16]
8003fe4: 68fb ldr r3, [r7, #12]
8003fe6: 681b ldr r3, [r3, #0]
8003fe8: 430a orrs r2, r1
8003fea: 61da str r2, [r3, #28]
break;
8003fec: e023 b.n 8004036 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
8003fee: 68fb ldr r3, [r7, #12]
8003ff0: 681b ldr r3, [r3, #0]
8003ff2: 68b9 ldr r1, [r7, #8]
8003ff4: 4618 mov r0, r3
8003ff6: f000 fa97 bl 8004528 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
8003ffa: 68fb ldr r3, [r7, #12]
8003ffc: 681b ldr r3, [r3, #0]
8003ffe: 69da ldr r2, [r3, #28]
8004000: 68fb ldr r3, [r7, #12]
8004002: 681b ldr r3, [r3, #0]
8004004: f442 6200 orr.w r2, r2, #2048 @ 0x800
8004008: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
800400a: 68fb ldr r3, [r7, #12]
800400c: 681b ldr r3, [r3, #0]
800400e: 69da ldr r2, [r3, #28]
8004010: 68fb ldr r3, [r7, #12]
8004012: 681b ldr r3, [r3, #0]
8004014: f422 6280 bic.w r2, r2, #1024 @ 0x400
8004018: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
800401a: 68fb ldr r3, [r7, #12]
800401c: 681b ldr r3, [r3, #0]
800401e: 69d9 ldr r1, [r3, #28]
8004020: 68bb ldr r3, [r7, #8]
8004022: 691b ldr r3, [r3, #16]
8004024: 021a lsls r2, r3, #8
8004026: 68fb ldr r3, [r7, #12]
8004028: 681b ldr r3, [r3, #0]
800402a: 430a orrs r2, r1
800402c: 61da str r2, [r3, #28]
break;
800402e: e002 b.n 8004036 <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
8004030: 2301 movs r3, #1
8004032: 75fb strb r3, [r7, #23]
break;
8004034: bf00 nop
}
__HAL_UNLOCK(htim);
8004036: 68fb ldr r3, [r7, #12]
8004038: 2200 movs r2, #0
800403a: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
800403e: 7dfb ldrb r3, [r7, #23]
}
8004040: 4618 mov r0, r3
8004042: 3718 adds r7, #24
8004044: 46bd mov sp, r7
8004046: bd80 pop {r7, pc}
08004048 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
8004048: b580 push {r7, lr}
800404a: b084 sub sp, #16
800404c: af00 add r7, sp, #0
800404e: 6078 str r0, [r7, #4]
8004050: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8004052: 2300 movs r3, #0
8004054: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
8004056: 687b ldr r3, [r7, #4]
8004058: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800405c: 2b01 cmp r3, #1
800405e: d101 bne.n 8004064 <HAL_TIM_ConfigClockSource+0x1c>
8004060: 2302 movs r3, #2
8004062: e0b4 b.n 80041ce <HAL_TIM_ConfigClockSource+0x186>
8004064: 687b ldr r3, [r7, #4]
8004066: 2201 movs r2, #1
8004068: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
800406c: 687b ldr r3, [r7, #4]
800406e: 2202 movs r2, #2
8004070: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8004074: 687b ldr r3, [r7, #4]
8004076: 681b ldr r3, [r3, #0]
8004078: 689b ldr r3, [r3, #8]
800407a: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
800407c: 68bb ldr r3, [r7, #8]
800407e: f023 0377 bic.w r3, r3, #119 @ 0x77
8004082: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8004084: 68bb ldr r3, [r7, #8]
8004086: f423 437f bic.w r3, r3, #65280 @ 0xff00
800408a: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
800408c: 687b ldr r3, [r7, #4]
800408e: 681b ldr r3, [r3, #0]
8004090: 68ba ldr r2, [r7, #8]
8004092: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8004094: 683b ldr r3, [r7, #0]
8004096: 681b ldr r3, [r3, #0]
8004098: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800409c: d03e beq.n 800411c <HAL_TIM_ConfigClockSource+0xd4>
800409e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
80040a2: f200 8087 bhi.w 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
80040a6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
80040aa: f000 8086 beq.w 80041ba <HAL_TIM_ConfigClockSource+0x172>
80040ae: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
80040b2: d87f bhi.n 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
80040b4: 2b70 cmp r3, #112 @ 0x70
80040b6: d01a beq.n 80040ee <HAL_TIM_ConfigClockSource+0xa6>
80040b8: 2b70 cmp r3, #112 @ 0x70
80040ba: d87b bhi.n 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
80040bc: 2b60 cmp r3, #96 @ 0x60
80040be: d050 beq.n 8004162 <HAL_TIM_ConfigClockSource+0x11a>
80040c0: 2b60 cmp r3, #96 @ 0x60
80040c2: d877 bhi.n 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
80040c4: 2b50 cmp r3, #80 @ 0x50
80040c6: d03c beq.n 8004142 <HAL_TIM_ConfigClockSource+0xfa>
80040c8: 2b50 cmp r3, #80 @ 0x50
80040ca: d873 bhi.n 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
80040cc: 2b40 cmp r3, #64 @ 0x40
80040ce: d058 beq.n 8004182 <HAL_TIM_ConfigClockSource+0x13a>
80040d0: 2b40 cmp r3, #64 @ 0x40
80040d2: d86f bhi.n 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
80040d4: 2b30 cmp r3, #48 @ 0x30
80040d6: d064 beq.n 80041a2 <HAL_TIM_ConfigClockSource+0x15a>
80040d8: 2b30 cmp r3, #48 @ 0x30
80040da: d86b bhi.n 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
80040dc: 2b20 cmp r3, #32
80040de: d060 beq.n 80041a2 <HAL_TIM_ConfigClockSource+0x15a>
80040e0: 2b20 cmp r3, #32
80040e2: d867 bhi.n 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
80040e4: 2b00 cmp r3, #0
80040e6: d05c beq.n 80041a2 <HAL_TIM_ConfigClockSource+0x15a>
80040e8: 2b10 cmp r3, #16
80040ea: d05a beq.n 80041a2 <HAL_TIM_ConfigClockSource+0x15a>
80040ec: e062 b.n 80041b4 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80040ee: 687b ldr r3, [r7, #4]
80040f0: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
80040f2: 683b ldr r3, [r7, #0]
80040f4: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80040f6: 683b ldr r3, [r7, #0]
80040f8: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80040fa: 683b ldr r3, [r7, #0]
80040fc: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80040fe: f000 fad8 bl 80046b2 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
8004102: 687b ldr r3, [r7, #4]
8004104: 681b ldr r3, [r3, #0]
8004106: 689b ldr r3, [r3, #8]
8004108: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
800410a: 68bb ldr r3, [r7, #8]
800410c: f043 0377 orr.w r3, r3, #119 @ 0x77
8004110: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8004112: 687b ldr r3, [r7, #4]
8004114: 681b ldr r3, [r3, #0]
8004116: 68ba ldr r2, [r7, #8]
8004118: 609a str r2, [r3, #8]
break;
800411a: e04f b.n 80041bc <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
800411c: 687b ldr r3, [r7, #4]
800411e: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8004120: 683b ldr r3, [r7, #0]
8004122: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8004124: 683b ldr r3, [r7, #0]
8004126: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8004128: 683b ldr r3, [r7, #0]
800412a: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
800412c: f000 fac1 bl 80046b2 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
8004130: 687b ldr r3, [r7, #4]
8004132: 681b ldr r3, [r3, #0]
8004134: 689a ldr r2, [r3, #8]
8004136: 687b ldr r3, [r7, #4]
8004138: 681b ldr r3, [r3, #0]
800413a: f442 4280 orr.w r2, r2, #16384 @ 0x4000
800413e: 609a str r2, [r3, #8]
break;
8004140: e03c b.n 80041bc <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8004142: 687b ldr r3, [r7, #4]
8004144: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8004146: 683b ldr r3, [r7, #0]
8004148: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800414a: 683b ldr r3, [r7, #0]
800414c: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
800414e: 461a mov r2, r3
8004150: f000 fa38 bl 80045c4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
8004154: 687b ldr r3, [r7, #4]
8004156: 681b ldr r3, [r3, #0]
8004158: 2150 movs r1, #80 @ 0x50
800415a: 4618 mov r0, r3
800415c: f000 fa8f bl 800467e <TIM_ITRx_SetConfig>
break;
8004160: e02c b.n 80041bc <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
8004162: 687b ldr r3, [r7, #4]
8004164: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8004166: 683b ldr r3, [r7, #0]
8004168: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800416a: 683b ldr r3, [r7, #0]
800416c: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
800416e: 461a mov r2, r3
8004170: f000 fa56 bl 8004620 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8004174: 687b ldr r3, [r7, #4]
8004176: 681b ldr r3, [r3, #0]
8004178: 2160 movs r1, #96 @ 0x60
800417a: 4618 mov r0, r3
800417c: f000 fa7f bl 800467e <TIM_ITRx_SetConfig>
break;
8004180: e01c b.n 80041bc <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8004182: 687b ldr r3, [r7, #4]
8004184: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8004186: 683b ldr r3, [r7, #0]
8004188: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800418a: 683b ldr r3, [r7, #0]
800418c: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
800418e: 461a mov r2, r3
8004190: f000 fa18 bl 80045c4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8004194: 687b ldr r3, [r7, #4]
8004196: 681b ldr r3, [r3, #0]
8004198: 2140 movs r1, #64 @ 0x40
800419a: 4618 mov r0, r3
800419c: f000 fa6f bl 800467e <TIM_ITRx_SetConfig>
break;
80041a0: e00c b.n 80041bc <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
80041a2: 687b ldr r3, [r7, #4]
80041a4: 681a ldr r2, [r3, #0]
80041a6: 683b ldr r3, [r7, #0]
80041a8: 681b ldr r3, [r3, #0]
80041aa: 4619 mov r1, r3
80041ac: 4610 mov r0, r2
80041ae: f000 fa66 bl 800467e <TIM_ITRx_SetConfig>
break;
80041b2: e003 b.n 80041bc <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
80041b4: 2301 movs r3, #1
80041b6: 73fb strb r3, [r7, #15]
break;
80041b8: e000 b.n 80041bc <HAL_TIM_ConfigClockSource+0x174>
break;
80041ba: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
80041bc: 687b ldr r3, [r7, #4]
80041be: 2201 movs r2, #1
80041c0: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
80041c4: 687b ldr r3, [r7, #4]
80041c6: 2200 movs r2, #0
80041c8: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
80041cc: 7bfb ldrb r3, [r7, #15]
}
80041ce: 4618 mov r0, r3
80041d0: 3710 adds r7, #16
80041d2: 46bd mov sp, r7
80041d4: bd80 pop {r7, pc}
...
080041d8 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
80041d8: b480 push {r7}
80041da: b085 sub sp, #20
80041dc: af00 add r7, sp, #0
80041de: 6078 str r0, [r7, #4]
80041e0: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
80041e2: 687b ldr r3, [r7, #4]
80041e4: 681b ldr r3, [r3, #0]
80041e6: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
80041e8: 687b ldr r3, [r7, #4]
80041ea: 4a2f ldr r2, [pc, #188] @ (80042a8 <TIM_Base_SetConfig+0xd0>)
80041ec: 4293 cmp r3, r2
80041ee: d00b beq.n 8004208 <TIM_Base_SetConfig+0x30>
80041f0: 687b ldr r3, [r7, #4]
80041f2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80041f6: d007 beq.n 8004208 <TIM_Base_SetConfig+0x30>
80041f8: 687b ldr r3, [r7, #4]
80041fa: 4a2c ldr r2, [pc, #176] @ (80042ac <TIM_Base_SetConfig+0xd4>)
80041fc: 4293 cmp r3, r2
80041fe: d003 beq.n 8004208 <TIM_Base_SetConfig+0x30>
8004200: 687b ldr r3, [r7, #4]
8004202: 4a2b ldr r2, [pc, #172] @ (80042b0 <TIM_Base_SetConfig+0xd8>)
8004204: 4293 cmp r3, r2
8004206: d108 bne.n 800421a <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8004208: 68fb ldr r3, [r7, #12]
800420a: f023 0370 bic.w r3, r3, #112 @ 0x70
800420e: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8004210: 683b ldr r3, [r7, #0]
8004212: 685b ldr r3, [r3, #4]
8004214: 68fa ldr r2, [r7, #12]
8004216: 4313 orrs r3, r2
8004218: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
800421a: 687b ldr r3, [r7, #4]
800421c: 4a22 ldr r2, [pc, #136] @ (80042a8 <TIM_Base_SetConfig+0xd0>)
800421e: 4293 cmp r3, r2
8004220: d00b beq.n 800423a <TIM_Base_SetConfig+0x62>
8004222: 687b ldr r3, [r7, #4]
8004224: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004228: d007 beq.n 800423a <TIM_Base_SetConfig+0x62>
800422a: 687b ldr r3, [r7, #4]
800422c: 4a1f ldr r2, [pc, #124] @ (80042ac <TIM_Base_SetConfig+0xd4>)
800422e: 4293 cmp r3, r2
8004230: d003 beq.n 800423a <TIM_Base_SetConfig+0x62>
8004232: 687b ldr r3, [r7, #4]
8004234: 4a1e ldr r2, [pc, #120] @ (80042b0 <TIM_Base_SetConfig+0xd8>)
8004236: 4293 cmp r3, r2
8004238: d108 bne.n 800424c <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
800423a: 68fb ldr r3, [r7, #12]
800423c: f423 7340 bic.w r3, r3, #768 @ 0x300
8004240: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8004242: 683b ldr r3, [r7, #0]
8004244: 68db ldr r3, [r3, #12]
8004246: 68fa ldr r2, [r7, #12]
8004248: 4313 orrs r3, r2
800424a: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
800424c: 68fb ldr r3, [r7, #12]
800424e: f023 0280 bic.w r2, r3, #128 @ 0x80
8004252: 683b ldr r3, [r7, #0]
8004254: 695b ldr r3, [r3, #20]
8004256: 4313 orrs r3, r2
8004258: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
800425a: 687b ldr r3, [r7, #4]
800425c: 68fa ldr r2, [r7, #12]
800425e: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8004260: 683b ldr r3, [r7, #0]
8004262: 689a ldr r2, [r3, #8]
8004264: 687b ldr r3, [r7, #4]
8004266: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8004268: 683b ldr r3, [r7, #0]
800426a: 681a ldr r2, [r3, #0]
800426c: 687b ldr r3, [r7, #4]
800426e: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8004270: 687b ldr r3, [r7, #4]
8004272: 4a0d ldr r2, [pc, #52] @ (80042a8 <TIM_Base_SetConfig+0xd0>)
8004274: 4293 cmp r3, r2
8004276: d103 bne.n 8004280 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8004278: 683b ldr r3, [r7, #0]
800427a: 691a ldr r2, [r3, #16]
800427c: 687b ldr r3, [r7, #4]
800427e: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8004280: 687b ldr r3, [r7, #4]
8004282: 2201 movs r2, #1
8004284: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
8004286: 687b ldr r3, [r7, #4]
8004288: 691b ldr r3, [r3, #16]
800428a: f003 0301 and.w r3, r3, #1
800428e: 2b00 cmp r3, #0
8004290: d005 beq.n 800429e <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
8004292: 687b ldr r3, [r7, #4]
8004294: 691b ldr r3, [r3, #16]
8004296: f023 0201 bic.w r2, r3, #1
800429a: 687b ldr r3, [r7, #4]
800429c: 611a str r2, [r3, #16]
}
}
800429e: bf00 nop
80042a0: 3714 adds r7, #20
80042a2: 46bd mov sp, r7
80042a4: bc80 pop {r7}
80042a6: 4770 bx lr
80042a8: 40012c00 .word 0x40012c00
80042ac: 40000400 .word 0x40000400
80042b0: 40000800 .word 0x40000800
080042b4 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80042b4: b480 push {r7}
80042b6: b087 sub sp, #28
80042b8: af00 add r7, sp, #0
80042ba: 6078 str r0, [r7, #4]
80042bc: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80042be: 687b ldr r3, [r7, #4]
80042c0: 6a1b ldr r3, [r3, #32]
80042c2: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
80042c4: 687b ldr r3, [r7, #4]
80042c6: 6a1b ldr r3, [r3, #32]
80042c8: f023 0201 bic.w r2, r3, #1
80042cc: 687b ldr r3, [r7, #4]
80042ce: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80042d0: 687b ldr r3, [r7, #4]
80042d2: 685b ldr r3, [r3, #4]
80042d4: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80042d6: 687b ldr r3, [r7, #4]
80042d8: 699b ldr r3, [r3, #24]
80042da: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
80042dc: 68fb ldr r3, [r7, #12]
80042de: f023 0370 bic.w r3, r3, #112 @ 0x70
80042e2: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
80042e4: 68fb ldr r3, [r7, #12]
80042e6: f023 0303 bic.w r3, r3, #3
80042ea: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
80042ec: 683b ldr r3, [r7, #0]
80042ee: 681b ldr r3, [r3, #0]
80042f0: 68fa ldr r2, [r7, #12]
80042f2: 4313 orrs r3, r2
80042f4: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
80042f6: 697b ldr r3, [r7, #20]
80042f8: f023 0302 bic.w r3, r3, #2
80042fc: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
80042fe: 683b ldr r3, [r7, #0]
8004300: 689b ldr r3, [r3, #8]
8004302: 697a ldr r2, [r7, #20]
8004304: 4313 orrs r3, r2
8004306: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
8004308: 687b ldr r3, [r7, #4]
800430a: 4a1c ldr r2, [pc, #112] @ (800437c <TIM_OC1_SetConfig+0xc8>)
800430c: 4293 cmp r3, r2
800430e: d10c bne.n 800432a <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8004310: 697b ldr r3, [r7, #20]
8004312: f023 0308 bic.w r3, r3, #8
8004316: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
8004318: 683b ldr r3, [r7, #0]
800431a: 68db ldr r3, [r3, #12]
800431c: 697a ldr r2, [r7, #20]
800431e: 4313 orrs r3, r2
8004320: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8004322: 697b ldr r3, [r7, #20]
8004324: f023 0304 bic.w r3, r3, #4
8004328: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800432a: 687b ldr r3, [r7, #4]
800432c: 4a13 ldr r2, [pc, #76] @ (800437c <TIM_OC1_SetConfig+0xc8>)
800432e: 4293 cmp r3, r2
8004330: d111 bne.n 8004356 <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
8004332: 693b ldr r3, [r7, #16]
8004334: f423 7380 bic.w r3, r3, #256 @ 0x100
8004338: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
800433a: 693b ldr r3, [r7, #16]
800433c: f423 7300 bic.w r3, r3, #512 @ 0x200
8004340: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8004342: 683b ldr r3, [r7, #0]
8004344: 695b ldr r3, [r3, #20]
8004346: 693a ldr r2, [r7, #16]
8004348: 4313 orrs r3, r2
800434a: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
800434c: 683b ldr r3, [r7, #0]
800434e: 699b ldr r3, [r3, #24]
8004350: 693a ldr r2, [r7, #16]
8004352: 4313 orrs r3, r2
8004354: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8004356: 687b ldr r3, [r7, #4]
8004358: 693a ldr r2, [r7, #16]
800435a: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
800435c: 687b ldr r3, [r7, #4]
800435e: 68fa ldr r2, [r7, #12]
8004360: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8004362: 683b ldr r3, [r7, #0]
8004364: 685a ldr r2, [r3, #4]
8004366: 687b ldr r3, [r7, #4]
8004368: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800436a: 687b ldr r3, [r7, #4]
800436c: 697a ldr r2, [r7, #20]
800436e: 621a str r2, [r3, #32]
}
8004370: bf00 nop
8004372: 371c adds r7, #28
8004374: 46bd mov sp, r7
8004376: bc80 pop {r7}
8004378: 4770 bx lr
800437a: bf00 nop
800437c: 40012c00 .word 0x40012c00
08004380 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8004380: b480 push {r7}
8004382: b087 sub sp, #28
8004384: af00 add r7, sp, #0
8004386: 6078 str r0, [r7, #4]
8004388: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800438a: 687b ldr r3, [r7, #4]
800438c: 6a1b ldr r3, [r3, #32]
800438e: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8004390: 687b ldr r3, [r7, #4]
8004392: 6a1b ldr r3, [r3, #32]
8004394: f023 0210 bic.w r2, r3, #16
8004398: 687b ldr r3, [r7, #4]
800439a: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
800439c: 687b ldr r3, [r7, #4]
800439e: 685b ldr r3, [r3, #4]
80043a0: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80043a2: 687b ldr r3, [r7, #4]
80043a4: 699b ldr r3, [r3, #24]
80043a6: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
80043a8: 68fb ldr r3, [r7, #12]
80043aa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80043ae: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
80043b0: 68fb ldr r3, [r7, #12]
80043b2: f423 7340 bic.w r3, r3, #768 @ 0x300
80043b6: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80043b8: 683b ldr r3, [r7, #0]
80043ba: 681b ldr r3, [r3, #0]
80043bc: 021b lsls r3, r3, #8
80043be: 68fa ldr r2, [r7, #12]
80043c0: 4313 orrs r3, r2
80043c2: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
80043c4: 697b ldr r3, [r7, #20]
80043c6: f023 0320 bic.w r3, r3, #32
80043ca: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
80043cc: 683b ldr r3, [r7, #0]
80043ce: 689b ldr r3, [r3, #8]
80043d0: 011b lsls r3, r3, #4
80043d2: 697a ldr r2, [r7, #20]
80043d4: 4313 orrs r3, r2
80043d6: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
80043d8: 687b ldr r3, [r7, #4]
80043da: 4a1d ldr r2, [pc, #116] @ (8004450 <TIM_OC2_SetConfig+0xd0>)
80043dc: 4293 cmp r3, r2
80043de: d10d bne.n 80043fc <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
80043e0: 697b ldr r3, [r7, #20]
80043e2: f023 0380 bic.w r3, r3, #128 @ 0x80
80043e6: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
80043e8: 683b ldr r3, [r7, #0]
80043ea: 68db ldr r3, [r3, #12]
80043ec: 011b lsls r3, r3, #4
80043ee: 697a ldr r2, [r7, #20]
80043f0: 4313 orrs r3, r2
80043f2: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
80043f4: 697b ldr r3, [r7, #20]
80043f6: f023 0340 bic.w r3, r3, #64 @ 0x40
80043fa: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80043fc: 687b ldr r3, [r7, #4]
80043fe: 4a14 ldr r2, [pc, #80] @ (8004450 <TIM_OC2_SetConfig+0xd0>)
8004400: 4293 cmp r3, r2
8004402: d113 bne.n 800442c <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8004404: 693b ldr r3, [r7, #16]
8004406: f423 6380 bic.w r3, r3, #1024 @ 0x400
800440a: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
800440c: 693b ldr r3, [r7, #16]
800440e: f423 6300 bic.w r3, r3, #2048 @ 0x800
8004412: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8004414: 683b ldr r3, [r7, #0]
8004416: 695b ldr r3, [r3, #20]
8004418: 009b lsls r3, r3, #2
800441a: 693a ldr r2, [r7, #16]
800441c: 4313 orrs r3, r2
800441e: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8004420: 683b ldr r3, [r7, #0]
8004422: 699b ldr r3, [r3, #24]
8004424: 009b lsls r3, r3, #2
8004426: 693a ldr r2, [r7, #16]
8004428: 4313 orrs r3, r2
800442a: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800442c: 687b ldr r3, [r7, #4]
800442e: 693a ldr r2, [r7, #16]
8004430: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8004432: 687b ldr r3, [r7, #4]
8004434: 68fa ldr r2, [r7, #12]
8004436: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8004438: 683b ldr r3, [r7, #0]
800443a: 685a ldr r2, [r3, #4]
800443c: 687b ldr r3, [r7, #4]
800443e: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8004440: 687b ldr r3, [r7, #4]
8004442: 697a ldr r2, [r7, #20]
8004444: 621a str r2, [r3, #32]
}
8004446: bf00 nop
8004448: 371c adds r7, #28
800444a: 46bd mov sp, r7
800444c: bc80 pop {r7}
800444e: 4770 bx lr
8004450: 40012c00 .word 0x40012c00
08004454 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8004454: b480 push {r7}
8004456: b087 sub sp, #28
8004458: af00 add r7, sp, #0
800445a: 6078 str r0, [r7, #4]
800445c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800445e: 687b ldr r3, [r7, #4]
8004460: 6a1b ldr r3, [r3, #32]
8004462: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8004464: 687b ldr r3, [r7, #4]
8004466: 6a1b ldr r3, [r3, #32]
8004468: f423 7280 bic.w r2, r3, #256 @ 0x100
800446c: 687b ldr r3, [r7, #4]
800446e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8004470: 687b ldr r3, [r7, #4]
8004472: 685b ldr r3, [r3, #4]
8004474: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8004476: 687b ldr r3, [r7, #4]
8004478: 69db ldr r3, [r3, #28]
800447a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
800447c: 68fb ldr r3, [r7, #12]
800447e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004482: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8004484: 68fb ldr r3, [r7, #12]
8004486: f023 0303 bic.w r3, r3, #3
800448a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
800448c: 683b ldr r3, [r7, #0]
800448e: 681b ldr r3, [r3, #0]
8004490: 68fa ldr r2, [r7, #12]
8004492: 4313 orrs r3, r2
8004494: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
8004496: 697b ldr r3, [r7, #20]
8004498: f423 7300 bic.w r3, r3, #512 @ 0x200
800449c: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
800449e: 683b ldr r3, [r7, #0]
80044a0: 689b ldr r3, [r3, #8]
80044a2: 021b lsls r3, r3, #8
80044a4: 697a ldr r2, [r7, #20]
80044a6: 4313 orrs r3, r2
80044a8: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
80044aa: 687b ldr r3, [r7, #4]
80044ac: 4a1d ldr r2, [pc, #116] @ (8004524 <TIM_OC3_SetConfig+0xd0>)
80044ae: 4293 cmp r3, r2
80044b0: d10d bne.n 80044ce <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
80044b2: 697b ldr r3, [r7, #20]
80044b4: f423 6300 bic.w r3, r3, #2048 @ 0x800
80044b8: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
80044ba: 683b ldr r3, [r7, #0]
80044bc: 68db ldr r3, [r3, #12]
80044be: 021b lsls r3, r3, #8
80044c0: 697a ldr r2, [r7, #20]
80044c2: 4313 orrs r3, r2
80044c4: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
80044c6: 697b ldr r3, [r7, #20]
80044c8: f423 6380 bic.w r3, r3, #1024 @ 0x400
80044cc: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80044ce: 687b ldr r3, [r7, #4]
80044d0: 4a14 ldr r2, [pc, #80] @ (8004524 <TIM_OC3_SetConfig+0xd0>)
80044d2: 4293 cmp r3, r2
80044d4: d113 bne.n 80044fe <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
80044d6: 693b ldr r3, [r7, #16]
80044d8: f423 5380 bic.w r3, r3, #4096 @ 0x1000
80044dc: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
80044de: 693b ldr r3, [r7, #16]
80044e0: f423 5300 bic.w r3, r3, #8192 @ 0x2000
80044e4: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
80044e6: 683b ldr r3, [r7, #0]
80044e8: 695b ldr r3, [r3, #20]
80044ea: 011b lsls r3, r3, #4
80044ec: 693a ldr r2, [r7, #16]
80044ee: 4313 orrs r3, r2
80044f0: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
80044f2: 683b ldr r3, [r7, #0]
80044f4: 699b ldr r3, [r3, #24]
80044f6: 011b lsls r3, r3, #4
80044f8: 693a ldr r2, [r7, #16]
80044fa: 4313 orrs r3, r2
80044fc: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80044fe: 687b ldr r3, [r7, #4]
8004500: 693a ldr r2, [r7, #16]
8004502: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8004504: 687b ldr r3, [r7, #4]
8004506: 68fa ldr r2, [r7, #12]
8004508: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
800450a: 683b ldr r3, [r7, #0]
800450c: 685a ldr r2, [r3, #4]
800450e: 687b ldr r3, [r7, #4]
8004510: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8004512: 687b ldr r3, [r7, #4]
8004514: 697a ldr r2, [r7, #20]
8004516: 621a str r2, [r3, #32]
}
8004518: bf00 nop
800451a: 371c adds r7, #28
800451c: 46bd mov sp, r7
800451e: bc80 pop {r7}
8004520: 4770 bx lr
8004522: bf00 nop
8004524: 40012c00 .word 0x40012c00
08004528 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8004528: b480 push {r7}
800452a: b087 sub sp, #28
800452c: af00 add r7, sp, #0
800452e: 6078 str r0, [r7, #4]
8004530: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8004532: 687b ldr r3, [r7, #4]
8004534: 6a1b ldr r3, [r3, #32]
8004536: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
8004538: 687b ldr r3, [r7, #4]
800453a: 6a1b ldr r3, [r3, #32]
800453c: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8004540: 687b ldr r3, [r7, #4]
8004542: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8004544: 687b ldr r3, [r7, #4]
8004546: 685b ldr r3, [r3, #4]
8004548: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
800454a: 687b ldr r3, [r7, #4]
800454c: 69db ldr r3, [r3, #28]
800454e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8004550: 68fb ldr r3, [r7, #12]
8004552: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004556: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
8004558: 68fb ldr r3, [r7, #12]
800455a: f423 7340 bic.w r3, r3, #768 @ 0x300
800455e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8004560: 683b ldr r3, [r7, #0]
8004562: 681b ldr r3, [r3, #0]
8004564: 021b lsls r3, r3, #8
8004566: 68fa ldr r2, [r7, #12]
8004568: 4313 orrs r3, r2
800456a: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
800456c: 693b ldr r3, [r7, #16]
800456e: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8004572: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8004574: 683b ldr r3, [r7, #0]
8004576: 689b ldr r3, [r3, #8]
8004578: 031b lsls r3, r3, #12
800457a: 693a ldr r2, [r7, #16]
800457c: 4313 orrs r3, r2
800457e: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8004580: 687b ldr r3, [r7, #4]
8004582: 4a0f ldr r2, [pc, #60] @ (80045c0 <TIM_OC4_SetConfig+0x98>)
8004584: 4293 cmp r3, r2
8004586: d109 bne.n 800459c <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8004588: 697b ldr r3, [r7, #20]
800458a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800458e: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
8004590: 683b ldr r3, [r7, #0]
8004592: 695b ldr r3, [r3, #20]
8004594: 019b lsls r3, r3, #6
8004596: 697a ldr r2, [r7, #20]
8004598: 4313 orrs r3, r2
800459a: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800459c: 687b ldr r3, [r7, #4]
800459e: 697a ldr r2, [r7, #20]
80045a0: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
80045a2: 687b ldr r3, [r7, #4]
80045a4: 68fa ldr r2, [r7, #12]
80045a6: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
80045a8: 683b ldr r3, [r7, #0]
80045aa: 685a ldr r2, [r3, #4]
80045ac: 687b ldr r3, [r7, #4]
80045ae: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80045b0: 687b ldr r3, [r7, #4]
80045b2: 693a ldr r2, [r7, #16]
80045b4: 621a str r2, [r3, #32]
}
80045b6: bf00 nop
80045b8: 371c adds r7, #28
80045ba: 46bd mov sp, r7
80045bc: bc80 pop {r7}
80045be: 4770 bx lr
80045c0: 40012c00 .word 0x40012c00
080045c4 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
80045c4: b480 push {r7}
80045c6: b087 sub sp, #28
80045c8: af00 add r7, sp, #0
80045ca: 60f8 str r0, [r7, #12]
80045cc: 60b9 str r1, [r7, #8]
80045ce: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
80045d0: 68fb ldr r3, [r7, #12]
80045d2: 6a1b ldr r3, [r3, #32]
80045d4: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
80045d6: 68fb ldr r3, [r7, #12]
80045d8: 6a1b ldr r3, [r3, #32]
80045da: f023 0201 bic.w r2, r3, #1
80045de: 68fb ldr r3, [r7, #12]
80045e0: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
80045e2: 68fb ldr r3, [r7, #12]
80045e4: 699b ldr r3, [r3, #24]
80045e6: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
80045e8: 693b ldr r3, [r7, #16]
80045ea: f023 03f0 bic.w r3, r3, #240 @ 0xf0
80045ee: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
80045f0: 687b ldr r3, [r7, #4]
80045f2: 011b lsls r3, r3, #4
80045f4: 693a ldr r2, [r7, #16]
80045f6: 4313 orrs r3, r2
80045f8: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
80045fa: 697b ldr r3, [r7, #20]
80045fc: f023 030a bic.w r3, r3, #10
8004600: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8004602: 697a ldr r2, [r7, #20]
8004604: 68bb ldr r3, [r7, #8]
8004606: 4313 orrs r3, r2
8004608: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
800460a: 68fb ldr r3, [r7, #12]
800460c: 693a ldr r2, [r7, #16]
800460e: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8004610: 68fb ldr r3, [r7, #12]
8004612: 697a ldr r2, [r7, #20]
8004614: 621a str r2, [r3, #32]
}
8004616: bf00 nop
8004618: 371c adds r7, #28
800461a: 46bd mov sp, r7
800461c: bc80 pop {r7}
800461e: 4770 bx lr
08004620 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8004620: b480 push {r7}
8004622: b087 sub sp, #28
8004624: af00 add r7, sp, #0
8004626: 60f8 str r0, [r7, #12]
8004628: 60b9 str r1, [r7, #8]
800462a: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
800462c: 68fb ldr r3, [r7, #12]
800462e: 6a1b ldr r3, [r3, #32]
8004630: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8004632: 68fb ldr r3, [r7, #12]
8004634: 6a1b ldr r3, [r3, #32]
8004636: f023 0210 bic.w r2, r3, #16
800463a: 68fb ldr r3, [r7, #12]
800463c: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
800463e: 68fb ldr r3, [r7, #12]
8004640: 699b ldr r3, [r3, #24]
8004642: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8004644: 693b ldr r3, [r7, #16]
8004646: f423 4370 bic.w r3, r3, #61440 @ 0xf000
800464a: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
800464c: 687b ldr r3, [r7, #4]
800464e: 031b lsls r3, r3, #12
8004650: 693a ldr r2, [r7, #16]
8004652: 4313 orrs r3, r2
8004654: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8004656: 697b ldr r3, [r7, #20]
8004658: f023 03a0 bic.w r3, r3, #160 @ 0xa0
800465c: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
800465e: 68bb ldr r3, [r7, #8]
8004660: 011b lsls r3, r3, #4
8004662: 697a ldr r2, [r7, #20]
8004664: 4313 orrs r3, r2
8004666: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8004668: 68fb ldr r3, [r7, #12]
800466a: 693a ldr r2, [r7, #16]
800466c: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
800466e: 68fb ldr r3, [r7, #12]
8004670: 697a ldr r2, [r7, #20]
8004672: 621a str r2, [r3, #32]
}
8004674: bf00 nop
8004676: 371c adds r7, #28
8004678: 46bd mov sp, r7
800467a: bc80 pop {r7}
800467c: 4770 bx lr
0800467e <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
800467e: b480 push {r7}
8004680: b085 sub sp, #20
8004682: af00 add r7, sp, #0
8004684: 6078 str r0, [r7, #4]
8004686: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8004688: 687b ldr r3, [r7, #4]
800468a: 689b ldr r3, [r3, #8]
800468c: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
800468e: 68fb ldr r3, [r7, #12]
8004690: f023 0370 bic.w r3, r3, #112 @ 0x70
8004694: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8004696: 683a ldr r2, [r7, #0]
8004698: 68fb ldr r3, [r7, #12]
800469a: 4313 orrs r3, r2
800469c: f043 0307 orr.w r3, r3, #7
80046a0: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
80046a2: 687b ldr r3, [r7, #4]
80046a4: 68fa ldr r2, [r7, #12]
80046a6: 609a str r2, [r3, #8]
}
80046a8: bf00 nop
80046aa: 3714 adds r7, #20
80046ac: 46bd mov sp, r7
80046ae: bc80 pop {r7}
80046b0: 4770 bx lr
080046b2 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
80046b2: b480 push {r7}
80046b4: b087 sub sp, #28
80046b6: af00 add r7, sp, #0
80046b8: 60f8 str r0, [r7, #12]
80046ba: 60b9 str r1, [r7, #8]
80046bc: 607a str r2, [r7, #4]
80046be: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
80046c0: 68fb ldr r3, [r7, #12]
80046c2: 689b ldr r3, [r3, #8]
80046c4: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
80046c6: 697b ldr r3, [r7, #20]
80046c8: f423 437f bic.w r3, r3, #65280 @ 0xff00
80046cc: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
80046ce: 683b ldr r3, [r7, #0]
80046d0: 021a lsls r2, r3, #8
80046d2: 687b ldr r3, [r7, #4]
80046d4: 431a orrs r2, r3
80046d6: 68bb ldr r3, [r7, #8]
80046d8: 4313 orrs r3, r2
80046da: 697a ldr r2, [r7, #20]
80046dc: 4313 orrs r3, r2
80046de: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
80046e0: 68fb ldr r3, [r7, #12]
80046e2: 697a ldr r2, [r7, #20]
80046e4: 609a str r2, [r3, #8]
}
80046e6: bf00 nop
80046e8: 371c adds r7, #28
80046ea: 46bd mov sp, r7
80046ec: bc80 pop {r7}
80046ee: 4770 bx lr
080046f0 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
80046f0: b480 push {r7}
80046f2: b087 sub sp, #28
80046f4: af00 add r7, sp, #0
80046f6: 60f8 str r0, [r7, #12]
80046f8: 60b9 str r1, [r7, #8]
80046fa: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
80046fc: 68bb ldr r3, [r7, #8]
80046fe: f003 031f and.w r3, r3, #31
8004702: 2201 movs r2, #1
8004704: fa02 f303 lsl.w r3, r2, r3
8004708: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
800470a: 68fb ldr r3, [r7, #12]
800470c: 6a1a ldr r2, [r3, #32]
800470e: 697b ldr r3, [r7, #20]
8004710: 43db mvns r3, r3
8004712: 401a ands r2, r3
8004714: 68fb ldr r3, [r7, #12]
8004716: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8004718: 68fb ldr r3, [r7, #12]
800471a: 6a1a ldr r2, [r3, #32]
800471c: 68bb ldr r3, [r7, #8]
800471e: f003 031f and.w r3, r3, #31
8004722: 6879 ldr r1, [r7, #4]
8004724: fa01 f303 lsl.w r3, r1, r3
8004728: 431a orrs r2, r3
800472a: 68fb ldr r3, [r7, #12]
800472c: 621a str r2, [r3, #32]
}
800472e: bf00 nop
8004730: 371c adds r7, #28
8004732: 46bd mov sp, r7
8004734: bc80 pop {r7}
8004736: 4770 bx lr
08004738 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8004738: b480 push {r7}
800473a: b085 sub sp, #20
800473c: af00 add r7, sp, #0
800473e: 6078 str r0, [r7, #4]
8004740: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8004742: 687b ldr r3, [r7, #4]
8004744: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8004748: 2b01 cmp r3, #1
800474a: d101 bne.n 8004750 <HAL_TIMEx_MasterConfigSynchronization+0x18>
800474c: 2302 movs r3, #2
800474e: e046 b.n 80047de <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8004750: 687b ldr r3, [r7, #4]
8004752: 2201 movs r2, #1
8004754: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8004758: 687b ldr r3, [r7, #4]
800475a: 2202 movs r2, #2
800475c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8004760: 687b ldr r3, [r7, #4]
8004762: 681b ldr r3, [r3, #0]
8004764: 685b ldr r3, [r3, #4]
8004766: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8004768: 687b ldr r3, [r7, #4]
800476a: 681b ldr r3, [r3, #0]
800476c: 689b ldr r3, [r3, #8]
800476e: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8004770: 68fb ldr r3, [r7, #12]
8004772: f023 0370 bic.w r3, r3, #112 @ 0x70
8004776: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8004778: 683b ldr r3, [r7, #0]
800477a: 681b ldr r3, [r3, #0]
800477c: 68fa ldr r2, [r7, #12]
800477e: 4313 orrs r3, r2
8004780: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8004782: 687b ldr r3, [r7, #4]
8004784: 681b ldr r3, [r3, #0]
8004786: 68fa ldr r2, [r7, #12]
8004788: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800478a: 687b ldr r3, [r7, #4]
800478c: 681b ldr r3, [r3, #0]
800478e: 4a16 ldr r2, [pc, #88] @ (80047e8 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8004790: 4293 cmp r3, r2
8004792: d00e beq.n 80047b2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8004794: 687b ldr r3, [r7, #4]
8004796: 681b ldr r3, [r3, #0]
8004798: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800479c: d009 beq.n 80047b2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
800479e: 687b ldr r3, [r7, #4]
80047a0: 681b ldr r3, [r3, #0]
80047a2: 4a12 ldr r2, [pc, #72] @ (80047ec <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
80047a4: 4293 cmp r3, r2
80047a6: d004 beq.n 80047b2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80047a8: 687b ldr r3, [r7, #4]
80047aa: 681b ldr r3, [r3, #0]
80047ac: 4a10 ldr r2, [pc, #64] @ (80047f0 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
80047ae: 4293 cmp r3, r2
80047b0: d10c bne.n 80047cc <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
80047b2: 68bb ldr r3, [r7, #8]
80047b4: f023 0380 bic.w r3, r3, #128 @ 0x80
80047b8: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
80047ba: 683b ldr r3, [r7, #0]
80047bc: 685b ldr r3, [r3, #4]
80047be: 68ba ldr r2, [r7, #8]
80047c0: 4313 orrs r3, r2
80047c2: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80047c4: 687b ldr r3, [r7, #4]
80047c6: 681b ldr r3, [r3, #0]
80047c8: 68ba ldr r2, [r7, #8]
80047ca: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
80047cc: 687b ldr r3, [r7, #4]
80047ce: 2201 movs r2, #1
80047d0: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
80047d4: 687b ldr r3, [r7, #4]
80047d6: 2200 movs r2, #0
80047d8: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
80047dc: 2300 movs r3, #0
}
80047de: 4618 mov r0, r3
80047e0: 3714 adds r7, #20
80047e2: 46bd mov sp, r7
80047e4: bc80 pop {r7}
80047e6: 4770 bx lr
80047e8: 40012c00 .word 0x40012c00
80047ec: 40000400 .word 0x40000400
80047f0: 40000800 .word 0x40000800
080047f4 <HAL_TIMEx_ConfigBreakDeadTime>:
* interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
{
80047f4: b480 push {r7}
80047f6: b085 sub sp, #20
80047f8: af00 add r7, sp, #0
80047fa: 6078 str r0, [r7, #4]
80047fc: 6039 str r1, [r7, #0]
/* Keep this variable initialized to 0 as it is used to configure BDTR register */
uint32_t tmpbdtr = 0U;
80047fe: 2300 movs r3, #0
8004800: 60fb str r3, [r7, #12]
assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
/* Check input state */
__HAL_LOCK(htim);
8004802: 687b ldr r3, [r7, #4]
8004804: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8004808: 2b01 cmp r3, #1
800480a: d101 bne.n 8004810 <HAL_TIMEx_ConfigBreakDeadTime+0x1c>
800480c: 2302 movs r3, #2
800480e: e03d b.n 800488c <HAL_TIMEx_ConfigBreakDeadTime+0x98>
8004810: 687b ldr r3, [r7, #4]
8004812: 2201 movs r2, #1
8004814: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
the OSSI State, the dead time value and the Automatic Output Enable Bit */
/* Set the BDTR bits */
MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
8004818: 68fb ldr r3, [r7, #12]
800481a: f023 02ff bic.w r2, r3, #255 @ 0xff
800481e: 683b ldr r3, [r7, #0]
8004820: 68db ldr r3, [r3, #12]
8004822: 4313 orrs r3, r2
8004824: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
8004826: 68fb ldr r3, [r7, #12]
8004828: f423 7240 bic.w r2, r3, #768 @ 0x300
800482c: 683b ldr r3, [r7, #0]
800482e: 689b ldr r3, [r3, #8]
8004830: 4313 orrs r3, r2
8004832: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
8004834: 68fb ldr r3, [r7, #12]
8004836: f423 6280 bic.w r2, r3, #1024 @ 0x400
800483a: 683b ldr r3, [r7, #0]
800483c: 685b ldr r3, [r3, #4]
800483e: 4313 orrs r3, r2
8004840: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
8004842: 68fb ldr r3, [r7, #12]
8004844: f423 6200 bic.w r2, r3, #2048 @ 0x800
8004848: 683b ldr r3, [r7, #0]
800484a: 681b ldr r3, [r3, #0]
800484c: 4313 orrs r3, r2
800484e: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
8004850: 68fb ldr r3, [r7, #12]
8004852: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8004856: 683b ldr r3, [r7, #0]
8004858: 691b ldr r3, [r3, #16]
800485a: 4313 orrs r3, r2
800485c: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
800485e: 68fb ldr r3, [r7, #12]
8004860: f423 5200 bic.w r2, r3, #8192 @ 0x2000
8004864: 683b ldr r3, [r7, #0]
8004866: 695b ldr r3, [r3, #20]
8004868: 4313 orrs r3, r2
800486a: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
800486c: 68fb ldr r3, [r7, #12]
800486e: f423 4280 bic.w r2, r3, #16384 @ 0x4000
8004872: 683b ldr r3, [r7, #0]
8004874: 69db ldr r3, [r3, #28]
8004876: 4313 orrs r3, r2
8004878: 60fb str r3, [r7, #12]
/* Set TIMx_BDTR */
htim->Instance->BDTR = tmpbdtr;
800487a: 687b ldr r3, [r7, #4]
800487c: 681b ldr r3, [r3, #0]
800487e: 68fa ldr r2, [r7, #12]
8004880: 645a str r2, [r3, #68] @ 0x44
__HAL_UNLOCK(htim);
8004882: 687b ldr r3, [r7, #4]
8004884: 2200 movs r2, #0
8004886: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
800488a: 2300 movs r3, #0
}
800488c: 4618 mov r0, r3
800488e: 3714 adds r7, #20
8004890: 46bd mov sp, r7
8004892: bc80 pop {r7}
8004894: 4770 bx lr
08004896 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8004896: b480 push {r7}
8004898: b085 sub sp, #20
800489a: af00 add r7, sp, #0
800489c: 60f8 str r0, [r7, #12]
800489e: 4638 mov r0, r7
80048a0: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80048a4: 2300 movs r3, #0
}
80048a6: 4618 mov r0, r3
80048a8: 3714 adds r7, #20
80048aa: 46bd mov sp, r7
80048ac: bc80 pop {r7}
80048ae: 4770 bx lr
080048b0 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
80048b0: b480 push {r7}
80048b2: b085 sub sp, #20
80048b4: af00 add r7, sp, #0
80048b6: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
80048b8: 687b ldr r3, [r7, #4]
80048ba: 2200 movs r2, #0
80048bc: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
80048c0: f44f 433f mov.w r3, #48896 @ 0xbf00
80048c4: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
80048c6: 68fb ldr r3, [r7, #12]
80048c8: b29a uxth r2, r3
80048ca: 687b ldr r3, [r7, #4]
80048cc: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
80048d0: 2300 movs r3, #0
}
80048d2: 4618 mov r0, r3
80048d4: 3714 adds r7, #20
80048d6: 46bd mov sp, r7
80048d8: bc80 pop {r7}
80048da: 4770 bx lr
080048dc <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
80048dc: b480 push {r7}
80048de: b085 sub sp, #20
80048e0: af00 add r7, sp, #0
80048e2: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
80048e4: f44f 433f mov.w r3, #48896 @ 0xbf00
80048e8: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
80048ea: 687b ldr r3, [r7, #4]
80048ec: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80048f0: b29a uxth r2, r3
80048f2: 68fb ldr r3, [r7, #12]
80048f4: b29b uxth r3, r3
80048f6: 43db mvns r3, r3
80048f8: b29b uxth r3, r3
80048fa: 4013 ands r3, r2
80048fc: b29a uxth r2, r3
80048fe: 687b ldr r3, [r7, #4]
8004900: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8004904: 2300 movs r3, #0
}
8004906: 4618 mov r0, r3
8004908: 3714 adds r7, #20
800490a: 46bd mov sp, r7
800490c: bc80 pop {r7}
800490e: 4770 bx lr
08004910 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8004910: b480 push {r7}
8004912: b083 sub sp, #12
8004914: af00 add r7, sp, #0
8004916: 6078 str r0, [r7, #4]
8004918: 460b mov r3, r1
800491a: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800491c: 2300 movs r3, #0
}
800491e: 4618 mov r0, r3
8004920: 370c adds r7, #12
8004922: 46bd mov sp, r7
8004924: bc80 pop {r7}
8004926: 4770 bx lr
08004928 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8004928: b480 push {r7}
800492a: b085 sub sp, #20
800492c: af00 add r7, sp, #0
800492e: 60f8 str r0, [r7, #12]
8004930: 4638 mov r0, r7
8004932: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8004936: 68fb ldr r3, [r7, #12]
8004938: 2201 movs r2, #1
800493a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
800493e: 68fb ldr r3, [r7, #12]
8004940: 2200 movs r2, #0
8004942: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8004946: 68fb ldr r3, [r7, #12]
8004948: 2200 movs r2, #0
800494a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
800494e: 68fb ldr r3, [r7, #12]
8004950: 2200 movs r2, #0
8004952: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8004956: 2300 movs r3, #0
}
8004958: 4618 mov r0, r3
800495a: 3714 adds r7, #20
800495c: 46bd mov sp, r7
800495e: bc80 pop {r7}
8004960: 4770 bx lr
...
08004964 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8004964: b480 push {r7}
8004966: b09d sub sp, #116 @ 0x74
8004968: af00 add r7, sp, #0
800496a: 6078 str r0, [r7, #4]
800496c: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
800496e: 2300 movs r3, #0
8004970: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
8004974: 687a ldr r2, [r7, #4]
8004976: 683b ldr r3, [r7, #0]
8004978: 781b ldrb r3, [r3, #0]
800497a: 009b lsls r3, r3, #2
800497c: 4413 add r3, r2
800497e: 881b ldrh r3, [r3, #0]
8004980: b29b uxth r3, r3
8004982: f423 43ec bic.w r3, r3, #30208 @ 0x7600
8004986: f023 0370 bic.w r3, r3, #112 @ 0x70
800498a: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
800498e: 683b ldr r3, [r7, #0]
8004990: 78db ldrb r3, [r3, #3]
8004992: 2b03 cmp r3, #3
8004994: d81f bhi.n 80049d6 <USB_ActivateEndpoint+0x72>
8004996: a201 add r2, pc, #4 @ (adr r2, 800499c <USB_ActivateEndpoint+0x38>)
8004998: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800499c: 080049ad .word 0x080049ad
80049a0: 080049c9 .word 0x080049c9
80049a4: 080049df .word 0x080049df
80049a8: 080049bb .word 0x080049bb
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
80049ac: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80049b0: f443 7300 orr.w r3, r3, #512 @ 0x200
80049b4: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
80049b8: e012 b.n 80049e0 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
80049ba: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80049be: f443 63c0 orr.w r3, r3, #1536 @ 0x600
80049c2: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
80049c6: e00b b.n 80049e0 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
80049c8: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80049cc: f443 6380 orr.w r3, r3, #1024 @ 0x400
80049d0: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
80049d4: e004 b.n 80049e0 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
80049d6: 2301 movs r3, #1
80049d8: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
80049dc: e000 b.n 80049e0 <USB_ActivateEndpoint+0x7c>
break;
80049de: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
80049e0: 687a ldr r2, [r7, #4]
80049e2: 683b ldr r3, [r7, #0]
80049e4: 781b ldrb r3, [r3, #0]
80049e6: 009b lsls r3, r3, #2
80049e8: 441a add r2, r3
80049ea: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80049ee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80049f2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80049f6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80049fa: f043 0380 orr.w r3, r3, #128 @ 0x80
80049fe: b29b uxth r3, r3
8004a00: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8004a02: 687a ldr r2, [r7, #4]
8004a04: 683b ldr r3, [r7, #0]
8004a06: 781b ldrb r3, [r3, #0]
8004a08: 009b lsls r3, r3, #2
8004a0a: 4413 add r3, r2
8004a0c: 881b ldrh r3, [r3, #0]
8004a0e: b29b uxth r3, r3
8004a10: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004a14: f023 0370 bic.w r3, r3, #112 @ 0x70
8004a18: b29b uxth r3, r3
8004a1a: 683a ldr r2, [r7, #0]
8004a1c: 7812 ldrb r2, [r2, #0]
8004a1e: 4313 orrs r3, r2
8004a20: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8004a24: 687a ldr r2, [r7, #4]
8004a26: 683b ldr r3, [r7, #0]
8004a28: 781b ldrb r3, [r3, #0]
8004a2a: 009b lsls r3, r3, #2
8004a2c: 441a add r2, r3
8004a2e: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
8004a32: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004a36: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004a3a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004a3e: f043 0380 orr.w r3, r3, #128 @ 0x80
8004a42: b29b uxth r3, r3
8004a44: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8004a46: 683b ldr r3, [r7, #0]
8004a48: 7b1b ldrb r3, [r3, #12]
8004a4a: 2b00 cmp r3, #0
8004a4c: f040 8178 bne.w 8004d40 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8004a50: 683b ldr r3, [r7, #0]
8004a52: 785b ldrb r3, [r3, #1]
8004a54: 2b00 cmp r3, #0
8004a56: f000 8084 beq.w 8004b62 <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8004a5a: 687b ldr r3, [r7, #4]
8004a5c: 61bb str r3, [r7, #24]
8004a5e: 687b ldr r3, [r7, #4]
8004a60: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004a64: b29b uxth r3, r3
8004a66: 461a mov r2, r3
8004a68: 69bb ldr r3, [r7, #24]
8004a6a: 4413 add r3, r2
8004a6c: 61bb str r3, [r7, #24]
8004a6e: 683b ldr r3, [r7, #0]
8004a70: 781b ldrb r3, [r3, #0]
8004a72: 011a lsls r2, r3, #4
8004a74: 69bb ldr r3, [r7, #24]
8004a76: 4413 add r3, r2
8004a78: f503 6380 add.w r3, r3, #1024 @ 0x400
8004a7c: 617b str r3, [r7, #20]
8004a7e: 683b ldr r3, [r7, #0]
8004a80: 88db ldrh r3, [r3, #6]
8004a82: 085b lsrs r3, r3, #1
8004a84: b29b uxth r3, r3
8004a86: 005b lsls r3, r3, #1
8004a88: b29a uxth r2, r3
8004a8a: 697b ldr r3, [r7, #20]
8004a8c: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8004a8e: 687a ldr r2, [r7, #4]
8004a90: 683b ldr r3, [r7, #0]
8004a92: 781b ldrb r3, [r3, #0]
8004a94: 009b lsls r3, r3, #2
8004a96: 4413 add r3, r2
8004a98: 881b ldrh r3, [r3, #0]
8004a9a: 827b strh r3, [r7, #18]
8004a9c: 8a7b ldrh r3, [r7, #18]
8004a9e: f003 0340 and.w r3, r3, #64 @ 0x40
8004aa2: 2b00 cmp r3, #0
8004aa4: d01b beq.n 8004ade <USB_ActivateEndpoint+0x17a>
8004aa6: 687a ldr r2, [r7, #4]
8004aa8: 683b ldr r3, [r7, #0]
8004aaa: 781b ldrb r3, [r3, #0]
8004aac: 009b lsls r3, r3, #2
8004aae: 4413 add r3, r2
8004ab0: 881b ldrh r3, [r3, #0]
8004ab2: b29b uxth r3, r3
8004ab4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004ab8: f023 0370 bic.w r3, r3, #112 @ 0x70
8004abc: 823b strh r3, [r7, #16]
8004abe: 687a ldr r2, [r7, #4]
8004ac0: 683b ldr r3, [r7, #0]
8004ac2: 781b ldrb r3, [r3, #0]
8004ac4: 009b lsls r3, r3, #2
8004ac6: 441a add r2, r3
8004ac8: 8a3b ldrh r3, [r7, #16]
8004aca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004ace: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004ad2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004ad6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004ada: b29b uxth r3, r3
8004adc: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8004ade: 683b ldr r3, [r7, #0]
8004ae0: 78db ldrb r3, [r3, #3]
8004ae2: 2b01 cmp r3, #1
8004ae4: d020 beq.n 8004b28 <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8004ae6: 687a ldr r2, [r7, #4]
8004ae8: 683b ldr r3, [r7, #0]
8004aea: 781b ldrb r3, [r3, #0]
8004aec: 009b lsls r3, r3, #2
8004aee: 4413 add r3, r2
8004af0: 881b ldrh r3, [r3, #0]
8004af2: b29b uxth r3, r3
8004af4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004af8: f023 0340 bic.w r3, r3, #64 @ 0x40
8004afc: 81bb strh r3, [r7, #12]
8004afe: 89bb ldrh r3, [r7, #12]
8004b00: f083 0320 eor.w r3, r3, #32
8004b04: 81bb strh r3, [r7, #12]
8004b06: 687a ldr r2, [r7, #4]
8004b08: 683b ldr r3, [r7, #0]
8004b0a: 781b ldrb r3, [r3, #0]
8004b0c: 009b lsls r3, r3, #2
8004b0e: 441a add r2, r3
8004b10: 89bb ldrh r3, [r7, #12]
8004b12: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004b16: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004b1a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004b1e: f043 0380 orr.w r3, r3, #128 @ 0x80
8004b22: b29b uxth r3, r3
8004b24: 8013 strh r3, [r2, #0]
8004b26: e2d5 b.n 80050d4 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004b28: 687a ldr r2, [r7, #4]
8004b2a: 683b ldr r3, [r7, #0]
8004b2c: 781b ldrb r3, [r3, #0]
8004b2e: 009b lsls r3, r3, #2
8004b30: 4413 add r3, r2
8004b32: 881b ldrh r3, [r3, #0]
8004b34: b29b uxth r3, r3
8004b36: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004b3a: f023 0340 bic.w r3, r3, #64 @ 0x40
8004b3e: 81fb strh r3, [r7, #14]
8004b40: 687a ldr r2, [r7, #4]
8004b42: 683b ldr r3, [r7, #0]
8004b44: 781b ldrb r3, [r3, #0]
8004b46: 009b lsls r3, r3, #2
8004b48: 441a add r2, r3
8004b4a: 89fb ldrh r3, [r7, #14]
8004b4c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004b50: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004b54: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004b58: f043 0380 orr.w r3, r3, #128 @ 0x80
8004b5c: b29b uxth r3, r3
8004b5e: 8013 strh r3, [r2, #0]
8004b60: e2b8 b.n 80050d4 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
8004b62: 687b ldr r3, [r7, #4]
8004b64: 633b str r3, [r7, #48] @ 0x30
8004b66: 687b ldr r3, [r7, #4]
8004b68: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004b6c: b29b uxth r3, r3
8004b6e: 461a mov r2, r3
8004b70: 6b3b ldr r3, [r7, #48] @ 0x30
8004b72: 4413 add r3, r2
8004b74: 633b str r3, [r7, #48] @ 0x30
8004b76: 683b ldr r3, [r7, #0]
8004b78: 781b ldrb r3, [r3, #0]
8004b7a: 011a lsls r2, r3, #4
8004b7c: 6b3b ldr r3, [r7, #48] @ 0x30
8004b7e: 4413 add r3, r2
8004b80: f503 6381 add.w r3, r3, #1032 @ 0x408
8004b84: 62fb str r3, [r7, #44] @ 0x2c
8004b86: 683b ldr r3, [r7, #0]
8004b88: 88db ldrh r3, [r3, #6]
8004b8a: 085b lsrs r3, r3, #1
8004b8c: b29b uxth r3, r3
8004b8e: 005b lsls r3, r3, #1
8004b90: b29a uxth r2, r3
8004b92: 6afb ldr r3, [r7, #44] @ 0x2c
8004b94: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
8004b96: 687b ldr r3, [r7, #4]
8004b98: 62bb str r3, [r7, #40] @ 0x28
8004b9a: 687b ldr r3, [r7, #4]
8004b9c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004ba0: b29b uxth r3, r3
8004ba2: 461a mov r2, r3
8004ba4: 6abb ldr r3, [r7, #40] @ 0x28
8004ba6: 4413 add r3, r2
8004ba8: 62bb str r3, [r7, #40] @ 0x28
8004baa: 683b ldr r3, [r7, #0]
8004bac: 781b ldrb r3, [r3, #0]
8004bae: 011a lsls r2, r3, #4
8004bb0: 6abb ldr r3, [r7, #40] @ 0x28
8004bb2: 4413 add r3, r2
8004bb4: f203 430c addw r3, r3, #1036 @ 0x40c
8004bb8: 627b str r3, [r7, #36] @ 0x24
8004bba: 6a7b ldr r3, [r7, #36] @ 0x24
8004bbc: 881b ldrh r3, [r3, #0]
8004bbe: b29b uxth r3, r3
8004bc0: f3c3 0309 ubfx r3, r3, #0, #10
8004bc4: b29a uxth r2, r3
8004bc6: 6a7b ldr r3, [r7, #36] @ 0x24
8004bc8: 801a strh r2, [r3, #0]
8004bca: 683b ldr r3, [r7, #0]
8004bcc: 691b ldr r3, [r3, #16]
8004bce: 2b3e cmp r3, #62 @ 0x3e
8004bd0: d91d bls.n 8004c0e <USB_ActivateEndpoint+0x2aa>
8004bd2: 683b ldr r3, [r7, #0]
8004bd4: 691b ldr r3, [r3, #16]
8004bd6: 095b lsrs r3, r3, #5
8004bd8: 66bb str r3, [r7, #104] @ 0x68
8004bda: 683b ldr r3, [r7, #0]
8004bdc: 691b ldr r3, [r3, #16]
8004bde: f003 031f and.w r3, r3, #31
8004be2: 2b00 cmp r3, #0
8004be4: d102 bne.n 8004bec <USB_ActivateEndpoint+0x288>
8004be6: 6ebb ldr r3, [r7, #104] @ 0x68
8004be8: 3b01 subs r3, #1
8004bea: 66bb str r3, [r7, #104] @ 0x68
8004bec: 6a7b ldr r3, [r7, #36] @ 0x24
8004bee: 881b ldrh r3, [r3, #0]
8004bf0: b29a uxth r2, r3
8004bf2: 6ebb ldr r3, [r7, #104] @ 0x68
8004bf4: b29b uxth r3, r3
8004bf6: 029b lsls r3, r3, #10
8004bf8: b29b uxth r3, r3
8004bfa: 4313 orrs r3, r2
8004bfc: b29b uxth r3, r3
8004bfe: ea6f 4343 mvn.w r3, r3, lsl #17
8004c02: ea6f 4353 mvn.w r3, r3, lsr #17
8004c06: b29a uxth r2, r3
8004c08: 6a7b ldr r3, [r7, #36] @ 0x24
8004c0a: 801a strh r2, [r3, #0]
8004c0c: e026 b.n 8004c5c <USB_ActivateEndpoint+0x2f8>
8004c0e: 683b ldr r3, [r7, #0]
8004c10: 691b ldr r3, [r3, #16]
8004c12: 2b00 cmp r3, #0
8004c14: d10a bne.n 8004c2c <USB_ActivateEndpoint+0x2c8>
8004c16: 6a7b ldr r3, [r7, #36] @ 0x24
8004c18: 881b ldrh r3, [r3, #0]
8004c1a: b29b uxth r3, r3
8004c1c: ea6f 4343 mvn.w r3, r3, lsl #17
8004c20: ea6f 4353 mvn.w r3, r3, lsr #17
8004c24: b29a uxth r2, r3
8004c26: 6a7b ldr r3, [r7, #36] @ 0x24
8004c28: 801a strh r2, [r3, #0]
8004c2a: e017 b.n 8004c5c <USB_ActivateEndpoint+0x2f8>
8004c2c: 683b ldr r3, [r7, #0]
8004c2e: 691b ldr r3, [r3, #16]
8004c30: 085b lsrs r3, r3, #1
8004c32: 66bb str r3, [r7, #104] @ 0x68
8004c34: 683b ldr r3, [r7, #0]
8004c36: 691b ldr r3, [r3, #16]
8004c38: f003 0301 and.w r3, r3, #1
8004c3c: 2b00 cmp r3, #0
8004c3e: d002 beq.n 8004c46 <USB_ActivateEndpoint+0x2e2>
8004c40: 6ebb ldr r3, [r7, #104] @ 0x68
8004c42: 3301 adds r3, #1
8004c44: 66bb str r3, [r7, #104] @ 0x68
8004c46: 6a7b ldr r3, [r7, #36] @ 0x24
8004c48: 881b ldrh r3, [r3, #0]
8004c4a: b29a uxth r2, r3
8004c4c: 6ebb ldr r3, [r7, #104] @ 0x68
8004c4e: b29b uxth r3, r3
8004c50: 029b lsls r3, r3, #10
8004c52: b29b uxth r3, r3
8004c54: 4313 orrs r3, r2
8004c56: b29a uxth r2, r3
8004c58: 6a7b ldr r3, [r7, #36] @ 0x24
8004c5a: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004c5c: 687a ldr r2, [r7, #4]
8004c5e: 683b ldr r3, [r7, #0]
8004c60: 781b ldrb r3, [r3, #0]
8004c62: 009b lsls r3, r3, #2
8004c64: 4413 add r3, r2
8004c66: 881b ldrh r3, [r3, #0]
8004c68: 847b strh r3, [r7, #34] @ 0x22
8004c6a: 8c7b ldrh r3, [r7, #34] @ 0x22
8004c6c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004c70: 2b00 cmp r3, #0
8004c72: d01b beq.n 8004cac <USB_ActivateEndpoint+0x348>
8004c74: 687a ldr r2, [r7, #4]
8004c76: 683b ldr r3, [r7, #0]
8004c78: 781b ldrb r3, [r3, #0]
8004c7a: 009b lsls r3, r3, #2
8004c7c: 4413 add r3, r2
8004c7e: 881b ldrh r3, [r3, #0]
8004c80: b29b uxth r3, r3
8004c82: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004c86: f023 0370 bic.w r3, r3, #112 @ 0x70
8004c8a: 843b strh r3, [r7, #32]
8004c8c: 687a ldr r2, [r7, #4]
8004c8e: 683b ldr r3, [r7, #0]
8004c90: 781b ldrb r3, [r3, #0]
8004c92: 009b lsls r3, r3, #2
8004c94: 441a add r2, r3
8004c96: 8c3b ldrh r3, [r7, #32]
8004c98: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004c9c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004ca0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004ca4: f043 0380 orr.w r3, r3, #128 @ 0x80
8004ca8: b29b uxth r3, r3
8004caa: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8004cac: 683b ldr r3, [r7, #0]
8004cae: 781b ldrb r3, [r3, #0]
8004cb0: 2b00 cmp r3, #0
8004cb2: d124 bne.n 8004cfe <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8004cb4: 687a ldr r2, [r7, #4]
8004cb6: 683b ldr r3, [r7, #0]
8004cb8: 781b ldrb r3, [r3, #0]
8004cba: 009b lsls r3, r3, #2
8004cbc: 4413 add r3, r2
8004cbe: 881b ldrh r3, [r3, #0]
8004cc0: b29b uxth r3, r3
8004cc2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004cc6: f023 0370 bic.w r3, r3, #112 @ 0x70
8004cca: 83bb strh r3, [r7, #28]
8004ccc: 8bbb ldrh r3, [r7, #28]
8004cce: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8004cd2: 83bb strh r3, [r7, #28]
8004cd4: 8bbb ldrh r3, [r7, #28]
8004cd6: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8004cda: 83bb strh r3, [r7, #28]
8004cdc: 687a ldr r2, [r7, #4]
8004cde: 683b ldr r3, [r7, #0]
8004ce0: 781b ldrb r3, [r3, #0]
8004ce2: 009b lsls r3, r3, #2
8004ce4: 441a add r2, r3
8004ce6: 8bbb ldrh r3, [r7, #28]
8004ce8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004cec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004cf0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004cf4: f043 0380 orr.w r3, r3, #128 @ 0x80
8004cf8: b29b uxth r3, r3
8004cfa: 8013 strh r3, [r2, #0]
8004cfc: e1ea b.n 80050d4 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8004cfe: 687a ldr r2, [r7, #4]
8004d00: 683b ldr r3, [r7, #0]
8004d02: 781b ldrb r3, [r3, #0]
8004d04: 009b lsls r3, r3, #2
8004d06: 4413 add r3, r2
8004d08: 881b ldrh r3, [r3, #0]
8004d0a: b29b uxth r3, r3
8004d0c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004d10: f023 0370 bic.w r3, r3, #112 @ 0x70
8004d14: 83fb strh r3, [r7, #30]
8004d16: 8bfb ldrh r3, [r7, #30]
8004d18: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8004d1c: 83fb strh r3, [r7, #30]
8004d1e: 687a ldr r2, [r7, #4]
8004d20: 683b ldr r3, [r7, #0]
8004d22: 781b ldrb r3, [r3, #0]
8004d24: 009b lsls r3, r3, #2
8004d26: 441a add r2, r3
8004d28: 8bfb ldrh r3, [r7, #30]
8004d2a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004d2e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004d32: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004d36: f043 0380 orr.w r3, r3, #128 @ 0x80
8004d3a: b29b uxth r3, r3
8004d3c: 8013 strh r3, [r2, #0]
8004d3e: e1c9 b.n 80050d4 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
8004d40: 683b ldr r3, [r7, #0]
8004d42: 78db ldrb r3, [r3, #3]
8004d44: 2b02 cmp r3, #2
8004d46: d11e bne.n 8004d86 <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8004d48: 687a ldr r2, [r7, #4]
8004d4a: 683b ldr r3, [r7, #0]
8004d4c: 781b ldrb r3, [r3, #0]
8004d4e: 009b lsls r3, r3, #2
8004d50: 4413 add r3, r2
8004d52: 881b ldrh r3, [r3, #0]
8004d54: b29b uxth r3, r3
8004d56: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004d5a: f023 0370 bic.w r3, r3, #112 @ 0x70
8004d5e: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
8004d62: 687a ldr r2, [r7, #4]
8004d64: 683b ldr r3, [r7, #0]
8004d66: 781b ldrb r3, [r3, #0]
8004d68: 009b lsls r3, r3, #2
8004d6a: 441a add r2, r3
8004d6c: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8004d70: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004d74: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004d78: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8004d7c: f043 0380 orr.w r3, r3, #128 @ 0x80
8004d80: b29b uxth r3, r3
8004d82: 8013 strh r3, [r2, #0]
8004d84: e01d b.n 8004dc2 <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
8004d86: 687a ldr r2, [r7, #4]
8004d88: 683b ldr r3, [r7, #0]
8004d8a: 781b ldrb r3, [r3, #0]
8004d8c: 009b lsls r3, r3, #2
8004d8e: 4413 add r3, r2
8004d90: 881b ldrh r3, [r3, #0]
8004d92: b29b uxth r3, r3
8004d94: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8004d98: f023 0370 bic.w r3, r3, #112 @ 0x70
8004d9c: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
8004da0: 687a ldr r2, [r7, #4]
8004da2: 683b ldr r3, [r7, #0]
8004da4: 781b ldrb r3, [r3, #0]
8004da6: 009b lsls r3, r3, #2
8004da8: 441a add r2, r3
8004daa: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8004dae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004db2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004db6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004dba: f043 0380 orr.w r3, r3, #128 @ 0x80
8004dbe: b29b uxth r3, r3
8004dc0: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
8004dc2: 687b ldr r3, [r7, #4]
8004dc4: 65fb str r3, [r7, #92] @ 0x5c
8004dc6: 687b ldr r3, [r7, #4]
8004dc8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004dcc: b29b uxth r3, r3
8004dce: 461a mov r2, r3
8004dd0: 6dfb ldr r3, [r7, #92] @ 0x5c
8004dd2: 4413 add r3, r2
8004dd4: 65fb str r3, [r7, #92] @ 0x5c
8004dd6: 683b ldr r3, [r7, #0]
8004dd8: 781b ldrb r3, [r3, #0]
8004dda: 011a lsls r2, r3, #4
8004ddc: 6dfb ldr r3, [r7, #92] @ 0x5c
8004dde: 4413 add r3, r2
8004de0: f503 6380 add.w r3, r3, #1024 @ 0x400
8004de4: 65bb str r3, [r7, #88] @ 0x58
8004de6: 683b ldr r3, [r7, #0]
8004de8: 891b ldrh r3, [r3, #8]
8004dea: 085b lsrs r3, r3, #1
8004dec: b29b uxth r3, r3
8004dee: 005b lsls r3, r3, #1
8004df0: b29a uxth r2, r3
8004df2: 6dbb ldr r3, [r7, #88] @ 0x58
8004df4: 801a strh r2, [r3, #0]
8004df6: 687b ldr r3, [r7, #4]
8004df8: 657b str r3, [r7, #84] @ 0x54
8004dfa: 687b ldr r3, [r7, #4]
8004dfc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004e00: b29b uxth r3, r3
8004e02: 461a mov r2, r3
8004e04: 6d7b ldr r3, [r7, #84] @ 0x54
8004e06: 4413 add r3, r2
8004e08: 657b str r3, [r7, #84] @ 0x54
8004e0a: 683b ldr r3, [r7, #0]
8004e0c: 781b ldrb r3, [r3, #0]
8004e0e: 011a lsls r2, r3, #4
8004e10: 6d7b ldr r3, [r7, #84] @ 0x54
8004e12: 4413 add r3, r2
8004e14: f503 6381 add.w r3, r3, #1032 @ 0x408
8004e18: 653b str r3, [r7, #80] @ 0x50
8004e1a: 683b ldr r3, [r7, #0]
8004e1c: 895b ldrh r3, [r3, #10]
8004e1e: 085b lsrs r3, r3, #1
8004e20: b29b uxth r3, r3
8004e22: 005b lsls r3, r3, #1
8004e24: b29a uxth r2, r3
8004e26: 6d3b ldr r3, [r7, #80] @ 0x50
8004e28: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
8004e2a: 683b ldr r3, [r7, #0]
8004e2c: 785b ldrb r3, [r3, #1]
8004e2e: 2b00 cmp r3, #0
8004e30: f040 8093 bne.w 8004f5a <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004e34: 687a ldr r2, [r7, #4]
8004e36: 683b ldr r3, [r7, #0]
8004e38: 781b ldrb r3, [r3, #0]
8004e3a: 009b lsls r3, r3, #2
8004e3c: 4413 add r3, r2
8004e3e: 881b ldrh r3, [r3, #0]
8004e40: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
8004e44: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8004e48: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004e4c: 2b00 cmp r3, #0
8004e4e: d01b beq.n 8004e88 <USB_ActivateEndpoint+0x524>
8004e50: 687a ldr r2, [r7, #4]
8004e52: 683b ldr r3, [r7, #0]
8004e54: 781b ldrb r3, [r3, #0]
8004e56: 009b lsls r3, r3, #2
8004e58: 4413 add r3, r2
8004e5a: 881b ldrh r3, [r3, #0]
8004e5c: b29b uxth r3, r3
8004e5e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004e62: f023 0370 bic.w r3, r3, #112 @ 0x70
8004e66: 87fb strh r3, [r7, #62] @ 0x3e
8004e68: 687a ldr r2, [r7, #4]
8004e6a: 683b ldr r3, [r7, #0]
8004e6c: 781b ldrb r3, [r3, #0]
8004e6e: 009b lsls r3, r3, #2
8004e70: 441a add r2, r3
8004e72: 8ffb ldrh r3, [r7, #62] @ 0x3e
8004e74: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004e78: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004e7c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004e80: f043 0380 orr.w r3, r3, #128 @ 0x80
8004e84: b29b uxth r3, r3
8004e86: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8004e88: 687a ldr r2, [r7, #4]
8004e8a: 683b ldr r3, [r7, #0]
8004e8c: 781b ldrb r3, [r3, #0]
8004e8e: 009b lsls r3, r3, #2
8004e90: 4413 add r3, r2
8004e92: 881b ldrh r3, [r3, #0]
8004e94: 87bb strh r3, [r7, #60] @ 0x3c
8004e96: 8fbb ldrh r3, [r7, #60] @ 0x3c
8004e98: f003 0340 and.w r3, r3, #64 @ 0x40
8004e9c: 2b00 cmp r3, #0
8004e9e: d01b beq.n 8004ed8 <USB_ActivateEndpoint+0x574>
8004ea0: 687a ldr r2, [r7, #4]
8004ea2: 683b ldr r3, [r7, #0]
8004ea4: 781b ldrb r3, [r3, #0]
8004ea6: 009b lsls r3, r3, #2
8004ea8: 4413 add r3, r2
8004eaa: 881b ldrh r3, [r3, #0]
8004eac: b29b uxth r3, r3
8004eae: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004eb2: f023 0370 bic.w r3, r3, #112 @ 0x70
8004eb6: 877b strh r3, [r7, #58] @ 0x3a
8004eb8: 687a ldr r2, [r7, #4]
8004eba: 683b ldr r3, [r7, #0]
8004ebc: 781b ldrb r3, [r3, #0]
8004ebe: 009b lsls r3, r3, #2
8004ec0: 441a add r2, r3
8004ec2: 8f7b ldrh r3, [r7, #58] @ 0x3a
8004ec4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004ec8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004ecc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004ed0: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004ed4: b29b uxth r3, r3
8004ed6: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8004ed8: 687a ldr r2, [r7, #4]
8004eda: 683b ldr r3, [r7, #0]
8004edc: 781b ldrb r3, [r3, #0]
8004ede: 009b lsls r3, r3, #2
8004ee0: 4413 add r3, r2
8004ee2: 881b ldrh r3, [r3, #0]
8004ee4: b29b uxth r3, r3
8004ee6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004eea: f023 0370 bic.w r3, r3, #112 @ 0x70
8004eee: 873b strh r3, [r7, #56] @ 0x38
8004ef0: 8f3b ldrh r3, [r7, #56] @ 0x38
8004ef2: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8004ef6: 873b strh r3, [r7, #56] @ 0x38
8004ef8: 8f3b ldrh r3, [r7, #56] @ 0x38
8004efa: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8004efe: 873b strh r3, [r7, #56] @ 0x38
8004f00: 687a ldr r2, [r7, #4]
8004f02: 683b ldr r3, [r7, #0]
8004f04: 781b ldrb r3, [r3, #0]
8004f06: 009b lsls r3, r3, #2
8004f08: 441a add r2, r3
8004f0a: 8f3b ldrh r3, [r7, #56] @ 0x38
8004f0c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004f10: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004f14: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004f18: f043 0380 orr.w r3, r3, #128 @ 0x80
8004f1c: b29b uxth r3, r3
8004f1e: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004f20: 687a ldr r2, [r7, #4]
8004f22: 683b ldr r3, [r7, #0]
8004f24: 781b ldrb r3, [r3, #0]
8004f26: 009b lsls r3, r3, #2
8004f28: 4413 add r3, r2
8004f2a: 881b ldrh r3, [r3, #0]
8004f2c: b29b uxth r3, r3
8004f2e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004f32: f023 0340 bic.w r3, r3, #64 @ 0x40
8004f36: 86fb strh r3, [r7, #54] @ 0x36
8004f38: 687a ldr r2, [r7, #4]
8004f3a: 683b ldr r3, [r7, #0]
8004f3c: 781b ldrb r3, [r3, #0]
8004f3e: 009b lsls r3, r3, #2
8004f40: 441a add r2, r3
8004f42: 8efb ldrh r3, [r7, #54] @ 0x36
8004f44: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004f48: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004f4c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004f50: f043 0380 orr.w r3, r3, #128 @ 0x80
8004f54: b29b uxth r3, r3
8004f56: 8013 strh r3, [r2, #0]
8004f58: e0bc b.n 80050d4 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004f5a: 687a ldr r2, [r7, #4]
8004f5c: 683b ldr r3, [r7, #0]
8004f5e: 781b ldrb r3, [r3, #0]
8004f60: 009b lsls r3, r3, #2
8004f62: 4413 add r3, r2
8004f64: 881b ldrh r3, [r3, #0]
8004f66: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8004f6a: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8004f6e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004f72: 2b00 cmp r3, #0
8004f74: d01d beq.n 8004fb2 <USB_ActivateEndpoint+0x64e>
8004f76: 687a ldr r2, [r7, #4]
8004f78: 683b ldr r3, [r7, #0]
8004f7a: 781b ldrb r3, [r3, #0]
8004f7c: 009b lsls r3, r3, #2
8004f7e: 4413 add r3, r2
8004f80: 881b ldrh r3, [r3, #0]
8004f82: b29b uxth r3, r3
8004f84: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004f88: f023 0370 bic.w r3, r3, #112 @ 0x70
8004f8c: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
8004f90: 687a ldr r2, [r7, #4]
8004f92: 683b ldr r3, [r7, #0]
8004f94: 781b ldrb r3, [r3, #0]
8004f96: 009b lsls r3, r3, #2
8004f98: 441a add r2, r3
8004f9a: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
8004f9e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004fa2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004fa6: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004faa: f043 0380 orr.w r3, r3, #128 @ 0x80
8004fae: b29b uxth r3, r3
8004fb0: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8004fb2: 687a ldr r2, [r7, #4]
8004fb4: 683b ldr r3, [r7, #0]
8004fb6: 781b ldrb r3, [r3, #0]
8004fb8: 009b lsls r3, r3, #2
8004fba: 4413 add r3, r2
8004fbc: 881b ldrh r3, [r3, #0]
8004fbe: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
8004fc2: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8004fc6: f003 0340 and.w r3, r3, #64 @ 0x40
8004fca: 2b00 cmp r3, #0
8004fcc: d01d beq.n 800500a <USB_ActivateEndpoint+0x6a6>
8004fce: 687a ldr r2, [r7, #4]
8004fd0: 683b ldr r3, [r7, #0]
8004fd2: 781b ldrb r3, [r3, #0]
8004fd4: 009b lsls r3, r3, #2
8004fd6: 4413 add r3, r2
8004fd8: 881b ldrh r3, [r3, #0]
8004fda: b29b uxth r3, r3
8004fdc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004fe0: f023 0370 bic.w r3, r3, #112 @ 0x70
8004fe4: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8004fe8: 687a ldr r2, [r7, #4]
8004fea: 683b ldr r3, [r7, #0]
8004fec: 781b ldrb r3, [r3, #0]
8004fee: 009b lsls r3, r3, #2
8004ff0: 441a add r2, r3
8004ff2: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
8004ff6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004ffa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004ffe: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005002: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8005006: b29b uxth r3, r3
8005008: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800500a: 683b ldr r3, [r7, #0]
800500c: 78db ldrb r3, [r3, #3]
800500e: 2b01 cmp r3, #1
8005010: d024 beq.n 800505c <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8005012: 687a ldr r2, [r7, #4]
8005014: 683b ldr r3, [r7, #0]
8005016: 781b ldrb r3, [r3, #0]
8005018: 009b lsls r3, r3, #2
800501a: 4413 add r3, r2
800501c: 881b ldrh r3, [r3, #0]
800501e: b29b uxth r3, r3
8005020: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005024: f023 0340 bic.w r3, r3, #64 @ 0x40
8005028: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800502c: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8005030: f083 0320 eor.w r3, r3, #32
8005034: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8005038: 687a ldr r2, [r7, #4]
800503a: 683b ldr r3, [r7, #0]
800503c: 781b ldrb r3, [r3, #0]
800503e: 009b lsls r3, r3, #2
8005040: 441a add r2, r3
8005042: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8005046: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800504a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800504e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005052: f043 0380 orr.w r3, r3, #128 @ 0x80
8005056: b29b uxth r3, r3
8005058: 8013 strh r3, [r2, #0]
800505a: e01d b.n 8005098 <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800505c: 687a ldr r2, [r7, #4]
800505e: 683b ldr r3, [r7, #0]
8005060: 781b ldrb r3, [r3, #0]
8005062: 009b lsls r3, r3, #2
8005064: 4413 add r3, r2
8005066: 881b ldrh r3, [r3, #0]
8005068: b29b uxth r3, r3
800506a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800506e: f023 0340 bic.w r3, r3, #64 @ 0x40
8005072: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
8005076: 687a ldr r2, [r7, #4]
8005078: 683b ldr r3, [r7, #0]
800507a: 781b ldrb r3, [r3, #0]
800507c: 009b lsls r3, r3, #2
800507e: 441a add r2, r3
8005080: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8005084: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005088: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800508c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005090: f043 0380 orr.w r3, r3, #128 @ 0x80
8005094: b29b uxth r3, r3
8005096: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005098: 687a ldr r2, [r7, #4]
800509a: 683b ldr r3, [r7, #0]
800509c: 781b ldrb r3, [r3, #0]
800509e: 009b lsls r3, r3, #2
80050a0: 4413 add r3, r2
80050a2: 881b ldrh r3, [r3, #0]
80050a4: b29b uxth r3, r3
80050a6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80050aa: f023 0370 bic.w r3, r3, #112 @ 0x70
80050ae: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80050b2: 687a ldr r2, [r7, #4]
80050b4: 683b ldr r3, [r7, #0]
80050b6: 781b ldrb r3, [r3, #0]
80050b8: 009b lsls r3, r3, #2
80050ba: 441a add r2, r3
80050bc: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
80050c0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80050c4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80050c8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80050cc: f043 0380 orr.w r3, r3, #128 @ 0x80
80050d0: b29b uxth r3, r3
80050d2: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
80050d4: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
80050d8: 4618 mov r0, r3
80050da: 3774 adds r7, #116 @ 0x74
80050dc: 46bd mov sp, r7
80050de: bc80 pop {r7}
80050e0: 4770 bx lr
80050e2: bf00 nop
080050e4 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80050e4: b480 push {r7}
80050e6: b08d sub sp, #52 @ 0x34
80050e8: af00 add r7, sp, #0
80050ea: 6078 str r0, [r7, #4]
80050ec: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
80050ee: 683b ldr r3, [r7, #0]
80050f0: 7b1b ldrb r3, [r3, #12]
80050f2: 2b00 cmp r3, #0
80050f4: f040 808e bne.w 8005214 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
80050f8: 683b ldr r3, [r7, #0]
80050fa: 785b ldrb r3, [r3, #1]
80050fc: 2b00 cmp r3, #0
80050fe: d044 beq.n 800518a <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005100: 687a ldr r2, [r7, #4]
8005102: 683b ldr r3, [r7, #0]
8005104: 781b ldrb r3, [r3, #0]
8005106: 009b lsls r3, r3, #2
8005108: 4413 add r3, r2
800510a: 881b ldrh r3, [r3, #0]
800510c: 81bb strh r3, [r7, #12]
800510e: 89bb ldrh r3, [r7, #12]
8005110: f003 0340 and.w r3, r3, #64 @ 0x40
8005114: 2b00 cmp r3, #0
8005116: d01b beq.n 8005150 <USB_DeactivateEndpoint+0x6c>
8005118: 687a ldr r2, [r7, #4]
800511a: 683b ldr r3, [r7, #0]
800511c: 781b ldrb r3, [r3, #0]
800511e: 009b lsls r3, r3, #2
8005120: 4413 add r3, r2
8005122: 881b ldrh r3, [r3, #0]
8005124: b29b uxth r3, r3
8005126: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800512a: f023 0370 bic.w r3, r3, #112 @ 0x70
800512e: 817b strh r3, [r7, #10]
8005130: 687a ldr r2, [r7, #4]
8005132: 683b ldr r3, [r7, #0]
8005134: 781b ldrb r3, [r3, #0]
8005136: 009b lsls r3, r3, #2
8005138: 441a add r2, r3
800513a: 897b ldrh r3, [r7, #10]
800513c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005140: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005144: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005148: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800514c: b29b uxth r3, r3
800514e: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005150: 687a ldr r2, [r7, #4]
8005152: 683b ldr r3, [r7, #0]
8005154: 781b ldrb r3, [r3, #0]
8005156: 009b lsls r3, r3, #2
8005158: 4413 add r3, r2
800515a: 881b ldrh r3, [r3, #0]
800515c: b29b uxth r3, r3
800515e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005162: f023 0340 bic.w r3, r3, #64 @ 0x40
8005166: 813b strh r3, [r7, #8]
8005168: 687a ldr r2, [r7, #4]
800516a: 683b ldr r3, [r7, #0]
800516c: 781b ldrb r3, [r3, #0]
800516e: 009b lsls r3, r3, #2
8005170: 441a add r2, r3
8005172: 893b ldrh r3, [r7, #8]
8005174: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005178: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800517c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005180: f043 0380 orr.w r3, r3, #128 @ 0x80
8005184: b29b uxth r3, r3
8005186: 8013 strh r3, [r2, #0]
8005188: e192 b.n 80054b0 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800518a: 687a ldr r2, [r7, #4]
800518c: 683b ldr r3, [r7, #0]
800518e: 781b ldrb r3, [r3, #0]
8005190: 009b lsls r3, r3, #2
8005192: 4413 add r3, r2
8005194: 881b ldrh r3, [r3, #0]
8005196: 827b strh r3, [r7, #18]
8005198: 8a7b ldrh r3, [r7, #18]
800519a: f403 4380 and.w r3, r3, #16384 @ 0x4000
800519e: 2b00 cmp r3, #0
80051a0: d01b beq.n 80051da <USB_DeactivateEndpoint+0xf6>
80051a2: 687a ldr r2, [r7, #4]
80051a4: 683b ldr r3, [r7, #0]
80051a6: 781b ldrb r3, [r3, #0]
80051a8: 009b lsls r3, r3, #2
80051aa: 4413 add r3, r2
80051ac: 881b ldrh r3, [r3, #0]
80051ae: b29b uxth r3, r3
80051b0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80051b4: f023 0370 bic.w r3, r3, #112 @ 0x70
80051b8: 823b strh r3, [r7, #16]
80051ba: 687a ldr r2, [r7, #4]
80051bc: 683b ldr r3, [r7, #0]
80051be: 781b ldrb r3, [r3, #0]
80051c0: 009b lsls r3, r3, #2
80051c2: 441a add r2, r3
80051c4: 8a3b ldrh r3, [r7, #16]
80051c6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80051ca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80051ce: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80051d2: f043 0380 orr.w r3, r3, #128 @ 0x80
80051d6: b29b uxth r3, r3
80051d8: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80051da: 687a ldr r2, [r7, #4]
80051dc: 683b ldr r3, [r7, #0]
80051de: 781b ldrb r3, [r3, #0]
80051e0: 009b lsls r3, r3, #2
80051e2: 4413 add r3, r2
80051e4: 881b ldrh r3, [r3, #0]
80051e6: b29b uxth r3, r3
80051e8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80051ec: f023 0370 bic.w r3, r3, #112 @ 0x70
80051f0: 81fb strh r3, [r7, #14]
80051f2: 687a ldr r2, [r7, #4]
80051f4: 683b ldr r3, [r7, #0]
80051f6: 781b ldrb r3, [r3, #0]
80051f8: 009b lsls r3, r3, #2
80051fa: 441a add r2, r3
80051fc: 89fb ldrh r3, [r7, #14]
80051fe: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005202: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005206: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800520a: f043 0380 orr.w r3, r3, #128 @ 0x80
800520e: b29b uxth r3, r3
8005210: 8013 strh r3, [r2, #0]
8005212: e14d b.n 80054b0 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
8005214: 683b ldr r3, [r7, #0]
8005216: 785b ldrb r3, [r3, #1]
8005218: 2b00 cmp r3, #0
800521a: f040 80a5 bne.w 8005368 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800521e: 687a ldr r2, [r7, #4]
8005220: 683b ldr r3, [r7, #0]
8005222: 781b ldrb r3, [r3, #0]
8005224: 009b lsls r3, r3, #2
8005226: 4413 add r3, r2
8005228: 881b ldrh r3, [r3, #0]
800522a: 843b strh r3, [r7, #32]
800522c: 8c3b ldrh r3, [r7, #32]
800522e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8005232: 2b00 cmp r3, #0
8005234: d01b beq.n 800526e <USB_DeactivateEndpoint+0x18a>
8005236: 687a ldr r2, [r7, #4]
8005238: 683b ldr r3, [r7, #0]
800523a: 781b ldrb r3, [r3, #0]
800523c: 009b lsls r3, r3, #2
800523e: 4413 add r3, r2
8005240: 881b ldrh r3, [r3, #0]
8005242: b29b uxth r3, r3
8005244: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005248: f023 0370 bic.w r3, r3, #112 @ 0x70
800524c: 83fb strh r3, [r7, #30]
800524e: 687a ldr r2, [r7, #4]
8005250: 683b ldr r3, [r7, #0]
8005252: 781b ldrb r3, [r3, #0]
8005254: 009b lsls r3, r3, #2
8005256: 441a add r2, r3
8005258: 8bfb ldrh r3, [r7, #30]
800525a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800525e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005262: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8005266: f043 0380 orr.w r3, r3, #128 @ 0x80
800526a: b29b uxth r3, r3
800526c: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800526e: 687a ldr r2, [r7, #4]
8005270: 683b ldr r3, [r7, #0]
8005272: 781b ldrb r3, [r3, #0]
8005274: 009b lsls r3, r3, #2
8005276: 4413 add r3, r2
8005278: 881b ldrh r3, [r3, #0]
800527a: 83bb strh r3, [r7, #28]
800527c: 8bbb ldrh r3, [r7, #28]
800527e: f003 0340 and.w r3, r3, #64 @ 0x40
8005282: 2b00 cmp r3, #0
8005284: d01b beq.n 80052be <USB_DeactivateEndpoint+0x1da>
8005286: 687a ldr r2, [r7, #4]
8005288: 683b ldr r3, [r7, #0]
800528a: 781b ldrb r3, [r3, #0]
800528c: 009b lsls r3, r3, #2
800528e: 4413 add r3, r2
8005290: 881b ldrh r3, [r3, #0]
8005292: b29b uxth r3, r3
8005294: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005298: f023 0370 bic.w r3, r3, #112 @ 0x70
800529c: 837b strh r3, [r7, #26]
800529e: 687a ldr r2, [r7, #4]
80052a0: 683b ldr r3, [r7, #0]
80052a2: 781b ldrb r3, [r3, #0]
80052a4: 009b lsls r3, r3, #2
80052a6: 441a add r2, r3
80052a8: 8b7b ldrh r3, [r7, #26]
80052aa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80052ae: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80052b2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80052b6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80052ba: b29b uxth r3, r3
80052bc: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
80052be: 687a ldr r2, [r7, #4]
80052c0: 683b ldr r3, [r7, #0]
80052c2: 781b ldrb r3, [r3, #0]
80052c4: 009b lsls r3, r3, #2
80052c6: 4413 add r3, r2
80052c8: 881b ldrh r3, [r3, #0]
80052ca: b29b uxth r3, r3
80052cc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80052d0: f023 0370 bic.w r3, r3, #112 @ 0x70
80052d4: 833b strh r3, [r7, #24]
80052d6: 687a ldr r2, [r7, #4]
80052d8: 683b ldr r3, [r7, #0]
80052da: 781b ldrb r3, [r3, #0]
80052dc: 009b lsls r3, r3, #2
80052de: 441a add r2, r3
80052e0: 8b3b ldrh r3, [r7, #24]
80052e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80052e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80052ea: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80052ee: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80052f2: b29b uxth r3, r3
80052f4: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80052f6: 687a ldr r2, [r7, #4]
80052f8: 683b ldr r3, [r7, #0]
80052fa: 781b ldrb r3, [r3, #0]
80052fc: 009b lsls r3, r3, #2
80052fe: 4413 add r3, r2
8005300: 881b ldrh r3, [r3, #0]
8005302: b29b uxth r3, r3
8005304: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8005308: f023 0370 bic.w r3, r3, #112 @ 0x70
800530c: 82fb strh r3, [r7, #22]
800530e: 687a ldr r2, [r7, #4]
8005310: 683b ldr r3, [r7, #0]
8005312: 781b ldrb r3, [r3, #0]
8005314: 009b lsls r3, r3, #2
8005316: 441a add r2, r3
8005318: 8afb ldrh r3, [r7, #22]
800531a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800531e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005322: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005326: f043 0380 orr.w r3, r3, #128 @ 0x80
800532a: b29b uxth r3, r3
800532c: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800532e: 687a ldr r2, [r7, #4]
8005330: 683b ldr r3, [r7, #0]
8005332: 781b ldrb r3, [r3, #0]
8005334: 009b lsls r3, r3, #2
8005336: 4413 add r3, r2
8005338: 881b ldrh r3, [r3, #0]
800533a: b29b uxth r3, r3
800533c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005340: f023 0340 bic.w r3, r3, #64 @ 0x40
8005344: 82bb strh r3, [r7, #20]
8005346: 687a ldr r2, [r7, #4]
8005348: 683b ldr r3, [r7, #0]
800534a: 781b ldrb r3, [r3, #0]
800534c: 009b lsls r3, r3, #2
800534e: 441a add r2, r3
8005350: 8abb ldrh r3, [r7, #20]
8005352: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005356: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800535a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800535e: f043 0380 orr.w r3, r3, #128 @ 0x80
8005362: b29b uxth r3, r3
8005364: 8013 strh r3, [r2, #0]
8005366: e0a3 b.n 80054b0 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005368: 687a ldr r2, [r7, #4]
800536a: 683b ldr r3, [r7, #0]
800536c: 781b ldrb r3, [r3, #0]
800536e: 009b lsls r3, r3, #2
8005370: 4413 add r3, r2
8005372: 881b ldrh r3, [r3, #0]
8005374: 85fb strh r3, [r7, #46] @ 0x2e
8005376: 8dfb ldrh r3, [r7, #46] @ 0x2e
8005378: f403 4380 and.w r3, r3, #16384 @ 0x4000
800537c: 2b00 cmp r3, #0
800537e: d01b beq.n 80053b8 <USB_DeactivateEndpoint+0x2d4>
8005380: 687a ldr r2, [r7, #4]
8005382: 683b ldr r3, [r7, #0]
8005384: 781b ldrb r3, [r3, #0]
8005386: 009b lsls r3, r3, #2
8005388: 4413 add r3, r2
800538a: 881b ldrh r3, [r3, #0]
800538c: b29b uxth r3, r3
800538e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005392: f023 0370 bic.w r3, r3, #112 @ 0x70
8005396: 85bb strh r3, [r7, #44] @ 0x2c
8005398: 687a ldr r2, [r7, #4]
800539a: 683b ldr r3, [r7, #0]
800539c: 781b ldrb r3, [r3, #0]
800539e: 009b lsls r3, r3, #2
80053a0: 441a add r2, r3
80053a2: 8dbb ldrh r3, [r7, #44] @ 0x2c
80053a4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80053a8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80053ac: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80053b0: f043 0380 orr.w r3, r3, #128 @ 0x80
80053b4: b29b uxth r3, r3
80053b6: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80053b8: 687a ldr r2, [r7, #4]
80053ba: 683b ldr r3, [r7, #0]
80053bc: 781b ldrb r3, [r3, #0]
80053be: 009b lsls r3, r3, #2
80053c0: 4413 add r3, r2
80053c2: 881b ldrh r3, [r3, #0]
80053c4: 857b strh r3, [r7, #42] @ 0x2a
80053c6: 8d7b ldrh r3, [r7, #42] @ 0x2a
80053c8: f003 0340 and.w r3, r3, #64 @ 0x40
80053cc: 2b00 cmp r3, #0
80053ce: d01b beq.n 8005408 <USB_DeactivateEndpoint+0x324>
80053d0: 687a ldr r2, [r7, #4]
80053d2: 683b ldr r3, [r7, #0]
80053d4: 781b ldrb r3, [r3, #0]
80053d6: 009b lsls r3, r3, #2
80053d8: 4413 add r3, r2
80053da: 881b ldrh r3, [r3, #0]
80053dc: b29b uxth r3, r3
80053de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80053e2: f023 0370 bic.w r3, r3, #112 @ 0x70
80053e6: 853b strh r3, [r7, #40] @ 0x28
80053e8: 687a ldr r2, [r7, #4]
80053ea: 683b ldr r3, [r7, #0]
80053ec: 781b ldrb r3, [r3, #0]
80053ee: 009b lsls r3, r3, #2
80053f0: 441a add r2, r3
80053f2: 8d3b ldrh r3, [r7, #40] @ 0x28
80053f4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80053f8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80053fc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005400: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8005404: b29b uxth r3, r3
8005406: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
8005408: 687a ldr r2, [r7, #4]
800540a: 683b ldr r3, [r7, #0]
800540c: 781b ldrb r3, [r3, #0]
800540e: 009b lsls r3, r3, #2
8005410: 4413 add r3, r2
8005412: 881b ldrh r3, [r3, #0]
8005414: b29b uxth r3, r3
8005416: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800541a: f023 0370 bic.w r3, r3, #112 @ 0x70
800541e: 84fb strh r3, [r7, #38] @ 0x26
8005420: 687a ldr r2, [r7, #4]
8005422: 683b ldr r3, [r7, #0]
8005424: 781b ldrb r3, [r3, #0]
8005426: 009b lsls r3, r3, #2
8005428: 441a add r2, r3
800542a: 8cfb ldrh r3, [r7, #38] @ 0x26
800542c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005430: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005434: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8005438: f043 0380 orr.w r3, r3, #128 @ 0x80
800543c: b29b uxth r3, r3
800543e: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005440: 687a ldr r2, [r7, #4]
8005442: 683b ldr r3, [r7, #0]
8005444: 781b ldrb r3, [r3, #0]
8005446: 009b lsls r3, r3, #2
8005448: 4413 add r3, r2
800544a: 881b ldrh r3, [r3, #0]
800544c: b29b uxth r3, r3
800544e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005452: f023 0340 bic.w r3, r3, #64 @ 0x40
8005456: 84bb strh r3, [r7, #36] @ 0x24
8005458: 687a ldr r2, [r7, #4]
800545a: 683b ldr r3, [r7, #0]
800545c: 781b ldrb r3, [r3, #0]
800545e: 009b lsls r3, r3, #2
8005460: 441a add r2, r3
8005462: 8cbb ldrh r3, [r7, #36] @ 0x24
8005464: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005468: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800546c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005470: f043 0380 orr.w r3, r3, #128 @ 0x80
8005474: b29b uxth r3, r3
8005476: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005478: 687a ldr r2, [r7, #4]
800547a: 683b ldr r3, [r7, #0]
800547c: 781b ldrb r3, [r3, #0]
800547e: 009b lsls r3, r3, #2
8005480: 4413 add r3, r2
8005482: 881b ldrh r3, [r3, #0]
8005484: b29b uxth r3, r3
8005486: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800548a: f023 0370 bic.w r3, r3, #112 @ 0x70
800548e: 847b strh r3, [r7, #34] @ 0x22
8005490: 687a ldr r2, [r7, #4]
8005492: 683b ldr r3, [r7, #0]
8005494: 781b ldrb r3, [r3, #0]
8005496: 009b lsls r3, r3, #2
8005498: 441a add r2, r3
800549a: 8c7b ldrh r3, [r7, #34] @ 0x22
800549c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80054a0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80054a4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80054a8: f043 0380 orr.w r3, r3, #128 @ 0x80
80054ac: b29b uxth r3, r3
80054ae: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
80054b0: 2300 movs r3, #0
}
80054b2: 4618 mov r0, r3
80054b4: 3734 adds r7, #52 @ 0x34
80054b6: 46bd mov sp, r7
80054b8: bc80 pop {r7}
80054ba: 4770 bx lr
080054bc <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80054bc: b580 push {r7, lr}
80054be: b0c2 sub sp, #264 @ 0x108
80054c0: af00 add r7, sp, #0
80054c2: f507 7384 add.w r3, r7, #264 @ 0x108
80054c6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80054ca: 6018 str r0, [r3, #0]
80054cc: f507 7384 add.w r3, r7, #264 @ 0x108
80054d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054d4: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
80054d6: f507 7384 add.w r3, r7, #264 @ 0x108
80054da: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054de: 681b ldr r3, [r3, #0]
80054e0: 785b ldrb r3, [r3, #1]
80054e2: 2b01 cmp r3, #1
80054e4: f040 86b7 bne.w 8006256 <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
80054e8: f507 7384 add.w r3, r7, #264 @ 0x108
80054ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054f0: 681b ldr r3, [r3, #0]
80054f2: 699a ldr r2, [r3, #24]
80054f4: f507 7384 add.w r3, r7, #264 @ 0x108
80054f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054fc: 681b ldr r3, [r3, #0]
80054fe: 691b ldr r3, [r3, #16]
8005500: 429a cmp r2, r3
8005502: d908 bls.n 8005516 <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
8005504: f507 7384 add.w r3, r7, #264 @ 0x108
8005508: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800550c: 681b ldr r3, [r3, #0]
800550e: 691b ldr r3, [r3, #16]
8005510: f8c7 3104 str.w r3, [r7, #260] @ 0x104
8005514: e007 b.n 8005526 <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
8005516: f507 7384 add.w r3, r7, #264 @ 0x108
800551a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800551e: 681b ldr r3, [r3, #0]
8005520: 699b ldr r3, [r3, #24]
8005522: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8005526: f507 7384 add.w r3, r7, #264 @ 0x108
800552a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800552e: 681b ldr r3, [r3, #0]
8005530: 7b1b ldrb r3, [r3, #12]
8005532: 2b00 cmp r3, #0
8005534: d13a bne.n 80055ac <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8005536: f507 7384 add.w r3, r7, #264 @ 0x108
800553a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800553e: 681b ldr r3, [r3, #0]
8005540: 6959 ldr r1, [r3, #20]
8005542: f507 7384 add.w r3, r7, #264 @ 0x108
8005546: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800554a: 681b ldr r3, [r3, #0]
800554c: 88da ldrh r2, [r3, #6]
800554e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005552: b29b uxth r3, r3
8005554: f507 7084 add.w r0, r7, #264 @ 0x108
8005558: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800555c: 6800 ldr r0, [r0, #0]
800555e: f001 fc9c bl 8006e9a <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8005562: f507 7384 add.w r3, r7, #264 @ 0x108
8005566: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800556a: 681b ldr r3, [r3, #0]
800556c: 613b str r3, [r7, #16]
800556e: f507 7384 add.w r3, r7, #264 @ 0x108
8005572: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005576: 681b ldr r3, [r3, #0]
8005578: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800557c: b29b uxth r3, r3
800557e: 461a mov r2, r3
8005580: 693b ldr r3, [r7, #16]
8005582: 4413 add r3, r2
8005584: 613b str r3, [r7, #16]
8005586: f507 7384 add.w r3, r7, #264 @ 0x108
800558a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800558e: 681b ldr r3, [r3, #0]
8005590: 781b ldrb r3, [r3, #0]
8005592: 011a lsls r2, r3, #4
8005594: 693b ldr r3, [r7, #16]
8005596: 4413 add r3, r2
8005598: f203 4304 addw r3, r3, #1028 @ 0x404
800559c: 60fb str r3, [r7, #12]
800559e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80055a2: b29a uxth r2, r3
80055a4: 68fb ldr r3, [r7, #12]
80055a6: 801a strh r2, [r3, #0]
80055a8: f000 be1f b.w 80061ea <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
80055ac: f507 7384 add.w r3, r7, #264 @ 0x108
80055b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055b4: 681b ldr r3, [r3, #0]
80055b6: 78db ldrb r3, [r3, #3]
80055b8: 2b02 cmp r3, #2
80055ba: f040 8462 bne.w 8005e82 <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
80055be: f507 7384 add.w r3, r7, #264 @ 0x108
80055c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055c6: 681b ldr r3, [r3, #0]
80055c8: 6a1a ldr r2, [r3, #32]
80055ca: f507 7384 add.w r3, r7, #264 @ 0x108
80055ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055d2: 681b ldr r3, [r3, #0]
80055d4: 691b ldr r3, [r3, #16]
80055d6: 429a cmp r2, r3
80055d8: f240 83df bls.w 8005d9a <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
80055dc: f507 7384 add.w r3, r7, #264 @ 0x108
80055e0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80055e4: 681a ldr r2, [r3, #0]
80055e6: f507 7384 add.w r3, r7, #264 @ 0x108
80055ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055ee: 681b ldr r3, [r3, #0]
80055f0: 781b ldrb r3, [r3, #0]
80055f2: 009b lsls r3, r3, #2
80055f4: 4413 add r3, r2
80055f6: 881b ldrh r3, [r3, #0]
80055f8: b29b uxth r3, r3
80055fa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80055fe: f023 0370 bic.w r3, r3, #112 @ 0x70
8005602: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
8005606: f507 7384 add.w r3, r7, #264 @ 0x108
800560a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800560e: 681a ldr r2, [r3, #0]
8005610: f507 7384 add.w r3, r7, #264 @ 0x108
8005614: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005618: 681b ldr r3, [r3, #0]
800561a: 781b ldrb r3, [r3, #0]
800561c: 009b lsls r3, r3, #2
800561e: 441a add r2, r3
8005620: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
8005624: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005628: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800562c: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8005630: f043 0380 orr.w r3, r3, #128 @ 0x80
8005634: b29b uxth r3, r3
8005636: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8005638: f507 7384 add.w r3, r7, #264 @ 0x108
800563c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005640: 681b ldr r3, [r3, #0]
8005642: 6a1a ldr r2, [r3, #32]
8005644: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005648: 1ad2 subs r2, r2, r3
800564a: f507 7384 add.w r3, r7, #264 @ 0x108
800564e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005652: 681b ldr r3, [r3, #0]
8005654: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8005656: f507 7384 add.w r3, r7, #264 @ 0x108
800565a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800565e: 681a ldr r2, [r3, #0]
8005660: f507 7384 add.w r3, r7, #264 @ 0x108
8005664: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005668: 681b ldr r3, [r3, #0]
800566a: 781b ldrb r3, [r3, #0]
800566c: 009b lsls r3, r3, #2
800566e: 4413 add r3, r2
8005670: 881b ldrh r3, [r3, #0]
8005672: b29b uxth r3, r3
8005674: f003 0340 and.w r3, r3, #64 @ 0x40
8005678: 2b00 cmp r3, #0
800567a: f000 81c7 beq.w 8005a0c <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800567e: f507 7384 add.w r3, r7, #264 @ 0x108
8005682: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005686: 681b ldr r3, [r3, #0]
8005688: 633b str r3, [r7, #48] @ 0x30
800568a: f507 7384 add.w r3, r7, #264 @ 0x108
800568e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005692: 681b ldr r3, [r3, #0]
8005694: 785b ldrb r3, [r3, #1]
8005696: 2b00 cmp r3, #0
8005698: d177 bne.n 800578a <USB_EPStartXfer+0x2ce>
800569a: f507 7384 add.w r3, r7, #264 @ 0x108
800569e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80056a2: 681b ldr r3, [r3, #0]
80056a4: 62bb str r3, [r7, #40] @ 0x28
80056a6: f507 7384 add.w r3, r7, #264 @ 0x108
80056aa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80056ae: 681b ldr r3, [r3, #0]
80056b0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80056b4: b29b uxth r3, r3
80056b6: 461a mov r2, r3
80056b8: 6abb ldr r3, [r7, #40] @ 0x28
80056ba: 4413 add r3, r2
80056bc: 62bb str r3, [r7, #40] @ 0x28
80056be: f507 7384 add.w r3, r7, #264 @ 0x108
80056c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80056c6: 681b ldr r3, [r3, #0]
80056c8: 781b ldrb r3, [r3, #0]
80056ca: 011a lsls r2, r3, #4
80056cc: 6abb ldr r3, [r7, #40] @ 0x28
80056ce: 4413 add r3, r2
80056d0: f203 430c addw r3, r3, #1036 @ 0x40c
80056d4: 627b str r3, [r7, #36] @ 0x24
80056d6: 6a7b ldr r3, [r7, #36] @ 0x24
80056d8: 881b ldrh r3, [r3, #0]
80056da: b29b uxth r3, r3
80056dc: f3c3 0309 ubfx r3, r3, #0, #10
80056e0: b29a uxth r2, r3
80056e2: 6a7b ldr r3, [r7, #36] @ 0x24
80056e4: 801a strh r2, [r3, #0]
80056e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80056ea: 2b3e cmp r3, #62 @ 0x3e
80056ec: d921 bls.n 8005732 <USB_EPStartXfer+0x276>
80056ee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80056f2: 095b lsrs r3, r3, #5
80056f4: f8c7 3100 str.w r3, [r7, #256] @ 0x100
80056f8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80056fc: f003 031f and.w r3, r3, #31
8005700: 2b00 cmp r3, #0
8005702: d104 bne.n 800570e <USB_EPStartXfer+0x252>
8005704: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8005708: 3b01 subs r3, #1
800570a: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800570e: 6a7b ldr r3, [r7, #36] @ 0x24
8005710: 881b ldrh r3, [r3, #0]
8005712: b29a uxth r2, r3
8005714: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8005718: b29b uxth r3, r3
800571a: 029b lsls r3, r3, #10
800571c: b29b uxth r3, r3
800571e: 4313 orrs r3, r2
8005720: b29b uxth r3, r3
8005722: ea6f 4343 mvn.w r3, r3, lsl #17
8005726: ea6f 4353 mvn.w r3, r3, lsr #17
800572a: b29a uxth r2, r3
800572c: 6a7b ldr r3, [r7, #36] @ 0x24
800572e: 801a strh r2, [r3, #0]
8005730: e050 b.n 80057d4 <USB_EPStartXfer+0x318>
8005732: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005736: 2b00 cmp r3, #0
8005738: d10a bne.n 8005750 <USB_EPStartXfer+0x294>
800573a: 6a7b ldr r3, [r7, #36] @ 0x24
800573c: 881b ldrh r3, [r3, #0]
800573e: b29b uxth r3, r3
8005740: ea6f 4343 mvn.w r3, r3, lsl #17
8005744: ea6f 4353 mvn.w r3, r3, lsr #17
8005748: b29a uxth r2, r3
800574a: 6a7b ldr r3, [r7, #36] @ 0x24
800574c: 801a strh r2, [r3, #0]
800574e: e041 b.n 80057d4 <USB_EPStartXfer+0x318>
8005750: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005754: 085b lsrs r3, r3, #1
8005756: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800575a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800575e: f003 0301 and.w r3, r3, #1
8005762: 2b00 cmp r3, #0
8005764: d004 beq.n 8005770 <USB_EPStartXfer+0x2b4>
8005766: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800576a: 3301 adds r3, #1
800576c: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8005770: 6a7b ldr r3, [r7, #36] @ 0x24
8005772: 881b ldrh r3, [r3, #0]
8005774: b29a uxth r2, r3
8005776: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800577a: b29b uxth r3, r3
800577c: 029b lsls r3, r3, #10
800577e: b29b uxth r3, r3
8005780: 4313 orrs r3, r2
8005782: b29a uxth r2, r3
8005784: 6a7b ldr r3, [r7, #36] @ 0x24
8005786: 801a strh r2, [r3, #0]
8005788: e024 b.n 80057d4 <USB_EPStartXfer+0x318>
800578a: f507 7384 add.w r3, r7, #264 @ 0x108
800578e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005792: 681b ldr r3, [r3, #0]
8005794: 785b ldrb r3, [r3, #1]
8005796: 2b01 cmp r3, #1
8005798: d11c bne.n 80057d4 <USB_EPStartXfer+0x318>
800579a: f507 7384 add.w r3, r7, #264 @ 0x108
800579e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80057a2: 681b ldr r3, [r3, #0]
80057a4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80057a8: b29b uxth r3, r3
80057aa: 461a mov r2, r3
80057ac: 6b3b ldr r3, [r7, #48] @ 0x30
80057ae: 4413 add r3, r2
80057b0: 633b str r3, [r7, #48] @ 0x30
80057b2: f507 7384 add.w r3, r7, #264 @ 0x108
80057b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80057ba: 681b ldr r3, [r3, #0]
80057bc: 781b ldrb r3, [r3, #0]
80057be: 011a lsls r2, r3, #4
80057c0: 6b3b ldr r3, [r7, #48] @ 0x30
80057c2: 4413 add r3, r2
80057c4: f203 430c addw r3, r3, #1036 @ 0x40c
80057c8: 62fb str r3, [r7, #44] @ 0x2c
80057ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80057ce: b29a uxth r2, r3
80057d0: 6afb ldr r3, [r7, #44] @ 0x2c
80057d2: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
80057d4: f507 7384 add.w r3, r7, #264 @ 0x108
80057d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80057dc: 681b ldr r3, [r3, #0]
80057de: 895b ldrh r3, [r3, #10]
80057e0: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80057e4: f507 7384 add.w r3, r7, #264 @ 0x108
80057e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80057ec: 681b ldr r3, [r3, #0]
80057ee: 6959 ldr r1, [r3, #20]
80057f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80057f4: b29b uxth r3, r3
80057f6: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80057fa: f507 7084 add.w r0, r7, #264 @ 0x108
80057fe: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005802: 6800 ldr r0, [r0, #0]
8005804: f001 fb49 bl 8006e9a <USB_WritePMA>
ep->xfer_buff += len;
8005808: f507 7384 add.w r3, r7, #264 @ 0x108
800580c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005810: 681b ldr r3, [r3, #0]
8005812: 695a ldr r2, [r3, #20]
8005814: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005818: 441a add r2, r3
800581a: f507 7384 add.w r3, r7, #264 @ 0x108
800581e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005822: 681b ldr r3, [r3, #0]
8005824: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8005826: f507 7384 add.w r3, r7, #264 @ 0x108
800582a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800582e: 681b ldr r3, [r3, #0]
8005830: 6a1a ldr r2, [r3, #32]
8005832: f507 7384 add.w r3, r7, #264 @ 0x108
8005836: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800583a: 681b ldr r3, [r3, #0]
800583c: 691b ldr r3, [r3, #16]
800583e: 429a cmp r2, r3
8005840: d90f bls.n 8005862 <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
8005842: f507 7384 add.w r3, r7, #264 @ 0x108
8005846: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800584a: 681b ldr r3, [r3, #0]
800584c: 6a1a ldr r2, [r3, #32]
800584e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005852: 1ad2 subs r2, r2, r3
8005854: f507 7384 add.w r3, r7, #264 @ 0x108
8005858: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800585c: 681b ldr r3, [r3, #0]
800585e: 621a str r2, [r3, #32]
8005860: e00e b.n 8005880 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
8005862: f507 7384 add.w r3, r7, #264 @ 0x108
8005866: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800586a: 681b ldr r3, [r3, #0]
800586c: 6a1b ldr r3, [r3, #32]
800586e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8005872: f507 7384 add.w r3, r7, #264 @ 0x108
8005876: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800587a: 681b ldr r3, [r3, #0]
800587c: 2200 movs r2, #0
800587e: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8005880: f507 7384 add.w r3, r7, #264 @ 0x108
8005884: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005888: 681b ldr r3, [r3, #0]
800588a: 785b ldrb r3, [r3, #1]
800588c: 2b00 cmp r3, #0
800588e: d177 bne.n 8005980 <USB_EPStartXfer+0x4c4>
8005890: f507 7384 add.w r3, r7, #264 @ 0x108
8005894: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005898: 681b ldr r3, [r3, #0]
800589a: 61bb str r3, [r7, #24]
800589c: f507 7384 add.w r3, r7, #264 @ 0x108
80058a0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80058a4: 681b ldr r3, [r3, #0]
80058a6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80058aa: b29b uxth r3, r3
80058ac: 461a mov r2, r3
80058ae: 69bb ldr r3, [r7, #24]
80058b0: 4413 add r3, r2
80058b2: 61bb str r3, [r7, #24]
80058b4: f507 7384 add.w r3, r7, #264 @ 0x108
80058b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80058bc: 681b ldr r3, [r3, #0]
80058be: 781b ldrb r3, [r3, #0]
80058c0: 011a lsls r2, r3, #4
80058c2: 69bb ldr r3, [r7, #24]
80058c4: 4413 add r3, r2
80058c6: f203 4304 addw r3, r3, #1028 @ 0x404
80058ca: 617b str r3, [r7, #20]
80058cc: 697b ldr r3, [r7, #20]
80058ce: 881b ldrh r3, [r3, #0]
80058d0: b29b uxth r3, r3
80058d2: f3c3 0309 ubfx r3, r3, #0, #10
80058d6: b29a uxth r2, r3
80058d8: 697b ldr r3, [r7, #20]
80058da: 801a strh r2, [r3, #0]
80058dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80058e0: 2b3e cmp r3, #62 @ 0x3e
80058e2: d921 bls.n 8005928 <USB_EPStartXfer+0x46c>
80058e4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80058e8: 095b lsrs r3, r3, #5
80058ea: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
80058ee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80058f2: f003 031f and.w r3, r3, #31
80058f6: 2b00 cmp r3, #0
80058f8: d104 bne.n 8005904 <USB_EPStartXfer+0x448>
80058fa: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
80058fe: 3b01 subs r3, #1
8005900: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8005904: 697b ldr r3, [r7, #20]
8005906: 881b ldrh r3, [r3, #0]
8005908: b29a uxth r2, r3
800590a: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800590e: b29b uxth r3, r3
8005910: 029b lsls r3, r3, #10
8005912: b29b uxth r3, r3
8005914: 4313 orrs r3, r2
8005916: b29b uxth r3, r3
8005918: ea6f 4343 mvn.w r3, r3, lsl #17
800591c: ea6f 4353 mvn.w r3, r3, lsr #17
8005920: b29a uxth r2, r3
8005922: 697b ldr r3, [r7, #20]
8005924: 801a strh r2, [r3, #0]
8005926: e056 b.n 80059d6 <USB_EPStartXfer+0x51a>
8005928: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800592c: 2b00 cmp r3, #0
800592e: d10a bne.n 8005946 <USB_EPStartXfer+0x48a>
8005930: 697b ldr r3, [r7, #20]
8005932: 881b ldrh r3, [r3, #0]
8005934: b29b uxth r3, r3
8005936: ea6f 4343 mvn.w r3, r3, lsl #17
800593a: ea6f 4353 mvn.w r3, r3, lsr #17
800593e: b29a uxth r2, r3
8005940: 697b ldr r3, [r7, #20]
8005942: 801a strh r2, [r3, #0]
8005944: e047 b.n 80059d6 <USB_EPStartXfer+0x51a>
8005946: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800594a: 085b lsrs r3, r3, #1
800594c: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8005950: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005954: f003 0301 and.w r3, r3, #1
8005958: 2b00 cmp r3, #0
800595a: d004 beq.n 8005966 <USB_EPStartXfer+0x4aa>
800595c: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8005960: 3301 adds r3, #1
8005962: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8005966: 697b ldr r3, [r7, #20]
8005968: 881b ldrh r3, [r3, #0]
800596a: b29a uxth r2, r3
800596c: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8005970: b29b uxth r3, r3
8005972: 029b lsls r3, r3, #10
8005974: b29b uxth r3, r3
8005976: 4313 orrs r3, r2
8005978: b29a uxth r2, r3
800597a: 697b ldr r3, [r7, #20]
800597c: 801a strh r2, [r3, #0]
800597e: e02a b.n 80059d6 <USB_EPStartXfer+0x51a>
8005980: f507 7384 add.w r3, r7, #264 @ 0x108
8005984: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005988: 681b ldr r3, [r3, #0]
800598a: 785b ldrb r3, [r3, #1]
800598c: 2b01 cmp r3, #1
800598e: d122 bne.n 80059d6 <USB_EPStartXfer+0x51a>
8005990: f507 7384 add.w r3, r7, #264 @ 0x108
8005994: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005998: 681b ldr r3, [r3, #0]
800599a: 623b str r3, [r7, #32]
800599c: f507 7384 add.w r3, r7, #264 @ 0x108
80059a0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80059a4: 681b ldr r3, [r3, #0]
80059a6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80059aa: b29b uxth r3, r3
80059ac: 461a mov r2, r3
80059ae: 6a3b ldr r3, [r7, #32]
80059b0: 4413 add r3, r2
80059b2: 623b str r3, [r7, #32]
80059b4: f507 7384 add.w r3, r7, #264 @ 0x108
80059b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059bc: 681b ldr r3, [r3, #0]
80059be: 781b ldrb r3, [r3, #0]
80059c0: 011a lsls r2, r3, #4
80059c2: 6a3b ldr r3, [r7, #32]
80059c4: 4413 add r3, r2
80059c6: f203 4304 addw r3, r3, #1028 @ 0x404
80059ca: 61fb str r3, [r7, #28]
80059cc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80059d0: b29a uxth r2, r3
80059d2: 69fb ldr r3, [r7, #28]
80059d4: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80059d6: f507 7384 add.w r3, r7, #264 @ 0x108
80059da: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059de: 681b ldr r3, [r3, #0]
80059e0: 891b ldrh r3, [r3, #8]
80059e2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80059e6: f507 7384 add.w r3, r7, #264 @ 0x108
80059ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059ee: 681b ldr r3, [r3, #0]
80059f0: 6959 ldr r1, [r3, #20]
80059f2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80059f6: b29b uxth r3, r3
80059f8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80059fc: f507 7084 add.w r0, r7, #264 @ 0x108
8005a00: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005a04: 6800 ldr r0, [r0, #0]
8005a06: f001 fa48 bl 8006e9a <USB_WritePMA>
8005a0a: e3ee b.n 80061ea <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8005a0c: f507 7384 add.w r3, r7, #264 @ 0x108
8005a10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a14: 681b ldr r3, [r3, #0]
8005a16: 785b ldrb r3, [r3, #1]
8005a18: 2b00 cmp r3, #0
8005a1a: d177 bne.n 8005b0c <USB_EPStartXfer+0x650>
8005a1c: f507 7384 add.w r3, r7, #264 @ 0x108
8005a20: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005a24: 681b ldr r3, [r3, #0]
8005a26: 64bb str r3, [r7, #72] @ 0x48
8005a28: f507 7384 add.w r3, r7, #264 @ 0x108
8005a2c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005a30: 681b ldr r3, [r3, #0]
8005a32: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005a36: b29b uxth r3, r3
8005a38: 461a mov r2, r3
8005a3a: 6cbb ldr r3, [r7, #72] @ 0x48
8005a3c: 4413 add r3, r2
8005a3e: 64bb str r3, [r7, #72] @ 0x48
8005a40: f507 7384 add.w r3, r7, #264 @ 0x108
8005a44: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a48: 681b ldr r3, [r3, #0]
8005a4a: 781b ldrb r3, [r3, #0]
8005a4c: 011a lsls r2, r3, #4
8005a4e: 6cbb ldr r3, [r7, #72] @ 0x48
8005a50: 4413 add r3, r2
8005a52: f203 4304 addw r3, r3, #1028 @ 0x404
8005a56: 647b str r3, [r7, #68] @ 0x44
8005a58: 6c7b ldr r3, [r7, #68] @ 0x44
8005a5a: 881b ldrh r3, [r3, #0]
8005a5c: b29b uxth r3, r3
8005a5e: f3c3 0309 ubfx r3, r3, #0, #10
8005a62: b29a uxth r2, r3
8005a64: 6c7b ldr r3, [r7, #68] @ 0x44
8005a66: 801a strh r2, [r3, #0]
8005a68: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005a6c: 2b3e cmp r3, #62 @ 0x3e
8005a6e: d921 bls.n 8005ab4 <USB_EPStartXfer+0x5f8>
8005a70: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005a74: 095b lsrs r3, r3, #5
8005a76: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8005a7a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005a7e: f003 031f and.w r3, r3, #31
8005a82: 2b00 cmp r3, #0
8005a84: d104 bne.n 8005a90 <USB_EPStartXfer+0x5d4>
8005a86: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8005a8a: 3b01 subs r3, #1
8005a8c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8005a90: 6c7b ldr r3, [r7, #68] @ 0x44
8005a92: 881b ldrh r3, [r3, #0]
8005a94: b29a uxth r2, r3
8005a96: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8005a9a: b29b uxth r3, r3
8005a9c: 029b lsls r3, r3, #10
8005a9e: b29b uxth r3, r3
8005aa0: 4313 orrs r3, r2
8005aa2: b29b uxth r3, r3
8005aa4: ea6f 4343 mvn.w r3, r3, lsl #17
8005aa8: ea6f 4353 mvn.w r3, r3, lsr #17
8005aac: b29a uxth r2, r3
8005aae: 6c7b ldr r3, [r7, #68] @ 0x44
8005ab0: 801a strh r2, [r3, #0]
8005ab2: e056 b.n 8005b62 <USB_EPStartXfer+0x6a6>
8005ab4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ab8: 2b00 cmp r3, #0
8005aba: d10a bne.n 8005ad2 <USB_EPStartXfer+0x616>
8005abc: 6c7b ldr r3, [r7, #68] @ 0x44
8005abe: 881b ldrh r3, [r3, #0]
8005ac0: b29b uxth r3, r3
8005ac2: ea6f 4343 mvn.w r3, r3, lsl #17
8005ac6: ea6f 4353 mvn.w r3, r3, lsr #17
8005aca: b29a uxth r2, r3
8005acc: 6c7b ldr r3, [r7, #68] @ 0x44
8005ace: 801a strh r2, [r3, #0]
8005ad0: e047 b.n 8005b62 <USB_EPStartXfer+0x6a6>
8005ad2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ad6: 085b lsrs r3, r3, #1
8005ad8: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8005adc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ae0: f003 0301 and.w r3, r3, #1
8005ae4: 2b00 cmp r3, #0
8005ae6: d004 beq.n 8005af2 <USB_EPStartXfer+0x636>
8005ae8: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8005aec: 3301 adds r3, #1
8005aee: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8005af2: 6c7b ldr r3, [r7, #68] @ 0x44
8005af4: 881b ldrh r3, [r3, #0]
8005af6: b29a uxth r2, r3
8005af8: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8005afc: b29b uxth r3, r3
8005afe: 029b lsls r3, r3, #10
8005b00: b29b uxth r3, r3
8005b02: 4313 orrs r3, r2
8005b04: b29a uxth r2, r3
8005b06: 6c7b ldr r3, [r7, #68] @ 0x44
8005b08: 801a strh r2, [r3, #0]
8005b0a: e02a b.n 8005b62 <USB_EPStartXfer+0x6a6>
8005b0c: f507 7384 add.w r3, r7, #264 @ 0x108
8005b10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b14: 681b ldr r3, [r3, #0]
8005b16: 785b ldrb r3, [r3, #1]
8005b18: 2b01 cmp r3, #1
8005b1a: d122 bne.n 8005b62 <USB_EPStartXfer+0x6a6>
8005b1c: f507 7384 add.w r3, r7, #264 @ 0x108
8005b20: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005b24: 681b ldr r3, [r3, #0]
8005b26: 653b str r3, [r7, #80] @ 0x50
8005b28: f507 7384 add.w r3, r7, #264 @ 0x108
8005b2c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005b30: 681b ldr r3, [r3, #0]
8005b32: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005b36: b29b uxth r3, r3
8005b38: 461a mov r2, r3
8005b3a: 6d3b ldr r3, [r7, #80] @ 0x50
8005b3c: 4413 add r3, r2
8005b3e: 653b str r3, [r7, #80] @ 0x50
8005b40: f507 7384 add.w r3, r7, #264 @ 0x108
8005b44: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b48: 681b ldr r3, [r3, #0]
8005b4a: 781b ldrb r3, [r3, #0]
8005b4c: 011a lsls r2, r3, #4
8005b4e: 6d3b ldr r3, [r7, #80] @ 0x50
8005b50: 4413 add r3, r2
8005b52: f203 4304 addw r3, r3, #1028 @ 0x404
8005b56: 64fb str r3, [r7, #76] @ 0x4c
8005b58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005b5c: b29a uxth r2, r3
8005b5e: 6cfb ldr r3, [r7, #76] @ 0x4c
8005b60: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8005b62: f507 7384 add.w r3, r7, #264 @ 0x108
8005b66: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b6a: 681b ldr r3, [r3, #0]
8005b6c: 891b ldrh r3, [r3, #8]
8005b6e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005b72: f507 7384 add.w r3, r7, #264 @ 0x108
8005b76: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b7a: 681b ldr r3, [r3, #0]
8005b7c: 6959 ldr r1, [r3, #20]
8005b7e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005b82: b29b uxth r3, r3
8005b84: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005b88: f507 7084 add.w r0, r7, #264 @ 0x108
8005b8c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005b90: 6800 ldr r0, [r0, #0]
8005b92: f001 f982 bl 8006e9a <USB_WritePMA>
ep->xfer_buff += len;
8005b96: f507 7384 add.w r3, r7, #264 @ 0x108
8005b9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b9e: 681b ldr r3, [r3, #0]
8005ba0: 695a ldr r2, [r3, #20]
8005ba2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ba6: 441a add r2, r3
8005ba8: f507 7384 add.w r3, r7, #264 @ 0x108
8005bac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bb0: 681b ldr r3, [r3, #0]
8005bb2: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8005bb4: f507 7384 add.w r3, r7, #264 @ 0x108
8005bb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bbc: 681b ldr r3, [r3, #0]
8005bbe: 6a1a ldr r2, [r3, #32]
8005bc0: f507 7384 add.w r3, r7, #264 @ 0x108
8005bc4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bc8: 681b ldr r3, [r3, #0]
8005bca: 691b ldr r3, [r3, #16]
8005bcc: 429a cmp r2, r3
8005bce: d90f bls.n 8005bf0 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
8005bd0: f507 7384 add.w r3, r7, #264 @ 0x108
8005bd4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bd8: 681b ldr r3, [r3, #0]
8005bda: 6a1a ldr r2, [r3, #32]
8005bdc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005be0: 1ad2 subs r2, r2, r3
8005be2: f507 7384 add.w r3, r7, #264 @ 0x108
8005be6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bea: 681b ldr r3, [r3, #0]
8005bec: 621a str r2, [r3, #32]
8005bee: e00e b.n 8005c0e <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
8005bf0: f507 7384 add.w r3, r7, #264 @ 0x108
8005bf4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bf8: 681b ldr r3, [r3, #0]
8005bfa: 6a1b ldr r3, [r3, #32]
8005bfc: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8005c00: f507 7384 add.w r3, r7, #264 @ 0x108
8005c04: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c08: 681b ldr r3, [r3, #0]
8005c0a: 2200 movs r2, #0
8005c0c: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8005c0e: f507 7384 add.w r3, r7, #264 @ 0x108
8005c12: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005c16: 681b ldr r3, [r3, #0]
8005c18: 643b str r3, [r7, #64] @ 0x40
8005c1a: f507 7384 add.w r3, r7, #264 @ 0x108
8005c1e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c22: 681b ldr r3, [r3, #0]
8005c24: 785b ldrb r3, [r3, #1]
8005c26: 2b00 cmp r3, #0
8005c28: d177 bne.n 8005d1a <USB_EPStartXfer+0x85e>
8005c2a: f507 7384 add.w r3, r7, #264 @ 0x108
8005c2e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005c32: 681b ldr r3, [r3, #0]
8005c34: 63bb str r3, [r7, #56] @ 0x38
8005c36: f507 7384 add.w r3, r7, #264 @ 0x108
8005c3a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005c3e: 681b ldr r3, [r3, #0]
8005c40: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005c44: b29b uxth r3, r3
8005c46: 461a mov r2, r3
8005c48: 6bbb ldr r3, [r7, #56] @ 0x38
8005c4a: 4413 add r3, r2
8005c4c: 63bb str r3, [r7, #56] @ 0x38
8005c4e: f507 7384 add.w r3, r7, #264 @ 0x108
8005c52: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c56: 681b ldr r3, [r3, #0]
8005c58: 781b ldrb r3, [r3, #0]
8005c5a: 011a lsls r2, r3, #4
8005c5c: 6bbb ldr r3, [r7, #56] @ 0x38
8005c5e: 4413 add r3, r2
8005c60: f203 430c addw r3, r3, #1036 @ 0x40c
8005c64: 637b str r3, [r7, #52] @ 0x34
8005c66: 6b7b ldr r3, [r7, #52] @ 0x34
8005c68: 881b ldrh r3, [r3, #0]
8005c6a: b29b uxth r3, r3
8005c6c: f3c3 0309 ubfx r3, r3, #0, #10
8005c70: b29a uxth r2, r3
8005c72: 6b7b ldr r3, [r7, #52] @ 0x34
8005c74: 801a strh r2, [r3, #0]
8005c76: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005c7a: 2b3e cmp r3, #62 @ 0x3e
8005c7c: d921 bls.n 8005cc2 <USB_EPStartXfer+0x806>
8005c7e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005c82: 095b lsrs r3, r3, #5
8005c84: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005c88: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005c8c: f003 031f and.w r3, r3, #31
8005c90: 2b00 cmp r3, #0
8005c92: d104 bne.n 8005c9e <USB_EPStartXfer+0x7e2>
8005c94: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005c98: 3b01 subs r3, #1
8005c9a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005c9e: 6b7b ldr r3, [r7, #52] @ 0x34
8005ca0: 881b ldrh r3, [r3, #0]
8005ca2: b29a uxth r2, r3
8005ca4: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005ca8: b29b uxth r3, r3
8005caa: 029b lsls r3, r3, #10
8005cac: b29b uxth r3, r3
8005cae: 4313 orrs r3, r2
8005cb0: b29b uxth r3, r3
8005cb2: ea6f 4343 mvn.w r3, r3, lsl #17
8005cb6: ea6f 4353 mvn.w r3, r3, lsr #17
8005cba: b29a uxth r2, r3
8005cbc: 6b7b ldr r3, [r7, #52] @ 0x34
8005cbe: 801a strh r2, [r3, #0]
8005cc0: e050 b.n 8005d64 <USB_EPStartXfer+0x8a8>
8005cc2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005cc6: 2b00 cmp r3, #0
8005cc8: d10a bne.n 8005ce0 <USB_EPStartXfer+0x824>
8005cca: 6b7b ldr r3, [r7, #52] @ 0x34
8005ccc: 881b ldrh r3, [r3, #0]
8005cce: b29b uxth r3, r3
8005cd0: ea6f 4343 mvn.w r3, r3, lsl #17
8005cd4: ea6f 4353 mvn.w r3, r3, lsr #17
8005cd8: b29a uxth r2, r3
8005cda: 6b7b ldr r3, [r7, #52] @ 0x34
8005cdc: 801a strh r2, [r3, #0]
8005cde: e041 b.n 8005d64 <USB_EPStartXfer+0x8a8>
8005ce0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ce4: 085b lsrs r3, r3, #1
8005ce6: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005cea: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005cee: f003 0301 and.w r3, r3, #1
8005cf2: 2b00 cmp r3, #0
8005cf4: d004 beq.n 8005d00 <USB_EPStartXfer+0x844>
8005cf6: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005cfa: 3301 adds r3, #1
8005cfc: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005d00: 6b7b ldr r3, [r7, #52] @ 0x34
8005d02: 881b ldrh r3, [r3, #0]
8005d04: b29a uxth r2, r3
8005d06: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005d0a: b29b uxth r3, r3
8005d0c: 029b lsls r3, r3, #10
8005d0e: b29b uxth r3, r3
8005d10: 4313 orrs r3, r2
8005d12: b29a uxth r2, r3
8005d14: 6b7b ldr r3, [r7, #52] @ 0x34
8005d16: 801a strh r2, [r3, #0]
8005d18: e024 b.n 8005d64 <USB_EPStartXfer+0x8a8>
8005d1a: f507 7384 add.w r3, r7, #264 @ 0x108
8005d1e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d22: 681b ldr r3, [r3, #0]
8005d24: 785b ldrb r3, [r3, #1]
8005d26: 2b01 cmp r3, #1
8005d28: d11c bne.n 8005d64 <USB_EPStartXfer+0x8a8>
8005d2a: f507 7384 add.w r3, r7, #264 @ 0x108
8005d2e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005d32: 681b ldr r3, [r3, #0]
8005d34: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005d38: b29b uxth r3, r3
8005d3a: 461a mov r2, r3
8005d3c: 6c3b ldr r3, [r7, #64] @ 0x40
8005d3e: 4413 add r3, r2
8005d40: 643b str r3, [r7, #64] @ 0x40
8005d42: f507 7384 add.w r3, r7, #264 @ 0x108
8005d46: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d4a: 681b ldr r3, [r3, #0]
8005d4c: 781b ldrb r3, [r3, #0]
8005d4e: 011a lsls r2, r3, #4
8005d50: 6c3b ldr r3, [r7, #64] @ 0x40
8005d52: 4413 add r3, r2
8005d54: f203 430c addw r3, r3, #1036 @ 0x40c
8005d58: 63fb str r3, [r7, #60] @ 0x3c
8005d5a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005d5e: b29a uxth r2, r3
8005d60: 6bfb ldr r3, [r7, #60] @ 0x3c
8005d62: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8005d64: f507 7384 add.w r3, r7, #264 @ 0x108
8005d68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d6c: 681b ldr r3, [r3, #0]
8005d6e: 895b ldrh r3, [r3, #10]
8005d70: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005d74: f507 7384 add.w r3, r7, #264 @ 0x108
8005d78: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d7c: 681b ldr r3, [r3, #0]
8005d7e: 6959 ldr r1, [r3, #20]
8005d80: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005d84: b29b uxth r3, r3
8005d86: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005d8a: f507 7084 add.w r0, r7, #264 @ 0x108
8005d8e: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005d92: 6800 ldr r0, [r0, #0]
8005d94: f001 f881 bl 8006e9a <USB_WritePMA>
8005d98: e227 b.n 80061ea <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
8005d9a: f507 7384 add.w r3, r7, #264 @ 0x108
8005d9e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005da2: 681b ldr r3, [r3, #0]
8005da4: 6a1b ldr r3, [r3, #32]
8005da6: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
8005daa: f507 7384 add.w r3, r7, #264 @ 0x108
8005dae: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005db2: 681a ldr r2, [r3, #0]
8005db4: f507 7384 add.w r3, r7, #264 @ 0x108
8005db8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005dbc: 681b ldr r3, [r3, #0]
8005dbe: 781b ldrb r3, [r3, #0]
8005dc0: 009b lsls r3, r3, #2
8005dc2: 4413 add r3, r2
8005dc4: 881b ldrh r3, [r3, #0]
8005dc6: b29b uxth r3, r3
8005dc8: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8005dcc: f023 0370 bic.w r3, r3, #112 @ 0x70
8005dd0: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
8005dd4: f507 7384 add.w r3, r7, #264 @ 0x108
8005dd8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005ddc: 681a ldr r2, [r3, #0]
8005dde: f507 7384 add.w r3, r7, #264 @ 0x108
8005de2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005de6: 681b ldr r3, [r3, #0]
8005de8: 781b ldrb r3, [r3, #0]
8005dea: 009b lsls r3, r3, #2
8005dec: 441a add r2, r3
8005dee: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8005df2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005df6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005dfa: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005dfe: f043 0380 orr.w r3, r3, #128 @ 0x80
8005e02: b29b uxth r3, r3
8005e04: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8005e06: f507 7384 add.w r3, r7, #264 @ 0x108
8005e0a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005e0e: 681b ldr r3, [r3, #0]
8005e10: 65fb str r3, [r7, #92] @ 0x5c
8005e12: f507 7384 add.w r3, r7, #264 @ 0x108
8005e16: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005e1a: 681b ldr r3, [r3, #0]
8005e1c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005e20: b29b uxth r3, r3
8005e22: 461a mov r2, r3
8005e24: 6dfb ldr r3, [r7, #92] @ 0x5c
8005e26: 4413 add r3, r2
8005e28: 65fb str r3, [r7, #92] @ 0x5c
8005e2a: f507 7384 add.w r3, r7, #264 @ 0x108
8005e2e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e32: 681b ldr r3, [r3, #0]
8005e34: 781b ldrb r3, [r3, #0]
8005e36: 011a lsls r2, r3, #4
8005e38: 6dfb ldr r3, [r7, #92] @ 0x5c
8005e3a: 4413 add r3, r2
8005e3c: f203 4304 addw r3, r3, #1028 @ 0x404
8005e40: 65bb str r3, [r7, #88] @ 0x58
8005e42: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005e46: b29a uxth r2, r3
8005e48: 6dbb ldr r3, [r7, #88] @ 0x58
8005e4a: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8005e4c: f507 7384 add.w r3, r7, #264 @ 0x108
8005e50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e54: 681b ldr r3, [r3, #0]
8005e56: 891b ldrh r3, [r3, #8]
8005e58: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005e5c: f507 7384 add.w r3, r7, #264 @ 0x108
8005e60: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e64: 681b ldr r3, [r3, #0]
8005e66: 6959 ldr r1, [r3, #20]
8005e68: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005e6c: b29b uxth r3, r3
8005e6e: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005e72: f507 7084 add.w r0, r7, #264 @ 0x108
8005e76: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005e7a: 6800 ldr r0, [r0, #0]
8005e7c: f001 f80d bl 8006e9a <USB_WritePMA>
8005e80: e1b3 b.n 80061ea <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8005e82: f507 7384 add.w r3, r7, #264 @ 0x108
8005e86: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e8a: 681b ldr r3, [r3, #0]
8005e8c: 6a1a ldr r2, [r3, #32]
8005e8e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005e92: 1ad2 subs r2, r2, r3
8005e94: f507 7384 add.w r3, r7, #264 @ 0x108
8005e98: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e9c: 681b ldr r3, [r3, #0]
8005e9e: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8005ea0: f507 7384 add.w r3, r7, #264 @ 0x108
8005ea4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005ea8: 681a ldr r2, [r3, #0]
8005eaa: f507 7384 add.w r3, r7, #264 @ 0x108
8005eae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005eb2: 681b ldr r3, [r3, #0]
8005eb4: 781b ldrb r3, [r3, #0]
8005eb6: 009b lsls r3, r3, #2
8005eb8: 4413 add r3, r2
8005eba: 881b ldrh r3, [r3, #0]
8005ebc: b29b uxth r3, r3
8005ebe: f003 0340 and.w r3, r3, #64 @ 0x40
8005ec2: 2b00 cmp r3, #0
8005ec4: f000 80c6 beq.w 8006054 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8005ec8: f507 7384 add.w r3, r7, #264 @ 0x108
8005ecc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005ed0: 681b ldr r3, [r3, #0]
8005ed2: 673b str r3, [r7, #112] @ 0x70
8005ed4: f507 7384 add.w r3, r7, #264 @ 0x108
8005ed8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005edc: 681b ldr r3, [r3, #0]
8005ede: 785b ldrb r3, [r3, #1]
8005ee0: 2b00 cmp r3, #0
8005ee2: d177 bne.n 8005fd4 <USB_EPStartXfer+0xb18>
8005ee4: f507 7384 add.w r3, r7, #264 @ 0x108
8005ee8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005eec: 681b ldr r3, [r3, #0]
8005eee: 66bb str r3, [r7, #104] @ 0x68
8005ef0: f507 7384 add.w r3, r7, #264 @ 0x108
8005ef4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005ef8: 681b ldr r3, [r3, #0]
8005efa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005efe: b29b uxth r3, r3
8005f00: 461a mov r2, r3
8005f02: 6ebb ldr r3, [r7, #104] @ 0x68
8005f04: 4413 add r3, r2
8005f06: 66bb str r3, [r7, #104] @ 0x68
8005f08: f507 7384 add.w r3, r7, #264 @ 0x108
8005f0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005f10: 681b ldr r3, [r3, #0]
8005f12: 781b ldrb r3, [r3, #0]
8005f14: 011a lsls r2, r3, #4
8005f16: 6ebb ldr r3, [r7, #104] @ 0x68
8005f18: 4413 add r3, r2
8005f1a: f203 430c addw r3, r3, #1036 @ 0x40c
8005f1e: 667b str r3, [r7, #100] @ 0x64
8005f20: 6e7b ldr r3, [r7, #100] @ 0x64
8005f22: 881b ldrh r3, [r3, #0]
8005f24: b29b uxth r3, r3
8005f26: f3c3 0309 ubfx r3, r3, #0, #10
8005f2a: b29a uxth r2, r3
8005f2c: 6e7b ldr r3, [r7, #100] @ 0x64
8005f2e: 801a strh r2, [r3, #0]
8005f30: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005f34: 2b3e cmp r3, #62 @ 0x3e
8005f36: d921 bls.n 8005f7c <USB_EPStartXfer+0xac0>
8005f38: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005f3c: 095b lsrs r3, r3, #5
8005f3e: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005f42: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005f46: f003 031f and.w r3, r3, #31
8005f4a: 2b00 cmp r3, #0
8005f4c: d104 bne.n 8005f58 <USB_EPStartXfer+0xa9c>
8005f4e: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005f52: 3b01 subs r3, #1
8005f54: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005f58: 6e7b ldr r3, [r7, #100] @ 0x64
8005f5a: 881b ldrh r3, [r3, #0]
8005f5c: b29a uxth r2, r3
8005f5e: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005f62: b29b uxth r3, r3
8005f64: 029b lsls r3, r3, #10
8005f66: b29b uxth r3, r3
8005f68: 4313 orrs r3, r2
8005f6a: b29b uxth r3, r3
8005f6c: ea6f 4343 mvn.w r3, r3, lsl #17
8005f70: ea6f 4353 mvn.w r3, r3, lsr #17
8005f74: b29a uxth r2, r3
8005f76: 6e7b ldr r3, [r7, #100] @ 0x64
8005f78: 801a strh r2, [r3, #0]
8005f7a: e050 b.n 800601e <USB_EPStartXfer+0xb62>
8005f7c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005f80: 2b00 cmp r3, #0
8005f82: d10a bne.n 8005f9a <USB_EPStartXfer+0xade>
8005f84: 6e7b ldr r3, [r7, #100] @ 0x64
8005f86: 881b ldrh r3, [r3, #0]
8005f88: b29b uxth r3, r3
8005f8a: ea6f 4343 mvn.w r3, r3, lsl #17
8005f8e: ea6f 4353 mvn.w r3, r3, lsr #17
8005f92: b29a uxth r2, r3
8005f94: 6e7b ldr r3, [r7, #100] @ 0x64
8005f96: 801a strh r2, [r3, #0]
8005f98: e041 b.n 800601e <USB_EPStartXfer+0xb62>
8005f9a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005f9e: 085b lsrs r3, r3, #1
8005fa0: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005fa4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005fa8: f003 0301 and.w r3, r3, #1
8005fac: 2b00 cmp r3, #0
8005fae: d004 beq.n 8005fba <USB_EPStartXfer+0xafe>
8005fb0: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005fb4: 3301 adds r3, #1
8005fb6: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005fba: 6e7b ldr r3, [r7, #100] @ 0x64
8005fbc: 881b ldrh r3, [r3, #0]
8005fbe: b29a uxth r2, r3
8005fc0: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005fc4: b29b uxth r3, r3
8005fc6: 029b lsls r3, r3, #10
8005fc8: b29b uxth r3, r3
8005fca: 4313 orrs r3, r2
8005fcc: b29a uxth r2, r3
8005fce: 6e7b ldr r3, [r7, #100] @ 0x64
8005fd0: 801a strh r2, [r3, #0]
8005fd2: e024 b.n 800601e <USB_EPStartXfer+0xb62>
8005fd4: f507 7384 add.w r3, r7, #264 @ 0x108
8005fd8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005fdc: 681b ldr r3, [r3, #0]
8005fde: 785b ldrb r3, [r3, #1]
8005fe0: 2b01 cmp r3, #1
8005fe2: d11c bne.n 800601e <USB_EPStartXfer+0xb62>
8005fe4: f507 7384 add.w r3, r7, #264 @ 0x108
8005fe8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005fec: 681b ldr r3, [r3, #0]
8005fee: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005ff2: b29b uxth r3, r3
8005ff4: 461a mov r2, r3
8005ff6: 6f3b ldr r3, [r7, #112] @ 0x70
8005ff8: 4413 add r3, r2
8005ffa: 673b str r3, [r7, #112] @ 0x70
8005ffc: f507 7384 add.w r3, r7, #264 @ 0x108
8006000: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006004: 681b ldr r3, [r3, #0]
8006006: 781b ldrb r3, [r3, #0]
8006008: 011a lsls r2, r3, #4
800600a: 6f3b ldr r3, [r7, #112] @ 0x70
800600c: 4413 add r3, r2
800600e: f203 430c addw r3, r3, #1036 @ 0x40c
8006012: 66fb str r3, [r7, #108] @ 0x6c
8006014: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006018: b29a uxth r2, r3
800601a: 6efb ldr r3, [r7, #108] @ 0x6c
800601c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800601e: f507 7384 add.w r3, r7, #264 @ 0x108
8006022: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006026: 681b ldr r3, [r3, #0]
8006028: 895b ldrh r3, [r3, #10]
800602a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800602e: f507 7384 add.w r3, r7, #264 @ 0x108
8006032: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006036: 681b ldr r3, [r3, #0]
8006038: 6959 ldr r1, [r3, #20]
800603a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800603e: b29b uxth r3, r3
8006040: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8006044: f507 7084 add.w r0, r7, #264 @ 0x108
8006048: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800604c: 6800 ldr r0, [r0, #0]
800604e: f000 ff24 bl 8006e9a <USB_WritePMA>
8006052: e0ca b.n 80061ea <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8006054: f507 7384 add.w r3, r7, #264 @ 0x108
8006058: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800605c: 681b ldr r3, [r3, #0]
800605e: 785b ldrb r3, [r3, #1]
8006060: 2b00 cmp r3, #0
8006062: d177 bne.n 8006154 <USB_EPStartXfer+0xc98>
8006064: f507 7384 add.w r3, r7, #264 @ 0x108
8006068: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800606c: 681b ldr r3, [r3, #0]
800606e: 67fb str r3, [r7, #124] @ 0x7c
8006070: f507 7384 add.w r3, r7, #264 @ 0x108
8006074: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006078: 681b ldr r3, [r3, #0]
800607a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800607e: b29b uxth r3, r3
8006080: 461a mov r2, r3
8006082: 6ffb ldr r3, [r7, #124] @ 0x7c
8006084: 4413 add r3, r2
8006086: 67fb str r3, [r7, #124] @ 0x7c
8006088: f507 7384 add.w r3, r7, #264 @ 0x108
800608c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006090: 681b ldr r3, [r3, #0]
8006092: 781b ldrb r3, [r3, #0]
8006094: 011a lsls r2, r3, #4
8006096: 6ffb ldr r3, [r7, #124] @ 0x7c
8006098: 4413 add r3, r2
800609a: f203 4304 addw r3, r3, #1028 @ 0x404
800609e: 67bb str r3, [r7, #120] @ 0x78
80060a0: 6fbb ldr r3, [r7, #120] @ 0x78
80060a2: 881b ldrh r3, [r3, #0]
80060a4: b29b uxth r3, r3
80060a6: f3c3 0309 ubfx r3, r3, #0, #10
80060aa: b29a uxth r2, r3
80060ac: 6fbb ldr r3, [r7, #120] @ 0x78
80060ae: 801a strh r2, [r3, #0]
80060b0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80060b4: 2b3e cmp r3, #62 @ 0x3e
80060b6: d921 bls.n 80060fc <USB_EPStartXfer+0xc40>
80060b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80060bc: 095b lsrs r3, r3, #5
80060be: f8c7 30ec str.w r3, [r7, #236] @ 0xec
80060c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80060c6: f003 031f and.w r3, r3, #31
80060ca: 2b00 cmp r3, #0
80060cc: d104 bne.n 80060d8 <USB_EPStartXfer+0xc1c>
80060ce: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
80060d2: 3b01 subs r3, #1
80060d4: f8c7 30ec str.w r3, [r7, #236] @ 0xec
80060d8: 6fbb ldr r3, [r7, #120] @ 0x78
80060da: 881b ldrh r3, [r3, #0]
80060dc: b29a uxth r2, r3
80060de: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
80060e2: b29b uxth r3, r3
80060e4: 029b lsls r3, r3, #10
80060e6: b29b uxth r3, r3
80060e8: 4313 orrs r3, r2
80060ea: b29b uxth r3, r3
80060ec: ea6f 4343 mvn.w r3, r3, lsl #17
80060f0: ea6f 4353 mvn.w r3, r3, lsr #17
80060f4: b29a uxth r2, r3
80060f6: 6fbb ldr r3, [r7, #120] @ 0x78
80060f8: 801a strh r2, [r3, #0]
80060fa: e05c b.n 80061b6 <USB_EPStartXfer+0xcfa>
80060fc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006100: 2b00 cmp r3, #0
8006102: d10a bne.n 800611a <USB_EPStartXfer+0xc5e>
8006104: 6fbb ldr r3, [r7, #120] @ 0x78
8006106: 881b ldrh r3, [r3, #0]
8006108: b29b uxth r3, r3
800610a: ea6f 4343 mvn.w r3, r3, lsl #17
800610e: ea6f 4353 mvn.w r3, r3, lsr #17
8006112: b29a uxth r2, r3
8006114: 6fbb ldr r3, [r7, #120] @ 0x78
8006116: 801a strh r2, [r3, #0]
8006118: e04d b.n 80061b6 <USB_EPStartXfer+0xcfa>
800611a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800611e: 085b lsrs r3, r3, #1
8006120: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8006124: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006128: f003 0301 and.w r3, r3, #1
800612c: 2b00 cmp r3, #0
800612e: d004 beq.n 800613a <USB_EPStartXfer+0xc7e>
8006130: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8006134: 3301 adds r3, #1
8006136: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800613a: 6fbb ldr r3, [r7, #120] @ 0x78
800613c: 881b ldrh r3, [r3, #0]
800613e: b29a uxth r2, r3
8006140: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8006144: b29b uxth r3, r3
8006146: 029b lsls r3, r3, #10
8006148: b29b uxth r3, r3
800614a: 4313 orrs r3, r2
800614c: b29a uxth r2, r3
800614e: 6fbb ldr r3, [r7, #120] @ 0x78
8006150: 801a strh r2, [r3, #0]
8006152: e030 b.n 80061b6 <USB_EPStartXfer+0xcfa>
8006154: f507 7384 add.w r3, r7, #264 @ 0x108
8006158: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800615c: 681b ldr r3, [r3, #0]
800615e: 785b ldrb r3, [r3, #1]
8006160: 2b01 cmp r3, #1
8006162: d128 bne.n 80061b6 <USB_EPStartXfer+0xcfa>
8006164: f507 7384 add.w r3, r7, #264 @ 0x108
8006168: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800616c: 681b ldr r3, [r3, #0]
800616e: f8c7 3084 str.w r3, [r7, #132] @ 0x84
8006172: f507 7384 add.w r3, r7, #264 @ 0x108
8006176: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800617a: 681b ldr r3, [r3, #0]
800617c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006180: b29b uxth r3, r3
8006182: 461a mov r2, r3
8006184: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
8006188: 4413 add r3, r2
800618a: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800618e: f507 7384 add.w r3, r7, #264 @ 0x108
8006192: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006196: 681b ldr r3, [r3, #0]
8006198: 781b ldrb r3, [r3, #0]
800619a: 011a lsls r2, r3, #4
800619c: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
80061a0: 4413 add r3, r2
80061a2: f203 4304 addw r3, r3, #1028 @ 0x404
80061a6: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80061aa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80061ae: b29a uxth r2, r3
80061b0: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80061b4: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80061b6: f507 7384 add.w r3, r7, #264 @ 0x108
80061ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80061be: 681b ldr r3, [r3, #0]
80061c0: 891b ldrh r3, [r3, #8]
80061c2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80061c6: f507 7384 add.w r3, r7, #264 @ 0x108
80061ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80061ce: 681b ldr r3, [r3, #0]
80061d0: 6959 ldr r1, [r3, #20]
80061d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80061d6: b29b uxth r3, r3
80061d8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80061dc: f507 7084 add.w r0, r7, #264 @ 0x108
80061e0: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80061e4: 6800 ldr r0, [r0, #0]
80061e6: f000 fe58 bl 8006e9a <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
80061ea: f507 7384 add.w r3, r7, #264 @ 0x108
80061ee: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80061f2: 681a ldr r2, [r3, #0]
80061f4: f507 7384 add.w r3, r7, #264 @ 0x108
80061f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80061fc: 681b ldr r3, [r3, #0]
80061fe: 781b ldrb r3, [r3, #0]
8006200: 009b lsls r3, r3, #2
8006202: 4413 add r3, r2
8006204: 881b ldrh r3, [r3, #0]
8006206: b29b uxth r3, r3
8006208: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800620c: f023 0340 bic.w r3, r3, #64 @ 0x40
8006210: 817b strh r3, [r7, #10]
8006212: 897b ldrh r3, [r7, #10]
8006214: f083 0310 eor.w r3, r3, #16
8006218: 817b strh r3, [r7, #10]
800621a: 897b ldrh r3, [r7, #10]
800621c: f083 0320 eor.w r3, r3, #32
8006220: 817b strh r3, [r7, #10]
8006222: f507 7384 add.w r3, r7, #264 @ 0x108
8006226: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800622a: 681a ldr r2, [r3, #0]
800622c: f507 7384 add.w r3, r7, #264 @ 0x108
8006230: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006234: 681b ldr r3, [r3, #0]
8006236: 781b ldrb r3, [r3, #0]
8006238: 009b lsls r3, r3, #2
800623a: 441a add r2, r3
800623c: 897b ldrh r3, [r7, #10]
800623e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006242: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006246: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800624a: f043 0380 orr.w r3, r3, #128 @ 0x80
800624e: b29b uxth r3, r3
8006250: 8013 strh r3, [r2, #0]
8006252: f000 bcde b.w 8006c12 <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
8006256: f507 7384 add.w r3, r7, #264 @ 0x108
800625a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800625e: 681b ldr r3, [r3, #0]
8006260: 7b1b ldrb r3, [r3, #12]
8006262: 2b00 cmp r3, #0
8006264: f040 80bb bne.w 80063de <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8006268: f507 7384 add.w r3, r7, #264 @ 0x108
800626c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006270: 681b ldr r3, [r3, #0]
8006272: 699a ldr r2, [r3, #24]
8006274: f507 7384 add.w r3, r7, #264 @ 0x108
8006278: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800627c: 681b ldr r3, [r3, #0]
800627e: 691b ldr r3, [r3, #16]
8006280: 429a cmp r2, r3
8006282: d917 bls.n 80062b4 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
8006284: f507 7384 add.w r3, r7, #264 @ 0x108
8006288: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800628c: 681b ldr r3, [r3, #0]
800628e: 691b ldr r3, [r3, #16]
8006290: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
8006294: f507 7384 add.w r3, r7, #264 @ 0x108
8006298: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800629c: 681b ldr r3, [r3, #0]
800629e: 699a ldr r2, [r3, #24]
80062a0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80062a4: 1ad2 subs r2, r2, r3
80062a6: f507 7384 add.w r3, r7, #264 @ 0x108
80062aa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80062ae: 681b ldr r3, [r3, #0]
80062b0: 619a str r2, [r3, #24]
80062b2: e00e b.n 80062d2 <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
80062b4: f507 7384 add.w r3, r7, #264 @ 0x108
80062b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80062bc: 681b ldr r3, [r3, #0]
80062be: 699b ldr r3, [r3, #24]
80062c0: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
80062c4: f507 7384 add.w r3, r7, #264 @ 0x108
80062c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80062cc: 681b ldr r3, [r3, #0]
80062ce: 2200 movs r2, #0
80062d0: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
80062d2: f507 7384 add.w r3, r7, #264 @ 0x108
80062d6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80062da: 681b ldr r3, [r3, #0]
80062dc: f8c7 3090 str.w r3, [r7, #144] @ 0x90
80062e0: f507 7384 add.w r3, r7, #264 @ 0x108
80062e4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80062e8: 681b ldr r3, [r3, #0]
80062ea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80062ee: b29b uxth r3, r3
80062f0: 461a mov r2, r3
80062f2: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
80062f6: 4413 add r3, r2
80062f8: f8c7 3090 str.w r3, [r7, #144] @ 0x90
80062fc: f507 7384 add.w r3, r7, #264 @ 0x108
8006300: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006304: 681b ldr r3, [r3, #0]
8006306: 781b ldrb r3, [r3, #0]
8006308: 011a lsls r2, r3, #4
800630a: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800630e: 4413 add r3, r2
8006310: f203 430c addw r3, r3, #1036 @ 0x40c
8006314: f8c7 308c str.w r3, [r7, #140] @ 0x8c
8006318: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800631c: 881b ldrh r3, [r3, #0]
800631e: b29b uxth r3, r3
8006320: f3c3 0309 ubfx r3, r3, #0, #10
8006324: b29a uxth r2, r3
8006326: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800632a: 801a strh r2, [r3, #0]
800632c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006330: 2b3e cmp r3, #62 @ 0x3e
8006332: d924 bls.n 800637e <USB_EPStartXfer+0xec2>
8006334: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006338: 095b lsrs r3, r3, #5
800633a: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800633e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006342: f003 031f and.w r3, r3, #31
8006346: 2b00 cmp r3, #0
8006348: d104 bne.n 8006354 <USB_EPStartXfer+0xe98>
800634a: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800634e: 3b01 subs r3, #1
8006350: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8006354: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006358: 881b ldrh r3, [r3, #0]
800635a: b29a uxth r2, r3
800635c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8006360: b29b uxth r3, r3
8006362: 029b lsls r3, r3, #10
8006364: b29b uxth r3, r3
8006366: 4313 orrs r3, r2
8006368: b29b uxth r3, r3
800636a: ea6f 4343 mvn.w r3, r3, lsl #17
800636e: ea6f 4353 mvn.w r3, r3, lsr #17
8006372: b29a uxth r2, r3
8006374: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006378: 801a strh r2, [r3, #0]
800637a: f000 bc10 b.w 8006b9e <USB_EPStartXfer+0x16e2>
800637e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006382: 2b00 cmp r3, #0
8006384: d10c bne.n 80063a0 <USB_EPStartXfer+0xee4>
8006386: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800638a: 881b ldrh r3, [r3, #0]
800638c: b29b uxth r3, r3
800638e: ea6f 4343 mvn.w r3, r3, lsl #17
8006392: ea6f 4353 mvn.w r3, r3, lsr #17
8006396: b29a uxth r2, r3
8006398: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800639c: 801a strh r2, [r3, #0]
800639e: e3fe b.n 8006b9e <USB_EPStartXfer+0x16e2>
80063a0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80063a4: 085b lsrs r3, r3, #1
80063a6: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
80063aa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80063ae: f003 0301 and.w r3, r3, #1
80063b2: 2b00 cmp r3, #0
80063b4: d004 beq.n 80063c0 <USB_EPStartXfer+0xf04>
80063b6: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
80063ba: 3301 adds r3, #1
80063bc: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
80063c0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80063c4: 881b ldrh r3, [r3, #0]
80063c6: b29a uxth r2, r3
80063c8: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
80063cc: b29b uxth r3, r3
80063ce: 029b lsls r3, r3, #10
80063d0: b29b uxth r3, r3
80063d2: 4313 orrs r3, r2
80063d4: b29a uxth r2, r3
80063d6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80063da: 801a strh r2, [r3, #0]
80063dc: e3df b.n 8006b9e <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
80063de: f507 7384 add.w r3, r7, #264 @ 0x108
80063e2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80063e6: 681b ldr r3, [r3, #0]
80063e8: 78db ldrb r3, [r3, #3]
80063ea: 2b02 cmp r3, #2
80063ec: f040 8218 bne.w 8006820 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
80063f0: f507 7384 add.w r3, r7, #264 @ 0x108
80063f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80063f8: 681b ldr r3, [r3, #0]
80063fa: 785b ldrb r3, [r3, #1]
80063fc: 2b00 cmp r3, #0
80063fe: f040 809d bne.w 800653c <USB_EPStartXfer+0x1080>
8006402: f507 7384 add.w r3, r7, #264 @ 0x108
8006406: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800640a: 681b ldr r3, [r3, #0]
800640c: f8c7 30ac str.w r3, [r7, #172] @ 0xac
8006410: f507 7384 add.w r3, r7, #264 @ 0x108
8006414: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006418: 681b ldr r3, [r3, #0]
800641a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800641e: b29b uxth r3, r3
8006420: 461a mov r2, r3
8006422: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8006426: 4413 add r3, r2
8006428: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800642c: f507 7384 add.w r3, r7, #264 @ 0x108
8006430: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006434: 681b ldr r3, [r3, #0]
8006436: 781b ldrb r3, [r3, #0]
8006438: 011a lsls r2, r3, #4
800643a: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800643e: 4413 add r3, r2
8006440: f203 4304 addw r3, r3, #1028 @ 0x404
8006444: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
8006448: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800644c: 881b ldrh r3, [r3, #0]
800644e: b29b uxth r3, r3
8006450: f3c3 0309 ubfx r3, r3, #0, #10
8006454: b29a uxth r2, r3
8006456: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800645a: 801a strh r2, [r3, #0]
800645c: f507 7384 add.w r3, r7, #264 @ 0x108
8006460: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006464: 681b ldr r3, [r3, #0]
8006466: 691b ldr r3, [r3, #16]
8006468: 2b3e cmp r3, #62 @ 0x3e
800646a: d92b bls.n 80064c4 <USB_EPStartXfer+0x1008>
800646c: f507 7384 add.w r3, r7, #264 @ 0x108
8006470: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006474: 681b ldr r3, [r3, #0]
8006476: 691b ldr r3, [r3, #16]
8006478: 095b lsrs r3, r3, #5
800647a: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800647e: f507 7384 add.w r3, r7, #264 @ 0x108
8006482: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006486: 681b ldr r3, [r3, #0]
8006488: 691b ldr r3, [r3, #16]
800648a: f003 031f and.w r3, r3, #31
800648e: 2b00 cmp r3, #0
8006490: d104 bne.n 800649c <USB_EPStartXfer+0xfe0>
8006492: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8006496: 3b01 subs r3, #1
8006498: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800649c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80064a0: 881b ldrh r3, [r3, #0]
80064a2: b29a uxth r2, r3
80064a4: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
80064a8: b29b uxth r3, r3
80064aa: 029b lsls r3, r3, #10
80064ac: b29b uxth r3, r3
80064ae: 4313 orrs r3, r2
80064b0: b29b uxth r3, r3
80064b2: ea6f 4343 mvn.w r3, r3, lsl #17
80064b6: ea6f 4353 mvn.w r3, r3, lsr #17
80064ba: b29a uxth r2, r3
80064bc: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80064c0: 801a strh r2, [r3, #0]
80064c2: e070 b.n 80065a6 <USB_EPStartXfer+0x10ea>
80064c4: f507 7384 add.w r3, r7, #264 @ 0x108
80064c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80064cc: 681b ldr r3, [r3, #0]
80064ce: 691b ldr r3, [r3, #16]
80064d0: 2b00 cmp r3, #0
80064d2: d10c bne.n 80064ee <USB_EPStartXfer+0x1032>
80064d4: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80064d8: 881b ldrh r3, [r3, #0]
80064da: b29b uxth r3, r3
80064dc: ea6f 4343 mvn.w r3, r3, lsl #17
80064e0: ea6f 4353 mvn.w r3, r3, lsr #17
80064e4: b29a uxth r2, r3
80064e6: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80064ea: 801a strh r2, [r3, #0]
80064ec: e05b b.n 80065a6 <USB_EPStartXfer+0x10ea>
80064ee: f507 7384 add.w r3, r7, #264 @ 0x108
80064f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80064f6: 681b ldr r3, [r3, #0]
80064f8: 691b ldr r3, [r3, #16]
80064fa: 085b lsrs r3, r3, #1
80064fc: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8006500: f507 7384 add.w r3, r7, #264 @ 0x108
8006504: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006508: 681b ldr r3, [r3, #0]
800650a: 691b ldr r3, [r3, #16]
800650c: f003 0301 and.w r3, r3, #1
8006510: 2b00 cmp r3, #0
8006512: d004 beq.n 800651e <USB_EPStartXfer+0x1062>
8006514: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8006518: 3301 adds r3, #1
800651a: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800651e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8006522: 881b ldrh r3, [r3, #0]
8006524: b29a uxth r2, r3
8006526: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800652a: b29b uxth r3, r3
800652c: 029b lsls r3, r3, #10
800652e: b29b uxth r3, r3
8006530: 4313 orrs r3, r2
8006532: b29a uxth r2, r3
8006534: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8006538: 801a strh r2, [r3, #0]
800653a: e034 b.n 80065a6 <USB_EPStartXfer+0x10ea>
800653c: f507 7384 add.w r3, r7, #264 @ 0x108
8006540: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006544: 681b ldr r3, [r3, #0]
8006546: 785b ldrb r3, [r3, #1]
8006548: 2b01 cmp r3, #1
800654a: d12c bne.n 80065a6 <USB_EPStartXfer+0x10ea>
800654c: f507 7384 add.w r3, r7, #264 @ 0x108
8006550: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006554: 681b ldr r3, [r3, #0]
8006556: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800655a: f507 7384 add.w r3, r7, #264 @ 0x108
800655e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006562: 681b ldr r3, [r3, #0]
8006564: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006568: b29b uxth r3, r3
800656a: 461a mov r2, r3
800656c: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8006570: 4413 add r3, r2
8006572: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8006576: f507 7384 add.w r3, r7, #264 @ 0x108
800657a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800657e: 681b ldr r3, [r3, #0]
8006580: 781b ldrb r3, [r3, #0]
8006582: 011a lsls r2, r3, #4
8006584: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8006588: 4413 add r3, r2
800658a: f203 4304 addw r3, r3, #1028 @ 0x404
800658e: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
8006592: f507 7384 add.w r3, r7, #264 @ 0x108
8006596: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800659a: 681b ldr r3, [r3, #0]
800659c: 691b ldr r3, [r3, #16]
800659e: b29a uxth r2, r3
80065a0: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
80065a4: 801a strh r2, [r3, #0]
80065a6: f507 7384 add.w r3, r7, #264 @ 0x108
80065aa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80065ae: 681b ldr r3, [r3, #0]
80065b0: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
80065b4: f507 7384 add.w r3, r7, #264 @ 0x108
80065b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80065bc: 681b ldr r3, [r3, #0]
80065be: 785b ldrb r3, [r3, #1]
80065c0: 2b00 cmp r3, #0
80065c2: f040 809d bne.w 8006700 <USB_EPStartXfer+0x1244>
80065c6: f507 7384 add.w r3, r7, #264 @ 0x108
80065ca: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80065ce: 681b ldr r3, [r3, #0]
80065d0: f8c7 309c str.w r3, [r7, #156] @ 0x9c
80065d4: f507 7384 add.w r3, r7, #264 @ 0x108
80065d8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80065dc: 681b ldr r3, [r3, #0]
80065de: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80065e2: b29b uxth r3, r3
80065e4: 461a mov r2, r3
80065e6: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
80065ea: 4413 add r3, r2
80065ec: f8c7 309c str.w r3, [r7, #156] @ 0x9c
80065f0: f507 7384 add.w r3, r7, #264 @ 0x108
80065f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80065f8: 681b ldr r3, [r3, #0]
80065fa: 781b ldrb r3, [r3, #0]
80065fc: 011a lsls r2, r3, #4
80065fe: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8006602: 4413 add r3, r2
8006604: f203 430c addw r3, r3, #1036 @ 0x40c
8006608: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800660c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8006610: 881b ldrh r3, [r3, #0]
8006612: b29b uxth r3, r3
8006614: f3c3 0309 ubfx r3, r3, #0, #10
8006618: b29a uxth r2, r3
800661a: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800661e: 801a strh r2, [r3, #0]
8006620: f507 7384 add.w r3, r7, #264 @ 0x108
8006624: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006628: 681b ldr r3, [r3, #0]
800662a: 691b ldr r3, [r3, #16]
800662c: 2b3e cmp r3, #62 @ 0x3e
800662e: d92b bls.n 8006688 <USB_EPStartXfer+0x11cc>
8006630: f507 7384 add.w r3, r7, #264 @ 0x108
8006634: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006638: 681b ldr r3, [r3, #0]
800663a: 691b ldr r3, [r3, #16]
800663c: 095b lsrs r3, r3, #5
800663e: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8006642: f507 7384 add.w r3, r7, #264 @ 0x108
8006646: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800664a: 681b ldr r3, [r3, #0]
800664c: 691b ldr r3, [r3, #16]
800664e: f003 031f and.w r3, r3, #31
8006652: 2b00 cmp r3, #0
8006654: d104 bne.n 8006660 <USB_EPStartXfer+0x11a4>
8006656: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800665a: 3b01 subs r3, #1
800665c: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8006660: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8006664: 881b ldrh r3, [r3, #0]
8006666: b29a uxth r2, r3
8006668: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800666c: b29b uxth r3, r3
800666e: 029b lsls r3, r3, #10
8006670: b29b uxth r3, r3
8006672: 4313 orrs r3, r2
8006674: b29b uxth r3, r3
8006676: ea6f 4343 mvn.w r3, r3, lsl #17
800667a: ea6f 4353 mvn.w r3, r3, lsr #17
800667e: b29a uxth r2, r3
8006680: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8006684: 801a strh r2, [r3, #0]
8006686: e069 b.n 800675c <USB_EPStartXfer+0x12a0>
8006688: f507 7384 add.w r3, r7, #264 @ 0x108
800668c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006690: 681b ldr r3, [r3, #0]
8006692: 691b ldr r3, [r3, #16]
8006694: 2b00 cmp r3, #0
8006696: d10c bne.n 80066b2 <USB_EPStartXfer+0x11f6>
8006698: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800669c: 881b ldrh r3, [r3, #0]
800669e: b29b uxth r3, r3
80066a0: ea6f 4343 mvn.w r3, r3, lsl #17
80066a4: ea6f 4353 mvn.w r3, r3, lsr #17
80066a8: b29a uxth r2, r3
80066aa: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
80066ae: 801a strh r2, [r3, #0]
80066b0: e054 b.n 800675c <USB_EPStartXfer+0x12a0>
80066b2: f507 7384 add.w r3, r7, #264 @ 0x108
80066b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80066ba: 681b ldr r3, [r3, #0]
80066bc: 691b ldr r3, [r3, #16]
80066be: 085b lsrs r3, r3, #1
80066c0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
80066c4: f507 7384 add.w r3, r7, #264 @ 0x108
80066c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80066cc: 681b ldr r3, [r3, #0]
80066ce: 691b ldr r3, [r3, #16]
80066d0: f003 0301 and.w r3, r3, #1
80066d4: 2b00 cmp r3, #0
80066d6: d004 beq.n 80066e2 <USB_EPStartXfer+0x1226>
80066d8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
80066dc: 3301 adds r3, #1
80066de: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
80066e2: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
80066e6: 881b ldrh r3, [r3, #0]
80066e8: b29a uxth r2, r3
80066ea: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
80066ee: b29b uxth r3, r3
80066f0: 029b lsls r3, r3, #10
80066f2: b29b uxth r3, r3
80066f4: 4313 orrs r3, r2
80066f6: b29a uxth r2, r3
80066f8: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
80066fc: 801a strh r2, [r3, #0]
80066fe: e02d b.n 800675c <USB_EPStartXfer+0x12a0>
8006700: f507 7384 add.w r3, r7, #264 @ 0x108
8006704: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006708: 681b ldr r3, [r3, #0]
800670a: 785b ldrb r3, [r3, #1]
800670c: 2b01 cmp r3, #1
800670e: d125 bne.n 800675c <USB_EPStartXfer+0x12a0>
8006710: f507 7384 add.w r3, r7, #264 @ 0x108
8006714: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006718: 681b ldr r3, [r3, #0]
800671a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800671e: b29b uxth r3, r3
8006720: 461a mov r2, r3
8006722: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8006726: 4413 add r3, r2
8006728: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800672c: f507 7384 add.w r3, r7, #264 @ 0x108
8006730: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006734: 681b ldr r3, [r3, #0]
8006736: 781b ldrb r3, [r3, #0]
8006738: 011a lsls r2, r3, #4
800673a: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800673e: 4413 add r3, r2
8006740: f203 430c addw r3, r3, #1036 @ 0x40c
8006744: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
8006748: f507 7384 add.w r3, r7, #264 @ 0x108
800674c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006750: 681b ldr r3, [r3, #0]
8006752: 691b ldr r3, [r3, #16]
8006754: b29a uxth r2, r3
8006756: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800675a: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
800675c: f507 7384 add.w r3, r7, #264 @ 0x108
8006760: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006764: 681b ldr r3, [r3, #0]
8006766: 69db ldr r3, [r3, #28]
8006768: 2b00 cmp r3, #0
800676a: f000 8218 beq.w 8006b9e <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800676e: f507 7384 add.w r3, r7, #264 @ 0x108
8006772: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006776: 681a ldr r2, [r3, #0]
8006778: f507 7384 add.w r3, r7, #264 @ 0x108
800677c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006780: 681b ldr r3, [r3, #0]
8006782: 781b ldrb r3, [r3, #0]
8006784: 009b lsls r3, r3, #2
8006786: 4413 add r3, r2
8006788: 881b ldrh r3, [r3, #0]
800678a: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800678e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8006792: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006796: 2b00 cmp r3, #0
8006798: d005 beq.n 80067a6 <USB_EPStartXfer+0x12ea>
800679a: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800679e: f003 0340 and.w r3, r3, #64 @ 0x40
80067a2: 2b00 cmp r3, #0
80067a4: d10d bne.n 80067c2 <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
80067a6: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
80067aa: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
80067ae: 2b00 cmp r3, #0
80067b0: f040 81f5 bne.w 8006b9e <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
80067b4: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
80067b8: f003 0340 and.w r3, r3, #64 @ 0x40
80067bc: 2b00 cmp r3, #0
80067be: f040 81ee bne.w 8006b9e <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
80067c2: f507 7384 add.w r3, r7, #264 @ 0x108
80067c6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80067ca: 681a ldr r2, [r3, #0]
80067cc: f507 7384 add.w r3, r7, #264 @ 0x108
80067d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80067d4: 681b ldr r3, [r3, #0]
80067d6: 781b ldrb r3, [r3, #0]
80067d8: 009b lsls r3, r3, #2
80067da: 4413 add r3, r2
80067dc: 881b ldrh r3, [r3, #0]
80067de: b29b uxth r3, r3
80067e0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80067e4: f023 0370 bic.w r3, r3, #112 @ 0x70
80067e8: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
80067ec: f507 7384 add.w r3, r7, #264 @ 0x108
80067f0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80067f4: 681a ldr r2, [r3, #0]
80067f6: f507 7384 add.w r3, r7, #264 @ 0x108
80067fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80067fe: 681b ldr r3, [r3, #0]
8006800: 781b ldrb r3, [r3, #0]
8006802: 009b lsls r3, r3, #2
8006804: 441a add r2, r3
8006806: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
800680a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800680e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006812: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006816: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800681a: b29b uxth r3, r3
800681c: 8013 strh r3, [r2, #0]
800681e: e1be b.n 8006b9e <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
8006820: f507 7384 add.w r3, r7, #264 @ 0x108
8006824: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006828: 681b ldr r3, [r3, #0]
800682a: 78db ldrb r3, [r3, #3]
800682c: 2b01 cmp r3, #1
800682e: f040 81b4 bne.w 8006b9a <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8006832: f507 7384 add.w r3, r7, #264 @ 0x108
8006836: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800683a: 681b ldr r3, [r3, #0]
800683c: 699a ldr r2, [r3, #24]
800683e: f507 7384 add.w r3, r7, #264 @ 0x108
8006842: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006846: 681b ldr r3, [r3, #0]
8006848: 691b ldr r3, [r3, #16]
800684a: 429a cmp r2, r3
800684c: d917 bls.n 800687e <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800684e: f507 7384 add.w r3, r7, #264 @ 0x108
8006852: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006856: 681b ldr r3, [r3, #0]
8006858: 691b ldr r3, [r3, #16]
800685a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800685e: f507 7384 add.w r3, r7, #264 @ 0x108
8006862: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006866: 681b ldr r3, [r3, #0]
8006868: 699a ldr r2, [r3, #24]
800686a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800686e: 1ad2 subs r2, r2, r3
8006870: f507 7384 add.w r3, r7, #264 @ 0x108
8006874: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006878: 681b ldr r3, [r3, #0]
800687a: 619a str r2, [r3, #24]
800687c: e00e b.n 800689c <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
800687e: f507 7384 add.w r3, r7, #264 @ 0x108
8006882: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006886: 681b ldr r3, [r3, #0]
8006888: 699b ldr r3, [r3, #24]
800688a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800688e: f507 7384 add.w r3, r7, #264 @ 0x108
8006892: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006896: 681b ldr r3, [r3, #0]
8006898: 2200 movs r2, #0
800689a: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
800689c: f507 7384 add.w r3, r7, #264 @ 0x108
80068a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80068a4: 681b ldr r3, [r3, #0]
80068a6: 785b ldrb r3, [r3, #1]
80068a8: 2b00 cmp r3, #0
80068aa: f040 8085 bne.w 80069b8 <USB_EPStartXfer+0x14fc>
80068ae: f507 7384 add.w r3, r7, #264 @ 0x108
80068b2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80068b6: 681b ldr r3, [r3, #0]
80068b8: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
80068bc: f507 7384 add.w r3, r7, #264 @ 0x108
80068c0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80068c4: 681b ldr r3, [r3, #0]
80068c6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80068ca: b29b uxth r3, r3
80068cc: 461a mov r2, r3
80068ce: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
80068d2: 4413 add r3, r2
80068d4: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
80068d8: f507 7384 add.w r3, r7, #264 @ 0x108
80068dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80068e0: 681b ldr r3, [r3, #0]
80068e2: 781b ldrb r3, [r3, #0]
80068e4: 011a lsls r2, r3, #4
80068e6: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
80068ea: 4413 add r3, r2
80068ec: f203 4304 addw r3, r3, #1028 @ 0x404
80068f0: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
80068f4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80068f8: 881b ldrh r3, [r3, #0]
80068fa: b29b uxth r3, r3
80068fc: f3c3 0309 ubfx r3, r3, #0, #10
8006900: b29a uxth r2, r3
8006902: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006906: 801a strh r2, [r3, #0]
8006908: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800690c: 2b3e cmp r3, #62 @ 0x3e
800690e: d923 bls.n 8006958 <USB_EPStartXfer+0x149c>
8006910: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006914: 095b lsrs r3, r3, #5
8006916: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800691a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800691e: f003 031f and.w r3, r3, #31
8006922: 2b00 cmp r3, #0
8006924: d104 bne.n 8006930 <USB_EPStartXfer+0x1474>
8006926: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800692a: 3b01 subs r3, #1
800692c: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8006930: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006934: 881b ldrh r3, [r3, #0]
8006936: b29a uxth r2, r3
8006938: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800693c: b29b uxth r3, r3
800693e: 029b lsls r3, r3, #10
8006940: b29b uxth r3, r3
8006942: 4313 orrs r3, r2
8006944: b29b uxth r3, r3
8006946: ea6f 4343 mvn.w r3, r3, lsl #17
800694a: ea6f 4353 mvn.w r3, r3, lsr #17
800694e: b29a uxth r2, r3
8006950: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006954: 801a strh r2, [r3, #0]
8006956: e060 b.n 8006a1a <USB_EPStartXfer+0x155e>
8006958: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800695c: 2b00 cmp r3, #0
800695e: d10c bne.n 800697a <USB_EPStartXfer+0x14be>
8006960: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006964: 881b ldrh r3, [r3, #0]
8006966: b29b uxth r3, r3
8006968: ea6f 4343 mvn.w r3, r3, lsl #17
800696c: ea6f 4353 mvn.w r3, r3, lsr #17
8006970: b29a uxth r2, r3
8006972: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006976: 801a strh r2, [r3, #0]
8006978: e04f b.n 8006a1a <USB_EPStartXfer+0x155e>
800697a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800697e: 085b lsrs r3, r3, #1
8006980: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8006984: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006988: f003 0301 and.w r3, r3, #1
800698c: 2b00 cmp r3, #0
800698e: d004 beq.n 800699a <USB_EPStartXfer+0x14de>
8006990: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8006994: 3301 adds r3, #1
8006996: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800699a: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800699e: 881b ldrh r3, [r3, #0]
80069a0: b29a uxth r2, r3
80069a2: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
80069a6: b29b uxth r3, r3
80069a8: 029b lsls r3, r3, #10
80069aa: b29b uxth r3, r3
80069ac: 4313 orrs r3, r2
80069ae: b29a uxth r2, r3
80069b0: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80069b4: 801a strh r2, [r3, #0]
80069b6: e030 b.n 8006a1a <USB_EPStartXfer+0x155e>
80069b8: f507 7384 add.w r3, r7, #264 @ 0x108
80069bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069c0: 681b ldr r3, [r3, #0]
80069c2: 785b ldrb r3, [r3, #1]
80069c4: 2b01 cmp r3, #1
80069c6: d128 bne.n 8006a1a <USB_EPStartXfer+0x155e>
80069c8: f507 7384 add.w r3, r7, #264 @ 0x108
80069cc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80069d0: 681b ldr r3, [r3, #0]
80069d2: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
80069d6: f507 7384 add.w r3, r7, #264 @ 0x108
80069da: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80069de: 681b ldr r3, [r3, #0]
80069e0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80069e4: b29b uxth r3, r3
80069e6: 461a mov r2, r3
80069e8: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
80069ec: 4413 add r3, r2
80069ee: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
80069f2: f507 7384 add.w r3, r7, #264 @ 0x108
80069f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069fa: 681b ldr r3, [r3, #0]
80069fc: 781b ldrb r3, [r3, #0]
80069fe: 011a lsls r2, r3, #4
8006a00: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8006a04: 4413 add r3, r2
8006a06: f203 4304 addw r3, r3, #1028 @ 0x404
8006a0a: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
8006a0e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006a12: b29a uxth r2, r3
8006a14: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
8006a18: 801a strh r2, [r3, #0]
8006a1a: f507 7384 add.w r3, r7, #264 @ 0x108
8006a1e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006a22: 681b ldr r3, [r3, #0]
8006a24: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
8006a28: f507 7384 add.w r3, r7, #264 @ 0x108
8006a2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a30: 681b ldr r3, [r3, #0]
8006a32: 785b ldrb r3, [r3, #1]
8006a34: 2b00 cmp r3, #0
8006a36: f040 8085 bne.w 8006b44 <USB_EPStartXfer+0x1688>
8006a3a: f507 7384 add.w r3, r7, #264 @ 0x108
8006a3e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006a42: 681b ldr r3, [r3, #0]
8006a44: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8006a48: f507 7384 add.w r3, r7, #264 @ 0x108
8006a4c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006a50: 681b ldr r3, [r3, #0]
8006a52: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006a56: b29b uxth r3, r3
8006a58: 461a mov r2, r3
8006a5a: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
8006a5e: 4413 add r3, r2
8006a60: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8006a64: f507 7384 add.w r3, r7, #264 @ 0x108
8006a68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a6c: 681b ldr r3, [r3, #0]
8006a6e: 781b ldrb r3, [r3, #0]
8006a70: 011a lsls r2, r3, #4
8006a72: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
8006a76: 4413 add r3, r2
8006a78: f203 430c addw r3, r3, #1036 @ 0x40c
8006a7c: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
8006a80: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006a84: 881b ldrh r3, [r3, #0]
8006a86: b29b uxth r3, r3
8006a88: f3c3 0309 ubfx r3, r3, #0, #10
8006a8c: b29a uxth r2, r3
8006a8e: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006a92: 801a strh r2, [r3, #0]
8006a94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006a98: 2b3e cmp r3, #62 @ 0x3e
8006a9a: d923 bls.n 8006ae4 <USB_EPStartXfer+0x1628>
8006a9c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006aa0: 095b lsrs r3, r3, #5
8006aa2: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8006aa6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006aaa: f003 031f and.w r3, r3, #31
8006aae: 2b00 cmp r3, #0
8006ab0: d104 bne.n 8006abc <USB_EPStartXfer+0x1600>
8006ab2: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8006ab6: 3b01 subs r3, #1
8006ab8: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8006abc: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006ac0: 881b ldrh r3, [r3, #0]
8006ac2: b29a uxth r2, r3
8006ac4: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8006ac8: b29b uxth r3, r3
8006aca: 029b lsls r3, r3, #10
8006acc: b29b uxth r3, r3
8006ace: 4313 orrs r3, r2
8006ad0: b29b uxth r3, r3
8006ad2: ea6f 4343 mvn.w r3, r3, lsl #17
8006ad6: ea6f 4353 mvn.w r3, r3, lsr #17
8006ada: b29a uxth r2, r3
8006adc: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006ae0: 801a strh r2, [r3, #0]
8006ae2: e05c b.n 8006b9e <USB_EPStartXfer+0x16e2>
8006ae4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006ae8: 2b00 cmp r3, #0
8006aea: d10c bne.n 8006b06 <USB_EPStartXfer+0x164a>
8006aec: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006af0: 881b ldrh r3, [r3, #0]
8006af2: b29b uxth r3, r3
8006af4: ea6f 4343 mvn.w r3, r3, lsl #17
8006af8: ea6f 4353 mvn.w r3, r3, lsr #17
8006afc: b29a uxth r2, r3
8006afe: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006b02: 801a strh r2, [r3, #0]
8006b04: e04b b.n 8006b9e <USB_EPStartXfer+0x16e2>
8006b06: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006b0a: 085b lsrs r3, r3, #1
8006b0c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8006b10: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006b14: f003 0301 and.w r3, r3, #1
8006b18: 2b00 cmp r3, #0
8006b1a: d004 beq.n 8006b26 <USB_EPStartXfer+0x166a>
8006b1c: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8006b20: 3301 adds r3, #1
8006b22: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8006b26: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006b2a: 881b ldrh r3, [r3, #0]
8006b2c: b29a uxth r2, r3
8006b2e: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8006b32: b29b uxth r3, r3
8006b34: 029b lsls r3, r3, #10
8006b36: b29b uxth r3, r3
8006b38: 4313 orrs r3, r2
8006b3a: b29a uxth r2, r3
8006b3c: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006b40: 801a strh r2, [r3, #0]
8006b42: e02c b.n 8006b9e <USB_EPStartXfer+0x16e2>
8006b44: f507 7384 add.w r3, r7, #264 @ 0x108
8006b48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b4c: 681b ldr r3, [r3, #0]
8006b4e: 785b ldrb r3, [r3, #1]
8006b50: 2b01 cmp r3, #1
8006b52: d124 bne.n 8006b9e <USB_EPStartXfer+0x16e2>
8006b54: f507 7384 add.w r3, r7, #264 @ 0x108
8006b58: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006b5c: 681b ldr r3, [r3, #0]
8006b5e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006b62: b29b uxth r3, r3
8006b64: 461a mov r2, r3
8006b66: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
8006b6a: 4413 add r3, r2
8006b6c: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
8006b70: f507 7384 add.w r3, r7, #264 @ 0x108
8006b74: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b78: 681b ldr r3, [r3, #0]
8006b7a: 781b ldrb r3, [r3, #0]
8006b7c: 011a lsls r2, r3, #4
8006b7e: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
8006b82: 4413 add r3, r2
8006b84: f203 430c addw r3, r3, #1036 @ 0x40c
8006b88: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
8006b8c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006b90: b29a uxth r2, r3
8006b92: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
8006b96: 801a strh r2, [r3, #0]
8006b98: e001 b.n 8006b9e <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
8006b9a: 2301 movs r3, #1
8006b9c: e03a b.n 8006c14 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8006b9e: f507 7384 add.w r3, r7, #264 @ 0x108
8006ba2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006ba6: 681a ldr r2, [r3, #0]
8006ba8: f507 7384 add.w r3, r7, #264 @ 0x108
8006bac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006bb0: 681b ldr r3, [r3, #0]
8006bb2: 781b ldrb r3, [r3, #0]
8006bb4: 009b lsls r3, r3, #2
8006bb6: 4413 add r3, r2
8006bb8: 881b ldrh r3, [r3, #0]
8006bba: b29b uxth r3, r3
8006bbc: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006bc0: f023 0370 bic.w r3, r3, #112 @ 0x70
8006bc4: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8006bc8: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8006bcc: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006bd0: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8006bd4: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8006bd8: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006bdc: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8006be0: f507 7384 add.w r3, r7, #264 @ 0x108
8006be4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006be8: 681a ldr r2, [r3, #0]
8006bea: f507 7384 add.w r3, r7, #264 @ 0x108
8006bee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006bf2: 681b ldr r3, [r3, #0]
8006bf4: 781b ldrb r3, [r3, #0]
8006bf6: 009b lsls r3, r3, #2
8006bf8: 441a add r2, r3
8006bfa: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8006bfe: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006c02: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006c06: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006c0a: f043 0380 orr.w r3, r3, #128 @ 0x80
8006c0e: b29b uxth r3, r3
8006c10: 8013 strh r3, [r2, #0]
}
return HAL_OK;
8006c12: 2300 movs r3, #0
}
8006c14: 4618 mov r0, r3
8006c16: f507 7784 add.w r7, r7, #264 @ 0x108
8006c1a: 46bd mov sp, r7
8006c1c: bd80 pop {r7, pc}
08006c1e <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006c1e: b480 push {r7}
8006c20: b085 sub sp, #20
8006c22: af00 add r7, sp, #0
8006c24: 6078 str r0, [r7, #4]
8006c26: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
8006c28: 683b ldr r3, [r7, #0]
8006c2a: 785b ldrb r3, [r3, #1]
8006c2c: 2b00 cmp r3, #0
8006c2e: d020 beq.n 8006c72 <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
8006c30: 687a ldr r2, [r7, #4]
8006c32: 683b ldr r3, [r7, #0]
8006c34: 781b ldrb r3, [r3, #0]
8006c36: 009b lsls r3, r3, #2
8006c38: 4413 add r3, r2
8006c3a: 881b ldrh r3, [r3, #0]
8006c3c: b29b uxth r3, r3
8006c3e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006c42: f023 0340 bic.w r3, r3, #64 @ 0x40
8006c46: 81bb strh r3, [r7, #12]
8006c48: 89bb ldrh r3, [r7, #12]
8006c4a: f083 0310 eor.w r3, r3, #16
8006c4e: 81bb strh r3, [r7, #12]
8006c50: 687a ldr r2, [r7, #4]
8006c52: 683b ldr r3, [r7, #0]
8006c54: 781b ldrb r3, [r3, #0]
8006c56: 009b lsls r3, r3, #2
8006c58: 441a add r2, r3
8006c5a: 89bb ldrh r3, [r7, #12]
8006c5c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006c60: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006c64: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006c68: f043 0380 orr.w r3, r3, #128 @ 0x80
8006c6c: b29b uxth r3, r3
8006c6e: 8013 strh r3, [r2, #0]
8006c70: e01f b.n 8006cb2 <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
8006c72: 687a ldr r2, [r7, #4]
8006c74: 683b ldr r3, [r7, #0]
8006c76: 781b ldrb r3, [r3, #0]
8006c78: 009b lsls r3, r3, #2
8006c7a: 4413 add r3, r2
8006c7c: 881b ldrh r3, [r3, #0]
8006c7e: b29b uxth r3, r3
8006c80: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006c84: f023 0370 bic.w r3, r3, #112 @ 0x70
8006c88: 81fb strh r3, [r7, #14]
8006c8a: 89fb ldrh r3, [r7, #14]
8006c8c: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006c90: 81fb strh r3, [r7, #14]
8006c92: 687a ldr r2, [r7, #4]
8006c94: 683b ldr r3, [r7, #0]
8006c96: 781b ldrb r3, [r3, #0]
8006c98: 009b lsls r3, r3, #2
8006c9a: 441a add r2, r3
8006c9c: 89fb ldrh r3, [r7, #14]
8006c9e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006ca2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006ca6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006caa: f043 0380 orr.w r3, r3, #128 @ 0x80
8006cae: b29b uxth r3, r3
8006cb0: 8013 strh r3, [r2, #0]
}
return HAL_OK;
8006cb2: 2300 movs r3, #0
}
8006cb4: 4618 mov r0, r3
8006cb6: 3714 adds r7, #20
8006cb8: 46bd mov sp, r7
8006cba: bc80 pop {r7}
8006cbc: 4770 bx lr
08006cbe <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006cbe: b480 push {r7}
8006cc0: b087 sub sp, #28
8006cc2: af00 add r7, sp, #0
8006cc4: 6078 str r0, [r7, #4]
8006cc6: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8006cc8: 683b ldr r3, [r7, #0]
8006cca: 7b1b ldrb r3, [r3, #12]
8006ccc: 2b00 cmp r3, #0
8006cce: f040 809d bne.w 8006e0c <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
8006cd2: 683b ldr r3, [r7, #0]
8006cd4: 785b ldrb r3, [r3, #1]
8006cd6: 2b00 cmp r3, #0
8006cd8: d04c beq.n 8006d74 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006cda: 687a ldr r2, [r7, #4]
8006cdc: 683b ldr r3, [r7, #0]
8006cde: 781b ldrb r3, [r3, #0]
8006ce0: 009b lsls r3, r3, #2
8006ce2: 4413 add r3, r2
8006ce4: 881b ldrh r3, [r3, #0]
8006ce6: 823b strh r3, [r7, #16]
8006ce8: 8a3b ldrh r3, [r7, #16]
8006cea: f003 0340 and.w r3, r3, #64 @ 0x40
8006cee: 2b00 cmp r3, #0
8006cf0: d01b beq.n 8006d2a <USB_EPClearStall+0x6c>
8006cf2: 687a ldr r2, [r7, #4]
8006cf4: 683b ldr r3, [r7, #0]
8006cf6: 781b ldrb r3, [r3, #0]
8006cf8: 009b lsls r3, r3, #2
8006cfa: 4413 add r3, r2
8006cfc: 881b ldrh r3, [r3, #0]
8006cfe: b29b uxth r3, r3
8006d00: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006d04: f023 0370 bic.w r3, r3, #112 @ 0x70
8006d08: 81fb strh r3, [r7, #14]
8006d0a: 687a ldr r2, [r7, #4]
8006d0c: 683b ldr r3, [r7, #0]
8006d0e: 781b ldrb r3, [r3, #0]
8006d10: 009b lsls r3, r3, #2
8006d12: 441a add r2, r3
8006d14: 89fb ldrh r3, [r7, #14]
8006d16: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006d1a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006d1e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006d22: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006d26: b29b uxth r3, r3
8006d28: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8006d2a: 683b ldr r3, [r7, #0]
8006d2c: 78db ldrb r3, [r3, #3]
8006d2e: 2b01 cmp r3, #1
8006d30: d06c beq.n 8006e0c <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8006d32: 687a ldr r2, [r7, #4]
8006d34: 683b ldr r3, [r7, #0]
8006d36: 781b ldrb r3, [r3, #0]
8006d38: 009b lsls r3, r3, #2
8006d3a: 4413 add r3, r2
8006d3c: 881b ldrh r3, [r3, #0]
8006d3e: b29b uxth r3, r3
8006d40: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006d44: f023 0340 bic.w r3, r3, #64 @ 0x40
8006d48: 81bb strh r3, [r7, #12]
8006d4a: 89bb ldrh r3, [r7, #12]
8006d4c: f083 0320 eor.w r3, r3, #32
8006d50: 81bb strh r3, [r7, #12]
8006d52: 687a ldr r2, [r7, #4]
8006d54: 683b ldr r3, [r7, #0]
8006d56: 781b ldrb r3, [r3, #0]
8006d58: 009b lsls r3, r3, #2
8006d5a: 441a add r2, r3
8006d5c: 89bb ldrh r3, [r7, #12]
8006d5e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006d62: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006d66: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006d6a: f043 0380 orr.w r3, r3, #128 @ 0x80
8006d6e: b29b uxth r3, r3
8006d70: 8013 strh r3, [r2, #0]
8006d72: e04b b.n 8006e0c <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006d74: 687a ldr r2, [r7, #4]
8006d76: 683b ldr r3, [r7, #0]
8006d78: 781b ldrb r3, [r3, #0]
8006d7a: 009b lsls r3, r3, #2
8006d7c: 4413 add r3, r2
8006d7e: 881b ldrh r3, [r3, #0]
8006d80: 82fb strh r3, [r7, #22]
8006d82: 8afb ldrh r3, [r7, #22]
8006d84: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006d88: 2b00 cmp r3, #0
8006d8a: d01b beq.n 8006dc4 <USB_EPClearStall+0x106>
8006d8c: 687a ldr r2, [r7, #4]
8006d8e: 683b ldr r3, [r7, #0]
8006d90: 781b ldrb r3, [r3, #0]
8006d92: 009b lsls r3, r3, #2
8006d94: 4413 add r3, r2
8006d96: 881b ldrh r3, [r3, #0]
8006d98: b29b uxth r3, r3
8006d9a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006d9e: f023 0370 bic.w r3, r3, #112 @ 0x70
8006da2: 82bb strh r3, [r7, #20]
8006da4: 687a ldr r2, [r7, #4]
8006da6: 683b ldr r3, [r7, #0]
8006da8: 781b ldrb r3, [r3, #0]
8006daa: 009b lsls r3, r3, #2
8006dac: 441a add r2, r3
8006dae: 8abb ldrh r3, [r7, #20]
8006db0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006db4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006db8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006dbc: f043 0380 orr.w r3, r3, #128 @ 0x80
8006dc0: b29b uxth r3, r3
8006dc2: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8006dc4: 687a ldr r2, [r7, #4]
8006dc6: 683b ldr r3, [r7, #0]
8006dc8: 781b ldrb r3, [r3, #0]
8006dca: 009b lsls r3, r3, #2
8006dcc: 4413 add r3, r2
8006dce: 881b ldrh r3, [r3, #0]
8006dd0: b29b uxth r3, r3
8006dd2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006dd6: f023 0370 bic.w r3, r3, #112 @ 0x70
8006dda: 827b strh r3, [r7, #18]
8006ddc: 8a7b ldrh r3, [r7, #18]
8006dde: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006de2: 827b strh r3, [r7, #18]
8006de4: 8a7b ldrh r3, [r7, #18]
8006de6: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006dea: 827b strh r3, [r7, #18]
8006dec: 687a ldr r2, [r7, #4]
8006dee: 683b ldr r3, [r7, #0]
8006df0: 781b ldrb r3, [r3, #0]
8006df2: 009b lsls r3, r3, #2
8006df4: 441a add r2, r3
8006df6: 8a7b ldrh r3, [r7, #18]
8006df8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006dfc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006e00: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006e04: f043 0380 orr.w r3, r3, #128 @ 0x80
8006e08: b29b uxth r3, r3
8006e0a: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
8006e0c: 2300 movs r3, #0
}
8006e0e: 4618 mov r0, r3
8006e10: 371c adds r7, #28
8006e12: 46bd mov sp, r7
8006e14: bc80 pop {r7}
8006e16: 4770 bx lr
08006e18 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
8006e18: b480 push {r7}
8006e1a: b083 sub sp, #12
8006e1c: af00 add r7, sp, #0
8006e1e: 6078 str r0, [r7, #4]
8006e20: 460b mov r3, r1
8006e22: 70fb strb r3, [r7, #3]
if (address == 0U)
8006e24: 78fb ldrb r3, [r7, #3]
8006e26: 2b00 cmp r3, #0
8006e28: d103 bne.n 8006e32 <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
8006e2a: 687b ldr r3, [r7, #4]
8006e2c: 2280 movs r2, #128 @ 0x80
8006e2e: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
8006e32: 2300 movs r3, #0
}
8006e34: 4618 mov r0, r3
8006e36: 370c adds r7, #12
8006e38: 46bd mov sp, r7
8006e3a: bc80 pop {r7}
8006e3c: 4770 bx lr
08006e3e <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
8006e3e: b480 push {r7}
8006e40: b083 sub sp, #12
8006e42: af00 add r7, sp, #0
8006e44: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8006e46: 2300 movs r3, #0
}
8006e48: 4618 mov r0, r3
8006e4a: 370c adds r7, #12
8006e4c: 46bd mov sp, r7
8006e4e: bc80 pop {r7}
8006e50: 4770 bx lr
08006e52 <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
8006e52: b480 push {r7}
8006e54: b083 sub sp, #12
8006e56: af00 add r7, sp, #0
8006e58: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8006e5a: 2300 movs r3, #0
}
8006e5c: 4618 mov r0, r3
8006e5e: 370c adds r7, #12
8006e60: 46bd mov sp, r7
8006e62: bc80 pop {r7}
8006e64: 4770 bx lr
08006e66 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
8006e66: b480 push {r7}
8006e68: b085 sub sp, #20
8006e6a: af00 add r7, sp, #0
8006e6c: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
8006e6e: 687b ldr r3, [r7, #4]
8006e70: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006e74: b29b uxth r3, r3
8006e76: 60fb str r3, [r7, #12]
return tmpreg;
8006e78: 68fb ldr r3, [r7, #12]
}
8006e7a: 4618 mov r0, r3
8006e7c: 3714 adds r7, #20
8006e7e: 46bd mov sp, r7
8006e80: bc80 pop {r7}
8006e82: 4770 bx lr
08006e84 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
8006e84: b480 push {r7}
8006e86: b083 sub sp, #12
8006e88: af00 add r7, sp, #0
8006e8a: 6078 str r0, [r7, #4]
8006e8c: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8006e8e: 2300 movs r3, #0
}
8006e90: 4618 mov r0, r3
8006e92: 370c adds r7, #12
8006e94: 46bd mov sp, r7
8006e96: bc80 pop {r7}
8006e98: 4770 bx lr
08006e9a <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
8006e9a: b480 push {r7}
8006e9c: b08b sub sp, #44 @ 0x2c
8006e9e: af00 add r7, sp, #0
8006ea0: 60f8 str r0, [r7, #12]
8006ea2: 60b9 str r1, [r7, #8]
8006ea4: 4611 mov r1, r2
8006ea6: 461a mov r2, r3
8006ea8: 460b mov r3, r1
8006eaa: 80fb strh r3, [r7, #6]
8006eac: 4613 mov r3, r2
8006eae: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
8006eb0: 88bb ldrh r3, [r7, #4]
8006eb2: 3301 adds r3, #1
8006eb4: 085b lsrs r3, r3, #1
8006eb6: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
8006eb8: 68fb ldr r3, [r7, #12]
8006eba: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8006ebc: 68bb ldr r3, [r7, #8]
8006ebe: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8006ec0: 88fb ldrh r3, [r7, #6]
8006ec2: 005a lsls r2, r3, #1
8006ec4: 697b ldr r3, [r7, #20]
8006ec6: 4413 add r3, r2
8006ec8: f503 6380 add.w r3, r3, #1024 @ 0x400
8006ecc: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8006ece: 69bb ldr r3, [r7, #24]
8006ed0: 627b str r3, [r7, #36] @ 0x24
8006ed2: e01f b.n 8006f14 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
8006ed4: 69fb ldr r3, [r7, #28]
8006ed6: 781b ldrb r3, [r3, #0]
8006ed8: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
8006eda: 69fb ldr r3, [r7, #28]
8006edc: 3301 adds r3, #1
8006ede: 781b ldrb r3, [r3, #0]
8006ee0: b21b sxth r3, r3
8006ee2: 021b lsls r3, r3, #8
8006ee4: b21a sxth r2, r3
8006ee6: f9b7 3012 ldrsh.w r3, [r7, #18]
8006eea: 4313 orrs r3, r2
8006eec: b21b sxth r3, r3
8006eee: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
8006ef0: 6a3b ldr r3, [r7, #32]
8006ef2: 8a7a ldrh r2, [r7, #18]
8006ef4: 801a strh r2, [r3, #0]
pdwVal++;
8006ef6: 6a3b ldr r3, [r7, #32]
8006ef8: 3302 adds r3, #2
8006efa: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
8006efc: 6a3b ldr r3, [r7, #32]
8006efe: 3302 adds r3, #2
8006f00: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
8006f02: 69fb ldr r3, [r7, #28]
8006f04: 3301 adds r3, #1
8006f06: 61fb str r3, [r7, #28]
pBuf++;
8006f08: 69fb ldr r3, [r7, #28]
8006f0a: 3301 adds r3, #1
8006f0c: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
8006f0e: 6a7b ldr r3, [r7, #36] @ 0x24
8006f10: 3b01 subs r3, #1
8006f12: 627b str r3, [r7, #36] @ 0x24
8006f14: 6a7b ldr r3, [r7, #36] @ 0x24
8006f16: 2b00 cmp r3, #0
8006f18: d1dc bne.n 8006ed4 <USB_WritePMA+0x3a>
}
}
8006f1a: bf00 nop
8006f1c: bf00 nop
8006f1e: 372c adds r7, #44 @ 0x2c
8006f20: 46bd mov sp, r7
8006f22: bc80 pop {r7}
8006f24: 4770 bx lr
08006f26 <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
8006f26: b480 push {r7}
8006f28: b08b sub sp, #44 @ 0x2c
8006f2a: af00 add r7, sp, #0
8006f2c: 60f8 str r0, [r7, #12]
8006f2e: 60b9 str r1, [r7, #8]
8006f30: 4611 mov r1, r2
8006f32: 461a mov r2, r3
8006f34: 460b mov r3, r1
8006f36: 80fb strh r3, [r7, #6]
8006f38: 4613 mov r3, r2
8006f3a: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
8006f3c: 88bb ldrh r3, [r7, #4]
8006f3e: 085b lsrs r3, r3, #1
8006f40: b29b uxth r3, r3
8006f42: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
8006f44: 68fb ldr r3, [r7, #12]
8006f46: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8006f48: 68bb ldr r3, [r7, #8]
8006f4a: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8006f4c: 88fb ldrh r3, [r7, #6]
8006f4e: 005a lsls r2, r3, #1
8006f50: 697b ldr r3, [r7, #20]
8006f52: 4413 add r3, r2
8006f54: f503 6380 add.w r3, r3, #1024 @ 0x400
8006f58: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8006f5a: 69bb ldr r3, [r7, #24]
8006f5c: 627b str r3, [r7, #36] @ 0x24
8006f5e: e01b b.n 8006f98 <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
8006f60: 6a3b ldr r3, [r7, #32]
8006f62: 881b ldrh r3, [r3, #0]
8006f64: b29b uxth r3, r3
8006f66: 613b str r3, [r7, #16]
pdwVal++;
8006f68: 6a3b ldr r3, [r7, #32]
8006f6a: 3302 adds r3, #2
8006f6c: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
8006f6e: 693b ldr r3, [r7, #16]
8006f70: b2da uxtb r2, r3
8006f72: 69fb ldr r3, [r7, #28]
8006f74: 701a strb r2, [r3, #0]
pBuf++;
8006f76: 69fb ldr r3, [r7, #28]
8006f78: 3301 adds r3, #1
8006f7a: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
8006f7c: 693b ldr r3, [r7, #16]
8006f7e: 0a1b lsrs r3, r3, #8
8006f80: b2da uxtb r2, r3
8006f82: 69fb ldr r3, [r7, #28]
8006f84: 701a strb r2, [r3, #0]
pBuf++;
8006f86: 69fb ldr r3, [r7, #28]
8006f88: 3301 adds r3, #1
8006f8a: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
8006f8c: 6a3b ldr r3, [r7, #32]
8006f8e: 3302 adds r3, #2
8006f90: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8006f92: 6a7b ldr r3, [r7, #36] @ 0x24
8006f94: 3b01 subs r3, #1
8006f96: 627b str r3, [r7, #36] @ 0x24
8006f98: 6a7b ldr r3, [r7, #36] @ 0x24
8006f9a: 2b00 cmp r3, #0
8006f9c: d1e0 bne.n 8006f60 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
8006f9e: 88bb ldrh r3, [r7, #4]
8006fa0: f003 0301 and.w r3, r3, #1
8006fa4: b29b uxth r3, r3
8006fa6: 2b00 cmp r3, #0
8006fa8: d007 beq.n 8006fba <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
8006faa: 6a3b ldr r3, [r7, #32]
8006fac: 881b ldrh r3, [r3, #0]
8006fae: b29b uxth r3, r3
8006fb0: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
8006fb2: 693b ldr r3, [r7, #16]
8006fb4: b2da uxtb r2, r3
8006fb6: 69fb ldr r3, [r7, #28]
8006fb8: 701a strb r2, [r3, #0]
}
}
8006fba: bf00 nop
8006fbc: 372c adds r7, #44 @ 0x2c
8006fbe: 46bd mov sp, r7
8006fc0: bc80 pop {r7}
8006fc2: 4770 bx lr
08006fc4 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006fc4: b580 push {r7, lr}
8006fc6: b084 sub sp, #16
8006fc8: af00 add r7, sp, #0
8006fca: 6078 str r0, [r7, #4]
8006fcc: 460b mov r3, r1
8006fce: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
8006fd0: 2300 movs r3, #0
8006fd2: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
8006fd4: 687b ldr r3, [r7, #4]
8006fd6: 7c1b ldrb r3, [r3, #16]
8006fd8: 2b00 cmp r3, #0
8006fda: d115 bne.n 8007008 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
8006fdc: f44f 7300 mov.w r3, #512 @ 0x200
8006fe0: 2202 movs r2, #2
8006fe2: 2181 movs r1, #129 @ 0x81
8006fe4: 6878 ldr r0, [r7, #4]
8006fe6: f001 ff00 bl 8008dea <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
8006fea: 687b ldr r3, [r7, #4]
8006fec: 2201 movs r2, #1
8006fee: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
8006ff0: f44f 7300 mov.w r3, #512 @ 0x200
8006ff4: 2202 movs r2, #2
8006ff6: 2101 movs r1, #1
8006ff8: 6878 ldr r0, [r7, #4]
8006ffa: f001 fef6 bl 8008dea <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
8006ffe: 687b ldr r3, [r7, #4]
8007000: 2201 movs r2, #1
8007002: f8c3 216c str.w r2, [r3, #364] @ 0x16c
8007006: e012 b.n 800702e <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
8007008: 2340 movs r3, #64 @ 0x40
800700a: 2202 movs r2, #2
800700c: 2181 movs r1, #129 @ 0x81
800700e: 6878 ldr r0, [r7, #4]
8007010: f001 feeb bl 8008dea <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
8007014: 687b ldr r3, [r7, #4]
8007016: 2201 movs r2, #1
8007018: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800701a: 2340 movs r3, #64 @ 0x40
800701c: 2202 movs r2, #2
800701e: 2101 movs r1, #1
8007020: 6878 ldr r0, [r7, #4]
8007022: f001 fee2 bl 8008dea <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
8007026: 687b ldr r3, [r7, #4]
8007028: 2201 movs r2, #1
800702a: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800702e: 2308 movs r3, #8
8007030: 2203 movs r2, #3
8007032: 2182 movs r1, #130 @ 0x82
8007034: 6878 ldr r0, [r7, #4]
8007036: f001 fed8 bl 8008dea <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800703a: 687b ldr r3, [r7, #4]
800703c: 2201 movs r2, #1
800703e: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
8007040: f44f 7007 mov.w r0, #540 @ 0x21c
8007044: f001 fff8 bl 8009038 <USBD_static_malloc>
8007048: 4602 mov r2, r0
800704a: 687b ldr r3, [r7, #4]
800704c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
8007050: 687b ldr r3, [r7, #4]
8007052: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007056: 2b00 cmp r3, #0
8007058: d102 bne.n 8007060 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800705a: 2301 movs r3, #1
800705c: 73fb strb r3, [r7, #15]
800705e: e026 b.n 80070ae <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8007060: 687b ldr r3, [r7, #4]
8007062: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007066: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
8007068: 687b ldr r3, [r7, #4]
800706a: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800706e: 681b ldr r3, [r3, #0]
8007070: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
8007072: 68bb ldr r3, [r7, #8]
8007074: 2200 movs r2, #0
8007076: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800707a: 68bb ldr r3, [r7, #8]
800707c: 2200 movs r2, #0
800707e: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007082: 687b ldr r3, [r7, #4]
8007084: 7c1b ldrb r3, [r3, #16]
8007086: 2b00 cmp r3, #0
8007088: d109 bne.n 800709e <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800708a: 68bb ldr r3, [r7, #8]
800708c: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8007090: f44f 7300 mov.w r3, #512 @ 0x200
8007094: 2101 movs r1, #1
8007096: 6878 ldr r0, [r7, #4]
8007098: f001 ff97 bl 8008fca <USBD_LL_PrepareReceive>
800709c: e007 b.n 80070ae <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800709e: 68bb ldr r3, [r7, #8]
80070a0: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
80070a4: 2340 movs r3, #64 @ 0x40
80070a6: 2101 movs r1, #1
80070a8: 6878 ldr r0, [r7, #4]
80070aa: f001 ff8e bl 8008fca <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
80070ae: 7bfb ldrb r3, [r7, #15]
}
80070b0: 4618 mov r0, r3
80070b2: 3710 adds r7, #16
80070b4: 46bd mov sp, r7
80070b6: bd80 pop {r7, pc}
080070b8 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80070b8: b580 push {r7, lr}
80070ba: b084 sub sp, #16
80070bc: af00 add r7, sp, #0
80070be: 6078 str r0, [r7, #4]
80070c0: 460b mov r3, r1
80070c2: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
80070c4: 2300 movs r3, #0
80070c6: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
80070c8: 2181 movs r1, #129 @ 0x81
80070ca: 6878 ldr r0, [r7, #4]
80070cc: f001 feb3 bl 8008e36 <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
80070d0: 687b ldr r3, [r7, #4]
80070d2: 2200 movs r2, #0
80070d4: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
80070d6: 2101 movs r1, #1
80070d8: 6878 ldr r0, [r7, #4]
80070da: f001 feac bl 8008e36 <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
80070de: 687b ldr r3, [r7, #4]
80070e0: 2200 movs r2, #0
80070e2: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
80070e6: 2182 movs r1, #130 @ 0x82
80070e8: 6878 ldr r0, [r7, #4]
80070ea: f001 fea4 bl 8008e36 <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
80070ee: 687b ldr r3, [r7, #4]
80070f0: 2200 movs r2, #0
80070f2: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
80070f4: 687b ldr r3, [r7, #4]
80070f6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80070fa: 2b00 cmp r3, #0
80070fc: d00e beq.n 800711c <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
80070fe: 687b ldr r3, [r7, #4]
8007100: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8007104: 685b ldr r3, [r3, #4]
8007106: 4798 blx r3
USBD_free(pdev->pClassData);
8007108: 687b ldr r3, [r7, #4]
800710a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800710e: 4618 mov r0, r3
8007110: f001 ff9e bl 8009050 <USBD_static_free>
pdev->pClassData = NULL;
8007114: 687b ldr r3, [r7, #4]
8007116: 2200 movs r2, #0
8007118: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800711c: 7bfb ldrb r3, [r7, #15]
}
800711e: 4618 mov r0, r3
8007120: 3710 adds r7, #16
8007122: 46bd mov sp, r7
8007124: bd80 pop {r7, pc}
08007126 <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007126: b580 push {r7, lr}
8007128: b086 sub sp, #24
800712a: af00 add r7, sp, #0
800712c: 6078 str r0, [r7, #4]
800712e: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8007130: 687b ldr r3, [r7, #4]
8007132: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007136: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
8007138: 2300 movs r3, #0
800713a: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800713c: 2300 movs r3, #0
800713e: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
8007140: 2300 movs r3, #0
8007142: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007144: 683b ldr r3, [r7, #0]
8007146: 781b ldrb r3, [r3, #0]
8007148: f003 0360 and.w r3, r3, #96 @ 0x60
800714c: 2b00 cmp r3, #0
800714e: d039 beq.n 80071c4 <USBD_CDC_Setup+0x9e>
8007150: 2b20 cmp r3, #32
8007152: d17f bne.n 8007254 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
8007154: 683b ldr r3, [r7, #0]
8007156: 88db ldrh r3, [r3, #6]
8007158: 2b00 cmp r3, #0
800715a: d029 beq.n 80071b0 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800715c: 683b ldr r3, [r7, #0]
800715e: 781b ldrb r3, [r3, #0]
8007160: b25b sxtb r3, r3
8007162: 2b00 cmp r3, #0
8007164: da11 bge.n 800718a <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8007166: 687b ldr r3, [r7, #4]
8007168: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800716c: 689b ldr r3, [r3, #8]
800716e: 683a ldr r2, [r7, #0]
8007170: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
8007172: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8007174: 683a ldr r2, [r7, #0]
8007176: 88d2 ldrh r2, [r2, #6]
8007178: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800717a: 6939 ldr r1, [r7, #16]
800717c: 683b ldr r3, [r7, #0]
800717e: 88db ldrh r3, [r3, #6]
8007180: 461a mov r2, r3
8007182: 6878 ldr r0, [r7, #4]
8007184: f001 fa06 bl 8008594 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
8007188: e06b b.n 8007262 <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800718a: 683b ldr r3, [r7, #0]
800718c: 785a ldrb r2, [r3, #1]
800718e: 693b ldr r3, [r7, #16]
8007190: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
8007194: 683b ldr r3, [r7, #0]
8007196: 88db ldrh r3, [r3, #6]
8007198: b2da uxtb r2, r3
800719a: 693b ldr r3, [r7, #16]
800719c: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
80071a0: 6939 ldr r1, [r7, #16]
80071a2: 683b ldr r3, [r7, #0]
80071a4: 88db ldrh r3, [r3, #6]
80071a6: 461a mov r2, r3
80071a8: 6878 ldr r0, [r7, #4]
80071aa: f001 fa21 bl 80085f0 <USBD_CtlPrepareRx>
break;
80071ae: e058 b.n 8007262 <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
80071b0: 687b ldr r3, [r7, #4]
80071b2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
80071b6: 689b ldr r3, [r3, #8]
80071b8: 683a ldr r2, [r7, #0]
80071ba: 7850 ldrb r0, [r2, #1]
80071bc: 2200 movs r2, #0
80071be: 6839 ldr r1, [r7, #0]
80071c0: 4798 blx r3
break;
80071c2: e04e b.n 8007262 <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80071c4: 683b ldr r3, [r7, #0]
80071c6: 785b ldrb r3, [r3, #1]
80071c8: 2b0b cmp r3, #11
80071ca: d02e beq.n 800722a <USBD_CDC_Setup+0x104>
80071cc: 2b0b cmp r3, #11
80071ce: dc38 bgt.n 8007242 <USBD_CDC_Setup+0x11c>
80071d0: 2b00 cmp r3, #0
80071d2: d002 beq.n 80071da <USBD_CDC_Setup+0xb4>
80071d4: 2b0a cmp r3, #10
80071d6: d014 beq.n 8007202 <USBD_CDC_Setup+0xdc>
80071d8: e033 b.n 8007242 <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80071da: 687b ldr r3, [r7, #4]
80071dc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80071e0: 2b03 cmp r3, #3
80071e2: d107 bne.n 80071f4 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
80071e4: f107 030c add.w r3, r7, #12
80071e8: 2202 movs r2, #2
80071ea: 4619 mov r1, r3
80071ec: 6878 ldr r0, [r7, #4]
80071ee: f001 f9d1 bl 8008594 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
80071f2: e02e b.n 8007252 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
80071f4: 6839 ldr r1, [r7, #0]
80071f6: 6878 ldr r0, [r7, #4]
80071f8: f001 f962 bl 80084c0 <USBD_CtlError>
ret = USBD_FAIL;
80071fc: 2302 movs r3, #2
80071fe: 75fb strb r3, [r7, #23]
break;
8007200: e027 b.n 8007252 <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007202: 687b ldr r3, [r7, #4]
8007204: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007208: 2b03 cmp r3, #3
800720a: d107 bne.n 800721c <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800720c: f107 030f add.w r3, r7, #15
8007210: 2201 movs r2, #1
8007212: 4619 mov r1, r3
8007214: 6878 ldr r0, [r7, #4]
8007216: f001 f9bd bl 8008594 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800721a: e01a b.n 8007252 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800721c: 6839 ldr r1, [r7, #0]
800721e: 6878 ldr r0, [r7, #4]
8007220: f001 f94e bl 80084c0 <USBD_CtlError>
ret = USBD_FAIL;
8007224: 2302 movs r3, #2
8007226: 75fb strb r3, [r7, #23]
break;
8007228: e013 b.n 8007252 <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800722a: 687b ldr r3, [r7, #4]
800722c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007230: 2b03 cmp r3, #3
8007232: d00d beq.n 8007250 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
8007234: 6839 ldr r1, [r7, #0]
8007236: 6878 ldr r0, [r7, #4]
8007238: f001 f942 bl 80084c0 <USBD_CtlError>
ret = USBD_FAIL;
800723c: 2302 movs r3, #2
800723e: 75fb strb r3, [r7, #23]
}
break;
8007240: e006 b.n 8007250 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
8007242: 6839 ldr r1, [r7, #0]
8007244: 6878 ldr r0, [r7, #4]
8007246: f001 f93b bl 80084c0 <USBD_CtlError>
ret = USBD_FAIL;
800724a: 2302 movs r3, #2
800724c: 75fb strb r3, [r7, #23]
break;
800724e: e000 b.n 8007252 <USBD_CDC_Setup+0x12c>
break;
8007250: bf00 nop
}
break;
8007252: e006 b.n 8007262 <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
8007254: 6839 ldr r1, [r7, #0]
8007256: 6878 ldr r0, [r7, #4]
8007258: f001 f932 bl 80084c0 <USBD_CtlError>
ret = USBD_FAIL;
800725c: 2302 movs r3, #2
800725e: 75fb strb r3, [r7, #23]
break;
8007260: bf00 nop
}
return ret;
8007262: 7dfb ldrb r3, [r7, #23]
}
8007264: 4618 mov r0, r3
8007266: 3718 adds r7, #24
8007268: 46bd mov sp, r7
800726a: bd80 pop {r7, pc}
0800726c <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800726c: b580 push {r7, lr}
800726e: b084 sub sp, #16
8007270: af00 add r7, sp, #0
8007272: 6078 str r0, [r7, #4]
8007274: 460b mov r3, r1
8007276: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
8007278: 687b ldr r3, [r7, #4]
800727a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800727e: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
8007280: 687b ldr r3, [r7, #4]
8007282: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8007286: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
8007288: 687b ldr r3, [r7, #4]
800728a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800728e: 2b00 cmp r3, #0
8007290: d03a beq.n 8007308 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
8007292: 78fa ldrb r2, [r7, #3]
8007294: 6879 ldr r1, [r7, #4]
8007296: 4613 mov r3, r2
8007298: 009b lsls r3, r3, #2
800729a: 4413 add r3, r2
800729c: 009b lsls r3, r3, #2
800729e: 440b add r3, r1
80072a0: 331c adds r3, #28
80072a2: 681b ldr r3, [r3, #0]
80072a4: 2b00 cmp r3, #0
80072a6: d029 beq.n 80072fc <USBD_CDC_DataIn+0x90>
80072a8: 78fa ldrb r2, [r7, #3]
80072aa: 6879 ldr r1, [r7, #4]
80072ac: 4613 mov r3, r2
80072ae: 009b lsls r3, r3, #2
80072b0: 4413 add r3, r2
80072b2: 009b lsls r3, r3, #2
80072b4: 440b add r3, r1
80072b6: 331c adds r3, #28
80072b8: 681a ldr r2, [r3, #0]
80072ba: 78f9 ldrb r1, [r7, #3]
80072bc: 68b8 ldr r0, [r7, #8]
80072be: 460b mov r3, r1
80072c0: 009b lsls r3, r3, #2
80072c2: 440b add r3, r1
80072c4: 00db lsls r3, r3, #3
80072c6: 4403 add r3, r0
80072c8: 3320 adds r3, #32
80072ca: 681b ldr r3, [r3, #0]
80072cc: fbb2 f1f3 udiv r1, r2, r3
80072d0: fb01 f303 mul.w r3, r1, r3
80072d4: 1ad3 subs r3, r2, r3
80072d6: 2b00 cmp r3, #0
80072d8: d110 bne.n 80072fc <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
80072da: 78fa ldrb r2, [r7, #3]
80072dc: 6879 ldr r1, [r7, #4]
80072de: 4613 mov r3, r2
80072e0: 009b lsls r3, r3, #2
80072e2: 4413 add r3, r2
80072e4: 009b lsls r3, r3, #2
80072e6: 440b add r3, r1
80072e8: 331c adds r3, #28
80072ea: 2200 movs r2, #0
80072ec: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
80072ee: 78f9 ldrb r1, [r7, #3]
80072f0: 2300 movs r3, #0
80072f2: 2200 movs r2, #0
80072f4: 6878 ldr r0, [r7, #4]
80072f6: f001 fe45 bl 8008f84 <USBD_LL_Transmit>
80072fa: e003 b.n 8007304 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
80072fc: 68fb ldr r3, [r7, #12]
80072fe: 2200 movs r2, #0
8007300: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
8007304: 2300 movs r3, #0
8007306: e000 b.n 800730a <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
8007308: 2302 movs r3, #2
}
}
800730a: 4618 mov r0, r3
800730c: 3710 adds r7, #16
800730e: 46bd mov sp, r7
8007310: bd80 pop {r7, pc}
08007312 <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8007312: b580 push {r7, lr}
8007314: b084 sub sp, #16
8007316: af00 add r7, sp, #0
8007318: 6078 str r0, [r7, #4]
800731a: 460b mov r3, r1
800731c: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800731e: 687b ldr r3, [r7, #4]
8007320: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007324: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
8007326: 78fb ldrb r3, [r7, #3]
8007328: 4619 mov r1, r3
800732a: 6878 ldr r0, [r7, #4]
800732c: f001 fe70 bl 8009010 <USBD_LL_GetRxDataSize>
8007330: 4602 mov r2, r0
8007332: 68fb ldr r3, [r7, #12]
8007334: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
8007338: 687b ldr r3, [r7, #4]
800733a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800733e: 2b00 cmp r3, #0
8007340: d00d beq.n 800735e <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
8007342: 687b ldr r3, [r7, #4]
8007344: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8007348: 68db ldr r3, [r3, #12]
800734a: 68fa ldr r2, [r7, #12]
800734c: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
8007350: 68fa ldr r2, [r7, #12]
8007352: f502 7203 add.w r2, r2, #524 @ 0x20c
8007356: 4611 mov r1, r2
8007358: 4798 blx r3
return USBD_OK;
800735a: 2300 movs r3, #0
800735c: e000 b.n 8007360 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800735e: 2302 movs r3, #2
}
}
8007360: 4618 mov r0, r3
8007362: 3710 adds r7, #16
8007364: 46bd mov sp, r7
8007366: bd80 pop {r7, pc}
08007368 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
8007368: b580 push {r7, lr}
800736a: b084 sub sp, #16
800736c: af00 add r7, sp, #0
800736e: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8007370: 687b ldr r3, [r7, #4]
8007372: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007376: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
8007378: 687b ldr r3, [r7, #4]
800737a: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800737e: 2b00 cmp r3, #0
8007380: d014 beq.n 80073ac <USBD_CDC_EP0_RxReady+0x44>
8007382: 68fb ldr r3, [r7, #12]
8007384: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
8007388: 2bff cmp r3, #255 @ 0xff
800738a: d00f beq.n 80073ac <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800738c: 687b ldr r3, [r7, #4]
800738e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8007392: 689b ldr r3, [r3, #8]
8007394: 68fa ldr r2, [r7, #12]
8007396: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800739a: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800739c: 68fa ldr r2, [r7, #12]
800739e: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
80073a2: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
80073a4: 68fb ldr r3, [r7, #12]
80073a6: 22ff movs r2, #255 @ 0xff
80073a8: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
80073ac: 2300 movs r3, #0
}
80073ae: 4618 mov r0, r3
80073b0: 3710 adds r7, #16
80073b2: 46bd mov sp, r7
80073b4: bd80 pop {r7, pc}
...
080073b8 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
80073b8: b480 push {r7}
80073ba: b083 sub sp, #12
80073bc: af00 add r7, sp, #0
80073be: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
80073c0: 687b ldr r3, [r7, #4]
80073c2: 2243 movs r2, #67 @ 0x43
80073c4: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
80073c6: 4b03 ldr r3, [pc, #12] @ (80073d4 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
80073c8: 4618 mov r0, r3
80073ca: 370c adds r7, #12
80073cc: 46bd mov sp, r7
80073ce: bc80 pop {r7}
80073d0: 4770 bx lr
80073d2: bf00 nop
80073d4: 20000094 .word 0x20000094
080073d8 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
80073d8: b480 push {r7}
80073da: b083 sub sp, #12
80073dc: af00 add r7, sp, #0
80073de: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
80073e0: 687b ldr r3, [r7, #4]
80073e2: 2243 movs r2, #67 @ 0x43
80073e4: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
80073e6: 4b03 ldr r3, [pc, #12] @ (80073f4 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
80073e8: 4618 mov r0, r3
80073ea: 370c adds r7, #12
80073ec: 46bd mov sp, r7
80073ee: bc80 pop {r7}
80073f0: 4770 bx lr
80073f2: bf00 nop
80073f4: 20000050 .word 0x20000050
080073f8 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
80073f8: b480 push {r7}
80073fa: b083 sub sp, #12
80073fc: af00 add r7, sp, #0
80073fe: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
8007400: 687b ldr r3, [r7, #4]
8007402: 2243 movs r2, #67 @ 0x43
8007404: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
8007406: 4b03 ldr r3, [pc, #12] @ (8007414 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
8007408: 4618 mov r0, r3
800740a: 370c adds r7, #12
800740c: 46bd mov sp, r7
800740e: bc80 pop {r7}
8007410: 4770 bx lr
8007412: bf00 nop
8007414: 200000d8 .word 0x200000d8
08007418 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
8007418: b480 push {r7}
800741a: b083 sub sp, #12
800741c: af00 add r7, sp, #0
800741e: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
8007420: 687b ldr r3, [r7, #4]
8007422: 220a movs r2, #10
8007424: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
8007426: 4b03 ldr r3, [pc, #12] @ (8007434 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
8007428: 4618 mov r0, r3
800742a: 370c adds r7, #12
800742c: 46bd mov sp, r7
800742e: bc80 pop {r7}
8007430: 4770 bx lr
8007432: bf00 nop
8007434: 2000000c .word 0x2000000c
08007438 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
8007438: b480 push {r7}
800743a: b085 sub sp, #20
800743c: af00 add r7, sp, #0
800743e: 6078 str r0, [r7, #4]
8007440: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
8007442: 2302 movs r3, #2
8007444: 73fb strb r3, [r7, #15]
if (fops != NULL)
8007446: 683b ldr r3, [r7, #0]
8007448: 2b00 cmp r3, #0
800744a: d005 beq.n 8007458 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800744c: 687b ldr r3, [r7, #4]
800744e: 683a ldr r2, [r7, #0]
8007450: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
8007454: 2300 movs r3, #0
8007456: 73fb strb r3, [r7, #15]
}
return ret;
8007458: 7bfb ldrb r3, [r7, #15]
}
800745a: 4618 mov r0, r3
800745c: 3714 adds r7, #20
800745e: 46bd mov sp, r7
8007460: bc80 pop {r7}
8007462: 4770 bx lr
08007464 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
8007464: b480 push {r7}
8007466: b087 sub sp, #28
8007468: af00 add r7, sp, #0
800746a: 60f8 str r0, [r7, #12]
800746c: 60b9 str r1, [r7, #8]
800746e: 4613 mov r3, r2
8007470: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8007472: 68fb ldr r3, [r7, #12]
8007474: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007478: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800747a: 697b ldr r3, [r7, #20]
800747c: 68ba ldr r2, [r7, #8]
800747e: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
8007482: 88fa ldrh r2, [r7, #6]
8007484: 697b ldr r3, [r7, #20]
8007486: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800748a: 2300 movs r3, #0
}
800748c: 4618 mov r0, r3
800748e: 371c adds r7, #28
8007490: 46bd mov sp, r7
8007492: bc80 pop {r7}
8007494: 4770 bx lr
08007496 <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
8007496: b480 push {r7}
8007498: b085 sub sp, #20
800749a: af00 add r7, sp, #0
800749c: 6078 str r0, [r7, #4]
800749e: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80074a0: 687b ldr r3, [r7, #4]
80074a2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80074a6: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
80074a8: 68fb ldr r3, [r7, #12]
80074aa: 683a ldr r2, [r7, #0]
80074ac: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
80074b0: 2300 movs r3, #0
}
80074b2: 4618 mov r0, r3
80074b4: 3714 adds r7, #20
80074b6: 46bd mov sp, r7
80074b8: bc80 pop {r7}
80074ba: 4770 bx lr
080074bc <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
80074bc: b580 push {r7, lr}
80074be: b084 sub sp, #16
80074c0: af00 add r7, sp, #0
80074c2: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80074c4: 687b ldr r3, [r7, #4]
80074c6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80074ca: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
80074cc: 687b ldr r3, [r7, #4]
80074ce: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80074d2: 2b00 cmp r3, #0
80074d4: d01c beq.n 8007510 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
80074d6: 68fb ldr r3, [r7, #12]
80074d8: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
80074dc: 2b00 cmp r3, #0
80074de: d115 bne.n 800750c <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
80074e0: 68fb ldr r3, [r7, #12]
80074e2: 2201 movs r2, #1
80074e4: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
80074e8: 68fb ldr r3, [r7, #12]
80074ea: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
80074ee: 687b ldr r3, [r7, #4]
80074f0: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
80074f2: 68fb ldr r3, [r7, #12]
80074f4: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
80074f8: 68fb ldr r3, [r7, #12]
80074fa: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
80074fe: b29b uxth r3, r3
8007500: 2181 movs r1, #129 @ 0x81
8007502: 6878 ldr r0, [r7, #4]
8007504: f001 fd3e bl 8008f84 <USBD_LL_Transmit>
return USBD_OK;
8007508: 2300 movs r3, #0
800750a: e002 b.n 8007512 <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800750c: 2301 movs r3, #1
800750e: e000 b.n 8007512 <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
8007510: 2302 movs r3, #2
}
}
8007512: 4618 mov r0, r3
8007514: 3710 adds r7, #16
8007516: 46bd mov sp, r7
8007518: bd80 pop {r7, pc}
0800751a <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800751a: b580 push {r7, lr}
800751c: b084 sub sp, #16
800751e: af00 add r7, sp, #0
8007520: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8007522: 687b ldr r3, [r7, #4]
8007524: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007528: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800752a: 687b ldr r3, [r7, #4]
800752c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007530: 2b00 cmp r3, #0
8007532: d017 beq.n 8007564 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007534: 687b ldr r3, [r7, #4]
8007536: 7c1b ldrb r3, [r3, #16]
8007538: 2b00 cmp r3, #0
800753a: d109 bne.n 8007550 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800753c: 68fb ldr r3, [r7, #12]
800753e: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8007542: f44f 7300 mov.w r3, #512 @ 0x200
8007546: 2101 movs r1, #1
8007548: 6878 ldr r0, [r7, #4]
800754a: f001 fd3e bl 8008fca <USBD_LL_PrepareReceive>
800754e: e007 b.n 8007560 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8007550: 68fb ldr r3, [r7, #12]
8007552: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8007556: 2340 movs r3, #64 @ 0x40
8007558: 2101 movs r1, #1
800755a: 6878 ldr r0, [r7, #4]
800755c: f001 fd35 bl 8008fca <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
8007560: 2300 movs r3, #0
8007562: e000 b.n 8007566 <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
8007564: 2302 movs r3, #2
}
}
8007566: 4618 mov r0, r3
8007568: 3710 adds r7, #16
800756a: 46bd mov sp, r7
800756c: bd80 pop {r7, pc}
0800756e <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800756e: b580 push {r7, lr}
8007570: b084 sub sp, #16
8007572: af00 add r7, sp, #0
8007574: 60f8 str r0, [r7, #12]
8007576: 60b9 str r1, [r7, #8]
8007578: 4613 mov r3, r2
800757a: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800757c: 68fb ldr r3, [r7, #12]
800757e: 2b00 cmp r3, #0
8007580: d101 bne.n 8007586 <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
8007582: 2302 movs r3, #2
8007584: e01a b.n 80075bc <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
8007586: 68fb ldr r3, [r7, #12]
8007588: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800758c: 2b00 cmp r3, #0
800758e: d003 beq.n 8007598 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
8007590: 68fb ldr r3, [r7, #12]
8007592: 2200 movs r2, #0
8007594: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
8007598: 68bb ldr r3, [r7, #8]
800759a: 2b00 cmp r3, #0
800759c: d003 beq.n 80075a6 <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800759e: 68fb ldr r3, [r7, #12]
80075a0: 68ba ldr r2, [r7, #8]
80075a2: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
80075a6: 68fb ldr r3, [r7, #12]
80075a8: 2201 movs r2, #1
80075aa: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
80075ae: 68fb ldr r3, [r7, #12]
80075b0: 79fa ldrb r2, [r7, #7]
80075b2: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
80075b4: 68f8 ldr r0, [r7, #12]
80075b6: f001 fba3 bl 8008d00 <USBD_LL_Init>
return USBD_OK;
80075ba: 2300 movs r3, #0
}
80075bc: 4618 mov r0, r3
80075be: 3710 adds r7, #16
80075c0: 46bd mov sp, r7
80075c2: bd80 pop {r7, pc}
080075c4 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
80075c4: b480 push {r7}
80075c6: b085 sub sp, #20
80075c8: af00 add r7, sp, #0
80075ca: 6078 str r0, [r7, #4]
80075cc: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
80075ce: 2300 movs r3, #0
80075d0: 73fb strb r3, [r7, #15]
if (pclass != NULL)
80075d2: 683b ldr r3, [r7, #0]
80075d4: 2b00 cmp r3, #0
80075d6: d006 beq.n 80075e6 <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
80075d8: 687b ldr r3, [r7, #4]
80075da: 683a ldr r2, [r7, #0]
80075dc: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
80075e0: 2300 movs r3, #0
80075e2: 73fb strb r3, [r7, #15]
80075e4: e001 b.n 80075ea <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
80075e6: 2302 movs r3, #2
80075e8: 73fb strb r3, [r7, #15]
}
return status;
80075ea: 7bfb ldrb r3, [r7, #15]
}
80075ec: 4618 mov r0, r3
80075ee: 3714 adds r7, #20
80075f0: 46bd mov sp, r7
80075f2: bc80 pop {r7}
80075f4: 4770 bx lr
080075f6 <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
80075f6: b580 push {r7, lr}
80075f8: b082 sub sp, #8
80075fa: af00 add r7, sp, #0
80075fc: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
80075fe: 6878 ldr r0, [r7, #4]
8007600: f001 fbd8 bl 8008db4 <USBD_LL_Start>
return USBD_OK;
8007604: 2300 movs r3, #0
}
8007606: 4618 mov r0, r3
8007608: 3708 adds r7, #8
800760a: 46bd mov sp, r7
800760c: bd80 pop {r7, pc}
0800760e <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800760e: b480 push {r7}
8007610: b083 sub sp, #12
8007612: af00 add r7, sp, #0
8007614: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
8007616: 2300 movs r3, #0
}
8007618: 4618 mov r0, r3
800761a: 370c adds r7, #12
800761c: 46bd mov sp, r7
800761e: bc80 pop {r7}
8007620: 4770 bx lr
08007622 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8007622: b580 push {r7, lr}
8007624: b084 sub sp, #16
8007626: af00 add r7, sp, #0
8007628: 6078 str r0, [r7, #4]
800762a: 460b mov r3, r1
800762c: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800762e: 2302 movs r3, #2
8007630: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
8007632: 687b ldr r3, [r7, #4]
8007634: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007638: 2b00 cmp r3, #0
800763a: d00c beq.n 8007656 <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800763c: 687b ldr r3, [r7, #4]
800763e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007642: 681b ldr r3, [r3, #0]
8007644: 78fa ldrb r2, [r7, #3]
8007646: 4611 mov r1, r2
8007648: 6878 ldr r0, [r7, #4]
800764a: 4798 blx r3
800764c: 4603 mov r3, r0
800764e: 2b00 cmp r3, #0
8007650: d101 bne.n 8007656 <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
8007652: 2300 movs r3, #0
8007654: 73fb strb r3, [r7, #15]
}
}
return ret;
8007656: 7bfb ldrb r3, [r7, #15]
}
8007658: 4618 mov r0, r3
800765a: 3710 adds r7, #16
800765c: 46bd mov sp, r7
800765e: bd80 pop {r7, pc}
08007660 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8007660: b580 push {r7, lr}
8007662: b082 sub sp, #8
8007664: af00 add r7, sp, #0
8007666: 6078 str r0, [r7, #4]
8007668: 460b mov r3, r1
800766a: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800766c: 687b ldr r3, [r7, #4]
800766e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007672: 685b ldr r3, [r3, #4]
8007674: 78fa ldrb r2, [r7, #3]
8007676: 4611 mov r1, r2
8007678: 6878 ldr r0, [r7, #4]
800767a: 4798 blx r3
return USBD_OK;
800767c: 2300 movs r3, #0
}
800767e: 4618 mov r0, r3
8007680: 3708 adds r7, #8
8007682: 46bd mov sp, r7
8007684: bd80 pop {r7, pc}
08007686 <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
8007686: b580 push {r7, lr}
8007688: b082 sub sp, #8
800768a: af00 add r7, sp, #0
800768c: 6078 str r0, [r7, #4]
800768e: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
8007690: 687b ldr r3, [r7, #4]
8007692: f503 732a add.w r3, r3, #680 @ 0x2a8
8007696: 6839 ldr r1, [r7, #0]
8007698: 4618 mov r0, r3
800769a: f000 fed8 bl 800844e <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800769e: 687b ldr r3, [r7, #4]
80076a0: 2201 movs r2, #1
80076a2: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
80076a6: 687b ldr r3, [r7, #4]
80076a8: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
80076ac: 461a mov r2, r3
80076ae: 687b ldr r3, [r7, #4]
80076b0: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
80076b4: 687b ldr r3, [r7, #4]
80076b6: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
80076ba: f003 031f and.w r3, r3, #31
80076be: 2b02 cmp r3, #2
80076c0: d016 beq.n 80076f0 <USBD_LL_SetupStage+0x6a>
80076c2: 2b02 cmp r3, #2
80076c4: d81c bhi.n 8007700 <USBD_LL_SetupStage+0x7a>
80076c6: 2b00 cmp r3, #0
80076c8: d002 beq.n 80076d0 <USBD_LL_SetupStage+0x4a>
80076ca: 2b01 cmp r3, #1
80076cc: d008 beq.n 80076e0 <USBD_LL_SetupStage+0x5a>
80076ce: e017 b.n 8007700 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
80076d0: 687b ldr r3, [r7, #4]
80076d2: f503 732a add.w r3, r3, #680 @ 0x2a8
80076d6: 4619 mov r1, r3
80076d8: 6878 ldr r0, [r7, #4]
80076da: f000 f9cb bl 8007a74 <USBD_StdDevReq>
break;
80076de: e01a b.n 8007716 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
80076e0: 687b ldr r3, [r7, #4]
80076e2: f503 732a add.w r3, r3, #680 @ 0x2a8
80076e6: 4619 mov r1, r3
80076e8: 6878 ldr r0, [r7, #4]
80076ea: f000 fa2d bl 8007b48 <USBD_StdItfReq>
break;
80076ee: e012 b.n 8007716 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
80076f0: 687b ldr r3, [r7, #4]
80076f2: f503 732a add.w r3, r3, #680 @ 0x2a8
80076f6: 4619 mov r1, r3
80076f8: 6878 ldr r0, [r7, #4]
80076fa: f000 fa6d bl 8007bd8 <USBD_StdEPReq>
break;
80076fe: e00a b.n 8007716 <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
8007700: 687b ldr r3, [r7, #4]
8007702: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
8007706: f023 037f bic.w r3, r3, #127 @ 0x7f
800770a: b2db uxtb r3, r3
800770c: 4619 mov r1, r3
800770e: 6878 ldr r0, [r7, #4]
8007710: f001 fbb0 bl 8008e74 <USBD_LL_StallEP>
break;
8007714: bf00 nop
}
return USBD_OK;
8007716: 2300 movs r3, #0
}
8007718: 4618 mov r0, r3
800771a: 3708 adds r7, #8
800771c: 46bd mov sp, r7
800771e: bd80 pop {r7, pc}
08007720 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8007720: b580 push {r7, lr}
8007722: b086 sub sp, #24
8007724: af00 add r7, sp, #0
8007726: 60f8 str r0, [r7, #12]
8007728: 460b mov r3, r1
800772a: 607a str r2, [r7, #4]
800772c: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800772e: 7afb ldrb r3, [r7, #11]
8007730: 2b00 cmp r3, #0
8007732: d14b bne.n 80077cc <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
8007734: 68fb ldr r3, [r7, #12]
8007736: f503 73aa add.w r3, r3, #340 @ 0x154
800773a: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800773c: 68fb ldr r3, [r7, #12]
800773e: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8007742: 2b03 cmp r3, #3
8007744: d134 bne.n 80077b0 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
8007746: 697b ldr r3, [r7, #20]
8007748: 68da ldr r2, [r3, #12]
800774a: 697b ldr r3, [r7, #20]
800774c: 691b ldr r3, [r3, #16]
800774e: 429a cmp r2, r3
8007750: d919 bls.n 8007786 <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
8007752: 697b ldr r3, [r7, #20]
8007754: 68da ldr r2, [r3, #12]
8007756: 697b ldr r3, [r7, #20]
8007758: 691b ldr r3, [r3, #16]
800775a: 1ad2 subs r2, r2, r3
800775c: 697b ldr r3, [r7, #20]
800775e: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8007760: 697b ldr r3, [r7, #20]
8007762: 68da ldr r2, [r3, #12]
8007764: 697b ldr r3, [r7, #20]
8007766: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8007768: 429a cmp r2, r3
800776a: d203 bcs.n 8007774 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800776c: 697b ldr r3, [r7, #20]
800776e: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
8007770: b29b uxth r3, r3
8007772: e002 b.n 800777a <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8007774: 697b ldr r3, [r7, #20]
8007776: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8007778: b29b uxth r3, r3
800777a: 461a mov r2, r3
800777c: 6879 ldr r1, [r7, #4]
800777e: 68f8 ldr r0, [r7, #12]
8007780: f000 ff54 bl 800862c <USBD_CtlContinueRx>
8007784: e038 b.n 80077f8 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
8007786: 68fb ldr r3, [r7, #12]
8007788: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800778c: 691b ldr r3, [r3, #16]
800778e: 2b00 cmp r3, #0
8007790: d00a beq.n 80077a8 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8007792: 68fb ldr r3, [r7, #12]
8007794: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
8007798: 2b03 cmp r3, #3
800779a: d105 bne.n 80077a8 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800779c: 68fb ldr r3, [r7, #12]
800779e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80077a2: 691b ldr r3, [r3, #16]
80077a4: 68f8 ldr r0, [r7, #12]
80077a6: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
80077a8: 68f8 ldr r0, [r7, #12]
80077aa: f000 ff51 bl 8008650 <USBD_CtlSendStatus>
80077ae: e023 b.n 80077f8 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
80077b0: 68fb ldr r3, [r7, #12]
80077b2: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
80077b6: 2b05 cmp r3, #5
80077b8: d11e bne.n 80077f8 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
80077ba: 68fb ldr r3, [r7, #12]
80077bc: 2200 movs r2, #0
80077be: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
80077c2: 2100 movs r1, #0
80077c4: 68f8 ldr r0, [r7, #12]
80077c6: f001 fb55 bl 8008e74 <USBD_LL_StallEP>
80077ca: e015 b.n 80077f8 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
80077cc: 68fb ldr r3, [r7, #12]
80077ce: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80077d2: 699b ldr r3, [r3, #24]
80077d4: 2b00 cmp r3, #0
80077d6: d00d beq.n 80077f4 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
80077d8: 68fb ldr r3, [r7, #12]
80077da: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
80077de: 2b03 cmp r3, #3
80077e0: d108 bne.n 80077f4 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
80077e2: 68fb ldr r3, [r7, #12]
80077e4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80077e8: 699b ldr r3, [r3, #24]
80077ea: 7afa ldrb r2, [r7, #11]
80077ec: 4611 mov r1, r2
80077ee: 68f8 ldr r0, [r7, #12]
80077f0: 4798 blx r3
80077f2: e001 b.n 80077f8 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
80077f4: 2302 movs r3, #2
80077f6: e000 b.n 80077fa <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
80077f8: 2300 movs r3, #0
}
80077fa: 4618 mov r0, r3
80077fc: 3718 adds r7, #24
80077fe: 46bd mov sp, r7
8007800: bd80 pop {r7, pc}
08007802 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8007802: b580 push {r7, lr}
8007804: b086 sub sp, #24
8007806: af00 add r7, sp, #0
8007808: 60f8 str r0, [r7, #12]
800780a: 460b mov r3, r1
800780c: 607a str r2, [r7, #4]
800780e: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8007810: 7afb ldrb r3, [r7, #11]
8007812: 2b00 cmp r3, #0
8007814: d17f bne.n 8007916 <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
8007816: 68fb ldr r3, [r7, #12]
8007818: 3314 adds r3, #20
800781a: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800781c: 68fb ldr r3, [r7, #12]
800781e: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8007822: 2b02 cmp r3, #2
8007824: d15c bne.n 80078e0 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
8007826: 697b ldr r3, [r7, #20]
8007828: 68da ldr r2, [r3, #12]
800782a: 697b ldr r3, [r7, #20]
800782c: 691b ldr r3, [r3, #16]
800782e: 429a cmp r2, r3
8007830: d915 bls.n 800785e <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
8007832: 697b ldr r3, [r7, #20]
8007834: 68da ldr r2, [r3, #12]
8007836: 697b ldr r3, [r7, #20]
8007838: 691b ldr r3, [r3, #16]
800783a: 1ad2 subs r2, r2, r3
800783c: 697b ldr r3, [r7, #20]
800783e: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
8007840: 697b ldr r3, [r7, #20]
8007842: 68db ldr r3, [r3, #12]
8007844: b29b uxth r3, r3
8007846: 461a mov r2, r3
8007848: 6879 ldr r1, [r7, #4]
800784a: 68f8 ldr r0, [r7, #12]
800784c: f000 febe bl 80085cc <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8007850: 2300 movs r3, #0
8007852: 2200 movs r2, #0
8007854: 2100 movs r1, #0
8007856: 68f8 ldr r0, [r7, #12]
8007858: f001 fbb7 bl 8008fca <USBD_LL_PrepareReceive>
800785c: e04e b.n 80078fc <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800785e: 697b ldr r3, [r7, #20]
8007860: 689b ldr r3, [r3, #8]
8007862: 697a ldr r2, [r7, #20]
8007864: 6912 ldr r2, [r2, #16]
8007866: fbb3 f1f2 udiv r1, r3, r2
800786a: fb01 f202 mul.w r2, r1, r2
800786e: 1a9b subs r3, r3, r2
8007870: 2b00 cmp r3, #0
8007872: d11c bne.n 80078ae <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
8007874: 697b ldr r3, [r7, #20]
8007876: 689a ldr r2, [r3, #8]
8007878: 697b ldr r3, [r7, #20]
800787a: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800787c: 429a cmp r2, r3
800787e: d316 bcc.n 80078ae <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
8007880: 697b ldr r3, [r7, #20]
8007882: 689a ldr r2, [r3, #8]
8007884: 68fb ldr r3, [r7, #12]
8007886: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800788a: 429a cmp r2, r3
800788c: d20f bcs.n 80078ae <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800788e: 2200 movs r2, #0
8007890: 2100 movs r1, #0
8007892: 68f8 ldr r0, [r7, #12]
8007894: f000 fe9a bl 80085cc <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
8007898: 68fb ldr r3, [r7, #12]
800789a: 2200 movs r2, #0
800789c: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
80078a0: 2300 movs r3, #0
80078a2: 2200 movs r2, #0
80078a4: 2100 movs r1, #0
80078a6: 68f8 ldr r0, [r7, #12]
80078a8: f001 fb8f bl 8008fca <USBD_LL_PrepareReceive>
80078ac: e026 b.n 80078fc <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
80078ae: 68fb ldr r3, [r7, #12]
80078b0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80078b4: 68db ldr r3, [r3, #12]
80078b6: 2b00 cmp r3, #0
80078b8: d00a beq.n 80078d0 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
80078ba: 68fb ldr r3, [r7, #12]
80078bc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
80078c0: 2b03 cmp r3, #3
80078c2: d105 bne.n 80078d0 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
80078c4: 68fb ldr r3, [r7, #12]
80078c6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80078ca: 68db ldr r3, [r3, #12]
80078cc: 68f8 ldr r0, [r7, #12]
80078ce: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
80078d0: 2180 movs r1, #128 @ 0x80
80078d2: 68f8 ldr r0, [r7, #12]
80078d4: f001 face bl 8008e74 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
80078d8: 68f8 ldr r0, [r7, #12]
80078da: f000 fecc bl 8008676 <USBD_CtlReceiveStatus>
80078de: e00d b.n 80078fc <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
80078e0: 68fb ldr r3, [r7, #12]
80078e2: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
80078e6: 2b04 cmp r3, #4
80078e8: d004 beq.n 80078f4 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
80078ea: 68fb ldr r3, [r7, #12]
80078ec: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
80078f0: 2b00 cmp r3, #0
80078f2: d103 bne.n 80078fc <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
80078f4: 2180 movs r1, #128 @ 0x80
80078f6: 68f8 ldr r0, [r7, #12]
80078f8: f001 fabc bl 8008e74 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
80078fc: 68fb ldr r3, [r7, #12]
80078fe: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
8007902: 2b01 cmp r3, #1
8007904: d11d bne.n 8007942 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
8007906: 68f8 ldr r0, [r7, #12]
8007908: f7ff fe81 bl 800760e <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800790c: 68fb ldr r3, [r7, #12]
800790e: 2200 movs r2, #0
8007910: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
8007914: e015 b.n 8007942 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
8007916: 68fb ldr r3, [r7, #12]
8007918: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800791c: 695b ldr r3, [r3, #20]
800791e: 2b00 cmp r3, #0
8007920: d00d beq.n 800793e <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8007922: 68fb ldr r3, [r7, #12]
8007924: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
8007928: 2b03 cmp r3, #3
800792a: d108 bne.n 800793e <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800792c: 68fb ldr r3, [r7, #12]
800792e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007932: 695b ldr r3, [r3, #20]
8007934: 7afa ldrb r2, [r7, #11]
8007936: 4611 mov r1, r2
8007938: 68f8 ldr r0, [r7, #12]
800793a: 4798 blx r3
800793c: e001 b.n 8007942 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800793e: 2302 movs r3, #2
8007940: e000 b.n 8007944 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
8007942: 2300 movs r3, #0
}
8007944: 4618 mov r0, r3
8007946: 3718 adds r7, #24
8007948: 46bd mov sp, r7
800794a: bd80 pop {r7, pc}
0800794c <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800794c: b580 push {r7, lr}
800794e: b082 sub sp, #8
8007950: af00 add r7, sp, #0
8007952: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8007954: 2340 movs r3, #64 @ 0x40
8007956: 2200 movs r2, #0
8007958: 2100 movs r1, #0
800795a: 6878 ldr r0, [r7, #4]
800795c: f001 fa45 bl 8008dea <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
8007960: 687b ldr r3, [r7, #4]
8007962: 2201 movs r2, #1
8007964: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
8007968: 687b ldr r3, [r7, #4]
800796a: 2240 movs r2, #64 @ 0x40
800796c: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8007970: 2340 movs r3, #64 @ 0x40
8007972: 2200 movs r2, #0
8007974: 2180 movs r1, #128 @ 0x80
8007976: 6878 ldr r0, [r7, #4]
8007978: f001 fa37 bl 8008dea <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800797c: 687b ldr r3, [r7, #4]
800797e: 2201 movs r2, #1
8007980: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
8007982: 687b ldr r3, [r7, #4]
8007984: 2240 movs r2, #64 @ 0x40
8007986: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
8007988: 687b ldr r3, [r7, #4]
800798a: 2201 movs r2, #1
800798c: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
8007990: 687b ldr r3, [r7, #4]
8007992: 2200 movs r2, #0
8007994: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
8007998: 687b ldr r3, [r7, #4]
800799a: 2200 movs r2, #0
800799c: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800799e: 687b ldr r3, [r7, #4]
80079a0: 2200 movs r2, #0
80079a2: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
80079a6: 687b ldr r3, [r7, #4]
80079a8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80079ac: 2b00 cmp r3, #0
80079ae: d009 beq.n 80079c4 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
80079b0: 687b ldr r3, [r7, #4]
80079b2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80079b6: 685b ldr r3, [r3, #4]
80079b8: 687a ldr r2, [r7, #4]
80079ba: 6852 ldr r2, [r2, #4]
80079bc: b2d2 uxtb r2, r2
80079be: 4611 mov r1, r2
80079c0: 6878 ldr r0, [r7, #4]
80079c2: 4798 blx r3
}
return USBD_OK;
80079c4: 2300 movs r3, #0
}
80079c6: 4618 mov r0, r3
80079c8: 3708 adds r7, #8
80079ca: 46bd mov sp, r7
80079cc: bd80 pop {r7, pc}
080079ce <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
80079ce: b480 push {r7}
80079d0: b083 sub sp, #12
80079d2: af00 add r7, sp, #0
80079d4: 6078 str r0, [r7, #4]
80079d6: 460b mov r3, r1
80079d8: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
80079da: 687b ldr r3, [r7, #4]
80079dc: 78fa ldrb r2, [r7, #3]
80079de: 741a strb r2, [r3, #16]
return USBD_OK;
80079e0: 2300 movs r3, #0
}
80079e2: 4618 mov r0, r3
80079e4: 370c adds r7, #12
80079e6: 46bd mov sp, r7
80079e8: bc80 pop {r7}
80079ea: 4770 bx lr
080079ec <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
80079ec: b480 push {r7}
80079ee: b083 sub sp, #12
80079f0: af00 add r7, sp, #0
80079f2: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
80079f4: 687b ldr r3, [r7, #4]
80079f6: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
80079fa: 687b ldr r3, [r7, #4]
80079fc: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
8007a00: 687b ldr r3, [r7, #4]
8007a02: 2204 movs r2, #4
8007a04: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
8007a08: 2300 movs r3, #0
}
8007a0a: 4618 mov r0, r3
8007a0c: 370c adds r7, #12
8007a0e: 46bd mov sp, r7
8007a10: bc80 pop {r7}
8007a12: 4770 bx lr
08007a14 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
8007a14: b480 push {r7}
8007a16: b083 sub sp, #12
8007a18: af00 add r7, sp, #0
8007a1a: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
8007a1c: 687b ldr r3, [r7, #4]
8007a1e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007a22: 2b04 cmp r3, #4
8007a24: d105 bne.n 8007a32 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
8007a26: 687b ldr r3, [r7, #4]
8007a28: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
8007a2c: 687b ldr r3, [r7, #4]
8007a2e: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
8007a32: 2300 movs r3, #0
}
8007a34: 4618 mov r0, r3
8007a36: 370c adds r7, #12
8007a38: 46bd mov sp, r7
8007a3a: bc80 pop {r7}
8007a3c: 4770 bx lr
08007a3e <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
8007a3e: b580 push {r7, lr}
8007a40: b082 sub sp, #8
8007a42: af00 add r7, sp, #0
8007a44: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007a46: 687b ldr r3, [r7, #4]
8007a48: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007a4c: 2b03 cmp r3, #3
8007a4e: d10b bne.n 8007a68 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
8007a50: 687b ldr r3, [r7, #4]
8007a52: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007a56: 69db ldr r3, [r3, #28]
8007a58: 2b00 cmp r3, #0
8007a5a: d005 beq.n 8007a68 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
8007a5c: 687b ldr r3, [r7, #4]
8007a5e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007a62: 69db ldr r3, [r3, #28]
8007a64: 6878 ldr r0, [r7, #4]
8007a66: 4798 blx r3
}
}
return USBD_OK;
8007a68: 2300 movs r3, #0
}
8007a6a: 4618 mov r0, r3
8007a6c: 3708 adds r7, #8
8007a6e: 46bd mov sp, r7
8007a70: bd80 pop {r7, pc}
...
08007a74 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007a74: b580 push {r7, lr}
8007a76: b084 sub sp, #16
8007a78: af00 add r7, sp, #0
8007a7a: 6078 str r0, [r7, #4]
8007a7c: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
8007a7e: 2300 movs r3, #0
8007a80: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007a82: 683b ldr r3, [r7, #0]
8007a84: 781b ldrb r3, [r3, #0]
8007a86: f003 0360 and.w r3, r3, #96 @ 0x60
8007a8a: 2b40 cmp r3, #64 @ 0x40
8007a8c: d005 beq.n 8007a9a <USBD_StdDevReq+0x26>
8007a8e: 2b40 cmp r3, #64 @ 0x40
8007a90: d84f bhi.n 8007b32 <USBD_StdDevReq+0xbe>
8007a92: 2b00 cmp r3, #0
8007a94: d009 beq.n 8007aaa <USBD_StdDevReq+0x36>
8007a96: 2b20 cmp r3, #32
8007a98: d14b bne.n 8007b32 <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8007a9a: 687b ldr r3, [r7, #4]
8007a9c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007aa0: 689b ldr r3, [r3, #8]
8007aa2: 6839 ldr r1, [r7, #0]
8007aa4: 6878 ldr r0, [r7, #4]
8007aa6: 4798 blx r3
break;
8007aa8: e048 b.n 8007b3c <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8007aaa: 683b ldr r3, [r7, #0]
8007aac: 785b ldrb r3, [r3, #1]
8007aae: 2b09 cmp r3, #9
8007ab0: d839 bhi.n 8007b26 <USBD_StdDevReq+0xb2>
8007ab2: a201 add r2, pc, #4 @ (adr r2, 8007ab8 <USBD_StdDevReq+0x44>)
8007ab4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007ab8: 08007b09 .word 0x08007b09
8007abc: 08007b1d .word 0x08007b1d
8007ac0: 08007b27 .word 0x08007b27
8007ac4: 08007b13 .word 0x08007b13
8007ac8: 08007b27 .word 0x08007b27
8007acc: 08007aeb .word 0x08007aeb
8007ad0: 08007ae1 .word 0x08007ae1
8007ad4: 08007b27 .word 0x08007b27
8007ad8: 08007aff .word 0x08007aff
8007adc: 08007af5 .word 0x08007af5
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
8007ae0: 6839 ldr r1, [r7, #0]
8007ae2: 6878 ldr r0, [r7, #4]
8007ae4: f000 f9dc bl 8007ea0 <USBD_GetDescriptor>
break;
8007ae8: e022 b.n 8007b30 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
8007aea: 6839 ldr r1, [r7, #0]
8007aec: 6878 ldr r0, [r7, #4]
8007aee: f000 fb3f bl 8008170 <USBD_SetAddress>
break;
8007af2: e01d b.n 8007b30 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
8007af4: 6839 ldr r1, [r7, #0]
8007af6: 6878 ldr r0, [r7, #4]
8007af8: f000 fb7e bl 80081f8 <USBD_SetConfig>
break;
8007afc: e018 b.n 8007b30 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
8007afe: 6839 ldr r1, [r7, #0]
8007b00: 6878 ldr r0, [r7, #4]
8007b02: f000 fc07 bl 8008314 <USBD_GetConfig>
break;
8007b06: e013 b.n 8007b30 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
8007b08: 6839 ldr r1, [r7, #0]
8007b0a: 6878 ldr r0, [r7, #4]
8007b0c: f000 fc37 bl 800837e <USBD_GetStatus>
break;
8007b10: e00e b.n 8007b30 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
8007b12: 6839 ldr r1, [r7, #0]
8007b14: 6878 ldr r0, [r7, #4]
8007b16: f000 fc65 bl 80083e4 <USBD_SetFeature>
break;
8007b1a: e009 b.n 8007b30 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
8007b1c: 6839 ldr r1, [r7, #0]
8007b1e: 6878 ldr r0, [r7, #4]
8007b20: f000 fc74 bl 800840c <USBD_ClrFeature>
break;
8007b24: e004 b.n 8007b30 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
8007b26: 6839 ldr r1, [r7, #0]
8007b28: 6878 ldr r0, [r7, #4]
8007b2a: f000 fcc9 bl 80084c0 <USBD_CtlError>
break;
8007b2e: bf00 nop
}
break;
8007b30: e004 b.n 8007b3c <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
8007b32: 6839 ldr r1, [r7, #0]
8007b34: 6878 ldr r0, [r7, #4]
8007b36: f000 fcc3 bl 80084c0 <USBD_CtlError>
break;
8007b3a: bf00 nop
}
return ret;
8007b3c: 7bfb ldrb r3, [r7, #15]
}
8007b3e: 4618 mov r0, r3
8007b40: 3710 adds r7, #16
8007b42: 46bd mov sp, r7
8007b44: bd80 pop {r7, pc}
8007b46: bf00 nop
08007b48 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007b48: b580 push {r7, lr}
8007b4a: b084 sub sp, #16
8007b4c: af00 add r7, sp, #0
8007b4e: 6078 str r0, [r7, #4]
8007b50: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
8007b52: 2300 movs r3, #0
8007b54: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007b56: 683b ldr r3, [r7, #0]
8007b58: 781b ldrb r3, [r3, #0]
8007b5a: f003 0360 and.w r3, r3, #96 @ 0x60
8007b5e: 2b40 cmp r3, #64 @ 0x40
8007b60: d005 beq.n 8007b6e <USBD_StdItfReq+0x26>
8007b62: 2b40 cmp r3, #64 @ 0x40
8007b64: d82e bhi.n 8007bc4 <USBD_StdItfReq+0x7c>
8007b66: 2b00 cmp r3, #0
8007b68: d001 beq.n 8007b6e <USBD_StdItfReq+0x26>
8007b6a: 2b20 cmp r3, #32
8007b6c: d12a bne.n 8007bc4 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
8007b6e: 687b ldr r3, [r7, #4]
8007b70: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007b74: 3b01 subs r3, #1
8007b76: 2b02 cmp r3, #2
8007b78: d81d bhi.n 8007bb6 <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
8007b7a: 683b ldr r3, [r7, #0]
8007b7c: 889b ldrh r3, [r3, #4]
8007b7e: b2db uxtb r3, r3
8007b80: 2b01 cmp r3, #1
8007b82: d813 bhi.n 8007bac <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
8007b84: 687b ldr r3, [r7, #4]
8007b86: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007b8a: 689b ldr r3, [r3, #8]
8007b8c: 6839 ldr r1, [r7, #0]
8007b8e: 6878 ldr r0, [r7, #4]
8007b90: 4798 blx r3
8007b92: 4603 mov r3, r0
8007b94: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
8007b96: 683b ldr r3, [r7, #0]
8007b98: 88db ldrh r3, [r3, #6]
8007b9a: 2b00 cmp r3, #0
8007b9c: d110 bne.n 8007bc0 <USBD_StdItfReq+0x78>
8007b9e: 7bfb ldrb r3, [r7, #15]
8007ba0: 2b00 cmp r3, #0
8007ba2: d10d bne.n 8007bc0 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
8007ba4: 6878 ldr r0, [r7, #4]
8007ba6: f000 fd53 bl 8008650 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8007baa: e009 b.n 8007bc0 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
8007bac: 6839 ldr r1, [r7, #0]
8007bae: 6878 ldr r0, [r7, #4]
8007bb0: f000 fc86 bl 80084c0 <USBD_CtlError>
break;
8007bb4: e004 b.n 8007bc0 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
8007bb6: 6839 ldr r1, [r7, #0]
8007bb8: 6878 ldr r0, [r7, #4]
8007bba: f000 fc81 bl 80084c0 <USBD_CtlError>
break;
8007bbe: e000 b.n 8007bc2 <USBD_StdItfReq+0x7a>
break;
8007bc0: bf00 nop
}
break;
8007bc2: e004 b.n 8007bce <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
8007bc4: 6839 ldr r1, [r7, #0]
8007bc6: 6878 ldr r0, [r7, #4]
8007bc8: f000 fc7a bl 80084c0 <USBD_CtlError>
break;
8007bcc: bf00 nop
}
return USBD_OK;
8007bce: 2300 movs r3, #0
}
8007bd0: 4618 mov r0, r3
8007bd2: 3710 adds r7, #16
8007bd4: 46bd mov sp, r7
8007bd6: bd80 pop {r7, pc}
08007bd8 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007bd8: b580 push {r7, lr}
8007bda: b084 sub sp, #16
8007bdc: af00 add r7, sp, #0
8007bde: 6078 str r0, [r7, #4]
8007be0: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
8007be2: 2300 movs r3, #0
8007be4: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
8007be6: 683b ldr r3, [r7, #0]
8007be8: 889b ldrh r3, [r3, #4]
8007bea: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007bec: 683b ldr r3, [r7, #0]
8007bee: 781b ldrb r3, [r3, #0]
8007bf0: f003 0360 and.w r3, r3, #96 @ 0x60
8007bf4: 2b40 cmp r3, #64 @ 0x40
8007bf6: d007 beq.n 8007c08 <USBD_StdEPReq+0x30>
8007bf8: 2b40 cmp r3, #64 @ 0x40
8007bfa: f200 8146 bhi.w 8007e8a <USBD_StdEPReq+0x2b2>
8007bfe: 2b00 cmp r3, #0
8007c00: d00a beq.n 8007c18 <USBD_StdEPReq+0x40>
8007c02: 2b20 cmp r3, #32
8007c04: f040 8141 bne.w 8007e8a <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8007c08: 687b ldr r3, [r7, #4]
8007c0a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007c0e: 689b ldr r3, [r3, #8]
8007c10: 6839 ldr r1, [r7, #0]
8007c12: 6878 ldr r0, [r7, #4]
8007c14: 4798 blx r3
break;
8007c16: e13d b.n 8007e94 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
8007c18: 683b ldr r3, [r7, #0]
8007c1a: 781b ldrb r3, [r3, #0]
8007c1c: f003 0360 and.w r3, r3, #96 @ 0x60
8007c20: 2b20 cmp r3, #32
8007c22: d10a bne.n 8007c3a <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
8007c24: 687b ldr r3, [r7, #4]
8007c26: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007c2a: 689b ldr r3, [r3, #8]
8007c2c: 6839 ldr r1, [r7, #0]
8007c2e: 6878 ldr r0, [r7, #4]
8007c30: 4798 blx r3
8007c32: 4603 mov r3, r0
8007c34: 73fb strb r3, [r7, #15]
return ret;
8007c36: 7bfb ldrb r3, [r7, #15]
8007c38: e12d b.n 8007e96 <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
8007c3a: 683b ldr r3, [r7, #0]
8007c3c: 785b ldrb r3, [r3, #1]
8007c3e: 2b03 cmp r3, #3
8007c40: d007 beq.n 8007c52 <USBD_StdEPReq+0x7a>
8007c42: 2b03 cmp r3, #3
8007c44: f300 811b bgt.w 8007e7e <USBD_StdEPReq+0x2a6>
8007c48: 2b00 cmp r3, #0
8007c4a: d072 beq.n 8007d32 <USBD_StdEPReq+0x15a>
8007c4c: 2b01 cmp r3, #1
8007c4e: d03a beq.n 8007cc6 <USBD_StdEPReq+0xee>
8007c50: e115 b.n 8007e7e <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
8007c52: 687b ldr r3, [r7, #4]
8007c54: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007c58: 2b02 cmp r3, #2
8007c5a: d002 beq.n 8007c62 <USBD_StdEPReq+0x8a>
8007c5c: 2b03 cmp r3, #3
8007c5e: d015 beq.n 8007c8c <USBD_StdEPReq+0xb4>
8007c60: e02b b.n 8007cba <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8007c62: 7bbb ldrb r3, [r7, #14]
8007c64: 2b00 cmp r3, #0
8007c66: d00c beq.n 8007c82 <USBD_StdEPReq+0xaa>
8007c68: 7bbb ldrb r3, [r7, #14]
8007c6a: 2b80 cmp r3, #128 @ 0x80
8007c6c: d009 beq.n 8007c82 <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
8007c6e: 7bbb ldrb r3, [r7, #14]
8007c70: 4619 mov r1, r3
8007c72: 6878 ldr r0, [r7, #4]
8007c74: f001 f8fe bl 8008e74 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8007c78: 2180 movs r1, #128 @ 0x80
8007c7a: 6878 ldr r0, [r7, #4]
8007c7c: f001 f8fa bl 8008e74 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8007c80: e020 b.n 8007cc4 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
8007c82: 6839 ldr r1, [r7, #0]
8007c84: 6878 ldr r0, [r7, #4]
8007c86: f000 fc1b bl 80084c0 <USBD_CtlError>
break;
8007c8a: e01b b.n 8007cc4 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8007c8c: 683b ldr r3, [r7, #0]
8007c8e: 885b ldrh r3, [r3, #2]
8007c90: 2b00 cmp r3, #0
8007c92: d10e bne.n 8007cb2 <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
8007c94: 7bbb ldrb r3, [r7, #14]
8007c96: 2b00 cmp r3, #0
8007c98: d00b beq.n 8007cb2 <USBD_StdEPReq+0xda>
8007c9a: 7bbb ldrb r3, [r7, #14]
8007c9c: 2b80 cmp r3, #128 @ 0x80
8007c9e: d008 beq.n 8007cb2 <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
8007ca0: 683b ldr r3, [r7, #0]
8007ca2: 88db ldrh r3, [r3, #6]
8007ca4: 2b00 cmp r3, #0
8007ca6: d104 bne.n 8007cb2 <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
8007ca8: 7bbb ldrb r3, [r7, #14]
8007caa: 4619 mov r1, r3
8007cac: 6878 ldr r0, [r7, #4]
8007cae: f001 f8e1 bl 8008e74 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
8007cb2: 6878 ldr r0, [r7, #4]
8007cb4: f000 fccc bl 8008650 <USBD_CtlSendStatus>
break;
8007cb8: e004 b.n 8007cc4 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
8007cba: 6839 ldr r1, [r7, #0]
8007cbc: 6878 ldr r0, [r7, #4]
8007cbe: f000 fbff bl 80084c0 <USBD_CtlError>
break;
8007cc2: bf00 nop
}
break;
8007cc4: e0e0 b.n 8007e88 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
8007cc6: 687b ldr r3, [r7, #4]
8007cc8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007ccc: 2b02 cmp r3, #2
8007cce: d002 beq.n 8007cd6 <USBD_StdEPReq+0xfe>
8007cd0: 2b03 cmp r3, #3
8007cd2: d015 beq.n 8007d00 <USBD_StdEPReq+0x128>
8007cd4: e026 b.n 8007d24 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8007cd6: 7bbb ldrb r3, [r7, #14]
8007cd8: 2b00 cmp r3, #0
8007cda: d00c beq.n 8007cf6 <USBD_StdEPReq+0x11e>
8007cdc: 7bbb ldrb r3, [r7, #14]
8007cde: 2b80 cmp r3, #128 @ 0x80
8007ce0: d009 beq.n 8007cf6 <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
8007ce2: 7bbb ldrb r3, [r7, #14]
8007ce4: 4619 mov r1, r3
8007ce6: 6878 ldr r0, [r7, #4]
8007ce8: f001 f8c4 bl 8008e74 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8007cec: 2180 movs r1, #128 @ 0x80
8007cee: 6878 ldr r0, [r7, #4]
8007cf0: f001 f8c0 bl 8008e74 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8007cf4: e01c b.n 8007d30 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
8007cf6: 6839 ldr r1, [r7, #0]
8007cf8: 6878 ldr r0, [r7, #4]
8007cfa: f000 fbe1 bl 80084c0 <USBD_CtlError>
break;
8007cfe: e017 b.n 8007d30 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8007d00: 683b ldr r3, [r7, #0]
8007d02: 885b ldrh r3, [r3, #2]
8007d04: 2b00 cmp r3, #0
8007d06: d112 bne.n 8007d2e <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
8007d08: 7bbb ldrb r3, [r7, #14]
8007d0a: f003 037f and.w r3, r3, #127 @ 0x7f
8007d0e: 2b00 cmp r3, #0
8007d10: d004 beq.n 8007d1c <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
8007d12: 7bbb ldrb r3, [r7, #14]
8007d14: 4619 mov r1, r3
8007d16: 6878 ldr r0, [r7, #4]
8007d18: f001 f8cb bl 8008eb2 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
8007d1c: 6878 ldr r0, [r7, #4]
8007d1e: f000 fc97 bl 8008650 <USBD_CtlSendStatus>
}
break;
8007d22: e004 b.n 8007d2e <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
8007d24: 6839 ldr r1, [r7, #0]
8007d26: 6878 ldr r0, [r7, #4]
8007d28: f000 fbca bl 80084c0 <USBD_CtlError>
break;
8007d2c: e000 b.n 8007d30 <USBD_StdEPReq+0x158>
break;
8007d2e: bf00 nop
}
break;
8007d30: e0aa b.n 8007e88 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
8007d32: 687b ldr r3, [r7, #4]
8007d34: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007d38: 2b02 cmp r3, #2
8007d3a: d002 beq.n 8007d42 <USBD_StdEPReq+0x16a>
8007d3c: 2b03 cmp r3, #3
8007d3e: d032 beq.n 8007da6 <USBD_StdEPReq+0x1ce>
8007d40: e097 b.n 8007e72 <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8007d42: 7bbb ldrb r3, [r7, #14]
8007d44: 2b00 cmp r3, #0
8007d46: d007 beq.n 8007d58 <USBD_StdEPReq+0x180>
8007d48: 7bbb ldrb r3, [r7, #14]
8007d4a: 2b80 cmp r3, #128 @ 0x80
8007d4c: d004 beq.n 8007d58 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
8007d4e: 6839 ldr r1, [r7, #0]
8007d50: 6878 ldr r0, [r7, #4]
8007d52: f000 fbb5 bl 80084c0 <USBD_CtlError>
break;
8007d56: e091 b.n 8007e7c <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007d58: f997 300e ldrsb.w r3, [r7, #14]
8007d5c: 2b00 cmp r3, #0
8007d5e: da0b bge.n 8007d78 <USBD_StdEPReq+0x1a0>
8007d60: 7bbb ldrb r3, [r7, #14]
8007d62: f003 027f and.w r2, r3, #127 @ 0x7f
8007d66: 4613 mov r3, r2
8007d68: 009b lsls r3, r3, #2
8007d6a: 4413 add r3, r2
8007d6c: 009b lsls r3, r3, #2
8007d6e: 3310 adds r3, #16
8007d70: 687a ldr r2, [r7, #4]
8007d72: 4413 add r3, r2
8007d74: 3304 adds r3, #4
8007d76: e00b b.n 8007d90 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
8007d78: 7bbb ldrb r3, [r7, #14]
8007d7a: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007d7e: 4613 mov r3, r2
8007d80: 009b lsls r3, r3, #2
8007d82: 4413 add r3, r2
8007d84: 009b lsls r3, r3, #2
8007d86: f503 73a8 add.w r3, r3, #336 @ 0x150
8007d8a: 687a ldr r2, [r7, #4]
8007d8c: 4413 add r3, r2
8007d8e: 3304 adds r3, #4
8007d90: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
8007d92: 68bb ldr r3, [r7, #8]
8007d94: 2200 movs r2, #0
8007d96: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8007d98: 68bb ldr r3, [r7, #8]
8007d9a: 2202 movs r2, #2
8007d9c: 4619 mov r1, r3
8007d9e: 6878 ldr r0, [r7, #4]
8007da0: f000 fbf8 bl 8008594 <USBD_CtlSendData>
break;
8007da4: e06a b.n 8007e7c <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
8007da6: f997 300e ldrsb.w r3, [r7, #14]
8007daa: 2b00 cmp r3, #0
8007dac: da11 bge.n 8007dd2 <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
8007dae: 7bbb ldrb r3, [r7, #14]
8007db0: f003 020f and.w r2, r3, #15
8007db4: 6879 ldr r1, [r7, #4]
8007db6: 4613 mov r3, r2
8007db8: 009b lsls r3, r3, #2
8007dba: 4413 add r3, r2
8007dbc: 009b lsls r3, r3, #2
8007dbe: 440b add r3, r1
8007dc0: 3318 adds r3, #24
8007dc2: 681b ldr r3, [r3, #0]
8007dc4: 2b00 cmp r3, #0
8007dc6: d117 bne.n 8007df8 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8007dc8: 6839 ldr r1, [r7, #0]
8007dca: 6878 ldr r0, [r7, #4]
8007dcc: f000 fb78 bl 80084c0 <USBD_CtlError>
break;
8007dd0: e054 b.n 8007e7c <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
8007dd2: 7bbb ldrb r3, [r7, #14]
8007dd4: f003 020f and.w r2, r3, #15
8007dd8: 6879 ldr r1, [r7, #4]
8007dda: 4613 mov r3, r2
8007ddc: 009b lsls r3, r3, #2
8007dde: 4413 add r3, r2
8007de0: 009b lsls r3, r3, #2
8007de2: 440b add r3, r1
8007de4: f503 73ac add.w r3, r3, #344 @ 0x158
8007de8: 681b ldr r3, [r3, #0]
8007dea: 2b00 cmp r3, #0
8007dec: d104 bne.n 8007df8 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8007dee: 6839 ldr r1, [r7, #0]
8007df0: 6878 ldr r0, [r7, #4]
8007df2: f000 fb65 bl 80084c0 <USBD_CtlError>
break;
8007df6: e041 b.n 8007e7c <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007df8: f997 300e ldrsb.w r3, [r7, #14]
8007dfc: 2b00 cmp r3, #0
8007dfe: da0b bge.n 8007e18 <USBD_StdEPReq+0x240>
8007e00: 7bbb ldrb r3, [r7, #14]
8007e02: f003 027f and.w r2, r3, #127 @ 0x7f
8007e06: 4613 mov r3, r2
8007e08: 009b lsls r3, r3, #2
8007e0a: 4413 add r3, r2
8007e0c: 009b lsls r3, r3, #2
8007e0e: 3310 adds r3, #16
8007e10: 687a ldr r2, [r7, #4]
8007e12: 4413 add r3, r2
8007e14: 3304 adds r3, #4
8007e16: e00b b.n 8007e30 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
8007e18: 7bbb ldrb r3, [r7, #14]
8007e1a: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007e1e: 4613 mov r3, r2
8007e20: 009b lsls r3, r3, #2
8007e22: 4413 add r3, r2
8007e24: 009b lsls r3, r3, #2
8007e26: f503 73a8 add.w r3, r3, #336 @ 0x150
8007e2a: 687a ldr r2, [r7, #4]
8007e2c: 4413 add r3, r2
8007e2e: 3304 adds r3, #4
8007e30: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
8007e32: 7bbb ldrb r3, [r7, #14]
8007e34: 2b00 cmp r3, #0
8007e36: d002 beq.n 8007e3e <USBD_StdEPReq+0x266>
8007e38: 7bbb ldrb r3, [r7, #14]
8007e3a: 2b80 cmp r3, #128 @ 0x80
8007e3c: d103 bne.n 8007e46 <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
8007e3e: 68bb ldr r3, [r7, #8]
8007e40: 2200 movs r2, #0
8007e42: 601a str r2, [r3, #0]
8007e44: e00e b.n 8007e64 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
8007e46: 7bbb ldrb r3, [r7, #14]
8007e48: 4619 mov r1, r3
8007e4a: 6878 ldr r0, [r7, #4]
8007e4c: f001 f850 bl 8008ef0 <USBD_LL_IsStallEP>
8007e50: 4603 mov r3, r0
8007e52: 2b00 cmp r3, #0
8007e54: d003 beq.n 8007e5e <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
8007e56: 68bb ldr r3, [r7, #8]
8007e58: 2201 movs r2, #1
8007e5a: 601a str r2, [r3, #0]
8007e5c: e002 b.n 8007e64 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
8007e5e: 68bb ldr r3, [r7, #8]
8007e60: 2200 movs r2, #0
8007e62: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8007e64: 68bb ldr r3, [r7, #8]
8007e66: 2202 movs r2, #2
8007e68: 4619 mov r1, r3
8007e6a: 6878 ldr r0, [r7, #4]
8007e6c: f000 fb92 bl 8008594 <USBD_CtlSendData>
break;
8007e70: e004 b.n 8007e7c <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
8007e72: 6839 ldr r1, [r7, #0]
8007e74: 6878 ldr r0, [r7, #4]
8007e76: f000 fb23 bl 80084c0 <USBD_CtlError>
break;
8007e7a: bf00 nop
}
break;
8007e7c: e004 b.n 8007e88 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
8007e7e: 6839 ldr r1, [r7, #0]
8007e80: 6878 ldr r0, [r7, #4]
8007e82: f000 fb1d bl 80084c0 <USBD_CtlError>
break;
8007e86: bf00 nop
}
break;
8007e88: e004 b.n 8007e94 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
8007e8a: 6839 ldr r1, [r7, #0]
8007e8c: 6878 ldr r0, [r7, #4]
8007e8e: f000 fb17 bl 80084c0 <USBD_CtlError>
break;
8007e92: bf00 nop
}
return ret;
8007e94: 7bfb ldrb r3, [r7, #15]
}
8007e96: 4618 mov r0, r3
8007e98: 3710 adds r7, #16
8007e9a: 46bd mov sp, r7
8007e9c: bd80 pop {r7, pc}
...
08007ea0 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007ea0: b580 push {r7, lr}
8007ea2: b084 sub sp, #16
8007ea4: af00 add r7, sp, #0
8007ea6: 6078 str r0, [r7, #4]
8007ea8: 6039 str r1, [r7, #0]
uint16_t len = 0U;
8007eaa: 2300 movs r3, #0
8007eac: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
8007eae: 2300 movs r3, #0
8007eb0: 60fb str r3, [r7, #12]
uint8_t err = 0U;
8007eb2: 2300 movs r3, #0
8007eb4: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
8007eb6: 683b ldr r3, [r7, #0]
8007eb8: 885b ldrh r3, [r3, #2]
8007eba: 0a1b lsrs r3, r3, #8
8007ebc: b29b uxth r3, r3
8007ebe: 3b01 subs r3, #1
8007ec0: 2b06 cmp r3, #6
8007ec2: f200 8128 bhi.w 8008116 <USBD_GetDescriptor+0x276>
8007ec6: a201 add r2, pc, #4 @ (adr r2, 8007ecc <USBD_GetDescriptor+0x2c>)
8007ec8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007ecc: 08007ee9 .word 0x08007ee9
8007ed0: 08007f01 .word 0x08007f01
8007ed4: 08007f41 .word 0x08007f41
8007ed8: 08008117 .word 0x08008117
8007edc: 08008117 .word 0x08008117
8007ee0: 080080b7 .word 0x080080b7
8007ee4: 080080e3 .word 0x080080e3
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
8007ee8: 687b ldr r3, [r7, #4]
8007eea: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007eee: 681b ldr r3, [r3, #0]
8007ef0: 687a ldr r2, [r7, #4]
8007ef2: 7c12 ldrb r2, [r2, #16]
8007ef4: f107 0108 add.w r1, r7, #8
8007ef8: 4610 mov r0, r2
8007efa: 4798 blx r3
8007efc: 60f8 str r0, [r7, #12]
break;
8007efe: e112 b.n 8008126 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007f00: 687b ldr r3, [r7, #4]
8007f02: 7c1b ldrb r3, [r3, #16]
8007f04: 2b00 cmp r3, #0
8007f06: d10d bne.n 8007f24 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
8007f08: 687b ldr r3, [r7, #4]
8007f0a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007f0e: 6a9b ldr r3, [r3, #40] @ 0x28
8007f10: f107 0208 add.w r2, r7, #8
8007f14: 4610 mov r0, r2
8007f16: 4798 blx r3
8007f18: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8007f1a: 68fb ldr r3, [r7, #12]
8007f1c: 3301 adds r3, #1
8007f1e: 2202 movs r2, #2
8007f20: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
8007f22: e100 b.n 8008126 <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
8007f24: 687b ldr r3, [r7, #4]
8007f26: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007f2a: 6adb ldr r3, [r3, #44] @ 0x2c
8007f2c: f107 0208 add.w r2, r7, #8
8007f30: 4610 mov r0, r2
8007f32: 4798 blx r3
8007f34: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8007f36: 68fb ldr r3, [r7, #12]
8007f38: 3301 adds r3, #1
8007f3a: 2202 movs r2, #2
8007f3c: 701a strb r2, [r3, #0]
break;
8007f3e: e0f2 b.n 8008126 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
8007f40: 683b ldr r3, [r7, #0]
8007f42: 885b ldrh r3, [r3, #2]
8007f44: b2db uxtb r3, r3
8007f46: 2b05 cmp r3, #5
8007f48: f200 80ac bhi.w 80080a4 <USBD_GetDescriptor+0x204>
8007f4c: a201 add r2, pc, #4 @ (adr r2, 8007f54 <USBD_GetDescriptor+0xb4>)
8007f4e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007f52: bf00 nop
8007f54: 08007f6d .word 0x08007f6d
8007f58: 08007fa1 .word 0x08007fa1
8007f5c: 08007fd5 .word 0x08007fd5
8007f60: 08008009 .word 0x08008009
8007f64: 0800803d .word 0x0800803d
8007f68: 08008071 .word 0x08008071
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
8007f6c: 687b ldr r3, [r7, #4]
8007f6e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007f72: 685b ldr r3, [r3, #4]
8007f74: 2b00 cmp r3, #0
8007f76: d00b beq.n 8007f90 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
8007f78: 687b ldr r3, [r7, #4]
8007f7a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007f7e: 685b ldr r3, [r3, #4]
8007f80: 687a ldr r2, [r7, #4]
8007f82: 7c12 ldrb r2, [r2, #16]
8007f84: f107 0108 add.w r1, r7, #8
8007f88: 4610 mov r0, r2
8007f8a: 4798 blx r3
8007f8c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007f8e: e091 b.n 80080b4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007f90: 6839 ldr r1, [r7, #0]
8007f92: 6878 ldr r0, [r7, #4]
8007f94: f000 fa94 bl 80084c0 <USBD_CtlError>
err++;
8007f98: 7afb ldrb r3, [r7, #11]
8007f9a: 3301 adds r3, #1
8007f9c: 72fb strb r3, [r7, #11]
break;
8007f9e: e089 b.n 80080b4 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
8007fa0: 687b ldr r3, [r7, #4]
8007fa2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007fa6: 689b ldr r3, [r3, #8]
8007fa8: 2b00 cmp r3, #0
8007faa: d00b beq.n 8007fc4 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
8007fac: 687b ldr r3, [r7, #4]
8007fae: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007fb2: 689b ldr r3, [r3, #8]
8007fb4: 687a ldr r2, [r7, #4]
8007fb6: 7c12 ldrb r2, [r2, #16]
8007fb8: f107 0108 add.w r1, r7, #8
8007fbc: 4610 mov r0, r2
8007fbe: 4798 blx r3
8007fc0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007fc2: e077 b.n 80080b4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007fc4: 6839 ldr r1, [r7, #0]
8007fc6: 6878 ldr r0, [r7, #4]
8007fc8: f000 fa7a bl 80084c0 <USBD_CtlError>
err++;
8007fcc: 7afb ldrb r3, [r7, #11]
8007fce: 3301 adds r3, #1
8007fd0: 72fb strb r3, [r7, #11]
break;
8007fd2: e06f b.n 80080b4 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
8007fd4: 687b ldr r3, [r7, #4]
8007fd6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007fda: 68db ldr r3, [r3, #12]
8007fdc: 2b00 cmp r3, #0
8007fde: d00b beq.n 8007ff8 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
8007fe0: 687b ldr r3, [r7, #4]
8007fe2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007fe6: 68db ldr r3, [r3, #12]
8007fe8: 687a ldr r2, [r7, #4]
8007fea: 7c12 ldrb r2, [r2, #16]
8007fec: f107 0108 add.w r1, r7, #8
8007ff0: 4610 mov r0, r2
8007ff2: 4798 blx r3
8007ff4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007ff6: e05d b.n 80080b4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007ff8: 6839 ldr r1, [r7, #0]
8007ffa: 6878 ldr r0, [r7, #4]
8007ffc: f000 fa60 bl 80084c0 <USBD_CtlError>
err++;
8008000: 7afb ldrb r3, [r7, #11]
8008002: 3301 adds r3, #1
8008004: 72fb strb r3, [r7, #11]
break;
8008006: e055 b.n 80080b4 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
8008008: 687b ldr r3, [r7, #4]
800800a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800800e: 691b ldr r3, [r3, #16]
8008010: 2b00 cmp r3, #0
8008012: d00b beq.n 800802c <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
8008014: 687b ldr r3, [r7, #4]
8008016: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800801a: 691b ldr r3, [r3, #16]
800801c: 687a ldr r2, [r7, #4]
800801e: 7c12 ldrb r2, [r2, #16]
8008020: f107 0108 add.w r1, r7, #8
8008024: 4610 mov r0, r2
8008026: 4798 blx r3
8008028: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800802a: e043 b.n 80080b4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800802c: 6839 ldr r1, [r7, #0]
800802e: 6878 ldr r0, [r7, #4]
8008030: f000 fa46 bl 80084c0 <USBD_CtlError>
err++;
8008034: 7afb ldrb r3, [r7, #11]
8008036: 3301 adds r3, #1
8008038: 72fb strb r3, [r7, #11]
break;
800803a: e03b b.n 80080b4 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800803c: 687b ldr r3, [r7, #4]
800803e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8008042: 695b ldr r3, [r3, #20]
8008044: 2b00 cmp r3, #0
8008046: d00b beq.n 8008060 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
8008048: 687b ldr r3, [r7, #4]
800804a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800804e: 695b ldr r3, [r3, #20]
8008050: 687a ldr r2, [r7, #4]
8008052: 7c12 ldrb r2, [r2, #16]
8008054: f107 0108 add.w r1, r7, #8
8008058: 4610 mov r0, r2
800805a: 4798 blx r3
800805c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800805e: e029 b.n 80080b4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8008060: 6839 ldr r1, [r7, #0]
8008062: 6878 ldr r0, [r7, #4]
8008064: f000 fa2c bl 80084c0 <USBD_CtlError>
err++;
8008068: 7afb ldrb r3, [r7, #11]
800806a: 3301 adds r3, #1
800806c: 72fb strb r3, [r7, #11]
break;
800806e: e021 b.n 80080b4 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
8008070: 687b ldr r3, [r7, #4]
8008072: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8008076: 699b ldr r3, [r3, #24]
8008078: 2b00 cmp r3, #0
800807a: d00b beq.n 8008094 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800807c: 687b ldr r3, [r7, #4]
800807e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8008082: 699b ldr r3, [r3, #24]
8008084: 687a ldr r2, [r7, #4]
8008086: 7c12 ldrb r2, [r2, #16]
8008088: f107 0108 add.w r1, r7, #8
800808c: 4610 mov r0, r2
800808e: 4798 blx r3
8008090: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008092: e00f b.n 80080b4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8008094: 6839 ldr r1, [r7, #0]
8008096: 6878 ldr r0, [r7, #4]
8008098: f000 fa12 bl 80084c0 <USBD_CtlError>
err++;
800809c: 7afb ldrb r3, [r7, #11]
800809e: 3301 adds r3, #1
80080a0: 72fb strb r3, [r7, #11]
break;
80080a2: e007 b.n 80080b4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
80080a4: 6839 ldr r1, [r7, #0]
80080a6: 6878 ldr r0, [r7, #4]
80080a8: f000 fa0a bl 80084c0 <USBD_CtlError>
err++;
80080ac: 7afb ldrb r3, [r7, #11]
80080ae: 3301 adds r3, #1
80080b0: 72fb strb r3, [r7, #11]
#endif
}
break;
80080b2: e038 b.n 8008126 <USBD_GetDescriptor+0x286>
80080b4: e037 b.n 8008126 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80080b6: 687b ldr r3, [r7, #4]
80080b8: 7c1b ldrb r3, [r3, #16]
80080ba: 2b00 cmp r3, #0
80080bc: d109 bne.n 80080d2 <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
80080be: 687b ldr r3, [r7, #4]
80080c0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80080c4: 6b5b ldr r3, [r3, #52] @ 0x34
80080c6: f107 0208 add.w r2, r7, #8
80080ca: 4610 mov r0, r2
80080cc: 4798 blx r3
80080ce: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80080d0: e029 b.n 8008126 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
80080d2: 6839 ldr r1, [r7, #0]
80080d4: 6878 ldr r0, [r7, #4]
80080d6: f000 f9f3 bl 80084c0 <USBD_CtlError>
err++;
80080da: 7afb ldrb r3, [r7, #11]
80080dc: 3301 adds r3, #1
80080de: 72fb strb r3, [r7, #11]
break;
80080e0: e021 b.n 8008126 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80080e2: 687b ldr r3, [r7, #4]
80080e4: 7c1b ldrb r3, [r3, #16]
80080e6: 2b00 cmp r3, #0
80080e8: d10d bne.n 8008106 <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
80080ea: 687b ldr r3, [r7, #4]
80080ec: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80080f0: 6b1b ldr r3, [r3, #48] @ 0x30
80080f2: f107 0208 add.w r2, r7, #8
80080f6: 4610 mov r0, r2
80080f8: 4798 blx r3
80080fa: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
80080fc: 68fb ldr r3, [r7, #12]
80080fe: 3301 adds r3, #1
8008100: 2207 movs r2, #7
8008102: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8008104: e00f b.n 8008126 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
8008106: 6839 ldr r1, [r7, #0]
8008108: 6878 ldr r0, [r7, #4]
800810a: f000 f9d9 bl 80084c0 <USBD_CtlError>
err++;
800810e: 7afb ldrb r3, [r7, #11]
8008110: 3301 adds r3, #1
8008112: 72fb strb r3, [r7, #11]
break;
8008114: e007 b.n 8008126 <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
8008116: 6839 ldr r1, [r7, #0]
8008118: 6878 ldr r0, [r7, #4]
800811a: f000 f9d1 bl 80084c0 <USBD_CtlError>
err++;
800811e: 7afb ldrb r3, [r7, #11]
8008120: 3301 adds r3, #1
8008122: 72fb strb r3, [r7, #11]
break;
8008124: bf00 nop
}
if (err != 0U)
8008126: 7afb ldrb r3, [r7, #11]
8008128: 2b00 cmp r3, #0
800812a: d11c bne.n 8008166 <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800812c: 893b ldrh r3, [r7, #8]
800812e: 2b00 cmp r3, #0
8008130: d011 beq.n 8008156 <USBD_GetDescriptor+0x2b6>
8008132: 683b ldr r3, [r7, #0]
8008134: 88db ldrh r3, [r3, #6]
8008136: 2b00 cmp r3, #0
8008138: d00d beq.n 8008156 <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800813a: 683b ldr r3, [r7, #0]
800813c: 88da ldrh r2, [r3, #6]
800813e: 893b ldrh r3, [r7, #8]
8008140: 4293 cmp r3, r2
8008142: bf28 it cs
8008144: 4613 movcs r3, r2
8008146: b29b uxth r3, r3
8008148: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800814a: 893b ldrh r3, [r7, #8]
800814c: 461a mov r2, r3
800814e: 68f9 ldr r1, [r7, #12]
8008150: 6878 ldr r0, [r7, #4]
8008152: f000 fa1f bl 8008594 <USBD_CtlSendData>
}
if (req->wLength == 0U)
8008156: 683b ldr r3, [r7, #0]
8008158: 88db ldrh r3, [r3, #6]
800815a: 2b00 cmp r3, #0
800815c: d104 bne.n 8008168 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800815e: 6878 ldr r0, [r7, #4]
8008160: f000 fa76 bl 8008650 <USBD_CtlSendStatus>
8008164: e000 b.n 8008168 <USBD_GetDescriptor+0x2c8>
return;
8008166: bf00 nop
}
}
}
8008168: 3710 adds r7, #16
800816a: 46bd mov sp, r7
800816c: bd80 pop {r7, pc}
800816e: bf00 nop
08008170 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8008170: b580 push {r7, lr}
8008172: b084 sub sp, #16
8008174: af00 add r7, sp, #0
8008176: 6078 str r0, [r7, #4]
8008178: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800817a: 683b ldr r3, [r7, #0]
800817c: 889b ldrh r3, [r3, #4]
800817e: 2b00 cmp r3, #0
8008180: d130 bne.n 80081e4 <USBD_SetAddress+0x74>
8008182: 683b ldr r3, [r7, #0]
8008184: 88db ldrh r3, [r3, #6]
8008186: 2b00 cmp r3, #0
8008188: d12c bne.n 80081e4 <USBD_SetAddress+0x74>
800818a: 683b ldr r3, [r7, #0]
800818c: 885b ldrh r3, [r3, #2]
800818e: 2b7f cmp r3, #127 @ 0x7f
8008190: d828 bhi.n 80081e4 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
8008192: 683b ldr r3, [r7, #0]
8008194: 885b ldrh r3, [r3, #2]
8008196: b2db uxtb r3, r3
8008198: f003 037f and.w r3, r3, #127 @ 0x7f
800819c: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800819e: 687b ldr r3, [r7, #4]
80081a0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80081a4: 2b03 cmp r3, #3
80081a6: d104 bne.n 80081b2 <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
80081a8: 6839 ldr r1, [r7, #0]
80081aa: 6878 ldr r0, [r7, #4]
80081ac: f000 f988 bl 80084c0 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80081b0: e01d b.n 80081ee <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
80081b2: 687b ldr r3, [r7, #4]
80081b4: 7bfa ldrb r2, [r7, #15]
80081b6: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
80081ba: 7bfb ldrb r3, [r7, #15]
80081bc: 4619 mov r1, r3
80081be: 6878 ldr r0, [r7, #4]
80081c0: f000 fec1 bl 8008f46 <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
80081c4: 6878 ldr r0, [r7, #4]
80081c6: f000 fa43 bl 8008650 <USBD_CtlSendStatus>
if (dev_addr != 0U)
80081ca: 7bfb ldrb r3, [r7, #15]
80081cc: 2b00 cmp r3, #0
80081ce: d004 beq.n 80081da <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
80081d0: 687b ldr r3, [r7, #4]
80081d2: 2202 movs r2, #2
80081d4: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80081d8: e009 b.n 80081ee <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
80081da: 687b ldr r3, [r7, #4]
80081dc: 2201 movs r2, #1
80081de: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80081e2: e004 b.n 80081ee <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
80081e4: 6839 ldr r1, [r7, #0]
80081e6: 6878 ldr r0, [r7, #4]
80081e8: f000 f96a bl 80084c0 <USBD_CtlError>
}
}
80081ec: bf00 nop
80081ee: bf00 nop
80081f0: 3710 adds r7, #16
80081f2: 46bd mov sp, r7
80081f4: bd80 pop {r7, pc}
...
080081f8 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80081f8: b580 push {r7, lr}
80081fa: b082 sub sp, #8
80081fc: af00 add r7, sp, #0
80081fe: 6078 str r0, [r7, #4]
8008200: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
8008202: 683b ldr r3, [r7, #0]
8008204: 885b ldrh r3, [r3, #2]
8008206: b2da uxtb r2, r3
8008208: 4b41 ldr r3, [pc, #260] @ (8008310 <USBD_SetConfig+0x118>)
800820a: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800820c: 4b40 ldr r3, [pc, #256] @ (8008310 <USBD_SetConfig+0x118>)
800820e: 781b ldrb r3, [r3, #0]
8008210: 2b01 cmp r3, #1
8008212: d904 bls.n 800821e <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
8008214: 6839 ldr r1, [r7, #0]
8008216: 6878 ldr r0, [r7, #4]
8008218: f000 f952 bl 80084c0 <USBD_CtlError>
800821c: e075 b.n 800830a <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800821e: 687b ldr r3, [r7, #4]
8008220: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008224: 2b02 cmp r3, #2
8008226: d002 beq.n 800822e <USBD_SetConfig+0x36>
8008228: 2b03 cmp r3, #3
800822a: d023 beq.n 8008274 <USBD_SetConfig+0x7c>
800822c: e062 b.n 80082f4 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800822e: 4b38 ldr r3, [pc, #224] @ (8008310 <USBD_SetConfig+0x118>)
8008230: 781b ldrb r3, [r3, #0]
8008232: 2b00 cmp r3, #0
8008234: d01a beq.n 800826c <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
8008236: 4b36 ldr r3, [pc, #216] @ (8008310 <USBD_SetConfig+0x118>)
8008238: 781b ldrb r3, [r3, #0]
800823a: 461a mov r2, r3
800823c: 687b ldr r3, [r7, #4]
800823e: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
8008240: 687b ldr r3, [r7, #4]
8008242: 2203 movs r2, #3
8008244: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8008248: 4b31 ldr r3, [pc, #196] @ (8008310 <USBD_SetConfig+0x118>)
800824a: 781b ldrb r3, [r3, #0]
800824c: 4619 mov r1, r3
800824e: 6878 ldr r0, [r7, #4]
8008250: f7ff f9e7 bl 8007622 <USBD_SetClassConfig>
8008254: 4603 mov r3, r0
8008256: 2b02 cmp r3, #2
8008258: d104 bne.n 8008264 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800825a: 6839 ldr r1, [r7, #0]
800825c: 6878 ldr r0, [r7, #4]
800825e: f000 f92f bl 80084c0 <USBD_CtlError>
return;
8008262: e052 b.n 800830a <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
8008264: 6878 ldr r0, [r7, #4]
8008266: f000 f9f3 bl 8008650 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800826a: e04e b.n 800830a <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800826c: 6878 ldr r0, [r7, #4]
800826e: f000 f9ef bl 8008650 <USBD_CtlSendStatus>
break;
8008272: e04a b.n 800830a <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
8008274: 4b26 ldr r3, [pc, #152] @ (8008310 <USBD_SetConfig+0x118>)
8008276: 781b ldrb r3, [r3, #0]
8008278: 2b00 cmp r3, #0
800827a: d112 bne.n 80082a2 <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800827c: 687b ldr r3, [r7, #4]
800827e: 2202 movs r2, #2
8008280: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
8008284: 4b22 ldr r3, [pc, #136] @ (8008310 <USBD_SetConfig+0x118>)
8008286: 781b ldrb r3, [r3, #0]
8008288: 461a mov r2, r3
800828a: 687b ldr r3, [r7, #4]
800828c: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800828e: 4b20 ldr r3, [pc, #128] @ (8008310 <USBD_SetConfig+0x118>)
8008290: 781b ldrb r3, [r3, #0]
8008292: 4619 mov r1, r3
8008294: 6878 ldr r0, [r7, #4]
8008296: f7ff f9e3 bl 8007660 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800829a: 6878 ldr r0, [r7, #4]
800829c: f000 f9d8 bl 8008650 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
80082a0: e033 b.n 800830a <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
80082a2: 4b1b ldr r3, [pc, #108] @ (8008310 <USBD_SetConfig+0x118>)
80082a4: 781b ldrb r3, [r3, #0]
80082a6: 461a mov r2, r3
80082a8: 687b ldr r3, [r7, #4]
80082aa: 685b ldr r3, [r3, #4]
80082ac: 429a cmp r2, r3
80082ae: d01d beq.n 80082ec <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
80082b0: 687b ldr r3, [r7, #4]
80082b2: 685b ldr r3, [r3, #4]
80082b4: b2db uxtb r3, r3
80082b6: 4619 mov r1, r3
80082b8: 6878 ldr r0, [r7, #4]
80082ba: f7ff f9d1 bl 8007660 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
80082be: 4b14 ldr r3, [pc, #80] @ (8008310 <USBD_SetConfig+0x118>)
80082c0: 781b ldrb r3, [r3, #0]
80082c2: 461a mov r2, r3
80082c4: 687b ldr r3, [r7, #4]
80082c6: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
80082c8: 4b11 ldr r3, [pc, #68] @ (8008310 <USBD_SetConfig+0x118>)
80082ca: 781b ldrb r3, [r3, #0]
80082cc: 4619 mov r1, r3
80082ce: 6878 ldr r0, [r7, #4]
80082d0: f7ff f9a7 bl 8007622 <USBD_SetClassConfig>
80082d4: 4603 mov r3, r0
80082d6: 2b02 cmp r3, #2
80082d8: d104 bne.n 80082e4 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
80082da: 6839 ldr r1, [r7, #0]
80082dc: 6878 ldr r0, [r7, #4]
80082de: f000 f8ef bl 80084c0 <USBD_CtlError>
return;
80082e2: e012 b.n 800830a <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80082e4: 6878 ldr r0, [r7, #4]
80082e6: f000 f9b3 bl 8008650 <USBD_CtlSendStatus>
break;
80082ea: e00e b.n 800830a <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80082ec: 6878 ldr r0, [r7, #4]
80082ee: f000 f9af bl 8008650 <USBD_CtlSendStatus>
break;
80082f2: e00a b.n 800830a <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
80082f4: 6839 ldr r1, [r7, #0]
80082f6: 6878 ldr r0, [r7, #4]
80082f8: f000 f8e2 bl 80084c0 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
80082fc: 4b04 ldr r3, [pc, #16] @ (8008310 <USBD_SetConfig+0x118>)
80082fe: 781b ldrb r3, [r3, #0]
8008300: 4619 mov r1, r3
8008302: 6878 ldr r0, [r7, #4]
8008304: f7ff f9ac bl 8007660 <USBD_ClrClassConfig>
break;
8008308: bf00 nop
}
}
}
800830a: 3708 adds r7, #8
800830c: 46bd mov sp, r7
800830e: bd80 pop {r7, pc}
8008310: 20000344 .word 0x20000344
08008314 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8008314: b580 push {r7, lr}
8008316: b082 sub sp, #8
8008318: af00 add r7, sp, #0
800831a: 6078 str r0, [r7, #4]
800831c: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800831e: 683b ldr r3, [r7, #0]
8008320: 88db ldrh r3, [r3, #6]
8008322: 2b01 cmp r3, #1
8008324: d004 beq.n 8008330 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
8008326: 6839 ldr r1, [r7, #0]
8008328: 6878 ldr r0, [r7, #4]
800832a: f000 f8c9 bl 80084c0 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800832e: e022 b.n 8008376 <USBD_GetConfig+0x62>
switch (pdev->dev_state)
8008330: 687b ldr r3, [r7, #4]
8008332: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008336: 2b02 cmp r3, #2
8008338: dc02 bgt.n 8008340 <USBD_GetConfig+0x2c>
800833a: 2b00 cmp r3, #0
800833c: dc03 bgt.n 8008346 <USBD_GetConfig+0x32>
800833e: e015 b.n 800836c <USBD_GetConfig+0x58>
8008340: 2b03 cmp r3, #3
8008342: d00b beq.n 800835c <USBD_GetConfig+0x48>
8008344: e012 b.n 800836c <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
8008346: 687b ldr r3, [r7, #4]
8008348: 2200 movs r2, #0
800834a: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800834c: 687b ldr r3, [r7, #4]
800834e: 3308 adds r3, #8
8008350: 2201 movs r2, #1
8008352: 4619 mov r1, r3
8008354: 6878 ldr r0, [r7, #4]
8008356: f000 f91d bl 8008594 <USBD_CtlSendData>
break;
800835a: e00c b.n 8008376 <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800835c: 687b ldr r3, [r7, #4]
800835e: 3304 adds r3, #4
8008360: 2201 movs r2, #1
8008362: 4619 mov r1, r3
8008364: 6878 ldr r0, [r7, #4]
8008366: f000 f915 bl 8008594 <USBD_CtlSendData>
break;
800836a: e004 b.n 8008376 <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800836c: 6839 ldr r1, [r7, #0]
800836e: 6878 ldr r0, [r7, #4]
8008370: f000 f8a6 bl 80084c0 <USBD_CtlError>
break;
8008374: bf00 nop
}
8008376: bf00 nop
8008378: 3708 adds r7, #8
800837a: 46bd mov sp, r7
800837c: bd80 pop {r7, pc}
0800837e <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800837e: b580 push {r7, lr}
8008380: b082 sub sp, #8
8008382: af00 add r7, sp, #0
8008384: 6078 str r0, [r7, #4]
8008386: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8008388: 687b ldr r3, [r7, #4]
800838a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800838e: 3b01 subs r3, #1
8008390: 2b02 cmp r3, #2
8008392: d81e bhi.n 80083d2 <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
8008394: 683b ldr r3, [r7, #0]
8008396: 88db ldrh r3, [r3, #6]
8008398: 2b02 cmp r3, #2
800839a: d004 beq.n 80083a6 <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800839c: 6839 ldr r1, [r7, #0]
800839e: 6878 ldr r0, [r7, #4]
80083a0: f000 f88e bl 80084c0 <USBD_CtlError>
break;
80083a4: e01a b.n 80083dc <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
80083a6: 687b ldr r3, [r7, #4]
80083a8: 2201 movs r2, #1
80083aa: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
80083ac: 687b ldr r3, [r7, #4]
80083ae: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
80083b2: 2b00 cmp r3, #0
80083b4: d005 beq.n 80083c2 <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
80083b6: 687b ldr r3, [r7, #4]
80083b8: 68db ldr r3, [r3, #12]
80083ba: f043 0202 orr.w r2, r3, #2
80083be: 687b ldr r3, [r7, #4]
80083c0: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
80083c2: 687b ldr r3, [r7, #4]
80083c4: 330c adds r3, #12
80083c6: 2202 movs r2, #2
80083c8: 4619 mov r1, r3
80083ca: 6878 ldr r0, [r7, #4]
80083cc: f000 f8e2 bl 8008594 <USBD_CtlSendData>
break;
80083d0: e004 b.n 80083dc <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
80083d2: 6839 ldr r1, [r7, #0]
80083d4: 6878 ldr r0, [r7, #4]
80083d6: f000 f873 bl 80084c0 <USBD_CtlError>
break;
80083da: bf00 nop
}
}
80083dc: bf00 nop
80083de: 3708 adds r7, #8
80083e0: 46bd mov sp, r7
80083e2: bd80 pop {r7, pc}
080083e4 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80083e4: b580 push {r7, lr}
80083e6: b082 sub sp, #8
80083e8: af00 add r7, sp, #0
80083ea: 6078 str r0, [r7, #4]
80083ec: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
80083ee: 683b ldr r3, [r7, #0]
80083f0: 885b ldrh r3, [r3, #2]
80083f2: 2b01 cmp r3, #1
80083f4: d106 bne.n 8008404 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
80083f6: 687b ldr r3, [r7, #4]
80083f8: 2201 movs r2, #1
80083fa: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
80083fe: 6878 ldr r0, [r7, #4]
8008400: f000 f926 bl 8008650 <USBD_CtlSendStatus>
}
}
8008404: bf00 nop
8008406: 3708 adds r7, #8
8008408: 46bd mov sp, r7
800840a: bd80 pop {r7, pc}
0800840c <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800840c: b580 push {r7, lr}
800840e: b082 sub sp, #8
8008410: af00 add r7, sp, #0
8008412: 6078 str r0, [r7, #4]
8008414: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8008416: 687b ldr r3, [r7, #4]
8008418: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800841c: 3b01 subs r3, #1
800841e: 2b02 cmp r3, #2
8008420: d80b bhi.n 800843a <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
8008422: 683b ldr r3, [r7, #0]
8008424: 885b ldrh r3, [r3, #2]
8008426: 2b01 cmp r3, #1
8008428: d10c bne.n 8008444 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800842a: 687b ldr r3, [r7, #4]
800842c: 2200 movs r2, #0
800842e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
8008432: 6878 ldr r0, [r7, #4]
8008434: f000 f90c bl 8008650 <USBD_CtlSendStatus>
}
break;
8008438: e004 b.n 8008444 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800843a: 6839 ldr r1, [r7, #0]
800843c: 6878 ldr r0, [r7, #4]
800843e: f000 f83f bl 80084c0 <USBD_CtlError>
break;
8008442: e000 b.n 8008446 <USBD_ClrFeature+0x3a>
break;
8008444: bf00 nop
}
}
8008446: bf00 nop
8008448: 3708 adds r7, #8
800844a: 46bd mov sp, r7
800844c: bd80 pop {r7, pc}
0800844e <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800844e: b480 push {r7}
8008450: b083 sub sp, #12
8008452: af00 add r7, sp, #0
8008454: 6078 str r0, [r7, #4]
8008456: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
8008458: 683b ldr r3, [r7, #0]
800845a: 781a ldrb r2, [r3, #0]
800845c: 687b ldr r3, [r7, #4]
800845e: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
8008460: 683b ldr r3, [r7, #0]
8008462: 785a ldrb r2, [r3, #1]
8008464: 687b ldr r3, [r7, #4]
8008466: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
8008468: 683b ldr r3, [r7, #0]
800846a: 3302 adds r3, #2
800846c: 781b ldrb r3, [r3, #0]
800846e: 461a mov r2, r3
8008470: 683b ldr r3, [r7, #0]
8008472: 3303 adds r3, #3
8008474: 781b ldrb r3, [r3, #0]
8008476: 021b lsls r3, r3, #8
8008478: b29b uxth r3, r3
800847a: 4413 add r3, r2
800847c: b29a uxth r2, r3
800847e: 687b ldr r3, [r7, #4]
8008480: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
8008482: 683b ldr r3, [r7, #0]
8008484: 3304 adds r3, #4
8008486: 781b ldrb r3, [r3, #0]
8008488: 461a mov r2, r3
800848a: 683b ldr r3, [r7, #0]
800848c: 3305 adds r3, #5
800848e: 781b ldrb r3, [r3, #0]
8008490: 021b lsls r3, r3, #8
8008492: b29b uxth r3, r3
8008494: 4413 add r3, r2
8008496: b29a uxth r2, r3
8008498: 687b ldr r3, [r7, #4]
800849a: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800849c: 683b ldr r3, [r7, #0]
800849e: 3306 adds r3, #6
80084a0: 781b ldrb r3, [r3, #0]
80084a2: 461a mov r2, r3
80084a4: 683b ldr r3, [r7, #0]
80084a6: 3307 adds r3, #7
80084a8: 781b ldrb r3, [r3, #0]
80084aa: 021b lsls r3, r3, #8
80084ac: b29b uxth r3, r3
80084ae: 4413 add r3, r2
80084b0: b29a uxth r2, r3
80084b2: 687b ldr r3, [r7, #4]
80084b4: 80da strh r2, [r3, #6]
}
80084b6: bf00 nop
80084b8: 370c adds r7, #12
80084ba: 46bd mov sp, r7
80084bc: bc80 pop {r7}
80084be: 4770 bx lr
080084c0 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80084c0: b580 push {r7, lr}
80084c2: b082 sub sp, #8
80084c4: af00 add r7, sp, #0
80084c6: 6078 str r0, [r7, #4]
80084c8: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
80084ca: 2180 movs r1, #128 @ 0x80
80084cc: 6878 ldr r0, [r7, #4]
80084ce: f000 fcd1 bl 8008e74 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
80084d2: 2100 movs r1, #0
80084d4: 6878 ldr r0, [r7, #4]
80084d6: f000 fccd bl 8008e74 <USBD_LL_StallEP>
}
80084da: bf00 nop
80084dc: 3708 adds r7, #8
80084de: 46bd mov sp, r7
80084e0: bd80 pop {r7, pc}
080084e2 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
80084e2: b580 push {r7, lr}
80084e4: b086 sub sp, #24
80084e6: af00 add r7, sp, #0
80084e8: 60f8 str r0, [r7, #12]
80084ea: 60b9 str r1, [r7, #8]
80084ec: 607a str r2, [r7, #4]
uint8_t idx = 0U;
80084ee: 2300 movs r3, #0
80084f0: 75fb strb r3, [r7, #23]
if (desc != NULL)
80084f2: 68fb ldr r3, [r7, #12]
80084f4: 2b00 cmp r3, #0
80084f6: d032 beq.n 800855e <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
80084f8: 68f8 ldr r0, [r7, #12]
80084fa: f000 f834 bl 8008566 <USBD_GetLen>
80084fe: 4603 mov r3, r0
8008500: 3301 adds r3, #1
8008502: b29b uxth r3, r3
8008504: 005b lsls r3, r3, #1
8008506: b29a uxth r2, r3
8008508: 687b ldr r3, [r7, #4]
800850a: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800850c: 7dfb ldrb r3, [r7, #23]
800850e: 1c5a adds r2, r3, #1
8008510: 75fa strb r2, [r7, #23]
8008512: 461a mov r2, r3
8008514: 68bb ldr r3, [r7, #8]
8008516: 4413 add r3, r2
8008518: 687a ldr r2, [r7, #4]
800851a: 7812 ldrb r2, [r2, #0]
800851c: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800851e: 7dfb ldrb r3, [r7, #23]
8008520: 1c5a adds r2, r3, #1
8008522: 75fa strb r2, [r7, #23]
8008524: 461a mov r2, r3
8008526: 68bb ldr r3, [r7, #8]
8008528: 4413 add r3, r2
800852a: 2203 movs r2, #3
800852c: 701a strb r2, [r3, #0]
while (*desc != '\0')
800852e: e012 b.n 8008556 <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
8008530: 68fb ldr r3, [r7, #12]
8008532: 1c5a adds r2, r3, #1
8008534: 60fa str r2, [r7, #12]
8008536: 7dfa ldrb r2, [r7, #23]
8008538: 1c51 adds r1, r2, #1
800853a: 75f9 strb r1, [r7, #23]
800853c: 4611 mov r1, r2
800853e: 68ba ldr r2, [r7, #8]
8008540: 440a add r2, r1
8008542: 781b ldrb r3, [r3, #0]
8008544: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
8008546: 7dfb ldrb r3, [r7, #23]
8008548: 1c5a adds r2, r3, #1
800854a: 75fa strb r2, [r7, #23]
800854c: 461a mov r2, r3
800854e: 68bb ldr r3, [r7, #8]
8008550: 4413 add r3, r2
8008552: 2200 movs r2, #0
8008554: 701a strb r2, [r3, #0]
while (*desc != '\0')
8008556: 68fb ldr r3, [r7, #12]
8008558: 781b ldrb r3, [r3, #0]
800855a: 2b00 cmp r3, #0
800855c: d1e8 bne.n 8008530 <USBD_GetString+0x4e>
}
}
}
800855e: bf00 nop
8008560: 3718 adds r7, #24
8008562: 46bd mov sp, r7
8008564: bd80 pop {r7, pc}
08008566 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
8008566: b480 push {r7}
8008568: b085 sub sp, #20
800856a: af00 add r7, sp, #0
800856c: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800856e: 2300 movs r3, #0
8008570: 73fb strb r3, [r7, #15]
while (*buf != '\0')
8008572: e005 b.n 8008580 <USBD_GetLen+0x1a>
{
len++;
8008574: 7bfb ldrb r3, [r7, #15]
8008576: 3301 adds r3, #1
8008578: 73fb strb r3, [r7, #15]
buf++;
800857a: 687b ldr r3, [r7, #4]
800857c: 3301 adds r3, #1
800857e: 607b str r3, [r7, #4]
while (*buf != '\0')
8008580: 687b ldr r3, [r7, #4]
8008582: 781b ldrb r3, [r3, #0]
8008584: 2b00 cmp r3, #0
8008586: d1f5 bne.n 8008574 <USBD_GetLen+0xe>
}
return len;
8008588: 7bfb ldrb r3, [r7, #15]
}
800858a: 4618 mov r0, r3
800858c: 3714 adds r7, #20
800858e: 46bd mov sp, r7
8008590: bc80 pop {r7}
8008592: 4770 bx lr
08008594 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8008594: b580 push {r7, lr}
8008596: b084 sub sp, #16
8008598: af00 add r7, sp, #0
800859a: 60f8 str r0, [r7, #12]
800859c: 60b9 str r1, [r7, #8]
800859e: 4613 mov r3, r2
80085a0: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
80085a2: 68fb ldr r3, [r7, #12]
80085a4: 2202 movs r2, #2
80085a6: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
80085aa: 88fa ldrh r2, [r7, #6]
80085ac: 68fb ldr r3, [r7, #12]
80085ae: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
80085b0: 88fa ldrh r2, [r7, #6]
80085b2: 68fb ldr r3, [r7, #12]
80085b4: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
80085b6: 88fb ldrh r3, [r7, #6]
80085b8: 68ba ldr r2, [r7, #8]
80085ba: 2100 movs r1, #0
80085bc: 68f8 ldr r0, [r7, #12]
80085be: f000 fce1 bl 8008f84 <USBD_LL_Transmit>
return USBD_OK;
80085c2: 2300 movs r3, #0
}
80085c4: 4618 mov r0, r3
80085c6: 3710 adds r7, #16
80085c8: 46bd mov sp, r7
80085ca: bd80 pop {r7, pc}
080085cc <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
80085cc: b580 push {r7, lr}
80085ce: b084 sub sp, #16
80085d0: af00 add r7, sp, #0
80085d2: 60f8 str r0, [r7, #12]
80085d4: 60b9 str r1, [r7, #8]
80085d6: 4613 mov r3, r2
80085d8: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
80085da: 88fb ldrh r3, [r7, #6]
80085dc: 68ba ldr r2, [r7, #8]
80085de: 2100 movs r1, #0
80085e0: 68f8 ldr r0, [r7, #12]
80085e2: f000 fccf bl 8008f84 <USBD_LL_Transmit>
return USBD_OK;
80085e6: 2300 movs r3, #0
}
80085e8: 4618 mov r0, r3
80085ea: 3710 adds r7, #16
80085ec: 46bd mov sp, r7
80085ee: bd80 pop {r7, pc}
080085f0 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
80085f0: b580 push {r7, lr}
80085f2: b084 sub sp, #16
80085f4: af00 add r7, sp, #0
80085f6: 60f8 str r0, [r7, #12]
80085f8: 60b9 str r1, [r7, #8]
80085fa: 4613 mov r3, r2
80085fc: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
80085fe: 68fb ldr r3, [r7, #12]
8008600: 2203 movs r2, #3
8008602: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
8008606: 88fa ldrh r2, [r7, #6]
8008608: 68fb ldr r3, [r7, #12]
800860a: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800860e: 88fa ldrh r2, [r7, #6]
8008610: 68fb ldr r3, [r7, #12]
8008612: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8008616: 88fb ldrh r3, [r7, #6]
8008618: 68ba ldr r2, [r7, #8]
800861a: 2100 movs r1, #0
800861c: 68f8 ldr r0, [r7, #12]
800861e: f000 fcd4 bl 8008fca <USBD_LL_PrepareReceive>
return USBD_OK;
8008622: 2300 movs r3, #0
}
8008624: 4618 mov r0, r3
8008626: 3710 adds r7, #16
8008628: 46bd mov sp, r7
800862a: bd80 pop {r7, pc}
0800862c <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800862c: b580 push {r7, lr}
800862e: b084 sub sp, #16
8008630: af00 add r7, sp, #0
8008632: 60f8 str r0, [r7, #12]
8008634: 60b9 str r1, [r7, #8]
8008636: 4613 mov r3, r2
8008638: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800863a: 88fb ldrh r3, [r7, #6]
800863c: 68ba ldr r2, [r7, #8]
800863e: 2100 movs r1, #0
8008640: 68f8 ldr r0, [r7, #12]
8008642: f000 fcc2 bl 8008fca <USBD_LL_PrepareReceive>
return USBD_OK;
8008646: 2300 movs r3, #0
}
8008648: 4618 mov r0, r3
800864a: 3710 adds r7, #16
800864c: 46bd mov sp, r7
800864e: bd80 pop {r7, pc}
08008650 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
8008650: b580 push {r7, lr}
8008652: b082 sub sp, #8
8008654: af00 add r7, sp, #0
8008656: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
8008658: 687b ldr r3, [r7, #4]
800865a: 2204 movs r2, #4
800865c: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
8008660: 2300 movs r3, #0
8008662: 2200 movs r2, #0
8008664: 2100 movs r1, #0
8008666: 6878 ldr r0, [r7, #4]
8008668: f000 fc8c bl 8008f84 <USBD_LL_Transmit>
return USBD_OK;
800866c: 2300 movs r3, #0
}
800866e: 4618 mov r0, r3
8008670: 3708 adds r7, #8
8008672: 46bd mov sp, r7
8008674: bd80 pop {r7, pc}
08008676 <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
8008676: b580 push {r7, lr}
8008678: b082 sub sp, #8
800867a: af00 add r7, sp, #0
800867c: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800867e: 687b ldr r3, [r7, #4]
8008680: 2205 movs r2, #5
8008682: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8008686: 2300 movs r3, #0
8008688: 2200 movs r2, #0
800868a: 2100 movs r1, #0
800868c: 6878 ldr r0, [r7, #4]
800868e: f000 fc9c bl 8008fca <USBD_LL_PrepareReceive>
return USBD_OK;
8008692: 2300 movs r3, #0
}
8008694: 4618 mov r0, r3
8008696: 3708 adds r7, #8
8008698: 46bd mov sp, r7
800869a: bd80 pop {r7, pc}
0800869c <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800869c: b580 push {r7, lr}
800869e: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
80086a0: 2200 movs r2, #0
80086a2: 4912 ldr r1, [pc, #72] @ (80086ec <MX_USB_DEVICE_Init+0x50>)
80086a4: 4812 ldr r0, [pc, #72] @ (80086f0 <MX_USB_DEVICE_Init+0x54>)
80086a6: f7fe ff62 bl 800756e <USBD_Init>
80086aa: 4603 mov r3, r0
80086ac: 2b00 cmp r3, #0
80086ae: d001 beq.n 80086b4 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
80086b0: f7f8 f97a bl 80009a8 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
80086b4: 490f ldr r1, [pc, #60] @ (80086f4 <MX_USB_DEVICE_Init+0x58>)
80086b6: 480e ldr r0, [pc, #56] @ (80086f0 <MX_USB_DEVICE_Init+0x54>)
80086b8: f7fe ff84 bl 80075c4 <USBD_RegisterClass>
80086bc: 4603 mov r3, r0
80086be: 2b00 cmp r3, #0
80086c0: d001 beq.n 80086c6 <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
80086c2: f7f8 f971 bl 80009a8 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
80086c6: 490c ldr r1, [pc, #48] @ (80086f8 <MX_USB_DEVICE_Init+0x5c>)
80086c8: 4809 ldr r0, [pc, #36] @ (80086f0 <MX_USB_DEVICE_Init+0x54>)
80086ca: f7fe feb5 bl 8007438 <USBD_CDC_RegisterInterface>
80086ce: 4603 mov r3, r0
80086d0: 2b00 cmp r3, #0
80086d2: d001 beq.n 80086d8 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
80086d4: f7f8 f968 bl 80009a8 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
80086d8: 4805 ldr r0, [pc, #20] @ (80086f0 <MX_USB_DEVICE_Init+0x54>)
80086da: f7fe ff8c bl 80075f6 <USBD_Start>
80086de: 4603 mov r3, r0
80086e0: 2b00 cmp r3, #0
80086e2: d001 beq.n 80086e8 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
80086e4: f7f8 f960 bl 80009a8 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
80086e8: bf00 nop
80086ea: bd80 pop {r7, pc}
80086ec: 2000012c .word 0x2000012c
80086f0: 20000348 .word 0x20000348
80086f4: 20000018 .word 0x20000018
80086f8: 2000011c .word 0x2000011c
080086fc <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
80086fc: b480 push {r7}
80086fe: b085 sub sp, #20
8008700: af00 add r7, sp, #0
8008702: 6078 str r0, [r7, #4]
8008704: 6039 str r1, [r7, #0]
while (len--) {
8008706: e01e b.n 8008746 <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
8008708: 4b14 ldr r3, [pc, #80] @ (800875c <fifo_push+0x60>)
800870a: 881b ldrh r3, [r3, #0]
800870c: b29b uxth r3, r3
800870e: 3301 adds r3, #1
8008710: b29b uxth r3, r3
8008712: b2db uxtb r3, r3
8008714: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
8008716: 89fa ldrh r2, [r7, #14]
8008718: 4b11 ldr r3, [pc, #68] @ (8008760 <fifo_push+0x64>)
800871a: 881b ldrh r3, [r3, #0]
800871c: b29b uxth r3, r3
800871e: b2db uxtb r3, r3
8008720: 429a cmp r2, r3
8008722: d103 bne.n 800872c <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
8008724: 687b ldr r3, [r7, #4]
8008726: 3301 adds r3, #1
8008728: 607b str r3, [r7, #4]
continue;
800872a: e00c b.n 8008746 <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800872c: 687b ldr r3, [r7, #4]
800872e: 1c5a adds r2, r3, #1
8008730: 607a str r2, [r7, #4]
8008732: 4a0a ldr r2, [pc, #40] @ (800875c <fifo_push+0x60>)
8008734: 8812 ldrh r2, [r2, #0]
8008736: b292 uxth r2, r2
8008738: b2d2 uxtb r2, r2
800873a: 7819 ldrb r1, [r3, #0]
800873c: 4b09 ldr r3, [pc, #36] @ (8008764 <fifo_push+0x68>)
800873e: 5499 strb r1, [r3, r2]
rx_head = next;
8008740: 4a06 ldr r2, [pc, #24] @ (800875c <fifo_push+0x60>)
8008742: 89fb ldrh r3, [r7, #14]
8008744: 8013 strh r3, [r2, #0]
while (len--) {
8008746: 683b ldr r3, [r7, #0]
8008748: 1e5a subs r2, r3, #1
800874a: 603a str r2, [r7, #0]
800874c: 2b00 cmp r3, #0
800874e: d1db bne.n 8008708 <fifo_push+0xc>
}
}
8008750: bf00 nop
8008752: bf00 nop
8008754: 3714 adds r7, #20
8008756: 46bd mov sp, r7
8008758: bc80 pop {r7}
800875a: 4770 bx lr
800875c: 20000f0c .word 0x20000f0c
8008760: 20000f0e .word 0x20000f0e
8008764: 20000e0c .word 0x20000e0c
08008768 <CDC_Available>:
uint32_t CDC_Available(void) {
8008768: b480 push {r7}
800876a: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800876c: 4b06 ldr r3, [pc, #24] @ (8008788 <CDC_Available+0x20>)
800876e: 881b ldrh r3, [r3, #0]
8008770: b29a uxth r2, r3
8008772: 4b06 ldr r3, [pc, #24] @ (800878c <CDC_Available+0x24>)
8008774: 881b ldrh r3, [r3, #0]
8008776: b29b uxth r3, r3
8008778: 1ad3 subs r3, r2, r3
800877a: b29b uxth r3, r3
800877c: b2db uxtb r3, r3
}
800877e: 4618 mov r0, r3
8008780: 46bd mov sp, r7
8008782: bc80 pop {r7}
8008784: 4770 bx lr
8008786: bf00 nop
8008788: 20000f0c .word 0x20000f0c
800878c: 20000f0e .word 0x20000f0e
08008790 <CDC_ReadByte>:
int CDC_ReadByte(void) {
8008790: b480 push {r7}
8008792: b083 sub sp, #12
8008794: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
8008796: 4b10 ldr r3, [pc, #64] @ (80087d8 <CDC_ReadByte+0x48>)
8008798: 881b ldrh r3, [r3, #0]
800879a: b29a uxth r2, r3
800879c: 4b0f ldr r3, [pc, #60] @ (80087dc <CDC_ReadByte+0x4c>)
800879e: 881b ldrh r3, [r3, #0]
80087a0: b29b uxth r3, r3
80087a2: 429a cmp r2, r3
80087a4: d102 bne.n 80087ac <CDC_ReadByte+0x1c>
80087a6: f04f 33ff mov.w r3, #4294967295
80087aa: e010 b.n 80087ce <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
80087ac: 4b0a ldr r3, [pc, #40] @ (80087d8 <CDC_ReadByte+0x48>)
80087ae: 881b ldrh r3, [r3, #0]
80087b0: b29b uxth r3, r3
80087b2: b2db uxtb r3, r3
80087b4: 4a0a ldr r2, [pc, #40] @ (80087e0 <CDC_ReadByte+0x50>)
80087b6: 5cd3 ldrb r3, [r2, r3]
80087b8: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
80087ba: 4b07 ldr r3, [pc, #28] @ (80087d8 <CDC_ReadByte+0x48>)
80087bc: 881b ldrh r3, [r3, #0]
80087be: b29b uxth r3, r3
80087c0: 3301 adds r3, #1
80087c2: b29b uxth r3, r3
80087c4: b2db uxtb r3, r3
80087c6: b29a uxth r2, r3
80087c8: 4b03 ldr r3, [pc, #12] @ (80087d8 <CDC_ReadByte+0x48>)
80087ca: 801a strh r2, [r3, #0]
return b;
80087cc: 687b ldr r3, [r7, #4]
}
80087ce: 4618 mov r0, r3
80087d0: 370c adds r7, #12
80087d2: 46bd mov sp, r7
80087d4: bc80 pop {r7}
80087d6: 4770 bx lr
80087d8: 20000f0e .word 0x20000f0e
80087dc: 20000f0c .word 0x20000f0c
80087e0: 20000e0c .word 0x20000e0c
080087e4 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
80087e4: b580 push {r7, lr}
80087e6: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
80087e8: 2200 movs r2, #0
80087ea: 4905 ldr r1, [pc, #20] @ (8008800 <CDC_Init_FS+0x1c>)
80087ec: 4805 ldr r0, [pc, #20] @ (8008804 <CDC_Init_FS+0x20>)
80087ee: f7fe fe39 bl 8007464 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
80087f2: 4905 ldr r1, [pc, #20] @ (8008808 <CDC_Init_FS+0x24>)
80087f4: 4803 ldr r0, [pc, #12] @ (8008804 <CDC_Init_FS+0x20>)
80087f6: f7fe fe4e bl 8007496 <USBD_CDC_SetRxBuffer>
return (USBD_OK);
80087fa: 2300 movs r3, #0
/* USER CODE END 3 */
}
80087fc: 4618 mov r0, r3
80087fe: bd80 pop {r7, pc}
8008800: 20000a0c .word 0x20000a0c
8008804: 20000348 .word 0x20000348
8008808: 2000060c .word 0x2000060c
0800880c <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800880c: b480 push {r7}
800880e: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
8008810: 2300 movs r3, #0
/* USER CODE END 4 */
}
8008812: 4618 mov r0, r3
8008814: 46bd mov sp, r7
8008816: bc80 pop {r7}
8008818: 4770 bx lr
...
0800881c <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800881c: b480 push {r7}
800881e: b083 sub sp, #12
8008820: af00 add r7, sp, #0
8008822: 4603 mov r3, r0
8008824: 6039 str r1, [r7, #0]
8008826: 71fb strb r3, [r7, #7]
8008828: 4613 mov r3, r2
800882a: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800882c: 79fb ldrb r3, [r7, #7]
800882e: 2b23 cmp r3, #35 @ 0x23
8008830: d84a bhi.n 80088c8 <CDC_Control_FS+0xac>
8008832: a201 add r2, pc, #4 @ (adr r2, 8008838 <CDC_Control_FS+0x1c>)
8008834: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008838: 080088c9 .word 0x080088c9
800883c: 080088c9 .word 0x080088c9
8008840: 080088c9 .word 0x080088c9
8008844: 080088c9 .word 0x080088c9
8008848: 080088c9 .word 0x080088c9
800884c: 080088c9 .word 0x080088c9
8008850: 080088c9 .word 0x080088c9
8008854: 080088c9 .word 0x080088c9
8008858: 080088c9 .word 0x080088c9
800885c: 080088c9 .word 0x080088c9
8008860: 080088c9 .word 0x080088c9
8008864: 080088c9 .word 0x080088c9
8008868: 080088c9 .word 0x080088c9
800886c: 080088c9 .word 0x080088c9
8008870: 080088c9 .word 0x080088c9
8008874: 080088c9 .word 0x080088c9
8008878: 080088c9 .word 0x080088c9
800887c: 080088c9 .word 0x080088c9
8008880: 080088c9 .word 0x080088c9
8008884: 080088c9 .word 0x080088c9
8008888: 080088c9 .word 0x080088c9
800888c: 080088c9 .word 0x080088c9
8008890: 080088c9 .word 0x080088c9
8008894: 080088c9 .word 0x080088c9
8008898: 080088c9 .word 0x080088c9
800889c: 080088c9 .word 0x080088c9
80088a0: 080088c9 .word 0x080088c9
80088a4: 080088c9 .word 0x080088c9
80088a8: 080088c9 .word 0x080088c9
80088ac: 080088c9 .word 0x080088c9
80088b0: 080088c9 .word 0x080088c9
80088b4: 080088c9 .word 0x080088c9
80088b8: 080088c9 .word 0x080088c9
80088bc: 080088c9 .word 0x080088c9
80088c0: 080088c9 .word 0x080088c9
80088c4: 080088c9 .word 0x080088c9
case CDC_SEND_BREAK:
break;
default:
break;
80088c8: bf00 nop
}
return (USBD_OK);
80088ca: 2300 movs r3, #0
/* USER CODE END 5 */
}
80088cc: 4618 mov r0, r3
80088ce: 370c adds r7, #12
80088d0: 46bd mov sp, r7
80088d2: bc80 pop {r7}
80088d4: 4770 bx lr
80088d6: bf00 nop
080088d8 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
80088d8: b580 push {r7, lr}
80088da: b082 sub sp, #8
80088dc: af00 add r7, sp, #0
80088de: 6078 str r0, [r7, #4]
80088e0: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
80088e2: 683b ldr r3, [r7, #0]
80088e4: 681b ldr r3, [r3, #0]
80088e6: 2b00 cmp r3, #0
80088e8: d005 beq.n 80088f6 <CDC_Receive_FS+0x1e>
80088ea: 683b ldr r3, [r7, #0]
80088ec: 681b ldr r3, [r3, #0]
80088ee: 4619 mov r1, r3
80088f0: 6878 ldr r0, [r7, #4]
80088f2: f7ff ff03 bl 80086fc <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
80088f6: 6879 ldr r1, [r7, #4]
80088f8: 4805 ldr r0, [pc, #20] @ (8008910 <CDC_Receive_FS+0x38>)
80088fa: f7fe fdcc bl 8007496 <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
80088fe: 4804 ldr r0, [pc, #16] @ (8008910 <CDC_Receive_FS+0x38>)
8008900: f7fe fe0b bl 800751a <USBD_CDC_ReceivePacket>
return (USBD_OK);
8008904: 2300 movs r3, #0
/* USER CODE END 6 */
}
8008906: 4618 mov r0, r3
8008908: 3708 adds r7, #8
800890a: 46bd mov sp, r7
800890c: bd80 pop {r7, pc}
800890e: bf00 nop
8008910: 20000348 .word 0x20000348
08008914 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
8008914: b580 push {r7, lr}
8008916: b084 sub sp, #16
8008918: af00 add r7, sp, #0
800891a: 6078 str r0, [r7, #4]
800891c: 460b mov r3, r1
800891e: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
8008920: 2300 movs r3, #0
8008922: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
8008924: 4b0d ldr r3, [pc, #52] @ (800895c <CDC_Transmit_FS+0x48>)
8008926: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800892a: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800892c: 68bb ldr r3, [r7, #8]
800892e: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
8008932: 2b00 cmp r3, #0
8008934: d001 beq.n 800893a <CDC_Transmit_FS+0x26>
return USBD_BUSY;
8008936: 2301 movs r3, #1
8008938: e00b b.n 8008952 <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800893a: 887b ldrh r3, [r7, #2]
800893c: 461a mov r2, r3
800893e: 6879 ldr r1, [r7, #4]
8008940: 4806 ldr r0, [pc, #24] @ (800895c <CDC_Transmit_FS+0x48>)
8008942: f7fe fd8f bl 8007464 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
8008946: 4805 ldr r0, [pc, #20] @ (800895c <CDC_Transmit_FS+0x48>)
8008948: f7fe fdb8 bl 80074bc <USBD_CDC_TransmitPacket>
800894c: 4603 mov r3, r0
800894e: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
8008950: 7bfb ldrb r3, [r7, #15]
}
8008952: 4618 mov r0, r3
8008954: 3710 adds r7, #16
8008956: 46bd mov sp, r7
8008958: bd80 pop {r7, pc}
800895a: bf00 nop
800895c: 20000348 .word 0x20000348
08008960 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008960: b480 push {r7}
8008962: b083 sub sp, #12
8008964: af00 add r7, sp, #0
8008966: 4603 mov r3, r0
8008968: 6039 str r1, [r7, #0]
800896a: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800896c: 683b ldr r3, [r7, #0]
800896e: 2212 movs r2, #18
8008970: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
8008972: 4b03 ldr r3, [pc, #12] @ (8008980 <USBD_FS_DeviceDescriptor+0x20>)
}
8008974: 4618 mov r0, r3
8008976: 370c adds r7, #12
8008978: 46bd mov sp, r7
800897a: bc80 pop {r7}
800897c: 4770 bx lr
800897e: bf00 nop
8008980: 20000148 .word 0x20000148
08008984 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008984: b480 push {r7}
8008986: b083 sub sp, #12
8008988: af00 add r7, sp, #0
800898a: 4603 mov r3, r0
800898c: 6039 str r1, [r7, #0]
800898e: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
8008990: 683b ldr r3, [r7, #0]
8008992: 2204 movs r2, #4
8008994: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
8008996: 4b03 ldr r3, [pc, #12] @ (80089a4 <USBD_FS_LangIDStrDescriptor+0x20>)
}
8008998: 4618 mov r0, r3
800899a: 370c adds r7, #12
800899c: 46bd mov sp, r7
800899e: bc80 pop {r7}
80089a0: 4770 bx lr
80089a2: bf00 nop
80089a4: 2000015c .word 0x2000015c
080089a8 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80089a8: b580 push {r7, lr}
80089aa: b082 sub sp, #8
80089ac: af00 add r7, sp, #0
80089ae: 4603 mov r3, r0
80089b0: 6039 str r1, [r7, #0]
80089b2: 71fb strb r3, [r7, #7]
if(speed == 0)
80089b4: 79fb ldrb r3, [r7, #7]
80089b6: 2b00 cmp r3, #0
80089b8: d105 bne.n 80089c6 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
80089ba: 683a ldr r2, [r7, #0]
80089bc: 4907 ldr r1, [pc, #28] @ (80089dc <USBD_FS_ProductStrDescriptor+0x34>)
80089be: 4808 ldr r0, [pc, #32] @ (80089e0 <USBD_FS_ProductStrDescriptor+0x38>)
80089c0: f7ff fd8f bl 80084e2 <USBD_GetString>
80089c4: e004 b.n 80089d0 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
80089c6: 683a ldr r2, [r7, #0]
80089c8: 4904 ldr r1, [pc, #16] @ (80089dc <USBD_FS_ProductStrDescriptor+0x34>)
80089ca: 4805 ldr r0, [pc, #20] @ (80089e0 <USBD_FS_ProductStrDescriptor+0x38>)
80089cc: f7ff fd89 bl 80084e2 <USBD_GetString>
}
return USBD_StrDesc;
80089d0: 4b02 ldr r3, [pc, #8] @ (80089dc <USBD_FS_ProductStrDescriptor+0x34>)
}
80089d2: 4618 mov r0, r3
80089d4: 3708 adds r7, #8
80089d6: 46bd mov sp, r7
80089d8: bd80 pop {r7, pc}
80089da: bf00 nop
80089dc: 20000f10 .word 0x20000f10
80089e0: 08009a58 .word 0x08009a58
080089e4 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80089e4: b580 push {r7, lr}
80089e6: b082 sub sp, #8
80089e8: af00 add r7, sp, #0
80089ea: 4603 mov r3, r0
80089ec: 6039 str r1, [r7, #0]
80089ee: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
80089f0: 683a ldr r2, [r7, #0]
80089f2: 4904 ldr r1, [pc, #16] @ (8008a04 <USBD_FS_ManufacturerStrDescriptor+0x20>)
80089f4: 4804 ldr r0, [pc, #16] @ (8008a08 <USBD_FS_ManufacturerStrDescriptor+0x24>)
80089f6: f7ff fd74 bl 80084e2 <USBD_GetString>
return USBD_StrDesc;
80089fa: 4b02 ldr r3, [pc, #8] @ (8008a04 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
80089fc: 4618 mov r0, r3
80089fe: 3708 adds r7, #8
8008a00: 46bd mov sp, r7
8008a02: bd80 pop {r7, pc}
8008a04: 20000f10 .word 0x20000f10
8008a08: 08009a70 .word 0x08009a70
08008a0c <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008a0c: b580 push {r7, lr}
8008a0e: b082 sub sp, #8
8008a10: af00 add r7, sp, #0
8008a12: 4603 mov r3, r0
8008a14: 6039 str r1, [r7, #0]
8008a16: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
8008a18: 683b ldr r3, [r7, #0]
8008a1a: 221a movs r2, #26
8008a1c: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
8008a1e: f000 f843 bl 8008aa8 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
8008a22: 4b02 ldr r3, [pc, #8] @ (8008a2c <USBD_FS_SerialStrDescriptor+0x20>)
}
8008a24: 4618 mov r0, r3
8008a26: 3708 adds r7, #8
8008a28: 46bd mov sp, r7
8008a2a: bd80 pop {r7, pc}
8008a2c: 20000160 .word 0x20000160
08008a30 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008a30: b580 push {r7, lr}
8008a32: b082 sub sp, #8
8008a34: af00 add r7, sp, #0
8008a36: 4603 mov r3, r0
8008a38: 6039 str r1, [r7, #0]
8008a3a: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
8008a3c: 79fb ldrb r3, [r7, #7]
8008a3e: 2b00 cmp r3, #0
8008a40: d105 bne.n 8008a4e <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8008a42: 683a ldr r2, [r7, #0]
8008a44: 4907 ldr r1, [pc, #28] @ (8008a64 <USBD_FS_ConfigStrDescriptor+0x34>)
8008a46: 4808 ldr r0, [pc, #32] @ (8008a68 <USBD_FS_ConfigStrDescriptor+0x38>)
8008a48: f7ff fd4b bl 80084e2 <USBD_GetString>
8008a4c: e004 b.n 8008a58 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8008a4e: 683a ldr r2, [r7, #0]
8008a50: 4904 ldr r1, [pc, #16] @ (8008a64 <USBD_FS_ConfigStrDescriptor+0x34>)
8008a52: 4805 ldr r0, [pc, #20] @ (8008a68 <USBD_FS_ConfigStrDescriptor+0x38>)
8008a54: f7ff fd45 bl 80084e2 <USBD_GetString>
}
return USBD_StrDesc;
8008a58: 4b02 ldr r3, [pc, #8] @ (8008a64 <USBD_FS_ConfigStrDescriptor+0x34>)
}
8008a5a: 4618 mov r0, r3
8008a5c: 3708 adds r7, #8
8008a5e: 46bd mov sp, r7
8008a60: bd80 pop {r7, pc}
8008a62: bf00 nop
8008a64: 20000f10 .word 0x20000f10
8008a68: 08009a84 .word 0x08009a84
08008a6c <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008a6c: b580 push {r7, lr}
8008a6e: b082 sub sp, #8
8008a70: af00 add r7, sp, #0
8008a72: 4603 mov r3, r0
8008a74: 6039 str r1, [r7, #0]
8008a76: 71fb strb r3, [r7, #7]
if(speed == 0)
8008a78: 79fb ldrb r3, [r7, #7]
8008a7a: 2b00 cmp r3, #0
8008a7c: d105 bne.n 8008a8a <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
8008a7e: 683a ldr r2, [r7, #0]
8008a80: 4907 ldr r1, [pc, #28] @ (8008aa0 <USBD_FS_InterfaceStrDescriptor+0x34>)
8008a82: 4808 ldr r0, [pc, #32] @ (8008aa4 <USBD_FS_InterfaceStrDescriptor+0x38>)
8008a84: f7ff fd2d bl 80084e2 <USBD_GetString>
8008a88: e004 b.n 8008a94 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
8008a8a: 683a ldr r2, [r7, #0]
8008a8c: 4904 ldr r1, [pc, #16] @ (8008aa0 <USBD_FS_InterfaceStrDescriptor+0x34>)
8008a8e: 4805 ldr r0, [pc, #20] @ (8008aa4 <USBD_FS_InterfaceStrDescriptor+0x38>)
8008a90: f7ff fd27 bl 80084e2 <USBD_GetString>
}
return USBD_StrDesc;
8008a94: 4b02 ldr r3, [pc, #8] @ (8008aa0 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
8008a96: 4618 mov r0, r3
8008a98: 3708 adds r7, #8
8008a9a: 46bd mov sp, r7
8008a9c: bd80 pop {r7, pc}
8008a9e: bf00 nop
8008aa0: 20000f10 .word 0x20000f10
8008aa4: 08009a90 .word 0x08009a90
08008aa8 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
8008aa8: b580 push {r7, lr}
8008aaa: b084 sub sp, #16
8008aac: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
8008aae: 4b0f ldr r3, [pc, #60] @ (8008aec <Get_SerialNum+0x44>)
8008ab0: 681b ldr r3, [r3, #0]
8008ab2: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
8008ab4: 4b0e ldr r3, [pc, #56] @ (8008af0 <Get_SerialNum+0x48>)
8008ab6: 681b ldr r3, [r3, #0]
8008ab8: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
8008aba: 4b0e ldr r3, [pc, #56] @ (8008af4 <Get_SerialNum+0x4c>)
8008abc: 681b ldr r3, [r3, #0]
8008abe: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
8008ac0: 68fa ldr r2, [r7, #12]
8008ac2: 687b ldr r3, [r7, #4]
8008ac4: 4413 add r3, r2
8008ac6: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
8008ac8: 68fb ldr r3, [r7, #12]
8008aca: 2b00 cmp r3, #0
8008acc: d009 beq.n 8008ae2 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
8008ace: 2208 movs r2, #8
8008ad0: 4909 ldr r1, [pc, #36] @ (8008af8 <Get_SerialNum+0x50>)
8008ad2: 68f8 ldr r0, [r7, #12]
8008ad4: f000 f814 bl 8008b00 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
8008ad8: 2204 movs r2, #4
8008ada: 4908 ldr r1, [pc, #32] @ (8008afc <Get_SerialNum+0x54>)
8008adc: 68b8 ldr r0, [r7, #8]
8008ade: f000 f80f bl 8008b00 <IntToUnicode>
}
}
8008ae2: bf00 nop
8008ae4: 3710 adds r7, #16
8008ae6: 46bd mov sp, r7
8008ae8: bd80 pop {r7, pc}
8008aea: bf00 nop
8008aec: 1ffff7e8 .word 0x1ffff7e8
8008af0: 1ffff7ec .word 0x1ffff7ec
8008af4: 1ffff7f0 .word 0x1ffff7f0
8008af8: 20000162 .word 0x20000162
8008afc: 20000172 .word 0x20000172
08008b00 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
8008b00: b480 push {r7}
8008b02: b087 sub sp, #28
8008b04: af00 add r7, sp, #0
8008b06: 60f8 str r0, [r7, #12]
8008b08: 60b9 str r1, [r7, #8]
8008b0a: 4613 mov r3, r2
8008b0c: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
8008b0e: 2300 movs r3, #0
8008b10: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
8008b12: 2300 movs r3, #0
8008b14: 75fb strb r3, [r7, #23]
8008b16: e027 b.n 8008b68 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
8008b18: 68fb ldr r3, [r7, #12]
8008b1a: 0f1b lsrs r3, r3, #28
8008b1c: 2b09 cmp r3, #9
8008b1e: d80b bhi.n 8008b38 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
8008b20: 68fb ldr r3, [r7, #12]
8008b22: 0f1b lsrs r3, r3, #28
8008b24: b2da uxtb r2, r3
8008b26: 7dfb ldrb r3, [r7, #23]
8008b28: 005b lsls r3, r3, #1
8008b2a: 4619 mov r1, r3
8008b2c: 68bb ldr r3, [r7, #8]
8008b2e: 440b add r3, r1
8008b30: 3230 adds r2, #48 @ 0x30
8008b32: b2d2 uxtb r2, r2
8008b34: 701a strb r2, [r3, #0]
8008b36: e00a b.n 8008b4e <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
8008b38: 68fb ldr r3, [r7, #12]
8008b3a: 0f1b lsrs r3, r3, #28
8008b3c: b2da uxtb r2, r3
8008b3e: 7dfb ldrb r3, [r7, #23]
8008b40: 005b lsls r3, r3, #1
8008b42: 4619 mov r1, r3
8008b44: 68bb ldr r3, [r7, #8]
8008b46: 440b add r3, r1
8008b48: 3237 adds r2, #55 @ 0x37
8008b4a: b2d2 uxtb r2, r2
8008b4c: 701a strb r2, [r3, #0]
}
value = value << 4;
8008b4e: 68fb ldr r3, [r7, #12]
8008b50: 011b lsls r3, r3, #4
8008b52: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
8008b54: 7dfb ldrb r3, [r7, #23]
8008b56: 005b lsls r3, r3, #1
8008b58: 3301 adds r3, #1
8008b5a: 68ba ldr r2, [r7, #8]
8008b5c: 4413 add r3, r2
8008b5e: 2200 movs r2, #0
8008b60: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
8008b62: 7dfb ldrb r3, [r7, #23]
8008b64: 3301 adds r3, #1
8008b66: 75fb strb r3, [r7, #23]
8008b68: 7dfa ldrb r2, [r7, #23]
8008b6a: 79fb ldrb r3, [r7, #7]
8008b6c: 429a cmp r2, r3
8008b6e: d3d3 bcc.n 8008b18 <IntToUnicode+0x18>
}
}
8008b70: bf00 nop
8008b72: bf00 nop
8008b74: 371c adds r7, #28
8008b76: 46bd mov sp, r7
8008b78: bc80 pop {r7}
8008b7a: 4770 bx lr
08008b7c <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
8008b7c: b580 push {r7, lr}
8008b7e: b084 sub sp, #16
8008b80: af00 add r7, sp, #0
8008b82: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
8008b84: 687b ldr r3, [r7, #4]
8008b86: 681b ldr r3, [r3, #0]
8008b88: 4a0d ldr r2, [pc, #52] @ (8008bc0 <HAL_PCD_MspInit+0x44>)
8008b8a: 4293 cmp r3, r2
8008b8c: d113 bne.n 8008bb6 <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
8008b8e: 4b0d ldr r3, [pc, #52] @ (8008bc4 <HAL_PCD_MspInit+0x48>)
8008b90: 69db ldr r3, [r3, #28]
8008b92: 4a0c ldr r2, [pc, #48] @ (8008bc4 <HAL_PCD_MspInit+0x48>)
8008b94: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
8008b98: 61d3 str r3, [r2, #28]
8008b9a: 4b0a ldr r3, [pc, #40] @ (8008bc4 <HAL_PCD_MspInit+0x48>)
8008b9c: 69db ldr r3, [r3, #28]
8008b9e: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8008ba2: 60fb str r3, [r7, #12]
8008ba4: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
8008ba6: 2200 movs r2, #0
8008ba8: 2100 movs r1, #0
8008baa: 2014 movs r0, #20
8008bac: f7f8 fc59 bl 8001462 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
8008bb0: 2014 movs r0, #20
8008bb2: f7f8 fc72 bl 800149a <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
8008bb6: bf00 nop
8008bb8: 3710 adds r7, #16
8008bba: 46bd mov sp, r7
8008bbc: bd80 pop {r7, pc}
8008bbe: bf00 nop
8008bc0: 40005c00 .word 0x40005c00
8008bc4: 40021000 .word 0x40021000
08008bc8 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008bc8: b580 push {r7, lr}
8008bca: b082 sub sp, #8
8008bcc: af00 add r7, sp, #0
8008bce: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
8008bd0: 687b ldr r3, [r7, #4]
8008bd2: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8008bd6: 687b ldr r3, [r7, #4]
8008bd8: f503 7326 add.w r3, r3, #664 @ 0x298
8008bdc: 4619 mov r1, r3
8008bde: 4610 mov r0, r2
8008be0: f7fe fd51 bl 8007686 <USBD_LL_SetupStage>
}
8008be4: bf00 nop
8008be6: 3708 adds r7, #8
8008be8: 46bd mov sp, r7
8008bea: bd80 pop {r7, pc}
08008bec <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008bec: b580 push {r7, lr}
8008bee: b082 sub sp, #8
8008bf0: af00 add r7, sp, #0
8008bf2: 6078 str r0, [r7, #4]
8008bf4: 460b mov r3, r1
8008bf6: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
8008bf8: 687b ldr r3, [r7, #4]
8008bfa: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
8008bfe: 78fa ldrb r2, [r7, #3]
8008c00: 6879 ldr r1, [r7, #4]
8008c02: 4613 mov r3, r2
8008c04: 009b lsls r3, r3, #2
8008c06: 4413 add r3, r2
8008c08: 00db lsls r3, r3, #3
8008c0a: 440b add r3, r1
8008c0c: f503 73b2 add.w r3, r3, #356 @ 0x164
8008c10: 681a ldr r2, [r3, #0]
8008c12: 78fb ldrb r3, [r7, #3]
8008c14: 4619 mov r1, r3
8008c16: f7fe fd83 bl 8007720 <USBD_LL_DataOutStage>
}
8008c1a: bf00 nop
8008c1c: 3708 adds r7, #8
8008c1e: 46bd mov sp, r7
8008c20: bd80 pop {r7, pc}
08008c22 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008c22: b580 push {r7, lr}
8008c24: b082 sub sp, #8
8008c26: af00 add r7, sp, #0
8008c28: 6078 str r0, [r7, #4]
8008c2a: 460b mov r3, r1
8008c2c: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
8008c2e: 687b ldr r3, [r7, #4]
8008c30: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
8008c34: 78fa ldrb r2, [r7, #3]
8008c36: 6879 ldr r1, [r7, #4]
8008c38: 4613 mov r3, r2
8008c3a: 009b lsls r3, r3, #2
8008c3c: 4413 add r3, r2
8008c3e: 00db lsls r3, r3, #3
8008c40: 440b add r3, r1
8008c42: 3324 adds r3, #36 @ 0x24
8008c44: 681a ldr r2, [r3, #0]
8008c46: 78fb ldrb r3, [r7, #3]
8008c48: 4619 mov r1, r3
8008c4a: f7fe fdda bl 8007802 <USBD_LL_DataInStage>
}
8008c4e: bf00 nop
8008c50: 3708 adds r7, #8
8008c52: 46bd mov sp, r7
8008c54: bd80 pop {r7, pc}
08008c56 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008c56: b580 push {r7, lr}
8008c58: b082 sub sp, #8
8008c5a: af00 add r7, sp, #0
8008c5c: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
8008c5e: 687b ldr r3, [r7, #4]
8008c60: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008c64: 4618 mov r0, r3
8008c66: f7fe feea bl 8007a3e <USBD_LL_SOF>
}
8008c6a: bf00 nop
8008c6c: 3708 adds r7, #8
8008c6e: 46bd mov sp, r7
8008c70: bd80 pop {r7, pc}
08008c72 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008c72: b580 push {r7, lr}
8008c74: b084 sub sp, #16
8008c76: af00 add r7, sp, #0
8008c78: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
8008c7a: 2301 movs r3, #1
8008c7c: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
8008c7e: 687b ldr r3, [r7, #4]
8008c80: 799b ldrb r3, [r3, #6]
8008c82: 2b02 cmp r3, #2
8008c84: d001 beq.n 8008c8a <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
8008c86: f7f7 fe8f bl 80009a8 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
8008c8a: 687b ldr r3, [r7, #4]
8008c8c: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008c90: 7bfa ldrb r2, [r7, #15]
8008c92: 4611 mov r1, r2
8008c94: 4618 mov r0, r3
8008c96: f7fe fe9a bl 80079ce <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
8008c9a: 687b ldr r3, [r7, #4]
8008c9c: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008ca0: 4618 mov r0, r3
8008ca2: f7fe fe53 bl 800794c <USBD_LL_Reset>
}
8008ca6: bf00 nop
8008ca8: 3710 adds r7, #16
8008caa: 46bd mov sp, r7
8008cac: bd80 pop {r7, pc}
...
08008cb0 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008cb0: b580 push {r7, lr}
8008cb2: b082 sub sp, #8
8008cb4: af00 add r7, sp, #0
8008cb6: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
8008cb8: 687b ldr r3, [r7, #4]
8008cba: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008cbe: 4618 mov r0, r3
8008cc0: f7fe fe94 bl 80079ec <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
8008cc4: 687b ldr r3, [r7, #4]
8008cc6: 7a9b ldrb r3, [r3, #10]
8008cc8: 2b00 cmp r3, #0
8008cca: d005 beq.n 8008cd8 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8008ccc: 4b04 ldr r3, [pc, #16] @ (8008ce0 <HAL_PCD_SuspendCallback+0x30>)
8008cce: 691b ldr r3, [r3, #16]
8008cd0: 4a03 ldr r2, [pc, #12] @ (8008ce0 <HAL_PCD_SuspendCallback+0x30>)
8008cd2: f043 0306 orr.w r3, r3, #6
8008cd6: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
8008cd8: bf00 nop
8008cda: 3708 adds r7, #8
8008cdc: 46bd mov sp, r7
8008cde: bd80 pop {r7, pc}
8008ce0: e000ed00 .word 0xe000ed00
08008ce4 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008ce4: b580 push {r7, lr}
8008ce6: b082 sub sp, #8
8008ce8: af00 add r7, sp, #0
8008cea: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
8008cec: 687b ldr r3, [r7, #4]
8008cee: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008cf2: 4618 mov r0, r3
8008cf4: f7fe fe8e bl 8007a14 <USBD_LL_Resume>
}
8008cf8: bf00 nop
8008cfa: 3708 adds r7, #8
8008cfc: 46bd mov sp, r7
8008cfe: bd80 pop {r7, pc}
08008d00 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
8008d00: b580 push {r7, lr}
8008d02: b082 sub sp, #8
8008d04: af00 add r7, sp, #0
8008d06: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
8008d08: 4a28 ldr r2, [pc, #160] @ (8008dac <USBD_LL_Init+0xac>)
8008d0a: 687b ldr r3, [r7, #4]
8008d0c: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
8008d10: 687b ldr r3, [r7, #4]
8008d12: 4a26 ldr r2, [pc, #152] @ (8008dac <USBD_LL_Init+0xac>)
8008d14: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
8008d18: 4b24 ldr r3, [pc, #144] @ (8008dac <USBD_LL_Init+0xac>)
8008d1a: 4a25 ldr r2, [pc, #148] @ (8008db0 <USBD_LL_Init+0xb0>)
8008d1c: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
8008d1e: 4b23 ldr r3, [pc, #140] @ (8008dac <USBD_LL_Init+0xac>)
8008d20: 2208 movs r2, #8
8008d22: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
8008d24: 4b21 ldr r3, [pc, #132] @ (8008dac <USBD_LL_Init+0xac>)
8008d26: 2202 movs r2, #2
8008d28: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
8008d2a: 4b20 ldr r3, [pc, #128] @ (8008dac <USBD_LL_Init+0xac>)
8008d2c: 2200 movs r2, #0
8008d2e: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
8008d30: 4b1e ldr r3, [pc, #120] @ (8008dac <USBD_LL_Init+0xac>)
8008d32: 2200 movs r2, #0
8008d34: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
8008d36: 4b1d ldr r3, [pc, #116] @ (8008dac <USBD_LL_Init+0xac>)
8008d38: 2200 movs r2, #0
8008d3a: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
8008d3c: 481b ldr r0, [pc, #108] @ (8008dac <USBD_LL_Init+0xac>)
8008d3e: f7f8 fd82 bl 8001846 <HAL_PCD_Init>
8008d42: 4603 mov r3, r0
8008d44: 2b00 cmp r3, #0
8008d46: d001 beq.n 8008d4c <USBD_LL_Init+0x4c>
{
Error_Handler( );
8008d48: f7f7 fe2e bl 80009a8 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
8008d4c: 687b ldr r3, [r7, #4]
8008d4e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008d52: 2318 movs r3, #24
8008d54: 2200 movs r2, #0
8008d56: 2100 movs r1, #0
8008d58: f7fa fa93 bl 8003282 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
8008d5c: 687b ldr r3, [r7, #4]
8008d5e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008d62: 2358 movs r3, #88 @ 0x58
8008d64: 2200 movs r2, #0
8008d66: 2180 movs r1, #128 @ 0x80
8008d68: f7fa fa8b bl 8003282 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
8008d6c: 687b ldr r3, [r7, #4]
8008d6e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008d72: 23c0 movs r3, #192 @ 0xc0
8008d74: 2200 movs r2, #0
8008d76: 2181 movs r1, #129 @ 0x81
8008d78: f7fa fa83 bl 8003282 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
8008d7c: 687b ldr r3, [r7, #4]
8008d7e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008d82: f44f 7388 mov.w r3, #272 @ 0x110
8008d86: 2200 movs r2, #0
8008d88: 2101 movs r1, #1
8008d8a: f7fa fa7a bl 8003282 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
8008d8e: 687b ldr r3, [r7, #4]
8008d90: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008d94: f44f 7380 mov.w r3, #256 @ 0x100
8008d98: 2200 movs r2, #0
8008d9a: 2182 movs r1, #130 @ 0x82
8008d9c: f7fa fa71 bl 8003282 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
8008da0: 2300 movs r3, #0
}
8008da2: 4618 mov r0, r3
8008da4: 3708 adds r7, #8
8008da6: 46bd mov sp, r7
8008da8: bd80 pop {r7, pc}
8008daa: bf00 nop
8008dac: 20001110 .word 0x20001110
8008db0: 40005c00 .word 0x40005c00
08008db4 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
8008db4: b580 push {r7, lr}
8008db6: b084 sub sp, #16
8008db8: af00 add r7, sp, #0
8008dba: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8008dbc: 2300 movs r3, #0
8008dbe: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008dc0: 2300 movs r3, #0
8008dc2: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
8008dc4: 687b ldr r3, [r7, #4]
8008dc6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008dca: 4618 mov r0, r3
8008dcc: f7f8 fe31 bl 8001a32 <HAL_PCD_Start>
8008dd0: 4603 mov r3, r0
8008dd2: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008dd4: 7bfb ldrb r3, [r7, #15]
8008dd6: 4618 mov r0, r3
8008dd8: f000 f94e bl 8009078 <USBD_Get_USB_Status>
8008ddc: 4603 mov r3, r0
8008dde: 73bb strb r3, [r7, #14]
return usb_status;
8008de0: 7bbb ldrb r3, [r7, #14]
}
8008de2: 4618 mov r0, r3
8008de4: 3710 adds r7, #16
8008de6: 46bd mov sp, r7
8008de8: bd80 pop {r7, pc}
08008dea <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
8008dea: b580 push {r7, lr}
8008dec: b084 sub sp, #16
8008dee: af00 add r7, sp, #0
8008df0: 6078 str r0, [r7, #4]
8008df2: 4608 mov r0, r1
8008df4: 4611 mov r1, r2
8008df6: 461a mov r2, r3
8008df8: 4603 mov r3, r0
8008dfa: 70fb strb r3, [r7, #3]
8008dfc: 460b mov r3, r1
8008dfe: 70bb strb r3, [r7, #2]
8008e00: 4613 mov r3, r2
8008e02: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
8008e04: 2300 movs r3, #0
8008e06: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008e08: 2300 movs r3, #0
8008e0a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
8008e0c: 687b ldr r3, [r7, #4]
8008e0e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008e12: 78bb ldrb r3, [r7, #2]
8008e14: 883a ldrh r2, [r7, #0]
8008e16: 78f9 ldrb r1, [r7, #3]
8008e18: f7f8 ff85 bl 8001d26 <HAL_PCD_EP_Open>
8008e1c: 4603 mov r3, r0
8008e1e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008e20: 7bfb ldrb r3, [r7, #15]
8008e22: 4618 mov r0, r3
8008e24: f000 f928 bl 8009078 <USBD_Get_USB_Status>
8008e28: 4603 mov r3, r0
8008e2a: 73bb strb r3, [r7, #14]
return usb_status;
8008e2c: 7bbb ldrb r3, [r7, #14]
}
8008e2e: 4618 mov r0, r3
8008e30: 3710 adds r7, #16
8008e32: 46bd mov sp, r7
8008e34: bd80 pop {r7, pc}
08008e36 <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008e36: b580 push {r7, lr}
8008e38: b084 sub sp, #16
8008e3a: af00 add r7, sp, #0
8008e3c: 6078 str r0, [r7, #4]
8008e3e: 460b mov r3, r1
8008e40: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008e42: 2300 movs r3, #0
8008e44: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008e46: 2300 movs r3, #0
8008e48: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
8008e4a: 687b ldr r3, [r7, #4]
8008e4c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008e50: 78fa ldrb r2, [r7, #3]
8008e52: 4611 mov r1, r2
8008e54: 4618 mov r0, r3
8008e56: f7f8 ffc3 bl 8001de0 <HAL_PCD_EP_Close>
8008e5a: 4603 mov r3, r0
8008e5c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008e5e: 7bfb ldrb r3, [r7, #15]
8008e60: 4618 mov r0, r3
8008e62: f000 f909 bl 8009078 <USBD_Get_USB_Status>
8008e66: 4603 mov r3, r0
8008e68: 73bb strb r3, [r7, #14]
return usb_status;
8008e6a: 7bbb ldrb r3, [r7, #14]
}
8008e6c: 4618 mov r0, r3
8008e6e: 3710 adds r7, #16
8008e70: 46bd mov sp, r7
8008e72: bd80 pop {r7, pc}
08008e74 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008e74: b580 push {r7, lr}
8008e76: b084 sub sp, #16
8008e78: af00 add r7, sp, #0
8008e7a: 6078 str r0, [r7, #4]
8008e7c: 460b mov r3, r1
8008e7e: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008e80: 2300 movs r3, #0
8008e82: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008e84: 2300 movs r3, #0
8008e86: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
8008e88: 687b ldr r3, [r7, #4]
8008e8a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008e8e: 78fa ldrb r2, [r7, #3]
8008e90: 4611 mov r1, r2
8008e92: 4618 mov r0, r3
8008e94: f7f9 f86b bl 8001f6e <HAL_PCD_EP_SetStall>
8008e98: 4603 mov r3, r0
8008e9a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008e9c: 7bfb ldrb r3, [r7, #15]
8008e9e: 4618 mov r0, r3
8008ea0: f000 f8ea bl 8009078 <USBD_Get_USB_Status>
8008ea4: 4603 mov r3, r0
8008ea6: 73bb strb r3, [r7, #14]
return usb_status;
8008ea8: 7bbb ldrb r3, [r7, #14]
}
8008eaa: 4618 mov r0, r3
8008eac: 3710 adds r7, #16
8008eae: 46bd mov sp, r7
8008eb0: bd80 pop {r7, pc}
08008eb2 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008eb2: b580 push {r7, lr}
8008eb4: b084 sub sp, #16
8008eb6: af00 add r7, sp, #0
8008eb8: 6078 str r0, [r7, #4]
8008eba: 460b mov r3, r1
8008ebc: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008ebe: 2300 movs r3, #0
8008ec0: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008ec2: 2300 movs r3, #0
8008ec4: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
8008ec6: 687b ldr r3, [r7, #4]
8008ec8: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008ecc: 78fa ldrb r2, [r7, #3]
8008ece: 4611 mov r1, r2
8008ed0: 4618 mov r0, r3
8008ed2: f7f9 f8ac bl 800202e <HAL_PCD_EP_ClrStall>
8008ed6: 4603 mov r3, r0
8008ed8: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008eda: 7bfb ldrb r3, [r7, #15]
8008edc: 4618 mov r0, r3
8008ede: f000 f8cb bl 8009078 <USBD_Get_USB_Status>
8008ee2: 4603 mov r3, r0
8008ee4: 73bb strb r3, [r7, #14]
return usb_status;
8008ee6: 7bbb ldrb r3, [r7, #14]
}
8008ee8: 4618 mov r0, r3
8008eea: 3710 adds r7, #16
8008eec: 46bd mov sp, r7
8008eee: bd80 pop {r7, pc}
08008ef0 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008ef0: b480 push {r7}
8008ef2: b085 sub sp, #20
8008ef4: af00 add r7, sp, #0
8008ef6: 6078 str r0, [r7, #4]
8008ef8: 460b mov r3, r1
8008efa: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
8008efc: 687b ldr r3, [r7, #4]
8008efe: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008f02: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
8008f04: f997 3003 ldrsb.w r3, [r7, #3]
8008f08: 2b00 cmp r3, #0
8008f0a: da0b bge.n 8008f24 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
8008f0c: 78fb ldrb r3, [r7, #3]
8008f0e: f003 027f and.w r2, r3, #127 @ 0x7f
8008f12: 68f9 ldr r1, [r7, #12]
8008f14: 4613 mov r3, r2
8008f16: 009b lsls r3, r3, #2
8008f18: 4413 add r3, r2
8008f1a: 00db lsls r3, r3, #3
8008f1c: 440b add r3, r1
8008f1e: 3312 adds r3, #18
8008f20: 781b ldrb r3, [r3, #0]
8008f22: e00b b.n 8008f3c <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
8008f24: 78fb ldrb r3, [r7, #3]
8008f26: f003 027f and.w r2, r3, #127 @ 0x7f
8008f2a: 68f9 ldr r1, [r7, #12]
8008f2c: 4613 mov r3, r2
8008f2e: 009b lsls r3, r3, #2
8008f30: 4413 add r3, r2
8008f32: 00db lsls r3, r3, #3
8008f34: 440b add r3, r1
8008f36: f503 73a9 add.w r3, r3, #338 @ 0x152
8008f3a: 781b ldrb r3, [r3, #0]
}
}
8008f3c: 4618 mov r0, r3
8008f3e: 3714 adds r7, #20
8008f40: 46bd mov sp, r7
8008f42: bc80 pop {r7}
8008f44: 4770 bx lr
08008f46 <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
8008f46: b580 push {r7, lr}
8008f48: b084 sub sp, #16
8008f4a: af00 add r7, sp, #0
8008f4c: 6078 str r0, [r7, #4]
8008f4e: 460b mov r3, r1
8008f50: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008f52: 2300 movs r3, #0
8008f54: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008f56: 2300 movs r3, #0
8008f58: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
8008f5a: 687b ldr r3, [r7, #4]
8008f5c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008f60: 78fa ldrb r2, [r7, #3]
8008f62: 4611 mov r1, r2
8008f64: 4618 mov r0, r3
8008f66: f7f8 feba bl 8001cde <HAL_PCD_SetAddress>
8008f6a: 4603 mov r3, r0
8008f6c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008f6e: 7bfb ldrb r3, [r7, #15]
8008f70: 4618 mov r0, r3
8008f72: f000 f881 bl 8009078 <USBD_Get_USB_Status>
8008f76: 4603 mov r3, r0
8008f78: 73bb strb r3, [r7, #14]
return usb_status;
8008f7a: 7bbb ldrb r3, [r7, #14]
}
8008f7c: 4618 mov r0, r3
8008f7e: 3710 adds r7, #16
8008f80: 46bd mov sp, r7
8008f82: bd80 pop {r7, pc}
08008f84 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
8008f84: b580 push {r7, lr}
8008f86: b086 sub sp, #24
8008f88: af00 add r7, sp, #0
8008f8a: 60f8 str r0, [r7, #12]
8008f8c: 607a str r2, [r7, #4]
8008f8e: 461a mov r2, r3
8008f90: 460b mov r3, r1
8008f92: 72fb strb r3, [r7, #11]
8008f94: 4613 mov r3, r2
8008f96: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8008f98: 2300 movs r3, #0
8008f9a: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8008f9c: 2300 movs r3, #0
8008f9e: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
8008fa0: 68fb ldr r3, [r7, #12]
8008fa2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008fa6: 893b ldrh r3, [r7, #8]
8008fa8: 7af9 ldrb r1, [r7, #11]
8008faa: 687a ldr r2, [r7, #4]
8008fac: f7f8 ffa8 bl 8001f00 <HAL_PCD_EP_Transmit>
8008fb0: 4603 mov r3, r0
8008fb2: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8008fb4: 7dfb ldrb r3, [r7, #23]
8008fb6: 4618 mov r0, r3
8008fb8: f000 f85e bl 8009078 <USBD_Get_USB_Status>
8008fbc: 4603 mov r3, r0
8008fbe: 75bb strb r3, [r7, #22]
return usb_status;
8008fc0: 7dbb ldrb r3, [r7, #22]
}
8008fc2: 4618 mov r0, r3
8008fc4: 3718 adds r7, #24
8008fc6: 46bd mov sp, r7
8008fc8: bd80 pop {r7, pc}
08008fca <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
8008fca: b580 push {r7, lr}
8008fcc: b086 sub sp, #24
8008fce: af00 add r7, sp, #0
8008fd0: 60f8 str r0, [r7, #12]
8008fd2: 607a str r2, [r7, #4]
8008fd4: 461a mov r2, r3
8008fd6: 460b mov r3, r1
8008fd8: 72fb strb r3, [r7, #11]
8008fda: 4613 mov r3, r2
8008fdc: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8008fde: 2300 movs r3, #0
8008fe0: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8008fe2: 2300 movs r3, #0
8008fe4: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
8008fe6: 68fb ldr r3, [r7, #12]
8008fe8: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008fec: 893b ldrh r3, [r7, #8]
8008fee: 7af9 ldrb r1, [r7, #11]
8008ff0: 687a ldr r2, [r7, #4]
8008ff2: f7f8 ff3d bl 8001e70 <HAL_PCD_EP_Receive>
8008ff6: 4603 mov r3, r0
8008ff8: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8008ffa: 7dfb ldrb r3, [r7, #23]
8008ffc: 4618 mov r0, r3
8008ffe: f000 f83b bl 8009078 <USBD_Get_USB_Status>
8009002: 4603 mov r3, r0
8009004: 75bb strb r3, [r7, #22]
return usb_status;
8009006: 7dbb ldrb r3, [r7, #22]
}
8009008: 4618 mov r0, r3
800900a: 3718 adds r7, #24
800900c: 46bd mov sp, r7
800900e: bd80 pop {r7, pc}
08009010 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8009010: b580 push {r7, lr}
8009012: b082 sub sp, #8
8009014: af00 add r7, sp, #0
8009016: 6078 str r0, [r7, #4]
8009018: 460b mov r3, r1
800901a: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800901c: 687b ldr r3, [r7, #4]
800901e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8009022: 78fa ldrb r2, [r7, #3]
8009024: 4611 mov r1, r2
8009026: 4618 mov r0, r3
8009028: f7f8 ff53 bl 8001ed2 <HAL_PCD_EP_GetRxCount>
800902c: 4603 mov r3, r0
}
800902e: 4618 mov r0, r3
8009030: 3708 adds r7, #8
8009032: 46bd mov sp, r7
8009034: bd80 pop {r7, pc}
...
08009038 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
8009038: b480 push {r7}
800903a: b083 sub sp, #12
800903c: af00 add r7, sp, #0
800903e: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
8009040: 4b02 ldr r3, [pc, #8] @ (800904c <USBD_static_malloc+0x14>)
}
8009042: 4618 mov r0, r3
8009044: 370c adds r7, #12
8009046: 46bd mov sp, r7
8009048: bc80 pop {r7}
800904a: 4770 bx lr
800904c: 200013e8 .word 0x200013e8
08009050 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
8009050: b480 push {r7}
8009052: b083 sub sp, #12
8009054: af00 add r7, sp, #0
8009056: 6078 str r0, [r7, #4]
}
8009058: bf00 nop
800905a: 370c adds r7, #12
800905c: 46bd mov sp, r7
800905e: bc80 pop {r7}
8009060: 4770 bx lr
08009062 <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8009062: b480 push {r7}
8009064: b083 sub sp, #12
8009066: af00 add r7, sp, #0
8009068: 6078 str r0, [r7, #4]
800906a: 460b mov r3, r1
800906c: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800906e: bf00 nop
8009070: 370c adds r7, #12
8009072: 46bd mov sp, r7
8009074: bc80 pop {r7}
8009076: 4770 bx lr
08009078 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
8009078: b480 push {r7}
800907a: b085 sub sp, #20
800907c: af00 add r7, sp, #0
800907e: 4603 mov r3, r0
8009080: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
8009082: 2300 movs r3, #0
8009084: 73fb strb r3, [r7, #15]
switch (hal_status)
8009086: 79fb ldrb r3, [r7, #7]
8009088: 2b03 cmp r3, #3
800908a: d817 bhi.n 80090bc <USBD_Get_USB_Status+0x44>
800908c: a201 add r2, pc, #4 @ (adr r2, 8009094 <USBD_Get_USB_Status+0x1c>)
800908e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009092: bf00 nop
8009094: 080090a5 .word 0x080090a5
8009098: 080090ab .word 0x080090ab
800909c: 080090b1 .word 0x080090b1
80090a0: 080090b7 .word 0x080090b7
{
case HAL_OK :
usb_status = USBD_OK;
80090a4: 2300 movs r3, #0
80090a6: 73fb strb r3, [r7, #15]
break;
80090a8: e00b b.n 80090c2 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
80090aa: 2302 movs r3, #2
80090ac: 73fb strb r3, [r7, #15]
break;
80090ae: e008 b.n 80090c2 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
80090b0: 2301 movs r3, #1
80090b2: 73fb strb r3, [r7, #15]
break;
80090b4: e005 b.n 80090c2 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
80090b6: 2302 movs r3, #2
80090b8: 73fb strb r3, [r7, #15]
break;
80090ba: e002 b.n 80090c2 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
80090bc: 2302 movs r3, #2
80090be: 73fb strb r3, [r7, #15]
break;
80090c0: bf00 nop
}
return usb_status;
80090c2: 7bfb ldrb r3, [r7, #15]
}
80090c4: 4618 mov r0, r3
80090c6: 3714 adds r7, #20
80090c8: 46bd mov sp, r7
80090ca: bc80 pop {r7}
80090cc: 4770 bx lr
80090ce: bf00 nop
080090d0 <siprintf>:
80090d0: b40e push {r1, r2, r3}
80090d2: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
80090d6: b510 push {r4, lr}
80090d8: 2400 movs r4, #0
80090da: b09d sub sp, #116 @ 0x74
80090dc: ab1f add r3, sp, #124 @ 0x7c
80090de: 9002 str r0, [sp, #8]
80090e0: 9006 str r0, [sp, #24]
80090e2: 9107 str r1, [sp, #28]
80090e4: 9104 str r1, [sp, #16]
80090e6: 4809 ldr r0, [pc, #36] @ (800910c <siprintf+0x3c>)
80090e8: 4909 ldr r1, [pc, #36] @ (8009110 <siprintf+0x40>)
80090ea: f853 2b04 ldr.w r2, [r3], #4
80090ee: 9105 str r1, [sp, #20]
80090f0: 6800 ldr r0, [r0, #0]
80090f2: a902 add r1, sp, #8
80090f4: 9301 str r3, [sp, #4]
80090f6: 941b str r4, [sp, #108] @ 0x6c
80090f8: f000 f992 bl 8009420 <_svfiprintf_r>
80090fc: 9b02 ldr r3, [sp, #8]
80090fe: 701c strb r4, [r3, #0]
8009100: b01d add sp, #116 @ 0x74
8009102: e8bd 4010 ldmia.w sp!, {r4, lr}
8009106: b003 add sp, #12
8009108: 4770 bx lr
800910a: bf00 nop
800910c: 2000017c .word 0x2000017c
8009110: ffff0208 .word 0xffff0208
08009114 <memset>:
8009114: 4603 mov r3, r0
8009116: 4402 add r2, r0
8009118: 4293 cmp r3, r2
800911a: d100 bne.n 800911e <memset+0xa>
800911c: 4770 bx lr
800911e: f803 1b01 strb.w r1, [r3], #1
8009122: e7f9 b.n 8009118 <memset+0x4>
08009124 <__errno>:
8009124: 4b01 ldr r3, [pc, #4] @ (800912c <__errno+0x8>)
8009126: 6818 ldr r0, [r3, #0]
8009128: 4770 bx lr
800912a: bf00 nop
800912c: 2000017c .word 0x2000017c
08009130 <__libc_init_array>:
8009130: b570 push {r4, r5, r6, lr}
8009132: 2600 movs r6, #0
8009134: 4d0c ldr r5, [pc, #48] @ (8009168 <__libc_init_array+0x38>)
8009136: 4c0d ldr r4, [pc, #52] @ (800916c <__libc_init_array+0x3c>)
8009138: 1b64 subs r4, r4, r5
800913a: 10a4 asrs r4, r4, #2
800913c: 42a6 cmp r6, r4
800913e: d109 bne.n 8009154 <__libc_init_array+0x24>
8009140: f000 fc76 bl 8009a30 <_init>
8009144: 2600 movs r6, #0
8009146: 4d0a ldr r5, [pc, #40] @ (8009170 <__libc_init_array+0x40>)
8009148: 4c0a ldr r4, [pc, #40] @ (8009174 <__libc_init_array+0x44>)
800914a: 1b64 subs r4, r4, r5
800914c: 10a4 asrs r4, r4, #2
800914e: 42a6 cmp r6, r4
8009150: d105 bne.n 800915e <__libc_init_array+0x2e>
8009152: bd70 pop {r4, r5, r6, pc}
8009154: f855 3b04 ldr.w r3, [r5], #4
8009158: 4798 blx r3
800915a: 3601 adds r6, #1
800915c: e7ee b.n 800913c <__libc_init_array+0xc>
800915e: f855 3b04 ldr.w r3, [r5], #4
8009162: 4798 blx r3
8009164: 3601 adds r6, #1
8009166: e7f2 b.n 800914e <__libc_init_array+0x1e>
8009168: 08009af8 .word 0x08009af8
800916c: 08009af8 .word 0x08009af8
8009170: 08009af8 .word 0x08009af8
8009174: 08009afc .word 0x08009afc
08009178 <__retarget_lock_acquire_recursive>:
8009178: 4770 bx lr
0800917a <__retarget_lock_release_recursive>:
800917a: 4770 bx lr
0800917c <_free_r>:
800917c: b538 push {r3, r4, r5, lr}
800917e: 4605 mov r5, r0
8009180: 2900 cmp r1, #0
8009182: d040 beq.n 8009206 <_free_r+0x8a>
8009184: f851 3c04 ldr.w r3, [r1, #-4]
8009188: 1f0c subs r4, r1, #4
800918a: 2b00 cmp r3, #0
800918c: bfb8 it lt
800918e: 18e4 addlt r4, r4, r3
8009190: f000 f8de bl 8009350 <__malloc_lock>
8009194: 4a1c ldr r2, [pc, #112] @ (8009208 <_free_r+0x8c>)
8009196: 6813 ldr r3, [r2, #0]
8009198: b933 cbnz r3, 80091a8 <_free_r+0x2c>
800919a: 6063 str r3, [r4, #4]
800919c: 6014 str r4, [r2, #0]
800919e: 4628 mov r0, r5
80091a0: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
80091a4: f000 b8da b.w 800935c <__malloc_unlock>
80091a8: 42a3 cmp r3, r4
80091aa: d908 bls.n 80091be <_free_r+0x42>
80091ac: 6820 ldr r0, [r4, #0]
80091ae: 1821 adds r1, r4, r0
80091b0: 428b cmp r3, r1
80091b2: bf01 itttt eq
80091b4: 6819 ldreq r1, [r3, #0]
80091b6: 685b ldreq r3, [r3, #4]
80091b8: 1809 addeq r1, r1, r0
80091ba: 6021 streq r1, [r4, #0]
80091bc: e7ed b.n 800919a <_free_r+0x1e>
80091be: 461a mov r2, r3
80091c0: 685b ldr r3, [r3, #4]
80091c2: b10b cbz r3, 80091c8 <_free_r+0x4c>
80091c4: 42a3 cmp r3, r4
80091c6: d9fa bls.n 80091be <_free_r+0x42>
80091c8: 6811 ldr r1, [r2, #0]
80091ca: 1850 adds r0, r2, r1
80091cc: 42a0 cmp r0, r4
80091ce: d10b bne.n 80091e8 <_free_r+0x6c>
80091d0: 6820 ldr r0, [r4, #0]
80091d2: 4401 add r1, r0
80091d4: 1850 adds r0, r2, r1
80091d6: 4283 cmp r3, r0
80091d8: 6011 str r1, [r2, #0]
80091da: d1e0 bne.n 800919e <_free_r+0x22>
80091dc: 6818 ldr r0, [r3, #0]
80091de: 685b ldr r3, [r3, #4]
80091e0: 4408 add r0, r1
80091e2: 6010 str r0, [r2, #0]
80091e4: 6053 str r3, [r2, #4]
80091e6: e7da b.n 800919e <_free_r+0x22>
80091e8: d902 bls.n 80091f0 <_free_r+0x74>
80091ea: 230c movs r3, #12
80091ec: 602b str r3, [r5, #0]
80091ee: e7d6 b.n 800919e <_free_r+0x22>
80091f0: 6820 ldr r0, [r4, #0]
80091f2: 1821 adds r1, r4, r0
80091f4: 428b cmp r3, r1
80091f6: bf01 itttt eq
80091f8: 6819 ldreq r1, [r3, #0]
80091fa: 685b ldreq r3, [r3, #4]
80091fc: 1809 addeq r1, r1, r0
80091fe: 6021 streq r1, [r4, #0]
8009200: 6063 str r3, [r4, #4]
8009202: 6054 str r4, [r2, #4]
8009204: e7cb b.n 800919e <_free_r+0x22>
8009206: bd38 pop {r3, r4, r5, pc}
8009208: 2000174c .word 0x2000174c
0800920c <sbrk_aligned>:
800920c: b570 push {r4, r5, r6, lr}
800920e: 4e0f ldr r6, [pc, #60] @ (800924c <sbrk_aligned+0x40>)
8009210: 460c mov r4, r1
8009212: 6831 ldr r1, [r6, #0]
8009214: 4605 mov r5, r0
8009216: b911 cbnz r1, 800921e <sbrk_aligned+0x12>
8009218: f000 fba8 bl 800996c <_sbrk_r>
800921c: 6030 str r0, [r6, #0]
800921e: 4621 mov r1, r4
8009220: 4628 mov r0, r5
8009222: f000 fba3 bl 800996c <_sbrk_r>
8009226: 1c43 adds r3, r0, #1
8009228: d103 bne.n 8009232 <sbrk_aligned+0x26>
800922a: f04f 34ff mov.w r4, #4294967295
800922e: 4620 mov r0, r4
8009230: bd70 pop {r4, r5, r6, pc}
8009232: 1cc4 adds r4, r0, #3
8009234: f024 0403 bic.w r4, r4, #3
8009238: 42a0 cmp r0, r4
800923a: d0f8 beq.n 800922e <sbrk_aligned+0x22>
800923c: 1a21 subs r1, r4, r0
800923e: 4628 mov r0, r5
8009240: f000 fb94 bl 800996c <_sbrk_r>
8009244: 3001 adds r0, #1
8009246: d1f2 bne.n 800922e <sbrk_aligned+0x22>
8009248: e7ef b.n 800922a <sbrk_aligned+0x1e>
800924a: bf00 nop
800924c: 20001748 .word 0x20001748
08009250 <_malloc_r>:
8009250: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
8009254: 1ccd adds r5, r1, #3
8009256: f025 0503 bic.w r5, r5, #3
800925a: 3508 adds r5, #8
800925c: 2d0c cmp r5, #12
800925e: bf38 it cc
8009260: 250c movcc r5, #12
8009262: 2d00 cmp r5, #0
8009264: 4606 mov r6, r0
8009266: db01 blt.n 800926c <_malloc_r+0x1c>
8009268: 42a9 cmp r1, r5
800926a: d904 bls.n 8009276 <_malloc_r+0x26>
800926c: 230c movs r3, #12
800926e: 6033 str r3, [r6, #0]
8009270: 2000 movs r0, #0
8009272: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
8009276: f8df 80d4 ldr.w r8, [pc, #212] @ 800934c <_malloc_r+0xfc>
800927a: f000 f869 bl 8009350 <__malloc_lock>
800927e: f8d8 3000 ldr.w r3, [r8]
8009282: 461c mov r4, r3
8009284: bb44 cbnz r4, 80092d8 <_malloc_r+0x88>
8009286: 4629 mov r1, r5
8009288: 4630 mov r0, r6
800928a: f7ff ffbf bl 800920c <sbrk_aligned>
800928e: 1c43 adds r3, r0, #1
8009290: 4604 mov r4, r0
8009292: d158 bne.n 8009346 <_malloc_r+0xf6>
8009294: f8d8 4000 ldr.w r4, [r8]
8009298: 4627 mov r7, r4
800929a: 2f00 cmp r7, #0
800929c: d143 bne.n 8009326 <_malloc_r+0xd6>
800929e: 2c00 cmp r4, #0
80092a0: d04b beq.n 800933a <_malloc_r+0xea>
80092a2: 6823 ldr r3, [r4, #0]
80092a4: 4639 mov r1, r7
80092a6: 4630 mov r0, r6
80092a8: eb04 0903 add.w r9, r4, r3
80092ac: f000 fb5e bl 800996c <_sbrk_r>
80092b0: 4581 cmp r9, r0
80092b2: d142 bne.n 800933a <_malloc_r+0xea>
80092b4: 6821 ldr r1, [r4, #0]
80092b6: 4630 mov r0, r6
80092b8: 1a6d subs r5, r5, r1
80092ba: 4629 mov r1, r5
80092bc: f7ff ffa6 bl 800920c <sbrk_aligned>
80092c0: 3001 adds r0, #1
80092c2: d03a beq.n 800933a <_malloc_r+0xea>
80092c4: 6823 ldr r3, [r4, #0]
80092c6: 442b add r3, r5
80092c8: 6023 str r3, [r4, #0]
80092ca: f8d8 3000 ldr.w r3, [r8]
80092ce: 685a ldr r2, [r3, #4]
80092d0: bb62 cbnz r2, 800932c <_malloc_r+0xdc>
80092d2: f8c8 7000 str.w r7, [r8]
80092d6: e00f b.n 80092f8 <_malloc_r+0xa8>
80092d8: 6822 ldr r2, [r4, #0]
80092da: 1b52 subs r2, r2, r5
80092dc: d420 bmi.n 8009320 <_malloc_r+0xd0>
80092de: 2a0b cmp r2, #11
80092e0: d917 bls.n 8009312 <_malloc_r+0xc2>
80092e2: 1961 adds r1, r4, r5
80092e4: 42a3 cmp r3, r4
80092e6: 6025 str r5, [r4, #0]
80092e8: bf18 it ne
80092ea: 6059 strne r1, [r3, #4]
80092ec: 6863 ldr r3, [r4, #4]
80092ee: bf08 it eq
80092f0: f8c8 1000 streq.w r1, [r8]
80092f4: 5162 str r2, [r4, r5]
80092f6: 604b str r3, [r1, #4]
80092f8: 4630 mov r0, r6
80092fa: f000 f82f bl 800935c <__malloc_unlock>
80092fe: f104 000b add.w r0, r4, #11
8009302: 1d23 adds r3, r4, #4
8009304: f020 0007 bic.w r0, r0, #7
8009308: 1ac2 subs r2, r0, r3
800930a: bf1c itt ne
800930c: 1a1b subne r3, r3, r0
800930e: 50a3 strne r3, [r4, r2]
8009310: e7af b.n 8009272 <_malloc_r+0x22>
8009312: 6862 ldr r2, [r4, #4]
8009314: 42a3 cmp r3, r4
8009316: bf0c ite eq
8009318: f8c8 2000 streq.w r2, [r8]
800931c: 605a strne r2, [r3, #4]
800931e: e7eb b.n 80092f8 <_malloc_r+0xa8>
8009320: 4623 mov r3, r4
8009322: 6864 ldr r4, [r4, #4]
8009324: e7ae b.n 8009284 <_malloc_r+0x34>
8009326: 463c mov r4, r7
8009328: 687f ldr r7, [r7, #4]
800932a: e7b6 b.n 800929a <_malloc_r+0x4a>
800932c: 461a mov r2, r3
800932e: 685b ldr r3, [r3, #4]
8009330: 42a3 cmp r3, r4
8009332: d1fb bne.n 800932c <_malloc_r+0xdc>
8009334: 2300 movs r3, #0
8009336: 6053 str r3, [r2, #4]
8009338: e7de b.n 80092f8 <_malloc_r+0xa8>
800933a: 230c movs r3, #12
800933c: 4630 mov r0, r6
800933e: 6033 str r3, [r6, #0]
8009340: f000 f80c bl 800935c <__malloc_unlock>
8009344: e794 b.n 8009270 <_malloc_r+0x20>
8009346: 6005 str r5, [r0, #0]
8009348: e7d6 b.n 80092f8 <_malloc_r+0xa8>
800934a: bf00 nop
800934c: 2000174c .word 0x2000174c
08009350 <__malloc_lock>:
8009350: 4801 ldr r0, [pc, #4] @ (8009358 <__malloc_lock+0x8>)
8009352: f7ff bf11 b.w 8009178 <__retarget_lock_acquire_recursive>
8009356: bf00 nop
8009358: 20001744 .word 0x20001744
0800935c <__malloc_unlock>:
800935c: 4801 ldr r0, [pc, #4] @ (8009364 <__malloc_unlock+0x8>)
800935e: f7ff bf0c b.w 800917a <__retarget_lock_release_recursive>
8009362: bf00 nop
8009364: 20001744 .word 0x20001744
08009368 <__ssputs_r>:
8009368: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800936c: 461f mov r7, r3
800936e: 688e ldr r6, [r1, #8]
8009370: 4682 mov sl, r0
8009372: 42be cmp r6, r7
8009374: 460c mov r4, r1
8009376: 4690 mov r8, r2
8009378: 680b ldr r3, [r1, #0]
800937a: d82d bhi.n 80093d8 <__ssputs_r+0x70>
800937c: f9b1 200c ldrsh.w r2, [r1, #12]
8009380: f412 6f90 tst.w r2, #1152 @ 0x480
8009384: d026 beq.n 80093d4 <__ssputs_r+0x6c>
8009386: 6965 ldr r5, [r4, #20]
8009388: 6909 ldr r1, [r1, #16]
800938a: eb05 0545 add.w r5, r5, r5, lsl #1
800938e: eba3 0901 sub.w r9, r3, r1
8009392: eb05 75d5 add.w r5, r5, r5, lsr #31
8009396: 1c7b adds r3, r7, #1
8009398: 444b add r3, r9
800939a: 106d asrs r5, r5, #1
800939c: 429d cmp r5, r3
800939e: bf38 it cc
80093a0: 461d movcc r5, r3
80093a2: 0553 lsls r3, r2, #21
80093a4: d527 bpl.n 80093f6 <__ssputs_r+0x8e>
80093a6: 4629 mov r1, r5
80093a8: f7ff ff52 bl 8009250 <_malloc_r>
80093ac: 4606 mov r6, r0
80093ae: b360 cbz r0, 800940a <__ssputs_r+0xa2>
80093b0: 464a mov r2, r9
80093b2: 6921 ldr r1, [r4, #16]
80093b4: f000 faf8 bl 80099a8 <memcpy>
80093b8: 89a3 ldrh r3, [r4, #12]
80093ba: f423 6390 bic.w r3, r3, #1152 @ 0x480
80093be: f043 0380 orr.w r3, r3, #128 @ 0x80
80093c2: 81a3 strh r3, [r4, #12]
80093c4: 6126 str r6, [r4, #16]
80093c6: 444e add r6, r9
80093c8: 6026 str r6, [r4, #0]
80093ca: 463e mov r6, r7
80093cc: 6165 str r5, [r4, #20]
80093ce: eba5 0509 sub.w r5, r5, r9
80093d2: 60a5 str r5, [r4, #8]
80093d4: 42be cmp r6, r7
80093d6: d900 bls.n 80093da <__ssputs_r+0x72>
80093d8: 463e mov r6, r7
80093da: 4632 mov r2, r6
80093dc: 4641 mov r1, r8
80093de: 6820 ldr r0, [r4, #0]
80093e0: f000 faaa bl 8009938 <memmove>
80093e4: 2000 movs r0, #0
80093e6: 68a3 ldr r3, [r4, #8]
80093e8: 1b9b subs r3, r3, r6
80093ea: 60a3 str r3, [r4, #8]
80093ec: 6823 ldr r3, [r4, #0]
80093ee: 4433 add r3, r6
80093f0: 6023 str r3, [r4, #0]
80093f2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
80093f6: 462a mov r2, r5
80093f8: f000 fae4 bl 80099c4 <_realloc_r>
80093fc: 4606 mov r6, r0
80093fe: 2800 cmp r0, #0
8009400: d1e0 bne.n 80093c4 <__ssputs_r+0x5c>
8009402: 4650 mov r0, sl
8009404: 6921 ldr r1, [r4, #16]
8009406: f7ff feb9 bl 800917c <_free_r>
800940a: 230c movs r3, #12
800940c: f8ca 3000 str.w r3, [sl]
8009410: 89a3 ldrh r3, [r4, #12]
8009412: f04f 30ff mov.w r0, #4294967295
8009416: f043 0340 orr.w r3, r3, #64 @ 0x40
800941a: 81a3 strh r3, [r4, #12]
800941c: e7e9 b.n 80093f2 <__ssputs_r+0x8a>
...
08009420 <_svfiprintf_r>:
8009420: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8009424: 4698 mov r8, r3
8009426: 898b ldrh r3, [r1, #12]
8009428: 4607 mov r7, r0
800942a: 061b lsls r3, r3, #24
800942c: 460d mov r5, r1
800942e: 4614 mov r4, r2
8009430: b09d sub sp, #116 @ 0x74
8009432: d510 bpl.n 8009456 <_svfiprintf_r+0x36>
8009434: 690b ldr r3, [r1, #16]
8009436: b973 cbnz r3, 8009456 <_svfiprintf_r+0x36>
8009438: 2140 movs r1, #64 @ 0x40
800943a: f7ff ff09 bl 8009250 <_malloc_r>
800943e: 6028 str r0, [r5, #0]
8009440: 6128 str r0, [r5, #16]
8009442: b930 cbnz r0, 8009452 <_svfiprintf_r+0x32>
8009444: 230c movs r3, #12
8009446: 603b str r3, [r7, #0]
8009448: f04f 30ff mov.w r0, #4294967295
800944c: b01d add sp, #116 @ 0x74
800944e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
8009452: 2340 movs r3, #64 @ 0x40
8009454: 616b str r3, [r5, #20]
8009456: 2300 movs r3, #0
8009458: 9309 str r3, [sp, #36] @ 0x24
800945a: 2320 movs r3, #32
800945c: f88d 3029 strb.w r3, [sp, #41] @ 0x29
8009460: 2330 movs r3, #48 @ 0x30
8009462: f04f 0901 mov.w r9, #1
8009466: f8cd 800c str.w r8, [sp, #12]
800946a: f8df 8198 ldr.w r8, [pc, #408] @ 8009604 <_svfiprintf_r+0x1e4>
800946e: f88d 302a strb.w r3, [sp, #42] @ 0x2a
8009472: 4623 mov r3, r4
8009474: 469a mov sl, r3
8009476: f813 2b01 ldrb.w r2, [r3], #1
800947a: b10a cbz r2, 8009480 <_svfiprintf_r+0x60>
800947c: 2a25 cmp r2, #37 @ 0x25
800947e: d1f9 bne.n 8009474 <_svfiprintf_r+0x54>
8009480: ebba 0b04 subs.w fp, sl, r4
8009484: d00b beq.n 800949e <_svfiprintf_r+0x7e>
8009486: 465b mov r3, fp
8009488: 4622 mov r2, r4
800948a: 4629 mov r1, r5
800948c: 4638 mov r0, r7
800948e: f7ff ff6b bl 8009368 <__ssputs_r>
8009492: 3001 adds r0, #1
8009494: f000 80a7 beq.w 80095e6 <_svfiprintf_r+0x1c6>
8009498: 9a09 ldr r2, [sp, #36] @ 0x24
800949a: 445a add r2, fp
800949c: 9209 str r2, [sp, #36] @ 0x24
800949e: f89a 3000 ldrb.w r3, [sl]
80094a2: 2b00 cmp r3, #0
80094a4: f000 809f beq.w 80095e6 <_svfiprintf_r+0x1c6>
80094a8: 2300 movs r3, #0
80094aa: f04f 32ff mov.w r2, #4294967295
80094ae: e9cd 2305 strd r2, r3, [sp, #20]
80094b2: f10a 0a01 add.w sl, sl, #1
80094b6: 9304 str r3, [sp, #16]
80094b8: 9307 str r3, [sp, #28]
80094ba: f88d 3053 strb.w r3, [sp, #83] @ 0x53
80094be: 931a str r3, [sp, #104] @ 0x68
80094c0: 4654 mov r4, sl
80094c2: 2205 movs r2, #5
80094c4: f814 1b01 ldrb.w r1, [r4], #1
80094c8: 484e ldr r0, [pc, #312] @ (8009604 <_svfiprintf_r+0x1e4>)
80094ca: f000 fa5f bl 800998c <memchr>
80094ce: 9a04 ldr r2, [sp, #16]
80094d0: b9d8 cbnz r0, 800950a <_svfiprintf_r+0xea>
80094d2: 06d0 lsls r0, r2, #27
80094d4: bf44 itt mi
80094d6: 2320 movmi r3, #32
80094d8: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
80094dc: 0711 lsls r1, r2, #28
80094de: bf44 itt mi
80094e0: 232b movmi r3, #43 @ 0x2b
80094e2: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
80094e6: f89a 3000 ldrb.w r3, [sl]
80094ea: 2b2a cmp r3, #42 @ 0x2a
80094ec: d015 beq.n 800951a <_svfiprintf_r+0xfa>
80094ee: 4654 mov r4, sl
80094f0: 2000 movs r0, #0
80094f2: f04f 0c0a mov.w ip, #10
80094f6: 9a07 ldr r2, [sp, #28]
80094f8: 4621 mov r1, r4
80094fa: f811 3b01 ldrb.w r3, [r1], #1
80094fe: 3b30 subs r3, #48 @ 0x30
8009500: 2b09 cmp r3, #9
8009502: d94b bls.n 800959c <_svfiprintf_r+0x17c>
8009504: b1b0 cbz r0, 8009534 <_svfiprintf_r+0x114>
8009506: 9207 str r2, [sp, #28]
8009508: e014 b.n 8009534 <_svfiprintf_r+0x114>
800950a: eba0 0308 sub.w r3, r0, r8
800950e: fa09 f303 lsl.w r3, r9, r3
8009512: 4313 orrs r3, r2
8009514: 46a2 mov sl, r4
8009516: 9304 str r3, [sp, #16]
8009518: e7d2 b.n 80094c0 <_svfiprintf_r+0xa0>
800951a: 9b03 ldr r3, [sp, #12]
800951c: 1d19 adds r1, r3, #4
800951e: 681b ldr r3, [r3, #0]
8009520: 9103 str r1, [sp, #12]
8009522: 2b00 cmp r3, #0
8009524: bfbb ittet lt
8009526: 425b neglt r3, r3
8009528: f042 0202 orrlt.w r2, r2, #2
800952c: 9307 strge r3, [sp, #28]
800952e: 9307 strlt r3, [sp, #28]
8009530: bfb8 it lt
8009532: 9204 strlt r2, [sp, #16]
8009534: 7823 ldrb r3, [r4, #0]
8009536: 2b2e cmp r3, #46 @ 0x2e
8009538: d10a bne.n 8009550 <_svfiprintf_r+0x130>
800953a: 7863 ldrb r3, [r4, #1]
800953c: 2b2a cmp r3, #42 @ 0x2a
800953e: d132 bne.n 80095a6 <_svfiprintf_r+0x186>
8009540: 9b03 ldr r3, [sp, #12]
8009542: 3402 adds r4, #2
8009544: 1d1a adds r2, r3, #4
8009546: 681b ldr r3, [r3, #0]
8009548: 9203 str r2, [sp, #12]
800954a: ea43 73e3 orr.w r3, r3, r3, asr #31
800954e: 9305 str r3, [sp, #20]
8009550: f8df a0b4 ldr.w sl, [pc, #180] @ 8009608 <_svfiprintf_r+0x1e8>
8009554: 2203 movs r2, #3
8009556: 4650 mov r0, sl
8009558: 7821 ldrb r1, [r4, #0]
800955a: f000 fa17 bl 800998c <memchr>
800955e: b138 cbz r0, 8009570 <_svfiprintf_r+0x150>
8009560: 2240 movs r2, #64 @ 0x40
8009562: 9b04 ldr r3, [sp, #16]
8009564: eba0 000a sub.w r0, r0, sl
8009568: 4082 lsls r2, r0
800956a: 4313 orrs r3, r2
800956c: 3401 adds r4, #1
800956e: 9304 str r3, [sp, #16]
8009570: f814 1b01 ldrb.w r1, [r4], #1
8009574: 2206 movs r2, #6
8009576: 4825 ldr r0, [pc, #148] @ (800960c <_svfiprintf_r+0x1ec>)
8009578: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800957c: f000 fa06 bl 800998c <memchr>
8009580: 2800 cmp r0, #0
8009582: d036 beq.n 80095f2 <_svfiprintf_r+0x1d2>
8009584: 4b22 ldr r3, [pc, #136] @ (8009610 <_svfiprintf_r+0x1f0>)
8009586: bb1b cbnz r3, 80095d0 <_svfiprintf_r+0x1b0>
8009588: 9b03 ldr r3, [sp, #12]
800958a: 3307 adds r3, #7
800958c: f023 0307 bic.w r3, r3, #7
8009590: 3308 adds r3, #8
8009592: 9303 str r3, [sp, #12]
8009594: 9b09 ldr r3, [sp, #36] @ 0x24
8009596: 4433 add r3, r6
8009598: 9309 str r3, [sp, #36] @ 0x24
800959a: e76a b.n 8009472 <_svfiprintf_r+0x52>
800959c: 460c mov r4, r1
800959e: 2001 movs r0, #1
80095a0: fb0c 3202 mla r2, ip, r2, r3
80095a4: e7a8 b.n 80094f8 <_svfiprintf_r+0xd8>
80095a6: 2300 movs r3, #0
80095a8: f04f 0c0a mov.w ip, #10
80095ac: 4619 mov r1, r3
80095ae: 3401 adds r4, #1
80095b0: 9305 str r3, [sp, #20]
80095b2: 4620 mov r0, r4
80095b4: f810 2b01 ldrb.w r2, [r0], #1
80095b8: 3a30 subs r2, #48 @ 0x30
80095ba: 2a09 cmp r2, #9
80095bc: d903 bls.n 80095c6 <_svfiprintf_r+0x1a6>
80095be: 2b00 cmp r3, #0
80095c0: d0c6 beq.n 8009550 <_svfiprintf_r+0x130>
80095c2: 9105 str r1, [sp, #20]
80095c4: e7c4 b.n 8009550 <_svfiprintf_r+0x130>
80095c6: 4604 mov r4, r0
80095c8: 2301 movs r3, #1
80095ca: fb0c 2101 mla r1, ip, r1, r2
80095ce: e7f0 b.n 80095b2 <_svfiprintf_r+0x192>
80095d0: ab03 add r3, sp, #12
80095d2: 9300 str r3, [sp, #0]
80095d4: 462a mov r2, r5
80095d6: 4638 mov r0, r7
80095d8: 4b0e ldr r3, [pc, #56] @ (8009614 <_svfiprintf_r+0x1f4>)
80095da: a904 add r1, sp, #16
80095dc: f3af 8000 nop.w
80095e0: 1c42 adds r2, r0, #1
80095e2: 4606 mov r6, r0
80095e4: d1d6 bne.n 8009594 <_svfiprintf_r+0x174>
80095e6: 89ab ldrh r3, [r5, #12]
80095e8: 065b lsls r3, r3, #25
80095ea: f53f af2d bmi.w 8009448 <_svfiprintf_r+0x28>
80095ee: 9809 ldr r0, [sp, #36] @ 0x24
80095f0: e72c b.n 800944c <_svfiprintf_r+0x2c>
80095f2: ab03 add r3, sp, #12
80095f4: 9300 str r3, [sp, #0]
80095f6: 462a mov r2, r5
80095f8: 4638 mov r0, r7
80095fa: 4b06 ldr r3, [pc, #24] @ (8009614 <_svfiprintf_r+0x1f4>)
80095fc: a904 add r1, sp, #16
80095fe: f000 f87d bl 80096fc <_printf_i>
8009602: e7ed b.n 80095e0 <_svfiprintf_r+0x1c0>
8009604: 08009ac2 .word 0x08009ac2
8009608: 08009ac8 .word 0x08009ac8
800960c: 08009acc .word 0x08009acc
8009610: 00000000 .word 0x00000000
8009614: 08009369 .word 0x08009369
08009618 <_printf_common>:
8009618: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800961c: 4616 mov r6, r2
800961e: 4698 mov r8, r3
8009620: 688a ldr r2, [r1, #8]
8009622: 690b ldr r3, [r1, #16]
8009624: 4607 mov r7, r0
8009626: 4293 cmp r3, r2
8009628: bfb8 it lt
800962a: 4613 movlt r3, r2
800962c: 6033 str r3, [r6, #0]
800962e: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
8009632: 460c mov r4, r1
8009634: f8dd 9020 ldr.w r9, [sp, #32]
8009638: b10a cbz r2, 800963e <_printf_common+0x26>
800963a: 3301 adds r3, #1
800963c: 6033 str r3, [r6, #0]
800963e: 6823 ldr r3, [r4, #0]
8009640: 0699 lsls r1, r3, #26
8009642: bf42 ittt mi
8009644: 6833 ldrmi r3, [r6, #0]
8009646: 3302 addmi r3, #2
8009648: 6033 strmi r3, [r6, #0]
800964a: 6825 ldr r5, [r4, #0]
800964c: f015 0506 ands.w r5, r5, #6
8009650: d106 bne.n 8009660 <_printf_common+0x48>
8009652: f104 0a19 add.w sl, r4, #25
8009656: 68e3 ldr r3, [r4, #12]
8009658: 6832 ldr r2, [r6, #0]
800965a: 1a9b subs r3, r3, r2
800965c: 42ab cmp r3, r5
800965e: dc2b bgt.n 80096b8 <_printf_common+0xa0>
8009660: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
8009664: 6822 ldr r2, [r4, #0]
8009666: 3b00 subs r3, #0
8009668: bf18 it ne
800966a: 2301 movne r3, #1
800966c: 0692 lsls r2, r2, #26
800966e: d430 bmi.n 80096d2 <_printf_common+0xba>
8009670: 4641 mov r1, r8
8009672: 4638 mov r0, r7
8009674: f104 0243 add.w r2, r4, #67 @ 0x43
8009678: 47c8 blx r9
800967a: 3001 adds r0, #1
800967c: d023 beq.n 80096c6 <_printf_common+0xae>
800967e: 6823 ldr r3, [r4, #0]
8009680: 6922 ldr r2, [r4, #16]
8009682: f003 0306 and.w r3, r3, #6
8009686: 2b04 cmp r3, #4
8009688: bf14 ite ne
800968a: 2500 movne r5, #0
800968c: 6833 ldreq r3, [r6, #0]
800968e: f04f 0600 mov.w r6, #0
8009692: bf08 it eq
8009694: 68e5 ldreq r5, [r4, #12]
8009696: f104 041a add.w r4, r4, #26
800969a: bf08 it eq
800969c: 1aed subeq r5, r5, r3
800969e: f854 3c12 ldr.w r3, [r4, #-18]
80096a2: bf08 it eq
80096a4: ea25 75e5 biceq.w r5, r5, r5, asr #31
80096a8: 4293 cmp r3, r2
80096aa: bfc4 itt gt
80096ac: 1a9b subgt r3, r3, r2
80096ae: 18ed addgt r5, r5, r3
80096b0: 42b5 cmp r5, r6
80096b2: d11a bne.n 80096ea <_printf_common+0xd2>
80096b4: 2000 movs r0, #0
80096b6: e008 b.n 80096ca <_printf_common+0xb2>
80096b8: 2301 movs r3, #1
80096ba: 4652 mov r2, sl
80096bc: 4641 mov r1, r8
80096be: 4638 mov r0, r7
80096c0: 47c8 blx r9
80096c2: 3001 adds r0, #1
80096c4: d103 bne.n 80096ce <_printf_common+0xb6>
80096c6: f04f 30ff mov.w r0, #4294967295
80096ca: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
80096ce: 3501 adds r5, #1
80096d0: e7c1 b.n 8009656 <_printf_common+0x3e>
80096d2: 2030 movs r0, #48 @ 0x30
80096d4: 18e1 adds r1, r4, r3
80096d6: f881 0043 strb.w r0, [r1, #67] @ 0x43
80096da: 1c5a adds r2, r3, #1
80096dc: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
80096e0: 4422 add r2, r4
80096e2: 3302 adds r3, #2
80096e4: f882 1043 strb.w r1, [r2, #67] @ 0x43
80096e8: e7c2 b.n 8009670 <_printf_common+0x58>
80096ea: 2301 movs r3, #1
80096ec: 4622 mov r2, r4
80096ee: 4641 mov r1, r8
80096f0: 4638 mov r0, r7
80096f2: 47c8 blx r9
80096f4: 3001 adds r0, #1
80096f6: d0e6 beq.n 80096c6 <_printf_common+0xae>
80096f8: 3601 adds r6, #1
80096fa: e7d9 b.n 80096b0 <_printf_common+0x98>
080096fc <_printf_i>:
80096fc: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
8009700: 7e0f ldrb r7, [r1, #24]
8009702: 4691 mov r9, r2
8009704: 2f78 cmp r7, #120 @ 0x78
8009706: 4680 mov r8, r0
8009708: 460c mov r4, r1
800970a: 469a mov sl, r3
800970c: 9e0c ldr r6, [sp, #48] @ 0x30
800970e: f101 0243 add.w r2, r1, #67 @ 0x43
8009712: d807 bhi.n 8009724 <_printf_i+0x28>
8009714: 2f62 cmp r7, #98 @ 0x62
8009716: d80a bhi.n 800972e <_printf_i+0x32>
8009718: 2f00 cmp r7, #0
800971a: f000 80d1 beq.w 80098c0 <_printf_i+0x1c4>
800971e: 2f58 cmp r7, #88 @ 0x58
8009720: f000 80b8 beq.w 8009894 <_printf_i+0x198>
8009724: f104 0642 add.w r6, r4, #66 @ 0x42
8009728: f884 7042 strb.w r7, [r4, #66] @ 0x42
800972c: e03a b.n 80097a4 <_printf_i+0xa8>
800972e: f1a7 0363 sub.w r3, r7, #99 @ 0x63
8009732: 2b15 cmp r3, #21
8009734: d8f6 bhi.n 8009724 <_printf_i+0x28>
8009736: a101 add r1, pc, #4 @ (adr r1, 800973c <_printf_i+0x40>)
8009738: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800973c: 08009795 .word 0x08009795
8009740: 080097a9 .word 0x080097a9
8009744: 08009725 .word 0x08009725
8009748: 08009725 .word 0x08009725
800974c: 08009725 .word 0x08009725
8009750: 08009725 .word 0x08009725
8009754: 080097a9 .word 0x080097a9
8009758: 08009725 .word 0x08009725
800975c: 08009725 .word 0x08009725
8009760: 08009725 .word 0x08009725
8009764: 08009725 .word 0x08009725
8009768: 080098a7 .word 0x080098a7
800976c: 080097d3 .word 0x080097d3
8009770: 08009861 .word 0x08009861
8009774: 08009725 .word 0x08009725
8009778: 08009725 .word 0x08009725
800977c: 080098c9 .word 0x080098c9
8009780: 08009725 .word 0x08009725
8009784: 080097d3 .word 0x080097d3
8009788: 08009725 .word 0x08009725
800978c: 08009725 .word 0x08009725
8009790: 08009869 .word 0x08009869
8009794: 6833 ldr r3, [r6, #0]
8009796: 1d1a adds r2, r3, #4
8009798: 681b ldr r3, [r3, #0]
800979a: 6032 str r2, [r6, #0]
800979c: f104 0642 add.w r6, r4, #66 @ 0x42
80097a0: f884 3042 strb.w r3, [r4, #66] @ 0x42
80097a4: 2301 movs r3, #1
80097a6: e09c b.n 80098e2 <_printf_i+0x1e6>
80097a8: 6833 ldr r3, [r6, #0]
80097aa: 6820 ldr r0, [r4, #0]
80097ac: 1d19 adds r1, r3, #4
80097ae: 6031 str r1, [r6, #0]
80097b0: 0606 lsls r6, r0, #24
80097b2: d501 bpl.n 80097b8 <_printf_i+0xbc>
80097b4: 681d ldr r5, [r3, #0]
80097b6: e003 b.n 80097c0 <_printf_i+0xc4>
80097b8: 0645 lsls r5, r0, #25
80097ba: d5fb bpl.n 80097b4 <_printf_i+0xb8>
80097bc: f9b3 5000 ldrsh.w r5, [r3]
80097c0: 2d00 cmp r5, #0
80097c2: da03 bge.n 80097cc <_printf_i+0xd0>
80097c4: 232d movs r3, #45 @ 0x2d
80097c6: 426d negs r5, r5
80097c8: f884 3043 strb.w r3, [r4, #67] @ 0x43
80097cc: 230a movs r3, #10
80097ce: 4858 ldr r0, [pc, #352] @ (8009930 <_printf_i+0x234>)
80097d0: e011 b.n 80097f6 <_printf_i+0xfa>
80097d2: 6821 ldr r1, [r4, #0]
80097d4: 6833 ldr r3, [r6, #0]
80097d6: 0608 lsls r0, r1, #24
80097d8: f853 5b04 ldr.w r5, [r3], #4
80097dc: d402 bmi.n 80097e4 <_printf_i+0xe8>
80097de: 0649 lsls r1, r1, #25
80097e0: bf48 it mi
80097e2: b2ad uxthmi r5, r5
80097e4: 2f6f cmp r7, #111 @ 0x6f
80097e6: 6033 str r3, [r6, #0]
80097e8: bf14 ite ne
80097ea: 230a movne r3, #10
80097ec: 2308 moveq r3, #8
80097ee: 4850 ldr r0, [pc, #320] @ (8009930 <_printf_i+0x234>)
80097f0: 2100 movs r1, #0
80097f2: f884 1043 strb.w r1, [r4, #67] @ 0x43
80097f6: 6866 ldr r6, [r4, #4]
80097f8: 2e00 cmp r6, #0
80097fa: 60a6 str r6, [r4, #8]
80097fc: db05 blt.n 800980a <_printf_i+0x10e>
80097fe: 6821 ldr r1, [r4, #0]
8009800: 432e orrs r6, r5
8009802: f021 0104 bic.w r1, r1, #4
8009806: 6021 str r1, [r4, #0]
8009808: d04b beq.n 80098a2 <_printf_i+0x1a6>
800980a: 4616 mov r6, r2
800980c: fbb5 f1f3 udiv r1, r5, r3
8009810: fb03 5711 mls r7, r3, r1, r5
8009814: 5dc7 ldrb r7, [r0, r7]
8009816: f806 7d01 strb.w r7, [r6, #-1]!
800981a: 462f mov r7, r5
800981c: 42bb cmp r3, r7
800981e: 460d mov r5, r1
8009820: d9f4 bls.n 800980c <_printf_i+0x110>
8009822: 2b08 cmp r3, #8
8009824: d10b bne.n 800983e <_printf_i+0x142>
8009826: 6823 ldr r3, [r4, #0]
8009828: 07df lsls r7, r3, #31
800982a: d508 bpl.n 800983e <_printf_i+0x142>
800982c: 6923 ldr r3, [r4, #16]
800982e: 6861 ldr r1, [r4, #4]
8009830: 4299 cmp r1, r3
8009832: bfde ittt le
8009834: 2330 movle r3, #48 @ 0x30
8009836: f806 3c01 strble.w r3, [r6, #-1]
800983a: f106 36ff addle.w r6, r6, #4294967295
800983e: 1b92 subs r2, r2, r6
8009840: 6122 str r2, [r4, #16]
8009842: 464b mov r3, r9
8009844: 4621 mov r1, r4
8009846: 4640 mov r0, r8
8009848: f8cd a000 str.w sl, [sp]
800984c: aa03 add r2, sp, #12
800984e: f7ff fee3 bl 8009618 <_printf_common>
8009852: 3001 adds r0, #1
8009854: d14a bne.n 80098ec <_printf_i+0x1f0>
8009856: f04f 30ff mov.w r0, #4294967295
800985a: b004 add sp, #16
800985c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8009860: 6823 ldr r3, [r4, #0]
8009862: f043 0320 orr.w r3, r3, #32
8009866: 6023 str r3, [r4, #0]
8009868: 2778 movs r7, #120 @ 0x78
800986a: 4832 ldr r0, [pc, #200] @ (8009934 <_printf_i+0x238>)
800986c: f884 7045 strb.w r7, [r4, #69] @ 0x45
8009870: 6823 ldr r3, [r4, #0]
8009872: 6831 ldr r1, [r6, #0]
8009874: 061f lsls r7, r3, #24
8009876: f851 5b04 ldr.w r5, [r1], #4
800987a: d402 bmi.n 8009882 <_printf_i+0x186>
800987c: 065f lsls r7, r3, #25
800987e: bf48 it mi
8009880: b2ad uxthmi r5, r5
8009882: 6031 str r1, [r6, #0]
8009884: 07d9 lsls r1, r3, #31
8009886: bf44 itt mi
8009888: f043 0320 orrmi.w r3, r3, #32
800988c: 6023 strmi r3, [r4, #0]
800988e: b11d cbz r5, 8009898 <_printf_i+0x19c>
8009890: 2310 movs r3, #16
8009892: e7ad b.n 80097f0 <_printf_i+0xf4>
8009894: 4826 ldr r0, [pc, #152] @ (8009930 <_printf_i+0x234>)
8009896: e7e9 b.n 800986c <_printf_i+0x170>
8009898: 6823 ldr r3, [r4, #0]
800989a: f023 0320 bic.w r3, r3, #32
800989e: 6023 str r3, [r4, #0]
80098a0: e7f6 b.n 8009890 <_printf_i+0x194>
80098a2: 4616 mov r6, r2
80098a4: e7bd b.n 8009822 <_printf_i+0x126>
80098a6: 6833 ldr r3, [r6, #0]
80098a8: 6825 ldr r5, [r4, #0]
80098aa: 1d18 adds r0, r3, #4
80098ac: 6961 ldr r1, [r4, #20]
80098ae: 6030 str r0, [r6, #0]
80098b0: 062e lsls r6, r5, #24
80098b2: 681b ldr r3, [r3, #0]
80098b4: d501 bpl.n 80098ba <_printf_i+0x1be>
80098b6: 6019 str r1, [r3, #0]
80098b8: e002 b.n 80098c0 <_printf_i+0x1c4>
80098ba: 0668 lsls r0, r5, #25
80098bc: d5fb bpl.n 80098b6 <_printf_i+0x1ba>
80098be: 8019 strh r1, [r3, #0]
80098c0: 2300 movs r3, #0
80098c2: 4616 mov r6, r2
80098c4: 6123 str r3, [r4, #16]
80098c6: e7bc b.n 8009842 <_printf_i+0x146>
80098c8: 6833 ldr r3, [r6, #0]
80098ca: 2100 movs r1, #0
80098cc: 1d1a adds r2, r3, #4
80098ce: 6032 str r2, [r6, #0]
80098d0: 681e ldr r6, [r3, #0]
80098d2: 6862 ldr r2, [r4, #4]
80098d4: 4630 mov r0, r6
80098d6: f000 f859 bl 800998c <memchr>
80098da: b108 cbz r0, 80098e0 <_printf_i+0x1e4>
80098dc: 1b80 subs r0, r0, r6
80098de: 6060 str r0, [r4, #4]
80098e0: 6863 ldr r3, [r4, #4]
80098e2: 6123 str r3, [r4, #16]
80098e4: 2300 movs r3, #0
80098e6: f884 3043 strb.w r3, [r4, #67] @ 0x43
80098ea: e7aa b.n 8009842 <_printf_i+0x146>
80098ec: 4632 mov r2, r6
80098ee: 4649 mov r1, r9
80098f0: 4640 mov r0, r8
80098f2: 6923 ldr r3, [r4, #16]
80098f4: 47d0 blx sl
80098f6: 3001 adds r0, #1
80098f8: d0ad beq.n 8009856 <_printf_i+0x15a>
80098fa: 6823 ldr r3, [r4, #0]
80098fc: 079b lsls r3, r3, #30
80098fe: d413 bmi.n 8009928 <_printf_i+0x22c>
8009900: 68e0 ldr r0, [r4, #12]
8009902: 9b03 ldr r3, [sp, #12]
8009904: 4298 cmp r0, r3
8009906: bfb8 it lt
8009908: 4618 movlt r0, r3
800990a: e7a6 b.n 800985a <_printf_i+0x15e>
800990c: 2301 movs r3, #1
800990e: 4632 mov r2, r6
8009910: 4649 mov r1, r9
8009912: 4640 mov r0, r8
8009914: 47d0 blx sl
8009916: 3001 adds r0, #1
8009918: d09d beq.n 8009856 <_printf_i+0x15a>
800991a: 3501 adds r5, #1
800991c: 68e3 ldr r3, [r4, #12]
800991e: 9903 ldr r1, [sp, #12]
8009920: 1a5b subs r3, r3, r1
8009922: 42ab cmp r3, r5
8009924: dcf2 bgt.n 800990c <_printf_i+0x210>
8009926: e7eb b.n 8009900 <_printf_i+0x204>
8009928: 2500 movs r5, #0
800992a: f104 0619 add.w r6, r4, #25
800992e: e7f5 b.n 800991c <_printf_i+0x220>
8009930: 08009ad3 .word 0x08009ad3
8009934: 08009ae4 .word 0x08009ae4
08009938 <memmove>:
8009938: 4288 cmp r0, r1
800993a: b510 push {r4, lr}
800993c: eb01 0402 add.w r4, r1, r2
8009940: d902 bls.n 8009948 <memmove+0x10>
8009942: 4284 cmp r4, r0
8009944: 4623 mov r3, r4
8009946: d807 bhi.n 8009958 <memmove+0x20>
8009948: 1e43 subs r3, r0, #1
800994a: 42a1 cmp r1, r4
800994c: d008 beq.n 8009960 <memmove+0x28>
800994e: f811 2b01 ldrb.w r2, [r1], #1
8009952: f803 2f01 strb.w r2, [r3, #1]!
8009956: e7f8 b.n 800994a <memmove+0x12>
8009958: 4601 mov r1, r0
800995a: 4402 add r2, r0
800995c: 428a cmp r2, r1
800995e: d100 bne.n 8009962 <memmove+0x2a>
8009960: bd10 pop {r4, pc}
8009962: f813 4d01 ldrb.w r4, [r3, #-1]!
8009966: f802 4d01 strb.w r4, [r2, #-1]!
800996a: e7f7 b.n 800995c <memmove+0x24>
0800996c <_sbrk_r>:
800996c: b538 push {r3, r4, r5, lr}
800996e: 2300 movs r3, #0
8009970: 4d05 ldr r5, [pc, #20] @ (8009988 <_sbrk_r+0x1c>)
8009972: 4604 mov r4, r0
8009974: 4608 mov r0, r1
8009976: 602b str r3, [r5, #0]
8009978: f7f7 f9c6 bl 8000d08 <_sbrk>
800997c: 1c43 adds r3, r0, #1
800997e: d102 bne.n 8009986 <_sbrk_r+0x1a>
8009980: 682b ldr r3, [r5, #0]
8009982: b103 cbz r3, 8009986 <_sbrk_r+0x1a>
8009984: 6023 str r3, [r4, #0]
8009986: bd38 pop {r3, r4, r5, pc}
8009988: 20001740 .word 0x20001740
0800998c <memchr>:
800998c: 4603 mov r3, r0
800998e: b510 push {r4, lr}
8009990: b2c9 uxtb r1, r1
8009992: 4402 add r2, r0
8009994: 4293 cmp r3, r2
8009996: 4618 mov r0, r3
8009998: d101 bne.n 800999e <memchr+0x12>
800999a: 2000 movs r0, #0
800999c: e003 b.n 80099a6 <memchr+0x1a>
800999e: 7804 ldrb r4, [r0, #0]
80099a0: 3301 adds r3, #1
80099a2: 428c cmp r4, r1
80099a4: d1f6 bne.n 8009994 <memchr+0x8>
80099a6: bd10 pop {r4, pc}
080099a8 <memcpy>:
80099a8: 440a add r2, r1
80099aa: 4291 cmp r1, r2
80099ac: f100 33ff add.w r3, r0, #4294967295
80099b0: d100 bne.n 80099b4 <memcpy+0xc>
80099b2: 4770 bx lr
80099b4: b510 push {r4, lr}
80099b6: f811 4b01 ldrb.w r4, [r1], #1
80099ba: 4291 cmp r1, r2
80099bc: f803 4f01 strb.w r4, [r3, #1]!
80099c0: d1f9 bne.n 80099b6 <memcpy+0xe>
80099c2: bd10 pop {r4, pc}
080099c4 <_realloc_r>:
80099c4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
80099c8: 4607 mov r7, r0
80099ca: 4614 mov r4, r2
80099cc: 460d mov r5, r1
80099ce: b921 cbnz r1, 80099da <_realloc_r+0x16>
80099d0: 4611 mov r1, r2
80099d2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
80099d6: f7ff bc3b b.w 8009250 <_malloc_r>
80099da: b92a cbnz r2, 80099e8 <_realloc_r+0x24>
80099dc: f7ff fbce bl 800917c <_free_r>
80099e0: 4625 mov r5, r4
80099e2: 4628 mov r0, r5
80099e4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
80099e8: f000 f81a bl 8009a20 <_malloc_usable_size_r>
80099ec: 4284 cmp r4, r0
80099ee: 4606 mov r6, r0
80099f0: d802 bhi.n 80099f8 <_realloc_r+0x34>
80099f2: ebb4 0f50 cmp.w r4, r0, lsr #1
80099f6: d8f4 bhi.n 80099e2 <_realloc_r+0x1e>
80099f8: 4621 mov r1, r4
80099fa: 4638 mov r0, r7
80099fc: f7ff fc28 bl 8009250 <_malloc_r>
8009a00: 4680 mov r8, r0
8009a02: b908 cbnz r0, 8009a08 <_realloc_r+0x44>
8009a04: 4645 mov r5, r8
8009a06: e7ec b.n 80099e2 <_realloc_r+0x1e>
8009a08: 42b4 cmp r4, r6
8009a0a: 4622 mov r2, r4
8009a0c: 4629 mov r1, r5
8009a0e: bf28 it cs
8009a10: 4632 movcs r2, r6
8009a12: f7ff ffc9 bl 80099a8 <memcpy>
8009a16: 4629 mov r1, r5
8009a18: 4638 mov r0, r7
8009a1a: f7ff fbaf bl 800917c <_free_r>
8009a1e: e7f1 b.n 8009a04 <_realloc_r+0x40>
08009a20 <_malloc_usable_size_r>:
8009a20: f851 3c04 ldr.w r3, [r1, #-4]
8009a24: 1f18 subs r0, r3, #4
8009a26: 2b00 cmp r3, #0
8009a28: bfbc itt lt
8009a2a: 580b ldrlt r3, [r1, r0]
8009a2c: 18c0 addlt r0, r0, r3
8009a2e: 4770 bx lr
08009a30 <_init>:
8009a30: b5f8 push {r3, r4, r5, r6, r7, lr}
8009a32: bf00 nop
8009a34: bcf8 pop {r3, r4, r5, r6, r7}
8009a36: bc08 pop {r3}
8009a38: 469e mov lr, r3
8009a3a: 4770 bx lr
08009a3c <_fini>:
8009a3c: b5f8 push {r3, r4, r5, r6, r7, lr}
8009a3e: bf00 nop
8009a40: bcf8 pop {r3, r4, r5, r6, r7}
8009a42: bc08 pop {r3}
8009a44: 469e mov lr, r3
8009a46: 4770 bx lr
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