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3db6a38a2bd06ee5475960ce93eff19b9c53dc83
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea 3db6a38a2b wip
2025-12-08 13:48:52 +01:00

27178 lines
1014 KiB
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AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000af44 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000288 0800b050 0800b050 0000c050 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800b2d8 0800b2d8 0000d1d0 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800b2d8 0800b2d8 0000c2d8 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800b2e0 0800b2e0 0000d1d0 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800b2e0 0800b2e0 0000c2e0 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800b2e4 0800b2e4 0000c2e4 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001d0 20000000 0800b2e8 0000d000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 0000160c 200001d0 0800b4b8 0000d1d0 2**3
ALLOC
10 ._user_heap_stack 00000604 200017dc 0800b4b8 0000d7dc 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 0000d1d0 2**0
CONTENTS, READONLY
12 .debug_info 00017732 00000000 00000000 0000d1f9 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00004173 00000000 00000000 0002492b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00001540 00000000 00000000 00028aa0 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 0000104d 00000000 00000000 00029fe0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001c31e 00000000 00000000 0002b02d 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001b514 00000000 00000000 0004734b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 0009549d 00000000 00000000 0006285f 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 000f7cfc 2**0
CONTENTS, READONLY
20 .debug_frame 00005c58 00000000 00000000 000f7d40 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 000fd998 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001d0 .word 0x200001d0
8000128: 00000000 .word 0x00000000
800012c: 0800b038 .word 0x0800b038
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001d4 .word 0x200001d4
8000148: 0800b038 .word 0x0800b038
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <EEW_Read>:
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data);
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
800015c: b580 push {r7, lr}
800015e: b082 sub sp, #8
8000160: af00 add r7, sp, #0
8000162: 4603 mov r3, r0
8000164: 6039 str r1, [r7, #0]
8000166: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000168: 79fb ldrb r3, [r7, #7]
800016a: b29b uxth r3, r3
800016c: 3301 adds r3, #1
800016e: b29b uxth r3, r3
8000170: 6839 ldr r1, [r7, #0]
8000172: 4618 mov r0, r3
8000174: f000 fe78 bl 8000e68 <EE_ReadVariable>
8000178: 4603 mov r3, r0
}
800017a: 4618 mov r0, r3
800017c: 3708 adds r7, #8
800017e: 46bd mov sp, r7
8000180: bd80 pop {r7, pc}
08000182 <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
8000182: b580 push {r7, lr}
8000184: b082 sub sp, #8
8000186: af00 add r7, sp, #0
8000188: 4603 mov r3, r0
800018a: 460a mov r2, r1
800018c: 71fb strb r3, [r7, #7]
800018e: 4613 mov r3, r2
8000190: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
8000192: 79fb ldrb r3, [r7, #7]
8000194: b29b uxth r3, r3
8000196: 3301 adds r3, #1
8000198: b29b uxth r3, r3
800019a: 88ba ldrh r2, [r7, #4]
800019c: 4611 mov r1, r2
800019e: 4618 mov r0, r3
80001a0: f000 fe7e bl 8000ea0 <EE_WriteVariable>
80001a4: 4603 mov r3, r0
}
80001a6: 4618 mov r0, r3
80001a8: 3708 adds r7, #8
80001aa: 46bd mov sp, r7
80001ac: bd80 pop {r7, pc}
080001ae <toHex>:
extern TIM_HandleTypeDef htim2;
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim4;
extern const uint16_t EE_VirtAddrs[];
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80001ae: b490 push {r4, r7}
80001b0: b082 sub sp, #8
80001b2: af00 add r7, sp, #0
80001b4: 4604 mov r4, r0
80001b6: 4608 mov r0, r1
80001b8: 4611 mov r1, r2
80001ba: 461a mov r2, r3
80001bc: 4623 mov r3, r4
80001be: 71fb strb r3, [r7, #7]
80001c0: 4603 mov r3, r0
80001c2: 71bb strb r3, [r7, #6]
80001c4: 460b mov r3, r1
80001c6: 717b strb r3, [r7, #5]
80001c8: 4613 mov r3, r2
80001ca: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80001cc: 79fb ldrb r3, [r7, #7]
80001ce: 2b2f cmp r3, #47 @ 0x2f
80001d0: d906 bls.n 80001e0 <toHex+0x32>
80001d2: 79fb ldrb r3, [r7, #7]
80001d4: 2b39 cmp r3, #57 @ 0x39
80001d6: d803 bhi.n 80001e0 <toHex+0x32>
c1-='0';
80001d8: 79fb ldrb r3, [r7, #7]
80001da: 3b30 subs r3, #48 @ 0x30
80001dc: 71fb strb r3, [r7, #7]
80001de: e00b b.n 80001f8 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80001e0: 79fb ldrb r3, [r7, #7]
80001e2: 2b60 cmp r3, #96 @ 0x60
80001e4: d906 bls.n 80001f4 <toHex+0x46>
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 2b66 cmp r3, #102 @ 0x66
80001ea: d803 bhi.n 80001f4 <toHex+0x46>
c1=(c1-'a')+10;
80001ec: 79fb ldrb r3, [r7, #7]
80001ee: 3b57 subs r3, #87 @ 0x57
80001f0: 71fb strb r3, [r7, #7]
80001f2: e001 b.n 80001f8 <toHex+0x4a>
}else return false;
80001f4: 2300 movs r3, #0
80001f6: e070 b.n 80002da <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
80001f8: 79bb ldrb r3, [r7, #6]
80001fa: 2b2f cmp r3, #47 @ 0x2f
80001fc: d906 bls.n 800020c <toHex+0x5e>
80001fe: 79bb ldrb r3, [r7, #6]
8000200: 2b39 cmp r3, #57 @ 0x39
8000202: d803 bhi.n 800020c <toHex+0x5e>
c2-='0';
8000204: 79bb ldrb r3, [r7, #6]
8000206: 3b30 subs r3, #48 @ 0x30
8000208: 71bb strb r3, [r7, #6]
800020a: e00b b.n 8000224 <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
800020c: 79bb ldrb r3, [r7, #6]
800020e: 2b60 cmp r3, #96 @ 0x60
8000210: d906 bls.n 8000220 <toHex+0x72>
8000212: 79bb ldrb r3, [r7, #6]
8000214: 2b66 cmp r3, #102 @ 0x66
8000216: d803 bhi.n 8000220 <toHex+0x72>
c2=(c2-'a')+10;
8000218: 79bb ldrb r3, [r7, #6]
800021a: 3b57 subs r3, #87 @ 0x57
800021c: 71bb strb r3, [r7, #6]
800021e: e001 b.n 8000224 <toHex+0x76>
}else return false;
8000220: 2300 movs r3, #0
8000222: e05a b.n 80002da <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
8000224: 797b ldrb r3, [r7, #5]
8000226: 2b2f cmp r3, #47 @ 0x2f
8000228: d906 bls.n 8000238 <toHex+0x8a>
800022a: 797b ldrb r3, [r7, #5]
800022c: 2b39 cmp r3, #57 @ 0x39
800022e: d803 bhi.n 8000238 <toHex+0x8a>
c3-='0';
8000230: 797b ldrb r3, [r7, #5]
8000232: 3b30 subs r3, #48 @ 0x30
8000234: 717b strb r3, [r7, #5]
8000236: e00b b.n 8000250 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000238: 797b ldrb r3, [r7, #5]
800023a: 2b60 cmp r3, #96 @ 0x60
800023c: d906 bls.n 800024c <toHex+0x9e>
800023e: 797b ldrb r3, [r7, #5]
8000240: 2b66 cmp r3, #102 @ 0x66
8000242: d803 bhi.n 800024c <toHex+0x9e>
c3=(c3-'a')+10;
8000244: 797b ldrb r3, [r7, #5]
8000246: 3b57 subs r3, #87 @ 0x57
8000248: 717b strb r3, [r7, #5]
800024a: e001 b.n 8000250 <toHex+0xa2>
}else return false;
800024c: 2300 movs r3, #0
800024e: e044 b.n 80002da <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000250: 793b ldrb r3, [r7, #4]
8000252: 2b2f cmp r3, #47 @ 0x2f
8000254: d906 bls.n 8000264 <toHex+0xb6>
8000256: 793b ldrb r3, [r7, #4]
8000258: 2b39 cmp r3, #57 @ 0x39
800025a: d803 bhi.n 8000264 <toHex+0xb6>
c4-='0';
800025c: 793b ldrb r3, [r7, #4]
800025e: 3b30 subs r3, #48 @ 0x30
8000260: 713b strb r3, [r7, #4]
8000262: e00b b.n 800027c <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
8000264: 793b ldrb r3, [r7, #4]
8000266: 2b60 cmp r3, #96 @ 0x60
8000268: d906 bls.n 8000278 <toHex+0xca>
800026a: 793b ldrb r3, [r7, #4]
800026c: 2b66 cmp r3, #102 @ 0x66
800026e: d803 bhi.n 8000278 <toHex+0xca>
c4=(c4-'a')+10;
8000270: 793b ldrb r3, [r7, #4]
8000272: 3b57 subs r3, #87 @ 0x57
8000274: 713b strb r3, [r7, #4]
8000276: e001 b.n 800027c <toHex+0xce>
}else return false;
8000278: 2300 movs r3, #0
800027a: e02e b.n 80002da <toHex+0x12c>
*retval=c1;
800027c: 79fb ldrb r3, [r7, #7]
800027e: b29a uxth r2, r3
8000280: 693b ldr r3, [r7, #16]
8000282: 801a strh r2, [r3, #0]
*retval*=16;
8000284: 693b ldr r3, [r7, #16]
8000286: 881b ldrh r3, [r3, #0]
8000288: 011b lsls r3, r3, #4
800028a: b29a uxth r2, r3
800028c: 693b ldr r3, [r7, #16]
800028e: 801a strh r2, [r3, #0]
*retval+=c2;
8000290: 693b ldr r3, [r7, #16]
8000292: 881a ldrh r2, [r3, #0]
8000294: 79bb ldrb r3, [r7, #6]
8000296: b29b uxth r3, r3
8000298: 4413 add r3, r2
800029a: b29a uxth r2, r3
800029c: 693b ldr r3, [r7, #16]
800029e: 801a strh r2, [r3, #0]
*retval*=16;
80002a0: 693b ldr r3, [r7, #16]
80002a2: 881b ldrh r3, [r3, #0]
80002a4: 011b lsls r3, r3, #4
80002a6: b29a uxth r2, r3
80002a8: 693b ldr r3, [r7, #16]
80002aa: 801a strh r2, [r3, #0]
*retval+=c3;
80002ac: 693b ldr r3, [r7, #16]
80002ae: 881a ldrh r2, [r3, #0]
80002b0: 797b ldrb r3, [r7, #5]
80002b2: b29b uxth r3, r3
80002b4: 4413 add r3, r2
80002b6: b29a uxth r2, r3
80002b8: 693b ldr r3, [r7, #16]
80002ba: 801a strh r2, [r3, #0]
*retval*=16;
80002bc: 693b ldr r3, [r7, #16]
80002be: 881b ldrh r3, [r3, #0]
80002c0: 011b lsls r3, r3, #4
80002c2: b29a uxth r2, r3
80002c4: 693b ldr r3, [r7, #16]
80002c6: 801a strh r2, [r3, #0]
*retval+=c4;
80002c8: 693b ldr r3, [r7, #16]
80002ca: 881a ldrh r2, [r3, #0]
80002cc: 793b ldrb r3, [r7, #4]
80002ce: b29b uxth r3, r3
80002d0: 4413 add r3, r2
80002d2: b29a uxth r2, r3
80002d4: 693b ldr r3, [r7, #16]
80002d6: 801a strh r2, [r3, #0]
return true;
80002d8: 2301 movs r3, #1
}
80002da: 4618 mov r0, r3
80002dc: 3708 adds r7, #8
80002de: 46bd mov sp, r7
80002e0: bc90 pop {r4, r7}
80002e2: 4770 bx lr
080002e4 <manageCDC>:
void manageCDC(void){
80002e4: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
80002e8: b0a7 sub sp, #156 @ 0x9c
80002ea: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
80002ec: f009 fd40 bl 8009d70 <CDC_Available>
80002f0: 4603 mov r3, r0
80002f2: 2b00 cmp r3, #0
80002f4: f000 83e4 beq.w 8000ac0 <manageCDC+0x7dc>
int rx = CDC_ReadByte();
80002f8: f009 fd4e bl 8009d98 <CDC_ReadByte>
80002fc: 67b8 str r0, [r7, #120] @ 0x78
if (rx < 0) return;
80002fe: 6fbb ldr r3, [r7, #120] @ 0x78
8000300: 2b00 cmp r3, #0
8000302: f2c0 83dc blt.w 8000abe <manageCDC+0x7da>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
8000306: 4b82 ldr r3, [pc, #520] @ (8000510 <manageCDC+0x22c>)
8000308: 781b ldrb r3, [r3, #0]
800030a: 461a mov r2, r3
800030c: 6fbb ldr r3, [r7, #120] @ 0x78
800030e: b2d9 uxtb r1, r3
8000310: 4b80 ldr r3, [pc, #512] @ (8000514 <manageCDC+0x230>)
8000312: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
8000314: bf00 nop
8000316: 4b7e ldr r3, [pc, #504] @ (8000510 <manageCDC+0x22c>)
8000318: 781b ldrb r3, [r3, #0]
800031a: 461a mov r2, r3
800031c: 4b7d ldr r3, [pc, #500] @ (8000514 <manageCDC+0x230>)
800031e: 4413 add r3, r2
8000320: 2101 movs r1, #1
8000322: 4618 mov r0, r3
8000324: f009 fdfa bl 8009f1c <CDC_Transmit_FS>
8000328: 4603 mov r3, r0
800032a: 2b01 cmp r3, #1
800032c: d0f3 beq.n 8000316 <manageCDC+0x32>
if((rx==0x0d)||(rx==0x0a)){
800032e: 6fbb ldr r3, [r7, #120] @ 0x78
8000330: 2b0d cmp r3, #13
8000332: d003 beq.n 800033c <manageCDC+0x58>
8000334: 6fbb ldr r3, [r7, #120] @ 0x78
8000336: 2b0a cmp r3, #10
8000338: f040 83ba bne.w 8000ab0 <manageCDC+0x7cc>
if(rxidx){
800033c: 4b74 ldr r3, [pc, #464] @ (8000510 <manageCDC+0x22c>)
800033e: 781b ldrb r3, [r3, #0]
8000340: 2b00 cmp r3, #0
8000342: f000 83b1 beq.w 8000aa8 <manageCDC+0x7c4>
switch(rxbuf[0]){
8000346: 4b73 ldr r3, [pc, #460] @ (8000514 <manageCDC+0x230>)
8000348: 781b ldrb r3, [r3, #0]
800034a: 2b6d cmp r3, #109 @ 0x6d
800034c: f000 80a5 beq.w 800049a <manageCDC+0x1b6>
8000350: 2b6d cmp r3, #109 @ 0x6d
8000352: f300 8398 bgt.w 8000a86 <manageCDC+0x7a2>
8000356: 2b65 cmp r3, #101 @ 0x65
8000358: f000 81c6 beq.w 80006e8 <manageCDC+0x404>
800035c: 2b69 cmp r3, #105 @ 0x69
800035e: f040 8392 bne.w 8000a86 <manageCDC+0x7a2>
case 'i':
sprintf((char*)s,"\ninfo");
8000362: f107 030c add.w r3, r7, #12
8000366: 496c ldr r1, [pc, #432] @ (8000518 <manageCDC+0x234>)
8000368: 4618 mov r0, r3
800036a: f00a f9b5 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800036e: bf00 nop
8000370: f107 030c add.w r3, r7, #12
8000374: 2105 movs r1, #5
8000376: 4618 mov r0, r3
8000378: f009 fdd0 bl 8009f1c <CDC_Transmit_FS>
800037c: 4603 mov r3, r0
800037e: 2b01 cmp r3, #1
8000380: d0f6 beq.n 8000370 <manageCDC+0x8c>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
8000382: 2100 movs r1, #0
8000384: 4865 ldr r0, [pc, #404] @ (800051c <manageCDC+0x238>)
8000386: f001 f903 bl 8001590 <IsPwmRunning>
800038a: 4603 mov r3, r0
800038c: 4698 mov r8, r3
800038e: 2104 movs r1, #4
8000390: 4862 ldr r0, [pc, #392] @ (800051c <manageCDC+0x238>)
8000392: f001 f8fd bl 8001590 <IsPwmRunning>
8000396: 4603 mov r3, r0
8000398: 4699 mov r9, r3
800039a: 2108 movs r1, #8
800039c: 485f ldr r0, [pc, #380] @ (800051c <manageCDC+0x238>)
800039e: f001 f8f7 bl 8001590 <IsPwmRunning>
80003a2: 4603 mov r3, r0
80003a4: 461c mov r4, r3
80003a6: 210c movs r1, #12
80003a8: 485c ldr r0, [pc, #368] @ (800051c <manageCDC+0x238>)
80003aa: f001 f8f1 bl 8001590 <IsPwmRunning>
80003ae: 4603 mov r3, r0
80003b0: 461d mov r5, r3
80003b2: 2100 movs r1, #0
80003b4: 485a ldr r0, [pc, #360] @ (8000520 <manageCDC+0x23c>)
80003b6: f001 f8eb bl 8001590 <IsPwmRunning>
80003ba: 4603 mov r3, r0
80003bc: 461e mov r6, r3
80003be: 2104 movs r1, #4
80003c0: 4857 ldr r0, [pc, #348] @ (8000520 <manageCDC+0x23c>)
80003c2: f001 f8e5 bl 8001590 <IsPwmRunning>
80003c6: 4603 mov r3, r0
80003c8: 607b str r3, [r7, #4]
80003ca: 2108 movs r1, #8
80003cc: 4854 ldr r0, [pc, #336] @ (8000520 <manageCDC+0x23c>)
80003ce: f001 f8df bl 8001590 <IsPwmRunning>
80003d2: 4603 mov r3, r0
80003d4: 603b str r3, [r7, #0]
80003d6: 210c movs r1, #12
80003d8: 4851 ldr r0, [pc, #324] @ (8000520 <manageCDC+0x23c>)
80003da: f001 f8d9 bl 8001590 <IsPwmRunning>
80003de: 4603 mov r3, r0
80003e0: f107 000c add.w r0, r7, #12
80003e4: 9305 str r3, [sp, #20]
80003e6: 683a ldr r2, [r7, #0]
80003e8: 9204 str r2, [sp, #16]
80003ea: 687b ldr r3, [r7, #4]
80003ec: 9303 str r3, [sp, #12]
80003ee: 9602 str r6, [sp, #8]
80003f0: 9501 str r5, [sp, #4]
80003f2: 9400 str r4, [sp, #0]
80003f4: 464b mov r3, r9
80003f6: 4642 mov r2, r8
80003f8: 494a ldr r1, [pc, #296] @ (8000524 <manageCDC+0x240>)
80003fa: f00a f96d bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80003fe: bf00 nop
8000400: f107 030c add.w r3, r7, #12
8000404: 4618 mov r0, r3
8000406: f7ff fea1 bl 800014c <strlen>
800040a: 4603 mov r3, r0
800040c: b29a uxth r2, r3
800040e: f107 030c add.w r3, r7, #12
8000412: 4611 mov r1, r2
8000414: 4618 mov r0, r3
8000416: f009 fd81 bl 8009f1c <CDC_Transmit_FS>
800041a: 4603 mov r3, r0
800041c: 2b01 cmp r3, #1
800041e: d0ef beq.n 8000400 <manageCDC+0x11c>
__HAL_TIM_GET_COMPARE(&htim3, TIM_CHANNEL_1);
8000420: 4b41 ldr r3, [pc, #260] @ (8000528 <manageCDC+0x244>)
8000422: 681b ldr r3, [r3, #0]
8000424: 6b5b ldr r3, [r3, #52] @ 0x34
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
8000426: 4b3d ldr r3, [pc, #244] @ (800051c <manageCDC+0x238>)
8000428: 681b ldr r3, [r3, #0]
800042a: 6b5b ldr r3, [r3, #52] @ 0x34
800042c: 607b str r3, [r7, #4]
800042e: 4b3b ldr r3, [pc, #236] @ (800051c <manageCDC+0x238>)
8000430: 681b ldr r3, [r3, #0]
8000432: 6b99 ldr r1, [r3, #56] @ 0x38
8000434: 6039 str r1, [r7, #0]
8000436: 4b39 ldr r3, [pc, #228] @ (800051c <manageCDC+0x238>)
8000438: 681b ldr r3, [r3, #0]
800043a: 6bdb ldr r3, [r3, #60] @ 0x3c
800043c: 4a37 ldr r2, [pc, #220] @ (800051c <manageCDC+0x238>)
800043e: 6812 ldr r2, [r2, #0]
8000440: 6c12 ldr r2, [r2, #64] @ 0x40
8000442: 4937 ldr r1, [pc, #220] @ (8000520 <manageCDC+0x23c>)
8000444: 6809 ldr r1, [r1, #0]
8000446: 6b49 ldr r1, [r1, #52] @ 0x34
8000448: 4835 ldr r0, [pc, #212] @ (8000520 <manageCDC+0x23c>)
800044a: 6800 ldr r0, [r0, #0]
800044c: 6b80 ldr r0, [r0, #56] @ 0x38
800044e: 4c34 ldr r4, [pc, #208] @ (8000520 <manageCDC+0x23c>)
8000450: 6824 ldr r4, [r4, #0]
8000452: 6be4 ldr r4, [r4, #60] @ 0x3c
8000454: 4d32 ldr r5, [pc, #200] @ (8000520 <manageCDC+0x23c>)
8000456: 682d ldr r5, [r5, #0]
8000458: 6c2d ldr r5, [r5, #64] @ 0x40
800045a: f107 060c add.w r6, r7, #12
800045e: 9505 str r5, [sp, #20]
8000460: 9404 str r4, [sp, #16]
8000462: 9003 str r0, [sp, #12]
8000464: 9102 str r1, [sp, #8]
8000466: 9201 str r2, [sp, #4]
8000468: 9300 str r3, [sp, #0]
800046a: 683b ldr r3, [r7, #0]
800046c: 687a ldr r2, [r7, #4]
800046e: 492f ldr r1, [pc, #188] @ (800052c <manageCDC+0x248>)
8000470: 4630 mov r0, r6
8000472: f00a f931 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000476: bf00 nop
8000478: f107 030c add.w r3, r7, #12
800047c: 4618 mov r0, r3
800047e: f7ff fe65 bl 800014c <strlen>
8000482: 4603 mov r3, r0
8000484: b29a uxth r2, r3
8000486: f107 030c add.w r3, r7, #12
800048a: 4611 mov r1, r2
800048c: 4618 mov r0, r3
800048e: f009 fd45 bl 8009f1c <CDC_Transmit_FS>
8000492: 4603 mov r3, r0
8000494: 2b01 cmp r3, #1
8000496: d0ef beq.n 8000478 <manageCDC+0x194>
break;
8000498: e306 b.n 8000aa8 <manageCDC+0x7c4>
case 'm':
if(rxidx==8){
800049a: 4b1d ldr r3, [pc, #116] @ (8000510 <manageCDC+0x22c>)
800049c: 781b ldrb r3, [r3, #0]
800049e: 2b08 cmp r3, #8
80004a0: f040 8110 bne.w 80006c4 <manageCDC+0x3e0>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
80004a4: 4b1b ldr r3, [pc, #108] @ (8000514 <manageCDC+0x230>)
80004a6: 785b ldrb r3, [r3, #1]
80004a8: 2b30 cmp r3, #48 @ 0x30
80004aa: f240 80fa bls.w 80006a2 <manageCDC+0x3be>
80004ae: 4b19 ldr r3, [pc, #100] @ (8000514 <manageCDC+0x230>)
80004b0: 785b ldrb r3, [r3, #1]
80004b2: 2b34 cmp r3, #52 @ 0x34
80004b4: f200 80f5 bhi.w 80006a2 <manageCDC+0x3be>
mot=rxbuf[1]-='0';
80004b8: 4b16 ldr r3, [pc, #88] @ (8000514 <manageCDC+0x230>)
80004ba: 785b ldrb r3, [r3, #1]
80004bc: 3b30 subs r3, #48 @ 0x30
80004be: b2da uxtb r2, r3
80004c0: 4b14 ldr r3, [pc, #80] @ (8000514 <manageCDC+0x230>)
80004c2: 705a strb r2, [r3, #1]
80004c4: 4b13 ldr r3, [pc, #76] @ (8000514 <manageCDC+0x230>)
80004c6: 785b ldrb r3, [r3, #1]
80004c8: f887 3077 strb.w r3, [r7, #119] @ 0x77
if(rxbuf[2]=='f'){
80004cc: 4b11 ldr r3, [pc, #68] @ (8000514 <manageCDC+0x230>)
80004ce: 789b ldrb r3, [r3, #2]
80004d0: 2b66 cmp r3, #102 @ 0x66
80004d2: d103 bne.n 80004dc <manageCDC+0x1f8>
dir=FW;
80004d4: 2300 movs r3, #0
80004d6: f887 307f strb.w r3, [r7, #127] @ 0x7f
80004da: e02b b.n 8000534 <manageCDC+0x250>
}else if(rxbuf[2]=='b'){
80004dc: 4b0d ldr r3, [pc, #52] @ (8000514 <manageCDC+0x230>)
80004de: 789b ldrb r3, [r3, #2]
80004e0: 2b62 cmp r3, #98 @ 0x62
80004e2: d103 bne.n 80004ec <manageCDC+0x208>
dir=BW;
80004e4: 2301 movs r3, #1
80004e6: f887 307f strb.w r3, [r7, #127] @ 0x7f
80004ea: e023 b.n 8000534 <manageCDC+0x250>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80004ec: f107 030c add.w r3, r7, #12
80004f0: 490f ldr r1, [pc, #60] @ (8000530 <manageCDC+0x24c>)
80004f2: 4618 mov r0, r3
80004f4: f00a f8f0 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
80004f8: bf00 nop
80004fa: f107 030c add.w r3, r7, #12
80004fe: 2110 movs r1, #16
8000500: 4618 mov r0, r3
8000502: f009 fd0b bl 8009f1c <CDC_Transmit_FS>
8000506: 4603 mov r3, r0
8000508: 2b01 cmp r3, #1
800050a: d0f6 beq.n 80004fa <manageCDC+0x216>
break;
800050c: e2cc b.n 8000aa8 <manageCDC+0x7c4>
800050e: bf00 nop
8000510: 200001ec .word 0x200001ec
8000514: 200001f0 .word 0x200001f0
8000518: 0800b050 .word 0x0800b050
800051c: 20000284 .word 0x20000284
8000520: 200002cc .word 0x200002cc
8000524: 0800b058 .word 0x0800b058
8000528: 2000035c .word 0x2000035c
800052c: 0800b070 .word 0x0800b070
8000530: 0800b0a4 .word 0x0800b0a4
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000534: 4bb4 ldr r3, [pc, #720] @ (8000808 <manageCDC+0x524>)
8000536: 78db ldrb r3, [r3, #3]
8000538: 2b2f cmp r3, #47 @ 0x2f
800053a: f240 80a1 bls.w 8000680 <manageCDC+0x39c>
800053e: 4bb2 ldr r3, [pc, #712] @ (8000808 <manageCDC+0x524>)
8000540: 78db ldrb r3, [r3, #3]
8000542: 2b39 cmp r3, #57 @ 0x39
8000544: f200 809c bhi.w 8000680 <manageCDC+0x39c>
8000548: 4baf ldr r3, [pc, #700] @ (8000808 <manageCDC+0x524>)
800054a: 791b ldrb r3, [r3, #4]
800054c: 2b2f cmp r3, #47 @ 0x2f
800054e: f240 8097 bls.w 8000680 <manageCDC+0x39c>
8000552: 4bad ldr r3, [pc, #692] @ (8000808 <manageCDC+0x524>)
8000554: 791b ldrb r3, [r3, #4]
8000556: 2b39 cmp r3, #57 @ 0x39
8000558: f200 8092 bhi.w 8000680 <manageCDC+0x39c>
800055c: 4baa ldr r3, [pc, #680] @ (8000808 <manageCDC+0x524>)
800055e: 795b ldrb r3, [r3, #5]
8000560: 2b2f cmp r3, #47 @ 0x2f
8000562: f240 808d bls.w 8000680 <manageCDC+0x39c>
8000566: 4ba8 ldr r3, [pc, #672] @ (8000808 <manageCDC+0x524>)
8000568: 795b ldrb r3, [r3, #5]
800056a: 2b39 cmp r3, #57 @ 0x39
800056c: f200 8088 bhi.w 8000680 <manageCDC+0x39c>
8000570: 4ba5 ldr r3, [pc, #660] @ (8000808 <manageCDC+0x524>)
8000572: 799b ldrb r3, [r3, #6]
8000574: 2b2f cmp r3, #47 @ 0x2f
8000576: f240 8083 bls.w 8000680 <manageCDC+0x39c>
800057a: 4ba3 ldr r3, [pc, #652] @ (8000808 <manageCDC+0x524>)
800057c: 799b ldrb r3, [r3, #6]
800057e: 2b39 cmp r3, #57 @ 0x39
8000580: d87e bhi.n 8000680 <manageCDC+0x39c>
8000582: 4ba1 ldr r3, [pc, #644] @ (8000808 <manageCDC+0x524>)
8000584: 79db ldrb r3, [r3, #7]
8000586: 2b2f cmp r3, #47 @ 0x2f
8000588: d97a bls.n 8000680 <manageCDC+0x39c>
800058a: 4b9f ldr r3, [pc, #636] @ (8000808 <manageCDC+0x524>)
800058c: 79db ldrb r3, [r3, #7]
800058e: 2b39 cmp r3, #57 @ 0x39
8000590: d876 bhi.n 8000680 <manageCDC+0x39c>
dm=rxbuf[3]-='0';
8000592: 4b9d ldr r3, [pc, #628] @ (8000808 <manageCDC+0x524>)
8000594: 78db ldrb r3, [r3, #3]
8000596: 3b30 subs r3, #48 @ 0x30
8000598: b2da uxtb r2, r3
800059a: 4b9b ldr r3, [pc, #620] @ (8000808 <manageCDC+0x524>)
800059c: 70da strb r2, [r3, #3]
800059e: 4b9a ldr r3, [pc, #616] @ (8000808 <manageCDC+0x524>)
80005a0: 78db ldrb r3, [r3, #3]
80005a2: f887 3076 strb.w r3, [r7, #118] @ 0x76
m=rxbuf[4]-='0';
80005a6: 4b98 ldr r3, [pc, #608] @ (8000808 <manageCDC+0x524>)
80005a8: 791b ldrb r3, [r3, #4]
80005aa: 3b30 subs r3, #48 @ 0x30
80005ac: b2da uxtb r2, r3
80005ae: 4b96 ldr r3, [pc, #600] @ (8000808 <manageCDC+0x524>)
80005b0: 711a strb r2, [r3, #4]
80005b2: 4b95 ldr r3, [pc, #596] @ (8000808 <manageCDC+0x524>)
80005b4: 791b ldrb r3, [r3, #4]
80005b6: f887 3075 strb.w r3, [r7, #117] @ 0x75
c=rxbuf[5]-='0';
80005ba: 4b93 ldr r3, [pc, #588] @ (8000808 <manageCDC+0x524>)
80005bc: 795b ldrb r3, [r3, #5]
80005be: 3b30 subs r3, #48 @ 0x30
80005c0: b2da uxtb r2, r3
80005c2: 4b91 ldr r3, [pc, #580] @ (8000808 <manageCDC+0x524>)
80005c4: 715a strb r2, [r3, #5]
80005c6: 4b90 ldr r3, [pc, #576] @ (8000808 <manageCDC+0x524>)
80005c8: 795b ldrb r3, [r3, #5]
80005ca: f887 3074 strb.w r3, [r7, #116] @ 0x74
d=rxbuf[6]-='0';
80005ce: 4b8e ldr r3, [pc, #568] @ (8000808 <manageCDC+0x524>)
80005d0: 799b ldrb r3, [r3, #6]
80005d2: 3b30 subs r3, #48 @ 0x30
80005d4: b2da uxtb r2, r3
80005d6: 4b8c ldr r3, [pc, #560] @ (8000808 <manageCDC+0x524>)
80005d8: 719a strb r2, [r3, #6]
80005da: 4b8b ldr r3, [pc, #556] @ (8000808 <manageCDC+0x524>)
80005dc: 799b ldrb r3, [r3, #6]
80005de: f887 3073 strb.w r3, [r7, #115] @ 0x73
u=rxbuf[7]-='0';
80005e2: 4b89 ldr r3, [pc, #548] @ (8000808 <manageCDC+0x524>)
80005e4: 79db ldrb r3, [r3, #7]
80005e6: 3b30 subs r3, #48 @ 0x30
80005e8: b2da uxtb r2, r3
80005ea: 4b87 ldr r3, [pc, #540] @ (8000808 <manageCDC+0x524>)
80005ec: 71da strb r2, [r3, #7]
80005ee: 4b86 ldr r3, [pc, #536] @ (8000808 <manageCDC+0x524>)
80005f0: 79db ldrb r3, [r3, #7]
80005f2: f887 3072 strb.w r3, [r7, #114] @ 0x72
val=dm;
80005f6: f897 3076 ldrb.w r3, [r7, #118] @ 0x76
80005fa: b29b uxth r3, r3
80005fc: 817b strh r3, [r7, #10]
val*=10;
80005fe: 897b ldrh r3, [r7, #10]
8000600: 461a mov r2, r3
8000602: 0092 lsls r2, r2, #2
8000604: 4413 add r3, r2
8000606: 005b lsls r3, r3, #1
8000608: b29b uxth r3, r3
800060a: 817b strh r3, [r7, #10]
val+=m;
800060c: f897 3075 ldrb.w r3, [r7, #117] @ 0x75
8000610: b29a uxth r2, r3
8000612: 897b ldrh r3, [r7, #10]
8000614: 4413 add r3, r2
8000616: b29b uxth r3, r3
8000618: 817b strh r3, [r7, #10]
val*=10;
800061a: 897b ldrh r3, [r7, #10]
800061c: 461a mov r2, r3
800061e: 0092 lsls r2, r2, #2
8000620: 4413 add r3, r2
8000622: 005b lsls r3, r3, #1
8000624: b29b uxth r3, r3
8000626: 817b strh r3, [r7, #10]
val+=c;
8000628: f897 3074 ldrb.w r3, [r7, #116] @ 0x74
800062c: b29a uxth r2, r3
800062e: 897b ldrh r3, [r7, #10]
8000630: 4413 add r3, r2
8000632: b29b uxth r3, r3
8000634: 817b strh r3, [r7, #10]
val*=10;
8000636: 897b ldrh r3, [r7, #10]
8000638: 461a mov r2, r3
800063a: 0092 lsls r2, r2, #2
800063c: 4413 add r3, r2
800063e: 005b lsls r3, r3, #1
8000640: b29b uxth r3, r3
8000642: 817b strh r3, [r7, #10]
val+=d;
8000644: f897 3073 ldrb.w r3, [r7, #115] @ 0x73
8000648: b29a uxth r2, r3
800064a: 897b ldrh r3, [r7, #10]
800064c: 4413 add r3, r2
800064e: b29b uxth r3, r3
8000650: 817b strh r3, [r7, #10]
val*=10;
8000652: 897b ldrh r3, [r7, #10]
8000654: 461a mov r2, r3
8000656: 0092 lsls r2, r2, #2
8000658: 4413 add r3, r2
800065a: 005b lsls r3, r3, #1
800065c: b29b uxth r3, r3
800065e: 817b strh r3, [r7, #10]
val+=u;
8000660: f897 3072 ldrb.w r3, [r7, #114] @ 0x72
8000664: b29a uxth r2, r3
8000666: 897b ldrh r3, [r7, #10]
8000668: 4413 add r3, r2
800066a: b29b uxth r3, r3
800066c: 817b strh r3, [r7, #10]
SetMot(mot,dir,val);
800066e: 897a ldrh r2, [r7, #10]
8000670: f897 107f ldrb.w r1, [r7, #127] @ 0x7f
8000674: f897 3077 ldrb.w r3, [r7, #119] @ 0x77
8000678: 4618 mov r0, r3
800067a: f000 ffff bl 800167c <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800067e: e032 b.n 80006e6 <manageCDC+0x402>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
8000680: f107 030c add.w r3, r7, #12
8000684: 4961 ldr r1, [pc, #388] @ (800080c <manageCDC+0x528>)
8000686: 4618 mov r0, r3
8000688: f00a f826 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800068c: bf00 nop
800068e: f107 030c add.w r3, r7, #12
8000692: 2113 movs r1, #19
8000694: 4618 mov r0, r3
8000696: f009 fc41 bl 8009f1c <CDC_Transmit_FS>
800069a: 4603 mov r3, r0
800069c: 2b01 cmp r3, #1
800069e: d0f6 beq.n 800068e <manageCDC+0x3aa>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
80006a0: e021 b.n 80006e6 <manageCDC+0x402>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
80006a2: f107 030c add.w r3, r7, #12
80006a6: 495a ldr r1, [pc, #360] @ (8000810 <manageCDC+0x52c>)
80006a8: 4618 mov r0, r3
80006aa: f00a f815 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
80006ae: bf00 nop
80006b0: f107 030c add.w r3, r7, #12
80006b4: 2113 movs r1, #19
80006b6: 4618 mov r0, r3
80006b8: f009 fc30 bl 8009f1c <CDC_Transmit_FS>
80006bc: 4603 mov r3, r0
80006be: 2b01 cmp r3, #1
80006c0: d0f6 beq.n 80006b0 <manageCDC+0x3cc>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
80006c2: e1f1 b.n 8000aa8 <manageCDC+0x7c4>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
80006c4: f107 030c add.w r3, r7, #12
80006c8: 4952 ldr r1, [pc, #328] @ (8000814 <manageCDC+0x530>)
80006ca: 4618 mov r0, r3
80006cc: f00a f804 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80006d0: bf00 nop
80006d2: f107 030c add.w r3, r7, #12
80006d6: 210a movs r1, #10
80006d8: 4618 mov r0, r3
80006da: f009 fc1f bl 8009f1c <CDC_Transmit_FS>
80006de: 4603 mov r3, r0
80006e0: 2b01 cmp r3, #1
80006e2: d0f6 beq.n 80006d2 <manageCDC+0x3ee>
break;
80006e4: e1e0 b.n 8000aa8 <manageCDC+0x7c4>
80006e6: e1df b.n 8000aa8 <manageCDC+0x7c4>
case 'e':
if(rxidx>1){
80006e8: 4b4b ldr r3, [pc, #300] @ (8000818 <manageCDC+0x534>)
80006ea: 781b ldrb r3, [r3, #0]
80006ec: 2b01 cmp r3, #1
80006ee: f240 81b2 bls.w 8000a56 <manageCDC+0x772>
if(rxbuf[1]=='r'){
80006f2: 4b45 ldr r3, [pc, #276] @ (8000808 <manageCDC+0x524>)
80006f4: 785b ldrb r3, [r3, #1]
80006f6: 2b72 cmp r3, #114 @ 0x72
80006f8: f040 8098 bne.w 800082c <manageCDC+0x548>
if(rxidx==4){
80006fc: 4b46 ldr r3, [pc, #280] @ (8000818 <manageCDC+0x534>)
80006fe: 781b ldrb r3, [r3, #0]
8000700: 2b04 cmp r3, #4
8000702: d169 bne.n 80007d8 <manageCDC+0x4f4>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000704: 4b40 ldr r3, [pc, #256] @ (8000808 <manageCDC+0x524>)
8000706: 789a ldrb r2, [r3, #2]
8000708: 4b3f ldr r3, [pc, #252] @ (8000808 <manageCDC+0x524>)
800070a: 78d9 ldrb r1, [r3, #3]
800070c: f107 0308 add.w r3, r7, #8
8000710: 9300 str r3, [sp, #0]
8000712: 460b mov r3, r1
8000714: 2130 movs r1, #48 @ 0x30
8000716: 2030 movs r0, #48 @ 0x30
8000718: f7ff fd49 bl 80001ae <toHex>
800071c: 4603 mov r3, r0
800071e: 2b00 cmp r3, #0
8000720: d042 beq.n 80007a8 <manageCDC+0x4c4>
st=EEW_Read(eeadd, &val);
8000722: 893b ldrh r3, [r7, #8]
8000724: b2db uxtb r3, r3
8000726: f107 020a add.w r2, r7, #10
800072a: 4611 mov r1, r2
800072c: 4618 mov r0, r3
800072e: f7ff fd15 bl 800015c <EEW_Read>
8000732: 4603 mov r3, r0
8000734: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000738: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
800073c: 2b00 cmp r3, #0
800073e: d119 bne.n 8000774 <manageCDC+0x490>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
8000740: 893b ldrh r3, [r7, #8]
8000742: 461a mov r2, r3
8000744: 897b ldrh r3, [r7, #10]
8000746: f107 000c add.w r0, r7, #12
800074a: 4934 ldr r1, [pc, #208] @ (800081c <manageCDC+0x538>)
800074c: f009 ffc4 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000750: bf00 nop
8000752: f107 030c add.w r3, r7, #12
8000756: 4618 mov r0, r3
8000758: f7ff fcf8 bl 800014c <strlen>
800075c: 4603 mov r3, r0
800075e: b29a uxth r2, r3
8000760: f107 030c add.w r3, r7, #12
8000764: 4611 mov r1, r2
8000766: 4618 mov r0, r3
8000768: f009 fbd8 bl 8009f1c <CDC_Transmit_FS>
800076c: 4603 mov r3, r0
800076e: 2b01 cmp r3, #1
8000770: d0ef beq.n 8000752 <manageCDC+0x46e>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
8000772: e199 b.n 8000aa8 <manageCDC+0x7c4>
sprintf((char*)s,"\nee read error %d",st);
8000774: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000778: f107 030c add.w r3, r7, #12
800077c: 4928 ldr r1, [pc, #160] @ (8000820 <manageCDC+0x53c>)
800077e: 4618 mov r0, r3
8000780: f009 ffaa bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000784: bf00 nop
8000786: f107 030c add.w r3, r7, #12
800078a: 4618 mov r0, r3
800078c: f7ff fcde bl 800014c <strlen>
8000790: 4603 mov r3, r0
8000792: b29a uxth r2, r3
8000794: f107 030c add.w r3, r7, #12
8000798: 4611 mov r1, r2
800079a: 4618 mov r0, r3
800079c: f009 fbbe bl 8009f1c <CDC_Transmit_FS>
80007a0: 4603 mov r3, r0
80007a2: 2b01 cmp r3, #1
80007a4: d0ef beq.n 8000786 <manageCDC+0x4a2>
break;
80007a6: e17f b.n 8000aa8 <manageCDC+0x7c4>
sprintf((char*)s,"\n?eraa hex values");
80007a8: f107 030c add.w r3, r7, #12
80007ac: 491d ldr r1, [pc, #116] @ (8000824 <manageCDC+0x540>)
80007ae: 4618 mov r0, r3
80007b0: f009 ff92 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80007b4: bf00 nop
80007b6: f107 030c add.w r3, r7, #12
80007ba: 4618 mov r0, r3
80007bc: f7ff fcc6 bl 800014c <strlen>
80007c0: 4603 mov r3, r0
80007c2: b29a uxth r2, r3
80007c4: f107 030c add.w r3, r7, #12
80007c8: 4611 mov r1, r2
80007ca: 4618 mov r0, r3
80007cc: f009 fba6 bl 8009f1c <CDC_Transmit_FS>
80007d0: 4603 mov r3, r0
80007d2: 2b01 cmp r3, #1
80007d4: d0ef beq.n 80007b6 <manageCDC+0x4d2>
break;
80007d6: e167 b.n 8000aa8 <manageCDC+0x7c4>
sprintf((char*)s,"\n?eraa");
80007d8: f107 030c add.w r3, r7, #12
80007dc: 4912 ldr r1, [pc, #72] @ (8000828 <manageCDC+0x544>)
80007de: 4618 mov r0, r3
80007e0: f009 ff7a bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80007e4: bf00 nop
80007e6: f107 030c add.w r3, r7, #12
80007ea: 4618 mov r0, r3
80007ec: f7ff fcae bl 800014c <strlen>
80007f0: 4603 mov r3, r0
80007f2: b29a uxth r2, r3
80007f4: f107 030c add.w r3, r7, #12
80007f8: 4611 mov r1, r2
80007fa: 4618 mov r0, r3
80007fc: f009 fb8e bl 8009f1c <CDC_Transmit_FS>
8000800: 4603 mov r3, r0
8000802: 2b01 cmp r3, #1
8000804: d0ef beq.n 80007e6 <manageCDC+0x502>
break;
8000806: e14f b.n 8000aa8 <manageCDC+0x7c4>
8000808: 200001f0 .word 0x200001f0
800080c: 0800b0b8 .word 0x0800b0b8
8000810: 0800b0d8 .word 0x0800b0d8
8000814: 0800b0ec .word 0x0800b0ec
8000818: 200001ec .word 0x200001ec
800081c: 0800b0f8 .word 0x0800b0f8
8000820: 0800b10c .word 0x0800b10c
8000824: 0800b120 .word 0x0800b120
8000828: 0800b134 .word 0x0800b134
}else if(rxbuf[1]=='w'){
800082c: 4ba6 ldr r3, [pc, #664] @ (8000ac8 <manageCDC+0x7e4>)
800082e: 785b ldrb r3, [r3, #1]
8000830: 2b77 cmp r3, #119 @ 0x77
8000832: d169 bne.n 8000908 <manageCDC+0x624>
if(rxidx==8){
8000834: 4ba5 ldr r3, [pc, #660] @ (8000acc <manageCDC+0x7e8>)
8000836: 781b ldrb r3, [r3, #0]
8000838: 2b08 cmp r3, #8
800083a: d14d bne.n 80008d8 <manageCDC+0x5f4>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
800083c: 4ba2 ldr r3, [pc, #648] @ (8000ac8 <manageCDC+0x7e4>)
800083e: 789a ldrb r2, [r3, #2]
8000840: 4ba1 ldr r3, [pc, #644] @ (8000ac8 <manageCDC+0x7e4>)
8000842: 78d9 ldrb r1, [r3, #3]
8000844: f107 0308 add.w r3, r7, #8
8000848: 9300 str r3, [sp, #0]
800084a: 460b mov r3, r1
800084c: 2130 movs r1, #48 @ 0x30
800084e: 2030 movs r0, #48 @ 0x30
8000850: f7ff fcad bl 80001ae <toHex>
8000854: 4603 mov r3, r0
8000856: 2b00 cmp r3, #0
8000858: d037 beq.n 80008ca <manageCDC+0x5e6>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
800085a: 4b9b ldr r3, [pc, #620] @ (8000ac8 <manageCDC+0x7e4>)
800085c: 7918 ldrb r0, [r3, #4]
800085e: 4b9a ldr r3, [pc, #616] @ (8000ac8 <manageCDC+0x7e4>)
8000860: 7959 ldrb r1, [r3, #5]
8000862: 4b99 ldr r3, [pc, #612] @ (8000ac8 <manageCDC+0x7e4>)
8000864: 799a ldrb r2, [r3, #6]
8000866: 4b98 ldr r3, [pc, #608] @ (8000ac8 <manageCDC+0x7e4>)
8000868: 79dc ldrb r4, [r3, #7]
800086a: f107 030a add.w r3, r7, #10
800086e: 9300 str r3, [sp, #0]
8000870: 4623 mov r3, r4
8000872: f7ff fc9c bl 80001ae <toHex>
8000876: 4603 mov r3, r0
8000878: 2b00 cmp r3, #0
800087a: d01f beq.n 80008bc <manageCDC+0x5d8>
st=EEW_Write(eeadd, val);
800087c: 893b ldrh r3, [r7, #8]
800087e: b2db uxtb r3, r3
8000880: 897a ldrh r2, [r7, #10]
8000882: 4611 mov r1, r2
8000884: 4618 mov r0, r3
8000886: f7ff fc7c bl 8000182 <EEW_Write>
800088a: 4603 mov r3, r0
800088c: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000890: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000894: 2b00 cmp r3, #0
8000896: d108 bne.n 80008aa <manageCDC+0x5c6>
8000898: 893b ldrh r3, [r7, #8]
800089a: 461a mov r2, r3
800089c: 897b ldrh r3, [r7, #10]
800089e: f107 000c add.w r0, r7, #12
80008a2: 498b ldr r1, [pc, #556] @ (8000ad0 <manageCDC+0x7ec>)
80008a4: f009 ff18 bl 800a6d8 <siprintf>
80008a8: e01c b.n 80008e4 <manageCDC+0x600>
else sprintf((char*)s,"\nee write error %d", st);
80008aa: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
80008ae: f107 030c add.w r3, r7, #12
80008b2: 4988 ldr r1, [pc, #544] @ (8000ad4 <manageCDC+0x7f0>)
80008b4: 4618 mov r0, r3
80008b6: f009 ff0f bl 800a6d8 <siprintf>
80008ba: e013 b.n 80008e4 <manageCDC+0x600>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
80008bc: f107 030c add.w r3, r7, #12
80008c0: 4985 ldr r1, [pc, #532] @ (8000ad8 <manageCDC+0x7f4>)
80008c2: 4618 mov r0, r3
80008c4: f009 ff08 bl 800a6d8 <siprintf>
80008c8: e00c b.n 80008e4 <manageCDC+0x600>
}else sprintf((char*)s,"\n?ewaa hex values");
80008ca: f107 030c add.w r3, r7, #12
80008ce: 4983 ldr r1, [pc, #524] @ (8000adc <manageCDC+0x7f8>)
80008d0: 4618 mov r0, r3
80008d2: f009 ff01 bl 800a6d8 <siprintf>
80008d6: e005 b.n 80008e4 <manageCDC+0x600>
}else sprintf((char*)s,"\n?ewaavvvv");
80008d8: f107 030c add.w r3, r7, #12
80008dc: 4980 ldr r1, [pc, #512] @ (8000ae0 <manageCDC+0x7fc>)
80008de: 4618 mov r0, r3
80008e0: f009 fefa bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80008e4: bf00 nop
80008e6: f107 030c add.w r3, r7, #12
80008ea: 4618 mov r0, r3
80008ec: f7ff fc2e bl 800014c <strlen>
80008f0: 4603 mov r3, r0
80008f2: b29a uxth r2, r3
80008f4: f107 030c add.w r3, r7, #12
80008f8: 4611 mov r1, r2
80008fa: 4618 mov r0, r3
80008fc: f009 fb0e bl 8009f1c <CDC_Transmit_FS>
8000900: 4603 mov r3, r0
8000902: 2b01 cmp r3, #1
8000904: d0ef beq.n 80008e6 <manageCDC+0x602>
break;
8000906: e0cf b.n 8000aa8 <manageCDC+0x7c4>
}else if(rxbuf[1]=='d'){
8000908: 4b6f ldr r3, [pc, #444] @ (8000ac8 <manageCDC+0x7e4>)
800090a: 785b ldrb r3, [r3, #1]
800090c: 2b64 cmp r3, #100 @ 0x64
800090e: f040 808a bne.w 8000a26 <manageCDC+0x742>
if(rxidx==2){
8000912: 4b6e ldr r3, [pc, #440] @ (8000acc <manageCDC+0x7e8>)
8000914: 781b ldrb r3, [r3, #0]
8000916: 2b02 cmp r3, #2
8000918: d16d bne.n 80009f6 <manageCDC+0x712>
for(i=0;i<32;i++){
800091a: 2300 movs r3, #0
800091c: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000920: e064 b.n 80009ec <manageCDC+0x708>
if((i%4)==0){
8000922: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000926: f003 0303 and.w r3, r3, #3
800092a: b2db uxtb r3, r3
800092c: 2b00 cmp r3, #0
800092e: d116 bne.n 800095e <manageCDC+0x67a>
sprintf((char*)s,"\n");
8000930: f107 030c add.w r3, r7, #12
8000934: 496b ldr r1, [pc, #428] @ (8000ae4 <manageCDC+0x800>)
8000936: 4618 mov r0, r3
8000938: f009 fece bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800093c: bf00 nop
800093e: f107 030c add.w r3, r7, #12
8000942: 4618 mov r0, r3
8000944: f7ff fc02 bl 800014c <strlen>
8000948: 4603 mov r3, r0
800094a: b29a uxth r2, r3
800094c: f107 030c add.w r3, r7, #12
8000950: 4611 mov r1, r2
8000952: 4618 mov r0, r3
8000954: f009 fae2 bl 8009f1c <CDC_Transmit_FS>
8000958: 4603 mov r3, r0
800095a: 2b01 cmp r3, #1
800095c: d0ef beq.n 800093e <manageCDC+0x65a>
st=EEW_Read(i, &val);
800095e: f107 020a add.w r2, r7, #10
8000962: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000966: 4611 mov r1, r2
8000968: 4618 mov r0, r3
800096a: f7ff fbf7 bl 800015c <EEW_Read>
800096e: 4603 mov r3, r0
8000970: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000974: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000978: 2b00 cmp r3, #0
800097a: d119 bne.n 80009b0 <manageCDC+0x6cc>
sprintf((char*)s,"0x%02x=0x%04x ",i,val);
800097c: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000980: 897b ldrh r3, [r7, #10]
8000982: f107 000c add.w r0, r7, #12
8000986: 4958 ldr r1, [pc, #352] @ (8000ae8 <manageCDC+0x804>)
8000988: f009 fea6 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800098c: bf00 nop
800098e: f107 030c add.w r3, r7, #12
8000992: 4618 mov r0, r3
8000994: f7ff fbda bl 800014c <strlen>
8000998: 4603 mov r3, r0
800099a: b29a uxth r2, r3
800099c: f107 030c add.w r3, r7, #12
80009a0: 4611 mov r1, r2
80009a2: 4618 mov r0, r3
80009a4: f009 faba bl 8009f1c <CDC_Transmit_FS>
80009a8: 4603 mov r3, r0
80009aa: 2b01 cmp r3, #1
80009ac: d0ef beq.n 800098e <manageCDC+0x6aa>
80009ae: e018 b.n 80009e2 <manageCDC+0x6fe>
sprintf((char*)s,"rderr %d ",st);
80009b0: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
80009b4: f107 030c add.w r3, r7, #12
80009b8: 494c ldr r1, [pc, #304] @ (8000aec <manageCDC+0x808>)
80009ba: 4618 mov r0, r3
80009bc: f009 fe8c bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80009c0: bf00 nop
80009c2: f107 030c add.w r3, r7, #12
80009c6: 4618 mov r0, r3
80009c8: f7ff fbc0 bl 800014c <strlen>
80009cc: 4603 mov r3, r0
80009ce: b29a uxth r2, r3
80009d0: f107 030c add.w r3, r7, #12
80009d4: 4611 mov r1, r2
80009d6: 4618 mov r0, r3
80009d8: f009 faa0 bl 8009f1c <CDC_Transmit_FS>
80009dc: 4603 mov r3, r0
80009de: 2b01 cmp r3, #1
80009e0: d0ef beq.n 80009c2 <manageCDC+0x6de>
for(i=0;i<32;i++){
80009e2: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
80009e6: 3301 adds r3, #1
80009e8: f887 307e strb.w r3, [r7, #126] @ 0x7e
80009ec: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
80009f0: 2b1f cmp r3, #31
80009f2: d996 bls.n 8000922 <manageCDC+0x63e>
break;
80009f4: e058 b.n 8000aa8 <manageCDC+0x7c4>
sprintf((char*)s,"\n?ed");
80009f6: f107 030c add.w r3, r7, #12
80009fa: 493d ldr r1, [pc, #244] @ (8000af0 <manageCDC+0x80c>)
80009fc: 4618 mov r0, r3
80009fe: f009 fe6b bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a02: bf00 nop
8000a04: f107 030c add.w r3, r7, #12
8000a08: 4618 mov r0, r3
8000a0a: f7ff fb9f bl 800014c <strlen>
8000a0e: 4603 mov r3, r0
8000a10: b29a uxth r2, r3
8000a12: f107 030c add.w r3, r7, #12
8000a16: 4611 mov r1, r2
8000a18: 4618 mov r0, r3
8000a1a: f009 fa7f bl 8009f1c <CDC_Transmit_FS>
8000a1e: 4603 mov r3, r0
8000a20: 2b01 cmp r3, #1
8000a22: d0ef beq.n 8000a04 <manageCDC+0x720>
break;
8000a24: e040 b.n 8000aa8 <manageCDC+0x7c4>
sprintf((char*)s,"\n?er|w|d");
8000a26: f107 030c add.w r3, r7, #12
8000a2a: 4932 ldr r1, [pc, #200] @ (8000af4 <manageCDC+0x810>)
8000a2c: 4618 mov r0, r3
8000a2e: f009 fe53 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a32: bf00 nop
8000a34: f107 030c add.w r3, r7, #12
8000a38: 4618 mov r0, r3
8000a3a: f7ff fb87 bl 800014c <strlen>
8000a3e: 4603 mov r3, r0
8000a40: b29a uxth r2, r3
8000a42: f107 030c add.w r3, r7, #12
8000a46: 4611 mov r1, r2
8000a48: 4618 mov r0, r3
8000a4a: f009 fa67 bl 8009f1c <CDC_Transmit_FS>
8000a4e: 4603 mov r3, r0
8000a50: 2b01 cmp r3, #1
8000a52: d0ef beq.n 8000a34 <manageCDC+0x750>
break;
8000a54: e028 b.n 8000aa8 <manageCDC+0x7c4>
sprintf((char*)s,"\n?eraa | ewaavvvv");
8000a56: f107 030c add.w r3, r7, #12
8000a5a: 4927 ldr r1, [pc, #156] @ (8000af8 <manageCDC+0x814>)
8000a5c: 4618 mov r0, r3
8000a5e: f009 fe3b bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a62: bf00 nop
8000a64: f107 030c add.w r3, r7, #12
8000a68: 4618 mov r0, r3
8000a6a: f7ff fb6f bl 800014c <strlen>
8000a6e: 4603 mov r3, r0
8000a70: b29a uxth r2, r3
8000a72: f107 030c add.w r3, r7, #12
8000a76: 4611 mov r1, r2
8000a78: 4618 mov r0, r3
8000a7a: f009 fa4f bl 8009f1c <CDC_Transmit_FS>
8000a7e: 4603 mov r3, r0
8000a80: 2b01 cmp r3, #1
8000a82: d0ef beq.n 8000a64 <manageCDC+0x780>
break;
8000a84: e010 b.n 8000aa8 <manageCDC+0x7c4>
default:
sprintf((char*)s,"\n?");
8000a86: f107 030c add.w r3, r7, #12
8000a8a: 491c ldr r1, [pc, #112] @ (8000afc <manageCDC+0x818>)
8000a8c: 4618 mov r0, r3
8000a8e: f009 fe23 bl 800a6d8 <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8000a92: bf00 nop
8000a94: f107 030c add.w r3, r7, #12
8000a98: 2102 movs r1, #2
8000a9a: 4618 mov r0, r3
8000a9c: f009 fa3e bl 8009f1c <CDC_Transmit_FS>
8000aa0: 4603 mov r3, r0
8000aa2: 2b01 cmp r3, #1
8000aa4: d0f6 beq.n 8000a94 <manageCDC+0x7b0>
break;
8000aa6: bf00 nop
}
}
rxidx=0;
8000aa8: 4b08 ldr r3, [pc, #32] @ (8000acc <manageCDC+0x7e8>)
8000aaa: 2200 movs r2, #0
8000aac: 701a strb r2, [r3, #0]
8000aae: e007 b.n 8000ac0 <manageCDC+0x7dc>
}else rxidx++;
8000ab0: 4b06 ldr r3, [pc, #24] @ (8000acc <manageCDC+0x7e8>)
8000ab2: 781b ldrb r3, [r3, #0]
8000ab4: 3301 adds r3, #1
8000ab6: b2da uxtb r2, r3
8000ab8: 4b04 ldr r3, [pc, #16] @ (8000acc <manageCDC+0x7e8>)
8000aba: 701a strb r2, [r3, #0]
8000abc: e000 b.n 8000ac0 <manageCDC+0x7dc>
if (rx < 0) return;
8000abe: bf00 nop
// tiny spin or yield
}
}
8000ac0: 3784 adds r7, #132 @ 0x84
8000ac2: 46bd mov sp, r7
8000ac4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
8000ac8: 200001f0 .word 0x200001f0
8000acc: 200001ec .word 0x200001ec
8000ad0: 0800b13c .word 0x0800b13c
8000ad4: 0800b150 .word 0x0800b150
8000ad8: 0800b164 .word 0x0800b164
8000adc: 0800b17c .word 0x0800b17c
8000ae0: 0800b190 .word 0x0800b190
8000ae4: 0800b19c .word 0x0800b19c
8000ae8: 0800b1a0 .word 0x0800b1a0
8000aec: 0800b1b0 .word 0x0800b1b0
8000af0: 0800b1bc .word 0x0800b1bc
8000af4: 0800b1c4 .word 0x0800b1c4
8000af8: 0800b1d0 .word 0x0800b1d0
8000afc: 0800b1e4 .word 0x0800b1e4
08000b00 <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
8000b00: b480 push {r7}
8000b02: b083 sub sp, #12
8000b04: af00 add r7, sp, #0
8000b06: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
8000b08: 687b ldr r3, [r7, #4]
8000b0a: 881b ldrh r3, [r3, #0]
8000b0c: b29b uxth r3, r3
}
8000b0e: 4618 mov r0, r3
8000b10: 370c adds r7, #12
8000b12: 46bd mov sp, r7
8000b14: bc80 pop {r7}
8000b16: 4770 bx lr
08000b18 <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
8000b18: b5b0 push {r4, r5, r7, lr}
8000b1a: b084 sub sp, #16
8000b1c: af00 add r7, sp, #0
8000b1e: 6078 str r0, [r7, #4]
8000b20: 460b mov r3, r1
8000b22: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8000b24: f001 fd04 bl 8002530 <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
8000b28: 887b ldrh r3, [r7, #2]
8000b2a: 2200 movs r2, #0
8000b2c: 461c mov r4, r3
8000b2e: 4615 mov r5, r2
8000b30: 4622 mov r2, r4
8000b32: 462b mov r3, r5
8000b34: 6879 ldr r1, [r7, #4]
8000b36: 2001 movs r0, #1
8000b38: f001 fc8a bl 8002450 <HAL_FLASH_Program>
8000b3c: 4603 mov r3, r0
8000b3e: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
8000b40: f001 fd1c bl 800257c <HAL_FLASH_Lock>
return status;
8000b44: 7bfb ldrb r3, [r7, #15]
}
8000b46: 4618 mov r0, r3
8000b48: 3710 adds r7, #16
8000b4a: 46bd mov sp, r7
8000b4c: bdb0 pop {r4, r5, r7, pc}
08000b4e <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
8000b4e: b580 push {r7, lr}
8000b50: b088 sub sp, #32
8000b52: af00 add r7, sp, #0
8000b54: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8000b56: 2300 movs r3, #0
8000b58: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
8000b5a: f001 fce9 bl 8002530 <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
8000b5e: 2300 movs r3, #0
8000b60: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8000b62: 687b ldr r3, [r7, #4]
8000b64: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8000b66: 2301 movs r3, #1
8000b68: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
8000b6a: f107 0208 add.w r2, r7, #8
8000b6e: f107 030c add.w r3, r7, #12
8000b72: 4611 mov r1, r2
8000b74: 4618 mov r0, r3
8000b76: f001 fdc3 bl 8002700 <HAL_FLASHEx_Erase>
8000b7a: 4603 mov r3, r0
8000b7c: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
8000b7e: f001 fcfd bl 800257c <HAL_FLASH_Lock>
return status;
8000b82: 7ffb ldrb r3, [r7, #31]
}
8000b84: 4618 mov r0, r3
8000b86: 3720 adds r7, #32
8000b88: 46bd mov sp, r7
8000b8a: bd80 pop {r7, pc}
08000b8c <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
8000b8c: b480 push {r7}
8000b8e: b087 sub sp, #28
8000b90: af00 add r7, sp, #0
8000b92: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8000b94: 687b ldr r3, [r7, #4]
8000b96: 3302 adds r3, #2
8000b98: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8000b9a: 687b ldr r3, [r7, #4]
8000b9c: f503 6380 add.w r3, r3, #1024 @ 0x400
8000ba0: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8000ba2: e00c b.n 8000bbe <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8000ba4: 697b ldr r3, [r7, #20]
8000ba6: 881b ldrh r3, [r3, #0]
8000ba8: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
8000baa: 89fb ldrh r3, [r7, #14]
8000bac: f64f 72ff movw r2, #65535 @ 0xffff
8000bb0: 4293 cmp r3, r2
8000bb2: d101 bne.n 8000bb8 <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
8000bb4: 697b ldr r3, [r7, #20]
8000bb6: e008 b.n 8000bca <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
8000bb8: 697b ldr r3, [r7, #20]
8000bba: 3304 adds r3, #4
8000bbc: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8000bbe: 693b ldr r3, [r7, #16]
8000bc0: 3b03 subs r3, #3
8000bc2: 697a ldr r2, [r7, #20]
8000bc4: 429a cmp r2, r3
8000bc6: d3ed bcc.n 8000ba4 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
8000bc8: 2300 movs r3, #0
}
8000bca: 4618 mov r0, r3
8000bcc: 371c adds r7, #28
8000bce: 46bd mov sp, r7
8000bd0: bc80 pop {r7}
8000bd2: 4770 bx lr
08000bd4 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
8000bd4: b480 push {r7}
8000bd6: b089 sub sp, #36 @ 0x24
8000bd8: af00 add r7, sp, #0
8000bda: 60f8 str r0, [r7, #12]
8000bdc: 460b mov r3, r1
8000bde: 607a str r2, [r7, #4]
8000be0: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
8000be2: 68fb ldr r3, [r7, #12]
8000be4: 3302 adds r3, #2
8000be6: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8000be8: 68fb ldr r3, [r7, #12]
8000bea: f503 6380 add.w r3, r3, #1024 @ 0x400
8000bee: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
8000bf0: 2302 movs r3, #2
8000bf2: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
8000bf4: 2300 movs r3, #0
8000bf6: 833b strh r3, [r7, #24]
if (Data == NULL)
8000bf8: 687b ldr r3, [r7, #4]
8000bfa: 2b00 cmp r3, #0
8000bfc: d118 bne.n 8000c30 <EE_FindInPage+0x5c>
return EE_ERROR;
8000bfe: 2301 movs r3, #1
8000c00: e024 b.n 8000c4c <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8000c02: 69fb ldr r3, [r7, #28]
8000c04: 881b ldrh r3, [r3, #0]
8000c06: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
8000c08: 8a7b ldrh r3, [r7, #18]
8000c0a: f64f 72ff movw r2, #65535 @ 0xffff
8000c0e: 4293 cmp r3, r2
8000c10: d014 beq.n 8000c3c <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
8000c12: 69fb ldr r3, [r7, #28]
8000c14: 3302 adds r3, #2
8000c16: 881b ldrh r3, [r3, #0]
8000c18: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
8000c1a: 8a7a ldrh r2, [r7, #18]
8000c1c: 897b ldrh r3, [r7, #10]
8000c1e: 429a cmp r2, r3
8000c20: d103 bne.n 8000c2a <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
8000c22: 8a3b ldrh r3, [r7, #16]
8000c24: 833b strh r3, [r7, #24]
result = EE_OK;
8000c26: 2300 movs r3, #0
8000c28: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
8000c2a: 69fb ldr r3, [r7, #28]
8000c2c: 3304 adds r3, #4
8000c2e: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
8000c30: 697b ldr r3, [r7, #20]
8000c32: 3b04 subs r3, #4
8000c34: 69fa ldr r2, [r7, #28]
8000c36: 429a cmp r2, r3
8000c38: d9e3 bls.n 8000c02 <EE_FindInPage+0x2e>
8000c3a: e000 b.n 8000c3e <EE_FindInPage+0x6a>
break;
8000c3c: bf00 nop
}
if (result == EE_OK)
8000c3e: 7efb ldrb r3, [r7, #27]
8000c40: 2b00 cmp r3, #0
8000c42: d102 bne.n 8000c4a <EE_FindInPage+0x76>
*Data = lastVal;
8000c44: 687b ldr r3, [r7, #4]
8000c46: 8b3a ldrh r2, [r7, #24]
8000c48: 801a strh r2, [r3, #0]
return result;
8000c4a: 7efb ldrb r3, [r7, #27]
}
8000c4c: 4618 mov r0, r3
8000c4e: 3724 adds r7, #36 @ 0x24
8000c50: 46bd mov sp, r7
8000c52: bc80 pop {r7}
8000c54: 4770 bx lr
...
08000c58 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8000c58: b580 push {r7, lr}
8000c5a: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
8000c5c: 480f ldr r0, [pc, #60] @ (8000c9c <EE_Format+0x44>)
8000c5e: f7ff ff76 bl 8000b4e <EE_FlashErasePage>
8000c62: 4603 mov r3, r0
8000c64: 2b00 cmp r3, #0
8000c66: d001 beq.n 8000c6c <EE_Format+0x14>
return EE_STATUS_ERROR;
8000c68: 2301 movs r3, #1
8000c6a: e015 b.n 8000c98 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
8000c6c: 480c ldr r0, [pc, #48] @ (8000ca0 <EE_Format+0x48>)
8000c6e: f7ff ff6e bl 8000b4e <EE_FlashErasePage>
8000c72: 4603 mov r3, r0
8000c74: 2b00 cmp r3, #0
8000c76: d001 beq.n 8000c7c <EE_Format+0x24>
return EE_STATUS_ERROR;
8000c78: 2301 movs r3, #1
8000c7a: e00d b.n 8000c98 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
8000c7c: f64a 21aa movw r1, #43690 @ 0xaaaa
8000c80: 4806 ldr r0, [pc, #24] @ (8000c9c <EE_Format+0x44>)
8000c82: f7ff ff49 bl 8000b18 <EE_FlashProgramHalfWord>
8000c86: 4603 mov r3, r0
8000c88: 2b00 cmp r3, #0
8000c8a: d001 beq.n 8000c90 <EE_Format+0x38>
return EE_STATUS_ERROR;
8000c8c: 2301 movs r3, #1
8000c8e: e003 b.n 8000c98 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
8000c90: 4b04 ldr r3, [pc, #16] @ (8000ca4 <EE_Format+0x4c>)
8000c92: 4a02 ldr r2, [pc, #8] @ (8000c9c <EE_Format+0x44>)
8000c94: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8000c96: 2300 movs r3, #0
}
8000c98: 4618 mov r0, r3
8000c9a: bd80 pop {r7, pc}
8000c9c: 0800f800 .word 0x0800f800
8000ca0: 0800fc00 .word 0x0800fc00
8000ca4: 20000000 .word 0x20000000
08000ca8 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8000ca8: b480 push {r7}
8000caa: b083 sub sp, #12
8000cac: af00 add r7, sp, #0
8000cae: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
8000cb0: 687b ldr r3, [r7, #4]
8000cb2: 4a05 ldr r2, [pc, #20] @ (8000cc8 <EE_GetOtherPageBase+0x20>)
8000cb4: 4293 cmp r3, r2
8000cb6: d101 bne.n 8000cbc <EE_GetOtherPageBase+0x14>
8000cb8: 4b04 ldr r3, [pc, #16] @ (8000ccc <EE_GetOtherPageBase+0x24>)
8000cba: e000 b.n 8000cbe <EE_GetOtherPageBase+0x16>
8000cbc: 4b02 ldr r3, [pc, #8] @ (8000cc8 <EE_GetOtherPageBase+0x20>)
}
8000cbe: 4618 mov r0, r3
8000cc0: 370c adds r7, #12
8000cc2: 46bd mov sp, r7
8000cc4: bc80 pop {r7}
8000cc6: 4770 bx lr
8000cc8: 0800f800 .word 0x0800f800
8000ccc: 0800fc00 .word 0x0800fc00
08000cd0 <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
8000cd0: b580 push {r7, lr}
8000cd2: b088 sub sp, #32
8000cd4: af00 add r7, sp, #0
8000cd6: 4603 mov r3, r0
8000cd8: 460a mov r2, r1
8000cda: 80fb strh r3, [r7, #6]
8000cdc: 4613 mov r3, r2
8000cde: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
8000ce0: 4b3c ldr r3, [pc, #240] @ (8000dd4 <EE_PageTransfer+0x104>)
8000ce2: 681b ldr r3, [r3, #0]
8000ce4: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
8000ce6: 6978 ldr r0, [r7, #20]
8000ce8: f7ff ffde bl 8000ca8 <EE_GetOtherPageBase>
8000cec: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
8000cee: 6938 ldr r0, [r7, #16]
8000cf0: f7ff ff2d bl 8000b4e <EE_FlashErasePage>
8000cf4: 4603 mov r3, r0
8000cf6: 2b00 cmp r3, #0
8000cf8: d001 beq.n 8000cfe <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
8000cfa: 2301 movs r3, #1
8000cfc: e065 b.n 8000dca <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
8000cfe: f245 5155 movw r1, #21845 @ 0x5555
8000d02: 6938 ldr r0, [r7, #16]
8000d04: f7ff ff08 bl 8000b18 <EE_FlashProgramHalfWord>
8000d08: 4603 mov r3, r0
8000d0a: 2b00 cmp r3, #0
8000d0c: d001 beq.n 8000d12 <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
8000d0e: 2301 movs r3, #1
8000d10: e05b b.n 8000dca <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
8000d12: 693b ldr r3, [r7, #16]
8000d14: 3302 adds r3, #2
8000d16: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8000d18: 2300 movs r3, #0
8000d1a: 837b strh r3, [r7, #26]
8000d1c: e03c b.n 8000d98 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
8000d1e: 8b7b ldrh r3, [r7, #26]
8000d20: 4a2d ldr r2, [pc, #180] @ (8000dd8 <EE_PageTransfer+0x108>)
8000d22: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8000d26: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8000d28: 89fa ldrh r2, [r7, #14]
8000d2a: 88fb ldrh r3, [r7, #6]
8000d2c: 429a cmp r2, r3
8000d2e: d102 bne.n 8000d36 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
8000d30: 88bb ldrh r3, [r7, #4]
8000d32: 817b strh r3, [r7, #10]
8000d34: e00b b.n 8000d4e <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8000d36: f107 020a add.w r2, r7, #10
8000d3a: 89fb ldrh r3, [r7, #14]
8000d3c: 4619 mov r1, r3
8000d3e: 6978 ldr r0, [r7, #20]
8000d40: f7ff ff48 bl 8000bd4 <EE_FindInPage>
8000d44: 4603 mov r3, r0
8000d46: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8000d48: 7b7b ldrb r3, [r7, #13]
8000d4a: 2b00 cmp r3, #0
8000d4c: d120 bne.n 8000d90 <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
8000d4e: 89fb ldrh r3, [r7, #14]
8000d50: 4619 mov r1, r3
8000d52: 69f8 ldr r0, [r7, #28]
8000d54: f7ff fee0 bl 8000b18 <EE_FlashProgramHalfWord>
8000d58: 4603 mov r3, r0
8000d5a: 2b00 cmp r3, #0
8000d5c: d001 beq.n 8000d62 <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
8000d5e: 2301 movs r3, #1
8000d60: e033 b.n 8000dca <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
8000d62: 69fb ldr r3, [r7, #28]
8000d64: 3302 adds r3, #2
8000d66: 897a ldrh r2, [r7, #10]
8000d68: 4611 mov r1, r2
8000d6a: 4618 mov r0, r3
8000d6c: f7ff fed4 bl 8000b18 <EE_FlashProgramHalfWord>
8000d70: 4603 mov r3, r0
8000d72: 2b00 cmp r3, #0
8000d74: d001 beq.n 8000d7a <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8000d76: 2301 movs r3, #1
8000d78: e027 b.n 8000dca <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
8000d7a: 69fb ldr r3, [r7, #28]
8000d7c: 3304 adds r3, #4
8000d7e: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
8000d80: 693b ldr r3, [r7, #16]
8000d82: f503 6380 add.w r3, r3, #1024 @ 0x400
8000d86: 69fa ldr r2, [r7, #28]
8000d88: 429a cmp r2, r3
8000d8a: d302 bcc.n 8000d92 <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
8000d8c: 2303 movs r3, #3
8000d8e: e01c b.n 8000dca <EE_PageTransfer+0xfa>
continue;
8000d90: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8000d92: 8b7b ldrh r3, [r7, #26]
8000d94: 3301 adds r3, #1
8000d96: 837b strh r3, [r7, #26]
8000d98: 8b7b ldrh r3, [r7, #26]
8000d9a: 2b1f cmp r3, #31
8000d9c: d9bf bls.n 8000d1e <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
8000d9e: 6978 ldr r0, [r7, #20]
8000da0: f7ff fed5 bl 8000b4e <EE_FlashErasePage>
8000da4: 4603 mov r3, r0
8000da6: 2b00 cmp r3, #0
8000da8: d001 beq.n 8000dae <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
8000daa: 2301 movs r3, #1
8000dac: e00d b.n 8000dca <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
8000dae: f64a 21aa movw r1, #43690 @ 0xaaaa
8000db2: 6938 ldr r0, [r7, #16]
8000db4: f7ff feb0 bl 8000b18 <EE_FlashProgramHalfWord>
8000db8: 4603 mov r3, r0
8000dba: 2b00 cmp r3, #0
8000dbc: d001 beq.n 8000dc2 <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
8000dbe: 2301 movs r3, #1
8000dc0: e003 b.n 8000dca <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
8000dc2: 4a04 ldr r2, [pc, #16] @ (8000dd4 <EE_PageTransfer+0x104>)
8000dc4: 693b ldr r3, [r7, #16]
8000dc6: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
8000dc8: 2300 movs r3, #0
}
8000dca: 4618 mov r0, r3
8000dcc: 3720 adds r7, #32
8000dce: 46bd mov sp, r7
8000dd0: bd80 pop {r7, pc}
8000dd2: bf00 nop
8000dd4: 20000000 .word 0x20000000
8000dd8: 0800b238 .word 0x0800b238
08000ddc <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
8000ddc: b580 push {r7, lr}
8000dde: b082 sub sp, #8
8000de0: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
8000de2: 481e ldr r0, [pc, #120] @ (8000e5c <EE_Init+0x80>)
8000de4: f7ff fe8c bl 8000b00 <EE_GetPageStatus>
8000de8: 4603 mov r3, r0
8000dea: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
8000dec: 481c ldr r0, [pc, #112] @ (8000e60 <EE_Init+0x84>)
8000dee: f7ff fe87 bl 8000b00 <EE_GetPageStatus>
8000df2: 4603 mov r3, r0
8000df4: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
8000df6: 88fb ldrh r3, [r7, #6]
8000df8: f64f 72ff movw r2, #65535 @ 0xffff
8000dfc: 4293 cmp r3, r2
8000dfe: d108 bne.n 8000e12 <EE_Init+0x36>
8000e00: 88bb ldrh r3, [r7, #4]
8000e02: f64f 72ff movw r2, #65535 @ 0xffff
8000e06: 4293 cmp r3, r2
8000e08: d103 bne.n 8000e12 <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
8000e0a: f7ff ff25 bl 8000c58 <EE_Format>
8000e0e: 4603 mov r3, r0
8000e10: e020 b.n 8000e54 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
8000e12: 88fb ldrh r3, [r7, #6]
8000e14: f64a 22aa movw r2, #43690 @ 0xaaaa
8000e18: 4293 cmp r3, r2
8000e1a: d109 bne.n 8000e30 <EE_Init+0x54>
8000e1c: 88bb ldrh r3, [r7, #4]
8000e1e: f64f 72ff movw r2, #65535 @ 0xffff
8000e22: 4293 cmp r3, r2
8000e24: d104 bne.n 8000e30 <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8000e26: 4b0f ldr r3, [pc, #60] @ (8000e64 <EE_Init+0x88>)
8000e28: 4a0c ldr r2, [pc, #48] @ (8000e5c <EE_Init+0x80>)
8000e2a: 601a str r2, [r3, #0]
return EE_OK;
8000e2c: 2300 movs r3, #0
8000e2e: e011 b.n 8000e54 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
8000e30: 88bb ldrh r3, [r7, #4]
8000e32: f64a 22aa movw r2, #43690 @ 0xaaaa
8000e36: 4293 cmp r3, r2
8000e38: d109 bne.n 8000e4e <EE_Init+0x72>
8000e3a: 88fb ldrh r3, [r7, #6]
8000e3c: f64f 72ff movw r2, #65535 @ 0xffff
8000e40: 4293 cmp r3, r2
8000e42: d104 bne.n 8000e4e <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8000e44: 4b07 ldr r3, [pc, #28] @ (8000e64 <EE_Init+0x88>)
8000e46: 4a06 ldr r2, [pc, #24] @ (8000e60 <EE_Init+0x84>)
8000e48: 601a str r2, [r3, #0]
return EE_OK;
8000e4a: 2300 movs r3, #0
8000e4c: e002 b.n 8000e54 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
8000e4e: f7ff ff03 bl 8000c58 <EE_Format>
8000e52: 4603 mov r3, r0
}
}
8000e54: 4618 mov r0, r3
8000e56: 3708 adds r7, #8
8000e58: 46bd mov sp, r7
8000e5a: bd80 pop {r7, pc}
8000e5c: 0800f800 .word 0x0800f800
8000e60: 0800fc00 .word 0x0800fc00
8000e64: 20000000 .word 0x20000000
08000e68 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8000e68: b580 push {r7, lr}
8000e6a: b084 sub sp, #16
8000e6c: af00 add r7, sp, #0
8000e6e: 4603 mov r3, r0
8000e70: 6039 str r1, [r7, #0]
8000e72: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8000e74: 683b ldr r3, [r7, #0]
8000e76: 2b00 cmp r3, #0
8000e78: d101 bne.n 8000e7e <EE_ReadVariable+0x16>
return EE_ERROR;
8000e7a: 2301 movs r3, #1
8000e7c: e00a b.n 8000e94 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
8000e7e: 4b07 ldr r3, [pc, #28] @ (8000e9c <EE_ReadVariable+0x34>)
8000e80: 681b ldr r3, [r3, #0]
8000e82: 88f9 ldrh r1, [r7, #6]
8000e84: 683a ldr r2, [r7, #0]
8000e86: 4618 mov r0, r3
8000e88: f7ff fea4 bl 8000bd4 <EE_FindInPage>
8000e8c: 4603 mov r3, r0
8000e8e: 73fb strb r3, [r7, #15]
return (uint16_t)st;
8000e90: 7bfb ldrb r3, [r7, #15]
8000e92: b29b uxth r3, r3
}
8000e94: 4618 mov r0, r3
8000e96: 3710 adds r7, #16
8000e98: 46bd mov sp, r7
8000e9a: bd80 pop {r7, pc}
8000e9c: 20000000 .word 0x20000000
08000ea0 <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
8000ea0: b580 push {r7, lr}
8000ea2: b084 sub sp, #16
8000ea4: af00 add r7, sp, #0
8000ea6: 4603 mov r3, r0
8000ea8: 460a mov r2, r1
8000eaa: 80fb strh r3, [r7, #6]
8000eac: 4613 mov r3, r2
8000eae: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
8000eb0: 4b17 ldr r3, [pc, #92] @ (8000f10 <EE_WriteVariable+0x70>)
8000eb2: 681b ldr r3, [r3, #0]
8000eb4: 4618 mov r0, r3
8000eb6: f7ff fe69 bl 8000b8c <EE_FindFreeAddress>
8000eba: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
8000ebc: 68fb ldr r3, [r7, #12]
8000ebe: 2b00 cmp r3, #0
8000ec0: d017 beq.n 8000ef2 <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
8000ec2: 88fb ldrh r3, [r7, #6]
8000ec4: 4619 mov r1, r3
8000ec6: 68f8 ldr r0, [r7, #12]
8000ec8: f7ff fe26 bl 8000b18 <EE_FlashProgramHalfWord>
8000ecc: 4603 mov r3, r0
8000ece: 2b00 cmp r3, #0
8000ed0: d001 beq.n 8000ed6 <EE_WriteVariable+0x36>
return EE_ERROR;
8000ed2: 2301 movs r3, #1
8000ed4: e017 b.n 8000f06 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
8000ed6: 68fb ldr r3, [r7, #12]
8000ed8: 3302 adds r3, #2
8000eda: 88ba ldrh r2, [r7, #4]
8000edc: 4611 mov r1, r2
8000ede: 4618 mov r0, r3
8000ee0: f7ff fe1a bl 8000b18 <EE_FlashProgramHalfWord>
8000ee4: 4603 mov r3, r0
8000ee6: 2b00 cmp r3, #0
8000ee8: d001 beq.n 8000eee <EE_WriteVariable+0x4e>
return EE_ERROR;
8000eea: 2301 movs r3, #1
8000eec: e00b b.n 8000f06 <EE_WriteVariable+0x66>
return EE_OK;
8000eee: 2300 movs r3, #0
8000ef0: e009 b.n 8000f06 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
8000ef2: 88ba ldrh r2, [r7, #4]
8000ef4: 88fb ldrh r3, [r7, #6]
8000ef6: 4611 mov r1, r2
8000ef8: 4618 mov r0, r3
8000efa: f7ff fee9 bl 8000cd0 <EE_PageTransfer>
8000efe: 4603 mov r3, r0
8000f00: 72fb strb r3, [r7, #11]
return (uint16_t)st;
8000f02: 7afb ldrb r3, [r7, #11]
8000f04: b29b uxth r3, r3
}
8000f06: 4618 mov r0, r3
8000f08: 3710 adds r7, #16
8000f0a: 46bd mov sp, r7
8000f0c: bd80 pop {r7, pc}
8000f0e: bf00 nop
8000f10: 20000000 .word 0x20000000
08000f14 <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
8000f14: b580 push {r7, lr}
8000f16: af00 add r7, sp, #0
static unsigned char c10ms = 0;
static uint8_t c100ms = 0;
static uint8_t c1s = 0;
if (++c10ms >= 10) { // 10 ms
8000f18: 4b16 ldr r3, [pc, #88] @ (8000f74 <HAL_SYSTICK_Callback+0x60>)
8000f1a: 781b ldrb r3, [r3, #0]
8000f1c: 3301 adds r3, #1
8000f1e: b2da uxtb r2, r3
8000f20: 4b14 ldr r3, [pc, #80] @ (8000f74 <HAL_SYSTICK_Callback+0x60>)
8000f22: 701a strb r2, [r3, #0]
8000f24: 4b13 ldr r3, [pc, #76] @ (8000f74 <HAL_SYSTICK_Callback+0x60>)
8000f26: 781b ldrb r3, [r3, #0]
8000f28: 2b09 cmp r3, #9
8000f2a: d921 bls.n 8000f70 <HAL_SYSTICK_Callback+0x5c>
c10ms = 0;
8000f2c: 4b11 ldr r3, [pc, #68] @ (8000f74 <HAL_SYSTICK_Callback+0x60>)
8000f2e: 2200 movs r2, #0
8000f30: 701a strb r2, [r3, #0]
if (++c100ms >= 10) { // 10 ms
8000f32: 4b11 ldr r3, [pc, #68] @ (8000f78 <HAL_SYSTICK_Callback+0x64>)
8000f34: 781b ldrb r3, [r3, #0]
8000f36: 3301 adds r3, #1
8000f38: b2da uxtb r2, r3
8000f3a: 4b0f ldr r3, [pc, #60] @ (8000f78 <HAL_SYSTICK_Callback+0x64>)
8000f3c: 701a strb r2, [r3, #0]
8000f3e: 4b0e ldr r3, [pc, #56] @ (8000f78 <HAL_SYSTICK_Callback+0x64>)
8000f40: 781b ldrb r3, [r3, #0]
8000f42: 2b09 cmp r3, #9
8000f44: d914 bls.n 8000f70 <HAL_SYSTICK_Callback+0x5c>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8000f46: 4b0c ldr r3, [pc, #48] @ (8000f78 <HAL_SYSTICK_Callback+0x64>)
8000f48: 2200 movs r2, #0
8000f4a: 701a strb r2, [r3, #0]
if (++c1s >= 10) { // 10 ms
8000f4c: 4b0b ldr r3, [pc, #44] @ (8000f7c <HAL_SYSTICK_Callback+0x68>)
8000f4e: 781b ldrb r3, [r3, #0]
8000f50: 3301 adds r3, #1
8000f52: b2da uxtb r2, r3
8000f54: 4b09 ldr r3, [pc, #36] @ (8000f7c <HAL_SYSTICK_Callback+0x68>)
8000f56: 701a strb r2, [r3, #0]
8000f58: 4b08 ldr r3, [pc, #32] @ (8000f7c <HAL_SYSTICK_Callback+0x68>)
8000f5a: 781b ldrb r3, [r3, #0]
8000f5c: 2b09 cmp r3, #9
8000f5e: d907 bls.n 8000f70 <HAL_SYSTICK_Callback+0x5c>
c1s = 0;
8000f60: 4b06 ldr r3, [pc, #24] @ (8000f7c <HAL_SYSTICK_Callback+0x68>)
8000f62: 2200 movs r2, #0
8000f64: 701a strb r2, [r3, #0]
HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13);
8000f66: f44f 5100 mov.w r1, #8192 @ 0x2000
8000f6a: 4805 ldr r0, [pc, #20] @ (8000f80 <HAL_SYSTICK_Callback+0x6c>)
8000f6c: f001 fe0c bl 8002b88 <HAL_GPIO_TogglePin>
}
}
}
}
8000f70: bf00 nop
8000f72: bd80 pop {r7, pc}
8000f74: 200003a4 .word 0x200003a4
8000f78: 200003a5 .word 0x200003a5
8000f7c: 200003a6 .word 0x200003a6
8000f80: 40011000 .word 0x40011000
08000f84 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000f84: b580 push {r7, lr}
8000f86: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000f88: f000 feda bl 8001d40 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000f8c: f000 f844 bl 8001018 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8000f90: f000 fa4e bl 8001430 <MX_GPIO_Init>
MX_USB_DEVICE_Init();
8000f94: f008 fe86 bl 8009ca4 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
8000f98: f000 f8da bl 8001150 <MX_TIM2_Init>
MX_TIM4_Init();
8000f9c: f000 f97c bl 8001298 <MX_TIM4_Init>
MX_ADC1_Init();
8000fa0: f000 f898 bl 80010d4 <MX_ADC1_Init>
MX_USART1_UART_Init();
8000fa4: f000 fa1a bl 80013dc <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
StopMot(timMot1,FWMot1);
8000fa8: 2100 movs r1, #0
8000faa: 4818 ldr r0, [pc, #96] @ (800100c <main+0x88>)
8000fac: f000 fb05 bl 80015ba <StopMot>
StopMot(timMot1,BWMot1);
8000fb0: 2104 movs r1, #4
8000fb2: 4816 ldr r0, [pc, #88] @ (800100c <main+0x88>)
8000fb4: f000 fb01 bl 80015ba <StopMot>
StopMot(timMot2,FWMot2);
8000fb8: 2108 movs r1, #8
8000fba: 4814 ldr r0, [pc, #80] @ (800100c <main+0x88>)
8000fbc: f000 fafd bl 80015ba <StopMot>
StopMot(timMot2,BWMot2);
8000fc0: 210c movs r1, #12
8000fc2: 4812 ldr r0, [pc, #72] @ (800100c <main+0x88>)
8000fc4: f000 faf9 bl 80015ba <StopMot>
StopMot(timMot3,FWMot3);
8000fc8: 2100 movs r1, #0
8000fca: 4811 ldr r0, [pc, #68] @ (8001010 <main+0x8c>)
8000fcc: f000 faf5 bl 80015ba <StopMot>
StopMot(timMot3,BWMot3);
8000fd0: 2104 movs r1, #4
8000fd2: 480f ldr r0, [pc, #60] @ (8001010 <main+0x8c>)
8000fd4: f000 faf1 bl 80015ba <StopMot>
StopMot(timMot4,FWMot4);
8000fd8: 2108 movs r1, #8
8000fda: 480d ldr r0, [pc, #52] @ (8001010 <main+0x8c>)
8000fdc: f000 faed bl 80015ba <StopMot>
StopMot(timMot4,BWMot4);
8000fe0: 210c movs r1, #12
8000fe2: 480b ldr r0, [pc, #44] @ (8001010 <main+0x8c>)
8000fe4: f000 fae9 bl 80015ba <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
8000fe8: bf00 nop
8000fea: 2107 movs r1, #7
8000fec: 4809 ldr r0, [pc, #36] @ (8001014 <main+0x90>)
8000fee: f008 ff95 bl 8009f1c <CDC_Transmit_FS>
8000ff2: 4603 mov r3, r0
8000ff4: 2b01 cmp r3, #1
8000ff6: d0f8 beq.n 8000fea <main+0x66>
if (EE_Init() != EE_OK){
8000ff8: f7ff fef0 bl 8000ddc <EE_Init>
8000ffc: 4603 mov r3, r0
8000ffe: 2b00 cmp r3, #0
8001000: d001 beq.n 8001006 <main+0x82>
for(;;);//errore eeprom
8001002: bf00 nop
8001004: e7fd b.n 8001002 <main+0x7e>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
manageCDC();
8001006: f7ff f96d bl 80002e4 <manageCDC>
800100a: e7fc b.n 8001006 <main+0x82>
800100c: 20000284 .word 0x20000284
8001010: 200002cc .word 0x200002cc
8001014: 0800b1e8 .word 0x0800b1e8
08001018 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8001018: b580 push {r7, lr}
800101a: b094 sub sp, #80 @ 0x50
800101c: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
800101e: f107 0328 add.w r3, r7, #40 @ 0x28
8001022: 2228 movs r2, #40 @ 0x28
8001024: 2100 movs r1, #0
8001026: 4618 mov r0, r3
8001028: f009 fb78 bl 800a71c <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
800102c: f107 0314 add.w r3, r7, #20
8001030: 2200 movs r2, #0
8001032: 601a str r2, [r3, #0]
8001034: 605a str r2, [r3, #4]
8001036: 609a str r2, [r3, #8]
8001038: 60da str r2, [r3, #12]
800103a: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
800103c: 1d3b adds r3, r7, #4
800103e: 2200 movs r2, #0
8001040: 601a str r2, [r3, #0]
8001042: 605a str r2, [r3, #4]
8001044: 609a str r2, [r3, #8]
8001046: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8001048: 2301 movs r3, #1
800104a: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
800104c: f44f 3380 mov.w r3, #65536 @ 0x10000
8001050: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
8001052: 2300 movs r3, #0
8001054: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8001056: 2301 movs r3, #1
8001058: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
800105a: 2302 movs r3, #2
800105c: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
800105e: f44f 3380 mov.w r3, #65536 @ 0x10000
8001062: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
8001064: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000
8001068: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
800106a: f107 0328 add.w r3, r7, #40 @ 0x28
800106e: 4618 mov r0, r3
8001070: f003 fb04 bl 800467c <HAL_RCC_OscConfig>
8001074: 4603 mov r3, r0
8001076: 2b00 cmp r3, #0
8001078: d001 beq.n 800107e <SystemClock_Config+0x66>
{
Error_Handler();
800107a: f000 fa83 bl 8001584 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
800107e: 230f movs r3, #15
8001080: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8001082: 2302 movs r3, #2
8001084: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8001086: 2300 movs r3, #0
8001088: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
800108a: f44f 6380 mov.w r3, #1024 @ 0x400
800108e: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8001090: 2300 movs r3, #0
8001092: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
8001094: f107 0314 add.w r3, r7, #20
8001098: 2102 movs r1, #2
800109a: 4618 mov r0, r3
800109c: f003 fd70 bl 8004b80 <HAL_RCC_ClockConfig>
80010a0: 4603 mov r3, r0
80010a2: 2b00 cmp r3, #0
80010a4: d001 beq.n 80010aa <SystemClock_Config+0x92>
{
Error_Handler();
80010a6: f000 fa6d bl 8001584 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
80010aa: 2312 movs r3, #18
80010ac: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
80010ae: f44f 4300 mov.w r3, #32768 @ 0x8000
80010b2: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
80010b4: 2300 movs r3, #0
80010b6: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
80010b8: 1d3b adds r3, r7, #4
80010ba: 4618 mov r0, r3
80010bc: f003 feee bl 8004e9c <HAL_RCCEx_PeriphCLKConfig>
80010c0: 4603 mov r3, r0
80010c2: 2b00 cmp r3, #0
80010c4: d001 beq.n 80010ca <SystemClock_Config+0xb2>
{
Error_Handler();
80010c6: f000 fa5d bl 8001584 <Error_Handler>
}
}
80010ca: bf00 nop
80010cc: 3750 adds r7, #80 @ 0x50
80010ce: 46bd mov sp, r7
80010d0: bd80 pop {r7, pc}
...
080010d4 <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
80010d4: b580 push {r7, lr}
80010d6: b084 sub sp, #16
80010d8: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
80010da: 1d3b adds r3, r7, #4
80010dc: 2200 movs r2, #0
80010de: 601a str r2, [r3, #0]
80010e0: 605a str r2, [r3, #4]
80010e2: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
80010e4: 4b18 ldr r3, [pc, #96] @ (8001148 <MX_ADC1_Init+0x74>)
80010e6: 4a19 ldr r2, [pc, #100] @ (800114c <MX_ADC1_Init+0x78>)
80010e8: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
80010ea: 4b17 ldr r3, [pc, #92] @ (8001148 <MX_ADC1_Init+0x74>)
80010ec: 2200 movs r2, #0
80010ee: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = DISABLE;
80010f0: 4b15 ldr r3, [pc, #84] @ (8001148 <MX_ADC1_Init+0x74>)
80010f2: 2200 movs r2, #0
80010f4: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
80010f6: 4b14 ldr r3, [pc, #80] @ (8001148 <MX_ADC1_Init+0x74>)
80010f8: 2200 movs r2, #0
80010fa: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
80010fc: 4b12 ldr r3, [pc, #72] @ (8001148 <MX_ADC1_Init+0x74>)
80010fe: f44f 2260 mov.w r2, #917504 @ 0xe0000
8001102: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8001104: 4b10 ldr r3, [pc, #64] @ (8001148 <MX_ADC1_Init+0x74>)
8001106: 2200 movs r2, #0
8001108: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 1;
800110a: 4b0f ldr r3, [pc, #60] @ (8001148 <MX_ADC1_Init+0x74>)
800110c: 2201 movs r2, #1
800110e: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8001110: 480d ldr r0, [pc, #52] @ (8001148 <MX_ADC1_Init+0x74>)
8001112: f000 fe77 bl 8001e04 <HAL_ADC_Init>
8001116: 4603 mov r3, r0
8001118: 2b00 cmp r3, #0
800111a: d001 beq.n 8001120 <MX_ADC1_Init+0x4c>
{
Error_Handler();
800111c: f000 fa32 bl 8001584 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
8001120: 2304 movs r3, #4
8001122: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8001124: 2301 movs r3, #1
8001126: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
8001128: 2300 movs r3, #0
800112a: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
800112c: 1d3b adds r3, r7, #4
800112e: 4619 mov r1, r3
8001130: 4805 ldr r0, [pc, #20] @ (8001148 <MX_ADC1_Init+0x74>)
8001132: f000 ff3f bl 8001fb4 <HAL_ADC_ConfigChannel>
8001136: 4603 mov r3, r0
8001138: 2b00 cmp r3, #0
800113a: d001 beq.n 8001140 <MX_ADC1_Init+0x6c>
{
Error_Handler();
800113c: f000 fa22 bl 8001584 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8001140: bf00 nop
8001142: 3710 adds r7, #16
8001144: 46bd mov sp, r7
8001146: bd80 pop {r7, pc}
8001148: 20000254 .word 0x20000254
800114c: 40012400 .word 0x40012400
08001150 <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
8001150: b580 push {r7, lr}
8001152: b08e sub sp, #56 @ 0x38
8001154: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8001156: f107 0328 add.w r3, r7, #40 @ 0x28
800115a: 2200 movs r2, #0
800115c: 601a str r2, [r3, #0]
800115e: 605a str r2, [r3, #4]
8001160: 609a str r2, [r3, #8]
8001162: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8001164: f107 0320 add.w r3, r7, #32
8001168: 2200 movs r2, #0
800116a: 601a str r2, [r3, #0]
800116c: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
800116e: 1d3b adds r3, r7, #4
8001170: 2200 movs r2, #0
8001172: 601a str r2, [r3, #0]
8001174: 605a str r2, [r3, #4]
8001176: 609a str r2, [r3, #8]
8001178: 60da str r2, [r3, #12]
800117a: 611a str r2, [r3, #16]
800117c: 615a str r2, [r3, #20]
800117e: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8001180: 4b44 ldr r3, [pc, #272] @ (8001294 <MX_TIM2_Init+0x144>)
8001182: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8001186: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8001188: 4b42 ldr r3, [pc, #264] @ (8001294 <MX_TIM2_Init+0x144>)
800118a: 2200 movs r2, #0
800118c: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
800118e: 4b41 ldr r3, [pc, #260] @ (8001294 <MX_TIM2_Init+0x144>)
8001190: 2200 movs r2, #0
8001192: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
8001194: 4b3f ldr r3, [pc, #252] @ (8001294 <MX_TIM2_Init+0x144>)
8001196: f244 624f movw r2, #17999 @ 0x464f
800119a: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
800119c: 4b3d ldr r3, [pc, #244] @ (8001294 <MX_TIM2_Init+0x144>)
800119e: 2200 movs r2, #0
80011a0: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80011a2: 4b3c ldr r3, [pc, #240] @ (8001294 <MX_TIM2_Init+0x144>)
80011a4: 2200 movs r2, #0
80011a6: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
80011a8: 483a ldr r0, [pc, #232] @ (8001294 <MX_TIM2_Init+0x144>)
80011aa: f003 ff2d bl 8005008 <HAL_TIM_Base_Init>
80011ae: 4603 mov r3, r0
80011b0: 2b00 cmp r3, #0
80011b2: d001 beq.n 80011b8 <MX_TIM2_Init+0x68>
{
Error_Handler();
80011b4: f000 f9e6 bl 8001584 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80011b8: f44f 5380 mov.w r3, #4096 @ 0x1000
80011bc: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
80011be: f107 0328 add.w r3, r7, #40 @ 0x28
80011c2: 4619 mov r1, r3
80011c4: 4833 ldr r0, [pc, #204] @ (8001294 <MX_TIM2_Init+0x144>)
80011c6: f004 f98f bl 80054e8 <HAL_TIM_ConfigClockSource>
80011ca: 4603 mov r3, r0
80011cc: 2b00 cmp r3, #0
80011ce: d001 beq.n 80011d4 <MX_TIM2_Init+0x84>
{
Error_Handler();
80011d0: f000 f9d8 bl 8001584 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
80011d4: 482f ldr r0, [pc, #188] @ (8001294 <MX_TIM2_Init+0x144>)
80011d6: f003 ff66 bl 80050a6 <HAL_TIM_PWM_Init>
80011da: 4603 mov r3, r0
80011dc: 2b00 cmp r3, #0
80011de: d001 beq.n 80011e4 <MX_TIM2_Init+0x94>
{
Error_Handler();
80011e0: f000 f9d0 bl 8001584 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80011e4: 2300 movs r3, #0
80011e6: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80011e8: 2300 movs r3, #0
80011ea: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
80011ec: f107 0320 add.w r3, r7, #32
80011f0: 4619 mov r1, r3
80011f2: 4828 ldr r0, [pc, #160] @ (8001294 <MX_TIM2_Init+0x144>)
80011f4: f004 fd18 bl 8005c28 <HAL_TIMEx_MasterConfigSynchronization>
80011f8: 4603 mov r3, r0
80011fa: 2b00 cmp r3, #0
80011fc: d001 beq.n 8001202 <MX_TIM2_Init+0xb2>
{
Error_Handler();
80011fe: f000 f9c1 bl 8001584 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8001202: 2360 movs r3, #96 @ 0x60
8001204: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
8001206: f44f 737a mov.w r3, #1000 @ 0x3e8
800120a: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
800120c: 2300 movs r3, #0
800120e: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8001210: 2304 movs r3, #4
8001212: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8001214: 1d3b adds r3, r7, #4
8001216: 2200 movs r2, #0
8001218: 4619 mov r1, r3
800121a: 481e ldr r0, [pc, #120] @ (8001294 <MX_TIM2_Init+0x144>)
800121c: f004 f8a2 bl 8005364 <HAL_TIM_PWM_ConfigChannel>
8001220: 4603 mov r3, r0
8001222: 2b00 cmp r3, #0
8001224: d001 beq.n 800122a <MX_TIM2_Init+0xda>
{
Error_Handler();
8001226: f000 f9ad bl 8001584 <Error_Handler>
}
sConfigOC.Pulse = 2000;
800122a: f44f 63fa mov.w r3, #2000 @ 0x7d0
800122e: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8001230: 1d3b adds r3, r7, #4
8001232: 2204 movs r2, #4
8001234: 4619 mov r1, r3
8001236: 4817 ldr r0, [pc, #92] @ (8001294 <MX_TIM2_Init+0x144>)
8001238: f004 f894 bl 8005364 <HAL_TIM_PWM_ConfigChannel>
800123c: 4603 mov r3, r0
800123e: 2b00 cmp r3, #0
8001240: d001 beq.n 8001246 <MX_TIM2_Init+0xf6>
{
Error_Handler();
8001242: f000 f99f bl 8001584 <Error_Handler>
}
sConfigOC.Pulse = 3000;
8001246: f640 33b8 movw r3, #3000 @ 0xbb8
800124a: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
800124c: 2300 movs r3, #0
800124e: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8001250: 1d3b adds r3, r7, #4
8001252: 2208 movs r2, #8
8001254: 4619 mov r1, r3
8001256: 480f ldr r0, [pc, #60] @ (8001294 <MX_TIM2_Init+0x144>)
8001258: f004 f884 bl 8005364 <HAL_TIM_PWM_ConfigChannel>
800125c: 4603 mov r3, r0
800125e: 2b00 cmp r3, #0
8001260: d001 beq.n 8001266 <MX_TIM2_Init+0x116>
{
Error_Handler();
8001262: f000 f98f bl 8001584 <Error_Handler>
}
sConfigOC.Pulse = 4000;
8001266: f44f 637a mov.w r3, #4000 @ 0xfa0
800126a: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800126c: 2304 movs r3, #4
800126e: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8001270: 1d3b adds r3, r7, #4
8001272: 220c movs r2, #12
8001274: 4619 mov r1, r3
8001276: 4807 ldr r0, [pc, #28] @ (8001294 <MX_TIM2_Init+0x144>)
8001278: f004 f874 bl 8005364 <HAL_TIM_PWM_ConfigChannel>
800127c: 4603 mov r3, r0
800127e: 2b00 cmp r3, #0
8001280: d001 beq.n 8001286 <MX_TIM2_Init+0x136>
{
Error_Handler();
8001282: f000 f97f bl 8001584 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
8001286: 4803 ldr r0, [pc, #12] @ (8001294 <MX_TIM2_Init+0x144>)
8001288: f000 fc20 bl 8001acc <HAL_TIM_MspPostInit>
}
800128c: bf00 nop
800128e: 3738 adds r7, #56 @ 0x38
8001290: 46bd mov sp, r7
8001292: bd80 pop {r7, pc}
8001294: 20000284 .word 0x20000284
08001298 <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
8001298: b580 push {r7, lr}
800129a: b08e sub sp, #56 @ 0x38
800129c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
800129e: f107 0328 add.w r3, r7, #40 @ 0x28
80012a2: 2200 movs r2, #0
80012a4: 601a str r2, [r3, #0]
80012a6: 605a str r2, [r3, #4]
80012a8: 609a str r2, [r3, #8]
80012aa: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
80012ac: f107 0320 add.w r3, r7, #32
80012b0: 2200 movs r2, #0
80012b2: 601a str r2, [r3, #0]
80012b4: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80012b6: 1d3b adds r3, r7, #4
80012b8: 2200 movs r2, #0
80012ba: 601a str r2, [r3, #0]
80012bc: 605a str r2, [r3, #4]
80012be: 609a str r2, [r3, #8]
80012c0: 60da str r2, [r3, #12]
80012c2: 611a str r2, [r3, #16]
80012c4: 615a str r2, [r3, #20]
80012c6: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
80012c8: 4b42 ldr r3, [pc, #264] @ (80013d4 <MX_TIM4_Init+0x13c>)
80012ca: 4a43 ldr r2, [pc, #268] @ (80013d8 <MX_TIM4_Init+0x140>)
80012cc: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
80012ce: 4b41 ldr r3, [pc, #260] @ (80013d4 <MX_TIM4_Init+0x13c>)
80012d0: 2200 movs r2, #0
80012d2: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
80012d4: 4b3f ldr r3, [pc, #252] @ (80013d4 <MX_TIM4_Init+0x13c>)
80012d6: 2200 movs r2, #0
80012d8: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
80012da: 4b3e ldr r3, [pc, #248] @ (80013d4 <MX_TIM4_Init+0x13c>)
80012dc: f244 624f movw r2, #17999 @ 0x464f
80012e0: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80012e2: 4b3c ldr r3, [pc, #240] @ (80013d4 <MX_TIM4_Init+0x13c>)
80012e4: 2200 movs r2, #0
80012e6: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80012e8: 4b3a ldr r3, [pc, #232] @ (80013d4 <MX_TIM4_Init+0x13c>)
80012ea: 2200 movs r2, #0
80012ec: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
80012ee: 4839 ldr r0, [pc, #228] @ (80013d4 <MX_TIM4_Init+0x13c>)
80012f0: f003 fe8a bl 8005008 <HAL_TIM_Base_Init>
80012f4: 4603 mov r3, r0
80012f6: 2b00 cmp r3, #0
80012f8: d001 beq.n 80012fe <MX_TIM4_Init+0x66>
{
Error_Handler();
80012fa: f000 f943 bl 8001584 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80012fe: f44f 5380 mov.w r3, #4096 @ 0x1000
8001302: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
8001304: f107 0328 add.w r3, r7, #40 @ 0x28
8001308: 4619 mov r1, r3
800130a: 4832 ldr r0, [pc, #200] @ (80013d4 <MX_TIM4_Init+0x13c>)
800130c: f004 f8ec bl 80054e8 <HAL_TIM_ConfigClockSource>
8001310: 4603 mov r3, r0
8001312: 2b00 cmp r3, #0
8001314: d001 beq.n 800131a <MX_TIM4_Init+0x82>
{
Error_Handler();
8001316: f000 f935 bl 8001584 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
800131a: 482e ldr r0, [pc, #184] @ (80013d4 <MX_TIM4_Init+0x13c>)
800131c: f003 fec3 bl 80050a6 <HAL_TIM_PWM_Init>
8001320: 4603 mov r3, r0
8001322: 2b00 cmp r3, #0
8001324: d001 beq.n 800132a <MX_TIM4_Init+0x92>
{
Error_Handler();
8001326: f000 f92d bl 8001584 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
800132a: 2300 movs r3, #0
800132c: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
800132e: 2300 movs r3, #0
8001330: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
8001332: f107 0320 add.w r3, r7, #32
8001336: 4619 mov r1, r3
8001338: 4826 ldr r0, [pc, #152] @ (80013d4 <MX_TIM4_Init+0x13c>)
800133a: f004 fc75 bl 8005c28 <HAL_TIMEx_MasterConfigSynchronization>
800133e: 4603 mov r3, r0
8001340: 2b00 cmp r3, #0
8001342: d001 beq.n 8001348 <MX_TIM4_Init+0xb0>
{
Error_Handler();
8001344: f000 f91e bl 8001584 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8001348: 2360 movs r3, #96 @ 0x60
800134a: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
800134c: f241 3388 movw r3, #5000 @ 0x1388
8001350: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8001352: 2300 movs r3, #0
8001354: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8001356: 2304 movs r3, #4
8001358: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
800135a: 1d3b adds r3, r7, #4
800135c: 2200 movs r2, #0
800135e: 4619 mov r1, r3
8001360: 481c ldr r0, [pc, #112] @ (80013d4 <MX_TIM4_Init+0x13c>)
8001362: f003 ffff bl 8005364 <HAL_TIM_PWM_ConfigChannel>
8001366: 4603 mov r3, r0
8001368: 2b00 cmp r3, #0
800136a: d001 beq.n 8001370 <MX_TIM4_Init+0xd8>
{
Error_Handler();
800136c: f000 f90a bl 8001584 <Error_Handler>
}
sConfigOC.Pulse = 6000;
8001370: f241 7370 movw r3, #6000 @ 0x1770
8001374: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8001376: 1d3b adds r3, r7, #4
8001378: 2204 movs r2, #4
800137a: 4619 mov r1, r3
800137c: 4815 ldr r0, [pc, #84] @ (80013d4 <MX_TIM4_Init+0x13c>)
800137e: f003 fff1 bl 8005364 <HAL_TIM_PWM_ConfigChannel>
8001382: 4603 mov r3, r0
8001384: 2b00 cmp r3, #0
8001386: d001 beq.n 800138c <MX_TIM4_Init+0xf4>
{
Error_Handler();
8001388: f000 f8fc bl 8001584 <Error_Handler>
}
sConfigOC.Pulse = 7000;
800138c: f641 3358 movw r3, #7000 @ 0x1b58
8001390: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8001392: 1d3b adds r3, r7, #4
8001394: 2208 movs r2, #8
8001396: 4619 mov r1, r3
8001398: 480e ldr r0, [pc, #56] @ (80013d4 <MX_TIM4_Init+0x13c>)
800139a: f003 ffe3 bl 8005364 <HAL_TIM_PWM_ConfigChannel>
800139e: 4603 mov r3, r0
80013a0: 2b00 cmp r3, #0
80013a2: d001 beq.n 80013a8 <MX_TIM4_Init+0x110>
{
Error_Handler();
80013a4: f000 f8ee bl 8001584 <Error_Handler>
}
sConfigOC.Pulse = 8000;
80013a8: f44f 53fa mov.w r3, #8000 @ 0x1f40
80013ac: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
80013ae: 1d3b adds r3, r7, #4
80013b0: 220c movs r2, #12
80013b2: 4619 mov r1, r3
80013b4: 4807 ldr r0, [pc, #28] @ (80013d4 <MX_TIM4_Init+0x13c>)
80013b6: f003 ffd5 bl 8005364 <HAL_TIM_PWM_ConfigChannel>
80013ba: 4603 mov r3, r0
80013bc: 2b00 cmp r3, #0
80013be: d001 beq.n 80013c4 <MX_TIM4_Init+0x12c>
{
Error_Handler();
80013c0: f000 f8e0 bl 8001584 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
80013c4: 4803 ldr r0, [pc, #12] @ (80013d4 <MX_TIM4_Init+0x13c>)
80013c6: f000 fb81 bl 8001acc <HAL_TIM_MspPostInit>
}
80013ca: bf00 nop
80013cc: 3738 adds r7, #56 @ 0x38
80013ce: 46bd mov sp, r7
80013d0: bd80 pop {r7, pc}
80013d2: bf00 nop
80013d4: 200002cc .word 0x200002cc
80013d8: 40000800 .word 0x40000800
080013dc <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
80013dc: b580 push {r7, lr}
80013de: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
80013e0: 4b11 ldr r3, [pc, #68] @ (8001428 <MX_USART1_UART_Init+0x4c>)
80013e2: 4a12 ldr r2, [pc, #72] @ (800142c <MX_USART1_UART_Init+0x50>)
80013e4: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
80013e6: 4b10 ldr r3, [pc, #64] @ (8001428 <MX_USART1_UART_Init+0x4c>)
80013e8: f44f 32e1 mov.w r2, #115200 @ 0x1c200
80013ec: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
80013ee: 4b0e ldr r3, [pc, #56] @ (8001428 <MX_USART1_UART_Init+0x4c>)
80013f0: 2200 movs r2, #0
80013f2: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
80013f4: 4b0c ldr r3, [pc, #48] @ (8001428 <MX_USART1_UART_Init+0x4c>)
80013f6: 2200 movs r2, #0
80013f8: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
80013fa: 4b0b ldr r3, [pc, #44] @ (8001428 <MX_USART1_UART_Init+0x4c>)
80013fc: 2200 movs r2, #0
80013fe: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8001400: 4b09 ldr r3, [pc, #36] @ (8001428 <MX_USART1_UART_Init+0x4c>)
8001402: 220c movs r2, #12
8001404: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8001406: 4b08 ldr r3, [pc, #32] @ (8001428 <MX_USART1_UART_Init+0x4c>)
8001408: 2200 movs r2, #0
800140a: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
800140c: 4b06 ldr r3, [pc, #24] @ (8001428 <MX_USART1_UART_Init+0x4c>)
800140e: 2200 movs r2, #0
8001410: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
8001412: 4805 ldr r0, [pc, #20] @ (8001428 <MX_USART1_UART_Init+0x4c>)
8001414: f004 fc66 bl 8005ce4 <HAL_UART_Init>
8001418: 4603 mov r3, r0
800141a: 2b00 cmp r3, #0
800141c: d001 beq.n 8001422 <MX_USART1_UART_Init+0x46>
{
Error_Handler();
800141e: f000 f8b1 bl 8001584 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
8001422: bf00 nop
8001424: bd80 pop {r7, pc}
8001426: bf00 nop
8001428: 20000314 .word 0x20000314
800142c: 40013800 .word 0x40013800
08001430 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8001430: b580 push {r7, lr}
8001432: b088 sub sp, #32
8001434: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001436: f107 0310 add.w r3, r7, #16
800143a: 2200 movs r2, #0
800143c: 601a str r2, [r3, #0]
800143e: 605a str r2, [r3, #4]
8001440: 609a str r2, [r3, #8]
8001442: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8001444: 4b4b ldr r3, [pc, #300] @ (8001574 <MX_GPIO_Init+0x144>)
8001446: 699b ldr r3, [r3, #24]
8001448: 4a4a ldr r2, [pc, #296] @ (8001574 <MX_GPIO_Init+0x144>)
800144a: f043 0310 orr.w r3, r3, #16
800144e: 6193 str r3, [r2, #24]
8001450: 4b48 ldr r3, [pc, #288] @ (8001574 <MX_GPIO_Init+0x144>)
8001452: 699b ldr r3, [r3, #24]
8001454: f003 0310 and.w r3, r3, #16
8001458: 60fb str r3, [r7, #12]
800145a: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
800145c: 4b45 ldr r3, [pc, #276] @ (8001574 <MX_GPIO_Init+0x144>)
800145e: 699b ldr r3, [r3, #24]
8001460: 4a44 ldr r2, [pc, #272] @ (8001574 <MX_GPIO_Init+0x144>)
8001462: f043 0320 orr.w r3, r3, #32
8001466: 6193 str r3, [r2, #24]
8001468: 4b42 ldr r3, [pc, #264] @ (8001574 <MX_GPIO_Init+0x144>)
800146a: 699b ldr r3, [r3, #24]
800146c: f003 0320 and.w r3, r3, #32
8001470: 60bb str r3, [r7, #8]
8001472: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8001474: 4b3f ldr r3, [pc, #252] @ (8001574 <MX_GPIO_Init+0x144>)
8001476: 699b ldr r3, [r3, #24]
8001478: 4a3e ldr r2, [pc, #248] @ (8001574 <MX_GPIO_Init+0x144>)
800147a: f043 0304 orr.w r3, r3, #4
800147e: 6193 str r3, [r2, #24]
8001480: 4b3c ldr r3, [pc, #240] @ (8001574 <MX_GPIO_Init+0x144>)
8001482: 699b ldr r3, [r3, #24]
8001484: f003 0304 and.w r3, r3, #4
8001488: 607b str r3, [r7, #4]
800148a: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
800148c: 4b39 ldr r3, [pc, #228] @ (8001574 <MX_GPIO_Init+0x144>)
800148e: 699b ldr r3, [r3, #24]
8001490: 4a38 ldr r2, [pc, #224] @ (8001574 <MX_GPIO_Init+0x144>)
8001492: f043 0308 orr.w r3, r3, #8
8001496: 6193 str r3, [r2, #24]
8001498: 4b36 ldr r3, [pc, #216] @ (8001574 <MX_GPIO_Init+0x144>)
800149a: 699b ldr r3, [r3, #24]
800149c: f003 0308 and.w r3, r3, #8
80014a0: 603b str r3, [r7, #0]
80014a2: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
80014a4: 2200 movs r2, #0
80014a6: f44f 5100 mov.w r1, #8192 @ 0x2000
80014aa: 4833 ldr r0, [pc, #204] @ (8001578 <MX_GPIO_Init+0x148>)
80014ac: f001 fb54 bl 8002b58 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
80014b0: 2200 movs r2, #0
80014b2: f640 413e movw r1, #3134 @ 0xc3e
80014b6: 4831 ldr r0, [pc, #196] @ (800157c <MX_GPIO_Init+0x14c>)
80014b8: f001 fb4e bl 8002b58 <HAL_GPIO_WritePin>
|EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET);
80014bc: 2200 movs r2, #0
80014be: f44f 4101 mov.w r1, #33024 @ 0x8100
80014c2: 482f ldr r0, [pc, #188] @ (8001580 <MX_GPIO_Init+0x150>)
80014c4: f001 fb48 bl 8002b58 <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
80014c8: f44f 5300 mov.w r3, #8192 @ 0x2000
80014cc: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80014ce: 2301 movs r3, #1
80014d0: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80014d2: 2300 movs r3, #0
80014d4: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80014d6: 2302 movs r3, #2
80014d8: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
80014da: f107 0310 add.w r3, r7, #16
80014de: 4619 mov r1, r3
80014e0: 4825 ldr r0, [pc, #148] @ (8001578 <MX_GPIO_Init+0x148>)
80014e2: f001 f9b5 bl 8002850 <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin|P2_Pin;
80014e6: f44f 4340 mov.w r3, #49152 @ 0xc000
80014ea: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80014ec: 2300 movs r3, #0
80014ee: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80014f0: 2300 movs r3, #0
80014f2: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80014f4: f107 0310 add.w r3, r7, #16
80014f8: 4619 mov r1, r3
80014fa: 481f ldr r0, [pc, #124] @ (8001578 <MX_GPIO_Init+0x148>)
80014fc: f001 f9a8 bl 8002850 <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
8001500: 2310 movs r3, #16
8001502: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8001504: 2303 movs r3, #3
8001506: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
8001508: f107 0310 add.w r3, r7, #16
800150c: 4619 mov r1, r3
800150e: 481c ldr r0, [pc, #112] @ (8001580 <MX_GPIO_Init+0x150>)
8001510: f001 f99e bl 8002850 <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8001514: f640 433e movw r3, #3134 @ 0xc3e
8001518: 613b str r3, [r7, #16]
|EXP1_Pin|EXP2_Pin|EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800151a: 2301 movs r3, #1
800151c: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800151e: 2300 movs r3, #0
8001520: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001522: 2302 movs r3, #2
8001524: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001526: f107 0310 add.w r3, r7, #16
800152a: 4619 mov r1, r3
800152c: 4813 ldr r0, [pc, #76] @ (800157c <MX_GPIO_Init+0x14c>)
800152e: f001 f98f bl 8002850 <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin;
8001532: f44f 4370 mov.w r3, #61440 @ 0xf000
8001536: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8001538: 2300 movs r3, #0
800153a: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800153c: 2300 movs r3, #0
800153e: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001540: f107 0310 add.w r3, r7, #16
8001544: 4619 mov r1, r3
8001546: 480d ldr r0, [pc, #52] @ (800157c <MX_GPIO_Init+0x14c>)
8001548: f001 f982 bl 8002850 <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin;
800154c: f44f 4301 mov.w r3, #33024 @ 0x8100
8001550: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001552: 2301 movs r3, #1
8001554: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001556: 2300 movs r3, #0
8001558: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800155a: 2302 movs r3, #2
800155c: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800155e: f107 0310 add.w r3, r7, #16
8001562: 4619 mov r1, r3
8001564: 4806 ldr r0, [pc, #24] @ (8001580 <MX_GPIO_Init+0x150>)
8001566: f001 f973 bl 8002850 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
800156a: bf00 nop
800156c: 3720 adds r7, #32
800156e: 46bd mov sp, r7
8001570: bd80 pop {r7, pc}
8001572: bf00 nop
8001574: 40021000 .word 0x40021000
8001578: 40011000 .word 0x40011000
800157c: 40010c00 .word 0x40010c00
8001580: 40010800 .word 0x40010800
08001584 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8001584: b480 push {r7}
8001586: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8001588: b672 cpsid i
}
800158a: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
800158c: bf00 nop
800158e: e7fd b.n 800158c <Error_Handler+0x8>
08001590 <IsPwmRunning>:
extern TIM_HandleTypeDef htim2;
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim4;
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8001590: b580 push {r7, lr}
8001592: b084 sub sp, #16
8001594: af00 add r7, sp, #0
8001596: 6078 str r0, [r7, #4]
8001598: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
800159a: 6839 ldr r1, [r7, #0]
800159c: 6878 ldr r0, [r7, #4]
800159e: f004 f86a bl 8005676 <HAL_TIM_GetChannelState>
80015a2: 4603 mov r3, r0
80015a4: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
80015a6: 7bfb ldrb r3, [r7, #15]
80015a8: 2b02 cmp r3, #2
80015aa: bf0c ite eq
80015ac: 2301 moveq r3, #1
80015ae: 2300 movne r3, #0
80015b0: b2db uxtb r3, r3
}
80015b2: 4618 mov r0, r3
80015b4: 3710 adds r7, #16
80015b6: 46bd mov sp, r7
80015b8: bd80 pop {r7, pc}
080015ba <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
80015ba: b580 push {r7, lr}
80015bc: b082 sub sp, #8
80015be: af00 add r7, sp, #0
80015c0: 6078 str r0, [r7, #4]
80015c2: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
80015c4: 6839 ldr r1, [r7, #0]
80015c6: 6878 ldr r0, [r7, #4]
80015c8: f003 fe68 bl 800529c <HAL_TIM_PWM_Stop>
}
80015cc: bf00 nop
80015ce: 3708 adds r7, #8
80015d0: 46bd mov sp, r7
80015d2: bd80 pop {r7, pc}
080015d4 <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
80015d4: b580 push {r7, lr}
80015d6: b084 sub sp, #16
80015d8: af00 add r7, sp, #0
80015da: 60f8 str r0, [r7, #12]
80015dc: 60b9 str r1, [r7, #8]
80015de: 4613 mov r3, r2
80015e0: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80015e2: 68bb ldr r3, [r7, #8]
80015e4: 2b00 cmp r3, #0
80015e6: d104 bne.n 80015f2 <StartMot+0x1e>
80015e8: 68fb ldr r3, [r7, #12]
80015ea: 681b ldr r3, [r3, #0]
80015ec: 88fa ldrh r2, [r7, #6]
80015ee: 635a str r2, [r3, #52] @ 0x34
80015f0: e013 b.n 800161a <StartMot+0x46>
80015f2: 68bb ldr r3, [r7, #8]
80015f4: 2b04 cmp r3, #4
80015f6: d104 bne.n 8001602 <StartMot+0x2e>
80015f8: 68fb ldr r3, [r7, #12]
80015fa: 681a ldr r2, [r3, #0]
80015fc: 88fb ldrh r3, [r7, #6]
80015fe: 6393 str r3, [r2, #56] @ 0x38
8001600: e00b b.n 800161a <StartMot+0x46>
8001602: 68bb ldr r3, [r7, #8]
8001604: 2b08 cmp r3, #8
8001606: d104 bne.n 8001612 <StartMot+0x3e>
8001608: 68fb ldr r3, [r7, #12]
800160a: 681a ldr r2, [r3, #0]
800160c: 88fb ldrh r3, [r7, #6]
800160e: 63d3 str r3, [r2, #60] @ 0x3c
8001610: e003 b.n 800161a <StartMot+0x46>
8001612: 68fb ldr r3, [r7, #12]
8001614: 681a ldr r2, [r3, #0]
8001616: 88fb ldrh r3, [r7, #6]
8001618: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
800161a: 68b9 ldr r1, [r7, #8]
800161c: 68f8 ldr r0, [r7, #12]
800161e: f003 fd9b bl 8005158 <HAL_TIM_PWM_Start>
}
8001622: bf00 nop
8001624: 3710 adds r7, #16
8001626: 46bd mov sp, r7
8001628: bd80 pop {r7, pc}
0800162a <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
800162a: b480 push {r7}
800162c: b085 sub sp, #20
800162e: af00 add r7, sp, #0
8001630: 60f8 str r0, [r7, #12]
8001632: 60b9 str r1, [r7, #8]
8001634: 4613 mov r3, r2
8001636: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8001638: 68bb ldr r3, [r7, #8]
800163a: 2b00 cmp r3, #0
800163c: d104 bne.n 8001648 <SetMotPwm+0x1e>
800163e: 68fb ldr r3, [r7, #12]
8001640: 681b ldr r3, [r3, #0]
8001642: 88fa ldrh r2, [r7, #6]
8001644: 635a str r2, [r3, #52] @ 0x34
}
8001646: e013 b.n 8001670 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8001648: 68bb ldr r3, [r7, #8]
800164a: 2b04 cmp r3, #4
800164c: d104 bne.n 8001658 <SetMotPwm+0x2e>
800164e: 68fb ldr r3, [r7, #12]
8001650: 681a ldr r2, [r3, #0]
8001652: 88fb ldrh r3, [r7, #6]
8001654: 6393 str r3, [r2, #56] @ 0x38
}
8001656: e00b b.n 8001670 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8001658: 68bb ldr r3, [r7, #8]
800165a: 2b08 cmp r3, #8
800165c: d104 bne.n 8001668 <SetMotPwm+0x3e>
800165e: 68fb ldr r3, [r7, #12]
8001660: 681a ldr r2, [r3, #0]
8001662: 88fb ldrh r3, [r7, #6]
8001664: 63d3 str r3, [r2, #60] @ 0x3c
}
8001666: e003 b.n 8001670 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8001668: 68fb ldr r3, [r7, #12]
800166a: 681a ldr r2, [r3, #0]
800166c: 88fb ldrh r3, [r7, #6]
800166e: 6413 str r3, [r2, #64] @ 0x40
}
8001670: bf00 nop
8001672: 3714 adds r7, #20
8001674: 46bd mov sp, r7
8001676: bc80 pop {r7}
8001678: 4770 bx lr
...
0800167c <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
800167c: b580 push {r7, lr}
800167e: b082 sub sp, #8
8001680: af00 add r7, sp, #0
8001682: 4603 mov r3, r0
8001684: 71fb strb r3, [r7, #7]
8001686: 460b mov r3, r1
8001688: 71bb strb r3, [r7, #6]
800168a: 4613 mov r3, r2
800168c: 80bb strh r3, [r7, #4]
switch(mot){
800168e: 79fb ldrb r3, [r7, #7]
8001690: 3b01 subs r3, #1
8001692: 2b03 cmp r3, #3
8001694: f200 8158 bhi.w 8001948 <SetMot+0x2cc>
8001698: a201 add r2, pc, #4 @ (adr r2, 80016a0 <SetMot+0x24>)
800169a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800169e: bf00 nop
80016a0: 080016b1 .word 0x080016b1
80016a4: 08001753 .word 0x08001753
80016a8: 080017f5 .word 0x080017f5
80016ac: 0800189f .word 0x0800189f
case 1:
if(dir==FW){
80016b0: 79bb ldrb r3, [r7, #6]
80016b2: 2b00 cmp r3, #0
80016b4: d126 bne.n 8001704 <SetMot+0x88>
if(pwmval==0){
80016b6: 88bb ldrh r3, [r7, #4]
80016b8: 2b00 cmp r3, #0
80016ba: d109 bne.n 80016d0 <SetMot+0x54>
StopMot(timMot1,FWMot1);
80016bc: 2100 movs r1, #0
80016be: 48a5 ldr r0, [pc, #660] @ (8001954 <SetMot+0x2d8>)
80016c0: f7ff ff7b bl 80015ba <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80016c4: 2200 movs r2, #0
80016c6: 2102 movs r1, #2
80016c8: 48a3 ldr r0, [pc, #652] @ (8001958 <SetMot+0x2dc>)
80016ca: f001 fa45 bl 8002b58 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
80016ce: e13c b.n 800194a <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
80016d0: 2100 movs r1, #0
80016d2: 48a0 ldr r0, [pc, #640] @ (8001954 <SetMot+0x2d8>)
80016d4: f7ff ff5c bl 8001590 <IsPwmRunning>
80016d8: 4603 mov r3, r0
80016da: 2b00 cmp r3, #0
80016dc: d006 beq.n 80016ec <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
80016de: 88bb ldrh r3, [r7, #4]
80016e0: 461a mov r2, r3
80016e2: 2100 movs r1, #0
80016e4: 489b ldr r0, [pc, #620] @ (8001954 <SetMot+0x2d8>)
80016e6: f7ff ffa0 bl 800162a <SetMotPwm>
break;
80016ea: e12e b.n 800194a <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80016ec: 2201 movs r2, #1
80016ee: 2102 movs r1, #2
80016f0: 4899 ldr r0, [pc, #612] @ (8001958 <SetMot+0x2dc>)
80016f2: f001 fa31 bl 8002b58 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
80016f6: 88bb ldrh r3, [r7, #4]
80016f8: 461a mov r2, r3
80016fa: 2100 movs r1, #0
80016fc: 4895 ldr r0, [pc, #596] @ (8001954 <SetMot+0x2d8>)
80016fe: f7ff ff69 bl 80015d4 <StartMot>
break;
8001702: e122 b.n 800194a <SetMot+0x2ce>
if(pwmval==0){
8001704: 88bb ldrh r3, [r7, #4]
8001706: 2b00 cmp r3, #0
8001708: d109 bne.n 800171e <SetMot+0xa2>
StopMot(timMot1,BWMot1);
800170a: 2104 movs r1, #4
800170c: 4891 ldr r0, [pc, #580] @ (8001954 <SetMot+0x2d8>)
800170e: f7ff ff54 bl 80015ba <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8001712: 2200 movs r2, #0
8001714: 2102 movs r1, #2
8001716: 4890 ldr r0, [pc, #576] @ (8001958 <SetMot+0x2dc>)
8001718: f001 fa1e bl 8002b58 <HAL_GPIO_WritePin>
break;
800171c: e115 b.n 800194a <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
800171e: 2104 movs r1, #4
8001720: 488c ldr r0, [pc, #560] @ (8001954 <SetMot+0x2d8>)
8001722: f7ff ff35 bl 8001590 <IsPwmRunning>
8001726: 4603 mov r3, r0
8001728: 2b00 cmp r3, #0
800172a: d006 beq.n 800173a <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
800172c: 88bb ldrh r3, [r7, #4]
800172e: 461a mov r2, r3
8001730: 2104 movs r1, #4
8001732: 4888 ldr r0, [pc, #544] @ (8001954 <SetMot+0x2d8>)
8001734: f7ff ff79 bl 800162a <SetMotPwm>
break;
8001738: e107 b.n 800194a <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
800173a: 2201 movs r2, #1
800173c: 2102 movs r1, #2
800173e: 4886 ldr r0, [pc, #536] @ (8001958 <SetMot+0x2dc>)
8001740: f001 fa0a bl 8002b58 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
8001744: 88bb ldrh r3, [r7, #4]
8001746: 461a mov r2, r3
8001748: 2104 movs r1, #4
800174a: 4882 ldr r0, [pc, #520] @ (8001954 <SetMot+0x2d8>)
800174c: f7ff ff42 bl 80015d4 <StartMot>
break;
8001750: e0fb b.n 800194a <SetMot+0x2ce>
case 2:
if(dir==FW){
8001752: 79bb ldrb r3, [r7, #6]
8001754: 2b00 cmp r3, #0
8001756: d126 bne.n 80017a6 <SetMot+0x12a>
if(pwmval==0){
8001758: 88bb ldrh r3, [r7, #4]
800175a: 2b00 cmp r3, #0
800175c: d109 bne.n 8001772 <SetMot+0xf6>
StopMot(timMot2,FWMot2);
800175e: 2108 movs r1, #8
8001760: 487c ldr r0, [pc, #496] @ (8001954 <SetMot+0x2d8>)
8001762: f7ff ff2a bl 80015ba <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8001766: 2200 movs r2, #0
8001768: 2104 movs r1, #4
800176a: 487b ldr r0, [pc, #492] @ (8001958 <SetMot+0x2dc>)
800176c: f001 f9f4 bl 8002b58 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8001770: e0eb b.n 800194a <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
8001772: 2108 movs r1, #8
8001774: 4877 ldr r0, [pc, #476] @ (8001954 <SetMot+0x2d8>)
8001776: f7ff ff0b bl 8001590 <IsPwmRunning>
800177a: 4603 mov r3, r0
800177c: 2b00 cmp r3, #0
800177e: d006 beq.n 800178e <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
8001780: 88bb ldrh r3, [r7, #4]
8001782: 461a mov r2, r3
8001784: 2108 movs r1, #8
8001786: 4873 ldr r0, [pc, #460] @ (8001954 <SetMot+0x2d8>)
8001788: f7ff ff4f bl 800162a <SetMotPwm>
break;
800178c: e0dd b.n 800194a <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
800178e: 2201 movs r2, #1
8001790: 2104 movs r1, #4
8001792: 4871 ldr r0, [pc, #452] @ (8001958 <SetMot+0x2dc>)
8001794: f001 f9e0 bl 8002b58 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8001798: 88bb ldrh r3, [r7, #4]
800179a: 461a mov r2, r3
800179c: 2108 movs r1, #8
800179e: 486d ldr r0, [pc, #436] @ (8001954 <SetMot+0x2d8>)
80017a0: f7ff ff18 bl 80015d4 <StartMot>
break;
80017a4: e0d1 b.n 800194a <SetMot+0x2ce>
if(pwmval==0){
80017a6: 88bb ldrh r3, [r7, #4]
80017a8: 2b00 cmp r3, #0
80017aa: d109 bne.n 80017c0 <SetMot+0x144>
StopMot(timMot2,BWMot2);
80017ac: 210c movs r1, #12
80017ae: 4869 ldr r0, [pc, #420] @ (8001954 <SetMot+0x2d8>)
80017b0: f7ff ff03 bl 80015ba <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80017b4: 2200 movs r2, #0
80017b6: 2104 movs r1, #4
80017b8: 4867 ldr r0, [pc, #412] @ (8001958 <SetMot+0x2dc>)
80017ba: f001 f9cd bl 8002b58 <HAL_GPIO_WritePin>
break;
80017be: e0c4 b.n 800194a <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
80017c0: 210c movs r1, #12
80017c2: 4864 ldr r0, [pc, #400] @ (8001954 <SetMot+0x2d8>)
80017c4: f7ff fee4 bl 8001590 <IsPwmRunning>
80017c8: 4603 mov r3, r0
80017ca: 2b00 cmp r3, #0
80017cc: d006 beq.n 80017dc <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
80017ce: 88bb ldrh r3, [r7, #4]
80017d0: 461a mov r2, r3
80017d2: 210c movs r1, #12
80017d4: 485f ldr r0, [pc, #380] @ (8001954 <SetMot+0x2d8>)
80017d6: f7ff ff28 bl 800162a <SetMotPwm>
break;
80017da: e0b6 b.n 800194a <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80017dc: 2201 movs r2, #1
80017de: 2104 movs r1, #4
80017e0: 485d ldr r0, [pc, #372] @ (8001958 <SetMot+0x2dc>)
80017e2: f001 f9b9 bl 8002b58 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
80017e6: 88bb ldrh r3, [r7, #4]
80017e8: 461a mov r2, r3
80017ea: 210c movs r1, #12
80017ec: 4859 ldr r0, [pc, #356] @ (8001954 <SetMot+0x2d8>)
80017ee: f7ff fef1 bl 80015d4 <StartMot>
break;
80017f2: e0aa b.n 800194a <SetMot+0x2ce>
case 3:
if(dir==FW){
80017f4: 79bb ldrb r3, [r7, #6]
80017f6: 2b00 cmp r3, #0
80017f8: d128 bne.n 800184c <SetMot+0x1d0>
if(pwmval==0){
80017fa: 88bb ldrh r3, [r7, #4]
80017fc: 2b00 cmp r3, #0
80017fe: d10a bne.n 8001816 <SetMot+0x19a>
StopMot(timMot3,FWMot3);
8001800: 2100 movs r1, #0
8001802: 4856 ldr r0, [pc, #344] @ (800195c <SetMot+0x2e0>)
8001804: f7ff fed9 bl 80015ba <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8001808: 2200 movs r2, #0
800180a: f44f 6180 mov.w r1, #1024 @ 0x400
800180e: 4852 ldr r0, [pc, #328] @ (8001958 <SetMot+0x2dc>)
8001810: f001 f9a2 bl 8002b58 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8001814: e099 b.n 800194a <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
8001816: 2100 movs r1, #0
8001818: 4850 ldr r0, [pc, #320] @ (800195c <SetMot+0x2e0>)
800181a: f7ff feb9 bl 8001590 <IsPwmRunning>
800181e: 4603 mov r3, r0
8001820: 2b00 cmp r3, #0
8001822: d006 beq.n 8001832 <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
8001824: 88bb ldrh r3, [r7, #4]
8001826: 461a mov r2, r3
8001828: 2100 movs r1, #0
800182a: 484c ldr r0, [pc, #304] @ (800195c <SetMot+0x2e0>)
800182c: f7ff fefd bl 800162a <SetMotPwm>
break;
8001830: e08b b.n 800194a <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8001832: 2201 movs r2, #1
8001834: f44f 6180 mov.w r1, #1024 @ 0x400
8001838: 4847 ldr r0, [pc, #284] @ (8001958 <SetMot+0x2dc>)
800183a: f001 f98d bl 8002b58 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
800183e: 88bb ldrh r3, [r7, #4]
8001840: 461a mov r2, r3
8001842: 2100 movs r1, #0
8001844: 4845 ldr r0, [pc, #276] @ (800195c <SetMot+0x2e0>)
8001846: f7ff fec5 bl 80015d4 <StartMot>
break;
800184a: e07e b.n 800194a <SetMot+0x2ce>
if(pwmval==0){
800184c: 88bb ldrh r3, [r7, #4]
800184e: 2b00 cmp r3, #0
8001850: d10a bne.n 8001868 <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
8001852: 2104 movs r1, #4
8001854: 4841 ldr r0, [pc, #260] @ (800195c <SetMot+0x2e0>)
8001856: f7ff feb0 bl 80015ba <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
800185a: 2200 movs r2, #0
800185c: f44f 6180 mov.w r1, #1024 @ 0x400
8001860: 483d ldr r0, [pc, #244] @ (8001958 <SetMot+0x2dc>)
8001862: f001 f979 bl 8002b58 <HAL_GPIO_WritePin>
break;
8001866: e070 b.n 800194a <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
8001868: 2104 movs r1, #4
800186a: 483c ldr r0, [pc, #240] @ (800195c <SetMot+0x2e0>)
800186c: f7ff fe90 bl 8001590 <IsPwmRunning>
8001870: 4603 mov r3, r0
8001872: 2b00 cmp r3, #0
8001874: d006 beq.n 8001884 <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
8001876: 88bb ldrh r3, [r7, #4]
8001878: 461a mov r2, r3
800187a: 2104 movs r1, #4
800187c: 4837 ldr r0, [pc, #220] @ (800195c <SetMot+0x2e0>)
800187e: f7ff fed4 bl 800162a <SetMotPwm>
break;
8001882: e062 b.n 800194a <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8001884: 2201 movs r2, #1
8001886: f44f 6180 mov.w r1, #1024 @ 0x400
800188a: 4833 ldr r0, [pc, #204] @ (8001958 <SetMot+0x2dc>)
800188c: f001 f964 bl 8002b58 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8001890: 88bb ldrh r3, [r7, #4]
8001892: 461a mov r2, r3
8001894: 2104 movs r1, #4
8001896: 4831 ldr r0, [pc, #196] @ (800195c <SetMot+0x2e0>)
8001898: f7ff fe9c bl 80015d4 <StartMot>
break;
800189c: e055 b.n 800194a <SetMot+0x2ce>
case 4:
if(dir==FW){
800189e: 79bb ldrb r3, [r7, #6]
80018a0: 2b00 cmp r3, #0
80018a2: d128 bne.n 80018f6 <SetMot+0x27a>
if(pwmval==0){
80018a4: 88bb ldrh r3, [r7, #4]
80018a6: 2b00 cmp r3, #0
80018a8: d10a bne.n 80018c0 <SetMot+0x244>
StopMot(timMot4,FWMot4);
80018aa: 2108 movs r1, #8
80018ac: 482b ldr r0, [pc, #172] @ (800195c <SetMot+0x2e0>)
80018ae: f7ff fe84 bl 80015ba <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80018b2: 2200 movs r2, #0
80018b4: f44f 6100 mov.w r1, #2048 @ 0x800
80018b8: 4827 ldr r0, [pc, #156] @ (8001958 <SetMot+0x2dc>)
80018ba: f001 f94d bl 8002b58 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
80018be: e044 b.n 800194a <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
80018c0: 2108 movs r1, #8
80018c2: 4826 ldr r0, [pc, #152] @ (800195c <SetMot+0x2e0>)
80018c4: f7ff fe64 bl 8001590 <IsPwmRunning>
80018c8: 4603 mov r3, r0
80018ca: 2b00 cmp r3, #0
80018cc: d006 beq.n 80018dc <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
80018ce: 88bb ldrh r3, [r7, #4]
80018d0: 461a mov r2, r3
80018d2: 2108 movs r1, #8
80018d4: 4821 ldr r0, [pc, #132] @ (800195c <SetMot+0x2e0>)
80018d6: f7ff fea8 bl 800162a <SetMotPwm>
break;
80018da: e036 b.n 800194a <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80018dc: 2201 movs r2, #1
80018de: f44f 6100 mov.w r1, #2048 @ 0x800
80018e2: 481d ldr r0, [pc, #116] @ (8001958 <SetMot+0x2dc>)
80018e4: f001 f938 bl 8002b58 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
80018e8: 88bb ldrh r3, [r7, #4]
80018ea: 461a mov r2, r3
80018ec: 2108 movs r1, #8
80018ee: 481b ldr r0, [pc, #108] @ (800195c <SetMot+0x2e0>)
80018f0: f7ff fe70 bl 80015d4 <StartMot>
break;
80018f4: e029 b.n 800194a <SetMot+0x2ce>
if(pwmval==0){
80018f6: 88bb ldrh r3, [r7, #4]
80018f8: 2b00 cmp r3, #0
80018fa: d10a bne.n 8001912 <SetMot+0x296>
StopMot(timMot4,BWMot4);
80018fc: 210c movs r1, #12
80018fe: 4817 ldr r0, [pc, #92] @ (800195c <SetMot+0x2e0>)
8001900: f7ff fe5b bl 80015ba <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8001904: 2200 movs r2, #0
8001906: f44f 6100 mov.w r1, #2048 @ 0x800
800190a: 4813 ldr r0, [pc, #76] @ (8001958 <SetMot+0x2dc>)
800190c: f001 f924 bl 8002b58 <HAL_GPIO_WritePin>
break;
8001910: e01b b.n 800194a <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
8001912: 210c movs r1, #12
8001914: 4811 ldr r0, [pc, #68] @ (800195c <SetMot+0x2e0>)
8001916: f7ff fe3b bl 8001590 <IsPwmRunning>
800191a: 4603 mov r3, r0
800191c: 2b00 cmp r3, #0
800191e: d006 beq.n 800192e <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
8001920: 88bb ldrh r3, [r7, #4]
8001922: 461a mov r2, r3
8001924: 210c movs r1, #12
8001926: 480d ldr r0, [pc, #52] @ (800195c <SetMot+0x2e0>)
8001928: f7ff fe7f bl 800162a <SetMotPwm>
break;
800192c: e00d b.n 800194a <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
800192e: 2201 movs r2, #1
8001930: f44f 6100 mov.w r1, #2048 @ 0x800
8001934: 4808 ldr r0, [pc, #32] @ (8001958 <SetMot+0x2dc>)
8001936: f001 f90f bl 8002b58 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
800193a: 88bb ldrh r3, [r7, #4]
800193c: 461a mov r2, r3
800193e: 210c movs r1, #12
8001940: 4806 ldr r0, [pc, #24] @ (800195c <SetMot+0x2e0>)
8001942: f7ff fe47 bl 80015d4 <StartMot>
break;
8001946: e000 b.n 800194a <SetMot+0x2ce>
default:
break;
8001948: bf00 nop
}
}
800194a: bf00 nop
800194c: 3708 adds r7, #8
800194e: 46bd mov sp, r7
8001950: bd80 pop {r7, pc}
8001952: bf00 nop
8001954: 20000284 .word 0x20000284
8001958: 40010c00 .word 0x40010c00
800195c: 200002cc .word 0x200002cc
08001960 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8001960: b480 push {r7}
8001962: b085 sub sp, #20
8001964: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8001966: 4b15 ldr r3, [pc, #84] @ (80019bc <HAL_MspInit+0x5c>)
8001968: 699b ldr r3, [r3, #24]
800196a: 4a14 ldr r2, [pc, #80] @ (80019bc <HAL_MspInit+0x5c>)
800196c: f043 0301 orr.w r3, r3, #1
8001970: 6193 str r3, [r2, #24]
8001972: 4b12 ldr r3, [pc, #72] @ (80019bc <HAL_MspInit+0x5c>)
8001974: 699b ldr r3, [r3, #24]
8001976: f003 0301 and.w r3, r3, #1
800197a: 60bb str r3, [r7, #8]
800197c: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
800197e: 4b0f ldr r3, [pc, #60] @ (80019bc <HAL_MspInit+0x5c>)
8001980: 69db ldr r3, [r3, #28]
8001982: 4a0e ldr r2, [pc, #56] @ (80019bc <HAL_MspInit+0x5c>)
8001984: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8001988: 61d3 str r3, [r2, #28]
800198a: 4b0c ldr r3, [pc, #48] @ (80019bc <HAL_MspInit+0x5c>)
800198c: 69db ldr r3, [r3, #28]
800198e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8001992: 607b str r3, [r7, #4]
8001994: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
8001996: 4b0a ldr r3, [pc, #40] @ (80019c0 <HAL_MspInit+0x60>)
8001998: 685b ldr r3, [r3, #4]
800199a: 60fb str r3, [r7, #12]
800199c: 68fb ldr r3, [r7, #12]
800199e: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
80019a2: 60fb str r3, [r7, #12]
80019a4: 68fb ldr r3, [r7, #12]
80019a6: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
80019aa: 60fb str r3, [r7, #12]
80019ac: 4a04 ldr r2, [pc, #16] @ (80019c0 <HAL_MspInit+0x60>)
80019ae: 68fb ldr r3, [r7, #12]
80019b0: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80019b2: bf00 nop
80019b4: 3714 adds r7, #20
80019b6: 46bd mov sp, r7
80019b8: bc80 pop {r7}
80019ba: 4770 bx lr
80019bc: 40021000 .word 0x40021000
80019c0: 40010000 .word 0x40010000
080019c4 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
80019c4: b580 push {r7, lr}
80019c6: b08a sub sp, #40 @ 0x28
80019c8: af00 add r7, sp, #0
80019ca: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80019cc: f107 0318 add.w r3, r7, #24
80019d0: 2200 movs r2, #0
80019d2: 601a str r2, [r3, #0]
80019d4: 605a str r2, [r3, #4]
80019d6: 609a str r2, [r3, #8]
80019d8: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
80019da: 687b ldr r3, [r7, #4]
80019dc: 681b ldr r3, [r3, #0]
80019de: 4a1f ldr r2, [pc, #124] @ (8001a5c <HAL_ADC_MspInit+0x98>)
80019e0: 4293 cmp r3, r2
80019e2: d137 bne.n 8001a54 <HAL_ADC_MspInit+0x90>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
80019e4: 4b1e ldr r3, [pc, #120] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
80019e6: 699b ldr r3, [r3, #24]
80019e8: 4a1d ldr r2, [pc, #116] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
80019ea: f443 7300 orr.w r3, r3, #512 @ 0x200
80019ee: 6193 str r3, [r2, #24]
80019f0: 4b1b ldr r3, [pc, #108] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
80019f2: 699b ldr r3, [r3, #24]
80019f4: f403 7300 and.w r3, r3, #512 @ 0x200
80019f8: 617b str r3, [r7, #20]
80019fa: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
80019fc: 4b18 ldr r3, [pc, #96] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
80019fe: 699b ldr r3, [r3, #24]
8001a00: 4a17 ldr r2, [pc, #92] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
8001a02: f043 0304 orr.w r3, r3, #4
8001a06: 6193 str r3, [r2, #24]
8001a08: 4b15 ldr r3, [pc, #84] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
8001a0a: 699b ldr r3, [r3, #24]
8001a0c: f003 0304 and.w r3, r3, #4
8001a10: 613b str r3, [r7, #16]
8001a12: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8001a14: 4b12 ldr r3, [pc, #72] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
8001a16: 699b ldr r3, [r3, #24]
8001a18: 4a11 ldr r2, [pc, #68] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
8001a1a: f043 0308 orr.w r3, r3, #8
8001a1e: 6193 str r3, [r2, #24]
8001a20: 4b0f ldr r3, [pc, #60] @ (8001a60 <HAL_ADC_MspInit+0x9c>)
8001a22: 699b ldr r3, [r3, #24]
8001a24: f003 0308 and.w r3, r3, #8
8001a28: 60fb str r3, [r7, #12]
8001a2a: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
8001a2c: 23f0 movs r3, #240 @ 0xf0
8001a2e: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8001a30: 2303 movs r3, #3
8001a32: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001a34: f107 0318 add.w r3, r7, #24
8001a38: 4619 mov r1, r3
8001a3a: 480a ldr r0, [pc, #40] @ (8001a64 <HAL_ADC_MspInit+0xa0>)
8001a3c: f000 ff08 bl 8002850 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8001a40: 2301 movs r3, #1
8001a42: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8001a44: 2303 movs r3, #3
8001a46: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
8001a48: f107 0318 add.w r3, r7, #24
8001a4c: 4619 mov r1, r3
8001a4e: 4806 ldr r0, [pc, #24] @ (8001a68 <HAL_ADC_MspInit+0xa4>)
8001a50: f000 fefe bl 8002850 <HAL_GPIO_Init>
/* USER CODE END ADC1_MspInit 1 */
}
}
8001a54: bf00 nop
8001a56: 3728 adds r7, #40 @ 0x28
8001a58: 46bd mov sp, r7
8001a5a: bd80 pop {r7, pc}
8001a5c: 40012400 .word 0x40012400
8001a60: 40021000 .word 0x40021000
8001a64: 40010800 .word 0x40010800
8001a68: 40010c00 .word 0x40010c00
08001a6c <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8001a6c: b480 push {r7}
8001a6e: b085 sub sp, #20
8001a70: af00 add r7, sp, #0
8001a72: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8001a74: 687b ldr r3, [r7, #4]
8001a76: 681b ldr r3, [r3, #0]
8001a78: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8001a7c: d10c bne.n 8001a98 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
8001a7e: 4b11 ldr r3, [pc, #68] @ (8001ac4 <HAL_TIM_Base_MspInit+0x58>)
8001a80: 69db ldr r3, [r3, #28]
8001a82: 4a10 ldr r2, [pc, #64] @ (8001ac4 <HAL_TIM_Base_MspInit+0x58>)
8001a84: f043 0301 orr.w r3, r3, #1
8001a88: 61d3 str r3, [r2, #28]
8001a8a: 4b0e ldr r3, [pc, #56] @ (8001ac4 <HAL_TIM_Base_MspInit+0x58>)
8001a8c: 69db ldr r3, [r3, #28]
8001a8e: f003 0301 and.w r3, r3, #1
8001a92: 60fb str r3, [r7, #12]
8001a94: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8001a96: e010 b.n 8001aba <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8001a98: 687b ldr r3, [r7, #4]
8001a9a: 681b ldr r3, [r3, #0]
8001a9c: 4a0a ldr r2, [pc, #40] @ (8001ac8 <HAL_TIM_Base_MspInit+0x5c>)
8001a9e: 4293 cmp r3, r2
8001aa0: d10b bne.n 8001aba <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
8001aa2: 4b08 ldr r3, [pc, #32] @ (8001ac4 <HAL_TIM_Base_MspInit+0x58>)
8001aa4: 69db ldr r3, [r3, #28]
8001aa6: 4a07 ldr r2, [pc, #28] @ (8001ac4 <HAL_TIM_Base_MspInit+0x58>)
8001aa8: f043 0304 orr.w r3, r3, #4
8001aac: 61d3 str r3, [r2, #28]
8001aae: 4b05 ldr r3, [pc, #20] @ (8001ac4 <HAL_TIM_Base_MspInit+0x58>)
8001ab0: 69db ldr r3, [r3, #28]
8001ab2: f003 0304 and.w r3, r3, #4
8001ab6: 60bb str r3, [r7, #8]
8001ab8: 68bb ldr r3, [r7, #8]
}
8001aba: bf00 nop
8001abc: 3714 adds r7, #20
8001abe: 46bd mov sp, r7
8001ac0: bc80 pop {r7}
8001ac2: 4770 bx lr
8001ac4: 40021000 .word 0x40021000
8001ac8: 40000800 .word 0x40000800
08001acc <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8001acc: b580 push {r7, lr}
8001ace: b088 sub sp, #32
8001ad0: af00 add r7, sp, #0
8001ad2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001ad4: f107 0310 add.w r3, r7, #16
8001ad8: 2200 movs r2, #0
8001ada: 601a str r2, [r3, #0]
8001adc: 605a str r2, [r3, #4]
8001ade: 609a str r2, [r3, #8]
8001ae0: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
8001ae2: 687b ldr r3, [r7, #4]
8001ae4: 681b ldr r3, [r3, #0]
8001ae6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8001aea: d118 bne.n 8001b1e <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8001aec: 4b1d ldr r3, [pc, #116] @ (8001b64 <HAL_TIM_MspPostInit+0x98>)
8001aee: 699b ldr r3, [r3, #24]
8001af0: 4a1c ldr r2, [pc, #112] @ (8001b64 <HAL_TIM_MspPostInit+0x98>)
8001af2: f043 0304 orr.w r3, r3, #4
8001af6: 6193 str r3, [r2, #24]
8001af8: 4b1a ldr r3, [pc, #104] @ (8001b64 <HAL_TIM_MspPostInit+0x98>)
8001afa: 699b ldr r3, [r3, #24]
8001afc: f003 0304 and.w r3, r3, #4
8001b00: 60fb str r3, [r7, #12]
8001b02: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
8001b04: 230f movs r3, #15
8001b06: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001b08: 2302 movs r3, #2
8001b0a: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001b0c: 2302 movs r3, #2
8001b0e: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001b10: f107 0310 add.w r3, r7, #16
8001b14: 4619 mov r1, r3
8001b16: 4814 ldr r0, [pc, #80] @ (8001b68 <HAL_TIM_MspPostInit+0x9c>)
8001b18: f000 fe9a bl 8002850 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8001b1c: e01d b.n 8001b5a <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
8001b1e: 687b ldr r3, [r7, #4]
8001b20: 681b ldr r3, [r3, #0]
8001b22: 4a12 ldr r2, [pc, #72] @ (8001b6c <HAL_TIM_MspPostInit+0xa0>)
8001b24: 4293 cmp r3, r2
8001b26: d118 bne.n 8001b5a <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
8001b28: 4b0e ldr r3, [pc, #56] @ (8001b64 <HAL_TIM_MspPostInit+0x98>)
8001b2a: 699b ldr r3, [r3, #24]
8001b2c: 4a0d ldr r2, [pc, #52] @ (8001b64 <HAL_TIM_MspPostInit+0x98>)
8001b2e: f043 0308 orr.w r3, r3, #8
8001b32: 6193 str r3, [r2, #24]
8001b34: 4b0b ldr r3, [pc, #44] @ (8001b64 <HAL_TIM_MspPostInit+0x98>)
8001b36: 699b ldr r3, [r3, #24]
8001b38: f003 0308 and.w r3, r3, #8
8001b3c: 60bb str r3, [r7, #8]
8001b3e: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
8001b40: f44f 7370 mov.w r3, #960 @ 0x3c0
8001b44: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001b46: 2302 movs r3, #2
8001b48: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001b4a: 2302 movs r3, #2
8001b4c: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001b4e: f107 0310 add.w r3, r7, #16
8001b52: 4619 mov r1, r3
8001b54: 4806 ldr r0, [pc, #24] @ (8001b70 <HAL_TIM_MspPostInit+0xa4>)
8001b56: f000 fe7b bl 8002850 <HAL_GPIO_Init>
}
8001b5a: bf00 nop
8001b5c: 3720 adds r7, #32
8001b5e: 46bd mov sp, r7
8001b60: bd80 pop {r7, pc}
8001b62: bf00 nop
8001b64: 40021000 .word 0x40021000
8001b68: 40010800 .word 0x40010800
8001b6c: 40000800 .word 0x40000800
8001b70: 40010c00 .word 0x40010c00
08001b74 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8001b74: b580 push {r7, lr}
8001b76: b088 sub sp, #32
8001b78: af00 add r7, sp, #0
8001b7a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001b7c: f107 0310 add.w r3, r7, #16
8001b80: 2200 movs r2, #0
8001b82: 601a str r2, [r3, #0]
8001b84: 605a str r2, [r3, #4]
8001b86: 609a str r2, [r3, #8]
8001b88: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
8001b8a: 687b ldr r3, [r7, #4]
8001b8c: 681b ldr r3, [r3, #0]
8001b8e: 4a1c ldr r2, [pc, #112] @ (8001c00 <HAL_UART_MspInit+0x8c>)
8001b90: 4293 cmp r3, r2
8001b92: d131 bne.n 8001bf8 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8001b94: 4b1b ldr r3, [pc, #108] @ (8001c04 <HAL_UART_MspInit+0x90>)
8001b96: 699b ldr r3, [r3, #24]
8001b98: 4a1a ldr r2, [pc, #104] @ (8001c04 <HAL_UART_MspInit+0x90>)
8001b9a: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8001b9e: 6193 str r3, [r2, #24]
8001ba0: 4b18 ldr r3, [pc, #96] @ (8001c04 <HAL_UART_MspInit+0x90>)
8001ba2: 699b ldr r3, [r3, #24]
8001ba4: f403 4380 and.w r3, r3, #16384 @ 0x4000
8001ba8: 60fb str r3, [r7, #12]
8001baa: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8001bac: 4b15 ldr r3, [pc, #84] @ (8001c04 <HAL_UART_MspInit+0x90>)
8001bae: 699b ldr r3, [r3, #24]
8001bb0: 4a14 ldr r2, [pc, #80] @ (8001c04 <HAL_UART_MspInit+0x90>)
8001bb2: f043 0304 orr.w r3, r3, #4
8001bb6: 6193 str r3, [r2, #24]
8001bb8: 4b12 ldr r3, [pc, #72] @ (8001c04 <HAL_UART_MspInit+0x90>)
8001bba: 699b ldr r3, [r3, #24]
8001bbc: f003 0304 and.w r3, r3, #4
8001bc0: 60bb str r3, [r7, #8]
8001bc2: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8001bc4: f44f 7300 mov.w r3, #512 @ 0x200
8001bc8: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001bca: 2302 movs r3, #2
8001bcc: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8001bce: 2303 movs r3, #3
8001bd0: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001bd2: f107 0310 add.w r3, r7, #16
8001bd6: 4619 mov r1, r3
8001bd8: 480b ldr r0, [pc, #44] @ (8001c08 <HAL_UART_MspInit+0x94>)
8001bda: f000 fe39 bl 8002850 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
8001bde: f44f 6380 mov.w r3, #1024 @ 0x400
8001be2: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8001be4: 2300 movs r3, #0
8001be6: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001be8: 2300 movs r3, #0
8001bea: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001bec: f107 0310 add.w r3, r7, #16
8001bf0: 4619 mov r1, r3
8001bf2: 4805 ldr r0, [pc, #20] @ (8001c08 <HAL_UART_MspInit+0x94>)
8001bf4: f000 fe2c bl 8002850 <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8001bf8: bf00 nop
8001bfa: 3720 adds r7, #32
8001bfc: 46bd mov sp, r7
8001bfe: bd80 pop {r7, pc}
8001c00: 40013800 .word 0x40013800
8001c04: 40021000 .word 0x40021000
8001c08: 40010800 .word 0x40010800
08001c0c <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8001c0c: b480 push {r7}
8001c0e: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8001c10: bf00 nop
8001c12: e7fd b.n 8001c10 <NMI_Handler+0x4>
08001c14 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8001c14: b480 push {r7}
8001c16: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8001c18: bf00 nop
8001c1a: e7fd b.n 8001c18 <HardFault_Handler+0x4>
08001c1c <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8001c1c: b480 push {r7}
8001c1e: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8001c20: bf00 nop
8001c22: e7fd b.n 8001c20 <MemManage_Handler+0x4>
08001c24 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8001c24: b480 push {r7}
8001c26: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8001c28: bf00 nop
8001c2a: e7fd b.n 8001c28 <BusFault_Handler+0x4>
08001c2c <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8001c2c: b480 push {r7}
8001c2e: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8001c30: bf00 nop
8001c32: e7fd b.n 8001c30 <UsageFault_Handler+0x4>
08001c34 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8001c34: b480 push {r7}
8001c36: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8001c38: bf00 nop
8001c3a: 46bd mov sp, r7
8001c3c: bc80 pop {r7}
8001c3e: 4770 bx lr
08001c40 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8001c40: b480 push {r7}
8001c42: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8001c44: bf00 nop
8001c46: 46bd mov sp, r7
8001c48: bc80 pop {r7}
8001c4a: 4770 bx lr
08001c4c <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8001c4c: b480 push {r7}
8001c4e: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8001c50: bf00 nop
8001c52: 46bd mov sp, r7
8001c54: bc80 pop {r7}
8001c56: 4770 bx lr
08001c58 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8001c58: b580 push {r7, lr}
8001c5a: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8001c5c: f000 f8b6 bl 8001dcc <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
8001c60: f000 fbef bl 8002442 <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
8001c64: bf00 nop
8001c66: bd80 pop {r7, pc}
08001c68 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8001c68: b580 push {r7, lr}
8001c6a: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8001c6c: 4802 ldr r0, [pc, #8] @ (8001c78 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8001c6e: f001 f8c0 bl 8002df2 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8001c72: bf00 nop
8001c74: bd80 pop {r7, pc}
8001c76: bf00 nop
8001c78: 2000119c .word 0x2000119c
08001c7c <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8001c7c: b580 push {r7, lr}
8001c7e: b086 sub sp, #24
8001c80: af00 add r7, sp, #0
8001c82: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8001c84: 4a14 ldr r2, [pc, #80] @ (8001cd8 <_sbrk+0x5c>)
8001c86: 4b15 ldr r3, [pc, #84] @ (8001cdc <_sbrk+0x60>)
8001c88: 1ad3 subs r3, r2, r3
8001c8a: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8001c8c: 697b ldr r3, [r7, #20]
8001c8e: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8001c90: 4b13 ldr r3, [pc, #76] @ (8001ce0 <_sbrk+0x64>)
8001c92: 681b ldr r3, [r3, #0]
8001c94: 2b00 cmp r3, #0
8001c96: d102 bne.n 8001c9e <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8001c98: 4b11 ldr r3, [pc, #68] @ (8001ce0 <_sbrk+0x64>)
8001c9a: 4a12 ldr r2, [pc, #72] @ (8001ce4 <_sbrk+0x68>)
8001c9c: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8001c9e: 4b10 ldr r3, [pc, #64] @ (8001ce0 <_sbrk+0x64>)
8001ca0: 681a ldr r2, [r3, #0]
8001ca2: 687b ldr r3, [r7, #4]
8001ca4: 4413 add r3, r2
8001ca6: 693a ldr r2, [r7, #16]
8001ca8: 429a cmp r2, r3
8001caa: d207 bcs.n 8001cbc <_sbrk+0x40>
{
errno = ENOMEM;
8001cac: f008 fd3e bl 800a72c <__errno>
8001cb0: 4603 mov r3, r0
8001cb2: 220c movs r2, #12
8001cb4: 601a str r2, [r3, #0]
return (void *)-1;
8001cb6: f04f 33ff mov.w r3, #4294967295
8001cba: e009 b.n 8001cd0 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8001cbc: 4b08 ldr r3, [pc, #32] @ (8001ce0 <_sbrk+0x64>)
8001cbe: 681b ldr r3, [r3, #0]
8001cc0: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8001cc2: 4b07 ldr r3, [pc, #28] @ (8001ce0 <_sbrk+0x64>)
8001cc4: 681a ldr r2, [r3, #0]
8001cc6: 687b ldr r3, [r7, #4]
8001cc8: 4413 add r3, r2
8001cca: 4a05 ldr r2, [pc, #20] @ (8001ce0 <_sbrk+0x64>)
8001ccc: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8001cce: 68fb ldr r3, [r7, #12]
}
8001cd0: 4618 mov r0, r3
8001cd2: 3718 adds r7, #24
8001cd4: 46bd mov sp, r7
8001cd6: bd80 pop {r7, pc}
8001cd8: 20005000 .word 0x20005000
8001cdc: 00000400 .word 0x00000400
8001ce0: 200003a8 .word 0x200003a8
8001ce4: 200017e0 .word 0x200017e0
08001ce8 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8001ce8: b480 push {r7}
8001cea: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8001cec: bf00 nop
8001cee: 46bd mov sp, r7
8001cf0: bc80 pop {r7}
8001cf2: 4770 bx lr
08001cf4 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8001cf4: f7ff fff8 bl 8001ce8 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8001cf8: 480b ldr r0, [pc, #44] @ (8001d28 <LoopFillZerobss+0xe>)
ldr r1, =_edata
8001cfa: 490c ldr r1, [pc, #48] @ (8001d2c <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8001cfc: 4a0c ldr r2, [pc, #48] @ (8001d30 <LoopFillZerobss+0x16>)
movs r3, #0
8001cfe: 2300 movs r3, #0
b LoopCopyDataInit
8001d00: e002 b.n 8001d08 <LoopCopyDataInit>
08001d02 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8001d02: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8001d04: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8001d06: 3304 adds r3, #4
08001d08 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8001d08: 18c4 adds r4, r0, r3
cmp r4, r1
8001d0a: 428c cmp r4, r1
bcc CopyDataInit
8001d0c: d3f9 bcc.n 8001d02 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8001d0e: 4a09 ldr r2, [pc, #36] @ (8001d34 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8001d10: 4c09 ldr r4, [pc, #36] @ (8001d38 <LoopFillZerobss+0x1e>)
movs r3, #0
8001d12: 2300 movs r3, #0
b LoopFillZerobss
8001d14: e001 b.n 8001d1a <LoopFillZerobss>
08001d16 <FillZerobss>:
FillZerobss:
str r3, [r2]
8001d16: 6013 str r3, [r2, #0]
adds r2, r2, #4
8001d18: 3204 adds r2, #4
08001d1a <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8001d1a: 42a2 cmp r2, r4
bcc FillZerobss
8001d1c: d3fb bcc.n 8001d16 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8001d1e: f008 fd0b bl 800a738 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8001d22: f7ff f92f bl 8000f84 <main>
bx lr
8001d26: 4770 bx lr
ldr r0, =_sdata
8001d28: 20000000 .word 0x20000000
ldr r1, =_edata
8001d2c: 200001d0 .word 0x200001d0
ldr r2, =_sidata
8001d30: 0800b2e8 .word 0x0800b2e8
ldr r2, =_sbss
8001d34: 200001d0 .word 0x200001d0
ldr r4, =_ebss
8001d38: 200017dc .word 0x200017dc
08001d3c <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8001d3c: e7fe b.n 8001d3c <ADC1_2_IRQHandler>
...
08001d40 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8001d40: b580 push {r7, lr}
8001d42: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8001d44: 4b08 ldr r3, [pc, #32] @ (8001d68 <HAL_Init+0x28>)
8001d46: 681b ldr r3, [r3, #0]
8001d48: 4a07 ldr r2, [pc, #28] @ (8001d68 <HAL_Init+0x28>)
8001d4a: f043 0310 orr.w r3, r3, #16
8001d4e: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8001d50: 2003 movs r0, #3
8001d52: f000 fb35 bl 80023c0 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8001d56: 200f movs r0, #15
8001d58: f000 f808 bl 8001d6c <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8001d5c: f7ff fe00 bl 8001960 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8001d60: 2300 movs r3, #0
}
8001d62: 4618 mov r0, r3
8001d64: bd80 pop {r7, pc}
8001d66: bf00 nop
8001d68: 40022000 .word 0x40022000
08001d6c <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8001d6c: b580 push {r7, lr}
8001d6e: b082 sub sp, #8
8001d70: af00 add r7, sp, #0
8001d72: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8001d74: 4b12 ldr r3, [pc, #72] @ (8001dc0 <HAL_InitTick+0x54>)
8001d76: 681a ldr r2, [r3, #0]
8001d78: 4b12 ldr r3, [pc, #72] @ (8001dc4 <HAL_InitTick+0x58>)
8001d7a: 781b ldrb r3, [r3, #0]
8001d7c: 4619 mov r1, r3
8001d7e: f44f 737a mov.w r3, #1000 @ 0x3e8
8001d82: fbb3 f3f1 udiv r3, r3, r1
8001d86: fbb2 f3f3 udiv r3, r2, r3
8001d8a: 4618 mov r0, r3
8001d8c: f000 fb4d bl 800242a <HAL_SYSTICK_Config>
8001d90: 4603 mov r3, r0
8001d92: 2b00 cmp r3, #0
8001d94: d001 beq.n 8001d9a <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8001d96: 2301 movs r3, #1
8001d98: e00e b.n 8001db8 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8001d9a: 687b ldr r3, [r7, #4]
8001d9c: 2b0f cmp r3, #15
8001d9e: d80a bhi.n 8001db6 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8001da0: 2200 movs r2, #0
8001da2: 6879 ldr r1, [r7, #4]
8001da4: f04f 30ff mov.w r0, #4294967295
8001da8: f000 fb15 bl 80023d6 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8001dac: 4a06 ldr r2, [pc, #24] @ (8001dc8 <HAL_InitTick+0x5c>)
8001dae: 687b ldr r3, [r7, #4]
8001db0: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8001db2: 2300 movs r3, #0
8001db4: e000 b.n 8001db8 <HAL_InitTick+0x4c>
return HAL_ERROR;
8001db6: 2301 movs r3, #1
}
8001db8: 4618 mov r0, r3
8001dba: 3708 adds r7, #8
8001dbc: 46bd mov sp, r7
8001dbe: bd80 pop {r7, pc}
8001dc0: 20000004 .word 0x20000004
8001dc4: 2000000c .word 0x2000000c
8001dc8: 20000008 .word 0x20000008
08001dcc <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8001dcc: b480 push {r7}
8001dce: af00 add r7, sp, #0
uwTick += uwTickFreq;
8001dd0: 4b05 ldr r3, [pc, #20] @ (8001de8 <HAL_IncTick+0x1c>)
8001dd2: 781b ldrb r3, [r3, #0]
8001dd4: 461a mov r2, r3
8001dd6: 4b05 ldr r3, [pc, #20] @ (8001dec <HAL_IncTick+0x20>)
8001dd8: 681b ldr r3, [r3, #0]
8001dda: 4413 add r3, r2
8001ddc: 4a03 ldr r2, [pc, #12] @ (8001dec <HAL_IncTick+0x20>)
8001dde: 6013 str r3, [r2, #0]
}
8001de0: bf00 nop
8001de2: 46bd mov sp, r7
8001de4: bc80 pop {r7}
8001de6: 4770 bx lr
8001de8: 2000000c .word 0x2000000c
8001dec: 200003ac .word 0x200003ac
08001df0 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8001df0: b480 push {r7}
8001df2: af00 add r7, sp, #0
return uwTick;
8001df4: 4b02 ldr r3, [pc, #8] @ (8001e00 <HAL_GetTick+0x10>)
8001df6: 681b ldr r3, [r3, #0]
}
8001df8: 4618 mov r0, r3
8001dfa: 46bd mov sp, r7
8001dfc: bc80 pop {r7}
8001dfe: 4770 bx lr
8001e00: 200003ac .word 0x200003ac
08001e04 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8001e04: b580 push {r7, lr}
8001e06: b086 sub sp, #24
8001e08: af00 add r7, sp, #0
8001e0a: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8001e0c: 2300 movs r3, #0
8001e0e: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
8001e10: 2300 movs r3, #0
8001e12: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
8001e14: 2300 movs r3, #0
8001e16: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8001e18: 2300 movs r3, #0
8001e1a: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
8001e1c: 687b ldr r3, [r7, #4]
8001e1e: 2b00 cmp r3, #0
8001e20: d101 bne.n 8001e26 <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
8001e22: 2301 movs r3, #1
8001e24: e0be b.n 8001fa4 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8001e26: 687b ldr r3, [r7, #4]
8001e28: 689b ldr r3, [r3, #8]
8001e2a: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
8001e2c: 687b ldr r3, [r7, #4]
8001e2e: 6a9b ldr r3, [r3, #40] @ 0x28
8001e30: 2b00 cmp r3, #0
8001e32: d109 bne.n 8001e48 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8001e34: 687b ldr r3, [r7, #4]
8001e36: 2200 movs r2, #0
8001e38: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8001e3a: 687b ldr r3, [r7, #4]
8001e3c: 2200 movs r2, #0
8001e3e: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8001e42: 6878 ldr r0, [r7, #4]
8001e44: f7ff fdbe bl 80019c4 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
8001e48: 6878 ldr r0, [r7, #4]
8001e4a: f000 f9ab bl 80021a4 <ADC_ConversionStop_Disable>
8001e4e: 4603 mov r3, r0
8001e50: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8001e52: 687b ldr r3, [r7, #4]
8001e54: 6a9b ldr r3, [r3, #40] @ 0x28
8001e56: f003 0310 and.w r3, r3, #16
8001e5a: 2b00 cmp r3, #0
8001e5c: f040 8099 bne.w 8001f92 <HAL_ADC_Init+0x18e>
8001e60: 7dfb ldrb r3, [r7, #23]
8001e62: 2b00 cmp r3, #0
8001e64: f040 8095 bne.w 8001f92 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8001e68: 687b ldr r3, [r7, #4]
8001e6a: 6a9b ldr r3, [r3, #40] @ 0x28
8001e6c: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8001e70: f023 0302 bic.w r3, r3, #2
8001e74: f043 0202 orr.w r2, r3, #2
8001e78: 687b ldr r3, [r7, #4]
8001e7a: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
8001e7c: 687b ldr r3, [r7, #4]
8001e7e: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8001e80: 687b ldr r3, [r7, #4]
8001e82: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8001e84: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8001e86: 687b ldr r3, [r7, #4]
8001e88: 7b1b ldrb r3, [r3, #12]
8001e8a: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8001e8c: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
8001e8e: 68ba ldr r2, [r7, #8]
8001e90: 4313 orrs r3, r2
8001e92: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8001e94: 687b ldr r3, [r7, #4]
8001e96: 689b ldr r3, [r3, #8]
8001e98: f5b3 7f80 cmp.w r3, #256 @ 0x100
8001e9c: d003 beq.n 8001ea6 <HAL_ADC_Init+0xa2>
8001e9e: 687b ldr r3, [r7, #4]
8001ea0: 689b ldr r3, [r3, #8]
8001ea2: 2b01 cmp r3, #1
8001ea4: d102 bne.n 8001eac <HAL_ADC_Init+0xa8>
8001ea6: f44f 7380 mov.w r3, #256 @ 0x100
8001eaa: e000 b.n 8001eae <HAL_ADC_Init+0xaa>
8001eac: 2300 movs r3, #0
8001eae: 693a ldr r2, [r7, #16]
8001eb0: 4313 orrs r3, r2
8001eb2: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8001eb4: 687b ldr r3, [r7, #4]
8001eb6: 7d1b ldrb r3, [r3, #20]
8001eb8: 2b01 cmp r3, #1
8001eba: d119 bne.n 8001ef0 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8001ebc: 687b ldr r3, [r7, #4]
8001ebe: 7b1b ldrb r3, [r3, #12]
8001ec0: 2b00 cmp r3, #0
8001ec2: d109 bne.n 8001ed8 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8001ec4: 687b ldr r3, [r7, #4]
8001ec6: 699b ldr r3, [r3, #24]
8001ec8: 3b01 subs r3, #1
8001eca: 035a lsls r2, r3, #13
8001ecc: 693b ldr r3, [r7, #16]
8001ece: 4313 orrs r3, r2
8001ed0: f443 6300 orr.w r3, r3, #2048 @ 0x800
8001ed4: 613b str r3, [r7, #16]
8001ed6: e00b b.n 8001ef0 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8001ed8: 687b ldr r3, [r7, #4]
8001eda: 6a9b ldr r3, [r3, #40] @ 0x28
8001edc: f043 0220 orr.w r2, r3, #32
8001ee0: 687b ldr r3, [r7, #4]
8001ee2: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8001ee4: 687b ldr r3, [r7, #4]
8001ee6: 6adb ldr r3, [r3, #44] @ 0x2c
8001ee8: f043 0201 orr.w r2, r3, #1
8001eec: 687b ldr r3, [r7, #4]
8001eee: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
8001ef0: 687b ldr r3, [r7, #4]
8001ef2: 681b ldr r3, [r3, #0]
8001ef4: 685b ldr r3, [r3, #4]
8001ef6: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8001efa: 687b ldr r3, [r7, #4]
8001efc: 681b ldr r3, [r3, #0]
8001efe: 693a ldr r2, [r7, #16]
8001f00: 430a orrs r2, r1
8001f02: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
8001f04: 687b ldr r3, [r7, #4]
8001f06: 681b ldr r3, [r3, #0]
8001f08: 689a ldr r2, [r3, #8]
8001f0a: 4b28 ldr r3, [pc, #160] @ (8001fac <HAL_ADC_Init+0x1a8>)
8001f0c: 4013 ands r3, r2
8001f0e: 687a ldr r2, [r7, #4]
8001f10: 6812 ldr r2, [r2, #0]
8001f12: 68b9 ldr r1, [r7, #8]
8001f14: 430b orrs r3, r1
8001f16: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8001f18: 687b ldr r3, [r7, #4]
8001f1a: 689b ldr r3, [r3, #8]
8001f1c: f5b3 7f80 cmp.w r3, #256 @ 0x100
8001f20: d003 beq.n 8001f2a <HAL_ADC_Init+0x126>
8001f22: 687b ldr r3, [r7, #4]
8001f24: 689b ldr r3, [r3, #8]
8001f26: 2b01 cmp r3, #1
8001f28: d104 bne.n 8001f34 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
8001f2a: 687b ldr r3, [r7, #4]
8001f2c: 691b ldr r3, [r3, #16]
8001f2e: 3b01 subs r3, #1
8001f30: 051b lsls r3, r3, #20
8001f32: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8001f34: 687b ldr r3, [r7, #4]
8001f36: 681b ldr r3, [r3, #0]
8001f38: 6adb ldr r3, [r3, #44] @ 0x2c
8001f3a: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
8001f3e: 687b ldr r3, [r7, #4]
8001f40: 681b ldr r3, [r3, #0]
8001f42: 68fa ldr r2, [r7, #12]
8001f44: 430a orrs r2, r1
8001f46: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8001f48: 687b ldr r3, [r7, #4]
8001f4a: 681b ldr r3, [r3, #0]
8001f4c: 689a ldr r2, [r3, #8]
8001f4e: 4b18 ldr r3, [pc, #96] @ (8001fb0 <HAL_ADC_Init+0x1ac>)
8001f50: 4013 ands r3, r2
8001f52: 68ba ldr r2, [r7, #8]
8001f54: 429a cmp r2, r3
8001f56: d10b bne.n 8001f70 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8001f58: 687b ldr r3, [r7, #4]
8001f5a: 2200 movs r2, #0
8001f5c: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8001f5e: 687b ldr r3, [r7, #4]
8001f60: 6a9b ldr r3, [r3, #40] @ 0x28
8001f62: f023 0303 bic.w r3, r3, #3
8001f66: f043 0201 orr.w r2, r3, #1
8001f6a: 687b ldr r3, [r7, #4]
8001f6c: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8001f6e: e018 b.n 8001fa2 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8001f70: 687b ldr r3, [r7, #4]
8001f72: 6a9b ldr r3, [r3, #40] @ 0x28
8001f74: f023 0312 bic.w r3, r3, #18
8001f78: f043 0210 orr.w r2, r3, #16
8001f7c: 687b ldr r3, [r7, #4]
8001f7e: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8001f80: 687b ldr r3, [r7, #4]
8001f82: 6adb ldr r3, [r3, #44] @ 0x2c
8001f84: f043 0201 orr.w r2, r3, #1
8001f88: 687b ldr r3, [r7, #4]
8001f8a: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
8001f8c: 2301 movs r3, #1
8001f8e: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8001f90: e007 b.n 8001fa2 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8001f92: 687b ldr r3, [r7, #4]
8001f94: 6a9b ldr r3, [r3, #40] @ 0x28
8001f96: f043 0210 orr.w r2, r3, #16
8001f9a: 687b ldr r3, [r7, #4]
8001f9c: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8001f9e: 2301 movs r3, #1
8001fa0: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8001fa2: 7dfb ldrb r3, [r7, #23]
}
8001fa4: 4618 mov r0, r3
8001fa6: 3718 adds r7, #24
8001fa8: 46bd mov sp, r7
8001faa: bd80 pop {r7, pc}
8001fac: ffe1f7fd .word 0xffe1f7fd
8001fb0: ff1f0efe .word 0xff1f0efe
08001fb4 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8001fb4: b480 push {r7}
8001fb6: b085 sub sp, #20
8001fb8: af00 add r7, sp, #0
8001fba: 6078 str r0, [r7, #4]
8001fbc: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8001fbe: 2300 movs r3, #0
8001fc0: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8001fc2: 2300 movs r3, #0
8001fc4: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8001fc6: 687b ldr r3, [r7, #4]
8001fc8: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8001fcc: 2b01 cmp r3, #1
8001fce: d101 bne.n 8001fd4 <HAL_ADC_ConfigChannel+0x20>
8001fd0: 2302 movs r3, #2
8001fd2: e0dc b.n 800218e <HAL_ADC_ConfigChannel+0x1da>
8001fd4: 687b ldr r3, [r7, #4]
8001fd6: 2201 movs r2, #1
8001fd8: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
8001fdc: 683b ldr r3, [r7, #0]
8001fde: 685b ldr r3, [r3, #4]
8001fe0: 2b06 cmp r3, #6
8001fe2: d81c bhi.n 800201e <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8001fe4: 687b ldr r3, [r7, #4]
8001fe6: 681b ldr r3, [r3, #0]
8001fe8: 6b59 ldr r1, [r3, #52] @ 0x34
8001fea: 683b ldr r3, [r7, #0]
8001fec: 685a ldr r2, [r3, #4]
8001fee: 4613 mov r3, r2
8001ff0: 009b lsls r3, r3, #2
8001ff2: 4413 add r3, r2
8001ff4: 3b05 subs r3, #5
8001ff6: 221f movs r2, #31
8001ff8: fa02 f303 lsl.w r3, r2, r3
8001ffc: 43db mvns r3, r3
8001ffe: 4019 ands r1, r3
8002000: 683b ldr r3, [r7, #0]
8002002: 6818 ldr r0, [r3, #0]
8002004: 683b ldr r3, [r7, #0]
8002006: 685a ldr r2, [r3, #4]
8002008: 4613 mov r3, r2
800200a: 009b lsls r3, r3, #2
800200c: 4413 add r3, r2
800200e: 3b05 subs r3, #5
8002010: fa00 f203 lsl.w r2, r0, r3
8002014: 687b ldr r3, [r7, #4]
8002016: 681b ldr r3, [r3, #0]
8002018: 430a orrs r2, r1
800201a: 635a str r2, [r3, #52] @ 0x34
800201c: e03c b.n 8002098 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
800201e: 683b ldr r3, [r7, #0]
8002020: 685b ldr r3, [r3, #4]
8002022: 2b0c cmp r3, #12
8002024: d81c bhi.n 8002060 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
8002026: 687b ldr r3, [r7, #4]
8002028: 681b ldr r3, [r3, #0]
800202a: 6b19 ldr r1, [r3, #48] @ 0x30
800202c: 683b ldr r3, [r7, #0]
800202e: 685a ldr r2, [r3, #4]
8002030: 4613 mov r3, r2
8002032: 009b lsls r3, r3, #2
8002034: 4413 add r3, r2
8002036: 3b23 subs r3, #35 @ 0x23
8002038: 221f movs r2, #31
800203a: fa02 f303 lsl.w r3, r2, r3
800203e: 43db mvns r3, r3
8002040: 4019 ands r1, r3
8002042: 683b ldr r3, [r7, #0]
8002044: 6818 ldr r0, [r3, #0]
8002046: 683b ldr r3, [r7, #0]
8002048: 685a ldr r2, [r3, #4]
800204a: 4613 mov r3, r2
800204c: 009b lsls r3, r3, #2
800204e: 4413 add r3, r2
8002050: 3b23 subs r3, #35 @ 0x23
8002052: fa00 f203 lsl.w r2, r0, r3
8002056: 687b ldr r3, [r7, #4]
8002058: 681b ldr r3, [r3, #0]
800205a: 430a orrs r2, r1
800205c: 631a str r2, [r3, #48] @ 0x30
800205e: e01b b.n 8002098 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
8002060: 687b ldr r3, [r7, #4]
8002062: 681b ldr r3, [r3, #0]
8002064: 6ad9 ldr r1, [r3, #44] @ 0x2c
8002066: 683b ldr r3, [r7, #0]
8002068: 685a ldr r2, [r3, #4]
800206a: 4613 mov r3, r2
800206c: 009b lsls r3, r3, #2
800206e: 4413 add r3, r2
8002070: 3b41 subs r3, #65 @ 0x41
8002072: 221f movs r2, #31
8002074: fa02 f303 lsl.w r3, r2, r3
8002078: 43db mvns r3, r3
800207a: 4019 ands r1, r3
800207c: 683b ldr r3, [r7, #0]
800207e: 6818 ldr r0, [r3, #0]
8002080: 683b ldr r3, [r7, #0]
8002082: 685a ldr r2, [r3, #4]
8002084: 4613 mov r3, r2
8002086: 009b lsls r3, r3, #2
8002088: 4413 add r3, r2
800208a: 3b41 subs r3, #65 @ 0x41
800208c: fa00 f203 lsl.w r2, r0, r3
8002090: 687b ldr r3, [r7, #4]
8002092: 681b ldr r3, [r3, #0]
8002094: 430a orrs r2, r1
8002096: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
8002098: 683b ldr r3, [r7, #0]
800209a: 681b ldr r3, [r3, #0]
800209c: 2b09 cmp r3, #9
800209e: d91c bls.n 80020da <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
80020a0: 687b ldr r3, [r7, #4]
80020a2: 681b ldr r3, [r3, #0]
80020a4: 68d9 ldr r1, [r3, #12]
80020a6: 683b ldr r3, [r7, #0]
80020a8: 681a ldr r2, [r3, #0]
80020aa: 4613 mov r3, r2
80020ac: 005b lsls r3, r3, #1
80020ae: 4413 add r3, r2
80020b0: 3b1e subs r3, #30
80020b2: 2207 movs r2, #7
80020b4: fa02 f303 lsl.w r3, r2, r3
80020b8: 43db mvns r3, r3
80020ba: 4019 ands r1, r3
80020bc: 683b ldr r3, [r7, #0]
80020be: 6898 ldr r0, [r3, #8]
80020c0: 683b ldr r3, [r7, #0]
80020c2: 681a ldr r2, [r3, #0]
80020c4: 4613 mov r3, r2
80020c6: 005b lsls r3, r3, #1
80020c8: 4413 add r3, r2
80020ca: 3b1e subs r3, #30
80020cc: fa00 f203 lsl.w r2, r0, r3
80020d0: 687b ldr r3, [r7, #4]
80020d2: 681b ldr r3, [r3, #0]
80020d4: 430a orrs r2, r1
80020d6: 60da str r2, [r3, #12]
80020d8: e019 b.n 800210e <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
80020da: 687b ldr r3, [r7, #4]
80020dc: 681b ldr r3, [r3, #0]
80020de: 6919 ldr r1, [r3, #16]
80020e0: 683b ldr r3, [r7, #0]
80020e2: 681a ldr r2, [r3, #0]
80020e4: 4613 mov r3, r2
80020e6: 005b lsls r3, r3, #1
80020e8: 4413 add r3, r2
80020ea: 2207 movs r2, #7
80020ec: fa02 f303 lsl.w r3, r2, r3
80020f0: 43db mvns r3, r3
80020f2: 4019 ands r1, r3
80020f4: 683b ldr r3, [r7, #0]
80020f6: 6898 ldr r0, [r3, #8]
80020f8: 683b ldr r3, [r7, #0]
80020fa: 681a ldr r2, [r3, #0]
80020fc: 4613 mov r3, r2
80020fe: 005b lsls r3, r3, #1
8002100: 4413 add r3, r2
8002102: fa00 f203 lsl.w r2, r0, r3
8002106: 687b ldr r3, [r7, #4]
8002108: 681b ldr r3, [r3, #0]
800210a: 430a orrs r2, r1
800210c: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
800210e: 683b ldr r3, [r7, #0]
8002110: 681b ldr r3, [r3, #0]
8002112: 2b10 cmp r3, #16
8002114: d003 beq.n 800211e <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8002116: 683b ldr r3, [r7, #0]
8002118: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
800211a: 2b11 cmp r3, #17
800211c: d132 bne.n 8002184 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
800211e: 687b ldr r3, [r7, #4]
8002120: 681b ldr r3, [r3, #0]
8002122: 4a1d ldr r2, [pc, #116] @ (8002198 <HAL_ADC_ConfigChannel+0x1e4>)
8002124: 4293 cmp r3, r2
8002126: d125 bne.n 8002174 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8002128: 687b ldr r3, [r7, #4]
800212a: 681b ldr r3, [r3, #0]
800212c: 689b ldr r3, [r3, #8]
800212e: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8002132: 2b00 cmp r3, #0
8002134: d126 bne.n 8002184 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8002136: 687b ldr r3, [r7, #4]
8002138: 681b ldr r3, [r3, #0]
800213a: 689a ldr r2, [r3, #8]
800213c: 687b ldr r3, [r7, #4]
800213e: 681b ldr r3, [r3, #0]
8002140: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8002144: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
8002146: 683b ldr r3, [r7, #0]
8002148: 681b ldr r3, [r3, #0]
800214a: 2b10 cmp r3, #16
800214c: d11a bne.n 8002184 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
800214e: 4b13 ldr r3, [pc, #76] @ (800219c <HAL_ADC_ConfigChannel+0x1e8>)
8002150: 681b ldr r3, [r3, #0]
8002152: 4a13 ldr r2, [pc, #76] @ (80021a0 <HAL_ADC_ConfigChannel+0x1ec>)
8002154: fba2 2303 umull r2, r3, r2, r3
8002158: 0c9a lsrs r2, r3, #18
800215a: 4613 mov r3, r2
800215c: 009b lsls r3, r3, #2
800215e: 4413 add r3, r2
8002160: 005b lsls r3, r3, #1
8002162: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8002164: e002 b.n 800216c <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
8002166: 68bb ldr r3, [r7, #8]
8002168: 3b01 subs r3, #1
800216a: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
800216c: 68bb ldr r3, [r7, #8]
800216e: 2b00 cmp r3, #0
8002170: d1f9 bne.n 8002166 <HAL_ADC_ConfigChannel+0x1b2>
8002172: e007 b.n 8002184 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8002174: 687b ldr r3, [r7, #4]
8002176: 6a9b ldr r3, [r3, #40] @ 0x28
8002178: f043 0220 orr.w r2, r3, #32
800217c: 687b ldr r3, [r7, #4]
800217e: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8002180: 2301 movs r3, #1
8002182: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8002184: 687b ldr r3, [r7, #4]
8002186: 2200 movs r2, #0
8002188: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
800218c: 7bfb ldrb r3, [r7, #15]
}
800218e: 4618 mov r0, r3
8002190: 3714 adds r7, #20
8002192: 46bd mov sp, r7
8002194: bc80 pop {r7}
8002196: 4770 bx lr
8002198: 40012400 .word 0x40012400
800219c: 20000004 .word 0x20000004
80021a0: 431bde83 .word 0x431bde83
080021a4 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
80021a4: b580 push {r7, lr}
80021a6: b084 sub sp, #16
80021a8: af00 add r7, sp, #0
80021aa: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
80021ac: 2300 movs r3, #0
80021ae: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
80021b0: 687b ldr r3, [r7, #4]
80021b2: 681b ldr r3, [r3, #0]
80021b4: 689b ldr r3, [r3, #8]
80021b6: f003 0301 and.w r3, r3, #1
80021ba: 2b01 cmp r3, #1
80021bc: d12e bne.n 800221c <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
80021be: 687b ldr r3, [r7, #4]
80021c0: 681b ldr r3, [r3, #0]
80021c2: 689a ldr r2, [r3, #8]
80021c4: 687b ldr r3, [r7, #4]
80021c6: 681b ldr r3, [r3, #0]
80021c8: f022 0201 bic.w r2, r2, #1
80021cc: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
80021ce: f7ff fe0f bl 8001df0 <HAL_GetTick>
80021d2: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
80021d4: e01b b.n 800220e <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
80021d6: f7ff fe0b bl 8001df0 <HAL_GetTick>
80021da: 4602 mov r2, r0
80021dc: 68fb ldr r3, [r7, #12]
80021de: 1ad3 subs r3, r2, r3
80021e0: 2b02 cmp r3, #2
80021e2: d914 bls.n 800220e <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
80021e4: 687b ldr r3, [r7, #4]
80021e6: 681b ldr r3, [r3, #0]
80021e8: 689b ldr r3, [r3, #8]
80021ea: f003 0301 and.w r3, r3, #1
80021ee: 2b01 cmp r3, #1
80021f0: d10d bne.n 800220e <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80021f2: 687b ldr r3, [r7, #4]
80021f4: 6a9b ldr r3, [r3, #40] @ 0x28
80021f6: f043 0210 orr.w r2, r3, #16
80021fa: 687b ldr r3, [r7, #4]
80021fc: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80021fe: 687b ldr r3, [r7, #4]
8002200: 6adb ldr r3, [r3, #44] @ 0x2c
8002202: f043 0201 orr.w r2, r3, #1
8002206: 687b ldr r3, [r7, #4]
8002208: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
800220a: 2301 movs r3, #1
800220c: e007 b.n 800221e <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
800220e: 687b ldr r3, [r7, #4]
8002210: 681b ldr r3, [r3, #0]
8002212: 689b ldr r3, [r3, #8]
8002214: f003 0301 and.w r3, r3, #1
8002218: 2b01 cmp r3, #1
800221a: d0dc beq.n 80021d6 <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
800221c: 2300 movs r3, #0
}
800221e: 4618 mov r0, r3
8002220: 3710 adds r7, #16
8002222: 46bd mov sp, r7
8002224: bd80 pop {r7, pc}
...
08002228 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8002228: b480 push {r7}
800222a: b085 sub sp, #20
800222c: af00 add r7, sp, #0
800222e: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8002230: 687b ldr r3, [r7, #4]
8002232: f003 0307 and.w r3, r3, #7
8002236: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8002238: 4b0c ldr r3, [pc, #48] @ (800226c <__NVIC_SetPriorityGrouping+0x44>)
800223a: 68db ldr r3, [r3, #12]
800223c: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
800223e: 68ba ldr r2, [r7, #8]
8002240: f64f 03ff movw r3, #63743 @ 0xf8ff
8002244: 4013 ands r3, r2
8002246: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8002248: 68fb ldr r3, [r7, #12]
800224a: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
800224c: 68bb ldr r3, [r7, #8]
800224e: 4313 orrs r3, r2
reg_value = (reg_value |
8002250: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8002254: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8002258: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
800225a: 4a04 ldr r2, [pc, #16] @ (800226c <__NVIC_SetPriorityGrouping+0x44>)
800225c: 68bb ldr r3, [r7, #8]
800225e: 60d3 str r3, [r2, #12]
}
8002260: bf00 nop
8002262: 3714 adds r7, #20
8002264: 46bd mov sp, r7
8002266: bc80 pop {r7}
8002268: 4770 bx lr
800226a: bf00 nop
800226c: e000ed00 .word 0xe000ed00
08002270 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8002270: b480 push {r7}
8002272: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8002274: 4b04 ldr r3, [pc, #16] @ (8002288 <__NVIC_GetPriorityGrouping+0x18>)
8002276: 68db ldr r3, [r3, #12]
8002278: 0a1b lsrs r3, r3, #8
800227a: f003 0307 and.w r3, r3, #7
}
800227e: 4618 mov r0, r3
8002280: 46bd mov sp, r7
8002282: bc80 pop {r7}
8002284: 4770 bx lr
8002286: bf00 nop
8002288: e000ed00 .word 0xe000ed00
0800228c <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
800228c: b480 push {r7}
800228e: b083 sub sp, #12
8002290: af00 add r7, sp, #0
8002292: 4603 mov r3, r0
8002294: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8002296: f997 3007 ldrsb.w r3, [r7, #7]
800229a: 2b00 cmp r3, #0
800229c: db0b blt.n 80022b6 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
800229e: 79fb ldrb r3, [r7, #7]
80022a0: f003 021f and.w r2, r3, #31
80022a4: 4906 ldr r1, [pc, #24] @ (80022c0 <__NVIC_EnableIRQ+0x34>)
80022a6: f997 3007 ldrsb.w r3, [r7, #7]
80022aa: 095b lsrs r3, r3, #5
80022ac: 2001 movs r0, #1
80022ae: fa00 f202 lsl.w r2, r0, r2
80022b2: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
80022b6: bf00 nop
80022b8: 370c adds r7, #12
80022ba: 46bd mov sp, r7
80022bc: bc80 pop {r7}
80022be: 4770 bx lr
80022c0: e000e100 .word 0xe000e100
080022c4 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
80022c4: b480 push {r7}
80022c6: b083 sub sp, #12
80022c8: af00 add r7, sp, #0
80022ca: 4603 mov r3, r0
80022cc: 6039 str r1, [r7, #0]
80022ce: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80022d0: f997 3007 ldrsb.w r3, [r7, #7]
80022d4: 2b00 cmp r3, #0
80022d6: db0a blt.n 80022ee <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80022d8: 683b ldr r3, [r7, #0]
80022da: b2da uxtb r2, r3
80022dc: 490c ldr r1, [pc, #48] @ (8002310 <__NVIC_SetPriority+0x4c>)
80022de: f997 3007 ldrsb.w r3, [r7, #7]
80022e2: 0112 lsls r2, r2, #4
80022e4: b2d2 uxtb r2, r2
80022e6: 440b add r3, r1
80022e8: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
80022ec: e00a b.n 8002304 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80022ee: 683b ldr r3, [r7, #0]
80022f0: b2da uxtb r2, r3
80022f2: 4908 ldr r1, [pc, #32] @ (8002314 <__NVIC_SetPriority+0x50>)
80022f4: 79fb ldrb r3, [r7, #7]
80022f6: f003 030f and.w r3, r3, #15
80022fa: 3b04 subs r3, #4
80022fc: 0112 lsls r2, r2, #4
80022fe: b2d2 uxtb r2, r2
8002300: 440b add r3, r1
8002302: 761a strb r2, [r3, #24]
}
8002304: bf00 nop
8002306: 370c adds r7, #12
8002308: 46bd mov sp, r7
800230a: bc80 pop {r7}
800230c: 4770 bx lr
800230e: bf00 nop
8002310: e000e100 .word 0xe000e100
8002314: e000ed00 .word 0xe000ed00
08002318 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8002318: b480 push {r7}
800231a: b089 sub sp, #36 @ 0x24
800231c: af00 add r7, sp, #0
800231e: 60f8 str r0, [r7, #12]
8002320: 60b9 str r1, [r7, #8]
8002322: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8002324: 68fb ldr r3, [r7, #12]
8002326: f003 0307 and.w r3, r3, #7
800232a: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
800232c: 69fb ldr r3, [r7, #28]
800232e: f1c3 0307 rsb r3, r3, #7
8002332: 2b04 cmp r3, #4
8002334: bf28 it cs
8002336: 2304 movcs r3, #4
8002338: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
800233a: 69fb ldr r3, [r7, #28]
800233c: 3304 adds r3, #4
800233e: 2b06 cmp r3, #6
8002340: d902 bls.n 8002348 <NVIC_EncodePriority+0x30>
8002342: 69fb ldr r3, [r7, #28]
8002344: 3b03 subs r3, #3
8002346: e000 b.n 800234a <NVIC_EncodePriority+0x32>
8002348: 2300 movs r3, #0
800234a: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
800234c: f04f 32ff mov.w r2, #4294967295
8002350: 69bb ldr r3, [r7, #24]
8002352: fa02 f303 lsl.w r3, r2, r3
8002356: 43da mvns r2, r3
8002358: 68bb ldr r3, [r7, #8]
800235a: 401a ands r2, r3
800235c: 697b ldr r3, [r7, #20]
800235e: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8002360: f04f 31ff mov.w r1, #4294967295
8002364: 697b ldr r3, [r7, #20]
8002366: fa01 f303 lsl.w r3, r1, r3
800236a: 43d9 mvns r1, r3
800236c: 687b ldr r3, [r7, #4]
800236e: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8002370: 4313 orrs r3, r2
);
}
8002372: 4618 mov r0, r3
8002374: 3724 adds r7, #36 @ 0x24
8002376: 46bd mov sp, r7
8002378: bc80 pop {r7}
800237a: 4770 bx lr
0800237c <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
800237c: b580 push {r7, lr}
800237e: b082 sub sp, #8
8002380: af00 add r7, sp, #0
8002382: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8002384: 687b ldr r3, [r7, #4]
8002386: 3b01 subs r3, #1
8002388: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
800238c: d301 bcc.n 8002392 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
800238e: 2301 movs r3, #1
8002390: e00f b.n 80023b2 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8002392: 4a0a ldr r2, [pc, #40] @ (80023bc <SysTick_Config+0x40>)
8002394: 687b ldr r3, [r7, #4]
8002396: 3b01 subs r3, #1
8002398: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
800239a: 210f movs r1, #15
800239c: f04f 30ff mov.w r0, #4294967295
80023a0: f7ff ff90 bl 80022c4 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
80023a4: 4b05 ldr r3, [pc, #20] @ (80023bc <SysTick_Config+0x40>)
80023a6: 2200 movs r2, #0
80023a8: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
80023aa: 4b04 ldr r3, [pc, #16] @ (80023bc <SysTick_Config+0x40>)
80023ac: 2207 movs r2, #7
80023ae: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
80023b0: 2300 movs r3, #0
}
80023b2: 4618 mov r0, r3
80023b4: 3708 adds r7, #8
80023b6: 46bd mov sp, r7
80023b8: bd80 pop {r7, pc}
80023ba: bf00 nop
80023bc: e000e010 .word 0xe000e010
080023c0 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80023c0: b580 push {r7, lr}
80023c2: b082 sub sp, #8
80023c4: af00 add r7, sp, #0
80023c6: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
80023c8: 6878 ldr r0, [r7, #4]
80023ca: f7ff ff2d bl 8002228 <__NVIC_SetPriorityGrouping>
}
80023ce: bf00 nop
80023d0: 3708 adds r7, #8
80023d2: 46bd mov sp, r7
80023d4: bd80 pop {r7, pc}
080023d6 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
80023d6: b580 push {r7, lr}
80023d8: b086 sub sp, #24
80023da: af00 add r7, sp, #0
80023dc: 4603 mov r3, r0
80023de: 60b9 str r1, [r7, #8]
80023e0: 607a str r2, [r7, #4]
80023e2: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
80023e4: 2300 movs r3, #0
80023e6: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
80023e8: f7ff ff42 bl 8002270 <__NVIC_GetPriorityGrouping>
80023ec: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
80023ee: 687a ldr r2, [r7, #4]
80023f0: 68b9 ldr r1, [r7, #8]
80023f2: 6978 ldr r0, [r7, #20]
80023f4: f7ff ff90 bl 8002318 <NVIC_EncodePriority>
80023f8: 4602 mov r2, r0
80023fa: f997 300f ldrsb.w r3, [r7, #15]
80023fe: 4611 mov r1, r2
8002400: 4618 mov r0, r3
8002402: f7ff ff5f bl 80022c4 <__NVIC_SetPriority>
}
8002406: bf00 nop
8002408: 3718 adds r7, #24
800240a: 46bd mov sp, r7
800240c: bd80 pop {r7, pc}
0800240e <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
800240e: b580 push {r7, lr}
8002410: b082 sub sp, #8
8002412: af00 add r7, sp, #0
8002414: 4603 mov r3, r0
8002416: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8002418: f997 3007 ldrsb.w r3, [r7, #7]
800241c: 4618 mov r0, r3
800241e: f7ff ff35 bl 800228c <__NVIC_EnableIRQ>
}
8002422: bf00 nop
8002424: 3708 adds r7, #8
8002426: 46bd mov sp, r7
8002428: bd80 pop {r7, pc}
0800242a <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
800242a: b580 push {r7, lr}
800242c: b082 sub sp, #8
800242e: af00 add r7, sp, #0
8002430: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8002432: 6878 ldr r0, [r7, #4]
8002434: f7ff ffa2 bl 800237c <SysTick_Config>
8002438: 4603 mov r3, r0
}
800243a: 4618 mov r0, r3
800243c: 3708 adds r7, #8
800243e: 46bd mov sp, r7
8002440: bd80 pop {r7, pc}
08002442 <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8002442: b580 push {r7, lr}
8002444: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
8002446: f7fe fd65 bl 8000f14 <HAL_SYSTICK_Callback>
}
800244a: bf00 nop
800244c: bd80 pop {r7, pc}
...
08002450 <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8002450: b5f0 push {r4, r5, r6, r7, lr}
8002452: b087 sub sp, #28
8002454: af00 add r7, sp, #0
8002456: 60f8 str r0, [r7, #12]
8002458: 60b9 str r1, [r7, #8]
800245a: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
800245e: 2301 movs r3, #1
8002460: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8002462: 2300 movs r3, #0
8002464: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
8002466: 2300 movs r3, #0
8002468: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
800246a: 4b2f ldr r3, [pc, #188] @ (8002528 <HAL_FLASH_Program+0xd8>)
800246c: 7e1b ldrb r3, [r3, #24]
800246e: 2b01 cmp r3, #1
8002470: d101 bne.n 8002476 <HAL_FLASH_Program+0x26>
8002472: 2302 movs r3, #2
8002474: e054 b.n 8002520 <HAL_FLASH_Program+0xd0>
8002476: 4b2c ldr r3, [pc, #176] @ (8002528 <HAL_FLASH_Program+0xd8>)
8002478: 2201 movs r2, #1
800247a: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
800247c: f24c 3050 movw r0, #50000 @ 0xc350
8002480: f000 f8a8 bl 80025d4 <FLASH_WaitForLastOperation>
8002484: 4603 mov r3, r0
8002486: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
8002488: 7dfb ldrb r3, [r7, #23]
800248a: 2b00 cmp r3, #0
800248c: d144 bne.n 8002518 <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
800248e: 68fb ldr r3, [r7, #12]
8002490: 2b01 cmp r3, #1
8002492: d102 bne.n 800249a <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8002494: 2301 movs r3, #1
8002496: 757b strb r3, [r7, #21]
8002498: e007 b.n 80024aa <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
800249a: 68fb ldr r3, [r7, #12]
800249c: 2b02 cmp r3, #2
800249e: d102 bne.n 80024a6 <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
80024a0: 2302 movs r3, #2
80024a2: 757b strb r3, [r7, #21]
80024a4: e001 b.n 80024aa <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
80024a6: 2304 movs r3, #4
80024a8: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
80024aa: 2300 movs r3, #0
80024ac: 75bb strb r3, [r7, #22]
80024ae: e02d b.n 800250c <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
80024b0: 7dbb ldrb r3, [r7, #22]
80024b2: 005a lsls r2, r3, #1
80024b4: 68bb ldr r3, [r7, #8]
80024b6: eb02 0c03 add.w ip, r2, r3
80024ba: 7dbb ldrb r3, [r7, #22]
80024bc: 0119 lsls r1, r3, #4
80024be: e9d7 2300 ldrd r2, r3, [r7]
80024c2: f1c1 0620 rsb r6, r1, #32
80024c6: f1a1 0020 sub.w r0, r1, #32
80024ca: fa22 f401 lsr.w r4, r2, r1
80024ce: fa03 f606 lsl.w r6, r3, r6
80024d2: 4334 orrs r4, r6
80024d4: fa23 f000 lsr.w r0, r3, r0
80024d8: 4304 orrs r4, r0
80024da: fa23 f501 lsr.w r5, r3, r1
80024de: b2a3 uxth r3, r4
80024e0: 4619 mov r1, r3
80024e2: 4660 mov r0, ip
80024e4: f000 f85a bl 800259c <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
80024e8: f24c 3050 movw r0, #50000 @ 0xc350
80024ec: f000 f872 bl 80025d4 <FLASH_WaitForLastOperation>
80024f0: 4603 mov r3, r0
80024f2: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
80024f4: 4b0d ldr r3, [pc, #52] @ (800252c <HAL_FLASH_Program+0xdc>)
80024f6: 691b ldr r3, [r3, #16]
80024f8: 4a0c ldr r2, [pc, #48] @ (800252c <HAL_FLASH_Program+0xdc>)
80024fa: f023 0301 bic.w r3, r3, #1
80024fe: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
8002500: 7dfb ldrb r3, [r7, #23]
8002502: 2b00 cmp r3, #0
8002504: d107 bne.n 8002516 <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
8002506: 7dbb ldrb r3, [r7, #22]
8002508: 3301 adds r3, #1
800250a: 75bb strb r3, [r7, #22]
800250c: 7dba ldrb r2, [r7, #22]
800250e: 7d7b ldrb r3, [r7, #21]
8002510: 429a cmp r2, r3
8002512: d3cd bcc.n 80024b0 <HAL_FLASH_Program+0x60>
8002514: e000 b.n 8002518 <HAL_FLASH_Program+0xc8>
{
break;
8002516: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8002518: 4b03 ldr r3, [pc, #12] @ (8002528 <HAL_FLASH_Program+0xd8>)
800251a: 2200 movs r2, #0
800251c: 761a strb r2, [r3, #24]
return status;
800251e: 7dfb ldrb r3, [r7, #23]
}
8002520: 4618 mov r0, r3
8002522: 371c adds r7, #28
8002524: 46bd mov sp, r7
8002526: bdf0 pop {r4, r5, r6, r7, pc}
8002528: 200003b0 .word 0x200003b0
800252c: 40022000 .word 0x40022000
08002530 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8002530: b480 push {r7}
8002532: b083 sub sp, #12
8002534: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
8002536: 2300 movs r3, #0
8002538: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
800253a: 4b0d ldr r3, [pc, #52] @ (8002570 <HAL_FLASH_Unlock+0x40>)
800253c: 691b ldr r3, [r3, #16]
800253e: f003 0380 and.w r3, r3, #128 @ 0x80
8002542: 2b00 cmp r3, #0
8002544: d00d beq.n 8002562 <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
8002546: 4b0a ldr r3, [pc, #40] @ (8002570 <HAL_FLASH_Unlock+0x40>)
8002548: 4a0a ldr r2, [pc, #40] @ (8002574 <HAL_FLASH_Unlock+0x44>)
800254a: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
800254c: 4b08 ldr r3, [pc, #32] @ (8002570 <HAL_FLASH_Unlock+0x40>)
800254e: 4a0a ldr r2, [pc, #40] @ (8002578 <HAL_FLASH_Unlock+0x48>)
8002550: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8002552: 4b07 ldr r3, [pc, #28] @ (8002570 <HAL_FLASH_Unlock+0x40>)
8002554: 691b ldr r3, [r3, #16]
8002556: f003 0380 and.w r3, r3, #128 @ 0x80
800255a: 2b00 cmp r3, #0
800255c: d001 beq.n 8002562 <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
800255e: 2301 movs r3, #1
8002560: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
8002562: 79fb ldrb r3, [r7, #7]
}
8002564: 4618 mov r0, r3
8002566: 370c adds r7, #12
8002568: 46bd mov sp, r7
800256a: bc80 pop {r7}
800256c: 4770 bx lr
800256e: bf00 nop
8002570: 40022000 .word 0x40022000
8002574: 45670123 .word 0x45670123
8002578: cdef89ab .word 0xcdef89ab
0800257c <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
800257c: b480 push {r7}
800257e: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
8002580: 4b05 ldr r3, [pc, #20] @ (8002598 <HAL_FLASH_Lock+0x1c>)
8002582: 691b ldr r3, [r3, #16]
8002584: 4a04 ldr r2, [pc, #16] @ (8002598 <HAL_FLASH_Lock+0x1c>)
8002586: f043 0380 orr.w r3, r3, #128 @ 0x80
800258a: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
800258c: 2300 movs r3, #0
}
800258e: 4618 mov r0, r3
8002590: 46bd mov sp, r7
8002592: bc80 pop {r7}
8002594: 4770 bx lr
8002596: bf00 nop
8002598: 40022000 .word 0x40022000
0800259c <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
800259c: b480 push {r7}
800259e: b083 sub sp, #12
80025a0: af00 add r7, sp, #0
80025a2: 6078 str r0, [r7, #4]
80025a4: 460b mov r3, r1
80025a6: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80025a8: 4b08 ldr r3, [pc, #32] @ (80025cc <FLASH_Program_HalfWord+0x30>)
80025aa: 2200 movs r2, #0
80025ac: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
80025ae: 4b08 ldr r3, [pc, #32] @ (80025d0 <FLASH_Program_HalfWord+0x34>)
80025b0: 691b ldr r3, [r3, #16]
80025b2: 4a07 ldr r2, [pc, #28] @ (80025d0 <FLASH_Program_HalfWord+0x34>)
80025b4: f043 0301 orr.w r3, r3, #1
80025b8: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
80025ba: 687b ldr r3, [r7, #4]
80025bc: 887a ldrh r2, [r7, #2]
80025be: 801a strh r2, [r3, #0]
}
80025c0: bf00 nop
80025c2: 370c adds r7, #12
80025c4: 46bd mov sp, r7
80025c6: bc80 pop {r7}
80025c8: 4770 bx lr
80025ca: bf00 nop
80025cc: 200003b0 .word 0x200003b0
80025d0: 40022000 .word 0x40022000
080025d4 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
80025d4: b580 push {r7, lr}
80025d6: b084 sub sp, #16
80025d8: af00 add r7, sp, #0
80025da: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
80025dc: f7ff fc08 bl 8001df0 <HAL_GetTick>
80025e0: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80025e2: e010 b.n 8002606 <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
80025e4: 687b ldr r3, [r7, #4]
80025e6: f1b3 3fff cmp.w r3, #4294967295
80025ea: d00c beq.n 8002606 <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
80025ec: 687b ldr r3, [r7, #4]
80025ee: 2b00 cmp r3, #0
80025f0: d007 beq.n 8002602 <FLASH_WaitForLastOperation+0x2e>
80025f2: f7ff fbfd bl 8001df0 <HAL_GetTick>
80025f6: 4602 mov r2, r0
80025f8: 68fb ldr r3, [r7, #12]
80025fa: 1ad3 subs r3, r2, r3
80025fc: 687a ldr r2, [r7, #4]
80025fe: 429a cmp r2, r3
8002600: d201 bcs.n 8002606 <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
8002602: 2303 movs r3, #3
8002604: e025 b.n 8002652 <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
8002606: 4b15 ldr r3, [pc, #84] @ (800265c <FLASH_WaitForLastOperation+0x88>)
8002608: 68db ldr r3, [r3, #12]
800260a: f003 0301 and.w r3, r3, #1
800260e: 2b00 cmp r3, #0
8002610: d1e8 bne.n 80025e4 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
8002612: 4b12 ldr r3, [pc, #72] @ (800265c <FLASH_WaitForLastOperation+0x88>)
8002614: 68db ldr r3, [r3, #12]
8002616: f003 0320 and.w r3, r3, #32
800261a: 2b00 cmp r3, #0
800261c: d002 beq.n 8002624 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
800261e: 4b0f ldr r3, [pc, #60] @ (800265c <FLASH_WaitForLastOperation+0x88>)
8002620: 2220 movs r2, #32
8002622: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8002624: 4b0d ldr r3, [pc, #52] @ (800265c <FLASH_WaitForLastOperation+0x88>)
8002626: 68db ldr r3, [r3, #12]
8002628: f003 0310 and.w r3, r3, #16
800262c: 2b00 cmp r3, #0
800262e: d10b bne.n 8002648 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8002630: 4b0a ldr r3, [pc, #40] @ (800265c <FLASH_WaitForLastOperation+0x88>)
8002632: 69db ldr r3, [r3, #28]
8002634: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8002638: 2b00 cmp r3, #0
800263a: d105 bne.n 8002648 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
800263c: 4b07 ldr r3, [pc, #28] @ (800265c <FLASH_WaitForLastOperation+0x88>)
800263e: 68db ldr r3, [r3, #12]
8002640: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8002644: 2b00 cmp r3, #0
8002646: d003 beq.n 8002650 <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
8002648: f000 f80a bl 8002660 <FLASH_SetErrorCode>
return HAL_ERROR;
800264c: 2301 movs r3, #1
800264e: e000 b.n 8002652 <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
8002650: 2300 movs r3, #0
}
8002652: 4618 mov r0, r3
8002654: 3710 adds r7, #16
8002656: 46bd mov sp, r7
8002658: bd80 pop {r7, pc}
800265a: bf00 nop
800265c: 40022000 .word 0x40022000
08002660 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
8002660: b480 push {r7}
8002662: b083 sub sp, #12
8002664: af00 add r7, sp, #0
uint32_t flags = 0U;
8002666: 2300 movs r3, #0
8002668: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
800266a: 4b23 ldr r3, [pc, #140] @ (80026f8 <FLASH_SetErrorCode+0x98>)
800266c: 68db ldr r3, [r3, #12]
800266e: f003 0310 and.w r3, r3, #16
8002672: 2b00 cmp r3, #0
8002674: d009 beq.n 800268a <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
8002676: 4b21 ldr r3, [pc, #132] @ (80026fc <FLASH_SetErrorCode+0x9c>)
8002678: 69db ldr r3, [r3, #28]
800267a: f043 0302 orr.w r3, r3, #2
800267e: 4a1f ldr r2, [pc, #124] @ (80026fc <FLASH_SetErrorCode+0x9c>)
8002680: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
8002682: 687b ldr r3, [r7, #4]
8002684: f043 0310 orr.w r3, r3, #16
8002688: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
800268a: 4b1b ldr r3, [pc, #108] @ (80026f8 <FLASH_SetErrorCode+0x98>)
800268c: 68db ldr r3, [r3, #12]
800268e: f003 0304 and.w r3, r3, #4
8002692: 2b00 cmp r3, #0
8002694: d009 beq.n 80026aa <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
8002696: 4b19 ldr r3, [pc, #100] @ (80026fc <FLASH_SetErrorCode+0x9c>)
8002698: 69db ldr r3, [r3, #28]
800269a: f043 0301 orr.w r3, r3, #1
800269e: 4a17 ldr r2, [pc, #92] @ (80026fc <FLASH_SetErrorCode+0x9c>)
80026a0: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
80026a2: 687b ldr r3, [r7, #4]
80026a4: f043 0304 orr.w r3, r3, #4
80026a8: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
80026aa: 4b13 ldr r3, [pc, #76] @ (80026f8 <FLASH_SetErrorCode+0x98>)
80026ac: 69db ldr r3, [r3, #28]
80026ae: f003 0301 and.w r3, r3, #1
80026b2: 2b00 cmp r3, #0
80026b4: d00b beq.n 80026ce <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
80026b6: 4b11 ldr r3, [pc, #68] @ (80026fc <FLASH_SetErrorCode+0x9c>)
80026b8: 69db ldr r3, [r3, #28]
80026ba: f043 0304 orr.w r3, r3, #4
80026be: 4a0f ldr r2, [pc, #60] @ (80026fc <FLASH_SetErrorCode+0x9c>)
80026c0: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
80026c2: 4b0d ldr r3, [pc, #52] @ (80026f8 <FLASH_SetErrorCode+0x98>)
80026c4: 69db ldr r3, [r3, #28]
80026c6: 4a0c ldr r2, [pc, #48] @ (80026f8 <FLASH_SetErrorCode+0x98>)
80026c8: f023 0301 bic.w r3, r3, #1
80026cc: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
80026ce: 687b ldr r3, [r7, #4]
80026d0: f240 1201 movw r2, #257 @ 0x101
80026d4: 4293 cmp r3, r2
80026d6: d106 bne.n 80026e6 <FLASH_SetErrorCode+0x86>
80026d8: 4b07 ldr r3, [pc, #28] @ (80026f8 <FLASH_SetErrorCode+0x98>)
80026da: 69db ldr r3, [r3, #28]
80026dc: 4a06 ldr r2, [pc, #24] @ (80026f8 <FLASH_SetErrorCode+0x98>)
80026de: f023 0301 bic.w r3, r3, #1
80026e2: 61d3 str r3, [r2, #28]
}
80026e4: e002 b.n 80026ec <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
80026e6: 4a04 ldr r2, [pc, #16] @ (80026f8 <FLASH_SetErrorCode+0x98>)
80026e8: 687b ldr r3, [r7, #4]
80026ea: 60d3 str r3, [r2, #12]
}
80026ec: bf00 nop
80026ee: 370c adds r7, #12
80026f0: 46bd mov sp, r7
80026f2: bc80 pop {r7}
80026f4: 4770 bx lr
80026f6: bf00 nop
80026f8: 40022000 .word 0x40022000
80026fc: 200003b0 .word 0x200003b0
08002700 <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
8002700: b580 push {r7, lr}
8002702: b084 sub sp, #16
8002704: af00 add r7, sp, #0
8002706: 6078 str r0, [r7, #4]
8002708: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
800270a: 2301 movs r3, #1
800270c: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
800270e: 2300 movs r3, #0
8002710: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
8002712: 4b2f ldr r3, [pc, #188] @ (80027d0 <HAL_FLASHEx_Erase+0xd0>)
8002714: 7e1b ldrb r3, [r3, #24]
8002716: 2b01 cmp r3, #1
8002718: d101 bne.n 800271e <HAL_FLASHEx_Erase+0x1e>
800271a: 2302 movs r3, #2
800271c: e053 b.n 80027c6 <HAL_FLASHEx_Erase+0xc6>
800271e: 4b2c ldr r3, [pc, #176] @ (80027d0 <HAL_FLASHEx_Erase+0xd0>)
8002720: 2201 movs r2, #1
8002722: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
8002724: 687b ldr r3, [r7, #4]
8002726: 681b ldr r3, [r3, #0]
8002728: 2b02 cmp r3, #2
800272a: d116 bne.n 800275a <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
800272c: f24c 3050 movw r0, #50000 @ 0xc350
8002730: f7ff ff50 bl 80025d4 <FLASH_WaitForLastOperation>
8002734: 4603 mov r3, r0
8002736: 2b00 cmp r3, #0
8002738: d141 bne.n 80027be <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
800273a: 2001 movs r0, #1
800273c: f000 f84c bl 80027d8 <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8002740: f24c 3050 movw r0, #50000 @ 0xc350
8002744: f7ff ff46 bl 80025d4 <FLASH_WaitForLastOperation>
8002748: 4603 mov r3, r0
800274a: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
800274c: 4b21 ldr r3, [pc, #132] @ (80027d4 <HAL_FLASHEx_Erase+0xd4>)
800274e: 691b ldr r3, [r3, #16]
8002750: 4a20 ldr r2, [pc, #128] @ (80027d4 <HAL_FLASHEx_Erase+0xd4>)
8002752: f023 0304 bic.w r3, r3, #4
8002756: 6113 str r3, [r2, #16]
8002758: e031 b.n 80027be <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
800275a: f24c 3050 movw r0, #50000 @ 0xc350
800275e: f7ff ff39 bl 80025d4 <FLASH_WaitForLastOperation>
8002762: 4603 mov r3, r0
8002764: 2b00 cmp r3, #0
8002766: d12a bne.n 80027be <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
8002768: 683b ldr r3, [r7, #0]
800276a: f04f 32ff mov.w r2, #4294967295
800276e: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
8002770: 687b ldr r3, [r7, #4]
8002772: 689b ldr r3, [r3, #8]
8002774: 60bb str r3, [r7, #8]
8002776: e019 b.n 80027ac <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
8002778: 68b8 ldr r0, [r7, #8]
800277a: f000 f849 bl 8002810 <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
800277e: f24c 3050 movw r0, #50000 @ 0xc350
8002782: f7ff ff27 bl 80025d4 <FLASH_WaitForLastOperation>
8002786: 4603 mov r3, r0
8002788: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
800278a: 4b12 ldr r3, [pc, #72] @ (80027d4 <HAL_FLASHEx_Erase+0xd4>)
800278c: 691b ldr r3, [r3, #16]
800278e: 4a11 ldr r2, [pc, #68] @ (80027d4 <HAL_FLASHEx_Erase+0xd4>)
8002790: f023 0302 bic.w r3, r3, #2
8002794: 6113 str r3, [r2, #16]
if (status != HAL_OK)
8002796: 7bfb ldrb r3, [r7, #15]
8002798: 2b00 cmp r3, #0
800279a: d003 beq.n 80027a4 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
800279c: 683b ldr r3, [r7, #0]
800279e: 68ba ldr r2, [r7, #8]
80027a0: 601a str r2, [r3, #0]
break;
80027a2: e00c b.n 80027be <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
80027a4: 68bb ldr r3, [r7, #8]
80027a6: f503 6380 add.w r3, r3, #1024 @ 0x400
80027aa: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
80027ac: 687b ldr r3, [r7, #4]
80027ae: 68db ldr r3, [r3, #12]
80027b0: 029a lsls r2, r3, #10
80027b2: 687b ldr r3, [r7, #4]
80027b4: 689b ldr r3, [r3, #8]
80027b6: 4413 add r3, r2
80027b8: 68ba ldr r2, [r7, #8]
80027ba: 429a cmp r2, r3
80027bc: d3dc bcc.n 8002778 <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
80027be: 4b04 ldr r3, [pc, #16] @ (80027d0 <HAL_FLASHEx_Erase+0xd0>)
80027c0: 2200 movs r2, #0
80027c2: 761a strb r2, [r3, #24]
return status;
80027c4: 7bfb ldrb r3, [r7, #15]
}
80027c6: 4618 mov r0, r3
80027c8: 3710 adds r7, #16
80027ca: 46bd mov sp, r7
80027cc: bd80 pop {r7, pc}
80027ce: bf00 nop
80027d0: 200003b0 .word 0x200003b0
80027d4: 40022000 .word 0x40022000
080027d8 <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
80027d8: b480 push {r7}
80027da: b083 sub sp, #12
80027dc: af00 add r7, sp, #0
80027de: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80027e0: 4b09 ldr r3, [pc, #36] @ (8002808 <FLASH_MassErase+0x30>)
80027e2: 2200 movs r2, #0
80027e4: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
80027e6: 4b09 ldr r3, [pc, #36] @ (800280c <FLASH_MassErase+0x34>)
80027e8: 691b ldr r3, [r3, #16]
80027ea: 4a08 ldr r2, [pc, #32] @ (800280c <FLASH_MassErase+0x34>)
80027ec: f043 0304 orr.w r3, r3, #4
80027f0: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
80027f2: 4b06 ldr r3, [pc, #24] @ (800280c <FLASH_MassErase+0x34>)
80027f4: 691b ldr r3, [r3, #16]
80027f6: 4a05 ldr r2, [pc, #20] @ (800280c <FLASH_MassErase+0x34>)
80027f8: f043 0340 orr.w r3, r3, #64 @ 0x40
80027fc: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
80027fe: bf00 nop
8002800: 370c adds r7, #12
8002802: 46bd mov sp, r7
8002804: bc80 pop {r7}
8002806: 4770 bx lr
8002808: 200003b0 .word 0x200003b0
800280c: 40022000 .word 0x40022000
08002810 <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
8002810: b480 push {r7}
8002812: b083 sub sp, #12
8002814: af00 add r7, sp, #0
8002816: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8002818: 4b0b ldr r3, [pc, #44] @ (8002848 <FLASH_PageErase+0x38>)
800281a: 2200 movs r2, #0
800281c: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
800281e: 4b0b ldr r3, [pc, #44] @ (800284c <FLASH_PageErase+0x3c>)
8002820: 691b ldr r3, [r3, #16]
8002822: 4a0a ldr r2, [pc, #40] @ (800284c <FLASH_PageErase+0x3c>)
8002824: f043 0302 orr.w r3, r3, #2
8002828: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
800282a: 4a08 ldr r2, [pc, #32] @ (800284c <FLASH_PageErase+0x3c>)
800282c: 687b ldr r3, [r7, #4]
800282e: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8002830: 4b06 ldr r3, [pc, #24] @ (800284c <FLASH_PageErase+0x3c>)
8002832: 691b ldr r3, [r3, #16]
8002834: 4a05 ldr r2, [pc, #20] @ (800284c <FLASH_PageErase+0x3c>)
8002836: f043 0340 orr.w r3, r3, #64 @ 0x40
800283a: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
800283c: bf00 nop
800283e: 370c adds r7, #12
8002840: 46bd mov sp, r7
8002842: bc80 pop {r7}
8002844: 4770 bx lr
8002846: bf00 nop
8002848: 200003b0 .word 0x200003b0
800284c: 40022000 .word 0x40022000
08002850 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8002850: b480 push {r7}
8002852: b08b sub sp, #44 @ 0x2c
8002854: af00 add r7, sp, #0
8002856: 6078 str r0, [r7, #4]
8002858: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
800285a: 2300 movs r3, #0
800285c: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
800285e: 2300 movs r3, #0
8002860: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8002862: e169 b.n 8002b38 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8002864: 2201 movs r2, #1
8002866: 6a7b ldr r3, [r7, #36] @ 0x24
8002868: fa02 f303 lsl.w r3, r2, r3
800286c: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
800286e: 683b ldr r3, [r7, #0]
8002870: 681b ldr r3, [r3, #0]
8002872: 69fa ldr r2, [r7, #28]
8002874: 4013 ands r3, r2
8002876: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8002878: 69ba ldr r2, [r7, #24]
800287a: 69fb ldr r3, [r7, #28]
800287c: 429a cmp r2, r3
800287e: f040 8158 bne.w 8002b32 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
8002882: 683b ldr r3, [r7, #0]
8002884: 685b ldr r3, [r3, #4]
8002886: 4a9a ldr r2, [pc, #616] @ (8002af0 <HAL_GPIO_Init+0x2a0>)
8002888: 4293 cmp r3, r2
800288a: d05e beq.n 800294a <HAL_GPIO_Init+0xfa>
800288c: 4a98 ldr r2, [pc, #608] @ (8002af0 <HAL_GPIO_Init+0x2a0>)
800288e: 4293 cmp r3, r2
8002890: d875 bhi.n 800297e <HAL_GPIO_Init+0x12e>
8002892: 4a98 ldr r2, [pc, #608] @ (8002af4 <HAL_GPIO_Init+0x2a4>)
8002894: 4293 cmp r3, r2
8002896: d058 beq.n 800294a <HAL_GPIO_Init+0xfa>
8002898: 4a96 ldr r2, [pc, #600] @ (8002af4 <HAL_GPIO_Init+0x2a4>)
800289a: 4293 cmp r3, r2
800289c: d86f bhi.n 800297e <HAL_GPIO_Init+0x12e>
800289e: 4a96 ldr r2, [pc, #600] @ (8002af8 <HAL_GPIO_Init+0x2a8>)
80028a0: 4293 cmp r3, r2
80028a2: d052 beq.n 800294a <HAL_GPIO_Init+0xfa>
80028a4: 4a94 ldr r2, [pc, #592] @ (8002af8 <HAL_GPIO_Init+0x2a8>)
80028a6: 4293 cmp r3, r2
80028a8: d869 bhi.n 800297e <HAL_GPIO_Init+0x12e>
80028aa: 4a94 ldr r2, [pc, #592] @ (8002afc <HAL_GPIO_Init+0x2ac>)
80028ac: 4293 cmp r3, r2
80028ae: d04c beq.n 800294a <HAL_GPIO_Init+0xfa>
80028b0: 4a92 ldr r2, [pc, #584] @ (8002afc <HAL_GPIO_Init+0x2ac>)
80028b2: 4293 cmp r3, r2
80028b4: d863 bhi.n 800297e <HAL_GPIO_Init+0x12e>
80028b6: 4a92 ldr r2, [pc, #584] @ (8002b00 <HAL_GPIO_Init+0x2b0>)
80028b8: 4293 cmp r3, r2
80028ba: d046 beq.n 800294a <HAL_GPIO_Init+0xfa>
80028bc: 4a90 ldr r2, [pc, #576] @ (8002b00 <HAL_GPIO_Init+0x2b0>)
80028be: 4293 cmp r3, r2
80028c0: d85d bhi.n 800297e <HAL_GPIO_Init+0x12e>
80028c2: 2b12 cmp r3, #18
80028c4: d82a bhi.n 800291c <HAL_GPIO_Init+0xcc>
80028c6: 2b12 cmp r3, #18
80028c8: d859 bhi.n 800297e <HAL_GPIO_Init+0x12e>
80028ca: a201 add r2, pc, #4 @ (adr r2, 80028d0 <HAL_GPIO_Init+0x80>)
80028cc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80028d0: 0800294b .word 0x0800294b
80028d4: 08002925 .word 0x08002925
80028d8: 08002937 .word 0x08002937
80028dc: 08002979 .word 0x08002979
80028e0: 0800297f .word 0x0800297f
80028e4: 0800297f .word 0x0800297f
80028e8: 0800297f .word 0x0800297f
80028ec: 0800297f .word 0x0800297f
80028f0: 0800297f .word 0x0800297f
80028f4: 0800297f .word 0x0800297f
80028f8: 0800297f .word 0x0800297f
80028fc: 0800297f .word 0x0800297f
8002900: 0800297f .word 0x0800297f
8002904: 0800297f .word 0x0800297f
8002908: 0800297f .word 0x0800297f
800290c: 0800297f .word 0x0800297f
8002910: 0800297f .word 0x0800297f
8002914: 0800292d .word 0x0800292d
8002918: 08002941 .word 0x08002941
800291c: 4a79 ldr r2, [pc, #484] @ (8002b04 <HAL_GPIO_Init+0x2b4>)
800291e: 4293 cmp r3, r2
8002920: d013 beq.n 800294a <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8002922: e02c b.n 800297e <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8002924: 683b ldr r3, [r7, #0]
8002926: 68db ldr r3, [r3, #12]
8002928: 623b str r3, [r7, #32]
break;
800292a: e029 b.n 8002980 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
800292c: 683b ldr r3, [r7, #0]
800292e: 68db ldr r3, [r3, #12]
8002930: 3304 adds r3, #4
8002932: 623b str r3, [r7, #32]
break;
8002934: e024 b.n 8002980 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8002936: 683b ldr r3, [r7, #0]
8002938: 68db ldr r3, [r3, #12]
800293a: 3308 adds r3, #8
800293c: 623b str r3, [r7, #32]
break;
800293e: e01f b.n 8002980 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8002940: 683b ldr r3, [r7, #0]
8002942: 68db ldr r3, [r3, #12]
8002944: 330c adds r3, #12
8002946: 623b str r3, [r7, #32]
break;
8002948: e01a b.n 8002980 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
800294a: 683b ldr r3, [r7, #0]
800294c: 689b ldr r3, [r3, #8]
800294e: 2b00 cmp r3, #0
8002950: d102 bne.n 8002958 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8002952: 2304 movs r3, #4
8002954: 623b str r3, [r7, #32]
break;
8002956: e013 b.n 8002980 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8002958: 683b ldr r3, [r7, #0]
800295a: 689b ldr r3, [r3, #8]
800295c: 2b01 cmp r3, #1
800295e: d105 bne.n 800296c <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8002960: 2308 movs r3, #8
8002962: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8002964: 687b ldr r3, [r7, #4]
8002966: 69fa ldr r2, [r7, #28]
8002968: 611a str r2, [r3, #16]
break;
800296a: e009 b.n 8002980 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
800296c: 2308 movs r3, #8
800296e: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8002970: 687b ldr r3, [r7, #4]
8002972: 69fa ldr r2, [r7, #28]
8002974: 615a str r2, [r3, #20]
break;
8002976: e003 b.n 8002980 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8002978: 2300 movs r3, #0
800297a: 623b str r3, [r7, #32]
break;
800297c: e000 b.n 8002980 <HAL_GPIO_Init+0x130>
break;
800297e: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8002980: 69bb ldr r3, [r7, #24]
8002982: 2bff cmp r3, #255 @ 0xff
8002984: d801 bhi.n 800298a <HAL_GPIO_Init+0x13a>
8002986: 687b ldr r3, [r7, #4]
8002988: e001 b.n 800298e <HAL_GPIO_Init+0x13e>
800298a: 687b ldr r3, [r7, #4]
800298c: 3304 adds r3, #4
800298e: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8002990: 69bb ldr r3, [r7, #24]
8002992: 2bff cmp r3, #255 @ 0xff
8002994: d802 bhi.n 800299c <HAL_GPIO_Init+0x14c>
8002996: 6a7b ldr r3, [r7, #36] @ 0x24
8002998: 009b lsls r3, r3, #2
800299a: e002 b.n 80029a2 <HAL_GPIO_Init+0x152>
800299c: 6a7b ldr r3, [r7, #36] @ 0x24
800299e: 3b08 subs r3, #8
80029a0: 009b lsls r3, r3, #2
80029a2: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
80029a4: 697b ldr r3, [r7, #20]
80029a6: 681a ldr r2, [r3, #0]
80029a8: 210f movs r1, #15
80029aa: 693b ldr r3, [r7, #16]
80029ac: fa01 f303 lsl.w r3, r1, r3
80029b0: 43db mvns r3, r3
80029b2: 401a ands r2, r3
80029b4: 6a39 ldr r1, [r7, #32]
80029b6: 693b ldr r3, [r7, #16]
80029b8: fa01 f303 lsl.w r3, r1, r3
80029bc: 431a orrs r2, r3
80029be: 697b ldr r3, [r7, #20]
80029c0: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
80029c2: 683b ldr r3, [r7, #0]
80029c4: 685b ldr r3, [r3, #4]
80029c6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80029ca: 2b00 cmp r3, #0
80029cc: f000 80b1 beq.w 8002b32 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
80029d0: 4b4d ldr r3, [pc, #308] @ (8002b08 <HAL_GPIO_Init+0x2b8>)
80029d2: 699b ldr r3, [r3, #24]
80029d4: 4a4c ldr r2, [pc, #304] @ (8002b08 <HAL_GPIO_Init+0x2b8>)
80029d6: f043 0301 orr.w r3, r3, #1
80029da: 6193 str r3, [r2, #24]
80029dc: 4b4a ldr r3, [pc, #296] @ (8002b08 <HAL_GPIO_Init+0x2b8>)
80029de: 699b ldr r3, [r3, #24]
80029e0: f003 0301 and.w r3, r3, #1
80029e4: 60bb str r3, [r7, #8]
80029e6: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
80029e8: 4a48 ldr r2, [pc, #288] @ (8002b0c <HAL_GPIO_Init+0x2bc>)
80029ea: 6a7b ldr r3, [r7, #36] @ 0x24
80029ec: 089b lsrs r3, r3, #2
80029ee: 3302 adds r3, #2
80029f0: f852 3023 ldr.w r3, [r2, r3, lsl #2]
80029f4: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
80029f6: 6a7b ldr r3, [r7, #36] @ 0x24
80029f8: f003 0303 and.w r3, r3, #3
80029fc: 009b lsls r3, r3, #2
80029fe: 220f movs r2, #15
8002a00: fa02 f303 lsl.w r3, r2, r3
8002a04: 43db mvns r3, r3
8002a06: 68fa ldr r2, [r7, #12]
8002a08: 4013 ands r3, r2
8002a0a: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8002a0c: 687b ldr r3, [r7, #4]
8002a0e: 4a40 ldr r2, [pc, #256] @ (8002b10 <HAL_GPIO_Init+0x2c0>)
8002a10: 4293 cmp r3, r2
8002a12: d013 beq.n 8002a3c <HAL_GPIO_Init+0x1ec>
8002a14: 687b ldr r3, [r7, #4]
8002a16: 4a3f ldr r2, [pc, #252] @ (8002b14 <HAL_GPIO_Init+0x2c4>)
8002a18: 4293 cmp r3, r2
8002a1a: d00d beq.n 8002a38 <HAL_GPIO_Init+0x1e8>
8002a1c: 687b ldr r3, [r7, #4]
8002a1e: 4a3e ldr r2, [pc, #248] @ (8002b18 <HAL_GPIO_Init+0x2c8>)
8002a20: 4293 cmp r3, r2
8002a22: d007 beq.n 8002a34 <HAL_GPIO_Init+0x1e4>
8002a24: 687b ldr r3, [r7, #4]
8002a26: 4a3d ldr r2, [pc, #244] @ (8002b1c <HAL_GPIO_Init+0x2cc>)
8002a28: 4293 cmp r3, r2
8002a2a: d101 bne.n 8002a30 <HAL_GPIO_Init+0x1e0>
8002a2c: 2303 movs r3, #3
8002a2e: e006 b.n 8002a3e <HAL_GPIO_Init+0x1ee>
8002a30: 2304 movs r3, #4
8002a32: e004 b.n 8002a3e <HAL_GPIO_Init+0x1ee>
8002a34: 2302 movs r3, #2
8002a36: e002 b.n 8002a3e <HAL_GPIO_Init+0x1ee>
8002a38: 2301 movs r3, #1
8002a3a: e000 b.n 8002a3e <HAL_GPIO_Init+0x1ee>
8002a3c: 2300 movs r3, #0
8002a3e: 6a7a ldr r2, [r7, #36] @ 0x24
8002a40: f002 0203 and.w r2, r2, #3
8002a44: 0092 lsls r2, r2, #2
8002a46: 4093 lsls r3, r2
8002a48: 68fa ldr r2, [r7, #12]
8002a4a: 4313 orrs r3, r2
8002a4c: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8002a4e: 492f ldr r1, [pc, #188] @ (8002b0c <HAL_GPIO_Init+0x2bc>)
8002a50: 6a7b ldr r3, [r7, #36] @ 0x24
8002a52: 089b lsrs r3, r3, #2
8002a54: 3302 adds r3, #2
8002a56: 68fa ldr r2, [r7, #12]
8002a58: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8002a5c: 683b ldr r3, [r7, #0]
8002a5e: 685b ldr r3, [r3, #4]
8002a60: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8002a64: 2b00 cmp r3, #0
8002a66: d006 beq.n 8002a76 <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
8002a68: 4b2d ldr r3, [pc, #180] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002a6a: 689a ldr r2, [r3, #8]
8002a6c: 492c ldr r1, [pc, #176] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002a6e: 69bb ldr r3, [r7, #24]
8002a70: 4313 orrs r3, r2
8002a72: 608b str r3, [r1, #8]
8002a74: e006 b.n 8002a84 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
8002a76: 4b2a ldr r3, [pc, #168] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002a78: 689a ldr r2, [r3, #8]
8002a7a: 69bb ldr r3, [r7, #24]
8002a7c: 43db mvns r3, r3
8002a7e: 4928 ldr r1, [pc, #160] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002a80: 4013 ands r3, r2
8002a82: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8002a84: 683b ldr r3, [r7, #0]
8002a86: 685b ldr r3, [r3, #4]
8002a88: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8002a8c: 2b00 cmp r3, #0
8002a8e: d006 beq.n 8002a9e <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
8002a90: 4b23 ldr r3, [pc, #140] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002a92: 68da ldr r2, [r3, #12]
8002a94: 4922 ldr r1, [pc, #136] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002a96: 69bb ldr r3, [r7, #24]
8002a98: 4313 orrs r3, r2
8002a9a: 60cb str r3, [r1, #12]
8002a9c: e006 b.n 8002aac <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
8002a9e: 4b20 ldr r3, [pc, #128] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002aa0: 68da ldr r2, [r3, #12]
8002aa2: 69bb ldr r3, [r7, #24]
8002aa4: 43db mvns r3, r3
8002aa6: 491e ldr r1, [pc, #120] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002aa8: 4013 ands r3, r2
8002aaa: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8002aac: 683b ldr r3, [r7, #0]
8002aae: 685b ldr r3, [r3, #4]
8002ab0: f403 3300 and.w r3, r3, #131072 @ 0x20000
8002ab4: 2b00 cmp r3, #0
8002ab6: d006 beq.n 8002ac6 <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
8002ab8: 4b19 ldr r3, [pc, #100] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002aba: 685a ldr r2, [r3, #4]
8002abc: 4918 ldr r1, [pc, #96] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002abe: 69bb ldr r3, [r7, #24]
8002ac0: 4313 orrs r3, r2
8002ac2: 604b str r3, [r1, #4]
8002ac4: e006 b.n 8002ad4 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8002ac6: 4b16 ldr r3, [pc, #88] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002ac8: 685a ldr r2, [r3, #4]
8002aca: 69bb ldr r3, [r7, #24]
8002acc: 43db mvns r3, r3
8002ace: 4914 ldr r1, [pc, #80] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002ad0: 4013 ands r3, r2
8002ad2: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8002ad4: 683b ldr r3, [r7, #0]
8002ad6: 685b ldr r3, [r3, #4]
8002ad8: f403 3380 and.w r3, r3, #65536 @ 0x10000
8002adc: 2b00 cmp r3, #0
8002ade: d021 beq.n 8002b24 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
8002ae0: 4b0f ldr r3, [pc, #60] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002ae2: 681a ldr r2, [r3, #0]
8002ae4: 490e ldr r1, [pc, #56] @ (8002b20 <HAL_GPIO_Init+0x2d0>)
8002ae6: 69bb ldr r3, [r7, #24]
8002ae8: 4313 orrs r3, r2
8002aea: 600b str r3, [r1, #0]
8002aec: e021 b.n 8002b32 <HAL_GPIO_Init+0x2e2>
8002aee: bf00 nop
8002af0: 10320000 .word 0x10320000
8002af4: 10310000 .word 0x10310000
8002af8: 10220000 .word 0x10220000
8002afc: 10210000 .word 0x10210000
8002b00: 10120000 .word 0x10120000
8002b04: 10110000 .word 0x10110000
8002b08: 40021000 .word 0x40021000
8002b0c: 40010000 .word 0x40010000
8002b10: 40010800 .word 0x40010800
8002b14: 40010c00 .word 0x40010c00
8002b18: 40011000 .word 0x40011000
8002b1c: 40011400 .word 0x40011400
8002b20: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8002b24: 4b0b ldr r3, [pc, #44] @ (8002b54 <HAL_GPIO_Init+0x304>)
8002b26: 681a ldr r2, [r3, #0]
8002b28: 69bb ldr r3, [r7, #24]
8002b2a: 43db mvns r3, r3
8002b2c: 4909 ldr r1, [pc, #36] @ (8002b54 <HAL_GPIO_Init+0x304>)
8002b2e: 4013 ands r3, r2
8002b30: 600b str r3, [r1, #0]
}
}
}
position++;
8002b32: 6a7b ldr r3, [r7, #36] @ 0x24
8002b34: 3301 adds r3, #1
8002b36: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8002b38: 683b ldr r3, [r7, #0]
8002b3a: 681a ldr r2, [r3, #0]
8002b3c: 6a7b ldr r3, [r7, #36] @ 0x24
8002b3e: fa22 f303 lsr.w r3, r2, r3
8002b42: 2b00 cmp r3, #0
8002b44: f47f ae8e bne.w 8002864 <HAL_GPIO_Init+0x14>
}
}
8002b48: bf00 nop
8002b4a: bf00 nop
8002b4c: 372c adds r7, #44 @ 0x2c
8002b4e: 46bd mov sp, r7
8002b50: bc80 pop {r7}
8002b52: 4770 bx lr
8002b54: 40010400 .word 0x40010400
08002b58 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8002b58: b480 push {r7}
8002b5a: b083 sub sp, #12
8002b5c: af00 add r7, sp, #0
8002b5e: 6078 str r0, [r7, #4]
8002b60: 460b mov r3, r1
8002b62: 807b strh r3, [r7, #2]
8002b64: 4613 mov r3, r2
8002b66: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8002b68: 787b ldrb r3, [r7, #1]
8002b6a: 2b00 cmp r3, #0
8002b6c: d003 beq.n 8002b76 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8002b6e: 887a ldrh r2, [r7, #2]
8002b70: 687b ldr r3, [r7, #4]
8002b72: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
8002b74: e003 b.n 8002b7e <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8002b76: 887b ldrh r3, [r7, #2]
8002b78: 041a lsls r2, r3, #16
8002b7a: 687b ldr r3, [r7, #4]
8002b7c: 611a str r2, [r3, #16]
}
8002b7e: bf00 nop
8002b80: 370c adds r7, #12
8002b82: 46bd mov sp, r7
8002b84: bc80 pop {r7}
8002b86: 4770 bx lr
08002b88 <HAL_GPIO_TogglePin>:
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
* @param GPIO_Pin: Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8002b88: b480 push {r7}
8002b8a: b085 sub sp, #20
8002b8c: af00 add r7, sp, #0
8002b8e: 6078 str r0, [r7, #4]
8002b90: 460b mov r3, r1
8002b92: 807b strh r3, [r7, #2]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* get current Output Data Register value */
odr = GPIOx->ODR;
8002b94: 687b ldr r3, [r7, #4]
8002b96: 68db ldr r3, [r3, #12]
8002b98: 60fb str r3, [r7, #12]
/* Set selected pins that were at low level, and reset ones that were high */
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
8002b9a: 887a ldrh r2, [r7, #2]
8002b9c: 68fb ldr r3, [r7, #12]
8002b9e: 4013 ands r3, r2
8002ba0: 041a lsls r2, r3, #16
8002ba2: 68fb ldr r3, [r7, #12]
8002ba4: 43d9 mvns r1, r3
8002ba6: 887b ldrh r3, [r7, #2]
8002ba8: 400b ands r3, r1
8002baa: 431a orrs r2, r3
8002bac: 687b ldr r3, [r7, #4]
8002bae: 611a str r2, [r3, #16]
}
8002bb0: bf00 nop
8002bb2: 3714 adds r7, #20
8002bb4: 46bd mov sp, r7
8002bb6: bc80 pop {r7}
8002bb8: 4770 bx lr
08002bba <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8002bba: b580 push {r7, lr}
8002bbc: b084 sub sp, #16
8002bbe: af00 add r7, sp, #0
8002bc0: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8002bc2: 687b ldr r3, [r7, #4]
8002bc4: 2b00 cmp r3, #0
8002bc6: d101 bne.n 8002bcc <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8002bc8: 2301 movs r3, #1
8002bca: e0e8 b.n 8002d9e <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8002bcc: 687b ldr r3, [r7, #4]
8002bce: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8002bd2: b2db uxtb r3, r3
8002bd4: 2b00 cmp r3, #0
8002bd6: d106 bne.n 8002be6 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8002bd8: 687b ldr r3, [r7, #4]
8002bda: 2200 movs r2, #0
8002bdc: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8002be0: 6878 ldr r0, [r7, #4]
8002be2: f007 facf bl 800a184 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8002be6: 687b ldr r3, [r7, #4]
8002be8: 2203 movs r2, #3
8002bea: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8002bee: 687b ldr r3, [r7, #4]
8002bf0: 2200 movs r2, #0
8002bf2: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8002bf4: 687b ldr r3, [r7, #4]
8002bf6: 681b ldr r3, [r3, #0]
8002bf8: 4618 mov r0, r3
8002bfa: f003 f974 bl 8005ee6 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8002bfe: 687b ldr r3, [r7, #4]
8002c00: 6818 ldr r0, [r3, #0]
8002c02: 687b ldr r3, [r7, #4]
8002c04: 3304 adds r3, #4
8002c06: cb0e ldmia r3, {r1, r2, r3}
8002c08: f003 f94a bl 8005ea0 <USB_CoreInit>
8002c0c: 4603 mov r3, r0
8002c0e: 2b00 cmp r3, #0
8002c10: d005 beq.n 8002c1e <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8002c12: 687b ldr r3, [r7, #4]
8002c14: 2202 movs r2, #2
8002c16: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8002c1a: 2301 movs r3, #1
8002c1c: e0bf b.n 8002d9e <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
8002c1e: 687b ldr r3, [r7, #4]
8002c20: 681b ldr r3, [r3, #0]
8002c22: 2100 movs r1, #0
8002c24: 4618 mov r0, r3
8002c26: f003 f978 bl 8005f1a <USB_SetCurrentMode>
8002c2a: 4603 mov r3, r0
8002c2c: 2b00 cmp r3, #0
8002c2e: d005 beq.n 8002c3c <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8002c30: 687b ldr r3, [r7, #4]
8002c32: 2202 movs r2, #2
8002c34: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8002c38: 2301 movs r3, #1
8002c3a: e0b0 b.n 8002d9e <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002c3c: 2300 movs r3, #0
8002c3e: 73fb strb r3, [r7, #15]
8002c40: e03e b.n 8002cc0 <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8002c42: 7bfa ldrb r2, [r7, #15]
8002c44: 6879 ldr r1, [r7, #4]
8002c46: 4613 mov r3, r2
8002c48: 009b lsls r3, r3, #2
8002c4a: 4413 add r3, r2
8002c4c: 00db lsls r3, r3, #3
8002c4e: 440b add r3, r1
8002c50: 3311 adds r3, #17
8002c52: 2201 movs r2, #1
8002c54: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8002c56: 7bfa ldrb r2, [r7, #15]
8002c58: 6879 ldr r1, [r7, #4]
8002c5a: 4613 mov r3, r2
8002c5c: 009b lsls r3, r3, #2
8002c5e: 4413 add r3, r2
8002c60: 00db lsls r3, r3, #3
8002c62: 440b add r3, r1
8002c64: 3310 adds r3, #16
8002c66: 7bfa ldrb r2, [r7, #15]
8002c68: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8002c6a: 7bfa ldrb r2, [r7, #15]
8002c6c: 6879 ldr r1, [r7, #4]
8002c6e: 4613 mov r3, r2
8002c70: 009b lsls r3, r3, #2
8002c72: 4413 add r3, r2
8002c74: 00db lsls r3, r3, #3
8002c76: 440b add r3, r1
8002c78: 3313 adds r3, #19
8002c7a: 2200 movs r2, #0
8002c7c: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8002c7e: 7bfa ldrb r2, [r7, #15]
8002c80: 6879 ldr r1, [r7, #4]
8002c82: 4613 mov r3, r2
8002c84: 009b lsls r3, r3, #2
8002c86: 4413 add r3, r2
8002c88: 00db lsls r3, r3, #3
8002c8a: 440b add r3, r1
8002c8c: 3320 adds r3, #32
8002c8e: 2200 movs r2, #0
8002c90: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8002c92: 7bfa ldrb r2, [r7, #15]
8002c94: 6879 ldr r1, [r7, #4]
8002c96: 4613 mov r3, r2
8002c98: 009b lsls r3, r3, #2
8002c9a: 4413 add r3, r2
8002c9c: 00db lsls r3, r3, #3
8002c9e: 440b add r3, r1
8002ca0: 3324 adds r3, #36 @ 0x24
8002ca2: 2200 movs r2, #0
8002ca4: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8002ca6: 7bfb ldrb r3, [r7, #15]
8002ca8: 6879 ldr r1, [r7, #4]
8002caa: 1c5a adds r2, r3, #1
8002cac: 4613 mov r3, r2
8002cae: 009b lsls r3, r3, #2
8002cb0: 4413 add r3, r2
8002cb2: 00db lsls r3, r3, #3
8002cb4: 440b add r3, r1
8002cb6: 2200 movs r2, #0
8002cb8: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002cba: 7bfb ldrb r3, [r7, #15]
8002cbc: 3301 adds r3, #1
8002cbe: 73fb strb r3, [r7, #15]
8002cc0: 687b ldr r3, [r7, #4]
8002cc2: 791b ldrb r3, [r3, #4]
8002cc4: 7bfa ldrb r2, [r7, #15]
8002cc6: 429a cmp r2, r3
8002cc8: d3bb bcc.n 8002c42 <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002cca: 2300 movs r3, #0
8002ccc: 73fb strb r3, [r7, #15]
8002cce: e044 b.n 8002d5a <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
8002cd0: 7bfa ldrb r2, [r7, #15]
8002cd2: 6879 ldr r1, [r7, #4]
8002cd4: 4613 mov r3, r2
8002cd6: 009b lsls r3, r3, #2
8002cd8: 4413 add r3, r2
8002cda: 00db lsls r3, r3, #3
8002cdc: 440b add r3, r1
8002cde: f203 1351 addw r3, r3, #337 @ 0x151
8002ce2: 2200 movs r2, #0
8002ce4: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8002ce6: 7bfa ldrb r2, [r7, #15]
8002ce8: 6879 ldr r1, [r7, #4]
8002cea: 4613 mov r3, r2
8002cec: 009b lsls r3, r3, #2
8002cee: 4413 add r3, r2
8002cf0: 00db lsls r3, r3, #3
8002cf2: 440b add r3, r1
8002cf4: f503 73a8 add.w r3, r3, #336 @ 0x150
8002cf8: 7bfa ldrb r2, [r7, #15]
8002cfa: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8002cfc: 7bfa ldrb r2, [r7, #15]
8002cfe: 6879 ldr r1, [r7, #4]
8002d00: 4613 mov r3, r2
8002d02: 009b lsls r3, r3, #2
8002d04: 4413 add r3, r2
8002d06: 00db lsls r3, r3, #3
8002d08: 440b add r3, r1
8002d0a: f203 1353 addw r3, r3, #339 @ 0x153
8002d0e: 2200 movs r2, #0
8002d10: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8002d12: 7bfa ldrb r2, [r7, #15]
8002d14: 6879 ldr r1, [r7, #4]
8002d16: 4613 mov r3, r2
8002d18: 009b lsls r3, r3, #2
8002d1a: 4413 add r3, r2
8002d1c: 00db lsls r3, r3, #3
8002d1e: 440b add r3, r1
8002d20: f503 73b0 add.w r3, r3, #352 @ 0x160
8002d24: 2200 movs r2, #0
8002d26: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8002d28: 7bfa ldrb r2, [r7, #15]
8002d2a: 6879 ldr r1, [r7, #4]
8002d2c: 4613 mov r3, r2
8002d2e: 009b lsls r3, r3, #2
8002d30: 4413 add r3, r2
8002d32: 00db lsls r3, r3, #3
8002d34: 440b add r3, r1
8002d36: f503 73b2 add.w r3, r3, #356 @ 0x164
8002d3a: 2200 movs r2, #0
8002d3c: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
8002d3e: 7bfa ldrb r2, [r7, #15]
8002d40: 6879 ldr r1, [r7, #4]
8002d42: 4613 mov r3, r2
8002d44: 009b lsls r3, r3, #2
8002d46: 4413 add r3, r2
8002d48: 00db lsls r3, r3, #3
8002d4a: 440b add r3, r1
8002d4c: f503 73b4 add.w r3, r3, #360 @ 0x168
8002d50: 2200 movs r2, #0
8002d52: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002d54: 7bfb ldrb r3, [r7, #15]
8002d56: 3301 adds r3, #1
8002d58: 73fb strb r3, [r7, #15]
8002d5a: 687b ldr r3, [r7, #4]
8002d5c: 791b ldrb r3, [r3, #4]
8002d5e: 7bfa ldrb r2, [r7, #15]
8002d60: 429a cmp r2, r3
8002d62: d3b5 bcc.n 8002cd0 <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8002d64: 687b ldr r3, [r7, #4]
8002d66: 6818 ldr r0, [r3, #0]
8002d68: 687b ldr r3, [r7, #4]
8002d6a: 3304 adds r3, #4
8002d6c: cb0e ldmia r3, {r1, r2, r3}
8002d6e: f003 f8e0 bl 8005f32 <USB_DevInit>
8002d72: 4603 mov r3, r0
8002d74: 2b00 cmp r3, #0
8002d76: d005 beq.n 8002d84 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8002d78: 687b ldr r3, [r7, #4]
8002d7a: 2202 movs r2, #2
8002d7c: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8002d80: 2301 movs r3, #1
8002d82: e00c b.n 8002d9e <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
8002d84: 687b ldr r3, [r7, #4]
8002d86: 2200 movs r2, #0
8002d88: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
8002d8a: 687b ldr r3, [r7, #4]
8002d8c: 2201 movs r2, #1
8002d8e: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
8002d92: 687b ldr r3, [r7, #4]
8002d94: 681b ldr r3, [r3, #0]
8002d96: 4618 mov r0, r3
8002d98: f005 fb5f bl 800845a <USB_DevDisconnect>
return HAL_OK;
8002d9c: 2300 movs r3, #0
}
8002d9e: 4618 mov r0, r3
8002da0: 3710 adds r7, #16
8002da2: 46bd mov sp, r7
8002da4: bd80 pop {r7, pc}
08002da6 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8002da6: b580 push {r7, lr}
8002da8: b082 sub sp, #8
8002daa: af00 add r7, sp, #0
8002dac: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8002dae: 687b ldr r3, [r7, #4]
8002db0: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8002db4: 2b01 cmp r3, #1
8002db6: d101 bne.n 8002dbc <HAL_PCD_Start+0x16>
8002db8: 2302 movs r3, #2
8002dba: e016 b.n 8002dea <HAL_PCD_Start+0x44>
8002dbc: 687b ldr r3, [r7, #4]
8002dbe: 2201 movs r2, #1
8002dc0: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8002dc4: 687b ldr r3, [r7, #4]
8002dc6: 681b ldr r3, [r3, #0]
8002dc8: 4618 mov r0, r3
8002dca: f003 f876 bl 8005eba <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8002dce: 2101 movs r1, #1
8002dd0: 6878 ldr r0, [r7, #4]
8002dd2: f007 fc4a bl 800a66a <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
8002dd6: 687b ldr r3, [r7, #4]
8002dd8: 681b ldr r3, [r3, #0]
8002dda: 4618 mov r0, r3
8002ddc: f005 fb33 bl 8008446 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8002de0: 687b ldr r3, [r7, #4]
8002de2: 2200 movs r2, #0
8002de4: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8002de8: 2300 movs r3, #0
}
8002dea: 4618 mov r0, r3
8002dec: 3708 adds r7, #8
8002dee: 46bd mov sp, r7
8002df0: bd80 pop {r7, pc}
08002df2 <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8002df2: b580 push {r7, lr}
8002df4: b088 sub sp, #32
8002df6: af00 add r7, sp, #0
8002df8: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8002dfa: 687b ldr r3, [r7, #4]
8002dfc: 681b ldr r3, [r3, #0]
8002dfe: 4618 mov r0, r3
8002e00: f005 fb35 bl 800846e <USB_ReadInterrupts>
8002e04: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
8002e06: 69bb ldr r3, [r7, #24]
8002e08: f403 4300 and.w r3, r3, #32768 @ 0x8000
8002e0c: 2b00 cmp r3, #0
8002e0e: d003 beq.n 8002e18 <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8002e10: 6878 ldr r0, [r7, #4]
8002e12: f000 fb1a bl 800344a <PCD_EP_ISR_Handler>
return;
8002e16: e119 b.n 800304c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8002e18: 69bb ldr r3, [r7, #24]
8002e1a: f403 6380 and.w r3, r3, #1024 @ 0x400
8002e1e: 2b00 cmp r3, #0
8002e20: d013 beq.n 8002e4a <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8002e22: 687b ldr r3, [r7, #4]
8002e24: 681b ldr r3, [r3, #0]
8002e26: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002e2a: b29a uxth r2, r3
8002e2c: 687b ldr r3, [r7, #4]
8002e2e: 681b ldr r3, [r3, #0]
8002e30: f422 6280 bic.w r2, r2, #1024 @ 0x400
8002e34: b292 uxth r2, r2
8002e36: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8002e3a: 6878 ldr r0, [r7, #4]
8002e3c: f007 fa1d bl 800a27a <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
8002e40: 2100 movs r1, #0
8002e42: 6878 ldr r0, [r7, #4]
8002e44: f000 f905 bl 8003052 <HAL_PCD_SetAddress>
return;
8002e48: e100 b.n 800304c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8002e4a: 69bb ldr r3, [r7, #24]
8002e4c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002e50: 2b00 cmp r3, #0
8002e52: d00c beq.n 8002e6e <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8002e54: 687b ldr r3, [r7, #4]
8002e56: 681b ldr r3, [r3, #0]
8002e58: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002e5c: b29a uxth r2, r3
8002e5e: 687b ldr r3, [r7, #4]
8002e60: 681b ldr r3, [r3, #0]
8002e62: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8002e66: b292 uxth r2, r2
8002e68: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8002e6c: e0ee b.n 800304c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
8002e6e: 69bb ldr r3, [r7, #24]
8002e70: f403 5300 and.w r3, r3, #8192 @ 0x2000
8002e74: 2b00 cmp r3, #0
8002e76: d00c beq.n 8002e92 <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8002e78: 687b ldr r3, [r7, #4]
8002e7a: 681b ldr r3, [r3, #0]
8002e7c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002e80: b29a uxth r2, r3
8002e82: 687b ldr r3, [r7, #4]
8002e84: 681b ldr r3, [r3, #0]
8002e86: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8002e8a: b292 uxth r2, r2
8002e8c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8002e90: e0dc b.n 800304c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8002e92: 69bb ldr r3, [r7, #24]
8002e94: f403 5380 and.w r3, r3, #4096 @ 0x1000
8002e98: 2b00 cmp r3, #0
8002e9a: d027 beq.n 8002eec <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8002e9c: 687b ldr r3, [r7, #4]
8002e9e: 681b ldr r3, [r3, #0]
8002ea0: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002ea4: b29a uxth r2, r3
8002ea6: 687b ldr r3, [r7, #4]
8002ea8: 681b ldr r3, [r3, #0]
8002eaa: f022 0204 bic.w r2, r2, #4
8002eae: b292 uxth r2, r2
8002eb0: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8002eb4: 687b ldr r3, [r7, #4]
8002eb6: 681b ldr r3, [r3, #0]
8002eb8: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002ebc: b29a uxth r2, r3
8002ebe: 687b ldr r3, [r7, #4]
8002ec0: 681b ldr r3, [r3, #0]
8002ec2: f022 0208 bic.w r2, r2, #8
8002ec6: b292 uxth r2, r2
8002ec8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8002ecc: 6878 ldr r0, [r7, #4]
8002ece: f007 fa0d bl 800a2ec <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8002ed2: 687b ldr r3, [r7, #4]
8002ed4: 681b ldr r3, [r3, #0]
8002ed6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002eda: b29a uxth r2, r3
8002edc: 687b ldr r3, [r7, #4]
8002ede: 681b ldr r3, [r3, #0]
8002ee0: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8002ee4: b292 uxth r2, r2
8002ee6: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8002eea: e0af b.n 800304c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8002eec: 69bb ldr r3, [r7, #24]
8002eee: f403 6300 and.w r3, r3, #2048 @ 0x800
8002ef2: 2b00 cmp r3, #0
8002ef4: f000 8083 beq.w 8002ffe <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
8002ef8: 2300 movs r3, #0
8002efa: 77fb strb r3, [r7, #31]
8002efc: e010 b.n 8002f20 <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8002efe: 687b ldr r3, [r7, #4]
8002f00: 681b ldr r3, [r3, #0]
8002f02: 461a mov r2, r3
8002f04: 7ffb ldrb r3, [r7, #31]
8002f06: 009b lsls r3, r3, #2
8002f08: 441a add r2, r3
8002f0a: 7ffb ldrb r3, [r7, #31]
8002f0c: 8812 ldrh r2, [r2, #0]
8002f0e: b292 uxth r2, r2
8002f10: 005b lsls r3, r3, #1
8002f12: 3320 adds r3, #32
8002f14: 443b add r3, r7
8002f16: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8002f1a: 7ffb ldrb r3, [r7, #31]
8002f1c: 3301 adds r3, #1
8002f1e: 77fb strb r3, [r7, #31]
8002f20: 7ffb ldrb r3, [r7, #31]
8002f22: 2b07 cmp r3, #7
8002f24: d9eb bls.n 8002efe <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8002f26: 687b ldr r3, [r7, #4]
8002f28: 681b ldr r3, [r3, #0]
8002f2a: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002f2e: b29a uxth r2, r3
8002f30: 687b ldr r3, [r7, #4]
8002f32: 681b ldr r3, [r3, #0]
8002f34: f042 0201 orr.w r2, r2, #1
8002f38: b292 uxth r2, r2
8002f3a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
8002f3e: 687b ldr r3, [r7, #4]
8002f40: 681b ldr r3, [r3, #0]
8002f42: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002f46: b29a uxth r2, r3
8002f48: 687b ldr r3, [r7, #4]
8002f4a: 681b ldr r3, [r3, #0]
8002f4c: f022 0201 bic.w r2, r2, #1
8002f50: b292 uxth r2, r2
8002f52: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8002f56: bf00 nop
8002f58: 687b ldr r3, [r7, #4]
8002f5a: 681b ldr r3, [r3, #0]
8002f5c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002f60: b29b uxth r3, r3
8002f62: f403 6380 and.w r3, r3, #1024 @ 0x400
8002f66: 2b00 cmp r3, #0
8002f68: d0f6 beq.n 8002f58 <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8002f6a: 687b ldr r3, [r7, #4]
8002f6c: 681b ldr r3, [r3, #0]
8002f6e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002f72: b29a uxth r2, r3
8002f74: 687b ldr r3, [r7, #4]
8002f76: 681b ldr r3, [r3, #0]
8002f78: f422 6280 bic.w r2, r2, #1024 @ 0x400
8002f7c: b292 uxth r2, r2
8002f7e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8002f82: 2300 movs r3, #0
8002f84: 77fb strb r3, [r7, #31]
8002f86: e00f b.n 8002fa8 <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8002f88: 7ffb ldrb r3, [r7, #31]
8002f8a: 687a ldr r2, [r7, #4]
8002f8c: 6812 ldr r2, [r2, #0]
8002f8e: 4611 mov r1, r2
8002f90: 7ffa ldrb r2, [r7, #31]
8002f92: 0092 lsls r2, r2, #2
8002f94: 440a add r2, r1
8002f96: 005b lsls r3, r3, #1
8002f98: 3320 adds r3, #32
8002f9a: 443b add r3, r7
8002f9c: f833 3c18 ldrh.w r3, [r3, #-24]
8002fa0: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8002fa2: 7ffb ldrb r3, [r7, #31]
8002fa4: 3301 adds r3, #1
8002fa6: 77fb strb r3, [r7, #31]
8002fa8: 7ffb ldrb r3, [r7, #31]
8002faa: 2b07 cmp r3, #7
8002fac: d9ec bls.n 8002f88 <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8002fae: 687b ldr r3, [r7, #4]
8002fb0: 681b ldr r3, [r3, #0]
8002fb2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002fb6: b29a uxth r2, r3
8002fb8: 687b ldr r3, [r7, #4]
8002fba: 681b ldr r3, [r3, #0]
8002fbc: f042 0208 orr.w r2, r2, #8
8002fc0: b292 uxth r2, r2
8002fc2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8002fc6: 687b ldr r3, [r7, #4]
8002fc8: 681b ldr r3, [r3, #0]
8002fca: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002fce: b29a uxth r2, r3
8002fd0: 687b ldr r3, [r7, #4]
8002fd2: 681b ldr r3, [r3, #0]
8002fd4: f422 6200 bic.w r2, r2, #2048 @ 0x800
8002fd8: b292 uxth r2, r2
8002fda: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8002fde: 687b ldr r3, [r7, #4]
8002fe0: 681b ldr r3, [r3, #0]
8002fe2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002fe6: b29a uxth r2, r3
8002fe8: 687b ldr r3, [r7, #4]
8002fea: 681b ldr r3, [r3, #0]
8002fec: f042 0204 orr.w r2, r2, #4
8002ff0: b292 uxth r2, r2
8002ff2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8002ff6: 6878 ldr r0, [r7, #4]
8002ff8: f007 f95e bl 800a2b8 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8002ffc: e026 b.n 800304c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8002ffe: 69bb ldr r3, [r7, #24]
8003000: f403 7300 and.w r3, r3, #512 @ 0x200
8003004: 2b00 cmp r3, #0
8003006: d00f beq.n 8003028 <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8003008: 687b ldr r3, [r7, #4]
800300a: 681b ldr r3, [r3, #0]
800300c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8003010: b29a uxth r2, r3
8003012: 687b ldr r3, [r7, #4]
8003014: 681b ldr r3, [r3, #0]
8003016: f422 7200 bic.w r2, r2, #512 @ 0x200
800301a: b292 uxth r2, r2
800301c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8003020: 6878 ldr r0, [r7, #4]
8003022: f007 f91c bl 800a25e <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8003026: e011 b.n 800304c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8003028: 69bb ldr r3, [r7, #24]
800302a: f403 7380 and.w r3, r3, #256 @ 0x100
800302e: 2b00 cmp r3, #0
8003030: d00c beq.n 800304c <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8003032: 687b ldr r3, [r7, #4]
8003034: 681b ldr r3, [r3, #0]
8003036: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800303a: b29a uxth r2, r3
800303c: 687b ldr r3, [r7, #4]
800303e: 681b ldr r3, [r3, #0]
8003040: f422 7280 bic.w r2, r2, #256 @ 0x100
8003044: b292 uxth r2, r2
8003046: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
800304a: bf00 nop
}
}
800304c: 3720 adds r7, #32
800304e: 46bd mov sp, r7
8003050: bd80 pop {r7, pc}
08003052 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8003052: b580 push {r7, lr}
8003054: b082 sub sp, #8
8003056: af00 add r7, sp, #0
8003058: 6078 str r0, [r7, #4]
800305a: 460b mov r3, r1
800305c: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
800305e: 687b ldr r3, [r7, #4]
8003060: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8003064: 2b01 cmp r3, #1
8003066: d101 bne.n 800306c <HAL_PCD_SetAddress+0x1a>
8003068: 2302 movs r3, #2
800306a: e012 b.n 8003092 <HAL_PCD_SetAddress+0x40>
800306c: 687b ldr r3, [r7, #4]
800306e: 2201 movs r2, #1
8003070: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8003074: 687b ldr r3, [r7, #4]
8003076: 78fa ldrb r2, [r7, #3]
8003078: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
800307a: 687b ldr r3, [r7, #4]
800307c: 681b ldr r3, [r3, #0]
800307e: 78fa ldrb r2, [r7, #3]
8003080: 4611 mov r1, r2
8003082: 4618 mov r0, r3
8003084: f005 f9cc bl 8008420 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8003088: 687b ldr r3, [r7, #4]
800308a: 2200 movs r2, #0
800308c: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8003090: 2300 movs r3, #0
}
8003092: 4618 mov r0, r3
8003094: 3708 adds r7, #8
8003096: 46bd mov sp, r7
8003098: bd80 pop {r7, pc}
0800309a <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
800309a: b580 push {r7, lr}
800309c: b084 sub sp, #16
800309e: af00 add r7, sp, #0
80030a0: 6078 str r0, [r7, #4]
80030a2: 4608 mov r0, r1
80030a4: 4611 mov r1, r2
80030a6: 461a mov r2, r3
80030a8: 4603 mov r3, r0
80030aa: 70fb strb r3, [r7, #3]
80030ac: 460b mov r3, r1
80030ae: 803b strh r3, [r7, #0]
80030b0: 4613 mov r3, r2
80030b2: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
80030b4: 2300 movs r3, #0
80030b6: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
80030b8: f997 3003 ldrsb.w r3, [r7, #3]
80030bc: 2b00 cmp r3, #0
80030be: da0e bge.n 80030de <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80030c0: 78fb ldrb r3, [r7, #3]
80030c2: f003 0207 and.w r2, r3, #7
80030c6: 4613 mov r3, r2
80030c8: 009b lsls r3, r3, #2
80030ca: 4413 add r3, r2
80030cc: 00db lsls r3, r3, #3
80030ce: 3310 adds r3, #16
80030d0: 687a ldr r2, [r7, #4]
80030d2: 4413 add r3, r2
80030d4: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80030d6: 68fb ldr r3, [r7, #12]
80030d8: 2201 movs r2, #1
80030da: 705a strb r2, [r3, #1]
80030dc: e00e b.n 80030fc <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80030de: 78fb ldrb r3, [r7, #3]
80030e0: f003 0207 and.w r2, r3, #7
80030e4: 4613 mov r3, r2
80030e6: 009b lsls r3, r3, #2
80030e8: 4413 add r3, r2
80030ea: 00db lsls r3, r3, #3
80030ec: f503 73a8 add.w r3, r3, #336 @ 0x150
80030f0: 687a ldr r2, [r7, #4]
80030f2: 4413 add r3, r2
80030f4: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80030f6: 68fb ldr r3, [r7, #12]
80030f8: 2200 movs r2, #0
80030fa: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
80030fc: 78fb ldrb r3, [r7, #3]
80030fe: f003 0307 and.w r3, r3, #7
8003102: b2da uxtb r2, r3
8003104: 68fb ldr r3, [r7, #12]
8003106: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8003108: 883a ldrh r2, [r7, #0]
800310a: 68fb ldr r3, [r7, #12]
800310c: 611a str r2, [r3, #16]
ep->type = ep_type;
800310e: 68fb ldr r3, [r7, #12]
8003110: 78ba ldrb r2, [r7, #2]
8003112: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8003114: 78bb ldrb r3, [r7, #2]
8003116: 2b02 cmp r3, #2
8003118: d102 bne.n 8003120 <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
800311a: 68fb ldr r3, [r7, #12]
800311c: 2200 movs r2, #0
800311e: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8003120: 687b ldr r3, [r7, #4]
8003122: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8003126: 2b01 cmp r3, #1
8003128: d101 bne.n 800312e <HAL_PCD_EP_Open+0x94>
800312a: 2302 movs r3, #2
800312c: e00e b.n 800314c <HAL_PCD_EP_Open+0xb2>
800312e: 687b ldr r3, [r7, #4]
8003130: 2201 movs r2, #1
8003132: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8003136: 687b ldr r3, [r7, #4]
8003138: 681b ldr r3, [r3, #0]
800313a: 68f9 ldr r1, [r7, #12]
800313c: 4618 mov r0, r3
800313e: f002 ff15 bl 8005f6c <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8003142: 687b ldr r3, [r7, #4]
8003144: 2200 movs r2, #0
8003146: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
800314a: 7afb ldrb r3, [r7, #11]
}
800314c: 4618 mov r0, r3
800314e: 3710 adds r7, #16
8003150: 46bd mov sp, r7
8003152: bd80 pop {r7, pc}
08003154 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8003154: b580 push {r7, lr}
8003156: b084 sub sp, #16
8003158: af00 add r7, sp, #0
800315a: 6078 str r0, [r7, #4]
800315c: 460b mov r3, r1
800315e: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8003160: f997 3003 ldrsb.w r3, [r7, #3]
8003164: 2b00 cmp r3, #0
8003166: da0e bge.n 8003186 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8003168: 78fb ldrb r3, [r7, #3]
800316a: f003 0207 and.w r2, r3, #7
800316e: 4613 mov r3, r2
8003170: 009b lsls r3, r3, #2
8003172: 4413 add r3, r2
8003174: 00db lsls r3, r3, #3
8003176: 3310 adds r3, #16
8003178: 687a ldr r2, [r7, #4]
800317a: 4413 add r3, r2
800317c: 60fb str r3, [r7, #12]
ep->is_in = 1U;
800317e: 68fb ldr r3, [r7, #12]
8003180: 2201 movs r2, #1
8003182: 705a strb r2, [r3, #1]
8003184: e00e b.n 80031a4 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8003186: 78fb ldrb r3, [r7, #3]
8003188: f003 0207 and.w r2, r3, #7
800318c: 4613 mov r3, r2
800318e: 009b lsls r3, r3, #2
8003190: 4413 add r3, r2
8003192: 00db lsls r3, r3, #3
8003194: f503 73a8 add.w r3, r3, #336 @ 0x150
8003198: 687a ldr r2, [r7, #4]
800319a: 4413 add r3, r2
800319c: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800319e: 68fb ldr r3, [r7, #12]
80031a0: 2200 movs r2, #0
80031a2: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
80031a4: 78fb ldrb r3, [r7, #3]
80031a6: f003 0307 and.w r3, r3, #7
80031aa: b2da uxtb r2, r3
80031ac: 68fb ldr r3, [r7, #12]
80031ae: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80031b0: 687b ldr r3, [r7, #4]
80031b2: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80031b6: 2b01 cmp r3, #1
80031b8: d101 bne.n 80031be <HAL_PCD_EP_Close+0x6a>
80031ba: 2302 movs r3, #2
80031bc: e00e b.n 80031dc <HAL_PCD_EP_Close+0x88>
80031be: 687b ldr r3, [r7, #4]
80031c0: 2201 movs r2, #1
80031c2: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
80031c6: 687b ldr r3, [r7, #4]
80031c8: 681b ldr r3, [r3, #0]
80031ca: 68f9 ldr r1, [r7, #12]
80031cc: 4618 mov r0, r3
80031ce: f003 fa8d bl 80066ec <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
80031d2: 687b ldr r3, [r7, #4]
80031d4: 2200 movs r2, #0
80031d6: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80031da: 2300 movs r3, #0
}
80031dc: 4618 mov r0, r3
80031de: 3710 adds r7, #16
80031e0: 46bd mov sp, r7
80031e2: bd80 pop {r7, pc}
080031e4 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80031e4: b580 push {r7, lr}
80031e6: b086 sub sp, #24
80031e8: af00 add r7, sp, #0
80031ea: 60f8 str r0, [r7, #12]
80031ec: 607a str r2, [r7, #4]
80031ee: 603b str r3, [r7, #0]
80031f0: 460b mov r3, r1
80031f2: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80031f4: 7afb ldrb r3, [r7, #11]
80031f6: f003 0207 and.w r2, r3, #7
80031fa: 4613 mov r3, r2
80031fc: 009b lsls r3, r3, #2
80031fe: 4413 add r3, r2
8003200: 00db lsls r3, r3, #3
8003202: f503 73a8 add.w r3, r3, #336 @ 0x150
8003206: 68fa ldr r2, [r7, #12]
8003208: 4413 add r3, r2
800320a: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
800320c: 697b ldr r3, [r7, #20]
800320e: 687a ldr r2, [r7, #4]
8003210: 615a str r2, [r3, #20]
ep->xfer_len = len;
8003212: 697b ldr r3, [r7, #20]
8003214: 683a ldr r2, [r7, #0]
8003216: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8003218: 697b ldr r3, [r7, #20]
800321a: 2200 movs r2, #0
800321c: 61da str r2, [r3, #28]
ep->is_in = 0U;
800321e: 697b ldr r3, [r7, #20]
8003220: 2200 movs r2, #0
8003222: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8003224: 7afb ldrb r3, [r7, #11]
8003226: f003 0307 and.w r3, r3, #7
800322a: b2da uxtb r2, r3
800322c: 697b ldr r3, [r7, #20]
800322e: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8003230: 68fb ldr r3, [r7, #12]
8003232: 681b ldr r3, [r3, #0]
8003234: 6979 ldr r1, [r7, #20]
8003236: 4618 mov r0, r3
8003238: f003 fc44 bl 8006ac4 <USB_EPStartXfer>
return HAL_OK;
800323c: 2300 movs r3, #0
}
800323e: 4618 mov r0, r3
8003240: 3718 adds r7, #24
8003242: 46bd mov sp, r7
8003244: bd80 pop {r7, pc}
08003246 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8003246: b480 push {r7}
8003248: b083 sub sp, #12
800324a: af00 add r7, sp, #0
800324c: 6078 str r0, [r7, #4]
800324e: 460b mov r3, r1
8003250: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8003252: 78fb ldrb r3, [r7, #3]
8003254: f003 0207 and.w r2, r3, #7
8003258: 6879 ldr r1, [r7, #4]
800325a: 4613 mov r3, r2
800325c: 009b lsls r3, r3, #2
800325e: 4413 add r3, r2
8003260: 00db lsls r3, r3, #3
8003262: 440b add r3, r1
8003264: f503 73b6 add.w r3, r3, #364 @ 0x16c
8003268: 681b ldr r3, [r3, #0]
}
800326a: 4618 mov r0, r3
800326c: 370c adds r7, #12
800326e: 46bd mov sp, r7
8003270: bc80 pop {r7}
8003272: 4770 bx lr
08003274 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8003274: b580 push {r7, lr}
8003276: b086 sub sp, #24
8003278: af00 add r7, sp, #0
800327a: 60f8 str r0, [r7, #12]
800327c: 607a str r2, [r7, #4]
800327e: 603b str r3, [r7, #0]
8003280: 460b mov r3, r1
8003282: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8003284: 7afb ldrb r3, [r7, #11]
8003286: f003 0207 and.w r2, r3, #7
800328a: 4613 mov r3, r2
800328c: 009b lsls r3, r3, #2
800328e: 4413 add r3, r2
8003290: 00db lsls r3, r3, #3
8003292: 3310 adds r3, #16
8003294: 68fa ldr r2, [r7, #12]
8003296: 4413 add r3, r2
8003298: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
800329a: 697b ldr r3, [r7, #20]
800329c: 687a ldr r2, [r7, #4]
800329e: 615a str r2, [r3, #20]
ep->xfer_len = len;
80032a0: 697b ldr r3, [r7, #20]
80032a2: 683a ldr r2, [r7, #0]
80032a4: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
80032a6: 697b ldr r3, [r7, #20]
80032a8: 2201 movs r2, #1
80032aa: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
80032ae: 697b ldr r3, [r7, #20]
80032b0: 683a ldr r2, [r7, #0]
80032b2: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
80032b4: 697b ldr r3, [r7, #20]
80032b6: 2200 movs r2, #0
80032b8: 61da str r2, [r3, #28]
ep->is_in = 1U;
80032ba: 697b ldr r3, [r7, #20]
80032bc: 2201 movs r2, #1
80032be: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
80032c0: 7afb ldrb r3, [r7, #11]
80032c2: f003 0307 and.w r3, r3, #7
80032c6: b2da uxtb r2, r3
80032c8: 697b ldr r3, [r7, #20]
80032ca: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80032cc: 68fb ldr r3, [r7, #12]
80032ce: 681b ldr r3, [r3, #0]
80032d0: 6979 ldr r1, [r7, #20]
80032d2: 4618 mov r0, r3
80032d4: f003 fbf6 bl 8006ac4 <USB_EPStartXfer>
return HAL_OK;
80032d8: 2300 movs r3, #0
}
80032da: 4618 mov r0, r3
80032dc: 3718 adds r7, #24
80032de: 46bd mov sp, r7
80032e0: bd80 pop {r7, pc}
080032e2 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80032e2: b580 push {r7, lr}
80032e4: b084 sub sp, #16
80032e6: af00 add r7, sp, #0
80032e8: 6078 str r0, [r7, #4]
80032ea: 460b mov r3, r1
80032ec: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
80032ee: 78fb ldrb r3, [r7, #3]
80032f0: f003 0307 and.w r3, r3, #7
80032f4: 687a ldr r2, [r7, #4]
80032f6: 7912 ldrb r2, [r2, #4]
80032f8: 4293 cmp r3, r2
80032fa: d901 bls.n 8003300 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
80032fc: 2301 movs r3, #1
80032fe: e04c b.n 800339a <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8003300: f997 3003 ldrsb.w r3, [r7, #3]
8003304: 2b00 cmp r3, #0
8003306: da0e bge.n 8003326 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8003308: 78fb ldrb r3, [r7, #3]
800330a: f003 0207 and.w r2, r3, #7
800330e: 4613 mov r3, r2
8003310: 009b lsls r3, r3, #2
8003312: 4413 add r3, r2
8003314: 00db lsls r3, r3, #3
8003316: 3310 adds r3, #16
8003318: 687a ldr r2, [r7, #4]
800331a: 4413 add r3, r2
800331c: 60fb str r3, [r7, #12]
ep->is_in = 1U;
800331e: 68fb ldr r3, [r7, #12]
8003320: 2201 movs r2, #1
8003322: 705a strb r2, [r3, #1]
8003324: e00c b.n 8003340 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8003326: 78fa ldrb r2, [r7, #3]
8003328: 4613 mov r3, r2
800332a: 009b lsls r3, r3, #2
800332c: 4413 add r3, r2
800332e: 00db lsls r3, r3, #3
8003330: f503 73a8 add.w r3, r3, #336 @ 0x150
8003334: 687a ldr r2, [r7, #4]
8003336: 4413 add r3, r2
8003338: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800333a: 68fb ldr r3, [r7, #12]
800333c: 2200 movs r2, #0
800333e: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8003340: 68fb ldr r3, [r7, #12]
8003342: 2201 movs r2, #1
8003344: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8003346: 78fb ldrb r3, [r7, #3]
8003348: f003 0307 and.w r3, r3, #7
800334c: b2da uxtb r2, r3
800334e: 68fb ldr r3, [r7, #12]
8003350: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8003352: 687b ldr r3, [r7, #4]
8003354: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8003358: 2b01 cmp r3, #1
800335a: d101 bne.n 8003360 <HAL_PCD_EP_SetStall+0x7e>
800335c: 2302 movs r3, #2
800335e: e01c b.n 800339a <HAL_PCD_EP_SetStall+0xb8>
8003360: 687b ldr r3, [r7, #4]
8003362: 2201 movs r2, #1
8003364: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8003368: 687b ldr r3, [r7, #4]
800336a: 681b ldr r3, [r3, #0]
800336c: 68f9 ldr r1, [r7, #12]
800336e: 4618 mov r0, r3
8003370: f004 ff59 bl 8008226 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8003374: 78fb ldrb r3, [r7, #3]
8003376: f003 0307 and.w r3, r3, #7
800337a: 2b00 cmp r3, #0
800337c: d108 bne.n 8003390 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
800337e: 687b ldr r3, [r7, #4]
8003380: 681a ldr r2, [r3, #0]
8003382: 687b ldr r3, [r7, #4]
8003384: f503 7326 add.w r3, r3, #664 @ 0x298
8003388: 4619 mov r1, r3
800338a: 4610 mov r0, r2
800338c: f005 f87e bl 800848c <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8003390: 687b ldr r3, [r7, #4]
8003392: 2200 movs r2, #0
8003394: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8003398: 2300 movs r3, #0
}
800339a: 4618 mov r0, r3
800339c: 3710 adds r7, #16
800339e: 46bd mov sp, r7
80033a0: bd80 pop {r7, pc}
080033a2 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80033a2: b580 push {r7, lr}
80033a4: b084 sub sp, #16
80033a6: af00 add r7, sp, #0
80033a8: 6078 str r0, [r7, #4]
80033aa: 460b mov r3, r1
80033ac: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
80033ae: 78fb ldrb r3, [r7, #3]
80033b0: f003 030f and.w r3, r3, #15
80033b4: 687a ldr r2, [r7, #4]
80033b6: 7912 ldrb r2, [r2, #4]
80033b8: 4293 cmp r3, r2
80033ba: d901 bls.n 80033c0 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
80033bc: 2301 movs r3, #1
80033be: e040 b.n 8003442 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
80033c0: f997 3003 ldrsb.w r3, [r7, #3]
80033c4: 2b00 cmp r3, #0
80033c6: da0e bge.n 80033e6 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80033c8: 78fb ldrb r3, [r7, #3]
80033ca: f003 0207 and.w r2, r3, #7
80033ce: 4613 mov r3, r2
80033d0: 009b lsls r3, r3, #2
80033d2: 4413 add r3, r2
80033d4: 00db lsls r3, r3, #3
80033d6: 3310 adds r3, #16
80033d8: 687a ldr r2, [r7, #4]
80033da: 4413 add r3, r2
80033dc: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80033de: 68fb ldr r3, [r7, #12]
80033e0: 2201 movs r2, #1
80033e2: 705a strb r2, [r3, #1]
80033e4: e00e b.n 8003404 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80033e6: 78fb ldrb r3, [r7, #3]
80033e8: f003 0207 and.w r2, r3, #7
80033ec: 4613 mov r3, r2
80033ee: 009b lsls r3, r3, #2
80033f0: 4413 add r3, r2
80033f2: 00db lsls r3, r3, #3
80033f4: f503 73a8 add.w r3, r3, #336 @ 0x150
80033f8: 687a ldr r2, [r7, #4]
80033fa: 4413 add r3, r2
80033fc: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80033fe: 68fb ldr r3, [r7, #12]
8003400: 2200 movs r2, #0
8003402: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8003404: 68fb ldr r3, [r7, #12]
8003406: 2200 movs r2, #0
8003408: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
800340a: 78fb ldrb r3, [r7, #3]
800340c: f003 0307 and.w r3, r3, #7
8003410: b2da uxtb r2, r3
8003412: 68fb ldr r3, [r7, #12]
8003414: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8003416: 687b ldr r3, [r7, #4]
8003418: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800341c: 2b01 cmp r3, #1
800341e: d101 bne.n 8003424 <HAL_PCD_EP_ClrStall+0x82>
8003420: 2302 movs r3, #2
8003422: e00e b.n 8003442 <HAL_PCD_EP_ClrStall+0xa0>
8003424: 687b ldr r3, [r7, #4]
8003426: 2201 movs r2, #1
8003428: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
800342c: 687b ldr r3, [r7, #4]
800342e: 681b ldr r3, [r3, #0]
8003430: 68f9 ldr r1, [r7, #12]
8003432: 4618 mov r0, r3
8003434: f004 ff47 bl 80082c6 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8003438: 687b ldr r3, [r7, #4]
800343a: 2200 movs r2, #0
800343c: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8003440: 2300 movs r3, #0
}
8003442: 4618 mov r0, r3
8003444: 3710 adds r7, #16
8003446: 46bd mov sp, r7
8003448: bd80 pop {r7, pc}
0800344a <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
800344a: b580 push {r7, lr}
800344c: b096 sub sp, #88 @ 0x58
800344e: af00 add r7, sp, #0
8003450: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8003452: e3bb b.n 8003bcc <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8003454: 687b ldr r3, [r7, #4]
8003456: 681b ldr r3, [r3, #0]
8003458: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800345c: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8003460: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8003464: b2db uxtb r3, r3
8003466: f003 030f and.w r3, r3, #15
800346a: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
800346e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8003472: 2b00 cmp r3, #0
8003474: f040 8175 bne.w 8003762 <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8003478: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800347c: f003 0310 and.w r3, r3, #16
8003480: 2b00 cmp r3, #0
8003482: d14e bne.n 8003522 <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8003484: 687b ldr r3, [r7, #4]
8003486: 681b ldr r3, [r3, #0]
8003488: 881b ldrh r3, [r3, #0]
800348a: b29b uxth r3, r3
800348c: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8003490: f023 0370 bic.w r3, r3, #112 @ 0x70
8003494: 81fb strh r3, [r7, #14]
8003496: 687b ldr r3, [r7, #4]
8003498: 681a ldr r2, [r3, #0]
800349a: 89fb ldrh r3, [r7, #14]
800349c: ea6f 4343 mvn.w r3, r3, lsl #17
80034a0: ea6f 4353 mvn.w r3, r3, lsr #17
80034a4: b29b uxth r3, r3
80034a6: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
80034a8: 687b ldr r3, [r7, #4]
80034aa: 3310 adds r3, #16
80034ac: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80034ae: 687b ldr r3, [r7, #4]
80034b0: 681b ldr r3, [r3, #0]
80034b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80034b6: b29b uxth r3, r3
80034b8: 461a mov r2, r3
80034ba: 6d7b ldr r3, [r7, #84] @ 0x54
80034bc: 781b ldrb r3, [r3, #0]
80034be: 00db lsls r3, r3, #3
80034c0: 4413 add r3, r2
80034c2: 3302 adds r3, #2
80034c4: 005b lsls r3, r3, #1
80034c6: 687a ldr r2, [r7, #4]
80034c8: 6812 ldr r2, [r2, #0]
80034ca: 4413 add r3, r2
80034cc: f503 6380 add.w r3, r3, #1024 @ 0x400
80034d0: 881b ldrh r3, [r3, #0]
80034d2: f3c3 0209 ubfx r2, r3, #0, #10
80034d6: 6d7b ldr r3, [r7, #84] @ 0x54
80034d8: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
80034da: 6d7b ldr r3, [r7, #84] @ 0x54
80034dc: 695a ldr r2, [r3, #20]
80034de: 6d7b ldr r3, [r7, #84] @ 0x54
80034e0: 69db ldr r3, [r3, #28]
80034e2: 441a add r2, r3
80034e4: 6d7b ldr r3, [r7, #84] @ 0x54
80034e6: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
80034e8: 2100 movs r1, #0
80034ea: 6878 ldr r0, [r7, #4]
80034ec: f006 fe9d bl 800a22a <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
80034f0: 687b ldr r3, [r7, #4]
80034f2: 7b5b ldrb r3, [r3, #13]
80034f4: b2db uxtb r3, r3
80034f6: 2b00 cmp r3, #0
80034f8: f000 8368 beq.w 8003bcc <PCD_EP_ISR_Handler+0x782>
80034fc: 6d7b ldr r3, [r7, #84] @ 0x54
80034fe: 699b ldr r3, [r3, #24]
8003500: 2b00 cmp r3, #0
8003502: f040 8363 bne.w 8003bcc <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8003506: 687b ldr r3, [r7, #4]
8003508: 7b5b ldrb r3, [r3, #13]
800350a: b2db uxtb r3, r3
800350c: f063 037f orn r3, r3, #127 @ 0x7f
8003510: b2da uxtb r2, r3
8003512: 687b ldr r3, [r7, #4]
8003514: 681b ldr r3, [r3, #0]
8003516: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
800351a: 687b ldr r3, [r7, #4]
800351c: 2200 movs r2, #0
800351e: 735a strb r2, [r3, #13]
8003520: e354 b.n 8003bcc <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
8003522: 687b ldr r3, [r7, #4]
8003524: f503 73a8 add.w r3, r3, #336 @ 0x150
8003528: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
800352a: 687b ldr r3, [r7, #4]
800352c: 681b ldr r3, [r3, #0]
800352e: 881b ldrh r3, [r3, #0]
8003530: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8003534: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8003538: f403 6300 and.w r3, r3, #2048 @ 0x800
800353c: 2b00 cmp r3, #0
800353e: d034 beq.n 80035aa <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8003540: 687b ldr r3, [r7, #4]
8003542: 681b ldr r3, [r3, #0]
8003544: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003548: b29b uxth r3, r3
800354a: 461a mov r2, r3
800354c: 6d7b ldr r3, [r7, #84] @ 0x54
800354e: 781b ldrb r3, [r3, #0]
8003550: 00db lsls r3, r3, #3
8003552: 4413 add r3, r2
8003554: 3306 adds r3, #6
8003556: 005b lsls r3, r3, #1
8003558: 687a ldr r2, [r7, #4]
800355a: 6812 ldr r2, [r2, #0]
800355c: 4413 add r3, r2
800355e: f503 6380 add.w r3, r3, #1024 @ 0x400
8003562: 881b ldrh r3, [r3, #0]
8003564: f3c3 0209 ubfx r2, r3, #0, #10
8003568: 6d7b ldr r3, [r7, #84] @ 0x54
800356a: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
800356c: 687b ldr r3, [r7, #4]
800356e: 6818 ldr r0, [r3, #0]
8003570: 687b ldr r3, [r7, #4]
8003572: f503 7126 add.w r1, r3, #664 @ 0x298
8003576: 6d7b ldr r3, [r7, #84] @ 0x54
8003578: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
800357a: 6d7b ldr r3, [r7, #84] @ 0x54
800357c: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
800357e: b29b uxth r3, r3
8003580: f004 ffd5 bl 800852e <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8003584: 687b ldr r3, [r7, #4]
8003586: 681b ldr r3, [r3, #0]
8003588: 881b ldrh r3, [r3, #0]
800358a: b29a uxth r2, r3
800358c: f640 738f movw r3, #3983 @ 0xf8f
8003590: 4013 ands r3, r2
8003592: 823b strh r3, [r7, #16]
8003594: 687b ldr r3, [r7, #4]
8003596: 681b ldr r3, [r3, #0]
8003598: 8a3a ldrh r2, [r7, #16]
800359a: f042 0280 orr.w r2, r2, #128 @ 0x80
800359e: b292 uxth r2, r2
80035a0: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
80035a2: 6878 ldr r0, [r7, #4]
80035a4: f006 fe14 bl 800a1d0 <HAL_PCD_SetupStageCallback>
80035a8: e310 b.n 8003bcc <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
80035aa: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
80035ae: 2b00 cmp r3, #0
80035b0: f280 830c bge.w 8003bcc <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80035b4: 687b ldr r3, [r7, #4]
80035b6: 681b ldr r3, [r3, #0]
80035b8: 881b ldrh r3, [r3, #0]
80035ba: b29a uxth r2, r3
80035bc: f640 738f movw r3, #3983 @ 0xf8f
80035c0: 4013 ands r3, r2
80035c2: 83fb strh r3, [r7, #30]
80035c4: 687b ldr r3, [r7, #4]
80035c6: 681b ldr r3, [r3, #0]
80035c8: 8bfa ldrh r2, [r7, #30]
80035ca: f042 0280 orr.w r2, r2, #128 @ 0x80
80035ce: b292 uxth r2, r2
80035d0: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80035d2: 687b ldr r3, [r7, #4]
80035d4: 681b ldr r3, [r3, #0]
80035d6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80035da: b29b uxth r3, r3
80035dc: 461a mov r2, r3
80035de: 6d7b ldr r3, [r7, #84] @ 0x54
80035e0: 781b ldrb r3, [r3, #0]
80035e2: 00db lsls r3, r3, #3
80035e4: 4413 add r3, r2
80035e6: 3306 adds r3, #6
80035e8: 005b lsls r3, r3, #1
80035ea: 687a ldr r2, [r7, #4]
80035ec: 6812 ldr r2, [r2, #0]
80035ee: 4413 add r3, r2
80035f0: f503 6380 add.w r3, r3, #1024 @ 0x400
80035f4: 881b ldrh r3, [r3, #0]
80035f6: f3c3 0209 ubfx r2, r3, #0, #10
80035fa: 6d7b ldr r3, [r7, #84] @ 0x54
80035fc: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
80035fe: 6d7b ldr r3, [r7, #84] @ 0x54
8003600: 69db ldr r3, [r3, #28]
8003602: 2b00 cmp r3, #0
8003604: d019 beq.n 800363a <PCD_EP_ISR_Handler+0x1f0>
8003606: 6d7b ldr r3, [r7, #84] @ 0x54
8003608: 695b ldr r3, [r3, #20]
800360a: 2b00 cmp r3, #0
800360c: d015 beq.n 800363a <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
800360e: 687b ldr r3, [r7, #4]
8003610: 6818 ldr r0, [r3, #0]
8003612: 6d7b ldr r3, [r7, #84] @ 0x54
8003614: 6959 ldr r1, [r3, #20]
8003616: 6d7b ldr r3, [r7, #84] @ 0x54
8003618: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
800361a: 6d7b ldr r3, [r7, #84] @ 0x54
800361c: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
800361e: b29b uxth r3, r3
8003620: f004 ff85 bl 800852e <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8003624: 6d7b ldr r3, [r7, #84] @ 0x54
8003626: 695a ldr r2, [r3, #20]
8003628: 6d7b ldr r3, [r7, #84] @ 0x54
800362a: 69db ldr r3, [r3, #28]
800362c: 441a add r2, r3
800362e: 6d7b ldr r3, [r7, #84] @ 0x54
8003630: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
8003632: 2100 movs r1, #0
8003634: 6878 ldr r0, [r7, #4]
8003636: f006 fddd bl 800a1f4 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
800363a: 687b ldr r3, [r7, #4]
800363c: 681b ldr r3, [r3, #0]
800363e: 881b ldrh r3, [r3, #0]
8003640: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8003644: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8003648: f403 6300 and.w r3, r3, #2048 @ 0x800
800364c: 2b00 cmp r3, #0
800364e: f040 82bd bne.w 8003bcc <PCD_EP_ISR_Handler+0x782>
8003652: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8003656: f403 5340 and.w r3, r3, #12288 @ 0x3000
800365a: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
800365e: f000 82b5 beq.w 8003bcc <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
8003662: 687b ldr r3, [r7, #4]
8003664: 681b ldr r3, [r3, #0]
8003666: 61bb str r3, [r7, #24]
8003668: 687b ldr r3, [r7, #4]
800366a: 681b ldr r3, [r3, #0]
800366c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003670: b29b uxth r3, r3
8003672: 461a mov r2, r3
8003674: 69bb ldr r3, [r7, #24]
8003676: 4413 add r3, r2
8003678: 61bb str r3, [r7, #24]
800367a: 69bb ldr r3, [r7, #24]
800367c: f203 430c addw r3, r3, #1036 @ 0x40c
8003680: 617b str r3, [r7, #20]
8003682: 697b ldr r3, [r7, #20]
8003684: 881b ldrh r3, [r3, #0]
8003686: b29b uxth r3, r3
8003688: f3c3 0309 ubfx r3, r3, #0, #10
800368c: b29a uxth r2, r3
800368e: 697b ldr r3, [r7, #20]
8003690: 801a strh r2, [r3, #0]
8003692: 6d7b ldr r3, [r7, #84] @ 0x54
8003694: 691b ldr r3, [r3, #16]
8003696: 2b3e cmp r3, #62 @ 0x3e
8003698: d91d bls.n 80036d6 <PCD_EP_ISR_Handler+0x28c>
800369a: 6d7b ldr r3, [r7, #84] @ 0x54
800369c: 691b ldr r3, [r3, #16]
800369e: 095b lsrs r3, r3, #5
80036a0: 647b str r3, [r7, #68] @ 0x44
80036a2: 6d7b ldr r3, [r7, #84] @ 0x54
80036a4: 691b ldr r3, [r3, #16]
80036a6: f003 031f and.w r3, r3, #31
80036aa: 2b00 cmp r3, #0
80036ac: d102 bne.n 80036b4 <PCD_EP_ISR_Handler+0x26a>
80036ae: 6c7b ldr r3, [r7, #68] @ 0x44
80036b0: 3b01 subs r3, #1
80036b2: 647b str r3, [r7, #68] @ 0x44
80036b4: 697b ldr r3, [r7, #20]
80036b6: 881b ldrh r3, [r3, #0]
80036b8: b29a uxth r2, r3
80036ba: 6c7b ldr r3, [r7, #68] @ 0x44
80036bc: b29b uxth r3, r3
80036be: 029b lsls r3, r3, #10
80036c0: b29b uxth r3, r3
80036c2: 4313 orrs r3, r2
80036c4: b29b uxth r3, r3
80036c6: ea6f 4343 mvn.w r3, r3, lsl #17
80036ca: ea6f 4353 mvn.w r3, r3, lsr #17
80036ce: b29a uxth r2, r3
80036d0: 697b ldr r3, [r7, #20]
80036d2: 801a strh r2, [r3, #0]
80036d4: e026 b.n 8003724 <PCD_EP_ISR_Handler+0x2da>
80036d6: 6d7b ldr r3, [r7, #84] @ 0x54
80036d8: 691b ldr r3, [r3, #16]
80036da: 2b00 cmp r3, #0
80036dc: d10a bne.n 80036f4 <PCD_EP_ISR_Handler+0x2aa>
80036de: 697b ldr r3, [r7, #20]
80036e0: 881b ldrh r3, [r3, #0]
80036e2: b29b uxth r3, r3
80036e4: ea6f 4343 mvn.w r3, r3, lsl #17
80036e8: ea6f 4353 mvn.w r3, r3, lsr #17
80036ec: b29a uxth r2, r3
80036ee: 697b ldr r3, [r7, #20]
80036f0: 801a strh r2, [r3, #0]
80036f2: e017 b.n 8003724 <PCD_EP_ISR_Handler+0x2da>
80036f4: 6d7b ldr r3, [r7, #84] @ 0x54
80036f6: 691b ldr r3, [r3, #16]
80036f8: 085b lsrs r3, r3, #1
80036fa: 647b str r3, [r7, #68] @ 0x44
80036fc: 6d7b ldr r3, [r7, #84] @ 0x54
80036fe: 691b ldr r3, [r3, #16]
8003700: f003 0301 and.w r3, r3, #1
8003704: 2b00 cmp r3, #0
8003706: d002 beq.n 800370e <PCD_EP_ISR_Handler+0x2c4>
8003708: 6c7b ldr r3, [r7, #68] @ 0x44
800370a: 3301 adds r3, #1
800370c: 647b str r3, [r7, #68] @ 0x44
800370e: 697b ldr r3, [r7, #20]
8003710: 881b ldrh r3, [r3, #0]
8003712: b29a uxth r2, r3
8003714: 6c7b ldr r3, [r7, #68] @ 0x44
8003716: b29b uxth r3, r3
8003718: 029b lsls r3, r3, #10
800371a: b29b uxth r3, r3
800371c: 4313 orrs r3, r2
800371e: b29a uxth r2, r3
8003720: 697b ldr r3, [r7, #20]
8003722: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8003724: 687b ldr r3, [r7, #4]
8003726: 681b ldr r3, [r3, #0]
8003728: 881b ldrh r3, [r3, #0]
800372a: b29b uxth r3, r3
800372c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8003730: f023 0370 bic.w r3, r3, #112 @ 0x70
8003734: 827b strh r3, [r7, #18]
8003736: 8a7b ldrh r3, [r7, #18]
8003738: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800373c: 827b strh r3, [r7, #18]
800373e: 8a7b ldrh r3, [r7, #18]
8003740: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8003744: 827b strh r3, [r7, #18]
8003746: 687b ldr r3, [r7, #4]
8003748: 681a ldr r2, [r3, #0]
800374a: 8a7b ldrh r3, [r7, #18]
800374c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003750: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003754: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003758: f043 0380 orr.w r3, r3, #128 @ 0x80
800375c: b29b uxth r3, r3
800375e: 8013 strh r3, [r2, #0]
8003760: e234 b.n 8003bcc <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
8003762: 687b ldr r3, [r7, #4]
8003764: 681b ldr r3, [r3, #0]
8003766: 461a mov r2, r3
8003768: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800376c: 009b lsls r3, r3, #2
800376e: 4413 add r3, r2
8003770: 881b ldrh r3, [r3, #0]
8003772: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
8003776: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
800377a: 2b00 cmp r3, #0
800377c: f280 80fc bge.w 8003978 <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
8003780: 687b ldr r3, [r7, #4]
8003782: 681b ldr r3, [r3, #0]
8003784: 461a mov r2, r3
8003786: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800378a: 009b lsls r3, r3, #2
800378c: 4413 add r3, r2
800378e: 881b ldrh r3, [r3, #0]
8003790: b29a uxth r2, r3
8003792: f640 738f movw r3, #3983 @ 0xf8f
8003796: 4013 ands r3, r2
8003798: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
800379c: 687b ldr r3, [r7, #4]
800379e: 681b ldr r3, [r3, #0]
80037a0: 461a mov r2, r3
80037a2: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80037a6: 009b lsls r3, r3, #2
80037a8: 4413 add r3, r2
80037aa: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
80037ae: f042 0280 orr.w r2, r2, #128 @ 0x80
80037b2: b292 uxth r2, r2
80037b4: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
80037b6: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80037ba: 4613 mov r3, r2
80037bc: 009b lsls r3, r3, #2
80037be: 4413 add r3, r2
80037c0: 00db lsls r3, r3, #3
80037c2: f503 73a8 add.w r3, r3, #336 @ 0x150
80037c6: 687a ldr r2, [r7, #4]
80037c8: 4413 add r3, r2
80037ca: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
80037cc: 6d7b ldr r3, [r7, #84] @ 0x54
80037ce: 7b1b ldrb r3, [r3, #12]
80037d0: 2b00 cmp r3, #0
80037d2: d125 bne.n 8003820 <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80037d4: 687b ldr r3, [r7, #4]
80037d6: 681b ldr r3, [r3, #0]
80037d8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80037dc: b29b uxth r3, r3
80037de: 461a mov r2, r3
80037e0: 6d7b ldr r3, [r7, #84] @ 0x54
80037e2: 781b ldrb r3, [r3, #0]
80037e4: 00db lsls r3, r3, #3
80037e6: 4413 add r3, r2
80037e8: 3306 adds r3, #6
80037ea: 005b lsls r3, r3, #1
80037ec: 687a ldr r2, [r7, #4]
80037ee: 6812 ldr r2, [r2, #0]
80037f0: 4413 add r3, r2
80037f2: f503 6380 add.w r3, r3, #1024 @ 0x400
80037f6: 881b ldrh r3, [r3, #0]
80037f8: f3c3 0309 ubfx r3, r3, #0, #10
80037fc: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8003800: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8003804: 2b00 cmp r3, #0
8003806: f000 8092 beq.w 800392e <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
800380a: 687b ldr r3, [r7, #4]
800380c: 6818 ldr r0, [r3, #0]
800380e: 6d7b ldr r3, [r7, #84] @ 0x54
8003810: 6959 ldr r1, [r3, #20]
8003812: 6d7b ldr r3, [r7, #84] @ 0x54
8003814: 88da ldrh r2, [r3, #6]
8003816: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800381a: f004 fe88 bl 800852e <USB_ReadPMA>
800381e: e086 b.n 800392e <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8003820: 6d7b ldr r3, [r7, #84] @ 0x54
8003822: 78db ldrb r3, [r3, #3]
8003824: 2b02 cmp r3, #2
8003826: d10a bne.n 800383e <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8003828: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800382c: 461a mov r2, r3
800382e: 6d79 ldr r1, [r7, #84] @ 0x54
8003830: 6878 ldr r0, [r7, #4]
8003832: f000 f9d9 bl 8003be8 <HAL_PCD_EP_DB_Receive>
8003836: 4603 mov r3, r0
8003838: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
800383c: e077 b.n 800392e <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
800383e: 687b ldr r3, [r7, #4]
8003840: 681b ldr r3, [r3, #0]
8003842: 461a mov r2, r3
8003844: 6d7b ldr r3, [r7, #84] @ 0x54
8003846: 781b ldrb r3, [r3, #0]
8003848: 009b lsls r3, r3, #2
800384a: 4413 add r3, r2
800384c: 881b ldrh r3, [r3, #0]
800384e: b29b uxth r3, r3
8003850: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003854: f023 0370 bic.w r3, r3, #112 @ 0x70
8003858: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
800385c: 687b ldr r3, [r7, #4]
800385e: 681b ldr r3, [r3, #0]
8003860: 461a mov r2, r3
8003862: 6d7b ldr r3, [r7, #84] @ 0x54
8003864: 781b ldrb r3, [r3, #0]
8003866: 009b lsls r3, r3, #2
8003868: 441a add r2, r3
800386a: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
800386e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003872: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003876: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800387a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800387e: b29b uxth r3, r3
8003880: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
8003882: 687b ldr r3, [r7, #4]
8003884: 681b ldr r3, [r3, #0]
8003886: 461a mov r2, r3
8003888: 6d7b ldr r3, [r7, #84] @ 0x54
800388a: 781b ldrb r3, [r3, #0]
800388c: 009b lsls r3, r3, #2
800388e: 4413 add r3, r2
8003890: 881b ldrh r3, [r3, #0]
8003892: b29b uxth r3, r3
8003894: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003898: 2b00 cmp r3, #0
800389a: d024 beq.n 80038e6 <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
800389c: 687b ldr r3, [r7, #4]
800389e: 681b ldr r3, [r3, #0]
80038a0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80038a4: b29b uxth r3, r3
80038a6: 461a mov r2, r3
80038a8: 6d7b ldr r3, [r7, #84] @ 0x54
80038aa: 781b ldrb r3, [r3, #0]
80038ac: 00db lsls r3, r3, #3
80038ae: 4413 add r3, r2
80038b0: 3302 adds r3, #2
80038b2: 005b lsls r3, r3, #1
80038b4: 687a ldr r2, [r7, #4]
80038b6: 6812 ldr r2, [r2, #0]
80038b8: 4413 add r3, r2
80038ba: f503 6380 add.w r3, r3, #1024 @ 0x400
80038be: 881b ldrh r3, [r3, #0]
80038c0: f3c3 0309 ubfx r3, r3, #0, #10
80038c4: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80038c8: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80038cc: 2b00 cmp r3, #0
80038ce: d02e beq.n 800392e <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
80038d0: 687b ldr r3, [r7, #4]
80038d2: 6818 ldr r0, [r3, #0]
80038d4: 6d7b ldr r3, [r7, #84] @ 0x54
80038d6: 6959 ldr r1, [r3, #20]
80038d8: 6d7b ldr r3, [r7, #84] @ 0x54
80038da: 891a ldrh r2, [r3, #8]
80038dc: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80038e0: f004 fe25 bl 800852e <USB_ReadPMA>
80038e4: e023 b.n 800392e <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80038e6: 687b ldr r3, [r7, #4]
80038e8: 681b ldr r3, [r3, #0]
80038ea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80038ee: b29b uxth r3, r3
80038f0: 461a mov r2, r3
80038f2: 6d7b ldr r3, [r7, #84] @ 0x54
80038f4: 781b ldrb r3, [r3, #0]
80038f6: 00db lsls r3, r3, #3
80038f8: 4413 add r3, r2
80038fa: 3306 adds r3, #6
80038fc: 005b lsls r3, r3, #1
80038fe: 687a ldr r2, [r7, #4]
8003900: 6812 ldr r2, [r2, #0]
8003902: 4413 add r3, r2
8003904: f503 6380 add.w r3, r3, #1024 @ 0x400
8003908: 881b ldrh r3, [r3, #0]
800390a: f3c3 0309 ubfx r3, r3, #0, #10
800390e: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8003912: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8003916: 2b00 cmp r3, #0
8003918: d009 beq.n 800392e <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
800391a: 687b ldr r3, [r7, #4]
800391c: 6818 ldr r0, [r3, #0]
800391e: 6d7b ldr r3, [r7, #84] @ 0x54
8003920: 6959 ldr r1, [r3, #20]
8003922: 6d7b ldr r3, [r7, #84] @ 0x54
8003924: 895a ldrh r2, [r3, #10]
8003926: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800392a: f004 fe00 bl 800852e <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
800392e: 6d7b ldr r3, [r7, #84] @ 0x54
8003930: 69da ldr r2, [r3, #28]
8003932: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8003936: 441a add r2, r3
8003938: 6d7b ldr r3, [r7, #84] @ 0x54
800393a: 61da str r2, [r3, #28]
ep->xfer_buff += count;
800393c: 6d7b ldr r3, [r7, #84] @ 0x54
800393e: 695a ldr r2, [r3, #20]
8003940: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8003944: 441a add r2, r3
8003946: 6d7b ldr r3, [r7, #84] @ 0x54
8003948: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
800394a: 6d7b ldr r3, [r7, #84] @ 0x54
800394c: 699b ldr r3, [r3, #24]
800394e: 2b00 cmp r3, #0
8003950: d005 beq.n 800395e <PCD_EP_ISR_Handler+0x514>
8003952: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
8003956: 6d7b ldr r3, [r7, #84] @ 0x54
8003958: 691b ldr r3, [r3, #16]
800395a: 429a cmp r2, r3
800395c: d206 bcs.n 800396c <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
800395e: 6d7b ldr r3, [r7, #84] @ 0x54
8003960: 781b ldrb r3, [r3, #0]
8003962: 4619 mov r1, r3
8003964: 6878 ldr r0, [r7, #4]
8003966: f006 fc45 bl 800a1f4 <HAL_PCD_DataOutStageCallback>
800396a: e005 b.n 8003978 <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
800396c: 687b ldr r3, [r7, #4]
800396e: 681b ldr r3, [r3, #0]
8003970: 6d79 ldr r1, [r7, #84] @ 0x54
8003972: 4618 mov r0, r3
8003974: f003 f8a6 bl 8006ac4 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8003978: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800397c: f003 0380 and.w r3, r3, #128 @ 0x80
8003980: 2b00 cmp r3, #0
8003982: f000 8123 beq.w 8003bcc <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
8003986: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
800398a: 4613 mov r3, r2
800398c: 009b lsls r3, r3, #2
800398e: 4413 add r3, r2
8003990: 00db lsls r3, r3, #3
8003992: 3310 adds r3, #16
8003994: 687a ldr r2, [r7, #4]
8003996: 4413 add r3, r2
8003998: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
800399a: 687b ldr r3, [r7, #4]
800399c: 681b ldr r3, [r3, #0]
800399e: 461a mov r2, r3
80039a0: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80039a4: 009b lsls r3, r3, #2
80039a6: 4413 add r3, r2
80039a8: 881b ldrh r3, [r3, #0]
80039aa: b29b uxth r3, r3
80039ac: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
80039b0: f023 0370 bic.w r3, r3, #112 @ 0x70
80039b4: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80039b8: 687b ldr r3, [r7, #4]
80039ba: 681b ldr r3, [r3, #0]
80039bc: 461a mov r2, r3
80039be: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80039c2: 009b lsls r3, r3, #2
80039c4: 441a add r2, r3
80039c6: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
80039ca: ea6f 4343 mvn.w r3, r3, lsl #17
80039ce: ea6f 4353 mvn.w r3, r3, lsr #17
80039d2: b29b uxth r3, r3
80039d4: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
80039d6: 6d7b ldr r3, [r7, #84] @ 0x54
80039d8: 78db ldrb r3, [r3, #3]
80039da: 2b01 cmp r3, #1
80039dc: f040 80a2 bne.w 8003b24 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
80039e0: 6d7b ldr r3, [r7, #84] @ 0x54
80039e2: 2200 movs r2, #0
80039e4: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
80039e6: 6d7b ldr r3, [r7, #84] @ 0x54
80039e8: 7b1b ldrb r3, [r3, #12]
80039ea: 2b00 cmp r3, #0
80039ec: f000 8093 beq.w 8003b16 <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80039f0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80039f4: f003 0340 and.w r3, r3, #64 @ 0x40
80039f8: 2b00 cmp r3, #0
80039fa: d046 beq.n 8003a8a <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80039fc: 6d7b ldr r3, [r7, #84] @ 0x54
80039fe: 785b ldrb r3, [r3, #1]
8003a00: 2b00 cmp r3, #0
8003a02: d126 bne.n 8003a52 <PCD_EP_ISR_Handler+0x608>
8003a04: 687b ldr r3, [r7, #4]
8003a06: 681b ldr r3, [r3, #0]
8003a08: 627b str r3, [r7, #36] @ 0x24
8003a0a: 687b ldr r3, [r7, #4]
8003a0c: 681b ldr r3, [r3, #0]
8003a0e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003a12: b29b uxth r3, r3
8003a14: 461a mov r2, r3
8003a16: 6a7b ldr r3, [r7, #36] @ 0x24
8003a18: 4413 add r3, r2
8003a1a: 627b str r3, [r7, #36] @ 0x24
8003a1c: 6d7b ldr r3, [r7, #84] @ 0x54
8003a1e: 781b ldrb r3, [r3, #0]
8003a20: 011a lsls r2, r3, #4
8003a22: 6a7b ldr r3, [r7, #36] @ 0x24
8003a24: 4413 add r3, r2
8003a26: f203 4304 addw r3, r3, #1028 @ 0x404
8003a2a: 623b str r3, [r7, #32]
8003a2c: 6a3b ldr r3, [r7, #32]
8003a2e: 881b ldrh r3, [r3, #0]
8003a30: b29b uxth r3, r3
8003a32: f3c3 0309 ubfx r3, r3, #0, #10
8003a36: b29a uxth r2, r3
8003a38: 6a3b ldr r3, [r7, #32]
8003a3a: 801a strh r2, [r3, #0]
8003a3c: 6a3b ldr r3, [r7, #32]
8003a3e: 881b ldrh r3, [r3, #0]
8003a40: b29b uxth r3, r3
8003a42: ea6f 4343 mvn.w r3, r3, lsl #17
8003a46: ea6f 4353 mvn.w r3, r3, lsr #17
8003a4a: b29a uxth r2, r3
8003a4c: 6a3b ldr r3, [r7, #32]
8003a4e: 801a strh r2, [r3, #0]
8003a50: e061 b.n 8003b16 <PCD_EP_ISR_Handler+0x6cc>
8003a52: 6d7b ldr r3, [r7, #84] @ 0x54
8003a54: 785b ldrb r3, [r3, #1]
8003a56: 2b01 cmp r3, #1
8003a58: d15d bne.n 8003b16 <PCD_EP_ISR_Handler+0x6cc>
8003a5a: 687b ldr r3, [r7, #4]
8003a5c: 681b ldr r3, [r3, #0]
8003a5e: 62fb str r3, [r7, #44] @ 0x2c
8003a60: 687b ldr r3, [r7, #4]
8003a62: 681b ldr r3, [r3, #0]
8003a64: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003a68: b29b uxth r3, r3
8003a6a: 461a mov r2, r3
8003a6c: 6afb ldr r3, [r7, #44] @ 0x2c
8003a6e: 4413 add r3, r2
8003a70: 62fb str r3, [r7, #44] @ 0x2c
8003a72: 6d7b ldr r3, [r7, #84] @ 0x54
8003a74: 781b ldrb r3, [r3, #0]
8003a76: 011a lsls r2, r3, #4
8003a78: 6afb ldr r3, [r7, #44] @ 0x2c
8003a7a: 4413 add r3, r2
8003a7c: f203 4304 addw r3, r3, #1028 @ 0x404
8003a80: 62bb str r3, [r7, #40] @ 0x28
8003a82: 6abb ldr r3, [r7, #40] @ 0x28
8003a84: 2200 movs r2, #0
8003a86: 801a strh r2, [r3, #0]
8003a88: e045 b.n 8003b16 <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8003a8a: 687b ldr r3, [r7, #4]
8003a8c: 681b ldr r3, [r3, #0]
8003a8e: 63fb str r3, [r7, #60] @ 0x3c
8003a90: 6d7b ldr r3, [r7, #84] @ 0x54
8003a92: 785b ldrb r3, [r3, #1]
8003a94: 2b00 cmp r3, #0
8003a96: d126 bne.n 8003ae6 <PCD_EP_ISR_Handler+0x69c>
8003a98: 687b ldr r3, [r7, #4]
8003a9a: 681b ldr r3, [r3, #0]
8003a9c: 637b str r3, [r7, #52] @ 0x34
8003a9e: 687b ldr r3, [r7, #4]
8003aa0: 681b ldr r3, [r3, #0]
8003aa2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003aa6: b29b uxth r3, r3
8003aa8: 461a mov r2, r3
8003aaa: 6b7b ldr r3, [r7, #52] @ 0x34
8003aac: 4413 add r3, r2
8003aae: 637b str r3, [r7, #52] @ 0x34
8003ab0: 6d7b ldr r3, [r7, #84] @ 0x54
8003ab2: 781b ldrb r3, [r3, #0]
8003ab4: 011a lsls r2, r3, #4
8003ab6: 6b7b ldr r3, [r7, #52] @ 0x34
8003ab8: 4413 add r3, r2
8003aba: f203 430c addw r3, r3, #1036 @ 0x40c
8003abe: 633b str r3, [r7, #48] @ 0x30
8003ac0: 6b3b ldr r3, [r7, #48] @ 0x30
8003ac2: 881b ldrh r3, [r3, #0]
8003ac4: b29b uxth r3, r3
8003ac6: f3c3 0309 ubfx r3, r3, #0, #10
8003aca: b29a uxth r2, r3
8003acc: 6b3b ldr r3, [r7, #48] @ 0x30
8003ace: 801a strh r2, [r3, #0]
8003ad0: 6b3b ldr r3, [r7, #48] @ 0x30
8003ad2: 881b ldrh r3, [r3, #0]
8003ad4: b29b uxth r3, r3
8003ad6: ea6f 4343 mvn.w r3, r3, lsl #17
8003ada: ea6f 4353 mvn.w r3, r3, lsr #17
8003ade: b29a uxth r2, r3
8003ae0: 6b3b ldr r3, [r7, #48] @ 0x30
8003ae2: 801a strh r2, [r3, #0]
8003ae4: e017 b.n 8003b16 <PCD_EP_ISR_Handler+0x6cc>
8003ae6: 6d7b ldr r3, [r7, #84] @ 0x54
8003ae8: 785b ldrb r3, [r3, #1]
8003aea: 2b01 cmp r3, #1
8003aec: d113 bne.n 8003b16 <PCD_EP_ISR_Handler+0x6cc>
8003aee: 687b ldr r3, [r7, #4]
8003af0: 681b ldr r3, [r3, #0]
8003af2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003af6: b29b uxth r3, r3
8003af8: 461a mov r2, r3
8003afa: 6bfb ldr r3, [r7, #60] @ 0x3c
8003afc: 4413 add r3, r2
8003afe: 63fb str r3, [r7, #60] @ 0x3c
8003b00: 6d7b ldr r3, [r7, #84] @ 0x54
8003b02: 781b ldrb r3, [r3, #0]
8003b04: 011a lsls r2, r3, #4
8003b06: 6bfb ldr r3, [r7, #60] @ 0x3c
8003b08: 4413 add r3, r2
8003b0a: f203 430c addw r3, r3, #1036 @ 0x40c
8003b0e: 63bb str r3, [r7, #56] @ 0x38
8003b10: 6bbb ldr r3, [r7, #56] @ 0x38
8003b12: 2200 movs r2, #0
8003b14: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8003b16: 6d7b ldr r3, [r7, #84] @ 0x54
8003b18: 781b ldrb r3, [r3, #0]
8003b1a: 4619 mov r1, r3
8003b1c: 6878 ldr r0, [r7, #4]
8003b1e: f006 fb84 bl 800a22a <HAL_PCD_DataInStageCallback>
8003b22: e053 b.n 8003bcc <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8003b24: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8003b28: f403 7380 and.w r3, r3, #256 @ 0x100
8003b2c: 2b00 cmp r3, #0
8003b2e: d146 bne.n 8003bbe <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8003b30: 687b ldr r3, [r7, #4]
8003b32: 681b ldr r3, [r3, #0]
8003b34: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003b38: b29b uxth r3, r3
8003b3a: 461a mov r2, r3
8003b3c: 6d7b ldr r3, [r7, #84] @ 0x54
8003b3e: 781b ldrb r3, [r3, #0]
8003b40: 00db lsls r3, r3, #3
8003b42: 4413 add r3, r2
8003b44: 3302 adds r3, #2
8003b46: 005b lsls r3, r3, #1
8003b48: 687a ldr r2, [r7, #4]
8003b4a: 6812 ldr r2, [r2, #0]
8003b4c: 4413 add r3, r2
8003b4e: f503 6380 add.w r3, r3, #1024 @ 0x400
8003b52: 881b ldrh r3, [r3, #0]
8003b54: f3c3 0309 ubfx r3, r3, #0, #10
8003b58: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8003b5c: 6d7b ldr r3, [r7, #84] @ 0x54
8003b5e: 699a ldr r2, [r3, #24]
8003b60: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8003b64: 429a cmp r2, r3
8003b66: d907 bls.n 8003b78 <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8003b68: 6d7b ldr r3, [r7, #84] @ 0x54
8003b6a: 699a ldr r2, [r3, #24]
8003b6c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8003b70: 1ad2 subs r2, r2, r3
8003b72: 6d7b ldr r3, [r7, #84] @ 0x54
8003b74: 619a str r2, [r3, #24]
8003b76: e002 b.n 8003b7e <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8003b78: 6d7b ldr r3, [r7, #84] @ 0x54
8003b7a: 2200 movs r2, #0
8003b7c: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8003b7e: 6d7b ldr r3, [r7, #84] @ 0x54
8003b80: 699b ldr r3, [r3, #24]
8003b82: 2b00 cmp r3, #0
8003b84: d106 bne.n 8003b94 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8003b86: 6d7b ldr r3, [r7, #84] @ 0x54
8003b88: 781b ldrb r3, [r3, #0]
8003b8a: 4619 mov r1, r3
8003b8c: 6878 ldr r0, [r7, #4]
8003b8e: f006 fb4c bl 800a22a <HAL_PCD_DataInStageCallback>
8003b92: e01b b.n 8003bcc <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
8003b94: 6d7b ldr r3, [r7, #84] @ 0x54
8003b96: 695a ldr r2, [r3, #20]
8003b98: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8003b9c: 441a add r2, r3
8003b9e: 6d7b ldr r3, [r7, #84] @ 0x54
8003ba0: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8003ba2: 6d7b ldr r3, [r7, #84] @ 0x54
8003ba4: 69da ldr r2, [r3, #28]
8003ba6: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8003baa: 441a add r2, r3
8003bac: 6d7b ldr r3, [r7, #84] @ 0x54
8003bae: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8003bb0: 687b ldr r3, [r7, #4]
8003bb2: 681b ldr r3, [r3, #0]
8003bb4: 6d79 ldr r1, [r7, #84] @ 0x54
8003bb6: 4618 mov r0, r3
8003bb8: f002 ff84 bl 8006ac4 <USB_EPStartXfer>
8003bbc: e006 b.n 8003bcc <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8003bbe: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8003bc2: 461a mov r2, r3
8003bc4: 6d79 ldr r1, [r7, #84] @ 0x54
8003bc6: 6878 ldr r0, [r7, #4]
8003bc8: f000 f91b bl 8003e02 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8003bcc: 687b ldr r3, [r7, #4]
8003bce: 681b ldr r3, [r3, #0]
8003bd0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8003bd4: b29b uxth r3, r3
8003bd6: b21b sxth r3, r3
8003bd8: 2b00 cmp r3, #0
8003bda: f6ff ac3b blt.w 8003454 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8003bde: 2300 movs r3, #0
}
8003be0: 4618 mov r0, r3
8003be2: 3758 adds r7, #88 @ 0x58
8003be4: 46bd mov sp, r7
8003be6: bd80 pop {r7, pc}
08003be8 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8003be8: b580 push {r7, lr}
8003bea: b088 sub sp, #32
8003bec: af00 add r7, sp, #0
8003bee: 60f8 str r0, [r7, #12]
8003bf0: 60b9 str r1, [r7, #8]
8003bf2: 4613 mov r3, r2
8003bf4: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8003bf6: 88fb ldrh r3, [r7, #6]
8003bf8: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003bfc: 2b00 cmp r3, #0
8003bfe: d07e beq.n 8003cfe <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8003c00: 68fb ldr r3, [r7, #12]
8003c02: 681b ldr r3, [r3, #0]
8003c04: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003c08: b29b uxth r3, r3
8003c0a: 461a mov r2, r3
8003c0c: 68bb ldr r3, [r7, #8]
8003c0e: 781b ldrb r3, [r3, #0]
8003c10: 00db lsls r3, r3, #3
8003c12: 4413 add r3, r2
8003c14: 3302 adds r3, #2
8003c16: 005b lsls r3, r3, #1
8003c18: 68fa ldr r2, [r7, #12]
8003c1a: 6812 ldr r2, [r2, #0]
8003c1c: 4413 add r3, r2
8003c1e: f503 6380 add.w r3, r3, #1024 @ 0x400
8003c22: 881b ldrh r3, [r3, #0]
8003c24: f3c3 0309 ubfx r3, r3, #0, #10
8003c28: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8003c2a: 68bb ldr r3, [r7, #8]
8003c2c: 699a ldr r2, [r3, #24]
8003c2e: 8b7b ldrh r3, [r7, #26]
8003c30: 429a cmp r2, r3
8003c32: d306 bcc.n 8003c42 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8003c34: 68bb ldr r3, [r7, #8]
8003c36: 699a ldr r2, [r3, #24]
8003c38: 8b7b ldrh r3, [r7, #26]
8003c3a: 1ad2 subs r2, r2, r3
8003c3c: 68bb ldr r3, [r7, #8]
8003c3e: 619a str r2, [r3, #24]
8003c40: e002 b.n 8003c48 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
8003c42: 68bb ldr r3, [r7, #8]
8003c44: 2200 movs r2, #0
8003c46: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8003c48: 68bb ldr r3, [r7, #8]
8003c4a: 699b ldr r3, [r3, #24]
8003c4c: 2b00 cmp r3, #0
8003c4e: d123 bne.n 8003c98 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8003c50: 68fb ldr r3, [r7, #12]
8003c52: 681b ldr r3, [r3, #0]
8003c54: 461a mov r2, r3
8003c56: 68bb ldr r3, [r7, #8]
8003c58: 781b ldrb r3, [r3, #0]
8003c5a: 009b lsls r3, r3, #2
8003c5c: 4413 add r3, r2
8003c5e: 881b ldrh r3, [r3, #0]
8003c60: b29b uxth r3, r3
8003c62: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8003c66: f023 0370 bic.w r3, r3, #112 @ 0x70
8003c6a: 833b strh r3, [r7, #24]
8003c6c: 8b3b ldrh r3, [r7, #24]
8003c6e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8003c72: 833b strh r3, [r7, #24]
8003c74: 68fb ldr r3, [r7, #12]
8003c76: 681b ldr r3, [r3, #0]
8003c78: 461a mov r2, r3
8003c7a: 68bb ldr r3, [r7, #8]
8003c7c: 781b ldrb r3, [r3, #0]
8003c7e: 009b lsls r3, r3, #2
8003c80: 441a add r2, r3
8003c82: 8b3b ldrh r3, [r7, #24]
8003c84: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003c88: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003c8c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003c90: f043 0380 orr.w r3, r3, #128 @ 0x80
8003c94: b29b uxth r3, r3
8003c96: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8003c98: 88fb ldrh r3, [r7, #6]
8003c9a: f003 0340 and.w r3, r3, #64 @ 0x40
8003c9e: 2b00 cmp r3, #0
8003ca0: d01f beq.n 8003ce2 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8003ca2: 68fb ldr r3, [r7, #12]
8003ca4: 681b ldr r3, [r3, #0]
8003ca6: 461a mov r2, r3
8003ca8: 68bb ldr r3, [r7, #8]
8003caa: 781b ldrb r3, [r3, #0]
8003cac: 009b lsls r3, r3, #2
8003cae: 4413 add r3, r2
8003cb0: 881b ldrh r3, [r3, #0]
8003cb2: b29b uxth r3, r3
8003cb4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003cb8: f023 0370 bic.w r3, r3, #112 @ 0x70
8003cbc: 82fb strh r3, [r7, #22]
8003cbe: 68fb ldr r3, [r7, #12]
8003cc0: 681b ldr r3, [r3, #0]
8003cc2: 461a mov r2, r3
8003cc4: 68bb ldr r3, [r7, #8]
8003cc6: 781b ldrb r3, [r3, #0]
8003cc8: 009b lsls r3, r3, #2
8003cca: 441a add r2, r3
8003ccc: 8afb ldrh r3, [r7, #22]
8003cce: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003cd2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003cd6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003cda: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8003cde: b29b uxth r3, r3
8003ce0: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8003ce2: 8b7b ldrh r3, [r7, #26]
8003ce4: 2b00 cmp r3, #0
8003ce6: f000 8087 beq.w 8003df8 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8003cea: 68fb ldr r3, [r7, #12]
8003cec: 6818 ldr r0, [r3, #0]
8003cee: 68bb ldr r3, [r7, #8]
8003cf0: 6959 ldr r1, [r3, #20]
8003cf2: 68bb ldr r3, [r7, #8]
8003cf4: 891a ldrh r2, [r3, #8]
8003cf6: 8b7b ldrh r3, [r7, #26]
8003cf8: f004 fc19 bl 800852e <USB_ReadPMA>
8003cfc: e07c b.n 8003df8 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8003cfe: 68fb ldr r3, [r7, #12]
8003d00: 681b ldr r3, [r3, #0]
8003d02: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003d06: b29b uxth r3, r3
8003d08: 461a mov r2, r3
8003d0a: 68bb ldr r3, [r7, #8]
8003d0c: 781b ldrb r3, [r3, #0]
8003d0e: 00db lsls r3, r3, #3
8003d10: 4413 add r3, r2
8003d12: 3306 adds r3, #6
8003d14: 005b lsls r3, r3, #1
8003d16: 68fa ldr r2, [r7, #12]
8003d18: 6812 ldr r2, [r2, #0]
8003d1a: 4413 add r3, r2
8003d1c: f503 6380 add.w r3, r3, #1024 @ 0x400
8003d20: 881b ldrh r3, [r3, #0]
8003d22: f3c3 0309 ubfx r3, r3, #0, #10
8003d26: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8003d28: 68bb ldr r3, [r7, #8]
8003d2a: 699a ldr r2, [r3, #24]
8003d2c: 8b7b ldrh r3, [r7, #26]
8003d2e: 429a cmp r2, r3
8003d30: d306 bcc.n 8003d40 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
8003d32: 68bb ldr r3, [r7, #8]
8003d34: 699a ldr r2, [r3, #24]
8003d36: 8b7b ldrh r3, [r7, #26]
8003d38: 1ad2 subs r2, r2, r3
8003d3a: 68bb ldr r3, [r7, #8]
8003d3c: 619a str r2, [r3, #24]
8003d3e: e002 b.n 8003d46 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
8003d40: 68bb ldr r3, [r7, #8]
8003d42: 2200 movs r2, #0
8003d44: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8003d46: 68bb ldr r3, [r7, #8]
8003d48: 699b ldr r3, [r3, #24]
8003d4a: 2b00 cmp r3, #0
8003d4c: d123 bne.n 8003d96 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8003d4e: 68fb ldr r3, [r7, #12]
8003d50: 681b ldr r3, [r3, #0]
8003d52: 461a mov r2, r3
8003d54: 68bb ldr r3, [r7, #8]
8003d56: 781b ldrb r3, [r3, #0]
8003d58: 009b lsls r3, r3, #2
8003d5a: 4413 add r3, r2
8003d5c: 881b ldrh r3, [r3, #0]
8003d5e: b29b uxth r3, r3
8003d60: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8003d64: f023 0370 bic.w r3, r3, #112 @ 0x70
8003d68: 83fb strh r3, [r7, #30]
8003d6a: 8bfb ldrh r3, [r7, #30]
8003d6c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8003d70: 83fb strh r3, [r7, #30]
8003d72: 68fb ldr r3, [r7, #12]
8003d74: 681b ldr r3, [r3, #0]
8003d76: 461a mov r2, r3
8003d78: 68bb ldr r3, [r7, #8]
8003d7a: 781b ldrb r3, [r3, #0]
8003d7c: 009b lsls r3, r3, #2
8003d7e: 441a add r2, r3
8003d80: 8bfb ldrh r3, [r7, #30]
8003d82: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003d86: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003d8a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003d8e: f043 0380 orr.w r3, r3, #128 @ 0x80
8003d92: b29b uxth r3, r3
8003d94: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8003d96: 88fb ldrh r3, [r7, #6]
8003d98: f003 0340 and.w r3, r3, #64 @ 0x40
8003d9c: 2b00 cmp r3, #0
8003d9e: d11f bne.n 8003de0 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8003da0: 68fb ldr r3, [r7, #12]
8003da2: 681b ldr r3, [r3, #0]
8003da4: 461a mov r2, r3
8003da6: 68bb ldr r3, [r7, #8]
8003da8: 781b ldrb r3, [r3, #0]
8003daa: 009b lsls r3, r3, #2
8003dac: 4413 add r3, r2
8003dae: 881b ldrh r3, [r3, #0]
8003db0: b29b uxth r3, r3
8003db2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003db6: f023 0370 bic.w r3, r3, #112 @ 0x70
8003dba: 83bb strh r3, [r7, #28]
8003dbc: 68fb ldr r3, [r7, #12]
8003dbe: 681b ldr r3, [r3, #0]
8003dc0: 461a mov r2, r3
8003dc2: 68bb ldr r3, [r7, #8]
8003dc4: 781b ldrb r3, [r3, #0]
8003dc6: 009b lsls r3, r3, #2
8003dc8: 441a add r2, r3
8003dca: 8bbb ldrh r3, [r7, #28]
8003dcc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003dd0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003dd4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003dd8: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8003ddc: b29b uxth r3, r3
8003dde: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8003de0: 8b7b ldrh r3, [r7, #26]
8003de2: 2b00 cmp r3, #0
8003de4: d008 beq.n 8003df8 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8003de6: 68fb ldr r3, [r7, #12]
8003de8: 6818 ldr r0, [r3, #0]
8003dea: 68bb ldr r3, [r7, #8]
8003dec: 6959 ldr r1, [r3, #20]
8003dee: 68bb ldr r3, [r7, #8]
8003df0: 895a ldrh r2, [r3, #10]
8003df2: 8b7b ldrh r3, [r7, #26]
8003df4: f004 fb9b bl 800852e <USB_ReadPMA>
}
}
return count;
8003df8: 8b7b ldrh r3, [r7, #26]
}
8003dfa: 4618 mov r0, r3
8003dfc: 3720 adds r7, #32
8003dfe: 46bd mov sp, r7
8003e00: bd80 pop {r7, pc}
08003e02 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8003e02: b580 push {r7, lr}
8003e04: b0a4 sub sp, #144 @ 0x90
8003e06: af00 add r7, sp, #0
8003e08: 60f8 str r0, [r7, #12]
8003e0a: 60b9 str r1, [r7, #8]
8003e0c: 4613 mov r3, r2
8003e0e: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8003e10: 88fb ldrh r3, [r7, #6]
8003e12: f003 0340 and.w r3, r3, #64 @ 0x40
8003e16: 2b00 cmp r3, #0
8003e18: f000 81dd beq.w 80041d6 <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8003e1c: 68fb ldr r3, [r7, #12]
8003e1e: 681b ldr r3, [r3, #0]
8003e20: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003e24: b29b uxth r3, r3
8003e26: 461a mov r2, r3
8003e28: 68bb ldr r3, [r7, #8]
8003e2a: 781b ldrb r3, [r3, #0]
8003e2c: 00db lsls r3, r3, #3
8003e2e: 4413 add r3, r2
8003e30: 3302 adds r3, #2
8003e32: 005b lsls r3, r3, #1
8003e34: 68fa ldr r2, [r7, #12]
8003e36: 6812 ldr r2, [r2, #0]
8003e38: 4413 add r3, r2
8003e3a: f503 6380 add.w r3, r3, #1024 @ 0x400
8003e3e: 881b ldrh r3, [r3, #0]
8003e40: f3c3 0309 ubfx r3, r3, #0, #10
8003e44: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8003e48: 68bb ldr r3, [r7, #8]
8003e4a: 699a ldr r2, [r3, #24]
8003e4c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003e50: 429a cmp r2, r3
8003e52: d907 bls.n 8003e64 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8003e54: 68bb ldr r3, [r7, #8]
8003e56: 699a ldr r2, [r3, #24]
8003e58: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003e5c: 1ad2 subs r2, r2, r3
8003e5e: 68bb ldr r3, [r7, #8]
8003e60: 619a str r2, [r3, #24]
8003e62: e002 b.n 8003e6a <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8003e64: 68bb ldr r3, [r7, #8]
8003e66: 2200 movs r2, #0
8003e68: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8003e6a: 68bb ldr r3, [r7, #8]
8003e6c: 699b ldr r3, [r3, #24]
8003e6e: 2b00 cmp r3, #0
8003e70: f040 80b9 bne.w 8003fe6 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8003e74: 68bb ldr r3, [r7, #8]
8003e76: 785b ldrb r3, [r3, #1]
8003e78: 2b00 cmp r3, #0
8003e7a: d126 bne.n 8003eca <HAL_PCD_EP_DB_Transmit+0xc8>
8003e7c: 68fb ldr r3, [r7, #12]
8003e7e: 681b ldr r3, [r3, #0]
8003e80: 62fb str r3, [r7, #44] @ 0x2c
8003e82: 68fb ldr r3, [r7, #12]
8003e84: 681b ldr r3, [r3, #0]
8003e86: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003e8a: b29b uxth r3, r3
8003e8c: 461a mov r2, r3
8003e8e: 6afb ldr r3, [r7, #44] @ 0x2c
8003e90: 4413 add r3, r2
8003e92: 62fb str r3, [r7, #44] @ 0x2c
8003e94: 68bb ldr r3, [r7, #8]
8003e96: 781b ldrb r3, [r3, #0]
8003e98: 011a lsls r2, r3, #4
8003e9a: 6afb ldr r3, [r7, #44] @ 0x2c
8003e9c: 4413 add r3, r2
8003e9e: f203 4304 addw r3, r3, #1028 @ 0x404
8003ea2: 62bb str r3, [r7, #40] @ 0x28
8003ea4: 6abb ldr r3, [r7, #40] @ 0x28
8003ea6: 881b ldrh r3, [r3, #0]
8003ea8: b29b uxth r3, r3
8003eaa: f3c3 0309 ubfx r3, r3, #0, #10
8003eae: b29a uxth r2, r3
8003eb0: 6abb ldr r3, [r7, #40] @ 0x28
8003eb2: 801a strh r2, [r3, #0]
8003eb4: 6abb ldr r3, [r7, #40] @ 0x28
8003eb6: 881b ldrh r3, [r3, #0]
8003eb8: b29b uxth r3, r3
8003eba: ea6f 4343 mvn.w r3, r3, lsl #17
8003ebe: ea6f 4353 mvn.w r3, r3, lsr #17
8003ec2: b29a uxth r2, r3
8003ec4: 6abb ldr r3, [r7, #40] @ 0x28
8003ec6: 801a strh r2, [r3, #0]
8003ec8: e01a b.n 8003f00 <HAL_PCD_EP_DB_Transmit+0xfe>
8003eca: 68bb ldr r3, [r7, #8]
8003ecc: 785b ldrb r3, [r3, #1]
8003ece: 2b01 cmp r3, #1
8003ed0: d116 bne.n 8003f00 <HAL_PCD_EP_DB_Transmit+0xfe>
8003ed2: 68fb ldr r3, [r7, #12]
8003ed4: 681b ldr r3, [r3, #0]
8003ed6: 637b str r3, [r7, #52] @ 0x34
8003ed8: 68fb ldr r3, [r7, #12]
8003eda: 681b ldr r3, [r3, #0]
8003edc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003ee0: b29b uxth r3, r3
8003ee2: 461a mov r2, r3
8003ee4: 6b7b ldr r3, [r7, #52] @ 0x34
8003ee6: 4413 add r3, r2
8003ee8: 637b str r3, [r7, #52] @ 0x34
8003eea: 68bb ldr r3, [r7, #8]
8003eec: 781b ldrb r3, [r3, #0]
8003eee: 011a lsls r2, r3, #4
8003ef0: 6b7b ldr r3, [r7, #52] @ 0x34
8003ef2: 4413 add r3, r2
8003ef4: f203 4304 addw r3, r3, #1028 @ 0x404
8003ef8: 633b str r3, [r7, #48] @ 0x30
8003efa: 6b3b ldr r3, [r7, #48] @ 0x30
8003efc: 2200 movs r2, #0
8003efe: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8003f00: 68fb ldr r3, [r7, #12]
8003f02: 681b ldr r3, [r3, #0]
8003f04: 627b str r3, [r7, #36] @ 0x24
8003f06: 68bb ldr r3, [r7, #8]
8003f08: 785b ldrb r3, [r3, #1]
8003f0a: 2b00 cmp r3, #0
8003f0c: d126 bne.n 8003f5c <HAL_PCD_EP_DB_Transmit+0x15a>
8003f0e: 68fb ldr r3, [r7, #12]
8003f10: 681b ldr r3, [r3, #0]
8003f12: 61fb str r3, [r7, #28]
8003f14: 68fb ldr r3, [r7, #12]
8003f16: 681b ldr r3, [r3, #0]
8003f18: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003f1c: b29b uxth r3, r3
8003f1e: 461a mov r2, r3
8003f20: 69fb ldr r3, [r7, #28]
8003f22: 4413 add r3, r2
8003f24: 61fb str r3, [r7, #28]
8003f26: 68bb ldr r3, [r7, #8]
8003f28: 781b ldrb r3, [r3, #0]
8003f2a: 011a lsls r2, r3, #4
8003f2c: 69fb ldr r3, [r7, #28]
8003f2e: 4413 add r3, r2
8003f30: f203 430c addw r3, r3, #1036 @ 0x40c
8003f34: 61bb str r3, [r7, #24]
8003f36: 69bb ldr r3, [r7, #24]
8003f38: 881b ldrh r3, [r3, #0]
8003f3a: b29b uxth r3, r3
8003f3c: f3c3 0309 ubfx r3, r3, #0, #10
8003f40: b29a uxth r2, r3
8003f42: 69bb ldr r3, [r7, #24]
8003f44: 801a strh r2, [r3, #0]
8003f46: 69bb ldr r3, [r7, #24]
8003f48: 881b ldrh r3, [r3, #0]
8003f4a: b29b uxth r3, r3
8003f4c: ea6f 4343 mvn.w r3, r3, lsl #17
8003f50: ea6f 4353 mvn.w r3, r3, lsr #17
8003f54: b29a uxth r2, r3
8003f56: 69bb ldr r3, [r7, #24]
8003f58: 801a strh r2, [r3, #0]
8003f5a: e017 b.n 8003f8c <HAL_PCD_EP_DB_Transmit+0x18a>
8003f5c: 68bb ldr r3, [r7, #8]
8003f5e: 785b ldrb r3, [r3, #1]
8003f60: 2b01 cmp r3, #1
8003f62: d113 bne.n 8003f8c <HAL_PCD_EP_DB_Transmit+0x18a>
8003f64: 68fb ldr r3, [r7, #12]
8003f66: 681b ldr r3, [r3, #0]
8003f68: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003f6c: b29b uxth r3, r3
8003f6e: 461a mov r2, r3
8003f70: 6a7b ldr r3, [r7, #36] @ 0x24
8003f72: 4413 add r3, r2
8003f74: 627b str r3, [r7, #36] @ 0x24
8003f76: 68bb ldr r3, [r7, #8]
8003f78: 781b ldrb r3, [r3, #0]
8003f7a: 011a lsls r2, r3, #4
8003f7c: 6a7b ldr r3, [r7, #36] @ 0x24
8003f7e: 4413 add r3, r2
8003f80: f203 430c addw r3, r3, #1036 @ 0x40c
8003f84: 623b str r3, [r7, #32]
8003f86: 6a3b ldr r3, [r7, #32]
8003f88: 2200 movs r2, #0
8003f8a: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8003f8c: 68bb ldr r3, [r7, #8]
8003f8e: 781b ldrb r3, [r3, #0]
8003f90: 4619 mov r1, r3
8003f92: 68f8 ldr r0, [r7, #12]
8003f94: f006 f949 bl 800a22a <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8003f98: 88fb ldrh r3, [r7, #6]
8003f9a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003f9e: 2b00 cmp r3, #0
8003fa0: f000 82fc beq.w 800459c <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8003fa4: 68fb ldr r3, [r7, #12]
8003fa6: 681b ldr r3, [r3, #0]
8003fa8: 461a mov r2, r3
8003faa: 68bb ldr r3, [r7, #8]
8003fac: 781b ldrb r3, [r3, #0]
8003fae: 009b lsls r3, r3, #2
8003fb0: 4413 add r3, r2
8003fb2: 881b ldrh r3, [r3, #0]
8003fb4: b29b uxth r3, r3
8003fb6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003fba: f023 0370 bic.w r3, r3, #112 @ 0x70
8003fbe: 82fb strh r3, [r7, #22]
8003fc0: 68fb ldr r3, [r7, #12]
8003fc2: 681b ldr r3, [r3, #0]
8003fc4: 461a mov r2, r3
8003fc6: 68bb ldr r3, [r7, #8]
8003fc8: 781b ldrb r3, [r3, #0]
8003fca: 009b lsls r3, r3, #2
8003fcc: 441a add r2, r3
8003fce: 8afb ldrh r3, [r7, #22]
8003fd0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003fd4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003fd8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8003fdc: f043 0380 orr.w r3, r3, #128 @ 0x80
8003fe0: b29b uxth r3, r3
8003fe2: 8013 strh r3, [r2, #0]
8003fe4: e2da b.n 800459c <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8003fe6: 88fb ldrh r3, [r7, #6]
8003fe8: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003fec: 2b00 cmp r3, #0
8003fee: d021 beq.n 8004034 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8003ff0: 68fb ldr r3, [r7, #12]
8003ff2: 681b ldr r3, [r3, #0]
8003ff4: 461a mov r2, r3
8003ff6: 68bb ldr r3, [r7, #8]
8003ff8: 781b ldrb r3, [r3, #0]
8003ffa: 009b lsls r3, r3, #2
8003ffc: 4413 add r3, r2
8003ffe: 881b ldrh r3, [r3, #0]
8004000: b29b uxth r3, r3
8004002: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004006: f023 0370 bic.w r3, r3, #112 @ 0x70
800400a: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800400e: 68fb ldr r3, [r7, #12]
8004010: 681b ldr r3, [r3, #0]
8004012: 461a mov r2, r3
8004014: 68bb ldr r3, [r7, #8]
8004016: 781b ldrb r3, [r3, #0]
8004018: 009b lsls r3, r3, #2
800401a: 441a add r2, r3
800401c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8004020: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004024: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004028: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800402c: f043 0380 orr.w r3, r3, #128 @ 0x80
8004030: b29b uxth r3, r3
8004032: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8004034: 68bb ldr r3, [r7, #8]
8004036: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
800403a: 2b01 cmp r3, #1
800403c: f040 82ae bne.w 800459c <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8004040: 68bb ldr r3, [r7, #8]
8004042: 695a ldr r2, [r3, #20]
8004044: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8004048: 441a add r2, r3
800404a: 68bb ldr r3, [r7, #8]
800404c: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
800404e: 68bb ldr r3, [r7, #8]
8004050: 69da ldr r2, [r3, #28]
8004052: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8004056: 441a add r2, r3
8004058: 68bb ldr r3, [r7, #8]
800405a: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
800405c: 68bb ldr r3, [r7, #8]
800405e: 6a1a ldr r2, [r3, #32]
8004060: 68bb ldr r3, [r7, #8]
8004062: 691b ldr r3, [r3, #16]
8004064: 429a cmp r2, r3
8004066: d30b bcc.n 8004080 <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8004068: 68bb ldr r3, [r7, #8]
800406a: 691b ldr r3, [r3, #16]
800406c: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8004070: 68bb ldr r3, [r7, #8]
8004072: 6a1a ldr r2, [r3, #32]
8004074: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004078: 1ad2 subs r2, r2, r3
800407a: 68bb ldr r3, [r7, #8]
800407c: 621a str r2, [r3, #32]
800407e: e017 b.n 80040b0 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8004080: 68bb ldr r3, [r7, #8]
8004082: 6a1b ldr r3, [r3, #32]
8004084: 2b00 cmp r3, #0
8004086: d108 bne.n 800409a <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8004088: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800408c: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8004090: 68bb ldr r3, [r7, #8]
8004092: 2200 movs r2, #0
8004094: f883 2024 strb.w r2, [r3, #36] @ 0x24
8004098: e00a b.n 80040b0 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
800409a: 68bb ldr r3, [r7, #8]
800409c: 2200 movs r2, #0
800409e: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
80040a2: 68bb ldr r3, [r7, #8]
80040a4: 6a1b ldr r3, [r3, #32]
80040a6: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
80040aa: 68bb ldr r3, [r7, #8]
80040ac: 2200 movs r2, #0
80040ae: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
80040b0: 68bb ldr r3, [r7, #8]
80040b2: 785b ldrb r3, [r3, #1]
80040b4: 2b00 cmp r3, #0
80040b6: d165 bne.n 8004184 <HAL_PCD_EP_DB_Transmit+0x382>
80040b8: 68fb ldr r3, [r7, #12]
80040ba: 681b ldr r3, [r3, #0]
80040bc: 63fb str r3, [r7, #60] @ 0x3c
80040be: 68fb ldr r3, [r7, #12]
80040c0: 681b ldr r3, [r3, #0]
80040c2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80040c6: b29b uxth r3, r3
80040c8: 461a mov r2, r3
80040ca: 6bfb ldr r3, [r7, #60] @ 0x3c
80040cc: 4413 add r3, r2
80040ce: 63fb str r3, [r7, #60] @ 0x3c
80040d0: 68bb ldr r3, [r7, #8]
80040d2: 781b ldrb r3, [r3, #0]
80040d4: 011a lsls r2, r3, #4
80040d6: 6bfb ldr r3, [r7, #60] @ 0x3c
80040d8: 4413 add r3, r2
80040da: f203 4304 addw r3, r3, #1028 @ 0x404
80040de: 63bb str r3, [r7, #56] @ 0x38
80040e0: 6bbb ldr r3, [r7, #56] @ 0x38
80040e2: 881b ldrh r3, [r3, #0]
80040e4: b29b uxth r3, r3
80040e6: f3c3 0309 ubfx r3, r3, #0, #10
80040ea: b29a uxth r2, r3
80040ec: 6bbb ldr r3, [r7, #56] @ 0x38
80040ee: 801a strh r2, [r3, #0]
80040f0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80040f4: 2b3e cmp r3, #62 @ 0x3e
80040f6: d91d bls.n 8004134 <HAL_PCD_EP_DB_Transmit+0x332>
80040f8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80040fc: 095b lsrs r3, r3, #5
80040fe: 64bb str r3, [r7, #72] @ 0x48
8004100: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004104: f003 031f and.w r3, r3, #31
8004108: 2b00 cmp r3, #0
800410a: d102 bne.n 8004112 <HAL_PCD_EP_DB_Transmit+0x310>
800410c: 6cbb ldr r3, [r7, #72] @ 0x48
800410e: 3b01 subs r3, #1
8004110: 64bb str r3, [r7, #72] @ 0x48
8004112: 6bbb ldr r3, [r7, #56] @ 0x38
8004114: 881b ldrh r3, [r3, #0]
8004116: b29a uxth r2, r3
8004118: 6cbb ldr r3, [r7, #72] @ 0x48
800411a: b29b uxth r3, r3
800411c: 029b lsls r3, r3, #10
800411e: b29b uxth r3, r3
8004120: 4313 orrs r3, r2
8004122: b29b uxth r3, r3
8004124: ea6f 4343 mvn.w r3, r3, lsl #17
8004128: ea6f 4353 mvn.w r3, r3, lsr #17
800412c: b29a uxth r2, r3
800412e: 6bbb ldr r3, [r7, #56] @ 0x38
8004130: 801a strh r2, [r3, #0]
8004132: e044 b.n 80041be <HAL_PCD_EP_DB_Transmit+0x3bc>
8004134: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004138: 2b00 cmp r3, #0
800413a: d10a bne.n 8004152 <HAL_PCD_EP_DB_Transmit+0x350>
800413c: 6bbb ldr r3, [r7, #56] @ 0x38
800413e: 881b ldrh r3, [r3, #0]
8004140: b29b uxth r3, r3
8004142: ea6f 4343 mvn.w r3, r3, lsl #17
8004146: ea6f 4353 mvn.w r3, r3, lsr #17
800414a: b29a uxth r2, r3
800414c: 6bbb ldr r3, [r7, #56] @ 0x38
800414e: 801a strh r2, [r3, #0]
8004150: e035 b.n 80041be <HAL_PCD_EP_DB_Transmit+0x3bc>
8004152: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004156: 085b lsrs r3, r3, #1
8004158: 64bb str r3, [r7, #72] @ 0x48
800415a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800415e: f003 0301 and.w r3, r3, #1
8004162: 2b00 cmp r3, #0
8004164: d002 beq.n 800416c <HAL_PCD_EP_DB_Transmit+0x36a>
8004166: 6cbb ldr r3, [r7, #72] @ 0x48
8004168: 3301 adds r3, #1
800416a: 64bb str r3, [r7, #72] @ 0x48
800416c: 6bbb ldr r3, [r7, #56] @ 0x38
800416e: 881b ldrh r3, [r3, #0]
8004170: b29a uxth r2, r3
8004172: 6cbb ldr r3, [r7, #72] @ 0x48
8004174: b29b uxth r3, r3
8004176: 029b lsls r3, r3, #10
8004178: b29b uxth r3, r3
800417a: 4313 orrs r3, r2
800417c: b29a uxth r2, r3
800417e: 6bbb ldr r3, [r7, #56] @ 0x38
8004180: 801a strh r2, [r3, #0]
8004182: e01c b.n 80041be <HAL_PCD_EP_DB_Transmit+0x3bc>
8004184: 68bb ldr r3, [r7, #8]
8004186: 785b ldrb r3, [r3, #1]
8004188: 2b01 cmp r3, #1
800418a: d118 bne.n 80041be <HAL_PCD_EP_DB_Transmit+0x3bc>
800418c: 68fb ldr r3, [r7, #12]
800418e: 681b ldr r3, [r3, #0]
8004190: 647b str r3, [r7, #68] @ 0x44
8004192: 68fb ldr r3, [r7, #12]
8004194: 681b ldr r3, [r3, #0]
8004196: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800419a: b29b uxth r3, r3
800419c: 461a mov r2, r3
800419e: 6c7b ldr r3, [r7, #68] @ 0x44
80041a0: 4413 add r3, r2
80041a2: 647b str r3, [r7, #68] @ 0x44
80041a4: 68bb ldr r3, [r7, #8]
80041a6: 781b ldrb r3, [r3, #0]
80041a8: 011a lsls r2, r3, #4
80041aa: 6c7b ldr r3, [r7, #68] @ 0x44
80041ac: 4413 add r3, r2
80041ae: f203 4304 addw r3, r3, #1028 @ 0x404
80041b2: 643b str r3, [r7, #64] @ 0x40
80041b4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80041b8: b29a uxth r2, r3
80041ba: 6c3b ldr r3, [r7, #64] @ 0x40
80041bc: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
80041be: 68fb ldr r3, [r7, #12]
80041c0: 6818 ldr r0, [r3, #0]
80041c2: 68bb ldr r3, [r7, #8]
80041c4: 6959 ldr r1, [r3, #20]
80041c6: 68bb ldr r3, [r7, #8]
80041c8: 891a ldrh r2, [r3, #8]
80041ca: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80041ce: b29b uxth r3, r3
80041d0: f004 f967 bl 80084a2 <USB_WritePMA>
80041d4: e1e2 b.n 800459c <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80041d6: 68fb ldr r3, [r7, #12]
80041d8: 681b ldr r3, [r3, #0]
80041da: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80041de: b29b uxth r3, r3
80041e0: 461a mov r2, r3
80041e2: 68bb ldr r3, [r7, #8]
80041e4: 781b ldrb r3, [r3, #0]
80041e6: 00db lsls r3, r3, #3
80041e8: 4413 add r3, r2
80041ea: 3306 adds r3, #6
80041ec: 005b lsls r3, r3, #1
80041ee: 68fa ldr r2, [r7, #12]
80041f0: 6812 ldr r2, [r2, #0]
80041f2: 4413 add r3, r2
80041f4: f503 6380 add.w r3, r3, #1024 @ 0x400
80041f8: 881b ldrh r3, [r3, #0]
80041fa: f3c3 0309 ubfx r3, r3, #0, #10
80041fe: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8004202: 68bb ldr r3, [r7, #8]
8004204: 699a ldr r2, [r3, #24]
8004206: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800420a: 429a cmp r2, r3
800420c: d307 bcc.n 800421e <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
800420e: 68bb ldr r3, [r7, #8]
8004210: 699a ldr r2, [r3, #24]
8004212: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8004216: 1ad2 subs r2, r2, r3
8004218: 68bb ldr r3, [r7, #8]
800421a: 619a str r2, [r3, #24]
800421c: e002 b.n 8004224 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
800421e: 68bb ldr r3, [r7, #8]
8004220: 2200 movs r2, #0
8004222: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8004224: 68bb ldr r3, [r7, #8]
8004226: 699b ldr r3, [r3, #24]
8004228: 2b00 cmp r3, #0
800422a: f040 80c0 bne.w 80043ae <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800422e: 68bb ldr r3, [r7, #8]
8004230: 785b ldrb r3, [r3, #1]
8004232: 2b00 cmp r3, #0
8004234: d126 bne.n 8004284 <HAL_PCD_EP_DB_Transmit+0x482>
8004236: 68fb ldr r3, [r7, #12]
8004238: 681b ldr r3, [r3, #0]
800423a: 67fb str r3, [r7, #124] @ 0x7c
800423c: 68fb ldr r3, [r7, #12]
800423e: 681b ldr r3, [r3, #0]
8004240: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004244: b29b uxth r3, r3
8004246: 461a mov r2, r3
8004248: 6ffb ldr r3, [r7, #124] @ 0x7c
800424a: 4413 add r3, r2
800424c: 67fb str r3, [r7, #124] @ 0x7c
800424e: 68bb ldr r3, [r7, #8]
8004250: 781b ldrb r3, [r3, #0]
8004252: 011a lsls r2, r3, #4
8004254: 6ffb ldr r3, [r7, #124] @ 0x7c
8004256: 4413 add r3, r2
8004258: f203 4304 addw r3, r3, #1028 @ 0x404
800425c: 67bb str r3, [r7, #120] @ 0x78
800425e: 6fbb ldr r3, [r7, #120] @ 0x78
8004260: 881b ldrh r3, [r3, #0]
8004262: b29b uxth r3, r3
8004264: f3c3 0309 ubfx r3, r3, #0, #10
8004268: b29a uxth r2, r3
800426a: 6fbb ldr r3, [r7, #120] @ 0x78
800426c: 801a strh r2, [r3, #0]
800426e: 6fbb ldr r3, [r7, #120] @ 0x78
8004270: 881b ldrh r3, [r3, #0]
8004272: b29b uxth r3, r3
8004274: ea6f 4343 mvn.w r3, r3, lsl #17
8004278: ea6f 4353 mvn.w r3, r3, lsr #17
800427c: b29a uxth r2, r3
800427e: 6fbb ldr r3, [r7, #120] @ 0x78
8004280: 801a strh r2, [r3, #0]
8004282: e01a b.n 80042ba <HAL_PCD_EP_DB_Transmit+0x4b8>
8004284: 68bb ldr r3, [r7, #8]
8004286: 785b ldrb r3, [r3, #1]
8004288: 2b01 cmp r3, #1
800428a: d116 bne.n 80042ba <HAL_PCD_EP_DB_Transmit+0x4b8>
800428c: 68fb ldr r3, [r7, #12]
800428e: 681b ldr r3, [r3, #0]
8004290: 667b str r3, [r7, #100] @ 0x64
8004292: 68fb ldr r3, [r7, #12]
8004294: 681b ldr r3, [r3, #0]
8004296: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800429a: b29b uxth r3, r3
800429c: 461a mov r2, r3
800429e: 6e7b ldr r3, [r7, #100] @ 0x64
80042a0: 4413 add r3, r2
80042a2: 667b str r3, [r7, #100] @ 0x64
80042a4: 68bb ldr r3, [r7, #8]
80042a6: 781b ldrb r3, [r3, #0]
80042a8: 011a lsls r2, r3, #4
80042aa: 6e7b ldr r3, [r7, #100] @ 0x64
80042ac: 4413 add r3, r2
80042ae: f203 4304 addw r3, r3, #1028 @ 0x404
80042b2: 663b str r3, [r7, #96] @ 0x60
80042b4: 6e3b ldr r3, [r7, #96] @ 0x60
80042b6: 2200 movs r2, #0
80042b8: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80042ba: 68fb ldr r3, [r7, #12]
80042bc: 681b ldr r3, [r3, #0]
80042be: 677b str r3, [r7, #116] @ 0x74
80042c0: 68bb ldr r3, [r7, #8]
80042c2: 785b ldrb r3, [r3, #1]
80042c4: 2b00 cmp r3, #0
80042c6: d12b bne.n 8004320 <HAL_PCD_EP_DB_Transmit+0x51e>
80042c8: 68fb ldr r3, [r7, #12]
80042ca: 681b ldr r3, [r3, #0]
80042cc: 66fb str r3, [r7, #108] @ 0x6c
80042ce: 68fb ldr r3, [r7, #12]
80042d0: 681b ldr r3, [r3, #0]
80042d2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80042d6: b29b uxth r3, r3
80042d8: 461a mov r2, r3
80042da: 6efb ldr r3, [r7, #108] @ 0x6c
80042dc: 4413 add r3, r2
80042de: 66fb str r3, [r7, #108] @ 0x6c
80042e0: 68bb ldr r3, [r7, #8]
80042e2: 781b ldrb r3, [r3, #0]
80042e4: 011a lsls r2, r3, #4
80042e6: 6efb ldr r3, [r7, #108] @ 0x6c
80042e8: 4413 add r3, r2
80042ea: f203 430c addw r3, r3, #1036 @ 0x40c
80042ee: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80042f2: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80042f6: 881b ldrh r3, [r3, #0]
80042f8: b29b uxth r3, r3
80042fa: f3c3 0309 ubfx r3, r3, #0, #10
80042fe: b29a uxth r2, r3
8004300: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8004304: 801a strh r2, [r3, #0]
8004306: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800430a: 881b ldrh r3, [r3, #0]
800430c: b29b uxth r3, r3
800430e: ea6f 4343 mvn.w r3, r3, lsl #17
8004312: ea6f 4353 mvn.w r3, r3, lsr #17
8004316: b29a uxth r2, r3
8004318: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800431c: 801a strh r2, [r3, #0]
800431e: e017 b.n 8004350 <HAL_PCD_EP_DB_Transmit+0x54e>
8004320: 68bb ldr r3, [r7, #8]
8004322: 785b ldrb r3, [r3, #1]
8004324: 2b01 cmp r3, #1
8004326: d113 bne.n 8004350 <HAL_PCD_EP_DB_Transmit+0x54e>
8004328: 68fb ldr r3, [r7, #12]
800432a: 681b ldr r3, [r3, #0]
800432c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004330: b29b uxth r3, r3
8004332: 461a mov r2, r3
8004334: 6f7b ldr r3, [r7, #116] @ 0x74
8004336: 4413 add r3, r2
8004338: 677b str r3, [r7, #116] @ 0x74
800433a: 68bb ldr r3, [r7, #8]
800433c: 781b ldrb r3, [r3, #0]
800433e: 011a lsls r2, r3, #4
8004340: 6f7b ldr r3, [r7, #116] @ 0x74
8004342: 4413 add r3, r2
8004344: f203 430c addw r3, r3, #1036 @ 0x40c
8004348: 673b str r3, [r7, #112] @ 0x70
800434a: 6f3b ldr r3, [r7, #112] @ 0x70
800434c: 2200 movs r2, #0
800434e: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8004350: 68bb ldr r3, [r7, #8]
8004352: 781b ldrb r3, [r3, #0]
8004354: 4619 mov r1, r3
8004356: 68f8 ldr r0, [r7, #12]
8004358: f005 ff67 bl 800a22a <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
800435c: 88fb ldrh r3, [r7, #6]
800435e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004362: 2b00 cmp r3, #0
8004364: f040 811a bne.w 800459c <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8004368: 68fb ldr r3, [r7, #12]
800436a: 681b ldr r3, [r3, #0]
800436c: 461a mov r2, r3
800436e: 68bb ldr r3, [r7, #8]
8004370: 781b ldrb r3, [r3, #0]
8004372: 009b lsls r3, r3, #2
8004374: 4413 add r3, r2
8004376: 881b ldrh r3, [r3, #0]
8004378: b29b uxth r3, r3
800437a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800437e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004382: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8004386: 68fb ldr r3, [r7, #12]
8004388: 681b ldr r3, [r3, #0]
800438a: 461a mov r2, r3
800438c: 68bb ldr r3, [r7, #8]
800438e: 781b ldrb r3, [r3, #0]
8004390: 009b lsls r3, r3, #2
8004392: 441a add r2, r3
8004394: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8004398: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800439c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80043a0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80043a4: f043 0380 orr.w r3, r3, #128 @ 0x80
80043a8: b29b uxth r3, r3
80043aa: 8013 strh r3, [r2, #0]
80043ac: e0f6 b.n 800459c <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
80043ae: 88fb ldrh r3, [r7, #6]
80043b0: f403 4380 and.w r3, r3, #16384 @ 0x4000
80043b4: 2b00 cmp r3, #0
80043b6: d121 bne.n 80043fc <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
80043b8: 68fb ldr r3, [r7, #12]
80043ba: 681b ldr r3, [r3, #0]
80043bc: 461a mov r2, r3
80043be: 68bb ldr r3, [r7, #8]
80043c0: 781b ldrb r3, [r3, #0]
80043c2: 009b lsls r3, r3, #2
80043c4: 4413 add r3, r2
80043c6: 881b ldrh r3, [r3, #0]
80043c8: b29b uxth r3, r3
80043ca: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80043ce: f023 0370 bic.w r3, r3, #112 @ 0x70
80043d2: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
80043d6: 68fb ldr r3, [r7, #12]
80043d8: 681b ldr r3, [r3, #0]
80043da: 461a mov r2, r3
80043dc: 68bb ldr r3, [r7, #8]
80043de: 781b ldrb r3, [r3, #0]
80043e0: 009b lsls r3, r3, #2
80043e2: 441a add r2, r3
80043e4: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80043e8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80043ec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80043f0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80043f4: f043 0380 orr.w r3, r3, #128 @ 0x80
80043f8: b29b uxth r3, r3
80043fa: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
80043fc: 68bb ldr r3, [r7, #8]
80043fe: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8004402: 2b01 cmp r3, #1
8004404: f040 80ca bne.w 800459c <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8004408: 68bb ldr r3, [r7, #8]
800440a: 695a ldr r2, [r3, #20]
800440c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8004410: 441a add r2, r3
8004412: 68bb ldr r3, [r7, #8]
8004414: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8004416: 68bb ldr r3, [r7, #8]
8004418: 69da ldr r2, [r3, #28]
800441a: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800441e: 441a add r2, r3
8004420: 68bb ldr r3, [r7, #8]
8004422: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8004424: 68bb ldr r3, [r7, #8]
8004426: 6a1a ldr r2, [r3, #32]
8004428: 68bb ldr r3, [r7, #8]
800442a: 691b ldr r3, [r3, #16]
800442c: 429a cmp r2, r3
800442e: d30b bcc.n 8004448 <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
8004430: 68bb ldr r3, [r7, #8]
8004432: 691b ldr r3, [r3, #16]
8004434: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8004438: 68bb ldr r3, [r7, #8]
800443a: 6a1a ldr r2, [r3, #32]
800443c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004440: 1ad2 subs r2, r2, r3
8004442: 68bb ldr r3, [r7, #8]
8004444: 621a str r2, [r3, #32]
8004446: e017 b.n 8004478 <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
8004448: 68bb ldr r3, [r7, #8]
800444a: 6a1b ldr r3, [r3, #32]
800444c: 2b00 cmp r3, #0
800444e: d108 bne.n 8004462 <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8004450: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8004454: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8004458: 68bb ldr r3, [r7, #8]
800445a: 2200 movs r2, #0
800445c: f883 2024 strb.w r2, [r3, #36] @ 0x24
8004460: e00a b.n 8004478 <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
8004462: 68bb ldr r3, [r7, #8]
8004464: 6a1b ldr r3, [r3, #32]
8004466: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
800446a: 68bb ldr r3, [r7, #8]
800446c: 2200 movs r2, #0
800446e: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8004470: 68bb ldr r3, [r7, #8]
8004472: 2200 movs r2, #0
8004474: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8004478: 68fb ldr r3, [r7, #12]
800447a: 681b ldr r3, [r3, #0]
800447c: 657b str r3, [r7, #84] @ 0x54
800447e: 68bb ldr r3, [r7, #8]
8004480: 785b ldrb r3, [r3, #1]
8004482: 2b00 cmp r3, #0
8004484: d165 bne.n 8004552 <HAL_PCD_EP_DB_Transmit+0x750>
8004486: 68fb ldr r3, [r7, #12]
8004488: 681b ldr r3, [r3, #0]
800448a: 65fb str r3, [r7, #92] @ 0x5c
800448c: 68fb ldr r3, [r7, #12]
800448e: 681b ldr r3, [r3, #0]
8004490: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004494: b29b uxth r3, r3
8004496: 461a mov r2, r3
8004498: 6dfb ldr r3, [r7, #92] @ 0x5c
800449a: 4413 add r3, r2
800449c: 65fb str r3, [r7, #92] @ 0x5c
800449e: 68bb ldr r3, [r7, #8]
80044a0: 781b ldrb r3, [r3, #0]
80044a2: 011a lsls r2, r3, #4
80044a4: 6dfb ldr r3, [r7, #92] @ 0x5c
80044a6: 4413 add r3, r2
80044a8: f203 430c addw r3, r3, #1036 @ 0x40c
80044ac: 65bb str r3, [r7, #88] @ 0x58
80044ae: 6dbb ldr r3, [r7, #88] @ 0x58
80044b0: 881b ldrh r3, [r3, #0]
80044b2: b29b uxth r3, r3
80044b4: f3c3 0309 ubfx r3, r3, #0, #10
80044b8: b29a uxth r2, r3
80044ba: 6dbb ldr r3, [r7, #88] @ 0x58
80044bc: 801a strh r2, [r3, #0]
80044be: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80044c2: 2b3e cmp r3, #62 @ 0x3e
80044c4: d91d bls.n 8004502 <HAL_PCD_EP_DB_Transmit+0x700>
80044c6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80044ca: 095b lsrs r3, r3, #5
80044cc: 66bb str r3, [r7, #104] @ 0x68
80044ce: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80044d2: f003 031f and.w r3, r3, #31
80044d6: 2b00 cmp r3, #0
80044d8: d102 bne.n 80044e0 <HAL_PCD_EP_DB_Transmit+0x6de>
80044da: 6ebb ldr r3, [r7, #104] @ 0x68
80044dc: 3b01 subs r3, #1
80044de: 66bb str r3, [r7, #104] @ 0x68
80044e0: 6dbb ldr r3, [r7, #88] @ 0x58
80044e2: 881b ldrh r3, [r3, #0]
80044e4: b29a uxth r2, r3
80044e6: 6ebb ldr r3, [r7, #104] @ 0x68
80044e8: b29b uxth r3, r3
80044ea: 029b lsls r3, r3, #10
80044ec: b29b uxth r3, r3
80044ee: 4313 orrs r3, r2
80044f0: b29b uxth r3, r3
80044f2: ea6f 4343 mvn.w r3, r3, lsl #17
80044f6: ea6f 4353 mvn.w r3, r3, lsr #17
80044fa: b29a uxth r2, r3
80044fc: 6dbb ldr r3, [r7, #88] @ 0x58
80044fe: 801a strh r2, [r3, #0]
8004500: e041 b.n 8004586 <HAL_PCD_EP_DB_Transmit+0x784>
8004502: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004506: 2b00 cmp r3, #0
8004508: d10a bne.n 8004520 <HAL_PCD_EP_DB_Transmit+0x71e>
800450a: 6dbb ldr r3, [r7, #88] @ 0x58
800450c: 881b ldrh r3, [r3, #0]
800450e: b29b uxth r3, r3
8004510: ea6f 4343 mvn.w r3, r3, lsl #17
8004514: ea6f 4353 mvn.w r3, r3, lsr #17
8004518: b29a uxth r2, r3
800451a: 6dbb ldr r3, [r7, #88] @ 0x58
800451c: 801a strh r2, [r3, #0]
800451e: e032 b.n 8004586 <HAL_PCD_EP_DB_Transmit+0x784>
8004520: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004524: 085b lsrs r3, r3, #1
8004526: 66bb str r3, [r7, #104] @ 0x68
8004528: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800452c: f003 0301 and.w r3, r3, #1
8004530: 2b00 cmp r3, #0
8004532: d002 beq.n 800453a <HAL_PCD_EP_DB_Transmit+0x738>
8004534: 6ebb ldr r3, [r7, #104] @ 0x68
8004536: 3301 adds r3, #1
8004538: 66bb str r3, [r7, #104] @ 0x68
800453a: 6dbb ldr r3, [r7, #88] @ 0x58
800453c: 881b ldrh r3, [r3, #0]
800453e: b29a uxth r2, r3
8004540: 6ebb ldr r3, [r7, #104] @ 0x68
8004542: b29b uxth r3, r3
8004544: 029b lsls r3, r3, #10
8004546: b29b uxth r3, r3
8004548: 4313 orrs r3, r2
800454a: b29a uxth r2, r3
800454c: 6dbb ldr r3, [r7, #88] @ 0x58
800454e: 801a strh r2, [r3, #0]
8004550: e019 b.n 8004586 <HAL_PCD_EP_DB_Transmit+0x784>
8004552: 68bb ldr r3, [r7, #8]
8004554: 785b ldrb r3, [r3, #1]
8004556: 2b01 cmp r3, #1
8004558: d115 bne.n 8004586 <HAL_PCD_EP_DB_Transmit+0x784>
800455a: 68fb ldr r3, [r7, #12]
800455c: 681b ldr r3, [r3, #0]
800455e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004562: b29b uxth r3, r3
8004564: 461a mov r2, r3
8004566: 6d7b ldr r3, [r7, #84] @ 0x54
8004568: 4413 add r3, r2
800456a: 657b str r3, [r7, #84] @ 0x54
800456c: 68bb ldr r3, [r7, #8]
800456e: 781b ldrb r3, [r3, #0]
8004570: 011a lsls r2, r3, #4
8004572: 6d7b ldr r3, [r7, #84] @ 0x54
8004574: 4413 add r3, r2
8004576: f203 430c addw r3, r3, #1036 @ 0x40c
800457a: 653b str r3, [r7, #80] @ 0x50
800457c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004580: b29a uxth r2, r3
8004582: 6d3b ldr r3, [r7, #80] @ 0x50
8004584: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8004586: 68fb ldr r3, [r7, #12]
8004588: 6818 ldr r0, [r3, #0]
800458a: 68bb ldr r3, [r7, #8]
800458c: 6959 ldr r1, [r3, #20]
800458e: 68bb ldr r3, [r7, #8]
8004590: 895a ldrh r2, [r3, #10]
8004592: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004596: b29b uxth r3, r3
8004598: f003 ff83 bl 80084a2 <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
800459c: 68fb ldr r3, [r7, #12]
800459e: 681b ldr r3, [r3, #0]
80045a0: 461a mov r2, r3
80045a2: 68bb ldr r3, [r7, #8]
80045a4: 781b ldrb r3, [r3, #0]
80045a6: 009b lsls r3, r3, #2
80045a8: 4413 add r3, r2
80045aa: 881b ldrh r3, [r3, #0]
80045ac: b29b uxth r3, r3
80045ae: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80045b2: f023 0340 bic.w r3, r3, #64 @ 0x40
80045b6: 82bb strh r3, [r7, #20]
80045b8: 8abb ldrh r3, [r7, #20]
80045ba: f083 0310 eor.w r3, r3, #16
80045be: 82bb strh r3, [r7, #20]
80045c0: 8abb ldrh r3, [r7, #20]
80045c2: f083 0320 eor.w r3, r3, #32
80045c6: 82bb strh r3, [r7, #20]
80045c8: 68fb ldr r3, [r7, #12]
80045ca: 681b ldr r3, [r3, #0]
80045cc: 461a mov r2, r3
80045ce: 68bb ldr r3, [r7, #8]
80045d0: 781b ldrb r3, [r3, #0]
80045d2: 009b lsls r3, r3, #2
80045d4: 441a add r2, r3
80045d6: 8abb ldrh r3, [r7, #20]
80045d8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80045dc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80045e0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80045e4: f043 0380 orr.w r3, r3, #128 @ 0x80
80045e8: b29b uxth r3, r3
80045ea: 8013 strh r3, [r2, #0]
return HAL_OK;
80045ec: 2300 movs r3, #0
}
80045ee: 4618 mov r0, r3
80045f0: 3790 adds r7, #144 @ 0x90
80045f2: 46bd mov sp, r7
80045f4: bd80 pop {r7, pc}
080045f6 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
80045f6: b480 push {r7}
80045f8: b087 sub sp, #28
80045fa: af00 add r7, sp, #0
80045fc: 60f8 str r0, [r7, #12]
80045fe: 607b str r3, [r7, #4]
8004600: 460b mov r3, r1
8004602: 817b strh r3, [r7, #10]
8004604: 4613 mov r3, r2
8004606: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8004608: 897b ldrh r3, [r7, #10]
800460a: f003 0380 and.w r3, r3, #128 @ 0x80
800460e: b29b uxth r3, r3
8004610: 2b00 cmp r3, #0
8004612: d00b beq.n 800462c <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8004614: 897b ldrh r3, [r7, #10]
8004616: f003 0207 and.w r2, r3, #7
800461a: 4613 mov r3, r2
800461c: 009b lsls r3, r3, #2
800461e: 4413 add r3, r2
8004620: 00db lsls r3, r3, #3
8004622: 3310 adds r3, #16
8004624: 68fa ldr r2, [r7, #12]
8004626: 4413 add r3, r2
8004628: 617b str r3, [r7, #20]
800462a: e009 b.n 8004640 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
800462c: 897a ldrh r2, [r7, #10]
800462e: 4613 mov r3, r2
8004630: 009b lsls r3, r3, #2
8004632: 4413 add r3, r2
8004634: 00db lsls r3, r3, #3
8004636: f503 73a8 add.w r3, r3, #336 @ 0x150
800463a: 68fa ldr r2, [r7, #12]
800463c: 4413 add r3, r2
800463e: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8004640: 893b ldrh r3, [r7, #8]
8004642: 2b00 cmp r3, #0
8004644: d107 bne.n 8004656 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8004646: 697b ldr r3, [r7, #20]
8004648: 2200 movs r2, #0
800464a: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
800464c: 687b ldr r3, [r7, #4]
800464e: b29a uxth r2, r3
8004650: 697b ldr r3, [r7, #20]
8004652: 80da strh r2, [r3, #6]
8004654: e00b b.n 800466e <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8004656: 697b ldr r3, [r7, #20]
8004658: 2201 movs r2, #1
800465a: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
800465c: 687b ldr r3, [r7, #4]
800465e: b29a uxth r2, r3
8004660: 697b ldr r3, [r7, #20]
8004662: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8004664: 687b ldr r3, [r7, #4]
8004666: 0c1b lsrs r3, r3, #16
8004668: b29a uxth r2, r3
800466a: 697b ldr r3, [r7, #20]
800466c: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800466e: 2300 movs r3, #0
}
8004670: 4618 mov r0, r3
8004672: 371c adds r7, #28
8004674: 46bd mov sp, r7
8004676: bc80 pop {r7}
8004678: 4770 bx lr
...
0800467c <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
800467c: b580 push {r7, lr}
800467e: b086 sub sp, #24
8004680: af00 add r7, sp, #0
8004682: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8004684: 687b ldr r3, [r7, #4]
8004686: 2b00 cmp r3, #0
8004688: d101 bne.n 800468e <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
800468a: 2301 movs r3, #1
800468c: e272 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
800468e: 687b ldr r3, [r7, #4]
8004690: 681b ldr r3, [r3, #0]
8004692: f003 0301 and.w r3, r3, #1
8004696: 2b00 cmp r3, #0
8004698: f000 8087 beq.w 80047aa <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
800469c: 4b92 ldr r3, [pc, #584] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800469e: 685b ldr r3, [r3, #4]
80046a0: f003 030c and.w r3, r3, #12
80046a4: 2b04 cmp r3, #4
80046a6: d00c beq.n 80046c2 <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
80046a8: 4b8f ldr r3, [pc, #572] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80046aa: 685b ldr r3, [r3, #4]
80046ac: f003 030c and.w r3, r3, #12
80046b0: 2b08 cmp r3, #8
80046b2: d112 bne.n 80046da <HAL_RCC_OscConfig+0x5e>
80046b4: 4b8c ldr r3, [pc, #560] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80046b6: 685b ldr r3, [r3, #4]
80046b8: f403 3380 and.w r3, r3, #65536 @ 0x10000
80046bc: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80046c0: d10b bne.n 80046da <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80046c2: 4b89 ldr r3, [pc, #548] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80046c4: 681b ldr r3, [r3, #0]
80046c6: f403 3300 and.w r3, r3, #131072 @ 0x20000
80046ca: 2b00 cmp r3, #0
80046cc: d06c beq.n 80047a8 <HAL_RCC_OscConfig+0x12c>
80046ce: 687b ldr r3, [r7, #4]
80046d0: 685b ldr r3, [r3, #4]
80046d2: 2b00 cmp r3, #0
80046d4: d168 bne.n 80047a8 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
80046d6: 2301 movs r3, #1
80046d8: e24c b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
80046da: 687b ldr r3, [r7, #4]
80046dc: 685b ldr r3, [r3, #4]
80046de: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80046e2: d106 bne.n 80046f2 <HAL_RCC_OscConfig+0x76>
80046e4: 4b80 ldr r3, [pc, #512] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80046e6: 681b ldr r3, [r3, #0]
80046e8: 4a7f ldr r2, [pc, #508] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80046ea: f443 3380 orr.w r3, r3, #65536 @ 0x10000
80046ee: 6013 str r3, [r2, #0]
80046f0: e02e b.n 8004750 <HAL_RCC_OscConfig+0xd4>
80046f2: 687b ldr r3, [r7, #4]
80046f4: 685b ldr r3, [r3, #4]
80046f6: 2b00 cmp r3, #0
80046f8: d10c bne.n 8004714 <HAL_RCC_OscConfig+0x98>
80046fa: 4b7b ldr r3, [pc, #492] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80046fc: 681b ldr r3, [r3, #0]
80046fe: 4a7a ldr r2, [pc, #488] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004700: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8004704: 6013 str r3, [r2, #0]
8004706: 4b78 ldr r3, [pc, #480] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004708: 681b ldr r3, [r3, #0]
800470a: 4a77 ldr r2, [pc, #476] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800470c: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8004710: 6013 str r3, [r2, #0]
8004712: e01d b.n 8004750 <HAL_RCC_OscConfig+0xd4>
8004714: 687b ldr r3, [r7, #4]
8004716: 685b ldr r3, [r3, #4]
8004718: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
800471c: d10c bne.n 8004738 <HAL_RCC_OscConfig+0xbc>
800471e: 4b72 ldr r3, [pc, #456] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004720: 681b ldr r3, [r3, #0]
8004722: 4a71 ldr r2, [pc, #452] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004724: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8004728: 6013 str r3, [r2, #0]
800472a: 4b6f ldr r3, [pc, #444] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800472c: 681b ldr r3, [r3, #0]
800472e: 4a6e ldr r2, [pc, #440] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004730: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8004734: 6013 str r3, [r2, #0]
8004736: e00b b.n 8004750 <HAL_RCC_OscConfig+0xd4>
8004738: 4b6b ldr r3, [pc, #428] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800473a: 681b ldr r3, [r3, #0]
800473c: 4a6a ldr r2, [pc, #424] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800473e: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8004742: 6013 str r3, [r2, #0]
8004744: 4b68 ldr r3, [pc, #416] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004746: 681b ldr r3, [r3, #0]
8004748: 4a67 ldr r2, [pc, #412] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800474a: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800474e: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8004750: 687b ldr r3, [r7, #4]
8004752: 685b ldr r3, [r3, #4]
8004754: 2b00 cmp r3, #0
8004756: d013 beq.n 8004780 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004758: f7fd fb4a bl 8001df0 <HAL_GetTick>
800475c: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800475e: e008 b.n 8004772 <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8004760: f7fd fb46 bl 8001df0 <HAL_GetTick>
8004764: 4602 mov r2, r0
8004766: 693b ldr r3, [r7, #16]
8004768: 1ad3 subs r3, r2, r3
800476a: 2b64 cmp r3, #100 @ 0x64
800476c: d901 bls.n 8004772 <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
800476e: 2303 movs r3, #3
8004770: e200 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004772: 4b5d ldr r3, [pc, #372] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004774: 681b ldr r3, [r3, #0]
8004776: f403 3300 and.w r3, r3, #131072 @ 0x20000
800477a: 2b00 cmp r3, #0
800477c: d0f0 beq.n 8004760 <HAL_RCC_OscConfig+0xe4>
800477e: e014 b.n 80047aa <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004780: f7fd fb36 bl 8001df0 <HAL_GetTick>
8004784: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8004786: e008 b.n 800479a <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8004788: f7fd fb32 bl 8001df0 <HAL_GetTick>
800478c: 4602 mov r2, r0
800478e: 693b ldr r3, [r7, #16]
8004790: 1ad3 subs r3, r2, r3
8004792: 2b64 cmp r3, #100 @ 0x64
8004794: d901 bls.n 800479a <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
8004796: 2303 movs r3, #3
8004798: e1ec b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
800479a: 4b53 ldr r3, [pc, #332] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800479c: 681b ldr r3, [r3, #0]
800479e: f403 3300 and.w r3, r3, #131072 @ 0x20000
80047a2: 2b00 cmp r3, #0
80047a4: d1f0 bne.n 8004788 <HAL_RCC_OscConfig+0x10c>
80047a6: e000 b.n 80047aa <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80047a8: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
80047aa: 687b ldr r3, [r7, #4]
80047ac: 681b ldr r3, [r3, #0]
80047ae: f003 0302 and.w r3, r3, #2
80047b2: 2b00 cmp r3, #0
80047b4: d063 beq.n 800487e <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
80047b6: 4b4c ldr r3, [pc, #304] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80047b8: 685b ldr r3, [r3, #4]
80047ba: f003 030c and.w r3, r3, #12
80047be: 2b00 cmp r3, #0
80047c0: d00b beq.n 80047da <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
80047c2: 4b49 ldr r3, [pc, #292] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80047c4: 685b ldr r3, [r3, #4]
80047c6: f003 030c and.w r3, r3, #12
80047ca: 2b08 cmp r3, #8
80047cc: d11c bne.n 8004808 <HAL_RCC_OscConfig+0x18c>
80047ce: 4b46 ldr r3, [pc, #280] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80047d0: 685b ldr r3, [r3, #4]
80047d2: f403 3380 and.w r3, r3, #65536 @ 0x10000
80047d6: 2b00 cmp r3, #0
80047d8: d116 bne.n 8004808 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
80047da: 4b43 ldr r3, [pc, #268] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80047dc: 681b ldr r3, [r3, #0]
80047de: f003 0302 and.w r3, r3, #2
80047e2: 2b00 cmp r3, #0
80047e4: d005 beq.n 80047f2 <HAL_RCC_OscConfig+0x176>
80047e6: 687b ldr r3, [r7, #4]
80047e8: 691b ldr r3, [r3, #16]
80047ea: 2b01 cmp r3, #1
80047ec: d001 beq.n 80047f2 <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
80047ee: 2301 movs r3, #1
80047f0: e1c0 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
80047f2: 4b3d ldr r3, [pc, #244] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80047f4: 681b ldr r3, [r3, #0]
80047f6: f023 02f8 bic.w r2, r3, #248 @ 0xf8
80047fa: 687b ldr r3, [r7, #4]
80047fc: 695b ldr r3, [r3, #20]
80047fe: 00db lsls r3, r3, #3
8004800: 4939 ldr r1, [pc, #228] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004802: 4313 orrs r3, r2
8004804: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8004806: e03a b.n 800487e <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8004808: 687b ldr r3, [r7, #4]
800480a: 691b ldr r3, [r3, #16]
800480c: 2b00 cmp r3, #0
800480e: d020 beq.n 8004852 <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8004810: 4b36 ldr r3, [pc, #216] @ (80048ec <HAL_RCC_OscConfig+0x270>)
8004812: 2201 movs r2, #1
8004814: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004816: f7fd faeb bl 8001df0 <HAL_GetTick>
800481a: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800481c: e008 b.n 8004830 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800481e: f7fd fae7 bl 8001df0 <HAL_GetTick>
8004822: 4602 mov r2, r0
8004824: 693b ldr r3, [r7, #16]
8004826: 1ad3 subs r3, r2, r3
8004828: 2b02 cmp r3, #2
800482a: d901 bls.n 8004830 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
800482c: 2303 movs r3, #3
800482e: e1a1 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8004830: 4b2d ldr r3, [pc, #180] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004832: 681b ldr r3, [r3, #0]
8004834: f003 0302 and.w r3, r3, #2
8004838: 2b00 cmp r3, #0
800483a: d0f0 beq.n 800481e <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800483c: 4b2a ldr r3, [pc, #168] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800483e: 681b ldr r3, [r3, #0]
8004840: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8004844: 687b ldr r3, [r7, #4]
8004846: 695b ldr r3, [r3, #20]
8004848: 00db lsls r3, r3, #3
800484a: 4927 ldr r1, [pc, #156] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
800484c: 4313 orrs r3, r2
800484e: 600b str r3, [r1, #0]
8004850: e015 b.n 800487e <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8004852: 4b26 ldr r3, [pc, #152] @ (80048ec <HAL_RCC_OscConfig+0x270>)
8004854: 2200 movs r2, #0
8004856: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004858: f7fd faca bl 8001df0 <HAL_GetTick>
800485c: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800485e: e008 b.n 8004872 <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8004860: f7fd fac6 bl 8001df0 <HAL_GetTick>
8004864: 4602 mov r2, r0
8004866: 693b ldr r3, [r7, #16]
8004868: 1ad3 subs r3, r2, r3
800486a: 2b02 cmp r3, #2
800486c: d901 bls.n 8004872 <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
800486e: 2303 movs r3, #3
8004870: e180 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8004872: 4b1d ldr r3, [pc, #116] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
8004874: 681b ldr r3, [r3, #0]
8004876: f003 0302 and.w r3, r3, #2
800487a: 2b00 cmp r3, #0
800487c: d1f0 bne.n 8004860 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
800487e: 687b ldr r3, [r7, #4]
8004880: 681b ldr r3, [r3, #0]
8004882: f003 0308 and.w r3, r3, #8
8004886: 2b00 cmp r3, #0
8004888: d03a beq.n 8004900 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
800488a: 687b ldr r3, [r7, #4]
800488c: 699b ldr r3, [r3, #24]
800488e: 2b00 cmp r3, #0
8004890: d019 beq.n 80048c6 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8004892: 4b17 ldr r3, [pc, #92] @ (80048f0 <HAL_RCC_OscConfig+0x274>)
8004894: 2201 movs r2, #1
8004896: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004898: f7fd faaa bl 8001df0 <HAL_GetTick>
800489c: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
800489e: e008 b.n 80048b2 <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80048a0: f7fd faa6 bl 8001df0 <HAL_GetTick>
80048a4: 4602 mov r2, r0
80048a6: 693b ldr r3, [r7, #16]
80048a8: 1ad3 subs r3, r2, r3
80048aa: 2b02 cmp r3, #2
80048ac: d901 bls.n 80048b2 <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
80048ae: 2303 movs r3, #3
80048b0: e160 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80048b2: 4b0d ldr r3, [pc, #52] @ (80048e8 <HAL_RCC_OscConfig+0x26c>)
80048b4: 6a5b ldr r3, [r3, #36] @ 0x24
80048b6: f003 0302 and.w r3, r3, #2
80048ba: 2b00 cmp r3, #0
80048bc: d0f0 beq.n 80048a0 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
80048be: 2001 movs r0, #1
80048c0: f000 face bl 8004e60 <RCC_Delay>
80048c4: e01c b.n 8004900 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
80048c6: 4b0a ldr r3, [pc, #40] @ (80048f0 <HAL_RCC_OscConfig+0x274>)
80048c8: 2200 movs r2, #0
80048ca: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80048cc: f7fd fa90 bl 8001df0 <HAL_GetTick>
80048d0: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80048d2: e00f b.n 80048f4 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80048d4: f7fd fa8c bl 8001df0 <HAL_GetTick>
80048d8: 4602 mov r2, r0
80048da: 693b ldr r3, [r7, #16]
80048dc: 1ad3 subs r3, r2, r3
80048de: 2b02 cmp r3, #2
80048e0: d908 bls.n 80048f4 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
80048e2: 2303 movs r3, #3
80048e4: e146 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
80048e6: bf00 nop
80048e8: 40021000 .word 0x40021000
80048ec: 42420000 .word 0x42420000
80048f0: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80048f4: 4b92 ldr r3, [pc, #584] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80048f6: 6a5b ldr r3, [r3, #36] @ 0x24
80048f8: f003 0302 and.w r3, r3, #2
80048fc: 2b00 cmp r3, #0
80048fe: d1e9 bne.n 80048d4 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8004900: 687b ldr r3, [r7, #4]
8004902: 681b ldr r3, [r3, #0]
8004904: f003 0304 and.w r3, r3, #4
8004908: 2b00 cmp r3, #0
800490a: f000 80a6 beq.w 8004a5a <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
800490e: 2300 movs r3, #0
8004910: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8004912: 4b8b ldr r3, [pc, #556] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004914: 69db ldr r3, [r3, #28]
8004916: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800491a: 2b00 cmp r3, #0
800491c: d10d bne.n 800493a <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
800491e: 4b88 ldr r3, [pc, #544] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004920: 69db ldr r3, [r3, #28]
8004922: 4a87 ldr r2, [pc, #540] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004924: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8004928: 61d3 str r3, [r2, #28]
800492a: 4b85 ldr r3, [pc, #532] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
800492c: 69db ldr r3, [r3, #28]
800492e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004932: 60bb str r3, [r7, #8]
8004934: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8004936: 2301 movs r3, #1
8004938: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800493a: 4b82 ldr r3, [pc, #520] @ (8004b44 <HAL_RCC_OscConfig+0x4c8>)
800493c: 681b ldr r3, [r3, #0]
800493e: f403 7380 and.w r3, r3, #256 @ 0x100
8004942: 2b00 cmp r3, #0
8004944: d118 bne.n 8004978 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8004946: 4b7f ldr r3, [pc, #508] @ (8004b44 <HAL_RCC_OscConfig+0x4c8>)
8004948: 681b ldr r3, [r3, #0]
800494a: 4a7e ldr r2, [pc, #504] @ (8004b44 <HAL_RCC_OscConfig+0x4c8>)
800494c: f443 7380 orr.w r3, r3, #256 @ 0x100
8004950: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8004952: f7fd fa4d bl 8001df0 <HAL_GetTick>
8004956: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004958: e008 b.n 800496c <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
800495a: f7fd fa49 bl 8001df0 <HAL_GetTick>
800495e: 4602 mov r2, r0
8004960: 693b ldr r3, [r7, #16]
8004962: 1ad3 subs r3, r2, r3
8004964: 2b64 cmp r3, #100 @ 0x64
8004966: d901 bls.n 800496c <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8004968: 2303 movs r3, #3
800496a: e103 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800496c: 4b75 ldr r3, [pc, #468] @ (8004b44 <HAL_RCC_OscConfig+0x4c8>)
800496e: 681b ldr r3, [r3, #0]
8004970: f403 7380 and.w r3, r3, #256 @ 0x100
8004974: 2b00 cmp r3, #0
8004976: d0f0 beq.n 800495a <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8004978: 687b ldr r3, [r7, #4]
800497a: 68db ldr r3, [r3, #12]
800497c: 2b01 cmp r3, #1
800497e: d106 bne.n 800498e <HAL_RCC_OscConfig+0x312>
8004980: 4b6f ldr r3, [pc, #444] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004982: 6a1b ldr r3, [r3, #32]
8004984: 4a6e ldr r2, [pc, #440] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004986: f043 0301 orr.w r3, r3, #1
800498a: 6213 str r3, [r2, #32]
800498c: e02d b.n 80049ea <HAL_RCC_OscConfig+0x36e>
800498e: 687b ldr r3, [r7, #4]
8004990: 68db ldr r3, [r3, #12]
8004992: 2b00 cmp r3, #0
8004994: d10c bne.n 80049b0 <HAL_RCC_OscConfig+0x334>
8004996: 4b6a ldr r3, [pc, #424] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004998: 6a1b ldr r3, [r3, #32]
800499a: 4a69 ldr r2, [pc, #420] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
800499c: f023 0301 bic.w r3, r3, #1
80049a0: 6213 str r3, [r2, #32]
80049a2: 4b67 ldr r3, [pc, #412] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049a4: 6a1b ldr r3, [r3, #32]
80049a6: 4a66 ldr r2, [pc, #408] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049a8: f023 0304 bic.w r3, r3, #4
80049ac: 6213 str r3, [r2, #32]
80049ae: e01c b.n 80049ea <HAL_RCC_OscConfig+0x36e>
80049b0: 687b ldr r3, [r7, #4]
80049b2: 68db ldr r3, [r3, #12]
80049b4: 2b05 cmp r3, #5
80049b6: d10c bne.n 80049d2 <HAL_RCC_OscConfig+0x356>
80049b8: 4b61 ldr r3, [pc, #388] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049ba: 6a1b ldr r3, [r3, #32]
80049bc: 4a60 ldr r2, [pc, #384] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049be: f043 0304 orr.w r3, r3, #4
80049c2: 6213 str r3, [r2, #32]
80049c4: 4b5e ldr r3, [pc, #376] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049c6: 6a1b ldr r3, [r3, #32]
80049c8: 4a5d ldr r2, [pc, #372] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049ca: f043 0301 orr.w r3, r3, #1
80049ce: 6213 str r3, [r2, #32]
80049d0: e00b b.n 80049ea <HAL_RCC_OscConfig+0x36e>
80049d2: 4b5b ldr r3, [pc, #364] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049d4: 6a1b ldr r3, [r3, #32]
80049d6: 4a5a ldr r2, [pc, #360] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049d8: f023 0301 bic.w r3, r3, #1
80049dc: 6213 str r3, [r2, #32]
80049de: 4b58 ldr r3, [pc, #352] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049e0: 6a1b ldr r3, [r3, #32]
80049e2: 4a57 ldr r2, [pc, #348] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
80049e4: f023 0304 bic.w r3, r3, #4
80049e8: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
80049ea: 687b ldr r3, [r7, #4]
80049ec: 68db ldr r3, [r3, #12]
80049ee: 2b00 cmp r3, #0
80049f0: d015 beq.n 8004a1e <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80049f2: f7fd f9fd bl 8001df0 <HAL_GetTick>
80049f6: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80049f8: e00a b.n 8004a10 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80049fa: f7fd f9f9 bl 8001df0 <HAL_GetTick>
80049fe: 4602 mov r2, r0
8004a00: 693b ldr r3, [r7, #16]
8004a02: 1ad3 subs r3, r2, r3
8004a04: f241 3288 movw r2, #5000 @ 0x1388
8004a08: 4293 cmp r3, r2
8004a0a: d901 bls.n 8004a10 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8004a0c: 2303 movs r3, #3
8004a0e: e0b1 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004a10: 4b4b ldr r3, [pc, #300] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004a12: 6a1b ldr r3, [r3, #32]
8004a14: f003 0302 and.w r3, r3, #2
8004a18: 2b00 cmp r3, #0
8004a1a: d0ee beq.n 80049fa <HAL_RCC_OscConfig+0x37e>
8004a1c: e014 b.n 8004a48 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004a1e: f7fd f9e7 bl 8001df0 <HAL_GetTick>
8004a22: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8004a24: e00a b.n 8004a3c <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8004a26: f7fd f9e3 bl 8001df0 <HAL_GetTick>
8004a2a: 4602 mov r2, r0
8004a2c: 693b ldr r3, [r7, #16]
8004a2e: 1ad3 subs r3, r2, r3
8004a30: f241 3288 movw r2, #5000 @ 0x1388
8004a34: 4293 cmp r3, r2
8004a36: d901 bls.n 8004a3c <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8004a38: 2303 movs r3, #3
8004a3a: e09b b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8004a3c: 4b40 ldr r3, [pc, #256] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004a3e: 6a1b ldr r3, [r3, #32]
8004a40: f003 0302 and.w r3, r3, #2
8004a44: 2b00 cmp r3, #0
8004a46: d1ee bne.n 8004a26 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8004a48: 7dfb ldrb r3, [r7, #23]
8004a4a: 2b01 cmp r3, #1
8004a4c: d105 bne.n 8004a5a <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
8004a4e: 4b3c ldr r3, [pc, #240] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004a50: 69db ldr r3, [r3, #28]
8004a52: 4a3b ldr r2, [pc, #236] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004a54: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8004a58: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8004a5a: 687b ldr r3, [r7, #4]
8004a5c: 69db ldr r3, [r3, #28]
8004a5e: 2b00 cmp r3, #0
8004a60: f000 8087 beq.w 8004b72 <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8004a64: 4b36 ldr r3, [pc, #216] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004a66: 685b ldr r3, [r3, #4]
8004a68: f003 030c and.w r3, r3, #12
8004a6c: 2b08 cmp r3, #8
8004a6e: d061 beq.n 8004b34 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8004a70: 687b ldr r3, [r7, #4]
8004a72: 69db ldr r3, [r3, #28]
8004a74: 2b02 cmp r3, #2
8004a76: d146 bne.n 8004b06 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8004a78: 4b33 ldr r3, [pc, #204] @ (8004b48 <HAL_RCC_OscConfig+0x4cc>)
8004a7a: 2200 movs r2, #0
8004a7c: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004a7e: f7fd f9b7 bl 8001df0 <HAL_GetTick>
8004a82: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004a84: e008 b.n 8004a98 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8004a86: f7fd f9b3 bl 8001df0 <HAL_GetTick>
8004a8a: 4602 mov r2, r0
8004a8c: 693b ldr r3, [r7, #16]
8004a8e: 1ad3 subs r3, r2, r3
8004a90: 2b02 cmp r3, #2
8004a92: d901 bls.n 8004a98 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
8004a94: 2303 movs r3, #3
8004a96: e06d b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004a98: 4b29 ldr r3, [pc, #164] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004a9a: 681b ldr r3, [r3, #0]
8004a9c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8004aa0: 2b00 cmp r3, #0
8004aa2: d1f0 bne.n 8004a86 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
8004aa4: 687b ldr r3, [r7, #4]
8004aa6: 6a1b ldr r3, [r3, #32]
8004aa8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8004aac: d108 bne.n 8004ac0 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
8004aae: 4b24 ldr r3, [pc, #144] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004ab0: 685b ldr r3, [r3, #4]
8004ab2: f423 3200 bic.w r2, r3, #131072 @ 0x20000
8004ab6: 687b ldr r3, [r7, #4]
8004ab8: 689b ldr r3, [r3, #8]
8004aba: 4921 ldr r1, [pc, #132] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004abc: 4313 orrs r3, r2
8004abe: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8004ac0: 4b1f ldr r3, [pc, #124] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004ac2: 685b ldr r3, [r3, #4]
8004ac4: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
8004ac8: 687b ldr r3, [r7, #4]
8004aca: 6a19 ldr r1, [r3, #32]
8004acc: 687b ldr r3, [r7, #4]
8004ace: 6a5b ldr r3, [r3, #36] @ 0x24
8004ad0: 430b orrs r3, r1
8004ad2: 491b ldr r1, [pc, #108] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004ad4: 4313 orrs r3, r2
8004ad6: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8004ad8: 4b1b ldr r3, [pc, #108] @ (8004b48 <HAL_RCC_OscConfig+0x4cc>)
8004ada: 2201 movs r2, #1
8004adc: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004ade: f7fd f987 bl 8001df0 <HAL_GetTick>
8004ae2: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004ae4: e008 b.n 8004af8 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8004ae6: f7fd f983 bl 8001df0 <HAL_GetTick>
8004aea: 4602 mov r2, r0
8004aec: 693b ldr r3, [r7, #16]
8004aee: 1ad3 subs r3, r2, r3
8004af0: 2b02 cmp r3, #2
8004af2: d901 bls.n 8004af8 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8004af4: 2303 movs r3, #3
8004af6: e03d b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004af8: 4b11 ldr r3, [pc, #68] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004afa: 681b ldr r3, [r3, #0]
8004afc: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8004b00: 2b00 cmp r3, #0
8004b02: d0f0 beq.n 8004ae6 <HAL_RCC_OscConfig+0x46a>
8004b04: e035 b.n 8004b72 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8004b06: 4b10 ldr r3, [pc, #64] @ (8004b48 <HAL_RCC_OscConfig+0x4cc>)
8004b08: 2200 movs r2, #0
8004b0a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004b0c: f7fd f970 bl 8001df0 <HAL_GetTick>
8004b10: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004b12: e008 b.n 8004b26 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8004b14: f7fd f96c bl 8001df0 <HAL_GetTick>
8004b18: 4602 mov r2, r0
8004b1a: 693b ldr r3, [r7, #16]
8004b1c: 1ad3 subs r3, r2, r3
8004b1e: 2b02 cmp r3, #2
8004b20: d901 bls.n 8004b26 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
8004b22: 2303 movs r3, #3
8004b24: e026 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004b26: 4b06 ldr r3, [pc, #24] @ (8004b40 <HAL_RCC_OscConfig+0x4c4>)
8004b28: 681b ldr r3, [r3, #0]
8004b2a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8004b2e: 2b00 cmp r3, #0
8004b30: d1f0 bne.n 8004b14 <HAL_RCC_OscConfig+0x498>
8004b32: e01e b.n 8004b72 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8004b34: 687b ldr r3, [r7, #4]
8004b36: 69db ldr r3, [r3, #28]
8004b38: 2b01 cmp r3, #1
8004b3a: d107 bne.n 8004b4c <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8004b3c: 2301 movs r3, #1
8004b3e: e019 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
8004b40: 40021000 .word 0x40021000
8004b44: 40007000 .word 0x40007000
8004b48: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8004b4c: 4b0b ldr r3, [pc, #44] @ (8004b7c <HAL_RCC_OscConfig+0x500>)
8004b4e: 685b ldr r3, [r3, #4]
8004b50: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8004b52: 68fb ldr r3, [r7, #12]
8004b54: f403 3280 and.w r2, r3, #65536 @ 0x10000
8004b58: 687b ldr r3, [r7, #4]
8004b5a: 6a1b ldr r3, [r3, #32]
8004b5c: 429a cmp r2, r3
8004b5e: d106 bne.n 8004b6e <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8004b60: 68fb ldr r3, [r7, #12]
8004b62: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
8004b66: 687b ldr r3, [r7, #4]
8004b68: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8004b6a: 429a cmp r2, r3
8004b6c: d001 beq.n 8004b72 <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8004b6e: 2301 movs r3, #1
8004b70: e000 b.n 8004b74 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
8004b72: 2300 movs r3, #0
}
8004b74: 4618 mov r0, r3
8004b76: 3718 adds r7, #24
8004b78: 46bd mov sp, r7
8004b7a: bd80 pop {r7, pc}
8004b7c: 40021000 .word 0x40021000
08004b80 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8004b80: b580 push {r7, lr}
8004b82: b084 sub sp, #16
8004b84: af00 add r7, sp, #0
8004b86: 6078 str r0, [r7, #4]
8004b88: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8004b8a: 687b ldr r3, [r7, #4]
8004b8c: 2b00 cmp r3, #0
8004b8e: d101 bne.n 8004b94 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8004b90: 2301 movs r3, #1
8004b92: e0d0 b.n 8004d36 <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8004b94: 4b6a ldr r3, [pc, #424] @ (8004d40 <HAL_RCC_ClockConfig+0x1c0>)
8004b96: 681b ldr r3, [r3, #0]
8004b98: f003 0307 and.w r3, r3, #7
8004b9c: 683a ldr r2, [r7, #0]
8004b9e: 429a cmp r2, r3
8004ba0: d910 bls.n 8004bc4 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8004ba2: 4b67 ldr r3, [pc, #412] @ (8004d40 <HAL_RCC_ClockConfig+0x1c0>)
8004ba4: 681b ldr r3, [r3, #0]
8004ba6: f023 0207 bic.w r2, r3, #7
8004baa: 4965 ldr r1, [pc, #404] @ (8004d40 <HAL_RCC_ClockConfig+0x1c0>)
8004bac: 683b ldr r3, [r7, #0]
8004bae: 4313 orrs r3, r2
8004bb0: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8004bb2: 4b63 ldr r3, [pc, #396] @ (8004d40 <HAL_RCC_ClockConfig+0x1c0>)
8004bb4: 681b ldr r3, [r3, #0]
8004bb6: f003 0307 and.w r3, r3, #7
8004bba: 683a ldr r2, [r7, #0]
8004bbc: 429a cmp r2, r3
8004bbe: d001 beq.n 8004bc4 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8004bc0: 2301 movs r3, #1
8004bc2: e0b8 b.n 8004d36 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8004bc4: 687b ldr r3, [r7, #4]
8004bc6: 681b ldr r3, [r3, #0]
8004bc8: f003 0302 and.w r3, r3, #2
8004bcc: 2b00 cmp r3, #0
8004bce: d020 beq.n 8004c12 <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8004bd0: 687b ldr r3, [r7, #4]
8004bd2: 681b ldr r3, [r3, #0]
8004bd4: f003 0304 and.w r3, r3, #4
8004bd8: 2b00 cmp r3, #0
8004bda: d005 beq.n 8004be8 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8004bdc: 4b59 ldr r3, [pc, #356] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004bde: 685b ldr r3, [r3, #4]
8004be0: 4a58 ldr r2, [pc, #352] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004be2: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8004be6: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8004be8: 687b ldr r3, [r7, #4]
8004bea: 681b ldr r3, [r3, #0]
8004bec: f003 0308 and.w r3, r3, #8
8004bf0: 2b00 cmp r3, #0
8004bf2: d005 beq.n 8004c00 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8004bf4: 4b53 ldr r3, [pc, #332] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004bf6: 685b ldr r3, [r3, #4]
8004bf8: 4a52 ldr r2, [pc, #328] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004bfa: f443 5360 orr.w r3, r3, #14336 @ 0x3800
8004bfe: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8004c00: 4b50 ldr r3, [pc, #320] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004c02: 685b ldr r3, [r3, #4]
8004c04: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8004c08: 687b ldr r3, [r7, #4]
8004c0a: 689b ldr r3, [r3, #8]
8004c0c: 494d ldr r1, [pc, #308] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004c0e: 4313 orrs r3, r2
8004c10: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8004c12: 687b ldr r3, [r7, #4]
8004c14: 681b ldr r3, [r3, #0]
8004c16: f003 0301 and.w r3, r3, #1
8004c1a: 2b00 cmp r3, #0
8004c1c: d040 beq.n 8004ca0 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8004c1e: 687b ldr r3, [r7, #4]
8004c20: 685b ldr r3, [r3, #4]
8004c22: 2b01 cmp r3, #1
8004c24: d107 bne.n 8004c36 <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004c26: 4b47 ldr r3, [pc, #284] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004c28: 681b ldr r3, [r3, #0]
8004c2a: f403 3300 and.w r3, r3, #131072 @ 0x20000
8004c2e: 2b00 cmp r3, #0
8004c30: d115 bne.n 8004c5e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004c32: 2301 movs r3, #1
8004c34: e07f b.n 8004d36 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8004c36: 687b ldr r3, [r7, #4]
8004c38: 685b ldr r3, [r3, #4]
8004c3a: 2b02 cmp r3, #2
8004c3c: d107 bne.n 8004c4e <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004c3e: 4b41 ldr r3, [pc, #260] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004c40: 681b ldr r3, [r3, #0]
8004c42: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8004c46: 2b00 cmp r3, #0
8004c48: d109 bne.n 8004c5e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004c4a: 2301 movs r3, #1
8004c4c: e073 b.n 8004d36 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8004c4e: 4b3d ldr r3, [pc, #244] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004c50: 681b ldr r3, [r3, #0]
8004c52: f003 0302 and.w r3, r3, #2
8004c56: 2b00 cmp r3, #0
8004c58: d101 bne.n 8004c5e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004c5a: 2301 movs r3, #1
8004c5c: e06b b.n 8004d36 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8004c5e: 4b39 ldr r3, [pc, #228] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004c60: 685b ldr r3, [r3, #4]
8004c62: f023 0203 bic.w r2, r3, #3
8004c66: 687b ldr r3, [r7, #4]
8004c68: 685b ldr r3, [r3, #4]
8004c6a: 4936 ldr r1, [pc, #216] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004c6c: 4313 orrs r3, r2
8004c6e: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004c70: f7fd f8be bl 8001df0 <HAL_GetTick>
8004c74: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8004c76: e00a b.n 8004c8e <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8004c78: f7fd f8ba bl 8001df0 <HAL_GetTick>
8004c7c: 4602 mov r2, r0
8004c7e: 68fb ldr r3, [r7, #12]
8004c80: 1ad3 subs r3, r2, r3
8004c82: f241 3288 movw r2, #5000 @ 0x1388
8004c86: 4293 cmp r3, r2
8004c88: d901 bls.n 8004c8e <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8004c8a: 2303 movs r3, #3
8004c8c: e053 b.n 8004d36 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8004c8e: 4b2d ldr r3, [pc, #180] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004c90: 685b ldr r3, [r3, #4]
8004c92: f003 020c and.w r2, r3, #12
8004c96: 687b ldr r3, [r7, #4]
8004c98: 685b ldr r3, [r3, #4]
8004c9a: 009b lsls r3, r3, #2
8004c9c: 429a cmp r2, r3
8004c9e: d1eb bne.n 8004c78 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8004ca0: 4b27 ldr r3, [pc, #156] @ (8004d40 <HAL_RCC_ClockConfig+0x1c0>)
8004ca2: 681b ldr r3, [r3, #0]
8004ca4: f003 0307 and.w r3, r3, #7
8004ca8: 683a ldr r2, [r7, #0]
8004caa: 429a cmp r2, r3
8004cac: d210 bcs.n 8004cd0 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8004cae: 4b24 ldr r3, [pc, #144] @ (8004d40 <HAL_RCC_ClockConfig+0x1c0>)
8004cb0: 681b ldr r3, [r3, #0]
8004cb2: f023 0207 bic.w r2, r3, #7
8004cb6: 4922 ldr r1, [pc, #136] @ (8004d40 <HAL_RCC_ClockConfig+0x1c0>)
8004cb8: 683b ldr r3, [r7, #0]
8004cba: 4313 orrs r3, r2
8004cbc: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8004cbe: 4b20 ldr r3, [pc, #128] @ (8004d40 <HAL_RCC_ClockConfig+0x1c0>)
8004cc0: 681b ldr r3, [r3, #0]
8004cc2: f003 0307 and.w r3, r3, #7
8004cc6: 683a ldr r2, [r7, #0]
8004cc8: 429a cmp r2, r3
8004cca: d001 beq.n 8004cd0 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8004ccc: 2301 movs r3, #1
8004cce: e032 b.n 8004d36 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8004cd0: 687b ldr r3, [r7, #4]
8004cd2: 681b ldr r3, [r3, #0]
8004cd4: f003 0304 and.w r3, r3, #4
8004cd8: 2b00 cmp r3, #0
8004cda: d008 beq.n 8004cee <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8004cdc: 4b19 ldr r3, [pc, #100] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004cde: 685b ldr r3, [r3, #4]
8004ce0: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8004ce4: 687b ldr r3, [r7, #4]
8004ce6: 68db ldr r3, [r3, #12]
8004ce8: 4916 ldr r1, [pc, #88] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004cea: 4313 orrs r3, r2
8004cec: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8004cee: 687b ldr r3, [r7, #4]
8004cf0: 681b ldr r3, [r3, #0]
8004cf2: f003 0308 and.w r3, r3, #8
8004cf6: 2b00 cmp r3, #0
8004cf8: d009 beq.n 8004d0e <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8004cfa: 4b12 ldr r3, [pc, #72] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004cfc: 685b ldr r3, [r3, #4]
8004cfe: f423 5260 bic.w r2, r3, #14336 @ 0x3800
8004d02: 687b ldr r3, [r7, #4]
8004d04: 691b ldr r3, [r3, #16]
8004d06: 00db lsls r3, r3, #3
8004d08: 490e ldr r1, [pc, #56] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004d0a: 4313 orrs r3, r2
8004d0c: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
8004d0e: f000 f821 bl 8004d54 <HAL_RCC_GetSysClockFreq>
8004d12: 4602 mov r2, r0
8004d14: 4b0b ldr r3, [pc, #44] @ (8004d44 <HAL_RCC_ClockConfig+0x1c4>)
8004d16: 685b ldr r3, [r3, #4]
8004d18: 091b lsrs r3, r3, #4
8004d1a: f003 030f and.w r3, r3, #15
8004d1e: 490a ldr r1, [pc, #40] @ (8004d48 <HAL_RCC_ClockConfig+0x1c8>)
8004d20: 5ccb ldrb r3, [r1, r3]
8004d22: fa22 f303 lsr.w r3, r2, r3
8004d26: 4a09 ldr r2, [pc, #36] @ (8004d4c <HAL_RCC_ClockConfig+0x1cc>)
8004d28: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8004d2a: 4b09 ldr r3, [pc, #36] @ (8004d50 <HAL_RCC_ClockConfig+0x1d0>)
8004d2c: 681b ldr r3, [r3, #0]
8004d2e: 4618 mov r0, r3
8004d30: f7fd f81c bl 8001d6c <HAL_InitTick>
return HAL_OK;
8004d34: 2300 movs r3, #0
}
8004d36: 4618 mov r0, r3
8004d38: 3710 adds r7, #16
8004d3a: 46bd mov sp, r7
8004d3c: bd80 pop {r7, pc}
8004d3e: bf00 nop
8004d40: 40022000 .word 0x40022000
8004d44: 40021000 .word 0x40021000
8004d48: 0800b278 .word 0x0800b278
8004d4c: 20000004 .word 0x20000004
8004d50: 20000008 .word 0x20000008
08004d54 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8004d54: b480 push {r7}
8004d56: b087 sub sp, #28
8004d58: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8004d5a: 2300 movs r3, #0
8004d5c: 60fb str r3, [r7, #12]
8004d5e: 2300 movs r3, #0
8004d60: 60bb str r3, [r7, #8]
8004d62: 2300 movs r3, #0
8004d64: 617b str r3, [r7, #20]
8004d66: 2300 movs r3, #0
8004d68: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
8004d6a: 2300 movs r3, #0
8004d6c: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
8004d6e: 4b1e ldr r3, [pc, #120] @ (8004de8 <HAL_RCC_GetSysClockFreq+0x94>)
8004d70: 685b ldr r3, [r3, #4]
8004d72: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8004d74: 68fb ldr r3, [r7, #12]
8004d76: f003 030c and.w r3, r3, #12
8004d7a: 2b04 cmp r3, #4
8004d7c: d002 beq.n 8004d84 <HAL_RCC_GetSysClockFreq+0x30>
8004d7e: 2b08 cmp r3, #8
8004d80: d003 beq.n 8004d8a <HAL_RCC_GetSysClockFreq+0x36>
8004d82: e027 b.n 8004dd4 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8004d84: 4b19 ldr r3, [pc, #100] @ (8004dec <HAL_RCC_GetSysClockFreq+0x98>)
8004d86: 613b str r3, [r7, #16]
break;
8004d88: e027 b.n 8004dda <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
8004d8a: 68fb ldr r3, [r7, #12]
8004d8c: 0c9b lsrs r3, r3, #18
8004d8e: f003 030f and.w r3, r3, #15
8004d92: 4a17 ldr r2, [pc, #92] @ (8004df0 <HAL_RCC_GetSysClockFreq+0x9c>)
8004d94: 5cd3 ldrb r3, [r2, r3]
8004d96: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
8004d98: 68fb ldr r3, [r7, #12]
8004d9a: f403 3380 and.w r3, r3, #65536 @ 0x10000
8004d9e: 2b00 cmp r3, #0
8004da0: d010 beq.n 8004dc4 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
8004da2: 4b11 ldr r3, [pc, #68] @ (8004de8 <HAL_RCC_GetSysClockFreq+0x94>)
8004da4: 685b ldr r3, [r3, #4]
8004da6: 0c5b lsrs r3, r3, #17
8004da8: f003 0301 and.w r3, r3, #1
8004dac: 4a11 ldr r2, [pc, #68] @ (8004df4 <HAL_RCC_GetSysClockFreq+0xa0>)
8004dae: 5cd3 ldrb r3, [r2, r3]
8004db0: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
8004db2: 687b ldr r3, [r7, #4]
8004db4: 4a0d ldr r2, [pc, #52] @ (8004dec <HAL_RCC_GetSysClockFreq+0x98>)
8004db6: fb03 f202 mul.w r2, r3, r2
8004dba: 68bb ldr r3, [r7, #8]
8004dbc: fbb2 f3f3 udiv r3, r2, r3
8004dc0: 617b str r3, [r7, #20]
8004dc2: e004 b.n 8004dce <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8004dc4: 687b ldr r3, [r7, #4]
8004dc6: 4a0c ldr r2, [pc, #48] @ (8004df8 <HAL_RCC_GetSysClockFreq+0xa4>)
8004dc8: fb02 f303 mul.w r3, r2, r3
8004dcc: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8004dce: 697b ldr r3, [r7, #20]
8004dd0: 613b str r3, [r7, #16]
break;
8004dd2: e002 b.n 8004dda <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8004dd4: 4b05 ldr r3, [pc, #20] @ (8004dec <HAL_RCC_GetSysClockFreq+0x98>)
8004dd6: 613b str r3, [r7, #16]
break;
8004dd8: bf00 nop
}
}
return sysclockfreq;
8004dda: 693b ldr r3, [r7, #16]
}
8004ddc: 4618 mov r0, r3
8004dde: 371c adds r7, #28
8004de0: 46bd mov sp, r7
8004de2: bc80 pop {r7}
8004de4: 4770 bx lr
8004de6: bf00 nop
8004de8: 40021000 .word 0x40021000
8004dec: 007a1200 .word 0x007a1200
8004df0: 0800b290 .word 0x0800b290
8004df4: 0800b2a0 .word 0x0800b2a0
8004df8: 003d0900 .word 0x003d0900
08004dfc <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8004dfc: b480 push {r7}
8004dfe: af00 add r7, sp, #0
return SystemCoreClock;
8004e00: 4b02 ldr r3, [pc, #8] @ (8004e0c <HAL_RCC_GetHCLKFreq+0x10>)
8004e02: 681b ldr r3, [r3, #0]
}
8004e04: 4618 mov r0, r3
8004e06: 46bd mov sp, r7
8004e08: bc80 pop {r7}
8004e0a: 4770 bx lr
8004e0c: 20000004 .word 0x20000004
08004e10 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8004e10: b580 push {r7, lr}
8004e12: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8004e14: f7ff fff2 bl 8004dfc <HAL_RCC_GetHCLKFreq>
8004e18: 4602 mov r2, r0
8004e1a: 4b05 ldr r3, [pc, #20] @ (8004e30 <HAL_RCC_GetPCLK1Freq+0x20>)
8004e1c: 685b ldr r3, [r3, #4]
8004e1e: 0a1b lsrs r3, r3, #8
8004e20: f003 0307 and.w r3, r3, #7
8004e24: 4903 ldr r1, [pc, #12] @ (8004e34 <HAL_RCC_GetPCLK1Freq+0x24>)
8004e26: 5ccb ldrb r3, [r1, r3]
8004e28: fa22 f303 lsr.w r3, r2, r3
}
8004e2c: 4618 mov r0, r3
8004e2e: bd80 pop {r7, pc}
8004e30: 40021000 .word 0x40021000
8004e34: 0800b288 .word 0x0800b288
08004e38 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8004e38: b580 push {r7, lr}
8004e3a: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
8004e3c: f7ff ffde bl 8004dfc <HAL_RCC_GetHCLKFreq>
8004e40: 4602 mov r2, r0
8004e42: 4b05 ldr r3, [pc, #20] @ (8004e58 <HAL_RCC_GetPCLK2Freq+0x20>)
8004e44: 685b ldr r3, [r3, #4]
8004e46: 0adb lsrs r3, r3, #11
8004e48: f003 0307 and.w r3, r3, #7
8004e4c: 4903 ldr r1, [pc, #12] @ (8004e5c <HAL_RCC_GetPCLK2Freq+0x24>)
8004e4e: 5ccb ldrb r3, [r1, r3]
8004e50: fa22 f303 lsr.w r3, r2, r3
}
8004e54: 4618 mov r0, r3
8004e56: bd80 pop {r7, pc}
8004e58: 40021000 .word 0x40021000
8004e5c: 0800b288 .word 0x0800b288
08004e60 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8004e60: b480 push {r7}
8004e62: b085 sub sp, #20
8004e64: af00 add r7, sp, #0
8004e66: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8004e68: 4b0a ldr r3, [pc, #40] @ (8004e94 <RCC_Delay+0x34>)
8004e6a: 681b ldr r3, [r3, #0]
8004e6c: 4a0a ldr r2, [pc, #40] @ (8004e98 <RCC_Delay+0x38>)
8004e6e: fba2 2303 umull r2, r3, r2, r3
8004e72: 0a5b lsrs r3, r3, #9
8004e74: 687a ldr r2, [r7, #4]
8004e76: fb02 f303 mul.w r3, r2, r3
8004e7a: 60fb str r3, [r7, #12]
do
{
__NOP();
8004e7c: bf00 nop
}
while (Delay --);
8004e7e: 68fb ldr r3, [r7, #12]
8004e80: 1e5a subs r2, r3, #1
8004e82: 60fa str r2, [r7, #12]
8004e84: 2b00 cmp r3, #0
8004e86: d1f9 bne.n 8004e7c <RCC_Delay+0x1c>
}
8004e88: bf00 nop
8004e8a: bf00 nop
8004e8c: 3714 adds r7, #20
8004e8e: 46bd mov sp, r7
8004e90: bc80 pop {r7}
8004e92: 4770 bx lr
8004e94: 20000004 .word 0x20000004
8004e98: 10624dd3 .word 0x10624dd3
08004e9c <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8004e9c: b580 push {r7, lr}
8004e9e: b086 sub sp, #24
8004ea0: af00 add r7, sp, #0
8004ea2: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8004ea4: 2300 movs r3, #0
8004ea6: 613b str r3, [r7, #16]
8004ea8: 2300 movs r3, #0
8004eaa: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8004eac: 687b ldr r3, [r7, #4]
8004eae: 681b ldr r3, [r3, #0]
8004eb0: f003 0301 and.w r3, r3, #1
8004eb4: 2b00 cmp r3, #0
8004eb6: d07d beq.n 8004fb4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
8004eb8: 2300 movs r3, #0
8004eba: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8004ebc: 4b4f ldr r3, [pc, #316] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004ebe: 69db ldr r3, [r3, #28]
8004ec0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004ec4: 2b00 cmp r3, #0
8004ec6: d10d bne.n 8004ee4 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8004ec8: 4b4c ldr r3, [pc, #304] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004eca: 69db ldr r3, [r3, #28]
8004ecc: 4a4b ldr r2, [pc, #300] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004ece: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8004ed2: 61d3 str r3, [r2, #28]
8004ed4: 4b49 ldr r3, [pc, #292] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004ed6: 69db ldr r3, [r3, #28]
8004ed8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004edc: 60bb str r3, [r7, #8]
8004ede: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8004ee0: 2301 movs r3, #1
8004ee2: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004ee4: 4b46 ldr r3, [pc, #280] @ (8005000 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004ee6: 681b ldr r3, [r3, #0]
8004ee8: f403 7380 and.w r3, r3, #256 @ 0x100
8004eec: 2b00 cmp r3, #0
8004eee: d118 bne.n 8004f22 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8004ef0: 4b43 ldr r3, [pc, #268] @ (8005000 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004ef2: 681b ldr r3, [r3, #0]
8004ef4: 4a42 ldr r2, [pc, #264] @ (8005000 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004ef6: f443 7380 orr.w r3, r3, #256 @ 0x100
8004efa: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8004efc: f7fc ff78 bl 8001df0 <HAL_GetTick>
8004f00: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004f02: e008 b.n 8004f16 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8004f04: f7fc ff74 bl 8001df0 <HAL_GetTick>
8004f08: 4602 mov r2, r0
8004f0a: 693b ldr r3, [r7, #16]
8004f0c: 1ad3 subs r3, r2, r3
8004f0e: 2b64 cmp r3, #100 @ 0x64
8004f10: d901 bls.n 8004f16 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8004f12: 2303 movs r3, #3
8004f14: e06d b.n 8004ff2 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004f16: 4b3a ldr r3, [pc, #232] @ (8005000 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004f18: 681b ldr r3, [r3, #0]
8004f1a: f403 7380 and.w r3, r3, #256 @ 0x100
8004f1e: 2b00 cmp r3, #0
8004f20: d0f0 beq.n 8004f04 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8004f22: 4b36 ldr r3, [pc, #216] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004f24: 6a1b ldr r3, [r3, #32]
8004f26: f403 7340 and.w r3, r3, #768 @ 0x300
8004f2a: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8004f2c: 68fb ldr r3, [r7, #12]
8004f2e: 2b00 cmp r3, #0
8004f30: d02e beq.n 8004f90 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8004f32: 687b ldr r3, [r7, #4]
8004f34: 685b ldr r3, [r3, #4]
8004f36: f403 7340 and.w r3, r3, #768 @ 0x300
8004f3a: 68fa ldr r2, [r7, #12]
8004f3c: 429a cmp r2, r3
8004f3e: d027 beq.n 8004f90 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8004f40: 4b2e ldr r3, [pc, #184] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004f42: 6a1b ldr r3, [r3, #32]
8004f44: f423 7340 bic.w r3, r3, #768 @ 0x300
8004f48: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8004f4a: 4b2e ldr r3, [pc, #184] @ (8005004 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8004f4c: 2201 movs r2, #1
8004f4e: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8004f50: 4b2c ldr r3, [pc, #176] @ (8005004 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8004f52: 2200 movs r2, #0
8004f54: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8004f56: 4a29 ldr r2, [pc, #164] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004f58: 68fb ldr r3, [r7, #12]
8004f5a: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8004f5c: 68fb ldr r3, [r7, #12]
8004f5e: f003 0301 and.w r3, r3, #1
8004f62: 2b00 cmp r3, #0
8004f64: d014 beq.n 8004f90 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004f66: f7fc ff43 bl 8001df0 <HAL_GetTick>
8004f6a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004f6c: e00a b.n 8004f84 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8004f6e: f7fc ff3f bl 8001df0 <HAL_GetTick>
8004f72: 4602 mov r2, r0
8004f74: 693b ldr r3, [r7, #16]
8004f76: 1ad3 subs r3, r2, r3
8004f78: f241 3288 movw r2, #5000 @ 0x1388
8004f7c: 4293 cmp r3, r2
8004f7e: d901 bls.n 8004f84 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8004f80: 2303 movs r3, #3
8004f82: e036 b.n 8004ff2 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004f84: 4b1d ldr r3, [pc, #116] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004f86: 6a1b ldr r3, [r3, #32]
8004f88: f003 0302 and.w r3, r3, #2
8004f8c: 2b00 cmp r3, #0
8004f8e: d0ee beq.n 8004f6e <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8004f90: 4b1a ldr r3, [pc, #104] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004f92: 6a1b ldr r3, [r3, #32]
8004f94: f423 7240 bic.w r2, r3, #768 @ 0x300
8004f98: 687b ldr r3, [r7, #4]
8004f9a: 685b ldr r3, [r3, #4]
8004f9c: 4917 ldr r1, [pc, #92] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004f9e: 4313 orrs r3, r2
8004fa0: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8004fa2: 7dfb ldrb r3, [r7, #23]
8004fa4: 2b01 cmp r3, #1
8004fa6: d105 bne.n 8004fb4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8004fa8: 4b14 ldr r3, [pc, #80] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004faa: 69db ldr r3, [r3, #28]
8004fac: 4a13 ldr r2, [pc, #76] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004fae: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8004fb2: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8004fb4: 687b ldr r3, [r7, #4]
8004fb6: 681b ldr r3, [r3, #0]
8004fb8: f003 0302 and.w r3, r3, #2
8004fbc: 2b00 cmp r3, #0
8004fbe: d008 beq.n 8004fd2 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8004fc0: 4b0e ldr r3, [pc, #56] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004fc2: 685b ldr r3, [r3, #4]
8004fc4: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8004fc8: 687b ldr r3, [r7, #4]
8004fca: 689b ldr r3, [r3, #8]
8004fcc: 490b ldr r1, [pc, #44] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004fce: 4313 orrs r3, r2
8004fd0: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8004fd2: 687b ldr r3, [r7, #4]
8004fd4: 681b ldr r3, [r3, #0]
8004fd6: f003 0310 and.w r3, r3, #16
8004fda: 2b00 cmp r3, #0
8004fdc: d008 beq.n 8004ff0 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8004fde: 4b07 ldr r3, [pc, #28] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004fe0: 685b ldr r3, [r3, #4]
8004fe2: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8004fe6: 687b ldr r3, [r7, #4]
8004fe8: 68db ldr r3, [r3, #12]
8004fea: 4904 ldr r1, [pc, #16] @ (8004ffc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004fec: 4313 orrs r3, r2
8004fee: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8004ff0: 2300 movs r3, #0
}
8004ff2: 4618 mov r0, r3
8004ff4: 3718 adds r7, #24
8004ff6: 46bd mov sp, r7
8004ff8: bd80 pop {r7, pc}
8004ffa: bf00 nop
8004ffc: 40021000 .word 0x40021000
8005000: 40007000 .word 0x40007000
8005004: 42420440 .word 0x42420440
08005008 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8005008: b580 push {r7, lr}
800500a: b082 sub sp, #8
800500c: af00 add r7, sp, #0
800500e: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8005010: 687b ldr r3, [r7, #4]
8005012: 2b00 cmp r3, #0
8005014: d101 bne.n 800501a <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8005016: 2301 movs r3, #1
8005018: e041 b.n 800509e <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
800501a: 687b ldr r3, [r7, #4]
800501c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8005020: b2db uxtb r3, r3
8005022: 2b00 cmp r3, #0
8005024: d106 bne.n 8005034 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8005026: 687b ldr r3, [r7, #4]
8005028: 2200 movs r2, #0
800502a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
800502e: 6878 ldr r0, [r7, #4]
8005030: f7fc fd1c bl 8001a6c <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8005034: 687b ldr r3, [r7, #4]
8005036: 2202 movs r2, #2
8005038: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
800503c: 687b ldr r3, [r7, #4]
800503e: 681a ldr r2, [r3, #0]
8005040: 687b ldr r3, [r7, #4]
8005042: 3304 adds r3, #4
8005044: 4619 mov r1, r3
8005046: 4610 mov r0, r2
8005048: f000 fb3e bl 80056c8 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
800504c: 687b ldr r3, [r7, #4]
800504e: 2201 movs r2, #1
8005050: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8005054: 687b ldr r3, [r7, #4]
8005056: 2201 movs r2, #1
8005058: f883 203e strb.w r2, [r3, #62] @ 0x3e
800505c: 687b ldr r3, [r7, #4]
800505e: 2201 movs r2, #1
8005060: f883 203f strb.w r2, [r3, #63] @ 0x3f
8005064: 687b ldr r3, [r7, #4]
8005066: 2201 movs r2, #1
8005068: f883 2040 strb.w r2, [r3, #64] @ 0x40
800506c: 687b ldr r3, [r7, #4]
800506e: 2201 movs r2, #1
8005070: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8005074: 687b ldr r3, [r7, #4]
8005076: 2201 movs r2, #1
8005078: f883 2042 strb.w r2, [r3, #66] @ 0x42
800507c: 687b ldr r3, [r7, #4]
800507e: 2201 movs r2, #1
8005080: f883 2043 strb.w r2, [r3, #67] @ 0x43
8005084: 687b ldr r3, [r7, #4]
8005086: 2201 movs r2, #1
8005088: f883 2044 strb.w r2, [r3, #68] @ 0x44
800508c: 687b ldr r3, [r7, #4]
800508e: 2201 movs r2, #1
8005090: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8005094: 687b ldr r3, [r7, #4]
8005096: 2201 movs r2, #1
8005098: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800509c: 2300 movs r3, #0
}
800509e: 4618 mov r0, r3
80050a0: 3708 adds r7, #8
80050a2: 46bd mov sp, r7
80050a4: bd80 pop {r7, pc}
080050a6 <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
80050a6: b580 push {r7, lr}
80050a8: b082 sub sp, #8
80050aa: af00 add r7, sp, #0
80050ac: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
80050ae: 687b ldr r3, [r7, #4]
80050b0: 2b00 cmp r3, #0
80050b2: d101 bne.n 80050b8 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
80050b4: 2301 movs r3, #1
80050b6: e041 b.n 800513c <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
80050b8: 687b ldr r3, [r7, #4]
80050ba: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
80050be: b2db uxtb r3, r3
80050c0: 2b00 cmp r3, #0
80050c2: d106 bne.n 80050d2 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
80050c4: 687b ldr r3, [r7, #4]
80050c6: 2200 movs r2, #0
80050c8: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
80050cc: 6878 ldr r0, [r7, #4]
80050ce: f000 f839 bl 8005144 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
80050d2: 687b ldr r3, [r7, #4]
80050d4: 2202 movs r2, #2
80050d6: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
80050da: 687b ldr r3, [r7, #4]
80050dc: 681a ldr r2, [r3, #0]
80050de: 687b ldr r3, [r7, #4]
80050e0: 3304 adds r3, #4
80050e2: 4619 mov r1, r3
80050e4: 4610 mov r0, r2
80050e6: f000 faef bl 80056c8 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
80050ea: 687b ldr r3, [r7, #4]
80050ec: 2201 movs r2, #1
80050ee: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
80050f2: 687b ldr r3, [r7, #4]
80050f4: 2201 movs r2, #1
80050f6: f883 203e strb.w r2, [r3, #62] @ 0x3e
80050fa: 687b ldr r3, [r7, #4]
80050fc: 2201 movs r2, #1
80050fe: f883 203f strb.w r2, [r3, #63] @ 0x3f
8005102: 687b ldr r3, [r7, #4]
8005104: 2201 movs r2, #1
8005106: f883 2040 strb.w r2, [r3, #64] @ 0x40
800510a: 687b ldr r3, [r7, #4]
800510c: 2201 movs r2, #1
800510e: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8005112: 687b ldr r3, [r7, #4]
8005114: 2201 movs r2, #1
8005116: f883 2042 strb.w r2, [r3, #66] @ 0x42
800511a: 687b ldr r3, [r7, #4]
800511c: 2201 movs r2, #1
800511e: f883 2043 strb.w r2, [r3, #67] @ 0x43
8005122: 687b ldr r3, [r7, #4]
8005124: 2201 movs r2, #1
8005126: f883 2044 strb.w r2, [r3, #68] @ 0x44
800512a: 687b ldr r3, [r7, #4]
800512c: 2201 movs r2, #1
800512e: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8005132: 687b ldr r3, [r7, #4]
8005134: 2201 movs r2, #1
8005136: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800513a: 2300 movs r3, #0
}
800513c: 4618 mov r0, r3
800513e: 3708 adds r7, #8
8005140: 46bd mov sp, r7
8005142: bd80 pop {r7, pc}
08005144 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8005144: b480 push {r7}
8005146: b083 sub sp, #12
8005148: af00 add r7, sp, #0
800514a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
800514c: bf00 nop
800514e: 370c adds r7, #12
8005150: 46bd mov sp, r7
8005152: bc80 pop {r7}
8005154: 4770 bx lr
...
08005158 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8005158: b580 push {r7, lr}
800515a: b084 sub sp, #16
800515c: af00 add r7, sp, #0
800515e: 6078 str r0, [r7, #4]
8005160: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8005162: 683b ldr r3, [r7, #0]
8005164: 2b00 cmp r3, #0
8005166: d109 bne.n 800517c <HAL_TIM_PWM_Start+0x24>
8005168: 687b ldr r3, [r7, #4]
800516a: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
800516e: b2db uxtb r3, r3
8005170: 2b01 cmp r3, #1
8005172: bf14 ite ne
8005174: 2301 movne r3, #1
8005176: 2300 moveq r3, #0
8005178: b2db uxtb r3, r3
800517a: e022 b.n 80051c2 <HAL_TIM_PWM_Start+0x6a>
800517c: 683b ldr r3, [r7, #0]
800517e: 2b04 cmp r3, #4
8005180: d109 bne.n 8005196 <HAL_TIM_PWM_Start+0x3e>
8005182: 687b ldr r3, [r7, #4]
8005184: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8005188: b2db uxtb r3, r3
800518a: 2b01 cmp r3, #1
800518c: bf14 ite ne
800518e: 2301 movne r3, #1
8005190: 2300 moveq r3, #0
8005192: b2db uxtb r3, r3
8005194: e015 b.n 80051c2 <HAL_TIM_PWM_Start+0x6a>
8005196: 683b ldr r3, [r7, #0]
8005198: 2b08 cmp r3, #8
800519a: d109 bne.n 80051b0 <HAL_TIM_PWM_Start+0x58>
800519c: 687b ldr r3, [r7, #4]
800519e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80051a2: b2db uxtb r3, r3
80051a4: 2b01 cmp r3, #1
80051a6: bf14 ite ne
80051a8: 2301 movne r3, #1
80051aa: 2300 moveq r3, #0
80051ac: b2db uxtb r3, r3
80051ae: e008 b.n 80051c2 <HAL_TIM_PWM_Start+0x6a>
80051b0: 687b ldr r3, [r7, #4]
80051b2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80051b6: b2db uxtb r3, r3
80051b8: 2b01 cmp r3, #1
80051ba: bf14 ite ne
80051bc: 2301 movne r3, #1
80051be: 2300 moveq r3, #0
80051c0: b2db uxtb r3, r3
80051c2: 2b00 cmp r3, #0
80051c4: d001 beq.n 80051ca <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
80051c6: 2301 movs r3, #1
80051c8: e05e b.n 8005288 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
80051ca: 683b ldr r3, [r7, #0]
80051cc: 2b00 cmp r3, #0
80051ce: d104 bne.n 80051da <HAL_TIM_PWM_Start+0x82>
80051d0: 687b ldr r3, [r7, #4]
80051d2: 2202 movs r2, #2
80051d4: f883 203e strb.w r2, [r3, #62] @ 0x3e
80051d8: e013 b.n 8005202 <HAL_TIM_PWM_Start+0xaa>
80051da: 683b ldr r3, [r7, #0]
80051dc: 2b04 cmp r3, #4
80051de: d104 bne.n 80051ea <HAL_TIM_PWM_Start+0x92>
80051e0: 687b ldr r3, [r7, #4]
80051e2: 2202 movs r2, #2
80051e4: f883 203f strb.w r2, [r3, #63] @ 0x3f
80051e8: e00b b.n 8005202 <HAL_TIM_PWM_Start+0xaa>
80051ea: 683b ldr r3, [r7, #0]
80051ec: 2b08 cmp r3, #8
80051ee: d104 bne.n 80051fa <HAL_TIM_PWM_Start+0xa2>
80051f0: 687b ldr r3, [r7, #4]
80051f2: 2202 movs r2, #2
80051f4: f883 2040 strb.w r2, [r3, #64] @ 0x40
80051f8: e003 b.n 8005202 <HAL_TIM_PWM_Start+0xaa>
80051fa: 687b ldr r3, [r7, #4]
80051fc: 2202 movs r2, #2
80051fe: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
8005202: 687b ldr r3, [r7, #4]
8005204: 681b ldr r3, [r3, #0]
8005206: 2201 movs r2, #1
8005208: 6839 ldr r1, [r7, #0]
800520a: 4618 mov r0, r3
800520c: f000 fce8 bl 8005be0 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8005210: 687b ldr r3, [r7, #4]
8005212: 681b ldr r3, [r3, #0]
8005214: 4a1e ldr r2, [pc, #120] @ (8005290 <HAL_TIM_PWM_Start+0x138>)
8005216: 4293 cmp r3, r2
8005218: d107 bne.n 800522a <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
800521a: 687b ldr r3, [r7, #4]
800521c: 681b ldr r3, [r3, #0]
800521e: 6c5a ldr r2, [r3, #68] @ 0x44
8005220: 687b ldr r3, [r7, #4]
8005222: 681b ldr r3, [r3, #0]
8005224: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8005228: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800522a: 687b ldr r3, [r7, #4]
800522c: 681b ldr r3, [r3, #0]
800522e: 4a18 ldr r2, [pc, #96] @ (8005290 <HAL_TIM_PWM_Start+0x138>)
8005230: 4293 cmp r3, r2
8005232: d00e beq.n 8005252 <HAL_TIM_PWM_Start+0xfa>
8005234: 687b ldr r3, [r7, #4]
8005236: 681b ldr r3, [r3, #0]
8005238: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800523c: d009 beq.n 8005252 <HAL_TIM_PWM_Start+0xfa>
800523e: 687b ldr r3, [r7, #4]
8005240: 681b ldr r3, [r3, #0]
8005242: 4a14 ldr r2, [pc, #80] @ (8005294 <HAL_TIM_PWM_Start+0x13c>)
8005244: 4293 cmp r3, r2
8005246: d004 beq.n 8005252 <HAL_TIM_PWM_Start+0xfa>
8005248: 687b ldr r3, [r7, #4]
800524a: 681b ldr r3, [r3, #0]
800524c: 4a12 ldr r2, [pc, #72] @ (8005298 <HAL_TIM_PWM_Start+0x140>)
800524e: 4293 cmp r3, r2
8005250: d111 bne.n 8005276 <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8005252: 687b ldr r3, [r7, #4]
8005254: 681b ldr r3, [r3, #0]
8005256: 689b ldr r3, [r3, #8]
8005258: f003 0307 and.w r3, r3, #7
800525c: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
800525e: 68fb ldr r3, [r7, #12]
8005260: 2b06 cmp r3, #6
8005262: d010 beq.n 8005286 <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8005264: 687b ldr r3, [r7, #4]
8005266: 681b ldr r3, [r3, #0]
8005268: 681a ldr r2, [r3, #0]
800526a: 687b ldr r3, [r7, #4]
800526c: 681b ldr r3, [r3, #0]
800526e: f042 0201 orr.w r2, r2, #1
8005272: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8005274: e007 b.n 8005286 <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8005276: 687b ldr r3, [r7, #4]
8005278: 681b ldr r3, [r3, #0]
800527a: 681a ldr r2, [r3, #0]
800527c: 687b ldr r3, [r7, #4]
800527e: 681b ldr r3, [r3, #0]
8005280: f042 0201 orr.w r2, r2, #1
8005284: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8005286: 2300 movs r3, #0
}
8005288: 4618 mov r0, r3
800528a: 3710 adds r7, #16
800528c: 46bd mov sp, r7
800528e: bd80 pop {r7, pc}
8005290: 40012c00 .word 0x40012c00
8005294: 40000400 .word 0x40000400
8005298: 40000800 .word 0x40000800
0800529c <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
800529c: b580 push {r7, lr}
800529e: b082 sub sp, #8
80052a0: af00 add r7, sp, #0
80052a2: 6078 str r0, [r7, #4]
80052a4: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
80052a6: 687b ldr r3, [r7, #4]
80052a8: 681b ldr r3, [r3, #0]
80052aa: 2200 movs r2, #0
80052ac: 6839 ldr r1, [r7, #0]
80052ae: 4618 mov r0, r3
80052b0: f000 fc96 bl 8005be0 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
80052b4: 687b ldr r3, [r7, #4]
80052b6: 681b ldr r3, [r3, #0]
80052b8: 4a29 ldr r2, [pc, #164] @ (8005360 <HAL_TIM_PWM_Stop+0xc4>)
80052ba: 4293 cmp r3, r2
80052bc: d117 bne.n 80052ee <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
80052be: 687b ldr r3, [r7, #4]
80052c0: 681b ldr r3, [r3, #0]
80052c2: 6a1a ldr r2, [r3, #32]
80052c4: f241 1311 movw r3, #4369 @ 0x1111
80052c8: 4013 ands r3, r2
80052ca: 2b00 cmp r3, #0
80052cc: d10f bne.n 80052ee <HAL_TIM_PWM_Stop+0x52>
80052ce: 687b ldr r3, [r7, #4]
80052d0: 681b ldr r3, [r3, #0]
80052d2: 6a1a ldr r2, [r3, #32]
80052d4: f240 4344 movw r3, #1092 @ 0x444
80052d8: 4013 ands r3, r2
80052da: 2b00 cmp r3, #0
80052dc: d107 bne.n 80052ee <HAL_TIM_PWM_Stop+0x52>
80052de: 687b ldr r3, [r7, #4]
80052e0: 681b ldr r3, [r3, #0]
80052e2: 6c5a ldr r2, [r3, #68] @ 0x44
80052e4: 687b ldr r3, [r7, #4]
80052e6: 681b ldr r3, [r3, #0]
80052e8: f422 4200 bic.w r2, r2, #32768 @ 0x8000
80052ec: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
80052ee: 687b ldr r3, [r7, #4]
80052f0: 681b ldr r3, [r3, #0]
80052f2: 6a1a ldr r2, [r3, #32]
80052f4: f241 1311 movw r3, #4369 @ 0x1111
80052f8: 4013 ands r3, r2
80052fa: 2b00 cmp r3, #0
80052fc: d10f bne.n 800531e <HAL_TIM_PWM_Stop+0x82>
80052fe: 687b ldr r3, [r7, #4]
8005300: 681b ldr r3, [r3, #0]
8005302: 6a1a ldr r2, [r3, #32]
8005304: f240 4344 movw r3, #1092 @ 0x444
8005308: 4013 ands r3, r2
800530a: 2b00 cmp r3, #0
800530c: d107 bne.n 800531e <HAL_TIM_PWM_Stop+0x82>
800530e: 687b ldr r3, [r7, #4]
8005310: 681b ldr r3, [r3, #0]
8005312: 681a ldr r2, [r3, #0]
8005314: 687b ldr r3, [r7, #4]
8005316: 681b ldr r3, [r3, #0]
8005318: f022 0201 bic.w r2, r2, #1
800531c: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
800531e: 683b ldr r3, [r7, #0]
8005320: 2b00 cmp r3, #0
8005322: d104 bne.n 800532e <HAL_TIM_PWM_Stop+0x92>
8005324: 687b ldr r3, [r7, #4]
8005326: 2201 movs r2, #1
8005328: f883 203e strb.w r2, [r3, #62] @ 0x3e
800532c: e013 b.n 8005356 <HAL_TIM_PWM_Stop+0xba>
800532e: 683b ldr r3, [r7, #0]
8005330: 2b04 cmp r3, #4
8005332: d104 bne.n 800533e <HAL_TIM_PWM_Stop+0xa2>
8005334: 687b ldr r3, [r7, #4]
8005336: 2201 movs r2, #1
8005338: f883 203f strb.w r2, [r3, #63] @ 0x3f
800533c: e00b b.n 8005356 <HAL_TIM_PWM_Stop+0xba>
800533e: 683b ldr r3, [r7, #0]
8005340: 2b08 cmp r3, #8
8005342: d104 bne.n 800534e <HAL_TIM_PWM_Stop+0xb2>
8005344: 687b ldr r3, [r7, #4]
8005346: 2201 movs r2, #1
8005348: f883 2040 strb.w r2, [r3, #64] @ 0x40
800534c: e003 b.n 8005356 <HAL_TIM_PWM_Stop+0xba>
800534e: 687b ldr r3, [r7, #4]
8005350: 2201 movs r2, #1
8005352: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
8005356: 2300 movs r3, #0
}
8005358: 4618 mov r0, r3
800535a: 3708 adds r7, #8
800535c: 46bd mov sp, r7
800535e: bd80 pop {r7, pc}
8005360: 40012c00 .word 0x40012c00
08005364 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8005364: b580 push {r7, lr}
8005366: b086 sub sp, #24
8005368: af00 add r7, sp, #0
800536a: 60f8 str r0, [r7, #12]
800536c: 60b9 str r1, [r7, #8]
800536e: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8005370: 2300 movs r3, #0
8005372: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8005374: 68fb ldr r3, [r7, #12]
8005376: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800537a: 2b01 cmp r3, #1
800537c: d101 bne.n 8005382 <HAL_TIM_PWM_ConfigChannel+0x1e>
800537e: 2302 movs r3, #2
8005380: e0ae b.n 80054e0 <HAL_TIM_PWM_ConfigChannel+0x17c>
8005382: 68fb ldr r3, [r7, #12]
8005384: 2201 movs r2, #1
8005386: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
800538a: 687b ldr r3, [r7, #4]
800538c: 2b0c cmp r3, #12
800538e: f200 809f bhi.w 80054d0 <HAL_TIM_PWM_ConfigChannel+0x16c>
8005392: a201 add r2, pc, #4 @ (adr r2, 8005398 <HAL_TIM_PWM_ConfigChannel+0x34>)
8005394: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005398: 080053cd .word 0x080053cd
800539c: 080054d1 .word 0x080054d1
80053a0: 080054d1 .word 0x080054d1
80053a4: 080054d1 .word 0x080054d1
80053a8: 0800540d .word 0x0800540d
80053ac: 080054d1 .word 0x080054d1
80053b0: 080054d1 .word 0x080054d1
80053b4: 080054d1 .word 0x080054d1
80053b8: 0800544f .word 0x0800544f
80053bc: 080054d1 .word 0x080054d1
80053c0: 080054d1 .word 0x080054d1
80053c4: 080054d1 .word 0x080054d1
80053c8: 0800548f .word 0x0800548f
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
80053cc: 68fb ldr r3, [r7, #12]
80053ce: 681b ldr r3, [r3, #0]
80053d0: 68b9 ldr r1, [r7, #8]
80053d2: 4618 mov r0, r3
80053d4: f000 f9e6 bl 80057a4 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
80053d8: 68fb ldr r3, [r7, #12]
80053da: 681b ldr r3, [r3, #0]
80053dc: 699a ldr r2, [r3, #24]
80053de: 68fb ldr r3, [r7, #12]
80053e0: 681b ldr r3, [r3, #0]
80053e2: f042 0208 orr.w r2, r2, #8
80053e6: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
80053e8: 68fb ldr r3, [r7, #12]
80053ea: 681b ldr r3, [r3, #0]
80053ec: 699a ldr r2, [r3, #24]
80053ee: 68fb ldr r3, [r7, #12]
80053f0: 681b ldr r3, [r3, #0]
80053f2: f022 0204 bic.w r2, r2, #4
80053f6: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
80053f8: 68fb ldr r3, [r7, #12]
80053fa: 681b ldr r3, [r3, #0]
80053fc: 6999 ldr r1, [r3, #24]
80053fe: 68bb ldr r3, [r7, #8]
8005400: 691a ldr r2, [r3, #16]
8005402: 68fb ldr r3, [r7, #12]
8005404: 681b ldr r3, [r3, #0]
8005406: 430a orrs r2, r1
8005408: 619a str r2, [r3, #24]
break;
800540a: e064 b.n 80054d6 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
800540c: 68fb ldr r3, [r7, #12]
800540e: 681b ldr r3, [r3, #0]
8005410: 68b9 ldr r1, [r7, #8]
8005412: 4618 mov r0, r3
8005414: f000 fa2c bl 8005870 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8005418: 68fb ldr r3, [r7, #12]
800541a: 681b ldr r3, [r3, #0]
800541c: 699a ldr r2, [r3, #24]
800541e: 68fb ldr r3, [r7, #12]
8005420: 681b ldr r3, [r3, #0]
8005422: f442 6200 orr.w r2, r2, #2048 @ 0x800
8005426: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8005428: 68fb ldr r3, [r7, #12]
800542a: 681b ldr r3, [r3, #0]
800542c: 699a ldr r2, [r3, #24]
800542e: 68fb ldr r3, [r7, #12]
8005430: 681b ldr r3, [r3, #0]
8005432: f422 6280 bic.w r2, r2, #1024 @ 0x400
8005436: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8005438: 68fb ldr r3, [r7, #12]
800543a: 681b ldr r3, [r3, #0]
800543c: 6999 ldr r1, [r3, #24]
800543e: 68bb ldr r3, [r7, #8]
8005440: 691b ldr r3, [r3, #16]
8005442: 021a lsls r2, r3, #8
8005444: 68fb ldr r3, [r7, #12]
8005446: 681b ldr r3, [r3, #0]
8005448: 430a orrs r2, r1
800544a: 619a str r2, [r3, #24]
break;
800544c: e043 b.n 80054d6 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
800544e: 68fb ldr r3, [r7, #12]
8005450: 681b ldr r3, [r3, #0]
8005452: 68b9 ldr r1, [r7, #8]
8005454: 4618 mov r0, r3
8005456: f000 fa75 bl 8005944 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
800545a: 68fb ldr r3, [r7, #12]
800545c: 681b ldr r3, [r3, #0]
800545e: 69da ldr r2, [r3, #28]
8005460: 68fb ldr r3, [r7, #12]
8005462: 681b ldr r3, [r3, #0]
8005464: f042 0208 orr.w r2, r2, #8
8005468: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
800546a: 68fb ldr r3, [r7, #12]
800546c: 681b ldr r3, [r3, #0]
800546e: 69da ldr r2, [r3, #28]
8005470: 68fb ldr r3, [r7, #12]
8005472: 681b ldr r3, [r3, #0]
8005474: f022 0204 bic.w r2, r2, #4
8005478: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
800547a: 68fb ldr r3, [r7, #12]
800547c: 681b ldr r3, [r3, #0]
800547e: 69d9 ldr r1, [r3, #28]
8005480: 68bb ldr r3, [r7, #8]
8005482: 691a ldr r2, [r3, #16]
8005484: 68fb ldr r3, [r7, #12]
8005486: 681b ldr r3, [r3, #0]
8005488: 430a orrs r2, r1
800548a: 61da str r2, [r3, #28]
break;
800548c: e023 b.n 80054d6 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
800548e: 68fb ldr r3, [r7, #12]
8005490: 681b ldr r3, [r3, #0]
8005492: 68b9 ldr r1, [r7, #8]
8005494: 4618 mov r0, r3
8005496: f000 fabf bl 8005a18 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
800549a: 68fb ldr r3, [r7, #12]
800549c: 681b ldr r3, [r3, #0]
800549e: 69da ldr r2, [r3, #28]
80054a0: 68fb ldr r3, [r7, #12]
80054a2: 681b ldr r3, [r3, #0]
80054a4: f442 6200 orr.w r2, r2, #2048 @ 0x800
80054a8: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
80054aa: 68fb ldr r3, [r7, #12]
80054ac: 681b ldr r3, [r3, #0]
80054ae: 69da ldr r2, [r3, #28]
80054b0: 68fb ldr r3, [r7, #12]
80054b2: 681b ldr r3, [r3, #0]
80054b4: f422 6280 bic.w r2, r2, #1024 @ 0x400
80054b8: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
80054ba: 68fb ldr r3, [r7, #12]
80054bc: 681b ldr r3, [r3, #0]
80054be: 69d9 ldr r1, [r3, #28]
80054c0: 68bb ldr r3, [r7, #8]
80054c2: 691b ldr r3, [r3, #16]
80054c4: 021a lsls r2, r3, #8
80054c6: 68fb ldr r3, [r7, #12]
80054c8: 681b ldr r3, [r3, #0]
80054ca: 430a orrs r2, r1
80054cc: 61da str r2, [r3, #28]
break;
80054ce: e002 b.n 80054d6 <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
80054d0: 2301 movs r3, #1
80054d2: 75fb strb r3, [r7, #23]
break;
80054d4: bf00 nop
}
__HAL_UNLOCK(htim);
80054d6: 68fb ldr r3, [r7, #12]
80054d8: 2200 movs r2, #0
80054da: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
80054de: 7dfb ldrb r3, [r7, #23]
}
80054e0: 4618 mov r0, r3
80054e2: 3718 adds r7, #24
80054e4: 46bd mov sp, r7
80054e6: bd80 pop {r7, pc}
080054e8 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
80054e8: b580 push {r7, lr}
80054ea: b084 sub sp, #16
80054ec: af00 add r7, sp, #0
80054ee: 6078 str r0, [r7, #4]
80054f0: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
80054f2: 2300 movs r3, #0
80054f4: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
80054f6: 687b ldr r3, [r7, #4]
80054f8: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80054fc: 2b01 cmp r3, #1
80054fe: d101 bne.n 8005504 <HAL_TIM_ConfigClockSource+0x1c>
8005500: 2302 movs r3, #2
8005502: e0b4 b.n 800566e <HAL_TIM_ConfigClockSource+0x186>
8005504: 687b ldr r3, [r7, #4]
8005506: 2201 movs r2, #1
8005508: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
800550c: 687b ldr r3, [r7, #4]
800550e: 2202 movs r2, #2
8005510: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8005514: 687b ldr r3, [r7, #4]
8005516: 681b ldr r3, [r3, #0]
8005518: 689b ldr r3, [r3, #8]
800551a: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
800551c: 68bb ldr r3, [r7, #8]
800551e: f023 0377 bic.w r3, r3, #119 @ 0x77
8005522: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8005524: 68bb ldr r3, [r7, #8]
8005526: f423 437f bic.w r3, r3, #65280 @ 0xff00
800552a: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
800552c: 687b ldr r3, [r7, #4]
800552e: 681b ldr r3, [r3, #0]
8005530: 68ba ldr r2, [r7, #8]
8005532: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8005534: 683b ldr r3, [r7, #0]
8005536: 681b ldr r3, [r3, #0]
8005538: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800553c: d03e beq.n 80055bc <HAL_TIM_ConfigClockSource+0xd4>
800553e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8005542: f200 8087 bhi.w 8005654 <HAL_TIM_ConfigClockSource+0x16c>
8005546: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800554a: f000 8086 beq.w 800565a <HAL_TIM_ConfigClockSource+0x172>
800554e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8005552: d87f bhi.n 8005654 <HAL_TIM_ConfigClockSource+0x16c>
8005554: 2b70 cmp r3, #112 @ 0x70
8005556: d01a beq.n 800558e <HAL_TIM_ConfigClockSource+0xa6>
8005558: 2b70 cmp r3, #112 @ 0x70
800555a: d87b bhi.n 8005654 <HAL_TIM_ConfigClockSource+0x16c>
800555c: 2b60 cmp r3, #96 @ 0x60
800555e: d050 beq.n 8005602 <HAL_TIM_ConfigClockSource+0x11a>
8005560: 2b60 cmp r3, #96 @ 0x60
8005562: d877 bhi.n 8005654 <HAL_TIM_ConfigClockSource+0x16c>
8005564: 2b50 cmp r3, #80 @ 0x50
8005566: d03c beq.n 80055e2 <HAL_TIM_ConfigClockSource+0xfa>
8005568: 2b50 cmp r3, #80 @ 0x50
800556a: d873 bhi.n 8005654 <HAL_TIM_ConfigClockSource+0x16c>
800556c: 2b40 cmp r3, #64 @ 0x40
800556e: d058 beq.n 8005622 <HAL_TIM_ConfigClockSource+0x13a>
8005570: 2b40 cmp r3, #64 @ 0x40
8005572: d86f bhi.n 8005654 <HAL_TIM_ConfigClockSource+0x16c>
8005574: 2b30 cmp r3, #48 @ 0x30
8005576: d064 beq.n 8005642 <HAL_TIM_ConfigClockSource+0x15a>
8005578: 2b30 cmp r3, #48 @ 0x30
800557a: d86b bhi.n 8005654 <HAL_TIM_ConfigClockSource+0x16c>
800557c: 2b20 cmp r3, #32
800557e: d060 beq.n 8005642 <HAL_TIM_ConfigClockSource+0x15a>
8005580: 2b20 cmp r3, #32
8005582: d867 bhi.n 8005654 <HAL_TIM_ConfigClockSource+0x16c>
8005584: 2b00 cmp r3, #0
8005586: d05c beq.n 8005642 <HAL_TIM_ConfigClockSource+0x15a>
8005588: 2b10 cmp r3, #16
800558a: d05a beq.n 8005642 <HAL_TIM_ConfigClockSource+0x15a>
800558c: e062 b.n 8005654 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
800558e: 687b ldr r3, [r7, #4]
8005590: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8005592: 683b ldr r3, [r7, #0]
8005594: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8005596: 683b ldr r3, [r7, #0]
8005598: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
800559a: 683b ldr r3, [r7, #0]
800559c: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
800559e: f000 fb00 bl 8005ba2 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
80055a2: 687b ldr r3, [r7, #4]
80055a4: 681b ldr r3, [r3, #0]
80055a6: 689b ldr r3, [r3, #8]
80055a8: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
80055aa: 68bb ldr r3, [r7, #8]
80055ac: f043 0377 orr.w r3, r3, #119 @ 0x77
80055b0: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80055b2: 687b ldr r3, [r7, #4]
80055b4: 681b ldr r3, [r3, #0]
80055b6: 68ba ldr r2, [r7, #8]
80055b8: 609a str r2, [r3, #8]
break;
80055ba: e04f b.n 800565c <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80055bc: 687b ldr r3, [r7, #4]
80055be: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
80055c0: 683b ldr r3, [r7, #0]
80055c2: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80055c4: 683b ldr r3, [r7, #0]
80055c6: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80055c8: 683b ldr r3, [r7, #0]
80055ca: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80055cc: f000 fae9 bl 8005ba2 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
80055d0: 687b ldr r3, [r7, #4]
80055d2: 681b ldr r3, [r3, #0]
80055d4: 689a ldr r2, [r3, #8]
80055d6: 687b ldr r3, [r7, #4]
80055d8: 681b ldr r3, [r3, #0]
80055da: f442 4280 orr.w r2, r2, #16384 @ 0x4000
80055de: 609a str r2, [r3, #8]
break;
80055e0: e03c b.n 800565c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
80055e2: 687b ldr r3, [r7, #4]
80055e4: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80055e6: 683b ldr r3, [r7, #0]
80055e8: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80055ea: 683b ldr r3, [r7, #0]
80055ec: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
80055ee: 461a mov r2, r3
80055f0: f000 fa60 bl 8005ab4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
80055f4: 687b ldr r3, [r7, #4]
80055f6: 681b ldr r3, [r3, #0]
80055f8: 2150 movs r1, #80 @ 0x50
80055fa: 4618 mov r0, r3
80055fc: f000 fab7 bl 8005b6e <TIM_ITRx_SetConfig>
break;
8005600: e02c b.n 800565c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
8005602: 687b ldr r3, [r7, #4]
8005604: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8005606: 683b ldr r3, [r7, #0]
8005608: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800560a: 683b ldr r3, [r7, #0]
800560c: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
800560e: 461a mov r2, r3
8005610: f000 fa7e bl 8005b10 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8005614: 687b ldr r3, [r7, #4]
8005616: 681b ldr r3, [r3, #0]
8005618: 2160 movs r1, #96 @ 0x60
800561a: 4618 mov r0, r3
800561c: f000 faa7 bl 8005b6e <TIM_ITRx_SetConfig>
break;
8005620: e01c b.n 800565c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8005622: 687b ldr r3, [r7, #4]
8005624: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8005626: 683b ldr r3, [r7, #0]
8005628: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800562a: 683b ldr r3, [r7, #0]
800562c: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
800562e: 461a mov r2, r3
8005630: f000 fa40 bl 8005ab4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8005634: 687b ldr r3, [r7, #4]
8005636: 681b ldr r3, [r3, #0]
8005638: 2140 movs r1, #64 @ 0x40
800563a: 4618 mov r0, r3
800563c: f000 fa97 bl 8005b6e <TIM_ITRx_SetConfig>
break;
8005640: e00c b.n 800565c <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8005642: 687b ldr r3, [r7, #4]
8005644: 681a ldr r2, [r3, #0]
8005646: 683b ldr r3, [r7, #0]
8005648: 681b ldr r3, [r3, #0]
800564a: 4619 mov r1, r3
800564c: 4610 mov r0, r2
800564e: f000 fa8e bl 8005b6e <TIM_ITRx_SetConfig>
break;
8005652: e003 b.n 800565c <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8005654: 2301 movs r3, #1
8005656: 73fb strb r3, [r7, #15]
break;
8005658: e000 b.n 800565c <HAL_TIM_ConfigClockSource+0x174>
break;
800565a: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
800565c: 687b ldr r3, [r7, #4]
800565e: 2201 movs r2, #1
8005660: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8005664: 687b ldr r3, [r7, #4]
8005666: 2200 movs r2, #0
8005668: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
800566c: 7bfb ldrb r3, [r7, #15]
}
800566e: 4618 mov r0, r3
8005670: 3710 adds r7, #16
8005672: 46bd mov sp, r7
8005674: bd80 pop {r7, pc}
08005676 <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
8005676: b480 push {r7}
8005678: b085 sub sp, #20
800567a: af00 add r7, sp, #0
800567c: 6078 str r0, [r7, #4]
800567e: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
8005680: 683b ldr r3, [r7, #0]
8005682: 2b00 cmp r3, #0
8005684: d104 bne.n 8005690 <HAL_TIM_GetChannelState+0x1a>
8005686: 687b ldr r3, [r7, #4]
8005688: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
800568c: b2db uxtb r3, r3
800568e: e013 b.n 80056b8 <HAL_TIM_GetChannelState+0x42>
8005690: 683b ldr r3, [r7, #0]
8005692: 2b04 cmp r3, #4
8005694: d104 bne.n 80056a0 <HAL_TIM_GetChannelState+0x2a>
8005696: 687b ldr r3, [r7, #4]
8005698: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
800569c: b2db uxtb r3, r3
800569e: e00b b.n 80056b8 <HAL_TIM_GetChannelState+0x42>
80056a0: 683b ldr r3, [r7, #0]
80056a2: 2b08 cmp r3, #8
80056a4: d104 bne.n 80056b0 <HAL_TIM_GetChannelState+0x3a>
80056a6: 687b ldr r3, [r7, #4]
80056a8: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80056ac: b2db uxtb r3, r3
80056ae: e003 b.n 80056b8 <HAL_TIM_GetChannelState+0x42>
80056b0: 687b ldr r3, [r7, #4]
80056b2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80056b6: b2db uxtb r3, r3
80056b8: 73fb strb r3, [r7, #15]
return channel_state;
80056ba: 7bfb ldrb r3, [r7, #15]
}
80056bc: 4618 mov r0, r3
80056be: 3714 adds r7, #20
80056c0: 46bd mov sp, r7
80056c2: bc80 pop {r7}
80056c4: 4770 bx lr
...
080056c8 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
80056c8: b480 push {r7}
80056ca: b085 sub sp, #20
80056cc: af00 add r7, sp, #0
80056ce: 6078 str r0, [r7, #4]
80056d0: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
80056d2: 687b ldr r3, [r7, #4]
80056d4: 681b ldr r3, [r3, #0]
80056d6: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
80056d8: 687b ldr r3, [r7, #4]
80056da: 4a2f ldr r2, [pc, #188] @ (8005798 <TIM_Base_SetConfig+0xd0>)
80056dc: 4293 cmp r3, r2
80056de: d00b beq.n 80056f8 <TIM_Base_SetConfig+0x30>
80056e0: 687b ldr r3, [r7, #4]
80056e2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80056e6: d007 beq.n 80056f8 <TIM_Base_SetConfig+0x30>
80056e8: 687b ldr r3, [r7, #4]
80056ea: 4a2c ldr r2, [pc, #176] @ (800579c <TIM_Base_SetConfig+0xd4>)
80056ec: 4293 cmp r3, r2
80056ee: d003 beq.n 80056f8 <TIM_Base_SetConfig+0x30>
80056f0: 687b ldr r3, [r7, #4]
80056f2: 4a2b ldr r2, [pc, #172] @ (80057a0 <TIM_Base_SetConfig+0xd8>)
80056f4: 4293 cmp r3, r2
80056f6: d108 bne.n 800570a <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
80056f8: 68fb ldr r3, [r7, #12]
80056fa: f023 0370 bic.w r3, r3, #112 @ 0x70
80056fe: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8005700: 683b ldr r3, [r7, #0]
8005702: 685b ldr r3, [r3, #4]
8005704: 68fa ldr r2, [r7, #12]
8005706: 4313 orrs r3, r2
8005708: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
800570a: 687b ldr r3, [r7, #4]
800570c: 4a22 ldr r2, [pc, #136] @ (8005798 <TIM_Base_SetConfig+0xd0>)
800570e: 4293 cmp r3, r2
8005710: d00b beq.n 800572a <TIM_Base_SetConfig+0x62>
8005712: 687b ldr r3, [r7, #4]
8005714: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8005718: d007 beq.n 800572a <TIM_Base_SetConfig+0x62>
800571a: 687b ldr r3, [r7, #4]
800571c: 4a1f ldr r2, [pc, #124] @ (800579c <TIM_Base_SetConfig+0xd4>)
800571e: 4293 cmp r3, r2
8005720: d003 beq.n 800572a <TIM_Base_SetConfig+0x62>
8005722: 687b ldr r3, [r7, #4]
8005724: 4a1e ldr r2, [pc, #120] @ (80057a0 <TIM_Base_SetConfig+0xd8>)
8005726: 4293 cmp r3, r2
8005728: d108 bne.n 800573c <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
800572a: 68fb ldr r3, [r7, #12]
800572c: f423 7340 bic.w r3, r3, #768 @ 0x300
8005730: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8005732: 683b ldr r3, [r7, #0]
8005734: 68db ldr r3, [r3, #12]
8005736: 68fa ldr r2, [r7, #12]
8005738: 4313 orrs r3, r2
800573a: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
800573c: 68fb ldr r3, [r7, #12]
800573e: f023 0280 bic.w r2, r3, #128 @ 0x80
8005742: 683b ldr r3, [r7, #0]
8005744: 695b ldr r3, [r3, #20]
8005746: 4313 orrs r3, r2
8005748: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
800574a: 687b ldr r3, [r7, #4]
800574c: 68fa ldr r2, [r7, #12]
800574e: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8005750: 683b ldr r3, [r7, #0]
8005752: 689a ldr r2, [r3, #8]
8005754: 687b ldr r3, [r7, #4]
8005756: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8005758: 683b ldr r3, [r7, #0]
800575a: 681a ldr r2, [r3, #0]
800575c: 687b ldr r3, [r7, #4]
800575e: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8005760: 687b ldr r3, [r7, #4]
8005762: 4a0d ldr r2, [pc, #52] @ (8005798 <TIM_Base_SetConfig+0xd0>)
8005764: 4293 cmp r3, r2
8005766: d103 bne.n 8005770 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8005768: 683b ldr r3, [r7, #0]
800576a: 691a ldr r2, [r3, #16]
800576c: 687b ldr r3, [r7, #4]
800576e: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8005770: 687b ldr r3, [r7, #4]
8005772: 2201 movs r2, #1
8005774: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
8005776: 687b ldr r3, [r7, #4]
8005778: 691b ldr r3, [r3, #16]
800577a: f003 0301 and.w r3, r3, #1
800577e: 2b00 cmp r3, #0
8005780: d005 beq.n 800578e <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
8005782: 687b ldr r3, [r7, #4]
8005784: 691b ldr r3, [r3, #16]
8005786: f023 0201 bic.w r2, r3, #1
800578a: 687b ldr r3, [r7, #4]
800578c: 611a str r2, [r3, #16]
}
}
800578e: bf00 nop
8005790: 3714 adds r7, #20
8005792: 46bd mov sp, r7
8005794: bc80 pop {r7}
8005796: 4770 bx lr
8005798: 40012c00 .word 0x40012c00
800579c: 40000400 .word 0x40000400
80057a0: 40000800 .word 0x40000800
080057a4 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80057a4: b480 push {r7}
80057a6: b087 sub sp, #28
80057a8: af00 add r7, sp, #0
80057aa: 6078 str r0, [r7, #4]
80057ac: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80057ae: 687b ldr r3, [r7, #4]
80057b0: 6a1b ldr r3, [r3, #32]
80057b2: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
80057b4: 687b ldr r3, [r7, #4]
80057b6: 6a1b ldr r3, [r3, #32]
80057b8: f023 0201 bic.w r2, r3, #1
80057bc: 687b ldr r3, [r7, #4]
80057be: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80057c0: 687b ldr r3, [r7, #4]
80057c2: 685b ldr r3, [r3, #4]
80057c4: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80057c6: 687b ldr r3, [r7, #4]
80057c8: 699b ldr r3, [r3, #24]
80057ca: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
80057cc: 68fb ldr r3, [r7, #12]
80057ce: f023 0370 bic.w r3, r3, #112 @ 0x70
80057d2: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
80057d4: 68fb ldr r3, [r7, #12]
80057d6: f023 0303 bic.w r3, r3, #3
80057da: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
80057dc: 683b ldr r3, [r7, #0]
80057de: 681b ldr r3, [r3, #0]
80057e0: 68fa ldr r2, [r7, #12]
80057e2: 4313 orrs r3, r2
80057e4: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
80057e6: 697b ldr r3, [r7, #20]
80057e8: f023 0302 bic.w r3, r3, #2
80057ec: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
80057ee: 683b ldr r3, [r7, #0]
80057f0: 689b ldr r3, [r3, #8]
80057f2: 697a ldr r2, [r7, #20]
80057f4: 4313 orrs r3, r2
80057f6: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
80057f8: 687b ldr r3, [r7, #4]
80057fa: 4a1c ldr r2, [pc, #112] @ (800586c <TIM_OC1_SetConfig+0xc8>)
80057fc: 4293 cmp r3, r2
80057fe: d10c bne.n 800581a <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8005800: 697b ldr r3, [r7, #20]
8005802: f023 0308 bic.w r3, r3, #8
8005806: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
8005808: 683b ldr r3, [r7, #0]
800580a: 68db ldr r3, [r3, #12]
800580c: 697a ldr r2, [r7, #20]
800580e: 4313 orrs r3, r2
8005810: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8005812: 697b ldr r3, [r7, #20]
8005814: f023 0304 bic.w r3, r3, #4
8005818: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800581a: 687b ldr r3, [r7, #4]
800581c: 4a13 ldr r2, [pc, #76] @ (800586c <TIM_OC1_SetConfig+0xc8>)
800581e: 4293 cmp r3, r2
8005820: d111 bne.n 8005846 <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
8005822: 693b ldr r3, [r7, #16]
8005824: f423 7380 bic.w r3, r3, #256 @ 0x100
8005828: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
800582a: 693b ldr r3, [r7, #16]
800582c: f423 7300 bic.w r3, r3, #512 @ 0x200
8005830: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8005832: 683b ldr r3, [r7, #0]
8005834: 695b ldr r3, [r3, #20]
8005836: 693a ldr r2, [r7, #16]
8005838: 4313 orrs r3, r2
800583a: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
800583c: 683b ldr r3, [r7, #0]
800583e: 699b ldr r3, [r3, #24]
8005840: 693a ldr r2, [r7, #16]
8005842: 4313 orrs r3, r2
8005844: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8005846: 687b ldr r3, [r7, #4]
8005848: 693a ldr r2, [r7, #16]
800584a: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
800584c: 687b ldr r3, [r7, #4]
800584e: 68fa ldr r2, [r7, #12]
8005850: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8005852: 683b ldr r3, [r7, #0]
8005854: 685a ldr r2, [r3, #4]
8005856: 687b ldr r3, [r7, #4]
8005858: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800585a: 687b ldr r3, [r7, #4]
800585c: 697a ldr r2, [r7, #20]
800585e: 621a str r2, [r3, #32]
}
8005860: bf00 nop
8005862: 371c adds r7, #28
8005864: 46bd mov sp, r7
8005866: bc80 pop {r7}
8005868: 4770 bx lr
800586a: bf00 nop
800586c: 40012c00 .word 0x40012c00
08005870 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8005870: b480 push {r7}
8005872: b087 sub sp, #28
8005874: af00 add r7, sp, #0
8005876: 6078 str r0, [r7, #4]
8005878: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800587a: 687b ldr r3, [r7, #4]
800587c: 6a1b ldr r3, [r3, #32]
800587e: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8005880: 687b ldr r3, [r7, #4]
8005882: 6a1b ldr r3, [r3, #32]
8005884: f023 0210 bic.w r2, r3, #16
8005888: 687b ldr r3, [r7, #4]
800588a: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
800588c: 687b ldr r3, [r7, #4]
800588e: 685b ldr r3, [r3, #4]
8005890: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8005892: 687b ldr r3, [r7, #4]
8005894: 699b ldr r3, [r3, #24]
8005896: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
8005898: 68fb ldr r3, [r7, #12]
800589a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800589e: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
80058a0: 68fb ldr r3, [r7, #12]
80058a2: f423 7340 bic.w r3, r3, #768 @ 0x300
80058a6: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80058a8: 683b ldr r3, [r7, #0]
80058aa: 681b ldr r3, [r3, #0]
80058ac: 021b lsls r3, r3, #8
80058ae: 68fa ldr r2, [r7, #12]
80058b0: 4313 orrs r3, r2
80058b2: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
80058b4: 697b ldr r3, [r7, #20]
80058b6: f023 0320 bic.w r3, r3, #32
80058ba: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
80058bc: 683b ldr r3, [r7, #0]
80058be: 689b ldr r3, [r3, #8]
80058c0: 011b lsls r3, r3, #4
80058c2: 697a ldr r2, [r7, #20]
80058c4: 4313 orrs r3, r2
80058c6: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
80058c8: 687b ldr r3, [r7, #4]
80058ca: 4a1d ldr r2, [pc, #116] @ (8005940 <TIM_OC2_SetConfig+0xd0>)
80058cc: 4293 cmp r3, r2
80058ce: d10d bne.n 80058ec <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
80058d0: 697b ldr r3, [r7, #20]
80058d2: f023 0380 bic.w r3, r3, #128 @ 0x80
80058d6: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
80058d8: 683b ldr r3, [r7, #0]
80058da: 68db ldr r3, [r3, #12]
80058dc: 011b lsls r3, r3, #4
80058de: 697a ldr r2, [r7, #20]
80058e0: 4313 orrs r3, r2
80058e2: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
80058e4: 697b ldr r3, [r7, #20]
80058e6: f023 0340 bic.w r3, r3, #64 @ 0x40
80058ea: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80058ec: 687b ldr r3, [r7, #4]
80058ee: 4a14 ldr r2, [pc, #80] @ (8005940 <TIM_OC2_SetConfig+0xd0>)
80058f0: 4293 cmp r3, r2
80058f2: d113 bne.n 800591c <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
80058f4: 693b ldr r3, [r7, #16]
80058f6: f423 6380 bic.w r3, r3, #1024 @ 0x400
80058fa: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
80058fc: 693b ldr r3, [r7, #16]
80058fe: f423 6300 bic.w r3, r3, #2048 @ 0x800
8005902: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8005904: 683b ldr r3, [r7, #0]
8005906: 695b ldr r3, [r3, #20]
8005908: 009b lsls r3, r3, #2
800590a: 693a ldr r2, [r7, #16]
800590c: 4313 orrs r3, r2
800590e: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8005910: 683b ldr r3, [r7, #0]
8005912: 699b ldr r3, [r3, #24]
8005914: 009b lsls r3, r3, #2
8005916: 693a ldr r2, [r7, #16]
8005918: 4313 orrs r3, r2
800591a: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800591c: 687b ldr r3, [r7, #4]
800591e: 693a ldr r2, [r7, #16]
8005920: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8005922: 687b ldr r3, [r7, #4]
8005924: 68fa ldr r2, [r7, #12]
8005926: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8005928: 683b ldr r3, [r7, #0]
800592a: 685a ldr r2, [r3, #4]
800592c: 687b ldr r3, [r7, #4]
800592e: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8005930: 687b ldr r3, [r7, #4]
8005932: 697a ldr r2, [r7, #20]
8005934: 621a str r2, [r3, #32]
}
8005936: bf00 nop
8005938: 371c adds r7, #28
800593a: 46bd mov sp, r7
800593c: bc80 pop {r7}
800593e: 4770 bx lr
8005940: 40012c00 .word 0x40012c00
08005944 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8005944: b480 push {r7}
8005946: b087 sub sp, #28
8005948: af00 add r7, sp, #0
800594a: 6078 str r0, [r7, #4]
800594c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800594e: 687b ldr r3, [r7, #4]
8005950: 6a1b ldr r3, [r3, #32]
8005952: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8005954: 687b ldr r3, [r7, #4]
8005956: 6a1b ldr r3, [r3, #32]
8005958: f423 7280 bic.w r2, r3, #256 @ 0x100
800595c: 687b ldr r3, [r7, #4]
800595e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8005960: 687b ldr r3, [r7, #4]
8005962: 685b ldr r3, [r3, #4]
8005964: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8005966: 687b ldr r3, [r7, #4]
8005968: 69db ldr r3, [r3, #28]
800596a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
800596c: 68fb ldr r3, [r7, #12]
800596e: f023 0370 bic.w r3, r3, #112 @ 0x70
8005972: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8005974: 68fb ldr r3, [r7, #12]
8005976: f023 0303 bic.w r3, r3, #3
800597a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
800597c: 683b ldr r3, [r7, #0]
800597e: 681b ldr r3, [r3, #0]
8005980: 68fa ldr r2, [r7, #12]
8005982: 4313 orrs r3, r2
8005984: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
8005986: 697b ldr r3, [r7, #20]
8005988: f423 7300 bic.w r3, r3, #512 @ 0x200
800598c: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
800598e: 683b ldr r3, [r7, #0]
8005990: 689b ldr r3, [r3, #8]
8005992: 021b lsls r3, r3, #8
8005994: 697a ldr r2, [r7, #20]
8005996: 4313 orrs r3, r2
8005998: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
800599a: 687b ldr r3, [r7, #4]
800599c: 4a1d ldr r2, [pc, #116] @ (8005a14 <TIM_OC3_SetConfig+0xd0>)
800599e: 4293 cmp r3, r2
80059a0: d10d bne.n 80059be <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
80059a2: 697b ldr r3, [r7, #20]
80059a4: f423 6300 bic.w r3, r3, #2048 @ 0x800
80059a8: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
80059aa: 683b ldr r3, [r7, #0]
80059ac: 68db ldr r3, [r3, #12]
80059ae: 021b lsls r3, r3, #8
80059b0: 697a ldr r2, [r7, #20]
80059b2: 4313 orrs r3, r2
80059b4: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
80059b6: 697b ldr r3, [r7, #20]
80059b8: f423 6380 bic.w r3, r3, #1024 @ 0x400
80059bc: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80059be: 687b ldr r3, [r7, #4]
80059c0: 4a14 ldr r2, [pc, #80] @ (8005a14 <TIM_OC3_SetConfig+0xd0>)
80059c2: 4293 cmp r3, r2
80059c4: d113 bne.n 80059ee <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
80059c6: 693b ldr r3, [r7, #16]
80059c8: f423 5380 bic.w r3, r3, #4096 @ 0x1000
80059cc: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
80059ce: 693b ldr r3, [r7, #16]
80059d0: f423 5300 bic.w r3, r3, #8192 @ 0x2000
80059d4: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
80059d6: 683b ldr r3, [r7, #0]
80059d8: 695b ldr r3, [r3, #20]
80059da: 011b lsls r3, r3, #4
80059dc: 693a ldr r2, [r7, #16]
80059de: 4313 orrs r3, r2
80059e0: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
80059e2: 683b ldr r3, [r7, #0]
80059e4: 699b ldr r3, [r3, #24]
80059e6: 011b lsls r3, r3, #4
80059e8: 693a ldr r2, [r7, #16]
80059ea: 4313 orrs r3, r2
80059ec: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80059ee: 687b ldr r3, [r7, #4]
80059f0: 693a ldr r2, [r7, #16]
80059f2: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
80059f4: 687b ldr r3, [r7, #4]
80059f6: 68fa ldr r2, [r7, #12]
80059f8: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
80059fa: 683b ldr r3, [r7, #0]
80059fc: 685a ldr r2, [r3, #4]
80059fe: 687b ldr r3, [r7, #4]
8005a00: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8005a02: 687b ldr r3, [r7, #4]
8005a04: 697a ldr r2, [r7, #20]
8005a06: 621a str r2, [r3, #32]
}
8005a08: bf00 nop
8005a0a: 371c adds r7, #28
8005a0c: 46bd mov sp, r7
8005a0e: bc80 pop {r7}
8005a10: 4770 bx lr
8005a12: bf00 nop
8005a14: 40012c00 .word 0x40012c00
08005a18 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8005a18: b480 push {r7}
8005a1a: b087 sub sp, #28
8005a1c: af00 add r7, sp, #0
8005a1e: 6078 str r0, [r7, #4]
8005a20: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8005a22: 687b ldr r3, [r7, #4]
8005a24: 6a1b ldr r3, [r3, #32]
8005a26: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
8005a28: 687b ldr r3, [r7, #4]
8005a2a: 6a1b ldr r3, [r3, #32]
8005a2c: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8005a30: 687b ldr r3, [r7, #4]
8005a32: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8005a34: 687b ldr r3, [r7, #4]
8005a36: 685b ldr r3, [r3, #4]
8005a38: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8005a3a: 687b ldr r3, [r7, #4]
8005a3c: 69db ldr r3, [r3, #28]
8005a3e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8005a40: 68fb ldr r3, [r7, #12]
8005a42: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005a46: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
8005a48: 68fb ldr r3, [r7, #12]
8005a4a: f423 7340 bic.w r3, r3, #768 @ 0x300
8005a4e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8005a50: 683b ldr r3, [r7, #0]
8005a52: 681b ldr r3, [r3, #0]
8005a54: 021b lsls r3, r3, #8
8005a56: 68fa ldr r2, [r7, #12]
8005a58: 4313 orrs r3, r2
8005a5a: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8005a5c: 693b ldr r3, [r7, #16]
8005a5e: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8005a62: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8005a64: 683b ldr r3, [r7, #0]
8005a66: 689b ldr r3, [r3, #8]
8005a68: 031b lsls r3, r3, #12
8005a6a: 693a ldr r2, [r7, #16]
8005a6c: 4313 orrs r3, r2
8005a6e: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8005a70: 687b ldr r3, [r7, #4]
8005a72: 4a0f ldr r2, [pc, #60] @ (8005ab0 <TIM_OC4_SetConfig+0x98>)
8005a74: 4293 cmp r3, r2
8005a76: d109 bne.n 8005a8c <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8005a78: 697b ldr r3, [r7, #20]
8005a7a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8005a7e: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
8005a80: 683b ldr r3, [r7, #0]
8005a82: 695b ldr r3, [r3, #20]
8005a84: 019b lsls r3, r3, #6
8005a86: 697a ldr r2, [r7, #20]
8005a88: 4313 orrs r3, r2
8005a8a: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8005a8c: 687b ldr r3, [r7, #4]
8005a8e: 697a ldr r2, [r7, #20]
8005a90: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8005a92: 687b ldr r3, [r7, #4]
8005a94: 68fa ldr r2, [r7, #12]
8005a96: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
8005a98: 683b ldr r3, [r7, #0]
8005a9a: 685a ldr r2, [r3, #4]
8005a9c: 687b ldr r3, [r7, #4]
8005a9e: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8005aa0: 687b ldr r3, [r7, #4]
8005aa2: 693a ldr r2, [r7, #16]
8005aa4: 621a str r2, [r3, #32]
}
8005aa6: bf00 nop
8005aa8: 371c adds r7, #28
8005aaa: 46bd mov sp, r7
8005aac: bc80 pop {r7}
8005aae: 4770 bx lr
8005ab0: 40012c00 .word 0x40012c00
08005ab4 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8005ab4: b480 push {r7}
8005ab6: b087 sub sp, #28
8005ab8: af00 add r7, sp, #0
8005aba: 60f8 str r0, [r7, #12]
8005abc: 60b9 str r1, [r7, #8]
8005abe: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
8005ac0: 68fb ldr r3, [r7, #12]
8005ac2: 6a1b ldr r3, [r3, #32]
8005ac4: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
8005ac6: 68fb ldr r3, [r7, #12]
8005ac8: 6a1b ldr r3, [r3, #32]
8005aca: f023 0201 bic.w r2, r3, #1
8005ace: 68fb ldr r3, [r7, #12]
8005ad0: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8005ad2: 68fb ldr r3, [r7, #12]
8005ad4: 699b ldr r3, [r3, #24]
8005ad6: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
8005ad8: 693b ldr r3, [r7, #16]
8005ada: f023 03f0 bic.w r3, r3, #240 @ 0xf0
8005ade: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8005ae0: 687b ldr r3, [r7, #4]
8005ae2: 011b lsls r3, r3, #4
8005ae4: 693a ldr r2, [r7, #16]
8005ae6: 4313 orrs r3, r2
8005ae8: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
8005aea: 697b ldr r3, [r7, #20]
8005aec: f023 030a bic.w r3, r3, #10
8005af0: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8005af2: 697a ldr r2, [r7, #20]
8005af4: 68bb ldr r3, [r7, #8]
8005af6: 4313 orrs r3, r2
8005af8: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
8005afa: 68fb ldr r3, [r7, #12]
8005afc: 693a ldr r2, [r7, #16]
8005afe: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8005b00: 68fb ldr r3, [r7, #12]
8005b02: 697a ldr r2, [r7, #20]
8005b04: 621a str r2, [r3, #32]
}
8005b06: bf00 nop
8005b08: 371c adds r7, #28
8005b0a: 46bd mov sp, r7
8005b0c: bc80 pop {r7}
8005b0e: 4770 bx lr
08005b10 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8005b10: b480 push {r7}
8005b12: b087 sub sp, #28
8005b14: af00 add r7, sp, #0
8005b16: 60f8 str r0, [r7, #12]
8005b18: 60b9 str r1, [r7, #8]
8005b1a: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
8005b1c: 68fb ldr r3, [r7, #12]
8005b1e: 6a1b ldr r3, [r3, #32]
8005b20: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8005b22: 68fb ldr r3, [r7, #12]
8005b24: 6a1b ldr r3, [r3, #32]
8005b26: f023 0210 bic.w r2, r3, #16
8005b2a: 68fb ldr r3, [r7, #12]
8005b2c: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8005b2e: 68fb ldr r3, [r7, #12]
8005b30: 699b ldr r3, [r3, #24]
8005b32: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8005b34: 693b ldr r3, [r7, #16]
8005b36: f423 4370 bic.w r3, r3, #61440 @ 0xf000
8005b3a: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
8005b3c: 687b ldr r3, [r7, #4]
8005b3e: 031b lsls r3, r3, #12
8005b40: 693a ldr r2, [r7, #16]
8005b42: 4313 orrs r3, r2
8005b44: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8005b46: 697b ldr r3, [r7, #20]
8005b48: f023 03a0 bic.w r3, r3, #160 @ 0xa0
8005b4c: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
8005b4e: 68bb ldr r3, [r7, #8]
8005b50: 011b lsls r3, r3, #4
8005b52: 697a ldr r2, [r7, #20]
8005b54: 4313 orrs r3, r2
8005b56: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8005b58: 68fb ldr r3, [r7, #12]
8005b5a: 693a ldr r2, [r7, #16]
8005b5c: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8005b5e: 68fb ldr r3, [r7, #12]
8005b60: 697a ldr r2, [r7, #20]
8005b62: 621a str r2, [r3, #32]
}
8005b64: bf00 nop
8005b66: 371c adds r7, #28
8005b68: 46bd mov sp, r7
8005b6a: bc80 pop {r7}
8005b6c: 4770 bx lr
08005b6e <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
8005b6e: b480 push {r7}
8005b70: b085 sub sp, #20
8005b72: af00 add r7, sp, #0
8005b74: 6078 str r0, [r7, #4]
8005b76: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8005b78: 687b ldr r3, [r7, #4]
8005b7a: 689b ldr r3, [r3, #8]
8005b7c: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8005b7e: 68fb ldr r3, [r7, #12]
8005b80: f023 0370 bic.w r3, r3, #112 @ 0x70
8005b84: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8005b86: 683a ldr r2, [r7, #0]
8005b88: 68fb ldr r3, [r7, #12]
8005b8a: 4313 orrs r3, r2
8005b8c: f043 0307 orr.w r3, r3, #7
8005b90: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8005b92: 687b ldr r3, [r7, #4]
8005b94: 68fa ldr r2, [r7, #12]
8005b96: 609a str r2, [r3, #8]
}
8005b98: bf00 nop
8005b9a: 3714 adds r7, #20
8005b9c: 46bd mov sp, r7
8005b9e: bc80 pop {r7}
8005ba0: 4770 bx lr
08005ba2 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
8005ba2: b480 push {r7}
8005ba4: b087 sub sp, #28
8005ba6: af00 add r7, sp, #0
8005ba8: 60f8 str r0, [r7, #12]
8005baa: 60b9 str r1, [r7, #8]
8005bac: 607a str r2, [r7, #4]
8005bae: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8005bb0: 68fb ldr r3, [r7, #12]
8005bb2: 689b ldr r3, [r3, #8]
8005bb4: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8005bb6: 697b ldr r3, [r7, #20]
8005bb8: f423 437f bic.w r3, r3, #65280 @ 0xff00
8005bbc: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8005bbe: 683b ldr r3, [r7, #0]
8005bc0: 021a lsls r2, r3, #8
8005bc2: 687b ldr r3, [r7, #4]
8005bc4: 431a orrs r2, r3
8005bc6: 68bb ldr r3, [r7, #8]
8005bc8: 4313 orrs r3, r2
8005bca: 697a ldr r2, [r7, #20]
8005bcc: 4313 orrs r3, r2
8005bce: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8005bd0: 68fb ldr r3, [r7, #12]
8005bd2: 697a ldr r2, [r7, #20]
8005bd4: 609a str r2, [r3, #8]
}
8005bd6: bf00 nop
8005bd8: 371c adds r7, #28
8005bda: 46bd mov sp, r7
8005bdc: bc80 pop {r7}
8005bde: 4770 bx lr
08005be0 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8005be0: b480 push {r7}
8005be2: b087 sub sp, #28
8005be4: af00 add r7, sp, #0
8005be6: 60f8 str r0, [r7, #12]
8005be8: 60b9 str r1, [r7, #8]
8005bea: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8005bec: 68bb ldr r3, [r7, #8]
8005bee: f003 031f and.w r3, r3, #31
8005bf2: 2201 movs r2, #1
8005bf4: fa02 f303 lsl.w r3, r2, r3
8005bf8: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
8005bfa: 68fb ldr r3, [r7, #12]
8005bfc: 6a1a ldr r2, [r3, #32]
8005bfe: 697b ldr r3, [r7, #20]
8005c00: 43db mvns r3, r3
8005c02: 401a ands r2, r3
8005c04: 68fb ldr r3, [r7, #12]
8005c06: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8005c08: 68fb ldr r3, [r7, #12]
8005c0a: 6a1a ldr r2, [r3, #32]
8005c0c: 68bb ldr r3, [r7, #8]
8005c0e: f003 031f and.w r3, r3, #31
8005c12: 6879 ldr r1, [r7, #4]
8005c14: fa01 f303 lsl.w r3, r1, r3
8005c18: 431a orrs r2, r3
8005c1a: 68fb ldr r3, [r7, #12]
8005c1c: 621a str r2, [r3, #32]
}
8005c1e: bf00 nop
8005c20: 371c adds r7, #28
8005c22: 46bd mov sp, r7
8005c24: bc80 pop {r7}
8005c26: 4770 bx lr
08005c28 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8005c28: b480 push {r7}
8005c2a: b085 sub sp, #20
8005c2c: af00 add r7, sp, #0
8005c2e: 6078 str r0, [r7, #4]
8005c30: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8005c32: 687b ldr r3, [r7, #4]
8005c34: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8005c38: 2b01 cmp r3, #1
8005c3a: d101 bne.n 8005c40 <HAL_TIMEx_MasterConfigSynchronization+0x18>
8005c3c: 2302 movs r3, #2
8005c3e: e046 b.n 8005cce <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8005c40: 687b ldr r3, [r7, #4]
8005c42: 2201 movs r2, #1
8005c44: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8005c48: 687b ldr r3, [r7, #4]
8005c4a: 2202 movs r2, #2
8005c4c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8005c50: 687b ldr r3, [r7, #4]
8005c52: 681b ldr r3, [r3, #0]
8005c54: 685b ldr r3, [r3, #4]
8005c56: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8005c58: 687b ldr r3, [r7, #4]
8005c5a: 681b ldr r3, [r3, #0]
8005c5c: 689b ldr r3, [r3, #8]
8005c5e: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8005c60: 68fb ldr r3, [r7, #12]
8005c62: f023 0370 bic.w r3, r3, #112 @ 0x70
8005c66: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8005c68: 683b ldr r3, [r7, #0]
8005c6a: 681b ldr r3, [r3, #0]
8005c6c: 68fa ldr r2, [r7, #12]
8005c6e: 4313 orrs r3, r2
8005c70: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8005c72: 687b ldr r3, [r7, #4]
8005c74: 681b ldr r3, [r3, #0]
8005c76: 68fa ldr r2, [r7, #12]
8005c78: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8005c7a: 687b ldr r3, [r7, #4]
8005c7c: 681b ldr r3, [r3, #0]
8005c7e: 4a16 ldr r2, [pc, #88] @ (8005cd8 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8005c80: 4293 cmp r3, r2
8005c82: d00e beq.n 8005ca2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8005c84: 687b ldr r3, [r7, #4]
8005c86: 681b ldr r3, [r3, #0]
8005c88: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8005c8c: d009 beq.n 8005ca2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8005c8e: 687b ldr r3, [r7, #4]
8005c90: 681b ldr r3, [r3, #0]
8005c92: 4a12 ldr r2, [pc, #72] @ (8005cdc <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8005c94: 4293 cmp r3, r2
8005c96: d004 beq.n 8005ca2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8005c98: 687b ldr r3, [r7, #4]
8005c9a: 681b ldr r3, [r3, #0]
8005c9c: 4a10 ldr r2, [pc, #64] @ (8005ce0 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
8005c9e: 4293 cmp r3, r2
8005ca0: d10c bne.n 8005cbc <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8005ca2: 68bb ldr r3, [r7, #8]
8005ca4: f023 0380 bic.w r3, r3, #128 @ 0x80
8005ca8: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8005caa: 683b ldr r3, [r7, #0]
8005cac: 685b ldr r3, [r3, #4]
8005cae: 68ba ldr r2, [r7, #8]
8005cb0: 4313 orrs r3, r2
8005cb2: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8005cb4: 687b ldr r3, [r7, #4]
8005cb6: 681b ldr r3, [r3, #0]
8005cb8: 68ba ldr r2, [r7, #8]
8005cba: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8005cbc: 687b ldr r3, [r7, #4]
8005cbe: 2201 movs r2, #1
8005cc0: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8005cc4: 687b ldr r3, [r7, #4]
8005cc6: 2200 movs r2, #0
8005cc8: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8005ccc: 2300 movs r3, #0
}
8005cce: 4618 mov r0, r3
8005cd0: 3714 adds r7, #20
8005cd2: 46bd mov sp, r7
8005cd4: bc80 pop {r7}
8005cd6: 4770 bx lr
8005cd8: 40012c00 .word 0x40012c00
8005cdc: 40000400 .word 0x40000400
8005ce0: 40000800 .word 0x40000800
08005ce4 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8005ce4: b580 push {r7, lr}
8005ce6: b082 sub sp, #8
8005ce8: af00 add r7, sp, #0
8005cea: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8005cec: 687b ldr r3, [r7, #4]
8005cee: 2b00 cmp r3, #0
8005cf0: d101 bne.n 8005cf6 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8005cf2: 2301 movs r3, #1
8005cf4: e042 b.n 8005d7c <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
8005cf6: 687b ldr r3, [r7, #4]
8005cf8: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8005cfc: b2db uxtb r3, r3
8005cfe: 2b00 cmp r3, #0
8005d00: d106 bne.n 8005d10 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8005d02: 687b ldr r3, [r7, #4]
8005d04: 2200 movs r2, #0
8005d06: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
8005d0a: 6878 ldr r0, [r7, #4]
8005d0c: f7fb ff32 bl 8001b74 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8005d10: 687b ldr r3, [r7, #4]
8005d12: 2224 movs r2, #36 @ 0x24
8005d14: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8005d18: 687b ldr r3, [r7, #4]
8005d1a: 681b ldr r3, [r3, #0]
8005d1c: 68da ldr r2, [r3, #12]
8005d1e: 687b ldr r3, [r7, #4]
8005d20: 681b ldr r3, [r3, #0]
8005d22: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8005d26: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8005d28: 6878 ldr r0, [r7, #4]
8005d2a: f000 f82b bl 8005d84 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8005d2e: 687b ldr r3, [r7, #4]
8005d30: 681b ldr r3, [r3, #0]
8005d32: 691a ldr r2, [r3, #16]
8005d34: 687b ldr r3, [r7, #4]
8005d36: 681b ldr r3, [r3, #0]
8005d38: f422 4290 bic.w r2, r2, #18432 @ 0x4800
8005d3c: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8005d3e: 687b ldr r3, [r7, #4]
8005d40: 681b ldr r3, [r3, #0]
8005d42: 695a ldr r2, [r3, #20]
8005d44: 687b ldr r3, [r7, #4]
8005d46: 681b ldr r3, [r3, #0]
8005d48: f022 022a bic.w r2, r2, #42 @ 0x2a
8005d4c: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
8005d4e: 687b ldr r3, [r7, #4]
8005d50: 681b ldr r3, [r3, #0]
8005d52: 68da ldr r2, [r3, #12]
8005d54: 687b ldr r3, [r7, #4]
8005d56: 681b ldr r3, [r3, #0]
8005d58: f442 5200 orr.w r2, r2, #8192 @ 0x2000
8005d5c: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8005d5e: 687b ldr r3, [r7, #4]
8005d60: 2200 movs r2, #0
8005d62: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8005d64: 687b ldr r3, [r7, #4]
8005d66: 2220 movs r2, #32
8005d68: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
8005d6c: 687b ldr r3, [r7, #4]
8005d6e: 2220 movs r2, #32
8005d70: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
8005d74: 687b ldr r3, [r7, #4]
8005d76: 2200 movs r2, #0
8005d78: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
8005d7a: 2300 movs r3, #0
}
8005d7c: 4618 mov r0, r3
8005d7e: 3708 adds r7, #8
8005d80: 46bd mov sp, r7
8005d82: bd80 pop {r7, pc}
08005d84 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8005d84: b580 push {r7, lr}
8005d86: b084 sub sp, #16
8005d88: af00 add r7, sp, #0
8005d8a: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8005d8c: 687b ldr r3, [r7, #4]
8005d8e: 681b ldr r3, [r3, #0]
8005d90: 691b ldr r3, [r3, #16]
8005d92: f423 5140 bic.w r1, r3, #12288 @ 0x3000
8005d96: 687b ldr r3, [r7, #4]
8005d98: 68da ldr r2, [r3, #12]
8005d9a: 687b ldr r3, [r7, #4]
8005d9c: 681b ldr r3, [r3, #0]
8005d9e: 430a orrs r2, r1
8005da0: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
8005da2: 687b ldr r3, [r7, #4]
8005da4: 689a ldr r2, [r3, #8]
8005da6: 687b ldr r3, [r7, #4]
8005da8: 691b ldr r3, [r3, #16]
8005daa: 431a orrs r2, r3
8005dac: 687b ldr r3, [r7, #4]
8005dae: 695b ldr r3, [r3, #20]
8005db0: 4313 orrs r3, r2
8005db2: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8005db4: 687b ldr r3, [r7, #4]
8005db6: 681b ldr r3, [r3, #0]
8005db8: 68db ldr r3, [r3, #12]
8005dba: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
8005dbe: f023 030c bic.w r3, r3, #12
8005dc2: 687a ldr r2, [r7, #4]
8005dc4: 6812 ldr r2, [r2, #0]
8005dc6: 68b9 ldr r1, [r7, #8]
8005dc8: 430b orrs r3, r1
8005dca: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8005dcc: 687b ldr r3, [r7, #4]
8005dce: 681b ldr r3, [r3, #0]
8005dd0: 695b ldr r3, [r3, #20]
8005dd2: f423 7140 bic.w r1, r3, #768 @ 0x300
8005dd6: 687b ldr r3, [r7, #4]
8005dd8: 699a ldr r2, [r3, #24]
8005dda: 687b ldr r3, [r7, #4]
8005ddc: 681b ldr r3, [r3, #0]
8005dde: 430a orrs r2, r1
8005de0: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8005de2: 687b ldr r3, [r7, #4]
8005de4: 681b ldr r3, [r3, #0]
8005de6: 4a2c ldr r2, [pc, #176] @ (8005e98 <UART_SetConfig+0x114>)
8005de8: 4293 cmp r3, r2
8005dea: d103 bne.n 8005df4 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8005dec: f7ff f824 bl 8004e38 <HAL_RCC_GetPCLK2Freq>
8005df0: 60f8 str r0, [r7, #12]
8005df2: e002 b.n 8005dfa <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8005df4: f7ff f80c bl 8004e10 <HAL_RCC_GetPCLK1Freq>
8005df8: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8005dfa: 68fa ldr r2, [r7, #12]
8005dfc: 4613 mov r3, r2
8005dfe: 009b lsls r3, r3, #2
8005e00: 4413 add r3, r2
8005e02: 009a lsls r2, r3, #2
8005e04: 441a add r2, r3
8005e06: 687b ldr r3, [r7, #4]
8005e08: 685b ldr r3, [r3, #4]
8005e0a: 009b lsls r3, r3, #2
8005e0c: fbb2 f3f3 udiv r3, r2, r3
8005e10: 4a22 ldr r2, [pc, #136] @ (8005e9c <UART_SetConfig+0x118>)
8005e12: fba2 2303 umull r2, r3, r2, r3
8005e16: 095b lsrs r3, r3, #5
8005e18: 0119 lsls r1, r3, #4
8005e1a: 68fa ldr r2, [r7, #12]
8005e1c: 4613 mov r3, r2
8005e1e: 009b lsls r3, r3, #2
8005e20: 4413 add r3, r2
8005e22: 009a lsls r2, r3, #2
8005e24: 441a add r2, r3
8005e26: 687b ldr r3, [r7, #4]
8005e28: 685b ldr r3, [r3, #4]
8005e2a: 009b lsls r3, r3, #2
8005e2c: fbb2 f2f3 udiv r2, r2, r3
8005e30: 4b1a ldr r3, [pc, #104] @ (8005e9c <UART_SetConfig+0x118>)
8005e32: fba3 0302 umull r0, r3, r3, r2
8005e36: 095b lsrs r3, r3, #5
8005e38: 2064 movs r0, #100 @ 0x64
8005e3a: fb00 f303 mul.w r3, r0, r3
8005e3e: 1ad3 subs r3, r2, r3
8005e40: 011b lsls r3, r3, #4
8005e42: 3332 adds r3, #50 @ 0x32
8005e44: 4a15 ldr r2, [pc, #84] @ (8005e9c <UART_SetConfig+0x118>)
8005e46: fba2 2303 umull r2, r3, r2, r3
8005e4a: 095b lsrs r3, r3, #5
8005e4c: f003 03f0 and.w r3, r3, #240 @ 0xf0
8005e50: 4419 add r1, r3
8005e52: 68fa ldr r2, [r7, #12]
8005e54: 4613 mov r3, r2
8005e56: 009b lsls r3, r3, #2
8005e58: 4413 add r3, r2
8005e5a: 009a lsls r2, r3, #2
8005e5c: 441a add r2, r3
8005e5e: 687b ldr r3, [r7, #4]
8005e60: 685b ldr r3, [r3, #4]
8005e62: 009b lsls r3, r3, #2
8005e64: fbb2 f2f3 udiv r2, r2, r3
8005e68: 4b0c ldr r3, [pc, #48] @ (8005e9c <UART_SetConfig+0x118>)
8005e6a: fba3 0302 umull r0, r3, r3, r2
8005e6e: 095b lsrs r3, r3, #5
8005e70: 2064 movs r0, #100 @ 0x64
8005e72: fb00 f303 mul.w r3, r0, r3
8005e76: 1ad3 subs r3, r2, r3
8005e78: 011b lsls r3, r3, #4
8005e7a: 3332 adds r3, #50 @ 0x32
8005e7c: 4a07 ldr r2, [pc, #28] @ (8005e9c <UART_SetConfig+0x118>)
8005e7e: fba2 2303 umull r2, r3, r2, r3
8005e82: 095b lsrs r3, r3, #5
8005e84: f003 020f and.w r2, r3, #15
8005e88: 687b ldr r3, [r7, #4]
8005e8a: 681b ldr r3, [r3, #0]
8005e8c: 440a add r2, r1
8005e8e: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
8005e90: bf00 nop
8005e92: 3710 adds r7, #16
8005e94: 46bd mov sp, r7
8005e96: bd80 pop {r7, pc}
8005e98: 40013800 .word 0x40013800
8005e9c: 51eb851f .word 0x51eb851f
08005ea0 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8005ea0: b480 push {r7}
8005ea2: b085 sub sp, #20
8005ea4: af00 add r7, sp, #0
8005ea6: 60f8 str r0, [r7, #12]
8005ea8: 4638 mov r0, r7
8005eaa: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8005eae: 2300 movs r3, #0
}
8005eb0: 4618 mov r0, r3
8005eb2: 3714 adds r7, #20
8005eb4: 46bd mov sp, r7
8005eb6: bc80 pop {r7}
8005eb8: 4770 bx lr
08005eba <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8005eba: b480 push {r7}
8005ebc: b085 sub sp, #20
8005ebe: af00 add r7, sp, #0
8005ec0: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8005ec2: 687b ldr r3, [r7, #4]
8005ec4: 2200 movs r2, #0
8005ec6: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8005eca: f44f 433f mov.w r3, #48896 @ 0xbf00
8005ece: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8005ed0: 68fb ldr r3, [r7, #12]
8005ed2: b29a uxth r2, r3
8005ed4: 687b ldr r3, [r7, #4]
8005ed6: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8005eda: 2300 movs r3, #0
}
8005edc: 4618 mov r0, r3
8005ede: 3714 adds r7, #20
8005ee0: 46bd mov sp, r7
8005ee2: bc80 pop {r7}
8005ee4: 4770 bx lr
08005ee6 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8005ee6: b480 push {r7}
8005ee8: b085 sub sp, #20
8005eea: af00 add r7, sp, #0
8005eec: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8005eee: f44f 433f mov.w r3, #48896 @ 0xbf00
8005ef2: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8005ef4: 687b ldr r3, [r7, #4]
8005ef6: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8005efa: b29a uxth r2, r3
8005efc: 68fb ldr r3, [r7, #12]
8005efe: b29b uxth r3, r3
8005f00: 43db mvns r3, r3
8005f02: b29b uxth r3, r3
8005f04: 4013 ands r3, r2
8005f06: b29a uxth r2, r3
8005f08: 687b ldr r3, [r7, #4]
8005f0a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8005f0e: 2300 movs r3, #0
}
8005f10: 4618 mov r0, r3
8005f12: 3714 adds r7, #20
8005f14: 46bd mov sp, r7
8005f16: bc80 pop {r7}
8005f18: 4770 bx lr
08005f1a <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8005f1a: b480 push {r7}
8005f1c: b083 sub sp, #12
8005f1e: af00 add r7, sp, #0
8005f20: 6078 str r0, [r7, #4]
8005f22: 460b mov r3, r1
8005f24: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8005f26: 2300 movs r3, #0
}
8005f28: 4618 mov r0, r3
8005f2a: 370c adds r7, #12
8005f2c: 46bd mov sp, r7
8005f2e: bc80 pop {r7}
8005f30: 4770 bx lr
08005f32 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8005f32: b480 push {r7}
8005f34: b085 sub sp, #20
8005f36: af00 add r7, sp, #0
8005f38: 60f8 str r0, [r7, #12]
8005f3a: 4638 mov r0, r7
8005f3c: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8005f40: 68fb ldr r3, [r7, #12]
8005f42: 2201 movs r2, #1
8005f44: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
8005f48: 68fb ldr r3, [r7, #12]
8005f4a: 2200 movs r2, #0
8005f4c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8005f50: 68fb ldr r3, [r7, #12]
8005f52: 2200 movs r2, #0
8005f54: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8005f58: 68fb ldr r3, [r7, #12]
8005f5a: 2200 movs r2, #0
8005f5c: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8005f60: 2300 movs r3, #0
}
8005f62: 4618 mov r0, r3
8005f64: 3714 adds r7, #20
8005f66: 46bd mov sp, r7
8005f68: bc80 pop {r7}
8005f6a: 4770 bx lr
08005f6c <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8005f6c: b480 push {r7}
8005f6e: b09d sub sp, #116 @ 0x74
8005f70: af00 add r7, sp, #0
8005f72: 6078 str r0, [r7, #4]
8005f74: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8005f76: 2300 movs r3, #0
8005f78: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
8005f7c: 687a ldr r2, [r7, #4]
8005f7e: 683b ldr r3, [r7, #0]
8005f80: 781b ldrb r3, [r3, #0]
8005f82: 009b lsls r3, r3, #2
8005f84: 4413 add r3, r2
8005f86: 881b ldrh r3, [r3, #0]
8005f88: b29b uxth r3, r3
8005f8a: f423 43ec bic.w r3, r3, #30208 @ 0x7600
8005f8e: f023 0370 bic.w r3, r3, #112 @ 0x70
8005f92: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8005f96: 683b ldr r3, [r7, #0]
8005f98: 78db ldrb r3, [r3, #3]
8005f9a: 2b03 cmp r3, #3
8005f9c: d81f bhi.n 8005fde <USB_ActivateEndpoint+0x72>
8005f9e: a201 add r2, pc, #4 @ (adr r2, 8005fa4 <USB_ActivateEndpoint+0x38>)
8005fa0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005fa4: 08005fb5 .word 0x08005fb5
8005fa8: 08005fd1 .word 0x08005fd1
8005fac: 08005fe7 .word 0x08005fe7
8005fb0: 08005fc3 .word 0x08005fc3
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8005fb4: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8005fb8: f443 7300 orr.w r3, r3, #512 @ 0x200
8005fbc: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8005fc0: e012 b.n 8005fe8 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8005fc2: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8005fc6: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8005fca: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8005fce: e00b b.n 8005fe8 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8005fd0: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8005fd4: f443 6380 orr.w r3, r3, #1024 @ 0x400
8005fd8: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8005fdc: e004 b.n 8005fe8 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
8005fde: 2301 movs r3, #1
8005fe0: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8005fe4: e000 b.n 8005fe8 <USB_ActivateEndpoint+0x7c>
break;
8005fe6: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8005fe8: 687a ldr r2, [r7, #4]
8005fea: 683b ldr r3, [r7, #0]
8005fec: 781b ldrb r3, [r3, #0]
8005fee: 009b lsls r3, r3, #2
8005ff0: 441a add r2, r3
8005ff2: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8005ff6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005ffa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005ffe: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006002: f043 0380 orr.w r3, r3, #128 @ 0x80
8006006: b29b uxth r3, r3
8006008: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
800600a: 687a ldr r2, [r7, #4]
800600c: 683b ldr r3, [r7, #0]
800600e: 781b ldrb r3, [r3, #0]
8006010: 009b lsls r3, r3, #2
8006012: 4413 add r3, r2
8006014: 881b ldrh r3, [r3, #0]
8006016: b29b uxth r3, r3
8006018: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800601c: f023 0370 bic.w r3, r3, #112 @ 0x70
8006020: b29b uxth r3, r3
8006022: 683a ldr r2, [r7, #0]
8006024: 7812 ldrb r2, [r2, #0]
8006026: 4313 orrs r3, r2
8006028: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
800602c: 687a ldr r2, [r7, #4]
800602e: 683b ldr r3, [r7, #0]
8006030: 781b ldrb r3, [r3, #0]
8006032: 009b lsls r3, r3, #2
8006034: 441a add r2, r3
8006036: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
800603a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800603e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006042: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006046: f043 0380 orr.w r3, r3, #128 @ 0x80
800604a: b29b uxth r3, r3
800604c: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
800604e: 683b ldr r3, [r7, #0]
8006050: 7b1b ldrb r3, [r3, #12]
8006052: 2b00 cmp r3, #0
8006054: f040 8178 bne.w 8006348 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8006058: 683b ldr r3, [r7, #0]
800605a: 785b ldrb r3, [r3, #1]
800605c: 2b00 cmp r3, #0
800605e: f000 8084 beq.w 800616a <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8006062: 687b ldr r3, [r7, #4]
8006064: 61bb str r3, [r7, #24]
8006066: 687b ldr r3, [r7, #4]
8006068: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800606c: b29b uxth r3, r3
800606e: 461a mov r2, r3
8006070: 69bb ldr r3, [r7, #24]
8006072: 4413 add r3, r2
8006074: 61bb str r3, [r7, #24]
8006076: 683b ldr r3, [r7, #0]
8006078: 781b ldrb r3, [r3, #0]
800607a: 011a lsls r2, r3, #4
800607c: 69bb ldr r3, [r7, #24]
800607e: 4413 add r3, r2
8006080: f503 6380 add.w r3, r3, #1024 @ 0x400
8006084: 617b str r3, [r7, #20]
8006086: 683b ldr r3, [r7, #0]
8006088: 88db ldrh r3, [r3, #6]
800608a: 085b lsrs r3, r3, #1
800608c: b29b uxth r3, r3
800608e: 005b lsls r3, r3, #1
8006090: b29a uxth r2, r3
8006092: 697b ldr r3, [r7, #20]
8006094: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006096: 687a ldr r2, [r7, #4]
8006098: 683b ldr r3, [r7, #0]
800609a: 781b ldrb r3, [r3, #0]
800609c: 009b lsls r3, r3, #2
800609e: 4413 add r3, r2
80060a0: 881b ldrh r3, [r3, #0]
80060a2: 827b strh r3, [r7, #18]
80060a4: 8a7b ldrh r3, [r7, #18]
80060a6: f003 0340 and.w r3, r3, #64 @ 0x40
80060aa: 2b00 cmp r3, #0
80060ac: d01b beq.n 80060e6 <USB_ActivateEndpoint+0x17a>
80060ae: 687a ldr r2, [r7, #4]
80060b0: 683b ldr r3, [r7, #0]
80060b2: 781b ldrb r3, [r3, #0]
80060b4: 009b lsls r3, r3, #2
80060b6: 4413 add r3, r2
80060b8: 881b ldrh r3, [r3, #0]
80060ba: b29b uxth r3, r3
80060bc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80060c0: f023 0370 bic.w r3, r3, #112 @ 0x70
80060c4: 823b strh r3, [r7, #16]
80060c6: 687a ldr r2, [r7, #4]
80060c8: 683b ldr r3, [r7, #0]
80060ca: 781b ldrb r3, [r3, #0]
80060cc: 009b lsls r3, r3, #2
80060ce: 441a add r2, r3
80060d0: 8a3b ldrh r3, [r7, #16]
80060d2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80060d6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80060da: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80060de: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80060e2: b29b uxth r3, r3
80060e4: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
80060e6: 683b ldr r3, [r7, #0]
80060e8: 78db ldrb r3, [r3, #3]
80060ea: 2b01 cmp r3, #1
80060ec: d020 beq.n 8006130 <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
80060ee: 687a ldr r2, [r7, #4]
80060f0: 683b ldr r3, [r7, #0]
80060f2: 781b ldrb r3, [r3, #0]
80060f4: 009b lsls r3, r3, #2
80060f6: 4413 add r3, r2
80060f8: 881b ldrh r3, [r3, #0]
80060fa: b29b uxth r3, r3
80060fc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006100: f023 0340 bic.w r3, r3, #64 @ 0x40
8006104: 81bb strh r3, [r7, #12]
8006106: 89bb ldrh r3, [r7, #12]
8006108: f083 0320 eor.w r3, r3, #32
800610c: 81bb strh r3, [r7, #12]
800610e: 687a ldr r2, [r7, #4]
8006110: 683b ldr r3, [r7, #0]
8006112: 781b ldrb r3, [r3, #0]
8006114: 009b lsls r3, r3, #2
8006116: 441a add r2, r3
8006118: 89bb ldrh r3, [r7, #12]
800611a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800611e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006122: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006126: f043 0380 orr.w r3, r3, #128 @ 0x80
800612a: b29b uxth r3, r3
800612c: 8013 strh r3, [r2, #0]
800612e: e2d5 b.n 80066dc <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8006130: 687a ldr r2, [r7, #4]
8006132: 683b ldr r3, [r7, #0]
8006134: 781b ldrb r3, [r3, #0]
8006136: 009b lsls r3, r3, #2
8006138: 4413 add r3, r2
800613a: 881b ldrh r3, [r3, #0]
800613c: b29b uxth r3, r3
800613e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006142: f023 0340 bic.w r3, r3, #64 @ 0x40
8006146: 81fb strh r3, [r7, #14]
8006148: 687a ldr r2, [r7, #4]
800614a: 683b ldr r3, [r7, #0]
800614c: 781b ldrb r3, [r3, #0]
800614e: 009b lsls r3, r3, #2
8006150: 441a add r2, r3
8006152: 89fb ldrh r3, [r7, #14]
8006154: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006158: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800615c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006160: f043 0380 orr.w r3, r3, #128 @ 0x80
8006164: b29b uxth r3, r3
8006166: 8013 strh r3, [r2, #0]
8006168: e2b8 b.n 80066dc <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
800616a: 687b ldr r3, [r7, #4]
800616c: 633b str r3, [r7, #48] @ 0x30
800616e: 687b ldr r3, [r7, #4]
8006170: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006174: b29b uxth r3, r3
8006176: 461a mov r2, r3
8006178: 6b3b ldr r3, [r7, #48] @ 0x30
800617a: 4413 add r3, r2
800617c: 633b str r3, [r7, #48] @ 0x30
800617e: 683b ldr r3, [r7, #0]
8006180: 781b ldrb r3, [r3, #0]
8006182: 011a lsls r2, r3, #4
8006184: 6b3b ldr r3, [r7, #48] @ 0x30
8006186: 4413 add r3, r2
8006188: f503 6381 add.w r3, r3, #1032 @ 0x408
800618c: 62fb str r3, [r7, #44] @ 0x2c
800618e: 683b ldr r3, [r7, #0]
8006190: 88db ldrh r3, [r3, #6]
8006192: 085b lsrs r3, r3, #1
8006194: b29b uxth r3, r3
8006196: 005b lsls r3, r3, #1
8006198: b29a uxth r2, r3
800619a: 6afb ldr r3, [r7, #44] @ 0x2c
800619c: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
800619e: 687b ldr r3, [r7, #4]
80061a0: 62bb str r3, [r7, #40] @ 0x28
80061a2: 687b ldr r3, [r7, #4]
80061a4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80061a8: b29b uxth r3, r3
80061aa: 461a mov r2, r3
80061ac: 6abb ldr r3, [r7, #40] @ 0x28
80061ae: 4413 add r3, r2
80061b0: 62bb str r3, [r7, #40] @ 0x28
80061b2: 683b ldr r3, [r7, #0]
80061b4: 781b ldrb r3, [r3, #0]
80061b6: 011a lsls r2, r3, #4
80061b8: 6abb ldr r3, [r7, #40] @ 0x28
80061ba: 4413 add r3, r2
80061bc: f203 430c addw r3, r3, #1036 @ 0x40c
80061c0: 627b str r3, [r7, #36] @ 0x24
80061c2: 6a7b ldr r3, [r7, #36] @ 0x24
80061c4: 881b ldrh r3, [r3, #0]
80061c6: b29b uxth r3, r3
80061c8: f3c3 0309 ubfx r3, r3, #0, #10
80061cc: b29a uxth r2, r3
80061ce: 6a7b ldr r3, [r7, #36] @ 0x24
80061d0: 801a strh r2, [r3, #0]
80061d2: 683b ldr r3, [r7, #0]
80061d4: 691b ldr r3, [r3, #16]
80061d6: 2b3e cmp r3, #62 @ 0x3e
80061d8: d91d bls.n 8006216 <USB_ActivateEndpoint+0x2aa>
80061da: 683b ldr r3, [r7, #0]
80061dc: 691b ldr r3, [r3, #16]
80061de: 095b lsrs r3, r3, #5
80061e0: 66bb str r3, [r7, #104] @ 0x68
80061e2: 683b ldr r3, [r7, #0]
80061e4: 691b ldr r3, [r3, #16]
80061e6: f003 031f and.w r3, r3, #31
80061ea: 2b00 cmp r3, #0
80061ec: d102 bne.n 80061f4 <USB_ActivateEndpoint+0x288>
80061ee: 6ebb ldr r3, [r7, #104] @ 0x68
80061f0: 3b01 subs r3, #1
80061f2: 66bb str r3, [r7, #104] @ 0x68
80061f4: 6a7b ldr r3, [r7, #36] @ 0x24
80061f6: 881b ldrh r3, [r3, #0]
80061f8: b29a uxth r2, r3
80061fa: 6ebb ldr r3, [r7, #104] @ 0x68
80061fc: b29b uxth r3, r3
80061fe: 029b lsls r3, r3, #10
8006200: b29b uxth r3, r3
8006202: 4313 orrs r3, r2
8006204: b29b uxth r3, r3
8006206: ea6f 4343 mvn.w r3, r3, lsl #17
800620a: ea6f 4353 mvn.w r3, r3, lsr #17
800620e: b29a uxth r2, r3
8006210: 6a7b ldr r3, [r7, #36] @ 0x24
8006212: 801a strh r2, [r3, #0]
8006214: e026 b.n 8006264 <USB_ActivateEndpoint+0x2f8>
8006216: 683b ldr r3, [r7, #0]
8006218: 691b ldr r3, [r3, #16]
800621a: 2b00 cmp r3, #0
800621c: d10a bne.n 8006234 <USB_ActivateEndpoint+0x2c8>
800621e: 6a7b ldr r3, [r7, #36] @ 0x24
8006220: 881b ldrh r3, [r3, #0]
8006222: b29b uxth r3, r3
8006224: ea6f 4343 mvn.w r3, r3, lsl #17
8006228: ea6f 4353 mvn.w r3, r3, lsr #17
800622c: b29a uxth r2, r3
800622e: 6a7b ldr r3, [r7, #36] @ 0x24
8006230: 801a strh r2, [r3, #0]
8006232: e017 b.n 8006264 <USB_ActivateEndpoint+0x2f8>
8006234: 683b ldr r3, [r7, #0]
8006236: 691b ldr r3, [r3, #16]
8006238: 085b lsrs r3, r3, #1
800623a: 66bb str r3, [r7, #104] @ 0x68
800623c: 683b ldr r3, [r7, #0]
800623e: 691b ldr r3, [r3, #16]
8006240: f003 0301 and.w r3, r3, #1
8006244: 2b00 cmp r3, #0
8006246: d002 beq.n 800624e <USB_ActivateEndpoint+0x2e2>
8006248: 6ebb ldr r3, [r7, #104] @ 0x68
800624a: 3301 adds r3, #1
800624c: 66bb str r3, [r7, #104] @ 0x68
800624e: 6a7b ldr r3, [r7, #36] @ 0x24
8006250: 881b ldrh r3, [r3, #0]
8006252: b29a uxth r2, r3
8006254: 6ebb ldr r3, [r7, #104] @ 0x68
8006256: b29b uxth r3, r3
8006258: 029b lsls r3, r3, #10
800625a: b29b uxth r3, r3
800625c: 4313 orrs r3, r2
800625e: b29a uxth r2, r3
8006260: 6a7b ldr r3, [r7, #36] @ 0x24
8006262: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006264: 687a ldr r2, [r7, #4]
8006266: 683b ldr r3, [r7, #0]
8006268: 781b ldrb r3, [r3, #0]
800626a: 009b lsls r3, r3, #2
800626c: 4413 add r3, r2
800626e: 881b ldrh r3, [r3, #0]
8006270: 847b strh r3, [r7, #34] @ 0x22
8006272: 8c7b ldrh r3, [r7, #34] @ 0x22
8006274: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006278: 2b00 cmp r3, #0
800627a: d01b beq.n 80062b4 <USB_ActivateEndpoint+0x348>
800627c: 687a ldr r2, [r7, #4]
800627e: 683b ldr r3, [r7, #0]
8006280: 781b ldrb r3, [r3, #0]
8006282: 009b lsls r3, r3, #2
8006284: 4413 add r3, r2
8006286: 881b ldrh r3, [r3, #0]
8006288: b29b uxth r3, r3
800628a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800628e: f023 0370 bic.w r3, r3, #112 @ 0x70
8006292: 843b strh r3, [r7, #32]
8006294: 687a ldr r2, [r7, #4]
8006296: 683b ldr r3, [r7, #0]
8006298: 781b ldrb r3, [r3, #0]
800629a: 009b lsls r3, r3, #2
800629c: 441a add r2, r3
800629e: 8c3b ldrh r3, [r7, #32]
80062a0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80062a4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80062a8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80062ac: f043 0380 orr.w r3, r3, #128 @ 0x80
80062b0: b29b uxth r3, r3
80062b2: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
80062b4: 683b ldr r3, [r7, #0]
80062b6: 781b ldrb r3, [r3, #0]
80062b8: 2b00 cmp r3, #0
80062ba: d124 bne.n 8006306 <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80062bc: 687a ldr r2, [r7, #4]
80062be: 683b ldr r3, [r7, #0]
80062c0: 781b ldrb r3, [r3, #0]
80062c2: 009b lsls r3, r3, #2
80062c4: 4413 add r3, r2
80062c6: 881b ldrh r3, [r3, #0]
80062c8: b29b uxth r3, r3
80062ca: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80062ce: f023 0370 bic.w r3, r3, #112 @ 0x70
80062d2: 83bb strh r3, [r7, #28]
80062d4: 8bbb ldrh r3, [r7, #28]
80062d6: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80062da: 83bb strh r3, [r7, #28]
80062dc: 8bbb ldrh r3, [r7, #28]
80062de: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80062e2: 83bb strh r3, [r7, #28]
80062e4: 687a ldr r2, [r7, #4]
80062e6: 683b ldr r3, [r7, #0]
80062e8: 781b ldrb r3, [r3, #0]
80062ea: 009b lsls r3, r3, #2
80062ec: 441a add r2, r3
80062ee: 8bbb ldrh r3, [r7, #28]
80062f0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80062f4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80062f8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80062fc: f043 0380 orr.w r3, r3, #128 @ 0x80
8006300: b29b uxth r3, r3
8006302: 8013 strh r3, [r2, #0]
8006304: e1ea b.n 80066dc <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8006306: 687a ldr r2, [r7, #4]
8006308: 683b ldr r3, [r7, #0]
800630a: 781b ldrb r3, [r3, #0]
800630c: 009b lsls r3, r3, #2
800630e: 4413 add r3, r2
8006310: 881b ldrh r3, [r3, #0]
8006312: b29b uxth r3, r3
8006314: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006318: f023 0370 bic.w r3, r3, #112 @ 0x70
800631c: 83fb strh r3, [r7, #30]
800631e: 8bfb ldrh r3, [r7, #30]
8006320: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006324: 83fb strh r3, [r7, #30]
8006326: 687a ldr r2, [r7, #4]
8006328: 683b ldr r3, [r7, #0]
800632a: 781b ldrb r3, [r3, #0]
800632c: 009b lsls r3, r3, #2
800632e: 441a add r2, r3
8006330: 8bfb ldrh r3, [r7, #30]
8006332: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006336: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800633a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800633e: f043 0380 orr.w r3, r3, #128 @ 0x80
8006342: b29b uxth r3, r3
8006344: 8013 strh r3, [r2, #0]
8006346: e1c9 b.n 80066dc <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
8006348: 683b ldr r3, [r7, #0]
800634a: 78db ldrb r3, [r3, #3]
800634c: 2b02 cmp r3, #2
800634e: d11e bne.n 800638e <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8006350: 687a ldr r2, [r7, #4]
8006352: 683b ldr r3, [r7, #0]
8006354: 781b ldrb r3, [r3, #0]
8006356: 009b lsls r3, r3, #2
8006358: 4413 add r3, r2
800635a: 881b ldrh r3, [r3, #0]
800635c: b29b uxth r3, r3
800635e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006362: f023 0370 bic.w r3, r3, #112 @ 0x70
8006366: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800636a: 687a ldr r2, [r7, #4]
800636c: 683b ldr r3, [r7, #0]
800636e: 781b ldrb r3, [r3, #0]
8006370: 009b lsls r3, r3, #2
8006372: 441a add r2, r3
8006374: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8006378: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800637c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006380: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8006384: f043 0380 orr.w r3, r3, #128 @ 0x80
8006388: b29b uxth r3, r3
800638a: 8013 strh r3, [r2, #0]
800638c: e01d b.n 80063ca <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
800638e: 687a ldr r2, [r7, #4]
8006390: 683b ldr r3, [r7, #0]
8006392: 781b ldrb r3, [r3, #0]
8006394: 009b lsls r3, r3, #2
8006396: 4413 add r3, r2
8006398: 881b ldrh r3, [r3, #0]
800639a: b29b uxth r3, r3
800639c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
80063a0: f023 0370 bic.w r3, r3, #112 @ 0x70
80063a4: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
80063a8: 687a ldr r2, [r7, #4]
80063aa: 683b ldr r3, [r7, #0]
80063ac: 781b ldrb r3, [r3, #0]
80063ae: 009b lsls r3, r3, #2
80063b0: 441a add r2, r3
80063b2: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
80063b6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80063ba: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80063be: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80063c2: f043 0380 orr.w r3, r3, #128 @ 0x80
80063c6: b29b uxth r3, r3
80063c8: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
80063ca: 687b ldr r3, [r7, #4]
80063cc: 65fb str r3, [r7, #92] @ 0x5c
80063ce: 687b ldr r3, [r7, #4]
80063d0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80063d4: b29b uxth r3, r3
80063d6: 461a mov r2, r3
80063d8: 6dfb ldr r3, [r7, #92] @ 0x5c
80063da: 4413 add r3, r2
80063dc: 65fb str r3, [r7, #92] @ 0x5c
80063de: 683b ldr r3, [r7, #0]
80063e0: 781b ldrb r3, [r3, #0]
80063e2: 011a lsls r2, r3, #4
80063e4: 6dfb ldr r3, [r7, #92] @ 0x5c
80063e6: 4413 add r3, r2
80063e8: f503 6380 add.w r3, r3, #1024 @ 0x400
80063ec: 65bb str r3, [r7, #88] @ 0x58
80063ee: 683b ldr r3, [r7, #0]
80063f0: 891b ldrh r3, [r3, #8]
80063f2: 085b lsrs r3, r3, #1
80063f4: b29b uxth r3, r3
80063f6: 005b lsls r3, r3, #1
80063f8: b29a uxth r2, r3
80063fa: 6dbb ldr r3, [r7, #88] @ 0x58
80063fc: 801a strh r2, [r3, #0]
80063fe: 687b ldr r3, [r7, #4]
8006400: 657b str r3, [r7, #84] @ 0x54
8006402: 687b ldr r3, [r7, #4]
8006404: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006408: b29b uxth r3, r3
800640a: 461a mov r2, r3
800640c: 6d7b ldr r3, [r7, #84] @ 0x54
800640e: 4413 add r3, r2
8006410: 657b str r3, [r7, #84] @ 0x54
8006412: 683b ldr r3, [r7, #0]
8006414: 781b ldrb r3, [r3, #0]
8006416: 011a lsls r2, r3, #4
8006418: 6d7b ldr r3, [r7, #84] @ 0x54
800641a: 4413 add r3, r2
800641c: f503 6381 add.w r3, r3, #1032 @ 0x408
8006420: 653b str r3, [r7, #80] @ 0x50
8006422: 683b ldr r3, [r7, #0]
8006424: 895b ldrh r3, [r3, #10]
8006426: 085b lsrs r3, r3, #1
8006428: b29b uxth r3, r3
800642a: 005b lsls r3, r3, #1
800642c: b29a uxth r2, r3
800642e: 6d3b ldr r3, [r7, #80] @ 0x50
8006430: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
8006432: 683b ldr r3, [r7, #0]
8006434: 785b ldrb r3, [r3, #1]
8006436: 2b00 cmp r3, #0
8006438: f040 8093 bne.w 8006562 <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800643c: 687a ldr r2, [r7, #4]
800643e: 683b ldr r3, [r7, #0]
8006440: 781b ldrb r3, [r3, #0]
8006442: 009b lsls r3, r3, #2
8006444: 4413 add r3, r2
8006446: 881b ldrh r3, [r3, #0]
8006448: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
800644c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006450: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006454: 2b00 cmp r3, #0
8006456: d01b beq.n 8006490 <USB_ActivateEndpoint+0x524>
8006458: 687a ldr r2, [r7, #4]
800645a: 683b ldr r3, [r7, #0]
800645c: 781b ldrb r3, [r3, #0]
800645e: 009b lsls r3, r3, #2
8006460: 4413 add r3, r2
8006462: 881b ldrh r3, [r3, #0]
8006464: b29b uxth r3, r3
8006466: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800646a: f023 0370 bic.w r3, r3, #112 @ 0x70
800646e: 87fb strh r3, [r7, #62] @ 0x3e
8006470: 687a ldr r2, [r7, #4]
8006472: 683b ldr r3, [r7, #0]
8006474: 781b ldrb r3, [r3, #0]
8006476: 009b lsls r3, r3, #2
8006478: 441a add r2, r3
800647a: 8ffb ldrh r3, [r7, #62] @ 0x3e
800647c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006480: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006484: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006488: f043 0380 orr.w r3, r3, #128 @ 0x80
800648c: b29b uxth r3, r3
800648e: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006490: 687a ldr r2, [r7, #4]
8006492: 683b ldr r3, [r7, #0]
8006494: 781b ldrb r3, [r3, #0]
8006496: 009b lsls r3, r3, #2
8006498: 4413 add r3, r2
800649a: 881b ldrh r3, [r3, #0]
800649c: 87bb strh r3, [r7, #60] @ 0x3c
800649e: 8fbb ldrh r3, [r7, #60] @ 0x3c
80064a0: f003 0340 and.w r3, r3, #64 @ 0x40
80064a4: 2b00 cmp r3, #0
80064a6: d01b beq.n 80064e0 <USB_ActivateEndpoint+0x574>
80064a8: 687a ldr r2, [r7, #4]
80064aa: 683b ldr r3, [r7, #0]
80064ac: 781b ldrb r3, [r3, #0]
80064ae: 009b lsls r3, r3, #2
80064b0: 4413 add r3, r2
80064b2: 881b ldrh r3, [r3, #0]
80064b4: b29b uxth r3, r3
80064b6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80064ba: f023 0370 bic.w r3, r3, #112 @ 0x70
80064be: 877b strh r3, [r7, #58] @ 0x3a
80064c0: 687a ldr r2, [r7, #4]
80064c2: 683b ldr r3, [r7, #0]
80064c4: 781b ldrb r3, [r3, #0]
80064c6: 009b lsls r3, r3, #2
80064c8: 441a add r2, r3
80064ca: 8f7b ldrh r3, [r7, #58] @ 0x3a
80064cc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80064d0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80064d4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80064d8: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80064dc: b29b uxth r3, r3
80064de: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80064e0: 687a ldr r2, [r7, #4]
80064e2: 683b ldr r3, [r7, #0]
80064e4: 781b ldrb r3, [r3, #0]
80064e6: 009b lsls r3, r3, #2
80064e8: 4413 add r3, r2
80064ea: 881b ldrh r3, [r3, #0]
80064ec: b29b uxth r3, r3
80064ee: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80064f2: f023 0370 bic.w r3, r3, #112 @ 0x70
80064f6: 873b strh r3, [r7, #56] @ 0x38
80064f8: 8f3b ldrh r3, [r7, #56] @ 0x38
80064fa: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80064fe: 873b strh r3, [r7, #56] @ 0x38
8006500: 8f3b ldrh r3, [r7, #56] @ 0x38
8006502: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006506: 873b strh r3, [r7, #56] @ 0x38
8006508: 687a ldr r2, [r7, #4]
800650a: 683b ldr r3, [r7, #0]
800650c: 781b ldrb r3, [r3, #0]
800650e: 009b lsls r3, r3, #2
8006510: 441a add r2, r3
8006512: 8f3b ldrh r3, [r7, #56] @ 0x38
8006514: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006518: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800651c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006520: f043 0380 orr.w r3, r3, #128 @ 0x80
8006524: b29b uxth r3, r3
8006526: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8006528: 687a ldr r2, [r7, #4]
800652a: 683b ldr r3, [r7, #0]
800652c: 781b ldrb r3, [r3, #0]
800652e: 009b lsls r3, r3, #2
8006530: 4413 add r3, r2
8006532: 881b ldrh r3, [r3, #0]
8006534: b29b uxth r3, r3
8006536: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800653a: f023 0340 bic.w r3, r3, #64 @ 0x40
800653e: 86fb strh r3, [r7, #54] @ 0x36
8006540: 687a ldr r2, [r7, #4]
8006542: 683b ldr r3, [r7, #0]
8006544: 781b ldrb r3, [r3, #0]
8006546: 009b lsls r3, r3, #2
8006548: 441a add r2, r3
800654a: 8efb ldrh r3, [r7, #54] @ 0x36
800654c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006550: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006554: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006558: f043 0380 orr.w r3, r3, #128 @ 0x80
800655c: b29b uxth r3, r3
800655e: 8013 strh r3, [r2, #0]
8006560: e0bc b.n 80066dc <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006562: 687a ldr r2, [r7, #4]
8006564: 683b ldr r3, [r7, #0]
8006566: 781b ldrb r3, [r3, #0]
8006568: 009b lsls r3, r3, #2
800656a: 4413 add r3, r2
800656c: 881b ldrh r3, [r3, #0]
800656e: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8006572: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006576: f403 4380 and.w r3, r3, #16384 @ 0x4000
800657a: 2b00 cmp r3, #0
800657c: d01d beq.n 80065ba <USB_ActivateEndpoint+0x64e>
800657e: 687a ldr r2, [r7, #4]
8006580: 683b ldr r3, [r7, #0]
8006582: 781b ldrb r3, [r3, #0]
8006584: 009b lsls r3, r3, #2
8006586: 4413 add r3, r2
8006588: 881b ldrh r3, [r3, #0]
800658a: b29b uxth r3, r3
800658c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006590: f023 0370 bic.w r3, r3, #112 @ 0x70
8006594: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
8006598: 687a ldr r2, [r7, #4]
800659a: 683b ldr r3, [r7, #0]
800659c: 781b ldrb r3, [r3, #0]
800659e: 009b lsls r3, r3, #2
80065a0: 441a add r2, r3
80065a2: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
80065a6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80065aa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80065ae: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80065b2: f043 0380 orr.w r3, r3, #128 @ 0x80
80065b6: b29b uxth r3, r3
80065b8: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80065ba: 687a ldr r2, [r7, #4]
80065bc: 683b ldr r3, [r7, #0]
80065be: 781b ldrb r3, [r3, #0]
80065c0: 009b lsls r3, r3, #2
80065c2: 4413 add r3, r2
80065c4: 881b ldrh r3, [r3, #0]
80065c6: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
80065ca: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80065ce: f003 0340 and.w r3, r3, #64 @ 0x40
80065d2: 2b00 cmp r3, #0
80065d4: d01d beq.n 8006612 <USB_ActivateEndpoint+0x6a6>
80065d6: 687a ldr r2, [r7, #4]
80065d8: 683b ldr r3, [r7, #0]
80065da: 781b ldrb r3, [r3, #0]
80065dc: 009b lsls r3, r3, #2
80065de: 4413 add r3, r2
80065e0: 881b ldrh r3, [r3, #0]
80065e2: b29b uxth r3, r3
80065e4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80065e8: f023 0370 bic.w r3, r3, #112 @ 0x70
80065ec: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80065f0: 687a ldr r2, [r7, #4]
80065f2: 683b ldr r3, [r7, #0]
80065f4: 781b ldrb r3, [r3, #0]
80065f6: 009b lsls r3, r3, #2
80065f8: 441a add r2, r3
80065fa: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
80065fe: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006602: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006606: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800660a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800660e: b29b uxth r3, r3
8006610: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8006612: 683b ldr r3, [r7, #0]
8006614: 78db ldrb r3, [r3, #3]
8006616: 2b01 cmp r3, #1
8006618: d024 beq.n 8006664 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800661a: 687a ldr r2, [r7, #4]
800661c: 683b ldr r3, [r7, #0]
800661e: 781b ldrb r3, [r3, #0]
8006620: 009b lsls r3, r3, #2
8006622: 4413 add r3, r2
8006624: 881b ldrh r3, [r3, #0]
8006626: b29b uxth r3, r3
8006628: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800662c: f023 0340 bic.w r3, r3, #64 @ 0x40
8006630: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8006634: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8006638: f083 0320 eor.w r3, r3, #32
800663c: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8006640: 687a ldr r2, [r7, #4]
8006642: 683b ldr r3, [r7, #0]
8006644: 781b ldrb r3, [r3, #0]
8006646: 009b lsls r3, r3, #2
8006648: 441a add r2, r3
800664a: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800664e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006652: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006656: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800665a: f043 0380 orr.w r3, r3, #128 @ 0x80
800665e: b29b uxth r3, r3
8006660: 8013 strh r3, [r2, #0]
8006662: e01d b.n 80066a0 <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8006664: 687a ldr r2, [r7, #4]
8006666: 683b ldr r3, [r7, #0]
8006668: 781b ldrb r3, [r3, #0]
800666a: 009b lsls r3, r3, #2
800666c: 4413 add r3, r2
800666e: 881b ldrh r3, [r3, #0]
8006670: b29b uxth r3, r3
8006672: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006676: f023 0340 bic.w r3, r3, #64 @ 0x40
800667a: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
800667e: 687a ldr r2, [r7, #4]
8006680: 683b ldr r3, [r7, #0]
8006682: 781b ldrb r3, [r3, #0]
8006684: 009b lsls r3, r3, #2
8006686: 441a add r2, r3
8006688: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800668c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006690: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006694: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006698: f043 0380 orr.w r3, r3, #128 @ 0x80
800669c: b29b uxth r3, r3
800669e: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80066a0: 687a ldr r2, [r7, #4]
80066a2: 683b ldr r3, [r7, #0]
80066a4: 781b ldrb r3, [r3, #0]
80066a6: 009b lsls r3, r3, #2
80066a8: 4413 add r3, r2
80066aa: 881b ldrh r3, [r3, #0]
80066ac: b29b uxth r3, r3
80066ae: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80066b2: f023 0370 bic.w r3, r3, #112 @ 0x70
80066b6: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80066ba: 687a ldr r2, [r7, #4]
80066bc: 683b ldr r3, [r7, #0]
80066be: 781b ldrb r3, [r3, #0]
80066c0: 009b lsls r3, r3, #2
80066c2: 441a add r2, r3
80066c4: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
80066c8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80066cc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80066d0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80066d4: f043 0380 orr.w r3, r3, #128 @ 0x80
80066d8: b29b uxth r3, r3
80066da: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
80066dc: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
80066e0: 4618 mov r0, r3
80066e2: 3774 adds r7, #116 @ 0x74
80066e4: 46bd mov sp, r7
80066e6: bc80 pop {r7}
80066e8: 4770 bx lr
80066ea: bf00 nop
080066ec <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80066ec: b480 push {r7}
80066ee: b08d sub sp, #52 @ 0x34
80066f0: af00 add r7, sp, #0
80066f2: 6078 str r0, [r7, #4]
80066f4: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
80066f6: 683b ldr r3, [r7, #0]
80066f8: 7b1b ldrb r3, [r3, #12]
80066fa: 2b00 cmp r3, #0
80066fc: f040 808e bne.w 800681c <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
8006700: 683b ldr r3, [r7, #0]
8006702: 785b ldrb r3, [r3, #1]
8006704: 2b00 cmp r3, #0
8006706: d044 beq.n 8006792 <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006708: 687a ldr r2, [r7, #4]
800670a: 683b ldr r3, [r7, #0]
800670c: 781b ldrb r3, [r3, #0]
800670e: 009b lsls r3, r3, #2
8006710: 4413 add r3, r2
8006712: 881b ldrh r3, [r3, #0]
8006714: 81bb strh r3, [r7, #12]
8006716: 89bb ldrh r3, [r7, #12]
8006718: f003 0340 and.w r3, r3, #64 @ 0x40
800671c: 2b00 cmp r3, #0
800671e: d01b beq.n 8006758 <USB_DeactivateEndpoint+0x6c>
8006720: 687a ldr r2, [r7, #4]
8006722: 683b ldr r3, [r7, #0]
8006724: 781b ldrb r3, [r3, #0]
8006726: 009b lsls r3, r3, #2
8006728: 4413 add r3, r2
800672a: 881b ldrh r3, [r3, #0]
800672c: b29b uxth r3, r3
800672e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006732: f023 0370 bic.w r3, r3, #112 @ 0x70
8006736: 817b strh r3, [r7, #10]
8006738: 687a ldr r2, [r7, #4]
800673a: 683b ldr r3, [r7, #0]
800673c: 781b ldrb r3, [r3, #0]
800673e: 009b lsls r3, r3, #2
8006740: 441a add r2, r3
8006742: 897b ldrh r3, [r7, #10]
8006744: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006748: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800674c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006750: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006754: b29b uxth r3, r3
8006756: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8006758: 687a ldr r2, [r7, #4]
800675a: 683b ldr r3, [r7, #0]
800675c: 781b ldrb r3, [r3, #0]
800675e: 009b lsls r3, r3, #2
8006760: 4413 add r3, r2
8006762: 881b ldrh r3, [r3, #0]
8006764: b29b uxth r3, r3
8006766: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800676a: f023 0340 bic.w r3, r3, #64 @ 0x40
800676e: 813b strh r3, [r7, #8]
8006770: 687a ldr r2, [r7, #4]
8006772: 683b ldr r3, [r7, #0]
8006774: 781b ldrb r3, [r3, #0]
8006776: 009b lsls r3, r3, #2
8006778: 441a add r2, r3
800677a: 893b ldrh r3, [r7, #8]
800677c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006780: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006784: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006788: f043 0380 orr.w r3, r3, #128 @ 0x80
800678c: b29b uxth r3, r3
800678e: 8013 strh r3, [r2, #0]
8006790: e192 b.n 8006ab8 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006792: 687a ldr r2, [r7, #4]
8006794: 683b ldr r3, [r7, #0]
8006796: 781b ldrb r3, [r3, #0]
8006798: 009b lsls r3, r3, #2
800679a: 4413 add r3, r2
800679c: 881b ldrh r3, [r3, #0]
800679e: 827b strh r3, [r7, #18]
80067a0: 8a7b ldrh r3, [r7, #18]
80067a2: f403 4380 and.w r3, r3, #16384 @ 0x4000
80067a6: 2b00 cmp r3, #0
80067a8: d01b beq.n 80067e2 <USB_DeactivateEndpoint+0xf6>
80067aa: 687a ldr r2, [r7, #4]
80067ac: 683b ldr r3, [r7, #0]
80067ae: 781b ldrb r3, [r3, #0]
80067b0: 009b lsls r3, r3, #2
80067b2: 4413 add r3, r2
80067b4: 881b ldrh r3, [r3, #0]
80067b6: b29b uxth r3, r3
80067b8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80067bc: f023 0370 bic.w r3, r3, #112 @ 0x70
80067c0: 823b strh r3, [r7, #16]
80067c2: 687a ldr r2, [r7, #4]
80067c4: 683b ldr r3, [r7, #0]
80067c6: 781b ldrb r3, [r3, #0]
80067c8: 009b lsls r3, r3, #2
80067ca: 441a add r2, r3
80067cc: 8a3b ldrh r3, [r7, #16]
80067ce: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80067d2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80067d6: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80067da: f043 0380 orr.w r3, r3, #128 @ 0x80
80067de: b29b uxth r3, r3
80067e0: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80067e2: 687a ldr r2, [r7, #4]
80067e4: 683b ldr r3, [r7, #0]
80067e6: 781b ldrb r3, [r3, #0]
80067e8: 009b lsls r3, r3, #2
80067ea: 4413 add r3, r2
80067ec: 881b ldrh r3, [r3, #0]
80067ee: b29b uxth r3, r3
80067f0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80067f4: f023 0370 bic.w r3, r3, #112 @ 0x70
80067f8: 81fb strh r3, [r7, #14]
80067fa: 687a ldr r2, [r7, #4]
80067fc: 683b ldr r3, [r7, #0]
80067fe: 781b ldrb r3, [r3, #0]
8006800: 009b lsls r3, r3, #2
8006802: 441a add r2, r3
8006804: 89fb ldrh r3, [r7, #14]
8006806: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800680a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800680e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006812: f043 0380 orr.w r3, r3, #128 @ 0x80
8006816: b29b uxth r3, r3
8006818: 8013 strh r3, [r2, #0]
800681a: e14d b.n 8006ab8 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
800681c: 683b ldr r3, [r7, #0]
800681e: 785b ldrb r3, [r3, #1]
8006820: 2b00 cmp r3, #0
8006822: f040 80a5 bne.w 8006970 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006826: 687a ldr r2, [r7, #4]
8006828: 683b ldr r3, [r7, #0]
800682a: 781b ldrb r3, [r3, #0]
800682c: 009b lsls r3, r3, #2
800682e: 4413 add r3, r2
8006830: 881b ldrh r3, [r3, #0]
8006832: 843b strh r3, [r7, #32]
8006834: 8c3b ldrh r3, [r7, #32]
8006836: f403 4380 and.w r3, r3, #16384 @ 0x4000
800683a: 2b00 cmp r3, #0
800683c: d01b beq.n 8006876 <USB_DeactivateEndpoint+0x18a>
800683e: 687a ldr r2, [r7, #4]
8006840: 683b ldr r3, [r7, #0]
8006842: 781b ldrb r3, [r3, #0]
8006844: 009b lsls r3, r3, #2
8006846: 4413 add r3, r2
8006848: 881b ldrh r3, [r3, #0]
800684a: b29b uxth r3, r3
800684c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006850: f023 0370 bic.w r3, r3, #112 @ 0x70
8006854: 83fb strh r3, [r7, #30]
8006856: 687a ldr r2, [r7, #4]
8006858: 683b ldr r3, [r7, #0]
800685a: 781b ldrb r3, [r3, #0]
800685c: 009b lsls r3, r3, #2
800685e: 441a add r2, r3
8006860: 8bfb ldrh r3, [r7, #30]
8006862: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006866: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800686a: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800686e: f043 0380 orr.w r3, r3, #128 @ 0x80
8006872: b29b uxth r3, r3
8006874: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006876: 687a ldr r2, [r7, #4]
8006878: 683b ldr r3, [r7, #0]
800687a: 781b ldrb r3, [r3, #0]
800687c: 009b lsls r3, r3, #2
800687e: 4413 add r3, r2
8006880: 881b ldrh r3, [r3, #0]
8006882: 83bb strh r3, [r7, #28]
8006884: 8bbb ldrh r3, [r7, #28]
8006886: f003 0340 and.w r3, r3, #64 @ 0x40
800688a: 2b00 cmp r3, #0
800688c: d01b beq.n 80068c6 <USB_DeactivateEndpoint+0x1da>
800688e: 687a ldr r2, [r7, #4]
8006890: 683b ldr r3, [r7, #0]
8006892: 781b ldrb r3, [r3, #0]
8006894: 009b lsls r3, r3, #2
8006896: 4413 add r3, r2
8006898: 881b ldrh r3, [r3, #0]
800689a: b29b uxth r3, r3
800689c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80068a0: f023 0370 bic.w r3, r3, #112 @ 0x70
80068a4: 837b strh r3, [r7, #26]
80068a6: 687a ldr r2, [r7, #4]
80068a8: 683b ldr r3, [r7, #0]
80068aa: 781b ldrb r3, [r3, #0]
80068ac: 009b lsls r3, r3, #2
80068ae: 441a add r2, r3
80068b0: 8b7b ldrh r3, [r7, #26]
80068b2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80068b6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80068ba: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80068be: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80068c2: b29b uxth r3, r3
80068c4: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
80068c6: 687a ldr r2, [r7, #4]
80068c8: 683b ldr r3, [r7, #0]
80068ca: 781b ldrb r3, [r3, #0]
80068cc: 009b lsls r3, r3, #2
80068ce: 4413 add r3, r2
80068d0: 881b ldrh r3, [r3, #0]
80068d2: b29b uxth r3, r3
80068d4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80068d8: f023 0370 bic.w r3, r3, #112 @ 0x70
80068dc: 833b strh r3, [r7, #24]
80068de: 687a ldr r2, [r7, #4]
80068e0: 683b ldr r3, [r7, #0]
80068e2: 781b ldrb r3, [r3, #0]
80068e4: 009b lsls r3, r3, #2
80068e6: 441a add r2, r3
80068e8: 8b3b ldrh r3, [r7, #24]
80068ea: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80068ee: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80068f2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80068f6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80068fa: b29b uxth r3, r3
80068fc: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80068fe: 687a ldr r2, [r7, #4]
8006900: 683b ldr r3, [r7, #0]
8006902: 781b ldrb r3, [r3, #0]
8006904: 009b lsls r3, r3, #2
8006906: 4413 add r3, r2
8006908: 881b ldrh r3, [r3, #0]
800690a: b29b uxth r3, r3
800690c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006910: f023 0370 bic.w r3, r3, #112 @ 0x70
8006914: 82fb strh r3, [r7, #22]
8006916: 687a ldr r2, [r7, #4]
8006918: 683b ldr r3, [r7, #0]
800691a: 781b ldrb r3, [r3, #0]
800691c: 009b lsls r3, r3, #2
800691e: 441a add r2, r3
8006920: 8afb ldrh r3, [r7, #22]
8006922: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006926: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800692a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800692e: f043 0380 orr.w r3, r3, #128 @ 0x80
8006932: b29b uxth r3, r3
8006934: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8006936: 687a ldr r2, [r7, #4]
8006938: 683b ldr r3, [r7, #0]
800693a: 781b ldrb r3, [r3, #0]
800693c: 009b lsls r3, r3, #2
800693e: 4413 add r3, r2
8006940: 881b ldrh r3, [r3, #0]
8006942: b29b uxth r3, r3
8006944: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006948: f023 0340 bic.w r3, r3, #64 @ 0x40
800694c: 82bb strh r3, [r7, #20]
800694e: 687a ldr r2, [r7, #4]
8006950: 683b ldr r3, [r7, #0]
8006952: 781b ldrb r3, [r3, #0]
8006954: 009b lsls r3, r3, #2
8006956: 441a add r2, r3
8006958: 8abb ldrh r3, [r7, #20]
800695a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800695e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006962: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006966: f043 0380 orr.w r3, r3, #128 @ 0x80
800696a: b29b uxth r3, r3
800696c: 8013 strh r3, [r2, #0]
800696e: e0a3 b.n 8006ab8 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006970: 687a ldr r2, [r7, #4]
8006972: 683b ldr r3, [r7, #0]
8006974: 781b ldrb r3, [r3, #0]
8006976: 009b lsls r3, r3, #2
8006978: 4413 add r3, r2
800697a: 881b ldrh r3, [r3, #0]
800697c: 85fb strh r3, [r7, #46] @ 0x2e
800697e: 8dfb ldrh r3, [r7, #46] @ 0x2e
8006980: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006984: 2b00 cmp r3, #0
8006986: d01b beq.n 80069c0 <USB_DeactivateEndpoint+0x2d4>
8006988: 687a ldr r2, [r7, #4]
800698a: 683b ldr r3, [r7, #0]
800698c: 781b ldrb r3, [r3, #0]
800698e: 009b lsls r3, r3, #2
8006990: 4413 add r3, r2
8006992: 881b ldrh r3, [r3, #0]
8006994: b29b uxth r3, r3
8006996: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800699a: f023 0370 bic.w r3, r3, #112 @ 0x70
800699e: 85bb strh r3, [r7, #44] @ 0x2c
80069a0: 687a ldr r2, [r7, #4]
80069a2: 683b ldr r3, [r7, #0]
80069a4: 781b ldrb r3, [r3, #0]
80069a6: 009b lsls r3, r3, #2
80069a8: 441a add r2, r3
80069aa: 8dbb ldrh r3, [r7, #44] @ 0x2c
80069ac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80069b0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80069b4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80069b8: f043 0380 orr.w r3, r3, #128 @ 0x80
80069bc: b29b uxth r3, r3
80069be: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80069c0: 687a ldr r2, [r7, #4]
80069c2: 683b ldr r3, [r7, #0]
80069c4: 781b ldrb r3, [r3, #0]
80069c6: 009b lsls r3, r3, #2
80069c8: 4413 add r3, r2
80069ca: 881b ldrh r3, [r3, #0]
80069cc: 857b strh r3, [r7, #42] @ 0x2a
80069ce: 8d7b ldrh r3, [r7, #42] @ 0x2a
80069d0: f003 0340 and.w r3, r3, #64 @ 0x40
80069d4: 2b00 cmp r3, #0
80069d6: d01b beq.n 8006a10 <USB_DeactivateEndpoint+0x324>
80069d8: 687a ldr r2, [r7, #4]
80069da: 683b ldr r3, [r7, #0]
80069dc: 781b ldrb r3, [r3, #0]
80069de: 009b lsls r3, r3, #2
80069e0: 4413 add r3, r2
80069e2: 881b ldrh r3, [r3, #0]
80069e4: b29b uxth r3, r3
80069e6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80069ea: f023 0370 bic.w r3, r3, #112 @ 0x70
80069ee: 853b strh r3, [r7, #40] @ 0x28
80069f0: 687a ldr r2, [r7, #4]
80069f2: 683b ldr r3, [r7, #0]
80069f4: 781b ldrb r3, [r3, #0]
80069f6: 009b lsls r3, r3, #2
80069f8: 441a add r2, r3
80069fa: 8d3b ldrh r3, [r7, #40] @ 0x28
80069fc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006a00: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006a04: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006a08: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006a0c: b29b uxth r3, r3
8006a0e: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
8006a10: 687a ldr r2, [r7, #4]
8006a12: 683b ldr r3, [r7, #0]
8006a14: 781b ldrb r3, [r3, #0]
8006a16: 009b lsls r3, r3, #2
8006a18: 4413 add r3, r2
8006a1a: 881b ldrh r3, [r3, #0]
8006a1c: b29b uxth r3, r3
8006a1e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006a22: f023 0370 bic.w r3, r3, #112 @ 0x70
8006a26: 84fb strh r3, [r7, #38] @ 0x26
8006a28: 687a ldr r2, [r7, #4]
8006a2a: 683b ldr r3, [r7, #0]
8006a2c: 781b ldrb r3, [r3, #0]
8006a2e: 009b lsls r3, r3, #2
8006a30: 441a add r2, r3
8006a32: 8cfb ldrh r3, [r7, #38] @ 0x26
8006a34: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006a38: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006a3c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006a40: f043 0380 orr.w r3, r3, #128 @ 0x80
8006a44: b29b uxth r3, r3
8006a46: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8006a48: 687a ldr r2, [r7, #4]
8006a4a: 683b ldr r3, [r7, #0]
8006a4c: 781b ldrb r3, [r3, #0]
8006a4e: 009b lsls r3, r3, #2
8006a50: 4413 add r3, r2
8006a52: 881b ldrh r3, [r3, #0]
8006a54: b29b uxth r3, r3
8006a56: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006a5a: f023 0340 bic.w r3, r3, #64 @ 0x40
8006a5e: 84bb strh r3, [r7, #36] @ 0x24
8006a60: 687a ldr r2, [r7, #4]
8006a62: 683b ldr r3, [r7, #0]
8006a64: 781b ldrb r3, [r3, #0]
8006a66: 009b lsls r3, r3, #2
8006a68: 441a add r2, r3
8006a6a: 8cbb ldrh r3, [r7, #36] @ 0x24
8006a6c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006a70: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006a74: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006a78: f043 0380 orr.w r3, r3, #128 @ 0x80
8006a7c: b29b uxth r3, r3
8006a7e: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8006a80: 687a ldr r2, [r7, #4]
8006a82: 683b ldr r3, [r7, #0]
8006a84: 781b ldrb r3, [r3, #0]
8006a86: 009b lsls r3, r3, #2
8006a88: 4413 add r3, r2
8006a8a: 881b ldrh r3, [r3, #0]
8006a8c: b29b uxth r3, r3
8006a8e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006a92: f023 0370 bic.w r3, r3, #112 @ 0x70
8006a96: 847b strh r3, [r7, #34] @ 0x22
8006a98: 687a ldr r2, [r7, #4]
8006a9a: 683b ldr r3, [r7, #0]
8006a9c: 781b ldrb r3, [r3, #0]
8006a9e: 009b lsls r3, r3, #2
8006aa0: 441a add r2, r3
8006aa2: 8c7b ldrh r3, [r7, #34] @ 0x22
8006aa4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006aa8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006aac: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006ab0: f043 0380 orr.w r3, r3, #128 @ 0x80
8006ab4: b29b uxth r3, r3
8006ab6: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8006ab8: 2300 movs r3, #0
}
8006aba: 4618 mov r0, r3
8006abc: 3734 adds r7, #52 @ 0x34
8006abe: 46bd mov sp, r7
8006ac0: bc80 pop {r7}
8006ac2: 4770 bx lr
08006ac4 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006ac4: b580 push {r7, lr}
8006ac6: b0c2 sub sp, #264 @ 0x108
8006ac8: af00 add r7, sp, #0
8006aca: f507 7384 add.w r3, r7, #264 @ 0x108
8006ace: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006ad2: 6018 str r0, [r3, #0]
8006ad4: f507 7384 add.w r3, r7, #264 @ 0x108
8006ad8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006adc: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
8006ade: f507 7384 add.w r3, r7, #264 @ 0x108
8006ae2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006ae6: 681b ldr r3, [r3, #0]
8006ae8: 785b ldrb r3, [r3, #1]
8006aea: 2b01 cmp r3, #1
8006aec: f040 86b7 bne.w 800785e <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
8006af0: f507 7384 add.w r3, r7, #264 @ 0x108
8006af4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006af8: 681b ldr r3, [r3, #0]
8006afa: 699a ldr r2, [r3, #24]
8006afc: f507 7384 add.w r3, r7, #264 @ 0x108
8006b00: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b04: 681b ldr r3, [r3, #0]
8006b06: 691b ldr r3, [r3, #16]
8006b08: 429a cmp r2, r3
8006b0a: d908 bls.n 8006b1e <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
8006b0c: f507 7384 add.w r3, r7, #264 @ 0x108
8006b10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b14: 681b ldr r3, [r3, #0]
8006b16: 691b ldr r3, [r3, #16]
8006b18: f8c7 3104 str.w r3, [r7, #260] @ 0x104
8006b1c: e007 b.n 8006b2e <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
8006b1e: f507 7384 add.w r3, r7, #264 @ 0x108
8006b22: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b26: 681b ldr r3, [r3, #0]
8006b28: 699b ldr r3, [r3, #24]
8006b2a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8006b2e: f507 7384 add.w r3, r7, #264 @ 0x108
8006b32: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b36: 681b ldr r3, [r3, #0]
8006b38: 7b1b ldrb r3, [r3, #12]
8006b3a: 2b00 cmp r3, #0
8006b3c: d13a bne.n 8006bb4 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8006b3e: f507 7384 add.w r3, r7, #264 @ 0x108
8006b42: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b46: 681b ldr r3, [r3, #0]
8006b48: 6959 ldr r1, [r3, #20]
8006b4a: f507 7384 add.w r3, r7, #264 @ 0x108
8006b4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b52: 681b ldr r3, [r3, #0]
8006b54: 88da ldrh r2, [r3, #6]
8006b56: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006b5a: b29b uxth r3, r3
8006b5c: f507 7084 add.w r0, r7, #264 @ 0x108
8006b60: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8006b64: 6800 ldr r0, [r0, #0]
8006b66: f001 fc9c bl 80084a2 <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8006b6a: f507 7384 add.w r3, r7, #264 @ 0x108
8006b6e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006b72: 681b ldr r3, [r3, #0]
8006b74: 613b str r3, [r7, #16]
8006b76: f507 7384 add.w r3, r7, #264 @ 0x108
8006b7a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006b7e: 681b ldr r3, [r3, #0]
8006b80: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006b84: b29b uxth r3, r3
8006b86: 461a mov r2, r3
8006b88: 693b ldr r3, [r7, #16]
8006b8a: 4413 add r3, r2
8006b8c: 613b str r3, [r7, #16]
8006b8e: f507 7384 add.w r3, r7, #264 @ 0x108
8006b92: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b96: 681b ldr r3, [r3, #0]
8006b98: 781b ldrb r3, [r3, #0]
8006b9a: 011a lsls r2, r3, #4
8006b9c: 693b ldr r3, [r7, #16]
8006b9e: 4413 add r3, r2
8006ba0: f203 4304 addw r3, r3, #1028 @ 0x404
8006ba4: 60fb str r3, [r7, #12]
8006ba6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006baa: b29a uxth r2, r3
8006bac: 68fb ldr r3, [r7, #12]
8006bae: 801a strh r2, [r3, #0]
8006bb0: f000 be1f b.w 80077f2 <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
8006bb4: f507 7384 add.w r3, r7, #264 @ 0x108
8006bb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006bbc: 681b ldr r3, [r3, #0]
8006bbe: 78db ldrb r3, [r3, #3]
8006bc0: 2b02 cmp r3, #2
8006bc2: f040 8462 bne.w 800748a <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
8006bc6: f507 7384 add.w r3, r7, #264 @ 0x108
8006bca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006bce: 681b ldr r3, [r3, #0]
8006bd0: 6a1a ldr r2, [r3, #32]
8006bd2: f507 7384 add.w r3, r7, #264 @ 0x108
8006bd6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006bda: 681b ldr r3, [r3, #0]
8006bdc: 691b ldr r3, [r3, #16]
8006bde: 429a cmp r2, r3
8006be0: f240 83df bls.w 80073a2 <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8006be4: f507 7384 add.w r3, r7, #264 @ 0x108
8006be8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006bec: 681a ldr r2, [r3, #0]
8006bee: f507 7384 add.w r3, r7, #264 @ 0x108
8006bf2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006bf6: 681b ldr r3, [r3, #0]
8006bf8: 781b ldrb r3, [r3, #0]
8006bfa: 009b lsls r3, r3, #2
8006bfc: 4413 add r3, r2
8006bfe: 881b ldrh r3, [r3, #0]
8006c00: b29b uxth r3, r3
8006c02: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006c06: f023 0370 bic.w r3, r3, #112 @ 0x70
8006c0a: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
8006c0e: f507 7384 add.w r3, r7, #264 @ 0x108
8006c12: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006c16: 681a ldr r2, [r3, #0]
8006c18: f507 7384 add.w r3, r7, #264 @ 0x108
8006c1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006c20: 681b ldr r3, [r3, #0]
8006c22: 781b ldrb r3, [r3, #0]
8006c24: 009b lsls r3, r3, #2
8006c26: 441a add r2, r3
8006c28: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
8006c2c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006c30: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006c34: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8006c38: f043 0380 orr.w r3, r3, #128 @ 0x80
8006c3c: b29b uxth r3, r3
8006c3e: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8006c40: f507 7384 add.w r3, r7, #264 @ 0x108
8006c44: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006c48: 681b ldr r3, [r3, #0]
8006c4a: 6a1a ldr r2, [r3, #32]
8006c4c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006c50: 1ad2 subs r2, r2, r3
8006c52: f507 7384 add.w r3, r7, #264 @ 0x108
8006c56: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006c5a: 681b ldr r3, [r3, #0]
8006c5c: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8006c5e: f507 7384 add.w r3, r7, #264 @ 0x108
8006c62: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006c66: 681a ldr r2, [r3, #0]
8006c68: f507 7384 add.w r3, r7, #264 @ 0x108
8006c6c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006c70: 681b ldr r3, [r3, #0]
8006c72: 781b ldrb r3, [r3, #0]
8006c74: 009b lsls r3, r3, #2
8006c76: 4413 add r3, r2
8006c78: 881b ldrh r3, [r3, #0]
8006c7a: b29b uxth r3, r3
8006c7c: f003 0340 and.w r3, r3, #64 @ 0x40
8006c80: 2b00 cmp r3, #0
8006c82: f000 81c7 beq.w 8007014 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8006c86: f507 7384 add.w r3, r7, #264 @ 0x108
8006c8a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006c8e: 681b ldr r3, [r3, #0]
8006c90: 633b str r3, [r7, #48] @ 0x30
8006c92: f507 7384 add.w r3, r7, #264 @ 0x108
8006c96: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006c9a: 681b ldr r3, [r3, #0]
8006c9c: 785b ldrb r3, [r3, #1]
8006c9e: 2b00 cmp r3, #0
8006ca0: d177 bne.n 8006d92 <USB_EPStartXfer+0x2ce>
8006ca2: f507 7384 add.w r3, r7, #264 @ 0x108
8006ca6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006caa: 681b ldr r3, [r3, #0]
8006cac: 62bb str r3, [r7, #40] @ 0x28
8006cae: f507 7384 add.w r3, r7, #264 @ 0x108
8006cb2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006cb6: 681b ldr r3, [r3, #0]
8006cb8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006cbc: b29b uxth r3, r3
8006cbe: 461a mov r2, r3
8006cc0: 6abb ldr r3, [r7, #40] @ 0x28
8006cc2: 4413 add r3, r2
8006cc4: 62bb str r3, [r7, #40] @ 0x28
8006cc6: f507 7384 add.w r3, r7, #264 @ 0x108
8006cca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006cce: 681b ldr r3, [r3, #0]
8006cd0: 781b ldrb r3, [r3, #0]
8006cd2: 011a lsls r2, r3, #4
8006cd4: 6abb ldr r3, [r7, #40] @ 0x28
8006cd6: 4413 add r3, r2
8006cd8: f203 430c addw r3, r3, #1036 @ 0x40c
8006cdc: 627b str r3, [r7, #36] @ 0x24
8006cde: 6a7b ldr r3, [r7, #36] @ 0x24
8006ce0: 881b ldrh r3, [r3, #0]
8006ce2: b29b uxth r3, r3
8006ce4: f3c3 0309 ubfx r3, r3, #0, #10
8006ce8: b29a uxth r2, r3
8006cea: 6a7b ldr r3, [r7, #36] @ 0x24
8006cec: 801a strh r2, [r3, #0]
8006cee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006cf2: 2b3e cmp r3, #62 @ 0x3e
8006cf4: d921 bls.n 8006d3a <USB_EPStartXfer+0x276>
8006cf6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006cfa: 095b lsrs r3, r3, #5
8006cfc: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8006d00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006d04: f003 031f and.w r3, r3, #31
8006d08: 2b00 cmp r3, #0
8006d0a: d104 bne.n 8006d16 <USB_EPStartXfer+0x252>
8006d0c: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8006d10: 3b01 subs r3, #1
8006d12: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8006d16: 6a7b ldr r3, [r7, #36] @ 0x24
8006d18: 881b ldrh r3, [r3, #0]
8006d1a: b29a uxth r2, r3
8006d1c: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8006d20: b29b uxth r3, r3
8006d22: 029b lsls r3, r3, #10
8006d24: b29b uxth r3, r3
8006d26: 4313 orrs r3, r2
8006d28: b29b uxth r3, r3
8006d2a: ea6f 4343 mvn.w r3, r3, lsl #17
8006d2e: ea6f 4353 mvn.w r3, r3, lsr #17
8006d32: b29a uxth r2, r3
8006d34: 6a7b ldr r3, [r7, #36] @ 0x24
8006d36: 801a strh r2, [r3, #0]
8006d38: e050 b.n 8006ddc <USB_EPStartXfer+0x318>
8006d3a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006d3e: 2b00 cmp r3, #0
8006d40: d10a bne.n 8006d58 <USB_EPStartXfer+0x294>
8006d42: 6a7b ldr r3, [r7, #36] @ 0x24
8006d44: 881b ldrh r3, [r3, #0]
8006d46: b29b uxth r3, r3
8006d48: ea6f 4343 mvn.w r3, r3, lsl #17
8006d4c: ea6f 4353 mvn.w r3, r3, lsr #17
8006d50: b29a uxth r2, r3
8006d52: 6a7b ldr r3, [r7, #36] @ 0x24
8006d54: 801a strh r2, [r3, #0]
8006d56: e041 b.n 8006ddc <USB_EPStartXfer+0x318>
8006d58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006d5c: 085b lsrs r3, r3, #1
8006d5e: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8006d62: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006d66: f003 0301 and.w r3, r3, #1
8006d6a: 2b00 cmp r3, #0
8006d6c: d004 beq.n 8006d78 <USB_EPStartXfer+0x2b4>
8006d6e: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8006d72: 3301 adds r3, #1
8006d74: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8006d78: 6a7b ldr r3, [r7, #36] @ 0x24
8006d7a: 881b ldrh r3, [r3, #0]
8006d7c: b29a uxth r2, r3
8006d7e: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8006d82: b29b uxth r3, r3
8006d84: 029b lsls r3, r3, #10
8006d86: b29b uxth r3, r3
8006d88: 4313 orrs r3, r2
8006d8a: b29a uxth r2, r3
8006d8c: 6a7b ldr r3, [r7, #36] @ 0x24
8006d8e: 801a strh r2, [r3, #0]
8006d90: e024 b.n 8006ddc <USB_EPStartXfer+0x318>
8006d92: f507 7384 add.w r3, r7, #264 @ 0x108
8006d96: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006d9a: 681b ldr r3, [r3, #0]
8006d9c: 785b ldrb r3, [r3, #1]
8006d9e: 2b01 cmp r3, #1
8006da0: d11c bne.n 8006ddc <USB_EPStartXfer+0x318>
8006da2: f507 7384 add.w r3, r7, #264 @ 0x108
8006da6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006daa: 681b ldr r3, [r3, #0]
8006dac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006db0: b29b uxth r3, r3
8006db2: 461a mov r2, r3
8006db4: 6b3b ldr r3, [r7, #48] @ 0x30
8006db6: 4413 add r3, r2
8006db8: 633b str r3, [r7, #48] @ 0x30
8006dba: f507 7384 add.w r3, r7, #264 @ 0x108
8006dbe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006dc2: 681b ldr r3, [r3, #0]
8006dc4: 781b ldrb r3, [r3, #0]
8006dc6: 011a lsls r2, r3, #4
8006dc8: 6b3b ldr r3, [r7, #48] @ 0x30
8006dca: 4413 add r3, r2
8006dcc: f203 430c addw r3, r3, #1036 @ 0x40c
8006dd0: 62fb str r3, [r7, #44] @ 0x2c
8006dd2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006dd6: b29a uxth r2, r3
8006dd8: 6afb ldr r3, [r7, #44] @ 0x2c
8006dda: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8006ddc: f507 7384 add.w r3, r7, #264 @ 0x108
8006de0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006de4: 681b ldr r3, [r3, #0]
8006de6: 895b ldrh r3, [r3, #10]
8006de8: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006dec: f507 7384 add.w r3, r7, #264 @ 0x108
8006df0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006df4: 681b ldr r3, [r3, #0]
8006df6: 6959 ldr r1, [r3, #20]
8006df8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006dfc: b29b uxth r3, r3
8006dfe: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8006e02: f507 7084 add.w r0, r7, #264 @ 0x108
8006e06: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8006e0a: 6800 ldr r0, [r0, #0]
8006e0c: f001 fb49 bl 80084a2 <USB_WritePMA>
ep->xfer_buff += len;
8006e10: f507 7384 add.w r3, r7, #264 @ 0x108
8006e14: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e18: 681b ldr r3, [r3, #0]
8006e1a: 695a ldr r2, [r3, #20]
8006e1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006e20: 441a add r2, r3
8006e22: f507 7384 add.w r3, r7, #264 @ 0x108
8006e26: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e2a: 681b ldr r3, [r3, #0]
8006e2c: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8006e2e: f507 7384 add.w r3, r7, #264 @ 0x108
8006e32: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e36: 681b ldr r3, [r3, #0]
8006e38: 6a1a ldr r2, [r3, #32]
8006e3a: f507 7384 add.w r3, r7, #264 @ 0x108
8006e3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e42: 681b ldr r3, [r3, #0]
8006e44: 691b ldr r3, [r3, #16]
8006e46: 429a cmp r2, r3
8006e48: d90f bls.n 8006e6a <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
8006e4a: f507 7384 add.w r3, r7, #264 @ 0x108
8006e4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e52: 681b ldr r3, [r3, #0]
8006e54: 6a1a ldr r2, [r3, #32]
8006e56: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006e5a: 1ad2 subs r2, r2, r3
8006e5c: f507 7384 add.w r3, r7, #264 @ 0x108
8006e60: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e64: 681b ldr r3, [r3, #0]
8006e66: 621a str r2, [r3, #32]
8006e68: e00e b.n 8006e88 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
8006e6a: f507 7384 add.w r3, r7, #264 @ 0x108
8006e6e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e72: 681b ldr r3, [r3, #0]
8006e74: 6a1b ldr r3, [r3, #32]
8006e76: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8006e7a: f507 7384 add.w r3, r7, #264 @ 0x108
8006e7e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e82: 681b ldr r3, [r3, #0]
8006e84: 2200 movs r2, #0
8006e86: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8006e88: f507 7384 add.w r3, r7, #264 @ 0x108
8006e8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e90: 681b ldr r3, [r3, #0]
8006e92: 785b ldrb r3, [r3, #1]
8006e94: 2b00 cmp r3, #0
8006e96: d177 bne.n 8006f88 <USB_EPStartXfer+0x4c4>
8006e98: f507 7384 add.w r3, r7, #264 @ 0x108
8006e9c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006ea0: 681b ldr r3, [r3, #0]
8006ea2: 61bb str r3, [r7, #24]
8006ea4: f507 7384 add.w r3, r7, #264 @ 0x108
8006ea8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006eac: 681b ldr r3, [r3, #0]
8006eae: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006eb2: b29b uxth r3, r3
8006eb4: 461a mov r2, r3
8006eb6: 69bb ldr r3, [r7, #24]
8006eb8: 4413 add r3, r2
8006eba: 61bb str r3, [r7, #24]
8006ebc: f507 7384 add.w r3, r7, #264 @ 0x108
8006ec0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006ec4: 681b ldr r3, [r3, #0]
8006ec6: 781b ldrb r3, [r3, #0]
8006ec8: 011a lsls r2, r3, #4
8006eca: 69bb ldr r3, [r7, #24]
8006ecc: 4413 add r3, r2
8006ece: f203 4304 addw r3, r3, #1028 @ 0x404
8006ed2: 617b str r3, [r7, #20]
8006ed4: 697b ldr r3, [r7, #20]
8006ed6: 881b ldrh r3, [r3, #0]
8006ed8: b29b uxth r3, r3
8006eda: f3c3 0309 ubfx r3, r3, #0, #10
8006ede: b29a uxth r2, r3
8006ee0: 697b ldr r3, [r7, #20]
8006ee2: 801a strh r2, [r3, #0]
8006ee4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006ee8: 2b3e cmp r3, #62 @ 0x3e
8006eea: d921 bls.n 8006f30 <USB_EPStartXfer+0x46c>
8006eec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006ef0: 095b lsrs r3, r3, #5
8006ef2: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8006ef6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006efa: f003 031f and.w r3, r3, #31
8006efe: 2b00 cmp r3, #0
8006f00: d104 bne.n 8006f0c <USB_EPStartXfer+0x448>
8006f02: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8006f06: 3b01 subs r3, #1
8006f08: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8006f0c: 697b ldr r3, [r7, #20]
8006f0e: 881b ldrh r3, [r3, #0]
8006f10: b29a uxth r2, r3
8006f12: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8006f16: b29b uxth r3, r3
8006f18: 029b lsls r3, r3, #10
8006f1a: b29b uxth r3, r3
8006f1c: 4313 orrs r3, r2
8006f1e: b29b uxth r3, r3
8006f20: ea6f 4343 mvn.w r3, r3, lsl #17
8006f24: ea6f 4353 mvn.w r3, r3, lsr #17
8006f28: b29a uxth r2, r3
8006f2a: 697b ldr r3, [r7, #20]
8006f2c: 801a strh r2, [r3, #0]
8006f2e: e056 b.n 8006fde <USB_EPStartXfer+0x51a>
8006f30: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006f34: 2b00 cmp r3, #0
8006f36: d10a bne.n 8006f4e <USB_EPStartXfer+0x48a>
8006f38: 697b ldr r3, [r7, #20]
8006f3a: 881b ldrh r3, [r3, #0]
8006f3c: b29b uxth r3, r3
8006f3e: ea6f 4343 mvn.w r3, r3, lsl #17
8006f42: ea6f 4353 mvn.w r3, r3, lsr #17
8006f46: b29a uxth r2, r3
8006f48: 697b ldr r3, [r7, #20]
8006f4a: 801a strh r2, [r3, #0]
8006f4c: e047 b.n 8006fde <USB_EPStartXfer+0x51a>
8006f4e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006f52: 085b lsrs r3, r3, #1
8006f54: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8006f58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006f5c: f003 0301 and.w r3, r3, #1
8006f60: 2b00 cmp r3, #0
8006f62: d004 beq.n 8006f6e <USB_EPStartXfer+0x4aa>
8006f64: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8006f68: 3301 adds r3, #1
8006f6a: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8006f6e: 697b ldr r3, [r7, #20]
8006f70: 881b ldrh r3, [r3, #0]
8006f72: b29a uxth r2, r3
8006f74: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8006f78: b29b uxth r3, r3
8006f7a: 029b lsls r3, r3, #10
8006f7c: b29b uxth r3, r3
8006f7e: 4313 orrs r3, r2
8006f80: b29a uxth r2, r3
8006f82: 697b ldr r3, [r7, #20]
8006f84: 801a strh r2, [r3, #0]
8006f86: e02a b.n 8006fde <USB_EPStartXfer+0x51a>
8006f88: f507 7384 add.w r3, r7, #264 @ 0x108
8006f8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006f90: 681b ldr r3, [r3, #0]
8006f92: 785b ldrb r3, [r3, #1]
8006f94: 2b01 cmp r3, #1
8006f96: d122 bne.n 8006fde <USB_EPStartXfer+0x51a>
8006f98: f507 7384 add.w r3, r7, #264 @ 0x108
8006f9c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006fa0: 681b ldr r3, [r3, #0]
8006fa2: 623b str r3, [r7, #32]
8006fa4: f507 7384 add.w r3, r7, #264 @ 0x108
8006fa8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006fac: 681b ldr r3, [r3, #0]
8006fae: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006fb2: b29b uxth r3, r3
8006fb4: 461a mov r2, r3
8006fb6: 6a3b ldr r3, [r7, #32]
8006fb8: 4413 add r3, r2
8006fba: 623b str r3, [r7, #32]
8006fbc: f507 7384 add.w r3, r7, #264 @ 0x108
8006fc0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006fc4: 681b ldr r3, [r3, #0]
8006fc6: 781b ldrb r3, [r3, #0]
8006fc8: 011a lsls r2, r3, #4
8006fca: 6a3b ldr r3, [r7, #32]
8006fcc: 4413 add r3, r2
8006fce: f203 4304 addw r3, r3, #1028 @ 0x404
8006fd2: 61fb str r3, [r7, #28]
8006fd4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006fd8: b29a uxth r2, r3
8006fda: 69fb ldr r3, [r7, #28]
8006fdc: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8006fde: f507 7384 add.w r3, r7, #264 @ 0x108
8006fe2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006fe6: 681b ldr r3, [r3, #0]
8006fe8: 891b ldrh r3, [r3, #8]
8006fea: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006fee: f507 7384 add.w r3, r7, #264 @ 0x108
8006ff2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006ff6: 681b ldr r3, [r3, #0]
8006ff8: 6959 ldr r1, [r3, #20]
8006ffa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006ffe: b29b uxth r3, r3
8007000: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8007004: f507 7084 add.w r0, r7, #264 @ 0x108
8007008: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800700c: 6800 ldr r0, [r0, #0]
800700e: f001 fa48 bl 80084a2 <USB_WritePMA>
8007012: e3ee b.n 80077f2 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8007014: f507 7384 add.w r3, r7, #264 @ 0x108
8007018: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800701c: 681b ldr r3, [r3, #0]
800701e: 785b ldrb r3, [r3, #1]
8007020: 2b00 cmp r3, #0
8007022: d177 bne.n 8007114 <USB_EPStartXfer+0x650>
8007024: f507 7384 add.w r3, r7, #264 @ 0x108
8007028: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800702c: 681b ldr r3, [r3, #0]
800702e: 64bb str r3, [r7, #72] @ 0x48
8007030: f507 7384 add.w r3, r7, #264 @ 0x108
8007034: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007038: 681b ldr r3, [r3, #0]
800703a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800703e: b29b uxth r3, r3
8007040: 461a mov r2, r3
8007042: 6cbb ldr r3, [r7, #72] @ 0x48
8007044: 4413 add r3, r2
8007046: 64bb str r3, [r7, #72] @ 0x48
8007048: f507 7384 add.w r3, r7, #264 @ 0x108
800704c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007050: 681b ldr r3, [r3, #0]
8007052: 781b ldrb r3, [r3, #0]
8007054: 011a lsls r2, r3, #4
8007056: 6cbb ldr r3, [r7, #72] @ 0x48
8007058: 4413 add r3, r2
800705a: f203 4304 addw r3, r3, #1028 @ 0x404
800705e: 647b str r3, [r7, #68] @ 0x44
8007060: 6c7b ldr r3, [r7, #68] @ 0x44
8007062: 881b ldrh r3, [r3, #0]
8007064: b29b uxth r3, r3
8007066: f3c3 0309 ubfx r3, r3, #0, #10
800706a: b29a uxth r2, r3
800706c: 6c7b ldr r3, [r7, #68] @ 0x44
800706e: 801a strh r2, [r3, #0]
8007070: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007074: 2b3e cmp r3, #62 @ 0x3e
8007076: d921 bls.n 80070bc <USB_EPStartXfer+0x5f8>
8007078: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800707c: 095b lsrs r3, r3, #5
800707e: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8007082: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007086: f003 031f and.w r3, r3, #31
800708a: 2b00 cmp r3, #0
800708c: d104 bne.n 8007098 <USB_EPStartXfer+0x5d4>
800708e: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8007092: 3b01 subs r3, #1
8007094: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8007098: 6c7b ldr r3, [r7, #68] @ 0x44
800709a: 881b ldrh r3, [r3, #0]
800709c: b29a uxth r2, r3
800709e: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
80070a2: b29b uxth r3, r3
80070a4: 029b lsls r3, r3, #10
80070a6: b29b uxth r3, r3
80070a8: 4313 orrs r3, r2
80070aa: b29b uxth r3, r3
80070ac: ea6f 4343 mvn.w r3, r3, lsl #17
80070b0: ea6f 4353 mvn.w r3, r3, lsr #17
80070b4: b29a uxth r2, r3
80070b6: 6c7b ldr r3, [r7, #68] @ 0x44
80070b8: 801a strh r2, [r3, #0]
80070ba: e056 b.n 800716a <USB_EPStartXfer+0x6a6>
80070bc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80070c0: 2b00 cmp r3, #0
80070c2: d10a bne.n 80070da <USB_EPStartXfer+0x616>
80070c4: 6c7b ldr r3, [r7, #68] @ 0x44
80070c6: 881b ldrh r3, [r3, #0]
80070c8: b29b uxth r3, r3
80070ca: ea6f 4343 mvn.w r3, r3, lsl #17
80070ce: ea6f 4353 mvn.w r3, r3, lsr #17
80070d2: b29a uxth r2, r3
80070d4: 6c7b ldr r3, [r7, #68] @ 0x44
80070d6: 801a strh r2, [r3, #0]
80070d8: e047 b.n 800716a <USB_EPStartXfer+0x6a6>
80070da: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80070de: 085b lsrs r3, r3, #1
80070e0: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
80070e4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80070e8: f003 0301 and.w r3, r3, #1
80070ec: 2b00 cmp r3, #0
80070ee: d004 beq.n 80070fa <USB_EPStartXfer+0x636>
80070f0: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
80070f4: 3301 adds r3, #1
80070f6: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
80070fa: 6c7b ldr r3, [r7, #68] @ 0x44
80070fc: 881b ldrh r3, [r3, #0]
80070fe: b29a uxth r2, r3
8007100: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8007104: b29b uxth r3, r3
8007106: 029b lsls r3, r3, #10
8007108: b29b uxth r3, r3
800710a: 4313 orrs r3, r2
800710c: b29a uxth r2, r3
800710e: 6c7b ldr r3, [r7, #68] @ 0x44
8007110: 801a strh r2, [r3, #0]
8007112: e02a b.n 800716a <USB_EPStartXfer+0x6a6>
8007114: f507 7384 add.w r3, r7, #264 @ 0x108
8007118: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800711c: 681b ldr r3, [r3, #0]
800711e: 785b ldrb r3, [r3, #1]
8007120: 2b01 cmp r3, #1
8007122: d122 bne.n 800716a <USB_EPStartXfer+0x6a6>
8007124: f507 7384 add.w r3, r7, #264 @ 0x108
8007128: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800712c: 681b ldr r3, [r3, #0]
800712e: 653b str r3, [r7, #80] @ 0x50
8007130: f507 7384 add.w r3, r7, #264 @ 0x108
8007134: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007138: 681b ldr r3, [r3, #0]
800713a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800713e: b29b uxth r3, r3
8007140: 461a mov r2, r3
8007142: 6d3b ldr r3, [r7, #80] @ 0x50
8007144: 4413 add r3, r2
8007146: 653b str r3, [r7, #80] @ 0x50
8007148: f507 7384 add.w r3, r7, #264 @ 0x108
800714c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007150: 681b ldr r3, [r3, #0]
8007152: 781b ldrb r3, [r3, #0]
8007154: 011a lsls r2, r3, #4
8007156: 6d3b ldr r3, [r7, #80] @ 0x50
8007158: 4413 add r3, r2
800715a: f203 4304 addw r3, r3, #1028 @ 0x404
800715e: 64fb str r3, [r7, #76] @ 0x4c
8007160: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007164: b29a uxth r2, r3
8007166: 6cfb ldr r3, [r7, #76] @ 0x4c
8007168: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800716a: f507 7384 add.w r3, r7, #264 @ 0x108
800716e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007172: 681b ldr r3, [r3, #0]
8007174: 891b ldrh r3, [r3, #8]
8007176: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800717a: f507 7384 add.w r3, r7, #264 @ 0x108
800717e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007182: 681b ldr r3, [r3, #0]
8007184: 6959 ldr r1, [r3, #20]
8007186: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800718a: b29b uxth r3, r3
800718c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8007190: f507 7084 add.w r0, r7, #264 @ 0x108
8007194: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8007198: 6800 ldr r0, [r0, #0]
800719a: f001 f982 bl 80084a2 <USB_WritePMA>
ep->xfer_buff += len;
800719e: f507 7384 add.w r3, r7, #264 @ 0x108
80071a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80071a6: 681b ldr r3, [r3, #0]
80071a8: 695a ldr r2, [r3, #20]
80071aa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80071ae: 441a add r2, r3
80071b0: f507 7384 add.w r3, r7, #264 @ 0x108
80071b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80071b8: 681b ldr r3, [r3, #0]
80071ba: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
80071bc: f507 7384 add.w r3, r7, #264 @ 0x108
80071c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80071c4: 681b ldr r3, [r3, #0]
80071c6: 6a1a ldr r2, [r3, #32]
80071c8: f507 7384 add.w r3, r7, #264 @ 0x108
80071cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80071d0: 681b ldr r3, [r3, #0]
80071d2: 691b ldr r3, [r3, #16]
80071d4: 429a cmp r2, r3
80071d6: d90f bls.n 80071f8 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
80071d8: f507 7384 add.w r3, r7, #264 @ 0x108
80071dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80071e0: 681b ldr r3, [r3, #0]
80071e2: 6a1a ldr r2, [r3, #32]
80071e4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80071e8: 1ad2 subs r2, r2, r3
80071ea: f507 7384 add.w r3, r7, #264 @ 0x108
80071ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80071f2: 681b ldr r3, [r3, #0]
80071f4: 621a str r2, [r3, #32]
80071f6: e00e b.n 8007216 <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
80071f8: f507 7384 add.w r3, r7, #264 @ 0x108
80071fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007200: 681b ldr r3, [r3, #0]
8007202: 6a1b ldr r3, [r3, #32]
8007204: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8007208: f507 7384 add.w r3, r7, #264 @ 0x108
800720c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007210: 681b ldr r3, [r3, #0]
8007212: 2200 movs r2, #0
8007214: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8007216: f507 7384 add.w r3, r7, #264 @ 0x108
800721a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800721e: 681b ldr r3, [r3, #0]
8007220: 643b str r3, [r7, #64] @ 0x40
8007222: f507 7384 add.w r3, r7, #264 @ 0x108
8007226: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800722a: 681b ldr r3, [r3, #0]
800722c: 785b ldrb r3, [r3, #1]
800722e: 2b00 cmp r3, #0
8007230: d177 bne.n 8007322 <USB_EPStartXfer+0x85e>
8007232: f507 7384 add.w r3, r7, #264 @ 0x108
8007236: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800723a: 681b ldr r3, [r3, #0]
800723c: 63bb str r3, [r7, #56] @ 0x38
800723e: f507 7384 add.w r3, r7, #264 @ 0x108
8007242: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007246: 681b ldr r3, [r3, #0]
8007248: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800724c: b29b uxth r3, r3
800724e: 461a mov r2, r3
8007250: 6bbb ldr r3, [r7, #56] @ 0x38
8007252: 4413 add r3, r2
8007254: 63bb str r3, [r7, #56] @ 0x38
8007256: f507 7384 add.w r3, r7, #264 @ 0x108
800725a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800725e: 681b ldr r3, [r3, #0]
8007260: 781b ldrb r3, [r3, #0]
8007262: 011a lsls r2, r3, #4
8007264: 6bbb ldr r3, [r7, #56] @ 0x38
8007266: 4413 add r3, r2
8007268: f203 430c addw r3, r3, #1036 @ 0x40c
800726c: 637b str r3, [r7, #52] @ 0x34
800726e: 6b7b ldr r3, [r7, #52] @ 0x34
8007270: 881b ldrh r3, [r3, #0]
8007272: b29b uxth r3, r3
8007274: f3c3 0309 ubfx r3, r3, #0, #10
8007278: b29a uxth r2, r3
800727a: 6b7b ldr r3, [r7, #52] @ 0x34
800727c: 801a strh r2, [r3, #0]
800727e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007282: 2b3e cmp r3, #62 @ 0x3e
8007284: d921 bls.n 80072ca <USB_EPStartXfer+0x806>
8007286: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800728a: 095b lsrs r3, r3, #5
800728c: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8007290: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007294: f003 031f and.w r3, r3, #31
8007298: 2b00 cmp r3, #0
800729a: d104 bne.n 80072a6 <USB_EPStartXfer+0x7e2>
800729c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
80072a0: 3b01 subs r3, #1
80072a2: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
80072a6: 6b7b ldr r3, [r7, #52] @ 0x34
80072a8: 881b ldrh r3, [r3, #0]
80072aa: b29a uxth r2, r3
80072ac: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
80072b0: b29b uxth r3, r3
80072b2: 029b lsls r3, r3, #10
80072b4: b29b uxth r3, r3
80072b6: 4313 orrs r3, r2
80072b8: b29b uxth r3, r3
80072ba: ea6f 4343 mvn.w r3, r3, lsl #17
80072be: ea6f 4353 mvn.w r3, r3, lsr #17
80072c2: b29a uxth r2, r3
80072c4: 6b7b ldr r3, [r7, #52] @ 0x34
80072c6: 801a strh r2, [r3, #0]
80072c8: e050 b.n 800736c <USB_EPStartXfer+0x8a8>
80072ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80072ce: 2b00 cmp r3, #0
80072d0: d10a bne.n 80072e8 <USB_EPStartXfer+0x824>
80072d2: 6b7b ldr r3, [r7, #52] @ 0x34
80072d4: 881b ldrh r3, [r3, #0]
80072d6: b29b uxth r3, r3
80072d8: ea6f 4343 mvn.w r3, r3, lsl #17
80072dc: ea6f 4353 mvn.w r3, r3, lsr #17
80072e0: b29a uxth r2, r3
80072e2: 6b7b ldr r3, [r7, #52] @ 0x34
80072e4: 801a strh r2, [r3, #0]
80072e6: e041 b.n 800736c <USB_EPStartXfer+0x8a8>
80072e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80072ec: 085b lsrs r3, r3, #1
80072ee: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
80072f2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80072f6: f003 0301 and.w r3, r3, #1
80072fa: 2b00 cmp r3, #0
80072fc: d004 beq.n 8007308 <USB_EPStartXfer+0x844>
80072fe: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8007302: 3301 adds r3, #1
8007304: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8007308: 6b7b ldr r3, [r7, #52] @ 0x34
800730a: 881b ldrh r3, [r3, #0]
800730c: b29a uxth r2, r3
800730e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8007312: b29b uxth r3, r3
8007314: 029b lsls r3, r3, #10
8007316: b29b uxth r3, r3
8007318: 4313 orrs r3, r2
800731a: b29a uxth r2, r3
800731c: 6b7b ldr r3, [r7, #52] @ 0x34
800731e: 801a strh r2, [r3, #0]
8007320: e024 b.n 800736c <USB_EPStartXfer+0x8a8>
8007322: f507 7384 add.w r3, r7, #264 @ 0x108
8007326: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800732a: 681b ldr r3, [r3, #0]
800732c: 785b ldrb r3, [r3, #1]
800732e: 2b01 cmp r3, #1
8007330: d11c bne.n 800736c <USB_EPStartXfer+0x8a8>
8007332: f507 7384 add.w r3, r7, #264 @ 0x108
8007336: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800733a: 681b ldr r3, [r3, #0]
800733c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007340: b29b uxth r3, r3
8007342: 461a mov r2, r3
8007344: 6c3b ldr r3, [r7, #64] @ 0x40
8007346: 4413 add r3, r2
8007348: 643b str r3, [r7, #64] @ 0x40
800734a: f507 7384 add.w r3, r7, #264 @ 0x108
800734e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007352: 681b ldr r3, [r3, #0]
8007354: 781b ldrb r3, [r3, #0]
8007356: 011a lsls r2, r3, #4
8007358: 6c3b ldr r3, [r7, #64] @ 0x40
800735a: 4413 add r3, r2
800735c: f203 430c addw r3, r3, #1036 @ 0x40c
8007360: 63fb str r3, [r7, #60] @ 0x3c
8007362: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007366: b29a uxth r2, r3
8007368: 6bfb ldr r3, [r7, #60] @ 0x3c
800736a: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800736c: f507 7384 add.w r3, r7, #264 @ 0x108
8007370: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007374: 681b ldr r3, [r3, #0]
8007376: 895b ldrh r3, [r3, #10]
8007378: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800737c: f507 7384 add.w r3, r7, #264 @ 0x108
8007380: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007384: 681b ldr r3, [r3, #0]
8007386: 6959 ldr r1, [r3, #20]
8007388: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800738c: b29b uxth r3, r3
800738e: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8007392: f507 7084 add.w r0, r7, #264 @ 0x108
8007396: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800739a: 6800 ldr r0, [r0, #0]
800739c: f001 f881 bl 80084a2 <USB_WritePMA>
80073a0: e227 b.n 80077f2 <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
80073a2: f507 7384 add.w r3, r7, #264 @ 0x108
80073a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80073aa: 681b ldr r3, [r3, #0]
80073ac: 6a1b ldr r3, [r3, #32]
80073ae: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
80073b2: f507 7384 add.w r3, r7, #264 @ 0x108
80073b6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80073ba: 681a ldr r2, [r3, #0]
80073bc: f507 7384 add.w r3, r7, #264 @ 0x108
80073c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80073c4: 681b ldr r3, [r3, #0]
80073c6: 781b ldrb r3, [r3, #0]
80073c8: 009b lsls r3, r3, #2
80073ca: 4413 add r3, r2
80073cc: 881b ldrh r3, [r3, #0]
80073ce: b29b uxth r3, r3
80073d0: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
80073d4: f023 0370 bic.w r3, r3, #112 @ 0x70
80073d8: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
80073dc: f507 7384 add.w r3, r7, #264 @ 0x108
80073e0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80073e4: 681a ldr r2, [r3, #0]
80073e6: f507 7384 add.w r3, r7, #264 @ 0x108
80073ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80073ee: 681b ldr r3, [r3, #0]
80073f0: 781b ldrb r3, [r3, #0]
80073f2: 009b lsls r3, r3, #2
80073f4: 441a add r2, r3
80073f6: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
80073fa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80073fe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007402: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007406: f043 0380 orr.w r3, r3, #128 @ 0x80
800740a: b29b uxth r3, r3
800740c: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800740e: f507 7384 add.w r3, r7, #264 @ 0x108
8007412: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007416: 681b ldr r3, [r3, #0]
8007418: 65fb str r3, [r7, #92] @ 0x5c
800741a: f507 7384 add.w r3, r7, #264 @ 0x108
800741e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007422: 681b ldr r3, [r3, #0]
8007424: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007428: b29b uxth r3, r3
800742a: 461a mov r2, r3
800742c: 6dfb ldr r3, [r7, #92] @ 0x5c
800742e: 4413 add r3, r2
8007430: 65fb str r3, [r7, #92] @ 0x5c
8007432: f507 7384 add.w r3, r7, #264 @ 0x108
8007436: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800743a: 681b ldr r3, [r3, #0]
800743c: 781b ldrb r3, [r3, #0]
800743e: 011a lsls r2, r3, #4
8007440: 6dfb ldr r3, [r7, #92] @ 0x5c
8007442: 4413 add r3, r2
8007444: f203 4304 addw r3, r3, #1028 @ 0x404
8007448: 65bb str r3, [r7, #88] @ 0x58
800744a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800744e: b29a uxth r2, r3
8007450: 6dbb ldr r3, [r7, #88] @ 0x58
8007452: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8007454: f507 7384 add.w r3, r7, #264 @ 0x108
8007458: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800745c: 681b ldr r3, [r3, #0]
800745e: 891b ldrh r3, [r3, #8]
8007460: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8007464: f507 7384 add.w r3, r7, #264 @ 0x108
8007468: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800746c: 681b ldr r3, [r3, #0]
800746e: 6959 ldr r1, [r3, #20]
8007470: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007474: b29b uxth r3, r3
8007476: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800747a: f507 7084 add.w r0, r7, #264 @ 0x108
800747e: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8007482: 6800 ldr r0, [r0, #0]
8007484: f001 f80d bl 80084a2 <USB_WritePMA>
8007488: e1b3 b.n 80077f2 <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800748a: f507 7384 add.w r3, r7, #264 @ 0x108
800748e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007492: 681b ldr r3, [r3, #0]
8007494: 6a1a ldr r2, [r3, #32]
8007496: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800749a: 1ad2 subs r2, r2, r3
800749c: f507 7384 add.w r3, r7, #264 @ 0x108
80074a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80074a4: 681b ldr r3, [r3, #0]
80074a6: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
80074a8: f507 7384 add.w r3, r7, #264 @ 0x108
80074ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80074b0: 681a ldr r2, [r3, #0]
80074b2: f507 7384 add.w r3, r7, #264 @ 0x108
80074b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80074ba: 681b ldr r3, [r3, #0]
80074bc: 781b ldrb r3, [r3, #0]
80074be: 009b lsls r3, r3, #2
80074c0: 4413 add r3, r2
80074c2: 881b ldrh r3, [r3, #0]
80074c4: b29b uxth r3, r3
80074c6: f003 0340 and.w r3, r3, #64 @ 0x40
80074ca: 2b00 cmp r3, #0
80074cc: f000 80c6 beq.w 800765c <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
80074d0: f507 7384 add.w r3, r7, #264 @ 0x108
80074d4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80074d8: 681b ldr r3, [r3, #0]
80074da: 673b str r3, [r7, #112] @ 0x70
80074dc: f507 7384 add.w r3, r7, #264 @ 0x108
80074e0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80074e4: 681b ldr r3, [r3, #0]
80074e6: 785b ldrb r3, [r3, #1]
80074e8: 2b00 cmp r3, #0
80074ea: d177 bne.n 80075dc <USB_EPStartXfer+0xb18>
80074ec: f507 7384 add.w r3, r7, #264 @ 0x108
80074f0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80074f4: 681b ldr r3, [r3, #0]
80074f6: 66bb str r3, [r7, #104] @ 0x68
80074f8: f507 7384 add.w r3, r7, #264 @ 0x108
80074fc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007500: 681b ldr r3, [r3, #0]
8007502: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007506: b29b uxth r3, r3
8007508: 461a mov r2, r3
800750a: 6ebb ldr r3, [r7, #104] @ 0x68
800750c: 4413 add r3, r2
800750e: 66bb str r3, [r7, #104] @ 0x68
8007510: f507 7384 add.w r3, r7, #264 @ 0x108
8007514: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007518: 681b ldr r3, [r3, #0]
800751a: 781b ldrb r3, [r3, #0]
800751c: 011a lsls r2, r3, #4
800751e: 6ebb ldr r3, [r7, #104] @ 0x68
8007520: 4413 add r3, r2
8007522: f203 430c addw r3, r3, #1036 @ 0x40c
8007526: 667b str r3, [r7, #100] @ 0x64
8007528: 6e7b ldr r3, [r7, #100] @ 0x64
800752a: 881b ldrh r3, [r3, #0]
800752c: b29b uxth r3, r3
800752e: f3c3 0309 ubfx r3, r3, #0, #10
8007532: b29a uxth r2, r3
8007534: 6e7b ldr r3, [r7, #100] @ 0x64
8007536: 801a strh r2, [r3, #0]
8007538: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800753c: 2b3e cmp r3, #62 @ 0x3e
800753e: d921 bls.n 8007584 <USB_EPStartXfer+0xac0>
8007540: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007544: 095b lsrs r3, r3, #5
8007546: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800754a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800754e: f003 031f and.w r3, r3, #31
8007552: 2b00 cmp r3, #0
8007554: d104 bne.n 8007560 <USB_EPStartXfer+0xa9c>
8007556: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800755a: 3b01 subs r3, #1
800755c: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8007560: 6e7b ldr r3, [r7, #100] @ 0x64
8007562: 881b ldrh r3, [r3, #0]
8007564: b29a uxth r2, r3
8007566: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800756a: b29b uxth r3, r3
800756c: 029b lsls r3, r3, #10
800756e: b29b uxth r3, r3
8007570: 4313 orrs r3, r2
8007572: b29b uxth r3, r3
8007574: ea6f 4343 mvn.w r3, r3, lsl #17
8007578: ea6f 4353 mvn.w r3, r3, lsr #17
800757c: b29a uxth r2, r3
800757e: 6e7b ldr r3, [r7, #100] @ 0x64
8007580: 801a strh r2, [r3, #0]
8007582: e050 b.n 8007626 <USB_EPStartXfer+0xb62>
8007584: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007588: 2b00 cmp r3, #0
800758a: d10a bne.n 80075a2 <USB_EPStartXfer+0xade>
800758c: 6e7b ldr r3, [r7, #100] @ 0x64
800758e: 881b ldrh r3, [r3, #0]
8007590: b29b uxth r3, r3
8007592: ea6f 4343 mvn.w r3, r3, lsl #17
8007596: ea6f 4353 mvn.w r3, r3, lsr #17
800759a: b29a uxth r2, r3
800759c: 6e7b ldr r3, [r7, #100] @ 0x64
800759e: 801a strh r2, [r3, #0]
80075a0: e041 b.n 8007626 <USB_EPStartXfer+0xb62>
80075a2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80075a6: 085b lsrs r3, r3, #1
80075a8: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
80075ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80075b0: f003 0301 and.w r3, r3, #1
80075b4: 2b00 cmp r3, #0
80075b6: d004 beq.n 80075c2 <USB_EPStartXfer+0xafe>
80075b8: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
80075bc: 3301 adds r3, #1
80075be: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
80075c2: 6e7b ldr r3, [r7, #100] @ 0x64
80075c4: 881b ldrh r3, [r3, #0]
80075c6: b29a uxth r2, r3
80075c8: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
80075cc: b29b uxth r3, r3
80075ce: 029b lsls r3, r3, #10
80075d0: b29b uxth r3, r3
80075d2: 4313 orrs r3, r2
80075d4: b29a uxth r2, r3
80075d6: 6e7b ldr r3, [r7, #100] @ 0x64
80075d8: 801a strh r2, [r3, #0]
80075da: e024 b.n 8007626 <USB_EPStartXfer+0xb62>
80075dc: f507 7384 add.w r3, r7, #264 @ 0x108
80075e0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80075e4: 681b ldr r3, [r3, #0]
80075e6: 785b ldrb r3, [r3, #1]
80075e8: 2b01 cmp r3, #1
80075ea: d11c bne.n 8007626 <USB_EPStartXfer+0xb62>
80075ec: f507 7384 add.w r3, r7, #264 @ 0x108
80075f0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80075f4: 681b ldr r3, [r3, #0]
80075f6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80075fa: b29b uxth r3, r3
80075fc: 461a mov r2, r3
80075fe: 6f3b ldr r3, [r7, #112] @ 0x70
8007600: 4413 add r3, r2
8007602: 673b str r3, [r7, #112] @ 0x70
8007604: f507 7384 add.w r3, r7, #264 @ 0x108
8007608: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800760c: 681b ldr r3, [r3, #0]
800760e: 781b ldrb r3, [r3, #0]
8007610: 011a lsls r2, r3, #4
8007612: 6f3b ldr r3, [r7, #112] @ 0x70
8007614: 4413 add r3, r2
8007616: f203 430c addw r3, r3, #1036 @ 0x40c
800761a: 66fb str r3, [r7, #108] @ 0x6c
800761c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007620: b29a uxth r2, r3
8007622: 6efb ldr r3, [r7, #108] @ 0x6c
8007624: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8007626: f507 7384 add.w r3, r7, #264 @ 0x108
800762a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800762e: 681b ldr r3, [r3, #0]
8007630: 895b ldrh r3, [r3, #10]
8007632: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8007636: f507 7384 add.w r3, r7, #264 @ 0x108
800763a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800763e: 681b ldr r3, [r3, #0]
8007640: 6959 ldr r1, [r3, #20]
8007642: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007646: b29b uxth r3, r3
8007648: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800764c: f507 7084 add.w r0, r7, #264 @ 0x108
8007650: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8007654: 6800 ldr r0, [r0, #0]
8007656: f000 ff24 bl 80084a2 <USB_WritePMA>
800765a: e0ca b.n 80077f2 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800765c: f507 7384 add.w r3, r7, #264 @ 0x108
8007660: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007664: 681b ldr r3, [r3, #0]
8007666: 785b ldrb r3, [r3, #1]
8007668: 2b00 cmp r3, #0
800766a: d177 bne.n 800775c <USB_EPStartXfer+0xc98>
800766c: f507 7384 add.w r3, r7, #264 @ 0x108
8007670: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007674: 681b ldr r3, [r3, #0]
8007676: 67fb str r3, [r7, #124] @ 0x7c
8007678: f507 7384 add.w r3, r7, #264 @ 0x108
800767c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007680: 681b ldr r3, [r3, #0]
8007682: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007686: b29b uxth r3, r3
8007688: 461a mov r2, r3
800768a: 6ffb ldr r3, [r7, #124] @ 0x7c
800768c: 4413 add r3, r2
800768e: 67fb str r3, [r7, #124] @ 0x7c
8007690: f507 7384 add.w r3, r7, #264 @ 0x108
8007694: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007698: 681b ldr r3, [r3, #0]
800769a: 781b ldrb r3, [r3, #0]
800769c: 011a lsls r2, r3, #4
800769e: 6ffb ldr r3, [r7, #124] @ 0x7c
80076a0: 4413 add r3, r2
80076a2: f203 4304 addw r3, r3, #1028 @ 0x404
80076a6: 67bb str r3, [r7, #120] @ 0x78
80076a8: 6fbb ldr r3, [r7, #120] @ 0x78
80076aa: 881b ldrh r3, [r3, #0]
80076ac: b29b uxth r3, r3
80076ae: f3c3 0309 ubfx r3, r3, #0, #10
80076b2: b29a uxth r2, r3
80076b4: 6fbb ldr r3, [r7, #120] @ 0x78
80076b6: 801a strh r2, [r3, #0]
80076b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80076bc: 2b3e cmp r3, #62 @ 0x3e
80076be: d921 bls.n 8007704 <USB_EPStartXfer+0xc40>
80076c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80076c4: 095b lsrs r3, r3, #5
80076c6: f8c7 30ec str.w r3, [r7, #236] @ 0xec
80076ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80076ce: f003 031f and.w r3, r3, #31
80076d2: 2b00 cmp r3, #0
80076d4: d104 bne.n 80076e0 <USB_EPStartXfer+0xc1c>
80076d6: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
80076da: 3b01 subs r3, #1
80076dc: f8c7 30ec str.w r3, [r7, #236] @ 0xec
80076e0: 6fbb ldr r3, [r7, #120] @ 0x78
80076e2: 881b ldrh r3, [r3, #0]
80076e4: b29a uxth r2, r3
80076e6: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
80076ea: b29b uxth r3, r3
80076ec: 029b lsls r3, r3, #10
80076ee: b29b uxth r3, r3
80076f0: 4313 orrs r3, r2
80076f2: b29b uxth r3, r3
80076f4: ea6f 4343 mvn.w r3, r3, lsl #17
80076f8: ea6f 4353 mvn.w r3, r3, lsr #17
80076fc: b29a uxth r2, r3
80076fe: 6fbb ldr r3, [r7, #120] @ 0x78
8007700: 801a strh r2, [r3, #0]
8007702: e05c b.n 80077be <USB_EPStartXfer+0xcfa>
8007704: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007708: 2b00 cmp r3, #0
800770a: d10a bne.n 8007722 <USB_EPStartXfer+0xc5e>
800770c: 6fbb ldr r3, [r7, #120] @ 0x78
800770e: 881b ldrh r3, [r3, #0]
8007710: b29b uxth r3, r3
8007712: ea6f 4343 mvn.w r3, r3, lsl #17
8007716: ea6f 4353 mvn.w r3, r3, lsr #17
800771a: b29a uxth r2, r3
800771c: 6fbb ldr r3, [r7, #120] @ 0x78
800771e: 801a strh r2, [r3, #0]
8007720: e04d b.n 80077be <USB_EPStartXfer+0xcfa>
8007722: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007726: 085b lsrs r3, r3, #1
8007728: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800772c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007730: f003 0301 and.w r3, r3, #1
8007734: 2b00 cmp r3, #0
8007736: d004 beq.n 8007742 <USB_EPStartXfer+0xc7e>
8007738: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800773c: 3301 adds r3, #1
800773e: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8007742: 6fbb ldr r3, [r7, #120] @ 0x78
8007744: 881b ldrh r3, [r3, #0]
8007746: b29a uxth r2, r3
8007748: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800774c: b29b uxth r3, r3
800774e: 029b lsls r3, r3, #10
8007750: b29b uxth r3, r3
8007752: 4313 orrs r3, r2
8007754: b29a uxth r2, r3
8007756: 6fbb ldr r3, [r7, #120] @ 0x78
8007758: 801a strh r2, [r3, #0]
800775a: e030 b.n 80077be <USB_EPStartXfer+0xcfa>
800775c: f507 7384 add.w r3, r7, #264 @ 0x108
8007760: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007764: 681b ldr r3, [r3, #0]
8007766: 785b ldrb r3, [r3, #1]
8007768: 2b01 cmp r3, #1
800776a: d128 bne.n 80077be <USB_EPStartXfer+0xcfa>
800776c: f507 7384 add.w r3, r7, #264 @ 0x108
8007770: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007774: 681b ldr r3, [r3, #0]
8007776: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800777a: f507 7384 add.w r3, r7, #264 @ 0x108
800777e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007782: 681b ldr r3, [r3, #0]
8007784: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007788: b29b uxth r3, r3
800778a: 461a mov r2, r3
800778c: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
8007790: 4413 add r3, r2
8007792: f8c7 3084 str.w r3, [r7, #132] @ 0x84
8007796: f507 7384 add.w r3, r7, #264 @ 0x108
800779a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800779e: 681b ldr r3, [r3, #0]
80077a0: 781b ldrb r3, [r3, #0]
80077a2: 011a lsls r2, r3, #4
80077a4: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
80077a8: 4413 add r3, r2
80077aa: f203 4304 addw r3, r3, #1028 @ 0x404
80077ae: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80077b2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80077b6: b29a uxth r2, r3
80077b8: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80077bc: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80077be: f507 7384 add.w r3, r7, #264 @ 0x108
80077c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80077c6: 681b ldr r3, [r3, #0]
80077c8: 891b ldrh r3, [r3, #8]
80077ca: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80077ce: f507 7384 add.w r3, r7, #264 @ 0x108
80077d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80077d6: 681b ldr r3, [r3, #0]
80077d8: 6959 ldr r1, [r3, #20]
80077da: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80077de: b29b uxth r3, r3
80077e0: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80077e4: f507 7084 add.w r0, r7, #264 @ 0x108
80077e8: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80077ec: 6800 ldr r0, [r0, #0]
80077ee: f000 fe58 bl 80084a2 <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
80077f2: f507 7384 add.w r3, r7, #264 @ 0x108
80077f6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80077fa: 681a ldr r2, [r3, #0]
80077fc: f507 7384 add.w r3, r7, #264 @ 0x108
8007800: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007804: 681b ldr r3, [r3, #0]
8007806: 781b ldrb r3, [r3, #0]
8007808: 009b lsls r3, r3, #2
800780a: 4413 add r3, r2
800780c: 881b ldrh r3, [r3, #0]
800780e: b29b uxth r3, r3
8007810: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007814: f023 0340 bic.w r3, r3, #64 @ 0x40
8007818: 817b strh r3, [r7, #10]
800781a: 897b ldrh r3, [r7, #10]
800781c: f083 0310 eor.w r3, r3, #16
8007820: 817b strh r3, [r7, #10]
8007822: 897b ldrh r3, [r7, #10]
8007824: f083 0320 eor.w r3, r3, #32
8007828: 817b strh r3, [r7, #10]
800782a: f507 7384 add.w r3, r7, #264 @ 0x108
800782e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007832: 681a ldr r2, [r3, #0]
8007834: f507 7384 add.w r3, r7, #264 @ 0x108
8007838: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800783c: 681b ldr r3, [r3, #0]
800783e: 781b ldrb r3, [r3, #0]
8007840: 009b lsls r3, r3, #2
8007842: 441a add r2, r3
8007844: 897b ldrh r3, [r7, #10]
8007846: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800784a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800784e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007852: f043 0380 orr.w r3, r3, #128 @ 0x80
8007856: b29b uxth r3, r3
8007858: 8013 strh r3, [r2, #0]
800785a: f000 bcde b.w 800821a <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800785e: f507 7384 add.w r3, r7, #264 @ 0x108
8007862: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007866: 681b ldr r3, [r3, #0]
8007868: 7b1b ldrb r3, [r3, #12]
800786a: 2b00 cmp r3, #0
800786c: f040 80bb bne.w 80079e6 <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8007870: f507 7384 add.w r3, r7, #264 @ 0x108
8007874: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007878: 681b ldr r3, [r3, #0]
800787a: 699a ldr r2, [r3, #24]
800787c: f507 7384 add.w r3, r7, #264 @ 0x108
8007880: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007884: 681b ldr r3, [r3, #0]
8007886: 691b ldr r3, [r3, #16]
8007888: 429a cmp r2, r3
800788a: d917 bls.n 80078bc <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
800788c: f507 7384 add.w r3, r7, #264 @ 0x108
8007890: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007894: 681b ldr r3, [r3, #0]
8007896: 691b ldr r3, [r3, #16]
8007898: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800789c: f507 7384 add.w r3, r7, #264 @ 0x108
80078a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80078a4: 681b ldr r3, [r3, #0]
80078a6: 699a ldr r2, [r3, #24]
80078a8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80078ac: 1ad2 subs r2, r2, r3
80078ae: f507 7384 add.w r3, r7, #264 @ 0x108
80078b2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80078b6: 681b ldr r3, [r3, #0]
80078b8: 619a str r2, [r3, #24]
80078ba: e00e b.n 80078da <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
80078bc: f507 7384 add.w r3, r7, #264 @ 0x108
80078c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80078c4: 681b ldr r3, [r3, #0]
80078c6: 699b ldr r3, [r3, #24]
80078c8: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
80078cc: f507 7384 add.w r3, r7, #264 @ 0x108
80078d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80078d4: 681b ldr r3, [r3, #0]
80078d6: 2200 movs r2, #0
80078d8: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
80078da: f507 7384 add.w r3, r7, #264 @ 0x108
80078de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80078e2: 681b ldr r3, [r3, #0]
80078e4: f8c7 3090 str.w r3, [r7, #144] @ 0x90
80078e8: f507 7384 add.w r3, r7, #264 @ 0x108
80078ec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80078f0: 681b ldr r3, [r3, #0]
80078f2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80078f6: b29b uxth r3, r3
80078f8: 461a mov r2, r3
80078fa: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
80078fe: 4413 add r3, r2
8007900: f8c7 3090 str.w r3, [r7, #144] @ 0x90
8007904: f507 7384 add.w r3, r7, #264 @ 0x108
8007908: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800790c: 681b ldr r3, [r3, #0]
800790e: 781b ldrb r3, [r3, #0]
8007910: 011a lsls r2, r3, #4
8007912: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
8007916: 4413 add r3, r2
8007918: f203 430c addw r3, r3, #1036 @ 0x40c
800791c: f8c7 308c str.w r3, [r7, #140] @ 0x8c
8007920: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007924: 881b ldrh r3, [r3, #0]
8007926: b29b uxth r3, r3
8007928: f3c3 0309 ubfx r3, r3, #0, #10
800792c: b29a uxth r2, r3
800792e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007932: 801a strh r2, [r3, #0]
8007934: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007938: 2b3e cmp r3, #62 @ 0x3e
800793a: d924 bls.n 8007986 <USB_EPStartXfer+0xec2>
800793c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007940: 095b lsrs r3, r3, #5
8007942: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8007946: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800794a: f003 031f and.w r3, r3, #31
800794e: 2b00 cmp r3, #0
8007950: d104 bne.n 800795c <USB_EPStartXfer+0xe98>
8007952: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8007956: 3b01 subs r3, #1
8007958: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800795c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007960: 881b ldrh r3, [r3, #0]
8007962: b29a uxth r2, r3
8007964: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8007968: b29b uxth r3, r3
800796a: 029b lsls r3, r3, #10
800796c: b29b uxth r3, r3
800796e: 4313 orrs r3, r2
8007970: b29b uxth r3, r3
8007972: ea6f 4343 mvn.w r3, r3, lsl #17
8007976: ea6f 4353 mvn.w r3, r3, lsr #17
800797a: b29a uxth r2, r3
800797c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007980: 801a strh r2, [r3, #0]
8007982: f000 bc10 b.w 80081a6 <USB_EPStartXfer+0x16e2>
8007986: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800798a: 2b00 cmp r3, #0
800798c: d10c bne.n 80079a8 <USB_EPStartXfer+0xee4>
800798e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007992: 881b ldrh r3, [r3, #0]
8007994: b29b uxth r3, r3
8007996: ea6f 4343 mvn.w r3, r3, lsl #17
800799a: ea6f 4353 mvn.w r3, r3, lsr #17
800799e: b29a uxth r2, r3
80079a0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80079a4: 801a strh r2, [r3, #0]
80079a6: e3fe b.n 80081a6 <USB_EPStartXfer+0x16e2>
80079a8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80079ac: 085b lsrs r3, r3, #1
80079ae: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
80079b2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80079b6: f003 0301 and.w r3, r3, #1
80079ba: 2b00 cmp r3, #0
80079bc: d004 beq.n 80079c8 <USB_EPStartXfer+0xf04>
80079be: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
80079c2: 3301 adds r3, #1
80079c4: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
80079c8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80079cc: 881b ldrh r3, [r3, #0]
80079ce: b29a uxth r2, r3
80079d0: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
80079d4: b29b uxth r3, r3
80079d6: 029b lsls r3, r3, #10
80079d8: b29b uxth r3, r3
80079da: 4313 orrs r3, r2
80079dc: b29a uxth r2, r3
80079de: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80079e2: 801a strh r2, [r3, #0]
80079e4: e3df b.n 80081a6 <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
80079e6: f507 7384 add.w r3, r7, #264 @ 0x108
80079ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80079ee: 681b ldr r3, [r3, #0]
80079f0: 78db ldrb r3, [r3, #3]
80079f2: 2b02 cmp r3, #2
80079f4: f040 8218 bne.w 8007e28 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
80079f8: f507 7384 add.w r3, r7, #264 @ 0x108
80079fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a00: 681b ldr r3, [r3, #0]
8007a02: 785b ldrb r3, [r3, #1]
8007a04: 2b00 cmp r3, #0
8007a06: f040 809d bne.w 8007b44 <USB_EPStartXfer+0x1080>
8007a0a: f507 7384 add.w r3, r7, #264 @ 0x108
8007a0e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007a12: 681b ldr r3, [r3, #0]
8007a14: f8c7 30ac str.w r3, [r7, #172] @ 0xac
8007a18: f507 7384 add.w r3, r7, #264 @ 0x108
8007a1c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007a20: 681b ldr r3, [r3, #0]
8007a22: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007a26: b29b uxth r3, r3
8007a28: 461a mov r2, r3
8007a2a: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8007a2e: 4413 add r3, r2
8007a30: f8c7 30ac str.w r3, [r7, #172] @ 0xac
8007a34: f507 7384 add.w r3, r7, #264 @ 0x108
8007a38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a3c: 681b ldr r3, [r3, #0]
8007a3e: 781b ldrb r3, [r3, #0]
8007a40: 011a lsls r2, r3, #4
8007a42: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8007a46: 4413 add r3, r2
8007a48: f203 4304 addw r3, r3, #1028 @ 0x404
8007a4c: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
8007a50: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007a54: 881b ldrh r3, [r3, #0]
8007a56: b29b uxth r3, r3
8007a58: f3c3 0309 ubfx r3, r3, #0, #10
8007a5c: b29a uxth r2, r3
8007a5e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007a62: 801a strh r2, [r3, #0]
8007a64: f507 7384 add.w r3, r7, #264 @ 0x108
8007a68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a6c: 681b ldr r3, [r3, #0]
8007a6e: 691b ldr r3, [r3, #16]
8007a70: 2b3e cmp r3, #62 @ 0x3e
8007a72: d92b bls.n 8007acc <USB_EPStartXfer+0x1008>
8007a74: f507 7384 add.w r3, r7, #264 @ 0x108
8007a78: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a7c: 681b ldr r3, [r3, #0]
8007a7e: 691b ldr r3, [r3, #16]
8007a80: 095b lsrs r3, r3, #5
8007a82: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8007a86: f507 7384 add.w r3, r7, #264 @ 0x108
8007a8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a8e: 681b ldr r3, [r3, #0]
8007a90: 691b ldr r3, [r3, #16]
8007a92: f003 031f and.w r3, r3, #31
8007a96: 2b00 cmp r3, #0
8007a98: d104 bne.n 8007aa4 <USB_EPStartXfer+0xfe0>
8007a9a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8007a9e: 3b01 subs r3, #1
8007aa0: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8007aa4: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007aa8: 881b ldrh r3, [r3, #0]
8007aaa: b29a uxth r2, r3
8007aac: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8007ab0: b29b uxth r3, r3
8007ab2: 029b lsls r3, r3, #10
8007ab4: b29b uxth r3, r3
8007ab6: 4313 orrs r3, r2
8007ab8: b29b uxth r3, r3
8007aba: ea6f 4343 mvn.w r3, r3, lsl #17
8007abe: ea6f 4353 mvn.w r3, r3, lsr #17
8007ac2: b29a uxth r2, r3
8007ac4: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007ac8: 801a strh r2, [r3, #0]
8007aca: e070 b.n 8007bae <USB_EPStartXfer+0x10ea>
8007acc: f507 7384 add.w r3, r7, #264 @ 0x108
8007ad0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007ad4: 681b ldr r3, [r3, #0]
8007ad6: 691b ldr r3, [r3, #16]
8007ad8: 2b00 cmp r3, #0
8007ada: d10c bne.n 8007af6 <USB_EPStartXfer+0x1032>
8007adc: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007ae0: 881b ldrh r3, [r3, #0]
8007ae2: b29b uxth r3, r3
8007ae4: ea6f 4343 mvn.w r3, r3, lsl #17
8007ae8: ea6f 4353 mvn.w r3, r3, lsr #17
8007aec: b29a uxth r2, r3
8007aee: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007af2: 801a strh r2, [r3, #0]
8007af4: e05b b.n 8007bae <USB_EPStartXfer+0x10ea>
8007af6: f507 7384 add.w r3, r7, #264 @ 0x108
8007afa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007afe: 681b ldr r3, [r3, #0]
8007b00: 691b ldr r3, [r3, #16]
8007b02: 085b lsrs r3, r3, #1
8007b04: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8007b08: f507 7384 add.w r3, r7, #264 @ 0x108
8007b0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007b10: 681b ldr r3, [r3, #0]
8007b12: 691b ldr r3, [r3, #16]
8007b14: f003 0301 and.w r3, r3, #1
8007b18: 2b00 cmp r3, #0
8007b1a: d004 beq.n 8007b26 <USB_EPStartXfer+0x1062>
8007b1c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8007b20: 3301 adds r3, #1
8007b22: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8007b26: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007b2a: 881b ldrh r3, [r3, #0]
8007b2c: b29a uxth r2, r3
8007b2e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8007b32: b29b uxth r3, r3
8007b34: 029b lsls r3, r3, #10
8007b36: b29b uxth r3, r3
8007b38: 4313 orrs r3, r2
8007b3a: b29a uxth r2, r3
8007b3c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007b40: 801a strh r2, [r3, #0]
8007b42: e034 b.n 8007bae <USB_EPStartXfer+0x10ea>
8007b44: f507 7384 add.w r3, r7, #264 @ 0x108
8007b48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007b4c: 681b ldr r3, [r3, #0]
8007b4e: 785b ldrb r3, [r3, #1]
8007b50: 2b01 cmp r3, #1
8007b52: d12c bne.n 8007bae <USB_EPStartXfer+0x10ea>
8007b54: f507 7384 add.w r3, r7, #264 @ 0x108
8007b58: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007b5c: 681b ldr r3, [r3, #0]
8007b5e: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8007b62: f507 7384 add.w r3, r7, #264 @ 0x108
8007b66: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007b6a: 681b ldr r3, [r3, #0]
8007b6c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007b70: b29b uxth r3, r3
8007b72: 461a mov r2, r3
8007b74: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8007b78: 4413 add r3, r2
8007b7a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8007b7e: f507 7384 add.w r3, r7, #264 @ 0x108
8007b82: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007b86: 681b ldr r3, [r3, #0]
8007b88: 781b ldrb r3, [r3, #0]
8007b8a: 011a lsls r2, r3, #4
8007b8c: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8007b90: 4413 add r3, r2
8007b92: f203 4304 addw r3, r3, #1028 @ 0x404
8007b96: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
8007b9a: f507 7384 add.w r3, r7, #264 @ 0x108
8007b9e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007ba2: 681b ldr r3, [r3, #0]
8007ba4: 691b ldr r3, [r3, #16]
8007ba6: b29a uxth r2, r3
8007ba8: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
8007bac: 801a strh r2, [r3, #0]
8007bae: f507 7384 add.w r3, r7, #264 @ 0x108
8007bb2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007bb6: 681b ldr r3, [r3, #0]
8007bb8: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8007bbc: f507 7384 add.w r3, r7, #264 @ 0x108
8007bc0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007bc4: 681b ldr r3, [r3, #0]
8007bc6: 785b ldrb r3, [r3, #1]
8007bc8: 2b00 cmp r3, #0
8007bca: f040 809d bne.w 8007d08 <USB_EPStartXfer+0x1244>
8007bce: f507 7384 add.w r3, r7, #264 @ 0x108
8007bd2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007bd6: 681b ldr r3, [r3, #0]
8007bd8: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8007bdc: f507 7384 add.w r3, r7, #264 @ 0x108
8007be0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007be4: 681b ldr r3, [r3, #0]
8007be6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007bea: b29b uxth r3, r3
8007bec: 461a mov r2, r3
8007bee: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8007bf2: 4413 add r3, r2
8007bf4: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8007bf8: f507 7384 add.w r3, r7, #264 @ 0x108
8007bfc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c00: 681b ldr r3, [r3, #0]
8007c02: 781b ldrb r3, [r3, #0]
8007c04: 011a lsls r2, r3, #4
8007c06: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8007c0a: 4413 add r3, r2
8007c0c: f203 430c addw r3, r3, #1036 @ 0x40c
8007c10: f8c7 3098 str.w r3, [r7, #152] @ 0x98
8007c14: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007c18: 881b ldrh r3, [r3, #0]
8007c1a: b29b uxth r3, r3
8007c1c: f3c3 0309 ubfx r3, r3, #0, #10
8007c20: b29a uxth r2, r3
8007c22: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007c26: 801a strh r2, [r3, #0]
8007c28: f507 7384 add.w r3, r7, #264 @ 0x108
8007c2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c30: 681b ldr r3, [r3, #0]
8007c32: 691b ldr r3, [r3, #16]
8007c34: 2b3e cmp r3, #62 @ 0x3e
8007c36: d92b bls.n 8007c90 <USB_EPStartXfer+0x11cc>
8007c38: f507 7384 add.w r3, r7, #264 @ 0x108
8007c3c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c40: 681b ldr r3, [r3, #0]
8007c42: 691b ldr r3, [r3, #16]
8007c44: 095b lsrs r3, r3, #5
8007c46: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8007c4a: f507 7384 add.w r3, r7, #264 @ 0x108
8007c4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c52: 681b ldr r3, [r3, #0]
8007c54: 691b ldr r3, [r3, #16]
8007c56: f003 031f and.w r3, r3, #31
8007c5a: 2b00 cmp r3, #0
8007c5c: d104 bne.n 8007c68 <USB_EPStartXfer+0x11a4>
8007c5e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8007c62: 3b01 subs r3, #1
8007c64: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8007c68: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007c6c: 881b ldrh r3, [r3, #0]
8007c6e: b29a uxth r2, r3
8007c70: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8007c74: b29b uxth r3, r3
8007c76: 029b lsls r3, r3, #10
8007c78: b29b uxth r3, r3
8007c7a: 4313 orrs r3, r2
8007c7c: b29b uxth r3, r3
8007c7e: ea6f 4343 mvn.w r3, r3, lsl #17
8007c82: ea6f 4353 mvn.w r3, r3, lsr #17
8007c86: b29a uxth r2, r3
8007c88: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007c8c: 801a strh r2, [r3, #0]
8007c8e: e069 b.n 8007d64 <USB_EPStartXfer+0x12a0>
8007c90: f507 7384 add.w r3, r7, #264 @ 0x108
8007c94: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c98: 681b ldr r3, [r3, #0]
8007c9a: 691b ldr r3, [r3, #16]
8007c9c: 2b00 cmp r3, #0
8007c9e: d10c bne.n 8007cba <USB_EPStartXfer+0x11f6>
8007ca0: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007ca4: 881b ldrh r3, [r3, #0]
8007ca6: b29b uxth r3, r3
8007ca8: ea6f 4343 mvn.w r3, r3, lsl #17
8007cac: ea6f 4353 mvn.w r3, r3, lsr #17
8007cb0: b29a uxth r2, r3
8007cb2: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007cb6: 801a strh r2, [r3, #0]
8007cb8: e054 b.n 8007d64 <USB_EPStartXfer+0x12a0>
8007cba: f507 7384 add.w r3, r7, #264 @ 0x108
8007cbe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007cc2: 681b ldr r3, [r3, #0]
8007cc4: 691b ldr r3, [r3, #16]
8007cc6: 085b lsrs r3, r3, #1
8007cc8: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8007ccc: f507 7384 add.w r3, r7, #264 @ 0x108
8007cd0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007cd4: 681b ldr r3, [r3, #0]
8007cd6: 691b ldr r3, [r3, #16]
8007cd8: f003 0301 and.w r3, r3, #1
8007cdc: 2b00 cmp r3, #0
8007cde: d004 beq.n 8007cea <USB_EPStartXfer+0x1226>
8007ce0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8007ce4: 3301 adds r3, #1
8007ce6: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8007cea: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007cee: 881b ldrh r3, [r3, #0]
8007cf0: b29a uxth r2, r3
8007cf2: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8007cf6: b29b uxth r3, r3
8007cf8: 029b lsls r3, r3, #10
8007cfa: b29b uxth r3, r3
8007cfc: 4313 orrs r3, r2
8007cfe: b29a uxth r2, r3
8007d00: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007d04: 801a strh r2, [r3, #0]
8007d06: e02d b.n 8007d64 <USB_EPStartXfer+0x12a0>
8007d08: f507 7384 add.w r3, r7, #264 @ 0x108
8007d0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d10: 681b ldr r3, [r3, #0]
8007d12: 785b ldrb r3, [r3, #1]
8007d14: 2b01 cmp r3, #1
8007d16: d125 bne.n 8007d64 <USB_EPStartXfer+0x12a0>
8007d18: f507 7384 add.w r3, r7, #264 @ 0x108
8007d1c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007d20: 681b ldr r3, [r3, #0]
8007d22: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007d26: b29b uxth r3, r3
8007d28: 461a mov r2, r3
8007d2a: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8007d2e: 4413 add r3, r2
8007d30: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8007d34: f507 7384 add.w r3, r7, #264 @ 0x108
8007d38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d3c: 681b ldr r3, [r3, #0]
8007d3e: 781b ldrb r3, [r3, #0]
8007d40: 011a lsls r2, r3, #4
8007d42: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8007d46: 4413 add r3, r2
8007d48: f203 430c addw r3, r3, #1036 @ 0x40c
8007d4c: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
8007d50: f507 7384 add.w r3, r7, #264 @ 0x108
8007d54: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d58: 681b ldr r3, [r3, #0]
8007d5a: 691b ldr r3, [r3, #16]
8007d5c: b29a uxth r2, r3
8007d5e: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
8007d62: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
8007d64: f507 7384 add.w r3, r7, #264 @ 0x108
8007d68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d6c: 681b ldr r3, [r3, #0]
8007d6e: 69db ldr r3, [r3, #28]
8007d70: 2b00 cmp r3, #0
8007d72: f000 8218 beq.w 80081a6 <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
8007d76: f507 7384 add.w r3, r7, #264 @ 0x108
8007d7a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007d7e: 681a ldr r2, [r3, #0]
8007d80: f507 7384 add.w r3, r7, #264 @ 0x108
8007d84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d88: 681b ldr r3, [r3, #0]
8007d8a: 781b ldrb r3, [r3, #0]
8007d8c: 009b lsls r3, r3, #2
8007d8e: 4413 add r3, r2
8007d90: 881b ldrh r3, [r3, #0]
8007d92: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8007d96: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8007d9a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007d9e: 2b00 cmp r3, #0
8007da0: d005 beq.n 8007dae <USB_EPStartXfer+0x12ea>
8007da2: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8007da6: f003 0340 and.w r3, r3, #64 @ 0x40
8007daa: 2b00 cmp r3, #0
8007dac: d10d bne.n 8007dca <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8007dae: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8007db2: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8007db6: 2b00 cmp r3, #0
8007db8: f040 81f5 bne.w 80081a6 <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8007dbc: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8007dc0: f003 0340 and.w r3, r3, #64 @ 0x40
8007dc4: 2b00 cmp r3, #0
8007dc6: f040 81ee bne.w 80081a6 <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
8007dca: f507 7384 add.w r3, r7, #264 @ 0x108
8007dce: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007dd2: 681a ldr r2, [r3, #0]
8007dd4: f507 7384 add.w r3, r7, #264 @ 0x108
8007dd8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007ddc: 681b ldr r3, [r3, #0]
8007dde: 781b ldrb r3, [r3, #0]
8007de0: 009b lsls r3, r3, #2
8007de2: 4413 add r3, r2
8007de4: 881b ldrh r3, [r3, #0]
8007de6: b29b uxth r3, r3
8007de8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007dec: f023 0370 bic.w r3, r3, #112 @ 0x70
8007df0: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
8007df4: f507 7384 add.w r3, r7, #264 @ 0x108
8007df8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007dfc: 681a ldr r2, [r3, #0]
8007dfe: f507 7384 add.w r3, r7, #264 @ 0x108
8007e02: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e06: 681b ldr r3, [r3, #0]
8007e08: 781b ldrb r3, [r3, #0]
8007e0a: 009b lsls r3, r3, #2
8007e0c: 441a add r2, r3
8007e0e: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
8007e12: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007e16: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007e1a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007e1e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007e22: b29b uxth r3, r3
8007e24: 8013 strh r3, [r2, #0]
8007e26: e1be b.n 80081a6 <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
8007e28: f507 7384 add.w r3, r7, #264 @ 0x108
8007e2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e30: 681b ldr r3, [r3, #0]
8007e32: 78db ldrb r3, [r3, #3]
8007e34: 2b01 cmp r3, #1
8007e36: f040 81b4 bne.w 80081a2 <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8007e3a: f507 7384 add.w r3, r7, #264 @ 0x108
8007e3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e42: 681b ldr r3, [r3, #0]
8007e44: 699a ldr r2, [r3, #24]
8007e46: f507 7384 add.w r3, r7, #264 @ 0x108
8007e4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e4e: 681b ldr r3, [r3, #0]
8007e50: 691b ldr r3, [r3, #16]
8007e52: 429a cmp r2, r3
8007e54: d917 bls.n 8007e86 <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
8007e56: f507 7384 add.w r3, r7, #264 @ 0x108
8007e5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e5e: 681b ldr r3, [r3, #0]
8007e60: 691b ldr r3, [r3, #16]
8007e62: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
8007e66: f507 7384 add.w r3, r7, #264 @ 0x108
8007e6a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e6e: 681b ldr r3, [r3, #0]
8007e70: 699a ldr r2, [r3, #24]
8007e72: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007e76: 1ad2 subs r2, r2, r3
8007e78: f507 7384 add.w r3, r7, #264 @ 0x108
8007e7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e80: 681b ldr r3, [r3, #0]
8007e82: 619a str r2, [r3, #24]
8007e84: e00e b.n 8007ea4 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
8007e86: f507 7384 add.w r3, r7, #264 @ 0x108
8007e8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e8e: 681b ldr r3, [r3, #0]
8007e90: 699b ldr r3, [r3, #24]
8007e92: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
8007e96: f507 7384 add.w r3, r7, #264 @ 0x108
8007e9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e9e: 681b ldr r3, [r3, #0]
8007ea0: 2200 movs r2, #0
8007ea2: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
8007ea4: f507 7384 add.w r3, r7, #264 @ 0x108
8007ea8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007eac: 681b ldr r3, [r3, #0]
8007eae: 785b ldrb r3, [r3, #1]
8007eb0: 2b00 cmp r3, #0
8007eb2: f040 8085 bne.w 8007fc0 <USB_EPStartXfer+0x14fc>
8007eb6: f507 7384 add.w r3, r7, #264 @ 0x108
8007eba: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007ebe: 681b ldr r3, [r3, #0]
8007ec0: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8007ec4: f507 7384 add.w r3, r7, #264 @ 0x108
8007ec8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007ecc: 681b ldr r3, [r3, #0]
8007ece: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007ed2: b29b uxth r3, r3
8007ed4: 461a mov r2, r3
8007ed6: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
8007eda: 4413 add r3, r2
8007edc: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8007ee0: f507 7384 add.w r3, r7, #264 @ 0x108
8007ee4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007ee8: 681b ldr r3, [r3, #0]
8007eea: 781b ldrb r3, [r3, #0]
8007eec: 011a lsls r2, r3, #4
8007eee: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
8007ef2: 4413 add r3, r2
8007ef4: f203 4304 addw r3, r3, #1028 @ 0x404
8007ef8: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
8007efc: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007f00: 881b ldrh r3, [r3, #0]
8007f02: b29b uxth r3, r3
8007f04: f3c3 0309 ubfx r3, r3, #0, #10
8007f08: b29a uxth r2, r3
8007f0a: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007f0e: 801a strh r2, [r3, #0]
8007f10: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f14: 2b3e cmp r3, #62 @ 0x3e
8007f16: d923 bls.n 8007f60 <USB_EPStartXfer+0x149c>
8007f18: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f1c: 095b lsrs r3, r3, #5
8007f1e: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8007f22: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f26: f003 031f and.w r3, r3, #31
8007f2a: 2b00 cmp r3, #0
8007f2c: d104 bne.n 8007f38 <USB_EPStartXfer+0x1474>
8007f2e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8007f32: 3b01 subs r3, #1
8007f34: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8007f38: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007f3c: 881b ldrh r3, [r3, #0]
8007f3e: b29a uxth r2, r3
8007f40: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8007f44: b29b uxth r3, r3
8007f46: 029b lsls r3, r3, #10
8007f48: b29b uxth r3, r3
8007f4a: 4313 orrs r3, r2
8007f4c: b29b uxth r3, r3
8007f4e: ea6f 4343 mvn.w r3, r3, lsl #17
8007f52: ea6f 4353 mvn.w r3, r3, lsr #17
8007f56: b29a uxth r2, r3
8007f58: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007f5c: 801a strh r2, [r3, #0]
8007f5e: e060 b.n 8008022 <USB_EPStartXfer+0x155e>
8007f60: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f64: 2b00 cmp r3, #0
8007f66: d10c bne.n 8007f82 <USB_EPStartXfer+0x14be>
8007f68: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007f6c: 881b ldrh r3, [r3, #0]
8007f6e: b29b uxth r3, r3
8007f70: ea6f 4343 mvn.w r3, r3, lsl #17
8007f74: ea6f 4353 mvn.w r3, r3, lsr #17
8007f78: b29a uxth r2, r3
8007f7a: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007f7e: 801a strh r2, [r3, #0]
8007f80: e04f b.n 8008022 <USB_EPStartXfer+0x155e>
8007f82: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f86: 085b lsrs r3, r3, #1
8007f88: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8007f8c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f90: f003 0301 and.w r3, r3, #1
8007f94: 2b00 cmp r3, #0
8007f96: d004 beq.n 8007fa2 <USB_EPStartXfer+0x14de>
8007f98: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8007f9c: 3301 adds r3, #1
8007f9e: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8007fa2: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007fa6: 881b ldrh r3, [r3, #0]
8007fa8: b29a uxth r2, r3
8007faa: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8007fae: b29b uxth r3, r3
8007fb0: 029b lsls r3, r3, #10
8007fb2: b29b uxth r3, r3
8007fb4: 4313 orrs r3, r2
8007fb6: b29a uxth r2, r3
8007fb8: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007fbc: 801a strh r2, [r3, #0]
8007fbe: e030 b.n 8008022 <USB_EPStartXfer+0x155e>
8007fc0: f507 7384 add.w r3, r7, #264 @ 0x108
8007fc4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007fc8: 681b ldr r3, [r3, #0]
8007fca: 785b ldrb r3, [r3, #1]
8007fcc: 2b01 cmp r3, #1
8007fce: d128 bne.n 8008022 <USB_EPStartXfer+0x155e>
8007fd0: f507 7384 add.w r3, r7, #264 @ 0x108
8007fd4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007fd8: 681b ldr r3, [r3, #0]
8007fda: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
8007fde: f507 7384 add.w r3, r7, #264 @ 0x108
8007fe2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007fe6: 681b ldr r3, [r3, #0]
8007fe8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007fec: b29b uxth r3, r3
8007fee: 461a mov r2, r3
8007ff0: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8007ff4: 4413 add r3, r2
8007ff6: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
8007ffa: f507 7384 add.w r3, r7, #264 @ 0x108
8007ffe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008002: 681b ldr r3, [r3, #0]
8008004: 781b ldrb r3, [r3, #0]
8008006: 011a lsls r2, r3, #4
8008008: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800800c: 4413 add r3, r2
800800e: f203 4304 addw r3, r3, #1028 @ 0x404
8008012: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
8008016: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800801a: b29a uxth r2, r3
800801c: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
8008020: 801a strh r2, [r3, #0]
8008022: f507 7384 add.w r3, r7, #264 @ 0x108
8008026: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800802a: 681b ldr r3, [r3, #0]
800802c: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
8008030: f507 7384 add.w r3, r7, #264 @ 0x108
8008034: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008038: 681b ldr r3, [r3, #0]
800803a: 785b ldrb r3, [r3, #1]
800803c: 2b00 cmp r3, #0
800803e: f040 8085 bne.w 800814c <USB_EPStartXfer+0x1688>
8008042: f507 7384 add.w r3, r7, #264 @ 0x108
8008046: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800804a: 681b ldr r3, [r3, #0]
800804c: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8008050: f507 7384 add.w r3, r7, #264 @ 0x108
8008054: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008058: 681b ldr r3, [r3, #0]
800805a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800805e: b29b uxth r3, r3
8008060: 461a mov r2, r3
8008062: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
8008066: 4413 add r3, r2
8008068: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800806c: f507 7384 add.w r3, r7, #264 @ 0x108
8008070: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008074: 681b ldr r3, [r3, #0]
8008076: 781b ldrb r3, [r3, #0]
8008078: 011a lsls r2, r3, #4
800807a: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800807e: 4413 add r3, r2
8008080: f203 430c addw r3, r3, #1036 @ 0x40c
8008084: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
8008088: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800808c: 881b ldrh r3, [r3, #0]
800808e: b29b uxth r3, r3
8008090: f3c3 0309 ubfx r3, r3, #0, #10
8008094: b29a uxth r2, r3
8008096: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800809a: 801a strh r2, [r3, #0]
800809c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80080a0: 2b3e cmp r3, #62 @ 0x3e
80080a2: d923 bls.n 80080ec <USB_EPStartXfer+0x1628>
80080a4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80080a8: 095b lsrs r3, r3, #5
80080aa: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
80080ae: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80080b2: f003 031f and.w r3, r3, #31
80080b6: 2b00 cmp r3, #0
80080b8: d104 bne.n 80080c4 <USB_EPStartXfer+0x1600>
80080ba: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
80080be: 3b01 subs r3, #1
80080c0: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
80080c4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
80080c8: 881b ldrh r3, [r3, #0]
80080ca: b29a uxth r2, r3
80080cc: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
80080d0: b29b uxth r3, r3
80080d2: 029b lsls r3, r3, #10
80080d4: b29b uxth r3, r3
80080d6: 4313 orrs r3, r2
80080d8: b29b uxth r3, r3
80080da: ea6f 4343 mvn.w r3, r3, lsl #17
80080de: ea6f 4353 mvn.w r3, r3, lsr #17
80080e2: b29a uxth r2, r3
80080e4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
80080e8: 801a strh r2, [r3, #0]
80080ea: e05c b.n 80081a6 <USB_EPStartXfer+0x16e2>
80080ec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80080f0: 2b00 cmp r3, #0
80080f2: d10c bne.n 800810e <USB_EPStartXfer+0x164a>
80080f4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
80080f8: 881b ldrh r3, [r3, #0]
80080fa: b29b uxth r3, r3
80080fc: ea6f 4343 mvn.w r3, r3, lsl #17
8008100: ea6f 4353 mvn.w r3, r3, lsr #17
8008104: b29a uxth r2, r3
8008106: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800810a: 801a strh r2, [r3, #0]
800810c: e04b b.n 80081a6 <USB_EPStartXfer+0x16e2>
800810e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008112: 085b lsrs r3, r3, #1
8008114: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8008118: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800811c: f003 0301 and.w r3, r3, #1
8008120: 2b00 cmp r3, #0
8008122: d004 beq.n 800812e <USB_EPStartXfer+0x166a>
8008124: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8008128: 3301 adds r3, #1
800812a: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800812e: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8008132: 881b ldrh r3, [r3, #0]
8008134: b29a uxth r2, r3
8008136: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800813a: b29b uxth r3, r3
800813c: 029b lsls r3, r3, #10
800813e: b29b uxth r3, r3
8008140: 4313 orrs r3, r2
8008142: b29a uxth r2, r3
8008144: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8008148: 801a strh r2, [r3, #0]
800814a: e02c b.n 80081a6 <USB_EPStartXfer+0x16e2>
800814c: f507 7384 add.w r3, r7, #264 @ 0x108
8008150: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008154: 681b ldr r3, [r3, #0]
8008156: 785b ldrb r3, [r3, #1]
8008158: 2b01 cmp r3, #1
800815a: d124 bne.n 80081a6 <USB_EPStartXfer+0x16e2>
800815c: f507 7384 add.w r3, r7, #264 @ 0x108
8008160: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008164: 681b ldr r3, [r3, #0]
8008166: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800816a: b29b uxth r3, r3
800816c: 461a mov r2, r3
800816e: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
8008172: 4413 add r3, r2
8008174: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
8008178: f507 7384 add.w r3, r7, #264 @ 0x108
800817c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008180: 681b ldr r3, [r3, #0]
8008182: 781b ldrb r3, [r3, #0]
8008184: 011a lsls r2, r3, #4
8008186: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800818a: 4413 add r3, r2
800818c: f203 430c addw r3, r3, #1036 @ 0x40c
8008190: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
8008194: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008198: b29a uxth r2, r3
800819a: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800819e: 801a strh r2, [r3, #0]
80081a0: e001 b.n 80081a6 <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
80081a2: 2301 movs r3, #1
80081a4: e03a b.n 800821c <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80081a6: f507 7384 add.w r3, r7, #264 @ 0x108
80081aa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80081ae: 681a ldr r2, [r3, #0]
80081b0: f507 7384 add.w r3, r7, #264 @ 0x108
80081b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80081b8: 681b ldr r3, [r3, #0]
80081ba: 781b ldrb r3, [r3, #0]
80081bc: 009b lsls r3, r3, #2
80081be: 4413 add r3, r2
80081c0: 881b ldrh r3, [r3, #0]
80081c2: b29b uxth r3, r3
80081c4: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80081c8: f023 0370 bic.w r3, r3, #112 @ 0x70
80081cc: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80081d0: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
80081d4: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80081d8: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80081dc: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
80081e0: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80081e4: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80081e8: f507 7384 add.w r3, r7, #264 @ 0x108
80081ec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80081f0: 681a ldr r2, [r3, #0]
80081f2: f507 7384 add.w r3, r7, #264 @ 0x108
80081f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80081fa: 681b ldr r3, [r3, #0]
80081fc: 781b ldrb r3, [r3, #0]
80081fe: 009b lsls r3, r3, #2
8008200: 441a add r2, r3
8008202: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8008206: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800820a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800820e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008212: f043 0380 orr.w r3, r3, #128 @ 0x80
8008216: b29b uxth r3, r3
8008218: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800821a: 2300 movs r3, #0
}
800821c: 4618 mov r0, r3
800821e: f507 7784 add.w r7, r7, #264 @ 0x108
8008222: 46bd mov sp, r7
8008224: bd80 pop {r7, pc}
08008226 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8008226: b480 push {r7}
8008228: b085 sub sp, #20
800822a: af00 add r7, sp, #0
800822c: 6078 str r0, [r7, #4]
800822e: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
8008230: 683b ldr r3, [r7, #0]
8008232: 785b ldrb r3, [r3, #1]
8008234: 2b00 cmp r3, #0
8008236: d020 beq.n 800827a <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
8008238: 687a ldr r2, [r7, #4]
800823a: 683b ldr r3, [r7, #0]
800823c: 781b ldrb r3, [r3, #0]
800823e: 009b lsls r3, r3, #2
8008240: 4413 add r3, r2
8008242: 881b ldrh r3, [r3, #0]
8008244: b29b uxth r3, r3
8008246: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800824a: f023 0340 bic.w r3, r3, #64 @ 0x40
800824e: 81bb strh r3, [r7, #12]
8008250: 89bb ldrh r3, [r7, #12]
8008252: f083 0310 eor.w r3, r3, #16
8008256: 81bb strh r3, [r7, #12]
8008258: 687a ldr r2, [r7, #4]
800825a: 683b ldr r3, [r7, #0]
800825c: 781b ldrb r3, [r3, #0]
800825e: 009b lsls r3, r3, #2
8008260: 441a add r2, r3
8008262: 89bb ldrh r3, [r7, #12]
8008264: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008268: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800826c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008270: f043 0380 orr.w r3, r3, #128 @ 0x80
8008274: b29b uxth r3, r3
8008276: 8013 strh r3, [r2, #0]
8008278: e01f b.n 80082ba <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800827a: 687a ldr r2, [r7, #4]
800827c: 683b ldr r3, [r7, #0]
800827e: 781b ldrb r3, [r3, #0]
8008280: 009b lsls r3, r3, #2
8008282: 4413 add r3, r2
8008284: 881b ldrh r3, [r3, #0]
8008286: b29b uxth r3, r3
8008288: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800828c: f023 0370 bic.w r3, r3, #112 @ 0x70
8008290: 81fb strh r3, [r7, #14]
8008292: 89fb ldrh r3, [r7, #14]
8008294: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8008298: 81fb strh r3, [r7, #14]
800829a: 687a ldr r2, [r7, #4]
800829c: 683b ldr r3, [r7, #0]
800829e: 781b ldrb r3, [r3, #0]
80082a0: 009b lsls r3, r3, #2
80082a2: 441a add r2, r3
80082a4: 89fb ldrh r3, [r7, #14]
80082a6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80082aa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80082ae: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80082b2: f043 0380 orr.w r3, r3, #128 @ 0x80
80082b6: b29b uxth r3, r3
80082b8: 8013 strh r3, [r2, #0]
}
return HAL_OK;
80082ba: 2300 movs r3, #0
}
80082bc: 4618 mov r0, r3
80082be: 3714 adds r7, #20
80082c0: 46bd mov sp, r7
80082c2: bc80 pop {r7}
80082c4: 4770 bx lr
080082c6 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80082c6: b480 push {r7}
80082c8: b087 sub sp, #28
80082ca: af00 add r7, sp, #0
80082cc: 6078 str r0, [r7, #4]
80082ce: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
80082d0: 683b ldr r3, [r7, #0]
80082d2: 7b1b ldrb r3, [r3, #12]
80082d4: 2b00 cmp r3, #0
80082d6: f040 809d bne.w 8008414 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
80082da: 683b ldr r3, [r7, #0]
80082dc: 785b ldrb r3, [r3, #1]
80082de: 2b00 cmp r3, #0
80082e0: d04c beq.n 800837c <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80082e2: 687a ldr r2, [r7, #4]
80082e4: 683b ldr r3, [r7, #0]
80082e6: 781b ldrb r3, [r3, #0]
80082e8: 009b lsls r3, r3, #2
80082ea: 4413 add r3, r2
80082ec: 881b ldrh r3, [r3, #0]
80082ee: 823b strh r3, [r7, #16]
80082f0: 8a3b ldrh r3, [r7, #16]
80082f2: f003 0340 and.w r3, r3, #64 @ 0x40
80082f6: 2b00 cmp r3, #0
80082f8: d01b beq.n 8008332 <USB_EPClearStall+0x6c>
80082fa: 687a ldr r2, [r7, #4]
80082fc: 683b ldr r3, [r7, #0]
80082fe: 781b ldrb r3, [r3, #0]
8008300: 009b lsls r3, r3, #2
8008302: 4413 add r3, r2
8008304: 881b ldrh r3, [r3, #0]
8008306: b29b uxth r3, r3
8008308: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800830c: f023 0370 bic.w r3, r3, #112 @ 0x70
8008310: 81fb strh r3, [r7, #14]
8008312: 687a ldr r2, [r7, #4]
8008314: 683b ldr r3, [r7, #0]
8008316: 781b ldrb r3, [r3, #0]
8008318: 009b lsls r3, r3, #2
800831a: 441a add r2, r3
800831c: 89fb ldrh r3, [r7, #14]
800831e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008322: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008326: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800832a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800832e: b29b uxth r3, r3
8008330: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8008332: 683b ldr r3, [r7, #0]
8008334: 78db ldrb r3, [r3, #3]
8008336: 2b01 cmp r3, #1
8008338: d06c beq.n 8008414 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800833a: 687a ldr r2, [r7, #4]
800833c: 683b ldr r3, [r7, #0]
800833e: 781b ldrb r3, [r3, #0]
8008340: 009b lsls r3, r3, #2
8008342: 4413 add r3, r2
8008344: 881b ldrh r3, [r3, #0]
8008346: b29b uxth r3, r3
8008348: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800834c: f023 0340 bic.w r3, r3, #64 @ 0x40
8008350: 81bb strh r3, [r7, #12]
8008352: 89bb ldrh r3, [r7, #12]
8008354: f083 0320 eor.w r3, r3, #32
8008358: 81bb strh r3, [r7, #12]
800835a: 687a ldr r2, [r7, #4]
800835c: 683b ldr r3, [r7, #0]
800835e: 781b ldrb r3, [r3, #0]
8008360: 009b lsls r3, r3, #2
8008362: 441a add r2, r3
8008364: 89bb ldrh r3, [r7, #12]
8008366: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800836a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800836e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008372: f043 0380 orr.w r3, r3, #128 @ 0x80
8008376: b29b uxth r3, r3
8008378: 8013 strh r3, [r2, #0]
800837a: e04b b.n 8008414 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800837c: 687a ldr r2, [r7, #4]
800837e: 683b ldr r3, [r7, #0]
8008380: 781b ldrb r3, [r3, #0]
8008382: 009b lsls r3, r3, #2
8008384: 4413 add r3, r2
8008386: 881b ldrh r3, [r3, #0]
8008388: 82fb strh r3, [r7, #22]
800838a: 8afb ldrh r3, [r7, #22]
800838c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008390: 2b00 cmp r3, #0
8008392: d01b beq.n 80083cc <USB_EPClearStall+0x106>
8008394: 687a ldr r2, [r7, #4]
8008396: 683b ldr r3, [r7, #0]
8008398: 781b ldrb r3, [r3, #0]
800839a: 009b lsls r3, r3, #2
800839c: 4413 add r3, r2
800839e: 881b ldrh r3, [r3, #0]
80083a0: b29b uxth r3, r3
80083a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80083a6: f023 0370 bic.w r3, r3, #112 @ 0x70
80083aa: 82bb strh r3, [r7, #20]
80083ac: 687a ldr r2, [r7, #4]
80083ae: 683b ldr r3, [r7, #0]
80083b0: 781b ldrb r3, [r3, #0]
80083b2: 009b lsls r3, r3, #2
80083b4: 441a add r2, r3
80083b6: 8abb ldrh r3, [r7, #20]
80083b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80083bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80083c0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80083c4: f043 0380 orr.w r3, r3, #128 @ 0x80
80083c8: b29b uxth r3, r3
80083ca: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80083cc: 687a ldr r2, [r7, #4]
80083ce: 683b ldr r3, [r7, #0]
80083d0: 781b ldrb r3, [r3, #0]
80083d2: 009b lsls r3, r3, #2
80083d4: 4413 add r3, r2
80083d6: 881b ldrh r3, [r3, #0]
80083d8: b29b uxth r3, r3
80083da: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80083de: f023 0370 bic.w r3, r3, #112 @ 0x70
80083e2: 827b strh r3, [r7, #18]
80083e4: 8a7b ldrh r3, [r7, #18]
80083e6: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80083ea: 827b strh r3, [r7, #18]
80083ec: 8a7b ldrh r3, [r7, #18]
80083ee: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80083f2: 827b strh r3, [r7, #18]
80083f4: 687a ldr r2, [r7, #4]
80083f6: 683b ldr r3, [r7, #0]
80083f8: 781b ldrb r3, [r3, #0]
80083fa: 009b lsls r3, r3, #2
80083fc: 441a add r2, r3
80083fe: 8a7b ldrh r3, [r7, #18]
8008400: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008404: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008408: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800840c: f043 0380 orr.w r3, r3, #128 @ 0x80
8008410: b29b uxth r3, r3
8008412: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
8008414: 2300 movs r3, #0
}
8008416: 4618 mov r0, r3
8008418: 371c adds r7, #28
800841a: 46bd mov sp, r7
800841c: bc80 pop {r7}
800841e: 4770 bx lr
08008420 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
8008420: b480 push {r7}
8008422: b083 sub sp, #12
8008424: af00 add r7, sp, #0
8008426: 6078 str r0, [r7, #4]
8008428: 460b mov r3, r1
800842a: 70fb strb r3, [r7, #3]
if (address == 0U)
800842c: 78fb ldrb r3, [r7, #3]
800842e: 2b00 cmp r3, #0
8008430: d103 bne.n 800843a <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
8008432: 687b ldr r3, [r7, #4]
8008434: 2280 movs r2, #128 @ 0x80
8008436: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800843a: 2300 movs r3, #0
}
800843c: 4618 mov r0, r3
800843e: 370c adds r7, #12
8008440: 46bd mov sp, r7
8008442: bc80 pop {r7}
8008444: 4770 bx lr
08008446 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
8008446: b480 push {r7}
8008448: b083 sub sp, #12
800844a: af00 add r7, sp, #0
800844c: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800844e: 2300 movs r3, #0
}
8008450: 4618 mov r0, r3
8008452: 370c adds r7, #12
8008454: 46bd mov sp, r7
8008456: bc80 pop {r7}
8008458: 4770 bx lr
0800845a <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800845a: b480 push {r7}
800845c: b083 sub sp, #12
800845e: af00 add r7, sp, #0
8008460: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8008462: 2300 movs r3, #0
}
8008464: 4618 mov r0, r3
8008466: 370c adds r7, #12
8008468: 46bd mov sp, r7
800846a: bc80 pop {r7}
800846c: 4770 bx lr
0800846e <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800846e: b480 push {r7}
8008470: b085 sub sp, #20
8008472: af00 add r7, sp, #0
8008474: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
8008476: 687b ldr r3, [r7, #4]
8008478: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800847c: b29b uxth r3, r3
800847e: 60fb str r3, [r7, #12]
return tmpreg;
8008480: 68fb ldr r3, [r7, #12]
}
8008482: 4618 mov r0, r3
8008484: 3714 adds r7, #20
8008486: 46bd mov sp, r7
8008488: bc80 pop {r7}
800848a: 4770 bx lr
0800848c <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800848c: b480 push {r7}
800848e: b083 sub sp, #12
8008490: af00 add r7, sp, #0
8008492: 6078 str r0, [r7, #4]
8008494: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8008496: 2300 movs r3, #0
}
8008498: 4618 mov r0, r3
800849a: 370c adds r7, #12
800849c: 46bd mov sp, r7
800849e: bc80 pop {r7}
80084a0: 4770 bx lr
080084a2 <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
80084a2: b480 push {r7}
80084a4: b08b sub sp, #44 @ 0x2c
80084a6: af00 add r7, sp, #0
80084a8: 60f8 str r0, [r7, #12]
80084aa: 60b9 str r1, [r7, #8]
80084ac: 4611 mov r1, r2
80084ae: 461a mov r2, r3
80084b0: 460b mov r3, r1
80084b2: 80fb strh r3, [r7, #6]
80084b4: 4613 mov r3, r2
80084b6: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
80084b8: 88bb ldrh r3, [r7, #4]
80084ba: 3301 adds r3, #1
80084bc: 085b lsrs r3, r3, #1
80084be: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
80084c0: 68fb ldr r3, [r7, #12]
80084c2: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
80084c4: 68bb ldr r3, [r7, #8]
80084c6: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
80084c8: 88fb ldrh r3, [r7, #6]
80084ca: 005a lsls r2, r3, #1
80084cc: 697b ldr r3, [r7, #20]
80084ce: 4413 add r3, r2
80084d0: f503 6380 add.w r3, r3, #1024 @ 0x400
80084d4: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
80084d6: 69bb ldr r3, [r7, #24]
80084d8: 627b str r3, [r7, #36] @ 0x24
80084da: e01f b.n 800851c <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
80084dc: 69fb ldr r3, [r7, #28]
80084de: 781b ldrb r3, [r3, #0]
80084e0: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
80084e2: 69fb ldr r3, [r7, #28]
80084e4: 3301 adds r3, #1
80084e6: 781b ldrb r3, [r3, #0]
80084e8: b21b sxth r3, r3
80084ea: 021b lsls r3, r3, #8
80084ec: b21a sxth r2, r3
80084ee: f9b7 3012 ldrsh.w r3, [r7, #18]
80084f2: 4313 orrs r3, r2
80084f4: b21b sxth r3, r3
80084f6: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
80084f8: 6a3b ldr r3, [r7, #32]
80084fa: 8a7a ldrh r2, [r7, #18]
80084fc: 801a strh r2, [r3, #0]
pdwVal++;
80084fe: 6a3b ldr r3, [r7, #32]
8008500: 3302 adds r3, #2
8008502: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
8008504: 6a3b ldr r3, [r7, #32]
8008506: 3302 adds r3, #2
8008508: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800850a: 69fb ldr r3, [r7, #28]
800850c: 3301 adds r3, #1
800850e: 61fb str r3, [r7, #28]
pBuf++;
8008510: 69fb ldr r3, [r7, #28]
8008512: 3301 adds r3, #1
8008514: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
8008516: 6a7b ldr r3, [r7, #36] @ 0x24
8008518: 3b01 subs r3, #1
800851a: 627b str r3, [r7, #36] @ 0x24
800851c: 6a7b ldr r3, [r7, #36] @ 0x24
800851e: 2b00 cmp r3, #0
8008520: d1dc bne.n 80084dc <USB_WritePMA+0x3a>
}
}
8008522: bf00 nop
8008524: bf00 nop
8008526: 372c adds r7, #44 @ 0x2c
8008528: 46bd mov sp, r7
800852a: bc80 pop {r7}
800852c: 4770 bx lr
0800852e <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800852e: b480 push {r7}
8008530: b08b sub sp, #44 @ 0x2c
8008532: af00 add r7, sp, #0
8008534: 60f8 str r0, [r7, #12]
8008536: 60b9 str r1, [r7, #8]
8008538: 4611 mov r1, r2
800853a: 461a mov r2, r3
800853c: 460b mov r3, r1
800853e: 80fb strh r3, [r7, #6]
8008540: 4613 mov r3, r2
8008542: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
8008544: 88bb ldrh r3, [r7, #4]
8008546: 085b lsrs r3, r3, #1
8008548: b29b uxth r3, r3
800854a: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800854c: 68fb ldr r3, [r7, #12]
800854e: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8008550: 68bb ldr r3, [r7, #8]
8008552: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8008554: 88fb ldrh r3, [r7, #6]
8008556: 005a lsls r2, r3, #1
8008558: 697b ldr r3, [r7, #20]
800855a: 4413 add r3, r2
800855c: f503 6380 add.w r3, r3, #1024 @ 0x400
8008560: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8008562: 69bb ldr r3, [r7, #24]
8008564: 627b str r3, [r7, #36] @ 0x24
8008566: e01b b.n 80085a0 <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
8008568: 6a3b ldr r3, [r7, #32]
800856a: 881b ldrh r3, [r3, #0]
800856c: b29b uxth r3, r3
800856e: 613b str r3, [r7, #16]
pdwVal++;
8008570: 6a3b ldr r3, [r7, #32]
8008572: 3302 adds r3, #2
8008574: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
8008576: 693b ldr r3, [r7, #16]
8008578: b2da uxtb r2, r3
800857a: 69fb ldr r3, [r7, #28]
800857c: 701a strb r2, [r3, #0]
pBuf++;
800857e: 69fb ldr r3, [r7, #28]
8008580: 3301 adds r3, #1
8008582: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
8008584: 693b ldr r3, [r7, #16]
8008586: 0a1b lsrs r3, r3, #8
8008588: b2da uxtb r2, r3
800858a: 69fb ldr r3, [r7, #28]
800858c: 701a strb r2, [r3, #0]
pBuf++;
800858e: 69fb ldr r3, [r7, #28]
8008590: 3301 adds r3, #1
8008592: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
8008594: 6a3b ldr r3, [r7, #32]
8008596: 3302 adds r3, #2
8008598: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800859a: 6a7b ldr r3, [r7, #36] @ 0x24
800859c: 3b01 subs r3, #1
800859e: 627b str r3, [r7, #36] @ 0x24
80085a0: 6a7b ldr r3, [r7, #36] @ 0x24
80085a2: 2b00 cmp r3, #0
80085a4: d1e0 bne.n 8008568 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
80085a6: 88bb ldrh r3, [r7, #4]
80085a8: f003 0301 and.w r3, r3, #1
80085ac: b29b uxth r3, r3
80085ae: 2b00 cmp r3, #0
80085b0: d007 beq.n 80085c2 <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
80085b2: 6a3b ldr r3, [r7, #32]
80085b4: 881b ldrh r3, [r3, #0]
80085b6: b29b uxth r3, r3
80085b8: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
80085ba: 693b ldr r3, [r7, #16]
80085bc: b2da uxtb r2, r3
80085be: 69fb ldr r3, [r7, #28]
80085c0: 701a strb r2, [r3, #0]
}
}
80085c2: bf00 nop
80085c4: 372c adds r7, #44 @ 0x2c
80085c6: 46bd mov sp, r7
80085c8: bc80 pop {r7}
80085ca: 4770 bx lr
080085cc <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80085cc: b580 push {r7, lr}
80085ce: b084 sub sp, #16
80085d0: af00 add r7, sp, #0
80085d2: 6078 str r0, [r7, #4]
80085d4: 460b mov r3, r1
80085d6: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
80085d8: 2300 movs r3, #0
80085da: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
80085dc: 687b ldr r3, [r7, #4]
80085de: 7c1b ldrb r3, [r3, #16]
80085e0: 2b00 cmp r3, #0
80085e2: d115 bne.n 8008610 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
80085e4: f44f 7300 mov.w r3, #512 @ 0x200
80085e8: 2202 movs r2, #2
80085ea: 2181 movs r1, #129 @ 0x81
80085ec: 6878 ldr r0, [r7, #4]
80085ee: f001 ff00 bl 800a3f2 <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
80085f2: 687b ldr r3, [r7, #4]
80085f4: 2201 movs r2, #1
80085f6: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
80085f8: f44f 7300 mov.w r3, #512 @ 0x200
80085fc: 2202 movs r2, #2
80085fe: 2101 movs r1, #1
8008600: 6878 ldr r0, [r7, #4]
8008602: f001 fef6 bl 800a3f2 <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
8008606: 687b ldr r3, [r7, #4]
8008608: 2201 movs r2, #1
800860a: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800860e: e012 b.n 8008636 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
8008610: 2340 movs r3, #64 @ 0x40
8008612: 2202 movs r2, #2
8008614: 2181 movs r1, #129 @ 0x81
8008616: 6878 ldr r0, [r7, #4]
8008618: f001 feeb bl 800a3f2 <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800861c: 687b ldr r3, [r7, #4]
800861e: 2201 movs r2, #1
8008620: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
8008622: 2340 movs r3, #64 @ 0x40
8008624: 2202 movs r2, #2
8008626: 2101 movs r1, #1
8008628: 6878 ldr r0, [r7, #4]
800862a: f001 fee2 bl 800a3f2 <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800862e: 687b ldr r3, [r7, #4]
8008630: 2201 movs r2, #1
8008632: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
8008636: 2308 movs r3, #8
8008638: 2203 movs r2, #3
800863a: 2182 movs r1, #130 @ 0x82
800863c: 6878 ldr r0, [r7, #4]
800863e: f001 fed8 bl 800a3f2 <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
8008642: 687b ldr r3, [r7, #4]
8008644: 2201 movs r2, #1
8008646: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
8008648: f44f 7007 mov.w r0, #540 @ 0x21c
800864c: f001 fff8 bl 800a640 <USBD_static_malloc>
8008650: 4602 mov r2, r0
8008652: 687b ldr r3, [r7, #4]
8008654: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
8008658: 687b ldr r3, [r7, #4]
800865a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800865e: 2b00 cmp r3, #0
8008660: d102 bne.n 8008668 <USBD_CDC_Init+0x9c>
{
ret = 1U;
8008662: 2301 movs r3, #1
8008664: 73fb strb r3, [r7, #15]
8008666: e026 b.n 80086b6 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008668: 687b ldr r3, [r7, #4]
800866a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800866e: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
8008670: 687b ldr r3, [r7, #4]
8008672: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8008676: 681b ldr r3, [r3, #0]
8008678: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800867a: 68bb ldr r3, [r7, #8]
800867c: 2200 movs r2, #0
800867e: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
8008682: 68bb ldr r3, [r7, #8]
8008684: 2200 movs r2, #0
8008686: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800868a: 687b ldr r3, [r7, #4]
800868c: 7c1b ldrb r3, [r3, #16]
800868e: 2b00 cmp r3, #0
8008690: d109 bne.n 80086a6 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
8008692: 68bb ldr r3, [r7, #8]
8008694: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8008698: f44f 7300 mov.w r3, #512 @ 0x200
800869c: 2101 movs r1, #1
800869e: 6878 ldr r0, [r7, #4]
80086a0: f001 ff97 bl 800a5d2 <USBD_LL_PrepareReceive>
80086a4: e007 b.n 80086b6 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
80086a6: 68bb ldr r3, [r7, #8]
80086a8: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
80086ac: 2340 movs r3, #64 @ 0x40
80086ae: 2101 movs r1, #1
80086b0: 6878 ldr r0, [r7, #4]
80086b2: f001 ff8e bl 800a5d2 <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
80086b6: 7bfb ldrb r3, [r7, #15]
}
80086b8: 4618 mov r0, r3
80086ba: 3710 adds r7, #16
80086bc: 46bd mov sp, r7
80086be: bd80 pop {r7, pc}
080086c0 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80086c0: b580 push {r7, lr}
80086c2: b084 sub sp, #16
80086c4: af00 add r7, sp, #0
80086c6: 6078 str r0, [r7, #4]
80086c8: 460b mov r3, r1
80086ca: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
80086cc: 2300 movs r3, #0
80086ce: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
80086d0: 2181 movs r1, #129 @ 0x81
80086d2: 6878 ldr r0, [r7, #4]
80086d4: f001 feb3 bl 800a43e <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
80086d8: 687b ldr r3, [r7, #4]
80086da: 2200 movs r2, #0
80086dc: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
80086de: 2101 movs r1, #1
80086e0: 6878 ldr r0, [r7, #4]
80086e2: f001 feac bl 800a43e <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
80086e6: 687b ldr r3, [r7, #4]
80086e8: 2200 movs r2, #0
80086ea: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
80086ee: 2182 movs r1, #130 @ 0x82
80086f0: 6878 ldr r0, [r7, #4]
80086f2: f001 fea4 bl 800a43e <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
80086f6: 687b ldr r3, [r7, #4]
80086f8: 2200 movs r2, #0
80086fa: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
80086fc: 687b ldr r3, [r7, #4]
80086fe: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008702: 2b00 cmp r3, #0
8008704: d00e beq.n 8008724 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
8008706: 687b ldr r3, [r7, #4]
8008708: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800870c: 685b ldr r3, [r3, #4]
800870e: 4798 blx r3
USBD_free(pdev->pClassData);
8008710: 687b ldr r3, [r7, #4]
8008712: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008716: 4618 mov r0, r3
8008718: f001 ff9e bl 800a658 <USBD_static_free>
pdev->pClassData = NULL;
800871c: 687b ldr r3, [r7, #4]
800871e: 2200 movs r2, #0
8008720: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
8008724: 7bfb ldrb r3, [r7, #15]
}
8008726: 4618 mov r0, r3
8008728: 3710 adds r7, #16
800872a: 46bd mov sp, r7
800872c: bd80 pop {r7, pc}
0800872e <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800872e: b580 push {r7, lr}
8008730: b086 sub sp, #24
8008732: af00 add r7, sp, #0
8008734: 6078 str r0, [r7, #4]
8008736: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008738: 687b ldr r3, [r7, #4]
800873a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800873e: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
8008740: 2300 movs r3, #0
8008742: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
8008744: 2300 movs r3, #0
8008746: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
8008748: 2300 movs r3, #0
800874a: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800874c: 683b ldr r3, [r7, #0]
800874e: 781b ldrb r3, [r3, #0]
8008750: f003 0360 and.w r3, r3, #96 @ 0x60
8008754: 2b00 cmp r3, #0
8008756: d039 beq.n 80087cc <USBD_CDC_Setup+0x9e>
8008758: 2b20 cmp r3, #32
800875a: d17f bne.n 800885c <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800875c: 683b ldr r3, [r7, #0]
800875e: 88db ldrh r3, [r3, #6]
8008760: 2b00 cmp r3, #0
8008762: d029 beq.n 80087b8 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
8008764: 683b ldr r3, [r7, #0]
8008766: 781b ldrb r3, [r3, #0]
8008768: b25b sxtb r3, r3
800876a: 2b00 cmp r3, #0
800876c: da11 bge.n 8008792 <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800876e: 687b ldr r3, [r7, #4]
8008770: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8008774: 689b ldr r3, [r3, #8]
8008776: 683a ldr r2, [r7, #0]
8008778: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800877a: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800877c: 683a ldr r2, [r7, #0]
800877e: 88d2 ldrh r2, [r2, #6]
8008780: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
8008782: 6939 ldr r1, [r7, #16]
8008784: 683b ldr r3, [r7, #0]
8008786: 88db ldrh r3, [r3, #6]
8008788: 461a mov r2, r3
800878a: 6878 ldr r0, [r7, #4]
800878c: f001 fa06 bl 8009b9c <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
8008790: e06b b.n 800886a <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
8008792: 683b ldr r3, [r7, #0]
8008794: 785a ldrb r2, [r3, #1]
8008796: 693b ldr r3, [r7, #16]
8008798: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800879c: 683b ldr r3, [r7, #0]
800879e: 88db ldrh r3, [r3, #6]
80087a0: b2da uxtb r2, r3
80087a2: 693b ldr r3, [r7, #16]
80087a4: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
80087a8: 6939 ldr r1, [r7, #16]
80087aa: 683b ldr r3, [r7, #0]
80087ac: 88db ldrh r3, [r3, #6]
80087ae: 461a mov r2, r3
80087b0: 6878 ldr r0, [r7, #4]
80087b2: f001 fa21 bl 8009bf8 <USBD_CtlPrepareRx>
break;
80087b6: e058 b.n 800886a <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
80087b8: 687b ldr r3, [r7, #4]
80087ba: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
80087be: 689b ldr r3, [r3, #8]
80087c0: 683a ldr r2, [r7, #0]
80087c2: 7850 ldrb r0, [r2, #1]
80087c4: 2200 movs r2, #0
80087c6: 6839 ldr r1, [r7, #0]
80087c8: 4798 blx r3
break;
80087ca: e04e b.n 800886a <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80087cc: 683b ldr r3, [r7, #0]
80087ce: 785b ldrb r3, [r3, #1]
80087d0: 2b0b cmp r3, #11
80087d2: d02e beq.n 8008832 <USBD_CDC_Setup+0x104>
80087d4: 2b0b cmp r3, #11
80087d6: dc38 bgt.n 800884a <USBD_CDC_Setup+0x11c>
80087d8: 2b00 cmp r3, #0
80087da: d002 beq.n 80087e2 <USBD_CDC_Setup+0xb4>
80087dc: 2b0a cmp r3, #10
80087de: d014 beq.n 800880a <USBD_CDC_Setup+0xdc>
80087e0: e033 b.n 800884a <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80087e2: 687b ldr r3, [r7, #4]
80087e4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80087e8: 2b03 cmp r3, #3
80087ea: d107 bne.n 80087fc <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
80087ec: f107 030c add.w r3, r7, #12
80087f0: 2202 movs r2, #2
80087f2: 4619 mov r1, r3
80087f4: 6878 ldr r0, [r7, #4]
80087f6: f001 f9d1 bl 8009b9c <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
80087fa: e02e b.n 800885a <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
80087fc: 6839 ldr r1, [r7, #0]
80087fe: 6878 ldr r0, [r7, #4]
8008800: f001 f962 bl 8009ac8 <USBD_CtlError>
ret = USBD_FAIL;
8008804: 2302 movs r3, #2
8008806: 75fb strb r3, [r7, #23]
break;
8008808: e027 b.n 800885a <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800880a: 687b ldr r3, [r7, #4]
800880c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008810: 2b03 cmp r3, #3
8008812: d107 bne.n 8008824 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
8008814: f107 030f add.w r3, r7, #15
8008818: 2201 movs r2, #1
800881a: 4619 mov r1, r3
800881c: 6878 ldr r0, [r7, #4]
800881e: f001 f9bd bl 8009b9c <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8008822: e01a b.n 800885a <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
8008824: 6839 ldr r1, [r7, #0]
8008826: 6878 ldr r0, [r7, #4]
8008828: f001 f94e bl 8009ac8 <USBD_CtlError>
ret = USBD_FAIL;
800882c: 2302 movs r3, #2
800882e: 75fb strb r3, [r7, #23]
break;
8008830: e013 b.n 800885a <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
8008832: 687b ldr r3, [r7, #4]
8008834: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008838: 2b03 cmp r3, #3
800883a: d00d beq.n 8008858 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800883c: 6839 ldr r1, [r7, #0]
800883e: 6878 ldr r0, [r7, #4]
8008840: f001 f942 bl 8009ac8 <USBD_CtlError>
ret = USBD_FAIL;
8008844: 2302 movs r3, #2
8008846: 75fb strb r3, [r7, #23]
}
break;
8008848: e006 b.n 8008858 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800884a: 6839 ldr r1, [r7, #0]
800884c: 6878 ldr r0, [r7, #4]
800884e: f001 f93b bl 8009ac8 <USBD_CtlError>
ret = USBD_FAIL;
8008852: 2302 movs r3, #2
8008854: 75fb strb r3, [r7, #23]
break;
8008856: e000 b.n 800885a <USBD_CDC_Setup+0x12c>
break;
8008858: bf00 nop
}
break;
800885a: e006 b.n 800886a <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800885c: 6839 ldr r1, [r7, #0]
800885e: 6878 ldr r0, [r7, #4]
8008860: f001 f932 bl 8009ac8 <USBD_CtlError>
ret = USBD_FAIL;
8008864: 2302 movs r3, #2
8008866: 75fb strb r3, [r7, #23]
break;
8008868: bf00 nop
}
return ret;
800886a: 7dfb ldrb r3, [r7, #23]
}
800886c: 4618 mov r0, r3
800886e: 3718 adds r7, #24
8008870: 46bd mov sp, r7
8008872: bd80 pop {r7, pc}
08008874 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8008874: b580 push {r7, lr}
8008876: b084 sub sp, #16
8008878: af00 add r7, sp, #0
800887a: 6078 str r0, [r7, #4]
800887c: 460b mov r3, r1
800887e: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
8008880: 687b ldr r3, [r7, #4]
8008882: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008886: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
8008888: 687b ldr r3, [r7, #4]
800888a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800888e: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
8008890: 687b ldr r3, [r7, #4]
8008892: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008896: 2b00 cmp r3, #0
8008898: d03a beq.n 8008910 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800889a: 78fa ldrb r2, [r7, #3]
800889c: 6879 ldr r1, [r7, #4]
800889e: 4613 mov r3, r2
80088a0: 009b lsls r3, r3, #2
80088a2: 4413 add r3, r2
80088a4: 009b lsls r3, r3, #2
80088a6: 440b add r3, r1
80088a8: 331c adds r3, #28
80088aa: 681b ldr r3, [r3, #0]
80088ac: 2b00 cmp r3, #0
80088ae: d029 beq.n 8008904 <USBD_CDC_DataIn+0x90>
80088b0: 78fa ldrb r2, [r7, #3]
80088b2: 6879 ldr r1, [r7, #4]
80088b4: 4613 mov r3, r2
80088b6: 009b lsls r3, r3, #2
80088b8: 4413 add r3, r2
80088ba: 009b lsls r3, r3, #2
80088bc: 440b add r3, r1
80088be: 331c adds r3, #28
80088c0: 681a ldr r2, [r3, #0]
80088c2: 78f9 ldrb r1, [r7, #3]
80088c4: 68b8 ldr r0, [r7, #8]
80088c6: 460b mov r3, r1
80088c8: 009b lsls r3, r3, #2
80088ca: 440b add r3, r1
80088cc: 00db lsls r3, r3, #3
80088ce: 4403 add r3, r0
80088d0: 3320 adds r3, #32
80088d2: 681b ldr r3, [r3, #0]
80088d4: fbb2 f1f3 udiv r1, r2, r3
80088d8: fb01 f303 mul.w r3, r1, r3
80088dc: 1ad3 subs r3, r2, r3
80088de: 2b00 cmp r3, #0
80088e0: d110 bne.n 8008904 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
80088e2: 78fa ldrb r2, [r7, #3]
80088e4: 6879 ldr r1, [r7, #4]
80088e6: 4613 mov r3, r2
80088e8: 009b lsls r3, r3, #2
80088ea: 4413 add r3, r2
80088ec: 009b lsls r3, r3, #2
80088ee: 440b add r3, r1
80088f0: 331c adds r3, #28
80088f2: 2200 movs r2, #0
80088f4: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
80088f6: 78f9 ldrb r1, [r7, #3]
80088f8: 2300 movs r3, #0
80088fa: 2200 movs r2, #0
80088fc: 6878 ldr r0, [r7, #4]
80088fe: f001 fe45 bl 800a58c <USBD_LL_Transmit>
8008902: e003 b.n 800890c <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
8008904: 68fb ldr r3, [r7, #12]
8008906: 2200 movs r2, #0
8008908: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800890c: 2300 movs r3, #0
800890e: e000 b.n 8008912 <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
8008910: 2302 movs r3, #2
}
}
8008912: 4618 mov r0, r3
8008914: 3710 adds r7, #16
8008916: 46bd mov sp, r7
8008918: bd80 pop {r7, pc}
0800891a <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800891a: b580 push {r7, lr}
800891c: b084 sub sp, #16
800891e: af00 add r7, sp, #0
8008920: 6078 str r0, [r7, #4]
8008922: 460b mov r3, r1
8008924: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008926: 687b ldr r3, [r7, #4]
8008928: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800892c: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800892e: 78fb ldrb r3, [r7, #3]
8008930: 4619 mov r1, r3
8008932: 6878 ldr r0, [r7, #4]
8008934: f001 fe70 bl 800a618 <USBD_LL_GetRxDataSize>
8008938: 4602 mov r2, r0
800893a: 68fb ldr r3, [r7, #12]
800893c: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
8008940: 687b ldr r3, [r7, #4]
8008942: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008946: 2b00 cmp r3, #0
8008948: d00d beq.n 8008966 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800894a: 687b ldr r3, [r7, #4]
800894c: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8008950: 68db ldr r3, [r3, #12]
8008952: 68fa ldr r2, [r7, #12]
8008954: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
8008958: 68fa ldr r2, [r7, #12]
800895a: f502 7203 add.w r2, r2, #524 @ 0x20c
800895e: 4611 mov r1, r2
8008960: 4798 blx r3
return USBD_OK;
8008962: 2300 movs r3, #0
8008964: e000 b.n 8008968 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
8008966: 2302 movs r3, #2
}
}
8008968: 4618 mov r0, r3
800896a: 3710 adds r7, #16
800896c: 46bd mov sp, r7
800896e: bd80 pop {r7, pc}
08008970 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
8008970: b580 push {r7, lr}
8008972: b084 sub sp, #16
8008974: af00 add r7, sp, #0
8008976: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008978: 687b ldr r3, [r7, #4]
800897a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800897e: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
8008980: 687b ldr r3, [r7, #4]
8008982: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8008986: 2b00 cmp r3, #0
8008988: d014 beq.n 80089b4 <USBD_CDC_EP0_RxReady+0x44>
800898a: 68fb ldr r3, [r7, #12]
800898c: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
8008990: 2bff cmp r3, #255 @ 0xff
8008992: d00f beq.n 80089b4 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
8008994: 687b ldr r3, [r7, #4]
8008996: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800899a: 689b ldr r3, [r3, #8]
800899c: 68fa ldr r2, [r7, #12]
800899e: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
80089a2: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
80089a4: 68fa ldr r2, [r7, #12]
80089a6: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
80089aa: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
80089ac: 68fb ldr r3, [r7, #12]
80089ae: 22ff movs r2, #255 @ 0xff
80089b0: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
80089b4: 2300 movs r3, #0
}
80089b6: 4618 mov r0, r3
80089b8: 3710 adds r7, #16
80089ba: 46bd mov sp, r7
80089bc: bd80 pop {r7, pc}
...
080089c0 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
80089c0: b480 push {r7}
80089c2: b083 sub sp, #12
80089c4: af00 add r7, sp, #0
80089c6: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
80089c8: 687b ldr r3, [r7, #4]
80089ca: 2243 movs r2, #67 @ 0x43
80089cc: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
80089ce: 4b03 ldr r3, [pc, #12] @ (80089dc <USBD_CDC_GetFSCfgDesc+0x1c>)
}
80089d0: 4618 mov r0, r3
80089d2: 370c adds r7, #12
80089d4: 46bd mov sp, r7
80089d6: bc80 pop {r7}
80089d8: 4770 bx lr
80089da: bf00 nop
80089dc: 20000098 .word 0x20000098
080089e0 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
80089e0: b480 push {r7}
80089e2: b083 sub sp, #12
80089e4: af00 add r7, sp, #0
80089e6: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
80089e8: 687b ldr r3, [r7, #4]
80089ea: 2243 movs r2, #67 @ 0x43
80089ec: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
80089ee: 4b03 ldr r3, [pc, #12] @ (80089fc <USBD_CDC_GetHSCfgDesc+0x1c>)
}
80089f0: 4618 mov r0, r3
80089f2: 370c adds r7, #12
80089f4: 46bd mov sp, r7
80089f6: bc80 pop {r7}
80089f8: 4770 bx lr
80089fa: bf00 nop
80089fc: 20000054 .word 0x20000054
08008a00 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
8008a00: b480 push {r7}
8008a02: b083 sub sp, #12
8008a04: af00 add r7, sp, #0
8008a06: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
8008a08: 687b ldr r3, [r7, #4]
8008a0a: 2243 movs r2, #67 @ 0x43
8008a0c: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
8008a0e: 4b03 ldr r3, [pc, #12] @ (8008a1c <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
8008a10: 4618 mov r0, r3
8008a12: 370c adds r7, #12
8008a14: 46bd mov sp, r7
8008a16: bc80 pop {r7}
8008a18: 4770 bx lr
8008a1a: bf00 nop
8008a1c: 200000dc .word 0x200000dc
08008a20 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
8008a20: b480 push {r7}
8008a22: b083 sub sp, #12
8008a24: af00 add r7, sp, #0
8008a26: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
8008a28: 687b ldr r3, [r7, #4]
8008a2a: 220a movs r2, #10
8008a2c: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
8008a2e: 4b03 ldr r3, [pc, #12] @ (8008a3c <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
8008a30: 4618 mov r0, r3
8008a32: 370c adds r7, #12
8008a34: 46bd mov sp, r7
8008a36: bc80 pop {r7}
8008a38: 4770 bx lr
8008a3a: bf00 nop
8008a3c: 20000010 .word 0x20000010
08008a40 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
8008a40: b480 push {r7}
8008a42: b085 sub sp, #20
8008a44: af00 add r7, sp, #0
8008a46: 6078 str r0, [r7, #4]
8008a48: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
8008a4a: 2302 movs r3, #2
8008a4c: 73fb strb r3, [r7, #15]
if (fops != NULL)
8008a4e: 683b ldr r3, [r7, #0]
8008a50: 2b00 cmp r3, #0
8008a52: d005 beq.n 8008a60 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
8008a54: 687b ldr r3, [r7, #4]
8008a56: 683a ldr r2, [r7, #0]
8008a58: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
8008a5c: 2300 movs r3, #0
8008a5e: 73fb strb r3, [r7, #15]
}
return ret;
8008a60: 7bfb ldrb r3, [r7, #15]
}
8008a62: 4618 mov r0, r3
8008a64: 3714 adds r7, #20
8008a66: 46bd mov sp, r7
8008a68: bc80 pop {r7}
8008a6a: 4770 bx lr
08008a6c <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
8008a6c: b480 push {r7}
8008a6e: b087 sub sp, #28
8008a70: af00 add r7, sp, #0
8008a72: 60f8 str r0, [r7, #12]
8008a74: 60b9 str r1, [r7, #8]
8008a76: 4613 mov r3, r2
8008a78: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008a7a: 68fb ldr r3, [r7, #12]
8008a7c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008a80: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
8008a82: 697b ldr r3, [r7, #20]
8008a84: 68ba ldr r2, [r7, #8]
8008a86: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
8008a8a: 88fa ldrh r2, [r7, #6]
8008a8c: 697b ldr r3, [r7, #20]
8008a8e: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
8008a92: 2300 movs r3, #0
}
8008a94: 4618 mov r0, r3
8008a96: 371c adds r7, #28
8008a98: 46bd mov sp, r7
8008a9a: bc80 pop {r7}
8008a9c: 4770 bx lr
08008a9e <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
8008a9e: b480 push {r7}
8008aa0: b085 sub sp, #20
8008aa2: af00 add r7, sp, #0
8008aa4: 6078 str r0, [r7, #4]
8008aa6: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008aa8: 687b ldr r3, [r7, #4]
8008aaa: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008aae: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
8008ab0: 68fb ldr r3, [r7, #12]
8008ab2: 683a ldr r2, [r7, #0]
8008ab4: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
8008ab8: 2300 movs r3, #0
}
8008aba: 4618 mov r0, r3
8008abc: 3714 adds r7, #20
8008abe: 46bd mov sp, r7
8008ac0: bc80 pop {r7}
8008ac2: 4770 bx lr
08008ac4 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
8008ac4: b580 push {r7, lr}
8008ac6: b084 sub sp, #16
8008ac8: af00 add r7, sp, #0
8008aca: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008acc: 687b ldr r3, [r7, #4]
8008ace: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008ad2: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
8008ad4: 687b ldr r3, [r7, #4]
8008ad6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008ada: 2b00 cmp r3, #0
8008adc: d01c beq.n 8008b18 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
8008ade: 68fb ldr r3, [r7, #12]
8008ae0: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
8008ae4: 2b00 cmp r3, #0
8008ae6: d115 bne.n 8008b14 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
8008ae8: 68fb ldr r3, [r7, #12]
8008aea: 2201 movs r2, #1
8008aec: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
8008af0: 68fb ldr r3, [r7, #12]
8008af2: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
8008af6: 687b ldr r3, [r7, #4]
8008af8: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
8008afa: 68fb ldr r3, [r7, #12]
8008afc: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
8008b00: 68fb ldr r3, [r7, #12]
8008b02: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
8008b06: b29b uxth r3, r3
8008b08: 2181 movs r1, #129 @ 0x81
8008b0a: 6878 ldr r0, [r7, #4]
8008b0c: f001 fd3e bl 800a58c <USBD_LL_Transmit>
return USBD_OK;
8008b10: 2300 movs r3, #0
8008b12: e002 b.n 8008b1a <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
8008b14: 2301 movs r3, #1
8008b16: e000 b.n 8008b1a <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
8008b18: 2302 movs r3, #2
}
}
8008b1a: 4618 mov r0, r3
8008b1c: 3710 adds r7, #16
8008b1e: 46bd mov sp, r7
8008b20: bd80 pop {r7, pc}
08008b22 <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
8008b22: b580 push {r7, lr}
8008b24: b084 sub sp, #16
8008b26: af00 add r7, sp, #0
8008b28: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008b2a: 687b ldr r3, [r7, #4]
8008b2c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008b30: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
8008b32: 687b ldr r3, [r7, #4]
8008b34: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008b38: 2b00 cmp r3, #0
8008b3a: d017 beq.n 8008b6c <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
8008b3c: 687b ldr r3, [r7, #4]
8008b3e: 7c1b ldrb r3, [r3, #16]
8008b40: 2b00 cmp r3, #0
8008b42: d109 bne.n 8008b58 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8008b44: 68fb ldr r3, [r7, #12]
8008b46: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8008b4a: f44f 7300 mov.w r3, #512 @ 0x200
8008b4e: 2101 movs r1, #1
8008b50: 6878 ldr r0, [r7, #4]
8008b52: f001 fd3e bl 800a5d2 <USBD_LL_PrepareReceive>
8008b56: e007 b.n 8008b68 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8008b58: 68fb ldr r3, [r7, #12]
8008b5a: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8008b5e: 2340 movs r3, #64 @ 0x40
8008b60: 2101 movs r1, #1
8008b62: 6878 ldr r0, [r7, #4]
8008b64: f001 fd35 bl 800a5d2 <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
8008b68: 2300 movs r3, #0
8008b6a: e000 b.n 8008b6e <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
8008b6c: 2302 movs r3, #2
}
}
8008b6e: 4618 mov r0, r3
8008b70: 3710 adds r7, #16
8008b72: 46bd mov sp, r7
8008b74: bd80 pop {r7, pc}
08008b76 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
8008b76: b580 push {r7, lr}
8008b78: b084 sub sp, #16
8008b7a: af00 add r7, sp, #0
8008b7c: 60f8 str r0, [r7, #12]
8008b7e: 60b9 str r1, [r7, #8]
8008b80: 4613 mov r3, r2
8008b82: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
8008b84: 68fb ldr r3, [r7, #12]
8008b86: 2b00 cmp r3, #0
8008b88: d101 bne.n 8008b8e <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
8008b8a: 2302 movs r3, #2
8008b8c: e01a b.n 8008bc4 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
8008b8e: 68fb ldr r3, [r7, #12]
8008b90: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008b94: 2b00 cmp r3, #0
8008b96: d003 beq.n 8008ba0 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
8008b98: 68fb ldr r3, [r7, #12]
8008b9a: 2200 movs r2, #0
8008b9c: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
8008ba0: 68bb ldr r3, [r7, #8]
8008ba2: 2b00 cmp r3, #0
8008ba4: d003 beq.n 8008bae <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
8008ba6: 68fb ldr r3, [r7, #12]
8008ba8: 68ba ldr r2, [r7, #8]
8008baa: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
8008bae: 68fb ldr r3, [r7, #12]
8008bb0: 2201 movs r2, #1
8008bb2: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
8008bb6: 68fb ldr r3, [r7, #12]
8008bb8: 79fa ldrb r2, [r7, #7]
8008bba: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
8008bbc: 68f8 ldr r0, [r7, #12]
8008bbe: f001 fba3 bl 800a308 <USBD_LL_Init>
return USBD_OK;
8008bc2: 2300 movs r3, #0
}
8008bc4: 4618 mov r0, r3
8008bc6: 3710 adds r7, #16
8008bc8: 46bd mov sp, r7
8008bca: bd80 pop {r7, pc}
08008bcc <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
8008bcc: b480 push {r7}
8008bce: b085 sub sp, #20
8008bd0: af00 add r7, sp, #0
8008bd2: 6078 str r0, [r7, #4]
8008bd4: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
8008bd6: 2300 movs r3, #0
8008bd8: 73fb strb r3, [r7, #15]
if (pclass != NULL)
8008bda: 683b ldr r3, [r7, #0]
8008bdc: 2b00 cmp r3, #0
8008bde: d006 beq.n 8008bee <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
8008be0: 687b ldr r3, [r7, #4]
8008be2: 683a ldr r2, [r7, #0]
8008be4: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
8008be8: 2300 movs r3, #0
8008bea: 73fb strb r3, [r7, #15]
8008bec: e001 b.n 8008bf2 <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
8008bee: 2302 movs r3, #2
8008bf0: 73fb strb r3, [r7, #15]
}
return status;
8008bf2: 7bfb ldrb r3, [r7, #15]
}
8008bf4: 4618 mov r0, r3
8008bf6: 3714 adds r7, #20
8008bf8: 46bd mov sp, r7
8008bfa: bc80 pop {r7}
8008bfc: 4770 bx lr
08008bfe <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
8008bfe: b580 push {r7, lr}
8008c00: b082 sub sp, #8
8008c02: af00 add r7, sp, #0
8008c04: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
8008c06: 6878 ldr r0, [r7, #4]
8008c08: f001 fbd8 bl 800a3bc <USBD_LL_Start>
return USBD_OK;
8008c0c: 2300 movs r3, #0
}
8008c0e: 4618 mov r0, r3
8008c10: 3708 adds r7, #8
8008c12: 46bd mov sp, r7
8008c14: bd80 pop {r7, pc}
08008c16 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
8008c16: b480 push {r7}
8008c18: b083 sub sp, #12
8008c1a: af00 add r7, sp, #0
8008c1c: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
8008c1e: 2300 movs r3, #0
}
8008c20: 4618 mov r0, r3
8008c22: 370c adds r7, #12
8008c24: 46bd mov sp, r7
8008c26: bc80 pop {r7}
8008c28: 4770 bx lr
08008c2a <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008c2a: b580 push {r7, lr}
8008c2c: b084 sub sp, #16
8008c2e: af00 add r7, sp, #0
8008c30: 6078 str r0, [r7, #4]
8008c32: 460b mov r3, r1
8008c34: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
8008c36: 2302 movs r3, #2
8008c38: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
8008c3a: 687b ldr r3, [r7, #4]
8008c3c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008c40: 2b00 cmp r3, #0
8008c42: d00c beq.n 8008c5e <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
8008c44: 687b ldr r3, [r7, #4]
8008c46: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008c4a: 681b ldr r3, [r3, #0]
8008c4c: 78fa ldrb r2, [r7, #3]
8008c4e: 4611 mov r1, r2
8008c50: 6878 ldr r0, [r7, #4]
8008c52: 4798 blx r3
8008c54: 4603 mov r3, r0
8008c56: 2b00 cmp r3, #0
8008c58: d101 bne.n 8008c5e <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
8008c5a: 2300 movs r3, #0
8008c5c: 73fb strb r3, [r7, #15]
}
}
return ret;
8008c5e: 7bfb ldrb r3, [r7, #15]
}
8008c60: 4618 mov r0, r3
8008c62: 3710 adds r7, #16
8008c64: 46bd mov sp, r7
8008c66: bd80 pop {r7, pc}
08008c68 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008c68: b580 push {r7, lr}
8008c6a: b082 sub sp, #8
8008c6c: af00 add r7, sp, #0
8008c6e: 6078 str r0, [r7, #4]
8008c70: 460b mov r3, r1
8008c72: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
8008c74: 687b ldr r3, [r7, #4]
8008c76: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008c7a: 685b ldr r3, [r3, #4]
8008c7c: 78fa ldrb r2, [r7, #3]
8008c7e: 4611 mov r1, r2
8008c80: 6878 ldr r0, [r7, #4]
8008c82: 4798 blx r3
return USBD_OK;
8008c84: 2300 movs r3, #0
}
8008c86: 4618 mov r0, r3
8008c88: 3708 adds r7, #8
8008c8a: 46bd mov sp, r7
8008c8c: bd80 pop {r7, pc}
08008c8e <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
8008c8e: b580 push {r7, lr}
8008c90: b082 sub sp, #8
8008c92: af00 add r7, sp, #0
8008c94: 6078 str r0, [r7, #4]
8008c96: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
8008c98: 687b ldr r3, [r7, #4]
8008c9a: f503 732a add.w r3, r3, #680 @ 0x2a8
8008c9e: 6839 ldr r1, [r7, #0]
8008ca0: 4618 mov r0, r3
8008ca2: f000 fed8 bl 8009a56 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
8008ca6: 687b ldr r3, [r7, #4]
8008ca8: 2201 movs r2, #1
8008caa: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
8008cae: 687b ldr r3, [r7, #4]
8008cb0: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
8008cb4: 461a mov r2, r3
8008cb6: 687b ldr r3, [r7, #4]
8008cb8: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
8008cbc: 687b ldr r3, [r7, #4]
8008cbe: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
8008cc2: f003 031f and.w r3, r3, #31
8008cc6: 2b02 cmp r3, #2
8008cc8: d016 beq.n 8008cf8 <USBD_LL_SetupStage+0x6a>
8008cca: 2b02 cmp r3, #2
8008ccc: d81c bhi.n 8008d08 <USBD_LL_SetupStage+0x7a>
8008cce: 2b00 cmp r3, #0
8008cd0: d002 beq.n 8008cd8 <USBD_LL_SetupStage+0x4a>
8008cd2: 2b01 cmp r3, #1
8008cd4: d008 beq.n 8008ce8 <USBD_LL_SetupStage+0x5a>
8008cd6: e017 b.n 8008d08 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
8008cd8: 687b ldr r3, [r7, #4]
8008cda: f503 732a add.w r3, r3, #680 @ 0x2a8
8008cde: 4619 mov r1, r3
8008ce0: 6878 ldr r0, [r7, #4]
8008ce2: f000 f9cb bl 800907c <USBD_StdDevReq>
break;
8008ce6: e01a b.n 8008d1e <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
8008ce8: 687b ldr r3, [r7, #4]
8008cea: f503 732a add.w r3, r3, #680 @ 0x2a8
8008cee: 4619 mov r1, r3
8008cf0: 6878 ldr r0, [r7, #4]
8008cf2: f000 fa2d bl 8009150 <USBD_StdItfReq>
break;
8008cf6: e012 b.n 8008d1e <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
8008cf8: 687b ldr r3, [r7, #4]
8008cfa: f503 732a add.w r3, r3, #680 @ 0x2a8
8008cfe: 4619 mov r1, r3
8008d00: 6878 ldr r0, [r7, #4]
8008d02: f000 fa6d bl 80091e0 <USBD_StdEPReq>
break;
8008d06: e00a b.n 8008d1e <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
8008d08: 687b ldr r3, [r7, #4]
8008d0a: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
8008d0e: f023 037f bic.w r3, r3, #127 @ 0x7f
8008d12: b2db uxtb r3, r3
8008d14: 4619 mov r1, r3
8008d16: 6878 ldr r0, [r7, #4]
8008d18: f001 fbb0 bl 800a47c <USBD_LL_StallEP>
break;
8008d1c: bf00 nop
}
return USBD_OK;
8008d1e: 2300 movs r3, #0
}
8008d20: 4618 mov r0, r3
8008d22: 3708 adds r7, #8
8008d24: 46bd mov sp, r7
8008d26: bd80 pop {r7, pc}
08008d28 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8008d28: b580 push {r7, lr}
8008d2a: b086 sub sp, #24
8008d2c: af00 add r7, sp, #0
8008d2e: 60f8 str r0, [r7, #12]
8008d30: 460b mov r3, r1
8008d32: 607a str r2, [r7, #4]
8008d34: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8008d36: 7afb ldrb r3, [r7, #11]
8008d38: 2b00 cmp r3, #0
8008d3a: d14b bne.n 8008dd4 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
8008d3c: 68fb ldr r3, [r7, #12]
8008d3e: f503 73aa add.w r3, r3, #340 @ 0x154
8008d42: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
8008d44: 68fb ldr r3, [r7, #12]
8008d46: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8008d4a: 2b03 cmp r3, #3
8008d4c: d134 bne.n 8008db8 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
8008d4e: 697b ldr r3, [r7, #20]
8008d50: 68da ldr r2, [r3, #12]
8008d52: 697b ldr r3, [r7, #20]
8008d54: 691b ldr r3, [r3, #16]
8008d56: 429a cmp r2, r3
8008d58: d919 bls.n 8008d8e <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
8008d5a: 697b ldr r3, [r7, #20]
8008d5c: 68da ldr r2, [r3, #12]
8008d5e: 697b ldr r3, [r7, #20]
8008d60: 691b ldr r3, [r3, #16]
8008d62: 1ad2 subs r2, r2, r3
8008d64: 697b ldr r3, [r7, #20]
8008d66: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008d68: 697b ldr r3, [r7, #20]
8008d6a: 68da ldr r2, [r3, #12]
8008d6c: 697b ldr r3, [r7, #20]
8008d6e: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8008d70: 429a cmp r2, r3
8008d72: d203 bcs.n 8008d7c <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008d74: 697b ldr r3, [r7, #20]
8008d76: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
8008d78: b29b uxth r3, r3
8008d7a: e002 b.n 8008d82 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008d7c: 697b ldr r3, [r7, #20]
8008d7e: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8008d80: b29b uxth r3, r3
8008d82: 461a mov r2, r3
8008d84: 6879 ldr r1, [r7, #4]
8008d86: 68f8 ldr r0, [r7, #12]
8008d88: f000 ff54 bl 8009c34 <USBD_CtlContinueRx>
8008d8c: e038 b.n 8008e00 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
8008d8e: 68fb ldr r3, [r7, #12]
8008d90: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008d94: 691b ldr r3, [r3, #16]
8008d96: 2b00 cmp r3, #0
8008d98: d00a beq.n 8008db0 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008d9a: 68fb ldr r3, [r7, #12]
8008d9c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
8008da0: 2b03 cmp r3, #3
8008da2: d105 bne.n 8008db0 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
8008da4: 68fb ldr r3, [r7, #12]
8008da6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008daa: 691b ldr r3, [r3, #16]
8008dac: 68f8 ldr r0, [r7, #12]
8008dae: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
8008db0: 68f8 ldr r0, [r7, #12]
8008db2: f000 ff51 bl 8009c58 <USBD_CtlSendStatus>
8008db6: e023 b.n 8008e00 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
8008db8: 68fb ldr r3, [r7, #12]
8008dba: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8008dbe: 2b05 cmp r3, #5
8008dc0: d11e bne.n 8008e00 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
8008dc2: 68fb ldr r3, [r7, #12]
8008dc4: 2200 movs r2, #0
8008dc6: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
8008dca: 2100 movs r1, #0
8008dcc: 68f8 ldr r0, [r7, #12]
8008dce: f001 fb55 bl 800a47c <USBD_LL_StallEP>
8008dd2: e015 b.n 8008e00 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
8008dd4: 68fb ldr r3, [r7, #12]
8008dd6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008dda: 699b ldr r3, [r3, #24]
8008ddc: 2b00 cmp r3, #0
8008dde: d00d beq.n 8008dfc <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008de0: 68fb ldr r3, [r7, #12]
8008de2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
8008de6: 2b03 cmp r3, #3
8008de8: d108 bne.n 8008dfc <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
8008dea: 68fb ldr r3, [r7, #12]
8008dec: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008df0: 699b ldr r3, [r3, #24]
8008df2: 7afa ldrb r2, [r7, #11]
8008df4: 4611 mov r1, r2
8008df6: 68f8 ldr r0, [r7, #12]
8008df8: 4798 blx r3
8008dfa: e001 b.n 8008e00 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8008dfc: 2302 movs r3, #2
8008dfe: e000 b.n 8008e02 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
8008e00: 2300 movs r3, #0
}
8008e02: 4618 mov r0, r3
8008e04: 3718 adds r7, #24
8008e06: 46bd mov sp, r7
8008e08: bd80 pop {r7, pc}
08008e0a <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8008e0a: b580 push {r7, lr}
8008e0c: b086 sub sp, #24
8008e0e: af00 add r7, sp, #0
8008e10: 60f8 str r0, [r7, #12]
8008e12: 460b mov r3, r1
8008e14: 607a str r2, [r7, #4]
8008e16: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8008e18: 7afb ldrb r3, [r7, #11]
8008e1a: 2b00 cmp r3, #0
8008e1c: d17f bne.n 8008f1e <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
8008e1e: 68fb ldr r3, [r7, #12]
8008e20: 3314 adds r3, #20
8008e22: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
8008e24: 68fb ldr r3, [r7, #12]
8008e26: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8008e2a: 2b02 cmp r3, #2
8008e2c: d15c bne.n 8008ee8 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
8008e2e: 697b ldr r3, [r7, #20]
8008e30: 68da ldr r2, [r3, #12]
8008e32: 697b ldr r3, [r7, #20]
8008e34: 691b ldr r3, [r3, #16]
8008e36: 429a cmp r2, r3
8008e38: d915 bls.n 8008e66 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
8008e3a: 697b ldr r3, [r7, #20]
8008e3c: 68da ldr r2, [r3, #12]
8008e3e: 697b ldr r3, [r7, #20]
8008e40: 691b ldr r3, [r3, #16]
8008e42: 1ad2 subs r2, r2, r3
8008e44: 697b ldr r3, [r7, #20]
8008e46: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
8008e48: 697b ldr r3, [r7, #20]
8008e4a: 68db ldr r3, [r3, #12]
8008e4c: b29b uxth r3, r3
8008e4e: 461a mov r2, r3
8008e50: 6879 ldr r1, [r7, #4]
8008e52: 68f8 ldr r0, [r7, #12]
8008e54: f000 febe bl 8009bd4 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8008e58: 2300 movs r3, #0
8008e5a: 2200 movs r2, #0
8008e5c: 2100 movs r1, #0
8008e5e: 68f8 ldr r0, [r7, #12]
8008e60: f001 fbb7 bl 800a5d2 <USBD_LL_PrepareReceive>
8008e64: e04e b.n 8008f04 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
8008e66: 697b ldr r3, [r7, #20]
8008e68: 689b ldr r3, [r3, #8]
8008e6a: 697a ldr r2, [r7, #20]
8008e6c: 6912 ldr r2, [r2, #16]
8008e6e: fbb3 f1f2 udiv r1, r3, r2
8008e72: fb01 f202 mul.w r2, r1, r2
8008e76: 1a9b subs r3, r3, r2
8008e78: 2b00 cmp r3, #0
8008e7a: d11c bne.n 8008eb6 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
8008e7c: 697b ldr r3, [r7, #20]
8008e7e: 689a ldr r2, [r3, #8]
8008e80: 697b ldr r3, [r7, #20]
8008e82: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
8008e84: 429a cmp r2, r3
8008e86: d316 bcc.n 8008eb6 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
8008e88: 697b ldr r3, [r7, #20]
8008e8a: 689a ldr r2, [r3, #8]
8008e8c: 68fb ldr r3, [r7, #12]
8008e8e: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
8008e92: 429a cmp r2, r3
8008e94: d20f bcs.n 8008eb6 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
8008e96: 2200 movs r2, #0
8008e98: 2100 movs r1, #0
8008e9a: 68f8 ldr r0, [r7, #12]
8008e9c: f000 fe9a bl 8009bd4 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
8008ea0: 68fb ldr r3, [r7, #12]
8008ea2: 2200 movs r2, #0
8008ea4: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8008ea8: 2300 movs r3, #0
8008eaa: 2200 movs r2, #0
8008eac: 2100 movs r1, #0
8008eae: 68f8 ldr r0, [r7, #12]
8008eb0: f001 fb8f bl 800a5d2 <USBD_LL_PrepareReceive>
8008eb4: e026 b.n 8008f04 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
8008eb6: 68fb ldr r3, [r7, #12]
8008eb8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008ebc: 68db ldr r3, [r3, #12]
8008ebe: 2b00 cmp r3, #0
8008ec0: d00a beq.n 8008ed8 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008ec2: 68fb ldr r3, [r7, #12]
8008ec4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
8008ec8: 2b03 cmp r3, #3
8008eca: d105 bne.n 8008ed8 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
8008ecc: 68fb ldr r3, [r7, #12]
8008ece: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008ed2: 68db ldr r3, [r3, #12]
8008ed4: 68f8 ldr r0, [r7, #12]
8008ed6: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
8008ed8: 2180 movs r1, #128 @ 0x80
8008eda: 68f8 ldr r0, [r7, #12]
8008edc: f001 face bl 800a47c <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
8008ee0: 68f8 ldr r0, [r7, #12]
8008ee2: f000 fecc bl 8009c7e <USBD_CtlReceiveStatus>
8008ee6: e00d b.n 8008f04 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8008ee8: 68fb ldr r3, [r7, #12]
8008eea: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8008eee: 2b04 cmp r3, #4
8008ef0: d004 beq.n 8008efc <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
8008ef2: 68fb ldr r3, [r7, #12]
8008ef4: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8008ef8: 2b00 cmp r3, #0
8008efa: d103 bne.n 8008f04 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
8008efc: 2180 movs r1, #128 @ 0x80
8008efe: 68f8 ldr r0, [r7, #12]
8008f00: f001 fabc bl 800a47c <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
8008f04: 68fb ldr r3, [r7, #12]
8008f06: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
8008f0a: 2b01 cmp r3, #1
8008f0c: d11d bne.n 8008f4a <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
8008f0e: 68f8 ldr r0, [r7, #12]
8008f10: f7ff fe81 bl 8008c16 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
8008f14: 68fb ldr r3, [r7, #12]
8008f16: 2200 movs r2, #0
8008f18: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
8008f1c: e015 b.n 8008f4a <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
8008f1e: 68fb ldr r3, [r7, #12]
8008f20: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008f24: 695b ldr r3, [r3, #20]
8008f26: 2b00 cmp r3, #0
8008f28: d00d beq.n 8008f46 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008f2a: 68fb ldr r3, [r7, #12]
8008f2c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
8008f30: 2b03 cmp r3, #3
8008f32: d108 bne.n 8008f46 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
8008f34: 68fb ldr r3, [r7, #12]
8008f36: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008f3a: 695b ldr r3, [r3, #20]
8008f3c: 7afa ldrb r2, [r7, #11]
8008f3e: 4611 mov r1, r2
8008f40: 68f8 ldr r0, [r7, #12]
8008f42: 4798 blx r3
8008f44: e001 b.n 8008f4a <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8008f46: 2302 movs r3, #2
8008f48: e000 b.n 8008f4c <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
8008f4a: 2300 movs r3, #0
}
8008f4c: 4618 mov r0, r3
8008f4e: 3718 adds r7, #24
8008f50: 46bd mov sp, r7
8008f52: bd80 pop {r7, pc}
08008f54 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
8008f54: b580 push {r7, lr}
8008f56: b082 sub sp, #8
8008f58: af00 add r7, sp, #0
8008f5a: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8008f5c: 2340 movs r3, #64 @ 0x40
8008f5e: 2200 movs r2, #0
8008f60: 2100 movs r1, #0
8008f62: 6878 ldr r0, [r7, #4]
8008f64: f001 fa45 bl 800a3f2 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
8008f68: 687b ldr r3, [r7, #4]
8008f6a: 2201 movs r2, #1
8008f6c: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
8008f70: 687b ldr r3, [r7, #4]
8008f72: 2240 movs r2, #64 @ 0x40
8008f74: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8008f78: 2340 movs r3, #64 @ 0x40
8008f7a: 2200 movs r2, #0
8008f7c: 2180 movs r1, #128 @ 0x80
8008f7e: 6878 ldr r0, [r7, #4]
8008f80: f001 fa37 bl 800a3f2 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
8008f84: 687b ldr r3, [r7, #4]
8008f86: 2201 movs r2, #1
8008f88: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
8008f8a: 687b ldr r3, [r7, #4]
8008f8c: 2240 movs r2, #64 @ 0x40
8008f8e: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
8008f90: 687b ldr r3, [r7, #4]
8008f92: 2201 movs r2, #1
8008f94: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
8008f98: 687b ldr r3, [r7, #4]
8008f9a: 2200 movs r2, #0
8008f9c: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
8008fa0: 687b ldr r3, [r7, #4]
8008fa2: 2200 movs r2, #0
8008fa4: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
8008fa6: 687b ldr r3, [r7, #4]
8008fa8: 2200 movs r2, #0
8008faa: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
8008fae: 687b ldr r3, [r7, #4]
8008fb0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008fb4: 2b00 cmp r3, #0
8008fb6: d009 beq.n 8008fcc <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
8008fb8: 687b ldr r3, [r7, #4]
8008fba: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008fbe: 685b ldr r3, [r3, #4]
8008fc0: 687a ldr r2, [r7, #4]
8008fc2: 6852 ldr r2, [r2, #4]
8008fc4: b2d2 uxtb r2, r2
8008fc6: 4611 mov r1, r2
8008fc8: 6878 ldr r0, [r7, #4]
8008fca: 4798 blx r3
}
return USBD_OK;
8008fcc: 2300 movs r3, #0
}
8008fce: 4618 mov r0, r3
8008fd0: 3708 adds r7, #8
8008fd2: 46bd mov sp, r7
8008fd4: bd80 pop {r7, pc}
08008fd6 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
8008fd6: b480 push {r7}
8008fd8: b083 sub sp, #12
8008fda: af00 add r7, sp, #0
8008fdc: 6078 str r0, [r7, #4]
8008fde: 460b mov r3, r1
8008fe0: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
8008fe2: 687b ldr r3, [r7, #4]
8008fe4: 78fa ldrb r2, [r7, #3]
8008fe6: 741a strb r2, [r3, #16]
return USBD_OK;
8008fe8: 2300 movs r3, #0
}
8008fea: 4618 mov r0, r3
8008fec: 370c adds r7, #12
8008fee: 46bd mov sp, r7
8008ff0: bc80 pop {r7}
8008ff2: 4770 bx lr
08008ff4 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
8008ff4: b480 push {r7}
8008ff6: b083 sub sp, #12
8008ff8: af00 add r7, sp, #0
8008ffa: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
8008ffc: 687b ldr r3, [r7, #4]
8008ffe: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
8009002: 687b ldr r3, [r7, #4]
8009004: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
8009008: 687b ldr r3, [r7, #4]
800900a: 2204 movs r2, #4
800900c: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
8009010: 2300 movs r3, #0
}
8009012: 4618 mov r0, r3
8009014: 370c adds r7, #12
8009016: 46bd mov sp, r7
8009018: bc80 pop {r7}
800901a: 4770 bx lr
0800901c <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800901c: b480 push {r7}
800901e: b083 sub sp, #12
8009020: af00 add r7, sp, #0
8009022: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
8009024: 687b ldr r3, [r7, #4]
8009026: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800902a: 2b04 cmp r3, #4
800902c: d105 bne.n 800903a <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800902e: 687b ldr r3, [r7, #4]
8009030: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
8009034: 687b ldr r3, [r7, #4]
8009036: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800903a: 2300 movs r3, #0
}
800903c: 4618 mov r0, r3
800903e: 370c adds r7, #12
8009040: 46bd mov sp, r7
8009042: bc80 pop {r7}
8009044: 4770 bx lr
08009046 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
8009046: b580 push {r7, lr}
8009048: b082 sub sp, #8
800904a: af00 add r7, sp, #0
800904c: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800904e: 687b ldr r3, [r7, #4]
8009050: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009054: 2b03 cmp r3, #3
8009056: d10b bne.n 8009070 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
8009058: 687b ldr r3, [r7, #4]
800905a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800905e: 69db ldr r3, [r3, #28]
8009060: 2b00 cmp r3, #0
8009062: d005 beq.n 8009070 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
8009064: 687b ldr r3, [r7, #4]
8009066: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800906a: 69db ldr r3, [r3, #28]
800906c: 6878 ldr r0, [r7, #4]
800906e: 4798 blx r3
}
}
return USBD_OK;
8009070: 2300 movs r3, #0
}
8009072: 4618 mov r0, r3
8009074: 3708 adds r7, #8
8009076: 46bd mov sp, r7
8009078: bd80 pop {r7, pc}
...
0800907c <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800907c: b580 push {r7, lr}
800907e: b084 sub sp, #16
8009080: af00 add r7, sp, #0
8009082: 6078 str r0, [r7, #4]
8009084: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
8009086: 2300 movs r3, #0
8009088: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800908a: 683b ldr r3, [r7, #0]
800908c: 781b ldrb r3, [r3, #0]
800908e: f003 0360 and.w r3, r3, #96 @ 0x60
8009092: 2b40 cmp r3, #64 @ 0x40
8009094: d005 beq.n 80090a2 <USBD_StdDevReq+0x26>
8009096: 2b40 cmp r3, #64 @ 0x40
8009098: d84f bhi.n 800913a <USBD_StdDevReq+0xbe>
800909a: 2b00 cmp r3, #0
800909c: d009 beq.n 80090b2 <USBD_StdDevReq+0x36>
800909e: 2b20 cmp r3, #32
80090a0: d14b bne.n 800913a <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
80090a2: 687b ldr r3, [r7, #4]
80090a4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80090a8: 689b ldr r3, [r3, #8]
80090aa: 6839 ldr r1, [r7, #0]
80090ac: 6878 ldr r0, [r7, #4]
80090ae: 4798 blx r3
break;
80090b0: e048 b.n 8009144 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80090b2: 683b ldr r3, [r7, #0]
80090b4: 785b ldrb r3, [r3, #1]
80090b6: 2b09 cmp r3, #9
80090b8: d839 bhi.n 800912e <USBD_StdDevReq+0xb2>
80090ba: a201 add r2, pc, #4 @ (adr r2, 80090c0 <USBD_StdDevReq+0x44>)
80090bc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80090c0: 08009111 .word 0x08009111
80090c4: 08009125 .word 0x08009125
80090c8: 0800912f .word 0x0800912f
80090cc: 0800911b .word 0x0800911b
80090d0: 0800912f .word 0x0800912f
80090d4: 080090f3 .word 0x080090f3
80090d8: 080090e9 .word 0x080090e9
80090dc: 0800912f .word 0x0800912f
80090e0: 08009107 .word 0x08009107
80090e4: 080090fd .word 0x080090fd
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
80090e8: 6839 ldr r1, [r7, #0]
80090ea: 6878 ldr r0, [r7, #4]
80090ec: f000 f9dc bl 80094a8 <USBD_GetDescriptor>
break;
80090f0: e022 b.n 8009138 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
80090f2: 6839 ldr r1, [r7, #0]
80090f4: 6878 ldr r0, [r7, #4]
80090f6: f000 fb3f bl 8009778 <USBD_SetAddress>
break;
80090fa: e01d b.n 8009138 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
80090fc: 6839 ldr r1, [r7, #0]
80090fe: 6878 ldr r0, [r7, #4]
8009100: f000 fb7e bl 8009800 <USBD_SetConfig>
break;
8009104: e018 b.n 8009138 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
8009106: 6839 ldr r1, [r7, #0]
8009108: 6878 ldr r0, [r7, #4]
800910a: f000 fc07 bl 800991c <USBD_GetConfig>
break;
800910e: e013 b.n 8009138 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
8009110: 6839 ldr r1, [r7, #0]
8009112: 6878 ldr r0, [r7, #4]
8009114: f000 fc37 bl 8009986 <USBD_GetStatus>
break;
8009118: e00e b.n 8009138 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800911a: 6839 ldr r1, [r7, #0]
800911c: 6878 ldr r0, [r7, #4]
800911e: f000 fc65 bl 80099ec <USBD_SetFeature>
break;
8009122: e009 b.n 8009138 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
8009124: 6839 ldr r1, [r7, #0]
8009126: 6878 ldr r0, [r7, #4]
8009128: f000 fc74 bl 8009a14 <USBD_ClrFeature>
break;
800912c: e004 b.n 8009138 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800912e: 6839 ldr r1, [r7, #0]
8009130: 6878 ldr r0, [r7, #4]
8009132: f000 fcc9 bl 8009ac8 <USBD_CtlError>
break;
8009136: bf00 nop
}
break;
8009138: e004 b.n 8009144 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800913a: 6839 ldr r1, [r7, #0]
800913c: 6878 ldr r0, [r7, #4]
800913e: f000 fcc3 bl 8009ac8 <USBD_CtlError>
break;
8009142: bf00 nop
}
return ret;
8009144: 7bfb ldrb r3, [r7, #15]
}
8009146: 4618 mov r0, r3
8009148: 3710 adds r7, #16
800914a: 46bd mov sp, r7
800914c: bd80 pop {r7, pc}
800914e: bf00 nop
08009150 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009150: b580 push {r7, lr}
8009152: b084 sub sp, #16
8009154: af00 add r7, sp, #0
8009156: 6078 str r0, [r7, #4]
8009158: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800915a: 2300 movs r3, #0
800915c: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800915e: 683b ldr r3, [r7, #0]
8009160: 781b ldrb r3, [r3, #0]
8009162: f003 0360 and.w r3, r3, #96 @ 0x60
8009166: 2b40 cmp r3, #64 @ 0x40
8009168: d005 beq.n 8009176 <USBD_StdItfReq+0x26>
800916a: 2b40 cmp r3, #64 @ 0x40
800916c: d82e bhi.n 80091cc <USBD_StdItfReq+0x7c>
800916e: 2b00 cmp r3, #0
8009170: d001 beq.n 8009176 <USBD_StdItfReq+0x26>
8009172: 2b20 cmp r3, #32
8009174: d12a bne.n 80091cc <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
8009176: 687b ldr r3, [r7, #4]
8009178: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800917c: 3b01 subs r3, #1
800917e: 2b02 cmp r3, #2
8009180: d81d bhi.n 80091be <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
8009182: 683b ldr r3, [r7, #0]
8009184: 889b ldrh r3, [r3, #4]
8009186: b2db uxtb r3, r3
8009188: 2b01 cmp r3, #1
800918a: d813 bhi.n 80091b4 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800918c: 687b ldr r3, [r7, #4]
800918e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8009192: 689b ldr r3, [r3, #8]
8009194: 6839 ldr r1, [r7, #0]
8009196: 6878 ldr r0, [r7, #4]
8009198: 4798 blx r3
800919a: 4603 mov r3, r0
800919c: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800919e: 683b ldr r3, [r7, #0]
80091a0: 88db ldrh r3, [r3, #6]
80091a2: 2b00 cmp r3, #0
80091a4: d110 bne.n 80091c8 <USBD_StdItfReq+0x78>
80091a6: 7bfb ldrb r3, [r7, #15]
80091a8: 2b00 cmp r3, #0
80091aa: d10d bne.n 80091c8 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
80091ac: 6878 ldr r0, [r7, #4]
80091ae: f000 fd53 bl 8009c58 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80091b2: e009 b.n 80091c8 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
80091b4: 6839 ldr r1, [r7, #0]
80091b6: 6878 ldr r0, [r7, #4]
80091b8: f000 fc86 bl 8009ac8 <USBD_CtlError>
break;
80091bc: e004 b.n 80091c8 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
80091be: 6839 ldr r1, [r7, #0]
80091c0: 6878 ldr r0, [r7, #4]
80091c2: f000 fc81 bl 8009ac8 <USBD_CtlError>
break;
80091c6: e000 b.n 80091ca <USBD_StdItfReq+0x7a>
break;
80091c8: bf00 nop
}
break;
80091ca: e004 b.n 80091d6 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
80091cc: 6839 ldr r1, [r7, #0]
80091ce: 6878 ldr r0, [r7, #4]
80091d0: f000 fc7a bl 8009ac8 <USBD_CtlError>
break;
80091d4: bf00 nop
}
return USBD_OK;
80091d6: 2300 movs r3, #0
}
80091d8: 4618 mov r0, r3
80091da: 3710 adds r7, #16
80091dc: 46bd mov sp, r7
80091de: bd80 pop {r7, pc}
080091e0 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80091e0: b580 push {r7, lr}
80091e2: b084 sub sp, #16
80091e4: af00 add r7, sp, #0
80091e6: 6078 str r0, [r7, #4]
80091e8: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
80091ea: 2300 movs r3, #0
80091ec: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
80091ee: 683b ldr r3, [r7, #0]
80091f0: 889b ldrh r3, [r3, #4]
80091f2: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
80091f4: 683b ldr r3, [r7, #0]
80091f6: 781b ldrb r3, [r3, #0]
80091f8: f003 0360 and.w r3, r3, #96 @ 0x60
80091fc: 2b40 cmp r3, #64 @ 0x40
80091fe: d007 beq.n 8009210 <USBD_StdEPReq+0x30>
8009200: 2b40 cmp r3, #64 @ 0x40
8009202: f200 8146 bhi.w 8009492 <USBD_StdEPReq+0x2b2>
8009206: 2b00 cmp r3, #0
8009208: d00a beq.n 8009220 <USBD_StdEPReq+0x40>
800920a: 2b20 cmp r3, #32
800920c: f040 8141 bne.w 8009492 <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8009210: 687b ldr r3, [r7, #4]
8009212: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8009216: 689b ldr r3, [r3, #8]
8009218: 6839 ldr r1, [r7, #0]
800921a: 6878 ldr r0, [r7, #4]
800921c: 4798 blx r3
break;
800921e: e13d b.n 800949c <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
8009220: 683b ldr r3, [r7, #0]
8009222: 781b ldrb r3, [r3, #0]
8009224: f003 0360 and.w r3, r3, #96 @ 0x60
8009228: 2b20 cmp r3, #32
800922a: d10a bne.n 8009242 <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800922c: 687b ldr r3, [r7, #4]
800922e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8009232: 689b ldr r3, [r3, #8]
8009234: 6839 ldr r1, [r7, #0]
8009236: 6878 ldr r0, [r7, #4]
8009238: 4798 blx r3
800923a: 4603 mov r3, r0
800923c: 73fb strb r3, [r7, #15]
return ret;
800923e: 7bfb ldrb r3, [r7, #15]
8009240: e12d b.n 800949e <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
8009242: 683b ldr r3, [r7, #0]
8009244: 785b ldrb r3, [r3, #1]
8009246: 2b03 cmp r3, #3
8009248: d007 beq.n 800925a <USBD_StdEPReq+0x7a>
800924a: 2b03 cmp r3, #3
800924c: f300 811b bgt.w 8009486 <USBD_StdEPReq+0x2a6>
8009250: 2b00 cmp r3, #0
8009252: d072 beq.n 800933a <USBD_StdEPReq+0x15a>
8009254: 2b01 cmp r3, #1
8009256: d03a beq.n 80092ce <USBD_StdEPReq+0xee>
8009258: e115 b.n 8009486 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800925a: 687b ldr r3, [r7, #4]
800925c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009260: 2b02 cmp r3, #2
8009262: d002 beq.n 800926a <USBD_StdEPReq+0x8a>
8009264: 2b03 cmp r3, #3
8009266: d015 beq.n 8009294 <USBD_StdEPReq+0xb4>
8009268: e02b b.n 80092c2 <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800926a: 7bbb ldrb r3, [r7, #14]
800926c: 2b00 cmp r3, #0
800926e: d00c beq.n 800928a <USBD_StdEPReq+0xaa>
8009270: 7bbb ldrb r3, [r7, #14]
8009272: 2b80 cmp r3, #128 @ 0x80
8009274: d009 beq.n 800928a <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
8009276: 7bbb ldrb r3, [r7, #14]
8009278: 4619 mov r1, r3
800927a: 6878 ldr r0, [r7, #4]
800927c: f001 f8fe bl 800a47c <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8009280: 2180 movs r1, #128 @ 0x80
8009282: 6878 ldr r0, [r7, #4]
8009284: f001 f8fa bl 800a47c <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8009288: e020 b.n 80092cc <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800928a: 6839 ldr r1, [r7, #0]
800928c: 6878 ldr r0, [r7, #4]
800928e: f000 fc1b bl 8009ac8 <USBD_CtlError>
break;
8009292: e01b b.n 80092cc <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8009294: 683b ldr r3, [r7, #0]
8009296: 885b ldrh r3, [r3, #2]
8009298: 2b00 cmp r3, #0
800929a: d10e bne.n 80092ba <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800929c: 7bbb ldrb r3, [r7, #14]
800929e: 2b00 cmp r3, #0
80092a0: d00b beq.n 80092ba <USBD_StdEPReq+0xda>
80092a2: 7bbb ldrb r3, [r7, #14]
80092a4: 2b80 cmp r3, #128 @ 0x80
80092a6: d008 beq.n 80092ba <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
80092a8: 683b ldr r3, [r7, #0]
80092aa: 88db ldrh r3, [r3, #6]
80092ac: 2b00 cmp r3, #0
80092ae: d104 bne.n 80092ba <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
80092b0: 7bbb ldrb r3, [r7, #14]
80092b2: 4619 mov r1, r3
80092b4: 6878 ldr r0, [r7, #4]
80092b6: f001 f8e1 bl 800a47c <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
80092ba: 6878 ldr r0, [r7, #4]
80092bc: f000 fccc bl 8009c58 <USBD_CtlSendStatus>
break;
80092c0: e004 b.n 80092cc <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
80092c2: 6839 ldr r1, [r7, #0]
80092c4: 6878 ldr r0, [r7, #4]
80092c6: f000 fbff bl 8009ac8 <USBD_CtlError>
break;
80092ca: bf00 nop
}
break;
80092cc: e0e0 b.n 8009490 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
80092ce: 687b ldr r3, [r7, #4]
80092d0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80092d4: 2b02 cmp r3, #2
80092d6: d002 beq.n 80092de <USBD_StdEPReq+0xfe>
80092d8: 2b03 cmp r3, #3
80092da: d015 beq.n 8009308 <USBD_StdEPReq+0x128>
80092dc: e026 b.n 800932c <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
80092de: 7bbb ldrb r3, [r7, #14]
80092e0: 2b00 cmp r3, #0
80092e2: d00c beq.n 80092fe <USBD_StdEPReq+0x11e>
80092e4: 7bbb ldrb r3, [r7, #14]
80092e6: 2b80 cmp r3, #128 @ 0x80
80092e8: d009 beq.n 80092fe <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
80092ea: 7bbb ldrb r3, [r7, #14]
80092ec: 4619 mov r1, r3
80092ee: 6878 ldr r0, [r7, #4]
80092f0: f001 f8c4 bl 800a47c <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
80092f4: 2180 movs r1, #128 @ 0x80
80092f6: 6878 ldr r0, [r7, #4]
80092f8: f001 f8c0 bl 800a47c <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80092fc: e01c b.n 8009338 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
80092fe: 6839 ldr r1, [r7, #0]
8009300: 6878 ldr r0, [r7, #4]
8009302: f000 fbe1 bl 8009ac8 <USBD_CtlError>
break;
8009306: e017 b.n 8009338 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8009308: 683b ldr r3, [r7, #0]
800930a: 885b ldrh r3, [r3, #2]
800930c: 2b00 cmp r3, #0
800930e: d112 bne.n 8009336 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
8009310: 7bbb ldrb r3, [r7, #14]
8009312: f003 037f and.w r3, r3, #127 @ 0x7f
8009316: 2b00 cmp r3, #0
8009318: d004 beq.n 8009324 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800931a: 7bbb ldrb r3, [r7, #14]
800931c: 4619 mov r1, r3
800931e: 6878 ldr r0, [r7, #4]
8009320: f001 f8cb bl 800a4ba <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
8009324: 6878 ldr r0, [r7, #4]
8009326: f000 fc97 bl 8009c58 <USBD_CtlSendStatus>
}
break;
800932a: e004 b.n 8009336 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800932c: 6839 ldr r1, [r7, #0]
800932e: 6878 ldr r0, [r7, #4]
8009330: f000 fbca bl 8009ac8 <USBD_CtlError>
break;
8009334: e000 b.n 8009338 <USBD_StdEPReq+0x158>
break;
8009336: bf00 nop
}
break;
8009338: e0aa b.n 8009490 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800933a: 687b ldr r3, [r7, #4]
800933c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009340: 2b02 cmp r3, #2
8009342: d002 beq.n 800934a <USBD_StdEPReq+0x16a>
8009344: 2b03 cmp r3, #3
8009346: d032 beq.n 80093ae <USBD_StdEPReq+0x1ce>
8009348: e097 b.n 800947a <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800934a: 7bbb ldrb r3, [r7, #14]
800934c: 2b00 cmp r3, #0
800934e: d007 beq.n 8009360 <USBD_StdEPReq+0x180>
8009350: 7bbb ldrb r3, [r7, #14]
8009352: 2b80 cmp r3, #128 @ 0x80
8009354: d004 beq.n 8009360 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
8009356: 6839 ldr r1, [r7, #0]
8009358: 6878 ldr r0, [r7, #4]
800935a: f000 fbb5 bl 8009ac8 <USBD_CtlError>
break;
800935e: e091 b.n 8009484 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8009360: f997 300e ldrsb.w r3, [r7, #14]
8009364: 2b00 cmp r3, #0
8009366: da0b bge.n 8009380 <USBD_StdEPReq+0x1a0>
8009368: 7bbb ldrb r3, [r7, #14]
800936a: f003 027f and.w r2, r3, #127 @ 0x7f
800936e: 4613 mov r3, r2
8009370: 009b lsls r3, r3, #2
8009372: 4413 add r3, r2
8009374: 009b lsls r3, r3, #2
8009376: 3310 adds r3, #16
8009378: 687a ldr r2, [r7, #4]
800937a: 4413 add r3, r2
800937c: 3304 adds r3, #4
800937e: e00b b.n 8009398 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
8009380: 7bbb ldrb r3, [r7, #14]
8009382: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8009386: 4613 mov r3, r2
8009388: 009b lsls r3, r3, #2
800938a: 4413 add r3, r2
800938c: 009b lsls r3, r3, #2
800938e: f503 73a8 add.w r3, r3, #336 @ 0x150
8009392: 687a ldr r2, [r7, #4]
8009394: 4413 add r3, r2
8009396: 3304 adds r3, #4
8009398: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800939a: 68bb ldr r3, [r7, #8]
800939c: 2200 movs r2, #0
800939e: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
80093a0: 68bb ldr r3, [r7, #8]
80093a2: 2202 movs r2, #2
80093a4: 4619 mov r1, r3
80093a6: 6878 ldr r0, [r7, #4]
80093a8: f000 fbf8 bl 8009b9c <USBD_CtlSendData>
break;
80093ac: e06a b.n 8009484 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
80093ae: f997 300e ldrsb.w r3, [r7, #14]
80093b2: 2b00 cmp r3, #0
80093b4: da11 bge.n 80093da <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
80093b6: 7bbb ldrb r3, [r7, #14]
80093b8: f003 020f and.w r2, r3, #15
80093bc: 6879 ldr r1, [r7, #4]
80093be: 4613 mov r3, r2
80093c0: 009b lsls r3, r3, #2
80093c2: 4413 add r3, r2
80093c4: 009b lsls r3, r3, #2
80093c6: 440b add r3, r1
80093c8: 3318 adds r3, #24
80093ca: 681b ldr r3, [r3, #0]
80093cc: 2b00 cmp r3, #0
80093ce: d117 bne.n 8009400 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
80093d0: 6839 ldr r1, [r7, #0]
80093d2: 6878 ldr r0, [r7, #4]
80093d4: f000 fb78 bl 8009ac8 <USBD_CtlError>
break;
80093d8: e054 b.n 8009484 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
80093da: 7bbb ldrb r3, [r7, #14]
80093dc: f003 020f and.w r2, r3, #15
80093e0: 6879 ldr r1, [r7, #4]
80093e2: 4613 mov r3, r2
80093e4: 009b lsls r3, r3, #2
80093e6: 4413 add r3, r2
80093e8: 009b lsls r3, r3, #2
80093ea: 440b add r3, r1
80093ec: f503 73ac add.w r3, r3, #344 @ 0x158
80093f0: 681b ldr r3, [r3, #0]
80093f2: 2b00 cmp r3, #0
80093f4: d104 bne.n 8009400 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
80093f6: 6839 ldr r1, [r7, #0]
80093f8: 6878 ldr r0, [r7, #4]
80093fa: f000 fb65 bl 8009ac8 <USBD_CtlError>
break;
80093fe: e041 b.n 8009484 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8009400: f997 300e ldrsb.w r3, [r7, #14]
8009404: 2b00 cmp r3, #0
8009406: da0b bge.n 8009420 <USBD_StdEPReq+0x240>
8009408: 7bbb ldrb r3, [r7, #14]
800940a: f003 027f and.w r2, r3, #127 @ 0x7f
800940e: 4613 mov r3, r2
8009410: 009b lsls r3, r3, #2
8009412: 4413 add r3, r2
8009414: 009b lsls r3, r3, #2
8009416: 3310 adds r3, #16
8009418: 687a ldr r2, [r7, #4]
800941a: 4413 add r3, r2
800941c: 3304 adds r3, #4
800941e: e00b b.n 8009438 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
8009420: 7bbb ldrb r3, [r7, #14]
8009422: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8009426: 4613 mov r3, r2
8009428: 009b lsls r3, r3, #2
800942a: 4413 add r3, r2
800942c: 009b lsls r3, r3, #2
800942e: f503 73a8 add.w r3, r3, #336 @ 0x150
8009432: 687a ldr r2, [r7, #4]
8009434: 4413 add r3, r2
8009436: 3304 adds r3, #4
8009438: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800943a: 7bbb ldrb r3, [r7, #14]
800943c: 2b00 cmp r3, #0
800943e: d002 beq.n 8009446 <USBD_StdEPReq+0x266>
8009440: 7bbb ldrb r3, [r7, #14]
8009442: 2b80 cmp r3, #128 @ 0x80
8009444: d103 bne.n 800944e <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
8009446: 68bb ldr r3, [r7, #8]
8009448: 2200 movs r2, #0
800944a: 601a str r2, [r3, #0]
800944c: e00e b.n 800946c <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800944e: 7bbb ldrb r3, [r7, #14]
8009450: 4619 mov r1, r3
8009452: 6878 ldr r0, [r7, #4]
8009454: f001 f850 bl 800a4f8 <USBD_LL_IsStallEP>
8009458: 4603 mov r3, r0
800945a: 2b00 cmp r3, #0
800945c: d003 beq.n 8009466 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800945e: 68bb ldr r3, [r7, #8]
8009460: 2201 movs r2, #1
8009462: 601a str r2, [r3, #0]
8009464: e002 b.n 800946c <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
8009466: 68bb ldr r3, [r7, #8]
8009468: 2200 movs r2, #0
800946a: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800946c: 68bb ldr r3, [r7, #8]
800946e: 2202 movs r2, #2
8009470: 4619 mov r1, r3
8009472: 6878 ldr r0, [r7, #4]
8009474: f000 fb92 bl 8009b9c <USBD_CtlSendData>
break;
8009478: e004 b.n 8009484 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800947a: 6839 ldr r1, [r7, #0]
800947c: 6878 ldr r0, [r7, #4]
800947e: f000 fb23 bl 8009ac8 <USBD_CtlError>
break;
8009482: bf00 nop
}
break;
8009484: e004 b.n 8009490 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
8009486: 6839 ldr r1, [r7, #0]
8009488: 6878 ldr r0, [r7, #4]
800948a: f000 fb1d bl 8009ac8 <USBD_CtlError>
break;
800948e: bf00 nop
}
break;
8009490: e004 b.n 800949c <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
8009492: 6839 ldr r1, [r7, #0]
8009494: 6878 ldr r0, [r7, #4]
8009496: f000 fb17 bl 8009ac8 <USBD_CtlError>
break;
800949a: bf00 nop
}
return ret;
800949c: 7bfb ldrb r3, [r7, #15]
}
800949e: 4618 mov r0, r3
80094a0: 3710 adds r7, #16
80094a2: 46bd mov sp, r7
80094a4: bd80 pop {r7, pc}
...
080094a8 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80094a8: b580 push {r7, lr}
80094aa: b084 sub sp, #16
80094ac: af00 add r7, sp, #0
80094ae: 6078 str r0, [r7, #4]
80094b0: 6039 str r1, [r7, #0]
uint16_t len = 0U;
80094b2: 2300 movs r3, #0
80094b4: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
80094b6: 2300 movs r3, #0
80094b8: 60fb str r3, [r7, #12]
uint8_t err = 0U;
80094ba: 2300 movs r3, #0
80094bc: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
80094be: 683b ldr r3, [r7, #0]
80094c0: 885b ldrh r3, [r3, #2]
80094c2: 0a1b lsrs r3, r3, #8
80094c4: b29b uxth r3, r3
80094c6: 3b01 subs r3, #1
80094c8: 2b06 cmp r3, #6
80094ca: f200 8128 bhi.w 800971e <USBD_GetDescriptor+0x276>
80094ce: a201 add r2, pc, #4 @ (adr r2, 80094d4 <USBD_GetDescriptor+0x2c>)
80094d0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80094d4: 080094f1 .word 0x080094f1
80094d8: 08009509 .word 0x08009509
80094dc: 08009549 .word 0x08009549
80094e0: 0800971f .word 0x0800971f
80094e4: 0800971f .word 0x0800971f
80094e8: 080096bf .word 0x080096bf
80094ec: 080096eb .word 0x080096eb
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
80094f0: 687b ldr r3, [r7, #4]
80094f2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80094f6: 681b ldr r3, [r3, #0]
80094f8: 687a ldr r2, [r7, #4]
80094fa: 7c12 ldrb r2, [r2, #16]
80094fc: f107 0108 add.w r1, r7, #8
8009500: 4610 mov r0, r2
8009502: 4798 blx r3
8009504: 60f8 str r0, [r7, #12]
break;
8009506: e112 b.n 800972e <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8009508: 687b ldr r3, [r7, #4]
800950a: 7c1b ldrb r3, [r3, #16]
800950c: 2b00 cmp r3, #0
800950e: d10d bne.n 800952c <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
8009510: 687b ldr r3, [r7, #4]
8009512: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8009516: 6a9b ldr r3, [r3, #40] @ 0x28
8009518: f107 0208 add.w r2, r7, #8
800951c: 4610 mov r0, r2
800951e: 4798 blx r3
8009520: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8009522: 68fb ldr r3, [r7, #12]
8009524: 3301 adds r3, #1
8009526: 2202 movs r2, #2
8009528: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800952a: e100 b.n 800972e <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800952c: 687b ldr r3, [r7, #4]
800952e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8009532: 6adb ldr r3, [r3, #44] @ 0x2c
8009534: f107 0208 add.w r2, r7, #8
8009538: 4610 mov r0, r2
800953a: 4798 blx r3
800953c: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800953e: 68fb ldr r3, [r7, #12]
8009540: 3301 adds r3, #1
8009542: 2202 movs r2, #2
8009544: 701a strb r2, [r3, #0]
break;
8009546: e0f2 b.n 800972e <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
8009548: 683b ldr r3, [r7, #0]
800954a: 885b ldrh r3, [r3, #2]
800954c: b2db uxtb r3, r3
800954e: 2b05 cmp r3, #5
8009550: f200 80ac bhi.w 80096ac <USBD_GetDescriptor+0x204>
8009554: a201 add r2, pc, #4 @ (adr r2, 800955c <USBD_GetDescriptor+0xb4>)
8009556: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800955a: bf00 nop
800955c: 08009575 .word 0x08009575
8009560: 080095a9 .word 0x080095a9
8009564: 080095dd .word 0x080095dd
8009568: 08009611 .word 0x08009611
800956c: 08009645 .word 0x08009645
8009570: 08009679 .word 0x08009679
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
8009574: 687b ldr r3, [r7, #4]
8009576: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800957a: 685b ldr r3, [r3, #4]
800957c: 2b00 cmp r3, #0
800957e: d00b beq.n 8009598 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
8009580: 687b ldr r3, [r7, #4]
8009582: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8009586: 685b ldr r3, [r3, #4]
8009588: 687a ldr r2, [r7, #4]
800958a: 7c12 ldrb r2, [r2, #16]
800958c: f107 0108 add.w r1, r7, #8
8009590: 4610 mov r0, r2
8009592: 4798 blx r3
8009594: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8009596: e091 b.n 80096bc <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8009598: 6839 ldr r1, [r7, #0]
800959a: 6878 ldr r0, [r7, #4]
800959c: f000 fa94 bl 8009ac8 <USBD_CtlError>
err++;
80095a0: 7afb ldrb r3, [r7, #11]
80095a2: 3301 adds r3, #1
80095a4: 72fb strb r3, [r7, #11]
break;
80095a6: e089 b.n 80096bc <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
80095a8: 687b ldr r3, [r7, #4]
80095aa: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80095ae: 689b ldr r3, [r3, #8]
80095b0: 2b00 cmp r3, #0
80095b2: d00b beq.n 80095cc <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
80095b4: 687b ldr r3, [r7, #4]
80095b6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80095ba: 689b ldr r3, [r3, #8]
80095bc: 687a ldr r2, [r7, #4]
80095be: 7c12 ldrb r2, [r2, #16]
80095c0: f107 0108 add.w r1, r7, #8
80095c4: 4610 mov r0, r2
80095c6: 4798 blx r3
80095c8: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80095ca: e077 b.n 80096bc <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
80095cc: 6839 ldr r1, [r7, #0]
80095ce: 6878 ldr r0, [r7, #4]
80095d0: f000 fa7a bl 8009ac8 <USBD_CtlError>
err++;
80095d4: 7afb ldrb r3, [r7, #11]
80095d6: 3301 adds r3, #1
80095d8: 72fb strb r3, [r7, #11]
break;
80095da: e06f b.n 80096bc <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
80095dc: 687b ldr r3, [r7, #4]
80095de: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80095e2: 68db ldr r3, [r3, #12]
80095e4: 2b00 cmp r3, #0
80095e6: d00b beq.n 8009600 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
80095e8: 687b ldr r3, [r7, #4]
80095ea: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80095ee: 68db ldr r3, [r3, #12]
80095f0: 687a ldr r2, [r7, #4]
80095f2: 7c12 ldrb r2, [r2, #16]
80095f4: f107 0108 add.w r1, r7, #8
80095f8: 4610 mov r0, r2
80095fa: 4798 blx r3
80095fc: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80095fe: e05d b.n 80096bc <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8009600: 6839 ldr r1, [r7, #0]
8009602: 6878 ldr r0, [r7, #4]
8009604: f000 fa60 bl 8009ac8 <USBD_CtlError>
err++;
8009608: 7afb ldrb r3, [r7, #11]
800960a: 3301 adds r3, #1
800960c: 72fb strb r3, [r7, #11]
break;
800960e: e055 b.n 80096bc <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
8009610: 687b ldr r3, [r7, #4]
8009612: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8009616: 691b ldr r3, [r3, #16]
8009618: 2b00 cmp r3, #0
800961a: d00b beq.n 8009634 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800961c: 687b ldr r3, [r7, #4]
800961e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8009622: 691b ldr r3, [r3, #16]
8009624: 687a ldr r2, [r7, #4]
8009626: 7c12 ldrb r2, [r2, #16]
8009628: f107 0108 add.w r1, r7, #8
800962c: 4610 mov r0, r2
800962e: 4798 blx r3
8009630: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8009632: e043 b.n 80096bc <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8009634: 6839 ldr r1, [r7, #0]
8009636: 6878 ldr r0, [r7, #4]
8009638: f000 fa46 bl 8009ac8 <USBD_CtlError>
err++;
800963c: 7afb ldrb r3, [r7, #11]
800963e: 3301 adds r3, #1
8009640: 72fb strb r3, [r7, #11]
break;
8009642: e03b b.n 80096bc <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
8009644: 687b ldr r3, [r7, #4]
8009646: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800964a: 695b ldr r3, [r3, #20]
800964c: 2b00 cmp r3, #0
800964e: d00b beq.n 8009668 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
8009650: 687b ldr r3, [r7, #4]
8009652: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8009656: 695b ldr r3, [r3, #20]
8009658: 687a ldr r2, [r7, #4]
800965a: 7c12 ldrb r2, [r2, #16]
800965c: f107 0108 add.w r1, r7, #8
8009660: 4610 mov r0, r2
8009662: 4798 blx r3
8009664: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8009666: e029 b.n 80096bc <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8009668: 6839 ldr r1, [r7, #0]
800966a: 6878 ldr r0, [r7, #4]
800966c: f000 fa2c bl 8009ac8 <USBD_CtlError>
err++;
8009670: 7afb ldrb r3, [r7, #11]
8009672: 3301 adds r3, #1
8009674: 72fb strb r3, [r7, #11]
break;
8009676: e021 b.n 80096bc <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
8009678: 687b ldr r3, [r7, #4]
800967a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800967e: 699b ldr r3, [r3, #24]
8009680: 2b00 cmp r3, #0
8009682: d00b beq.n 800969c <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
8009684: 687b ldr r3, [r7, #4]
8009686: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800968a: 699b ldr r3, [r3, #24]
800968c: 687a ldr r2, [r7, #4]
800968e: 7c12 ldrb r2, [r2, #16]
8009690: f107 0108 add.w r1, r7, #8
8009694: 4610 mov r0, r2
8009696: 4798 blx r3
8009698: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800969a: e00f b.n 80096bc <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800969c: 6839 ldr r1, [r7, #0]
800969e: 6878 ldr r0, [r7, #4]
80096a0: f000 fa12 bl 8009ac8 <USBD_CtlError>
err++;
80096a4: 7afb ldrb r3, [r7, #11]
80096a6: 3301 adds r3, #1
80096a8: 72fb strb r3, [r7, #11]
break;
80096aa: e007 b.n 80096bc <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
80096ac: 6839 ldr r1, [r7, #0]
80096ae: 6878 ldr r0, [r7, #4]
80096b0: f000 fa0a bl 8009ac8 <USBD_CtlError>
err++;
80096b4: 7afb ldrb r3, [r7, #11]
80096b6: 3301 adds r3, #1
80096b8: 72fb strb r3, [r7, #11]
#endif
}
break;
80096ba: e038 b.n 800972e <USBD_GetDescriptor+0x286>
80096bc: e037 b.n 800972e <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80096be: 687b ldr r3, [r7, #4]
80096c0: 7c1b ldrb r3, [r3, #16]
80096c2: 2b00 cmp r3, #0
80096c4: d109 bne.n 80096da <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
80096c6: 687b ldr r3, [r7, #4]
80096c8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80096cc: 6b5b ldr r3, [r3, #52] @ 0x34
80096ce: f107 0208 add.w r2, r7, #8
80096d2: 4610 mov r0, r2
80096d4: 4798 blx r3
80096d6: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80096d8: e029 b.n 800972e <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
80096da: 6839 ldr r1, [r7, #0]
80096dc: 6878 ldr r0, [r7, #4]
80096de: f000 f9f3 bl 8009ac8 <USBD_CtlError>
err++;
80096e2: 7afb ldrb r3, [r7, #11]
80096e4: 3301 adds r3, #1
80096e6: 72fb strb r3, [r7, #11]
break;
80096e8: e021 b.n 800972e <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80096ea: 687b ldr r3, [r7, #4]
80096ec: 7c1b ldrb r3, [r3, #16]
80096ee: 2b00 cmp r3, #0
80096f0: d10d bne.n 800970e <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
80096f2: 687b ldr r3, [r7, #4]
80096f4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80096f8: 6b1b ldr r3, [r3, #48] @ 0x30
80096fa: f107 0208 add.w r2, r7, #8
80096fe: 4610 mov r0, r2
8009700: 4798 blx r3
8009702: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
8009704: 68fb ldr r3, [r7, #12]
8009706: 3301 adds r3, #1
8009708: 2207 movs r2, #7
800970a: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800970c: e00f b.n 800972e <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800970e: 6839 ldr r1, [r7, #0]
8009710: 6878 ldr r0, [r7, #4]
8009712: f000 f9d9 bl 8009ac8 <USBD_CtlError>
err++;
8009716: 7afb ldrb r3, [r7, #11]
8009718: 3301 adds r3, #1
800971a: 72fb strb r3, [r7, #11]
break;
800971c: e007 b.n 800972e <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800971e: 6839 ldr r1, [r7, #0]
8009720: 6878 ldr r0, [r7, #4]
8009722: f000 f9d1 bl 8009ac8 <USBD_CtlError>
err++;
8009726: 7afb ldrb r3, [r7, #11]
8009728: 3301 adds r3, #1
800972a: 72fb strb r3, [r7, #11]
break;
800972c: bf00 nop
}
if (err != 0U)
800972e: 7afb ldrb r3, [r7, #11]
8009730: 2b00 cmp r3, #0
8009732: d11c bne.n 800976e <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
8009734: 893b ldrh r3, [r7, #8]
8009736: 2b00 cmp r3, #0
8009738: d011 beq.n 800975e <USBD_GetDescriptor+0x2b6>
800973a: 683b ldr r3, [r7, #0]
800973c: 88db ldrh r3, [r3, #6]
800973e: 2b00 cmp r3, #0
8009740: d00d beq.n 800975e <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
8009742: 683b ldr r3, [r7, #0]
8009744: 88da ldrh r2, [r3, #6]
8009746: 893b ldrh r3, [r7, #8]
8009748: 4293 cmp r3, r2
800974a: bf28 it cs
800974c: 4613 movcs r3, r2
800974e: b29b uxth r3, r3
8009750: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
8009752: 893b ldrh r3, [r7, #8]
8009754: 461a mov r2, r3
8009756: 68f9 ldr r1, [r7, #12]
8009758: 6878 ldr r0, [r7, #4]
800975a: f000 fa1f bl 8009b9c <USBD_CtlSendData>
}
if (req->wLength == 0U)
800975e: 683b ldr r3, [r7, #0]
8009760: 88db ldrh r3, [r3, #6]
8009762: 2b00 cmp r3, #0
8009764: d104 bne.n 8009770 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
8009766: 6878 ldr r0, [r7, #4]
8009768: f000 fa76 bl 8009c58 <USBD_CtlSendStatus>
800976c: e000 b.n 8009770 <USBD_GetDescriptor+0x2c8>
return;
800976e: bf00 nop
}
}
}
8009770: 3710 adds r7, #16
8009772: 46bd mov sp, r7
8009774: bd80 pop {r7, pc}
8009776: bf00 nop
08009778 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009778: b580 push {r7, lr}
800977a: b084 sub sp, #16
800977c: af00 add r7, sp, #0
800977e: 6078 str r0, [r7, #4]
8009780: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
8009782: 683b ldr r3, [r7, #0]
8009784: 889b ldrh r3, [r3, #4]
8009786: 2b00 cmp r3, #0
8009788: d130 bne.n 80097ec <USBD_SetAddress+0x74>
800978a: 683b ldr r3, [r7, #0]
800978c: 88db ldrh r3, [r3, #6]
800978e: 2b00 cmp r3, #0
8009790: d12c bne.n 80097ec <USBD_SetAddress+0x74>
8009792: 683b ldr r3, [r7, #0]
8009794: 885b ldrh r3, [r3, #2]
8009796: 2b7f cmp r3, #127 @ 0x7f
8009798: d828 bhi.n 80097ec <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800979a: 683b ldr r3, [r7, #0]
800979c: 885b ldrh r3, [r3, #2]
800979e: b2db uxtb r3, r3
80097a0: f003 037f and.w r3, r3, #127 @ 0x7f
80097a4: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80097a6: 687b ldr r3, [r7, #4]
80097a8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80097ac: 2b03 cmp r3, #3
80097ae: d104 bne.n 80097ba <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
80097b0: 6839 ldr r1, [r7, #0]
80097b2: 6878 ldr r0, [r7, #4]
80097b4: f000 f988 bl 8009ac8 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80097b8: e01d b.n 80097f6 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
80097ba: 687b ldr r3, [r7, #4]
80097bc: 7bfa ldrb r2, [r7, #15]
80097be: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
80097c2: 7bfb ldrb r3, [r7, #15]
80097c4: 4619 mov r1, r3
80097c6: 6878 ldr r0, [r7, #4]
80097c8: f000 fec1 bl 800a54e <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
80097cc: 6878 ldr r0, [r7, #4]
80097ce: f000 fa43 bl 8009c58 <USBD_CtlSendStatus>
if (dev_addr != 0U)
80097d2: 7bfb ldrb r3, [r7, #15]
80097d4: 2b00 cmp r3, #0
80097d6: d004 beq.n 80097e2 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
80097d8: 687b ldr r3, [r7, #4]
80097da: 2202 movs r2, #2
80097dc: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80097e0: e009 b.n 80097f6 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
80097e2: 687b ldr r3, [r7, #4]
80097e4: 2201 movs r2, #1
80097e6: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80097ea: e004 b.n 80097f6 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
80097ec: 6839 ldr r1, [r7, #0]
80097ee: 6878 ldr r0, [r7, #4]
80097f0: f000 f96a bl 8009ac8 <USBD_CtlError>
}
}
80097f4: bf00 nop
80097f6: bf00 nop
80097f8: 3710 adds r7, #16
80097fa: 46bd mov sp, r7
80097fc: bd80 pop {r7, pc}
...
08009800 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8009800: b580 push {r7, lr}
8009802: b082 sub sp, #8
8009804: af00 add r7, sp, #0
8009806: 6078 str r0, [r7, #4]
8009808: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800980a: 683b ldr r3, [r7, #0]
800980c: 885b ldrh r3, [r3, #2]
800980e: b2da uxtb r2, r3
8009810: 4b41 ldr r3, [pc, #260] @ (8009918 <USBD_SetConfig+0x118>)
8009812: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
8009814: 4b40 ldr r3, [pc, #256] @ (8009918 <USBD_SetConfig+0x118>)
8009816: 781b ldrb r3, [r3, #0]
8009818: 2b01 cmp r3, #1
800981a: d904 bls.n 8009826 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800981c: 6839 ldr r1, [r7, #0]
800981e: 6878 ldr r0, [r7, #4]
8009820: f000 f952 bl 8009ac8 <USBD_CtlError>
8009824: e075 b.n 8009912 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
8009826: 687b ldr r3, [r7, #4]
8009828: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800982c: 2b02 cmp r3, #2
800982e: d002 beq.n 8009836 <USBD_SetConfig+0x36>
8009830: 2b03 cmp r3, #3
8009832: d023 beq.n 800987c <USBD_SetConfig+0x7c>
8009834: e062 b.n 80098fc <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
8009836: 4b38 ldr r3, [pc, #224] @ (8009918 <USBD_SetConfig+0x118>)
8009838: 781b ldrb r3, [r3, #0]
800983a: 2b00 cmp r3, #0
800983c: d01a beq.n 8009874 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800983e: 4b36 ldr r3, [pc, #216] @ (8009918 <USBD_SetConfig+0x118>)
8009840: 781b ldrb r3, [r3, #0]
8009842: 461a mov r2, r3
8009844: 687b ldr r3, [r7, #4]
8009846: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
8009848: 687b ldr r3, [r7, #4]
800984a: 2203 movs r2, #3
800984c: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8009850: 4b31 ldr r3, [pc, #196] @ (8009918 <USBD_SetConfig+0x118>)
8009852: 781b ldrb r3, [r3, #0]
8009854: 4619 mov r1, r3
8009856: 6878 ldr r0, [r7, #4]
8009858: f7ff f9e7 bl 8008c2a <USBD_SetClassConfig>
800985c: 4603 mov r3, r0
800985e: 2b02 cmp r3, #2
8009860: d104 bne.n 800986c <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
8009862: 6839 ldr r1, [r7, #0]
8009864: 6878 ldr r0, [r7, #4]
8009866: f000 f92f bl 8009ac8 <USBD_CtlError>
return;
800986a: e052 b.n 8009912 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800986c: 6878 ldr r0, [r7, #4]
800986e: f000 f9f3 bl 8009c58 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8009872: e04e b.n 8009912 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8009874: 6878 ldr r0, [r7, #4]
8009876: f000 f9ef bl 8009c58 <USBD_CtlSendStatus>
break;
800987a: e04a b.n 8009912 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800987c: 4b26 ldr r3, [pc, #152] @ (8009918 <USBD_SetConfig+0x118>)
800987e: 781b ldrb r3, [r3, #0]
8009880: 2b00 cmp r3, #0
8009882: d112 bne.n 80098aa <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8009884: 687b ldr r3, [r7, #4]
8009886: 2202 movs r2, #2
8009888: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800988c: 4b22 ldr r3, [pc, #136] @ (8009918 <USBD_SetConfig+0x118>)
800988e: 781b ldrb r3, [r3, #0]
8009890: 461a mov r2, r3
8009892: 687b ldr r3, [r7, #4]
8009894: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
8009896: 4b20 ldr r3, [pc, #128] @ (8009918 <USBD_SetConfig+0x118>)
8009898: 781b ldrb r3, [r3, #0]
800989a: 4619 mov r1, r3
800989c: 6878 ldr r0, [r7, #4]
800989e: f7ff f9e3 bl 8008c68 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
80098a2: 6878 ldr r0, [r7, #4]
80098a4: f000 f9d8 bl 8009c58 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
80098a8: e033 b.n 8009912 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
80098aa: 4b1b ldr r3, [pc, #108] @ (8009918 <USBD_SetConfig+0x118>)
80098ac: 781b ldrb r3, [r3, #0]
80098ae: 461a mov r2, r3
80098b0: 687b ldr r3, [r7, #4]
80098b2: 685b ldr r3, [r3, #4]
80098b4: 429a cmp r2, r3
80098b6: d01d beq.n 80098f4 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
80098b8: 687b ldr r3, [r7, #4]
80098ba: 685b ldr r3, [r3, #4]
80098bc: b2db uxtb r3, r3
80098be: 4619 mov r1, r3
80098c0: 6878 ldr r0, [r7, #4]
80098c2: f7ff f9d1 bl 8008c68 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
80098c6: 4b14 ldr r3, [pc, #80] @ (8009918 <USBD_SetConfig+0x118>)
80098c8: 781b ldrb r3, [r3, #0]
80098ca: 461a mov r2, r3
80098cc: 687b ldr r3, [r7, #4]
80098ce: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
80098d0: 4b11 ldr r3, [pc, #68] @ (8009918 <USBD_SetConfig+0x118>)
80098d2: 781b ldrb r3, [r3, #0]
80098d4: 4619 mov r1, r3
80098d6: 6878 ldr r0, [r7, #4]
80098d8: f7ff f9a7 bl 8008c2a <USBD_SetClassConfig>
80098dc: 4603 mov r3, r0
80098de: 2b02 cmp r3, #2
80098e0: d104 bne.n 80098ec <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
80098e2: 6839 ldr r1, [r7, #0]
80098e4: 6878 ldr r0, [r7, #4]
80098e6: f000 f8ef bl 8009ac8 <USBD_CtlError>
return;
80098ea: e012 b.n 8009912 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80098ec: 6878 ldr r0, [r7, #4]
80098ee: f000 f9b3 bl 8009c58 <USBD_CtlSendStatus>
break;
80098f2: e00e b.n 8009912 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80098f4: 6878 ldr r0, [r7, #4]
80098f6: f000 f9af bl 8009c58 <USBD_CtlSendStatus>
break;
80098fa: e00a b.n 8009912 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
80098fc: 6839 ldr r1, [r7, #0]
80098fe: 6878 ldr r0, [r7, #4]
8009900: f000 f8e2 bl 8009ac8 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
8009904: 4b04 ldr r3, [pc, #16] @ (8009918 <USBD_SetConfig+0x118>)
8009906: 781b ldrb r3, [r3, #0]
8009908: 4619 mov r1, r3
800990a: 6878 ldr r0, [r7, #4]
800990c: f7ff f9ac bl 8008c68 <USBD_ClrClassConfig>
break;
8009910: bf00 nop
}
}
}
8009912: 3708 adds r7, #8
8009914: 46bd mov sp, r7
8009916: bd80 pop {r7, pc}
8009918: 200003d0 .word 0x200003d0
0800991c <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800991c: b580 push {r7, lr}
800991e: b082 sub sp, #8
8009920: af00 add r7, sp, #0
8009922: 6078 str r0, [r7, #4]
8009924: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
8009926: 683b ldr r3, [r7, #0]
8009928: 88db ldrh r3, [r3, #6]
800992a: 2b01 cmp r3, #1
800992c: d004 beq.n 8009938 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800992e: 6839 ldr r1, [r7, #0]
8009930: 6878 ldr r0, [r7, #4]
8009932: f000 f8c9 bl 8009ac8 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
8009936: e022 b.n 800997e <USBD_GetConfig+0x62>
switch (pdev->dev_state)
8009938: 687b ldr r3, [r7, #4]
800993a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800993e: 2b02 cmp r3, #2
8009940: dc02 bgt.n 8009948 <USBD_GetConfig+0x2c>
8009942: 2b00 cmp r3, #0
8009944: dc03 bgt.n 800994e <USBD_GetConfig+0x32>
8009946: e015 b.n 8009974 <USBD_GetConfig+0x58>
8009948: 2b03 cmp r3, #3
800994a: d00b beq.n 8009964 <USBD_GetConfig+0x48>
800994c: e012 b.n 8009974 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800994e: 687b ldr r3, [r7, #4]
8009950: 2200 movs r2, #0
8009952: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
8009954: 687b ldr r3, [r7, #4]
8009956: 3308 adds r3, #8
8009958: 2201 movs r2, #1
800995a: 4619 mov r1, r3
800995c: 6878 ldr r0, [r7, #4]
800995e: f000 f91d bl 8009b9c <USBD_CtlSendData>
break;
8009962: e00c b.n 800997e <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
8009964: 687b ldr r3, [r7, #4]
8009966: 3304 adds r3, #4
8009968: 2201 movs r2, #1
800996a: 4619 mov r1, r3
800996c: 6878 ldr r0, [r7, #4]
800996e: f000 f915 bl 8009b9c <USBD_CtlSendData>
break;
8009972: e004 b.n 800997e <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
8009974: 6839 ldr r1, [r7, #0]
8009976: 6878 ldr r0, [r7, #4]
8009978: f000 f8a6 bl 8009ac8 <USBD_CtlError>
break;
800997c: bf00 nop
}
800997e: bf00 nop
8009980: 3708 adds r7, #8
8009982: 46bd mov sp, r7
8009984: bd80 pop {r7, pc}
08009986 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8009986: b580 push {r7, lr}
8009988: b082 sub sp, #8
800998a: af00 add r7, sp, #0
800998c: 6078 str r0, [r7, #4]
800998e: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8009990: 687b ldr r3, [r7, #4]
8009992: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009996: 3b01 subs r3, #1
8009998: 2b02 cmp r3, #2
800999a: d81e bhi.n 80099da <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800999c: 683b ldr r3, [r7, #0]
800999e: 88db ldrh r3, [r3, #6]
80099a0: 2b02 cmp r3, #2
80099a2: d004 beq.n 80099ae <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
80099a4: 6839 ldr r1, [r7, #0]
80099a6: 6878 ldr r0, [r7, #4]
80099a8: f000 f88e bl 8009ac8 <USBD_CtlError>
break;
80099ac: e01a b.n 80099e4 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
80099ae: 687b ldr r3, [r7, #4]
80099b0: 2201 movs r2, #1
80099b2: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
80099b4: 687b ldr r3, [r7, #4]
80099b6: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
80099ba: 2b00 cmp r3, #0
80099bc: d005 beq.n 80099ca <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
80099be: 687b ldr r3, [r7, #4]
80099c0: 68db ldr r3, [r3, #12]
80099c2: f043 0202 orr.w r2, r3, #2
80099c6: 687b ldr r3, [r7, #4]
80099c8: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
80099ca: 687b ldr r3, [r7, #4]
80099cc: 330c adds r3, #12
80099ce: 2202 movs r2, #2
80099d0: 4619 mov r1, r3
80099d2: 6878 ldr r0, [r7, #4]
80099d4: f000 f8e2 bl 8009b9c <USBD_CtlSendData>
break;
80099d8: e004 b.n 80099e4 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
80099da: 6839 ldr r1, [r7, #0]
80099dc: 6878 ldr r0, [r7, #4]
80099de: f000 f873 bl 8009ac8 <USBD_CtlError>
break;
80099e2: bf00 nop
}
}
80099e4: bf00 nop
80099e6: 3708 adds r7, #8
80099e8: 46bd mov sp, r7
80099ea: bd80 pop {r7, pc}
080099ec <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80099ec: b580 push {r7, lr}
80099ee: b082 sub sp, #8
80099f0: af00 add r7, sp, #0
80099f2: 6078 str r0, [r7, #4]
80099f4: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
80099f6: 683b ldr r3, [r7, #0]
80099f8: 885b ldrh r3, [r3, #2]
80099fa: 2b01 cmp r3, #1
80099fc: d106 bne.n 8009a0c <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
80099fe: 687b ldr r3, [r7, #4]
8009a00: 2201 movs r2, #1
8009a02: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
8009a06: 6878 ldr r0, [r7, #4]
8009a08: f000 f926 bl 8009c58 <USBD_CtlSendStatus>
}
}
8009a0c: bf00 nop
8009a0e: 3708 adds r7, #8
8009a10: 46bd mov sp, r7
8009a12: bd80 pop {r7, pc}
08009a14 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009a14: b580 push {r7, lr}
8009a16: b082 sub sp, #8
8009a18: af00 add r7, sp, #0
8009a1a: 6078 str r0, [r7, #4]
8009a1c: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8009a1e: 687b ldr r3, [r7, #4]
8009a20: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009a24: 3b01 subs r3, #1
8009a26: 2b02 cmp r3, #2
8009a28: d80b bhi.n 8009a42 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
8009a2a: 683b ldr r3, [r7, #0]
8009a2c: 885b ldrh r3, [r3, #2]
8009a2e: 2b01 cmp r3, #1
8009a30: d10c bne.n 8009a4c <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
8009a32: 687b ldr r3, [r7, #4]
8009a34: 2200 movs r2, #0
8009a36: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
8009a3a: 6878 ldr r0, [r7, #4]
8009a3c: f000 f90c bl 8009c58 <USBD_CtlSendStatus>
}
break;
8009a40: e004 b.n 8009a4c <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
8009a42: 6839 ldr r1, [r7, #0]
8009a44: 6878 ldr r0, [r7, #4]
8009a46: f000 f83f bl 8009ac8 <USBD_CtlError>
break;
8009a4a: e000 b.n 8009a4e <USBD_ClrFeature+0x3a>
break;
8009a4c: bf00 nop
}
}
8009a4e: bf00 nop
8009a50: 3708 adds r7, #8
8009a52: 46bd mov sp, r7
8009a54: bd80 pop {r7, pc}
08009a56 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
8009a56: b480 push {r7}
8009a58: b083 sub sp, #12
8009a5a: af00 add r7, sp, #0
8009a5c: 6078 str r0, [r7, #4]
8009a5e: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
8009a60: 683b ldr r3, [r7, #0]
8009a62: 781a ldrb r2, [r3, #0]
8009a64: 687b ldr r3, [r7, #4]
8009a66: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
8009a68: 683b ldr r3, [r7, #0]
8009a6a: 785a ldrb r2, [r3, #1]
8009a6c: 687b ldr r3, [r7, #4]
8009a6e: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
8009a70: 683b ldr r3, [r7, #0]
8009a72: 3302 adds r3, #2
8009a74: 781b ldrb r3, [r3, #0]
8009a76: 461a mov r2, r3
8009a78: 683b ldr r3, [r7, #0]
8009a7a: 3303 adds r3, #3
8009a7c: 781b ldrb r3, [r3, #0]
8009a7e: 021b lsls r3, r3, #8
8009a80: b29b uxth r3, r3
8009a82: 4413 add r3, r2
8009a84: b29a uxth r2, r3
8009a86: 687b ldr r3, [r7, #4]
8009a88: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
8009a8a: 683b ldr r3, [r7, #0]
8009a8c: 3304 adds r3, #4
8009a8e: 781b ldrb r3, [r3, #0]
8009a90: 461a mov r2, r3
8009a92: 683b ldr r3, [r7, #0]
8009a94: 3305 adds r3, #5
8009a96: 781b ldrb r3, [r3, #0]
8009a98: 021b lsls r3, r3, #8
8009a9a: b29b uxth r3, r3
8009a9c: 4413 add r3, r2
8009a9e: b29a uxth r2, r3
8009aa0: 687b ldr r3, [r7, #4]
8009aa2: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
8009aa4: 683b ldr r3, [r7, #0]
8009aa6: 3306 adds r3, #6
8009aa8: 781b ldrb r3, [r3, #0]
8009aaa: 461a mov r2, r3
8009aac: 683b ldr r3, [r7, #0]
8009aae: 3307 adds r3, #7
8009ab0: 781b ldrb r3, [r3, #0]
8009ab2: 021b lsls r3, r3, #8
8009ab4: b29b uxth r3, r3
8009ab6: 4413 add r3, r2
8009ab8: b29a uxth r2, r3
8009aba: 687b ldr r3, [r7, #4]
8009abc: 80da strh r2, [r3, #6]
}
8009abe: bf00 nop
8009ac0: 370c adds r7, #12
8009ac2: 46bd mov sp, r7
8009ac4: bc80 pop {r7}
8009ac6: 4770 bx lr
08009ac8 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009ac8: b580 push {r7, lr}
8009aca: b082 sub sp, #8
8009acc: af00 add r7, sp, #0
8009ace: 6078 str r0, [r7, #4]
8009ad0: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
8009ad2: 2180 movs r1, #128 @ 0x80
8009ad4: 6878 ldr r0, [r7, #4]
8009ad6: f000 fcd1 bl 800a47c <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
8009ada: 2100 movs r1, #0
8009adc: 6878 ldr r0, [r7, #4]
8009ade: f000 fccd bl 800a47c <USBD_LL_StallEP>
}
8009ae2: bf00 nop
8009ae4: 3708 adds r7, #8
8009ae6: 46bd mov sp, r7
8009ae8: bd80 pop {r7, pc}
08009aea <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
8009aea: b580 push {r7, lr}
8009aec: b086 sub sp, #24
8009aee: af00 add r7, sp, #0
8009af0: 60f8 str r0, [r7, #12]
8009af2: 60b9 str r1, [r7, #8]
8009af4: 607a str r2, [r7, #4]
uint8_t idx = 0U;
8009af6: 2300 movs r3, #0
8009af8: 75fb strb r3, [r7, #23]
if (desc != NULL)
8009afa: 68fb ldr r3, [r7, #12]
8009afc: 2b00 cmp r3, #0
8009afe: d032 beq.n 8009b66 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
8009b00: 68f8 ldr r0, [r7, #12]
8009b02: f000 f834 bl 8009b6e <USBD_GetLen>
8009b06: 4603 mov r3, r0
8009b08: 3301 adds r3, #1
8009b0a: b29b uxth r3, r3
8009b0c: 005b lsls r3, r3, #1
8009b0e: b29a uxth r2, r3
8009b10: 687b ldr r3, [r7, #4]
8009b12: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
8009b14: 7dfb ldrb r3, [r7, #23]
8009b16: 1c5a adds r2, r3, #1
8009b18: 75fa strb r2, [r7, #23]
8009b1a: 461a mov r2, r3
8009b1c: 68bb ldr r3, [r7, #8]
8009b1e: 4413 add r3, r2
8009b20: 687a ldr r2, [r7, #4]
8009b22: 7812 ldrb r2, [r2, #0]
8009b24: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
8009b26: 7dfb ldrb r3, [r7, #23]
8009b28: 1c5a adds r2, r3, #1
8009b2a: 75fa strb r2, [r7, #23]
8009b2c: 461a mov r2, r3
8009b2e: 68bb ldr r3, [r7, #8]
8009b30: 4413 add r3, r2
8009b32: 2203 movs r2, #3
8009b34: 701a strb r2, [r3, #0]
while (*desc != '\0')
8009b36: e012 b.n 8009b5e <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
8009b38: 68fb ldr r3, [r7, #12]
8009b3a: 1c5a adds r2, r3, #1
8009b3c: 60fa str r2, [r7, #12]
8009b3e: 7dfa ldrb r2, [r7, #23]
8009b40: 1c51 adds r1, r2, #1
8009b42: 75f9 strb r1, [r7, #23]
8009b44: 4611 mov r1, r2
8009b46: 68ba ldr r2, [r7, #8]
8009b48: 440a add r2, r1
8009b4a: 781b ldrb r3, [r3, #0]
8009b4c: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
8009b4e: 7dfb ldrb r3, [r7, #23]
8009b50: 1c5a adds r2, r3, #1
8009b52: 75fa strb r2, [r7, #23]
8009b54: 461a mov r2, r3
8009b56: 68bb ldr r3, [r7, #8]
8009b58: 4413 add r3, r2
8009b5a: 2200 movs r2, #0
8009b5c: 701a strb r2, [r3, #0]
while (*desc != '\0')
8009b5e: 68fb ldr r3, [r7, #12]
8009b60: 781b ldrb r3, [r3, #0]
8009b62: 2b00 cmp r3, #0
8009b64: d1e8 bne.n 8009b38 <USBD_GetString+0x4e>
}
}
}
8009b66: bf00 nop
8009b68: 3718 adds r7, #24
8009b6a: 46bd mov sp, r7
8009b6c: bd80 pop {r7, pc}
08009b6e <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
8009b6e: b480 push {r7}
8009b70: b085 sub sp, #20
8009b72: af00 add r7, sp, #0
8009b74: 6078 str r0, [r7, #4]
uint8_t len = 0U;
8009b76: 2300 movs r3, #0
8009b78: 73fb strb r3, [r7, #15]
while (*buf != '\0')
8009b7a: e005 b.n 8009b88 <USBD_GetLen+0x1a>
{
len++;
8009b7c: 7bfb ldrb r3, [r7, #15]
8009b7e: 3301 adds r3, #1
8009b80: 73fb strb r3, [r7, #15]
buf++;
8009b82: 687b ldr r3, [r7, #4]
8009b84: 3301 adds r3, #1
8009b86: 607b str r3, [r7, #4]
while (*buf != '\0')
8009b88: 687b ldr r3, [r7, #4]
8009b8a: 781b ldrb r3, [r3, #0]
8009b8c: 2b00 cmp r3, #0
8009b8e: d1f5 bne.n 8009b7c <USBD_GetLen+0xe>
}
return len;
8009b90: 7bfb ldrb r3, [r7, #15]
}
8009b92: 4618 mov r0, r3
8009b94: 3714 adds r7, #20
8009b96: 46bd mov sp, r7
8009b98: bc80 pop {r7}
8009b9a: 4770 bx lr
08009b9c <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009b9c: b580 push {r7, lr}
8009b9e: b084 sub sp, #16
8009ba0: af00 add r7, sp, #0
8009ba2: 60f8 str r0, [r7, #12]
8009ba4: 60b9 str r1, [r7, #8]
8009ba6: 4613 mov r3, r2
8009ba8: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
8009baa: 68fb ldr r3, [r7, #12]
8009bac: 2202 movs r2, #2
8009bae: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
8009bb2: 88fa ldrh r2, [r7, #6]
8009bb4: 68fb ldr r3, [r7, #12]
8009bb6: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
8009bb8: 88fa ldrh r2, [r7, #6]
8009bba: 68fb ldr r3, [r7, #12]
8009bbc: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8009bbe: 88fb ldrh r3, [r7, #6]
8009bc0: 68ba ldr r2, [r7, #8]
8009bc2: 2100 movs r1, #0
8009bc4: 68f8 ldr r0, [r7, #12]
8009bc6: f000 fce1 bl 800a58c <USBD_LL_Transmit>
return USBD_OK;
8009bca: 2300 movs r3, #0
}
8009bcc: 4618 mov r0, r3
8009bce: 3710 adds r7, #16
8009bd0: 46bd mov sp, r7
8009bd2: bd80 pop {r7, pc}
08009bd4 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009bd4: b580 push {r7, lr}
8009bd6: b084 sub sp, #16
8009bd8: af00 add r7, sp, #0
8009bda: 60f8 str r0, [r7, #12]
8009bdc: 60b9 str r1, [r7, #8]
8009bde: 4613 mov r3, r2
8009be0: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8009be2: 88fb ldrh r3, [r7, #6]
8009be4: 68ba ldr r2, [r7, #8]
8009be6: 2100 movs r1, #0
8009be8: 68f8 ldr r0, [r7, #12]
8009bea: f000 fccf bl 800a58c <USBD_LL_Transmit>
return USBD_OK;
8009bee: 2300 movs r3, #0
}
8009bf0: 4618 mov r0, r3
8009bf2: 3710 adds r7, #16
8009bf4: 46bd mov sp, r7
8009bf6: bd80 pop {r7, pc}
08009bf8 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009bf8: b580 push {r7, lr}
8009bfa: b084 sub sp, #16
8009bfc: af00 add r7, sp, #0
8009bfe: 60f8 str r0, [r7, #12]
8009c00: 60b9 str r1, [r7, #8]
8009c02: 4613 mov r3, r2
8009c04: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
8009c06: 68fb ldr r3, [r7, #12]
8009c08: 2203 movs r2, #3
8009c0a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
8009c0e: 88fa ldrh r2, [r7, #6]
8009c10: 68fb ldr r3, [r7, #12]
8009c12: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
8009c16: 88fa ldrh r2, [r7, #6]
8009c18: 68fb ldr r3, [r7, #12]
8009c1a: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8009c1e: 88fb ldrh r3, [r7, #6]
8009c20: 68ba ldr r2, [r7, #8]
8009c22: 2100 movs r1, #0
8009c24: 68f8 ldr r0, [r7, #12]
8009c26: f000 fcd4 bl 800a5d2 <USBD_LL_PrepareReceive>
return USBD_OK;
8009c2a: 2300 movs r3, #0
}
8009c2c: 4618 mov r0, r3
8009c2e: 3710 adds r7, #16
8009c30: 46bd mov sp, r7
8009c32: bd80 pop {r7, pc}
08009c34 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009c34: b580 push {r7, lr}
8009c36: b084 sub sp, #16
8009c38: af00 add r7, sp, #0
8009c3a: 60f8 str r0, [r7, #12]
8009c3c: 60b9 str r1, [r7, #8]
8009c3e: 4613 mov r3, r2
8009c40: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8009c42: 88fb ldrh r3, [r7, #6]
8009c44: 68ba ldr r2, [r7, #8]
8009c46: 2100 movs r1, #0
8009c48: 68f8 ldr r0, [r7, #12]
8009c4a: f000 fcc2 bl 800a5d2 <USBD_LL_PrepareReceive>
return USBD_OK;
8009c4e: 2300 movs r3, #0
}
8009c50: 4618 mov r0, r3
8009c52: 3710 adds r7, #16
8009c54: 46bd mov sp, r7
8009c56: bd80 pop {r7, pc}
08009c58 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
8009c58: b580 push {r7, lr}
8009c5a: b082 sub sp, #8
8009c5c: af00 add r7, sp, #0
8009c5e: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
8009c60: 687b ldr r3, [r7, #4]
8009c62: 2204 movs r2, #4
8009c64: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
8009c68: 2300 movs r3, #0
8009c6a: 2200 movs r2, #0
8009c6c: 2100 movs r1, #0
8009c6e: 6878 ldr r0, [r7, #4]
8009c70: f000 fc8c bl 800a58c <USBD_LL_Transmit>
return USBD_OK;
8009c74: 2300 movs r3, #0
}
8009c76: 4618 mov r0, r3
8009c78: 3708 adds r7, #8
8009c7a: 46bd mov sp, r7
8009c7c: bd80 pop {r7, pc}
08009c7e <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
8009c7e: b580 push {r7, lr}
8009c80: b082 sub sp, #8
8009c82: af00 add r7, sp, #0
8009c84: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
8009c86: 687b ldr r3, [r7, #4]
8009c88: 2205 movs r2, #5
8009c8a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8009c8e: 2300 movs r3, #0
8009c90: 2200 movs r2, #0
8009c92: 2100 movs r1, #0
8009c94: 6878 ldr r0, [r7, #4]
8009c96: f000 fc9c bl 800a5d2 <USBD_LL_PrepareReceive>
return USBD_OK;
8009c9a: 2300 movs r3, #0
}
8009c9c: 4618 mov r0, r3
8009c9e: 3708 adds r7, #8
8009ca0: 46bd mov sp, r7
8009ca2: bd80 pop {r7, pc}
08009ca4 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
8009ca4: b580 push {r7, lr}
8009ca6: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
8009ca8: 2200 movs r2, #0
8009caa: 4912 ldr r1, [pc, #72] @ (8009cf4 <MX_USB_DEVICE_Init+0x50>)
8009cac: 4812 ldr r0, [pc, #72] @ (8009cf8 <MX_USB_DEVICE_Init+0x54>)
8009cae: f7fe ff62 bl 8008b76 <USBD_Init>
8009cb2: 4603 mov r3, r0
8009cb4: 2b00 cmp r3, #0
8009cb6: d001 beq.n 8009cbc <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
8009cb8: f7f7 fc64 bl 8001584 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
8009cbc: 490f ldr r1, [pc, #60] @ (8009cfc <MX_USB_DEVICE_Init+0x58>)
8009cbe: 480e ldr r0, [pc, #56] @ (8009cf8 <MX_USB_DEVICE_Init+0x54>)
8009cc0: f7fe ff84 bl 8008bcc <USBD_RegisterClass>
8009cc4: 4603 mov r3, r0
8009cc6: 2b00 cmp r3, #0
8009cc8: d001 beq.n 8009cce <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
8009cca: f7f7 fc5b bl 8001584 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
8009cce: 490c ldr r1, [pc, #48] @ (8009d00 <MX_USB_DEVICE_Init+0x5c>)
8009cd0: 4809 ldr r0, [pc, #36] @ (8009cf8 <MX_USB_DEVICE_Init+0x54>)
8009cd2: f7fe feb5 bl 8008a40 <USBD_CDC_RegisterInterface>
8009cd6: 4603 mov r3, r0
8009cd8: 2b00 cmp r3, #0
8009cda: d001 beq.n 8009ce0 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
8009cdc: f7f7 fc52 bl 8001584 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
8009ce0: 4805 ldr r0, [pc, #20] @ (8009cf8 <MX_USB_DEVICE_Init+0x54>)
8009ce2: f7fe ff8c bl 8008bfe <USBD_Start>
8009ce6: 4603 mov r3, r0
8009ce8: 2b00 cmp r3, #0
8009cea: d001 beq.n 8009cf0 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
8009cec: f7f7 fc4a bl 8001584 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
8009cf0: bf00 nop
8009cf2: bd80 pop {r7, pc}
8009cf4: 20000130 .word 0x20000130
8009cf8: 200003d4 .word 0x200003d4
8009cfc: 2000001c .word 0x2000001c
8009d00: 20000120 .word 0x20000120
08009d04 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
8009d04: b480 push {r7}
8009d06: b085 sub sp, #20
8009d08: af00 add r7, sp, #0
8009d0a: 6078 str r0, [r7, #4]
8009d0c: 6039 str r1, [r7, #0]
while (len--) {
8009d0e: e01e b.n 8009d4e <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
8009d10: 4b14 ldr r3, [pc, #80] @ (8009d64 <fifo_push+0x60>)
8009d12: 881b ldrh r3, [r3, #0]
8009d14: b29b uxth r3, r3
8009d16: 3301 adds r3, #1
8009d18: b29b uxth r3, r3
8009d1a: b2db uxtb r3, r3
8009d1c: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
8009d1e: 89fa ldrh r2, [r7, #14]
8009d20: 4b11 ldr r3, [pc, #68] @ (8009d68 <fifo_push+0x64>)
8009d22: 881b ldrh r3, [r3, #0]
8009d24: b29b uxth r3, r3
8009d26: b2db uxtb r3, r3
8009d28: 429a cmp r2, r3
8009d2a: d103 bne.n 8009d34 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
8009d2c: 687b ldr r3, [r7, #4]
8009d2e: 3301 adds r3, #1
8009d30: 607b str r3, [r7, #4]
continue;
8009d32: e00c b.n 8009d4e <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
8009d34: 687b ldr r3, [r7, #4]
8009d36: 1c5a adds r2, r3, #1
8009d38: 607a str r2, [r7, #4]
8009d3a: 4a0a ldr r2, [pc, #40] @ (8009d64 <fifo_push+0x60>)
8009d3c: 8812 ldrh r2, [r2, #0]
8009d3e: b292 uxth r2, r2
8009d40: b2d2 uxtb r2, r2
8009d42: 7819 ldrb r1, [r3, #0]
8009d44: 4b09 ldr r3, [pc, #36] @ (8009d6c <fifo_push+0x68>)
8009d46: 5499 strb r1, [r3, r2]
rx_head = next;
8009d48: 4a06 ldr r2, [pc, #24] @ (8009d64 <fifo_push+0x60>)
8009d4a: 89fb ldrh r3, [r7, #14]
8009d4c: 8013 strh r3, [r2, #0]
while (len--) {
8009d4e: 683b ldr r3, [r7, #0]
8009d50: 1e5a subs r2, r3, #1
8009d52: 603a str r2, [r7, #0]
8009d54: 2b00 cmp r3, #0
8009d56: d1db bne.n 8009d10 <fifo_push+0xc>
}
}
8009d58: bf00 nop
8009d5a: bf00 nop
8009d5c: 3714 adds r7, #20
8009d5e: 46bd mov sp, r7
8009d60: bc80 pop {r7}
8009d62: 4770 bx lr
8009d64: 20000f98 .word 0x20000f98
8009d68: 20000f9a .word 0x20000f9a
8009d6c: 20000e98 .word 0x20000e98
08009d70 <CDC_Available>:
uint32_t CDC_Available(void) {
8009d70: b480 push {r7}
8009d72: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
8009d74: 4b06 ldr r3, [pc, #24] @ (8009d90 <CDC_Available+0x20>)
8009d76: 881b ldrh r3, [r3, #0]
8009d78: b29a uxth r2, r3
8009d7a: 4b06 ldr r3, [pc, #24] @ (8009d94 <CDC_Available+0x24>)
8009d7c: 881b ldrh r3, [r3, #0]
8009d7e: b29b uxth r3, r3
8009d80: 1ad3 subs r3, r2, r3
8009d82: b29b uxth r3, r3
8009d84: b2db uxtb r3, r3
}
8009d86: 4618 mov r0, r3
8009d88: 46bd mov sp, r7
8009d8a: bc80 pop {r7}
8009d8c: 4770 bx lr
8009d8e: bf00 nop
8009d90: 20000f98 .word 0x20000f98
8009d94: 20000f9a .word 0x20000f9a
08009d98 <CDC_ReadByte>:
int CDC_ReadByte(void) {
8009d98: b480 push {r7}
8009d9a: b083 sub sp, #12
8009d9c: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
8009d9e: 4b10 ldr r3, [pc, #64] @ (8009de0 <CDC_ReadByte+0x48>)
8009da0: 881b ldrh r3, [r3, #0]
8009da2: b29a uxth r2, r3
8009da4: 4b0f ldr r3, [pc, #60] @ (8009de4 <CDC_ReadByte+0x4c>)
8009da6: 881b ldrh r3, [r3, #0]
8009da8: b29b uxth r3, r3
8009daa: 429a cmp r2, r3
8009dac: d102 bne.n 8009db4 <CDC_ReadByte+0x1c>
8009dae: f04f 33ff mov.w r3, #4294967295
8009db2: e010 b.n 8009dd6 <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
8009db4: 4b0a ldr r3, [pc, #40] @ (8009de0 <CDC_ReadByte+0x48>)
8009db6: 881b ldrh r3, [r3, #0]
8009db8: b29b uxth r3, r3
8009dba: b2db uxtb r3, r3
8009dbc: 4a0a ldr r2, [pc, #40] @ (8009de8 <CDC_ReadByte+0x50>)
8009dbe: 5cd3 ldrb r3, [r2, r3]
8009dc0: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
8009dc2: 4b07 ldr r3, [pc, #28] @ (8009de0 <CDC_ReadByte+0x48>)
8009dc4: 881b ldrh r3, [r3, #0]
8009dc6: b29b uxth r3, r3
8009dc8: 3301 adds r3, #1
8009dca: b29b uxth r3, r3
8009dcc: b2db uxtb r3, r3
8009dce: b29a uxth r2, r3
8009dd0: 4b03 ldr r3, [pc, #12] @ (8009de0 <CDC_ReadByte+0x48>)
8009dd2: 801a strh r2, [r3, #0]
return b;
8009dd4: 687b ldr r3, [r7, #4]
}
8009dd6: 4618 mov r0, r3
8009dd8: 370c adds r7, #12
8009dda: 46bd mov sp, r7
8009ddc: bc80 pop {r7}
8009dde: 4770 bx lr
8009de0: 20000f9a .word 0x20000f9a
8009de4: 20000f98 .word 0x20000f98
8009de8: 20000e98 .word 0x20000e98
08009dec <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
8009dec: b580 push {r7, lr}
8009dee: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
8009df0: 2200 movs r2, #0
8009df2: 4905 ldr r1, [pc, #20] @ (8009e08 <CDC_Init_FS+0x1c>)
8009df4: 4805 ldr r0, [pc, #20] @ (8009e0c <CDC_Init_FS+0x20>)
8009df6: f7fe fe39 bl 8008a6c <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
8009dfa: 4905 ldr r1, [pc, #20] @ (8009e10 <CDC_Init_FS+0x24>)
8009dfc: 4803 ldr r0, [pc, #12] @ (8009e0c <CDC_Init_FS+0x20>)
8009dfe: f7fe fe4e bl 8008a9e <USBD_CDC_SetRxBuffer>
return (USBD_OK);
8009e02: 2300 movs r3, #0
/* USER CODE END 3 */
}
8009e04: 4618 mov r0, r3
8009e06: bd80 pop {r7, pc}
8009e08: 20000a98 .word 0x20000a98
8009e0c: 200003d4 .word 0x200003d4
8009e10: 20000698 .word 0x20000698
08009e14 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
8009e14: b480 push {r7}
8009e16: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
8009e18: 2300 movs r3, #0
/* USER CODE END 4 */
}
8009e1a: 4618 mov r0, r3
8009e1c: 46bd mov sp, r7
8009e1e: bc80 pop {r7}
8009e20: 4770 bx lr
...
08009e24 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
8009e24: b480 push {r7}
8009e26: b083 sub sp, #12
8009e28: af00 add r7, sp, #0
8009e2a: 4603 mov r3, r0
8009e2c: 6039 str r1, [r7, #0]
8009e2e: 71fb strb r3, [r7, #7]
8009e30: 4613 mov r3, r2
8009e32: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
8009e34: 79fb ldrb r3, [r7, #7]
8009e36: 2b23 cmp r3, #35 @ 0x23
8009e38: d84a bhi.n 8009ed0 <CDC_Control_FS+0xac>
8009e3a: a201 add r2, pc, #4 @ (adr r2, 8009e40 <CDC_Control_FS+0x1c>)
8009e3c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009e40: 08009ed1 .word 0x08009ed1
8009e44: 08009ed1 .word 0x08009ed1
8009e48: 08009ed1 .word 0x08009ed1
8009e4c: 08009ed1 .word 0x08009ed1
8009e50: 08009ed1 .word 0x08009ed1
8009e54: 08009ed1 .word 0x08009ed1
8009e58: 08009ed1 .word 0x08009ed1
8009e5c: 08009ed1 .word 0x08009ed1
8009e60: 08009ed1 .word 0x08009ed1
8009e64: 08009ed1 .word 0x08009ed1
8009e68: 08009ed1 .word 0x08009ed1
8009e6c: 08009ed1 .word 0x08009ed1
8009e70: 08009ed1 .word 0x08009ed1
8009e74: 08009ed1 .word 0x08009ed1
8009e78: 08009ed1 .word 0x08009ed1
8009e7c: 08009ed1 .word 0x08009ed1
8009e80: 08009ed1 .word 0x08009ed1
8009e84: 08009ed1 .word 0x08009ed1
8009e88: 08009ed1 .word 0x08009ed1
8009e8c: 08009ed1 .word 0x08009ed1
8009e90: 08009ed1 .word 0x08009ed1
8009e94: 08009ed1 .word 0x08009ed1
8009e98: 08009ed1 .word 0x08009ed1
8009e9c: 08009ed1 .word 0x08009ed1
8009ea0: 08009ed1 .word 0x08009ed1
8009ea4: 08009ed1 .word 0x08009ed1
8009ea8: 08009ed1 .word 0x08009ed1
8009eac: 08009ed1 .word 0x08009ed1
8009eb0: 08009ed1 .word 0x08009ed1
8009eb4: 08009ed1 .word 0x08009ed1
8009eb8: 08009ed1 .word 0x08009ed1
8009ebc: 08009ed1 .word 0x08009ed1
8009ec0: 08009ed1 .word 0x08009ed1
8009ec4: 08009ed1 .word 0x08009ed1
8009ec8: 08009ed1 .word 0x08009ed1
8009ecc: 08009ed1 .word 0x08009ed1
case CDC_SEND_BREAK:
break;
default:
break;
8009ed0: bf00 nop
}
return (USBD_OK);
8009ed2: 2300 movs r3, #0
/* USER CODE END 5 */
}
8009ed4: 4618 mov r0, r3
8009ed6: 370c adds r7, #12
8009ed8: 46bd mov sp, r7
8009eda: bc80 pop {r7}
8009edc: 4770 bx lr
8009ede: bf00 nop
08009ee0 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
8009ee0: b580 push {r7, lr}
8009ee2: b082 sub sp, #8
8009ee4: af00 add r7, sp, #0
8009ee6: 6078 str r0, [r7, #4]
8009ee8: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
8009eea: 683b ldr r3, [r7, #0]
8009eec: 681b ldr r3, [r3, #0]
8009eee: 2b00 cmp r3, #0
8009ef0: d005 beq.n 8009efe <CDC_Receive_FS+0x1e>
8009ef2: 683b ldr r3, [r7, #0]
8009ef4: 681b ldr r3, [r3, #0]
8009ef6: 4619 mov r1, r3
8009ef8: 6878 ldr r0, [r7, #4]
8009efa: f7ff ff03 bl 8009d04 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
8009efe: 6879 ldr r1, [r7, #4]
8009f00: 4805 ldr r0, [pc, #20] @ (8009f18 <CDC_Receive_FS+0x38>)
8009f02: f7fe fdcc bl 8008a9e <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
8009f06: 4804 ldr r0, [pc, #16] @ (8009f18 <CDC_Receive_FS+0x38>)
8009f08: f7fe fe0b bl 8008b22 <USBD_CDC_ReceivePacket>
return (USBD_OK);
8009f0c: 2300 movs r3, #0
/* USER CODE END 6 */
}
8009f0e: 4618 mov r0, r3
8009f10: 3708 adds r7, #8
8009f12: 46bd mov sp, r7
8009f14: bd80 pop {r7, pc}
8009f16: bf00 nop
8009f18: 200003d4 .word 0x200003d4
08009f1c <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
8009f1c: b580 push {r7, lr}
8009f1e: b084 sub sp, #16
8009f20: af00 add r7, sp, #0
8009f22: 6078 str r0, [r7, #4]
8009f24: 460b mov r3, r1
8009f26: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
8009f28: 2300 movs r3, #0
8009f2a: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
8009f2c: 4b0d ldr r3, [pc, #52] @ (8009f64 <CDC_Transmit_FS+0x48>)
8009f2e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8009f32: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
8009f34: 68bb ldr r3, [r7, #8]
8009f36: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
8009f3a: 2b00 cmp r3, #0
8009f3c: d001 beq.n 8009f42 <CDC_Transmit_FS+0x26>
return USBD_BUSY;
8009f3e: 2301 movs r3, #1
8009f40: e00b b.n 8009f5a <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
8009f42: 887b ldrh r3, [r7, #2]
8009f44: 461a mov r2, r3
8009f46: 6879 ldr r1, [r7, #4]
8009f48: 4806 ldr r0, [pc, #24] @ (8009f64 <CDC_Transmit_FS+0x48>)
8009f4a: f7fe fd8f bl 8008a6c <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
8009f4e: 4805 ldr r0, [pc, #20] @ (8009f64 <CDC_Transmit_FS+0x48>)
8009f50: f7fe fdb8 bl 8008ac4 <USBD_CDC_TransmitPacket>
8009f54: 4603 mov r3, r0
8009f56: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
8009f58: 7bfb ldrb r3, [r7, #15]
}
8009f5a: 4618 mov r0, r3
8009f5c: 3710 adds r7, #16
8009f5e: 46bd mov sp, r7
8009f60: bd80 pop {r7, pc}
8009f62: bf00 nop
8009f64: 200003d4 .word 0x200003d4
08009f68 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009f68: b480 push {r7}
8009f6a: b083 sub sp, #12
8009f6c: af00 add r7, sp, #0
8009f6e: 4603 mov r3, r0
8009f70: 6039 str r1, [r7, #0]
8009f72: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
8009f74: 683b ldr r3, [r7, #0]
8009f76: 2212 movs r2, #18
8009f78: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
8009f7a: 4b03 ldr r3, [pc, #12] @ (8009f88 <USBD_FS_DeviceDescriptor+0x20>)
}
8009f7c: 4618 mov r0, r3
8009f7e: 370c adds r7, #12
8009f80: 46bd mov sp, r7
8009f82: bc80 pop {r7}
8009f84: 4770 bx lr
8009f86: bf00 nop
8009f88: 2000014c .word 0x2000014c
08009f8c <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009f8c: b480 push {r7}
8009f8e: b083 sub sp, #12
8009f90: af00 add r7, sp, #0
8009f92: 4603 mov r3, r0
8009f94: 6039 str r1, [r7, #0]
8009f96: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
8009f98: 683b ldr r3, [r7, #0]
8009f9a: 2204 movs r2, #4
8009f9c: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
8009f9e: 4b03 ldr r3, [pc, #12] @ (8009fac <USBD_FS_LangIDStrDescriptor+0x20>)
}
8009fa0: 4618 mov r0, r3
8009fa2: 370c adds r7, #12
8009fa4: 46bd mov sp, r7
8009fa6: bc80 pop {r7}
8009fa8: 4770 bx lr
8009faa: bf00 nop
8009fac: 20000160 .word 0x20000160
08009fb0 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009fb0: b580 push {r7, lr}
8009fb2: b082 sub sp, #8
8009fb4: af00 add r7, sp, #0
8009fb6: 4603 mov r3, r0
8009fb8: 6039 str r1, [r7, #0]
8009fba: 71fb strb r3, [r7, #7]
if(speed == 0)
8009fbc: 79fb ldrb r3, [r7, #7]
8009fbe: 2b00 cmp r3, #0
8009fc0: d105 bne.n 8009fce <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8009fc2: 683a ldr r2, [r7, #0]
8009fc4: 4907 ldr r1, [pc, #28] @ (8009fe4 <USBD_FS_ProductStrDescriptor+0x34>)
8009fc6: 4808 ldr r0, [pc, #32] @ (8009fe8 <USBD_FS_ProductStrDescriptor+0x38>)
8009fc8: f7ff fd8f bl 8009aea <USBD_GetString>
8009fcc: e004 b.n 8009fd8 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8009fce: 683a ldr r2, [r7, #0]
8009fd0: 4904 ldr r1, [pc, #16] @ (8009fe4 <USBD_FS_ProductStrDescriptor+0x34>)
8009fd2: 4805 ldr r0, [pc, #20] @ (8009fe8 <USBD_FS_ProductStrDescriptor+0x38>)
8009fd4: f7ff fd89 bl 8009aea <USBD_GetString>
}
return USBD_StrDesc;
8009fd8: 4b02 ldr r3, [pc, #8] @ (8009fe4 <USBD_FS_ProductStrDescriptor+0x34>)
}
8009fda: 4618 mov r0, r3
8009fdc: 3708 adds r7, #8
8009fde: 46bd mov sp, r7
8009fe0: bd80 pop {r7, pc}
8009fe2: bf00 nop
8009fe4: 20000f9c .word 0x20000f9c
8009fe8: 0800b1f0 .word 0x0800b1f0
08009fec <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009fec: b580 push {r7, lr}
8009fee: b082 sub sp, #8
8009ff0: af00 add r7, sp, #0
8009ff2: 4603 mov r3, r0
8009ff4: 6039 str r1, [r7, #0]
8009ff6: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
8009ff8: 683a ldr r2, [r7, #0]
8009ffa: 4904 ldr r1, [pc, #16] @ (800a00c <USBD_FS_ManufacturerStrDescriptor+0x20>)
8009ffc: 4804 ldr r0, [pc, #16] @ (800a010 <USBD_FS_ManufacturerStrDescriptor+0x24>)
8009ffe: f7ff fd74 bl 8009aea <USBD_GetString>
return USBD_StrDesc;
800a002: 4b02 ldr r3, [pc, #8] @ (800a00c <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800a004: 4618 mov r0, r3
800a006: 3708 adds r7, #8
800a008: 46bd mov sp, r7
800a00a: bd80 pop {r7, pc}
800a00c: 20000f9c .word 0x20000f9c
800a010: 0800b208 .word 0x0800b208
0800a014 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800a014: b580 push {r7, lr}
800a016: b082 sub sp, #8
800a018: af00 add r7, sp, #0
800a01a: 4603 mov r3, r0
800a01c: 6039 str r1, [r7, #0]
800a01e: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800a020: 683b ldr r3, [r7, #0]
800a022: 221a movs r2, #26
800a024: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800a026: f000 f843 bl 800a0b0 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800a02a: 4b02 ldr r3, [pc, #8] @ (800a034 <USBD_FS_SerialStrDescriptor+0x20>)
}
800a02c: 4618 mov r0, r3
800a02e: 3708 adds r7, #8
800a030: 46bd mov sp, r7
800a032: bd80 pop {r7, pc}
800a034: 20000164 .word 0x20000164
0800a038 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800a038: b580 push {r7, lr}
800a03a: b082 sub sp, #8
800a03c: af00 add r7, sp, #0
800a03e: 4603 mov r3, r0
800a040: 6039 str r1, [r7, #0]
800a042: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800a044: 79fb ldrb r3, [r7, #7]
800a046: 2b00 cmp r3, #0
800a048: d105 bne.n 800a056 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800a04a: 683a ldr r2, [r7, #0]
800a04c: 4907 ldr r1, [pc, #28] @ (800a06c <USBD_FS_ConfigStrDescriptor+0x34>)
800a04e: 4808 ldr r0, [pc, #32] @ (800a070 <USBD_FS_ConfigStrDescriptor+0x38>)
800a050: f7ff fd4b bl 8009aea <USBD_GetString>
800a054: e004 b.n 800a060 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800a056: 683a ldr r2, [r7, #0]
800a058: 4904 ldr r1, [pc, #16] @ (800a06c <USBD_FS_ConfigStrDescriptor+0x34>)
800a05a: 4805 ldr r0, [pc, #20] @ (800a070 <USBD_FS_ConfigStrDescriptor+0x38>)
800a05c: f7ff fd45 bl 8009aea <USBD_GetString>
}
return USBD_StrDesc;
800a060: 4b02 ldr r3, [pc, #8] @ (800a06c <USBD_FS_ConfigStrDescriptor+0x34>)
}
800a062: 4618 mov r0, r3
800a064: 3708 adds r7, #8
800a066: 46bd mov sp, r7
800a068: bd80 pop {r7, pc}
800a06a: bf00 nop
800a06c: 20000f9c .word 0x20000f9c
800a070: 0800b21c .word 0x0800b21c
0800a074 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800a074: b580 push {r7, lr}
800a076: b082 sub sp, #8
800a078: af00 add r7, sp, #0
800a07a: 4603 mov r3, r0
800a07c: 6039 str r1, [r7, #0]
800a07e: 71fb strb r3, [r7, #7]
if(speed == 0)
800a080: 79fb ldrb r3, [r7, #7]
800a082: 2b00 cmp r3, #0
800a084: d105 bne.n 800a092 <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800a086: 683a ldr r2, [r7, #0]
800a088: 4907 ldr r1, [pc, #28] @ (800a0a8 <USBD_FS_InterfaceStrDescriptor+0x34>)
800a08a: 4808 ldr r0, [pc, #32] @ (800a0ac <USBD_FS_InterfaceStrDescriptor+0x38>)
800a08c: f7ff fd2d bl 8009aea <USBD_GetString>
800a090: e004 b.n 800a09c <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800a092: 683a ldr r2, [r7, #0]
800a094: 4904 ldr r1, [pc, #16] @ (800a0a8 <USBD_FS_InterfaceStrDescriptor+0x34>)
800a096: 4805 ldr r0, [pc, #20] @ (800a0ac <USBD_FS_InterfaceStrDescriptor+0x38>)
800a098: f7ff fd27 bl 8009aea <USBD_GetString>
}
return USBD_StrDesc;
800a09c: 4b02 ldr r3, [pc, #8] @ (800a0a8 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800a09e: 4618 mov r0, r3
800a0a0: 3708 adds r7, #8
800a0a2: 46bd mov sp, r7
800a0a4: bd80 pop {r7, pc}
800a0a6: bf00 nop
800a0a8: 20000f9c .word 0x20000f9c
800a0ac: 0800b228 .word 0x0800b228
0800a0b0 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800a0b0: b580 push {r7, lr}
800a0b2: b084 sub sp, #16
800a0b4: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800a0b6: 4b0f ldr r3, [pc, #60] @ (800a0f4 <Get_SerialNum+0x44>)
800a0b8: 681b ldr r3, [r3, #0]
800a0ba: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800a0bc: 4b0e ldr r3, [pc, #56] @ (800a0f8 <Get_SerialNum+0x48>)
800a0be: 681b ldr r3, [r3, #0]
800a0c0: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800a0c2: 4b0e ldr r3, [pc, #56] @ (800a0fc <Get_SerialNum+0x4c>)
800a0c4: 681b ldr r3, [r3, #0]
800a0c6: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800a0c8: 68fa ldr r2, [r7, #12]
800a0ca: 687b ldr r3, [r7, #4]
800a0cc: 4413 add r3, r2
800a0ce: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800a0d0: 68fb ldr r3, [r7, #12]
800a0d2: 2b00 cmp r3, #0
800a0d4: d009 beq.n 800a0ea <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800a0d6: 2208 movs r2, #8
800a0d8: 4909 ldr r1, [pc, #36] @ (800a100 <Get_SerialNum+0x50>)
800a0da: 68f8 ldr r0, [r7, #12]
800a0dc: f000 f814 bl 800a108 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800a0e0: 2204 movs r2, #4
800a0e2: 4908 ldr r1, [pc, #32] @ (800a104 <Get_SerialNum+0x54>)
800a0e4: 68b8 ldr r0, [r7, #8]
800a0e6: f000 f80f bl 800a108 <IntToUnicode>
}
}
800a0ea: bf00 nop
800a0ec: 3710 adds r7, #16
800a0ee: 46bd mov sp, r7
800a0f0: bd80 pop {r7, pc}
800a0f2: bf00 nop
800a0f4: 1ffff7e8 .word 0x1ffff7e8
800a0f8: 1ffff7ec .word 0x1ffff7ec
800a0fc: 1ffff7f0 .word 0x1ffff7f0
800a100: 20000166 .word 0x20000166
800a104: 20000176 .word 0x20000176
0800a108 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800a108: b480 push {r7}
800a10a: b087 sub sp, #28
800a10c: af00 add r7, sp, #0
800a10e: 60f8 str r0, [r7, #12]
800a110: 60b9 str r1, [r7, #8]
800a112: 4613 mov r3, r2
800a114: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800a116: 2300 movs r3, #0
800a118: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800a11a: 2300 movs r3, #0
800a11c: 75fb strb r3, [r7, #23]
800a11e: e027 b.n 800a170 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800a120: 68fb ldr r3, [r7, #12]
800a122: 0f1b lsrs r3, r3, #28
800a124: 2b09 cmp r3, #9
800a126: d80b bhi.n 800a140 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800a128: 68fb ldr r3, [r7, #12]
800a12a: 0f1b lsrs r3, r3, #28
800a12c: b2da uxtb r2, r3
800a12e: 7dfb ldrb r3, [r7, #23]
800a130: 005b lsls r3, r3, #1
800a132: 4619 mov r1, r3
800a134: 68bb ldr r3, [r7, #8]
800a136: 440b add r3, r1
800a138: 3230 adds r2, #48 @ 0x30
800a13a: b2d2 uxtb r2, r2
800a13c: 701a strb r2, [r3, #0]
800a13e: e00a b.n 800a156 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800a140: 68fb ldr r3, [r7, #12]
800a142: 0f1b lsrs r3, r3, #28
800a144: b2da uxtb r2, r3
800a146: 7dfb ldrb r3, [r7, #23]
800a148: 005b lsls r3, r3, #1
800a14a: 4619 mov r1, r3
800a14c: 68bb ldr r3, [r7, #8]
800a14e: 440b add r3, r1
800a150: 3237 adds r2, #55 @ 0x37
800a152: b2d2 uxtb r2, r2
800a154: 701a strb r2, [r3, #0]
}
value = value << 4;
800a156: 68fb ldr r3, [r7, #12]
800a158: 011b lsls r3, r3, #4
800a15a: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800a15c: 7dfb ldrb r3, [r7, #23]
800a15e: 005b lsls r3, r3, #1
800a160: 3301 adds r3, #1
800a162: 68ba ldr r2, [r7, #8]
800a164: 4413 add r3, r2
800a166: 2200 movs r2, #0
800a168: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800a16a: 7dfb ldrb r3, [r7, #23]
800a16c: 3301 adds r3, #1
800a16e: 75fb strb r3, [r7, #23]
800a170: 7dfa ldrb r2, [r7, #23]
800a172: 79fb ldrb r3, [r7, #7]
800a174: 429a cmp r2, r3
800a176: d3d3 bcc.n 800a120 <IntToUnicode+0x18>
}
}
800a178: bf00 nop
800a17a: bf00 nop
800a17c: 371c adds r7, #28
800a17e: 46bd mov sp, r7
800a180: bc80 pop {r7}
800a182: 4770 bx lr
0800a184 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800a184: b580 push {r7, lr}
800a186: b084 sub sp, #16
800a188: af00 add r7, sp, #0
800a18a: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800a18c: 687b ldr r3, [r7, #4]
800a18e: 681b ldr r3, [r3, #0]
800a190: 4a0d ldr r2, [pc, #52] @ (800a1c8 <HAL_PCD_MspInit+0x44>)
800a192: 4293 cmp r3, r2
800a194: d113 bne.n 800a1be <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800a196: 4b0d ldr r3, [pc, #52] @ (800a1cc <HAL_PCD_MspInit+0x48>)
800a198: 69db ldr r3, [r3, #28]
800a19a: 4a0c ldr r2, [pc, #48] @ (800a1cc <HAL_PCD_MspInit+0x48>)
800a19c: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800a1a0: 61d3 str r3, [r2, #28]
800a1a2: 4b0a ldr r3, [pc, #40] @ (800a1cc <HAL_PCD_MspInit+0x48>)
800a1a4: 69db ldr r3, [r3, #28]
800a1a6: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800a1aa: 60fb str r3, [r7, #12]
800a1ac: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800a1ae: 2200 movs r2, #0
800a1b0: 2100 movs r1, #0
800a1b2: 2014 movs r0, #20
800a1b4: f7f8 f90f bl 80023d6 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800a1b8: 2014 movs r0, #20
800a1ba: f7f8 f928 bl 800240e <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800a1be: bf00 nop
800a1c0: 3710 adds r7, #16
800a1c2: 46bd mov sp, r7
800a1c4: bd80 pop {r7, pc}
800a1c6: bf00 nop
800a1c8: 40005c00 .word 0x40005c00
800a1cc: 40021000 .word 0x40021000
0800a1d0 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a1d0: b580 push {r7, lr}
800a1d2: b082 sub sp, #8
800a1d4: af00 add r7, sp, #0
800a1d6: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800a1d8: 687b ldr r3, [r7, #4]
800a1da: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a1de: 687b ldr r3, [r7, #4]
800a1e0: f503 7326 add.w r3, r3, #664 @ 0x298
800a1e4: 4619 mov r1, r3
800a1e6: 4610 mov r0, r2
800a1e8: f7fe fd51 bl 8008c8e <USBD_LL_SetupStage>
}
800a1ec: bf00 nop
800a1ee: 3708 adds r7, #8
800a1f0: 46bd mov sp, r7
800a1f2: bd80 pop {r7, pc}
0800a1f4 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a1f4: b580 push {r7, lr}
800a1f6: b082 sub sp, #8
800a1f8: af00 add r7, sp, #0
800a1fa: 6078 str r0, [r7, #4]
800a1fc: 460b mov r3, r1
800a1fe: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800a200: 687b ldr r3, [r7, #4]
800a202: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800a206: 78fa ldrb r2, [r7, #3]
800a208: 6879 ldr r1, [r7, #4]
800a20a: 4613 mov r3, r2
800a20c: 009b lsls r3, r3, #2
800a20e: 4413 add r3, r2
800a210: 00db lsls r3, r3, #3
800a212: 440b add r3, r1
800a214: f503 73b2 add.w r3, r3, #356 @ 0x164
800a218: 681a ldr r2, [r3, #0]
800a21a: 78fb ldrb r3, [r7, #3]
800a21c: 4619 mov r1, r3
800a21e: f7fe fd83 bl 8008d28 <USBD_LL_DataOutStage>
}
800a222: bf00 nop
800a224: 3708 adds r7, #8
800a226: 46bd mov sp, r7
800a228: bd80 pop {r7, pc}
0800a22a <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a22a: b580 push {r7, lr}
800a22c: b082 sub sp, #8
800a22e: af00 add r7, sp, #0
800a230: 6078 str r0, [r7, #4]
800a232: 460b mov r3, r1
800a234: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800a236: 687b ldr r3, [r7, #4]
800a238: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800a23c: 78fa ldrb r2, [r7, #3]
800a23e: 6879 ldr r1, [r7, #4]
800a240: 4613 mov r3, r2
800a242: 009b lsls r3, r3, #2
800a244: 4413 add r3, r2
800a246: 00db lsls r3, r3, #3
800a248: 440b add r3, r1
800a24a: 3324 adds r3, #36 @ 0x24
800a24c: 681a ldr r2, [r3, #0]
800a24e: 78fb ldrb r3, [r7, #3]
800a250: 4619 mov r1, r3
800a252: f7fe fdda bl 8008e0a <USBD_LL_DataInStage>
}
800a256: bf00 nop
800a258: 3708 adds r7, #8
800a25a: 46bd mov sp, r7
800a25c: bd80 pop {r7, pc}
0800a25e <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a25e: b580 push {r7, lr}
800a260: b082 sub sp, #8
800a262: af00 add r7, sp, #0
800a264: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800a266: 687b ldr r3, [r7, #4]
800a268: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a26c: 4618 mov r0, r3
800a26e: f7fe feea bl 8009046 <USBD_LL_SOF>
}
800a272: bf00 nop
800a274: 3708 adds r7, #8
800a276: 46bd mov sp, r7
800a278: bd80 pop {r7, pc}
0800a27a <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a27a: b580 push {r7, lr}
800a27c: b084 sub sp, #16
800a27e: af00 add r7, sp, #0
800a280: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800a282: 2301 movs r3, #1
800a284: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800a286: 687b ldr r3, [r7, #4]
800a288: 799b ldrb r3, [r3, #6]
800a28a: 2b02 cmp r3, #2
800a28c: d001 beq.n 800a292 <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800a28e: f7f7 f979 bl 8001584 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800a292: 687b ldr r3, [r7, #4]
800a294: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a298: 7bfa ldrb r2, [r7, #15]
800a29a: 4611 mov r1, r2
800a29c: 4618 mov r0, r3
800a29e: f7fe fe9a bl 8008fd6 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800a2a2: 687b ldr r3, [r7, #4]
800a2a4: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a2a8: 4618 mov r0, r3
800a2aa: f7fe fe53 bl 8008f54 <USBD_LL_Reset>
}
800a2ae: bf00 nop
800a2b0: 3710 adds r7, #16
800a2b2: 46bd mov sp, r7
800a2b4: bd80 pop {r7, pc}
...
0800a2b8 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a2b8: b580 push {r7, lr}
800a2ba: b082 sub sp, #8
800a2bc: af00 add r7, sp, #0
800a2be: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800a2c0: 687b ldr r3, [r7, #4]
800a2c2: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a2c6: 4618 mov r0, r3
800a2c8: f7fe fe94 bl 8008ff4 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800a2cc: 687b ldr r3, [r7, #4]
800a2ce: 7a9b ldrb r3, [r3, #10]
800a2d0: 2b00 cmp r3, #0
800a2d2: d005 beq.n 800a2e0 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800a2d4: 4b04 ldr r3, [pc, #16] @ (800a2e8 <HAL_PCD_SuspendCallback+0x30>)
800a2d6: 691b ldr r3, [r3, #16]
800a2d8: 4a03 ldr r2, [pc, #12] @ (800a2e8 <HAL_PCD_SuspendCallback+0x30>)
800a2da: f043 0306 orr.w r3, r3, #6
800a2de: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800a2e0: bf00 nop
800a2e2: 3708 adds r7, #8
800a2e4: 46bd mov sp, r7
800a2e6: bd80 pop {r7, pc}
800a2e8: e000ed00 .word 0xe000ed00
0800a2ec <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a2ec: b580 push {r7, lr}
800a2ee: b082 sub sp, #8
800a2f0: af00 add r7, sp, #0
800a2f2: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800a2f4: 687b ldr r3, [r7, #4]
800a2f6: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a2fa: 4618 mov r0, r3
800a2fc: f7fe fe8e bl 800901c <USBD_LL_Resume>
}
800a300: bf00 nop
800a302: 3708 adds r7, #8
800a304: 46bd mov sp, r7
800a306: bd80 pop {r7, pc}
0800a308 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800a308: b580 push {r7, lr}
800a30a: b082 sub sp, #8
800a30c: af00 add r7, sp, #0
800a30e: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800a310: 4a28 ldr r2, [pc, #160] @ (800a3b4 <USBD_LL_Init+0xac>)
800a312: 687b ldr r3, [r7, #4]
800a314: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800a318: 687b ldr r3, [r7, #4]
800a31a: 4a26 ldr r2, [pc, #152] @ (800a3b4 <USBD_LL_Init+0xac>)
800a31c: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800a320: 4b24 ldr r3, [pc, #144] @ (800a3b4 <USBD_LL_Init+0xac>)
800a322: 4a25 ldr r2, [pc, #148] @ (800a3b8 <USBD_LL_Init+0xb0>)
800a324: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800a326: 4b23 ldr r3, [pc, #140] @ (800a3b4 <USBD_LL_Init+0xac>)
800a328: 2208 movs r2, #8
800a32a: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800a32c: 4b21 ldr r3, [pc, #132] @ (800a3b4 <USBD_LL_Init+0xac>)
800a32e: 2202 movs r2, #2
800a330: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800a332: 4b20 ldr r3, [pc, #128] @ (800a3b4 <USBD_LL_Init+0xac>)
800a334: 2200 movs r2, #0
800a336: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800a338: 4b1e ldr r3, [pc, #120] @ (800a3b4 <USBD_LL_Init+0xac>)
800a33a: 2200 movs r2, #0
800a33c: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800a33e: 4b1d ldr r3, [pc, #116] @ (800a3b4 <USBD_LL_Init+0xac>)
800a340: 2200 movs r2, #0
800a342: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800a344: 481b ldr r0, [pc, #108] @ (800a3b4 <USBD_LL_Init+0xac>)
800a346: f7f8 fc38 bl 8002bba <HAL_PCD_Init>
800a34a: 4603 mov r3, r0
800a34c: 2b00 cmp r3, #0
800a34e: d001 beq.n 800a354 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800a350: f7f7 f918 bl 8001584 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800a354: 687b ldr r3, [r7, #4]
800a356: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a35a: 2318 movs r3, #24
800a35c: 2200 movs r2, #0
800a35e: 2100 movs r1, #0
800a360: f7fa f949 bl 80045f6 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800a364: 687b ldr r3, [r7, #4]
800a366: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a36a: 2358 movs r3, #88 @ 0x58
800a36c: 2200 movs r2, #0
800a36e: 2180 movs r1, #128 @ 0x80
800a370: f7fa f941 bl 80045f6 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800a374: 687b ldr r3, [r7, #4]
800a376: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a37a: 23c0 movs r3, #192 @ 0xc0
800a37c: 2200 movs r2, #0
800a37e: 2181 movs r1, #129 @ 0x81
800a380: f7fa f939 bl 80045f6 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800a384: 687b ldr r3, [r7, #4]
800a386: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a38a: f44f 7388 mov.w r3, #272 @ 0x110
800a38e: 2200 movs r2, #0
800a390: 2101 movs r1, #1
800a392: f7fa f930 bl 80045f6 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800a396: 687b ldr r3, [r7, #4]
800a398: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a39c: f44f 7380 mov.w r3, #256 @ 0x100
800a3a0: 2200 movs r2, #0
800a3a2: 2182 movs r1, #130 @ 0x82
800a3a4: f7fa f927 bl 80045f6 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800a3a8: 2300 movs r3, #0
}
800a3aa: 4618 mov r0, r3
800a3ac: 3708 adds r7, #8
800a3ae: 46bd mov sp, r7
800a3b0: bd80 pop {r7, pc}
800a3b2: bf00 nop
800a3b4: 2000119c .word 0x2000119c
800a3b8: 40005c00 .word 0x40005c00
0800a3bc <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800a3bc: b580 push {r7, lr}
800a3be: b084 sub sp, #16
800a3c0: af00 add r7, sp, #0
800a3c2: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800a3c4: 2300 movs r3, #0
800a3c6: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a3c8: 2300 movs r3, #0
800a3ca: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800a3cc: 687b ldr r3, [r7, #4]
800a3ce: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a3d2: 4618 mov r0, r3
800a3d4: f7f8 fce7 bl 8002da6 <HAL_PCD_Start>
800a3d8: 4603 mov r3, r0
800a3da: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a3dc: 7bfb ldrb r3, [r7, #15]
800a3de: 4618 mov r0, r3
800a3e0: f000 f94e bl 800a680 <USBD_Get_USB_Status>
800a3e4: 4603 mov r3, r0
800a3e6: 73bb strb r3, [r7, #14]
return usb_status;
800a3e8: 7bbb ldrb r3, [r7, #14]
}
800a3ea: 4618 mov r0, r3
800a3ec: 3710 adds r7, #16
800a3ee: 46bd mov sp, r7
800a3f0: bd80 pop {r7, pc}
0800a3f2 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800a3f2: b580 push {r7, lr}
800a3f4: b084 sub sp, #16
800a3f6: af00 add r7, sp, #0
800a3f8: 6078 str r0, [r7, #4]
800a3fa: 4608 mov r0, r1
800a3fc: 4611 mov r1, r2
800a3fe: 461a mov r2, r3
800a400: 4603 mov r3, r0
800a402: 70fb strb r3, [r7, #3]
800a404: 460b mov r3, r1
800a406: 70bb strb r3, [r7, #2]
800a408: 4613 mov r3, r2
800a40a: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800a40c: 2300 movs r3, #0
800a40e: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a410: 2300 movs r3, #0
800a412: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800a414: 687b ldr r3, [r7, #4]
800a416: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a41a: 78bb ldrb r3, [r7, #2]
800a41c: 883a ldrh r2, [r7, #0]
800a41e: 78f9 ldrb r1, [r7, #3]
800a420: f7f8 fe3b bl 800309a <HAL_PCD_EP_Open>
800a424: 4603 mov r3, r0
800a426: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a428: 7bfb ldrb r3, [r7, #15]
800a42a: 4618 mov r0, r3
800a42c: f000 f928 bl 800a680 <USBD_Get_USB_Status>
800a430: 4603 mov r3, r0
800a432: 73bb strb r3, [r7, #14]
return usb_status;
800a434: 7bbb ldrb r3, [r7, #14]
}
800a436: 4618 mov r0, r3
800a438: 3710 adds r7, #16
800a43a: 46bd mov sp, r7
800a43c: bd80 pop {r7, pc}
0800a43e <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a43e: b580 push {r7, lr}
800a440: b084 sub sp, #16
800a442: af00 add r7, sp, #0
800a444: 6078 str r0, [r7, #4]
800a446: 460b mov r3, r1
800a448: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a44a: 2300 movs r3, #0
800a44c: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a44e: 2300 movs r3, #0
800a450: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800a452: 687b ldr r3, [r7, #4]
800a454: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a458: 78fa ldrb r2, [r7, #3]
800a45a: 4611 mov r1, r2
800a45c: 4618 mov r0, r3
800a45e: f7f8 fe79 bl 8003154 <HAL_PCD_EP_Close>
800a462: 4603 mov r3, r0
800a464: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a466: 7bfb ldrb r3, [r7, #15]
800a468: 4618 mov r0, r3
800a46a: f000 f909 bl 800a680 <USBD_Get_USB_Status>
800a46e: 4603 mov r3, r0
800a470: 73bb strb r3, [r7, #14]
return usb_status;
800a472: 7bbb ldrb r3, [r7, #14]
}
800a474: 4618 mov r0, r3
800a476: 3710 adds r7, #16
800a478: 46bd mov sp, r7
800a47a: bd80 pop {r7, pc}
0800a47c <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a47c: b580 push {r7, lr}
800a47e: b084 sub sp, #16
800a480: af00 add r7, sp, #0
800a482: 6078 str r0, [r7, #4]
800a484: 460b mov r3, r1
800a486: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a488: 2300 movs r3, #0
800a48a: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a48c: 2300 movs r3, #0
800a48e: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800a490: 687b ldr r3, [r7, #4]
800a492: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a496: 78fa ldrb r2, [r7, #3]
800a498: 4611 mov r1, r2
800a49a: 4618 mov r0, r3
800a49c: f7f8 ff21 bl 80032e2 <HAL_PCD_EP_SetStall>
800a4a0: 4603 mov r3, r0
800a4a2: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a4a4: 7bfb ldrb r3, [r7, #15]
800a4a6: 4618 mov r0, r3
800a4a8: f000 f8ea bl 800a680 <USBD_Get_USB_Status>
800a4ac: 4603 mov r3, r0
800a4ae: 73bb strb r3, [r7, #14]
return usb_status;
800a4b0: 7bbb ldrb r3, [r7, #14]
}
800a4b2: 4618 mov r0, r3
800a4b4: 3710 adds r7, #16
800a4b6: 46bd mov sp, r7
800a4b8: bd80 pop {r7, pc}
0800a4ba <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a4ba: b580 push {r7, lr}
800a4bc: b084 sub sp, #16
800a4be: af00 add r7, sp, #0
800a4c0: 6078 str r0, [r7, #4]
800a4c2: 460b mov r3, r1
800a4c4: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a4c6: 2300 movs r3, #0
800a4c8: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a4ca: 2300 movs r3, #0
800a4cc: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800a4ce: 687b ldr r3, [r7, #4]
800a4d0: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a4d4: 78fa ldrb r2, [r7, #3]
800a4d6: 4611 mov r1, r2
800a4d8: 4618 mov r0, r3
800a4da: f7f8 ff62 bl 80033a2 <HAL_PCD_EP_ClrStall>
800a4de: 4603 mov r3, r0
800a4e0: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a4e2: 7bfb ldrb r3, [r7, #15]
800a4e4: 4618 mov r0, r3
800a4e6: f000 f8cb bl 800a680 <USBD_Get_USB_Status>
800a4ea: 4603 mov r3, r0
800a4ec: 73bb strb r3, [r7, #14]
return usb_status;
800a4ee: 7bbb ldrb r3, [r7, #14]
}
800a4f0: 4618 mov r0, r3
800a4f2: 3710 adds r7, #16
800a4f4: 46bd mov sp, r7
800a4f6: bd80 pop {r7, pc}
0800a4f8 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a4f8: b480 push {r7}
800a4fa: b085 sub sp, #20
800a4fc: af00 add r7, sp, #0
800a4fe: 6078 str r0, [r7, #4]
800a500: 460b mov r3, r1
800a502: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800a504: 687b ldr r3, [r7, #4]
800a506: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a50a: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800a50c: f997 3003 ldrsb.w r3, [r7, #3]
800a510: 2b00 cmp r3, #0
800a512: da0b bge.n 800a52c <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800a514: 78fb ldrb r3, [r7, #3]
800a516: f003 027f and.w r2, r3, #127 @ 0x7f
800a51a: 68f9 ldr r1, [r7, #12]
800a51c: 4613 mov r3, r2
800a51e: 009b lsls r3, r3, #2
800a520: 4413 add r3, r2
800a522: 00db lsls r3, r3, #3
800a524: 440b add r3, r1
800a526: 3312 adds r3, #18
800a528: 781b ldrb r3, [r3, #0]
800a52a: e00b b.n 800a544 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800a52c: 78fb ldrb r3, [r7, #3]
800a52e: f003 027f and.w r2, r3, #127 @ 0x7f
800a532: 68f9 ldr r1, [r7, #12]
800a534: 4613 mov r3, r2
800a536: 009b lsls r3, r3, #2
800a538: 4413 add r3, r2
800a53a: 00db lsls r3, r3, #3
800a53c: 440b add r3, r1
800a53e: f503 73a9 add.w r3, r3, #338 @ 0x152
800a542: 781b ldrb r3, [r3, #0]
}
}
800a544: 4618 mov r0, r3
800a546: 3714 adds r7, #20
800a548: 46bd mov sp, r7
800a54a: bc80 pop {r7}
800a54c: 4770 bx lr
0800a54e <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800a54e: b580 push {r7, lr}
800a550: b084 sub sp, #16
800a552: af00 add r7, sp, #0
800a554: 6078 str r0, [r7, #4]
800a556: 460b mov r3, r1
800a558: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a55a: 2300 movs r3, #0
800a55c: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a55e: 2300 movs r3, #0
800a560: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800a562: 687b ldr r3, [r7, #4]
800a564: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a568: 78fa ldrb r2, [r7, #3]
800a56a: 4611 mov r1, r2
800a56c: 4618 mov r0, r3
800a56e: f7f8 fd70 bl 8003052 <HAL_PCD_SetAddress>
800a572: 4603 mov r3, r0
800a574: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a576: 7bfb ldrb r3, [r7, #15]
800a578: 4618 mov r0, r3
800a57a: f000 f881 bl 800a680 <USBD_Get_USB_Status>
800a57e: 4603 mov r3, r0
800a580: 73bb strb r3, [r7, #14]
return usb_status;
800a582: 7bbb ldrb r3, [r7, #14]
}
800a584: 4618 mov r0, r3
800a586: 3710 adds r7, #16
800a588: 46bd mov sp, r7
800a58a: bd80 pop {r7, pc}
0800a58c <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800a58c: b580 push {r7, lr}
800a58e: b086 sub sp, #24
800a590: af00 add r7, sp, #0
800a592: 60f8 str r0, [r7, #12]
800a594: 607a str r2, [r7, #4]
800a596: 461a mov r2, r3
800a598: 460b mov r3, r1
800a59a: 72fb strb r3, [r7, #11]
800a59c: 4613 mov r3, r2
800a59e: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800a5a0: 2300 movs r3, #0
800a5a2: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800a5a4: 2300 movs r3, #0
800a5a6: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800a5a8: 68fb ldr r3, [r7, #12]
800a5aa: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a5ae: 893b ldrh r3, [r7, #8]
800a5b0: 7af9 ldrb r1, [r7, #11]
800a5b2: 687a ldr r2, [r7, #4]
800a5b4: f7f8 fe5e bl 8003274 <HAL_PCD_EP_Transmit>
800a5b8: 4603 mov r3, r0
800a5ba: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800a5bc: 7dfb ldrb r3, [r7, #23]
800a5be: 4618 mov r0, r3
800a5c0: f000 f85e bl 800a680 <USBD_Get_USB_Status>
800a5c4: 4603 mov r3, r0
800a5c6: 75bb strb r3, [r7, #22]
return usb_status;
800a5c8: 7dbb ldrb r3, [r7, #22]
}
800a5ca: 4618 mov r0, r3
800a5cc: 3718 adds r7, #24
800a5ce: 46bd mov sp, r7
800a5d0: bd80 pop {r7, pc}
0800a5d2 <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800a5d2: b580 push {r7, lr}
800a5d4: b086 sub sp, #24
800a5d6: af00 add r7, sp, #0
800a5d8: 60f8 str r0, [r7, #12]
800a5da: 607a str r2, [r7, #4]
800a5dc: 461a mov r2, r3
800a5de: 460b mov r3, r1
800a5e0: 72fb strb r3, [r7, #11]
800a5e2: 4613 mov r3, r2
800a5e4: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800a5e6: 2300 movs r3, #0
800a5e8: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800a5ea: 2300 movs r3, #0
800a5ec: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800a5ee: 68fb ldr r3, [r7, #12]
800a5f0: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a5f4: 893b ldrh r3, [r7, #8]
800a5f6: 7af9 ldrb r1, [r7, #11]
800a5f8: 687a ldr r2, [r7, #4]
800a5fa: f7f8 fdf3 bl 80031e4 <HAL_PCD_EP_Receive>
800a5fe: 4603 mov r3, r0
800a600: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800a602: 7dfb ldrb r3, [r7, #23]
800a604: 4618 mov r0, r3
800a606: f000 f83b bl 800a680 <USBD_Get_USB_Status>
800a60a: 4603 mov r3, r0
800a60c: 75bb strb r3, [r7, #22]
return usb_status;
800a60e: 7dbb ldrb r3, [r7, #22]
}
800a610: 4618 mov r0, r3
800a612: 3718 adds r7, #24
800a614: 46bd mov sp, r7
800a616: bd80 pop {r7, pc}
0800a618 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a618: b580 push {r7, lr}
800a61a: b082 sub sp, #8
800a61c: af00 add r7, sp, #0
800a61e: 6078 str r0, [r7, #4]
800a620: 460b mov r3, r1
800a622: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800a624: 687b ldr r3, [r7, #4]
800a626: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a62a: 78fa ldrb r2, [r7, #3]
800a62c: 4611 mov r1, r2
800a62e: 4618 mov r0, r3
800a630: f7f8 fe09 bl 8003246 <HAL_PCD_EP_GetRxCount>
800a634: 4603 mov r3, r0
}
800a636: 4618 mov r0, r3
800a638: 3708 adds r7, #8
800a63a: 46bd mov sp, r7
800a63c: bd80 pop {r7, pc}
...
0800a640 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800a640: b480 push {r7}
800a642: b083 sub sp, #12
800a644: af00 add r7, sp, #0
800a646: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800a648: 4b02 ldr r3, [pc, #8] @ (800a654 <USBD_static_malloc+0x14>)
}
800a64a: 4618 mov r0, r3
800a64c: 370c adds r7, #12
800a64e: 46bd mov sp, r7
800a650: bc80 pop {r7}
800a652: 4770 bx lr
800a654: 20001474 .word 0x20001474
0800a658 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800a658: b480 push {r7}
800a65a: b083 sub sp, #12
800a65c: af00 add r7, sp, #0
800a65e: 6078 str r0, [r7, #4]
}
800a660: bf00 nop
800a662: 370c adds r7, #12
800a664: 46bd mov sp, r7
800a666: bc80 pop {r7}
800a668: 4770 bx lr
0800a66a <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a66a: b480 push {r7}
800a66c: b083 sub sp, #12
800a66e: af00 add r7, sp, #0
800a670: 6078 str r0, [r7, #4]
800a672: 460b mov r3, r1
800a674: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800a676: bf00 nop
800a678: 370c adds r7, #12
800a67a: 46bd mov sp, r7
800a67c: bc80 pop {r7}
800a67e: 4770 bx lr
0800a680 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800a680: b480 push {r7}
800a682: b085 sub sp, #20
800a684: af00 add r7, sp, #0
800a686: 4603 mov r3, r0
800a688: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800a68a: 2300 movs r3, #0
800a68c: 73fb strb r3, [r7, #15]
switch (hal_status)
800a68e: 79fb ldrb r3, [r7, #7]
800a690: 2b03 cmp r3, #3
800a692: d817 bhi.n 800a6c4 <USBD_Get_USB_Status+0x44>
800a694: a201 add r2, pc, #4 @ (adr r2, 800a69c <USBD_Get_USB_Status+0x1c>)
800a696: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800a69a: bf00 nop
800a69c: 0800a6ad .word 0x0800a6ad
800a6a0: 0800a6b3 .word 0x0800a6b3
800a6a4: 0800a6b9 .word 0x0800a6b9
800a6a8: 0800a6bf .word 0x0800a6bf
{
case HAL_OK :
usb_status = USBD_OK;
800a6ac: 2300 movs r3, #0
800a6ae: 73fb strb r3, [r7, #15]
break;
800a6b0: e00b b.n 800a6ca <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800a6b2: 2302 movs r3, #2
800a6b4: 73fb strb r3, [r7, #15]
break;
800a6b6: e008 b.n 800a6ca <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800a6b8: 2301 movs r3, #1
800a6ba: 73fb strb r3, [r7, #15]
break;
800a6bc: e005 b.n 800a6ca <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800a6be: 2302 movs r3, #2
800a6c0: 73fb strb r3, [r7, #15]
break;
800a6c2: e002 b.n 800a6ca <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800a6c4: 2302 movs r3, #2
800a6c6: 73fb strb r3, [r7, #15]
break;
800a6c8: bf00 nop
}
return usb_status;
800a6ca: 7bfb ldrb r3, [r7, #15]
}
800a6cc: 4618 mov r0, r3
800a6ce: 3714 adds r7, #20
800a6d0: 46bd mov sp, r7
800a6d2: bc80 pop {r7}
800a6d4: 4770 bx lr
800a6d6: bf00 nop
0800a6d8 <siprintf>:
800a6d8: b40e push {r1, r2, r3}
800a6da: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800a6de: b510 push {r4, lr}
800a6e0: 2400 movs r4, #0
800a6e2: b09d sub sp, #116 @ 0x74
800a6e4: ab1f add r3, sp, #124 @ 0x7c
800a6e6: 9002 str r0, [sp, #8]
800a6e8: 9006 str r0, [sp, #24]
800a6ea: 9107 str r1, [sp, #28]
800a6ec: 9104 str r1, [sp, #16]
800a6ee: 4809 ldr r0, [pc, #36] @ (800a714 <siprintf+0x3c>)
800a6f0: 4909 ldr r1, [pc, #36] @ (800a718 <siprintf+0x40>)
800a6f2: f853 2b04 ldr.w r2, [r3], #4
800a6f6: 9105 str r1, [sp, #20]
800a6f8: 6800 ldr r0, [r0, #0]
800a6fa: a902 add r1, sp, #8
800a6fc: 9301 str r3, [sp, #4]
800a6fe: 941b str r4, [sp, #108] @ 0x6c
800a700: f000 f992 bl 800aa28 <_svfiprintf_r>
800a704: 9b02 ldr r3, [sp, #8]
800a706: 701c strb r4, [r3, #0]
800a708: b01d add sp, #116 @ 0x74
800a70a: e8bd 4010 ldmia.w sp!, {r4, lr}
800a70e: b003 add sp, #12
800a710: 4770 bx lr
800a712: bf00 nop
800a714: 20000180 .word 0x20000180
800a718: ffff0208 .word 0xffff0208
0800a71c <memset>:
800a71c: 4603 mov r3, r0
800a71e: 4402 add r2, r0
800a720: 4293 cmp r3, r2
800a722: d100 bne.n 800a726 <memset+0xa>
800a724: 4770 bx lr
800a726: f803 1b01 strb.w r1, [r3], #1
800a72a: e7f9 b.n 800a720 <memset+0x4>
0800a72c <__errno>:
800a72c: 4b01 ldr r3, [pc, #4] @ (800a734 <__errno+0x8>)
800a72e: 6818 ldr r0, [r3, #0]
800a730: 4770 bx lr
800a732: bf00 nop
800a734: 20000180 .word 0x20000180
0800a738 <__libc_init_array>:
800a738: b570 push {r4, r5, r6, lr}
800a73a: 2600 movs r6, #0
800a73c: 4d0c ldr r5, [pc, #48] @ (800a770 <__libc_init_array+0x38>)
800a73e: 4c0d ldr r4, [pc, #52] @ (800a774 <__libc_init_array+0x3c>)
800a740: 1b64 subs r4, r4, r5
800a742: 10a4 asrs r4, r4, #2
800a744: 42a6 cmp r6, r4
800a746: d109 bne.n 800a75c <__libc_init_array+0x24>
800a748: f000 fc76 bl 800b038 <_init>
800a74c: 2600 movs r6, #0
800a74e: 4d0a ldr r5, [pc, #40] @ (800a778 <__libc_init_array+0x40>)
800a750: 4c0a ldr r4, [pc, #40] @ (800a77c <__libc_init_array+0x44>)
800a752: 1b64 subs r4, r4, r5
800a754: 10a4 asrs r4, r4, #2
800a756: 42a6 cmp r6, r4
800a758: d105 bne.n 800a766 <__libc_init_array+0x2e>
800a75a: bd70 pop {r4, r5, r6, pc}
800a75c: f855 3b04 ldr.w r3, [r5], #4
800a760: 4798 blx r3
800a762: 3601 adds r6, #1
800a764: e7ee b.n 800a744 <__libc_init_array+0xc>
800a766: f855 3b04 ldr.w r3, [r5], #4
800a76a: 4798 blx r3
800a76c: 3601 adds r6, #1
800a76e: e7f2 b.n 800a756 <__libc_init_array+0x1e>
800a770: 0800b2e0 .word 0x0800b2e0
800a774: 0800b2e0 .word 0x0800b2e0
800a778: 0800b2e0 .word 0x0800b2e0
800a77c: 0800b2e4 .word 0x0800b2e4
0800a780 <__retarget_lock_acquire_recursive>:
800a780: 4770 bx lr
0800a782 <__retarget_lock_release_recursive>:
800a782: 4770 bx lr
0800a784 <_free_r>:
800a784: b538 push {r3, r4, r5, lr}
800a786: 4605 mov r5, r0
800a788: 2900 cmp r1, #0
800a78a: d040 beq.n 800a80e <_free_r+0x8a>
800a78c: f851 3c04 ldr.w r3, [r1, #-4]
800a790: 1f0c subs r4, r1, #4
800a792: 2b00 cmp r3, #0
800a794: bfb8 it lt
800a796: 18e4 addlt r4, r4, r3
800a798: f000 f8de bl 800a958 <__malloc_lock>
800a79c: 4a1c ldr r2, [pc, #112] @ (800a810 <_free_r+0x8c>)
800a79e: 6813 ldr r3, [r2, #0]
800a7a0: b933 cbnz r3, 800a7b0 <_free_r+0x2c>
800a7a2: 6063 str r3, [r4, #4]
800a7a4: 6014 str r4, [r2, #0]
800a7a6: 4628 mov r0, r5
800a7a8: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800a7ac: f000 b8da b.w 800a964 <__malloc_unlock>
800a7b0: 42a3 cmp r3, r4
800a7b2: d908 bls.n 800a7c6 <_free_r+0x42>
800a7b4: 6820 ldr r0, [r4, #0]
800a7b6: 1821 adds r1, r4, r0
800a7b8: 428b cmp r3, r1
800a7ba: bf01 itttt eq
800a7bc: 6819 ldreq r1, [r3, #0]
800a7be: 685b ldreq r3, [r3, #4]
800a7c0: 1809 addeq r1, r1, r0
800a7c2: 6021 streq r1, [r4, #0]
800a7c4: e7ed b.n 800a7a2 <_free_r+0x1e>
800a7c6: 461a mov r2, r3
800a7c8: 685b ldr r3, [r3, #4]
800a7ca: b10b cbz r3, 800a7d0 <_free_r+0x4c>
800a7cc: 42a3 cmp r3, r4
800a7ce: d9fa bls.n 800a7c6 <_free_r+0x42>
800a7d0: 6811 ldr r1, [r2, #0]
800a7d2: 1850 adds r0, r2, r1
800a7d4: 42a0 cmp r0, r4
800a7d6: d10b bne.n 800a7f0 <_free_r+0x6c>
800a7d8: 6820 ldr r0, [r4, #0]
800a7da: 4401 add r1, r0
800a7dc: 1850 adds r0, r2, r1
800a7de: 4283 cmp r3, r0
800a7e0: 6011 str r1, [r2, #0]
800a7e2: d1e0 bne.n 800a7a6 <_free_r+0x22>
800a7e4: 6818 ldr r0, [r3, #0]
800a7e6: 685b ldr r3, [r3, #4]
800a7e8: 4408 add r0, r1
800a7ea: 6010 str r0, [r2, #0]
800a7ec: 6053 str r3, [r2, #4]
800a7ee: e7da b.n 800a7a6 <_free_r+0x22>
800a7f0: d902 bls.n 800a7f8 <_free_r+0x74>
800a7f2: 230c movs r3, #12
800a7f4: 602b str r3, [r5, #0]
800a7f6: e7d6 b.n 800a7a6 <_free_r+0x22>
800a7f8: 6820 ldr r0, [r4, #0]
800a7fa: 1821 adds r1, r4, r0
800a7fc: 428b cmp r3, r1
800a7fe: bf01 itttt eq
800a800: 6819 ldreq r1, [r3, #0]
800a802: 685b ldreq r3, [r3, #4]
800a804: 1809 addeq r1, r1, r0
800a806: 6021 streq r1, [r4, #0]
800a808: 6063 str r3, [r4, #4]
800a80a: 6054 str r4, [r2, #4]
800a80c: e7cb b.n 800a7a6 <_free_r+0x22>
800a80e: bd38 pop {r3, r4, r5, pc}
800a810: 200017d8 .word 0x200017d8
0800a814 <sbrk_aligned>:
800a814: b570 push {r4, r5, r6, lr}
800a816: 4e0f ldr r6, [pc, #60] @ (800a854 <sbrk_aligned+0x40>)
800a818: 460c mov r4, r1
800a81a: 6831 ldr r1, [r6, #0]
800a81c: 4605 mov r5, r0
800a81e: b911 cbnz r1, 800a826 <sbrk_aligned+0x12>
800a820: f000 fba8 bl 800af74 <_sbrk_r>
800a824: 6030 str r0, [r6, #0]
800a826: 4621 mov r1, r4
800a828: 4628 mov r0, r5
800a82a: f000 fba3 bl 800af74 <_sbrk_r>
800a82e: 1c43 adds r3, r0, #1
800a830: d103 bne.n 800a83a <sbrk_aligned+0x26>
800a832: f04f 34ff mov.w r4, #4294967295
800a836: 4620 mov r0, r4
800a838: bd70 pop {r4, r5, r6, pc}
800a83a: 1cc4 adds r4, r0, #3
800a83c: f024 0403 bic.w r4, r4, #3
800a840: 42a0 cmp r0, r4
800a842: d0f8 beq.n 800a836 <sbrk_aligned+0x22>
800a844: 1a21 subs r1, r4, r0
800a846: 4628 mov r0, r5
800a848: f000 fb94 bl 800af74 <_sbrk_r>
800a84c: 3001 adds r0, #1
800a84e: d1f2 bne.n 800a836 <sbrk_aligned+0x22>
800a850: e7ef b.n 800a832 <sbrk_aligned+0x1e>
800a852: bf00 nop
800a854: 200017d4 .word 0x200017d4
0800a858 <_malloc_r>:
800a858: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800a85c: 1ccd adds r5, r1, #3
800a85e: f025 0503 bic.w r5, r5, #3
800a862: 3508 adds r5, #8
800a864: 2d0c cmp r5, #12
800a866: bf38 it cc
800a868: 250c movcc r5, #12
800a86a: 2d00 cmp r5, #0
800a86c: 4606 mov r6, r0
800a86e: db01 blt.n 800a874 <_malloc_r+0x1c>
800a870: 42a9 cmp r1, r5
800a872: d904 bls.n 800a87e <_malloc_r+0x26>
800a874: 230c movs r3, #12
800a876: 6033 str r3, [r6, #0]
800a878: 2000 movs r0, #0
800a87a: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800a87e: f8df 80d4 ldr.w r8, [pc, #212] @ 800a954 <_malloc_r+0xfc>
800a882: f000 f869 bl 800a958 <__malloc_lock>
800a886: f8d8 3000 ldr.w r3, [r8]
800a88a: 461c mov r4, r3
800a88c: bb44 cbnz r4, 800a8e0 <_malloc_r+0x88>
800a88e: 4629 mov r1, r5
800a890: 4630 mov r0, r6
800a892: f7ff ffbf bl 800a814 <sbrk_aligned>
800a896: 1c43 adds r3, r0, #1
800a898: 4604 mov r4, r0
800a89a: d158 bne.n 800a94e <_malloc_r+0xf6>
800a89c: f8d8 4000 ldr.w r4, [r8]
800a8a0: 4627 mov r7, r4
800a8a2: 2f00 cmp r7, #0
800a8a4: d143 bne.n 800a92e <_malloc_r+0xd6>
800a8a6: 2c00 cmp r4, #0
800a8a8: d04b beq.n 800a942 <_malloc_r+0xea>
800a8aa: 6823 ldr r3, [r4, #0]
800a8ac: 4639 mov r1, r7
800a8ae: 4630 mov r0, r6
800a8b0: eb04 0903 add.w r9, r4, r3
800a8b4: f000 fb5e bl 800af74 <_sbrk_r>
800a8b8: 4581 cmp r9, r0
800a8ba: d142 bne.n 800a942 <_malloc_r+0xea>
800a8bc: 6821 ldr r1, [r4, #0]
800a8be: 4630 mov r0, r6
800a8c0: 1a6d subs r5, r5, r1
800a8c2: 4629 mov r1, r5
800a8c4: f7ff ffa6 bl 800a814 <sbrk_aligned>
800a8c8: 3001 adds r0, #1
800a8ca: d03a beq.n 800a942 <_malloc_r+0xea>
800a8cc: 6823 ldr r3, [r4, #0]
800a8ce: 442b add r3, r5
800a8d0: 6023 str r3, [r4, #0]
800a8d2: f8d8 3000 ldr.w r3, [r8]
800a8d6: 685a ldr r2, [r3, #4]
800a8d8: bb62 cbnz r2, 800a934 <_malloc_r+0xdc>
800a8da: f8c8 7000 str.w r7, [r8]
800a8de: e00f b.n 800a900 <_malloc_r+0xa8>
800a8e0: 6822 ldr r2, [r4, #0]
800a8e2: 1b52 subs r2, r2, r5
800a8e4: d420 bmi.n 800a928 <_malloc_r+0xd0>
800a8e6: 2a0b cmp r2, #11
800a8e8: d917 bls.n 800a91a <_malloc_r+0xc2>
800a8ea: 1961 adds r1, r4, r5
800a8ec: 42a3 cmp r3, r4
800a8ee: 6025 str r5, [r4, #0]
800a8f0: bf18 it ne
800a8f2: 6059 strne r1, [r3, #4]
800a8f4: 6863 ldr r3, [r4, #4]
800a8f6: bf08 it eq
800a8f8: f8c8 1000 streq.w r1, [r8]
800a8fc: 5162 str r2, [r4, r5]
800a8fe: 604b str r3, [r1, #4]
800a900: 4630 mov r0, r6
800a902: f000 f82f bl 800a964 <__malloc_unlock>
800a906: f104 000b add.w r0, r4, #11
800a90a: 1d23 adds r3, r4, #4
800a90c: f020 0007 bic.w r0, r0, #7
800a910: 1ac2 subs r2, r0, r3
800a912: bf1c itt ne
800a914: 1a1b subne r3, r3, r0
800a916: 50a3 strne r3, [r4, r2]
800a918: e7af b.n 800a87a <_malloc_r+0x22>
800a91a: 6862 ldr r2, [r4, #4]
800a91c: 42a3 cmp r3, r4
800a91e: bf0c ite eq
800a920: f8c8 2000 streq.w r2, [r8]
800a924: 605a strne r2, [r3, #4]
800a926: e7eb b.n 800a900 <_malloc_r+0xa8>
800a928: 4623 mov r3, r4
800a92a: 6864 ldr r4, [r4, #4]
800a92c: e7ae b.n 800a88c <_malloc_r+0x34>
800a92e: 463c mov r4, r7
800a930: 687f ldr r7, [r7, #4]
800a932: e7b6 b.n 800a8a2 <_malloc_r+0x4a>
800a934: 461a mov r2, r3
800a936: 685b ldr r3, [r3, #4]
800a938: 42a3 cmp r3, r4
800a93a: d1fb bne.n 800a934 <_malloc_r+0xdc>
800a93c: 2300 movs r3, #0
800a93e: 6053 str r3, [r2, #4]
800a940: e7de b.n 800a900 <_malloc_r+0xa8>
800a942: 230c movs r3, #12
800a944: 4630 mov r0, r6
800a946: 6033 str r3, [r6, #0]
800a948: f000 f80c bl 800a964 <__malloc_unlock>
800a94c: e794 b.n 800a878 <_malloc_r+0x20>
800a94e: 6005 str r5, [r0, #0]
800a950: e7d6 b.n 800a900 <_malloc_r+0xa8>
800a952: bf00 nop
800a954: 200017d8 .word 0x200017d8
0800a958 <__malloc_lock>:
800a958: 4801 ldr r0, [pc, #4] @ (800a960 <__malloc_lock+0x8>)
800a95a: f7ff bf11 b.w 800a780 <__retarget_lock_acquire_recursive>
800a95e: bf00 nop
800a960: 200017d0 .word 0x200017d0
0800a964 <__malloc_unlock>:
800a964: 4801 ldr r0, [pc, #4] @ (800a96c <__malloc_unlock+0x8>)
800a966: f7ff bf0c b.w 800a782 <__retarget_lock_release_recursive>
800a96a: bf00 nop
800a96c: 200017d0 .word 0x200017d0
0800a970 <__ssputs_r>:
800a970: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800a974: 461f mov r7, r3
800a976: 688e ldr r6, [r1, #8]
800a978: 4682 mov sl, r0
800a97a: 42be cmp r6, r7
800a97c: 460c mov r4, r1
800a97e: 4690 mov r8, r2
800a980: 680b ldr r3, [r1, #0]
800a982: d82d bhi.n 800a9e0 <__ssputs_r+0x70>
800a984: f9b1 200c ldrsh.w r2, [r1, #12]
800a988: f412 6f90 tst.w r2, #1152 @ 0x480
800a98c: d026 beq.n 800a9dc <__ssputs_r+0x6c>
800a98e: 6965 ldr r5, [r4, #20]
800a990: 6909 ldr r1, [r1, #16]
800a992: eb05 0545 add.w r5, r5, r5, lsl #1
800a996: eba3 0901 sub.w r9, r3, r1
800a99a: eb05 75d5 add.w r5, r5, r5, lsr #31
800a99e: 1c7b adds r3, r7, #1
800a9a0: 444b add r3, r9
800a9a2: 106d asrs r5, r5, #1
800a9a4: 429d cmp r5, r3
800a9a6: bf38 it cc
800a9a8: 461d movcc r5, r3
800a9aa: 0553 lsls r3, r2, #21
800a9ac: d527 bpl.n 800a9fe <__ssputs_r+0x8e>
800a9ae: 4629 mov r1, r5
800a9b0: f7ff ff52 bl 800a858 <_malloc_r>
800a9b4: 4606 mov r6, r0
800a9b6: b360 cbz r0, 800aa12 <__ssputs_r+0xa2>
800a9b8: 464a mov r2, r9
800a9ba: 6921 ldr r1, [r4, #16]
800a9bc: f000 faf8 bl 800afb0 <memcpy>
800a9c0: 89a3 ldrh r3, [r4, #12]
800a9c2: f423 6390 bic.w r3, r3, #1152 @ 0x480
800a9c6: f043 0380 orr.w r3, r3, #128 @ 0x80
800a9ca: 81a3 strh r3, [r4, #12]
800a9cc: 6126 str r6, [r4, #16]
800a9ce: 444e add r6, r9
800a9d0: 6026 str r6, [r4, #0]
800a9d2: 463e mov r6, r7
800a9d4: 6165 str r5, [r4, #20]
800a9d6: eba5 0509 sub.w r5, r5, r9
800a9da: 60a5 str r5, [r4, #8]
800a9dc: 42be cmp r6, r7
800a9de: d900 bls.n 800a9e2 <__ssputs_r+0x72>
800a9e0: 463e mov r6, r7
800a9e2: 4632 mov r2, r6
800a9e4: 4641 mov r1, r8
800a9e6: 6820 ldr r0, [r4, #0]
800a9e8: f000 faaa bl 800af40 <memmove>
800a9ec: 2000 movs r0, #0
800a9ee: 68a3 ldr r3, [r4, #8]
800a9f0: 1b9b subs r3, r3, r6
800a9f2: 60a3 str r3, [r4, #8]
800a9f4: 6823 ldr r3, [r4, #0]
800a9f6: 4433 add r3, r6
800a9f8: 6023 str r3, [r4, #0]
800a9fa: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800a9fe: 462a mov r2, r5
800aa00: f000 fae4 bl 800afcc <_realloc_r>
800aa04: 4606 mov r6, r0
800aa06: 2800 cmp r0, #0
800aa08: d1e0 bne.n 800a9cc <__ssputs_r+0x5c>
800aa0a: 4650 mov r0, sl
800aa0c: 6921 ldr r1, [r4, #16]
800aa0e: f7ff feb9 bl 800a784 <_free_r>
800aa12: 230c movs r3, #12
800aa14: f8ca 3000 str.w r3, [sl]
800aa18: 89a3 ldrh r3, [r4, #12]
800aa1a: f04f 30ff mov.w r0, #4294967295
800aa1e: f043 0340 orr.w r3, r3, #64 @ 0x40
800aa22: 81a3 strh r3, [r4, #12]
800aa24: e7e9 b.n 800a9fa <__ssputs_r+0x8a>
...
0800aa28 <_svfiprintf_r>:
800aa28: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800aa2c: 4698 mov r8, r3
800aa2e: 898b ldrh r3, [r1, #12]
800aa30: 4607 mov r7, r0
800aa32: 061b lsls r3, r3, #24
800aa34: 460d mov r5, r1
800aa36: 4614 mov r4, r2
800aa38: b09d sub sp, #116 @ 0x74
800aa3a: d510 bpl.n 800aa5e <_svfiprintf_r+0x36>
800aa3c: 690b ldr r3, [r1, #16]
800aa3e: b973 cbnz r3, 800aa5e <_svfiprintf_r+0x36>
800aa40: 2140 movs r1, #64 @ 0x40
800aa42: f7ff ff09 bl 800a858 <_malloc_r>
800aa46: 6028 str r0, [r5, #0]
800aa48: 6128 str r0, [r5, #16]
800aa4a: b930 cbnz r0, 800aa5a <_svfiprintf_r+0x32>
800aa4c: 230c movs r3, #12
800aa4e: 603b str r3, [r7, #0]
800aa50: f04f 30ff mov.w r0, #4294967295
800aa54: b01d add sp, #116 @ 0x74
800aa56: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800aa5a: 2340 movs r3, #64 @ 0x40
800aa5c: 616b str r3, [r5, #20]
800aa5e: 2300 movs r3, #0
800aa60: 9309 str r3, [sp, #36] @ 0x24
800aa62: 2320 movs r3, #32
800aa64: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800aa68: 2330 movs r3, #48 @ 0x30
800aa6a: f04f 0901 mov.w r9, #1
800aa6e: f8cd 800c str.w r8, [sp, #12]
800aa72: f8df 8198 ldr.w r8, [pc, #408] @ 800ac0c <_svfiprintf_r+0x1e4>
800aa76: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800aa7a: 4623 mov r3, r4
800aa7c: 469a mov sl, r3
800aa7e: f813 2b01 ldrb.w r2, [r3], #1
800aa82: b10a cbz r2, 800aa88 <_svfiprintf_r+0x60>
800aa84: 2a25 cmp r2, #37 @ 0x25
800aa86: d1f9 bne.n 800aa7c <_svfiprintf_r+0x54>
800aa88: ebba 0b04 subs.w fp, sl, r4
800aa8c: d00b beq.n 800aaa6 <_svfiprintf_r+0x7e>
800aa8e: 465b mov r3, fp
800aa90: 4622 mov r2, r4
800aa92: 4629 mov r1, r5
800aa94: 4638 mov r0, r7
800aa96: f7ff ff6b bl 800a970 <__ssputs_r>
800aa9a: 3001 adds r0, #1
800aa9c: f000 80a7 beq.w 800abee <_svfiprintf_r+0x1c6>
800aaa0: 9a09 ldr r2, [sp, #36] @ 0x24
800aaa2: 445a add r2, fp
800aaa4: 9209 str r2, [sp, #36] @ 0x24
800aaa6: f89a 3000 ldrb.w r3, [sl]
800aaaa: 2b00 cmp r3, #0
800aaac: f000 809f beq.w 800abee <_svfiprintf_r+0x1c6>
800aab0: 2300 movs r3, #0
800aab2: f04f 32ff mov.w r2, #4294967295
800aab6: e9cd 2305 strd r2, r3, [sp, #20]
800aaba: f10a 0a01 add.w sl, sl, #1
800aabe: 9304 str r3, [sp, #16]
800aac0: 9307 str r3, [sp, #28]
800aac2: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800aac6: 931a str r3, [sp, #104] @ 0x68
800aac8: 4654 mov r4, sl
800aaca: 2205 movs r2, #5
800aacc: f814 1b01 ldrb.w r1, [r4], #1
800aad0: 484e ldr r0, [pc, #312] @ (800ac0c <_svfiprintf_r+0x1e4>)
800aad2: f000 fa5f bl 800af94 <memchr>
800aad6: 9a04 ldr r2, [sp, #16]
800aad8: b9d8 cbnz r0, 800ab12 <_svfiprintf_r+0xea>
800aada: 06d0 lsls r0, r2, #27
800aadc: bf44 itt mi
800aade: 2320 movmi r3, #32
800aae0: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800aae4: 0711 lsls r1, r2, #28
800aae6: bf44 itt mi
800aae8: 232b movmi r3, #43 @ 0x2b
800aaea: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800aaee: f89a 3000 ldrb.w r3, [sl]
800aaf2: 2b2a cmp r3, #42 @ 0x2a
800aaf4: d015 beq.n 800ab22 <_svfiprintf_r+0xfa>
800aaf6: 4654 mov r4, sl
800aaf8: 2000 movs r0, #0
800aafa: f04f 0c0a mov.w ip, #10
800aafe: 9a07 ldr r2, [sp, #28]
800ab00: 4621 mov r1, r4
800ab02: f811 3b01 ldrb.w r3, [r1], #1
800ab06: 3b30 subs r3, #48 @ 0x30
800ab08: 2b09 cmp r3, #9
800ab0a: d94b bls.n 800aba4 <_svfiprintf_r+0x17c>
800ab0c: b1b0 cbz r0, 800ab3c <_svfiprintf_r+0x114>
800ab0e: 9207 str r2, [sp, #28]
800ab10: e014 b.n 800ab3c <_svfiprintf_r+0x114>
800ab12: eba0 0308 sub.w r3, r0, r8
800ab16: fa09 f303 lsl.w r3, r9, r3
800ab1a: 4313 orrs r3, r2
800ab1c: 46a2 mov sl, r4
800ab1e: 9304 str r3, [sp, #16]
800ab20: e7d2 b.n 800aac8 <_svfiprintf_r+0xa0>
800ab22: 9b03 ldr r3, [sp, #12]
800ab24: 1d19 adds r1, r3, #4
800ab26: 681b ldr r3, [r3, #0]
800ab28: 9103 str r1, [sp, #12]
800ab2a: 2b00 cmp r3, #0
800ab2c: bfbb ittet lt
800ab2e: 425b neglt r3, r3
800ab30: f042 0202 orrlt.w r2, r2, #2
800ab34: 9307 strge r3, [sp, #28]
800ab36: 9307 strlt r3, [sp, #28]
800ab38: bfb8 it lt
800ab3a: 9204 strlt r2, [sp, #16]
800ab3c: 7823 ldrb r3, [r4, #0]
800ab3e: 2b2e cmp r3, #46 @ 0x2e
800ab40: d10a bne.n 800ab58 <_svfiprintf_r+0x130>
800ab42: 7863 ldrb r3, [r4, #1]
800ab44: 2b2a cmp r3, #42 @ 0x2a
800ab46: d132 bne.n 800abae <_svfiprintf_r+0x186>
800ab48: 9b03 ldr r3, [sp, #12]
800ab4a: 3402 adds r4, #2
800ab4c: 1d1a adds r2, r3, #4
800ab4e: 681b ldr r3, [r3, #0]
800ab50: 9203 str r2, [sp, #12]
800ab52: ea43 73e3 orr.w r3, r3, r3, asr #31
800ab56: 9305 str r3, [sp, #20]
800ab58: f8df a0b4 ldr.w sl, [pc, #180] @ 800ac10 <_svfiprintf_r+0x1e8>
800ab5c: 2203 movs r2, #3
800ab5e: 4650 mov r0, sl
800ab60: 7821 ldrb r1, [r4, #0]
800ab62: f000 fa17 bl 800af94 <memchr>
800ab66: b138 cbz r0, 800ab78 <_svfiprintf_r+0x150>
800ab68: 2240 movs r2, #64 @ 0x40
800ab6a: 9b04 ldr r3, [sp, #16]
800ab6c: eba0 000a sub.w r0, r0, sl
800ab70: 4082 lsls r2, r0
800ab72: 4313 orrs r3, r2
800ab74: 3401 adds r4, #1
800ab76: 9304 str r3, [sp, #16]
800ab78: f814 1b01 ldrb.w r1, [r4], #1
800ab7c: 2206 movs r2, #6
800ab7e: 4825 ldr r0, [pc, #148] @ (800ac14 <_svfiprintf_r+0x1ec>)
800ab80: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800ab84: f000 fa06 bl 800af94 <memchr>
800ab88: 2800 cmp r0, #0
800ab8a: d036 beq.n 800abfa <_svfiprintf_r+0x1d2>
800ab8c: 4b22 ldr r3, [pc, #136] @ (800ac18 <_svfiprintf_r+0x1f0>)
800ab8e: bb1b cbnz r3, 800abd8 <_svfiprintf_r+0x1b0>
800ab90: 9b03 ldr r3, [sp, #12]
800ab92: 3307 adds r3, #7
800ab94: f023 0307 bic.w r3, r3, #7
800ab98: 3308 adds r3, #8
800ab9a: 9303 str r3, [sp, #12]
800ab9c: 9b09 ldr r3, [sp, #36] @ 0x24
800ab9e: 4433 add r3, r6
800aba0: 9309 str r3, [sp, #36] @ 0x24
800aba2: e76a b.n 800aa7a <_svfiprintf_r+0x52>
800aba4: 460c mov r4, r1
800aba6: 2001 movs r0, #1
800aba8: fb0c 3202 mla r2, ip, r2, r3
800abac: e7a8 b.n 800ab00 <_svfiprintf_r+0xd8>
800abae: 2300 movs r3, #0
800abb0: f04f 0c0a mov.w ip, #10
800abb4: 4619 mov r1, r3
800abb6: 3401 adds r4, #1
800abb8: 9305 str r3, [sp, #20]
800abba: 4620 mov r0, r4
800abbc: f810 2b01 ldrb.w r2, [r0], #1
800abc0: 3a30 subs r2, #48 @ 0x30
800abc2: 2a09 cmp r2, #9
800abc4: d903 bls.n 800abce <_svfiprintf_r+0x1a6>
800abc6: 2b00 cmp r3, #0
800abc8: d0c6 beq.n 800ab58 <_svfiprintf_r+0x130>
800abca: 9105 str r1, [sp, #20]
800abcc: e7c4 b.n 800ab58 <_svfiprintf_r+0x130>
800abce: 4604 mov r4, r0
800abd0: 2301 movs r3, #1
800abd2: fb0c 2101 mla r1, ip, r1, r2
800abd6: e7f0 b.n 800abba <_svfiprintf_r+0x192>
800abd8: ab03 add r3, sp, #12
800abda: 9300 str r3, [sp, #0]
800abdc: 462a mov r2, r5
800abde: 4638 mov r0, r7
800abe0: 4b0e ldr r3, [pc, #56] @ (800ac1c <_svfiprintf_r+0x1f4>)
800abe2: a904 add r1, sp, #16
800abe4: f3af 8000 nop.w
800abe8: 1c42 adds r2, r0, #1
800abea: 4606 mov r6, r0
800abec: d1d6 bne.n 800ab9c <_svfiprintf_r+0x174>
800abee: 89ab ldrh r3, [r5, #12]
800abf0: 065b lsls r3, r3, #25
800abf2: f53f af2d bmi.w 800aa50 <_svfiprintf_r+0x28>
800abf6: 9809 ldr r0, [sp, #36] @ 0x24
800abf8: e72c b.n 800aa54 <_svfiprintf_r+0x2c>
800abfa: ab03 add r3, sp, #12
800abfc: 9300 str r3, [sp, #0]
800abfe: 462a mov r2, r5
800ac00: 4638 mov r0, r7
800ac02: 4b06 ldr r3, [pc, #24] @ (800ac1c <_svfiprintf_r+0x1f4>)
800ac04: a904 add r1, sp, #16
800ac06: f000 f87d bl 800ad04 <_printf_i>
800ac0a: e7ed b.n 800abe8 <_svfiprintf_r+0x1c0>
800ac0c: 0800b2a2 .word 0x0800b2a2
800ac10: 0800b2a8 .word 0x0800b2a8
800ac14: 0800b2ac .word 0x0800b2ac
800ac18: 00000000 .word 0x00000000
800ac1c: 0800a971 .word 0x0800a971
0800ac20 <_printf_common>:
800ac20: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800ac24: 4616 mov r6, r2
800ac26: 4698 mov r8, r3
800ac28: 688a ldr r2, [r1, #8]
800ac2a: 690b ldr r3, [r1, #16]
800ac2c: 4607 mov r7, r0
800ac2e: 4293 cmp r3, r2
800ac30: bfb8 it lt
800ac32: 4613 movlt r3, r2
800ac34: 6033 str r3, [r6, #0]
800ac36: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800ac3a: 460c mov r4, r1
800ac3c: f8dd 9020 ldr.w r9, [sp, #32]
800ac40: b10a cbz r2, 800ac46 <_printf_common+0x26>
800ac42: 3301 adds r3, #1
800ac44: 6033 str r3, [r6, #0]
800ac46: 6823 ldr r3, [r4, #0]
800ac48: 0699 lsls r1, r3, #26
800ac4a: bf42 ittt mi
800ac4c: 6833 ldrmi r3, [r6, #0]
800ac4e: 3302 addmi r3, #2
800ac50: 6033 strmi r3, [r6, #0]
800ac52: 6825 ldr r5, [r4, #0]
800ac54: f015 0506 ands.w r5, r5, #6
800ac58: d106 bne.n 800ac68 <_printf_common+0x48>
800ac5a: f104 0a19 add.w sl, r4, #25
800ac5e: 68e3 ldr r3, [r4, #12]
800ac60: 6832 ldr r2, [r6, #0]
800ac62: 1a9b subs r3, r3, r2
800ac64: 42ab cmp r3, r5
800ac66: dc2b bgt.n 800acc0 <_printf_common+0xa0>
800ac68: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800ac6c: 6822 ldr r2, [r4, #0]
800ac6e: 3b00 subs r3, #0
800ac70: bf18 it ne
800ac72: 2301 movne r3, #1
800ac74: 0692 lsls r2, r2, #26
800ac76: d430 bmi.n 800acda <_printf_common+0xba>
800ac78: 4641 mov r1, r8
800ac7a: 4638 mov r0, r7
800ac7c: f104 0243 add.w r2, r4, #67 @ 0x43
800ac80: 47c8 blx r9
800ac82: 3001 adds r0, #1
800ac84: d023 beq.n 800acce <_printf_common+0xae>
800ac86: 6823 ldr r3, [r4, #0]
800ac88: 6922 ldr r2, [r4, #16]
800ac8a: f003 0306 and.w r3, r3, #6
800ac8e: 2b04 cmp r3, #4
800ac90: bf14 ite ne
800ac92: 2500 movne r5, #0
800ac94: 6833 ldreq r3, [r6, #0]
800ac96: f04f 0600 mov.w r6, #0
800ac9a: bf08 it eq
800ac9c: 68e5 ldreq r5, [r4, #12]
800ac9e: f104 041a add.w r4, r4, #26
800aca2: bf08 it eq
800aca4: 1aed subeq r5, r5, r3
800aca6: f854 3c12 ldr.w r3, [r4, #-18]
800acaa: bf08 it eq
800acac: ea25 75e5 biceq.w r5, r5, r5, asr #31
800acb0: 4293 cmp r3, r2
800acb2: bfc4 itt gt
800acb4: 1a9b subgt r3, r3, r2
800acb6: 18ed addgt r5, r5, r3
800acb8: 42b5 cmp r5, r6
800acba: d11a bne.n 800acf2 <_printf_common+0xd2>
800acbc: 2000 movs r0, #0
800acbe: e008 b.n 800acd2 <_printf_common+0xb2>
800acc0: 2301 movs r3, #1
800acc2: 4652 mov r2, sl
800acc4: 4641 mov r1, r8
800acc6: 4638 mov r0, r7
800acc8: 47c8 blx r9
800acca: 3001 adds r0, #1
800accc: d103 bne.n 800acd6 <_printf_common+0xb6>
800acce: f04f 30ff mov.w r0, #4294967295
800acd2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800acd6: 3501 adds r5, #1
800acd8: e7c1 b.n 800ac5e <_printf_common+0x3e>
800acda: 2030 movs r0, #48 @ 0x30
800acdc: 18e1 adds r1, r4, r3
800acde: f881 0043 strb.w r0, [r1, #67] @ 0x43
800ace2: 1c5a adds r2, r3, #1
800ace4: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800ace8: 4422 add r2, r4
800acea: 3302 adds r3, #2
800acec: f882 1043 strb.w r1, [r2, #67] @ 0x43
800acf0: e7c2 b.n 800ac78 <_printf_common+0x58>
800acf2: 2301 movs r3, #1
800acf4: 4622 mov r2, r4
800acf6: 4641 mov r1, r8
800acf8: 4638 mov r0, r7
800acfa: 47c8 blx r9
800acfc: 3001 adds r0, #1
800acfe: d0e6 beq.n 800acce <_printf_common+0xae>
800ad00: 3601 adds r6, #1
800ad02: e7d9 b.n 800acb8 <_printf_common+0x98>
0800ad04 <_printf_i>:
800ad04: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800ad08: 7e0f ldrb r7, [r1, #24]
800ad0a: 4691 mov r9, r2
800ad0c: 2f78 cmp r7, #120 @ 0x78
800ad0e: 4680 mov r8, r0
800ad10: 460c mov r4, r1
800ad12: 469a mov sl, r3
800ad14: 9e0c ldr r6, [sp, #48] @ 0x30
800ad16: f101 0243 add.w r2, r1, #67 @ 0x43
800ad1a: d807 bhi.n 800ad2c <_printf_i+0x28>
800ad1c: 2f62 cmp r7, #98 @ 0x62
800ad1e: d80a bhi.n 800ad36 <_printf_i+0x32>
800ad20: 2f00 cmp r7, #0
800ad22: f000 80d1 beq.w 800aec8 <_printf_i+0x1c4>
800ad26: 2f58 cmp r7, #88 @ 0x58
800ad28: f000 80b8 beq.w 800ae9c <_printf_i+0x198>
800ad2c: f104 0642 add.w r6, r4, #66 @ 0x42
800ad30: f884 7042 strb.w r7, [r4, #66] @ 0x42
800ad34: e03a b.n 800adac <_printf_i+0xa8>
800ad36: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800ad3a: 2b15 cmp r3, #21
800ad3c: d8f6 bhi.n 800ad2c <_printf_i+0x28>
800ad3e: a101 add r1, pc, #4 @ (adr r1, 800ad44 <_printf_i+0x40>)
800ad40: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800ad44: 0800ad9d .word 0x0800ad9d
800ad48: 0800adb1 .word 0x0800adb1
800ad4c: 0800ad2d .word 0x0800ad2d
800ad50: 0800ad2d .word 0x0800ad2d
800ad54: 0800ad2d .word 0x0800ad2d
800ad58: 0800ad2d .word 0x0800ad2d
800ad5c: 0800adb1 .word 0x0800adb1
800ad60: 0800ad2d .word 0x0800ad2d
800ad64: 0800ad2d .word 0x0800ad2d
800ad68: 0800ad2d .word 0x0800ad2d
800ad6c: 0800ad2d .word 0x0800ad2d
800ad70: 0800aeaf .word 0x0800aeaf
800ad74: 0800addb .word 0x0800addb
800ad78: 0800ae69 .word 0x0800ae69
800ad7c: 0800ad2d .word 0x0800ad2d
800ad80: 0800ad2d .word 0x0800ad2d
800ad84: 0800aed1 .word 0x0800aed1
800ad88: 0800ad2d .word 0x0800ad2d
800ad8c: 0800addb .word 0x0800addb
800ad90: 0800ad2d .word 0x0800ad2d
800ad94: 0800ad2d .word 0x0800ad2d
800ad98: 0800ae71 .word 0x0800ae71
800ad9c: 6833 ldr r3, [r6, #0]
800ad9e: 1d1a adds r2, r3, #4
800ada0: 681b ldr r3, [r3, #0]
800ada2: 6032 str r2, [r6, #0]
800ada4: f104 0642 add.w r6, r4, #66 @ 0x42
800ada8: f884 3042 strb.w r3, [r4, #66] @ 0x42
800adac: 2301 movs r3, #1
800adae: e09c b.n 800aeea <_printf_i+0x1e6>
800adb0: 6833 ldr r3, [r6, #0]
800adb2: 6820 ldr r0, [r4, #0]
800adb4: 1d19 adds r1, r3, #4
800adb6: 6031 str r1, [r6, #0]
800adb8: 0606 lsls r6, r0, #24
800adba: d501 bpl.n 800adc0 <_printf_i+0xbc>
800adbc: 681d ldr r5, [r3, #0]
800adbe: e003 b.n 800adc8 <_printf_i+0xc4>
800adc0: 0645 lsls r5, r0, #25
800adc2: d5fb bpl.n 800adbc <_printf_i+0xb8>
800adc4: f9b3 5000 ldrsh.w r5, [r3]
800adc8: 2d00 cmp r5, #0
800adca: da03 bge.n 800add4 <_printf_i+0xd0>
800adcc: 232d movs r3, #45 @ 0x2d
800adce: 426d negs r5, r5
800add0: f884 3043 strb.w r3, [r4, #67] @ 0x43
800add4: 230a movs r3, #10
800add6: 4858 ldr r0, [pc, #352] @ (800af38 <_printf_i+0x234>)
800add8: e011 b.n 800adfe <_printf_i+0xfa>
800adda: 6821 ldr r1, [r4, #0]
800addc: 6833 ldr r3, [r6, #0]
800adde: 0608 lsls r0, r1, #24
800ade0: f853 5b04 ldr.w r5, [r3], #4
800ade4: d402 bmi.n 800adec <_printf_i+0xe8>
800ade6: 0649 lsls r1, r1, #25
800ade8: bf48 it mi
800adea: b2ad uxthmi r5, r5
800adec: 2f6f cmp r7, #111 @ 0x6f
800adee: 6033 str r3, [r6, #0]
800adf0: bf14 ite ne
800adf2: 230a movne r3, #10
800adf4: 2308 moveq r3, #8
800adf6: 4850 ldr r0, [pc, #320] @ (800af38 <_printf_i+0x234>)
800adf8: 2100 movs r1, #0
800adfa: f884 1043 strb.w r1, [r4, #67] @ 0x43
800adfe: 6866 ldr r6, [r4, #4]
800ae00: 2e00 cmp r6, #0
800ae02: 60a6 str r6, [r4, #8]
800ae04: db05 blt.n 800ae12 <_printf_i+0x10e>
800ae06: 6821 ldr r1, [r4, #0]
800ae08: 432e orrs r6, r5
800ae0a: f021 0104 bic.w r1, r1, #4
800ae0e: 6021 str r1, [r4, #0]
800ae10: d04b beq.n 800aeaa <_printf_i+0x1a6>
800ae12: 4616 mov r6, r2
800ae14: fbb5 f1f3 udiv r1, r5, r3
800ae18: fb03 5711 mls r7, r3, r1, r5
800ae1c: 5dc7 ldrb r7, [r0, r7]
800ae1e: f806 7d01 strb.w r7, [r6, #-1]!
800ae22: 462f mov r7, r5
800ae24: 42bb cmp r3, r7
800ae26: 460d mov r5, r1
800ae28: d9f4 bls.n 800ae14 <_printf_i+0x110>
800ae2a: 2b08 cmp r3, #8
800ae2c: d10b bne.n 800ae46 <_printf_i+0x142>
800ae2e: 6823 ldr r3, [r4, #0]
800ae30: 07df lsls r7, r3, #31
800ae32: d508 bpl.n 800ae46 <_printf_i+0x142>
800ae34: 6923 ldr r3, [r4, #16]
800ae36: 6861 ldr r1, [r4, #4]
800ae38: 4299 cmp r1, r3
800ae3a: bfde ittt le
800ae3c: 2330 movle r3, #48 @ 0x30
800ae3e: f806 3c01 strble.w r3, [r6, #-1]
800ae42: f106 36ff addle.w r6, r6, #4294967295
800ae46: 1b92 subs r2, r2, r6
800ae48: 6122 str r2, [r4, #16]
800ae4a: 464b mov r3, r9
800ae4c: 4621 mov r1, r4
800ae4e: 4640 mov r0, r8
800ae50: f8cd a000 str.w sl, [sp]
800ae54: aa03 add r2, sp, #12
800ae56: f7ff fee3 bl 800ac20 <_printf_common>
800ae5a: 3001 adds r0, #1
800ae5c: d14a bne.n 800aef4 <_printf_i+0x1f0>
800ae5e: f04f 30ff mov.w r0, #4294967295
800ae62: b004 add sp, #16
800ae64: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800ae68: 6823 ldr r3, [r4, #0]
800ae6a: f043 0320 orr.w r3, r3, #32
800ae6e: 6023 str r3, [r4, #0]
800ae70: 2778 movs r7, #120 @ 0x78
800ae72: 4832 ldr r0, [pc, #200] @ (800af3c <_printf_i+0x238>)
800ae74: f884 7045 strb.w r7, [r4, #69] @ 0x45
800ae78: 6823 ldr r3, [r4, #0]
800ae7a: 6831 ldr r1, [r6, #0]
800ae7c: 061f lsls r7, r3, #24
800ae7e: f851 5b04 ldr.w r5, [r1], #4
800ae82: d402 bmi.n 800ae8a <_printf_i+0x186>
800ae84: 065f lsls r7, r3, #25
800ae86: bf48 it mi
800ae88: b2ad uxthmi r5, r5
800ae8a: 6031 str r1, [r6, #0]
800ae8c: 07d9 lsls r1, r3, #31
800ae8e: bf44 itt mi
800ae90: f043 0320 orrmi.w r3, r3, #32
800ae94: 6023 strmi r3, [r4, #0]
800ae96: b11d cbz r5, 800aea0 <_printf_i+0x19c>
800ae98: 2310 movs r3, #16
800ae9a: e7ad b.n 800adf8 <_printf_i+0xf4>
800ae9c: 4826 ldr r0, [pc, #152] @ (800af38 <_printf_i+0x234>)
800ae9e: e7e9 b.n 800ae74 <_printf_i+0x170>
800aea0: 6823 ldr r3, [r4, #0]
800aea2: f023 0320 bic.w r3, r3, #32
800aea6: 6023 str r3, [r4, #0]
800aea8: e7f6 b.n 800ae98 <_printf_i+0x194>
800aeaa: 4616 mov r6, r2
800aeac: e7bd b.n 800ae2a <_printf_i+0x126>
800aeae: 6833 ldr r3, [r6, #0]
800aeb0: 6825 ldr r5, [r4, #0]
800aeb2: 1d18 adds r0, r3, #4
800aeb4: 6961 ldr r1, [r4, #20]
800aeb6: 6030 str r0, [r6, #0]
800aeb8: 062e lsls r6, r5, #24
800aeba: 681b ldr r3, [r3, #0]
800aebc: d501 bpl.n 800aec2 <_printf_i+0x1be>
800aebe: 6019 str r1, [r3, #0]
800aec0: e002 b.n 800aec8 <_printf_i+0x1c4>
800aec2: 0668 lsls r0, r5, #25
800aec4: d5fb bpl.n 800aebe <_printf_i+0x1ba>
800aec6: 8019 strh r1, [r3, #0]
800aec8: 2300 movs r3, #0
800aeca: 4616 mov r6, r2
800aecc: 6123 str r3, [r4, #16]
800aece: e7bc b.n 800ae4a <_printf_i+0x146>
800aed0: 6833 ldr r3, [r6, #0]
800aed2: 2100 movs r1, #0
800aed4: 1d1a adds r2, r3, #4
800aed6: 6032 str r2, [r6, #0]
800aed8: 681e ldr r6, [r3, #0]
800aeda: 6862 ldr r2, [r4, #4]
800aedc: 4630 mov r0, r6
800aede: f000 f859 bl 800af94 <memchr>
800aee2: b108 cbz r0, 800aee8 <_printf_i+0x1e4>
800aee4: 1b80 subs r0, r0, r6
800aee6: 6060 str r0, [r4, #4]
800aee8: 6863 ldr r3, [r4, #4]
800aeea: 6123 str r3, [r4, #16]
800aeec: 2300 movs r3, #0
800aeee: f884 3043 strb.w r3, [r4, #67] @ 0x43
800aef2: e7aa b.n 800ae4a <_printf_i+0x146>
800aef4: 4632 mov r2, r6
800aef6: 4649 mov r1, r9
800aef8: 4640 mov r0, r8
800aefa: 6923 ldr r3, [r4, #16]
800aefc: 47d0 blx sl
800aefe: 3001 adds r0, #1
800af00: d0ad beq.n 800ae5e <_printf_i+0x15a>
800af02: 6823 ldr r3, [r4, #0]
800af04: 079b lsls r3, r3, #30
800af06: d413 bmi.n 800af30 <_printf_i+0x22c>
800af08: 68e0 ldr r0, [r4, #12]
800af0a: 9b03 ldr r3, [sp, #12]
800af0c: 4298 cmp r0, r3
800af0e: bfb8 it lt
800af10: 4618 movlt r0, r3
800af12: e7a6 b.n 800ae62 <_printf_i+0x15e>
800af14: 2301 movs r3, #1
800af16: 4632 mov r2, r6
800af18: 4649 mov r1, r9
800af1a: 4640 mov r0, r8
800af1c: 47d0 blx sl
800af1e: 3001 adds r0, #1
800af20: d09d beq.n 800ae5e <_printf_i+0x15a>
800af22: 3501 adds r5, #1
800af24: 68e3 ldr r3, [r4, #12]
800af26: 9903 ldr r1, [sp, #12]
800af28: 1a5b subs r3, r3, r1
800af2a: 42ab cmp r3, r5
800af2c: dcf2 bgt.n 800af14 <_printf_i+0x210>
800af2e: e7eb b.n 800af08 <_printf_i+0x204>
800af30: 2500 movs r5, #0
800af32: f104 0619 add.w r6, r4, #25
800af36: e7f5 b.n 800af24 <_printf_i+0x220>
800af38: 0800b2b3 .word 0x0800b2b3
800af3c: 0800b2c4 .word 0x0800b2c4
0800af40 <memmove>:
800af40: 4288 cmp r0, r1
800af42: b510 push {r4, lr}
800af44: eb01 0402 add.w r4, r1, r2
800af48: d902 bls.n 800af50 <memmove+0x10>
800af4a: 4284 cmp r4, r0
800af4c: 4623 mov r3, r4
800af4e: d807 bhi.n 800af60 <memmove+0x20>
800af50: 1e43 subs r3, r0, #1
800af52: 42a1 cmp r1, r4
800af54: d008 beq.n 800af68 <memmove+0x28>
800af56: f811 2b01 ldrb.w r2, [r1], #1
800af5a: f803 2f01 strb.w r2, [r3, #1]!
800af5e: e7f8 b.n 800af52 <memmove+0x12>
800af60: 4601 mov r1, r0
800af62: 4402 add r2, r0
800af64: 428a cmp r2, r1
800af66: d100 bne.n 800af6a <memmove+0x2a>
800af68: bd10 pop {r4, pc}
800af6a: f813 4d01 ldrb.w r4, [r3, #-1]!
800af6e: f802 4d01 strb.w r4, [r2, #-1]!
800af72: e7f7 b.n 800af64 <memmove+0x24>
0800af74 <_sbrk_r>:
800af74: b538 push {r3, r4, r5, lr}
800af76: 2300 movs r3, #0
800af78: 4d05 ldr r5, [pc, #20] @ (800af90 <_sbrk_r+0x1c>)
800af7a: 4604 mov r4, r0
800af7c: 4608 mov r0, r1
800af7e: 602b str r3, [r5, #0]
800af80: f7f6 fe7c bl 8001c7c <_sbrk>
800af84: 1c43 adds r3, r0, #1
800af86: d102 bne.n 800af8e <_sbrk_r+0x1a>
800af88: 682b ldr r3, [r5, #0]
800af8a: b103 cbz r3, 800af8e <_sbrk_r+0x1a>
800af8c: 6023 str r3, [r4, #0]
800af8e: bd38 pop {r3, r4, r5, pc}
800af90: 200017cc .word 0x200017cc
0800af94 <memchr>:
800af94: 4603 mov r3, r0
800af96: b510 push {r4, lr}
800af98: b2c9 uxtb r1, r1
800af9a: 4402 add r2, r0
800af9c: 4293 cmp r3, r2
800af9e: 4618 mov r0, r3
800afa0: d101 bne.n 800afa6 <memchr+0x12>
800afa2: 2000 movs r0, #0
800afa4: e003 b.n 800afae <memchr+0x1a>
800afa6: 7804 ldrb r4, [r0, #0]
800afa8: 3301 adds r3, #1
800afaa: 428c cmp r4, r1
800afac: d1f6 bne.n 800af9c <memchr+0x8>
800afae: bd10 pop {r4, pc}
0800afb0 <memcpy>:
800afb0: 440a add r2, r1
800afb2: 4291 cmp r1, r2
800afb4: f100 33ff add.w r3, r0, #4294967295
800afb8: d100 bne.n 800afbc <memcpy+0xc>
800afba: 4770 bx lr
800afbc: b510 push {r4, lr}
800afbe: f811 4b01 ldrb.w r4, [r1], #1
800afc2: 4291 cmp r1, r2
800afc4: f803 4f01 strb.w r4, [r3, #1]!
800afc8: d1f9 bne.n 800afbe <memcpy+0xe>
800afca: bd10 pop {r4, pc}
0800afcc <_realloc_r>:
800afcc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800afd0: 4607 mov r7, r0
800afd2: 4614 mov r4, r2
800afd4: 460d mov r5, r1
800afd6: b921 cbnz r1, 800afe2 <_realloc_r+0x16>
800afd8: 4611 mov r1, r2
800afda: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800afde: f7ff bc3b b.w 800a858 <_malloc_r>
800afe2: b92a cbnz r2, 800aff0 <_realloc_r+0x24>
800afe4: f7ff fbce bl 800a784 <_free_r>
800afe8: 4625 mov r5, r4
800afea: 4628 mov r0, r5
800afec: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800aff0: f000 f81a bl 800b028 <_malloc_usable_size_r>
800aff4: 4284 cmp r4, r0
800aff6: 4606 mov r6, r0
800aff8: d802 bhi.n 800b000 <_realloc_r+0x34>
800affa: ebb4 0f50 cmp.w r4, r0, lsr #1
800affe: d8f4 bhi.n 800afea <_realloc_r+0x1e>
800b000: 4621 mov r1, r4
800b002: 4638 mov r0, r7
800b004: f7ff fc28 bl 800a858 <_malloc_r>
800b008: 4680 mov r8, r0
800b00a: b908 cbnz r0, 800b010 <_realloc_r+0x44>
800b00c: 4645 mov r5, r8
800b00e: e7ec b.n 800afea <_realloc_r+0x1e>
800b010: 42b4 cmp r4, r6
800b012: 4622 mov r2, r4
800b014: 4629 mov r1, r5
800b016: bf28 it cs
800b018: 4632 movcs r2, r6
800b01a: f7ff ffc9 bl 800afb0 <memcpy>
800b01e: 4629 mov r1, r5
800b020: 4638 mov r0, r7
800b022: f7ff fbaf bl 800a784 <_free_r>
800b026: e7f1 b.n 800b00c <_realloc_r+0x40>
0800b028 <_malloc_usable_size_r>:
800b028: f851 3c04 ldr.w r3, [r1, #-4]
800b02c: 1f18 subs r0, r3, #4
800b02e: 2b00 cmp r3, #0
800b030: bfbc itt lt
800b032: 580b ldrlt r3, [r1, r0]
800b034: 18c0 addlt r0, r0, r3
800b036: 4770 bx lr
0800b038 <_init>:
800b038: b5f8 push {r3, r4, r5, r6, r7, lr}
800b03a: bf00 nop
800b03c: bcf8 pop {r3, r4, r5, r6, r7}
800b03e: bc08 pop {r3}
800b040: 469e mov lr, r3
800b042: 4770 bx lr
0800b044 <_fini>:
800b044: b5f8 push {r3, r4, r5, r6, r7, lr}
800b046: bf00 nop
800b048: bcf8 pop {r3, r4, r5, r6, r7}
800b04a: bc08 pop {r3}
800b04c: 469e mov lr, r3
800b04e: 4770 bx lr
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