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4d139b6fcfff9ece3507430d701ce08554d8e9da
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea 4d139b6fcf wip
2026-05-14 19:44:46 +02:00

35013 lines
1.3 MiB
Raw Blame History

AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000e5c0 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000610 0800e6cc 0800e6cc 0000f6cc 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800ecdc 0800ecdc 000101dc 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800ecdc 0800ecdc 0000fcdc 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800ece4 0800ece4 000101dc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800ece4 0800ece4 0000fce4 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800ece8 0800ece8 0000fce8 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001dc 20000000 0800ecec 00010000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 000016bc 200001e0 0800eec8 000101e0 2**3
ALLOC
10 ._user_heap_stack 00000604 2000189c 0800eec8 0001089c 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000101dc 2**0
CONTENTS, READONLY
12 .debug_info 0001a4d2 00000000 00000000 00010205 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 000049fc 00000000 00000000 0002a6d7 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 000016a0 00000000 00000000 0002f0d8 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 0000115b 00000000 00000000 00030778 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001d284 00000000 00000000 000318d3 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001f115 00000000 00000000 0004eb57 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 00095e03 00000000 00000000 0006dc6c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 00103a6f 2**0
CONTENTS, READONLY
20 .debug_frame 00006170 00000000 00000000 00103ab4 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 00109c24 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001e0 .word 0x200001e0
8000128: 00000000 .word 0x00000000
800012c: 0800e6b4 .word 0x0800e6b4
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001e4 .word 0x200001e4
8000148: 0800e6b4 .word 0x0800e6b4
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <manageAdc>:
uint16_t ch5 ;
uint16_t ch6 ;
uint16_t ch7 ;
uint16_t ch8 ;
void manageAdc(void){
800015c: b480 push {r7}
800015e: af00 add r7, sp, #0
if (adc_avg_ready)
8000160: 4b12 ldr r3, [pc, #72] @ (80001ac <manageAdc+0x50>)
8000162: 781b ldrb r3, [r3, #0]
8000164: b2db uxtb r3, r3
8000166: 2b00 cmp r3, #0
8000168: d01b beq.n 80001a2 <manageAdc+0x46>
{
adc_avg_ready = 0;
800016a: 4b10 ldr r3, [pc, #64] @ (80001ac <manageAdc+0x50>)
800016c: 2200 movs r2, #0
800016e: 701a strb r2, [r3, #0]
// Read averaged channels (example mapping)
ch4 = adc_avg[0];
8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 <manageAdc+0x54>)
8000172: 881b ldrh r3, [r3, #0]
8000174: b29a uxth r2, r3
8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 <manageAdc+0x58>)
8000178: 801a strh r2, [r3, #0]
ch5 = adc_avg[1];
800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 <manageAdc+0x54>)
800017c: 885b ldrh r3, [r3, #2]
800017e: b29a uxth r2, r3
8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 <manageAdc+0x5c>)
8000182: 801a strh r2, [r3, #0]
ch6 = adc_avg[2];
8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 <manageAdc+0x54>)
8000186: 889b ldrh r3, [r3, #4]
8000188: b29a uxth r2, r3
800018a: 4b0c ldr r3, [pc, #48] @ (80001bc <manageAdc+0x60>)
800018c: 801a strh r2, [r3, #0]
ch7 = adc_avg[3];
800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 <manageAdc+0x54>)
8000190: 88db ldrh r3, [r3, #6]
8000192: b29a uxth r2, r3
8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 <manageAdc+0x64>)
8000196: 801a strh r2, [r3, #0]
ch8 = adc_avg[4];
8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 <manageAdc+0x54>)
800019a: 891b ldrh r3, [r3, #8]
800019c: b29a uxth r2, r3
800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 <manageAdc+0x68>)
80001a0: 801a strh r2, [r3, #0]
// Use them (convert to volts, control, etc.)
// float v4 = (3.3f * ch4) / 4095.0f;
}
}
80001a2: bf00 nop
80001a4: 46bd mov sp, r7
80001a6: bc80 pop {r7}
80001a8: 4770 bx lr
80001aa: bf00 nop
80001ac: 20000229 .word 0x20000229
80001b0: 20000208 .word 0x20000208
80001b4: 2000022a .word 0x2000022a
80001b8: 2000022c .word 0x2000022c
80001bc: 2000022e .word 0x2000022e
80001c0: 20000230 .word 0x20000230
80001c4: 20000232 .word 0x20000232
080001c8 <readAdc>:
void readAdc(void){
80001c8: b480 push {r7}
80001ca: b083 sub sp, #12
80001cc: af00 add r7, sp, #0
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001ce: 2300 movs r3, #0
80001d0: 71fb strb r3, [r7, #7]
80001d2: e010 b.n 80001f6 <readAdc+0x2e>
{
adc_sum[i] += adc_dma_buf[i];
80001d4: 79fb ldrb r3, [r7, #7]
80001d6: 4a21 ldr r2, [pc, #132] @ (800025c <readAdc+0x94>)
80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80001dc: b299 uxth r1, r3
80001de: 79fb ldrb r3, [r7, #7]
80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 <readAdc+0x98>)
80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2]
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 440a add r2, r1
80001ea: 491d ldr r1, [pc, #116] @ (8000260 <readAdc+0x98>)
80001ec: f841 2023 str.w r2, [r1, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001f0: 79fb ldrb r3, [r7, #7]
80001f2: 3301 adds r3, #1
80001f4: 71fb strb r3, [r7, #7]
80001f6: 79fb ldrb r3, [r7, #7]
80001f8: 2b04 cmp r3, #4
80001fa: d9eb bls.n 80001d4 <readAdc+0xc>
}
adc_sum_count++;
80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 <readAdc+0x9c>)
80001fe: 781b ldrb r3, [r3, #0]
8000200: 3301 adds r3, #1
8000202: b2da uxtb r2, r3
8000204: 4b17 ldr r3, [pc, #92] @ (8000264 <readAdc+0x9c>)
8000206: 701a strb r2, [r3, #0]
/* When we collected ADC_AVG_WINDOW samples → compute average */
if (adc_sum_count >= ADC_AVG_WINDOW)
8000208: 4b16 ldr r3, [pc, #88] @ (8000264 <readAdc+0x9c>)
800020a: 781b ldrb r3, [r3, #0]
800020c: 2b04 cmp r3, #4
800020e: d920 bls.n 8000252 <readAdc+0x8a>
{
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
8000210: 2300 movs r3, #0
8000212: 71bb strb r3, [r7, #6]
8000214: e014 b.n 8000240 <readAdc+0x78>
{
adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW);
8000216: 79bb ldrb r3, [r7, #6]
8000218: 4a11 ldr r2, [pc, #68] @ (8000260 <readAdc+0x98>)
800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800021e: 4a12 ldr r2, [pc, #72] @ (8000268 <readAdc+0xa0>)
8000220: fba2 2303 umull r2, r3, r2, r3
8000224: 089a lsrs r2, r3, #2
8000226: 79bb ldrb r3, [r7, #6]
8000228: b291 uxth r1, r2
800022a: 4a10 ldr r2, [pc, #64] @ (800026c <readAdc+0xa4>)
800022c: f822 1013 strh.w r1, [r2, r3, lsl #1]
adc_sum[i] = 0;
8000230: 79bb ldrb r3, [r7, #6]
8000232: 4a0b ldr r2, [pc, #44] @ (8000260 <readAdc+0x98>)
8000234: 2100 movs r1, #0
8000236: f842 1023 str.w r1, [r2, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
800023a: 79bb ldrb r3, [r7, #6]
800023c: 3301 adds r3, #1
800023e: 71bb strb r3, [r7, #6]
8000240: 79bb ldrb r3, [r7, #6]
8000242: 2b04 cmp r3, #4
8000244: d9e7 bls.n 8000216 <readAdc+0x4e>
}
adc_sum_count = 0;
8000246: 4b07 ldr r3, [pc, #28] @ (8000264 <readAdc+0x9c>)
8000248: 2200 movs r2, #0
800024a: 701a strb r2, [r3, #0]
adc_avg_ready = 1; // tell main loop new data is ready
800024c: 4b08 ldr r3, [pc, #32] @ (8000270 <readAdc+0xa8>)
800024e: 2201 movs r2, #1
8000250: 701a strb r2, [r3, #0]
}
}
8000252: bf00 nop
8000254: 370c adds r7, #12
8000256: 46bd mov sp, r7
8000258: bc80 pop {r7}
800025a: 4770 bx lr
800025c: 200001fc .word 0x200001fc
8000260: 20000214 .word 0x20000214
8000264: 20000228 .word 0x20000228
8000268: cccccccd .word 0xcccccccd
800026c: 20000208 .word 0x20000208
8000270: 20000229 .word 0x20000229
08000274 <EEW_Read>:
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data);
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
void loadEE(void);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
8000274: b580 push {r7, lr}
8000276: b082 sub sp, #8
8000278: af00 add r7, sp, #0
800027a: 4603 mov r3, r0
800027c: 6039 str r1, [r7, #0]
800027e: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000280: 79fb ldrb r3, [r7, #7]
8000282: b29b uxth r3, r3
8000284: 3301 adds r3, #1
8000286: b29b uxth r3, r3
8000288: 6839 ldr r1, [r7, #0]
800028a: 4618 mov r0, r3
800028c: f001 f85a bl 8001344 <EE_ReadVariable>
8000290: 4603 mov r3, r0
}
8000292: 4618 mov r0, r3
8000294: 3708 adds r7, #8
8000296: 46bd mov sp, r7
8000298: bd80 pop {r7, pc}
0800029a <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
800029a: b580 push {r7, lr}
800029c: b082 sub sp, #8
800029e: af00 add r7, sp, #0
80002a0: 4603 mov r3, r0
80002a2: 460a mov r2, r1
80002a4: 71fb strb r3, [r7, #7]
80002a6: 4613 mov r3, r2
80002a8: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80002aa: 79fb ldrb r3, [r7, #7]
80002ac: b29b uxth r3, r3
80002ae: 3301 adds r3, #1
80002b0: b29b uxth r3, r3
80002b2: 88ba ldrh r2, [r7, #4]
80002b4: 4611 mov r1, r2
80002b6: 4618 mov r0, r3
80002b8: f001 f860 bl 800137c <EE_WriteVariable>
80002bc: 4603 mov r3, r0
}
80002be: 4618 mov r0, r3
80002c0: 3708 adds r7, #8
80002c2: 46bd mov sp, r7
80002c4: bd80 pop {r7, pc}
080002c6 <toHex>:
extern omCiclo_st stCiclo;
extern omCiclo_st memstCiclo;
extern uint8_t stPulsanti;
extern bool nobuz;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80002c6: b490 push {r4, r7}
80002c8: b082 sub sp, #8
80002ca: af00 add r7, sp, #0
80002cc: 4604 mov r4, r0
80002ce: 4608 mov r0, r1
80002d0: 4611 mov r1, r2
80002d2: 461a mov r2, r3
80002d4: 4623 mov r3, r4
80002d6: 71fb strb r3, [r7, #7]
80002d8: 4603 mov r3, r0
80002da: 71bb strb r3, [r7, #6]
80002dc: 460b mov r3, r1
80002de: 717b strb r3, [r7, #5]
80002e0: 4613 mov r3, r2
80002e2: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80002e4: 79fb ldrb r3, [r7, #7]
80002e6: 2b2f cmp r3, #47 @ 0x2f
80002e8: d906 bls.n 80002f8 <toHex+0x32>
80002ea: 79fb ldrb r3, [r7, #7]
80002ec: 2b39 cmp r3, #57 @ 0x39
80002ee: d803 bhi.n 80002f8 <toHex+0x32>
c1-='0';
80002f0: 79fb ldrb r3, [r7, #7]
80002f2: 3b30 subs r3, #48 @ 0x30
80002f4: 71fb strb r3, [r7, #7]
80002f6: e00b b.n 8000310 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80002f8: 79fb ldrb r3, [r7, #7]
80002fa: 2b60 cmp r3, #96 @ 0x60
80002fc: d906 bls.n 800030c <toHex+0x46>
80002fe: 79fb ldrb r3, [r7, #7]
8000300: 2b66 cmp r3, #102 @ 0x66
8000302: d803 bhi.n 800030c <toHex+0x46>
c1=(c1-'a')+10;
8000304: 79fb ldrb r3, [r7, #7]
8000306: 3b57 subs r3, #87 @ 0x57
8000308: 71fb strb r3, [r7, #7]
800030a: e001 b.n 8000310 <toHex+0x4a>
}else return false;
800030c: 2300 movs r3, #0
800030e: e070 b.n 80003f2 <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
8000310: 79bb ldrb r3, [r7, #6]
8000312: 2b2f cmp r3, #47 @ 0x2f
8000314: d906 bls.n 8000324 <toHex+0x5e>
8000316: 79bb ldrb r3, [r7, #6]
8000318: 2b39 cmp r3, #57 @ 0x39
800031a: d803 bhi.n 8000324 <toHex+0x5e>
c2-='0';
800031c: 79bb ldrb r3, [r7, #6]
800031e: 3b30 subs r3, #48 @ 0x30
8000320: 71bb strb r3, [r7, #6]
8000322: e00b b.n 800033c <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
8000324: 79bb ldrb r3, [r7, #6]
8000326: 2b60 cmp r3, #96 @ 0x60
8000328: d906 bls.n 8000338 <toHex+0x72>
800032a: 79bb ldrb r3, [r7, #6]
800032c: 2b66 cmp r3, #102 @ 0x66
800032e: d803 bhi.n 8000338 <toHex+0x72>
c2=(c2-'a')+10;
8000330: 79bb ldrb r3, [r7, #6]
8000332: 3b57 subs r3, #87 @ 0x57
8000334: 71bb strb r3, [r7, #6]
8000336: e001 b.n 800033c <toHex+0x76>
}else return false;
8000338: 2300 movs r3, #0
800033a: e05a b.n 80003f2 <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
800033c: 797b ldrb r3, [r7, #5]
800033e: 2b2f cmp r3, #47 @ 0x2f
8000340: d906 bls.n 8000350 <toHex+0x8a>
8000342: 797b ldrb r3, [r7, #5]
8000344: 2b39 cmp r3, #57 @ 0x39
8000346: d803 bhi.n 8000350 <toHex+0x8a>
c3-='0';
8000348: 797b ldrb r3, [r7, #5]
800034a: 3b30 subs r3, #48 @ 0x30
800034c: 717b strb r3, [r7, #5]
800034e: e00b b.n 8000368 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000350: 797b ldrb r3, [r7, #5]
8000352: 2b60 cmp r3, #96 @ 0x60
8000354: d906 bls.n 8000364 <toHex+0x9e>
8000356: 797b ldrb r3, [r7, #5]
8000358: 2b66 cmp r3, #102 @ 0x66
800035a: d803 bhi.n 8000364 <toHex+0x9e>
c3=(c3-'a')+10;
800035c: 797b ldrb r3, [r7, #5]
800035e: 3b57 subs r3, #87 @ 0x57
8000360: 717b strb r3, [r7, #5]
8000362: e001 b.n 8000368 <toHex+0xa2>
}else return false;
8000364: 2300 movs r3, #0
8000366: e044 b.n 80003f2 <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000368: 793b ldrb r3, [r7, #4]
800036a: 2b2f cmp r3, #47 @ 0x2f
800036c: d906 bls.n 800037c <toHex+0xb6>
800036e: 793b ldrb r3, [r7, #4]
8000370: 2b39 cmp r3, #57 @ 0x39
8000372: d803 bhi.n 800037c <toHex+0xb6>
c4-='0';
8000374: 793b ldrb r3, [r7, #4]
8000376: 3b30 subs r3, #48 @ 0x30
8000378: 713b strb r3, [r7, #4]
800037a: e00b b.n 8000394 <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
800037c: 793b ldrb r3, [r7, #4]
800037e: 2b60 cmp r3, #96 @ 0x60
8000380: d906 bls.n 8000390 <toHex+0xca>
8000382: 793b ldrb r3, [r7, #4]
8000384: 2b66 cmp r3, #102 @ 0x66
8000386: d803 bhi.n 8000390 <toHex+0xca>
c4=(c4-'a')+10;
8000388: 793b ldrb r3, [r7, #4]
800038a: 3b57 subs r3, #87 @ 0x57
800038c: 713b strb r3, [r7, #4]
800038e: e001 b.n 8000394 <toHex+0xce>
}else return false;
8000390: 2300 movs r3, #0
8000392: e02e b.n 80003f2 <toHex+0x12c>
*retval=c1;
8000394: 79fb ldrb r3, [r7, #7]
8000396: b29a uxth r2, r3
8000398: 693b ldr r3, [r7, #16]
800039a: 801a strh r2, [r3, #0]
*retval*=16;
800039c: 693b ldr r3, [r7, #16]
800039e: 881b ldrh r3, [r3, #0]
80003a0: 011b lsls r3, r3, #4
80003a2: b29a uxth r2, r3
80003a4: 693b ldr r3, [r7, #16]
80003a6: 801a strh r2, [r3, #0]
*retval+=c2;
80003a8: 693b ldr r3, [r7, #16]
80003aa: 881a ldrh r2, [r3, #0]
80003ac: 79bb ldrb r3, [r7, #6]
80003ae: b29b uxth r3, r3
80003b0: 4413 add r3, r2
80003b2: b29a uxth r2, r3
80003b4: 693b ldr r3, [r7, #16]
80003b6: 801a strh r2, [r3, #0]
*retval*=16;
80003b8: 693b ldr r3, [r7, #16]
80003ba: 881b ldrh r3, [r3, #0]
80003bc: 011b lsls r3, r3, #4
80003be: b29a uxth r2, r3
80003c0: 693b ldr r3, [r7, #16]
80003c2: 801a strh r2, [r3, #0]
*retval+=c3;
80003c4: 693b ldr r3, [r7, #16]
80003c6: 881a ldrh r2, [r3, #0]
80003c8: 797b ldrb r3, [r7, #5]
80003ca: b29b uxth r3, r3
80003cc: 4413 add r3, r2
80003ce: b29a uxth r2, r3
80003d0: 693b ldr r3, [r7, #16]
80003d2: 801a strh r2, [r3, #0]
*retval*=16;
80003d4: 693b ldr r3, [r7, #16]
80003d6: 881b ldrh r3, [r3, #0]
80003d8: 011b lsls r3, r3, #4
80003da: b29a uxth r2, r3
80003dc: 693b ldr r3, [r7, #16]
80003de: 801a strh r2, [r3, #0]
*retval+=c4;
80003e0: 693b ldr r3, [r7, #16]
80003e2: 881a ldrh r2, [r3, #0]
80003e4: 793b ldrb r3, [r7, #4]
80003e6: b29b uxth r3, r3
80003e8: 4413 add r3, r2
80003ea: b29a uxth r2, r3
80003ec: 693b ldr r3, [r7, #16]
80003ee: 801a strh r2, [r3, #0]
return true;
80003f0: 2301 movs r3, #1
}
80003f2: 4618 mov r0, r3
80003f4: 3708 adds r7, #8
80003f6: 46bd mov sp, r7
80003f8: bc90 pop {r4, r7}
80003fa: 4770 bx lr
080003fc <manageCDC>:
void manageCDC(void){
80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8000400: b0a7 sub sp, #156 @ 0x9c
8000402: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
8000404: f00c fff2 bl 800d3ec <CDC_Available>
8000408: 4603 mov r3, r0
800040a: 2b00 cmp r3, #0
800040c: f000 8546 beq.w 8000e9c <manageCDC+0xaa0>
int rx = CDC_ReadByte();
8000410: f00d f800 bl 800d414 <CDC_ReadByte>
8000414: 67b8 str r0, [r7, #120] @ 0x78
if (rx < 0) return;
8000416: 6fbb ldr r3, [r7, #120] @ 0x78
8000418: 2b00 cmp r3, #0
800041a: f2c0 853e blt.w 8000e9a <manageCDC+0xa9e>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
800041e: 4bb9 ldr r3, [pc, #740] @ (8000704 <manageCDC+0x308>)
8000420: 781b ldrb r3, [r3, #0]
8000422: 461a mov r2, r3
8000424: 6fbb ldr r3, [r7, #120] @ 0x78
8000426: b2d9 uxtb r1, r3
8000428: 4bb7 ldr r3, [pc, #732] @ (8000708 <manageCDC+0x30c>)
800042a: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
800042c: bf00 nop
800042e: 4bb5 ldr r3, [pc, #724] @ (8000704 <manageCDC+0x308>)
8000430: 781b ldrb r3, [r3, #0]
8000432: 461a mov r2, r3
8000434: 4bb4 ldr r3, [pc, #720] @ (8000708 <manageCDC+0x30c>)
8000436: 4413 add r3, r2
8000438: 2101 movs r1, #1
800043a: 4618 mov r0, r3
800043c: f00d f8ac bl 800d598 <CDC_Transmit_FS>
8000440: 4603 mov r3, r0
8000442: 2b01 cmp r3, #1
8000444: d0f3 beq.n 800042e <manageCDC+0x32>
if((rx==0x0d)||(rx==0x0a)){
8000446: 6fbb ldr r3, [r7, #120] @ 0x78
8000448: 2b0d cmp r3, #13
800044a: d003 beq.n 8000454 <manageCDC+0x58>
800044c: 6fbb ldr r3, [r7, #120] @ 0x78
800044e: 2b0a cmp r3, #10
8000450: f040 851c bne.w 8000e8c <manageCDC+0xa90>
if(rxidx){
8000454: 4bab ldr r3, [pc, #684] @ (8000704 <manageCDC+0x308>)
8000456: 781b ldrb r3, [r3, #0]
8000458: 2b00 cmp r3, #0
800045a: f000 8513 beq.w 8000e84 <manageCDC+0xa88>
switch(rxbuf[0]){
800045e: 4baa ldr r3, [pc, #680] @ (8000708 <manageCDC+0x30c>)
8000460: 781b ldrb r3, [r3, #0]
8000462: 3b49 subs r3, #73 @ 0x49
8000464: 2b24 cmp r3, #36 @ 0x24
8000466: f200 84fb bhi.w 8000e60 <manageCDC+0xa64>
800046a: a201 add r2, pc, #4 @ (adr r2, 8000470 <manageCDC+0x74>)
800046c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000470: 080006b9 .word 0x080006b9
8000474: 08000e61 .word 0x08000e61
8000478: 08000e61 .word 0x08000e61
800047c: 08000e61 .word 0x08000e61
8000480: 08000e61 .word 0x08000e61
8000484: 08000e61 .word 0x08000e61
8000488: 08000e61 .word 0x08000e61
800048c: 08000e61 .word 0x08000e61
8000490: 08000e61 .word 0x08000e61
8000494: 08000e61 .word 0x08000e61
8000498: 08000e61 .word 0x08000e61
800049c: 08000e61 .word 0x08000e61
80004a0: 08000e61 .word 0x08000e61
80004a4: 08000e61 .word 0x08000e61
80004a8: 08000e61 .word 0x08000e61
80004ac: 08000e61 .word 0x08000e61
80004b0: 08000e61 .word 0x08000e61
80004b4: 08000e61 .word 0x08000e61
80004b8: 08000e61 .word 0x08000e61
80004bc: 08000e61 .word 0x08000e61
80004c0: 08000e61 .word 0x08000e61
80004c4: 08000e61 .word 0x08000e61
80004c8: 08000e61 .word 0x08000e61
80004cc: 08000e61 .word 0x08000e61
80004d0: 08000e61 .word 0x08000e61
80004d4: 080006db .word 0x080006db
80004d8: 08000e61 .word 0x08000e61
80004dc: 08000e61 .word 0x08000e61
80004e0: 080009d9 .word 0x080009d9
80004e4: 08000e61 .word 0x08000e61
80004e8: 08000e61 .word 0x08000e61
80004ec: 08000e61 .word 0x08000e61
80004f0: 08000505 .word 0x08000505
80004f4: 08000e61 .word 0x08000e61
80004f8: 08000e61 .word 0x08000e61
80004fc: 08000e61 .word 0x08000e61
8000500: 08000795 .word 0x08000795
case 'i':
sprintf((char*)s,"info\n");
8000504: f107 030c add.w r3, r7, #12
8000508: 4980 ldr r1, [pc, #512] @ (800070c <manageCDC+0x310>)
800050a: 4618 mov r0, r3
800050c: f00d fc22 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000510: bf00 nop
8000512: f107 030c add.w r3, r7, #12
8000516: 2105 movs r1, #5
8000518: 4618 mov r0, r3
800051a: f00d f83d bl 800d598 <CDC_Transmit_FS>
800051e: 4603 mov r3, r0
8000520: 2b01 cmp r3, #1
8000522: d0f6 beq.n 8000512 <manageCDC+0x116>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
8000524: 2100 movs r1, #0
8000526: 487a ldr r0, [pc, #488] @ (8000710 <manageCDC+0x314>)
8000528: f003 fc0e bl 8003d48 <IsPwmRunning>
800052c: 4603 mov r3, r0
800052e: 4698 mov r8, r3
8000530: 2104 movs r1, #4
8000532: 4877 ldr r0, [pc, #476] @ (8000710 <manageCDC+0x314>)
8000534: f003 fc08 bl 8003d48 <IsPwmRunning>
8000538: 4603 mov r3, r0
800053a: 4699 mov r9, r3
800053c: 2108 movs r1, #8
800053e: 4874 ldr r0, [pc, #464] @ (8000710 <manageCDC+0x314>)
8000540: f003 fc02 bl 8003d48 <IsPwmRunning>
8000544: 4603 mov r3, r0
8000546: 461c mov r4, r3
8000548: 210c movs r1, #12
800054a: 4871 ldr r0, [pc, #452] @ (8000710 <manageCDC+0x314>)
800054c: f003 fbfc bl 8003d48 <IsPwmRunning>
8000550: 4603 mov r3, r0
8000552: 461d mov r5, r3
8000554: 2100 movs r1, #0
8000556: 486f ldr r0, [pc, #444] @ (8000714 <manageCDC+0x318>)
8000558: f003 fbf6 bl 8003d48 <IsPwmRunning>
800055c: 4603 mov r3, r0
800055e: 461e mov r6, r3
8000560: 2104 movs r1, #4
8000562: 486c ldr r0, [pc, #432] @ (8000714 <manageCDC+0x318>)
8000564: f003 fbf0 bl 8003d48 <IsPwmRunning>
8000568: 4603 mov r3, r0
800056a: 607b str r3, [r7, #4]
800056c: 2108 movs r1, #8
800056e: 4869 ldr r0, [pc, #420] @ (8000714 <manageCDC+0x318>)
8000570: f003 fbea bl 8003d48 <IsPwmRunning>
8000574: 4603 mov r3, r0
8000576: 603b str r3, [r7, #0]
8000578: 210c movs r1, #12
800057a: 4866 ldr r0, [pc, #408] @ (8000714 <manageCDC+0x318>)
800057c: f003 fbe4 bl 8003d48 <IsPwmRunning>
8000580: 4603 mov r3, r0
8000582: f107 000c add.w r0, r7, #12
8000586: 9305 str r3, [sp, #20]
8000588: 683a ldr r2, [r7, #0]
800058a: 9204 str r2, [sp, #16]
800058c: 687b ldr r3, [r7, #4]
800058e: 9303 str r3, [sp, #12]
8000590: 9602 str r6, [sp, #8]
8000592: 9501 str r5, [sp, #4]
8000594: 9400 str r4, [sp, #0]
8000596: 464b mov r3, r9
8000598: 4642 mov r2, r8
800059a: 495f ldr r1, [pc, #380] @ (8000718 <manageCDC+0x31c>)
800059c: f00d fbda bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80005a0: bf00 nop
80005a2: f107 030c add.w r3, r7, #12
80005a6: 4618 mov r0, r3
80005a8: f7ff fdd0 bl 800014c <strlen>
80005ac: 4603 mov r3, r0
80005ae: b29a uxth r2, r3
80005b0: f107 030c add.w r3, r7, #12
80005b4: 4611 mov r1, r2
80005b6: 4618 mov r0, r3
80005b8: f00c ffee bl 800d598 <CDC_Transmit_FS>
80005bc: 4603 mov r3, r0
80005be: 2b01 cmp r3, #1
80005c0: d0ef beq.n 80005a2 <manageCDC+0x1a6>
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
80005c2: 4b53 ldr r3, [pc, #332] @ (8000710 <manageCDC+0x314>)
80005c4: 681b ldr r3, [r3, #0]
80005c6: 6b5b ldr r3, [r3, #52] @ 0x34
80005c8: 607b str r3, [r7, #4]
80005ca: 4b51 ldr r3, [pc, #324] @ (8000710 <manageCDC+0x314>)
80005cc: 681b ldr r3, [r3, #0]
80005ce: 6b99 ldr r1, [r3, #56] @ 0x38
80005d0: 6039 str r1, [r7, #0]
80005d2: 4b4f ldr r3, [pc, #316] @ (8000710 <manageCDC+0x314>)
80005d4: 681b ldr r3, [r3, #0]
80005d6: 6bdb ldr r3, [r3, #60] @ 0x3c
80005d8: 4a4d ldr r2, [pc, #308] @ (8000710 <manageCDC+0x314>)
80005da: 6812 ldr r2, [r2, #0]
80005dc: 6c12 ldr r2, [r2, #64] @ 0x40
80005de: 494d ldr r1, [pc, #308] @ (8000714 <manageCDC+0x318>)
80005e0: 6809 ldr r1, [r1, #0]
80005e2: 6b49 ldr r1, [r1, #52] @ 0x34
80005e4: 484b ldr r0, [pc, #300] @ (8000714 <manageCDC+0x318>)
80005e6: 6800 ldr r0, [r0, #0]
80005e8: 6b80 ldr r0, [r0, #56] @ 0x38
80005ea: 4c4a ldr r4, [pc, #296] @ (8000714 <manageCDC+0x318>)
80005ec: 6824 ldr r4, [r4, #0]
80005ee: 6be4 ldr r4, [r4, #60] @ 0x3c
80005f0: 4d48 ldr r5, [pc, #288] @ (8000714 <manageCDC+0x318>)
80005f2: 682d ldr r5, [r5, #0]
80005f4: 6c2d ldr r5, [r5, #64] @ 0x40
80005f6: f107 060c add.w r6, r7, #12
80005fa: 9505 str r5, [sp, #20]
80005fc: 9404 str r4, [sp, #16]
80005fe: 9003 str r0, [sp, #12]
8000600: 9102 str r1, [sp, #8]
8000602: 9201 str r2, [sp, #4]
8000604: 9300 str r3, [sp, #0]
8000606: 683b ldr r3, [r7, #0]
8000608: 687a ldr r2, [r7, #4]
800060a: 4944 ldr r1, [pc, #272] @ (800071c <manageCDC+0x320>)
800060c: 4630 mov r0, r6
800060e: f00d fba1 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000612: bf00 nop
8000614: f107 030c add.w r3, r7, #12
8000618: 4618 mov r0, r3
800061a: f7ff fd97 bl 800014c <strlen>
800061e: 4603 mov r3, r0
8000620: b29a uxth r2, r3
8000622: f107 030c add.w r3, r7, #12
8000626: 4611 mov r1, r2
8000628: 4618 mov r0, r3
800062a: f00c ffb5 bl 800d598 <CDC_Transmit_FS>
800062e: 4603 mov r3, r0
8000630: 2b01 cmp r3, #1
8000632: d0ef beq.n 8000614 <manageCDC+0x218>
sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8);
8000634: 4b3a ldr r3, [pc, #232] @ (8000720 <manageCDC+0x324>)
8000636: 781b ldrb r3, [r3, #0]
8000638: 461d mov r5, r3
800063a: 4b3a ldr r3, [pc, #232] @ (8000724 <manageCDC+0x328>)
800063c: 881b ldrh r3, [r3, #0]
800063e: 461e mov r6, r3
8000640: 4b39 ldr r3, [pc, #228] @ (8000728 <manageCDC+0x32c>)
8000642: 881b ldrh r3, [r3, #0]
8000644: 461a mov r2, r3
8000646: 4b39 ldr r3, [pc, #228] @ (800072c <manageCDC+0x330>)
8000648: 881b ldrh r3, [r3, #0]
800064a: 4619 mov r1, r3
800064c: 4b38 ldr r3, [pc, #224] @ (8000730 <manageCDC+0x334>)
800064e: 881b ldrh r3, [r3, #0]
8000650: 461c mov r4, r3
8000652: 4b38 ldr r3, [pc, #224] @ (8000734 <manageCDC+0x338>)
8000654: 881b ldrh r3, [r3, #0]
8000656: f107 000c add.w r0, r7, #12
800065a: 9303 str r3, [sp, #12]
800065c: 9402 str r4, [sp, #8]
800065e: 9101 str r1, [sp, #4]
8000660: 9200 str r2, [sp, #0]
8000662: 4633 mov r3, r6
8000664: 462a mov r2, r5
8000666: 4934 ldr r1, [pc, #208] @ (8000738 <manageCDC+0x33c>)
8000668: f00d fb74 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800066c: bf00 nop
800066e: f107 030c add.w r3, r7, #12
8000672: 4618 mov r0, r3
8000674: f7ff fd6a bl 800014c <strlen>
8000678: 4603 mov r3, r0
800067a: b29a uxth r2, r3
800067c: f107 030c add.w r3, r7, #12
8000680: 4611 mov r1, r2
8000682: 4618 mov r0, r3
8000684: f00c ff88 bl 800d598 <CDC_Transmit_FS>
8000688: 4603 mov r3, r0
800068a: 2b01 cmp r3, #1
800068c: d0ef beq.n 800066e <manageCDC+0x272>
sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti);
800068e: 4b2b ldr r3, [pc, #172] @ (800073c <manageCDC+0x340>)
8000690: 781b ldrb r3, [r3, #0]
8000692: 461a mov r2, r3
8000694: 4b2a ldr r3, [pc, #168] @ (8000740 <manageCDC+0x344>)
8000696: 781b ldrb r3, [r3, #0]
8000698: f107 000c add.w r0, r7, #12
800069c: 4929 ldr r1, [pc, #164] @ (8000744 <manageCDC+0x348>)
800069e: f00d fb59 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 31) == USBD_BUSY);
80006a2: bf00 nop
80006a4: f107 030c add.w r3, r7, #12
80006a8: 211f movs r1, #31
80006aa: 4618 mov r0, r3
80006ac: f00c ff74 bl 800d598 <CDC_Transmit_FS>
80006b0: 4603 mov r3, r0
80006b2: 2b01 cmp r3, #1
80006b4: d0f6 beq.n 80006a4 <manageCDC+0x2a8>
break;
80006b6: e3e5 b.n 8000e84 <manageCDC+0xa88>
case 'I':
sprintf((char*)s,"\nID000000");
80006b8: f107 030c add.w r3, r7, #12
80006bc: 4922 ldr r1, [pc, #136] @ (8000748 <manageCDC+0x34c>)
80006be: 4618 mov r0, r3
80006c0: f00d fb48 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 9) == USBD_BUSY);
80006c4: bf00 nop
80006c6: f107 030c add.w r3, r7, #12
80006ca: 2109 movs r1, #9
80006cc: 4618 mov r0, r3
80006ce: f00c ff63 bl 800d598 <CDC_Transmit_FS>
80006d2: 4603 mov r3, r0
80006d4: 2b01 cmp r3, #1
80006d6: d0f6 beq.n 80006c6 <manageCDC+0x2ca>
break;
80006d8: e3d4 b.n 8000e84 <manageCDC+0xa88>
case 'b':
if(rxidx==2){
80006da: 4b0a ldr r3, [pc, #40] @ (8000704 <manageCDC+0x308>)
80006dc: 781b ldrb r3, [r3, #0]
80006de: 2b02 cmp r3, #2
80006e0: d147 bne.n 8000772 <manageCDC+0x376>
if(rxbuf[1]=='0'){
80006e2: 4b09 ldr r3, [pc, #36] @ (8000708 <manageCDC+0x30c>)
80006e4: 785b ldrb r3, [r3, #1]
80006e6: 2b30 cmp r3, #48 @ 0x30
80006e8: d103 bne.n 80006f2 <manageCDC+0x2f6>
nobuz=false;
80006ea: 4b18 ldr r3, [pc, #96] @ (800074c <manageCDC+0x350>)
80006ec: 2200 movs r2, #0
80006ee: 701a strb r2, [r3, #0]
}
}else{
sprintf((char*)s,"\nb0|1");
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
}
break;
80006f0: e3c8 b.n 8000e84 <manageCDC+0xa88>
}else if(rxbuf[1]=='1'){
80006f2: 4b05 ldr r3, [pc, #20] @ (8000708 <manageCDC+0x30c>)
80006f4: 785b ldrb r3, [r3, #1]
80006f6: 2b31 cmp r3, #49 @ 0x31
80006f8: d12a bne.n 8000750 <manageCDC+0x354>
nobuz=true;
80006fa: 4b14 ldr r3, [pc, #80] @ (800074c <manageCDC+0x350>)
80006fc: 2201 movs r2, #1
80006fe: 701a strb r2, [r3, #0]
break;
8000700: e3c0 b.n 8000e84 <manageCDC+0xa88>
8000702: bf00 nop
8000704: 20000234 .word 0x20000234
8000708: 20000238 .word 0x20000238
800070c: 0800e6cc .word 0x0800e6cc
8000710: 20000318 .word 0x20000318
8000714: 20000360 .word 0x20000360
8000718: 0800e6d4 .word 0x0800e6d4
800071c: 0800e6ec .word 0x0800e6ec
8000720: 200003f0 .word 0x200003f0
8000724: 2000022a .word 0x2000022a
8000728: 2000022c .word 0x2000022c
800072c: 2000022e .word 0x2000022e
8000730: 20000230 .word 0x20000230
8000734: 20000232 .word 0x20000232
8000738: 0800e720 .word 0x0800e720
800073c: 2000044e .word 0x2000044e
8000740: 2000044c .word 0x2000044c
8000744: 0800e758 .word 0x0800e758
8000748: 0800e778 .word 0x0800e778
800074c: 20000450 .word 0x20000450
sprintf((char*)s,"\nb0|1");
8000750: f107 030c add.w r3, r7, #12
8000754: 4999 ldr r1, [pc, #612] @ (80009bc <manageCDC+0x5c0>)
8000756: 4618 mov r0, r3
8000758: f00d fafc bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800075c: bf00 nop
800075e: f107 030c add.w r3, r7, #12
8000762: 2105 movs r1, #5
8000764: 4618 mov r0, r3
8000766: f00c ff17 bl 800d598 <CDC_Transmit_FS>
800076a: 4603 mov r3, r0
800076c: 2b01 cmp r3, #1
800076e: d0f6 beq.n 800075e <manageCDC+0x362>
break;
8000770: e388 b.n 8000e84 <manageCDC+0xa88>
sprintf((char*)s,"\nb0|1");
8000772: f107 030c add.w r3, r7, #12
8000776: 4991 ldr r1, [pc, #580] @ (80009bc <manageCDC+0x5c0>)
8000778: 4618 mov r0, r3
800077a: f00d faeb bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800077e: bf00 nop
8000780: f107 030c add.w r3, r7, #12
8000784: 2105 movs r1, #5
8000786: 4618 mov r0, r3
8000788: f00c ff06 bl 800d598 <CDC_Transmit_FS>
800078c: 4603 mov r3, r0
800078e: 2b01 cmp r3, #1
8000790: d0f6 beq.n 8000780 <manageCDC+0x384>
break;
8000792: e377 b.n 8000e84 <manageCDC+0xa88>
case 'm':
if(rxidx==8){
8000794: 4b8a ldr r3, [pc, #552] @ (80009c0 <manageCDC+0x5c4>)
8000796: 781b ldrb r3, [r3, #0]
8000798: 2b08 cmp r3, #8
800079a: f040 80fd bne.w 8000998 <manageCDC+0x59c>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
800079e: 4b89 ldr r3, [pc, #548] @ (80009c4 <manageCDC+0x5c8>)
80007a0: 785b ldrb r3, [r3, #1]
80007a2: 2b30 cmp r3, #48 @ 0x30
80007a4: f240 80e7 bls.w 8000976 <manageCDC+0x57a>
80007a8: 4b86 ldr r3, [pc, #536] @ (80009c4 <manageCDC+0x5c8>)
80007aa: 785b ldrb r3, [r3, #1]
80007ac: 2b34 cmp r3, #52 @ 0x34
80007ae: f200 80e2 bhi.w 8000976 <manageCDC+0x57a>
mot=rxbuf[1]-='0';
80007b2: 4b84 ldr r3, [pc, #528] @ (80009c4 <manageCDC+0x5c8>)
80007b4: 785b ldrb r3, [r3, #1]
80007b6: 3b30 subs r3, #48 @ 0x30
80007b8: b2da uxtb r2, r3
80007ba: 4b82 ldr r3, [pc, #520] @ (80009c4 <manageCDC+0x5c8>)
80007bc: 705a strb r2, [r3, #1]
80007be: 4b81 ldr r3, [pc, #516] @ (80009c4 <manageCDC+0x5c8>)
80007c0: 785b ldrb r3, [r3, #1]
80007c2: f887 3077 strb.w r3, [r7, #119] @ 0x77
if(rxbuf[2]=='f'){
80007c6: 4b7f ldr r3, [pc, #508] @ (80009c4 <manageCDC+0x5c8>)
80007c8: 789b ldrb r3, [r3, #2]
80007ca: 2b66 cmp r3, #102 @ 0x66
80007cc: d103 bne.n 80007d6 <manageCDC+0x3da>
dir=FW;
80007ce: 2300 movs r3, #0
80007d0: f887 307f strb.w r3, [r7, #127] @ 0x7f
80007d4: e018 b.n 8000808 <manageCDC+0x40c>
}else if(rxbuf[2]=='b'){
80007d6: 4b7b ldr r3, [pc, #492] @ (80009c4 <manageCDC+0x5c8>)
80007d8: 789b ldrb r3, [r3, #2]
80007da: 2b62 cmp r3, #98 @ 0x62
80007dc: d103 bne.n 80007e6 <manageCDC+0x3ea>
dir=BW;
80007de: 2301 movs r3, #1
80007e0: f887 307f strb.w r3, [r7, #127] @ 0x7f
80007e4: e010 b.n 8000808 <manageCDC+0x40c>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80007e6: f107 030c add.w r3, r7, #12
80007ea: 4977 ldr r1, [pc, #476] @ (80009c8 <manageCDC+0x5cc>)
80007ec: 4618 mov r0, r3
80007ee: f00d fab1 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
80007f2: bf00 nop
80007f4: f107 030c add.w r3, r7, #12
80007f8: 2110 movs r1, #16
80007fa: 4618 mov r0, r3
80007fc: f00c fecc bl 800d598 <CDC_Transmit_FS>
8000800: 4603 mov r3, r0
8000802: 2b01 cmp r3, #1
8000804: d0f6 beq.n 80007f4 <manageCDC+0x3f8>
break;
8000806: e33d b.n 8000e84 <manageCDC+0xa88>
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000808: 4b6e ldr r3, [pc, #440] @ (80009c4 <manageCDC+0x5c8>)
800080a: 78db ldrb r3, [r3, #3]
800080c: 2b2f cmp r3, #47 @ 0x2f
800080e: f240 80a1 bls.w 8000954 <manageCDC+0x558>
8000812: 4b6c ldr r3, [pc, #432] @ (80009c4 <manageCDC+0x5c8>)
8000814: 78db ldrb r3, [r3, #3]
8000816: 2b39 cmp r3, #57 @ 0x39
8000818: f200 809c bhi.w 8000954 <manageCDC+0x558>
800081c: 4b69 ldr r3, [pc, #420] @ (80009c4 <manageCDC+0x5c8>)
800081e: 791b ldrb r3, [r3, #4]
8000820: 2b2f cmp r3, #47 @ 0x2f
8000822: f240 8097 bls.w 8000954 <manageCDC+0x558>
8000826: 4b67 ldr r3, [pc, #412] @ (80009c4 <manageCDC+0x5c8>)
8000828: 791b ldrb r3, [r3, #4]
800082a: 2b39 cmp r3, #57 @ 0x39
800082c: f200 8092 bhi.w 8000954 <manageCDC+0x558>
8000830: 4b64 ldr r3, [pc, #400] @ (80009c4 <manageCDC+0x5c8>)
8000832: 795b ldrb r3, [r3, #5]
8000834: 2b2f cmp r3, #47 @ 0x2f
8000836: f240 808d bls.w 8000954 <manageCDC+0x558>
800083a: 4b62 ldr r3, [pc, #392] @ (80009c4 <manageCDC+0x5c8>)
800083c: 795b ldrb r3, [r3, #5]
800083e: 2b39 cmp r3, #57 @ 0x39
8000840: f200 8088 bhi.w 8000954 <manageCDC+0x558>
8000844: 4b5f ldr r3, [pc, #380] @ (80009c4 <manageCDC+0x5c8>)
8000846: 799b ldrb r3, [r3, #6]
8000848: 2b2f cmp r3, #47 @ 0x2f
800084a: f240 8083 bls.w 8000954 <manageCDC+0x558>
800084e: 4b5d ldr r3, [pc, #372] @ (80009c4 <manageCDC+0x5c8>)
8000850: 799b ldrb r3, [r3, #6]
8000852: 2b39 cmp r3, #57 @ 0x39
8000854: d87e bhi.n 8000954 <manageCDC+0x558>
8000856: 4b5b ldr r3, [pc, #364] @ (80009c4 <manageCDC+0x5c8>)
8000858: 79db ldrb r3, [r3, #7]
800085a: 2b2f cmp r3, #47 @ 0x2f
800085c: d97a bls.n 8000954 <manageCDC+0x558>
800085e: 4b59 ldr r3, [pc, #356] @ (80009c4 <manageCDC+0x5c8>)
8000860: 79db ldrb r3, [r3, #7]
8000862: 2b39 cmp r3, #57 @ 0x39
8000864: d876 bhi.n 8000954 <manageCDC+0x558>
dm=rxbuf[3]-='0';
8000866: 4b57 ldr r3, [pc, #348] @ (80009c4 <manageCDC+0x5c8>)
8000868: 78db ldrb r3, [r3, #3]
800086a: 3b30 subs r3, #48 @ 0x30
800086c: b2da uxtb r2, r3
800086e: 4b55 ldr r3, [pc, #340] @ (80009c4 <manageCDC+0x5c8>)
8000870: 70da strb r2, [r3, #3]
8000872: 4b54 ldr r3, [pc, #336] @ (80009c4 <manageCDC+0x5c8>)
8000874: 78db ldrb r3, [r3, #3]
8000876: f887 3076 strb.w r3, [r7, #118] @ 0x76
m=rxbuf[4]-='0';
800087a: 4b52 ldr r3, [pc, #328] @ (80009c4 <manageCDC+0x5c8>)
800087c: 791b ldrb r3, [r3, #4]
800087e: 3b30 subs r3, #48 @ 0x30
8000880: b2da uxtb r2, r3
8000882: 4b50 ldr r3, [pc, #320] @ (80009c4 <manageCDC+0x5c8>)
8000884: 711a strb r2, [r3, #4]
8000886: 4b4f ldr r3, [pc, #316] @ (80009c4 <manageCDC+0x5c8>)
8000888: 791b ldrb r3, [r3, #4]
800088a: f887 3075 strb.w r3, [r7, #117] @ 0x75
c=rxbuf[5]-='0';
800088e: 4b4d ldr r3, [pc, #308] @ (80009c4 <manageCDC+0x5c8>)
8000890: 795b ldrb r3, [r3, #5]
8000892: 3b30 subs r3, #48 @ 0x30
8000894: b2da uxtb r2, r3
8000896: 4b4b ldr r3, [pc, #300] @ (80009c4 <manageCDC+0x5c8>)
8000898: 715a strb r2, [r3, #5]
800089a: 4b4a ldr r3, [pc, #296] @ (80009c4 <manageCDC+0x5c8>)
800089c: 795b ldrb r3, [r3, #5]
800089e: f887 3074 strb.w r3, [r7, #116] @ 0x74
d=rxbuf[6]-='0';
80008a2: 4b48 ldr r3, [pc, #288] @ (80009c4 <manageCDC+0x5c8>)
80008a4: 799b ldrb r3, [r3, #6]
80008a6: 3b30 subs r3, #48 @ 0x30
80008a8: b2da uxtb r2, r3
80008aa: 4b46 ldr r3, [pc, #280] @ (80009c4 <manageCDC+0x5c8>)
80008ac: 719a strb r2, [r3, #6]
80008ae: 4b45 ldr r3, [pc, #276] @ (80009c4 <manageCDC+0x5c8>)
80008b0: 799b ldrb r3, [r3, #6]
80008b2: f887 3073 strb.w r3, [r7, #115] @ 0x73
u=rxbuf[7]-='0';
80008b6: 4b43 ldr r3, [pc, #268] @ (80009c4 <manageCDC+0x5c8>)
80008b8: 79db ldrb r3, [r3, #7]
80008ba: 3b30 subs r3, #48 @ 0x30
80008bc: b2da uxtb r2, r3
80008be: 4b41 ldr r3, [pc, #260] @ (80009c4 <manageCDC+0x5c8>)
80008c0: 71da strb r2, [r3, #7]
80008c2: 4b40 ldr r3, [pc, #256] @ (80009c4 <manageCDC+0x5c8>)
80008c4: 79db ldrb r3, [r3, #7]
80008c6: f887 3072 strb.w r3, [r7, #114] @ 0x72
val=dm;
80008ca: f897 3076 ldrb.w r3, [r7, #118] @ 0x76
80008ce: b29b uxth r3, r3
80008d0: 817b strh r3, [r7, #10]
val*=10;
80008d2: 897b ldrh r3, [r7, #10]
80008d4: 461a mov r2, r3
80008d6: 0092 lsls r2, r2, #2
80008d8: 4413 add r3, r2
80008da: 005b lsls r3, r3, #1
80008dc: b29b uxth r3, r3
80008de: 817b strh r3, [r7, #10]
val+=m;
80008e0: f897 3075 ldrb.w r3, [r7, #117] @ 0x75
80008e4: b29a uxth r2, r3
80008e6: 897b ldrh r3, [r7, #10]
80008e8: 4413 add r3, r2
80008ea: b29b uxth r3, r3
80008ec: 817b strh r3, [r7, #10]
val*=10;
80008ee: 897b ldrh r3, [r7, #10]
80008f0: 461a mov r2, r3
80008f2: 0092 lsls r2, r2, #2
80008f4: 4413 add r3, r2
80008f6: 005b lsls r3, r3, #1
80008f8: b29b uxth r3, r3
80008fa: 817b strh r3, [r7, #10]
val+=c;
80008fc: f897 3074 ldrb.w r3, [r7, #116] @ 0x74
8000900: b29a uxth r2, r3
8000902: 897b ldrh r3, [r7, #10]
8000904: 4413 add r3, r2
8000906: b29b uxth r3, r3
8000908: 817b strh r3, [r7, #10]
val*=10;
800090a: 897b ldrh r3, [r7, #10]
800090c: 461a mov r2, r3
800090e: 0092 lsls r2, r2, #2
8000910: 4413 add r3, r2
8000912: 005b lsls r3, r3, #1
8000914: b29b uxth r3, r3
8000916: 817b strh r3, [r7, #10]
val+=d;
8000918: f897 3073 ldrb.w r3, [r7, #115] @ 0x73
800091c: b29a uxth r2, r3
800091e: 897b ldrh r3, [r7, #10]
8000920: 4413 add r3, r2
8000922: b29b uxth r3, r3
8000924: 817b strh r3, [r7, #10]
val*=10;
8000926: 897b ldrh r3, [r7, #10]
8000928: 461a mov r2, r3
800092a: 0092 lsls r2, r2, #2
800092c: 4413 add r3, r2
800092e: 005b lsls r3, r3, #1
8000930: b29b uxth r3, r3
8000932: 817b strh r3, [r7, #10]
val+=u;
8000934: f897 3072 ldrb.w r3, [r7, #114] @ 0x72
8000938: b29a uxth r2, r3
800093a: 897b ldrh r3, [r7, #10]
800093c: 4413 add r3, r2
800093e: b29b uxth r3, r3
8000940: 817b strh r3, [r7, #10]
SetMot(mot,dir,val);
8000942: 897a ldrh r2, [r7, #10]
8000944: f897 107f ldrb.w r1, [r7, #127] @ 0x7f
8000948: f897 3077 ldrb.w r3, [r7, #119] @ 0x77
800094c: 4618 mov r0, r3
800094e: f003 fa71 bl 8003e34 <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000952: e032 b.n 80009ba <manageCDC+0x5be>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
8000954: f107 030c add.w r3, r7, #12
8000958: 491c ldr r1, [pc, #112] @ (80009cc <manageCDC+0x5d0>)
800095a: 4618 mov r0, r3
800095c: f00d f9fa bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
8000960: bf00 nop
8000962: f107 030c add.w r3, r7, #12
8000966: 2113 movs r1, #19
8000968: 4618 mov r0, r3
800096a: f00c fe15 bl 800d598 <CDC_Transmit_FS>
800096e: 4603 mov r3, r0
8000970: 2b01 cmp r3, #1
8000972: d0f6 beq.n 8000962 <manageCDC+0x566>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000974: e021 b.n 80009ba <manageCDC+0x5be>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
8000976: f107 030c add.w r3, r7, #12
800097a: 4915 ldr r1, [pc, #84] @ (80009d0 <manageCDC+0x5d4>)
800097c: 4618 mov r0, r3
800097e: f00d f9e9 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
8000982: bf00 nop
8000984: f107 030c add.w r3, r7, #12
8000988: 2113 movs r1, #19
800098a: 4618 mov r0, r3
800098c: f00c fe04 bl 800d598 <CDC_Transmit_FS>
8000990: 4603 mov r3, r0
8000992: 2b01 cmp r3, #1
8000994: d0f6 beq.n 8000984 <manageCDC+0x588>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
8000996: e275 b.n 8000e84 <manageCDC+0xa88>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
8000998: f107 030c add.w r3, r7, #12
800099c: 490d ldr r1, [pc, #52] @ (80009d4 <manageCDC+0x5d8>)
800099e: 4618 mov r0, r3
80009a0: f00d f9d8 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80009a4: bf00 nop
80009a6: f107 030c add.w r3, r7, #12
80009aa: 210a movs r1, #10
80009ac: 4618 mov r0, r3
80009ae: f00c fdf3 bl 800d598 <CDC_Transmit_FS>
80009b2: 4603 mov r3, r0
80009b4: 2b01 cmp r3, #1
80009b6: d0f6 beq.n 80009a6 <manageCDC+0x5aa>
break;
80009b8: e264 b.n 8000e84 <manageCDC+0xa88>
80009ba: e263 b.n 8000e84 <manageCDC+0xa88>
80009bc: 0800e784 .word 0x0800e784
80009c0: 20000234 .word 0x20000234
80009c4: 20000238 .word 0x20000238
80009c8: 0800e78c .word 0x0800e78c
80009cc: 0800e7a0 .word 0x0800e7a0
80009d0: 0800e7c0 .word 0x0800e7c0
80009d4: 0800e7d4 .word 0x0800e7d4
case 'e':
if(rxidx>1){
80009d8: 4bbb ldr r3, [pc, #748] @ (8000cc8 <manageCDC+0x8cc>)
80009da: 781b ldrb r3, [r3, #0]
80009dc: 2b01 cmp r3, #1
80009de: f240 8227 bls.w 8000e30 <manageCDC+0xa34>
if(rxbuf[1]=='r'){
80009e2: 4bba ldr r3, [pc, #744] @ (8000ccc <manageCDC+0x8d0>)
80009e4: 785b ldrb r3, [r3, #1]
80009e6: 2b72 cmp r3, #114 @ 0x72
80009e8: f040 8086 bne.w 8000af8 <manageCDC+0x6fc>
if(rxidx==4){
80009ec: 4bb6 ldr r3, [pc, #728] @ (8000cc8 <manageCDC+0x8cc>)
80009ee: 781b ldrb r3, [r3, #0]
80009f0: 2b04 cmp r3, #4
80009f2: d169 bne.n 8000ac8 <manageCDC+0x6cc>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
80009f4: 4bb5 ldr r3, [pc, #724] @ (8000ccc <manageCDC+0x8d0>)
80009f6: 789a ldrb r2, [r3, #2]
80009f8: 4bb4 ldr r3, [pc, #720] @ (8000ccc <manageCDC+0x8d0>)
80009fa: 78d9 ldrb r1, [r3, #3]
80009fc: f107 0308 add.w r3, r7, #8
8000a00: 9300 str r3, [sp, #0]
8000a02: 460b mov r3, r1
8000a04: 2130 movs r1, #48 @ 0x30
8000a06: 2030 movs r0, #48 @ 0x30
8000a08: f7ff fc5d bl 80002c6 <toHex>
8000a0c: 4603 mov r3, r0
8000a0e: 2b00 cmp r3, #0
8000a10: d042 beq.n 8000a98 <manageCDC+0x69c>
st=EEW_Read(eeadd, &val);
8000a12: 893b ldrh r3, [r7, #8]
8000a14: b2db uxtb r3, r3
8000a16: f107 020a add.w r2, r7, #10
8000a1a: 4611 mov r1, r2
8000a1c: 4618 mov r0, r3
8000a1e: f7ff fc29 bl 8000274 <EEW_Read>
8000a22: 4603 mov r3, r0
8000a24: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000a28: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000a2c: 2b00 cmp r3, #0
8000a2e: d119 bne.n 8000a64 <manageCDC+0x668>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
8000a30: 893b ldrh r3, [r7, #8]
8000a32: 461a mov r2, r3
8000a34: 897b ldrh r3, [r7, #10]
8000a36: f107 000c add.w r0, r7, #12
8000a3a: 49a5 ldr r1, [pc, #660] @ (8000cd0 <manageCDC+0x8d4>)
8000a3c: f00d f98a bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a40: bf00 nop
8000a42: f107 030c add.w r3, r7, #12
8000a46: 4618 mov r0, r3
8000a48: f7ff fb80 bl 800014c <strlen>
8000a4c: 4603 mov r3, r0
8000a4e: b29a uxth r2, r3
8000a50: f107 030c add.w r3, r7, #12
8000a54: 4611 mov r1, r2
8000a56: 4618 mov r0, r3
8000a58: f00c fd9e bl 800d598 <CDC_Transmit_FS>
8000a5c: 4603 mov r3, r0
8000a5e: 2b01 cmp r3, #1
8000a60: d0ef beq.n 8000a42 <manageCDC+0x646>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
8000a62: e20e b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\nee read error %d",st);
8000a64: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000a68: f107 030c add.w r3, r7, #12
8000a6c: 4999 ldr r1, [pc, #612] @ (8000cd4 <manageCDC+0x8d8>)
8000a6e: 4618 mov r0, r3
8000a70: f00d f970 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a74: bf00 nop
8000a76: f107 030c add.w r3, r7, #12
8000a7a: 4618 mov r0, r3
8000a7c: f7ff fb66 bl 800014c <strlen>
8000a80: 4603 mov r3, r0
8000a82: b29a uxth r2, r3
8000a84: f107 030c add.w r3, r7, #12
8000a88: 4611 mov r1, r2
8000a8a: 4618 mov r0, r3
8000a8c: f00c fd84 bl 800d598 <CDC_Transmit_FS>
8000a90: 4603 mov r3, r0
8000a92: 2b01 cmp r3, #1
8000a94: d0ef beq.n 8000a76 <manageCDC+0x67a>
break;
8000a96: e1f4 b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?eraa hex values");
8000a98: f107 030c add.w r3, r7, #12
8000a9c: 498e ldr r1, [pc, #568] @ (8000cd8 <manageCDC+0x8dc>)
8000a9e: 4618 mov r0, r3
8000aa0: f00d f958 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000aa4: bf00 nop
8000aa6: f107 030c add.w r3, r7, #12
8000aaa: 4618 mov r0, r3
8000aac: f7ff fb4e bl 800014c <strlen>
8000ab0: 4603 mov r3, r0
8000ab2: b29a uxth r2, r3
8000ab4: f107 030c add.w r3, r7, #12
8000ab8: 4611 mov r1, r2
8000aba: 4618 mov r0, r3
8000abc: f00c fd6c bl 800d598 <CDC_Transmit_FS>
8000ac0: 4603 mov r3, r0
8000ac2: 2b01 cmp r3, #1
8000ac4: d0ef beq.n 8000aa6 <manageCDC+0x6aa>
break;
8000ac6: e1dc b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?eraa");
8000ac8: f107 030c add.w r3, r7, #12
8000acc: 4983 ldr r1, [pc, #524] @ (8000cdc <manageCDC+0x8e0>)
8000ace: 4618 mov r0, r3
8000ad0: f00d f940 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ad4: bf00 nop
8000ad6: f107 030c add.w r3, r7, #12
8000ada: 4618 mov r0, r3
8000adc: f7ff fb36 bl 800014c <strlen>
8000ae0: 4603 mov r3, r0
8000ae2: b29a uxth r2, r3
8000ae4: f107 030c add.w r3, r7, #12
8000ae8: 4611 mov r1, r2
8000aea: 4618 mov r0, r3
8000aec: f00c fd54 bl 800d598 <CDC_Transmit_FS>
8000af0: 4603 mov r3, r0
8000af2: 2b01 cmp r3, #1
8000af4: d0ef beq.n 8000ad6 <manageCDC+0x6da>
break;
8000af6: e1c4 b.n 8000e82 <manageCDC+0xa86>
}else if(rxbuf[1]=='w'){
8000af8: 4b74 ldr r3, [pc, #464] @ (8000ccc <manageCDC+0x8d0>)
8000afa: 785b ldrb r3, [r3, #1]
8000afc: 2b77 cmp r3, #119 @ 0x77
8000afe: d169 bne.n 8000bd4 <manageCDC+0x7d8>
if(rxidx==8){
8000b00: 4b71 ldr r3, [pc, #452] @ (8000cc8 <manageCDC+0x8cc>)
8000b02: 781b ldrb r3, [r3, #0]
8000b04: 2b08 cmp r3, #8
8000b06: d14d bne.n 8000ba4 <manageCDC+0x7a8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000b08: 4b70 ldr r3, [pc, #448] @ (8000ccc <manageCDC+0x8d0>)
8000b0a: 789a ldrb r2, [r3, #2]
8000b0c: 4b6f ldr r3, [pc, #444] @ (8000ccc <manageCDC+0x8d0>)
8000b0e: 78d9 ldrb r1, [r3, #3]
8000b10: f107 0308 add.w r3, r7, #8
8000b14: 9300 str r3, [sp, #0]
8000b16: 460b mov r3, r1
8000b18: 2130 movs r1, #48 @ 0x30
8000b1a: 2030 movs r0, #48 @ 0x30
8000b1c: f7ff fbd3 bl 80002c6 <toHex>
8000b20: 4603 mov r3, r0
8000b22: 2b00 cmp r3, #0
8000b24: d037 beq.n 8000b96 <manageCDC+0x79a>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000b26: 4b69 ldr r3, [pc, #420] @ (8000ccc <manageCDC+0x8d0>)
8000b28: 7918 ldrb r0, [r3, #4]
8000b2a: 4b68 ldr r3, [pc, #416] @ (8000ccc <manageCDC+0x8d0>)
8000b2c: 7959 ldrb r1, [r3, #5]
8000b2e: 4b67 ldr r3, [pc, #412] @ (8000ccc <manageCDC+0x8d0>)
8000b30: 799a ldrb r2, [r3, #6]
8000b32: 4b66 ldr r3, [pc, #408] @ (8000ccc <manageCDC+0x8d0>)
8000b34: 79dc ldrb r4, [r3, #7]
8000b36: f107 030a add.w r3, r7, #10
8000b3a: 9300 str r3, [sp, #0]
8000b3c: 4623 mov r3, r4
8000b3e: f7ff fbc2 bl 80002c6 <toHex>
8000b42: 4603 mov r3, r0
8000b44: 2b00 cmp r3, #0
8000b46: d01f beq.n 8000b88 <manageCDC+0x78c>
st=EEW_Write(eeadd, val);
8000b48: 893b ldrh r3, [r7, #8]
8000b4a: b2db uxtb r3, r3
8000b4c: 897a ldrh r2, [r7, #10]
8000b4e: 4611 mov r1, r2
8000b50: 4618 mov r0, r3
8000b52: f7ff fba2 bl 800029a <EEW_Write>
8000b56: 4603 mov r3, r0
8000b58: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000b5c: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000b60: 2b00 cmp r3, #0
8000b62: d108 bne.n 8000b76 <manageCDC+0x77a>
8000b64: 893b ldrh r3, [r7, #8]
8000b66: 461a mov r2, r3
8000b68: 897b ldrh r3, [r7, #10]
8000b6a: f107 000c add.w r0, r7, #12
8000b6e: 495c ldr r1, [pc, #368] @ (8000ce0 <manageCDC+0x8e4>)
8000b70: f00d f8f0 bl 800dd54 <siprintf>
8000b74: e01c b.n 8000bb0 <manageCDC+0x7b4>
else sprintf((char*)s,"\nee write error %d", st);
8000b76: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000b7a: f107 030c add.w r3, r7, #12
8000b7e: 4959 ldr r1, [pc, #356] @ (8000ce4 <manageCDC+0x8e8>)
8000b80: 4618 mov r0, r3
8000b82: f00d f8e7 bl 800dd54 <siprintf>
8000b86: e013 b.n 8000bb0 <manageCDC+0x7b4>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
8000b88: f107 030c add.w r3, r7, #12
8000b8c: 4956 ldr r1, [pc, #344] @ (8000ce8 <manageCDC+0x8ec>)
8000b8e: 4618 mov r0, r3
8000b90: f00d f8e0 bl 800dd54 <siprintf>
8000b94: e00c b.n 8000bb0 <manageCDC+0x7b4>
}else sprintf((char*)s,"\n?ewaa hex values");
8000b96: f107 030c add.w r3, r7, #12
8000b9a: 4954 ldr r1, [pc, #336] @ (8000cec <manageCDC+0x8f0>)
8000b9c: 4618 mov r0, r3
8000b9e: f00d f8d9 bl 800dd54 <siprintf>
8000ba2: e005 b.n 8000bb0 <manageCDC+0x7b4>
}else sprintf((char*)s,"\n?ewaavvvv");
8000ba4: f107 030c add.w r3, r7, #12
8000ba8: 4951 ldr r1, [pc, #324] @ (8000cf0 <manageCDC+0x8f4>)
8000baa: 4618 mov r0, r3
8000bac: f00d f8d2 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bb0: bf00 nop
8000bb2: f107 030c add.w r3, r7, #12
8000bb6: 4618 mov r0, r3
8000bb8: f7ff fac8 bl 800014c <strlen>
8000bbc: 4603 mov r3, r0
8000bbe: b29a uxth r2, r3
8000bc0: f107 030c add.w r3, r7, #12
8000bc4: 4611 mov r1, r2
8000bc6: 4618 mov r0, r3
8000bc8: f00c fce6 bl 800d598 <CDC_Transmit_FS>
8000bcc: 4603 mov r3, r0
8000bce: 2b01 cmp r3, #1
8000bd0: d0ef beq.n 8000bb2 <manageCDC+0x7b6>
break;
8000bd2: e156 b.n 8000e82 <manageCDC+0xa86>
}else if(rxbuf[1]=='d'){
8000bd4: 4b3d ldr r3, [pc, #244] @ (8000ccc <manageCDC+0x8d0>)
8000bd6: 785b ldrb r3, [r3, #1]
8000bd8: 2b64 cmp r3, #100 @ 0x64
8000bda: f040 80a9 bne.w 8000d30 <manageCDC+0x934>
if(rxidx==2){
8000bde: 4b3a ldr r3, [pc, #232] @ (8000cc8 <manageCDC+0x8cc>)
8000be0: 781b ldrb r3, [r3, #0]
8000be2: 2b02 cmp r3, #2
8000be4: f040 808c bne.w 8000d00 <manageCDC+0x904>
for(i=0;i<32;i++){
8000be8: 2300 movs r3, #0
8000bea: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000bee: e046 b.n 8000c7e <manageCDC+0x882>
st=EEW_Read(i, &val);
8000bf0: f107 020a add.w r2, r7, #10
8000bf4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000bf8: 4611 mov r1, r2
8000bfa: 4618 mov r0, r3
8000bfc: f7ff fb3a bl 8000274 <EEW_Read>
8000c00: 4603 mov r3, r0
8000c02: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000c06: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000c0a: 2b00 cmp r3, #0
8000c0c: d119 bne.n 8000c42 <manageCDC+0x846>
sprintf((char*)s,"\n0x%02x=%5d ",i,val);
8000c0e: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000c12: 897b ldrh r3, [r7, #10]
8000c14: f107 000c add.w r0, r7, #12
8000c18: 4936 ldr r1, [pc, #216] @ (8000cf4 <manageCDC+0x8f8>)
8000c1a: f00d f89b bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c1e: bf00 nop
8000c20: f107 030c add.w r3, r7, #12
8000c24: 4618 mov r0, r3
8000c26: f7ff fa91 bl 800014c <strlen>
8000c2a: 4603 mov r3, r0
8000c2c: b29a uxth r2, r3
8000c2e: f107 030c add.w r3, r7, #12
8000c32: 4611 mov r1, r2
8000c34: 4618 mov r0, r3
8000c36: f00c fcaf bl 800d598 <CDC_Transmit_FS>
8000c3a: 4603 mov r3, r0
8000c3c: 2b01 cmp r3, #1
8000c3e: d0ef beq.n 8000c20 <manageCDC+0x824>
8000c40: e018 b.n 8000c74 <manageCDC+0x878>
sprintf((char*)s,"rderr %d ",st);
8000c42: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000c46: f107 030c add.w r3, r7, #12
8000c4a: 492b ldr r1, [pc, #172] @ (8000cf8 <manageCDC+0x8fc>)
8000c4c: 4618 mov r0, r3
8000c4e: f00d f881 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c52: bf00 nop
8000c54: f107 030c add.w r3, r7, #12
8000c58: 4618 mov r0, r3
8000c5a: f7ff fa77 bl 800014c <strlen>
8000c5e: 4603 mov r3, r0
8000c60: b29a uxth r2, r3
8000c62: f107 030c add.w r3, r7, #12
8000c66: 4611 mov r1, r2
8000c68: 4618 mov r0, r3
8000c6a: f00c fc95 bl 800d598 <CDC_Transmit_FS>
8000c6e: 4603 mov r3, r0
8000c70: 2b01 cmp r3, #1
8000c72: d0ef beq.n 8000c54 <manageCDC+0x858>
for(i=0;i<32;i++){
8000c74: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c78: 3301 adds r3, #1
8000c7a: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000c7e: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c82: 2b1f cmp r3, #31
8000c84: d9b4 bls.n 8000bf0 <manageCDC+0x7f4>
if((i%4)==0){
8000c86: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c8a: f003 0303 and.w r3, r3, #3
8000c8e: b2db uxtb r3, r3
8000c90: 2b00 cmp r3, #0
8000c92: f040 80f6 bne.w 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n");
8000c96: f107 030c add.w r3, r7, #12
8000c9a: 4918 ldr r1, [pc, #96] @ (8000cfc <manageCDC+0x900>)
8000c9c: 4618 mov r0, r3
8000c9e: f00d f859 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ca2: bf00 nop
8000ca4: f107 030c add.w r3, r7, #12
8000ca8: 4618 mov r0, r3
8000caa: f7ff fa4f bl 800014c <strlen>
8000cae: 4603 mov r3, r0
8000cb0: b29a uxth r2, r3
8000cb2: f107 030c add.w r3, r7, #12
8000cb6: 4611 mov r1, r2
8000cb8: 4618 mov r0, r3
8000cba: f00c fc6d bl 800d598 <CDC_Transmit_FS>
8000cbe: 4603 mov r3, r0
8000cc0: 2b01 cmp r3, #1
8000cc2: d0ef beq.n 8000ca4 <manageCDC+0x8a8>
break;
8000cc4: e0dd b.n 8000e82 <manageCDC+0xa86>
8000cc6: bf00 nop
8000cc8: 20000234 .word 0x20000234
8000ccc: 20000238 .word 0x20000238
8000cd0: 0800e7e0 .word 0x0800e7e0
8000cd4: 0800e7f4 .word 0x0800e7f4
8000cd8: 0800e808 .word 0x0800e808
8000cdc: 0800e81c .word 0x0800e81c
8000ce0: 0800e824 .word 0x0800e824
8000ce4: 0800e838 .word 0x0800e838
8000ce8: 0800e84c .word 0x0800e84c
8000cec: 0800e864 .word 0x0800e864
8000cf0: 0800e878 .word 0x0800e878
8000cf4: 0800e884 .word 0x0800e884
8000cf8: 0800e894 .word 0x0800e894
8000cfc: 0800e8a0 .word 0x0800e8a0
sprintf((char*)s,"\n?ed");
8000d00: f107 030c add.w r3, r7, #12
8000d04: 4967 ldr r1, [pc, #412] @ (8000ea4 <manageCDC+0xaa8>)
8000d06: 4618 mov r0, r3
8000d08: f00d f824 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d0c: bf00 nop
8000d0e: f107 030c add.w r3, r7, #12
8000d12: 4618 mov r0, r3
8000d14: f7ff fa1a bl 800014c <strlen>
8000d18: 4603 mov r3, r0
8000d1a: b29a uxth r2, r3
8000d1c: f107 030c add.w r3, r7, #12
8000d20: 4611 mov r1, r2
8000d22: 4618 mov r0, r3
8000d24: f00c fc38 bl 800d598 <CDC_Transmit_FS>
8000d28: 4603 mov r3, r0
8000d2a: 2b01 cmp r3, #1
8000d2c: d0ef beq.n 8000d0e <manageCDC+0x912>
break;
8000d2e: e0a8 b.n 8000e82 <manageCDC+0xa86>
}else if(rxbuf[1]=='x'){
8000d30: 4b5d ldr r3, [pc, #372] @ (8000ea8 <manageCDC+0xaac>)
8000d32: 785b ldrb r3, [r3, #1]
8000d34: 2b78 cmp r3, #120 @ 0x78
8000d36: d163 bne.n 8000e00 <manageCDC+0xa04>
if(rxidx==2){
8000d38: 4b5c ldr r3, [pc, #368] @ (8000eac <manageCDC+0xab0>)
8000d3a: 781b ldrb r3, [r3, #0]
8000d3c: 2b02 cmp r3, #2
8000d3e: d147 bne.n 8000dd0 <manageCDC+0x9d4>
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
8000d40: 2300 movs r3, #0
8000d42: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000d46: e03c b.n 8000dc2 <manageCDC+0x9c6>
st=EEW_Write(i,deftab[i]);
8000d48: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000d4c: 4a58 ldr r2, [pc, #352] @ (8000eb0 <manageCDC+0xab4>)
8000d4e: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8000d52: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000d56: 4611 mov r1, r2
8000d58: 4618 mov r0, r3
8000d5a: f7ff fa9e bl 800029a <EEW_Write>
8000d5e: 4603 mov r3, r0
8000d60: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone %d=%d",i,deftab[i]);
8000d64: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000d68: 2b00 cmp r3, #0
8000d6a: d10c bne.n 8000d86 <manageCDC+0x98a>
8000d6c: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000d70: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000d74: 494e ldr r1, [pc, #312] @ (8000eb0 <manageCDC+0xab4>)
8000d76: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8000d7a: f107 000c add.w r0, r7, #12
8000d7e: 494d ldr r1, [pc, #308] @ (8000eb4 <manageCDC+0xab8>)
8000d80: f00c ffe8 bl 800dd54 <siprintf>
8000d84: e007 b.n 8000d96 <manageCDC+0x99a>
else sprintf((char*)s,"\nee write error %d", st);
8000d86: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000d8a: f107 030c add.w r3, r7, #12
8000d8e: 494a ldr r1, [pc, #296] @ (8000eb8 <manageCDC+0xabc>)
8000d90: 4618 mov r0, r3
8000d92: f00c ffdf bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d96: bf00 nop
8000d98: f107 030c add.w r3, r7, #12
8000d9c: 4618 mov r0, r3
8000d9e: f7ff f9d5 bl 800014c <strlen>
8000da2: 4603 mov r3, r0
8000da4: b29a uxth r2, r3
8000da6: f107 030c add.w r3, r7, #12
8000daa: 4611 mov r1, r2
8000dac: 4618 mov r0, r3
8000dae: f00c fbf3 bl 800d598 <CDC_Transmit_FS>
8000db2: 4603 mov r3, r0
8000db4: 2b01 cmp r3, #1
8000db6: d0ef beq.n 8000d98 <manageCDC+0x99c>
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
8000db8: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000dbc: 3301 adds r3, #1
8000dbe: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000dc2: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000dc6: 2b3f cmp r3, #63 @ 0x3f
8000dc8: d9be bls.n 8000d48 <manageCDC+0x94c>
loadEE();
8000dca: f000 fb11 bl 80013f0 <loadEE>
break;
8000dce: e058 b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?ex");
8000dd0: f107 030c add.w r3, r7, #12
8000dd4: 4939 ldr r1, [pc, #228] @ (8000ebc <manageCDC+0xac0>)
8000dd6: 4618 mov r0, r3
8000dd8: f00c ffbc bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ddc: bf00 nop
8000dde: f107 030c add.w r3, r7, #12
8000de2: 4618 mov r0, r3
8000de4: f7ff f9b2 bl 800014c <strlen>
8000de8: 4603 mov r3, r0
8000dea: b29a uxth r2, r3
8000dec: f107 030c add.w r3, r7, #12
8000df0: 4611 mov r1, r2
8000df2: 4618 mov r0, r3
8000df4: f00c fbd0 bl 800d598 <CDC_Transmit_FS>
8000df8: 4603 mov r3, r0
8000dfa: 2b01 cmp r3, #1
8000dfc: d0ef beq.n 8000dde <manageCDC+0x9e2>
break;
8000dfe: e040 b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?er|w|d|x");
8000e00: f107 030c add.w r3, r7, #12
8000e04: 492e ldr r1, [pc, #184] @ (8000ec0 <manageCDC+0xac4>)
8000e06: 4618 mov r0, r3
8000e08: f00c ffa4 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e0c: bf00 nop
8000e0e: f107 030c add.w r3, r7, #12
8000e12: 4618 mov r0, r3
8000e14: f7ff f99a bl 800014c <strlen>
8000e18: 4603 mov r3, r0
8000e1a: b29a uxth r2, r3
8000e1c: f107 030c add.w r3, r7, #12
8000e20: 4611 mov r1, r2
8000e22: 4618 mov r0, r3
8000e24: f00c fbb8 bl 800d598 <CDC_Transmit_FS>
8000e28: 4603 mov r3, r0
8000e2a: 2b01 cmp r3, #1
8000e2c: d0ef beq.n 8000e0e <manageCDC+0xa12>
break;
8000e2e: e028 b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?eraa | ewaavvvv");
8000e30: f107 030c add.w r3, r7, #12
8000e34: 4923 ldr r1, [pc, #140] @ (8000ec4 <manageCDC+0xac8>)
8000e36: 4618 mov r0, r3
8000e38: f00c ff8c bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e3c: bf00 nop
8000e3e: f107 030c add.w r3, r7, #12
8000e42: 4618 mov r0, r3
8000e44: f7ff f982 bl 800014c <strlen>
8000e48: 4603 mov r3, r0
8000e4a: b29a uxth r2, r3
8000e4c: f107 030c add.w r3, r7, #12
8000e50: 4611 mov r1, r2
8000e52: 4618 mov r0, r3
8000e54: f00c fba0 bl 800d598 <CDC_Transmit_FS>
8000e58: 4603 mov r3, r0
8000e5a: 2b01 cmp r3, #1
8000e5c: d0ef beq.n 8000e3e <manageCDC+0xa42>
break;
8000e5e: e010 b.n 8000e82 <manageCDC+0xa86>
default:
sprintf((char*)s,"\n?");
8000e60: f107 030c add.w r3, r7, #12
8000e64: 4918 ldr r1, [pc, #96] @ (8000ec8 <manageCDC+0xacc>)
8000e66: 4618 mov r0, r3
8000e68: f00c ff74 bl 800dd54 <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8000e6c: bf00 nop
8000e6e: f107 030c add.w r3, r7, #12
8000e72: 2102 movs r1, #2
8000e74: 4618 mov r0, r3
8000e76: f00c fb8f bl 800d598 <CDC_Transmit_FS>
8000e7a: 4603 mov r3, r0
8000e7c: 2b01 cmp r3, #1
8000e7e: d0f6 beq.n 8000e6e <manageCDC+0xa72>
break;
8000e80: e000 b.n 8000e84 <manageCDC+0xa88>
break;
8000e82: bf00 nop
}
}
rxidx=0;
8000e84: 4b09 ldr r3, [pc, #36] @ (8000eac <manageCDC+0xab0>)
8000e86: 2200 movs r2, #0
8000e88: 701a strb r2, [r3, #0]
8000e8a: e007 b.n 8000e9c <manageCDC+0xaa0>
}else rxidx++;
8000e8c: 4b07 ldr r3, [pc, #28] @ (8000eac <manageCDC+0xab0>)
8000e8e: 781b ldrb r3, [r3, #0]
8000e90: 3301 adds r3, #1
8000e92: b2da uxtb r2, r3
8000e94: 4b05 ldr r3, [pc, #20] @ (8000eac <manageCDC+0xab0>)
8000e96: 701a strb r2, [r3, #0]
8000e98: e000 b.n 8000e9c <manageCDC+0xaa0>
if (rx < 0) return;
8000e9a: bf00 nop
// tiny spin or yield
}
}
8000e9c: 3784 adds r7, #132 @ 0x84
8000e9e: 46bd mov sp, r7
8000ea0: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
8000ea4: 0800e8a4 .word 0x0800e8a4
8000ea8: 20000238 .word 0x20000238
8000eac: 20000234 .word 0x20000234
8000eb0: 0800eb7c .word 0x0800eb7c
8000eb4: 0800e8ac .word 0x0800e8ac
8000eb8: 0800e838 .word 0x0800e838
8000ebc: 0800e8b8 .word 0x0800e8b8
8000ec0: 0800e8c0 .word 0x0800e8c0
8000ec4: 0800e8cc .word 0x0800e8cc
8000ec8: 0800e8e0 .word 0x0800e8e0
08000ecc <debug>:
extern UART_HandleTypeDef huart1;
extern uint8_t pulsanti;
extern uint16_t stPulsanti;
extern omCiclo_st stCiclo;
void debug(void){
8000ecc: b580 push {r7, lr}
8000ece: b09a sub sp, #104 @ 0x68
8000ed0: af00 add r7, sp, #0
static uint8_t mempulsanti=0;
static uint16_t memstPulsanti=0;
static omCiclo_st memstCiclo=omchiuso;
char s [100];
if(mempulsanti!=pulsanti){
8000ed2: 4b2f ldr r3, [pc, #188] @ (8000f90 <debug+0xc4>)
8000ed4: 781a ldrb r2, [r3, #0]
8000ed6: 4b2f ldr r3, [pc, #188] @ (8000f94 <debug+0xc8>)
8000ed8: 781b ldrb r3, [r3, #0]
8000eda: 429a cmp r2, r3
8000edc: d017 beq.n 8000f0e <debug+0x42>
mempulsanti=pulsanti;
8000ede: 4b2d ldr r3, [pc, #180] @ (8000f94 <debug+0xc8>)
8000ee0: 781a ldrb r2, [r3, #0]
8000ee2: 4b2b ldr r3, [pc, #172] @ (8000f90 <debug+0xc4>)
8000ee4: 701a strb r2, [r3, #0]
sprintf(s,"\npulsanti=%X",pulsanti);
8000ee6: 4b2b ldr r3, [pc, #172] @ (8000f94 <debug+0xc8>)
8000ee8: 781b ldrb r3, [r3, #0]
8000eea: 461a mov r2, r3
8000eec: 1d3b adds r3, r7, #4
8000eee: 492a ldr r1, [pc, #168] @ (8000f98 <debug+0xcc>)
8000ef0: 4618 mov r0, r3
8000ef2: f00c ff2f bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000ef6: 1d3b adds r3, r7, #4
8000ef8: 4618 mov r0, r3
8000efa: f7ff f927 bl 800014c <strlen>
8000efe: 4603 mov r3, r0
8000f00: b29a uxth r2, r3
8000f02: 1d39 adds r1, r7, #4
8000f04: f04f 33ff mov.w r3, #4294967295
8000f08: 4824 ldr r0, [pc, #144] @ (8000f9c <debug+0xd0>)
8000f0a: f008 f933 bl 8009174 <HAL_UART_Transmit>
}
if(memstPulsanti!=stPulsanti){
8000f0e: 4b24 ldr r3, [pc, #144] @ (8000fa0 <debug+0xd4>)
8000f10: 881a ldrh r2, [r3, #0]
8000f12: 4b24 ldr r3, [pc, #144] @ (8000fa4 <debug+0xd8>)
8000f14: 881b ldrh r3, [r3, #0]
8000f16: 429a cmp r2, r3
8000f18: d017 beq.n 8000f4a <debug+0x7e>
memstPulsanti=stPulsanti;
8000f1a: 4b22 ldr r3, [pc, #136] @ (8000fa4 <debug+0xd8>)
8000f1c: 881a ldrh r2, [r3, #0]
8000f1e: 4b20 ldr r3, [pc, #128] @ (8000fa0 <debug+0xd4>)
8000f20: 801a strh r2, [r3, #0]
sprintf(s,"\nstpulsanti=%X",stPulsanti);
8000f22: 4b20 ldr r3, [pc, #128] @ (8000fa4 <debug+0xd8>)
8000f24: 881b ldrh r3, [r3, #0]
8000f26: 461a mov r2, r3
8000f28: 1d3b adds r3, r7, #4
8000f2a: 491f ldr r1, [pc, #124] @ (8000fa8 <debug+0xdc>)
8000f2c: 4618 mov r0, r3
8000f2e: f00c ff11 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000f32: 1d3b adds r3, r7, #4
8000f34: 4618 mov r0, r3
8000f36: f7ff f909 bl 800014c <strlen>
8000f3a: 4603 mov r3, r0
8000f3c: b29a uxth r2, r3
8000f3e: 1d39 adds r1, r7, #4
8000f40: f04f 33ff mov.w r3, #4294967295
8000f44: 4815 ldr r0, [pc, #84] @ (8000f9c <debug+0xd0>)
8000f46: f008 f915 bl 8009174 <HAL_UART_Transmit>
}
if(memstCiclo!=stCiclo){
8000f4a: 4b18 ldr r3, [pc, #96] @ (8000fac <debug+0xe0>)
8000f4c: 781a ldrb r2, [r3, #0]
8000f4e: 4b18 ldr r3, [pc, #96] @ (8000fb0 <debug+0xe4>)
8000f50: 781b ldrb r3, [r3, #0]
8000f52: 429a cmp r2, r3
8000f54: d017 beq.n 8000f86 <debug+0xba>
memstCiclo=stCiclo;
8000f56: 4b16 ldr r3, [pc, #88] @ (8000fb0 <debug+0xe4>)
8000f58: 781a ldrb r2, [r3, #0]
8000f5a: 4b14 ldr r3, [pc, #80] @ (8000fac <debug+0xe0>)
8000f5c: 701a strb r2, [r3, #0]
sprintf(s,"\nstCiclo=%d",stCiclo);
8000f5e: 4b14 ldr r3, [pc, #80] @ (8000fb0 <debug+0xe4>)
8000f60: 781b ldrb r3, [r3, #0]
8000f62: 461a mov r2, r3
8000f64: 1d3b adds r3, r7, #4
8000f66: 4913 ldr r1, [pc, #76] @ (8000fb4 <debug+0xe8>)
8000f68: 4618 mov r0, r3
8000f6a: f00c fef3 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000f6e: 1d3b adds r3, r7, #4
8000f70: 4618 mov r0, r3
8000f72: f7ff f8eb bl 800014c <strlen>
8000f76: 4603 mov r3, r0
8000f78: b29a uxth r2, r3
8000f7a: 1d39 adds r1, r7, #4
8000f7c: f04f 33ff mov.w r3, #4294967295
8000f80: 4806 ldr r0, [pc, #24] @ (8000f9c <debug+0xd0>)
8000f82: f008 f8f7 bl 8009174 <HAL_UART_Transmit>
}
}
8000f86: bf00 nop
8000f88: 3768 adds r7, #104 @ 0x68
8000f8a: 46bd mov sp, r7
8000f8c: bd80 pop {r7, pc}
8000f8e: bf00 nop
8000f90: 2000029c .word 0x2000029c
8000f94: 200003f0 .word 0x200003f0
8000f98: 0800e8e4 .word 0x0800e8e4
8000f9c: 200003a8 .word 0x200003a8
8000fa0: 2000029e .word 0x2000029e
8000fa4: 2000044c .word 0x2000044c
8000fa8: 0800e8f4 .word 0x0800e8f4
8000fac: 200002a0 .word 0x200002a0
8000fb0: 2000044e .word 0x2000044e
8000fb4: 0800e904 .word 0x0800e904
08000fb8 <EEW_Read>:
{
8000fb8: b580 push {r7, lr}
8000fba: b082 sub sp, #8
8000fbc: af00 add r7, sp, #0
8000fbe: 4603 mov r3, r0
8000fc0: 6039 str r1, [r7, #0]
8000fc2: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000fc4: 79fb ldrb r3, [r7, #7]
8000fc6: b29b uxth r3, r3
8000fc8: 3301 adds r3, #1
8000fca: b29b uxth r3, r3
8000fcc: 6839 ldr r1, [r7, #0]
8000fce: 4618 mov r0, r3
8000fd0: f000 f9b8 bl 8001344 <EE_ReadVariable>
8000fd4: 4603 mov r3, r0
}
8000fd6: 4618 mov r0, r3
8000fd8: 3708 adds r7, #8
8000fda: 46bd mov sp, r7
8000fdc: bd80 pop {r7, pc}
08000fde <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
8000fde: b480 push {r7}
8000fe0: b083 sub sp, #12
8000fe2: af00 add r7, sp, #0
8000fe4: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
8000fe6: 687b ldr r3, [r7, #4]
8000fe8: 881b ldrh r3, [r3, #0]
8000fea: b29b uxth r3, r3
}
8000fec: 4618 mov r0, r3
8000fee: 370c adds r7, #12
8000ff0: 46bd mov sp, r7
8000ff2: bc80 pop {r7}
8000ff4: 4770 bx lr
08000ff6 <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
8000ff6: b5b0 push {r4, r5, r7, lr}
8000ff8: b084 sub sp, #16
8000ffa: af00 add r7, sp, #0
8000ffc: 6078 str r0, [r7, #4]
8000ffe: 460b mov r3, r1
8001000: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8001002: f004 fc8d bl 8005920 <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
8001006: 887b ldrh r3, [r7, #2]
8001008: 2200 movs r2, #0
800100a: 461c mov r4, r3
800100c: 4615 mov r5, r2
800100e: 4622 mov r2, r4
8001010: 462b mov r3, r5
8001012: 6879 ldr r1, [r7, #4]
8001014: 2001 movs r0, #1
8001016: f004 fc13 bl 8005840 <HAL_FLASH_Program>
800101a: 4603 mov r3, r0
800101c: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
800101e: f004 fca5 bl 800596c <HAL_FLASH_Lock>
return status;
8001022: 7bfb ldrb r3, [r7, #15]
}
8001024: 4618 mov r0, r3
8001026: 3710 adds r7, #16
8001028: 46bd mov sp, r7
800102a: bdb0 pop {r4, r5, r7, pc}
0800102c <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
800102c: b580 push {r7, lr}
800102e: b088 sub sp, #32
8001030: af00 add r7, sp, #0
8001032: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8001034: 2300 movs r3, #0
8001036: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
8001038: f004 fc72 bl 8005920 <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
800103c: 2300 movs r3, #0
800103e: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8001040: 687b ldr r3, [r7, #4]
8001042: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8001044: 2301 movs r3, #1
8001046: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
8001048: f107 0208 add.w r2, r7, #8
800104c: f107 030c add.w r3, r7, #12
8001050: 4611 mov r1, r2
8001052: 4618 mov r0, r3
8001054: f004 fd4c bl 8005af0 <HAL_FLASHEx_Erase>
8001058: 4603 mov r3, r0
800105a: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
800105c: f004 fc86 bl 800596c <HAL_FLASH_Lock>
return status;
8001060: 7ffb ldrb r3, [r7, #31]
}
8001062: 4618 mov r0, r3
8001064: 3720 adds r7, #32
8001066: 46bd mov sp, r7
8001068: bd80 pop {r7, pc}
0800106a <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
800106a: b480 push {r7}
800106c: b087 sub sp, #28
800106e: af00 add r7, sp, #0
8001070: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8001072: 687b ldr r3, [r7, #4]
8001074: 3302 adds r3, #2
8001076: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8001078: 687b ldr r3, [r7, #4]
800107a: f503 6380 add.w r3, r3, #1024 @ 0x400
800107e: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8001080: e00c b.n 800109c <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8001082: 697b ldr r3, [r7, #20]
8001084: 881b ldrh r3, [r3, #0]
8001086: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
8001088: 89fb ldrh r3, [r7, #14]
800108a: f64f 72ff movw r2, #65535 @ 0xffff
800108e: 4293 cmp r3, r2
8001090: d101 bne.n 8001096 <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
8001092: 697b ldr r3, [r7, #20]
8001094: e008 b.n 80010a8 <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
8001096: 697b ldr r3, [r7, #20]
8001098: 3304 adds r3, #4
800109a: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
800109c: 693b ldr r3, [r7, #16]
800109e: 3b03 subs r3, #3
80010a0: 697a ldr r2, [r7, #20]
80010a2: 429a cmp r2, r3
80010a4: d3ed bcc.n 8001082 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
80010a6: 2300 movs r3, #0
}
80010a8: 4618 mov r0, r3
80010aa: 371c adds r7, #28
80010ac: 46bd mov sp, r7
80010ae: bc80 pop {r7}
80010b0: 4770 bx lr
080010b2 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
80010b2: b480 push {r7}
80010b4: b089 sub sp, #36 @ 0x24
80010b6: af00 add r7, sp, #0
80010b8: 60f8 str r0, [r7, #12]
80010ba: 460b mov r3, r1
80010bc: 607a str r2, [r7, #4]
80010be: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
80010c0: 68fb ldr r3, [r7, #12]
80010c2: 3302 adds r3, #2
80010c4: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
80010c6: 68fb ldr r3, [r7, #12]
80010c8: f503 6380 add.w r3, r3, #1024 @ 0x400
80010cc: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
80010ce: 2302 movs r3, #2
80010d0: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
80010d2: 2300 movs r3, #0
80010d4: 833b strh r3, [r7, #24]
if (Data == NULL)
80010d6: 687b ldr r3, [r7, #4]
80010d8: 2b00 cmp r3, #0
80010da: d118 bne.n 800110e <EE_FindInPage+0x5c>
return EE_ERROR;
80010dc: 2301 movs r3, #1
80010de: e024 b.n 800112a <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
80010e0: 69fb ldr r3, [r7, #28]
80010e2: 881b ldrh r3, [r3, #0]
80010e4: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
80010e6: 8a7b ldrh r3, [r7, #18]
80010e8: f64f 72ff movw r2, #65535 @ 0xffff
80010ec: 4293 cmp r3, r2
80010ee: d014 beq.n 800111a <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
80010f0: 69fb ldr r3, [r7, #28]
80010f2: 3302 adds r3, #2
80010f4: 881b ldrh r3, [r3, #0]
80010f6: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
80010f8: 8a7a ldrh r2, [r7, #18]
80010fa: 897b ldrh r3, [r7, #10]
80010fc: 429a cmp r2, r3
80010fe: d103 bne.n 8001108 <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
8001100: 8a3b ldrh r3, [r7, #16]
8001102: 833b strh r3, [r7, #24]
result = EE_OK;
8001104: 2300 movs r3, #0
8001106: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
8001108: 69fb ldr r3, [r7, #28]
800110a: 3304 adds r3, #4
800110c: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
800110e: 697b ldr r3, [r7, #20]
8001110: 3b04 subs r3, #4
8001112: 69fa ldr r2, [r7, #28]
8001114: 429a cmp r2, r3
8001116: d9e3 bls.n 80010e0 <EE_FindInPage+0x2e>
8001118: e000 b.n 800111c <EE_FindInPage+0x6a>
break;
800111a: bf00 nop
}
if (result == EE_OK)
800111c: 7efb ldrb r3, [r7, #27]
800111e: 2b00 cmp r3, #0
8001120: d102 bne.n 8001128 <EE_FindInPage+0x76>
*Data = lastVal;
8001122: 687b ldr r3, [r7, #4]
8001124: 8b3a ldrh r2, [r7, #24]
8001126: 801a strh r2, [r3, #0]
return result;
8001128: 7efb ldrb r3, [r7, #27]
}
800112a: 4618 mov r0, r3
800112c: 3724 adds r7, #36 @ 0x24
800112e: 46bd mov sp, r7
8001130: bc80 pop {r7}
8001132: 4770 bx lr
08001134 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8001134: b580 push {r7, lr}
8001136: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
8001138: 480f ldr r0, [pc, #60] @ (8001178 <EE_Format+0x44>)
800113a: f7ff ff77 bl 800102c <EE_FlashErasePage>
800113e: 4603 mov r3, r0
8001140: 2b00 cmp r3, #0
8001142: d001 beq.n 8001148 <EE_Format+0x14>
return EE_STATUS_ERROR;
8001144: 2301 movs r3, #1
8001146: e015 b.n 8001174 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
8001148: 480c ldr r0, [pc, #48] @ (800117c <EE_Format+0x48>)
800114a: f7ff ff6f bl 800102c <EE_FlashErasePage>
800114e: 4603 mov r3, r0
8001150: 2b00 cmp r3, #0
8001152: d001 beq.n 8001158 <EE_Format+0x24>
return EE_STATUS_ERROR;
8001154: 2301 movs r3, #1
8001156: e00d b.n 8001174 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
8001158: f64a 21aa movw r1, #43690 @ 0xaaaa
800115c: 4806 ldr r0, [pc, #24] @ (8001178 <EE_Format+0x44>)
800115e: f7ff ff4a bl 8000ff6 <EE_FlashProgramHalfWord>
8001162: 4603 mov r3, r0
8001164: 2b00 cmp r3, #0
8001166: d001 beq.n 800116c <EE_Format+0x38>
return EE_STATUS_ERROR;
8001168: 2301 movs r3, #1
800116a: e003 b.n 8001174 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
800116c: 4b04 ldr r3, [pc, #16] @ (8001180 <EE_Format+0x4c>)
800116e: 4a02 ldr r2, [pc, #8] @ (8001178 <EE_Format+0x44>)
8001170: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8001172: 2300 movs r3, #0
}
8001174: 4618 mov r0, r3
8001176: bd80 pop {r7, pc}
8001178: 0800f800 .word 0x0800f800
800117c: 0800fc00 .word 0x0800fc00
8001180: 20000000 .word 0x20000000
08001184 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8001184: b480 push {r7}
8001186: b083 sub sp, #12
8001188: af00 add r7, sp, #0
800118a: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
800118c: 687b ldr r3, [r7, #4]
800118e: 4a05 ldr r2, [pc, #20] @ (80011a4 <EE_GetOtherPageBase+0x20>)
8001190: 4293 cmp r3, r2
8001192: d101 bne.n 8001198 <EE_GetOtherPageBase+0x14>
8001194: 4b04 ldr r3, [pc, #16] @ (80011a8 <EE_GetOtherPageBase+0x24>)
8001196: e000 b.n 800119a <EE_GetOtherPageBase+0x16>
8001198: 4b02 ldr r3, [pc, #8] @ (80011a4 <EE_GetOtherPageBase+0x20>)
}
800119a: 4618 mov r0, r3
800119c: 370c adds r7, #12
800119e: 46bd mov sp, r7
80011a0: bc80 pop {r7}
80011a2: 4770 bx lr
80011a4: 0800f800 .word 0x0800f800
80011a8: 0800fc00 .word 0x0800fc00
080011ac <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
80011ac: b580 push {r7, lr}
80011ae: b088 sub sp, #32
80011b0: af00 add r7, sp, #0
80011b2: 4603 mov r3, r0
80011b4: 460a mov r2, r1
80011b6: 80fb strh r3, [r7, #6]
80011b8: 4613 mov r3, r2
80011ba: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
80011bc: 4b3c ldr r3, [pc, #240] @ (80012b0 <EE_PageTransfer+0x104>)
80011be: 681b ldr r3, [r3, #0]
80011c0: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
80011c2: 6978 ldr r0, [r7, #20]
80011c4: f7ff ffde bl 8001184 <EE_GetOtherPageBase>
80011c8: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
80011ca: 6938 ldr r0, [r7, #16]
80011cc: f7ff ff2e bl 800102c <EE_FlashErasePage>
80011d0: 4603 mov r3, r0
80011d2: 2b00 cmp r3, #0
80011d4: d001 beq.n 80011da <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
80011d6: 2301 movs r3, #1
80011d8: e065 b.n 80012a6 <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
80011da: f245 5155 movw r1, #21845 @ 0x5555
80011de: 6938 ldr r0, [r7, #16]
80011e0: f7ff ff09 bl 8000ff6 <EE_FlashProgramHalfWord>
80011e4: 4603 mov r3, r0
80011e6: 2b00 cmp r3, #0
80011e8: d001 beq.n 80011ee <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
80011ea: 2301 movs r3, #1
80011ec: e05b b.n 80012a6 <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
80011ee: 693b ldr r3, [r7, #16]
80011f0: 3302 adds r3, #2
80011f2: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
80011f4: 2300 movs r3, #0
80011f6: 837b strh r3, [r7, #26]
80011f8: e03c b.n 8001274 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
80011fa: 8b7b ldrh r3, [r7, #26]
80011fc: 4a2d ldr r2, [pc, #180] @ (80012b4 <EE_PageTransfer+0x108>)
80011fe: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001202: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8001204: 89fa ldrh r2, [r7, #14]
8001206: 88fb ldrh r3, [r7, #6]
8001208: 429a cmp r2, r3
800120a: d102 bne.n 8001212 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
800120c: 88bb ldrh r3, [r7, #4]
800120e: 817b strh r3, [r7, #10]
8001210: e00b b.n 800122a <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8001212: f107 020a add.w r2, r7, #10
8001216: 89fb ldrh r3, [r7, #14]
8001218: 4619 mov r1, r3
800121a: 6978 ldr r0, [r7, #20]
800121c: f7ff ff49 bl 80010b2 <EE_FindInPage>
8001220: 4603 mov r3, r0
8001222: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8001224: 7b7b ldrb r3, [r7, #13]
8001226: 2b00 cmp r3, #0
8001228: d120 bne.n 800126c <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
800122a: 89fb ldrh r3, [r7, #14]
800122c: 4619 mov r1, r3
800122e: 69f8 ldr r0, [r7, #28]
8001230: f7ff fee1 bl 8000ff6 <EE_FlashProgramHalfWord>
8001234: 4603 mov r3, r0
8001236: 2b00 cmp r3, #0
8001238: d001 beq.n 800123e <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
800123a: 2301 movs r3, #1
800123c: e033 b.n 80012a6 <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
800123e: 69fb ldr r3, [r7, #28]
8001240: 3302 adds r3, #2
8001242: 897a ldrh r2, [r7, #10]
8001244: 4611 mov r1, r2
8001246: 4618 mov r0, r3
8001248: f7ff fed5 bl 8000ff6 <EE_FlashProgramHalfWord>
800124c: 4603 mov r3, r0
800124e: 2b00 cmp r3, #0
8001250: d001 beq.n 8001256 <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8001252: 2301 movs r3, #1
8001254: e027 b.n 80012a6 <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
8001256: 69fb ldr r3, [r7, #28]
8001258: 3304 adds r3, #4
800125a: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
800125c: 693b ldr r3, [r7, #16]
800125e: f503 6380 add.w r3, r3, #1024 @ 0x400
8001262: 69fa ldr r2, [r7, #28]
8001264: 429a cmp r2, r3
8001266: d302 bcc.n 800126e <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
8001268: 2303 movs r3, #3
800126a: e01c b.n 80012a6 <EE_PageTransfer+0xfa>
continue;
800126c: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
800126e: 8b7b ldrh r3, [r7, #26]
8001270: 3301 adds r3, #1
8001272: 837b strh r3, [r7, #26]
8001274: 8b7b ldrh r3, [r7, #26]
8001276: 2b3f cmp r3, #63 @ 0x3f
8001278: d9bf bls.n 80011fa <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
800127a: 6978 ldr r0, [r7, #20]
800127c: f7ff fed6 bl 800102c <EE_FlashErasePage>
8001280: 4603 mov r3, r0
8001282: 2b00 cmp r3, #0
8001284: d001 beq.n 800128a <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
8001286: 2301 movs r3, #1
8001288: e00d b.n 80012a6 <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
800128a: f64a 21aa movw r1, #43690 @ 0xaaaa
800128e: 6938 ldr r0, [r7, #16]
8001290: f7ff feb1 bl 8000ff6 <EE_FlashProgramHalfWord>
8001294: 4603 mov r3, r0
8001296: 2b00 cmp r3, #0
8001298: d001 beq.n 800129e <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
800129a: 2301 movs r3, #1
800129c: e003 b.n 80012a6 <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
800129e: 4a04 ldr r2, [pc, #16] @ (80012b0 <EE_PageTransfer+0x104>)
80012a0: 693b ldr r3, [r7, #16]
80012a2: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
80012a4: 2300 movs r3, #0
}
80012a6: 4618 mov r0, r3
80012a8: 3720 adds r7, #32
80012aa: 46bd mov sp, r7
80012ac: bd80 pop {r7, pc}
80012ae: bf00 nop
80012b0: 20000000 .word 0x20000000
80012b4: 0800ebfc .word 0x0800ebfc
080012b8 <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
80012b8: b580 push {r7, lr}
80012ba: b082 sub sp, #8
80012bc: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
80012be: 481e ldr r0, [pc, #120] @ (8001338 <EE_Init+0x80>)
80012c0: f7ff fe8d bl 8000fde <EE_GetPageStatus>
80012c4: 4603 mov r3, r0
80012c6: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
80012c8: 481c ldr r0, [pc, #112] @ (800133c <EE_Init+0x84>)
80012ca: f7ff fe88 bl 8000fde <EE_GetPageStatus>
80012ce: 4603 mov r3, r0
80012d0: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
80012d2: 88fb ldrh r3, [r7, #6]
80012d4: f64f 72ff movw r2, #65535 @ 0xffff
80012d8: 4293 cmp r3, r2
80012da: d108 bne.n 80012ee <EE_Init+0x36>
80012dc: 88bb ldrh r3, [r7, #4]
80012de: f64f 72ff movw r2, #65535 @ 0xffff
80012e2: 4293 cmp r3, r2
80012e4: d103 bne.n 80012ee <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
80012e6: f7ff ff25 bl 8001134 <EE_Format>
80012ea: 4603 mov r3, r0
80012ec: e020 b.n 8001330 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
80012ee: 88fb ldrh r3, [r7, #6]
80012f0: f64a 22aa movw r2, #43690 @ 0xaaaa
80012f4: 4293 cmp r3, r2
80012f6: d109 bne.n 800130c <EE_Init+0x54>
80012f8: 88bb ldrh r3, [r7, #4]
80012fa: f64f 72ff movw r2, #65535 @ 0xffff
80012fe: 4293 cmp r3, r2
8001300: d104 bne.n 800130c <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8001302: 4b0f ldr r3, [pc, #60] @ (8001340 <EE_Init+0x88>)
8001304: 4a0c ldr r2, [pc, #48] @ (8001338 <EE_Init+0x80>)
8001306: 601a str r2, [r3, #0]
return EE_OK;
8001308: 2300 movs r3, #0
800130a: e011 b.n 8001330 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
800130c: 88bb ldrh r3, [r7, #4]
800130e: f64a 22aa movw r2, #43690 @ 0xaaaa
8001312: 4293 cmp r3, r2
8001314: d109 bne.n 800132a <EE_Init+0x72>
8001316: 88fb ldrh r3, [r7, #6]
8001318: f64f 72ff movw r2, #65535 @ 0xffff
800131c: 4293 cmp r3, r2
800131e: d104 bne.n 800132a <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8001320: 4b07 ldr r3, [pc, #28] @ (8001340 <EE_Init+0x88>)
8001322: 4a06 ldr r2, [pc, #24] @ (800133c <EE_Init+0x84>)
8001324: 601a str r2, [r3, #0]
return EE_OK;
8001326: 2300 movs r3, #0
8001328: e002 b.n 8001330 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
800132a: f7ff ff03 bl 8001134 <EE_Format>
800132e: 4603 mov r3, r0
}
}
8001330: 4618 mov r0, r3
8001332: 3708 adds r7, #8
8001334: 46bd mov sp, r7
8001336: bd80 pop {r7, pc}
8001338: 0800f800 .word 0x0800f800
800133c: 0800fc00 .word 0x0800fc00
8001340: 20000000 .word 0x20000000
08001344 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8001344: b580 push {r7, lr}
8001346: b084 sub sp, #16
8001348: af00 add r7, sp, #0
800134a: 4603 mov r3, r0
800134c: 6039 str r1, [r7, #0]
800134e: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8001350: 683b ldr r3, [r7, #0]
8001352: 2b00 cmp r3, #0
8001354: d101 bne.n 800135a <EE_ReadVariable+0x16>
return EE_ERROR;
8001356: 2301 movs r3, #1
8001358: e00a b.n 8001370 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
800135a: 4b07 ldr r3, [pc, #28] @ (8001378 <EE_ReadVariable+0x34>)
800135c: 681b ldr r3, [r3, #0]
800135e: 88f9 ldrh r1, [r7, #6]
8001360: 683a ldr r2, [r7, #0]
8001362: 4618 mov r0, r3
8001364: f7ff fea5 bl 80010b2 <EE_FindInPage>
8001368: 4603 mov r3, r0
800136a: 73fb strb r3, [r7, #15]
return (uint16_t)st;
800136c: 7bfb ldrb r3, [r7, #15]
800136e: b29b uxth r3, r3
}
8001370: 4618 mov r0, r3
8001372: 3710 adds r7, #16
8001374: 46bd mov sp, r7
8001376: bd80 pop {r7, pc}
8001378: 20000000 .word 0x20000000
0800137c <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
800137c: b580 push {r7, lr}
800137e: b084 sub sp, #16
8001380: af00 add r7, sp, #0
8001382: 4603 mov r3, r0
8001384: 460a mov r2, r1
8001386: 80fb strh r3, [r7, #6]
8001388: 4613 mov r3, r2
800138a: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
800138c: 4b17 ldr r3, [pc, #92] @ (80013ec <EE_WriteVariable+0x70>)
800138e: 681b ldr r3, [r3, #0]
8001390: 4618 mov r0, r3
8001392: f7ff fe6a bl 800106a <EE_FindFreeAddress>
8001396: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
8001398: 68fb ldr r3, [r7, #12]
800139a: 2b00 cmp r3, #0
800139c: d017 beq.n 80013ce <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
800139e: 88fb ldrh r3, [r7, #6]
80013a0: 4619 mov r1, r3
80013a2: 68f8 ldr r0, [r7, #12]
80013a4: f7ff fe27 bl 8000ff6 <EE_FlashProgramHalfWord>
80013a8: 4603 mov r3, r0
80013aa: 2b00 cmp r3, #0
80013ac: d001 beq.n 80013b2 <EE_WriteVariable+0x36>
return EE_ERROR;
80013ae: 2301 movs r3, #1
80013b0: e017 b.n 80013e2 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
80013b2: 68fb ldr r3, [r7, #12]
80013b4: 3302 adds r3, #2
80013b6: 88ba ldrh r2, [r7, #4]
80013b8: 4611 mov r1, r2
80013ba: 4618 mov r0, r3
80013bc: f7ff fe1b bl 8000ff6 <EE_FlashProgramHalfWord>
80013c0: 4603 mov r3, r0
80013c2: 2b00 cmp r3, #0
80013c4: d001 beq.n 80013ca <EE_WriteVariable+0x4e>
return EE_ERROR;
80013c6: 2301 movs r3, #1
80013c8: e00b b.n 80013e2 <EE_WriteVariable+0x66>
return EE_OK;
80013ca: 2300 movs r3, #0
80013cc: e009 b.n 80013e2 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
80013ce: 88ba ldrh r2, [r7, #4]
80013d0: 88fb ldrh r3, [r7, #6]
80013d2: 4611 mov r1, r2
80013d4: 4618 mov r0, r3
80013d6: f7ff fee9 bl 80011ac <EE_PageTransfer>
80013da: 4603 mov r3, r0
80013dc: 72fb strb r3, [r7, #11]
return (uint16_t)st;
80013de: 7afb ldrb r3, [r7, #11]
80013e0: b29b uxth r3, r3
}
80013e2: 4618 mov r0, r3
80013e4: 3710 adds r7, #16
80013e6: 46bd mov sp, r7
80013e8: bd80 pop {r7, pc}
80013ea: bf00 nop
80013ec: 20000000 .word 0x20000000
080013f0 <loadEE>:
void loadEE(void){
80013f0: b5f0 push {r4, r5, r6, r7, lr}
80013f2: b0b9 sub sp, #228 @ 0xe4
80013f4: af06 add r7, sp, #24
char s [200];
EEW_Read(M1PWMAP, &m1pwmap);
80013f6: 49bb ldr r1, [pc, #748] @ (80016e4 <loadEE+0x2f4>)
80013f8: 2000 movs r0, #0
80013fa: f7ff fddd bl 8000fb8 <EEW_Read>
EEW_Read(M1PWMCH, &m1pwmch);
80013fe: 49ba ldr r1, [pc, #744] @ (80016e8 <loadEE+0x2f8>)
8001400: 2001 movs r0, #1
8001402: f7ff fdd9 bl 8000fb8 <EEW_Read>
EEW_Read(M2PWMAP, &m2pwmap);
8001406: 49b9 ldr r1, [pc, #740] @ (80016ec <loadEE+0x2fc>)
8001408: 2002 movs r0, #2
800140a: f7ff fdd5 bl 8000fb8 <EEW_Read>
EEW_Read(M2PWMCH, &m2pwmch);
800140e: 49b8 ldr r1, [pc, #736] @ (80016f0 <loadEE+0x300>)
8001410: 2003 movs r0, #3
8001412: f7ff fdd1 bl 8000fb8 <EEW_Read>
EEW_Read(M3PWMAP, &m3pwmap);
8001416: 49b7 ldr r1, [pc, #732] @ (80016f4 <loadEE+0x304>)
8001418: 2004 movs r0, #4
800141a: f7ff fdcd bl 8000fb8 <EEW_Read>
EEW_Read(M3PWMCH, &m3pwmch);
800141e: 49b6 ldr r1, [pc, #728] @ (80016f8 <loadEE+0x308>)
8001420: 2005 movs r0, #5
8001422: f7ff fdc9 bl 8000fb8 <EEW_Read>
EEW_Read(M4PWMAP, &m4pwmap);
8001426: 49b5 ldr r1, [pc, #724] @ (80016fc <loadEE+0x30c>)
8001428: 2006 movs r0, #6
800142a: f7ff fdc5 bl 8000fb8 <EEW_Read>
EEW_Read(M4PWMCH, &m4pwmch);
800142e: 49b4 ldr r1, [pc, #720] @ (8001700 <loadEE+0x310>)
8001430: 2007 movs r0, #7
8001432: f7ff fdc1 bl 8000fb8 <EEW_Read>
EEW_Read(M1RAMPSTART, &mrampstart[M1-1]);
8001436: 49b3 ldr r1, [pc, #716] @ (8001704 <loadEE+0x314>)
8001438: 2008 movs r0, #8
800143a: f7ff fdbd bl 8000fb8 <EEW_Read>
EEW_Read(M2RAMPSTART, &mrampstart[M2-1]);
800143e: 49b2 ldr r1, [pc, #712] @ (8001708 <loadEE+0x318>)
8001440: 2009 movs r0, #9
8001442: f7ff fdb9 bl 8000fb8 <EEW_Read>
EEW_Read(M3RAMPSTART, &mrampstart[M3-1]);
8001446: 49b1 ldr r1, [pc, #708] @ (800170c <loadEE+0x31c>)
8001448: 200a movs r0, #10
800144a: f7ff fdb5 bl 8000fb8 <EEW_Read>
EEW_Read(M4RAMPSTART, &mrampstart[M4-1]);
800144e: 49b0 ldr r1, [pc, #704] @ (8001710 <loadEE+0x320>)
8001450: 200b movs r0, #11
8001452: f7ff fdb1 bl 8000fb8 <EEW_Read>
EEW_Read(M1TIMEOUTMAN, &m1TimeoutMan);
8001456: 49af ldr r1, [pc, #700] @ (8001714 <loadEE+0x324>)
8001458: 200c movs r0, #12
800145a: f7ff fdad bl 8000fb8 <EEW_Read>
EEW_Read(M2TIMEOUTMAN, &m2TimeoutMan);
800145e: 49ae ldr r1, [pc, #696] @ (8001718 <loadEE+0x328>)
8001460: 200d movs r0, #13
8001462: f7ff fda9 bl 8000fb8 <EEW_Read>
EEW_Read(M3TIMEOUTMAN, &m3TimeoutMan);
8001466: 49ad ldr r1, [pc, #692] @ (800171c <loadEE+0x32c>)
8001468: 200e movs r0, #14
800146a: f7ff fda5 bl 8000fb8 <EEW_Read>
EEW_Read(M4TIMEOUTMAN, &m4TimeoutMan);
800146e: 49ac ldr r1, [pc, #688] @ (8001720 <loadEE+0x330>)
8001470: 200f movs r0, #15
8001472: f7ff fda1 bl 8000fb8 <EEW_Read>
EEW_Read(TRAMP1, &tramp1);
8001476: 49ab ldr r1, [pc, #684] @ (8001724 <loadEE+0x334>)
8001478: 2019 movs r0, #25
800147a: f7ff fd9d bl 8000fb8 <EEW_Read>
EEW_Read(M1PWMMAN, &m1pwmMan);
800147e: 49aa ldr r1, [pc, #680] @ (8001728 <loadEE+0x338>)
8001480: 201a movs r0, #26
8001482: f7ff fd99 bl 8000fb8 <EEW_Read>
EEW_Read(M2PWMMAN, &m2pwmMan);
8001486: 49a9 ldr r1, [pc, #676] @ (800172c <loadEE+0x33c>)
8001488: 201b movs r0, #27
800148a: f7ff fd95 bl 8000fb8 <EEW_Read>
EEW_Read(M3PWMMAN, &m3pwmMan);
800148e: 49a8 ldr r1, [pc, #672] @ (8001730 <loadEE+0x340>)
8001490: 201c movs r0, #28
8001492: f7ff fd91 bl 8000fb8 <EEW_Read>
EEW_Read(M4PWMMAN, &m4pwmMan);
8001496: 49a7 ldr r1, [pc, #668] @ (8001734 <loadEE+0x344>)
8001498: 201d movs r0, #29
800149a: f7ff fd8d bl 8000fb8 <EEW_Read>
EEW_Read(TRAMPMAN, &trampman);
800149e: 49a6 ldr r1, [pc, #664] @ (8001738 <loadEE+0x348>)
80014a0: 201e movs r0, #30
80014a2: f7ff fd89 bl 8000fb8 <EEW_Read>
EEW_Read(TRAMP, &tramp);
80014a6: 49a5 ldr r1, [pc, #660] @ (800173c <loadEE+0x34c>)
80014a8: 201f movs r0, #31
80014aa: f7ff fd85 bl 8000fb8 <EEW_Read>
EEW_Read(APM1START,&apM1start);
80014ae: 49a4 ldr r1, [pc, #656] @ (8001740 <loadEE+0x350>)
80014b0: 2020 movs r0, #32
80014b2: f7ff fd81 bl 8000fb8 <EEW_Read>
EEW_Read(APM1STOP ,&apM1stop);
80014b6: 49a3 ldr r1, [pc, #652] @ (8001744 <loadEE+0x354>)
80014b8: 2021 movs r0, #33 @ 0x21
80014ba: f7ff fd7d bl 8000fb8 <EEW_Read>
EEW_Read(APM2START,&apM2start);
80014be: 49a2 ldr r1, [pc, #648] @ (8001748 <loadEE+0x358>)
80014c0: 2022 movs r0, #34 @ 0x22
80014c2: f7ff fd79 bl 8000fb8 <EEW_Read>
EEW_Read(APM2STOP ,&apM2stop);
80014c6: 49a1 ldr r1, [pc, #644] @ (800174c <loadEE+0x35c>)
80014c8: 2023 movs r0, #35 @ 0x23
80014ca: f7ff fd75 bl 8000fb8 <EEW_Read>
EEW_Read(APM3START,&apM3start);
80014ce: 49a0 ldr r1, [pc, #640] @ (8001750 <loadEE+0x360>)
80014d0: 2024 movs r0, #36 @ 0x24
80014d2: f7ff fd71 bl 8000fb8 <EEW_Read>
EEW_Read(APM3STOP ,&apM3stop);
80014d6: 499f ldr r1, [pc, #636] @ (8001754 <loadEE+0x364>)
80014d8: 2025 movs r0, #37 @ 0x25
80014da: f7ff fd6d bl 8000fb8 <EEW_Read>
EEW_Read(APM4START,&apM4start);
80014de: 499e ldr r1, [pc, #632] @ (8001758 <loadEE+0x368>)
80014e0: 2026 movs r0, #38 @ 0x26
80014e2: f7ff fd69 bl 8000fb8 <EEW_Read>
EEW_Read(APM4STOP ,&apM4stop);
80014e6: 499d ldr r1, [pc, #628] @ (800175c <loadEE+0x36c>)
80014e8: 2027 movs r0, #39 @ 0x27
80014ea: f7ff fd65 bl 8000fb8 <EEW_Read>
EEW_Read(CHM1START,&chM1start);
80014ee: 499c ldr r1, [pc, #624] @ (8001760 <loadEE+0x370>)
80014f0: 2028 movs r0, #40 @ 0x28
80014f2: f7ff fd61 bl 8000fb8 <EEW_Read>
EEW_Read(CHM1STOP ,&chM1stop);
80014f6: 499b ldr r1, [pc, #620] @ (8001764 <loadEE+0x374>)
80014f8: 2029 movs r0, #41 @ 0x29
80014fa: f7ff fd5d bl 8000fb8 <EEW_Read>
EEW_Read(CHM2START,&chM2start);
80014fe: 499a ldr r1, [pc, #616] @ (8001768 <loadEE+0x378>)
8001500: 202a movs r0, #42 @ 0x2a
8001502: f7ff fd59 bl 8000fb8 <EEW_Read>
EEW_Read(CHM2STOP ,&chM2stop);
8001506: 4999 ldr r1, [pc, #612] @ (800176c <loadEE+0x37c>)
8001508: 202b movs r0, #43 @ 0x2b
800150a: f7ff fd55 bl 8000fb8 <EEW_Read>
EEW_Read(CHM3START,&chM3start);
800150e: 4998 ldr r1, [pc, #608] @ (8001770 <loadEE+0x380>)
8001510: 202c movs r0, #44 @ 0x2c
8001512: f7ff fd51 bl 8000fb8 <EEW_Read>
EEW_Read(CHM3STOP ,&chM3stop);
8001516: 4997 ldr r1, [pc, #604] @ (8001774 <loadEE+0x384>)
8001518: 202d movs r0, #45 @ 0x2d
800151a: f7ff fd4d bl 8000fb8 <EEW_Read>
EEW_Read(CHM4START,&chM4start);
800151e: 4996 ldr r1, [pc, #600] @ (8001778 <loadEE+0x388>)
8001520: 202e movs r0, #46 @ 0x2e
8001522: f7ff fd49 bl 8000fb8 <EEW_Read>
EEW_Read(CHM4STOP ,&chM4stop);
8001526: 4995 ldr r1, [pc, #596] @ (800177c <loadEE+0x38c>)
8001528: 202f movs r0, #47 @ 0x2f
800152a: f7ff fd45 bl 8000fb8 <EEW_Read>
sprintf((char*)s,"LoadEE\n");
800152e: 463b mov r3, r7
8001530: 4993 ldr r1, [pc, #588] @ (8001780 <loadEE+0x390>)
8001532: 4618 mov r0, r3
8001534: f00c fc0e bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001538: 463b mov r3, r7
800153a: 4618 mov r0, r3
800153c: f7fe fe06 bl 800014c <strlen>
8001540: 4603 mov r3, r0
8001542: b29a uxth r2, r3
8001544: 4639 mov r1, r7
8001546: f04f 33ff mov.w r3, #4294967295
800154a: 488e ldr r0, [pc, #568] @ (8001784 <loadEE+0x394>)
800154c: f007 fe12 bl 8009174 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8001550: 4b64 ldr r3, [pc, #400] @ (80016e4 <loadEE+0x2f4>)
8001552: 881b ldrh r3, [r3, #0]
8001554: 469c mov ip, r3
8001556: 4b64 ldr r3, [pc, #400] @ (80016e8 <loadEE+0x2f8>)
8001558: 881b ldrh r3, [r3, #0]
800155a: 469e mov lr, r3
800155c: 4b63 ldr r3, [pc, #396] @ (80016ec <loadEE+0x2fc>)
800155e: 881b ldrh r3, [r3, #0]
8001560: 461a mov r2, r3
8001562: 4b63 ldr r3, [pc, #396] @ (80016f0 <loadEE+0x300>)
8001564: 881b ldrh r3, [r3, #0]
8001566: 4619 mov r1, r3
8001568: 4b62 ldr r3, [pc, #392] @ (80016f4 <loadEE+0x304>)
800156a: 881b ldrh r3, [r3, #0]
800156c: 461c mov r4, r3
800156e: 4b62 ldr r3, [pc, #392] @ (80016f8 <loadEE+0x308>)
8001570: 881b ldrh r3, [r3, #0]
8001572: 461d mov r5, r3
8001574: 4b61 ldr r3, [pc, #388] @ (80016fc <loadEE+0x30c>)
8001576: 881b ldrh r3, [r3, #0]
8001578: 461e mov r6, r3
800157a: 4b61 ldr r3, [pc, #388] @ (8001700 <loadEE+0x310>)
800157c: 881b ldrh r3, [r3, #0]
800157e: 4638 mov r0, r7
8001580: 9305 str r3, [sp, #20]
8001582: 9604 str r6, [sp, #16]
8001584: 9503 str r5, [sp, #12]
8001586: 9402 str r4, [sp, #8]
8001588: 9101 str r1, [sp, #4]
800158a: 9200 str r2, [sp, #0]
800158c: 4673 mov r3, lr
800158e: 4662 mov r2, ip
8001590: 497d ldr r1, [pc, #500] @ (8001788 <loadEE+0x398>)
8001592: f00c fbdf bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001596: 463b mov r3, r7
8001598: 4618 mov r0, r3
800159a: f7fe fdd7 bl 800014c <strlen>
800159e: 4603 mov r3, r0
80015a0: b29a uxth r2, r3
80015a2: 4639 mov r1, r7
80015a4: f04f 33ff mov.w r3, #4294967295
80015a8: 4876 ldr r0, [pc, #472] @ (8001784 <loadEE+0x394>)
80015aa: f007 fde3 bl 8009174 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
80015ae: 4b59 ldr r3, [pc, #356] @ (8001714 <loadEE+0x324>)
80015b0: 881b ldrh r3, [r3, #0]
80015b2: 4619 mov r1, r3
80015b4: 4b58 ldr r3, [pc, #352] @ (8001718 <loadEE+0x328>)
80015b6: 881b ldrh r3, [r3, #0]
80015b8: 461c mov r4, r3
80015ba: 4b58 ldr r3, [pc, #352] @ (800171c <loadEE+0x32c>)
80015bc: 881b ldrh r3, [r3, #0]
80015be: 461a mov r2, r3
80015c0: 4b57 ldr r3, [pc, #348] @ (8001720 <loadEE+0x330>)
80015c2: 881b ldrh r3, [r3, #0]
80015c4: 4638 mov r0, r7
80015c6: 9301 str r3, [sp, #4]
80015c8: 9200 str r2, [sp, #0]
80015ca: 4623 mov r3, r4
80015cc: 460a mov r2, r1
80015ce: 496f ldr r1, [pc, #444] @ (800178c <loadEE+0x39c>)
80015d0: f00c fbc0 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80015d4: 463b mov r3, r7
80015d6: 4618 mov r0, r3
80015d8: f7fe fdb8 bl 800014c <strlen>
80015dc: 4603 mov r3, r0
80015de: b29a uxth r2, r3
80015e0: 4639 mov r1, r7
80015e2: f04f 33ff mov.w r3, #4294967295
80015e6: 4867 ldr r0, [pc, #412] @ (8001784 <loadEE+0x394>)
80015e8: f007 fdc4 bl 8009174 <HAL_UART_Transmit>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
80015ec: 4b53 ldr r3, [pc, #332] @ (800173c <loadEE+0x34c>)
80015ee: 881b ldrh r3, [r3, #0]
80015f0: 461a mov r2, r3
80015f2: 4b51 ldr r3, [pc, #324] @ (8001738 <loadEE+0x348>)
80015f4: 881b ldrh r3, [r3, #0]
80015f6: 4638 mov r0, r7
80015f8: 4965 ldr r1, [pc, #404] @ (8001790 <loadEE+0x3a0>)
80015fa: f00c fbab bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80015fe: 463b mov r3, r7
8001600: 4618 mov r0, r3
8001602: f7fe fda3 bl 800014c <strlen>
8001606: 4603 mov r3, r0
8001608: b29a uxth r2, r3
800160a: 4639 mov r1, r7
800160c: f04f 33ff mov.w r3, #4294967295
8001610: 485c ldr r0, [pc, #368] @ (8001784 <loadEE+0x394>)
8001612: f007 fdaf bl 8009174 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
8001616: 4b44 ldr r3, [pc, #272] @ (8001728 <loadEE+0x338>)
8001618: 881b ldrh r3, [r3, #0]
800161a: 4619 mov r1, r3
800161c: 4b43 ldr r3, [pc, #268] @ (800172c <loadEE+0x33c>)
800161e: 881b ldrh r3, [r3, #0]
8001620: 461c mov r4, r3
8001622: 4b43 ldr r3, [pc, #268] @ (8001730 <loadEE+0x340>)
8001624: 881b ldrh r3, [r3, #0]
8001626: 461a mov r2, r3
8001628: 4b42 ldr r3, [pc, #264] @ (8001734 <loadEE+0x344>)
800162a: 881b ldrh r3, [r3, #0]
800162c: 4638 mov r0, r7
800162e: 9301 str r3, [sp, #4]
8001630: 9200 str r2, [sp, #0]
8001632: 4623 mov r3, r4
8001634: 460a mov r2, r1
8001636: 4957 ldr r1, [pc, #348] @ (8001794 <loadEE+0x3a4>)
8001638: f00c fb8c bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800163c: 463b mov r3, r7
800163e: 4618 mov r0, r3
8001640: f7fe fd84 bl 800014c <strlen>
8001644: 4603 mov r3, r0
8001646: b29a uxth r2, r3
8001648: 4639 mov r1, r7
800164a: f04f 33ff mov.w r3, #4294967295
800164e: 484d ldr r0, [pc, #308] @ (8001784 <loadEE+0x394>)
8001650: f007 fd90 bl 8009174 <HAL_UART_Transmit>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8001654: 4b3a ldr r3, [pc, #232] @ (8001740 <loadEE+0x350>)
8001656: 881b ldrh r3, [r3, #0]
8001658: 4619 mov r1, r3
800165a: 4b3a ldr r3, [pc, #232] @ (8001744 <loadEE+0x354>)
800165c: 881b ldrh r3, [r3, #0]
800165e: 461c mov r4, r3
8001660: 4b3f ldr r3, [pc, #252] @ (8001760 <loadEE+0x370>)
8001662: 881b ldrh r3, [r3, #0]
8001664: 461a mov r2, r3
8001666: 4b3f ldr r3, [pc, #252] @ (8001764 <loadEE+0x374>)
8001668: 881b ldrh r3, [r3, #0]
800166a: 4638 mov r0, r7
800166c: 9301 str r3, [sp, #4]
800166e: 9200 str r2, [sp, #0]
8001670: 4623 mov r3, r4
8001672: 460a mov r2, r1
8001674: 4948 ldr r1, [pc, #288] @ (8001798 <loadEE+0x3a8>)
8001676: f00c fb6d bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800167a: 463b mov r3, r7
800167c: 4618 mov r0, r3
800167e: f7fe fd65 bl 800014c <strlen>
8001682: 4603 mov r3, r0
8001684: b29a uxth r2, r3
8001686: 4639 mov r1, r7
8001688: f04f 33ff mov.w r3, #4294967295
800168c: 483d ldr r0, [pc, #244] @ (8001784 <loadEE+0x394>)
800168e: f007 fd71 bl 8009174 <HAL_UART_Transmit>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8001692: 4b2d ldr r3, [pc, #180] @ (8001748 <loadEE+0x358>)
8001694: 881b ldrh r3, [r3, #0]
8001696: 4619 mov r1, r3
8001698: 4b2c ldr r3, [pc, #176] @ (800174c <loadEE+0x35c>)
800169a: 881b ldrh r3, [r3, #0]
800169c: 461c mov r4, r3
800169e: 4b32 ldr r3, [pc, #200] @ (8001768 <loadEE+0x378>)
80016a0: 881b ldrh r3, [r3, #0]
80016a2: 461a mov r2, r3
80016a4: 4b31 ldr r3, [pc, #196] @ (800176c <loadEE+0x37c>)
80016a6: 881b ldrh r3, [r3, #0]
80016a8: 4638 mov r0, r7
80016aa: 9301 str r3, [sp, #4]
80016ac: 9200 str r2, [sp, #0]
80016ae: 4623 mov r3, r4
80016b0: 460a mov r2, r1
80016b2: 493a ldr r1, [pc, #232] @ (800179c <loadEE+0x3ac>)
80016b4: f00c fb4e bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80016b8: 463b mov r3, r7
80016ba: 4618 mov r0, r3
80016bc: f7fe fd46 bl 800014c <strlen>
80016c0: 4603 mov r3, r0
80016c2: b29a uxth r2, r3
80016c4: 4639 mov r1, r7
80016c6: f04f 33ff mov.w r3, #4294967295
80016ca: 482e ldr r0, [pc, #184] @ (8001784 <loadEE+0x394>)
80016cc: f007 fd52 bl 8009174 <HAL_UART_Transmit>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
80016d0: 4b1f ldr r3, [pc, #124] @ (8001750 <loadEE+0x360>)
80016d2: 881b ldrh r3, [r3, #0]
80016d4: 4619 mov r1, r3
80016d6: 4b1f ldr r3, [pc, #124] @ (8001754 <loadEE+0x364>)
80016d8: 881b ldrh r3, [r3, #0]
80016da: 461c mov r4, r3
80016dc: 4b24 ldr r3, [pc, #144] @ (8001770 <loadEE+0x380>)
80016de: 881b ldrh r3, [r3, #0]
80016e0: 461a mov r2, r3
80016e2: e05d b.n 80017a0 <loadEE+0x3b0>
80016e4: 200003fe .word 0x200003fe
80016e8: 20000400 .word 0x20000400
80016ec: 20000402 .word 0x20000402
80016f0: 20000404 .word 0x20000404
80016f4: 20000406 .word 0x20000406
80016f8: 20000408 .word 0x20000408
80016fc: 2000040a .word 0x2000040a
8001700: 2000040c .word 0x2000040c
8001704: 20000444 .word 0x20000444
8001708: 20000446 .word 0x20000446
800170c: 20000448 .word 0x20000448
8001710: 2000044a .word 0x2000044a
8001714: 2000040e .word 0x2000040e
8001718: 20000410 .word 0x20000410
800171c: 20000412 .word 0x20000412
8001720: 20000414 .word 0x20000414
8001724: 20000418 .word 0x20000418
8001728: 2000041c .word 0x2000041c
800172c: 2000041e .word 0x2000041e
8001730: 20000420 .word 0x20000420
8001734: 20000422 .word 0x20000422
8001738: 2000041a .word 0x2000041a
800173c: 20000416 .word 0x20000416
8001740: 20000424 .word 0x20000424
8001744: 20000426 .word 0x20000426
8001748: 20000428 .word 0x20000428
800174c: 2000042a .word 0x2000042a
8001750: 2000042c .word 0x2000042c
8001754: 2000042e .word 0x2000042e
8001758: 20000430 .word 0x20000430
800175c: 20000432 .word 0x20000432
8001760: 20000434 .word 0x20000434
8001764: 20000436 .word 0x20000436
8001768: 20000438 .word 0x20000438
800176c: 2000043a .word 0x2000043a
8001770: 2000043c .word 0x2000043c
8001774: 2000043e .word 0x2000043e
8001778: 20000440 .word 0x20000440
800177c: 20000442 .word 0x20000442
8001780: 0800e910 .word 0x0800e910
8001784: 200003a8 .word 0x200003a8
8001788: 0800e918 .word 0x0800e918
800178c: 0800e974 .word 0x0800e974
8001790: 0800e9b8 .word 0x0800e9b8
8001794: 0800e9d0 .word 0x0800e9d0
8001798: 0800ea04 .word 0x0800ea04
800179c: 0800ea38 .word 0x0800ea38
80017a0: 4b1c ldr r3, [pc, #112] @ (8001814 <loadEE+0x424>)
80017a2: 881b ldrh r3, [r3, #0]
80017a4: 4638 mov r0, r7
80017a6: 9301 str r3, [sp, #4]
80017a8: 9200 str r2, [sp, #0]
80017aa: 4623 mov r3, r4
80017ac: 460a mov r2, r1
80017ae: 491a ldr r1, [pc, #104] @ (8001818 <loadEE+0x428>)
80017b0: f00c fad0 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80017b4: 463b mov r3, r7
80017b6: 4618 mov r0, r3
80017b8: f7fe fcc8 bl 800014c <strlen>
80017bc: 4603 mov r3, r0
80017be: b29a uxth r2, r3
80017c0: 4639 mov r1, r7
80017c2: f04f 33ff mov.w r3, #4294967295
80017c6: 4815 ldr r0, [pc, #84] @ (800181c <loadEE+0x42c>)
80017c8: f007 fcd4 bl 8009174 <HAL_UART_Transmit>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
80017cc: 4b14 ldr r3, [pc, #80] @ (8001820 <loadEE+0x430>)
80017ce: 881b ldrh r3, [r3, #0]
80017d0: 4619 mov r1, r3
80017d2: 4b14 ldr r3, [pc, #80] @ (8001824 <loadEE+0x434>)
80017d4: 881b ldrh r3, [r3, #0]
80017d6: 461c mov r4, r3
80017d8: 4b13 ldr r3, [pc, #76] @ (8001828 <loadEE+0x438>)
80017da: 881b ldrh r3, [r3, #0]
80017dc: 461a mov r2, r3
80017de: 4b13 ldr r3, [pc, #76] @ (800182c <loadEE+0x43c>)
80017e0: 881b ldrh r3, [r3, #0]
80017e2: 4638 mov r0, r7
80017e4: 9301 str r3, [sp, #4]
80017e6: 9200 str r2, [sp, #0]
80017e8: 4623 mov r3, r4
80017ea: 460a mov r2, r1
80017ec: 4910 ldr r1, [pc, #64] @ (8001830 <loadEE+0x440>)
80017ee: f00c fab1 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80017f2: 463b mov r3, r7
80017f4: 4618 mov r0, r3
80017f6: f7fe fca9 bl 800014c <strlen>
80017fa: 4603 mov r3, r0
80017fc: b29a uxth r2, r3
80017fe: 4639 mov r1, r7
8001800: f04f 33ff mov.w r3, #4294967295
8001804: 4805 ldr r0, [pc, #20] @ (800181c <loadEE+0x42c>)
8001806: f007 fcb5 bl 8009174 <HAL_UART_Transmit>
}
800180a: bf00 nop
800180c: 37cc adds r7, #204 @ 0xcc
800180e: 46bd mov sp, r7
8001810: bdf0 pop {r4, r5, r6, r7, pc}
8001812: bf00 nop
8001814: 2000043e .word 0x2000043e
8001818: 0800ea6c .word 0x0800ea6c
800181c: 200003a8 .word 0x200003a8
8001820: 20000430 .word 0x20000430
8001824: 20000432 .word 0x20000432
8001828: 20000440 .word 0x20000440
800182c: 20000442 .word 0x20000442
8001830: 0800eaa0 .word 0x0800eaa0
08001834 <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
8001834: b580 push {r7, lr}
8001836: b082 sub sp, #8
8001838: af00 add r7, sp, #0
static uint8_t c1s = 0;
static uint8_t inidx=0;
static uint8_t inbuf[4];
uint8_t i;
if (++c10ms >= 10) { // 10 ms
800183a: 4b7c ldr r3, [pc, #496] @ (8001a2c <HAL_SYSTICK_Callback+0x1f8>)
800183c: 781b ldrb r3, [r3, #0]
800183e: 3301 adds r3, #1
8001840: b2da uxtb r2, r3
8001842: 4b7a ldr r3, [pc, #488] @ (8001a2c <HAL_SYSTICK_Callback+0x1f8>)
8001844: 701a strb r2, [r3, #0]
8001846: 4b79 ldr r3, [pc, #484] @ (8001a2c <HAL_SYSTICK_Callback+0x1f8>)
8001848: 781b ldrb r3, [r3, #0]
800184a: 2b09 cmp r3, #9
800184c: f240 81db bls.w 8001c06 <HAL_SYSTICK_Callback+0x3d2>
c10ms = 0;
8001850: 4b76 ldr r3, [pc, #472] @ (8001a2c <HAL_SYSTICK_Callback+0x1f8>)
8001852: 2200 movs r2, #0
8001854: 701a strb r2, [r3, #0]
if(rtP1)rtP1--;
8001856: 4b76 ldr r3, [pc, #472] @ (8001a30 <HAL_SYSTICK_Callback+0x1fc>)
8001858: 781b ldrb r3, [r3, #0]
800185a: b2db uxtb r3, r3
800185c: 2b00 cmp r3, #0
800185e: d006 beq.n 800186e <HAL_SYSTICK_Callback+0x3a>
8001860: 4b73 ldr r3, [pc, #460] @ (8001a30 <HAL_SYSTICK_Callback+0x1fc>)
8001862: 781b ldrb r3, [r3, #0]
8001864: b2db uxtb r3, r3
8001866: 3b01 subs r3, #1
8001868: b2da uxtb r2, r3
800186a: 4b71 ldr r3, [pc, #452] @ (8001a30 <HAL_SYSTICK_Callback+0x1fc>)
800186c: 701a strb r2, [r3, #0]
if(rtP2)rtP2--;
800186e: 4b71 ldr r3, [pc, #452] @ (8001a34 <HAL_SYSTICK_Callback+0x200>)
8001870: 781b ldrb r3, [r3, #0]
8001872: b2db uxtb r3, r3
8001874: 2b00 cmp r3, #0
8001876: d006 beq.n 8001886 <HAL_SYSTICK_Callback+0x52>
8001878: 4b6e ldr r3, [pc, #440] @ (8001a34 <HAL_SYSTICK_Callback+0x200>)
800187a: 781b ldrb r3, [r3, #0]
800187c: b2db uxtb r3, r3
800187e: 3b01 subs r3, #1
8001880: b2da uxtb r2, r3
8001882: 4b6c ldr r3, [pc, #432] @ (8001a34 <HAL_SYSTICK_Callback+0x200>)
8001884: 701a strb r2, [r3, #0]
if(rtTLC)rtTLC--;
8001886: 4b6c ldr r3, [pc, #432] @ (8001a38 <HAL_SYSTICK_Callback+0x204>)
8001888: 781b ldrb r3, [r3, #0]
800188a: b2db uxtb r3, r3
800188c: 2b00 cmp r3, #0
800188e: d006 beq.n 800189e <HAL_SYSTICK_Callback+0x6a>
8001890: 4b69 ldr r3, [pc, #420] @ (8001a38 <HAL_SYSTICK_Callback+0x204>)
8001892: 781b ldrb r3, [r3, #0]
8001894: b2db uxtb r3, r3
8001896: 3b01 subs r3, #1
8001898: b2da uxtb r2, r3
800189a: 4b67 ldr r3, [pc, #412] @ (8001a38 <HAL_SYSTICK_Callback+0x204>)
800189c: 701a strb r2, [r3, #0]
//**** legge i tasti********************************************************************************
inidx++;
800189e: 4b67 ldr r3, [pc, #412] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80018a0: 781b ldrb r3, [r3, #0]
80018a2: 3301 adds r3, #1
80018a4: b2da uxtb r2, r3
80018a6: 4b65 ldr r3, [pc, #404] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80018a8: 701a strb r2, [r3, #0]
inidx&=0x03;
80018aa: 4b64 ldr r3, [pc, #400] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80018ac: 781b ldrb r3, [r3, #0]
80018ae: f003 0303 and.w r3, r3, #3
80018b2: b2da uxtb r2, r3
80018b4: 4b61 ldr r3, [pc, #388] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80018b6: 701a strb r2, [r3, #0]
if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1);
80018b8: f44f 4180 mov.w r1, #16384 @ 0x4000
80018bc: 4860 ldr r0, [pc, #384] @ (8001a40 <HAL_SYSTICK_Callback+0x20c>)
80018be: f004 fb43 bl 8005f48 <HAL_GPIO_ReadPin>
80018c2: 4603 mov r3, r0
80018c4: 2b00 cmp r3, #0
80018c6: d10c bne.n 80018e2 <HAL_SYSTICK_Callback+0xae>
80018c8: 4b5c ldr r3, [pc, #368] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80018ca: 781b ldrb r3, [r3, #0]
80018cc: 461a mov r2, r3
80018ce: 4b5d ldr r3, [pc, #372] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80018d0: 5c9b ldrb r3, [r3, r2]
80018d2: 4a5a ldr r2, [pc, #360] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80018d4: 7812 ldrb r2, [r2, #0]
80018d6: f043 0301 orr.w r3, r3, #1
80018da: b2d9 uxtb r1, r3
80018dc: 4b59 ldr r3, [pc, #356] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80018de: 5499 strb r1, [r3, r2]
80018e0: e00b b.n 80018fa <HAL_SYSTICK_Callback+0xc6>
80018e2: 4b56 ldr r3, [pc, #344] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80018e4: 781b ldrb r3, [r3, #0]
80018e6: 461a mov r2, r3
80018e8: 4b56 ldr r3, [pc, #344] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80018ea: 5c9b ldrb r3, [r3, r2]
80018ec: 4a53 ldr r2, [pc, #332] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80018ee: 7812 ldrb r2, [r2, #0]
80018f0: f023 0301 bic.w r3, r3, #1
80018f4: b2d9 uxtb r1, r3
80018f6: 4b53 ldr r3, [pc, #332] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80018f8: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2);
80018fa: f44f 4100 mov.w r1, #32768 @ 0x8000
80018fe: 4850 ldr r0, [pc, #320] @ (8001a40 <HAL_SYSTICK_Callback+0x20c>)
8001900: f004 fb22 bl 8005f48 <HAL_GPIO_ReadPin>
8001904: 4603 mov r3, r0
8001906: 2b00 cmp r3, #0
8001908: d10c bne.n 8001924 <HAL_SYSTICK_Callback+0xf0>
800190a: 4b4c ldr r3, [pc, #304] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
800190c: 781b ldrb r3, [r3, #0]
800190e: 461a mov r2, r3
8001910: 4b4c ldr r3, [pc, #304] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
8001912: 5c9b ldrb r3, [r3, r2]
8001914: 4a49 ldr r2, [pc, #292] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001916: 7812 ldrb r2, [r2, #0]
8001918: f043 0302 orr.w r3, r3, #2
800191c: b2d9 uxtb r1, r3
800191e: 4b49 ldr r3, [pc, #292] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
8001920: 5499 strb r1, [r3, r2]
8001922: e00b b.n 800193c <HAL_SYSTICK_Callback+0x108>
8001924: 4b45 ldr r3, [pc, #276] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001926: 781b ldrb r3, [r3, #0]
8001928: 461a mov r2, r3
800192a: 4b46 ldr r3, [pc, #280] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
800192c: 5c9b ldrb r3, [r3, r2]
800192e: 4a43 ldr r2, [pc, #268] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001930: 7812 ldrb r2, [r2, #0]
8001932: f023 0302 bic.w r3, r3, #2
8001936: b2d9 uxtb r1, r3
8001938: 4b42 ldr r3, [pc, #264] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
800193a: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH1;else inbuf[inidx]&=(~INCH1);
800193c: f44f 5180 mov.w r1, #4096 @ 0x1000
8001940: 4841 ldr r0, [pc, #260] @ (8001a48 <HAL_SYSTICK_Callback+0x214>)
8001942: f004 fb01 bl 8005f48 <HAL_GPIO_ReadPin>
8001946: 4603 mov r3, r0
8001948: 2b00 cmp r3, #0
800194a: d10c bne.n 8001966 <HAL_SYSTICK_Callback+0x132>
800194c: 4b3b ldr r3, [pc, #236] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
800194e: 781b ldrb r3, [r3, #0]
8001950: 461a mov r2, r3
8001952: 4b3c ldr r3, [pc, #240] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
8001954: 5c9b ldrb r3, [r3, r2]
8001956: 4a39 ldr r2, [pc, #228] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001958: 7812 ldrb r2, [r2, #0]
800195a: f043 0304 orr.w r3, r3, #4
800195e: b2d9 uxtb r1, r3
8001960: 4b38 ldr r3, [pc, #224] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
8001962: 5499 strb r1, [r3, r2]
8001964: e00b b.n 800197e <HAL_SYSTICK_Callback+0x14a>
8001966: 4b35 ldr r3, [pc, #212] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001968: 781b ldrb r3, [r3, #0]
800196a: 461a mov r2, r3
800196c: 4b35 ldr r3, [pc, #212] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
800196e: 5c9b ldrb r3, [r3, r2]
8001970: 4a32 ldr r2, [pc, #200] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001972: 7812 ldrb r2, [r2, #0]
8001974: f023 0304 bic.w r3, r3, #4
8001978: b2d9 uxtb r1, r3
800197a: 4b32 ldr r3, [pc, #200] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
800197c: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH2;else inbuf[inidx]&=(~INCH2);
800197e: f44f 5100 mov.w r1, #8192 @ 0x2000
8001982: 4831 ldr r0, [pc, #196] @ (8001a48 <HAL_SYSTICK_Callback+0x214>)
8001984: f004 fae0 bl 8005f48 <HAL_GPIO_ReadPin>
8001988: 4603 mov r3, r0
800198a: 2b00 cmp r3, #0
800198c: d10c bne.n 80019a8 <HAL_SYSTICK_Callback+0x174>
800198e: 4b2b ldr r3, [pc, #172] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001990: 781b ldrb r3, [r3, #0]
8001992: 461a mov r2, r3
8001994: 4b2b ldr r3, [pc, #172] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
8001996: 5c9b ldrb r3, [r3, r2]
8001998: 4a28 ldr r2, [pc, #160] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
800199a: 7812 ldrb r2, [r2, #0]
800199c: f043 0308 orr.w r3, r3, #8
80019a0: b2d9 uxtb r1, r3
80019a2: 4b28 ldr r3, [pc, #160] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80019a4: 5499 strb r1, [r3, r2]
80019a6: e00b b.n 80019c0 <HAL_SYSTICK_Callback+0x18c>
80019a8: 4b24 ldr r3, [pc, #144] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80019aa: 781b ldrb r3, [r3, #0]
80019ac: 461a mov r2, r3
80019ae: 4b25 ldr r3, [pc, #148] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80019b0: 5c9b ldrb r3, [r3, r2]
80019b2: 4a22 ldr r2, [pc, #136] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80019b4: 7812 ldrb r2, [r2, #0]
80019b6: f023 0308 bic.w r3, r3, #8
80019ba: b2d9 uxtb r1, r3
80019bc: 4b21 ldr r3, [pc, #132] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80019be: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH3;else inbuf[inidx]&=(~INCH3);
80019c0: f44f 4180 mov.w r1, #16384 @ 0x4000
80019c4: 4820 ldr r0, [pc, #128] @ (8001a48 <HAL_SYSTICK_Callback+0x214>)
80019c6: f004 fabf bl 8005f48 <HAL_GPIO_ReadPin>
80019ca: 4603 mov r3, r0
80019cc: 2b00 cmp r3, #0
80019ce: d10c bne.n 80019ea <HAL_SYSTICK_Callback+0x1b6>
80019d0: 4b1a ldr r3, [pc, #104] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80019d2: 781b ldrb r3, [r3, #0]
80019d4: 461a mov r2, r3
80019d6: 4b1b ldr r3, [pc, #108] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80019d8: 5c9b ldrb r3, [r3, r2]
80019da: 4a18 ldr r2, [pc, #96] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80019dc: 7812 ldrb r2, [r2, #0]
80019de: f043 0310 orr.w r3, r3, #16
80019e2: b2d9 uxtb r1, r3
80019e4: 4b17 ldr r3, [pc, #92] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80019e6: 5499 strb r1, [r3, r2]
80019e8: e00b b.n 8001a02 <HAL_SYSTICK_Callback+0x1ce>
80019ea: 4b14 ldr r3, [pc, #80] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80019ec: 781b ldrb r3, [r3, #0]
80019ee: 461a mov r2, r3
80019f0: 4b14 ldr r3, [pc, #80] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
80019f2: 5c9b ldrb r3, [r3, r2]
80019f4: 4a11 ldr r2, [pc, #68] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
80019f6: 7812 ldrb r2, [r2, #0]
80019f8: f023 0310 bic.w r3, r3, #16
80019fc: b2d9 uxtb r1, r3
80019fe: 4b11 ldr r3, [pc, #68] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
8001a00: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH4;else inbuf[inidx]&=(~INCH4);
8001a02: f44f 4100 mov.w r1, #32768 @ 0x8000
8001a06: 4810 ldr r0, [pc, #64] @ (8001a48 <HAL_SYSTICK_Callback+0x214>)
8001a08: f004 fa9e bl 8005f48 <HAL_GPIO_ReadPin>
8001a0c: 4603 mov r3, r0
8001a0e: 2b00 cmp r3, #0
8001a10: d11c bne.n 8001a4c <HAL_SYSTICK_Callback+0x218>
8001a12: 4b0a ldr r3, [pc, #40] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001a14: 781b ldrb r3, [r3, #0]
8001a16: 461a mov r2, r3
8001a18: 4b0a ldr r3, [pc, #40] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
8001a1a: 5c9b ldrb r3, [r3, r2]
8001a1c: 4a07 ldr r2, [pc, #28] @ (8001a3c <HAL_SYSTICK_Callback+0x208>)
8001a1e: 7812 ldrb r2, [r2, #0]
8001a20: f043 0320 orr.w r3, r3, #32
8001a24: b2d9 uxtb r1, r3
8001a26: 4b07 ldr r3, [pc, #28] @ (8001a44 <HAL_SYSTICK_Callback+0x210>)
8001a28: 5499 strb r1, [r3, r2]
8001a2a: e01b b.n 8001a64 <HAL_SYSTICK_Callback+0x230>
8001a2c: 20000451 .word 0x20000451
8001a30: 20000004 .word 0x20000004
8001a34: 20000005 .word 0x20000005
8001a38: 20000006 .word 0x20000006
8001a3c: 20000452 .word 0x20000452
8001a40: 40011000 .word 0x40011000
8001a44: 20000454 .word 0x20000454
8001a48: 40010c00 .word 0x40010c00
8001a4c: 4b70 ldr r3, [pc, #448] @ (8001c10 <HAL_SYSTICK_Callback+0x3dc>)
8001a4e: 781b ldrb r3, [r3, #0]
8001a50: 461a mov r2, r3
8001a52: 4b70 ldr r3, [pc, #448] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a54: 5c9b ldrb r3, [r3, r2]
8001a56: 4a6e ldr r2, [pc, #440] @ (8001c10 <HAL_SYSTICK_Callback+0x3dc>)
8001a58: 7812 ldrb r2, [r2, #0]
8001a5a: f023 0320 bic.w r3, r3, #32
8001a5e: b2d9 uxtb r1, r3
8001a60: 4b6c ldr r3, [pc, #432] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a62: 5499 strb r1, [r3, r2]
pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]);
8001a64: 4b6b ldr r3, [pc, #428] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a66: 781a ldrb r2, [r3, #0]
8001a68: 4b6a ldr r3, [pc, #424] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a6a: 785b ldrb r3, [r3, #1]
8001a6c: 4013 ands r3, r2
8001a6e: b2da uxtb r2, r3
8001a70: 4b68 ldr r3, [pc, #416] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a72: 789b ldrb r3, [r3, #2]
8001a74: 4013 ands r3, r2
8001a76: b2da uxtb r2, r3
8001a78: 4b66 ldr r3, [pc, #408] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a7a: 78db ldrb r3, [r3, #3]
8001a7c: 4013 ands r3, r2
8001a7e: b2da uxtb r2, r3
8001a80: 4b65 ldr r3, [pc, #404] @ (8001c18 <HAL_SYSTICK_Callback+0x3e4>)
8001a82: 781b ldrb r3, [r3, #0]
8001a84: 4313 orrs r3, r2
8001a86: b2da uxtb r2, r3
8001a88: 4b63 ldr r3, [pc, #396] @ (8001c18 <HAL_SYSTICK_Callback+0x3e4>)
8001a8a: 701a strb r2, [r3, #0]
pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]);
8001a8c: 4b61 ldr r3, [pc, #388] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a8e: 781a ldrb r2, [r3, #0]
8001a90: 4b60 ldr r3, [pc, #384] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a92: 785b ldrb r3, [r3, #1]
8001a94: 4313 orrs r3, r2
8001a96: b2da uxtb r2, r3
8001a98: 4b5e ldr r3, [pc, #376] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001a9a: 789b ldrb r3, [r3, #2]
8001a9c: 4313 orrs r3, r2
8001a9e: b2da uxtb r2, r3
8001aa0: 4b5c ldr r3, [pc, #368] @ (8001c14 <HAL_SYSTICK_Callback+0x3e0>)
8001aa2: 78db ldrb r3, [r3, #3]
8001aa4: 4313 orrs r3, r2
8001aa6: b2da uxtb r2, r3
8001aa8: 4b5b ldr r3, [pc, #364] @ (8001c18 <HAL_SYSTICK_Callback+0x3e4>)
8001aaa: 781b ldrb r3, [r3, #0]
8001aac: 4013 ands r3, r2
8001aae: b2da uxtb r2, r3
8001ab0: 4b59 ldr r3, [pc, #356] @ (8001c18 <HAL_SYSTICK_Callback+0x3e4>)
8001ab2: 701a strb r2, [r3, #0]
//**** legge adc ***********************************************************************************
readAdc();
8001ab4: f7fe fb88 bl 80001c8 <readAdc>
if (++c100ms >= 10) { // 10 ms
8001ab8: 4b58 ldr r3, [pc, #352] @ (8001c1c <HAL_SYSTICK_Callback+0x3e8>)
8001aba: 781b ldrb r3, [r3, #0]
8001abc: 3301 adds r3, #1
8001abe: b2da uxtb r2, r3
8001ac0: 4b56 ldr r3, [pc, #344] @ (8001c1c <HAL_SYSTICK_Callback+0x3e8>)
8001ac2: 701a strb r2, [r3, #0]
8001ac4: 4b55 ldr r3, [pc, #340] @ (8001c1c <HAL_SYSTICK_Callback+0x3e8>)
8001ac6: 781b ldrb r3, [r3, #0]
8001ac8: 2b09 cmp r3, #9
8001aca: f240 809c bls.w 8001c06 <HAL_SYSTICK_Callback+0x3d2>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8001ace: 4b53 ldr r3, [pc, #332] @ (8001c1c <HAL_SYSTICK_Callback+0x3e8>)
8001ad0: 2200 movs r2, #0
8001ad2: 701a strb r2, [r3, #0]
for(i=0;i<4;i++){
8001ad4: 2300 movs r3, #0
8001ad6: 71fb strb r3, [r7, #7]
8001ad8: e013 b.n 8001b02 <HAL_SYSTICK_Callback+0x2ce>
if(rtramp[i])rtramp[i]--;
8001ada: 79fb ldrb r3, [r7, #7]
8001adc: 4a50 ldr r2, [pc, #320] @ (8001c20 <HAL_SYSTICK_Callback+0x3ec>)
8001ade: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001ae2: b29b uxth r3, r3
8001ae4: 2b00 cmp r3, #0
8001ae6: d009 beq.n 8001afc <HAL_SYSTICK_Callback+0x2c8>
8001ae8: 79fb ldrb r3, [r7, #7]
8001aea: 4a4d ldr r2, [pc, #308] @ (8001c20 <HAL_SYSTICK_Callback+0x3ec>)
8001aec: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8001af0: b292 uxth r2, r2
8001af2: 3a01 subs r2, #1
8001af4: b291 uxth r1, r2
8001af6: 4a4a ldr r2, [pc, #296] @ (8001c20 <HAL_SYSTICK_Callback+0x3ec>)
8001af8: f822 1013 strh.w r1, [r2, r3, lsl #1]
for(i=0;i<4;i++){
8001afc: 79fb ldrb r3, [r7, #7]
8001afe: 3301 adds r3, #1
8001b00: 71fb strb r3, [r7, #7]
8001b02: 79fb ldrb r3, [r7, #7]
8001b04: 2b03 cmp r3, #3
8001b06: d9e8 bls.n 8001ada <HAL_SYSTICK_Callback+0x2a6>
}
if(rtCiclo<0xffff)rtCiclo++;
8001b08: 4b46 ldr r3, [pc, #280] @ (8001c24 <HAL_SYSTICK_Callback+0x3f0>)
8001b0a: 881b ldrh r3, [r3, #0]
8001b0c: b29b uxth r3, r3
8001b0e: f64f 72ff movw r2, #65535 @ 0xffff
8001b12: 4293 cmp r3, r2
8001b14: d006 beq.n 8001b24 <HAL_SYSTICK_Callback+0x2f0>
8001b16: 4b43 ldr r3, [pc, #268] @ (8001c24 <HAL_SYSTICK_Callback+0x3f0>)
8001b18: 881b ldrh r3, [r3, #0]
8001b1a: b29b uxth r3, r3
8001b1c: 3301 adds r3, #1
8001b1e: b29a uxth r2, r3
8001b20: 4b40 ldr r3, [pc, #256] @ (8001c24 <HAL_SYSTICK_Callback+0x3f0>)
8001b22: 801a strh r2, [r3, #0]
//**** gestione buzzer *****************************************************************************
if(stBuz==bzmoving){
8001b24: 4b40 ldr r3, [pc, #256] @ (8001c28 <HAL_SYSTICK_Callback+0x3f4>)
8001b26: 781b ldrb r3, [r3, #0]
8001b28: b2db uxtb r3, r3
8001b2a: 2b01 cmp r3, #1
8001b2c: d127 bne.n 8001b7e <HAL_SYSTICK_Callback+0x34a>
if(nobuz){
8001b2e: 4b3f ldr r3, [pc, #252] @ (8001c2c <HAL_SYSTICK_Callback+0x3f8>)
8001b30: 781b ldrb r3, [r3, #0]
8001b32: 2b00 cmp r3, #0
8001b34: d011 beq.n 8001b5a <HAL_SYSTICK_Callback+0x326>
if(c1s>=5)HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8001b36: 4b3e ldr r3, [pc, #248] @ (8001c30 <HAL_SYSTICK_Callback+0x3fc>)
8001b38: 781b ldrb r3, [r3, #0]
8001b3a: 2b04 cmp r3, #4
8001b3c: d906 bls.n 8001b4c <HAL_SYSTICK_Callback+0x318>
8001b3e: 2200 movs r2, #0
8001b40: f44f 5100 mov.w r1, #8192 @ 0x2000
8001b44: 483b ldr r0, [pc, #236] @ (8001c34 <HAL_SYSTICK_Callback+0x400>)
8001b46: f004 fa16 bl 8005f76 <HAL_GPIO_WritePin>
8001b4a: e04f b.n 8001bec <HAL_SYSTICK_Callback+0x3b8>
8001b4c: 2201 movs r2, #1
8001b4e: f44f 5100 mov.w r1, #8192 @ 0x2000
8001b52: 4838 ldr r0, [pc, #224] @ (8001c34 <HAL_SYSTICK_Callback+0x400>)
8001b54: f004 fa0f bl 8005f76 <HAL_GPIO_WritePin>
8001b58: e048 b.n 8001bec <HAL_SYSTICK_Callback+0x3b8>
}else{
if(c1s>=5)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001b5a: 4b35 ldr r3, [pc, #212] @ (8001c30 <HAL_SYSTICK_Callback+0x3fc>)
8001b5c: 781b ldrb r3, [r3, #0]
8001b5e: 2b04 cmp r3, #4
8001b60: d906 bls.n 8001b70 <HAL_SYSTICK_Callback+0x33c>
8001b62: 2200 movs r2, #0
8001b64: f44f 7180 mov.w r1, #256 @ 0x100
8001b68: 4833 ldr r0, [pc, #204] @ (8001c38 <HAL_SYSTICK_Callback+0x404>)
8001b6a: f004 fa04 bl 8005f76 <HAL_GPIO_WritePin>
8001b6e: e03d b.n 8001bec <HAL_SYSTICK_Callback+0x3b8>
8001b70: 2201 movs r2, #1
8001b72: f44f 7180 mov.w r1, #256 @ 0x100
8001b76: 4830 ldr r0, [pc, #192] @ (8001c38 <HAL_SYSTICK_Callback+0x404>)
8001b78: f004 f9fd bl 8005f76 <HAL_GPIO_WritePin>
8001b7c: e036 b.n 8001bec <HAL_SYSTICK_Callback+0x3b8>
}
}else if(stBuz==bzwarning){
8001b7e: 4b2a ldr r3, [pc, #168] @ (8001c28 <HAL_SYSTICK_Callback+0x3f4>)
8001b80: 781b ldrb r3, [r3, #0]
8001b82: b2db uxtb r3, r3
8001b84: 2b02 cmp r3, #2
8001b86: d12b bne.n 8001be0 <HAL_SYSTICK_Callback+0x3ac>
if(nobuz){
8001b88: 4b28 ldr r3, [pc, #160] @ (8001c2c <HAL_SYSTICK_Callback+0x3f8>)
8001b8a: 781b ldrb r3, [r3, #0]
8001b8c: 2b00 cmp r3, #0
8001b8e: d013 beq.n 8001bb8 <HAL_SYSTICK_Callback+0x384>
if(c1s&2)HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8001b90: 4b27 ldr r3, [pc, #156] @ (8001c30 <HAL_SYSTICK_Callback+0x3fc>)
8001b92: 781b ldrb r3, [r3, #0]
8001b94: f003 0302 and.w r3, r3, #2
8001b98: 2b00 cmp r3, #0
8001b9a: d006 beq.n 8001baa <HAL_SYSTICK_Callback+0x376>
8001b9c: 2200 movs r2, #0
8001b9e: f44f 5100 mov.w r1, #8192 @ 0x2000
8001ba2: 4824 ldr r0, [pc, #144] @ (8001c34 <HAL_SYSTICK_Callback+0x400>)
8001ba4: f004 f9e7 bl 8005f76 <HAL_GPIO_WritePin>
8001ba8: e020 b.n 8001bec <HAL_SYSTICK_Callback+0x3b8>
8001baa: 2201 movs r2, #1
8001bac: f44f 5100 mov.w r1, #8192 @ 0x2000
8001bb0: 4820 ldr r0, [pc, #128] @ (8001c34 <HAL_SYSTICK_Callback+0x400>)
8001bb2: f004 f9e0 bl 8005f76 <HAL_GPIO_WritePin>
8001bb6: e019 b.n 8001bec <HAL_SYSTICK_Callback+0x3b8>
}else{
if(c1s&2)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001bb8: 4b1d ldr r3, [pc, #116] @ (8001c30 <HAL_SYSTICK_Callback+0x3fc>)
8001bba: 781b ldrb r3, [r3, #0]
8001bbc: f003 0302 and.w r3, r3, #2
8001bc0: 2b00 cmp r3, #0
8001bc2: d006 beq.n 8001bd2 <HAL_SYSTICK_Callback+0x39e>
8001bc4: 2200 movs r2, #0
8001bc6: f44f 7180 mov.w r1, #256 @ 0x100
8001bca: 481b ldr r0, [pc, #108] @ (8001c38 <HAL_SYSTICK_Callback+0x404>)
8001bcc: f004 f9d3 bl 8005f76 <HAL_GPIO_WritePin>
8001bd0: e00c b.n 8001bec <HAL_SYSTICK_Callback+0x3b8>
8001bd2: 2201 movs r2, #1
8001bd4: f44f 7180 mov.w r1, #256 @ 0x100
8001bd8: 4817 ldr r0, [pc, #92] @ (8001c38 <HAL_SYSTICK_Callback+0x404>)
8001bda: f004 f9cc bl 8005f76 <HAL_GPIO_WritePin>
8001bde: e005 b.n 8001bec <HAL_SYSTICK_Callback+0x3b8>
}
}else{//bzoff
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001be0: 2200 movs r2, #0
8001be2: f44f 7180 mov.w r1, #256 @ 0x100
8001be6: 4814 ldr r0, [pc, #80] @ (8001c38 <HAL_SYSTICK_Callback+0x404>)
8001be8: f004 f9c5 bl 8005f76 <HAL_GPIO_WritePin>
}
//**************************************************************************************************
if (++c1s >= 10) { // 1 s
8001bec: 4b10 ldr r3, [pc, #64] @ (8001c30 <HAL_SYSTICK_Callback+0x3fc>)
8001bee: 781b ldrb r3, [r3, #0]
8001bf0: 3301 adds r3, #1
8001bf2: b2da uxtb r2, r3
8001bf4: 4b0e ldr r3, [pc, #56] @ (8001c30 <HAL_SYSTICK_Callback+0x3fc>)
8001bf6: 701a strb r2, [r3, #0]
8001bf8: 4b0d ldr r3, [pc, #52] @ (8001c30 <HAL_SYSTICK_Callback+0x3fc>)
8001bfa: 781b ldrb r3, [r3, #0]
8001bfc: 2b09 cmp r3, #9
8001bfe: d902 bls.n 8001c06 <HAL_SYSTICK_Callback+0x3d2>
c1s = 0;
8001c00: 4b0b ldr r3, [pc, #44] @ (8001c30 <HAL_SYSTICK_Callback+0x3fc>)
8001c02: 2200 movs r2, #0
8001c04: 701a strb r2, [r3, #0]
//HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
}
}
}
}
8001c06: bf00 nop
8001c08: 3708 adds r7, #8
8001c0a: 46bd mov sp, r7
8001c0c: bd80 pop {r7, pc}
8001c0e: bf00 nop
8001c10: 20000452 .word 0x20000452
8001c14: 20000454 .word 0x20000454
8001c18: 200003f0 .word 0x200003f0
8001c1c: 20000458 .word 0x20000458
8001c20: 200003f4 .word 0x200003f4
8001c24: 200003fc .word 0x200003fc
8001c28: 2000044f .word 0x2000044f
8001c2c: 20000450 .word 0x20000450
8001c30: 20000459 .word 0x20000459
8001c34: 40011000 .word 0x40011000
8001c38: 40010800 .word 0x40010800
08001c3c <managePulsanti>:
void managePulsanti(void){
8001c3c: b580 push {r7, lr}
8001c3e: af00 add r7, sp, #0
if(pulsanti&INP1){
8001c40: 4baa ldr r3, [pc, #680] @ (8001eec <managePulsanti+0x2b0>)
8001c42: 781b ldrb r3, [r3, #0]
8001c44: f003 0301 and.w r3, r3, #1
8001c48: 2b00 cmp r3, #0
8001c4a: d013 beq.n 8001c74 <managePulsanti+0x38>
if(rtP1==0)stPulsanti|=P1START;
8001c4c: 4ba8 ldr r3, [pc, #672] @ (8001ef0 <managePulsanti+0x2b4>)
8001c4e: 781b ldrb r3, [r3, #0]
8001c50: b2db uxtb r3, r3
8001c52: 2b00 cmp r3, #0
8001c54: d107 bne.n 8001c66 <managePulsanti+0x2a>
8001c56: 4ba7 ldr r3, [pc, #668] @ (8001ef4 <managePulsanti+0x2b8>)
8001c58: 881b ldrh r3, [r3, #0]
8001c5a: f043 0301 orr.w r3, r3, #1
8001c5e: b29a uxth r2, r3
8001c60: 4ba4 ldr r3, [pc, #656] @ (8001ef4 <managePulsanti+0x2b8>)
8001c62: 801a strh r2, [r3, #0]
8001c64: e02f b.n 8001cc6 <managePulsanti+0x8a>
else{
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_SET);
8001c66: 2201 movs r2, #1
8001c68: f44f 5100 mov.w r1, #8192 @ 0x2000
8001c6c: 48a2 ldr r0, [pc, #648] @ (8001ef8 <managePulsanti+0x2bc>)
8001c6e: f004 f982 bl 8005f76 <HAL_GPIO_WritePin>
8001c72: e028 b.n 8001cc6 <managePulsanti+0x8a>
}
}else{
if(stPulsanti&P1START){
8001c74: 4b9f ldr r3, [pc, #636] @ (8001ef4 <managePulsanti+0x2b8>)
8001c76: 881b ldrh r3, [r3, #0]
8001c78: f003 0301 and.w r3, r3, #1
8001c7c: 2b00 cmp r3, #0
8001c7e: d00d beq.n 8001c9c <managePulsanti+0x60>
stPulsanti&=(~P1START);
8001c80: 4b9c ldr r3, [pc, #624] @ (8001ef4 <managePulsanti+0x2b8>)
8001c82: 881b ldrh r3, [r3, #0]
8001c84: f023 0301 bic.w r3, r3, #1
8001c88: b29a uxth r2, r3
8001c8a: 4b9a ldr r3, [pc, #616] @ (8001ef4 <managePulsanti+0x2b8>)
8001c8c: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_RESET);
8001c8e: 2200 movs r2, #0
8001c90: f44f 5100 mov.w r1, #8192 @ 0x2000
8001c94: 4898 ldr r0, [pc, #608] @ (8001ef8 <managePulsanti+0x2bc>)
8001c96: f004 f96e bl 8005f76 <HAL_GPIO_WritePin>
8001c9a: e011 b.n 8001cc0 <managePulsanti+0x84>
}else if(rtP1<=190){
8001c9c: 4b94 ldr r3, [pc, #592] @ (8001ef0 <managePulsanti+0x2b4>)
8001c9e: 781b ldrb r3, [r3, #0]
8001ca0: b2db uxtb r3, r3
8001ca2: 2bbe cmp r3, #190 @ 0xbe
8001ca4: d80c bhi.n 8001cc0 <managePulsanti+0x84>
stPulsanti|=P1STOP;
8001ca6: 4b93 ldr r3, [pc, #588] @ (8001ef4 <managePulsanti+0x2b8>)
8001ca8: 881b ldrh r3, [r3, #0]
8001caa: f043 0302 orr.w r3, r3, #2
8001cae: b29a uxth r2, r3
8001cb0: 4b90 ldr r3, [pc, #576] @ (8001ef4 <managePulsanti+0x2b8>)
8001cb2: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_RESET);
8001cb4: 2200 movs r2, #0
8001cb6: f44f 5100 mov.w r1, #8192 @ 0x2000
8001cba: 488f ldr r0, [pc, #572] @ (8001ef8 <managePulsanti+0x2bc>)
8001cbc: f004 f95b bl 8005f76 <HAL_GPIO_WritePin>
}
rtP1=200;
8001cc0: 4b8b ldr r3, [pc, #556] @ (8001ef0 <managePulsanti+0x2b4>)
8001cc2: 22c8 movs r2, #200 @ 0xc8
8001cc4: 701a strb r2, [r3, #0]
}
if(pulsanti&INP2){
8001cc6: 4b89 ldr r3, [pc, #548] @ (8001eec <managePulsanti+0x2b0>)
8001cc8: 781b ldrb r3, [r3, #0]
8001cca: f003 0302 and.w r3, r3, #2
8001cce: 2b00 cmp r3, #0
8001cd0: d00c beq.n 8001cec <managePulsanti+0xb0>
if(rtP2==0)stPulsanti|=P2START;
8001cd2: 4b8a ldr r3, [pc, #552] @ (8001efc <managePulsanti+0x2c0>)
8001cd4: 781b ldrb r3, [r3, #0]
8001cd6: b2db uxtb r3, r3
8001cd8: 2b00 cmp r3, #0
8001cda: d124 bne.n 8001d26 <managePulsanti+0xea>
8001cdc: 4b85 ldr r3, [pc, #532] @ (8001ef4 <managePulsanti+0x2b8>)
8001cde: 881b ldrh r3, [r3, #0]
8001ce0: f043 0304 orr.w r3, r3, #4
8001ce4: b29a uxth r2, r3
8001ce6: 4b83 ldr r3, [pc, #524] @ (8001ef4 <managePulsanti+0x2b8>)
8001ce8: 801a strh r2, [r3, #0]
8001cea: e01c b.n 8001d26 <managePulsanti+0xea>
}else{
if(stPulsanti&P2START)stPulsanti&=(~P2START);
8001cec: 4b81 ldr r3, [pc, #516] @ (8001ef4 <managePulsanti+0x2b8>)
8001cee: 881b ldrh r3, [r3, #0]
8001cf0: f003 0304 and.w r3, r3, #4
8001cf4: 2b00 cmp r3, #0
8001cf6: d007 beq.n 8001d08 <managePulsanti+0xcc>
8001cf8: 4b7e ldr r3, [pc, #504] @ (8001ef4 <managePulsanti+0x2b8>)
8001cfa: 881b ldrh r3, [r3, #0]
8001cfc: f023 0304 bic.w r3, r3, #4
8001d00: b29a uxth r2, r3
8001d02: 4b7c ldr r3, [pc, #496] @ (8001ef4 <managePulsanti+0x2b8>)
8001d04: 801a strh r2, [r3, #0]
8001d06: e00b b.n 8001d20 <managePulsanti+0xe4>
else if(rtP2<=190)stPulsanti|=P2STOP;
8001d08: 4b7c ldr r3, [pc, #496] @ (8001efc <managePulsanti+0x2c0>)
8001d0a: 781b ldrb r3, [r3, #0]
8001d0c: b2db uxtb r3, r3
8001d0e: 2bbe cmp r3, #190 @ 0xbe
8001d10: d806 bhi.n 8001d20 <managePulsanti+0xe4>
8001d12: 4b78 ldr r3, [pc, #480] @ (8001ef4 <managePulsanti+0x2b8>)
8001d14: 881b ldrh r3, [r3, #0]
8001d16: f043 0308 orr.w r3, r3, #8
8001d1a: b29a uxth r2, r3
8001d1c: 4b75 ldr r3, [pc, #468] @ (8001ef4 <managePulsanti+0x2b8>)
8001d1e: 801a strh r2, [r3, #0]
rtP2=200;
8001d20: 4b76 ldr r3, [pc, #472] @ (8001efc <managePulsanti+0x2c0>)
8001d22: 22c8 movs r2, #200 @ 0xc8
8001d24: 701a strb r2, [r3, #0]
}
stPulsanti&=(P1START|P1STOP|P2START|P2STOP);
8001d26: 4b73 ldr r3, [pc, #460] @ (8001ef4 <managePulsanti+0x2b8>)
8001d28: 881b ldrh r3, [r3, #0]
8001d2a: f003 030f and.w r3, r3, #15
8001d2e: b29a uxth r2, r3
8001d30: 4b70 ldr r3, [pc, #448] @ (8001ef4 <managePulsanti+0x2b8>)
8001d32: 801a strh r2, [r3, #0]
if(stPulsanti==0){
8001d34: 4b6f ldr r3, [pc, #444] @ (8001ef4 <managePulsanti+0x2b8>)
8001d36: 881b ldrh r3, [r3, #0]
8001d38: 2b00 cmp r3, #0
8001d3a: f040 80d4 bne.w 8001ee6 <managePulsanti+0x2aa>
switch(pulsanti&0x3c){
8001d3e: 4b6b ldr r3, [pc, #428] @ (8001eec <managePulsanti+0x2b0>)
8001d40: 781b ldrb r3, [r3, #0]
8001d42: f003 033c and.w r3, r3, #60 @ 0x3c
8001d46: 2b30 cmp r3, #48 @ 0x30
8001d48: f200 80bb bhi.w 8001ec2 <managePulsanti+0x286>
8001d4c: a201 add r2, pc, #4 @ (adr r2, 8001d54 <managePulsanti+0x118>)
8001d4e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001d52: bf00 nop
8001d54: 08001e19 .word 0x08001e19
8001d58: 08001ec3 .word 0x08001ec3
8001d5c: 08001ec3 .word 0x08001ec3
8001d60: 08001ec3 .word 0x08001ec3
8001d64: 08001e75 .word 0x08001e75
8001d68: 08001ec3 .word 0x08001ec3
8001d6c: 08001ec3 .word 0x08001ec3
8001d70: 08001ec3 .word 0x08001ec3
8001d74: 08001e27 .word 0x08001e27
8001d78: 08001ec3 .word 0x08001ec3
8001d7c: 08001ec3 .word 0x08001ec3
8001d80: 08001ec3 .word 0x08001ec3
8001d84: 08001ea9 .word 0x08001ea9
8001d88: 08001ec3 .word 0x08001ec3
8001d8c: 08001ec3 .word 0x08001ec3
8001d90: 08001ec3 .word 0x08001ec3
8001d94: 08001e41 .word 0x08001e41
8001d98: 08001ec3 .word 0x08001ec3
8001d9c: 08001ec3 .word 0x08001ec3
8001da0: 08001ec3 .word 0x08001ec3
8001da4: 08001ec3 .word 0x08001ec3
8001da8: 08001ec3 .word 0x08001ec3
8001dac: 08001ec3 .word 0x08001ec3
8001db0: 08001ec3 .word 0x08001ec3
8001db4: 08001ec3 .word 0x08001ec3
8001db8: 08001ec3 .word 0x08001ec3
8001dbc: 08001ec3 .word 0x08001ec3
8001dc0: 08001ec3 .word 0x08001ec3
8001dc4: 08001ec3 .word 0x08001ec3
8001dc8: 08001ec3 .word 0x08001ec3
8001dcc: 08001ec3 .word 0x08001ec3
8001dd0: 08001ec3 .word 0x08001ec3
8001dd4: 08001e5b .word 0x08001e5b
8001dd8: 08001ec3 .word 0x08001ec3
8001ddc: 08001ec3 .word 0x08001ec3
8001de0: 08001ec3 .word 0x08001ec3
8001de4: 08001ec3 .word 0x08001ec3
8001de8: 08001ec3 .word 0x08001ec3
8001dec: 08001ec3 .word 0x08001ec3
8001df0: 08001ec3 .word 0x08001ec3
8001df4: 08001ec3 .word 0x08001ec3
8001df8: 08001ec3 .word 0x08001ec3
8001dfc: 08001ec3 .word 0x08001ec3
8001e00: 08001ec3 .word 0x08001ec3
8001e04: 08001ec3 .word 0x08001ec3
8001e08: 08001ec3 .word 0x08001ec3
8001e0c: 08001ec3 .word 0x08001ec3
8001e10: 08001ec3 .word 0x08001ec3
8001e14: 08001e8f .word 0x08001e8f
case 0x00:
rtTLC=100;
8001e18: 4b39 ldr r3, [pc, #228] @ (8001f00 <managePulsanti+0x2c4>)
8001e1a: 2264 movs r2, #100 @ 0x64
8001e1c: 701a strb r2, [r3, #0]
stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW));
8001e1e: 4b35 ldr r3, [pc, #212] @ (8001ef4 <managePulsanti+0x2b8>)
8001e20: 2200 movs r2, #0
8001e22: 801a strh r2, [r3, #0]
break;
8001e24: e05f b.n 8001ee6 <managePulsanti+0x2aa>
case 0x08://tlc1
if(rtTLC==0)stPulsanti|=M1FW;
8001e26: 4b36 ldr r3, [pc, #216] @ (8001f00 <managePulsanti+0x2c4>)
8001e28: 781b ldrb r3, [r3, #0]
8001e2a: b2db uxtb r3, r3
8001e2c: 2b00 cmp r3, #0
8001e2e: d14f bne.n 8001ed0 <managePulsanti+0x294>
8001e30: 4b30 ldr r3, [pc, #192] @ (8001ef4 <managePulsanti+0x2b8>)
8001e32: 881b ldrh r3, [r3, #0]
8001e34: f043 0310 orr.w r3, r3, #16
8001e38: b29a uxth r2, r3
8001e3a: 4b2e ldr r3, [pc, #184] @ (8001ef4 <managePulsanti+0x2b8>)
8001e3c: 801a strh r2, [r3, #0]
break;
8001e3e: e047 b.n 8001ed0 <managePulsanti+0x294>
case 0x10://tlc2
if(rtTLC==0)stPulsanti|=M1BW;
8001e40: 4b2f ldr r3, [pc, #188] @ (8001f00 <managePulsanti+0x2c4>)
8001e42: 781b ldrb r3, [r3, #0]
8001e44: b2db uxtb r3, r3
8001e46: 2b00 cmp r3, #0
8001e48: d144 bne.n 8001ed4 <managePulsanti+0x298>
8001e4a: 4b2a ldr r3, [pc, #168] @ (8001ef4 <managePulsanti+0x2b8>)
8001e4c: 881b ldrh r3, [r3, #0]
8001e4e: f043 0320 orr.w r3, r3, #32
8001e52: b29a uxth r2, r3
8001e54: 4b27 ldr r3, [pc, #156] @ (8001ef4 <managePulsanti+0x2b8>)
8001e56: 801a strh r2, [r3, #0]
break;
8001e58: e03c b.n 8001ed4 <managePulsanti+0x298>
case 0x20://tlc3
if(rtTLC==0)stPulsanti|=M3FW;
8001e5a: 4b29 ldr r3, [pc, #164] @ (8001f00 <managePulsanti+0x2c4>)
8001e5c: 781b ldrb r3, [r3, #0]
8001e5e: b2db uxtb r3, r3
8001e60: 2b00 cmp r3, #0
8001e62: d139 bne.n 8001ed8 <managePulsanti+0x29c>
8001e64: 4b23 ldr r3, [pc, #140] @ (8001ef4 <managePulsanti+0x2b8>)
8001e66: 881b ldrh r3, [r3, #0]
8001e68: f443 7380 orr.w r3, r3, #256 @ 0x100
8001e6c: b29a uxth r2, r3
8001e6e: 4b21 ldr r3, [pc, #132] @ (8001ef4 <managePulsanti+0x2b8>)
8001e70: 801a strh r2, [r3, #0]
break;
8001e72: e031 b.n 8001ed8 <managePulsanti+0x29c>
case 0x04://tlc4
if(rtTLC==0)stPulsanti|=M3BW;
8001e74: 4b22 ldr r3, [pc, #136] @ (8001f00 <managePulsanti+0x2c4>)
8001e76: 781b ldrb r3, [r3, #0]
8001e78: b2db uxtb r3, r3
8001e7a: 2b00 cmp r3, #0
8001e7c: d12e bne.n 8001edc <managePulsanti+0x2a0>
8001e7e: 4b1d ldr r3, [pc, #116] @ (8001ef4 <managePulsanti+0x2b8>)
8001e80: 881b ldrh r3, [r3, #0]
8001e82: f443 7300 orr.w r3, r3, #512 @ 0x200
8001e86: b29a uxth r2, r3
8001e88: 4b1a ldr r3, [pc, #104] @ (8001ef4 <managePulsanti+0x2b8>)
8001e8a: 801a strh r2, [r3, #0]
break;
8001e8c: e026 b.n 8001edc <managePulsanti+0x2a0>
case 0x30://tlc5
if(rtTLC==0)stPulsanti|=M4FW;
8001e8e: 4b1c ldr r3, [pc, #112] @ (8001f00 <managePulsanti+0x2c4>)
8001e90: 781b ldrb r3, [r3, #0]
8001e92: b2db uxtb r3, r3
8001e94: 2b00 cmp r3, #0
8001e96: d123 bne.n 8001ee0 <managePulsanti+0x2a4>
8001e98: 4b16 ldr r3, [pc, #88] @ (8001ef4 <managePulsanti+0x2b8>)
8001e9a: 881b ldrh r3, [r3, #0]
8001e9c: f443 6380 orr.w r3, r3, #1024 @ 0x400
8001ea0: b29a uxth r2, r3
8001ea2: 4b14 ldr r3, [pc, #80] @ (8001ef4 <managePulsanti+0x2b8>)
8001ea4: 801a strh r2, [r3, #0]
break;
8001ea6: e01b b.n 8001ee0 <managePulsanti+0x2a4>
case 0x0c://tlc6
if(rtTLC==0)stPulsanti|=M4BW;
8001ea8: 4b15 ldr r3, [pc, #84] @ (8001f00 <managePulsanti+0x2c4>)
8001eaa: 781b ldrb r3, [r3, #0]
8001eac: b2db uxtb r3, r3
8001eae: 2b00 cmp r3, #0
8001eb0: d118 bne.n 8001ee4 <managePulsanti+0x2a8>
8001eb2: 4b10 ldr r3, [pc, #64] @ (8001ef4 <managePulsanti+0x2b8>)
8001eb4: 881b ldrh r3, [r3, #0]
8001eb6: f443 6300 orr.w r3, r3, #2048 @ 0x800
8001eba: b29a uxth r2, r3
8001ebc: 4b0d ldr r3, [pc, #52] @ (8001ef4 <managePulsanti+0x2b8>)
8001ebe: 801a strh r2, [r3, #0]
break;
8001ec0: e010 b.n 8001ee4 <managePulsanti+0x2a8>
default:
rtTLC=100;
8001ec2: 4b0f ldr r3, [pc, #60] @ (8001f00 <managePulsanti+0x2c4>)
8001ec4: 2264 movs r2, #100 @ 0x64
8001ec6: 701a strb r2, [r3, #0]
stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW));
8001ec8: 4b0a ldr r3, [pc, #40] @ (8001ef4 <managePulsanti+0x2b8>)
8001eca: 2200 movs r2, #0
8001ecc: 801a strh r2, [r3, #0]
break;
8001ece: e00a b.n 8001ee6 <managePulsanti+0x2aa>
break;
8001ed0: bf00 nop
8001ed2: e008 b.n 8001ee6 <managePulsanti+0x2aa>
break;
8001ed4: bf00 nop
8001ed6: e006 b.n 8001ee6 <managePulsanti+0x2aa>
break;
8001ed8: bf00 nop
8001eda: e004 b.n 8001ee6 <managePulsanti+0x2aa>
break;
8001edc: bf00 nop
8001ede: e002 b.n 8001ee6 <managePulsanti+0x2aa>
break;
8001ee0: bf00 nop
8001ee2: e000 b.n 8001ee6 <managePulsanti+0x2aa>
break;
8001ee4: bf00 nop
}
}
}
8001ee6: bf00 nop
8001ee8: bd80 pop {r7, pc}
8001eea: bf00 nop
8001eec: 200003f0 .word 0x200003f0
8001ef0: 20000004 .word 0x20000004
8001ef4: 2000044c .word 0x2000044c
8001ef8: 40011000 .word 0x40011000
8001efc: 20000005 .word 0x20000005
8001f00: 20000006 .word 0x20000006
08001f04 <manageCiclo>:
void manageCiclo(void){
8001f04: b580 push {r7, lr}
8001f06: b084 sub sp, #16
8001f08: af02 add r7, sp, #8
motMov_st m1,m2,m3,m4;
switch(stCiclo){
8001f0a: 4b9b ldr r3, [pc, #620] @ (8002178 <manageCiclo+0x274>)
8001f0c: 781b ldrb r3, [r3, #0]
8001f0e: 2b16 cmp r3, #22
8001f10: f200 8503 bhi.w 800291a <manageCiclo+0xa16>
8001f14: a201 add r2, pc, #4 @ (adr r2, 8001f1c <manageCiclo+0x18>)
8001f16: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001f1a: bf00 nop
8001f1c: 08001f79 .word 0x08001f79
8001f20: 08001fc3 .word 0x08001fc3
8001f24: 0800200d .word 0x0800200d
8001f28: 08002057 .word 0x08002057
8001f2c: 080020a1 .word 0x080020a1
8001f30: 080020e9 .word 0x080020e9
8001f34: 08002131 .word 0x08002131
8001f38: 080021a5 .word 0x080021a5
8001f3c: 080021ed .word 0x080021ed
8001f40: 08002235 .word 0x08002235
8001f44: 0800227d .word 0x0800227d
8001f48: 080022c5 .word 0x080022c5
8001f4c: 0800230d .word 0x0800230d
8001f50: 08002355 .word 0x08002355
8001f54: 0800239d .word 0x0800239d
8001f58: 08002411 .word 0x08002411
8001f5c: 08002459 .word 0x08002459
8001f60: 080024a1 .word 0x080024a1
8001f64: 08002509 .word 0x08002509
8001f68: 08002573 .word 0x08002573
8001f6c: 080025c1 .word 0x080025c1
8001f70: 08002813 .word 0x08002813
8001f74: 08002875 .word 0x08002875
case omchiuso:
if(stPulsanti&P1START){
8001f78: 4b80 ldr r3, [pc, #512] @ (800217c <manageCiclo+0x278>)
8001f7a: 881b ldrh r3, [r3, #0]
8001f7c: f003 0301 and.w r3, r3, #1
8001f80: 2b00 cmp r3, #0
8001f82: d012 beq.n 8001faa <manageCiclo+0xa6>
stBuz=bzwarning;
8001f84: 4b7e ldr r3, [pc, #504] @ (8002180 <manageCiclo+0x27c>)
8001f86: 2202 movs r2, #2
8001f88: 701a strb r2, [r3, #0]
rtCiclo=0;
8001f8a: 4b7e ldr r3, [pc, #504] @ (8002184 <manageCiclo+0x280>)
8001f8c: 2200 movs r2, #0
8001f8e: 801a strh r2, [r3, #0]
stCiclo=omapertura0;
8001f90: 4b79 ldr r3, [pc, #484] @ (8002178 <manageCiclo+0x274>)
8001f92: 2212 movs r2, #18
8001f94: 701a strb r2, [r3, #0]
(void)m1ap();(void)m2ap();(void)m3ap();(void)m4ap();
8001f96: f001 f841 bl 800301c <m1ap>
8001f9a: f001 f911 bl 80031c0 <m2ap>
8001f9e: f001 f9e1 bl 8003364 <m3ap>
8001fa2: f001 fab3 bl 800350c <m4ap>
}else if(stPulsanti&P1STOP)stCiclo=omstopapertura;
break;
8001fa6: f000 bc8b b.w 80028c0 <manageCiclo+0x9bc>
}else if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001faa: 4b74 ldr r3, [pc, #464] @ (800217c <manageCiclo+0x278>)
8001fac: 881b ldrh r3, [r3, #0]
8001fae: f003 0302 and.w r3, r3, #2
8001fb2: 2b00 cmp r3, #0
8001fb4: f000 8484 beq.w 80028c0 <manageCiclo+0x9bc>
8001fb8: 4b6f ldr r3, [pc, #444] @ (8002178 <manageCiclo+0x274>)
8001fba: 2213 movs r2, #19
8001fbc: 701a strb r2, [r3, #0]
break;
8001fbe: f000 bc7f b.w 80028c0 <manageCiclo+0x9bc>
case omM1fw1:
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8001fc2: 4b71 ldr r3, [pc, #452] @ (8002188 <manageCiclo+0x284>)
8001fc4: 881b ldrh r3, [r3, #0]
8001fc6: b2da uxtb r2, r3
8001fc8: 4b70 ldr r3, [pc, #448] @ (800218c <manageCiclo+0x288>)
8001fca: 881b ldrh r3, [r3, #0]
8001fcc: b2d9 uxtb r1, r3
8001fce: 4b70 ldr r3, [pc, #448] @ (8002190 <manageCiclo+0x28c>)
8001fd0: 881b ldrh r3, [r3, #0]
8001fd2: b2db uxtb r3, r3
8001fd4: 200a movs r0, #10
8001fd6: 9001 str r0, [sp, #4]
8001fd8: 9300 str r3, [sp, #0]
8001fda: 460b mov r3, r1
8001fdc: 2100 movs r1, #0
8001fde: 2001 movs r0, #1
8001fe0: f002 fa1a bl 8004418 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8001fe4: 4b67 ldr r3, [pc, #412] @ (8002184 <manageCiclo+0x280>)
8001fe6: 881b ldrh r3, [r3, #0]
8001fe8: b29a uxth r2, r3
8001fea: 4b6a ldr r3, [pc, #424] @ (8002194 <manageCiclo+0x290>)
8001fec: 881b ldrh r3, [r3, #0]
8001fee: 429a cmp r2, r3
8001ff0: d302 bcc.n 8001ff8 <manageCiclo+0xf4>
8001ff2: 4b61 ldr r3, [pc, #388] @ (8002178 <manageCiclo+0x274>)
8001ff4: 2211 movs r2, #17
8001ff6: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM1fw2;
8001ff8: 4b67 ldr r3, [pc, #412] @ (8002198 <manageCiclo+0x294>)
8001ffa: 781b ldrb r3, [r3, #0]
8001ffc: 2b00 cmp r3, #0
8001ffe: f040 8461 bne.w 80028c4 <manageCiclo+0x9c0>
8002002: 4b5d ldr r3, [pc, #372] @ (8002178 <manageCiclo+0x274>)
8002004: 2202 movs r2, #2
8002006: 701a strb r2, [r3, #0]
break;
8002008: f000 bc5c b.w 80028c4 <manageCiclo+0x9c0>
case omM1fw2:
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
800200c: 4b5e ldr r3, [pc, #376] @ (8002188 <manageCiclo+0x284>)
800200e: 881b ldrh r3, [r3, #0]
8002010: b2da uxtb r2, r3
8002012: 4b5e ldr r3, [pc, #376] @ (800218c <manageCiclo+0x288>)
8002014: 881b ldrh r3, [r3, #0]
8002016: b2d9 uxtb r1, r3
8002018: 4b5d ldr r3, [pc, #372] @ (8002190 <manageCiclo+0x28c>)
800201a: 881b ldrh r3, [r3, #0]
800201c: b2db uxtb r3, r3
800201e: 200a movs r0, #10
8002020: 9001 str r0, [sp, #4]
8002022: 9300 str r3, [sp, #0]
8002024: 460b mov r3, r1
8002026: 2100 movs r1, #0
8002028: 2001 movs r0, #1
800202a: f002 f9f5 bl 8004418 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
800202e: 4b55 ldr r3, [pc, #340] @ (8002184 <manageCiclo+0x280>)
8002030: 881b ldrh r3, [r3, #0]
8002032: b29a uxth r2, r3
8002034: 4b57 ldr r3, [pc, #348] @ (8002194 <manageCiclo+0x290>)
8002036: 881b ldrh r3, [r3, #0]
8002038: 429a cmp r2, r3
800203a: d302 bcc.n 8002042 <manageCiclo+0x13e>
800203c: 4b4e ldr r3, [pc, #312] @ (8002178 <manageCiclo+0x274>)
800203e: 2211 movs r2, #17
8002040: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8002042: 4b55 ldr r3, [pc, #340] @ (8002198 <manageCiclo+0x294>)
8002044: 781b ldrb r3, [r3, #0]
8002046: 2b00 cmp r3, #0
8002048: f000 843e beq.w 80028c8 <manageCiclo+0x9c4>
800204c: 4b4a ldr r3, [pc, #296] @ (8002178 <manageCiclo+0x274>)
800204e: 2211 movs r2, #17
8002050: 701a strb r2, [r3, #0]
break;
8002052: f000 bc39 b.w 80028c8 <manageCiclo+0x9c4>
case omM1bw1:
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8002056: 4b4c ldr r3, [pc, #304] @ (8002188 <manageCiclo+0x284>)
8002058: 881b ldrh r3, [r3, #0]
800205a: b2da uxtb r2, r3
800205c: 4b4b ldr r3, [pc, #300] @ (800218c <manageCiclo+0x288>)
800205e: 881b ldrh r3, [r3, #0]
8002060: b2d9 uxtb r1, r3
8002062: 4b4b ldr r3, [pc, #300] @ (8002190 <manageCiclo+0x28c>)
8002064: 881b ldrh r3, [r3, #0]
8002066: b2db uxtb r3, r3
8002068: 200a movs r0, #10
800206a: 9001 str r0, [sp, #4]
800206c: 9300 str r3, [sp, #0]
800206e: 460b mov r3, r1
8002070: 2101 movs r1, #1
8002072: 2001 movs r0, #1
8002074: f002 f9d0 bl 8004418 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8002078: 4b42 ldr r3, [pc, #264] @ (8002184 <manageCiclo+0x280>)
800207a: 881b ldrh r3, [r3, #0]
800207c: b29a uxth r2, r3
800207e: 4b45 ldr r3, [pc, #276] @ (8002194 <manageCiclo+0x290>)
8002080: 881b ldrh r3, [r3, #0]
8002082: 429a cmp r2, r3
8002084: d302 bcc.n 800208c <manageCiclo+0x188>
8002086: 4b3c ldr r3, [pc, #240] @ (8002178 <manageCiclo+0x274>)
8002088: 2211 movs r2, #17
800208a: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM1bw2;
800208c: 4b42 ldr r3, [pc, #264] @ (8002198 <manageCiclo+0x294>)
800208e: 781b ldrb r3, [r3, #0]
8002090: 2b00 cmp r3, #0
8002092: f040 841b bne.w 80028cc <manageCiclo+0x9c8>
8002096: 4b38 ldr r3, [pc, #224] @ (8002178 <manageCiclo+0x274>)
8002098: 2204 movs r2, #4
800209a: 701a strb r2, [r3, #0]
break;
800209c: f000 bc16 b.w 80028cc <manageCiclo+0x9c8>
case omM1bw2:
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
80020a0: 4b39 ldr r3, [pc, #228] @ (8002188 <manageCiclo+0x284>)
80020a2: 881b ldrh r3, [r3, #0]
80020a4: b2da uxtb r2, r3
80020a6: 4b39 ldr r3, [pc, #228] @ (800218c <manageCiclo+0x288>)
80020a8: 881b ldrh r3, [r3, #0]
80020aa: b2d9 uxtb r1, r3
80020ac: 4b38 ldr r3, [pc, #224] @ (8002190 <manageCiclo+0x28c>)
80020ae: 881b ldrh r3, [r3, #0]
80020b0: b2db uxtb r3, r3
80020b2: 200a movs r0, #10
80020b4: 9001 str r0, [sp, #4]
80020b6: 9300 str r3, [sp, #0]
80020b8: 460b mov r3, r1
80020ba: 2101 movs r1, #1
80020bc: 2001 movs r0, #1
80020be: f002 f9ab bl 8004418 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
80020c2: 4b30 ldr r3, [pc, #192] @ (8002184 <manageCiclo+0x280>)
80020c4: 881b ldrh r3, [r3, #0]
80020c6: b29a uxth r2, r3
80020c8: 4b32 ldr r3, [pc, #200] @ (8002194 <manageCiclo+0x290>)
80020ca: 881b ldrh r3, [r3, #0]
80020cc: 429a cmp r2, r3
80020ce: d302 bcc.n 80020d6 <manageCiclo+0x1d2>
80020d0: 4b29 ldr r3, [pc, #164] @ (8002178 <manageCiclo+0x274>)
80020d2: 2211 movs r2, #17
80020d4: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80020d6: 4b30 ldr r3, [pc, #192] @ (8002198 <manageCiclo+0x294>)
80020d8: 781b ldrb r3, [r3, #0]
80020da: 2b00 cmp r3, #0
80020dc: f000 83f8 beq.w 80028d0 <manageCiclo+0x9cc>
80020e0: 4b25 ldr r3, [pc, #148] @ (8002178 <manageCiclo+0x274>)
80020e2: 2211 movs r2, #17
80020e4: 701a strb r2, [r3, #0]
break;
80020e6: e3f3 b.n 80028d0 <manageCiclo+0x9cc>
case omM2fw1:
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
80020e8: 4b27 ldr r3, [pc, #156] @ (8002188 <manageCiclo+0x284>)
80020ea: 885b ldrh r3, [r3, #2]
80020ec: b2da uxtb r2, r3
80020ee: 4b2b ldr r3, [pc, #172] @ (800219c <manageCiclo+0x298>)
80020f0: 881b ldrh r3, [r3, #0]
80020f2: b2d9 uxtb r1, r3
80020f4: 4b26 ldr r3, [pc, #152] @ (8002190 <manageCiclo+0x28c>)
80020f6: 881b ldrh r3, [r3, #0]
80020f8: b2db uxtb r3, r3
80020fa: 200a movs r0, #10
80020fc: 9001 str r0, [sp, #4]
80020fe: 9300 str r3, [sp, #0]
8002100: 460b mov r3, r1
8002102: 2100 movs r1, #0
8002104: 2002 movs r0, #2
8002106: f002 f987 bl 8004418 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
800210a: 4b1e ldr r3, [pc, #120] @ (8002184 <manageCiclo+0x280>)
800210c: 881b ldrh r3, [r3, #0]
800210e: b29a uxth r2, r3
8002110: 4b23 ldr r3, [pc, #140] @ (80021a0 <manageCiclo+0x29c>)
8002112: 881b ldrh r3, [r3, #0]
8002114: 429a cmp r2, r3
8002116: d302 bcc.n 800211e <manageCiclo+0x21a>
8002118: 4b17 ldr r3, [pc, #92] @ (8002178 <manageCiclo+0x274>)
800211a: 2211 movs r2, #17
800211c: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM2fw2;
800211e: 4b1e ldr r3, [pc, #120] @ (8002198 <manageCiclo+0x294>)
8002120: 781b ldrb r3, [r3, #0]
8002122: 2b00 cmp r3, #0
8002124: f040 83d6 bne.w 80028d4 <manageCiclo+0x9d0>
8002128: 4b13 ldr r3, [pc, #76] @ (8002178 <manageCiclo+0x274>)
800212a: 2206 movs r2, #6
800212c: 701a strb r2, [r3, #0]
break;
800212e: e3d1 b.n 80028d4 <manageCiclo+0x9d0>
case omM2fw2:
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
8002130: 4b15 ldr r3, [pc, #84] @ (8002188 <manageCiclo+0x284>)
8002132: 885b ldrh r3, [r3, #2]
8002134: b2da uxtb r2, r3
8002136: 4b19 ldr r3, [pc, #100] @ (800219c <manageCiclo+0x298>)
8002138: 881b ldrh r3, [r3, #0]
800213a: b2d9 uxtb r1, r3
800213c: 4b14 ldr r3, [pc, #80] @ (8002190 <manageCiclo+0x28c>)
800213e: 881b ldrh r3, [r3, #0]
8002140: b2db uxtb r3, r3
8002142: 200a movs r0, #10
8002144: 9001 str r0, [sp, #4]
8002146: 9300 str r3, [sp, #0]
8002148: 460b mov r3, r1
800214a: 2100 movs r1, #0
800214c: 2002 movs r0, #2
800214e: f002 f963 bl 8004418 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
8002152: 4b0c ldr r3, [pc, #48] @ (8002184 <manageCiclo+0x280>)
8002154: 881b ldrh r3, [r3, #0]
8002156: b29a uxth r2, r3
8002158: 4b11 ldr r3, [pc, #68] @ (80021a0 <manageCiclo+0x29c>)
800215a: 881b ldrh r3, [r3, #0]
800215c: 429a cmp r2, r3
800215e: d302 bcc.n 8002166 <manageCiclo+0x262>
8002160: 4b05 ldr r3, [pc, #20] @ (8002178 <manageCiclo+0x274>)
8002162: 2211 movs r2, #17
8002164: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8002166: 4b0c ldr r3, [pc, #48] @ (8002198 <manageCiclo+0x294>)
8002168: 781b ldrb r3, [r3, #0]
800216a: 2b00 cmp r3, #0
800216c: f000 83b4 beq.w 80028d8 <manageCiclo+0x9d4>
8002170: 4b01 ldr r3, [pc, #4] @ (8002178 <manageCiclo+0x274>)
8002172: 2211 movs r2, #17
8002174: 701a strb r2, [r3, #0]
break;
8002176: e3af b.n 80028d8 <manageCiclo+0x9d4>
8002178: 2000044e .word 0x2000044e
800217c: 2000044c .word 0x2000044c
8002180: 2000044f .word 0x2000044f
8002184: 200003fc .word 0x200003fc
8002188: 20000444 .word 0x20000444
800218c: 2000041c .word 0x2000041c
8002190: 2000041a .word 0x2000041a
8002194: 2000040e .word 0x2000040e
8002198: 200003f0 .word 0x200003f0
800219c: 2000041e .word 0x2000041e
80021a0: 20000410 .word 0x20000410
case omM2bw1:
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
80021a4: 4b8f ldr r3, [pc, #572] @ (80023e4 <manageCiclo+0x4e0>)
80021a6: 885b ldrh r3, [r3, #2]
80021a8: b2da uxtb r2, r3
80021aa: 4b8f ldr r3, [pc, #572] @ (80023e8 <manageCiclo+0x4e4>)
80021ac: 881b ldrh r3, [r3, #0]
80021ae: b2d9 uxtb r1, r3
80021b0: 4b8e ldr r3, [pc, #568] @ (80023ec <manageCiclo+0x4e8>)
80021b2: 881b ldrh r3, [r3, #0]
80021b4: b2db uxtb r3, r3
80021b6: 200a movs r0, #10
80021b8: 9001 str r0, [sp, #4]
80021ba: 9300 str r3, [sp, #0]
80021bc: 460b mov r3, r1
80021be: 2101 movs r1, #1
80021c0: 2002 movs r0, #2
80021c2: f002 f929 bl 8004418 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
80021c6: 4b8a ldr r3, [pc, #552] @ (80023f0 <manageCiclo+0x4ec>)
80021c8: 881b ldrh r3, [r3, #0]
80021ca: b29a uxth r2, r3
80021cc: 4b89 ldr r3, [pc, #548] @ (80023f4 <manageCiclo+0x4f0>)
80021ce: 881b ldrh r3, [r3, #0]
80021d0: 429a cmp r2, r3
80021d2: d302 bcc.n 80021da <manageCiclo+0x2d6>
80021d4: 4b88 ldr r3, [pc, #544] @ (80023f8 <manageCiclo+0x4f4>)
80021d6: 2211 movs r2, #17
80021d8: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM2bw2;
80021da: 4b88 ldr r3, [pc, #544] @ (80023fc <manageCiclo+0x4f8>)
80021dc: 781b ldrb r3, [r3, #0]
80021de: 2b00 cmp r3, #0
80021e0: f040 837c bne.w 80028dc <manageCiclo+0x9d8>
80021e4: 4b84 ldr r3, [pc, #528] @ (80023f8 <manageCiclo+0x4f4>)
80021e6: 2208 movs r2, #8
80021e8: 701a strb r2, [r3, #0]
break;
80021ea: e377 b.n 80028dc <manageCiclo+0x9d8>
case omM2bw2:
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
80021ec: 4b7d ldr r3, [pc, #500] @ (80023e4 <manageCiclo+0x4e0>)
80021ee: 885b ldrh r3, [r3, #2]
80021f0: b2da uxtb r2, r3
80021f2: 4b7d ldr r3, [pc, #500] @ (80023e8 <manageCiclo+0x4e4>)
80021f4: 881b ldrh r3, [r3, #0]
80021f6: b2d9 uxtb r1, r3
80021f8: 4b7c ldr r3, [pc, #496] @ (80023ec <manageCiclo+0x4e8>)
80021fa: 881b ldrh r3, [r3, #0]
80021fc: b2db uxtb r3, r3
80021fe: 200a movs r0, #10
8002200: 9001 str r0, [sp, #4]
8002202: 9300 str r3, [sp, #0]
8002204: 460b mov r3, r1
8002206: 2101 movs r1, #1
8002208: 2002 movs r0, #2
800220a: f002 f905 bl 8004418 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
800220e: 4b78 ldr r3, [pc, #480] @ (80023f0 <manageCiclo+0x4ec>)
8002210: 881b ldrh r3, [r3, #0]
8002212: b29a uxth r2, r3
8002214: 4b77 ldr r3, [pc, #476] @ (80023f4 <manageCiclo+0x4f0>)
8002216: 881b ldrh r3, [r3, #0]
8002218: 429a cmp r2, r3
800221a: d302 bcc.n 8002222 <manageCiclo+0x31e>
800221c: 4b76 ldr r3, [pc, #472] @ (80023f8 <manageCiclo+0x4f4>)
800221e: 2211 movs r2, #17
8002220: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8002222: 4b76 ldr r3, [pc, #472] @ (80023fc <manageCiclo+0x4f8>)
8002224: 781b ldrb r3, [r3, #0]
8002226: 2b00 cmp r3, #0
8002228: f000 835a beq.w 80028e0 <manageCiclo+0x9dc>
800222c: 4b72 ldr r3, [pc, #456] @ (80023f8 <manageCiclo+0x4f4>)
800222e: 2211 movs r2, #17
8002230: 701a strb r2, [r3, #0]
break;
8002232: e355 b.n 80028e0 <manageCiclo+0x9dc>
case omM3fw1:
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8002234: 4b6b ldr r3, [pc, #428] @ (80023e4 <manageCiclo+0x4e0>)
8002236: 889b ldrh r3, [r3, #4]
8002238: b2da uxtb r2, r3
800223a: 4b71 ldr r3, [pc, #452] @ (8002400 <manageCiclo+0x4fc>)
800223c: 881b ldrh r3, [r3, #0]
800223e: b2d9 uxtb r1, r3
8002240: 4b6a ldr r3, [pc, #424] @ (80023ec <manageCiclo+0x4e8>)
8002242: 881b ldrh r3, [r3, #0]
8002244: b2db uxtb r3, r3
8002246: 200a movs r0, #10
8002248: 9001 str r0, [sp, #4]
800224a: 9300 str r3, [sp, #0]
800224c: 460b mov r3, r1
800224e: 2100 movs r1, #0
8002250: 2003 movs r0, #3
8002252: f002 f8e1 bl 8004418 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
8002256: 4b66 ldr r3, [pc, #408] @ (80023f0 <manageCiclo+0x4ec>)
8002258: 881b ldrh r3, [r3, #0]
800225a: b29a uxth r2, r3
800225c: 4b69 ldr r3, [pc, #420] @ (8002404 <manageCiclo+0x500>)
800225e: 881b ldrh r3, [r3, #0]
8002260: 429a cmp r2, r3
8002262: d302 bcc.n 800226a <manageCiclo+0x366>
8002264: 4b64 ldr r3, [pc, #400] @ (80023f8 <manageCiclo+0x4f4>)
8002266: 2211 movs r2, #17
8002268: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM3fw2;
800226a: 4b64 ldr r3, [pc, #400] @ (80023fc <manageCiclo+0x4f8>)
800226c: 781b ldrb r3, [r3, #0]
800226e: 2b00 cmp r3, #0
8002270: f040 8338 bne.w 80028e4 <manageCiclo+0x9e0>
8002274: 4b60 ldr r3, [pc, #384] @ (80023f8 <manageCiclo+0x4f4>)
8002276: 220a movs r2, #10
8002278: 701a strb r2, [r3, #0]
break;
800227a: e333 b.n 80028e4 <manageCiclo+0x9e0>
case omM3fw2:
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
800227c: 4b59 ldr r3, [pc, #356] @ (80023e4 <manageCiclo+0x4e0>)
800227e: 889b ldrh r3, [r3, #4]
8002280: b2da uxtb r2, r3
8002282: 4b5f ldr r3, [pc, #380] @ (8002400 <manageCiclo+0x4fc>)
8002284: 881b ldrh r3, [r3, #0]
8002286: b2d9 uxtb r1, r3
8002288: 4b58 ldr r3, [pc, #352] @ (80023ec <manageCiclo+0x4e8>)
800228a: 881b ldrh r3, [r3, #0]
800228c: b2db uxtb r3, r3
800228e: 200a movs r0, #10
8002290: 9001 str r0, [sp, #4]
8002292: 9300 str r3, [sp, #0]
8002294: 460b mov r3, r1
8002296: 2100 movs r1, #0
8002298: 2003 movs r0, #3
800229a: f002 f8bd bl 8004418 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
800229e: 4b54 ldr r3, [pc, #336] @ (80023f0 <manageCiclo+0x4ec>)
80022a0: 881b ldrh r3, [r3, #0]
80022a2: b29a uxth r2, r3
80022a4: 4b57 ldr r3, [pc, #348] @ (8002404 <manageCiclo+0x500>)
80022a6: 881b ldrh r3, [r3, #0]
80022a8: 429a cmp r2, r3
80022aa: d302 bcc.n 80022b2 <manageCiclo+0x3ae>
80022ac: 4b52 ldr r3, [pc, #328] @ (80023f8 <manageCiclo+0x4f4>)
80022ae: 2211 movs r2, #17
80022b0: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80022b2: 4b52 ldr r3, [pc, #328] @ (80023fc <manageCiclo+0x4f8>)
80022b4: 781b ldrb r3, [r3, #0]
80022b6: 2b00 cmp r3, #0
80022b8: f000 8316 beq.w 80028e8 <manageCiclo+0x9e4>
80022bc: 4b4e ldr r3, [pc, #312] @ (80023f8 <manageCiclo+0x4f4>)
80022be: 2211 movs r2, #17
80022c0: 701a strb r2, [r3, #0]
break;
80022c2: e311 b.n 80028e8 <manageCiclo+0x9e4>
case omM3bw1:
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
80022c4: 4b47 ldr r3, [pc, #284] @ (80023e4 <manageCiclo+0x4e0>)
80022c6: 889b ldrh r3, [r3, #4]
80022c8: b2da uxtb r2, r3
80022ca: 4b4d ldr r3, [pc, #308] @ (8002400 <manageCiclo+0x4fc>)
80022cc: 881b ldrh r3, [r3, #0]
80022ce: b2d9 uxtb r1, r3
80022d0: 4b46 ldr r3, [pc, #280] @ (80023ec <manageCiclo+0x4e8>)
80022d2: 881b ldrh r3, [r3, #0]
80022d4: b2db uxtb r3, r3
80022d6: 200a movs r0, #10
80022d8: 9001 str r0, [sp, #4]
80022da: 9300 str r3, [sp, #0]
80022dc: 460b mov r3, r1
80022de: 2101 movs r1, #1
80022e0: 2003 movs r0, #3
80022e2: f002 f899 bl 8004418 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
80022e6: 4b42 ldr r3, [pc, #264] @ (80023f0 <manageCiclo+0x4ec>)
80022e8: 881b ldrh r3, [r3, #0]
80022ea: b29a uxth r2, r3
80022ec: 4b45 ldr r3, [pc, #276] @ (8002404 <manageCiclo+0x500>)
80022ee: 881b ldrh r3, [r3, #0]
80022f0: 429a cmp r2, r3
80022f2: d302 bcc.n 80022fa <manageCiclo+0x3f6>
80022f4: 4b40 ldr r3, [pc, #256] @ (80023f8 <manageCiclo+0x4f4>)
80022f6: 2211 movs r2, #17
80022f8: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM3bw2;
80022fa: 4b40 ldr r3, [pc, #256] @ (80023fc <manageCiclo+0x4f8>)
80022fc: 781b ldrb r3, [r3, #0]
80022fe: 2b00 cmp r3, #0
8002300: f040 82f4 bne.w 80028ec <manageCiclo+0x9e8>
8002304: 4b3c ldr r3, [pc, #240] @ (80023f8 <manageCiclo+0x4f4>)
8002306: 220c movs r2, #12
8002308: 701a strb r2, [r3, #0]
break;
800230a: e2ef b.n 80028ec <manageCiclo+0x9e8>
case omM3bw2:
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
800230c: 4b35 ldr r3, [pc, #212] @ (80023e4 <manageCiclo+0x4e0>)
800230e: 889b ldrh r3, [r3, #4]
8002310: b2da uxtb r2, r3
8002312: 4b3b ldr r3, [pc, #236] @ (8002400 <manageCiclo+0x4fc>)
8002314: 881b ldrh r3, [r3, #0]
8002316: b2d9 uxtb r1, r3
8002318: 4b34 ldr r3, [pc, #208] @ (80023ec <manageCiclo+0x4e8>)
800231a: 881b ldrh r3, [r3, #0]
800231c: b2db uxtb r3, r3
800231e: 200a movs r0, #10
8002320: 9001 str r0, [sp, #4]
8002322: 9300 str r3, [sp, #0]
8002324: 460b mov r3, r1
8002326: 2101 movs r1, #1
8002328: 2003 movs r0, #3
800232a: f002 f875 bl 8004418 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
800232e: 4b30 ldr r3, [pc, #192] @ (80023f0 <manageCiclo+0x4ec>)
8002330: 881b ldrh r3, [r3, #0]
8002332: b29a uxth r2, r3
8002334: 4b33 ldr r3, [pc, #204] @ (8002404 <manageCiclo+0x500>)
8002336: 881b ldrh r3, [r3, #0]
8002338: 429a cmp r2, r3
800233a: d302 bcc.n 8002342 <manageCiclo+0x43e>
800233c: 4b2e ldr r3, [pc, #184] @ (80023f8 <manageCiclo+0x4f4>)
800233e: 2211 movs r2, #17
8002340: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8002342: 4b2e ldr r3, [pc, #184] @ (80023fc <manageCiclo+0x4f8>)
8002344: 781b ldrb r3, [r3, #0]
8002346: 2b00 cmp r3, #0
8002348: f000 82d2 beq.w 80028f0 <manageCiclo+0x9ec>
800234c: 4b2a ldr r3, [pc, #168] @ (80023f8 <manageCiclo+0x4f4>)
800234e: 2211 movs r2, #17
8002350: 701a strb r2, [r3, #0]
break;
8002352: e2cd b.n 80028f0 <manageCiclo+0x9ec>
case omM4fw1:
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002354: 4b23 ldr r3, [pc, #140] @ (80023e4 <manageCiclo+0x4e0>)
8002356: 88db ldrh r3, [r3, #6]
8002358: b2da uxtb r2, r3
800235a: 4b2b ldr r3, [pc, #172] @ (8002408 <manageCiclo+0x504>)
800235c: 881b ldrh r3, [r3, #0]
800235e: b2d9 uxtb r1, r3
8002360: 4b22 ldr r3, [pc, #136] @ (80023ec <manageCiclo+0x4e8>)
8002362: 881b ldrh r3, [r3, #0]
8002364: b2db uxtb r3, r3
8002366: 200a movs r0, #10
8002368: 9001 str r0, [sp, #4]
800236a: 9300 str r3, [sp, #0]
800236c: 460b mov r3, r1
800236e: 2100 movs r1, #0
8002370: 2004 movs r0, #4
8002372: f002 f851 bl 8004418 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
8002376: 4b1e ldr r3, [pc, #120] @ (80023f0 <manageCiclo+0x4ec>)
8002378: 881b ldrh r3, [r3, #0]
800237a: b29a uxth r2, r3
800237c: 4b23 ldr r3, [pc, #140] @ (800240c <manageCiclo+0x508>)
800237e: 881b ldrh r3, [r3, #0]
8002380: 429a cmp r2, r3
8002382: d302 bcc.n 800238a <manageCiclo+0x486>
8002384: 4b1c ldr r3, [pc, #112] @ (80023f8 <manageCiclo+0x4f4>)
8002386: 2211 movs r2, #17
8002388: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM4fw2;
800238a: 4b1c ldr r3, [pc, #112] @ (80023fc <manageCiclo+0x4f8>)
800238c: 781b ldrb r3, [r3, #0]
800238e: 2b00 cmp r3, #0
8002390: f040 82b0 bne.w 80028f4 <manageCiclo+0x9f0>
8002394: 4b18 ldr r3, [pc, #96] @ (80023f8 <manageCiclo+0x4f4>)
8002396: 220e movs r2, #14
8002398: 701a strb r2, [r3, #0]
break;
800239a: e2ab b.n 80028f4 <manageCiclo+0x9f0>
case omM4fw2:
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
800239c: 4b11 ldr r3, [pc, #68] @ (80023e4 <manageCiclo+0x4e0>)
800239e: 88db ldrh r3, [r3, #6]
80023a0: b2da uxtb r2, r3
80023a2: 4b19 ldr r3, [pc, #100] @ (8002408 <manageCiclo+0x504>)
80023a4: 881b ldrh r3, [r3, #0]
80023a6: b2d9 uxtb r1, r3
80023a8: 4b10 ldr r3, [pc, #64] @ (80023ec <manageCiclo+0x4e8>)
80023aa: 881b ldrh r3, [r3, #0]
80023ac: b2db uxtb r3, r3
80023ae: 200a movs r0, #10
80023b0: 9001 str r0, [sp, #4]
80023b2: 9300 str r3, [sp, #0]
80023b4: 460b mov r3, r1
80023b6: 2100 movs r1, #0
80023b8: 2004 movs r0, #4
80023ba: f002 f82d bl 8004418 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
80023be: 4b0c ldr r3, [pc, #48] @ (80023f0 <manageCiclo+0x4ec>)
80023c0: 881b ldrh r3, [r3, #0]
80023c2: b29a uxth r2, r3
80023c4: 4b11 ldr r3, [pc, #68] @ (800240c <manageCiclo+0x508>)
80023c6: 881b ldrh r3, [r3, #0]
80023c8: 429a cmp r2, r3
80023ca: d302 bcc.n 80023d2 <manageCiclo+0x4ce>
80023cc: 4b0a ldr r3, [pc, #40] @ (80023f8 <manageCiclo+0x4f4>)
80023ce: 2211 movs r2, #17
80023d0: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80023d2: 4b0a ldr r3, [pc, #40] @ (80023fc <manageCiclo+0x4f8>)
80023d4: 781b ldrb r3, [r3, #0]
80023d6: 2b00 cmp r3, #0
80023d8: f000 828e beq.w 80028f8 <manageCiclo+0x9f4>
80023dc: 4b06 ldr r3, [pc, #24] @ (80023f8 <manageCiclo+0x4f4>)
80023de: 2211 movs r2, #17
80023e0: 701a strb r2, [r3, #0]
break;
80023e2: e289 b.n 80028f8 <manageCiclo+0x9f4>
80023e4: 20000444 .word 0x20000444
80023e8: 2000041e .word 0x2000041e
80023ec: 2000041a .word 0x2000041a
80023f0: 200003fc .word 0x200003fc
80023f4: 20000410 .word 0x20000410
80023f8: 2000044e .word 0x2000044e
80023fc: 200003f0 .word 0x200003f0
8002400: 20000420 .word 0x20000420
8002404: 20000412 .word 0x20000412
8002408: 20000422 .word 0x20000422
800240c: 20000414 .word 0x20000414
case omM4bw1:
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002410: 4ba9 ldr r3, [pc, #676] @ (80026b8 <manageCiclo+0x7b4>)
8002412: 88db ldrh r3, [r3, #6]
8002414: b2da uxtb r2, r3
8002416: 4ba9 ldr r3, [pc, #676] @ (80026bc <manageCiclo+0x7b8>)
8002418: 881b ldrh r3, [r3, #0]
800241a: b2d9 uxtb r1, r3
800241c: 4ba8 ldr r3, [pc, #672] @ (80026c0 <manageCiclo+0x7bc>)
800241e: 881b ldrh r3, [r3, #0]
8002420: b2db uxtb r3, r3
8002422: 200a movs r0, #10
8002424: 9001 str r0, [sp, #4]
8002426: 9300 str r3, [sp, #0]
8002428: 460b mov r3, r1
800242a: 2101 movs r1, #1
800242c: 2004 movs r0, #4
800242e: f001 fff3 bl 8004418 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
8002432: 4ba4 ldr r3, [pc, #656] @ (80026c4 <manageCiclo+0x7c0>)
8002434: 881b ldrh r3, [r3, #0]
8002436: b29a uxth r2, r3
8002438: 4ba3 ldr r3, [pc, #652] @ (80026c8 <manageCiclo+0x7c4>)
800243a: 881b ldrh r3, [r3, #0]
800243c: 429a cmp r2, r3
800243e: d302 bcc.n 8002446 <manageCiclo+0x542>
8002440: 4ba2 ldr r3, [pc, #648] @ (80026cc <manageCiclo+0x7c8>)
8002442: 2211 movs r2, #17
8002444: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM4bw2;
8002446: 4ba2 ldr r3, [pc, #648] @ (80026d0 <manageCiclo+0x7cc>)
8002448: 781b ldrb r3, [r3, #0]
800244a: 2b00 cmp r3, #0
800244c: f040 8256 bne.w 80028fc <manageCiclo+0x9f8>
8002450: 4b9e ldr r3, [pc, #632] @ (80026cc <manageCiclo+0x7c8>)
8002452: 2210 movs r2, #16
8002454: 701a strb r2, [r3, #0]
break;
8002456: e251 b.n 80028fc <manageCiclo+0x9f8>
case omM4bw2:
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002458: 4b97 ldr r3, [pc, #604] @ (80026b8 <manageCiclo+0x7b4>)
800245a: 88db ldrh r3, [r3, #6]
800245c: b2da uxtb r2, r3
800245e: 4b97 ldr r3, [pc, #604] @ (80026bc <manageCiclo+0x7b8>)
8002460: 881b ldrh r3, [r3, #0]
8002462: b2d9 uxtb r1, r3
8002464: 4b96 ldr r3, [pc, #600] @ (80026c0 <manageCiclo+0x7bc>)
8002466: 881b ldrh r3, [r3, #0]
8002468: b2db uxtb r3, r3
800246a: 200a movs r0, #10
800246c: 9001 str r0, [sp, #4]
800246e: 9300 str r3, [sp, #0]
8002470: 460b mov r3, r1
8002472: 2101 movs r1, #1
8002474: 2004 movs r0, #4
8002476: f001 ffcf bl 8004418 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
800247a: 4b92 ldr r3, [pc, #584] @ (80026c4 <manageCiclo+0x7c0>)
800247c: 881b ldrh r3, [r3, #0]
800247e: b29a uxth r2, r3
8002480: 4b91 ldr r3, [pc, #580] @ (80026c8 <manageCiclo+0x7c4>)
8002482: 881b ldrh r3, [r3, #0]
8002484: 429a cmp r2, r3
8002486: d302 bcc.n 800248e <manageCiclo+0x58a>
8002488: 4b90 ldr r3, [pc, #576] @ (80026cc <manageCiclo+0x7c8>)
800248a: 2211 movs r2, #17
800248c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800248e: 4b90 ldr r3, [pc, #576] @ (80026d0 <manageCiclo+0x7cc>)
8002490: 781b ldrb r3, [r3, #0]
8002492: 2b00 cmp r3, #0
8002494: f000 8234 beq.w 8002900 <manageCiclo+0x9fc>
8002498: 4b8c ldr r3, [pc, #560] @ (80026cc <manageCiclo+0x7c8>)
800249a: 2211 movs r2, #17
800249c: 701a strb r2, [r3, #0]
break;
800249e: e22f b.n 8002900 <manageCiclo+0x9fc>
case omStopMan:
SetMotPerc(M1,FW,0);
80024a0: 2200 movs r2, #0
80024a2: 2100 movs r1, #0
80024a4: 2001 movs r0, #1
80024a6: f001 fe37 bl 8004118 <SetMotPerc>
SetMotPerc(M2,FW,0);
80024aa: 2200 movs r2, #0
80024ac: 2100 movs r1, #0
80024ae: 2002 movs r0, #2
80024b0: f001 fe32 bl 8004118 <SetMotPerc>
SetMotPerc(M3,FW,0);
80024b4: 2200 movs r2, #0
80024b6: 2100 movs r1, #0
80024b8: 2003 movs r0, #3
80024ba: f001 fe2d bl 8004118 <SetMotPerc>
SetMotPerc(M4,FW,0);
80024be: 2200 movs r2, #0
80024c0: 2100 movs r1, #0
80024c2: 2004 movs r0, #4
80024c4: f001 fe28 bl 8004118 <SetMotPerc>
SetMotPerc(M1,BW,0);
80024c8: 2200 movs r2, #0
80024ca: 2101 movs r1, #1
80024cc: 2001 movs r0, #1
80024ce: f001 fe23 bl 8004118 <SetMotPerc>
SetMotPerc(M2,BW,0);
80024d2: 2200 movs r2, #0
80024d4: 2101 movs r1, #1
80024d6: 2002 movs r0, #2
80024d8: f001 fe1e bl 8004118 <SetMotPerc>
SetMotPerc(M3,BW,0);
80024dc: 2200 movs r2, #0
80024de: 2101 movs r1, #1
80024e0: 2003 movs r0, #3
80024e2: f001 fe19 bl 8004118 <SetMotPerc>
SetMotPerc(M4,BW,0);
80024e6: 2200 movs r2, #0
80024e8: 2101 movs r1, #1
80024ea: 2004 movs r0, #4
80024ec: f001 fe14 bl 8004118 <SetMotPerc>
if(pulsanti==0){
80024f0: 4b77 ldr r3, [pc, #476] @ (80026d0 <manageCiclo+0x7cc>)
80024f2: 781b ldrb r3, [r3, #0]
80024f4: 2b00 cmp r3, #0
80024f6: f040 8205 bne.w 8002904 <manageCiclo+0xa00>
stBuz=bzoff;
80024fa: 4b76 ldr r3, [pc, #472] @ (80026d4 <manageCiclo+0x7d0>)
80024fc: 2200 movs r2, #0
80024fe: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002500: 4b72 ldr r3, [pc, #456] @ (80026cc <manageCiclo+0x7c8>)
8002502: 2214 movs r2, #20
8002504: 701a strb r2, [r3, #0]
}
break;
8002506: e1fd b.n 8002904 <manageCiclo+0xa00>
case omapertura0:
if(rtCiclo>=30){//doppo 3 secondi
8002508: 4b6e ldr r3, [pc, #440] @ (80026c4 <manageCiclo+0x7c0>)
800250a: 881b ldrh r3, [r3, #0]
800250c: b29b uxth r3, r3
800250e: 2b1d cmp r3, #29
8002510: d924 bls.n 800255c <manageCiclo+0x658>
stBuz=bzmoving;
8002512: 4b70 ldr r3, [pc, #448] @ (80026d4 <manageCiclo+0x7d0>)
8002514: 2201 movs r2, #1
8002516: 701a strb r2, [r3, #0]
m1=m1ap();m2=m2ap();m3=m3ap();m4=m4ap();
8002518: f000 fd80 bl 800301c <m1ap>
800251c: 4603 mov r3, r0
800251e: 71fb strb r3, [r7, #7]
8002520: f000 fe4e bl 80031c0 <m2ap>
8002524: 4603 mov r3, r0
8002526: 71bb strb r3, [r7, #6]
8002528: f000 ff1c bl 8003364 <m3ap>
800252c: 4603 mov r3, r0
800252e: 717b strb r3, [r7, #5]
8002530: f000 ffec bl 800350c <m4ap>
8002534: 4603 mov r3, r0
8002536: 713b strb r3, [r7, #4]
if((m1==motStop)&&(m2==motStop)&&(m3==motStop)&&(m4==motStop)){
8002538: 79fb ldrb r3, [r7, #7]
800253a: 2b04 cmp r3, #4
800253c: d10e bne.n 800255c <manageCiclo+0x658>
800253e: 79bb ldrb r3, [r7, #6]
8002540: 2b04 cmp r3, #4
8002542: d10b bne.n 800255c <manageCiclo+0x658>
8002544: 797b ldrb r3, [r7, #5]
8002546: 2b04 cmp r3, #4
8002548: d108 bne.n 800255c <manageCiclo+0x658>
800254a: 793b ldrb r3, [r7, #4]
800254c: 2b04 cmp r3, #4
800254e: d105 bne.n 800255c <manageCiclo+0x658>
stBuz=bzoff;
8002550: 4b60 ldr r3, [pc, #384] @ (80026d4 <manageCiclo+0x7d0>)
8002552: 2200 movs r2, #0
8002554: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002556: 4b5d ldr r3, [pc, #372] @ (80026cc <manageCiclo+0x7c8>)
8002558: 2214 movs r2, #20
800255a: 701a strb r2, [r3, #0]
}
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
800255c: 4b5e ldr r3, [pc, #376] @ (80026d8 <manageCiclo+0x7d4>)
800255e: 881b ldrh r3, [r3, #0]
8002560: f003 0302 and.w r3, r3, #2
8002564: 2b00 cmp r3, #0
8002566: f000 81cf beq.w 8002908 <manageCiclo+0xa04>
800256a: 4b58 ldr r3, [pc, #352] @ (80026cc <manageCiclo+0x7c8>)
800256c: 2213 movs r2, #19
800256e: 701a strb r2, [r3, #0]
break;
8002570: e1ca b.n 8002908 <manageCiclo+0xa04>
case omstopapertura:
SetMotPerc(M1,FW,0);
8002572: 2200 movs r2, #0
8002574: 2100 movs r1, #0
8002576: 2001 movs r0, #1
8002578: f001 fdce bl 8004118 <SetMotPerc>
SetMotPerc(M2,FW,0);
800257c: 2200 movs r2, #0
800257e: 2100 movs r1, #0
8002580: 2002 movs r0, #2
8002582: f001 fdc9 bl 8004118 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002586: 2200 movs r2, #0
8002588: 2100 movs r1, #0
800258a: 2003 movs r0, #3
800258c: f001 fdc4 bl 8004118 <SetMotPerc>
SetMotPerc(M4,FW,0);
8002590: 2200 movs r2, #0
8002592: 2100 movs r1, #0
8002594: 2004 movs r0, #4
8002596: f001 fdbf bl 8004118 <SetMotPerc>
if(pulsanti==0){
800259a: 4b4d ldr r3, [pc, #308] @ (80026d0 <manageCiclo+0x7cc>)
800259c: 781b ldrb r3, [r3, #0]
800259e: 2b00 cmp r3, #0
80025a0: f040 81b4 bne.w 800290c <manageCiclo+0xa08>
stBuz=bzoff;
80025a4: 4b4b ldr r3, [pc, #300] @ (80026d4 <manageCiclo+0x7d0>)
80025a6: 2200 movs r2, #0
80025a8: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
80025aa: 4b48 ldr r3, [pc, #288] @ (80026cc <manageCiclo+0x7c8>)
80025ac: 2200 movs r2, #0
80025ae: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
80025b0: 4b49 ldr r3, [pc, #292] @ (80026d8 <manageCiclo+0x7d4>)
80025b2: 881b ldrh r3, [r3, #0]
80025b4: f023 0302 bic.w r3, r3, #2
80025b8: b29a uxth r2, r3
80025ba: 4b47 ldr r3, [pc, #284] @ (80026d8 <manageCiclo+0x7d4>)
80025bc: 801a strh r2, [r3, #0]
}
break;
80025be: e1a5 b.n 800290c <manageCiclo+0xa08>
case omaperto:
rtCiclo=0;
80025c0: 4b40 ldr r3, [pc, #256] @ (80026c4 <manageCiclo+0x7c0>)
80025c2: 2200 movs r2, #0
80025c4: 801a strh r2, [r3, #0]
if(stPulsanti&P1START){
80025c6: 4b44 ldr r3, [pc, #272] @ (80026d8 <manageCiclo+0x7d4>)
80025c8: 881b ldrh r3, [r3, #0]
80025ca: f003 0301 and.w r3, r3, #1
80025ce: 2b00 cmp r3, #0
80025d0: d00d beq.n 80025ee <manageCiclo+0x6ea>
stBuz=bzmoving;
80025d2: 4b40 ldr r3, [pc, #256] @ (80026d4 <manageCiclo+0x7d0>)
80025d4: 2201 movs r2, #1
80025d6: 701a strb r2, [r3, #0]
//(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
stCiclo=omchiusura1;
80025d8: 4b3c ldr r3, [pc, #240] @ (80026cc <manageCiclo+0x7c8>)
80025da: 2215 movs r2, #21
80025dc: 701a strb r2, [r3, #0]
(void)m1ch();(void)m2ch();(void)m3ch();(void)m4ch();
80025de: f001 f869 bl 80036b4 <m1ch>
80025e2: f001 f939 bl 8003858 <m2ch>
80025e6: f001 fa09 bl 80039fc <m3ch>
80025ea: f001 fadb bl 8003ba4 <m4ch>
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
80025ee: 4b3a ldr r3, [pc, #232] @ (80026d8 <manageCiclo+0x7d4>)
80025f0: 881b ldrh r3, [r3, #0]
80025f2: f003 0302 and.w r3, r3, #2
80025f6: 2b00 cmp r3, #0
80025f8: d003 beq.n 8002602 <manageCiclo+0x6fe>
80025fa: 4b34 ldr r3, [pc, #208] @ (80026cc <manageCiclo+0x7c8>)
80025fc: 2216 movs r2, #22
80025fe: 701a strb r2, [r3, #0]
}else if(stPulsanti&M4BW){
stBuz=bzmoving;
(void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
stCiclo=omM4bw1;
}
break;
8002600: e186 b.n 8002910 <manageCiclo+0xa0c>
else if(stPulsanti&M1FW){
8002602: 4b35 ldr r3, [pc, #212] @ (80026d8 <manageCiclo+0x7d4>)
8002604: 881b ldrh r3, [r3, #0]
8002606: f003 0310 and.w r3, r3, #16
800260a: 2b00 cmp r3, #0
800260c: d017 beq.n 800263e <manageCiclo+0x73a>
stBuz=bzmoving;
800260e: 4b31 ldr r3, [pc, #196] @ (80026d4 <manageCiclo+0x7d0>)
8002610: 2201 movs r2, #1
8002612: 701a strb r2, [r3, #0]
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT);
8002614: 4b28 ldr r3, [pc, #160] @ (80026b8 <manageCiclo+0x7b4>)
8002616: 881b ldrh r3, [r3, #0]
8002618: b2da uxtb r2, r3
800261a: 4b30 ldr r3, [pc, #192] @ (80026dc <manageCiclo+0x7d8>)
800261c: 881b ldrh r3, [r3, #0]
800261e: b2d9 uxtb r1, r3
8002620: 4b27 ldr r3, [pc, #156] @ (80026c0 <manageCiclo+0x7bc>)
8002622: 881b ldrh r3, [r3, #0]
8002624: b2db uxtb r3, r3
8002626: 2000 movs r0, #0
8002628: 9001 str r0, [sp, #4]
800262a: 9300 str r3, [sp, #0]
800262c: 460b mov r3, r1
800262e: 2100 movs r1, #0
8002630: 2001 movs r0, #1
8002632: f001 fef1 bl 8004418 <ramp>
stCiclo=omM1fw1;
8002636: 4b25 ldr r3, [pc, #148] @ (80026cc <manageCiclo+0x7c8>)
8002638: 2201 movs r2, #1
800263a: 701a strb r2, [r3, #0]
break;
800263c: e168 b.n 8002910 <manageCiclo+0xa0c>
}else if(stPulsanti&M1BW){
800263e: 4b26 ldr r3, [pc, #152] @ (80026d8 <manageCiclo+0x7d4>)
8002640: 881b ldrh r3, [r3, #0]
8002642: f003 0320 and.w r3, r3, #32
8002646: 2b00 cmp r3, #0
8002648: d017 beq.n 800267a <manageCiclo+0x776>
stBuz=bzmoving;
800264a: 4b22 ldr r3, [pc, #136] @ (80026d4 <manageCiclo+0x7d0>)
800264c: 2201 movs r2, #1
800264e: 701a strb r2, [r3, #0]
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT);
8002650: 4b19 ldr r3, [pc, #100] @ (80026b8 <manageCiclo+0x7b4>)
8002652: 881b ldrh r3, [r3, #0]
8002654: b2da uxtb r2, r3
8002656: 4b21 ldr r3, [pc, #132] @ (80026dc <manageCiclo+0x7d8>)
8002658: 881b ldrh r3, [r3, #0]
800265a: b2d9 uxtb r1, r3
800265c: 4b18 ldr r3, [pc, #96] @ (80026c0 <manageCiclo+0x7bc>)
800265e: 881b ldrh r3, [r3, #0]
8002660: b2db uxtb r3, r3
8002662: 2000 movs r0, #0
8002664: 9001 str r0, [sp, #4]
8002666: 9300 str r3, [sp, #0]
8002668: 460b mov r3, r1
800266a: 2101 movs r1, #1
800266c: 2001 movs r0, #1
800266e: f001 fed3 bl 8004418 <ramp>
stCiclo=omM1bw1;
8002672: 4b16 ldr r3, [pc, #88] @ (80026cc <manageCiclo+0x7c8>)
8002674: 2203 movs r2, #3
8002676: 701a strb r2, [r3, #0]
break;
8002678: e14a b.n 8002910 <manageCiclo+0xa0c>
}else if(stPulsanti&M2FW){
800267a: 4b17 ldr r3, [pc, #92] @ (80026d8 <manageCiclo+0x7d4>)
800267c: 881b ldrh r3, [r3, #0]
800267e: f003 0340 and.w r3, r3, #64 @ 0x40
8002682: 2b00 cmp r3, #0
8002684: d02e beq.n 80026e4 <manageCiclo+0x7e0>
stBuz=bzmoving;
8002686: 4b13 ldr r3, [pc, #76] @ (80026d4 <manageCiclo+0x7d0>)
8002688: 2201 movs r2, #1
800268a: 701a strb r2, [r3, #0]
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT);
800268c: 4b0a ldr r3, [pc, #40] @ (80026b8 <manageCiclo+0x7b4>)
800268e: 885b ldrh r3, [r3, #2]
8002690: b2da uxtb r2, r3
8002692: 4b13 ldr r3, [pc, #76] @ (80026e0 <manageCiclo+0x7dc>)
8002694: 881b ldrh r3, [r3, #0]
8002696: b2d9 uxtb r1, r3
8002698: 4b09 ldr r3, [pc, #36] @ (80026c0 <manageCiclo+0x7bc>)
800269a: 881b ldrh r3, [r3, #0]
800269c: b2db uxtb r3, r3
800269e: 2000 movs r0, #0
80026a0: 9001 str r0, [sp, #4]
80026a2: 9300 str r3, [sp, #0]
80026a4: 460b mov r3, r1
80026a6: 2100 movs r1, #0
80026a8: 2002 movs r0, #2
80026aa: f001 feb5 bl 8004418 <ramp>
stCiclo=omM2fw1;
80026ae: 4b07 ldr r3, [pc, #28] @ (80026cc <manageCiclo+0x7c8>)
80026b0: 2205 movs r2, #5
80026b2: 701a strb r2, [r3, #0]
break;
80026b4: e12c b.n 8002910 <manageCiclo+0xa0c>
80026b6: bf00 nop
80026b8: 20000444 .word 0x20000444
80026bc: 20000422 .word 0x20000422
80026c0: 2000041a .word 0x2000041a
80026c4: 200003fc .word 0x200003fc
80026c8: 20000414 .word 0x20000414
80026cc: 2000044e .word 0x2000044e
80026d0: 200003f0 .word 0x200003f0
80026d4: 2000044f .word 0x2000044f
80026d8: 2000044c .word 0x2000044c
80026dc: 2000041c .word 0x2000041c
80026e0: 2000041e .word 0x2000041e
}else if(stPulsanti&M2BW){
80026e4: 4b8f ldr r3, [pc, #572] @ (8002924 <manageCiclo+0xa20>)
80026e6: 881b ldrh r3, [r3, #0]
80026e8: f003 0380 and.w r3, r3, #128 @ 0x80
80026ec: 2b00 cmp r3, #0
80026ee: d017 beq.n 8002720 <manageCiclo+0x81c>
stBuz=bzmoving;
80026f0: 4b8d ldr r3, [pc, #564] @ (8002928 <manageCiclo+0xa24>)
80026f2: 2201 movs r2, #1
80026f4: 701a strb r2, [r3, #0]
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT);
80026f6: 4b8d ldr r3, [pc, #564] @ (800292c <manageCiclo+0xa28>)
80026f8: 885b ldrh r3, [r3, #2]
80026fa: b2da uxtb r2, r3
80026fc: 4b8c ldr r3, [pc, #560] @ (8002930 <manageCiclo+0xa2c>)
80026fe: 881b ldrh r3, [r3, #0]
8002700: b2d9 uxtb r1, r3
8002702: 4b8c ldr r3, [pc, #560] @ (8002934 <manageCiclo+0xa30>)
8002704: 881b ldrh r3, [r3, #0]
8002706: b2db uxtb r3, r3
8002708: 2000 movs r0, #0
800270a: 9001 str r0, [sp, #4]
800270c: 9300 str r3, [sp, #0]
800270e: 460b mov r3, r1
8002710: 2101 movs r1, #1
8002712: 2002 movs r0, #2
8002714: f001 fe80 bl 8004418 <ramp>
stCiclo=omM2bw1;
8002718: 4b87 ldr r3, [pc, #540] @ (8002938 <manageCiclo+0xa34>)
800271a: 2207 movs r2, #7
800271c: 701a strb r2, [r3, #0]
break;
800271e: e0f7 b.n 8002910 <manageCiclo+0xa0c>
}else if(stPulsanti&M3FW){
8002720: 4b80 ldr r3, [pc, #512] @ (8002924 <manageCiclo+0xa20>)
8002722: 881b ldrh r3, [r3, #0]
8002724: f403 7380 and.w r3, r3, #256 @ 0x100
8002728: 2b00 cmp r3, #0
800272a: d017 beq.n 800275c <manageCiclo+0x858>
stBuz=bzmoving;
800272c: 4b7e ldr r3, [pc, #504] @ (8002928 <manageCiclo+0xa24>)
800272e: 2201 movs r2, #1
8002730: 701a strb r2, [r3, #0]
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT);
8002732: 4b7e ldr r3, [pc, #504] @ (800292c <manageCiclo+0xa28>)
8002734: 889b ldrh r3, [r3, #4]
8002736: b2da uxtb r2, r3
8002738: 4b80 ldr r3, [pc, #512] @ (800293c <manageCiclo+0xa38>)
800273a: 881b ldrh r3, [r3, #0]
800273c: b2d9 uxtb r1, r3
800273e: 4b7d ldr r3, [pc, #500] @ (8002934 <manageCiclo+0xa30>)
8002740: 881b ldrh r3, [r3, #0]
8002742: b2db uxtb r3, r3
8002744: 2000 movs r0, #0
8002746: 9001 str r0, [sp, #4]
8002748: 9300 str r3, [sp, #0]
800274a: 460b mov r3, r1
800274c: 2100 movs r1, #0
800274e: 2003 movs r0, #3
8002750: f001 fe62 bl 8004418 <ramp>
stCiclo=omM3fw1;
8002754: 4b78 ldr r3, [pc, #480] @ (8002938 <manageCiclo+0xa34>)
8002756: 2209 movs r2, #9
8002758: 701a strb r2, [r3, #0]
break;
800275a: e0d9 b.n 8002910 <manageCiclo+0xa0c>
}else if(stPulsanti&M3BW){
800275c: 4b71 ldr r3, [pc, #452] @ (8002924 <manageCiclo+0xa20>)
800275e: 881b ldrh r3, [r3, #0]
8002760: f403 7300 and.w r3, r3, #512 @ 0x200
8002764: 2b00 cmp r3, #0
8002766: d017 beq.n 8002798 <manageCiclo+0x894>
stBuz=bzmoving;
8002768: 4b6f ldr r3, [pc, #444] @ (8002928 <manageCiclo+0xa24>)
800276a: 2201 movs r2, #1
800276c: 701a strb r2, [r3, #0]
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT);
800276e: 4b6f ldr r3, [pc, #444] @ (800292c <manageCiclo+0xa28>)
8002770: 889b ldrh r3, [r3, #4]
8002772: b2da uxtb r2, r3
8002774: 4b71 ldr r3, [pc, #452] @ (800293c <manageCiclo+0xa38>)
8002776: 881b ldrh r3, [r3, #0]
8002778: b2d9 uxtb r1, r3
800277a: 4b6e ldr r3, [pc, #440] @ (8002934 <manageCiclo+0xa30>)
800277c: 881b ldrh r3, [r3, #0]
800277e: b2db uxtb r3, r3
8002780: 2000 movs r0, #0
8002782: 9001 str r0, [sp, #4]
8002784: 9300 str r3, [sp, #0]
8002786: 460b mov r3, r1
8002788: 2101 movs r1, #1
800278a: 2003 movs r0, #3
800278c: f001 fe44 bl 8004418 <ramp>
stCiclo=omM3bw1;
8002790: 4b69 ldr r3, [pc, #420] @ (8002938 <manageCiclo+0xa34>)
8002792: 220b movs r2, #11
8002794: 701a strb r2, [r3, #0]
break;
8002796: e0bb b.n 8002910 <manageCiclo+0xa0c>
}else if(stPulsanti&M4FW){
8002798: 4b62 ldr r3, [pc, #392] @ (8002924 <manageCiclo+0xa20>)
800279a: 881b ldrh r3, [r3, #0]
800279c: f403 6380 and.w r3, r3, #1024 @ 0x400
80027a0: 2b00 cmp r3, #0
80027a2: d017 beq.n 80027d4 <manageCiclo+0x8d0>
stBuz=bzmoving;
80027a4: 4b60 ldr r3, [pc, #384] @ (8002928 <manageCiclo+0xa24>)
80027a6: 2201 movs r2, #1
80027a8: 701a strb r2, [r3, #0]
(void)ramp(M4,FW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
80027aa: 4b60 ldr r3, [pc, #384] @ (800292c <manageCiclo+0xa28>)
80027ac: 88db ldrh r3, [r3, #6]
80027ae: b2da uxtb r2, r3
80027b0: 4b62 ldr r3, [pc, #392] @ (800293c <manageCiclo+0xa38>)
80027b2: 881b ldrh r3, [r3, #0]
80027b4: b2d9 uxtb r1, r3
80027b6: 4b5f ldr r3, [pc, #380] @ (8002934 <manageCiclo+0xa30>)
80027b8: 881b ldrh r3, [r3, #0]
80027ba: b2db uxtb r3, r3
80027bc: 2000 movs r0, #0
80027be: 9001 str r0, [sp, #4]
80027c0: 9300 str r3, [sp, #0]
80027c2: 460b mov r3, r1
80027c4: 2100 movs r1, #0
80027c6: 2004 movs r0, #4
80027c8: f001 fe26 bl 8004418 <ramp>
stCiclo=omM4fw1;
80027cc: 4b5a ldr r3, [pc, #360] @ (8002938 <manageCiclo+0xa34>)
80027ce: 220d movs r2, #13
80027d0: 701a strb r2, [r3, #0]
break;
80027d2: e09d b.n 8002910 <manageCiclo+0xa0c>
}else if(stPulsanti&M4BW){
80027d4: 4b53 ldr r3, [pc, #332] @ (8002924 <manageCiclo+0xa20>)
80027d6: 881b ldrh r3, [r3, #0]
80027d8: f403 6300 and.w r3, r3, #2048 @ 0x800
80027dc: 2b00 cmp r3, #0
80027de: f000 8097 beq.w 8002910 <manageCiclo+0xa0c>
stBuz=bzmoving;
80027e2: 4b51 ldr r3, [pc, #324] @ (8002928 <manageCiclo+0xa24>)
80027e4: 2201 movs r2, #1
80027e6: 701a strb r2, [r3, #0]
(void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
80027e8: 4b50 ldr r3, [pc, #320] @ (800292c <manageCiclo+0xa28>)
80027ea: 88db ldrh r3, [r3, #6]
80027ec: b2da uxtb r2, r3
80027ee: 4b53 ldr r3, [pc, #332] @ (800293c <manageCiclo+0xa38>)
80027f0: 881b ldrh r3, [r3, #0]
80027f2: b2d9 uxtb r1, r3
80027f4: 4b4f ldr r3, [pc, #316] @ (8002934 <manageCiclo+0xa30>)
80027f6: 881b ldrh r3, [r3, #0]
80027f8: b2db uxtb r3, r3
80027fa: 2000 movs r0, #0
80027fc: 9001 str r0, [sp, #4]
80027fe: 9300 str r3, [sp, #0]
8002800: 460b mov r3, r1
8002802: 2101 movs r1, #1
8002804: 2004 movs r0, #4
8002806: f001 fe07 bl 8004418 <ramp>
stCiclo=omM4bw1;
800280a: 4b4b ldr r3, [pc, #300] @ (8002938 <manageCiclo+0xa34>)
800280c: 220f movs r2, #15
800280e: 701a strb r2, [r3, #0]
break;
8002810: e07e b.n 8002910 <manageCiclo+0xa0c>
case omchiusura1:
if(rtCiclo>=10){//doppo 1 secondi
8002812: 4b4b ldr r3, [pc, #300] @ (8002940 <manageCiclo+0xa3c>)
8002814: 881b ldrh r3, [r3, #0]
8002816: b29b uxth r3, r3
8002818: 2b09 cmp r3, #9
800281a: d921 bls.n 8002860 <manageCiclo+0x95c>
m1=m1ch();m2=m2ch();m3=m3ch();m4=m4ch();
800281c: f000 ff4a bl 80036b4 <m1ch>
8002820: 4603 mov r3, r0
8002822: 71fb strb r3, [r7, #7]
8002824: f001 f818 bl 8003858 <m2ch>
8002828: 4603 mov r3, r0
800282a: 71bb strb r3, [r7, #6]
800282c: f001 f8e6 bl 80039fc <m3ch>
8002830: 4603 mov r3, r0
8002832: 717b strb r3, [r7, #5]
8002834: f001 f9b6 bl 8003ba4 <m4ch>
8002838: 4603 mov r3, r0
800283a: 713b strb r3, [r7, #4]
if((m1==motStop)&&(m2==motStop)&&(m3==motStop)&&(m4==motStop)){
800283c: 79fb ldrb r3, [r7, #7]
800283e: 2b04 cmp r3, #4
8002840: d10e bne.n 8002860 <manageCiclo+0x95c>
8002842: 79bb ldrb r3, [r7, #6]
8002844: 2b04 cmp r3, #4
8002846: d10b bne.n 8002860 <manageCiclo+0x95c>
8002848: 797b ldrb r3, [r7, #5]
800284a: 2b04 cmp r3, #4
800284c: d108 bne.n 8002860 <manageCiclo+0x95c>
800284e: 793b ldrb r3, [r7, #4]
8002850: 2b04 cmp r3, #4
8002852: d105 bne.n 8002860 <manageCiclo+0x95c>
stBuz=bzoff;
8002854: 4b34 ldr r3, [pc, #208] @ (8002928 <manageCiclo+0xa24>)
8002856: 2200 movs r2, #0
8002858: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
800285a: 4b37 ldr r3, [pc, #220] @ (8002938 <manageCiclo+0xa34>)
800285c: 2200 movs r2, #0
800285e: 701a strb r2, [r3, #0]
}
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8002860: 4b30 ldr r3, [pc, #192] @ (8002924 <manageCiclo+0xa20>)
8002862: 881b ldrh r3, [r3, #0]
8002864: f003 0302 and.w r3, r3, #2
8002868: 2b00 cmp r3, #0
800286a: d053 beq.n 8002914 <manageCiclo+0xa10>
800286c: 4b32 ldr r3, [pc, #200] @ (8002938 <manageCiclo+0xa34>)
800286e: 2216 movs r2, #22
8002870: 701a strb r2, [r3, #0]
break;
8002872: e04f b.n 8002914 <manageCiclo+0xa10>
case omstopchiusura:
SetMotPerc(M1,FW,0);
8002874: 2200 movs r2, #0
8002876: 2100 movs r1, #0
8002878: 2001 movs r0, #1
800287a: f001 fc4d bl 8004118 <SetMotPerc>
SetMotPerc(M2,FW,0);
800287e: 2200 movs r2, #0
8002880: 2100 movs r1, #0
8002882: 2002 movs r0, #2
8002884: f001 fc48 bl 8004118 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002888: 2200 movs r2, #0
800288a: 2100 movs r1, #0
800288c: 2003 movs r0, #3
800288e: f001 fc43 bl 8004118 <SetMotPerc>
SetMotPerc(M4,FW,0);
8002892: 2200 movs r2, #0
8002894: 2100 movs r1, #0
8002896: 2004 movs r0, #4
8002898: f001 fc3e bl 8004118 <SetMotPerc>
if(pulsanti==0){
800289c: 4b29 ldr r3, [pc, #164] @ (8002944 <manageCiclo+0xa40>)
800289e: 781b ldrb r3, [r3, #0]
80028a0: 2b00 cmp r3, #0
80028a2: d139 bne.n 8002918 <manageCiclo+0xa14>
stBuz=bzoff;
80028a4: 4b20 ldr r3, [pc, #128] @ (8002928 <manageCiclo+0xa24>)
80028a6: 2200 movs r2, #0
80028a8: 701a strb r2, [r3, #0]
stCiclo=omaperto;
80028aa: 4b23 ldr r3, [pc, #140] @ (8002938 <manageCiclo+0xa34>)
80028ac: 2214 movs r2, #20
80028ae: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
80028b0: 4b1c ldr r3, [pc, #112] @ (8002924 <manageCiclo+0xa20>)
80028b2: 881b ldrh r3, [r3, #0]
80028b4: f023 0302 bic.w r3, r3, #2
80028b8: b29a uxth r2, r3
80028ba: 4b1a ldr r3, [pc, #104] @ (8002924 <manageCiclo+0xa20>)
80028bc: 801a strh r2, [r3, #0]
}
break;
80028be: e02b b.n 8002918 <manageCiclo+0xa14>
break;
80028c0: bf00 nop
80028c2: e02a b.n 800291a <manageCiclo+0xa16>
break;
80028c4: bf00 nop
80028c6: e028 b.n 800291a <manageCiclo+0xa16>
break;
80028c8: bf00 nop
80028ca: e026 b.n 800291a <manageCiclo+0xa16>
break;
80028cc: bf00 nop
80028ce: e024 b.n 800291a <manageCiclo+0xa16>
break;
80028d0: bf00 nop
80028d2: e022 b.n 800291a <manageCiclo+0xa16>
break;
80028d4: bf00 nop
80028d6: e020 b.n 800291a <manageCiclo+0xa16>
break;
80028d8: bf00 nop
80028da: e01e b.n 800291a <manageCiclo+0xa16>
break;
80028dc: bf00 nop
80028de: e01c b.n 800291a <manageCiclo+0xa16>
break;
80028e0: bf00 nop
80028e2: e01a b.n 800291a <manageCiclo+0xa16>
break;
80028e4: bf00 nop
80028e6: e018 b.n 800291a <manageCiclo+0xa16>
break;
80028e8: bf00 nop
80028ea: e016 b.n 800291a <manageCiclo+0xa16>
break;
80028ec: bf00 nop
80028ee: e014 b.n 800291a <manageCiclo+0xa16>
break;
80028f0: bf00 nop
80028f2: e012 b.n 800291a <manageCiclo+0xa16>
break;
80028f4: bf00 nop
80028f6: e010 b.n 800291a <manageCiclo+0xa16>
break;
80028f8: bf00 nop
80028fa: e00e b.n 800291a <manageCiclo+0xa16>
break;
80028fc: bf00 nop
80028fe: e00c b.n 800291a <manageCiclo+0xa16>
break;
8002900: bf00 nop
8002902: e00a b.n 800291a <manageCiclo+0xa16>
break;
8002904: bf00 nop
8002906: e008 b.n 800291a <manageCiclo+0xa16>
break;
8002908: bf00 nop
800290a: e006 b.n 800291a <manageCiclo+0xa16>
break;
800290c: bf00 nop
800290e: e004 b.n 800291a <manageCiclo+0xa16>
break;
8002910: bf00 nop
8002912: e002 b.n 800291a <manageCiclo+0xa16>
break;
8002914: bf00 nop
8002916: e000 b.n 800291a <manageCiclo+0xa16>
break;
8002918: bf00 nop
}
}
800291a: bf00 nop
800291c: 3708 adds r7, #8
800291e: 46bd mov sp, r7
8002920: bd80 pop {r7, pc}
8002922: bf00 nop
8002924: 2000044c .word 0x2000044c
8002928: 2000044f .word 0x2000044f
800292c: 20000444 .word 0x20000444
8002930: 2000041e .word 0x2000041e
8002934: 2000041a .word 0x2000041a
8002938: 2000044e .word 0x2000044e
800293c: 20000420 .word 0x20000420
8002940: 200003fc .word 0x200003fc
8002944: 200003f0 .word 0x200003f0
08002948 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8002948: b580 push {r7, lr}
800294a: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
800294c: f002 f848 bl 80049e0 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8002950: f000 f850 bl 80029f4 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8002954: f000 fab2 bl 8002ebc <MX_GPIO_Init>
MX_DMA_Init();
8002958: f000 fa92 bl 8002e80 <MX_DMA_Init>
MX_USB_DEVICE_Init();
800295c: f00a fce0 bl 800d320 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
8002960: f000 f91e bl 8002ba0 <MX_TIM2_Init>
MX_TIM4_Init();
8002964: f000 f9c0 bl 8002ce8 <MX_TIM4_Init>
MX_ADC1_Init();
8002968: f000 f8a2 bl 8002ab0 <MX_ADC1_Init>
MX_USART1_UART_Init();
800296c: f000 fa5e bl 8002e2c <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS);
8002970: 2205 movs r2, #5
8002972: 491c ldr r1, [pc, #112] @ (80029e4 <main+0x9c>)
8002974: 481c ldr r0, [pc, #112] @ (80029e8 <main+0xa0>)
8002976: f002 f96d bl 8004c54 <HAL_ADC_Start_DMA>
StopMot(timMot1,FWMot1);
800297a: 2100 movs r1, #0
800297c: 481b ldr r0, [pc, #108] @ (80029ec <main+0xa4>)
800297e: f001 f9f8 bl 8003d72 <StopMot>
StopMot(timMot1,BWMot1);
8002982: 2104 movs r1, #4
8002984: 4819 ldr r0, [pc, #100] @ (80029ec <main+0xa4>)
8002986: f001 f9f4 bl 8003d72 <StopMot>
StopMot(timMot2,FWMot2);
800298a: 2108 movs r1, #8
800298c: 4817 ldr r0, [pc, #92] @ (80029ec <main+0xa4>)
800298e: f001 f9f0 bl 8003d72 <StopMot>
StopMot(timMot2,BWMot2);
8002992: 210c movs r1, #12
8002994: 4815 ldr r0, [pc, #84] @ (80029ec <main+0xa4>)
8002996: f001 f9ec bl 8003d72 <StopMot>
StopMot(timMot3,FWMot3);
800299a: 2100 movs r1, #0
800299c: 4814 ldr r0, [pc, #80] @ (80029f0 <main+0xa8>)
800299e: f001 f9e8 bl 8003d72 <StopMot>
StopMot(timMot3,BWMot3);
80029a2: 2104 movs r1, #4
80029a4: 4812 ldr r0, [pc, #72] @ (80029f0 <main+0xa8>)
80029a6: f001 f9e4 bl 8003d72 <StopMot>
StopMot(timMot4,FWMot4);
80029aa: 2108 movs r1, #8
80029ac: 4810 ldr r0, [pc, #64] @ (80029f0 <main+0xa8>)
80029ae: f001 f9e0 bl 8003d72 <StopMot>
StopMot(timMot4,BWMot4);
80029b2: 210c movs r1, #12
80029b4: 480e ldr r0, [pc, #56] @ (80029f0 <main+0xa8>)
80029b6: f001 f9dc bl 8003d72 <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
//while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
if (EE_Init() != EE_OK){
80029ba: f7fe fc7d bl 80012b8 <EE_Init>
80029be: 4603 mov r3, r0
80029c0: 2b00 cmp r3, #0
80029c2: d001 beq.n 80029c8 <main+0x80>
for(;;);//errore eeprom
80029c4: bf00 nop
80029c6: e7fd b.n 80029c4 <main+0x7c>
}
loadEE();
80029c8: f7fe fd12 bl 80013f0 <loadEE>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
manageCDC();
80029cc: f7fd fd16 bl 80003fc <manageCDC>
manageAdc();
80029d0: f7fd fbc4 bl 800015c <manageAdc>
managePulsanti();
80029d4: f7ff f932 bl 8001c3c <managePulsanti>
manageCiclo();
80029d8: f7ff fa94 bl 8001f04 <manageCiclo>
debug();
80029dc: f7fe fa76 bl 8000ecc <debug>
manageCDC();
80029e0: bf00 nop
80029e2: e7f3 b.n 80029cc <main+0x84>
80029e4: 200001fc .word 0x200001fc
80029e8: 200002a4 .word 0x200002a4
80029ec: 20000318 .word 0x20000318
80029f0: 20000360 .word 0x20000360
080029f4 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
80029f4: b580 push {r7, lr}
80029f6: b094 sub sp, #80 @ 0x50
80029f8: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
80029fa: f107 0328 add.w r3, r7, #40 @ 0x28
80029fe: 2228 movs r2, #40 @ 0x28
8002a00: 2100 movs r1, #0
8002a02: 4618 mov r0, r3
8002a04: f00b f9c8 bl 800dd98 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8002a08: f107 0314 add.w r3, r7, #20
8002a0c: 2200 movs r2, #0
8002a0e: 601a str r2, [r3, #0]
8002a10: 605a str r2, [r3, #4]
8002a12: 609a str r2, [r3, #8]
8002a14: 60da str r2, [r3, #12]
8002a16: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
8002a18: 1d3b adds r3, r7, #4
8002a1a: 2200 movs r2, #0
8002a1c: 601a str r2, [r3, #0]
8002a1e: 605a str r2, [r3, #4]
8002a20: 609a str r2, [r3, #8]
8002a22: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8002a24: 2301 movs r3, #1
8002a26: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8002a28: f44f 3380 mov.w r3, #65536 @ 0x10000
8002a2c: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
8002a2e: 2300 movs r3, #0
8002a30: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8002a32: 2301 movs r3, #1
8002a34: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8002a36: 2302 movs r3, #2
8002a38: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8002a3a: f44f 3380 mov.w r3, #65536 @ 0x10000
8002a3e: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
8002a40: f44f 1380 mov.w r3, #1048576 @ 0x100000
8002a44: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8002a46: f107 0328 add.w r3, r7, #40 @ 0x28
8002a4a: 4618 mov r0, r3
8002a4c: f005 f80c bl 8007a68 <HAL_RCC_OscConfig>
8002a50: 4603 mov r3, r0
8002a52: 2b00 cmp r3, #0
8002a54: d001 beq.n 8002a5a <SystemClock_Config+0x66>
{
Error_Handler();
8002a56: f000 fadb bl 8003010 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8002a5a: 230f movs r3, #15
8002a5c: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8002a5e: 2302 movs r3, #2
8002a60: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8002a62: 2300 movs r3, #0
8002a64: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
8002a66: f44f 6380 mov.w r3, #1024 @ 0x400
8002a6a: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8002a6c: 2300 movs r3, #0
8002a6e: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
8002a70: f107 0314 add.w r3, r7, #20
8002a74: 2102 movs r1, #2
8002a76: 4618 mov r0, r3
8002a78: f005 fa78 bl 8007f6c <HAL_RCC_ClockConfig>
8002a7c: 4603 mov r3, r0
8002a7e: 2b00 cmp r3, #0
8002a80: d001 beq.n 8002a86 <SystemClock_Config+0x92>
{
Error_Handler();
8002a82: f000 fac5 bl 8003010 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
8002a86: 2312 movs r3, #18
8002a88: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
8002a8a: f44f 4300 mov.w r3, #32768 @ 0x8000
8002a8e: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
8002a90: 2300 movs r3, #0
8002a92: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
8002a94: 1d3b adds r3, r7, #4
8002a96: 4618 mov r0, r3
8002a98: f005 fbf8 bl 800828c <HAL_RCCEx_PeriphCLKConfig>
8002a9c: 4603 mov r3, r0
8002a9e: 2b00 cmp r3, #0
8002aa0: d001 beq.n 8002aa6 <SystemClock_Config+0xb2>
{
Error_Handler();
8002aa2: f000 fab5 bl 8003010 <Error_Handler>
}
}
8002aa6: bf00 nop
8002aa8: 3750 adds r7, #80 @ 0x50
8002aaa: 46bd mov sp, r7
8002aac: bd80 pop {r7, pc}
...
08002ab0 <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
8002ab0: b580 push {r7, lr}
8002ab2: b084 sub sp, #16
8002ab4: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
8002ab6: 1d3b adds r3, r7, #4
8002ab8: 2200 movs r2, #0
8002aba: 601a str r2, [r3, #0]
8002abc: 605a str r2, [r3, #4]
8002abe: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
8002ac0: 4b35 ldr r3, [pc, #212] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002ac2: 4a36 ldr r2, [pc, #216] @ (8002b9c <MX_ADC1_Init+0xec>)
8002ac4: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
8002ac6: 4b34 ldr r3, [pc, #208] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002ac8: f44f 7280 mov.w r2, #256 @ 0x100
8002acc: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = ENABLE;
8002ace: 4b32 ldr r3, [pc, #200] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002ad0: 2201 movs r2, #1
8002ad2: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
8002ad4: 4b30 ldr r3, [pc, #192] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002ad6: 2200 movs r2, #0
8002ad8: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8002ada: 4b2f ldr r3, [pc, #188] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002adc: f44f 2260 mov.w r2, #917504 @ 0xe0000
8002ae0: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8002ae2: 4b2d ldr r3, [pc, #180] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002ae4: 2200 movs r2, #0
8002ae6: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 5;
8002ae8: 4b2b ldr r3, [pc, #172] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002aea: 2205 movs r2, #5
8002aec: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8002aee: 482a ldr r0, [pc, #168] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002af0: f001 ffd8 bl 8004aa4 <HAL_ADC_Init>
8002af4: 4603 mov r3, r0
8002af6: 2b00 cmp r3, #0
8002af8: d001 beq.n 8002afe <MX_ADC1_Init+0x4e>
{
Error_Handler();
8002afa: f000 fa89 bl 8003010 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
8002afe: 2304 movs r3, #4
8002b00: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8002b02: 2301 movs r3, #1
8002b04: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5;
8002b06: 2303 movs r3, #3
8002b08: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002b0a: 1d3b adds r3, r7, #4
8002b0c: 4619 mov r1, r3
8002b0e: 4822 ldr r0, [pc, #136] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002b10: f002 f99a bl 8004e48 <HAL_ADC_ConfigChannel>
8002b14: 4603 mov r3, r0
8002b16: 2b00 cmp r3, #0
8002b18: d001 beq.n 8002b1e <MX_ADC1_Init+0x6e>
{
Error_Handler();
8002b1a: f000 fa79 bl 8003010 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_5;
8002b1e: 2305 movs r3, #5
8002b20: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_2;
8002b22: 2302 movs r3, #2
8002b24: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002b26: 1d3b adds r3, r7, #4
8002b28: 4619 mov r1, r3
8002b2a: 481b ldr r0, [pc, #108] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002b2c: f002 f98c bl 8004e48 <HAL_ADC_ConfigChannel>
8002b30: 4603 mov r3, r0
8002b32: 2b00 cmp r3, #0
8002b34: d001 beq.n 8002b3a <MX_ADC1_Init+0x8a>
{
Error_Handler();
8002b36: f000 fa6b bl 8003010 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
8002b3a: 2306 movs r3, #6
8002b3c: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_3;
8002b3e: 2303 movs r3, #3
8002b40: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002b42: 1d3b adds r3, r7, #4
8002b44: 4619 mov r1, r3
8002b46: 4814 ldr r0, [pc, #80] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002b48: f002 f97e bl 8004e48 <HAL_ADC_ConfigChannel>
8002b4c: 4603 mov r3, r0
8002b4e: 2b00 cmp r3, #0
8002b50: d001 beq.n 8002b56 <MX_ADC1_Init+0xa6>
{
Error_Handler();
8002b52: f000 fa5d bl 8003010 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_7;
8002b56: 2307 movs r3, #7
8002b58: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_4;
8002b5a: 2304 movs r3, #4
8002b5c: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002b5e: 1d3b adds r3, r7, #4
8002b60: 4619 mov r1, r3
8002b62: 480d ldr r0, [pc, #52] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002b64: f002 f970 bl 8004e48 <HAL_ADC_ConfigChannel>
8002b68: 4603 mov r3, r0
8002b6a: 2b00 cmp r3, #0
8002b6c: d001 beq.n 8002b72 <MX_ADC1_Init+0xc2>
{
Error_Handler();
8002b6e: f000 fa4f bl 8003010 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
8002b72: 2308 movs r3, #8
8002b74: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_5;
8002b76: 2305 movs r3, #5
8002b78: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002b7a: 1d3b adds r3, r7, #4
8002b7c: 4619 mov r1, r3
8002b7e: 4806 ldr r0, [pc, #24] @ (8002b98 <MX_ADC1_Init+0xe8>)
8002b80: f002 f962 bl 8004e48 <HAL_ADC_ConfigChannel>
8002b84: 4603 mov r3, r0
8002b86: 2b00 cmp r3, #0
8002b88: d001 beq.n 8002b8e <MX_ADC1_Init+0xde>
{
Error_Handler();
8002b8a: f000 fa41 bl 8003010 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8002b8e: bf00 nop
8002b90: 3710 adds r7, #16
8002b92: 46bd mov sp, r7
8002b94: bd80 pop {r7, pc}
8002b96: bf00 nop
8002b98: 200002a4 .word 0x200002a4
8002b9c: 40012400 .word 0x40012400
08002ba0 <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
8002ba0: b580 push {r7, lr}
8002ba2: b08e sub sp, #56 @ 0x38
8002ba4: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8002ba6: f107 0328 add.w r3, r7, #40 @ 0x28
8002baa: 2200 movs r2, #0
8002bac: 601a str r2, [r3, #0]
8002bae: 605a str r2, [r3, #4]
8002bb0: 609a str r2, [r3, #8]
8002bb2: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8002bb4: f107 0320 add.w r3, r7, #32
8002bb8: 2200 movs r2, #0
8002bba: 601a str r2, [r3, #0]
8002bbc: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8002bbe: 1d3b adds r3, r7, #4
8002bc0: 2200 movs r2, #0
8002bc2: 601a str r2, [r3, #0]
8002bc4: 605a str r2, [r3, #4]
8002bc6: 609a str r2, [r3, #8]
8002bc8: 60da str r2, [r3, #12]
8002bca: 611a str r2, [r3, #16]
8002bcc: 615a str r2, [r3, #20]
8002bce: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8002bd0: 4b44 ldr r3, [pc, #272] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002bd2: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8002bd6: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8002bd8: 4b42 ldr r3, [pc, #264] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002bda: 2200 movs r2, #0
8002bdc: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
8002bde: 4b41 ldr r3, [pc, #260] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002be0: 2200 movs r2, #0
8002be2: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
8002be4: 4b3f ldr r3, [pc, #252] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002be6: f244 624f movw r2, #17999 @ 0x464f
8002bea: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8002bec: 4b3d ldr r3, [pc, #244] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002bee: 2200 movs r2, #0
8002bf0: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8002bf2: 4b3c ldr r3, [pc, #240] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002bf4: 2200 movs r2, #0
8002bf6: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
8002bf8: 483a ldr r0, [pc, #232] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002bfa: f005 fbfd bl 80083f8 <HAL_TIM_Base_Init>
8002bfe: 4603 mov r3, r0
8002c00: 2b00 cmp r3, #0
8002c02: d001 beq.n 8002c08 <MX_TIM2_Init+0x68>
{
Error_Handler();
8002c04: f000 fa04 bl 8003010 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8002c08: f44f 5380 mov.w r3, #4096 @ 0x1000
8002c0c: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
8002c0e: f107 0328 add.w r3, r7, #40 @ 0x28
8002c12: 4619 mov r1, r3
8002c14: 4833 ldr r0, [pc, #204] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002c16: f005 fe5f bl 80088d8 <HAL_TIM_ConfigClockSource>
8002c1a: 4603 mov r3, r0
8002c1c: 2b00 cmp r3, #0
8002c1e: d001 beq.n 8002c24 <MX_TIM2_Init+0x84>
{
Error_Handler();
8002c20: f000 f9f6 bl 8003010 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
8002c24: 482f ldr r0, [pc, #188] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002c26: f005 fc36 bl 8008496 <HAL_TIM_PWM_Init>
8002c2a: 4603 mov r3, r0
8002c2c: 2b00 cmp r3, #0
8002c2e: d001 beq.n 8002c34 <MX_TIM2_Init+0x94>
{
Error_Handler();
8002c30: f000 f9ee bl 8003010 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8002c34: 2300 movs r3, #0
8002c36: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8002c38: 2300 movs r3, #0
8002c3a: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
8002c3c: f107 0320 add.w r3, r7, #32
8002c40: 4619 mov r1, r3
8002c42: 4828 ldr r0, [pc, #160] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002c44: f006 f9e8 bl 8009018 <HAL_TIMEx_MasterConfigSynchronization>
8002c48: 4603 mov r3, r0
8002c4a: 2b00 cmp r3, #0
8002c4c: d001 beq.n 8002c52 <MX_TIM2_Init+0xb2>
{
Error_Handler();
8002c4e: f000 f9df bl 8003010 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8002c52: 2360 movs r3, #96 @ 0x60
8002c54: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
8002c56: f44f 737a mov.w r3, #1000 @ 0x3e8
8002c5a: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8002c5c: 2300 movs r3, #0
8002c5e: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8002c60: 2304 movs r3, #4
8002c62: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8002c64: 1d3b adds r3, r7, #4
8002c66: 2200 movs r2, #0
8002c68: 4619 mov r1, r3
8002c6a: 481e ldr r0, [pc, #120] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002c6c: f005 fd72 bl 8008754 <HAL_TIM_PWM_ConfigChannel>
8002c70: 4603 mov r3, r0
8002c72: 2b00 cmp r3, #0
8002c74: d001 beq.n 8002c7a <MX_TIM2_Init+0xda>
{
Error_Handler();
8002c76: f000 f9cb bl 8003010 <Error_Handler>
}
sConfigOC.Pulse = 2000;
8002c7a: f44f 63fa mov.w r3, #2000 @ 0x7d0
8002c7e: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8002c80: 1d3b adds r3, r7, #4
8002c82: 2204 movs r2, #4
8002c84: 4619 mov r1, r3
8002c86: 4817 ldr r0, [pc, #92] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002c88: f005 fd64 bl 8008754 <HAL_TIM_PWM_ConfigChannel>
8002c8c: 4603 mov r3, r0
8002c8e: 2b00 cmp r3, #0
8002c90: d001 beq.n 8002c96 <MX_TIM2_Init+0xf6>
{
Error_Handler();
8002c92: f000 f9bd bl 8003010 <Error_Handler>
}
sConfigOC.Pulse = 3000;
8002c96: f640 33b8 movw r3, #3000 @ 0xbb8
8002c9a: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
8002c9c: 2300 movs r3, #0
8002c9e: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8002ca0: 1d3b adds r3, r7, #4
8002ca2: 2208 movs r2, #8
8002ca4: 4619 mov r1, r3
8002ca6: 480f ldr r0, [pc, #60] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002ca8: f005 fd54 bl 8008754 <HAL_TIM_PWM_ConfigChannel>
8002cac: 4603 mov r3, r0
8002cae: 2b00 cmp r3, #0
8002cb0: d001 beq.n 8002cb6 <MX_TIM2_Init+0x116>
{
Error_Handler();
8002cb2: f000 f9ad bl 8003010 <Error_Handler>
}
sConfigOC.Pulse = 4000;
8002cb6: f44f 637a mov.w r3, #4000 @ 0xfa0
8002cba: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8002cbc: 2304 movs r3, #4
8002cbe: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8002cc0: 1d3b adds r3, r7, #4
8002cc2: 220c movs r2, #12
8002cc4: 4619 mov r1, r3
8002cc6: 4807 ldr r0, [pc, #28] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002cc8: f005 fd44 bl 8008754 <HAL_TIM_PWM_ConfigChannel>
8002ccc: 4603 mov r3, r0
8002cce: 2b00 cmp r3, #0
8002cd0: d001 beq.n 8002cd6 <MX_TIM2_Init+0x136>
{
Error_Handler();
8002cd2: f000 f99d bl 8003010 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
8002cd6: 4803 ldr r0, [pc, #12] @ (8002ce4 <MX_TIM2_Init+0x144>)
8002cd8: f001 fd3e bl 8004758 <HAL_TIM_MspPostInit>
}
8002cdc: bf00 nop
8002cde: 3738 adds r7, #56 @ 0x38
8002ce0: 46bd mov sp, r7
8002ce2: bd80 pop {r7, pc}
8002ce4: 20000318 .word 0x20000318
08002ce8 <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
8002ce8: b580 push {r7, lr}
8002cea: b08e sub sp, #56 @ 0x38
8002cec: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8002cee: f107 0328 add.w r3, r7, #40 @ 0x28
8002cf2: 2200 movs r2, #0
8002cf4: 601a str r2, [r3, #0]
8002cf6: 605a str r2, [r3, #4]
8002cf8: 609a str r2, [r3, #8]
8002cfa: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8002cfc: f107 0320 add.w r3, r7, #32
8002d00: 2200 movs r2, #0
8002d02: 601a str r2, [r3, #0]
8002d04: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8002d06: 1d3b adds r3, r7, #4
8002d08: 2200 movs r2, #0
8002d0a: 601a str r2, [r3, #0]
8002d0c: 605a str r2, [r3, #4]
8002d0e: 609a str r2, [r3, #8]
8002d10: 60da str r2, [r3, #12]
8002d12: 611a str r2, [r3, #16]
8002d14: 615a str r2, [r3, #20]
8002d16: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
8002d18: 4b42 ldr r3, [pc, #264] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d1a: 4a43 ldr r2, [pc, #268] @ (8002e28 <MX_TIM4_Init+0x140>)
8002d1c: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
8002d1e: 4b41 ldr r3, [pc, #260] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d20: 2200 movs r2, #0
8002d22: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
8002d24: 4b3f ldr r3, [pc, #252] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d26: 2200 movs r2, #0
8002d28: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
8002d2a: 4b3e ldr r3, [pc, #248] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d2c: f244 624f movw r2, #17999 @ 0x464f
8002d30: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8002d32: 4b3c ldr r3, [pc, #240] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d34: 2200 movs r2, #0
8002d36: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8002d38: 4b3a ldr r3, [pc, #232] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d3a: 2200 movs r2, #0
8002d3c: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
8002d3e: 4839 ldr r0, [pc, #228] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d40: f005 fb5a bl 80083f8 <HAL_TIM_Base_Init>
8002d44: 4603 mov r3, r0
8002d46: 2b00 cmp r3, #0
8002d48: d001 beq.n 8002d4e <MX_TIM4_Init+0x66>
{
Error_Handler();
8002d4a: f000 f961 bl 8003010 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8002d4e: f44f 5380 mov.w r3, #4096 @ 0x1000
8002d52: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
8002d54: f107 0328 add.w r3, r7, #40 @ 0x28
8002d58: 4619 mov r1, r3
8002d5a: 4832 ldr r0, [pc, #200] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d5c: f005 fdbc bl 80088d8 <HAL_TIM_ConfigClockSource>
8002d60: 4603 mov r3, r0
8002d62: 2b00 cmp r3, #0
8002d64: d001 beq.n 8002d6a <MX_TIM4_Init+0x82>
{
Error_Handler();
8002d66: f000 f953 bl 8003010 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
8002d6a: 482e ldr r0, [pc, #184] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d6c: f005 fb93 bl 8008496 <HAL_TIM_PWM_Init>
8002d70: 4603 mov r3, r0
8002d72: 2b00 cmp r3, #0
8002d74: d001 beq.n 8002d7a <MX_TIM4_Init+0x92>
{
Error_Handler();
8002d76: f000 f94b bl 8003010 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8002d7a: 2300 movs r3, #0
8002d7c: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8002d7e: 2300 movs r3, #0
8002d80: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
8002d82: f107 0320 add.w r3, r7, #32
8002d86: 4619 mov r1, r3
8002d88: 4826 ldr r0, [pc, #152] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002d8a: f006 f945 bl 8009018 <HAL_TIMEx_MasterConfigSynchronization>
8002d8e: 4603 mov r3, r0
8002d90: 2b00 cmp r3, #0
8002d92: d001 beq.n 8002d98 <MX_TIM4_Init+0xb0>
{
Error_Handler();
8002d94: f000 f93c bl 8003010 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8002d98: 2360 movs r3, #96 @ 0x60
8002d9a: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
8002d9c: f241 3388 movw r3, #5000 @ 0x1388
8002da0: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8002da2: 2300 movs r3, #0
8002da4: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8002da6: 2304 movs r3, #4
8002da8: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8002daa: 1d3b adds r3, r7, #4
8002dac: 2200 movs r2, #0
8002dae: 4619 mov r1, r3
8002db0: 481c ldr r0, [pc, #112] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002db2: f005 fccf bl 8008754 <HAL_TIM_PWM_ConfigChannel>
8002db6: 4603 mov r3, r0
8002db8: 2b00 cmp r3, #0
8002dba: d001 beq.n 8002dc0 <MX_TIM4_Init+0xd8>
{
Error_Handler();
8002dbc: f000 f928 bl 8003010 <Error_Handler>
}
sConfigOC.Pulse = 6000;
8002dc0: f241 7370 movw r3, #6000 @ 0x1770
8002dc4: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8002dc6: 1d3b adds r3, r7, #4
8002dc8: 2204 movs r2, #4
8002dca: 4619 mov r1, r3
8002dcc: 4815 ldr r0, [pc, #84] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002dce: f005 fcc1 bl 8008754 <HAL_TIM_PWM_ConfigChannel>
8002dd2: 4603 mov r3, r0
8002dd4: 2b00 cmp r3, #0
8002dd6: d001 beq.n 8002ddc <MX_TIM4_Init+0xf4>
{
Error_Handler();
8002dd8: f000 f91a bl 8003010 <Error_Handler>
}
sConfigOC.Pulse = 7000;
8002ddc: f641 3358 movw r3, #7000 @ 0x1b58
8002de0: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8002de2: 1d3b adds r3, r7, #4
8002de4: 2208 movs r2, #8
8002de6: 4619 mov r1, r3
8002de8: 480e ldr r0, [pc, #56] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002dea: f005 fcb3 bl 8008754 <HAL_TIM_PWM_ConfigChannel>
8002dee: 4603 mov r3, r0
8002df0: 2b00 cmp r3, #0
8002df2: d001 beq.n 8002df8 <MX_TIM4_Init+0x110>
{
Error_Handler();
8002df4: f000 f90c bl 8003010 <Error_Handler>
}
sConfigOC.Pulse = 8000;
8002df8: f44f 53fa mov.w r3, #8000 @ 0x1f40
8002dfc: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8002dfe: 1d3b adds r3, r7, #4
8002e00: 220c movs r2, #12
8002e02: 4619 mov r1, r3
8002e04: 4807 ldr r0, [pc, #28] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002e06: f005 fca5 bl 8008754 <HAL_TIM_PWM_ConfigChannel>
8002e0a: 4603 mov r3, r0
8002e0c: 2b00 cmp r3, #0
8002e0e: d001 beq.n 8002e14 <MX_TIM4_Init+0x12c>
{
Error_Handler();
8002e10: f000 f8fe bl 8003010 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8002e14: 4803 ldr r0, [pc, #12] @ (8002e24 <MX_TIM4_Init+0x13c>)
8002e16: f001 fc9f bl 8004758 <HAL_TIM_MspPostInit>
}
8002e1a: bf00 nop
8002e1c: 3738 adds r7, #56 @ 0x38
8002e1e: 46bd mov sp, r7
8002e20: bd80 pop {r7, pc}
8002e22: bf00 nop
8002e24: 20000360 .word 0x20000360
8002e28: 40000800 .word 0x40000800
08002e2c <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
8002e2c: b580 push {r7, lr}
8002e2e: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
8002e30: 4b11 ldr r3, [pc, #68] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e32: 4a12 ldr r2, [pc, #72] @ (8002e7c <MX_USART1_UART_Init+0x50>)
8002e34: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
8002e36: 4b10 ldr r3, [pc, #64] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e38: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8002e3c: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
8002e3e: 4b0e ldr r3, [pc, #56] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e40: 2200 movs r2, #0
8002e42: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8002e44: 4b0c ldr r3, [pc, #48] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e46: 2200 movs r2, #0
8002e48: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
8002e4a: 4b0b ldr r3, [pc, #44] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e4c: 2200 movs r2, #0
8002e4e: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8002e50: 4b09 ldr r3, [pc, #36] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e52: 220c movs r2, #12
8002e54: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8002e56: 4b08 ldr r3, [pc, #32] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e58: 2200 movs r2, #0
8002e5a: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8002e5c: 4b06 ldr r3, [pc, #24] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e5e: 2200 movs r2, #0
8002e60: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
8002e62: 4805 ldr r0, [pc, #20] @ (8002e78 <MX_USART1_UART_Init+0x4c>)
8002e64: f006 f936 bl 80090d4 <HAL_UART_Init>
8002e68: 4603 mov r3, r0
8002e6a: 2b00 cmp r3, #0
8002e6c: d001 beq.n 8002e72 <MX_USART1_UART_Init+0x46>
{
Error_Handler();
8002e6e: f000 f8cf bl 8003010 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
8002e72: bf00 nop
8002e74: bd80 pop {r7, pc}
8002e76: bf00 nop
8002e78: 200003a8 .word 0x200003a8
8002e7c: 40013800 .word 0x40013800
08002e80 <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
8002e80: b580 push {r7, lr}
8002e82: b082 sub sp, #8
8002e84: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
8002e86: 4b0c ldr r3, [pc, #48] @ (8002eb8 <MX_DMA_Init+0x38>)
8002e88: 695b ldr r3, [r3, #20]
8002e8a: 4a0b ldr r2, [pc, #44] @ (8002eb8 <MX_DMA_Init+0x38>)
8002e8c: f043 0301 orr.w r3, r3, #1
8002e90: 6153 str r3, [r2, #20]
8002e92: 4b09 ldr r3, [pc, #36] @ (8002eb8 <MX_DMA_Init+0x38>)
8002e94: 695b ldr r3, [r3, #20]
8002e96: f003 0301 and.w r3, r3, #1
8002e9a: 607b str r3, [r7, #4]
8002e9c: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
8002e9e: 2200 movs r2, #0
8002ea0: 2100 movs r1, #0
8002ea2: 200b movs r0, #11
8002ea4: f002 faa1 bl 80053ea <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
8002ea8: 200b movs r0, #11
8002eaa: f002 faba bl 8005422 <HAL_NVIC_EnableIRQ>
}
8002eae: bf00 nop
8002eb0: 3708 adds r7, #8
8002eb2: 46bd mov sp, r7
8002eb4: bd80 pop {r7, pc}
8002eb6: bf00 nop
8002eb8: 40021000 .word 0x40021000
08002ebc <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8002ebc: b580 push {r7, lr}
8002ebe: b088 sub sp, #32
8002ec0: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8002ec2: f107 0310 add.w r3, r7, #16
8002ec6: 2200 movs r2, #0
8002ec8: 601a str r2, [r3, #0]
8002eca: 605a str r2, [r3, #4]
8002ecc: 609a str r2, [r3, #8]
8002ece: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8002ed0: 4b4b ldr r3, [pc, #300] @ (8003000 <MX_GPIO_Init+0x144>)
8002ed2: 699b ldr r3, [r3, #24]
8002ed4: 4a4a ldr r2, [pc, #296] @ (8003000 <MX_GPIO_Init+0x144>)
8002ed6: f043 0310 orr.w r3, r3, #16
8002eda: 6193 str r3, [r2, #24]
8002edc: 4b48 ldr r3, [pc, #288] @ (8003000 <MX_GPIO_Init+0x144>)
8002ede: 699b ldr r3, [r3, #24]
8002ee0: f003 0310 and.w r3, r3, #16
8002ee4: 60fb str r3, [r7, #12]
8002ee6: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
8002ee8: 4b45 ldr r3, [pc, #276] @ (8003000 <MX_GPIO_Init+0x144>)
8002eea: 699b ldr r3, [r3, #24]
8002eec: 4a44 ldr r2, [pc, #272] @ (8003000 <MX_GPIO_Init+0x144>)
8002eee: f043 0320 orr.w r3, r3, #32
8002ef2: 6193 str r3, [r2, #24]
8002ef4: 4b42 ldr r3, [pc, #264] @ (8003000 <MX_GPIO_Init+0x144>)
8002ef6: 699b ldr r3, [r3, #24]
8002ef8: f003 0320 and.w r3, r3, #32
8002efc: 60bb str r3, [r7, #8]
8002efe: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8002f00: 4b3f ldr r3, [pc, #252] @ (8003000 <MX_GPIO_Init+0x144>)
8002f02: 699b ldr r3, [r3, #24]
8002f04: 4a3e ldr r2, [pc, #248] @ (8003000 <MX_GPIO_Init+0x144>)
8002f06: f043 0304 orr.w r3, r3, #4
8002f0a: 6193 str r3, [r2, #24]
8002f0c: 4b3c ldr r3, [pc, #240] @ (8003000 <MX_GPIO_Init+0x144>)
8002f0e: 699b ldr r3, [r3, #24]
8002f10: f003 0304 and.w r3, r3, #4
8002f14: 607b str r3, [r7, #4]
8002f16: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
8002f18: 4b39 ldr r3, [pc, #228] @ (8003000 <MX_GPIO_Init+0x144>)
8002f1a: 699b ldr r3, [r3, #24]
8002f1c: 4a38 ldr r2, [pc, #224] @ (8003000 <MX_GPIO_Init+0x144>)
8002f1e: f043 0308 orr.w r3, r3, #8
8002f22: 6193 str r3, [r2, #24]
8002f24: 4b36 ldr r3, [pc, #216] @ (8003000 <MX_GPIO_Init+0x144>)
8002f26: 699b ldr r3, [r3, #24]
8002f28: f003 0308 and.w r3, r3, #8
8002f2c: 603b str r3, [r7, #0]
8002f2e: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8002f30: 2200 movs r2, #0
8002f32: f44f 5100 mov.w r1, #8192 @ 0x2000
8002f36: 4833 ldr r0, [pc, #204] @ (8003004 <MX_GPIO_Init+0x148>)
8002f38: f003 f81d bl 8005f76 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8002f3c: 2200 movs r2, #0
8002f3e: f640 413e movw r1, #3134 @ 0xc3e
8002f42: 4831 ldr r0, [pc, #196] @ (8003008 <MX_GPIO_Init+0x14c>)
8002f44: f003 f817 bl 8005f76 <HAL_GPIO_WritePin>
|EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET);
8002f48: 2200 movs r2, #0
8002f4a: f44f 4101 mov.w r1, #33024 @ 0x8100
8002f4e: 482f ldr r0, [pc, #188] @ (800300c <MX_GPIO_Init+0x150>)
8002f50: f003 f811 bl 8005f76 <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
8002f54: f44f 5300 mov.w r3, #8192 @ 0x2000
8002f58: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002f5a: 2301 movs r3, #1
8002f5c: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002f5e: 2300 movs r3, #0
8002f60: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002f62: 2302 movs r3, #2
8002f64: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
8002f66: f107 0310 add.w r3, r7, #16
8002f6a: 4619 mov r1, r3
8002f6c: 4825 ldr r0, [pc, #148] @ (8003004 <MX_GPIO_Init+0x148>)
8002f6e: f002 fe67 bl 8005c40 <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin|P2_Pin;
8002f72: f44f 4340 mov.w r3, #49152 @ 0xc000
8002f76: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8002f78: 2300 movs r3, #0
8002f7a: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002f7c: 2300 movs r3, #0
8002f7e: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8002f80: f107 0310 add.w r3, r7, #16
8002f84: 4619 mov r1, r3
8002f86: 481f ldr r0, [pc, #124] @ (8003004 <MX_GPIO_Init+0x148>)
8002f88: f002 fe5a bl 8005c40 <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
8002f8c: 2310 movs r3, #16
8002f8e: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8002f90: 2303 movs r3, #3
8002f92: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
8002f94: f107 0310 add.w r3, r7, #16
8002f98: 4619 mov r1, r3
8002f9a: 481c ldr r0, [pc, #112] @ (800300c <MX_GPIO_Init+0x150>)
8002f9c: f002 fe50 bl 8005c40 <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8002fa0: f640 433e movw r3, #3134 @ 0xc3e
8002fa4: 613b str r3, [r7, #16]
|EXP1_Pin|EXP2_Pin|EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002fa6: 2301 movs r3, #1
8002fa8: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002faa: 2300 movs r3, #0
8002fac: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002fae: 2302 movs r3, #2
8002fb0: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8002fb2: f107 0310 add.w r3, r7, #16
8002fb6: 4619 mov r1, r3
8002fb8: 4813 ldr r0, [pc, #76] @ (8003008 <MX_GPIO_Init+0x14c>)
8002fba: f002 fe41 bl 8005c40 <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin;
8002fbe: f44f 4370 mov.w r3, #61440 @ 0xf000
8002fc2: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8002fc4: 2300 movs r3, #0
8002fc6: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002fc8: 2300 movs r3, #0
8002fca: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8002fcc: f107 0310 add.w r3, r7, #16
8002fd0: 4619 mov r1, r3
8002fd2: 480d ldr r0, [pc, #52] @ (8003008 <MX_GPIO_Init+0x14c>)
8002fd4: f002 fe34 bl 8005c40 <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin;
8002fd8: f44f 4301 mov.w r3, #33024 @ 0x8100
8002fdc: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002fde: 2301 movs r3, #1
8002fe0: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002fe2: 2300 movs r3, #0
8002fe4: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002fe6: 2302 movs r3, #2
8002fe8: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8002fea: f107 0310 add.w r3, r7, #16
8002fee: 4619 mov r1, r3
8002ff0: 4806 ldr r0, [pc, #24] @ (800300c <MX_GPIO_Init+0x150>)
8002ff2: f002 fe25 bl 8005c40 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8002ff6: bf00 nop
8002ff8: 3720 adds r7, #32
8002ffa: 46bd mov sp, r7
8002ffc: bd80 pop {r7, pc}
8002ffe: bf00 nop
8003000: 40021000 .word 0x40021000
8003004: 40011000 .word 0x40011000
8003008: 40010c00 .word 0x40010c00
800300c: 40010800 .word 0x40010800
08003010 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8003010: b480 push {r7}
8003012: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8003014: b672 cpsid i
}
8003016: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
8003018: bf00 nop
800301a: e7fd b.n 8003018 <Error_Handler+0x8>
0800301c <m1ap>:
extern uint16_t mrampstart[4];
extern uint16_t tramp;
extern UART_HandleTypeDef huart1;
motMov_st m1ap(void){
800301c: b580 push {r7, lr}
800301e: b09c sub sp, #112 @ 0x70
8003020: af02 add r7, sp, #8
static motMov_st m1st=motWaiting;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8003022: 4b5d ldr r3, [pc, #372] @ (8003198 <m1ap+0x17c>)
8003024: 781a ldrb r2, [r3, #0]
8003026: 4b5d ldr r3, [pc, #372] @ (800319c <m1ap+0x180>)
8003028: 781b ldrb r3, [r3, #0]
800302a: 429a cmp r2, r3
800302c: d017 beq.n 800305e <m1ap+0x42>
memm1st=m1st;
800302e: 4b5b ldr r3, [pc, #364] @ (800319c <m1ap+0x180>)
8003030: 781a ldrb r2, [r3, #0]
8003032: 4b59 ldr r3, [pc, #356] @ (8003198 <m1ap+0x17c>)
8003034: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ap=%d",m1st);
8003036: 4b59 ldr r3, [pc, #356] @ (800319c <m1ap+0x180>)
8003038: 781b ldrb r3, [r3, #0]
800303a: 461a mov r2, r3
800303c: 1d3b adds r3, r7, #4
800303e: 4958 ldr r1, [pc, #352] @ (80031a0 <m1ap+0x184>)
8003040: 4618 mov r0, r3
8003042: f00a fe87 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003046: 1d3b adds r3, r7, #4
8003048: 4618 mov r0, r3
800304a: f7fd f87f bl 800014c <strlen>
800304e: 4603 mov r3, r0
8003050: b29a uxth r2, r3
8003052: 1d39 adds r1, r7, #4
8003054: f04f 33ff mov.w r3, #4294967295
8003058: 4852 ldr r0, [pc, #328] @ (80031a4 <m1ap+0x188>)
800305a: f006 f88b bl 8009174 <HAL_UART_Transmit>
}
if(rtCiclo<apM1start)m1st=motWaiting;
800305e: 4b52 ldr r3, [pc, #328] @ (80031a8 <m1ap+0x18c>)
8003060: 881b ldrh r3, [r3, #0]
8003062: b29a uxth r2, r3
8003064: 4b51 ldr r3, [pc, #324] @ (80031ac <m1ap+0x190>)
8003066: 881b ldrh r3, [r3, #0]
8003068: 429a cmp r2, r3
800306a: d202 bcs.n 8003072 <m1ap+0x56>
800306c: 4b4b ldr r3, [pc, #300] @ (800319c <m1ap+0x180>)
800306e: 2200 movs r2, #0
8003070: 701a strb r2, [r3, #0]
switch(m1st){
8003072: 4b4a ldr r3, [pc, #296] @ (800319c <m1ap+0x180>)
8003074: 781b ldrb r3, [r3, #0]
8003076: 2b03 cmp r3, #3
8003078: d876 bhi.n 8003168 <m1ap+0x14c>
800307a: a201 add r2, pc, #4 @ (adr r2, 8003080 <m1ap+0x64>)
800307c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003080: 08003091 .word 0x08003091
8003084: 080030dd .word 0x080030dd
8003088: 0800310d .word 0x0800310d
800308c: 0800313f .word 0x0800313f
case motWaiting:
SetMotPerc(M1,FW,0);
8003090: 2200 movs r2, #0
8003092: 2100 movs r1, #0
8003094: 2001 movs r0, #1
8003096: f001 f83f bl 8004118 <SetMotPerc>
SetMotPerc(M1,BW,0);
800309a: 2200 movs r2, #0
800309c: 2101 movs r1, #1
800309e: 2001 movs r0, #1
80030a0: f001 f83a bl 8004118 <SetMotPerc>
if(rtCiclo>=apM1start){
80030a4: 4b40 ldr r3, [pc, #256] @ (80031a8 <m1ap+0x18c>)
80030a6: 881b ldrh r3, [r3, #0]
80030a8: b29a uxth r2, r3
80030aa: 4b40 ldr r3, [pc, #256] @ (80031ac <m1ap+0x190>)
80030ac: 881b ldrh r3, [r3, #0]
80030ae: 429a cmp r2, r3
80030b0: d365 bcc.n 800317e <m1ap+0x162>
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT);
80030b2: 4b3f ldr r3, [pc, #252] @ (80031b0 <m1ap+0x194>)
80030b4: 881b ldrh r3, [r3, #0]
80030b6: b2da uxtb r2, r3
80030b8: 4b3e ldr r3, [pc, #248] @ (80031b4 <m1ap+0x198>)
80030ba: 881b ldrh r3, [r3, #0]
80030bc: b2d9 uxtb r1, r3
80030be: 4b3e ldr r3, [pc, #248] @ (80031b8 <m1ap+0x19c>)
80030c0: 881b ldrh r3, [r3, #0]
80030c2: b2db uxtb r3, r3
80030c4: 2000 movs r0, #0
80030c6: 9001 str r0, [sp, #4]
80030c8: 9300 str r3, [sp, #0]
80030ca: 460b mov r3, r1
80030cc: 2101 movs r1, #1
80030ce: 2001 movs r0, #1
80030d0: f001 f9a2 bl 8004418 <ramp>
m1st=motStartRamp;
80030d4: 4b31 ldr r3, [pc, #196] @ (800319c <m1ap+0x180>)
80030d6: 2201 movs r2, #1
80030d8: 701a strb r2, [r3, #0]
}
break;
80030da: e050 b.n 800317e <m1ap+0x162>
case motStartRamp:
if(ramp(M1,BW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){
80030dc: 4b34 ldr r3, [pc, #208] @ (80031b0 <m1ap+0x194>)
80030de: 881b ldrh r3, [r3, #0]
80030e0: b2da uxtb r2, r3
80030e2: 4b34 ldr r3, [pc, #208] @ (80031b4 <m1ap+0x198>)
80030e4: 881b ldrh r3, [r3, #0]
80030e6: b2d9 uxtb r1, r3
80030e8: 4b33 ldr r3, [pc, #204] @ (80031b8 <m1ap+0x19c>)
80030ea: 881b ldrh r3, [r3, #0]
80030ec: b2db uxtb r3, r3
80030ee: 200a movs r0, #10
80030f0: 9001 str r0, [sp, #4]
80030f2: 9300 str r3, [sp, #0]
80030f4: 460b mov r3, r1
80030f6: 2101 movs r1, #1
80030f8: 2001 movs r0, #1
80030fa: f001 f98d bl 8004418 <ramp>
80030fe: 4603 mov r3, r0
8003100: 2b00 cmp r3, #0
8003102: d13e bne.n 8003182 <m1ap+0x166>
m1st=motWaitingTime;
8003104: 4b25 ldr r3, [pc, #148] @ (800319c <m1ap+0x180>)
8003106: 2202 movs r2, #2
8003108: 701a strb r2, [r3, #0]
}
break;
800310a: e03a b.n 8003182 <m1ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM1stop){
800310c: 4b26 ldr r3, [pc, #152] @ (80031a8 <m1ap+0x18c>)
800310e: 881b ldrh r3, [r3, #0]
8003110: b29a uxth r2, r3
8003112: 4b2a ldr r3, [pc, #168] @ (80031bc <m1ap+0x1a0>)
8003114: 881b ldrh r3, [r3, #0]
8003116: 429a cmp r2, r3
8003118: d335 bcc.n 8003186 <m1ap+0x16a>
(void)ramp(M1,BW,m1pwmap,0,tramp,RAMPINIT);
800311a: 4b26 ldr r3, [pc, #152] @ (80031b4 <m1ap+0x198>)
800311c: 881b ldrh r3, [r3, #0]
800311e: b2da uxtb r2, r3
8003120: 4b25 ldr r3, [pc, #148] @ (80031b8 <m1ap+0x19c>)
8003122: 881b ldrh r3, [r3, #0]
8003124: b2db uxtb r3, r3
8003126: 2100 movs r1, #0
8003128: 9101 str r1, [sp, #4]
800312a: 9300 str r3, [sp, #0]
800312c: 2300 movs r3, #0
800312e: 2101 movs r1, #1
8003130: 2001 movs r0, #1
8003132: f001 f971 bl 8004418 <ramp>
m1st=motStopRamp;
8003136: 4b19 ldr r3, [pc, #100] @ (800319c <m1ap+0x180>)
8003138: 2203 movs r2, #3
800313a: 701a strb r2, [r3, #0]
}
break;
800313c: e023 b.n 8003186 <m1ap+0x16a>
case motStopRamp:
if(ramp(M1,BW,m1pwmap,0,tramp,RAMPRUN)==DONE){
800313e: 4b1d ldr r3, [pc, #116] @ (80031b4 <m1ap+0x198>)
8003140: 881b ldrh r3, [r3, #0]
8003142: b2da uxtb r2, r3
8003144: 4b1c ldr r3, [pc, #112] @ (80031b8 <m1ap+0x19c>)
8003146: 881b ldrh r3, [r3, #0]
8003148: b2db uxtb r3, r3
800314a: 210a movs r1, #10
800314c: 9101 str r1, [sp, #4]
800314e: 9300 str r3, [sp, #0]
8003150: 2300 movs r3, #0
8003152: 2101 movs r1, #1
8003154: 2001 movs r0, #1
8003156: f001 f95f bl 8004418 <ramp>
800315a: 4603 mov r3, r0
800315c: 2b00 cmp r3, #0
800315e: d114 bne.n 800318a <m1ap+0x16e>
m1st=motStop;
8003160: 4b0e ldr r3, [pc, #56] @ (800319c <m1ap+0x180>)
8003162: 2204 movs r2, #4
8003164: 701a strb r2, [r3, #0]
}
break;
8003166: e010 b.n 800318a <m1ap+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003168: 2200 movs r2, #0
800316a: 2100 movs r1, #0
800316c: 2001 movs r0, #1
800316e: f000 ffd3 bl 8004118 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003172: 2200 movs r2, #0
8003174: 2101 movs r1, #1
8003176: 2001 movs r0, #1
8003178: f000 ffce bl 8004118 <SetMotPerc>
break;
800317c: e006 b.n 800318c <m1ap+0x170>
break;
800317e: bf00 nop
8003180: e004 b.n 800318c <m1ap+0x170>
break;
8003182: bf00 nop
8003184: e002 b.n 800318c <m1ap+0x170>
break;
8003186: bf00 nop
8003188: e000 b.n 800318c <m1ap+0x170>
break;
800318a: bf00 nop
}
return m1st;
800318c: 4b03 ldr r3, [pc, #12] @ (800319c <m1ap+0x180>)
800318e: 781b ldrb r3, [r3, #0]
}
8003190: 4618 mov r0, r3
8003192: 3768 adds r7, #104 @ 0x68
8003194: 46bd mov sp, r7
8003196: bd80 pop {r7, pc}
8003198: 20000007 .word 0x20000007
800319c: 2000045a .word 0x2000045a
80031a0: 0800ead4 .word 0x0800ead4
80031a4: 200003a8 .word 0x200003a8
80031a8: 200003fc .word 0x200003fc
80031ac: 20000424 .word 0x20000424
80031b0: 20000444 .word 0x20000444
80031b4: 200003fe .word 0x200003fe
80031b8: 20000416 .word 0x20000416
80031bc: 20000426 .word 0x20000426
080031c0 <m2ap>:
motMov_st m2ap(void){
80031c0: b580 push {r7, lr}
80031c2: b09c sub sp, #112 @ 0x70
80031c4: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
80031c6: 4b5d ldr r3, [pc, #372] @ (800333c <m2ap+0x17c>)
80031c8: 781a ldrb r2, [r3, #0]
80031ca: 4b5d ldr r3, [pc, #372] @ (8003340 <m2ap+0x180>)
80031cc: 781b ldrb r3, [r3, #0]
80031ce: 429a cmp r2, r3
80031d0: d017 beq.n 8003202 <m2ap+0x42>
memm2st=m2st;
80031d2: 4b5b ldr r3, [pc, #364] @ (8003340 <m2ap+0x180>)
80031d4: 781a ldrb r2, [r3, #0]
80031d6: 4b59 ldr r3, [pc, #356] @ (800333c <m2ap+0x17c>)
80031d8: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ap=%d",m2st);
80031da: 4b59 ldr r3, [pc, #356] @ (8003340 <m2ap+0x180>)
80031dc: 781b ldrb r3, [r3, #0]
80031de: 461a mov r2, r3
80031e0: 1d3b adds r3, r7, #4
80031e2: 4958 ldr r1, [pc, #352] @ (8003344 <m2ap+0x184>)
80031e4: 4618 mov r0, r3
80031e6: f00a fdb5 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80031ea: 1d3b adds r3, r7, #4
80031ec: 4618 mov r0, r3
80031ee: f7fc ffad bl 800014c <strlen>
80031f2: 4603 mov r3, r0
80031f4: b29a uxth r2, r3
80031f6: 1d39 adds r1, r7, #4
80031f8: f04f 33ff mov.w r3, #4294967295
80031fc: 4852 ldr r0, [pc, #328] @ (8003348 <m2ap+0x188>)
80031fe: f005 ffb9 bl 8009174 <HAL_UART_Transmit>
}
if(rtCiclo<apM2start)m2st=motWaiting;
8003202: 4b52 ldr r3, [pc, #328] @ (800334c <m2ap+0x18c>)
8003204: 881b ldrh r3, [r3, #0]
8003206: b29a uxth r2, r3
8003208: 4b51 ldr r3, [pc, #324] @ (8003350 <m2ap+0x190>)
800320a: 881b ldrh r3, [r3, #0]
800320c: 429a cmp r2, r3
800320e: d202 bcs.n 8003216 <m2ap+0x56>
8003210: 4b4b ldr r3, [pc, #300] @ (8003340 <m2ap+0x180>)
8003212: 2200 movs r2, #0
8003214: 701a strb r2, [r3, #0]
switch(m2st){
8003216: 4b4a ldr r3, [pc, #296] @ (8003340 <m2ap+0x180>)
8003218: 781b ldrb r3, [r3, #0]
800321a: 2b03 cmp r3, #3
800321c: d876 bhi.n 800330c <m2ap+0x14c>
800321e: a201 add r2, pc, #4 @ (adr r2, 8003224 <m2ap+0x64>)
8003220: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003224: 08003235 .word 0x08003235
8003228: 08003281 .word 0x08003281
800322c: 080032b1 .word 0x080032b1
8003230: 080032e3 .word 0x080032e3
case motWaiting:
SetMotPerc(M2,FW,0);
8003234: 2200 movs r2, #0
8003236: 2100 movs r1, #0
8003238: 2002 movs r0, #2
800323a: f000 ff6d bl 8004118 <SetMotPerc>
SetMotPerc(M2,BW,0);
800323e: 2200 movs r2, #0
8003240: 2101 movs r1, #1
8003242: 2002 movs r0, #2
8003244: f000 ff68 bl 8004118 <SetMotPerc>
if(rtCiclo>=apM2start){
8003248: 4b40 ldr r3, [pc, #256] @ (800334c <m2ap+0x18c>)
800324a: 881b ldrh r3, [r3, #0]
800324c: b29a uxth r2, r3
800324e: 4b40 ldr r3, [pc, #256] @ (8003350 <m2ap+0x190>)
8003250: 881b ldrh r3, [r3, #0]
8003252: 429a cmp r2, r3
8003254: d365 bcc.n 8003322 <m2ap+0x162>
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT);
8003256: 4b3f ldr r3, [pc, #252] @ (8003354 <m2ap+0x194>)
8003258: 885b ldrh r3, [r3, #2]
800325a: b2da uxtb r2, r3
800325c: 4b3e ldr r3, [pc, #248] @ (8003358 <m2ap+0x198>)
800325e: 881b ldrh r3, [r3, #0]
8003260: b2d9 uxtb r1, r3
8003262: 4b3e ldr r3, [pc, #248] @ (800335c <m2ap+0x19c>)
8003264: 881b ldrh r3, [r3, #0]
8003266: b2db uxtb r3, r3
8003268: 2000 movs r0, #0
800326a: 9001 str r0, [sp, #4]
800326c: 9300 str r3, [sp, #0]
800326e: 460b mov r3, r1
8003270: 2101 movs r1, #1
8003272: 2002 movs r0, #2
8003274: f001 f8d0 bl 8004418 <ramp>
m2st=motStartRamp;
8003278: 4b31 ldr r3, [pc, #196] @ (8003340 <m2ap+0x180>)
800327a: 2201 movs r2, #1
800327c: 701a strb r2, [r3, #0]
}
break;
800327e: e050 b.n 8003322 <m2ap+0x162>
case motStartRamp:
if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){
8003280: 4b34 ldr r3, [pc, #208] @ (8003354 <m2ap+0x194>)
8003282: 885b ldrh r3, [r3, #2]
8003284: b2da uxtb r2, r3
8003286: 4b34 ldr r3, [pc, #208] @ (8003358 <m2ap+0x198>)
8003288: 881b ldrh r3, [r3, #0]
800328a: b2d9 uxtb r1, r3
800328c: 4b33 ldr r3, [pc, #204] @ (800335c <m2ap+0x19c>)
800328e: 881b ldrh r3, [r3, #0]
8003290: b2db uxtb r3, r3
8003292: 200a movs r0, #10
8003294: 9001 str r0, [sp, #4]
8003296: 9300 str r3, [sp, #0]
8003298: 460b mov r3, r1
800329a: 2101 movs r1, #1
800329c: 2002 movs r0, #2
800329e: f001 f8bb bl 8004418 <ramp>
80032a2: 4603 mov r3, r0
80032a4: 2b00 cmp r3, #0
80032a6: d13e bne.n 8003326 <m2ap+0x166>
m2st=motWaitingTime;
80032a8: 4b25 ldr r3, [pc, #148] @ (8003340 <m2ap+0x180>)
80032aa: 2202 movs r2, #2
80032ac: 701a strb r2, [r3, #0]
}
break;
80032ae: e03a b.n 8003326 <m2ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM2stop){
80032b0: 4b26 ldr r3, [pc, #152] @ (800334c <m2ap+0x18c>)
80032b2: 881b ldrh r3, [r3, #0]
80032b4: b29a uxth r2, r3
80032b6: 4b2a ldr r3, [pc, #168] @ (8003360 <m2ap+0x1a0>)
80032b8: 881b ldrh r3, [r3, #0]
80032ba: 429a cmp r2, r3
80032bc: d335 bcc.n 800332a <m2ap+0x16a>
(void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT);
80032be: 4b26 ldr r3, [pc, #152] @ (8003358 <m2ap+0x198>)
80032c0: 881b ldrh r3, [r3, #0]
80032c2: b2da uxtb r2, r3
80032c4: 4b25 ldr r3, [pc, #148] @ (800335c <m2ap+0x19c>)
80032c6: 881b ldrh r3, [r3, #0]
80032c8: b2db uxtb r3, r3
80032ca: 2100 movs r1, #0
80032cc: 9101 str r1, [sp, #4]
80032ce: 9300 str r3, [sp, #0]
80032d0: 2300 movs r3, #0
80032d2: 2101 movs r1, #1
80032d4: 2002 movs r0, #2
80032d6: f001 f89f bl 8004418 <ramp>
m2st=motStopRamp;
80032da: 4b19 ldr r3, [pc, #100] @ (8003340 <m2ap+0x180>)
80032dc: 2203 movs r2, #3
80032de: 701a strb r2, [r3, #0]
}
break;
80032e0: e023 b.n 800332a <m2ap+0x16a>
case motStopRamp:
if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){
80032e2: 4b1d ldr r3, [pc, #116] @ (8003358 <m2ap+0x198>)
80032e4: 881b ldrh r3, [r3, #0]
80032e6: b2da uxtb r2, r3
80032e8: 4b1c ldr r3, [pc, #112] @ (800335c <m2ap+0x19c>)
80032ea: 881b ldrh r3, [r3, #0]
80032ec: b2db uxtb r3, r3
80032ee: 210a movs r1, #10
80032f0: 9101 str r1, [sp, #4]
80032f2: 9300 str r3, [sp, #0]
80032f4: 2300 movs r3, #0
80032f6: 2101 movs r1, #1
80032f8: 2002 movs r0, #2
80032fa: f001 f88d bl 8004418 <ramp>
80032fe: 4603 mov r3, r0
8003300: 2b00 cmp r3, #0
8003302: d114 bne.n 800332e <m2ap+0x16e>
m2st=motStop;
8003304: 4b0e ldr r3, [pc, #56] @ (8003340 <m2ap+0x180>)
8003306: 2204 movs r2, #4
8003308: 701a strb r2, [r3, #0]
}
break;
800330a: e010 b.n 800332e <m2ap+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
800330c: 2200 movs r2, #0
800330e: 2100 movs r1, #0
8003310: 2002 movs r0, #2
8003312: f000 ff01 bl 8004118 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003316: 2200 movs r2, #0
8003318: 2101 movs r1, #1
800331a: 2002 movs r0, #2
800331c: f000 fefc bl 8004118 <SetMotPerc>
break;
8003320: e006 b.n 8003330 <m2ap+0x170>
break;
8003322: bf00 nop
8003324: e004 b.n 8003330 <m2ap+0x170>
break;
8003326: bf00 nop
8003328: e002 b.n 8003330 <m2ap+0x170>
break;
800332a: bf00 nop
800332c: e000 b.n 8003330 <m2ap+0x170>
break;
800332e: bf00 nop
}
return m2st;
8003330: 4b03 ldr r3, [pc, #12] @ (8003340 <m2ap+0x180>)
8003332: 781b ldrb r3, [r3, #0]
}
8003334: 4618 mov r0, r3
8003336: 3768 adds r7, #104 @ 0x68
8003338: 46bd mov sp, r7
800333a: bd80 pop {r7, pc}
800333c: 20000008 .word 0x20000008
8003340: 2000045b .word 0x2000045b
8003344: 0800eae0 .word 0x0800eae0
8003348: 200003a8 .word 0x200003a8
800334c: 200003fc .word 0x200003fc
8003350: 20000428 .word 0x20000428
8003354: 20000444 .word 0x20000444
8003358: 20000402 .word 0x20000402
800335c: 20000416 .word 0x20000416
8003360: 2000042a .word 0x2000042a
08003364 <m3ap>:
motMov_st m3ap(void){
8003364: b580 push {r7, lr}
8003366: b09c sub sp, #112 @ 0x70
8003368: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
800336a: 4b5d ldr r3, [pc, #372] @ (80034e0 <m3ap+0x17c>)
800336c: 781a ldrb r2, [r3, #0]
800336e: 4b5d ldr r3, [pc, #372] @ (80034e4 <m3ap+0x180>)
8003370: 781b ldrb r3, [r3, #0]
8003372: 429a cmp r2, r3
8003374: d017 beq.n 80033a6 <m3ap+0x42>
memm3st=m3st;
8003376: 4b5b ldr r3, [pc, #364] @ (80034e4 <m3ap+0x180>)
8003378: 781a ldrb r2, [r3, #0]
800337a: 4b59 ldr r3, [pc, #356] @ (80034e0 <m3ap+0x17c>)
800337c: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ap=%d",m3st);
800337e: 4b59 ldr r3, [pc, #356] @ (80034e4 <m3ap+0x180>)
8003380: 781b ldrb r3, [r3, #0]
8003382: 461a mov r2, r3
8003384: 1d3b adds r3, r7, #4
8003386: 4958 ldr r1, [pc, #352] @ (80034e8 <m3ap+0x184>)
8003388: 4618 mov r0, r3
800338a: f00a fce3 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800338e: 1d3b adds r3, r7, #4
8003390: 4618 mov r0, r3
8003392: f7fc fedb bl 800014c <strlen>
8003396: 4603 mov r3, r0
8003398: b29a uxth r2, r3
800339a: 1d39 adds r1, r7, #4
800339c: f04f 33ff mov.w r3, #4294967295
80033a0: 4852 ldr r0, [pc, #328] @ (80034ec <m3ap+0x188>)
80033a2: f005 fee7 bl 8009174 <HAL_UART_Transmit>
}
if(rtCiclo<apM3start)m3st=motWaiting;
80033a6: 4b52 ldr r3, [pc, #328] @ (80034f0 <m3ap+0x18c>)
80033a8: 881b ldrh r3, [r3, #0]
80033aa: b29a uxth r2, r3
80033ac: 4b51 ldr r3, [pc, #324] @ (80034f4 <m3ap+0x190>)
80033ae: 881b ldrh r3, [r3, #0]
80033b0: 429a cmp r2, r3
80033b2: d202 bcs.n 80033ba <m3ap+0x56>
80033b4: 4b4b ldr r3, [pc, #300] @ (80034e4 <m3ap+0x180>)
80033b6: 2200 movs r2, #0
80033b8: 701a strb r2, [r3, #0]
switch(m3st){
80033ba: 4b4a ldr r3, [pc, #296] @ (80034e4 <m3ap+0x180>)
80033bc: 781b ldrb r3, [r3, #0]
80033be: 2b03 cmp r3, #3
80033c0: d876 bhi.n 80034b0 <m3ap+0x14c>
80033c2: a201 add r2, pc, #4 @ (adr r2, 80033c8 <m3ap+0x64>)
80033c4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80033c8: 080033d9 .word 0x080033d9
80033cc: 08003425 .word 0x08003425
80033d0: 08003455 .word 0x08003455
80033d4: 08003487 .word 0x08003487
case motWaiting:
SetMotPerc(M3,FW,0);
80033d8: 2200 movs r2, #0
80033da: 2100 movs r1, #0
80033dc: 2003 movs r0, #3
80033de: f000 fe9b bl 8004118 <SetMotPerc>
SetMotPerc(M3,BW,0);
80033e2: 2200 movs r2, #0
80033e4: 2101 movs r1, #1
80033e6: 2003 movs r0, #3
80033e8: f000 fe96 bl 8004118 <SetMotPerc>
if(rtCiclo>=apM3start){
80033ec: 4b40 ldr r3, [pc, #256] @ (80034f0 <m3ap+0x18c>)
80033ee: 881b ldrh r3, [r3, #0]
80033f0: b29a uxth r2, r3
80033f2: 4b40 ldr r3, [pc, #256] @ (80034f4 <m3ap+0x190>)
80033f4: 881b ldrh r3, [r3, #0]
80033f6: 429a cmp r2, r3
80033f8: d365 bcc.n 80034c6 <m3ap+0x162>
(void)ramp(M3,BW,mrampstart[M3-1],m2pwmap,tramp,RAMPINIT);
80033fa: 4b3f ldr r3, [pc, #252] @ (80034f8 <m3ap+0x194>)
80033fc: 889b ldrh r3, [r3, #4]
80033fe: b2da uxtb r2, r3
8003400: 4b3e ldr r3, [pc, #248] @ (80034fc <m3ap+0x198>)
8003402: 881b ldrh r3, [r3, #0]
8003404: b2d9 uxtb r1, r3
8003406: 4b3e ldr r3, [pc, #248] @ (8003500 <m3ap+0x19c>)
8003408: 881b ldrh r3, [r3, #0]
800340a: b2db uxtb r3, r3
800340c: 2000 movs r0, #0
800340e: 9001 str r0, [sp, #4]
8003410: 9300 str r3, [sp, #0]
8003412: 460b mov r3, r1
8003414: 2101 movs r1, #1
8003416: 2003 movs r0, #3
8003418: f000 fffe bl 8004418 <ramp>
m3st=motStartRamp;
800341c: 4b31 ldr r3, [pc, #196] @ (80034e4 <m3ap+0x180>)
800341e: 2201 movs r2, #1
8003420: 701a strb r2, [r3, #0]
}
break;
8003422: e050 b.n 80034c6 <m3ap+0x162>
case motStartRamp:
if(ramp(M3,BW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){
8003424: 4b34 ldr r3, [pc, #208] @ (80034f8 <m3ap+0x194>)
8003426: 889b ldrh r3, [r3, #4]
8003428: b2da uxtb r2, r3
800342a: 4b36 ldr r3, [pc, #216] @ (8003504 <m3ap+0x1a0>)
800342c: 881b ldrh r3, [r3, #0]
800342e: b2d9 uxtb r1, r3
8003430: 4b33 ldr r3, [pc, #204] @ (8003500 <m3ap+0x19c>)
8003432: 881b ldrh r3, [r3, #0]
8003434: b2db uxtb r3, r3
8003436: 200a movs r0, #10
8003438: 9001 str r0, [sp, #4]
800343a: 9300 str r3, [sp, #0]
800343c: 460b mov r3, r1
800343e: 2101 movs r1, #1
8003440: 2003 movs r0, #3
8003442: f000 ffe9 bl 8004418 <ramp>
8003446: 4603 mov r3, r0
8003448: 2b00 cmp r3, #0
800344a: d13e bne.n 80034ca <m3ap+0x166>
m3st=motWaitingTime;
800344c: 4b25 ldr r3, [pc, #148] @ (80034e4 <m3ap+0x180>)
800344e: 2202 movs r2, #2
8003450: 701a strb r2, [r3, #0]
}
break;
8003452: e03a b.n 80034ca <m3ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM3stop){
8003454: 4b26 ldr r3, [pc, #152] @ (80034f0 <m3ap+0x18c>)
8003456: 881b ldrh r3, [r3, #0]
8003458: b29a uxth r2, r3
800345a: 4b2b ldr r3, [pc, #172] @ (8003508 <m3ap+0x1a4>)
800345c: 881b ldrh r3, [r3, #0]
800345e: 429a cmp r2, r3
8003460: d335 bcc.n 80034ce <m3ap+0x16a>
(void)ramp(M3,BW,m3pwmap,0,tramp,RAMPINIT);
8003462: 4b28 ldr r3, [pc, #160] @ (8003504 <m3ap+0x1a0>)
8003464: 881b ldrh r3, [r3, #0]
8003466: b2da uxtb r2, r3
8003468: 4b25 ldr r3, [pc, #148] @ (8003500 <m3ap+0x19c>)
800346a: 881b ldrh r3, [r3, #0]
800346c: b2db uxtb r3, r3
800346e: 2100 movs r1, #0
8003470: 9101 str r1, [sp, #4]
8003472: 9300 str r3, [sp, #0]
8003474: 2300 movs r3, #0
8003476: 2101 movs r1, #1
8003478: 2003 movs r0, #3
800347a: f000 ffcd bl 8004418 <ramp>
m3st=motStopRamp;
800347e: 4b19 ldr r3, [pc, #100] @ (80034e4 <m3ap+0x180>)
8003480: 2203 movs r2, #3
8003482: 701a strb r2, [r3, #0]
}
break;
8003484: e023 b.n 80034ce <m3ap+0x16a>
case motStopRamp:
if(ramp(M3,BW,m3pwmap,0,tramp,RAMPRUN)==DONE){
8003486: 4b1f ldr r3, [pc, #124] @ (8003504 <m3ap+0x1a0>)
8003488: 881b ldrh r3, [r3, #0]
800348a: b2da uxtb r2, r3
800348c: 4b1c ldr r3, [pc, #112] @ (8003500 <m3ap+0x19c>)
800348e: 881b ldrh r3, [r3, #0]
8003490: b2db uxtb r3, r3
8003492: 210a movs r1, #10
8003494: 9101 str r1, [sp, #4]
8003496: 9300 str r3, [sp, #0]
8003498: 2300 movs r3, #0
800349a: 2101 movs r1, #1
800349c: 2003 movs r0, #3
800349e: f000 ffbb bl 8004418 <ramp>
80034a2: 4603 mov r3, r0
80034a4: 2b00 cmp r3, #0
80034a6: d114 bne.n 80034d2 <m3ap+0x16e>
m3st=motStop;
80034a8: 4b0e ldr r3, [pc, #56] @ (80034e4 <m3ap+0x180>)
80034aa: 2204 movs r2, #4
80034ac: 701a strb r2, [r3, #0]
}
break;
80034ae: e010 b.n 80034d2 <m3ap+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
80034b0: 2200 movs r2, #0
80034b2: 2100 movs r1, #0
80034b4: 2003 movs r0, #3
80034b6: f000 fe2f bl 8004118 <SetMotPerc>
SetMotPerc(M3,BW,0);
80034ba: 2200 movs r2, #0
80034bc: 2101 movs r1, #1
80034be: 2003 movs r0, #3
80034c0: f000 fe2a bl 8004118 <SetMotPerc>
break;
80034c4: e006 b.n 80034d4 <m3ap+0x170>
break;
80034c6: bf00 nop
80034c8: e004 b.n 80034d4 <m3ap+0x170>
break;
80034ca: bf00 nop
80034cc: e002 b.n 80034d4 <m3ap+0x170>
break;
80034ce: bf00 nop
80034d0: e000 b.n 80034d4 <m3ap+0x170>
break;
80034d2: bf00 nop
}
return m3st;
80034d4: 4b03 ldr r3, [pc, #12] @ (80034e4 <m3ap+0x180>)
80034d6: 781b ldrb r3, [r3, #0]
}
80034d8: 4618 mov r0, r3
80034da: 3768 adds r7, #104 @ 0x68
80034dc: 46bd mov sp, r7
80034de: bd80 pop {r7, pc}
80034e0: 20000009 .word 0x20000009
80034e4: 2000045c .word 0x2000045c
80034e8: 0800eaec .word 0x0800eaec
80034ec: 200003a8 .word 0x200003a8
80034f0: 200003fc .word 0x200003fc
80034f4: 2000042c .word 0x2000042c
80034f8: 20000444 .word 0x20000444
80034fc: 20000402 .word 0x20000402
8003500: 20000416 .word 0x20000416
8003504: 20000406 .word 0x20000406
8003508: 2000042e .word 0x2000042e
0800350c <m4ap>:
motMov_st m4ap(void){
800350c: b580 push {r7, lr}
800350e: b09c sub sp, #112 @ 0x70
8003510: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8003512: 4b5d ldr r3, [pc, #372] @ (8003688 <m4ap+0x17c>)
8003514: 781a ldrb r2, [r3, #0]
8003516: 4b5d ldr r3, [pc, #372] @ (800368c <m4ap+0x180>)
8003518: 781b ldrb r3, [r3, #0]
800351a: 429a cmp r2, r3
800351c: d017 beq.n 800354e <m4ap+0x42>
memm4st=m4st;
800351e: 4b5b ldr r3, [pc, #364] @ (800368c <m4ap+0x180>)
8003520: 781a ldrb r2, [r3, #0]
8003522: 4b59 ldr r3, [pc, #356] @ (8003688 <m4ap+0x17c>)
8003524: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ap=%d",m4st);
8003526: 4b59 ldr r3, [pc, #356] @ (800368c <m4ap+0x180>)
8003528: 781b ldrb r3, [r3, #0]
800352a: 461a mov r2, r3
800352c: 1d3b adds r3, r7, #4
800352e: 4958 ldr r1, [pc, #352] @ (8003690 <m4ap+0x184>)
8003530: 4618 mov r0, r3
8003532: f00a fc0f bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003536: 1d3b adds r3, r7, #4
8003538: 4618 mov r0, r3
800353a: f7fc fe07 bl 800014c <strlen>
800353e: 4603 mov r3, r0
8003540: b29a uxth r2, r3
8003542: 1d39 adds r1, r7, #4
8003544: f04f 33ff mov.w r3, #4294967295
8003548: 4852 ldr r0, [pc, #328] @ (8003694 <m4ap+0x188>)
800354a: f005 fe13 bl 8009174 <HAL_UART_Transmit>
}
if(rtCiclo<apM4start)m4st=motWaiting;
800354e: 4b52 ldr r3, [pc, #328] @ (8003698 <m4ap+0x18c>)
8003550: 881b ldrh r3, [r3, #0]
8003552: b29a uxth r2, r3
8003554: 4b51 ldr r3, [pc, #324] @ (800369c <m4ap+0x190>)
8003556: 881b ldrh r3, [r3, #0]
8003558: 429a cmp r2, r3
800355a: d202 bcs.n 8003562 <m4ap+0x56>
800355c: 4b4b ldr r3, [pc, #300] @ (800368c <m4ap+0x180>)
800355e: 2200 movs r2, #0
8003560: 701a strb r2, [r3, #0]
switch(m4st){
8003562: 4b4a ldr r3, [pc, #296] @ (800368c <m4ap+0x180>)
8003564: 781b ldrb r3, [r3, #0]
8003566: 2b03 cmp r3, #3
8003568: d876 bhi.n 8003658 <m4ap+0x14c>
800356a: a201 add r2, pc, #4 @ (adr r2, 8003570 <m4ap+0x64>)
800356c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003570: 08003581 .word 0x08003581
8003574: 080035cd .word 0x080035cd
8003578: 080035fd .word 0x080035fd
800357c: 0800362f .word 0x0800362f
case motWaiting:
SetMotPerc(M4,FW,0);
8003580: 2200 movs r2, #0
8003582: 2100 movs r1, #0
8003584: 2004 movs r0, #4
8003586: f000 fdc7 bl 8004118 <SetMotPerc>
SetMotPerc(M4,BW,0);
800358a: 2200 movs r2, #0
800358c: 2101 movs r1, #1
800358e: 2004 movs r0, #4
8003590: f000 fdc2 bl 8004118 <SetMotPerc>
if(rtCiclo>=apM4start){
8003594: 4b40 ldr r3, [pc, #256] @ (8003698 <m4ap+0x18c>)
8003596: 881b ldrh r3, [r3, #0]
8003598: b29a uxth r2, r3
800359a: 4b40 ldr r3, [pc, #256] @ (800369c <m4ap+0x190>)
800359c: 881b ldrh r3, [r3, #0]
800359e: 429a cmp r2, r3
80035a0: d365 bcc.n 800366e <m4ap+0x162>
(void)ramp(M4,BW,mrampstart[M4-1],m2pwmap,tramp,RAMPINIT);
80035a2: 4b3f ldr r3, [pc, #252] @ (80036a0 <m4ap+0x194>)
80035a4: 88db ldrh r3, [r3, #6]
80035a6: b2da uxtb r2, r3
80035a8: 4b3e ldr r3, [pc, #248] @ (80036a4 <m4ap+0x198>)
80035aa: 881b ldrh r3, [r3, #0]
80035ac: b2d9 uxtb r1, r3
80035ae: 4b3e ldr r3, [pc, #248] @ (80036a8 <m4ap+0x19c>)
80035b0: 881b ldrh r3, [r3, #0]
80035b2: b2db uxtb r3, r3
80035b4: 2000 movs r0, #0
80035b6: 9001 str r0, [sp, #4]
80035b8: 9300 str r3, [sp, #0]
80035ba: 460b mov r3, r1
80035bc: 2101 movs r1, #1
80035be: 2004 movs r0, #4
80035c0: f000 ff2a bl 8004418 <ramp>
m4st=motStartRamp;
80035c4: 4b31 ldr r3, [pc, #196] @ (800368c <m4ap+0x180>)
80035c6: 2201 movs r2, #1
80035c8: 701a strb r2, [r3, #0]
}
break;
80035ca: e050 b.n 800366e <m4ap+0x162>
case motStartRamp:
if(ramp(M4,BW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){
80035cc: 4b34 ldr r3, [pc, #208] @ (80036a0 <m4ap+0x194>)
80035ce: 88db ldrh r3, [r3, #6]
80035d0: b2da uxtb r2, r3
80035d2: 4b36 ldr r3, [pc, #216] @ (80036ac <m4ap+0x1a0>)
80035d4: 881b ldrh r3, [r3, #0]
80035d6: b2d9 uxtb r1, r3
80035d8: 4b33 ldr r3, [pc, #204] @ (80036a8 <m4ap+0x19c>)
80035da: 881b ldrh r3, [r3, #0]
80035dc: b2db uxtb r3, r3
80035de: 200a movs r0, #10
80035e0: 9001 str r0, [sp, #4]
80035e2: 9300 str r3, [sp, #0]
80035e4: 460b mov r3, r1
80035e6: 2101 movs r1, #1
80035e8: 2004 movs r0, #4
80035ea: f000 ff15 bl 8004418 <ramp>
80035ee: 4603 mov r3, r0
80035f0: 2b00 cmp r3, #0
80035f2: d13e bne.n 8003672 <m4ap+0x166>
m4st=motWaitingTime;
80035f4: 4b25 ldr r3, [pc, #148] @ (800368c <m4ap+0x180>)
80035f6: 2202 movs r2, #2
80035f8: 701a strb r2, [r3, #0]
}
break;
80035fa: e03a b.n 8003672 <m4ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM4stop){
80035fc: 4b26 ldr r3, [pc, #152] @ (8003698 <m4ap+0x18c>)
80035fe: 881b ldrh r3, [r3, #0]
8003600: b29a uxth r2, r3
8003602: 4b2b ldr r3, [pc, #172] @ (80036b0 <m4ap+0x1a4>)
8003604: 881b ldrh r3, [r3, #0]
8003606: 429a cmp r2, r3
8003608: d335 bcc.n 8003676 <m4ap+0x16a>
(void)ramp(M4,BW,m4pwmap,0,tramp,RAMPINIT);
800360a: 4b28 ldr r3, [pc, #160] @ (80036ac <m4ap+0x1a0>)
800360c: 881b ldrh r3, [r3, #0]
800360e: b2da uxtb r2, r3
8003610: 4b25 ldr r3, [pc, #148] @ (80036a8 <m4ap+0x19c>)
8003612: 881b ldrh r3, [r3, #0]
8003614: b2db uxtb r3, r3
8003616: 2100 movs r1, #0
8003618: 9101 str r1, [sp, #4]
800361a: 9300 str r3, [sp, #0]
800361c: 2300 movs r3, #0
800361e: 2101 movs r1, #1
8003620: 2004 movs r0, #4
8003622: f000 fef9 bl 8004418 <ramp>
m4st=motStopRamp;
8003626: 4b19 ldr r3, [pc, #100] @ (800368c <m4ap+0x180>)
8003628: 2203 movs r2, #3
800362a: 701a strb r2, [r3, #0]
}
break;
800362c: e023 b.n 8003676 <m4ap+0x16a>
case motStopRamp:
if(ramp(M4,BW,m4pwmap,0,tramp,RAMPRUN)==DONE){
800362e: 4b1f ldr r3, [pc, #124] @ (80036ac <m4ap+0x1a0>)
8003630: 881b ldrh r3, [r3, #0]
8003632: b2da uxtb r2, r3
8003634: 4b1c ldr r3, [pc, #112] @ (80036a8 <m4ap+0x19c>)
8003636: 881b ldrh r3, [r3, #0]
8003638: b2db uxtb r3, r3
800363a: 210a movs r1, #10
800363c: 9101 str r1, [sp, #4]
800363e: 9300 str r3, [sp, #0]
8003640: 2300 movs r3, #0
8003642: 2101 movs r1, #1
8003644: 2004 movs r0, #4
8003646: f000 fee7 bl 8004418 <ramp>
800364a: 4603 mov r3, r0
800364c: 2b00 cmp r3, #0
800364e: d114 bne.n 800367a <m4ap+0x16e>
m4st=motStop;
8003650: 4b0e ldr r3, [pc, #56] @ (800368c <m4ap+0x180>)
8003652: 2204 movs r2, #4
8003654: 701a strb r2, [r3, #0]
}
break;
8003656: e010 b.n 800367a <m4ap+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003658: 2200 movs r2, #0
800365a: 2100 movs r1, #0
800365c: 2004 movs r0, #4
800365e: f000 fd5b bl 8004118 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003662: 2200 movs r2, #0
8003664: 2101 movs r1, #1
8003666: 2004 movs r0, #4
8003668: f000 fd56 bl 8004118 <SetMotPerc>
break;
800366c: e006 b.n 800367c <m4ap+0x170>
break;
800366e: bf00 nop
8003670: e004 b.n 800367c <m4ap+0x170>
break;
8003672: bf00 nop
8003674: e002 b.n 800367c <m4ap+0x170>
break;
8003676: bf00 nop
8003678: e000 b.n 800367c <m4ap+0x170>
break;
800367a: bf00 nop
}
return m4st;
800367c: 4b03 ldr r3, [pc, #12] @ (800368c <m4ap+0x180>)
800367e: 781b ldrb r3, [r3, #0]
}
8003680: 4618 mov r0, r3
8003682: 3768 adds r7, #104 @ 0x68
8003684: 46bd mov sp, r7
8003686: bd80 pop {r7, pc}
8003688: 2000000a .word 0x2000000a
800368c: 2000045d .word 0x2000045d
8003690: 0800eaf8 .word 0x0800eaf8
8003694: 200003a8 .word 0x200003a8
8003698: 200003fc .word 0x200003fc
800369c: 20000430 .word 0x20000430
80036a0: 20000444 .word 0x20000444
80036a4: 20000402 .word 0x20000402
80036a8: 20000416 .word 0x20000416
80036ac: 2000040a .word 0x2000040a
80036b0: 20000432 .word 0x20000432
080036b4 <m1ch>:
motMov_st m1ch(void){
80036b4: b580 push {r7, lr}
80036b6: b09c sub sp, #112 @ 0x70
80036b8: af02 add r7, sp, #8
static motMov_st m1st;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
80036ba: 4b5d ldr r3, [pc, #372] @ (8003830 <m1ch+0x17c>)
80036bc: 781a ldrb r2, [r3, #0]
80036be: 4b5d ldr r3, [pc, #372] @ (8003834 <m1ch+0x180>)
80036c0: 781b ldrb r3, [r3, #0]
80036c2: 429a cmp r2, r3
80036c4: d017 beq.n 80036f6 <m1ch+0x42>
memm1st=m1st;
80036c6: 4b5b ldr r3, [pc, #364] @ (8003834 <m1ch+0x180>)
80036c8: 781a ldrb r2, [r3, #0]
80036ca: 4b59 ldr r3, [pc, #356] @ (8003830 <m1ch+0x17c>)
80036cc: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ch=%d",m1st);
80036ce: 4b59 ldr r3, [pc, #356] @ (8003834 <m1ch+0x180>)
80036d0: 781b ldrb r3, [r3, #0]
80036d2: 461a mov r2, r3
80036d4: 1d3b adds r3, r7, #4
80036d6: 4958 ldr r1, [pc, #352] @ (8003838 <m1ch+0x184>)
80036d8: 4618 mov r0, r3
80036da: f00a fb3b bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80036de: 1d3b adds r3, r7, #4
80036e0: 4618 mov r0, r3
80036e2: f7fc fd33 bl 800014c <strlen>
80036e6: 4603 mov r3, r0
80036e8: b29a uxth r2, r3
80036ea: 1d39 adds r1, r7, #4
80036ec: f04f 33ff mov.w r3, #4294967295
80036f0: 4852 ldr r0, [pc, #328] @ (800383c <m1ch+0x188>)
80036f2: f005 fd3f bl 8009174 <HAL_UART_Transmit>
}
if(rtCiclo<chM1start)m1st=motWaiting;
80036f6: 4b52 ldr r3, [pc, #328] @ (8003840 <m1ch+0x18c>)
80036f8: 881b ldrh r3, [r3, #0]
80036fa: b29a uxth r2, r3
80036fc: 4b51 ldr r3, [pc, #324] @ (8003844 <m1ch+0x190>)
80036fe: 881b ldrh r3, [r3, #0]
8003700: 429a cmp r2, r3
8003702: d202 bcs.n 800370a <m1ch+0x56>
8003704: 4b4b ldr r3, [pc, #300] @ (8003834 <m1ch+0x180>)
8003706: 2200 movs r2, #0
8003708: 701a strb r2, [r3, #0]
switch(m1st){
800370a: 4b4a ldr r3, [pc, #296] @ (8003834 <m1ch+0x180>)
800370c: 781b ldrb r3, [r3, #0]
800370e: 2b03 cmp r3, #3
8003710: d876 bhi.n 8003800 <m1ch+0x14c>
8003712: a201 add r2, pc, #4 @ (adr r2, 8003718 <m1ch+0x64>)
8003714: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003718: 08003729 .word 0x08003729
800371c: 08003775 .word 0x08003775
8003720: 080037a5 .word 0x080037a5
8003724: 080037d7 .word 0x080037d7
case motWaiting:
SetMotPerc(M1,FW,0);
8003728: 2200 movs r2, #0
800372a: 2100 movs r1, #0
800372c: 2001 movs r0, #1
800372e: f000 fcf3 bl 8004118 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003732: 2200 movs r2, #0
8003734: 2101 movs r1, #1
8003736: 2001 movs r0, #1
8003738: f000 fcee bl 8004118 <SetMotPerc>
if(rtCiclo>=chM1start){
800373c: 4b40 ldr r3, [pc, #256] @ (8003840 <m1ch+0x18c>)
800373e: 881b ldrh r3, [r3, #0]
8003740: b29a uxth r2, r3
8003742: 4b40 ldr r3, [pc, #256] @ (8003844 <m1ch+0x190>)
8003744: 881b ldrh r3, [r3, #0]
8003746: 429a cmp r2, r3
8003748: d365 bcc.n 8003816 <m1ch+0x162>
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
800374a: 4b3f ldr r3, [pc, #252] @ (8003848 <m1ch+0x194>)
800374c: 881b ldrh r3, [r3, #0]
800374e: b2da uxtb r2, r3
8003750: 4b3e ldr r3, [pc, #248] @ (800384c <m1ch+0x198>)
8003752: 881b ldrh r3, [r3, #0]
8003754: b2d9 uxtb r1, r3
8003756: 4b3e ldr r3, [pc, #248] @ (8003850 <m1ch+0x19c>)
8003758: 881b ldrh r3, [r3, #0]
800375a: b2db uxtb r3, r3
800375c: 2000 movs r0, #0
800375e: 9001 str r0, [sp, #4]
8003760: 9300 str r3, [sp, #0]
8003762: 460b mov r3, r1
8003764: 2100 movs r1, #0
8003766: 2001 movs r0, #1
8003768: f000 fe56 bl 8004418 <ramp>
m1st=motStartRamp;
800376c: 4b31 ldr r3, [pc, #196] @ (8003834 <m1ch+0x180>)
800376e: 2201 movs r2, #1
8003770: 701a strb r2, [r3, #0]
}
break;
8003772: e050 b.n 8003816 <m1ch+0x162>
case motStartRamp:
if(ramp(M1,FW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){
8003774: 4b34 ldr r3, [pc, #208] @ (8003848 <m1ch+0x194>)
8003776: 881b ldrh r3, [r3, #0]
8003778: b2da uxtb r2, r3
800377a: 4b34 ldr r3, [pc, #208] @ (800384c <m1ch+0x198>)
800377c: 881b ldrh r3, [r3, #0]
800377e: b2d9 uxtb r1, r3
8003780: 4b33 ldr r3, [pc, #204] @ (8003850 <m1ch+0x19c>)
8003782: 881b ldrh r3, [r3, #0]
8003784: b2db uxtb r3, r3
8003786: 200a movs r0, #10
8003788: 9001 str r0, [sp, #4]
800378a: 9300 str r3, [sp, #0]
800378c: 460b mov r3, r1
800378e: 2100 movs r1, #0
8003790: 2001 movs r0, #1
8003792: f000 fe41 bl 8004418 <ramp>
8003796: 4603 mov r3, r0
8003798: 2b00 cmp r3, #0
800379a: d13e bne.n 800381a <m1ch+0x166>
m1st=motWaitingTime;
800379c: 4b25 ldr r3, [pc, #148] @ (8003834 <m1ch+0x180>)
800379e: 2202 movs r2, #2
80037a0: 701a strb r2, [r3, #0]
}
break;
80037a2: e03a b.n 800381a <m1ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM1stop){
80037a4: 4b26 ldr r3, [pc, #152] @ (8003840 <m1ch+0x18c>)
80037a6: 881b ldrh r3, [r3, #0]
80037a8: b29a uxth r2, r3
80037aa: 4b2a ldr r3, [pc, #168] @ (8003854 <m1ch+0x1a0>)
80037ac: 881b ldrh r3, [r3, #0]
80037ae: 429a cmp r2, r3
80037b0: d335 bcc.n 800381e <m1ch+0x16a>
(void)ramp(M1,FW,m1pwmch,0,tramp,RAMPINIT);
80037b2: 4b26 ldr r3, [pc, #152] @ (800384c <m1ch+0x198>)
80037b4: 881b ldrh r3, [r3, #0]
80037b6: b2da uxtb r2, r3
80037b8: 4b25 ldr r3, [pc, #148] @ (8003850 <m1ch+0x19c>)
80037ba: 881b ldrh r3, [r3, #0]
80037bc: b2db uxtb r3, r3
80037be: 2100 movs r1, #0
80037c0: 9101 str r1, [sp, #4]
80037c2: 9300 str r3, [sp, #0]
80037c4: 2300 movs r3, #0
80037c6: 2100 movs r1, #0
80037c8: 2001 movs r0, #1
80037ca: f000 fe25 bl 8004418 <ramp>
m1st=motStopRamp;
80037ce: 4b19 ldr r3, [pc, #100] @ (8003834 <m1ch+0x180>)
80037d0: 2203 movs r2, #3
80037d2: 701a strb r2, [r3, #0]
}
break;
80037d4: e023 b.n 800381e <m1ch+0x16a>
case motStopRamp:
if(ramp(M1,FW,m1pwmch,0,tramp,RAMPRUN)==DONE){
80037d6: 4b1d ldr r3, [pc, #116] @ (800384c <m1ch+0x198>)
80037d8: 881b ldrh r3, [r3, #0]
80037da: b2da uxtb r2, r3
80037dc: 4b1c ldr r3, [pc, #112] @ (8003850 <m1ch+0x19c>)
80037de: 881b ldrh r3, [r3, #0]
80037e0: b2db uxtb r3, r3
80037e2: 210a movs r1, #10
80037e4: 9101 str r1, [sp, #4]
80037e6: 9300 str r3, [sp, #0]
80037e8: 2300 movs r3, #0
80037ea: 2100 movs r1, #0
80037ec: 2001 movs r0, #1
80037ee: f000 fe13 bl 8004418 <ramp>
80037f2: 4603 mov r3, r0
80037f4: 2b00 cmp r3, #0
80037f6: d114 bne.n 8003822 <m1ch+0x16e>
m1st=motStop;
80037f8: 4b0e ldr r3, [pc, #56] @ (8003834 <m1ch+0x180>)
80037fa: 2204 movs r2, #4
80037fc: 701a strb r2, [r3, #0]
}
break;
80037fe: e010 b.n 8003822 <m1ch+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003800: 2200 movs r2, #0
8003802: 2100 movs r1, #0
8003804: 2001 movs r0, #1
8003806: f000 fc87 bl 8004118 <SetMotPerc>
SetMotPerc(M1,BW,0);
800380a: 2200 movs r2, #0
800380c: 2101 movs r1, #1
800380e: 2001 movs r0, #1
8003810: f000 fc82 bl 8004118 <SetMotPerc>
break;
8003814: e006 b.n 8003824 <m1ch+0x170>
break;
8003816: bf00 nop
8003818: e004 b.n 8003824 <m1ch+0x170>
break;
800381a: bf00 nop
800381c: e002 b.n 8003824 <m1ch+0x170>
break;
800381e: bf00 nop
8003820: e000 b.n 8003824 <m1ch+0x170>
break;
8003822: bf00 nop
}
return m1st;
8003824: 4b03 ldr r3, [pc, #12] @ (8003834 <m1ch+0x180>)
8003826: 781b ldrb r3, [r3, #0]
}
8003828: 4618 mov r0, r3
800382a: 3768 adds r7, #104 @ 0x68
800382c: 46bd mov sp, r7
800382e: bd80 pop {r7, pc}
8003830: 2000000b .word 0x2000000b
8003834: 2000045e .word 0x2000045e
8003838: 0800eb04 .word 0x0800eb04
800383c: 200003a8 .word 0x200003a8
8003840: 200003fc .word 0x200003fc
8003844: 20000434 .word 0x20000434
8003848: 20000444 .word 0x20000444
800384c: 20000400 .word 0x20000400
8003850: 20000416 .word 0x20000416
8003854: 20000436 .word 0x20000436
08003858 <m2ch>:
motMov_st m2ch(void){
8003858: b580 push {r7, lr}
800385a: b09c sub sp, #112 @ 0x70
800385c: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
800385e: 4b5d ldr r3, [pc, #372] @ (80039d4 <m2ch+0x17c>)
8003860: 781a ldrb r2, [r3, #0]
8003862: 4b5d ldr r3, [pc, #372] @ (80039d8 <m2ch+0x180>)
8003864: 781b ldrb r3, [r3, #0]
8003866: 429a cmp r2, r3
8003868: d017 beq.n 800389a <m2ch+0x42>
memm2st=m2st;
800386a: 4b5b ldr r3, [pc, #364] @ (80039d8 <m2ch+0x180>)
800386c: 781a ldrb r2, [r3, #0]
800386e: 4b59 ldr r3, [pc, #356] @ (80039d4 <m2ch+0x17c>)
8003870: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ch=%d",m2st);
8003872: 4b59 ldr r3, [pc, #356] @ (80039d8 <m2ch+0x180>)
8003874: 781b ldrb r3, [r3, #0]
8003876: 461a mov r2, r3
8003878: 1d3b adds r3, r7, #4
800387a: 4958 ldr r1, [pc, #352] @ (80039dc <m2ch+0x184>)
800387c: 4618 mov r0, r3
800387e: f00a fa69 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003882: 1d3b adds r3, r7, #4
8003884: 4618 mov r0, r3
8003886: f7fc fc61 bl 800014c <strlen>
800388a: 4603 mov r3, r0
800388c: b29a uxth r2, r3
800388e: 1d39 adds r1, r7, #4
8003890: f04f 33ff mov.w r3, #4294967295
8003894: 4852 ldr r0, [pc, #328] @ (80039e0 <m2ch+0x188>)
8003896: f005 fc6d bl 8009174 <HAL_UART_Transmit>
}
if(rtCiclo<chM2start)m2st=motWaiting;
800389a: 4b52 ldr r3, [pc, #328] @ (80039e4 <m2ch+0x18c>)
800389c: 881b ldrh r3, [r3, #0]
800389e: b29a uxth r2, r3
80038a0: 4b51 ldr r3, [pc, #324] @ (80039e8 <m2ch+0x190>)
80038a2: 881b ldrh r3, [r3, #0]
80038a4: 429a cmp r2, r3
80038a6: d202 bcs.n 80038ae <m2ch+0x56>
80038a8: 4b4b ldr r3, [pc, #300] @ (80039d8 <m2ch+0x180>)
80038aa: 2200 movs r2, #0
80038ac: 701a strb r2, [r3, #0]
switch(m2st){
80038ae: 4b4a ldr r3, [pc, #296] @ (80039d8 <m2ch+0x180>)
80038b0: 781b ldrb r3, [r3, #0]
80038b2: 2b03 cmp r3, #3
80038b4: d876 bhi.n 80039a4 <m2ch+0x14c>
80038b6: a201 add r2, pc, #4 @ (adr r2, 80038bc <m2ch+0x64>)
80038b8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80038bc: 080038cd .word 0x080038cd
80038c0: 08003919 .word 0x08003919
80038c4: 08003949 .word 0x08003949
80038c8: 0800397b .word 0x0800397b
case motWaiting:
SetMotPerc(M2,FW,0);
80038cc: 2200 movs r2, #0
80038ce: 2100 movs r1, #0
80038d0: 2002 movs r0, #2
80038d2: f000 fc21 bl 8004118 <SetMotPerc>
SetMotPerc(M2,BW,0);
80038d6: 2200 movs r2, #0
80038d8: 2101 movs r1, #1
80038da: 2002 movs r0, #2
80038dc: f000 fc1c bl 8004118 <SetMotPerc>
if(rtCiclo>=chM2start){
80038e0: 4b40 ldr r3, [pc, #256] @ (80039e4 <m2ch+0x18c>)
80038e2: 881b ldrh r3, [r3, #0]
80038e4: b29a uxth r2, r3
80038e6: 4b40 ldr r3, [pc, #256] @ (80039e8 <m2ch+0x190>)
80038e8: 881b ldrh r3, [r3, #0]
80038ea: 429a cmp r2, r3
80038ec: d365 bcc.n 80039ba <m2ch+0x162>
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT);
80038ee: 4b3f ldr r3, [pc, #252] @ (80039ec <m2ch+0x194>)
80038f0: 885b ldrh r3, [r3, #2]
80038f2: b2da uxtb r2, r3
80038f4: 4b3e ldr r3, [pc, #248] @ (80039f0 <m2ch+0x198>)
80038f6: 881b ldrh r3, [r3, #0]
80038f8: b2d9 uxtb r1, r3
80038fa: 4b3e ldr r3, [pc, #248] @ (80039f4 <m2ch+0x19c>)
80038fc: 881b ldrh r3, [r3, #0]
80038fe: b2db uxtb r3, r3
8003900: 2000 movs r0, #0
8003902: 9001 str r0, [sp, #4]
8003904: 9300 str r3, [sp, #0]
8003906: 460b mov r3, r1
8003908: 2100 movs r1, #0
800390a: 2002 movs r0, #2
800390c: f000 fd84 bl 8004418 <ramp>
m2st=motStartRamp;
8003910: 4b31 ldr r3, [pc, #196] @ (80039d8 <m2ch+0x180>)
8003912: 2201 movs r2, #1
8003914: 701a strb r2, [r3, #0]
}
break;
8003916: e050 b.n 80039ba <m2ch+0x162>
case motStartRamp:
if(ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE){
8003918: 4b34 ldr r3, [pc, #208] @ (80039ec <m2ch+0x194>)
800391a: 885b ldrh r3, [r3, #2]
800391c: b2da uxtb r2, r3
800391e: 4b34 ldr r3, [pc, #208] @ (80039f0 <m2ch+0x198>)
8003920: 881b ldrh r3, [r3, #0]
8003922: b2d9 uxtb r1, r3
8003924: 4b33 ldr r3, [pc, #204] @ (80039f4 <m2ch+0x19c>)
8003926: 881b ldrh r3, [r3, #0]
8003928: b2db uxtb r3, r3
800392a: 200a movs r0, #10
800392c: 9001 str r0, [sp, #4]
800392e: 9300 str r3, [sp, #0]
8003930: 460b mov r3, r1
8003932: 2100 movs r1, #0
8003934: 2002 movs r0, #2
8003936: f000 fd6f bl 8004418 <ramp>
800393a: 4603 mov r3, r0
800393c: 2b00 cmp r3, #0
800393e: d13e bne.n 80039be <m2ch+0x166>
m2st=motWaitingTime;
8003940: 4b25 ldr r3, [pc, #148] @ (80039d8 <m2ch+0x180>)
8003942: 2202 movs r2, #2
8003944: 701a strb r2, [r3, #0]
}
break;
8003946: e03a b.n 80039be <m2ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM2stop){
8003948: 4b26 ldr r3, [pc, #152] @ (80039e4 <m2ch+0x18c>)
800394a: 881b ldrh r3, [r3, #0]
800394c: b29a uxth r2, r3
800394e: 4b2a ldr r3, [pc, #168] @ (80039f8 <m2ch+0x1a0>)
8003950: 881b ldrh r3, [r3, #0]
8003952: 429a cmp r2, r3
8003954: d335 bcc.n 80039c2 <m2ch+0x16a>
(void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT);
8003956: 4b26 ldr r3, [pc, #152] @ (80039f0 <m2ch+0x198>)
8003958: 881b ldrh r3, [r3, #0]
800395a: b2da uxtb r2, r3
800395c: 4b25 ldr r3, [pc, #148] @ (80039f4 <m2ch+0x19c>)
800395e: 881b ldrh r3, [r3, #0]
8003960: b2db uxtb r3, r3
8003962: 2100 movs r1, #0
8003964: 9101 str r1, [sp, #4]
8003966: 9300 str r3, [sp, #0]
8003968: 2300 movs r3, #0
800396a: 2100 movs r1, #0
800396c: 2002 movs r0, #2
800396e: f000 fd53 bl 8004418 <ramp>
m2st=motStopRamp;
8003972: 4b19 ldr r3, [pc, #100] @ (80039d8 <m2ch+0x180>)
8003974: 2203 movs r2, #3
8003976: 701a strb r2, [r3, #0]
}
break;
8003978: e023 b.n 80039c2 <m2ch+0x16a>
case motStopRamp:
if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){
800397a: 4b1d ldr r3, [pc, #116] @ (80039f0 <m2ch+0x198>)
800397c: 881b ldrh r3, [r3, #0]
800397e: b2da uxtb r2, r3
8003980: 4b1c ldr r3, [pc, #112] @ (80039f4 <m2ch+0x19c>)
8003982: 881b ldrh r3, [r3, #0]
8003984: b2db uxtb r3, r3
8003986: 210a movs r1, #10
8003988: 9101 str r1, [sp, #4]
800398a: 9300 str r3, [sp, #0]
800398c: 2300 movs r3, #0
800398e: 2100 movs r1, #0
8003990: 2002 movs r0, #2
8003992: f000 fd41 bl 8004418 <ramp>
8003996: 4603 mov r3, r0
8003998: 2b00 cmp r3, #0
800399a: d114 bne.n 80039c6 <m2ch+0x16e>
m2st=motStop;
800399c: 4b0e ldr r3, [pc, #56] @ (80039d8 <m2ch+0x180>)
800399e: 2204 movs r2, #4
80039a0: 701a strb r2, [r3, #0]
}
break;
80039a2: e010 b.n 80039c6 <m2ch+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
80039a4: 2200 movs r2, #0
80039a6: 2100 movs r1, #0
80039a8: 2002 movs r0, #2
80039aa: f000 fbb5 bl 8004118 <SetMotPerc>
SetMotPerc(M2,BW,0);
80039ae: 2200 movs r2, #0
80039b0: 2101 movs r1, #1
80039b2: 2002 movs r0, #2
80039b4: f000 fbb0 bl 8004118 <SetMotPerc>
break;
80039b8: e006 b.n 80039c8 <m2ch+0x170>
break;
80039ba: bf00 nop
80039bc: e004 b.n 80039c8 <m2ch+0x170>
break;
80039be: bf00 nop
80039c0: e002 b.n 80039c8 <m2ch+0x170>
break;
80039c2: bf00 nop
80039c4: e000 b.n 80039c8 <m2ch+0x170>
break;
80039c6: bf00 nop
}
return m2st;
80039c8: 4b03 ldr r3, [pc, #12] @ (80039d8 <m2ch+0x180>)
80039ca: 781b ldrb r3, [r3, #0]
}
80039cc: 4618 mov r0, r3
80039ce: 3768 adds r7, #104 @ 0x68
80039d0: 46bd mov sp, r7
80039d2: bd80 pop {r7, pc}
80039d4: 2000000c .word 0x2000000c
80039d8: 2000045f .word 0x2000045f
80039dc: 0800eb10 .word 0x0800eb10
80039e0: 200003a8 .word 0x200003a8
80039e4: 200003fc .word 0x200003fc
80039e8: 20000438 .word 0x20000438
80039ec: 20000444 .word 0x20000444
80039f0: 20000404 .word 0x20000404
80039f4: 20000416 .word 0x20000416
80039f8: 2000043a .word 0x2000043a
080039fc <m3ch>:
motMov_st m3ch(void){
80039fc: b580 push {r7, lr}
80039fe: b09c sub sp, #112 @ 0x70
8003a00: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
8003a02: 4b5d ldr r3, [pc, #372] @ (8003b78 <m3ch+0x17c>)
8003a04: 781a ldrb r2, [r3, #0]
8003a06: 4b5d ldr r3, [pc, #372] @ (8003b7c <m3ch+0x180>)
8003a08: 781b ldrb r3, [r3, #0]
8003a0a: 429a cmp r2, r3
8003a0c: d017 beq.n 8003a3e <m3ch+0x42>
memm3st=m3st;
8003a0e: 4b5b ldr r3, [pc, #364] @ (8003b7c <m3ch+0x180>)
8003a10: 781a ldrb r2, [r3, #0]
8003a12: 4b59 ldr r3, [pc, #356] @ (8003b78 <m3ch+0x17c>)
8003a14: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ch=%d",m3st);
8003a16: 4b59 ldr r3, [pc, #356] @ (8003b7c <m3ch+0x180>)
8003a18: 781b ldrb r3, [r3, #0]
8003a1a: 461a mov r2, r3
8003a1c: 1d3b adds r3, r7, #4
8003a1e: 4958 ldr r1, [pc, #352] @ (8003b80 <m3ch+0x184>)
8003a20: 4618 mov r0, r3
8003a22: f00a f997 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003a26: 1d3b adds r3, r7, #4
8003a28: 4618 mov r0, r3
8003a2a: f7fc fb8f bl 800014c <strlen>
8003a2e: 4603 mov r3, r0
8003a30: b29a uxth r2, r3
8003a32: 1d39 adds r1, r7, #4
8003a34: f04f 33ff mov.w r3, #4294967295
8003a38: 4852 ldr r0, [pc, #328] @ (8003b84 <m3ch+0x188>)
8003a3a: f005 fb9b bl 8009174 <HAL_UART_Transmit>
}
if(rtCiclo<chM3start)m3st=motWaiting;
8003a3e: 4b52 ldr r3, [pc, #328] @ (8003b88 <m3ch+0x18c>)
8003a40: 881b ldrh r3, [r3, #0]
8003a42: b29a uxth r2, r3
8003a44: 4b51 ldr r3, [pc, #324] @ (8003b8c <m3ch+0x190>)
8003a46: 881b ldrh r3, [r3, #0]
8003a48: 429a cmp r2, r3
8003a4a: d202 bcs.n 8003a52 <m3ch+0x56>
8003a4c: 4b4b ldr r3, [pc, #300] @ (8003b7c <m3ch+0x180>)
8003a4e: 2200 movs r2, #0
8003a50: 701a strb r2, [r3, #0]
switch(m3st){
8003a52: 4b4a ldr r3, [pc, #296] @ (8003b7c <m3ch+0x180>)
8003a54: 781b ldrb r3, [r3, #0]
8003a56: 2b03 cmp r3, #3
8003a58: d876 bhi.n 8003b48 <m3ch+0x14c>
8003a5a: a201 add r2, pc, #4 @ (adr r2, 8003a60 <m3ch+0x64>)
8003a5c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003a60: 08003a71 .word 0x08003a71
8003a64: 08003abd .word 0x08003abd
8003a68: 08003aed .word 0x08003aed
8003a6c: 08003b1f .word 0x08003b1f
case motWaiting:
SetMotPerc(M3,FW,0);
8003a70: 2200 movs r2, #0
8003a72: 2100 movs r1, #0
8003a74: 2003 movs r0, #3
8003a76: f000 fb4f bl 8004118 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003a7a: 2200 movs r2, #0
8003a7c: 2101 movs r1, #1
8003a7e: 2003 movs r0, #3
8003a80: f000 fb4a bl 8004118 <SetMotPerc>
if(rtCiclo>=chM3start){
8003a84: 4b40 ldr r3, [pc, #256] @ (8003b88 <m3ch+0x18c>)
8003a86: 881b ldrh r3, [r3, #0]
8003a88: b29a uxth r2, r3
8003a8a: 4b40 ldr r3, [pc, #256] @ (8003b8c <m3ch+0x190>)
8003a8c: 881b ldrh r3, [r3, #0]
8003a8e: 429a cmp r2, r3
8003a90: d365 bcc.n 8003b5e <m3ch+0x162>
(void)ramp(M3,FW,mrampstart[M3-1],m2pwmch,tramp,RAMPINIT);
8003a92: 4b3f ldr r3, [pc, #252] @ (8003b90 <m3ch+0x194>)
8003a94: 889b ldrh r3, [r3, #4]
8003a96: b2da uxtb r2, r3
8003a98: 4b3e ldr r3, [pc, #248] @ (8003b94 <m3ch+0x198>)
8003a9a: 881b ldrh r3, [r3, #0]
8003a9c: b2d9 uxtb r1, r3
8003a9e: 4b3e ldr r3, [pc, #248] @ (8003b98 <m3ch+0x19c>)
8003aa0: 881b ldrh r3, [r3, #0]
8003aa2: b2db uxtb r3, r3
8003aa4: 2000 movs r0, #0
8003aa6: 9001 str r0, [sp, #4]
8003aa8: 9300 str r3, [sp, #0]
8003aaa: 460b mov r3, r1
8003aac: 2100 movs r1, #0
8003aae: 2003 movs r0, #3
8003ab0: f000 fcb2 bl 8004418 <ramp>
m3st=motStartRamp;
8003ab4: 4b31 ldr r3, [pc, #196] @ (8003b7c <m3ch+0x180>)
8003ab6: 2201 movs r2, #1
8003ab8: 701a strb r2, [r3, #0]
}
break;
8003aba: e050 b.n 8003b5e <m3ch+0x162>
case motStartRamp:
if(ramp(M3,FW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){
8003abc: 4b34 ldr r3, [pc, #208] @ (8003b90 <m3ch+0x194>)
8003abe: 889b ldrh r3, [r3, #4]
8003ac0: b2da uxtb r2, r3
8003ac2: 4b36 ldr r3, [pc, #216] @ (8003b9c <m3ch+0x1a0>)
8003ac4: 881b ldrh r3, [r3, #0]
8003ac6: b2d9 uxtb r1, r3
8003ac8: 4b33 ldr r3, [pc, #204] @ (8003b98 <m3ch+0x19c>)
8003aca: 881b ldrh r3, [r3, #0]
8003acc: b2db uxtb r3, r3
8003ace: 200a movs r0, #10
8003ad0: 9001 str r0, [sp, #4]
8003ad2: 9300 str r3, [sp, #0]
8003ad4: 460b mov r3, r1
8003ad6: 2100 movs r1, #0
8003ad8: 2003 movs r0, #3
8003ada: f000 fc9d bl 8004418 <ramp>
8003ade: 4603 mov r3, r0
8003ae0: 2b00 cmp r3, #0
8003ae2: d13e bne.n 8003b62 <m3ch+0x166>
m3st=motWaitingTime;
8003ae4: 4b25 ldr r3, [pc, #148] @ (8003b7c <m3ch+0x180>)
8003ae6: 2202 movs r2, #2
8003ae8: 701a strb r2, [r3, #0]
}
break;
8003aea: e03a b.n 8003b62 <m3ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM3stop){
8003aec: 4b26 ldr r3, [pc, #152] @ (8003b88 <m3ch+0x18c>)
8003aee: 881b ldrh r3, [r3, #0]
8003af0: b29a uxth r2, r3
8003af2: 4b2b ldr r3, [pc, #172] @ (8003ba0 <m3ch+0x1a4>)
8003af4: 881b ldrh r3, [r3, #0]
8003af6: 429a cmp r2, r3
8003af8: d335 bcc.n 8003b66 <m3ch+0x16a>
(void)ramp(M3,FW,m3pwmch,0,tramp,RAMPINIT);
8003afa: 4b28 ldr r3, [pc, #160] @ (8003b9c <m3ch+0x1a0>)
8003afc: 881b ldrh r3, [r3, #0]
8003afe: b2da uxtb r2, r3
8003b00: 4b25 ldr r3, [pc, #148] @ (8003b98 <m3ch+0x19c>)
8003b02: 881b ldrh r3, [r3, #0]
8003b04: b2db uxtb r3, r3
8003b06: 2100 movs r1, #0
8003b08: 9101 str r1, [sp, #4]
8003b0a: 9300 str r3, [sp, #0]
8003b0c: 2300 movs r3, #0
8003b0e: 2100 movs r1, #0
8003b10: 2003 movs r0, #3
8003b12: f000 fc81 bl 8004418 <ramp>
m3st=motStopRamp;
8003b16: 4b19 ldr r3, [pc, #100] @ (8003b7c <m3ch+0x180>)
8003b18: 2203 movs r2, #3
8003b1a: 701a strb r2, [r3, #0]
}
break;
8003b1c: e023 b.n 8003b66 <m3ch+0x16a>
case motStopRamp:
if(ramp(M3,FW,m3pwmch,0,tramp,RAMPRUN)==DONE){
8003b1e: 4b1f ldr r3, [pc, #124] @ (8003b9c <m3ch+0x1a0>)
8003b20: 881b ldrh r3, [r3, #0]
8003b22: b2da uxtb r2, r3
8003b24: 4b1c ldr r3, [pc, #112] @ (8003b98 <m3ch+0x19c>)
8003b26: 881b ldrh r3, [r3, #0]
8003b28: b2db uxtb r3, r3
8003b2a: 210a movs r1, #10
8003b2c: 9101 str r1, [sp, #4]
8003b2e: 9300 str r3, [sp, #0]
8003b30: 2300 movs r3, #0
8003b32: 2100 movs r1, #0
8003b34: 2003 movs r0, #3
8003b36: f000 fc6f bl 8004418 <ramp>
8003b3a: 4603 mov r3, r0
8003b3c: 2b00 cmp r3, #0
8003b3e: d114 bne.n 8003b6a <m3ch+0x16e>
m3st=motStop;
8003b40: 4b0e ldr r3, [pc, #56] @ (8003b7c <m3ch+0x180>)
8003b42: 2204 movs r2, #4
8003b44: 701a strb r2, [r3, #0]
}
break;
8003b46: e010 b.n 8003b6a <m3ch+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8003b48: 2200 movs r2, #0
8003b4a: 2100 movs r1, #0
8003b4c: 2003 movs r0, #3
8003b4e: f000 fae3 bl 8004118 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003b52: 2200 movs r2, #0
8003b54: 2101 movs r1, #1
8003b56: 2003 movs r0, #3
8003b58: f000 fade bl 8004118 <SetMotPerc>
break;
8003b5c: e006 b.n 8003b6c <m3ch+0x170>
break;
8003b5e: bf00 nop
8003b60: e004 b.n 8003b6c <m3ch+0x170>
break;
8003b62: bf00 nop
8003b64: e002 b.n 8003b6c <m3ch+0x170>
break;
8003b66: bf00 nop
8003b68: e000 b.n 8003b6c <m3ch+0x170>
break;
8003b6a: bf00 nop
}
return m3st;
8003b6c: 4b03 ldr r3, [pc, #12] @ (8003b7c <m3ch+0x180>)
8003b6e: 781b ldrb r3, [r3, #0]
}
8003b70: 4618 mov r0, r3
8003b72: 3768 adds r7, #104 @ 0x68
8003b74: 46bd mov sp, r7
8003b76: bd80 pop {r7, pc}
8003b78: 2000000d .word 0x2000000d
8003b7c: 20000460 .word 0x20000460
8003b80: 0800eb1c .word 0x0800eb1c
8003b84: 200003a8 .word 0x200003a8
8003b88: 200003fc .word 0x200003fc
8003b8c: 2000043c .word 0x2000043c
8003b90: 20000444 .word 0x20000444
8003b94: 20000404 .word 0x20000404
8003b98: 20000416 .word 0x20000416
8003b9c: 20000408 .word 0x20000408
8003ba0: 2000043e .word 0x2000043e
08003ba4 <m4ch>:
motMov_st m4ch(void){
8003ba4: b580 push {r7, lr}
8003ba6: b09c sub sp, #112 @ 0x70
8003ba8: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8003baa: 4b5d ldr r3, [pc, #372] @ (8003d20 <m4ch+0x17c>)
8003bac: 781a ldrb r2, [r3, #0]
8003bae: 4b5d ldr r3, [pc, #372] @ (8003d24 <m4ch+0x180>)
8003bb0: 781b ldrb r3, [r3, #0]
8003bb2: 429a cmp r2, r3
8003bb4: d017 beq.n 8003be6 <m4ch+0x42>
memm4st=m4st;
8003bb6: 4b5b ldr r3, [pc, #364] @ (8003d24 <m4ch+0x180>)
8003bb8: 781a ldrb r2, [r3, #0]
8003bba: 4b59 ldr r3, [pc, #356] @ (8003d20 <m4ch+0x17c>)
8003bbc: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ch=%d",m4st);
8003bbe: 4b59 ldr r3, [pc, #356] @ (8003d24 <m4ch+0x180>)
8003bc0: 781b ldrb r3, [r3, #0]
8003bc2: 461a mov r2, r3
8003bc4: 1d3b adds r3, r7, #4
8003bc6: 4958 ldr r1, [pc, #352] @ (8003d28 <m4ch+0x184>)
8003bc8: 4618 mov r0, r3
8003bca: f00a f8c3 bl 800dd54 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003bce: 1d3b adds r3, r7, #4
8003bd0: 4618 mov r0, r3
8003bd2: f7fc fabb bl 800014c <strlen>
8003bd6: 4603 mov r3, r0
8003bd8: b29a uxth r2, r3
8003bda: 1d39 adds r1, r7, #4
8003bdc: f04f 33ff mov.w r3, #4294967295
8003be0: 4852 ldr r0, [pc, #328] @ (8003d2c <m4ch+0x188>)
8003be2: f005 fac7 bl 8009174 <HAL_UART_Transmit>
}
if(rtCiclo<chM4start)m4st=motWaiting;
8003be6: 4b52 ldr r3, [pc, #328] @ (8003d30 <m4ch+0x18c>)
8003be8: 881b ldrh r3, [r3, #0]
8003bea: b29a uxth r2, r3
8003bec: 4b51 ldr r3, [pc, #324] @ (8003d34 <m4ch+0x190>)
8003bee: 881b ldrh r3, [r3, #0]
8003bf0: 429a cmp r2, r3
8003bf2: d202 bcs.n 8003bfa <m4ch+0x56>
8003bf4: 4b4b ldr r3, [pc, #300] @ (8003d24 <m4ch+0x180>)
8003bf6: 2200 movs r2, #0
8003bf8: 701a strb r2, [r3, #0]
switch(m4st){
8003bfa: 4b4a ldr r3, [pc, #296] @ (8003d24 <m4ch+0x180>)
8003bfc: 781b ldrb r3, [r3, #0]
8003bfe: 2b03 cmp r3, #3
8003c00: d876 bhi.n 8003cf0 <m4ch+0x14c>
8003c02: a201 add r2, pc, #4 @ (adr r2, 8003c08 <m4ch+0x64>)
8003c04: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003c08: 08003c19 .word 0x08003c19
8003c0c: 08003c65 .word 0x08003c65
8003c10: 08003c95 .word 0x08003c95
8003c14: 08003cc7 .word 0x08003cc7
case motWaiting:
SetMotPerc(M4,FW,0);
8003c18: 2200 movs r2, #0
8003c1a: 2100 movs r1, #0
8003c1c: 2004 movs r0, #4
8003c1e: f000 fa7b bl 8004118 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003c22: 2200 movs r2, #0
8003c24: 2101 movs r1, #1
8003c26: 2004 movs r0, #4
8003c28: f000 fa76 bl 8004118 <SetMotPerc>
if(rtCiclo>=chM4start){
8003c2c: 4b40 ldr r3, [pc, #256] @ (8003d30 <m4ch+0x18c>)
8003c2e: 881b ldrh r3, [r3, #0]
8003c30: b29a uxth r2, r3
8003c32: 4b40 ldr r3, [pc, #256] @ (8003d34 <m4ch+0x190>)
8003c34: 881b ldrh r3, [r3, #0]
8003c36: 429a cmp r2, r3
8003c38: d365 bcc.n 8003d06 <m4ch+0x162>
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT);
8003c3a: 4b3f ldr r3, [pc, #252] @ (8003d38 <m4ch+0x194>)
8003c3c: 88db ldrh r3, [r3, #6]
8003c3e: b2da uxtb r2, r3
8003c40: 4b3e ldr r3, [pc, #248] @ (8003d3c <m4ch+0x198>)
8003c42: 881b ldrh r3, [r3, #0]
8003c44: b2d9 uxtb r1, r3
8003c46: 4b3e ldr r3, [pc, #248] @ (8003d40 <m4ch+0x19c>)
8003c48: 881b ldrh r3, [r3, #0]
8003c4a: b2db uxtb r3, r3
8003c4c: 2000 movs r0, #0
8003c4e: 9001 str r0, [sp, #4]
8003c50: 9300 str r3, [sp, #0]
8003c52: 460b mov r3, r1
8003c54: 2100 movs r1, #0
8003c56: 2004 movs r0, #4
8003c58: f000 fbde bl 8004418 <ramp>
m4st=motStartRamp;
8003c5c: 4b31 ldr r3, [pc, #196] @ (8003d24 <m4ch+0x180>)
8003c5e: 2201 movs r2, #1
8003c60: 701a strb r2, [r3, #0]
}
break;
8003c62: e050 b.n 8003d06 <m4ch+0x162>
case motStartRamp:
if(ramp(M4,FW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE){
8003c64: 4b34 ldr r3, [pc, #208] @ (8003d38 <m4ch+0x194>)
8003c66: 88db ldrh r3, [r3, #6]
8003c68: b2da uxtb r2, r3
8003c6a: 4b34 ldr r3, [pc, #208] @ (8003d3c <m4ch+0x198>)
8003c6c: 881b ldrh r3, [r3, #0]
8003c6e: b2d9 uxtb r1, r3
8003c70: 4b33 ldr r3, [pc, #204] @ (8003d40 <m4ch+0x19c>)
8003c72: 881b ldrh r3, [r3, #0]
8003c74: b2db uxtb r3, r3
8003c76: 200a movs r0, #10
8003c78: 9001 str r0, [sp, #4]
8003c7a: 9300 str r3, [sp, #0]
8003c7c: 460b mov r3, r1
8003c7e: 2100 movs r1, #0
8003c80: 2004 movs r0, #4
8003c82: f000 fbc9 bl 8004418 <ramp>
8003c86: 4603 mov r3, r0
8003c88: 2b00 cmp r3, #0
8003c8a: d13e bne.n 8003d0a <m4ch+0x166>
m4st=motWaitingTime;
8003c8c: 4b25 ldr r3, [pc, #148] @ (8003d24 <m4ch+0x180>)
8003c8e: 2202 movs r2, #2
8003c90: 701a strb r2, [r3, #0]
}
break;
8003c92: e03a b.n 8003d0a <m4ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM4stop){
8003c94: 4b26 ldr r3, [pc, #152] @ (8003d30 <m4ch+0x18c>)
8003c96: 881b ldrh r3, [r3, #0]
8003c98: b29a uxth r2, r3
8003c9a: 4b2a ldr r3, [pc, #168] @ (8003d44 <m4ch+0x1a0>)
8003c9c: 881b ldrh r3, [r3, #0]
8003c9e: 429a cmp r2, r3
8003ca0: d335 bcc.n 8003d0e <m4ch+0x16a>
(void)ramp(M4,FW,m4pwmch,0,tramp,RAMPINIT);
8003ca2: 4b26 ldr r3, [pc, #152] @ (8003d3c <m4ch+0x198>)
8003ca4: 881b ldrh r3, [r3, #0]
8003ca6: b2da uxtb r2, r3
8003ca8: 4b25 ldr r3, [pc, #148] @ (8003d40 <m4ch+0x19c>)
8003caa: 881b ldrh r3, [r3, #0]
8003cac: b2db uxtb r3, r3
8003cae: 2100 movs r1, #0
8003cb0: 9101 str r1, [sp, #4]
8003cb2: 9300 str r3, [sp, #0]
8003cb4: 2300 movs r3, #0
8003cb6: 2100 movs r1, #0
8003cb8: 2004 movs r0, #4
8003cba: f000 fbad bl 8004418 <ramp>
m4st=motStopRamp;
8003cbe: 4b19 ldr r3, [pc, #100] @ (8003d24 <m4ch+0x180>)
8003cc0: 2203 movs r2, #3
8003cc2: 701a strb r2, [r3, #0]
}
break;
8003cc4: e023 b.n 8003d0e <m4ch+0x16a>
case motStopRamp:
if(ramp(M4,FW,m4pwmch,0,tramp,RAMPRUN)==DONE){
8003cc6: 4b1d ldr r3, [pc, #116] @ (8003d3c <m4ch+0x198>)
8003cc8: 881b ldrh r3, [r3, #0]
8003cca: b2da uxtb r2, r3
8003ccc: 4b1c ldr r3, [pc, #112] @ (8003d40 <m4ch+0x19c>)
8003cce: 881b ldrh r3, [r3, #0]
8003cd0: b2db uxtb r3, r3
8003cd2: 210a movs r1, #10
8003cd4: 9101 str r1, [sp, #4]
8003cd6: 9300 str r3, [sp, #0]
8003cd8: 2300 movs r3, #0
8003cda: 2100 movs r1, #0
8003cdc: 2004 movs r0, #4
8003cde: f000 fb9b bl 8004418 <ramp>
8003ce2: 4603 mov r3, r0
8003ce4: 2b00 cmp r3, #0
8003ce6: d114 bne.n 8003d12 <m4ch+0x16e>
m4st=motStop;
8003ce8: 4b0e ldr r3, [pc, #56] @ (8003d24 <m4ch+0x180>)
8003cea: 2204 movs r2, #4
8003cec: 701a strb r2, [r3, #0]
}
break;
8003cee: e010 b.n 8003d12 <m4ch+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003cf0: 2200 movs r2, #0
8003cf2: 2100 movs r1, #0
8003cf4: 2004 movs r0, #4
8003cf6: f000 fa0f bl 8004118 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003cfa: 2200 movs r2, #0
8003cfc: 2101 movs r1, #1
8003cfe: 2004 movs r0, #4
8003d00: f000 fa0a bl 8004118 <SetMotPerc>
break;
8003d04: e006 b.n 8003d14 <m4ch+0x170>
break;
8003d06: bf00 nop
8003d08: e004 b.n 8003d14 <m4ch+0x170>
break;
8003d0a: bf00 nop
8003d0c: e002 b.n 8003d14 <m4ch+0x170>
break;
8003d0e: bf00 nop
8003d10: e000 b.n 8003d14 <m4ch+0x170>
break;
8003d12: bf00 nop
}
return m4st;
8003d14: 4b03 ldr r3, [pc, #12] @ (8003d24 <m4ch+0x180>)
8003d16: 781b ldrb r3, [r3, #0]
}
8003d18: 4618 mov r0, r3
8003d1a: 3768 adds r7, #104 @ 0x68
8003d1c: 46bd mov sp, r7
8003d1e: bd80 pop {r7, pc}
8003d20: 2000000e .word 0x2000000e
8003d24: 20000461 .word 0x20000461
8003d28: 0800eb28 .word 0x0800eb28
8003d2c: 200003a8 .word 0x200003a8
8003d30: 200003fc .word 0x200003fc
8003d34: 20000440 .word 0x20000440
8003d38: 20000444 .word 0x20000444
8003d3c: 2000040c .word 0x2000040c
8003d40: 20000416 .word 0x20000416
8003d44: 20000442 .word 0x20000442
08003d48 <IsPwmRunning>:
extern volatile uint16_t rtramp[4];
extern uint16_t mrampstart[4];
extern UART_HandleTypeDef huart1;
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8003d48: b580 push {r7, lr}
8003d4a: b084 sub sp, #16
8003d4c: af00 add r7, sp, #0
8003d4e: 6078 str r0, [r7, #4]
8003d50: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
8003d52: 6839 ldr r1, [r7, #0]
8003d54: 6878 ldr r0, [r7, #4]
8003d56: f004 fe86 bl 8008a66 <HAL_TIM_GetChannelState>
8003d5a: 4603 mov r3, r0
8003d5c: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
8003d5e: 7bfb ldrb r3, [r7, #15]
8003d60: 2b02 cmp r3, #2
8003d62: bf0c ite eq
8003d64: 2301 moveq r3, #1
8003d66: 2300 movne r3, #0
8003d68: b2db uxtb r3, r3
}
8003d6a: 4618 mov r0, r3
8003d6c: 3710 adds r7, #16
8003d6e: 46bd mov sp, r7
8003d70: bd80 pop {r7, pc}
08003d72 <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
8003d72: b580 push {r7, lr}
8003d74: b082 sub sp, #8
8003d76: af00 add r7, sp, #0
8003d78: 6078 str r0, [r7, #4]
8003d7a: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
8003d7c: 6839 ldr r1, [r7, #0]
8003d7e: 6878 ldr r0, [r7, #4]
8003d80: f004 fc84 bl 800868c <HAL_TIM_PWM_Stop>
}
8003d84: bf00 nop
8003d86: 3708 adds r7, #8
8003d88: 46bd mov sp, r7
8003d8a: bd80 pop {r7, pc}
08003d8c <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8003d8c: b580 push {r7, lr}
8003d8e: b084 sub sp, #16
8003d90: af00 add r7, sp, #0
8003d92: 60f8 str r0, [r7, #12]
8003d94: 60b9 str r1, [r7, #8]
8003d96: 4613 mov r3, r2
8003d98: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003d9a: 68bb ldr r3, [r7, #8]
8003d9c: 2b00 cmp r3, #0
8003d9e: d104 bne.n 8003daa <StartMot+0x1e>
8003da0: 68fb ldr r3, [r7, #12]
8003da2: 681b ldr r3, [r3, #0]
8003da4: 88fa ldrh r2, [r7, #6]
8003da6: 635a str r2, [r3, #52] @ 0x34
8003da8: e013 b.n 8003dd2 <StartMot+0x46>
8003daa: 68bb ldr r3, [r7, #8]
8003dac: 2b04 cmp r3, #4
8003dae: d104 bne.n 8003dba <StartMot+0x2e>
8003db0: 68fb ldr r3, [r7, #12]
8003db2: 681a ldr r2, [r3, #0]
8003db4: 88fb ldrh r3, [r7, #6]
8003db6: 6393 str r3, [r2, #56] @ 0x38
8003db8: e00b b.n 8003dd2 <StartMot+0x46>
8003dba: 68bb ldr r3, [r7, #8]
8003dbc: 2b08 cmp r3, #8
8003dbe: d104 bne.n 8003dca <StartMot+0x3e>
8003dc0: 68fb ldr r3, [r7, #12]
8003dc2: 681a ldr r2, [r3, #0]
8003dc4: 88fb ldrh r3, [r7, #6]
8003dc6: 63d3 str r3, [r2, #60] @ 0x3c
8003dc8: e003 b.n 8003dd2 <StartMot+0x46>
8003dca: 68fb ldr r3, [r7, #12]
8003dcc: 681a ldr r2, [r3, #0]
8003dce: 88fb ldrh r3, [r7, #6]
8003dd0: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
8003dd2: 68b9 ldr r1, [r7, #8]
8003dd4: 68f8 ldr r0, [r7, #12]
8003dd6: f004 fbb7 bl 8008548 <HAL_TIM_PWM_Start>
}
8003dda: bf00 nop
8003ddc: 3710 adds r7, #16
8003dde: 46bd mov sp, r7
8003de0: bd80 pop {r7, pc}
08003de2 <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8003de2: b480 push {r7}
8003de4: b085 sub sp, #20
8003de6: af00 add r7, sp, #0
8003de8: 60f8 str r0, [r7, #12]
8003dea: 60b9 str r1, [r7, #8]
8003dec: 4613 mov r3, r2
8003dee: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003df0: 68bb ldr r3, [r7, #8]
8003df2: 2b00 cmp r3, #0
8003df4: d104 bne.n 8003e00 <SetMotPwm+0x1e>
8003df6: 68fb ldr r3, [r7, #12]
8003df8: 681b ldr r3, [r3, #0]
8003dfa: 88fa ldrh r2, [r7, #6]
8003dfc: 635a str r2, [r3, #52] @ 0x34
}
8003dfe: e013 b.n 8003e28 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003e00: 68bb ldr r3, [r7, #8]
8003e02: 2b04 cmp r3, #4
8003e04: d104 bne.n 8003e10 <SetMotPwm+0x2e>
8003e06: 68fb ldr r3, [r7, #12]
8003e08: 681a ldr r2, [r3, #0]
8003e0a: 88fb ldrh r3, [r7, #6]
8003e0c: 6393 str r3, [r2, #56] @ 0x38
}
8003e0e: e00b b.n 8003e28 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003e10: 68bb ldr r3, [r7, #8]
8003e12: 2b08 cmp r3, #8
8003e14: d104 bne.n 8003e20 <SetMotPwm+0x3e>
8003e16: 68fb ldr r3, [r7, #12]
8003e18: 681a ldr r2, [r3, #0]
8003e1a: 88fb ldrh r3, [r7, #6]
8003e1c: 63d3 str r3, [r2, #60] @ 0x3c
}
8003e1e: e003 b.n 8003e28 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003e20: 68fb ldr r3, [r7, #12]
8003e22: 681a ldr r2, [r3, #0]
8003e24: 88fb ldrh r3, [r7, #6]
8003e26: 6413 str r3, [r2, #64] @ 0x40
}
8003e28: bf00 nop
8003e2a: 3714 adds r7, #20
8003e2c: 46bd mov sp, r7
8003e2e: bc80 pop {r7}
8003e30: 4770 bx lr
...
08003e34 <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
8003e34: b580 push {r7, lr}
8003e36: b082 sub sp, #8
8003e38: af00 add r7, sp, #0
8003e3a: 4603 mov r3, r0
8003e3c: 71fb strb r3, [r7, #7]
8003e3e: 460b mov r3, r1
8003e40: 71bb strb r3, [r7, #6]
8003e42: 4613 mov r3, r2
8003e44: 80bb strh r3, [r7, #4]
switch(mot){
8003e46: 79fb ldrb r3, [r7, #7]
8003e48: 3b01 subs r3, #1
8003e4a: 2b03 cmp r3, #3
8003e4c: f200 8158 bhi.w 8004100 <SetMot+0x2cc>
8003e50: a201 add r2, pc, #4 @ (adr r2, 8003e58 <SetMot+0x24>)
8003e52: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003e56: bf00 nop
8003e58: 08003e69 .word 0x08003e69
8003e5c: 08003f0b .word 0x08003f0b
8003e60: 08003fad .word 0x08003fad
8003e64: 08004057 .word 0x08004057
case 1:
if(dir==FW){
8003e68: 79bb ldrb r3, [r7, #6]
8003e6a: 2b00 cmp r3, #0
8003e6c: d126 bne.n 8003ebc <SetMot+0x88>
if(pwmval==0){
8003e6e: 88bb ldrh r3, [r7, #4]
8003e70: 2b00 cmp r3, #0
8003e72: d109 bne.n 8003e88 <SetMot+0x54>
StopMot(timMot1,FWMot1);
8003e74: 2100 movs r1, #0
8003e76: 48a5 ldr r0, [pc, #660] @ (800410c <SetMot+0x2d8>)
8003e78: f7ff ff7b bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8003e7c: 2200 movs r2, #0
8003e7e: 2102 movs r1, #2
8003e80: 48a3 ldr r0, [pc, #652] @ (8004110 <SetMot+0x2dc>)
8003e82: f002 f878 bl 8005f76 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8003e86: e13c b.n 8004102 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
8003e88: 2100 movs r1, #0
8003e8a: 48a0 ldr r0, [pc, #640] @ (800410c <SetMot+0x2d8>)
8003e8c: f7ff ff5c bl 8003d48 <IsPwmRunning>
8003e90: 4603 mov r3, r0
8003e92: 2b00 cmp r3, #0
8003e94: d006 beq.n 8003ea4 <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
8003e96: 88bb ldrh r3, [r7, #4]
8003e98: 461a mov r2, r3
8003e9a: 2100 movs r1, #0
8003e9c: 489b ldr r0, [pc, #620] @ (800410c <SetMot+0x2d8>)
8003e9e: f7ff ffa0 bl 8003de2 <SetMotPwm>
break;
8003ea2: e12e b.n 8004102 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8003ea4: 2201 movs r2, #1
8003ea6: 2102 movs r1, #2
8003ea8: 4899 ldr r0, [pc, #612] @ (8004110 <SetMot+0x2dc>)
8003eaa: f002 f864 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
8003eae: 88bb ldrh r3, [r7, #4]
8003eb0: 461a mov r2, r3
8003eb2: 2100 movs r1, #0
8003eb4: 4895 ldr r0, [pc, #596] @ (800410c <SetMot+0x2d8>)
8003eb6: f7ff ff69 bl 8003d8c <StartMot>
break;
8003eba: e122 b.n 8004102 <SetMot+0x2ce>
if(pwmval==0){
8003ebc: 88bb ldrh r3, [r7, #4]
8003ebe: 2b00 cmp r3, #0
8003ec0: d109 bne.n 8003ed6 <SetMot+0xa2>
StopMot(timMot1,BWMot1);
8003ec2: 2104 movs r1, #4
8003ec4: 4891 ldr r0, [pc, #580] @ (800410c <SetMot+0x2d8>)
8003ec6: f7ff ff54 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8003eca: 2200 movs r2, #0
8003ecc: 2102 movs r1, #2
8003ece: 4890 ldr r0, [pc, #576] @ (8004110 <SetMot+0x2dc>)
8003ed0: f002 f851 bl 8005f76 <HAL_GPIO_WritePin>
break;
8003ed4: e115 b.n 8004102 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
8003ed6: 2104 movs r1, #4
8003ed8: 488c ldr r0, [pc, #560] @ (800410c <SetMot+0x2d8>)
8003eda: f7ff ff35 bl 8003d48 <IsPwmRunning>
8003ede: 4603 mov r3, r0
8003ee0: 2b00 cmp r3, #0
8003ee2: d006 beq.n 8003ef2 <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
8003ee4: 88bb ldrh r3, [r7, #4]
8003ee6: 461a mov r2, r3
8003ee8: 2104 movs r1, #4
8003eea: 4888 ldr r0, [pc, #544] @ (800410c <SetMot+0x2d8>)
8003eec: f7ff ff79 bl 8003de2 <SetMotPwm>
break;
8003ef0: e107 b.n 8004102 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8003ef2: 2201 movs r2, #1
8003ef4: 2102 movs r1, #2
8003ef6: 4886 ldr r0, [pc, #536] @ (8004110 <SetMot+0x2dc>)
8003ef8: f002 f83d bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
8003efc: 88bb ldrh r3, [r7, #4]
8003efe: 461a mov r2, r3
8003f00: 2104 movs r1, #4
8003f02: 4882 ldr r0, [pc, #520] @ (800410c <SetMot+0x2d8>)
8003f04: f7ff ff42 bl 8003d8c <StartMot>
break;
8003f08: e0fb b.n 8004102 <SetMot+0x2ce>
case 2:
if(dir==FW){
8003f0a: 79bb ldrb r3, [r7, #6]
8003f0c: 2b00 cmp r3, #0
8003f0e: d126 bne.n 8003f5e <SetMot+0x12a>
if(pwmval==0){
8003f10: 88bb ldrh r3, [r7, #4]
8003f12: 2b00 cmp r3, #0
8003f14: d109 bne.n 8003f2a <SetMot+0xf6>
StopMot(timMot2,FWMot2);
8003f16: 2108 movs r1, #8
8003f18: 487c ldr r0, [pc, #496] @ (800410c <SetMot+0x2d8>)
8003f1a: f7ff ff2a bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8003f1e: 2200 movs r2, #0
8003f20: 2104 movs r1, #4
8003f22: 487b ldr r0, [pc, #492] @ (8004110 <SetMot+0x2dc>)
8003f24: f002 f827 bl 8005f76 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8003f28: e0eb b.n 8004102 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
8003f2a: 2108 movs r1, #8
8003f2c: 4877 ldr r0, [pc, #476] @ (800410c <SetMot+0x2d8>)
8003f2e: f7ff ff0b bl 8003d48 <IsPwmRunning>
8003f32: 4603 mov r3, r0
8003f34: 2b00 cmp r3, #0
8003f36: d006 beq.n 8003f46 <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
8003f38: 88bb ldrh r3, [r7, #4]
8003f3a: 461a mov r2, r3
8003f3c: 2108 movs r1, #8
8003f3e: 4873 ldr r0, [pc, #460] @ (800410c <SetMot+0x2d8>)
8003f40: f7ff ff4f bl 8003de2 <SetMotPwm>
break;
8003f44: e0dd b.n 8004102 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8003f46: 2201 movs r2, #1
8003f48: 2104 movs r1, #4
8003f4a: 4871 ldr r0, [pc, #452] @ (8004110 <SetMot+0x2dc>)
8003f4c: f002 f813 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8003f50: 88bb ldrh r3, [r7, #4]
8003f52: 461a mov r2, r3
8003f54: 2108 movs r1, #8
8003f56: 486d ldr r0, [pc, #436] @ (800410c <SetMot+0x2d8>)
8003f58: f7ff ff18 bl 8003d8c <StartMot>
break;
8003f5c: e0d1 b.n 8004102 <SetMot+0x2ce>
if(pwmval==0){
8003f5e: 88bb ldrh r3, [r7, #4]
8003f60: 2b00 cmp r3, #0
8003f62: d109 bne.n 8003f78 <SetMot+0x144>
StopMot(timMot2,BWMot2);
8003f64: 210c movs r1, #12
8003f66: 4869 ldr r0, [pc, #420] @ (800410c <SetMot+0x2d8>)
8003f68: f7ff ff03 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8003f6c: 2200 movs r2, #0
8003f6e: 2104 movs r1, #4
8003f70: 4867 ldr r0, [pc, #412] @ (8004110 <SetMot+0x2dc>)
8003f72: f002 f800 bl 8005f76 <HAL_GPIO_WritePin>
break;
8003f76: e0c4 b.n 8004102 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
8003f78: 210c movs r1, #12
8003f7a: 4864 ldr r0, [pc, #400] @ (800410c <SetMot+0x2d8>)
8003f7c: f7ff fee4 bl 8003d48 <IsPwmRunning>
8003f80: 4603 mov r3, r0
8003f82: 2b00 cmp r3, #0
8003f84: d006 beq.n 8003f94 <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
8003f86: 88bb ldrh r3, [r7, #4]
8003f88: 461a mov r2, r3
8003f8a: 210c movs r1, #12
8003f8c: 485f ldr r0, [pc, #380] @ (800410c <SetMot+0x2d8>)
8003f8e: f7ff ff28 bl 8003de2 <SetMotPwm>
break;
8003f92: e0b6 b.n 8004102 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8003f94: 2201 movs r2, #1
8003f96: 2104 movs r1, #4
8003f98: 485d ldr r0, [pc, #372] @ (8004110 <SetMot+0x2dc>)
8003f9a: f001 ffec bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8003f9e: 88bb ldrh r3, [r7, #4]
8003fa0: 461a mov r2, r3
8003fa2: 210c movs r1, #12
8003fa4: 4859 ldr r0, [pc, #356] @ (800410c <SetMot+0x2d8>)
8003fa6: f7ff fef1 bl 8003d8c <StartMot>
break;
8003faa: e0aa b.n 8004102 <SetMot+0x2ce>
case 3:
if(dir==FW){
8003fac: 79bb ldrb r3, [r7, #6]
8003fae: 2b00 cmp r3, #0
8003fb0: d128 bne.n 8004004 <SetMot+0x1d0>
if(pwmval==0){
8003fb2: 88bb ldrh r3, [r7, #4]
8003fb4: 2b00 cmp r3, #0
8003fb6: d10a bne.n 8003fce <SetMot+0x19a>
StopMot(timMot3,FWMot3);
8003fb8: 2100 movs r1, #0
8003fba: 4856 ldr r0, [pc, #344] @ (8004114 <SetMot+0x2e0>)
8003fbc: f7ff fed9 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8003fc0: 2200 movs r2, #0
8003fc2: f44f 6180 mov.w r1, #1024 @ 0x400
8003fc6: 4852 ldr r0, [pc, #328] @ (8004110 <SetMot+0x2dc>)
8003fc8: f001 ffd5 bl 8005f76 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8003fcc: e099 b.n 8004102 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
8003fce: 2100 movs r1, #0
8003fd0: 4850 ldr r0, [pc, #320] @ (8004114 <SetMot+0x2e0>)
8003fd2: f7ff feb9 bl 8003d48 <IsPwmRunning>
8003fd6: 4603 mov r3, r0
8003fd8: 2b00 cmp r3, #0
8003fda: d006 beq.n 8003fea <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
8003fdc: 88bb ldrh r3, [r7, #4]
8003fde: 461a mov r2, r3
8003fe0: 2100 movs r1, #0
8003fe2: 484c ldr r0, [pc, #304] @ (8004114 <SetMot+0x2e0>)
8003fe4: f7ff fefd bl 8003de2 <SetMotPwm>
break;
8003fe8: e08b b.n 8004102 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8003fea: 2201 movs r2, #1
8003fec: f44f 6180 mov.w r1, #1024 @ 0x400
8003ff0: 4847 ldr r0, [pc, #284] @ (8004110 <SetMot+0x2dc>)
8003ff2: f001 ffc0 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8003ff6: 88bb ldrh r3, [r7, #4]
8003ff8: 461a mov r2, r3
8003ffa: 2100 movs r1, #0
8003ffc: 4845 ldr r0, [pc, #276] @ (8004114 <SetMot+0x2e0>)
8003ffe: f7ff fec5 bl 8003d8c <StartMot>
break;
8004002: e07e b.n 8004102 <SetMot+0x2ce>
if(pwmval==0){
8004004: 88bb ldrh r3, [r7, #4]
8004006: 2b00 cmp r3, #0
8004008: d10a bne.n 8004020 <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
800400a: 2104 movs r1, #4
800400c: 4841 ldr r0, [pc, #260] @ (8004114 <SetMot+0x2e0>)
800400e: f7ff feb0 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004012: 2200 movs r2, #0
8004014: f44f 6180 mov.w r1, #1024 @ 0x400
8004018: 483d ldr r0, [pc, #244] @ (8004110 <SetMot+0x2dc>)
800401a: f001 ffac bl 8005f76 <HAL_GPIO_WritePin>
break;
800401e: e070 b.n 8004102 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
8004020: 2104 movs r1, #4
8004022: 483c ldr r0, [pc, #240] @ (8004114 <SetMot+0x2e0>)
8004024: f7ff fe90 bl 8003d48 <IsPwmRunning>
8004028: 4603 mov r3, r0
800402a: 2b00 cmp r3, #0
800402c: d006 beq.n 800403c <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
800402e: 88bb ldrh r3, [r7, #4]
8004030: 461a mov r2, r3
8004032: 2104 movs r1, #4
8004034: 4837 ldr r0, [pc, #220] @ (8004114 <SetMot+0x2e0>)
8004036: f7ff fed4 bl 8003de2 <SetMotPwm>
break;
800403a: e062 b.n 8004102 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
800403c: 2201 movs r2, #1
800403e: f44f 6180 mov.w r1, #1024 @ 0x400
8004042: 4833 ldr r0, [pc, #204] @ (8004110 <SetMot+0x2dc>)
8004044: f001 ff97 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004048: 88bb ldrh r3, [r7, #4]
800404a: 461a mov r2, r3
800404c: 2104 movs r1, #4
800404e: 4831 ldr r0, [pc, #196] @ (8004114 <SetMot+0x2e0>)
8004050: f7ff fe9c bl 8003d8c <StartMot>
break;
8004054: e055 b.n 8004102 <SetMot+0x2ce>
case 4:
if(dir==FW){
8004056: 79bb ldrb r3, [r7, #6]
8004058: 2b00 cmp r3, #0
800405a: d128 bne.n 80040ae <SetMot+0x27a>
if(pwmval==0){
800405c: 88bb ldrh r3, [r7, #4]
800405e: 2b00 cmp r3, #0
8004060: d10a bne.n 8004078 <SetMot+0x244>
StopMot(timMot4,FWMot4);
8004062: 2108 movs r1, #8
8004064: 482b ldr r0, [pc, #172] @ (8004114 <SetMot+0x2e0>)
8004066: f7ff fe84 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
800406a: 2200 movs r2, #0
800406c: f44f 6100 mov.w r1, #2048 @ 0x800
8004070: 4827 ldr r0, [pc, #156] @ (8004110 <SetMot+0x2dc>)
8004072: f001 ff80 bl 8005f76 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8004076: e044 b.n 8004102 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004078: 2108 movs r1, #8
800407a: 4826 ldr r0, [pc, #152] @ (8004114 <SetMot+0x2e0>)
800407c: f7ff fe64 bl 8003d48 <IsPwmRunning>
8004080: 4603 mov r3, r0
8004082: 2b00 cmp r3, #0
8004084: d006 beq.n 8004094 <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
8004086: 88bb ldrh r3, [r7, #4]
8004088: 461a mov r2, r3
800408a: 2108 movs r1, #8
800408c: 4821 ldr r0, [pc, #132] @ (8004114 <SetMot+0x2e0>)
800408e: f7ff fea8 bl 8003de2 <SetMotPwm>
break;
8004092: e036 b.n 8004102 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004094: 2201 movs r2, #1
8004096: f44f 6100 mov.w r1, #2048 @ 0x800
800409a: 481d ldr r0, [pc, #116] @ (8004110 <SetMot+0x2dc>)
800409c: f001 ff6b bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
80040a0: 88bb ldrh r3, [r7, #4]
80040a2: 461a mov r2, r3
80040a4: 2108 movs r1, #8
80040a6: 481b ldr r0, [pc, #108] @ (8004114 <SetMot+0x2e0>)
80040a8: f7ff fe70 bl 8003d8c <StartMot>
break;
80040ac: e029 b.n 8004102 <SetMot+0x2ce>
if(pwmval==0){
80040ae: 88bb ldrh r3, [r7, #4]
80040b0: 2b00 cmp r3, #0
80040b2: d10a bne.n 80040ca <SetMot+0x296>
StopMot(timMot4,BWMot4);
80040b4: 210c movs r1, #12
80040b6: 4817 ldr r0, [pc, #92] @ (8004114 <SetMot+0x2e0>)
80040b8: f7ff fe5b bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80040bc: 2200 movs r2, #0
80040be: f44f 6100 mov.w r1, #2048 @ 0x800
80040c2: 4813 ldr r0, [pc, #76] @ (8004110 <SetMot+0x2dc>)
80040c4: f001 ff57 bl 8005f76 <HAL_GPIO_WritePin>
break;
80040c8: e01b b.n 8004102 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
80040ca: 210c movs r1, #12
80040cc: 4811 ldr r0, [pc, #68] @ (8004114 <SetMot+0x2e0>)
80040ce: f7ff fe3b bl 8003d48 <IsPwmRunning>
80040d2: 4603 mov r3, r0
80040d4: 2b00 cmp r3, #0
80040d6: d006 beq.n 80040e6 <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
80040d8: 88bb ldrh r3, [r7, #4]
80040da: 461a mov r2, r3
80040dc: 210c movs r1, #12
80040de: 480d ldr r0, [pc, #52] @ (8004114 <SetMot+0x2e0>)
80040e0: f7ff fe7f bl 8003de2 <SetMotPwm>
break;
80040e4: e00d b.n 8004102 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80040e6: 2201 movs r2, #1
80040e8: f44f 6100 mov.w r1, #2048 @ 0x800
80040ec: 4808 ldr r0, [pc, #32] @ (8004110 <SetMot+0x2dc>)
80040ee: f001 ff42 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
80040f2: 88bb ldrh r3, [r7, #4]
80040f4: 461a mov r2, r3
80040f6: 210c movs r1, #12
80040f8: 4806 ldr r0, [pc, #24] @ (8004114 <SetMot+0x2e0>)
80040fa: f7ff fe47 bl 8003d8c <StartMot>
break;
80040fe: e000 b.n 8004102 <SetMot+0x2ce>
default:
break;
8004100: bf00 nop
}
}
8004102: bf00 nop
8004104: 3708 adds r7, #8
8004106: 46bd mov sp, r7
8004108: bd80 pop {r7, pc}
800410a: bf00 nop
800410c: 20000318 .word 0x20000318
8004110: 40010c00 .word 0x40010c00
8004114: 20000360 .word 0x20000360
08004118 <SetMotPerc>:
void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){
8004118: b580 push {r7, lr}
800411a: b084 sub sp, #16
800411c: af00 add r7, sp, #0
800411e: 4603 mov r3, r0
8004120: 71fb strb r3, [r7, #7]
8004122: 460b mov r3, r1
8004124: 71bb strb r3, [r7, #6]
8004126: 4613 mov r3, r2
8004128: 717b strb r3, [r7, #5]
uint16_t pwmval;
uint32_t tempval;
tempval=perc;
800412a: 797b ldrb r3, [r7, #5]
800412c: 60fb str r3, [r7, #12]
tempval*=16384;
800412e: 68fb ldr r3, [r7, #12]
8004130: 039b lsls r3, r3, #14
8004132: 60fb str r3, [r7, #12]
tempval/=100;
8004134: 68fb ldr r3, [r7, #12]
8004136: 4ab4 ldr r2, [pc, #720] @ (8004408 <SetMotPerc+0x2f0>)
8004138: fba2 2303 umull r2, r3, r2, r3
800413c: 095b lsrs r3, r3, #5
800413e: 60fb str r3, [r7, #12]
pwmval=(uint16_t)tempval;
8004140: 68fb ldr r3, [r7, #12]
8004142: 817b strh r3, [r7, #10]
switch(mot){
8004144: 79fb ldrb r3, [r7, #7]
8004146: 3b01 subs r3, #1
8004148: 2b03 cmp r3, #3
800414a: f200 8157 bhi.w 80043fc <SetMotPerc+0x2e4>
800414e: a201 add r2, pc, #4 @ (adr r2, 8004154 <SetMotPerc+0x3c>)
8004150: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004154: 08004165 .word 0x08004165
8004158: 08004207 .word 0x08004207
800415c: 080042a9 .word 0x080042a9
8004160: 08004353 .word 0x08004353
case 1:
if(dir==FW){
8004164: 79bb ldrb r3, [r7, #6]
8004166: 2b00 cmp r3, #0
8004168: d126 bne.n 80041b8 <SetMotPerc+0xa0>
if(pwmval==0){
800416a: 897b ldrh r3, [r7, #10]
800416c: 2b00 cmp r3, #0
800416e: d109 bne.n 8004184 <SetMotPerc+0x6c>
StopMot(timMot1,FWMot1);
8004170: 2100 movs r1, #0
8004172: 48a6 ldr r0, [pc, #664] @ (800440c <SetMotPerc+0x2f4>)
8004174: f7ff fdfd bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004178: 2200 movs r2, #0
800417a: 2102 movs r1, #2
800417c: 48a4 ldr r0, [pc, #656] @ (8004410 <SetMotPerc+0x2f8>)
800417e: f001 fefa bl 8005f76 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8004182: e13c b.n 80043fe <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, FWMot1)){
8004184: 2100 movs r1, #0
8004186: 48a1 ldr r0, [pc, #644] @ (800440c <SetMotPerc+0x2f4>)
8004188: f7ff fdde bl 8003d48 <IsPwmRunning>
800418c: 4603 mov r3, r0
800418e: 2b00 cmp r3, #0
8004190: d006 beq.n 80041a0 <SetMotPerc+0x88>
SetMotPwm(timMot1,FWMot1,pwmval);
8004192: 897b ldrh r3, [r7, #10]
8004194: 461a mov r2, r3
8004196: 2100 movs r1, #0
8004198: 489c ldr r0, [pc, #624] @ (800440c <SetMotPerc+0x2f4>)
800419a: f7ff fe22 bl 8003de2 <SetMotPwm>
break;
800419e: e12e b.n 80043fe <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80041a0: 2201 movs r2, #1
80041a2: 2102 movs r1, #2
80041a4: 489a ldr r0, [pc, #616] @ (8004410 <SetMotPerc+0x2f8>)
80041a6: f001 fee6 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
80041aa: 897b ldrh r3, [r7, #10]
80041ac: 461a mov r2, r3
80041ae: 2100 movs r1, #0
80041b0: 4896 ldr r0, [pc, #600] @ (800440c <SetMotPerc+0x2f4>)
80041b2: f7ff fdeb bl 8003d8c <StartMot>
break;
80041b6: e122 b.n 80043fe <SetMotPerc+0x2e6>
if(pwmval==0){
80041b8: 897b ldrh r3, [r7, #10]
80041ba: 2b00 cmp r3, #0
80041bc: d109 bne.n 80041d2 <SetMotPerc+0xba>
StopMot(timMot1,BWMot1);
80041be: 2104 movs r1, #4
80041c0: 4892 ldr r0, [pc, #584] @ (800440c <SetMotPerc+0x2f4>)
80041c2: f7ff fdd6 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80041c6: 2200 movs r2, #0
80041c8: 2102 movs r1, #2
80041ca: 4891 ldr r0, [pc, #580] @ (8004410 <SetMotPerc+0x2f8>)
80041cc: f001 fed3 bl 8005f76 <HAL_GPIO_WritePin>
break;
80041d0: e115 b.n 80043fe <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, BWMot1)){
80041d2: 2104 movs r1, #4
80041d4: 488d ldr r0, [pc, #564] @ (800440c <SetMotPerc+0x2f4>)
80041d6: f7ff fdb7 bl 8003d48 <IsPwmRunning>
80041da: 4603 mov r3, r0
80041dc: 2b00 cmp r3, #0
80041de: d006 beq.n 80041ee <SetMotPerc+0xd6>
SetMotPwm(timMot1,BWMot1,pwmval);
80041e0: 897b ldrh r3, [r7, #10]
80041e2: 461a mov r2, r3
80041e4: 2104 movs r1, #4
80041e6: 4889 ldr r0, [pc, #548] @ (800440c <SetMotPerc+0x2f4>)
80041e8: f7ff fdfb bl 8003de2 <SetMotPwm>
break;
80041ec: e107 b.n 80043fe <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80041ee: 2201 movs r2, #1
80041f0: 2102 movs r1, #2
80041f2: 4887 ldr r0, [pc, #540] @ (8004410 <SetMotPerc+0x2f8>)
80041f4: f001 febf bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
80041f8: 897b ldrh r3, [r7, #10]
80041fa: 461a mov r2, r3
80041fc: 2104 movs r1, #4
80041fe: 4883 ldr r0, [pc, #524] @ (800440c <SetMotPerc+0x2f4>)
8004200: f7ff fdc4 bl 8003d8c <StartMot>
break;
8004204: e0fb b.n 80043fe <SetMotPerc+0x2e6>
case 2:
if(dir==FW){
8004206: 79bb ldrb r3, [r7, #6]
8004208: 2b00 cmp r3, #0
800420a: d126 bne.n 800425a <SetMotPerc+0x142>
if(pwmval==0){
800420c: 897b ldrh r3, [r7, #10]
800420e: 2b00 cmp r3, #0
8004210: d109 bne.n 8004226 <SetMotPerc+0x10e>
StopMot(timMot2,FWMot2);
8004212: 2108 movs r1, #8
8004214: 487d ldr r0, [pc, #500] @ (800440c <SetMotPerc+0x2f4>)
8004216: f7ff fdac bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
800421a: 2200 movs r2, #0
800421c: 2104 movs r1, #4
800421e: 487c ldr r0, [pc, #496] @ (8004410 <SetMotPerc+0x2f8>)
8004220: f001 fea9 bl 8005f76 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8004224: e0eb b.n 80043fe <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, FWMot2)){
8004226: 2108 movs r1, #8
8004228: 4878 ldr r0, [pc, #480] @ (800440c <SetMotPerc+0x2f4>)
800422a: f7ff fd8d bl 8003d48 <IsPwmRunning>
800422e: 4603 mov r3, r0
8004230: 2b00 cmp r3, #0
8004232: d006 beq.n 8004242 <SetMotPerc+0x12a>
SetMotPwm(timMot2,FWMot2,pwmval);
8004234: 897b ldrh r3, [r7, #10]
8004236: 461a mov r2, r3
8004238: 2108 movs r1, #8
800423a: 4874 ldr r0, [pc, #464] @ (800440c <SetMotPerc+0x2f4>)
800423c: f7ff fdd1 bl 8003de2 <SetMotPwm>
break;
8004240: e0dd b.n 80043fe <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004242: 2201 movs r2, #1
8004244: 2104 movs r1, #4
8004246: 4872 ldr r0, [pc, #456] @ (8004410 <SetMotPerc+0x2f8>)
8004248: f001 fe95 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
800424c: 897b ldrh r3, [r7, #10]
800424e: 461a mov r2, r3
8004250: 2108 movs r1, #8
8004252: 486e ldr r0, [pc, #440] @ (800440c <SetMotPerc+0x2f4>)
8004254: f7ff fd9a bl 8003d8c <StartMot>
break;
8004258: e0d1 b.n 80043fe <SetMotPerc+0x2e6>
if(pwmval==0){
800425a: 897b ldrh r3, [r7, #10]
800425c: 2b00 cmp r3, #0
800425e: d109 bne.n 8004274 <SetMotPerc+0x15c>
StopMot(timMot2,BWMot2);
8004260: 210c movs r1, #12
8004262: 486a ldr r0, [pc, #424] @ (800440c <SetMotPerc+0x2f4>)
8004264: f7ff fd85 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8004268: 2200 movs r2, #0
800426a: 2104 movs r1, #4
800426c: 4868 ldr r0, [pc, #416] @ (8004410 <SetMotPerc+0x2f8>)
800426e: f001 fe82 bl 8005f76 <HAL_GPIO_WritePin>
break;
8004272: e0c4 b.n 80043fe <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, BWMot2)){
8004274: 210c movs r1, #12
8004276: 4865 ldr r0, [pc, #404] @ (800440c <SetMotPerc+0x2f4>)
8004278: f7ff fd66 bl 8003d48 <IsPwmRunning>
800427c: 4603 mov r3, r0
800427e: 2b00 cmp r3, #0
8004280: d006 beq.n 8004290 <SetMotPerc+0x178>
SetMotPwm(timMot2,BWMot2,pwmval);
8004282: 897b ldrh r3, [r7, #10]
8004284: 461a mov r2, r3
8004286: 210c movs r1, #12
8004288: 4860 ldr r0, [pc, #384] @ (800440c <SetMotPerc+0x2f4>)
800428a: f7ff fdaa bl 8003de2 <SetMotPwm>
break;
800428e: e0b6 b.n 80043fe <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004290: 2201 movs r2, #1
8004292: 2104 movs r1, #4
8004294: 485e ldr r0, [pc, #376] @ (8004410 <SetMotPerc+0x2f8>)
8004296: f001 fe6e bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
800429a: 897b ldrh r3, [r7, #10]
800429c: 461a mov r2, r3
800429e: 210c movs r1, #12
80042a0: 485a ldr r0, [pc, #360] @ (800440c <SetMotPerc+0x2f4>)
80042a2: f7ff fd73 bl 8003d8c <StartMot>
break;
80042a6: e0aa b.n 80043fe <SetMotPerc+0x2e6>
case 3:
if(dir==FW){
80042a8: 79bb ldrb r3, [r7, #6]
80042aa: 2b00 cmp r3, #0
80042ac: d128 bne.n 8004300 <SetMotPerc+0x1e8>
if(pwmval==0){
80042ae: 897b ldrh r3, [r7, #10]
80042b0: 2b00 cmp r3, #0
80042b2: d10a bne.n 80042ca <SetMotPerc+0x1b2>
StopMot(timMot3,FWMot3);
80042b4: 2100 movs r1, #0
80042b6: 4857 ldr r0, [pc, #348] @ (8004414 <SetMotPerc+0x2fc>)
80042b8: f7ff fd5b bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
80042bc: 2200 movs r2, #0
80042be: f44f 6180 mov.w r1, #1024 @ 0x400
80042c2: 4853 ldr r0, [pc, #332] @ (8004410 <SetMotPerc+0x2f8>)
80042c4: f001 fe57 bl 8005f76 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
80042c8: e099 b.n 80043fe <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, FWMot3)){
80042ca: 2100 movs r1, #0
80042cc: 4851 ldr r0, [pc, #324] @ (8004414 <SetMotPerc+0x2fc>)
80042ce: f7ff fd3b bl 8003d48 <IsPwmRunning>
80042d2: 4603 mov r3, r0
80042d4: 2b00 cmp r3, #0
80042d6: d006 beq.n 80042e6 <SetMotPerc+0x1ce>
SetMotPwm(timMot3,FWMot3,pwmval);
80042d8: 897b ldrh r3, [r7, #10]
80042da: 461a mov r2, r3
80042dc: 2100 movs r1, #0
80042de: 484d ldr r0, [pc, #308] @ (8004414 <SetMotPerc+0x2fc>)
80042e0: f7ff fd7f bl 8003de2 <SetMotPwm>
break;
80042e4: e08b b.n 80043fe <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80042e6: 2201 movs r2, #1
80042e8: f44f 6180 mov.w r1, #1024 @ 0x400
80042ec: 4848 ldr r0, [pc, #288] @ (8004410 <SetMotPerc+0x2f8>)
80042ee: f001 fe42 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
80042f2: 897b ldrh r3, [r7, #10]
80042f4: 461a mov r2, r3
80042f6: 2100 movs r1, #0
80042f8: 4846 ldr r0, [pc, #280] @ (8004414 <SetMotPerc+0x2fc>)
80042fa: f7ff fd47 bl 8003d8c <StartMot>
break;
80042fe: e07e b.n 80043fe <SetMotPerc+0x2e6>
if(pwmval==0){
8004300: 897b ldrh r3, [r7, #10]
8004302: 2b00 cmp r3, #0
8004304: d10a bne.n 800431c <SetMotPerc+0x204>
StopMot(timMot3,BWMot3);
8004306: 2104 movs r1, #4
8004308: 4842 ldr r0, [pc, #264] @ (8004414 <SetMotPerc+0x2fc>)
800430a: f7ff fd32 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
800430e: 2200 movs r2, #0
8004310: f44f 6180 mov.w r1, #1024 @ 0x400
8004314: 483e ldr r0, [pc, #248] @ (8004410 <SetMotPerc+0x2f8>)
8004316: f001 fe2e bl 8005f76 <HAL_GPIO_WritePin>
break;
800431a: e070 b.n 80043fe <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, BWMot3)){
800431c: 2104 movs r1, #4
800431e: 483d ldr r0, [pc, #244] @ (8004414 <SetMotPerc+0x2fc>)
8004320: f7ff fd12 bl 8003d48 <IsPwmRunning>
8004324: 4603 mov r3, r0
8004326: 2b00 cmp r3, #0
8004328: d006 beq.n 8004338 <SetMotPerc+0x220>
SetMotPwm(timMot3,BWMot3,pwmval);
800432a: 897b ldrh r3, [r7, #10]
800432c: 461a mov r2, r3
800432e: 2104 movs r1, #4
8004330: 4838 ldr r0, [pc, #224] @ (8004414 <SetMotPerc+0x2fc>)
8004332: f7ff fd56 bl 8003de2 <SetMotPwm>
break;
8004336: e062 b.n 80043fe <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8004338: 2201 movs r2, #1
800433a: f44f 6180 mov.w r1, #1024 @ 0x400
800433e: 4834 ldr r0, [pc, #208] @ (8004410 <SetMotPerc+0x2f8>)
8004340: f001 fe19 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004344: 897b ldrh r3, [r7, #10]
8004346: 461a mov r2, r3
8004348: 2104 movs r1, #4
800434a: 4832 ldr r0, [pc, #200] @ (8004414 <SetMotPerc+0x2fc>)
800434c: f7ff fd1e bl 8003d8c <StartMot>
break;
8004350: e055 b.n 80043fe <SetMotPerc+0x2e6>
case 4:
if(dir==FW){
8004352: 79bb ldrb r3, [r7, #6]
8004354: 2b00 cmp r3, #0
8004356: d128 bne.n 80043aa <SetMotPerc+0x292>
if(pwmval==0){
8004358: 897b ldrh r3, [r7, #10]
800435a: 2b00 cmp r3, #0
800435c: d10a bne.n 8004374 <SetMotPerc+0x25c>
StopMot(timMot4,FWMot4);
800435e: 2108 movs r1, #8
8004360: 482c ldr r0, [pc, #176] @ (8004414 <SetMotPerc+0x2fc>)
8004362: f7ff fd06 bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004366: 2200 movs r2, #0
8004368: f44f 6100 mov.w r1, #2048 @ 0x800
800436c: 4828 ldr r0, [pc, #160] @ (8004410 <SetMotPerc+0x2f8>)
800436e: f001 fe02 bl 8005f76 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8004372: e044 b.n 80043fe <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004374: 2108 movs r1, #8
8004376: 4827 ldr r0, [pc, #156] @ (8004414 <SetMotPerc+0x2fc>)
8004378: f7ff fce6 bl 8003d48 <IsPwmRunning>
800437c: 4603 mov r3, r0
800437e: 2b00 cmp r3, #0
8004380: d006 beq.n 8004390 <SetMotPerc+0x278>
SetMotPwm(timMot4,FWMot4,pwmval);
8004382: 897b ldrh r3, [r7, #10]
8004384: 461a mov r2, r3
8004386: 2108 movs r1, #8
8004388: 4822 ldr r0, [pc, #136] @ (8004414 <SetMotPerc+0x2fc>)
800438a: f7ff fd2a bl 8003de2 <SetMotPwm>
break;
800438e: e036 b.n 80043fe <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004390: 2201 movs r2, #1
8004392: f44f 6100 mov.w r1, #2048 @ 0x800
8004396: 481e ldr r0, [pc, #120] @ (8004410 <SetMotPerc+0x2f8>)
8004398: f001 fded bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
800439c: 897b ldrh r3, [r7, #10]
800439e: 461a mov r2, r3
80043a0: 2108 movs r1, #8
80043a2: 481c ldr r0, [pc, #112] @ (8004414 <SetMotPerc+0x2fc>)
80043a4: f7ff fcf2 bl 8003d8c <StartMot>
break;
80043a8: e029 b.n 80043fe <SetMotPerc+0x2e6>
if(pwmval==0){
80043aa: 897b ldrh r3, [r7, #10]
80043ac: 2b00 cmp r3, #0
80043ae: d10a bne.n 80043c6 <SetMotPerc+0x2ae>
StopMot(timMot4,BWMot4);
80043b0: 210c movs r1, #12
80043b2: 4818 ldr r0, [pc, #96] @ (8004414 <SetMotPerc+0x2fc>)
80043b4: f7ff fcdd bl 8003d72 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80043b8: 2200 movs r2, #0
80043ba: f44f 6100 mov.w r1, #2048 @ 0x800
80043be: 4814 ldr r0, [pc, #80] @ (8004410 <SetMotPerc+0x2f8>)
80043c0: f001 fdd9 bl 8005f76 <HAL_GPIO_WritePin>
break;
80043c4: e01b b.n 80043fe <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, BWMot4)){
80043c6: 210c movs r1, #12
80043c8: 4812 ldr r0, [pc, #72] @ (8004414 <SetMotPerc+0x2fc>)
80043ca: f7ff fcbd bl 8003d48 <IsPwmRunning>
80043ce: 4603 mov r3, r0
80043d0: 2b00 cmp r3, #0
80043d2: d006 beq.n 80043e2 <SetMotPerc+0x2ca>
SetMotPwm(timMot4,BWMot4,pwmval);
80043d4: 897b ldrh r3, [r7, #10]
80043d6: 461a mov r2, r3
80043d8: 210c movs r1, #12
80043da: 480e ldr r0, [pc, #56] @ (8004414 <SetMotPerc+0x2fc>)
80043dc: f7ff fd01 bl 8003de2 <SetMotPwm>
break;
80043e0: e00d b.n 80043fe <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80043e2: 2201 movs r2, #1
80043e4: f44f 6100 mov.w r1, #2048 @ 0x800
80043e8: 4809 ldr r0, [pc, #36] @ (8004410 <SetMotPerc+0x2f8>)
80043ea: f001 fdc4 bl 8005f76 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
80043ee: 897b ldrh r3, [r7, #10]
80043f0: 461a mov r2, r3
80043f2: 210c movs r1, #12
80043f4: 4807 ldr r0, [pc, #28] @ (8004414 <SetMotPerc+0x2fc>)
80043f6: f7ff fcc9 bl 8003d8c <StartMot>
break;
80043fa: e000 b.n 80043fe <SetMotPerc+0x2e6>
default:
break;
80043fc: bf00 nop
}
}
80043fe: bf00 nop
8004400: 3710 adds r7, #16
8004402: 46bd mov sp, r7
8004404: bd80 pop {r7, pc}
8004406: bf00 nop
8004408: 51eb851f .word 0x51eb851f
800440c: 20000318 .word 0x20000318
8004410: 40010c00 .word 0x40010c00
8004414: 20000360 .word 0x20000360
08004418 <ramp>:
uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){
8004418: b590 push {r4, r7, lr}
800441a: b085 sub sp, #20
800441c: af00 add r7, sp, #0
800441e: 4604 mov r4, r0
8004420: 4608 mov r0, r1
8004422: 4611 mov r1, r2
8004424: 461a mov r2, r3
8004426: 4623 mov r3, r4
8004428: 71fb strb r3, [r7, #7]
800442a: 4603 mov r3, r0
800442c: 71bb strb r3, [r7, #6]
800442e: 460b mov r3, r1
8004430: 717b strb r3, [r7, #5]
8004432: 4613 mov r3, r2
8004434: 713b strb r3, [r7, #4]
static uint8_t memrtramp[4];
// char s[10];
uint16_t delta;
switch(mode){
8004436: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
800443a: 2b00 cmp r3, #0
800443c: d002 beq.n 8004444 <ramp+0x2c>
800443e: 2b0a cmp r3, #10
8004440: d016 beq.n 8004470 <ramp+0x58>
8004442: e09d b.n 8004580 <ramp+0x168>
case RAMPINIT:
memrtramp[mot-1]=rtramp[mot-1]=tr;
8004444: 79fb ldrb r3, [r7, #7]
8004446: 3b01 subs r3, #1
8004448: f897 2020 ldrb.w r2, [r7, #32]
800444c: b291 uxth r1, r2
800444e: 4a4f ldr r2, [pc, #316] @ (800458c <ramp+0x174>)
8004450: 4608 mov r0, r1
8004452: f822 0013 strh.w r0, [r2, r3, lsl #1]
8004456: 79fb ldrb r3, [r7, #7]
8004458: 3b01 subs r3, #1
800445a: b2c9 uxtb r1, r1
800445c: 4a4c ldr r2, [pc, #304] @ (8004590 <ramp+0x178>)
800445e: 54d1 strb r1, [r2, r3]
SetMotPerc(mot,dir,percStart);
8004460: 797a ldrb r2, [r7, #5]
8004462: 79b9 ldrb r1, [r7, #6]
8004464: 79fb ldrb r3, [r7, #7]
8004466: 4618 mov r0, r3
8004468: f7ff fe56 bl 8004118 <SetMotPerc>
return DONE;
800446c: 2300 movs r3, #0
800446e: e088 b.n 8004582 <ramp+0x16a>
case RAMPRUN:
if(memrtramp[mot-1]!=rtramp[mot-1]){
8004470: 79fb ldrb r3, [r7, #7]
8004472: 3b01 subs r3, #1
8004474: 4a46 ldr r2, [pc, #280] @ (8004590 <ramp+0x178>)
8004476: 5cd3 ldrb r3, [r2, r3]
8004478: 4619 mov r1, r3
800447a: 79fb ldrb r3, [r7, #7]
800447c: 3b01 subs r3, #1
800447e: 4a43 ldr r2, [pc, #268] @ (800458c <ramp+0x174>)
8004480: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004484: b29b uxth r3, r3
8004486: 4299 cmp r1, r3
8004488: d078 beq.n 800457c <ramp+0x164>
memrtramp[mot-1]=rtramp[mot-1];
800448a: 79fb ldrb r3, [r7, #7]
800448c: 3b01 subs r3, #1
800448e: 4a3f ldr r2, [pc, #252] @ (800458c <ramp+0x174>)
8004490: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004494: b29a uxth r2, r3
8004496: 79fb ldrb r3, [r7, #7]
8004498: 3b01 subs r3, #1
800449a: b2d1 uxtb r1, r2
800449c: 4a3c ldr r2, [pc, #240] @ (8004590 <ramp+0x178>)
800449e: 54d1 strb r1, [r2, r3]
if(rtramp[mot-1]){
80044a0: 79fb ldrb r3, [r7, #7]
80044a2: 3b01 subs r3, #1
80044a4: 4a39 ldr r2, [pc, #228] @ (800458c <ramp+0x174>)
80044a6: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80044aa: b29b uxth r3, r3
80044ac: 2b00 cmp r3, #0
80044ae: d05d beq.n 800456c <ramp+0x154>
if(percStart>percEnd){
80044b0: 797a ldrb r2, [r7, #5]
80044b2: 793b ldrb r3, [r7, #4]
80044b4: 429a cmp r2, r3
80044b6: d926 bls.n 8004506 <ramp+0xee>
delta=percStart-percEnd;
80044b8: 797b ldrb r3, [r7, #5]
80044ba: b29a uxth r2, r3
80044bc: 793b ldrb r3, [r7, #4]
80044be: b29b uxth r3, r3
80044c0: 1ad3 subs r3, r2, r3
80044c2: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
80044c4: f897 3020 ldrb.w r3, [r7, #32]
80044c8: b29a uxth r2, r3
80044ca: 79fb ldrb r3, [r7, #7]
80044cc: 3b01 subs r3, #1
80044ce: 492f ldr r1, [pc, #188] @ (800458c <ramp+0x174>)
80044d0: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
80044d4: b29b uxth r3, r3
80044d6: 1ad3 subs r3, r2, r3
80044d8: b29b uxth r3, r3
80044da: 89fa ldrh r2, [r7, #14]
80044dc: fb02 f303 mul.w r3, r2, r3
80044e0: 81fb strh r3, [r7, #14]
delta=delta/tr;
80044e2: 89fa ldrh r2, [r7, #14]
80044e4: f897 3020 ldrb.w r3, [r7, #32]
80044e8: fb92 f3f3 sdiv r3, r2, r3
80044ec: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart-delta);
80044ee: 89fb ldrh r3, [r7, #14]
80044f0: b2db uxtb r3, r3
80044f2: 797a ldrb r2, [r7, #5]
80044f4: 1ad3 subs r3, r2, r3
80044f6: b2da uxtb r2, r3
80044f8: 79b9 ldrb r1, [r7, #6]
80044fa: 79fb ldrb r3, [r7, #7]
80044fc: 4618 mov r0, r3
80044fe: f7ff fe0b bl 8004118 <SetMotPerc>
return RUNNING;
8004502: 2301 movs r3, #1
8004504: e03d b.n 8004582 <ramp+0x16a>
}else if(percStart<percEnd){
8004506: 797a ldrb r2, [r7, #5]
8004508: 793b ldrb r3, [r7, #4]
800450a: 429a cmp r2, r3
800450c: d226 bcs.n 800455c <ramp+0x144>
delta=percEnd-percStart;
800450e: 793b ldrb r3, [r7, #4]
8004510: b29a uxth r2, r3
8004512: 797b ldrb r3, [r7, #5]
8004514: b29b uxth r3, r3
8004516: 1ad3 subs r3, r2, r3
8004518: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
800451a: f897 3020 ldrb.w r3, [r7, #32]
800451e: b29a uxth r2, r3
8004520: 79fb ldrb r3, [r7, #7]
8004522: 3b01 subs r3, #1
8004524: 4919 ldr r1, [pc, #100] @ (800458c <ramp+0x174>)
8004526: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
800452a: b29b uxth r3, r3
800452c: 1ad3 subs r3, r2, r3
800452e: b29b uxth r3, r3
8004530: 89fa ldrh r2, [r7, #14]
8004532: fb02 f303 mul.w r3, r2, r3
8004536: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004538: 89fa ldrh r2, [r7, #14]
800453a: f897 3020 ldrb.w r3, [r7, #32]
800453e: fb92 f3f3 sdiv r3, r2, r3
8004542: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart+delta);
8004544: 89fb ldrh r3, [r7, #14]
8004546: b2da uxtb r2, r3
8004548: 797b ldrb r3, [r7, #5]
800454a: 4413 add r3, r2
800454c: b2da uxtb r2, r3
800454e: 79b9 ldrb r1, [r7, #6]
8004550: 79fb ldrb r3, [r7, #7]
8004552: 4618 mov r0, r3
8004554: f7ff fde0 bl 8004118 <SetMotPerc>
// sprintf((char*)s,"\n%d",percStart+delta);
// HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
return RUNNING;
8004558: 2301 movs r3, #1
800455a: e012 b.n 8004582 <ramp+0x16a>
}else{
SetMotPerc(mot,dir,percEnd);
800455c: 793a ldrb r2, [r7, #4]
800455e: 79b9 ldrb r1, [r7, #6]
8004560: 79fb ldrb r3, [r7, #7]
8004562: 4618 mov r0, r3
8004564: f7ff fdd8 bl 8004118 <SetMotPerc>
return DONE;
8004568: 2300 movs r3, #0
800456a: e00a b.n 8004582 <ramp+0x16a>
}
}else{
SetMotPerc(mot,dir,percEnd);
800456c: 793a ldrb r2, [r7, #4]
800456e: 79b9 ldrb r1, [r7, #6]
8004570: 79fb ldrb r3, [r7, #7]
8004572: 4618 mov r0, r3
8004574: f7ff fdd0 bl 8004118 <SetMotPerc>
return DONE;
8004578: 2300 movs r3, #0
800457a: e002 b.n 8004582 <ramp+0x16a>
}
}else return RUNNING;
800457c: 2301 movs r3, #1
800457e: e000 b.n 8004582 <ramp+0x16a>
break;
}
return DONE;
8004580: 2300 movs r3, #0
}
8004582: 4618 mov r0, r3
8004584: 3714 adds r7, #20
8004586: 46bd mov sp, r7
8004588: bd90 pop {r4, r7, pc}
800458a: bf00 nop
800458c: 200003f4 .word 0x200003f4
8004590: 20000464 .word 0x20000464
08004594 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8004594: b480 push {r7}
8004596: b085 sub sp, #20
8004598: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
800459a: 4b15 ldr r3, [pc, #84] @ (80045f0 <HAL_MspInit+0x5c>)
800459c: 699b ldr r3, [r3, #24]
800459e: 4a14 ldr r2, [pc, #80] @ (80045f0 <HAL_MspInit+0x5c>)
80045a0: f043 0301 orr.w r3, r3, #1
80045a4: 6193 str r3, [r2, #24]
80045a6: 4b12 ldr r3, [pc, #72] @ (80045f0 <HAL_MspInit+0x5c>)
80045a8: 699b ldr r3, [r3, #24]
80045aa: f003 0301 and.w r3, r3, #1
80045ae: 60bb str r3, [r7, #8]
80045b0: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
80045b2: 4b0f ldr r3, [pc, #60] @ (80045f0 <HAL_MspInit+0x5c>)
80045b4: 69db ldr r3, [r3, #28]
80045b6: 4a0e ldr r2, [pc, #56] @ (80045f0 <HAL_MspInit+0x5c>)
80045b8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80045bc: 61d3 str r3, [r2, #28]
80045be: 4b0c ldr r3, [pc, #48] @ (80045f0 <HAL_MspInit+0x5c>)
80045c0: 69db ldr r3, [r3, #28]
80045c2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80045c6: 607b str r3, [r7, #4]
80045c8: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
80045ca: 4b0a ldr r3, [pc, #40] @ (80045f4 <HAL_MspInit+0x60>)
80045cc: 685b ldr r3, [r3, #4]
80045ce: 60fb str r3, [r7, #12]
80045d0: 68fb ldr r3, [r7, #12]
80045d2: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
80045d6: 60fb str r3, [r7, #12]
80045d8: 68fb ldr r3, [r7, #12]
80045da: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
80045de: 60fb str r3, [r7, #12]
80045e0: 4a04 ldr r2, [pc, #16] @ (80045f4 <HAL_MspInit+0x60>)
80045e2: 68fb ldr r3, [r7, #12]
80045e4: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80045e6: bf00 nop
80045e8: 3714 adds r7, #20
80045ea: 46bd mov sp, r7
80045ec: bc80 pop {r7}
80045ee: 4770 bx lr
80045f0: 40021000 .word 0x40021000
80045f4: 40010000 .word 0x40010000
080045f8 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
80045f8: b580 push {r7, lr}
80045fa: b08a sub sp, #40 @ 0x28
80045fc: af00 add r7, sp, #0
80045fe: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004600: f107 0318 add.w r3, r7, #24
8004604: 2200 movs r2, #0
8004606: 601a str r2, [r3, #0]
8004608: 605a str r2, [r3, #4]
800460a: 609a str r2, [r3, #8]
800460c: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
800460e: 687b ldr r3, [r7, #4]
8004610: 681b ldr r3, [r3, #0]
8004612: 4a33 ldr r2, [pc, #204] @ (80046e0 <HAL_ADC_MspInit+0xe8>)
8004614: 4293 cmp r3, r2
8004616: d15f bne.n 80046d8 <HAL_ADC_MspInit+0xe0>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
8004618: 4b32 ldr r3, [pc, #200] @ (80046e4 <HAL_ADC_MspInit+0xec>)
800461a: 699b ldr r3, [r3, #24]
800461c: 4a31 ldr r2, [pc, #196] @ (80046e4 <HAL_ADC_MspInit+0xec>)
800461e: f443 7300 orr.w r3, r3, #512 @ 0x200
8004622: 6193 str r3, [r2, #24]
8004624: 4b2f ldr r3, [pc, #188] @ (80046e4 <HAL_ADC_MspInit+0xec>)
8004626: 699b ldr r3, [r3, #24]
8004628: f403 7300 and.w r3, r3, #512 @ 0x200
800462c: 617b str r3, [r7, #20]
800462e: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004630: 4b2c ldr r3, [pc, #176] @ (80046e4 <HAL_ADC_MspInit+0xec>)
8004632: 699b ldr r3, [r3, #24]
8004634: 4a2b ldr r2, [pc, #172] @ (80046e4 <HAL_ADC_MspInit+0xec>)
8004636: f043 0304 orr.w r3, r3, #4
800463a: 6193 str r3, [r2, #24]
800463c: 4b29 ldr r3, [pc, #164] @ (80046e4 <HAL_ADC_MspInit+0xec>)
800463e: 699b ldr r3, [r3, #24]
8004640: f003 0304 and.w r3, r3, #4
8004644: 613b str r3, [r7, #16]
8004646: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8004648: 4b26 ldr r3, [pc, #152] @ (80046e4 <HAL_ADC_MspInit+0xec>)
800464a: 699b ldr r3, [r3, #24]
800464c: 4a25 ldr r2, [pc, #148] @ (80046e4 <HAL_ADC_MspInit+0xec>)
800464e: f043 0308 orr.w r3, r3, #8
8004652: 6193 str r3, [r2, #24]
8004654: 4b23 ldr r3, [pc, #140] @ (80046e4 <HAL_ADC_MspInit+0xec>)
8004656: 699b ldr r3, [r3, #24]
8004658: f003 0308 and.w r3, r3, #8
800465c: 60fb str r3, [r7, #12]
800465e: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
8004660: 23f0 movs r3, #240 @ 0xf0
8004662: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004664: 2303 movs r3, #3
8004666: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004668: f107 0318 add.w r3, r7, #24
800466c: 4619 mov r1, r3
800466e: 481e ldr r0, [pc, #120] @ (80046e8 <HAL_ADC_MspInit+0xf0>)
8004670: f001 fae6 bl 8005c40 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8004674: 2301 movs r3, #1
8004676: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004678: 2303 movs r3, #3
800467a: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
800467c: f107 0318 add.w r3, r7, #24
8004680: 4619 mov r1, r3
8004682: 481a ldr r0, [pc, #104] @ (80046ec <HAL_ADC_MspInit+0xf4>)
8004684: f001 fadc bl 8005c40 <HAL_GPIO_Init>
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
8004688: 4b19 ldr r3, [pc, #100] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
800468a: 4a1a ldr r2, [pc, #104] @ (80046f4 <HAL_ADC_MspInit+0xfc>)
800468c: 601a str r2, [r3, #0]
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
800468e: 4b18 ldr r3, [pc, #96] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
8004690: 2200 movs r2, #0
8004692: 605a str r2, [r3, #4]
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
8004694: 4b16 ldr r3, [pc, #88] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
8004696: 2200 movs r2, #0
8004698: 609a str r2, [r3, #8]
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
800469a: 4b15 ldr r3, [pc, #84] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
800469c: 2280 movs r2, #128 @ 0x80
800469e: 60da str r2, [r3, #12]
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
80046a0: 4b13 ldr r3, [pc, #76] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
80046a2: f44f 7280 mov.w r2, #256 @ 0x100
80046a6: 611a str r2, [r3, #16]
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
80046a8: 4b11 ldr r3, [pc, #68] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
80046aa: f44f 6280 mov.w r2, #1024 @ 0x400
80046ae: 615a str r2, [r3, #20]
hdma_adc1.Init.Mode = DMA_CIRCULAR;
80046b0: 4b0f ldr r3, [pc, #60] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
80046b2: 2220 movs r2, #32
80046b4: 619a str r2, [r3, #24]
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
80046b6: 4b0e ldr r3, [pc, #56] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
80046b8: 2200 movs r2, #0
80046ba: 61da str r2, [r3, #28]
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
80046bc: 480c ldr r0, [pc, #48] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
80046be: f000 fed1 bl 8005464 <HAL_DMA_Init>
80046c2: 4603 mov r3, r0
80046c4: 2b00 cmp r3, #0
80046c6: d001 beq.n 80046cc <HAL_ADC_MspInit+0xd4>
{
Error_Handler();
80046c8: f7fe fca2 bl 8003010 <Error_Handler>
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
80046cc: 687b ldr r3, [r7, #4]
80046ce: 4a08 ldr r2, [pc, #32] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
80046d0: 621a str r2, [r3, #32]
80046d2: 4a07 ldr r2, [pc, #28] @ (80046f0 <HAL_ADC_MspInit+0xf8>)
80046d4: 687b ldr r3, [r7, #4]
80046d6: 6253 str r3, [r2, #36] @ 0x24
/* USER CODE END ADC1_MspInit 1 */
}
}
80046d8: bf00 nop
80046da: 3728 adds r7, #40 @ 0x28
80046dc: 46bd mov sp, r7
80046de: bd80 pop {r7, pc}
80046e0: 40012400 .word 0x40012400
80046e4: 40021000 .word 0x40021000
80046e8: 40010800 .word 0x40010800
80046ec: 40010c00 .word 0x40010c00
80046f0: 200002d4 .word 0x200002d4
80046f4: 40020008 .word 0x40020008
080046f8 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
80046f8: b480 push {r7}
80046fa: b085 sub sp, #20
80046fc: af00 add r7, sp, #0
80046fe: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8004700: 687b ldr r3, [r7, #4]
8004702: 681b ldr r3, [r3, #0]
8004704: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004708: d10c bne.n 8004724 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
800470a: 4b11 ldr r3, [pc, #68] @ (8004750 <HAL_TIM_Base_MspInit+0x58>)
800470c: 69db ldr r3, [r3, #28]
800470e: 4a10 ldr r2, [pc, #64] @ (8004750 <HAL_TIM_Base_MspInit+0x58>)
8004710: f043 0301 orr.w r3, r3, #1
8004714: 61d3 str r3, [r2, #28]
8004716: 4b0e ldr r3, [pc, #56] @ (8004750 <HAL_TIM_Base_MspInit+0x58>)
8004718: 69db ldr r3, [r3, #28]
800471a: f003 0301 and.w r3, r3, #1
800471e: 60fb str r3, [r7, #12]
8004720: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8004722: e010 b.n 8004746 <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8004724: 687b ldr r3, [r7, #4]
8004726: 681b ldr r3, [r3, #0]
8004728: 4a0a ldr r2, [pc, #40] @ (8004754 <HAL_TIM_Base_MspInit+0x5c>)
800472a: 4293 cmp r3, r2
800472c: d10b bne.n 8004746 <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
800472e: 4b08 ldr r3, [pc, #32] @ (8004750 <HAL_TIM_Base_MspInit+0x58>)
8004730: 69db ldr r3, [r3, #28]
8004732: 4a07 ldr r2, [pc, #28] @ (8004750 <HAL_TIM_Base_MspInit+0x58>)
8004734: f043 0304 orr.w r3, r3, #4
8004738: 61d3 str r3, [r2, #28]
800473a: 4b05 ldr r3, [pc, #20] @ (8004750 <HAL_TIM_Base_MspInit+0x58>)
800473c: 69db ldr r3, [r3, #28]
800473e: f003 0304 and.w r3, r3, #4
8004742: 60bb str r3, [r7, #8]
8004744: 68bb ldr r3, [r7, #8]
}
8004746: bf00 nop
8004748: 3714 adds r7, #20
800474a: 46bd mov sp, r7
800474c: bc80 pop {r7}
800474e: 4770 bx lr
8004750: 40021000 .word 0x40021000
8004754: 40000800 .word 0x40000800
08004758 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8004758: b580 push {r7, lr}
800475a: b088 sub sp, #32
800475c: af00 add r7, sp, #0
800475e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004760: f107 0310 add.w r3, r7, #16
8004764: 2200 movs r2, #0
8004766: 601a str r2, [r3, #0]
8004768: 605a str r2, [r3, #4]
800476a: 609a str r2, [r3, #8]
800476c: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
800476e: 687b ldr r3, [r7, #4]
8004770: 681b ldr r3, [r3, #0]
8004772: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004776: d118 bne.n 80047aa <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8004778: 4b1d ldr r3, [pc, #116] @ (80047f0 <HAL_TIM_MspPostInit+0x98>)
800477a: 699b ldr r3, [r3, #24]
800477c: 4a1c ldr r2, [pc, #112] @ (80047f0 <HAL_TIM_MspPostInit+0x98>)
800477e: f043 0304 orr.w r3, r3, #4
8004782: 6193 str r3, [r2, #24]
8004784: 4b1a ldr r3, [pc, #104] @ (80047f0 <HAL_TIM_MspPostInit+0x98>)
8004786: 699b ldr r3, [r3, #24]
8004788: f003 0304 and.w r3, r3, #4
800478c: 60fb str r3, [r7, #12]
800478e: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
8004790: 230f movs r3, #15
8004792: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004794: 2302 movs r3, #2
8004796: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004798: 2302 movs r3, #2
800479a: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800479c: f107 0310 add.w r3, r7, #16
80047a0: 4619 mov r1, r3
80047a2: 4814 ldr r0, [pc, #80] @ (80047f4 <HAL_TIM_MspPostInit+0x9c>)
80047a4: f001 fa4c bl 8005c40 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
80047a8: e01d b.n 80047e6 <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
80047aa: 687b ldr r3, [r7, #4]
80047ac: 681b ldr r3, [r3, #0]
80047ae: 4a12 ldr r2, [pc, #72] @ (80047f8 <HAL_TIM_MspPostInit+0xa0>)
80047b0: 4293 cmp r3, r2
80047b2: d118 bne.n 80047e6 <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
80047b4: 4b0e ldr r3, [pc, #56] @ (80047f0 <HAL_TIM_MspPostInit+0x98>)
80047b6: 699b ldr r3, [r3, #24]
80047b8: 4a0d ldr r2, [pc, #52] @ (80047f0 <HAL_TIM_MspPostInit+0x98>)
80047ba: f043 0308 orr.w r3, r3, #8
80047be: 6193 str r3, [r2, #24]
80047c0: 4b0b ldr r3, [pc, #44] @ (80047f0 <HAL_TIM_MspPostInit+0x98>)
80047c2: 699b ldr r3, [r3, #24]
80047c4: f003 0308 and.w r3, r3, #8
80047c8: 60bb str r3, [r7, #8]
80047ca: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
80047cc: f44f 7370 mov.w r3, #960 @ 0x3c0
80047d0: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80047d2: 2302 movs r3, #2
80047d4: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80047d6: 2302 movs r3, #2
80047d8: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80047da: f107 0310 add.w r3, r7, #16
80047de: 4619 mov r1, r3
80047e0: 4806 ldr r0, [pc, #24] @ (80047fc <HAL_TIM_MspPostInit+0xa4>)
80047e2: f001 fa2d bl 8005c40 <HAL_GPIO_Init>
}
80047e6: bf00 nop
80047e8: 3720 adds r7, #32
80047ea: 46bd mov sp, r7
80047ec: bd80 pop {r7, pc}
80047ee: bf00 nop
80047f0: 40021000 .word 0x40021000
80047f4: 40010800 .word 0x40010800
80047f8: 40000800 .word 0x40000800
80047fc: 40010c00 .word 0x40010c00
08004800 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8004800: b580 push {r7, lr}
8004802: b088 sub sp, #32
8004804: af00 add r7, sp, #0
8004806: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004808: f107 0310 add.w r3, r7, #16
800480c: 2200 movs r2, #0
800480e: 601a str r2, [r3, #0]
8004810: 605a str r2, [r3, #4]
8004812: 609a str r2, [r3, #8]
8004814: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
8004816: 687b ldr r3, [r7, #4]
8004818: 681b ldr r3, [r3, #0]
800481a: 4a1c ldr r2, [pc, #112] @ (800488c <HAL_UART_MspInit+0x8c>)
800481c: 4293 cmp r3, r2
800481e: d131 bne.n 8004884 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8004820: 4b1b ldr r3, [pc, #108] @ (8004890 <HAL_UART_MspInit+0x90>)
8004822: 699b ldr r3, [r3, #24]
8004824: 4a1a ldr r2, [pc, #104] @ (8004890 <HAL_UART_MspInit+0x90>)
8004826: f443 4380 orr.w r3, r3, #16384 @ 0x4000
800482a: 6193 str r3, [r2, #24]
800482c: 4b18 ldr r3, [pc, #96] @ (8004890 <HAL_UART_MspInit+0x90>)
800482e: 699b ldr r3, [r3, #24]
8004830: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004834: 60fb str r3, [r7, #12]
8004836: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004838: 4b15 ldr r3, [pc, #84] @ (8004890 <HAL_UART_MspInit+0x90>)
800483a: 699b ldr r3, [r3, #24]
800483c: 4a14 ldr r2, [pc, #80] @ (8004890 <HAL_UART_MspInit+0x90>)
800483e: f043 0304 orr.w r3, r3, #4
8004842: 6193 str r3, [r2, #24]
8004844: 4b12 ldr r3, [pc, #72] @ (8004890 <HAL_UART_MspInit+0x90>)
8004846: 699b ldr r3, [r3, #24]
8004848: f003 0304 and.w r3, r3, #4
800484c: 60bb str r3, [r7, #8]
800484e: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8004850: f44f 7300 mov.w r3, #512 @ 0x200
8004854: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004856: 2302 movs r3, #2
8004858: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
800485a: 2303 movs r3, #3
800485c: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800485e: f107 0310 add.w r3, r7, #16
8004862: 4619 mov r1, r3
8004864: 480b ldr r0, [pc, #44] @ (8004894 <HAL_UART_MspInit+0x94>)
8004866: f001 f9eb bl 8005c40 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
800486a: f44f 6380 mov.w r3, #1024 @ 0x400
800486e: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8004870: 2300 movs r3, #0
8004872: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8004874: 2300 movs r3, #0
8004876: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004878: f107 0310 add.w r3, r7, #16
800487c: 4619 mov r1, r3
800487e: 4805 ldr r0, [pc, #20] @ (8004894 <HAL_UART_MspInit+0x94>)
8004880: f001 f9de bl 8005c40 <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8004884: bf00 nop
8004886: 3720 adds r7, #32
8004888: 46bd mov sp, r7
800488a: bd80 pop {r7, pc}
800488c: 40013800 .word 0x40013800
8004890: 40021000 .word 0x40021000
8004894: 40010800 .word 0x40010800
08004898 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8004898: b480 push {r7}
800489a: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
800489c: bf00 nop
800489e: e7fd b.n 800489c <NMI_Handler+0x4>
080048a0 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
80048a0: b480 push {r7}
80048a2: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
80048a4: bf00 nop
80048a6: e7fd b.n 80048a4 <HardFault_Handler+0x4>
080048a8 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
80048a8: b480 push {r7}
80048aa: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
80048ac: bf00 nop
80048ae: e7fd b.n 80048ac <MemManage_Handler+0x4>
080048b0 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
80048b0: b480 push {r7}
80048b2: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
80048b4: bf00 nop
80048b6: e7fd b.n 80048b4 <BusFault_Handler+0x4>
080048b8 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
80048b8: b480 push {r7}
80048ba: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
80048bc: bf00 nop
80048be: e7fd b.n 80048bc <UsageFault_Handler+0x4>
080048c0 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
80048c0: b480 push {r7}
80048c2: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
80048c4: bf00 nop
80048c6: 46bd mov sp, r7
80048c8: bc80 pop {r7}
80048ca: 4770 bx lr
080048cc <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
80048cc: b480 push {r7}
80048ce: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
80048d0: bf00 nop
80048d2: 46bd mov sp, r7
80048d4: bc80 pop {r7}
80048d6: 4770 bx lr
080048d8 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
80048d8: b480 push {r7}
80048da: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
80048dc: bf00 nop
80048de: 46bd mov sp, r7
80048e0: bc80 pop {r7}
80048e2: 4770 bx lr
080048e4 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
80048e4: b580 push {r7, lr}
80048e6: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
80048e8: f000 f8c0 bl 8004a6c <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
80048ec: f000 fdb3 bl 8005456 <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
80048f0: bf00 nop
80048f2: bd80 pop {r7, pc}
080048f4 <DMA1_Channel1_IRQHandler>:
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
80048f4: b580 push {r7, lr}
80048f6: af00 add r7, sp, #0
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
80048f8: 4802 ldr r0, [pc, #8] @ (8004904 <DMA1_Channel1_IRQHandler+0x10>)
80048fa: f000 fe6d bl 80055d8 <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
80048fe: bf00 nop
8004900: bd80 pop {r7, pc}
8004902: bf00 nop
8004904: 200002d4 .word 0x200002d4
08004908 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8004908: b580 push {r7, lr}
800490a: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
800490c: 4802 ldr r0, [pc, #8] @ (8004918 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
800490e: f001 fc66 bl 80061de <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8004912: bf00 nop
8004914: bd80 pop {r7, pc}
8004916: bf00 nop
8004918: 2000125c .word 0x2000125c
0800491c <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
800491c: b580 push {r7, lr}
800491e: b086 sub sp, #24
8004920: af00 add r7, sp, #0
8004922: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8004924: 4a14 ldr r2, [pc, #80] @ (8004978 <_sbrk+0x5c>)
8004926: 4b15 ldr r3, [pc, #84] @ (800497c <_sbrk+0x60>)
8004928: 1ad3 subs r3, r2, r3
800492a: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
800492c: 697b ldr r3, [r7, #20]
800492e: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8004930: 4b13 ldr r3, [pc, #76] @ (8004980 <_sbrk+0x64>)
8004932: 681b ldr r3, [r3, #0]
8004934: 2b00 cmp r3, #0
8004936: d102 bne.n 800493e <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8004938: 4b11 ldr r3, [pc, #68] @ (8004980 <_sbrk+0x64>)
800493a: 4a12 ldr r2, [pc, #72] @ (8004984 <_sbrk+0x68>)
800493c: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
800493e: 4b10 ldr r3, [pc, #64] @ (8004980 <_sbrk+0x64>)
8004940: 681a ldr r2, [r3, #0]
8004942: 687b ldr r3, [r7, #4]
8004944: 4413 add r3, r2
8004946: 693a ldr r2, [r7, #16]
8004948: 429a cmp r2, r3
800494a: d207 bcs.n 800495c <_sbrk+0x40>
{
errno = ENOMEM;
800494c: f009 fa2c bl 800dda8 <__errno>
8004950: 4603 mov r3, r0
8004952: 220c movs r2, #12
8004954: 601a str r2, [r3, #0]
return (void *)-1;
8004956: f04f 33ff mov.w r3, #4294967295
800495a: e009 b.n 8004970 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
800495c: 4b08 ldr r3, [pc, #32] @ (8004980 <_sbrk+0x64>)
800495e: 681b ldr r3, [r3, #0]
8004960: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8004962: 4b07 ldr r3, [pc, #28] @ (8004980 <_sbrk+0x64>)
8004964: 681a ldr r2, [r3, #0]
8004966: 687b ldr r3, [r7, #4]
8004968: 4413 add r3, r2
800496a: 4a05 ldr r2, [pc, #20] @ (8004980 <_sbrk+0x64>)
800496c: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
800496e: 68fb ldr r3, [r7, #12]
}
8004970: 4618 mov r0, r3
8004972: 3718 adds r7, #24
8004974: 46bd mov sp, r7
8004976: bd80 pop {r7, pc}
8004978: 20005000 .word 0x20005000
800497c: 00000400 .word 0x00000400
8004980: 20000468 .word 0x20000468
8004984: 200018a0 .word 0x200018a0
08004988 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8004988: b480 push {r7}
800498a: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
800498c: bf00 nop
800498e: 46bd mov sp, r7
8004990: bc80 pop {r7}
8004992: 4770 bx lr
08004994 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8004994: f7ff fff8 bl 8004988 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8004998: 480b ldr r0, [pc, #44] @ (80049c8 <LoopFillZerobss+0xe>)
ldr r1, =_edata
800499a: 490c ldr r1, [pc, #48] @ (80049cc <LoopFillZerobss+0x12>)
ldr r2, =_sidata
800499c: 4a0c ldr r2, [pc, #48] @ (80049d0 <LoopFillZerobss+0x16>)
movs r3, #0
800499e: 2300 movs r3, #0
b LoopCopyDataInit
80049a0: e002 b.n 80049a8 <LoopCopyDataInit>
080049a2 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
80049a2: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
80049a4: 50c4 str r4, [r0, r3]
adds r3, r3, #4
80049a6: 3304 adds r3, #4
080049a8 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
80049a8: 18c4 adds r4, r0, r3
cmp r4, r1
80049aa: 428c cmp r4, r1
bcc CopyDataInit
80049ac: d3f9 bcc.n 80049a2 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
80049ae: 4a09 ldr r2, [pc, #36] @ (80049d4 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
80049b0: 4c09 ldr r4, [pc, #36] @ (80049d8 <LoopFillZerobss+0x1e>)
movs r3, #0
80049b2: 2300 movs r3, #0
b LoopFillZerobss
80049b4: e001 b.n 80049ba <LoopFillZerobss>
080049b6 <FillZerobss>:
FillZerobss:
str r3, [r2]
80049b6: 6013 str r3, [r2, #0]
adds r2, r2, #4
80049b8: 3204 adds r2, #4
080049ba <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
80049ba: 42a2 cmp r2, r4
bcc FillZerobss
80049bc: d3fb bcc.n 80049b6 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
80049be: f009 f9f9 bl 800ddb4 <__libc_init_array>
/* Call the application's entry point.*/
bl main
80049c2: f7fd ffc1 bl 8002948 <main>
bx lr
80049c6: 4770 bx lr
ldr r0, =_sdata
80049c8: 20000000 .word 0x20000000
ldr r1, =_edata
80049cc: 200001dc .word 0x200001dc
ldr r2, =_sidata
80049d0: 0800ecec .word 0x0800ecec
ldr r2, =_sbss
80049d4: 200001e0 .word 0x200001e0
ldr r4, =_ebss
80049d8: 2000189c .word 0x2000189c
080049dc <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
80049dc: e7fe b.n 80049dc <ADC1_2_IRQHandler>
...
080049e0 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
80049e0: b580 push {r7, lr}
80049e2: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
80049e4: 4b08 ldr r3, [pc, #32] @ (8004a08 <HAL_Init+0x28>)
80049e6: 681b ldr r3, [r3, #0]
80049e8: 4a07 ldr r2, [pc, #28] @ (8004a08 <HAL_Init+0x28>)
80049ea: f043 0310 orr.w r3, r3, #16
80049ee: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
80049f0: 2003 movs r0, #3
80049f2: f000 fcef bl 80053d4 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
80049f6: 200f movs r0, #15
80049f8: f000 f808 bl 8004a0c <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
80049fc: f7ff fdca bl 8004594 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8004a00: 2300 movs r3, #0
}
8004a02: 4618 mov r0, r3
8004a04: bd80 pop {r7, pc}
8004a06: bf00 nop
8004a08: 40022000 .word 0x40022000
08004a0c <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8004a0c: b580 push {r7, lr}
8004a0e: b082 sub sp, #8
8004a10: af00 add r7, sp, #0
8004a12: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8004a14: 4b12 ldr r3, [pc, #72] @ (8004a60 <HAL_InitTick+0x54>)
8004a16: 681a ldr r2, [r3, #0]
8004a18: 4b12 ldr r3, [pc, #72] @ (8004a64 <HAL_InitTick+0x58>)
8004a1a: 781b ldrb r3, [r3, #0]
8004a1c: 4619 mov r1, r3
8004a1e: f44f 737a mov.w r3, #1000 @ 0x3e8
8004a22: fbb3 f3f1 udiv r3, r3, r1
8004a26: fbb2 f3f3 udiv r3, r2, r3
8004a2a: 4618 mov r0, r3
8004a2c: f000 fd07 bl 800543e <HAL_SYSTICK_Config>
8004a30: 4603 mov r3, r0
8004a32: 2b00 cmp r3, #0
8004a34: d001 beq.n 8004a3a <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8004a36: 2301 movs r3, #1
8004a38: e00e b.n 8004a58 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8004a3a: 687b ldr r3, [r7, #4]
8004a3c: 2b0f cmp r3, #15
8004a3e: d80a bhi.n 8004a56 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8004a40: 2200 movs r2, #0
8004a42: 6879 ldr r1, [r7, #4]
8004a44: f04f 30ff mov.w r0, #4294967295
8004a48: f000 fccf bl 80053ea <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8004a4c: 4a06 ldr r2, [pc, #24] @ (8004a68 <HAL_InitTick+0x5c>)
8004a4e: 687b ldr r3, [r7, #4]
8004a50: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8004a52: 2300 movs r3, #0
8004a54: e000 b.n 8004a58 <HAL_InitTick+0x4c>
return HAL_ERROR;
8004a56: 2301 movs r3, #1
}
8004a58: 4618 mov r0, r3
8004a5a: 3708 adds r7, #8
8004a5c: 46bd mov sp, r7
8004a5e: bd80 pop {r7, pc}
8004a60: 20000010 .word 0x20000010
8004a64: 20000018 .word 0x20000018
8004a68: 20000014 .word 0x20000014
08004a6c <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8004a6c: b480 push {r7}
8004a6e: af00 add r7, sp, #0
uwTick += uwTickFreq;
8004a70: 4b05 ldr r3, [pc, #20] @ (8004a88 <HAL_IncTick+0x1c>)
8004a72: 781b ldrb r3, [r3, #0]
8004a74: 461a mov r2, r3
8004a76: 4b05 ldr r3, [pc, #20] @ (8004a8c <HAL_IncTick+0x20>)
8004a78: 681b ldr r3, [r3, #0]
8004a7a: 4413 add r3, r2
8004a7c: 4a03 ldr r2, [pc, #12] @ (8004a8c <HAL_IncTick+0x20>)
8004a7e: 6013 str r3, [r2, #0]
}
8004a80: bf00 nop
8004a82: 46bd mov sp, r7
8004a84: bc80 pop {r7}
8004a86: 4770 bx lr
8004a88: 20000018 .word 0x20000018
8004a8c: 2000046c .word 0x2000046c
08004a90 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8004a90: b480 push {r7}
8004a92: af00 add r7, sp, #0
return uwTick;
8004a94: 4b02 ldr r3, [pc, #8] @ (8004aa0 <HAL_GetTick+0x10>)
8004a96: 681b ldr r3, [r3, #0]
}
8004a98: 4618 mov r0, r3
8004a9a: 46bd mov sp, r7
8004a9c: bc80 pop {r7}
8004a9e: 4770 bx lr
8004aa0: 2000046c .word 0x2000046c
08004aa4 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8004aa4: b580 push {r7, lr}
8004aa6: b086 sub sp, #24
8004aa8: af00 add r7, sp, #0
8004aaa: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8004aac: 2300 movs r3, #0
8004aae: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
8004ab0: 2300 movs r3, #0
8004ab2: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
8004ab4: 2300 movs r3, #0
8004ab6: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8004ab8: 2300 movs r3, #0
8004aba: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
8004abc: 687b ldr r3, [r7, #4]
8004abe: 2b00 cmp r3, #0
8004ac0: d101 bne.n 8004ac6 <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
8004ac2: 2301 movs r3, #1
8004ac4: e0be b.n 8004c44 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8004ac6: 687b ldr r3, [r7, #4]
8004ac8: 689b ldr r3, [r3, #8]
8004aca: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
8004acc: 687b ldr r3, [r7, #4]
8004ace: 6a9b ldr r3, [r3, #40] @ 0x28
8004ad0: 2b00 cmp r3, #0
8004ad2: d109 bne.n 8004ae8 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8004ad4: 687b ldr r3, [r7, #4]
8004ad6: 2200 movs r2, #0
8004ad8: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8004ada: 687b ldr r3, [r7, #4]
8004adc: 2200 movs r2, #0
8004ade: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8004ae2: 6878 ldr r0, [r7, #4]
8004ae4: f7ff fd88 bl 80045f8 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
8004ae8: 6878 ldr r0, [r7, #4]
8004aea: f000 faff bl 80050ec <ADC_ConversionStop_Disable>
8004aee: 4603 mov r3, r0
8004af0: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8004af2: 687b ldr r3, [r7, #4]
8004af4: 6a9b ldr r3, [r3, #40] @ 0x28
8004af6: f003 0310 and.w r3, r3, #16
8004afa: 2b00 cmp r3, #0
8004afc: f040 8099 bne.w 8004c32 <HAL_ADC_Init+0x18e>
8004b00: 7dfb ldrb r3, [r7, #23]
8004b02: 2b00 cmp r3, #0
8004b04: f040 8095 bne.w 8004c32 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8004b08: 687b ldr r3, [r7, #4]
8004b0a: 6a9b ldr r3, [r3, #40] @ 0x28
8004b0c: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8004b10: f023 0302 bic.w r3, r3, #2
8004b14: f043 0202 orr.w r2, r3, #2
8004b18: 687b ldr r3, [r7, #4]
8004b1a: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
8004b1c: 687b ldr r3, [r7, #4]
8004b1e: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8004b20: 687b ldr r3, [r7, #4]
8004b22: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8004b24: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8004b26: 687b ldr r3, [r7, #4]
8004b28: 7b1b ldrb r3, [r3, #12]
8004b2a: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8004b2c: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
8004b2e: 68ba ldr r2, [r7, #8]
8004b30: 4313 orrs r3, r2
8004b32: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8004b34: 687b ldr r3, [r7, #4]
8004b36: 689b ldr r3, [r3, #8]
8004b38: f5b3 7f80 cmp.w r3, #256 @ 0x100
8004b3c: d003 beq.n 8004b46 <HAL_ADC_Init+0xa2>
8004b3e: 687b ldr r3, [r7, #4]
8004b40: 689b ldr r3, [r3, #8]
8004b42: 2b01 cmp r3, #1
8004b44: d102 bne.n 8004b4c <HAL_ADC_Init+0xa8>
8004b46: f44f 7380 mov.w r3, #256 @ 0x100
8004b4a: e000 b.n 8004b4e <HAL_ADC_Init+0xaa>
8004b4c: 2300 movs r3, #0
8004b4e: 693a ldr r2, [r7, #16]
8004b50: 4313 orrs r3, r2
8004b52: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8004b54: 687b ldr r3, [r7, #4]
8004b56: 7d1b ldrb r3, [r3, #20]
8004b58: 2b01 cmp r3, #1
8004b5a: d119 bne.n 8004b90 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8004b5c: 687b ldr r3, [r7, #4]
8004b5e: 7b1b ldrb r3, [r3, #12]
8004b60: 2b00 cmp r3, #0
8004b62: d109 bne.n 8004b78 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8004b64: 687b ldr r3, [r7, #4]
8004b66: 699b ldr r3, [r3, #24]
8004b68: 3b01 subs r3, #1
8004b6a: 035a lsls r2, r3, #13
8004b6c: 693b ldr r3, [r7, #16]
8004b6e: 4313 orrs r3, r2
8004b70: f443 6300 orr.w r3, r3, #2048 @ 0x800
8004b74: 613b str r3, [r7, #16]
8004b76: e00b b.n 8004b90 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8004b78: 687b ldr r3, [r7, #4]
8004b7a: 6a9b ldr r3, [r3, #40] @ 0x28
8004b7c: f043 0220 orr.w r2, r3, #32
8004b80: 687b ldr r3, [r7, #4]
8004b82: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8004b84: 687b ldr r3, [r7, #4]
8004b86: 6adb ldr r3, [r3, #44] @ 0x2c
8004b88: f043 0201 orr.w r2, r3, #1
8004b8c: 687b ldr r3, [r7, #4]
8004b8e: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
8004b90: 687b ldr r3, [r7, #4]
8004b92: 681b ldr r3, [r3, #0]
8004b94: 685b ldr r3, [r3, #4]
8004b96: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8004b9a: 687b ldr r3, [r7, #4]
8004b9c: 681b ldr r3, [r3, #0]
8004b9e: 693a ldr r2, [r7, #16]
8004ba0: 430a orrs r2, r1
8004ba2: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
8004ba4: 687b ldr r3, [r7, #4]
8004ba6: 681b ldr r3, [r3, #0]
8004ba8: 689a ldr r2, [r3, #8]
8004baa: 4b28 ldr r3, [pc, #160] @ (8004c4c <HAL_ADC_Init+0x1a8>)
8004bac: 4013 ands r3, r2
8004bae: 687a ldr r2, [r7, #4]
8004bb0: 6812 ldr r2, [r2, #0]
8004bb2: 68b9 ldr r1, [r7, #8]
8004bb4: 430b orrs r3, r1
8004bb6: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8004bb8: 687b ldr r3, [r7, #4]
8004bba: 689b ldr r3, [r3, #8]
8004bbc: f5b3 7f80 cmp.w r3, #256 @ 0x100
8004bc0: d003 beq.n 8004bca <HAL_ADC_Init+0x126>
8004bc2: 687b ldr r3, [r7, #4]
8004bc4: 689b ldr r3, [r3, #8]
8004bc6: 2b01 cmp r3, #1
8004bc8: d104 bne.n 8004bd4 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
8004bca: 687b ldr r3, [r7, #4]
8004bcc: 691b ldr r3, [r3, #16]
8004bce: 3b01 subs r3, #1
8004bd0: 051b lsls r3, r3, #20
8004bd2: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8004bd4: 687b ldr r3, [r7, #4]
8004bd6: 681b ldr r3, [r3, #0]
8004bd8: 6adb ldr r3, [r3, #44] @ 0x2c
8004bda: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
8004bde: 687b ldr r3, [r7, #4]
8004be0: 681b ldr r3, [r3, #0]
8004be2: 68fa ldr r2, [r7, #12]
8004be4: 430a orrs r2, r1
8004be6: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8004be8: 687b ldr r3, [r7, #4]
8004bea: 681b ldr r3, [r3, #0]
8004bec: 689a ldr r2, [r3, #8]
8004bee: 4b18 ldr r3, [pc, #96] @ (8004c50 <HAL_ADC_Init+0x1ac>)
8004bf0: 4013 ands r3, r2
8004bf2: 68ba ldr r2, [r7, #8]
8004bf4: 429a cmp r2, r3
8004bf6: d10b bne.n 8004c10 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8004bf8: 687b ldr r3, [r7, #4]
8004bfa: 2200 movs r2, #0
8004bfc: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8004bfe: 687b ldr r3, [r7, #4]
8004c00: 6a9b ldr r3, [r3, #40] @ 0x28
8004c02: f023 0303 bic.w r3, r3, #3
8004c06: f043 0201 orr.w r2, r3, #1
8004c0a: 687b ldr r3, [r7, #4]
8004c0c: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8004c0e: e018 b.n 8004c42 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8004c10: 687b ldr r3, [r7, #4]
8004c12: 6a9b ldr r3, [r3, #40] @ 0x28
8004c14: f023 0312 bic.w r3, r3, #18
8004c18: f043 0210 orr.w r2, r3, #16
8004c1c: 687b ldr r3, [r7, #4]
8004c1e: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8004c20: 687b ldr r3, [r7, #4]
8004c22: 6adb ldr r3, [r3, #44] @ 0x2c
8004c24: f043 0201 orr.w r2, r3, #1
8004c28: 687b ldr r3, [r7, #4]
8004c2a: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
8004c2c: 2301 movs r3, #1
8004c2e: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8004c30: e007 b.n 8004c42 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8004c32: 687b ldr r3, [r7, #4]
8004c34: 6a9b ldr r3, [r3, #40] @ 0x28
8004c36: f043 0210 orr.w r2, r3, #16
8004c3a: 687b ldr r3, [r7, #4]
8004c3c: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8004c3e: 2301 movs r3, #1
8004c40: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8004c42: 7dfb ldrb r3, [r7, #23]
}
8004c44: 4618 mov r0, r3
8004c46: 3718 adds r7, #24
8004c48: 46bd mov sp, r7
8004c4a: bd80 pop {r7, pc}
8004c4c: ffe1f7fd .word 0xffe1f7fd
8004c50: ff1f0efe .word 0xff1f0efe
08004c54 <HAL_ADC_Start_DMA>:
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @retval None
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
{
8004c54: b580 push {r7, lr}
8004c56: b086 sub sp, #24
8004c58: af00 add r7, sp, #0
8004c5a: 60f8 str r0, [r7, #12]
8004c5c: 60b9 str r1, [r7, #8]
8004c5e: 607a str r2, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8004c60: 2300 movs r3, #0
8004c62: 75fb strb r3, [r7, #23]
assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
/* Verification if multimode is disabled (for devices with several ADC) */
/* If multimode is enabled, dedicated function multimode conversion */
/* start DMA must be used. */
if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
8004c64: 68fb ldr r3, [r7, #12]
8004c66: 681b ldr r3, [r3, #0]
8004c68: 4a64 ldr r2, [pc, #400] @ (8004dfc <HAL_ADC_Start_DMA+0x1a8>)
8004c6a: 4293 cmp r3, r2
8004c6c: d004 beq.n 8004c78 <HAL_ADC_Start_DMA+0x24>
8004c6e: 68fb ldr r3, [r7, #12]
8004c70: 681b ldr r3, [r3, #0]
8004c72: 4a63 ldr r2, [pc, #396] @ (8004e00 <HAL_ADC_Start_DMA+0x1ac>)
8004c74: 4293 cmp r3, r2
8004c76: d106 bne.n 8004c86 <HAL_ADC_Start_DMA+0x32>
8004c78: 4b60 ldr r3, [pc, #384] @ (8004dfc <HAL_ADC_Start_DMA+0x1a8>)
8004c7a: 685b ldr r3, [r3, #4]
8004c7c: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8004c80: 2b00 cmp r3, #0
8004c82: f040 80b3 bne.w 8004dec <HAL_ADC_Start_DMA+0x198>
{
/* Process locked */
__HAL_LOCK(hadc);
8004c86: 68fb ldr r3, [r7, #12]
8004c88: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8004c8c: 2b01 cmp r3, #1
8004c8e: d101 bne.n 8004c94 <HAL_ADC_Start_DMA+0x40>
8004c90: 2302 movs r3, #2
8004c92: e0ae b.n 8004df2 <HAL_ADC_Start_DMA+0x19e>
8004c94: 68fb ldr r3, [r7, #12]
8004c96: 2201 movs r2, #1
8004c98: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
8004c9c: 68f8 ldr r0, [r7, #12]
8004c9e: f000 f9cb bl 8005038 <ADC_Enable>
8004ca2: 4603 mov r3, r0
8004ca4: 75fb strb r3, [r7, #23]
/* Start conversion if ADC is effectively enabled */
if (tmp_hal_status == HAL_OK)
8004ca6: 7dfb ldrb r3, [r7, #23]
8004ca8: 2b00 cmp r3, #0
8004caa: f040 809a bne.w 8004de2 <HAL_ADC_Start_DMA+0x18e>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular operation */
ADC_STATE_CLR_SET(hadc->State,
8004cae: 68fb ldr r3, [r7, #12]
8004cb0: 6a9b ldr r3, [r3, #40] @ 0x28
8004cb2: f423 6370 bic.w r3, r3, #3840 @ 0xf00
8004cb6: f023 0301 bic.w r3, r3, #1
8004cba: f443 7280 orr.w r2, r3, #256 @ 0x100
8004cbe: 68fb ldr r3, [r7, #12]
8004cc0: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_REG_BUSY);
/* Set group injected state (from auto-injection) and multimode state */
/* for all cases of multimode: independent mode, multimode ADC master */
/* or multimode ADC slave (for devices with several ADCs): */
if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
8004cc2: 68fb ldr r3, [r7, #12]
8004cc4: 681b ldr r3, [r3, #0]
8004cc6: 4a4e ldr r2, [pc, #312] @ (8004e00 <HAL_ADC_Start_DMA+0x1ac>)
8004cc8: 4293 cmp r3, r2
8004cca: d105 bne.n 8004cd8 <HAL_ADC_Start_DMA+0x84>
8004ccc: 4b4b ldr r3, [pc, #300] @ (8004dfc <HAL_ADC_Start_DMA+0x1a8>)
8004cce: 685b ldr r3, [r3, #4]
8004cd0: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8004cd4: 2b00 cmp r3, #0
8004cd6: d115 bne.n 8004d04 <HAL_ADC_Start_DMA+0xb0>
{
/* Set ADC state (ADC independent or master) */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8004cd8: 68fb ldr r3, [r7, #12]
8004cda: 6a9b ldr r3, [r3, #40] @ 0x28
8004cdc: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
8004ce0: 68fb ldr r3, [r7, #12]
8004ce2: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8004ce4: 68fb ldr r3, [r7, #12]
8004ce6: 681b ldr r3, [r3, #0]
8004ce8: 685b ldr r3, [r3, #4]
8004cea: f403 6380 and.w r3, r3, #1024 @ 0x400
8004cee: 2b00 cmp r3, #0
8004cf0: d026 beq.n 8004d40 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8004cf2: 68fb ldr r3, [r7, #12]
8004cf4: 6a9b ldr r3, [r3, #40] @ 0x28
8004cf6: f423 5340 bic.w r3, r3, #12288 @ 0x3000
8004cfa: f443 5280 orr.w r2, r3, #4096 @ 0x1000
8004cfe: 68fb ldr r3, [r7, #12]
8004d00: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8004d02: e01d b.n 8004d40 <HAL_ADC_Start_DMA+0xec>
}
}
else
{
/* Set ADC state (ADC slave) */
SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8004d04: 68fb ldr r3, [r7, #12]
8004d06: 6a9b ldr r3, [r3, #40] @ 0x28
8004d08: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
8004d0c: 68fb ldr r3, [r7, #12]
8004d0e: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
8004d10: 68fb ldr r3, [r7, #12]
8004d12: 681b ldr r3, [r3, #0]
8004d14: 4a39 ldr r2, [pc, #228] @ (8004dfc <HAL_ADC_Start_DMA+0x1a8>)
8004d16: 4293 cmp r3, r2
8004d18: d004 beq.n 8004d24 <HAL_ADC_Start_DMA+0xd0>
8004d1a: 68fb ldr r3, [r7, #12]
8004d1c: 681b ldr r3, [r3, #0]
8004d1e: 4a38 ldr r2, [pc, #224] @ (8004e00 <HAL_ADC_Start_DMA+0x1ac>)
8004d20: 4293 cmp r3, r2
8004d22: d10d bne.n 8004d40 <HAL_ADC_Start_DMA+0xec>
8004d24: 4b35 ldr r3, [pc, #212] @ (8004dfc <HAL_ADC_Start_DMA+0x1a8>)
8004d26: 685b ldr r3, [r3, #4]
8004d28: f403 6380 and.w r3, r3, #1024 @ 0x400
8004d2c: 2b00 cmp r3, #0
8004d2e: d007 beq.n 8004d40 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8004d30: 68fb ldr r3, [r7, #12]
8004d32: 6a9b ldr r3, [r3, #40] @ 0x28
8004d34: f423 5340 bic.w r3, r3, #12288 @ 0x3000
8004d38: f443 5280 orr.w r2, r3, #4096 @ 0x1000
8004d3c: 68fb ldr r3, [r7, #12]
8004d3e: 629a str r2, [r3, #40] @ 0x28
}
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8004d40: 68fb ldr r3, [r7, #12]
8004d42: 6a9b ldr r3, [r3, #40] @ 0x28
8004d44: f403 5380 and.w r3, r3, #4096 @ 0x1000
8004d48: 2b00 cmp r3, #0
8004d4a: d006 beq.n 8004d5a <HAL_ADC_Start_DMA+0x106>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
8004d4c: 68fb ldr r3, [r7, #12]
8004d4e: 6adb ldr r3, [r3, #44] @ 0x2c
8004d50: f023 0206 bic.w r2, r3, #6
8004d54: 68fb ldr r3, [r7, #12]
8004d56: 62da str r2, [r3, #44] @ 0x2c
8004d58: e002 b.n 8004d60 <HAL_ADC_Start_DMA+0x10c>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
8004d5a: 68fb ldr r3, [r7, #12]
8004d5c: 2200 movs r2, #0
8004d5e: 62da str r2, [r3, #44] @ 0x2c
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
8004d60: 68fb ldr r3, [r7, #12]
8004d62: 2200 movs r2, #0
8004d64: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Set the DMA transfer complete callback */
hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
8004d68: 68fb ldr r3, [r7, #12]
8004d6a: 6a1b ldr r3, [r3, #32]
8004d6c: 4a25 ldr r2, [pc, #148] @ (8004e04 <HAL_ADC_Start_DMA+0x1b0>)
8004d6e: 629a str r2, [r3, #40] @ 0x28
/* Set the DMA half transfer complete callback */
hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
8004d70: 68fb ldr r3, [r7, #12]
8004d72: 6a1b ldr r3, [r3, #32]
8004d74: 4a24 ldr r2, [pc, #144] @ (8004e08 <HAL_ADC_Start_DMA+0x1b4>)
8004d76: 62da str r2, [r3, #44] @ 0x2c
/* Set the DMA error callback */
hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
8004d78: 68fb ldr r3, [r7, #12]
8004d7a: 6a1b ldr r3, [r3, #32]
8004d7c: 4a23 ldr r2, [pc, #140] @ (8004e0c <HAL_ADC_Start_DMA+0x1b8>)
8004d7e: 631a str r2, [r3, #48] @ 0x30
/* start (in case of SW start): */
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC */
/* operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
8004d80: 68fb ldr r3, [r7, #12]
8004d82: 681b ldr r3, [r3, #0]
8004d84: f06f 0202 mvn.w r2, #2
8004d88: 601a str r2, [r3, #0]
/* Enable ADC DMA mode */
SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
8004d8a: 68fb ldr r3, [r7, #12]
8004d8c: 681b ldr r3, [r3, #0]
8004d8e: 689a ldr r2, [r3, #8]
8004d90: 68fb ldr r3, [r7, #12]
8004d92: 681b ldr r3, [r3, #0]
8004d94: f442 7280 orr.w r2, r2, #256 @ 0x100
8004d98: 609a str r2, [r3, #8]
/* Start the DMA channel */
HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
8004d9a: 68fb ldr r3, [r7, #12]
8004d9c: 6a18 ldr r0, [r3, #32]
8004d9e: 68fb ldr r3, [r7, #12]
8004da0: 681b ldr r3, [r3, #0]
8004da2: 334c adds r3, #76 @ 0x4c
8004da4: 4619 mov r1, r3
8004da6: 68ba ldr r2, [r7, #8]
8004da8: 687b ldr r3, [r7, #4]
8004daa: f000 fbb5 bl 8005518 <HAL_DMA_Start_IT>
/* Enable conversion of regular group. */
/* If software start has been selected, conversion starts immediately. */
/* If external trigger has been selected, conversion will start at next */
/* trigger event. */
if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
8004dae: 68fb ldr r3, [r7, #12]
8004db0: 681b ldr r3, [r3, #0]
8004db2: 689b ldr r3, [r3, #8]
8004db4: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8004db8: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
8004dbc: d108 bne.n 8004dd0 <HAL_ADC_Start_DMA+0x17c>
{
/* Start ADC conversion on regular group with SW start */
SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
8004dbe: 68fb ldr r3, [r7, #12]
8004dc0: 681b ldr r3, [r3, #0]
8004dc2: 689a ldr r2, [r3, #8]
8004dc4: 68fb ldr r3, [r7, #12]
8004dc6: 681b ldr r3, [r3, #0]
8004dc8: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000
8004dcc: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
8004dce: e00f b.n 8004df0 <HAL_ADC_Start_DMA+0x19c>
}
else
{
/* Start ADC conversion on regular group with external trigger */
SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
8004dd0: 68fb ldr r3, [r7, #12]
8004dd2: 681b ldr r3, [r3, #0]
8004dd4: 689a ldr r2, [r3, #8]
8004dd6: 68fb ldr r3, [r7, #12]
8004dd8: 681b ldr r3, [r3, #0]
8004dda: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
8004dde: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
8004de0: e006 b.n 8004df0 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hadc);
8004de2: 68fb ldr r3, [r7, #12]
8004de4: 2200 movs r2, #0
8004de6: f883 2024 strb.w r2, [r3, #36] @ 0x24
if (tmp_hal_status == HAL_OK)
8004dea: e001 b.n 8004df0 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
tmp_hal_status = HAL_ERROR;
8004dec: 2301 movs r3, #1
8004dee: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8004df0: 7dfb ldrb r3, [r7, #23]
}
8004df2: 4618 mov r0, r3
8004df4: 3718 adds r7, #24
8004df6: 46bd mov sp, r7
8004df8: bd80 pop {r7, pc}
8004dfa: bf00 nop
8004dfc: 40012400 .word 0x40012400
8004e00: 40012800 .word 0x40012800
8004e04: 0800516f .word 0x0800516f
8004e08: 080051eb .word 0x080051eb
8004e0c: 08005207 .word 0x08005207
08004e10 <HAL_ADC_ConvCpltCallback>:
* @brief Conversion complete callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
8004e10: b480 push {r7}
8004e12: b083 sub sp, #12
8004e14: af00 add r7, sp, #0
8004e16: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvCpltCallback must be implemented in the user file.
*/
}
8004e18: bf00 nop
8004e1a: 370c adds r7, #12
8004e1c: 46bd mov sp, r7
8004e1e: bc80 pop {r7}
8004e20: 4770 bx lr
08004e22 <HAL_ADC_ConvHalfCpltCallback>:
* @brief Conversion DMA half-transfer callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
{
8004e22: b480 push {r7}
8004e24: b083 sub sp, #12
8004e26: af00 add r7, sp, #0
8004e28: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
*/
}
8004e2a: bf00 nop
8004e2c: 370c adds r7, #12
8004e2e: 46bd mov sp, r7
8004e30: bc80 pop {r7}
8004e32: 4770 bx lr
08004e34 <HAL_ADC_ErrorCallback>:
* (ADC conversion with interruption or transfer by DMA)
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
8004e34: b480 push {r7}
8004e36: b083 sub sp, #12
8004e38: af00 add r7, sp, #0
8004e3a: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ErrorCallback must be implemented in the user file.
*/
}
8004e3c: bf00 nop
8004e3e: 370c adds r7, #12
8004e40: 46bd mov sp, r7
8004e42: bc80 pop {r7}
8004e44: 4770 bx lr
...
08004e48 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8004e48: b480 push {r7}
8004e4a: b085 sub sp, #20
8004e4c: af00 add r7, sp, #0
8004e4e: 6078 str r0, [r7, #4]
8004e50: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8004e52: 2300 movs r3, #0
8004e54: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8004e56: 2300 movs r3, #0
8004e58: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8004e5a: 687b ldr r3, [r7, #4]
8004e5c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8004e60: 2b01 cmp r3, #1
8004e62: d101 bne.n 8004e68 <HAL_ADC_ConfigChannel+0x20>
8004e64: 2302 movs r3, #2
8004e66: e0dc b.n 8005022 <HAL_ADC_ConfigChannel+0x1da>
8004e68: 687b ldr r3, [r7, #4]
8004e6a: 2201 movs r2, #1
8004e6c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
8004e70: 683b ldr r3, [r7, #0]
8004e72: 685b ldr r3, [r3, #4]
8004e74: 2b06 cmp r3, #6
8004e76: d81c bhi.n 8004eb2 <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8004e78: 687b ldr r3, [r7, #4]
8004e7a: 681b ldr r3, [r3, #0]
8004e7c: 6b59 ldr r1, [r3, #52] @ 0x34
8004e7e: 683b ldr r3, [r7, #0]
8004e80: 685a ldr r2, [r3, #4]
8004e82: 4613 mov r3, r2
8004e84: 009b lsls r3, r3, #2
8004e86: 4413 add r3, r2
8004e88: 3b05 subs r3, #5
8004e8a: 221f movs r2, #31
8004e8c: fa02 f303 lsl.w r3, r2, r3
8004e90: 43db mvns r3, r3
8004e92: 4019 ands r1, r3
8004e94: 683b ldr r3, [r7, #0]
8004e96: 6818 ldr r0, [r3, #0]
8004e98: 683b ldr r3, [r7, #0]
8004e9a: 685a ldr r2, [r3, #4]
8004e9c: 4613 mov r3, r2
8004e9e: 009b lsls r3, r3, #2
8004ea0: 4413 add r3, r2
8004ea2: 3b05 subs r3, #5
8004ea4: fa00 f203 lsl.w r2, r0, r3
8004ea8: 687b ldr r3, [r7, #4]
8004eaa: 681b ldr r3, [r3, #0]
8004eac: 430a orrs r2, r1
8004eae: 635a str r2, [r3, #52] @ 0x34
8004eb0: e03c b.n 8004f2c <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
8004eb2: 683b ldr r3, [r7, #0]
8004eb4: 685b ldr r3, [r3, #4]
8004eb6: 2b0c cmp r3, #12
8004eb8: d81c bhi.n 8004ef4 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
8004eba: 687b ldr r3, [r7, #4]
8004ebc: 681b ldr r3, [r3, #0]
8004ebe: 6b19 ldr r1, [r3, #48] @ 0x30
8004ec0: 683b ldr r3, [r7, #0]
8004ec2: 685a ldr r2, [r3, #4]
8004ec4: 4613 mov r3, r2
8004ec6: 009b lsls r3, r3, #2
8004ec8: 4413 add r3, r2
8004eca: 3b23 subs r3, #35 @ 0x23
8004ecc: 221f movs r2, #31
8004ece: fa02 f303 lsl.w r3, r2, r3
8004ed2: 43db mvns r3, r3
8004ed4: 4019 ands r1, r3
8004ed6: 683b ldr r3, [r7, #0]
8004ed8: 6818 ldr r0, [r3, #0]
8004eda: 683b ldr r3, [r7, #0]
8004edc: 685a ldr r2, [r3, #4]
8004ede: 4613 mov r3, r2
8004ee0: 009b lsls r3, r3, #2
8004ee2: 4413 add r3, r2
8004ee4: 3b23 subs r3, #35 @ 0x23
8004ee6: fa00 f203 lsl.w r2, r0, r3
8004eea: 687b ldr r3, [r7, #4]
8004eec: 681b ldr r3, [r3, #0]
8004eee: 430a orrs r2, r1
8004ef0: 631a str r2, [r3, #48] @ 0x30
8004ef2: e01b b.n 8004f2c <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
8004ef4: 687b ldr r3, [r7, #4]
8004ef6: 681b ldr r3, [r3, #0]
8004ef8: 6ad9 ldr r1, [r3, #44] @ 0x2c
8004efa: 683b ldr r3, [r7, #0]
8004efc: 685a ldr r2, [r3, #4]
8004efe: 4613 mov r3, r2
8004f00: 009b lsls r3, r3, #2
8004f02: 4413 add r3, r2
8004f04: 3b41 subs r3, #65 @ 0x41
8004f06: 221f movs r2, #31
8004f08: fa02 f303 lsl.w r3, r2, r3
8004f0c: 43db mvns r3, r3
8004f0e: 4019 ands r1, r3
8004f10: 683b ldr r3, [r7, #0]
8004f12: 6818 ldr r0, [r3, #0]
8004f14: 683b ldr r3, [r7, #0]
8004f16: 685a ldr r2, [r3, #4]
8004f18: 4613 mov r3, r2
8004f1a: 009b lsls r3, r3, #2
8004f1c: 4413 add r3, r2
8004f1e: 3b41 subs r3, #65 @ 0x41
8004f20: fa00 f203 lsl.w r2, r0, r3
8004f24: 687b ldr r3, [r7, #4]
8004f26: 681b ldr r3, [r3, #0]
8004f28: 430a orrs r2, r1
8004f2a: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
8004f2c: 683b ldr r3, [r7, #0]
8004f2e: 681b ldr r3, [r3, #0]
8004f30: 2b09 cmp r3, #9
8004f32: d91c bls.n 8004f6e <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
8004f34: 687b ldr r3, [r7, #4]
8004f36: 681b ldr r3, [r3, #0]
8004f38: 68d9 ldr r1, [r3, #12]
8004f3a: 683b ldr r3, [r7, #0]
8004f3c: 681a ldr r2, [r3, #0]
8004f3e: 4613 mov r3, r2
8004f40: 005b lsls r3, r3, #1
8004f42: 4413 add r3, r2
8004f44: 3b1e subs r3, #30
8004f46: 2207 movs r2, #7
8004f48: fa02 f303 lsl.w r3, r2, r3
8004f4c: 43db mvns r3, r3
8004f4e: 4019 ands r1, r3
8004f50: 683b ldr r3, [r7, #0]
8004f52: 6898 ldr r0, [r3, #8]
8004f54: 683b ldr r3, [r7, #0]
8004f56: 681a ldr r2, [r3, #0]
8004f58: 4613 mov r3, r2
8004f5a: 005b lsls r3, r3, #1
8004f5c: 4413 add r3, r2
8004f5e: 3b1e subs r3, #30
8004f60: fa00 f203 lsl.w r2, r0, r3
8004f64: 687b ldr r3, [r7, #4]
8004f66: 681b ldr r3, [r3, #0]
8004f68: 430a orrs r2, r1
8004f6a: 60da str r2, [r3, #12]
8004f6c: e019 b.n 8004fa2 <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8004f6e: 687b ldr r3, [r7, #4]
8004f70: 681b ldr r3, [r3, #0]
8004f72: 6919 ldr r1, [r3, #16]
8004f74: 683b ldr r3, [r7, #0]
8004f76: 681a ldr r2, [r3, #0]
8004f78: 4613 mov r3, r2
8004f7a: 005b lsls r3, r3, #1
8004f7c: 4413 add r3, r2
8004f7e: 2207 movs r2, #7
8004f80: fa02 f303 lsl.w r3, r2, r3
8004f84: 43db mvns r3, r3
8004f86: 4019 ands r1, r3
8004f88: 683b ldr r3, [r7, #0]
8004f8a: 6898 ldr r0, [r3, #8]
8004f8c: 683b ldr r3, [r7, #0]
8004f8e: 681a ldr r2, [r3, #0]
8004f90: 4613 mov r3, r2
8004f92: 005b lsls r3, r3, #1
8004f94: 4413 add r3, r2
8004f96: fa00 f203 lsl.w r2, r0, r3
8004f9a: 687b ldr r3, [r7, #4]
8004f9c: 681b ldr r3, [r3, #0]
8004f9e: 430a orrs r2, r1
8004fa0: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8004fa2: 683b ldr r3, [r7, #0]
8004fa4: 681b ldr r3, [r3, #0]
8004fa6: 2b10 cmp r3, #16
8004fa8: d003 beq.n 8004fb2 <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8004faa: 683b ldr r3, [r7, #0]
8004fac: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8004fae: 2b11 cmp r3, #17
8004fb0: d132 bne.n 8005018 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
8004fb2: 687b ldr r3, [r7, #4]
8004fb4: 681b ldr r3, [r3, #0]
8004fb6: 4a1d ldr r2, [pc, #116] @ (800502c <HAL_ADC_ConfigChannel+0x1e4>)
8004fb8: 4293 cmp r3, r2
8004fba: d125 bne.n 8005008 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8004fbc: 687b ldr r3, [r7, #4]
8004fbe: 681b ldr r3, [r3, #0]
8004fc0: 689b ldr r3, [r3, #8]
8004fc2: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8004fc6: 2b00 cmp r3, #0
8004fc8: d126 bne.n 8005018 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8004fca: 687b ldr r3, [r7, #4]
8004fcc: 681b ldr r3, [r3, #0]
8004fce: 689a ldr r2, [r3, #8]
8004fd0: 687b ldr r3, [r7, #4]
8004fd2: 681b ldr r3, [r3, #0]
8004fd4: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8004fd8: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
8004fda: 683b ldr r3, [r7, #0]
8004fdc: 681b ldr r3, [r3, #0]
8004fde: 2b10 cmp r3, #16
8004fe0: d11a bne.n 8005018 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8004fe2: 4b13 ldr r3, [pc, #76] @ (8005030 <HAL_ADC_ConfigChannel+0x1e8>)
8004fe4: 681b ldr r3, [r3, #0]
8004fe6: 4a13 ldr r2, [pc, #76] @ (8005034 <HAL_ADC_ConfigChannel+0x1ec>)
8004fe8: fba2 2303 umull r2, r3, r2, r3
8004fec: 0c9a lsrs r2, r3, #18
8004fee: 4613 mov r3, r2
8004ff0: 009b lsls r3, r3, #2
8004ff2: 4413 add r3, r2
8004ff4: 005b lsls r3, r3, #1
8004ff6: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8004ff8: e002 b.n 8005000 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
8004ffa: 68bb ldr r3, [r7, #8]
8004ffc: 3b01 subs r3, #1
8004ffe: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005000: 68bb ldr r3, [r7, #8]
8005002: 2b00 cmp r3, #0
8005004: d1f9 bne.n 8004ffa <HAL_ADC_ConfigChannel+0x1b2>
8005006: e007 b.n 8005018 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8005008: 687b ldr r3, [r7, #4]
800500a: 6a9b ldr r3, [r3, #40] @ 0x28
800500c: f043 0220 orr.w r2, r3, #32
8005010: 687b ldr r3, [r7, #4]
8005012: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8005014: 2301 movs r3, #1
8005016: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8005018: 687b ldr r3, [r7, #4]
800501a: 2200 movs r2, #0
800501c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
8005020: 7bfb ldrb r3, [r7, #15]
}
8005022: 4618 mov r0, r3
8005024: 3714 adds r7, #20
8005026: 46bd mov sp, r7
8005028: bc80 pop {r7}
800502a: 4770 bx lr
800502c: 40012400 .word 0x40012400
8005030: 20000010 .word 0x20000010
8005034: 431bde83 .word 0x431bde83
08005038 <ADC_Enable>:
* and voltage regulator must be enabled (done into HAL_ADC_Init()).
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
{
8005038: b580 push {r7, lr}
800503a: b084 sub sp, #16
800503c: af00 add r7, sp, #0
800503e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8005040: 2300 movs r3, #0
8005042: 60fb str r3, [r7, #12]
__IO uint32_t wait_loop_index = 0U;
8005044: 2300 movs r3, #0
8005046: 60bb str r3, [r7, #8]
/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
/* enabling phase not yet completed: flag ADC ready not yet set). */
/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
/* causes: ADC clock not running, ...). */
if (ADC_IS_ENABLE(hadc) == RESET)
8005048: 687b ldr r3, [r7, #4]
800504a: 681b ldr r3, [r3, #0]
800504c: 689b ldr r3, [r3, #8]
800504e: f003 0301 and.w r3, r3, #1
8005052: 2b01 cmp r3, #1
8005054: d040 beq.n 80050d8 <ADC_Enable+0xa0>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
8005056: 687b ldr r3, [r7, #4]
8005058: 681b ldr r3, [r3, #0]
800505a: 689a ldr r2, [r3, #8]
800505c: 687b ldr r3, [r7, #4]
800505e: 681b ldr r3, [r3, #0]
8005060: f042 0201 orr.w r2, r2, #1
8005064: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
8005066: 4b1f ldr r3, [pc, #124] @ (80050e4 <ADC_Enable+0xac>)
8005068: 681b ldr r3, [r3, #0]
800506a: 4a1f ldr r2, [pc, #124] @ (80050e8 <ADC_Enable+0xb0>)
800506c: fba2 2303 umull r2, r3, r2, r3
8005070: 0c9b lsrs r3, r3, #18
8005072: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005074: e002 b.n 800507c <ADC_Enable+0x44>
{
wait_loop_index--;
8005076: 68bb ldr r3, [r7, #8]
8005078: 3b01 subs r3, #1
800507a: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
800507c: 68bb ldr r3, [r7, #8]
800507e: 2b00 cmp r3, #0
8005080: d1f9 bne.n 8005076 <ADC_Enable+0x3e>
}
/* Get tick count */
tickstart = HAL_GetTick();
8005082: f7ff fd05 bl 8004a90 <HAL_GetTick>
8005086: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively enabled */
while(ADC_IS_ENABLE(hadc) == RESET)
8005088: e01f b.n 80050ca <ADC_Enable+0x92>
{
if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
800508a: f7ff fd01 bl 8004a90 <HAL_GetTick>
800508e: 4602 mov r2, r0
8005090: 68fb ldr r3, [r7, #12]
8005092: 1ad3 subs r3, r2, r3
8005094: 2b02 cmp r3, #2
8005096: d918 bls.n 80050ca <ADC_Enable+0x92>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) == RESET)
8005098: 687b ldr r3, [r7, #4]
800509a: 681b ldr r3, [r3, #0]
800509c: 689b ldr r3, [r3, #8]
800509e: f003 0301 and.w r3, r3, #1
80050a2: 2b01 cmp r3, #1
80050a4: d011 beq.n 80050ca <ADC_Enable+0x92>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80050a6: 687b ldr r3, [r7, #4]
80050a8: 6a9b ldr r3, [r3, #40] @ 0x28
80050aa: f043 0210 orr.w r2, r3, #16
80050ae: 687b ldr r3, [r7, #4]
80050b0: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80050b2: 687b ldr r3, [r7, #4]
80050b4: 6adb ldr r3, [r3, #44] @ 0x2c
80050b6: f043 0201 orr.w r2, r3, #1
80050ba: 687b ldr r3, [r7, #4]
80050bc: 62da str r2, [r3, #44] @ 0x2c
/* Process unlocked */
__HAL_UNLOCK(hadc);
80050be: 687b ldr r3, [r7, #4]
80050c0: 2200 movs r2, #0
80050c2: f883 2024 strb.w r2, [r3, #36] @ 0x24
return HAL_ERROR;
80050c6: 2301 movs r3, #1
80050c8: e007 b.n 80050da <ADC_Enable+0xa2>
while(ADC_IS_ENABLE(hadc) == RESET)
80050ca: 687b ldr r3, [r7, #4]
80050cc: 681b ldr r3, [r3, #0]
80050ce: 689b ldr r3, [r3, #8]
80050d0: f003 0301 and.w r3, r3, #1
80050d4: 2b01 cmp r3, #1
80050d6: d1d8 bne.n 800508a <ADC_Enable+0x52>
}
}
}
/* Return HAL status */
return HAL_OK;
80050d8: 2300 movs r3, #0
}
80050da: 4618 mov r0, r3
80050dc: 3710 adds r7, #16
80050de: 46bd mov sp, r7
80050e0: bd80 pop {r7, pc}
80050e2: bf00 nop
80050e4: 20000010 .word 0x20000010
80050e8: 431bde83 .word 0x431bde83
080050ec <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
80050ec: b580 push {r7, lr}
80050ee: b084 sub sp, #16
80050f0: af00 add r7, sp, #0
80050f2: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
80050f4: 2300 movs r3, #0
80050f6: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
80050f8: 687b ldr r3, [r7, #4]
80050fa: 681b ldr r3, [r3, #0]
80050fc: 689b ldr r3, [r3, #8]
80050fe: f003 0301 and.w r3, r3, #1
8005102: 2b01 cmp r3, #1
8005104: d12e bne.n 8005164 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8005106: 687b ldr r3, [r7, #4]
8005108: 681b ldr r3, [r3, #0]
800510a: 689a ldr r2, [r3, #8]
800510c: 687b ldr r3, [r7, #4]
800510e: 681b ldr r3, [r3, #0]
8005110: f022 0201 bic.w r2, r2, #1
8005114: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
8005116: f7ff fcbb bl 8004a90 <HAL_GetTick>
800511a: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
800511c: e01b b.n 8005156 <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
800511e: f7ff fcb7 bl 8004a90 <HAL_GetTick>
8005122: 4602 mov r2, r0
8005124: 68fb ldr r3, [r7, #12]
8005126: 1ad3 subs r3, r2, r3
8005128: 2b02 cmp r3, #2
800512a: d914 bls.n 8005156 <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
800512c: 687b ldr r3, [r7, #4]
800512e: 681b ldr r3, [r3, #0]
8005130: 689b ldr r3, [r3, #8]
8005132: f003 0301 and.w r3, r3, #1
8005136: 2b01 cmp r3, #1
8005138: d10d bne.n 8005156 <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800513a: 687b ldr r3, [r7, #4]
800513c: 6a9b ldr r3, [r3, #40] @ 0x28
800513e: f043 0210 orr.w r2, r3, #16
8005142: 687b ldr r3, [r7, #4]
8005144: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005146: 687b ldr r3, [r7, #4]
8005148: 6adb ldr r3, [r3, #44] @ 0x2c
800514a: f043 0201 orr.w r2, r3, #1
800514e: 687b ldr r3, [r7, #4]
8005150: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
8005152: 2301 movs r3, #1
8005154: e007 b.n 8005166 <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
8005156: 687b ldr r3, [r7, #4]
8005158: 681b ldr r3, [r3, #0]
800515a: 689b ldr r3, [r3, #8]
800515c: f003 0301 and.w r3, r3, #1
8005160: 2b01 cmp r3, #1
8005162: d0dc beq.n 800511e <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
8005164: 2300 movs r3, #0
}
8005166: 4618 mov r0, r3
8005168: 3710 adds r7, #16
800516a: 46bd mov sp, r7
800516c: bd80 pop {r7, pc}
0800516e <ADC_DMAConvCplt>:
* @brief DMA transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
800516e: b580 push {r7, lr}
8005170: b084 sub sp, #16
8005172: af00 add r7, sp, #0
8005174: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8005176: 687b ldr r3, [r7, #4]
8005178: 6a5b ldr r3, [r3, #36] @ 0x24
800517a: 60fb str r3, [r7, #12]
/* Update state machine on conversion status if not in error state */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
800517c: 68fb ldr r3, [r7, #12]
800517e: 6a9b ldr r3, [r3, #40] @ 0x28
8005180: f003 0350 and.w r3, r3, #80 @ 0x50
8005184: 2b00 cmp r3, #0
8005186: d127 bne.n 80051d8 <ADC_DMAConvCplt+0x6a>
{
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
8005188: 68fb ldr r3, [r7, #12]
800518a: 6a9b ldr r3, [r3, #40] @ 0x28
800518c: f443 7200 orr.w r2, r3, #512 @ 0x200
8005190: 68fb ldr r3, [r7, #12]
8005192: 629a str r2, [r3, #40] @ 0x28
/* Determine whether any further conversion upcoming on group regular */
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F1 devices, in case of sequencer enabled */
/* (several ranks selected), end of conversion flag is raised */
/* at the end of the sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8005194: 68fb ldr r3, [r7, #12]
8005196: 681b ldr r3, [r3, #0]
8005198: 689b ldr r3, [r3, #8]
800519a: f403 2360 and.w r3, r3, #917504 @ 0xe0000
800519e: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
80051a2: d115 bne.n 80051d0 <ADC_DMAConvCplt+0x62>
(hadc->Init.ContinuousConvMode == DISABLE) )
80051a4: 68fb ldr r3, [r7, #12]
80051a6: 7b1b ldrb r3, [r3, #12]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
80051a8: 2b00 cmp r3, #0
80051aa: d111 bne.n 80051d0 <ADC_DMAConvCplt+0x62>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
80051ac: 68fb ldr r3, [r7, #12]
80051ae: 6a9b ldr r3, [r3, #40] @ 0x28
80051b0: f423 7280 bic.w r2, r3, #256 @ 0x100
80051b4: 68fb ldr r3, [r7, #12]
80051b6: 629a str r2, [r3, #40] @ 0x28
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
80051b8: 68fb ldr r3, [r7, #12]
80051ba: 6a9b ldr r3, [r3, #40] @ 0x28
80051bc: f403 5380 and.w r3, r3, #4096 @ 0x1000
80051c0: 2b00 cmp r3, #0
80051c2: d105 bne.n 80051d0 <ADC_DMAConvCplt+0x62>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
80051c4: 68fb ldr r3, [r7, #12]
80051c6: 6a9b ldr r3, [r3, #40] @ 0x28
80051c8: f043 0201 orr.w r2, r3, #1
80051cc: 68fb ldr r3, [r7, #12]
80051ce: 629a str r2, [r3, #40] @ 0x28
/* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvCpltCallback(hadc);
#else
HAL_ADC_ConvCpltCallback(hadc);
80051d0: 68f8 ldr r0, [r7, #12]
80051d2: f7ff fe1d bl 8004e10 <HAL_ADC_ConvCpltCallback>
else
{
/* Call DMA error callback */
hadc->DMA_Handle->XferErrorCallback(hdma);
}
}
80051d6: e004 b.n 80051e2 <ADC_DMAConvCplt+0x74>
hadc->DMA_Handle->XferErrorCallback(hdma);
80051d8: 68fb ldr r3, [r7, #12]
80051da: 6a1b ldr r3, [r3, #32]
80051dc: 6b1b ldr r3, [r3, #48] @ 0x30
80051de: 6878 ldr r0, [r7, #4]
80051e0: 4798 blx r3
}
80051e2: bf00 nop
80051e4: 3710 adds r7, #16
80051e6: 46bd mov sp, r7
80051e8: bd80 pop {r7, pc}
080051ea <ADC_DMAHalfConvCplt>:
* @brief DMA half transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
{
80051ea: b580 push {r7, lr}
80051ec: b084 sub sp, #16
80051ee: af00 add r7, sp, #0
80051f0: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80051f2: 687b ldr r3, [r7, #4]
80051f4: 6a5b ldr r3, [r3, #36] @ 0x24
80051f6: 60fb str r3, [r7, #12]
/* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvHalfCpltCallback(hadc);
#else
HAL_ADC_ConvHalfCpltCallback(hadc);
80051f8: 68f8 ldr r0, [r7, #12]
80051fa: f7ff fe12 bl 8004e22 <HAL_ADC_ConvHalfCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
80051fe: bf00 nop
8005200: 3710 adds r7, #16
8005202: 46bd mov sp, r7
8005204: bd80 pop {r7, pc}
08005206 <ADC_DMAError>:
* @brief DMA error callback
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAError(DMA_HandleTypeDef *hdma)
{
8005206: b580 push {r7, lr}
8005208: b084 sub sp, #16
800520a: af00 add r7, sp, #0
800520c: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
800520e: 687b ldr r3, [r7, #4]
8005210: 6a5b ldr r3, [r3, #36] @ 0x24
8005212: 60fb str r3, [r7, #12]
/* Set ADC state */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
8005214: 68fb ldr r3, [r7, #12]
8005216: 6a9b ldr r3, [r3, #40] @ 0x28
8005218: f043 0240 orr.w r2, r3, #64 @ 0x40
800521c: 68fb ldr r3, [r7, #12]
800521e: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to DMA error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
8005220: 68fb ldr r3, [r7, #12]
8005222: 6adb ldr r3, [r3, #44] @ 0x2c
8005224: f043 0204 orr.w r2, r3, #4
8005228: 68fb ldr r3, [r7, #12]
800522a: 62da str r2, [r3, #44] @ 0x2c
/* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ErrorCallback(hadc);
#else
HAL_ADC_ErrorCallback(hadc);
800522c: 68f8 ldr r0, [r7, #12]
800522e: f7ff fe01 bl 8004e34 <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
8005232: bf00 nop
8005234: 3710 adds r7, #16
8005236: 46bd mov sp, r7
8005238: bd80 pop {r7, pc}
...
0800523c <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
800523c: b480 push {r7}
800523e: b085 sub sp, #20
8005240: af00 add r7, sp, #0
8005242: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005244: 687b ldr r3, [r7, #4]
8005246: f003 0307 and.w r3, r3, #7
800524a: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
800524c: 4b0c ldr r3, [pc, #48] @ (8005280 <__NVIC_SetPriorityGrouping+0x44>)
800524e: 68db ldr r3, [r3, #12]
8005250: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8005252: 68ba ldr r2, [r7, #8]
8005254: f64f 03ff movw r3, #63743 @ 0xf8ff
8005258: 4013 ands r3, r2
800525a: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
800525c: 68fb ldr r3, [r7, #12]
800525e: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8005260: 68bb ldr r3, [r7, #8]
8005262: 4313 orrs r3, r2
reg_value = (reg_value |
8005264: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8005268: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800526c: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
800526e: 4a04 ldr r2, [pc, #16] @ (8005280 <__NVIC_SetPriorityGrouping+0x44>)
8005270: 68bb ldr r3, [r7, #8]
8005272: 60d3 str r3, [r2, #12]
}
8005274: bf00 nop
8005276: 3714 adds r7, #20
8005278: 46bd mov sp, r7
800527a: bc80 pop {r7}
800527c: 4770 bx lr
800527e: bf00 nop
8005280: e000ed00 .word 0xe000ed00
08005284 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8005284: b480 push {r7}
8005286: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8005288: 4b04 ldr r3, [pc, #16] @ (800529c <__NVIC_GetPriorityGrouping+0x18>)
800528a: 68db ldr r3, [r3, #12]
800528c: 0a1b lsrs r3, r3, #8
800528e: f003 0307 and.w r3, r3, #7
}
8005292: 4618 mov r0, r3
8005294: 46bd mov sp, r7
8005296: bc80 pop {r7}
8005298: 4770 bx lr
800529a: bf00 nop
800529c: e000ed00 .word 0xe000ed00
080052a0 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
80052a0: b480 push {r7}
80052a2: b083 sub sp, #12
80052a4: af00 add r7, sp, #0
80052a6: 4603 mov r3, r0
80052a8: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80052aa: f997 3007 ldrsb.w r3, [r7, #7]
80052ae: 2b00 cmp r3, #0
80052b0: db0b blt.n 80052ca <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
80052b2: 79fb ldrb r3, [r7, #7]
80052b4: f003 021f and.w r2, r3, #31
80052b8: 4906 ldr r1, [pc, #24] @ (80052d4 <__NVIC_EnableIRQ+0x34>)
80052ba: f997 3007 ldrsb.w r3, [r7, #7]
80052be: 095b lsrs r3, r3, #5
80052c0: 2001 movs r0, #1
80052c2: fa00 f202 lsl.w r2, r0, r2
80052c6: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
80052ca: bf00 nop
80052cc: 370c adds r7, #12
80052ce: 46bd mov sp, r7
80052d0: bc80 pop {r7}
80052d2: 4770 bx lr
80052d4: e000e100 .word 0xe000e100
080052d8 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
80052d8: b480 push {r7}
80052da: b083 sub sp, #12
80052dc: af00 add r7, sp, #0
80052de: 4603 mov r3, r0
80052e0: 6039 str r1, [r7, #0]
80052e2: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80052e4: f997 3007 ldrsb.w r3, [r7, #7]
80052e8: 2b00 cmp r3, #0
80052ea: db0a blt.n 8005302 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80052ec: 683b ldr r3, [r7, #0]
80052ee: b2da uxtb r2, r3
80052f0: 490c ldr r1, [pc, #48] @ (8005324 <__NVIC_SetPriority+0x4c>)
80052f2: f997 3007 ldrsb.w r3, [r7, #7]
80052f6: 0112 lsls r2, r2, #4
80052f8: b2d2 uxtb r2, r2
80052fa: 440b add r3, r1
80052fc: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8005300: e00a b.n 8005318 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8005302: 683b ldr r3, [r7, #0]
8005304: b2da uxtb r2, r3
8005306: 4908 ldr r1, [pc, #32] @ (8005328 <__NVIC_SetPriority+0x50>)
8005308: 79fb ldrb r3, [r7, #7]
800530a: f003 030f and.w r3, r3, #15
800530e: 3b04 subs r3, #4
8005310: 0112 lsls r2, r2, #4
8005312: b2d2 uxtb r2, r2
8005314: 440b add r3, r1
8005316: 761a strb r2, [r3, #24]
}
8005318: bf00 nop
800531a: 370c adds r7, #12
800531c: 46bd mov sp, r7
800531e: bc80 pop {r7}
8005320: 4770 bx lr
8005322: bf00 nop
8005324: e000e100 .word 0xe000e100
8005328: e000ed00 .word 0xe000ed00
0800532c <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
800532c: b480 push {r7}
800532e: b089 sub sp, #36 @ 0x24
8005330: af00 add r7, sp, #0
8005332: 60f8 str r0, [r7, #12]
8005334: 60b9 str r1, [r7, #8]
8005336: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005338: 68fb ldr r3, [r7, #12]
800533a: f003 0307 and.w r3, r3, #7
800533e: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8005340: 69fb ldr r3, [r7, #28]
8005342: f1c3 0307 rsb r3, r3, #7
8005346: 2b04 cmp r3, #4
8005348: bf28 it cs
800534a: 2304 movcs r3, #4
800534c: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
800534e: 69fb ldr r3, [r7, #28]
8005350: 3304 adds r3, #4
8005352: 2b06 cmp r3, #6
8005354: d902 bls.n 800535c <NVIC_EncodePriority+0x30>
8005356: 69fb ldr r3, [r7, #28]
8005358: 3b03 subs r3, #3
800535a: e000 b.n 800535e <NVIC_EncodePriority+0x32>
800535c: 2300 movs r3, #0
800535e: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005360: f04f 32ff mov.w r2, #4294967295
8005364: 69bb ldr r3, [r7, #24]
8005366: fa02 f303 lsl.w r3, r2, r3
800536a: 43da mvns r2, r3
800536c: 68bb ldr r3, [r7, #8]
800536e: 401a ands r2, r3
8005370: 697b ldr r3, [r7, #20]
8005372: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8005374: f04f 31ff mov.w r1, #4294967295
8005378: 697b ldr r3, [r7, #20]
800537a: fa01 f303 lsl.w r3, r1, r3
800537e: 43d9 mvns r1, r3
8005380: 687b ldr r3, [r7, #4]
8005382: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005384: 4313 orrs r3, r2
);
}
8005386: 4618 mov r0, r3
8005388: 3724 adds r7, #36 @ 0x24
800538a: 46bd mov sp, r7
800538c: bc80 pop {r7}
800538e: 4770 bx lr
08005390 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8005390: b580 push {r7, lr}
8005392: b082 sub sp, #8
8005394: af00 add r7, sp, #0
8005396: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8005398: 687b ldr r3, [r7, #4]
800539a: 3b01 subs r3, #1
800539c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
80053a0: d301 bcc.n 80053a6 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
80053a2: 2301 movs r3, #1
80053a4: e00f b.n 80053c6 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
80053a6: 4a0a ldr r2, [pc, #40] @ (80053d0 <SysTick_Config+0x40>)
80053a8: 687b ldr r3, [r7, #4]
80053aa: 3b01 subs r3, #1
80053ac: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
80053ae: 210f movs r1, #15
80053b0: f04f 30ff mov.w r0, #4294967295
80053b4: f7ff ff90 bl 80052d8 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
80053b8: 4b05 ldr r3, [pc, #20] @ (80053d0 <SysTick_Config+0x40>)
80053ba: 2200 movs r2, #0
80053bc: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
80053be: 4b04 ldr r3, [pc, #16] @ (80053d0 <SysTick_Config+0x40>)
80053c0: 2207 movs r2, #7
80053c2: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
80053c4: 2300 movs r3, #0
}
80053c6: 4618 mov r0, r3
80053c8: 3708 adds r7, #8
80053ca: 46bd mov sp, r7
80053cc: bd80 pop {r7, pc}
80053ce: bf00 nop
80053d0: e000e010 .word 0xe000e010
080053d4 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80053d4: b580 push {r7, lr}
80053d6: b082 sub sp, #8
80053d8: af00 add r7, sp, #0
80053da: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
80053dc: 6878 ldr r0, [r7, #4]
80053de: f7ff ff2d bl 800523c <__NVIC_SetPriorityGrouping>
}
80053e2: bf00 nop
80053e4: 3708 adds r7, #8
80053e6: 46bd mov sp, r7
80053e8: bd80 pop {r7, pc}
080053ea <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
80053ea: b580 push {r7, lr}
80053ec: b086 sub sp, #24
80053ee: af00 add r7, sp, #0
80053f0: 4603 mov r3, r0
80053f2: 60b9 str r1, [r7, #8]
80053f4: 607a str r2, [r7, #4]
80053f6: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
80053f8: 2300 movs r3, #0
80053fa: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
80053fc: f7ff ff42 bl 8005284 <__NVIC_GetPriorityGrouping>
8005400: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8005402: 687a ldr r2, [r7, #4]
8005404: 68b9 ldr r1, [r7, #8]
8005406: 6978 ldr r0, [r7, #20]
8005408: f7ff ff90 bl 800532c <NVIC_EncodePriority>
800540c: 4602 mov r2, r0
800540e: f997 300f ldrsb.w r3, [r7, #15]
8005412: 4611 mov r1, r2
8005414: 4618 mov r0, r3
8005416: f7ff ff5f bl 80052d8 <__NVIC_SetPriority>
}
800541a: bf00 nop
800541c: 3718 adds r7, #24
800541e: 46bd mov sp, r7
8005420: bd80 pop {r7, pc}
08005422 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8005422: b580 push {r7, lr}
8005424: b082 sub sp, #8
8005426: af00 add r7, sp, #0
8005428: 4603 mov r3, r0
800542a: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
800542c: f997 3007 ldrsb.w r3, [r7, #7]
8005430: 4618 mov r0, r3
8005432: f7ff ff35 bl 80052a0 <__NVIC_EnableIRQ>
}
8005436: bf00 nop
8005438: 3708 adds r7, #8
800543a: 46bd mov sp, r7
800543c: bd80 pop {r7, pc}
0800543e <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
800543e: b580 push {r7, lr}
8005440: b082 sub sp, #8
8005442: af00 add r7, sp, #0
8005444: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8005446: 6878 ldr r0, [r7, #4]
8005448: f7ff ffa2 bl 8005390 <SysTick_Config>
800544c: 4603 mov r3, r0
}
800544e: 4618 mov r0, r3
8005450: 3708 adds r7, #8
8005452: 46bd mov sp, r7
8005454: bd80 pop {r7, pc}
08005456 <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8005456: b580 push {r7, lr}
8005458: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
800545a: f7fc f9eb bl 8001834 <HAL_SYSTICK_Callback>
}
800545e: bf00 nop
8005460: bd80 pop {r7, pc}
...
08005464 <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8005464: b480 push {r7}
8005466: b085 sub sp, #20
8005468: af00 add r7, sp, #0
800546a: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
800546c: 2300 movs r3, #0
800546e: 60fb str r3, [r7, #12]
/* Check the DMA handle allocation */
if(hdma == NULL)
8005470: 687b ldr r3, [r7, #4]
8005472: 2b00 cmp r3, #0
8005474: d101 bne.n 800547a <HAL_DMA_Init+0x16>
{
return HAL_ERROR;
8005476: 2301 movs r3, #1
8005478: e043 b.n 8005502 <HAL_DMA_Init+0x9e>
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
hdma->DmaBaseAddress = DMA2;
}
#else
/* DMA1 */
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
800547a: 687b ldr r3, [r7, #4]
800547c: 681b ldr r3, [r3, #0]
800547e: 461a mov r2, r3
8005480: 4b22 ldr r3, [pc, #136] @ (800550c <HAL_DMA_Init+0xa8>)
8005482: 4413 add r3, r2
8005484: 4a22 ldr r2, [pc, #136] @ (8005510 <HAL_DMA_Init+0xac>)
8005486: fba2 2303 umull r2, r3, r2, r3
800548a: 091b lsrs r3, r3, #4
800548c: 009a lsls r2, r3, #2
800548e: 687b ldr r3, [r7, #4]
8005490: 641a str r2, [r3, #64] @ 0x40
hdma->DmaBaseAddress = DMA1;
8005492: 687b ldr r3, [r7, #4]
8005494: 4a1f ldr r2, [pc, #124] @ (8005514 <HAL_DMA_Init+0xb0>)
8005496: 63da str r2, [r3, #60] @ 0x3c
#endif /* DMA2 */
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005498: 687b ldr r3, [r7, #4]
800549a: 2202 movs r2, #2
800549c: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Get the CR register value */
tmp = hdma->Instance->CCR;
80054a0: 687b ldr r3, [r7, #4]
80054a2: 681b ldr r3, [r3, #0]
80054a4: 681b ldr r3, [r3, #0]
80054a6: 60fb str r3, [r7, #12]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
80054a8: 68fb ldr r3, [r7, #12]
80054aa: f423 537f bic.w r3, r3, #16320 @ 0x3fc0
80054ae: f023 0330 bic.w r3, r3, #48 @ 0x30
80054b2: 60fb str r3, [r7, #12]
DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
DMA_CCR_DIR));
/* Prepare the DMA Channel configuration */
tmp |= hdma->Init.Direction |
80054b4: 687b ldr r3, [r7, #4]
80054b6: 685a ldr r2, [r3, #4]
hdma->Init.PeriphInc | hdma->Init.MemInc |
80054b8: 687b ldr r3, [r7, #4]
80054ba: 689b ldr r3, [r3, #8]
tmp |= hdma->Init.Direction |
80054bc: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
80054be: 687b ldr r3, [r7, #4]
80054c0: 68db ldr r3, [r3, #12]
80054c2: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80054c4: 687b ldr r3, [r7, #4]
80054c6: 691b ldr r3, [r3, #16]
hdma->Init.PeriphInc | hdma->Init.MemInc |
80054c8: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80054ca: 687b ldr r3, [r7, #4]
80054cc: 695b ldr r3, [r3, #20]
80054ce: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
80054d0: 687b ldr r3, [r7, #4]
80054d2: 699b ldr r3, [r3, #24]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80054d4: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
80054d6: 687b ldr r3, [r7, #4]
80054d8: 69db ldr r3, [r3, #28]
80054da: 4313 orrs r3, r2
tmp |= hdma->Init.Direction |
80054dc: 68fa ldr r2, [r7, #12]
80054de: 4313 orrs r3, r2
80054e0: 60fb str r3, [r7, #12]
/* Write to DMA Channel CR register */
hdma->Instance->CCR = tmp;
80054e2: 687b ldr r3, [r7, #4]
80054e4: 681b ldr r3, [r3, #0]
80054e6: 68fa ldr r2, [r7, #12]
80054e8: 601a str r2, [r3, #0]
/* Initialise the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
80054ea: 687b ldr r3, [r7, #4]
80054ec: 2200 movs r2, #0
80054ee: 639a str r2, [r3, #56] @ 0x38
/* Initialize the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
80054f0: 687b ldr r3, [r7, #4]
80054f2: 2201 movs r2, #1
80054f4: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Allocate lock resource and initialize it */
hdma->Lock = HAL_UNLOCKED;
80054f8: 687b ldr r3, [r7, #4]
80054fa: 2200 movs r2, #0
80054fc: f883 2020 strb.w r2, [r3, #32]
return HAL_OK;
8005500: 2300 movs r3, #0
}
8005502: 4618 mov r0, r3
8005504: 3714 adds r7, #20
8005506: 46bd mov sp, r7
8005508: bc80 pop {r7}
800550a: 4770 bx lr
800550c: bffdfff8 .word 0xbffdfff8
8005510: cccccccd .word 0xcccccccd
8005514: 40020000 .word 0x40020000
08005518 <HAL_DMA_Start_IT>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005518: b580 push {r7, lr}
800551a: b086 sub sp, #24
800551c: af00 add r7, sp, #0
800551e: 60f8 str r0, [r7, #12]
8005520: 60b9 str r1, [r7, #8]
8005522: 607a str r2, [r7, #4]
8005524: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8005526: 2300 movs r3, #0
8005528: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
800552a: 68fb ldr r3, [r7, #12]
800552c: f893 3020 ldrb.w r3, [r3, #32]
8005530: 2b01 cmp r3, #1
8005532: d101 bne.n 8005538 <HAL_DMA_Start_IT+0x20>
8005534: 2302 movs r3, #2
8005536: e04b b.n 80055d0 <HAL_DMA_Start_IT+0xb8>
8005538: 68fb ldr r3, [r7, #12]
800553a: 2201 movs r2, #1
800553c: f883 2020 strb.w r2, [r3, #32]
if(HAL_DMA_STATE_READY == hdma->State)
8005540: 68fb ldr r3, [r7, #12]
8005542: f893 3021 ldrb.w r3, [r3, #33] @ 0x21
8005546: b2db uxtb r3, r3
8005548: 2b01 cmp r3, #1
800554a: d13a bne.n 80055c2 <HAL_DMA_Start_IT+0xaa>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
800554c: 68fb ldr r3, [r7, #12]
800554e: 2202 movs r2, #2
8005550: f883 2021 strb.w r2, [r3, #33] @ 0x21
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005554: 68fb ldr r3, [r7, #12]
8005556: 2200 movs r2, #0
8005558: 639a str r2, [r3, #56] @ 0x38
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
800555a: 68fb ldr r3, [r7, #12]
800555c: 681b ldr r3, [r3, #0]
800555e: 681a ldr r2, [r3, #0]
8005560: 68fb ldr r3, [r7, #12]
8005562: 681b ldr r3, [r3, #0]
8005564: f022 0201 bic.w r2, r2, #1
8005568: 601a str r2, [r3, #0]
/* Configure the source, destination address and the data length & clear flags*/
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
800556a: 683b ldr r3, [r7, #0]
800556c: 687a ldr r2, [r7, #4]
800556e: 68b9 ldr r1, [r7, #8]
8005570: 68f8 ldr r0, [r7, #12]
8005572: f000 f937 bl 80057e4 <DMA_SetConfig>
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback)
8005576: 68fb ldr r3, [r7, #12]
8005578: 6adb ldr r3, [r3, #44] @ 0x2c
800557a: 2b00 cmp r3, #0
800557c: d008 beq.n 8005590 <HAL_DMA_Start_IT+0x78>
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
800557e: 68fb ldr r3, [r7, #12]
8005580: 681b ldr r3, [r3, #0]
8005582: 681a ldr r2, [r3, #0]
8005584: 68fb ldr r3, [r7, #12]
8005586: 681b ldr r3, [r3, #0]
8005588: f042 020e orr.w r2, r2, #14
800558c: 601a str r2, [r3, #0]
800558e: e00f b.n 80055b0 <HAL_DMA_Start_IT+0x98>
}
else
{
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005590: 68fb ldr r3, [r7, #12]
8005592: 681b ldr r3, [r3, #0]
8005594: 681a ldr r2, [r3, #0]
8005596: 68fb ldr r3, [r7, #12]
8005598: 681b ldr r3, [r3, #0]
800559a: f022 0204 bic.w r2, r2, #4
800559e: 601a str r2, [r3, #0]
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
80055a0: 68fb ldr r3, [r7, #12]
80055a2: 681b ldr r3, [r3, #0]
80055a4: 681a ldr r2, [r3, #0]
80055a6: 68fb ldr r3, [r7, #12]
80055a8: 681b ldr r3, [r3, #0]
80055aa: f042 020a orr.w r2, r2, #10
80055ae: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
80055b0: 68fb ldr r3, [r7, #12]
80055b2: 681b ldr r3, [r3, #0]
80055b4: 681a ldr r2, [r3, #0]
80055b6: 68fb ldr r3, [r7, #12]
80055b8: 681b ldr r3, [r3, #0]
80055ba: f042 0201 orr.w r2, r2, #1
80055be: 601a str r2, [r3, #0]
80055c0: e005 b.n 80055ce <HAL_DMA_Start_IT+0xb6>
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80055c2: 68fb ldr r3, [r7, #12]
80055c4: 2200 movs r2, #0
80055c6: f883 2020 strb.w r2, [r3, #32]
/* Remain BUSY */
status = HAL_BUSY;
80055ca: 2302 movs r3, #2
80055cc: 75fb strb r3, [r7, #23]
}
return status;
80055ce: 7dfb ldrb r3, [r7, #23]
}
80055d0: 4618 mov r0, r3
80055d2: 3718 adds r7, #24
80055d4: 46bd mov sp, r7
80055d6: bd80 pop {r7, pc}
080055d8 <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
80055d8: b580 push {r7, lr}
80055da: b084 sub sp, #16
80055dc: af00 add r7, sp, #0
80055de: 6078 str r0, [r7, #4]
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
80055e0: 687b ldr r3, [r7, #4]
80055e2: 6bdb ldr r3, [r3, #60] @ 0x3c
80055e4: 681b ldr r3, [r3, #0]
80055e6: 60fb str r3, [r7, #12]
uint32_t source_it = hdma->Instance->CCR;
80055e8: 687b ldr r3, [r7, #4]
80055ea: 681b ldr r3, [r3, #0]
80055ec: 681b ldr r3, [r3, #0]
80055ee: 60bb str r3, [r7, #8]
/* Half Transfer Complete Interrupt management ******************************/
if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
80055f0: 687b ldr r3, [r7, #4]
80055f2: 6c1b ldr r3, [r3, #64] @ 0x40
80055f4: 2204 movs r2, #4
80055f6: 409a lsls r2, r3
80055f8: 68fb ldr r3, [r7, #12]
80055fa: 4013 ands r3, r2
80055fc: 2b00 cmp r3, #0
80055fe: d04f beq.n 80056a0 <HAL_DMA_IRQHandler+0xc8>
8005600: 68bb ldr r3, [r7, #8]
8005602: f003 0304 and.w r3, r3, #4
8005606: 2b00 cmp r3, #0
8005608: d04a beq.n 80056a0 <HAL_DMA_IRQHandler+0xc8>
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
800560a: 687b ldr r3, [r7, #4]
800560c: 681b ldr r3, [r3, #0]
800560e: 681b ldr r3, [r3, #0]
8005610: f003 0320 and.w r3, r3, #32
8005614: 2b00 cmp r3, #0
8005616: d107 bne.n 8005628 <HAL_DMA_IRQHandler+0x50>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005618: 687b ldr r3, [r7, #4]
800561a: 681b ldr r3, [r3, #0]
800561c: 681a ldr r2, [r3, #0]
800561e: 687b ldr r3, [r7, #4]
8005620: 681b ldr r3, [r3, #0]
8005622: f022 0204 bic.w r2, r2, #4
8005626: 601a str r2, [r3, #0]
}
/* Clear the half transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
8005628: 687b ldr r3, [r7, #4]
800562a: 681b ldr r3, [r3, #0]
800562c: 4a66 ldr r2, [pc, #408] @ (80057c8 <HAL_DMA_IRQHandler+0x1f0>)
800562e: 4293 cmp r3, r2
8005630: d029 beq.n 8005686 <HAL_DMA_IRQHandler+0xae>
8005632: 687b ldr r3, [r7, #4]
8005634: 681b ldr r3, [r3, #0]
8005636: 4a65 ldr r2, [pc, #404] @ (80057cc <HAL_DMA_IRQHandler+0x1f4>)
8005638: 4293 cmp r3, r2
800563a: d022 beq.n 8005682 <HAL_DMA_IRQHandler+0xaa>
800563c: 687b ldr r3, [r7, #4]
800563e: 681b ldr r3, [r3, #0]
8005640: 4a63 ldr r2, [pc, #396] @ (80057d0 <HAL_DMA_IRQHandler+0x1f8>)
8005642: 4293 cmp r3, r2
8005644: d01a beq.n 800567c <HAL_DMA_IRQHandler+0xa4>
8005646: 687b ldr r3, [r7, #4]
8005648: 681b ldr r3, [r3, #0]
800564a: 4a62 ldr r2, [pc, #392] @ (80057d4 <HAL_DMA_IRQHandler+0x1fc>)
800564c: 4293 cmp r3, r2
800564e: d012 beq.n 8005676 <HAL_DMA_IRQHandler+0x9e>
8005650: 687b ldr r3, [r7, #4]
8005652: 681b ldr r3, [r3, #0]
8005654: 4a60 ldr r2, [pc, #384] @ (80057d8 <HAL_DMA_IRQHandler+0x200>)
8005656: 4293 cmp r3, r2
8005658: d00a beq.n 8005670 <HAL_DMA_IRQHandler+0x98>
800565a: 687b ldr r3, [r7, #4]
800565c: 681b ldr r3, [r3, #0]
800565e: 4a5f ldr r2, [pc, #380] @ (80057dc <HAL_DMA_IRQHandler+0x204>)
8005660: 4293 cmp r3, r2
8005662: d102 bne.n 800566a <HAL_DMA_IRQHandler+0x92>
8005664: f44f 0380 mov.w r3, #4194304 @ 0x400000
8005668: e00e b.n 8005688 <HAL_DMA_IRQHandler+0xb0>
800566a: f04f 6380 mov.w r3, #67108864 @ 0x4000000
800566e: e00b b.n 8005688 <HAL_DMA_IRQHandler+0xb0>
8005670: f44f 2380 mov.w r3, #262144 @ 0x40000
8005674: e008 b.n 8005688 <HAL_DMA_IRQHandler+0xb0>
8005676: f44f 4380 mov.w r3, #16384 @ 0x4000
800567a: e005 b.n 8005688 <HAL_DMA_IRQHandler+0xb0>
800567c: f44f 6380 mov.w r3, #1024 @ 0x400
8005680: e002 b.n 8005688 <HAL_DMA_IRQHandler+0xb0>
8005682: 2340 movs r3, #64 @ 0x40
8005684: e000 b.n 8005688 <HAL_DMA_IRQHandler+0xb0>
8005686: 2304 movs r3, #4
8005688: 4a55 ldr r2, [pc, #340] @ (80057e0 <HAL_DMA_IRQHandler+0x208>)
800568a: 6053 str r3, [r2, #4]
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
800568c: 687b ldr r3, [r7, #4]
800568e: 6adb ldr r3, [r3, #44] @ 0x2c
8005690: 2b00 cmp r3, #0
8005692: f000 8094 beq.w 80057be <HAL_DMA_IRQHandler+0x1e6>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8005696: 687b ldr r3, [r7, #4]
8005698: 6adb ldr r3, [r3, #44] @ 0x2c
800569a: 6878 ldr r0, [r7, #4]
800569c: 4798 blx r3
if(hdma->XferHalfCpltCallback != NULL)
800569e: e08e b.n 80057be <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
80056a0: 687b ldr r3, [r7, #4]
80056a2: 6c1b ldr r3, [r3, #64] @ 0x40
80056a4: 2202 movs r2, #2
80056a6: 409a lsls r2, r3
80056a8: 68fb ldr r3, [r7, #12]
80056aa: 4013 ands r3, r2
80056ac: 2b00 cmp r3, #0
80056ae: d056 beq.n 800575e <HAL_DMA_IRQHandler+0x186>
80056b0: 68bb ldr r3, [r7, #8]
80056b2: f003 0302 and.w r3, r3, #2
80056b6: 2b00 cmp r3, #0
80056b8: d051 beq.n 800575e <HAL_DMA_IRQHandler+0x186>
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
80056ba: 687b ldr r3, [r7, #4]
80056bc: 681b ldr r3, [r3, #0]
80056be: 681b ldr r3, [r3, #0]
80056c0: f003 0320 and.w r3, r3, #32
80056c4: 2b00 cmp r3, #0
80056c6: d10b bne.n 80056e0 <HAL_DMA_IRQHandler+0x108>
{
/* Disable the transfer complete and error interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
80056c8: 687b ldr r3, [r7, #4]
80056ca: 681b ldr r3, [r3, #0]
80056cc: 681a ldr r2, [r3, #0]
80056ce: 687b ldr r3, [r7, #4]
80056d0: 681b ldr r3, [r3, #0]
80056d2: f022 020a bic.w r2, r2, #10
80056d6: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
80056d8: 687b ldr r3, [r7, #4]
80056da: 2201 movs r2, #1
80056dc: f883 2021 strb.w r2, [r3, #33] @ 0x21
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
80056e0: 687b ldr r3, [r7, #4]
80056e2: 681b ldr r3, [r3, #0]
80056e4: 4a38 ldr r2, [pc, #224] @ (80057c8 <HAL_DMA_IRQHandler+0x1f0>)
80056e6: 4293 cmp r3, r2
80056e8: d029 beq.n 800573e <HAL_DMA_IRQHandler+0x166>
80056ea: 687b ldr r3, [r7, #4]
80056ec: 681b ldr r3, [r3, #0]
80056ee: 4a37 ldr r2, [pc, #220] @ (80057cc <HAL_DMA_IRQHandler+0x1f4>)
80056f0: 4293 cmp r3, r2
80056f2: d022 beq.n 800573a <HAL_DMA_IRQHandler+0x162>
80056f4: 687b ldr r3, [r7, #4]
80056f6: 681b ldr r3, [r3, #0]
80056f8: 4a35 ldr r2, [pc, #212] @ (80057d0 <HAL_DMA_IRQHandler+0x1f8>)
80056fa: 4293 cmp r3, r2
80056fc: d01a beq.n 8005734 <HAL_DMA_IRQHandler+0x15c>
80056fe: 687b ldr r3, [r7, #4]
8005700: 681b ldr r3, [r3, #0]
8005702: 4a34 ldr r2, [pc, #208] @ (80057d4 <HAL_DMA_IRQHandler+0x1fc>)
8005704: 4293 cmp r3, r2
8005706: d012 beq.n 800572e <HAL_DMA_IRQHandler+0x156>
8005708: 687b ldr r3, [r7, #4]
800570a: 681b ldr r3, [r3, #0]
800570c: 4a32 ldr r2, [pc, #200] @ (80057d8 <HAL_DMA_IRQHandler+0x200>)
800570e: 4293 cmp r3, r2
8005710: d00a beq.n 8005728 <HAL_DMA_IRQHandler+0x150>
8005712: 687b ldr r3, [r7, #4]
8005714: 681b ldr r3, [r3, #0]
8005716: 4a31 ldr r2, [pc, #196] @ (80057dc <HAL_DMA_IRQHandler+0x204>)
8005718: 4293 cmp r3, r2
800571a: d102 bne.n 8005722 <HAL_DMA_IRQHandler+0x14a>
800571c: f44f 1300 mov.w r3, #2097152 @ 0x200000
8005720: e00e b.n 8005740 <HAL_DMA_IRQHandler+0x168>
8005722: f04f 7300 mov.w r3, #33554432 @ 0x2000000
8005726: e00b b.n 8005740 <HAL_DMA_IRQHandler+0x168>
8005728: f44f 3300 mov.w r3, #131072 @ 0x20000
800572c: e008 b.n 8005740 <HAL_DMA_IRQHandler+0x168>
800572e: f44f 5300 mov.w r3, #8192 @ 0x2000
8005732: e005 b.n 8005740 <HAL_DMA_IRQHandler+0x168>
8005734: f44f 7300 mov.w r3, #512 @ 0x200
8005738: e002 b.n 8005740 <HAL_DMA_IRQHandler+0x168>
800573a: 2320 movs r3, #32
800573c: e000 b.n 8005740 <HAL_DMA_IRQHandler+0x168>
800573e: 2302 movs r3, #2
8005740: 4a27 ldr r2, [pc, #156] @ (80057e0 <HAL_DMA_IRQHandler+0x208>)
8005742: 6053 str r3, [r2, #4]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005744: 687b ldr r3, [r7, #4]
8005746: 2200 movs r2, #0
8005748: f883 2020 strb.w r2, [r3, #32]
if(hdma->XferCpltCallback != NULL)
800574c: 687b ldr r3, [r7, #4]
800574e: 6a9b ldr r3, [r3, #40] @ 0x28
8005750: 2b00 cmp r3, #0
8005752: d034 beq.n 80057be <HAL_DMA_IRQHandler+0x1e6>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8005754: 687b ldr r3, [r7, #4]
8005756: 6a9b ldr r3, [r3, #40] @ 0x28
8005758: 6878 ldr r0, [r7, #4]
800575a: 4798 blx r3
if(hdma->XferCpltCallback != NULL)
800575c: e02f b.n 80057be <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Error Interrupt management **************************************/
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
800575e: 687b ldr r3, [r7, #4]
8005760: 6c1b ldr r3, [r3, #64] @ 0x40
8005762: 2208 movs r2, #8
8005764: 409a lsls r2, r3
8005766: 68fb ldr r3, [r7, #12]
8005768: 4013 ands r3, r2
800576a: 2b00 cmp r3, #0
800576c: d028 beq.n 80057c0 <HAL_DMA_IRQHandler+0x1e8>
800576e: 68bb ldr r3, [r7, #8]
8005770: f003 0308 and.w r3, r3, #8
8005774: 2b00 cmp r3, #0
8005776: d023 beq.n 80057c0 <HAL_DMA_IRQHandler+0x1e8>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005778: 687b ldr r3, [r7, #4]
800577a: 681b ldr r3, [r3, #0]
800577c: 681a ldr r2, [r3, #0]
800577e: 687b ldr r3, [r7, #4]
8005780: 681b ldr r3, [r3, #0]
8005782: f022 020e bic.w r2, r2, #14
8005786: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005788: 687b ldr r3, [r7, #4]
800578a: 6c1a ldr r2, [r3, #64] @ 0x40
800578c: 687b ldr r3, [r7, #4]
800578e: 6bdb ldr r3, [r3, #60] @ 0x3c
8005790: 2101 movs r1, #1
8005792: fa01 f202 lsl.w r2, r1, r2
8005796: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
8005798: 687b ldr r3, [r7, #4]
800579a: 2201 movs r2, #1
800579c: 639a str r2, [r3, #56] @ 0x38
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
800579e: 687b ldr r3, [r7, #4]
80057a0: 2201 movs r2, #1
80057a2: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80057a6: 687b ldr r3, [r7, #4]
80057a8: 2200 movs r2, #0
80057aa: f883 2020 strb.w r2, [r3, #32]
if (hdma->XferErrorCallback != NULL)
80057ae: 687b ldr r3, [r7, #4]
80057b0: 6b1b ldr r3, [r3, #48] @ 0x30
80057b2: 2b00 cmp r3, #0
80057b4: d004 beq.n 80057c0 <HAL_DMA_IRQHandler+0x1e8>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
80057b6: 687b ldr r3, [r7, #4]
80057b8: 6b1b ldr r3, [r3, #48] @ 0x30
80057ba: 6878 ldr r0, [r7, #4]
80057bc: 4798 blx r3
}
}
return;
80057be: bf00 nop
80057c0: bf00 nop
}
80057c2: 3710 adds r7, #16
80057c4: 46bd mov sp, r7
80057c6: bd80 pop {r7, pc}
80057c8: 40020008 .word 0x40020008
80057cc: 4002001c .word 0x4002001c
80057d0: 40020030 .word 0x40020030
80057d4: 40020044 .word 0x40020044
80057d8: 40020058 .word 0x40020058
80057dc: 4002006c .word 0x4002006c
80057e0: 40020000 .word 0x40020000
080057e4 <DMA_SetConfig>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
80057e4: b480 push {r7}
80057e6: b085 sub sp, #20
80057e8: af00 add r7, sp, #0
80057ea: 60f8 str r0, [r7, #12]
80057ec: 60b9 str r1, [r7, #8]
80057ee: 607a str r2, [r7, #4]
80057f0: 603b str r3, [r7, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
80057f2: 68fb ldr r3, [r7, #12]
80057f4: 6c1a ldr r2, [r3, #64] @ 0x40
80057f6: 68fb ldr r3, [r7, #12]
80057f8: 6bdb ldr r3, [r3, #60] @ 0x3c
80057fa: 2101 movs r1, #1
80057fc: fa01 f202 lsl.w r2, r1, r2
8005800: 605a str r2, [r3, #4]
/* Configure DMA Channel data length */
hdma->Instance->CNDTR = DataLength;
8005802: 68fb ldr r3, [r7, #12]
8005804: 681b ldr r3, [r3, #0]
8005806: 683a ldr r2, [r7, #0]
8005808: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
800580a: 68fb ldr r3, [r7, #12]
800580c: 685b ldr r3, [r3, #4]
800580e: 2b10 cmp r3, #16
8005810: d108 bne.n 8005824 <DMA_SetConfig+0x40>
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;
8005812: 68fb ldr r3, [r7, #12]
8005814: 681b ldr r3, [r3, #0]
8005816: 687a ldr r2, [r7, #4]
8005818: 609a str r2, [r3, #8]
/* Configure DMA Channel source address */
hdma->Instance->CMAR = SrcAddress;
800581a: 68fb ldr r3, [r7, #12]
800581c: 681b ldr r3, [r3, #0]
800581e: 68ba ldr r2, [r7, #8]
8005820: 60da str r2, [r3, #12]
hdma->Instance->CPAR = SrcAddress;
/* Configure DMA Channel destination address */
hdma->Instance->CMAR = DstAddress;
}
}
8005822: e007 b.n 8005834 <DMA_SetConfig+0x50>
hdma->Instance->CPAR = SrcAddress;
8005824: 68fb ldr r3, [r7, #12]
8005826: 681b ldr r3, [r3, #0]
8005828: 68ba ldr r2, [r7, #8]
800582a: 609a str r2, [r3, #8]
hdma->Instance->CMAR = DstAddress;
800582c: 68fb ldr r3, [r7, #12]
800582e: 681b ldr r3, [r3, #0]
8005830: 687a ldr r2, [r7, #4]
8005832: 60da str r2, [r3, #12]
}
8005834: bf00 nop
8005836: 3714 adds r7, #20
8005838: 46bd mov sp, r7
800583a: bc80 pop {r7}
800583c: 4770 bx lr
...
08005840 <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8005840: b5f0 push {r4, r5, r6, r7, lr}
8005842: b087 sub sp, #28
8005844: af00 add r7, sp, #0
8005846: 60f8 str r0, [r7, #12]
8005848: 60b9 str r1, [r7, #8]
800584a: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
800584e: 2301 movs r3, #1
8005850: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8005852: 2300 movs r3, #0
8005854: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
8005856: 2300 movs r3, #0
8005858: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
800585a: 4b2f ldr r3, [pc, #188] @ (8005918 <HAL_FLASH_Program+0xd8>)
800585c: 7e1b ldrb r3, [r3, #24]
800585e: 2b01 cmp r3, #1
8005860: d101 bne.n 8005866 <HAL_FLASH_Program+0x26>
8005862: 2302 movs r3, #2
8005864: e054 b.n 8005910 <HAL_FLASH_Program+0xd0>
8005866: 4b2c ldr r3, [pc, #176] @ (8005918 <HAL_FLASH_Program+0xd8>)
8005868: 2201 movs r2, #1
800586a: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
800586c: f24c 3050 movw r0, #50000 @ 0xc350
8005870: f000 f8a8 bl 80059c4 <FLASH_WaitForLastOperation>
8005874: 4603 mov r3, r0
8005876: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
8005878: 7dfb ldrb r3, [r7, #23]
800587a: 2b00 cmp r3, #0
800587c: d144 bne.n 8005908 <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
800587e: 68fb ldr r3, [r7, #12]
8005880: 2b01 cmp r3, #1
8005882: d102 bne.n 800588a <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8005884: 2301 movs r3, #1
8005886: 757b strb r3, [r7, #21]
8005888: e007 b.n 800589a <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
800588a: 68fb ldr r3, [r7, #12]
800588c: 2b02 cmp r3, #2
800588e: d102 bne.n 8005896 <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
8005890: 2302 movs r3, #2
8005892: 757b strb r3, [r7, #21]
8005894: e001 b.n 800589a <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
8005896: 2304 movs r3, #4
8005898: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
800589a: 2300 movs r3, #0
800589c: 75bb strb r3, [r7, #22]
800589e: e02d b.n 80058fc <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
80058a0: 7dbb ldrb r3, [r7, #22]
80058a2: 005a lsls r2, r3, #1
80058a4: 68bb ldr r3, [r7, #8]
80058a6: eb02 0c03 add.w ip, r2, r3
80058aa: 7dbb ldrb r3, [r7, #22]
80058ac: 0119 lsls r1, r3, #4
80058ae: e9d7 2300 ldrd r2, r3, [r7]
80058b2: f1c1 0620 rsb r6, r1, #32
80058b6: f1a1 0020 sub.w r0, r1, #32
80058ba: fa22 f401 lsr.w r4, r2, r1
80058be: fa03 f606 lsl.w r6, r3, r6
80058c2: 4334 orrs r4, r6
80058c4: fa23 f000 lsr.w r0, r3, r0
80058c8: 4304 orrs r4, r0
80058ca: fa23 f501 lsr.w r5, r3, r1
80058ce: b2a3 uxth r3, r4
80058d0: 4619 mov r1, r3
80058d2: 4660 mov r0, ip
80058d4: f000 f85a bl 800598c <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
80058d8: f24c 3050 movw r0, #50000 @ 0xc350
80058dc: f000 f872 bl 80059c4 <FLASH_WaitForLastOperation>
80058e0: 4603 mov r3, r0
80058e2: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
80058e4: 4b0d ldr r3, [pc, #52] @ (800591c <HAL_FLASH_Program+0xdc>)
80058e6: 691b ldr r3, [r3, #16]
80058e8: 4a0c ldr r2, [pc, #48] @ (800591c <HAL_FLASH_Program+0xdc>)
80058ea: f023 0301 bic.w r3, r3, #1
80058ee: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
80058f0: 7dfb ldrb r3, [r7, #23]
80058f2: 2b00 cmp r3, #0
80058f4: d107 bne.n 8005906 <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
80058f6: 7dbb ldrb r3, [r7, #22]
80058f8: 3301 adds r3, #1
80058fa: 75bb strb r3, [r7, #22]
80058fc: 7dba ldrb r2, [r7, #22]
80058fe: 7d7b ldrb r3, [r7, #21]
8005900: 429a cmp r2, r3
8005902: d3cd bcc.n 80058a0 <HAL_FLASH_Program+0x60>
8005904: e000 b.n 8005908 <HAL_FLASH_Program+0xc8>
{
break;
8005906: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8005908: 4b03 ldr r3, [pc, #12] @ (8005918 <HAL_FLASH_Program+0xd8>)
800590a: 2200 movs r2, #0
800590c: 761a strb r2, [r3, #24]
return status;
800590e: 7dfb ldrb r3, [r7, #23]
}
8005910: 4618 mov r0, r3
8005912: 371c adds r7, #28
8005914: 46bd mov sp, r7
8005916: bdf0 pop {r4, r5, r6, r7, pc}
8005918: 20000470 .word 0x20000470
800591c: 40022000 .word 0x40022000
08005920 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8005920: b480 push {r7}
8005922: b083 sub sp, #12
8005924: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
8005926: 2300 movs r3, #0
8005928: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
800592a: 4b0d ldr r3, [pc, #52] @ (8005960 <HAL_FLASH_Unlock+0x40>)
800592c: 691b ldr r3, [r3, #16]
800592e: f003 0380 and.w r3, r3, #128 @ 0x80
8005932: 2b00 cmp r3, #0
8005934: d00d beq.n 8005952 <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
8005936: 4b0a ldr r3, [pc, #40] @ (8005960 <HAL_FLASH_Unlock+0x40>)
8005938: 4a0a ldr r2, [pc, #40] @ (8005964 <HAL_FLASH_Unlock+0x44>)
800593a: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
800593c: 4b08 ldr r3, [pc, #32] @ (8005960 <HAL_FLASH_Unlock+0x40>)
800593e: 4a0a ldr r2, [pc, #40] @ (8005968 <HAL_FLASH_Unlock+0x48>)
8005940: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005942: 4b07 ldr r3, [pc, #28] @ (8005960 <HAL_FLASH_Unlock+0x40>)
8005944: 691b ldr r3, [r3, #16]
8005946: f003 0380 and.w r3, r3, #128 @ 0x80
800594a: 2b00 cmp r3, #0
800594c: d001 beq.n 8005952 <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
800594e: 2301 movs r3, #1
8005950: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
8005952: 79fb ldrb r3, [r7, #7]
}
8005954: 4618 mov r0, r3
8005956: 370c adds r7, #12
8005958: 46bd mov sp, r7
800595a: bc80 pop {r7}
800595c: 4770 bx lr
800595e: bf00 nop
8005960: 40022000 .word 0x40022000
8005964: 45670123 .word 0x45670123
8005968: cdef89ab .word 0xcdef89ab
0800596c <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
800596c: b480 push {r7}
800596e: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
8005970: 4b05 ldr r3, [pc, #20] @ (8005988 <HAL_FLASH_Lock+0x1c>)
8005972: 691b ldr r3, [r3, #16]
8005974: 4a04 ldr r2, [pc, #16] @ (8005988 <HAL_FLASH_Lock+0x1c>)
8005976: f043 0380 orr.w r3, r3, #128 @ 0x80
800597a: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
800597c: 2300 movs r3, #0
}
800597e: 4618 mov r0, r3
8005980: 46bd mov sp, r7
8005982: bc80 pop {r7}
8005984: 4770 bx lr
8005986: bf00 nop
8005988: 40022000 .word 0x40022000
0800598c <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
800598c: b480 push {r7}
800598e: b083 sub sp, #12
8005990: af00 add r7, sp, #0
8005992: 6078 str r0, [r7, #4]
8005994: 460b mov r3, r1
8005996: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8005998: 4b08 ldr r3, [pc, #32] @ (80059bc <FLASH_Program_HalfWord+0x30>)
800599a: 2200 movs r2, #0
800599c: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
800599e: 4b08 ldr r3, [pc, #32] @ (80059c0 <FLASH_Program_HalfWord+0x34>)
80059a0: 691b ldr r3, [r3, #16]
80059a2: 4a07 ldr r2, [pc, #28] @ (80059c0 <FLASH_Program_HalfWord+0x34>)
80059a4: f043 0301 orr.w r3, r3, #1
80059a8: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
80059aa: 687b ldr r3, [r7, #4]
80059ac: 887a ldrh r2, [r7, #2]
80059ae: 801a strh r2, [r3, #0]
}
80059b0: bf00 nop
80059b2: 370c adds r7, #12
80059b4: 46bd mov sp, r7
80059b6: bc80 pop {r7}
80059b8: 4770 bx lr
80059ba: bf00 nop
80059bc: 20000470 .word 0x20000470
80059c0: 40022000 .word 0x40022000
080059c4 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
80059c4: b580 push {r7, lr}
80059c6: b084 sub sp, #16
80059c8: af00 add r7, sp, #0
80059ca: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
80059cc: f7ff f860 bl 8004a90 <HAL_GetTick>
80059d0: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80059d2: e010 b.n 80059f6 <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
80059d4: 687b ldr r3, [r7, #4]
80059d6: f1b3 3fff cmp.w r3, #4294967295
80059da: d00c beq.n 80059f6 <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
80059dc: 687b ldr r3, [r7, #4]
80059de: 2b00 cmp r3, #0
80059e0: d007 beq.n 80059f2 <FLASH_WaitForLastOperation+0x2e>
80059e2: f7ff f855 bl 8004a90 <HAL_GetTick>
80059e6: 4602 mov r2, r0
80059e8: 68fb ldr r3, [r7, #12]
80059ea: 1ad3 subs r3, r2, r3
80059ec: 687a ldr r2, [r7, #4]
80059ee: 429a cmp r2, r3
80059f0: d201 bcs.n 80059f6 <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
80059f2: 2303 movs r3, #3
80059f4: e025 b.n 8005a42 <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80059f6: 4b15 ldr r3, [pc, #84] @ (8005a4c <FLASH_WaitForLastOperation+0x88>)
80059f8: 68db ldr r3, [r3, #12]
80059fa: f003 0301 and.w r3, r3, #1
80059fe: 2b00 cmp r3, #0
8005a00: d1e8 bne.n 80059d4 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
8005a02: 4b12 ldr r3, [pc, #72] @ (8005a4c <FLASH_WaitForLastOperation+0x88>)
8005a04: 68db ldr r3, [r3, #12]
8005a06: f003 0320 and.w r3, r3, #32
8005a0a: 2b00 cmp r3, #0
8005a0c: d002 beq.n 8005a14 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
8005a0e: 4b0f ldr r3, [pc, #60] @ (8005a4c <FLASH_WaitForLastOperation+0x88>)
8005a10: 2220 movs r2, #32
8005a12: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8005a14: 4b0d ldr r3, [pc, #52] @ (8005a4c <FLASH_WaitForLastOperation+0x88>)
8005a16: 68db ldr r3, [r3, #12]
8005a18: f003 0310 and.w r3, r3, #16
8005a1c: 2b00 cmp r3, #0
8005a1e: d10b bne.n 8005a38 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8005a20: 4b0a ldr r3, [pc, #40] @ (8005a4c <FLASH_WaitForLastOperation+0x88>)
8005a22: 69db ldr r3, [r3, #28]
8005a24: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8005a28: 2b00 cmp r3, #0
8005a2a: d105 bne.n 8005a38 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8005a2c: 4b07 ldr r3, [pc, #28] @ (8005a4c <FLASH_WaitForLastOperation+0x88>)
8005a2e: 68db ldr r3, [r3, #12]
8005a30: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8005a34: 2b00 cmp r3, #0
8005a36: d003 beq.n 8005a40 <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
8005a38: f000 f80a bl 8005a50 <FLASH_SetErrorCode>
return HAL_ERROR;
8005a3c: 2301 movs r3, #1
8005a3e: e000 b.n 8005a42 <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
8005a40: 2300 movs r3, #0
}
8005a42: 4618 mov r0, r3
8005a44: 3710 adds r7, #16
8005a46: 46bd mov sp, r7
8005a48: bd80 pop {r7, pc}
8005a4a: bf00 nop
8005a4c: 40022000 .word 0x40022000
08005a50 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
8005a50: b480 push {r7}
8005a52: b083 sub sp, #12
8005a54: af00 add r7, sp, #0
uint32_t flags = 0U;
8005a56: 2300 movs r3, #0
8005a58: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
8005a5a: 4b23 ldr r3, [pc, #140] @ (8005ae8 <FLASH_SetErrorCode+0x98>)
8005a5c: 68db ldr r3, [r3, #12]
8005a5e: f003 0310 and.w r3, r3, #16
8005a62: 2b00 cmp r3, #0
8005a64: d009 beq.n 8005a7a <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
8005a66: 4b21 ldr r3, [pc, #132] @ (8005aec <FLASH_SetErrorCode+0x9c>)
8005a68: 69db ldr r3, [r3, #28]
8005a6a: f043 0302 orr.w r3, r3, #2
8005a6e: 4a1f ldr r2, [pc, #124] @ (8005aec <FLASH_SetErrorCode+0x9c>)
8005a70: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
8005a72: 687b ldr r3, [r7, #4]
8005a74: f043 0310 orr.w r3, r3, #16
8005a78: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8005a7a: 4b1b ldr r3, [pc, #108] @ (8005ae8 <FLASH_SetErrorCode+0x98>)
8005a7c: 68db ldr r3, [r3, #12]
8005a7e: f003 0304 and.w r3, r3, #4
8005a82: 2b00 cmp r3, #0
8005a84: d009 beq.n 8005a9a <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
8005a86: 4b19 ldr r3, [pc, #100] @ (8005aec <FLASH_SetErrorCode+0x9c>)
8005a88: 69db ldr r3, [r3, #28]
8005a8a: f043 0301 orr.w r3, r3, #1
8005a8e: 4a17 ldr r2, [pc, #92] @ (8005aec <FLASH_SetErrorCode+0x9c>)
8005a90: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
8005a92: 687b ldr r3, [r7, #4]
8005a94: f043 0304 orr.w r3, r3, #4
8005a98: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
8005a9a: 4b13 ldr r3, [pc, #76] @ (8005ae8 <FLASH_SetErrorCode+0x98>)
8005a9c: 69db ldr r3, [r3, #28]
8005a9e: f003 0301 and.w r3, r3, #1
8005aa2: 2b00 cmp r3, #0
8005aa4: d00b beq.n 8005abe <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
8005aa6: 4b11 ldr r3, [pc, #68] @ (8005aec <FLASH_SetErrorCode+0x9c>)
8005aa8: 69db ldr r3, [r3, #28]
8005aaa: f043 0304 orr.w r3, r3, #4
8005aae: 4a0f ldr r2, [pc, #60] @ (8005aec <FLASH_SetErrorCode+0x9c>)
8005ab0: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
8005ab2: 4b0d ldr r3, [pc, #52] @ (8005ae8 <FLASH_SetErrorCode+0x98>)
8005ab4: 69db ldr r3, [r3, #28]
8005ab6: 4a0c ldr r2, [pc, #48] @ (8005ae8 <FLASH_SetErrorCode+0x98>)
8005ab8: f023 0301 bic.w r3, r3, #1
8005abc: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
8005abe: 687b ldr r3, [r7, #4]
8005ac0: f240 1201 movw r2, #257 @ 0x101
8005ac4: 4293 cmp r3, r2
8005ac6: d106 bne.n 8005ad6 <FLASH_SetErrorCode+0x86>
8005ac8: 4b07 ldr r3, [pc, #28] @ (8005ae8 <FLASH_SetErrorCode+0x98>)
8005aca: 69db ldr r3, [r3, #28]
8005acc: 4a06 ldr r2, [pc, #24] @ (8005ae8 <FLASH_SetErrorCode+0x98>)
8005ace: f023 0301 bic.w r3, r3, #1
8005ad2: 61d3 str r3, [r2, #28]
}
8005ad4: e002 b.n 8005adc <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
8005ad6: 4a04 ldr r2, [pc, #16] @ (8005ae8 <FLASH_SetErrorCode+0x98>)
8005ad8: 687b ldr r3, [r7, #4]
8005ada: 60d3 str r3, [r2, #12]
}
8005adc: bf00 nop
8005ade: 370c adds r7, #12
8005ae0: 46bd mov sp, r7
8005ae2: bc80 pop {r7}
8005ae4: 4770 bx lr
8005ae6: bf00 nop
8005ae8: 40022000 .word 0x40022000
8005aec: 20000470 .word 0x20000470
08005af0 <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
8005af0: b580 push {r7, lr}
8005af2: b084 sub sp, #16
8005af4: af00 add r7, sp, #0
8005af6: 6078 str r0, [r7, #4]
8005af8: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
8005afa: 2301 movs r3, #1
8005afc: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
8005afe: 2300 movs r3, #0
8005b00: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
8005b02: 4b2f ldr r3, [pc, #188] @ (8005bc0 <HAL_FLASHEx_Erase+0xd0>)
8005b04: 7e1b ldrb r3, [r3, #24]
8005b06: 2b01 cmp r3, #1
8005b08: d101 bne.n 8005b0e <HAL_FLASHEx_Erase+0x1e>
8005b0a: 2302 movs r3, #2
8005b0c: e053 b.n 8005bb6 <HAL_FLASHEx_Erase+0xc6>
8005b0e: 4b2c ldr r3, [pc, #176] @ (8005bc0 <HAL_FLASHEx_Erase+0xd0>)
8005b10: 2201 movs r2, #1
8005b12: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
8005b14: 687b ldr r3, [r7, #4]
8005b16: 681b ldr r3, [r3, #0]
8005b18: 2b02 cmp r3, #2
8005b1a: d116 bne.n 8005b4a <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8005b1c: f24c 3050 movw r0, #50000 @ 0xc350
8005b20: f7ff ff50 bl 80059c4 <FLASH_WaitForLastOperation>
8005b24: 4603 mov r3, r0
8005b26: 2b00 cmp r3, #0
8005b28: d141 bne.n 8005bae <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
8005b2a: 2001 movs r0, #1
8005b2c: f000 f84c bl 8005bc8 <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8005b30: f24c 3050 movw r0, #50000 @ 0xc350
8005b34: f7ff ff46 bl 80059c4 <FLASH_WaitForLastOperation>
8005b38: 4603 mov r3, r0
8005b3a: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
8005b3c: 4b21 ldr r3, [pc, #132] @ (8005bc4 <HAL_FLASHEx_Erase+0xd4>)
8005b3e: 691b ldr r3, [r3, #16]
8005b40: 4a20 ldr r2, [pc, #128] @ (8005bc4 <HAL_FLASHEx_Erase+0xd4>)
8005b42: f023 0304 bic.w r3, r3, #4
8005b46: 6113 str r3, [r2, #16]
8005b48: e031 b.n 8005bae <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8005b4a: f24c 3050 movw r0, #50000 @ 0xc350
8005b4e: f7ff ff39 bl 80059c4 <FLASH_WaitForLastOperation>
8005b52: 4603 mov r3, r0
8005b54: 2b00 cmp r3, #0
8005b56: d12a bne.n 8005bae <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
8005b58: 683b ldr r3, [r7, #0]
8005b5a: f04f 32ff mov.w r2, #4294967295
8005b5e: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
8005b60: 687b ldr r3, [r7, #4]
8005b62: 689b ldr r3, [r3, #8]
8005b64: 60bb str r3, [r7, #8]
8005b66: e019 b.n 8005b9c <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
8005b68: 68b8 ldr r0, [r7, #8]
8005b6a: f000 f849 bl 8005c00 <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8005b6e: f24c 3050 movw r0, #50000 @ 0xc350
8005b72: f7ff ff27 bl 80059c4 <FLASH_WaitForLastOperation>
8005b76: 4603 mov r3, r0
8005b78: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
8005b7a: 4b12 ldr r3, [pc, #72] @ (8005bc4 <HAL_FLASHEx_Erase+0xd4>)
8005b7c: 691b ldr r3, [r3, #16]
8005b7e: 4a11 ldr r2, [pc, #68] @ (8005bc4 <HAL_FLASHEx_Erase+0xd4>)
8005b80: f023 0302 bic.w r3, r3, #2
8005b84: 6113 str r3, [r2, #16]
if (status != HAL_OK)
8005b86: 7bfb ldrb r3, [r7, #15]
8005b88: 2b00 cmp r3, #0
8005b8a: d003 beq.n 8005b94 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
8005b8c: 683b ldr r3, [r7, #0]
8005b8e: 68ba ldr r2, [r7, #8]
8005b90: 601a str r2, [r3, #0]
break;
8005b92: e00c b.n 8005bae <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
8005b94: 68bb ldr r3, [r7, #8]
8005b96: f503 6380 add.w r3, r3, #1024 @ 0x400
8005b9a: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
8005b9c: 687b ldr r3, [r7, #4]
8005b9e: 68db ldr r3, [r3, #12]
8005ba0: 029a lsls r2, r3, #10
8005ba2: 687b ldr r3, [r7, #4]
8005ba4: 689b ldr r3, [r3, #8]
8005ba6: 4413 add r3, r2
8005ba8: 68ba ldr r2, [r7, #8]
8005baa: 429a cmp r2, r3
8005bac: d3dc bcc.n 8005b68 <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8005bae: 4b04 ldr r3, [pc, #16] @ (8005bc0 <HAL_FLASHEx_Erase+0xd0>)
8005bb0: 2200 movs r2, #0
8005bb2: 761a strb r2, [r3, #24]
return status;
8005bb4: 7bfb ldrb r3, [r7, #15]
}
8005bb6: 4618 mov r0, r3
8005bb8: 3710 adds r7, #16
8005bba: 46bd mov sp, r7
8005bbc: bd80 pop {r7, pc}
8005bbe: bf00 nop
8005bc0: 20000470 .word 0x20000470
8005bc4: 40022000 .word 0x40022000
08005bc8 <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
8005bc8: b480 push {r7}
8005bca: b083 sub sp, #12
8005bcc: af00 add r7, sp, #0
8005bce: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8005bd0: 4b09 ldr r3, [pc, #36] @ (8005bf8 <FLASH_MassErase+0x30>)
8005bd2: 2200 movs r2, #0
8005bd4: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
8005bd6: 4b09 ldr r3, [pc, #36] @ (8005bfc <FLASH_MassErase+0x34>)
8005bd8: 691b ldr r3, [r3, #16]
8005bda: 4a08 ldr r2, [pc, #32] @ (8005bfc <FLASH_MassErase+0x34>)
8005bdc: f043 0304 orr.w r3, r3, #4
8005be0: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8005be2: 4b06 ldr r3, [pc, #24] @ (8005bfc <FLASH_MassErase+0x34>)
8005be4: 691b ldr r3, [r3, #16]
8005be6: 4a05 ldr r2, [pc, #20] @ (8005bfc <FLASH_MassErase+0x34>)
8005be8: f043 0340 orr.w r3, r3, #64 @ 0x40
8005bec: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
8005bee: bf00 nop
8005bf0: 370c adds r7, #12
8005bf2: 46bd mov sp, r7
8005bf4: bc80 pop {r7}
8005bf6: 4770 bx lr
8005bf8: 20000470 .word 0x20000470
8005bfc: 40022000 .word 0x40022000
08005c00 <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
8005c00: b480 push {r7}
8005c02: b083 sub sp, #12
8005c04: af00 add r7, sp, #0
8005c06: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8005c08: 4b0b ldr r3, [pc, #44] @ (8005c38 <FLASH_PageErase+0x38>)
8005c0a: 2200 movs r2, #0
8005c0c: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
8005c0e: 4b0b ldr r3, [pc, #44] @ (8005c3c <FLASH_PageErase+0x3c>)
8005c10: 691b ldr r3, [r3, #16]
8005c12: 4a0a ldr r2, [pc, #40] @ (8005c3c <FLASH_PageErase+0x3c>)
8005c14: f043 0302 orr.w r3, r3, #2
8005c18: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
8005c1a: 4a08 ldr r2, [pc, #32] @ (8005c3c <FLASH_PageErase+0x3c>)
8005c1c: 687b ldr r3, [r7, #4]
8005c1e: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8005c20: 4b06 ldr r3, [pc, #24] @ (8005c3c <FLASH_PageErase+0x3c>)
8005c22: 691b ldr r3, [r3, #16]
8005c24: 4a05 ldr r2, [pc, #20] @ (8005c3c <FLASH_PageErase+0x3c>)
8005c26: f043 0340 orr.w r3, r3, #64 @ 0x40
8005c2a: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
8005c2c: bf00 nop
8005c2e: 370c adds r7, #12
8005c30: 46bd mov sp, r7
8005c32: bc80 pop {r7}
8005c34: 4770 bx lr
8005c36: bf00 nop
8005c38: 20000470 .word 0x20000470
8005c3c: 40022000 .word 0x40022000
08005c40 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8005c40: b480 push {r7}
8005c42: b08b sub sp, #44 @ 0x2c
8005c44: af00 add r7, sp, #0
8005c46: 6078 str r0, [r7, #4]
8005c48: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8005c4a: 2300 movs r3, #0
8005c4c: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
8005c4e: 2300 movs r3, #0
8005c50: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8005c52: e169 b.n 8005f28 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8005c54: 2201 movs r2, #1
8005c56: 6a7b ldr r3, [r7, #36] @ 0x24
8005c58: fa02 f303 lsl.w r3, r2, r3
8005c5c: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8005c5e: 683b ldr r3, [r7, #0]
8005c60: 681b ldr r3, [r3, #0]
8005c62: 69fa ldr r2, [r7, #28]
8005c64: 4013 ands r3, r2
8005c66: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8005c68: 69ba ldr r2, [r7, #24]
8005c6a: 69fb ldr r3, [r7, #28]
8005c6c: 429a cmp r2, r3
8005c6e: f040 8158 bne.w 8005f22 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
8005c72: 683b ldr r3, [r7, #0]
8005c74: 685b ldr r3, [r3, #4]
8005c76: 4a9a ldr r2, [pc, #616] @ (8005ee0 <HAL_GPIO_Init+0x2a0>)
8005c78: 4293 cmp r3, r2
8005c7a: d05e beq.n 8005d3a <HAL_GPIO_Init+0xfa>
8005c7c: 4a98 ldr r2, [pc, #608] @ (8005ee0 <HAL_GPIO_Init+0x2a0>)
8005c7e: 4293 cmp r3, r2
8005c80: d875 bhi.n 8005d6e <HAL_GPIO_Init+0x12e>
8005c82: 4a98 ldr r2, [pc, #608] @ (8005ee4 <HAL_GPIO_Init+0x2a4>)
8005c84: 4293 cmp r3, r2
8005c86: d058 beq.n 8005d3a <HAL_GPIO_Init+0xfa>
8005c88: 4a96 ldr r2, [pc, #600] @ (8005ee4 <HAL_GPIO_Init+0x2a4>)
8005c8a: 4293 cmp r3, r2
8005c8c: d86f bhi.n 8005d6e <HAL_GPIO_Init+0x12e>
8005c8e: 4a96 ldr r2, [pc, #600] @ (8005ee8 <HAL_GPIO_Init+0x2a8>)
8005c90: 4293 cmp r3, r2
8005c92: d052 beq.n 8005d3a <HAL_GPIO_Init+0xfa>
8005c94: 4a94 ldr r2, [pc, #592] @ (8005ee8 <HAL_GPIO_Init+0x2a8>)
8005c96: 4293 cmp r3, r2
8005c98: d869 bhi.n 8005d6e <HAL_GPIO_Init+0x12e>
8005c9a: 4a94 ldr r2, [pc, #592] @ (8005eec <HAL_GPIO_Init+0x2ac>)
8005c9c: 4293 cmp r3, r2
8005c9e: d04c beq.n 8005d3a <HAL_GPIO_Init+0xfa>
8005ca0: 4a92 ldr r2, [pc, #584] @ (8005eec <HAL_GPIO_Init+0x2ac>)
8005ca2: 4293 cmp r3, r2
8005ca4: d863 bhi.n 8005d6e <HAL_GPIO_Init+0x12e>
8005ca6: 4a92 ldr r2, [pc, #584] @ (8005ef0 <HAL_GPIO_Init+0x2b0>)
8005ca8: 4293 cmp r3, r2
8005caa: d046 beq.n 8005d3a <HAL_GPIO_Init+0xfa>
8005cac: 4a90 ldr r2, [pc, #576] @ (8005ef0 <HAL_GPIO_Init+0x2b0>)
8005cae: 4293 cmp r3, r2
8005cb0: d85d bhi.n 8005d6e <HAL_GPIO_Init+0x12e>
8005cb2: 2b12 cmp r3, #18
8005cb4: d82a bhi.n 8005d0c <HAL_GPIO_Init+0xcc>
8005cb6: 2b12 cmp r3, #18
8005cb8: d859 bhi.n 8005d6e <HAL_GPIO_Init+0x12e>
8005cba: a201 add r2, pc, #4 @ (adr r2, 8005cc0 <HAL_GPIO_Init+0x80>)
8005cbc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005cc0: 08005d3b .word 0x08005d3b
8005cc4: 08005d15 .word 0x08005d15
8005cc8: 08005d27 .word 0x08005d27
8005ccc: 08005d69 .word 0x08005d69
8005cd0: 08005d6f .word 0x08005d6f
8005cd4: 08005d6f .word 0x08005d6f
8005cd8: 08005d6f .word 0x08005d6f
8005cdc: 08005d6f .word 0x08005d6f
8005ce0: 08005d6f .word 0x08005d6f
8005ce4: 08005d6f .word 0x08005d6f
8005ce8: 08005d6f .word 0x08005d6f
8005cec: 08005d6f .word 0x08005d6f
8005cf0: 08005d6f .word 0x08005d6f
8005cf4: 08005d6f .word 0x08005d6f
8005cf8: 08005d6f .word 0x08005d6f
8005cfc: 08005d6f .word 0x08005d6f
8005d00: 08005d6f .word 0x08005d6f
8005d04: 08005d1d .word 0x08005d1d
8005d08: 08005d31 .word 0x08005d31
8005d0c: 4a79 ldr r2, [pc, #484] @ (8005ef4 <HAL_GPIO_Init+0x2b4>)
8005d0e: 4293 cmp r3, r2
8005d10: d013 beq.n 8005d3a <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8005d12: e02c b.n 8005d6e <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8005d14: 683b ldr r3, [r7, #0]
8005d16: 68db ldr r3, [r3, #12]
8005d18: 623b str r3, [r7, #32]
break;
8005d1a: e029 b.n 8005d70 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
8005d1c: 683b ldr r3, [r7, #0]
8005d1e: 68db ldr r3, [r3, #12]
8005d20: 3304 adds r3, #4
8005d22: 623b str r3, [r7, #32]
break;
8005d24: e024 b.n 8005d70 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8005d26: 683b ldr r3, [r7, #0]
8005d28: 68db ldr r3, [r3, #12]
8005d2a: 3308 adds r3, #8
8005d2c: 623b str r3, [r7, #32]
break;
8005d2e: e01f b.n 8005d70 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8005d30: 683b ldr r3, [r7, #0]
8005d32: 68db ldr r3, [r3, #12]
8005d34: 330c adds r3, #12
8005d36: 623b str r3, [r7, #32]
break;
8005d38: e01a b.n 8005d70 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
8005d3a: 683b ldr r3, [r7, #0]
8005d3c: 689b ldr r3, [r3, #8]
8005d3e: 2b00 cmp r3, #0
8005d40: d102 bne.n 8005d48 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8005d42: 2304 movs r3, #4
8005d44: 623b str r3, [r7, #32]
break;
8005d46: e013 b.n 8005d70 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8005d48: 683b ldr r3, [r7, #0]
8005d4a: 689b ldr r3, [r3, #8]
8005d4c: 2b01 cmp r3, #1
8005d4e: d105 bne.n 8005d5c <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8005d50: 2308 movs r3, #8
8005d52: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8005d54: 687b ldr r3, [r7, #4]
8005d56: 69fa ldr r2, [r7, #28]
8005d58: 611a str r2, [r3, #16]
break;
8005d5a: e009 b.n 8005d70 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8005d5c: 2308 movs r3, #8
8005d5e: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8005d60: 687b ldr r3, [r7, #4]
8005d62: 69fa ldr r2, [r7, #28]
8005d64: 615a str r2, [r3, #20]
break;
8005d66: e003 b.n 8005d70 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8005d68: 2300 movs r3, #0
8005d6a: 623b str r3, [r7, #32]
break;
8005d6c: e000 b.n 8005d70 <HAL_GPIO_Init+0x130>
break;
8005d6e: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8005d70: 69bb ldr r3, [r7, #24]
8005d72: 2bff cmp r3, #255 @ 0xff
8005d74: d801 bhi.n 8005d7a <HAL_GPIO_Init+0x13a>
8005d76: 687b ldr r3, [r7, #4]
8005d78: e001 b.n 8005d7e <HAL_GPIO_Init+0x13e>
8005d7a: 687b ldr r3, [r7, #4]
8005d7c: 3304 adds r3, #4
8005d7e: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8005d80: 69bb ldr r3, [r7, #24]
8005d82: 2bff cmp r3, #255 @ 0xff
8005d84: d802 bhi.n 8005d8c <HAL_GPIO_Init+0x14c>
8005d86: 6a7b ldr r3, [r7, #36] @ 0x24
8005d88: 009b lsls r3, r3, #2
8005d8a: e002 b.n 8005d92 <HAL_GPIO_Init+0x152>
8005d8c: 6a7b ldr r3, [r7, #36] @ 0x24
8005d8e: 3b08 subs r3, #8
8005d90: 009b lsls r3, r3, #2
8005d92: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8005d94: 697b ldr r3, [r7, #20]
8005d96: 681a ldr r2, [r3, #0]
8005d98: 210f movs r1, #15
8005d9a: 693b ldr r3, [r7, #16]
8005d9c: fa01 f303 lsl.w r3, r1, r3
8005da0: 43db mvns r3, r3
8005da2: 401a ands r2, r3
8005da4: 6a39 ldr r1, [r7, #32]
8005da6: 693b ldr r3, [r7, #16]
8005da8: fa01 f303 lsl.w r3, r1, r3
8005dac: 431a orrs r2, r3
8005dae: 697b ldr r3, [r7, #20]
8005db0: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8005db2: 683b ldr r3, [r7, #0]
8005db4: 685b ldr r3, [r3, #4]
8005db6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8005dba: 2b00 cmp r3, #0
8005dbc: f000 80b1 beq.w 8005f22 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8005dc0: 4b4d ldr r3, [pc, #308] @ (8005ef8 <HAL_GPIO_Init+0x2b8>)
8005dc2: 699b ldr r3, [r3, #24]
8005dc4: 4a4c ldr r2, [pc, #304] @ (8005ef8 <HAL_GPIO_Init+0x2b8>)
8005dc6: f043 0301 orr.w r3, r3, #1
8005dca: 6193 str r3, [r2, #24]
8005dcc: 4b4a ldr r3, [pc, #296] @ (8005ef8 <HAL_GPIO_Init+0x2b8>)
8005dce: 699b ldr r3, [r3, #24]
8005dd0: f003 0301 and.w r3, r3, #1
8005dd4: 60bb str r3, [r7, #8]
8005dd6: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8005dd8: 4a48 ldr r2, [pc, #288] @ (8005efc <HAL_GPIO_Init+0x2bc>)
8005dda: 6a7b ldr r3, [r7, #36] @ 0x24
8005ddc: 089b lsrs r3, r3, #2
8005dde: 3302 adds r3, #2
8005de0: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8005de4: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
8005de6: 6a7b ldr r3, [r7, #36] @ 0x24
8005de8: f003 0303 and.w r3, r3, #3
8005dec: 009b lsls r3, r3, #2
8005dee: 220f movs r2, #15
8005df0: fa02 f303 lsl.w r3, r2, r3
8005df4: 43db mvns r3, r3
8005df6: 68fa ldr r2, [r7, #12]
8005df8: 4013 ands r3, r2
8005dfa: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8005dfc: 687b ldr r3, [r7, #4]
8005dfe: 4a40 ldr r2, [pc, #256] @ (8005f00 <HAL_GPIO_Init+0x2c0>)
8005e00: 4293 cmp r3, r2
8005e02: d013 beq.n 8005e2c <HAL_GPIO_Init+0x1ec>
8005e04: 687b ldr r3, [r7, #4]
8005e06: 4a3f ldr r2, [pc, #252] @ (8005f04 <HAL_GPIO_Init+0x2c4>)
8005e08: 4293 cmp r3, r2
8005e0a: d00d beq.n 8005e28 <HAL_GPIO_Init+0x1e8>
8005e0c: 687b ldr r3, [r7, #4]
8005e0e: 4a3e ldr r2, [pc, #248] @ (8005f08 <HAL_GPIO_Init+0x2c8>)
8005e10: 4293 cmp r3, r2
8005e12: d007 beq.n 8005e24 <HAL_GPIO_Init+0x1e4>
8005e14: 687b ldr r3, [r7, #4]
8005e16: 4a3d ldr r2, [pc, #244] @ (8005f0c <HAL_GPIO_Init+0x2cc>)
8005e18: 4293 cmp r3, r2
8005e1a: d101 bne.n 8005e20 <HAL_GPIO_Init+0x1e0>
8005e1c: 2303 movs r3, #3
8005e1e: e006 b.n 8005e2e <HAL_GPIO_Init+0x1ee>
8005e20: 2304 movs r3, #4
8005e22: e004 b.n 8005e2e <HAL_GPIO_Init+0x1ee>
8005e24: 2302 movs r3, #2
8005e26: e002 b.n 8005e2e <HAL_GPIO_Init+0x1ee>
8005e28: 2301 movs r3, #1
8005e2a: e000 b.n 8005e2e <HAL_GPIO_Init+0x1ee>
8005e2c: 2300 movs r3, #0
8005e2e: 6a7a ldr r2, [r7, #36] @ 0x24
8005e30: f002 0203 and.w r2, r2, #3
8005e34: 0092 lsls r2, r2, #2
8005e36: 4093 lsls r3, r2
8005e38: 68fa ldr r2, [r7, #12]
8005e3a: 4313 orrs r3, r2
8005e3c: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8005e3e: 492f ldr r1, [pc, #188] @ (8005efc <HAL_GPIO_Init+0x2bc>)
8005e40: 6a7b ldr r3, [r7, #36] @ 0x24
8005e42: 089b lsrs r3, r3, #2
8005e44: 3302 adds r3, #2
8005e46: 68fa ldr r2, [r7, #12]
8005e48: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8005e4c: 683b ldr r3, [r7, #0]
8005e4e: 685b ldr r3, [r3, #4]
8005e50: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8005e54: 2b00 cmp r3, #0
8005e56: d006 beq.n 8005e66 <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
8005e58: 4b2d ldr r3, [pc, #180] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005e5a: 689a ldr r2, [r3, #8]
8005e5c: 492c ldr r1, [pc, #176] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005e5e: 69bb ldr r3, [r7, #24]
8005e60: 4313 orrs r3, r2
8005e62: 608b str r3, [r1, #8]
8005e64: e006 b.n 8005e74 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
8005e66: 4b2a ldr r3, [pc, #168] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005e68: 689a ldr r2, [r3, #8]
8005e6a: 69bb ldr r3, [r7, #24]
8005e6c: 43db mvns r3, r3
8005e6e: 4928 ldr r1, [pc, #160] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005e70: 4013 ands r3, r2
8005e72: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8005e74: 683b ldr r3, [r7, #0]
8005e76: 685b ldr r3, [r3, #4]
8005e78: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8005e7c: 2b00 cmp r3, #0
8005e7e: d006 beq.n 8005e8e <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
8005e80: 4b23 ldr r3, [pc, #140] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005e82: 68da ldr r2, [r3, #12]
8005e84: 4922 ldr r1, [pc, #136] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005e86: 69bb ldr r3, [r7, #24]
8005e88: 4313 orrs r3, r2
8005e8a: 60cb str r3, [r1, #12]
8005e8c: e006 b.n 8005e9c <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
8005e8e: 4b20 ldr r3, [pc, #128] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005e90: 68da ldr r2, [r3, #12]
8005e92: 69bb ldr r3, [r7, #24]
8005e94: 43db mvns r3, r3
8005e96: 491e ldr r1, [pc, #120] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005e98: 4013 ands r3, r2
8005e9a: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8005e9c: 683b ldr r3, [r7, #0]
8005e9e: 685b ldr r3, [r3, #4]
8005ea0: f403 3300 and.w r3, r3, #131072 @ 0x20000
8005ea4: 2b00 cmp r3, #0
8005ea6: d006 beq.n 8005eb6 <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
8005ea8: 4b19 ldr r3, [pc, #100] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005eaa: 685a ldr r2, [r3, #4]
8005eac: 4918 ldr r1, [pc, #96] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005eae: 69bb ldr r3, [r7, #24]
8005eb0: 4313 orrs r3, r2
8005eb2: 604b str r3, [r1, #4]
8005eb4: e006 b.n 8005ec4 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8005eb6: 4b16 ldr r3, [pc, #88] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005eb8: 685a ldr r2, [r3, #4]
8005eba: 69bb ldr r3, [r7, #24]
8005ebc: 43db mvns r3, r3
8005ebe: 4914 ldr r1, [pc, #80] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005ec0: 4013 ands r3, r2
8005ec2: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8005ec4: 683b ldr r3, [r7, #0]
8005ec6: 685b ldr r3, [r3, #4]
8005ec8: f403 3380 and.w r3, r3, #65536 @ 0x10000
8005ecc: 2b00 cmp r3, #0
8005ece: d021 beq.n 8005f14 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
8005ed0: 4b0f ldr r3, [pc, #60] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005ed2: 681a ldr r2, [r3, #0]
8005ed4: 490e ldr r1, [pc, #56] @ (8005f10 <HAL_GPIO_Init+0x2d0>)
8005ed6: 69bb ldr r3, [r7, #24]
8005ed8: 4313 orrs r3, r2
8005eda: 600b str r3, [r1, #0]
8005edc: e021 b.n 8005f22 <HAL_GPIO_Init+0x2e2>
8005ede: bf00 nop
8005ee0: 10320000 .word 0x10320000
8005ee4: 10310000 .word 0x10310000
8005ee8: 10220000 .word 0x10220000
8005eec: 10210000 .word 0x10210000
8005ef0: 10120000 .word 0x10120000
8005ef4: 10110000 .word 0x10110000
8005ef8: 40021000 .word 0x40021000
8005efc: 40010000 .word 0x40010000
8005f00: 40010800 .word 0x40010800
8005f04: 40010c00 .word 0x40010c00
8005f08: 40011000 .word 0x40011000
8005f0c: 40011400 .word 0x40011400
8005f10: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8005f14: 4b0b ldr r3, [pc, #44] @ (8005f44 <HAL_GPIO_Init+0x304>)
8005f16: 681a ldr r2, [r3, #0]
8005f18: 69bb ldr r3, [r7, #24]
8005f1a: 43db mvns r3, r3
8005f1c: 4909 ldr r1, [pc, #36] @ (8005f44 <HAL_GPIO_Init+0x304>)
8005f1e: 4013 ands r3, r2
8005f20: 600b str r3, [r1, #0]
}
}
}
position++;
8005f22: 6a7b ldr r3, [r7, #36] @ 0x24
8005f24: 3301 adds r3, #1
8005f26: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8005f28: 683b ldr r3, [r7, #0]
8005f2a: 681a ldr r2, [r3, #0]
8005f2c: 6a7b ldr r3, [r7, #36] @ 0x24
8005f2e: fa22 f303 lsr.w r3, r2, r3
8005f32: 2b00 cmp r3, #0
8005f34: f47f ae8e bne.w 8005c54 <HAL_GPIO_Init+0x14>
}
}
8005f38: bf00 nop
8005f3a: bf00 nop
8005f3c: 372c adds r7, #44 @ 0x2c
8005f3e: 46bd mov sp, r7
8005f40: bc80 pop {r7}
8005f42: 4770 bx lr
8005f44: 40010400 .word 0x40010400
08005f48 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8005f48: b480 push {r7}
8005f4a: b085 sub sp, #20
8005f4c: af00 add r7, sp, #0
8005f4e: 6078 str r0, [r7, #4]
8005f50: 460b mov r3, r1
8005f52: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8005f54: 687b ldr r3, [r7, #4]
8005f56: 689a ldr r2, [r3, #8]
8005f58: 887b ldrh r3, [r7, #2]
8005f5a: 4013 ands r3, r2
8005f5c: 2b00 cmp r3, #0
8005f5e: d002 beq.n 8005f66 <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
8005f60: 2301 movs r3, #1
8005f62: 73fb strb r3, [r7, #15]
8005f64: e001 b.n 8005f6a <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
8005f66: 2300 movs r3, #0
8005f68: 73fb strb r3, [r7, #15]
}
return bitstatus;
8005f6a: 7bfb ldrb r3, [r7, #15]
}
8005f6c: 4618 mov r0, r3
8005f6e: 3714 adds r7, #20
8005f70: 46bd mov sp, r7
8005f72: bc80 pop {r7}
8005f74: 4770 bx lr
08005f76 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8005f76: b480 push {r7}
8005f78: b083 sub sp, #12
8005f7a: af00 add r7, sp, #0
8005f7c: 6078 str r0, [r7, #4]
8005f7e: 460b mov r3, r1
8005f80: 807b strh r3, [r7, #2]
8005f82: 4613 mov r3, r2
8005f84: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8005f86: 787b ldrb r3, [r7, #1]
8005f88: 2b00 cmp r3, #0
8005f8a: d003 beq.n 8005f94 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8005f8c: 887a ldrh r2, [r7, #2]
8005f8e: 687b ldr r3, [r7, #4]
8005f90: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
8005f92: e003 b.n 8005f9c <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8005f94: 887b ldrh r3, [r7, #2]
8005f96: 041a lsls r2, r3, #16
8005f98: 687b ldr r3, [r7, #4]
8005f9a: 611a str r2, [r3, #16]
}
8005f9c: bf00 nop
8005f9e: 370c adds r7, #12
8005fa0: 46bd mov sp, r7
8005fa2: bc80 pop {r7}
8005fa4: 4770 bx lr
08005fa6 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8005fa6: b580 push {r7, lr}
8005fa8: b084 sub sp, #16
8005faa: af00 add r7, sp, #0
8005fac: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8005fae: 687b ldr r3, [r7, #4]
8005fb0: 2b00 cmp r3, #0
8005fb2: d101 bne.n 8005fb8 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8005fb4: 2301 movs r3, #1
8005fb6: e0e8 b.n 800618a <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8005fb8: 687b ldr r3, [r7, #4]
8005fba: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8005fbe: b2db uxtb r3, r3
8005fc0: 2b00 cmp r3, #0
8005fc2: d106 bne.n 8005fd2 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8005fc4: 687b ldr r3, [r7, #4]
8005fc6: 2200 movs r2, #0
8005fc8: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8005fcc: 6878 ldr r0, [r7, #4]
8005fce: f007 fc17 bl 800d800 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8005fd2: 687b ldr r3, [r7, #4]
8005fd4: 2203 movs r2, #3
8005fd6: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8005fda: 687b ldr r3, [r7, #4]
8005fdc: 2200 movs r2, #0
8005fde: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8005fe0: 687b ldr r3, [r7, #4]
8005fe2: 681b ldr r3, [r3, #0]
8005fe4: 4618 mov r0, r3
8005fe6: f003 fabc bl 8009562 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8005fea: 687b ldr r3, [r7, #4]
8005fec: 6818 ldr r0, [r3, #0]
8005fee: 687b ldr r3, [r7, #4]
8005ff0: 3304 adds r3, #4
8005ff2: cb0e ldmia r3, {r1, r2, r3}
8005ff4: f003 fa92 bl 800951c <USB_CoreInit>
8005ff8: 4603 mov r3, r0
8005ffa: 2b00 cmp r3, #0
8005ffc: d005 beq.n 800600a <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8005ffe: 687b ldr r3, [r7, #4]
8006000: 2202 movs r2, #2
8006002: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006006: 2301 movs r3, #1
8006008: e0bf b.n 800618a <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
800600a: 687b ldr r3, [r7, #4]
800600c: 681b ldr r3, [r3, #0]
800600e: 2100 movs r1, #0
8006010: 4618 mov r0, r3
8006012: f003 fac0 bl 8009596 <USB_SetCurrentMode>
8006016: 4603 mov r3, r0
8006018: 2b00 cmp r3, #0
800601a: d005 beq.n 8006028 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800601c: 687b ldr r3, [r7, #4]
800601e: 2202 movs r2, #2
8006020: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006024: 2301 movs r3, #1
8006026: e0b0 b.n 800618a <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006028: 2300 movs r3, #0
800602a: 73fb strb r3, [r7, #15]
800602c: e03e b.n 80060ac <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
800602e: 7bfa ldrb r2, [r7, #15]
8006030: 6879 ldr r1, [r7, #4]
8006032: 4613 mov r3, r2
8006034: 009b lsls r3, r3, #2
8006036: 4413 add r3, r2
8006038: 00db lsls r3, r3, #3
800603a: 440b add r3, r1
800603c: 3311 adds r3, #17
800603e: 2201 movs r2, #1
8006040: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8006042: 7bfa ldrb r2, [r7, #15]
8006044: 6879 ldr r1, [r7, #4]
8006046: 4613 mov r3, r2
8006048: 009b lsls r3, r3, #2
800604a: 4413 add r3, r2
800604c: 00db lsls r3, r3, #3
800604e: 440b add r3, r1
8006050: 3310 adds r3, #16
8006052: 7bfa ldrb r2, [r7, #15]
8006054: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8006056: 7bfa ldrb r2, [r7, #15]
8006058: 6879 ldr r1, [r7, #4]
800605a: 4613 mov r3, r2
800605c: 009b lsls r3, r3, #2
800605e: 4413 add r3, r2
8006060: 00db lsls r3, r3, #3
8006062: 440b add r3, r1
8006064: 3313 adds r3, #19
8006066: 2200 movs r2, #0
8006068: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
800606a: 7bfa ldrb r2, [r7, #15]
800606c: 6879 ldr r1, [r7, #4]
800606e: 4613 mov r3, r2
8006070: 009b lsls r3, r3, #2
8006072: 4413 add r3, r2
8006074: 00db lsls r3, r3, #3
8006076: 440b add r3, r1
8006078: 3320 adds r3, #32
800607a: 2200 movs r2, #0
800607c: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
800607e: 7bfa ldrb r2, [r7, #15]
8006080: 6879 ldr r1, [r7, #4]
8006082: 4613 mov r3, r2
8006084: 009b lsls r3, r3, #2
8006086: 4413 add r3, r2
8006088: 00db lsls r3, r3, #3
800608a: 440b add r3, r1
800608c: 3324 adds r3, #36 @ 0x24
800608e: 2200 movs r2, #0
8006090: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8006092: 7bfb ldrb r3, [r7, #15]
8006094: 6879 ldr r1, [r7, #4]
8006096: 1c5a adds r2, r3, #1
8006098: 4613 mov r3, r2
800609a: 009b lsls r3, r3, #2
800609c: 4413 add r3, r2
800609e: 00db lsls r3, r3, #3
80060a0: 440b add r3, r1
80060a2: 2200 movs r2, #0
80060a4: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80060a6: 7bfb ldrb r3, [r7, #15]
80060a8: 3301 adds r3, #1
80060aa: 73fb strb r3, [r7, #15]
80060ac: 687b ldr r3, [r7, #4]
80060ae: 791b ldrb r3, [r3, #4]
80060b0: 7bfa ldrb r2, [r7, #15]
80060b2: 429a cmp r2, r3
80060b4: d3bb bcc.n 800602e <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80060b6: 2300 movs r3, #0
80060b8: 73fb strb r3, [r7, #15]
80060ba: e044 b.n 8006146 <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
80060bc: 7bfa ldrb r2, [r7, #15]
80060be: 6879 ldr r1, [r7, #4]
80060c0: 4613 mov r3, r2
80060c2: 009b lsls r3, r3, #2
80060c4: 4413 add r3, r2
80060c6: 00db lsls r3, r3, #3
80060c8: 440b add r3, r1
80060ca: f203 1351 addw r3, r3, #337 @ 0x151
80060ce: 2200 movs r2, #0
80060d0: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
80060d2: 7bfa ldrb r2, [r7, #15]
80060d4: 6879 ldr r1, [r7, #4]
80060d6: 4613 mov r3, r2
80060d8: 009b lsls r3, r3, #2
80060da: 4413 add r3, r2
80060dc: 00db lsls r3, r3, #3
80060de: 440b add r3, r1
80060e0: f503 73a8 add.w r3, r3, #336 @ 0x150
80060e4: 7bfa ldrb r2, [r7, #15]
80060e6: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
80060e8: 7bfa ldrb r2, [r7, #15]
80060ea: 6879 ldr r1, [r7, #4]
80060ec: 4613 mov r3, r2
80060ee: 009b lsls r3, r3, #2
80060f0: 4413 add r3, r2
80060f2: 00db lsls r3, r3, #3
80060f4: 440b add r3, r1
80060f6: f203 1353 addw r3, r3, #339 @ 0x153
80060fa: 2200 movs r2, #0
80060fc: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
80060fe: 7bfa ldrb r2, [r7, #15]
8006100: 6879 ldr r1, [r7, #4]
8006102: 4613 mov r3, r2
8006104: 009b lsls r3, r3, #2
8006106: 4413 add r3, r2
8006108: 00db lsls r3, r3, #3
800610a: 440b add r3, r1
800610c: f503 73b0 add.w r3, r3, #352 @ 0x160
8006110: 2200 movs r2, #0
8006112: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8006114: 7bfa ldrb r2, [r7, #15]
8006116: 6879 ldr r1, [r7, #4]
8006118: 4613 mov r3, r2
800611a: 009b lsls r3, r3, #2
800611c: 4413 add r3, r2
800611e: 00db lsls r3, r3, #3
8006120: 440b add r3, r1
8006122: f503 73b2 add.w r3, r3, #356 @ 0x164
8006126: 2200 movs r2, #0
8006128: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
800612a: 7bfa ldrb r2, [r7, #15]
800612c: 6879 ldr r1, [r7, #4]
800612e: 4613 mov r3, r2
8006130: 009b lsls r3, r3, #2
8006132: 4413 add r3, r2
8006134: 00db lsls r3, r3, #3
8006136: 440b add r3, r1
8006138: f503 73b4 add.w r3, r3, #360 @ 0x168
800613c: 2200 movs r2, #0
800613e: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006140: 7bfb ldrb r3, [r7, #15]
8006142: 3301 adds r3, #1
8006144: 73fb strb r3, [r7, #15]
8006146: 687b ldr r3, [r7, #4]
8006148: 791b ldrb r3, [r3, #4]
800614a: 7bfa ldrb r2, [r7, #15]
800614c: 429a cmp r2, r3
800614e: d3b5 bcc.n 80060bc <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8006150: 687b ldr r3, [r7, #4]
8006152: 6818 ldr r0, [r3, #0]
8006154: 687b ldr r3, [r7, #4]
8006156: 3304 adds r3, #4
8006158: cb0e ldmia r3, {r1, r2, r3}
800615a: f003 fa28 bl 80095ae <USB_DevInit>
800615e: 4603 mov r3, r0
8006160: 2b00 cmp r3, #0
8006162: d005 beq.n 8006170 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8006164: 687b ldr r3, [r7, #4]
8006166: 2202 movs r2, #2
8006168: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
800616c: 2301 movs r3, #1
800616e: e00c b.n 800618a <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
8006170: 687b ldr r3, [r7, #4]
8006172: 2200 movs r2, #0
8006174: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
8006176: 687b ldr r3, [r7, #4]
8006178: 2201 movs r2, #1
800617a: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
800617e: 687b ldr r3, [r7, #4]
8006180: 681b ldr r3, [r3, #0]
8006182: 4618 mov r0, r3
8006184: f005 fca7 bl 800bad6 <USB_DevDisconnect>
return HAL_OK;
8006188: 2300 movs r3, #0
}
800618a: 4618 mov r0, r3
800618c: 3710 adds r7, #16
800618e: 46bd mov sp, r7
8006190: bd80 pop {r7, pc}
08006192 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8006192: b580 push {r7, lr}
8006194: b082 sub sp, #8
8006196: af00 add r7, sp, #0
8006198: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
800619a: 687b ldr r3, [r7, #4]
800619c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80061a0: 2b01 cmp r3, #1
80061a2: d101 bne.n 80061a8 <HAL_PCD_Start+0x16>
80061a4: 2302 movs r3, #2
80061a6: e016 b.n 80061d6 <HAL_PCD_Start+0x44>
80061a8: 687b ldr r3, [r7, #4]
80061aa: 2201 movs r2, #1
80061ac: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
80061b0: 687b ldr r3, [r7, #4]
80061b2: 681b ldr r3, [r3, #0]
80061b4: 4618 mov r0, r3
80061b6: f003 f9be bl 8009536 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
80061ba: 2101 movs r1, #1
80061bc: 6878 ldr r0, [r7, #4]
80061be: f007 fd92 bl 800dce6 <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
80061c2: 687b ldr r3, [r7, #4]
80061c4: 681b ldr r3, [r3, #0]
80061c6: 4618 mov r0, r3
80061c8: f005 fc7b bl 800bac2 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
80061cc: 687b ldr r3, [r7, #4]
80061ce: 2200 movs r2, #0
80061d0: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80061d4: 2300 movs r3, #0
}
80061d6: 4618 mov r0, r3
80061d8: 3708 adds r7, #8
80061da: 46bd mov sp, r7
80061dc: bd80 pop {r7, pc}
080061de <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
80061de: b580 push {r7, lr}
80061e0: b088 sub sp, #32
80061e2: af00 add r7, sp, #0
80061e4: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
80061e6: 687b ldr r3, [r7, #4]
80061e8: 681b ldr r3, [r3, #0]
80061ea: 4618 mov r0, r3
80061ec: f005 fc7d bl 800baea <USB_ReadInterrupts>
80061f0: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
80061f2: 69bb ldr r3, [r7, #24]
80061f4: f403 4300 and.w r3, r3, #32768 @ 0x8000
80061f8: 2b00 cmp r3, #0
80061fa: d003 beq.n 8006204 <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
80061fc: 6878 ldr r0, [r7, #4]
80061fe: f000 fb1a bl 8006836 <PCD_EP_ISR_Handler>
return;
8006202: e119 b.n 8006438 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8006204: 69bb ldr r3, [r7, #24]
8006206: f403 6380 and.w r3, r3, #1024 @ 0x400
800620a: 2b00 cmp r3, #0
800620c: d013 beq.n 8006236 <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
800620e: 687b ldr r3, [r7, #4]
8006210: 681b ldr r3, [r3, #0]
8006212: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006216: b29a uxth r2, r3
8006218: 687b ldr r3, [r7, #4]
800621a: 681b ldr r3, [r3, #0]
800621c: f422 6280 bic.w r2, r2, #1024 @ 0x400
8006220: b292 uxth r2, r2
8006222: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8006226: 6878 ldr r0, [r7, #4]
8006228: f007 fb65 bl 800d8f6 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
800622c: 2100 movs r1, #0
800622e: 6878 ldr r0, [r7, #4]
8006230: f000 f905 bl 800643e <HAL_PCD_SetAddress>
return;
8006234: e100 b.n 8006438 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8006236: 69bb ldr r3, [r7, #24]
8006238: f403 4380 and.w r3, r3, #16384 @ 0x4000
800623c: 2b00 cmp r3, #0
800623e: d00c beq.n 800625a <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8006240: 687b ldr r3, [r7, #4]
8006242: 681b ldr r3, [r3, #0]
8006244: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006248: b29a uxth r2, r3
800624a: 687b ldr r3, [r7, #4]
800624c: 681b ldr r3, [r3, #0]
800624e: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8006252: b292 uxth r2, r2
8006254: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006258: e0ee b.n 8006438 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
800625a: 69bb ldr r3, [r7, #24]
800625c: f403 5300 and.w r3, r3, #8192 @ 0x2000
8006260: 2b00 cmp r3, #0
8006262: d00c beq.n 800627e <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8006264: 687b ldr r3, [r7, #4]
8006266: 681b ldr r3, [r3, #0]
8006268: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800626c: b29a uxth r2, r3
800626e: 687b ldr r3, [r7, #4]
8006270: 681b ldr r3, [r3, #0]
8006272: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8006276: b292 uxth r2, r2
8006278: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
800627c: e0dc b.n 8006438 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
800627e: 69bb ldr r3, [r7, #24]
8006280: f403 5380 and.w r3, r3, #4096 @ 0x1000
8006284: 2b00 cmp r3, #0
8006286: d027 beq.n 80062d8 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8006288: 687b ldr r3, [r7, #4]
800628a: 681b ldr r3, [r3, #0]
800628c: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006290: b29a uxth r2, r3
8006292: 687b ldr r3, [r7, #4]
8006294: 681b ldr r3, [r3, #0]
8006296: f022 0204 bic.w r2, r2, #4
800629a: b292 uxth r2, r2
800629c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
80062a0: 687b ldr r3, [r7, #4]
80062a2: 681b ldr r3, [r3, #0]
80062a4: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80062a8: b29a uxth r2, r3
80062aa: 687b ldr r3, [r7, #4]
80062ac: 681b ldr r3, [r3, #0]
80062ae: f022 0208 bic.w r2, r2, #8
80062b2: b292 uxth r2, r2
80062b4: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
80062b8: 6878 ldr r0, [r7, #4]
80062ba: f007 fb55 bl 800d968 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
80062be: 687b ldr r3, [r7, #4]
80062c0: 681b ldr r3, [r3, #0]
80062c2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80062c6: b29a uxth r2, r3
80062c8: 687b ldr r3, [r7, #4]
80062ca: 681b ldr r3, [r3, #0]
80062cc: f422 5280 bic.w r2, r2, #4096 @ 0x1000
80062d0: b292 uxth r2, r2
80062d2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
80062d6: e0af b.n 8006438 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
80062d8: 69bb ldr r3, [r7, #24]
80062da: f403 6300 and.w r3, r3, #2048 @ 0x800
80062de: 2b00 cmp r3, #0
80062e0: f000 8083 beq.w 80063ea <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
80062e4: 2300 movs r3, #0
80062e6: 77fb strb r3, [r7, #31]
80062e8: e010 b.n 800630c <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
80062ea: 687b ldr r3, [r7, #4]
80062ec: 681b ldr r3, [r3, #0]
80062ee: 461a mov r2, r3
80062f0: 7ffb ldrb r3, [r7, #31]
80062f2: 009b lsls r3, r3, #2
80062f4: 441a add r2, r3
80062f6: 7ffb ldrb r3, [r7, #31]
80062f8: 8812 ldrh r2, [r2, #0]
80062fa: b292 uxth r2, r2
80062fc: 005b lsls r3, r3, #1
80062fe: 3320 adds r3, #32
8006300: 443b add r3, r7
8006302: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8006306: 7ffb ldrb r3, [r7, #31]
8006308: 3301 adds r3, #1
800630a: 77fb strb r3, [r7, #31]
800630c: 7ffb ldrb r3, [r7, #31]
800630e: 2b07 cmp r3, #7
8006310: d9eb bls.n 80062ea <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8006312: 687b ldr r3, [r7, #4]
8006314: 681b ldr r3, [r3, #0]
8006316: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800631a: b29a uxth r2, r3
800631c: 687b ldr r3, [r7, #4]
800631e: 681b ldr r3, [r3, #0]
8006320: f042 0201 orr.w r2, r2, #1
8006324: b292 uxth r2, r2
8006326: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
800632a: 687b ldr r3, [r7, #4]
800632c: 681b ldr r3, [r3, #0]
800632e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006332: b29a uxth r2, r3
8006334: 687b ldr r3, [r7, #4]
8006336: 681b ldr r3, [r3, #0]
8006338: f022 0201 bic.w r2, r2, #1
800633c: b292 uxth r2, r2
800633e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8006342: bf00 nop
8006344: 687b ldr r3, [r7, #4]
8006346: 681b ldr r3, [r3, #0]
8006348: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800634c: b29b uxth r3, r3
800634e: f403 6380 and.w r3, r3, #1024 @ 0x400
8006352: 2b00 cmp r3, #0
8006354: d0f6 beq.n 8006344 <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8006356: 687b ldr r3, [r7, #4]
8006358: 681b ldr r3, [r3, #0]
800635a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800635e: b29a uxth r2, r3
8006360: 687b ldr r3, [r7, #4]
8006362: 681b ldr r3, [r3, #0]
8006364: f422 6280 bic.w r2, r2, #1024 @ 0x400
8006368: b292 uxth r2, r2
800636a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
800636e: 2300 movs r3, #0
8006370: 77fb strb r3, [r7, #31]
8006372: e00f b.n 8006394 <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8006374: 7ffb ldrb r3, [r7, #31]
8006376: 687a ldr r2, [r7, #4]
8006378: 6812 ldr r2, [r2, #0]
800637a: 4611 mov r1, r2
800637c: 7ffa ldrb r2, [r7, #31]
800637e: 0092 lsls r2, r2, #2
8006380: 440a add r2, r1
8006382: 005b lsls r3, r3, #1
8006384: 3320 adds r3, #32
8006386: 443b add r3, r7
8006388: f833 3c18 ldrh.w r3, [r3, #-24]
800638c: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
800638e: 7ffb ldrb r3, [r7, #31]
8006390: 3301 adds r3, #1
8006392: 77fb strb r3, [r7, #31]
8006394: 7ffb ldrb r3, [r7, #31]
8006396: 2b07 cmp r3, #7
8006398: d9ec bls.n 8006374 <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
800639a: 687b ldr r3, [r7, #4]
800639c: 681b ldr r3, [r3, #0]
800639e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80063a2: b29a uxth r2, r3
80063a4: 687b ldr r3, [r7, #4]
80063a6: 681b ldr r3, [r3, #0]
80063a8: f042 0208 orr.w r2, r2, #8
80063ac: b292 uxth r2, r2
80063ae: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
80063b2: 687b ldr r3, [r7, #4]
80063b4: 681b ldr r3, [r3, #0]
80063b6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80063ba: b29a uxth r2, r3
80063bc: 687b ldr r3, [r7, #4]
80063be: 681b ldr r3, [r3, #0]
80063c0: f422 6200 bic.w r2, r2, #2048 @ 0x800
80063c4: b292 uxth r2, r2
80063c6: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
80063ca: 687b ldr r3, [r7, #4]
80063cc: 681b ldr r3, [r3, #0]
80063ce: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80063d2: b29a uxth r2, r3
80063d4: 687b ldr r3, [r7, #4]
80063d6: 681b ldr r3, [r3, #0]
80063d8: f042 0204 orr.w r2, r2, #4
80063dc: b292 uxth r2, r2
80063de: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
80063e2: 6878 ldr r0, [r7, #4]
80063e4: f007 faa6 bl 800d934 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
80063e8: e026 b.n 8006438 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
80063ea: 69bb ldr r3, [r7, #24]
80063ec: f403 7300 and.w r3, r3, #512 @ 0x200
80063f0: 2b00 cmp r3, #0
80063f2: d00f beq.n 8006414 <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
80063f4: 687b ldr r3, [r7, #4]
80063f6: 681b ldr r3, [r3, #0]
80063f8: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80063fc: b29a uxth r2, r3
80063fe: 687b ldr r3, [r7, #4]
8006400: 681b ldr r3, [r3, #0]
8006402: f422 7200 bic.w r2, r2, #512 @ 0x200
8006406: b292 uxth r2, r2
8006408: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
800640c: 6878 ldr r0, [r7, #4]
800640e: f007 fa64 bl 800d8da <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8006412: e011 b.n 8006438 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8006414: 69bb ldr r3, [r7, #24]
8006416: f403 7380 and.w r3, r3, #256 @ 0x100
800641a: 2b00 cmp r3, #0
800641c: d00c beq.n 8006438 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
800641e: 687b ldr r3, [r7, #4]
8006420: 681b ldr r3, [r3, #0]
8006422: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006426: b29a uxth r2, r3
8006428: 687b ldr r3, [r7, #4]
800642a: 681b ldr r3, [r3, #0]
800642c: f422 7280 bic.w r2, r2, #256 @ 0x100
8006430: b292 uxth r2, r2
8006432: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006436: bf00 nop
}
}
8006438: 3720 adds r7, #32
800643a: 46bd mov sp, r7
800643c: bd80 pop {r7, pc}
0800643e <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
800643e: b580 push {r7, lr}
8006440: b082 sub sp, #8
8006442: af00 add r7, sp, #0
8006444: 6078 str r0, [r7, #4]
8006446: 460b mov r3, r1
8006448: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
800644a: 687b ldr r3, [r7, #4]
800644c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006450: 2b01 cmp r3, #1
8006452: d101 bne.n 8006458 <HAL_PCD_SetAddress+0x1a>
8006454: 2302 movs r3, #2
8006456: e012 b.n 800647e <HAL_PCD_SetAddress+0x40>
8006458: 687b ldr r3, [r7, #4]
800645a: 2201 movs r2, #1
800645c: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8006460: 687b ldr r3, [r7, #4]
8006462: 78fa ldrb r2, [r7, #3]
8006464: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8006466: 687b ldr r3, [r7, #4]
8006468: 681b ldr r3, [r3, #0]
800646a: 78fa ldrb r2, [r7, #3]
800646c: 4611 mov r1, r2
800646e: 4618 mov r0, r3
8006470: f005 fb14 bl 800ba9c <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8006474: 687b ldr r3, [r7, #4]
8006476: 2200 movs r2, #0
8006478: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
800647c: 2300 movs r3, #0
}
800647e: 4618 mov r0, r3
8006480: 3708 adds r7, #8
8006482: 46bd mov sp, r7
8006484: bd80 pop {r7, pc}
08006486 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8006486: b580 push {r7, lr}
8006488: b084 sub sp, #16
800648a: af00 add r7, sp, #0
800648c: 6078 str r0, [r7, #4]
800648e: 4608 mov r0, r1
8006490: 4611 mov r1, r2
8006492: 461a mov r2, r3
8006494: 4603 mov r3, r0
8006496: 70fb strb r3, [r7, #3]
8006498: 460b mov r3, r1
800649a: 803b strh r3, [r7, #0]
800649c: 4613 mov r3, r2
800649e: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
80064a0: 2300 movs r3, #0
80064a2: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
80064a4: f997 3003 ldrsb.w r3, [r7, #3]
80064a8: 2b00 cmp r3, #0
80064aa: da0e bge.n 80064ca <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80064ac: 78fb ldrb r3, [r7, #3]
80064ae: f003 0207 and.w r2, r3, #7
80064b2: 4613 mov r3, r2
80064b4: 009b lsls r3, r3, #2
80064b6: 4413 add r3, r2
80064b8: 00db lsls r3, r3, #3
80064ba: 3310 adds r3, #16
80064bc: 687a ldr r2, [r7, #4]
80064be: 4413 add r3, r2
80064c0: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80064c2: 68fb ldr r3, [r7, #12]
80064c4: 2201 movs r2, #1
80064c6: 705a strb r2, [r3, #1]
80064c8: e00e b.n 80064e8 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80064ca: 78fb ldrb r3, [r7, #3]
80064cc: f003 0207 and.w r2, r3, #7
80064d0: 4613 mov r3, r2
80064d2: 009b lsls r3, r3, #2
80064d4: 4413 add r3, r2
80064d6: 00db lsls r3, r3, #3
80064d8: f503 73a8 add.w r3, r3, #336 @ 0x150
80064dc: 687a ldr r2, [r7, #4]
80064de: 4413 add r3, r2
80064e0: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80064e2: 68fb ldr r3, [r7, #12]
80064e4: 2200 movs r2, #0
80064e6: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
80064e8: 78fb ldrb r3, [r7, #3]
80064ea: f003 0307 and.w r3, r3, #7
80064ee: b2da uxtb r2, r3
80064f0: 68fb ldr r3, [r7, #12]
80064f2: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
80064f4: 883a ldrh r2, [r7, #0]
80064f6: 68fb ldr r3, [r7, #12]
80064f8: 611a str r2, [r3, #16]
ep->type = ep_type;
80064fa: 68fb ldr r3, [r7, #12]
80064fc: 78ba ldrb r2, [r7, #2]
80064fe: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8006500: 78bb ldrb r3, [r7, #2]
8006502: 2b02 cmp r3, #2
8006504: d102 bne.n 800650c <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8006506: 68fb ldr r3, [r7, #12]
8006508: 2200 movs r2, #0
800650a: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
800650c: 687b ldr r3, [r7, #4]
800650e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006512: 2b01 cmp r3, #1
8006514: d101 bne.n 800651a <HAL_PCD_EP_Open+0x94>
8006516: 2302 movs r3, #2
8006518: e00e b.n 8006538 <HAL_PCD_EP_Open+0xb2>
800651a: 687b ldr r3, [r7, #4]
800651c: 2201 movs r2, #1
800651e: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8006522: 687b ldr r3, [r7, #4]
8006524: 681b ldr r3, [r3, #0]
8006526: 68f9 ldr r1, [r7, #12]
8006528: 4618 mov r0, r3
800652a: f003 f85d bl 80095e8 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
800652e: 687b ldr r3, [r7, #4]
8006530: 2200 movs r2, #0
8006532: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
8006536: 7afb ldrb r3, [r7, #11]
}
8006538: 4618 mov r0, r3
800653a: 3710 adds r7, #16
800653c: 46bd mov sp, r7
800653e: bd80 pop {r7, pc}
08006540 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006540: b580 push {r7, lr}
8006542: b084 sub sp, #16
8006544: af00 add r7, sp, #0
8006546: 6078 str r0, [r7, #4]
8006548: 460b mov r3, r1
800654a: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
800654c: f997 3003 ldrsb.w r3, [r7, #3]
8006550: 2b00 cmp r3, #0
8006552: da0e bge.n 8006572 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006554: 78fb ldrb r3, [r7, #3]
8006556: f003 0207 and.w r2, r3, #7
800655a: 4613 mov r3, r2
800655c: 009b lsls r3, r3, #2
800655e: 4413 add r3, r2
8006560: 00db lsls r3, r3, #3
8006562: 3310 adds r3, #16
8006564: 687a ldr r2, [r7, #4]
8006566: 4413 add r3, r2
8006568: 60fb str r3, [r7, #12]
ep->is_in = 1U;
800656a: 68fb ldr r3, [r7, #12]
800656c: 2201 movs r2, #1
800656e: 705a strb r2, [r3, #1]
8006570: e00e b.n 8006590 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006572: 78fb ldrb r3, [r7, #3]
8006574: f003 0207 and.w r2, r3, #7
8006578: 4613 mov r3, r2
800657a: 009b lsls r3, r3, #2
800657c: 4413 add r3, r2
800657e: 00db lsls r3, r3, #3
8006580: f503 73a8 add.w r3, r3, #336 @ 0x150
8006584: 687a ldr r2, [r7, #4]
8006586: 4413 add r3, r2
8006588: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800658a: 68fb ldr r3, [r7, #12]
800658c: 2200 movs r2, #0
800658e: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006590: 78fb ldrb r3, [r7, #3]
8006592: f003 0307 and.w r3, r3, #7
8006596: b2da uxtb r2, r3
8006598: 68fb ldr r3, [r7, #12]
800659a: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800659c: 687b ldr r3, [r7, #4]
800659e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80065a2: 2b01 cmp r3, #1
80065a4: d101 bne.n 80065aa <HAL_PCD_EP_Close+0x6a>
80065a6: 2302 movs r3, #2
80065a8: e00e b.n 80065c8 <HAL_PCD_EP_Close+0x88>
80065aa: 687b ldr r3, [r7, #4]
80065ac: 2201 movs r2, #1
80065ae: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
80065b2: 687b ldr r3, [r7, #4]
80065b4: 681b ldr r3, [r3, #0]
80065b6: 68f9 ldr r1, [r7, #12]
80065b8: 4618 mov r0, r3
80065ba: f003 fbd5 bl 8009d68 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
80065be: 687b ldr r3, [r7, #4]
80065c0: 2200 movs r2, #0
80065c2: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80065c6: 2300 movs r3, #0
}
80065c8: 4618 mov r0, r3
80065ca: 3710 adds r7, #16
80065cc: 46bd mov sp, r7
80065ce: bd80 pop {r7, pc}
080065d0 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80065d0: b580 push {r7, lr}
80065d2: b086 sub sp, #24
80065d4: af00 add r7, sp, #0
80065d6: 60f8 str r0, [r7, #12]
80065d8: 607a str r2, [r7, #4]
80065da: 603b str r3, [r7, #0]
80065dc: 460b mov r3, r1
80065de: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80065e0: 7afb ldrb r3, [r7, #11]
80065e2: f003 0207 and.w r2, r3, #7
80065e6: 4613 mov r3, r2
80065e8: 009b lsls r3, r3, #2
80065ea: 4413 add r3, r2
80065ec: 00db lsls r3, r3, #3
80065ee: f503 73a8 add.w r3, r3, #336 @ 0x150
80065f2: 68fa ldr r2, [r7, #12]
80065f4: 4413 add r3, r2
80065f6: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
80065f8: 697b ldr r3, [r7, #20]
80065fa: 687a ldr r2, [r7, #4]
80065fc: 615a str r2, [r3, #20]
ep->xfer_len = len;
80065fe: 697b ldr r3, [r7, #20]
8006600: 683a ldr r2, [r7, #0]
8006602: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8006604: 697b ldr r3, [r7, #20]
8006606: 2200 movs r2, #0
8006608: 61da str r2, [r3, #28]
ep->is_in = 0U;
800660a: 697b ldr r3, [r7, #20]
800660c: 2200 movs r2, #0
800660e: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006610: 7afb ldrb r3, [r7, #11]
8006612: f003 0307 and.w r3, r3, #7
8006616: b2da uxtb r2, r3
8006618: 697b ldr r3, [r7, #20]
800661a: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
800661c: 68fb ldr r3, [r7, #12]
800661e: 681b ldr r3, [r3, #0]
8006620: 6979 ldr r1, [r7, #20]
8006622: 4618 mov r0, r3
8006624: f003 fd8c bl 800a140 <USB_EPStartXfer>
return HAL_OK;
8006628: 2300 movs r3, #0
}
800662a: 4618 mov r0, r3
800662c: 3718 adds r7, #24
800662e: 46bd mov sp, r7
8006630: bd80 pop {r7, pc}
08006632 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8006632: b480 push {r7}
8006634: b083 sub sp, #12
8006636: af00 add r7, sp, #0
8006638: 6078 str r0, [r7, #4]
800663a: 460b mov r3, r1
800663c: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
800663e: 78fb ldrb r3, [r7, #3]
8006640: f003 0207 and.w r2, r3, #7
8006644: 6879 ldr r1, [r7, #4]
8006646: 4613 mov r3, r2
8006648: 009b lsls r3, r3, #2
800664a: 4413 add r3, r2
800664c: 00db lsls r3, r3, #3
800664e: 440b add r3, r1
8006650: f503 73b6 add.w r3, r3, #364 @ 0x16c
8006654: 681b ldr r3, [r3, #0]
}
8006656: 4618 mov r0, r3
8006658: 370c adds r7, #12
800665a: 46bd mov sp, r7
800665c: bc80 pop {r7}
800665e: 4770 bx lr
08006660 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006660: b580 push {r7, lr}
8006662: b086 sub sp, #24
8006664: af00 add r7, sp, #0
8006666: 60f8 str r0, [r7, #12]
8006668: 607a str r2, [r7, #4]
800666a: 603b str r3, [r7, #0]
800666c: 460b mov r3, r1
800666e: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006670: 7afb ldrb r3, [r7, #11]
8006672: f003 0207 and.w r2, r3, #7
8006676: 4613 mov r3, r2
8006678: 009b lsls r3, r3, #2
800667a: 4413 add r3, r2
800667c: 00db lsls r3, r3, #3
800667e: 3310 adds r3, #16
8006680: 68fa ldr r2, [r7, #12]
8006682: 4413 add r3, r2
8006684: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006686: 697b ldr r3, [r7, #20]
8006688: 687a ldr r2, [r7, #4]
800668a: 615a str r2, [r3, #20]
ep->xfer_len = len;
800668c: 697b ldr r3, [r7, #20]
800668e: 683a ldr r2, [r7, #0]
8006690: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8006692: 697b ldr r3, [r7, #20]
8006694: 2201 movs r2, #1
8006696: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
800669a: 697b ldr r3, [r7, #20]
800669c: 683a ldr r2, [r7, #0]
800669e: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
80066a0: 697b ldr r3, [r7, #20]
80066a2: 2200 movs r2, #0
80066a4: 61da str r2, [r3, #28]
ep->is_in = 1U;
80066a6: 697b ldr r3, [r7, #20]
80066a8: 2201 movs r2, #1
80066aa: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
80066ac: 7afb ldrb r3, [r7, #11]
80066ae: f003 0307 and.w r3, r3, #7
80066b2: b2da uxtb r2, r3
80066b4: 697b ldr r3, [r7, #20]
80066b6: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80066b8: 68fb ldr r3, [r7, #12]
80066ba: 681b ldr r3, [r3, #0]
80066bc: 6979 ldr r1, [r7, #20]
80066be: 4618 mov r0, r3
80066c0: f003 fd3e bl 800a140 <USB_EPStartXfer>
return HAL_OK;
80066c4: 2300 movs r3, #0
}
80066c6: 4618 mov r0, r3
80066c8: 3718 adds r7, #24
80066ca: 46bd mov sp, r7
80066cc: bd80 pop {r7, pc}
080066ce <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80066ce: b580 push {r7, lr}
80066d0: b084 sub sp, #16
80066d2: af00 add r7, sp, #0
80066d4: 6078 str r0, [r7, #4]
80066d6: 460b mov r3, r1
80066d8: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
80066da: 78fb ldrb r3, [r7, #3]
80066dc: f003 0307 and.w r3, r3, #7
80066e0: 687a ldr r2, [r7, #4]
80066e2: 7912 ldrb r2, [r2, #4]
80066e4: 4293 cmp r3, r2
80066e6: d901 bls.n 80066ec <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
80066e8: 2301 movs r3, #1
80066ea: e04c b.n 8006786 <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
80066ec: f997 3003 ldrsb.w r3, [r7, #3]
80066f0: 2b00 cmp r3, #0
80066f2: da0e bge.n 8006712 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80066f4: 78fb ldrb r3, [r7, #3]
80066f6: f003 0207 and.w r2, r3, #7
80066fa: 4613 mov r3, r2
80066fc: 009b lsls r3, r3, #2
80066fe: 4413 add r3, r2
8006700: 00db lsls r3, r3, #3
8006702: 3310 adds r3, #16
8006704: 687a ldr r2, [r7, #4]
8006706: 4413 add r3, r2
8006708: 60fb str r3, [r7, #12]
ep->is_in = 1U;
800670a: 68fb ldr r3, [r7, #12]
800670c: 2201 movs r2, #1
800670e: 705a strb r2, [r3, #1]
8006710: e00c b.n 800672c <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8006712: 78fa ldrb r2, [r7, #3]
8006714: 4613 mov r3, r2
8006716: 009b lsls r3, r3, #2
8006718: 4413 add r3, r2
800671a: 00db lsls r3, r3, #3
800671c: f503 73a8 add.w r3, r3, #336 @ 0x150
8006720: 687a ldr r2, [r7, #4]
8006722: 4413 add r3, r2
8006724: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006726: 68fb ldr r3, [r7, #12]
8006728: 2200 movs r2, #0
800672a: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
800672c: 68fb ldr r3, [r7, #12]
800672e: 2201 movs r2, #1
8006730: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006732: 78fb ldrb r3, [r7, #3]
8006734: f003 0307 and.w r3, r3, #7
8006738: b2da uxtb r2, r3
800673a: 68fb ldr r3, [r7, #12]
800673c: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800673e: 687b ldr r3, [r7, #4]
8006740: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006744: 2b01 cmp r3, #1
8006746: d101 bne.n 800674c <HAL_PCD_EP_SetStall+0x7e>
8006748: 2302 movs r3, #2
800674a: e01c b.n 8006786 <HAL_PCD_EP_SetStall+0xb8>
800674c: 687b ldr r3, [r7, #4]
800674e: 2201 movs r2, #1
8006750: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8006754: 687b ldr r3, [r7, #4]
8006756: 681b ldr r3, [r3, #0]
8006758: 68f9 ldr r1, [r7, #12]
800675a: 4618 mov r0, r3
800675c: f005 f8a1 bl 800b8a2 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8006760: 78fb ldrb r3, [r7, #3]
8006762: f003 0307 and.w r3, r3, #7
8006766: 2b00 cmp r3, #0
8006768: d108 bne.n 800677c <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
800676a: 687b ldr r3, [r7, #4]
800676c: 681a ldr r2, [r3, #0]
800676e: 687b ldr r3, [r7, #4]
8006770: f503 7326 add.w r3, r3, #664 @ 0x298
8006774: 4619 mov r1, r3
8006776: 4610 mov r0, r2
8006778: f005 f9c6 bl 800bb08 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
800677c: 687b ldr r3, [r7, #4]
800677e: 2200 movs r2, #0
8006780: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006784: 2300 movs r3, #0
}
8006786: 4618 mov r0, r3
8006788: 3710 adds r7, #16
800678a: 46bd mov sp, r7
800678c: bd80 pop {r7, pc}
0800678e <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
800678e: b580 push {r7, lr}
8006790: b084 sub sp, #16
8006792: af00 add r7, sp, #0
8006794: 6078 str r0, [r7, #4]
8006796: 460b mov r3, r1
8006798: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
800679a: 78fb ldrb r3, [r7, #3]
800679c: f003 030f and.w r3, r3, #15
80067a0: 687a ldr r2, [r7, #4]
80067a2: 7912 ldrb r2, [r2, #4]
80067a4: 4293 cmp r3, r2
80067a6: d901 bls.n 80067ac <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
80067a8: 2301 movs r3, #1
80067aa: e040 b.n 800682e <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
80067ac: f997 3003 ldrsb.w r3, [r7, #3]
80067b0: 2b00 cmp r3, #0
80067b2: da0e bge.n 80067d2 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80067b4: 78fb ldrb r3, [r7, #3]
80067b6: f003 0207 and.w r2, r3, #7
80067ba: 4613 mov r3, r2
80067bc: 009b lsls r3, r3, #2
80067be: 4413 add r3, r2
80067c0: 00db lsls r3, r3, #3
80067c2: 3310 adds r3, #16
80067c4: 687a ldr r2, [r7, #4]
80067c6: 4413 add r3, r2
80067c8: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80067ca: 68fb ldr r3, [r7, #12]
80067cc: 2201 movs r2, #1
80067ce: 705a strb r2, [r3, #1]
80067d0: e00e b.n 80067f0 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80067d2: 78fb ldrb r3, [r7, #3]
80067d4: f003 0207 and.w r2, r3, #7
80067d8: 4613 mov r3, r2
80067da: 009b lsls r3, r3, #2
80067dc: 4413 add r3, r2
80067de: 00db lsls r3, r3, #3
80067e0: f503 73a8 add.w r3, r3, #336 @ 0x150
80067e4: 687a ldr r2, [r7, #4]
80067e6: 4413 add r3, r2
80067e8: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80067ea: 68fb ldr r3, [r7, #12]
80067ec: 2200 movs r2, #0
80067ee: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
80067f0: 68fb ldr r3, [r7, #12]
80067f2: 2200 movs r2, #0
80067f4: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
80067f6: 78fb ldrb r3, [r7, #3]
80067f8: f003 0307 and.w r3, r3, #7
80067fc: b2da uxtb r2, r3
80067fe: 68fb ldr r3, [r7, #12]
8006800: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006802: 687b ldr r3, [r7, #4]
8006804: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006808: 2b01 cmp r3, #1
800680a: d101 bne.n 8006810 <HAL_PCD_EP_ClrStall+0x82>
800680c: 2302 movs r3, #2
800680e: e00e b.n 800682e <HAL_PCD_EP_ClrStall+0xa0>
8006810: 687b ldr r3, [r7, #4]
8006812: 2201 movs r2, #1
8006814: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
8006818: 687b ldr r3, [r7, #4]
800681a: 681b ldr r3, [r3, #0]
800681c: 68f9 ldr r1, [r7, #12]
800681e: 4618 mov r0, r3
8006820: f005 f88f bl 800b942 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8006824: 687b ldr r3, [r7, #4]
8006826: 2200 movs r2, #0
8006828: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
800682c: 2300 movs r3, #0
}
800682e: 4618 mov r0, r3
8006830: 3710 adds r7, #16
8006832: 46bd mov sp, r7
8006834: bd80 pop {r7, pc}
08006836 <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
8006836: b580 push {r7, lr}
8006838: b096 sub sp, #88 @ 0x58
800683a: af00 add r7, sp, #0
800683c: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
800683e: e3bb b.n 8006fb8 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8006840: 687b ldr r3, [r7, #4]
8006842: 681b ldr r3, [r3, #0]
8006844: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006848: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
800684c: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006850: b2db uxtb r3, r3
8006852: f003 030f and.w r3, r3, #15
8006856: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
800685a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800685e: 2b00 cmp r3, #0
8006860: f040 8175 bne.w 8006b4e <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8006864: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006868: f003 0310 and.w r3, r3, #16
800686c: 2b00 cmp r3, #0
800686e: d14e bne.n 800690e <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006870: 687b ldr r3, [r7, #4]
8006872: 681b ldr r3, [r3, #0]
8006874: 881b ldrh r3, [r3, #0]
8006876: b29b uxth r3, r3
8006878: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
800687c: f023 0370 bic.w r3, r3, #112 @ 0x70
8006880: 81fb strh r3, [r7, #14]
8006882: 687b ldr r3, [r7, #4]
8006884: 681a ldr r2, [r3, #0]
8006886: 89fb ldrh r3, [r7, #14]
8006888: ea6f 4343 mvn.w r3, r3, lsl #17
800688c: ea6f 4353 mvn.w r3, r3, lsr #17
8006890: b29b uxth r3, r3
8006892: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8006894: 687b ldr r3, [r7, #4]
8006896: 3310 adds r3, #16
8006898: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
800689a: 687b ldr r3, [r7, #4]
800689c: 681b ldr r3, [r3, #0]
800689e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80068a2: b29b uxth r3, r3
80068a4: 461a mov r2, r3
80068a6: 6d7b ldr r3, [r7, #84] @ 0x54
80068a8: 781b ldrb r3, [r3, #0]
80068aa: 00db lsls r3, r3, #3
80068ac: 4413 add r3, r2
80068ae: 3302 adds r3, #2
80068b0: 005b lsls r3, r3, #1
80068b2: 687a ldr r2, [r7, #4]
80068b4: 6812 ldr r2, [r2, #0]
80068b6: 4413 add r3, r2
80068b8: f503 6380 add.w r3, r3, #1024 @ 0x400
80068bc: 881b ldrh r3, [r3, #0]
80068be: f3c3 0209 ubfx r2, r3, #0, #10
80068c2: 6d7b ldr r3, [r7, #84] @ 0x54
80068c4: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
80068c6: 6d7b ldr r3, [r7, #84] @ 0x54
80068c8: 695a ldr r2, [r3, #20]
80068ca: 6d7b ldr r3, [r7, #84] @ 0x54
80068cc: 69db ldr r3, [r3, #28]
80068ce: 441a add r2, r3
80068d0: 6d7b ldr r3, [r7, #84] @ 0x54
80068d2: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
80068d4: 2100 movs r1, #0
80068d6: 6878 ldr r0, [r7, #4]
80068d8: f006 ffe5 bl 800d8a6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
80068dc: 687b ldr r3, [r7, #4]
80068de: 7b5b ldrb r3, [r3, #13]
80068e0: b2db uxtb r3, r3
80068e2: 2b00 cmp r3, #0
80068e4: f000 8368 beq.w 8006fb8 <PCD_EP_ISR_Handler+0x782>
80068e8: 6d7b ldr r3, [r7, #84] @ 0x54
80068ea: 699b ldr r3, [r3, #24]
80068ec: 2b00 cmp r3, #0
80068ee: f040 8363 bne.w 8006fb8 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
80068f2: 687b ldr r3, [r7, #4]
80068f4: 7b5b ldrb r3, [r3, #13]
80068f6: b2db uxtb r3, r3
80068f8: f063 037f orn r3, r3, #127 @ 0x7f
80068fc: b2da uxtb r2, r3
80068fe: 687b ldr r3, [r7, #4]
8006900: 681b ldr r3, [r3, #0]
8006902: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
8006906: 687b ldr r3, [r7, #4]
8006908: 2200 movs r2, #0
800690a: 735a strb r2, [r3, #13]
800690c: e354 b.n 8006fb8 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
800690e: 687b ldr r3, [r7, #4]
8006910: f503 73a8 add.w r3, r3, #336 @ 0x150
8006914: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8006916: 687b ldr r3, [r7, #4]
8006918: 681b ldr r3, [r3, #0]
800691a: 881b ldrh r3, [r3, #0]
800691c: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8006920: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006924: f403 6300 and.w r3, r3, #2048 @ 0x800
8006928: 2b00 cmp r3, #0
800692a: d034 beq.n 8006996 <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
800692c: 687b ldr r3, [r7, #4]
800692e: 681b ldr r3, [r3, #0]
8006930: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006934: b29b uxth r3, r3
8006936: 461a mov r2, r3
8006938: 6d7b ldr r3, [r7, #84] @ 0x54
800693a: 781b ldrb r3, [r3, #0]
800693c: 00db lsls r3, r3, #3
800693e: 4413 add r3, r2
8006940: 3306 adds r3, #6
8006942: 005b lsls r3, r3, #1
8006944: 687a ldr r2, [r7, #4]
8006946: 6812 ldr r2, [r2, #0]
8006948: 4413 add r3, r2
800694a: f503 6380 add.w r3, r3, #1024 @ 0x400
800694e: 881b ldrh r3, [r3, #0]
8006950: f3c3 0209 ubfx r2, r3, #0, #10
8006954: 6d7b ldr r3, [r7, #84] @ 0x54
8006956: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8006958: 687b ldr r3, [r7, #4]
800695a: 6818 ldr r0, [r3, #0]
800695c: 687b ldr r3, [r7, #4]
800695e: f503 7126 add.w r1, r3, #664 @ 0x298
8006962: 6d7b ldr r3, [r7, #84] @ 0x54
8006964: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8006966: 6d7b ldr r3, [r7, #84] @ 0x54
8006968: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
800696a: b29b uxth r3, r3
800696c: f005 f91d bl 800bbaa <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006970: 687b ldr r3, [r7, #4]
8006972: 681b ldr r3, [r3, #0]
8006974: 881b ldrh r3, [r3, #0]
8006976: b29a uxth r2, r3
8006978: f640 738f movw r3, #3983 @ 0xf8f
800697c: 4013 ands r3, r2
800697e: 823b strh r3, [r7, #16]
8006980: 687b ldr r3, [r7, #4]
8006982: 681b ldr r3, [r3, #0]
8006984: 8a3a ldrh r2, [r7, #16]
8006986: f042 0280 orr.w r2, r2, #128 @ 0x80
800698a: b292 uxth r2, r2
800698c: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
800698e: 6878 ldr r0, [r7, #4]
8006990: f006 ff5c bl 800d84c <HAL_PCD_SetupStageCallback>
8006994: e310 b.n 8006fb8 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
8006996: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
800699a: 2b00 cmp r3, #0
800699c: f280 830c bge.w 8006fb8 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80069a0: 687b ldr r3, [r7, #4]
80069a2: 681b ldr r3, [r3, #0]
80069a4: 881b ldrh r3, [r3, #0]
80069a6: b29a uxth r2, r3
80069a8: f640 738f movw r3, #3983 @ 0xf8f
80069ac: 4013 ands r3, r2
80069ae: 83fb strh r3, [r7, #30]
80069b0: 687b ldr r3, [r7, #4]
80069b2: 681b ldr r3, [r3, #0]
80069b4: 8bfa ldrh r2, [r7, #30]
80069b6: f042 0280 orr.w r2, r2, #128 @ 0x80
80069ba: b292 uxth r2, r2
80069bc: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80069be: 687b ldr r3, [r7, #4]
80069c0: 681b ldr r3, [r3, #0]
80069c2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80069c6: b29b uxth r3, r3
80069c8: 461a mov r2, r3
80069ca: 6d7b ldr r3, [r7, #84] @ 0x54
80069cc: 781b ldrb r3, [r3, #0]
80069ce: 00db lsls r3, r3, #3
80069d0: 4413 add r3, r2
80069d2: 3306 adds r3, #6
80069d4: 005b lsls r3, r3, #1
80069d6: 687a ldr r2, [r7, #4]
80069d8: 6812 ldr r2, [r2, #0]
80069da: 4413 add r3, r2
80069dc: f503 6380 add.w r3, r3, #1024 @ 0x400
80069e0: 881b ldrh r3, [r3, #0]
80069e2: f3c3 0209 ubfx r2, r3, #0, #10
80069e6: 6d7b ldr r3, [r7, #84] @ 0x54
80069e8: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
80069ea: 6d7b ldr r3, [r7, #84] @ 0x54
80069ec: 69db ldr r3, [r3, #28]
80069ee: 2b00 cmp r3, #0
80069f0: d019 beq.n 8006a26 <PCD_EP_ISR_Handler+0x1f0>
80069f2: 6d7b ldr r3, [r7, #84] @ 0x54
80069f4: 695b ldr r3, [r3, #20]
80069f6: 2b00 cmp r3, #0
80069f8: d015 beq.n 8006a26 <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80069fa: 687b ldr r3, [r7, #4]
80069fc: 6818 ldr r0, [r3, #0]
80069fe: 6d7b ldr r3, [r7, #84] @ 0x54
8006a00: 6959 ldr r1, [r3, #20]
8006a02: 6d7b ldr r3, [r7, #84] @ 0x54
8006a04: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8006a06: 6d7b ldr r3, [r7, #84] @ 0x54
8006a08: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8006a0a: b29b uxth r3, r3
8006a0c: f005 f8cd bl 800bbaa <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8006a10: 6d7b ldr r3, [r7, #84] @ 0x54
8006a12: 695a ldr r2, [r3, #20]
8006a14: 6d7b ldr r3, [r7, #84] @ 0x54
8006a16: 69db ldr r3, [r3, #28]
8006a18: 441a add r2, r3
8006a1a: 6d7b ldr r3, [r7, #84] @ 0x54
8006a1c: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
8006a1e: 2100 movs r1, #0
8006a20: 6878 ldr r0, [r7, #4]
8006a22: f006 ff25 bl 800d870 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8006a26: 687b ldr r3, [r7, #4]
8006a28: 681b ldr r3, [r3, #0]
8006a2a: 881b ldrh r3, [r3, #0]
8006a2c: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8006a30: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006a34: f403 6300 and.w r3, r3, #2048 @ 0x800
8006a38: 2b00 cmp r3, #0
8006a3a: f040 82bd bne.w 8006fb8 <PCD_EP_ISR_Handler+0x782>
8006a3e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006a42: f403 5340 and.w r3, r3, #12288 @ 0x3000
8006a46: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
8006a4a: f000 82b5 beq.w 8006fb8 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
8006a4e: 687b ldr r3, [r7, #4]
8006a50: 681b ldr r3, [r3, #0]
8006a52: 61bb str r3, [r7, #24]
8006a54: 687b ldr r3, [r7, #4]
8006a56: 681b ldr r3, [r3, #0]
8006a58: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006a5c: b29b uxth r3, r3
8006a5e: 461a mov r2, r3
8006a60: 69bb ldr r3, [r7, #24]
8006a62: 4413 add r3, r2
8006a64: 61bb str r3, [r7, #24]
8006a66: 69bb ldr r3, [r7, #24]
8006a68: f203 430c addw r3, r3, #1036 @ 0x40c
8006a6c: 617b str r3, [r7, #20]
8006a6e: 697b ldr r3, [r7, #20]
8006a70: 881b ldrh r3, [r3, #0]
8006a72: b29b uxth r3, r3
8006a74: f3c3 0309 ubfx r3, r3, #0, #10
8006a78: b29a uxth r2, r3
8006a7a: 697b ldr r3, [r7, #20]
8006a7c: 801a strh r2, [r3, #0]
8006a7e: 6d7b ldr r3, [r7, #84] @ 0x54
8006a80: 691b ldr r3, [r3, #16]
8006a82: 2b3e cmp r3, #62 @ 0x3e
8006a84: d91d bls.n 8006ac2 <PCD_EP_ISR_Handler+0x28c>
8006a86: 6d7b ldr r3, [r7, #84] @ 0x54
8006a88: 691b ldr r3, [r3, #16]
8006a8a: 095b lsrs r3, r3, #5
8006a8c: 647b str r3, [r7, #68] @ 0x44
8006a8e: 6d7b ldr r3, [r7, #84] @ 0x54
8006a90: 691b ldr r3, [r3, #16]
8006a92: f003 031f and.w r3, r3, #31
8006a96: 2b00 cmp r3, #0
8006a98: d102 bne.n 8006aa0 <PCD_EP_ISR_Handler+0x26a>
8006a9a: 6c7b ldr r3, [r7, #68] @ 0x44
8006a9c: 3b01 subs r3, #1
8006a9e: 647b str r3, [r7, #68] @ 0x44
8006aa0: 697b ldr r3, [r7, #20]
8006aa2: 881b ldrh r3, [r3, #0]
8006aa4: b29a uxth r2, r3
8006aa6: 6c7b ldr r3, [r7, #68] @ 0x44
8006aa8: b29b uxth r3, r3
8006aaa: 029b lsls r3, r3, #10
8006aac: b29b uxth r3, r3
8006aae: 4313 orrs r3, r2
8006ab0: b29b uxth r3, r3
8006ab2: ea6f 4343 mvn.w r3, r3, lsl #17
8006ab6: ea6f 4353 mvn.w r3, r3, lsr #17
8006aba: b29a uxth r2, r3
8006abc: 697b ldr r3, [r7, #20]
8006abe: 801a strh r2, [r3, #0]
8006ac0: e026 b.n 8006b10 <PCD_EP_ISR_Handler+0x2da>
8006ac2: 6d7b ldr r3, [r7, #84] @ 0x54
8006ac4: 691b ldr r3, [r3, #16]
8006ac6: 2b00 cmp r3, #0
8006ac8: d10a bne.n 8006ae0 <PCD_EP_ISR_Handler+0x2aa>
8006aca: 697b ldr r3, [r7, #20]
8006acc: 881b ldrh r3, [r3, #0]
8006ace: b29b uxth r3, r3
8006ad0: ea6f 4343 mvn.w r3, r3, lsl #17
8006ad4: ea6f 4353 mvn.w r3, r3, lsr #17
8006ad8: b29a uxth r2, r3
8006ada: 697b ldr r3, [r7, #20]
8006adc: 801a strh r2, [r3, #0]
8006ade: e017 b.n 8006b10 <PCD_EP_ISR_Handler+0x2da>
8006ae0: 6d7b ldr r3, [r7, #84] @ 0x54
8006ae2: 691b ldr r3, [r3, #16]
8006ae4: 085b lsrs r3, r3, #1
8006ae6: 647b str r3, [r7, #68] @ 0x44
8006ae8: 6d7b ldr r3, [r7, #84] @ 0x54
8006aea: 691b ldr r3, [r3, #16]
8006aec: f003 0301 and.w r3, r3, #1
8006af0: 2b00 cmp r3, #0
8006af2: d002 beq.n 8006afa <PCD_EP_ISR_Handler+0x2c4>
8006af4: 6c7b ldr r3, [r7, #68] @ 0x44
8006af6: 3301 adds r3, #1
8006af8: 647b str r3, [r7, #68] @ 0x44
8006afa: 697b ldr r3, [r7, #20]
8006afc: 881b ldrh r3, [r3, #0]
8006afe: b29a uxth r2, r3
8006b00: 6c7b ldr r3, [r7, #68] @ 0x44
8006b02: b29b uxth r3, r3
8006b04: 029b lsls r3, r3, #10
8006b06: b29b uxth r3, r3
8006b08: 4313 orrs r3, r2
8006b0a: b29a uxth r2, r3
8006b0c: 697b ldr r3, [r7, #20]
8006b0e: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8006b10: 687b ldr r3, [r7, #4]
8006b12: 681b ldr r3, [r3, #0]
8006b14: 881b ldrh r3, [r3, #0]
8006b16: b29b uxth r3, r3
8006b18: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006b1c: f023 0370 bic.w r3, r3, #112 @ 0x70
8006b20: 827b strh r3, [r7, #18]
8006b22: 8a7b ldrh r3, [r7, #18]
8006b24: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006b28: 827b strh r3, [r7, #18]
8006b2a: 8a7b ldrh r3, [r7, #18]
8006b2c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006b30: 827b strh r3, [r7, #18]
8006b32: 687b ldr r3, [r7, #4]
8006b34: 681a ldr r2, [r3, #0]
8006b36: 8a7b ldrh r3, [r7, #18]
8006b38: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006b3c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006b40: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006b44: f043 0380 orr.w r3, r3, #128 @ 0x80
8006b48: b29b uxth r3, r3
8006b4a: 8013 strh r3, [r2, #0]
8006b4c: e234 b.n 8006fb8 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
8006b4e: 687b ldr r3, [r7, #4]
8006b50: 681b ldr r3, [r3, #0]
8006b52: 461a mov r2, r3
8006b54: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006b58: 009b lsls r3, r3, #2
8006b5a: 4413 add r3, r2
8006b5c: 881b ldrh r3, [r3, #0]
8006b5e: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
8006b62: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8006b66: 2b00 cmp r3, #0
8006b68: f280 80fc bge.w 8006d64 <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
8006b6c: 687b ldr r3, [r7, #4]
8006b6e: 681b ldr r3, [r3, #0]
8006b70: 461a mov r2, r3
8006b72: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006b76: 009b lsls r3, r3, #2
8006b78: 4413 add r3, r2
8006b7a: 881b ldrh r3, [r3, #0]
8006b7c: b29a uxth r2, r3
8006b7e: f640 738f movw r3, #3983 @ 0xf8f
8006b82: 4013 ands r3, r2
8006b84: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8006b88: 687b ldr r3, [r7, #4]
8006b8a: 681b ldr r3, [r3, #0]
8006b8c: 461a mov r2, r3
8006b8e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006b92: 009b lsls r3, r3, #2
8006b94: 4413 add r3, r2
8006b96: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
8006b9a: f042 0280 orr.w r2, r2, #128 @ 0x80
8006b9e: b292 uxth r2, r2
8006ba0: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
8006ba2: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8006ba6: 4613 mov r3, r2
8006ba8: 009b lsls r3, r3, #2
8006baa: 4413 add r3, r2
8006bac: 00db lsls r3, r3, #3
8006bae: f503 73a8 add.w r3, r3, #336 @ 0x150
8006bb2: 687a ldr r2, [r7, #4]
8006bb4: 4413 add r3, r2
8006bb6: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8006bb8: 6d7b ldr r3, [r7, #84] @ 0x54
8006bba: 7b1b ldrb r3, [r3, #12]
8006bbc: 2b00 cmp r3, #0
8006bbe: d125 bne.n 8006c0c <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006bc0: 687b ldr r3, [r7, #4]
8006bc2: 681b ldr r3, [r3, #0]
8006bc4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006bc8: b29b uxth r3, r3
8006bca: 461a mov r2, r3
8006bcc: 6d7b ldr r3, [r7, #84] @ 0x54
8006bce: 781b ldrb r3, [r3, #0]
8006bd0: 00db lsls r3, r3, #3
8006bd2: 4413 add r3, r2
8006bd4: 3306 adds r3, #6
8006bd6: 005b lsls r3, r3, #1
8006bd8: 687a ldr r2, [r7, #4]
8006bda: 6812 ldr r2, [r2, #0]
8006bdc: 4413 add r3, r2
8006bde: f503 6380 add.w r3, r3, #1024 @ 0x400
8006be2: 881b ldrh r3, [r3, #0]
8006be4: f3c3 0309 ubfx r3, r3, #0, #10
8006be8: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8006bec: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006bf0: 2b00 cmp r3, #0
8006bf2: f000 8092 beq.w 8006d1a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8006bf6: 687b ldr r3, [r7, #4]
8006bf8: 6818 ldr r0, [r3, #0]
8006bfa: 6d7b ldr r3, [r7, #84] @ 0x54
8006bfc: 6959 ldr r1, [r3, #20]
8006bfe: 6d7b ldr r3, [r7, #84] @ 0x54
8006c00: 88da ldrh r2, [r3, #6]
8006c02: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006c06: f004 ffd0 bl 800bbaa <USB_ReadPMA>
8006c0a: e086 b.n 8006d1a <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8006c0c: 6d7b ldr r3, [r7, #84] @ 0x54
8006c0e: 78db ldrb r3, [r3, #3]
8006c10: 2b02 cmp r3, #2
8006c12: d10a bne.n 8006c2a <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8006c14: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006c18: 461a mov r2, r3
8006c1a: 6d79 ldr r1, [r7, #84] @ 0x54
8006c1c: 6878 ldr r0, [r7, #4]
8006c1e: f000 f9d9 bl 8006fd4 <HAL_PCD_EP_DB_Receive>
8006c22: 4603 mov r3, r0
8006c24: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
8006c28: e077 b.n 8006d1a <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8006c2a: 687b ldr r3, [r7, #4]
8006c2c: 681b ldr r3, [r3, #0]
8006c2e: 461a mov r2, r3
8006c30: 6d7b ldr r3, [r7, #84] @ 0x54
8006c32: 781b ldrb r3, [r3, #0]
8006c34: 009b lsls r3, r3, #2
8006c36: 4413 add r3, r2
8006c38: 881b ldrh r3, [r3, #0]
8006c3a: b29b uxth r3, r3
8006c3c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006c40: f023 0370 bic.w r3, r3, #112 @ 0x70
8006c44: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8006c48: 687b ldr r3, [r7, #4]
8006c4a: 681b ldr r3, [r3, #0]
8006c4c: 461a mov r2, r3
8006c4e: 6d7b ldr r3, [r7, #84] @ 0x54
8006c50: 781b ldrb r3, [r3, #0]
8006c52: 009b lsls r3, r3, #2
8006c54: 441a add r2, r3
8006c56: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
8006c5a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006c5e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006c62: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006c66: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006c6a: b29b uxth r3, r3
8006c6c: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
8006c6e: 687b ldr r3, [r7, #4]
8006c70: 681b ldr r3, [r3, #0]
8006c72: 461a mov r2, r3
8006c74: 6d7b ldr r3, [r7, #84] @ 0x54
8006c76: 781b ldrb r3, [r3, #0]
8006c78: 009b lsls r3, r3, #2
8006c7a: 4413 add r3, r2
8006c7c: 881b ldrh r3, [r3, #0]
8006c7e: b29b uxth r3, r3
8006c80: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006c84: 2b00 cmp r3, #0
8006c86: d024 beq.n 8006cd2 <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8006c88: 687b ldr r3, [r7, #4]
8006c8a: 681b ldr r3, [r3, #0]
8006c8c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006c90: b29b uxth r3, r3
8006c92: 461a mov r2, r3
8006c94: 6d7b ldr r3, [r7, #84] @ 0x54
8006c96: 781b ldrb r3, [r3, #0]
8006c98: 00db lsls r3, r3, #3
8006c9a: 4413 add r3, r2
8006c9c: 3302 adds r3, #2
8006c9e: 005b lsls r3, r3, #1
8006ca0: 687a ldr r2, [r7, #4]
8006ca2: 6812 ldr r2, [r2, #0]
8006ca4: 4413 add r3, r2
8006ca6: f503 6380 add.w r3, r3, #1024 @ 0x400
8006caa: 881b ldrh r3, [r3, #0]
8006cac: f3c3 0309 ubfx r3, r3, #0, #10
8006cb0: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8006cb4: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006cb8: 2b00 cmp r3, #0
8006cba: d02e beq.n 8006d1a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8006cbc: 687b ldr r3, [r7, #4]
8006cbe: 6818 ldr r0, [r3, #0]
8006cc0: 6d7b ldr r3, [r7, #84] @ 0x54
8006cc2: 6959 ldr r1, [r3, #20]
8006cc4: 6d7b ldr r3, [r7, #84] @ 0x54
8006cc6: 891a ldrh r2, [r3, #8]
8006cc8: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006ccc: f004 ff6d bl 800bbaa <USB_ReadPMA>
8006cd0: e023 b.n 8006d1a <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8006cd2: 687b ldr r3, [r7, #4]
8006cd4: 681b ldr r3, [r3, #0]
8006cd6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006cda: b29b uxth r3, r3
8006cdc: 461a mov r2, r3
8006cde: 6d7b ldr r3, [r7, #84] @ 0x54
8006ce0: 781b ldrb r3, [r3, #0]
8006ce2: 00db lsls r3, r3, #3
8006ce4: 4413 add r3, r2
8006ce6: 3306 adds r3, #6
8006ce8: 005b lsls r3, r3, #1
8006cea: 687a ldr r2, [r7, #4]
8006cec: 6812 ldr r2, [r2, #0]
8006cee: 4413 add r3, r2
8006cf0: f503 6380 add.w r3, r3, #1024 @ 0x400
8006cf4: 881b ldrh r3, [r3, #0]
8006cf6: f3c3 0309 ubfx r3, r3, #0, #10
8006cfa: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8006cfe: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006d02: 2b00 cmp r3, #0
8006d04: d009 beq.n 8006d1a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8006d06: 687b ldr r3, [r7, #4]
8006d08: 6818 ldr r0, [r3, #0]
8006d0a: 6d7b ldr r3, [r7, #84] @ 0x54
8006d0c: 6959 ldr r1, [r3, #20]
8006d0e: 6d7b ldr r3, [r7, #84] @ 0x54
8006d10: 895a ldrh r2, [r3, #10]
8006d12: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006d16: f004 ff48 bl 800bbaa <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
8006d1a: 6d7b ldr r3, [r7, #84] @ 0x54
8006d1c: 69da ldr r2, [r3, #28]
8006d1e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006d22: 441a add r2, r3
8006d24: 6d7b ldr r3, [r7, #84] @ 0x54
8006d26: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8006d28: 6d7b ldr r3, [r7, #84] @ 0x54
8006d2a: 695a ldr r2, [r3, #20]
8006d2c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006d30: 441a add r2, r3
8006d32: 6d7b ldr r3, [r7, #84] @ 0x54
8006d34: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
8006d36: 6d7b ldr r3, [r7, #84] @ 0x54
8006d38: 699b ldr r3, [r3, #24]
8006d3a: 2b00 cmp r3, #0
8006d3c: d005 beq.n 8006d4a <PCD_EP_ISR_Handler+0x514>
8006d3e: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
8006d42: 6d7b ldr r3, [r7, #84] @ 0x54
8006d44: 691b ldr r3, [r3, #16]
8006d46: 429a cmp r2, r3
8006d48: d206 bcs.n 8006d58 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8006d4a: 6d7b ldr r3, [r7, #84] @ 0x54
8006d4c: 781b ldrb r3, [r3, #0]
8006d4e: 4619 mov r1, r3
8006d50: 6878 ldr r0, [r7, #4]
8006d52: f006 fd8d bl 800d870 <HAL_PCD_DataOutStageCallback>
8006d56: e005 b.n 8006d64 <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006d58: 687b ldr r3, [r7, #4]
8006d5a: 681b ldr r3, [r3, #0]
8006d5c: 6d79 ldr r1, [r7, #84] @ 0x54
8006d5e: 4618 mov r0, r3
8006d60: f003 f9ee bl 800a140 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8006d64: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006d68: f003 0380 and.w r3, r3, #128 @ 0x80
8006d6c: 2b00 cmp r3, #0
8006d6e: f000 8123 beq.w 8006fb8 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
8006d72: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8006d76: 4613 mov r3, r2
8006d78: 009b lsls r3, r3, #2
8006d7a: 4413 add r3, r2
8006d7c: 00db lsls r3, r3, #3
8006d7e: 3310 adds r3, #16
8006d80: 687a ldr r2, [r7, #4]
8006d82: 4413 add r3, r2
8006d84: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
8006d86: 687b ldr r3, [r7, #4]
8006d88: 681b ldr r3, [r3, #0]
8006d8a: 461a mov r2, r3
8006d8c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006d90: 009b lsls r3, r3, #2
8006d92: 4413 add r3, r2
8006d94: 881b ldrh r3, [r3, #0]
8006d96: b29b uxth r3, r3
8006d98: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8006d9c: f023 0370 bic.w r3, r3, #112 @ 0x70
8006da0: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
8006da4: 687b ldr r3, [r7, #4]
8006da6: 681b ldr r3, [r3, #0]
8006da8: 461a mov r2, r3
8006daa: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006dae: 009b lsls r3, r3, #2
8006db0: 441a add r2, r3
8006db2: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8006db6: ea6f 4343 mvn.w r3, r3, lsl #17
8006dba: ea6f 4353 mvn.w r3, r3, lsr #17
8006dbe: b29b uxth r3, r3
8006dc0: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
8006dc2: 6d7b ldr r3, [r7, #84] @ 0x54
8006dc4: 78db ldrb r3, [r3, #3]
8006dc6: 2b01 cmp r3, #1
8006dc8: f040 80a2 bne.w 8006f10 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
8006dcc: 6d7b ldr r3, [r7, #84] @ 0x54
8006dce: 2200 movs r2, #0
8006dd0: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
8006dd2: 6d7b ldr r3, [r7, #84] @ 0x54
8006dd4: 7b1b ldrb r3, [r3, #12]
8006dd6: 2b00 cmp r3, #0
8006dd8: f000 8093 beq.w 8006f02 <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8006ddc: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006de0: f003 0340 and.w r3, r3, #64 @ 0x40
8006de4: 2b00 cmp r3, #0
8006de6: d046 beq.n 8006e76 <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8006de8: 6d7b ldr r3, [r7, #84] @ 0x54
8006dea: 785b ldrb r3, [r3, #1]
8006dec: 2b00 cmp r3, #0
8006dee: d126 bne.n 8006e3e <PCD_EP_ISR_Handler+0x608>
8006df0: 687b ldr r3, [r7, #4]
8006df2: 681b ldr r3, [r3, #0]
8006df4: 627b str r3, [r7, #36] @ 0x24
8006df6: 687b ldr r3, [r7, #4]
8006df8: 681b ldr r3, [r3, #0]
8006dfa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006dfe: b29b uxth r3, r3
8006e00: 461a mov r2, r3
8006e02: 6a7b ldr r3, [r7, #36] @ 0x24
8006e04: 4413 add r3, r2
8006e06: 627b str r3, [r7, #36] @ 0x24
8006e08: 6d7b ldr r3, [r7, #84] @ 0x54
8006e0a: 781b ldrb r3, [r3, #0]
8006e0c: 011a lsls r2, r3, #4
8006e0e: 6a7b ldr r3, [r7, #36] @ 0x24
8006e10: 4413 add r3, r2
8006e12: f203 4304 addw r3, r3, #1028 @ 0x404
8006e16: 623b str r3, [r7, #32]
8006e18: 6a3b ldr r3, [r7, #32]
8006e1a: 881b ldrh r3, [r3, #0]
8006e1c: b29b uxth r3, r3
8006e1e: f3c3 0309 ubfx r3, r3, #0, #10
8006e22: b29a uxth r2, r3
8006e24: 6a3b ldr r3, [r7, #32]
8006e26: 801a strh r2, [r3, #0]
8006e28: 6a3b ldr r3, [r7, #32]
8006e2a: 881b ldrh r3, [r3, #0]
8006e2c: b29b uxth r3, r3
8006e2e: ea6f 4343 mvn.w r3, r3, lsl #17
8006e32: ea6f 4353 mvn.w r3, r3, lsr #17
8006e36: b29a uxth r2, r3
8006e38: 6a3b ldr r3, [r7, #32]
8006e3a: 801a strh r2, [r3, #0]
8006e3c: e061 b.n 8006f02 <PCD_EP_ISR_Handler+0x6cc>
8006e3e: 6d7b ldr r3, [r7, #84] @ 0x54
8006e40: 785b ldrb r3, [r3, #1]
8006e42: 2b01 cmp r3, #1
8006e44: d15d bne.n 8006f02 <PCD_EP_ISR_Handler+0x6cc>
8006e46: 687b ldr r3, [r7, #4]
8006e48: 681b ldr r3, [r3, #0]
8006e4a: 62fb str r3, [r7, #44] @ 0x2c
8006e4c: 687b ldr r3, [r7, #4]
8006e4e: 681b ldr r3, [r3, #0]
8006e50: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e54: b29b uxth r3, r3
8006e56: 461a mov r2, r3
8006e58: 6afb ldr r3, [r7, #44] @ 0x2c
8006e5a: 4413 add r3, r2
8006e5c: 62fb str r3, [r7, #44] @ 0x2c
8006e5e: 6d7b ldr r3, [r7, #84] @ 0x54
8006e60: 781b ldrb r3, [r3, #0]
8006e62: 011a lsls r2, r3, #4
8006e64: 6afb ldr r3, [r7, #44] @ 0x2c
8006e66: 4413 add r3, r2
8006e68: f203 4304 addw r3, r3, #1028 @ 0x404
8006e6c: 62bb str r3, [r7, #40] @ 0x28
8006e6e: 6abb ldr r3, [r7, #40] @ 0x28
8006e70: 2200 movs r2, #0
8006e72: 801a strh r2, [r3, #0]
8006e74: e045 b.n 8006f02 <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8006e76: 687b ldr r3, [r7, #4]
8006e78: 681b ldr r3, [r3, #0]
8006e7a: 63fb str r3, [r7, #60] @ 0x3c
8006e7c: 6d7b ldr r3, [r7, #84] @ 0x54
8006e7e: 785b ldrb r3, [r3, #1]
8006e80: 2b00 cmp r3, #0
8006e82: d126 bne.n 8006ed2 <PCD_EP_ISR_Handler+0x69c>
8006e84: 687b ldr r3, [r7, #4]
8006e86: 681b ldr r3, [r3, #0]
8006e88: 637b str r3, [r7, #52] @ 0x34
8006e8a: 687b ldr r3, [r7, #4]
8006e8c: 681b ldr r3, [r3, #0]
8006e8e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e92: b29b uxth r3, r3
8006e94: 461a mov r2, r3
8006e96: 6b7b ldr r3, [r7, #52] @ 0x34
8006e98: 4413 add r3, r2
8006e9a: 637b str r3, [r7, #52] @ 0x34
8006e9c: 6d7b ldr r3, [r7, #84] @ 0x54
8006e9e: 781b ldrb r3, [r3, #0]
8006ea0: 011a lsls r2, r3, #4
8006ea2: 6b7b ldr r3, [r7, #52] @ 0x34
8006ea4: 4413 add r3, r2
8006ea6: f203 430c addw r3, r3, #1036 @ 0x40c
8006eaa: 633b str r3, [r7, #48] @ 0x30
8006eac: 6b3b ldr r3, [r7, #48] @ 0x30
8006eae: 881b ldrh r3, [r3, #0]
8006eb0: b29b uxth r3, r3
8006eb2: f3c3 0309 ubfx r3, r3, #0, #10
8006eb6: b29a uxth r2, r3
8006eb8: 6b3b ldr r3, [r7, #48] @ 0x30
8006eba: 801a strh r2, [r3, #0]
8006ebc: 6b3b ldr r3, [r7, #48] @ 0x30
8006ebe: 881b ldrh r3, [r3, #0]
8006ec0: b29b uxth r3, r3
8006ec2: ea6f 4343 mvn.w r3, r3, lsl #17
8006ec6: ea6f 4353 mvn.w r3, r3, lsr #17
8006eca: b29a uxth r2, r3
8006ecc: 6b3b ldr r3, [r7, #48] @ 0x30
8006ece: 801a strh r2, [r3, #0]
8006ed0: e017 b.n 8006f02 <PCD_EP_ISR_Handler+0x6cc>
8006ed2: 6d7b ldr r3, [r7, #84] @ 0x54
8006ed4: 785b ldrb r3, [r3, #1]
8006ed6: 2b01 cmp r3, #1
8006ed8: d113 bne.n 8006f02 <PCD_EP_ISR_Handler+0x6cc>
8006eda: 687b ldr r3, [r7, #4]
8006edc: 681b ldr r3, [r3, #0]
8006ede: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006ee2: b29b uxth r3, r3
8006ee4: 461a mov r2, r3
8006ee6: 6bfb ldr r3, [r7, #60] @ 0x3c
8006ee8: 4413 add r3, r2
8006eea: 63fb str r3, [r7, #60] @ 0x3c
8006eec: 6d7b ldr r3, [r7, #84] @ 0x54
8006eee: 781b ldrb r3, [r3, #0]
8006ef0: 011a lsls r2, r3, #4
8006ef2: 6bfb ldr r3, [r7, #60] @ 0x3c
8006ef4: 4413 add r3, r2
8006ef6: f203 430c addw r3, r3, #1036 @ 0x40c
8006efa: 63bb str r3, [r7, #56] @ 0x38
8006efc: 6bbb ldr r3, [r7, #56] @ 0x38
8006efe: 2200 movs r2, #0
8006f00: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8006f02: 6d7b ldr r3, [r7, #84] @ 0x54
8006f04: 781b ldrb r3, [r3, #0]
8006f06: 4619 mov r1, r3
8006f08: 6878 ldr r0, [r7, #4]
8006f0a: f006 fccc bl 800d8a6 <HAL_PCD_DataInStageCallback>
8006f0e: e053 b.n 8006fb8 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8006f10: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006f14: f403 7380 and.w r3, r3, #256 @ 0x100
8006f18: 2b00 cmp r3, #0
8006f1a: d146 bne.n 8006faa <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8006f1c: 687b ldr r3, [r7, #4]
8006f1e: 681b ldr r3, [r3, #0]
8006f20: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006f24: b29b uxth r3, r3
8006f26: 461a mov r2, r3
8006f28: 6d7b ldr r3, [r7, #84] @ 0x54
8006f2a: 781b ldrb r3, [r3, #0]
8006f2c: 00db lsls r3, r3, #3
8006f2e: 4413 add r3, r2
8006f30: 3302 adds r3, #2
8006f32: 005b lsls r3, r3, #1
8006f34: 687a ldr r2, [r7, #4]
8006f36: 6812 ldr r2, [r2, #0]
8006f38: 4413 add r3, r2
8006f3a: f503 6380 add.w r3, r3, #1024 @ 0x400
8006f3e: 881b ldrh r3, [r3, #0]
8006f40: f3c3 0309 ubfx r3, r3, #0, #10
8006f44: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8006f48: 6d7b ldr r3, [r7, #84] @ 0x54
8006f4a: 699a ldr r2, [r3, #24]
8006f4c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006f50: 429a cmp r2, r3
8006f52: d907 bls.n 8006f64 <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8006f54: 6d7b ldr r3, [r7, #84] @ 0x54
8006f56: 699a ldr r2, [r3, #24]
8006f58: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006f5c: 1ad2 subs r2, r2, r3
8006f5e: 6d7b ldr r3, [r7, #84] @ 0x54
8006f60: 619a str r2, [r3, #24]
8006f62: e002 b.n 8006f6a <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8006f64: 6d7b ldr r3, [r7, #84] @ 0x54
8006f66: 2200 movs r2, #0
8006f68: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8006f6a: 6d7b ldr r3, [r7, #84] @ 0x54
8006f6c: 699b ldr r3, [r3, #24]
8006f6e: 2b00 cmp r3, #0
8006f70: d106 bne.n 8006f80 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8006f72: 6d7b ldr r3, [r7, #84] @ 0x54
8006f74: 781b ldrb r3, [r3, #0]
8006f76: 4619 mov r1, r3
8006f78: 6878 ldr r0, [r7, #4]
8006f7a: f006 fc94 bl 800d8a6 <HAL_PCD_DataInStageCallback>
8006f7e: e01b b.n 8006fb8 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
8006f80: 6d7b ldr r3, [r7, #84] @ 0x54
8006f82: 695a ldr r2, [r3, #20]
8006f84: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006f88: 441a add r2, r3
8006f8a: 6d7b ldr r3, [r7, #84] @ 0x54
8006f8c: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8006f8e: 6d7b ldr r3, [r7, #84] @ 0x54
8006f90: 69da ldr r2, [r3, #28]
8006f92: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006f96: 441a add r2, r3
8006f98: 6d7b ldr r3, [r7, #84] @ 0x54
8006f9a: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006f9c: 687b ldr r3, [r7, #4]
8006f9e: 681b ldr r3, [r3, #0]
8006fa0: 6d79 ldr r1, [r7, #84] @ 0x54
8006fa2: 4618 mov r0, r3
8006fa4: f003 f8cc bl 800a140 <USB_EPStartXfer>
8006fa8: e006 b.n 8006fb8 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8006faa: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006fae: 461a mov r2, r3
8006fb0: 6d79 ldr r1, [r7, #84] @ 0x54
8006fb2: 6878 ldr r0, [r7, #4]
8006fb4: f000 f91b bl 80071ee <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006fb8: 687b ldr r3, [r7, #4]
8006fba: 681b ldr r3, [r3, #0]
8006fbc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006fc0: b29b uxth r3, r3
8006fc2: b21b sxth r3, r3
8006fc4: 2b00 cmp r3, #0
8006fc6: f6ff ac3b blt.w 8006840 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8006fca: 2300 movs r3, #0
}
8006fcc: 4618 mov r0, r3
8006fce: 3758 adds r7, #88 @ 0x58
8006fd0: 46bd mov sp, r7
8006fd2: bd80 pop {r7, pc}
08006fd4 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8006fd4: b580 push {r7, lr}
8006fd6: b088 sub sp, #32
8006fd8: af00 add r7, sp, #0
8006fda: 60f8 str r0, [r7, #12]
8006fdc: 60b9 str r1, [r7, #8]
8006fde: 4613 mov r3, r2
8006fe0: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8006fe2: 88fb ldrh r3, [r7, #6]
8006fe4: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006fe8: 2b00 cmp r3, #0
8006fea: d07e beq.n 80070ea <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8006fec: 68fb ldr r3, [r7, #12]
8006fee: 681b ldr r3, [r3, #0]
8006ff0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006ff4: b29b uxth r3, r3
8006ff6: 461a mov r2, r3
8006ff8: 68bb ldr r3, [r7, #8]
8006ffa: 781b ldrb r3, [r3, #0]
8006ffc: 00db lsls r3, r3, #3
8006ffe: 4413 add r3, r2
8007000: 3302 adds r3, #2
8007002: 005b lsls r3, r3, #1
8007004: 68fa ldr r2, [r7, #12]
8007006: 6812 ldr r2, [r2, #0]
8007008: 4413 add r3, r2
800700a: f503 6380 add.w r3, r3, #1024 @ 0x400
800700e: 881b ldrh r3, [r3, #0]
8007010: f3c3 0309 ubfx r3, r3, #0, #10
8007014: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8007016: 68bb ldr r3, [r7, #8]
8007018: 699a ldr r2, [r3, #24]
800701a: 8b7b ldrh r3, [r7, #26]
800701c: 429a cmp r2, r3
800701e: d306 bcc.n 800702e <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8007020: 68bb ldr r3, [r7, #8]
8007022: 699a ldr r2, [r3, #24]
8007024: 8b7b ldrh r3, [r7, #26]
8007026: 1ad2 subs r2, r2, r3
8007028: 68bb ldr r3, [r7, #8]
800702a: 619a str r2, [r3, #24]
800702c: e002 b.n 8007034 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
800702e: 68bb ldr r3, [r7, #8]
8007030: 2200 movs r2, #0
8007032: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8007034: 68bb ldr r3, [r7, #8]
8007036: 699b ldr r3, [r3, #24]
8007038: 2b00 cmp r3, #0
800703a: d123 bne.n 8007084 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
800703c: 68fb ldr r3, [r7, #12]
800703e: 681b ldr r3, [r3, #0]
8007040: 461a mov r2, r3
8007042: 68bb ldr r3, [r7, #8]
8007044: 781b ldrb r3, [r3, #0]
8007046: 009b lsls r3, r3, #2
8007048: 4413 add r3, r2
800704a: 881b ldrh r3, [r3, #0]
800704c: b29b uxth r3, r3
800704e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8007052: f023 0370 bic.w r3, r3, #112 @ 0x70
8007056: 833b strh r3, [r7, #24]
8007058: 8b3b ldrh r3, [r7, #24]
800705a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800705e: 833b strh r3, [r7, #24]
8007060: 68fb ldr r3, [r7, #12]
8007062: 681b ldr r3, [r3, #0]
8007064: 461a mov r2, r3
8007066: 68bb ldr r3, [r7, #8]
8007068: 781b ldrb r3, [r3, #0]
800706a: 009b lsls r3, r3, #2
800706c: 441a add r2, r3
800706e: 8b3b ldrh r3, [r7, #24]
8007070: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007074: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007078: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800707c: f043 0380 orr.w r3, r3, #128 @ 0x80
8007080: b29b uxth r3, r3
8007082: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8007084: 88fb ldrh r3, [r7, #6]
8007086: f003 0340 and.w r3, r3, #64 @ 0x40
800708a: 2b00 cmp r3, #0
800708c: d01f beq.n 80070ce <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
800708e: 68fb ldr r3, [r7, #12]
8007090: 681b ldr r3, [r3, #0]
8007092: 461a mov r2, r3
8007094: 68bb ldr r3, [r7, #8]
8007096: 781b ldrb r3, [r3, #0]
8007098: 009b lsls r3, r3, #2
800709a: 4413 add r3, r2
800709c: 881b ldrh r3, [r3, #0]
800709e: b29b uxth r3, r3
80070a0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80070a4: f023 0370 bic.w r3, r3, #112 @ 0x70
80070a8: 82fb strh r3, [r7, #22]
80070aa: 68fb ldr r3, [r7, #12]
80070ac: 681b ldr r3, [r3, #0]
80070ae: 461a mov r2, r3
80070b0: 68bb ldr r3, [r7, #8]
80070b2: 781b ldrb r3, [r3, #0]
80070b4: 009b lsls r3, r3, #2
80070b6: 441a add r2, r3
80070b8: 8afb ldrh r3, [r7, #22]
80070ba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80070be: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80070c2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80070c6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80070ca: b29b uxth r3, r3
80070cc: 8013 strh r3, [r2, #0]
}
if (count != 0U)
80070ce: 8b7b ldrh r3, [r7, #26]
80070d0: 2b00 cmp r3, #0
80070d2: f000 8087 beq.w 80071e4 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
80070d6: 68fb ldr r3, [r7, #12]
80070d8: 6818 ldr r0, [r3, #0]
80070da: 68bb ldr r3, [r7, #8]
80070dc: 6959 ldr r1, [r3, #20]
80070de: 68bb ldr r3, [r7, #8]
80070e0: 891a ldrh r2, [r3, #8]
80070e2: 8b7b ldrh r3, [r7, #26]
80070e4: f004 fd61 bl 800bbaa <USB_ReadPMA>
80070e8: e07c b.n 80071e4 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80070ea: 68fb ldr r3, [r7, #12]
80070ec: 681b ldr r3, [r3, #0]
80070ee: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80070f2: b29b uxth r3, r3
80070f4: 461a mov r2, r3
80070f6: 68bb ldr r3, [r7, #8]
80070f8: 781b ldrb r3, [r3, #0]
80070fa: 00db lsls r3, r3, #3
80070fc: 4413 add r3, r2
80070fe: 3306 adds r3, #6
8007100: 005b lsls r3, r3, #1
8007102: 68fa ldr r2, [r7, #12]
8007104: 6812 ldr r2, [r2, #0]
8007106: 4413 add r3, r2
8007108: f503 6380 add.w r3, r3, #1024 @ 0x400
800710c: 881b ldrh r3, [r3, #0]
800710e: f3c3 0309 ubfx r3, r3, #0, #10
8007112: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8007114: 68bb ldr r3, [r7, #8]
8007116: 699a ldr r2, [r3, #24]
8007118: 8b7b ldrh r3, [r7, #26]
800711a: 429a cmp r2, r3
800711c: d306 bcc.n 800712c <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
800711e: 68bb ldr r3, [r7, #8]
8007120: 699a ldr r2, [r3, #24]
8007122: 8b7b ldrh r3, [r7, #26]
8007124: 1ad2 subs r2, r2, r3
8007126: 68bb ldr r3, [r7, #8]
8007128: 619a str r2, [r3, #24]
800712a: e002 b.n 8007132 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
800712c: 68bb ldr r3, [r7, #8]
800712e: 2200 movs r2, #0
8007130: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8007132: 68bb ldr r3, [r7, #8]
8007134: 699b ldr r3, [r3, #24]
8007136: 2b00 cmp r3, #0
8007138: d123 bne.n 8007182 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
800713a: 68fb ldr r3, [r7, #12]
800713c: 681b ldr r3, [r3, #0]
800713e: 461a mov r2, r3
8007140: 68bb ldr r3, [r7, #8]
8007142: 781b ldrb r3, [r3, #0]
8007144: 009b lsls r3, r3, #2
8007146: 4413 add r3, r2
8007148: 881b ldrh r3, [r3, #0]
800714a: b29b uxth r3, r3
800714c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8007150: f023 0370 bic.w r3, r3, #112 @ 0x70
8007154: 83fb strh r3, [r7, #30]
8007156: 8bfb ldrh r3, [r7, #30]
8007158: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800715c: 83fb strh r3, [r7, #30]
800715e: 68fb ldr r3, [r7, #12]
8007160: 681b ldr r3, [r3, #0]
8007162: 461a mov r2, r3
8007164: 68bb ldr r3, [r7, #8]
8007166: 781b ldrb r3, [r3, #0]
8007168: 009b lsls r3, r3, #2
800716a: 441a add r2, r3
800716c: 8bfb ldrh r3, [r7, #30]
800716e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007172: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007176: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800717a: f043 0380 orr.w r3, r3, #128 @ 0x80
800717e: b29b uxth r3, r3
8007180: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8007182: 88fb ldrh r3, [r7, #6]
8007184: f003 0340 and.w r3, r3, #64 @ 0x40
8007188: 2b00 cmp r3, #0
800718a: d11f bne.n 80071cc <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
800718c: 68fb ldr r3, [r7, #12]
800718e: 681b ldr r3, [r3, #0]
8007190: 461a mov r2, r3
8007192: 68bb ldr r3, [r7, #8]
8007194: 781b ldrb r3, [r3, #0]
8007196: 009b lsls r3, r3, #2
8007198: 4413 add r3, r2
800719a: 881b ldrh r3, [r3, #0]
800719c: b29b uxth r3, r3
800719e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80071a2: f023 0370 bic.w r3, r3, #112 @ 0x70
80071a6: 83bb strh r3, [r7, #28]
80071a8: 68fb ldr r3, [r7, #12]
80071aa: 681b ldr r3, [r3, #0]
80071ac: 461a mov r2, r3
80071ae: 68bb ldr r3, [r7, #8]
80071b0: 781b ldrb r3, [r3, #0]
80071b2: 009b lsls r3, r3, #2
80071b4: 441a add r2, r3
80071b6: 8bbb ldrh r3, [r7, #28]
80071b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80071bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80071c0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80071c4: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80071c8: b29b uxth r3, r3
80071ca: 8013 strh r3, [r2, #0]
}
if (count != 0U)
80071cc: 8b7b ldrh r3, [r7, #26]
80071ce: 2b00 cmp r3, #0
80071d0: d008 beq.n 80071e4 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
80071d2: 68fb ldr r3, [r7, #12]
80071d4: 6818 ldr r0, [r3, #0]
80071d6: 68bb ldr r3, [r7, #8]
80071d8: 6959 ldr r1, [r3, #20]
80071da: 68bb ldr r3, [r7, #8]
80071dc: 895a ldrh r2, [r3, #10]
80071de: 8b7b ldrh r3, [r7, #26]
80071e0: f004 fce3 bl 800bbaa <USB_ReadPMA>
}
}
return count;
80071e4: 8b7b ldrh r3, [r7, #26]
}
80071e6: 4618 mov r0, r3
80071e8: 3720 adds r7, #32
80071ea: 46bd mov sp, r7
80071ec: bd80 pop {r7, pc}
080071ee <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
80071ee: b580 push {r7, lr}
80071f0: b0a4 sub sp, #144 @ 0x90
80071f2: af00 add r7, sp, #0
80071f4: 60f8 str r0, [r7, #12]
80071f6: 60b9 str r1, [r7, #8]
80071f8: 4613 mov r3, r2
80071fa: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80071fc: 88fb ldrh r3, [r7, #6]
80071fe: f003 0340 and.w r3, r3, #64 @ 0x40
8007202: 2b00 cmp r3, #0
8007204: f000 81dd beq.w 80075c2 <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8007208: 68fb ldr r3, [r7, #12]
800720a: 681b ldr r3, [r3, #0]
800720c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007210: b29b uxth r3, r3
8007212: 461a mov r2, r3
8007214: 68bb ldr r3, [r7, #8]
8007216: 781b ldrb r3, [r3, #0]
8007218: 00db lsls r3, r3, #3
800721a: 4413 add r3, r2
800721c: 3302 adds r3, #2
800721e: 005b lsls r3, r3, #1
8007220: 68fa ldr r2, [r7, #12]
8007222: 6812 ldr r2, [r2, #0]
8007224: 4413 add r3, r2
8007226: f503 6380 add.w r3, r3, #1024 @ 0x400
800722a: 881b ldrh r3, [r3, #0]
800722c: f3c3 0309 ubfx r3, r3, #0, #10
8007230: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8007234: 68bb ldr r3, [r7, #8]
8007236: 699a ldr r2, [r3, #24]
8007238: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800723c: 429a cmp r2, r3
800723e: d907 bls.n 8007250 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8007240: 68bb ldr r3, [r7, #8]
8007242: 699a ldr r2, [r3, #24]
8007244: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007248: 1ad2 subs r2, r2, r3
800724a: 68bb ldr r3, [r7, #8]
800724c: 619a str r2, [r3, #24]
800724e: e002 b.n 8007256 <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8007250: 68bb ldr r3, [r7, #8]
8007252: 2200 movs r2, #0
8007254: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007256: 68bb ldr r3, [r7, #8]
8007258: 699b ldr r3, [r3, #24]
800725a: 2b00 cmp r3, #0
800725c: f040 80b9 bne.w 80073d2 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007260: 68bb ldr r3, [r7, #8]
8007262: 785b ldrb r3, [r3, #1]
8007264: 2b00 cmp r3, #0
8007266: d126 bne.n 80072b6 <HAL_PCD_EP_DB_Transmit+0xc8>
8007268: 68fb ldr r3, [r7, #12]
800726a: 681b ldr r3, [r3, #0]
800726c: 62fb str r3, [r7, #44] @ 0x2c
800726e: 68fb ldr r3, [r7, #12]
8007270: 681b ldr r3, [r3, #0]
8007272: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007276: b29b uxth r3, r3
8007278: 461a mov r2, r3
800727a: 6afb ldr r3, [r7, #44] @ 0x2c
800727c: 4413 add r3, r2
800727e: 62fb str r3, [r7, #44] @ 0x2c
8007280: 68bb ldr r3, [r7, #8]
8007282: 781b ldrb r3, [r3, #0]
8007284: 011a lsls r2, r3, #4
8007286: 6afb ldr r3, [r7, #44] @ 0x2c
8007288: 4413 add r3, r2
800728a: f203 4304 addw r3, r3, #1028 @ 0x404
800728e: 62bb str r3, [r7, #40] @ 0x28
8007290: 6abb ldr r3, [r7, #40] @ 0x28
8007292: 881b ldrh r3, [r3, #0]
8007294: b29b uxth r3, r3
8007296: f3c3 0309 ubfx r3, r3, #0, #10
800729a: b29a uxth r2, r3
800729c: 6abb ldr r3, [r7, #40] @ 0x28
800729e: 801a strh r2, [r3, #0]
80072a0: 6abb ldr r3, [r7, #40] @ 0x28
80072a2: 881b ldrh r3, [r3, #0]
80072a4: b29b uxth r3, r3
80072a6: ea6f 4343 mvn.w r3, r3, lsl #17
80072aa: ea6f 4353 mvn.w r3, r3, lsr #17
80072ae: b29a uxth r2, r3
80072b0: 6abb ldr r3, [r7, #40] @ 0x28
80072b2: 801a strh r2, [r3, #0]
80072b4: e01a b.n 80072ec <HAL_PCD_EP_DB_Transmit+0xfe>
80072b6: 68bb ldr r3, [r7, #8]
80072b8: 785b ldrb r3, [r3, #1]
80072ba: 2b01 cmp r3, #1
80072bc: d116 bne.n 80072ec <HAL_PCD_EP_DB_Transmit+0xfe>
80072be: 68fb ldr r3, [r7, #12]
80072c0: 681b ldr r3, [r3, #0]
80072c2: 637b str r3, [r7, #52] @ 0x34
80072c4: 68fb ldr r3, [r7, #12]
80072c6: 681b ldr r3, [r3, #0]
80072c8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80072cc: b29b uxth r3, r3
80072ce: 461a mov r2, r3
80072d0: 6b7b ldr r3, [r7, #52] @ 0x34
80072d2: 4413 add r3, r2
80072d4: 637b str r3, [r7, #52] @ 0x34
80072d6: 68bb ldr r3, [r7, #8]
80072d8: 781b ldrb r3, [r3, #0]
80072da: 011a lsls r2, r3, #4
80072dc: 6b7b ldr r3, [r7, #52] @ 0x34
80072de: 4413 add r3, r2
80072e0: f203 4304 addw r3, r3, #1028 @ 0x404
80072e4: 633b str r3, [r7, #48] @ 0x30
80072e6: 6b3b ldr r3, [r7, #48] @ 0x30
80072e8: 2200 movs r2, #0
80072ea: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80072ec: 68fb ldr r3, [r7, #12]
80072ee: 681b ldr r3, [r3, #0]
80072f0: 627b str r3, [r7, #36] @ 0x24
80072f2: 68bb ldr r3, [r7, #8]
80072f4: 785b ldrb r3, [r3, #1]
80072f6: 2b00 cmp r3, #0
80072f8: d126 bne.n 8007348 <HAL_PCD_EP_DB_Transmit+0x15a>
80072fa: 68fb ldr r3, [r7, #12]
80072fc: 681b ldr r3, [r3, #0]
80072fe: 61fb str r3, [r7, #28]
8007300: 68fb ldr r3, [r7, #12]
8007302: 681b ldr r3, [r3, #0]
8007304: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007308: b29b uxth r3, r3
800730a: 461a mov r2, r3
800730c: 69fb ldr r3, [r7, #28]
800730e: 4413 add r3, r2
8007310: 61fb str r3, [r7, #28]
8007312: 68bb ldr r3, [r7, #8]
8007314: 781b ldrb r3, [r3, #0]
8007316: 011a lsls r2, r3, #4
8007318: 69fb ldr r3, [r7, #28]
800731a: 4413 add r3, r2
800731c: f203 430c addw r3, r3, #1036 @ 0x40c
8007320: 61bb str r3, [r7, #24]
8007322: 69bb ldr r3, [r7, #24]
8007324: 881b ldrh r3, [r3, #0]
8007326: b29b uxth r3, r3
8007328: f3c3 0309 ubfx r3, r3, #0, #10
800732c: b29a uxth r2, r3
800732e: 69bb ldr r3, [r7, #24]
8007330: 801a strh r2, [r3, #0]
8007332: 69bb ldr r3, [r7, #24]
8007334: 881b ldrh r3, [r3, #0]
8007336: b29b uxth r3, r3
8007338: ea6f 4343 mvn.w r3, r3, lsl #17
800733c: ea6f 4353 mvn.w r3, r3, lsr #17
8007340: b29a uxth r2, r3
8007342: 69bb ldr r3, [r7, #24]
8007344: 801a strh r2, [r3, #0]
8007346: e017 b.n 8007378 <HAL_PCD_EP_DB_Transmit+0x18a>
8007348: 68bb ldr r3, [r7, #8]
800734a: 785b ldrb r3, [r3, #1]
800734c: 2b01 cmp r3, #1
800734e: d113 bne.n 8007378 <HAL_PCD_EP_DB_Transmit+0x18a>
8007350: 68fb ldr r3, [r7, #12]
8007352: 681b ldr r3, [r3, #0]
8007354: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007358: b29b uxth r3, r3
800735a: 461a mov r2, r3
800735c: 6a7b ldr r3, [r7, #36] @ 0x24
800735e: 4413 add r3, r2
8007360: 627b str r3, [r7, #36] @ 0x24
8007362: 68bb ldr r3, [r7, #8]
8007364: 781b ldrb r3, [r3, #0]
8007366: 011a lsls r2, r3, #4
8007368: 6a7b ldr r3, [r7, #36] @ 0x24
800736a: 4413 add r3, r2
800736c: f203 430c addw r3, r3, #1036 @ 0x40c
8007370: 623b str r3, [r7, #32]
8007372: 6a3b ldr r3, [r7, #32]
8007374: 2200 movs r2, #0
8007376: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007378: 68bb ldr r3, [r7, #8]
800737a: 781b ldrb r3, [r3, #0]
800737c: 4619 mov r1, r3
800737e: 68f8 ldr r0, [r7, #12]
8007380: f006 fa91 bl 800d8a6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007384: 88fb ldrh r3, [r7, #6]
8007386: f403 4380 and.w r3, r3, #16384 @ 0x4000
800738a: 2b00 cmp r3, #0
800738c: f000 82fc beq.w 8007988 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007390: 68fb ldr r3, [r7, #12]
8007392: 681b ldr r3, [r3, #0]
8007394: 461a mov r2, r3
8007396: 68bb ldr r3, [r7, #8]
8007398: 781b ldrb r3, [r3, #0]
800739a: 009b lsls r3, r3, #2
800739c: 4413 add r3, r2
800739e: 881b ldrh r3, [r3, #0]
80073a0: b29b uxth r3, r3
80073a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80073a6: f023 0370 bic.w r3, r3, #112 @ 0x70
80073aa: 82fb strh r3, [r7, #22]
80073ac: 68fb ldr r3, [r7, #12]
80073ae: 681b ldr r3, [r3, #0]
80073b0: 461a mov r2, r3
80073b2: 68bb ldr r3, [r7, #8]
80073b4: 781b ldrb r3, [r3, #0]
80073b6: 009b lsls r3, r3, #2
80073b8: 441a add r2, r3
80073ba: 8afb ldrh r3, [r7, #22]
80073bc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80073c0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80073c4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80073c8: f043 0380 orr.w r3, r3, #128 @ 0x80
80073cc: b29b uxth r3, r3
80073ce: 8013 strh r3, [r2, #0]
80073d0: e2da b.n 8007988 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
80073d2: 88fb ldrh r3, [r7, #6]
80073d4: f403 4380 and.w r3, r3, #16384 @ 0x4000
80073d8: 2b00 cmp r3, #0
80073da: d021 beq.n 8007420 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
80073dc: 68fb ldr r3, [r7, #12]
80073de: 681b ldr r3, [r3, #0]
80073e0: 461a mov r2, r3
80073e2: 68bb ldr r3, [r7, #8]
80073e4: 781b ldrb r3, [r3, #0]
80073e6: 009b lsls r3, r3, #2
80073e8: 4413 add r3, r2
80073ea: 881b ldrh r3, [r3, #0]
80073ec: b29b uxth r3, r3
80073ee: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80073f2: f023 0370 bic.w r3, r3, #112 @ 0x70
80073f6: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80073fa: 68fb ldr r3, [r7, #12]
80073fc: 681b ldr r3, [r3, #0]
80073fe: 461a mov r2, r3
8007400: 68bb ldr r3, [r7, #8]
8007402: 781b ldrb r3, [r3, #0]
8007404: 009b lsls r3, r3, #2
8007406: 441a add r2, r3
8007408: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800740c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007410: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007414: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007418: f043 0380 orr.w r3, r3, #128 @ 0x80
800741c: b29b uxth r3, r3
800741e: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007420: 68bb ldr r3, [r7, #8]
8007422: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007426: 2b01 cmp r3, #1
8007428: f040 82ae bne.w 8007988 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
800742c: 68bb ldr r3, [r7, #8]
800742e: 695a ldr r2, [r3, #20]
8007430: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007434: 441a add r2, r3
8007436: 68bb ldr r3, [r7, #8]
8007438: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
800743a: 68bb ldr r3, [r7, #8]
800743c: 69da ldr r2, [r3, #28]
800743e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007442: 441a add r2, r3
8007444: 68bb ldr r3, [r7, #8]
8007446: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007448: 68bb ldr r3, [r7, #8]
800744a: 6a1a ldr r2, [r3, #32]
800744c: 68bb ldr r3, [r7, #8]
800744e: 691b ldr r3, [r3, #16]
8007450: 429a cmp r2, r3
8007452: d30b bcc.n 800746c <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8007454: 68bb ldr r3, [r7, #8]
8007456: 691b ldr r3, [r3, #16]
8007458: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
800745c: 68bb ldr r3, [r7, #8]
800745e: 6a1a ldr r2, [r3, #32]
8007460: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007464: 1ad2 subs r2, r2, r3
8007466: 68bb ldr r3, [r7, #8]
8007468: 621a str r2, [r3, #32]
800746a: e017 b.n 800749c <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
800746c: 68bb ldr r3, [r7, #8]
800746e: 6a1b ldr r3, [r3, #32]
8007470: 2b00 cmp r3, #0
8007472: d108 bne.n 8007486 <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8007474: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007478: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
800747c: 68bb ldr r3, [r7, #8]
800747e: 2200 movs r2, #0
8007480: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007484: e00a b.n 800749c <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8007486: 68bb ldr r3, [r7, #8]
8007488: 2200 movs r2, #0
800748a: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
800748e: 68bb ldr r3, [r7, #8]
8007490: 6a1b ldr r3, [r3, #32]
8007492: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007496: 68bb ldr r3, [r7, #8]
8007498: 2200 movs r2, #0
800749a: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
800749c: 68bb ldr r3, [r7, #8]
800749e: 785b ldrb r3, [r3, #1]
80074a0: 2b00 cmp r3, #0
80074a2: d165 bne.n 8007570 <HAL_PCD_EP_DB_Transmit+0x382>
80074a4: 68fb ldr r3, [r7, #12]
80074a6: 681b ldr r3, [r3, #0]
80074a8: 63fb str r3, [r7, #60] @ 0x3c
80074aa: 68fb ldr r3, [r7, #12]
80074ac: 681b ldr r3, [r3, #0]
80074ae: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80074b2: b29b uxth r3, r3
80074b4: 461a mov r2, r3
80074b6: 6bfb ldr r3, [r7, #60] @ 0x3c
80074b8: 4413 add r3, r2
80074ba: 63fb str r3, [r7, #60] @ 0x3c
80074bc: 68bb ldr r3, [r7, #8]
80074be: 781b ldrb r3, [r3, #0]
80074c0: 011a lsls r2, r3, #4
80074c2: 6bfb ldr r3, [r7, #60] @ 0x3c
80074c4: 4413 add r3, r2
80074c6: f203 4304 addw r3, r3, #1028 @ 0x404
80074ca: 63bb str r3, [r7, #56] @ 0x38
80074cc: 6bbb ldr r3, [r7, #56] @ 0x38
80074ce: 881b ldrh r3, [r3, #0]
80074d0: b29b uxth r3, r3
80074d2: f3c3 0309 ubfx r3, r3, #0, #10
80074d6: b29a uxth r2, r3
80074d8: 6bbb ldr r3, [r7, #56] @ 0x38
80074da: 801a strh r2, [r3, #0]
80074dc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80074e0: 2b3e cmp r3, #62 @ 0x3e
80074e2: d91d bls.n 8007520 <HAL_PCD_EP_DB_Transmit+0x332>
80074e4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80074e8: 095b lsrs r3, r3, #5
80074ea: 64bb str r3, [r7, #72] @ 0x48
80074ec: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80074f0: f003 031f and.w r3, r3, #31
80074f4: 2b00 cmp r3, #0
80074f6: d102 bne.n 80074fe <HAL_PCD_EP_DB_Transmit+0x310>
80074f8: 6cbb ldr r3, [r7, #72] @ 0x48
80074fa: 3b01 subs r3, #1
80074fc: 64bb str r3, [r7, #72] @ 0x48
80074fe: 6bbb ldr r3, [r7, #56] @ 0x38
8007500: 881b ldrh r3, [r3, #0]
8007502: b29a uxth r2, r3
8007504: 6cbb ldr r3, [r7, #72] @ 0x48
8007506: b29b uxth r3, r3
8007508: 029b lsls r3, r3, #10
800750a: b29b uxth r3, r3
800750c: 4313 orrs r3, r2
800750e: b29b uxth r3, r3
8007510: ea6f 4343 mvn.w r3, r3, lsl #17
8007514: ea6f 4353 mvn.w r3, r3, lsr #17
8007518: b29a uxth r2, r3
800751a: 6bbb ldr r3, [r7, #56] @ 0x38
800751c: 801a strh r2, [r3, #0]
800751e: e044 b.n 80075aa <HAL_PCD_EP_DB_Transmit+0x3bc>
8007520: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007524: 2b00 cmp r3, #0
8007526: d10a bne.n 800753e <HAL_PCD_EP_DB_Transmit+0x350>
8007528: 6bbb ldr r3, [r7, #56] @ 0x38
800752a: 881b ldrh r3, [r3, #0]
800752c: b29b uxth r3, r3
800752e: ea6f 4343 mvn.w r3, r3, lsl #17
8007532: ea6f 4353 mvn.w r3, r3, lsr #17
8007536: b29a uxth r2, r3
8007538: 6bbb ldr r3, [r7, #56] @ 0x38
800753a: 801a strh r2, [r3, #0]
800753c: e035 b.n 80075aa <HAL_PCD_EP_DB_Transmit+0x3bc>
800753e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007542: 085b lsrs r3, r3, #1
8007544: 64bb str r3, [r7, #72] @ 0x48
8007546: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800754a: f003 0301 and.w r3, r3, #1
800754e: 2b00 cmp r3, #0
8007550: d002 beq.n 8007558 <HAL_PCD_EP_DB_Transmit+0x36a>
8007552: 6cbb ldr r3, [r7, #72] @ 0x48
8007554: 3301 adds r3, #1
8007556: 64bb str r3, [r7, #72] @ 0x48
8007558: 6bbb ldr r3, [r7, #56] @ 0x38
800755a: 881b ldrh r3, [r3, #0]
800755c: b29a uxth r2, r3
800755e: 6cbb ldr r3, [r7, #72] @ 0x48
8007560: b29b uxth r3, r3
8007562: 029b lsls r3, r3, #10
8007564: b29b uxth r3, r3
8007566: 4313 orrs r3, r2
8007568: b29a uxth r2, r3
800756a: 6bbb ldr r3, [r7, #56] @ 0x38
800756c: 801a strh r2, [r3, #0]
800756e: e01c b.n 80075aa <HAL_PCD_EP_DB_Transmit+0x3bc>
8007570: 68bb ldr r3, [r7, #8]
8007572: 785b ldrb r3, [r3, #1]
8007574: 2b01 cmp r3, #1
8007576: d118 bne.n 80075aa <HAL_PCD_EP_DB_Transmit+0x3bc>
8007578: 68fb ldr r3, [r7, #12]
800757a: 681b ldr r3, [r3, #0]
800757c: 647b str r3, [r7, #68] @ 0x44
800757e: 68fb ldr r3, [r7, #12]
8007580: 681b ldr r3, [r3, #0]
8007582: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007586: b29b uxth r3, r3
8007588: 461a mov r2, r3
800758a: 6c7b ldr r3, [r7, #68] @ 0x44
800758c: 4413 add r3, r2
800758e: 647b str r3, [r7, #68] @ 0x44
8007590: 68bb ldr r3, [r7, #8]
8007592: 781b ldrb r3, [r3, #0]
8007594: 011a lsls r2, r3, #4
8007596: 6c7b ldr r3, [r7, #68] @ 0x44
8007598: 4413 add r3, r2
800759a: f203 4304 addw r3, r3, #1028 @ 0x404
800759e: 643b str r3, [r7, #64] @ 0x40
80075a0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80075a4: b29a uxth r2, r3
80075a6: 6c3b ldr r3, [r7, #64] @ 0x40
80075a8: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
80075aa: 68fb ldr r3, [r7, #12]
80075ac: 6818 ldr r0, [r3, #0]
80075ae: 68bb ldr r3, [r7, #8]
80075b0: 6959 ldr r1, [r3, #20]
80075b2: 68bb ldr r3, [r7, #8]
80075b4: 891a ldrh r2, [r3, #8]
80075b6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80075ba: b29b uxth r3, r3
80075bc: f004 faaf bl 800bb1e <USB_WritePMA>
80075c0: e1e2 b.n 8007988 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80075c2: 68fb ldr r3, [r7, #12]
80075c4: 681b ldr r3, [r3, #0]
80075c6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80075ca: b29b uxth r3, r3
80075cc: 461a mov r2, r3
80075ce: 68bb ldr r3, [r7, #8]
80075d0: 781b ldrb r3, [r3, #0]
80075d2: 00db lsls r3, r3, #3
80075d4: 4413 add r3, r2
80075d6: 3306 adds r3, #6
80075d8: 005b lsls r3, r3, #1
80075da: 68fa ldr r2, [r7, #12]
80075dc: 6812 ldr r2, [r2, #0]
80075de: 4413 add r3, r2
80075e0: f503 6380 add.w r3, r3, #1024 @ 0x400
80075e4: 881b ldrh r3, [r3, #0]
80075e6: f3c3 0309 ubfx r3, r3, #0, #10
80075ea: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
80075ee: 68bb ldr r3, [r7, #8]
80075f0: 699a ldr r2, [r3, #24]
80075f2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80075f6: 429a cmp r2, r3
80075f8: d307 bcc.n 800760a <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
80075fa: 68bb ldr r3, [r7, #8]
80075fc: 699a ldr r2, [r3, #24]
80075fe: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007602: 1ad2 subs r2, r2, r3
8007604: 68bb ldr r3, [r7, #8]
8007606: 619a str r2, [r3, #24]
8007608: e002 b.n 8007610 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
800760a: 68bb ldr r3, [r7, #8]
800760c: 2200 movs r2, #0
800760e: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007610: 68bb ldr r3, [r7, #8]
8007612: 699b ldr r3, [r3, #24]
8007614: 2b00 cmp r3, #0
8007616: f040 80c0 bne.w 800779a <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800761a: 68bb ldr r3, [r7, #8]
800761c: 785b ldrb r3, [r3, #1]
800761e: 2b00 cmp r3, #0
8007620: d126 bne.n 8007670 <HAL_PCD_EP_DB_Transmit+0x482>
8007622: 68fb ldr r3, [r7, #12]
8007624: 681b ldr r3, [r3, #0]
8007626: 67fb str r3, [r7, #124] @ 0x7c
8007628: 68fb ldr r3, [r7, #12]
800762a: 681b ldr r3, [r3, #0]
800762c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007630: b29b uxth r3, r3
8007632: 461a mov r2, r3
8007634: 6ffb ldr r3, [r7, #124] @ 0x7c
8007636: 4413 add r3, r2
8007638: 67fb str r3, [r7, #124] @ 0x7c
800763a: 68bb ldr r3, [r7, #8]
800763c: 781b ldrb r3, [r3, #0]
800763e: 011a lsls r2, r3, #4
8007640: 6ffb ldr r3, [r7, #124] @ 0x7c
8007642: 4413 add r3, r2
8007644: f203 4304 addw r3, r3, #1028 @ 0x404
8007648: 67bb str r3, [r7, #120] @ 0x78
800764a: 6fbb ldr r3, [r7, #120] @ 0x78
800764c: 881b ldrh r3, [r3, #0]
800764e: b29b uxth r3, r3
8007650: f3c3 0309 ubfx r3, r3, #0, #10
8007654: b29a uxth r2, r3
8007656: 6fbb ldr r3, [r7, #120] @ 0x78
8007658: 801a strh r2, [r3, #0]
800765a: 6fbb ldr r3, [r7, #120] @ 0x78
800765c: 881b ldrh r3, [r3, #0]
800765e: b29b uxth r3, r3
8007660: ea6f 4343 mvn.w r3, r3, lsl #17
8007664: ea6f 4353 mvn.w r3, r3, lsr #17
8007668: b29a uxth r2, r3
800766a: 6fbb ldr r3, [r7, #120] @ 0x78
800766c: 801a strh r2, [r3, #0]
800766e: e01a b.n 80076a6 <HAL_PCD_EP_DB_Transmit+0x4b8>
8007670: 68bb ldr r3, [r7, #8]
8007672: 785b ldrb r3, [r3, #1]
8007674: 2b01 cmp r3, #1
8007676: d116 bne.n 80076a6 <HAL_PCD_EP_DB_Transmit+0x4b8>
8007678: 68fb ldr r3, [r7, #12]
800767a: 681b ldr r3, [r3, #0]
800767c: 667b str r3, [r7, #100] @ 0x64
800767e: 68fb ldr r3, [r7, #12]
8007680: 681b ldr r3, [r3, #0]
8007682: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007686: b29b uxth r3, r3
8007688: 461a mov r2, r3
800768a: 6e7b ldr r3, [r7, #100] @ 0x64
800768c: 4413 add r3, r2
800768e: 667b str r3, [r7, #100] @ 0x64
8007690: 68bb ldr r3, [r7, #8]
8007692: 781b ldrb r3, [r3, #0]
8007694: 011a lsls r2, r3, #4
8007696: 6e7b ldr r3, [r7, #100] @ 0x64
8007698: 4413 add r3, r2
800769a: f203 4304 addw r3, r3, #1028 @ 0x404
800769e: 663b str r3, [r7, #96] @ 0x60
80076a0: 6e3b ldr r3, [r7, #96] @ 0x60
80076a2: 2200 movs r2, #0
80076a4: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80076a6: 68fb ldr r3, [r7, #12]
80076a8: 681b ldr r3, [r3, #0]
80076aa: 677b str r3, [r7, #116] @ 0x74
80076ac: 68bb ldr r3, [r7, #8]
80076ae: 785b ldrb r3, [r3, #1]
80076b0: 2b00 cmp r3, #0
80076b2: d12b bne.n 800770c <HAL_PCD_EP_DB_Transmit+0x51e>
80076b4: 68fb ldr r3, [r7, #12]
80076b6: 681b ldr r3, [r3, #0]
80076b8: 66fb str r3, [r7, #108] @ 0x6c
80076ba: 68fb ldr r3, [r7, #12]
80076bc: 681b ldr r3, [r3, #0]
80076be: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80076c2: b29b uxth r3, r3
80076c4: 461a mov r2, r3
80076c6: 6efb ldr r3, [r7, #108] @ 0x6c
80076c8: 4413 add r3, r2
80076ca: 66fb str r3, [r7, #108] @ 0x6c
80076cc: 68bb ldr r3, [r7, #8]
80076ce: 781b ldrb r3, [r3, #0]
80076d0: 011a lsls r2, r3, #4
80076d2: 6efb ldr r3, [r7, #108] @ 0x6c
80076d4: 4413 add r3, r2
80076d6: f203 430c addw r3, r3, #1036 @ 0x40c
80076da: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80076de: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80076e2: 881b ldrh r3, [r3, #0]
80076e4: b29b uxth r3, r3
80076e6: f3c3 0309 ubfx r3, r3, #0, #10
80076ea: b29a uxth r2, r3
80076ec: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80076f0: 801a strh r2, [r3, #0]
80076f2: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80076f6: 881b ldrh r3, [r3, #0]
80076f8: b29b uxth r3, r3
80076fa: ea6f 4343 mvn.w r3, r3, lsl #17
80076fe: ea6f 4353 mvn.w r3, r3, lsr #17
8007702: b29a uxth r2, r3
8007704: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007708: 801a strh r2, [r3, #0]
800770a: e017 b.n 800773c <HAL_PCD_EP_DB_Transmit+0x54e>
800770c: 68bb ldr r3, [r7, #8]
800770e: 785b ldrb r3, [r3, #1]
8007710: 2b01 cmp r3, #1
8007712: d113 bne.n 800773c <HAL_PCD_EP_DB_Transmit+0x54e>
8007714: 68fb ldr r3, [r7, #12]
8007716: 681b ldr r3, [r3, #0]
8007718: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800771c: b29b uxth r3, r3
800771e: 461a mov r2, r3
8007720: 6f7b ldr r3, [r7, #116] @ 0x74
8007722: 4413 add r3, r2
8007724: 677b str r3, [r7, #116] @ 0x74
8007726: 68bb ldr r3, [r7, #8]
8007728: 781b ldrb r3, [r3, #0]
800772a: 011a lsls r2, r3, #4
800772c: 6f7b ldr r3, [r7, #116] @ 0x74
800772e: 4413 add r3, r2
8007730: f203 430c addw r3, r3, #1036 @ 0x40c
8007734: 673b str r3, [r7, #112] @ 0x70
8007736: 6f3b ldr r3, [r7, #112] @ 0x70
8007738: 2200 movs r2, #0
800773a: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
800773c: 68bb ldr r3, [r7, #8]
800773e: 781b ldrb r3, [r3, #0]
8007740: 4619 mov r1, r3
8007742: 68f8 ldr r0, [r7, #12]
8007744: f006 f8af bl 800d8a6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007748: 88fb ldrh r3, [r7, #6]
800774a: f403 4380 and.w r3, r3, #16384 @ 0x4000
800774e: 2b00 cmp r3, #0
8007750: f040 811a bne.w 8007988 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007754: 68fb ldr r3, [r7, #12]
8007756: 681b ldr r3, [r3, #0]
8007758: 461a mov r2, r3
800775a: 68bb ldr r3, [r7, #8]
800775c: 781b ldrb r3, [r3, #0]
800775e: 009b lsls r3, r3, #2
8007760: 4413 add r3, r2
8007762: 881b ldrh r3, [r3, #0]
8007764: b29b uxth r3, r3
8007766: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800776a: f023 0370 bic.w r3, r3, #112 @ 0x70
800776e: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8007772: 68fb ldr r3, [r7, #12]
8007774: 681b ldr r3, [r3, #0]
8007776: 461a mov r2, r3
8007778: 68bb ldr r3, [r7, #8]
800777a: 781b ldrb r3, [r3, #0]
800777c: 009b lsls r3, r3, #2
800777e: 441a add r2, r3
8007780: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8007784: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007788: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800778c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007790: f043 0380 orr.w r3, r3, #128 @ 0x80
8007794: b29b uxth r3, r3
8007796: 8013 strh r3, [r2, #0]
8007798: e0f6 b.n 8007988 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
800779a: 88fb ldrh r3, [r7, #6]
800779c: f403 4380 and.w r3, r3, #16384 @ 0x4000
80077a0: 2b00 cmp r3, #0
80077a2: d121 bne.n 80077e8 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
80077a4: 68fb ldr r3, [r7, #12]
80077a6: 681b ldr r3, [r3, #0]
80077a8: 461a mov r2, r3
80077aa: 68bb ldr r3, [r7, #8]
80077ac: 781b ldrb r3, [r3, #0]
80077ae: 009b lsls r3, r3, #2
80077b0: 4413 add r3, r2
80077b2: 881b ldrh r3, [r3, #0]
80077b4: b29b uxth r3, r3
80077b6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80077ba: f023 0370 bic.w r3, r3, #112 @ 0x70
80077be: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
80077c2: 68fb ldr r3, [r7, #12]
80077c4: 681b ldr r3, [r3, #0]
80077c6: 461a mov r2, r3
80077c8: 68bb ldr r3, [r7, #8]
80077ca: 781b ldrb r3, [r3, #0]
80077cc: 009b lsls r3, r3, #2
80077ce: 441a add r2, r3
80077d0: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80077d4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80077d8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80077dc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80077e0: f043 0380 orr.w r3, r3, #128 @ 0x80
80077e4: b29b uxth r3, r3
80077e6: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
80077e8: 68bb ldr r3, [r7, #8]
80077ea: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80077ee: 2b01 cmp r3, #1
80077f0: f040 80ca bne.w 8007988 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
80077f4: 68bb ldr r3, [r7, #8]
80077f6: 695a ldr r2, [r3, #20]
80077f8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80077fc: 441a add r2, r3
80077fe: 68bb ldr r3, [r7, #8]
8007800: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007802: 68bb ldr r3, [r7, #8]
8007804: 69da ldr r2, [r3, #28]
8007806: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800780a: 441a add r2, r3
800780c: 68bb ldr r3, [r7, #8]
800780e: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007810: 68bb ldr r3, [r7, #8]
8007812: 6a1a ldr r2, [r3, #32]
8007814: 68bb ldr r3, [r7, #8]
8007816: 691b ldr r3, [r3, #16]
8007818: 429a cmp r2, r3
800781a: d30b bcc.n 8007834 <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
800781c: 68bb ldr r3, [r7, #8]
800781e: 691b ldr r3, [r3, #16]
8007820: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007824: 68bb ldr r3, [r7, #8]
8007826: 6a1a ldr r2, [r3, #32]
8007828: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800782c: 1ad2 subs r2, r2, r3
800782e: 68bb ldr r3, [r7, #8]
8007830: 621a str r2, [r3, #32]
8007832: e017 b.n 8007864 <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
8007834: 68bb ldr r3, [r7, #8]
8007836: 6a1b ldr r3, [r3, #32]
8007838: 2b00 cmp r3, #0
800783a: d108 bne.n 800784e <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
800783c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007840: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007844: 68bb ldr r3, [r7, #8]
8007846: 2200 movs r2, #0
8007848: f883 2024 strb.w r2, [r3, #36] @ 0x24
800784c: e00a b.n 8007864 <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
800784e: 68bb ldr r3, [r7, #8]
8007850: 6a1b ldr r3, [r3, #32]
8007852: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007856: 68bb ldr r3, [r7, #8]
8007858: 2200 movs r2, #0
800785a: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
800785c: 68bb ldr r3, [r7, #8]
800785e: 2200 movs r2, #0
8007860: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007864: 68fb ldr r3, [r7, #12]
8007866: 681b ldr r3, [r3, #0]
8007868: 657b str r3, [r7, #84] @ 0x54
800786a: 68bb ldr r3, [r7, #8]
800786c: 785b ldrb r3, [r3, #1]
800786e: 2b00 cmp r3, #0
8007870: d165 bne.n 800793e <HAL_PCD_EP_DB_Transmit+0x750>
8007872: 68fb ldr r3, [r7, #12]
8007874: 681b ldr r3, [r3, #0]
8007876: 65fb str r3, [r7, #92] @ 0x5c
8007878: 68fb ldr r3, [r7, #12]
800787a: 681b ldr r3, [r3, #0]
800787c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007880: b29b uxth r3, r3
8007882: 461a mov r2, r3
8007884: 6dfb ldr r3, [r7, #92] @ 0x5c
8007886: 4413 add r3, r2
8007888: 65fb str r3, [r7, #92] @ 0x5c
800788a: 68bb ldr r3, [r7, #8]
800788c: 781b ldrb r3, [r3, #0]
800788e: 011a lsls r2, r3, #4
8007890: 6dfb ldr r3, [r7, #92] @ 0x5c
8007892: 4413 add r3, r2
8007894: f203 430c addw r3, r3, #1036 @ 0x40c
8007898: 65bb str r3, [r7, #88] @ 0x58
800789a: 6dbb ldr r3, [r7, #88] @ 0x58
800789c: 881b ldrh r3, [r3, #0]
800789e: b29b uxth r3, r3
80078a0: f3c3 0309 ubfx r3, r3, #0, #10
80078a4: b29a uxth r2, r3
80078a6: 6dbb ldr r3, [r7, #88] @ 0x58
80078a8: 801a strh r2, [r3, #0]
80078aa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078ae: 2b3e cmp r3, #62 @ 0x3e
80078b0: d91d bls.n 80078ee <HAL_PCD_EP_DB_Transmit+0x700>
80078b2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078b6: 095b lsrs r3, r3, #5
80078b8: 66bb str r3, [r7, #104] @ 0x68
80078ba: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078be: f003 031f and.w r3, r3, #31
80078c2: 2b00 cmp r3, #0
80078c4: d102 bne.n 80078cc <HAL_PCD_EP_DB_Transmit+0x6de>
80078c6: 6ebb ldr r3, [r7, #104] @ 0x68
80078c8: 3b01 subs r3, #1
80078ca: 66bb str r3, [r7, #104] @ 0x68
80078cc: 6dbb ldr r3, [r7, #88] @ 0x58
80078ce: 881b ldrh r3, [r3, #0]
80078d0: b29a uxth r2, r3
80078d2: 6ebb ldr r3, [r7, #104] @ 0x68
80078d4: b29b uxth r3, r3
80078d6: 029b lsls r3, r3, #10
80078d8: b29b uxth r3, r3
80078da: 4313 orrs r3, r2
80078dc: b29b uxth r3, r3
80078de: ea6f 4343 mvn.w r3, r3, lsl #17
80078e2: ea6f 4353 mvn.w r3, r3, lsr #17
80078e6: b29a uxth r2, r3
80078e8: 6dbb ldr r3, [r7, #88] @ 0x58
80078ea: 801a strh r2, [r3, #0]
80078ec: e041 b.n 8007972 <HAL_PCD_EP_DB_Transmit+0x784>
80078ee: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078f2: 2b00 cmp r3, #0
80078f4: d10a bne.n 800790c <HAL_PCD_EP_DB_Transmit+0x71e>
80078f6: 6dbb ldr r3, [r7, #88] @ 0x58
80078f8: 881b ldrh r3, [r3, #0]
80078fa: b29b uxth r3, r3
80078fc: ea6f 4343 mvn.w r3, r3, lsl #17
8007900: ea6f 4353 mvn.w r3, r3, lsr #17
8007904: b29a uxth r2, r3
8007906: 6dbb ldr r3, [r7, #88] @ 0x58
8007908: 801a strh r2, [r3, #0]
800790a: e032 b.n 8007972 <HAL_PCD_EP_DB_Transmit+0x784>
800790c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007910: 085b lsrs r3, r3, #1
8007912: 66bb str r3, [r7, #104] @ 0x68
8007914: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007918: f003 0301 and.w r3, r3, #1
800791c: 2b00 cmp r3, #0
800791e: d002 beq.n 8007926 <HAL_PCD_EP_DB_Transmit+0x738>
8007920: 6ebb ldr r3, [r7, #104] @ 0x68
8007922: 3301 adds r3, #1
8007924: 66bb str r3, [r7, #104] @ 0x68
8007926: 6dbb ldr r3, [r7, #88] @ 0x58
8007928: 881b ldrh r3, [r3, #0]
800792a: b29a uxth r2, r3
800792c: 6ebb ldr r3, [r7, #104] @ 0x68
800792e: b29b uxth r3, r3
8007930: 029b lsls r3, r3, #10
8007932: b29b uxth r3, r3
8007934: 4313 orrs r3, r2
8007936: b29a uxth r2, r3
8007938: 6dbb ldr r3, [r7, #88] @ 0x58
800793a: 801a strh r2, [r3, #0]
800793c: e019 b.n 8007972 <HAL_PCD_EP_DB_Transmit+0x784>
800793e: 68bb ldr r3, [r7, #8]
8007940: 785b ldrb r3, [r3, #1]
8007942: 2b01 cmp r3, #1
8007944: d115 bne.n 8007972 <HAL_PCD_EP_DB_Transmit+0x784>
8007946: 68fb ldr r3, [r7, #12]
8007948: 681b ldr r3, [r3, #0]
800794a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800794e: b29b uxth r3, r3
8007950: 461a mov r2, r3
8007952: 6d7b ldr r3, [r7, #84] @ 0x54
8007954: 4413 add r3, r2
8007956: 657b str r3, [r7, #84] @ 0x54
8007958: 68bb ldr r3, [r7, #8]
800795a: 781b ldrb r3, [r3, #0]
800795c: 011a lsls r2, r3, #4
800795e: 6d7b ldr r3, [r7, #84] @ 0x54
8007960: 4413 add r3, r2
8007962: f203 430c addw r3, r3, #1036 @ 0x40c
8007966: 653b str r3, [r7, #80] @ 0x50
8007968: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800796c: b29a uxth r2, r3
800796e: 6d3b ldr r3, [r7, #80] @ 0x50
8007970: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8007972: 68fb ldr r3, [r7, #12]
8007974: 6818 ldr r0, [r3, #0]
8007976: 68bb ldr r3, [r7, #8]
8007978: 6959 ldr r1, [r3, #20]
800797a: 68bb ldr r3, [r7, #8]
800797c: 895a ldrh r2, [r3, #10]
800797e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007982: b29b uxth r3, r3
8007984: f004 f8cb bl 800bb1e <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8007988: 68fb ldr r3, [r7, #12]
800798a: 681b ldr r3, [r3, #0]
800798c: 461a mov r2, r3
800798e: 68bb ldr r3, [r7, #8]
8007990: 781b ldrb r3, [r3, #0]
8007992: 009b lsls r3, r3, #2
8007994: 4413 add r3, r2
8007996: 881b ldrh r3, [r3, #0]
8007998: b29b uxth r3, r3
800799a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800799e: f023 0340 bic.w r3, r3, #64 @ 0x40
80079a2: 82bb strh r3, [r7, #20]
80079a4: 8abb ldrh r3, [r7, #20]
80079a6: f083 0310 eor.w r3, r3, #16
80079aa: 82bb strh r3, [r7, #20]
80079ac: 8abb ldrh r3, [r7, #20]
80079ae: f083 0320 eor.w r3, r3, #32
80079b2: 82bb strh r3, [r7, #20]
80079b4: 68fb ldr r3, [r7, #12]
80079b6: 681b ldr r3, [r3, #0]
80079b8: 461a mov r2, r3
80079ba: 68bb ldr r3, [r7, #8]
80079bc: 781b ldrb r3, [r3, #0]
80079be: 009b lsls r3, r3, #2
80079c0: 441a add r2, r3
80079c2: 8abb ldrh r3, [r7, #20]
80079c4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80079c8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80079cc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80079d0: f043 0380 orr.w r3, r3, #128 @ 0x80
80079d4: b29b uxth r3, r3
80079d6: 8013 strh r3, [r2, #0]
return HAL_OK;
80079d8: 2300 movs r3, #0
}
80079da: 4618 mov r0, r3
80079dc: 3790 adds r7, #144 @ 0x90
80079de: 46bd mov sp, r7
80079e0: bd80 pop {r7, pc}
080079e2 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
80079e2: b480 push {r7}
80079e4: b087 sub sp, #28
80079e6: af00 add r7, sp, #0
80079e8: 60f8 str r0, [r7, #12]
80079ea: 607b str r3, [r7, #4]
80079ec: 460b mov r3, r1
80079ee: 817b strh r3, [r7, #10]
80079f0: 4613 mov r3, r2
80079f2: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
80079f4: 897b ldrh r3, [r7, #10]
80079f6: f003 0380 and.w r3, r3, #128 @ 0x80
80079fa: b29b uxth r3, r3
80079fc: 2b00 cmp r3, #0
80079fe: d00b beq.n 8007a18 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8007a00: 897b ldrh r3, [r7, #10]
8007a02: f003 0207 and.w r2, r3, #7
8007a06: 4613 mov r3, r2
8007a08: 009b lsls r3, r3, #2
8007a0a: 4413 add r3, r2
8007a0c: 00db lsls r3, r3, #3
8007a0e: 3310 adds r3, #16
8007a10: 68fa ldr r2, [r7, #12]
8007a12: 4413 add r3, r2
8007a14: 617b str r3, [r7, #20]
8007a16: e009 b.n 8007a2c <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8007a18: 897a ldrh r2, [r7, #10]
8007a1a: 4613 mov r3, r2
8007a1c: 009b lsls r3, r3, #2
8007a1e: 4413 add r3, r2
8007a20: 00db lsls r3, r3, #3
8007a22: f503 73a8 add.w r3, r3, #336 @ 0x150
8007a26: 68fa ldr r2, [r7, #12]
8007a28: 4413 add r3, r2
8007a2a: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8007a2c: 893b ldrh r3, [r7, #8]
8007a2e: 2b00 cmp r3, #0
8007a30: d107 bne.n 8007a42 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8007a32: 697b ldr r3, [r7, #20]
8007a34: 2200 movs r2, #0
8007a36: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8007a38: 687b ldr r3, [r7, #4]
8007a3a: b29a uxth r2, r3
8007a3c: 697b ldr r3, [r7, #20]
8007a3e: 80da strh r2, [r3, #6]
8007a40: e00b b.n 8007a5a <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8007a42: 697b ldr r3, [r7, #20]
8007a44: 2201 movs r2, #1
8007a46: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8007a48: 687b ldr r3, [r7, #4]
8007a4a: b29a uxth r2, r3
8007a4c: 697b ldr r3, [r7, #20]
8007a4e: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8007a50: 687b ldr r3, [r7, #4]
8007a52: 0c1b lsrs r3, r3, #16
8007a54: b29a uxth r2, r3
8007a56: 697b ldr r3, [r7, #20]
8007a58: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8007a5a: 2300 movs r3, #0
}
8007a5c: 4618 mov r0, r3
8007a5e: 371c adds r7, #28
8007a60: 46bd mov sp, r7
8007a62: bc80 pop {r7}
8007a64: 4770 bx lr
...
08007a68 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8007a68: b580 push {r7, lr}
8007a6a: b086 sub sp, #24
8007a6c: af00 add r7, sp, #0
8007a6e: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8007a70: 687b ldr r3, [r7, #4]
8007a72: 2b00 cmp r3, #0
8007a74: d101 bne.n 8007a7a <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8007a76: 2301 movs r3, #1
8007a78: e272 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8007a7a: 687b ldr r3, [r7, #4]
8007a7c: 681b ldr r3, [r3, #0]
8007a7e: f003 0301 and.w r3, r3, #1
8007a82: 2b00 cmp r3, #0
8007a84: f000 8087 beq.w 8007b96 <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8007a88: 4b92 ldr r3, [pc, #584] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007a8a: 685b ldr r3, [r3, #4]
8007a8c: f003 030c and.w r3, r3, #12
8007a90: 2b04 cmp r3, #4
8007a92: d00c beq.n 8007aae <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
8007a94: 4b8f ldr r3, [pc, #572] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007a96: 685b ldr r3, [r3, #4]
8007a98: f003 030c and.w r3, r3, #12
8007a9c: 2b08 cmp r3, #8
8007a9e: d112 bne.n 8007ac6 <HAL_RCC_OscConfig+0x5e>
8007aa0: 4b8c ldr r3, [pc, #560] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007aa2: 685b ldr r3, [r3, #4]
8007aa4: f403 3380 and.w r3, r3, #65536 @ 0x10000
8007aa8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8007aac: d10b bne.n 8007ac6 <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8007aae: 4b89 ldr r3, [pc, #548] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007ab0: 681b ldr r3, [r3, #0]
8007ab2: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007ab6: 2b00 cmp r3, #0
8007ab8: d06c beq.n 8007b94 <HAL_RCC_OscConfig+0x12c>
8007aba: 687b ldr r3, [r7, #4]
8007abc: 685b ldr r3, [r3, #4]
8007abe: 2b00 cmp r3, #0
8007ac0: d168 bne.n 8007b94 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
8007ac2: 2301 movs r3, #1
8007ac4: e24c b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8007ac6: 687b ldr r3, [r7, #4]
8007ac8: 685b ldr r3, [r3, #4]
8007aca: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8007ace: d106 bne.n 8007ade <HAL_RCC_OscConfig+0x76>
8007ad0: 4b80 ldr r3, [pc, #512] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007ad2: 681b ldr r3, [r3, #0]
8007ad4: 4a7f ldr r2, [pc, #508] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007ad6: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8007ada: 6013 str r3, [r2, #0]
8007adc: e02e b.n 8007b3c <HAL_RCC_OscConfig+0xd4>
8007ade: 687b ldr r3, [r7, #4]
8007ae0: 685b ldr r3, [r3, #4]
8007ae2: 2b00 cmp r3, #0
8007ae4: d10c bne.n 8007b00 <HAL_RCC_OscConfig+0x98>
8007ae6: 4b7b ldr r3, [pc, #492] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007ae8: 681b ldr r3, [r3, #0]
8007aea: 4a7a ldr r2, [pc, #488] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007aec: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8007af0: 6013 str r3, [r2, #0]
8007af2: 4b78 ldr r3, [pc, #480] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007af4: 681b ldr r3, [r3, #0]
8007af6: 4a77 ldr r2, [pc, #476] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007af8: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8007afc: 6013 str r3, [r2, #0]
8007afe: e01d b.n 8007b3c <HAL_RCC_OscConfig+0xd4>
8007b00: 687b ldr r3, [r7, #4]
8007b02: 685b ldr r3, [r3, #4]
8007b04: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
8007b08: d10c bne.n 8007b24 <HAL_RCC_OscConfig+0xbc>
8007b0a: 4b72 ldr r3, [pc, #456] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b0c: 681b ldr r3, [r3, #0]
8007b0e: 4a71 ldr r2, [pc, #452] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b10: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8007b14: 6013 str r3, [r2, #0]
8007b16: 4b6f ldr r3, [pc, #444] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b18: 681b ldr r3, [r3, #0]
8007b1a: 4a6e ldr r2, [pc, #440] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b1c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8007b20: 6013 str r3, [r2, #0]
8007b22: e00b b.n 8007b3c <HAL_RCC_OscConfig+0xd4>
8007b24: 4b6b ldr r3, [pc, #428] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b26: 681b ldr r3, [r3, #0]
8007b28: 4a6a ldr r2, [pc, #424] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b2a: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8007b2e: 6013 str r3, [r2, #0]
8007b30: 4b68 ldr r3, [pc, #416] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b32: 681b ldr r3, [r3, #0]
8007b34: 4a67 ldr r2, [pc, #412] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b36: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8007b3a: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8007b3c: 687b ldr r3, [r7, #4]
8007b3e: 685b ldr r3, [r3, #4]
8007b40: 2b00 cmp r3, #0
8007b42: d013 beq.n 8007b6c <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007b44: f7fc ffa4 bl 8004a90 <HAL_GetTick>
8007b48: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8007b4a: e008 b.n 8007b5e <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8007b4c: f7fc ffa0 bl 8004a90 <HAL_GetTick>
8007b50: 4602 mov r2, r0
8007b52: 693b ldr r3, [r7, #16]
8007b54: 1ad3 subs r3, r2, r3
8007b56: 2b64 cmp r3, #100 @ 0x64
8007b58: d901 bls.n 8007b5e <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8007b5a: 2303 movs r3, #3
8007b5c: e200 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8007b5e: 4b5d ldr r3, [pc, #372] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b60: 681b ldr r3, [r3, #0]
8007b62: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007b66: 2b00 cmp r3, #0
8007b68: d0f0 beq.n 8007b4c <HAL_RCC_OscConfig+0xe4>
8007b6a: e014 b.n 8007b96 <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007b6c: f7fc ff90 bl 8004a90 <HAL_GetTick>
8007b70: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8007b72: e008 b.n 8007b86 <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8007b74: f7fc ff8c bl 8004a90 <HAL_GetTick>
8007b78: 4602 mov r2, r0
8007b7a: 693b ldr r3, [r7, #16]
8007b7c: 1ad3 subs r3, r2, r3
8007b7e: 2b64 cmp r3, #100 @ 0x64
8007b80: d901 bls.n 8007b86 <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
8007b82: 2303 movs r3, #3
8007b84: e1ec b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8007b86: 4b53 ldr r3, [pc, #332] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007b88: 681b ldr r3, [r3, #0]
8007b8a: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007b8e: 2b00 cmp r3, #0
8007b90: d1f0 bne.n 8007b74 <HAL_RCC_OscConfig+0x10c>
8007b92: e000 b.n 8007b96 <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8007b94: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8007b96: 687b ldr r3, [r7, #4]
8007b98: 681b ldr r3, [r3, #0]
8007b9a: f003 0302 and.w r3, r3, #2
8007b9e: 2b00 cmp r3, #0
8007ba0: d063 beq.n 8007c6a <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
8007ba2: 4b4c ldr r3, [pc, #304] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007ba4: 685b ldr r3, [r3, #4]
8007ba6: f003 030c and.w r3, r3, #12
8007baa: 2b00 cmp r3, #0
8007bac: d00b beq.n 8007bc6 <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
8007bae: 4b49 ldr r3, [pc, #292] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007bb0: 685b ldr r3, [r3, #4]
8007bb2: f003 030c and.w r3, r3, #12
8007bb6: 2b08 cmp r3, #8
8007bb8: d11c bne.n 8007bf4 <HAL_RCC_OscConfig+0x18c>
8007bba: 4b46 ldr r3, [pc, #280] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007bbc: 685b ldr r3, [r3, #4]
8007bbe: f403 3380 and.w r3, r3, #65536 @ 0x10000
8007bc2: 2b00 cmp r3, #0
8007bc4: d116 bne.n 8007bf4 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8007bc6: 4b43 ldr r3, [pc, #268] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007bc8: 681b ldr r3, [r3, #0]
8007bca: f003 0302 and.w r3, r3, #2
8007bce: 2b00 cmp r3, #0
8007bd0: d005 beq.n 8007bde <HAL_RCC_OscConfig+0x176>
8007bd2: 687b ldr r3, [r7, #4]
8007bd4: 691b ldr r3, [r3, #16]
8007bd6: 2b01 cmp r3, #1
8007bd8: d001 beq.n 8007bde <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
8007bda: 2301 movs r3, #1
8007bdc: e1c0 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8007bde: 4b3d ldr r3, [pc, #244] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007be0: 681b ldr r3, [r3, #0]
8007be2: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8007be6: 687b ldr r3, [r7, #4]
8007be8: 695b ldr r3, [r3, #20]
8007bea: 00db lsls r3, r3, #3
8007bec: 4939 ldr r1, [pc, #228] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007bee: 4313 orrs r3, r2
8007bf0: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8007bf2: e03a b.n 8007c6a <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8007bf4: 687b ldr r3, [r7, #4]
8007bf6: 691b ldr r3, [r3, #16]
8007bf8: 2b00 cmp r3, #0
8007bfa: d020 beq.n 8007c3e <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8007bfc: 4b36 ldr r3, [pc, #216] @ (8007cd8 <HAL_RCC_OscConfig+0x270>)
8007bfe: 2201 movs r2, #1
8007c00: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007c02: f7fc ff45 bl 8004a90 <HAL_GetTick>
8007c06: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8007c08: e008 b.n 8007c1c <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8007c0a: f7fc ff41 bl 8004a90 <HAL_GetTick>
8007c0e: 4602 mov r2, r0
8007c10: 693b ldr r3, [r7, #16]
8007c12: 1ad3 subs r3, r2, r3
8007c14: 2b02 cmp r3, #2
8007c16: d901 bls.n 8007c1c <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8007c18: 2303 movs r3, #3
8007c1a: e1a1 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8007c1c: 4b2d ldr r3, [pc, #180] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007c1e: 681b ldr r3, [r3, #0]
8007c20: f003 0302 and.w r3, r3, #2
8007c24: 2b00 cmp r3, #0
8007c26: d0f0 beq.n 8007c0a <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8007c28: 4b2a ldr r3, [pc, #168] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007c2a: 681b ldr r3, [r3, #0]
8007c2c: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8007c30: 687b ldr r3, [r7, #4]
8007c32: 695b ldr r3, [r3, #20]
8007c34: 00db lsls r3, r3, #3
8007c36: 4927 ldr r1, [pc, #156] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007c38: 4313 orrs r3, r2
8007c3a: 600b str r3, [r1, #0]
8007c3c: e015 b.n 8007c6a <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8007c3e: 4b26 ldr r3, [pc, #152] @ (8007cd8 <HAL_RCC_OscConfig+0x270>)
8007c40: 2200 movs r2, #0
8007c42: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007c44: f7fc ff24 bl 8004a90 <HAL_GetTick>
8007c48: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8007c4a: e008 b.n 8007c5e <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8007c4c: f7fc ff20 bl 8004a90 <HAL_GetTick>
8007c50: 4602 mov r2, r0
8007c52: 693b ldr r3, [r7, #16]
8007c54: 1ad3 subs r3, r2, r3
8007c56: 2b02 cmp r3, #2
8007c58: d901 bls.n 8007c5e <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
8007c5a: 2303 movs r3, #3
8007c5c: e180 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8007c5e: 4b1d ldr r3, [pc, #116] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007c60: 681b ldr r3, [r3, #0]
8007c62: f003 0302 and.w r3, r3, #2
8007c66: 2b00 cmp r3, #0
8007c68: d1f0 bne.n 8007c4c <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8007c6a: 687b ldr r3, [r7, #4]
8007c6c: 681b ldr r3, [r3, #0]
8007c6e: f003 0308 and.w r3, r3, #8
8007c72: 2b00 cmp r3, #0
8007c74: d03a beq.n 8007cec <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8007c76: 687b ldr r3, [r7, #4]
8007c78: 699b ldr r3, [r3, #24]
8007c7a: 2b00 cmp r3, #0
8007c7c: d019 beq.n 8007cb2 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8007c7e: 4b17 ldr r3, [pc, #92] @ (8007cdc <HAL_RCC_OscConfig+0x274>)
8007c80: 2201 movs r2, #1
8007c82: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007c84: f7fc ff04 bl 8004a90 <HAL_GetTick>
8007c88: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8007c8a: e008 b.n 8007c9e <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8007c8c: f7fc ff00 bl 8004a90 <HAL_GetTick>
8007c90: 4602 mov r2, r0
8007c92: 693b ldr r3, [r7, #16]
8007c94: 1ad3 subs r3, r2, r3
8007c96: 2b02 cmp r3, #2
8007c98: d901 bls.n 8007c9e <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
8007c9a: 2303 movs r3, #3
8007c9c: e160 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8007c9e: 4b0d ldr r3, [pc, #52] @ (8007cd4 <HAL_RCC_OscConfig+0x26c>)
8007ca0: 6a5b ldr r3, [r3, #36] @ 0x24
8007ca2: f003 0302 and.w r3, r3, #2
8007ca6: 2b00 cmp r3, #0
8007ca8: d0f0 beq.n 8007c8c <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
8007caa: 2001 movs r0, #1
8007cac: f000 fad0 bl 8008250 <RCC_Delay>
8007cb0: e01c b.n 8007cec <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8007cb2: 4b0a ldr r3, [pc, #40] @ (8007cdc <HAL_RCC_OscConfig+0x274>)
8007cb4: 2200 movs r2, #0
8007cb6: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007cb8: f7fc feea bl 8004a90 <HAL_GetTick>
8007cbc: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8007cbe: e00f b.n 8007ce0 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8007cc0: f7fc fee6 bl 8004a90 <HAL_GetTick>
8007cc4: 4602 mov r2, r0
8007cc6: 693b ldr r3, [r7, #16]
8007cc8: 1ad3 subs r3, r2, r3
8007cca: 2b02 cmp r3, #2
8007ccc: d908 bls.n 8007ce0 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
8007cce: 2303 movs r3, #3
8007cd0: e146 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
8007cd2: bf00 nop
8007cd4: 40021000 .word 0x40021000
8007cd8: 42420000 .word 0x42420000
8007cdc: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8007ce0: 4b92 ldr r3, [pc, #584] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007ce2: 6a5b ldr r3, [r3, #36] @ 0x24
8007ce4: f003 0302 and.w r3, r3, #2
8007ce8: 2b00 cmp r3, #0
8007cea: d1e9 bne.n 8007cc0 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8007cec: 687b ldr r3, [r7, #4]
8007cee: 681b ldr r3, [r3, #0]
8007cf0: f003 0304 and.w r3, r3, #4
8007cf4: 2b00 cmp r3, #0
8007cf6: f000 80a6 beq.w 8007e46 <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
8007cfa: 2300 movs r3, #0
8007cfc: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8007cfe: 4b8b ldr r3, [pc, #556] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d00: 69db ldr r3, [r3, #28]
8007d02: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8007d06: 2b00 cmp r3, #0
8007d08: d10d bne.n 8007d26 <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
8007d0a: 4b88 ldr r3, [pc, #544] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d0c: 69db ldr r3, [r3, #28]
8007d0e: 4a87 ldr r2, [pc, #540] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d10: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8007d14: 61d3 str r3, [r2, #28]
8007d16: 4b85 ldr r3, [pc, #532] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d18: 69db ldr r3, [r3, #28]
8007d1a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8007d1e: 60bb str r3, [r7, #8]
8007d20: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8007d22: 2301 movs r3, #1
8007d24: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007d26: 4b82 ldr r3, [pc, #520] @ (8007f30 <HAL_RCC_OscConfig+0x4c8>)
8007d28: 681b ldr r3, [r3, #0]
8007d2a: f403 7380 and.w r3, r3, #256 @ 0x100
8007d2e: 2b00 cmp r3, #0
8007d30: d118 bne.n 8007d64 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8007d32: 4b7f ldr r3, [pc, #508] @ (8007f30 <HAL_RCC_OscConfig+0x4c8>)
8007d34: 681b ldr r3, [r3, #0]
8007d36: 4a7e ldr r2, [pc, #504] @ (8007f30 <HAL_RCC_OscConfig+0x4c8>)
8007d38: f443 7380 orr.w r3, r3, #256 @ 0x100
8007d3c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8007d3e: f7fc fea7 bl 8004a90 <HAL_GetTick>
8007d42: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007d44: e008 b.n 8007d58 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8007d46: f7fc fea3 bl 8004a90 <HAL_GetTick>
8007d4a: 4602 mov r2, r0
8007d4c: 693b ldr r3, [r7, #16]
8007d4e: 1ad3 subs r3, r2, r3
8007d50: 2b64 cmp r3, #100 @ 0x64
8007d52: d901 bls.n 8007d58 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8007d54: 2303 movs r3, #3
8007d56: e103 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007d58: 4b75 ldr r3, [pc, #468] @ (8007f30 <HAL_RCC_OscConfig+0x4c8>)
8007d5a: 681b ldr r3, [r3, #0]
8007d5c: f403 7380 and.w r3, r3, #256 @ 0x100
8007d60: 2b00 cmp r3, #0
8007d62: d0f0 beq.n 8007d46 <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8007d64: 687b ldr r3, [r7, #4]
8007d66: 68db ldr r3, [r3, #12]
8007d68: 2b01 cmp r3, #1
8007d6a: d106 bne.n 8007d7a <HAL_RCC_OscConfig+0x312>
8007d6c: 4b6f ldr r3, [pc, #444] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d6e: 6a1b ldr r3, [r3, #32]
8007d70: 4a6e ldr r2, [pc, #440] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d72: f043 0301 orr.w r3, r3, #1
8007d76: 6213 str r3, [r2, #32]
8007d78: e02d b.n 8007dd6 <HAL_RCC_OscConfig+0x36e>
8007d7a: 687b ldr r3, [r7, #4]
8007d7c: 68db ldr r3, [r3, #12]
8007d7e: 2b00 cmp r3, #0
8007d80: d10c bne.n 8007d9c <HAL_RCC_OscConfig+0x334>
8007d82: 4b6a ldr r3, [pc, #424] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d84: 6a1b ldr r3, [r3, #32]
8007d86: 4a69 ldr r2, [pc, #420] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d88: f023 0301 bic.w r3, r3, #1
8007d8c: 6213 str r3, [r2, #32]
8007d8e: 4b67 ldr r3, [pc, #412] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d90: 6a1b ldr r3, [r3, #32]
8007d92: 4a66 ldr r2, [pc, #408] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007d94: f023 0304 bic.w r3, r3, #4
8007d98: 6213 str r3, [r2, #32]
8007d9a: e01c b.n 8007dd6 <HAL_RCC_OscConfig+0x36e>
8007d9c: 687b ldr r3, [r7, #4]
8007d9e: 68db ldr r3, [r3, #12]
8007da0: 2b05 cmp r3, #5
8007da2: d10c bne.n 8007dbe <HAL_RCC_OscConfig+0x356>
8007da4: 4b61 ldr r3, [pc, #388] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007da6: 6a1b ldr r3, [r3, #32]
8007da8: 4a60 ldr r2, [pc, #384] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007daa: f043 0304 orr.w r3, r3, #4
8007dae: 6213 str r3, [r2, #32]
8007db0: 4b5e ldr r3, [pc, #376] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007db2: 6a1b ldr r3, [r3, #32]
8007db4: 4a5d ldr r2, [pc, #372] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007db6: f043 0301 orr.w r3, r3, #1
8007dba: 6213 str r3, [r2, #32]
8007dbc: e00b b.n 8007dd6 <HAL_RCC_OscConfig+0x36e>
8007dbe: 4b5b ldr r3, [pc, #364] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007dc0: 6a1b ldr r3, [r3, #32]
8007dc2: 4a5a ldr r2, [pc, #360] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007dc4: f023 0301 bic.w r3, r3, #1
8007dc8: 6213 str r3, [r2, #32]
8007dca: 4b58 ldr r3, [pc, #352] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007dcc: 6a1b ldr r3, [r3, #32]
8007dce: 4a57 ldr r2, [pc, #348] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007dd0: f023 0304 bic.w r3, r3, #4
8007dd4: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8007dd6: 687b ldr r3, [r7, #4]
8007dd8: 68db ldr r3, [r3, #12]
8007dda: 2b00 cmp r3, #0
8007ddc: d015 beq.n 8007e0a <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007dde: f7fc fe57 bl 8004a90 <HAL_GetTick>
8007de2: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8007de4: e00a b.n 8007dfc <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8007de6: f7fc fe53 bl 8004a90 <HAL_GetTick>
8007dea: 4602 mov r2, r0
8007dec: 693b ldr r3, [r7, #16]
8007dee: 1ad3 subs r3, r2, r3
8007df0: f241 3288 movw r2, #5000 @ 0x1388
8007df4: 4293 cmp r3, r2
8007df6: d901 bls.n 8007dfc <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8007df8: 2303 movs r3, #3
8007dfa: e0b1 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8007dfc: 4b4b ldr r3, [pc, #300] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007dfe: 6a1b ldr r3, [r3, #32]
8007e00: f003 0302 and.w r3, r3, #2
8007e04: 2b00 cmp r3, #0
8007e06: d0ee beq.n 8007de6 <HAL_RCC_OscConfig+0x37e>
8007e08: e014 b.n 8007e34 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007e0a: f7fc fe41 bl 8004a90 <HAL_GetTick>
8007e0e: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8007e10: e00a b.n 8007e28 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8007e12: f7fc fe3d bl 8004a90 <HAL_GetTick>
8007e16: 4602 mov r2, r0
8007e18: 693b ldr r3, [r7, #16]
8007e1a: 1ad3 subs r3, r2, r3
8007e1c: f241 3288 movw r2, #5000 @ 0x1388
8007e20: 4293 cmp r3, r2
8007e22: d901 bls.n 8007e28 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8007e24: 2303 movs r3, #3
8007e26: e09b b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8007e28: 4b40 ldr r3, [pc, #256] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007e2a: 6a1b ldr r3, [r3, #32]
8007e2c: f003 0302 and.w r3, r3, #2
8007e30: 2b00 cmp r3, #0
8007e32: d1ee bne.n 8007e12 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8007e34: 7dfb ldrb r3, [r7, #23]
8007e36: 2b01 cmp r3, #1
8007e38: d105 bne.n 8007e46 <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
8007e3a: 4b3c ldr r3, [pc, #240] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007e3c: 69db ldr r3, [r3, #28]
8007e3e: 4a3b ldr r2, [pc, #236] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007e40: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8007e44: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8007e46: 687b ldr r3, [r7, #4]
8007e48: 69db ldr r3, [r3, #28]
8007e4a: 2b00 cmp r3, #0
8007e4c: f000 8087 beq.w 8007f5e <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8007e50: 4b36 ldr r3, [pc, #216] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007e52: 685b ldr r3, [r3, #4]
8007e54: f003 030c and.w r3, r3, #12
8007e58: 2b08 cmp r3, #8
8007e5a: d061 beq.n 8007f20 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8007e5c: 687b ldr r3, [r7, #4]
8007e5e: 69db ldr r3, [r3, #28]
8007e60: 2b02 cmp r3, #2
8007e62: d146 bne.n 8007ef2 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8007e64: 4b33 ldr r3, [pc, #204] @ (8007f34 <HAL_RCC_OscConfig+0x4cc>)
8007e66: 2200 movs r2, #0
8007e68: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007e6a: f7fc fe11 bl 8004a90 <HAL_GetTick>
8007e6e: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007e70: e008 b.n 8007e84 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8007e72: f7fc fe0d bl 8004a90 <HAL_GetTick>
8007e76: 4602 mov r2, r0
8007e78: 693b ldr r3, [r7, #16]
8007e7a: 1ad3 subs r3, r2, r3
8007e7c: 2b02 cmp r3, #2
8007e7e: d901 bls.n 8007e84 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
8007e80: 2303 movs r3, #3
8007e82: e06d b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007e84: 4b29 ldr r3, [pc, #164] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007e86: 681b ldr r3, [r3, #0]
8007e88: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007e8c: 2b00 cmp r3, #0
8007e8e: d1f0 bne.n 8007e72 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
8007e90: 687b ldr r3, [r7, #4]
8007e92: 6a1b ldr r3, [r3, #32]
8007e94: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8007e98: d108 bne.n 8007eac <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
8007e9a: 4b24 ldr r3, [pc, #144] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007e9c: 685b ldr r3, [r3, #4]
8007e9e: f423 3200 bic.w r2, r3, #131072 @ 0x20000
8007ea2: 687b ldr r3, [r7, #4]
8007ea4: 689b ldr r3, [r3, #8]
8007ea6: 4921 ldr r1, [pc, #132] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007ea8: 4313 orrs r3, r2
8007eaa: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8007eac: 4b1f ldr r3, [pc, #124] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007eae: 685b ldr r3, [r3, #4]
8007eb0: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
8007eb4: 687b ldr r3, [r7, #4]
8007eb6: 6a19 ldr r1, [r3, #32]
8007eb8: 687b ldr r3, [r7, #4]
8007eba: 6a5b ldr r3, [r3, #36] @ 0x24
8007ebc: 430b orrs r3, r1
8007ebe: 491b ldr r1, [pc, #108] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007ec0: 4313 orrs r3, r2
8007ec2: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8007ec4: 4b1b ldr r3, [pc, #108] @ (8007f34 <HAL_RCC_OscConfig+0x4cc>)
8007ec6: 2201 movs r2, #1
8007ec8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007eca: f7fc fde1 bl 8004a90 <HAL_GetTick>
8007ece: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8007ed0: e008 b.n 8007ee4 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8007ed2: f7fc fddd bl 8004a90 <HAL_GetTick>
8007ed6: 4602 mov r2, r0
8007ed8: 693b ldr r3, [r7, #16]
8007eda: 1ad3 subs r3, r2, r3
8007edc: 2b02 cmp r3, #2
8007ede: d901 bls.n 8007ee4 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8007ee0: 2303 movs r3, #3
8007ee2: e03d b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8007ee4: 4b11 ldr r3, [pc, #68] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007ee6: 681b ldr r3, [r3, #0]
8007ee8: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007eec: 2b00 cmp r3, #0
8007eee: d0f0 beq.n 8007ed2 <HAL_RCC_OscConfig+0x46a>
8007ef0: e035 b.n 8007f5e <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8007ef2: 4b10 ldr r3, [pc, #64] @ (8007f34 <HAL_RCC_OscConfig+0x4cc>)
8007ef4: 2200 movs r2, #0
8007ef6: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007ef8: f7fc fdca bl 8004a90 <HAL_GetTick>
8007efc: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007efe: e008 b.n 8007f12 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8007f00: f7fc fdc6 bl 8004a90 <HAL_GetTick>
8007f04: 4602 mov r2, r0
8007f06: 693b ldr r3, [r7, #16]
8007f08: 1ad3 subs r3, r2, r3
8007f0a: 2b02 cmp r3, #2
8007f0c: d901 bls.n 8007f12 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
8007f0e: 2303 movs r3, #3
8007f10: e026 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007f12: 4b06 ldr r3, [pc, #24] @ (8007f2c <HAL_RCC_OscConfig+0x4c4>)
8007f14: 681b ldr r3, [r3, #0]
8007f16: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007f1a: 2b00 cmp r3, #0
8007f1c: d1f0 bne.n 8007f00 <HAL_RCC_OscConfig+0x498>
8007f1e: e01e b.n 8007f5e <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8007f20: 687b ldr r3, [r7, #4]
8007f22: 69db ldr r3, [r3, #28]
8007f24: 2b01 cmp r3, #1
8007f26: d107 bne.n 8007f38 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8007f28: 2301 movs r3, #1
8007f2a: e019 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
8007f2c: 40021000 .word 0x40021000
8007f30: 40007000 .word 0x40007000
8007f34: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8007f38: 4b0b ldr r3, [pc, #44] @ (8007f68 <HAL_RCC_OscConfig+0x500>)
8007f3a: 685b ldr r3, [r3, #4]
8007f3c: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8007f3e: 68fb ldr r3, [r7, #12]
8007f40: f403 3280 and.w r2, r3, #65536 @ 0x10000
8007f44: 687b ldr r3, [r7, #4]
8007f46: 6a1b ldr r3, [r3, #32]
8007f48: 429a cmp r2, r3
8007f4a: d106 bne.n 8007f5a <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8007f4c: 68fb ldr r3, [r7, #12]
8007f4e: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
8007f52: 687b ldr r3, [r7, #4]
8007f54: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8007f56: 429a cmp r2, r3
8007f58: d001 beq.n 8007f5e <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8007f5a: 2301 movs r3, #1
8007f5c: e000 b.n 8007f60 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
8007f5e: 2300 movs r3, #0
}
8007f60: 4618 mov r0, r3
8007f62: 3718 adds r7, #24
8007f64: 46bd mov sp, r7
8007f66: bd80 pop {r7, pc}
8007f68: 40021000 .word 0x40021000
08007f6c <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8007f6c: b580 push {r7, lr}
8007f6e: b084 sub sp, #16
8007f70: af00 add r7, sp, #0
8007f72: 6078 str r0, [r7, #4]
8007f74: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8007f76: 687b ldr r3, [r7, #4]
8007f78: 2b00 cmp r3, #0
8007f7a: d101 bne.n 8007f80 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8007f7c: 2301 movs r3, #1
8007f7e: e0d0 b.n 8008122 <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8007f80: 4b6a ldr r3, [pc, #424] @ (800812c <HAL_RCC_ClockConfig+0x1c0>)
8007f82: 681b ldr r3, [r3, #0]
8007f84: f003 0307 and.w r3, r3, #7
8007f88: 683a ldr r2, [r7, #0]
8007f8a: 429a cmp r2, r3
8007f8c: d910 bls.n 8007fb0 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8007f8e: 4b67 ldr r3, [pc, #412] @ (800812c <HAL_RCC_ClockConfig+0x1c0>)
8007f90: 681b ldr r3, [r3, #0]
8007f92: f023 0207 bic.w r2, r3, #7
8007f96: 4965 ldr r1, [pc, #404] @ (800812c <HAL_RCC_ClockConfig+0x1c0>)
8007f98: 683b ldr r3, [r7, #0]
8007f9a: 4313 orrs r3, r2
8007f9c: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8007f9e: 4b63 ldr r3, [pc, #396] @ (800812c <HAL_RCC_ClockConfig+0x1c0>)
8007fa0: 681b ldr r3, [r3, #0]
8007fa2: f003 0307 and.w r3, r3, #7
8007fa6: 683a ldr r2, [r7, #0]
8007fa8: 429a cmp r2, r3
8007faa: d001 beq.n 8007fb0 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8007fac: 2301 movs r3, #1
8007fae: e0b8 b.n 8008122 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8007fb0: 687b ldr r3, [r7, #4]
8007fb2: 681b ldr r3, [r3, #0]
8007fb4: f003 0302 and.w r3, r3, #2
8007fb8: 2b00 cmp r3, #0
8007fba: d020 beq.n 8007ffe <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8007fbc: 687b ldr r3, [r7, #4]
8007fbe: 681b ldr r3, [r3, #0]
8007fc0: f003 0304 and.w r3, r3, #4
8007fc4: 2b00 cmp r3, #0
8007fc6: d005 beq.n 8007fd4 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8007fc8: 4b59 ldr r3, [pc, #356] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8007fca: 685b ldr r3, [r3, #4]
8007fcc: 4a58 ldr r2, [pc, #352] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8007fce: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8007fd2: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8007fd4: 687b ldr r3, [r7, #4]
8007fd6: 681b ldr r3, [r3, #0]
8007fd8: f003 0308 and.w r3, r3, #8
8007fdc: 2b00 cmp r3, #0
8007fde: d005 beq.n 8007fec <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8007fe0: 4b53 ldr r3, [pc, #332] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8007fe2: 685b ldr r3, [r3, #4]
8007fe4: 4a52 ldr r2, [pc, #328] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8007fe6: f443 5360 orr.w r3, r3, #14336 @ 0x3800
8007fea: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8007fec: 4b50 ldr r3, [pc, #320] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8007fee: 685b ldr r3, [r3, #4]
8007ff0: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8007ff4: 687b ldr r3, [r7, #4]
8007ff6: 689b ldr r3, [r3, #8]
8007ff8: 494d ldr r1, [pc, #308] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8007ffa: 4313 orrs r3, r2
8007ffc: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8007ffe: 687b ldr r3, [r7, #4]
8008000: 681b ldr r3, [r3, #0]
8008002: f003 0301 and.w r3, r3, #1
8008006: 2b00 cmp r3, #0
8008008: d040 beq.n 800808c <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800800a: 687b ldr r3, [r7, #4]
800800c: 685b ldr r3, [r3, #4]
800800e: 2b01 cmp r3, #1
8008010: d107 bne.n 8008022 <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8008012: 4b47 ldr r3, [pc, #284] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8008014: 681b ldr r3, [r3, #0]
8008016: f403 3300 and.w r3, r3, #131072 @ 0x20000
800801a: 2b00 cmp r3, #0
800801c: d115 bne.n 800804a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800801e: 2301 movs r3, #1
8008020: e07f b.n 8008122 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8008022: 687b ldr r3, [r7, #4]
8008024: 685b ldr r3, [r3, #4]
8008026: 2b02 cmp r3, #2
8008028: d107 bne.n 800803a <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800802a: 4b41 ldr r3, [pc, #260] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
800802c: 681b ldr r3, [r3, #0]
800802e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8008032: 2b00 cmp r3, #0
8008034: d109 bne.n 800804a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8008036: 2301 movs r3, #1
8008038: e073 b.n 8008122 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800803a: 4b3d ldr r3, [pc, #244] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
800803c: 681b ldr r3, [r3, #0]
800803e: f003 0302 and.w r3, r3, #2
8008042: 2b00 cmp r3, #0
8008044: d101 bne.n 800804a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8008046: 2301 movs r3, #1
8008048: e06b b.n 8008122 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
800804a: 4b39 ldr r3, [pc, #228] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
800804c: 685b ldr r3, [r3, #4]
800804e: f023 0203 bic.w r2, r3, #3
8008052: 687b ldr r3, [r7, #4]
8008054: 685b ldr r3, [r3, #4]
8008056: 4936 ldr r1, [pc, #216] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8008058: 4313 orrs r3, r2
800805a: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
800805c: f7fc fd18 bl 8004a90 <HAL_GetTick>
8008060: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8008062: e00a b.n 800807a <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8008064: f7fc fd14 bl 8004a90 <HAL_GetTick>
8008068: 4602 mov r2, r0
800806a: 68fb ldr r3, [r7, #12]
800806c: 1ad3 subs r3, r2, r3
800806e: f241 3288 movw r2, #5000 @ 0x1388
8008072: 4293 cmp r3, r2
8008074: d901 bls.n 800807a <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8008076: 2303 movs r3, #3
8008078: e053 b.n 8008122 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800807a: 4b2d ldr r3, [pc, #180] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
800807c: 685b ldr r3, [r3, #4]
800807e: f003 020c and.w r2, r3, #12
8008082: 687b ldr r3, [r7, #4]
8008084: 685b ldr r3, [r3, #4]
8008086: 009b lsls r3, r3, #2
8008088: 429a cmp r2, r3
800808a: d1eb bne.n 8008064 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
800808c: 4b27 ldr r3, [pc, #156] @ (800812c <HAL_RCC_ClockConfig+0x1c0>)
800808e: 681b ldr r3, [r3, #0]
8008090: f003 0307 and.w r3, r3, #7
8008094: 683a ldr r2, [r7, #0]
8008096: 429a cmp r2, r3
8008098: d210 bcs.n 80080bc <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800809a: 4b24 ldr r3, [pc, #144] @ (800812c <HAL_RCC_ClockConfig+0x1c0>)
800809c: 681b ldr r3, [r3, #0]
800809e: f023 0207 bic.w r2, r3, #7
80080a2: 4922 ldr r1, [pc, #136] @ (800812c <HAL_RCC_ClockConfig+0x1c0>)
80080a4: 683b ldr r3, [r7, #0]
80080a6: 4313 orrs r3, r2
80080a8: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80080aa: 4b20 ldr r3, [pc, #128] @ (800812c <HAL_RCC_ClockConfig+0x1c0>)
80080ac: 681b ldr r3, [r3, #0]
80080ae: f003 0307 and.w r3, r3, #7
80080b2: 683a ldr r2, [r7, #0]
80080b4: 429a cmp r2, r3
80080b6: d001 beq.n 80080bc <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
80080b8: 2301 movs r3, #1
80080ba: e032 b.n 8008122 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80080bc: 687b ldr r3, [r7, #4]
80080be: 681b ldr r3, [r3, #0]
80080c0: f003 0304 and.w r3, r3, #4
80080c4: 2b00 cmp r3, #0
80080c6: d008 beq.n 80080da <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80080c8: 4b19 ldr r3, [pc, #100] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
80080ca: 685b ldr r3, [r3, #4]
80080cc: f423 62e0 bic.w r2, r3, #1792 @ 0x700
80080d0: 687b ldr r3, [r7, #4]
80080d2: 68db ldr r3, [r3, #12]
80080d4: 4916 ldr r1, [pc, #88] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
80080d6: 4313 orrs r3, r2
80080d8: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80080da: 687b ldr r3, [r7, #4]
80080dc: 681b ldr r3, [r3, #0]
80080de: f003 0308 and.w r3, r3, #8
80080e2: 2b00 cmp r3, #0
80080e4: d009 beq.n 80080fa <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
80080e6: 4b12 ldr r3, [pc, #72] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
80080e8: 685b ldr r3, [r3, #4]
80080ea: f423 5260 bic.w r2, r3, #14336 @ 0x3800
80080ee: 687b ldr r3, [r7, #4]
80080f0: 691b ldr r3, [r3, #16]
80080f2: 00db lsls r3, r3, #3
80080f4: 490e ldr r1, [pc, #56] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
80080f6: 4313 orrs r3, r2
80080f8: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
80080fa: f000 f821 bl 8008140 <HAL_RCC_GetSysClockFreq>
80080fe: 4602 mov r2, r0
8008100: 4b0b ldr r3, [pc, #44] @ (8008130 <HAL_RCC_ClockConfig+0x1c4>)
8008102: 685b ldr r3, [r3, #4]
8008104: 091b lsrs r3, r3, #4
8008106: f003 030f and.w r3, r3, #15
800810a: 490a ldr r1, [pc, #40] @ (8008134 <HAL_RCC_ClockConfig+0x1c8>)
800810c: 5ccb ldrb r3, [r1, r3]
800810e: fa22 f303 lsr.w r3, r2, r3
8008112: 4a09 ldr r2, [pc, #36] @ (8008138 <HAL_RCC_ClockConfig+0x1cc>)
8008114: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8008116: 4b09 ldr r3, [pc, #36] @ (800813c <HAL_RCC_ClockConfig+0x1d0>)
8008118: 681b ldr r3, [r3, #0]
800811a: 4618 mov r0, r3
800811c: f7fc fc76 bl 8004a0c <HAL_InitTick>
return HAL_OK;
8008120: 2300 movs r3, #0
}
8008122: 4618 mov r0, r3
8008124: 3710 adds r7, #16
8008126: 46bd mov sp, r7
8008128: bd80 pop {r7, pc}
800812a: bf00 nop
800812c: 40022000 .word 0x40022000
8008130: 40021000 .word 0x40021000
8008134: 0800ec7c .word 0x0800ec7c
8008138: 20000010 .word 0x20000010
800813c: 20000014 .word 0x20000014
08008140 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8008140: b480 push {r7}
8008142: b087 sub sp, #28
8008144: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8008146: 2300 movs r3, #0
8008148: 60fb str r3, [r7, #12]
800814a: 2300 movs r3, #0
800814c: 60bb str r3, [r7, #8]
800814e: 2300 movs r3, #0
8008150: 617b str r3, [r7, #20]
8008152: 2300 movs r3, #0
8008154: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
8008156: 2300 movs r3, #0
8008158: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
800815a: 4b1e ldr r3, [pc, #120] @ (80081d4 <HAL_RCC_GetSysClockFreq+0x94>)
800815c: 685b ldr r3, [r3, #4]
800815e: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8008160: 68fb ldr r3, [r7, #12]
8008162: f003 030c and.w r3, r3, #12
8008166: 2b04 cmp r3, #4
8008168: d002 beq.n 8008170 <HAL_RCC_GetSysClockFreq+0x30>
800816a: 2b08 cmp r3, #8
800816c: d003 beq.n 8008176 <HAL_RCC_GetSysClockFreq+0x36>
800816e: e027 b.n 80081c0 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8008170: 4b19 ldr r3, [pc, #100] @ (80081d8 <HAL_RCC_GetSysClockFreq+0x98>)
8008172: 613b str r3, [r7, #16]
break;
8008174: e027 b.n 80081c6 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
8008176: 68fb ldr r3, [r7, #12]
8008178: 0c9b lsrs r3, r3, #18
800817a: f003 030f and.w r3, r3, #15
800817e: 4a17 ldr r2, [pc, #92] @ (80081dc <HAL_RCC_GetSysClockFreq+0x9c>)
8008180: 5cd3 ldrb r3, [r2, r3]
8008182: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
8008184: 68fb ldr r3, [r7, #12]
8008186: f403 3380 and.w r3, r3, #65536 @ 0x10000
800818a: 2b00 cmp r3, #0
800818c: d010 beq.n 80081b0 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
800818e: 4b11 ldr r3, [pc, #68] @ (80081d4 <HAL_RCC_GetSysClockFreq+0x94>)
8008190: 685b ldr r3, [r3, #4]
8008192: 0c5b lsrs r3, r3, #17
8008194: f003 0301 and.w r3, r3, #1
8008198: 4a11 ldr r2, [pc, #68] @ (80081e0 <HAL_RCC_GetSysClockFreq+0xa0>)
800819a: 5cd3 ldrb r3, [r2, r3]
800819c: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
800819e: 687b ldr r3, [r7, #4]
80081a0: 4a0d ldr r2, [pc, #52] @ (80081d8 <HAL_RCC_GetSysClockFreq+0x98>)
80081a2: fb03 f202 mul.w r2, r3, r2
80081a6: 68bb ldr r3, [r7, #8]
80081a8: fbb2 f3f3 udiv r3, r2, r3
80081ac: 617b str r3, [r7, #20]
80081ae: e004 b.n 80081ba <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
80081b0: 687b ldr r3, [r7, #4]
80081b2: 4a0c ldr r2, [pc, #48] @ (80081e4 <HAL_RCC_GetSysClockFreq+0xa4>)
80081b4: fb02 f303 mul.w r3, r2, r3
80081b8: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
80081ba: 697b ldr r3, [r7, #20]
80081bc: 613b str r3, [r7, #16]
break;
80081be: e002 b.n 80081c6 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
80081c0: 4b09 ldr r3, [pc, #36] @ (80081e8 <HAL_RCC_GetSysClockFreq+0xa8>)
80081c2: 613b str r3, [r7, #16]
break;
80081c4: bf00 nop
}
}
return sysclockfreq;
80081c6: 693b ldr r3, [r7, #16]
}
80081c8: 4618 mov r0, r3
80081ca: 371c adds r7, #28
80081cc: 46bd mov sp, r7
80081ce: bc80 pop {r7}
80081d0: 4770 bx lr
80081d2: bf00 nop
80081d4: 40021000 .word 0x40021000
80081d8: 00b71b00 .word 0x00b71b00
80081dc: 0800ec94 .word 0x0800ec94
80081e0: 0800eca4 .word 0x0800eca4
80081e4: 003d0900 .word 0x003d0900
80081e8: 007a1200 .word 0x007a1200
080081ec <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
80081ec: b480 push {r7}
80081ee: af00 add r7, sp, #0
return SystemCoreClock;
80081f0: 4b02 ldr r3, [pc, #8] @ (80081fc <HAL_RCC_GetHCLKFreq+0x10>)
80081f2: 681b ldr r3, [r3, #0]
}
80081f4: 4618 mov r0, r3
80081f6: 46bd mov sp, r7
80081f8: bc80 pop {r7}
80081fa: 4770 bx lr
80081fc: 20000010 .word 0x20000010
08008200 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8008200: b580 push {r7, lr}
8008202: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8008204: f7ff fff2 bl 80081ec <HAL_RCC_GetHCLKFreq>
8008208: 4602 mov r2, r0
800820a: 4b05 ldr r3, [pc, #20] @ (8008220 <HAL_RCC_GetPCLK1Freq+0x20>)
800820c: 685b ldr r3, [r3, #4]
800820e: 0a1b lsrs r3, r3, #8
8008210: f003 0307 and.w r3, r3, #7
8008214: 4903 ldr r1, [pc, #12] @ (8008224 <HAL_RCC_GetPCLK1Freq+0x24>)
8008216: 5ccb ldrb r3, [r1, r3]
8008218: fa22 f303 lsr.w r3, r2, r3
}
800821c: 4618 mov r0, r3
800821e: bd80 pop {r7, pc}
8008220: 40021000 .word 0x40021000
8008224: 0800ec8c .word 0x0800ec8c
08008228 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8008228: b580 push {r7, lr}
800822a: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
800822c: f7ff ffde bl 80081ec <HAL_RCC_GetHCLKFreq>
8008230: 4602 mov r2, r0
8008232: 4b05 ldr r3, [pc, #20] @ (8008248 <HAL_RCC_GetPCLK2Freq+0x20>)
8008234: 685b ldr r3, [r3, #4]
8008236: 0adb lsrs r3, r3, #11
8008238: f003 0307 and.w r3, r3, #7
800823c: 4903 ldr r1, [pc, #12] @ (800824c <HAL_RCC_GetPCLK2Freq+0x24>)
800823e: 5ccb ldrb r3, [r1, r3]
8008240: fa22 f303 lsr.w r3, r2, r3
}
8008244: 4618 mov r0, r3
8008246: bd80 pop {r7, pc}
8008248: 40021000 .word 0x40021000
800824c: 0800ec8c .word 0x0800ec8c
08008250 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8008250: b480 push {r7}
8008252: b085 sub sp, #20
8008254: af00 add r7, sp, #0
8008256: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8008258: 4b0a ldr r3, [pc, #40] @ (8008284 <RCC_Delay+0x34>)
800825a: 681b ldr r3, [r3, #0]
800825c: 4a0a ldr r2, [pc, #40] @ (8008288 <RCC_Delay+0x38>)
800825e: fba2 2303 umull r2, r3, r2, r3
8008262: 0a5b lsrs r3, r3, #9
8008264: 687a ldr r2, [r7, #4]
8008266: fb02 f303 mul.w r3, r2, r3
800826a: 60fb str r3, [r7, #12]
do
{
__NOP();
800826c: bf00 nop
}
while (Delay --);
800826e: 68fb ldr r3, [r7, #12]
8008270: 1e5a subs r2, r3, #1
8008272: 60fa str r2, [r7, #12]
8008274: 2b00 cmp r3, #0
8008276: d1f9 bne.n 800826c <RCC_Delay+0x1c>
}
8008278: bf00 nop
800827a: bf00 nop
800827c: 3714 adds r7, #20
800827e: 46bd mov sp, r7
8008280: bc80 pop {r7}
8008282: 4770 bx lr
8008284: 20000010 .word 0x20000010
8008288: 10624dd3 .word 0x10624dd3
0800828c <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
800828c: b580 push {r7, lr}
800828e: b086 sub sp, #24
8008290: af00 add r7, sp, #0
8008292: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8008294: 2300 movs r3, #0
8008296: 613b str r3, [r7, #16]
8008298: 2300 movs r3, #0
800829a: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
800829c: 687b ldr r3, [r7, #4]
800829e: 681b ldr r3, [r3, #0]
80082a0: f003 0301 and.w r3, r3, #1
80082a4: 2b00 cmp r3, #0
80082a6: d07d beq.n 80083a4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
80082a8: 2300 movs r3, #0
80082aa: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80082ac: 4b4f ldr r3, [pc, #316] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
80082ae: 69db ldr r3, [r3, #28]
80082b0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80082b4: 2b00 cmp r3, #0
80082b6: d10d bne.n 80082d4 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
80082b8: 4b4c ldr r3, [pc, #304] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
80082ba: 69db ldr r3, [r3, #28]
80082bc: 4a4b ldr r2, [pc, #300] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
80082be: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80082c2: 61d3 str r3, [r2, #28]
80082c4: 4b49 ldr r3, [pc, #292] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
80082c6: 69db ldr r3, [r3, #28]
80082c8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80082cc: 60bb str r3, [r7, #8]
80082ce: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
80082d0: 2301 movs r3, #1
80082d2: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80082d4: 4b46 ldr r3, [pc, #280] @ (80083f0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80082d6: 681b ldr r3, [r3, #0]
80082d8: f403 7380 and.w r3, r3, #256 @ 0x100
80082dc: 2b00 cmp r3, #0
80082de: d118 bne.n 8008312 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
80082e0: 4b43 ldr r3, [pc, #268] @ (80083f0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80082e2: 681b ldr r3, [r3, #0]
80082e4: 4a42 ldr r2, [pc, #264] @ (80083f0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80082e6: f443 7380 orr.w r3, r3, #256 @ 0x100
80082ea: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
80082ec: f7fc fbd0 bl 8004a90 <HAL_GetTick>
80082f0: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80082f2: e008 b.n 8008306 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
80082f4: f7fc fbcc bl 8004a90 <HAL_GetTick>
80082f8: 4602 mov r2, r0
80082fa: 693b ldr r3, [r7, #16]
80082fc: 1ad3 subs r3, r2, r3
80082fe: 2b64 cmp r3, #100 @ 0x64
8008300: d901 bls.n 8008306 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8008302: 2303 movs r3, #3
8008304: e06d b.n 80083e2 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008306: 4b3a ldr r3, [pc, #232] @ (80083f0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008308: 681b ldr r3, [r3, #0]
800830a: f403 7380 and.w r3, r3, #256 @ 0x100
800830e: 2b00 cmp r3, #0
8008310: d0f0 beq.n 80082f4 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8008312: 4b36 ldr r3, [pc, #216] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008314: 6a1b ldr r3, [r3, #32]
8008316: f403 7340 and.w r3, r3, #768 @ 0x300
800831a: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
800831c: 68fb ldr r3, [r7, #12]
800831e: 2b00 cmp r3, #0
8008320: d02e beq.n 8008380 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8008322: 687b ldr r3, [r7, #4]
8008324: 685b ldr r3, [r3, #4]
8008326: f403 7340 and.w r3, r3, #768 @ 0x300
800832a: 68fa ldr r2, [r7, #12]
800832c: 429a cmp r2, r3
800832e: d027 beq.n 8008380 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8008330: 4b2e ldr r3, [pc, #184] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008332: 6a1b ldr r3, [r3, #32]
8008334: f423 7340 bic.w r3, r3, #768 @ 0x300
8008338: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800833a: 4b2e ldr r3, [pc, #184] @ (80083f4 <HAL_RCCEx_PeriphCLKConfig+0x168>)
800833c: 2201 movs r2, #1
800833e: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8008340: 4b2c ldr r3, [pc, #176] @ (80083f4 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8008342: 2200 movs r2, #0
8008344: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8008346: 4a29 ldr r2, [pc, #164] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008348: 68fb ldr r3, [r7, #12]
800834a: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
800834c: 68fb ldr r3, [r7, #12]
800834e: f003 0301 and.w r3, r3, #1
8008352: 2b00 cmp r3, #0
8008354: d014 beq.n 8008380 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008356: f7fc fb9b bl 8004a90 <HAL_GetTick>
800835a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800835c: e00a b.n 8008374 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800835e: f7fc fb97 bl 8004a90 <HAL_GetTick>
8008362: 4602 mov r2, r0
8008364: 693b ldr r3, [r7, #16]
8008366: 1ad3 subs r3, r2, r3
8008368: f241 3288 movw r2, #5000 @ 0x1388
800836c: 4293 cmp r3, r2
800836e: d901 bls.n 8008374 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8008370: 2303 movs r3, #3
8008372: e036 b.n 80083e2 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008374: 4b1d ldr r3, [pc, #116] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008376: 6a1b ldr r3, [r3, #32]
8008378: f003 0302 and.w r3, r3, #2
800837c: 2b00 cmp r3, #0
800837e: d0ee beq.n 800835e <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8008380: 4b1a ldr r3, [pc, #104] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008382: 6a1b ldr r3, [r3, #32]
8008384: f423 7240 bic.w r2, r3, #768 @ 0x300
8008388: 687b ldr r3, [r7, #4]
800838a: 685b ldr r3, [r3, #4]
800838c: 4917 ldr r1, [pc, #92] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
800838e: 4313 orrs r3, r2
8008390: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8008392: 7dfb ldrb r3, [r7, #23]
8008394: 2b01 cmp r3, #1
8008396: d105 bne.n 80083a4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8008398: 4b14 ldr r3, [pc, #80] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
800839a: 69db ldr r3, [r3, #28]
800839c: 4a13 ldr r2, [pc, #76] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
800839e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
80083a2: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
80083a4: 687b ldr r3, [r7, #4]
80083a6: 681b ldr r3, [r3, #0]
80083a8: f003 0302 and.w r3, r3, #2
80083ac: 2b00 cmp r3, #0
80083ae: d008 beq.n 80083c2 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
80083b0: 4b0e ldr r3, [pc, #56] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
80083b2: 685b ldr r3, [r3, #4]
80083b4: f423 4240 bic.w r2, r3, #49152 @ 0xc000
80083b8: 687b ldr r3, [r7, #4]
80083ba: 689b ldr r3, [r3, #8]
80083bc: 490b ldr r1, [pc, #44] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
80083be: 4313 orrs r3, r2
80083c0: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
80083c2: 687b ldr r3, [r7, #4]
80083c4: 681b ldr r3, [r3, #0]
80083c6: f003 0310 and.w r3, r3, #16
80083ca: 2b00 cmp r3, #0
80083cc: d008 beq.n 80083e0 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
80083ce: 4b07 ldr r3, [pc, #28] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
80083d0: 685b ldr r3, [r3, #4]
80083d2: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
80083d6: 687b ldr r3, [r7, #4]
80083d8: 68db ldr r3, [r3, #12]
80083da: 4904 ldr r1, [pc, #16] @ (80083ec <HAL_RCCEx_PeriphCLKConfig+0x160>)
80083dc: 4313 orrs r3, r2
80083de: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
80083e0: 2300 movs r3, #0
}
80083e2: 4618 mov r0, r3
80083e4: 3718 adds r7, #24
80083e6: 46bd mov sp, r7
80083e8: bd80 pop {r7, pc}
80083ea: bf00 nop
80083ec: 40021000 .word 0x40021000
80083f0: 40007000 .word 0x40007000
80083f4: 42420440 .word 0x42420440
080083f8 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
80083f8: b580 push {r7, lr}
80083fa: b082 sub sp, #8
80083fc: af00 add r7, sp, #0
80083fe: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008400: 687b ldr r3, [r7, #4]
8008402: 2b00 cmp r3, #0
8008404: d101 bne.n 800840a <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8008406: 2301 movs r3, #1
8008408: e041 b.n 800848e <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
800840a: 687b ldr r3, [r7, #4]
800840c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008410: b2db uxtb r3, r3
8008412: 2b00 cmp r3, #0
8008414: d106 bne.n 8008424 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008416: 687b ldr r3, [r7, #4]
8008418: 2200 movs r2, #0
800841a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
800841e: 6878 ldr r0, [r7, #4]
8008420: f7fc f96a bl 80046f8 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008424: 687b ldr r3, [r7, #4]
8008426: 2202 movs r2, #2
8008428: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
800842c: 687b ldr r3, [r7, #4]
800842e: 681a ldr r2, [r3, #0]
8008430: 687b ldr r3, [r7, #4]
8008432: 3304 adds r3, #4
8008434: 4619 mov r1, r3
8008436: 4610 mov r0, r2
8008438: f000 fb3e bl 8008ab8 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
800843c: 687b ldr r3, [r7, #4]
800843e: 2201 movs r2, #1
8008440: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008444: 687b ldr r3, [r7, #4]
8008446: 2201 movs r2, #1
8008448: f883 203e strb.w r2, [r3, #62] @ 0x3e
800844c: 687b ldr r3, [r7, #4]
800844e: 2201 movs r2, #1
8008450: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008454: 687b ldr r3, [r7, #4]
8008456: 2201 movs r2, #1
8008458: f883 2040 strb.w r2, [r3, #64] @ 0x40
800845c: 687b ldr r3, [r7, #4]
800845e: 2201 movs r2, #1
8008460: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008464: 687b ldr r3, [r7, #4]
8008466: 2201 movs r2, #1
8008468: f883 2042 strb.w r2, [r3, #66] @ 0x42
800846c: 687b ldr r3, [r7, #4]
800846e: 2201 movs r2, #1
8008470: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008474: 687b ldr r3, [r7, #4]
8008476: 2201 movs r2, #1
8008478: f883 2044 strb.w r2, [r3, #68] @ 0x44
800847c: 687b ldr r3, [r7, #4]
800847e: 2201 movs r2, #1
8008480: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008484: 687b ldr r3, [r7, #4]
8008486: 2201 movs r2, #1
8008488: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800848c: 2300 movs r3, #0
}
800848e: 4618 mov r0, r3
8008490: 3708 adds r7, #8
8008492: 46bd mov sp, r7
8008494: bd80 pop {r7, pc}
08008496 <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8008496: b580 push {r7, lr}
8008498: b082 sub sp, #8
800849a: af00 add r7, sp, #0
800849c: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
800849e: 687b ldr r3, [r7, #4]
80084a0: 2b00 cmp r3, #0
80084a2: d101 bne.n 80084a8 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
80084a4: 2301 movs r3, #1
80084a6: e041 b.n 800852c <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
80084a8: 687b ldr r3, [r7, #4]
80084aa: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
80084ae: b2db uxtb r3, r3
80084b0: 2b00 cmp r3, #0
80084b2: d106 bne.n 80084c2 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
80084b4: 687b ldr r3, [r7, #4]
80084b6: 2200 movs r2, #0
80084b8: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
80084bc: 6878 ldr r0, [r7, #4]
80084be: f000 f839 bl 8008534 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
80084c2: 687b ldr r3, [r7, #4]
80084c4: 2202 movs r2, #2
80084c6: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
80084ca: 687b ldr r3, [r7, #4]
80084cc: 681a ldr r2, [r3, #0]
80084ce: 687b ldr r3, [r7, #4]
80084d0: 3304 adds r3, #4
80084d2: 4619 mov r1, r3
80084d4: 4610 mov r0, r2
80084d6: f000 faef bl 8008ab8 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
80084da: 687b ldr r3, [r7, #4]
80084dc: 2201 movs r2, #1
80084de: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
80084e2: 687b ldr r3, [r7, #4]
80084e4: 2201 movs r2, #1
80084e6: f883 203e strb.w r2, [r3, #62] @ 0x3e
80084ea: 687b ldr r3, [r7, #4]
80084ec: 2201 movs r2, #1
80084ee: f883 203f strb.w r2, [r3, #63] @ 0x3f
80084f2: 687b ldr r3, [r7, #4]
80084f4: 2201 movs r2, #1
80084f6: f883 2040 strb.w r2, [r3, #64] @ 0x40
80084fa: 687b ldr r3, [r7, #4]
80084fc: 2201 movs r2, #1
80084fe: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008502: 687b ldr r3, [r7, #4]
8008504: 2201 movs r2, #1
8008506: f883 2042 strb.w r2, [r3, #66] @ 0x42
800850a: 687b ldr r3, [r7, #4]
800850c: 2201 movs r2, #1
800850e: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008512: 687b ldr r3, [r7, #4]
8008514: 2201 movs r2, #1
8008516: f883 2044 strb.w r2, [r3, #68] @ 0x44
800851a: 687b ldr r3, [r7, #4]
800851c: 2201 movs r2, #1
800851e: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008522: 687b ldr r3, [r7, #4]
8008524: 2201 movs r2, #1
8008526: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800852a: 2300 movs r3, #0
}
800852c: 4618 mov r0, r3
800852e: 3708 adds r7, #8
8008530: 46bd mov sp, r7
8008532: bd80 pop {r7, pc}
08008534 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8008534: b480 push {r7}
8008536: b083 sub sp, #12
8008538: af00 add r7, sp, #0
800853a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
800853c: bf00 nop
800853e: 370c adds r7, #12
8008540: 46bd mov sp, r7
8008542: bc80 pop {r7}
8008544: 4770 bx lr
...
08008548 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008548: b580 push {r7, lr}
800854a: b084 sub sp, #16
800854c: af00 add r7, sp, #0
800854e: 6078 str r0, [r7, #4]
8008550: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8008552: 683b ldr r3, [r7, #0]
8008554: 2b00 cmp r3, #0
8008556: d109 bne.n 800856c <HAL_TIM_PWM_Start+0x24>
8008558: 687b ldr r3, [r7, #4]
800855a: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
800855e: b2db uxtb r3, r3
8008560: 2b01 cmp r3, #1
8008562: bf14 ite ne
8008564: 2301 movne r3, #1
8008566: 2300 moveq r3, #0
8008568: b2db uxtb r3, r3
800856a: e022 b.n 80085b2 <HAL_TIM_PWM_Start+0x6a>
800856c: 683b ldr r3, [r7, #0]
800856e: 2b04 cmp r3, #4
8008570: d109 bne.n 8008586 <HAL_TIM_PWM_Start+0x3e>
8008572: 687b ldr r3, [r7, #4]
8008574: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8008578: b2db uxtb r3, r3
800857a: 2b01 cmp r3, #1
800857c: bf14 ite ne
800857e: 2301 movne r3, #1
8008580: 2300 moveq r3, #0
8008582: b2db uxtb r3, r3
8008584: e015 b.n 80085b2 <HAL_TIM_PWM_Start+0x6a>
8008586: 683b ldr r3, [r7, #0]
8008588: 2b08 cmp r3, #8
800858a: d109 bne.n 80085a0 <HAL_TIM_PWM_Start+0x58>
800858c: 687b ldr r3, [r7, #4]
800858e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8008592: b2db uxtb r3, r3
8008594: 2b01 cmp r3, #1
8008596: bf14 ite ne
8008598: 2301 movne r3, #1
800859a: 2300 moveq r3, #0
800859c: b2db uxtb r3, r3
800859e: e008 b.n 80085b2 <HAL_TIM_PWM_Start+0x6a>
80085a0: 687b ldr r3, [r7, #4]
80085a2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80085a6: b2db uxtb r3, r3
80085a8: 2b01 cmp r3, #1
80085aa: bf14 ite ne
80085ac: 2301 movne r3, #1
80085ae: 2300 moveq r3, #0
80085b0: b2db uxtb r3, r3
80085b2: 2b00 cmp r3, #0
80085b4: d001 beq.n 80085ba <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
80085b6: 2301 movs r3, #1
80085b8: e05e b.n 8008678 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
80085ba: 683b ldr r3, [r7, #0]
80085bc: 2b00 cmp r3, #0
80085be: d104 bne.n 80085ca <HAL_TIM_PWM_Start+0x82>
80085c0: 687b ldr r3, [r7, #4]
80085c2: 2202 movs r2, #2
80085c4: f883 203e strb.w r2, [r3, #62] @ 0x3e
80085c8: e013 b.n 80085f2 <HAL_TIM_PWM_Start+0xaa>
80085ca: 683b ldr r3, [r7, #0]
80085cc: 2b04 cmp r3, #4
80085ce: d104 bne.n 80085da <HAL_TIM_PWM_Start+0x92>
80085d0: 687b ldr r3, [r7, #4]
80085d2: 2202 movs r2, #2
80085d4: f883 203f strb.w r2, [r3, #63] @ 0x3f
80085d8: e00b b.n 80085f2 <HAL_TIM_PWM_Start+0xaa>
80085da: 683b ldr r3, [r7, #0]
80085dc: 2b08 cmp r3, #8
80085de: d104 bne.n 80085ea <HAL_TIM_PWM_Start+0xa2>
80085e0: 687b ldr r3, [r7, #4]
80085e2: 2202 movs r2, #2
80085e4: f883 2040 strb.w r2, [r3, #64] @ 0x40
80085e8: e003 b.n 80085f2 <HAL_TIM_PWM_Start+0xaa>
80085ea: 687b ldr r3, [r7, #4]
80085ec: 2202 movs r2, #2
80085ee: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
80085f2: 687b ldr r3, [r7, #4]
80085f4: 681b ldr r3, [r3, #0]
80085f6: 2201 movs r2, #1
80085f8: 6839 ldr r1, [r7, #0]
80085fa: 4618 mov r0, r3
80085fc: f000 fce8 bl 8008fd0 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008600: 687b ldr r3, [r7, #4]
8008602: 681b ldr r3, [r3, #0]
8008604: 4a1e ldr r2, [pc, #120] @ (8008680 <HAL_TIM_PWM_Start+0x138>)
8008606: 4293 cmp r3, r2
8008608: d107 bne.n 800861a <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
800860a: 687b ldr r3, [r7, #4]
800860c: 681b ldr r3, [r3, #0]
800860e: 6c5a ldr r2, [r3, #68] @ 0x44
8008610: 687b ldr r3, [r7, #4]
8008612: 681b ldr r3, [r3, #0]
8008614: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8008618: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800861a: 687b ldr r3, [r7, #4]
800861c: 681b ldr r3, [r3, #0]
800861e: 4a18 ldr r2, [pc, #96] @ (8008680 <HAL_TIM_PWM_Start+0x138>)
8008620: 4293 cmp r3, r2
8008622: d00e beq.n 8008642 <HAL_TIM_PWM_Start+0xfa>
8008624: 687b ldr r3, [r7, #4]
8008626: 681b ldr r3, [r3, #0]
8008628: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800862c: d009 beq.n 8008642 <HAL_TIM_PWM_Start+0xfa>
800862e: 687b ldr r3, [r7, #4]
8008630: 681b ldr r3, [r3, #0]
8008632: 4a14 ldr r2, [pc, #80] @ (8008684 <HAL_TIM_PWM_Start+0x13c>)
8008634: 4293 cmp r3, r2
8008636: d004 beq.n 8008642 <HAL_TIM_PWM_Start+0xfa>
8008638: 687b ldr r3, [r7, #4]
800863a: 681b ldr r3, [r3, #0]
800863c: 4a12 ldr r2, [pc, #72] @ (8008688 <HAL_TIM_PWM_Start+0x140>)
800863e: 4293 cmp r3, r2
8008640: d111 bne.n 8008666 <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8008642: 687b ldr r3, [r7, #4]
8008644: 681b ldr r3, [r3, #0]
8008646: 689b ldr r3, [r3, #8]
8008648: f003 0307 and.w r3, r3, #7
800864c: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
800864e: 68fb ldr r3, [r7, #12]
8008650: 2b06 cmp r3, #6
8008652: d010 beq.n 8008676 <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8008654: 687b ldr r3, [r7, #4]
8008656: 681b ldr r3, [r3, #0]
8008658: 681a ldr r2, [r3, #0]
800865a: 687b ldr r3, [r7, #4]
800865c: 681b ldr r3, [r3, #0]
800865e: f042 0201 orr.w r2, r2, #1
8008662: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008664: e007 b.n 8008676 <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8008666: 687b ldr r3, [r7, #4]
8008668: 681b ldr r3, [r3, #0]
800866a: 681a ldr r2, [r3, #0]
800866c: 687b ldr r3, [r7, #4]
800866e: 681b ldr r3, [r3, #0]
8008670: f042 0201 orr.w r2, r2, #1
8008674: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8008676: 2300 movs r3, #0
}
8008678: 4618 mov r0, r3
800867a: 3710 adds r7, #16
800867c: 46bd mov sp, r7
800867e: bd80 pop {r7, pc}
8008680: 40012c00 .word 0x40012c00
8008684: 40000400 .word 0x40000400
8008688: 40000800 .word 0x40000800
0800868c <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
800868c: b580 push {r7, lr}
800868e: b082 sub sp, #8
8008690: af00 add r7, sp, #0
8008692: 6078 str r0, [r7, #4]
8008694: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
8008696: 687b ldr r3, [r7, #4]
8008698: 681b ldr r3, [r3, #0]
800869a: 2200 movs r2, #0
800869c: 6839 ldr r1, [r7, #0]
800869e: 4618 mov r0, r3
80086a0: f000 fc96 bl 8008fd0 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
80086a4: 687b ldr r3, [r7, #4]
80086a6: 681b ldr r3, [r3, #0]
80086a8: 4a29 ldr r2, [pc, #164] @ (8008750 <HAL_TIM_PWM_Stop+0xc4>)
80086aa: 4293 cmp r3, r2
80086ac: d117 bne.n 80086de <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
80086ae: 687b ldr r3, [r7, #4]
80086b0: 681b ldr r3, [r3, #0]
80086b2: 6a1a ldr r2, [r3, #32]
80086b4: f241 1311 movw r3, #4369 @ 0x1111
80086b8: 4013 ands r3, r2
80086ba: 2b00 cmp r3, #0
80086bc: d10f bne.n 80086de <HAL_TIM_PWM_Stop+0x52>
80086be: 687b ldr r3, [r7, #4]
80086c0: 681b ldr r3, [r3, #0]
80086c2: 6a1a ldr r2, [r3, #32]
80086c4: f240 4344 movw r3, #1092 @ 0x444
80086c8: 4013 ands r3, r2
80086ca: 2b00 cmp r3, #0
80086cc: d107 bne.n 80086de <HAL_TIM_PWM_Stop+0x52>
80086ce: 687b ldr r3, [r7, #4]
80086d0: 681b ldr r3, [r3, #0]
80086d2: 6c5a ldr r2, [r3, #68] @ 0x44
80086d4: 687b ldr r3, [r7, #4]
80086d6: 681b ldr r3, [r3, #0]
80086d8: f422 4200 bic.w r2, r2, #32768 @ 0x8000
80086dc: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
80086de: 687b ldr r3, [r7, #4]
80086e0: 681b ldr r3, [r3, #0]
80086e2: 6a1a ldr r2, [r3, #32]
80086e4: f241 1311 movw r3, #4369 @ 0x1111
80086e8: 4013 ands r3, r2
80086ea: 2b00 cmp r3, #0
80086ec: d10f bne.n 800870e <HAL_TIM_PWM_Stop+0x82>
80086ee: 687b ldr r3, [r7, #4]
80086f0: 681b ldr r3, [r3, #0]
80086f2: 6a1a ldr r2, [r3, #32]
80086f4: f240 4344 movw r3, #1092 @ 0x444
80086f8: 4013 ands r3, r2
80086fa: 2b00 cmp r3, #0
80086fc: d107 bne.n 800870e <HAL_TIM_PWM_Stop+0x82>
80086fe: 687b ldr r3, [r7, #4]
8008700: 681b ldr r3, [r3, #0]
8008702: 681a ldr r2, [r3, #0]
8008704: 687b ldr r3, [r7, #4]
8008706: 681b ldr r3, [r3, #0]
8008708: f022 0201 bic.w r2, r2, #1
800870c: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
800870e: 683b ldr r3, [r7, #0]
8008710: 2b00 cmp r3, #0
8008712: d104 bne.n 800871e <HAL_TIM_PWM_Stop+0x92>
8008714: 687b ldr r3, [r7, #4]
8008716: 2201 movs r2, #1
8008718: f883 203e strb.w r2, [r3, #62] @ 0x3e
800871c: e013 b.n 8008746 <HAL_TIM_PWM_Stop+0xba>
800871e: 683b ldr r3, [r7, #0]
8008720: 2b04 cmp r3, #4
8008722: d104 bne.n 800872e <HAL_TIM_PWM_Stop+0xa2>
8008724: 687b ldr r3, [r7, #4]
8008726: 2201 movs r2, #1
8008728: f883 203f strb.w r2, [r3, #63] @ 0x3f
800872c: e00b b.n 8008746 <HAL_TIM_PWM_Stop+0xba>
800872e: 683b ldr r3, [r7, #0]
8008730: 2b08 cmp r3, #8
8008732: d104 bne.n 800873e <HAL_TIM_PWM_Stop+0xb2>
8008734: 687b ldr r3, [r7, #4]
8008736: 2201 movs r2, #1
8008738: f883 2040 strb.w r2, [r3, #64] @ 0x40
800873c: e003 b.n 8008746 <HAL_TIM_PWM_Stop+0xba>
800873e: 687b ldr r3, [r7, #4]
8008740: 2201 movs r2, #1
8008742: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
8008746: 2300 movs r3, #0
}
8008748: 4618 mov r0, r3
800874a: 3708 adds r7, #8
800874c: 46bd mov sp, r7
800874e: bd80 pop {r7, pc}
8008750: 40012c00 .word 0x40012c00
08008754 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8008754: b580 push {r7, lr}
8008756: b086 sub sp, #24
8008758: af00 add r7, sp, #0
800875a: 60f8 str r0, [r7, #12]
800875c: 60b9 str r1, [r7, #8]
800875e: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8008760: 2300 movs r3, #0
8008762: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8008764: 68fb ldr r3, [r7, #12]
8008766: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800876a: 2b01 cmp r3, #1
800876c: d101 bne.n 8008772 <HAL_TIM_PWM_ConfigChannel+0x1e>
800876e: 2302 movs r3, #2
8008770: e0ae b.n 80088d0 <HAL_TIM_PWM_ConfigChannel+0x17c>
8008772: 68fb ldr r3, [r7, #12]
8008774: 2201 movs r2, #1
8008776: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
800877a: 687b ldr r3, [r7, #4]
800877c: 2b0c cmp r3, #12
800877e: f200 809f bhi.w 80088c0 <HAL_TIM_PWM_ConfigChannel+0x16c>
8008782: a201 add r2, pc, #4 @ (adr r2, 8008788 <HAL_TIM_PWM_ConfigChannel+0x34>)
8008784: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008788: 080087bd .word 0x080087bd
800878c: 080088c1 .word 0x080088c1
8008790: 080088c1 .word 0x080088c1
8008794: 080088c1 .word 0x080088c1
8008798: 080087fd .word 0x080087fd
800879c: 080088c1 .word 0x080088c1
80087a0: 080088c1 .word 0x080088c1
80087a4: 080088c1 .word 0x080088c1
80087a8: 0800883f .word 0x0800883f
80087ac: 080088c1 .word 0x080088c1
80087b0: 080088c1 .word 0x080088c1
80087b4: 080088c1 .word 0x080088c1
80087b8: 0800887f .word 0x0800887f
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
80087bc: 68fb ldr r3, [r7, #12]
80087be: 681b ldr r3, [r3, #0]
80087c0: 68b9 ldr r1, [r7, #8]
80087c2: 4618 mov r0, r3
80087c4: f000 f9e6 bl 8008b94 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
80087c8: 68fb ldr r3, [r7, #12]
80087ca: 681b ldr r3, [r3, #0]
80087cc: 699a ldr r2, [r3, #24]
80087ce: 68fb ldr r3, [r7, #12]
80087d0: 681b ldr r3, [r3, #0]
80087d2: f042 0208 orr.w r2, r2, #8
80087d6: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
80087d8: 68fb ldr r3, [r7, #12]
80087da: 681b ldr r3, [r3, #0]
80087dc: 699a ldr r2, [r3, #24]
80087de: 68fb ldr r3, [r7, #12]
80087e0: 681b ldr r3, [r3, #0]
80087e2: f022 0204 bic.w r2, r2, #4
80087e6: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
80087e8: 68fb ldr r3, [r7, #12]
80087ea: 681b ldr r3, [r3, #0]
80087ec: 6999 ldr r1, [r3, #24]
80087ee: 68bb ldr r3, [r7, #8]
80087f0: 691a ldr r2, [r3, #16]
80087f2: 68fb ldr r3, [r7, #12]
80087f4: 681b ldr r3, [r3, #0]
80087f6: 430a orrs r2, r1
80087f8: 619a str r2, [r3, #24]
break;
80087fa: e064 b.n 80088c6 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
80087fc: 68fb ldr r3, [r7, #12]
80087fe: 681b ldr r3, [r3, #0]
8008800: 68b9 ldr r1, [r7, #8]
8008802: 4618 mov r0, r3
8008804: f000 fa2c bl 8008c60 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8008808: 68fb ldr r3, [r7, #12]
800880a: 681b ldr r3, [r3, #0]
800880c: 699a ldr r2, [r3, #24]
800880e: 68fb ldr r3, [r7, #12]
8008810: 681b ldr r3, [r3, #0]
8008812: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008816: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8008818: 68fb ldr r3, [r7, #12]
800881a: 681b ldr r3, [r3, #0]
800881c: 699a ldr r2, [r3, #24]
800881e: 68fb ldr r3, [r7, #12]
8008820: 681b ldr r3, [r3, #0]
8008822: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008826: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8008828: 68fb ldr r3, [r7, #12]
800882a: 681b ldr r3, [r3, #0]
800882c: 6999 ldr r1, [r3, #24]
800882e: 68bb ldr r3, [r7, #8]
8008830: 691b ldr r3, [r3, #16]
8008832: 021a lsls r2, r3, #8
8008834: 68fb ldr r3, [r7, #12]
8008836: 681b ldr r3, [r3, #0]
8008838: 430a orrs r2, r1
800883a: 619a str r2, [r3, #24]
break;
800883c: e043 b.n 80088c6 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
800883e: 68fb ldr r3, [r7, #12]
8008840: 681b ldr r3, [r3, #0]
8008842: 68b9 ldr r1, [r7, #8]
8008844: 4618 mov r0, r3
8008846: f000 fa75 bl 8008d34 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
800884a: 68fb ldr r3, [r7, #12]
800884c: 681b ldr r3, [r3, #0]
800884e: 69da ldr r2, [r3, #28]
8008850: 68fb ldr r3, [r7, #12]
8008852: 681b ldr r3, [r3, #0]
8008854: f042 0208 orr.w r2, r2, #8
8008858: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
800885a: 68fb ldr r3, [r7, #12]
800885c: 681b ldr r3, [r3, #0]
800885e: 69da ldr r2, [r3, #28]
8008860: 68fb ldr r3, [r7, #12]
8008862: 681b ldr r3, [r3, #0]
8008864: f022 0204 bic.w r2, r2, #4
8008868: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
800886a: 68fb ldr r3, [r7, #12]
800886c: 681b ldr r3, [r3, #0]
800886e: 69d9 ldr r1, [r3, #28]
8008870: 68bb ldr r3, [r7, #8]
8008872: 691a ldr r2, [r3, #16]
8008874: 68fb ldr r3, [r7, #12]
8008876: 681b ldr r3, [r3, #0]
8008878: 430a orrs r2, r1
800887a: 61da str r2, [r3, #28]
break;
800887c: e023 b.n 80088c6 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
800887e: 68fb ldr r3, [r7, #12]
8008880: 681b ldr r3, [r3, #0]
8008882: 68b9 ldr r1, [r7, #8]
8008884: 4618 mov r0, r3
8008886: f000 fabf bl 8008e08 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
800888a: 68fb ldr r3, [r7, #12]
800888c: 681b ldr r3, [r3, #0]
800888e: 69da ldr r2, [r3, #28]
8008890: 68fb ldr r3, [r7, #12]
8008892: 681b ldr r3, [r3, #0]
8008894: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008898: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
800889a: 68fb ldr r3, [r7, #12]
800889c: 681b ldr r3, [r3, #0]
800889e: 69da ldr r2, [r3, #28]
80088a0: 68fb ldr r3, [r7, #12]
80088a2: 681b ldr r3, [r3, #0]
80088a4: f422 6280 bic.w r2, r2, #1024 @ 0x400
80088a8: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
80088aa: 68fb ldr r3, [r7, #12]
80088ac: 681b ldr r3, [r3, #0]
80088ae: 69d9 ldr r1, [r3, #28]
80088b0: 68bb ldr r3, [r7, #8]
80088b2: 691b ldr r3, [r3, #16]
80088b4: 021a lsls r2, r3, #8
80088b6: 68fb ldr r3, [r7, #12]
80088b8: 681b ldr r3, [r3, #0]
80088ba: 430a orrs r2, r1
80088bc: 61da str r2, [r3, #28]
break;
80088be: e002 b.n 80088c6 <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
80088c0: 2301 movs r3, #1
80088c2: 75fb strb r3, [r7, #23]
break;
80088c4: bf00 nop
}
__HAL_UNLOCK(htim);
80088c6: 68fb ldr r3, [r7, #12]
80088c8: 2200 movs r2, #0
80088ca: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
80088ce: 7dfb ldrb r3, [r7, #23]
}
80088d0: 4618 mov r0, r3
80088d2: 3718 adds r7, #24
80088d4: 46bd mov sp, r7
80088d6: bd80 pop {r7, pc}
080088d8 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
80088d8: b580 push {r7, lr}
80088da: b084 sub sp, #16
80088dc: af00 add r7, sp, #0
80088de: 6078 str r0, [r7, #4]
80088e0: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
80088e2: 2300 movs r3, #0
80088e4: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
80088e6: 687b ldr r3, [r7, #4]
80088e8: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80088ec: 2b01 cmp r3, #1
80088ee: d101 bne.n 80088f4 <HAL_TIM_ConfigClockSource+0x1c>
80088f0: 2302 movs r3, #2
80088f2: e0b4 b.n 8008a5e <HAL_TIM_ConfigClockSource+0x186>
80088f4: 687b ldr r3, [r7, #4]
80088f6: 2201 movs r2, #1
80088f8: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
80088fc: 687b ldr r3, [r7, #4]
80088fe: 2202 movs r2, #2
8008900: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8008904: 687b ldr r3, [r7, #4]
8008906: 681b ldr r3, [r3, #0]
8008908: 689b ldr r3, [r3, #8]
800890a: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
800890c: 68bb ldr r3, [r7, #8]
800890e: f023 0377 bic.w r3, r3, #119 @ 0x77
8008912: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8008914: 68bb ldr r3, [r7, #8]
8008916: f423 437f bic.w r3, r3, #65280 @ 0xff00
800891a: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
800891c: 687b ldr r3, [r7, #4]
800891e: 681b ldr r3, [r3, #0]
8008920: 68ba ldr r2, [r7, #8]
8008922: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8008924: 683b ldr r3, [r7, #0]
8008926: 681b ldr r3, [r3, #0]
8008928: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800892c: d03e beq.n 80089ac <HAL_TIM_ConfigClockSource+0xd4>
800892e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008932: f200 8087 bhi.w 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
8008936: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800893a: f000 8086 beq.w 8008a4a <HAL_TIM_ConfigClockSource+0x172>
800893e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008942: d87f bhi.n 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
8008944: 2b70 cmp r3, #112 @ 0x70
8008946: d01a beq.n 800897e <HAL_TIM_ConfigClockSource+0xa6>
8008948: 2b70 cmp r3, #112 @ 0x70
800894a: d87b bhi.n 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
800894c: 2b60 cmp r3, #96 @ 0x60
800894e: d050 beq.n 80089f2 <HAL_TIM_ConfigClockSource+0x11a>
8008950: 2b60 cmp r3, #96 @ 0x60
8008952: d877 bhi.n 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
8008954: 2b50 cmp r3, #80 @ 0x50
8008956: d03c beq.n 80089d2 <HAL_TIM_ConfigClockSource+0xfa>
8008958: 2b50 cmp r3, #80 @ 0x50
800895a: d873 bhi.n 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
800895c: 2b40 cmp r3, #64 @ 0x40
800895e: d058 beq.n 8008a12 <HAL_TIM_ConfigClockSource+0x13a>
8008960: 2b40 cmp r3, #64 @ 0x40
8008962: d86f bhi.n 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
8008964: 2b30 cmp r3, #48 @ 0x30
8008966: d064 beq.n 8008a32 <HAL_TIM_ConfigClockSource+0x15a>
8008968: 2b30 cmp r3, #48 @ 0x30
800896a: d86b bhi.n 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
800896c: 2b20 cmp r3, #32
800896e: d060 beq.n 8008a32 <HAL_TIM_ConfigClockSource+0x15a>
8008970: 2b20 cmp r3, #32
8008972: d867 bhi.n 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
8008974: 2b00 cmp r3, #0
8008976: d05c beq.n 8008a32 <HAL_TIM_ConfigClockSource+0x15a>
8008978: 2b10 cmp r3, #16
800897a: d05a beq.n 8008a32 <HAL_TIM_ConfigClockSource+0x15a>
800897c: e062 b.n 8008a44 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
800897e: 687b ldr r3, [r7, #4]
8008980: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8008982: 683b ldr r3, [r7, #0]
8008984: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8008986: 683b ldr r3, [r7, #0]
8008988: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
800898a: 683b ldr r3, [r7, #0]
800898c: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
800898e: f000 fb00 bl 8008f92 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
8008992: 687b ldr r3, [r7, #4]
8008994: 681b ldr r3, [r3, #0]
8008996: 689b ldr r3, [r3, #8]
8008998: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
800899a: 68bb ldr r3, [r7, #8]
800899c: f043 0377 orr.w r3, r3, #119 @ 0x77
80089a0: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80089a2: 687b ldr r3, [r7, #4]
80089a4: 681b ldr r3, [r3, #0]
80089a6: 68ba ldr r2, [r7, #8]
80089a8: 609a str r2, [r3, #8]
break;
80089aa: e04f b.n 8008a4c <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80089ac: 687b ldr r3, [r7, #4]
80089ae: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
80089b0: 683b ldr r3, [r7, #0]
80089b2: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80089b4: 683b ldr r3, [r7, #0]
80089b6: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80089b8: 683b ldr r3, [r7, #0]
80089ba: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80089bc: f000 fae9 bl 8008f92 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
80089c0: 687b ldr r3, [r7, #4]
80089c2: 681b ldr r3, [r3, #0]
80089c4: 689a ldr r2, [r3, #8]
80089c6: 687b ldr r3, [r7, #4]
80089c8: 681b ldr r3, [r3, #0]
80089ca: f442 4280 orr.w r2, r2, #16384 @ 0x4000
80089ce: 609a str r2, [r3, #8]
break;
80089d0: e03c b.n 8008a4c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
80089d2: 687b ldr r3, [r7, #4]
80089d4: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80089d6: 683b ldr r3, [r7, #0]
80089d8: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80089da: 683b ldr r3, [r7, #0]
80089dc: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
80089de: 461a mov r2, r3
80089e0: f000 fa60 bl 8008ea4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
80089e4: 687b ldr r3, [r7, #4]
80089e6: 681b ldr r3, [r3, #0]
80089e8: 2150 movs r1, #80 @ 0x50
80089ea: 4618 mov r0, r3
80089ec: f000 fab7 bl 8008f5e <TIM_ITRx_SetConfig>
break;
80089f0: e02c b.n 8008a4c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
80089f2: 687b ldr r3, [r7, #4]
80089f4: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80089f6: 683b ldr r3, [r7, #0]
80089f8: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80089fa: 683b ldr r3, [r7, #0]
80089fc: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
80089fe: 461a mov r2, r3
8008a00: f000 fa7e bl 8008f00 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8008a04: 687b ldr r3, [r7, #4]
8008a06: 681b ldr r3, [r3, #0]
8008a08: 2160 movs r1, #96 @ 0x60
8008a0a: 4618 mov r0, r3
8008a0c: f000 faa7 bl 8008f5e <TIM_ITRx_SetConfig>
break;
8008a10: e01c b.n 8008a4c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8008a12: 687b ldr r3, [r7, #4]
8008a14: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8008a16: 683b ldr r3, [r7, #0]
8008a18: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8008a1a: 683b ldr r3, [r7, #0]
8008a1c: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8008a1e: 461a mov r2, r3
8008a20: f000 fa40 bl 8008ea4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8008a24: 687b ldr r3, [r7, #4]
8008a26: 681b ldr r3, [r3, #0]
8008a28: 2140 movs r1, #64 @ 0x40
8008a2a: 4618 mov r0, r3
8008a2c: f000 fa97 bl 8008f5e <TIM_ITRx_SetConfig>
break;
8008a30: e00c b.n 8008a4c <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8008a32: 687b ldr r3, [r7, #4]
8008a34: 681a ldr r2, [r3, #0]
8008a36: 683b ldr r3, [r7, #0]
8008a38: 681b ldr r3, [r3, #0]
8008a3a: 4619 mov r1, r3
8008a3c: 4610 mov r0, r2
8008a3e: f000 fa8e bl 8008f5e <TIM_ITRx_SetConfig>
break;
8008a42: e003 b.n 8008a4c <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8008a44: 2301 movs r3, #1
8008a46: 73fb strb r3, [r7, #15]
break;
8008a48: e000 b.n 8008a4c <HAL_TIM_ConfigClockSource+0x174>
break;
8008a4a: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
8008a4c: 687b ldr r3, [r7, #4]
8008a4e: 2201 movs r2, #1
8008a50: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8008a54: 687b ldr r3, [r7, #4]
8008a56: 2200 movs r2, #0
8008a58: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8008a5c: 7bfb ldrb r3, [r7, #15]
}
8008a5e: 4618 mov r0, r3
8008a60: 3710 adds r7, #16
8008a62: 46bd mov sp, r7
8008a64: bd80 pop {r7, pc}
08008a66 <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008a66: b480 push {r7}
8008a68: b085 sub sp, #20
8008a6a: af00 add r7, sp, #0
8008a6c: 6078 str r0, [r7, #4]
8008a6e: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
8008a70: 683b ldr r3, [r7, #0]
8008a72: 2b00 cmp r3, #0
8008a74: d104 bne.n 8008a80 <HAL_TIM_GetChannelState+0x1a>
8008a76: 687b ldr r3, [r7, #4]
8008a78: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8008a7c: b2db uxtb r3, r3
8008a7e: e013 b.n 8008aa8 <HAL_TIM_GetChannelState+0x42>
8008a80: 683b ldr r3, [r7, #0]
8008a82: 2b04 cmp r3, #4
8008a84: d104 bne.n 8008a90 <HAL_TIM_GetChannelState+0x2a>
8008a86: 687b ldr r3, [r7, #4]
8008a88: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8008a8c: b2db uxtb r3, r3
8008a8e: e00b b.n 8008aa8 <HAL_TIM_GetChannelState+0x42>
8008a90: 683b ldr r3, [r7, #0]
8008a92: 2b08 cmp r3, #8
8008a94: d104 bne.n 8008aa0 <HAL_TIM_GetChannelState+0x3a>
8008a96: 687b ldr r3, [r7, #4]
8008a98: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8008a9c: b2db uxtb r3, r3
8008a9e: e003 b.n 8008aa8 <HAL_TIM_GetChannelState+0x42>
8008aa0: 687b ldr r3, [r7, #4]
8008aa2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8008aa6: b2db uxtb r3, r3
8008aa8: 73fb strb r3, [r7, #15]
return channel_state;
8008aaa: 7bfb ldrb r3, [r7, #15]
}
8008aac: 4618 mov r0, r3
8008aae: 3714 adds r7, #20
8008ab0: 46bd mov sp, r7
8008ab2: bc80 pop {r7}
8008ab4: 4770 bx lr
...
08008ab8 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
8008ab8: b480 push {r7}
8008aba: b085 sub sp, #20
8008abc: af00 add r7, sp, #0
8008abe: 6078 str r0, [r7, #4]
8008ac0: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8008ac2: 687b ldr r3, [r7, #4]
8008ac4: 681b ldr r3, [r3, #0]
8008ac6: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8008ac8: 687b ldr r3, [r7, #4]
8008aca: 4a2f ldr r2, [pc, #188] @ (8008b88 <TIM_Base_SetConfig+0xd0>)
8008acc: 4293 cmp r3, r2
8008ace: d00b beq.n 8008ae8 <TIM_Base_SetConfig+0x30>
8008ad0: 687b ldr r3, [r7, #4]
8008ad2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008ad6: d007 beq.n 8008ae8 <TIM_Base_SetConfig+0x30>
8008ad8: 687b ldr r3, [r7, #4]
8008ada: 4a2c ldr r2, [pc, #176] @ (8008b8c <TIM_Base_SetConfig+0xd4>)
8008adc: 4293 cmp r3, r2
8008ade: d003 beq.n 8008ae8 <TIM_Base_SetConfig+0x30>
8008ae0: 687b ldr r3, [r7, #4]
8008ae2: 4a2b ldr r2, [pc, #172] @ (8008b90 <TIM_Base_SetConfig+0xd8>)
8008ae4: 4293 cmp r3, r2
8008ae6: d108 bne.n 8008afa <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8008ae8: 68fb ldr r3, [r7, #12]
8008aea: f023 0370 bic.w r3, r3, #112 @ 0x70
8008aee: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8008af0: 683b ldr r3, [r7, #0]
8008af2: 685b ldr r3, [r3, #4]
8008af4: 68fa ldr r2, [r7, #12]
8008af6: 4313 orrs r3, r2
8008af8: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
8008afa: 687b ldr r3, [r7, #4]
8008afc: 4a22 ldr r2, [pc, #136] @ (8008b88 <TIM_Base_SetConfig+0xd0>)
8008afe: 4293 cmp r3, r2
8008b00: d00b beq.n 8008b1a <TIM_Base_SetConfig+0x62>
8008b02: 687b ldr r3, [r7, #4]
8008b04: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008b08: d007 beq.n 8008b1a <TIM_Base_SetConfig+0x62>
8008b0a: 687b ldr r3, [r7, #4]
8008b0c: 4a1f ldr r2, [pc, #124] @ (8008b8c <TIM_Base_SetConfig+0xd4>)
8008b0e: 4293 cmp r3, r2
8008b10: d003 beq.n 8008b1a <TIM_Base_SetConfig+0x62>
8008b12: 687b ldr r3, [r7, #4]
8008b14: 4a1e ldr r2, [pc, #120] @ (8008b90 <TIM_Base_SetConfig+0xd8>)
8008b16: 4293 cmp r3, r2
8008b18: d108 bne.n 8008b2c <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
8008b1a: 68fb ldr r3, [r7, #12]
8008b1c: f423 7340 bic.w r3, r3, #768 @ 0x300
8008b20: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8008b22: 683b ldr r3, [r7, #0]
8008b24: 68db ldr r3, [r3, #12]
8008b26: 68fa ldr r2, [r7, #12]
8008b28: 4313 orrs r3, r2
8008b2a: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8008b2c: 68fb ldr r3, [r7, #12]
8008b2e: f023 0280 bic.w r2, r3, #128 @ 0x80
8008b32: 683b ldr r3, [r7, #0]
8008b34: 695b ldr r3, [r3, #20]
8008b36: 4313 orrs r3, r2
8008b38: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
8008b3a: 687b ldr r3, [r7, #4]
8008b3c: 68fa ldr r2, [r7, #12]
8008b3e: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8008b40: 683b ldr r3, [r7, #0]
8008b42: 689a ldr r2, [r3, #8]
8008b44: 687b ldr r3, [r7, #4]
8008b46: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8008b48: 683b ldr r3, [r7, #0]
8008b4a: 681a ldr r2, [r3, #0]
8008b4c: 687b ldr r3, [r7, #4]
8008b4e: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8008b50: 687b ldr r3, [r7, #4]
8008b52: 4a0d ldr r2, [pc, #52] @ (8008b88 <TIM_Base_SetConfig+0xd0>)
8008b54: 4293 cmp r3, r2
8008b56: d103 bne.n 8008b60 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8008b58: 683b ldr r3, [r7, #0]
8008b5a: 691a ldr r2, [r3, #16]
8008b5c: 687b ldr r3, [r7, #4]
8008b5e: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8008b60: 687b ldr r3, [r7, #4]
8008b62: 2201 movs r2, #1
8008b64: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
8008b66: 687b ldr r3, [r7, #4]
8008b68: 691b ldr r3, [r3, #16]
8008b6a: f003 0301 and.w r3, r3, #1
8008b6e: 2b00 cmp r3, #0
8008b70: d005 beq.n 8008b7e <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
8008b72: 687b ldr r3, [r7, #4]
8008b74: 691b ldr r3, [r3, #16]
8008b76: f023 0201 bic.w r2, r3, #1
8008b7a: 687b ldr r3, [r7, #4]
8008b7c: 611a str r2, [r3, #16]
}
}
8008b7e: bf00 nop
8008b80: 3714 adds r7, #20
8008b82: 46bd mov sp, r7
8008b84: bc80 pop {r7}
8008b86: 4770 bx lr
8008b88: 40012c00 .word 0x40012c00
8008b8c: 40000400 .word 0x40000400
8008b90: 40000800 .word 0x40000800
08008b94 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008b94: b480 push {r7}
8008b96: b087 sub sp, #28
8008b98: af00 add r7, sp, #0
8008b9a: 6078 str r0, [r7, #4]
8008b9c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008b9e: 687b ldr r3, [r7, #4]
8008ba0: 6a1b ldr r3, [r3, #32]
8008ba2: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
8008ba4: 687b ldr r3, [r7, #4]
8008ba6: 6a1b ldr r3, [r3, #32]
8008ba8: f023 0201 bic.w r2, r3, #1
8008bac: 687b ldr r3, [r7, #4]
8008bae: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008bb0: 687b ldr r3, [r7, #4]
8008bb2: 685b ldr r3, [r3, #4]
8008bb4: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8008bb6: 687b ldr r3, [r7, #4]
8008bb8: 699b ldr r3, [r3, #24]
8008bba: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
8008bbc: 68fb ldr r3, [r7, #12]
8008bbe: f023 0370 bic.w r3, r3, #112 @ 0x70
8008bc2: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8008bc4: 68fb ldr r3, [r7, #12]
8008bc6: f023 0303 bic.w r3, r3, #3
8008bca: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8008bcc: 683b ldr r3, [r7, #0]
8008bce: 681b ldr r3, [r3, #0]
8008bd0: 68fa ldr r2, [r7, #12]
8008bd2: 4313 orrs r3, r2
8008bd4: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
8008bd6: 697b ldr r3, [r7, #20]
8008bd8: f023 0302 bic.w r3, r3, #2
8008bdc: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
8008bde: 683b ldr r3, [r7, #0]
8008be0: 689b ldr r3, [r3, #8]
8008be2: 697a ldr r2, [r7, #20]
8008be4: 4313 orrs r3, r2
8008be6: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
8008be8: 687b ldr r3, [r7, #4]
8008bea: 4a1c ldr r2, [pc, #112] @ (8008c5c <TIM_OC1_SetConfig+0xc8>)
8008bec: 4293 cmp r3, r2
8008bee: d10c bne.n 8008c0a <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8008bf0: 697b ldr r3, [r7, #20]
8008bf2: f023 0308 bic.w r3, r3, #8
8008bf6: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
8008bf8: 683b ldr r3, [r7, #0]
8008bfa: 68db ldr r3, [r3, #12]
8008bfc: 697a ldr r2, [r7, #20]
8008bfe: 4313 orrs r3, r2
8008c00: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8008c02: 697b ldr r3, [r7, #20]
8008c04: f023 0304 bic.w r3, r3, #4
8008c08: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008c0a: 687b ldr r3, [r7, #4]
8008c0c: 4a13 ldr r2, [pc, #76] @ (8008c5c <TIM_OC1_SetConfig+0xc8>)
8008c0e: 4293 cmp r3, r2
8008c10: d111 bne.n 8008c36 <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
8008c12: 693b ldr r3, [r7, #16]
8008c14: f423 7380 bic.w r3, r3, #256 @ 0x100
8008c18: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
8008c1a: 693b ldr r3, [r7, #16]
8008c1c: f423 7300 bic.w r3, r3, #512 @ 0x200
8008c20: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8008c22: 683b ldr r3, [r7, #0]
8008c24: 695b ldr r3, [r3, #20]
8008c26: 693a ldr r2, [r7, #16]
8008c28: 4313 orrs r3, r2
8008c2a: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
8008c2c: 683b ldr r3, [r7, #0]
8008c2e: 699b ldr r3, [r3, #24]
8008c30: 693a ldr r2, [r7, #16]
8008c32: 4313 orrs r3, r2
8008c34: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008c36: 687b ldr r3, [r7, #4]
8008c38: 693a ldr r2, [r7, #16]
8008c3a: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8008c3c: 687b ldr r3, [r7, #4]
8008c3e: 68fa ldr r2, [r7, #12]
8008c40: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8008c42: 683b ldr r3, [r7, #0]
8008c44: 685a ldr r2, [r3, #4]
8008c46: 687b ldr r3, [r7, #4]
8008c48: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008c4a: 687b ldr r3, [r7, #4]
8008c4c: 697a ldr r2, [r7, #20]
8008c4e: 621a str r2, [r3, #32]
}
8008c50: bf00 nop
8008c52: 371c adds r7, #28
8008c54: 46bd mov sp, r7
8008c56: bc80 pop {r7}
8008c58: 4770 bx lr
8008c5a: bf00 nop
8008c5c: 40012c00 .word 0x40012c00
08008c60 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008c60: b480 push {r7}
8008c62: b087 sub sp, #28
8008c64: af00 add r7, sp, #0
8008c66: 6078 str r0, [r7, #4]
8008c68: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008c6a: 687b ldr r3, [r7, #4]
8008c6c: 6a1b ldr r3, [r3, #32]
8008c6e: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8008c70: 687b ldr r3, [r7, #4]
8008c72: 6a1b ldr r3, [r3, #32]
8008c74: f023 0210 bic.w r2, r3, #16
8008c78: 687b ldr r3, [r7, #4]
8008c7a: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008c7c: 687b ldr r3, [r7, #4]
8008c7e: 685b ldr r3, [r3, #4]
8008c80: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8008c82: 687b ldr r3, [r7, #4]
8008c84: 699b ldr r3, [r3, #24]
8008c86: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
8008c88: 68fb ldr r3, [r7, #12]
8008c8a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008c8e: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
8008c90: 68fb ldr r3, [r7, #12]
8008c92: f423 7340 bic.w r3, r3, #768 @ 0x300
8008c96: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8008c98: 683b ldr r3, [r7, #0]
8008c9a: 681b ldr r3, [r3, #0]
8008c9c: 021b lsls r3, r3, #8
8008c9e: 68fa ldr r2, [r7, #12]
8008ca0: 4313 orrs r3, r2
8008ca2: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
8008ca4: 697b ldr r3, [r7, #20]
8008ca6: f023 0320 bic.w r3, r3, #32
8008caa: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
8008cac: 683b ldr r3, [r7, #0]
8008cae: 689b ldr r3, [r3, #8]
8008cb0: 011b lsls r3, r3, #4
8008cb2: 697a ldr r2, [r7, #20]
8008cb4: 4313 orrs r3, r2
8008cb6: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
8008cb8: 687b ldr r3, [r7, #4]
8008cba: 4a1d ldr r2, [pc, #116] @ (8008d30 <TIM_OC2_SetConfig+0xd0>)
8008cbc: 4293 cmp r3, r2
8008cbe: d10d bne.n 8008cdc <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
8008cc0: 697b ldr r3, [r7, #20]
8008cc2: f023 0380 bic.w r3, r3, #128 @ 0x80
8008cc6: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
8008cc8: 683b ldr r3, [r7, #0]
8008cca: 68db ldr r3, [r3, #12]
8008ccc: 011b lsls r3, r3, #4
8008cce: 697a ldr r2, [r7, #20]
8008cd0: 4313 orrs r3, r2
8008cd2: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
8008cd4: 697b ldr r3, [r7, #20]
8008cd6: f023 0340 bic.w r3, r3, #64 @ 0x40
8008cda: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008cdc: 687b ldr r3, [r7, #4]
8008cde: 4a14 ldr r2, [pc, #80] @ (8008d30 <TIM_OC2_SetConfig+0xd0>)
8008ce0: 4293 cmp r3, r2
8008ce2: d113 bne.n 8008d0c <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8008ce4: 693b ldr r3, [r7, #16]
8008ce6: f423 6380 bic.w r3, r3, #1024 @ 0x400
8008cea: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
8008cec: 693b ldr r3, [r7, #16]
8008cee: f423 6300 bic.w r3, r3, #2048 @ 0x800
8008cf2: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8008cf4: 683b ldr r3, [r7, #0]
8008cf6: 695b ldr r3, [r3, #20]
8008cf8: 009b lsls r3, r3, #2
8008cfa: 693a ldr r2, [r7, #16]
8008cfc: 4313 orrs r3, r2
8008cfe: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8008d00: 683b ldr r3, [r7, #0]
8008d02: 699b ldr r3, [r3, #24]
8008d04: 009b lsls r3, r3, #2
8008d06: 693a ldr r2, [r7, #16]
8008d08: 4313 orrs r3, r2
8008d0a: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008d0c: 687b ldr r3, [r7, #4]
8008d0e: 693a ldr r2, [r7, #16]
8008d10: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8008d12: 687b ldr r3, [r7, #4]
8008d14: 68fa ldr r2, [r7, #12]
8008d16: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8008d18: 683b ldr r3, [r7, #0]
8008d1a: 685a ldr r2, [r3, #4]
8008d1c: 687b ldr r3, [r7, #4]
8008d1e: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008d20: 687b ldr r3, [r7, #4]
8008d22: 697a ldr r2, [r7, #20]
8008d24: 621a str r2, [r3, #32]
}
8008d26: bf00 nop
8008d28: 371c adds r7, #28
8008d2a: 46bd mov sp, r7
8008d2c: bc80 pop {r7}
8008d2e: 4770 bx lr
8008d30: 40012c00 .word 0x40012c00
08008d34 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008d34: b480 push {r7}
8008d36: b087 sub sp, #28
8008d38: af00 add r7, sp, #0
8008d3a: 6078 str r0, [r7, #4]
8008d3c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008d3e: 687b ldr r3, [r7, #4]
8008d40: 6a1b ldr r3, [r3, #32]
8008d42: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8008d44: 687b ldr r3, [r7, #4]
8008d46: 6a1b ldr r3, [r3, #32]
8008d48: f423 7280 bic.w r2, r3, #256 @ 0x100
8008d4c: 687b ldr r3, [r7, #4]
8008d4e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008d50: 687b ldr r3, [r7, #4]
8008d52: 685b ldr r3, [r3, #4]
8008d54: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8008d56: 687b ldr r3, [r7, #4]
8008d58: 69db ldr r3, [r3, #28]
8008d5a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
8008d5c: 68fb ldr r3, [r7, #12]
8008d5e: f023 0370 bic.w r3, r3, #112 @ 0x70
8008d62: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8008d64: 68fb ldr r3, [r7, #12]
8008d66: f023 0303 bic.w r3, r3, #3
8008d6a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8008d6c: 683b ldr r3, [r7, #0]
8008d6e: 681b ldr r3, [r3, #0]
8008d70: 68fa ldr r2, [r7, #12]
8008d72: 4313 orrs r3, r2
8008d74: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
8008d76: 697b ldr r3, [r7, #20]
8008d78: f423 7300 bic.w r3, r3, #512 @ 0x200
8008d7c: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
8008d7e: 683b ldr r3, [r7, #0]
8008d80: 689b ldr r3, [r3, #8]
8008d82: 021b lsls r3, r3, #8
8008d84: 697a ldr r2, [r7, #20]
8008d86: 4313 orrs r3, r2
8008d88: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
8008d8a: 687b ldr r3, [r7, #4]
8008d8c: 4a1d ldr r2, [pc, #116] @ (8008e04 <TIM_OC3_SetConfig+0xd0>)
8008d8e: 4293 cmp r3, r2
8008d90: d10d bne.n 8008dae <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
8008d92: 697b ldr r3, [r7, #20]
8008d94: f423 6300 bic.w r3, r3, #2048 @ 0x800
8008d98: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
8008d9a: 683b ldr r3, [r7, #0]
8008d9c: 68db ldr r3, [r3, #12]
8008d9e: 021b lsls r3, r3, #8
8008da0: 697a ldr r2, [r7, #20]
8008da2: 4313 orrs r3, r2
8008da4: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
8008da6: 697b ldr r3, [r7, #20]
8008da8: f423 6380 bic.w r3, r3, #1024 @ 0x400
8008dac: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008dae: 687b ldr r3, [r7, #4]
8008db0: 4a14 ldr r2, [pc, #80] @ (8008e04 <TIM_OC3_SetConfig+0xd0>)
8008db2: 4293 cmp r3, r2
8008db4: d113 bne.n 8008dde <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
8008db6: 693b ldr r3, [r7, #16]
8008db8: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8008dbc: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
8008dbe: 693b ldr r3, [r7, #16]
8008dc0: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8008dc4: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
8008dc6: 683b ldr r3, [r7, #0]
8008dc8: 695b ldr r3, [r3, #20]
8008dca: 011b lsls r3, r3, #4
8008dcc: 693a ldr r2, [r7, #16]
8008dce: 4313 orrs r3, r2
8008dd0: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
8008dd2: 683b ldr r3, [r7, #0]
8008dd4: 699b ldr r3, [r3, #24]
8008dd6: 011b lsls r3, r3, #4
8008dd8: 693a ldr r2, [r7, #16]
8008dda: 4313 orrs r3, r2
8008ddc: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008dde: 687b ldr r3, [r7, #4]
8008de0: 693a ldr r2, [r7, #16]
8008de2: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8008de4: 687b ldr r3, [r7, #4]
8008de6: 68fa ldr r2, [r7, #12]
8008de8: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
8008dea: 683b ldr r3, [r7, #0]
8008dec: 685a ldr r2, [r3, #4]
8008dee: 687b ldr r3, [r7, #4]
8008df0: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008df2: 687b ldr r3, [r7, #4]
8008df4: 697a ldr r2, [r7, #20]
8008df6: 621a str r2, [r3, #32]
}
8008df8: bf00 nop
8008dfa: 371c adds r7, #28
8008dfc: 46bd mov sp, r7
8008dfe: bc80 pop {r7}
8008e00: 4770 bx lr
8008e02: bf00 nop
8008e04: 40012c00 .word 0x40012c00
08008e08 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008e08: b480 push {r7}
8008e0a: b087 sub sp, #28
8008e0c: af00 add r7, sp, #0
8008e0e: 6078 str r0, [r7, #4]
8008e10: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008e12: 687b ldr r3, [r7, #4]
8008e14: 6a1b ldr r3, [r3, #32]
8008e16: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
8008e18: 687b ldr r3, [r7, #4]
8008e1a: 6a1b ldr r3, [r3, #32]
8008e1c: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8008e20: 687b ldr r3, [r7, #4]
8008e22: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008e24: 687b ldr r3, [r7, #4]
8008e26: 685b ldr r3, [r3, #4]
8008e28: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8008e2a: 687b ldr r3, [r7, #4]
8008e2c: 69db ldr r3, [r3, #28]
8008e2e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8008e30: 68fb ldr r3, [r7, #12]
8008e32: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008e36: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
8008e38: 68fb ldr r3, [r7, #12]
8008e3a: f423 7340 bic.w r3, r3, #768 @ 0x300
8008e3e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8008e40: 683b ldr r3, [r7, #0]
8008e42: 681b ldr r3, [r3, #0]
8008e44: 021b lsls r3, r3, #8
8008e46: 68fa ldr r2, [r7, #12]
8008e48: 4313 orrs r3, r2
8008e4a: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8008e4c: 693b ldr r3, [r7, #16]
8008e4e: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8008e52: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8008e54: 683b ldr r3, [r7, #0]
8008e56: 689b ldr r3, [r3, #8]
8008e58: 031b lsls r3, r3, #12
8008e5a: 693a ldr r2, [r7, #16]
8008e5c: 4313 orrs r3, r2
8008e5e: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008e60: 687b ldr r3, [r7, #4]
8008e62: 4a0f ldr r2, [pc, #60] @ (8008ea0 <TIM_OC4_SetConfig+0x98>)
8008e64: 4293 cmp r3, r2
8008e66: d109 bne.n 8008e7c <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8008e68: 697b ldr r3, [r7, #20]
8008e6a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8008e6e: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
8008e70: 683b ldr r3, [r7, #0]
8008e72: 695b ldr r3, [r3, #20]
8008e74: 019b lsls r3, r3, #6
8008e76: 697a ldr r2, [r7, #20]
8008e78: 4313 orrs r3, r2
8008e7a: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008e7c: 687b ldr r3, [r7, #4]
8008e7e: 697a ldr r2, [r7, #20]
8008e80: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8008e82: 687b ldr r3, [r7, #4]
8008e84: 68fa ldr r2, [r7, #12]
8008e86: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
8008e88: 683b ldr r3, [r7, #0]
8008e8a: 685a ldr r2, [r3, #4]
8008e8c: 687b ldr r3, [r7, #4]
8008e8e: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008e90: 687b ldr r3, [r7, #4]
8008e92: 693a ldr r2, [r7, #16]
8008e94: 621a str r2, [r3, #32]
}
8008e96: bf00 nop
8008e98: 371c adds r7, #28
8008e9a: 46bd mov sp, r7
8008e9c: bc80 pop {r7}
8008e9e: 4770 bx lr
8008ea0: 40012c00 .word 0x40012c00
08008ea4 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8008ea4: b480 push {r7}
8008ea6: b087 sub sp, #28
8008ea8: af00 add r7, sp, #0
8008eaa: 60f8 str r0, [r7, #12]
8008eac: 60b9 str r1, [r7, #8]
8008eae: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
8008eb0: 68fb ldr r3, [r7, #12]
8008eb2: 6a1b ldr r3, [r3, #32]
8008eb4: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
8008eb6: 68fb ldr r3, [r7, #12]
8008eb8: 6a1b ldr r3, [r3, #32]
8008eba: f023 0201 bic.w r2, r3, #1
8008ebe: 68fb ldr r3, [r7, #12]
8008ec0: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8008ec2: 68fb ldr r3, [r7, #12]
8008ec4: 699b ldr r3, [r3, #24]
8008ec6: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
8008ec8: 693b ldr r3, [r7, #16]
8008eca: f023 03f0 bic.w r3, r3, #240 @ 0xf0
8008ece: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8008ed0: 687b ldr r3, [r7, #4]
8008ed2: 011b lsls r3, r3, #4
8008ed4: 693a ldr r2, [r7, #16]
8008ed6: 4313 orrs r3, r2
8008ed8: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
8008eda: 697b ldr r3, [r7, #20]
8008edc: f023 030a bic.w r3, r3, #10
8008ee0: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8008ee2: 697a ldr r2, [r7, #20]
8008ee4: 68bb ldr r3, [r7, #8]
8008ee6: 4313 orrs r3, r2
8008ee8: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
8008eea: 68fb ldr r3, [r7, #12]
8008eec: 693a ldr r2, [r7, #16]
8008eee: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8008ef0: 68fb ldr r3, [r7, #12]
8008ef2: 697a ldr r2, [r7, #20]
8008ef4: 621a str r2, [r3, #32]
}
8008ef6: bf00 nop
8008ef8: 371c adds r7, #28
8008efa: 46bd mov sp, r7
8008efc: bc80 pop {r7}
8008efe: 4770 bx lr
08008f00 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8008f00: b480 push {r7}
8008f02: b087 sub sp, #28
8008f04: af00 add r7, sp, #0
8008f06: 60f8 str r0, [r7, #12]
8008f08: 60b9 str r1, [r7, #8]
8008f0a: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
8008f0c: 68fb ldr r3, [r7, #12]
8008f0e: 6a1b ldr r3, [r3, #32]
8008f10: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8008f12: 68fb ldr r3, [r7, #12]
8008f14: 6a1b ldr r3, [r3, #32]
8008f16: f023 0210 bic.w r2, r3, #16
8008f1a: 68fb ldr r3, [r7, #12]
8008f1c: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8008f1e: 68fb ldr r3, [r7, #12]
8008f20: 699b ldr r3, [r3, #24]
8008f22: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8008f24: 693b ldr r3, [r7, #16]
8008f26: f423 4370 bic.w r3, r3, #61440 @ 0xf000
8008f2a: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
8008f2c: 687b ldr r3, [r7, #4]
8008f2e: 031b lsls r3, r3, #12
8008f30: 693a ldr r2, [r7, #16]
8008f32: 4313 orrs r3, r2
8008f34: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8008f36: 697b ldr r3, [r7, #20]
8008f38: f023 03a0 bic.w r3, r3, #160 @ 0xa0
8008f3c: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
8008f3e: 68bb ldr r3, [r7, #8]
8008f40: 011b lsls r3, r3, #4
8008f42: 697a ldr r2, [r7, #20]
8008f44: 4313 orrs r3, r2
8008f46: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8008f48: 68fb ldr r3, [r7, #12]
8008f4a: 693a ldr r2, [r7, #16]
8008f4c: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8008f4e: 68fb ldr r3, [r7, #12]
8008f50: 697a ldr r2, [r7, #20]
8008f52: 621a str r2, [r3, #32]
}
8008f54: bf00 nop
8008f56: 371c adds r7, #28
8008f58: 46bd mov sp, r7
8008f5a: bc80 pop {r7}
8008f5c: 4770 bx lr
08008f5e <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
8008f5e: b480 push {r7}
8008f60: b085 sub sp, #20
8008f62: af00 add r7, sp, #0
8008f64: 6078 str r0, [r7, #4]
8008f66: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8008f68: 687b ldr r3, [r7, #4]
8008f6a: 689b ldr r3, [r3, #8]
8008f6c: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8008f6e: 68fb ldr r3, [r7, #12]
8008f70: f023 0370 bic.w r3, r3, #112 @ 0x70
8008f74: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8008f76: 683a ldr r2, [r7, #0]
8008f78: 68fb ldr r3, [r7, #12]
8008f7a: 4313 orrs r3, r2
8008f7c: f043 0307 orr.w r3, r3, #7
8008f80: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8008f82: 687b ldr r3, [r7, #4]
8008f84: 68fa ldr r2, [r7, #12]
8008f86: 609a str r2, [r3, #8]
}
8008f88: bf00 nop
8008f8a: 3714 adds r7, #20
8008f8c: 46bd mov sp, r7
8008f8e: bc80 pop {r7}
8008f90: 4770 bx lr
08008f92 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
8008f92: b480 push {r7}
8008f94: b087 sub sp, #28
8008f96: af00 add r7, sp, #0
8008f98: 60f8 str r0, [r7, #12]
8008f9a: 60b9 str r1, [r7, #8]
8008f9c: 607a str r2, [r7, #4]
8008f9e: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8008fa0: 68fb ldr r3, [r7, #12]
8008fa2: 689b ldr r3, [r3, #8]
8008fa4: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8008fa6: 697b ldr r3, [r7, #20]
8008fa8: f423 437f bic.w r3, r3, #65280 @ 0xff00
8008fac: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8008fae: 683b ldr r3, [r7, #0]
8008fb0: 021a lsls r2, r3, #8
8008fb2: 687b ldr r3, [r7, #4]
8008fb4: 431a orrs r2, r3
8008fb6: 68bb ldr r3, [r7, #8]
8008fb8: 4313 orrs r3, r2
8008fba: 697a ldr r2, [r7, #20]
8008fbc: 4313 orrs r3, r2
8008fbe: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8008fc0: 68fb ldr r3, [r7, #12]
8008fc2: 697a ldr r2, [r7, #20]
8008fc4: 609a str r2, [r3, #8]
}
8008fc6: bf00 nop
8008fc8: 371c adds r7, #28
8008fca: 46bd mov sp, r7
8008fcc: bc80 pop {r7}
8008fce: 4770 bx lr
08008fd0 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8008fd0: b480 push {r7}
8008fd2: b087 sub sp, #28
8008fd4: af00 add r7, sp, #0
8008fd6: 60f8 str r0, [r7, #12]
8008fd8: 60b9 str r1, [r7, #8]
8008fda: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8008fdc: 68bb ldr r3, [r7, #8]
8008fde: f003 031f and.w r3, r3, #31
8008fe2: 2201 movs r2, #1
8008fe4: fa02 f303 lsl.w r3, r2, r3
8008fe8: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
8008fea: 68fb ldr r3, [r7, #12]
8008fec: 6a1a ldr r2, [r3, #32]
8008fee: 697b ldr r3, [r7, #20]
8008ff0: 43db mvns r3, r3
8008ff2: 401a ands r2, r3
8008ff4: 68fb ldr r3, [r7, #12]
8008ff6: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8008ff8: 68fb ldr r3, [r7, #12]
8008ffa: 6a1a ldr r2, [r3, #32]
8008ffc: 68bb ldr r3, [r7, #8]
8008ffe: f003 031f and.w r3, r3, #31
8009002: 6879 ldr r1, [r7, #4]
8009004: fa01 f303 lsl.w r3, r1, r3
8009008: 431a orrs r2, r3
800900a: 68fb ldr r3, [r7, #12]
800900c: 621a str r2, [r3, #32]
}
800900e: bf00 nop
8009010: 371c adds r7, #28
8009012: 46bd mov sp, r7
8009014: bc80 pop {r7}
8009016: 4770 bx lr
08009018 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8009018: b480 push {r7}
800901a: b085 sub sp, #20
800901c: af00 add r7, sp, #0
800901e: 6078 str r0, [r7, #4]
8009020: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8009022: 687b ldr r3, [r7, #4]
8009024: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8009028: 2b01 cmp r3, #1
800902a: d101 bne.n 8009030 <HAL_TIMEx_MasterConfigSynchronization+0x18>
800902c: 2302 movs r3, #2
800902e: e046 b.n 80090be <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8009030: 687b ldr r3, [r7, #4]
8009032: 2201 movs r2, #1
8009034: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8009038: 687b ldr r3, [r7, #4]
800903a: 2202 movs r2, #2
800903c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8009040: 687b ldr r3, [r7, #4]
8009042: 681b ldr r3, [r3, #0]
8009044: 685b ldr r3, [r3, #4]
8009046: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8009048: 687b ldr r3, [r7, #4]
800904a: 681b ldr r3, [r3, #0]
800904c: 689b ldr r3, [r3, #8]
800904e: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8009050: 68fb ldr r3, [r7, #12]
8009052: f023 0370 bic.w r3, r3, #112 @ 0x70
8009056: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8009058: 683b ldr r3, [r7, #0]
800905a: 681b ldr r3, [r3, #0]
800905c: 68fa ldr r2, [r7, #12]
800905e: 4313 orrs r3, r2
8009060: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8009062: 687b ldr r3, [r7, #4]
8009064: 681b ldr r3, [r3, #0]
8009066: 68fa ldr r2, [r7, #12]
8009068: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800906a: 687b ldr r3, [r7, #4]
800906c: 681b ldr r3, [r3, #0]
800906e: 4a16 ldr r2, [pc, #88] @ (80090c8 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8009070: 4293 cmp r3, r2
8009072: d00e beq.n 8009092 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8009074: 687b ldr r3, [r7, #4]
8009076: 681b ldr r3, [r3, #0]
8009078: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800907c: d009 beq.n 8009092 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
800907e: 687b ldr r3, [r7, #4]
8009080: 681b ldr r3, [r3, #0]
8009082: 4a12 ldr r2, [pc, #72] @ (80090cc <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8009084: 4293 cmp r3, r2
8009086: d004 beq.n 8009092 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8009088: 687b ldr r3, [r7, #4]
800908a: 681b ldr r3, [r3, #0]
800908c: 4a10 ldr r2, [pc, #64] @ (80090d0 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
800908e: 4293 cmp r3, r2
8009090: d10c bne.n 80090ac <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8009092: 68bb ldr r3, [r7, #8]
8009094: f023 0380 bic.w r3, r3, #128 @ 0x80
8009098: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
800909a: 683b ldr r3, [r7, #0]
800909c: 685b ldr r3, [r3, #4]
800909e: 68ba ldr r2, [r7, #8]
80090a0: 4313 orrs r3, r2
80090a2: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80090a4: 687b ldr r3, [r7, #4]
80090a6: 681b ldr r3, [r3, #0]
80090a8: 68ba ldr r2, [r7, #8]
80090aa: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
80090ac: 687b ldr r3, [r7, #4]
80090ae: 2201 movs r2, #1
80090b0: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
80090b4: 687b ldr r3, [r7, #4]
80090b6: 2200 movs r2, #0
80090b8: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
80090bc: 2300 movs r3, #0
}
80090be: 4618 mov r0, r3
80090c0: 3714 adds r7, #20
80090c2: 46bd mov sp, r7
80090c4: bc80 pop {r7}
80090c6: 4770 bx lr
80090c8: 40012c00 .word 0x40012c00
80090cc: 40000400 .word 0x40000400
80090d0: 40000800 .word 0x40000800
080090d4 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
80090d4: b580 push {r7, lr}
80090d6: b082 sub sp, #8
80090d8: af00 add r7, sp, #0
80090da: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
80090dc: 687b ldr r3, [r7, #4]
80090de: 2b00 cmp r3, #0
80090e0: d101 bne.n 80090e6 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
80090e2: 2301 movs r3, #1
80090e4: e042 b.n 800916c <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
80090e6: 687b ldr r3, [r7, #4]
80090e8: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80090ec: b2db uxtb r3, r3
80090ee: 2b00 cmp r3, #0
80090f0: d106 bne.n 8009100 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
80090f2: 687b ldr r3, [r7, #4]
80090f4: 2200 movs r2, #0
80090f6: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
80090fa: 6878 ldr r0, [r7, #4]
80090fc: f7fb fb80 bl 8004800 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8009100: 687b ldr r3, [r7, #4]
8009102: 2224 movs r2, #36 @ 0x24
8009104: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8009108: 687b ldr r3, [r7, #4]
800910a: 681b ldr r3, [r3, #0]
800910c: 68da ldr r2, [r3, #12]
800910e: 687b ldr r3, [r7, #4]
8009110: 681b ldr r3, [r3, #0]
8009112: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8009116: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8009118: 6878 ldr r0, [r7, #4]
800911a: f000 f971 bl 8009400 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
800911e: 687b ldr r3, [r7, #4]
8009120: 681b ldr r3, [r3, #0]
8009122: 691a ldr r2, [r3, #16]
8009124: 687b ldr r3, [r7, #4]
8009126: 681b ldr r3, [r3, #0]
8009128: f422 4290 bic.w r2, r2, #18432 @ 0x4800
800912c: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
800912e: 687b ldr r3, [r7, #4]
8009130: 681b ldr r3, [r3, #0]
8009132: 695a ldr r2, [r3, #20]
8009134: 687b ldr r3, [r7, #4]
8009136: 681b ldr r3, [r3, #0]
8009138: f022 022a bic.w r2, r2, #42 @ 0x2a
800913c: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
800913e: 687b ldr r3, [r7, #4]
8009140: 681b ldr r3, [r3, #0]
8009142: 68da ldr r2, [r3, #12]
8009144: 687b ldr r3, [r7, #4]
8009146: 681b ldr r3, [r3, #0]
8009148: f442 5200 orr.w r2, r2, #8192 @ 0x2000
800914c: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
800914e: 687b ldr r3, [r7, #4]
8009150: 2200 movs r2, #0
8009152: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8009154: 687b ldr r3, [r7, #4]
8009156: 2220 movs r2, #32
8009158: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
800915c: 687b ldr r3, [r7, #4]
800915e: 2220 movs r2, #32
8009160: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
8009164: 687b ldr r3, [r7, #4]
8009166: 2200 movs r2, #0
8009168: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
800916a: 2300 movs r3, #0
}
800916c: 4618 mov r0, r3
800916e: 3708 adds r7, #8
8009170: 46bd mov sp, r7
8009172: bd80 pop {r7, pc}
08009174 <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
8009174: b580 push {r7, lr}
8009176: b08a sub sp, #40 @ 0x28
8009178: af02 add r7, sp, #8
800917a: 60f8 str r0, [r7, #12]
800917c: 60b9 str r1, [r7, #8]
800917e: 603b str r3, [r7, #0]
8009180: 4613 mov r3, r2
8009182: 80fb strh r3, [r7, #6]
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart = 0U;
8009184: 2300 movs r3, #0
8009186: 617b str r3, [r7, #20]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
8009188: 68fb ldr r3, [r7, #12]
800918a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800918e: b2db uxtb r3, r3
8009190: 2b20 cmp r3, #32
8009192: d175 bne.n 8009280 <HAL_UART_Transmit+0x10c>
{
if ((pData == NULL) || (Size == 0U))
8009194: 68bb ldr r3, [r7, #8]
8009196: 2b00 cmp r3, #0
8009198: d002 beq.n 80091a0 <HAL_UART_Transmit+0x2c>
800919a: 88fb ldrh r3, [r7, #6]
800919c: 2b00 cmp r3, #0
800919e: d101 bne.n 80091a4 <HAL_UART_Transmit+0x30>
{
return HAL_ERROR;
80091a0: 2301 movs r3, #1
80091a2: e06e b.n 8009282 <HAL_UART_Transmit+0x10e>
}
huart->ErrorCode = HAL_UART_ERROR_NONE;
80091a4: 68fb ldr r3, [r7, #12]
80091a6: 2200 movs r2, #0
80091a8: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_BUSY_TX;
80091aa: 68fb ldr r3, [r7, #12]
80091ac: 2221 movs r2, #33 @ 0x21
80091ae: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
80091b2: f7fb fc6d bl 8004a90 <HAL_GetTick>
80091b6: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
80091b8: 68fb ldr r3, [r7, #12]
80091ba: 88fa ldrh r2, [r7, #6]
80091bc: 849a strh r2, [r3, #36] @ 0x24
huart->TxXferCount = Size;
80091be: 68fb ldr r3, [r7, #12]
80091c0: 88fa ldrh r2, [r7, #6]
80091c2: 84da strh r2, [r3, #38] @ 0x26
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
80091c4: 68fb ldr r3, [r7, #12]
80091c6: 689b ldr r3, [r3, #8]
80091c8: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
80091cc: d108 bne.n 80091e0 <HAL_UART_Transmit+0x6c>
80091ce: 68fb ldr r3, [r7, #12]
80091d0: 691b ldr r3, [r3, #16]
80091d2: 2b00 cmp r3, #0
80091d4: d104 bne.n 80091e0 <HAL_UART_Transmit+0x6c>
{
pdata8bits = NULL;
80091d6: 2300 movs r3, #0
80091d8: 61fb str r3, [r7, #28]
pdata16bits = (const uint16_t *) pData;
80091da: 68bb ldr r3, [r7, #8]
80091dc: 61bb str r3, [r7, #24]
80091de: e003 b.n 80091e8 <HAL_UART_Transmit+0x74>
}
else
{
pdata8bits = pData;
80091e0: 68bb ldr r3, [r7, #8]
80091e2: 61fb str r3, [r7, #28]
pdata16bits = NULL;
80091e4: 2300 movs r3, #0
80091e6: 61bb str r3, [r7, #24]
}
while (huart->TxXferCount > 0U)
80091e8: e02e b.n 8009248 <HAL_UART_Transmit+0xd4>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
80091ea: 683b ldr r3, [r7, #0]
80091ec: 9300 str r3, [sp, #0]
80091ee: 697b ldr r3, [r7, #20]
80091f0: 2200 movs r2, #0
80091f2: 2180 movs r1, #128 @ 0x80
80091f4: 68f8 ldr r0, [r7, #12]
80091f6: f000 f848 bl 800928a <UART_WaitOnFlagUntilTimeout>
80091fa: 4603 mov r3, r0
80091fc: 2b00 cmp r3, #0
80091fe: d005 beq.n 800920c <HAL_UART_Transmit+0x98>
{
huart->gState = HAL_UART_STATE_READY;
8009200: 68fb ldr r3, [r7, #12]
8009202: 2220 movs r2, #32
8009204: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
8009208: 2303 movs r3, #3
800920a: e03a b.n 8009282 <HAL_UART_Transmit+0x10e>
}
if (pdata8bits == NULL)
800920c: 69fb ldr r3, [r7, #28]
800920e: 2b00 cmp r3, #0
8009210: d10b bne.n 800922a <HAL_UART_Transmit+0xb6>
{
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
8009212: 69bb ldr r3, [r7, #24]
8009214: 881b ldrh r3, [r3, #0]
8009216: 461a mov r2, r3
8009218: 68fb ldr r3, [r7, #12]
800921a: 681b ldr r3, [r3, #0]
800921c: f3c2 0208 ubfx r2, r2, #0, #9
8009220: 605a str r2, [r3, #4]
pdata16bits++;
8009222: 69bb ldr r3, [r7, #24]
8009224: 3302 adds r3, #2
8009226: 61bb str r3, [r7, #24]
8009228: e007 b.n 800923a <HAL_UART_Transmit+0xc6>
}
else
{
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
800922a: 69fb ldr r3, [r7, #28]
800922c: 781a ldrb r2, [r3, #0]
800922e: 68fb ldr r3, [r7, #12]
8009230: 681b ldr r3, [r3, #0]
8009232: 605a str r2, [r3, #4]
pdata8bits++;
8009234: 69fb ldr r3, [r7, #28]
8009236: 3301 adds r3, #1
8009238: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
800923a: 68fb ldr r3, [r7, #12]
800923c: 8cdb ldrh r3, [r3, #38] @ 0x26
800923e: b29b uxth r3, r3
8009240: 3b01 subs r3, #1
8009242: b29a uxth r2, r3
8009244: 68fb ldr r3, [r7, #12]
8009246: 84da strh r2, [r3, #38] @ 0x26
while (huart->TxXferCount > 0U)
8009248: 68fb ldr r3, [r7, #12]
800924a: 8cdb ldrh r3, [r3, #38] @ 0x26
800924c: b29b uxth r3, r3
800924e: 2b00 cmp r3, #0
8009250: d1cb bne.n 80091ea <HAL_UART_Transmit+0x76>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
8009252: 683b ldr r3, [r7, #0]
8009254: 9300 str r3, [sp, #0]
8009256: 697b ldr r3, [r7, #20]
8009258: 2200 movs r2, #0
800925a: 2140 movs r1, #64 @ 0x40
800925c: 68f8 ldr r0, [r7, #12]
800925e: f000 f814 bl 800928a <UART_WaitOnFlagUntilTimeout>
8009262: 4603 mov r3, r0
8009264: 2b00 cmp r3, #0
8009266: d005 beq.n 8009274 <HAL_UART_Transmit+0x100>
{
huart->gState = HAL_UART_STATE_READY;
8009268: 68fb ldr r3, [r7, #12]
800926a: 2220 movs r2, #32
800926c: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
8009270: 2303 movs r3, #3
8009272: e006 b.n 8009282 <HAL_UART_Transmit+0x10e>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
8009274: 68fb ldr r3, [r7, #12]
8009276: 2220 movs r2, #32
8009278: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_OK;
800927c: 2300 movs r3, #0
800927e: e000 b.n 8009282 <HAL_UART_Transmit+0x10e>
}
else
{
return HAL_BUSY;
8009280: 2302 movs r3, #2
}
}
8009282: 4618 mov r0, r3
8009284: 3720 adds r7, #32
8009286: 46bd mov sp, r7
8009288: bd80 pop {r7, pc}
0800928a <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
800928a: b580 push {r7, lr}
800928c: b086 sub sp, #24
800928e: af00 add r7, sp, #0
8009290: 60f8 str r0, [r7, #12]
8009292: 60b9 str r1, [r7, #8]
8009294: 603b str r3, [r7, #0]
8009296: 4613 mov r3, r2
8009298: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
800929a: e03b b.n 8009314 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
800929c: 6a3b ldr r3, [r7, #32]
800929e: f1b3 3fff cmp.w r3, #4294967295
80092a2: d037 beq.n 8009314 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
80092a4: f7fb fbf4 bl 8004a90 <HAL_GetTick>
80092a8: 4602 mov r2, r0
80092aa: 683b ldr r3, [r7, #0]
80092ac: 1ad3 subs r3, r2, r3
80092ae: 6a3a ldr r2, [r7, #32]
80092b0: 429a cmp r2, r3
80092b2: d302 bcc.n 80092ba <UART_WaitOnFlagUntilTimeout+0x30>
80092b4: 6a3b ldr r3, [r7, #32]
80092b6: 2b00 cmp r3, #0
80092b8: d101 bne.n 80092be <UART_WaitOnFlagUntilTimeout+0x34>
{
return HAL_TIMEOUT;
80092ba: 2303 movs r3, #3
80092bc: e03a b.n 8009334 <UART_WaitOnFlagUntilTimeout+0xaa>
}
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
80092be: 68fb ldr r3, [r7, #12]
80092c0: 681b ldr r3, [r3, #0]
80092c2: 68db ldr r3, [r3, #12]
80092c4: f003 0304 and.w r3, r3, #4
80092c8: 2b00 cmp r3, #0
80092ca: d023 beq.n 8009314 <UART_WaitOnFlagUntilTimeout+0x8a>
80092cc: 68bb ldr r3, [r7, #8]
80092ce: 2b80 cmp r3, #128 @ 0x80
80092d0: d020 beq.n 8009314 <UART_WaitOnFlagUntilTimeout+0x8a>
80092d2: 68bb ldr r3, [r7, #8]
80092d4: 2b40 cmp r3, #64 @ 0x40
80092d6: d01d beq.n 8009314 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
80092d8: 68fb ldr r3, [r7, #12]
80092da: 681b ldr r3, [r3, #0]
80092dc: 681b ldr r3, [r3, #0]
80092de: f003 0308 and.w r3, r3, #8
80092e2: 2b08 cmp r3, #8
80092e4: d116 bne.n 8009314 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_OREFLAG(huart);
80092e6: 2300 movs r3, #0
80092e8: 617b str r3, [r7, #20]
80092ea: 68fb ldr r3, [r7, #12]
80092ec: 681b ldr r3, [r3, #0]
80092ee: 681b ldr r3, [r3, #0]
80092f0: 617b str r3, [r7, #20]
80092f2: 68fb ldr r3, [r7, #12]
80092f4: 681b ldr r3, [r3, #0]
80092f6: 685b ldr r3, [r3, #4]
80092f8: 617b str r3, [r7, #20]
80092fa: 697b ldr r3, [r7, #20]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
80092fc: 68f8 ldr r0, [r7, #12]
80092fe: f000 f81d bl 800933c <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_ORE;
8009302: 68fb ldr r3, [r7, #12]
8009304: 2208 movs r2, #8
8009306: 645a str r2, [r3, #68] @ 0x44
/* Process Unlocked */
__HAL_UNLOCK(huart);
8009308: 68fb ldr r3, [r7, #12]
800930a: 2200 movs r2, #0
800930c: f883 2040 strb.w r2, [r3, #64] @ 0x40
return HAL_ERROR;
8009310: 2301 movs r3, #1
8009312: e00f b.n 8009334 <UART_WaitOnFlagUntilTimeout+0xaa>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8009314: 68fb ldr r3, [r7, #12]
8009316: 681b ldr r3, [r3, #0]
8009318: 681a ldr r2, [r3, #0]
800931a: 68bb ldr r3, [r7, #8]
800931c: 4013 ands r3, r2
800931e: 68ba ldr r2, [r7, #8]
8009320: 429a cmp r2, r3
8009322: bf0c ite eq
8009324: 2301 moveq r3, #1
8009326: 2300 movne r3, #0
8009328: b2db uxtb r3, r3
800932a: 461a mov r2, r3
800932c: 79fb ldrb r3, [r7, #7]
800932e: 429a cmp r2, r3
8009330: d0b4 beq.n 800929c <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
8009332: 2300 movs r3, #0
}
8009334: 4618 mov r0, r3
8009336: 3718 adds r7, #24
8009338: 46bd mov sp, r7
800933a: bd80 pop {r7, pc}
0800933c <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
800933c: b480 push {r7}
800933e: b095 sub sp, #84 @ 0x54
8009340: af00 add r7, sp, #0
8009342: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
8009344: 687b ldr r3, [r7, #4]
8009346: 681b ldr r3, [r3, #0]
8009348: 330c adds r3, #12
800934a: 637b str r3, [r7, #52] @ 0x34
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800934c: 6b7b ldr r3, [r7, #52] @ 0x34
800934e: e853 3f00 ldrex r3, [r3]
8009352: 633b str r3, [r7, #48] @ 0x30
return(result);
8009354: 6b3b ldr r3, [r7, #48] @ 0x30
8009356: f423 7390 bic.w r3, r3, #288 @ 0x120
800935a: 64fb str r3, [r7, #76] @ 0x4c
800935c: 687b ldr r3, [r7, #4]
800935e: 681b ldr r3, [r3, #0]
8009360: 330c adds r3, #12
8009362: 6cfa ldr r2, [r7, #76] @ 0x4c
8009364: 643a str r2, [r7, #64] @ 0x40
8009366: 63fb str r3, [r7, #60] @ 0x3c
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009368: 6bf9 ldr r1, [r7, #60] @ 0x3c
800936a: 6c3a ldr r2, [r7, #64] @ 0x40
800936c: e841 2300 strex r3, r2, [r1]
8009370: 63bb str r3, [r7, #56] @ 0x38
return(result);
8009372: 6bbb ldr r3, [r7, #56] @ 0x38
8009374: 2b00 cmp r3, #0
8009376: d1e5 bne.n 8009344 <UART_EndRxTransfer+0x8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8009378: 687b ldr r3, [r7, #4]
800937a: 681b ldr r3, [r3, #0]
800937c: 3314 adds r3, #20
800937e: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009380: 6a3b ldr r3, [r7, #32]
8009382: e853 3f00 ldrex r3, [r3]
8009386: 61fb str r3, [r7, #28]
return(result);
8009388: 69fb ldr r3, [r7, #28]
800938a: f023 0301 bic.w r3, r3, #1
800938e: 64bb str r3, [r7, #72] @ 0x48
8009390: 687b ldr r3, [r7, #4]
8009392: 681b ldr r3, [r3, #0]
8009394: 3314 adds r3, #20
8009396: 6cba ldr r2, [r7, #72] @ 0x48
8009398: 62fa str r2, [r7, #44] @ 0x2c
800939a: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800939c: 6ab9 ldr r1, [r7, #40] @ 0x28
800939e: 6afa ldr r2, [r7, #44] @ 0x2c
80093a0: e841 2300 strex r3, r2, [r1]
80093a4: 627b str r3, [r7, #36] @ 0x24
return(result);
80093a6: 6a7b ldr r3, [r7, #36] @ 0x24
80093a8: 2b00 cmp r3, #0
80093aa: d1e5 bne.n 8009378 <UART_EndRxTransfer+0x3c>
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
80093ac: 687b ldr r3, [r7, #4]
80093ae: 6b1b ldr r3, [r3, #48] @ 0x30
80093b0: 2b01 cmp r3, #1
80093b2: d119 bne.n 80093e8 <UART_EndRxTransfer+0xac>
{
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
80093b4: 687b ldr r3, [r7, #4]
80093b6: 681b ldr r3, [r3, #0]
80093b8: 330c adds r3, #12
80093ba: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
80093bc: 68fb ldr r3, [r7, #12]
80093be: e853 3f00 ldrex r3, [r3]
80093c2: 60bb str r3, [r7, #8]
return(result);
80093c4: 68bb ldr r3, [r7, #8]
80093c6: f023 0310 bic.w r3, r3, #16
80093ca: 647b str r3, [r7, #68] @ 0x44
80093cc: 687b ldr r3, [r7, #4]
80093ce: 681b ldr r3, [r3, #0]
80093d0: 330c adds r3, #12
80093d2: 6c7a ldr r2, [r7, #68] @ 0x44
80093d4: 61ba str r2, [r7, #24]
80093d6: 617b str r3, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80093d8: 6979 ldr r1, [r7, #20]
80093da: 69ba ldr r2, [r7, #24]
80093dc: e841 2300 strex r3, r2, [r1]
80093e0: 613b str r3, [r7, #16]
return(result);
80093e2: 693b ldr r3, [r7, #16]
80093e4: 2b00 cmp r3, #0
80093e6: d1e5 bne.n 80093b4 <UART_EndRxTransfer+0x78>
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
80093e8: 687b ldr r3, [r7, #4]
80093ea: 2220 movs r2, #32
80093ec: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
80093f0: 687b ldr r3, [r7, #4]
80093f2: 2200 movs r2, #0
80093f4: 631a str r2, [r3, #48] @ 0x30
}
80093f6: bf00 nop
80093f8: 3754 adds r7, #84 @ 0x54
80093fa: 46bd mov sp, r7
80093fc: bc80 pop {r7}
80093fe: 4770 bx lr
08009400 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8009400: b580 push {r7, lr}
8009402: b084 sub sp, #16
8009404: af00 add r7, sp, #0
8009406: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8009408: 687b ldr r3, [r7, #4]
800940a: 681b ldr r3, [r3, #0]
800940c: 691b ldr r3, [r3, #16]
800940e: f423 5140 bic.w r1, r3, #12288 @ 0x3000
8009412: 687b ldr r3, [r7, #4]
8009414: 68da ldr r2, [r3, #12]
8009416: 687b ldr r3, [r7, #4]
8009418: 681b ldr r3, [r3, #0]
800941a: 430a orrs r2, r1
800941c: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
800941e: 687b ldr r3, [r7, #4]
8009420: 689a ldr r2, [r3, #8]
8009422: 687b ldr r3, [r7, #4]
8009424: 691b ldr r3, [r3, #16]
8009426: 431a orrs r2, r3
8009428: 687b ldr r3, [r7, #4]
800942a: 695b ldr r3, [r3, #20]
800942c: 4313 orrs r3, r2
800942e: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8009430: 687b ldr r3, [r7, #4]
8009432: 681b ldr r3, [r3, #0]
8009434: 68db ldr r3, [r3, #12]
8009436: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
800943a: f023 030c bic.w r3, r3, #12
800943e: 687a ldr r2, [r7, #4]
8009440: 6812 ldr r2, [r2, #0]
8009442: 68b9 ldr r1, [r7, #8]
8009444: 430b orrs r3, r1
8009446: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8009448: 687b ldr r3, [r7, #4]
800944a: 681b ldr r3, [r3, #0]
800944c: 695b ldr r3, [r3, #20]
800944e: f423 7140 bic.w r1, r3, #768 @ 0x300
8009452: 687b ldr r3, [r7, #4]
8009454: 699a ldr r2, [r3, #24]
8009456: 687b ldr r3, [r7, #4]
8009458: 681b ldr r3, [r3, #0]
800945a: 430a orrs r2, r1
800945c: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
800945e: 687b ldr r3, [r7, #4]
8009460: 681b ldr r3, [r3, #0]
8009462: 4a2c ldr r2, [pc, #176] @ (8009514 <UART_SetConfig+0x114>)
8009464: 4293 cmp r3, r2
8009466: d103 bne.n 8009470 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8009468: f7fe fede bl 8008228 <HAL_RCC_GetPCLK2Freq>
800946c: 60f8 str r0, [r7, #12]
800946e: e002 b.n 8009476 <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8009470: f7fe fec6 bl 8008200 <HAL_RCC_GetPCLK1Freq>
8009474: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8009476: 68fa ldr r2, [r7, #12]
8009478: 4613 mov r3, r2
800947a: 009b lsls r3, r3, #2
800947c: 4413 add r3, r2
800947e: 009a lsls r2, r3, #2
8009480: 441a add r2, r3
8009482: 687b ldr r3, [r7, #4]
8009484: 685b ldr r3, [r3, #4]
8009486: 009b lsls r3, r3, #2
8009488: fbb2 f3f3 udiv r3, r2, r3
800948c: 4a22 ldr r2, [pc, #136] @ (8009518 <UART_SetConfig+0x118>)
800948e: fba2 2303 umull r2, r3, r2, r3
8009492: 095b lsrs r3, r3, #5
8009494: 0119 lsls r1, r3, #4
8009496: 68fa ldr r2, [r7, #12]
8009498: 4613 mov r3, r2
800949a: 009b lsls r3, r3, #2
800949c: 4413 add r3, r2
800949e: 009a lsls r2, r3, #2
80094a0: 441a add r2, r3
80094a2: 687b ldr r3, [r7, #4]
80094a4: 685b ldr r3, [r3, #4]
80094a6: 009b lsls r3, r3, #2
80094a8: fbb2 f2f3 udiv r2, r2, r3
80094ac: 4b1a ldr r3, [pc, #104] @ (8009518 <UART_SetConfig+0x118>)
80094ae: fba3 0302 umull r0, r3, r3, r2
80094b2: 095b lsrs r3, r3, #5
80094b4: 2064 movs r0, #100 @ 0x64
80094b6: fb00 f303 mul.w r3, r0, r3
80094ba: 1ad3 subs r3, r2, r3
80094bc: 011b lsls r3, r3, #4
80094be: 3332 adds r3, #50 @ 0x32
80094c0: 4a15 ldr r2, [pc, #84] @ (8009518 <UART_SetConfig+0x118>)
80094c2: fba2 2303 umull r2, r3, r2, r3
80094c6: 095b lsrs r3, r3, #5
80094c8: f003 03f0 and.w r3, r3, #240 @ 0xf0
80094cc: 4419 add r1, r3
80094ce: 68fa ldr r2, [r7, #12]
80094d0: 4613 mov r3, r2
80094d2: 009b lsls r3, r3, #2
80094d4: 4413 add r3, r2
80094d6: 009a lsls r2, r3, #2
80094d8: 441a add r2, r3
80094da: 687b ldr r3, [r7, #4]
80094dc: 685b ldr r3, [r3, #4]
80094de: 009b lsls r3, r3, #2
80094e0: fbb2 f2f3 udiv r2, r2, r3
80094e4: 4b0c ldr r3, [pc, #48] @ (8009518 <UART_SetConfig+0x118>)
80094e6: fba3 0302 umull r0, r3, r3, r2
80094ea: 095b lsrs r3, r3, #5
80094ec: 2064 movs r0, #100 @ 0x64
80094ee: fb00 f303 mul.w r3, r0, r3
80094f2: 1ad3 subs r3, r2, r3
80094f4: 011b lsls r3, r3, #4
80094f6: 3332 adds r3, #50 @ 0x32
80094f8: 4a07 ldr r2, [pc, #28] @ (8009518 <UART_SetConfig+0x118>)
80094fa: fba2 2303 umull r2, r3, r2, r3
80094fe: 095b lsrs r3, r3, #5
8009500: f003 020f and.w r2, r3, #15
8009504: 687b ldr r3, [r7, #4]
8009506: 681b ldr r3, [r3, #0]
8009508: 440a add r2, r1
800950a: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
800950c: bf00 nop
800950e: 3710 adds r7, #16
8009510: 46bd mov sp, r7
8009512: bd80 pop {r7, pc}
8009514: 40013800 .word 0x40013800
8009518: 51eb851f .word 0x51eb851f
0800951c <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
800951c: b480 push {r7}
800951e: b085 sub sp, #20
8009520: af00 add r7, sp, #0
8009522: 60f8 str r0, [r7, #12]
8009524: 4638 mov r0, r7
8009526: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800952a: 2300 movs r3, #0
}
800952c: 4618 mov r0, r3
800952e: 3714 adds r7, #20
8009530: 46bd mov sp, r7
8009532: bc80 pop {r7}
8009534: 4770 bx lr
08009536 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8009536: b480 push {r7}
8009538: b085 sub sp, #20
800953a: af00 add r7, sp, #0
800953c: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
800953e: 687b ldr r3, [r7, #4]
8009540: 2200 movs r2, #0
8009542: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009546: f44f 433f mov.w r3, #48896 @ 0xbf00
800954a: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
800954c: 68fb ldr r3, [r7, #12]
800954e: b29a uxth r2, r3
8009550: 687b ldr r3, [r7, #4]
8009552: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009556: 2300 movs r3, #0
}
8009558: 4618 mov r0, r3
800955a: 3714 adds r7, #20
800955c: 46bd mov sp, r7
800955e: bc80 pop {r7}
8009560: 4770 bx lr
08009562 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8009562: b480 push {r7}
8009564: b085 sub sp, #20
8009566: af00 add r7, sp, #0
8009568: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
800956a: f44f 433f mov.w r3, #48896 @ 0xbf00
800956e: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8009570: 687b ldr r3, [r7, #4]
8009572: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8009576: b29a uxth r2, r3
8009578: 68fb ldr r3, [r7, #12]
800957a: b29b uxth r3, r3
800957c: 43db mvns r3, r3
800957e: b29b uxth r3, r3
8009580: 4013 ands r3, r2
8009582: b29a uxth r2, r3
8009584: 687b ldr r3, [r7, #4]
8009586: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
800958a: 2300 movs r3, #0
}
800958c: 4618 mov r0, r3
800958e: 3714 adds r7, #20
8009590: 46bd mov sp, r7
8009592: bc80 pop {r7}
8009594: 4770 bx lr
08009596 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8009596: b480 push {r7}
8009598: b083 sub sp, #12
800959a: af00 add r7, sp, #0
800959c: 6078 str r0, [r7, #4]
800959e: 460b mov r3, r1
80095a0: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80095a2: 2300 movs r3, #0
}
80095a4: 4618 mov r0, r3
80095a6: 370c adds r7, #12
80095a8: 46bd mov sp, r7
80095aa: bc80 pop {r7}
80095ac: 4770 bx lr
080095ae <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
80095ae: b480 push {r7}
80095b0: b085 sub sp, #20
80095b2: af00 add r7, sp, #0
80095b4: 60f8 str r0, [r7, #12]
80095b6: 4638 mov r0, r7
80095b8: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
80095bc: 68fb ldr r3, [r7, #12]
80095be: 2201 movs r2, #1
80095c0: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
80095c4: 68fb ldr r3, [r7, #12]
80095c6: 2200 movs r2, #0
80095c8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
80095cc: 68fb ldr r3, [r7, #12]
80095ce: 2200 movs r2, #0
80095d0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
80095d4: 68fb ldr r3, [r7, #12]
80095d6: 2200 movs r2, #0
80095d8: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
80095dc: 2300 movs r3, #0
}
80095de: 4618 mov r0, r3
80095e0: 3714 adds r7, #20
80095e2: 46bd mov sp, r7
80095e4: bc80 pop {r7}
80095e6: 4770 bx lr
080095e8 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80095e8: b480 push {r7}
80095ea: b09d sub sp, #116 @ 0x74
80095ec: af00 add r7, sp, #0
80095ee: 6078 str r0, [r7, #4]
80095f0: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
80095f2: 2300 movs r3, #0
80095f4: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
80095f8: 687a ldr r2, [r7, #4]
80095fa: 683b ldr r3, [r7, #0]
80095fc: 781b ldrb r3, [r3, #0]
80095fe: 009b lsls r3, r3, #2
8009600: 4413 add r3, r2
8009602: 881b ldrh r3, [r3, #0]
8009604: b29b uxth r3, r3
8009606: f423 43ec bic.w r3, r3, #30208 @ 0x7600
800960a: f023 0370 bic.w r3, r3, #112 @ 0x70
800960e: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8009612: 683b ldr r3, [r7, #0]
8009614: 78db ldrb r3, [r3, #3]
8009616: 2b03 cmp r3, #3
8009618: d81f bhi.n 800965a <USB_ActivateEndpoint+0x72>
800961a: a201 add r2, pc, #4 @ (adr r2, 8009620 <USB_ActivateEndpoint+0x38>)
800961c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009620: 08009631 .word 0x08009631
8009624: 0800964d .word 0x0800964d
8009628: 08009663 .word 0x08009663
800962c: 0800963f .word 0x0800963f
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8009630: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009634: f443 7300 orr.w r3, r3, #512 @ 0x200
8009638: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
800963c: e012 b.n 8009664 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
800963e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009642: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8009646: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
800964a: e00b b.n 8009664 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
800964c: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009650: f443 6380 orr.w r3, r3, #1024 @ 0x400
8009654: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009658: e004 b.n 8009664 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
800965a: 2301 movs r3, #1
800965c: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8009660: e000 b.n 8009664 <USB_ActivateEndpoint+0x7c>
break;
8009662: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8009664: 687a ldr r2, [r7, #4]
8009666: 683b ldr r3, [r7, #0]
8009668: 781b ldrb r3, [r3, #0]
800966a: 009b lsls r3, r3, #2
800966c: 441a add r2, r3
800966e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009672: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009676: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800967a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800967e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009682: b29b uxth r3, r3
8009684: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8009686: 687a ldr r2, [r7, #4]
8009688: 683b ldr r3, [r7, #0]
800968a: 781b ldrb r3, [r3, #0]
800968c: 009b lsls r3, r3, #2
800968e: 4413 add r3, r2
8009690: 881b ldrh r3, [r3, #0]
8009692: b29b uxth r3, r3
8009694: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009698: f023 0370 bic.w r3, r3, #112 @ 0x70
800969c: b29b uxth r3, r3
800969e: 683a ldr r2, [r7, #0]
80096a0: 7812 ldrb r2, [r2, #0]
80096a2: 4313 orrs r3, r2
80096a4: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
80096a8: 687a ldr r2, [r7, #4]
80096aa: 683b ldr r3, [r7, #0]
80096ac: 781b ldrb r3, [r3, #0]
80096ae: 009b lsls r3, r3, #2
80096b0: 441a add r2, r3
80096b2: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
80096b6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80096ba: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80096be: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80096c2: f043 0380 orr.w r3, r3, #128 @ 0x80
80096c6: b29b uxth r3, r3
80096c8: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
80096ca: 683b ldr r3, [r7, #0]
80096cc: 7b1b ldrb r3, [r3, #12]
80096ce: 2b00 cmp r3, #0
80096d0: f040 8178 bne.w 80099c4 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
80096d4: 683b ldr r3, [r7, #0]
80096d6: 785b ldrb r3, [r3, #1]
80096d8: 2b00 cmp r3, #0
80096da: f000 8084 beq.w 80097e6 <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
80096de: 687b ldr r3, [r7, #4]
80096e0: 61bb str r3, [r7, #24]
80096e2: 687b ldr r3, [r7, #4]
80096e4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80096e8: b29b uxth r3, r3
80096ea: 461a mov r2, r3
80096ec: 69bb ldr r3, [r7, #24]
80096ee: 4413 add r3, r2
80096f0: 61bb str r3, [r7, #24]
80096f2: 683b ldr r3, [r7, #0]
80096f4: 781b ldrb r3, [r3, #0]
80096f6: 011a lsls r2, r3, #4
80096f8: 69bb ldr r3, [r7, #24]
80096fa: 4413 add r3, r2
80096fc: f503 6380 add.w r3, r3, #1024 @ 0x400
8009700: 617b str r3, [r7, #20]
8009702: 683b ldr r3, [r7, #0]
8009704: 88db ldrh r3, [r3, #6]
8009706: 085b lsrs r3, r3, #1
8009708: b29b uxth r3, r3
800970a: 005b lsls r3, r3, #1
800970c: b29a uxth r2, r3
800970e: 697b ldr r3, [r7, #20]
8009710: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009712: 687a ldr r2, [r7, #4]
8009714: 683b ldr r3, [r7, #0]
8009716: 781b ldrb r3, [r3, #0]
8009718: 009b lsls r3, r3, #2
800971a: 4413 add r3, r2
800971c: 881b ldrh r3, [r3, #0]
800971e: 827b strh r3, [r7, #18]
8009720: 8a7b ldrh r3, [r7, #18]
8009722: f003 0340 and.w r3, r3, #64 @ 0x40
8009726: 2b00 cmp r3, #0
8009728: d01b beq.n 8009762 <USB_ActivateEndpoint+0x17a>
800972a: 687a ldr r2, [r7, #4]
800972c: 683b ldr r3, [r7, #0]
800972e: 781b ldrb r3, [r3, #0]
8009730: 009b lsls r3, r3, #2
8009732: 4413 add r3, r2
8009734: 881b ldrh r3, [r3, #0]
8009736: b29b uxth r3, r3
8009738: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800973c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009740: 823b strh r3, [r7, #16]
8009742: 687a ldr r2, [r7, #4]
8009744: 683b ldr r3, [r7, #0]
8009746: 781b ldrb r3, [r3, #0]
8009748: 009b lsls r3, r3, #2
800974a: 441a add r2, r3
800974c: 8a3b ldrh r3, [r7, #16]
800974e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009752: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009756: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800975a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800975e: b29b uxth r3, r3
8009760: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009762: 683b ldr r3, [r7, #0]
8009764: 78db ldrb r3, [r3, #3]
8009766: 2b01 cmp r3, #1
8009768: d020 beq.n 80097ac <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800976a: 687a ldr r2, [r7, #4]
800976c: 683b ldr r3, [r7, #0]
800976e: 781b ldrb r3, [r3, #0]
8009770: 009b lsls r3, r3, #2
8009772: 4413 add r3, r2
8009774: 881b ldrh r3, [r3, #0]
8009776: b29b uxth r3, r3
8009778: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800977c: f023 0340 bic.w r3, r3, #64 @ 0x40
8009780: 81bb strh r3, [r7, #12]
8009782: 89bb ldrh r3, [r7, #12]
8009784: f083 0320 eor.w r3, r3, #32
8009788: 81bb strh r3, [r7, #12]
800978a: 687a ldr r2, [r7, #4]
800978c: 683b ldr r3, [r7, #0]
800978e: 781b ldrb r3, [r3, #0]
8009790: 009b lsls r3, r3, #2
8009792: 441a add r2, r3
8009794: 89bb ldrh r3, [r7, #12]
8009796: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800979a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800979e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80097a2: f043 0380 orr.w r3, r3, #128 @ 0x80
80097a6: b29b uxth r3, r3
80097a8: 8013 strh r3, [r2, #0]
80097aa: e2d5 b.n 8009d58 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
80097ac: 687a ldr r2, [r7, #4]
80097ae: 683b ldr r3, [r7, #0]
80097b0: 781b ldrb r3, [r3, #0]
80097b2: 009b lsls r3, r3, #2
80097b4: 4413 add r3, r2
80097b6: 881b ldrh r3, [r3, #0]
80097b8: b29b uxth r3, r3
80097ba: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80097be: f023 0340 bic.w r3, r3, #64 @ 0x40
80097c2: 81fb strh r3, [r7, #14]
80097c4: 687a ldr r2, [r7, #4]
80097c6: 683b ldr r3, [r7, #0]
80097c8: 781b ldrb r3, [r3, #0]
80097ca: 009b lsls r3, r3, #2
80097cc: 441a add r2, r3
80097ce: 89fb ldrh r3, [r7, #14]
80097d0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80097d4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80097d8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80097dc: f043 0380 orr.w r3, r3, #128 @ 0x80
80097e0: b29b uxth r3, r3
80097e2: 8013 strh r3, [r2, #0]
80097e4: e2b8 b.n 8009d58 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
80097e6: 687b ldr r3, [r7, #4]
80097e8: 633b str r3, [r7, #48] @ 0x30
80097ea: 687b ldr r3, [r7, #4]
80097ec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80097f0: b29b uxth r3, r3
80097f2: 461a mov r2, r3
80097f4: 6b3b ldr r3, [r7, #48] @ 0x30
80097f6: 4413 add r3, r2
80097f8: 633b str r3, [r7, #48] @ 0x30
80097fa: 683b ldr r3, [r7, #0]
80097fc: 781b ldrb r3, [r3, #0]
80097fe: 011a lsls r2, r3, #4
8009800: 6b3b ldr r3, [r7, #48] @ 0x30
8009802: 4413 add r3, r2
8009804: f503 6381 add.w r3, r3, #1032 @ 0x408
8009808: 62fb str r3, [r7, #44] @ 0x2c
800980a: 683b ldr r3, [r7, #0]
800980c: 88db ldrh r3, [r3, #6]
800980e: 085b lsrs r3, r3, #1
8009810: b29b uxth r3, r3
8009812: 005b lsls r3, r3, #1
8009814: b29a uxth r2, r3
8009816: 6afb ldr r3, [r7, #44] @ 0x2c
8009818: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
800981a: 687b ldr r3, [r7, #4]
800981c: 62bb str r3, [r7, #40] @ 0x28
800981e: 687b ldr r3, [r7, #4]
8009820: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009824: b29b uxth r3, r3
8009826: 461a mov r2, r3
8009828: 6abb ldr r3, [r7, #40] @ 0x28
800982a: 4413 add r3, r2
800982c: 62bb str r3, [r7, #40] @ 0x28
800982e: 683b ldr r3, [r7, #0]
8009830: 781b ldrb r3, [r3, #0]
8009832: 011a lsls r2, r3, #4
8009834: 6abb ldr r3, [r7, #40] @ 0x28
8009836: 4413 add r3, r2
8009838: f203 430c addw r3, r3, #1036 @ 0x40c
800983c: 627b str r3, [r7, #36] @ 0x24
800983e: 6a7b ldr r3, [r7, #36] @ 0x24
8009840: 881b ldrh r3, [r3, #0]
8009842: b29b uxth r3, r3
8009844: f3c3 0309 ubfx r3, r3, #0, #10
8009848: b29a uxth r2, r3
800984a: 6a7b ldr r3, [r7, #36] @ 0x24
800984c: 801a strh r2, [r3, #0]
800984e: 683b ldr r3, [r7, #0]
8009850: 691b ldr r3, [r3, #16]
8009852: 2b3e cmp r3, #62 @ 0x3e
8009854: d91d bls.n 8009892 <USB_ActivateEndpoint+0x2aa>
8009856: 683b ldr r3, [r7, #0]
8009858: 691b ldr r3, [r3, #16]
800985a: 095b lsrs r3, r3, #5
800985c: 66bb str r3, [r7, #104] @ 0x68
800985e: 683b ldr r3, [r7, #0]
8009860: 691b ldr r3, [r3, #16]
8009862: f003 031f and.w r3, r3, #31
8009866: 2b00 cmp r3, #0
8009868: d102 bne.n 8009870 <USB_ActivateEndpoint+0x288>
800986a: 6ebb ldr r3, [r7, #104] @ 0x68
800986c: 3b01 subs r3, #1
800986e: 66bb str r3, [r7, #104] @ 0x68
8009870: 6a7b ldr r3, [r7, #36] @ 0x24
8009872: 881b ldrh r3, [r3, #0]
8009874: b29a uxth r2, r3
8009876: 6ebb ldr r3, [r7, #104] @ 0x68
8009878: b29b uxth r3, r3
800987a: 029b lsls r3, r3, #10
800987c: b29b uxth r3, r3
800987e: 4313 orrs r3, r2
8009880: b29b uxth r3, r3
8009882: ea6f 4343 mvn.w r3, r3, lsl #17
8009886: ea6f 4353 mvn.w r3, r3, lsr #17
800988a: b29a uxth r2, r3
800988c: 6a7b ldr r3, [r7, #36] @ 0x24
800988e: 801a strh r2, [r3, #0]
8009890: e026 b.n 80098e0 <USB_ActivateEndpoint+0x2f8>
8009892: 683b ldr r3, [r7, #0]
8009894: 691b ldr r3, [r3, #16]
8009896: 2b00 cmp r3, #0
8009898: d10a bne.n 80098b0 <USB_ActivateEndpoint+0x2c8>
800989a: 6a7b ldr r3, [r7, #36] @ 0x24
800989c: 881b ldrh r3, [r3, #0]
800989e: b29b uxth r3, r3
80098a0: ea6f 4343 mvn.w r3, r3, lsl #17
80098a4: ea6f 4353 mvn.w r3, r3, lsr #17
80098a8: b29a uxth r2, r3
80098aa: 6a7b ldr r3, [r7, #36] @ 0x24
80098ac: 801a strh r2, [r3, #0]
80098ae: e017 b.n 80098e0 <USB_ActivateEndpoint+0x2f8>
80098b0: 683b ldr r3, [r7, #0]
80098b2: 691b ldr r3, [r3, #16]
80098b4: 085b lsrs r3, r3, #1
80098b6: 66bb str r3, [r7, #104] @ 0x68
80098b8: 683b ldr r3, [r7, #0]
80098ba: 691b ldr r3, [r3, #16]
80098bc: f003 0301 and.w r3, r3, #1
80098c0: 2b00 cmp r3, #0
80098c2: d002 beq.n 80098ca <USB_ActivateEndpoint+0x2e2>
80098c4: 6ebb ldr r3, [r7, #104] @ 0x68
80098c6: 3301 adds r3, #1
80098c8: 66bb str r3, [r7, #104] @ 0x68
80098ca: 6a7b ldr r3, [r7, #36] @ 0x24
80098cc: 881b ldrh r3, [r3, #0]
80098ce: b29a uxth r2, r3
80098d0: 6ebb ldr r3, [r7, #104] @ 0x68
80098d2: b29b uxth r3, r3
80098d4: 029b lsls r3, r3, #10
80098d6: b29b uxth r3, r3
80098d8: 4313 orrs r3, r2
80098da: b29a uxth r2, r3
80098dc: 6a7b ldr r3, [r7, #36] @ 0x24
80098de: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80098e0: 687a ldr r2, [r7, #4]
80098e2: 683b ldr r3, [r7, #0]
80098e4: 781b ldrb r3, [r3, #0]
80098e6: 009b lsls r3, r3, #2
80098e8: 4413 add r3, r2
80098ea: 881b ldrh r3, [r3, #0]
80098ec: 847b strh r3, [r7, #34] @ 0x22
80098ee: 8c7b ldrh r3, [r7, #34] @ 0x22
80098f0: f403 4380 and.w r3, r3, #16384 @ 0x4000
80098f4: 2b00 cmp r3, #0
80098f6: d01b beq.n 8009930 <USB_ActivateEndpoint+0x348>
80098f8: 687a ldr r2, [r7, #4]
80098fa: 683b ldr r3, [r7, #0]
80098fc: 781b ldrb r3, [r3, #0]
80098fe: 009b lsls r3, r3, #2
8009900: 4413 add r3, r2
8009902: 881b ldrh r3, [r3, #0]
8009904: b29b uxth r3, r3
8009906: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800990a: f023 0370 bic.w r3, r3, #112 @ 0x70
800990e: 843b strh r3, [r7, #32]
8009910: 687a ldr r2, [r7, #4]
8009912: 683b ldr r3, [r7, #0]
8009914: 781b ldrb r3, [r3, #0]
8009916: 009b lsls r3, r3, #2
8009918: 441a add r2, r3
800991a: 8c3b ldrh r3, [r7, #32]
800991c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009920: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009924: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009928: f043 0380 orr.w r3, r3, #128 @ 0x80
800992c: b29b uxth r3, r3
800992e: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8009930: 683b ldr r3, [r7, #0]
8009932: 781b ldrb r3, [r3, #0]
8009934: 2b00 cmp r3, #0
8009936: d124 bne.n 8009982 <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8009938: 687a ldr r2, [r7, #4]
800993a: 683b ldr r3, [r7, #0]
800993c: 781b ldrb r3, [r3, #0]
800993e: 009b lsls r3, r3, #2
8009940: 4413 add r3, r2
8009942: 881b ldrh r3, [r3, #0]
8009944: b29b uxth r3, r3
8009946: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800994a: f023 0370 bic.w r3, r3, #112 @ 0x70
800994e: 83bb strh r3, [r7, #28]
8009950: 8bbb ldrh r3, [r7, #28]
8009952: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8009956: 83bb strh r3, [r7, #28]
8009958: 8bbb ldrh r3, [r7, #28]
800995a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800995e: 83bb strh r3, [r7, #28]
8009960: 687a ldr r2, [r7, #4]
8009962: 683b ldr r3, [r7, #0]
8009964: 781b ldrb r3, [r3, #0]
8009966: 009b lsls r3, r3, #2
8009968: 441a add r2, r3
800996a: 8bbb ldrh r3, [r7, #28]
800996c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009970: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009974: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009978: f043 0380 orr.w r3, r3, #128 @ 0x80
800997c: b29b uxth r3, r3
800997e: 8013 strh r3, [r2, #0]
8009980: e1ea b.n 8009d58 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8009982: 687a ldr r2, [r7, #4]
8009984: 683b ldr r3, [r7, #0]
8009986: 781b ldrb r3, [r3, #0]
8009988: 009b lsls r3, r3, #2
800998a: 4413 add r3, r2
800998c: 881b ldrh r3, [r3, #0]
800998e: b29b uxth r3, r3
8009990: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009994: f023 0370 bic.w r3, r3, #112 @ 0x70
8009998: 83fb strh r3, [r7, #30]
800999a: 8bfb ldrh r3, [r7, #30]
800999c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80099a0: 83fb strh r3, [r7, #30]
80099a2: 687a ldr r2, [r7, #4]
80099a4: 683b ldr r3, [r7, #0]
80099a6: 781b ldrb r3, [r3, #0]
80099a8: 009b lsls r3, r3, #2
80099aa: 441a add r2, r3
80099ac: 8bfb ldrh r3, [r7, #30]
80099ae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80099b2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80099b6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80099ba: f043 0380 orr.w r3, r3, #128 @ 0x80
80099be: b29b uxth r3, r3
80099c0: 8013 strh r3, [r2, #0]
80099c2: e1c9 b.n 8009d58 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
80099c4: 683b ldr r3, [r7, #0]
80099c6: 78db ldrb r3, [r3, #3]
80099c8: 2b02 cmp r3, #2
80099ca: d11e bne.n 8009a0a <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
80099cc: 687a ldr r2, [r7, #4]
80099ce: 683b ldr r3, [r7, #0]
80099d0: 781b ldrb r3, [r3, #0]
80099d2: 009b lsls r3, r3, #2
80099d4: 4413 add r3, r2
80099d6: 881b ldrh r3, [r3, #0]
80099d8: b29b uxth r3, r3
80099da: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80099de: f023 0370 bic.w r3, r3, #112 @ 0x70
80099e2: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
80099e6: 687a ldr r2, [r7, #4]
80099e8: 683b ldr r3, [r7, #0]
80099ea: 781b ldrb r3, [r3, #0]
80099ec: 009b lsls r3, r3, #2
80099ee: 441a add r2, r3
80099f0: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
80099f4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80099f8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80099fc: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8009a00: f043 0380 orr.w r3, r3, #128 @ 0x80
8009a04: b29b uxth r3, r3
8009a06: 8013 strh r3, [r2, #0]
8009a08: e01d b.n 8009a46 <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
8009a0a: 687a ldr r2, [r7, #4]
8009a0c: 683b ldr r3, [r7, #0]
8009a0e: 781b ldrb r3, [r3, #0]
8009a10: 009b lsls r3, r3, #2
8009a12: 4413 add r3, r2
8009a14: 881b ldrh r3, [r3, #0]
8009a16: b29b uxth r3, r3
8009a18: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8009a1c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009a20: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
8009a24: 687a ldr r2, [r7, #4]
8009a26: 683b ldr r3, [r7, #0]
8009a28: 781b ldrb r3, [r3, #0]
8009a2a: 009b lsls r3, r3, #2
8009a2c: 441a add r2, r3
8009a2e: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8009a32: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009a36: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009a3a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009a3e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009a42: b29b uxth r3, r3
8009a44: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
8009a46: 687b ldr r3, [r7, #4]
8009a48: 65fb str r3, [r7, #92] @ 0x5c
8009a4a: 687b ldr r3, [r7, #4]
8009a4c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009a50: b29b uxth r3, r3
8009a52: 461a mov r2, r3
8009a54: 6dfb ldr r3, [r7, #92] @ 0x5c
8009a56: 4413 add r3, r2
8009a58: 65fb str r3, [r7, #92] @ 0x5c
8009a5a: 683b ldr r3, [r7, #0]
8009a5c: 781b ldrb r3, [r3, #0]
8009a5e: 011a lsls r2, r3, #4
8009a60: 6dfb ldr r3, [r7, #92] @ 0x5c
8009a62: 4413 add r3, r2
8009a64: f503 6380 add.w r3, r3, #1024 @ 0x400
8009a68: 65bb str r3, [r7, #88] @ 0x58
8009a6a: 683b ldr r3, [r7, #0]
8009a6c: 891b ldrh r3, [r3, #8]
8009a6e: 085b lsrs r3, r3, #1
8009a70: b29b uxth r3, r3
8009a72: 005b lsls r3, r3, #1
8009a74: b29a uxth r2, r3
8009a76: 6dbb ldr r3, [r7, #88] @ 0x58
8009a78: 801a strh r2, [r3, #0]
8009a7a: 687b ldr r3, [r7, #4]
8009a7c: 657b str r3, [r7, #84] @ 0x54
8009a7e: 687b ldr r3, [r7, #4]
8009a80: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009a84: b29b uxth r3, r3
8009a86: 461a mov r2, r3
8009a88: 6d7b ldr r3, [r7, #84] @ 0x54
8009a8a: 4413 add r3, r2
8009a8c: 657b str r3, [r7, #84] @ 0x54
8009a8e: 683b ldr r3, [r7, #0]
8009a90: 781b ldrb r3, [r3, #0]
8009a92: 011a lsls r2, r3, #4
8009a94: 6d7b ldr r3, [r7, #84] @ 0x54
8009a96: 4413 add r3, r2
8009a98: f503 6381 add.w r3, r3, #1032 @ 0x408
8009a9c: 653b str r3, [r7, #80] @ 0x50
8009a9e: 683b ldr r3, [r7, #0]
8009aa0: 895b ldrh r3, [r3, #10]
8009aa2: 085b lsrs r3, r3, #1
8009aa4: b29b uxth r3, r3
8009aa6: 005b lsls r3, r3, #1
8009aa8: b29a uxth r2, r3
8009aaa: 6d3b ldr r3, [r7, #80] @ 0x50
8009aac: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
8009aae: 683b ldr r3, [r7, #0]
8009ab0: 785b ldrb r3, [r3, #1]
8009ab2: 2b00 cmp r3, #0
8009ab4: f040 8093 bne.w 8009bde <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009ab8: 687a ldr r2, [r7, #4]
8009aba: 683b ldr r3, [r7, #0]
8009abc: 781b ldrb r3, [r3, #0]
8009abe: 009b lsls r3, r3, #2
8009ac0: 4413 add r3, r2
8009ac2: 881b ldrh r3, [r3, #0]
8009ac4: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
8009ac8: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8009acc: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009ad0: 2b00 cmp r3, #0
8009ad2: d01b beq.n 8009b0c <USB_ActivateEndpoint+0x524>
8009ad4: 687a ldr r2, [r7, #4]
8009ad6: 683b ldr r3, [r7, #0]
8009ad8: 781b ldrb r3, [r3, #0]
8009ada: 009b lsls r3, r3, #2
8009adc: 4413 add r3, r2
8009ade: 881b ldrh r3, [r3, #0]
8009ae0: b29b uxth r3, r3
8009ae2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009ae6: f023 0370 bic.w r3, r3, #112 @ 0x70
8009aea: 87fb strh r3, [r7, #62] @ 0x3e
8009aec: 687a ldr r2, [r7, #4]
8009aee: 683b ldr r3, [r7, #0]
8009af0: 781b ldrb r3, [r3, #0]
8009af2: 009b lsls r3, r3, #2
8009af4: 441a add r2, r3
8009af6: 8ffb ldrh r3, [r7, #62] @ 0x3e
8009af8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009afc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009b00: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009b04: f043 0380 orr.w r3, r3, #128 @ 0x80
8009b08: b29b uxth r3, r3
8009b0a: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009b0c: 687a ldr r2, [r7, #4]
8009b0e: 683b ldr r3, [r7, #0]
8009b10: 781b ldrb r3, [r3, #0]
8009b12: 009b lsls r3, r3, #2
8009b14: 4413 add r3, r2
8009b16: 881b ldrh r3, [r3, #0]
8009b18: 87bb strh r3, [r7, #60] @ 0x3c
8009b1a: 8fbb ldrh r3, [r7, #60] @ 0x3c
8009b1c: f003 0340 and.w r3, r3, #64 @ 0x40
8009b20: 2b00 cmp r3, #0
8009b22: d01b beq.n 8009b5c <USB_ActivateEndpoint+0x574>
8009b24: 687a ldr r2, [r7, #4]
8009b26: 683b ldr r3, [r7, #0]
8009b28: 781b ldrb r3, [r3, #0]
8009b2a: 009b lsls r3, r3, #2
8009b2c: 4413 add r3, r2
8009b2e: 881b ldrh r3, [r3, #0]
8009b30: b29b uxth r3, r3
8009b32: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009b36: f023 0370 bic.w r3, r3, #112 @ 0x70
8009b3a: 877b strh r3, [r7, #58] @ 0x3a
8009b3c: 687a ldr r2, [r7, #4]
8009b3e: 683b ldr r3, [r7, #0]
8009b40: 781b ldrb r3, [r3, #0]
8009b42: 009b lsls r3, r3, #2
8009b44: 441a add r2, r3
8009b46: 8f7b ldrh r3, [r7, #58] @ 0x3a
8009b48: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009b4c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009b50: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009b54: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009b58: b29b uxth r3, r3
8009b5a: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8009b5c: 687a ldr r2, [r7, #4]
8009b5e: 683b ldr r3, [r7, #0]
8009b60: 781b ldrb r3, [r3, #0]
8009b62: 009b lsls r3, r3, #2
8009b64: 4413 add r3, r2
8009b66: 881b ldrh r3, [r3, #0]
8009b68: b29b uxth r3, r3
8009b6a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009b6e: f023 0370 bic.w r3, r3, #112 @ 0x70
8009b72: 873b strh r3, [r7, #56] @ 0x38
8009b74: 8f3b ldrh r3, [r7, #56] @ 0x38
8009b76: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8009b7a: 873b strh r3, [r7, #56] @ 0x38
8009b7c: 8f3b ldrh r3, [r7, #56] @ 0x38
8009b7e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009b82: 873b strh r3, [r7, #56] @ 0x38
8009b84: 687a ldr r2, [r7, #4]
8009b86: 683b ldr r3, [r7, #0]
8009b88: 781b ldrb r3, [r3, #0]
8009b8a: 009b lsls r3, r3, #2
8009b8c: 441a add r2, r3
8009b8e: 8f3b ldrh r3, [r7, #56] @ 0x38
8009b90: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009b94: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009b98: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009b9c: f043 0380 orr.w r3, r3, #128 @ 0x80
8009ba0: b29b uxth r3, r3
8009ba2: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009ba4: 687a ldr r2, [r7, #4]
8009ba6: 683b ldr r3, [r7, #0]
8009ba8: 781b ldrb r3, [r3, #0]
8009baa: 009b lsls r3, r3, #2
8009bac: 4413 add r3, r2
8009bae: 881b ldrh r3, [r3, #0]
8009bb0: b29b uxth r3, r3
8009bb2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009bb6: f023 0340 bic.w r3, r3, #64 @ 0x40
8009bba: 86fb strh r3, [r7, #54] @ 0x36
8009bbc: 687a ldr r2, [r7, #4]
8009bbe: 683b ldr r3, [r7, #0]
8009bc0: 781b ldrb r3, [r3, #0]
8009bc2: 009b lsls r3, r3, #2
8009bc4: 441a add r2, r3
8009bc6: 8efb ldrh r3, [r7, #54] @ 0x36
8009bc8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009bcc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009bd0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009bd4: f043 0380 orr.w r3, r3, #128 @ 0x80
8009bd8: b29b uxth r3, r3
8009bda: 8013 strh r3, [r2, #0]
8009bdc: e0bc b.n 8009d58 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009bde: 687a ldr r2, [r7, #4]
8009be0: 683b ldr r3, [r7, #0]
8009be2: 781b ldrb r3, [r3, #0]
8009be4: 009b lsls r3, r3, #2
8009be6: 4413 add r3, r2
8009be8: 881b ldrh r3, [r3, #0]
8009bea: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8009bee: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8009bf2: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009bf6: 2b00 cmp r3, #0
8009bf8: d01d beq.n 8009c36 <USB_ActivateEndpoint+0x64e>
8009bfa: 687a ldr r2, [r7, #4]
8009bfc: 683b ldr r3, [r7, #0]
8009bfe: 781b ldrb r3, [r3, #0]
8009c00: 009b lsls r3, r3, #2
8009c02: 4413 add r3, r2
8009c04: 881b ldrh r3, [r3, #0]
8009c06: b29b uxth r3, r3
8009c08: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009c0c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009c10: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
8009c14: 687a ldr r2, [r7, #4]
8009c16: 683b ldr r3, [r7, #0]
8009c18: 781b ldrb r3, [r3, #0]
8009c1a: 009b lsls r3, r3, #2
8009c1c: 441a add r2, r3
8009c1e: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
8009c22: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009c26: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009c2a: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009c2e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009c32: b29b uxth r3, r3
8009c34: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009c36: 687a ldr r2, [r7, #4]
8009c38: 683b ldr r3, [r7, #0]
8009c3a: 781b ldrb r3, [r3, #0]
8009c3c: 009b lsls r3, r3, #2
8009c3e: 4413 add r3, r2
8009c40: 881b ldrh r3, [r3, #0]
8009c42: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
8009c46: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8009c4a: f003 0340 and.w r3, r3, #64 @ 0x40
8009c4e: 2b00 cmp r3, #0
8009c50: d01d beq.n 8009c8e <USB_ActivateEndpoint+0x6a6>
8009c52: 687a ldr r2, [r7, #4]
8009c54: 683b ldr r3, [r7, #0]
8009c56: 781b ldrb r3, [r3, #0]
8009c58: 009b lsls r3, r3, #2
8009c5a: 4413 add r3, r2
8009c5c: 881b ldrh r3, [r3, #0]
8009c5e: b29b uxth r3, r3
8009c60: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009c64: f023 0370 bic.w r3, r3, #112 @ 0x70
8009c68: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8009c6c: 687a ldr r2, [r7, #4]
8009c6e: 683b ldr r3, [r7, #0]
8009c70: 781b ldrb r3, [r3, #0]
8009c72: 009b lsls r3, r3, #2
8009c74: 441a add r2, r3
8009c76: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
8009c7a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009c7e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009c82: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009c86: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009c8a: b29b uxth r3, r3
8009c8c: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009c8e: 683b ldr r3, [r7, #0]
8009c90: 78db ldrb r3, [r3, #3]
8009c92: 2b01 cmp r3, #1
8009c94: d024 beq.n 8009ce0 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8009c96: 687a ldr r2, [r7, #4]
8009c98: 683b ldr r3, [r7, #0]
8009c9a: 781b ldrb r3, [r3, #0]
8009c9c: 009b lsls r3, r3, #2
8009c9e: 4413 add r3, r2
8009ca0: 881b ldrh r3, [r3, #0]
8009ca2: b29b uxth r3, r3
8009ca4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009ca8: f023 0340 bic.w r3, r3, #64 @ 0x40
8009cac: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8009cb0: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8009cb4: f083 0320 eor.w r3, r3, #32
8009cb8: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8009cbc: 687a ldr r2, [r7, #4]
8009cbe: 683b ldr r3, [r7, #0]
8009cc0: 781b ldrb r3, [r3, #0]
8009cc2: 009b lsls r3, r3, #2
8009cc4: 441a add r2, r3
8009cc6: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8009cca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009cce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009cd2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009cd6: f043 0380 orr.w r3, r3, #128 @ 0x80
8009cda: b29b uxth r3, r3
8009cdc: 8013 strh r3, [r2, #0]
8009cde: e01d b.n 8009d1c <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009ce0: 687a ldr r2, [r7, #4]
8009ce2: 683b ldr r3, [r7, #0]
8009ce4: 781b ldrb r3, [r3, #0]
8009ce6: 009b lsls r3, r3, #2
8009ce8: 4413 add r3, r2
8009cea: 881b ldrh r3, [r3, #0]
8009cec: b29b uxth r3, r3
8009cee: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009cf2: f023 0340 bic.w r3, r3, #64 @ 0x40
8009cf6: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
8009cfa: 687a ldr r2, [r7, #4]
8009cfc: 683b ldr r3, [r7, #0]
8009cfe: 781b ldrb r3, [r3, #0]
8009d00: 009b lsls r3, r3, #2
8009d02: 441a add r2, r3
8009d04: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8009d08: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d0c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d10: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d14: f043 0380 orr.w r3, r3, #128 @ 0x80
8009d18: b29b uxth r3, r3
8009d1a: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009d1c: 687a ldr r2, [r7, #4]
8009d1e: 683b ldr r3, [r7, #0]
8009d20: 781b ldrb r3, [r3, #0]
8009d22: 009b lsls r3, r3, #2
8009d24: 4413 add r3, r2
8009d26: 881b ldrh r3, [r3, #0]
8009d28: b29b uxth r3, r3
8009d2a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009d2e: f023 0370 bic.w r3, r3, #112 @ 0x70
8009d32: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
8009d36: 687a ldr r2, [r7, #4]
8009d38: 683b ldr r3, [r7, #0]
8009d3a: 781b ldrb r3, [r3, #0]
8009d3c: 009b lsls r3, r3, #2
8009d3e: 441a add r2, r3
8009d40: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8009d44: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d48: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d4c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d50: f043 0380 orr.w r3, r3, #128 @ 0x80
8009d54: b29b uxth r3, r3
8009d56: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
8009d58: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
8009d5c: 4618 mov r0, r3
8009d5e: 3774 adds r7, #116 @ 0x74
8009d60: 46bd mov sp, r7
8009d62: bc80 pop {r7}
8009d64: 4770 bx lr
8009d66: bf00 nop
08009d68 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8009d68: b480 push {r7}
8009d6a: b08d sub sp, #52 @ 0x34
8009d6c: af00 add r7, sp, #0
8009d6e: 6078 str r0, [r7, #4]
8009d70: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8009d72: 683b ldr r3, [r7, #0]
8009d74: 7b1b ldrb r3, [r3, #12]
8009d76: 2b00 cmp r3, #0
8009d78: f040 808e bne.w 8009e98 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
8009d7c: 683b ldr r3, [r7, #0]
8009d7e: 785b ldrb r3, [r3, #1]
8009d80: 2b00 cmp r3, #0
8009d82: d044 beq.n 8009e0e <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009d84: 687a ldr r2, [r7, #4]
8009d86: 683b ldr r3, [r7, #0]
8009d88: 781b ldrb r3, [r3, #0]
8009d8a: 009b lsls r3, r3, #2
8009d8c: 4413 add r3, r2
8009d8e: 881b ldrh r3, [r3, #0]
8009d90: 81bb strh r3, [r7, #12]
8009d92: 89bb ldrh r3, [r7, #12]
8009d94: f003 0340 and.w r3, r3, #64 @ 0x40
8009d98: 2b00 cmp r3, #0
8009d9a: d01b beq.n 8009dd4 <USB_DeactivateEndpoint+0x6c>
8009d9c: 687a ldr r2, [r7, #4]
8009d9e: 683b ldr r3, [r7, #0]
8009da0: 781b ldrb r3, [r3, #0]
8009da2: 009b lsls r3, r3, #2
8009da4: 4413 add r3, r2
8009da6: 881b ldrh r3, [r3, #0]
8009da8: b29b uxth r3, r3
8009daa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009dae: f023 0370 bic.w r3, r3, #112 @ 0x70
8009db2: 817b strh r3, [r7, #10]
8009db4: 687a ldr r2, [r7, #4]
8009db6: 683b ldr r3, [r7, #0]
8009db8: 781b ldrb r3, [r3, #0]
8009dba: 009b lsls r3, r3, #2
8009dbc: 441a add r2, r3
8009dbe: 897b ldrh r3, [r7, #10]
8009dc0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009dc4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009dc8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009dcc: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009dd0: b29b uxth r3, r3
8009dd2: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009dd4: 687a ldr r2, [r7, #4]
8009dd6: 683b ldr r3, [r7, #0]
8009dd8: 781b ldrb r3, [r3, #0]
8009dda: 009b lsls r3, r3, #2
8009ddc: 4413 add r3, r2
8009dde: 881b ldrh r3, [r3, #0]
8009de0: b29b uxth r3, r3
8009de2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009de6: f023 0340 bic.w r3, r3, #64 @ 0x40
8009dea: 813b strh r3, [r7, #8]
8009dec: 687a ldr r2, [r7, #4]
8009dee: 683b ldr r3, [r7, #0]
8009df0: 781b ldrb r3, [r3, #0]
8009df2: 009b lsls r3, r3, #2
8009df4: 441a add r2, r3
8009df6: 893b ldrh r3, [r7, #8]
8009df8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009dfc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e00: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009e04: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e08: b29b uxth r3, r3
8009e0a: 8013 strh r3, [r2, #0]
8009e0c: e192 b.n 800a134 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009e0e: 687a ldr r2, [r7, #4]
8009e10: 683b ldr r3, [r7, #0]
8009e12: 781b ldrb r3, [r3, #0]
8009e14: 009b lsls r3, r3, #2
8009e16: 4413 add r3, r2
8009e18: 881b ldrh r3, [r3, #0]
8009e1a: 827b strh r3, [r7, #18]
8009e1c: 8a7b ldrh r3, [r7, #18]
8009e1e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009e22: 2b00 cmp r3, #0
8009e24: d01b beq.n 8009e5e <USB_DeactivateEndpoint+0xf6>
8009e26: 687a ldr r2, [r7, #4]
8009e28: 683b ldr r3, [r7, #0]
8009e2a: 781b ldrb r3, [r3, #0]
8009e2c: 009b lsls r3, r3, #2
8009e2e: 4413 add r3, r2
8009e30: 881b ldrh r3, [r3, #0]
8009e32: b29b uxth r3, r3
8009e34: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009e38: f023 0370 bic.w r3, r3, #112 @ 0x70
8009e3c: 823b strh r3, [r7, #16]
8009e3e: 687a ldr r2, [r7, #4]
8009e40: 683b ldr r3, [r7, #0]
8009e42: 781b ldrb r3, [r3, #0]
8009e44: 009b lsls r3, r3, #2
8009e46: 441a add r2, r3
8009e48: 8a3b ldrh r3, [r7, #16]
8009e4a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e4e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e52: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009e56: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e5a: b29b uxth r3, r3
8009e5c: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009e5e: 687a ldr r2, [r7, #4]
8009e60: 683b ldr r3, [r7, #0]
8009e62: 781b ldrb r3, [r3, #0]
8009e64: 009b lsls r3, r3, #2
8009e66: 4413 add r3, r2
8009e68: 881b ldrh r3, [r3, #0]
8009e6a: b29b uxth r3, r3
8009e6c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009e70: f023 0370 bic.w r3, r3, #112 @ 0x70
8009e74: 81fb strh r3, [r7, #14]
8009e76: 687a ldr r2, [r7, #4]
8009e78: 683b ldr r3, [r7, #0]
8009e7a: 781b ldrb r3, [r3, #0]
8009e7c: 009b lsls r3, r3, #2
8009e7e: 441a add r2, r3
8009e80: 89fb ldrh r3, [r7, #14]
8009e82: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e86: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e8a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009e8e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e92: b29b uxth r3, r3
8009e94: 8013 strh r3, [r2, #0]
8009e96: e14d b.n 800a134 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
8009e98: 683b ldr r3, [r7, #0]
8009e9a: 785b ldrb r3, [r3, #1]
8009e9c: 2b00 cmp r3, #0
8009e9e: f040 80a5 bne.w 8009fec <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009ea2: 687a ldr r2, [r7, #4]
8009ea4: 683b ldr r3, [r7, #0]
8009ea6: 781b ldrb r3, [r3, #0]
8009ea8: 009b lsls r3, r3, #2
8009eaa: 4413 add r3, r2
8009eac: 881b ldrh r3, [r3, #0]
8009eae: 843b strh r3, [r7, #32]
8009eb0: 8c3b ldrh r3, [r7, #32]
8009eb2: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009eb6: 2b00 cmp r3, #0
8009eb8: d01b beq.n 8009ef2 <USB_DeactivateEndpoint+0x18a>
8009eba: 687a ldr r2, [r7, #4]
8009ebc: 683b ldr r3, [r7, #0]
8009ebe: 781b ldrb r3, [r3, #0]
8009ec0: 009b lsls r3, r3, #2
8009ec2: 4413 add r3, r2
8009ec4: 881b ldrh r3, [r3, #0]
8009ec6: b29b uxth r3, r3
8009ec8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009ecc: f023 0370 bic.w r3, r3, #112 @ 0x70
8009ed0: 83fb strh r3, [r7, #30]
8009ed2: 687a ldr r2, [r7, #4]
8009ed4: 683b ldr r3, [r7, #0]
8009ed6: 781b ldrb r3, [r3, #0]
8009ed8: 009b lsls r3, r3, #2
8009eda: 441a add r2, r3
8009edc: 8bfb ldrh r3, [r7, #30]
8009ede: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009ee2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009ee6: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009eea: f043 0380 orr.w r3, r3, #128 @ 0x80
8009eee: b29b uxth r3, r3
8009ef0: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009ef2: 687a ldr r2, [r7, #4]
8009ef4: 683b ldr r3, [r7, #0]
8009ef6: 781b ldrb r3, [r3, #0]
8009ef8: 009b lsls r3, r3, #2
8009efa: 4413 add r3, r2
8009efc: 881b ldrh r3, [r3, #0]
8009efe: 83bb strh r3, [r7, #28]
8009f00: 8bbb ldrh r3, [r7, #28]
8009f02: f003 0340 and.w r3, r3, #64 @ 0x40
8009f06: 2b00 cmp r3, #0
8009f08: d01b beq.n 8009f42 <USB_DeactivateEndpoint+0x1da>
8009f0a: 687a ldr r2, [r7, #4]
8009f0c: 683b ldr r3, [r7, #0]
8009f0e: 781b ldrb r3, [r3, #0]
8009f10: 009b lsls r3, r3, #2
8009f12: 4413 add r3, r2
8009f14: 881b ldrh r3, [r3, #0]
8009f16: b29b uxth r3, r3
8009f18: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009f1c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f20: 837b strh r3, [r7, #26]
8009f22: 687a ldr r2, [r7, #4]
8009f24: 683b ldr r3, [r7, #0]
8009f26: 781b ldrb r3, [r3, #0]
8009f28: 009b lsls r3, r3, #2
8009f2a: 441a add r2, r3
8009f2c: 8b7b ldrh r3, [r7, #26]
8009f2e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f32: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f36: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009f3a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009f3e: b29b uxth r3, r3
8009f40: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
8009f42: 687a ldr r2, [r7, #4]
8009f44: 683b ldr r3, [r7, #0]
8009f46: 781b ldrb r3, [r3, #0]
8009f48: 009b lsls r3, r3, #2
8009f4a: 4413 add r3, r2
8009f4c: 881b ldrh r3, [r3, #0]
8009f4e: b29b uxth r3, r3
8009f50: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009f54: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f58: 833b strh r3, [r7, #24]
8009f5a: 687a ldr r2, [r7, #4]
8009f5c: 683b ldr r3, [r7, #0]
8009f5e: 781b ldrb r3, [r3, #0]
8009f60: 009b lsls r3, r3, #2
8009f62: 441a add r2, r3
8009f64: 8b3b ldrh r3, [r7, #24]
8009f66: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f6a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f6e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009f72: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009f76: b29b uxth r3, r3
8009f78: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009f7a: 687a ldr r2, [r7, #4]
8009f7c: 683b ldr r3, [r7, #0]
8009f7e: 781b ldrb r3, [r3, #0]
8009f80: 009b lsls r3, r3, #2
8009f82: 4413 add r3, r2
8009f84: 881b ldrh r3, [r3, #0]
8009f86: b29b uxth r3, r3
8009f88: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009f8c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f90: 82fb strh r3, [r7, #22]
8009f92: 687a ldr r2, [r7, #4]
8009f94: 683b ldr r3, [r7, #0]
8009f96: 781b ldrb r3, [r3, #0]
8009f98: 009b lsls r3, r3, #2
8009f9a: 441a add r2, r3
8009f9c: 8afb ldrh r3, [r7, #22]
8009f9e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009fa2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009fa6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009faa: f043 0380 orr.w r3, r3, #128 @ 0x80
8009fae: b29b uxth r3, r3
8009fb0: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009fb2: 687a ldr r2, [r7, #4]
8009fb4: 683b ldr r3, [r7, #0]
8009fb6: 781b ldrb r3, [r3, #0]
8009fb8: 009b lsls r3, r3, #2
8009fba: 4413 add r3, r2
8009fbc: 881b ldrh r3, [r3, #0]
8009fbe: b29b uxth r3, r3
8009fc0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009fc4: f023 0340 bic.w r3, r3, #64 @ 0x40
8009fc8: 82bb strh r3, [r7, #20]
8009fca: 687a ldr r2, [r7, #4]
8009fcc: 683b ldr r3, [r7, #0]
8009fce: 781b ldrb r3, [r3, #0]
8009fd0: 009b lsls r3, r3, #2
8009fd2: 441a add r2, r3
8009fd4: 8abb ldrh r3, [r7, #20]
8009fd6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009fda: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009fde: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009fe2: f043 0380 orr.w r3, r3, #128 @ 0x80
8009fe6: b29b uxth r3, r3
8009fe8: 8013 strh r3, [r2, #0]
8009fea: e0a3 b.n 800a134 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009fec: 687a ldr r2, [r7, #4]
8009fee: 683b ldr r3, [r7, #0]
8009ff0: 781b ldrb r3, [r3, #0]
8009ff2: 009b lsls r3, r3, #2
8009ff4: 4413 add r3, r2
8009ff6: 881b ldrh r3, [r3, #0]
8009ff8: 85fb strh r3, [r7, #46] @ 0x2e
8009ffa: 8dfb ldrh r3, [r7, #46] @ 0x2e
8009ffc: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a000: 2b00 cmp r3, #0
800a002: d01b beq.n 800a03c <USB_DeactivateEndpoint+0x2d4>
800a004: 687a ldr r2, [r7, #4]
800a006: 683b ldr r3, [r7, #0]
800a008: 781b ldrb r3, [r3, #0]
800a00a: 009b lsls r3, r3, #2
800a00c: 4413 add r3, r2
800a00e: 881b ldrh r3, [r3, #0]
800a010: b29b uxth r3, r3
800a012: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a016: f023 0370 bic.w r3, r3, #112 @ 0x70
800a01a: 85bb strh r3, [r7, #44] @ 0x2c
800a01c: 687a ldr r2, [r7, #4]
800a01e: 683b ldr r3, [r7, #0]
800a020: 781b ldrb r3, [r3, #0]
800a022: 009b lsls r3, r3, #2
800a024: 441a add r2, r3
800a026: 8dbb ldrh r3, [r7, #44] @ 0x2c
800a028: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a02c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a030: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a034: f043 0380 orr.w r3, r3, #128 @ 0x80
800a038: b29b uxth r3, r3
800a03a: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a03c: 687a ldr r2, [r7, #4]
800a03e: 683b ldr r3, [r7, #0]
800a040: 781b ldrb r3, [r3, #0]
800a042: 009b lsls r3, r3, #2
800a044: 4413 add r3, r2
800a046: 881b ldrh r3, [r3, #0]
800a048: 857b strh r3, [r7, #42] @ 0x2a
800a04a: 8d7b ldrh r3, [r7, #42] @ 0x2a
800a04c: f003 0340 and.w r3, r3, #64 @ 0x40
800a050: 2b00 cmp r3, #0
800a052: d01b beq.n 800a08c <USB_DeactivateEndpoint+0x324>
800a054: 687a ldr r2, [r7, #4]
800a056: 683b ldr r3, [r7, #0]
800a058: 781b ldrb r3, [r3, #0]
800a05a: 009b lsls r3, r3, #2
800a05c: 4413 add r3, r2
800a05e: 881b ldrh r3, [r3, #0]
800a060: b29b uxth r3, r3
800a062: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a066: f023 0370 bic.w r3, r3, #112 @ 0x70
800a06a: 853b strh r3, [r7, #40] @ 0x28
800a06c: 687a ldr r2, [r7, #4]
800a06e: 683b ldr r3, [r7, #0]
800a070: 781b ldrb r3, [r3, #0]
800a072: 009b lsls r3, r3, #2
800a074: 441a add r2, r3
800a076: 8d3b ldrh r3, [r7, #40] @ 0x28
800a078: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a07c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a080: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a084: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a088: b29b uxth r3, r3
800a08a: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
800a08c: 687a ldr r2, [r7, #4]
800a08e: 683b ldr r3, [r7, #0]
800a090: 781b ldrb r3, [r3, #0]
800a092: 009b lsls r3, r3, #2
800a094: 4413 add r3, r2
800a096: 881b ldrh r3, [r3, #0]
800a098: b29b uxth r3, r3
800a09a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a09e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a0a2: 84fb strh r3, [r7, #38] @ 0x26
800a0a4: 687a ldr r2, [r7, #4]
800a0a6: 683b ldr r3, [r7, #0]
800a0a8: 781b ldrb r3, [r3, #0]
800a0aa: 009b lsls r3, r3, #2
800a0ac: 441a add r2, r3
800a0ae: 8cfb ldrh r3, [r7, #38] @ 0x26
800a0b0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a0b4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a0b8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a0bc: f043 0380 orr.w r3, r3, #128 @ 0x80
800a0c0: b29b uxth r3, r3
800a0c2: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a0c4: 687a ldr r2, [r7, #4]
800a0c6: 683b ldr r3, [r7, #0]
800a0c8: 781b ldrb r3, [r3, #0]
800a0ca: 009b lsls r3, r3, #2
800a0cc: 4413 add r3, r2
800a0ce: 881b ldrh r3, [r3, #0]
800a0d0: b29b uxth r3, r3
800a0d2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a0d6: f023 0340 bic.w r3, r3, #64 @ 0x40
800a0da: 84bb strh r3, [r7, #36] @ 0x24
800a0dc: 687a ldr r2, [r7, #4]
800a0de: 683b ldr r3, [r7, #0]
800a0e0: 781b ldrb r3, [r3, #0]
800a0e2: 009b lsls r3, r3, #2
800a0e4: 441a add r2, r3
800a0e6: 8cbb ldrh r3, [r7, #36] @ 0x24
800a0e8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a0ec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a0f0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a0f4: f043 0380 orr.w r3, r3, #128 @ 0x80
800a0f8: b29b uxth r3, r3
800a0fa: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a0fc: 687a ldr r2, [r7, #4]
800a0fe: 683b ldr r3, [r7, #0]
800a100: 781b ldrb r3, [r3, #0]
800a102: 009b lsls r3, r3, #2
800a104: 4413 add r3, r2
800a106: 881b ldrh r3, [r3, #0]
800a108: b29b uxth r3, r3
800a10a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a10e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a112: 847b strh r3, [r7, #34] @ 0x22
800a114: 687a ldr r2, [r7, #4]
800a116: 683b ldr r3, [r7, #0]
800a118: 781b ldrb r3, [r3, #0]
800a11a: 009b lsls r3, r3, #2
800a11c: 441a add r2, r3
800a11e: 8c7b ldrh r3, [r7, #34] @ 0x22
800a120: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a124: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a128: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a12c: f043 0380 orr.w r3, r3, #128 @ 0x80
800a130: b29b uxth r3, r3
800a132: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800a134: 2300 movs r3, #0
}
800a136: 4618 mov r0, r3
800a138: 3734 adds r7, #52 @ 0x34
800a13a: 46bd mov sp, r7
800a13c: bc80 pop {r7}
800a13e: 4770 bx lr
0800a140 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a140: b580 push {r7, lr}
800a142: b0c2 sub sp, #264 @ 0x108
800a144: af00 add r7, sp, #0
800a146: f507 7384 add.w r3, r7, #264 @ 0x108
800a14a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a14e: 6018 str r0, [r3, #0]
800a150: f507 7384 add.w r3, r7, #264 @ 0x108
800a154: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a158: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
800a15a: f507 7384 add.w r3, r7, #264 @ 0x108
800a15e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a162: 681b ldr r3, [r3, #0]
800a164: 785b ldrb r3, [r3, #1]
800a166: 2b01 cmp r3, #1
800a168: f040 86b7 bne.w 800aeda <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
800a16c: f507 7384 add.w r3, r7, #264 @ 0x108
800a170: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a174: 681b ldr r3, [r3, #0]
800a176: 699a ldr r2, [r3, #24]
800a178: f507 7384 add.w r3, r7, #264 @ 0x108
800a17c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a180: 681b ldr r3, [r3, #0]
800a182: 691b ldr r3, [r3, #16]
800a184: 429a cmp r2, r3
800a186: d908 bls.n 800a19a <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
800a188: f507 7384 add.w r3, r7, #264 @ 0x108
800a18c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a190: 681b ldr r3, [r3, #0]
800a192: 691b ldr r3, [r3, #16]
800a194: f8c7 3104 str.w r3, [r7, #260] @ 0x104
800a198: e007 b.n 800a1aa <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
800a19a: f507 7384 add.w r3, r7, #264 @ 0x108
800a19e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1a2: 681b ldr r3, [r3, #0]
800a1a4: 699b ldr r3, [r3, #24]
800a1a6: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
800a1aa: f507 7384 add.w r3, r7, #264 @ 0x108
800a1ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1b2: 681b ldr r3, [r3, #0]
800a1b4: 7b1b ldrb r3, [r3, #12]
800a1b6: 2b00 cmp r3, #0
800a1b8: d13a bne.n 800a230 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
800a1ba: f507 7384 add.w r3, r7, #264 @ 0x108
800a1be: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1c2: 681b ldr r3, [r3, #0]
800a1c4: 6959 ldr r1, [r3, #20]
800a1c6: f507 7384 add.w r3, r7, #264 @ 0x108
800a1ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1ce: 681b ldr r3, [r3, #0]
800a1d0: 88da ldrh r2, [r3, #6]
800a1d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a1d6: b29b uxth r3, r3
800a1d8: f507 7084 add.w r0, r7, #264 @ 0x108
800a1dc: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a1e0: 6800 ldr r0, [r0, #0]
800a1e2: f001 fc9c bl 800bb1e <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800a1e6: f507 7384 add.w r3, r7, #264 @ 0x108
800a1ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a1ee: 681b ldr r3, [r3, #0]
800a1f0: 613b str r3, [r7, #16]
800a1f2: f507 7384 add.w r3, r7, #264 @ 0x108
800a1f6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a1fa: 681b ldr r3, [r3, #0]
800a1fc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a200: b29b uxth r3, r3
800a202: 461a mov r2, r3
800a204: 693b ldr r3, [r7, #16]
800a206: 4413 add r3, r2
800a208: 613b str r3, [r7, #16]
800a20a: f507 7384 add.w r3, r7, #264 @ 0x108
800a20e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a212: 681b ldr r3, [r3, #0]
800a214: 781b ldrb r3, [r3, #0]
800a216: 011a lsls r2, r3, #4
800a218: 693b ldr r3, [r7, #16]
800a21a: 4413 add r3, r2
800a21c: f203 4304 addw r3, r3, #1028 @ 0x404
800a220: 60fb str r3, [r7, #12]
800a222: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a226: b29a uxth r2, r3
800a228: 68fb ldr r3, [r7, #12]
800a22a: 801a strh r2, [r3, #0]
800a22c: f000 be1f b.w 800ae6e <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
800a230: f507 7384 add.w r3, r7, #264 @ 0x108
800a234: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a238: 681b ldr r3, [r3, #0]
800a23a: 78db ldrb r3, [r3, #3]
800a23c: 2b02 cmp r3, #2
800a23e: f040 8462 bne.w 800ab06 <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
800a242: f507 7384 add.w r3, r7, #264 @ 0x108
800a246: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a24a: 681b ldr r3, [r3, #0]
800a24c: 6a1a ldr r2, [r3, #32]
800a24e: f507 7384 add.w r3, r7, #264 @ 0x108
800a252: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a256: 681b ldr r3, [r3, #0]
800a258: 691b ldr r3, [r3, #16]
800a25a: 429a cmp r2, r3
800a25c: f240 83df bls.w 800aa1e <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a260: f507 7384 add.w r3, r7, #264 @ 0x108
800a264: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a268: 681a ldr r2, [r3, #0]
800a26a: f507 7384 add.w r3, r7, #264 @ 0x108
800a26e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a272: 681b ldr r3, [r3, #0]
800a274: 781b ldrb r3, [r3, #0]
800a276: 009b lsls r3, r3, #2
800a278: 4413 add r3, r2
800a27a: 881b ldrh r3, [r3, #0]
800a27c: b29b uxth r3, r3
800a27e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a282: f023 0370 bic.w r3, r3, #112 @ 0x70
800a286: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
800a28a: f507 7384 add.w r3, r7, #264 @ 0x108
800a28e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a292: 681a ldr r2, [r3, #0]
800a294: f507 7384 add.w r3, r7, #264 @ 0x108
800a298: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a29c: 681b ldr r3, [r3, #0]
800a29e: 781b ldrb r3, [r3, #0]
800a2a0: 009b lsls r3, r3, #2
800a2a2: 441a add r2, r3
800a2a4: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
800a2a8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a2ac: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a2b0: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800a2b4: f043 0380 orr.w r3, r3, #128 @ 0x80
800a2b8: b29b uxth r3, r3
800a2ba: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800a2bc: f507 7384 add.w r3, r7, #264 @ 0x108
800a2c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a2c4: 681b ldr r3, [r3, #0]
800a2c6: 6a1a ldr r2, [r3, #32]
800a2c8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a2cc: 1ad2 subs r2, r2, r3
800a2ce: f507 7384 add.w r3, r7, #264 @ 0x108
800a2d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a2d6: 681b ldr r3, [r3, #0]
800a2d8: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800a2da: f507 7384 add.w r3, r7, #264 @ 0x108
800a2de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a2e2: 681a ldr r2, [r3, #0]
800a2e4: f507 7384 add.w r3, r7, #264 @ 0x108
800a2e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a2ec: 681b ldr r3, [r3, #0]
800a2ee: 781b ldrb r3, [r3, #0]
800a2f0: 009b lsls r3, r3, #2
800a2f2: 4413 add r3, r2
800a2f4: 881b ldrh r3, [r3, #0]
800a2f6: b29b uxth r3, r3
800a2f8: f003 0340 and.w r3, r3, #64 @ 0x40
800a2fc: 2b00 cmp r3, #0
800a2fe: f000 81c7 beq.w 800a690 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a302: f507 7384 add.w r3, r7, #264 @ 0x108
800a306: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a30a: 681b ldr r3, [r3, #0]
800a30c: 633b str r3, [r7, #48] @ 0x30
800a30e: f507 7384 add.w r3, r7, #264 @ 0x108
800a312: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a316: 681b ldr r3, [r3, #0]
800a318: 785b ldrb r3, [r3, #1]
800a31a: 2b00 cmp r3, #0
800a31c: d177 bne.n 800a40e <USB_EPStartXfer+0x2ce>
800a31e: f507 7384 add.w r3, r7, #264 @ 0x108
800a322: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a326: 681b ldr r3, [r3, #0]
800a328: 62bb str r3, [r7, #40] @ 0x28
800a32a: f507 7384 add.w r3, r7, #264 @ 0x108
800a32e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a332: 681b ldr r3, [r3, #0]
800a334: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a338: b29b uxth r3, r3
800a33a: 461a mov r2, r3
800a33c: 6abb ldr r3, [r7, #40] @ 0x28
800a33e: 4413 add r3, r2
800a340: 62bb str r3, [r7, #40] @ 0x28
800a342: f507 7384 add.w r3, r7, #264 @ 0x108
800a346: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a34a: 681b ldr r3, [r3, #0]
800a34c: 781b ldrb r3, [r3, #0]
800a34e: 011a lsls r2, r3, #4
800a350: 6abb ldr r3, [r7, #40] @ 0x28
800a352: 4413 add r3, r2
800a354: f203 430c addw r3, r3, #1036 @ 0x40c
800a358: 627b str r3, [r7, #36] @ 0x24
800a35a: 6a7b ldr r3, [r7, #36] @ 0x24
800a35c: 881b ldrh r3, [r3, #0]
800a35e: b29b uxth r3, r3
800a360: f3c3 0309 ubfx r3, r3, #0, #10
800a364: b29a uxth r2, r3
800a366: 6a7b ldr r3, [r7, #36] @ 0x24
800a368: 801a strh r2, [r3, #0]
800a36a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a36e: 2b3e cmp r3, #62 @ 0x3e
800a370: d921 bls.n 800a3b6 <USB_EPStartXfer+0x276>
800a372: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a376: 095b lsrs r3, r3, #5
800a378: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a37c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a380: f003 031f and.w r3, r3, #31
800a384: 2b00 cmp r3, #0
800a386: d104 bne.n 800a392 <USB_EPStartXfer+0x252>
800a388: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a38c: 3b01 subs r3, #1
800a38e: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a392: 6a7b ldr r3, [r7, #36] @ 0x24
800a394: 881b ldrh r3, [r3, #0]
800a396: b29a uxth r2, r3
800a398: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a39c: b29b uxth r3, r3
800a39e: 029b lsls r3, r3, #10
800a3a0: b29b uxth r3, r3
800a3a2: 4313 orrs r3, r2
800a3a4: b29b uxth r3, r3
800a3a6: ea6f 4343 mvn.w r3, r3, lsl #17
800a3aa: ea6f 4353 mvn.w r3, r3, lsr #17
800a3ae: b29a uxth r2, r3
800a3b0: 6a7b ldr r3, [r7, #36] @ 0x24
800a3b2: 801a strh r2, [r3, #0]
800a3b4: e050 b.n 800a458 <USB_EPStartXfer+0x318>
800a3b6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a3ba: 2b00 cmp r3, #0
800a3bc: d10a bne.n 800a3d4 <USB_EPStartXfer+0x294>
800a3be: 6a7b ldr r3, [r7, #36] @ 0x24
800a3c0: 881b ldrh r3, [r3, #0]
800a3c2: b29b uxth r3, r3
800a3c4: ea6f 4343 mvn.w r3, r3, lsl #17
800a3c8: ea6f 4353 mvn.w r3, r3, lsr #17
800a3cc: b29a uxth r2, r3
800a3ce: 6a7b ldr r3, [r7, #36] @ 0x24
800a3d0: 801a strh r2, [r3, #0]
800a3d2: e041 b.n 800a458 <USB_EPStartXfer+0x318>
800a3d4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a3d8: 085b lsrs r3, r3, #1
800a3da: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a3de: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a3e2: f003 0301 and.w r3, r3, #1
800a3e6: 2b00 cmp r3, #0
800a3e8: d004 beq.n 800a3f4 <USB_EPStartXfer+0x2b4>
800a3ea: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a3ee: 3301 adds r3, #1
800a3f0: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a3f4: 6a7b ldr r3, [r7, #36] @ 0x24
800a3f6: 881b ldrh r3, [r3, #0]
800a3f8: b29a uxth r2, r3
800a3fa: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a3fe: b29b uxth r3, r3
800a400: 029b lsls r3, r3, #10
800a402: b29b uxth r3, r3
800a404: 4313 orrs r3, r2
800a406: b29a uxth r2, r3
800a408: 6a7b ldr r3, [r7, #36] @ 0x24
800a40a: 801a strh r2, [r3, #0]
800a40c: e024 b.n 800a458 <USB_EPStartXfer+0x318>
800a40e: f507 7384 add.w r3, r7, #264 @ 0x108
800a412: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a416: 681b ldr r3, [r3, #0]
800a418: 785b ldrb r3, [r3, #1]
800a41a: 2b01 cmp r3, #1
800a41c: d11c bne.n 800a458 <USB_EPStartXfer+0x318>
800a41e: f507 7384 add.w r3, r7, #264 @ 0x108
800a422: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a426: 681b ldr r3, [r3, #0]
800a428: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a42c: b29b uxth r3, r3
800a42e: 461a mov r2, r3
800a430: 6b3b ldr r3, [r7, #48] @ 0x30
800a432: 4413 add r3, r2
800a434: 633b str r3, [r7, #48] @ 0x30
800a436: f507 7384 add.w r3, r7, #264 @ 0x108
800a43a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a43e: 681b ldr r3, [r3, #0]
800a440: 781b ldrb r3, [r3, #0]
800a442: 011a lsls r2, r3, #4
800a444: 6b3b ldr r3, [r7, #48] @ 0x30
800a446: 4413 add r3, r2
800a448: f203 430c addw r3, r3, #1036 @ 0x40c
800a44c: 62fb str r3, [r7, #44] @ 0x2c
800a44e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a452: b29a uxth r2, r3
800a454: 6afb ldr r3, [r7, #44] @ 0x2c
800a456: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800a458: f507 7384 add.w r3, r7, #264 @ 0x108
800a45c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a460: 681b ldr r3, [r3, #0]
800a462: 895b ldrh r3, [r3, #10]
800a464: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a468: f507 7384 add.w r3, r7, #264 @ 0x108
800a46c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a470: 681b ldr r3, [r3, #0]
800a472: 6959 ldr r1, [r3, #20]
800a474: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a478: b29b uxth r3, r3
800a47a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a47e: f507 7084 add.w r0, r7, #264 @ 0x108
800a482: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a486: 6800 ldr r0, [r0, #0]
800a488: f001 fb49 bl 800bb1e <USB_WritePMA>
ep->xfer_buff += len;
800a48c: f507 7384 add.w r3, r7, #264 @ 0x108
800a490: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a494: 681b ldr r3, [r3, #0]
800a496: 695a ldr r2, [r3, #20]
800a498: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a49c: 441a add r2, r3
800a49e: f507 7384 add.w r3, r7, #264 @ 0x108
800a4a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4a6: 681b ldr r3, [r3, #0]
800a4a8: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800a4aa: f507 7384 add.w r3, r7, #264 @ 0x108
800a4ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4b2: 681b ldr r3, [r3, #0]
800a4b4: 6a1a ldr r2, [r3, #32]
800a4b6: f507 7384 add.w r3, r7, #264 @ 0x108
800a4ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4be: 681b ldr r3, [r3, #0]
800a4c0: 691b ldr r3, [r3, #16]
800a4c2: 429a cmp r2, r3
800a4c4: d90f bls.n 800a4e6 <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
800a4c6: f507 7384 add.w r3, r7, #264 @ 0x108
800a4ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4ce: 681b ldr r3, [r3, #0]
800a4d0: 6a1a ldr r2, [r3, #32]
800a4d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a4d6: 1ad2 subs r2, r2, r3
800a4d8: f507 7384 add.w r3, r7, #264 @ 0x108
800a4dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4e0: 681b ldr r3, [r3, #0]
800a4e2: 621a str r2, [r3, #32]
800a4e4: e00e b.n 800a504 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
800a4e6: f507 7384 add.w r3, r7, #264 @ 0x108
800a4ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4ee: 681b ldr r3, [r3, #0]
800a4f0: 6a1b ldr r3, [r3, #32]
800a4f2: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800a4f6: f507 7384 add.w r3, r7, #264 @ 0x108
800a4fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4fe: 681b ldr r3, [r3, #0]
800a500: 2200 movs r2, #0
800a502: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800a504: f507 7384 add.w r3, r7, #264 @ 0x108
800a508: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a50c: 681b ldr r3, [r3, #0]
800a50e: 785b ldrb r3, [r3, #1]
800a510: 2b00 cmp r3, #0
800a512: d177 bne.n 800a604 <USB_EPStartXfer+0x4c4>
800a514: f507 7384 add.w r3, r7, #264 @ 0x108
800a518: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a51c: 681b ldr r3, [r3, #0]
800a51e: 61bb str r3, [r7, #24]
800a520: f507 7384 add.w r3, r7, #264 @ 0x108
800a524: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a528: 681b ldr r3, [r3, #0]
800a52a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a52e: b29b uxth r3, r3
800a530: 461a mov r2, r3
800a532: 69bb ldr r3, [r7, #24]
800a534: 4413 add r3, r2
800a536: 61bb str r3, [r7, #24]
800a538: f507 7384 add.w r3, r7, #264 @ 0x108
800a53c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a540: 681b ldr r3, [r3, #0]
800a542: 781b ldrb r3, [r3, #0]
800a544: 011a lsls r2, r3, #4
800a546: 69bb ldr r3, [r7, #24]
800a548: 4413 add r3, r2
800a54a: f203 4304 addw r3, r3, #1028 @ 0x404
800a54e: 617b str r3, [r7, #20]
800a550: 697b ldr r3, [r7, #20]
800a552: 881b ldrh r3, [r3, #0]
800a554: b29b uxth r3, r3
800a556: f3c3 0309 ubfx r3, r3, #0, #10
800a55a: b29a uxth r2, r3
800a55c: 697b ldr r3, [r7, #20]
800a55e: 801a strh r2, [r3, #0]
800a560: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a564: 2b3e cmp r3, #62 @ 0x3e
800a566: d921 bls.n 800a5ac <USB_EPStartXfer+0x46c>
800a568: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a56c: 095b lsrs r3, r3, #5
800a56e: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a572: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a576: f003 031f and.w r3, r3, #31
800a57a: 2b00 cmp r3, #0
800a57c: d104 bne.n 800a588 <USB_EPStartXfer+0x448>
800a57e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a582: 3b01 subs r3, #1
800a584: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a588: 697b ldr r3, [r7, #20]
800a58a: 881b ldrh r3, [r3, #0]
800a58c: b29a uxth r2, r3
800a58e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a592: b29b uxth r3, r3
800a594: 029b lsls r3, r3, #10
800a596: b29b uxth r3, r3
800a598: 4313 orrs r3, r2
800a59a: b29b uxth r3, r3
800a59c: ea6f 4343 mvn.w r3, r3, lsl #17
800a5a0: ea6f 4353 mvn.w r3, r3, lsr #17
800a5a4: b29a uxth r2, r3
800a5a6: 697b ldr r3, [r7, #20]
800a5a8: 801a strh r2, [r3, #0]
800a5aa: e056 b.n 800a65a <USB_EPStartXfer+0x51a>
800a5ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a5b0: 2b00 cmp r3, #0
800a5b2: d10a bne.n 800a5ca <USB_EPStartXfer+0x48a>
800a5b4: 697b ldr r3, [r7, #20]
800a5b6: 881b ldrh r3, [r3, #0]
800a5b8: b29b uxth r3, r3
800a5ba: ea6f 4343 mvn.w r3, r3, lsl #17
800a5be: ea6f 4353 mvn.w r3, r3, lsr #17
800a5c2: b29a uxth r2, r3
800a5c4: 697b ldr r3, [r7, #20]
800a5c6: 801a strh r2, [r3, #0]
800a5c8: e047 b.n 800a65a <USB_EPStartXfer+0x51a>
800a5ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a5ce: 085b lsrs r3, r3, #1
800a5d0: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a5d4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a5d8: f003 0301 and.w r3, r3, #1
800a5dc: 2b00 cmp r3, #0
800a5de: d004 beq.n 800a5ea <USB_EPStartXfer+0x4aa>
800a5e0: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a5e4: 3301 adds r3, #1
800a5e6: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a5ea: 697b ldr r3, [r7, #20]
800a5ec: 881b ldrh r3, [r3, #0]
800a5ee: b29a uxth r2, r3
800a5f0: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a5f4: b29b uxth r3, r3
800a5f6: 029b lsls r3, r3, #10
800a5f8: b29b uxth r3, r3
800a5fa: 4313 orrs r3, r2
800a5fc: b29a uxth r2, r3
800a5fe: 697b ldr r3, [r7, #20]
800a600: 801a strh r2, [r3, #0]
800a602: e02a b.n 800a65a <USB_EPStartXfer+0x51a>
800a604: f507 7384 add.w r3, r7, #264 @ 0x108
800a608: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a60c: 681b ldr r3, [r3, #0]
800a60e: 785b ldrb r3, [r3, #1]
800a610: 2b01 cmp r3, #1
800a612: d122 bne.n 800a65a <USB_EPStartXfer+0x51a>
800a614: f507 7384 add.w r3, r7, #264 @ 0x108
800a618: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a61c: 681b ldr r3, [r3, #0]
800a61e: 623b str r3, [r7, #32]
800a620: f507 7384 add.w r3, r7, #264 @ 0x108
800a624: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a628: 681b ldr r3, [r3, #0]
800a62a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a62e: b29b uxth r3, r3
800a630: 461a mov r2, r3
800a632: 6a3b ldr r3, [r7, #32]
800a634: 4413 add r3, r2
800a636: 623b str r3, [r7, #32]
800a638: f507 7384 add.w r3, r7, #264 @ 0x108
800a63c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a640: 681b ldr r3, [r3, #0]
800a642: 781b ldrb r3, [r3, #0]
800a644: 011a lsls r2, r3, #4
800a646: 6a3b ldr r3, [r7, #32]
800a648: 4413 add r3, r2
800a64a: f203 4304 addw r3, r3, #1028 @ 0x404
800a64e: 61fb str r3, [r7, #28]
800a650: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a654: b29a uxth r2, r3
800a656: 69fb ldr r3, [r7, #28]
800a658: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800a65a: f507 7384 add.w r3, r7, #264 @ 0x108
800a65e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a662: 681b ldr r3, [r3, #0]
800a664: 891b ldrh r3, [r3, #8]
800a666: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a66a: f507 7384 add.w r3, r7, #264 @ 0x108
800a66e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a672: 681b ldr r3, [r3, #0]
800a674: 6959 ldr r1, [r3, #20]
800a676: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a67a: b29b uxth r3, r3
800a67c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a680: f507 7084 add.w r0, r7, #264 @ 0x108
800a684: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a688: 6800 ldr r0, [r0, #0]
800a68a: f001 fa48 bl 800bb1e <USB_WritePMA>
800a68e: e3ee b.n 800ae6e <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800a690: f507 7384 add.w r3, r7, #264 @ 0x108
800a694: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a698: 681b ldr r3, [r3, #0]
800a69a: 785b ldrb r3, [r3, #1]
800a69c: 2b00 cmp r3, #0
800a69e: d177 bne.n 800a790 <USB_EPStartXfer+0x650>
800a6a0: f507 7384 add.w r3, r7, #264 @ 0x108
800a6a4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a6a8: 681b ldr r3, [r3, #0]
800a6aa: 64bb str r3, [r7, #72] @ 0x48
800a6ac: f507 7384 add.w r3, r7, #264 @ 0x108
800a6b0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a6b4: 681b ldr r3, [r3, #0]
800a6b6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a6ba: b29b uxth r3, r3
800a6bc: 461a mov r2, r3
800a6be: 6cbb ldr r3, [r7, #72] @ 0x48
800a6c0: 4413 add r3, r2
800a6c2: 64bb str r3, [r7, #72] @ 0x48
800a6c4: f507 7384 add.w r3, r7, #264 @ 0x108
800a6c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a6cc: 681b ldr r3, [r3, #0]
800a6ce: 781b ldrb r3, [r3, #0]
800a6d0: 011a lsls r2, r3, #4
800a6d2: 6cbb ldr r3, [r7, #72] @ 0x48
800a6d4: 4413 add r3, r2
800a6d6: f203 4304 addw r3, r3, #1028 @ 0x404
800a6da: 647b str r3, [r7, #68] @ 0x44
800a6dc: 6c7b ldr r3, [r7, #68] @ 0x44
800a6de: 881b ldrh r3, [r3, #0]
800a6e0: b29b uxth r3, r3
800a6e2: f3c3 0309 ubfx r3, r3, #0, #10
800a6e6: b29a uxth r2, r3
800a6e8: 6c7b ldr r3, [r7, #68] @ 0x44
800a6ea: 801a strh r2, [r3, #0]
800a6ec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a6f0: 2b3e cmp r3, #62 @ 0x3e
800a6f2: d921 bls.n 800a738 <USB_EPStartXfer+0x5f8>
800a6f4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a6f8: 095b lsrs r3, r3, #5
800a6fa: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a6fe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a702: f003 031f and.w r3, r3, #31
800a706: 2b00 cmp r3, #0
800a708: d104 bne.n 800a714 <USB_EPStartXfer+0x5d4>
800a70a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a70e: 3b01 subs r3, #1
800a710: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a714: 6c7b ldr r3, [r7, #68] @ 0x44
800a716: 881b ldrh r3, [r3, #0]
800a718: b29a uxth r2, r3
800a71a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a71e: b29b uxth r3, r3
800a720: 029b lsls r3, r3, #10
800a722: b29b uxth r3, r3
800a724: 4313 orrs r3, r2
800a726: b29b uxth r3, r3
800a728: ea6f 4343 mvn.w r3, r3, lsl #17
800a72c: ea6f 4353 mvn.w r3, r3, lsr #17
800a730: b29a uxth r2, r3
800a732: 6c7b ldr r3, [r7, #68] @ 0x44
800a734: 801a strh r2, [r3, #0]
800a736: e056 b.n 800a7e6 <USB_EPStartXfer+0x6a6>
800a738: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a73c: 2b00 cmp r3, #0
800a73e: d10a bne.n 800a756 <USB_EPStartXfer+0x616>
800a740: 6c7b ldr r3, [r7, #68] @ 0x44
800a742: 881b ldrh r3, [r3, #0]
800a744: b29b uxth r3, r3
800a746: ea6f 4343 mvn.w r3, r3, lsl #17
800a74a: ea6f 4353 mvn.w r3, r3, lsr #17
800a74e: b29a uxth r2, r3
800a750: 6c7b ldr r3, [r7, #68] @ 0x44
800a752: 801a strh r2, [r3, #0]
800a754: e047 b.n 800a7e6 <USB_EPStartXfer+0x6a6>
800a756: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a75a: 085b lsrs r3, r3, #1
800a75c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a760: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a764: f003 0301 and.w r3, r3, #1
800a768: 2b00 cmp r3, #0
800a76a: d004 beq.n 800a776 <USB_EPStartXfer+0x636>
800a76c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a770: 3301 adds r3, #1
800a772: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a776: 6c7b ldr r3, [r7, #68] @ 0x44
800a778: 881b ldrh r3, [r3, #0]
800a77a: b29a uxth r2, r3
800a77c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a780: b29b uxth r3, r3
800a782: 029b lsls r3, r3, #10
800a784: b29b uxth r3, r3
800a786: 4313 orrs r3, r2
800a788: b29a uxth r2, r3
800a78a: 6c7b ldr r3, [r7, #68] @ 0x44
800a78c: 801a strh r2, [r3, #0]
800a78e: e02a b.n 800a7e6 <USB_EPStartXfer+0x6a6>
800a790: f507 7384 add.w r3, r7, #264 @ 0x108
800a794: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a798: 681b ldr r3, [r3, #0]
800a79a: 785b ldrb r3, [r3, #1]
800a79c: 2b01 cmp r3, #1
800a79e: d122 bne.n 800a7e6 <USB_EPStartXfer+0x6a6>
800a7a0: f507 7384 add.w r3, r7, #264 @ 0x108
800a7a4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a7a8: 681b ldr r3, [r3, #0]
800a7aa: 653b str r3, [r7, #80] @ 0x50
800a7ac: f507 7384 add.w r3, r7, #264 @ 0x108
800a7b0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a7b4: 681b ldr r3, [r3, #0]
800a7b6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a7ba: b29b uxth r3, r3
800a7bc: 461a mov r2, r3
800a7be: 6d3b ldr r3, [r7, #80] @ 0x50
800a7c0: 4413 add r3, r2
800a7c2: 653b str r3, [r7, #80] @ 0x50
800a7c4: f507 7384 add.w r3, r7, #264 @ 0x108
800a7c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7cc: 681b ldr r3, [r3, #0]
800a7ce: 781b ldrb r3, [r3, #0]
800a7d0: 011a lsls r2, r3, #4
800a7d2: 6d3b ldr r3, [r7, #80] @ 0x50
800a7d4: 4413 add r3, r2
800a7d6: f203 4304 addw r3, r3, #1028 @ 0x404
800a7da: 64fb str r3, [r7, #76] @ 0x4c
800a7dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a7e0: b29a uxth r2, r3
800a7e2: 6cfb ldr r3, [r7, #76] @ 0x4c
800a7e4: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800a7e6: f507 7384 add.w r3, r7, #264 @ 0x108
800a7ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7ee: 681b ldr r3, [r3, #0]
800a7f0: 891b ldrh r3, [r3, #8]
800a7f2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a7f6: f507 7384 add.w r3, r7, #264 @ 0x108
800a7fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7fe: 681b ldr r3, [r3, #0]
800a800: 6959 ldr r1, [r3, #20]
800a802: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a806: b29b uxth r3, r3
800a808: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a80c: f507 7084 add.w r0, r7, #264 @ 0x108
800a810: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a814: 6800 ldr r0, [r0, #0]
800a816: f001 f982 bl 800bb1e <USB_WritePMA>
ep->xfer_buff += len;
800a81a: f507 7384 add.w r3, r7, #264 @ 0x108
800a81e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a822: 681b ldr r3, [r3, #0]
800a824: 695a ldr r2, [r3, #20]
800a826: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a82a: 441a add r2, r3
800a82c: f507 7384 add.w r3, r7, #264 @ 0x108
800a830: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a834: 681b ldr r3, [r3, #0]
800a836: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800a838: f507 7384 add.w r3, r7, #264 @ 0x108
800a83c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a840: 681b ldr r3, [r3, #0]
800a842: 6a1a ldr r2, [r3, #32]
800a844: f507 7384 add.w r3, r7, #264 @ 0x108
800a848: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a84c: 681b ldr r3, [r3, #0]
800a84e: 691b ldr r3, [r3, #16]
800a850: 429a cmp r2, r3
800a852: d90f bls.n 800a874 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
800a854: f507 7384 add.w r3, r7, #264 @ 0x108
800a858: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a85c: 681b ldr r3, [r3, #0]
800a85e: 6a1a ldr r2, [r3, #32]
800a860: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a864: 1ad2 subs r2, r2, r3
800a866: f507 7384 add.w r3, r7, #264 @ 0x108
800a86a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a86e: 681b ldr r3, [r3, #0]
800a870: 621a str r2, [r3, #32]
800a872: e00e b.n 800a892 <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
800a874: f507 7384 add.w r3, r7, #264 @ 0x108
800a878: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a87c: 681b ldr r3, [r3, #0]
800a87e: 6a1b ldr r3, [r3, #32]
800a880: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800a884: f507 7384 add.w r3, r7, #264 @ 0x108
800a888: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a88c: 681b ldr r3, [r3, #0]
800a88e: 2200 movs r2, #0
800a890: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a892: f507 7384 add.w r3, r7, #264 @ 0x108
800a896: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a89a: 681b ldr r3, [r3, #0]
800a89c: 643b str r3, [r7, #64] @ 0x40
800a89e: f507 7384 add.w r3, r7, #264 @ 0x108
800a8a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8a6: 681b ldr r3, [r3, #0]
800a8a8: 785b ldrb r3, [r3, #1]
800a8aa: 2b00 cmp r3, #0
800a8ac: d177 bne.n 800a99e <USB_EPStartXfer+0x85e>
800a8ae: f507 7384 add.w r3, r7, #264 @ 0x108
800a8b2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8b6: 681b ldr r3, [r3, #0]
800a8b8: 63bb str r3, [r7, #56] @ 0x38
800a8ba: f507 7384 add.w r3, r7, #264 @ 0x108
800a8be: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8c2: 681b ldr r3, [r3, #0]
800a8c4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a8c8: b29b uxth r3, r3
800a8ca: 461a mov r2, r3
800a8cc: 6bbb ldr r3, [r7, #56] @ 0x38
800a8ce: 4413 add r3, r2
800a8d0: 63bb str r3, [r7, #56] @ 0x38
800a8d2: f507 7384 add.w r3, r7, #264 @ 0x108
800a8d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8da: 681b ldr r3, [r3, #0]
800a8dc: 781b ldrb r3, [r3, #0]
800a8de: 011a lsls r2, r3, #4
800a8e0: 6bbb ldr r3, [r7, #56] @ 0x38
800a8e2: 4413 add r3, r2
800a8e4: f203 430c addw r3, r3, #1036 @ 0x40c
800a8e8: 637b str r3, [r7, #52] @ 0x34
800a8ea: 6b7b ldr r3, [r7, #52] @ 0x34
800a8ec: 881b ldrh r3, [r3, #0]
800a8ee: b29b uxth r3, r3
800a8f0: f3c3 0309 ubfx r3, r3, #0, #10
800a8f4: b29a uxth r2, r3
800a8f6: 6b7b ldr r3, [r7, #52] @ 0x34
800a8f8: 801a strh r2, [r3, #0]
800a8fa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a8fe: 2b3e cmp r3, #62 @ 0x3e
800a900: d921 bls.n 800a946 <USB_EPStartXfer+0x806>
800a902: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a906: 095b lsrs r3, r3, #5
800a908: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a90c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a910: f003 031f and.w r3, r3, #31
800a914: 2b00 cmp r3, #0
800a916: d104 bne.n 800a922 <USB_EPStartXfer+0x7e2>
800a918: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a91c: 3b01 subs r3, #1
800a91e: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a922: 6b7b ldr r3, [r7, #52] @ 0x34
800a924: 881b ldrh r3, [r3, #0]
800a926: b29a uxth r2, r3
800a928: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a92c: b29b uxth r3, r3
800a92e: 029b lsls r3, r3, #10
800a930: b29b uxth r3, r3
800a932: 4313 orrs r3, r2
800a934: b29b uxth r3, r3
800a936: ea6f 4343 mvn.w r3, r3, lsl #17
800a93a: ea6f 4353 mvn.w r3, r3, lsr #17
800a93e: b29a uxth r2, r3
800a940: 6b7b ldr r3, [r7, #52] @ 0x34
800a942: 801a strh r2, [r3, #0]
800a944: e050 b.n 800a9e8 <USB_EPStartXfer+0x8a8>
800a946: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a94a: 2b00 cmp r3, #0
800a94c: d10a bne.n 800a964 <USB_EPStartXfer+0x824>
800a94e: 6b7b ldr r3, [r7, #52] @ 0x34
800a950: 881b ldrh r3, [r3, #0]
800a952: b29b uxth r3, r3
800a954: ea6f 4343 mvn.w r3, r3, lsl #17
800a958: ea6f 4353 mvn.w r3, r3, lsr #17
800a95c: b29a uxth r2, r3
800a95e: 6b7b ldr r3, [r7, #52] @ 0x34
800a960: 801a strh r2, [r3, #0]
800a962: e041 b.n 800a9e8 <USB_EPStartXfer+0x8a8>
800a964: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a968: 085b lsrs r3, r3, #1
800a96a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a96e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a972: f003 0301 and.w r3, r3, #1
800a976: 2b00 cmp r3, #0
800a978: d004 beq.n 800a984 <USB_EPStartXfer+0x844>
800a97a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a97e: 3301 adds r3, #1
800a980: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a984: 6b7b ldr r3, [r7, #52] @ 0x34
800a986: 881b ldrh r3, [r3, #0]
800a988: b29a uxth r2, r3
800a98a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a98e: b29b uxth r3, r3
800a990: 029b lsls r3, r3, #10
800a992: b29b uxth r3, r3
800a994: 4313 orrs r3, r2
800a996: b29a uxth r2, r3
800a998: 6b7b ldr r3, [r7, #52] @ 0x34
800a99a: 801a strh r2, [r3, #0]
800a99c: e024 b.n 800a9e8 <USB_EPStartXfer+0x8a8>
800a99e: f507 7384 add.w r3, r7, #264 @ 0x108
800a9a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9a6: 681b ldr r3, [r3, #0]
800a9a8: 785b ldrb r3, [r3, #1]
800a9aa: 2b01 cmp r3, #1
800a9ac: d11c bne.n 800a9e8 <USB_EPStartXfer+0x8a8>
800a9ae: f507 7384 add.w r3, r7, #264 @ 0x108
800a9b2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9b6: 681b ldr r3, [r3, #0]
800a9b8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a9bc: b29b uxth r3, r3
800a9be: 461a mov r2, r3
800a9c0: 6c3b ldr r3, [r7, #64] @ 0x40
800a9c2: 4413 add r3, r2
800a9c4: 643b str r3, [r7, #64] @ 0x40
800a9c6: f507 7384 add.w r3, r7, #264 @ 0x108
800a9ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9ce: 681b ldr r3, [r3, #0]
800a9d0: 781b ldrb r3, [r3, #0]
800a9d2: 011a lsls r2, r3, #4
800a9d4: 6c3b ldr r3, [r7, #64] @ 0x40
800a9d6: 4413 add r3, r2
800a9d8: f203 430c addw r3, r3, #1036 @ 0x40c
800a9dc: 63fb str r3, [r7, #60] @ 0x3c
800a9de: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a9e2: b29a uxth r2, r3
800a9e4: 6bfb ldr r3, [r7, #60] @ 0x3c
800a9e6: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800a9e8: f507 7384 add.w r3, r7, #264 @ 0x108
800a9ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9f0: 681b ldr r3, [r3, #0]
800a9f2: 895b ldrh r3, [r3, #10]
800a9f4: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a9f8: f507 7384 add.w r3, r7, #264 @ 0x108
800a9fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa00: 681b ldr r3, [r3, #0]
800aa02: 6959 ldr r1, [r3, #20]
800aa04: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa08: b29b uxth r3, r3
800aa0a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800aa0e: f507 7084 add.w r0, r7, #264 @ 0x108
800aa12: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800aa16: 6800 ldr r0, [r0, #0]
800aa18: f001 f881 bl 800bb1e <USB_WritePMA>
800aa1c: e227 b.n 800ae6e <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
800aa1e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa22: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa26: 681b ldr r3, [r3, #0]
800aa28: 6a1b ldr r3, [r3, #32]
800aa2a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
800aa2e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa32: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa36: 681a ldr r2, [r3, #0]
800aa38: f507 7384 add.w r3, r7, #264 @ 0x108
800aa3c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa40: 681b ldr r3, [r3, #0]
800aa42: 781b ldrb r3, [r3, #0]
800aa44: 009b lsls r3, r3, #2
800aa46: 4413 add r3, r2
800aa48: 881b ldrh r3, [r3, #0]
800aa4a: b29b uxth r3, r3
800aa4c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800aa50: f023 0370 bic.w r3, r3, #112 @ 0x70
800aa54: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800aa58: f507 7384 add.w r3, r7, #264 @ 0x108
800aa5c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa60: 681a ldr r2, [r3, #0]
800aa62: f507 7384 add.w r3, r7, #264 @ 0x108
800aa66: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa6a: 681b ldr r3, [r3, #0]
800aa6c: 781b ldrb r3, [r3, #0]
800aa6e: 009b lsls r3, r3, #2
800aa70: 441a add r2, r3
800aa72: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800aa76: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800aa7a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800aa7e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800aa82: f043 0380 orr.w r3, r3, #128 @ 0x80
800aa86: b29b uxth r3, r3
800aa88: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800aa8a: f507 7384 add.w r3, r7, #264 @ 0x108
800aa8e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa92: 681b ldr r3, [r3, #0]
800aa94: 65fb str r3, [r7, #92] @ 0x5c
800aa96: f507 7384 add.w r3, r7, #264 @ 0x108
800aa9a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa9e: 681b ldr r3, [r3, #0]
800aaa0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800aaa4: b29b uxth r3, r3
800aaa6: 461a mov r2, r3
800aaa8: 6dfb ldr r3, [r7, #92] @ 0x5c
800aaaa: 4413 add r3, r2
800aaac: 65fb str r3, [r7, #92] @ 0x5c
800aaae: f507 7384 add.w r3, r7, #264 @ 0x108
800aab2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aab6: 681b ldr r3, [r3, #0]
800aab8: 781b ldrb r3, [r3, #0]
800aaba: 011a lsls r2, r3, #4
800aabc: 6dfb ldr r3, [r7, #92] @ 0x5c
800aabe: 4413 add r3, r2
800aac0: f203 4304 addw r3, r3, #1028 @ 0x404
800aac4: 65bb str r3, [r7, #88] @ 0x58
800aac6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aaca: b29a uxth r2, r3
800aacc: 6dbb ldr r3, [r7, #88] @ 0x58
800aace: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800aad0: f507 7384 add.w r3, r7, #264 @ 0x108
800aad4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aad8: 681b ldr r3, [r3, #0]
800aada: 891b ldrh r3, [r3, #8]
800aadc: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800aae0: f507 7384 add.w r3, r7, #264 @ 0x108
800aae4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aae8: 681b ldr r3, [r3, #0]
800aaea: 6959 ldr r1, [r3, #20]
800aaec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aaf0: b29b uxth r3, r3
800aaf2: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800aaf6: f507 7084 add.w r0, r7, #264 @ 0x108
800aafa: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800aafe: 6800 ldr r0, [r0, #0]
800ab00: f001 f80d bl 800bb1e <USB_WritePMA>
800ab04: e1b3 b.n 800ae6e <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800ab06: f507 7384 add.w r3, r7, #264 @ 0x108
800ab0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab0e: 681b ldr r3, [r3, #0]
800ab10: 6a1a ldr r2, [r3, #32]
800ab12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab16: 1ad2 subs r2, r2, r3
800ab18: f507 7384 add.w r3, r7, #264 @ 0x108
800ab1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab20: 681b ldr r3, [r3, #0]
800ab22: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800ab24: f507 7384 add.w r3, r7, #264 @ 0x108
800ab28: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab2c: 681a ldr r2, [r3, #0]
800ab2e: f507 7384 add.w r3, r7, #264 @ 0x108
800ab32: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab36: 681b ldr r3, [r3, #0]
800ab38: 781b ldrb r3, [r3, #0]
800ab3a: 009b lsls r3, r3, #2
800ab3c: 4413 add r3, r2
800ab3e: 881b ldrh r3, [r3, #0]
800ab40: b29b uxth r3, r3
800ab42: f003 0340 and.w r3, r3, #64 @ 0x40
800ab46: 2b00 cmp r3, #0
800ab48: f000 80c6 beq.w 800acd8 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800ab4c: f507 7384 add.w r3, r7, #264 @ 0x108
800ab50: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab54: 681b ldr r3, [r3, #0]
800ab56: 673b str r3, [r7, #112] @ 0x70
800ab58: f507 7384 add.w r3, r7, #264 @ 0x108
800ab5c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab60: 681b ldr r3, [r3, #0]
800ab62: 785b ldrb r3, [r3, #1]
800ab64: 2b00 cmp r3, #0
800ab66: d177 bne.n 800ac58 <USB_EPStartXfer+0xb18>
800ab68: f507 7384 add.w r3, r7, #264 @ 0x108
800ab6c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab70: 681b ldr r3, [r3, #0]
800ab72: 66bb str r3, [r7, #104] @ 0x68
800ab74: f507 7384 add.w r3, r7, #264 @ 0x108
800ab78: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab7c: 681b ldr r3, [r3, #0]
800ab7e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ab82: b29b uxth r3, r3
800ab84: 461a mov r2, r3
800ab86: 6ebb ldr r3, [r7, #104] @ 0x68
800ab88: 4413 add r3, r2
800ab8a: 66bb str r3, [r7, #104] @ 0x68
800ab8c: f507 7384 add.w r3, r7, #264 @ 0x108
800ab90: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab94: 681b ldr r3, [r3, #0]
800ab96: 781b ldrb r3, [r3, #0]
800ab98: 011a lsls r2, r3, #4
800ab9a: 6ebb ldr r3, [r7, #104] @ 0x68
800ab9c: 4413 add r3, r2
800ab9e: f203 430c addw r3, r3, #1036 @ 0x40c
800aba2: 667b str r3, [r7, #100] @ 0x64
800aba4: 6e7b ldr r3, [r7, #100] @ 0x64
800aba6: 881b ldrh r3, [r3, #0]
800aba8: b29b uxth r3, r3
800abaa: f3c3 0309 ubfx r3, r3, #0, #10
800abae: b29a uxth r2, r3
800abb0: 6e7b ldr r3, [r7, #100] @ 0x64
800abb2: 801a strh r2, [r3, #0]
800abb4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abb8: 2b3e cmp r3, #62 @ 0x3e
800abba: d921 bls.n 800ac00 <USB_EPStartXfer+0xac0>
800abbc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abc0: 095b lsrs r3, r3, #5
800abc2: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800abc6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abca: f003 031f and.w r3, r3, #31
800abce: 2b00 cmp r3, #0
800abd0: d104 bne.n 800abdc <USB_EPStartXfer+0xa9c>
800abd2: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800abd6: 3b01 subs r3, #1
800abd8: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800abdc: 6e7b ldr r3, [r7, #100] @ 0x64
800abde: 881b ldrh r3, [r3, #0]
800abe0: b29a uxth r2, r3
800abe2: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800abe6: b29b uxth r3, r3
800abe8: 029b lsls r3, r3, #10
800abea: b29b uxth r3, r3
800abec: 4313 orrs r3, r2
800abee: b29b uxth r3, r3
800abf0: ea6f 4343 mvn.w r3, r3, lsl #17
800abf4: ea6f 4353 mvn.w r3, r3, lsr #17
800abf8: b29a uxth r2, r3
800abfa: 6e7b ldr r3, [r7, #100] @ 0x64
800abfc: 801a strh r2, [r3, #0]
800abfe: e050 b.n 800aca2 <USB_EPStartXfer+0xb62>
800ac00: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac04: 2b00 cmp r3, #0
800ac06: d10a bne.n 800ac1e <USB_EPStartXfer+0xade>
800ac08: 6e7b ldr r3, [r7, #100] @ 0x64
800ac0a: 881b ldrh r3, [r3, #0]
800ac0c: b29b uxth r3, r3
800ac0e: ea6f 4343 mvn.w r3, r3, lsl #17
800ac12: ea6f 4353 mvn.w r3, r3, lsr #17
800ac16: b29a uxth r2, r3
800ac18: 6e7b ldr r3, [r7, #100] @ 0x64
800ac1a: 801a strh r2, [r3, #0]
800ac1c: e041 b.n 800aca2 <USB_EPStartXfer+0xb62>
800ac1e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac22: 085b lsrs r3, r3, #1
800ac24: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800ac28: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac2c: f003 0301 and.w r3, r3, #1
800ac30: 2b00 cmp r3, #0
800ac32: d004 beq.n 800ac3e <USB_EPStartXfer+0xafe>
800ac34: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800ac38: 3301 adds r3, #1
800ac3a: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800ac3e: 6e7b ldr r3, [r7, #100] @ 0x64
800ac40: 881b ldrh r3, [r3, #0]
800ac42: b29a uxth r2, r3
800ac44: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800ac48: b29b uxth r3, r3
800ac4a: 029b lsls r3, r3, #10
800ac4c: b29b uxth r3, r3
800ac4e: 4313 orrs r3, r2
800ac50: b29a uxth r2, r3
800ac52: 6e7b ldr r3, [r7, #100] @ 0x64
800ac54: 801a strh r2, [r3, #0]
800ac56: e024 b.n 800aca2 <USB_EPStartXfer+0xb62>
800ac58: f507 7384 add.w r3, r7, #264 @ 0x108
800ac5c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac60: 681b ldr r3, [r3, #0]
800ac62: 785b ldrb r3, [r3, #1]
800ac64: 2b01 cmp r3, #1
800ac66: d11c bne.n 800aca2 <USB_EPStartXfer+0xb62>
800ac68: f507 7384 add.w r3, r7, #264 @ 0x108
800ac6c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ac70: 681b ldr r3, [r3, #0]
800ac72: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ac76: b29b uxth r3, r3
800ac78: 461a mov r2, r3
800ac7a: 6f3b ldr r3, [r7, #112] @ 0x70
800ac7c: 4413 add r3, r2
800ac7e: 673b str r3, [r7, #112] @ 0x70
800ac80: f507 7384 add.w r3, r7, #264 @ 0x108
800ac84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac88: 681b ldr r3, [r3, #0]
800ac8a: 781b ldrb r3, [r3, #0]
800ac8c: 011a lsls r2, r3, #4
800ac8e: 6f3b ldr r3, [r7, #112] @ 0x70
800ac90: 4413 add r3, r2
800ac92: f203 430c addw r3, r3, #1036 @ 0x40c
800ac96: 66fb str r3, [r7, #108] @ 0x6c
800ac98: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac9c: b29a uxth r2, r3
800ac9e: 6efb ldr r3, [r7, #108] @ 0x6c
800aca0: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800aca2: f507 7384 add.w r3, r7, #264 @ 0x108
800aca6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acaa: 681b ldr r3, [r3, #0]
800acac: 895b ldrh r3, [r3, #10]
800acae: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800acb2: f507 7384 add.w r3, r7, #264 @ 0x108
800acb6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acba: 681b ldr r3, [r3, #0]
800acbc: 6959 ldr r1, [r3, #20]
800acbe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acc2: b29b uxth r3, r3
800acc4: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800acc8: f507 7084 add.w r0, r7, #264 @ 0x108
800accc: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800acd0: 6800 ldr r0, [r0, #0]
800acd2: f000 ff24 bl 800bb1e <USB_WritePMA>
800acd6: e0ca b.n 800ae6e <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800acd8: f507 7384 add.w r3, r7, #264 @ 0x108
800acdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ace0: 681b ldr r3, [r3, #0]
800ace2: 785b ldrb r3, [r3, #1]
800ace4: 2b00 cmp r3, #0
800ace6: d177 bne.n 800add8 <USB_EPStartXfer+0xc98>
800ace8: f507 7384 add.w r3, r7, #264 @ 0x108
800acec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800acf0: 681b ldr r3, [r3, #0]
800acf2: 67fb str r3, [r7, #124] @ 0x7c
800acf4: f507 7384 add.w r3, r7, #264 @ 0x108
800acf8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800acfc: 681b ldr r3, [r3, #0]
800acfe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ad02: b29b uxth r3, r3
800ad04: 461a mov r2, r3
800ad06: 6ffb ldr r3, [r7, #124] @ 0x7c
800ad08: 4413 add r3, r2
800ad0a: 67fb str r3, [r7, #124] @ 0x7c
800ad0c: f507 7384 add.w r3, r7, #264 @ 0x108
800ad10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad14: 681b ldr r3, [r3, #0]
800ad16: 781b ldrb r3, [r3, #0]
800ad18: 011a lsls r2, r3, #4
800ad1a: 6ffb ldr r3, [r7, #124] @ 0x7c
800ad1c: 4413 add r3, r2
800ad1e: f203 4304 addw r3, r3, #1028 @ 0x404
800ad22: 67bb str r3, [r7, #120] @ 0x78
800ad24: 6fbb ldr r3, [r7, #120] @ 0x78
800ad26: 881b ldrh r3, [r3, #0]
800ad28: b29b uxth r3, r3
800ad2a: f3c3 0309 ubfx r3, r3, #0, #10
800ad2e: b29a uxth r2, r3
800ad30: 6fbb ldr r3, [r7, #120] @ 0x78
800ad32: 801a strh r2, [r3, #0]
800ad34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad38: 2b3e cmp r3, #62 @ 0x3e
800ad3a: d921 bls.n 800ad80 <USB_EPStartXfer+0xc40>
800ad3c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad40: 095b lsrs r3, r3, #5
800ad42: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800ad46: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad4a: f003 031f and.w r3, r3, #31
800ad4e: 2b00 cmp r3, #0
800ad50: d104 bne.n 800ad5c <USB_EPStartXfer+0xc1c>
800ad52: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800ad56: 3b01 subs r3, #1
800ad58: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800ad5c: 6fbb ldr r3, [r7, #120] @ 0x78
800ad5e: 881b ldrh r3, [r3, #0]
800ad60: b29a uxth r2, r3
800ad62: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800ad66: b29b uxth r3, r3
800ad68: 029b lsls r3, r3, #10
800ad6a: b29b uxth r3, r3
800ad6c: 4313 orrs r3, r2
800ad6e: b29b uxth r3, r3
800ad70: ea6f 4343 mvn.w r3, r3, lsl #17
800ad74: ea6f 4353 mvn.w r3, r3, lsr #17
800ad78: b29a uxth r2, r3
800ad7a: 6fbb ldr r3, [r7, #120] @ 0x78
800ad7c: 801a strh r2, [r3, #0]
800ad7e: e05c b.n 800ae3a <USB_EPStartXfer+0xcfa>
800ad80: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad84: 2b00 cmp r3, #0
800ad86: d10a bne.n 800ad9e <USB_EPStartXfer+0xc5e>
800ad88: 6fbb ldr r3, [r7, #120] @ 0x78
800ad8a: 881b ldrh r3, [r3, #0]
800ad8c: b29b uxth r3, r3
800ad8e: ea6f 4343 mvn.w r3, r3, lsl #17
800ad92: ea6f 4353 mvn.w r3, r3, lsr #17
800ad96: b29a uxth r2, r3
800ad98: 6fbb ldr r3, [r7, #120] @ 0x78
800ad9a: 801a strh r2, [r3, #0]
800ad9c: e04d b.n 800ae3a <USB_EPStartXfer+0xcfa>
800ad9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ada2: 085b lsrs r3, r3, #1
800ada4: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800ada8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800adac: f003 0301 and.w r3, r3, #1
800adb0: 2b00 cmp r3, #0
800adb2: d004 beq.n 800adbe <USB_EPStartXfer+0xc7e>
800adb4: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800adb8: 3301 adds r3, #1
800adba: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800adbe: 6fbb ldr r3, [r7, #120] @ 0x78
800adc0: 881b ldrh r3, [r3, #0]
800adc2: b29a uxth r2, r3
800adc4: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800adc8: b29b uxth r3, r3
800adca: 029b lsls r3, r3, #10
800adcc: b29b uxth r3, r3
800adce: 4313 orrs r3, r2
800add0: b29a uxth r2, r3
800add2: 6fbb ldr r3, [r7, #120] @ 0x78
800add4: 801a strh r2, [r3, #0]
800add6: e030 b.n 800ae3a <USB_EPStartXfer+0xcfa>
800add8: f507 7384 add.w r3, r7, #264 @ 0x108
800addc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ade0: 681b ldr r3, [r3, #0]
800ade2: 785b ldrb r3, [r3, #1]
800ade4: 2b01 cmp r3, #1
800ade6: d128 bne.n 800ae3a <USB_EPStartXfer+0xcfa>
800ade8: f507 7384 add.w r3, r7, #264 @ 0x108
800adec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800adf0: 681b ldr r3, [r3, #0]
800adf2: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800adf6: f507 7384 add.w r3, r7, #264 @ 0x108
800adfa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800adfe: 681b ldr r3, [r3, #0]
800ae00: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ae04: b29b uxth r3, r3
800ae06: 461a mov r2, r3
800ae08: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800ae0c: 4413 add r3, r2
800ae0e: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800ae12: f507 7384 add.w r3, r7, #264 @ 0x108
800ae16: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae1a: 681b ldr r3, [r3, #0]
800ae1c: 781b ldrb r3, [r3, #0]
800ae1e: 011a lsls r2, r3, #4
800ae20: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800ae24: 4413 add r3, r2
800ae26: f203 4304 addw r3, r3, #1028 @ 0x404
800ae2a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800ae2e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae32: b29a uxth r2, r3
800ae34: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800ae38: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800ae3a: f507 7384 add.w r3, r7, #264 @ 0x108
800ae3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae42: 681b ldr r3, [r3, #0]
800ae44: 891b ldrh r3, [r3, #8]
800ae46: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800ae4a: f507 7384 add.w r3, r7, #264 @ 0x108
800ae4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae52: 681b ldr r3, [r3, #0]
800ae54: 6959 ldr r1, [r3, #20]
800ae56: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae5a: b29b uxth r3, r3
800ae5c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800ae60: f507 7084 add.w r0, r7, #264 @ 0x108
800ae64: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800ae68: 6800 ldr r0, [r0, #0]
800ae6a: f000 fe58 bl 800bb1e <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
800ae6e: f507 7384 add.w r3, r7, #264 @ 0x108
800ae72: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae76: 681a ldr r2, [r3, #0]
800ae78: f507 7384 add.w r3, r7, #264 @ 0x108
800ae7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae80: 681b ldr r3, [r3, #0]
800ae82: 781b ldrb r3, [r3, #0]
800ae84: 009b lsls r3, r3, #2
800ae86: 4413 add r3, r2
800ae88: 881b ldrh r3, [r3, #0]
800ae8a: b29b uxth r3, r3
800ae8c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800ae90: f023 0340 bic.w r3, r3, #64 @ 0x40
800ae94: 817b strh r3, [r7, #10]
800ae96: 897b ldrh r3, [r7, #10]
800ae98: f083 0310 eor.w r3, r3, #16
800ae9c: 817b strh r3, [r7, #10]
800ae9e: 897b ldrh r3, [r7, #10]
800aea0: f083 0320 eor.w r3, r3, #32
800aea4: 817b strh r3, [r7, #10]
800aea6: f507 7384 add.w r3, r7, #264 @ 0x108
800aeaa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aeae: 681a ldr r2, [r3, #0]
800aeb0: f507 7384 add.w r3, r7, #264 @ 0x108
800aeb4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aeb8: 681b ldr r3, [r3, #0]
800aeba: 781b ldrb r3, [r3, #0]
800aebc: 009b lsls r3, r3, #2
800aebe: 441a add r2, r3
800aec0: 897b ldrh r3, [r7, #10]
800aec2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800aec6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800aeca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800aece: f043 0380 orr.w r3, r3, #128 @ 0x80
800aed2: b29b uxth r3, r3
800aed4: 8013 strh r3, [r2, #0]
800aed6: f000 bcde b.w 800b896 <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800aeda: f507 7384 add.w r3, r7, #264 @ 0x108
800aede: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aee2: 681b ldr r3, [r3, #0]
800aee4: 7b1b ldrb r3, [r3, #12]
800aee6: 2b00 cmp r3, #0
800aee8: f040 80bb bne.w 800b062 <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800aeec: f507 7384 add.w r3, r7, #264 @ 0x108
800aef0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aef4: 681b ldr r3, [r3, #0]
800aef6: 699a ldr r2, [r3, #24]
800aef8: f507 7384 add.w r3, r7, #264 @ 0x108
800aefc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af00: 681b ldr r3, [r3, #0]
800af02: 691b ldr r3, [r3, #16]
800af04: 429a cmp r2, r3
800af06: d917 bls.n 800af38 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
800af08: f507 7384 add.w r3, r7, #264 @ 0x108
800af0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af10: 681b ldr r3, [r3, #0]
800af12: 691b ldr r3, [r3, #16]
800af14: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800af18: f507 7384 add.w r3, r7, #264 @ 0x108
800af1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af20: 681b ldr r3, [r3, #0]
800af22: 699a ldr r2, [r3, #24]
800af24: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af28: 1ad2 subs r2, r2, r3
800af2a: f507 7384 add.w r3, r7, #264 @ 0x108
800af2e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af32: 681b ldr r3, [r3, #0]
800af34: 619a str r2, [r3, #24]
800af36: e00e b.n 800af56 <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
800af38: f507 7384 add.w r3, r7, #264 @ 0x108
800af3c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af40: 681b ldr r3, [r3, #0]
800af42: 699b ldr r3, [r3, #24]
800af44: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800af48: f507 7384 add.w r3, r7, #264 @ 0x108
800af4c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af50: 681b ldr r3, [r3, #0]
800af52: 2200 movs r2, #0
800af54: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
800af56: f507 7384 add.w r3, r7, #264 @ 0x108
800af5a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af5e: 681b ldr r3, [r3, #0]
800af60: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800af64: f507 7384 add.w r3, r7, #264 @ 0x108
800af68: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af6c: 681b ldr r3, [r3, #0]
800af6e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800af72: b29b uxth r3, r3
800af74: 461a mov r2, r3
800af76: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800af7a: 4413 add r3, r2
800af7c: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800af80: f507 7384 add.w r3, r7, #264 @ 0x108
800af84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af88: 681b ldr r3, [r3, #0]
800af8a: 781b ldrb r3, [r3, #0]
800af8c: 011a lsls r2, r3, #4
800af8e: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800af92: 4413 add r3, r2
800af94: f203 430c addw r3, r3, #1036 @ 0x40c
800af98: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800af9c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800afa0: 881b ldrh r3, [r3, #0]
800afa2: b29b uxth r3, r3
800afa4: f3c3 0309 ubfx r3, r3, #0, #10
800afa8: b29a uxth r2, r3
800afaa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800afae: 801a strh r2, [r3, #0]
800afb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afb4: 2b3e cmp r3, #62 @ 0x3e
800afb6: d924 bls.n 800b002 <USB_EPStartXfer+0xec2>
800afb8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afbc: 095b lsrs r3, r3, #5
800afbe: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800afc2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afc6: f003 031f and.w r3, r3, #31
800afca: 2b00 cmp r3, #0
800afcc: d104 bne.n 800afd8 <USB_EPStartXfer+0xe98>
800afce: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800afd2: 3b01 subs r3, #1
800afd4: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800afd8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800afdc: 881b ldrh r3, [r3, #0]
800afde: b29a uxth r2, r3
800afe0: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800afe4: b29b uxth r3, r3
800afe6: 029b lsls r3, r3, #10
800afe8: b29b uxth r3, r3
800afea: 4313 orrs r3, r2
800afec: b29b uxth r3, r3
800afee: ea6f 4343 mvn.w r3, r3, lsl #17
800aff2: ea6f 4353 mvn.w r3, r3, lsr #17
800aff6: b29a uxth r2, r3
800aff8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800affc: 801a strh r2, [r3, #0]
800affe: f000 bc10 b.w 800b822 <USB_EPStartXfer+0x16e2>
800b002: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b006: 2b00 cmp r3, #0
800b008: d10c bne.n 800b024 <USB_EPStartXfer+0xee4>
800b00a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b00e: 881b ldrh r3, [r3, #0]
800b010: b29b uxth r3, r3
800b012: ea6f 4343 mvn.w r3, r3, lsl #17
800b016: ea6f 4353 mvn.w r3, r3, lsr #17
800b01a: b29a uxth r2, r3
800b01c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b020: 801a strh r2, [r3, #0]
800b022: e3fe b.n 800b822 <USB_EPStartXfer+0x16e2>
800b024: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b028: 085b lsrs r3, r3, #1
800b02a: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b02e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b032: f003 0301 and.w r3, r3, #1
800b036: 2b00 cmp r3, #0
800b038: d004 beq.n 800b044 <USB_EPStartXfer+0xf04>
800b03a: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b03e: 3301 adds r3, #1
800b040: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b044: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b048: 881b ldrh r3, [r3, #0]
800b04a: b29a uxth r2, r3
800b04c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b050: b29b uxth r3, r3
800b052: 029b lsls r3, r3, #10
800b054: b29b uxth r3, r3
800b056: 4313 orrs r3, r2
800b058: b29a uxth r2, r3
800b05a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b05e: 801a strh r2, [r3, #0]
800b060: e3df b.n 800b822 <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800b062: f507 7384 add.w r3, r7, #264 @ 0x108
800b066: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b06a: 681b ldr r3, [r3, #0]
800b06c: 78db ldrb r3, [r3, #3]
800b06e: 2b02 cmp r3, #2
800b070: f040 8218 bne.w 800b4a4 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800b074: f507 7384 add.w r3, r7, #264 @ 0x108
800b078: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b07c: 681b ldr r3, [r3, #0]
800b07e: 785b ldrb r3, [r3, #1]
800b080: 2b00 cmp r3, #0
800b082: f040 809d bne.w 800b1c0 <USB_EPStartXfer+0x1080>
800b086: f507 7384 add.w r3, r7, #264 @ 0x108
800b08a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b08e: 681b ldr r3, [r3, #0]
800b090: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b094: f507 7384 add.w r3, r7, #264 @ 0x108
800b098: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b09c: 681b ldr r3, [r3, #0]
800b09e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b0a2: b29b uxth r3, r3
800b0a4: 461a mov r2, r3
800b0a6: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b0aa: 4413 add r3, r2
800b0ac: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b0b0: f507 7384 add.w r3, r7, #264 @ 0x108
800b0b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0b8: 681b ldr r3, [r3, #0]
800b0ba: 781b ldrb r3, [r3, #0]
800b0bc: 011a lsls r2, r3, #4
800b0be: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b0c2: 4413 add r3, r2
800b0c4: f203 4304 addw r3, r3, #1028 @ 0x404
800b0c8: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800b0cc: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b0d0: 881b ldrh r3, [r3, #0]
800b0d2: b29b uxth r3, r3
800b0d4: f3c3 0309 ubfx r3, r3, #0, #10
800b0d8: b29a uxth r2, r3
800b0da: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b0de: 801a strh r2, [r3, #0]
800b0e0: f507 7384 add.w r3, r7, #264 @ 0x108
800b0e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0e8: 681b ldr r3, [r3, #0]
800b0ea: 691b ldr r3, [r3, #16]
800b0ec: 2b3e cmp r3, #62 @ 0x3e
800b0ee: d92b bls.n 800b148 <USB_EPStartXfer+0x1008>
800b0f0: f507 7384 add.w r3, r7, #264 @ 0x108
800b0f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0f8: 681b ldr r3, [r3, #0]
800b0fa: 691b ldr r3, [r3, #16]
800b0fc: 095b lsrs r3, r3, #5
800b0fe: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b102: f507 7384 add.w r3, r7, #264 @ 0x108
800b106: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b10a: 681b ldr r3, [r3, #0]
800b10c: 691b ldr r3, [r3, #16]
800b10e: f003 031f and.w r3, r3, #31
800b112: 2b00 cmp r3, #0
800b114: d104 bne.n 800b120 <USB_EPStartXfer+0xfe0>
800b116: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b11a: 3b01 subs r3, #1
800b11c: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b120: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b124: 881b ldrh r3, [r3, #0]
800b126: b29a uxth r2, r3
800b128: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b12c: b29b uxth r3, r3
800b12e: 029b lsls r3, r3, #10
800b130: b29b uxth r3, r3
800b132: 4313 orrs r3, r2
800b134: b29b uxth r3, r3
800b136: ea6f 4343 mvn.w r3, r3, lsl #17
800b13a: ea6f 4353 mvn.w r3, r3, lsr #17
800b13e: b29a uxth r2, r3
800b140: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b144: 801a strh r2, [r3, #0]
800b146: e070 b.n 800b22a <USB_EPStartXfer+0x10ea>
800b148: f507 7384 add.w r3, r7, #264 @ 0x108
800b14c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b150: 681b ldr r3, [r3, #0]
800b152: 691b ldr r3, [r3, #16]
800b154: 2b00 cmp r3, #0
800b156: d10c bne.n 800b172 <USB_EPStartXfer+0x1032>
800b158: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b15c: 881b ldrh r3, [r3, #0]
800b15e: b29b uxth r3, r3
800b160: ea6f 4343 mvn.w r3, r3, lsl #17
800b164: ea6f 4353 mvn.w r3, r3, lsr #17
800b168: b29a uxth r2, r3
800b16a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b16e: 801a strh r2, [r3, #0]
800b170: e05b b.n 800b22a <USB_EPStartXfer+0x10ea>
800b172: f507 7384 add.w r3, r7, #264 @ 0x108
800b176: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b17a: 681b ldr r3, [r3, #0]
800b17c: 691b ldr r3, [r3, #16]
800b17e: 085b lsrs r3, r3, #1
800b180: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b184: f507 7384 add.w r3, r7, #264 @ 0x108
800b188: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b18c: 681b ldr r3, [r3, #0]
800b18e: 691b ldr r3, [r3, #16]
800b190: f003 0301 and.w r3, r3, #1
800b194: 2b00 cmp r3, #0
800b196: d004 beq.n 800b1a2 <USB_EPStartXfer+0x1062>
800b198: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b19c: 3301 adds r3, #1
800b19e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b1a2: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b1a6: 881b ldrh r3, [r3, #0]
800b1a8: b29a uxth r2, r3
800b1aa: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b1ae: b29b uxth r3, r3
800b1b0: 029b lsls r3, r3, #10
800b1b2: b29b uxth r3, r3
800b1b4: 4313 orrs r3, r2
800b1b6: b29a uxth r2, r3
800b1b8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b1bc: 801a strh r2, [r3, #0]
800b1be: e034 b.n 800b22a <USB_EPStartXfer+0x10ea>
800b1c0: f507 7384 add.w r3, r7, #264 @ 0x108
800b1c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1c8: 681b ldr r3, [r3, #0]
800b1ca: 785b ldrb r3, [r3, #1]
800b1cc: 2b01 cmp r3, #1
800b1ce: d12c bne.n 800b22a <USB_EPStartXfer+0x10ea>
800b1d0: f507 7384 add.w r3, r7, #264 @ 0x108
800b1d4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1d8: 681b ldr r3, [r3, #0]
800b1da: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b1de: f507 7384 add.w r3, r7, #264 @ 0x108
800b1e2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1e6: 681b ldr r3, [r3, #0]
800b1e8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b1ec: b29b uxth r3, r3
800b1ee: 461a mov r2, r3
800b1f0: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b1f4: 4413 add r3, r2
800b1f6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b1fa: f507 7384 add.w r3, r7, #264 @ 0x108
800b1fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b202: 681b ldr r3, [r3, #0]
800b204: 781b ldrb r3, [r3, #0]
800b206: 011a lsls r2, r3, #4
800b208: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b20c: 4413 add r3, r2
800b20e: f203 4304 addw r3, r3, #1028 @ 0x404
800b212: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800b216: f507 7384 add.w r3, r7, #264 @ 0x108
800b21a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b21e: 681b ldr r3, [r3, #0]
800b220: 691b ldr r3, [r3, #16]
800b222: b29a uxth r2, r3
800b224: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
800b228: 801a strh r2, [r3, #0]
800b22a: f507 7384 add.w r3, r7, #264 @ 0x108
800b22e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b232: 681b ldr r3, [r3, #0]
800b234: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b238: f507 7384 add.w r3, r7, #264 @ 0x108
800b23c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b240: 681b ldr r3, [r3, #0]
800b242: 785b ldrb r3, [r3, #1]
800b244: 2b00 cmp r3, #0
800b246: f040 809d bne.w 800b384 <USB_EPStartXfer+0x1244>
800b24a: f507 7384 add.w r3, r7, #264 @ 0x108
800b24e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b252: 681b ldr r3, [r3, #0]
800b254: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b258: f507 7384 add.w r3, r7, #264 @ 0x108
800b25c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b260: 681b ldr r3, [r3, #0]
800b262: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b266: b29b uxth r3, r3
800b268: 461a mov r2, r3
800b26a: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b26e: 4413 add r3, r2
800b270: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b274: f507 7384 add.w r3, r7, #264 @ 0x108
800b278: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b27c: 681b ldr r3, [r3, #0]
800b27e: 781b ldrb r3, [r3, #0]
800b280: 011a lsls r2, r3, #4
800b282: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b286: 4413 add r3, r2
800b288: f203 430c addw r3, r3, #1036 @ 0x40c
800b28c: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800b290: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b294: 881b ldrh r3, [r3, #0]
800b296: b29b uxth r3, r3
800b298: f3c3 0309 ubfx r3, r3, #0, #10
800b29c: b29a uxth r2, r3
800b29e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b2a2: 801a strh r2, [r3, #0]
800b2a4: f507 7384 add.w r3, r7, #264 @ 0x108
800b2a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2ac: 681b ldr r3, [r3, #0]
800b2ae: 691b ldr r3, [r3, #16]
800b2b0: 2b3e cmp r3, #62 @ 0x3e
800b2b2: d92b bls.n 800b30c <USB_EPStartXfer+0x11cc>
800b2b4: f507 7384 add.w r3, r7, #264 @ 0x108
800b2b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2bc: 681b ldr r3, [r3, #0]
800b2be: 691b ldr r3, [r3, #16]
800b2c0: 095b lsrs r3, r3, #5
800b2c2: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b2c6: f507 7384 add.w r3, r7, #264 @ 0x108
800b2ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2ce: 681b ldr r3, [r3, #0]
800b2d0: 691b ldr r3, [r3, #16]
800b2d2: f003 031f and.w r3, r3, #31
800b2d6: 2b00 cmp r3, #0
800b2d8: d104 bne.n 800b2e4 <USB_EPStartXfer+0x11a4>
800b2da: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b2de: 3b01 subs r3, #1
800b2e0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b2e4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b2e8: 881b ldrh r3, [r3, #0]
800b2ea: b29a uxth r2, r3
800b2ec: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b2f0: b29b uxth r3, r3
800b2f2: 029b lsls r3, r3, #10
800b2f4: b29b uxth r3, r3
800b2f6: 4313 orrs r3, r2
800b2f8: b29b uxth r3, r3
800b2fa: ea6f 4343 mvn.w r3, r3, lsl #17
800b2fe: ea6f 4353 mvn.w r3, r3, lsr #17
800b302: b29a uxth r2, r3
800b304: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b308: 801a strh r2, [r3, #0]
800b30a: e069 b.n 800b3e0 <USB_EPStartXfer+0x12a0>
800b30c: f507 7384 add.w r3, r7, #264 @ 0x108
800b310: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b314: 681b ldr r3, [r3, #0]
800b316: 691b ldr r3, [r3, #16]
800b318: 2b00 cmp r3, #0
800b31a: d10c bne.n 800b336 <USB_EPStartXfer+0x11f6>
800b31c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b320: 881b ldrh r3, [r3, #0]
800b322: b29b uxth r3, r3
800b324: ea6f 4343 mvn.w r3, r3, lsl #17
800b328: ea6f 4353 mvn.w r3, r3, lsr #17
800b32c: b29a uxth r2, r3
800b32e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b332: 801a strh r2, [r3, #0]
800b334: e054 b.n 800b3e0 <USB_EPStartXfer+0x12a0>
800b336: f507 7384 add.w r3, r7, #264 @ 0x108
800b33a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b33e: 681b ldr r3, [r3, #0]
800b340: 691b ldr r3, [r3, #16]
800b342: 085b lsrs r3, r3, #1
800b344: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b348: f507 7384 add.w r3, r7, #264 @ 0x108
800b34c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b350: 681b ldr r3, [r3, #0]
800b352: 691b ldr r3, [r3, #16]
800b354: f003 0301 and.w r3, r3, #1
800b358: 2b00 cmp r3, #0
800b35a: d004 beq.n 800b366 <USB_EPStartXfer+0x1226>
800b35c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b360: 3301 adds r3, #1
800b362: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b366: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b36a: 881b ldrh r3, [r3, #0]
800b36c: b29a uxth r2, r3
800b36e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b372: b29b uxth r3, r3
800b374: 029b lsls r3, r3, #10
800b376: b29b uxth r3, r3
800b378: 4313 orrs r3, r2
800b37a: b29a uxth r2, r3
800b37c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b380: 801a strh r2, [r3, #0]
800b382: e02d b.n 800b3e0 <USB_EPStartXfer+0x12a0>
800b384: f507 7384 add.w r3, r7, #264 @ 0x108
800b388: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b38c: 681b ldr r3, [r3, #0]
800b38e: 785b ldrb r3, [r3, #1]
800b390: 2b01 cmp r3, #1
800b392: d125 bne.n 800b3e0 <USB_EPStartXfer+0x12a0>
800b394: f507 7384 add.w r3, r7, #264 @ 0x108
800b398: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b39c: 681b ldr r3, [r3, #0]
800b39e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b3a2: b29b uxth r3, r3
800b3a4: 461a mov r2, r3
800b3a6: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800b3aa: 4413 add r3, r2
800b3ac: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b3b0: f507 7384 add.w r3, r7, #264 @ 0x108
800b3b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3b8: 681b ldr r3, [r3, #0]
800b3ba: 781b ldrb r3, [r3, #0]
800b3bc: 011a lsls r2, r3, #4
800b3be: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800b3c2: 4413 add r3, r2
800b3c4: f203 430c addw r3, r3, #1036 @ 0x40c
800b3c8: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
800b3cc: f507 7384 add.w r3, r7, #264 @ 0x108
800b3d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3d4: 681b ldr r3, [r3, #0]
800b3d6: 691b ldr r3, [r3, #16]
800b3d8: b29a uxth r2, r3
800b3da: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800b3de: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
800b3e0: f507 7384 add.w r3, r7, #264 @ 0x108
800b3e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3e8: 681b ldr r3, [r3, #0]
800b3ea: 69db ldr r3, [r3, #28]
800b3ec: 2b00 cmp r3, #0
800b3ee: f000 8218 beq.w 800b822 <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800b3f2: f507 7384 add.w r3, r7, #264 @ 0x108
800b3f6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b3fa: 681a ldr r2, [r3, #0]
800b3fc: f507 7384 add.w r3, r7, #264 @ 0x108
800b400: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b404: 681b ldr r3, [r3, #0]
800b406: 781b ldrb r3, [r3, #0]
800b408: 009b lsls r3, r3, #2
800b40a: 4413 add r3, r2
800b40c: 881b ldrh r3, [r3, #0]
800b40e: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800b412: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b416: f403 4380 and.w r3, r3, #16384 @ 0x4000
800b41a: 2b00 cmp r3, #0
800b41c: d005 beq.n 800b42a <USB_EPStartXfer+0x12ea>
800b41e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b422: f003 0340 and.w r3, r3, #64 @ 0x40
800b426: 2b00 cmp r3, #0
800b428: d10d bne.n 800b446 <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800b42a: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b42e: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800b432: 2b00 cmp r3, #0
800b434: f040 81f5 bne.w 800b822 <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800b438: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b43c: f003 0340 and.w r3, r3, #64 @ 0x40
800b440: 2b00 cmp r3, #0
800b442: f040 81ee bne.w 800b822 <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
800b446: f507 7384 add.w r3, r7, #264 @ 0x108
800b44a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b44e: 681a ldr r2, [r3, #0]
800b450: f507 7384 add.w r3, r7, #264 @ 0x108
800b454: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b458: 681b ldr r3, [r3, #0]
800b45a: 781b ldrb r3, [r3, #0]
800b45c: 009b lsls r3, r3, #2
800b45e: 4413 add r3, r2
800b460: 881b ldrh r3, [r3, #0]
800b462: b29b uxth r3, r3
800b464: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b468: f023 0370 bic.w r3, r3, #112 @ 0x70
800b46c: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
800b470: f507 7384 add.w r3, r7, #264 @ 0x108
800b474: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b478: 681a ldr r2, [r3, #0]
800b47a: f507 7384 add.w r3, r7, #264 @ 0x108
800b47e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b482: 681b ldr r3, [r3, #0]
800b484: 781b ldrb r3, [r3, #0]
800b486: 009b lsls r3, r3, #2
800b488: 441a add r2, r3
800b48a: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
800b48e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b492: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b496: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b49a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800b49e: b29b uxth r3, r3
800b4a0: 8013 strh r3, [r2, #0]
800b4a2: e1be b.n 800b822 <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800b4a4: f507 7384 add.w r3, r7, #264 @ 0x108
800b4a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4ac: 681b ldr r3, [r3, #0]
800b4ae: 78db ldrb r3, [r3, #3]
800b4b0: 2b01 cmp r3, #1
800b4b2: f040 81b4 bne.w 800b81e <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800b4b6: f507 7384 add.w r3, r7, #264 @ 0x108
800b4ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4be: 681b ldr r3, [r3, #0]
800b4c0: 699a ldr r2, [r3, #24]
800b4c2: f507 7384 add.w r3, r7, #264 @ 0x108
800b4c6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4ca: 681b ldr r3, [r3, #0]
800b4cc: 691b ldr r3, [r3, #16]
800b4ce: 429a cmp r2, r3
800b4d0: d917 bls.n 800b502 <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800b4d2: f507 7384 add.w r3, r7, #264 @ 0x108
800b4d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4da: 681b ldr r3, [r3, #0]
800b4dc: 691b ldr r3, [r3, #16]
800b4de: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800b4e2: f507 7384 add.w r3, r7, #264 @ 0x108
800b4e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4ea: 681b ldr r3, [r3, #0]
800b4ec: 699a ldr r2, [r3, #24]
800b4ee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b4f2: 1ad2 subs r2, r2, r3
800b4f4: f507 7384 add.w r3, r7, #264 @ 0x108
800b4f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4fc: 681b ldr r3, [r3, #0]
800b4fe: 619a str r2, [r3, #24]
800b500: e00e b.n 800b520 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
800b502: f507 7384 add.w r3, r7, #264 @ 0x108
800b506: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b50a: 681b ldr r3, [r3, #0]
800b50c: 699b ldr r3, [r3, #24]
800b50e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800b512: f507 7384 add.w r3, r7, #264 @ 0x108
800b516: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b51a: 681b ldr r3, [r3, #0]
800b51c: 2200 movs r2, #0
800b51e: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
800b520: f507 7384 add.w r3, r7, #264 @ 0x108
800b524: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b528: 681b ldr r3, [r3, #0]
800b52a: 785b ldrb r3, [r3, #1]
800b52c: 2b00 cmp r3, #0
800b52e: f040 8085 bne.w 800b63c <USB_EPStartXfer+0x14fc>
800b532: f507 7384 add.w r3, r7, #264 @ 0x108
800b536: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b53a: 681b ldr r3, [r3, #0]
800b53c: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800b540: f507 7384 add.w r3, r7, #264 @ 0x108
800b544: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b548: 681b ldr r3, [r3, #0]
800b54a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b54e: b29b uxth r3, r3
800b550: 461a mov r2, r3
800b552: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800b556: 4413 add r3, r2
800b558: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800b55c: f507 7384 add.w r3, r7, #264 @ 0x108
800b560: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b564: 681b ldr r3, [r3, #0]
800b566: 781b ldrb r3, [r3, #0]
800b568: 011a lsls r2, r3, #4
800b56a: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800b56e: 4413 add r3, r2
800b570: f203 4304 addw r3, r3, #1028 @ 0x404
800b574: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800b578: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b57c: 881b ldrh r3, [r3, #0]
800b57e: b29b uxth r3, r3
800b580: f3c3 0309 ubfx r3, r3, #0, #10
800b584: b29a uxth r2, r3
800b586: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b58a: 801a strh r2, [r3, #0]
800b58c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b590: 2b3e cmp r3, #62 @ 0x3e
800b592: d923 bls.n 800b5dc <USB_EPStartXfer+0x149c>
800b594: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b598: 095b lsrs r3, r3, #5
800b59a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b59e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5a2: f003 031f and.w r3, r3, #31
800b5a6: 2b00 cmp r3, #0
800b5a8: d104 bne.n 800b5b4 <USB_EPStartXfer+0x1474>
800b5aa: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b5ae: 3b01 subs r3, #1
800b5b0: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b5b4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b5b8: 881b ldrh r3, [r3, #0]
800b5ba: b29a uxth r2, r3
800b5bc: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b5c0: b29b uxth r3, r3
800b5c2: 029b lsls r3, r3, #10
800b5c4: b29b uxth r3, r3
800b5c6: 4313 orrs r3, r2
800b5c8: b29b uxth r3, r3
800b5ca: ea6f 4343 mvn.w r3, r3, lsl #17
800b5ce: ea6f 4353 mvn.w r3, r3, lsr #17
800b5d2: b29a uxth r2, r3
800b5d4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b5d8: 801a strh r2, [r3, #0]
800b5da: e060 b.n 800b69e <USB_EPStartXfer+0x155e>
800b5dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5e0: 2b00 cmp r3, #0
800b5e2: d10c bne.n 800b5fe <USB_EPStartXfer+0x14be>
800b5e4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b5e8: 881b ldrh r3, [r3, #0]
800b5ea: b29b uxth r3, r3
800b5ec: ea6f 4343 mvn.w r3, r3, lsl #17
800b5f0: ea6f 4353 mvn.w r3, r3, lsr #17
800b5f4: b29a uxth r2, r3
800b5f6: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b5fa: 801a strh r2, [r3, #0]
800b5fc: e04f b.n 800b69e <USB_EPStartXfer+0x155e>
800b5fe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b602: 085b lsrs r3, r3, #1
800b604: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b608: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b60c: f003 0301 and.w r3, r3, #1
800b610: 2b00 cmp r3, #0
800b612: d004 beq.n 800b61e <USB_EPStartXfer+0x14de>
800b614: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b618: 3301 adds r3, #1
800b61a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b61e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b622: 881b ldrh r3, [r3, #0]
800b624: b29a uxth r2, r3
800b626: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b62a: b29b uxth r3, r3
800b62c: 029b lsls r3, r3, #10
800b62e: b29b uxth r3, r3
800b630: 4313 orrs r3, r2
800b632: b29a uxth r2, r3
800b634: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b638: 801a strh r2, [r3, #0]
800b63a: e030 b.n 800b69e <USB_EPStartXfer+0x155e>
800b63c: f507 7384 add.w r3, r7, #264 @ 0x108
800b640: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b644: 681b ldr r3, [r3, #0]
800b646: 785b ldrb r3, [r3, #1]
800b648: 2b01 cmp r3, #1
800b64a: d128 bne.n 800b69e <USB_EPStartXfer+0x155e>
800b64c: f507 7384 add.w r3, r7, #264 @ 0x108
800b650: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b654: 681b ldr r3, [r3, #0]
800b656: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800b65a: f507 7384 add.w r3, r7, #264 @ 0x108
800b65e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b662: 681b ldr r3, [r3, #0]
800b664: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b668: b29b uxth r3, r3
800b66a: 461a mov r2, r3
800b66c: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800b670: 4413 add r3, r2
800b672: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800b676: f507 7384 add.w r3, r7, #264 @ 0x108
800b67a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b67e: 681b ldr r3, [r3, #0]
800b680: 781b ldrb r3, [r3, #0]
800b682: 011a lsls r2, r3, #4
800b684: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800b688: 4413 add r3, r2
800b68a: f203 4304 addw r3, r3, #1028 @ 0x404
800b68e: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800b692: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b696: b29a uxth r2, r3
800b698: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
800b69c: 801a strh r2, [r3, #0]
800b69e: f507 7384 add.w r3, r7, #264 @ 0x108
800b6a2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6a6: 681b ldr r3, [r3, #0]
800b6a8: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800b6ac: f507 7384 add.w r3, r7, #264 @ 0x108
800b6b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6b4: 681b ldr r3, [r3, #0]
800b6b6: 785b ldrb r3, [r3, #1]
800b6b8: 2b00 cmp r3, #0
800b6ba: f040 8085 bne.w 800b7c8 <USB_EPStartXfer+0x1688>
800b6be: f507 7384 add.w r3, r7, #264 @ 0x108
800b6c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6c6: 681b ldr r3, [r3, #0]
800b6c8: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800b6cc: f507 7384 add.w r3, r7, #264 @ 0x108
800b6d0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6d4: 681b ldr r3, [r3, #0]
800b6d6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b6da: b29b uxth r3, r3
800b6dc: 461a mov r2, r3
800b6de: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800b6e2: 4413 add r3, r2
800b6e4: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800b6e8: f507 7384 add.w r3, r7, #264 @ 0x108
800b6ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6f0: 681b ldr r3, [r3, #0]
800b6f2: 781b ldrb r3, [r3, #0]
800b6f4: 011a lsls r2, r3, #4
800b6f6: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800b6fa: 4413 add r3, r2
800b6fc: f203 430c addw r3, r3, #1036 @ 0x40c
800b700: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800b704: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b708: 881b ldrh r3, [r3, #0]
800b70a: b29b uxth r3, r3
800b70c: f3c3 0309 ubfx r3, r3, #0, #10
800b710: b29a uxth r2, r3
800b712: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b716: 801a strh r2, [r3, #0]
800b718: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b71c: 2b3e cmp r3, #62 @ 0x3e
800b71e: d923 bls.n 800b768 <USB_EPStartXfer+0x1628>
800b720: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b724: 095b lsrs r3, r3, #5
800b726: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b72a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b72e: f003 031f and.w r3, r3, #31
800b732: 2b00 cmp r3, #0
800b734: d104 bne.n 800b740 <USB_EPStartXfer+0x1600>
800b736: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b73a: 3b01 subs r3, #1
800b73c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b740: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b744: 881b ldrh r3, [r3, #0]
800b746: b29a uxth r2, r3
800b748: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b74c: b29b uxth r3, r3
800b74e: 029b lsls r3, r3, #10
800b750: b29b uxth r3, r3
800b752: 4313 orrs r3, r2
800b754: b29b uxth r3, r3
800b756: ea6f 4343 mvn.w r3, r3, lsl #17
800b75a: ea6f 4353 mvn.w r3, r3, lsr #17
800b75e: b29a uxth r2, r3
800b760: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b764: 801a strh r2, [r3, #0]
800b766: e05c b.n 800b822 <USB_EPStartXfer+0x16e2>
800b768: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b76c: 2b00 cmp r3, #0
800b76e: d10c bne.n 800b78a <USB_EPStartXfer+0x164a>
800b770: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b774: 881b ldrh r3, [r3, #0]
800b776: b29b uxth r3, r3
800b778: ea6f 4343 mvn.w r3, r3, lsl #17
800b77c: ea6f 4353 mvn.w r3, r3, lsr #17
800b780: b29a uxth r2, r3
800b782: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b786: 801a strh r2, [r3, #0]
800b788: e04b b.n 800b822 <USB_EPStartXfer+0x16e2>
800b78a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b78e: 085b lsrs r3, r3, #1
800b790: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b794: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b798: f003 0301 and.w r3, r3, #1
800b79c: 2b00 cmp r3, #0
800b79e: d004 beq.n 800b7aa <USB_EPStartXfer+0x166a>
800b7a0: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b7a4: 3301 adds r3, #1
800b7a6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b7aa: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b7ae: 881b ldrh r3, [r3, #0]
800b7b0: b29a uxth r2, r3
800b7b2: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b7b6: b29b uxth r3, r3
800b7b8: 029b lsls r3, r3, #10
800b7ba: b29b uxth r3, r3
800b7bc: 4313 orrs r3, r2
800b7be: b29a uxth r2, r3
800b7c0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b7c4: 801a strh r2, [r3, #0]
800b7c6: e02c b.n 800b822 <USB_EPStartXfer+0x16e2>
800b7c8: f507 7384 add.w r3, r7, #264 @ 0x108
800b7cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7d0: 681b ldr r3, [r3, #0]
800b7d2: 785b ldrb r3, [r3, #1]
800b7d4: 2b01 cmp r3, #1
800b7d6: d124 bne.n 800b822 <USB_EPStartXfer+0x16e2>
800b7d8: f507 7384 add.w r3, r7, #264 @ 0x108
800b7dc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b7e0: 681b ldr r3, [r3, #0]
800b7e2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b7e6: b29b uxth r3, r3
800b7e8: 461a mov r2, r3
800b7ea: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800b7ee: 4413 add r3, r2
800b7f0: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800b7f4: f507 7384 add.w r3, r7, #264 @ 0x108
800b7f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7fc: 681b ldr r3, [r3, #0]
800b7fe: 781b ldrb r3, [r3, #0]
800b800: 011a lsls r2, r3, #4
800b802: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800b806: 4413 add r3, r2
800b808: f203 430c addw r3, r3, #1036 @ 0x40c
800b80c: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800b810: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b814: b29a uxth r2, r3
800b816: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800b81a: 801a strh r2, [r3, #0]
800b81c: e001 b.n 800b822 <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
800b81e: 2301 movs r3, #1
800b820: e03a b.n 800b898 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800b822: f507 7384 add.w r3, r7, #264 @ 0x108
800b826: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b82a: 681a ldr r2, [r3, #0]
800b82c: f507 7384 add.w r3, r7, #264 @ 0x108
800b830: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b834: 681b ldr r3, [r3, #0]
800b836: 781b ldrb r3, [r3, #0]
800b838: 009b lsls r3, r3, #2
800b83a: 4413 add r3, r2
800b83c: 881b ldrh r3, [r3, #0]
800b83e: b29b uxth r3, r3
800b840: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800b844: f023 0370 bic.w r3, r3, #112 @ 0x70
800b848: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b84c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b850: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800b854: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b858: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b85c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800b860: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b864: f507 7384 add.w r3, r7, #264 @ 0x108
800b868: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b86c: 681a ldr r2, [r3, #0]
800b86e: f507 7384 add.w r3, r7, #264 @ 0x108
800b872: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b876: 681b ldr r3, [r3, #0]
800b878: 781b ldrb r3, [r3, #0]
800b87a: 009b lsls r3, r3, #2
800b87c: 441a add r2, r3
800b87e: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b882: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b886: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b88a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b88e: f043 0380 orr.w r3, r3, #128 @ 0x80
800b892: b29b uxth r3, r3
800b894: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800b896: 2300 movs r3, #0
}
800b898: 4618 mov r0, r3
800b89a: f507 7784 add.w r7, r7, #264 @ 0x108
800b89e: 46bd mov sp, r7
800b8a0: bd80 pop {r7, pc}
0800b8a2 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800b8a2: b480 push {r7}
800b8a4: b085 sub sp, #20
800b8a6: af00 add r7, sp, #0
800b8a8: 6078 str r0, [r7, #4]
800b8aa: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800b8ac: 683b ldr r3, [r7, #0]
800b8ae: 785b ldrb r3, [r3, #1]
800b8b0: 2b00 cmp r3, #0
800b8b2: d020 beq.n 800b8f6 <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800b8b4: 687a ldr r2, [r7, #4]
800b8b6: 683b ldr r3, [r7, #0]
800b8b8: 781b ldrb r3, [r3, #0]
800b8ba: 009b lsls r3, r3, #2
800b8bc: 4413 add r3, r2
800b8be: 881b ldrh r3, [r3, #0]
800b8c0: b29b uxth r3, r3
800b8c2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b8c6: f023 0340 bic.w r3, r3, #64 @ 0x40
800b8ca: 81bb strh r3, [r7, #12]
800b8cc: 89bb ldrh r3, [r7, #12]
800b8ce: f083 0310 eor.w r3, r3, #16
800b8d2: 81bb strh r3, [r7, #12]
800b8d4: 687a ldr r2, [r7, #4]
800b8d6: 683b ldr r3, [r7, #0]
800b8d8: 781b ldrb r3, [r3, #0]
800b8da: 009b lsls r3, r3, #2
800b8dc: 441a add r2, r3
800b8de: 89bb ldrh r3, [r7, #12]
800b8e0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b8e4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b8e8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b8ec: f043 0380 orr.w r3, r3, #128 @ 0x80
800b8f0: b29b uxth r3, r3
800b8f2: 8013 strh r3, [r2, #0]
800b8f4: e01f b.n 800b936 <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800b8f6: 687a ldr r2, [r7, #4]
800b8f8: 683b ldr r3, [r7, #0]
800b8fa: 781b ldrb r3, [r3, #0]
800b8fc: 009b lsls r3, r3, #2
800b8fe: 4413 add r3, r2
800b900: 881b ldrh r3, [r3, #0]
800b902: b29b uxth r3, r3
800b904: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800b908: f023 0370 bic.w r3, r3, #112 @ 0x70
800b90c: 81fb strh r3, [r7, #14]
800b90e: 89fb ldrh r3, [r7, #14]
800b910: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800b914: 81fb strh r3, [r7, #14]
800b916: 687a ldr r2, [r7, #4]
800b918: 683b ldr r3, [r7, #0]
800b91a: 781b ldrb r3, [r3, #0]
800b91c: 009b lsls r3, r3, #2
800b91e: 441a add r2, r3
800b920: 89fb ldrh r3, [r7, #14]
800b922: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b926: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b92a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b92e: f043 0380 orr.w r3, r3, #128 @ 0x80
800b932: b29b uxth r3, r3
800b934: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800b936: 2300 movs r3, #0
}
800b938: 4618 mov r0, r3
800b93a: 3714 adds r7, #20
800b93c: 46bd mov sp, r7
800b93e: bc80 pop {r7}
800b940: 4770 bx lr
0800b942 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800b942: b480 push {r7}
800b944: b087 sub sp, #28
800b946: af00 add r7, sp, #0
800b948: 6078 str r0, [r7, #4]
800b94a: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800b94c: 683b ldr r3, [r7, #0]
800b94e: 7b1b ldrb r3, [r3, #12]
800b950: 2b00 cmp r3, #0
800b952: f040 809d bne.w 800ba90 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800b956: 683b ldr r3, [r7, #0]
800b958: 785b ldrb r3, [r3, #1]
800b95a: 2b00 cmp r3, #0
800b95c: d04c beq.n 800b9f8 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800b95e: 687a ldr r2, [r7, #4]
800b960: 683b ldr r3, [r7, #0]
800b962: 781b ldrb r3, [r3, #0]
800b964: 009b lsls r3, r3, #2
800b966: 4413 add r3, r2
800b968: 881b ldrh r3, [r3, #0]
800b96a: 823b strh r3, [r7, #16]
800b96c: 8a3b ldrh r3, [r7, #16]
800b96e: f003 0340 and.w r3, r3, #64 @ 0x40
800b972: 2b00 cmp r3, #0
800b974: d01b beq.n 800b9ae <USB_EPClearStall+0x6c>
800b976: 687a ldr r2, [r7, #4]
800b978: 683b ldr r3, [r7, #0]
800b97a: 781b ldrb r3, [r3, #0]
800b97c: 009b lsls r3, r3, #2
800b97e: 4413 add r3, r2
800b980: 881b ldrh r3, [r3, #0]
800b982: b29b uxth r3, r3
800b984: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b988: f023 0370 bic.w r3, r3, #112 @ 0x70
800b98c: 81fb strh r3, [r7, #14]
800b98e: 687a ldr r2, [r7, #4]
800b990: 683b ldr r3, [r7, #0]
800b992: 781b ldrb r3, [r3, #0]
800b994: 009b lsls r3, r3, #2
800b996: 441a add r2, r3
800b998: 89fb ldrh r3, [r7, #14]
800b99a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b99e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b9a2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b9a6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800b9aa: b29b uxth r3, r3
800b9ac: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800b9ae: 683b ldr r3, [r7, #0]
800b9b0: 78db ldrb r3, [r3, #3]
800b9b2: 2b01 cmp r3, #1
800b9b4: d06c beq.n 800ba90 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800b9b6: 687a ldr r2, [r7, #4]
800b9b8: 683b ldr r3, [r7, #0]
800b9ba: 781b ldrb r3, [r3, #0]
800b9bc: 009b lsls r3, r3, #2
800b9be: 4413 add r3, r2
800b9c0: 881b ldrh r3, [r3, #0]
800b9c2: b29b uxth r3, r3
800b9c4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b9c8: f023 0340 bic.w r3, r3, #64 @ 0x40
800b9cc: 81bb strh r3, [r7, #12]
800b9ce: 89bb ldrh r3, [r7, #12]
800b9d0: f083 0320 eor.w r3, r3, #32
800b9d4: 81bb strh r3, [r7, #12]
800b9d6: 687a ldr r2, [r7, #4]
800b9d8: 683b ldr r3, [r7, #0]
800b9da: 781b ldrb r3, [r3, #0]
800b9dc: 009b lsls r3, r3, #2
800b9de: 441a add r2, r3
800b9e0: 89bb ldrh r3, [r7, #12]
800b9e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b9e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b9ea: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b9ee: f043 0380 orr.w r3, r3, #128 @ 0x80
800b9f2: b29b uxth r3, r3
800b9f4: 8013 strh r3, [r2, #0]
800b9f6: e04b b.n 800ba90 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800b9f8: 687a ldr r2, [r7, #4]
800b9fa: 683b ldr r3, [r7, #0]
800b9fc: 781b ldrb r3, [r3, #0]
800b9fe: 009b lsls r3, r3, #2
800ba00: 4413 add r3, r2
800ba02: 881b ldrh r3, [r3, #0]
800ba04: 82fb strh r3, [r7, #22]
800ba06: 8afb ldrh r3, [r7, #22]
800ba08: f403 4380 and.w r3, r3, #16384 @ 0x4000
800ba0c: 2b00 cmp r3, #0
800ba0e: d01b beq.n 800ba48 <USB_EPClearStall+0x106>
800ba10: 687a ldr r2, [r7, #4]
800ba12: 683b ldr r3, [r7, #0]
800ba14: 781b ldrb r3, [r3, #0]
800ba16: 009b lsls r3, r3, #2
800ba18: 4413 add r3, r2
800ba1a: 881b ldrh r3, [r3, #0]
800ba1c: b29b uxth r3, r3
800ba1e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800ba22: f023 0370 bic.w r3, r3, #112 @ 0x70
800ba26: 82bb strh r3, [r7, #20]
800ba28: 687a ldr r2, [r7, #4]
800ba2a: 683b ldr r3, [r7, #0]
800ba2c: 781b ldrb r3, [r3, #0]
800ba2e: 009b lsls r3, r3, #2
800ba30: 441a add r2, r3
800ba32: 8abb ldrh r3, [r7, #20]
800ba34: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800ba38: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800ba3c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800ba40: f043 0380 orr.w r3, r3, #128 @ 0x80
800ba44: b29b uxth r3, r3
800ba46: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800ba48: 687a ldr r2, [r7, #4]
800ba4a: 683b ldr r3, [r7, #0]
800ba4c: 781b ldrb r3, [r3, #0]
800ba4e: 009b lsls r3, r3, #2
800ba50: 4413 add r3, r2
800ba52: 881b ldrh r3, [r3, #0]
800ba54: b29b uxth r3, r3
800ba56: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800ba5a: f023 0370 bic.w r3, r3, #112 @ 0x70
800ba5e: 827b strh r3, [r7, #18]
800ba60: 8a7b ldrh r3, [r7, #18]
800ba62: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800ba66: 827b strh r3, [r7, #18]
800ba68: 8a7b ldrh r3, [r7, #18]
800ba6a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800ba6e: 827b strh r3, [r7, #18]
800ba70: 687a ldr r2, [r7, #4]
800ba72: 683b ldr r3, [r7, #0]
800ba74: 781b ldrb r3, [r3, #0]
800ba76: 009b lsls r3, r3, #2
800ba78: 441a add r2, r3
800ba7a: 8a7b ldrh r3, [r7, #18]
800ba7c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800ba80: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800ba84: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800ba88: f043 0380 orr.w r3, r3, #128 @ 0x80
800ba8c: b29b uxth r3, r3
800ba8e: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800ba90: 2300 movs r3, #0
}
800ba92: 4618 mov r0, r3
800ba94: 371c adds r7, #28
800ba96: 46bd mov sp, r7
800ba98: bc80 pop {r7}
800ba9a: 4770 bx lr
0800ba9c <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800ba9c: b480 push {r7}
800ba9e: b083 sub sp, #12
800baa0: af00 add r7, sp, #0
800baa2: 6078 str r0, [r7, #4]
800baa4: 460b mov r3, r1
800baa6: 70fb strb r3, [r7, #3]
if (address == 0U)
800baa8: 78fb ldrb r3, [r7, #3]
800baaa: 2b00 cmp r3, #0
800baac: d103 bne.n 800bab6 <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800baae: 687b ldr r3, [r7, #4]
800bab0: 2280 movs r2, #128 @ 0x80
800bab2: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800bab6: 2300 movs r3, #0
}
800bab8: 4618 mov r0, r3
800baba: 370c adds r7, #12
800babc: 46bd mov sp, r7
800babe: bc80 pop {r7}
800bac0: 4770 bx lr
0800bac2 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800bac2: b480 push {r7}
800bac4: b083 sub sp, #12
800bac6: af00 add r7, sp, #0
800bac8: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800baca: 2300 movs r3, #0
}
800bacc: 4618 mov r0, r3
800bace: 370c adds r7, #12
800bad0: 46bd mov sp, r7
800bad2: bc80 pop {r7}
800bad4: 4770 bx lr
0800bad6 <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800bad6: b480 push {r7}
800bad8: b083 sub sp, #12
800bada: af00 add r7, sp, #0
800badc: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800bade: 2300 movs r3, #0
}
800bae0: 4618 mov r0, r3
800bae2: 370c adds r7, #12
800bae4: 46bd mov sp, r7
800bae6: bc80 pop {r7}
800bae8: 4770 bx lr
0800baea <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800baea: b480 push {r7}
800baec: b085 sub sp, #20
800baee: af00 add r7, sp, #0
800baf0: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800baf2: 687b ldr r3, [r7, #4]
800baf4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800baf8: b29b uxth r3, r3
800bafa: 60fb str r3, [r7, #12]
return tmpreg;
800bafc: 68fb ldr r3, [r7, #12]
}
800bafe: 4618 mov r0, r3
800bb00: 3714 adds r7, #20
800bb02: 46bd mov sp, r7
800bb04: bc80 pop {r7}
800bb06: 4770 bx lr
0800bb08 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800bb08: b480 push {r7}
800bb0a: b083 sub sp, #12
800bb0c: af00 add r7, sp, #0
800bb0e: 6078 str r0, [r7, #4]
800bb10: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800bb12: 2300 movs r3, #0
}
800bb14: 4618 mov r0, r3
800bb16: 370c adds r7, #12
800bb18: 46bd mov sp, r7
800bb1a: bc80 pop {r7}
800bb1c: 4770 bx lr
0800bb1e <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800bb1e: b480 push {r7}
800bb20: b08b sub sp, #44 @ 0x2c
800bb22: af00 add r7, sp, #0
800bb24: 60f8 str r0, [r7, #12]
800bb26: 60b9 str r1, [r7, #8]
800bb28: 4611 mov r1, r2
800bb2a: 461a mov r2, r3
800bb2c: 460b mov r3, r1
800bb2e: 80fb strh r3, [r7, #6]
800bb30: 4613 mov r3, r2
800bb32: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800bb34: 88bb ldrh r3, [r7, #4]
800bb36: 3301 adds r3, #1
800bb38: 085b lsrs r3, r3, #1
800bb3a: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800bb3c: 68fb ldr r3, [r7, #12]
800bb3e: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800bb40: 68bb ldr r3, [r7, #8]
800bb42: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800bb44: 88fb ldrh r3, [r7, #6]
800bb46: 005a lsls r2, r3, #1
800bb48: 697b ldr r3, [r7, #20]
800bb4a: 4413 add r3, r2
800bb4c: f503 6380 add.w r3, r3, #1024 @ 0x400
800bb50: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800bb52: 69bb ldr r3, [r7, #24]
800bb54: 627b str r3, [r7, #36] @ 0x24
800bb56: e01f b.n 800bb98 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
800bb58: 69fb ldr r3, [r7, #28]
800bb5a: 781b ldrb r3, [r3, #0]
800bb5c: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800bb5e: 69fb ldr r3, [r7, #28]
800bb60: 3301 adds r3, #1
800bb62: 781b ldrb r3, [r3, #0]
800bb64: b21b sxth r3, r3
800bb66: 021b lsls r3, r3, #8
800bb68: b21a sxth r2, r3
800bb6a: f9b7 3012 ldrsh.w r3, [r7, #18]
800bb6e: 4313 orrs r3, r2
800bb70: b21b sxth r3, r3
800bb72: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
800bb74: 6a3b ldr r3, [r7, #32]
800bb76: 8a7a ldrh r2, [r7, #18]
800bb78: 801a strh r2, [r3, #0]
pdwVal++;
800bb7a: 6a3b ldr r3, [r7, #32]
800bb7c: 3302 adds r3, #2
800bb7e: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
800bb80: 6a3b ldr r3, [r7, #32]
800bb82: 3302 adds r3, #2
800bb84: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800bb86: 69fb ldr r3, [r7, #28]
800bb88: 3301 adds r3, #1
800bb8a: 61fb str r3, [r7, #28]
pBuf++;
800bb8c: 69fb ldr r3, [r7, #28]
800bb8e: 3301 adds r3, #1
800bb90: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
800bb92: 6a7b ldr r3, [r7, #36] @ 0x24
800bb94: 3b01 subs r3, #1
800bb96: 627b str r3, [r7, #36] @ 0x24
800bb98: 6a7b ldr r3, [r7, #36] @ 0x24
800bb9a: 2b00 cmp r3, #0
800bb9c: d1dc bne.n 800bb58 <USB_WritePMA+0x3a>
}
}
800bb9e: bf00 nop
800bba0: bf00 nop
800bba2: 372c adds r7, #44 @ 0x2c
800bba4: 46bd mov sp, r7
800bba6: bc80 pop {r7}
800bba8: 4770 bx lr
0800bbaa <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800bbaa: b480 push {r7}
800bbac: b08b sub sp, #44 @ 0x2c
800bbae: af00 add r7, sp, #0
800bbb0: 60f8 str r0, [r7, #12]
800bbb2: 60b9 str r1, [r7, #8]
800bbb4: 4611 mov r1, r2
800bbb6: 461a mov r2, r3
800bbb8: 460b mov r3, r1
800bbba: 80fb strh r3, [r7, #6]
800bbbc: 4613 mov r3, r2
800bbbe: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
800bbc0: 88bb ldrh r3, [r7, #4]
800bbc2: 085b lsrs r3, r3, #1
800bbc4: b29b uxth r3, r3
800bbc6: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800bbc8: 68fb ldr r3, [r7, #12]
800bbca: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800bbcc: 68bb ldr r3, [r7, #8]
800bbce: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800bbd0: 88fb ldrh r3, [r7, #6]
800bbd2: 005a lsls r2, r3, #1
800bbd4: 697b ldr r3, [r7, #20]
800bbd6: 4413 add r3, r2
800bbd8: f503 6380 add.w r3, r3, #1024 @ 0x400
800bbdc: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800bbde: 69bb ldr r3, [r7, #24]
800bbe0: 627b str r3, [r7, #36] @ 0x24
800bbe2: e01b b.n 800bc1c <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800bbe4: 6a3b ldr r3, [r7, #32]
800bbe6: 881b ldrh r3, [r3, #0]
800bbe8: b29b uxth r3, r3
800bbea: 613b str r3, [r7, #16]
pdwVal++;
800bbec: 6a3b ldr r3, [r7, #32]
800bbee: 3302 adds r3, #2
800bbf0: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800bbf2: 693b ldr r3, [r7, #16]
800bbf4: b2da uxtb r2, r3
800bbf6: 69fb ldr r3, [r7, #28]
800bbf8: 701a strb r2, [r3, #0]
pBuf++;
800bbfa: 69fb ldr r3, [r7, #28]
800bbfc: 3301 adds r3, #1
800bbfe: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
800bc00: 693b ldr r3, [r7, #16]
800bc02: 0a1b lsrs r3, r3, #8
800bc04: b2da uxtb r2, r3
800bc06: 69fb ldr r3, [r7, #28]
800bc08: 701a strb r2, [r3, #0]
pBuf++;
800bc0a: 69fb ldr r3, [r7, #28]
800bc0c: 3301 adds r3, #1
800bc0e: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
800bc10: 6a3b ldr r3, [r7, #32]
800bc12: 3302 adds r3, #2
800bc14: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800bc16: 6a7b ldr r3, [r7, #36] @ 0x24
800bc18: 3b01 subs r3, #1
800bc1a: 627b str r3, [r7, #36] @ 0x24
800bc1c: 6a7b ldr r3, [r7, #36] @ 0x24
800bc1e: 2b00 cmp r3, #0
800bc20: d1e0 bne.n 800bbe4 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800bc22: 88bb ldrh r3, [r7, #4]
800bc24: f003 0301 and.w r3, r3, #1
800bc28: b29b uxth r3, r3
800bc2a: 2b00 cmp r3, #0
800bc2c: d007 beq.n 800bc3e <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
800bc2e: 6a3b ldr r3, [r7, #32]
800bc30: 881b ldrh r3, [r3, #0]
800bc32: b29b uxth r3, r3
800bc34: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800bc36: 693b ldr r3, [r7, #16]
800bc38: b2da uxtb r2, r3
800bc3a: 69fb ldr r3, [r7, #28]
800bc3c: 701a strb r2, [r3, #0]
}
}
800bc3e: bf00 nop
800bc40: 372c adds r7, #44 @ 0x2c
800bc42: 46bd mov sp, r7
800bc44: bc80 pop {r7}
800bc46: 4770 bx lr
0800bc48 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800bc48: b580 push {r7, lr}
800bc4a: b084 sub sp, #16
800bc4c: af00 add r7, sp, #0
800bc4e: 6078 str r0, [r7, #4]
800bc50: 460b mov r3, r1
800bc52: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800bc54: 2300 movs r3, #0
800bc56: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
800bc58: 687b ldr r3, [r7, #4]
800bc5a: 7c1b ldrb r3, [r3, #16]
800bc5c: 2b00 cmp r3, #0
800bc5e: d115 bne.n 800bc8c <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800bc60: f44f 7300 mov.w r3, #512 @ 0x200
800bc64: 2202 movs r2, #2
800bc66: 2181 movs r1, #129 @ 0x81
800bc68: 6878 ldr r0, [r7, #4]
800bc6a: f001 ff00 bl 800da6e <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800bc6e: 687b ldr r3, [r7, #4]
800bc70: 2201 movs r2, #1
800bc72: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800bc74: f44f 7300 mov.w r3, #512 @ 0x200
800bc78: 2202 movs r2, #2
800bc7a: 2101 movs r1, #1
800bc7c: 6878 ldr r0, [r7, #4]
800bc7e: f001 fef6 bl 800da6e <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800bc82: 687b ldr r3, [r7, #4]
800bc84: 2201 movs r2, #1
800bc86: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800bc8a: e012 b.n 800bcb2 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800bc8c: 2340 movs r3, #64 @ 0x40
800bc8e: 2202 movs r2, #2
800bc90: 2181 movs r1, #129 @ 0x81
800bc92: 6878 ldr r0, [r7, #4]
800bc94: f001 feeb bl 800da6e <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800bc98: 687b ldr r3, [r7, #4]
800bc9a: 2201 movs r2, #1
800bc9c: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800bc9e: 2340 movs r3, #64 @ 0x40
800bca0: 2202 movs r2, #2
800bca2: 2101 movs r1, #1
800bca4: 6878 ldr r0, [r7, #4]
800bca6: f001 fee2 bl 800da6e <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800bcaa: 687b ldr r3, [r7, #4]
800bcac: 2201 movs r2, #1
800bcae: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800bcb2: 2308 movs r3, #8
800bcb4: 2203 movs r2, #3
800bcb6: 2182 movs r1, #130 @ 0x82
800bcb8: 6878 ldr r0, [r7, #4]
800bcba: f001 fed8 bl 800da6e <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800bcbe: 687b ldr r3, [r7, #4]
800bcc0: 2201 movs r2, #1
800bcc2: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800bcc4: f44f 7007 mov.w r0, #540 @ 0x21c
800bcc8: f001 fff8 bl 800dcbc <USBD_static_malloc>
800bccc: 4602 mov r2, r0
800bcce: 687b ldr r3, [r7, #4]
800bcd0: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800bcd4: 687b ldr r3, [r7, #4]
800bcd6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bcda: 2b00 cmp r3, #0
800bcdc: d102 bne.n 800bce4 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800bcde: 2301 movs r3, #1
800bce0: 73fb strb r3, [r7, #15]
800bce2: e026 b.n 800bd32 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bce4: 687b ldr r3, [r7, #4]
800bce6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bcea: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
800bcec: 687b ldr r3, [r7, #4]
800bcee: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bcf2: 681b ldr r3, [r3, #0]
800bcf4: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800bcf6: 68bb ldr r3, [r7, #8]
800bcf8: 2200 movs r2, #0
800bcfa: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800bcfe: 68bb ldr r3, [r7, #8]
800bd00: 2200 movs r2, #0
800bd02: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800bd06: 687b ldr r3, [r7, #4]
800bd08: 7c1b ldrb r3, [r3, #16]
800bd0a: 2b00 cmp r3, #0
800bd0c: d109 bne.n 800bd22 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800bd0e: 68bb ldr r3, [r7, #8]
800bd10: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800bd14: f44f 7300 mov.w r3, #512 @ 0x200
800bd18: 2101 movs r1, #1
800bd1a: 6878 ldr r0, [r7, #4]
800bd1c: f001 ff97 bl 800dc4e <USBD_LL_PrepareReceive>
800bd20: e007 b.n 800bd32 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800bd22: 68bb ldr r3, [r7, #8]
800bd24: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800bd28: 2340 movs r3, #64 @ 0x40
800bd2a: 2101 movs r1, #1
800bd2c: 6878 ldr r0, [r7, #4]
800bd2e: f001 ff8e bl 800dc4e <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800bd32: 7bfb ldrb r3, [r7, #15]
}
800bd34: 4618 mov r0, r3
800bd36: 3710 adds r7, #16
800bd38: 46bd mov sp, r7
800bd3a: bd80 pop {r7, pc}
0800bd3c <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800bd3c: b580 push {r7, lr}
800bd3e: b084 sub sp, #16
800bd40: af00 add r7, sp, #0
800bd42: 6078 str r0, [r7, #4]
800bd44: 460b mov r3, r1
800bd46: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800bd48: 2300 movs r3, #0
800bd4a: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800bd4c: 2181 movs r1, #129 @ 0x81
800bd4e: 6878 ldr r0, [r7, #4]
800bd50: f001 feb3 bl 800daba <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800bd54: 687b ldr r3, [r7, #4]
800bd56: 2200 movs r2, #0
800bd58: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800bd5a: 2101 movs r1, #1
800bd5c: 6878 ldr r0, [r7, #4]
800bd5e: f001 feac bl 800daba <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
800bd62: 687b ldr r3, [r7, #4]
800bd64: 2200 movs r2, #0
800bd66: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800bd6a: 2182 movs r1, #130 @ 0x82
800bd6c: 6878 ldr r0, [r7, #4]
800bd6e: f001 fea4 bl 800daba <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
800bd72: 687b ldr r3, [r7, #4]
800bd74: 2200 movs r2, #0
800bd76: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
800bd78: 687b ldr r3, [r7, #4]
800bd7a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bd7e: 2b00 cmp r3, #0
800bd80: d00e beq.n 800bda0 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
800bd82: 687b ldr r3, [r7, #4]
800bd84: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bd88: 685b ldr r3, [r3, #4]
800bd8a: 4798 blx r3
USBD_free(pdev->pClassData);
800bd8c: 687b ldr r3, [r7, #4]
800bd8e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bd92: 4618 mov r0, r3
800bd94: f001 ff9e bl 800dcd4 <USBD_static_free>
pdev->pClassData = NULL;
800bd98: 687b ldr r3, [r7, #4]
800bd9a: 2200 movs r2, #0
800bd9c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800bda0: 7bfb ldrb r3, [r7, #15]
}
800bda2: 4618 mov r0, r3
800bda4: 3710 adds r7, #16
800bda6: 46bd mov sp, r7
800bda8: bd80 pop {r7, pc}
0800bdaa <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800bdaa: b580 push {r7, lr}
800bdac: b086 sub sp, #24
800bdae: af00 add r7, sp, #0
800bdb0: 6078 str r0, [r7, #4]
800bdb2: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bdb4: 687b ldr r3, [r7, #4]
800bdb6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bdba: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800bdbc: 2300 movs r3, #0
800bdbe: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800bdc0: 2300 movs r3, #0
800bdc2: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800bdc4: 2300 movs r3, #0
800bdc6: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800bdc8: 683b ldr r3, [r7, #0]
800bdca: 781b ldrb r3, [r3, #0]
800bdcc: f003 0360 and.w r3, r3, #96 @ 0x60
800bdd0: 2b00 cmp r3, #0
800bdd2: d039 beq.n 800be48 <USBD_CDC_Setup+0x9e>
800bdd4: 2b20 cmp r3, #32
800bdd6: d17f bne.n 800bed8 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800bdd8: 683b ldr r3, [r7, #0]
800bdda: 88db ldrh r3, [r3, #6]
800bddc: 2b00 cmp r3, #0
800bdde: d029 beq.n 800be34 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800bde0: 683b ldr r3, [r7, #0]
800bde2: 781b ldrb r3, [r3, #0]
800bde4: b25b sxtb r3, r3
800bde6: 2b00 cmp r3, #0
800bde8: da11 bge.n 800be0e <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800bdea: 687b ldr r3, [r7, #4]
800bdec: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bdf0: 689b ldr r3, [r3, #8]
800bdf2: 683a ldr r2, [r7, #0]
800bdf4: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800bdf6: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800bdf8: 683a ldr r2, [r7, #0]
800bdfa: 88d2 ldrh r2, [r2, #6]
800bdfc: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800bdfe: 6939 ldr r1, [r7, #16]
800be00: 683b ldr r3, [r7, #0]
800be02: 88db ldrh r3, [r3, #6]
800be04: 461a mov r2, r3
800be06: 6878 ldr r0, [r7, #4]
800be08: f001 fa06 bl 800d218 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
800be0c: e06b b.n 800bee6 <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800be0e: 683b ldr r3, [r7, #0]
800be10: 785a ldrb r2, [r3, #1]
800be12: 693b ldr r3, [r7, #16]
800be14: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800be18: 683b ldr r3, [r7, #0]
800be1a: 88db ldrh r3, [r3, #6]
800be1c: b2da uxtb r2, r3
800be1e: 693b ldr r3, [r7, #16]
800be20: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800be24: 6939 ldr r1, [r7, #16]
800be26: 683b ldr r3, [r7, #0]
800be28: 88db ldrh r3, [r3, #6]
800be2a: 461a mov r2, r3
800be2c: 6878 ldr r0, [r7, #4]
800be2e: f001 fa21 bl 800d274 <USBD_CtlPrepareRx>
break;
800be32: e058 b.n 800bee6 <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800be34: 687b ldr r3, [r7, #4]
800be36: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800be3a: 689b ldr r3, [r3, #8]
800be3c: 683a ldr r2, [r7, #0]
800be3e: 7850 ldrb r0, [r2, #1]
800be40: 2200 movs r2, #0
800be42: 6839 ldr r1, [r7, #0]
800be44: 4798 blx r3
break;
800be46: e04e b.n 800bee6 <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800be48: 683b ldr r3, [r7, #0]
800be4a: 785b ldrb r3, [r3, #1]
800be4c: 2b0b cmp r3, #11
800be4e: d02e beq.n 800beae <USBD_CDC_Setup+0x104>
800be50: 2b0b cmp r3, #11
800be52: dc38 bgt.n 800bec6 <USBD_CDC_Setup+0x11c>
800be54: 2b00 cmp r3, #0
800be56: d002 beq.n 800be5e <USBD_CDC_Setup+0xb4>
800be58: 2b0a cmp r3, #10
800be5a: d014 beq.n 800be86 <USBD_CDC_Setup+0xdc>
800be5c: e033 b.n 800bec6 <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800be5e: 687b ldr r3, [r7, #4]
800be60: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800be64: 2b03 cmp r3, #3
800be66: d107 bne.n 800be78 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
800be68: f107 030c add.w r3, r7, #12
800be6c: 2202 movs r2, #2
800be6e: 4619 mov r1, r3
800be70: 6878 ldr r0, [r7, #4]
800be72: f001 f9d1 bl 800d218 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800be76: e02e b.n 800bed6 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800be78: 6839 ldr r1, [r7, #0]
800be7a: 6878 ldr r0, [r7, #4]
800be7c: f001 f962 bl 800d144 <USBD_CtlError>
ret = USBD_FAIL;
800be80: 2302 movs r3, #2
800be82: 75fb strb r3, [r7, #23]
break;
800be84: e027 b.n 800bed6 <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800be86: 687b ldr r3, [r7, #4]
800be88: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800be8c: 2b03 cmp r3, #3
800be8e: d107 bne.n 800bea0 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800be90: f107 030f add.w r3, r7, #15
800be94: 2201 movs r2, #1
800be96: 4619 mov r1, r3
800be98: 6878 ldr r0, [r7, #4]
800be9a: f001 f9bd bl 800d218 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800be9e: e01a b.n 800bed6 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800bea0: 6839 ldr r1, [r7, #0]
800bea2: 6878 ldr r0, [r7, #4]
800bea4: f001 f94e bl 800d144 <USBD_CtlError>
ret = USBD_FAIL;
800bea8: 2302 movs r3, #2
800beaa: 75fb strb r3, [r7, #23]
break;
800beac: e013 b.n 800bed6 <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800beae: 687b ldr r3, [r7, #4]
800beb0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800beb4: 2b03 cmp r3, #3
800beb6: d00d beq.n 800bed4 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800beb8: 6839 ldr r1, [r7, #0]
800beba: 6878 ldr r0, [r7, #4]
800bebc: f001 f942 bl 800d144 <USBD_CtlError>
ret = USBD_FAIL;
800bec0: 2302 movs r3, #2
800bec2: 75fb strb r3, [r7, #23]
}
break;
800bec4: e006 b.n 800bed4 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800bec6: 6839 ldr r1, [r7, #0]
800bec8: 6878 ldr r0, [r7, #4]
800beca: f001 f93b bl 800d144 <USBD_CtlError>
ret = USBD_FAIL;
800bece: 2302 movs r3, #2
800bed0: 75fb strb r3, [r7, #23]
break;
800bed2: e000 b.n 800bed6 <USBD_CDC_Setup+0x12c>
break;
800bed4: bf00 nop
}
break;
800bed6: e006 b.n 800bee6 <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800bed8: 6839 ldr r1, [r7, #0]
800beda: 6878 ldr r0, [r7, #4]
800bedc: f001 f932 bl 800d144 <USBD_CtlError>
ret = USBD_FAIL;
800bee0: 2302 movs r3, #2
800bee2: 75fb strb r3, [r7, #23]
break;
800bee4: bf00 nop
}
return ret;
800bee6: 7dfb ldrb r3, [r7, #23]
}
800bee8: 4618 mov r0, r3
800beea: 3718 adds r7, #24
800beec: 46bd mov sp, r7
800beee: bd80 pop {r7, pc}
0800bef0 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800bef0: b580 push {r7, lr}
800bef2: b084 sub sp, #16
800bef4: af00 add r7, sp, #0
800bef6: 6078 str r0, [r7, #4]
800bef8: 460b mov r3, r1
800befa: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
800befc: 687b ldr r3, [r7, #4]
800befe: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bf02: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800bf04: 687b ldr r3, [r7, #4]
800bf06: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800bf0a: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
800bf0c: 687b ldr r3, [r7, #4]
800bf0e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bf12: 2b00 cmp r3, #0
800bf14: d03a beq.n 800bf8c <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800bf16: 78fa ldrb r2, [r7, #3]
800bf18: 6879 ldr r1, [r7, #4]
800bf1a: 4613 mov r3, r2
800bf1c: 009b lsls r3, r3, #2
800bf1e: 4413 add r3, r2
800bf20: 009b lsls r3, r3, #2
800bf22: 440b add r3, r1
800bf24: 331c adds r3, #28
800bf26: 681b ldr r3, [r3, #0]
800bf28: 2b00 cmp r3, #0
800bf2a: d029 beq.n 800bf80 <USBD_CDC_DataIn+0x90>
800bf2c: 78fa ldrb r2, [r7, #3]
800bf2e: 6879 ldr r1, [r7, #4]
800bf30: 4613 mov r3, r2
800bf32: 009b lsls r3, r3, #2
800bf34: 4413 add r3, r2
800bf36: 009b lsls r3, r3, #2
800bf38: 440b add r3, r1
800bf3a: 331c adds r3, #28
800bf3c: 681a ldr r2, [r3, #0]
800bf3e: 78f9 ldrb r1, [r7, #3]
800bf40: 68b8 ldr r0, [r7, #8]
800bf42: 460b mov r3, r1
800bf44: 009b lsls r3, r3, #2
800bf46: 440b add r3, r1
800bf48: 00db lsls r3, r3, #3
800bf4a: 4403 add r3, r0
800bf4c: 3320 adds r3, #32
800bf4e: 681b ldr r3, [r3, #0]
800bf50: fbb2 f1f3 udiv r1, r2, r3
800bf54: fb01 f303 mul.w r3, r1, r3
800bf58: 1ad3 subs r3, r2, r3
800bf5a: 2b00 cmp r3, #0
800bf5c: d110 bne.n 800bf80 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
800bf5e: 78fa ldrb r2, [r7, #3]
800bf60: 6879 ldr r1, [r7, #4]
800bf62: 4613 mov r3, r2
800bf64: 009b lsls r3, r3, #2
800bf66: 4413 add r3, r2
800bf68: 009b lsls r3, r3, #2
800bf6a: 440b add r3, r1
800bf6c: 331c adds r3, #28
800bf6e: 2200 movs r2, #0
800bf70: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800bf72: 78f9 ldrb r1, [r7, #3]
800bf74: 2300 movs r3, #0
800bf76: 2200 movs r2, #0
800bf78: 6878 ldr r0, [r7, #4]
800bf7a: f001 fe45 bl 800dc08 <USBD_LL_Transmit>
800bf7e: e003 b.n 800bf88 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
800bf80: 68fb ldr r3, [r7, #12]
800bf82: 2200 movs r2, #0
800bf84: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800bf88: 2300 movs r3, #0
800bf8a: e000 b.n 800bf8e <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
800bf8c: 2302 movs r3, #2
}
}
800bf8e: 4618 mov r0, r3
800bf90: 3710 adds r7, #16
800bf92: 46bd mov sp, r7
800bf94: bd80 pop {r7, pc}
0800bf96 <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800bf96: b580 push {r7, lr}
800bf98: b084 sub sp, #16
800bf9a: af00 add r7, sp, #0
800bf9c: 6078 str r0, [r7, #4]
800bf9e: 460b mov r3, r1
800bfa0: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bfa2: 687b ldr r3, [r7, #4]
800bfa4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bfa8: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800bfaa: 78fb ldrb r3, [r7, #3]
800bfac: 4619 mov r1, r3
800bfae: 6878 ldr r0, [r7, #4]
800bfb0: f001 fe70 bl 800dc94 <USBD_LL_GetRxDataSize>
800bfb4: 4602 mov r2, r0
800bfb6: 68fb ldr r3, [r7, #12]
800bfb8: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
800bfbc: 687b ldr r3, [r7, #4]
800bfbe: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bfc2: 2b00 cmp r3, #0
800bfc4: d00d beq.n 800bfe2 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800bfc6: 687b ldr r3, [r7, #4]
800bfc8: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bfcc: 68db ldr r3, [r3, #12]
800bfce: 68fa ldr r2, [r7, #12]
800bfd0: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800bfd4: 68fa ldr r2, [r7, #12]
800bfd6: f502 7203 add.w r2, r2, #524 @ 0x20c
800bfda: 4611 mov r1, r2
800bfdc: 4798 blx r3
return USBD_OK;
800bfde: 2300 movs r3, #0
800bfe0: e000 b.n 800bfe4 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800bfe2: 2302 movs r3, #2
}
}
800bfe4: 4618 mov r0, r3
800bfe6: 3710 adds r7, #16
800bfe8: 46bd mov sp, r7
800bfea: bd80 pop {r7, pc}
0800bfec <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
800bfec: b580 push {r7, lr}
800bfee: b084 sub sp, #16
800bff0: af00 add r7, sp, #0
800bff2: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bff4: 687b ldr r3, [r7, #4]
800bff6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bffa: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
800bffc: 687b ldr r3, [r7, #4]
800bffe: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c002: 2b00 cmp r3, #0
800c004: d014 beq.n 800c030 <USBD_CDC_EP0_RxReady+0x44>
800c006: 68fb ldr r3, [r7, #12]
800c008: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
800c00c: 2bff cmp r3, #255 @ 0xff
800c00e: d00f beq.n 800c030 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c010: 687b ldr r3, [r7, #4]
800c012: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c016: 689b ldr r3, [r3, #8]
800c018: 68fa ldr r2, [r7, #12]
800c01a: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800c01e: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800c020: 68fa ldr r2, [r7, #12]
800c022: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c026: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
800c028: 68fb ldr r3, [r7, #12]
800c02a: 22ff movs r2, #255 @ 0xff
800c02c: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
800c030: 2300 movs r3, #0
}
800c032: 4618 mov r0, r3
800c034: 3710 adds r7, #16
800c036: 46bd mov sp, r7
800c038: bd80 pop {r7, pc}
...
0800c03c <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
800c03c: b480 push {r7}
800c03e: b083 sub sp, #12
800c040: af00 add r7, sp, #0
800c042: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800c044: 687b ldr r3, [r7, #4]
800c046: 2243 movs r2, #67 @ 0x43
800c048: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
800c04a: 4b03 ldr r3, [pc, #12] @ (800c058 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
800c04c: 4618 mov r0, r3
800c04e: 370c adds r7, #12
800c050: 46bd mov sp, r7
800c052: bc80 pop {r7}
800c054: 4770 bx lr
800c056: bf00 nop
800c058: 200000a4 .word 0x200000a4
0800c05c <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
800c05c: b480 push {r7}
800c05e: b083 sub sp, #12
800c060: af00 add r7, sp, #0
800c062: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800c064: 687b ldr r3, [r7, #4]
800c066: 2243 movs r2, #67 @ 0x43
800c068: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
800c06a: 4b03 ldr r3, [pc, #12] @ (800c078 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
800c06c: 4618 mov r0, r3
800c06e: 370c adds r7, #12
800c070: 46bd mov sp, r7
800c072: bc80 pop {r7}
800c074: 4770 bx lr
800c076: bf00 nop
800c078: 20000060 .word 0x20000060
0800c07c <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
800c07c: b480 push {r7}
800c07e: b083 sub sp, #12
800c080: af00 add r7, sp, #0
800c082: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800c084: 687b ldr r3, [r7, #4]
800c086: 2243 movs r2, #67 @ 0x43
800c088: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
800c08a: 4b03 ldr r3, [pc, #12] @ (800c098 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
800c08c: 4618 mov r0, r3
800c08e: 370c adds r7, #12
800c090: 46bd mov sp, r7
800c092: bc80 pop {r7}
800c094: 4770 bx lr
800c096: bf00 nop
800c098: 200000e8 .word 0x200000e8
0800c09c <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
800c09c: b480 push {r7}
800c09e: b083 sub sp, #12
800c0a0: af00 add r7, sp, #0
800c0a2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800c0a4: 687b ldr r3, [r7, #4]
800c0a6: 220a movs r2, #10
800c0a8: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
800c0aa: 4b03 ldr r3, [pc, #12] @ (800c0b8 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
800c0ac: 4618 mov r0, r3
800c0ae: 370c adds r7, #12
800c0b0: 46bd mov sp, r7
800c0b2: bc80 pop {r7}
800c0b4: 4770 bx lr
800c0b6: bf00 nop
800c0b8: 2000001c .word 0x2000001c
0800c0bc <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
800c0bc: b480 push {r7}
800c0be: b085 sub sp, #20
800c0c0: af00 add r7, sp, #0
800c0c2: 6078 str r0, [r7, #4]
800c0c4: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800c0c6: 2302 movs r3, #2
800c0c8: 73fb strb r3, [r7, #15]
if (fops != NULL)
800c0ca: 683b ldr r3, [r7, #0]
800c0cc: 2b00 cmp r3, #0
800c0ce: d005 beq.n 800c0dc <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800c0d0: 687b ldr r3, [r7, #4]
800c0d2: 683a ldr r2, [r7, #0]
800c0d4: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
800c0d8: 2300 movs r3, #0
800c0da: 73fb strb r3, [r7, #15]
}
return ret;
800c0dc: 7bfb ldrb r3, [r7, #15]
}
800c0de: 4618 mov r0, r3
800c0e0: 3714 adds r7, #20
800c0e2: 46bd mov sp, r7
800c0e4: bc80 pop {r7}
800c0e6: 4770 bx lr
0800c0e8 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
800c0e8: b480 push {r7}
800c0ea: b087 sub sp, #28
800c0ec: af00 add r7, sp, #0
800c0ee: 60f8 str r0, [r7, #12]
800c0f0: 60b9 str r1, [r7, #8]
800c0f2: 4613 mov r3, r2
800c0f4: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c0f6: 68fb ldr r3, [r7, #12]
800c0f8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c0fc: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800c0fe: 697b ldr r3, [r7, #20]
800c100: 68ba ldr r2, [r7, #8]
800c102: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800c106: 88fa ldrh r2, [r7, #6]
800c108: 697b ldr r3, [r7, #20]
800c10a: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800c10e: 2300 movs r3, #0
}
800c110: 4618 mov r0, r3
800c112: 371c adds r7, #28
800c114: 46bd mov sp, r7
800c116: bc80 pop {r7}
800c118: 4770 bx lr
0800c11a <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
800c11a: b480 push {r7}
800c11c: b085 sub sp, #20
800c11e: af00 add r7, sp, #0
800c120: 6078 str r0, [r7, #4]
800c122: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c124: 687b ldr r3, [r7, #4]
800c126: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c12a: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
800c12c: 68fb ldr r3, [r7, #12]
800c12e: 683a ldr r2, [r7, #0]
800c130: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800c134: 2300 movs r3, #0
}
800c136: 4618 mov r0, r3
800c138: 3714 adds r7, #20
800c13a: 46bd mov sp, r7
800c13c: bc80 pop {r7}
800c13e: 4770 bx lr
0800c140 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
800c140: b580 push {r7, lr}
800c142: b084 sub sp, #16
800c144: af00 add r7, sp, #0
800c146: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c148: 687b ldr r3, [r7, #4]
800c14a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c14e: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
800c150: 687b ldr r3, [r7, #4]
800c152: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c156: 2b00 cmp r3, #0
800c158: d01c beq.n 800c194 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
800c15a: 68fb ldr r3, [r7, #12]
800c15c: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800c160: 2b00 cmp r3, #0
800c162: d115 bne.n 800c190 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800c164: 68fb ldr r3, [r7, #12]
800c166: 2201 movs r2, #1
800c168: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
800c16c: 68fb ldr r3, [r7, #12]
800c16e: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800c172: 687b ldr r3, [r7, #4]
800c174: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c176: 68fb ldr r3, [r7, #12]
800c178: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
800c17c: 68fb ldr r3, [r7, #12]
800c17e: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c182: b29b uxth r3, r3
800c184: 2181 movs r1, #129 @ 0x81
800c186: 6878 ldr r0, [r7, #4]
800c188: f001 fd3e bl 800dc08 <USBD_LL_Transmit>
return USBD_OK;
800c18c: 2300 movs r3, #0
800c18e: e002 b.n 800c196 <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800c190: 2301 movs r3, #1
800c192: e000 b.n 800c196 <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800c194: 2302 movs r3, #2
}
}
800c196: 4618 mov r0, r3
800c198: 3710 adds r7, #16
800c19a: 46bd mov sp, r7
800c19c: bd80 pop {r7, pc}
0800c19e <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800c19e: b580 push {r7, lr}
800c1a0: b084 sub sp, #16
800c1a2: af00 add r7, sp, #0
800c1a4: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c1a6: 687b ldr r3, [r7, #4]
800c1a8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c1ac: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800c1ae: 687b ldr r3, [r7, #4]
800c1b0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c1b4: 2b00 cmp r3, #0
800c1b6: d017 beq.n 800c1e8 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c1b8: 687b ldr r3, [r7, #4]
800c1ba: 7c1b ldrb r3, [r3, #16]
800c1bc: 2b00 cmp r3, #0
800c1be: d109 bne.n 800c1d4 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c1c0: 68fb ldr r3, [r7, #12]
800c1c2: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c1c6: f44f 7300 mov.w r3, #512 @ 0x200
800c1ca: 2101 movs r1, #1
800c1cc: 6878 ldr r0, [r7, #4]
800c1ce: f001 fd3e bl 800dc4e <USBD_LL_PrepareReceive>
800c1d2: e007 b.n 800c1e4 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c1d4: 68fb ldr r3, [r7, #12]
800c1d6: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c1da: 2340 movs r3, #64 @ 0x40
800c1dc: 2101 movs r1, #1
800c1de: 6878 ldr r0, [r7, #4]
800c1e0: f001 fd35 bl 800dc4e <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800c1e4: 2300 movs r3, #0
800c1e6: e000 b.n 800c1ea <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
800c1e8: 2302 movs r3, #2
}
}
800c1ea: 4618 mov r0, r3
800c1ec: 3710 adds r7, #16
800c1ee: 46bd mov sp, r7
800c1f0: bd80 pop {r7, pc}
0800c1f2 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800c1f2: b580 push {r7, lr}
800c1f4: b084 sub sp, #16
800c1f6: af00 add r7, sp, #0
800c1f8: 60f8 str r0, [r7, #12]
800c1fa: 60b9 str r1, [r7, #8]
800c1fc: 4613 mov r3, r2
800c1fe: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800c200: 68fb ldr r3, [r7, #12]
800c202: 2b00 cmp r3, #0
800c204: d101 bne.n 800c20a <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
800c206: 2302 movs r3, #2
800c208: e01a b.n 800c240 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
800c20a: 68fb ldr r3, [r7, #12]
800c20c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c210: 2b00 cmp r3, #0
800c212: d003 beq.n 800c21c <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800c214: 68fb ldr r3, [r7, #12]
800c216: 2200 movs r2, #0
800c218: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
800c21c: 68bb ldr r3, [r7, #8]
800c21e: 2b00 cmp r3, #0
800c220: d003 beq.n 800c22a <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800c222: 68fb ldr r3, [r7, #12]
800c224: 68ba ldr r2, [r7, #8]
800c226: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800c22a: 68fb ldr r3, [r7, #12]
800c22c: 2201 movs r2, #1
800c22e: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800c232: 68fb ldr r3, [r7, #12]
800c234: 79fa ldrb r2, [r7, #7]
800c236: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800c238: 68f8 ldr r0, [r7, #12]
800c23a: f001 fba3 bl 800d984 <USBD_LL_Init>
return USBD_OK;
800c23e: 2300 movs r3, #0
}
800c240: 4618 mov r0, r3
800c242: 3710 adds r7, #16
800c244: 46bd mov sp, r7
800c246: bd80 pop {r7, pc}
0800c248 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800c248: b480 push {r7}
800c24a: b085 sub sp, #20
800c24c: af00 add r7, sp, #0
800c24e: 6078 str r0, [r7, #4]
800c250: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
800c252: 2300 movs r3, #0
800c254: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800c256: 683b ldr r3, [r7, #0]
800c258: 2b00 cmp r3, #0
800c25a: d006 beq.n 800c26a <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
800c25c: 687b ldr r3, [r7, #4]
800c25e: 683a ldr r2, [r7, #0]
800c260: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800c264: 2300 movs r3, #0
800c266: 73fb strb r3, [r7, #15]
800c268: e001 b.n 800c26e <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
800c26a: 2302 movs r3, #2
800c26c: 73fb strb r3, [r7, #15]
}
return status;
800c26e: 7bfb ldrb r3, [r7, #15]
}
800c270: 4618 mov r0, r3
800c272: 3714 adds r7, #20
800c274: 46bd mov sp, r7
800c276: bc80 pop {r7}
800c278: 4770 bx lr
0800c27a <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800c27a: b580 push {r7, lr}
800c27c: b082 sub sp, #8
800c27e: af00 add r7, sp, #0
800c280: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800c282: 6878 ldr r0, [r7, #4]
800c284: f001 fbd8 bl 800da38 <USBD_LL_Start>
return USBD_OK;
800c288: 2300 movs r3, #0
}
800c28a: 4618 mov r0, r3
800c28c: 3708 adds r7, #8
800c28e: 46bd mov sp, r7
800c290: bd80 pop {r7, pc}
0800c292 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800c292: b480 push {r7}
800c294: b083 sub sp, #12
800c296: af00 add r7, sp, #0
800c298: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800c29a: 2300 movs r3, #0
}
800c29c: 4618 mov r0, r3
800c29e: 370c adds r7, #12
800c2a0: 46bd mov sp, r7
800c2a2: bc80 pop {r7}
800c2a4: 4770 bx lr
0800c2a6 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c2a6: b580 push {r7, lr}
800c2a8: b084 sub sp, #16
800c2aa: af00 add r7, sp, #0
800c2ac: 6078 str r0, [r7, #4]
800c2ae: 460b mov r3, r1
800c2b0: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800c2b2: 2302 movs r3, #2
800c2b4: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800c2b6: 687b ldr r3, [r7, #4]
800c2b8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c2bc: 2b00 cmp r3, #0
800c2be: d00c beq.n 800c2da <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800c2c0: 687b ldr r3, [r7, #4]
800c2c2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c2c6: 681b ldr r3, [r3, #0]
800c2c8: 78fa ldrb r2, [r7, #3]
800c2ca: 4611 mov r1, r2
800c2cc: 6878 ldr r0, [r7, #4]
800c2ce: 4798 blx r3
800c2d0: 4603 mov r3, r0
800c2d2: 2b00 cmp r3, #0
800c2d4: d101 bne.n 800c2da <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800c2d6: 2300 movs r3, #0
800c2d8: 73fb strb r3, [r7, #15]
}
}
return ret;
800c2da: 7bfb ldrb r3, [r7, #15]
}
800c2dc: 4618 mov r0, r3
800c2de: 3710 adds r7, #16
800c2e0: 46bd mov sp, r7
800c2e2: bd80 pop {r7, pc}
0800c2e4 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c2e4: b580 push {r7, lr}
800c2e6: b082 sub sp, #8
800c2e8: af00 add r7, sp, #0
800c2ea: 6078 str r0, [r7, #4]
800c2ec: 460b mov r3, r1
800c2ee: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800c2f0: 687b ldr r3, [r7, #4]
800c2f2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c2f6: 685b ldr r3, [r3, #4]
800c2f8: 78fa ldrb r2, [r7, #3]
800c2fa: 4611 mov r1, r2
800c2fc: 6878 ldr r0, [r7, #4]
800c2fe: 4798 blx r3
return USBD_OK;
800c300: 2300 movs r3, #0
}
800c302: 4618 mov r0, r3
800c304: 3708 adds r7, #8
800c306: 46bd mov sp, r7
800c308: bd80 pop {r7, pc}
0800c30a <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800c30a: b580 push {r7, lr}
800c30c: b082 sub sp, #8
800c30e: af00 add r7, sp, #0
800c310: 6078 str r0, [r7, #4]
800c312: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
800c314: 687b ldr r3, [r7, #4]
800c316: f503 732a add.w r3, r3, #680 @ 0x2a8
800c31a: 6839 ldr r1, [r7, #0]
800c31c: 4618 mov r0, r3
800c31e: f000 fed8 bl 800d0d2 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800c322: 687b ldr r3, [r7, #4]
800c324: 2201 movs r2, #1
800c326: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800c32a: 687b ldr r3, [r7, #4]
800c32c: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800c330: 461a mov r2, r3
800c332: 687b ldr r3, [r7, #4]
800c334: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800c338: 687b ldr r3, [r7, #4]
800c33a: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c33e: f003 031f and.w r3, r3, #31
800c342: 2b02 cmp r3, #2
800c344: d016 beq.n 800c374 <USBD_LL_SetupStage+0x6a>
800c346: 2b02 cmp r3, #2
800c348: d81c bhi.n 800c384 <USBD_LL_SetupStage+0x7a>
800c34a: 2b00 cmp r3, #0
800c34c: d002 beq.n 800c354 <USBD_LL_SetupStage+0x4a>
800c34e: 2b01 cmp r3, #1
800c350: d008 beq.n 800c364 <USBD_LL_SetupStage+0x5a>
800c352: e017 b.n 800c384 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
800c354: 687b ldr r3, [r7, #4]
800c356: f503 732a add.w r3, r3, #680 @ 0x2a8
800c35a: 4619 mov r1, r3
800c35c: 6878 ldr r0, [r7, #4]
800c35e: f000 f9cb bl 800c6f8 <USBD_StdDevReq>
break;
800c362: e01a b.n 800c39a <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800c364: 687b ldr r3, [r7, #4]
800c366: f503 732a add.w r3, r3, #680 @ 0x2a8
800c36a: 4619 mov r1, r3
800c36c: 6878 ldr r0, [r7, #4]
800c36e: f000 fa2d bl 800c7cc <USBD_StdItfReq>
break;
800c372: e012 b.n 800c39a <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800c374: 687b ldr r3, [r7, #4]
800c376: f503 732a add.w r3, r3, #680 @ 0x2a8
800c37a: 4619 mov r1, r3
800c37c: 6878 ldr r0, [r7, #4]
800c37e: f000 fa6d bl 800c85c <USBD_StdEPReq>
break;
800c382: e00a b.n 800c39a <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800c384: 687b ldr r3, [r7, #4]
800c386: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c38a: f023 037f bic.w r3, r3, #127 @ 0x7f
800c38e: b2db uxtb r3, r3
800c390: 4619 mov r1, r3
800c392: 6878 ldr r0, [r7, #4]
800c394: f001 fbb0 bl 800daf8 <USBD_LL_StallEP>
break;
800c398: bf00 nop
}
return USBD_OK;
800c39a: 2300 movs r3, #0
}
800c39c: 4618 mov r0, r3
800c39e: 3708 adds r7, #8
800c3a0: 46bd mov sp, r7
800c3a2: bd80 pop {r7, pc}
0800c3a4 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800c3a4: b580 push {r7, lr}
800c3a6: b086 sub sp, #24
800c3a8: af00 add r7, sp, #0
800c3aa: 60f8 str r0, [r7, #12]
800c3ac: 460b mov r3, r1
800c3ae: 607a str r2, [r7, #4]
800c3b0: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800c3b2: 7afb ldrb r3, [r7, #11]
800c3b4: 2b00 cmp r3, #0
800c3b6: d14b bne.n 800c450 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800c3b8: 68fb ldr r3, [r7, #12]
800c3ba: f503 73aa add.w r3, r3, #340 @ 0x154
800c3be: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800c3c0: 68fb ldr r3, [r7, #12]
800c3c2: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c3c6: 2b03 cmp r3, #3
800c3c8: d134 bne.n 800c434 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800c3ca: 697b ldr r3, [r7, #20]
800c3cc: 68da ldr r2, [r3, #12]
800c3ce: 697b ldr r3, [r7, #20]
800c3d0: 691b ldr r3, [r3, #16]
800c3d2: 429a cmp r2, r3
800c3d4: d919 bls.n 800c40a <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800c3d6: 697b ldr r3, [r7, #20]
800c3d8: 68da ldr r2, [r3, #12]
800c3da: 697b ldr r3, [r7, #20]
800c3dc: 691b ldr r3, [r3, #16]
800c3de: 1ad2 subs r2, r2, r3
800c3e0: 697b ldr r3, [r7, #20]
800c3e2: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c3e4: 697b ldr r3, [r7, #20]
800c3e6: 68da ldr r2, [r3, #12]
800c3e8: 697b ldr r3, [r7, #20]
800c3ea: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800c3ec: 429a cmp r2, r3
800c3ee: d203 bcs.n 800c3f8 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c3f0: 697b ldr r3, [r7, #20]
800c3f2: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800c3f4: b29b uxth r3, r3
800c3f6: e002 b.n 800c3fe <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c3f8: 697b ldr r3, [r7, #20]
800c3fa: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800c3fc: b29b uxth r3, r3
800c3fe: 461a mov r2, r3
800c400: 6879 ldr r1, [r7, #4]
800c402: 68f8 ldr r0, [r7, #12]
800c404: f000 ff54 bl 800d2b0 <USBD_CtlContinueRx>
800c408: e038 b.n 800c47c <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800c40a: 68fb ldr r3, [r7, #12]
800c40c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c410: 691b ldr r3, [r3, #16]
800c412: 2b00 cmp r3, #0
800c414: d00a beq.n 800c42c <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c416: 68fb ldr r3, [r7, #12]
800c418: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800c41c: 2b03 cmp r3, #3
800c41e: d105 bne.n 800c42c <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800c420: 68fb ldr r3, [r7, #12]
800c422: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c426: 691b ldr r3, [r3, #16]
800c428: 68f8 ldr r0, [r7, #12]
800c42a: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800c42c: 68f8 ldr r0, [r7, #12]
800c42e: f000 ff51 bl 800d2d4 <USBD_CtlSendStatus>
800c432: e023 b.n 800c47c <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
800c434: 68fb ldr r3, [r7, #12]
800c436: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c43a: 2b05 cmp r3, #5
800c43c: d11e bne.n 800c47c <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
800c43e: 68fb ldr r3, [r7, #12]
800c440: 2200 movs r2, #0
800c442: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
800c446: 2100 movs r1, #0
800c448: 68f8 ldr r0, [r7, #12]
800c44a: f001 fb55 bl 800daf8 <USBD_LL_StallEP>
800c44e: e015 b.n 800c47c <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
800c450: 68fb ldr r3, [r7, #12]
800c452: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c456: 699b ldr r3, [r3, #24]
800c458: 2b00 cmp r3, #0
800c45a: d00d beq.n 800c478 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c45c: 68fb ldr r3, [r7, #12]
800c45e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800c462: 2b03 cmp r3, #3
800c464: d108 bne.n 800c478 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800c466: 68fb ldr r3, [r7, #12]
800c468: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c46c: 699b ldr r3, [r3, #24]
800c46e: 7afa ldrb r2, [r7, #11]
800c470: 4611 mov r1, r2
800c472: 68f8 ldr r0, [r7, #12]
800c474: 4798 blx r3
800c476: e001 b.n 800c47c <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800c478: 2302 movs r3, #2
800c47a: e000 b.n 800c47e <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800c47c: 2300 movs r3, #0
}
800c47e: 4618 mov r0, r3
800c480: 3718 adds r7, #24
800c482: 46bd mov sp, r7
800c484: bd80 pop {r7, pc}
0800c486 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800c486: b580 push {r7, lr}
800c488: b086 sub sp, #24
800c48a: af00 add r7, sp, #0
800c48c: 60f8 str r0, [r7, #12]
800c48e: 460b mov r3, r1
800c490: 607a str r2, [r7, #4]
800c492: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800c494: 7afb ldrb r3, [r7, #11]
800c496: 2b00 cmp r3, #0
800c498: d17f bne.n 800c59a <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800c49a: 68fb ldr r3, [r7, #12]
800c49c: 3314 adds r3, #20
800c49e: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800c4a0: 68fb ldr r3, [r7, #12]
800c4a2: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c4a6: 2b02 cmp r3, #2
800c4a8: d15c bne.n 800c564 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800c4aa: 697b ldr r3, [r7, #20]
800c4ac: 68da ldr r2, [r3, #12]
800c4ae: 697b ldr r3, [r7, #20]
800c4b0: 691b ldr r3, [r3, #16]
800c4b2: 429a cmp r2, r3
800c4b4: d915 bls.n 800c4e2 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800c4b6: 697b ldr r3, [r7, #20]
800c4b8: 68da ldr r2, [r3, #12]
800c4ba: 697b ldr r3, [r7, #20]
800c4bc: 691b ldr r3, [r3, #16]
800c4be: 1ad2 subs r2, r2, r3
800c4c0: 697b ldr r3, [r7, #20]
800c4c2: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800c4c4: 697b ldr r3, [r7, #20]
800c4c6: 68db ldr r3, [r3, #12]
800c4c8: b29b uxth r3, r3
800c4ca: 461a mov r2, r3
800c4cc: 6879 ldr r1, [r7, #4]
800c4ce: 68f8 ldr r0, [r7, #12]
800c4d0: f000 febe bl 800d250 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800c4d4: 2300 movs r3, #0
800c4d6: 2200 movs r2, #0
800c4d8: 2100 movs r1, #0
800c4da: 68f8 ldr r0, [r7, #12]
800c4dc: f001 fbb7 bl 800dc4e <USBD_LL_PrepareReceive>
800c4e0: e04e b.n 800c580 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800c4e2: 697b ldr r3, [r7, #20]
800c4e4: 689b ldr r3, [r3, #8]
800c4e6: 697a ldr r2, [r7, #20]
800c4e8: 6912 ldr r2, [r2, #16]
800c4ea: fbb3 f1f2 udiv r1, r3, r2
800c4ee: fb01 f202 mul.w r2, r1, r2
800c4f2: 1a9b subs r3, r3, r2
800c4f4: 2b00 cmp r3, #0
800c4f6: d11c bne.n 800c532 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800c4f8: 697b ldr r3, [r7, #20]
800c4fa: 689a ldr r2, [r3, #8]
800c4fc: 697b ldr r3, [r7, #20]
800c4fe: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800c500: 429a cmp r2, r3
800c502: d316 bcc.n 800c532 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
800c504: 697b ldr r3, [r7, #20]
800c506: 689a ldr r2, [r3, #8]
800c508: 68fb ldr r3, [r7, #12]
800c50a: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800c50e: 429a cmp r2, r3
800c510: d20f bcs.n 800c532 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800c512: 2200 movs r2, #0
800c514: 2100 movs r1, #0
800c516: 68f8 ldr r0, [r7, #12]
800c518: f000 fe9a bl 800d250 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800c51c: 68fb ldr r3, [r7, #12]
800c51e: 2200 movs r2, #0
800c520: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800c524: 2300 movs r3, #0
800c526: 2200 movs r2, #0
800c528: 2100 movs r1, #0
800c52a: 68f8 ldr r0, [r7, #12]
800c52c: f001 fb8f bl 800dc4e <USBD_LL_PrepareReceive>
800c530: e026 b.n 800c580 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
800c532: 68fb ldr r3, [r7, #12]
800c534: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c538: 68db ldr r3, [r3, #12]
800c53a: 2b00 cmp r3, #0
800c53c: d00a beq.n 800c554 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c53e: 68fb ldr r3, [r7, #12]
800c540: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
800c544: 2b03 cmp r3, #3
800c546: d105 bne.n 800c554 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800c548: 68fb ldr r3, [r7, #12]
800c54a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c54e: 68db ldr r3, [r3, #12]
800c550: 68f8 ldr r0, [r7, #12]
800c552: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
800c554: 2180 movs r1, #128 @ 0x80
800c556: 68f8 ldr r0, [r7, #12]
800c558: f001 face bl 800daf8 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800c55c: 68f8 ldr r0, [r7, #12]
800c55e: f000 fecc bl 800d2fa <USBD_CtlReceiveStatus>
800c562: e00d b.n 800c580 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800c564: 68fb ldr r3, [r7, #12]
800c566: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c56a: 2b04 cmp r3, #4
800c56c: d004 beq.n 800c578 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800c56e: 68fb ldr r3, [r7, #12]
800c570: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800c574: 2b00 cmp r3, #0
800c576: d103 bne.n 800c580 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800c578: 2180 movs r1, #128 @ 0x80
800c57a: 68f8 ldr r0, [r7, #12]
800c57c: f001 fabc bl 800daf8 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
800c580: 68fb ldr r3, [r7, #12]
800c582: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800c586: 2b01 cmp r3, #1
800c588: d11d bne.n 800c5c6 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800c58a: 68f8 ldr r0, [r7, #12]
800c58c: f7ff fe81 bl 800c292 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800c590: 68fb ldr r3, [r7, #12]
800c592: 2200 movs r2, #0
800c594: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800c598: e015 b.n 800c5c6 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800c59a: 68fb ldr r3, [r7, #12]
800c59c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c5a0: 695b ldr r3, [r3, #20]
800c5a2: 2b00 cmp r3, #0
800c5a4: d00d beq.n 800c5c2 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c5a6: 68fb ldr r3, [r7, #12]
800c5a8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800c5ac: 2b03 cmp r3, #3
800c5ae: d108 bne.n 800c5c2 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800c5b0: 68fb ldr r3, [r7, #12]
800c5b2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c5b6: 695b ldr r3, [r3, #20]
800c5b8: 7afa ldrb r2, [r7, #11]
800c5ba: 4611 mov r1, r2
800c5bc: 68f8 ldr r0, [r7, #12]
800c5be: 4798 blx r3
800c5c0: e001 b.n 800c5c6 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800c5c2: 2302 movs r3, #2
800c5c4: e000 b.n 800c5c8 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800c5c6: 2300 movs r3, #0
}
800c5c8: 4618 mov r0, r3
800c5ca: 3718 adds r7, #24
800c5cc: 46bd mov sp, r7
800c5ce: bd80 pop {r7, pc}
0800c5d0 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800c5d0: b580 push {r7, lr}
800c5d2: b082 sub sp, #8
800c5d4: af00 add r7, sp, #0
800c5d6: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800c5d8: 2340 movs r3, #64 @ 0x40
800c5da: 2200 movs r2, #0
800c5dc: 2100 movs r1, #0
800c5de: 6878 ldr r0, [r7, #4]
800c5e0: f001 fa45 bl 800da6e <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800c5e4: 687b ldr r3, [r7, #4]
800c5e6: 2201 movs r2, #1
800c5e8: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800c5ec: 687b ldr r3, [r7, #4]
800c5ee: 2240 movs r2, #64 @ 0x40
800c5f0: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800c5f4: 2340 movs r3, #64 @ 0x40
800c5f6: 2200 movs r2, #0
800c5f8: 2180 movs r1, #128 @ 0x80
800c5fa: 6878 ldr r0, [r7, #4]
800c5fc: f001 fa37 bl 800da6e <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800c600: 687b ldr r3, [r7, #4]
800c602: 2201 movs r2, #1
800c604: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800c606: 687b ldr r3, [r7, #4]
800c608: 2240 movs r2, #64 @ 0x40
800c60a: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800c60c: 687b ldr r3, [r7, #4]
800c60e: 2201 movs r2, #1
800c610: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800c614: 687b ldr r3, [r7, #4]
800c616: 2200 movs r2, #0
800c618: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800c61c: 687b ldr r3, [r7, #4]
800c61e: 2200 movs r2, #0
800c620: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800c622: 687b ldr r3, [r7, #4]
800c624: 2200 movs r2, #0
800c626: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
800c62a: 687b ldr r3, [r7, #4]
800c62c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c630: 2b00 cmp r3, #0
800c632: d009 beq.n 800c648 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
800c634: 687b ldr r3, [r7, #4]
800c636: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c63a: 685b ldr r3, [r3, #4]
800c63c: 687a ldr r2, [r7, #4]
800c63e: 6852 ldr r2, [r2, #4]
800c640: b2d2 uxtb r2, r2
800c642: 4611 mov r1, r2
800c644: 6878 ldr r0, [r7, #4]
800c646: 4798 blx r3
}
return USBD_OK;
800c648: 2300 movs r3, #0
}
800c64a: 4618 mov r0, r3
800c64c: 3708 adds r7, #8
800c64e: 46bd mov sp, r7
800c650: bd80 pop {r7, pc}
0800c652 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800c652: b480 push {r7}
800c654: b083 sub sp, #12
800c656: af00 add r7, sp, #0
800c658: 6078 str r0, [r7, #4]
800c65a: 460b mov r3, r1
800c65c: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800c65e: 687b ldr r3, [r7, #4]
800c660: 78fa ldrb r2, [r7, #3]
800c662: 741a strb r2, [r3, #16]
return USBD_OK;
800c664: 2300 movs r3, #0
}
800c666: 4618 mov r0, r3
800c668: 370c adds r7, #12
800c66a: 46bd mov sp, r7
800c66c: bc80 pop {r7}
800c66e: 4770 bx lr
0800c670 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800c670: b480 push {r7}
800c672: b083 sub sp, #12
800c674: af00 add r7, sp, #0
800c676: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800c678: 687b ldr r3, [r7, #4]
800c67a: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800c67e: 687b ldr r3, [r7, #4]
800c680: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800c684: 687b ldr r3, [r7, #4]
800c686: 2204 movs r2, #4
800c688: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800c68c: 2300 movs r3, #0
}
800c68e: 4618 mov r0, r3
800c690: 370c adds r7, #12
800c692: 46bd mov sp, r7
800c694: bc80 pop {r7}
800c696: 4770 bx lr
0800c698 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800c698: b480 push {r7}
800c69a: b083 sub sp, #12
800c69c: af00 add r7, sp, #0
800c69e: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800c6a0: 687b ldr r3, [r7, #4]
800c6a2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c6a6: 2b04 cmp r3, #4
800c6a8: d105 bne.n 800c6b6 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800c6aa: 687b ldr r3, [r7, #4]
800c6ac: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
800c6b0: 687b ldr r3, [r7, #4]
800c6b2: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800c6b6: 2300 movs r3, #0
}
800c6b8: 4618 mov r0, r3
800c6ba: 370c adds r7, #12
800c6bc: 46bd mov sp, r7
800c6be: bc80 pop {r7}
800c6c0: 4770 bx lr
0800c6c2 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800c6c2: b580 push {r7, lr}
800c6c4: b082 sub sp, #8
800c6c6: af00 add r7, sp, #0
800c6c8: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c6ca: 687b ldr r3, [r7, #4]
800c6cc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c6d0: 2b03 cmp r3, #3
800c6d2: d10b bne.n 800c6ec <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800c6d4: 687b ldr r3, [r7, #4]
800c6d6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c6da: 69db ldr r3, [r3, #28]
800c6dc: 2b00 cmp r3, #0
800c6de: d005 beq.n 800c6ec <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800c6e0: 687b ldr r3, [r7, #4]
800c6e2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c6e6: 69db ldr r3, [r3, #28]
800c6e8: 6878 ldr r0, [r7, #4]
800c6ea: 4798 blx r3
}
}
return USBD_OK;
800c6ec: 2300 movs r3, #0
}
800c6ee: 4618 mov r0, r3
800c6f0: 3708 adds r7, #8
800c6f2: 46bd mov sp, r7
800c6f4: bd80 pop {r7, pc}
...
0800c6f8 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c6f8: b580 push {r7, lr}
800c6fa: b084 sub sp, #16
800c6fc: af00 add r7, sp, #0
800c6fe: 6078 str r0, [r7, #4]
800c700: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800c702: 2300 movs r3, #0
800c704: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c706: 683b ldr r3, [r7, #0]
800c708: 781b ldrb r3, [r3, #0]
800c70a: f003 0360 and.w r3, r3, #96 @ 0x60
800c70e: 2b40 cmp r3, #64 @ 0x40
800c710: d005 beq.n 800c71e <USBD_StdDevReq+0x26>
800c712: 2b40 cmp r3, #64 @ 0x40
800c714: d84f bhi.n 800c7b6 <USBD_StdDevReq+0xbe>
800c716: 2b00 cmp r3, #0
800c718: d009 beq.n 800c72e <USBD_StdDevReq+0x36>
800c71a: 2b20 cmp r3, #32
800c71c: d14b bne.n 800c7b6 <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800c71e: 687b ldr r3, [r7, #4]
800c720: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c724: 689b ldr r3, [r3, #8]
800c726: 6839 ldr r1, [r7, #0]
800c728: 6878 ldr r0, [r7, #4]
800c72a: 4798 blx r3
break;
800c72c: e048 b.n 800c7c0 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800c72e: 683b ldr r3, [r7, #0]
800c730: 785b ldrb r3, [r3, #1]
800c732: 2b09 cmp r3, #9
800c734: d839 bhi.n 800c7aa <USBD_StdDevReq+0xb2>
800c736: a201 add r2, pc, #4 @ (adr r2, 800c73c <USBD_StdDevReq+0x44>)
800c738: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c73c: 0800c78d .word 0x0800c78d
800c740: 0800c7a1 .word 0x0800c7a1
800c744: 0800c7ab .word 0x0800c7ab
800c748: 0800c797 .word 0x0800c797
800c74c: 0800c7ab .word 0x0800c7ab
800c750: 0800c76f .word 0x0800c76f
800c754: 0800c765 .word 0x0800c765
800c758: 0800c7ab .word 0x0800c7ab
800c75c: 0800c783 .word 0x0800c783
800c760: 0800c779 .word 0x0800c779
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800c764: 6839 ldr r1, [r7, #0]
800c766: 6878 ldr r0, [r7, #4]
800c768: f000 f9dc bl 800cb24 <USBD_GetDescriptor>
break;
800c76c: e022 b.n 800c7b4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800c76e: 6839 ldr r1, [r7, #0]
800c770: 6878 ldr r0, [r7, #4]
800c772: f000 fb3f bl 800cdf4 <USBD_SetAddress>
break;
800c776: e01d b.n 800c7b4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
800c778: 6839 ldr r1, [r7, #0]
800c77a: 6878 ldr r0, [r7, #4]
800c77c: f000 fb7e bl 800ce7c <USBD_SetConfig>
break;
800c780: e018 b.n 800c7b4 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800c782: 6839 ldr r1, [r7, #0]
800c784: 6878 ldr r0, [r7, #4]
800c786: f000 fc07 bl 800cf98 <USBD_GetConfig>
break;
800c78a: e013 b.n 800c7b4 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800c78c: 6839 ldr r1, [r7, #0]
800c78e: 6878 ldr r0, [r7, #4]
800c790: f000 fc37 bl 800d002 <USBD_GetStatus>
break;
800c794: e00e b.n 800c7b4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800c796: 6839 ldr r1, [r7, #0]
800c798: 6878 ldr r0, [r7, #4]
800c79a: f000 fc65 bl 800d068 <USBD_SetFeature>
break;
800c79e: e009 b.n 800c7b4 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800c7a0: 6839 ldr r1, [r7, #0]
800c7a2: 6878 ldr r0, [r7, #4]
800c7a4: f000 fc74 bl 800d090 <USBD_ClrFeature>
break;
800c7a8: e004 b.n 800c7b4 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800c7aa: 6839 ldr r1, [r7, #0]
800c7ac: 6878 ldr r0, [r7, #4]
800c7ae: f000 fcc9 bl 800d144 <USBD_CtlError>
break;
800c7b2: bf00 nop
}
break;
800c7b4: e004 b.n 800c7c0 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800c7b6: 6839 ldr r1, [r7, #0]
800c7b8: 6878 ldr r0, [r7, #4]
800c7ba: f000 fcc3 bl 800d144 <USBD_CtlError>
break;
800c7be: bf00 nop
}
return ret;
800c7c0: 7bfb ldrb r3, [r7, #15]
}
800c7c2: 4618 mov r0, r3
800c7c4: 3710 adds r7, #16
800c7c6: 46bd mov sp, r7
800c7c8: bd80 pop {r7, pc}
800c7ca: bf00 nop
0800c7cc <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c7cc: b580 push {r7, lr}
800c7ce: b084 sub sp, #16
800c7d0: af00 add r7, sp, #0
800c7d2: 6078 str r0, [r7, #4]
800c7d4: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800c7d6: 2300 movs r3, #0
800c7d8: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c7da: 683b ldr r3, [r7, #0]
800c7dc: 781b ldrb r3, [r3, #0]
800c7de: f003 0360 and.w r3, r3, #96 @ 0x60
800c7e2: 2b40 cmp r3, #64 @ 0x40
800c7e4: d005 beq.n 800c7f2 <USBD_StdItfReq+0x26>
800c7e6: 2b40 cmp r3, #64 @ 0x40
800c7e8: d82e bhi.n 800c848 <USBD_StdItfReq+0x7c>
800c7ea: 2b00 cmp r3, #0
800c7ec: d001 beq.n 800c7f2 <USBD_StdItfReq+0x26>
800c7ee: 2b20 cmp r3, #32
800c7f0: d12a bne.n 800c848 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800c7f2: 687b ldr r3, [r7, #4]
800c7f4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c7f8: 3b01 subs r3, #1
800c7fa: 2b02 cmp r3, #2
800c7fc: d81d bhi.n 800c83a <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800c7fe: 683b ldr r3, [r7, #0]
800c800: 889b ldrh r3, [r3, #4]
800c802: b2db uxtb r3, r3
800c804: 2b01 cmp r3, #1
800c806: d813 bhi.n 800c830 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800c808: 687b ldr r3, [r7, #4]
800c80a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c80e: 689b ldr r3, [r3, #8]
800c810: 6839 ldr r1, [r7, #0]
800c812: 6878 ldr r0, [r7, #4]
800c814: 4798 blx r3
800c816: 4603 mov r3, r0
800c818: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800c81a: 683b ldr r3, [r7, #0]
800c81c: 88db ldrh r3, [r3, #6]
800c81e: 2b00 cmp r3, #0
800c820: d110 bne.n 800c844 <USBD_StdItfReq+0x78>
800c822: 7bfb ldrb r3, [r7, #15]
800c824: 2b00 cmp r3, #0
800c826: d10d bne.n 800c844 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
800c828: 6878 ldr r0, [r7, #4]
800c82a: f000 fd53 bl 800d2d4 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c82e: e009 b.n 800c844 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
800c830: 6839 ldr r1, [r7, #0]
800c832: 6878 ldr r0, [r7, #4]
800c834: f000 fc86 bl 800d144 <USBD_CtlError>
break;
800c838: e004 b.n 800c844 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
800c83a: 6839 ldr r1, [r7, #0]
800c83c: 6878 ldr r0, [r7, #4]
800c83e: f000 fc81 bl 800d144 <USBD_CtlError>
break;
800c842: e000 b.n 800c846 <USBD_StdItfReq+0x7a>
break;
800c844: bf00 nop
}
break;
800c846: e004 b.n 800c852 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
800c848: 6839 ldr r1, [r7, #0]
800c84a: 6878 ldr r0, [r7, #4]
800c84c: f000 fc7a bl 800d144 <USBD_CtlError>
break;
800c850: bf00 nop
}
return USBD_OK;
800c852: 2300 movs r3, #0
}
800c854: 4618 mov r0, r3
800c856: 3710 adds r7, #16
800c858: 46bd mov sp, r7
800c85a: bd80 pop {r7, pc}
0800c85c <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c85c: b580 push {r7, lr}
800c85e: b084 sub sp, #16
800c860: af00 add r7, sp, #0
800c862: 6078 str r0, [r7, #4]
800c864: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
800c866: 2300 movs r3, #0
800c868: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800c86a: 683b ldr r3, [r7, #0]
800c86c: 889b ldrh r3, [r3, #4]
800c86e: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c870: 683b ldr r3, [r7, #0]
800c872: 781b ldrb r3, [r3, #0]
800c874: f003 0360 and.w r3, r3, #96 @ 0x60
800c878: 2b40 cmp r3, #64 @ 0x40
800c87a: d007 beq.n 800c88c <USBD_StdEPReq+0x30>
800c87c: 2b40 cmp r3, #64 @ 0x40
800c87e: f200 8146 bhi.w 800cb0e <USBD_StdEPReq+0x2b2>
800c882: 2b00 cmp r3, #0
800c884: d00a beq.n 800c89c <USBD_StdEPReq+0x40>
800c886: 2b20 cmp r3, #32
800c888: f040 8141 bne.w 800cb0e <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800c88c: 687b ldr r3, [r7, #4]
800c88e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c892: 689b ldr r3, [r3, #8]
800c894: 6839 ldr r1, [r7, #0]
800c896: 6878 ldr r0, [r7, #4]
800c898: 4798 blx r3
break;
800c89a: e13d b.n 800cb18 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800c89c: 683b ldr r3, [r7, #0]
800c89e: 781b ldrb r3, [r3, #0]
800c8a0: f003 0360 and.w r3, r3, #96 @ 0x60
800c8a4: 2b20 cmp r3, #32
800c8a6: d10a bne.n 800c8be <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800c8a8: 687b ldr r3, [r7, #4]
800c8aa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c8ae: 689b ldr r3, [r3, #8]
800c8b0: 6839 ldr r1, [r7, #0]
800c8b2: 6878 ldr r0, [r7, #4]
800c8b4: 4798 blx r3
800c8b6: 4603 mov r3, r0
800c8b8: 73fb strb r3, [r7, #15]
return ret;
800c8ba: 7bfb ldrb r3, [r7, #15]
800c8bc: e12d b.n 800cb1a <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800c8be: 683b ldr r3, [r7, #0]
800c8c0: 785b ldrb r3, [r3, #1]
800c8c2: 2b03 cmp r3, #3
800c8c4: d007 beq.n 800c8d6 <USBD_StdEPReq+0x7a>
800c8c6: 2b03 cmp r3, #3
800c8c8: f300 811b bgt.w 800cb02 <USBD_StdEPReq+0x2a6>
800c8cc: 2b00 cmp r3, #0
800c8ce: d072 beq.n 800c9b6 <USBD_StdEPReq+0x15a>
800c8d0: 2b01 cmp r3, #1
800c8d2: d03a beq.n 800c94a <USBD_StdEPReq+0xee>
800c8d4: e115 b.n 800cb02 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800c8d6: 687b ldr r3, [r7, #4]
800c8d8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c8dc: 2b02 cmp r3, #2
800c8de: d002 beq.n 800c8e6 <USBD_StdEPReq+0x8a>
800c8e0: 2b03 cmp r3, #3
800c8e2: d015 beq.n 800c910 <USBD_StdEPReq+0xb4>
800c8e4: e02b b.n 800c93e <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c8e6: 7bbb ldrb r3, [r7, #14]
800c8e8: 2b00 cmp r3, #0
800c8ea: d00c beq.n 800c906 <USBD_StdEPReq+0xaa>
800c8ec: 7bbb ldrb r3, [r7, #14]
800c8ee: 2b80 cmp r3, #128 @ 0x80
800c8f0: d009 beq.n 800c906 <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800c8f2: 7bbb ldrb r3, [r7, #14]
800c8f4: 4619 mov r1, r3
800c8f6: 6878 ldr r0, [r7, #4]
800c8f8: f001 f8fe bl 800daf8 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800c8fc: 2180 movs r1, #128 @ 0x80
800c8fe: 6878 ldr r0, [r7, #4]
800c900: f001 f8fa bl 800daf8 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c904: e020 b.n 800c948 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800c906: 6839 ldr r1, [r7, #0]
800c908: 6878 ldr r0, [r7, #4]
800c90a: f000 fc1b bl 800d144 <USBD_CtlError>
break;
800c90e: e01b b.n 800c948 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800c910: 683b ldr r3, [r7, #0]
800c912: 885b ldrh r3, [r3, #2]
800c914: 2b00 cmp r3, #0
800c916: d10e bne.n 800c936 <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800c918: 7bbb ldrb r3, [r7, #14]
800c91a: 2b00 cmp r3, #0
800c91c: d00b beq.n 800c936 <USBD_StdEPReq+0xda>
800c91e: 7bbb ldrb r3, [r7, #14]
800c920: 2b80 cmp r3, #128 @ 0x80
800c922: d008 beq.n 800c936 <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800c924: 683b ldr r3, [r7, #0]
800c926: 88db ldrh r3, [r3, #6]
800c928: 2b00 cmp r3, #0
800c92a: d104 bne.n 800c936 <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
800c92c: 7bbb ldrb r3, [r7, #14]
800c92e: 4619 mov r1, r3
800c930: 6878 ldr r0, [r7, #4]
800c932: f001 f8e1 bl 800daf8 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800c936: 6878 ldr r0, [r7, #4]
800c938: f000 fccc bl 800d2d4 <USBD_CtlSendStatus>
break;
800c93c: e004 b.n 800c948 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
800c93e: 6839 ldr r1, [r7, #0]
800c940: 6878 ldr r0, [r7, #4]
800c942: f000 fbff bl 800d144 <USBD_CtlError>
break;
800c946: bf00 nop
}
break;
800c948: e0e0 b.n 800cb0c <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800c94a: 687b ldr r3, [r7, #4]
800c94c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c950: 2b02 cmp r3, #2
800c952: d002 beq.n 800c95a <USBD_StdEPReq+0xfe>
800c954: 2b03 cmp r3, #3
800c956: d015 beq.n 800c984 <USBD_StdEPReq+0x128>
800c958: e026 b.n 800c9a8 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c95a: 7bbb ldrb r3, [r7, #14]
800c95c: 2b00 cmp r3, #0
800c95e: d00c beq.n 800c97a <USBD_StdEPReq+0x11e>
800c960: 7bbb ldrb r3, [r7, #14]
800c962: 2b80 cmp r3, #128 @ 0x80
800c964: d009 beq.n 800c97a <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
800c966: 7bbb ldrb r3, [r7, #14]
800c968: 4619 mov r1, r3
800c96a: 6878 ldr r0, [r7, #4]
800c96c: f001 f8c4 bl 800daf8 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800c970: 2180 movs r1, #128 @ 0x80
800c972: 6878 ldr r0, [r7, #4]
800c974: f001 f8c0 bl 800daf8 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c978: e01c b.n 800c9b4 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800c97a: 6839 ldr r1, [r7, #0]
800c97c: 6878 ldr r0, [r7, #4]
800c97e: f000 fbe1 bl 800d144 <USBD_CtlError>
break;
800c982: e017 b.n 800c9b4 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800c984: 683b ldr r3, [r7, #0]
800c986: 885b ldrh r3, [r3, #2]
800c988: 2b00 cmp r3, #0
800c98a: d112 bne.n 800c9b2 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800c98c: 7bbb ldrb r3, [r7, #14]
800c98e: f003 037f and.w r3, r3, #127 @ 0x7f
800c992: 2b00 cmp r3, #0
800c994: d004 beq.n 800c9a0 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800c996: 7bbb ldrb r3, [r7, #14]
800c998: 4619 mov r1, r3
800c99a: 6878 ldr r0, [r7, #4]
800c99c: f001 f8cb bl 800db36 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
800c9a0: 6878 ldr r0, [r7, #4]
800c9a2: f000 fc97 bl 800d2d4 <USBD_CtlSendStatus>
}
break;
800c9a6: e004 b.n 800c9b2 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800c9a8: 6839 ldr r1, [r7, #0]
800c9aa: 6878 ldr r0, [r7, #4]
800c9ac: f000 fbca bl 800d144 <USBD_CtlError>
break;
800c9b0: e000 b.n 800c9b4 <USBD_StdEPReq+0x158>
break;
800c9b2: bf00 nop
}
break;
800c9b4: e0aa b.n 800cb0c <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800c9b6: 687b ldr r3, [r7, #4]
800c9b8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c9bc: 2b02 cmp r3, #2
800c9be: d002 beq.n 800c9c6 <USBD_StdEPReq+0x16a>
800c9c0: 2b03 cmp r3, #3
800c9c2: d032 beq.n 800ca2a <USBD_StdEPReq+0x1ce>
800c9c4: e097 b.n 800caf6 <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c9c6: 7bbb ldrb r3, [r7, #14]
800c9c8: 2b00 cmp r3, #0
800c9ca: d007 beq.n 800c9dc <USBD_StdEPReq+0x180>
800c9cc: 7bbb ldrb r3, [r7, #14]
800c9ce: 2b80 cmp r3, #128 @ 0x80
800c9d0: d004 beq.n 800c9dc <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800c9d2: 6839 ldr r1, [r7, #0]
800c9d4: 6878 ldr r0, [r7, #4]
800c9d6: f000 fbb5 bl 800d144 <USBD_CtlError>
break;
800c9da: e091 b.n 800cb00 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800c9dc: f997 300e ldrsb.w r3, [r7, #14]
800c9e0: 2b00 cmp r3, #0
800c9e2: da0b bge.n 800c9fc <USBD_StdEPReq+0x1a0>
800c9e4: 7bbb ldrb r3, [r7, #14]
800c9e6: f003 027f and.w r2, r3, #127 @ 0x7f
800c9ea: 4613 mov r3, r2
800c9ec: 009b lsls r3, r3, #2
800c9ee: 4413 add r3, r2
800c9f0: 009b lsls r3, r3, #2
800c9f2: 3310 adds r3, #16
800c9f4: 687a ldr r2, [r7, #4]
800c9f6: 4413 add r3, r2
800c9f8: 3304 adds r3, #4
800c9fa: e00b b.n 800ca14 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
800c9fc: 7bbb ldrb r3, [r7, #14]
800c9fe: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800ca02: 4613 mov r3, r2
800ca04: 009b lsls r3, r3, #2
800ca06: 4413 add r3, r2
800ca08: 009b lsls r3, r3, #2
800ca0a: f503 73a8 add.w r3, r3, #336 @ 0x150
800ca0e: 687a ldr r2, [r7, #4]
800ca10: 4413 add r3, r2
800ca12: 3304 adds r3, #4
800ca14: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800ca16: 68bb ldr r3, [r7, #8]
800ca18: 2200 movs r2, #0
800ca1a: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800ca1c: 68bb ldr r3, [r7, #8]
800ca1e: 2202 movs r2, #2
800ca20: 4619 mov r1, r3
800ca22: 6878 ldr r0, [r7, #4]
800ca24: f000 fbf8 bl 800d218 <USBD_CtlSendData>
break;
800ca28: e06a b.n 800cb00 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800ca2a: f997 300e ldrsb.w r3, [r7, #14]
800ca2e: 2b00 cmp r3, #0
800ca30: da11 bge.n 800ca56 <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800ca32: 7bbb ldrb r3, [r7, #14]
800ca34: f003 020f and.w r2, r3, #15
800ca38: 6879 ldr r1, [r7, #4]
800ca3a: 4613 mov r3, r2
800ca3c: 009b lsls r3, r3, #2
800ca3e: 4413 add r3, r2
800ca40: 009b lsls r3, r3, #2
800ca42: 440b add r3, r1
800ca44: 3318 adds r3, #24
800ca46: 681b ldr r3, [r3, #0]
800ca48: 2b00 cmp r3, #0
800ca4a: d117 bne.n 800ca7c <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800ca4c: 6839 ldr r1, [r7, #0]
800ca4e: 6878 ldr r0, [r7, #4]
800ca50: f000 fb78 bl 800d144 <USBD_CtlError>
break;
800ca54: e054 b.n 800cb00 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800ca56: 7bbb ldrb r3, [r7, #14]
800ca58: f003 020f and.w r2, r3, #15
800ca5c: 6879 ldr r1, [r7, #4]
800ca5e: 4613 mov r3, r2
800ca60: 009b lsls r3, r3, #2
800ca62: 4413 add r3, r2
800ca64: 009b lsls r3, r3, #2
800ca66: 440b add r3, r1
800ca68: f503 73ac add.w r3, r3, #344 @ 0x158
800ca6c: 681b ldr r3, [r3, #0]
800ca6e: 2b00 cmp r3, #0
800ca70: d104 bne.n 800ca7c <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800ca72: 6839 ldr r1, [r7, #0]
800ca74: 6878 ldr r0, [r7, #4]
800ca76: f000 fb65 bl 800d144 <USBD_CtlError>
break;
800ca7a: e041 b.n 800cb00 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800ca7c: f997 300e ldrsb.w r3, [r7, #14]
800ca80: 2b00 cmp r3, #0
800ca82: da0b bge.n 800ca9c <USBD_StdEPReq+0x240>
800ca84: 7bbb ldrb r3, [r7, #14]
800ca86: f003 027f and.w r2, r3, #127 @ 0x7f
800ca8a: 4613 mov r3, r2
800ca8c: 009b lsls r3, r3, #2
800ca8e: 4413 add r3, r2
800ca90: 009b lsls r3, r3, #2
800ca92: 3310 adds r3, #16
800ca94: 687a ldr r2, [r7, #4]
800ca96: 4413 add r3, r2
800ca98: 3304 adds r3, #4
800ca9a: e00b b.n 800cab4 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800ca9c: 7bbb ldrb r3, [r7, #14]
800ca9e: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800caa2: 4613 mov r3, r2
800caa4: 009b lsls r3, r3, #2
800caa6: 4413 add r3, r2
800caa8: 009b lsls r3, r3, #2
800caaa: f503 73a8 add.w r3, r3, #336 @ 0x150
800caae: 687a ldr r2, [r7, #4]
800cab0: 4413 add r3, r2
800cab2: 3304 adds r3, #4
800cab4: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800cab6: 7bbb ldrb r3, [r7, #14]
800cab8: 2b00 cmp r3, #0
800caba: d002 beq.n 800cac2 <USBD_StdEPReq+0x266>
800cabc: 7bbb ldrb r3, [r7, #14]
800cabe: 2b80 cmp r3, #128 @ 0x80
800cac0: d103 bne.n 800caca <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800cac2: 68bb ldr r3, [r7, #8]
800cac4: 2200 movs r2, #0
800cac6: 601a str r2, [r3, #0]
800cac8: e00e b.n 800cae8 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800caca: 7bbb ldrb r3, [r7, #14]
800cacc: 4619 mov r1, r3
800cace: 6878 ldr r0, [r7, #4]
800cad0: f001 f850 bl 800db74 <USBD_LL_IsStallEP>
800cad4: 4603 mov r3, r0
800cad6: 2b00 cmp r3, #0
800cad8: d003 beq.n 800cae2 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800cada: 68bb ldr r3, [r7, #8]
800cadc: 2201 movs r2, #1
800cade: 601a str r2, [r3, #0]
800cae0: e002 b.n 800cae8 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800cae2: 68bb ldr r3, [r7, #8]
800cae4: 2200 movs r2, #0
800cae6: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800cae8: 68bb ldr r3, [r7, #8]
800caea: 2202 movs r2, #2
800caec: 4619 mov r1, r3
800caee: 6878 ldr r0, [r7, #4]
800caf0: f000 fb92 bl 800d218 <USBD_CtlSendData>
break;
800caf4: e004 b.n 800cb00 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800caf6: 6839 ldr r1, [r7, #0]
800caf8: 6878 ldr r0, [r7, #4]
800cafa: f000 fb23 bl 800d144 <USBD_CtlError>
break;
800cafe: bf00 nop
}
break;
800cb00: e004 b.n 800cb0c <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800cb02: 6839 ldr r1, [r7, #0]
800cb04: 6878 ldr r0, [r7, #4]
800cb06: f000 fb1d bl 800d144 <USBD_CtlError>
break;
800cb0a: bf00 nop
}
break;
800cb0c: e004 b.n 800cb18 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
800cb0e: 6839 ldr r1, [r7, #0]
800cb10: 6878 ldr r0, [r7, #4]
800cb12: f000 fb17 bl 800d144 <USBD_CtlError>
break;
800cb16: bf00 nop
}
return ret;
800cb18: 7bfb ldrb r3, [r7, #15]
}
800cb1a: 4618 mov r0, r3
800cb1c: 3710 adds r7, #16
800cb1e: 46bd mov sp, r7
800cb20: bd80 pop {r7, pc}
...
0800cb24 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cb24: b580 push {r7, lr}
800cb26: b084 sub sp, #16
800cb28: af00 add r7, sp, #0
800cb2a: 6078 str r0, [r7, #4]
800cb2c: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800cb2e: 2300 movs r3, #0
800cb30: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800cb32: 2300 movs r3, #0
800cb34: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800cb36: 2300 movs r3, #0
800cb38: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800cb3a: 683b ldr r3, [r7, #0]
800cb3c: 885b ldrh r3, [r3, #2]
800cb3e: 0a1b lsrs r3, r3, #8
800cb40: b29b uxth r3, r3
800cb42: 3b01 subs r3, #1
800cb44: 2b06 cmp r3, #6
800cb46: f200 8128 bhi.w 800cd9a <USBD_GetDescriptor+0x276>
800cb4a: a201 add r2, pc, #4 @ (adr r2, 800cb50 <USBD_GetDescriptor+0x2c>)
800cb4c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800cb50: 0800cb6d .word 0x0800cb6d
800cb54: 0800cb85 .word 0x0800cb85
800cb58: 0800cbc5 .word 0x0800cbc5
800cb5c: 0800cd9b .word 0x0800cd9b
800cb60: 0800cd9b .word 0x0800cd9b
800cb64: 0800cd3b .word 0x0800cd3b
800cb68: 0800cd67 .word 0x0800cd67
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800cb6c: 687b ldr r3, [r7, #4]
800cb6e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cb72: 681b ldr r3, [r3, #0]
800cb74: 687a ldr r2, [r7, #4]
800cb76: 7c12 ldrb r2, [r2, #16]
800cb78: f107 0108 add.w r1, r7, #8
800cb7c: 4610 mov r0, r2
800cb7e: 4798 blx r3
800cb80: 60f8 str r0, [r7, #12]
break;
800cb82: e112 b.n 800cdaa <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800cb84: 687b ldr r3, [r7, #4]
800cb86: 7c1b ldrb r3, [r3, #16]
800cb88: 2b00 cmp r3, #0
800cb8a: d10d bne.n 800cba8 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800cb8c: 687b ldr r3, [r7, #4]
800cb8e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb92: 6a9b ldr r3, [r3, #40] @ 0x28
800cb94: f107 0208 add.w r2, r7, #8
800cb98: 4610 mov r0, r2
800cb9a: 4798 blx r3
800cb9c: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800cb9e: 68fb ldr r3, [r7, #12]
800cba0: 3301 adds r3, #1
800cba2: 2202 movs r2, #2
800cba4: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800cba6: e100 b.n 800cdaa <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800cba8: 687b ldr r3, [r7, #4]
800cbaa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cbae: 6adb ldr r3, [r3, #44] @ 0x2c
800cbb0: f107 0208 add.w r2, r7, #8
800cbb4: 4610 mov r0, r2
800cbb6: 4798 blx r3
800cbb8: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800cbba: 68fb ldr r3, [r7, #12]
800cbbc: 3301 adds r3, #1
800cbbe: 2202 movs r2, #2
800cbc0: 701a strb r2, [r3, #0]
break;
800cbc2: e0f2 b.n 800cdaa <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800cbc4: 683b ldr r3, [r7, #0]
800cbc6: 885b ldrh r3, [r3, #2]
800cbc8: b2db uxtb r3, r3
800cbca: 2b05 cmp r3, #5
800cbcc: f200 80ac bhi.w 800cd28 <USBD_GetDescriptor+0x204>
800cbd0: a201 add r2, pc, #4 @ (adr r2, 800cbd8 <USBD_GetDescriptor+0xb4>)
800cbd2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800cbd6: bf00 nop
800cbd8: 0800cbf1 .word 0x0800cbf1
800cbdc: 0800cc25 .word 0x0800cc25
800cbe0: 0800cc59 .word 0x0800cc59
800cbe4: 0800cc8d .word 0x0800cc8d
800cbe8: 0800ccc1 .word 0x0800ccc1
800cbec: 0800ccf5 .word 0x0800ccf5
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800cbf0: 687b ldr r3, [r7, #4]
800cbf2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cbf6: 685b ldr r3, [r3, #4]
800cbf8: 2b00 cmp r3, #0
800cbfa: d00b beq.n 800cc14 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800cbfc: 687b ldr r3, [r7, #4]
800cbfe: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc02: 685b ldr r3, [r3, #4]
800cc04: 687a ldr r2, [r7, #4]
800cc06: 7c12 ldrb r2, [r2, #16]
800cc08: f107 0108 add.w r1, r7, #8
800cc0c: 4610 mov r0, r2
800cc0e: 4798 blx r3
800cc10: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cc12: e091 b.n 800cd38 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cc14: 6839 ldr r1, [r7, #0]
800cc16: 6878 ldr r0, [r7, #4]
800cc18: f000 fa94 bl 800d144 <USBD_CtlError>
err++;
800cc1c: 7afb ldrb r3, [r7, #11]
800cc1e: 3301 adds r3, #1
800cc20: 72fb strb r3, [r7, #11]
break;
800cc22: e089 b.n 800cd38 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800cc24: 687b ldr r3, [r7, #4]
800cc26: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc2a: 689b ldr r3, [r3, #8]
800cc2c: 2b00 cmp r3, #0
800cc2e: d00b beq.n 800cc48 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800cc30: 687b ldr r3, [r7, #4]
800cc32: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc36: 689b ldr r3, [r3, #8]
800cc38: 687a ldr r2, [r7, #4]
800cc3a: 7c12 ldrb r2, [r2, #16]
800cc3c: f107 0108 add.w r1, r7, #8
800cc40: 4610 mov r0, r2
800cc42: 4798 blx r3
800cc44: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cc46: e077 b.n 800cd38 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cc48: 6839 ldr r1, [r7, #0]
800cc4a: 6878 ldr r0, [r7, #4]
800cc4c: f000 fa7a bl 800d144 <USBD_CtlError>
err++;
800cc50: 7afb ldrb r3, [r7, #11]
800cc52: 3301 adds r3, #1
800cc54: 72fb strb r3, [r7, #11]
break;
800cc56: e06f b.n 800cd38 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800cc58: 687b ldr r3, [r7, #4]
800cc5a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc5e: 68db ldr r3, [r3, #12]
800cc60: 2b00 cmp r3, #0
800cc62: d00b beq.n 800cc7c <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800cc64: 687b ldr r3, [r7, #4]
800cc66: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc6a: 68db ldr r3, [r3, #12]
800cc6c: 687a ldr r2, [r7, #4]
800cc6e: 7c12 ldrb r2, [r2, #16]
800cc70: f107 0108 add.w r1, r7, #8
800cc74: 4610 mov r0, r2
800cc76: 4798 blx r3
800cc78: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cc7a: e05d b.n 800cd38 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cc7c: 6839 ldr r1, [r7, #0]
800cc7e: 6878 ldr r0, [r7, #4]
800cc80: f000 fa60 bl 800d144 <USBD_CtlError>
err++;
800cc84: 7afb ldrb r3, [r7, #11]
800cc86: 3301 adds r3, #1
800cc88: 72fb strb r3, [r7, #11]
break;
800cc8a: e055 b.n 800cd38 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800cc8c: 687b ldr r3, [r7, #4]
800cc8e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc92: 691b ldr r3, [r3, #16]
800cc94: 2b00 cmp r3, #0
800cc96: d00b beq.n 800ccb0 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800cc98: 687b ldr r3, [r7, #4]
800cc9a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc9e: 691b ldr r3, [r3, #16]
800cca0: 687a ldr r2, [r7, #4]
800cca2: 7c12 ldrb r2, [r2, #16]
800cca4: f107 0108 add.w r1, r7, #8
800cca8: 4610 mov r0, r2
800ccaa: 4798 blx r3
800ccac: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800ccae: e043 b.n 800cd38 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800ccb0: 6839 ldr r1, [r7, #0]
800ccb2: 6878 ldr r0, [r7, #4]
800ccb4: f000 fa46 bl 800d144 <USBD_CtlError>
err++;
800ccb8: 7afb ldrb r3, [r7, #11]
800ccba: 3301 adds r3, #1
800ccbc: 72fb strb r3, [r7, #11]
break;
800ccbe: e03b b.n 800cd38 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800ccc0: 687b ldr r3, [r7, #4]
800ccc2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800ccc6: 695b ldr r3, [r3, #20]
800ccc8: 2b00 cmp r3, #0
800ccca: d00b beq.n 800cce4 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800cccc: 687b ldr r3, [r7, #4]
800ccce: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800ccd2: 695b ldr r3, [r3, #20]
800ccd4: 687a ldr r2, [r7, #4]
800ccd6: 7c12 ldrb r2, [r2, #16]
800ccd8: f107 0108 add.w r1, r7, #8
800ccdc: 4610 mov r0, r2
800ccde: 4798 blx r3
800cce0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cce2: e029 b.n 800cd38 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cce4: 6839 ldr r1, [r7, #0]
800cce6: 6878 ldr r0, [r7, #4]
800cce8: f000 fa2c bl 800d144 <USBD_CtlError>
err++;
800ccec: 7afb ldrb r3, [r7, #11]
800ccee: 3301 adds r3, #1
800ccf0: 72fb strb r3, [r7, #11]
break;
800ccf2: e021 b.n 800cd38 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800ccf4: 687b ldr r3, [r7, #4]
800ccf6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800ccfa: 699b ldr r3, [r3, #24]
800ccfc: 2b00 cmp r3, #0
800ccfe: d00b beq.n 800cd18 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800cd00: 687b ldr r3, [r7, #4]
800cd02: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cd06: 699b ldr r3, [r3, #24]
800cd08: 687a ldr r2, [r7, #4]
800cd0a: 7c12 ldrb r2, [r2, #16]
800cd0c: f107 0108 add.w r1, r7, #8
800cd10: 4610 mov r0, r2
800cd12: 4798 blx r3
800cd14: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cd16: e00f b.n 800cd38 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cd18: 6839 ldr r1, [r7, #0]
800cd1a: 6878 ldr r0, [r7, #4]
800cd1c: f000 fa12 bl 800d144 <USBD_CtlError>
err++;
800cd20: 7afb ldrb r3, [r7, #11]
800cd22: 3301 adds r3, #1
800cd24: 72fb strb r3, [r7, #11]
break;
800cd26: e007 b.n 800cd38 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
800cd28: 6839 ldr r1, [r7, #0]
800cd2a: 6878 ldr r0, [r7, #4]
800cd2c: f000 fa0a bl 800d144 <USBD_CtlError>
err++;
800cd30: 7afb ldrb r3, [r7, #11]
800cd32: 3301 adds r3, #1
800cd34: 72fb strb r3, [r7, #11]
#endif
}
break;
800cd36: e038 b.n 800cdaa <USBD_GetDescriptor+0x286>
800cd38: e037 b.n 800cdaa <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800cd3a: 687b ldr r3, [r7, #4]
800cd3c: 7c1b ldrb r3, [r3, #16]
800cd3e: 2b00 cmp r3, #0
800cd40: d109 bne.n 800cd56 <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800cd42: 687b ldr r3, [r7, #4]
800cd44: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd48: 6b5b ldr r3, [r3, #52] @ 0x34
800cd4a: f107 0208 add.w r2, r7, #8
800cd4e: 4610 mov r0, r2
800cd50: 4798 blx r3
800cd52: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cd54: e029 b.n 800cdaa <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800cd56: 6839 ldr r1, [r7, #0]
800cd58: 6878 ldr r0, [r7, #4]
800cd5a: f000 f9f3 bl 800d144 <USBD_CtlError>
err++;
800cd5e: 7afb ldrb r3, [r7, #11]
800cd60: 3301 adds r3, #1
800cd62: 72fb strb r3, [r7, #11]
break;
800cd64: e021 b.n 800cdaa <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800cd66: 687b ldr r3, [r7, #4]
800cd68: 7c1b ldrb r3, [r3, #16]
800cd6a: 2b00 cmp r3, #0
800cd6c: d10d bne.n 800cd8a <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800cd6e: 687b ldr r3, [r7, #4]
800cd70: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd74: 6b1b ldr r3, [r3, #48] @ 0x30
800cd76: f107 0208 add.w r2, r7, #8
800cd7a: 4610 mov r0, r2
800cd7c: 4798 blx r3
800cd7e: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800cd80: 68fb ldr r3, [r7, #12]
800cd82: 3301 adds r3, #1
800cd84: 2207 movs r2, #7
800cd86: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cd88: e00f b.n 800cdaa <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800cd8a: 6839 ldr r1, [r7, #0]
800cd8c: 6878 ldr r0, [r7, #4]
800cd8e: f000 f9d9 bl 800d144 <USBD_CtlError>
err++;
800cd92: 7afb ldrb r3, [r7, #11]
800cd94: 3301 adds r3, #1
800cd96: 72fb strb r3, [r7, #11]
break;
800cd98: e007 b.n 800cdaa <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800cd9a: 6839 ldr r1, [r7, #0]
800cd9c: 6878 ldr r0, [r7, #4]
800cd9e: f000 f9d1 bl 800d144 <USBD_CtlError>
err++;
800cda2: 7afb ldrb r3, [r7, #11]
800cda4: 3301 adds r3, #1
800cda6: 72fb strb r3, [r7, #11]
break;
800cda8: bf00 nop
}
if (err != 0U)
800cdaa: 7afb ldrb r3, [r7, #11]
800cdac: 2b00 cmp r3, #0
800cdae: d11c bne.n 800cdea <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800cdb0: 893b ldrh r3, [r7, #8]
800cdb2: 2b00 cmp r3, #0
800cdb4: d011 beq.n 800cdda <USBD_GetDescriptor+0x2b6>
800cdb6: 683b ldr r3, [r7, #0]
800cdb8: 88db ldrh r3, [r3, #6]
800cdba: 2b00 cmp r3, #0
800cdbc: d00d beq.n 800cdda <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800cdbe: 683b ldr r3, [r7, #0]
800cdc0: 88da ldrh r2, [r3, #6]
800cdc2: 893b ldrh r3, [r7, #8]
800cdc4: 4293 cmp r3, r2
800cdc6: bf28 it cs
800cdc8: 4613 movcs r3, r2
800cdca: b29b uxth r3, r3
800cdcc: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800cdce: 893b ldrh r3, [r7, #8]
800cdd0: 461a mov r2, r3
800cdd2: 68f9 ldr r1, [r7, #12]
800cdd4: 6878 ldr r0, [r7, #4]
800cdd6: f000 fa1f bl 800d218 <USBD_CtlSendData>
}
if (req->wLength == 0U)
800cdda: 683b ldr r3, [r7, #0]
800cddc: 88db ldrh r3, [r3, #6]
800cdde: 2b00 cmp r3, #0
800cde0: d104 bne.n 800cdec <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800cde2: 6878 ldr r0, [r7, #4]
800cde4: f000 fa76 bl 800d2d4 <USBD_CtlSendStatus>
800cde8: e000 b.n 800cdec <USBD_GetDescriptor+0x2c8>
return;
800cdea: bf00 nop
}
}
}
800cdec: 3710 adds r7, #16
800cdee: 46bd mov sp, r7
800cdf0: bd80 pop {r7, pc}
800cdf2: bf00 nop
0800cdf4 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cdf4: b580 push {r7, lr}
800cdf6: b084 sub sp, #16
800cdf8: af00 add r7, sp, #0
800cdfa: 6078 str r0, [r7, #4]
800cdfc: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800cdfe: 683b ldr r3, [r7, #0]
800ce00: 889b ldrh r3, [r3, #4]
800ce02: 2b00 cmp r3, #0
800ce04: d130 bne.n 800ce68 <USBD_SetAddress+0x74>
800ce06: 683b ldr r3, [r7, #0]
800ce08: 88db ldrh r3, [r3, #6]
800ce0a: 2b00 cmp r3, #0
800ce0c: d12c bne.n 800ce68 <USBD_SetAddress+0x74>
800ce0e: 683b ldr r3, [r7, #0]
800ce10: 885b ldrh r3, [r3, #2]
800ce12: 2b7f cmp r3, #127 @ 0x7f
800ce14: d828 bhi.n 800ce68 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800ce16: 683b ldr r3, [r7, #0]
800ce18: 885b ldrh r3, [r3, #2]
800ce1a: b2db uxtb r3, r3
800ce1c: f003 037f and.w r3, r3, #127 @ 0x7f
800ce20: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce22: 687b ldr r3, [r7, #4]
800ce24: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800ce28: 2b03 cmp r3, #3
800ce2a: d104 bne.n 800ce36 <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
800ce2c: 6839 ldr r1, [r7, #0]
800ce2e: 6878 ldr r0, [r7, #4]
800ce30: f000 f988 bl 800d144 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce34: e01d b.n 800ce72 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800ce36: 687b ldr r3, [r7, #4]
800ce38: 7bfa ldrb r2, [r7, #15]
800ce3a: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
800ce3e: 7bfb ldrb r3, [r7, #15]
800ce40: 4619 mov r1, r3
800ce42: 6878 ldr r0, [r7, #4]
800ce44: f000 fec1 bl 800dbca <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800ce48: 6878 ldr r0, [r7, #4]
800ce4a: f000 fa43 bl 800d2d4 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800ce4e: 7bfb ldrb r3, [r7, #15]
800ce50: 2b00 cmp r3, #0
800ce52: d004 beq.n 800ce5e <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800ce54: 687b ldr r3, [r7, #4]
800ce56: 2202 movs r2, #2
800ce58: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce5c: e009 b.n 800ce72 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800ce5e: 687b ldr r3, [r7, #4]
800ce60: 2201 movs r2, #1
800ce62: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce66: e004 b.n 800ce72 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
800ce68: 6839 ldr r1, [r7, #0]
800ce6a: 6878 ldr r0, [r7, #4]
800ce6c: f000 f96a bl 800d144 <USBD_CtlError>
}
}
800ce70: bf00 nop
800ce72: bf00 nop
800ce74: 3710 adds r7, #16
800ce76: 46bd mov sp, r7
800ce78: bd80 pop {r7, pc}
...
0800ce7c <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800ce7c: b580 push {r7, lr}
800ce7e: b082 sub sp, #8
800ce80: af00 add r7, sp, #0
800ce82: 6078 str r0, [r7, #4]
800ce84: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800ce86: 683b ldr r3, [r7, #0]
800ce88: 885b ldrh r3, [r3, #2]
800ce8a: b2da uxtb r2, r3
800ce8c: 4b41 ldr r3, [pc, #260] @ (800cf94 <USBD_SetConfig+0x118>)
800ce8e: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800ce90: 4b40 ldr r3, [pc, #256] @ (800cf94 <USBD_SetConfig+0x118>)
800ce92: 781b ldrb r3, [r3, #0]
800ce94: 2b01 cmp r3, #1
800ce96: d904 bls.n 800cea2 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800ce98: 6839 ldr r1, [r7, #0]
800ce9a: 6878 ldr r0, [r7, #4]
800ce9c: f000 f952 bl 800d144 <USBD_CtlError>
800cea0: e075 b.n 800cf8e <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800cea2: 687b ldr r3, [r7, #4]
800cea4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cea8: 2b02 cmp r3, #2
800ceaa: d002 beq.n 800ceb2 <USBD_SetConfig+0x36>
800ceac: 2b03 cmp r3, #3
800ceae: d023 beq.n 800cef8 <USBD_SetConfig+0x7c>
800ceb0: e062 b.n 800cf78 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800ceb2: 4b38 ldr r3, [pc, #224] @ (800cf94 <USBD_SetConfig+0x118>)
800ceb4: 781b ldrb r3, [r3, #0]
800ceb6: 2b00 cmp r3, #0
800ceb8: d01a beq.n 800cef0 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800ceba: 4b36 ldr r3, [pc, #216] @ (800cf94 <USBD_SetConfig+0x118>)
800cebc: 781b ldrb r3, [r3, #0]
800cebe: 461a mov r2, r3
800cec0: 687b ldr r3, [r7, #4]
800cec2: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800cec4: 687b ldr r3, [r7, #4]
800cec6: 2203 movs r2, #3
800cec8: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800cecc: 4b31 ldr r3, [pc, #196] @ (800cf94 <USBD_SetConfig+0x118>)
800cece: 781b ldrb r3, [r3, #0]
800ced0: 4619 mov r1, r3
800ced2: 6878 ldr r0, [r7, #4]
800ced4: f7ff f9e7 bl 800c2a6 <USBD_SetClassConfig>
800ced8: 4603 mov r3, r0
800ceda: 2b02 cmp r3, #2
800cedc: d104 bne.n 800cee8 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800cede: 6839 ldr r1, [r7, #0]
800cee0: 6878 ldr r0, [r7, #4]
800cee2: f000 f92f bl 800d144 <USBD_CtlError>
return;
800cee6: e052 b.n 800cf8e <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800cee8: 6878 ldr r0, [r7, #4]
800ceea: f000 f9f3 bl 800d2d4 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800ceee: e04e b.n 800cf8e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800cef0: 6878 ldr r0, [r7, #4]
800cef2: f000 f9ef bl 800d2d4 <USBD_CtlSendStatus>
break;
800cef6: e04a b.n 800cf8e <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800cef8: 4b26 ldr r3, [pc, #152] @ (800cf94 <USBD_SetConfig+0x118>)
800cefa: 781b ldrb r3, [r3, #0]
800cefc: 2b00 cmp r3, #0
800cefe: d112 bne.n 800cf26 <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800cf00: 687b ldr r3, [r7, #4]
800cf02: 2202 movs r2, #2
800cf04: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800cf08: 4b22 ldr r3, [pc, #136] @ (800cf94 <USBD_SetConfig+0x118>)
800cf0a: 781b ldrb r3, [r3, #0]
800cf0c: 461a mov r2, r3
800cf0e: 687b ldr r3, [r7, #4]
800cf10: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800cf12: 4b20 ldr r3, [pc, #128] @ (800cf94 <USBD_SetConfig+0x118>)
800cf14: 781b ldrb r3, [r3, #0]
800cf16: 4619 mov r1, r3
800cf18: 6878 ldr r0, [r7, #4]
800cf1a: f7ff f9e3 bl 800c2e4 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800cf1e: 6878 ldr r0, [r7, #4]
800cf20: f000 f9d8 bl 800d2d4 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800cf24: e033 b.n 800cf8e <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800cf26: 4b1b ldr r3, [pc, #108] @ (800cf94 <USBD_SetConfig+0x118>)
800cf28: 781b ldrb r3, [r3, #0]
800cf2a: 461a mov r2, r3
800cf2c: 687b ldr r3, [r7, #4]
800cf2e: 685b ldr r3, [r3, #4]
800cf30: 429a cmp r2, r3
800cf32: d01d beq.n 800cf70 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800cf34: 687b ldr r3, [r7, #4]
800cf36: 685b ldr r3, [r3, #4]
800cf38: b2db uxtb r3, r3
800cf3a: 4619 mov r1, r3
800cf3c: 6878 ldr r0, [r7, #4]
800cf3e: f7ff f9d1 bl 800c2e4 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800cf42: 4b14 ldr r3, [pc, #80] @ (800cf94 <USBD_SetConfig+0x118>)
800cf44: 781b ldrb r3, [r3, #0]
800cf46: 461a mov r2, r3
800cf48: 687b ldr r3, [r7, #4]
800cf4a: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800cf4c: 4b11 ldr r3, [pc, #68] @ (800cf94 <USBD_SetConfig+0x118>)
800cf4e: 781b ldrb r3, [r3, #0]
800cf50: 4619 mov r1, r3
800cf52: 6878 ldr r0, [r7, #4]
800cf54: f7ff f9a7 bl 800c2a6 <USBD_SetClassConfig>
800cf58: 4603 mov r3, r0
800cf5a: 2b02 cmp r3, #2
800cf5c: d104 bne.n 800cf68 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
800cf5e: 6839 ldr r1, [r7, #0]
800cf60: 6878 ldr r0, [r7, #4]
800cf62: f000 f8ef bl 800d144 <USBD_CtlError>
return;
800cf66: e012 b.n 800cf8e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800cf68: 6878 ldr r0, [r7, #4]
800cf6a: f000 f9b3 bl 800d2d4 <USBD_CtlSendStatus>
break;
800cf6e: e00e b.n 800cf8e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800cf70: 6878 ldr r0, [r7, #4]
800cf72: f000 f9af bl 800d2d4 <USBD_CtlSendStatus>
break;
800cf76: e00a b.n 800cf8e <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
800cf78: 6839 ldr r1, [r7, #0]
800cf7a: 6878 ldr r0, [r7, #4]
800cf7c: f000 f8e2 bl 800d144 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
800cf80: 4b04 ldr r3, [pc, #16] @ (800cf94 <USBD_SetConfig+0x118>)
800cf82: 781b ldrb r3, [r3, #0]
800cf84: 4619 mov r1, r3
800cf86: 6878 ldr r0, [r7, #4]
800cf88: f7ff f9ac bl 800c2e4 <USBD_ClrClassConfig>
break;
800cf8c: bf00 nop
}
}
}
800cf8e: 3708 adds r7, #8
800cf90: 46bd mov sp, r7
800cf92: bd80 pop {r7, pc}
800cf94: 20000490 .word 0x20000490
0800cf98 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800cf98: b580 push {r7, lr}
800cf9a: b082 sub sp, #8
800cf9c: af00 add r7, sp, #0
800cf9e: 6078 str r0, [r7, #4]
800cfa0: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800cfa2: 683b ldr r3, [r7, #0]
800cfa4: 88db ldrh r3, [r3, #6]
800cfa6: 2b01 cmp r3, #1
800cfa8: d004 beq.n 800cfb4 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800cfaa: 6839 ldr r1, [r7, #0]
800cfac: 6878 ldr r0, [r7, #4]
800cfae: f000 f8c9 bl 800d144 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800cfb2: e022 b.n 800cffa <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800cfb4: 687b ldr r3, [r7, #4]
800cfb6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cfba: 2b02 cmp r3, #2
800cfbc: dc02 bgt.n 800cfc4 <USBD_GetConfig+0x2c>
800cfbe: 2b00 cmp r3, #0
800cfc0: dc03 bgt.n 800cfca <USBD_GetConfig+0x32>
800cfc2: e015 b.n 800cff0 <USBD_GetConfig+0x58>
800cfc4: 2b03 cmp r3, #3
800cfc6: d00b beq.n 800cfe0 <USBD_GetConfig+0x48>
800cfc8: e012 b.n 800cff0 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800cfca: 687b ldr r3, [r7, #4]
800cfcc: 2200 movs r2, #0
800cfce: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800cfd0: 687b ldr r3, [r7, #4]
800cfd2: 3308 adds r3, #8
800cfd4: 2201 movs r2, #1
800cfd6: 4619 mov r1, r3
800cfd8: 6878 ldr r0, [r7, #4]
800cfda: f000 f91d bl 800d218 <USBD_CtlSendData>
break;
800cfde: e00c b.n 800cffa <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800cfe0: 687b ldr r3, [r7, #4]
800cfe2: 3304 adds r3, #4
800cfe4: 2201 movs r2, #1
800cfe6: 4619 mov r1, r3
800cfe8: 6878 ldr r0, [r7, #4]
800cfea: f000 f915 bl 800d218 <USBD_CtlSendData>
break;
800cfee: e004 b.n 800cffa <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800cff0: 6839 ldr r1, [r7, #0]
800cff2: 6878 ldr r0, [r7, #4]
800cff4: f000 f8a6 bl 800d144 <USBD_CtlError>
break;
800cff8: bf00 nop
}
800cffa: bf00 nop
800cffc: 3708 adds r7, #8
800cffe: 46bd mov sp, r7
800d000: bd80 pop {r7, pc}
0800d002 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d002: b580 push {r7, lr}
800d004: b082 sub sp, #8
800d006: af00 add r7, sp, #0
800d008: 6078 str r0, [r7, #4]
800d00a: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d00c: 687b ldr r3, [r7, #4]
800d00e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d012: 3b01 subs r3, #1
800d014: 2b02 cmp r3, #2
800d016: d81e bhi.n 800d056 <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800d018: 683b ldr r3, [r7, #0]
800d01a: 88db ldrh r3, [r3, #6]
800d01c: 2b02 cmp r3, #2
800d01e: d004 beq.n 800d02a <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800d020: 6839 ldr r1, [r7, #0]
800d022: 6878 ldr r0, [r7, #4]
800d024: f000 f88e bl 800d144 <USBD_CtlError>
break;
800d028: e01a b.n 800d060 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800d02a: 687b ldr r3, [r7, #4]
800d02c: 2201 movs r2, #1
800d02e: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
800d030: 687b ldr r3, [r7, #4]
800d032: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800d036: 2b00 cmp r3, #0
800d038: d005 beq.n 800d046 <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800d03a: 687b ldr r3, [r7, #4]
800d03c: 68db ldr r3, [r3, #12]
800d03e: f043 0202 orr.w r2, r3, #2
800d042: 687b ldr r3, [r7, #4]
800d044: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800d046: 687b ldr r3, [r7, #4]
800d048: 330c adds r3, #12
800d04a: 2202 movs r2, #2
800d04c: 4619 mov r1, r3
800d04e: 6878 ldr r0, [r7, #4]
800d050: f000 f8e2 bl 800d218 <USBD_CtlSendData>
break;
800d054: e004 b.n 800d060 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800d056: 6839 ldr r1, [r7, #0]
800d058: 6878 ldr r0, [r7, #4]
800d05a: f000 f873 bl 800d144 <USBD_CtlError>
break;
800d05e: bf00 nop
}
}
800d060: bf00 nop
800d062: 3708 adds r7, #8
800d064: 46bd mov sp, r7
800d066: bd80 pop {r7, pc}
0800d068 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d068: b580 push {r7, lr}
800d06a: b082 sub sp, #8
800d06c: af00 add r7, sp, #0
800d06e: 6078 str r0, [r7, #4]
800d070: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d072: 683b ldr r3, [r7, #0]
800d074: 885b ldrh r3, [r3, #2]
800d076: 2b01 cmp r3, #1
800d078: d106 bne.n 800d088 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
800d07a: 687b ldr r3, [r7, #4]
800d07c: 2201 movs r2, #1
800d07e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d082: 6878 ldr r0, [r7, #4]
800d084: f000 f926 bl 800d2d4 <USBD_CtlSendStatus>
}
}
800d088: bf00 nop
800d08a: 3708 adds r7, #8
800d08c: 46bd mov sp, r7
800d08e: bd80 pop {r7, pc}
0800d090 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d090: b580 push {r7, lr}
800d092: b082 sub sp, #8
800d094: af00 add r7, sp, #0
800d096: 6078 str r0, [r7, #4]
800d098: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d09a: 687b ldr r3, [r7, #4]
800d09c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d0a0: 3b01 subs r3, #1
800d0a2: 2b02 cmp r3, #2
800d0a4: d80b bhi.n 800d0be <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d0a6: 683b ldr r3, [r7, #0]
800d0a8: 885b ldrh r3, [r3, #2]
800d0aa: 2b01 cmp r3, #1
800d0ac: d10c bne.n 800d0c8 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800d0ae: 687b ldr r3, [r7, #4]
800d0b0: 2200 movs r2, #0
800d0b2: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d0b6: 6878 ldr r0, [r7, #4]
800d0b8: f000 f90c bl 800d2d4 <USBD_CtlSendStatus>
}
break;
800d0bc: e004 b.n 800d0c8 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800d0be: 6839 ldr r1, [r7, #0]
800d0c0: 6878 ldr r0, [r7, #4]
800d0c2: f000 f83f bl 800d144 <USBD_CtlError>
break;
800d0c6: e000 b.n 800d0ca <USBD_ClrFeature+0x3a>
break;
800d0c8: bf00 nop
}
}
800d0ca: bf00 nop
800d0cc: 3708 adds r7, #8
800d0ce: 46bd mov sp, r7
800d0d0: bd80 pop {r7, pc}
0800d0d2 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800d0d2: b480 push {r7}
800d0d4: b083 sub sp, #12
800d0d6: af00 add r7, sp, #0
800d0d8: 6078 str r0, [r7, #4]
800d0da: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
800d0dc: 683b ldr r3, [r7, #0]
800d0de: 781a ldrb r2, [r3, #0]
800d0e0: 687b ldr r3, [r7, #4]
800d0e2: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800d0e4: 683b ldr r3, [r7, #0]
800d0e6: 785a ldrb r2, [r3, #1]
800d0e8: 687b ldr r3, [r7, #4]
800d0ea: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
800d0ec: 683b ldr r3, [r7, #0]
800d0ee: 3302 adds r3, #2
800d0f0: 781b ldrb r3, [r3, #0]
800d0f2: 461a mov r2, r3
800d0f4: 683b ldr r3, [r7, #0]
800d0f6: 3303 adds r3, #3
800d0f8: 781b ldrb r3, [r3, #0]
800d0fa: 021b lsls r3, r3, #8
800d0fc: b29b uxth r3, r3
800d0fe: 4413 add r3, r2
800d100: b29a uxth r2, r3
800d102: 687b ldr r3, [r7, #4]
800d104: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800d106: 683b ldr r3, [r7, #0]
800d108: 3304 adds r3, #4
800d10a: 781b ldrb r3, [r3, #0]
800d10c: 461a mov r2, r3
800d10e: 683b ldr r3, [r7, #0]
800d110: 3305 adds r3, #5
800d112: 781b ldrb r3, [r3, #0]
800d114: 021b lsls r3, r3, #8
800d116: b29b uxth r3, r3
800d118: 4413 add r3, r2
800d11a: b29a uxth r2, r3
800d11c: 687b ldr r3, [r7, #4]
800d11e: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800d120: 683b ldr r3, [r7, #0]
800d122: 3306 adds r3, #6
800d124: 781b ldrb r3, [r3, #0]
800d126: 461a mov r2, r3
800d128: 683b ldr r3, [r7, #0]
800d12a: 3307 adds r3, #7
800d12c: 781b ldrb r3, [r3, #0]
800d12e: 021b lsls r3, r3, #8
800d130: b29b uxth r3, r3
800d132: 4413 add r3, r2
800d134: b29a uxth r2, r3
800d136: 687b ldr r3, [r7, #4]
800d138: 80da strh r2, [r3, #6]
}
800d13a: bf00 nop
800d13c: 370c adds r7, #12
800d13e: 46bd mov sp, r7
800d140: bc80 pop {r7}
800d142: 4770 bx lr
0800d144 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d144: b580 push {r7, lr}
800d146: b082 sub sp, #8
800d148: af00 add r7, sp, #0
800d14a: 6078 str r0, [r7, #4]
800d14c: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
800d14e: 2180 movs r1, #128 @ 0x80
800d150: 6878 ldr r0, [r7, #4]
800d152: f000 fcd1 bl 800daf8 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800d156: 2100 movs r1, #0
800d158: 6878 ldr r0, [r7, #4]
800d15a: f000 fccd bl 800daf8 <USBD_LL_StallEP>
}
800d15e: bf00 nop
800d160: 3708 adds r7, #8
800d162: 46bd mov sp, r7
800d164: bd80 pop {r7, pc}
0800d166 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800d166: b580 push {r7, lr}
800d168: b086 sub sp, #24
800d16a: af00 add r7, sp, #0
800d16c: 60f8 str r0, [r7, #12]
800d16e: 60b9 str r1, [r7, #8]
800d170: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800d172: 2300 movs r3, #0
800d174: 75fb strb r3, [r7, #23]
if (desc != NULL)
800d176: 68fb ldr r3, [r7, #12]
800d178: 2b00 cmp r3, #0
800d17a: d032 beq.n 800d1e2 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800d17c: 68f8 ldr r0, [r7, #12]
800d17e: f000 f834 bl 800d1ea <USBD_GetLen>
800d182: 4603 mov r3, r0
800d184: 3301 adds r3, #1
800d186: b29b uxth r3, r3
800d188: 005b lsls r3, r3, #1
800d18a: b29a uxth r2, r3
800d18c: 687b ldr r3, [r7, #4]
800d18e: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800d190: 7dfb ldrb r3, [r7, #23]
800d192: 1c5a adds r2, r3, #1
800d194: 75fa strb r2, [r7, #23]
800d196: 461a mov r2, r3
800d198: 68bb ldr r3, [r7, #8]
800d19a: 4413 add r3, r2
800d19c: 687a ldr r2, [r7, #4]
800d19e: 7812 ldrb r2, [r2, #0]
800d1a0: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800d1a2: 7dfb ldrb r3, [r7, #23]
800d1a4: 1c5a adds r2, r3, #1
800d1a6: 75fa strb r2, [r7, #23]
800d1a8: 461a mov r2, r3
800d1aa: 68bb ldr r3, [r7, #8]
800d1ac: 4413 add r3, r2
800d1ae: 2203 movs r2, #3
800d1b0: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d1b2: e012 b.n 800d1da <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800d1b4: 68fb ldr r3, [r7, #12]
800d1b6: 1c5a adds r2, r3, #1
800d1b8: 60fa str r2, [r7, #12]
800d1ba: 7dfa ldrb r2, [r7, #23]
800d1bc: 1c51 adds r1, r2, #1
800d1be: 75f9 strb r1, [r7, #23]
800d1c0: 4611 mov r1, r2
800d1c2: 68ba ldr r2, [r7, #8]
800d1c4: 440a add r2, r1
800d1c6: 781b ldrb r3, [r3, #0]
800d1c8: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800d1ca: 7dfb ldrb r3, [r7, #23]
800d1cc: 1c5a adds r2, r3, #1
800d1ce: 75fa strb r2, [r7, #23]
800d1d0: 461a mov r2, r3
800d1d2: 68bb ldr r3, [r7, #8]
800d1d4: 4413 add r3, r2
800d1d6: 2200 movs r2, #0
800d1d8: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d1da: 68fb ldr r3, [r7, #12]
800d1dc: 781b ldrb r3, [r3, #0]
800d1de: 2b00 cmp r3, #0
800d1e0: d1e8 bne.n 800d1b4 <USBD_GetString+0x4e>
}
}
}
800d1e2: bf00 nop
800d1e4: 3718 adds r7, #24
800d1e6: 46bd mov sp, r7
800d1e8: bd80 pop {r7, pc}
0800d1ea <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800d1ea: b480 push {r7}
800d1ec: b085 sub sp, #20
800d1ee: af00 add r7, sp, #0
800d1f0: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800d1f2: 2300 movs r3, #0
800d1f4: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800d1f6: e005 b.n 800d204 <USBD_GetLen+0x1a>
{
len++;
800d1f8: 7bfb ldrb r3, [r7, #15]
800d1fa: 3301 adds r3, #1
800d1fc: 73fb strb r3, [r7, #15]
buf++;
800d1fe: 687b ldr r3, [r7, #4]
800d200: 3301 adds r3, #1
800d202: 607b str r3, [r7, #4]
while (*buf != '\0')
800d204: 687b ldr r3, [r7, #4]
800d206: 781b ldrb r3, [r3, #0]
800d208: 2b00 cmp r3, #0
800d20a: d1f5 bne.n 800d1f8 <USBD_GetLen+0xe>
}
return len;
800d20c: 7bfb ldrb r3, [r7, #15]
}
800d20e: 4618 mov r0, r3
800d210: 3714 adds r7, #20
800d212: 46bd mov sp, r7
800d214: bc80 pop {r7}
800d216: 4770 bx lr
0800d218 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d218: b580 push {r7, lr}
800d21a: b084 sub sp, #16
800d21c: af00 add r7, sp, #0
800d21e: 60f8 str r0, [r7, #12]
800d220: 60b9 str r1, [r7, #8]
800d222: 4613 mov r3, r2
800d224: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800d226: 68fb ldr r3, [r7, #12]
800d228: 2202 movs r2, #2
800d22a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800d22e: 88fa ldrh r2, [r7, #6]
800d230: 68fb ldr r3, [r7, #12]
800d232: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800d234: 88fa ldrh r2, [r7, #6]
800d236: 68fb ldr r3, [r7, #12]
800d238: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d23a: 88fb ldrh r3, [r7, #6]
800d23c: 68ba ldr r2, [r7, #8]
800d23e: 2100 movs r1, #0
800d240: 68f8 ldr r0, [r7, #12]
800d242: f000 fce1 bl 800dc08 <USBD_LL_Transmit>
return USBD_OK;
800d246: 2300 movs r3, #0
}
800d248: 4618 mov r0, r3
800d24a: 3710 adds r7, #16
800d24c: 46bd mov sp, r7
800d24e: bd80 pop {r7, pc}
0800d250 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d250: b580 push {r7, lr}
800d252: b084 sub sp, #16
800d254: af00 add r7, sp, #0
800d256: 60f8 str r0, [r7, #12]
800d258: 60b9 str r1, [r7, #8]
800d25a: 4613 mov r3, r2
800d25c: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d25e: 88fb ldrh r3, [r7, #6]
800d260: 68ba ldr r2, [r7, #8]
800d262: 2100 movs r1, #0
800d264: 68f8 ldr r0, [r7, #12]
800d266: f000 fccf bl 800dc08 <USBD_LL_Transmit>
return USBD_OK;
800d26a: 2300 movs r3, #0
}
800d26c: 4618 mov r0, r3
800d26e: 3710 adds r7, #16
800d270: 46bd mov sp, r7
800d272: bd80 pop {r7, pc}
0800d274 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d274: b580 push {r7, lr}
800d276: b084 sub sp, #16
800d278: af00 add r7, sp, #0
800d27a: 60f8 str r0, [r7, #12]
800d27c: 60b9 str r1, [r7, #8]
800d27e: 4613 mov r3, r2
800d280: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800d282: 68fb ldr r3, [r7, #12]
800d284: 2203 movs r2, #3
800d286: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
800d28a: 88fa ldrh r2, [r7, #6]
800d28c: 68fb ldr r3, [r7, #12]
800d28e: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800d292: 88fa ldrh r2, [r7, #6]
800d294: 68fb ldr r3, [r7, #12]
800d296: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d29a: 88fb ldrh r3, [r7, #6]
800d29c: 68ba ldr r2, [r7, #8]
800d29e: 2100 movs r1, #0
800d2a0: 68f8 ldr r0, [r7, #12]
800d2a2: f000 fcd4 bl 800dc4e <USBD_LL_PrepareReceive>
return USBD_OK;
800d2a6: 2300 movs r3, #0
}
800d2a8: 4618 mov r0, r3
800d2aa: 3710 adds r7, #16
800d2ac: 46bd mov sp, r7
800d2ae: bd80 pop {r7, pc}
0800d2b0 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d2b0: b580 push {r7, lr}
800d2b2: b084 sub sp, #16
800d2b4: af00 add r7, sp, #0
800d2b6: 60f8 str r0, [r7, #12]
800d2b8: 60b9 str r1, [r7, #8]
800d2ba: 4613 mov r3, r2
800d2bc: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d2be: 88fb ldrh r3, [r7, #6]
800d2c0: 68ba ldr r2, [r7, #8]
800d2c2: 2100 movs r1, #0
800d2c4: 68f8 ldr r0, [r7, #12]
800d2c6: f000 fcc2 bl 800dc4e <USBD_LL_PrepareReceive>
return USBD_OK;
800d2ca: 2300 movs r3, #0
}
800d2cc: 4618 mov r0, r3
800d2ce: 3710 adds r7, #16
800d2d0: 46bd mov sp, r7
800d2d2: bd80 pop {r7, pc}
0800d2d4 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800d2d4: b580 push {r7, lr}
800d2d6: b082 sub sp, #8
800d2d8: af00 add r7, sp, #0
800d2da: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800d2dc: 687b ldr r3, [r7, #4]
800d2de: 2204 movs r2, #4
800d2e0: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800d2e4: 2300 movs r3, #0
800d2e6: 2200 movs r2, #0
800d2e8: 2100 movs r1, #0
800d2ea: 6878 ldr r0, [r7, #4]
800d2ec: f000 fc8c bl 800dc08 <USBD_LL_Transmit>
return USBD_OK;
800d2f0: 2300 movs r3, #0
}
800d2f2: 4618 mov r0, r3
800d2f4: 3708 adds r7, #8
800d2f6: 46bd mov sp, r7
800d2f8: bd80 pop {r7, pc}
0800d2fa <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800d2fa: b580 push {r7, lr}
800d2fc: b082 sub sp, #8
800d2fe: af00 add r7, sp, #0
800d300: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800d302: 687b ldr r3, [r7, #4]
800d304: 2205 movs r2, #5
800d306: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800d30a: 2300 movs r3, #0
800d30c: 2200 movs r2, #0
800d30e: 2100 movs r1, #0
800d310: 6878 ldr r0, [r7, #4]
800d312: f000 fc9c bl 800dc4e <USBD_LL_PrepareReceive>
return USBD_OK;
800d316: 2300 movs r3, #0
}
800d318: 4618 mov r0, r3
800d31a: 3708 adds r7, #8
800d31c: 46bd mov sp, r7
800d31e: bd80 pop {r7, pc}
0800d320 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800d320: b580 push {r7, lr}
800d322: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
800d324: 2200 movs r2, #0
800d326: 4912 ldr r1, [pc, #72] @ (800d370 <MX_USB_DEVICE_Init+0x50>)
800d328: 4812 ldr r0, [pc, #72] @ (800d374 <MX_USB_DEVICE_Init+0x54>)
800d32a: f7fe ff62 bl 800c1f2 <USBD_Init>
800d32e: 4603 mov r3, r0
800d330: 2b00 cmp r3, #0
800d332: d001 beq.n 800d338 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
800d334: f7f5 fe6c bl 8003010 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
800d338: 490f ldr r1, [pc, #60] @ (800d378 <MX_USB_DEVICE_Init+0x58>)
800d33a: 480e ldr r0, [pc, #56] @ (800d374 <MX_USB_DEVICE_Init+0x54>)
800d33c: f7fe ff84 bl 800c248 <USBD_RegisterClass>
800d340: 4603 mov r3, r0
800d342: 2b00 cmp r3, #0
800d344: d001 beq.n 800d34a <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800d346: f7f5 fe63 bl 8003010 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
800d34a: 490c ldr r1, [pc, #48] @ (800d37c <MX_USB_DEVICE_Init+0x5c>)
800d34c: 4809 ldr r0, [pc, #36] @ (800d374 <MX_USB_DEVICE_Init+0x54>)
800d34e: f7fe feb5 bl 800c0bc <USBD_CDC_RegisterInterface>
800d352: 4603 mov r3, r0
800d354: 2b00 cmp r3, #0
800d356: d001 beq.n 800d35c <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
800d358: f7f5 fe5a bl 8003010 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800d35c: 4805 ldr r0, [pc, #20] @ (800d374 <MX_USB_DEVICE_Init+0x54>)
800d35e: f7fe ff8c bl 800c27a <USBD_Start>
800d362: 4603 mov r3, r0
800d364: 2b00 cmp r3, #0
800d366: d001 beq.n 800d36c <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800d368: f7f5 fe52 bl 8003010 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800d36c: bf00 nop
800d36e: bd80 pop {r7, pc}
800d370: 2000013c .word 0x2000013c
800d374: 20000494 .word 0x20000494
800d378: 20000028 .word 0x20000028
800d37c: 2000012c .word 0x2000012c
0800d380 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
800d380: b480 push {r7}
800d382: b085 sub sp, #20
800d384: af00 add r7, sp, #0
800d386: 6078 str r0, [r7, #4]
800d388: 6039 str r1, [r7, #0]
while (len--) {
800d38a: e01e b.n 800d3ca <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
800d38c: 4b14 ldr r3, [pc, #80] @ (800d3e0 <fifo_push+0x60>)
800d38e: 881b ldrh r3, [r3, #0]
800d390: b29b uxth r3, r3
800d392: 3301 adds r3, #1
800d394: b29b uxth r3, r3
800d396: b2db uxtb r3, r3
800d398: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
800d39a: 89fa ldrh r2, [r7, #14]
800d39c: 4b11 ldr r3, [pc, #68] @ (800d3e4 <fifo_push+0x64>)
800d39e: 881b ldrh r3, [r3, #0]
800d3a0: b29b uxth r3, r3
800d3a2: b2db uxtb r3, r3
800d3a4: 429a cmp r2, r3
800d3a6: d103 bne.n 800d3b0 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
800d3a8: 687b ldr r3, [r7, #4]
800d3aa: 3301 adds r3, #1
800d3ac: 607b str r3, [r7, #4]
continue;
800d3ae: e00c b.n 800d3ca <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800d3b0: 687b ldr r3, [r7, #4]
800d3b2: 1c5a adds r2, r3, #1
800d3b4: 607a str r2, [r7, #4]
800d3b6: 4a0a ldr r2, [pc, #40] @ (800d3e0 <fifo_push+0x60>)
800d3b8: 8812 ldrh r2, [r2, #0]
800d3ba: b292 uxth r2, r2
800d3bc: b2d2 uxtb r2, r2
800d3be: 7819 ldrb r1, [r3, #0]
800d3c0: 4b09 ldr r3, [pc, #36] @ (800d3e8 <fifo_push+0x68>)
800d3c2: 5499 strb r1, [r3, r2]
rx_head = next;
800d3c4: 4a06 ldr r2, [pc, #24] @ (800d3e0 <fifo_push+0x60>)
800d3c6: 89fb ldrh r3, [r7, #14]
800d3c8: 8013 strh r3, [r2, #0]
while (len--) {
800d3ca: 683b ldr r3, [r7, #0]
800d3cc: 1e5a subs r2, r3, #1
800d3ce: 603a str r2, [r7, #0]
800d3d0: 2b00 cmp r3, #0
800d3d2: d1db bne.n 800d38c <fifo_push+0xc>
}
}
800d3d4: bf00 nop
800d3d6: bf00 nop
800d3d8: 3714 adds r7, #20
800d3da: 46bd mov sp, r7
800d3dc: bc80 pop {r7}
800d3de: 4770 bx lr
800d3e0: 20001058 .word 0x20001058
800d3e4: 2000105a .word 0x2000105a
800d3e8: 20000f58 .word 0x20000f58
0800d3ec <CDC_Available>:
uint32_t CDC_Available(void) {
800d3ec: b480 push {r7}
800d3ee: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800d3f0: 4b06 ldr r3, [pc, #24] @ (800d40c <CDC_Available+0x20>)
800d3f2: 881b ldrh r3, [r3, #0]
800d3f4: b29a uxth r2, r3
800d3f6: 4b06 ldr r3, [pc, #24] @ (800d410 <CDC_Available+0x24>)
800d3f8: 881b ldrh r3, [r3, #0]
800d3fa: b29b uxth r3, r3
800d3fc: 1ad3 subs r3, r2, r3
800d3fe: b29b uxth r3, r3
800d400: b2db uxtb r3, r3
}
800d402: 4618 mov r0, r3
800d404: 46bd mov sp, r7
800d406: bc80 pop {r7}
800d408: 4770 bx lr
800d40a: bf00 nop
800d40c: 20001058 .word 0x20001058
800d410: 2000105a .word 0x2000105a
0800d414 <CDC_ReadByte>:
int CDC_ReadByte(void) {
800d414: b480 push {r7}
800d416: b083 sub sp, #12
800d418: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
800d41a: 4b10 ldr r3, [pc, #64] @ (800d45c <CDC_ReadByte+0x48>)
800d41c: 881b ldrh r3, [r3, #0]
800d41e: b29a uxth r2, r3
800d420: 4b0f ldr r3, [pc, #60] @ (800d460 <CDC_ReadByte+0x4c>)
800d422: 881b ldrh r3, [r3, #0]
800d424: b29b uxth r3, r3
800d426: 429a cmp r2, r3
800d428: d102 bne.n 800d430 <CDC_ReadByte+0x1c>
800d42a: f04f 33ff mov.w r3, #4294967295
800d42e: e010 b.n 800d452 <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
800d430: 4b0a ldr r3, [pc, #40] @ (800d45c <CDC_ReadByte+0x48>)
800d432: 881b ldrh r3, [r3, #0]
800d434: b29b uxth r3, r3
800d436: b2db uxtb r3, r3
800d438: 4a0a ldr r2, [pc, #40] @ (800d464 <CDC_ReadByte+0x50>)
800d43a: 5cd3 ldrb r3, [r2, r3]
800d43c: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
800d43e: 4b07 ldr r3, [pc, #28] @ (800d45c <CDC_ReadByte+0x48>)
800d440: 881b ldrh r3, [r3, #0]
800d442: b29b uxth r3, r3
800d444: 3301 adds r3, #1
800d446: b29b uxth r3, r3
800d448: b2db uxtb r3, r3
800d44a: b29a uxth r2, r3
800d44c: 4b03 ldr r3, [pc, #12] @ (800d45c <CDC_ReadByte+0x48>)
800d44e: 801a strh r2, [r3, #0]
return b;
800d450: 687b ldr r3, [r7, #4]
}
800d452: 4618 mov r0, r3
800d454: 370c adds r7, #12
800d456: 46bd mov sp, r7
800d458: bc80 pop {r7}
800d45a: 4770 bx lr
800d45c: 2000105a .word 0x2000105a
800d460: 20001058 .word 0x20001058
800d464: 20000f58 .word 0x20000f58
0800d468 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
800d468: b580 push {r7, lr}
800d46a: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
800d46c: 2200 movs r2, #0
800d46e: 4905 ldr r1, [pc, #20] @ (800d484 <CDC_Init_FS+0x1c>)
800d470: 4805 ldr r0, [pc, #20] @ (800d488 <CDC_Init_FS+0x20>)
800d472: f7fe fe39 bl 800c0e8 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800d476: 4905 ldr r1, [pc, #20] @ (800d48c <CDC_Init_FS+0x24>)
800d478: 4803 ldr r0, [pc, #12] @ (800d488 <CDC_Init_FS+0x20>)
800d47a: f7fe fe4e bl 800c11a <USBD_CDC_SetRxBuffer>
return (USBD_OK);
800d47e: 2300 movs r3, #0
/* USER CODE END 3 */
}
800d480: 4618 mov r0, r3
800d482: bd80 pop {r7, pc}
800d484: 20000b58 .word 0x20000b58
800d488: 20000494 .word 0x20000494
800d48c: 20000758 .word 0x20000758
0800d490 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800d490: b480 push {r7}
800d492: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800d494: 2300 movs r3, #0
/* USER CODE END 4 */
}
800d496: 4618 mov r0, r3
800d498: 46bd mov sp, r7
800d49a: bc80 pop {r7}
800d49c: 4770 bx lr
...
0800d4a0 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800d4a0: b480 push {r7}
800d4a2: b083 sub sp, #12
800d4a4: af00 add r7, sp, #0
800d4a6: 4603 mov r3, r0
800d4a8: 6039 str r1, [r7, #0]
800d4aa: 71fb strb r3, [r7, #7]
800d4ac: 4613 mov r3, r2
800d4ae: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800d4b0: 79fb ldrb r3, [r7, #7]
800d4b2: 2b23 cmp r3, #35 @ 0x23
800d4b4: d84a bhi.n 800d54c <CDC_Control_FS+0xac>
800d4b6: a201 add r2, pc, #4 @ (adr r2, 800d4bc <CDC_Control_FS+0x1c>)
800d4b8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d4bc: 0800d54d .word 0x0800d54d
800d4c0: 0800d54d .word 0x0800d54d
800d4c4: 0800d54d .word 0x0800d54d
800d4c8: 0800d54d .word 0x0800d54d
800d4cc: 0800d54d .word 0x0800d54d
800d4d0: 0800d54d .word 0x0800d54d
800d4d4: 0800d54d .word 0x0800d54d
800d4d8: 0800d54d .word 0x0800d54d
800d4dc: 0800d54d .word 0x0800d54d
800d4e0: 0800d54d .word 0x0800d54d
800d4e4: 0800d54d .word 0x0800d54d
800d4e8: 0800d54d .word 0x0800d54d
800d4ec: 0800d54d .word 0x0800d54d
800d4f0: 0800d54d .word 0x0800d54d
800d4f4: 0800d54d .word 0x0800d54d
800d4f8: 0800d54d .word 0x0800d54d
800d4fc: 0800d54d .word 0x0800d54d
800d500: 0800d54d .word 0x0800d54d
800d504: 0800d54d .word 0x0800d54d
800d508: 0800d54d .word 0x0800d54d
800d50c: 0800d54d .word 0x0800d54d
800d510: 0800d54d .word 0x0800d54d
800d514: 0800d54d .word 0x0800d54d
800d518: 0800d54d .word 0x0800d54d
800d51c: 0800d54d .word 0x0800d54d
800d520: 0800d54d .word 0x0800d54d
800d524: 0800d54d .word 0x0800d54d
800d528: 0800d54d .word 0x0800d54d
800d52c: 0800d54d .word 0x0800d54d
800d530: 0800d54d .word 0x0800d54d
800d534: 0800d54d .word 0x0800d54d
800d538: 0800d54d .word 0x0800d54d
800d53c: 0800d54d .word 0x0800d54d
800d540: 0800d54d .word 0x0800d54d
800d544: 0800d54d .word 0x0800d54d
800d548: 0800d54d .word 0x0800d54d
case CDC_SEND_BREAK:
break;
default:
break;
800d54c: bf00 nop
}
return (USBD_OK);
800d54e: 2300 movs r3, #0
/* USER CODE END 5 */
}
800d550: 4618 mov r0, r3
800d552: 370c adds r7, #12
800d554: 46bd mov sp, r7
800d556: bc80 pop {r7}
800d558: 4770 bx lr
800d55a: bf00 nop
0800d55c <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800d55c: b580 push {r7, lr}
800d55e: b082 sub sp, #8
800d560: af00 add r7, sp, #0
800d562: 6078 str r0, [r7, #4]
800d564: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800d566: 683b ldr r3, [r7, #0]
800d568: 681b ldr r3, [r3, #0]
800d56a: 2b00 cmp r3, #0
800d56c: d005 beq.n 800d57a <CDC_Receive_FS+0x1e>
800d56e: 683b ldr r3, [r7, #0]
800d570: 681b ldr r3, [r3, #0]
800d572: 4619 mov r1, r3
800d574: 6878 ldr r0, [r7, #4]
800d576: f7ff ff03 bl 800d380 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800d57a: 6879 ldr r1, [r7, #4]
800d57c: 4805 ldr r0, [pc, #20] @ (800d594 <CDC_Receive_FS+0x38>)
800d57e: f7fe fdcc bl 800c11a <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800d582: 4804 ldr r0, [pc, #16] @ (800d594 <CDC_Receive_FS+0x38>)
800d584: f7fe fe0b bl 800c19e <USBD_CDC_ReceivePacket>
return (USBD_OK);
800d588: 2300 movs r3, #0
/* USER CODE END 6 */
}
800d58a: 4618 mov r0, r3
800d58c: 3708 adds r7, #8
800d58e: 46bd mov sp, r7
800d590: bd80 pop {r7, pc}
800d592: bf00 nop
800d594: 20000494 .word 0x20000494
0800d598 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
800d598: b580 push {r7, lr}
800d59a: b084 sub sp, #16
800d59c: af00 add r7, sp, #0
800d59e: 6078 str r0, [r7, #4]
800d5a0: 460b mov r3, r1
800d5a2: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800d5a4: 2300 movs r3, #0
800d5a6: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800d5a8: 4b0d ldr r3, [pc, #52] @ (800d5e0 <CDC_Transmit_FS+0x48>)
800d5aa: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800d5ae: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800d5b0: 68bb ldr r3, [r7, #8]
800d5b2: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800d5b6: 2b00 cmp r3, #0
800d5b8: d001 beq.n 800d5be <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800d5ba: 2301 movs r3, #1
800d5bc: e00b b.n 800d5d6 <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800d5be: 887b ldrh r3, [r7, #2]
800d5c0: 461a mov r2, r3
800d5c2: 6879 ldr r1, [r7, #4]
800d5c4: 4806 ldr r0, [pc, #24] @ (800d5e0 <CDC_Transmit_FS+0x48>)
800d5c6: f7fe fd8f bl 800c0e8 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800d5ca: 4805 ldr r0, [pc, #20] @ (800d5e0 <CDC_Transmit_FS+0x48>)
800d5cc: f7fe fdb8 bl 800c140 <USBD_CDC_TransmitPacket>
800d5d0: 4603 mov r3, r0
800d5d2: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800d5d4: 7bfb ldrb r3, [r7, #15]
}
800d5d6: 4618 mov r0, r3
800d5d8: 3710 adds r7, #16
800d5da: 46bd mov sp, r7
800d5dc: bd80 pop {r7, pc}
800d5de: bf00 nop
800d5e0: 20000494 .word 0x20000494
0800d5e4 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d5e4: b480 push {r7}
800d5e6: b083 sub sp, #12
800d5e8: af00 add r7, sp, #0
800d5ea: 4603 mov r3, r0
800d5ec: 6039 str r1, [r7, #0]
800d5ee: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800d5f0: 683b ldr r3, [r7, #0]
800d5f2: 2212 movs r2, #18
800d5f4: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800d5f6: 4b03 ldr r3, [pc, #12] @ (800d604 <USBD_FS_DeviceDescriptor+0x20>)
}
800d5f8: 4618 mov r0, r3
800d5fa: 370c adds r7, #12
800d5fc: 46bd mov sp, r7
800d5fe: bc80 pop {r7}
800d600: 4770 bx lr
800d602: bf00 nop
800d604: 20000158 .word 0x20000158
0800d608 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d608: b480 push {r7}
800d60a: b083 sub sp, #12
800d60c: af00 add r7, sp, #0
800d60e: 4603 mov r3, r0
800d610: 6039 str r1, [r7, #0]
800d612: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
800d614: 683b ldr r3, [r7, #0]
800d616: 2204 movs r2, #4
800d618: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
800d61a: 4b03 ldr r3, [pc, #12] @ (800d628 <USBD_FS_LangIDStrDescriptor+0x20>)
}
800d61c: 4618 mov r0, r3
800d61e: 370c adds r7, #12
800d620: 46bd mov sp, r7
800d622: bc80 pop {r7}
800d624: 4770 bx lr
800d626: bf00 nop
800d628: 2000016c .word 0x2000016c
0800d62c <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d62c: b580 push {r7, lr}
800d62e: b082 sub sp, #8
800d630: af00 add r7, sp, #0
800d632: 4603 mov r3, r0
800d634: 6039 str r1, [r7, #0]
800d636: 71fb strb r3, [r7, #7]
if(speed == 0)
800d638: 79fb ldrb r3, [r7, #7]
800d63a: 2b00 cmp r3, #0
800d63c: d105 bne.n 800d64a <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800d63e: 683a ldr r2, [r7, #0]
800d640: 4907 ldr r1, [pc, #28] @ (800d660 <USBD_FS_ProductStrDescriptor+0x34>)
800d642: 4808 ldr r0, [pc, #32] @ (800d664 <USBD_FS_ProductStrDescriptor+0x38>)
800d644: f7ff fd8f bl 800d166 <USBD_GetString>
800d648: e004 b.n 800d654 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800d64a: 683a ldr r2, [r7, #0]
800d64c: 4904 ldr r1, [pc, #16] @ (800d660 <USBD_FS_ProductStrDescriptor+0x34>)
800d64e: 4805 ldr r0, [pc, #20] @ (800d664 <USBD_FS_ProductStrDescriptor+0x38>)
800d650: f7ff fd89 bl 800d166 <USBD_GetString>
}
return USBD_StrDesc;
800d654: 4b02 ldr r3, [pc, #8] @ (800d660 <USBD_FS_ProductStrDescriptor+0x34>)
}
800d656: 4618 mov r0, r3
800d658: 3708 adds r7, #8
800d65a: 46bd mov sp, r7
800d65c: bd80 pop {r7, pc}
800d65e: bf00 nop
800d660: 2000105c .word 0x2000105c
800d664: 0800eb34 .word 0x0800eb34
0800d668 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d668: b580 push {r7, lr}
800d66a: b082 sub sp, #8
800d66c: af00 add r7, sp, #0
800d66e: 4603 mov r3, r0
800d670: 6039 str r1, [r7, #0]
800d672: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800d674: 683a ldr r2, [r7, #0]
800d676: 4904 ldr r1, [pc, #16] @ (800d688 <USBD_FS_ManufacturerStrDescriptor+0x20>)
800d678: 4804 ldr r0, [pc, #16] @ (800d68c <USBD_FS_ManufacturerStrDescriptor+0x24>)
800d67a: f7ff fd74 bl 800d166 <USBD_GetString>
return USBD_StrDesc;
800d67e: 4b02 ldr r3, [pc, #8] @ (800d688 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800d680: 4618 mov r0, r3
800d682: 3708 adds r7, #8
800d684: 46bd mov sp, r7
800d686: bd80 pop {r7, pc}
800d688: 2000105c .word 0x2000105c
800d68c: 0800eb4c .word 0x0800eb4c
0800d690 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d690: b580 push {r7, lr}
800d692: b082 sub sp, #8
800d694: af00 add r7, sp, #0
800d696: 4603 mov r3, r0
800d698: 6039 str r1, [r7, #0]
800d69a: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800d69c: 683b ldr r3, [r7, #0]
800d69e: 221a movs r2, #26
800d6a0: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800d6a2: f000 f843 bl 800d72c <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800d6a6: 4b02 ldr r3, [pc, #8] @ (800d6b0 <USBD_FS_SerialStrDescriptor+0x20>)
}
800d6a8: 4618 mov r0, r3
800d6aa: 3708 adds r7, #8
800d6ac: 46bd mov sp, r7
800d6ae: bd80 pop {r7, pc}
800d6b0: 20000170 .word 0x20000170
0800d6b4 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d6b4: b580 push {r7, lr}
800d6b6: b082 sub sp, #8
800d6b8: af00 add r7, sp, #0
800d6ba: 4603 mov r3, r0
800d6bc: 6039 str r1, [r7, #0]
800d6be: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800d6c0: 79fb ldrb r3, [r7, #7]
800d6c2: 2b00 cmp r3, #0
800d6c4: d105 bne.n 800d6d2 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800d6c6: 683a ldr r2, [r7, #0]
800d6c8: 4907 ldr r1, [pc, #28] @ (800d6e8 <USBD_FS_ConfigStrDescriptor+0x34>)
800d6ca: 4808 ldr r0, [pc, #32] @ (800d6ec <USBD_FS_ConfigStrDescriptor+0x38>)
800d6cc: f7ff fd4b bl 800d166 <USBD_GetString>
800d6d0: e004 b.n 800d6dc <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800d6d2: 683a ldr r2, [r7, #0]
800d6d4: 4904 ldr r1, [pc, #16] @ (800d6e8 <USBD_FS_ConfigStrDescriptor+0x34>)
800d6d6: 4805 ldr r0, [pc, #20] @ (800d6ec <USBD_FS_ConfigStrDescriptor+0x38>)
800d6d8: f7ff fd45 bl 800d166 <USBD_GetString>
}
return USBD_StrDesc;
800d6dc: 4b02 ldr r3, [pc, #8] @ (800d6e8 <USBD_FS_ConfigStrDescriptor+0x34>)
}
800d6de: 4618 mov r0, r3
800d6e0: 3708 adds r7, #8
800d6e2: 46bd mov sp, r7
800d6e4: bd80 pop {r7, pc}
800d6e6: bf00 nop
800d6e8: 2000105c .word 0x2000105c
800d6ec: 0800eb60 .word 0x0800eb60
0800d6f0 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d6f0: b580 push {r7, lr}
800d6f2: b082 sub sp, #8
800d6f4: af00 add r7, sp, #0
800d6f6: 4603 mov r3, r0
800d6f8: 6039 str r1, [r7, #0]
800d6fa: 71fb strb r3, [r7, #7]
if(speed == 0)
800d6fc: 79fb ldrb r3, [r7, #7]
800d6fe: 2b00 cmp r3, #0
800d700: d105 bne.n 800d70e <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800d702: 683a ldr r2, [r7, #0]
800d704: 4907 ldr r1, [pc, #28] @ (800d724 <USBD_FS_InterfaceStrDescriptor+0x34>)
800d706: 4808 ldr r0, [pc, #32] @ (800d728 <USBD_FS_InterfaceStrDescriptor+0x38>)
800d708: f7ff fd2d bl 800d166 <USBD_GetString>
800d70c: e004 b.n 800d718 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800d70e: 683a ldr r2, [r7, #0]
800d710: 4904 ldr r1, [pc, #16] @ (800d724 <USBD_FS_InterfaceStrDescriptor+0x34>)
800d712: 4805 ldr r0, [pc, #20] @ (800d728 <USBD_FS_InterfaceStrDescriptor+0x38>)
800d714: f7ff fd27 bl 800d166 <USBD_GetString>
}
return USBD_StrDesc;
800d718: 4b02 ldr r3, [pc, #8] @ (800d724 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800d71a: 4618 mov r0, r3
800d71c: 3708 adds r7, #8
800d71e: 46bd mov sp, r7
800d720: bd80 pop {r7, pc}
800d722: bf00 nop
800d724: 2000105c .word 0x2000105c
800d728: 0800eb6c .word 0x0800eb6c
0800d72c <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800d72c: b580 push {r7, lr}
800d72e: b084 sub sp, #16
800d730: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800d732: 4b0f ldr r3, [pc, #60] @ (800d770 <Get_SerialNum+0x44>)
800d734: 681b ldr r3, [r3, #0]
800d736: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800d738: 4b0e ldr r3, [pc, #56] @ (800d774 <Get_SerialNum+0x48>)
800d73a: 681b ldr r3, [r3, #0]
800d73c: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800d73e: 4b0e ldr r3, [pc, #56] @ (800d778 <Get_SerialNum+0x4c>)
800d740: 681b ldr r3, [r3, #0]
800d742: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800d744: 68fa ldr r2, [r7, #12]
800d746: 687b ldr r3, [r7, #4]
800d748: 4413 add r3, r2
800d74a: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800d74c: 68fb ldr r3, [r7, #12]
800d74e: 2b00 cmp r3, #0
800d750: d009 beq.n 800d766 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800d752: 2208 movs r2, #8
800d754: 4909 ldr r1, [pc, #36] @ (800d77c <Get_SerialNum+0x50>)
800d756: 68f8 ldr r0, [r7, #12]
800d758: f000 f814 bl 800d784 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800d75c: 2204 movs r2, #4
800d75e: 4908 ldr r1, [pc, #32] @ (800d780 <Get_SerialNum+0x54>)
800d760: 68b8 ldr r0, [r7, #8]
800d762: f000 f80f bl 800d784 <IntToUnicode>
}
}
800d766: bf00 nop
800d768: 3710 adds r7, #16
800d76a: 46bd mov sp, r7
800d76c: bd80 pop {r7, pc}
800d76e: bf00 nop
800d770: 1ffff7e8 .word 0x1ffff7e8
800d774: 1ffff7ec .word 0x1ffff7ec
800d778: 1ffff7f0 .word 0x1ffff7f0
800d77c: 20000172 .word 0x20000172
800d780: 20000182 .word 0x20000182
0800d784 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800d784: b480 push {r7}
800d786: b087 sub sp, #28
800d788: af00 add r7, sp, #0
800d78a: 60f8 str r0, [r7, #12]
800d78c: 60b9 str r1, [r7, #8]
800d78e: 4613 mov r3, r2
800d790: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800d792: 2300 movs r3, #0
800d794: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800d796: 2300 movs r3, #0
800d798: 75fb strb r3, [r7, #23]
800d79a: e027 b.n 800d7ec <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800d79c: 68fb ldr r3, [r7, #12]
800d79e: 0f1b lsrs r3, r3, #28
800d7a0: 2b09 cmp r3, #9
800d7a2: d80b bhi.n 800d7bc <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800d7a4: 68fb ldr r3, [r7, #12]
800d7a6: 0f1b lsrs r3, r3, #28
800d7a8: b2da uxtb r2, r3
800d7aa: 7dfb ldrb r3, [r7, #23]
800d7ac: 005b lsls r3, r3, #1
800d7ae: 4619 mov r1, r3
800d7b0: 68bb ldr r3, [r7, #8]
800d7b2: 440b add r3, r1
800d7b4: 3230 adds r2, #48 @ 0x30
800d7b6: b2d2 uxtb r2, r2
800d7b8: 701a strb r2, [r3, #0]
800d7ba: e00a b.n 800d7d2 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800d7bc: 68fb ldr r3, [r7, #12]
800d7be: 0f1b lsrs r3, r3, #28
800d7c0: b2da uxtb r2, r3
800d7c2: 7dfb ldrb r3, [r7, #23]
800d7c4: 005b lsls r3, r3, #1
800d7c6: 4619 mov r1, r3
800d7c8: 68bb ldr r3, [r7, #8]
800d7ca: 440b add r3, r1
800d7cc: 3237 adds r2, #55 @ 0x37
800d7ce: b2d2 uxtb r2, r2
800d7d0: 701a strb r2, [r3, #0]
}
value = value << 4;
800d7d2: 68fb ldr r3, [r7, #12]
800d7d4: 011b lsls r3, r3, #4
800d7d6: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800d7d8: 7dfb ldrb r3, [r7, #23]
800d7da: 005b lsls r3, r3, #1
800d7dc: 3301 adds r3, #1
800d7de: 68ba ldr r2, [r7, #8]
800d7e0: 4413 add r3, r2
800d7e2: 2200 movs r2, #0
800d7e4: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800d7e6: 7dfb ldrb r3, [r7, #23]
800d7e8: 3301 adds r3, #1
800d7ea: 75fb strb r3, [r7, #23]
800d7ec: 7dfa ldrb r2, [r7, #23]
800d7ee: 79fb ldrb r3, [r7, #7]
800d7f0: 429a cmp r2, r3
800d7f2: d3d3 bcc.n 800d79c <IntToUnicode+0x18>
}
}
800d7f4: bf00 nop
800d7f6: bf00 nop
800d7f8: 371c adds r7, #28
800d7fa: 46bd mov sp, r7
800d7fc: bc80 pop {r7}
800d7fe: 4770 bx lr
0800d800 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800d800: b580 push {r7, lr}
800d802: b084 sub sp, #16
800d804: af00 add r7, sp, #0
800d806: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800d808: 687b ldr r3, [r7, #4]
800d80a: 681b ldr r3, [r3, #0]
800d80c: 4a0d ldr r2, [pc, #52] @ (800d844 <HAL_PCD_MspInit+0x44>)
800d80e: 4293 cmp r3, r2
800d810: d113 bne.n 800d83a <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800d812: 4b0d ldr r3, [pc, #52] @ (800d848 <HAL_PCD_MspInit+0x48>)
800d814: 69db ldr r3, [r3, #28]
800d816: 4a0c ldr r2, [pc, #48] @ (800d848 <HAL_PCD_MspInit+0x48>)
800d818: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800d81c: 61d3 str r3, [r2, #28]
800d81e: 4b0a ldr r3, [pc, #40] @ (800d848 <HAL_PCD_MspInit+0x48>)
800d820: 69db ldr r3, [r3, #28]
800d822: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800d826: 60fb str r3, [r7, #12]
800d828: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800d82a: 2200 movs r2, #0
800d82c: 2100 movs r1, #0
800d82e: 2014 movs r0, #20
800d830: f7f7 fddb bl 80053ea <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800d834: 2014 movs r0, #20
800d836: f7f7 fdf4 bl 8005422 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800d83a: bf00 nop
800d83c: 3710 adds r7, #16
800d83e: 46bd mov sp, r7
800d840: bd80 pop {r7, pc}
800d842: bf00 nop
800d844: 40005c00 .word 0x40005c00
800d848: 40021000 .word 0x40021000
0800d84c <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d84c: b580 push {r7, lr}
800d84e: b082 sub sp, #8
800d850: af00 add r7, sp, #0
800d852: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800d854: 687b ldr r3, [r7, #4]
800d856: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800d85a: 687b ldr r3, [r7, #4]
800d85c: f503 7326 add.w r3, r3, #664 @ 0x298
800d860: 4619 mov r1, r3
800d862: 4610 mov r0, r2
800d864: f7fe fd51 bl 800c30a <USBD_LL_SetupStage>
}
800d868: bf00 nop
800d86a: 3708 adds r7, #8
800d86c: 46bd mov sp, r7
800d86e: bd80 pop {r7, pc}
0800d870 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d870: b580 push {r7, lr}
800d872: b082 sub sp, #8
800d874: af00 add r7, sp, #0
800d876: 6078 str r0, [r7, #4]
800d878: 460b mov r3, r1
800d87a: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800d87c: 687b ldr r3, [r7, #4]
800d87e: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800d882: 78fa ldrb r2, [r7, #3]
800d884: 6879 ldr r1, [r7, #4]
800d886: 4613 mov r3, r2
800d888: 009b lsls r3, r3, #2
800d88a: 4413 add r3, r2
800d88c: 00db lsls r3, r3, #3
800d88e: 440b add r3, r1
800d890: f503 73b2 add.w r3, r3, #356 @ 0x164
800d894: 681a ldr r2, [r3, #0]
800d896: 78fb ldrb r3, [r7, #3]
800d898: 4619 mov r1, r3
800d89a: f7fe fd83 bl 800c3a4 <USBD_LL_DataOutStage>
}
800d89e: bf00 nop
800d8a0: 3708 adds r7, #8
800d8a2: 46bd mov sp, r7
800d8a4: bd80 pop {r7, pc}
0800d8a6 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d8a6: b580 push {r7, lr}
800d8a8: b082 sub sp, #8
800d8aa: af00 add r7, sp, #0
800d8ac: 6078 str r0, [r7, #4]
800d8ae: 460b mov r3, r1
800d8b0: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800d8b2: 687b ldr r3, [r7, #4]
800d8b4: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800d8b8: 78fa ldrb r2, [r7, #3]
800d8ba: 6879 ldr r1, [r7, #4]
800d8bc: 4613 mov r3, r2
800d8be: 009b lsls r3, r3, #2
800d8c0: 4413 add r3, r2
800d8c2: 00db lsls r3, r3, #3
800d8c4: 440b add r3, r1
800d8c6: 3324 adds r3, #36 @ 0x24
800d8c8: 681a ldr r2, [r3, #0]
800d8ca: 78fb ldrb r3, [r7, #3]
800d8cc: 4619 mov r1, r3
800d8ce: f7fe fdda bl 800c486 <USBD_LL_DataInStage>
}
800d8d2: bf00 nop
800d8d4: 3708 adds r7, #8
800d8d6: 46bd mov sp, r7
800d8d8: bd80 pop {r7, pc}
0800d8da <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d8da: b580 push {r7, lr}
800d8dc: b082 sub sp, #8
800d8de: af00 add r7, sp, #0
800d8e0: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800d8e2: 687b ldr r3, [r7, #4]
800d8e4: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d8e8: 4618 mov r0, r3
800d8ea: f7fe feea bl 800c6c2 <USBD_LL_SOF>
}
800d8ee: bf00 nop
800d8f0: 3708 adds r7, #8
800d8f2: 46bd mov sp, r7
800d8f4: bd80 pop {r7, pc}
0800d8f6 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d8f6: b580 push {r7, lr}
800d8f8: b084 sub sp, #16
800d8fa: af00 add r7, sp, #0
800d8fc: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800d8fe: 2301 movs r3, #1
800d900: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800d902: 687b ldr r3, [r7, #4]
800d904: 799b ldrb r3, [r3, #6]
800d906: 2b02 cmp r3, #2
800d908: d001 beq.n 800d90e <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800d90a: f7f5 fb81 bl 8003010 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800d90e: 687b ldr r3, [r7, #4]
800d910: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d914: 7bfa ldrb r2, [r7, #15]
800d916: 4611 mov r1, r2
800d918: 4618 mov r0, r3
800d91a: f7fe fe9a bl 800c652 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800d91e: 687b ldr r3, [r7, #4]
800d920: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d924: 4618 mov r0, r3
800d926: f7fe fe53 bl 800c5d0 <USBD_LL_Reset>
}
800d92a: bf00 nop
800d92c: 3710 adds r7, #16
800d92e: 46bd mov sp, r7
800d930: bd80 pop {r7, pc}
...
0800d934 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d934: b580 push {r7, lr}
800d936: b082 sub sp, #8
800d938: af00 add r7, sp, #0
800d93a: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800d93c: 687b ldr r3, [r7, #4]
800d93e: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d942: 4618 mov r0, r3
800d944: f7fe fe94 bl 800c670 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800d948: 687b ldr r3, [r7, #4]
800d94a: 7a9b ldrb r3, [r3, #10]
800d94c: 2b00 cmp r3, #0
800d94e: d005 beq.n 800d95c <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800d950: 4b04 ldr r3, [pc, #16] @ (800d964 <HAL_PCD_SuspendCallback+0x30>)
800d952: 691b ldr r3, [r3, #16]
800d954: 4a03 ldr r2, [pc, #12] @ (800d964 <HAL_PCD_SuspendCallback+0x30>)
800d956: f043 0306 orr.w r3, r3, #6
800d95a: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800d95c: bf00 nop
800d95e: 3708 adds r7, #8
800d960: 46bd mov sp, r7
800d962: bd80 pop {r7, pc}
800d964: e000ed00 .word 0xe000ed00
0800d968 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d968: b580 push {r7, lr}
800d96a: b082 sub sp, #8
800d96c: af00 add r7, sp, #0
800d96e: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800d970: 687b ldr r3, [r7, #4]
800d972: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d976: 4618 mov r0, r3
800d978: f7fe fe8e bl 800c698 <USBD_LL_Resume>
}
800d97c: bf00 nop
800d97e: 3708 adds r7, #8
800d980: 46bd mov sp, r7
800d982: bd80 pop {r7, pc}
0800d984 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800d984: b580 push {r7, lr}
800d986: b082 sub sp, #8
800d988: af00 add r7, sp, #0
800d98a: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800d98c: 4a28 ldr r2, [pc, #160] @ (800da30 <USBD_LL_Init+0xac>)
800d98e: 687b ldr r3, [r7, #4]
800d990: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800d994: 687b ldr r3, [r7, #4]
800d996: 4a26 ldr r2, [pc, #152] @ (800da30 <USBD_LL_Init+0xac>)
800d998: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800d99c: 4b24 ldr r3, [pc, #144] @ (800da30 <USBD_LL_Init+0xac>)
800d99e: 4a25 ldr r2, [pc, #148] @ (800da34 <USBD_LL_Init+0xb0>)
800d9a0: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800d9a2: 4b23 ldr r3, [pc, #140] @ (800da30 <USBD_LL_Init+0xac>)
800d9a4: 2208 movs r2, #8
800d9a6: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800d9a8: 4b21 ldr r3, [pc, #132] @ (800da30 <USBD_LL_Init+0xac>)
800d9aa: 2202 movs r2, #2
800d9ac: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800d9ae: 4b20 ldr r3, [pc, #128] @ (800da30 <USBD_LL_Init+0xac>)
800d9b0: 2200 movs r2, #0
800d9b2: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800d9b4: 4b1e ldr r3, [pc, #120] @ (800da30 <USBD_LL_Init+0xac>)
800d9b6: 2200 movs r2, #0
800d9b8: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800d9ba: 4b1d ldr r3, [pc, #116] @ (800da30 <USBD_LL_Init+0xac>)
800d9bc: 2200 movs r2, #0
800d9be: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800d9c0: 481b ldr r0, [pc, #108] @ (800da30 <USBD_LL_Init+0xac>)
800d9c2: f7f8 faf0 bl 8005fa6 <HAL_PCD_Init>
800d9c6: 4603 mov r3, r0
800d9c8: 2b00 cmp r3, #0
800d9ca: d001 beq.n 800d9d0 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800d9cc: f7f5 fb20 bl 8003010 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800d9d0: 687b ldr r3, [r7, #4]
800d9d2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d9d6: 2318 movs r3, #24
800d9d8: 2200 movs r2, #0
800d9da: 2100 movs r1, #0
800d9dc: f7fa f801 bl 80079e2 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800d9e0: 687b ldr r3, [r7, #4]
800d9e2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d9e6: 2358 movs r3, #88 @ 0x58
800d9e8: 2200 movs r2, #0
800d9ea: 2180 movs r1, #128 @ 0x80
800d9ec: f7f9 fff9 bl 80079e2 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800d9f0: 687b ldr r3, [r7, #4]
800d9f2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d9f6: 23c0 movs r3, #192 @ 0xc0
800d9f8: 2200 movs r2, #0
800d9fa: 2181 movs r1, #129 @ 0x81
800d9fc: f7f9 fff1 bl 80079e2 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800da00: 687b ldr r3, [r7, #4]
800da02: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800da06: f44f 7388 mov.w r3, #272 @ 0x110
800da0a: 2200 movs r2, #0
800da0c: 2101 movs r1, #1
800da0e: f7f9 ffe8 bl 80079e2 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800da12: 687b ldr r3, [r7, #4]
800da14: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800da18: f44f 7380 mov.w r3, #256 @ 0x100
800da1c: 2200 movs r2, #0
800da1e: 2182 movs r1, #130 @ 0x82
800da20: f7f9 ffdf bl 80079e2 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800da24: 2300 movs r3, #0
}
800da26: 4618 mov r0, r3
800da28: 3708 adds r7, #8
800da2a: 46bd mov sp, r7
800da2c: bd80 pop {r7, pc}
800da2e: bf00 nop
800da30: 2000125c .word 0x2000125c
800da34: 40005c00 .word 0x40005c00
0800da38 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800da38: b580 push {r7, lr}
800da3a: b084 sub sp, #16
800da3c: af00 add r7, sp, #0
800da3e: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800da40: 2300 movs r3, #0
800da42: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800da44: 2300 movs r3, #0
800da46: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800da48: 687b ldr r3, [r7, #4]
800da4a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800da4e: 4618 mov r0, r3
800da50: f7f8 fb9f bl 8006192 <HAL_PCD_Start>
800da54: 4603 mov r3, r0
800da56: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800da58: 7bfb ldrb r3, [r7, #15]
800da5a: 4618 mov r0, r3
800da5c: f000 f94e bl 800dcfc <USBD_Get_USB_Status>
800da60: 4603 mov r3, r0
800da62: 73bb strb r3, [r7, #14]
return usb_status;
800da64: 7bbb ldrb r3, [r7, #14]
}
800da66: 4618 mov r0, r3
800da68: 3710 adds r7, #16
800da6a: 46bd mov sp, r7
800da6c: bd80 pop {r7, pc}
0800da6e <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800da6e: b580 push {r7, lr}
800da70: b084 sub sp, #16
800da72: af00 add r7, sp, #0
800da74: 6078 str r0, [r7, #4]
800da76: 4608 mov r0, r1
800da78: 4611 mov r1, r2
800da7a: 461a mov r2, r3
800da7c: 4603 mov r3, r0
800da7e: 70fb strb r3, [r7, #3]
800da80: 460b mov r3, r1
800da82: 70bb strb r3, [r7, #2]
800da84: 4613 mov r3, r2
800da86: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800da88: 2300 movs r3, #0
800da8a: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800da8c: 2300 movs r3, #0
800da8e: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800da90: 687b ldr r3, [r7, #4]
800da92: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800da96: 78bb ldrb r3, [r7, #2]
800da98: 883a ldrh r2, [r7, #0]
800da9a: 78f9 ldrb r1, [r7, #3]
800da9c: f7f8 fcf3 bl 8006486 <HAL_PCD_EP_Open>
800daa0: 4603 mov r3, r0
800daa2: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800daa4: 7bfb ldrb r3, [r7, #15]
800daa6: 4618 mov r0, r3
800daa8: f000 f928 bl 800dcfc <USBD_Get_USB_Status>
800daac: 4603 mov r3, r0
800daae: 73bb strb r3, [r7, #14]
return usb_status;
800dab0: 7bbb ldrb r3, [r7, #14]
}
800dab2: 4618 mov r0, r3
800dab4: 3710 adds r7, #16
800dab6: 46bd mov sp, r7
800dab8: bd80 pop {r7, pc}
0800daba <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800daba: b580 push {r7, lr}
800dabc: b084 sub sp, #16
800dabe: af00 add r7, sp, #0
800dac0: 6078 str r0, [r7, #4]
800dac2: 460b mov r3, r1
800dac4: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800dac6: 2300 movs r3, #0
800dac8: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800daca: 2300 movs r3, #0
800dacc: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800dace: 687b ldr r3, [r7, #4]
800dad0: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800dad4: 78fa ldrb r2, [r7, #3]
800dad6: 4611 mov r1, r2
800dad8: 4618 mov r0, r3
800dada: f7f8 fd31 bl 8006540 <HAL_PCD_EP_Close>
800dade: 4603 mov r3, r0
800dae0: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800dae2: 7bfb ldrb r3, [r7, #15]
800dae4: 4618 mov r0, r3
800dae6: f000 f909 bl 800dcfc <USBD_Get_USB_Status>
800daea: 4603 mov r3, r0
800daec: 73bb strb r3, [r7, #14]
return usb_status;
800daee: 7bbb ldrb r3, [r7, #14]
}
800daf0: 4618 mov r0, r3
800daf2: 3710 adds r7, #16
800daf4: 46bd mov sp, r7
800daf6: bd80 pop {r7, pc}
0800daf8 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800daf8: b580 push {r7, lr}
800dafa: b084 sub sp, #16
800dafc: af00 add r7, sp, #0
800dafe: 6078 str r0, [r7, #4]
800db00: 460b mov r3, r1
800db02: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800db04: 2300 movs r3, #0
800db06: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800db08: 2300 movs r3, #0
800db0a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800db0c: 687b ldr r3, [r7, #4]
800db0e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800db12: 78fa ldrb r2, [r7, #3]
800db14: 4611 mov r1, r2
800db16: 4618 mov r0, r3
800db18: f7f8 fdd9 bl 80066ce <HAL_PCD_EP_SetStall>
800db1c: 4603 mov r3, r0
800db1e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800db20: 7bfb ldrb r3, [r7, #15]
800db22: 4618 mov r0, r3
800db24: f000 f8ea bl 800dcfc <USBD_Get_USB_Status>
800db28: 4603 mov r3, r0
800db2a: 73bb strb r3, [r7, #14]
return usb_status;
800db2c: 7bbb ldrb r3, [r7, #14]
}
800db2e: 4618 mov r0, r3
800db30: 3710 adds r7, #16
800db32: 46bd mov sp, r7
800db34: bd80 pop {r7, pc}
0800db36 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800db36: b580 push {r7, lr}
800db38: b084 sub sp, #16
800db3a: af00 add r7, sp, #0
800db3c: 6078 str r0, [r7, #4]
800db3e: 460b mov r3, r1
800db40: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800db42: 2300 movs r3, #0
800db44: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800db46: 2300 movs r3, #0
800db48: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800db4a: 687b ldr r3, [r7, #4]
800db4c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800db50: 78fa ldrb r2, [r7, #3]
800db52: 4611 mov r1, r2
800db54: 4618 mov r0, r3
800db56: f7f8 fe1a bl 800678e <HAL_PCD_EP_ClrStall>
800db5a: 4603 mov r3, r0
800db5c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800db5e: 7bfb ldrb r3, [r7, #15]
800db60: 4618 mov r0, r3
800db62: f000 f8cb bl 800dcfc <USBD_Get_USB_Status>
800db66: 4603 mov r3, r0
800db68: 73bb strb r3, [r7, #14]
return usb_status;
800db6a: 7bbb ldrb r3, [r7, #14]
}
800db6c: 4618 mov r0, r3
800db6e: 3710 adds r7, #16
800db70: 46bd mov sp, r7
800db72: bd80 pop {r7, pc}
0800db74 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800db74: b480 push {r7}
800db76: b085 sub sp, #20
800db78: af00 add r7, sp, #0
800db7a: 6078 str r0, [r7, #4]
800db7c: 460b mov r3, r1
800db7e: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800db80: 687b ldr r3, [r7, #4]
800db82: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800db86: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800db88: f997 3003 ldrsb.w r3, [r7, #3]
800db8c: 2b00 cmp r3, #0
800db8e: da0b bge.n 800dba8 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800db90: 78fb ldrb r3, [r7, #3]
800db92: f003 027f and.w r2, r3, #127 @ 0x7f
800db96: 68f9 ldr r1, [r7, #12]
800db98: 4613 mov r3, r2
800db9a: 009b lsls r3, r3, #2
800db9c: 4413 add r3, r2
800db9e: 00db lsls r3, r3, #3
800dba0: 440b add r3, r1
800dba2: 3312 adds r3, #18
800dba4: 781b ldrb r3, [r3, #0]
800dba6: e00b b.n 800dbc0 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800dba8: 78fb ldrb r3, [r7, #3]
800dbaa: f003 027f and.w r2, r3, #127 @ 0x7f
800dbae: 68f9 ldr r1, [r7, #12]
800dbb0: 4613 mov r3, r2
800dbb2: 009b lsls r3, r3, #2
800dbb4: 4413 add r3, r2
800dbb6: 00db lsls r3, r3, #3
800dbb8: 440b add r3, r1
800dbba: f503 73a9 add.w r3, r3, #338 @ 0x152
800dbbe: 781b ldrb r3, [r3, #0]
}
}
800dbc0: 4618 mov r0, r3
800dbc2: 3714 adds r7, #20
800dbc4: 46bd mov sp, r7
800dbc6: bc80 pop {r7}
800dbc8: 4770 bx lr
0800dbca <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800dbca: b580 push {r7, lr}
800dbcc: b084 sub sp, #16
800dbce: af00 add r7, sp, #0
800dbd0: 6078 str r0, [r7, #4]
800dbd2: 460b mov r3, r1
800dbd4: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800dbd6: 2300 movs r3, #0
800dbd8: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800dbda: 2300 movs r3, #0
800dbdc: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800dbde: 687b ldr r3, [r7, #4]
800dbe0: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800dbe4: 78fa ldrb r2, [r7, #3]
800dbe6: 4611 mov r1, r2
800dbe8: 4618 mov r0, r3
800dbea: f7f8 fc28 bl 800643e <HAL_PCD_SetAddress>
800dbee: 4603 mov r3, r0
800dbf0: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800dbf2: 7bfb ldrb r3, [r7, #15]
800dbf4: 4618 mov r0, r3
800dbf6: f000 f881 bl 800dcfc <USBD_Get_USB_Status>
800dbfa: 4603 mov r3, r0
800dbfc: 73bb strb r3, [r7, #14]
return usb_status;
800dbfe: 7bbb ldrb r3, [r7, #14]
}
800dc00: 4618 mov r0, r3
800dc02: 3710 adds r7, #16
800dc04: 46bd mov sp, r7
800dc06: bd80 pop {r7, pc}
0800dc08 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800dc08: b580 push {r7, lr}
800dc0a: b086 sub sp, #24
800dc0c: af00 add r7, sp, #0
800dc0e: 60f8 str r0, [r7, #12]
800dc10: 607a str r2, [r7, #4]
800dc12: 461a mov r2, r3
800dc14: 460b mov r3, r1
800dc16: 72fb strb r3, [r7, #11]
800dc18: 4613 mov r3, r2
800dc1a: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800dc1c: 2300 movs r3, #0
800dc1e: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800dc20: 2300 movs r3, #0
800dc22: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800dc24: 68fb ldr r3, [r7, #12]
800dc26: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800dc2a: 893b ldrh r3, [r7, #8]
800dc2c: 7af9 ldrb r1, [r7, #11]
800dc2e: 687a ldr r2, [r7, #4]
800dc30: f7f8 fd16 bl 8006660 <HAL_PCD_EP_Transmit>
800dc34: 4603 mov r3, r0
800dc36: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800dc38: 7dfb ldrb r3, [r7, #23]
800dc3a: 4618 mov r0, r3
800dc3c: f000 f85e bl 800dcfc <USBD_Get_USB_Status>
800dc40: 4603 mov r3, r0
800dc42: 75bb strb r3, [r7, #22]
return usb_status;
800dc44: 7dbb ldrb r3, [r7, #22]
}
800dc46: 4618 mov r0, r3
800dc48: 3718 adds r7, #24
800dc4a: 46bd mov sp, r7
800dc4c: bd80 pop {r7, pc}
0800dc4e <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800dc4e: b580 push {r7, lr}
800dc50: b086 sub sp, #24
800dc52: af00 add r7, sp, #0
800dc54: 60f8 str r0, [r7, #12]
800dc56: 607a str r2, [r7, #4]
800dc58: 461a mov r2, r3
800dc5a: 460b mov r3, r1
800dc5c: 72fb strb r3, [r7, #11]
800dc5e: 4613 mov r3, r2
800dc60: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800dc62: 2300 movs r3, #0
800dc64: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800dc66: 2300 movs r3, #0
800dc68: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800dc6a: 68fb ldr r3, [r7, #12]
800dc6c: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800dc70: 893b ldrh r3, [r7, #8]
800dc72: 7af9 ldrb r1, [r7, #11]
800dc74: 687a ldr r2, [r7, #4]
800dc76: f7f8 fcab bl 80065d0 <HAL_PCD_EP_Receive>
800dc7a: 4603 mov r3, r0
800dc7c: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800dc7e: 7dfb ldrb r3, [r7, #23]
800dc80: 4618 mov r0, r3
800dc82: f000 f83b bl 800dcfc <USBD_Get_USB_Status>
800dc86: 4603 mov r3, r0
800dc88: 75bb strb r3, [r7, #22]
return usb_status;
800dc8a: 7dbb ldrb r3, [r7, #22]
}
800dc8c: 4618 mov r0, r3
800dc8e: 3718 adds r7, #24
800dc90: 46bd mov sp, r7
800dc92: bd80 pop {r7, pc}
0800dc94 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800dc94: b580 push {r7, lr}
800dc96: b082 sub sp, #8
800dc98: af00 add r7, sp, #0
800dc9a: 6078 str r0, [r7, #4]
800dc9c: 460b mov r3, r1
800dc9e: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800dca0: 687b ldr r3, [r7, #4]
800dca2: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800dca6: 78fa ldrb r2, [r7, #3]
800dca8: 4611 mov r1, r2
800dcaa: 4618 mov r0, r3
800dcac: f7f8 fcc1 bl 8006632 <HAL_PCD_EP_GetRxCount>
800dcb0: 4603 mov r3, r0
}
800dcb2: 4618 mov r0, r3
800dcb4: 3708 adds r7, #8
800dcb6: 46bd mov sp, r7
800dcb8: bd80 pop {r7, pc}
...
0800dcbc <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800dcbc: b480 push {r7}
800dcbe: b083 sub sp, #12
800dcc0: af00 add r7, sp, #0
800dcc2: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800dcc4: 4b02 ldr r3, [pc, #8] @ (800dcd0 <USBD_static_malloc+0x14>)
}
800dcc6: 4618 mov r0, r3
800dcc8: 370c adds r7, #12
800dcca: 46bd mov sp, r7
800dccc: bc80 pop {r7}
800dcce: 4770 bx lr
800dcd0: 20001534 .word 0x20001534
0800dcd4 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800dcd4: b480 push {r7}
800dcd6: b083 sub sp, #12
800dcd8: af00 add r7, sp, #0
800dcda: 6078 str r0, [r7, #4]
}
800dcdc: bf00 nop
800dcde: 370c adds r7, #12
800dce0: 46bd mov sp, r7
800dce2: bc80 pop {r7}
800dce4: 4770 bx lr
0800dce6 <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800dce6: b480 push {r7}
800dce8: b083 sub sp, #12
800dcea: af00 add r7, sp, #0
800dcec: 6078 str r0, [r7, #4]
800dcee: 460b mov r3, r1
800dcf0: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800dcf2: bf00 nop
800dcf4: 370c adds r7, #12
800dcf6: 46bd mov sp, r7
800dcf8: bc80 pop {r7}
800dcfa: 4770 bx lr
0800dcfc <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800dcfc: b480 push {r7}
800dcfe: b085 sub sp, #20
800dd00: af00 add r7, sp, #0
800dd02: 4603 mov r3, r0
800dd04: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800dd06: 2300 movs r3, #0
800dd08: 73fb strb r3, [r7, #15]
switch (hal_status)
800dd0a: 79fb ldrb r3, [r7, #7]
800dd0c: 2b03 cmp r3, #3
800dd0e: d817 bhi.n 800dd40 <USBD_Get_USB_Status+0x44>
800dd10: a201 add r2, pc, #4 @ (adr r2, 800dd18 <USBD_Get_USB_Status+0x1c>)
800dd12: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800dd16: bf00 nop
800dd18: 0800dd29 .word 0x0800dd29
800dd1c: 0800dd2f .word 0x0800dd2f
800dd20: 0800dd35 .word 0x0800dd35
800dd24: 0800dd3b .word 0x0800dd3b
{
case HAL_OK :
usb_status = USBD_OK;
800dd28: 2300 movs r3, #0
800dd2a: 73fb strb r3, [r7, #15]
break;
800dd2c: e00b b.n 800dd46 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800dd2e: 2302 movs r3, #2
800dd30: 73fb strb r3, [r7, #15]
break;
800dd32: e008 b.n 800dd46 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800dd34: 2301 movs r3, #1
800dd36: 73fb strb r3, [r7, #15]
break;
800dd38: e005 b.n 800dd46 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800dd3a: 2302 movs r3, #2
800dd3c: 73fb strb r3, [r7, #15]
break;
800dd3e: e002 b.n 800dd46 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800dd40: 2302 movs r3, #2
800dd42: 73fb strb r3, [r7, #15]
break;
800dd44: bf00 nop
}
return usb_status;
800dd46: 7bfb ldrb r3, [r7, #15]
}
800dd48: 4618 mov r0, r3
800dd4a: 3714 adds r7, #20
800dd4c: 46bd mov sp, r7
800dd4e: bc80 pop {r7}
800dd50: 4770 bx lr
800dd52: bf00 nop
0800dd54 <siprintf>:
800dd54: b40e push {r1, r2, r3}
800dd56: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800dd5a: b510 push {r4, lr}
800dd5c: 2400 movs r4, #0
800dd5e: b09d sub sp, #116 @ 0x74
800dd60: ab1f add r3, sp, #124 @ 0x7c
800dd62: 9002 str r0, [sp, #8]
800dd64: 9006 str r0, [sp, #24]
800dd66: 9107 str r1, [sp, #28]
800dd68: 9104 str r1, [sp, #16]
800dd6a: 4809 ldr r0, [pc, #36] @ (800dd90 <siprintf+0x3c>)
800dd6c: 4909 ldr r1, [pc, #36] @ (800dd94 <siprintf+0x40>)
800dd6e: f853 2b04 ldr.w r2, [r3], #4
800dd72: 9105 str r1, [sp, #20]
800dd74: 6800 ldr r0, [r0, #0]
800dd76: a902 add r1, sp, #8
800dd78: 9301 str r3, [sp, #4]
800dd7a: 941b str r4, [sp, #108] @ 0x6c
800dd7c: f000 f992 bl 800e0a4 <_svfiprintf_r>
800dd80: 9b02 ldr r3, [sp, #8]
800dd82: 701c strb r4, [r3, #0]
800dd84: b01d add sp, #116 @ 0x74
800dd86: e8bd 4010 ldmia.w sp!, {r4, lr}
800dd8a: b003 add sp, #12
800dd8c: 4770 bx lr
800dd8e: bf00 nop
800dd90: 2000018c .word 0x2000018c
800dd94: ffff0208 .word 0xffff0208
0800dd98 <memset>:
800dd98: 4603 mov r3, r0
800dd9a: 4402 add r2, r0
800dd9c: 4293 cmp r3, r2
800dd9e: d100 bne.n 800dda2 <memset+0xa>
800dda0: 4770 bx lr
800dda2: f803 1b01 strb.w r1, [r3], #1
800dda6: e7f9 b.n 800dd9c <memset+0x4>
0800dda8 <__errno>:
800dda8: 4b01 ldr r3, [pc, #4] @ (800ddb0 <__errno+0x8>)
800ddaa: 6818 ldr r0, [r3, #0]
800ddac: 4770 bx lr
800ddae: bf00 nop
800ddb0: 2000018c .word 0x2000018c
0800ddb4 <__libc_init_array>:
800ddb4: b570 push {r4, r5, r6, lr}
800ddb6: 2600 movs r6, #0
800ddb8: 4d0c ldr r5, [pc, #48] @ (800ddec <__libc_init_array+0x38>)
800ddba: 4c0d ldr r4, [pc, #52] @ (800ddf0 <__libc_init_array+0x3c>)
800ddbc: 1b64 subs r4, r4, r5
800ddbe: 10a4 asrs r4, r4, #2
800ddc0: 42a6 cmp r6, r4
800ddc2: d109 bne.n 800ddd8 <__libc_init_array+0x24>
800ddc4: f000 fc76 bl 800e6b4 <_init>
800ddc8: 2600 movs r6, #0
800ddca: 4d0a ldr r5, [pc, #40] @ (800ddf4 <__libc_init_array+0x40>)
800ddcc: 4c0a ldr r4, [pc, #40] @ (800ddf8 <__libc_init_array+0x44>)
800ddce: 1b64 subs r4, r4, r5
800ddd0: 10a4 asrs r4, r4, #2
800ddd2: 42a6 cmp r6, r4
800ddd4: d105 bne.n 800dde2 <__libc_init_array+0x2e>
800ddd6: bd70 pop {r4, r5, r6, pc}
800ddd8: f855 3b04 ldr.w r3, [r5], #4
800dddc: 4798 blx r3
800ddde: 3601 adds r6, #1
800dde0: e7ee b.n 800ddc0 <__libc_init_array+0xc>
800dde2: f855 3b04 ldr.w r3, [r5], #4
800dde6: 4798 blx r3
800dde8: 3601 adds r6, #1
800ddea: e7f2 b.n 800ddd2 <__libc_init_array+0x1e>
800ddec: 0800ece4 .word 0x0800ece4
800ddf0: 0800ece4 .word 0x0800ece4
800ddf4: 0800ece4 .word 0x0800ece4
800ddf8: 0800ece8 .word 0x0800ece8
0800ddfc <__retarget_lock_acquire_recursive>:
800ddfc: 4770 bx lr
0800ddfe <__retarget_lock_release_recursive>:
800ddfe: 4770 bx lr
0800de00 <_free_r>:
800de00: b538 push {r3, r4, r5, lr}
800de02: 4605 mov r5, r0
800de04: 2900 cmp r1, #0
800de06: d040 beq.n 800de8a <_free_r+0x8a>
800de08: f851 3c04 ldr.w r3, [r1, #-4]
800de0c: 1f0c subs r4, r1, #4
800de0e: 2b00 cmp r3, #0
800de10: bfb8 it lt
800de12: 18e4 addlt r4, r4, r3
800de14: f000 f8de bl 800dfd4 <__malloc_lock>
800de18: 4a1c ldr r2, [pc, #112] @ (800de8c <_free_r+0x8c>)
800de1a: 6813 ldr r3, [r2, #0]
800de1c: b933 cbnz r3, 800de2c <_free_r+0x2c>
800de1e: 6063 str r3, [r4, #4]
800de20: 6014 str r4, [r2, #0]
800de22: 4628 mov r0, r5
800de24: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800de28: f000 b8da b.w 800dfe0 <__malloc_unlock>
800de2c: 42a3 cmp r3, r4
800de2e: d908 bls.n 800de42 <_free_r+0x42>
800de30: 6820 ldr r0, [r4, #0]
800de32: 1821 adds r1, r4, r0
800de34: 428b cmp r3, r1
800de36: bf01 itttt eq
800de38: 6819 ldreq r1, [r3, #0]
800de3a: 685b ldreq r3, [r3, #4]
800de3c: 1809 addeq r1, r1, r0
800de3e: 6021 streq r1, [r4, #0]
800de40: e7ed b.n 800de1e <_free_r+0x1e>
800de42: 461a mov r2, r3
800de44: 685b ldr r3, [r3, #4]
800de46: b10b cbz r3, 800de4c <_free_r+0x4c>
800de48: 42a3 cmp r3, r4
800de4a: d9fa bls.n 800de42 <_free_r+0x42>
800de4c: 6811 ldr r1, [r2, #0]
800de4e: 1850 adds r0, r2, r1
800de50: 42a0 cmp r0, r4
800de52: d10b bne.n 800de6c <_free_r+0x6c>
800de54: 6820 ldr r0, [r4, #0]
800de56: 4401 add r1, r0
800de58: 1850 adds r0, r2, r1
800de5a: 4283 cmp r3, r0
800de5c: 6011 str r1, [r2, #0]
800de5e: d1e0 bne.n 800de22 <_free_r+0x22>
800de60: 6818 ldr r0, [r3, #0]
800de62: 685b ldr r3, [r3, #4]
800de64: 4408 add r0, r1
800de66: 6010 str r0, [r2, #0]
800de68: 6053 str r3, [r2, #4]
800de6a: e7da b.n 800de22 <_free_r+0x22>
800de6c: d902 bls.n 800de74 <_free_r+0x74>
800de6e: 230c movs r3, #12
800de70: 602b str r3, [r5, #0]
800de72: e7d6 b.n 800de22 <_free_r+0x22>
800de74: 6820 ldr r0, [r4, #0]
800de76: 1821 adds r1, r4, r0
800de78: 428b cmp r3, r1
800de7a: bf01 itttt eq
800de7c: 6819 ldreq r1, [r3, #0]
800de7e: 685b ldreq r3, [r3, #4]
800de80: 1809 addeq r1, r1, r0
800de82: 6021 streq r1, [r4, #0]
800de84: 6063 str r3, [r4, #4]
800de86: 6054 str r4, [r2, #4]
800de88: e7cb b.n 800de22 <_free_r+0x22>
800de8a: bd38 pop {r3, r4, r5, pc}
800de8c: 20001898 .word 0x20001898
0800de90 <sbrk_aligned>:
800de90: b570 push {r4, r5, r6, lr}
800de92: 4e0f ldr r6, [pc, #60] @ (800ded0 <sbrk_aligned+0x40>)
800de94: 460c mov r4, r1
800de96: 6831 ldr r1, [r6, #0]
800de98: 4605 mov r5, r0
800de9a: b911 cbnz r1, 800dea2 <sbrk_aligned+0x12>
800de9c: f000 fba8 bl 800e5f0 <_sbrk_r>
800dea0: 6030 str r0, [r6, #0]
800dea2: 4621 mov r1, r4
800dea4: 4628 mov r0, r5
800dea6: f000 fba3 bl 800e5f0 <_sbrk_r>
800deaa: 1c43 adds r3, r0, #1
800deac: d103 bne.n 800deb6 <sbrk_aligned+0x26>
800deae: f04f 34ff mov.w r4, #4294967295
800deb2: 4620 mov r0, r4
800deb4: bd70 pop {r4, r5, r6, pc}
800deb6: 1cc4 adds r4, r0, #3
800deb8: f024 0403 bic.w r4, r4, #3
800debc: 42a0 cmp r0, r4
800debe: d0f8 beq.n 800deb2 <sbrk_aligned+0x22>
800dec0: 1a21 subs r1, r4, r0
800dec2: 4628 mov r0, r5
800dec4: f000 fb94 bl 800e5f0 <_sbrk_r>
800dec8: 3001 adds r0, #1
800deca: d1f2 bne.n 800deb2 <sbrk_aligned+0x22>
800decc: e7ef b.n 800deae <sbrk_aligned+0x1e>
800dece: bf00 nop
800ded0: 20001894 .word 0x20001894
0800ded4 <_malloc_r>:
800ded4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800ded8: 1ccd adds r5, r1, #3
800deda: f025 0503 bic.w r5, r5, #3
800dede: 3508 adds r5, #8
800dee0: 2d0c cmp r5, #12
800dee2: bf38 it cc
800dee4: 250c movcc r5, #12
800dee6: 2d00 cmp r5, #0
800dee8: 4606 mov r6, r0
800deea: db01 blt.n 800def0 <_malloc_r+0x1c>
800deec: 42a9 cmp r1, r5
800deee: d904 bls.n 800defa <_malloc_r+0x26>
800def0: 230c movs r3, #12
800def2: 6033 str r3, [r6, #0]
800def4: 2000 movs r0, #0
800def6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800defa: f8df 80d4 ldr.w r8, [pc, #212] @ 800dfd0 <_malloc_r+0xfc>
800defe: f000 f869 bl 800dfd4 <__malloc_lock>
800df02: f8d8 3000 ldr.w r3, [r8]
800df06: 461c mov r4, r3
800df08: bb44 cbnz r4, 800df5c <_malloc_r+0x88>
800df0a: 4629 mov r1, r5
800df0c: 4630 mov r0, r6
800df0e: f7ff ffbf bl 800de90 <sbrk_aligned>
800df12: 1c43 adds r3, r0, #1
800df14: 4604 mov r4, r0
800df16: d158 bne.n 800dfca <_malloc_r+0xf6>
800df18: f8d8 4000 ldr.w r4, [r8]
800df1c: 4627 mov r7, r4
800df1e: 2f00 cmp r7, #0
800df20: d143 bne.n 800dfaa <_malloc_r+0xd6>
800df22: 2c00 cmp r4, #0
800df24: d04b beq.n 800dfbe <_malloc_r+0xea>
800df26: 6823 ldr r3, [r4, #0]
800df28: 4639 mov r1, r7
800df2a: 4630 mov r0, r6
800df2c: eb04 0903 add.w r9, r4, r3
800df30: f000 fb5e bl 800e5f0 <_sbrk_r>
800df34: 4581 cmp r9, r0
800df36: d142 bne.n 800dfbe <_malloc_r+0xea>
800df38: 6821 ldr r1, [r4, #0]
800df3a: 4630 mov r0, r6
800df3c: 1a6d subs r5, r5, r1
800df3e: 4629 mov r1, r5
800df40: f7ff ffa6 bl 800de90 <sbrk_aligned>
800df44: 3001 adds r0, #1
800df46: d03a beq.n 800dfbe <_malloc_r+0xea>
800df48: 6823 ldr r3, [r4, #0]
800df4a: 442b add r3, r5
800df4c: 6023 str r3, [r4, #0]
800df4e: f8d8 3000 ldr.w r3, [r8]
800df52: 685a ldr r2, [r3, #4]
800df54: bb62 cbnz r2, 800dfb0 <_malloc_r+0xdc>
800df56: f8c8 7000 str.w r7, [r8]
800df5a: e00f b.n 800df7c <_malloc_r+0xa8>
800df5c: 6822 ldr r2, [r4, #0]
800df5e: 1b52 subs r2, r2, r5
800df60: d420 bmi.n 800dfa4 <_malloc_r+0xd0>
800df62: 2a0b cmp r2, #11
800df64: d917 bls.n 800df96 <_malloc_r+0xc2>
800df66: 1961 adds r1, r4, r5
800df68: 42a3 cmp r3, r4
800df6a: 6025 str r5, [r4, #0]
800df6c: bf18 it ne
800df6e: 6059 strne r1, [r3, #4]
800df70: 6863 ldr r3, [r4, #4]
800df72: bf08 it eq
800df74: f8c8 1000 streq.w r1, [r8]
800df78: 5162 str r2, [r4, r5]
800df7a: 604b str r3, [r1, #4]
800df7c: 4630 mov r0, r6
800df7e: f000 f82f bl 800dfe0 <__malloc_unlock>
800df82: f104 000b add.w r0, r4, #11
800df86: 1d23 adds r3, r4, #4
800df88: f020 0007 bic.w r0, r0, #7
800df8c: 1ac2 subs r2, r0, r3
800df8e: bf1c itt ne
800df90: 1a1b subne r3, r3, r0
800df92: 50a3 strne r3, [r4, r2]
800df94: e7af b.n 800def6 <_malloc_r+0x22>
800df96: 6862 ldr r2, [r4, #4]
800df98: 42a3 cmp r3, r4
800df9a: bf0c ite eq
800df9c: f8c8 2000 streq.w r2, [r8]
800dfa0: 605a strne r2, [r3, #4]
800dfa2: e7eb b.n 800df7c <_malloc_r+0xa8>
800dfa4: 4623 mov r3, r4
800dfa6: 6864 ldr r4, [r4, #4]
800dfa8: e7ae b.n 800df08 <_malloc_r+0x34>
800dfaa: 463c mov r4, r7
800dfac: 687f ldr r7, [r7, #4]
800dfae: e7b6 b.n 800df1e <_malloc_r+0x4a>
800dfb0: 461a mov r2, r3
800dfb2: 685b ldr r3, [r3, #4]
800dfb4: 42a3 cmp r3, r4
800dfb6: d1fb bne.n 800dfb0 <_malloc_r+0xdc>
800dfb8: 2300 movs r3, #0
800dfba: 6053 str r3, [r2, #4]
800dfbc: e7de b.n 800df7c <_malloc_r+0xa8>
800dfbe: 230c movs r3, #12
800dfc0: 4630 mov r0, r6
800dfc2: 6033 str r3, [r6, #0]
800dfc4: f000 f80c bl 800dfe0 <__malloc_unlock>
800dfc8: e794 b.n 800def4 <_malloc_r+0x20>
800dfca: 6005 str r5, [r0, #0]
800dfcc: e7d6 b.n 800df7c <_malloc_r+0xa8>
800dfce: bf00 nop
800dfd0: 20001898 .word 0x20001898
0800dfd4 <__malloc_lock>:
800dfd4: 4801 ldr r0, [pc, #4] @ (800dfdc <__malloc_lock+0x8>)
800dfd6: f7ff bf11 b.w 800ddfc <__retarget_lock_acquire_recursive>
800dfda: bf00 nop
800dfdc: 20001890 .word 0x20001890
0800dfe0 <__malloc_unlock>:
800dfe0: 4801 ldr r0, [pc, #4] @ (800dfe8 <__malloc_unlock+0x8>)
800dfe2: f7ff bf0c b.w 800ddfe <__retarget_lock_release_recursive>
800dfe6: bf00 nop
800dfe8: 20001890 .word 0x20001890
0800dfec <__ssputs_r>:
800dfec: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800dff0: 461f mov r7, r3
800dff2: 688e ldr r6, [r1, #8]
800dff4: 4682 mov sl, r0
800dff6: 42be cmp r6, r7
800dff8: 460c mov r4, r1
800dffa: 4690 mov r8, r2
800dffc: 680b ldr r3, [r1, #0]
800dffe: d82d bhi.n 800e05c <__ssputs_r+0x70>
800e000: f9b1 200c ldrsh.w r2, [r1, #12]
800e004: f412 6f90 tst.w r2, #1152 @ 0x480
800e008: d026 beq.n 800e058 <__ssputs_r+0x6c>
800e00a: 6965 ldr r5, [r4, #20]
800e00c: 6909 ldr r1, [r1, #16]
800e00e: eb05 0545 add.w r5, r5, r5, lsl #1
800e012: eba3 0901 sub.w r9, r3, r1
800e016: eb05 75d5 add.w r5, r5, r5, lsr #31
800e01a: 1c7b adds r3, r7, #1
800e01c: 444b add r3, r9
800e01e: 106d asrs r5, r5, #1
800e020: 429d cmp r5, r3
800e022: bf38 it cc
800e024: 461d movcc r5, r3
800e026: 0553 lsls r3, r2, #21
800e028: d527 bpl.n 800e07a <__ssputs_r+0x8e>
800e02a: 4629 mov r1, r5
800e02c: f7ff ff52 bl 800ded4 <_malloc_r>
800e030: 4606 mov r6, r0
800e032: b360 cbz r0, 800e08e <__ssputs_r+0xa2>
800e034: 464a mov r2, r9
800e036: 6921 ldr r1, [r4, #16]
800e038: f000 faf8 bl 800e62c <memcpy>
800e03c: 89a3 ldrh r3, [r4, #12]
800e03e: f423 6390 bic.w r3, r3, #1152 @ 0x480
800e042: f043 0380 orr.w r3, r3, #128 @ 0x80
800e046: 81a3 strh r3, [r4, #12]
800e048: 6126 str r6, [r4, #16]
800e04a: 444e add r6, r9
800e04c: 6026 str r6, [r4, #0]
800e04e: 463e mov r6, r7
800e050: 6165 str r5, [r4, #20]
800e052: eba5 0509 sub.w r5, r5, r9
800e056: 60a5 str r5, [r4, #8]
800e058: 42be cmp r6, r7
800e05a: d900 bls.n 800e05e <__ssputs_r+0x72>
800e05c: 463e mov r6, r7
800e05e: 4632 mov r2, r6
800e060: 4641 mov r1, r8
800e062: 6820 ldr r0, [r4, #0]
800e064: f000 faaa bl 800e5bc <memmove>
800e068: 2000 movs r0, #0
800e06a: 68a3 ldr r3, [r4, #8]
800e06c: 1b9b subs r3, r3, r6
800e06e: 60a3 str r3, [r4, #8]
800e070: 6823 ldr r3, [r4, #0]
800e072: 4433 add r3, r6
800e074: 6023 str r3, [r4, #0]
800e076: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e07a: 462a mov r2, r5
800e07c: f000 fae4 bl 800e648 <_realloc_r>
800e080: 4606 mov r6, r0
800e082: 2800 cmp r0, #0
800e084: d1e0 bne.n 800e048 <__ssputs_r+0x5c>
800e086: 4650 mov r0, sl
800e088: 6921 ldr r1, [r4, #16]
800e08a: f7ff feb9 bl 800de00 <_free_r>
800e08e: 230c movs r3, #12
800e090: f8ca 3000 str.w r3, [sl]
800e094: 89a3 ldrh r3, [r4, #12]
800e096: f04f 30ff mov.w r0, #4294967295
800e09a: f043 0340 orr.w r3, r3, #64 @ 0x40
800e09e: 81a3 strh r3, [r4, #12]
800e0a0: e7e9 b.n 800e076 <__ssputs_r+0x8a>
...
0800e0a4 <_svfiprintf_r>:
800e0a4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800e0a8: 4698 mov r8, r3
800e0aa: 898b ldrh r3, [r1, #12]
800e0ac: 4607 mov r7, r0
800e0ae: 061b lsls r3, r3, #24
800e0b0: 460d mov r5, r1
800e0b2: 4614 mov r4, r2
800e0b4: b09d sub sp, #116 @ 0x74
800e0b6: d510 bpl.n 800e0da <_svfiprintf_r+0x36>
800e0b8: 690b ldr r3, [r1, #16]
800e0ba: b973 cbnz r3, 800e0da <_svfiprintf_r+0x36>
800e0bc: 2140 movs r1, #64 @ 0x40
800e0be: f7ff ff09 bl 800ded4 <_malloc_r>
800e0c2: 6028 str r0, [r5, #0]
800e0c4: 6128 str r0, [r5, #16]
800e0c6: b930 cbnz r0, 800e0d6 <_svfiprintf_r+0x32>
800e0c8: 230c movs r3, #12
800e0ca: 603b str r3, [r7, #0]
800e0cc: f04f 30ff mov.w r0, #4294967295
800e0d0: b01d add sp, #116 @ 0x74
800e0d2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800e0d6: 2340 movs r3, #64 @ 0x40
800e0d8: 616b str r3, [r5, #20]
800e0da: 2300 movs r3, #0
800e0dc: 9309 str r3, [sp, #36] @ 0x24
800e0de: 2320 movs r3, #32
800e0e0: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800e0e4: 2330 movs r3, #48 @ 0x30
800e0e6: f04f 0901 mov.w r9, #1
800e0ea: f8cd 800c str.w r8, [sp, #12]
800e0ee: f8df 8198 ldr.w r8, [pc, #408] @ 800e288 <_svfiprintf_r+0x1e4>
800e0f2: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800e0f6: 4623 mov r3, r4
800e0f8: 469a mov sl, r3
800e0fa: f813 2b01 ldrb.w r2, [r3], #1
800e0fe: b10a cbz r2, 800e104 <_svfiprintf_r+0x60>
800e100: 2a25 cmp r2, #37 @ 0x25
800e102: d1f9 bne.n 800e0f8 <_svfiprintf_r+0x54>
800e104: ebba 0b04 subs.w fp, sl, r4
800e108: d00b beq.n 800e122 <_svfiprintf_r+0x7e>
800e10a: 465b mov r3, fp
800e10c: 4622 mov r2, r4
800e10e: 4629 mov r1, r5
800e110: 4638 mov r0, r7
800e112: f7ff ff6b bl 800dfec <__ssputs_r>
800e116: 3001 adds r0, #1
800e118: f000 80a7 beq.w 800e26a <_svfiprintf_r+0x1c6>
800e11c: 9a09 ldr r2, [sp, #36] @ 0x24
800e11e: 445a add r2, fp
800e120: 9209 str r2, [sp, #36] @ 0x24
800e122: f89a 3000 ldrb.w r3, [sl]
800e126: 2b00 cmp r3, #0
800e128: f000 809f beq.w 800e26a <_svfiprintf_r+0x1c6>
800e12c: 2300 movs r3, #0
800e12e: f04f 32ff mov.w r2, #4294967295
800e132: e9cd 2305 strd r2, r3, [sp, #20]
800e136: f10a 0a01 add.w sl, sl, #1
800e13a: 9304 str r3, [sp, #16]
800e13c: 9307 str r3, [sp, #28]
800e13e: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800e142: 931a str r3, [sp, #104] @ 0x68
800e144: 4654 mov r4, sl
800e146: 2205 movs r2, #5
800e148: f814 1b01 ldrb.w r1, [r4], #1
800e14c: 484e ldr r0, [pc, #312] @ (800e288 <_svfiprintf_r+0x1e4>)
800e14e: f000 fa5f bl 800e610 <memchr>
800e152: 9a04 ldr r2, [sp, #16]
800e154: b9d8 cbnz r0, 800e18e <_svfiprintf_r+0xea>
800e156: 06d0 lsls r0, r2, #27
800e158: bf44 itt mi
800e15a: 2320 movmi r3, #32
800e15c: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e160: 0711 lsls r1, r2, #28
800e162: bf44 itt mi
800e164: 232b movmi r3, #43 @ 0x2b
800e166: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e16a: f89a 3000 ldrb.w r3, [sl]
800e16e: 2b2a cmp r3, #42 @ 0x2a
800e170: d015 beq.n 800e19e <_svfiprintf_r+0xfa>
800e172: 4654 mov r4, sl
800e174: 2000 movs r0, #0
800e176: f04f 0c0a mov.w ip, #10
800e17a: 9a07 ldr r2, [sp, #28]
800e17c: 4621 mov r1, r4
800e17e: f811 3b01 ldrb.w r3, [r1], #1
800e182: 3b30 subs r3, #48 @ 0x30
800e184: 2b09 cmp r3, #9
800e186: d94b bls.n 800e220 <_svfiprintf_r+0x17c>
800e188: b1b0 cbz r0, 800e1b8 <_svfiprintf_r+0x114>
800e18a: 9207 str r2, [sp, #28]
800e18c: e014 b.n 800e1b8 <_svfiprintf_r+0x114>
800e18e: eba0 0308 sub.w r3, r0, r8
800e192: fa09 f303 lsl.w r3, r9, r3
800e196: 4313 orrs r3, r2
800e198: 46a2 mov sl, r4
800e19a: 9304 str r3, [sp, #16]
800e19c: e7d2 b.n 800e144 <_svfiprintf_r+0xa0>
800e19e: 9b03 ldr r3, [sp, #12]
800e1a0: 1d19 adds r1, r3, #4
800e1a2: 681b ldr r3, [r3, #0]
800e1a4: 9103 str r1, [sp, #12]
800e1a6: 2b00 cmp r3, #0
800e1a8: bfbb ittet lt
800e1aa: 425b neglt r3, r3
800e1ac: f042 0202 orrlt.w r2, r2, #2
800e1b0: 9307 strge r3, [sp, #28]
800e1b2: 9307 strlt r3, [sp, #28]
800e1b4: bfb8 it lt
800e1b6: 9204 strlt r2, [sp, #16]
800e1b8: 7823 ldrb r3, [r4, #0]
800e1ba: 2b2e cmp r3, #46 @ 0x2e
800e1bc: d10a bne.n 800e1d4 <_svfiprintf_r+0x130>
800e1be: 7863 ldrb r3, [r4, #1]
800e1c0: 2b2a cmp r3, #42 @ 0x2a
800e1c2: d132 bne.n 800e22a <_svfiprintf_r+0x186>
800e1c4: 9b03 ldr r3, [sp, #12]
800e1c6: 3402 adds r4, #2
800e1c8: 1d1a adds r2, r3, #4
800e1ca: 681b ldr r3, [r3, #0]
800e1cc: 9203 str r2, [sp, #12]
800e1ce: ea43 73e3 orr.w r3, r3, r3, asr #31
800e1d2: 9305 str r3, [sp, #20]
800e1d4: f8df a0b4 ldr.w sl, [pc, #180] @ 800e28c <_svfiprintf_r+0x1e8>
800e1d8: 2203 movs r2, #3
800e1da: 4650 mov r0, sl
800e1dc: 7821 ldrb r1, [r4, #0]
800e1de: f000 fa17 bl 800e610 <memchr>
800e1e2: b138 cbz r0, 800e1f4 <_svfiprintf_r+0x150>
800e1e4: 2240 movs r2, #64 @ 0x40
800e1e6: 9b04 ldr r3, [sp, #16]
800e1e8: eba0 000a sub.w r0, r0, sl
800e1ec: 4082 lsls r2, r0
800e1ee: 4313 orrs r3, r2
800e1f0: 3401 adds r4, #1
800e1f2: 9304 str r3, [sp, #16]
800e1f4: f814 1b01 ldrb.w r1, [r4], #1
800e1f8: 2206 movs r2, #6
800e1fa: 4825 ldr r0, [pc, #148] @ (800e290 <_svfiprintf_r+0x1ec>)
800e1fc: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800e200: f000 fa06 bl 800e610 <memchr>
800e204: 2800 cmp r0, #0
800e206: d036 beq.n 800e276 <_svfiprintf_r+0x1d2>
800e208: 4b22 ldr r3, [pc, #136] @ (800e294 <_svfiprintf_r+0x1f0>)
800e20a: bb1b cbnz r3, 800e254 <_svfiprintf_r+0x1b0>
800e20c: 9b03 ldr r3, [sp, #12]
800e20e: 3307 adds r3, #7
800e210: f023 0307 bic.w r3, r3, #7
800e214: 3308 adds r3, #8
800e216: 9303 str r3, [sp, #12]
800e218: 9b09 ldr r3, [sp, #36] @ 0x24
800e21a: 4433 add r3, r6
800e21c: 9309 str r3, [sp, #36] @ 0x24
800e21e: e76a b.n 800e0f6 <_svfiprintf_r+0x52>
800e220: 460c mov r4, r1
800e222: 2001 movs r0, #1
800e224: fb0c 3202 mla r2, ip, r2, r3
800e228: e7a8 b.n 800e17c <_svfiprintf_r+0xd8>
800e22a: 2300 movs r3, #0
800e22c: f04f 0c0a mov.w ip, #10
800e230: 4619 mov r1, r3
800e232: 3401 adds r4, #1
800e234: 9305 str r3, [sp, #20]
800e236: 4620 mov r0, r4
800e238: f810 2b01 ldrb.w r2, [r0], #1
800e23c: 3a30 subs r2, #48 @ 0x30
800e23e: 2a09 cmp r2, #9
800e240: d903 bls.n 800e24a <_svfiprintf_r+0x1a6>
800e242: 2b00 cmp r3, #0
800e244: d0c6 beq.n 800e1d4 <_svfiprintf_r+0x130>
800e246: 9105 str r1, [sp, #20]
800e248: e7c4 b.n 800e1d4 <_svfiprintf_r+0x130>
800e24a: 4604 mov r4, r0
800e24c: 2301 movs r3, #1
800e24e: fb0c 2101 mla r1, ip, r1, r2
800e252: e7f0 b.n 800e236 <_svfiprintf_r+0x192>
800e254: ab03 add r3, sp, #12
800e256: 9300 str r3, [sp, #0]
800e258: 462a mov r2, r5
800e25a: 4638 mov r0, r7
800e25c: 4b0e ldr r3, [pc, #56] @ (800e298 <_svfiprintf_r+0x1f4>)
800e25e: a904 add r1, sp, #16
800e260: f3af 8000 nop.w
800e264: 1c42 adds r2, r0, #1
800e266: 4606 mov r6, r0
800e268: d1d6 bne.n 800e218 <_svfiprintf_r+0x174>
800e26a: 89ab ldrh r3, [r5, #12]
800e26c: 065b lsls r3, r3, #25
800e26e: f53f af2d bmi.w 800e0cc <_svfiprintf_r+0x28>
800e272: 9809 ldr r0, [sp, #36] @ 0x24
800e274: e72c b.n 800e0d0 <_svfiprintf_r+0x2c>
800e276: ab03 add r3, sp, #12
800e278: 9300 str r3, [sp, #0]
800e27a: 462a mov r2, r5
800e27c: 4638 mov r0, r7
800e27e: 4b06 ldr r3, [pc, #24] @ (800e298 <_svfiprintf_r+0x1f4>)
800e280: a904 add r1, sp, #16
800e282: f000 f87d bl 800e380 <_printf_i>
800e286: e7ed b.n 800e264 <_svfiprintf_r+0x1c0>
800e288: 0800eca6 .word 0x0800eca6
800e28c: 0800ecac .word 0x0800ecac
800e290: 0800ecb0 .word 0x0800ecb0
800e294: 00000000 .word 0x00000000
800e298: 0800dfed .word 0x0800dfed
0800e29c <_printf_common>:
800e29c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e2a0: 4616 mov r6, r2
800e2a2: 4698 mov r8, r3
800e2a4: 688a ldr r2, [r1, #8]
800e2a6: 690b ldr r3, [r1, #16]
800e2a8: 4607 mov r7, r0
800e2aa: 4293 cmp r3, r2
800e2ac: bfb8 it lt
800e2ae: 4613 movlt r3, r2
800e2b0: 6033 str r3, [r6, #0]
800e2b2: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800e2b6: 460c mov r4, r1
800e2b8: f8dd 9020 ldr.w r9, [sp, #32]
800e2bc: b10a cbz r2, 800e2c2 <_printf_common+0x26>
800e2be: 3301 adds r3, #1
800e2c0: 6033 str r3, [r6, #0]
800e2c2: 6823 ldr r3, [r4, #0]
800e2c4: 0699 lsls r1, r3, #26
800e2c6: bf42 ittt mi
800e2c8: 6833 ldrmi r3, [r6, #0]
800e2ca: 3302 addmi r3, #2
800e2cc: 6033 strmi r3, [r6, #0]
800e2ce: 6825 ldr r5, [r4, #0]
800e2d0: f015 0506 ands.w r5, r5, #6
800e2d4: d106 bne.n 800e2e4 <_printf_common+0x48>
800e2d6: f104 0a19 add.w sl, r4, #25
800e2da: 68e3 ldr r3, [r4, #12]
800e2dc: 6832 ldr r2, [r6, #0]
800e2de: 1a9b subs r3, r3, r2
800e2e0: 42ab cmp r3, r5
800e2e2: dc2b bgt.n 800e33c <_printf_common+0xa0>
800e2e4: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800e2e8: 6822 ldr r2, [r4, #0]
800e2ea: 3b00 subs r3, #0
800e2ec: bf18 it ne
800e2ee: 2301 movne r3, #1
800e2f0: 0692 lsls r2, r2, #26
800e2f2: d430 bmi.n 800e356 <_printf_common+0xba>
800e2f4: 4641 mov r1, r8
800e2f6: 4638 mov r0, r7
800e2f8: f104 0243 add.w r2, r4, #67 @ 0x43
800e2fc: 47c8 blx r9
800e2fe: 3001 adds r0, #1
800e300: d023 beq.n 800e34a <_printf_common+0xae>
800e302: 6823 ldr r3, [r4, #0]
800e304: 6922 ldr r2, [r4, #16]
800e306: f003 0306 and.w r3, r3, #6
800e30a: 2b04 cmp r3, #4
800e30c: bf14 ite ne
800e30e: 2500 movne r5, #0
800e310: 6833 ldreq r3, [r6, #0]
800e312: f04f 0600 mov.w r6, #0
800e316: bf08 it eq
800e318: 68e5 ldreq r5, [r4, #12]
800e31a: f104 041a add.w r4, r4, #26
800e31e: bf08 it eq
800e320: 1aed subeq r5, r5, r3
800e322: f854 3c12 ldr.w r3, [r4, #-18]
800e326: bf08 it eq
800e328: ea25 75e5 biceq.w r5, r5, r5, asr #31
800e32c: 4293 cmp r3, r2
800e32e: bfc4 itt gt
800e330: 1a9b subgt r3, r3, r2
800e332: 18ed addgt r5, r5, r3
800e334: 42b5 cmp r5, r6
800e336: d11a bne.n 800e36e <_printf_common+0xd2>
800e338: 2000 movs r0, #0
800e33a: e008 b.n 800e34e <_printf_common+0xb2>
800e33c: 2301 movs r3, #1
800e33e: 4652 mov r2, sl
800e340: 4641 mov r1, r8
800e342: 4638 mov r0, r7
800e344: 47c8 blx r9
800e346: 3001 adds r0, #1
800e348: d103 bne.n 800e352 <_printf_common+0xb6>
800e34a: f04f 30ff mov.w r0, #4294967295
800e34e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e352: 3501 adds r5, #1
800e354: e7c1 b.n 800e2da <_printf_common+0x3e>
800e356: 2030 movs r0, #48 @ 0x30
800e358: 18e1 adds r1, r4, r3
800e35a: f881 0043 strb.w r0, [r1, #67] @ 0x43
800e35e: 1c5a adds r2, r3, #1
800e360: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800e364: 4422 add r2, r4
800e366: 3302 adds r3, #2
800e368: f882 1043 strb.w r1, [r2, #67] @ 0x43
800e36c: e7c2 b.n 800e2f4 <_printf_common+0x58>
800e36e: 2301 movs r3, #1
800e370: 4622 mov r2, r4
800e372: 4641 mov r1, r8
800e374: 4638 mov r0, r7
800e376: 47c8 blx r9
800e378: 3001 adds r0, #1
800e37a: d0e6 beq.n 800e34a <_printf_common+0xae>
800e37c: 3601 adds r6, #1
800e37e: e7d9 b.n 800e334 <_printf_common+0x98>
0800e380 <_printf_i>:
800e380: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800e384: 7e0f ldrb r7, [r1, #24]
800e386: 4691 mov r9, r2
800e388: 2f78 cmp r7, #120 @ 0x78
800e38a: 4680 mov r8, r0
800e38c: 460c mov r4, r1
800e38e: 469a mov sl, r3
800e390: 9e0c ldr r6, [sp, #48] @ 0x30
800e392: f101 0243 add.w r2, r1, #67 @ 0x43
800e396: d807 bhi.n 800e3a8 <_printf_i+0x28>
800e398: 2f62 cmp r7, #98 @ 0x62
800e39a: d80a bhi.n 800e3b2 <_printf_i+0x32>
800e39c: 2f00 cmp r7, #0
800e39e: f000 80d1 beq.w 800e544 <_printf_i+0x1c4>
800e3a2: 2f58 cmp r7, #88 @ 0x58
800e3a4: f000 80b8 beq.w 800e518 <_printf_i+0x198>
800e3a8: f104 0642 add.w r6, r4, #66 @ 0x42
800e3ac: f884 7042 strb.w r7, [r4, #66] @ 0x42
800e3b0: e03a b.n 800e428 <_printf_i+0xa8>
800e3b2: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800e3b6: 2b15 cmp r3, #21
800e3b8: d8f6 bhi.n 800e3a8 <_printf_i+0x28>
800e3ba: a101 add r1, pc, #4 @ (adr r1, 800e3c0 <_printf_i+0x40>)
800e3bc: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800e3c0: 0800e419 .word 0x0800e419
800e3c4: 0800e42d .word 0x0800e42d
800e3c8: 0800e3a9 .word 0x0800e3a9
800e3cc: 0800e3a9 .word 0x0800e3a9
800e3d0: 0800e3a9 .word 0x0800e3a9
800e3d4: 0800e3a9 .word 0x0800e3a9
800e3d8: 0800e42d .word 0x0800e42d
800e3dc: 0800e3a9 .word 0x0800e3a9
800e3e0: 0800e3a9 .word 0x0800e3a9
800e3e4: 0800e3a9 .word 0x0800e3a9
800e3e8: 0800e3a9 .word 0x0800e3a9
800e3ec: 0800e52b .word 0x0800e52b
800e3f0: 0800e457 .word 0x0800e457
800e3f4: 0800e4e5 .word 0x0800e4e5
800e3f8: 0800e3a9 .word 0x0800e3a9
800e3fc: 0800e3a9 .word 0x0800e3a9
800e400: 0800e54d .word 0x0800e54d
800e404: 0800e3a9 .word 0x0800e3a9
800e408: 0800e457 .word 0x0800e457
800e40c: 0800e3a9 .word 0x0800e3a9
800e410: 0800e3a9 .word 0x0800e3a9
800e414: 0800e4ed .word 0x0800e4ed
800e418: 6833 ldr r3, [r6, #0]
800e41a: 1d1a adds r2, r3, #4
800e41c: 681b ldr r3, [r3, #0]
800e41e: 6032 str r2, [r6, #0]
800e420: f104 0642 add.w r6, r4, #66 @ 0x42
800e424: f884 3042 strb.w r3, [r4, #66] @ 0x42
800e428: 2301 movs r3, #1
800e42a: e09c b.n 800e566 <_printf_i+0x1e6>
800e42c: 6833 ldr r3, [r6, #0]
800e42e: 6820 ldr r0, [r4, #0]
800e430: 1d19 adds r1, r3, #4
800e432: 6031 str r1, [r6, #0]
800e434: 0606 lsls r6, r0, #24
800e436: d501 bpl.n 800e43c <_printf_i+0xbc>
800e438: 681d ldr r5, [r3, #0]
800e43a: e003 b.n 800e444 <_printf_i+0xc4>
800e43c: 0645 lsls r5, r0, #25
800e43e: d5fb bpl.n 800e438 <_printf_i+0xb8>
800e440: f9b3 5000 ldrsh.w r5, [r3]
800e444: 2d00 cmp r5, #0
800e446: da03 bge.n 800e450 <_printf_i+0xd0>
800e448: 232d movs r3, #45 @ 0x2d
800e44a: 426d negs r5, r5
800e44c: f884 3043 strb.w r3, [r4, #67] @ 0x43
800e450: 230a movs r3, #10
800e452: 4858 ldr r0, [pc, #352] @ (800e5b4 <_printf_i+0x234>)
800e454: e011 b.n 800e47a <_printf_i+0xfa>
800e456: 6821 ldr r1, [r4, #0]
800e458: 6833 ldr r3, [r6, #0]
800e45a: 0608 lsls r0, r1, #24
800e45c: f853 5b04 ldr.w r5, [r3], #4
800e460: d402 bmi.n 800e468 <_printf_i+0xe8>
800e462: 0649 lsls r1, r1, #25
800e464: bf48 it mi
800e466: b2ad uxthmi r5, r5
800e468: 2f6f cmp r7, #111 @ 0x6f
800e46a: 6033 str r3, [r6, #0]
800e46c: bf14 ite ne
800e46e: 230a movne r3, #10
800e470: 2308 moveq r3, #8
800e472: 4850 ldr r0, [pc, #320] @ (800e5b4 <_printf_i+0x234>)
800e474: 2100 movs r1, #0
800e476: f884 1043 strb.w r1, [r4, #67] @ 0x43
800e47a: 6866 ldr r6, [r4, #4]
800e47c: 2e00 cmp r6, #0
800e47e: 60a6 str r6, [r4, #8]
800e480: db05 blt.n 800e48e <_printf_i+0x10e>
800e482: 6821 ldr r1, [r4, #0]
800e484: 432e orrs r6, r5
800e486: f021 0104 bic.w r1, r1, #4
800e48a: 6021 str r1, [r4, #0]
800e48c: d04b beq.n 800e526 <_printf_i+0x1a6>
800e48e: 4616 mov r6, r2
800e490: fbb5 f1f3 udiv r1, r5, r3
800e494: fb03 5711 mls r7, r3, r1, r5
800e498: 5dc7 ldrb r7, [r0, r7]
800e49a: f806 7d01 strb.w r7, [r6, #-1]!
800e49e: 462f mov r7, r5
800e4a0: 42bb cmp r3, r7
800e4a2: 460d mov r5, r1
800e4a4: d9f4 bls.n 800e490 <_printf_i+0x110>
800e4a6: 2b08 cmp r3, #8
800e4a8: d10b bne.n 800e4c2 <_printf_i+0x142>
800e4aa: 6823 ldr r3, [r4, #0]
800e4ac: 07df lsls r7, r3, #31
800e4ae: d508 bpl.n 800e4c2 <_printf_i+0x142>
800e4b0: 6923 ldr r3, [r4, #16]
800e4b2: 6861 ldr r1, [r4, #4]
800e4b4: 4299 cmp r1, r3
800e4b6: bfde ittt le
800e4b8: 2330 movle r3, #48 @ 0x30
800e4ba: f806 3c01 strble.w r3, [r6, #-1]
800e4be: f106 36ff addle.w r6, r6, #4294967295
800e4c2: 1b92 subs r2, r2, r6
800e4c4: 6122 str r2, [r4, #16]
800e4c6: 464b mov r3, r9
800e4c8: 4621 mov r1, r4
800e4ca: 4640 mov r0, r8
800e4cc: f8cd a000 str.w sl, [sp]
800e4d0: aa03 add r2, sp, #12
800e4d2: f7ff fee3 bl 800e29c <_printf_common>
800e4d6: 3001 adds r0, #1
800e4d8: d14a bne.n 800e570 <_printf_i+0x1f0>
800e4da: f04f 30ff mov.w r0, #4294967295
800e4de: b004 add sp, #16
800e4e0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e4e4: 6823 ldr r3, [r4, #0]
800e4e6: f043 0320 orr.w r3, r3, #32
800e4ea: 6023 str r3, [r4, #0]
800e4ec: 2778 movs r7, #120 @ 0x78
800e4ee: 4832 ldr r0, [pc, #200] @ (800e5b8 <_printf_i+0x238>)
800e4f0: f884 7045 strb.w r7, [r4, #69] @ 0x45
800e4f4: 6823 ldr r3, [r4, #0]
800e4f6: 6831 ldr r1, [r6, #0]
800e4f8: 061f lsls r7, r3, #24
800e4fa: f851 5b04 ldr.w r5, [r1], #4
800e4fe: d402 bmi.n 800e506 <_printf_i+0x186>
800e500: 065f lsls r7, r3, #25
800e502: bf48 it mi
800e504: b2ad uxthmi r5, r5
800e506: 6031 str r1, [r6, #0]
800e508: 07d9 lsls r1, r3, #31
800e50a: bf44 itt mi
800e50c: f043 0320 orrmi.w r3, r3, #32
800e510: 6023 strmi r3, [r4, #0]
800e512: b11d cbz r5, 800e51c <_printf_i+0x19c>
800e514: 2310 movs r3, #16
800e516: e7ad b.n 800e474 <_printf_i+0xf4>
800e518: 4826 ldr r0, [pc, #152] @ (800e5b4 <_printf_i+0x234>)
800e51a: e7e9 b.n 800e4f0 <_printf_i+0x170>
800e51c: 6823 ldr r3, [r4, #0]
800e51e: f023 0320 bic.w r3, r3, #32
800e522: 6023 str r3, [r4, #0]
800e524: e7f6 b.n 800e514 <_printf_i+0x194>
800e526: 4616 mov r6, r2
800e528: e7bd b.n 800e4a6 <_printf_i+0x126>
800e52a: 6833 ldr r3, [r6, #0]
800e52c: 6825 ldr r5, [r4, #0]
800e52e: 1d18 adds r0, r3, #4
800e530: 6961 ldr r1, [r4, #20]
800e532: 6030 str r0, [r6, #0]
800e534: 062e lsls r6, r5, #24
800e536: 681b ldr r3, [r3, #0]
800e538: d501 bpl.n 800e53e <_printf_i+0x1be>
800e53a: 6019 str r1, [r3, #0]
800e53c: e002 b.n 800e544 <_printf_i+0x1c4>
800e53e: 0668 lsls r0, r5, #25
800e540: d5fb bpl.n 800e53a <_printf_i+0x1ba>
800e542: 8019 strh r1, [r3, #0]
800e544: 2300 movs r3, #0
800e546: 4616 mov r6, r2
800e548: 6123 str r3, [r4, #16]
800e54a: e7bc b.n 800e4c6 <_printf_i+0x146>
800e54c: 6833 ldr r3, [r6, #0]
800e54e: 2100 movs r1, #0
800e550: 1d1a adds r2, r3, #4
800e552: 6032 str r2, [r6, #0]
800e554: 681e ldr r6, [r3, #0]
800e556: 6862 ldr r2, [r4, #4]
800e558: 4630 mov r0, r6
800e55a: f000 f859 bl 800e610 <memchr>
800e55e: b108 cbz r0, 800e564 <_printf_i+0x1e4>
800e560: 1b80 subs r0, r0, r6
800e562: 6060 str r0, [r4, #4]
800e564: 6863 ldr r3, [r4, #4]
800e566: 6123 str r3, [r4, #16]
800e568: 2300 movs r3, #0
800e56a: f884 3043 strb.w r3, [r4, #67] @ 0x43
800e56e: e7aa b.n 800e4c6 <_printf_i+0x146>
800e570: 4632 mov r2, r6
800e572: 4649 mov r1, r9
800e574: 4640 mov r0, r8
800e576: 6923 ldr r3, [r4, #16]
800e578: 47d0 blx sl
800e57a: 3001 adds r0, #1
800e57c: d0ad beq.n 800e4da <_printf_i+0x15a>
800e57e: 6823 ldr r3, [r4, #0]
800e580: 079b lsls r3, r3, #30
800e582: d413 bmi.n 800e5ac <_printf_i+0x22c>
800e584: 68e0 ldr r0, [r4, #12]
800e586: 9b03 ldr r3, [sp, #12]
800e588: 4298 cmp r0, r3
800e58a: bfb8 it lt
800e58c: 4618 movlt r0, r3
800e58e: e7a6 b.n 800e4de <_printf_i+0x15e>
800e590: 2301 movs r3, #1
800e592: 4632 mov r2, r6
800e594: 4649 mov r1, r9
800e596: 4640 mov r0, r8
800e598: 47d0 blx sl
800e59a: 3001 adds r0, #1
800e59c: d09d beq.n 800e4da <_printf_i+0x15a>
800e59e: 3501 adds r5, #1
800e5a0: 68e3 ldr r3, [r4, #12]
800e5a2: 9903 ldr r1, [sp, #12]
800e5a4: 1a5b subs r3, r3, r1
800e5a6: 42ab cmp r3, r5
800e5a8: dcf2 bgt.n 800e590 <_printf_i+0x210>
800e5aa: e7eb b.n 800e584 <_printf_i+0x204>
800e5ac: 2500 movs r5, #0
800e5ae: f104 0619 add.w r6, r4, #25
800e5b2: e7f5 b.n 800e5a0 <_printf_i+0x220>
800e5b4: 0800ecb7 .word 0x0800ecb7
800e5b8: 0800ecc8 .word 0x0800ecc8
0800e5bc <memmove>:
800e5bc: 4288 cmp r0, r1
800e5be: b510 push {r4, lr}
800e5c0: eb01 0402 add.w r4, r1, r2
800e5c4: d902 bls.n 800e5cc <memmove+0x10>
800e5c6: 4284 cmp r4, r0
800e5c8: 4623 mov r3, r4
800e5ca: d807 bhi.n 800e5dc <memmove+0x20>
800e5cc: 1e43 subs r3, r0, #1
800e5ce: 42a1 cmp r1, r4
800e5d0: d008 beq.n 800e5e4 <memmove+0x28>
800e5d2: f811 2b01 ldrb.w r2, [r1], #1
800e5d6: f803 2f01 strb.w r2, [r3, #1]!
800e5da: e7f8 b.n 800e5ce <memmove+0x12>
800e5dc: 4601 mov r1, r0
800e5de: 4402 add r2, r0
800e5e0: 428a cmp r2, r1
800e5e2: d100 bne.n 800e5e6 <memmove+0x2a>
800e5e4: bd10 pop {r4, pc}
800e5e6: f813 4d01 ldrb.w r4, [r3, #-1]!
800e5ea: f802 4d01 strb.w r4, [r2, #-1]!
800e5ee: e7f7 b.n 800e5e0 <memmove+0x24>
0800e5f0 <_sbrk_r>:
800e5f0: b538 push {r3, r4, r5, lr}
800e5f2: 2300 movs r3, #0
800e5f4: 4d05 ldr r5, [pc, #20] @ (800e60c <_sbrk_r+0x1c>)
800e5f6: 4604 mov r4, r0
800e5f8: 4608 mov r0, r1
800e5fa: 602b str r3, [r5, #0]
800e5fc: f7f6 f98e bl 800491c <_sbrk>
800e600: 1c43 adds r3, r0, #1
800e602: d102 bne.n 800e60a <_sbrk_r+0x1a>
800e604: 682b ldr r3, [r5, #0]
800e606: b103 cbz r3, 800e60a <_sbrk_r+0x1a>
800e608: 6023 str r3, [r4, #0]
800e60a: bd38 pop {r3, r4, r5, pc}
800e60c: 2000188c .word 0x2000188c
0800e610 <memchr>:
800e610: 4603 mov r3, r0
800e612: b510 push {r4, lr}
800e614: b2c9 uxtb r1, r1
800e616: 4402 add r2, r0
800e618: 4293 cmp r3, r2
800e61a: 4618 mov r0, r3
800e61c: d101 bne.n 800e622 <memchr+0x12>
800e61e: 2000 movs r0, #0
800e620: e003 b.n 800e62a <memchr+0x1a>
800e622: 7804 ldrb r4, [r0, #0]
800e624: 3301 adds r3, #1
800e626: 428c cmp r4, r1
800e628: d1f6 bne.n 800e618 <memchr+0x8>
800e62a: bd10 pop {r4, pc}
0800e62c <memcpy>:
800e62c: 440a add r2, r1
800e62e: 4291 cmp r1, r2
800e630: f100 33ff add.w r3, r0, #4294967295
800e634: d100 bne.n 800e638 <memcpy+0xc>
800e636: 4770 bx lr
800e638: b510 push {r4, lr}
800e63a: f811 4b01 ldrb.w r4, [r1], #1
800e63e: 4291 cmp r1, r2
800e640: f803 4f01 strb.w r4, [r3, #1]!
800e644: d1f9 bne.n 800e63a <memcpy+0xe>
800e646: bd10 pop {r4, pc}
0800e648 <_realloc_r>:
800e648: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800e64c: 4607 mov r7, r0
800e64e: 4614 mov r4, r2
800e650: 460d mov r5, r1
800e652: b921 cbnz r1, 800e65e <_realloc_r+0x16>
800e654: 4611 mov r1, r2
800e656: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800e65a: f7ff bc3b b.w 800ded4 <_malloc_r>
800e65e: b92a cbnz r2, 800e66c <_realloc_r+0x24>
800e660: f7ff fbce bl 800de00 <_free_r>
800e664: 4625 mov r5, r4
800e666: 4628 mov r0, r5
800e668: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800e66c: f000 f81a bl 800e6a4 <_malloc_usable_size_r>
800e670: 4284 cmp r4, r0
800e672: 4606 mov r6, r0
800e674: d802 bhi.n 800e67c <_realloc_r+0x34>
800e676: ebb4 0f50 cmp.w r4, r0, lsr #1
800e67a: d8f4 bhi.n 800e666 <_realloc_r+0x1e>
800e67c: 4621 mov r1, r4
800e67e: 4638 mov r0, r7
800e680: f7ff fc28 bl 800ded4 <_malloc_r>
800e684: 4680 mov r8, r0
800e686: b908 cbnz r0, 800e68c <_realloc_r+0x44>
800e688: 4645 mov r5, r8
800e68a: e7ec b.n 800e666 <_realloc_r+0x1e>
800e68c: 42b4 cmp r4, r6
800e68e: 4622 mov r2, r4
800e690: 4629 mov r1, r5
800e692: bf28 it cs
800e694: 4632 movcs r2, r6
800e696: f7ff ffc9 bl 800e62c <memcpy>
800e69a: 4629 mov r1, r5
800e69c: 4638 mov r0, r7
800e69e: f7ff fbaf bl 800de00 <_free_r>
800e6a2: e7f1 b.n 800e688 <_realloc_r+0x40>
0800e6a4 <_malloc_usable_size_r>:
800e6a4: f851 3c04 ldr.w r3, [r1, #-4]
800e6a8: 1f18 subs r0, r3, #4
800e6aa: 2b00 cmp r3, #0
800e6ac: bfbc itt lt
800e6ae: 580b ldrlt r3, [r1, r0]
800e6b0: 18c0 addlt r0, r0, r3
800e6b2: 4770 bx lr
0800e6b4 <_init>:
800e6b4: b5f8 push {r3, r4, r5, r6, r7, lr}
800e6b6: bf00 nop
800e6b8: bcf8 pop {r3, r4, r5, r6, r7}
800e6ba: bc08 pop {r3}
800e6bc: 469e mov lr, r3
800e6be: 4770 bx lr
0800e6c0 <_fini>:
800e6c0: b5f8 push {r3, r4, r5, r6, r7, lr}
800e6c2: bf00 nop
800e6c4: bcf8 pop {r3, r4, r5, r6, r7}
800e6c6: bc08 pop {r3}
800e6c8: 469e mov lr, r3
800e6ca: 4770 bx lr
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