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5cdb13c44a8e0caea7172f51992e0e9e170b6634
AUTOM/workspace/AUTOM10/th1000t1s/AUTOM10.list
andrea 5cdb13c44a aggiornati tempi
2026-07-08 18:14:47 +02:00

35922 lines
1.3 MiB
Raw Blame History

AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000ec78 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000007ec 0800ed84 0800ed84 0000fd84 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800f570 0800f570 000111dc 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800f570 0800f570 00010570 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800f578 0800f578 000111dc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800f578 0800f578 00010578 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800f57c 0800f57c 0001057c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001dc 20000000 0800f580 00011000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 000016c4 200001e0 0800f75c 000111e0 2**3
ALLOC
10 ._user_heap_stack 00000604 200018a4 0800f75c 000118a4 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000111dc 2**0
CONTENTS, READONLY
12 .debug_info 0001a717 00000000 00000000 00011205 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00004a0c 00000000 00000000 0002b91c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 000016a8 00000000 00000000 00030328 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00001162 00000000 00000000 000319d0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001d2fe 00000000 00000000 00032b32 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001f278 00000000 00000000 0004fe30 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 00095eac 00000000 00000000 0006f0a8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 00104f54 2**0
CONTENTS, READONLY
20 .debug_frame 00006194 00000000 00000000 00104f98 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000056 00000000 00000000 0010b12c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001e0 .word 0x200001e0
8000128: 00000000 .word 0x00000000
800012c: 0800ed6c .word 0x0800ed6c
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001e4 .word 0x200001e4
8000148: 0800ed6c .word 0x0800ed6c
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <manageAdc>:
uint16_t ch5 ;
uint16_t ch6 ;
uint16_t ch7 ;
uint16_t ch8 ;
void manageAdc(void){
800015c: b480 push {r7}
800015e: af00 add r7, sp, #0
if (adc_avg_ready)
8000160: 4b12 ldr r3, [pc, #72] @ (80001ac <manageAdc+0x50>)
8000162: 781b ldrb r3, [r3, #0]
8000164: b2db uxtb r3, r3
8000166: 2b00 cmp r3, #0
8000168: d01b beq.n 80001a2 <manageAdc+0x46>
{
adc_avg_ready = 0;
800016a: 4b10 ldr r3, [pc, #64] @ (80001ac <manageAdc+0x50>)
800016c: 2200 movs r2, #0
800016e: 701a strb r2, [r3, #0]
// Read averaged channels (example mapping)
ch4 = adc_avg[0];
8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 <manageAdc+0x54>)
8000172: 881b ldrh r3, [r3, #0]
8000174: b29a uxth r2, r3
8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 <manageAdc+0x58>)
8000178: 801a strh r2, [r3, #0]
ch5 = adc_avg[1];
800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 <manageAdc+0x54>)
800017c: 885b ldrh r3, [r3, #2]
800017e: b29a uxth r2, r3
8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 <manageAdc+0x5c>)
8000182: 801a strh r2, [r3, #0]
ch6 = adc_avg[2];
8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 <manageAdc+0x54>)
8000186: 889b ldrh r3, [r3, #4]
8000188: b29a uxth r2, r3
800018a: 4b0c ldr r3, [pc, #48] @ (80001bc <manageAdc+0x60>)
800018c: 801a strh r2, [r3, #0]
ch7 = adc_avg[3];
800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 <manageAdc+0x54>)
8000190: 88db ldrh r3, [r3, #6]
8000192: b29a uxth r2, r3
8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 <manageAdc+0x64>)
8000196: 801a strh r2, [r3, #0]
ch8 = adc_avg[4];
8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 <manageAdc+0x54>)
800019a: 891b ldrh r3, [r3, #8]
800019c: b29a uxth r2, r3
800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 <manageAdc+0x68>)
80001a0: 801a strh r2, [r3, #0]
// Use them (convert to volts, control, etc.)
// float v4 = (3.3f * ch4) / 4095.0f;
}
}
80001a2: bf00 nop
80001a4: 46bd mov sp, r7
80001a6: bc80 pop {r7}
80001a8: 4770 bx lr
80001aa: bf00 nop
80001ac: 20000229 .word 0x20000229
80001b0: 20000208 .word 0x20000208
80001b4: 2000022a .word 0x2000022a
80001b8: 2000022c .word 0x2000022c
80001bc: 2000022e .word 0x2000022e
80001c0: 20000230 .word 0x20000230
80001c4: 20000232 .word 0x20000232
080001c8 <readAdc>:
void readAdc(void){
80001c8: b480 push {r7}
80001ca: b083 sub sp, #12
80001cc: af00 add r7, sp, #0
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001ce: 2300 movs r3, #0
80001d0: 71fb strb r3, [r7, #7]
80001d2: e010 b.n 80001f6 <readAdc+0x2e>
{
adc_sum[i] += adc_dma_buf[i];
80001d4: 79fb ldrb r3, [r7, #7]
80001d6: 4a21 ldr r2, [pc, #132] @ (800025c <readAdc+0x94>)
80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80001dc: b299 uxth r1, r3
80001de: 79fb ldrb r3, [r7, #7]
80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 <readAdc+0x98>)
80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2]
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 440a add r2, r1
80001ea: 491d ldr r1, [pc, #116] @ (8000260 <readAdc+0x98>)
80001ec: f841 2023 str.w r2, [r1, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001f0: 79fb ldrb r3, [r7, #7]
80001f2: 3301 adds r3, #1
80001f4: 71fb strb r3, [r7, #7]
80001f6: 79fb ldrb r3, [r7, #7]
80001f8: 2b04 cmp r3, #4
80001fa: d9eb bls.n 80001d4 <readAdc+0xc>
}
adc_sum_count++;
80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 <readAdc+0x9c>)
80001fe: 781b ldrb r3, [r3, #0]
8000200: 3301 adds r3, #1
8000202: b2da uxtb r2, r3
8000204: 4b17 ldr r3, [pc, #92] @ (8000264 <readAdc+0x9c>)
8000206: 701a strb r2, [r3, #0]
/* When we collected ADC_AVG_WINDOW samples → compute average */
if (adc_sum_count >= ADC_AVG_WINDOW)
8000208: 4b16 ldr r3, [pc, #88] @ (8000264 <readAdc+0x9c>)
800020a: 781b ldrb r3, [r3, #0]
800020c: 2b04 cmp r3, #4
800020e: d920 bls.n 8000252 <readAdc+0x8a>
{
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
8000210: 2300 movs r3, #0
8000212: 71bb strb r3, [r7, #6]
8000214: e014 b.n 8000240 <readAdc+0x78>
{
adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW);
8000216: 79bb ldrb r3, [r7, #6]
8000218: 4a11 ldr r2, [pc, #68] @ (8000260 <readAdc+0x98>)
800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800021e: 4a12 ldr r2, [pc, #72] @ (8000268 <readAdc+0xa0>)
8000220: fba2 2303 umull r2, r3, r2, r3
8000224: 089a lsrs r2, r3, #2
8000226: 79bb ldrb r3, [r7, #6]
8000228: b291 uxth r1, r2
800022a: 4a10 ldr r2, [pc, #64] @ (800026c <readAdc+0xa4>)
800022c: f822 1013 strh.w r1, [r2, r3, lsl #1]
adc_sum[i] = 0;
8000230: 79bb ldrb r3, [r7, #6]
8000232: 4a0b ldr r2, [pc, #44] @ (8000260 <readAdc+0x98>)
8000234: 2100 movs r1, #0
8000236: f842 1023 str.w r1, [r2, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
800023a: 79bb ldrb r3, [r7, #6]
800023c: 3301 adds r3, #1
800023e: 71bb strb r3, [r7, #6]
8000240: 79bb ldrb r3, [r7, #6]
8000242: 2b04 cmp r3, #4
8000244: d9e7 bls.n 8000216 <readAdc+0x4e>
}
adc_sum_count = 0;
8000246: 4b07 ldr r3, [pc, #28] @ (8000264 <readAdc+0x9c>)
8000248: 2200 movs r2, #0
800024a: 701a strb r2, [r3, #0]
adc_avg_ready = 1; // tell main loop new data is ready
800024c: 4b08 ldr r3, [pc, #32] @ (8000270 <readAdc+0xa8>)
800024e: 2201 movs r2, #1
8000250: 701a strb r2, [r3, #0]
}
}
8000252: bf00 nop
8000254: 370c adds r7, #12
8000256: 46bd mov sp, r7
8000258: bc80 pop {r7}
800025a: 4770 bx lr
800025c: 200001fc .word 0x200001fc
8000260: 20000214 .word 0x20000214
8000264: 20000228 .word 0x20000228
8000268: cccccccd .word 0xcccccccd
800026c: 20000208 .word 0x20000208
8000270: 20000229 .word 0x20000229
08000274 <EEW_Read>:
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
void loadEE(void);
void loadDefault(void);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
8000274: b580 push {r7, lr}
8000276: b082 sub sp, #8
8000278: af00 add r7, sp, #0
800027a: 4603 mov r3, r0
800027c: 6039 str r1, [r7, #0]
800027e: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000280: 79fb ldrb r3, [r7, #7]
8000282: b29b uxth r3, r3
8000284: 3301 adds r3, #1
8000286: b29b uxth r3, r3
8000288: 6839 ldr r1, [r7, #0]
800028a: 4618 mov r0, r3
800028c: f001 f9d2 bl 8001634 <EE_ReadVariable>
8000290: 4603 mov r3, r0
}
8000292: 4618 mov r0, r3
8000294: 3708 adds r7, #8
8000296: 46bd mov sp, r7
8000298: bd80 pop {r7, pc}
0800029a <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
800029a: b580 push {r7, lr}
800029c: b082 sub sp, #8
800029e: af00 add r7, sp, #0
80002a0: 4603 mov r3, r0
80002a2: 460a mov r2, r1
80002a4: 71fb strb r3, [r7, #7]
80002a6: 4613 mov r3, r2
80002a8: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80002aa: 79fb ldrb r3, [r7, #7]
80002ac: b29b uxth r3, r3
80002ae: 3301 adds r3, #1
80002b0: b29b uxth r3, r3
80002b2: 88ba ldrh r2, [r7, #4]
80002b4: 4611 mov r1, r2
80002b6: 4618 mov r0, r3
80002b8: f001 f9d8 bl 800166c <EE_WriteVariable>
80002bc: 4603 mov r3, r0
}
80002be: 4618 mov r0, r3
80002c0: 3708 adds r7, #8
80002c2: 46bd mov sp, r7
80002c4: bd80 pop {r7, pc}
080002c6 <toHex>:
extern uint16_t tramp;
extern uint16_t tanem;
extern uint16_t thanem;
extern uint16_t trampman;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80002c6: b490 push {r4, r7}
80002c8: b082 sub sp, #8
80002ca: af00 add r7, sp, #0
80002cc: 4604 mov r4, r0
80002ce: 4608 mov r0, r1
80002d0: 4611 mov r1, r2
80002d2: 461a mov r2, r3
80002d4: 4623 mov r3, r4
80002d6: 71fb strb r3, [r7, #7]
80002d8: 4603 mov r3, r0
80002da: 71bb strb r3, [r7, #6]
80002dc: 460b mov r3, r1
80002de: 717b strb r3, [r7, #5]
80002e0: 4613 mov r3, r2
80002e2: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80002e4: 79fb ldrb r3, [r7, #7]
80002e6: 2b2f cmp r3, #47 @ 0x2f
80002e8: d906 bls.n 80002f8 <toHex+0x32>
80002ea: 79fb ldrb r3, [r7, #7]
80002ec: 2b39 cmp r3, #57 @ 0x39
80002ee: d803 bhi.n 80002f8 <toHex+0x32>
c1-='0';
80002f0: 79fb ldrb r3, [r7, #7]
80002f2: 3b30 subs r3, #48 @ 0x30
80002f4: 71fb strb r3, [r7, #7]
80002f6: e00b b.n 8000310 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80002f8: 79fb ldrb r3, [r7, #7]
80002fa: 2b60 cmp r3, #96 @ 0x60
80002fc: d906 bls.n 800030c <toHex+0x46>
80002fe: 79fb ldrb r3, [r7, #7]
8000300: 2b66 cmp r3, #102 @ 0x66
8000302: d803 bhi.n 800030c <toHex+0x46>
c1=(c1-'a')+10;
8000304: 79fb ldrb r3, [r7, #7]
8000306: 3b57 subs r3, #87 @ 0x57
8000308: 71fb strb r3, [r7, #7]
800030a: e001 b.n 8000310 <toHex+0x4a>
}else return false;
800030c: 2300 movs r3, #0
800030e: e070 b.n 80003f2 <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
8000310: 79bb ldrb r3, [r7, #6]
8000312: 2b2f cmp r3, #47 @ 0x2f
8000314: d906 bls.n 8000324 <toHex+0x5e>
8000316: 79bb ldrb r3, [r7, #6]
8000318: 2b39 cmp r3, #57 @ 0x39
800031a: d803 bhi.n 8000324 <toHex+0x5e>
c2-='0';
800031c: 79bb ldrb r3, [r7, #6]
800031e: 3b30 subs r3, #48 @ 0x30
8000320: 71bb strb r3, [r7, #6]
8000322: e00b b.n 800033c <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
8000324: 79bb ldrb r3, [r7, #6]
8000326: 2b60 cmp r3, #96 @ 0x60
8000328: d906 bls.n 8000338 <toHex+0x72>
800032a: 79bb ldrb r3, [r7, #6]
800032c: 2b66 cmp r3, #102 @ 0x66
800032e: d803 bhi.n 8000338 <toHex+0x72>
c2=(c2-'a')+10;
8000330: 79bb ldrb r3, [r7, #6]
8000332: 3b57 subs r3, #87 @ 0x57
8000334: 71bb strb r3, [r7, #6]
8000336: e001 b.n 800033c <toHex+0x76>
}else return false;
8000338: 2300 movs r3, #0
800033a: e05a b.n 80003f2 <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
800033c: 797b ldrb r3, [r7, #5]
800033e: 2b2f cmp r3, #47 @ 0x2f
8000340: d906 bls.n 8000350 <toHex+0x8a>
8000342: 797b ldrb r3, [r7, #5]
8000344: 2b39 cmp r3, #57 @ 0x39
8000346: d803 bhi.n 8000350 <toHex+0x8a>
c3-='0';
8000348: 797b ldrb r3, [r7, #5]
800034a: 3b30 subs r3, #48 @ 0x30
800034c: 717b strb r3, [r7, #5]
800034e: e00b b.n 8000368 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000350: 797b ldrb r3, [r7, #5]
8000352: 2b60 cmp r3, #96 @ 0x60
8000354: d906 bls.n 8000364 <toHex+0x9e>
8000356: 797b ldrb r3, [r7, #5]
8000358: 2b66 cmp r3, #102 @ 0x66
800035a: d803 bhi.n 8000364 <toHex+0x9e>
c3=(c3-'a')+10;
800035c: 797b ldrb r3, [r7, #5]
800035e: 3b57 subs r3, #87 @ 0x57
8000360: 717b strb r3, [r7, #5]
8000362: e001 b.n 8000368 <toHex+0xa2>
}else return false;
8000364: 2300 movs r3, #0
8000366: e044 b.n 80003f2 <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000368: 793b ldrb r3, [r7, #4]
800036a: 2b2f cmp r3, #47 @ 0x2f
800036c: d906 bls.n 800037c <toHex+0xb6>
800036e: 793b ldrb r3, [r7, #4]
8000370: 2b39 cmp r3, #57 @ 0x39
8000372: d803 bhi.n 800037c <toHex+0xb6>
c4-='0';
8000374: 793b ldrb r3, [r7, #4]
8000376: 3b30 subs r3, #48 @ 0x30
8000378: 713b strb r3, [r7, #4]
800037a: e00b b.n 8000394 <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
800037c: 793b ldrb r3, [r7, #4]
800037e: 2b60 cmp r3, #96 @ 0x60
8000380: d906 bls.n 8000390 <toHex+0xca>
8000382: 793b ldrb r3, [r7, #4]
8000384: 2b66 cmp r3, #102 @ 0x66
8000386: d803 bhi.n 8000390 <toHex+0xca>
c4=(c4-'a')+10;
8000388: 793b ldrb r3, [r7, #4]
800038a: 3b57 subs r3, #87 @ 0x57
800038c: 713b strb r3, [r7, #4]
800038e: e001 b.n 8000394 <toHex+0xce>
}else return false;
8000390: 2300 movs r3, #0
8000392: e02e b.n 80003f2 <toHex+0x12c>
*retval=c1;
8000394: 79fb ldrb r3, [r7, #7]
8000396: b29a uxth r2, r3
8000398: 693b ldr r3, [r7, #16]
800039a: 801a strh r2, [r3, #0]
*retval*=16;
800039c: 693b ldr r3, [r7, #16]
800039e: 881b ldrh r3, [r3, #0]
80003a0: 011b lsls r3, r3, #4
80003a2: b29a uxth r2, r3
80003a4: 693b ldr r3, [r7, #16]
80003a6: 801a strh r2, [r3, #0]
*retval+=c2;
80003a8: 693b ldr r3, [r7, #16]
80003aa: 881a ldrh r2, [r3, #0]
80003ac: 79bb ldrb r3, [r7, #6]
80003ae: b29b uxth r3, r3
80003b0: 4413 add r3, r2
80003b2: b29a uxth r2, r3
80003b4: 693b ldr r3, [r7, #16]
80003b6: 801a strh r2, [r3, #0]
*retval*=16;
80003b8: 693b ldr r3, [r7, #16]
80003ba: 881b ldrh r3, [r3, #0]
80003bc: 011b lsls r3, r3, #4
80003be: b29a uxth r2, r3
80003c0: 693b ldr r3, [r7, #16]
80003c2: 801a strh r2, [r3, #0]
*retval+=c3;
80003c4: 693b ldr r3, [r7, #16]
80003c6: 881a ldrh r2, [r3, #0]
80003c8: 797b ldrb r3, [r7, #5]
80003ca: b29b uxth r3, r3
80003cc: 4413 add r3, r2
80003ce: b29a uxth r2, r3
80003d0: 693b ldr r3, [r7, #16]
80003d2: 801a strh r2, [r3, #0]
*retval*=16;
80003d4: 693b ldr r3, [r7, #16]
80003d6: 881b ldrh r3, [r3, #0]
80003d8: 011b lsls r3, r3, #4
80003da: b29a uxth r2, r3
80003dc: 693b ldr r3, [r7, #16]
80003de: 801a strh r2, [r3, #0]
*retval+=c4;
80003e0: 693b ldr r3, [r7, #16]
80003e2: 881a ldrh r2, [r3, #0]
80003e4: 793b ldrb r3, [r7, #4]
80003e6: b29b uxth r3, r3
80003e8: 4413 add r3, r2
80003ea: b29a uxth r2, r3
80003ec: 693b ldr r3, [r7, #16]
80003ee: 801a strh r2, [r3, #0]
return true;
80003f0: 2301 movs r3, #1
}
80003f2: 4618 mov r0, r3
80003f4: 3708 adds r7, #8
80003f6: 46bd mov sp, r7
80003f8: bc90 pop {r4, r7}
80003fa: 4770 bx lr
080003fc <manageCDC>:
void manageCDC(void){
80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8000400: b0c1 sub sp, #260 @ 0x104
8000402: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
8000404: f00d fb4e bl 800daa4 <CDC_Available>
8000408: 4603 mov r3, r0
800040a: 2b00 cmp r3, #0
800040c: f000 86c8 beq.w 80011a0 <manageCDC+0xda4>
int rx = CDC_ReadByte();
8000410: f00d fb5c bl 800dacc <CDC_ReadByte>
8000414: f8c7 00e0 str.w r0, [r7, #224] @ 0xe0
if (rx < 0) return;
8000418: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800041c: 2b00 cmp r3, #0
800041e: f2c0 86be blt.w 800119e <manageCDC+0xda2>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
8000422: 4bbd ldr r3, [pc, #756] @ (8000718 <manageCDC+0x31c>)
8000424: 781b ldrb r3, [r3, #0]
8000426: 461a mov r2, r3
8000428: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800042c: b2d9 uxtb r1, r3
800042e: 4bbb ldr r3, [pc, #748] @ (800071c <manageCDC+0x320>)
8000430: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
8000432: bf00 nop
8000434: 4bb8 ldr r3, [pc, #736] @ (8000718 <manageCDC+0x31c>)
8000436: 781b ldrb r3, [r3, #0]
8000438: 461a mov r2, r3
800043a: 4bb8 ldr r3, [pc, #736] @ (800071c <manageCDC+0x320>)
800043c: 4413 add r3, r2
800043e: 2101 movs r1, #1
8000440: 4618 mov r0, r3
8000442: f00d fc05 bl 800dc50 <CDC_Transmit_FS>
8000446: 4603 mov r3, r0
8000448: 2b01 cmp r3, #1
800044a: d0f3 beq.n 8000434 <manageCDC+0x38>
if((rx==0x0d)||(rx==0x0a)){
800044c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8000450: 2b0d cmp r3, #13
8000452: d004 beq.n 800045e <manageCDC+0x62>
8000454: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8000458: 2b0a cmp r3, #10
800045a: f040 8699 bne.w 8001190 <manageCDC+0xd94>
if(rxidx){
800045e: 4bae ldr r3, [pc, #696] @ (8000718 <manageCDC+0x31c>)
8000460: 781b ldrb r3, [r3, #0]
8000462: 2b00 cmp r3, #0
8000464: f000 8690 beq.w 8001188 <manageCDC+0xd8c>
switch(rxbuf[0]){
8000468: 4bac ldr r3, [pc, #688] @ (800071c <manageCDC+0x320>)
800046a: 781b ldrb r3, [r3, #0]
800046c: 3b49 subs r3, #73 @ 0x49
800046e: 2b24 cmp r3, #36 @ 0x24
8000470: f200 8678 bhi.w 8001164 <manageCDC+0xd68>
8000474: a201 add r2, pc, #4 @ (adr r2, 800047c <manageCDC+0x80>)
8000476: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800047a: bf00 nop
800047c: 080006c7 .word 0x080006c7
8000480: 08001165 .word 0x08001165
8000484: 08001165 .word 0x08001165
8000488: 08001165 .word 0x08001165
800048c: 08001165 .word 0x08001165
8000490: 08001165 .word 0x08001165
8000494: 08001165 .word 0x08001165
8000498: 08001165 .word 0x08001165
800049c: 08001165 .word 0x08001165
80004a0: 08001165 .word 0x08001165
80004a4: 08001165 .word 0x08001165
80004a8: 08001165 .word 0x08001165
80004ac: 08001165 .word 0x08001165
80004b0: 08001165 .word 0x08001165
80004b4: 08001165 .word 0x08001165
80004b8: 08001165 .word 0x08001165
80004bc: 08001165 .word 0x08001165
80004c0: 08001165 .word 0x08001165
80004c4: 08001165 .word 0x08001165
80004c8: 08001165 .word 0x08001165
80004cc: 08001165 .word 0x08001165
80004d0: 08001165 .word 0x08001165
80004d4: 08001165 .word 0x08001165
80004d8: 08001165 .word 0x08001165
80004dc: 08001165 .word 0x08001165
80004e0: 080006eb .word 0x080006eb
80004e4: 08001165 .word 0x08001165
80004e8: 08001165 .word 0x08001165
80004ec: 080009f5 .word 0x080009f5
80004f0: 08001165 .word 0x08001165
80004f4: 08001165 .word 0x08001165
80004f8: 08001165 .word 0x08001165
80004fc: 08000511 .word 0x08000511
8000500: 08001165 .word 0x08001165
8000504: 08001165 .word 0x08001165
8000508: 08001165 .word 0x08001165
800050c: 080007ad .word 0x080007ad
case 'i':
sprintf((char*)s,"info\n");
8000510: f107 0310 add.w r3, r7, #16
8000514: 4982 ldr r1, [pc, #520] @ (8000720 <manageCDC+0x324>)
8000516: 4618 mov r0, r3
8000518: f00d ff78 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800051c: bf00 nop
800051e: f107 0310 add.w r3, r7, #16
8000522: 2105 movs r1, #5
8000524: 4618 mov r0, r3
8000526: f00d fb93 bl 800dc50 <CDC_Transmit_FS>
800052a: 4603 mov r3, r0
800052c: 2b01 cmp r3, #1
800052e: d0f6 beq.n 800051e <manageCDC+0x122>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
8000530: 2100 movs r1, #0
8000532: 487c ldr r0, [pc, #496] @ (8000724 <manageCDC+0x328>)
8000534: f003 ff64 bl 8004400 <IsPwmRunning>
8000538: 4603 mov r3, r0
800053a: 4698 mov r8, r3
800053c: 2104 movs r1, #4
800053e: 4879 ldr r0, [pc, #484] @ (8000724 <manageCDC+0x328>)
8000540: f003 ff5e bl 8004400 <IsPwmRunning>
8000544: 4603 mov r3, r0
8000546: 4699 mov r9, r3
8000548: 2108 movs r1, #8
800054a: 4876 ldr r0, [pc, #472] @ (8000724 <manageCDC+0x328>)
800054c: f003 ff58 bl 8004400 <IsPwmRunning>
8000550: 4603 mov r3, r0
8000552: 461c mov r4, r3
8000554: 210c movs r1, #12
8000556: 4873 ldr r0, [pc, #460] @ (8000724 <manageCDC+0x328>)
8000558: f003 ff52 bl 8004400 <IsPwmRunning>
800055c: 4603 mov r3, r0
800055e: 461d mov r5, r3
8000560: 2100 movs r1, #0
8000562: 4871 ldr r0, [pc, #452] @ (8000728 <manageCDC+0x32c>)
8000564: f003 ff4c bl 8004400 <IsPwmRunning>
8000568: 4603 mov r3, r0
800056a: 461e mov r6, r3
800056c: 2104 movs r1, #4
800056e: 486e ldr r0, [pc, #440] @ (8000728 <manageCDC+0x32c>)
8000570: f003 ff46 bl 8004400 <IsPwmRunning>
8000574: 4603 mov r3, r0
8000576: 607b str r3, [r7, #4]
8000578: 2108 movs r1, #8
800057a: 486b ldr r0, [pc, #428] @ (8000728 <manageCDC+0x32c>)
800057c: f003 ff40 bl 8004400 <IsPwmRunning>
8000580: 4603 mov r3, r0
8000582: 603b str r3, [r7, #0]
8000584: 210c movs r1, #12
8000586: 4868 ldr r0, [pc, #416] @ (8000728 <manageCDC+0x32c>)
8000588: f003 ff3a bl 8004400 <IsPwmRunning>
800058c: 4603 mov r3, r0
800058e: f107 0010 add.w r0, r7, #16
8000592: 9305 str r3, [sp, #20]
8000594: 683a ldr r2, [r7, #0]
8000596: 9204 str r2, [sp, #16]
8000598: 687b ldr r3, [r7, #4]
800059a: 9303 str r3, [sp, #12]
800059c: 9602 str r6, [sp, #8]
800059e: 9501 str r5, [sp, #4]
80005a0: 9400 str r4, [sp, #0]
80005a2: 464b mov r3, r9
80005a4: 4642 mov r2, r8
80005a6: 4961 ldr r1, [pc, #388] @ (800072c <manageCDC+0x330>)
80005a8: f00d ff30 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80005ac: bf00 nop
80005ae: f107 0310 add.w r3, r7, #16
80005b2: 4618 mov r0, r3
80005b4: f7ff fdca bl 800014c <strlen>
80005b8: 4603 mov r3, r0
80005ba: b29a uxth r2, r3
80005bc: f107 0310 add.w r3, r7, #16
80005c0: 4611 mov r1, r2
80005c2: 4618 mov r0, r3
80005c4: f00d fb44 bl 800dc50 <CDC_Transmit_FS>
80005c8: 4603 mov r3, r0
80005ca: 2b01 cmp r3, #1
80005cc: d0ef beq.n 80005ae <manageCDC+0x1b2>
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
80005ce: 4b55 ldr r3, [pc, #340] @ (8000724 <manageCDC+0x328>)
80005d0: 681b ldr r3, [r3, #0]
80005d2: 6b5b ldr r3, [r3, #52] @ 0x34
80005d4: 607b str r3, [r7, #4]
80005d6: 4b53 ldr r3, [pc, #332] @ (8000724 <manageCDC+0x328>)
80005d8: 681b ldr r3, [r3, #0]
80005da: 6b99 ldr r1, [r3, #56] @ 0x38
80005dc: 6039 str r1, [r7, #0]
80005de: 4b51 ldr r3, [pc, #324] @ (8000724 <manageCDC+0x328>)
80005e0: 681b ldr r3, [r3, #0]
80005e2: 6bdb ldr r3, [r3, #60] @ 0x3c
80005e4: 4a4f ldr r2, [pc, #316] @ (8000724 <manageCDC+0x328>)
80005e6: 6812 ldr r2, [r2, #0]
80005e8: 6c12 ldr r2, [r2, #64] @ 0x40
80005ea: 494f ldr r1, [pc, #316] @ (8000728 <manageCDC+0x32c>)
80005ec: 6809 ldr r1, [r1, #0]
80005ee: 6b49 ldr r1, [r1, #52] @ 0x34
80005f0: 484d ldr r0, [pc, #308] @ (8000728 <manageCDC+0x32c>)
80005f2: 6800 ldr r0, [r0, #0]
80005f4: 6b80 ldr r0, [r0, #56] @ 0x38
80005f6: 4c4c ldr r4, [pc, #304] @ (8000728 <manageCDC+0x32c>)
80005f8: 6824 ldr r4, [r4, #0]
80005fa: 6be4 ldr r4, [r4, #60] @ 0x3c
80005fc: 4d4a ldr r5, [pc, #296] @ (8000728 <manageCDC+0x32c>)
80005fe: 682d ldr r5, [r5, #0]
8000600: 6c2d ldr r5, [r5, #64] @ 0x40
8000602: f107 0610 add.w r6, r7, #16
8000606: 9505 str r5, [sp, #20]
8000608: 9404 str r4, [sp, #16]
800060a: 9003 str r0, [sp, #12]
800060c: 9102 str r1, [sp, #8]
800060e: 9201 str r2, [sp, #4]
8000610: 9300 str r3, [sp, #0]
8000612: 683b ldr r3, [r7, #0]
8000614: 687a ldr r2, [r7, #4]
8000616: 4946 ldr r1, [pc, #280] @ (8000730 <manageCDC+0x334>)
8000618: 4630 mov r0, r6
800061a: f00d fef7 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800061e: bf00 nop
8000620: f107 0310 add.w r3, r7, #16
8000624: 4618 mov r0, r3
8000626: f7ff fd91 bl 800014c <strlen>
800062a: 4603 mov r3, r0
800062c: b29a uxth r2, r3
800062e: f107 0310 add.w r3, r7, #16
8000632: 4611 mov r1, r2
8000634: 4618 mov r0, r3
8000636: f00d fb0b bl 800dc50 <CDC_Transmit_FS>
800063a: 4603 mov r3, r0
800063c: 2b01 cmp r3, #1
800063e: d0ef beq.n 8000620 <manageCDC+0x224>
sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8);
8000640: 4b3c ldr r3, [pc, #240] @ (8000734 <manageCDC+0x338>)
8000642: 781b ldrb r3, [r3, #0]
8000644: 461d mov r5, r3
8000646: 4b3c ldr r3, [pc, #240] @ (8000738 <manageCDC+0x33c>)
8000648: 881b ldrh r3, [r3, #0]
800064a: 461e mov r6, r3
800064c: 4b3b ldr r3, [pc, #236] @ (800073c <manageCDC+0x340>)
800064e: 881b ldrh r3, [r3, #0]
8000650: 461a mov r2, r3
8000652: 4b3b ldr r3, [pc, #236] @ (8000740 <manageCDC+0x344>)
8000654: 881b ldrh r3, [r3, #0]
8000656: 4619 mov r1, r3
8000658: 4b3a ldr r3, [pc, #232] @ (8000744 <manageCDC+0x348>)
800065a: 881b ldrh r3, [r3, #0]
800065c: 461c mov r4, r3
800065e: 4b3a ldr r3, [pc, #232] @ (8000748 <manageCDC+0x34c>)
8000660: 881b ldrh r3, [r3, #0]
8000662: f107 0010 add.w r0, r7, #16
8000666: 9303 str r3, [sp, #12]
8000668: 9402 str r4, [sp, #8]
800066a: 9101 str r1, [sp, #4]
800066c: 9200 str r2, [sp, #0]
800066e: 4633 mov r3, r6
8000670: 462a mov r2, r5
8000672: 4936 ldr r1, [pc, #216] @ (800074c <manageCDC+0x350>)
8000674: f00d feca bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000678: bf00 nop
800067a: f107 0310 add.w r3, r7, #16
800067e: 4618 mov r0, r3
8000680: f7ff fd64 bl 800014c <strlen>
8000684: 4603 mov r3, r0
8000686: b29a uxth r2, r3
8000688: f107 0310 add.w r3, r7, #16
800068c: 4611 mov r1, r2
800068e: 4618 mov r0, r3
8000690: f00d fade bl 800dc50 <CDC_Transmit_FS>
8000694: 4603 mov r3, r0
8000696: 2b01 cmp r3, #1
8000698: d0ef beq.n 800067a <manageCDC+0x27e>
sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti);
800069a: 4b2d ldr r3, [pc, #180] @ (8000750 <manageCDC+0x354>)
800069c: 781b ldrb r3, [r3, #0]
800069e: 461a mov r2, r3
80006a0: 4b2c ldr r3, [pc, #176] @ (8000754 <manageCDC+0x358>)
80006a2: 781b ldrb r3, [r3, #0]
80006a4: f107 0010 add.w r0, r7, #16
80006a8: 492b ldr r1, [pc, #172] @ (8000758 <manageCDC+0x35c>)
80006aa: f00d feaf bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 31) == USBD_BUSY);
80006ae: bf00 nop
80006b0: f107 0310 add.w r3, r7, #16
80006b4: 211f movs r1, #31
80006b6: 4618 mov r0, r3
80006b8: f00d faca bl 800dc50 <CDC_Transmit_FS>
80006bc: 4603 mov r3, r0
80006be: 2b01 cmp r3, #1
80006c0: d0f6 beq.n 80006b0 <manageCDC+0x2b4>
break;
80006c2: f000 bd61 b.w 8001188 <manageCDC+0xd8c>
case 'I':
sprintf((char*)s,"\nID000000");
80006c6: f107 0310 add.w r3, r7, #16
80006ca: 4924 ldr r1, [pc, #144] @ (800075c <manageCDC+0x360>)
80006cc: 4618 mov r0, r3
80006ce: f00d fe9d bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 9) == USBD_BUSY);
80006d2: bf00 nop
80006d4: f107 0310 add.w r3, r7, #16
80006d8: 2109 movs r1, #9
80006da: 4618 mov r0, r3
80006dc: f00d fab8 bl 800dc50 <CDC_Transmit_FS>
80006e0: 4603 mov r3, r0
80006e2: 2b01 cmp r3, #1
80006e4: d0f6 beq.n 80006d4 <manageCDC+0x2d8>
break;
80006e6: f000 bd4f b.w 8001188 <manageCDC+0xd8c>
case 'b':
if(rxidx==2){
80006ea: 4b0b ldr r3, [pc, #44] @ (8000718 <manageCDC+0x31c>)
80006ec: 781b ldrb r3, [r3, #0]
80006ee: 2b02 cmp r3, #2
80006f0: d14a bne.n 8000788 <manageCDC+0x38c>
if(rxbuf[1]=='0'){
80006f2: 4b0a ldr r3, [pc, #40] @ (800071c <manageCDC+0x320>)
80006f4: 785b ldrb r3, [r3, #1]
80006f6: 2b30 cmp r3, #48 @ 0x30
80006f8: d104 bne.n 8000704 <manageCDC+0x308>
nobuz=false;
80006fa: 4b19 ldr r3, [pc, #100] @ (8000760 <manageCDC+0x364>)
80006fc: 2200 movs r2, #0
80006fe: 701a strb r2, [r3, #0]
}
}else{
sprintf((char*)s,"\nb0|1");
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
}
break;
8000700: f000 bd42 b.w 8001188 <manageCDC+0xd8c>
}else if(rxbuf[1]=='1'){
8000704: 4b05 ldr r3, [pc, #20] @ (800071c <manageCDC+0x320>)
8000706: 785b ldrb r3, [r3, #1]
8000708: 2b31 cmp r3, #49 @ 0x31
800070a: d12b bne.n 8000764 <manageCDC+0x368>
nobuz=true;
800070c: 4b14 ldr r3, [pc, #80] @ (8000760 <manageCDC+0x364>)
800070e: 2201 movs r2, #1
8000710: 701a strb r2, [r3, #0]
break;
8000712: f000 bd39 b.w 8001188 <manageCDC+0xd8c>
8000716: bf00 nop
8000718: 20000234 .word 0x20000234
800071c: 20000238 .word 0x20000238
8000720: 0800ed84 .word 0x0800ed84
8000724: 20000318 .word 0x20000318
8000728: 20000360 .word 0x20000360
800072c: 0800ed8c .word 0x0800ed8c
8000730: 0800eda4 .word 0x0800eda4
8000734: 200003f0 .word 0x200003f0
8000738: 2000022a .word 0x2000022a
800073c: 2000022c .word 0x2000022c
8000740: 2000022e .word 0x2000022e
8000744: 20000230 .word 0x20000230
8000748: 20000232 .word 0x20000232
800074c: 0800edd8 .word 0x0800edd8
8000750: 20000456 .word 0x20000456
8000754: 20000454 .word 0x20000454
8000758: 0800ee10 .word 0x0800ee10
800075c: 0800ee30 .word 0x0800ee30
8000760: 20000458 .word 0x20000458
sprintf((char*)s,"\nb0|1");
8000764: f107 0310 add.w r3, r7, #16
8000768: 499b ldr r1, [pc, #620] @ (80009d8 <manageCDC+0x5dc>)
800076a: 4618 mov r0, r3
800076c: f00d fe4e bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000770: bf00 nop
8000772: f107 0310 add.w r3, r7, #16
8000776: 2105 movs r1, #5
8000778: 4618 mov r0, r3
800077a: f00d fa69 bl 800dc50 <CDC_Transmit_FS>
800077e: 4603 mov r3, r0
8000780: 2b01 cmp r3, #1
8000782: d0f6 beq.n 8000772 <manageCDC+0x376>
break;
8000784: f000 bd00 b.w 8001188 <manageCDC+0xd8c>
sprintf((char*)s,"\nb0|1");
8000788: f107 0310 add.w r3, r7, #16
800078c: 4992 ldr r1, [pc, #584] @ (80009d8 <manageCDC+0x5dc>)
800078e: 4618 mov r0, r3
8000790: f00d fe3c bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000794: bf00 nop
8000796: f107 0310 add.w r3, r7, #16
800079a: 2105 movs r1, #5
800079c: 4618 mov r0, r3
800079e: f00d fa57 bl 800dc50 <CDC_Transmit_FS>
80007a2: 4603 mov r3, r0
80007a4: 2b01 cmp r3, #1
80007a6: d0f6 beq.n 8000796 <manageCDC+0x39a>
break;
80007a8: f000 bcee b.w 8001188 <manageCDC+0xd8c>
case 'm':
if(rxidx==8){
80007ac: 4b8b ldr r3, [pc, #556] @ (80009dc <manageCDC+0x5e0>)
80007ae: 781b ldrb r3, [r3, #0]
80007b0: 2b08 cmp r3, #8
80007b2: f040 80fe bne.w 80009b2 <manageCDC+0x5b6>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
80007b6: 4b8a ldr r3, [pc, #552] @ (80009e0 <manageCDC+0x5e4>)
80007b8: 785b ldrb r3, [r3, #1]
80007ba: 2b30 cmp r3, #48 @ 0x30
80007bc: f240 80e8 bls.w 8000990 <manageCDC+0x594>
80007c0: 4b87 ldr r3, [pc, #540] @ (80009e0 <manageCDC+0x5e4>)
80007c2: 785b ldrb r3, [r3, #1]
80007c4: 2b34 cmp r3, #52 @ 0x34
80007c6: f200 80e3 bhi.w 8000990 <manageCDC+0x594>
mot=rxbuf[1]-='0';
80007ca: 4b85 ldr r3, [pc, #532] @ (80009e0 <manageCDC+0x5e4>)
80007cc: 785b ldrb r3, [r3, #1]
80007ce: 3b30 subs r3, #48 @ 0x30
80007d0: b2da uxtb r2, r3
80007d2: 4b83 ldr r3, [pc, #524] @ (80009e0 <manageCDC+0x5e4>)
80007d4: 705a strb r2, [r3, #1]
80007d6: 4b82 ldr r3, [pc, #520] @ (80009e0 <manageCDC+0x5e4>)
80007d8: 785b ldrb r3, [r3, #1]
80007da: f887 30df strb.w r3, [r7, #223] @ 0xdf
if(rxbuf[2]=='f'){
80007de: 4b80 ldr r3, [pc, #512] @ (80009e0 <manageCDC+0x5e4>)
80007e0: 789b ldrb r3, [r3, #2]
80007e2: 2b66 cmp r3, #102 @ 0x66
80007e4: d103 bne.n 80007ee <manageCDC+0x3f2>
dir=FW;
80007e6: 2300 movs r3, #0
80007e8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7
80007ec: e019 b.n 8000822 <manageCDC+0x426>
}else if(rxbuf[2]=='b'){
80007ee: 4b7c ldr r3, [pc, #496] @ (80009e0 <manageCDC+0x5e4>)
80007f0: 789b ldrb r3, [r3, #2]
80007f2: 2b62 cmp r3, #98 @ 0x62
80007f4: d103 bne.n 80007fe <manageCDC+0x402>
dir=BW;
80007f6: 2301 movs r3, #1
80007f8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7
80007fc: e011 b.n 8000822 <manageCDC+0x426>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80007fe: f107 0310 add.w r3, r7, #16
8000802: 4978 ldr r1, [pc, #480] @ (80009e4 <manageCDC+0x5e8>)
8000804: 4618 mov r0, r3
8000806: f00d fe01 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
800080a: bf00 nop
800080c: f107 0310 add.w r3, r7, #16
8000810: 2110 movs r1, #16
8000812: 4618 mov r0, r3
8000814: f00d fa1c bl 800dc50 <CDC_Transmit_FS>
8000818: 4603 mov r3, r0
800081a: 2b01 cmp r3, #1
800081c: d0f6 beq.n 800080c <manageCDC+0x410>
break;
800081e: f000 bcb3 b.w 8001188 <manageCDC+0xd8c>
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000822: 4b6f ldr r3, [pc, #444] @ (80009e0 <manageCDC+0x5e4>)
8000824: 78db ldrb r3, [r3, #3]
8000826: 2b2f cmp r3, #47 @ 0x2f
8000828: f240 80a1 bls.w 800096e <manageCDC+0x572>
800082c: 4b6c ldr r3, [pc, #432] @ (80009e0 <manageCDC+0x5e4>)
800082e: 78db ldrb r3, [r3, #3]
8000830: 2b39 cmp r3, #57 @ 0x39
8000832: f200 809c bhi.w 800096e <manageCDC+0x572>
8000836: 4b6a ldr r3, [pc, #424] @ (80009e0 <manageCDC+0x5e4>)
8000838: 791b ldrb r3, [r3, #4]
800083a: 2b2f cmp r3, #47 @ 0x2f
800083c: f240 8097 bls.w 800096e <manageCDC+0x572>
8000840: 4b67 ldr r3, [pc, #412] @ (80009e0 <manageCDC+0x5e4>)
8000842: 791b ldrb r3, [r3, #4]
8000844: 2b39 cmp r3, #57 @ 0x39
8000846: f200 8092 bhi.w 800096e <manageCDC+0x572>
800084a: 4b65 ldr r3, [pc, #404] @ (80009e0 <manageCDC+0x5e4>)
800084c: 795b ldrb r3, [r3, #5]
800084e: 2b2f cmp r3, #47 @ 0x2f
8000850: f240 808d bls.w 800096e <manageCDC+0x572>
8000854: 4b62 ldr r3, [pc, #392] @ (80009e0 <manageCDC+0x5e4>)
8000856: 795b ldrb r3, [r3, #5]
8000858: 2b39 cmp r3, #57 @ 0x39
800085a: f200 8088 bhi.w 800096e <manageCDC+0x572>
800085e: 4b60 ldr r3, [pc, #384] @ (80009e0 <manageCDC+0x5e4>)
8000860: 799b ldrb r3, [r3, #6]
8000862: 2b2f cmp r3, #47 @ 0x2f
8000864: f240 8083 bls.w 800096e <manageCDC+0x572>
8000868: 4b5d ldr r3, [pc, #372] @ (80009e0 <manageCDC+0x5e4>)
800086a: 799b ldrb r3, [r3, #6]
800086c: 2b39 cmp r3, #57 @ 0x39
800086e: d87e bhi.n 800096e <manageCDC+0x572>
8000870: 4b5b ldr r3, [pc, #364] @ (80009e0 <manageCDC+0x5e4>)
8000872: 79db ldrb r3, [r3, #7]
8000874: 2b2f cmp r3, #47 @ 0x2f
8000876: d97a bls.n 800096e <manageCDC+0x572>
8000878: 4b59 ldr r3, [pc, #356] @ (80009e0 <manageCDC+0x5e4>)
800087a: 79db ldrb r3, [r3, #7]
800087c: 2b39 cmp r3, #57 @ 0x39
800087e: d876 bhi.n 800096e <manageCDC+0x572>
dm=rxbuf[3]-='0';
8000880: 4b57 ldr r3, [pc, #348] @ (80009e0 <manageCDC+0x5e4>)
8000882: 78db ldrb r3, [r3, #3]
8000884: 3b30 subs r3, #48 @ 0x30
8000886: b2da uxtb r2, r3
8000888: 4b55 ldr r3, [pc, #340] @ (80009e0 <manageCDC+0x5e4>)
800088a: 70da strb r2, [r3, #3]
800088c: 4b54 ldr r3, [pc, #336] @ (80009e0 <manageCDC+0x5e4>)
800088e: 78db ldrb r3, [r3, #3]
8000890: f887 30de strb.w r3, [r7, #222] @ 0xde
m=rxbuf[4]-='0';
8000894: 4b52 ldr r3, [pc, #328] @ (80009e0 <manageCDC+0x5e4>)
8000896: 791b ldrb r3, [r3, #4]
8000898: 3b30 subs r3, #48 @ 0x30
800089a: b2da uxtb r2, r3
800089c: 4b50 ldr r3, [pc, #320] @ (80009e0 <manageCDC+0x5e4>)
800089e: 711a strb r2, [r3, #4]
80008a0: 4b4f ldr r3, [pc, #316] @ (80009e0 <manageCDC+0x5e4>)
80008a2: 791b ldrb r3, [r3, #4]
80008a4: f887 30dd strb.w r3, [r7, #221] @ 0xdd
c=rxbuf[5]-='0';
80008a8: 4b4d ldr r3, [pc, #308] @ (80009e0 <manageCDC+0x5e4>)
80008aa: 795b ldrb r3, [r3, #5]
80008ac: 3b30 subs r3, #48 @ 0x30
80008ae: b2da uxtb r2, r3
80008b0: 4b4b ldr r3, [pc, #300] @ (80009e0 <manageCDC+0x5e4>)
80008b2: 715a strb r2, [r3, #5]
80008b4: 4b4a ldr r3, [pc, #296] @ (80009e0 <manageCDC+0x5e4>)
80008b6: 795b ldrb r3, [r3, #5]
80008b8: f887 30dc strb.w r3, [r7, #220] @ 0xdc
d=rxbuf[6]-='0';
80008bc: 4b48 ldr r3, [pc, #288] @ (80009e0 <manageCDC+0x5e4>)
80008be: 799b ldrb r3, [r3, #6]
80008c0: 3b30 subs r3, #48 @ 0x30
80008c2: b2da uxtb r2, r3
80008c4: 4b46 ldr r3, [pc, #280] @ (80009e0 <manageCDC+0x5e4>)
80008c6: 719a strb r2, [r3, #6]
80008c8: 4b45 ldr r3, [pc, #276] @ (80009e0 <manageCDC+0x5e4>)
80008ca: 799b ldrb r3, [r3, #6]
80008cc: f887 30db strb.w r3, [r7, #219] @ 0xdb
u=rxbuf[7]-='0';
80008d0: 4b43 ldr r3, [pc, #268] @ (80009e0 <manageCDC+0x5e4>)
80008d2: 79db ldrb r3, [r3, #7]
80008d4: 3b30 subs r3, #48 @ 0x30
80008d6: b2da uxtb r2, r3
80008d8: 4b41 ldr r3, [pc, #260] @ (80009e0 <manageCDC+0x5e4>)
80008da: 71da strb r2, [r3, #7]
80008dc: 4b40 ldr r3, [pc, #256] @ (80009e0 <manageCDC+0x5e4>)
80008de: 79db ldrb r3, [r3, #7]
80008e0: f887 30da strb.w r3, [r7, #218] @ 0xda
val=dm;
80008e4: f897 30de ldrb.w r3, [r7, #222] @ 0xde
80008e8: b29b uxth r3, r3
80008ea: 81fb strh r3, [r7, #14]
val*=10;
80008ec: 89fb ldrh r3, [r7, #14]
80008ee: 461a mov r2, r3
80008f0: 0092 lsls r2, r2, #2
80008f2: 4413 add r3, r2
80008f4: 005b lsls r3, r3, #1
80008f6: b29b uxth r3, r3
80008f8: 81fb strh r3, [r7, #14]
val+=m;
80008fa: f897 30dd ldrb.w r3, [r7, #221] @ 0xdd
80008fe: b29a uxth r2, r3
8000900: 89fb ldrh r3, [r7, #14]
8000902: 4413 add r3, r2
8000904: b29b uxth r3, r3
8000906: 81fb strh r3, [r7, #14]
val*=10;
8000908: 89fb ldrh r3, [r7, #14]
800090a: 461a mov r2, r3
800090c: 0092 lsls r2, r2, #2
800090e: 4413 add r3, r2
8000910: 005b lsls r3, r3, #1
8000912: b29b uxth r3, r3
8000914: 81fb strh r3, [r7, #14]
val+=c;
8000916: f897 30dc ldrb.w r3, [r7, #220] @ 0xdc
800091a: b29a uxth r2, r3
800091c: 89fb ldrh r3, [r7, #14]
800091e: 4413 add r3, r2
8000920: b29b uxth r3, r3
8000922: 81fb strh r3, [r7, #14]
val*=10;
8000924: 89fb ldrh r3, [r7, #14]
8000926: 461a mov r2, r3
8000928: 0092 lsls r2, r2, #2
800092a: 4413 add r3, r2
800092c: 005b lsls r3, r3, #1
800092e: b29b uxth r3, r3
8000930: 81fb strh r3, [r7, #14]
val+=d;
8000932: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
8000936: b29a uxth r2, r3
8000938: 89fb ldrh r3, [r7, #14]
800093a: 4413 add r3, r2
800093c: b29b uxth r3, r3
800093e: 81fb strh r3, [r7, #14]
val*=10;
8000940: 89fb ldrh r3, [r7, #14]
8000942: 461a mov r2, r3
8000944: 0092 lsls r2, r2, #2
8000946: 4413 add r3, r2
8000948: 005b lsls r3, r3, #1
800094a: b29b uxth r3, r3
800094c: 81fb strh r3, [r7, #14]
val+=u;
800094e: f897 30da ldrb.w r3, [r7, #218] @ 0xda
8000952: b29a uxth r2, r3
8000954: 89fb ldrh r3, [r7, #14]
8000956: 4413 add r3, r2
8000958: b29b uxth r3, r3
800095a: 81fb strh r3, [r7, #14]
SetMot(mot,dir,val);
800095c: 89fa ldrh r2, [r7, #14]
800095e: f897 10e7 ldrb.w r1, [r7, #231] @ 0xe7
8000962: f897 30df ldrb.w r3, [r7, #223] @ 0xdf
8000966: 4618 mov r0, r3
8000968: f003 fdc0 bl 80044ec <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800096c: e032 b.n 80009d4 <manageCDC+0x5d8>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
800096e: f107 0310 add.w r3, r7, #16
8000972: 491d ldr r1, [pc, #116] @ (80009e8 <manageCDC+0x5ec>)
8000974: 4618 mov r0, r3
8000976: f00d fd49 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800097a: bf00 nop
800097c: f107 0310 add.w r3, r7, #16
8000980: 2113 movs r1, #19
8000982: 4618 mov r0, r3
8000984: f00d f964 bl 800dc50 <CDC_Transmit_FS>
8000988: 4603 mov r3, r0
800098a: 2b01 cmp r3, #1
800098c: d0f6 beq.n 800097c <manageCDC+0x580>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800098e: e021 b.n 80009d4 <manageCDC+0x5d8>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
8000990: f107 0310 add.w r3, r7, #16
8000994: 4915 ldr r1, [pc, #84] @ (80009ec <manageCDC+0x5f0>)
8000996: 4618 mov r0, r3
8000998: f00d fd38 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800099c: bf00 nop
800099e: f107 0310 add.w r3, r7, #16
80009a2: 2113 movs r1, #19
80009a4: 4618 mov r0, r3
80009a6: f00d f953 bl 800dc50 <CDC_Transmit_FS>
80009aa: 4603 mov r3, r0
80009ac: 2b01 cmp r3, #1
80009ae: d0f6 beq.n 800099e <manageCDC+0x5a2>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
80009b0: e3ea b.n 8001188 <manageCDC+0xd8c>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
80009b2: f107 0310 add.w r3, r7, #16
80009b6: 490e ldr r1, [pc, #56] @ (80009f0 <manageCDC+0x5f4>)
80009b8: 4618 mov r0, r3
80009ba: f00d fd27 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80009be: bf00 nop
80009c0: f107 0310 add.w r3, r7, #16
80009c4: 210a movs r1, #10
80009c6: 4618 mov r0, r3
80009c8: f00d f942 bl 800dc50 <CDC_Transmit_FS>
80009cc: 4603 mov r3, r0
80009ce: 2b01 cmp r3, #1
80009d0: d0f6 beq.n 80009c0 <manageCDC+0x5c4>
break;
80009d2: e3d9 b.n 8001188 <manageCDC+0xd8c>
80009d4: e3d8 b.n 8001188 <manageCDC+0xd8c>
80009d6: bf00 nop
80009d8: 0800ee3c .word 0x0800ee3c
80009dc: 20000234 .word 0x20000234
80009e0: 20000238 .word 0x20000238
80009e4: 0800ee44 .word 0x0800ee44
80009e8: 0800ee58 .word 0x0800ee58
80009ec: 0800ee78 .word 0x0800ee78
80009f0: 0800ee8c .word 0x0800ee8c
case 'e':
if(rxidx>1){
80009f4: 4bbb ldr r3, [pc, #748] @ (8000ce4 <manageCDC+0x8e8>)
80009f6: 781b ldrb r3, [r3, #0]
80009f8: 2b01 cmp r3, #1
80009fa: f240 839b bls.w 8001134 <manageCDC+0xd38>
if(rxbuf[1]=='r'){
80009fe: 4bba ldr r3, [pc, #744] @ (8000ce8 <manageCDC+0x8ec>)
8000a00: 785b ldrb r3, [r3, #1]
8000a02: 2b72 cmp r3, #114 @ 0x72
8000a04: f040 8086 bne.w 8000b14 <manageCDC+0x718>
if(rxidx==4){
8000a08: 4bb6 ldr r3, [pc, #728] @ (8000ce4 <manageCDC+0x8e8>)
8000a0a: 781b ldrb r3, [r3, #0]
8000a0c: 2b04 cmp r3, #4
8000a0e: d169 bne.n 8000ae4 <manageCDC+0x6e8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000a10: 4bb5 ldr r3, [pc, #724] @ (8000ce8 <manageCDC+0x8ec>)
8000a12: 789a ldrb r2, [r3, #2]
8000a14: 4bb4 ldr r3, [pc, #720] @ (8000ce8 <manageCDC+0x8ec>)
8000a16: 78d9 ldrb r1, [r3, #3]
8000a18: f107 030c add.w r3, r7, #12
8000a1c: 9300 str r3, [sp, #0]
8000a1e: 460b mov r3, r1
8000a20: 2130 movs r1, #48 @ 0x30
8000a22: 2030 movs r0, #48 @ 0x30
8000a24: f7ff fc4f bl 80002c6 <toHex>
8000a28: 4603 mov r3, r0
8000a2a: 2b00 cmp r3, #0
8000a2c: d042 beq.n 8000ab4 <manageCDC+0x6b8>
st=EEW_Read(eeadd, &val);
8000a2e: 89bb ldrh r3, [r7, #12]
8000a30: b2db uxtb r3, r3
8000a32: f107 020e add.w r2, r7, #14
8000a36: 4611 mov r1, r2
8000a38: 4618 mov r0, r3
8000a3a: f7ff fc1b bl 8000274 <EEW_Read>
8000a3e: 4603 mov r3, r0
8000a40: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK){
8000a44: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000a48: 2b00 cmp r3, #0
8000a4a: d119 bne.n 8000a80 <manageCDC+0x684>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
8000a4c: 89bb ldrh r3, [r7, #12]
8000a4e: 461a mov r2, r3
8000a50: 89fb ldrh r3, [r7, #14]
8000a52: f107 0010 add.w r0, r7, #16
8000a56: 49a5 ldr r1, [pc, #660] @ (8000cec <manageCDC+0x8f0>)
8000a58: f00d fcd8 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a5c: bf00 nop
8000a5e: f107 0310 add.w r3, r7, #16
8000a62: 4618 mov r0, r3
8000a64: f7ff fb72 bl 800014c <strlen>
8000a68: 4603 mov r3, r0
8000a6a: b29a uxth r2, r3
8000a6c: f107 0310 add.w r3, r7, #16
8000a70: 4611 mov r1, r2
8000a72: 4618 mov r0, r3
8000a74: f00d f8ec bl 800dc50 <CDC_Transmit_FS>
8000a78: 4603 mov r3, r0
8000a7a: 2b01 cmp r3, #1
8000a7c: d0ef beq.n 8000a5e <manageCDC+0x662>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
8000a7e: e382 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\nee read error %d",st);
8000a80: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000a84: f107 0310 add.w r3, r7, #16
8000a88: 4999 ldr r1, [pc, #612] @ (8000cf0 <manageCDC+0x8f4>)
8000a8a: 4618 mov r0, r3
8000a8c: f00d fcbe bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a90: bf00 nop
8000a92: f107 0310 add.w r3, r7, #16
8000a96: 4618 mov r0, r3
8000a98: f7ff fb58 bl 800014c <strlen>
8000a9c: 4603 mov r3, r0
8000a9e: b29a uxth r2, r3
8000aa0: f107 0310 add.w r3, r7, #16
8000aa4: 4611 mov r1, r2
8000aa6: 4618 mov r0, r3
8000aa8: f00d f8d2 bl 800dc50 <CDC_Transmit_FS>
8000aac: 4603 mov r3, r0
8000aae: 2b01 cmp r3, #1
8000ab0: d0ef beq.n 8000a92 <manageCDC+0x696>
break;
8000ab2: e368 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?eraa hex values");
8000ab4: f107 0310 add.w r3, r7, #16
8000ab8: 498e ldr r1, [pc, #568] @ (8000cf4 <manageCDC+0x8f8>)
8000aba: 4618 mov r0, r3
8000abc: f00d fca6 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ac0: bf00 nop
8000ac2: f107 0310 add.w r3, r7, #16
8000ac6: 4618 mov r0, r3
8000ac8: f7ff fb40 bl 800014c <strlen>
8000acc: 4603 mov r3, r0
8000ace: b29a uxth r2, r3
8000ad0: f107 0310 add.w r3, r7, #16
8000ad4: 4611 mov r1, r2
8000ad6: 4618 mov r0, r3
8000ad8: f00d f8ba bl 800dc50 <CDC_Transmit_FS>
8000adc: 4603 mov r3, r0
8000ade: 2b01 cmp r3, #1
8000ae0: d0ef beq.n 8000ac2 <manageCDC+0x6c6>
break;
8000ae2: e350 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?eraa");
8000ae4: f107 0310 add.w r3, r7, #16
8000ae8: 4983 ldr r1, [pc, #524] @ (8000cf8 <manageCDC+0x8fc>)
8000aea: 4618 mov r0, r3
8000aec: f00d fc8e bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000af0: bf00 nop
8000af2: f107 0310 add.w r3, r7, #16
8000af6: 4618 mov r0, r3
8000af8: f7ff fb28 bl 800014c <strlen>
8000afc: 4603 mov r3, r0
8000afe: b29a uxth r2, r3
8000b00: f107 0310 add.w r3, r7, #16
8000b04: 4611 mov r1, r2
8000b06: 4618 mov r0, r3
8000b08: f00d f8a2 bl 800dc50 <CDC_Transmit_FS>
8000b0c: 4603 mov r3, r0
8000b0e: 2b01 cmp r3, #1
8000b10: d0ef beq.n 8000af2 <manageCDC+0x6f6>
break;
8000b12: e338 b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='w'){
8000b14: 4b74 ldr r3, [pc, #464] @ (8000ce8 <manageCDC+0x8ec>)
8000b16: 785b ldrb r3, [r3, #1]
8000b18: 2b77 cmp r3, #119 @ 0x77
8000b1a: d169 bne.n 8000bf0 <manageCDC+0x7f4>
if(rxidx==8){
8000b1c: 4b71 ldr r3, [pc, #452] @ (8000ce4 <manageCDC+0x8e8>)
8000b1e: 781b ldrb r3, [r3, #0]
8000b20: 2b08 cmp r3, #8
8000b22: d14d bne.n 8000bc0 <manageCDC+0x7c4>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000b24: 4b70 ldr r3, [pc, #448] @ (8000ce8 <manageCDC+0x8ec>)
8000b26: 789a ldrb r2, [r3, #2]
8000b28: 4b6f ldr r3, [pc, #444] @ (8000ce8 <manageCDC+0x8ec>)
8000b2a: 78d9 ldrb r1, [r3, #3]
8000b2c: f107 030c add.w r3, r7, #12
8000b30: 9300 str r3, [sp, #0]
8000b32: 460b mov r3, r1
8000b34: 2130 movs r1, #48 @ 0x30
8000b36: 2030 movs r0, #48 @ 0x30
8000b38: f7ff fbc5 bl 80002c6 <toHex>
8000b3c: 4603 mov r3, r0
8000b3e: 2b00 cmp r3, #0
8000b40: d037 beq.n 8000bb2 <manageCDC+0x7b6>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000b42: 4b69 ldr r3, [pc, #420] @ (8000ce8 <manageCDC+0x8ec>)
8000b44: 7918 ldrb r0, [r3, #4]
8000b46: 4b68 ldr r3, [pc, #416] @ (8000ce8 <manageCDC+0x8ec>)
8000b48: 7959 ldrb r1, [r3, #5]
8000b4a: 4b67 ldr r3, [pc, #412] @ (8000ce8 <manageCDC+0x8ec>)
8000b4c: 799a ldrb r2, [r3, #6]
8000b4e: 4b66 ldr r3, [pc, #408] @ (8000ce8 <manageCDC+0x8ec>)
8000b50: 79dc ldrb r4, [r3, #7]
8000b52: f107 030e add.w r3, r7, #14
8000b56: 9300 str r3, [sp, #0]
8000b58: 4623 mov r3, r4
8000b5a: f7ff fbb4 bl 80002c6 <toHex>
8000b5e: 4603 mov r3, r0
8000b60: 2b00 cmp r3, #0
8000b62: d01f beq.n 8000ba4 <manageCDC+0x7a8>
st=EEW_Write(eeadd, val);
8000b64: 89bb ldrh r3, [r7, #12]
8000b66: b2db uxtb r3, r3
8000b68: 89fa ldrh r2, [r7, #14]
8000b6a: 4611 mov r1, r2
8000b6c: 4618 mov r0, r3
8000b6e: f7ff fb94 bl 800029a <EEW_Write>
8000b72: 4603 mov r3, r0
8000b74: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000b78: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000b7c: 2b00 cmp r3, #0
8000b7e: d108 bne.n 8000b92 <manageCDC+0x796>
8000b80: 89bb ldrh r3, [r7, #12]
8000b82: 461a mov r2, r3
8000b84: 89fb ldrh r3, [r7, #14]
8000b86: f107 0010 add.w r0, r7, #16
8000b8a: 495c ldr r1, [pc, #368] @ (8000cfc <manageCDC+0x900>)
8000b8c: f00d fc3e bl 800e40c <siprintf>
8000b90: e01c b.n 8000bcc <manageCDC+0x7d0>
else sprintf((char*)s,"\nee write error %d", st);
8000b92: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000b96: f107 0310 add.w r3, r7, #16
8000b9a: 4959 ldr r1, [pc, #356] @ (8000d00 <manageCDC+0x904>)
8000b9c: 4618 mov r0, r3
8000b9e: f00d fc35 bl 800e40c <siprintf>
8000ba2: e013 b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
8000ba4: f107 0310 add.w r3, r7, #16
8000ba8: 4956 ldr r1, [pc, #344] @ (8000d04 <manageCDC+0x908>)
8000baa: 4618 mov r0, r3
8000bac: f00d fc2e bl 800e40c <siprintf>
8000bb0: e00c b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaa hex values");
8000bb2: f107 0310 add.w r3, r7, #16
8000bb6: 4954 ldr r1, [pc, #336] @ (8000d08 <manageCDC+0x90c>)
8000bb8: 4618 mov r0, r3
8000bba: f00d fc27 bl 800e40c <siprintf>
8000bbe: e005 b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaavvvv");
8000bc0: f107 0310 add.w r3, r7, #16
8000bc4: 4951 ldr r1, [pc, #324] @ (8000d0c <manageCDC+0x910>)
8000bc6: 4618 mov r0, r3
8000bc8: f00d fc20 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bcc: bf00 nop
8000bce: f107 0310 add.w r3, r7, #16
8000bd2: 4618 mov r0, r3
8000bd4: f7ff faba bl 800014c <strlen>
8000bd8: 4603 mov r3, r0
8000bda: b29a uxth r2, r3
8000bdc: f107 0310 add.w r3, r7, #16
8000be0: 4611 mov r1, r2
8000be2: 4618 mov r0, r3
8000be4: f00d f834 bl 800dc50 <CDC_Transmit_FS>
8000be8: 4603 mov r3, r0
8000bea: 2b01 cmp r3, #1
8000bec: d0ef beq.n 8000bce <manageCDC+0x7d2>
break;
8000bee: e2ca b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='d'){
8000bf0: 4b3d ldr r3, [pc, #244] @ (8000ce8 <manageCDC+0x8ec>)
8000bf2: 785b ldrb r3, [r3, #1]
8000bf4: 2b64 cmp r3, #100 @ 0x64
8000bf6: f040 80a9 bne.w 8000d4c <manageCDC+0x950>
if(rxidx==2){
8000bfa: 4b3a ldr r3, [pc, #232] @ (8000ce4 <manageCDC+0x8e8>)
8000bfc: 781b ldrb r3, [r3, #0]
8000bfe: 2b02 cmp r3, #2
8000c00: f040 808c bne.w 8000d1c <manageCDC+0x920>
for(i=0;i<32;i++){
8000c04: 2300 movs r3, #0
8000c06: f887 30e6 strb.w r3, [r7, #230] @ 0xe6
8000c0a: e046 b.n 8000c9a <manageCDC+0x89e>
st=EEW_Read(i, &val);
8000c0c: f107 020e add.w r2, r7, #14
8000c10: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c14: 4611 mov r1, r2
8000c16: 4618 mov r0, r3
8000c18: f7ff fb2c bl 8000274 <EEW_Read>
8000c1c: 4603 mov r3, r0
8000c1e: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK){
8000c22: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000c26: 2b00 cmp r3, #0
8000c28: d119 bne.n 8000c5e <manageCDC+0x862>
sprintf((char*)s,"\n0x%02x=%5d ",i,val);
8000c2a: f897 20e6 ldrb.w r2, [r7, #230] @ 0xe6
8000c2e: 89fb ldrh r3, [r7, #14]
8000c30: f107 0010 add.w r0, r7, #16
8000c34: 4936 ldr r1, [pc, #216] @ (8000d10 <manageCDC+0x914>)
8000c36: f00d fbe9 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c3a: bf00 nop
8000c3c: f107 0310 add.w r3, r7, #16
8000c40: 4618 mov r0, r3
8000c42: f7ff fa83 bl 800014c <strlen>
8000c46: 4603 mov r3, r0
8000c48: b29a uxth r2, r3
8000c4a: f107 0310 add.w r3, r7, #16
8000c4e: 4611 mov r1, r2
8000c50: 4618 mov r0, r3
8000c52: f00c fffd bl 800dc50 <CDC_Transmit_FS>
8000c56: 4603 mov r3, r0
8000c58: 2b01 cmp r3, #1
8000c5a: d0ef beq.n 8000c3c <manageCDC+0x840>
8000c5c: e018 b.n 8000c90 <manageCDC+0x894>
sprintf((char*)s,"rderr %d ",st);
8000c5e: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000c62: f107 0310 add.w r3, r7, #16
8000c66: 492b ldr r1, [pc, #172] @ (8000d14 <manageCDC+0x918>)
8000c68: 4618 mov r0, r3
8000c6a: f00d fbcf bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c6e: bf00 nop
8000c70: f107 0310 add.w r3, r7, #16
8000c74: 4618 mov r0, r3
8000c76: f7ff fa69 bl 800014c <strlen>
8000c7a: 4603 mov r3, r0
8000c7c: b29a uxth r2, r3
8000c7e: f107 0310 add.w r3, r7, #16
8000c82: 4611 mov r1, r2
8000c84: 4618 mov r0, r3
8000c86: f00c ffe3 bl 800dc50 <CDC_Transmit_FS>
8000c8a: 4603 mov r3, r0
8000c8c: 2b01 cmp r3, #1
8000c8e: d0ef beq.n 8000c70 <manageCDC+0x874>
for(i=0;i<32;i++){
8000c90: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c94: 3301 adds r3, #1
8000c96: f887 30e6 strb.w r3, [r7, #230] @ 0xe6
8000c9a: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c9e: 2b1f cmp r3, #31
8000ca0: d9b4 bls.n 8000c0c <manageCDC+0x810>
if((i%4)==0){
8000ca2: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000ca6: f003 0303 and.w r3, r3, #3
8000caa: b2db uxtb r3, r3
8000cac: 2b00 cmp r3, #0
8000cae: f040 826a bne.w 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n");
8000cb2: f107 0310 add.w r3, r7, #16
8000cb6: 4918 ldr r1, [pc, #96] @ (8000d18 <manageCDC+0x91c>)
8000cb8: 4618 mov r0, r3
8000cba: f00d fba7 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000cbe: bf00 nop
8000cc0: f107 0310 add.w r3, r7, #16
8000cc4: 4618 mov r0, r3
8000cc6: f7ff fa41 bl 800014c <strlen>
8000cca: 4603 mov r3, r0
8000ccc: b29a uxth r2, r3
8000cce: f107 0310 add.w r3, r7, #16
8000cd2: 4611 mov r1, r2
8000cd4: 4618 mov r0, r3
8000cd6: f00c ffbb bl 800dc50 <CDC_Transmit_FS>
8000cda: 4603 mov r3, r0
8000cdc: 2b01 cmp r3, #1
8000cde: d0ef beq.n 8000cc0 <manageCDC+0x8c4>
break;
8000ce0: e251 b.n 8001186 <manageCDC+0xd8a>
8000ce2: bf00 nop
8000ce4: 20000234 .word 0x20000234
8000ce8: 20000238 .word 0x20000238
8000cec: 0800ee98 .word 0x0800ee98
8000cf0: 0800eeac .word 0x0800eeac
8000cf4: 0800eec0 .word 0x0800eec0
8000cf8: 0800eed4 .word 0x0800eed4
8000cfc: 0800eedc .word 0x0800eedc
8000d00: 0800eef0 .word 0x0800eef0
8000d04: 0800ef04 .word 0x0800ef04
8000d08: 0800ef1c .word 0x0800ef1c
8000d0c: 0800ef30 .word 0x0800ef30
8000d10: 0800ef3c .word 0x0800ef3c
8000d14: 0800ef4c .word 0x0800ef4c
8000d18: 0800ef58 .word 0x0800ef58
sprintf((char*)s,"\n?ed");
8000d1c: f107 0310 add.w r3, r7, #16
8000d20: 491d ldr r1, [pc, #116] @ (8000d98 <manageCDC+0x99c>)
8000d22: 4618 mov r0, r3
8000d24: f00d fb72 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d28: bf00 nop
8000d2a: f107 0310 add.w r3, r7, #16
8000d2e: 4618 mov r0, r3
8000d30: f7ff fa0c bl 800014c <strlen>
8000d34: 4603 mov r3, r0
8000d36: b29a uxth r2, r3
8000d38: f107 0310 add.w r3, r7, #16
8000d3c: 4611 mov r1, r2
8000d3e: 4618 mov r0, r3
8000d40: f00c ff86 bl 800dc50 <CDC_Transmit_FS>
8000d44: 4603 mov r3, r0
8000d46: 2b01 cmp r3, #1
8000d48: d0ef beq.n 8000d2a <manageCDC+0x92e>
break;
8000d4a: e21c b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='x'){
8000d4c: 4b13 ldr r3, [pc, #76] @ (8000d9c <manageCDC+0x9a0>)
8000d4e: 785b ldrb r3, [r3, #1]
8000d50: 2b78 cmp r3, #120 @ 0x78
8000d52: d129 bne.n 8000da8 <manageCDC+0x9ac>
if(rxidx==2){
8000d54: 4b12 ldr r3, [pc, #72] @ (8000da0 <manageCDC+0x9a4>)
8000d56: 781b ldrb r3, [r3, #0]
8000d58: 2b02 cmp r3, #2
8000d5a: d104 bne.n 8000d66 <manageCDC+0x96a>
loadDefault();
8000d5c: f000 fcc0 bl 80016e0 <loadDefault>
loadEE();
8000d60: f000 fd0c bl 800177c <loadEE>
break;
8000d64: e20f b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?ex");
8000d66: f107 0310 add.w r3, r7, #16
8000d6a: 490e ldr r1, [pc, #56] @ (8000da4 <manageCDC+0x9a8>)
8000d6c: 4618 mov r0, r3
8000d6e: f00d fb4d bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d72: bf00 nop
8000d74: f107 0310 add.w r3, r7, #16
8000d78: 4618 mov r0, r3
8000d7a: f7ff f9e7 bl 800014c <strlen>
8000d7e: 4603 mov r3, r0
8000d80: b29a uxth r2, r3
8000d82: f107 0310 add.w r3, r7, #16
8000d86: 4611 mov r1, r2
8000d88: 4618 mov r0, r3
8000d8a: f00c ff61 bl 800dc50 <CDC_Transmit_FS>
8000d8e: 4603 mov r3, r0
8000d90: 2b01 cmp r3, #1
8000d92: d0ef beq.n 8000d74 <manageCDC+0x978>
break;
8000d94: e1f7 b.n 8001186 <manageCDC+0xd8a>
8000d96: bf00 nop
8000d98: 0800ef5c .word 0x0800ef5c
8000d9c: 20000238 .word 0x20000238
8000da0: 20000234 .word 0x20000234
8000da4: 0800ef64 .word 0x0800ef64
}else if(rxbuf[1]=='v'){
8000da8: 4bb4 ldr r3, [pc, #720] @ (800107c <manageCDC+0xc80>)
8000daa: 785b ldrb r3, [r3, #1]
8000dac: 2b76 cmp r3, #118 @ 0x76
8000dae: f040 814c bne.w 800104a <manageCDC+0xc4e>
if(rxidx==2){
8000db2: 4bb3 ldr r3, [pc, #716] @ (8001080 <manageCDC+0xc84>)
8000db4: 781b ldrb r3, [r3, #0]
8000db6: 2b02 cmp r3, #2
8000db8: f040 812f bne.w 800101a <manageCDC+0xc1e>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8000dbc: 4bb1 ldr r3, [pc, #708] @ (8001084 <manageCDC+0xc88>)
8000dbe: 881b ldrh r3, [r3, #0]
8000dc0: 469c mov ip, r3
8000dc2: 4bb1 ldr r3, [pc, #708] @ (8001088 <manageCDC+0xc8c>)
8000dc4: 881b ldrh r3, [r3, #0]
8000dc6: 469e mov lr, r3
8000dc8: 4bb0 ldr r3, [pc, #704] @ (800108c <manageCDC+0xc90>)
8000dca: 881b ldrh r3, [r3, #0]
8000dcc: 461a mov r2, r3
8000dce: 4bb0 ldr r3, [pc, #704] @ (8001090 <manageCDC+0xc94>)
8000dd0: 881b ldrh r3, [r3, #0]
8000dd2: 4619 mov r1, r3
8000dd4: 4baf ldr r3, [pc, #700] @ (8001094 <manageCDC+0xc98>)
8000dd6: 881b ldrh r3, [r3, #0]
8000dd8: 461c mov r4, r3
8000dda: 4baf ldr r3, [pc, #700] @ (8001098 <manageCDC+0xc9c>)
8000ddc: 881b ldrh r3, [r3, #0]
8000dde: 461d mov r5, r3
8000de0: 4bae ldr r3, [pc, #696] @ (800109c <manageCDC+0xca0>)
8000de2: 881b ldrh r3, [r3, #0]
8000de4: 461e mov r6, r3
8000de6: 4bae ldr r3, [pc, #696] @ (80010a0 <manageCDC+0xca4>)
8000de8: 881b ldrh r3, [r3, #0]
8000dea: f107 0010 add.w r0, r7, #16
8000dee: 9305 str r3, [sp, #20]
8000df0: 9604 str r6, [sp, #16]
8000df2: 9503 str r5, [sp, #12]
8000df4: 9402 str r4, [sp, #8]
8000df6: 9101 str r1, [sp, #4]
8000df8: 9200 str r2, [sp, #0]
8000dfa: 4673 mov r3, lr
8000dfc: 4662 mov r2, ip
8000dfe: 49a9 ldr r1, [pc, #676] @ (80010a4 <manageCDC+0xca8>)
8000e00: f00d fb04 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e04: bf00 nop
8000e06: f107 0310 add.w r3, r7, #16
8000e0a: 4618 mov r0, r3
8000e0c: f7ff f99e bl 800014c <strlen>
8000e10: 4603 mov r3, r0
8000e12: b29a uxth r2, r3
8000e14: f107 0310 add.w r3, r7, #16
8000e18: 4611 mov r1, r2
8000e1a: 4618 mov r0, r3
8000e1c: f00c ff18 bl 800dc50 <CDC_Transmit_FS>
8000e20: 4603 mov r3, r0
8000e22: 2b01 cmp r3, #1
8000e24: d0ef beq.n 8000e06 <manageCDC+0xa0a>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
8000e26: 4ba0 ldr r3, [pc, #640] @ (80010a8 <manageCDC+0xcac>)
8000e28: 881b ldrh r3, [r3, #0]
8000e2a: 4619 mov r1, r3
8000e2c: 4b9f ldr r3, [pc, #636] @ (80010ac <manageCDC+0xcb0>)
8000e2e: 881b ldrh r3, [r3, #0]
8000e30: 461c mov r4, r3
8000e32: 4b9f ldr r3, [pc, #636] @ (80010b0 <manageCDC+0xcb4>)
8000e34: 881b ldrh r3, [r3, #0]
8000e36: 461a mov r2, r3
8000e38: 4b9e ldr r3, [pc, #632] @ (80010b4 <manageCDC+0xcb8>)
8000e3a: 881b ldrh r3, [r3, #0]
8000e3c: f107 0010 add.w r0, r7, #16
8000e40: 9301 str r3, [sp, #4]
8000e42: 9200 str r2, [sp, #0]
8000e44: 4623 mov r3, r4
8000e46: 460a mov r2, r1
8000e48: 499b ldr r1, [pc, #620] @ (80010b8 <manageCDC+0xcbc>)
8000e4a: f00d fadf bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e4e: bf00 nop
8000e50: f107 0310 add.w r3, r7, #16
8000e54: 4618 mov r0, r3
8000e56: f7ff f979 bl 800014c <strlen>
8000e5a: 4603 mov r3, r0
8000e5c: b29a uxth r2, r3
8000e5e: f107 0310 add.w r3, r7, #16
8000e62: 4611 mov r1, r2
8000e64: 4618 mov r0, r3
8000e66: f00c fef3 bl 800dc50 <CDC_Transmit_FS>
8000e6a: 4603 mov r3, r0
8000e6c: 2b01 cmp r3, #1
8000e6e: d0ef beq.n 8000e50 <manageCDC+0xa54>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
8000e70: 4b92 ldr r3, [pc, #584] @ (80010bc <manageCDC+0xcc0>)
8000e72: 881b ldrh r3, [r3, #0]
8000e74: 461a mov r2, r3
8000e76: 4b92 ldr r3, [pc, #584] @ (80010c0 <manageCDC+0xcc4>)
8000e78: 881b ldrh r3, [r3, #0]
8000e7a: f107 0010 add.w r0, r7, #16
8000e7e: 4991 ldr r1, [pc, #580] @ (80010c4 <manageCDC+0xcc8>)
8000e80: f00d fac4 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e84: bf00 nop
8000e86: f107 0310 add.w r3, r7, #16
8000e8a: 4618 mov r0, r3
8000e8c: f7ff f95e bl 800014c <strlen>
8000e90: 4603 mov r3, r0
8000e92: b29a uxth r2, r3
8000e94: f107 0310 add.w r3, r7, #16
8000e98: 4611 mov r1, r2
8000e9a: 4618 mov r0, r3
8000e9c: f00c fed8 bl 800dc50 <CDC_Transmit_FS>
8000ea0: 4603 mov r3, r0
8000ea2: 2b01 cmp r3, #1
8000ea4: d0ef beq.n 8000e86 <manageCDC+0xa8a>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
8000ea6: 4b88 ldr r3, [pc, #544] @ (80010c8 <manageCDC+0xccc>)
8000ea8: 881b ldrh r3, [r3, #0]
8000eaa: 4619 mov r1, r3
8000eac: 4b87 ldr r3, [pc, #540] @ (80010cc <manageCDC+0xcd0>)
8000eae: 881b ldrh r3, [r3, #0]
8000eb0: 461c mov r4, r3
8000eb2: 4b87 ldr r3, [pc, #540] @ (80010d0 <manageCDC+0xcd4>)
8000eb4: 881b ldrh r3, [r3, #0]
8000eb6: 461a mov r2, r3
8000eb8: 4b86 ldr r3, [pc, #536] @ (80010d4 <manageCDC+0xcd8>)
8000eba: 881b ldrh r3, [r3, #0]
8000ebc: f107 0010 add.w r0, r7, #16
8000ec0: 9301 str r3, [sp, #4]
8000ec2: 9200 str r2, [sp, #0]
8000ec4: 4623 mov r3, r4
8000ec6: 460a mov r2, r1
8000ec8: 4983 ldr r1, [pc, #524] @ (80010d8 <manageCDC+0xcdc>)
8000eca: f00d fa9f bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ece: bf00 nop
8000ed0: f107 0310 add.w r3, r7, #16
8000ed4: 4618 mov r0, r3
8000ed6: f7ff f939 bl 800014c <strlen>
8000eda: 4603 mov r3, r0
8000edc: b29a uxth r2, r3
8000ede: f107 0310 add.w r3, r7, #16
8000ee2: 4611 mov r1, r2
8000ee4: 4618 mov r0, r3
8000ee6: f00c feb3 bl 800dc50 <CDC_Transmit_FS>
8000eea: 4603 mov r3, r0
8000eec: 2b01 cmp r3, #1
8000eee: d0ef beq.n 8000ed0 <manageCDC+0xad4>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8000ef0: 4b7a ldr r3, [pc, #488] @ (80010dc <manageCDC+0xce0>)
8000ef2: 881b ldrh r3, [r3, #0]
8000ef4: 4619 mov r1, r3
8000ef6: 4b7a ldr r3, [pc, #488] @ (80010e0 <manageCDC+0xce4>)
8000ef8: 881b ldrh r3, [r3, #0]
8000efa: 461c mov r4, r3
8000efc: 4b79 ldr r3, [pc, #484] @ (80010e4 <manageCDC+0xce8>)
8000efe: 881b ldrh r3, [r3, #0]
8000f00: 461a mov r2, r3
8000f02: 4b79 ldr r3, [pc, #484] @ (80010e8 <manageCDC+0xcec>)
8000f04: 881b ldrh r3, [r3, #0]
8000f06: f107 0010 add.w r0, r7, #16
8000f0a: 9301 str r3, [sp, #4]
8000f0c: 9200 str r2, [sp, #0]
8000f0e: 4623 mov r3, r4
8000f10: 460a mov r2, r1
8000f12: 4976 ldr r1, [pc, #472] @ (80010ec <manageCDC+0xcf0>)
8000f14: f00d fa7a bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000f18: bf00 nop
8000f1a: f107 0310 add.w r3, r7, #16
8000f1e: 4618 mov r0, r3
8000f20: f7ff f914 bl 800014c <strlen>
8000f24: 4603 mov r3, r0
8000f26: b29a uxth r2, r3
8000f28: f107 0310 add.w r3, r7, #16
8000f2c: 4611 mov r1, r2
8000f2e: 4618 mov r0, r3
8000f30: f00c fe8e bl 800dc50 <CDC_Transmit_FS>
8000f34: 4603 mov r3, r0
8000f36: 2b01 cmp r3, #1
8000f38: d0ef beq.n 8000f1a <manageCDC+0xb1e>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8000f3a: 4b6d ldr r3, [pc, #436] @ (80010f0 <manageCDC+0xcf4>)
8000f3c: 881b ldrh r3, [r3, #0]
8000f3e: 4619 mov r1, r3
8000f40: 4b6c ldr r3, [pc, #432] @ (80010f4 <manageCDC+0xcf8>)
8000f42: 881b ldrh r3, [r3, #0]
8000f44: 461c mov r4, r3
8000f46: 4b6c ldr r3, [pc, #432] @ (80010f8 <manageCDC+0xcfc>)
8000f48: 881b ldrh r3, [r3, #0]
8000f4a: 461a mov r2, r3
8000f4c: 4b6b ldr r3, [pc, #428] @ (80010fc <manageCDC+0xd00>)
8000f4e: 881b ldrh r3, [r3, #0]
8000f50: f107 0010 add.w r0, r7, #16
8000f54: 9301 str r3, [sp, #4]
8000f56: 9200 str r2, [sp, #0]
8000f58: 4623 mov r3, r4
8000f5a: 460a mov r2, r1
8000f5c: 4968 ldr r1, [pc, #416] @ (8001100 <manageCDC+0xd04>)
8000f5e: f00d fa55 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000f62: bf00 nop
8000f64: f107 0310 add.w r3, r7, #16
8000f68: 4618 mov r0, r3
8000f6a: f7ff f8ef bl 800014c <strlen>
8000f6e: 4603 mov r3, r0
8000f70: b29a uxth r2, r3
8000f72: f107 0310 add.w r3, r7, #16
8000f76: 4611 mov r1, r2
8000f78: 4618 mov r0, r3
8000f7a: f00c fe69 bl 800dc50 <CDC_Transmit_FS>
8000f7e: 4603 mov r3, r0
8000f80: 2b01 cmp r3, #1
8000f82: d0ef beq.n 8000f64 <manageCDC+0xb68>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
8000f84: 4b5f ldr r3, [pc, #380] @ (8001104 <manageCDC+0xd08>)
8000f86: 881b ldrh r3, [r3, #0]
8000f88: 4619 mov r1, r3
8000f8a: 4b5f ldr r3, [pc, #380] @ (8001108 <manageCDC+0xd0c>)
8000f8c: 881b ldrh r3, [r3, #0]
8000f8e: 461c mov r4, r3
8000f90: 4b5e ldr r3, [pc, #376] @ (800110c <manageCDC+0xd10>)
8000f92: 881b ldrh r3, [r3, #0]
8000f94: 461a mov r2, r3
8000f96: 4b5e ldr r3, [pc, #376] @ (8001110 <manageCDC+0xd14>)
8000f98: 881b ldrh r3, [r3, #0]
8000f9a: f107 0010 add.w r0, r7, #16
8000f9e: 9301 str r3, [sp, #4]
8000fa0: 9200 str r2, [sp, #0]
8000fa2: 4623 mov r3, r4
8000fa4: 460a mov r2, r1
8000fa6: 495b ldr r1, [pc, #364] @ (8001114 <manageCDC+0xd18>)
8000fa8: f00d fa30 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000fac: bf00 nop
8000fae: f107 0310 add.w r3, r7, #16
8000fb2: 4618 mov r0, r3
8000fb4: f7ff f8ca bl 800014c <strlen>
8000fb8: 4603 mov r3, r0
8000fba: b29a uxth r2, r3
8000fbc: f107 0310 add.w r3, r7, #16
8000fc0: 4611 mov r1, r2
8000fc2: 4618 mov r0, r3
8000fc4: f00c fe44 bl 800dc50 <CDC_Transmit_FS>
8000fc8: 4603 mov r3, r0
8000fca: 2b01 cmp r3, #1
8000fcc: d0ef beq.n 8000fae <manageCDC+0xbb2>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
8000fce: 4b52 ldr r3, [pc, #328] @ (8001118 <manageCDC+0xd1c>)
8000fd0: 881b ldrh r3, [r3, #0]
8000fd2: 4619 mov r1, r3
8000fd4: 4b51 ldr r3, [pc, #324] @ (800111c <manageCDC+0xd20>)
8000fd6: 881b ldrh r3, [r3, #0]
8000fd8: 461c mov r4, r3
8000fda: 4b51 ldr r3, [pc, #324] @ (8001120 <manageCDC+0xd24>)
8000fdc: 881b ldrh r3, [r3, #0]
8000fde: 461a mov r2, r3
8000fe0: 4b50 ldr r3, [pc, #320] @ (8001124 <manageCDC+0xd28>)
8000fe2: 881b ldrh r3, [r3, #0]
8000fe4: f107 0010 add.w r0, r7, #16
8000fe8: 9301 str r3, [sp, #4]
8000fea: 9200 str r2, [sp, #0]
8000fec: 4623 mov r3, r4
8000fee: 460a mov r2, r1
8000ff0: 494d ldr r1, [pc, #308] @ (8001128 <manageCDC+0xd2c>)
8000ff2: f00d fa0b bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ff6: bf00 nop
8000ff8: f107 0310 add.w r3, r7, #16
8000ffc: 4618 mov r0, r3
8000ffe: f7ff f8a5 bl 800014c <strlen>
8001002: 4603 mov r3, r0
8001004: b29a uxth r2, r3
8001006: f107 0310 add.w r3, r7, #16
800100a: 4611 mov r1, r2
800100c: 4618 mov r0, r3
800100e: f00c fe1f bl 800dc50 <CDC_Transmit_FS>
8001012: 4603 mov r3, r0
8001014: 2b01 cmp r3, #1
8001016: d0ef beq.n 8000ff8 <manageCDC+0xbfc>
break;
8001018: e0b5 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?ev");
800101a: f107 0310 add.w r3, r7, #16
800101e: 4943 ldr r1, [pc, #268] @ (800112c <manageCDC+0xd30>)
8001020: 4618 mov r0, r3
8001022: f00d f9f3 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001026: bf00 nop
8001028: f107 0310 add.w r3, r7, #16
800102c: 4618 mov r0, r3
800102e: f7ff f88d bl 800014c <strlen>
8001032: 4603 mov r3, r0
8001034: b29a uxth r2, r3
8001036: f107 0310 add.w r3, r7, #16
800103a: 4611 mov r1, r2
800103c: 4618 mov r0, r3
800103e: f00c fe07 bl 800dc50 <CDC_Transmit_FS>
8001042: 4603 mov r3, r0
8001044: 2b01 cmp r3, #1
8001046: d0ef beq.n 8001028 <manageCDC+0xc2c>
break;
8001048: e09d b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?er|w|d|x|v");
800104a: f107 0310 add.w r3, r7, #16
800104e: 4938 ldr r1, [pc, #224] @ (8001130 <manageCDC+0xd34>)
8001050: 4618 mov r0, r3
8001052: f00d f9db bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001056: bf00 nop
8001058: f107 0310 add.w r3, r7, #16
800105c: 4618 mov r0, r3
800105e: f7ff f875 bl 800014c <strlen>
8001062: 4603 mov r3, r0
8001064: b29a uxth r2, r3
8001066: f107 0310 add.w r3, r7, #16
800106a: 4611 mov r1, r2
800106c: 4618 mov r0, r3
800106e: f00c fdef bl 800dc50 <CDC_Transmit_FS>
8001072: 4603 mov r3, r0
8001074: 2b01 cmp r3, #1
8001076: d0ef beq.n 8001058 <manageCDC+0xc5c>
break;
8001078: e085 b.n 8001186 <manageCDC+0xd8a>
800107a: bf00 nop
800107c: 20000238 .word 0x20000238
8001080: 20000234 .word 0x20000234
8001084: 20000400 .word 0x20000400
8001088: 20000402 .word 0x20000402
800108c: 20000404 .word 0x20000404
8001090: 20000406 .word 0x20000406
8001094: 20000408 .word 0x20000408
8001098: 2000040a .word 0x2000040a
800109c: 2000040c .word 0x2000040c
80010a0: 2000040e .word 0x2000040e
80010a4: 0800ef6c .word 0x0800ef6c
80010a8: 20000410 .word 0x20000410
80010ac: 20000412 .word 0x20000412
80010b0: 20000414 .word 0x20000414
80010b4: 20000416 .word 0x20000416
80010b8: 0800efc8 .word 0x0800efc8
80010bc: 20000418 .word 0x20000418
80010c0: 2000041e .word 0x2000041e
80010c4: 0800f00c .word 0x0800f00c
80010c8: 20000420 .word 0x20000420
80010cc: 20000422 .word 0x20000422
80010d0: 20000424 .word 0x20000424
80010d4: 20000426 .word 0x20000426
80010d8: 0800f024 .word 0x0800f024
80010dc: 20000428 .word 0x20000428
80010e0: 2000042a .word 0x2000042a
80010e4: 20000438 .word 0x20000438
80010e8: 2000043a .word 0x2000043a
80010ec: 0800f058 .word 0x0800f058
80010f0: 2000042c .word 0x2000042c
80010f4: 2000042e .word 0x2000042e
80010f8: 2000043c .word 0x2000043c
80010fc: 2000043e .word 0x2000043e
8001100: 0800f08c .word 0x0800f08c
8001104: 20000430 .word 0x20000430
8001108: 20000432 .word 0x20000432
800110c: 20000440 .word 0x20000440
8001110: 20000442 .word 0x20000442
8001114: 0800f0c0 .word 0x0800f0c0
8001118: 20000434 .word 0x20000434
800111c: 20000436 .word 0x20000436
8001120: 20000444 .word 0x20000444
8001124: 20000446 .word 0x20000446
8001128: 0800f0f4 .word 0x0800f0f4
800112c: 0800f128 .word 0x0800f128
8001130: 0800f130 .word 0x0800f130
sprintf((char*)s,"\n?eraa | ewaavvvv");
8001134: f107 0310 add.w r3, r7, #16
8001138: 491b ldr r1, [pc, #108] @ (80011a8 <manageCDC+0xdac>)
800113a: 4618 mov r0, r3
800113c: f00d f966 bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001140: bf00 nop
8001142: f107 0310 add.w r3, r7, #16
8001146: 4618 mov r0, r3
8001148: f7ff f800 bl 800014c <strlen>
800114c: 4603 mov r3, r0
800114e: b29a uxth r2, r3
8001150: f107 0310 add.w r3, r7, #16
8001154: 4611 mov r1, r2
8001156: 4618 mov r0, r3
8001158: f00c fd7a bl 800dc50 <CDC_Transmit_FS>
800115c: 4603 mov r3, r0
800115e: 2b01 cmp r3, #1
8001160: d0ef beq.n 8001142 <manageCDC+0xd46>
break;
8001162: e010 b.n 8001186 <manageCDC+0xd8a>
default:
sprintf((char*)s,"\n?");
8001164: f107 0310 add.w r3, r7, #16
8001168: 4910 ldr r1, [pc, #64] @ (80011ac <manageCDC+0xdb0>)
800116a: 4618 mov r0, r3
800116c: f00d f94e bl 800e40c <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8001170: bf00 nop
8001172: f107 0310 add.w r3, r7, #16
8001176: 2102 movs r1, #2
8001178: 4618 mov r0, r3
800117a: f00c fd69 bl 800dc50 <CDC_Transmit_FS>
800117e: 4603 mov r3, r0
8001180: 2b01 cmp r3, #1
8001182: d0f6 beq.n 8001172 <manageCDC+0xd76>
break;
8001184: e000 b.n 8001188 <manageCDC+0xd8c>
break;
8001186: bf00 nop
}
}
rxidx=0;
8001188: 4b09 ldr r3, [pc, #36] @ (80011b0 <manageCDC+0xdb4>)
800118a: 2200 movs r2, #0
800118c: 701a strb r2, [r3, #0]
800118e: e007 b.n 80011a0 <manageCDC+0xda4>
}else rxidx++;
8001190: 4b07 ldr r3, [pc, #28] @ (80011b0 <manageCDC+0xdb4>)
8001192: 781b ldrb r3, [r3, #0]
8001194: 3301 adds r3, #1
8001196: b2da uxtb r2, r3
8001198: 4b05 ldr r3, [pc, #20] @ (80011b0 <manageCDC+0xdb4>)
800119a: 701a strb r2, [r3, #0]
800119c: e000 b.n 80011a0 <manageCDC+0xda4>
if (rx < 0) return;
800119e: bf00 nop
// tiny spin or yield
}
}
80011a0: 37ec adds r7, #236 @ 0xec
80011a2: 46bd mov sp, r7
80011a4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
80011a8: 0800f140 .word 0x0800f140
80011ac: 0800f154 .word 0x0800f154
80011b0: 20000234 .word 0x20000234
080011b4 <debug>:
extern UART_HandleTypeDef huart1;
extern uint8_t pulsanti;
extern uint16_t stPulsanti;
extern omCiclo_st stCiclo;
void debug(void){
80011b4: b580 push {r7, lr}
80011b6: b09a sub sp, #104 @ 0x68
80011b8: af00 add r7, sp, #0
static uint8_t mempulsanti=0;
static uint16_t memstPulsanti=0;
static omCiclo_st memstCiclo=omchiuso;
char s [100];
if(mempulsanti!=pulsanti){
80011ba: 4b2f ldr r3, [pc, #188] @ (8001278 <debug+0xc4>)
80011bc: 781a ldrb r2, [r3, #0]
80011be: 4b2f ldr r3, [pc, #188] @ (800127c <debug+0xc8>)
80011c0: 781b ldrb r3, [r3, #0]
80011c2: 429a cmp r2, r3
80011c4: d017 beq.n 80011f6 <debug+0x42>
mempulsanti=pulsanti;
80011c6: 4b2d ldr r3, [pc, #180] @ (800127c <debug+0xc8>)
80011c8: 781a ldrb r2, [r3, #0]
80011ca: 4b2b ldr r3, [pc, #172] @ (8001278 <debug+0xc4>)
80011cc: 701a strb r2, [r3, #0]
sprintf(s,"\npulsanti=%X",pulsanti);
80011ce: 4b2b ldr r3, [pc, #172] @ (800127c <debug+0xc8>)
80011d0: 781b ldrb r3, [r3, #0]
80011d2: 461a mov r2, r3
80011d4: 1d3b adds r3, r7, #4
80011d6: 492a ldr r1, [pc, #168] @ (8001280 <debug+0xcc>)
80011d8: 4618 mov r0, r3
80011da: f00d f917 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80011de: 1d3b adds r3, r7, #4
80011e0: 4618 mov r0, r3
80011e2: f7fe ffb3 bl 800014c <strlen>
80011e6: 4603 mov r3, r0
80011e8: b29a uxth r2, r3
80011ea: 1d39 adds r1, r7, #4
80011ec: f04f 33ff mov.w r3, #4294967295
80011f0: 4824 ldr r0, [pc, #144] @ (8001284 <debug+0xd0>)
80011f2: f008 fb1b bl 800982c <HAL_UART_Transmit>
}
if(memstPulsanti!=stPulsanti){
80011f6: 4b24 ldr r3, [pc, #144] @ (8001288 <debug+0xd4>)
80011f8: 881a ldrh r2, [r3, #0]
80011fa: 4b24 ldr r3, [pc, #144] @ (800128c <debug+0xd8>)
80011fc: 881b ldrh r3, [r3, #0]
80011fe: 429a cmp r2, r3
8001200: d017 beq.n 8001232 <debug+0x7e>
memstPulsanti=stPulsanti;
8001202: 4b22 ldr r3, [pc, #136] @ (800128c <debug+0xd8>)
8001204: 881a ldrh r2, [r3, #0]
8001206: 4b20 ldr r3, [pc, #128] @ (8001288 <debug+0xd4>)
8001208: 801a strh r2, [r3, #0]
sprintf(s,"\nstpulsanti=%X",stPulsanti);
800120a: 4b20 ldr r3, [pc, #128] @ (800128c <debug+0xd8>)
800120c: 881b ldrh r3, [r3, #0]
800120e: 461a mov r2, r3
8001210: 1d3b adds r3, r7, #4
8001212: 491f ldr r1, [pc, #124] @ (8001290 <debug+0xdc>)
8001214: 4618 mov r0, r3
8001216: f00d f8f9 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800121a: 1d3b adds r3, r7, #4
800121c: 4618 mov r0, r3
800121e: f7fe ff95 bl 800014c <strlen>
8001222: 4603 mov r3, r0
8001224: b29a uxth r2, r3
8001226: 1d39 adds r1, r7, #4
8001228: f04f 33ff mov.w r3, #4294967295
800122c: 4815 ldr r0, [pc, #84] @ (8001284 <debug+0xd0>)
800122e: f008 fafd bl 800982c <HAL_UART_Transmit>
}
if(memstCiclo!=stCiclo){
8001232: 4b18 ldr r3, [pc, #96] @ (8001294 <debug+0xe0>)
8001234: 781a ldrb r2, [r3, #0]
8001236: 4b18 ldr r3, [pc, #96] @ (8001298 <debug+0xe4>)
8001238: 781b ldrb r3, [r3, #0]
800123a: 429a cmp r2, r3
800123c: d017 beq.n 800126e <debug+0xba>
memstCiclo=stCiclo;
800123e: 4b16 ldr r3, [pc, #88] @ (8001298 <debug+0xe4>)
8001240: 781a ldrb r2, [r3, #0]
8001242: 4b14 ldr r3, [pc, #80] @ (8001294 <debug+0xe0>)
8001244: 701a strb r2, [r3, #0]
sprintf(s,"\nstCiclo=%d",stCiclo);
8001246: 4b14 ldr r3, [pc, #80] @ (8001298 <debug+0xe4>)
8001248: 781b ldrb r3, [r3, #0]
800124a: 461a mov r2, r3
800124c: 1d3b adds r3, r7, #4
800124e: 4913 ldr r1, [pc, #76] @ (800129c <debug+0xe8>)
8001250: 4618 mov r0, r3
8001252: f00d f8db bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001256: 1d3b adds r3, r7, #4
8001258: 4618 mov r0, r3
800125a: f7fe ff77 bl 800014c <strlen>
800125e: 4603 mov r3, r0
8001260: b29a uxth r2, r3
8001262: 1d39 adds r1, r7, #4
8001264: f04f 33ff mov.w r3, #4294967295
8001268: 4806 ldr r0, [pc, #24] @ (8001284 <debug+0xd0>)
800126a: f008 fadf bl 800982c <HAL_UART_Transmit>
}
}
800126e: bf00 nop
8001270: 3768 adds r7, #104 @ 0x68
8001272: 46bd mov sp, r7
8001274: bd80 pop {r7, pc}
8001276: bf00 nop
8001278: 2000029c .word 0x2000029c
800127c: 200003f0 .word 0x200003f0
8001280: 0800f158 .word 0x0800f158
8001284: 200003a8 .word 0x200003a8
8001288: 2000029e .word 0x2000029e
800128c: 20000454 .word 0x20000454
8001290: 0800f168 .word 0x0800f168
8001294: 200002a0 .word 0x200002a0
8001298: 20000456 .word 0x20000456
800129c: 0800f178 .word 0x0800f178
080012a0 <EEW_Write>:
{
80012a0: b580 push {r7, lr}
80012a2: b082 sub sp, #8
80012a4: af00 add r7, sp, #0
80012a6: 4603 mov r3, r0
80012a8: 460a mov r2, r1
80012aa: 71fb strb r3, [r7, #7]
80012ac: 4613 mov r3, r2
80012ae: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80012b0: 79fb ldrb r3, [r7, #7]
80012b2: b29b uxth r3, r3
80012b4: 3301 adds r3, #1
80012b6: b29b uxth r3, r3
80012b8: 88ba ldrh r2, [r7, #4]
80012ba: 4611 mov r1, r2
80012bc: 4618 mov r0, r3
80012be: f000 f9d5 bl 800166c <EE_WriteVariable>
80012c2: 4603 mov r3, r0
}
80012c4: 4618 mov r0, r3
80012c6: 3708 adds r7, #8
80012c8: 46bd mov sp, r7
80012ca: bd80 pop {r7, pc}
080012cc <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
80012cc: b480 push {r7}
80012ce: b083 sub sp, #12
80012d0: af00 add r7, sp, #0
80012d2: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
80012d4: 687b ldr r3, [r7, #4]
80012d6: 881b ldrh r3, [r3, #0]
80012d8: b29b uxth r3, r3
}
80012da: 4618 mov r0, r3
80012dc: 370c adds r7, #12
80012de: 46bd mov sp, r7
80012e0: bc80 pop {r7}
80012e2: 4770 bx lr
080012e4 <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
80012e4: b5b0 push {r4, r5, r7, lr}
80012e6: b084 sub sp, #16
80012e8: af00 add r7, sp, #0
80012ea: 6078 str r0, [r7, #4]
80012ec: 460b mov r3, r1
80012ee: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
80012f0: f004 fe72 bl 8005fd8 <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
80012f4: 887b ldrh r3, [r7, #2]
80012f6: 2200 movs r2, #0
80012f8: 461c mov r4, r3
80012fa: 4615 mov r5, r2
80012fc: 4622 mov r2, r4
80012fe: 462b mov r3, r5
8001300: 6879 ldr r1, [r7, #4]
8001302: 2001 movs r0, #1
8001304: f004 fdf8 bl 8005ef8 <HAL_FLASH_Program>
8001308: 4603 mov r3, r0
800130a: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
800130c: f004 fe8a bl 8006024 <HAL_FLASH_Lock>
return status;
8001310: 7bfb ldrb r3, [r7, #15]
}
8001312: 4618 mov r0, r3
8001314: 3710 adds r7, #16
8001316: 46bd mov sp, r7
8001318: bdb0 pop {r4, r5, r7, pc}
0800131a <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
800131a: b580 push {r7, lr}
800131c: b088 sub sp, #32
800131e: af00 add r7, sp, #0
8001320: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8001322: 2300 movs r3, #0
8001324: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
8001326: f004 fe57 bl 8005fd8 <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
800132a: 2300 movs r3, #0
800132c: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
800132e: 687b ldr r3, [r7, #4]
8001330: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8001332: 2301 movs r3, #1
8001334: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
8001336: f107 0208 add.w r2, r7, #8
800133a: f107 030c add.w r3, r7, #12
800133e: 4611 mov r1, r2
8001340: 4618 mov r0, r3
8001342: f004 ff31 bl 80061a8 <HAL_FLASHEx_Erase>
8001346: 4603 mov r3, r0
8001348: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
800134a: f004 fe6b bl 8006024 <HAL_FLASH_Lock>
return status;
800134e: 7ffb ldrb r3, [r7, #31]
}
8001350: 4618 mov r0, r3
8001352: 3720 adds r7, #32
8001354: 46bd mov sp, r7
8001356: bd80 pop {r7, pc}
08001358 <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
8001358: b480 push {r7}
800135a: b087 sub sp, #28
800135c: af00 add r7, sp, #0
800135e: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8001360: 687b ldr r3, [r7, #4]
8001362: 3302 adds r3, #2
8001364: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8001366: 687b ldr r3, [r7, #4]
8001368: f503 6380 add.w r3, r3, #1024 @ 0x400
800136c: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
800136e: e00c b.n 800138a <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8001370: 697b ldr r3, [r7, #20]
8001372: 881b ldrh r3, [r3, #0]
8001374: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
8001376: 89fb ldrh r3, [r7, #14]
8001378: f64f 72ff movw r2, #65535 @ 0xffff
800137c: 4293 cmp r3, r2
800137e: d101 bne.n 8001384 <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
8001380: 697b ldr r3, [r7, #20]
8001382: e008 b.n 8001396 <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
8001384: 697b ldr r3, [r7, #20]
8001386: 3304 adds r3, #4
8001388: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
800138a: 693b ldr r3, [r7, #16]
800138c: 3b03 subs r3, #3
800138e: 697a ldr r2, [r7, #20]
8001390: 429a cmp r2, r3
8001392: d3ed bcc.n 8001370 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
8001394: 2300 movs r3, #0
}
8001396: 4618 mov r0, r3
8001398: 371c adds r7, #28
800139a: 46bd mov sp, r7
800139c: bc80 pop {r7}
800139e: 4770 bx lr
080013a0 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
80013a0: b480 push {r7}
80013a2: b089 sub sp, #36 @ 0x24
80013a4: af00 add r7, sp, #0
80013a6: 60f8 str r0, [r7, #12]
80013a8: 460b mov r3, r1
80013aa: 607a str r2, [r7, #4]
80013ac: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
80013ae: 68fb ldr r3, [r7, #12]
80013b0: 3302 adds r3, #2
80013b2: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
80013b4: 68fb ldr r3, [r7, #12]
80013b6: f503 6380 add.w r3, r3, #1024 @ 0x400
80013ba: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
80013bc: 2302 movs r3, #2
80013be: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
80013c0: 2300 movs r3, #0
80013c2: 833b strh r3, [r7, #24]
if (Data == NULL)
80013c4: 687b ldr r3, [r7, #4]
80013c6: 2b00 cmp r3, #0
80013c8: d118 bne.n 80013fc <EE_FindInPage+0x5c>
return EE_ERROR;
80013ca: 2301 movs r3, #1
80013cc: e024 b.n 8001418 <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
80013ce: 69fb ldr r3, [r7, #28]
80013d0: 881b ldrh r3, [r3, #0]
80013d2: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
80013d4: 8a7b ldrh r3, [r7, #18]
80013d6: f64f 72ff movw r2, #65535 @ 0xffff
80013da: 4293 cmp r3, r2
80013dc: d014 beq.n 8001408 <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
80013de: 69fb ldr r3, [r7, #28]
80013e0: 3302 adds r3, #2
80013e2: 881b ldrh r3, [r3, #0]
80013e4: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
80013e6: 8a7a ldrh r2, [r7, #18]
80013e8: 897b ldrh r3, [r7, #10]
80013ea: 429a cmp r2, r3
80013ec: d103 bne.n 80013f6 <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
80013ee: 8a3b ldrh r3, [r7, #16]
80013f0: 833b strh r3, [r7, #24]
result = EE_OK;
80013f2: 2300 movs r3, #0
80013f4: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
80013f6: 69fb ldr r3, [r7, #28]
80013f8: 3304 adds r3, #4
80013fa: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
80013fc: 697b ldr r3, [r7, #20]
80013fe: 3b04 subs r3, #4
8001400: 69fa ldr r2, [r7, #28]
8001402: 429a cmp r2, r3
8001404: d9e3 bls.n 80013ce <EE_FindInPage+0x2e>
8001406: e000 b.n 800140a <EE_FindInPage+0x6a>
break;
8001408: bf00 nop
}
if (result == EE_OK)
800140a: 7efb ldrb r3, [r7, #27]
800140c: 2b00 cmp r3, #0
800140e: d102 bne.n 8001416 <EE_FindInPage+0x76>
*Data = lastVal;
8001410: 687b ldr r3, [r7, #4]
8001412: 8b3a ldrh r2, [r7, #24]
8001414: 801a strh r2, [r3, #0]
return result;
8001416: 7efb ldrb r3, [r7, #27]
}
8001418: 4618 mov r0, r3
800141a: 3724 adds r7, #36 @ 0x24
800141c: 46bd mov sp, r7
800141e: bc80 pop {r7}
8001420: 4770 bx lr
...
08001424 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8001424: b580 push {r7, lr}
8001426: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
8001428: 480f ldr r0, [pc, #60] @ (8001468 <EE_Format+0x44>)
800142a: f7ff ff76 bl 800131a <EE_FlashErasePage>
800142e: 4603 mov r3, r0
8001430: 2b00 cmp r3, #0
8001432: d001 beq.n 8001438 <EE_Format+0x14>
return EE_STATUS_ERROR;
8001434: 2301 movs r3, #1
8001436: e015 b.n 8001464 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
8001438: 480c ldr r0, [pc, #48] @ (800146c <EE_Format+0x48>)
800143a: f7ff ff6e bl 800131a <EE_FlashErasePage>
800143e: 4603 mov r3, r0
8001440: 2b00 cmp r3, #0
8001442: d001 beq.n 8001448 <EE_Format+0x24>
return EE_STATUS_ERROR;
8001444: 2301 movs r3, #1
8001446: e00d b.n 8001464 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
8001448: f64a 21aa movw r1, #43690 @ 0xaaaa
800144c: 4806 ldr r0, [pc, #24] @ (8001468 <EE_Format+0x44>)
800144e: f7ff ff49 bl 80012e4 <EE_FlashProgramHalfWord>
8001452: 4603 mov r3, r0
8001454: 2b00 cmp r3, #0
8001456: d001 beq.n 800145c <EE_Format+0x38>
return EE_STATUS_ERROR;
8001458: 2301 movs r3, #1
800145a: e003 b.n 8001464 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
800145c: 4b04 ldr r3, [pc, #16] @ (8001470 <EE_Format+0x4c>)
800145e: 4a02 ldr r2, [pc, #8] @ (8001468 <EE_Format+0x44>)
8001460: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8001462: 2300 movs r3, #0
}
8001464: 4618 mov r0, r3
8001466: bd80 pop {r7, pc}
8001468: 0800f800 .word 0x0800f800
800146c: 0800fc00 .word 0x0800fc00
8001470: 20000000 .word 0x20000000
08001474 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8001474: b480 push {r7}
8001476: b083 sub sp, #12
8001478: af00 add r7, sp, #0
800147a: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
800147c: 687b ldr r3, [r7, #4]
800147e: 4a05 ldr r2, [pc, #20] @ (8001494 <EE_GetOtherPageBase+0x20>)
8001480: 4293 cmp r3, r2
8001482: d101 bne.n 8001488 <EE_GetOtherPageBase+0x14>
8001484: 4b04 ldr r3, [pc, #16] @ (8001498 <EE_GetOtherPageBase+0x24>)
8001486: e000 b.n 800148a <EE_GetOtherPageBase+0x16>
8001488: 4b02 ldr r3, [pc, #8] @ (8001494 <EE_GetOtherPageBase+0x20>)
}
800148a: 4618 mov r0, r3
800148c: 370c adds r7, #12
800148e: 46bd mov sp, r7
8001490: bc80 pop {r7}
8001492: 4770 bx lr
8001494: 0800f800 .word 0x0800f800
8001498: 0800fc00 .word 0x0800fc00
0800149c <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
800149c: b580 push {r7, lr}
800149e: b088 sub sp, #32
80014a0: af00 add r7, sp, #0
80014a2: 4603 mov r3, r0
80014a4: 460a mov r2, r1
80014a6: 80fb strh r3, [r7, #6]
80014a8: 4613 mov r3, r2
80014aa: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
80014ac: 4b3c ldr r3, [pc, #240] @ (80015a0 <EE_PageTransfer+0x104>)
80014ae: 681b ldr r3, [r3, #0]
80014b0: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
80014b2: 6978 ldr r0, [r7, #20]
80014b4: f7ff ffde bl 8001474 <EE_GetOtherPageBase>
80014b8: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
80014ba: 6938 ldr r0, [r7, #16]
80014bc: f7ff ff2d bl 800131a <EE_FlashErasePage>
80014c0: 4603 mov r3, r0
80014c2: 2b00 cmp r3, #0
80014c4: d001 beq.n 80014ca <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
80014c6: 2301 movs r3, #1
80014c8: e065 b.n 8001596 <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
80014ca: f245 5155 movw r1, #21845 @ 0x5555
80014ce: 6938 ldr r0, [r7, #16]
80014d0: f7ff ff08 bl 80012e4 <EE_FlashProgramHalfWord>
80014d4: 4603 mov r3, r0
80014d6: 2b00 cmp r3, #0
80014d8: d001 beq.n 80014de <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
80014da: 2301 movs r3, #1
80014dc: e05b b.n 8001596 <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
80014de: 693b ldr r3, [r7, #16]
80014e0: 3302 adds r3, #2
80014e2: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
80014e4: 2300 movs r3, #0
80014e6: 837b strh r3, [r7, #26]
80014e8: e03c b.n 8001564 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
80014ea: 8b7b ldrh r3, [r7, #26]
80014ec: 4a2d ldr r2, [pc, #180] @ (80015a4 <EE_PageTransfer+0x108>)
80014ee: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80014f2: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
80014f4: 89fa ldrh r2, [r7, #14]
80014f6: 88fb ldrh r3, [r7, #6]
80014f8: 429a cmp r2, r3
80014fa: d102 bne.n 8001502 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
80014fc: 88bb ldrh r3, [r7, #4]
80014fe: 817b strh r3, [r7, #10]
8001500: e00b b.n 800151a <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8001502: f107 020a add.w r2, r7, #10
8001506: 89fb ldrh r3, [r7, #14]
8001508: 4619 mov r1, r3
800150a: 6978 ldr r0, [r7, #20]
800150c: f7ff ff48 bl 80013a0 <EE_FindInPage>
8001510: 4603 mov r3, r0
8001512: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8001514: 7b7b ldrb r3, [r7, #13]
8001516: 2b00 cmp r3, #0
8001518: d120 bne.n 800155c <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
800151a: 89fb ldrh r3, [r7, #14]
800151c: 4619 mov r1, r3
800151e: 69f8 ldr r0, [r7, #28]
8001520: f7ff fee0 bl 80012e4 <EE_FlashProgramHalfWord>
8001524: 4603 mov r3, r0
8001526: 2b00 cmp r3, #0
8001528: d001 beq.n 800152e <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
800152a: 2301 movs r3, #1
800152c: e033 b.n 8001596 <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
800152e: 69fb ldr r3, [r7, #28]
8001530: 3302 adds r3, #2
8001532: 897a ldrh r2, [r7, #10]
8001534: 4611 mov r1, r2
8001536: 4618 mov r0, r3
8001538: f7ff fed4 bl 80012e4 <EE_FlashProgramHalfWord>
800153c: 4603 mov r3, r0
800153e: 2b00 cmp r3, #0
8001540: d001 beq.n 8001546 <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8001542: 2301 movs r3, #1
8001544: e027 b.n 8001596 <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
8001546: 69fb ldr r3, [r7, #28]
8001548: 3304 adds r3, #4
800154a: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
800154c: 693b ldr r3, [r7, #16]
800154e: f503 6380 add.w r3, r3, #1024 @ 0x400
8001552: 69fa ldr r2, [r7, #28]
8001554: 429a cmp r2, r3
8001556: d302 bcc.n 800155e <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
8001558: 2303 movs r3, #3
800155a: e01c b.n 8001596 <EE_PageTransfer+0xfa>
continue;
800155c: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
800155e: 8b7b ldrh r3, [r7, #26]
8001560: 3301 adds r3, #1
8001562: 837b strh r3, [r7, #26]
8001564: 8b7b ldrh r3, [r7, #26]
8001566: 2b3f cmp r3, #63 @ 0x3f
8001568: d9bf bls.n 80014ea <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
800156a: 6978 ldr r0, [r7, #20]
800156c: f7ff fed5 bl 800131a <EE_FlashErasePage>
8001570: 4603 mov r3, r0
8001572: 2b00 cmp r3, #0
8001574: d001 beq.n 800157a <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
8001576: 2301 movs r3, #1
8001578: e00d b.n 8001596 <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
800157a: f64a 21aa movw r1, #43690 @ 0xaaaa
800157e: 6938 ldr r0, [r7, #16]
8001580: f7ff feb0 bl 80012e4 <EE_FlashProgramHalfWord>
8001584: 4603 mov r3, r0
8001586: 2b00 cmp r3, #0
8001588: d001 beq.n 800158e <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
800158a: 2301 movs r3, #1
800158c: e003 b.n 8001596 <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
800158e: 4a04 ldr r2, [pc, #16] @ (80015a0 <EE_PageTransfer+0x104>)
8001590: 693b ldr r3, [r7, #16]
8001592: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
8001594: 2300 movs r3, #0
}
8001596: 4618 mov r0, r3
8001598: 3720 adds r7, #32
800159a: 46bd mov sp, r7
800159c: bd80 pop {r7, pc}
800159e: bf00 nop
80015a0: 20000000 .word 0x20000000
80015a4: 0800f490 .word 0x0800f490
080015a8 <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
80015a8: b580 push {r7, lr}
80015aa: b082 sub sp, #8
80015ac: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
80015ae: 481e ldr r0, [pc, #120] @ (8001628 <EE_Init+0x80>)
80015b0: f7ff fe8c bl 80012cc <EE_GetPageStatus>
80015b4: 4603 mov r3, r0
80015b6: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
80015b8: 481c ldr r0, [pc, #112] @ (800162c <EE_Init+0x84>)
80015ba: f7ff fe87 bl 80012cc <EE_GetPageStatus>
80015be: 4603 mov r3, r0
80015c0: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
80015c2: 88fb ldrh r3, [r7, #6]
80015c4: f64f 72ff movw r2, #65535 @ 0xffff
80015c8: 4293 cmp r3, r2
80015ca: d108 bne.n 80015de <EE_Init+0x36>
80015cc: 88bb ldrh r3, [r7, #4]
80015ce: f64f 72ff movw r2, #65535 @ 0xffff
80015d2: 4293 cmp r3, r2
80015d4: d103 bne.n 80015de <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
80015d6: f7ff ff25 bl 8001424 <EE_Format>
80015da: 4603 mov r3, r0
80015dc: e020 b.n 8001620 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
80015de: 88fb ldrh r3, [r7, #6]
80015e0: f64a 22aa movw r2, #43690 @ 0xaaaa
80015e4: 4293 cmp r3, r2
80015e6: d109 bne.n 80015fc <EE_Init+0x54>
80015e8: 88bb ldrh r3, [r7, #4]
80015ea: f64f 72ff movw r2, #65535 @ 0xffff
80015ee: 4293 cmp r3, r2
80015f0: d104 bne.n 80015fc <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
80015f2: 4b0f ldr r3, [pc, #60] @ (8001630 <EE_Init+0x88>)
80015f4: 4a0c ldr r2, [pc, #48] @ (8001628 <EE_Init+0x80>)
80015f6: 601a str r2, [r3, #0]
return EE_OK;
80015f8: 2300 movs r3, #0
80015fa: e011 b.n 8001620 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
80015fc: 88bb ldrh r3, [r7, #4]
80015fe: f64a 22aa movw r2, #43690 @ 0xaaaa
8001602: 4293 cmp r3, r2
8001604: d109 bne.n 800161a <EE_Init+0x72>
8001606: 88fb ldrh r3, [r7, #6]
8001608: f64f 72ff movw r2, #65535 @ 0xffff
800160c: 4293 cmp r3, r2
800160e: d104 bne.n 800161a <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8001610: 4b07 ldr r3, [pc, #28] @ (8001630 <EE_Init+0x88>)
8001612: 4a06 ldr r2, [pc, #24] @ (800162c <EE_Init+0x84>)
8001614: 601a str r2, [r3, #0]
return EE_OK;
8001616: 2300 movs r3, #0
8001618: e002 b.n 8001620 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
800161a: f7ff ff03 bl 8001424 <EE_Format>
800161e: 4603 mov r3, r0
}
}
8001620: 4618 mov r0, r3
8001622: 3708 adds r7, #8
8001624: 46bd mov sp, r7
8001626: bd80 pop {r7, pc}
8001628: 0800f800 .word 0x0800f800
800162c: 0800fc00 .word 0x0800fc00
8001630: 20000000 .word 0x20000000
08001634 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8001634: b580 push {r7, lr}
8001636: b084 sub sp, #16
8001638: af00 add r7, sp, #0
800163a: 4603 mov r3, r0
800163c: 6039 str r1, [r7, #0]
800163e: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8001640: 683b ldr r3, [r7, #0]
8001642: 2b00 cmp r3, #0
8001644: d101 bne.n 800164a <EE_ReadVariable+0x16>
return EE_ERROR;
8001646: 2301 movs r3, #1
8001648: e00a b.n 8001660 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
800164a: 4b07 ldr r3, [pc, #28] @ (8001668 <EE_ReadVariable+0x34>)
800164c: 681b ldr r3, [r3, #0]
800164e: 88f9 ldrh r1, [r7, #6]
8001650: 683a ldr r2, [r7, #0]
8001652: 4618 mov r0, r3
8001654: f7ff fea4 bl 80013a0 <EE_FindInPage>
8001658: 4603 mov r3, r0
800165a: 73fb strb r3, [r7, #15]
return (uint16_t)st;
800165c: 7bfb ldrb r3, [r7, #15]
800165e: b29b uxth r3, r3
}
8001660: 4618 mov r0, r3
8001662: 3710 adds r7, #16
8001664: 46bd mov sp, r7
8001666: bd80 pop {r7, pc}
8001668: 20000000 .word 0x20000000
0800166c <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
800166c: b580 push {r7, lr}
800166e: b084 sub sp, #16
8001670: af00 add r7, sp, #0
8001672: 4603 mov r3, r0
8001674: 460a mov r2, r1
8001676: 80fb strh r3, [r7, #6]
8001678: 4613 mov r3, r2
800167a: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
800167c: 4b17 ldr r3, [pc, #92] @ (80016dc <EE_WriteVariable+0x70>)
800167e: 681b ldr r3, [r3, #0]
8001680: 4618 mov r0, r3
8001682: f7ff fe69 bl 8001358 <EE_FindFreeAddress>
8001686: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
8001688: 68fb ldr r3, [r7, #12]
800168a: 2b00 cmp r3, #0
800168c: d017 beq.n 80016be <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
800168e: 88fb ldrh r3, [r7, #6]
8001690: 4619 mov r1, r3
8001692: 68f8 ldr r0, [r7, #12]
8001694: f7ff fe26 bl 80012e4 <EE_FlashProgramHalfWord>
8001698: 4603 mov r3, r0
800169a: 2b00 cmp r3, #0
800169c: d001 beq.n 80016a2 <EE_WriteVariable+0x36>
return EE_ERROR;
800169e: 2301 movs r3, #1
80016a0: e017 b.n 80016d2 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
80016a2: 68fb ldr r3, [r7, #12]
80016a4: 3302 adds r3, #2
80016a6: 88ba ldrh r2, [r7, #4]
80016a8: 4611 mov r1, r2
80016aa: 4618 mov r0, r3
80016ac: f7ff fe1a bl 80012e4 <EE_FlashProgramHalfWord>
80016b0: 4603 mov r3, r0
80016b2: 2b00 cmp r3, #0
80016b4: d001 beq.n 80016ba <EE_WriteVariable+0x4e>
return EE_ERROR;
80016b6: 2301 movs r3, #1
80016b8: e00b b.n 80016d2 <EE_WriteVariable+0x66>
return EE_OK;
80016ba: 2300 movs r3, #0
80016bc: e009 b.n 80016d2 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
80016be: 88ba ldrh r2, [r7, #4]
80016c0: 88fb ldrh r3, [r7, #6]
80016c2: 4611 mov r1, r2
80016c4: 4618 mov r0, r3
80016c6: f7ff fee9 bl 800149c <EE_PageTransfer>
80016ca: 4603 mov r3, r0
80016cc: 72fb strb r3, [r7, #11]
return (uint16_t)st;
80016ce: 7afb ldrb r3, [r7, #11]
80016d0: b29b uxth r3, r3
}
80016d2: 4618 mov r0, r3
80016d4: 3710 adds r7, #16
80016d6: 46bd mov sp, r7
80016d8: bd80 pop {r7, pc}
80016da: bf00 nop
80016dc: 20000000 .word 0x20000000
080016e0 <loadDefault>:
void loadDefault(void){
80016e0: b580 push {r7, lr}
80016e2: b09a sub sp, #104 @ 0x68
80016e4: af00 add r7, sp, #0
uint8_t i;
char s[100];
uint16_t st;
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
80016e6: 2300 movs r3, #0
80016e8: f887 3067 strb.w r3, [r7, #103] @ 0x67
80016ec: e035 b.n 800175a <loadDefault+0x7a>
st=EEW_Write(i,deftab[i]);
80016ee: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
80016f2: 4a1e ldr r2, [pc, #120] @ (800176c <loadDefault+0x8c>)
80016f4: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
80016f8: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
80016fc: 4611 mov r1, r2
80016fe: 4618 mov r0, r3
8001700: f7ff fdce bl 80012a0 <EEW_Write>
8001704: 4603 mov r3, r0
8001706: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
if (st == EE_OK)sprintf((char*)s,"\ndone %d=%d",i,deftab[i]);
800170a: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
800170e: 2b00 cmp r3, #0
8001710: d10b bne.n 800172a <loadDefault+0x4a>
8001712: f897 2067 ldrb.w r2, [r7, #103] @ 0x67
8001716: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
800171a: 4914 ldr r1, [pc, #80] @ (800176c <loadDefault+0x8c>)
800171c: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8001720: 4638 mov r0, r7
8001722: 4913 ldr r1, [pc, #76] @ (8001770 <loadDefault+0x90>)
8001724: f00c fe72 bl 800e40c <siprintf>
8001728: e006 b.n 8001738 <loadDefault+0x58>
else sprintf((char*)s,"\nee write error %d", st);
800172a: f8b7 2064 ldrh.w r2, [r7, #100] @ 0x64
800172e: 463b mov r3, r7
8001730: 4910 ldr r1, [pc, #64] @ (8001774 <loadDefault+0x94>)
8001732: 4618 mov r0, r3
8001734: f00c fe6a bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001738: 463b mov r3, r7
800173a: 4618 mov r0, r3
800173c: f7fe fd06 bl 800014c <strlen>
8001740: 4603 mov r3, r0
8001742: b29a uxth r2, r3
8001744: 4639 mov r1, r7
8001746: f04f 33ff mov.w r3, #4294967295
800174a: 480b ldr r0, [pc, #44] @ (8001778 <loadDefault+0x98>)
800174c: f008 f86e bl 800982c <HAL_UART_Transmit>
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
8001750: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001754: 3301 adds r3, #1
8001756: f887 3067 strb.w r3, [r7, #103] @ 0x67
800175a: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
800175e: 2b3f cmp r3, #63 @ 0x3f
8001760: d9c5 bls.n 80016ee <loadDefault+0xe>
}
}
8001762: bf00 nop
8001764: bf00 nop
8001766: 3768 adds r7, #104 @ 0x68
8001768: 46bd mov sp, r7
800176a: bd80 pop {r7, pc}
800176c: 0800f410 .word 0x0800f410
8001770: 0800f184 .word 0x0800f184
8001774: 0800f190 .word 0x0800f190
8001778: 200003a8 .word 0x200003a8
0800177c <loadEE>:
void loadEE(void){
800177c: b5f0 push {r4, r5, r6, r7, lr}
800177e: b0b9 sub sp, #228 @ 0xe4
8001780: af06 add r7, sp, #24
char s [200];
m1pwmap=deftab[M1PWMAP];
8001782: 2228 movs r2, #40 @ 0x28
8001784: 4ba9 ldr r3, [pc, #676] @ (8001a2c <loadEE+0x2b0>)
8001786: 801a strh r2, [r3, #0]
m1pwmch=deftab[M1PWMCH];
8001788: 223c movs r2, #60 @ 0x3c
800178a: 4ba9 ldr r3, [pc, #676] @ (8001a30 <loadEE+0x2b4>)
800178c: 801a strh r2, [r3, #0]
m2pwmap=deftab[M2PWMAP];
800178e: 2246 movs r2, #70 @ 0x46
8001790: 4ba8 ldr r3, [pc, #672] @ (8001a34 <loadEE+0x2b8>)
8001792: 801a strh r2, [r3, #0]
m2pwmch=deftab[M2PWMCH];
8001794: 2246 movs r2, #70 @ 0x46
8001796: 4ba8 ldr r3, [pc, #672] @ (8001a38 <loadEE+0x2bc>)
8001798: 801a strh r2, [r3, #0]
m3pwmap=deftab[M3PWMAP];
800179a: 2223 movs r2, #35 @ 0x23
800179c: 4ba7 ldr r3, [pc, #668] @ (8001a3c <loadEE+0x2c0>)
800179e: 801a strh r2, [r3, #0]
m3pwmch=deftab[M3PWMCH];
80017a0: 2228 movs r2, #40 @ 0x28
80017a2: 4ba7 ldr r3, [pc, #668] @ (8001a40 <loadEE+0x2c4>)
80017a4: 801a strh r2, [r3, #0]
m4pwmap=deftab[M4PWMAP];
80017a6: 2228 movs r2, #40 @ 0x28
80017a8: 4ba6 ldr r3, [pc, #664] @ (8001a44 <loadEE+0x2c8>)
80017aa: 801a strh r2, [r3, #0]
m4pwmch=deftab[M4PWMCH];
80017ac: 2228 movs r2, #40 @ 0x28
80017ae: 4ba6 ldr r3, [pc, #664] @ (8001a48 <loadEE+0x2cc>)
80017b0: 801a strh r2, [r3, #0]
mrampstart[M1-1]=deftab[M1RAMPSTART];
80017b2: 2214 movs r2, #20
80017b4: 4ba5 ldr r3, [pc, #660] @ (8001a4c <loadEE+0x2d0>)
80017b6: 801a strh r2, [r3, #0]
mrampstart[M2-1]=deftab[M2RAMPSTART];
80017b8: 2214 movs r2, #20
80017ba: 4ba4 ldr r3, [pc, #656] @ (8001a4c <loadEE+0x2d0>)
80017bc: 805a strh r2, [r3, #2]
mrampstart[M3-1]=deftab[M3RAMPSTART];
80017be: 2214 movs r2, #20
80017c0: 4ba2 ldr r3, [pc, #648] @ (8001a4c <loadEE+0x2d0>)
80017c2: 809a strh r2, [r3, #4]
mrampstart[M4-1]=deftab[M4RAMPSTART];
80017c4: 2214 movs r2, #20
80017c6: 4ba1 ldr r3, [pc, #644] @ (8001a4c <loadEE+0x2d0>)
80017c8: 80da strh r2, [r3, #6]
m1TimeoutMan=deftab[M1TIMEOUTMAN];
80017ca: 22e6 movs r2, #230 @ 0xe6
80017cc: 4ba0 ldr r3, [pc, #640] @ (8001a50 <loadEE+0x2d4>)
80017ce: 801a strh r2, [r3, #0]
m2TimeoutMan=deftab[M2TIMEOUTMAN];
80017d0: 2264 movs r2, #100 @ 0x64
80017d2: 4ba0 ldr r3, [pc, #640] @ (8001a54 <loadEE+0x2d8>)
80017d4: 801a strh r2, [r3, #0]
m3TimeoutMan=deftab[M3TIMEOUTMAN];
80017d6: 2282 movs r2, #130 @ 0x82
80017d8: 4b9f ldr r3, [pc, #636] @ (8001a58 <loadEE+0x2dc>)
80017da: 801a strh r2, [r3, #0]
m4TimeoutMan=deftab[M4TIMEOUTMAN];
80017dc: f44f 7296 mov.w r2, #300 @ 0x12c
80017e0: 4b9e ldr r3, [pc, #632] @ (8001a5c <loadEE+0x2e0>)
80017e2: 801a strh r2, [r3, #0]
thanem=deftab[THANEM];
80017e4: f44f 727a mov.w r2, #1000 @ 0x3e8
80017e8: 4b9d ldr r3, [pc, #628] @ (8001a60 <loadEE+0x2e4>)
80017ea: 801a strh r2, [r3, #0]
tanem=deftab[TANEM];
80017ec: 220a movs r2, #10
80017ee: 4b9d ldr r3, [pc, #628] @ (8001a64 <loadEE+0x2e8>)
80017f0: 801a strh r2, [r3, #0]
m1pwmMan=deftab[M1PWMMAN];
80017f2: 223c movs r2, #60 @ 0x3c
80017f4: 4b9c ldr r3, [pc, #624] @ (8001a68 <loadEE+0x2ec>)
80017f6: 801a strh r2, [r3, #0]
m2pwmMan=deftab[M2PWMMAN];
80017f8: 2246 movs r2, #70 @ 0x46
80017fa: 4b9c ldr r3, [pc, #624] @ (8001a6c <loadEE+0x2f0>)
80017fc: 801a strh r2, [r3, #0]
m3pwmMan=deftab[M3PWMMAN];
80017fe: 2228 movs r2, #40 @ 0x28
8001800: 4b9b ldr r3, [pc, #620] @ (8001a70 <loadEE+0x2f4>)
8001802: 801a strh r2, [r3, #0]
m4pwmMan=deftab[M4PWMMAN];
8001804: 2228 movs r2, #40 @ 0x28
8001806: 4b9b ldr r3, [pc, #620] @ (8001a74 <loadEE+0x2f8>)
8001808: 801a strh r2, [r3, #0]
trampman=deftab[TRAMPMAN];
800180a: 2232 movs r2, #50 @ 0x32
800180c: 4b9a ldr r3, [pc, #616] @ (8001a78 <loadEE+0x2fc>)
800180e: 801a strh r2, [r3, #0]
tramp=deftab[TRAMP];
8001810: 220a movs r2, #10
8001812: 4b9a ldr r3, [pc, #616] @ (8001a7c <loadEE+0x300>)
8001814: 801a strh r2, [r3, #0]
apM1start=deftab[APM1START];
8001816: f44f 729b mov.w r2, #310 @ 0x136
800181a: 4b99 ldr r3, [pc, #612] @ (8001a80 <loadEE+0x304>)
800181c: 801a strh r2, [r3, #0]
apM1stop=deftab[APM1STOP];
800181e: f44f 72e1 mov.w r2, #450 @ 0x1c2
8001822: 4b98 ldr r3, [pc, #608] @ (8001a84 <loadEE+0x308>)
8001824: 801a strh r2, [r3, #0]
apM2start=deftab[APM2START];
8001826: 221e movs r2, #30
8001828: 4b97 ldr r3, [pc, #604] @ (8001a88 <loadEE+0x30c>)
800182a: 801a strh r2, [r3, #0]
apM2stop=deftab[APM2STOP];
800182c: f44f 729b mov.w r2, #310 @ 0x136
8001830: 4b96 ldr r3, [pc, #600] @ (8001a8c <loadEE+0x310>)
8001832: 801a strh r2, [r3, #0]
apM3start=deftab[APM3START];
8001834: f44f 72aa mov.w r2, #340 @ 0x154
8001838: 4b95 ldr r3, [pc, #596] @ (8001a90 <loadEE+0x314>)
800183a: 801a strh r2, [r3, #0]
apM3stop=deftab[APM3STOP];
800183c: f44f 72d7 mov.w r2, #430 @ 0x1ae
8001840: 4b94 ldr r3, [pc, #592] @ (8001a94 <loadEE+0x318>)
8001842: 801a strh r2, [r3, #0]
apM4start=deftab[APM4START];
8001844: 221e movs r2, #30
8001846: 4b94 ldr r3, [pc, #592] @ (8001a98 <loadEE+0x31c>)
8001848: 801a strh r2, [r3, #0]
apM4stop=deftab[APM4STOP];
800184a: f44f 72d7 mov.w r2, #430 @ 0x1ae
800184e: 4b93 ldr r3, [pc, #588] @ (8001a9c <loadEE+0x320>)
8001850: 801a strh r2, [r3, #0]
chM1start=deftab[CHM1START];
8001852: 220a movs r2, #10
8001854: 4b92 ldr r3, [pc, #584] @ (8001aa0 <loadEE+0x324>)
8001856: 801a strh r2, [r3, #0]
chM1stop=deftab[CHM1STOP];
8001858: f44f 72a0 mov.w r2, #320 @ 0x140
800185c: 4b91 ldr r3, [pc, #580] @ (8001aa4 <loadEE+0x328>)
800185e: 801a strh r2, [r3, #0]
chM2start=deftab[CHM2START];
8001860: 228c movs r2, #140 @ 0x8c
8001862: 4b91 ldr r3, [pc, #580] @ (8001aa8 <loadEE+0x32c>)
8001864: 801a strh r2, [r3, #0]
chM2stop=deftab[CHM2START];
8001866: 228c movs r2, #140 @ 0x8c
8001868: 4b90 ldr r3, [pc, #576] @ (8001aac <loadEE+0x330>)
800186a: 801a strh r2, [r3, #0]
chM3start=deftab[CHM3START];
800186c: 2214 movs r2, #20
800186e: 4b90 ldr r3, [pc, #576] @ (8001ab0 <loadEE+0x334>)
8001870: 801a strh r2, [r3, #0]
chM3stop=deftab[CHM3STOP];
8001872: f44f 728c mov.w r2, #280 @ 0x118
8001876: 4b8f ldr r3, [pc, #572] @ (8001ab4 <loadEE+0x338>)
8001878: 801a strh r2, [r3, #0]
chM4start=deftab[CHM4START];
800187a: 2228 movs r2, #40 @ 0x28
800187c: 4b8e ldr r3, [pc, #568] @ (8001ab8 <loadEE+0x33c>)
800187e: 801a strh r2, [r3, #0]
chM4stop=deftab[CHM4STOP];
8001880: f44f 72dc mov.w r2, #440 @ 0x1b8
8001884: 4b8d ldr r3, [pc, #564] @ (8001abc <loadEE+0x340>)
8001886: 801a strh r2, [r3, #0]
flagPar=deftab[FLAGPAR];
8001888: 2207 movs r2, #7
800188a: 4b8d ldr r3, [pc, #564] @ (8001ac0 <loadEE+0x344>)
800188c: 801a strh r2, [r3, #0]
// EEW_Read(CHM4START,&chM4start);
// EEW_Read(CHM4STOP ,&chM4stop);
//
// EEW_Read(FLAGPAR ,&flagPar);
sprintf((char*)s,"LoadEE\n");
800188e: 463b mov r3, r7
8001890: 498c ldr r1, [pc, #560] @ (8001ac4 <loadEE+0x348>)
8001892: 4618 mov r0, r3
8001894: f00c fdba bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001898: 463b mov r3, r7
800189a: 4618 mov r0, r3
800189c: f7fe fc56 bl 800014c <strlen>
80018a0: 4603 mov r3, r0
80018a2: b29a uxth r2, r3
80018a4: 4639 mov r1, r7
80018a6: f04f 33ff mov.w r3, #4294967295
80018aa: 4887 ldr r0, [pc, #540] @ (8001ac8 <loadEE+0x34c>)
80018ac: f007 ffbe bl 800982c <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
80018b0: 4b5e ldr r3, [pc, #376] @ (8001a2c <loadEE+0x2b0>)
80018b2: 881b ldrh r3, [r3, #0]
80018b4: 469c mov ip, r3
80018b6: 4b5e ldr r3, [pc, #376] @ (8001a30 <loadEE+0x2b4>)
80018b8: 881b ldrh r3, [r3, #0]
80018ba: 469e mov lr, r3
80018bc: 4b5d ldr r3, [pc, #372] @ (8001a34 <loadEE+0x2b8>)
80018be: 881b ldrh r3, [r3, #0]
80018c0: 461a mov r2, r3
80018c2: 4b5d ldr r3, [pc, #372] @ (8001a38 <loadEE+0x2bc>)
80018c4: 881b ldrh r3, [r3, #0]
80018c6: 4619 mov r1, r3
80018c8: 4b5c ldr r3, [pc, #368] @ (8001a3c <loadEE+0x2c0>)
80018ca: 881b ldrh r3, [r3, #0]
80018cc: 461c mov r4, r3
80018ce: 4b5c ldr r3, [pc, #368] @ (8001a40 <loadEE+0x2c4>)
80018d0: 881b ldrh r3, [r3, #0]
80018d2: 461d mov r5, r3
80018d4: 4b5b ldr r3, [pc, #364] @ (8001a44 <loadEE+0x2c8>)
80018d6: 881b ldrh r3, [r3, #0]
80018d8: 461e mov r6, r3
80018da: 4b5b ldr r3, [pc, #364] @ (8001a48 <loadEE+0x2cc>)
80018dc: 881b ldrh r3, [r3, #0]
80018de: 4638 mov r0, r7
80018e0: 9305 str r3, [sp, #20]
80018e2: 9604 str r6, [sp, #16]
80018e4: 9503 str r5, [sp, #12]
80018e6: 9402 str r4, [sp, #8]
80018e8: 9101 str r1, [sp, #4]
80018ea: 9200 str r2, [sp, #0]
80018ec: 4673 mov r3, lr
80018ee: 4662 mov r2, ip
80018f0: 4976 ldr r1, [pc, #472] @ (8001acc <loadEE+0x350>)
80018f2: f00c fd8b bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80018f6: 463b mov r3, r7
80018f8: 4618 mov r0, r3
80018fa: f7fe fc27 bl 800014c <strlen>
80018fe: 4603 mov r3, r0
8001900: b29a uxth r2, r3
8001902: 4639 mov r1, r7
8001904: f04f 33ff mov.w r3, #4294967295
8001908: 486f ldr r0, [pc, #444] @ (8001ac8 <loadEE+0x34c>)
800190a: f007 ff8f bl 800982c <HAL_UART_Transmit>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
800190e: 4b50 ldr r3, [pc, #320] @ (8001a50 <loadEE+0x2d4>)
8001910: 881b ldrh r3, [r3, #0]
8001912: 4619 mov r1, r3
8001914: 4b4f ldr r3, [pc, #316] @ (8001a54 <loadEE+0x2d8>)
8001916: 881b ldrh r3, [r3, #0]
8001918: 461c mov r4, r3
800191a: 4b4f ldr r3, [pc, #316] @ (8001a58 <loadEE+0x2dc>)
800191c: 881b ldrh r3, [r3, #0]
800191e: 461a mov r2, r3
8001920: 4b4e ldr r3, [pc, #312] @ (8001a5c <loadEE+0x2e0>)
8001922: 881b ldrh r3, [r3, #0]
8001924: 4638 mov r0, r7
8001926: 9301 str r3, [sp, #4]
8001928: 9200 str r2, [sp, #0]
800192a: 4623 mov r3, r4
800192c: 460a mov r2, r1
800192e: 4968 ldr r1, [pc, #416] @ (8001ad0 <loadEE+0x354>)
8001930: f00c fd6c bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001934: 463b mov r3, r7
8001936: 4618 mov r0, r3
8001938: f7fe fc08 bl 800014c <strlen>
800193c: 4603 mov r3, r0
800193e: b29a uxth r2, r3
8001940: 4639 mov r1, r7
8001942: f04f 33ff mov.w r3, #4294967295
8001946: 4860 ldr r0, [pc, #384] @ (8001ac8 <loadEE+0x34c>)
8001948: f007 ff70 bl 800982c <HAL_UART_Transmit>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
800194c: 4b4b ldr r3, [pc, #300] @ (8001a7c <loadEE+0x300>)
800194e: 881b ldrh r3, [r3, #0]
8001950: 461a mov r2, r3
8001952: 4b49 ldr r3, [pc, #292] @ (8001a78 <loadEE+0x2fc>)
8001954: 881b ldrh r3, [r3, #0]
8001956: 4638 mov r0, r7
8001958: 495e ldr r1, [pc, #376] @ (8001ad4 <loadEE+0x358>)
800195a: f00c fd57 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800195e: 463b mov r3, r7
8001960: 4618 mov r0, r3
8001962: f7fe fbf3 bl 800014c <strlen>
8001966: 4603 mov r3, r0
8001968: b29a uxth r2, r3
800196a: 4639 mov r1, r7
800196c: f04f 33ff mov.w r3, #4294967295
8001970: 4855 ldr r0, [pc, #340] @ (8001ac8 <loadEE+0x34c>)
8001972: f007 ff5b bl 800982c <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
8001976: 4b3c ldr r3, [pc, #240] @ (8001a68 <loadEE+0x2ec>)
8001978: 881b ldrh r3, [r3, #0]
800197a: 4619 mov r1, r3
800197c: 4b3b ldr r3, [pc, #236] @ (8001a6c <loadEE+0x2f0>)
800197e: 881b ldrh r3, [r3, #0]
8001980: 461c mov r4, r3
8001982: 4b3b ldr r3, [pc, #236] @ (8001a70 <loadEE+0x2f4>)
8001984: 881b ldrh r3, [r3, #0]
8001986: 461a mov r2, r3
8001988: 4b3a ldr r3, [pc, #232] @ (8001a74 <loadEE+0x2f8>)
800198a: 881b ldrh r3, [r3, #0]
800198c: 4638 mov r0, r7
800198e: 9301 str r3, [sp, #4]
8001990: 9200 str r2, [sp, #0]
8001992: 4623 mov r3, r4
8001994: 460a mov r2, r1
8001996: 4950 ldr r1, [pc, #320] @ (8001ad8 <loadEE+0x35c>)
8001998: f00c fd38 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800199c: 463b mov r3, r7
800199e: 4618 mov r0, r3
80019a0: f7fe fbd4 bl 800014c <strlen>
80019a4: 4603 mov r3, r0
80019a6: b29a uxth r2, r3
80019a8: 4639 mov r1, r7
80019aa: f04f 33ff mov.w r3, #4294967295
80019ae: 4846 ldr r0, [pc, #280] @ (8001ac8 <loadEE+0x34c>)
80019b0: f007 ff3c bl 800982c <HAL_UART_Transmit>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
80019b4: 4b32 ldr r3, [pc, #200] @ (8001a80 <loadEE+0x304>)
80019b6: 881b ldrh r3, [r3, #0]
80019b8: 4619 mov r1, r3
80019ba: 4b32 ldr r3, [pc, #200] @ (8001a84 <loadEE+0x308>)
80019bc: 881b ldrh r3, [r3, #0]
80019be: 461c mov r4, r3
80019c0: 4b37 ldr r3, [pc, #220] @ (8001aa0 <loadEE+0x324>)
80019c2: 881b ldrh r3, [r3, #0]
80019c4: 461a mov r2, r3
80019c6: 4b37 ldr r3, [pc, #220] @ (8001aa4 <loadEE+0x328>)
80019c8: 881b ldrh r3, [r3, #0]
80019ca: 4638 mov r0, r7
80019cc: 9301 str r3, [sp, #4]
80019ce: 9200 str r2, [sp, #0]
80019d0: 4623 mov r3, r4
80019d2: 460a mov r2, r1
80019d4: 4941 ldr r1, [pc, #260] @ (8001adc <loadEE+0x360>)
80019d6: f00c fd19 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80019da: 463b mov r3, r7
80019dc: 4618 mov r0, r3
80019de: f7fe fbb5 bl 800014c <strlen>
80019e2: 4603 mov r3, r0
80019e4: b29a uxth r2, r3
80019e6: 4639 mov r1, r7
80019e8: f04f 33ff mov.w r3, #4294967295
80019ec: 4836 ldr r0, [pc, #216] @ (8001ac8 <loadEE+0x34c>)
80019ee: f007 ff1d bl 800982c <HAL_UART_Transmit>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
80019f2: 4b25 ldr r3, [pc, #148] @ (8001a88 <loadEE+0x30c>)
80019f4: 881b ldrh r3, [r3, #0]
80019f6: 4619 mov r1, r3
80019f8: 4b24 ldr r3, [pc, #144] @ (8001a8c <loadEE+0x310>)
80019fa: 881b ldrh r3, [r3, #0]
80019fc: 461c mov r4, r3
80019fe: 4b2a ldr r3, [pc, #168] @ (8001aa8 <loadEE+0x32c>)
8001a00: 881b ldrh r3, [r3, #0]
8001a02: 461a mov r2, r3
8001a04: 4b29 ldr r3, [pc, #164] @ (8001aac <loadEE+0x330>)
8001a06: 881b ldrh r3, [r3, #0]
8001a08: 4638 mov r0, r7
8001a0a: 9301 str r3, [sp, #4]
8001a0c: 9200 str r2, [sp, #0]
8001a0e: 4623 mov r3, r4
8001a10: 460a mov r2, r1
8001a12: 4933 ldr r1, [pc, #204] @ (8001ae0 <loadEE+0x364>)
8001a14: f00c fcfa bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001a18: 463b mov r3, r7
8001a1a: 4618 mov r0, r3
8001a1c: f7fe fb96 bl 800014c <strlen>
8001a20: 4603 mov r3, r0
8001a22: b29a uxth r2, r3
8001a24: 4639 mov r1, r7
8001a26: f04f 33ff mov.w r3, #4294967295
8001a2a: e05b b.n 8001ae4 <loadEE+0x368>
8001a2c: 20000400 .word 0x20000400
8001a30: 20000402 .word 0x20000402
8001a34: 20000404 .word 0x20000404
8001a38: 20000406 .word 0x20000406
8001a3c: 20000408 .word 0x20000408
8001a40: 2000040a .word 0x2000040a
8001a44: 2000040c .word 0x2000040c
8001a48: 2000040e .word 0x2000040e
8001a4c: 2000044c .word 0x2000044c
8001a50: 20000410 .word 0x20000410
8001a54: 20000412 .word 0x20000412
8001a58: 20000414 .word 0x20000414
8001a5c: 20000416 .word 0x20000416
8001a60: 2000041c .word 0x2000041c
8001a64: 2000041a .word 0x2000041a
8001a68: 20000420 .word 0x20000420
8001a6c: 20000422 .word 0x20000422
8001a70: 20000424 .word 0x20000424
8001a74: 20000426 .word 0x20000426
8001a78: 2000041e .word 0x2000041e
8001a7c: 20000418 .word 0x20000418
8001a80: 20000428 .word 0x20000428
8001a84: 2000042a .word 0x2000042a
8001a88: 2000042c .word 0x2000042c
8001a8c: 2000042e .word 0x2000042e
8001a90: 20000430 .word 0x20000430
8001a94: 20000432 .word 0x20000432
8001a98: 20000434 .word 0x20000434
8001a9c: 20000436 .word 0x20000436
8001aa0: 20000438 .word 0x20000438
8001aa4: 2000043a .word 0x2000043a
8001aa8: 2000043c .word 0x2000043c
8001aac: 2000043e .word 0x2000043e
8001ab0: 20000440 .word 0x20000440
8001ab4: 20000442 .word 0x20000442
8001ab8: 20000444 .word 0x20000444
8001abc: 20000446 .word 0x20000446
8001ac0: 20000448 .word 0x20000448
8001ac4: 0800f1a4 .word 0x0800f1a4
8001ac8: 200003a8 .word 0x200003a8
8001acc: 0800f1ac .word 0x0800f1ac
8001ad0: 0800f208 .word 0x0800f208
8001ad4: 0800f24c .word 0x0800f24c
8001ad8: 0800f264 .word 0x0800f264
8001adc: 0800f298 .word 0x0800f298
8001ae0: 0800f2cc .word 0x0800f2cc
8001ae4: 4822 ldr r0, [pc, #136] @ (8001b70 <loadEE+0x3f4>)
8001ae6: f007 fea1 bl 800982c <HAL_UART_Transmit>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
8001aea: 4b22 ldr r3, [pc, #136] @ (8001b74 <loadEE+0x3f8>)
8001aec: 881b ldrh r3, [r3, #0]
8001aee: 4619 mov r1, r3
8001af0: 4b21 ldr r3, [pc, #132] @ (8001b78 <loadEE+0x3fc>)
8001af2: 881b ldrh r3, [r3, #0]
8001af4: 461c mov r4, r3
8001af6: 4b21 ldr r3, [pc, #132] @ (8001b7c <loadEE+0x400>)
8001af8: 881b ldrh r3, [r3, #0]
8001afa: 461a mov r2, r3
8001afc: 4b20 ldr r3, [pc, #128] @ (8001b80 <loadEE+0x404>)
8001afe: 881b ldrh r3, [r3, #0]
8001b00: 4638 mov r0, r7
8001b02: 9301 str r3, [sp, #4]
8001b04: 9200 str r2, [sp, #0]
8001b06: 4623 mov r3, r4
8001b08: 460a mov r2, r1
8001b0a: 491e ldr r1, [pc, #120] @ (8001b84 <loadEE+0x408>)
8001b0c: f00c fc7e bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001b10: 463b mov r3, r7
8001b12: 4618 mov r0, r3
8001b14: f7fe fb1a bl 800014c <strlen>
8001b18: 4603 mov r3, r0
8001b1a: b29a uxth r2, r3
8001b1c: 4639 mov r1, r7
8001b1e: f04f 33ff mov.w r3, #4294967295
8001b22: 4813 ldr r0, [pc, #76] @ (8001b70 <loadEE+0x3f4>)
8001b24: f007 fe82 bl 800982c <HAL_UART_Transmit>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
8001b28: 4b17 ldr r3, [pc, #92] @ (8001b88 <loadEE+0x40c>)
8001b2a: 881b ldrh r3, [r3, #0]
8001b2c: 4619 mov r1, r3
8001b2e: 4b17 ldr r3, [pc, #92] @ (8001b8c <loadEE+0x410>)
8001b30: 881b ldrh r3, [r3, #0]
8001b32: 461c mov r4, r3
8001b34: 4b16 ldr r3, [pc, #88] @ (8001b90 <loadEE+0x414>)
8001b36: 881b ldrh r3, [r3, #0]
8001b38: 461a mov r2, r3
8001b3a: 4b16 ldr r3, [pc, #88] @ (8001b94 <loadEE+0x418>)
8001b3c: 881b ldrh r3, [r3, #0]
8001b3e: 4638 mov r0, r7
8001b40: 9301 str r3, [sp, #4]
8001b42: 9200 str r2, [sp, #0]
8001b44: 4623 mov r3, r4
8001b46: 460a mov r2, r1
8001b48: 4913 ldr r1, [pc, #76] @ (8001b98 <loadEE+0x41c>)
8001b4a: f00c fc5f bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001b4e: 463b mov r3, r7
8001b50: 4618 mov r0, r3
8001b52: f7fe fafb bl 800014c <strlen>
8001b56: 4603 mov r3, r0
8001b58: b29a uxth r2, r3
8001b5a: 4639 mov r1, r7
8001b5c: f04f 33ff mov.w r3, #4294967295
8001b60: 4803 ldr r0, [pc, #12] @ (8001b70 <loadEE+0x3f4>)
8001b62: f007 fe63 bl 800982c <HAL_UART_Transmit>
}
8001b66: bf00 nop
8001b68: 37cc adds r7, #204 @ 0xcc
8001b6a: 46bd mov sp, r7
8001b6c: bdf0 pop {r4, r5, r6, r7, pc}
8001b6e: bf00 nop
8001b70: 200003a8 .word 0x200003a8
8001b74: 20000430 .word 0x20000430
8001b78: 20000432 .word 0x20000432
8001b7c: 20000440 .word 0x20000440
8001b80: 20000442 .word 0x20000442
8001b84: 0800f300 .word 0x0800f300
8001b88: 20000434 .word 0x20000434
8001b8c: 20000436 .word 0x20000436
8001b90: 20000444 .word 0x20000444
8001b94: 20000446 .word 0x20000446
8001b98: 0800f334 .word 0x0800f334
08001b9c <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void) {
8001b9c: b580 push {r7, lr}
8001b9e: b082 sub sp, #8
8001ba0: af00 add r7, sp, #0
static uint8_t c1s = 0;
static uint8_t inidx = 0;
static uint8_t inbuf[4];
uint8_t i;
if (++c10ms >= 10) { // 10 ms
8001ba2: 4b7c ldr r3, [pc, #496] @ (8001d94 <HAL_SYSTICK_Callback+0x1f8>)
8001ba4: 781b ldrb r3, [r3, #0]
8001ba6: 3301 adds r3, #1
8001ba8: b2da uxtb r2, r3
8001baa: 4b7a ldr r3, [pc, #488] @ (8001d94 <HAL_SYSTICK_Callback+0x1f8>)
8001bac: 701a strb r2, [r3, #0]
8001bae: 4b79 ldr r3, [pc, #484] @ (8001d94 <HAL_SYSTICK_Callback+0x1f8>)
8001bb0: 781b ldrb r3, [r3, #0]
8001bb2: 2b09 cmp r3, #9
8001bb4: f240 81e7 bls.w 8001f86 <HAL_SYSTICK_Callback+0x3ea>
c10ms = 0;
8001bb8: 4b76 ldr r3, [pc, #472] @ (8001d94 <HAL_SYSTICK_Callback+0x1f8>)
8001bba: 2200 movs r2, #0
8001bbc: 701a strb r2, [r3, #0]
if (rtP1)
8001bbe: 4b76 ldr r3, [pc, #472] @ (8001d98 <HAL_SYSTICK_Callback+0x1fc>)
8001bc0: 781b ldrb r3, [r3, #0]
8001bc2: b2db uxtb r3, r3
8001bc4: 2b00 cmp r3, #0
8001bc6: d006 beq.n 8001bd6 <HAL_SYSTICK_Callback+0x3a>
rtP1--;
8001bc8: 4b73 ldr r3, [pc, #460] @ (8001d98 <HAL_SYSTICK_Callback+0x1fc>)
8001bca: 781b ldrb r3, [r3, #0]
8001bcc: b2db uxtb r3, r3
8001bce: 3b01 subs r3, #1
8001bd0: b2da uxtb r2, r3
8001bd2: 4b71 ldr r3, [pc, #452] @ (8001d98 <HAL_SYSTICK_Callback+0x1fc>)
8001bd4: 701a strb r2, [r3, #0]
if (rtP2)
8001bd6: 4b71 ldr r3, [pc, #452] @ (8001d9c <HAL_SYSTICK_Callback+0x200>)
8001bd8: 781b ldrb r3, [r3, #0]
8001bda: b2db uxtb r3, r3
8001bdc: 2b00 cmp r3, #0
8001bde: d006 beq.n 8001bee <HAL_SYSTICK_Callback+0x52>
rtP2--;
8001be0: 4b6e ldr r3, [pc, #440] @ (8001d9c <HAL_SYSTICK_Callback+0x200>)
8001be2: 781b ldrb r3, [r3, #0]
8001be4: b2db uxtb r3, r3
8001be6: 3b01 subs r3, #1
8001be8: b2da uxtb r2, r3
8001bea: 4b6c ldr r3, [pc, #432] @ (8001d9c <HAL_SYSTICK_Callback+0x200>)
8001bec: 701a strb r2, [r3, #0]
if (rtTLC)
8001bee: 4b6c ldr r3, [pc, #432] @ (8001da0 <HAL_SYSTICK_Callback+0x204>)
8001bf0: 781b ldrb r3, [r3, #0]
8001bf2: b2db uxtb r3, r3
8001bf4: 2b00 cmp r3, #0
8001bf6: d006 beq.n 8001c06 <HAL_SYSTICK_Callback+0x6a>
rtTLC--;
8001bf8: 4b69 ldr r3, [pc, #420] @ (8001da0 <HAL_SYSTICK_Callback+0x204>)
8001bfa: 781b ldrb r3, [r3, #0]
8001bfc: b2db uxtb r3, r3
8001bfe: 3b01 subs r3, #1
8001c00: b2da uxtb r2, r3
8001c02: 4b67 ldr r3, [pc, #412] @ (8001da0 <HAL_SYSTICK_Callback+0x204>)
8001c04: 701a strb r2, [r3, #0]
//**** legge i tasti********************************************************************************
inidx++;
8001c06: 4b67 ldr r3, [pc, #412] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c08: 781b ldrb r3, [r3, #0]
8001c0a: 3301 adds r3, #1
8001c0c: b2da uxtb r2, r3
8001c0e: 4b65 ldr r3, [pc, #404] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c10: 701a strb r2, [r3, #0]
inidx &= 0x03;
8001c12: 4b64 ldr r3, [pc, #400] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c14: 781b ldrb r3, [r3, #0]
8001c16: f003 0303 and.w r3, r3, #3
8001c1a: b2da uxtb r2, r3
8001c1c: 4b61 ldr r3, [pc, #388] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c1e: 701a strb r2, [r3, #0]
if (HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin) == GPIO_PIN_RESET)
8001c20: f44f 4180 mov.w r1, #16384 @ 0x4000
8001c24: 4860 ldr r0, [pc, #384] @ (8001da8 <HAL_SYSTICK_Callback+0x20c>)
8001c26: f004 fceb bl 8006600 <HAL_GPIO_ReadPin>
8001c2a: 4603 mov r3, r0
8001c2c: 2b00 cmp r3, #0
8001c2e: d10c bne.n 8001c4a <HAL_SYSTICK_Callback+0xae>
inbuf[inidx] |= INP1;
8001c30: 4b5c ldr r3, [pc, #368] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c32: 781b ldrb r3, [r3, #0]
8001c34: 461a mov r2, r3
8001c36: 4b5d ldr r3, [pc, #372] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001c38: 5c9b ldrb r3, [r3, r2]
8001c3a: 4a5a ldr r2, [pc, #360] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c3c: 7812 ldrb r2, [r2, #0]
8001c3e: f043 0301 orr.w r3, r3, #1
8001c42: b2d9 uxtb r1, r3
8001c44: 4b59 ldr r3, [pc, #356] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001c46: 5499 strb r1, [r3, r2]
8001c48: e00b b.n 8001c62 <HAL_SYSTICK_Callback+0xc6>
else
inbuf[inidx] &= (~INP1);
8001c4a: 4b56 ldr r3, [pc, #344] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c4c: 781b ldrb r3, [r3, #0]
8001c4e: 461a mov r2, r3
8001c50: 4b56 ldr r3, [pc, #344] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001c52: 5c9b ldrb r3, [r3, r2]
8001c54: 4a53 ldr r2, [pc, #332] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c56: 7812 ldrb r2, [r2, #0]
8001c58: f023 0301 bic.w r3, r3, #1
8001c5c: b2d9 uxtb r1, r3
8001c5e: 4b53 ldr r3, [pc, #332] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001c60: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin) == GPIO_PIN_RESET)
8001c62: f44f 4100 mov.w r1, #32768 @ 0x8000
8001c66: 4850 ldr r0, [pc, #320] @ (8001da8 <HAL_SYSTICK_Callback+0x20c>)
8001c68: f004 fcca bl 8006600 <HAL_GPIO_ReadPin>
8001c6c: 4603 mov r3, r0
8001c6e: 2b00 cmp r3, #0
8001c70: d10c bne.n 8001c8c <HAL_SYSTICK_Callback+0xf0>
inbuf[inidx] |= INP2;
8001c72: 4b4c ldr r3, [pc, #304] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c74: 781b ldrb r3, [r3, #0]
8001c76: 461a mov r2, r3
8001c78: 4b4c ldr r3, [pc, #304] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001c7a: 5c9b ldrb r3, [r3, r2]
8001c7c: 4a49 ldr r2, [pc, #292] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c7e: 7812 ldrb r2, [r2, #0]
8001c80: f043 0302 orr.w r3, r3, #2
8001c84: b2d9 uxtb r1, r3
8001c86: 4b49 ldr r3, [pc, #292] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001c88: 5499 strb r1, [r3, r2]
8001c8a: e00b b.n 8001ca4 <HAL_SYSTICK_Callback+0x108>
else
inbuf[inidx] &= (~INP2);
8001c8c: 4b45 ldr r3, [pc, #276] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c8e: 781b ldrb r3, [r3, #0]
8001c90: 461a mov r2, r3
8001c92: 4b46 ldr r3, [pc, #280] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001c94: 5c9b ldrb r3, [r3, r2]
8001c96: 4a43 ldr r2, [pc, #268] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001c98: 7812 ldrb r2, [r2, #0]
8001c9a: f023 0302 bic.w r3, r3, #2
8001c9e: b2d9 uxtb r1, r3
8001ca0: 4b42 ldr r3, [pc, #264] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001ca2: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin) == GPIO_PIN_RESET)
8001ca4: f44f 5180 mov.w r1, #4096 @ 0x1000
8001ca8: 4841 ldr r0, [pc, #260] @ (8001db0 <HAL_SYSTICK_Callback+0x214>)
8001caa: f004 fca9 bl 8006600 <HAL_GPIO_ReadPin>
8001cae: 4603 mov r3, r0
8001cb0: 2b00 cmp r3, #0
8001cb2: d10c bne.n 8001cce <HAL_SYSTICK_Callback+0x132>
inbuf[inidx] |= INCH1;
8001cb4: 4b3b ldr r3, [pc, #236] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001cb6: 781b ldrb r3, [r3, #0]
8001cb8: 461a mov r2, r3
8001cba: 4b3c ldr r3, [pc, #240] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001cbc: 5c9b ldrb r3, [r3, r2]
8001cbe: 4a39 ldr r2, [pc, #228] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001cc0: 7812 ldrb r2, [r2, #0]
8001cc2: f043 0304 orr.w r3, r3, #4
8001cc6: b2d9 uxtb r1, r3
8001cc8: 4b38 ldr r3, [pc, #224] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001cca: 5499 strb r1, [r3, r2]
8001ccc: e00b b.n 8001ce6 <HAL_SYSTICK_Callback+0x14a>
else
inbuf[inidx] &= (~INCH1);
8001cce: 4b35 ldr r3, [pc, #212] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001cd0: 781b ldrb r3, [r3, #0]
8001cd2: 461a mov r2, r3
8001cd4: 4b35 ldr r3, [pc, #212] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001cd6: 5c9b ldrb r3, [r3, r2]
8001cd8: 4a32 ldr r2, [pc, #200] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001cda: 7812 ldrb r2, [r2, #0]
8001cdc: f023 0304 bic.w r3, r3, #4
8001ce0: b2d9 uxtb r1, r3
8001ce2: 4b32 ldr r3, [pc, #200] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001ce4: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin) == GPIO_PIN_RESET)
8001ce6: f44f 5100 mov.w r1, #8192 @ 0x2000
8001cea: 4831 ldr r0, [pc, #196] @ (8001db0 <HAL_SYSTICK_Callback+0x214>)
8001cec: f004 fc88 bl 8006600 <HAL_GPIO_ReadPin>
8001cf0: 4603 mov r3, r0
8001cf2: 2b00 cmp r3, #0
8001cf4: d10c bne.n 8001d10 <HAL_SYSTICK_Callback+0x174>
inbuf[inidx] |= INCH2;
8001cf6: 4b2b ldr r3, [pc, #172] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001cf8: 781b ldrb r3, [r3, #0]
8001cfa: 461a mov r2, r3
8001cfc: 4b2b ldr r3, [pc, #172] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001cfe: 5c9b ldrb r3, [r3, r2]
8001d00: 4a28 ldr r2, [pc, #160] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d02: 7812 ldrb r2, [r2, #0]
8001d04: f043 0308 orr.w r3, r3, #8
8001d08: b2d9 uxtb r1, r3
8001d0a: 4b28 ldr r3, [pc, #160] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d0c: 5499 strb r1, [r3, r2]
8001d0e: e00b b.n 8001d28 <HAL_SYSTICK_Callback+0x18c>
else
inbuf[inidx] &= (~INCH2);
8001d10: 4b24 ldr r3, [pc, #144] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d12: 781b ldrb r3, [r3, #0]
8001d14: 461a mov r2, r3
8001d16: 4b25 ldr r3, [pc, #148] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d18: 5c9b ldrb r3, [r3, r2]
8001d1a: 4a22 ldr r2, [pc, #136] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d1c: 7812 ldrb r2, [r2, #0]
8001d1e: f023 0308 bic.w r3, r3, #8
8001d22: b2d9 uxtb r1, r3
8001d24: 4b21 ldr r3, [pc, #132] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d26: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin) == GPIO_PIN_RESET)
8001d28: f44f 4180 mov.w r1, #16384 @ 0x4000
8001d2c: 4820 ldr r0, [pc, #128] @ (8001db0 <HAL_SYSTICK_Callback+0x214>)
8001d2e: f004 fc67 bl 8006600 <HAL_GPIO_ReadPin>
8001d32: 4603 mov r3, r0
8001d34: 2b00 cmp r3, #0
8001d36: d10c bne.n 8001d52 <HAL_SYSTICK_Callback+0x1b6>
inbuf[inidx] |= INCH3;
8001d38: 4b1a ldr r3, [pc, #104] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d3a: 781b ldrb r3, [r3, #0]
8001d3c: 461a mov r2, r3
8001d3e: 4b1b ldr r3, [pc, #108] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d40: 5c9b ldrb r3, [r3, r2]
8001d42: 4a18 ldr r2, [pc, #96] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d44: 7812 ldrb r2, [r2, #0]
8001d46: f043 0310 orr.w r3, r3, #16
8001d4a: b2d9 uxtb r1, r3
8001d4c: 4b17 ldr r3, [pc, #92] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d4e: 5499 strb r1, [r3, r2]
8001d50: e00b b.n 8001d6a <HAL_SYSTICK_Callback+0x1ce>
else
inbuf[inidx] &= (~INCH3);
8001d52: 4b14 ldr r3, [pc, #80] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d54: 781b ldrb r3, [r3, #0]
8001d56: 461a mov r2, r3
8001d58: 4b14 ldr r3, [pc, #80] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d5a: 5c9b ldrb r3, [r3, r2]
8001d5c: 4a11 ldr r2, [pc, #68] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d5e: 7812 ldrb r2, [r2, #0]
8001d60: f023 0310 bic.w r3, r3, #16
8001d64: b2d9 uxtb r1, r3
8001d66: 4b11 ldr r3, [pc, #68] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d68: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin) == GPIO_PIN_RESET)
8001d6a: f44f 4100 mov.w r1, #32768 @ 0x8000
8001d6e: 4810 ldr r0, [pc, #64] @ (8001db0 <HAL_SYSTICK_Callback+0x214>)
8001d70: f004 fc46 bl 8006600 <HAL_GPIO_ReadPin>
8001d74: 4603 mov r3, r0
8001d76: 2b00 cmp r3, #0
8001d78: d11c bne.n 8001db4 <HAL_SYSTICK_Callback+0x218>
inbuf[inidx] |= INCH4;
8001d7a: 4b0a ldr r3, [pc, #40] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d7c: 781b ldrb r3, [r3, #0]
8001d7e: 461a mov r2, r3
8001d80: 4b0a ldr r3, [pc, #40] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d82: 5c9b ldrb r3, [r3, r2]
8001d84: 4a07 ldr r2, [pc, #28] @ (8001da4 <HAL_SYSTICK_Callback+0x208>)
8001d86: 7812 ldrb r2, [r2, #0]
8001d88: f043 0320 orr.w r3, r3, #32
8001d8c: b2d9 uxtb r1, r3
8001d8e: 4b07 ldr r3, [pc, #28] @ (8001dac <HAL_SYSTICK_Callback+0x210>)
8001d90: 5499 strb r1, [r3, r2]
8001d92: e01b b.n 8001dcc <HAL_SYSTICK_Callback+0x230>
8001d94: 2000045a .word 0x2000045a
8001d98: 20000004 .word 0x20000004
8001d9c: 20000005 .word 0x20000005
8001da0: 20000006 .word 0x20000006
8001da4: 2000045b .word 0x2000045b
8001da8: 40011000 .word 0x40011000
8001dac: 2000045c .word 0x2000045c
8001db0: 40010c00 .word 0x40010c00
else
inbuf[inidx] &= (~INCH4);
8001db4: 4b76 ldr r3, [pc, #472] @ (8001f90 <HAL_SYSTICK_Callback+0x3f4>)
8001db6: 781b ldrb r3, [r3, #0]
8001db8: 461a mov r2, r3
8001dba: 4b76 ldr r3, [pc, #472] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001dbc: 5c9b ldrb r3, [r3, r2]
8001dbe: 4a74 ldr r2, [pc, #464] @ (8001f90 <HAL_SYSTICK_Callback+0x3f4>)
8001dc0: 7812 ldrb r2, [r2, #0]
8001dc2: f023 0320 bic.w r3, r3, #32
8001dc6: b2d9 uxtb r1, r3
8001dc8: 4b72 ldr r3, [pc, #456] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001dca: 5499 strb r1, [r3, r2]
pulsanti |= (inbuf[0] & inbuf[1] & inbuf[2] & inbuf[3]);
8001dcc: 4b71 ldr r3, [pc, #452] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001dce: 781a ldrb r2, [r3, #0]
8001dd0: 4b70 ldr r3, [pc, #448] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001dd2: 785b ldrb r3, [r3, #1]
8001dd4: 4013 ands r3, r2
8001dd6: b2da uxtb r2, r3
8001dd8: 4b6e ldr r3, [pc, #440] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001dda: 789b ldrb r3, [r3, #2]
8001ddc: 4013 ands r3, r2
8001dde: b2da uxtb r2, r3
8001de0: 4b6c ldr r3, [pc, #432] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001de2: 78db ldrb r3, [r3, #3]
8001de4: 4013 ands r3, r2
8001de6: b2da uxtb r2, r3
8001de8: 4b6b ldr r3, [pc, #428] @ (8001f98 <HAL_SYSTICK_Callback+0x3fc>)
8001dea: 781b ldrb r3, [r3, #0]
8001dec: 4313 orrs r3, r2
8001dee: b2da uxtb r2, r3
8001df0: 4b69 ldr r3, [pc, #420] @ (8001f98 <HAL_SYSTICK_Callback+0x3fc>)
8001df2: 701a strb r2, [r3, #0]
pulsanti &= (inbuf[0] | inbuf[1] | inbuf[2] | inbuf[3]);
8001df4: 4b67 ldr r3, [pc, #412] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001df6: 781a ldrb r2, [r3, #0]
8001df8: 4b66 ldr r3, [pc, #408] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001dfa: 785b ldrb r3, [r3, #1]
8001dfc: 4313 orrs r3, r2
8001dfe: b2da uxtb r2, r3
8001e00: 4b64 ldr r3, [pc, #400] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001e02: 789b ldrb r3, [r3, #2]
8001e04: 4313 orrs r3, r2
8001e06: b2da uxtb r2, r3
8001e08: 4b62 ldr r3, [pc, #392] @ (8001f94 <HAL_SYSTICK_Callback+0x3f8>)
8001e0a: 78db ldrb r3, [r3, #3]
8001e0c: 4313 orrs r3, r2
8001e0e: b2da uxtb r2, r3
8001e10: 4b61 ldr r3, [pc, #388] @ (8001f98 <HAL_SYSTICK_Callback+0x3fc>)
8001e12: 781b ldrb r3, [r3, #0]
8001e14: 4013 ands r3, r2
8001e16: b2da uxtb r2, r3
8001e18: 4b5f ldr r3, [pc, #380] @ (8001f98 <HAL_SYSTICK_Callback+0x3fc>)
8001e1a: 701a strb r2, [r3, #0]
//**** legge adc ***********************************************************************************
readAdc();
8001e1c: f7fe f9d4 bl 80001c8 <readAdc>
if (++c100ms >= 10) { // 10 ms
8001e20: 4b5e ldr r3, [pc, #376] @ (8001f9c <HAL_SYSTICK_Callback+0x400>)
8001e22: 781b ldrb r3, [r3, #0]
8001e24: 3301 adds r3, #1
8001e26: b2da uxtb r2, r3
8001e28: 4b5c ldr r3, [pc, #368] @ (8001f9c <HAL_SYSTICK_Callback+0x400>)
8001e2a: 701a strb r2, [r3, #0]
8001e2c: 4b5b ldr r3, [pc, #364] @ (8001f9c <HAL_SYSTICK_Callback+0x400>)
8001e2e: 781b ldrb r3, [r3, #0]
8001e30: 2b09 cmp r3, #9
8001e32: f240 80a8 bls.w 8001f86 <HAL_SYSTICK_Callback+0x3ea>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8001e36: 4b59 ldr r3, [pc, #356] @ (8001f9c <HAL_SYSTICK_Callback+0x400>)
8001e38: 2200 movs r2, #0
8001e3a: 701a strb r2, [r3, #0]
for (i = 0; i < 4; i++) {
8001e3c: 2300 movs r3, #0
8001e3e: 71fb strb r3, [r7, #7]
8001e40: e013 b.n 8001e6a <HAL_SYSTICK_Callback+0x2ce>
if (rtramp[i])
8001e42: 79fb ldrb r3, [r7, #7]
8001e44: 4a56 ldr r2, [pc, #344] @ (8001fa0 <HAL_SYSTICK_Callback+0x404>)
8001e46: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001e4a: b29b uxth r3, r3
8001e4c: 2b00 cmp r3, #0
8001e4e: d009 beq.n 8001e64 <HAL_SYSTICK_Callback+0x2c8>
rtramp[i]--;
8001e50: 79fb ldrb r3, [r7, #7]
8001e52: 4a53 ldr r2, [pc, #332] @ (8001fa0 <HAL_SYSTICK_Callback+0x404>)
8001e54: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8001e58: b292 uxth r2, r2
8001e5a: 3a01 subs r2, #1
8001e5c: b291 uxth r1, r2
8001e5e: 4a50 ldr r2, [pc, #320] @ (8001fa0 <HAL_SYSTICK_Callback+0x404>)
8001e60: f822 1013 strh.w r1, [r2, r3, lsl #1]
for (i = 0; i < 4; i++) {
8001e64: 79fb ldrb r3, [r7, #7]
8001e66: 3301 adds r3, #1
8001e68: 71fb strb r3, [r7, #7]
8001e6a: 79fb ldrb r3, [r7, #7]
8001e6c: 2b03 cmp r3, #3
8001e6e: d9e8 bls.n 8001e42 <HAL_SYSTICK_Callback+0x2a6>
}
if (rtCiclo < 0xffff)rtCiclo++;
8001e70: 4b4c ldr r3, [pc, #304] @ (8001fa4 <HAL_SYSTICK_Callback+0x408>)
8001e72: 881b ldrh r3, [r3, #0]
8001e74: b29b uxth r3, r3
8001e76: f64f 72ff movw r2, #65535 @ 0xffff
8001e7a: 4293 cmp r3, r2
8001e7c: d006 beq.n 8001e8c <HAL_SYSTICK_Callback+0x2f0>
8001e7e: 4b49 ldr r3, [pc, #292] @ (8001fa4 <HAL_SYSTICK_Callback+0x408>)
8001e80: 881b ldrh r3, [r3, #0]
8001e82: b29b uxth r3, r3
8001e84: 3301 adds r3, #1
8001e86: b29a uxth r2, r3
8001e88: 4b46 ldr r3, [pc, #280] @ (8001fa4 <HAL_SYSTICK_Callback+0x408>)
8001e8a: 801a strh r2, [r3, #0]
if (rtAnem)rtAnem--;
8001e8c: 4b46 ldr r3, [pc, #280] @ (8001fa8 <HAL_SYSTICK_Callback+0x40c>)
8001e8e: 881b ldrh r3, [r3, #0]
8001e90: b29b uxth r3, r3
8001e92: 2b00 cmp r3, #0
8001e94: d006 beq.n 8001ea4 <HAL_SYSTICK_Callback+0x308>
8001e96: 4b44 ldr r3, [pc, #272] @ (8001fa8 <HAL_SYSTICK_Callback+0x40c>)
8001e98: 881b ldrh r3, [r3, #0]
8001e9a: b29b uxth r3, r3
8001e9c: 3b01 subs r3, #1
8001e9e: b29a uxth r2, r3
8001ea0: 4b41 ldr r3, [pc, #260] @ (8001fa8 <HAL_SYSTICK_Callback+0x40c>)
8001ea2: 801a strh r2, [r3, #0]
//**** gestione buzzer *****************************************************************************
if (stBuz == bzmoving) {
8001ea4: 4b41 ldr r3, [pc, #260] @ (8001fac <HAL_SYSTICK_Callback+0x410>)
8001ea6: 781b ldrb r3, [r3, #0]
8001ea8: b2db uxtb r3, r3
8001eaa: 2b01 cmp r3, #1
8001eac: d127 bne.n 8001efe <HAL_SYSTICK_Callback+0x362>
if (nobuz) {
8001eae: 4b40 ldr r3, [pc, #256] @ (8001fb0 <HAL_SYSTICK_Callback+0x414>)
8001eb0: 781b ldrb r3, [r3, #0]
8001eb2: 2b00 cmp r3, #0
8001eb4: d011 beq.n 8001eda <HAL_SYSTICK_Callback+0x33e>
if (c1s >= 5)
8001eb6: 4b3f ldr r3, [pc, #252] @ (8001fb4 <HAL_SYSTICK_Callback+0x418>)
8001eb8: 781b ldrb r3, [r3, #0]
8001eba: 2b04 cmp r3, #4
8001ebc: d906 bls.n 8001ecc <HAL_SYSTICK_Callback+0x330>
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001ebe: 2200 movs r2, #0
8001ec0: f44f 5100 mov.w r1, #8192 @ 0x2000
8001ec4: 483c ldr r0, [pc, #240] @ (8001fb8 <HAL_SYSTICK_Callback+0x41c>)
8001ec6: f004 fbb2 bl 800662e <HAL_GPIO_WritePin>
8001eca: e04f b.n 8001f6c <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_RESET);
else
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001ecc: 2201 movs r2, #1
8001ece: f44f 5100 mov.w r1, #8192 @ 0x2000
8001ed2: 4839 ldr r0, [pc, #228] @ (8001fb8 <HAL_SYSTICK_Callback+0x41c>)
8001ed4: f004 fbab bl 800662e <HAL_GPIO_WritePin>
8001ed8: e048 b.n 8001f6c <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_SET);
} else {
if (c1s >= 5)
8001eda: 4b36 ldr r3, [pc, #216] @ (8001fb4 <HAL_SYSTICK_Callback+0x418>)
8001edc: 781b ldrb r3, [r3, #0]
8001ede: 2b04 cmp r3, #4
8001ee0: d906 bls.n 8001ef0 <HAL_SYSTICK_Callback+0x354>
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001ee2: 2200 movs r2, #0
8001ee4: f44f 7180 mov.w r1, #256 @ 0x100
8001ee8: 4834 ldr r0, [pc, #208] @ (8001fbc <HAL_SYSTICK_Callback+0x420>)
8001eea: f004 fba0 bl 800662e <HAL_GPIO_WritePin>
8001eee: e03d b.n 8001f6c <HAL_SYSTICK_Callback+0x3d0>
else
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001ef0: 2201 movs r2, #1
8001ef2: f44f 7180 mov.w r1, #256 @ 0x100
8001ef6: 4831 ldr r0, [pc, #196] @ (8001fbc <HAL_SYSTICK_Callback+0x420>)
8001ef8: f004 fb99 bl 800662e <HAL_GPIO_WritePin>
8001efc: e036 b.n 8001f6c <HAL_SYSTICK_Callback+0x3d0>
}
} else if (stBuz == bzwarning) {
8001efe: 4b2b ldr r3, [pc, #172] @ (8001fac <HAL_SYSTICK_Callback+0x410>)
8001f00: 781b ldrb r3, [r3, #0]
8001f02: b2db uxtb r3, r3
8001f04: 2b02 cmp r3, #2
8001f06: d12b bne.n 8001f60 <HAL_SYSTICK_Callback+0x3c4>
if (nobuz) {
8001f08: 4b29 ldr r3, [pc, #164] @ (8001fb0 <HAL_SYSTICK_Callback+0x414>)
8001f0a: 781b ldrb r3, [r3, #0]
8001f0c: 2b00 cmp r3, #0
8001f0e: d013 beq.n 8001f38 <HAL_SYSTICK_Callback+0x39c>
if (c1s & 1)
8001f10: 4b28 ldr r3, [pc, #160] @ (8001fb4 <HAL_SYSTICK_Callback+0x418>)
8001f12: 781b ldrb r3, [r3, #0]
8001f14: f003 0301 and.w r3, r3, #1
8001f18: 2b00 cmp r3, #0
8001f1a: d006 beq.n 8001f2a <HAL_SYSTICK_Callback+0x38e>
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f1c: 2200 movs r2, #0
8001f1e: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f22: 4825 ldr r0, [pc, #148] @ (8001fb8 <HAL_SYSTICK_Callback+0x41c>)
8001f24: f004 fb83 bl 800662e <HAL_GPIO_WritePin>
8001f28: e020 b.n 8001f6c <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_RESET);
else
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f2a: 2201 movs r2, #1
8001f2c: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f30: 4821 ldr r0, [pc, #132] @ (8001fb8 <HAL_SYSTICK_Callback+0x41c>)
8001f32: f004 fb7c bl 800662e <HAL_GPIO_WritePin>
8001f36: e019 b.n 8001f6c <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_SET);
} else {
if (c1s & 1)
8001f38: 4b1e ldr r3, [pc, #120] @ (8001fb4 <HAL_SYSTICK_Callback+0x418>)
8001f3a: 781b ldrb r3, [r3, #0]
8001f3c: f003 0301 and.w r3, r3, #1
8001f40: 2b00 cmp r3, #0
8001f42: d006 beq.n 8001f52 <HAL_SYSTICK_Callback+0x3b6>
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001f44: 2200 movs r2, #0
8001f46: f44f 7180 mov.w r1, #256 @ 0x100
8001f4a: 481c ldr r0, [pc, #112] @ (8001fbc <HAL_SYSTICK_Callback+0x420>)
8001f4c: f004 fb6f bl 800662e <HAL_GPIO_WritePin>
8001f50: e00c b.n 8001f6c <HAL_SYSTICK_Callback+0x3d0>
else
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001f52: 2201 movs r2, #1
8001f54: f44f 7180 mov.w r1, #256 @ 0x100
8001f58: 4818 ldr r0, [pc, #96] @ (8001fbc <HAL_SYSTICK_Callback+0x420>)
8001f5a: f004 fb68 bl 800662e <HAL_GPIO_WritePin>
8001f5e: e005 b.n 8001f6c <HAL_SYSTICK_Callback+0x3d0>
}
} else { //bzoff
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001f60: 2200 movs r2, #0
8001f62: f44f 7180 mov.w r1, #256 @ 0x100
8001f66: 4815 ldr r0, [pc, #84] @ (8001fbc <HAL_SYSTICK_Callback+0x420>)
8001f68: f004 fb61 bl 800662e <HAL_GPIO_WritePin>
}
//**************************************************************************************************
if (++c1s >= 10) { // 1 s
8001f6c: 4b11 ldr r3, [pc, #68] @ (8001fb4 <HAL_SYSTICK_Callback+0x418>)
8001f6e: 781b ldrb r3, [r3, #0]
8001f70: 3301 adds r3, #1
8001f72: b2da uxtb r2, r3
8001f74: 4b0f ldr r3, [pc, #60] @ (8001fb4 <HAL_SYSTICK_Callback+0x418>)
8001f76: 701a strb r2, [r3, #0]
8001f78: 4b0e ldr r3, [pc, #56] @ (8001fb4 <HAL_SYSTICK_Callback+0x418>)
8001f7a: 781b ldrb r3, [r3, #0]
8001f7c: 2b09 cmp r3, #9
8001f7e: d902 bls.n 8001f86 <HAL_SYSTICK_Callback+0x3ea>
c1s = 0;
8001f80: 4b0c ldr r3, [pc, #48] @ (8001fb4 <HAL_SYSTICK_Callback+0x418>)
8001f82: 2200 movs r2, #0
8001f84: 701a strb r2, [r3, #0]
//HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
}
}
}
}
8001f86: bf00 nop
8001f88: 3708 adds r7, #8
8001f8a: 46bd mov sp, r7
8001f8c: bd80 pop {r7, pc}
8001f8e: bf00 nop
8001f90: 2000045b .word 0x2000045b
8001f94: 2000045c .word 0x2000045c
8001f98: 200003f0 .word 0x200003f0
8001f9c: 20000460 .word 0x20000460
8001fa0: 200003f4 .word 0x200003f4
8001fa4: 200003fc .word 0x200003fc
8001fa8: 200003fe .word 0x200003fe
8001fac: 20000457 .word 0x20000457
8001fb0: 20000458 .word 0x20000458
8001fb4: 20000461 .word 0x20000461
8001fb8: 40011000 .word 0x40011000
8001fbc: 40010800 .word 0x40010800
08001fc0 <managePulsanti>:
void managePulsanti(void) {
8001fc0: b580 push {r7, lr}
8001fc2: af00 add r7, sp, #0
if (pulsanti & INP1) {
8001fc4: 4bac ldr r3, [pc, #688] @ (8002278 <managePulsanti+0x2b8>)
8001fc6: 781b ldrb r3, [r3, #0]
8001fc8: f003 0301 and.w r3, r3, #1
8001fcc: 2b00 cmp r3, #0
8001fce: d013 beq.n 8001ff8 <managePulsanti+0x38>
if (rtP1 == 0)
8001fd0: 4baa ldr r3, [pc, #680] @ (800227c <managePulsanti+0x2bc>)
8001fd2: 781b ldrb r3, [r3, #0]
8001fd4: b2db uxtb r3, r3
8001fd6: 2b00 cmp r3, #0
8001fd8: d107 bne.n 8001fea <managePulsanti+0x2a>
stPulsanti |= P1START;
8001fda: 4ba9 ldr r3, [pc, #676] @ (8002280 <managePulsanti+0x2c0>)
8001fdc: 881b ldrh r3, [r3, #0]
8001fde: f043 0301 orr.w r3, r3, #1
8001fe2: b29a uxth r2, r3
8001fe4: 4ba6 ldr r3, [pc, #664] @ (8002280 <managePulsanti+0x2c0>)
8001fe6: 801a strh r2, [r3, #0]
8001fe8: e036 b.n 8002058 <managePulsanti+0x98>
else {
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8001fea: 2201 movs r2, #1
8001fec: f44f 5100 mov.w r1, #8192 @ 0x2000
8001ff0: 48a4 ldr r0, [pc, #656] @ (8002284 <managePulsanti+0x2c4>)
8001ff2: f004 fb1c bl 800662e <HAL_GPIO_WritePin>
8001ff6: e02f b.n 8002058 <managePulsanti+0x98>
}
} else {
if (stPulsanti & P1START) {
8001ff8: 4ba1 ldr r3, [pc, #644] @ (8002280 <managePulsanti+0x2c0>)
8001ffa: 881b ldrh r3, [r3, #0]
8001ffc: f003 0301 and.w r3, r3, #1
8002000: 2b00 cmp r3, #0
8002002: d014 beq.n 800202e <managePulsanti+0x6e>
stPulsanti &= (~P1START);
8002004: 4b9e ldr r3, [pc, #632] @ (8002280 <managePulsanti+0x2c0>)
8002006: 881b ldrh r3, [r3, #0]
8002008: f023 0301 bic.w r3, r3, #1
800200c: b29a uxth r2, r3
800200e: 4b9c ldr r3, [pc, #624] @ (8002280 <managePulsanti+0x2c0>)
8002010: 801a strh r2, [r3, #0]
stPulsanti|=P1RELEASED;
8002012: 4b9b ldr r3, [pc, #620] @ (8002280 <managePulsanti+0x2c0>)
8002014: 881b ldrh r3, [r3, #0]
8002016: f443 5380 orr.w r3, r3, #4096 @ 0x1000
800201a: b29a uxth r2, r3
800201c: 4b98 ldr r3, [pc, #608] @ (8002280 <managePulsanti+0x2c0>)
800201e: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8002020: 2200 movs r2, #0
8002022: f44f 5100 mov.w r1, #8192 @ 0x2000
8002026: 4897 ldr r0, [pc, #604] @ (8002284 <managePulsanti+0x2c4>)
8002028: f004 fb01 bl 800662e <HAL_GPIO_WritePin>
800202c: e011 b.n 8002052 <managePulsanti+0x92>
} else if (rtP1 <= 190) {
800202e: 4b93 ldr r3, [pc, #588] @ (800227c <managePulsanti+0x2bc>)
8002030: 781b ldrb r3, [r3, #0]
8002032: b2db uxtb r3, r3
8002034: 2bbe cmp r3, #190 @ 0xbe
8002036: d80c bhi.n 8002052 <managePulsanti+0x92>
stPulsanti |= P1STOP;
8002038: 4b91 ldr r3, [pc, #580] @ (8002280 <managePulsanti+0x2c0>)
800203a: 881b ldrh r3, [r3, #0]
800203c: f043 0302 orr.w r3, r3, #2
8002040: b29a uxth r2, r3
8002042: 4b8f ldr r3, [pc, #572] @ (8002280 <managePulsanti+0x2c0>)
8002044: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8002046: 2200 movs r2, #0
8002048: f44f 5100 mov.w r1, #8192 @ 0x2000
800204c: 488d ldr r0, [pc, #564] @ (8002284 <managePulsanti+0x2c4>)
800204e: f004 faee bl 800662e <HAL_GPIO_WritePin>
}
rtP1 = 200;
8002052: 4b8a ldr r3, [pc, #552] @ (800227c <managePulsanti+0x2bc>)
8002054: 22c8 movs r2, #200 @ 0xc8
8002056: 701a strb r2, [r3, #0]
}
if (pulsanti & INP2) {
8002058: 4b87 ldr r3, [pc, #540] @ (8002278 <managePulsanti+0x2b8>)
800205a: 781b ldrb r3, [r3, #0]
800205c: f003 0302 and.w r3, r3, #2
8002060: 2b00 cmp r3, #0
8002062: d00c beq.n 800207e <managePulsanti+0xbe>
if (rtP2 == 0)
8002064: 4b88 ldr r3, [pc, #544] @ (8002288 <managePulsanti+0x2c8>)
8002066: 781b ldrb r3, [r3, #0]
8002068: b2db uxtb r3, r3
800206a: 2b00 cmp r3, #0
800206c: d124 bne.n 80020b8 <managePulsanti+0xf8>
stPulsanti |= P2START;
800206e: 4b84 ldr r3, [pc, #528] @ (8002280 <managePulsanti+0x2c0>)
8002070: 881b ldrh r3, [r3, #0]
8002072: f043 0304 orr.w r3, r3, #4
8002076: b29a uxth r2, r3
8002078: 4b81 ldr r3, [pc, #516] @ (8002280 <managePulsanti+0x2c0>)
800207a: 801a strh r2, [r3, #0]
800207c: e01c b.n 80020b8 <managePulsanti+0xf8>
} else {
if (stPulsanti & P2START)
800207e: 4b80 ldr r3, [pc, #512] @ (8002280 <managePulsanti+0x2c0>)
8002080: 881b ldrh r3, [r3, #0]
8002082: f003 0304 and.w r3, r3, #4
8002086: 2b00 cmp r3, #0
8002088: d007 beq.n 800209a <managePulsanti+0xda>
stPulsanti &= (~P2START);
800208a: 4b7d ldr r3, [pc, #500] @ (8002280 <managePulsanti+0x2c0>)
800208c: 881b ldrh r3, [r3, #0]
800208e: f023 0304 bic.w r3, r3, #4
8002092: b29a uxth r2, r3
8002094: 4b7a ldr r3, [pc, #488] @ (8002280 <managePulsanti+0x2c0>)
8002096: 801a strh r2, [r3, #0]
8002098: e00b b.n 80020b2 <managePulsanti+0xf2>
else if (rtP2 <= 190)
800209a: 4b7b ldr r3, [pc, #492] @ (8002288 <managePulsanti+0x2c8>)
800209c: 781b ldrb r3, [r3, #0]
800209e: b2db uxtb r3, r3
80020a0: 2bbe cmp r3, #190 @ 0xbe
80020a2: d806 bhi.n 80020b2 <managePulsanti+0xf2>
stPulsanti |= P2STOP;
80020a4: 4b76 ldr r3, [pc, #472] @ (8002280 <managePulsanti+0x2c0>)
80020a6: 881b ldrh r3, [r3, #0]
80020a8: f043 0308 orr.w r3, r3, #8
80020ac: b29a uxth r2, r3
80020ae: 4b74 ldr r3, [pc, #464] @ (8002280 <managePulsanti+0x2c0>)
80020b0: 801a strh r2, [r3, #0]
rtP2 = 200;
80020b2: 4b75 ldr r3, [pc, #468] @ (8002288 <managePulsanti+0x2c8>)
80020b4: 22c8 movs r2, #200 @ 0xc8
80020b6: 701a strb r2, [r3, #0]
}
stPulsanti &= (P1START | P1STOP | P2START | P2STOP |P1RELEASED);
80020b8: 4b71 ldr r3, [pc, #452] @ (8002280 <managePulsanti+0x2c0>)
80020ba: 881a ldrh r2, [r3, #0]
80020bc: f241 030f movw r3, #4111 @ 0x100f
80020c0: 4013 ands r3, r2
80020c2: b29a uxth r2, r3
80020c4: 4b6e ldr r3, [pc, #440] @ (8002280 <managePulsanti+0x2c0>)
80020c6: 801a strh r2, [r3, #0]
if (stPulsanti == 0) {
80020c8: 4b6d ldr r3, [pc, #436] @ (8002280 <managePulsanti+0x2c0>)
80020ca: 881b ldrh r3, [r3, #0]
80020cc: 2b00 cmp r3, #0
80020ce: f040 80e0 bne.w 8002292 <managePulsanti+0x2d2>
switch (pulsanti & 0x3c) {
80020d2: 4b69 ldr r3, [pc, #420] @ (8002278 <managePulsanti+0x2b8>)
80020d4: 781b ldrb r3, [r3, #0]
80020d6: f003 033c and.w r3, r3, #60 @ 0x3c
80020da: 2b30 cmp r3, #48 @ 0x30
80020dc: f200 80bb bhi.w 8002256 <managePulsanti+0x296>
80020e0: a201 add r2, pc, #4 @ (adr r2, 80020e8 <managePulsanti+0x128>)
80020e2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80020e6: bf00 nop
80020e8: 080021ad .word 0x080021ad
80020ec: 08002257 .word 0x08002257
80020f0: 08002257 .word 0x08002257
80020f4: 08002257 .word 0x08002257
80020f8: 08002209 .word 0x08002209
80020fc: 08002257 .word 0x08002257
8002100: 08002257 .word 0x08002257
8002104: 08002257 .word 0x08002257
8002108: 080021bb .word 0x080021bb
800210c: 08002257 .word 0x08002257
8002110: 08002257 .word 0x08002257
8002114: 08002257 .word 0x08002257
8002118: 0800223d .word 0x0800223d
800211c: 08002257 .word 0x08002257
8002120: 08002257 .word 0x08002257
8002124: 08002257 .word 0x08002257
8002128: 080021d5 .word 0x080021d5
800212c: 08002257 .word 0x08002257
8002130: 08002257 .word 0x08002257
8002134: 08002257 .word 0x08002257
8002138: 08002257 .word 0x08002257
800213c: 08002257 .word 0x08002257
8002140: 08002257 .word 0x08002257
8002144: 08002257 .word 0x08002257
8002148: 08002257 .word 0x08002257
800214c: 08002257 .word 0x08002257
8002150: 08002257 .word 0x08002257
8002154: 08002257 .word 0x08002257
8002158: 08002257 .word 0x08002257
800215c: 08002257 .word 0x08002257
8002160: 08002257 .word 0x08002257
8002164: 08002257 .word 0x08002257
8002168: 080021ef .word 0x080021ef
800216c: 08002257 .word 0x08002257
8002170: 08002257 .word 0x08002257
8002174: 08002257 .word 0x08002257
8002178: 08002257 .word 0x08002257
800217c: 08002257 .word 0x08002257
8002180: 08002257 .word 0x08002257
8002184: 08002257 .word 0x08002257
8002188: 08002257 .word 0x08002257
800218c: 08002257 .word 0x08002257
8002190: 08002257 .word 0x08002257
8002194: 08002257 .word 0x08002257
8002198: 08002257 .word 0x08002257
800219c: 08002257 .word 0x08002257
80021a0: 08002257 .word 0x08002257
80021a4: 08002257 .word 0x08002257
80021a8: 08002223 .word 0x08002223
case 0x00:
rtTLC = 100;
80021ac: 4b37 ldr r3, [pc, #220] @ (800228c <managePulsanti+0x2cc>)
80021ae: 2264 movs r2, #100 @ 0x64
80021b0: 701a strb r2, [r3, #0]
stPulsanti &= (!(M1FW | M1BW | M3FW | M3BW | M4FW | M4BW));
80021b2: 4b33 ldr r3, [pc, #204] @ (8002280 <managePulsanti+0x2c0>)
80021b4: 2200 movs r2, #0
80021b6: 801a strh r2, [r3, #0]
break;
80021b8: e06b b.n 8002292 <managePulsanti+0x2d2>
case 0x08: //tlc1
if (rtTLC == 0)
80021ba: 4b34 ldr r3, [pc, #208] @ (800228c <managePulsanti+0x2cc>)
80021bc: 781b ldrb r3, [r3, #0]
80021be: b2db uxtb r3, r3
80021c0: 2b00 cmp r3, #0
80021c2: d14f bne.n 8002264 <managePulsanti+0x2a4>
stPulsanti |= M1FW;
80021c4: 4b2e ldr r3, [pc, #184] @ (8002280 <managePulsanti+0x2c0>)
80021c6: 881b ldrh r3, [r3, #0]
80021c8: f043 0310 orr.w r3, r3, #16
80021cc: b29a uxth r2, r3
80021ce: 4b2c ldr r3, [pc, #176] @ (8002280 <managePulsanti+0x2c0>)
80021d0: 801a strh r2, [r3, #0]
break;
80021d2: e047 b.n 8002264 <managePulsanti+0x2a4>
case 0x10: //tlc2
if (rtTLC == 0)
80021d4: 4b2d ldr r3, [pc, #180] @ (800228c <managePulsanti+0x2cc>)
80021d6: 781b ldrb r3, [r3, #0]
80021d8: b2db uxtb r3, r3
80021da: 2b00 cmp r3, #0
80021dc: d144 bne.n 8002268 <managePulsanti+0x2a8>
stPulsanti |= M1BW;
80021de: 4b28 ldr r3, [pc, #160] @ (8002280 <managePulsanti+0x2c0>)
80021e0: 881b ldrh r3, [r3, #0]
80021e2: f043 0320 orr.w r3, r3, #32
80021e6: b29a uxth r2, r3
80021e8: 4b25 ldr r3, [pc, #148] @ (8002280 <managePulsanti+0x2c0>)
80021ea: 801a strh r2, [r3, #0]
break;
80021ec: e03c b.n 8002268 <managePulsanti+0x2a8>
case 0x20: //tlc3
if (rtTLC == 0)
80021ee: 4b27 ldr r3, [pc, #156] @ (800228c <managePulsanti+0x2cc>)
80021f0: 781b ldrb r3, [r3, #0]
80021f2: b2db uxtb r3, r3
80021f4: 2b00 cmp r3, #0
80021f6: d139 bne.n 800226c <managePulsanti+0x2ac>
stPulsanti |= M3FW;
80021f8: 4b21 ldr r3, [pc, #132] @ (8002280 <managePulsanti+0x2c0>)
80021fa: 881b ldrh r3, [r3, #0]
80021fc: f443 7380 orr.w r3, r3, #256 @ 0x100
8002200: b29a uxth r2, r3
8002202: 4b1f ldr r3, [pc, #124] @ (8002280 <managePulsanti+0x2c0>)
8002204: 801a strh r2, [r3, #0]
break;
8002206: e031 b.n 800226c <managePulsanti+0x2ac>
case 0x04: //tlc4
if (rtTLC == 0)
8002208: 4b20 ldr r3, [pc, #128] @ (800228c <managePulsanti+0x2cc>)
800220a: 781b ldrb r3, [r3, #0]
800220c: b2db uxtb r3, r3
800220e: 2b00 cmp r3, #0
8002210: d12e bne.n 8002270 <managePulsanti+0x2b0>
stPulsanti |= M3BW;
8002212: 4b1b ldr r3, [pc, #108] @ (8002280 <managePulsanti+0x2c0>)
8002214: 881b ldrh r3, [r3, #0]
8002216: f443 7300 orr.w r3, r3, #512 @ 0x200
800221a: b29a uxth r2, r3
800221c: 4b18 ldr r3, [pc, #96] @ (8002280 <managePulsanti+0x2c0>)
800221e: 801a strh r2, [r3, #0]
break;
8002220: e026 b.n 8002270 <managePulsanti+0x2b0>
case 0x30: //tlc5
if (rtTLC == 0)
8002222: 4b1a ldr r3, [pc, #104] @ (800228c <managePulsanti+0x2cc>)
8002224: 781b ldrb r3, [r3, #0]
8002226: b2db uxtb r3, r3
8002228: 2b00 cmp r3, #0
800222a: d123 bne.n 8002274 <managePulsanti+0x2b4>
stPulsanti |= M4FW;
800222c: 4b14 ldr r3, [pc, #80] @ (8002280 <managePulsanti+0x2c0>)
800222e: 881b ldrh r3, [r3, #0]
8002230: f443 6380 orr.w r3, r3, #1024 @ 0x400
8002234: b29a uxth r2, r3
8002236: 4b12 ldr r3, [pc, #72] @ (8002280 <managePulsanti+0x2c0>)
8002238: 801a strh r2, [r3, #0]
break;
800223a: e01b b.n 8002274 <managePulsanti+0x2b4>
case 0x0c: //tlc6
if (rtTLC == 0)
800223c: 4b13 ldr r3, [pc, #76] @ (800228c <managePulsanti+0x2cc>)
800223e: 781b ldrb r3, [r3, #0]
8002240: b2db uxtb r3, r3
8002242: 2b00 cmp r3, #0
8002244: d124 bne.n 8002290 <managePulsanti+0x2d0>
stPulsanti |= M4BW;
8002246: 4b0e ldr r3, [pc, #56] @ (8002280 <managePulsanti+0x2c0>)
8002248: 881b ldrh r3, [r3, #0]
800224a: f443 6300 orr.w r3, r3, #2048 @ 0x800
800224e: b29a uxth r2, r3
8002250: 4b0b ldr r3, [pc, #44] @ (8002280 <managePulsanti+0x2c0>)
8002252: 801a strh r2, [r3, #0]
break;
8002254: e01c b.n 8002290 <managePulsanti+0x2d0>
default:
rtTLC = 100;
8002256: 4b0d ldr r3, [pc, #52] @ (800228c <managePulsanti+0x2cc>)
8002258: 2264 movs r2, #100 @ 0x64
800225a: 701a strb r2, [r3, #0]
stPulsanti &= (!(M1FW | M1BW | M3FW | M3BW | M4FW | M4BW));
800225c: 4b08 ldr r3, [pc, #32] @ (8002280 <managePulsanti+0x2c0>)
800225e: 2200 movs r2, #0
8002260: 801a strh r2, [r3, #0]
break;
8002262: e016 b.n 8002292 <managePulsanti+0x2d2>
break;
8002264: bf00 nop
8002266: e014 b.n 8002292 <managePulsanti+0x2d2>
break;
8002268: bf00 nop
800226a: e012 b.n 8002292 <managePulsanti+0x2d2>
break;
800226c: bf00 nop
800226e: e010 b.n 8002292 <managePulsanti+0x2d2>
break;
8002270: bf00 nop
8002272: e00e b.n 8002292 <managePulsanti+0x2d2>
break;
8002274: bf00 nop
8002276: e00c b.n 8002292 <managePulsanti+0x2d2>
8002278: 200003f0 .word 0x200003f0
800227c: 20000004 .word 0x20000004
8002280: 20000454 .word 0x20000454
8002284: 40011000 .word 0x40011000
8002288: 20000005 .word 0x20000005
800228c: 20000006 .word 0x20000006
break;
8002290: bf00 nop
}
}
}
8002292: bf00 nop
8002294: bd80 pop {r7, pc}
8002296: bf00 nop
08002298 <manageCiclo>:
void manageCiclo(void) {
8002298: b580 push {r7, lr}
800229a: b084 sub sp, #16
800229c: af02 add r7, sp, #8
motMov_st m1, m2, m3, m4;
switch (stCiclo) {
800229e: 4b9b ldr r3, [pc, #620] @ (800250c <manageCiclo+0x274>)
80022a0: 781b ldrb r3, [r3, #0]
80022a2: 2b19 cmp r3, #25
80022a4: f200 8690 bhi.w 8002fc8 <manageCiclo+0xd30>
80022a8: a201 add r2, pc, #4 @ (adr r2, 80022b0 <manageCiclo+0x18>)
80022aa: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80022ae: bf00 nop
80022b0: 08002319 .word 0x08002319
80022b4: 080023e5 .word 0x080023e5
80022b8: 0800242f .word 0x0800242f
80022bc: 08002479 .word 0x08002479
80022c0: 080024c3 .word 0x080024c3
80022c4: 08002549 .word 0x08002549
80022c8: 08002593 .word 0x08002593
80022cc: 080025dd .word 0x080025dd
80022d0: 08002627 .word 0x08002627
80022d4: 08002671 .word 0x08002671
80022d8: 080026bb .word 0x080026bb
80022dc: 08002705 .word 0x08002705
80022e0: 0800274f .word 0x0800274f
80022e4: 080027bd .word 0x080027bd
80022e8: 08002805 .word 0x08002805
80022ec: 0800284d .word 0x0800284d
80022f0: 08002895 .word 0x08002895
80022f4: 080028dd .word 0x080028dd
80022f8: 08002945 .word 0x08002945
80022fc: 080029d5 .word 0x080029d5
8002300: 08002a71 .word 0x08002a71
8002304: 08002e8b .word 0x08002e8b
8002308: 08002adb .word 0x08002adb
800230c: 08002d9b .word 0x08002d9b
8002310: 08002e2b .word 0x08002e2b
8002314: 08002ef3 .word 0x08002ef3
case omchiuso:
stPulsanti &= (~P1RELEASED);
8002318: 4b7d ldr r3, [pc, #500] @ (8002510 <manageCiclo+0x278>)
800231a: 881b ldrh r3, [r3, #0]
800231c: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8002320: b29a uxth r2, r3
8002322: 4b7b ldr r3, [pc, #492] @ (8002510 <manageCiclo+0x278>)
8002324: 801a strh r2, [r3, #0]
if (stPulsanti & P1START) {
8002326: 4b7a ldr r3, [pc, #488] @ (8002510 <manageCiclo+0x278>)
8002328: 881b ldrh r3, [r3, #0]
800232a: f003 0301 and.w r3, r3, #1
800232e: 2b00 cmp r3, #0
8002330: d014 beq.n 800235c <manageCiclo+0xc4>
stBuz = bzwarning;
8002332: 4b78 ldr r3, [pc, #480] @ (8002514 <manageCiclo+0x27c>)
8002334: 2202 movs r2, #2
8002336: 701a strb r2, [r3, #0]
rtCiclo = 0;
8002338: 4b77 ldr r3, [pc, #476] @ (8002518 <manageCiclo+0x280>)
800233a: 2200 movs r2, #0
800233c: 801a strh r2, [r3, #0]
stCiclo = omapertura0;
800233e: 4b73 ldr r3, [pc, #460] @ (800250c <manageCiclo+0x274>)
8002340: 2212 movs r2, #18
8002342: 701a strb r2, [r3, #0]
fchiuso = false;
8002344: 4b75 ldr r3, [pc, #468] @ (800251c <manageCiclo+0x284>)
8002346: 2200 movs r2, #0
8002348: 701a strb r2, [r3, #0]
(void) m1ap();
800234a: f001 f9c3 bl 80036d4 <m1ap>
(void) m2ap();
800234e: f001 fa93 bl 8003878 <m2ap>
(void) m3ap();
8002352: f001 fb63 bl 8003a1c <m3ap>
(void) m4ap();
8002356: f001 fc35 bl 8003bc4 <m4ap>
800235a: e00b b.n 8002374 <manageCiclo+0xdc>
} else if (stPulsanti & P1STOP) {
800235c: 4b6c ldr r3, [pc, #432] @ (8002510 <manageCiclo+0x278>)
800235e: 881b ldrh r3, [r3, #0]
8002360: f003 0302 and.w r3, r3, #2
8002364: 2b00 cmp r3, #0
8002366: d005 beq.n 8002374 <manageCiclo+0xdc>
fchiuso = false;
8002368: 4b6c ldr r3, [pc, #432] @ (800251c <manageCiclo+0x284>)
800236a: 2200 movs r2, #0
800236c: 701a strb r2, [r3, #0]
stCiclo = omstopapertura;
800236e: 4b67 ldr r3, [pc, #412] @ (800250c <manageCiclo+0x274>)
8002370: 2213 movs r2, #19
8002372: 701a strb r2, [r3, #0]
}
#ifdef ANEMCH
fchiuso = false;
#endif
if ((ch8 > thanem) && (fchiuso == false)) {
8002374: 4b6a ldr r3, [pc, #424] @ (8002520 <manageCiclo+0x288>)
8002376: 881a ldrh r2, [r3, #0]
8002378: 4b6a ldr r3, [pc, #424] @ (8002524 <manageCiclo+0x28c>)
800237a: 881b ldrh r3, [r3, #0]
800237c: 429a cmp r2, r3
800237e: d923 bls.n 80023c8 <manageCiclo+0x130>
8002380: 4b66 ldr r3, [pc, #408] @ (800251c <manageCiclo+0x284>)
8002382: 781b ldrb r3, [r3, #0]
8002384: f083 0301 eor.w r3, r3, #1
8002388: b2db uxtb r3, r3
800238a: 2b00 cmp r3, #0
800238c: d01c beq.n 80023c8 <manageCiclo+0x130>
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET);
800238e: 2201 movs r2, #1
8002390: f44f 4100 mov.w r1, #32768 @ 0x8000
8002394: 4864 ldr r0, [pc, #400] @ (8002528 <manageCiclo+0x290>)
8002396: f004 f94a bl 800662e <HAL_GPIO_WritePin>
if (rtAnem == 0) {
800239a: 4b64 ldr r3, [pc, #400] @ (800252c <manageCiclo+0x294>)
800239c: 881b ldrh r3, [r3, #0]
800239e: b29b uxth r3, r3
80023a0: 2b00 cmp r3, #0
80023a2: d11d bne.n 80023e0 <manageCiclo+0x148>
rtCiclo=0;
80023a4: 4b5c ldr r3, [pc, #368] @ (8002518 <manageCiclo+0x280>)
80023a6: 2200 movs r2, #0
80023a8: 801a strh r2, [r3, #0]
stBuz = bzmoving;
80023aa: 4b5a ldr r3, [pc, #360] @ (8002514 <manageCiclo+0x27c>)
80023ac: 2201 movs r2, #1
80023ae: 701a strb r2, [r3, #0]
stCiclo = omemergenza1;
80023b0: 4b56 ldr r3, [pc, #344] @ (800250c <manageCiclo+0x274>)
80023b2: 2218 movs r2, #24
80023b4: 701a strb r2, [r3, #0]
(void) m1ch();
80023b6: f001 fcd9 bl 8003d6c <m1ch>
(void) m2ch();
80023ba: f001 fda9 bl 8003f10 <m2ch>
(void) m3ch();
80023be: f001 fe79 bl 80040b4 <m3ch>
(void) m4ch();
80023c2: f001 ff4b bl 800425c <m4ch>
if (rtAnem == 0) {
80023c6: e00b b.n 80023e0 <manageCiclo+0x148>
}
} else{
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
80023c8: 2200 movs r2, #0
80023ca: f44f 4100 mov.w r1, #32768 @ 0x8000
80023ce: 4856 ldr r0, [pc, #344] @ (8002528 <manageCiclo+0x290>)
80023d0: f004 f92d bl 800662e <HAL_GPIO_WritePin>
rtAnem = tanem;
80023d4: 4b56 ldr r3, [pc, #344] @ (8002530 <manageCiclo+0x298>)
80023d6: 881a ldrh r2, [r3, #0]
80023d8: 4b54 ldr r3, [pc, #336] @ (800252c <manageCiclo+0x294>)
80023da: 801a strh r2, [r3, #0]
}
break;
80023dc: f000 bdf4 b.w 8002fc8 <manageCiclo+0xd30>
80023e0: f000 bdf2 b.w 8002fc8 <manageCiclo+0xd30>
case omM1fw1:
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
80023e4: 4b53 ldr r3, [pc, #332] @ (8002534 <manageCiclo+0x29c>)
80023e6: 881b ldrh r3, [r3, #0]
80023e8: b2da uxtb r2, r3
80023ea: 4b53 ldr r3, [pc, #332] @ (8002538 <manageCiclo+0x2a0>)
80023ec: 881b ldrh r3, [r3, #0]
80023ee: b2d9 uxtb r1, r3
80023f0: 4b52 ldr r3, [pc, #328] @ (800253c <manageCiclo+0x2a4>)
80023f2: 881b ldrh r3, [r3, #0]
80023f4: b2db uxtb r3, r3
80023f6: 200a movs r0, #10
80023f8: 9001 str r0, [sp, #4]
80023fa: 9300 str r3, [sp, #0]
80023fc: 460b mov r3, r1
80023fe: 2100 movs r1, #0
8002400: 2001 movs r0, #1
8002402: f002 fb65 bl 8004ad0 <ramp>
if (rtCiclo >= m1TimeoutMan)
8002406: 4b44 ldr r3, [pc, #272] @ (8002518 <manageCiclo+0x280>)
8002408: 881b ldrh r3, [r3, #0]
800240a: b29a uxth r2, r3
800240c: 4b4c ldr r3, [pc, #304] @ (8002540 <manageCiclo+0x2a8>)
800240e: 881b ldrh r3, [r3, #0]
8002410: 429a cmp r2, r3
8002412: d302 bcc.n 800241a <manageCiclo+0x182>
stCiclo = omStopMan;
8002414: 4b3d ldr r3, [pc, #244] @ (800250c <manageCiclo+0x274>)
8002416: 2211 movs r2, #17
8002418: 701a strb r2, [r3, #0]
if (pulsanti == 0)
800241a: 4b4a ldr r3, [pc, #296] @ (8002544 <manageCiclo+0x2ac>)
800241c: 781b ldrb r3, [r3, #0]
800241e: 2b00 cmp r3, #0
8002420: f040 85a1 bne.w 8002f66 <manageCiclo+0xcce>
stCiclo = omM1fw2;
8002424: 4b39 ldr r3, [pc, #228] @ (800250c <manageCiclo+0x274>)
8002426: 2202 movs r2, #2
8002428: 701a strb r2, [r3, #0]
break;
800242a: f000 bd9c b.w 8002f66 <manageCiclo+0xcce>
case omM1fw2:
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
800242e: 4b41 ldr r3, [pc, #260] @ (8002534 <manageCiclo+0x29c>)
8002430: 881b ldrh r3, [r3, #0]
8002432: b2da uxtb r2, r3
8002434: 4b40 ldr r3, [pc, #256] @ (8002538 <manageCiclo+0x2a0>)
8002436: 881b ldrh r3, [r3, #0]
8002438: b2d9 uxtb r1, r3
800243a: 4b40 ldr r3, [pc, #256] @ (800253c <manageCiclo+0x2a4>)
800243c: 881b ldrh r3, [r3, #0]
800243e: b2db uxtb r3, r3
8002440: 200a movs r0, #10
8002442: 9001 str r0, [sp, #4]
8002444: 9300 str r3, [sp, #0]
8002446: 460b mov r3, r1
8002448: 2100 movs r1, #0
800244a: 2001 movs r0, #1
800244c: f002 fb40 bl 8004ad0 <ramp>
if (rtCiclo >= m1TimeoutMan)
8002450: 4b31 ldr r3, [pc, #196] @ (8002518 <manageCiclo+0x280>)
8002452: 881b ldrh r3, [r3, #0]
8002454: b29a uxth r2, r3
8002456: 4b3a ldr r3, [pc, #232] @ (8002540 <manageCiclo+0x2a8>)
8002458: 881b ldrh r3, [r3, #0]
800245a: 429a cmp r2, r3
800245c: d302 bcc.n 8002464 <manageCiclo+0x1cc>
stCiclo = omStopMan;
800245e: 4b2b ldr r3, [pc, #172] @ (800250c <manageCiclo+0x274>)
8002460: 2211 movs r2, #17
8002462: 701a strb r2, [r3, #0]
if (pulsanti)
8002464: 4b37 ldr r3, [pc, #220] @ (8002544 <manageCiclo+0x2ac>)
8002466: 781b ldrb r3, [r3, #0]
8002468: 2b00 cmp r3, #0
800246a: f000 857e beq.w 8002f6a <manageCiclo+0xcd2>
stCiclo = omStopMan;
800246e: 4b27 ldr r3, [pc, #156] @ (800250c <manageCiclo+0x274>)
8002470: 2211 movs r2, #17
8002472: 701a strb r2, [r3, #0]
break;
8002474: f000 bd79 b.w 8002f6a <manageCiclo+0xcd2>
case omM1bw1:
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
8002478: 4b2e ldr r3, [pc, #184] @ (8002534 <manageCiclo+0x29c>)
800247a: 881b ldrh r3, [r3, #0]
800247c: b2da uxtb r2, r3
800247e: 4b2e ldr r3, [pc, #184] @ (8002538 <manageCiclo+0x2a0>)
8002480: 881b ldrh r3, [r3, #0]
8002482: b2d9 uxtb r1, r3
8002484: 4b2d ldr r3, [pc, #180] @ (800253c <manageCiclo+0x2a4>)
8002486: 881b ldrh r3, [r3, #0]
8002488: b2db uxtb r3, r3
800248a: 200a movs r0, #10
800248c: 9001 str r0, [sp, #4]
800248e: 9300 str r3, [sp, #0]
8002490: 460b mov r3, r1
8002492: 2101 movs r1, #1
8002494: 2001 movs r0, #1
8002496: f002 fb1b bl 8004ad0 <ramp>
if (rtCiclo >= m1TimeoutMan)
800249a: 4b1f ldr r3, [pc, #124] @ (8002518 <manageCiclo+0x280>)
800249c: 881b ldrh r3, [r3, #0]
800249e: b29a uxth r2, r3
80024a0: 4b27 ldr r3, [pc, #156] @ (8002540 <manageCiclo+0x2a8>)
80024a2: 881b ldrh r3, [r3, #0]
80024a4: 429a cmp r2, r3
80024a6: d302 bcc.n 80024ae <manageCiclo+0x216>
stCiclo = omStopMan;
80024a8: 4b18 ldr r3, [pc, #96] @ (800250c <manageCiclo+0x274>)
80024aa: 2211 movs r2, #17
80024ac: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80024ae: 4b25 ldr r3, [pc, #148] @ (8002544 <manageCiclo+0x2ac>)
80024b0: 781b ldrb r3, [r3, #0]
80024b2: 2b00 cmp r3, #0
80024b4: f040 855b bne.w 8002f6e <manageCiclo+0xcd6>
stCiclo = omM1bw2;
80024b8: 4b14 ldr r3, [pc, #80] @ (800250c <manageCiclo+0x274>)
80024ba: 2204 movs r2, #4
80024bc: 701a strb r2, [r3, #0]
break;
80024be: f000 bd56 b.w 8002f6e <manageCiclo+0xcd6>
case omM1bw2:
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
80024c2: 4b1c ldr r3, [pc, #112] @ (8002534 <manageCiclo+0x29c>)
80024c4: 881b ldrh r3, [r3, #0]
80024c6: b2da uxtb r2, r3
80024c8: 4b1b ldr r3, [pc, #108] @ (8002538 <manageCiclo+0x2a0>)
80024ca: 881b ldrh r3, [r3, #0]
80024cc: b2d9 uxtb r1, r3
80024ce: 4b1b ldr r3, [pc, #108] @ (800253c <manageCiclo+0x2a4>)
80024d0: 881b ldrh r3, [r3, #0]
80024d2: b2db uxtb r3, r3
80024d4: 200a movs r0, #10
80024d6: 9001 str r0, [sp, #4]
80024d8: 9300 str r3, [sp, #0]
80024da: 460b mov r3, r1
80024dc: 2101 movs r1, #1
80024de: 2001 movs r0, #1
80024e0: f002 faf6 bl 8004ad0 <ramp>
if (rtCiclo >= m1TimeoutMan)
80024e4: 4b0c ldr r3, [pc, #48] @ (8002518 <manageCiclo+0x280>)
80024e6: 881b ldrh r3, [r3, #0]
80024e8: b29a uxth r2, r3
80024ea: 4b15 ldr r3, [pc, #84] @ (8002540 <manageCiclo+0x2a8>)
80024ec: 881b ldrh r3, [r3, #0]
80024ee: 429a cmp r2, r3
80024f0: d302 bcc.n 80024f8 <manageCiclo+0x260>
stCiclo = omStopMan;
80024f2: 4b06 ldr r3, [pc, #24] @ (800250c <manageCiclo+0x274>)
80024f4: 2211 movs r2, #17
80024f6: 701a strb r2, [r3, #0]
if (pulsanti)
80024f8: 4b12 ldr r3, [pc, #72] @ (8002544 <manageCiclo+0x2ac>)
80024fa: 781b ldrb r3, [r3, #0]
80024fc: 2b00 cmp r3, #0
80024fe: f000 8538 beq.w 8002f72 <manageCiclo+0xcda>
stCiclo = omStopMan;
8002502: 4b02 ldr r3, [pc, #8] @ (800250c <manageCiclo+0x274>)
8002504: 2211 movs r2, #17
8002506: 701a strb r2, [r3, #0]
break;
8002508: f000 bd33 b.w 8002f72 <manageCiclo+0xcda>
800250c: 20000456 .word 0x20000456
8002510: 20000454 .word 0x20000454
8002514: 20000457 .word 0x20000457
8002518: 200003fc .word 0x200003fc
800251c: 20000459 .word 0x20000459
8002520: 20000232 .word 0x20000232
8002524: 2000041c .word 0x2000041c
8002528: 40010800 .word 0x40010800
800252c: 200003fe .word 0x200003fe
8002530: 2000041a .word 0x2000041a
8002534: 2000044c .word 0x2000044c
8002538: 20000420 .word 0x20000420
800253c: 2000041e .word 0x2000041e
8002540: 20000410 .word 0x20000410
8002544: 200003f0 .word 0x200003f0
case omM2fw1:
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
8002548: 4b93 ldr r3, [pc, #588] @ (8002798 <manageCiclo+0x500>)
800254a: 885b ldrh r3, [r3, #2]
800254c: b2da uxtb r2, r3
800254e: 4b93 ldr r3, [pc, #588] @ (800279c <manageCiclo+0x504>)
8002550: 881b ldrh r3, [r3, #0]
8002552: b2d9 uxtb r1, r3
8002554: 4b92 ldr r3, [pc, #584] @ (80027a0 <manageCiclo+0x508>)
8002556: 881b ldrh r3, [r3, #0]
8002558: b2db uxtb r3, r3
800255a: 200a movs r0, #10
800255c: 9001 str r0, [sp, #4]
800255e: 9300 str r3, [sp, #0]
8002560: 460b mov r3, r1
8002562: 2100 movs r1, #0
8002564: 2002 movs r0, #2
8002566: f002 fab3 bl 8004ad0 <ramp>
if (rtCiclo >= m2TimeoutMan)
800256a: 4b8e ldr r3, [pc, #568] @ (80027a4 <manageCiclo+0x50c>)
800256c: 881b ldrh r3, [r3, #0]
800256e: b29a uxth r2, r3
8002570: 4b8d ldr r3, [pc, #564] @ (80027a8 <manageCiclo+0x510>)
8002572: 881b ldrh r3, [r3, #0]
8002574: 429a cmp r2, r3
8002576: d302 bcc.n 800257e <manageCiclo+0x2e6>
stCiclo = omStopMan;
8002578: 4b8c ldr r3, [pc, #560] @ (80027ac <manageCiclo+0x514>)
800257a: 2211 movs r2, #17
800257c: 701a strb r2, [r3, #0]
if (pulsanti == 0)
800257e: 4b8c ldr r3, [pc, #560] @ (80027b0 <manageCiclo+0x518>)
8002580: 781b ldrb r3, [r3, #0]
8002582: 2b00 cmp r3, #0
8002584: f040 84f7 bne.w 8002f76 <manageCiclo+0xcde>
stCiclo = omM2fw2;
8002588: 4b88 ldr r3, [pc, #544] @ (80027ac <manageCiclo+0x514>)
800258a: 2206 movs r2, #6
800258c: 701a strb r2, [r3, #0]
break;
800258e: f000 bcf2 b.w 8002f76 <manageCiclo+0xcde>
case omM2fw2:
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
8002592: 4b81 ldr r3, [pc, #516] @ (8002798 <manageCiclo+0x500>)
8002594: 885b ldrh r3, [r3, #2]
8002596: b2da uxtb r2, r3
8002598: 4b80 ldr r3, [pc, #512] @ (800279c <manageCiclo+0x504>)
800259a: 881b ldrh r3, [r3, #0]
800259c: b2d9 uxtb r1, r3
800259e: 4b80 ldr r3, [pc, #512] @ (80027a0 <manageCiclo+0x508>)
80025a0: 881b ldrh r3, [r3, #0]
80025a2: b2db uxtb r3, r3
80025a4: 200a movs r0, #10
80025a6: 9001 str r0, [sp, #4]
80025a8: 9300 str r3, [sp, #0]
80025aa: 460b mov r3, r1
80025ac: 2100 movs r1, #0
80025ae: 2002 movs r0, #2
80025b0: f002 fa8e bl 8004ad0 <ramp>
if (rtCiclo >= m2TimeoutMan)
80025b4: 4b7b ldr r3, [pc, #492] @ (80027a4 <manageCiclo+0x50c>)
80025b6: 881b ldrh r3, [r3, #0]
80025b8: b29a uxth r2, r3
80025ba: 4b7b ldr r3, [pc, #492] @ (80027a8 <manageCiclo+0x510>)
80025bc: 881b ldrh r3, [r3, #0]
80025be: 429a cmp r2, r3
80025c0: d302 bcc.n 80025c8 <manageCiclo+0x330>
stCiclo = omStopMan;
80025c2: 4b7a ldr r3, [pc, #488] @ (80027ac <manageCiclo+0x514>)
80025c4: 2211 movs r2, #17
80025c6: 701a strb r2, [r3, #0]
if (pulsanti)
80025c8: 4b79 ldr r3, [pc, #484] @ (80027b0 <manageCiclo+0x518>)
80025ca: 781b ldrb r3, [r3, #0]
80025cc: 2b00 cmp r3, #0
80025ce: f000 84d4 beq.w 8002f7a <manageCiclo+0xce2>
stCiclo = omStopMan;
80025d2: 4b76 ldr r3, [pc, #472] @ (80027ac <manageCiclo+0x514>)
80025d4: 2211 movs r2, #17
80025d6: 701a strb r2, [r3, #0]
break;
80025d8: f000 bccf b.w 8002f7a <manageCiclo+0xce2>
case omM2bw1:
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
80025dc: 4b6e ldr r3, [pc, #440] @ (8002798 <manageCiclo+0x500>)
80025de: 885b ldrh r3, [r3, #2]
80025e0: b2da uxtb r2, r3
80025e2: 4b6e ldr r3, [pc, #440] @ (800279c <manageCiclo+0x504>)
80025e4: 881b ldrh r3, [r3, #0]
80025e6: b2d9 uxtb r1, r3
80025e8: 4b6d ldr r3, [pc, #436] @ (80027a0 <manageCiclo+0x508>)
80025ea: 881b ldrh r3, [r3, #0]
80025ec: b2db uxtb r3, r3
80025ee: 200a movs r0, #10
80025f0: 9001 str r0, [sp, #4]
80025f2: 9300 str r3, [sp, #0]
80025f4: 460b mov r3, r1
80025f6: 2101 movs r1, #1
80025f8: 2002 movs r0, #2
80025fa: f002 fa69 bl 8004ad0 <ramp>
if (rtCiclo >= m2TimeoutMan)
80025fe: 4b69 ldr r3, [pc, #420] @ (80027a4 <manageCiclo+0x50c>)
8002600: 881b ldrh r3, [r3, #0]
8002602: b29a uxth r2, r3
8002604: 4b68 ldr r3, [pc, #416] @ (80027a8 <manageCiclo+0x510>)
8002606: 881b ldrh r3, [r3, #0]
8002608: 429a cmp r2, r3
800260a: d302 bcc.n 8002612 <manageCiclo+0x37a>
stCiclo = omStopMan;
800260c: 4b67 ldr r3, [pc, #412] @ (80027ac <manageCiclo+0x514>)
800260e: 2211 movs r2, #17
8002610: 701a strb r2, [r3, #0]
if (pulsanti == 0)
8002612: 4b67 ldr r3, [pc, #412] @ (80027b0 <manageCiclo+0x518>)
8002614: 781b ldrb r3, [r3, #0]
8002616: 2b00 cmp r3, #0
8002618: f040 84b1 bne.w 8002f7e <manageCiclo+0xce6>
stCiclo = omM2bw2;
800261c: 4b63 ldr r3, [pc, #396] @ (80027ac <manageCiclo+0x514>)
800261e: 2208 movs r2, #8
8002620: 701a strb r2, [r3, #0]
break;
8002622: f000 bcac b.w 8002f7e <manageCiclo+0xce6>
case omM2bw2:
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
8002626: 4b5c ldr r3, [pc, #368] @ (8002798 <manageCiclo+0x500>)
8002628: 885b ldrh r3, [r3, #2]
800262a: b2da uxtb r2, r3
800262c: 4b5b ldr r3, [pc, #364] @ (800279c <manageCiclo+0x504>)
800262e: 881b ldrh r3, [r3, #0]
8002630: b2d9 uxtb r1, r3
8002632: 4b5b ldr r3, [pc, #364] @ (80027a0 <manageCiclo+0x508>)
8002634: 881b ldrh r3, [r3, #0]
8002636: b2db uxtb r3, r3
8002638: 200a movs r0, #10
800263a: 9001 str r0, [sp, #4]
800263c: 9300 str r3, [sp, #0]
800263e: 460b mov r3, r1
8002640: 2101 movs r1, #1
8002642: 2002 movs r0, #2
8002644: f002 fa44 bl 8004ad0 <ramp>
if (rtCiclo >= m2TimeoutMan)
8002648: 4b56 ldr r3, [pc, #344] @ (80027a4 <manageCiclo+0x50c>)
800264a: 881b ldrh r3, [r3, #0]
800264c: b29a uxth r2, r3
800264e: 4b56 ldr r3, [pc, #344] @ (80027a8 <manageCiclo+0x510>)
8002650: 881b ldrh r3, [r3, #0]
8002652: 429a cmp r2, r3
8002654: d302 bcc.n 800265c <manageCiclo+0x3c4>
stCiclo = omStopMan;
8002656: 4b55 ldr r3, [pc, #340] @ (80027ac <manageCiclo+0x514>)
8002658: 2211 movs r2, #17
800265a: 701a strb r2, [r3, #0]
if (pulsanti)
800265c: 4b54 ldr r3, [pc, #336] @ (80027b0 <manageCiclo+0x518>)
800265e: 781b ldrb r3, [r3, #0]
8002660: 2b00 cmp r3, #0
8002662: f000 848e beq.w 8002f82 <manageCiclo+0xcea>
stCiclo = omStopMan;
8002666: 4b51 ldr r3, [pc, #324] @ (80027ac <manageCiclo+0x514>)
8002668: 2211 movs r2, #17
800266a: 701a strb r2, [r3, #0]
break;
800266c: f000 bc89 b.w 8002f82 <manageCiclo+0xcea>
case omM3fw1:
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
8002670: 4b49 ldr r3, [pc, #292] @ (8002798 <manageCiclo+0x500>)
8002672: 889b ldrh r3, [r3, #4]
8002674: b2da uxtb r2, r3
8002676: 4b4f ldr r3, [pc, #316] @ (80027b4 <manageCiclo+0x51c>)
8002678: 881b ldrh r3, [r3, #0]
800267a: b2d9 uxtb r1, r3
800267c: 4b48 ldr r3, [pc, #288] @ (80027a0 <manageCiclo+0x508>)
800267e: 881b ldrh r3, [r3, #0]
8002680: b2db uxtb r3, r3
8002682: 200a movs r0, #10
8002684: 9001 str r0, [sp, #4]
8002686: 9300 str r3, [sp, #0]
8002688: 460b mov r3, r1
800268a: 2100 movs r1, #0
800268c: 2003 movs r0, #3
800268e: f002 fa1f bl 8004ad0 <ramp>
if (rtCiclo >= m3TimeoutMan)
8002692: 4b44 ldr r3, [pc, #272] @ (80027a4 <manageCiclo+0x50c>)
8002694: 881b ldrh r3, [r3, #0]
8002696: b29a uxth r2, r3
8002698: 4b47 ldr r3, [pc, #284] @ (80027b8 <manageCiclo+0x520>)
800269a: 881b ldrh r3, [r3, #0]
800269c: 429a cmp r2, r3
800269e: d302 bcc.n 80026a6 <manageCiclo+0x40e>
stCiclo = omStopMan;
80026a0: 4b42 ldr r3, [pc, #264] @ (80027ac <manageCiclo+0x514>)
80026a2: 2211 movs r2, #17
80026a4: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80026a6: 4b42 ldr r3, [pc, #264] @ (80027b0 <manageCiclo+0x518>)
80026a8: 781b ldrb r3, [r3, #0]
80026aa: 2b00 cmp r3, #0
80026ac: f040 846b bne.w 8002f86 <manageCiclo+0xcee>
stCiclo = omM3fw2;
80026b0: 4b3e ldr r3, [pc, #248] @ (80027ac <manageCiclo+0x514>)
80026b2: 220a movs r2, #10
80026b4: 701a strb r2, [r3, #0]
break;
80026b6: f000 bc66 b.w 8002f86 <manageCiclo+0xcee>
case omM3fw2:
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
80026ba: 4b37 ldr r3, [pc, #220] @ (8002798 <manageCiclo+0x500>)
80026bc: 889b ldrh r3, [r3, #4]
80026be: b2da uxtb r2, r3
80026c0: 4b3c ldr r3, [pc, #240] @ (80027b4 <manageCiclo+0x51c>)
80026c2: 881b ldrh r3, [r3, #0]
80026c4: b2d9 uxtb r1, r3
80026c6: 4b36 ldr r3, [pc, #216] @ (80027a0 <manageCiclo+0x508>)
80026c8: 881b ldrh r3, [r3, #0]
80026ca: b2db uxtb r3, r3
80026cc: 200a movs r0, #10
80026ce: 9001 str r0, [sp, #4]
80026d0: 9300 str r3, [sp, #0]
80026d2: 460b mov r3, r1
80026d4: 2100 movs r1, #0
80026d6: 2003 movs r0, #3
80026d8: f002 f9fa bl 8004ad0 <ramp>
if (rtCiclo >= m3TimeoutMan)
80026dc: 4b31 ldr r3, [pc, #196] @ (80027a4 <manageCiclo+0x50c>)
80026de: 881b ldrh r3, [r3, #0]
80026e0: b29a uxth r2, r3
80026e2: 4b35 ldr r3, [pc, #212] @ (80027b8 <manageCiclo+0x520>)
80026e4: 881b ldrh r3, [r3, #0]
80026e6: 429a cmp r2, r3
80026e8: d302 bcc.n 80026f0 <manageCiclo+0x458>
stCiclo = omStopMan;
80026ea: 4b30 ldr r3, [pc, #192] @ (80027ac <manageCiclo+0x514>)
80026ec: 2211 movs r2, #17
80026ee: 701a strb r2, [r3, #0]
if (pulsanti)
80026f0: 4b2f ldr r3, [pc, #188] @ (80027b0 <manageCiclo+0x518>)
80026f2: 781b ldrb r3, [r3, #0]
80026f4: 2b00 cmp r3, #0
80026f6: f000 8448 beq.w 8002f8a <manageCiclo+0xcf2>
stCiclo = omStopMan;
80026fa: 4b2c ldr r3, [pc, #176] @ (80027ac <manageCiclo+0x514>)
80026fc: 2211 movs r2, #17
80026fe: 701a strb r2, [r3, #0]
break;
8002700: f000 bc43 b.w 8002f8a <manageCiclo+0xcf2>
case omM3bw1:
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
8002704: 4b24 ldr r3, [pc, #144] @ (8002798 <manageCiclo+0x500>)
8002706: 889b ldrh r3, [r3, #4]
8002708: b2da uxtb r2, r3
800270a: 4b2a ldr r3, [pc, #168] @ (80027b4 <manageCiclo+0x51c>)
800270c: 881b ldrh r3, [r3, #0]
800270e: b2d9 uxtb r1, r3
8002710: 4b23 ldr r3, [pc, #140] @ (80027a0 <manageCiclo+0x508>)
8002712: 881b ldrh r3, [r3, #0]
8002714: b2db uxtb r3, r3
8002716: 200a movs r0, #10
8002718: 9001 str r0, [sp, #4]
800271a: 9300 str r3, [sp, #0]
800271c: 460b mov r3, r1
800271e: 2101 movs r1, #1
8002720: 2003 movs r0, #3
8002722: f002 f9d5 bl 8004ad0 <ramp>
if (rtCiclo >= m3TimeoutMan)
8002726: 4b1f ldr r3, [pc, #124] @ (80027a4 <manageCiclo+0x50c>)
8002728: 881b ldrh r3, [r3, #0]
800272a: b29a uxth r2, r3
800272c: 4b22 ldr r3, [pc, #136] @ (80027b8 <manageCiclo+0x520>)
800272e: 881b ldrh r3, [r3, #0]
8002730: 429a cmp r2, r3
8002732: d302 bcc.n 800273a <manageCiclo+0x4a2>
stCiclo = omStopMan;
8002734: 4b1d ldr r3, [pc, #116] @ (80027ac <manageCiclo+0x514>)
8002736: 2211 movs r2, #17
8002738: 701a strb r2, [r3, #0]
if (pulsanti == 0)
800273a: 4b1d ldr r3, [pc, #116] @ (80027b0 <manageCiclo+0x518>)
800273c: 781b ldrb r3, [r3, #0]
800273e: 2b00 cmp r3, #0
8002740: f040 8425 bne.w 8002f8e <manageCiclo+0xcf6>
stCiclo = omM3bw2;
8002744: 4b19 ldr r3, [pc, #100] @ (80027ac <manageCiclo+0x514>)
8002746: 220c movs r2, #12
8002748: 701a strb r2, [r3, #0]
break;
800274a: f000 bc20 b.w 8002f8e <manageCiclo+0xcf6>
case omM3bw2:
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
800274e: 4b12 ldr r3, [pc, #72] @ (8002798 <manageCiclo+0x500>)
8002750: 889b ldrh r3, [r3, #4]
8002752: b2da uxtb r2, r3
8002754: 4b17 ldr r3, [pc, #92] @ (80027b4 <manageCiclo+0x51c>)
8002756: 881b ldrh r3, [r3, #0]
8002758: b2d9 uxtb r1, r3
800275a: 4b11 ldr r3, [pc, #68] @ (80027a0 <manageCiclo+0x508>)
800275c: 881b ldrh r3, [r3, #0]
800275e: b2db uxtb r3, r3
8002760: 200a movs r0, #10
8002762: 9001 str r0, [sp, #4]
8002764: 9300 str r3, [sp, #0]
8002766: 460b mov r3, r1
8002768: 2101 movs r1, #1
800276a: 2003 movs r0, #3
800276c: f002 f9b0 bl 8004ad0 <ramp>
if (rtCiclo >= m3TimeoutMan)
8002770: 4b0c ldr r3, [pc, #48] @ (80027a4 <manageCiclo+0x50c>)
8002772: 881b ldrh r3, [r3, #0]
8002774: b29a uxth r2, r3
8002776: 4b10 ldr r3, [pc, #64] @ (80027b8 <manageCiclo+0x520>)
8002778: 881b ldrh r3, [r3, #0]
800277a: 429a cmp r2, r3
800277c: d302 bcc.n 8002784 <manageCiclo+0x4ec>
stCiclo = omStopMan;
800277e: 4b0b ldr r3, [pc, #44] @ (80027ac <manageCiclo+0x514>)
8002780: 2211 movs r2, #17
8002782: 701a strb r2, [r3, #0]
if (pulsanti)
8002784: 4b0a ldr r3, [pc, #40] @ (80027b0 <manageCiclo+0x518>)
8002786: 781b ldrb r3, [r3, #0]
8002788: 2b00 cmp r3, #0
800278a: f000 8402 beq.w 8002f92 <manageCiclo+0xcfa>
stCiclo = omStopMan;
800278e: 4b07 ldr r3, [pc, #28] @ (80027ac <manageCiclo+0x514>)
8002790: 2211 movs r2, #17
8002792: 701a strb r2, [r3, #0]
break;
8002794: e3fd b.n 8002f92 <manageCiclo+0xcfa>
8002796: bf00 nop
8002798: 2000044c .word 0x2000044c
800279c: 20000422 .word 0x20000422
80027a0: 2000041e .word 0x2000041e
80027a4: 200003fc .word 0x200003fc
80027a8: 20000412 .word 0x20000412
80027ac: 20000456 .word 0x20000456
80027b0: 200003f0 .word 0x200003f0
80027b4: 20000424 .word 0x20000424
80027b8: 20000414 .word 0x20000414
case omM4fw1:
(void) ramp(M4, FW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
80027bc: 4ba3 ldr r3, [pc, #652] @ (8002a4c <manageCiclo+0x7b4>)
80027be: 88db ldrh r3, [r3, #6]
80027c0: b2da uxtb r2, r3
80027c2: 4ba3 ldr r3, [pc, #652] @ (8002a50 <manageCiclo+0x7b8>)
80027c4: 881b ldrh r3, [r3, #0]
80027c6: b2d9 uxtb r1, r3
80027c8: 4ba2 ldr r3, [pc, #648] @ (8002a54 <manageCiclo+0x7bc>)
80027ca: 881b ldrh r3, [r3, #0]
80027cc: b2db uxtb r3, r3
80027ce: 200a movs r0, #10
80027d0: 9001 str r0, [sp, #4]
80027d2: 9300 str r3, [sp, #0]
80027d4: 460b mov r3, r1
80027d6: 2100 movs r1, #0
80027d8: 2004 movs r0, #4
80027da: f002 f979 bl 8004ad0 <ramp>
if (rtCiclo >= m4TimeoutMan)
80027de: 4b9e ldr r3, [pc, #632] @ (8002a58 <manageCiclo+0x7c0>)
80027e0: 881b ldrh r3, [r3, #0]
80027e2: b29a uxth r2, r3
80027e4: 4b9d ldr r3, [pc, #628] @ (8002a5c <manageCiclo+0x7c4>)
80027e6: 881b ldrh r3, [r3, #0]
80027e8: 429a cmp r2, r3
80027ea: d302 bcc.n 80027f2 <manageCiclo+0x55a>
stCiclo = omStopMan;
80027ec: 4b9c ldr r3, [pc, #624] @ (8002a60 <manageCiclo+0x7c8>)
80027ee: 2211 movs r2, #17
80027f0: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80027f2: 4b9c ldr r3, [pc, #624] @ (8002a64 <manageCiclo+0x7cc>)
80027f4: 781b ldrb r3, [r3, #0]
80027f6: 2b00 cmp r3, #0
80027f8: f040 83cd bne.w 8002f96 <manageCiclo+0xcfe>
stCiclo = omM4fw2;
80027fc: 4b98 ldr r3, [pc, #608] @ (8002a60 <manageCiclo+0x7c8>)
80027fe: 220e movs r2, #14
8002800: 701a strb r2, [r3, #0]
break;
8002802: e3c8 b.n 8002f96 <manageCiclo+0xcfe>
case omM4fw2:
(void) ramp(M4, FW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
8002804: 4b91 ldr r3, [pc, #580] @ (8002a4c <manageCiclo+0x7b4>)
8002806: 88db ldrh r3, [r3, #6]
8002808: b2da uxtb r2, r3
800280a: 4b91 ldr r3, [pc, #580] @ (8002a50 <manageCiclo+0x7b8>)
800280c: 881b ldrh r3, [r3, #0]
800280e: b2d9 uxtb r1, r3
8002810: 4b90 ldr r3, [pc, #576] @ (8002a54 <manageCiclo+0x7bc>)
8002812: 881b ldrh r3, [r3, #0]
8002814: b2db uxtb r3, r3
8002816: 200a movs r0, #10
8002818: 9001 str r0, [sp, #4]
800281a: 9300 str r3, [sp, #0]
800281c: 460b mov r3, r1
800281e: 2100 movs r1, #0
8002820: 2004 movs r0, #4
8002822: f002 f955 bl 8004ad0 <ramp>
if (rtCiclo >= m4TimeoutMan)
8002826: 4b8c ldr r3, [pc, #560] @ (8002a58 <manageCiclo+0x7c0>)
8002828: 881b ldrh r3, [r3, #0]
800282a: b29a uxth r2, r3
800282c: 4b8b ldr r3, [pc, #556] @ (8002a5c <manageCiclo+0x7c4>)
800282e: 881b ldrh r3, [r3, #0]
8002830: 429a cmp r2, r3
8002832: d302 bcc.n 800283a <manageCiclo+0x5a2>
stCiclo = omStopMan;
8002834: 4b8a ldr r3, [pc, #552] @ (8002a60 <manageCiclo+0x7c8>)
8002836: 2211 movs r2, #17
8002838: 701a strb r2, [r3, #0]
if (pulsanti)
800283a: 4b8a ldr r3, [pc, #552] @ (8002a64 <manageCiclo+0x7cc>)
800283c: 781b ldrb r3, [r3, #0]
800283e: 2b00 cmp r3, #0
8002840: f000 83ab beq.w 8002f9a <manageCiclo+0xd02>
stCiclo = omStopMan;
8002844: 4b86 ldr r3, [pc, #536] @ (8002a60 <manageCiclo+0x7c8>)
8002846: 2211 movs r2, #17
8002848: 701a strb r2, [r3, #0]
break;
800284a: e3a6 b.n 8002f9a <manageCiclo+0xd02>
case omM4bw1:
(void) ramp(M4, BW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
800284c: 4b7f ldr r3, [pc, #508] @ (8002a4c <manageCiclo+0x7b4>)
800284e: 88db ldrh r3, [r3, #6]
8002850: b2da uxtb r2, r3
8002852: 4b7f ldr r3, [pc, #508] @ (8002a50 <manageCiclo+0x7b8>)
8002854: 881b ldrh r3, [r3, #0]
8002856: b2d9 uxtb r1, r3
8002858: 4b7e ldr r3, [pc, #504] @ (8002a54 <manageCiclo+0x7bc>)
800285a: 881b ldrh r3, [r3, #0]
800285c: b2db uxtb r3, r3
800285e: 200a movs r0, #10
8002860: 9001 str r0, [sp, #4]
8002862: 9300 str r3, [sp, #0]
8002864: 460b mov r3, r1
8002866: 2101 movs r1, #1
8002868: 2004 movs r0, #4
800286a: f002 f931 bl 8004ad0 <ramp>
if (rtCiclo >= m4TimeoutMan)
800286e: 4b7a ldr r3, [pc, #488] @ (8002a58 <manageCiclo+0x7c0>)
8002870: 881b ldrh r3, [r3, #0]
8002872: b29a uxth r2, r3
8002874: 4b79 ldr r3, [pc, #484] @ (8002a5c <manageCiclo+0x7c4>)
8002876: 881b ldrh r3, [r3, #0]
8002878: 429a cmp r2, r3
800287a: d302 bcc.n 8002882 <manageCiclo+0x5ea>
stCiclo = omStopMan;
800287c: 4b78 ldr r3, [pc, #480] @ (8002a60 <manageCiclo+0x7c8>)
800287e: 2211 movs r2, #17
8002880: 701a strb r2, [r3, #0]
if (pulsanti == 0)
8002882: 4b78 ldr r3, [pc, #480] @ (8002a64 <manageCiclo+0x7cc>)
8002884: 781b ldrb r3, [r3, #0]
8002886: 2b00 cmp r3, #0
8002888: f040 8389 bne.w 8002f9e <manageCiclo+0xd06>
stCiclo = omM4bw2;
800288c: 4b74 ldr r3, [pc, #464] @ (8002a60 <manageCiclo+0x7c8>)
800288e: 2210 movs r2, #16
8002890: 701a strb r2, [r3, #0]
break;
8002892: e384 b.n 8002f9e <manageCiclo+0xd06>
case omM4bw2:
(void) ramp(M4, BW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
8002894: 4b6d ldr r3, [pc, #436] @ (8002a4c <manageCiclo+0x7b4>)
8002896: 88db ldrh r3, [r3, #6]
8002898: b2da uxtb r2, r3
800289a: 4b6d ldr r3, [pc, #436] @ (8002a50 <manageCiclo+0x7b8>)
800289c: 881b ldrh r3, [r3, #0]
800289e: b2d9 uxtb r1, r3
80028a0: 4b6c ldr r3, [pc, #432] @ (8002a54 <manageCiclo+0x7bc>)
80028a2: 881b ldrh r3, [r3, #0]
80028a4: b2db uxtb r3, r3
80028a6: 200a movs r0, #10
80028a8: 9001 str r0, [sp, #4]
80028aa: 9300 str r3, [sp, #0]
80028ac: 460b mov r3, r1
80028ae: 2101 movs r1, #1
80028b0: 2004 movs r0, #4
80028b2: f002 f90d bl 8004ad0 <ramp>
if (rtCiclo >= m4TimeoutMan)
80028b6: 4b68 ldr r3, [pc, #416] @ (8002a58 <manageCiclo+0x7c0>)
80028b8: 881b ldrh r3, [r3, #0]
80028ba: b29a uxth r2, r3
80028bc: 4b67 ldr r3, [pc, #412] @ (8002a5c <manageCiclo+0x7c4>)
80028be: 881b ldrh r3, [r3, #0]
80028c0: 429a cmp r2, r3
80028c2: d302 bcc.n 80028ca <manageCiclo+0x632>
stCiclo = omStopMan;
80028c4: 4b66 ldr r3, [pc, #408] @ (8002a60 <manageCiclo+0x7c8>)
80028c6: 2211 movs r2, #17
80028c8: 701a strb r2, [r3, #0]
if (pulsanti)
80028ca: 4b66 ldr r3, [pc, #408] @ (8002a64 <manageCiclo+0x7cc>)
80028cc: 781b ldrb r3, [r3, #0]
80028ce: 2b00 cmp r3, #0
80028d0: f000 8367 beq.w 8002fa2 <manageCiclo+0xd0a>
stCiclo = omStopMan;
80028d4: 4b62 ldr r3, [pc, #392] @ (8002a60 <manageCiclo+0x7c8>)
80028d6: 2211 movs r2, #17
80028d8: 701a strb r2, [r3, #0]
break;
80028da: e362 b.n 8002fa2 <manageCiclo+0xd0a>
case omStopMan:
SetMotPerc(M1, FW, 0);
80028dc: 2200 movs r2, #0
80028de: 2100 movs r1, #0
80028e0: 2001 movs r0, #1
80028e2: f001 ff75 bl 80047d0 <SetMotPerc>
SetMotPerc(M2, FW, 0);
80028e6: 2200 movs r2, #0
80028e8: 2100 movs r1, #0
80028ea: 2002 movs r0, #2
80028ec: f001 ff70 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, FW, 0);
80028f0: 2200 movs r2, #0
80028f2: 2100 movs r1, #0
80028f4: 2003 movs r0, #3
80028f6: f001 ff6b bl 80047d0 <SetMotPerc>
SetMotPerc(M4, FW, 0);
80028fa: 2200 movs r2, #0
80028fc: 2100 movs r1, #0
80028fe: 2004 movs r0, #4
8002900: f001 ff66 bl 80047d0 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002904: 2200 movs r2, #0
8002906: 2101 movs r1, #1
8002908: 2001 movs r0, #1
800290a: f001 ff61 bl 80047d0 <SetMotPerc>
SetMotPerc(M2, BW, 0);
800290e: 2200 movs r2, #0
8002910: 2101 movs r1, #1
8002912: 2002 movs r0, #2
8002914: f001 ff5c bl 80047d0 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002918: 2200 movs r2, #0
800291a: 2101 movs r1, #1
800291c: 2003 movs r0, #3
800291e: f001 ff57 bl 80047d0 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002922: 2200 movs r2, #0
8002924: 2101 movs r1, #1
8002926: 2004 movs r0, #4
8002928: f001 ff52 bl 80047d0 <SetMotPerc>
if (pulsanti == 0) {
800292c: 4b4d ldr r3, [pc, #308] @ (8002a64 <manageCiclo+0x7cc>)
800292e: 781b ldrb r3, [r3, #0]
8002930: 2b00 cmp r3, #0
8002932: f040 8338 bne.w 8002fa6 <manageCiclo+0xd0e>
stBuz = bzoff;
8002936: 4b4c ldr r3, [pc, #304] @ (8002a68 <manageCiclo+0x7d0>)
8002938: 2200 movs r2, #0
800293a: 701a strb r2, [r3, #0]
stCiclo = omaperto;
800293c: 4b48 ldr r3, [pc, #288] @ (8002a60 <manageCiclo+0x7c8>)
800293e: 2216 movs r2, #22
8002940: 701a strb r2, [r3, #0]
}
break;
8002942: e330 b.n 8002fa6 <manageCiclo+0xd0e>
case omapertura0:
if (rtCiclo >= 30) { //dopo 3 secondi
8002944: 4b44 ldr r3, [pc, #272] @ (8002a58 <manageCiclo+0x7c0>)
8002946: 881b ldrh r3, [r3, #0]
8002948: b29b uxth r3, r3
800294a: 2b1d cmp r3, #29
800294c: d924 bls.n 8002998 <manageCiclo+0x700>
stBuz = bzmoving;
800294e: 4b46 ldr r3, [pc, #280] @ (8002a68 <manageCiclo+0x7d0>)
8002950: 2201 movs r2, #1
8002952: 701a strb r2, [r3, #0]
m1 = m1ap();
8002954: f000 febe bl 80036d4 <m1ap>
8002958: 4603 mov r3, r0
800295a: 71fb strb r3, [r7, #7]
m2 = m2ap();
800295c: f000 ff8c bl 8003878 <m2ap>
8002960: 4603 mov r3, r0
8002962: 71bb strb r3, [r7, #6]
m3 = m3ap();
8002964: f001 f85a bl 8003a1c <m3ap>
8002968: 4603 mov r3, r0
800296a: 717b strb r3, [r7, #5]
m4 = m4ap();
800296c: f001 f92a bl 8003bc4 <m4ap>
8002970: 4603 mov r3, r0
8002972: 713b strb r3, [r7, #4]
if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop)
8002974: 79fb ldrb r3, [r7, #7]
8002976: 2b04 cmp r3, #4
8002978: d10e bne.n 8002998 <manageCiclo+0x700>
800297a: 79bb ldrb r3, [r7, #6]
800297c: 2b04 cmp r3, #4
800297e: d10b bne.n 8002998 <manageCiclo+0x700>
8002980: 797b ldrb r3, [r7, #5]
8002982: 2b04 cmp r3, #4
8002984: d108 bne.n 8002998 <manageCiclo+0x700>
&& (m4 == motStop)) {
8002986: 793b ldrb r3, [r7, #4]
8002988: 2b04 cmp r3, #4
800298a: d105 bne.n 8002998 <manageCiclo+0x700>
stBuz = bzoff;
800298c: 4b36 ldr r3, [pc, #216] @ (8002a68 <manageCiclo+0x7d0>)
800298e: 2200 movs r2, #0
8002990: 701a strb r2, [r3, #0]
stCiclo = omaperto;
8002992: 4b33 ldr r3, [pc, #204] @ (8002a60 <manageCiclo+0x7c8>)
8002994: 2216 movs r2, #22
8002996: 701a strb r2, [r3, #0]
}
}
if (stPulsanti & P1STOP)
8002998: 4b34 ldr r3, [pc, #208] @ (8002a6c <manageCiclo+0x7d4>)
800299a: 881b ldrh r3, [r3, #0]
800299c: f003 0302 and.w r3, r3, #2
80029a0: 2b00 cmp r3, #0
80029a2: d002 beq.n 80029aa <manageCiclo+0x712>
stCiclo = omstopapertura;
80029a4: 4b2e ldr r3, [pc, #184] @ (8002a60 <manageCiclo+0x7c8>)
80029a6: 2213 movs r2, #19
80029a8: 701a strb r2, [r3, #0]
if ((stPulsanti & P1START)&&(stPulsanti & P1RELEASED)) {
80029aa: 4b30 ldr r3, [pc, #192] @ (8002a6c <manageCiclo+0x7d4>)
80029ac: 881b ldrh r3, [r3, #0]
80029ae: f003 0301 and.w r3, r3, #1
80029b2: 2b00 cmp r3, #0
80029b4: f000 82f9 beq.w 8002faa <manageCiclo+0xd12>
80029b8: 4b2c ldr r3, [pc, #176] @ (8002a6c <manageCiclo+0x7d4>)
80029ba: 881b ldrh r3, [r3, #0]
80029bc: f403 5380 and.w r3, r3, #4096 @ 0x1000
80029c0: 2b00 cmp r3, #0
80029c2: f000 82f2 beq.w 8002faa <manageCiclo+0xd12>
stCiclo = omstoprestartchiusura;
80029c6: 4b26 ldr r3, [pc, #152] @ (8002a60 <manageCiclo+0x7c8>)
80029c8: 2214 movs r2, #20
80029ca: 701a strb r2, [r3, #0]
rtCiclo = 0;
80029cc: 4b22 ldr r3, [pc, #136] @ (8002a58 <manageCiclo+0x7c0>)
80029ce: 2200 movs r2, #0
80029d0: 801a strh r2, [r3, #0]
}
break;
80029d2: e2ea b.n 8002faa <manageCiclo+0xd12>
case omstopapertura:
SetMotPerc(M1, FW, 0);
80029d4: 2200 movs r2, #0
80029d6: 2100 movs r1, #0
80029d8: 2001 movs r0, #1
80029da: f001 fef9 bl 80047d0 <SetMotPerc>
SetMotPerc(M2, FW, 0);
80029de: 2200 movs r2, #0
80029e0: 2100 movs r1, #0
80029e2: 2002 movs r0, #2
80029e4: f001 fef4 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, FW, 0);
80029e8: 2200 movs r2, #0
80029ea: 2100 movs r1, #0
80029ec: 2003 movs r0, #3
80029ee: f001 feef bl 80047d0 <SetMotPerc>
SetMotPerc(M4, FW, 0);
80029f2: 2200 movs r2, #0
80029f4: 2100 movs r1, #0
80029f6: 2004 movs r0, #4
80029f8: f001 feea bl 80047d0 <SetMotPerc>
SetMotPerc(M1, BW, 0);
80029fc: 2200 movs r2, #0
80029fe: 2101 movs r1, #1
8002a00: 2001 movs r0, #1
8002a02: f001 fee5 bl 80047d0 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002a06: 2200 movs r2, #0
8002a08: 2101 movs r1, #1
8002a0a: 2002 movs r0, #2
8002a0c: f001 fee0 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002a10: 2200 movs r2, #0
8002a12: 2101 movs r1, #1
8002a14: 2003 movs r0, #3
8002a16: f001 fedb bl 80047d0 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002a1a: 2200 movs r2, #0
8002a1c: 2101 movs r1, #1
8002a1e: 2004 movs r0, #4
8002a20: f001 fed6 bl 80047d0 <SetMotPerc>
if (pulsanti == 0) {
8002a24: 4b0f ldr r3, [pc, #60] @ (8002a64 <manageCiclo+0x7cc>)
8002a26: 781b ldrb r3, [r3, #0]
8002a28: 2b00 cmp r3, #0
8002a2a: f040 82c0 bne.w 8002fae <manageCiclo+0xd16>
stBuz = bzoff;
8002a2e: 4b0e ldr r3, [pc, #56] @ (8002a68 <manageCiclo+0x7d0>)
8002a30: 2200 movs r2, #0
8002a32: 701a strb r2, [r3, #0]
stCiclo = omchiuso;
8002a34: 4b0a ldr r3, [pc, #40] @ (8002a60 <manageCiclo+0x7c8>)
8002a36: 2200 movs r2, #0
8002a38: 701a strb r2, [r3, #0]
stPulsanti &= (~P1STOP);
8002a3a: 4b0c ldr r3, [pc, #48] @ (8002a6c <manageCiclo+0x7d4>)
8002a3c: 881b ldrh r3, [r3, #0]
8002a3e: f023 0302 bic.w r3, r3, #2
8002a42: b29a uxth r2, r3
8002a44: 4b09 ldr r3, [pc, #36] @ (8002a6c <manageCiclo+0x7d4>)
8002a46: 801a strh r2, [r3, #0]
}
break;
8002a48: e2b1 b.n 8002fae <manageCiclo+0xd16>
8002a4a: bf00 nop
8002a4c: 2000044c .word 0x2000044c
8002a50: 20000426 .word 0x20000426
8002a54: 2000041e .word 0x2000041e
8002a58: 200003fc .word 0x200003fc
8002a5c: 20000416 .word 0x20000416
8002a60: 20000456 .word 0x20000456
8002a64: 200003f0 .word 0x200003f0
8002a68: 20000457 .word 0x20000457
8002a6c: 20000454 .word 0x20000454
case omstoprestartchiusura:
SetMotPerc(M1, FW, 0);
8002a70: 2200 movs r2, #0
8002a72: 2100 movs r1, #0
8002a74: 2001 movs r0, #1
8002a76: f001 feab bl 80047d0 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002a7a: 2200 movs r2, #0
8002a7c: 2100 movs r1, #0
8002a7e: 2002 movs r0, #2
8002a80: f001 fea6 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002a84: 2200 movs r2, #0
8002a86: 2100 movs r1, #0
8002a88: 2003 movs r0, #3
8002a8a: f001 fea1 bl 80047d0 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002a8e: 2200 movs r2, #0
8002a90: 2100 movs r1, #0
8002a92: 2004 movs r0, #4
8002a94: f001 fe9c bl 80047d0 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002a98: 2200 movs r2, #0
8002a9a: 2101 movs r1, #1
8002a9c: 2001 movs r0, #1
8002a9e: f001 fe97 bl 80047d0 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002aa2: 2200 movs r2, #0
8002aa4: 2101 movs r1, #1
8002aa6: 2002 movs r0, #2
8002aa8: f001 fe92 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002aac: 2200 movs r2, #0
8002aae: 2101 movs r1, #1
8002ab0: 2003 movs r0, #3
8002ab2: f001 fe8d bl 80047d0 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002ab6: 2200 movs r2, #0
8002ab8: 2101 movs r1, #1
8002aba: 2004 movs r0, #4
8002abc: f001 fe88 bl 80047d0 <SetMotPerc>
stBuz = bzoff;
8002ac0: 4b98 ldr r3, [pc, #608] @ (8002d24 <manageCiclo+0xa8c>)
8002ac2: 2200 movs r2, #0
8002ac4: 701a strb r2, [r3, #0]
if (rtCiclo >= 20)
8002ac6: 4b98 ldr r3, [pc, #608] @ (8002d28 <manageCiclo+0xa90>)
8002ac8: 881b ldrh r3, [r3, #0]
8002aca: b29b uxth r3, r3
8002acc: 2b13 cmp r3, #19
8002ace: f240 8270 bls.w 8002fb2 <manageCiclo+0xd1a>
stCiclo = omaperto;
8002ad2: 4b96 ldr r3, [pc, #600] @ (8002d2c <manageCiclo+0xa94>)
8002ad4: 2216 movs r2, #22
8002ad6: 701a strb r2, [r3, #0]
break;
8002ad8: e26b b.n 8002fb2 <manageCiclo+0xd1a>
case omaperto:
stPulsanti &= (~P1RELEASED);
8002ada: 4b95 ldr r3, [pc, #596] @ (8002d30 <manageCiclo+0xa98>)
8002adc: 881b ldrh r3, [r3, #0]
8002ade: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8002ae2: b29a uxth r2, r3
8002ae4: 4b92 ldr r3, [pc, #584] @ (8002d30 <manageCiclo+0xa98>)
8002ae6: 801a strh r2, [r3, #0]
rtCiclo = 0;
8002ae8: 4b8f ldr r3, [pc, #572] @ (8002d28 <manageCiclo+0xa90>)
8002aea: 2200 movs r2, #0
8002aec: 801a strh r2, [r3, #0]
if (stPulsanti & P1START) {
8002aee: 4b90 ldr r3, [pc, #576] @ (8002d30 <manageCiclo+0xa98>)
8002af0: 881b ldrh r3, [r3, #0]
8002af2: f003 0301 and.w r3, r3, #1
8002af6: 2b00 cmp r3, #0
8002af8: d00d beq.n 8002b16 <manageCiclo+0x87e>
stBuz = bzmoving;
8002afa: 4b8a ldr r3, [pc, #552] @ (8002d24 <manageCiclo+0xa8c>)
8002afc: 2201 movs r2, #1
8002afe: 701a strb r2, [r3, #0]
//(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
stCiclo = omchiusura1;
8002b00: 4b8a ldr r3, [pc, #552] @ (8002d2c <manageCiclo+0xa94>)
8002b02: 2217 movs r2, #23
8002b04: 701a strb r2, [r3, #0]
(void) m1ch();
8002b06: f001 f931 bl 8003d6c <m1ch>
(void) m2ch();
8002b0a: f001 fa01 bl 8003f10 <m2ch>
(void) m3ch();
8002b0e: f001 fad1 bl 80040b4 <m3ch>
(void) m4ch();
8002b12: f001 fba3 bl 800425c <m4ch>
}
if (ch8 > thanem) {
8002b16: 4b87 ldr r3, [pc, #540] @ (8002d34 <manageCiclo+0xa9c>)
8002b18: 881a ldrh r2, [r3, #0]
8002b1a: 4b87 ldr r3, [pc, #540] @ (8002d38 <manageCiclo+0xaa0>)
8002b1c: 881b ldrh r3, [r3, #0]
8002b1e: 429a cmp r2, r3
8002b20: d919 bls.n 8002b56 <manageCiclo+0x8be>
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET);
8002b22: 2201 movs r2, #1
8002b24: f44f 4100 mov.w r1, #32768 @ 0x8000
8002b28: 4884 ldr r0, [pc, #528] @ (8002d3c <manageCiclo+0xaa4>)
8002b2a: f003 fd80 bl 800662e <HAL_GPIO_WritePin>
if (rtAnem == 0) {
8002b2e: 4b84 ldr r3, [pc, #528] @ (8002d40 <manageCiclo+0xaa8>)
8002b30: 881b ldrh r3, [r3, #0]
8002b32: b29b uxth r3, r3
8002b34: 2b00 cmp r3, #0
8002b36: d118 bne.n 8002b6a <manageCiclo+0x8d2>
stBuz = bzmoving;
8002b38: 4b7a ldr r3, [pc, #488] @ (8002d24 <manageCiclo+0xa8c>)
8002b3a: 2201 movs r2, #1
8002b3c: 701a strb r2, [r3, #0]
stCiclo = omemergenza1;
8002b3e: 4b7b ldr r3, [pc, #492] @ (8002d2c <manageCiclo+0xa94>)
8002b40: 2218 movs r2, #24
8002b42: 701a strb r2, [r3, #0]
(void) m1ch();
8002b44: f001 f912 bl 8003d6c <m1ch>
(void) m2ch();
8002b48: f001 f9e2 bl 8003f10 <m2ch>
(void) m3ch();
8002b4c: f001 fab2 bl 80040b4 <m3ch>
(void) m4ch();
8002b50: f001 fb84 bl 800425c <m4ch>
8002b54: e009 b.n 8002b6a <manageCiclo+0x8d2>
}
} else{
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
8002b56: 2200 movs r2, #0
8002b58: f44f 4100 mov.w r1, #32768 @ 0x8000
8002b5c: 4877 ldr r0, [pc, #476] @ (8002d3c <manageCiclo+0xaa4>)
8002b5e: f003 fd66 bl 800662e <HAL_GPIO_WritePin>
rtAnem = tanem;
8002b62: 4b78 ldr r3, [pc, #480] @ (8002d44 <manageCiclo+0xaac>)
8002b64: 881a ldrh r2, [r3, #0]
8002b66: 4b76 ldr r3, [pc, #472] @ (8002d40 <manageCiclo+0xaa8>)
8002b68: 801a strh r2, [r3, #0]
}
if (stPulsanti & P1STOP)
8002b6a: 4b71 ldr r3, [pc, #452] @ (8002d30 <manageCiclo+0xa98>)
8002b6c: 881b ldrh r3, [r3, #0]
8002b6e: f003 0302 and.w r3, r3, #2
8002b72: 2b00 cmp r3, #0
8002b74: d003 beq.n 8002b7e <manageCiclo+0x8e6>
stCiclo = omstopchiusura;
8002b76: 4b6d ldr r3, [pc, #436] @ (8002d2c <manageCiclo+0xa94>)
8002b78: 2219 movs r2, #25
8002b7a: 701a strb r2, [r3, #0]
stBuz = bzmoving;
(void) ramp(M4, BW, mrampstart[M4 - 1], m3pwmMan, trampman,
RAMPINIT);
stCiclo = omM4bw1;
}
break;
8002b7c: e21b b.n 8002fb6 <manageCiclo+0xd1e>
else if (stPulsanti & M1FW) {
8002b7e: 4b6c ldr r3, [pc, #432] @ (8002d30 <manageCiclo+0xa98>)
8002b80: 881b ldrh r3, [r3, #0]
8002b82: f003 0310 and.w r3, r3, #16
8002b86: 2b00 cmp r3, #0
8002b88: d017 beq.n 8002bba <manageCiclo+0x922>
stBuz = bzmoving;
8002b8a: 4b66 ldr r3, [pc, #408] @ (8002d24 <manageCiclo+0xa8c>)
8002b8c: 2201 movs r2, #1
8002b8e: 701a strb r2, [r3, #0]
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman,
8002b90: 4b6d ldr r3, [pc, #436] @ (8002d48 <manageCiclo+0xab0>)
8002b92: 881b ldrh r3, [r3, #0]
8002b94: b2da uxtb r2, r3
8002b96: 4b6d ldr r3, [pc, #436] @ (8002d4c <manageCiclo+0xab4>)
8002b98: 881b ldrh r3, [r3, #0]
8002b9a: b2d9 uxtb r1, r3
8002b9c: 4b6c ldr r3, [pc, #432] @ (8002d50 <manageCiclo+0xab8>)
8002b9e: 881b ldrh r3, [r3, #0]
8002ba0: b2db uxtb r3, r3
8002ba2: 2000 movs r0, #0
8002ba4: 9001 str r0, [sp, #4]
8002ba6: 9300 str r3, [sp, #0]
8002ba8: 460b mov r3, r1
8002baa: 2100 movs r1, #0
8002bac: 2001 movs r0, #1
8002bae: f001 ff8f bl 8004ad0 <ramp>
stCiclo = omM1fw1;
8002bb2: 4b5e ldr r3, [pc, #376] @ (8002d2c <manageCiclo+0xa94>)
8002bb4: 2201 movs r2, #1
8002bb6: 701a strb r2, [r3, #0]
break;
8002bb8: e1fd b.n 8002fb6 <manageCiclo+0xd1e>
} else if (stPulsanti & M1BW) {
8002bba: 4b5d ldr r3, [pc, #372] @ (8002d30 <manageCiclo+0xa98>)
8002bbc: 881b ldrh r3, [r3, #0]
8002bbe: f003 0320 and.w r3, r3, #32
8002bc2: 2b00 cmp r3, #0
8002bc4: d017 beq.n 8002bf6 <manageCiclo+0x95e>
stBuz = bzmoving;
8002bc6: 4b57 ldr r3, [pc, #348] @ (8002d24 <manageCiclo+0xa8c>)
8002bc8: 2201 movs r2, #1
8002bca: 701a strb r2, [r3, #0]
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman,
8002bcc: 4b5e ldr r3, [pc, #376] @ (8002d48 <manageCiclo+0xab0>)
8002bce: 881b ldrh r3, [r3, #0]
8002bd0: b2da uxtb r2, r3
8002bd2: 4b5e ldr r3, [pc, #376] @ (8002d4c <manageCiclo+0xab4>)
8002bd4: 881b ldrh r3, [r3, #0]
8002bd6: b2d9 uxtb r1, r3
8002bd8: 4b5d ldr r3, [pc, #372] @ (8002d50 <manageCiclo+0xab8>)
8002bda: 881b ldrh r3, [r3, #0]
8002bdc: b2db uxtb r3, r3
8002bde: 2000 movs r0, #0
8002be0: 9001 str r0, [sp, #4]
8002be2: 9300 str r3, [sp, #0]
8002be4: 460b mov r3, r1
8002be6: 2101 movs r1, #1
8002be8: 2001 movs r0, #1
8002bea: f001 ff71 bl 8004ad0 <ramp>
stCiclo = omM1bw1;
8002bee: 4b4f ldr r3, [pc, #316] @ (8002d2c <manageCiclo+0xa94>)
8002bf0: 2203 movs r2, #3
8002bf2: 701a strb r2, [r3, #0]
break;
8002bf4: e1df b.n 8002fb6 <manageCiclo+0xd1e>
} else if (stPulsanti & M2FW) {
8002bf6: 4b4e ldr r3, [pc, #312] @ (8002d30 <manageCiclo+0xa98>)
8002bf8: 881b ldrh r3, [r3, #0]
8002bfa: f003 0340 and.w r3, r3, #64 @ 0x40
8002bfe: 2b00 cmp r3, #0
8002c00: d017 beq.n 8002c32 <manageCiclo+0x99a>
stBuz = bzmoving;
8002c02: 4b48 ldr r3, [pc, #288] @ (8002d24 <manageCiclo+0xa8c>)
8002c04: 2201 movs r2, #1
8002c06: 701a strb r2, [r3, #0]
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman,
8002c08: 4b4f ldr r3, [pc, #316] @ (8002d48 <manageCiclo+0xab0>)
8002c0a: 885b ldrh r3, [r3, #2]
8002c0c: b2da uxtb r2, r3
8002c0e: 4b51 ldr r3, [pc, #324] @ (8002d54 <manageCiclo+0xabc>)
8002c10: 881b ldrh r3, [r3, #0]
8002c12: b2d9 uxtb r1, r3
8002c14: 4b4e ldr r3, [pc, #312] @ (8002d50 <manageCiclo+0xab8>)
8002c16: 881b ldrh r3, [r3, #0]
8002c18: b2db uxtb r3, r3
8002c1a: 2000 movs r0, #0
8002c1c: 9001 str r0, [sp, #4]
8002c1e: 9300 str r3, [sp, #0]
8002c20: 460b mov r3, r1
8002c22: 2100 movs r1, #0
8002c24: 2002 movs r0, #2
8002c26: f001 ff53 bl 8004ad0 <ramp>
stCiclo = omM2fw1;
8002c2a: 4b40 ldr r3, [pc, #256] @ (8002d2c <manageCiclo+0xa94>)
8002c2c: 2205 movs r2, #5
8002c2e: 701a strb r2, [r3, #0]
break;
8002c30: e1c1 b.n 8002fb6 <manageCiclo+0xd1e>
} else if (stPulsanti & M2BW) {
8002c32: 4b3f ldr r3, [pc, #252] @ (8002d30 <manageCiclo+0xa98>)
8002c34: 881b ldrh r3, [r3, #0]
8002c36: f003 0380 and.w r3, r3, #128 @ 0x80
8002c3a: 2b00 cmp r3, #0
8002c3c: d017 beq.n 8002c6e <manageCiclo+0x9d6>
stBuz = bzmoving;
8002c3e: 4b39 ldr r3, [pc, #228] @ (8002d24 <manageCiclo+0xa8c>)
8002c40: 2201 movs r2, #1
8002c42: 701a strb r2, [r3, #0]
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman,
8002c44: 4b40 ldr r3, [pc, #256] @ (8002d48 <manageCiclo+0xab0>)
8002c46: 885b ldrh r3, [r3, #2]
8002c48: b2da uxtb r2, r3
8002c4a: 4b42 ldr r3, [pc, #264] @ (8002d54 <manageCiclo+0xabc>)
8002c4c: 881b ldrh r3, [r3, #0]
8002c4e: b2d9 uxtb r1, r3
8002c50: 4b3f ldr r3, [pc, #252] @ (8002d50 <manageCiclo+0xab8>)
8002c52: 881b ldrh r3, [r3, #0]
8002c54: b2db uxtb r3, r3
8002c56: 2000 movs r0, #0
8002c58: 9001 str r0, [sp, #4]
8002c5a: 9300 str r3, [sp, #0]
8002c5c: 460b mov r3, r1
8002c5e: 2101 movs r1, #1
8002c60: 2002 movs r0, #2
8002c62: f001 ff35 bl 8004ad0 <ramp>
stCiclo = omM2bw1;
8002c66: 4b31 ldr r3, [pc, #196] @ (8002d2c <manageCiclo+0xa94>)
8002c68: 2207 movs r2, #7
8002c6a: 701a strb r2, [r3, #0]
break;
8002c6c: e1a3 b.n 8002fb6 <manageCiclo+0xd1e>
} else if (stPulsanti & M3FW) {
8002c6e: 4b30 ldr r3, [pc, #192] @ (8002d30 <manageCiclo+0xa98>)
8002c70: 881b ldrh r3, [r3, #0]
8002c72: f403 7380 and.w r3, r3, #256 @ 0x100
8002c76: 2b00 cmp r3, #0
8002c78: d017 beq.n 8002caa <manageCiclo+0xa12>
stBuz = bzmoving;
8002c7a: 4b2a ldr r3, [pc, #168] @ (8002d24 <manageCiclo+0xa8c>)
8002c7c: 2201 movs r2, #1
8002c7e: 701a strb r2, [r3, #0]
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman,
8002c80: 4b31 ldr r3, [pc, #196] @ (8002d48 <manageCiclo+0xab0>)
8002c82: 889b ldrh r3, [r3, #4]
8002c84: b2da uxtb r2, r3
8002c86: 4b34 ldr r3, [pc, #208] @ (8002d58 <manageCiclo+0xac0>)
8002c88: 881b ldrh r3, [r3, #0]
8002c8a: b2d9 uxtb r1, r3
8002c8c: 4b30 ldr r3, [pc, #192] @ (8002d50 <manageCiclo+0xab8>)
8002c8e: 881b ldrh r3, [r3, #0]
8002c90: b2db uxtb r3, r3
8002c92: 2000 movs r0, #0
8002c94: 9001 str r0, [sp, #4]
8002c96: 9300 str r3, [sp, #0]
8002c98: 460b mov r3, r1
8002c9a: 2100 movs r1, #0
8002c9c: 2003 movs r0, #3
8002c9e: f001 ff17 bl 8004ad0 <ramp>
stCiclo = omM3fw1;
8002ca2: 4b22 ldr r3, [pc, #136] @ (8002d2c <manageCiclo+0xa94>)
8002ca4: 2209 movs r2, #9
8002ca6: 701a strb r2, [r3, #0]
break;
8002ca8: e185 b.n 8002fb6 <manageCiclo+0xd1e>
} else if (stPulsanti & M3BW) {
8002caa: 4b21 ldr r3, [pc, #132] @ (8002d30 <manageCiclo+0xa98>)
8002cac: 881b ldrh r3, [r3, #0]
8002cae: f403 7300 and.w r3, r3, #512 @ 0x200
8002cb2: 2b00 cmp r3, #0
8002cb4: d017 beq.n 8002ce6 <manageCiclo+0xa4e>
stBuz = bzmoving;
8002cb6: 4b1b ldr r3, [pc, #108] @ (8002d24 <manageCiclo+0xa8c>)
8002cb8: 2201 movs r2, #1
8002cba: 701a strb r2, [r3, #0]
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman,
8002cbc: 4b22 ldr r3, [pc, #136] @ (8002d48 <manageCiclo+0xab0>)
8002cbe: 889b ldrh r3, [r3, #4]
8002cc0: b2da uxtb r2, r3
8002cc2: 4b25 ldr r3, [pc, #148] @ (8002d58 <manageCiclo+0xac0>)
8002cc4: 881b ldrh r3, [r3, #0]
8002cc6: b2d9 uxtb r1, r3
8002cc8: 4b21 ldr r3, [pc, #132] @ (8002d50 <manageCiclo+0xab8>)
8002cca: 881b ldrh r3, [r3, #0]
8002ccc: b2db uxtb r3, r3
8002cce: 2000 movs r0, #0
8002cd0: 9001 str r0, [sp, #4]
8002cd2: 9300 str r3, [sp, #0]
8002cd4: 460b mov r3, r1
8002cd6: 2101 movs r1, #1
8002cd8: 2003 movs r0, #3
8002cda: f001 fef9 bl 8004ad0 <ramp>
stCiclo = omM3bw1;
8002cde: 4b13 ldr r3, [pc, #76] @ (8002d2c <manageCiclo+0xa94>)
8002ce0: 220b movs r2, #11
8002ce2: 701a strb r2, [r3, #0]
break;
8002ce4: e167 b.n 8002fb6 <manageCiclo+0xd1e>
} else if (stPulsanti & M4FW) {
8002ce6: 4b12 ldr r3, [pc, #72] @ (8002d30 <manageCiclo+0xa98>)
8002ce8: 881b ldrh r3, [r3, #0]
8002cea: f403 6380 and.w r3, r3, #1024 @ 0x400
8002cee: 2b00 cmp r3, #0
8002cf0: d034 beq.n 8002d5c <manageCiclo+0xac4>
stBuz = bzmoving;
8002cf2: 4b0c ldr r3, [pc, #48] @ (8002d24 <manageCiclo+0xa8c>)
8002cf4: 2201 movs r2, #1
8002cf6: 701a strb r2, [r3, #0]
(void) ramp(M4, FW, mrampstart[M4 - 1], m3pwmMan, trampman,
8002cf8: 4b13 ldr r3, [pc, #76] @ (8002d48 <manageCiclo+0xab0>)
8002cfa: 88db ldrh r3, [r3, #6]
8002cfc: b2da uxtb r2, r3
8002cfe: 4b16 ldr r3, [pc, #88] @ (8002d58 <manageCiclo+0xac0>)
8002d00: 881b ldrh r3, [r3, #0]
8002d02: b2d9 uxtb r1, r3
8002d04: 4b12 ldr r3, [pc, #72] @ (8002d50 <manageCiclo+0xab8>)
8002d06: 881b ldrh r3, [r3, #0]
8002d08: b2db uxtb r3, r3
8002d0a: 2000 movs r0, #0
8002d0c: 9001 str r0, [sp, #4]
8002d0e: 9300 str r3, [sp, #0]
8002d10: 460b mov r3, r1
8002d12: 2100 movs r1, #0
8002d14: 2004 movs r0, #4
8002d16: f001 fedb bl 8004ad0 <ramp>
stCiclo = omM4fw1;
8002d1a: 4b04 ldr r3, [pc, #16] @ (8002d2c <manageCiclo+0xa94>)
8002d1c: 220d movs r2, #13
8002d1e: 701a strb r2, [r3, #0]
break;
8002d20: e149 b.n 8002fb6 <manageCiclo+0xd1e>
8002d22: bf00 nop
8002d24: 20000457 .word 0x20000457
8002d28: 200003fc .word 0x200003fc
8002d2c: 20000456 .word 0x20000456
8002d30: 20000454 .word 0x20000454
8002d34: 20000232 .word 0x20000232
8002d38: 2000041c .word 0x2000041c
8002d3c: 40010800 .word 0x40010800
8002d40: 200003fe .word 0x200003fe
8002d44: 2000041a .word 0x2000041a
8002d48: 2000044c .word 0x2000044c
8002d4c: 20000420 .word 0x20000420
8002d50: 2000041e .word 0x2000041e
8002d54: 20000422 .word 0x20000422
8002d58: 20000424 .word 0x20000424
} else if (stPulsanti & M4BW) {
8002d5c: 4b9c ldr r3, [pc, #624] @ (8002fd0 <manageCiclo+0xd38>)
8002d5e: 881b ldrh r3, [r3, #0]
8002d60: f403 6300 and.w r3, r3, #2048 @ 0x800
8002d64: 2b00 cmp r3, #0
8002d66: f000 8126 beq.w 8002fb6 <manageCiclo+0xd1e>
stBuz = bzmoving;
8002d6a: 4b9a ldr r3, [pc, #616] @ (8002fd4 <manageCiclo+0xd3c>)
8002d6c: 2201 movs r2, #1
8002d6e: 701a strb r2, [r3, #0]
(void) ramp(M4, BW, mrampstart[M4 - 1], m3pwmMan, trampman,
8002d70: 4b99 ldr r3, [pc, #612] @ (8002fd8 <manageCiclo+0xd40>)
8002d72: 88db ldrh r3, [r3, #6]
8002d74: b2da uxtb r2, r3
8002d76: 4b99 ldr r3, [pc, #612] @ (8002fdc <manageCiclo+0xd44>)
8002d78: 881b ldrh r3, [r3, #0]
8002d7a: b2d9 uxtb r1, r3
8002d7c: 4b98 ldr r3, [pc, #608] @ (8002fe0 <manageCiclo+0xd48>)
8002d7e: 881b ldrh r3, [r3, #0]
8002d80: b2db uxtb r3, r3
8002d82: 2000 movs r0, #0
8002d84: 9001 str r0, [sp, #4]
8002d86: 9300 str r3, [sp, #0]
8002d88: 460b mov r3, r1
8002d8a: 2101 movs r1, #1
8002d8c: 2004 movs r0, #4
8002d8e: f001 fe9f bl 8004ad0 <ramp>
stCiclo = omM4bw1;
8002d92: 4b94 ldr r3, [pc, #592] @ (8002fe4 <manageCiclo+0xd4c>)
8002d94: 220f movs r2, #15
8002d96: 701a strb r2, [r3, #0]
break;
8002d98: e10d b.n 8002fb6 <manageCiclo+0xd1e>
case omchiusura1:
if (rtCiclo >= 10) { //doppo 1 secondi
8002d9a: 4b93 ldr r3, [pc, #588] @ (8002fe8 <manageCiclo+0xd50>)
8002d9c: 881b ldrh r3, [r3, #0]
8002d9e: b29b uxth r3, r3
8002da0: 2b09 cmp r3, #9
8002da2: d924 bls.n 8002dee <manageCiclo+0xb56>
m1 = m1ch();
8002da4: f000 ffe2 bl 8003d6c <m1ch>
8002da8: 4603 mov r3, r0
8002daa: 71fb strb r3, [r7, #7]
m2 = m2ch();
8002dac: f001 f8b0 bl 8003f10 <m2ch>
8002db0: 4603 mov r3, r0
8002db2: 71bb strb r3, [r7, #6]
m3 = m3ch();
8002db4: f001 f97e bl 80040b4 <m3ch>
8002db8: 4603 mov r3, r0
8002dba: 717b strb r3, [r7, #5]
m4 = m4ch();
8002dbc: f001 fa4e bl 800425c <m4ch>
8002dc0: 4603 mov r3, r0
8002dc2: 713b strb r3, [r7, #4]
if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop)
8002dc4: 79fb ldrb r3, [r7, #7]
8002dc6: 2b04 cmp r3, #4
8002dc8: d111 bne.n 8002dee <manageCiclo+0xb56>
8002dca: 79bb ldrb r3, [r7, #6]
8002dcc: 2b04 cmp r3, #4
8002dce: d10e bne.n 8002dee <manageCiclo+0xb56>
8002dd0: 797b ldrb r3, [r7, #5]
8002dd2: 2b04 cmp r3, #4
8002dd4: d10b bne.n 8002dee <manageCiclo+0xb56>
&& (m4 == motStop)) {
8002dd6: 793b ldrb r3, [r7, #4]
8002dd8: 2b04 cmp r3, #4
8002dda: d108 bne.n 8002dee <manageCiclo+0xb56>
stBuz = bzoff;
8002ddc: 4b7d ldr r3, [pc, #500] @ (8002fd4 <manageCiclo+0xd3c>)
8002dde: 2200 movs r2, #0
8002de0: 701a strb r2, [r3, #0]
stCiclo = omchiuso;
8002de2: 4b80 ldr r3, [pc, #512] @ (8002fe4 <manageCiclo+0xd4c>)
8002de4: 2200 movs r2, #0
8002de6: 701a strb r2, [r3, #0]
fchiuso = true;
8002de8: 4b80 ldr r3, [pc, #512] @ (8002fec <manageCiclo+0xd54>)
8002dea: 2201 movs r2, #1
8002dec: 701a strb r2, [r3, #0]
}
}
if (stPulsanti & P1STOP)
8002dee: 4b78 ldr r3, [pc, #480] @ (8002fd0 <manageCiclo+0xd38>)
8002df0: 881b ldrh r3, [r3, #0]
8002df2: f003 0302 and.w r3, r3, #2
8002df6: 2b00 cmp r3, #0
8002df8: d002 beq.n 8002e00 <manageCiclo+0xb68>
stCiclo = omstopchiusura;
8002dfa: 4b7a ldr r3, [pc, #488] @ (8002fe4 <manageCiclo+0xd4c>)
8002dfc: 2219 movs r2, #25
8002dfe: 701a strb r2, [r3, #0]
if ((stPulsanti & P1START)&&(stPulsanti & P1RELEASED)) {
8002e00: 4b73 ldr r3, [pc, #460] @ (8002fd0 <manageCiclo+0xd38>)
8002e02: 881b ldrh r3, [r3, #0]
8002e04: f003 0301 and.w r3, r3, #1
8002e08: 2b00 cmp r3, #0
8002e0a: f000 80d6 beq.w 8002fba <manageCiclo+0xd22>
8002e0e: 4b70 ldr r3, [pc, #448] @ (8002fd0 <manageCiclo+0xd38>)
8002e10: 881b ldrh r3, [r3, #0]
8002e12: f403 5380 and.w r3, r3, #4096 @ 0x1000
8002e16: 2b00 cmp r3, #0
8002e18: f000 80cf beq.w 8002fba <manageCiclo+0xd22>
stCiclo = omstoprestartapertura;
8002e1c: 4b71 ldr r3, [pc, #452] @ (8002fe4 <manageCiclo+0xd4c>)
8002e1e: 2215 movs r2, #21
8002e20: 701a strb r2, [r3, #0]
rtCiclo = 0;
8002e22: 4b71 ldr r3, [pc, #452] @ (8002fe8 <manageCiclo+0xd50>)
8002e24: 2200 movs r2, #0
8002e26: 801a strh r2, [r3, #0]
}
break;
8002e28: e0c7 b.n 8002fba <manageCiclo+0xd22>
case omemergenza1:
if (rtCiclo >= 10) { //doppo 1 secondi
8002e2a: 4b6f ldr r3, [pc, #444] @ (8002fe8 <manageCiclo+0xd50>)
8002e2c: 881b ldrh r3, [r3, #0]
8002e2e: b29b uxth r3, r3
8002e30: 2b09 cmp r3, #9
8002e32: f240 80c4 bls.w 8002fbe <manageCiclo+0xd26>
m1 = m1ch();
8002e36: f000 ff99 bl 8003d6c <m1ch>
8002e3a: 4603 mov r3, r0
8002e3c: 71fb strb r3, [r7, #7]
m2 = m2ch();
8002e3e: f001 f867 bl 8003f10 <m2ch>
8002e42: 4603 mov r3, r0
8002e44: 71bb strb r3, [r7, #6]
m3 = m3ch();
8002e46: f001 f935 bl 80040b4 <m3ch>
8002e4a: 4603 mov r3, r0
8002e4c: 717b strb r3, [r7, #5]
m4 = m4ch();
8002e4e: f001 fa05 bl 800425c <m4ch>
8002e52: 4603 mov r3, r0
8002e54: 713b strb r3, [r7, #4]
if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop)
8002e56: 79fb ldrb r3, [r7, #7]
8002e58: 2b04 cmp r3, #4
8002e5a: f040 80b0 bne.w 8002fbe <manageCiclo+0xd26>
8002e5e: 79bb ldrb r3, [r7, #6]
8002e60: 2b04 cmp r3, #4
8002e62: f040 80ac bne.w 8002fbe <manageCiclo+0xd26>
8002e66: 797b ldrb r3, [r7, #5]
8002e68: 2b04 cmp r3, #4
8002e6a: f040 80a8 bne.w 8002fbe <manageCiclo+0xd26>
&& (m4 == motStop)) {
8002e6e: 793b ldrb r3, [r7, #4]
8002e70: 2b04 cmp r3, #4
8002e72: f040 80a4 bne.w 8002fbe <manageCiclo+0xd26>
stBuz = bzoff;
8002e76: 4b57 ldr r3, [pc, #348] @ (8002fd4 <manageCiclo+0xd3c>)
8002e78: 2200 movs r2, #0
8002e7a: 701a strb r2, [r3, #0]
stCiclo = omchiuso;
8002e7c: 4b59 ldr r3, [pc, #356] @ (8002fe4 <manageCiclo+0xd4c>)
8002e7e: 2200 movs r2, #0
8002e80: 701a strb r2, [r3, #0]
fchiuso = true;
8002e82: 4b5a ldr r3, [pc, #360] @ (8002fec <manageCiclo+0xd54>)
8002e84: 2201 movs r2, #1
8002e86: 701a strb r2, [r3, #0]
}
}
break;
8002e88: e099 b.n 8002fbe <manageCiclo+0xd26>
case omstoprestartapertura:
SetMotPerc(M1, FW, 0);
8002e8a: 2200 movs r2, #0
8002e8c: 2100 movs r1, #0
8002e8e: 2001 movs r0, #1
8002e90: f001 fc9e bl 80047d0 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002e94: 2200 movs r2, #0
8002e96: 2100 movs r1, #0
8002e98: 2002 movs r0, #2
8002e9a: f001 fc99 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002e9e: 2200 movs r2, #0
8002ea0: 2100 movs r1, #0
8002ea2: 2003 movs r0, #3
8002ea4: f001 fc94 bl 80047d0 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002ea8: 2200 movs r2, #0
8002eaa: 2100 movs r1, #0
8002eac: 2004 movs r0, #4
8002eae: f001 fc8f bl 80047d0 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002eb2: 2200 movs r2, #0
8002eb4: 2101 movs r1, #1
8002eb6: 2001 movs r0, #1
8002eb8: f001 fc8a bl 80047d0 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002ebc: 2200 movs r2, #0
8002ebe: 2101 movs r1, #1
8002ec0: 2002 movs r0, #2
8002ec2: f001 fc85 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002ec6: 2200 movs r2, #0
8002ec8: 2101 movs r1, #1
8002eca: 2003 movs r0, #3
8002ecc: f001 fc80 bl 80047d0 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002ed0: 2200 movs r2, #0
8002ed2: 2101 movs r1, #1
8002ed4: 2004 movs r0, #4
8002ed6: f001 fc7b bl 80047d0 <SetMotPerc>
stBuz = bzoff;
8002eda: 4b3e ldr r3, [pc, #248] @ (8002fd4 <manageCiclo+0xd3c>)
8002edc: 2200 movs r2, #0
8002ede: 701a strb r2, [r3, #0]
if (rtCiclo >= 20)
8002ee0: 4b41 ldr r3, [pc, #260] @ (8002fe8 <manageCiclo+0xd50>)
8002ee2: 881b ldrh r3, [r3, #0]
8002ee4: b29b uxth r3, r3
8002ee6: 2b13 cmp r3, #19
8002ee8: d96b bls.n 8002fc2 <manageCiclo+0xd2a>
stCiclo = omchiuso;
8002eea: 4b3e ldr r3, [pc, #248] @ (8002fe4 <manageCiclo+0xd4c>)
8002eec: 2200 movs r2, #0
8002eee: 701a strb r2, [r3, #0]
break;
8002ef0: e067 b.n 8002fc2 <manageCiclo+0xd2a>
case omstopchiusura:
SetMotPerc(M1, FW, 0);
8002ef2: 2200 movs r2, #0
8002ef4: 2100 movs r1, #0
8002ef6: 2001 movs r0, #1
8002ef8: f001 fc6a bl 80047d0 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002efc: 2200 movs r2, #0
8002efe: 2100 movs r1, #0
8002f00: 2002 movs r0, #2
8002f02: f001 fc65 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002f06: 2200 movs r2, #0
8002f08: 2100 movs r1, #0
8002f0a: 2003 movs r0, #3
8002f0c: f001 fc60 bl 80047d0 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002f10: 2200 movs r2, #0
8002f12: 2100 movs r1, #0
8002f14: 2004 movs r0, #4
8002f16: f001 fc5b bl 80047d0 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002f1a: 2200 movs r2, #0
8002f1c: 2101 movs r1, #1
8002f1e: 2001 movs r0, #1
8002f20: f001 fc56 bl 80047d0 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002f24: 2200 movs r2, #0
8002f26: 2101 movs r1, #1
8002f28: 2002 movs r0, #2
8002f2a: f001 fc51 bl 80047d0 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002f2e: 2200 movs r2, #0
8002f30: 2101 movs r1, #1
8002f32: 2003 movs r0, #3
8002f34: f001 fc4c bl 80047d0 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002f38: 2200 movs r2, #0
8002f3a: 2101 movs r1, #1
8002f3c: 2004 movs r0, #4
8002f3e: f001 fc47 bl 80047d0 <SetMotPerc>
if (pulsanti == 0) {
8002f42: 4b2b ldr r3, [pc, #172] @ (8002ff0 <manageCiclo+0xd58>)
8002f44: 781b ldrb r3, [r3, #0]
8002f46: 2b00 cmp r3, #0
8002f48: d13d bne.n 8002fc6 <manageCiclo+0xd2e>
stBuz = bzoff;
8002f4a: 4b22 ldr r3, [pc, #136] @ (8002fd4 <manageCiclo+0xd3c>)
8002f4c: 2200 movs r2, #0
8002f4e: 701a strb r2, [r3, #0]
stCiclo = omaperto;
8002f50: 4b24 ldr r3, [pc, #144] @ (8002fe4 <manageCiclo+0xd4c>)
8002f52: 2216 movs r2, #22
8002f54: 701a strb r2, [r3, #0]
stPulsanti &= (~P1STOP);
8002f56: 4b1e ldr r3, [pc, #120] @ (8002fd0 <manageCiclo+0xd38>)
8002f58: 881b ldrh r3, [r3, #0]
8002f5a: f023 0302 bic.w r3, r3, #2
8002f5e: b29a uxth r2, r3
8002f60: 4b1b ldr r3, [pc, #108] @ (8002fd0 <manageCiclo+0xd38>)
8002f62: 801a strh r2, [r3, #0]
}
break;
8002f64: e02f b.n 8002fc6 <manageCiclo+0xd2e>
break;
8002f66: bf00 nop
8002f68: e02e b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f6a: bf00 nop
8002f6c: e02c b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f6e: bf00 nop
8002f70: e02a b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f72: bf00 nop
8002f74: e028 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f76: bf00 nop
8002f78: e026 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f7a: bf00 nop
8002f7c: e024 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f7e: bf00 nop
8002f80: e022 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f82: bf00 nop
8002f84: e020 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f86: bf00 nop
8002f88: e01e b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f8a: bf00 nop
8002f8c: e01c b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f8e: bf00 nop
8002f90: e01a b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f92: bf00 nop
8002f94: e018 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f96: bf00 nop
8002f98: e016 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f9a: bf00 nop
8002f9c: e014 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002f9e: bf00 nop
8002fa0: e012 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fa2: bf00 nop
8002fa4: e010 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fa6: bf00 nop
8002fa8: e00e b.n 8002fc8 <manageCiclo+0xd30>
break;
8002faa: bf00 nop
8002fac: e00c b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fae: bf00 nop
8002fb0: e00a b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fb2: bf00 nop
8002fb4: e008 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fb6: bf00 nop
8002fb8: e006 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fba: bf00 nop
8002fbc: e004 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fbe: bf00 nop
8002fc0: e002 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fc2: bf00 nop
8002fc4: e000 b.n 8002fc8 <manageCiclo+0xd30>
break;
8002fc6: bf00 nop
}
}
8002fc8: bf00 nop
8002fca: 3708 adds r7, #8
8002fcc: 46bd mov sp, r7
8002fce: bd80 pop {r7, pc}
8002fd0: 20000454 .word 0x20000454
8002fd4: 20000457 .word 0x20000457
8002fd8: 2000044c .word 0x2000044c
8002fdc: 20000424 .word 0x20000424
8002fe0: 2000041e .word 0x2000041e
8002fe4: 20000456 .word 0x20000456
8002fe8: 200003fc .word 0x200003fc
8002fec: 20000459 .word 0x20000459
8002ff0: 200003f0 .word 0x200003f0
08002ff4 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void) {
8002ff4: b580 push {r7, lr}
8002ff6: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8002ff8: f002 f84e bl 8005098 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8002ffc: f000 f856 bl 80030ac <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8003000: f000 fab8 bl 8003574 <MX_GPIO_Init>
MX_DMA_Init();
8003004: f000 fa98 bl 8003538 <MX_DMA_Init>
MX_USB_DEVICE_Init();
8003008: f00a fce6 bl 800d9d8 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
800300c: f000 f924 bl 8003258 <MX_TIM2_Init>
MX_TIM4_Init();
8003010: f000 f9c6 bl 80033a0 <MX_TIM4_Init>
MX_ADC1_Init();
8003014: f000 f8a8 bl 8003168 <MX_ADC1_Init>
MX_USART1_UART_Init();
8003018: f000 fa64 bl 80034e4 <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_ADC_Start_DMA(&hadc1, (uint32_t*) adc_dma_buf, ADC_NUM_CHANNELS);
800301c: 2205 movs r2, #5
800301e: 491e ldr r1, [pc, #120] @ (8003098 <main+0xa4>)
8003020: 481e ldr r0, [pc, #120] @ (800309c <main+0xa8>)
8003022: f002 f973 bl 800530c <HAL_ADC_Start_DMA>
StopMot(timMot1, FWMot1);
8003026: 2100 movs r1, #0
8003028: 481d ldr r0, [pc, #116] @ (80030a0 <main+0xac>)
800302a: f001 f9fe bl 800442a <StopMot>
StopMot(timMot1, BWMot1);
800302e: 2104 movs r1, #4
8003030: 481b ldr r0, [pc, #108] @ (80030a0 <main+0xac>)
8003032: f001 f9fa bl 800442a <StopMot>
StopMot(timMot2, FWMot2);
8003036: 2108 movs r1, #8
8003038: 4819 ldr r0, [pc, #100] @ (80030a0 <main+0xac>)
800303a: f001 f9f6 bl 800442a <StopMot>
StopMot(timMot2, BWMot2);
800303e: 210c movs r1, #12
8003040: 4817 ldr r0, [pc, #92] @ (80030a0 <main+0xac>)
8003042: f001 f9f2 bl 800442a <StopMot>
StopMot(timMot3, FWMot3);
8003046: 2100 movs r1, #0
8003048: 4816 ldr r0, [pc, #88] @ (80030a4 <main+0xb0>)
800304a: f001 f9ee bl 800442a <StopMot>
StopMot(timMot3, BWMot3);
800304e: 2104 movs r1, #4
8003050: 4814 ldr r0, [pc, #80] @ (80030a4 <main+0xb0>)
8003052: f001 f9ea bl 800442a <StopMot>
StopMot(timMot4, FWMot4);
8003056: 2108 movs r1, #8
8003058: 4812 ldr r0, [pc, #72] @ (80030a4 <main+0xb0>)
800305a: f001 f9e6 bl 800442a <StopMot>
StopMot(timMot4, BWMot4);
800305e: 210c movs r1, #12
8003060: 4810 ldr r0, [pc, #64] @ (80030a4 <main+0xb0>)
8003062: f001 f9e2 bl 800442a <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
//while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
if (EE_Init() != EE_OK) {
8003066: f7fe fa9f bl 80015a8 <EE_Init>
800306a: 4603 mov r3, r0
800306c: 2b00 cmp r3, #0
800306e: d001 beq.n 8003074 <main+0x80>
for (;;)
8003070: bf00 nop
8003072: e7fd b.n 8003070 <main+0x7c>
; //errore eeprom
}
loadEE();
8003074: f7fe fb82 bl 800177c <loadEE>
// }
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
fchiuso = false;
8003078: 4b0b ldr r3, [pc, #44] @ (80030a8 <main+0xb4>)
800307a: 2200 movs r2, #0
800307c: 701a strb r2, [r3, #0]
while (1) {
manageCDC();
800307e: f7fd f9bd bl 80003fc <manageCDC>
manageAdc();
8003082: f7fd f86b bl 800015c <manageAdc>
managePulsanti();
8003086: f7fe ff9b bl 8001fc0 <managePulsanti>
manageCiclo();
800308a: f7ff f905 bl 8002298 <manageCiclo>
debug();
800308e: f7fe f891 bl 80011b4 <debug>
manageCDC();
8003092: bf00 nop
8003094: e7f3 b.n 800307e <main+0x8a>
8003096: bf00 nop
8003098: 200001fc .word 0x200001fc
800309c: 200002a4 .word 0x200002a4
80030a0: 20000318 .word 0x20000318
80030a4: 20000360 .word 0x20000360
80030a8: 20000459 .word 0x20000459
080030ac <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void) {
80030ac: b580 push {r7, lr}
80030ae: b094 sub sp, #80 @ 0x50
80030b0: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
80030b2: f107 0328 add.w r3, r7, #40 @ 0x28
80030b6: 2228 movs r2, #40 @ 0x28
80030b8: 2100 movs r1, #0
80030ba: 4618 mov r0, r3
80030bc: f00b f9c8 bl 800e450 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
80030c0: f107 0314 add.w r3, r7, #20
80030c4: 2200 movs r2, #0
80030c6: 601a str r2, [r3, #0]
80030c8: 605a str r2, [r3, #4]
80030ca: 609a str r2, [r3, #8]
80030cc: 60da str r2, [r3, #12]
80030ce: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = { 0 };
80030d0: 1d3b adds r3, r7, #4
80030d2: 2200 movs r2, #0
80030d4: 601a str r2, [r3, #0]
80030d6: 605a str r2, [r3, #4]
80030d8: 609a str r2, [r3, #8]
80030da: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
80030dc: 2301 movs r3, #1
80030de: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
80030e0: f44f 3380 mov.w r3, #65536 @ 0x10000
80030e4: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
80030e6: 2300 movs r3, #0
80030e8: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
80030ea: 2301 movs r3, #1
80030ec: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
80030ee: 2302 movs r3, #2
80030f0: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
80030f2: f44f 3380 mov.w r3, #65536 @ 0x10000
80030f6: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
80030f8: f44f 1380 mov.w r3, #1048576 @ 0x100000
80030fc: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
80030fe: f107 0328 add.w r3, r7, #40 @ 0x28
8003102: 4618 mov r0, r3
8003104: f005 f80c bl 8008120 <HAL_RCC_OscConfig>
8003108: 4603 mov r3, r0
800310a: 2b00 cmp r3, #0
800310c: d001 beq.n 8003112 <SystemClock_Config+0x66>
Error_Handler();
800310e: f000 fadb bl 80036c8 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
8003112: 230f movs r3, #15
8003114: 617b str r3, [r7, #20]
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8003116: 2302 movs r3, #2
8003118: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
800311a: 2300 movs r3, #0
800311c: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
800311e: f44f 6380 mov.w r3, #1024 @ 0x400
8003122: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8003124: 2300 movs r3, #0
8003126: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
8003128: f107 0314 add.w r3, r7, #20
800312c: 2102 movs r1, #2
800312e: 4618 mov r0, r3
8003130: f005 fa78 bl 8008624 <HAL_RCC_ClockConfig>
8003134: 4603 mov r3, r0
8003136: 2b00 cmp r3, #0
8003138: d001 beq.n 800313e <SystemClock_Config+0x92>
Error_Handler();
800313a: f000 fac5 bl 80036c8 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
800313e: 2312 movs r3, #18
8003140: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
8003142: f44f 4300 mov.w r3, #32768 @ 0x8000
8003146: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
8003148: 2300 movs r3, #0
800314a: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
800314c: 1d3b adds r3, r7, #4
800314e: 4618 mov r0, r3
8003150: f005 fbf8 bl 8008944 <HAL_RCCEx_PeriphCLKConfig>
8003154: 4603 mov r3, r0
8003156: 2b00 cmp r3, #0
8003158: d001 beq.n 800315e <SystemClock_Config+0xb2>
Error_Handler();
800315a: f000 fab5 bl 80036c8 <Error_Handler>
}
}
800315e: bf00 nop
8003160: 3750 adds r7, #80 @ 0x50
8003162: 46bd mov sp, r7
8003164: bd80 pop {r7, pc}
...
08003168 <MX_ADC1_Init>:
/**
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void) {
8003168: b580 push {r7, lr}
800316a: b084 sub sp, #16
800316c: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = { 0 };
800316e: 1d3b adds r3, r7, #4
8003170: 2200 movs r2, #0
8003172: 601a str r2, [r3, #0]
8003174: 605a str r2, [r3, #4]
8003176: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
8003178: 4b35 ldr r3, [pc, #212] @ (8003250 <MX_ADC1_Init+0xe8>)
800317a: 4a36 ldr r2, [pc, #216] @ (8003254 <MX_ADC1_Init+0xec>)
800317c: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
800317e: 4b34 ldr r3, [pc, #208] @ (8003250 <MX_ADC1_Init+0xe8>)
8003180: f44f 7280 mov.w r2, #256 @ 0x100
8003184: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = ENABLE;
8003186: 4b32 ldr r3, [pc, #200] @ (8003250 <MX_ADC1_Init+0xe8>)
8003188: 2201 movs r2, #1
800318a: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
800318c: 4b30 ldr r3, [pc, #192] @ (8003250 <MX_ADC1_Init+0xe8>)
800318e: 2200 movs r2, #0
8003190: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8003192: 4b2f ldr r3, [pc, #188] @ (8003250 <MX_ADC1_Init+0xe8>)
8003194: f44f 2260 mov.w r2, #917504 @ 0xe0000
8003198: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
800319a: 4b2d ldr r3, [pc, #180] @ (8003250 <MX_ADC1_Init+0xe8>)
800319c: 2200 movs r2, #0
800319e: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 5;
80031a0: 4b2b ldr r3, [pc, #172] @ (8003250 <MX_ADC1_Init+0xe8>)
80031a2: 2205 movs r2, #5
80031a4: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK) {
80031a6: 482a ldr r0, [pc, #168] @ (8003250 <MX_ADC1_Init+0xe8>)
80031a8: f001 ffd8 bl 800515c <HAL_ADC_Init>
80031ac: 4603 mov r3, r0
80031ae: 2b00 cmp r3, #0
80031b0: d001 beq.n 80031b6 <MX_ADC1_Init+0x4e>
Error_Handler();
80031b2: f000 fa89 bl 80036c8 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
80031b6: 2304 movs r3, #4
80031b8: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
80031ba: 2301 movs r3, #1
80031bc: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5;
80031be: 2303 movs r3, #3
80031c0: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
80031c2: 1d3b adds r3, r7, #4
80031c4: 4619 mov r1, r3
80031c6: 4822 ldr r0, [pc, #136] @ (8003250 <MX_ADC1_Init+0xe8>)
80031c8: f002 f99a bl 8005500 <HAL_ADC_ConfigChannel>
80031cc: 4603 mov r3, r0
80031ce: 2b00 cmp r3, #0
80031d0: d001 beq.n 80031d6 <MX_ADC1_Init+0x6e>
Error_Handler();
80031d2: f000 fa79 bl 80036c8 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_5;
80031d6: 2305 movs r3, #5
80031d8: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_2;
80031da: 2302 movs r3, #2
80031dc: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
80031de: 1d3b adds r3, r7, #4
80031e0: 4619 mov r1, r3
80031e2: 481b ldr r0, [pc, #108] @ (8003250 <MX_ADC1_Init+0xe8>)
80031e4: f002 f98c bl 8005500 <HAL_ADC_ConfigChannel>
80031e8: 4603 mov r3, r0
80031ea: 2b00 cmp r3, #0
80031ec: d001 beq.n 80031f2 <MX_ADC1_Init+0x8a>
Error_Handler();
80031ee: f000 fa6b bl 80036c8 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
80031f2: 2306 movs r3, #6
80031f4: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_3;
80031f6: 2303 movs r3, #3
80031f8: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
80031fa: 1d3b adds r3, r7, #4
80031fc: 4619 mov r1, r3
80031fe: 4814 ldr r0, [pc, #80] @ (8003250 <MX_ADC1_Init+0xe8>)
8003200: f002 f97e bl 8005500 <HAL_ADC_ConfigChannel>
8003204: 4603 mov r3, r0
8003206: 2b00 cmp r3, #0
8003208: d001 beq.n 800320e <MX_ADC1_Init+0xa6>
Error_Handler();
800320a: f000 fa5d bl 80036c8 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_7;
800320e: 2307 movs r3, #7
8003210: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_4;
8003212: 2304 movs r3, #4
8003214: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
8003216: 1d3b adds r3, r7, #4
8003218: 4619 mov r1, r3
800321a: 480d ldr r0, [pc, #52] @ (8003250 <MX_ADC1_Init+0xe8>)
800321c: f002 f970 bl 8005500 <HAL_ADC_ConfigChannel>
8003220: 4603 mov r3, r0
8003222: 2b00 cmp r3, #0
8003224: d001 beq.n 800322a <MX_ADC1_Init+0xc2>
Error_Handler();
8003226: f000 fa4f bl 80036c8 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
800322a: 2308 movs r3, #8
800322c: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_5;
800322e: 2305 movs r3, #5
8003230: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
8003232: 1d3b adds r3, r7, #4
8003234: 4619 mov r1, r3
8003236: 4806 ldr r0, [pc, #24] @ (8003250 <MX_ADC1_Init+0xe8>)
8003238: f002 f962 bl 8005500 <HAL_ADC_ConfigChannel>
800323c: 4603 mov r3, r0
800323e: 2b00 cmp r3, #0
8003240: d001 beq.n 8003246 <MX_ADC1_Init+0xde>
Error_Handler();
8003242: f000 fa41 bl 80036c8 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8003246: bf00 nop
8003248: 3710 adds r7, #16
800324a: 46bd mov sp, r7
800324c: bd80 pop {r7, pc}
800324e: bf00 nop
8003250: 200002a4 .word 0x200002a4
8003254: 40012400 .word 0x40012400
08003258 <MX_TIM2_Init>:
/**
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void) {
8003258: b580 push {r7, lr}
800325a: b08e sub sp, #56 @ 0x38
800325c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
800325e: f107 0328 add.w r3, r7, #40 @ 0x28
8003262: 2200 movs r2, #0
8003264: 601a str r2, [r3, #0]
8003266: 605a str r2, [r3, #4]
8003268: 609a str r2, [r3, #8]
800326a: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = { 0 };
800326c: f107 0320 add.w r3, r7, #32
8003270: 2200 movs r2, #0
8003272: 601a str r2, [r3, #0]
8003274: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = { 0 };
8003276: 1d3b adds r3, r7, #4
8003278: 2200 movs r2, #0
800327a: 601a str r2, [r3, #0]
800327c: 605a str r2, [r3, #4]
800327e: 609a str r2, [r3, #8]
8003280: 60da str r2, [r3, #12]
8003282: 611a str r2, [r3, #16]
8003284: 615a str r2, [r3, #20]
8003286: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8003288: 4b44 ldr r3, [pc, #272] @ (800339c <MX_TIM2_Init+0x144>)
800328a: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
800328e: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8003290: 4b42 ldr r3, [pc, #264] @ (800339c <MX_TIM2_Init+0x144>)
8003292: 2200 movs r2, #0
8003294: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
8003296: 4b41 ldr r3, [pc, #260] @ (800339c <MX_TIM2_Init+0x144>)
8003298: 2200 movs r2, #0
800329a: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
800329c: 4b3f ldr r3, [pc, #252] @ (800339c <MX_TIM2_Init+0x144>)
800329e: f244 624f movw r2, #17999 @ 0x464f
80032a2: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80032a4: 4b3d ldr r3, [pc, #244] @ (800339c <MX_TIM2_Init+0x144>)
80032a6: 2200 movs r2, #0
80032a8: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80032aa: 4b3c ldr r3, [pc, #240] @ (800339c <MX_TIM2_Init+0x144>)
80032ac: 2200 movs r2, #0
80032ae: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK) {
80032b0: 483a ldr r0, [pc, #232] @ (800339c <MX_TIM2_Init+0x144>)
80032b2: f005 fbfd bl 8008ab0 <HAL_TIM_Base_Init>
80032b6: 4603 mov r3, r0
80032b8: 2b00 cmp r3, #0
80032ba: d001 beq.n 80032c0 <MX_TIM2_Init+0x68>
Error_Handler();
80032bc: f000 fa04 bl 80036c8 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80032c0: f44f 5380 mov.w r3, #4096 @ 0x1000
80032c4: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) {
80032c6: f107 0328 add.w r3, r7, #40 @ 0x28
80032ca: 4619 mov r1, r3
80032cc: 4833 ldr r0, [pc, #204] @ (800339c <MX_TIM2_Init+0x144>)
80032ce: f005 fe5f bl 8008f90 <HAL_TIM_ConfigClockSource>
80032d2: 4603 mov r3, r0
80032d4: 2b00 cmp r3, #0
80032d6: d001 beq.n 80032dc <MX_TIM2_Init+0x84>
Error_Handler();
80032d8: f000 f9f6 bl 80036c8 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) {
80032dc: 482f ldr r0, [pc, #188] @ (800339c <MX_TIM2_Init+0x144>)
80032de: f005 fc36 bl 8008b4e <HAL_TIM_PWM_Init>
80032e2: 4603 mov r3, r0
80032e4: 2b00 cmp r3, #0
80032e6: d001 beq.n 80032ec <MX_TIM2_Init+0x94>
Error_Handler();
80032e8: f000 f9ee bl 80036c8 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80032ec: 2300 movs r3, #0
80032ee: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80032f0: 2300 movs r3, #0
80032f2: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig)
80032f4: f107 0320 add.w r3, r7, #32
80032f8: 4619 mov r1, r3
80032fa: 4828 ldr r0, [pc, #160] @ (800339c <MX_TIM2_Init+0x144>)
80032fc: f006 f9e8 bl 80096d0 <HAL_TIMEx_MasterConfigSynchronization>
8003300: 4603 mov r3, r0
8003302: 2b00 cmp r3, #0
8003304: d001 beq.n 800330a <MX_TIM2_Init+0xb2>
!= HAL_OK) {
Error_Handler();
8003306: f000 f9df bl 80036c8 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
800330a: 2360 movs r3, #96 @ 0x60
800330c: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
800330e: f44f 737a mov.w r3, #1000 @ 0x3e8
8003312: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8003314: 2300 movs r3, #0
8003316: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8003318: 2304 movs r3, #4
800331a: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1)
800331c: 1d3b adds r3, r7, #4
800331e: 2200 movs r2, #0
8003320: 4619 mov r1, r3
8003322: 481e ldr r0, [pc, #120] @ (800339c <MX_TIM2_Init+0x144>)
8003324: f005 fd72 bl 8008e0c <HAL_TIM_PWM_ConfigChannel>
8003328: 4603 mov r3, r0
800332a: 2b00 cmp r3, #0
800332c: d001 beq.n 8003332 <MX_TIM2_Init+0xda>
!= HAL_OK) {
Error_Handler();
800332e: f000 f9cb bl 80036c8 <Error_Handler>
}
sConfigOC.Pulse = 2000;
8003332: f44f 63fa mov.w r3, #2000 @ 0x7d0
8003336: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2)
8003338: 1d3b adds r3, r7, #4
800333a: 2204 movs r2, #4
800333c: 4619 mov r1, r3
800333e: 4817 ldr r0, [pc, #92] @ (800339c <MX_TIM2_Init+0x144>)
8003340: f005 fd64 bl 8008e0c <HAL_TIM_PWM_ConfigChannel>
8003344: 4603 mov r3, r0
8003346: 2b00 cmp r3, #0
8003348: d001 beq.n 800334e <MX_TIM2_Init+0xf6>
!= HAL_OK) {
Error_Handler();
800334a: f000 f9bd bl 80036c8 <Error_Handler>
}
sConfigOC.Pulse = 3000;
800334e: f640 33b8 movw r3, #3000 @ 0xbb8
8003352: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
8003354: 2300 movs r3, #0
8003356: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3)
8003358: 1d3b adds r3, r7, #4
800335a: 2208 movs r2, #8
800335c: 4619 mov r1, r3
800335e: 480f ldr r0, [pc, #60] @ (800339c <MX_TIM2_Init+0x144>)
8003360: f005 fd54 bl 8008e0c <HAL_TIM_PWM_ConfigChannel>
8003364: 4603 mov r3, r0
8003366: 2b00 cmp r3, #0
8003368: d001 beq.n 800336e <MX_TIM2_Init+0x116>
!= HAL_OK) {
Error_Handler();
800336a: f000 f9ad bl 80036c8 <Error_Handler>
}
sConfigOC.Pulse = 4000;
800336e: f44f 637a mov.w r3, #4000 @ 0xfa0
8003372: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8003374: 2304 movs r3, #4
8003376: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4)
8003378: 1d3b adds r3, r7, #4
800337a: 220c movs r2, #12
800337c: 4619 mov r1, r3
800337e: 4807 ldr r0, [pc, #28] @ (800339c <MX_TIM2_Init+0x144>)
8003380: f005 fd44 bl 8008e0c <HAL_TIM_PWM_ConfigChannel>
8003384: 4603 mov r3, r0
8003386: 2b00 cmp r3, #0
8003388: d001 beq.n 800338e <MX_TIM2_Init+0x136>
!= HAL_OK) {
Error_Handler();
800338a: f000 f99d bl 80036c8 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
800338e: 4803 ldr r0, [pc, #12] @ (800339c <MX_TIM2_Init+0x144>)
8003390: f001 fd3e bl 8004e10 <HAL_TIM_MspPostInit>
}
8003394: bf00 nop
8003396: 3738 adds r7, #56 @ 0x38
8003398: 46bd mov sp, r7
800339a: bd80 pop {r7, pc}
800339c: 20000318 .word 0x20000318
080033a0 <MX_TIM4_Init>:
/**
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void) {
80033a0: b580 push {r7, lr}
80033a2: b08e sub sp, #56 @ 0x38
80033a4: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
80033a6: f107 0328 add.w r3, r7, #40 @ 0x28
80033aa: 2200 movs r2, #0
80033ac: 601a str r2, [r3, #0]
80033ae: 605a str r2, [r3, #4]
80033b0: 609a str r2, [r3, #8]
80033b2: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = { 0 };
80033b4: f107 0320 add.w r3, r7, #32
80033b8: 2200 movs r2, #0
80033ba: 601a str r2, [r3, #0]
80033bc: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = { 0 };
80033be: 1d3b adds r3, r7, #4
80033c0: 2200 movs r2, #0
80033c2: 601a str r2, [r3, #0]
80033c4: 605a str r2, [r3, #4]
80033c6: 609a str r2, [r3, #8]
80033c8: 60da str r2, [r3, #12]
80033ca: 611a str r2, [r3, #16]
80033cc: 615a str r2, [r3, #20]
80033ce: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
80033d0: 4b42 ldr r3, [pc, #264] @ (80034dc <MX_TIM4_Init+0x13c>)
80033d2: 4a43 ldr r2, [pc, #268] @ (80034e0 <MX_TIM4_Init+0x140>)
80033d4: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
80033d6: 4b41 ldr r3, [pc, #260] @ (80034dc <MX_TIM4_Init+0x13c>)
80033d8: 2200 movs r2, #0
80033da: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
80033dc: 4b3f ldr r3, [pc, #252] @ (80034dc <MX_TIM4_Init+0x13c>)
80033de: 2200 movs r2, #0
80033e0: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
80033e2: 4b3e ldr r3, [pc, #248] @ (80034dc <MX_TIM4_Init+0x13c>)
80033e4: f244 624f movw r2, #17999 @ 0x464f
80033e8: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80033ea: 4b3c ldr r3, [pc, #240] @ (80034dc <MX_TIM4_Init+0x13c>)
80033ec: 2200 movs r2, #0
80033ee: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80033f0: 4b3a ldr r3, [pc, #232] @ (80034dc <MX_TIM4_Init+0x13c>)
80033f2: 2200 movs r2, #0
80033f4: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK) {
80033f6: 4839 ldr r0, [pc, #228] @ (80034dc <MX_TIM4_Init+0x13c>)
80033f8: f005 fb5a bl 8008ab0 <HAL_TIM_Base_Init>
80033fc: 4603 mov r3, r0
80033fe: 2b00 cmp r3, #0
8003400: d001 beq.n 8003406 <MX_TIM4_Init+0x66>
Error_Handler();
8003402: f000 f961 bl 80036c8 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8003406: f44f 5380 mov.w r3, #4096 @ 0x1000
800340a: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) {
800340c: f107 0328 add.w r3, r7, #40 @ 0x28
8003410: 4619 mov r1, r3
8003412: 4832 ldr r0, [pc, #200] @ (80034dc <MX_TIM4_Init+0x13c>)
8003414: f005 fdbc bl 8008f90 <HAL_TIM_ConfigClockSource>
8003418: 4603 mov r3, r0
800341a: 2b00 cmp r3, #0
800341c: d001 beq.n 8003422 <MX_TIM4_Init+0x82>
Error_Handler();
800341e: f000 f953 bl 80036c8 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) {
8003422: 482e ldr r0, [pc, #184] @ (80034dc <MX_TIM4_Init+0x13c>)
8003424: f005 fb93 bl 8008b4e <HAL_TIM_PWM_Init>
8003428: 4603 mov r3, r0
800342a: 2b00 cmp r3, #0
800342c: d001 beq.n 8003432 <MX_TIM4_Init+0x92>
Error_Handler();
800342e: f000 f94b bl 80036c8 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8003432: 2300 movs r3, #0
8003434: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8003436: 2300 movs r3, #0
8003438: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig)
800343a: f107 0320 add.w r3, r7, #32
800343e: 4619 mov r1, r3
8003440: 4826 ldr r0, [pc, #152] @ (80034dc <MX_TIM4_Init+0x13c>)
8003442: f006 f945 bl 80096d0 <HAL_TIMEx_MasterConfigSynchronization>
8003446: 4603 mov r3, r0
8003448: 2b00 cmp r3, #0
800344a: d001 beq.n 8003450 <MX_TIM4_Init+0xb0>
!= HAL_OK) {
Error_Handler();
800344c: f000 f93c bl 80036c8 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8003450: 2360 movs r3, #96 @ 0x60
8003452: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
8003454: f241 3388 movw r3, #5000 @ 0x1388
8003458: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
800345a: 2300 movs r3, #0
800345c: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800345e: 2304 movs r3, #4
8003460: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1)
8003462: 1d3b adds r3, r7, #4
8003464: 2200 movs r2, #0
8003466: 4619 mov r1, r3
8003468: 481c ldr r0, [pc, #112] @ (80034dc <MX_TIM4_Init+0x13c>)
800346a: f005 fccf bl 8008e0c <HAL_TIM_PWM_ConfigChannel>
800346e: 4603 mov r3, r0
8003470: 2b00 cmp r3, #0
8003472: d001 beq.n 8003478 <MX_TIM4_Init+0xd8>
!= HAL_OK) {
Error_Handler();
8003474: f000 f928 bl 80036c8 <Error_Handler>
}
sConfigOC.Pulse = 6000;
8003478: f241 7370 movw r3, #6000 @ 0x1770
800347c: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2)
800347e: 1d3b adds r3, r7, #4
8003480: 2204 movs r2, #4
8003482: 4619 mov r1, r3
8003484: 4815 ldr r0, [pc, #84] @ (80034dc <MX_TIM4_Init+0x13c>)
8003486: f005 fcc1 bl 8008e0c <HAL_TIM_PWM_ConfigChannel>
800348a: 4603 mov r3, r0
800348c: 2b00 cmp r3, #0
800348e: d001 beq.n 8003494 <MX_TIM4_Init+0xf4>
!= HAL_OK) {
Error_Handler();
8003490: f000 f91a bl 80036c8 <Error_Handler>
}
sConfigOC.Pulse = 7000;
8003494: f641 3358 movw r3, #7000 @ 0x1b58
8003498: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3)
800349a: 1d3b adds r3, r7, #4
800349c: 2208 movs r2, #8
800349e: 4619 mov r1, r3
80034a0: 480e ldr r0, [pc, #56] @ (80034dc <MX_TIM4_Init+0x13c>)
80034a2: f005 fcb3 bl 8008e0c <HAL_TIM_PWM_ConfigChannel>
80034a6: 4603 mov r3, r0
80034a8: 2b00 cmp r3, #0
80034aa: d001 beq.n 80034b0 <MX_TIM4_Init+0x110>
!= HAL_OK) {
Error_Handler();
80034ac: f000 f90c bl 80036c8 <Error_Handler>
}
sConfigOC.Pulse = 8000;
80034b0: f44f 53fa mov.w r3, #8000 @ 0x1f40
80034b4: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4)
80034b6: 1d3b adds r3, r7, #4
80034b8: 220c movs r2, #12
80034ba: 4619 mov r1, r3
80034bc: 4807 ldr r0, [pc, #28] @ (80034dc <MX_TIM4_Init+0x13c>)
80034be: f005 fca5 bl 8008e0c <HAL_TIM_PWM_ConfigChannel>
80034c2: 4603 mov r3, r0
80034c4: 2b00 cmp r3, #0
80034c6: d001 beq.n 80034cc <MX_TIM4_Init+0x12c>
!= HAL_OK) {
Error_Handler();
80034c8: f000 f8fe bl 80036c8 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
80034cc: 4803 ldr r0, [pc, #12] @ (80034dc <MX_TIM4_Init+0x13c>)
80034ce: f001 fc9f bl 8004e10 <HAL_TIM_MspPostInit>
}
80034d2: bf00 nop
80034d4: 3738 adds r7, #56 @ 0x38
80034d6: 46bd mov sp, r7
80034d8: bd80 pop {r7, pc}
80034da: bf00 nop
80034dc: 20000360 .word 0x20000360
80034e0: 40000800 .word 0x40000800
080034e4 <MX_USART1_UART_Init>:
/**
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void) {
80034e4: b580 push {r7, lr}
80034e6: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
80034e8: 4b11 ldr r3, [pc, #68] @ (8003530 <MX_USART1_UART_Init+0x4c>)
80034ea: 4a12 ldr r2, [pc, #72] @ (8003534 <MX_USART1_UART_Init+0x50>)
80034ec: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
80034ee: 4b10 ldr r3, [pc, #64] @ (8003530 <MX_USART1_UART_Init+0x4c>)
80034f0: f44f 32e1 mov.w r2, #115200 @ 0x1c200
80034f4: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
80034f6: 4b0e ldr r3, [pc, #56] @ (8003530 <MX_USART1_UART_Init+0x4c>)
80034f8: 2200 movs r2, #0
80034fa: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
80034fc: 4b0c ldr r3, [pc, #48] @ (8003530 <MX_USART1_UART_Init+0x4c>)
80034fe: 2200 movs r2, #0
8003500: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
8003502: 4b0b ldr r3, [pc, #44] @ (8003530 <MX_USART1_UART_Init+0x4c>)
8003504: 2200 movs r2, #0
8003506: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8003508: 4b09 ldr r3, [pc, #36] @ (8003530 <MX_USART1_UART_Init+0x4c>)
800350a: 220c movs r2, #12
800350c: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
800350e: 4b08 ldr r3, [pc, #32] @ (8003530 <MX_USART1_UART_Init+0x4c>)
8003510: 2200 movs r2, #0
8003512: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8003514: 4b06 ldr r3, [pc, #24] @ (8003530 <MX_USART1_UART_Init+0x4c>)
8003516: 2200 movs r2, #0
8003518: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK) {
800351a: 4805 ldr r0, [pc, #20] @ (8003530 <MX_USART1_UART_Init+0x4c>)
800351c: f006 f936 bl 800978c <HAL_UART_Init>
8003520: 4603 mov r3, r0
8003522: 2b00 cmp r3, #0
8003524: d001 beq.n 800352a <MX_USART1_UART_Init+0x46>
Error_Handler();
8003526: f000 f8cf bl 80036c8 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
800352a: bf00 nop
800352c: bd80 pop {r7, pc}
800352e: bf00 nop
8003530: 200003a8 .word 0x200003a8
8003534: 40013800 .word 0x40013800
08003538 <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void) {
8003538: b580 push {r7, lr}
800353a: b082 sub sp, #8
800353c: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
800353e: 4b0c ldr r3, [pc, #48] @ (8003570 <MX_DMA_Init+0x38>)
8003540: 695b ldr r3, [r3, #20]
8003542: 4a0b ldr r2, [pc, #44] @ (8003570 <MX_DMA_Init+0x38>)
8003544: f043 0301 orr.w r3, r3, #1
8003548: 6153 str r3, [r2, #20]
800354a: 4b09 ldr r3, [pc, #36] @ (8003570 <MX_DMA_Init+0x38>)
800354c: 695b ldr r3, [r3, #20]
800354e: f003 0301 and.w r3, r3, #1
8003552: 607b str r3, [r7, #4]
8003554: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
8003556: 2200 movs r2, #0
8003558: 2100 movs r1, #0
800355a: 200b movs r0, #11
800355c: f002 faa1 bl 8005aa2 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
8003560: 200b movs r0, #11
8003562: f002 faba bl 8005ada <HAL_NVIC_EnableIRQ>
}
8003566: bf00 nop
8003568: 3708 adds r7, #8
800356a: 46bd mov sp, r7
800356c: bd80 pop {r7, pc}
800356e: bf00 nop
8003570: 40021000 .word 0x40021000
08003574 <MX_GPIO_Init>:
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void) {
8003574: b580 push {r7, lr}
8003576: b088 sub sp, #32
8003578: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = { 0 };
800357a: f107 0310 add.w r3, r7, #16
800357e: 2200 movs r2, #0
8003580: 601a str r2, [r3, #0]
8003582: 605a str r2, [r3, #4]
8003584: 609a str r2, [r3, #8]
8003586: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8003588: 4b4b ldr r3, [pc, #300] @ (80036b8 <MX_GPIO_Init+0x144>)
800358a: 699b ldr r3, [r3, #24]
800358c: 4a4a ldr r2, [pc, #296] @ (80036b8 <MX_GPIO_Init+0x144>)
800358e: f043 0310 orr.w r3, r3, #16
8003592: 6193 str r3, [r2, #24]
8003594: 4b48 ldr r3, [pc, #288] @ (80036b8 <MX_GPIO_Init+0x144>)
8003596: 699b ldr r3, [r3, #24]
8003598: f003 0310 and.w r3, r3, #16
800359c: 60fb str r3, [r7, #12]
800359e: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
80035a0: 4b45 ldr r3, [pc, #276] @ (80036b8 <MX_GPIO_Init+0x144>)
80035a2: 699b ldr r3, [r3, #24]
80035a4: 4a44 ldr r2, [pc, #272] @ (80036b8 <MX_GPIO_Init+0x144>)
80035a6: f043 0320 orr.w r3, r3, #32
80035aa: 6193 str r3, [r2, #24]
80035ac: 4b42 ldr r3, [pc, #264] @ (80036b8 <MX_GPIO_Init+0x144>)
80035ae: 699b ldr r3, [r3, #24]
80035b0: f003 0320 and.w r3, r3, #32
80035b4: 60bb str r3, [r7, #8]
80035b6: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
80035b8: 4b3f ldr r3, [pc, #252] @ (80036b8 <MX_GPIO_Init+0x144>)
80035ba: 699b ldr r3, [r3, #24]
80035bc: 4a3e ldr r2, [pc, #248] @ (80036b8 <MX_GPIO_Init+0x144>)
80035be: f043 0304 orr.w r3, r3, #4
80035c2: 6193 str r3, [r2, #24]
80035c4: 4b3c ldr r3, [pc, #240] @ (80036b8 <MX_GPIO_Init+0x144>)
80035c6: 699b ldr r3, [r3, #24]
80035c8: f003 0304 and.w r3, r3, #4
80035cc: 607b str r3, [r7, #4]
80035ce: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
80035d0: 4b39 ldr r3, [pc, #228] @ (80036b8 <MX_GPIO_Init+0x144>)
80035d2: 699b ldr r3, [r3, #24]
80035d4: 4a38 ldr r2, [pc, #224] @ (80036b8 <MX_GPIO_Init+0x144>)
80035d6: f043 0308 orr.w r3, r3, #8
80035da: 6193 str r3, [r2, #24]
80035dc: 4b36 ldr r3, [pc, #216] @ (80036b8 <MX_GPIO_Init+0x144>)
80035de: 699b ldr r3, [r3, #24]
80035e0: f003 0308 and.w r3, r3, #8
80035e4: 603b str r3, [r7, #0]
80035e6: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
80035e8: 2200 movs r2, #0
80035ea: f44f 5100 mov.w r1, #8192 @ 0x2000
80035ee: 4833 ldr r0, [pc, #204] @ (80036bc <MX_GPIO_Init+0x148>)
80035f0: f003 f81d bl 800662e <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB,
80035f4: 2200 movs r2, #0
80035f6: f640 413e movw r1, #3134 @ 0xc3e
80035fa: 4831 ldr r0, [pc, #196] @ (80036c0 <MX_GPIO_Init+0x14c>)
80035fc: f003 f817 bl 800662e <HAL_GPIO_WritePin>
INH1_Pin | INH2_Pin | INH3_Pin | INH4_Pin | EXP1_Pin | EXP2_Pin
| EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin | LED1_Pin, GPIO_PIN_RESET);
8003600: 2200 movs r2, #0
8003602: f44f 4101 mov.w r1, #33024 @ 0x8100
8003606: 482f ldr r0, [pc, #188] @ (80036c4 <MX_GPIO_Init+0x150>)
8003608: f003 f811 bl 800662e <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
800360c: f44f 5300 mov.w r3, #8192 @ 0x2000
8003610: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8003612: 2301 movs r3, #1
8003614: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003616: 2300 movs r3, #0
8003618: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800361a: 2302 movs r3, #2
800361c: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
800361e: f107 0310 add.w r3, r7, #16
8003622: 4619 mov r1, r3
8003624: 4825 ldr r0, [pc, #148] @ (80036bc <MX_GPIO_Init+0x148>)
8003626: f002 fe67 bl 80062f8 <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin | P2_Pin;
800362a: f44f 4340 mov.w r3, #49152 @ 0xc000
800362e: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8003630: 2300 movs r3, #0
8003632: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003634: 2300 movs r3, #0
8003636: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8003638: f107 0310 add.w r3, r7, #16
800363c: 4619 mov r1, r3
800363e: 481f ldr r0, [pc, #124] @ (80036bc <MX_GPIO_Init+0x148>)
8003640: f002 fe5a bl 80062f8 <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
8003644: 2310 movs r3, #16
8003646: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8003648: 2303 movs r3, #3
800364a: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
800364c: f107 0310 add.w r3, r7, #16
8003650: 4619 mov r1, r3
8003652: 481c ldr r0, [pc, #112] @ (80036c4 <MX_GPIO_Init+0x150>)
8003654: f002 fe50 bl 80062f8 <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin | INH2_Pin | INH3_Pin | INH4_Pin | EXP1_Pin
8003658: f640 433e movw r3, #3134 @ 0xc3e
800365c: 613b str r3, [r7, #16]
| EXP2_Pin | EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800365e: 2301 movs r3, #1
8003660: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003662: 2300 movs r3, #0
8003664: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8003666: 2302 movs r3, #2
8003668: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
800366a: f107 0310 add.w r3, r7, #16
800366e: 4619 mov r1, r3
8003670: 4813 ldr r0, [pc, #76] @ (80036c0 <MX_GPIO_Init+0x14c>)
8003672: f002 fe41 bl 80062f8 <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin | CH2_Pin | CH3_Pin | CH4_Pin;
8003676: f44f 4370 mov.w r3, #61440 @ 0xf000
800367a: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
800367c: 2300 movs r3, #0
800367e: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003680: 2300 movs r3, #0
8003682: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8003684: f107 0310 add.w r3, r7, #16
8003688: 4619 mov r1, r3
800368a: 480d ldr r0, [pc, #52] @ (80036c0 <MX_GPIO_Init+0x14c>)
800368c: f002 fe34 bl 80062f8 <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin | LED1_Pin;
8003690: f44f 4301 mov.w r3, #33024 @ 0x8100
8003694: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8003696: 2301 movs r3, #1
8003698: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800369a: 2300 movs r3, #0
800369c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800369e: 2302 movs r3, #2
80036a0: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80036a2: f107 0310 add.w r3, r7, #16
80036a6: 4619 mov r1, r3
80036a8: 4806 ldr r0, [pc, #24] @ (80036c4 <MX_GPIO_Init+0x150>)
80036aa: f002 fe25 bl 80062f8 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
80036ae: bf00 nop
80036b0: 3720 adds r7, #32
80036b2: 46bd mov sp, r7
80036b4: bd80 pop {r7, pc}
80036b6: bf00 nop
80036b8: 40021000 .word 0x40021000
80036bc: 40011000 .word 0x40011000
80036c0: 40010c00 .word 0x40010c00
80036c4: 40010800 .word 0x40010800
080036c8 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void) {
80036c8: b480 push {r7}
80036ca: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
80036cc: b672 cpsid i
}
80036ce: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1) {
80036d0: bf00 nop
80036d2: e7fd b.n 80036d0 <Error_Handler+0x8>
080036d4 <m1ap>:
extern uint16_t mrampstart[4];
extern uint16_t tramp;
extern UART_HandleTypeDef huart1;
motMov_st m1ap(void){
80036d4: b580 push {r7, lr}
80036d6: b09c sub sp, #112 @ 0x70
80036d8: af02 add r7, sp, #8
static motMov_st m1st=motWaiting;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
80036da: 4b5d ldr r3, [pc, #372] @ (8003850 <m1ap+0x17c>)
80036dc: 781a ldrb r2, [r3, #0]
80036de: 4b5d ldr r3, [pc, #372] @ (8003854 <m1ap+0x180>)
80036e0: 781b ldrb r3, [r3, #0]
80036e2: 429a cmp r2, r3
80036e4: d017 beq.n 8003716 <m1ap+0x42>
memm1st=m1st;
80036e6: 4b5b ldr r3, [pc, #364] @ (8003854 <m1ap+0x180>)
80036e8: 781a ldrb r2, [r3, #0]
80036ea: 4b59 ldr r3, [pc, #356] @ (8003850 <m1ap+0x17c>)
80036ec: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ap=%d",m1st);
80036ee: 4b59 ldr r3, [pc, #356] @ (8003854 <m1ap+0x180>)
80036f0: 781b ldrb r3, [r3, #0]
80036f2: 461a mov r2, r3
80036f4: 1d3b adds r3, r7, #4
80036f6: 4958 ldr r1, [pc, #352] @ (8003858 <m1ap+0x184>)
80036f8: 4618 mov r0, r3
80036fa: f00a fe87 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80036fe: 1d3b adds r3, r7, #4
8003700: 4618 mov r0, r3
8003702: f7fc fd23 bl 800014c <strlen>
8003706: 4603 mov r3, r0
8003708: b29a uxth r2, r3
800370a: 1d39 adds r1, r7, #4
800370c: f04f 33ff mov.w r3, #4294967295
8003710: 4852 ldr r0, [pc, #328] @ (800385c <m1ap+0x188>)
8003712: f006 f88b bl 800982c <HAL_UART_Transmit>
}
if(rtCiclo<apM1start)m1st=motWaiting;
8003716: 4b52 ldr r3, [pc, #328] @ (8003860 <m1ap+0x18c>)
8003718: 881b ldrh r3, [r3, #0]
800371a: b29a uxth r2, r3
800371c: 4b51 ldr r3, [pc, #324] @ (8003864 <m1ap+0x190>)
800371e: 881b ldrh r3, [r3, #0]
8003720: 429a cmp r2, r3
8003722: d202 bcs.n 800372a <m1ap+0x56>
8003724: 4b4b ldr r3, [pc, #300] @ (8003854 <m1ap+0x180>)
8003726: 2200 movs r2, #0
8003728: 701a strb r2, [r3, #0]
switch(m1st){
800372a: 4b4a ldr r3, [pc, #296] @ (8003854 <m1ap+0x180>)
800372c: 781b ldrb r3, [r3, #0]
800372e: 2b03 cmp r3, #3
8003730: d876 bhi.n 8003820 <m1ap+0x14c>
8003732: a201 add r2, pc, #4 @ (adr r2, 8003738 <m1ap+0x64>)
8003734: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003738: 08003749 .word 0x08003749
800373c: 08003795 .word 0x08003795
8003740: 080037c5 .word 0x080037c5
8003744: 080037f7 .word 0x080037f7
case motWaiting:
SetMotPerc(M1,FW,0);
8003748: 2200 movs r2, #0
800374a: 2100 movs r1, #0
800374c: 2001 movs r0, #1
800374e: f001 f83f bl 80047d0 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003752: 2200 movs r2, #0
8003754: 2101 movs r1, #1
8003756: 2001 movs r0, #1
8003758: f001 f83a bl 80047d0 <SetMotPerc>
if(rtCiclo>=apM1start){
800375c: 4b40 ldr r3, [pc, #256] @ (8003860 <m1ap+0x18c>)
800375e: 881b ldrh r3, [r3, #0]
8003760: b29a uxth r2, r3
8003762: 4b40 ldr r3, [pc, #256] @ (8003864 <m1ap+0x190>)
8003764: 881b ldrh r3, [r3, #0]
8003766: 429a cmp r2, r3
8003768: d365 bcc.n 8003836 <m1ap+0x162>
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT);
800376a: 4b3f ldr r3, [pc, #252] @ (8003868 <m1ap+0x194>)
800376c: 881b ldrh r3, [r3, #0]
800376e: b2da uxtb r2, r3
8003770: 4b3e ldr r3, [pc, #248] @ (800386c <m1ap+0x198>)
8003772: 881b ldrh r3, [r3, #0]
8003774: b2d9 uxtb r1, r3
8003776: 4b3e ldr r3, [pc, #248] @ (8003870 <m1ap+0x19c>)
8003778: 881b ldrh r3, [r3, #0]
800377a: b2db uxtb r3, r3
800377c: 2000 movs r0, #0
800377e: 9001 str r0, [sp, #4]
8003780: 9300 str r3, [sp, #0]
8003782: 460b mov r3, r1
8003784: 2100 movs r1, #0
8003786: 2001 movs r0, #1
8003788: f001 f9a2 bl 8004ad0 <ramp>
m1st=motStartRamp;
800378c: 4b31 ldr r3, [pc, #196] @ (8003854 <m1ap+0x180>)
800378e: 2201 movs r2, #1
8003790: 701a strb r2, [r3, #0]
}
break;
8003792: e050 b.n 8003836 <m1ap+0x162>
case motStartRamp:
if(ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){
8003794: 4b34 ldr r3, [pc, #208] @ (8003868 <m1ap+0x194>)
8003796: 881b ldrh r3, [r3, #0]
8003798: b2da uxtb r2, r3
800379a: 4b34 ldr r3, [pc, #208] @ (800386c <m1ap+0x198>)
800379c: 881b ldrh r3, [r3, #0]
800379e: b2d9 uxtb r1, r3
80037a0: 4b33 ldr r3, [pc, #204] @ (8003870 <m1ap+0x19c>)
80037a2: 881b ldrh r3, [r3, #0]
80037a4: b2db uxtb r3, r3
80037a6: 200a movs r0, #10
80037a8: 9001 str r0, [sp, #4]
80037aa: 9300 str r3, [sp, #0]
80037ac: 460b mov r3, r1
80037ae: 2100 movs r1, #0
80037b0: 2001 movs r0, #1
80037b2: f001 f98d bl 8004ad0 <ramp>
80037b6: 4603 mov r3, r0
80037b8: 2b00 cmp r3, #0
80037ba: d13e bne.n 800383a <m1ap+0x166>
m1st=motWaitingTime;
80037bc: 4b25 ldr r3, [pc, #148] @ (8003854 <m1ap+0x180>)
80037be: 2202 movs r2, #2
80037c0: 701a strb r2, [r3, #0]
}
break;
80037c2: e03a b.n 800383a <m1ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM1stop){
80037c4: 4b26 ldr r3, [pc, #152] @ (8003860 <m1ap+0x18c>)
80037c6: 881b ldrh r3, [r3, #0]
80037c8: b29a uxth r2, r3
80037ca: 4b2a ldr r3, [pc, #168] @ (8003874 <m1ap+0x1a0>)
80037cc: 881b ldrh r3, [r3, #0]
80037ce: 429a cmp r2, r3
80037d0: d335 bcc.n 800383e <m1ap+0x16a>
(void)ramp(M1,FW,m1pwmap,0,tramp,RAMPINIT);
80037d2: 4b26 ldr r3, [pc, #152] @ (800386c <m1ap+0x198>)
80037d4: 881b ldrh r3, [r3, #0]
80037d6: b2da uxtb r2, r3
80037d8: 4b25 ldr r3, [pc, #148] @ (8003870 <m1ap+0x19c>)
80037da: 881b ldrh r3, [r3, #0]
80037dc: b2db uxtb r3, r3
80037de: 2100 movs r1, #0
80037e0: 9101 str r1, [sp, #4]
80037e2: 9300 str r3, [sp, #0]
80037e4: 2300 movs r3, #0
80037e6: 2100 movs r1, #0
80037e8: 2001 movs r0, #1
80037ea: f001 f971 bl 8004ad0 <ramp>
m1st=motStopRamp;
80037ee: 4b19 ldr r3, [pc, #100] @ (8003854 <m1ap+0x180>)
80037f0: 2203 movs r2, #3
80037f2: 701a strb r2, [r3, #0]
}
break;
80037f4: e023 b.n 800383e <m1ap+0x16a>
case motStopRamp:
if(ramp(M1,FW,m1pwmap,0,tramp,RAMPRUN)==DONE){
80037f6: 4b1d ldr r3, [pc, #116] @ (800386c <m1ap+0x198>)
80037f8: 881b ldrh r3, [r3, #0]
80037fa: b2da uxtb r2, r3
80037fc: 4b1c ldr r3, [pc, #112] @ (8003870 <m1ap+0x19c>)
80037fe: 881b ldrh r3, [r3, #0]
8003800: b2db uxtb r3, r3
8003802: 210a movs r1, #10
8003804: 9101 str r1, [sp, #4]
8003806: 9300 str r3, [sp, #0]
8003808: 2300 movs r3, #0
800380a: 2100 movs r1, #0
800380c: 2001 movs r0, #1
800380e: f001 f95f bl 8004ad0 <ramp>
8003812: 4603 mov r3, r0
8003814: 2b00 cmp r3, #0
8003816: d114 bne.n 8003842 <m1ap+0x16e>
m1st=motStop;
8003818: 4b0e ldr r3, [pc, #56] @ (8003854 <m1ap+0x180>)
800381a: 2204 movs r2, #4
800381c: 701a strb r2, [r3, #0]
}
break;
800381e: e010 b.n 8003842 <m1ap+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003820: 2200 movs r2, #0
8003822: 2100 movs r1, #0
8003824: 2001 movs r0, #1
8003826: f000 ffd3 bl 80047d0 <SetMotPerc>
SetMotPerc(M1,BW,0);
800382a: 2200 movs r2, #0
800382c: 2101 movs r1, #1
800382e: 2001 movs r0, #1
8003830: f000 ffce bl 80047d0 <SetMotPerc>
break;
8003834: e006 b.n 8003844 <m1ap+0x170>
break;
8003836: bf00 nop
8003838: e004 b.n 8003844 <m1ap+0x170>
break;
800383a: bf00 nop
800383c: e002 b.n 8003844 <m1ap+0x170>
break;
800383e: bf00 nop
8003840: e000 b.n 8003844 <m1ap+0x170>
break;
8003842: bf00 nop
}
return m1st;
8003844: 4b03 ldr r3, [pc, #12] @ (8003854 <m1ap+0x180>)
8003846: 781b ldrb r3, [r3, #0]
}
8003848: 4618 mov r0, r3
800384a: 3768 adds r7, #104 @ 0x68
800384c: 46bd mov sp, r7
800384e: bd80 pop {r7, pc}
8003850: 20000007 .word 0x20000007
8003854: 20000462 .word 0x20000462
8003858: 0800f368 .word 0x0800f368
800385c: 200003a8 .word 0x200003a8
8003860: 200003fc .word 0x200003fc
8003864: 20000428 .word 0x20000428
8003868: 2000044c .word 0x2000044c
800386c: 20000400 .word 0x20000400
8003870: 20000418 .word 0x20000418
8003874: 2000042a .word 0x2000042a
08003878 <m2ap>:
motMov_st m2ap(void){
8003878: b580 push {r7, lr}
800387a: b09c sub sp, #112 @ 0x70
800387c: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
800387e: 4b5d ldr r3, [pc, #372] @ (80039f4 <m2ap+0x17c>)
8003880: 781a ldrb r2, [r3, #0]
8003882: 4b5d ldr r3, [pc, #372] @ (80039f8 <m2ap+0x180>)
8003884: 781b ldrb r3, [r3, #0]
8003886: 429a cmp r2, r3
8003888: d017 beq.n 80038ba <m2ap+0x42>
memm2st=m2st;
800388a: 4b5b ldr r3, [pc, #364] @ (80039f8 <m2ap+0x180>)
800388c: 781a ldrb r2, [r3, #0]
800388e: 4b59 ldr r3, [pc, #356] @ (80039f4 <m2ap+0x17c>)
8003890: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ap=%d",m2st);
8003892: 4b59 ldr r3, [pc, #356] @ (80039f8 <m2ap+0x180>)
8003894: 781b ldrb r3, [r3, #0]
8003896: 461a mov r2, r3
8003898: 1d3b adds r3, r7, #4
800389a: 4958 ldr r1, [pc, #352] @ (80039fc <m2ap+0x184>)
800389c: 4618 mov r0, r3
800389e: f00a fdb5 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80038a2: 1d3b adds r3, r7, #4
80038a4: 4618 mov r0, r3
80038a6: f7fc fc51 bl 800014c <strlen>
80038aa: 4603 mov r3, r0
80038ac: b29a uxth r2, r3
80038ae: 1d39 adds r1, r7, #4
80038b0: f04f 33ff mov.w r3, #4294967295
80038b4: 4852 ldr r0, [pc, #328] @ (8003a00 <m2ap+0x188>)
80038b6: f005 ffb9 bl 800982c <HAL_UART_Transmit>
}
if(rtCiclo<apM2start)m2st=motWaiting;
80038ba: 4b52 ldr r3, [pc, #328] @ (8003a04 <m2ap+0x18c>)
80038bc: 881b ldrh r3, [r3, #0]
80038be: b29a uxth r2, r3
80038c0: 4b51 ldr r3, [pc, #324] @ (8003a08 <m2ap+0x190>)
80038c2: 881b ldrh r3, [r3, #0]
80038c4: 429a cmp r2, r3
80038c6: d202 bcs.n 80038ce <m2ap+0x56>
80038c8: 4b4b ldr r3, [pc, #300] @ (80039f8 <m2ap+0x180>)
80038ca: 2200 movs r2, #0
80038cc: 701a strb r2, [r3, #0]
switch(m2st){
80038ce: 4b4a ldr r3, [pc, #296] @ (80039f8 <m2ap+0x180>)
80038d0: 781b ldrb r3, [r3, #0]
80038d2: 2b03 cmp r3, #3
80038d4: d876 bhi.n 80039c4 <m2ap+0x14c>
80038d6: a201 add r2, pc, #4 @ (adr r2, 80038dc <m2ap+0x64>)
80038d8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80038dc: 080038ed .word 0x080038ed
80038e0: 08003939 .word 0x08003939
80038e4: 08003969 .word 0x08003969
80038e8: 0800399b .word 0x0800399b
case motWaiting:
SetMotPerc(M2,FW,0);
80038ec: 2200 movs r2, #0
80038ee: 2100 movs r1, #0
80038f0: 2002 movs r0, #2
80038f2: f000 ff6d bl 80047d0 <SetMotPerc>
SetMotPerc(M2,BW,0);
80038f6: 2200 movs r2, #0
80038f8: 2101 movs r1, #1
80038fa: 2002 movs r0, #2
80038fc: f000 ff68 bl 80047d0 <SetMotPerc>
if(rtCiclo>=apM2start){
8003900: 4b40 ldr r3, [pc, #256] @ (8003a04 <m2ap+0x18c>)
8003902: 881b ldrh r3, [r3, #0]
8003904: b29a uxth r2, r3
8003906: 4b40 ldr r3, [pc, #256] @ (8003a08 <m2ap+0x190>)
8003908: 881b ldrh r3, [r3, #0]
800390a: 429a cmp r2, r3
800390c: d365 bcc.n 80039da <m2ap+0x162>
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT);
800390e: 4b3f ldr r3, [pc, #252] @ (8003a0c <m2ap+0x194>)
8003910: 885b ldrh r3, [r3, #2]
8003912: b2da uxtb r2, r3
8003914: 4b3e ldr r3, [pc, #248] @ (8003a10 <m2ap+0x198>)
8003916: 881b ldrh r3, [r3, #0]
8003918: b2d9 uxtb r1, r3
800391a: 4b3e ldr r3, [pc, #248] @ (8003a14 <m2ap+0x19c>)
800391c: 881b ldrh r3, [r3, #0]
800391e: b2db uxtb r3, r3
8003920: 2000 movs r0, #0
8003922: 9001 str r0, [sp, #4]
8003924: 9300 str r3, [sp, #0]
8003926: 460b mov r3, r1
8003928: 2101 movs r1, #1
800392a: 2002 movs r0, #2
800392c: f001 f8d0 bl 8004ad0 <ramp>
m2st=motStartRamp;
8003930: 4b31 ldr r3, [pc, #196] @ (80039f8 <m2ap+0x180>)
8003932: 2201 movs r2, #1
8003934: 701a strb r2, [r3, #0]
}
break;
8003936: e050 b.n 80039da <m2ap+0x162>
case motStartRamp:
if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){
8003938: 4b34 ldr r3, [pc, #208] @ (8003a0c <m2ap+0x194>)
800393a: 885b ldrh r3, [r3, #2]
800393c: b2da uxtb r2, r3
800393e: 4b34 ldr r3, [pc, #208] @ (8003a10 <m2ap+0x198>)
8003940: 881b ldrh r3, [r3, #0]
8003942: b2d9 uxtb r1, r3
8003944: 4b33 ldr r3, [pc, #204] @ (8003a14 <m2ap+0x19c>)
8003946: 881b ldrh r3, [r3, #0]
8003948: b2db uxtb r3, r3
800394a: 200a movs r0, #10
800394c: 9001 str r0, [sp, #4]
800394e: 9300 str r3, [sp, #0]
8003950: 460b mov r3, r1
8003952: 2101 movs r1, #1
8003954: 2002 movs r0, #2
8003956: f001 f8bb bl 8004ad0 <ramp>
800395a: 4603 mov r3, r0
800395c: 2b00 cmp r3, #0
800395e: d13e bne.n 80039de <m2ap+0x166>
m2st=motWaitingTime;
8003960: 4b25 ldr r3, [pc, #148] @ (80039f8 <m2ap+0x180>)
8003962: 2202 movs r2, #2
8003964: 701a strb r2, [r3, #0]
}
break;
8003966: e03a b.n 80039de <m2ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM2stop){
8003968: 4b26 ldr r3, [pc, #152] @ (8003a04 <m2ap+0x18c>)
800396a: 881b ldrh r3, [r3, #0]
800396c: b29a uxth r2, r3
800396e: 4b2a ldr r3, [pc, #168] @ (8003a18 <m2ap+0x1a0>)
8003970: 881b ldrh r3, [r3, #0]
8003972: 429a cmp r2, r3
8003974: d335 bcc.n 80039e2 <m2ap+0x16a>
(void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT);
8003976: 4b26 ldr r3, [pc, #152] @ (8003a10 <m2ap+0x198>)
8003978: 881b ldrh r3, [r3, #0]
800397a: b2da uxtb r2, r3
800397c: 4b25 ldr r3, [pc, #148] @ (8003a14 <m2ap+0x19c>)
800397e: 881b ldrh r3, [r3, #0]
8003980: b2db uxtb r3, r3
8003982: 2100 movs r1, #0
8003984: 9101 str r1, [sp, #4]
8003986: 9300 str r3, [sp, #0]
8003988: 2300 movs r3, #0
800398a: 2101 movs r1, #1
800398c: 2002 movs r0, #2
800398e: f001 f89f bl 8004ad0 <ramp>
m2st=motStopRamp;
8003992: 4b19 ldr r3, [pc, #100] @ (80039f8 <m2ap+0x180>)
8003994: 2203 movs r2, #3
8003996: 701a strb r2, [r3, #0]
}
break;
8003998: e023 b.n 80039e2 <m2ap+0x16a>
case motStopRamp:
if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){
800399a: 4b1d ldr r3, [pc, #116] @ (8003a10 <m2ap+0x198>)
800399c: 881b ldrh r3, [r3, #0]
800399e: b2da uxtb r2, r3
80039a0: 4b1c ldr r3, [pc, #112] @ (8003a14 <m2ap+0x19c>)
80039a2: 881b ldrh r3, [r3, #0]
80039a4: b2db uxtb r3, r3
80039a6: 210a movs r1, #10
80039a8: 9101 str r1, [sp, #4]
80039aa: 9300 str r3, [sp, #0]
80039ac: 2300 movs r3, #0
80039ae: 2101 movs r1, #1
80039b0: 2002 movs r0, #2
80039b2: f001 f88d bl 8004ad0 <ramp>
80039b6: 4603 mov r3, r0
80039b8: 2b00 cmp r3, #0
80039ba: d114 bne.n 80039e6 <m2ap+0x16e>
m2st=motStop;
80039bc: 4b0e ldr r3, [pc, #56] @ (80039f8 <m2ap+0x180>)
80039be: 2204 movs r2, #4
80039c0: 701a strb r2, [r3, #0]
}
break;
80039c2: e010 b.n 80039e6 <m2ap+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
80039c4: 2200 movs r2, #0
80039c6: 2100 movs r1, #0
80039c8: 2002 movs r0, #2
80039ca: f000 ff01 bl 80047d0 <SetMotPerc>
SetMotPerc(M2,BW,0);
80039ce: 2200 movs r2, #0
80039d0: 2101 movs r1, #1
80039d2: 2002 movs r0, #2
80039d4: f000 fefc bl 80047d0 <SetMotPerc>
break;
80039d8: e006 b.n 80039e8 <m2ap+0x170>
break;
80039da: bf00 nop
80039dc: e004 b.n 80039e8 <m2ap+0x170>
break;
80039de: bf00 nop
80039e0: e002 b.n 80039e8 <m2ap+0x170>
break;
80039e2: bf00 nop
80039e4: e000 b.n 80039e8 <m2ap+0x170>
break;
80039e6: bf00 nop
}
return m2st;
80039e8: 4b03 ldr r3, [pc, #12] @ (80039f8 <m2ap+0x180>)
80039ea: 781b ldrb r3, [r3, #0]
}
80039ec: 4618 mov r0, r3
80039ee: 3768 adds r7, #104 @ 0x68
80039f0: 46bd mov sp, r7
80039f2: bd80 pop {r7, pc}
80039f4: 20000008 .word 0x20000008
80039f8: 20000463 .word 0x20000463
80039fc: 0800f374 .word 0x0800f374
8003a00: 200003a8 .word 0x200003a8
8003a04: 200003fc .word 0x200003fc
8003a08: 2000042c .word 0x2000042c
8003a0c: 2000044c .word 0x2000044c
8003a10: 20000404 .word 0x20000404
8003a14: 20000418 .word 0x20000418
8003a18: 2000042e .word 0x2000042e
08003a1c <m3ap>:
motMov_st m3ap(void){
8003a1c: b580 push {r7, lr}
8003a1e: b09c sub sp, #112 @ 0x70
8003a20: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
8003a22: 4b5d ldr r3, [pc, #372] @ (8003b98 <m3ap+0x17c>)
8003a24: 781a ldrb r2, [r3, #0]
8003a26: 4b5d ldr r3, [pc, #372] @ (8003b9c <m3ap+0x180>)
8003a28: 781b ldrb r3, [r3, #0]
8003a2a: 429a cmp r2, r3
8003a2c: d017 beq.n 8003a5e <m3ap+0x42>
memm3st=m3st;
8003a2e: 4b5b ldr r3, [pc, #364] @ (8003b9c <m3ap+0x180>)
8003a30: 781a ldrb r2, [r3, #0]
8003a32: 4b59 ldr r3, [pc, #356] @ (8003b98 <m3ap+0x17c>)
8003a34: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ap=%d",m3st);
8003a36: 4b59 ldr r3, [pc, #356] @ (8003b9c <m3ap+0x180>)
8003a38: 781b ldrb r3, [r3, #0]
8003a3a: 461a mov r2, r3
8003a3c: 1d3b adds r3, r7, #4
8003a3e: 4958 ldr r1, [pc, #352] @ (8003ba0 <m3ap+0x184>)
8003a40: 4618 mov r0, r3
8003a42: f00a fce3 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003a46: 1d3b adds r3, r7, #4
8003a48: 4618 mov r0, r3
8003a4a: f7fc fb7f bl 800014c <strlen>
8003a4e: 4603 mov r3, r0
8003a50: b29a uxth r2, r3
8003a52: 1d39 adds r1, r7, #4
8003a54: f04f 33ff mov.w r3, #4294967295
8003a58: 4852 ldr r0, [pc, #328] @ (8003ba4 <m3ap+0x188>)
8003a5a: f005 fee7 bl 800982c <HAL_UART_Transmit>
}
if(rtCiclo<apM3start)m3st=motWaiting;
8003a5e: 4b52 ldr r3, [pc, #328] @ (8003ba8 <m3ap+0x18c>)
8003a60: 881b ldrh r3, [r3, #0]
8003a62: b29a uxth r2, r3
8003a64: 4b51 ldr r3, [pc, #324] @ (8003bac <m3ap+0x190>)
8003a66: 881b ldrh r3, [r3, #0]
8003a68: 429a cmp r2, r3
8003a6a: d202 bcs.n 8003a72 <m3ap+0x56>
8003a6c: 4b4b ldr r3, [pc, #300] @ (8003b9c <m3ap+0x180>)
8003a6e: 2200 movs r2, #0
8003a70: 701a strb r2, [r3, #0]
switch(m3st){
8003a72: 4b4a ldr r3, [pc, #296] @ (8003b9c <m3ap+0x180>)
8003a74: 781b ldrb r3, [r3, #0]
8003a76: 2b03 cmp r3, #3
8003a78: d876 bhi.n 8003b68 <m3ap+0x14c>
8003a7a: a201 add r2, pc, #4 @ (adr r2, 8003a80 <m3ap+0x64>)
8003a7c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003a80: 08003a91 .word 0x08003a91
8003a84: 08003add .word 0x08003add
8003a88: 08003b0d .word 0x08003b0d
8003a8c: 08003b3f .word 0x08003b3f
case motWaiting:
SetMotPerc(M3,FW,0);
8003a90: 2200 movs r2, #0
8003a92: 2100 movs r1, #0
8003a94: 2003 movs r0, #3
8003a96: f000 fe9b bl 80047d0 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003a9a: 2200 movs r2, #0
8003a9c: 2101 movs r1, #1
8003a9e: 2003 movs r0, #3
8003aa0: f000 fe96 bl 80047d0 <SetMotPerc>
if(rtCiclo>=apM3start){
8003aa4: 4b40 ldr r3, [pc, #256] @ (8003ba8 <m3ap+0x18c>)
8003aa6: 881b ldrh r3, [r3, #0]
8003aa8: b29a uxth r2, r3
8003aaa: 4b40 ldr r3, [pc, #256] @ (8003bac <m3ap+0x190>)
8003aac: 881b ldrh r3, [r3, #0]
8003aae: 429a cmp r2, r3
8003ab0: d365 bcc.n 8003b7e <m3ap+0x162>
(void)ramp(M3,FW,mrampstart[M3-1],m2pwmap,tramp,RAMPINIT);
8003ab2: 4b3f ldr r3, [pc, #252] @ (8003bb0 <m3ap+0x194>)
8003ab4: 889b ldrh r3, [r3, #4]
8003ab6: b2da uxtb r2, r3
8003ab8: 4b3e ldr r3, [pc, #248] @ (8003bb4 <m3ap+0x198>)
8003aba: 881b ldrh r3, [r3, #0]
8003abc: b2d9 uxtb r1, r3
8003abe: 4b3e ldr r3, [pc, #248] @ (8003bb8 <m3ap+0x19c>)
8003ac0: 881b ldrh r3, [r3, #0]
8003ac2: b2db uxtb r3, r3
8003ac4: 2000 movs r0, #0
8003ac6: 9001 str r0, [sp, #4]
8003ac8: 9300 str r3, [sp, #0]
8003aca: 460b mov r3, r1
8003acc: 2100 movs r1, #0
8003ace: 2003 movs r0, #3
8003ad0: f000 fffe bl 8004ad0 <ramp>
m3st=motStartRamp;
8003ad4: 4b31 ldr r3, [pc, #196] @ (8003b9c <m3ap+0x180>)
8003ad6: 2201 movs r2, #1
8003ad8: 701a strb r2, [r3, #0]
}
break;
8003ada: e050 b.n 8003b7e <m3ap+0x162>
case motStartRamp:
if(ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){
8003adc: 4b34 ldr r3, [pc, #208] @ (8003bb0 <m3ap+0x194>)
8003ade: 889b ldrh r3, [r3, #4]
8003ae0: b2da uxtb r2, r3
8003ae2: 4b36 ldr r3, [pc, #216] @ (8003bbc <m3ap+0x1a0>)
8003ae4: 881b ldrh r3, [r3, #0]
8003ae6: b2d9 uxtb r1, r3
8003ae8: 4b33 ldr r3, [pc, #204] @ (8003bb8 <m3ap+0x19c>)
8003aea: 881b ldrh r3, [r3, #0]
8003aec: b2db uxtb r3, r3
8003aee: 200a movs r0, #10
8003af0: 9001 str r0, [sp, #4]
8003af2: 9300 str r3, [sp, #0]
8003af4: 460b mov r3, r1
8003af6: 2100 movs r1, #0
8003af8: 2003 movs r0, #3
8003afa: f000 ffe9 bl 8004ad0 <ramp>
8003afe: 4603 mov r3, r0
8003b00: 2b00 cmp r3, #0
8003b02: d13e bne.n 8003b82 <m3ap+0x166>
m3st=motWaitingTime;
8003b04: 4b25 ldr r3, [pc, #148] @ (8003b9c <m3ap+0x180>)
8003b06: 2202 movs r2, #2
8003b08: 701a strb r2, [r3, #0]
}
break;
8003b0a: e03a b.n 8003b82 <m3ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM3stop){
8003b0c: 4b26 ldr r3, [pc, #152] @ (8003ba8 <m3ap+0x18c>)
8003b0e: 881b ldrh r3, [r3, #0]
8003b10: b29a uxth r2, r3
8003b12: 4b2b ldr r3, [pc, #172] @ (8003bc0 <m3ap+0x1a4>)
8003b14: 881b ldrh r3, [r3, #0]
8003b16: 429a cmp r2, r3
8003b18: d335 bcc.n 8003b86 <m3ap+0x16a>
(void)ramp(M3,FW,m3pwmap,0,tramp,RAMPINIT);
8003b1a: 4b28 ldr r3, [pc, #160] @ (8003bbc <m3ap+0x1a0>)
8003b1c: 881b ldrh r3, [r3, #0]
8003b1e: b2da uxtb r2, r3
8003b20: 4b25 ldr r3, [pc, #148] @ (8003bb8 <m3ap+0x19c>)
8003b22: 881b ldrh r3, [r3, #0]
8003b24: b2db uxtb r3, r3
8003b26: 2100 movs r1, #0
8003b28: 9101 str r1, [sp, #4]
8003b2a: 9300 str r3, [sp, #0]
8003b2c: 2300 movs r3, #0
8003b2e: 2100 movs r1, #0
8003b30: 2003 movs r0, #3
8003b32: f000 ffcd bl 8004ad0 <ramp>
m3st=motStopRamp;
8003b36: 4b19 ldr r3, [pc, #100] @ (8003b9c <m3ap+0x180>)
8003b38: 2203 movs r2, #3
8003b3a: 701a strb r2, [r3, #0]
}
break;
8003b3c: e023 b.n 8003b86 <m3ap+0x16a>
case motStopRamp:
if(ramp(M3,FW,m3pwmap,0,tramp,RAMPRUN)==DONE){
8003b3e: 4b1f ldr r3, [pc, #124] @ (8003bbc <m3ap+0x1a0>)
8003b40: 881b ldrh r3, [r3, #0]
8003b42: b2da uxtb r2, r3
8003b44: 4b1c ldr r3, [pc, #112] @ (8003bb8 <m3ap+0x19c>)
8003b46: 881b ldrh r3, [r3, #0]
8003b48: b2db uxtb r3, r3
8003b4a: 210a movs r1, #10
8003b4c: 9101 str r1, [sp, #4]
8003b4e: 9300 str r3, [sp, #0]
8003b50: 2300 movs r3, #0
8003b52: 2100 movs r1, #0
8003b54: 2003 movs r0, #3
8003b56: f000 ffbb bl 8004ad0 <ramp>
8003b5a: 4603 mov r3, r0
8003b5c: 2b00 cmp r3, #0
8003b5e: d114 bne.n 8003b8a <m3ap+0x16e>
m3st=motStop;
8003b60: 4b0e ldr r3, [pc, #56] @ (8003b9c <m3ap+0x180>)
8003b62: 2204 movs r2, #4
8003b64: 701a strb r2, [r3, #0]
}
break;
8003b66: e010 b.n 8003b8a <m3ap+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8003b68: 2200 movs r2, #0
8003b6a: 2100 movs r1, #0
8003b6c: 2003 movs r0, #3
8003b6e: f000 fe2f bl 80047d0 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003b72: 2200 movs r2, #0
8003b74: 2101 movs r1, #1
8003b76: 2003 movs r0, #3
8003b78: f000 fe2a bl 80047d0 <SetMotPerc>
break;
8003b7c: e006 b.n 8003b8c <m3ap+0x170>
break;
8003b7e: bf00 nop
8003b80: e004 b.n 8003b8c <m3ap+0x170>
break;
8003b82: bf00 nop
8003b84: e002 b.n 8003b8c <m3ap+0x170>
break;
8003b86: bf00 nop
8003b88: e000 b.n 8003b8c <m3ap+0x170>
break;
8003b8a: bf00 nop
}
return m3st;
8003b8c: 4b03 ldr r3, [pc, #12] @ (8003b9c <m3ap+0x180>)
8003b8e: 781b ldrb r3, [r3, #0]
}
8003b90: 4618 mov r0, r3
8003b92: 3768 adds r7, #104 @ 0x68
8003b94: 46bd mov sp, r7
8003b96: bd80 pop {r7, pc}
8003b98: 20000009 .word 0x20000009
8003b9c: 20000464 .word 0x20000464
8003ba0: 0800f380 .word 0x0800f380
8003ba4: 200003a8 .word 0x200003a8
8003ba8: 200003fc .word 0x200003fc
8003bac: 20000430 .word 0x20000430
8003bb0: 2000044c .word 0x2000044c
8003bb4: 20000404 .word 0x20000404
8003bb8: 20000418 .word 0x20000418
8003bbc: 20000408 .word 0x20000408
8003bc0: 20000432 .word 0x20000432
08003bc4 <m4ap>:
motMov_st m4ap(void){
8003bc4: b580 push {r7, lr}
8003bc6: b09c sub sp, #112 @ 0x70
8003bc8: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8003bca: 4b5d ldr r3, [pc, #372] @ (8003d40 <m4ap+0x17c>)
8003bcc: 781a ldrb r2, [r3, #0]
8003bce: 4b5d ldr r3, [pc, #372] @ (8003d44 <m4ap+0x180>)
8003bd0: 781b ldrb r3, [r3, #0]
8003bd2: 429a cmp r2, r3
8003bd4: d017 beq.n 8003c06 <m4ap+0x42>
memm4st=m4st;
8003bd6: 4b5b ldr r3, [pc, #364] @ (8003d44 <m4ap+0x180>)
8003bd8: 781a ldrb r2, [r3, #0]
8003bda: 4b59 ldr r3, [pc, #356] @ (8003d40 <m4ap+0x17c>)
8003bdc: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ap=%d",m4st);
8003bde: 4b59 ldr r3, [pc, #356] @ (8003d44 <m4ap+0x180>)
8003be0: 781b ldrb r3, [r3, #0]
8003be2: 461a mov r2, r3
8003be4: 1d3b adds r3, r7, #4
8003be6: 4958 ldr r1, [pc, #352] @ (8003d48 <m4ap+0x184>)
8003be8: 4618 mov r0, r3
8003bea: f00a fc0f bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003bee: 1d3b adds r3, r7, #4
8003bf0: 4618 mov r0, r3
8003bf2: f7fc faab bl 800014c <strlen>
8003bf6: 4603 mov r3, r0
8003bf8: b29a uxth r2, r3
8003bfa: 1d39 adds r1, r7, #4
8003bfc: f04f 33ff mov.w r3, #4294967295
8003c00: 4852 ldr r0, [pc, #328] @ (8003d4c <m4ap+0x188>)
8003c02: f005 fe13 bl 800982c <HAL_UART_Transmit>
}
if(rtCiclo<apM4start)m4st=motWaiting;
8003c06: 4b52 ldr r3, [pc, #328] @ (8003d50 <m4ap+0x18c>)
8003c08: 881b ldrh r3, [r3, #0]
8003c0a: b29a uxth r2, r3
8003c0c: 4b51 ldr r3, [pc, #324] @ (8003d54 <m4ap+0x190>)
8003c0e: 881b ldrh r3, [r3, #0]
8003c10: 429a cmp r2, r3
8003c12: d202 bcs.n 8003c1a <m4ap+0x56>
8003c14: 4b4b ldr r3, [pc, #300] @ (8003d44 <m4ap+0x180>)
8003c16: 2200 movs r2, #0
8003c18: 701a strb r2, [r3, #0]
switch(m4st){
8003c1a: 4b4a ldr r3, [pc, #296] @ (8003d44 <m4ap+0x180>)
8003c1c: 781b ldrb r3, [r3, #0]
8003c1e: 2b03 cmp r3, #3
8003c20: d876 bhi.n 8003d10 <m4ap+0x14c>
8003c22: a201 add r2, pc, #4 @ (adr r2, 8003c28 <m4ap+0x64>)
8003c24: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003c28: 08003c39 .word 0x08003c39
8003c2c: 08003c85 .word 0x08003c85
8003c30: 08003cb5 .word 0x08003cb5
8003c34: 08003ce7 .word 0x08003ce7
case motWaiting:
SetMotPerc(M4,FW,0);
8003c38: 2200 movs r2, #0
8003c3a: 2100 movs r1, #0
8003c3c: 2004 movs r0, #4
8003c3e: f000 fdc7 bl 80047d0 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003c42: 2200 movs r2, #0
8003c44: 2101 movs r1, #1
8003c46: 2004 movs r0, #4
8003c48: f000 fdc2 bl 80047d0 <SetMotPerc>
if(rtCiclo>=apM4start){
8003c4c: 4b40 ldr r3, [pc, #256] @ (8003d50 <m4ap+0x18c>)
8003c4e: 881b ldrh r3, [r3, #0]
8003c50: b29a uxth r2, r3
8003c52: 4b40 ldr r3, [pc, #256] @ (8003d54 <m4ap+0x190>)
8003c54: 881b ldrh r3, [r3, #0]
8003c56: 429a cmp r2, r3
8003c58: d365 bcc.n 8003d26 <m4ap+0x162>
(void)ramp(M4,FW,mrampstart[M4-1],m2pwmap,tramp,RAMPINIT);
8003c5a: 4b3f ldr r3, [pc, #252] @ (8003d58 <m4ap+0x194>)
8003c5c: 88db ldrh r3, [r3, #6]
8003c5e: b2da uxtb r2, r3
8003c60: 4b3e ldr r3, [pc, #248] @ (8003d5c <m4ap+0x198>)
8003c62: 881b ldrh r3, [r3, #0]
8003c64: b2d9 uxtb r1, r3
8003c66: 4b3e ldr r3, [pc, #248] @ (8003d60 <m4ap+0x19c>)
8003c68: 881b ldrh r3, [r3, #0]
8003c6a: b2db uxtb r3, r3
8003c6c: 2000 movs r0, #0
8003c6e: 9001 str r0, [sp, #4]
8003c70: 9300 str r3, [sp, #0]
8003c72: 460b mov r3, r1
8003c74: 2100 movs r1, #0
8003c76: 2004 movs r0, #4
8003c78: f000 ff2a bl 8004ad0 <ramp>
m4st=motStartRamp;
8003c7c: 4b31 ldr r3, [pc, #196] @ (8003d44 <m4ap+0x180>)
8003c7e: 2201 movs r2, #1
8003c80: 701a strb r2, [r3, #0]
}
break;
8003c82: e050 b.n 8003d26 <m4ap+0x162>
case motStartRamp:
if(ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){
8003c84: 4b34 ldr r3, [pc, #208] @ (8003d58 <m4ap+0x194>)
8003c86: 88db ldrh r3, [r3, #6]
8003c88: b2da uxtb r2, r3
8003c8a: 4b36 ldr r3, [pc, #216] @ (8003d64 <m4ap+0x1a0>)
8003c8c: 881b ldrh r3, [r3, #0]
8003c8e: b2d9 uxtb r1, r3
8003c90: 4b33 ldr r3, [pc, #204] @ (8003d60 <m4ap+0x19c>)
8003c92: 881b ldrh r3, [r3, #0]
8003c94: b2db uxtb r3, r3
8003c96: 200a movs r0, #10
8003c98: 9001 str r0, [sp, #4]
8003c9a: 9300 str r3, [sp, #0]
8003c9c: 460b mov r3, r1
8003c9e: 2100 movs r1, #0
8003ca0: 2004 movs r0, #4
8003ca2: f000 ff15 bl 8004ad0 <ramp>
8003ca6: 4603 mov r3, r0
8003ca8: 2b00 cmp r3, #0
8003caa: d13e bne.n 8003d2a <m4ap+0x166>
m4st=motWaitingTime;
8003cac: 4b25 ldr r3, [pc, #148] @ (8003d44 <m4ap+0x180>)
8003cae: 2202 movs r2, #2
8003cb0: 701a strb r2, [r3, #0]
}
break;
8003cb2: e03a b.n 8003d2a <m4ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM4stop){
8003cb4: 4b26 ldr r3, [pc, #152] @ (8003d50 <m4ap+0x18c>)
8003cb6: 881b ldrh r3, [r3, #0]
8003cb8: b29a uxth r2, r3
8003cba: 4b2b ldr r3, [pc, #172] @ (8003d68 <m4ap+0x1a4>)
8003cbc: 881b ldrh r3, [r3, #0]
8003cbe: 429a cmp r2, r3
8003cc0: d335 bcc.n 8003d2e <m4ap+0x16a>
(void)ramp(M4,FW,m4pwmap,0,tramp,RAMPINIT);
8003cc2: 4b28 ldr r3, [pc, #160] @ (8003d64 <m4ap+0x1a0>)
8003cc4: 881b ldrh r3, [r3, #0]
8003cc6: b2da uxtb r2, r3
8003cc8: 4b25 ldr r3, [pc, #148] @ (8003d60 <m4ap+0x19c>)
8003cca: 881b ldrh r3, [r3, #0]
8003ccc: b2db uxtb r3, r3
8003cce: 2100 movs r1, #0
8003cd0: 9101 str r1, [sp, #4]
8003cd2: 9300 str r3, [sp, #0]
8003cd4: 2300 movs r3, #0
8003cd6: 2100 movs r1, #0
8003cd8: 2004 movs r0, #4
8003cda: f000 fef9 bl 8004ad0 <ramp>
m4st=motStopRamp;
8003cde: 4b19 ldr r3, [pc, #100] @ (8003d44 <m4ap+0x180>)
8003ce0: 2203 movs r2, #3
8003ce2: 701a strb r2, [r3, #0]
}
break;
8003ce4: e023 b.n 8003d2e <m4ap+0x16a>
case motStopRamp:
if(ramp(M4,FW,m4pwmap,0,tramp,RAMPRUN)==DONE){
8003ce6: 4b1f ldr r3, [pc, #124] @ (8003d64 <m4ap+0x1a0>)
8003ce8: 881b ldrh r3, [r3, #0]
8003cea: b2da uxtb r2, r3
8003cec: 4b1c ldr r3, [pc, #112] @ (8003d60 <m4ap+0x19c>)
8003cee: 881b ldrh r3, [r3, #0]
8003cf0: b2db uxtb r3, r3
8003cf2: 210a movs r1, #10
8003cf4: 9101 str r1, [sp, #4]
8003cf6: 9300 str r3, [sp, #0]
8003cf8: 2300 movs r3, #0
8003cfa: 2100 movs r1, #0
8003cfc: 2004 movs r0, #4
8003cfe: f000 fee7 bl 8004ad0 <ramp>
8003d02: 4603 mov r3, r0
8003d04: 2b00 cmp r3, #0
8003d06: d114 bne.n 8003d32 <m4ap+0x16e>
m4st=motStop;
8003d08: 4b0e ldr r3, [pc, #56] @ (8003d44 <m4ap+0x180>)
8003d0a: 2204 movs r2, #4
8003d0c: 701a strb r2, [r3, #0]
}
break;
8003d0e: e010 b.n 8003d32 <m4ap+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003d10: 2200 movs r2, #0
8003d12: 2100 movs r1, #0
8003d14: 2004 movs r0, #4
8003d16: f000 fd5b bl 80047d0 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003d1a: 2200 movs r2, #0
8003d1c: 2101 movs r1, #1
8003d1e: 2004 movs r0, #4
8003d20: f000 fd56 bl 80047d0 <SetMotPerc>
break;
8003d24: e006 b.n 8003d34 <m4ap+0x170>
break;
8003d26: bf00 nop
8003d28: e004 b.n 8003d34 <m4ap+0x170>
break;
8003d2a: bf00 nop
8003d2c: e002 b.n 8003d34 <m4ap+0x170>
break;
8003d2e: bf00 nop
8003d30: e000 b.n 8003d34 <m4ap+0x170>
break;
8003d32: bf00 nop
}
return m4st;
8003d34: 4b03 ldr r3, [pc, #12] @ (8003d44 <m4ap+0x180>)
8003d36: 781b ldrb r3, [r3, #0]
}
8003d38: 4618 mov r0, r3
8003d3a: 3768 adds r7, #104 @ 0x68
8003d3c: 46bd mov sp, r7
8003d3e: bd80 pop {r7, pc}
8003d40: 2000000a .word 0x2000000a
8003d44: 20000465 .word 0x20000465
8003d48: 0800f38c .word 0x0800f38c
8003d4c: 200003a8 .word 0x200003a8
8003d50: 200003fc .word 0x200003fc
8003d54: 20000434 .word 0x20000434
8003d58: 2000044c .word 0x2000044c
8003d5c: 20000404 .word 0x20000404
8003d60: 20000418 .word 0x20000418
8003d64: 2000040c .word 0x2000040c
8003d68: 20000436 .word 0x20000436
08003d6c <m1ch>:
motMov_st m1ch(void){
8003d6c: b580 push {r7, lr}
8003d6e: b09c sub sp, #112 @ 0x70
8003d70: af02 add r7, sp, #8
static motMov_st m1st;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8003d72: 4b5d ldr r3, [pc, #372] @ (8003ee8 <m1ch+0x17c>)
8003d74: 781a ldrb r2, [r3, #0]
8003d76: 4b5d ldr r3, [pc, #372] @ (8003eec <m1ch+0x180>)
8003d78: 781b ldrb r3, [r3, #0]
8003d7a: 429a cmp r2, r3
8003d7c: d017 beq.n 8003dae <m1ch+0x42>
memm1st=m1st;
8003d7e: 4b5b ldr r3, [pc, #364] @ (8003eec <m1ch+0x180>)
8003d80: 781a ldrb r2, [r3, #0]
8003d82: 4b59 ldr r3, [pc, #356] @ (8003ee8 <m1ch+0x17c>)
8003d84: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ch=%d",m1st);
8003d86: 4b59 ldr r3, [pc, #356] @ (8003eec <m1ch+0x180>)
8003d88: 781b ldrb r3, [r3, #0]
8003d8a: 461a mov r2, r3
8003d8c: 1d3b adds r3, r7, #4
8003d8e: 4958 ldr r1, [pc, #352] @ (8003ef0 <m1ch+0x184>)
8003d90: 4618 mov r0, r3
8003d92: f00a fb3b bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003d96: 1d3b adds r3, r7, #4
8003d98: 4618 mov r0, r3
8003d9a: f7fc f9d7 bl 800014c <strlen>
8003d9e: 4603 mov r3, r0
8003da0: b29a uxth r2, r3
8003da2: 1d39 adds r1, r7, #4
8003da4: f04f 33ff mov.w r3, #4294967295
8003da8: 4852 ldr r0, [pc, #328] @ (8003ef4 <m1ch+0x188>)
8003daa: f005 fd3f bl 800982c <HAL_UART_Transmit>
}
if(rtCiclo<chM1start)m1st=motWaiting;
8003dae: 4b52 ldr r3, [pc, #328] @ (8003ef8 <m1ch+0x18c>)
8003db0: 881b ldrh r3, [r3, #0]
8003db2: b29a uxth r2, r3
8003db4: 4b51 ldr r3, [pc, #324] @ (8003efc <m1ch+0x190>)
8003db6: 881b ldrh r3, [r3, #0]
8003db8: 429a cmp r2, r3
8003dba: d202 bcs.n 8003dc2 <m1ch+0x56>
8003dbc: 4b4b ldr r3, [pc, #300] @ (8003eec <m1ch+0x180>)
8003dbe: 2200 movs r2, #0
8003dc0: 701a strb r2, [r3, #0]
switch(m1st){
8003dc2: 4b4a ldr r3, [pc, #296] @ (8003eec <m1ch+0x180>)
8003dc4: 781b ldrb r3, [r3, #0]
8003dc6: 2b03 cmp r3, #3
8003dc8: d876 bhi.n 8003eb8 <m1ch+0x14c>
8003dca: a201 add r2, pc, #4 @ (adr r2, 8003dd0 <m1ch+0x64>)
8003dcc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003dd0: 08003de1 .word 0x08003de1
8003dd4: 08003e2d .word 0x08003e2d
8003dd8: 08003e5d .word 0x08003e5d
8003ddc: 08003e8f .word 0x08003e8f
case motWaiting:
SetMotPerc(M1,FW,0);
8003de0: 2200 movs r2, #0
8003de2: 2100 movs r1, #0
8003de4: 2001 movs r0, #1
8003de6: f000 fcf3 bl 80047d0 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003dea: 2200 movs r2, #0
8003dec: 2101 movs r1, #1
8003dee: 2001 movs r0, #1
8003df0: f000 fcee bl 80047d0 <SetMotPerc>
if(rtCiclo>=chM1start){
8003df4: 4b40 ldr r3, [pc, #256] @ (8003ef8 <m1ch+0x18c>)
8003df6: 881b ldrh r3, [r3, #0]
8003df8: b29a uxth r2, r3
8003dfa: 4b40 ldr r3, [pc, #256] @ (8003efc <m1ch+0x190>)
8003dfc: 881b ldrh r3, [r3, #0]
8003dfe: 429a cmp r2, r3
8003e00: d365 bcc.n 8003ece <m1ch+0x162>
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
8003e02: 4b3f ldr r3, [pc, #252] @ (8003f00 <m1ch+0x194>)
8003e04: 881b ldrh r3, [r3, #0]
8003e06: b2da uxtb r2, r3
8003e08: 4b3e ldr r3, [pc, #248] @ (8003f04 <m1ch+0x198>)
8003e0a: 881b ldrh r3, [r3, #0]
8003e0c: b2d9 uxtb r1, r3
8003e0e: 4b3e ldr r3, [pc, #248] @ (8003f08 <m1ch+0x19c>)
8003e10: 881b ldrh r3, [r3, #0]
8003e12: b2db uxtb r3, r3
8003e14: 2000 movs r0, #0
8003e16: 9001 str r0, [sp, #4]
8003e18: 9300 str r3, [sp, #0]
8003e1a: 460b mov r3, r1
8003e1c: 2101 movs r1, #1
8003e1e: 2001 movs r0, #1
8003e20: f000 fe56 bl 8004ad0 <ramp>
m1st=motStartRamp;
8003e24: 4b31 ldr r3, [pc, #196] @ (8003eec <m1ch+0x180>)
8003e26: 2201 movs r2, #1
8003e28: 701a strb r2, [r3, #0]
}
break;
8003e2a: e050 b.n 8003ece <m1ch+0x162>
case motStartRamp:
if(ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){
8003e2c: 4b34 ldr r3, [pc, #208] @ (8003f00 <m1ch+0x194>)
8003e2e: 881b ldrh r3, [r3, #0]
8003e30: b2da uxtb r2, r3
8003e32: 4b34 ldr r3, [pc, #208] @ (8003f04 <m1ch+0x198>)
8003e34: 881b ldrh r3, [r3, #0]
8003e36: b2d9 uxtb r1, r3
8003e38: 4b33 ldr r3, [pc, #204] @ (8003f08 <m1ch+0x19c>)
8003e3a: 881b ldrh r3, [r3, #0]
8003e3c: b2db uxtb r3, r3
8003e3e: 200a movs r0, #10
8003e40: 9001 str r0, [sp, #4]
8003e42: 9300 str r3, [sp, #0]
8003e44: 460b mov r3, r1
8003e46: 2101 movs r1, #1
8003e48: 2001 movs r0, #1
8003e4a: f000 fe41 bl 8004ad0 <ramp>
8003e4e: 4603 mov r3, r0
8003e50: 2b00 cmp r3, #0
8003e52: d13e bne.n 8003ed2 <m1ch+0x166>
m1st=motWaitingTime;
8003e54: 4b25 ldr r3, [pc, #148] @ (8003eec <m1ch+0x180>)
8003e56: 2202 movs r2, #2
8003e58: 701a strb r2, [r3, #0]
}
break;
8003e5a: e03a b.n 8003ed2 <m1ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM1stop){
8003e5c: 4b26 ldr r3, [pc, #152] @ (8003ef8 <m1ch+0x18c>)
8003e5e: 881b ldrh r3, [r3, #0]
8003e60: b29a uxth r2, r3
8003e62: 4b2a ldr r3, [pc, #168] @ (8003f0c <m1ch+0x1a0>)
8003e64: 881b ldrh r3, [r3, #0]
8003e66: 429a cmp r2, r3
8003e68: d335 bcc.n 8003ed6 <m1ch+0x16a>
(void)ramp(M1,BW,m1pwmch,0,tramp,RAMPINIT);
8003e6a: 4b26 ldr r3, [pc, #152] @ (8003f04 <m1ch+0x198>)
8003e6c: 881b ldrh r3, [r3, #0]
8003e6e: b2da uxtb r2, r3
8003e70: 4b25 ldr r3, [pc, #148] @ (8003f08 <m1ch+0x19c>)
8003e72: 881b ldrh r3, [r3, #0]
8003e74: b2db uxtb r3, r3
8003e76: 2100 movs r1, #0
8003e78: 9101 str r1, [sp, #4]
8003e7a: 9300 str r3, [sp, #0]
8003e7c: 2300 movs r3, #0
8003e7e: 2101 movs r1, #1
8003e80: 2001 movs r0, #1
8003e82: f000 fe25 bl 8004ad0 <ramp>
m1st=motStopRamp;
8003e86: 4b19 ldr r3, [pc, #100] @ (8003eec <m1ch+0x180>)
8003e88: 2203 movs r2, #3
8003e8a: 701a strb r2, [r3, #0]
}
break;
8003e8c: e023 b.n 8003ed6 <m1ch+0x16a>
case motStopRamp:
if(ramp(M1,BW,m1pwmch,0,tramp,RAMPRUN)==DONE){
8003e8e: 4b1d ldr r3, [pc, #116] @ (8003f04 <m1ch+0x198>)
8003e90: 881b ldrh r3, [r3, #0]
8003e92: b2da uxtb r2, r3
8003e94: 4b1c ldr r3, [pc, #112] @ (8003f08 <m1ch+0x19c>)
8003e96: 881b ldrh r3, [r3, #0]
8003e98: b2db uxtb r3, r3
8003e9a: 210a movs r1, #10
8003e9c: 9101 str r1, [sp, #4]
8003e9e: 9300 str r3, [sp, #0]
8003ea0: 2300 movs r3, #0
8003ea2: 2101 movs r1, #1
8003ea4: 2001 movs r0, #1
8003ea6: f000 fe13 bl 8004ad0 <ramp>
8003eaa: 4603 mov r3, r0
8003eac: 2b00 cmp r3, #0
8003eae: d114 bne.n 8003eda <m1ch+0x16e>
m1st=motStop;
8003eb0: 4b0e ldr r3, [pc, #56] @ (8003eec <m1ch+0x180>)
8003eb2: 2204 movs r2, #4
8003eb4: 701a strb r2, [r3, #0]
}
break;
8003eb6: e010 b.n 8003eda <m1ch+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003eb8: 2200 movs r2, #0
8003eba: 2100 movs r1, #0
8003ebc: 2001 movs r0, #1
8003ebe: f000 fc87 bl 80047d0 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003ec2: 2200 movs r2, #0
8003ec4: 2101 movs r1, #1
8003ec6: 2001 movs r0, #1
8003ec8: f000 fc82 bl 80047d0 <SetMotPerc>
break;
8003ecc: e006 b.n 8003edc <m1ch+0x170>
break;
8003ece: bf00 nop
8003ed0: e004 b.n 8003edc <m1ch+0x170>
break;
8003ed2: bf00 nop
8003ed4: e002 b.n 8003edc <m1ch+0x170>
break;
8003ed6: bf00 nop
8003ed8: e000 b.n 8003edc <m1ch+0x170>
break;
8003eda: bf00 nop
}
return m1st;
8003edc: 4b03 ldr r3, [pc, #12] @ (8003eec <m1ch+0x180>)
8003ede: 781b ldrb r3, [r3, #0]
}
8003ee0: 4618 mov r0, r3
8003ee2: 3768 adds r7, #104 @ 0x68
8003ee4: 46bd mov sp, r7
8003ee6: bd80 pop {r7, pc}
8003ee8: 2000000b .word 0x2000000b
8003eec: 20000466 .word 0x20000466
8003ef0: 0800f398 .word 0x0800f398
8003ef4: 200003a8 .word 0x200003a8
8003ef8: 200003fc .word 0x200003fc
8003efc: 20000438 .word 0x20000438
8003f00: 2000044c .word 0x2000044c
8003f04: 20000402 .word 0x20000402
8003f08: 20000418 .word 0x20000418
8003f0c: 2000043a .word 0x2000043a
08003f10 <m2ch>:
motMov_st m2ch(void){
8003f10: b580 push {r7, lr}
8003f12: b09c sub sp, #112 @ 0x70
8003f14: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
8003f16: 4b5d ldr r3, [pc, #372] @ (800408c <m2ch+0x17c>)
8003f18: 781a ldrb r2, [r3, #0]
8003f1a: 4b5d ldr r3, [pc, #372] @ (8004090 <m2ch+0x180>)
8003f1c: 781b ldrb r3, [r3, #0]
8003f1e: 429a cmp r2, r3
8003f20: d017 beq.n 8003f52 <m2ch+0x42>
memm2st=m2st;
8003f22: 4b5b ldr r3, [pc, #364] @ (8004090 <m2ch+0x180>)
8003f24: 781a ldrb r2, [r3, #0]
8003f26: 4b59 ldr r3, [pc, #356] @ (800408c <m2ch+0x17c>)
8003f28: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ch=%d",m2st);
8003f2a: 4b59 ldr r3, [pc, #356] @ (8004090 <m2ch+0x180>)
8003f2c: 781b ldrb r3, [r3, #0]
8003f2e: 461a mov r2, r3
8003f30: 1d3b adds r3, r7, #4
8003f32: 4958 ldr r1, [pc, #352] @ (8004094 <m2ch+0x184>)
8003f34: 4618 mov r0, r3
8003f36: f00a fa69 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003f3a: 1d3b adds r3, r7, #4
8003f3c: 4618 mov r0, r3
8003f3e: f7fc f905 bl 800014c <strlen>
8003f42: 4603 mov r3, r0
8003f44: b29a uxth r2, r3
8003f46: 1d39 adds r1, r7, #4
8003f48: f04f 33ff mov.w r3, #4294967295
8003f4c: 4852 ldr r0, [pc, #328] @ (8004098 <m2ch+0x188>)
8003f4e: f005 fc6d bl 800982c <HAL_UART_Transmit>
}
if(rtCiclo<chM2start)m2st=motWaiting;
8003f52: 4b52 ldr r3, [pc, #328] @ (800409c <m2ch+0x18c>)
8003f54: 881b ldrh r3, [r3, #0]
8003f56: b29a uxth r2, r3
8003f58: 4b51 ldr r3, [pc, #324] @ (80040a0 <m2ch+0x190>)
8003f5a: 881b ldrh r3, [r3, #0]
8003f5c: 429a cmp r2, r3
8003f5e: d202 bcs.n 8003f66 <m2ch+0x56>
8003f60: 4b4b ldr r3, [pc, #300] @ (8004090 <m2ch+0x180>)
8003f62: 2200 movs r2, #0
8003f64: 701a strb r2, [r3, #0]
switch(m2st){
8003f66: 4b4a ldr r3, [pc, #296] @ (8004090 <m2ch+0x180>)
8003f68: 781b ldrb r3, [r3, #0]
8003f6a: 2b03 cmp r3, #3
8003f6c: d876 bhi.n 800405c <m2ch+0x14c>
8003f6e: a201 add r2, pc, #4 @ (adr r2, 8003f74 <m2ch+0x64>)
8003f70: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003f74: 08003f85 .word 0x08003f85
8003f78: 08003fd1 .word 0x08003fd1
8003f7c: 08004001 .word 0x08004001
8003f80: 08004033 .word 0x08004033
case motWaiting:
SetMotPerc(M2,FW,0);
8003f84: 2200 movs r2, #0
8003f86: 2100 movs r1, #0
8003f88: 2002 movs r0, #2
8003f8a: f000 fc21 bl 80047d0 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003f8e: 2200 movs r2, #0
8003f90: 2101 movs r1, #1
8003f92: 2002 movs r0, #2
8003f94: f000 fc1c bl 80047d0 <SetMotPerc>
if(rtCiclo>=chM2start){
8003f98: 4b40 ldr r3, [pc, #256] @ (800409c <m2ch+0x18c>)
8003f9a: 881b ldrh r3, [r3, #0]
8003f9c: b29a uxth r2, r3
8003f9e: 4b40 ldr r3, [pc, #256] @ (80040a0 <m2ch+0x190>)
8003fa0: 881b ldrh r3, [r3, #0]
8003fa2: 429a cmp r2, r3
8003fa4: d365 bcc.n 8004072 <m2ch+0x162>
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT);
8003fa6: 4b3f ldr r3, [pc, #252] @ (80040a4 <m2ch+0x194>)
8003fa8: 885b ldrh r3, [r3, #2]
8003faa: b2da uxtb r2, r3
8003fac: 4b3e ldr r3, [pc, #248] @ (80040a8 <m2ch+0x198>)
8003fae: 881b ldrh r3, [r3, #0]
8003fb0: b2d9 uxtb r1, r3
8003fb2: 4b3e ldr r3, [pc, #248] @ (80040ac <m2ch+0x19c>)
8003fb4: 881b ldrh r3, [r3, #0]
8003fb6: b2db uxtb r3, r3
8003fb8: 2000 movs r0, #0
8003fba: 9001 str r0, [sp, #4]
8003fbc: 9300 str r3, [sp, #0]
8003fbe: 460b mov r3, r1
8003fc0: 2100 movs r1, #0
8003fc2: 2002 movs r0, #2
8003fc4: f000 fd84 bl 8004ad0 <ramp>
m2st=motStartRamp;
8003fc8: 4b31 ldr r3, [pc, #196] @ (8004090 <m2ch+0x180>)
8003fca: 2201 movs r2, #1
8003fcc: 701a strb r2, [r3, #0]
}
break;
8003fce: e050 b.n 8004072 <m2ch+0x162>
case motStartRamp:
if(ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE){
8003fd0: 4b34 ldr r3, [pc, #208] @ (80040a4 <m2ch+0x194>)
8003fd2: 885b ldrh r3, [r3, #2]
8003fd4: b2da uxtb r2, r3
8003fd6: 4b34 ldr r3, [pc, #208] @ (80040a8 <m2ch+0x198>)
8003fd8: 881b ldrh r3, [r3, #0]
8003fda: b2d9 uxtb r1, r3
8003fdc: 4b33 ldr r3, [pc, #204] @ (80040ac <m2ch+0x19c>)
8003fde: 881b ldrh r3, [r3, #0]
8003fe0: b2db uxtb r3, r3
8003fe2: 200a movs r0, #10
8003fe4: 9001 str r0, [sp, #4]
8003fe6: 9300 str r3, [sp, #0]
8003fe8: 460b mov r3, r1
8003fea: 2100 movs r1, #0
8003fec: 2002 movs r0, #2
8003fee: f000 fd6f bl 8004ad0 <ramp>
8003ff2: 4603 mov r3, r0
8003ff4: 2b00 cmp r3, #0
8003ff6: d13e bne.n 8004076 <m2ch+0x166>
m2st=motWaitingTime;
8003ff8: 4b25 ldr r3, [pc, #148] @ (8004090 <m2ch+0x180>)
8003ffa: 2202 movs r2, #2
8003ffc: 701a strb r2, [r3, #0]
}
break;
8003ffe: e03a b.n 8004076 <m2ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM2stop){
8004000: 4b26 ldr r3, [pc, #152] @ (800409c <m2ch+0x18c>)
8004002: 881b ldrh r3, [r3, #0]
8004004: b29a uxth r2, r3
8004006: 4b2a ldr r3, [pc, #168] @ (80040b0 <m2ch+0x1a0>)
8004008: 881b ldrh r3, [r3, #0]
800400a: 429a cmp r2, r3
800400c: d335 bcc.n 800407a <m2ch+0x16a>
(void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT);
800400e: 4b26 ldr r3, [pc, #152] @ (80040a8 <m2ch+0x198>)
8004010: 881b ldrh r3, [r3, #0]
8004012: b2da uxtb r2, r3
8004014: 4b25 ldr r3, [pc, #148] @ (80040ac <m2ch+0x19c>)
8004016: 881b ldrh r3, [r3, #0]
8004018: b2db uxtb r3, r3
800401a: 2100 movs r1, #0
800401c: 9101 str r1, [sp, #4]
800401e: 9300 str r3, [sp, #0]
8004020: 2300 movs r3, #0
8004022: 2100 movs r1, #0
8004024: 2002 movs r0, #2
8004026: f000 fd53 bl 8004ad0 <ramp>
m2st=motStopRamp;
800402a: 4b19 ldr r3, [pc, #100] @ (8004090 <m2ch+0x180>)
800402c: 2203 movs r2, #3
800402e: 701a strb r2, [r3, #0]
}
break;
8004030: e023 b.n 800407a <m2ch+0x16a>
case motStopRamp:
if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){
8004032: 4b1d ldr r3, [pc, #116] @ (80040a8 <m2ch+0x198>)
8004034: 881b ldrh r3, [r3, #0]
8004036: b2da uxtb r2, r3
8004038: 4b1c ldr r3, [pc, #112] @ (80040ac <m2ch+0x19c>)
800403a: 881b ldrh r3, [r3, #0]
800403c: b2db uxtb r3, r3
800403e: 210a movs r1, #10
8004040: 9101 str r1, [sp, #4]
8004042: 9300 str r3, [sp, #0]
8004044: 2300 movs r3, #0
8004046: 2100 movs r1, #0
8004048: 2002 movs r0, #2
800404a: f000 fd41 bl 8004ad0 <ramp>
800404e: 4603 mov r3, r0
8004050: 2b00 cmp r3, #0
8004052: d114 bne.n 800407e <m2ch+0x16e>
m2st=motStop;
8004054: 4b0e ldr r3, [pc, #56] @ (8004090 <m2ch+0x180>)
8004056: 2204 movs r2, #4
8004058: 701a strb r2, [r3, #0]
}
break;
800405a: e010 b.n 800407e <m2ch+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
800405c: 2200 movs r2, #0
800405e: 2100 movs r1, #0
8004060: 2002 movs r0, #2
8004062: f000 fbb5 bl 80047d0 <SetMotPerc>
SetMotPerc(M2,BW,0);
8004066: 2200 movs r2, #0
8004068: 2101 movs r1, #1
800406a: 2002 movs r0, #2
800406c: f000 fbb0 bl 80047d0 <SetMotPerc>
break;
8004070: e006 b.n 8004080 <m2ch+0x170>
break;
8004072: bf00 nop
8004074: e004 b.n 8004080 <m2ch+0x170>
break;
8004076: bf00 nop
8004078: e002 b.n 8004080 <m2ch+0x170>
break;
800407a: bf00 nop
800407c: e000 b.n 8004080 <m2ch+0x170>
break;
800407e: bf00 nop
}
return m2st;
8004080: 4b03 ldr r3, [pc, #12] @ (8004090 <m2ch+0x180>)
8004082: 781b ldrb r3, [r3, #0]
}
8004084: 4618 mov r0, r3
8004086: 3768 adds r7, #104 @ 0x68
8004088: 46bd mov sp, r7
800408a: bd80 pop {r7, pc}
800408c: 2000000c .word 0x2000000c
8004090: 20000467 .word 0x20000467
8004094: 0800f3a4 .word 0x0800f3a4
8004098: 200003a8 .word 0x200003a8
800409c: 200003fc .word 0x200003fc
80040a0: 2000043c .word 0x2000043c
80040a4: 2000044c .word 0x2000044c
80040a8: 20000406 .word 0x20000406
80040ac: 20000418 .word 0x20000418
80040b0: 2000043e .word 0x2000043e
080040b4 <m3ch>:
motMov_st m3ch(void){
80040b4: b580 push {r7, lr}
80040b6: b09c sub sp, #112 @ 0x70
80040b8: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
80040ba: 4b5d ldr r3, [pc, #372] @ (8004230 <m3ch+0x17c>)
80040bc: 781a ldrb r2, [r3, #0]
80040be: 4b5d ldr r3, [pc, #372] @ (8004234 <m3ch+0x180>)
80040c0: 781b ldrb r3, [r3, #0]
80040c2: 429a cmp r2, r3
80040c4: d017 beq.n 80040f6 <m3ch+0x42>
memm3st=m3st;
80040c6: 4b5b ldr r3, [pc, #364] @ (8004234 <m3ch+0x180>)
80040c8: 781a ldrb r2, [r3, #0]
80040ca: 4b59 ldr r3, [pc, #356] @ (8004230 <m3ch+0x17c>)
80040cc: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ch=%d",m3st);
80040ce: 4b59 ldr r3, [pc, #356] @ (8004234 <m3ch+0x180>)
80040d0: 781b ldrb r3, [r3, #0]
80040d2: 461a mov r2, r3
80040d4: 1d3b adds r3, r7, #4
80040d6: 4958 ldr r1, [pc, #352] @ (8004238 <m3ch+0x184>)
80040d8: 4618 mov r0, r3
80040da: f00a f997 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80040de: 1d3b adds r3, r7, #4
80040e0: 4618 mov r0, r3
80040e2: f7fc f833 bl 800014c <strlen>
80040e6: 4603 mov r3, r0
80040e8: b29a uxth r2, r3
80040ea: 1d39 adds r1, r7, #4
80040ec: f04f 33ff mov.w r3, #4294967295
80040f0: 4852 ldr r0, [pc, #328] @ (800423c <m3ch+0x188>)
80040f2: f005 fb9b bl 800982c <HAL_UART_Transmit>
}
if(rtCiclo<chM3start)m3st=motWaiting;
80040f6: 4b52 ldr r3, [pc, #328] @ (8004240 <m3ch+0x18c>)
80040f8: 881b ldrh r3, [r3, #0]
80040fa: b29a uxth r2, r3
80040fc: 4b51 ldr r3, [pc, #324] @ (8004244 <m3ch+0x190>)
80040fe: 881b ldrh r3, [r3, #0]
8004100: 429a cmp r2, r3
8004102: d202 bcs.n 800410a <m3ch+0x56>
8004104: 4b4b ldr r3, [pc, #300] @ (8004234 <m3ch+0x180>)
8004106: 2200 movs r2, #0
8004108: 701a strb r2, [r3, #0]
switch(m3st){
800410a: 4b4a ldr r3, [pc, #296] @ (8004234 <m3ch+0x180>)
800410c: 781b ldrb r3, [r3, #0]
800410e: 2b03 cmp r3, #3
8004110: d876 bhi.n 8004200 <m3ch+0x14c>
8004112: a201 add r2, pc, #4 @ (adr r2, 8004118 <m3ch+0x64>)
8004114: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004118: 08004129 .word 0x08004129
800411c: 08004175 .word 0x08004175
8004120: 080041a5 .word 0x080041a5
8004124: 080041d7 .word 0x080041d7
case motWaiting:
SetMotPerc(M3,FW,0);
8004128: 2200 movs r2, #0
800412a: 2100 movs r1, #0
800412c: 2003 movs r0, #3
800412e: f000 fb4f bl 80047d0 <SetMotPerc>
SetMotPerc(M3,BW,0);
8004132: 2200 movs r2, #0
8004134: 2101 movs r1, #1
8004136: 2003 movs r0, #3
8004138: f000 fb4a bl 80047d0 <SetMotPerc>
if(rtCiclo>=chM3start){
800413c: 4b40 ldr r3, [pc, #256] @ (8004240 <m3ch+0x18c>)
800413e: 881b ldrh r3, [r3, #0]
8004140: b29a uxth r2, r3
8004142: 4b40 ldr r3, [pc, #256] @ (8004244 <m3ch+0x190>)
8004144: 881b ldrh r3, [r3, #0]
8004146: 429a cmp r2, r3
8004148: d365 bcc.n 8004216 <m3ch+0x162>
(void)ramp(M3,BW,mrampstart[M3-1],m2pwmch,tramp,RAMPINIT);
800414a: 4b3f ldr r3, [pc, #252] @ (8004248 <m3ch+0x194>)
800414c: 889b ldrh r3, [r3, #4]
800414e: b2da uxtb r2, r3
8004150: 4b3e ldr r3, [pc, #248] @ (800424c <m3ch+0x198>)
8004152: 881b ldrh r3, [r3, #0]
8004154: b2d9 uxtb r1, r3
8004156: 4b3e ldr r3, [pc, #248] @ (8004250 <m3ch+0x19c>)
8004158: 881b ldrh r3, [r3, #0]
800415a: b2db uxtb r3, r3
800415c: 2000 movs r0, #0
800415e: 9001 str r0, [sp, #4]
8004160: 9300 str r3, [sp, #0]
8004162: 460b mov r3, r1
8004164: 2101 movs r1, #1
8004166: 2003 movs r0, #3
8004168: f000 fcb2 bl 8004ad0 <ramp>
m3st=motStartRamp;
800416c: 4b31 ldr r3, [pc, #196] @ (8004234 <m3ch+0x180>)
800416e: 2201 movs r2, #1
8004170: 701a strb r2, [r3, #0]
}
break;
8004172: e050 b.n 8004216 <m3ch+0x162>
case motStartRamp:
if(ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){
8004174: 4b34 ldr r3, [pc, #208] @ (8004248 <m3ch+0x194>)
8004176: 889b ldrh r3, [r3, #4]
8004178: b2da uxtb r2, r3
800417a: 4b36 ldr r3, [pc, #216] @ (8004254 <m3ch+0x1a0>)
800417c: 881b ldrh r3, [r3, #0]
800417e: b2d9 uxtb r1, r3
8004180: 4b33 ldr r3, [pc, #204] @ (8004250 <m3ch+0x19c>)
8004182: 881b ldrh r3, [r3, #0]
8004184: b2db uxtb r3, r3
8004186: 200a movs r0, #10
8004188: 9001 str r0, [sp, #4]
800418a: 9300 str r3, [sp, #0]
800418c: 460b mov r3, r1
800418e: 2101 movs r1, #1
8004190: 2003 movs r0, #3
8004192: f000 fc9d bl 8004ad0 <ramp>
8004196: 4603 mov r3, r0
8004198: 2b00 cmp r3, #0
800419a: d13e bne.n 800421a <m3ch+0x166>
m3st=motWaitingTime;
800419c: 4b25 ldr r3, [pc, #148] @ (8004234 <m3ch+0x180>)
800419e: 2202 movs r2, #2
80041a0: 701a strb r2, [r3, #0]
}
break;
80041a2: e03a b.n 800421a <m3ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM3stop){
80041a4: 4b26 ldr r3, [pc, #152] @ (8004240 <m3ch+0x18c>)
80041a6: 881b ldrh r3, [r3, #0]
80041a8: b29a uxth r2, r3
80041aa: 4b2b ldr r3, [pc, #172] @ (8004258 <m3ch+0x1a4>)
80041ac: 881b ldrh r3, [r3, #0]
80041ae: 429a cmp r2, r3
80041b0: d335 bcc.n 800421e <m3ch+0x16a>
(void)ramp(M3,BW,m3pwmch,0,tramp,RAMPINIT);
80041b2: 4b28 ldr r3, [pc, #160] @ (8004254 <m3ch+0x1a0>)
80041b4: 881b ldrh r3, [r3, #0]
80041b6: b2da uxtb r2, r3
80041b8: 4b25 ldr r3, [pc, #148] @ (8004250 <m3ch+0x19c>)
80041ba: 881b ldrh r3, [r3, #0]
80041bc: b2db uxtb r3, r3
80041be: 2100 movs r1, #0
80041c0: 9101 str r1, [sp, #4]
80041c2: 9300 str r3, [sp, #0]
80041c4: 2300 movs r3, #0
80041c6: 2101 movs r1, #1
80041c8: 2003 movs r0, #3
80041ca: f000 fc81 bl 8004ad0 <ramp>
m3st=motStopRamp;
80041ce: 4b19 ldr r3, [pc, #100] @ (8004234 <m3ch+0x180>)
80041d0: 2203 movs r2, #3
80041d2: 701a strb r2, [r3, #0]
}
break;
80041d4: e023 b.n 800421e <m3ch+0x16a>
case motStopRamp:
if(ramp(M3,BW,m3pwmch,0,tramp,RAMPRUN)==DONE){
80041d6: 4b1f ldr r3, [pc, #124] @ (8004254 <m3ch+0x1a0>)
80041d8: 881b ldrh r3, [r3, #0]
80041da: b2da uxtb r2, r3
80041dc: 4b1c ldr r3, [pc, #112] @ (8004250 <m3ch+0x19c>)
80041de: 881b ldrh r3, [r3, #0]
80041e0: b2db uxtb r3, r3
80041e2: 210a movs r1, #10
80041e4: 9101 str r1, [sp, #4]
80041e6: 9300 str r3, [sp, #0]
80041e8: 2300 movs r3, #0
80041ea: 2101 movs r1, #1
80041ec: 2003 movs r0, #3
80041ee: f000 fc6f bl 8004ad0 <ramp>
80041f2: 4603 mov r3, r0
80041f4: 2b00 cmp r3, #0
80041f6: d114 bne.n 8004222 <m3ch+0x16e>
m3st=motStop;
80041f8: 4b0e ldr r3, [pc, #56] @ (8004234 <m3ch+0x180>)
80041fa: 2204 movs r2, #4
80041fc: 701a strb r2, [r3, #0]
}
break;
80041fe: e010 b.n 8004222 <m3ch+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8004200: 2200 movs r2, #0
8004202: 2100 movs r1, #0
8004204: 2003 movs r0, #3
8004206: f000 fae3 bl 80047d0 <SetMotPerc>
SetMotPerc(M3,BW,0);
800420a: 2200 movs r2, #0
800420c: 2101 movs r1, #1
800420e: 2003 movs r0, #3
8004210: f000 fade bl 80047d0 <SetMotPerc>
break;
8004214: e006 b.n 8004224 <m3ch+0x170>
break;
8004216: bf00 nop
8004218: e004 b.n 8004224 <m3ch+0x170>
break;
800421a: bf00 nop
800421c: e002 b.n 8004224 <m3ch+0x170>
break;
800421e: bf00 nop
8004220: e000 b.n 8004224 <m3ch+0x170>
break;
8004222: bf00 nop
}
return m3st;
8004224: 4b03 ldr r3, [pc, #12] @ (8004234 <m3ch+0x180>)
8004226: 781b ldrb r3, [r3, #0]
}
8004228: 4618 mov r0, r3
800422a: 3768 adds r7, #104 @ 0x68
800422c: 46bd mov sp, r7
800422e: bd80 pop {r7, pc}
8004230: 2000000d .word 0x2000000d
8004234: 20000468 .word 0x20000468
8004238: 0800f3b0 .word 0x0800f3b0
800423c: 200003a8 .word 0x200003a8
8004240: 200003fc .word 0x200003fc
8004244: 20000440 .word 0x20000440
8004248: 2000044c .word 0x2000044c
800424c: 20000406 .word 0x20000406
8004250: 20000418 .word 0x20000418
8004254: 2000040a .word 0x2000040a
8004258: 20000442 .word 0x20000442
0800425c <m4ch>:
motMov_st m4ch(void){
800425c: b580 push {r7, lr}
800425e: b09c sub sp, #112 @ 0x70
8004260: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8004262: 4b5d ldr r3, [pc, #372] @ (80043d8 <m4ch+0x17c>)
8004264: 781a ldrb r2, [r3, #0]
8004266: 4b5d ldr r3, [pc, #372] @ (80043dc <m4ch+0x180>)
8004268: 781b ldrb r3, [r3, #0]
800426a: 429a cmp r2, r3
800426c: d017 beq.n 800429e <m4ch+0x42>
memm4st=m4st;
800426e: 4b5b ldr r3, [pc, #364] @ (80043dc <m4ch+0x180>)
8004270: 781a ldrb r2, [r3, #0]
8004272: 4b59 ldr r3, [pc, #356] @ (80043d8 <m4ch+0x17c>)
8004274: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ch=%d",m4st);
8004276: 4b59 ldr r3, [pc, #356] @ (80043dc <m4ch+0x180>)
8004278: 781b ldrb r3, [r3, #0]
800427a: 461a mov r2, r3
800427c: 1d3b adds r3, r7, #4
800427e: 4958 ldr r1, [pc, #352] @ (80043e0 <m4ch+0x184>)
8004280: 4618 mov r0, r3
8004282: f00a f8c3 bl 800e40c <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8004286: 1d3b adds r3, r7, #4
8004288: 4618 mov r0, r3
800428a: f7fb ff5f bl 800014c <strlen>
800428e: 4603 mov r3, r0
8004290: b29a uxth r2, r3
8004292: 1d39 adds r1, r7, #4
8004294: f04f 33ff mov.w r3, #4294967295
8004298: 4852 ldr r0, [pc, #328] @ (80043e4 <m4ch+0x188>)
800429a: f005 fac7 bl 800982c <HAL_UART_Transmit>
}
if(rtCiclo<chM4start)m4st=motWaiting;
800429e: 4b52 ldr r3, [pc, #328] @ (80043e8 <m4ch+0x18c>)
80042a0: 881b ldrh r3, [r3, #0]
80042a2: b29a uxth r2, r3
80042a4: 4b51 ldr r3, [pc, #324] @ (80043ec <m4ch+0x190>)
80042a6: 881b ldrh r3, [r3, #0]
80042a8: 429a cmp r2, r3
80042aa: d202 bcs.n 80042b2 <m4ch+0x56>
80042ac: 4b4b ldr r3, [pc, #300] @ (80043dc <m4ch+0x180>)
80042ae: 2200 movs r2, #0
80042b0: 701a strb r2, [r3, #0]
switch(m4st){
80042b2: 4b4a ldr r3, [pc, #296] @ (80043dc <m4ch+0x180>)
80042b4: 781b ldrb r3, [r3, #0]
80042b6: 2b03 cmp r3, #3
80042b8: d876 bhi.n 80043a8 <m4ch+0x14c>
80042ba: a201 add r2, pc, #4 @ (adr r2, 80042c0 <m4ch+0x64>)
80042bc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80042c0: 080042d1 .word 0x080042d1
80042c4: 0800431d .word 0x0800431d
80042c8: 0800434d .word 0x0800434d
80042cc: 0800437f .word 0x0800437f
case motWaiting:
SetMotPerc(M4,FW,0);
80042d0: 2200 movs r2, #0
80042d2: 2100 movs r1, #0
80042d4: 2004 movs r0, #4
80042d6: f000 fa7b bl 80047d0 <SetMotPerc>
SetMotPerc(M4,BW,0);
80042da: 2200 movs r2, #0
80042dc: 2101 movs r1, #1
80042de: 2004 movs r0, #4
80042e0: f000 fa76 bl 80047d0 <SetMotPerc>
if(rtCiclo>=chM4start){
80042e4: 4b40 ldr r3, [pc, #256] @ (80043e8 <m4ch+0x18c>)
80042e6: 881b ldrh r3, [r3, #0]
80042e8: b29a uxth r2, r3
80042ea: 4b40 ldr r3, [pc, #256] @ (80043ec <m4ch+0x190>)
80042ec: 881b ldrh r3, [r3, #0]
80042ee: 429a cmp r2, r3
80042f0: d365 bcc.n 80043be <m4ch+0x162>
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT);
80042f2: 4b3f ldr r3, [pc, #252] @ (80043f0 <m4ch+0x194>)
80042f4: 88db ldrh r3, [r3, #6]
80042f6: b2da uxtb r2, r3
80042f8: 4b3e ldr r3, [pc, #248] @ (80043f4 <m4ch+0x198>)
80042fa: 881b ldrh r3, [r3, #0]
80042fc: b2d9 uxtb r1, r3
80042fe: 4b3e ldr r3, [pc, #248] @ (80043f8 <m4ch+0x19c>)
8004300: 881b ldrh r3, [r3, #0]
8004302: b2db uxtb r3, r3
8004304: 2000 movs r0, #0
8004306: 9001 str r0, [sp, #4]
8004308: 9300 str r3, [sp, #0]
800430a: 460b mov r3, r1
800430c: 2101 movs r1, #1
800430e: 2004 movs r0, #4
8004310: f000 fbde bl 8004ad0 <ramp>
m4st=motStartRamp;
8004314: 4b31 ldr r3, [pc, #196] @ (80043dc <m4ch+0x180>)
8004316: 2201 movs r2, #1
8004318: 701a strb r2, [r3, #0]
}
break;
800431a: e050 b.n 80043be <m4ch+0x162>
case motStartRamp:
if(ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE){
800431c: 4b34 ldr r3, [pc, #208] @ (80043f0 <m4ch+0x194>)
800431e: 88db ldrh r3, [r3, #6]
8004320: b2da uxtb r2, r3
8004322: 4b34 ldr r3, [pc, #208] @ (80043f4 <m4ch+0x198>)
8004324: 881b ldrh r3, [r3, #0]
8004326: b2d9 uxtb r1, r3
8004328: 4b33 ldr r3, [pc, #204] @ (80043f8 <m4ch+0x19c>)
800432a: 881b ldrh r3, [r3, #0]
800432c: b2db uxtb r3, r3
800432e: 200a movs r0, #10
8004330: 9001 str r0, [sp, #4]
8004332: 9300 str r3, [sp, #0]
8004334: 460b mov r3, r1
8004336: 2101 movs r1, #1
8004338: 2004 movs r0, #4
800433a: f000 fbc9 bl 8004ad0 <ramp>
800433e: 4603 mov r3, r0
8004340: 2b00 cmp r3, #0
8004342: d13e bne.n 80043c2 <m4ch+0x166>
m4st=motWaitingTime;
8004344: 4b25 ldr r3, [pc, #148] @ (80043dc <m4ch+0x180>)
8004346: 2202 movs r2, #2
8004348: 701a strb r2, [r3, #0]
}
break;
800434a: e03a b.n 80043c2 <m4ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM4stop){
800434c: 4b26 ldr r3, [pc, #152] @ (80043e8 <m4ch+0x18c>)
800434e: 881b ldrh r3, [r3, #0]
8004350: b29a uxth r2, r3
8004352: 4b2a ldr r3, [pc, #168] @ (80043fc <m4ch+0x1a0>)
8004354: 881b ldrh r3, [r3, #0]
8004356: 429a cmp r2, r3
8004358: d335 bcc.n 80043c6 <m4ch+0x16a>
(void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT);
800435a: 4b26 ldr r3, [pc, #152] @ (80043f4 <m4ch+0x198>)
800435c: 881b ldrh r3, [r3, #0]
800435e: b2da uxtb r2, r3
8004360: 4b25 ldr r3, [pc, #148] @ (80043f8 <m4ch+0x19c>)
8004362: 881b ldrh r3, [r3, #0]
8004364: b2db uxtb r3, r3
8004366: 2100 movs r1, #0
8004368: 9101 str r1, [sp, #4]
800436a: 9300 str r3, [sp, #0]
800436c: 2300 movs r3, #0
800436e: 2101 movs r1, #1
8004370: 2004 movs r0, #4
8004372: f000 fbad bl 8004ad0 <ramp>
m4st=motStopRamp;
8004376: 4b19 ldr r3, [pc, #100] @ (80043dc <m4ch+0x180>)
8004378: 2203 movs r2, #3
800437a: 701a strb r2, [r3, #0]
}
break;
800437c: e023 b.n 80043c6 <m4ch+0x16a>
case motStopRamp:
if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){
800437e: 4b1d ldr r3, [pc, #116] @ (80043f4 <m4ch+0x198>)
8004380: 881b ldrh r3, [r3, #0]
8004382: b2da uxtb r2, r3
8004384: 4b1c ldr r3, [pc, #112] @ (80043f8 <m4ch+0x19c>)
8004386: 881b ldrh r3, [r3, #0]
8004388: b2db uxtb r3, r3
800438a: 210a movs r1, #10
800438c: 9101 str r1, [sp, #4]
800438e: 9300 str r3, [sp, #0]
8004390: 2300 movs r3, #0
8004392: 2101 movs r1, #1
8004394: 2004 movs r0, #4
8004396: f000 fb9b bl 8004ad0 <ramp>
800439a: 4603 mov r3, r0
800439c: 2b00 cmp r3, #0
800439e: d114 bne.n 80043ca <m4ch+0x16e>
m4st=motStop;
80043a0: 4b0e ldr r3, [pc, #56] @ (80043dc <m4ch+0x180>)
80043a2: 2204 movs r2, #4
80043a4: 701a strb r2, [r3, #0]
}
break;
80043a6: e010 b.n 80043ca <m4ch+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
80043a8: 2200 movs r2, #0
80043aa: 2100 movs r1, #0
80043ac: 2004 movs r0, #4
80043ae: f000 fa0f bl 80047d0 <SetMotPerc>
SetMotPerc(M4,BW,0);
80043b2: 2200 movs r2, #0
80043b4: 2101 movs r1, #1
80043b6: 2004 movs r0, #4
80043b8: f000 fa0a bl 80047d0 <SetMotPerc>
break;
80043bc: e006 b.n 80043cc <m4ch+0x170>
break;
80043be: bf00 nop
80043c0: e004 b.n 80043cc <m4ch+0x170>
break;
80043c2: bf00 nop
80043c4: e002 b.n 80043cc <m4ch+0x170>
break;
80043c6: bf00 nop
80043c8: e000 b.n 80043cc <m4ch+0x170>
break;
80043ca: bf00 nop
}
return m4st;
80043cc: 4b03 ldr r3, [pc, #12] @ (80043dc <m4ch+0x180>)
80043ce: 781b ldrb r3, [r3, #0]
}
80043d0: 4618 mov r0, r3
80043d2: 3768 adds r7, #104 @ 0x68
80043d4: 46bd mov sp, r7
80043d6: bd80 pop {r7, pc}
80043d8: 2000000e .word 0x2000000e
80043dc: 20000469 .word 0x20000469
80043e0: 0800f3bc .word 0x0800f3bc
80043e4: 200003a8 .word 0x200003a8
80043e8: 200003fc .word 0x200003fc
80043ec: 20000444 .word 0x20000444
80043f0: 2000044c .word 0x2000044c
80043f4: 2000040e .word 0x2000040e
80043f8: 20000418 .word 0x20000418
80043fc: 20000446 .word 0x20000446
08004400 <IsPwmRunning>:
extern volatile uint16_t rtramp[4];
extern uint16_t mrampstart[4];
extern UART_HandleTypeDef huart1;
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8004400: b580 push {r7, lr}
8004402: b084 sub sp, #16
8004404: af00 add r7, sp, #0
8004406: 6078 str r0, [r7, #4]
8004408: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
800440a: 6839 ldr r1, [r7, #0]
800440c: 6878 ldr r0, [r7, #4]
800440e: f004 fe86 bl 800911e <HAL_TIM_GetChannelState>
8004412: 4603 mov r3, r0
8004414: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
8004416: 7bfb ldrb r3, [r7, #15]
8004418: 2b02 cmp r3, #2
800441a: bf0c ite eq
800441c: 2301 moveq r3, #1
800441e: 2300 movne r3, #0
8004420: b2db uxtb r3, r3
}
8004422: 4618 mov r0, r3
8004424: 3710 adds r7, #16
8004426: 46bd mov sp, r7
8004428: bd80 pop {r7, pc}
0800442a <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
800442a: b580 push {r7, lr}
800442c: b082 sub sp, #8
800442e: af00 add r7, sp, #0
8004430: 6078 str r0, [r7, #4]
8004432: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
8004434: 6839 ldr r1, [r7, #0]
8004436: 6878 ldr r0, [r7, #4]
8004438: f004 fc84 bl 8008d44 <HAL_TIM_PWM_Stop>
}
800443c: bf00 nop
800443e: 3708 adds r7, #8
8004440: 46bd mov sp, r7
8004442: bd80 pop {r7, pc}
08004444 <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8004444: b580 push {r7, lr}
8004446: b084 sub sp, #16
8004448: af00 add r7, sp, #0
800444a: 60f8 str r0, [r7, #12]
800444c: 60b9 str r1, [r7, #8]
800444e: 4613 mov r3, r2
8004450: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004452: 68bb ldr r3, [r7, #8]
8004454: 2b00 cmp r3, #0
8004456: d104 bne.n 8004462 <StartMot+0x1e>
8004458: 68fb ldr r3, [r7, #12]
800445a: 681b ldr r3, [r3, #0]
800445c: 88fa ldrh r2, [r7, #6]
800445e: 635a str r2, [r3, #52] @ 0x34
8004460: e013 b.n 800448a <StartMot+0x46>
8004462: 68bb ldr r3, [r7, #8]
8004464: 2b04 cmp r3, #4
8004466: d104 bne.n 8004472 <StartMot+0x2e>
8004468: 68fb ldr r3, [r7, #12]
800446a: 681a ldr r2, [r3, #0]
800446c: 88fb ldrh r3, [r7, #6]
800446e: 6393 str r3, [r2, #56] @ 0x38
8004470: e00b b.n 800448a <StartMot+0x46>
8004472: 68bb ldr r3, [r7, #8]
8004474: 2b08 cmp r3, #8
8004476: d104 bne.n 8004482 <StartMot+0x3e>
8004478: 68fb ldr r3, [r7, #12]
800447a: 681a ldr r2, [r3, #0]
800447c: 88fb ldrh r3, [r7, #6]
800447e: 63d3 str r3, [r2, #60] @ 0x3c
8004480: e003 b.n 800448a <StartMot+0x46>
8004482: 68fb ldr r3, [r7, #12]
8004484: 681a ldr r2, [r3, #0]
8004486: 88fb ldrh r3, [r7, #6]
8004488: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
800448a: 68b9 ldr r1, [r7, #8]
800448c: 68f8 ldr r0, [r7, #12]
800448e: f004 fbb7 bl 8008c00 <HAL_TIM_PWM_Start>
}
8004492: bf00 nop
8004494: 3710 adds r7, #16
8004496: 46bd mov sp, r7
8004498: bd80 pop {r7, pc}
0800449a <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
800449a: b480 push {r7}
800449c: b085 sub sp, #20
800449e: af00 add r7, sp, #0
80044a0: 60f8 str r0, [r7, #12]
80044a2: 60b9 str r1, [r7, #8]
80044a4: 4613 mov r3, r2
80044a6: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80044a8: 68bb ldr r3, [r7, #8]
80044aa: 2b00 cmp r3, #0
80044ac: d104 bne.n 80044b8 <SetMotPwm+0x1e>
80044ae: 68fb ldr r3, [r7, #12]
80044b0: 681b ldr r3, [r3, #0]
80044b2: 88fa ldrh r2, [r7, #6]
80044b4: 635a str r2, [r3, #52] @ 0x34
}
80044b6: e013 b.n 80044e0 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80044b8: 68bb ldr r3, [r7, #8]
80044ba: 2b04 cmp r3, #4
80044bc: d104 bne.n 80044c8 <SetMotPwm+0x2e>
80044be: 68fb ldr r3, [r7, #12]
80044c0: 681a ldr r2, [r3, #0]
80044c2: 88fb ldrh r3, [r7, #6]
80044c4: 6393 str r3, [r2, #56] @ 0x38
}
80044c6: e00b b.n 80044e0 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80044c8: 68bb ldr r3, [r7, #8]
80044ca: 2b08 cmp r3, #8
80044cc: d104 bne.n 80044d8 <SetMotPwm+0x3e>
80044ce: 68fb ldr r3, [r7, #12]
80044d0: 681a ldr r2, [r3, #0]
80044d2: 88fb ldrh r3, [r7, #6]
80044d4: 63d3 str r3, [r2, #60] @ 0x3c
}
80044d6: e003 b.n 80044e0 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80044d8: 68fb ldr r3, [r7, #12]
80044da: 681a ldr r2, [r3, #0]
80044dc: 88fb ldrh r3, [r7, #6]
80044de: 6413 str r3, [r2, #64] @ 0x40
}
80044e0: bf00 nop
80044e2: 3714 adds r7, #20
80044e4: 46bd mov sp, r7
80044e6: bc80 pop {r7}
80044e8: 4770 bx lr
...
080044ec <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
80044ec: b580 push {r7, lr}
80044ee: b082 sub sp, #8
80044f0: af00 add r7, sp, #0
80044f2: 4603 mov r3, r0
80044f4: 71fb strb r3, [r7, #7]
80044f6: 460b mov r3, r1
80044f8: 71bb strb r3, [r7, #6]
80044fa: 4613 mov r3, r2
80044fc: 80bb strh r3, [r7, #4]
switch(mot){
80044fe: 79fb ldrb r3, [r7, #7]
8004500: 3b01 subs r3, #1
8004502: 2b03 cmp r3, #3
8004504: f200 8158 bhi.w 80047b8 <SetMot+0x2cc>
8004508: a201 add r2, pc, #4 @ (adr r2, 8004510 <SetMot+0x24>)
800450a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800450e: bf00 nop
8004510: 08004521 .word 0x08004521
8004514: 080045c3 .word 0x080045c3
8004518: 08004665 .word 0x08004665
800451c: 0800470f .word 0x0800470f
case 1:
if(dir==FW){
8004520: 79bb ldrb r3, [r7, #6]
8004522: 2b00 cmp r3, #0
8004524: d126 bne.n 8004574 <SetMot+0x88>
if(pwmval==0){
8004526: 88bb ldrh r3, [r7, #4]
8004528: 2b00 cmp r3, #0
800452a: d109 bne.n 8004540 <SetMot+0x54>
StopMot(timMot1,FWMot1);
800452c: 2100 movs r1, #0
800452e: 48a5 ldr r0, [pc, #660] @ (80047c4 <SetMot+0x2d8>)
8004530: f7ff ff7b bl 800442a <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004534: 2200 movs r2, #0
8004536: 2102 movs r1, #2
8004538: 48a3 ldr r0, [pc, #652] @ (80047c8 <SetMot+0x2dc>)
800453a: f002 f878 bl 800662e <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
800453e: e13c b.n 80047ba <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
8004540: 2100 movs r1, #0
8004542: 48a0 ldr r0, [pc, #640] @ (80047c4 <SetMot+0x2d8>)
8004544: f7ff ff5c bl 8004400 <IsPwmRunning>
8004548: 4603 mov r3, r0
800454a: 2b00 cmp r3, #0
800454c: d006 beq.n 800455c <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
800454e: 88bb ldrh r3, [r7, #4]
8004550: 461a mov r2, r3
8004552: 2100 movs r1, #0
8004554: 489b ldr r0, [pc, #620] @ (80047c4 <SetMot+0x2d8>)
8004556: f7ff ffa0 bl 800449a <SetMotPwm>
break;
800455a: e12e b.n 80047ba <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
800455c: 2201 movs r2, #1
800455e: 2102 movs r1, #2
8004560: 4899 ldr r0, [pc, #612] @ (80047c8 <SetMot+0x2dc>)
8004562: f002 f864 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
8004566: 88bb ldrh r3, [r7, #4]
8004568: 461a mov r2, r3
800456a: 2100 movs r1, #0
800456c: 4895 ldr r0, [pc, #596] @ (80047c4 <SetMot+0x2d8>)
800456e: f7ff ff69 bl 8004444 <StartMot>
break;
8004572: e122 b.n 80047ba <SetMot+0x2ce>
if(pwmval==0){
8004574: 88bb ldrh r3, [r7, #4]
8004576: 2b00 cmp r3, #0
8004578: d109 bne.n 800458e <SetMot+0xa2>
StopMot(timMot1,BWMot1);
800457a: 2104 movs r1, #4
800457c: 4891 ldr r0, [pc, #580] @ (80047c4 <SetMot+0x2d8>)
800457e: f7ff ff54 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004582: 2200 movs r2, #0
8004584: 2102 movs r1, #2
8004586: 4890 ldr r0, [pc, #576] @ (80047c8 <SetMot+0x2dc>)
8004588: f002 f851 bl 800662e <HAL_GPIO_WritePin>
break;
800458c: e115 b.n 80047ba <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
800458e: 2104 movs r1, #4
8004590: 488c ldr r0, [pc, #560] @ (80047c4 <SetMot+0x2d8>)
8004592: f7ff ff35 bl 8004400 <IsPwmRunning>
8004596: 4603 mov r3, r0
8004598: 2b00 cmp r3, #0
800459a: d006 beq.n 80045aa <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
800459c: 88bb ldrh r3, [r7, #4]
800459e: 461a mov r2, r3
80045a0: 2104 movs r1, #4
80045a2: 4888 ldr r0, [pc, #544] @ (80047c4 <SetMot+0x2d8>)
80045a4: f7ff ff79 bl 800449a <SetMotPwm>
break;
80045a8: e107 b.n 80047ba <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80045aa: 2201 movs r2, #1
80045ac: 2102 movs r1, #2
80045ae: 4886 ldr r0, [pc, #536] @ (80047c8 <SetMot+0x2dc>)
80045b0: f002 f83d bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
80045b4: 88bb ldrh r3, [r7, #4]
80045b6: 461a mov r2, r3
80045b8: 2104 movs r1, #4
80045ba: 4882 ldr r0, [pc, #520] @ (80047c4 <SetMot+0x2d8>)
80045bc: f7ff ff42 bl 8004444 <StartMot>
break;
80045c0: e0fb b.n 80047ba <SetMot+0x2ce>
case 2:
if(dir==FW){
80045c2: 79bb ldrb r3, [r7, #6]
80045c4: 2b00 cmp r3, #0
80045c6: d126 bne.n 8004616 <SetMot+0x12a>
if(pwmval==0){
80045c8: 88bb ldrh r3, [r7, #4]
80045ca: 2b00 cmp r3, #0
80045cc: d109 bne.n 80045e2 <SetMot+0xf6>
StopMot(timMot2,FWMot2);
80045ce: 2108 movs r1, #8
80045d0: 487c ldr r0, [pc, #496] @ (80047c4 <SetMot+0x2d8>)
80045d2: f7ff ff2a bl 800442a <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80045d6: 2200 movs r2, #0
80045d8: 2104 movs r1, #4
80045da: 487b ldr r0, [pc, #492] @ (80047c8 <SetMot+0x2dc>)
80045dc: f002 f827 bl 800662e <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
80045e0: e0eb b.n 80047ba <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
80045e2: 2108 movs r1, #8
80045e4: 4877 ldr r0, [pc, #476] @ (80047c4 <SetMot+0x2d8>)
80045e6: f7ff ff0b bl 8004400 <IsPwmRunning>
80045ea: 4603 mov r3, r0
80045ec: 2b00 cmp r3, #0
80045ee: d006 beq.n 80045fe <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
80045f0: 88bb ldrh r3, [r7, #4]
80045f2: 461a mov r2, r3
80045f4: 2108 movs r1, #8
80045f6: 4873 ldr r0, [pc, #460] @ (80047c4 <SetMot+0x2d8>)
80045f8: f7ff ff4f bl 800449a <SetMotPwm>
break;
80045fc: e0dd b.n 80047ba <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80045fe: 2201 movs r2, #1
8004600: 2104 movs r1, #4
8004602: 4871 ldr r0, [pc, #452] @ (80047c8 <SetMot+0x2dc>)
8004604: f002 f813 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8004608: 88bb ldrh r3, [r7, #4]
800460a: 461a mov r2, r3
800460c: 2108 movs r1, #8
800460e: 486d ldr r0, [pc, #436] @ (80047c4 <SetMot+0x2d8>)
8004610: f7ff ff18 bl 8004444 <StartMot>
break;
8004614: e0d1 b.n 80047ba <SetMot+0x2ce>
if(pwmval==0){
8004616: 88bb ldrh r3, [r7, #4]
8004618: 2b00 cmp r3, #0
800461a: d109 bne.n 8004630 <SetMot+0x144>
StopMot(timMot2,BWMot2);
800461c: 210c movs r1, #12
800461e: 4869 ldr r0, [pc, #420] @ (80047c4 <SetMot+0x2d8>)
8004620: f7ff ff03 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8004624: 2200 movs r2, #0
8004626: 2104 movs r1, #4
8004628: 4867 ldr r0, [pc, #412] @ (80047c8 <SetMot+0x2dc>)
800462a: f002 f800 bl 800662e <HAL_GPIO_WritePin>
break;
800462e: e0c4 b.n 80047ba <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
8004630: 210c movs r1, #12
8004632: 4864 ldr r0, [pc, #400] @ (80047c4 <SetMot+0x2d8>)
8004634: f7ff fee4 bl 8004400 <IsPwmRunning>
8004638: 4603 mov r3, r0
800463a: 2b00 cmp r3, #0
800463c: d006 beq.n 800464c <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
800463e: 88bb ldrh r3, [r7, #4]
8004640: 461a mov r2, r3
8004642: 210c movs r1, #12
8004644: 485f ldr r0, [pc, #380] @ (80047c4 <SetMot+0x2d8>)
8004646: f7ff ff28 bl 800449a <SetMotPwm>
break;
800464a: e0b6 b.n 80047ba <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
800464c: 2201 movs r2, #1
800464e: 2104 movs r1, #4
8004650: 485d ldr r0, [pc, #372] @ (80047c8 <SetMot+0x2dc>)
8004652: f001 ffec bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8004656: 88bb ldrh r3, [r7, #4]
8004658: 461a mov r2, r3
800465a: 210c movs r1, #12
800465c: 4859 ldr r0, [pc, #356] @ (80047c4 <SetMot+0x2d8>)
800465e: f7ff fef1 bl 8004444 <StartMot>
break;
8004662: e0aa b.n 80047ba <SetMot+0x2ce>
case 3:
if(dir==FW){
8004664: 79bb ldrb r3, [r7, #6]
8004666: 2b00 cmp r3, #0
8004668: d128 bne.n 80046bc <SetMot+0x1d0>
if(pwmval==0){
800466a: 88bb ldrh r3, [r7, #4]
800466c: 2b00 cmp r3, #0
800466e: d10a bne.n 8004686 <SetMot+0x19a>
StopMot(timMot3,FWMot3);
8004670: 2100 movs r1, #0
8004672: 4856 ldr r0, [pc, #344] @ (80047cc <SetMot+0x2e0>)
8004674: f7ff fed9 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004678: 2200 movs r2, #0
800467a: f44f 6180 mov.w r1, #1024 @ 0x400
800467e: 4852 ldr r0, [pc, #328] @ (80047c8 <SetMot+0x2dc>)
8004680: f001 ffd5 bl 800662e <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8004684: e099 b.n 80047ba <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
8004686: 2100 movs r1, #0
8004688: 4850 ldr r0, [pc, #320] @ (80047cc <SetMot+0x2e0>)
800468a: f7ff feb9 bl 8004400 <IsPwmRunning>
800468e: 4603 mov r3, r0
8004690: 2b00 cmp r3, #0
8004692: d006 beq.n 80046a2 <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
8004694: 88bb ldrh r3, [r7, #4]
8004696: 461a mov r2, r3
8004698: 2100 movs r1, #0
800469a: 484c ldr r0, [pc, #304] @ (80047cc <SetMot+0x2e0>)
800469c: f7ff fefd bl 800449a <SetMotPwm>
break;
80046a0: e08b b.n 80047ba <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80046a2: 2201 movs r2, #1
80046a4: f44f 6180 mov.w r1, #1024 @ 0x400
80046a8: 4847 ldr r0, [pc, #284] @ (80047c8 <SetMot+0x2dc>)
80046aa: f001 ffc0 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
80046ae: 88bb ldrh r3, [r7, #4]
80046b0: 461a mov r2, r3
80046b2: 2100 movs r1, #0
80046b4: 4845 ldr r0, [pc, #276] @ (80047cc <SetMot+0x2e0>)
80046b6: f7ff fec5 bl 8004444 <StartMot>
break;
80046ba: e07e b.n 80047ba <SetMot+0x2ce>
if(pwmval==0){
80046bc: 88bb ldrh r3, [r7, #4]
80046be: 2b00 cmp r3, #0
80046c0: d10a bne.n 80046d8 <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
80046c2: 2104 movs r1, #4
80046c4: 4841 ldr r0, [pc, #260] @ (80047cc <SetMot+0x2e0>)
80046c6: f7ff feb0 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
80046ca: 2200 movs r2, #0
80046cc: f44f 6180 mov.w r1, #1024 @ 0x400
80046d0: 483d ldr r0, [pc, #244] @ (80047c8 <SetMot+0x2dc>)
80046d2: f001 ffac bl 800662e <HAL_GPIO_WritePin>
break;
80046d6: e070 b.n 80047ba <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
80046d8: 2104 movs r1, #4
80046da: 483c ldr r0, [pc, #240] @ (80047cc <SetMot+0x2e0>)
80046dc: f7ff fe90 bl 8004400 <IsPwmRunning>
80046e0: 4603 mov r3, r0
80046e2: 2b00 cmp r3, #0
80046e4: d006 beq.n 80046f4 <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
80046e6: 88bb ldrh r3, [r7, #4]
80046e8: 461a mov r2, r3
80046ea: 2104 movs r1, #4
80046ec: 4837 ldr r0, [pc, #220] @ (80047cc <SetMot+0x2e0>)
80046ee: f7ff fed4 bl 800449a <SetMotPwm>
break;
80046f2: e062 b.n 80047ba <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80046f4: 2201 movs r2, #1
80046f6: f44f 6180 mov.w r1, #1024 @ 0x400
80046fa: 4833 ldr r0, [pc, #204] @ (80047c8 <SetMot+0x2dc>)
80046fc: f001 ff97 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004700: 88bb ldrh r3, [r7, #4]
8004702: 461a mov r2, r3
8004704: 2104 movs r1, #4
8004706: 4831 ldr r0, [pc, #196] @ (80047cc <SetMot+0x2e0>)
8004708: f7ff fe9c bl 8004444 <StartMot>
break;
800470c: e055 b.n 80047ba <SetMot+0x2ce>
case 4:
if(dir==FW){
800470e: 79bb ldrb r3, [r7, #6]
8004710: 2b00 cmp r3, #0
8004712: d128 bne.n 8004766 <SetMot+0x27a>
if(pwmval==0){
8004714: 88bb ldrh r3, [r7, #4]
8004716: 2b00 cmp r3, #0
8004718: d10a bne.n 8004730 <SetMot+0x244>
StopMot(timMot4,FWMot4);
800471a: 2108 movs r1, #8
800471c: 482b ldr r0, [pc, #172] @ (80047cc <SetMot+0x2e0>)
800471e: f7ff fe84 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004722: 2200 movs r2, #0
8004724: f44f 6100 mov.w r1, #2048 @ 0x800
8004728: 4827 ldr r0, [pc, #156] @ (80047c8 <SetMot+0x2dc>)
800472a: f001 ff80 bl 800662e <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
800472e: e044 b.n 80047ba <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004730: 2108 movs r1, #8
8004732: 4826 ldr r0, [pc, #152] @ (80047cc <SetMot+0x2e0>)
8004734: f7ff fe64 bl 8004400 <IsPwmRunning>
8004738: 4603 mov r3, r0
800473a: 2b00 cmp r3, #0
800473c: d006 beq.n 800474c <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
800473e: 88bb ldrh r3, [r7, #4]
8004740: 461a mov r2, r3
8004742: 2108 movs r1, #8
8004744: 4821 ldr r0, [pc, #132] @ (80047cc <SetMot+0x2e0>)
8004746: f7ff fea8 bl 800449a <SetMotPwm>
break;
800474a: e036 b.n 80047ba <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
800474c: 2201 movs r2, #1
800474e: f44f 6100 mov.w r1, #2048 @ 0x800
8004752: 481d ldr r0, [pc, #116] @ (80047c8 <SetMot+0x2dc>)
8004754: f001 ff6b bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8004758: 88bb ldrh r3, [r7, #4]
800475a: 461a mov r2, r3
800475c: 2108 movs r1, #8
800475e: 481b ldr r0, [pc, #108] @ (80047cc <SetMot+0x2e0>)
8004760: f7ff fe70 bl 8004444 <StartMot>
break;
8004764: e029 b.n 80047ba <SetMot+0x2ce>
if(pwmval==0){
8004766: 88bb ldrh r3, [r7, #4]
8004768: 2b00 cmp r3, #0
800476a: d10a bne.n 8004782 <SetMot+0x296>
StopMot(timMot4,BWMot4);
800476c: 210c movs r1, #12
800476e: 4817 ldr r0, [pc, #92] @ (80047cc <SetMot+0x2e0>)
8004770: f7ff fe5b bl 800442a <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004774: 2200 movs r2, #0
8004776: f44f 6100 mov.w r1, #2048 @ 0x800
800477a: 4813 ldr r0, [pc, #76] @ (80047c8 <SetMot+0x2dc>)
800477c: f001 ff57 bl 800662e <HAL_GPIO_WritePin>
break;
8004780: e01b b.n 80047ba <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
8004782: 210c movs r1, #12
8004784: 4811 ldr r0, [pc, #68] @ (80047cc <SetMot+0x2e0>)
8004786: f7ff fe3b bl 8004400 <IsPwmRunning>
800478a: 4603 mov r3, r0
800478c: 2b00 cmp r3, #0
800478e: d006 beq.n 800479e <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
8004790: 88bb ldrh r3, [r7, #4]
8004792: 461a mov r2, r3
8004794: 210c movs r1, #12
8004796: 480d ldr r0, [pc, #52] @ (80047cc <SetMot+0x2e0>)
8004798: f7ff fe7f bl 800449a <SetMotPwm>
break;
800479c: e00d b.n 80047ba <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
800479e: 2201 movs r2, #1
80047a0: f44f 6100 mov.w r1, #2048 @ 0x800
80047a4: 4808 ldr r0, [pc, #32] @ (80047c8 <SetMot+0x2dc>)
80047a6: f001 ff42 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
80047aa: 88bb ldrh r3, [r7, #4]
80047ac: 461a mov r2, r3
80047ae: 210c movs r1, #12
80047b0: 4806 ldr r0, [pc, #24] @ (80047cc <SetMot+0x2e0>)
80047b2: f7ff fe47 bl 8004444 <StartMot>
break;
80047b6: e000 b.n 80047ba <SetMot+0x2ce>
default:
break;
80047b8: bf00 nop
}
}
80047ba: bf00 nop
80047bc: 3708 adds r7, #8
80047be: 46bd mov sp, r7
80047c0: bd80 pop {r7, pc}
80047c2: bf00 nop
80047c4: 20000318 .word 0x20000318
80047c8: 40010c00 .word 0x40010c00
80047cc: 20000360 .word 0x20000360
080047d0 <SetMotPerc>:
void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){
80047d0: b580 push {r7, lr}
80047d2: b084 sub sp, #16
80047d4: af00 add r7, sp, #0
80047d6: 4603 mov r3, r0
80047d8: 71fb strb r3, [r7, #7]
80047da: 460b mov r3, r1
80047dc: 71bb strb r3, [r7, #6]
80047de: 4613 mov r3, r2
80047e0: 717b strb r3, [r7, #5]
uint16_t pwmval;
uint32_t tempval;
tempval=perc;
80047e2: 797b ldrb r3, [r7, #5]
80047e4: 60fb str r3, [r7, #12]
tempval*=16384;
80047e6: 68fb ldr r3, [r7, #12]
80047e8: 039b lsls r3, r3, #14
80047ea: 60fb str r3, [r7, #12]
tempval/=100;
80047ec: 68fb ldr r3, [r7, #12]
80047ee: 4ab4 ldr r2, [pc, #720] @ (8004ac0 <SetMotPerc+0x2f0>)
80047f0: fba2 2303 umull r2, r3, r2, r3
80047f4: 095b lsrs r3, r3, #5
80047f6: 60fb str r3, [r7, #12]
pwmval=(uint16_t)tempval;
80047f8: 68fb ldr r3, [r7, #12]
80047fa: 817b strh r3, [r7, #10]
switch(mot){
80047fc: 79fb ldrb r3, [r7, #7]
80047fe: 3b01 subs r3, #1
8004800: 2b03 cmp r3, #3
8004802: f200 8157 bhi.w 8004ab4 <SetMotPerc+0x2e4>
8004806: a201 add r2, pc, #4 @ (adr r2, 800480c <SetMotPerc+0x3c>)
8004808: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800480c: 0800481d .word 0x0800481d
8004810: 080048bf .word 0x080048bf
8004814: 08004961 .word 0x08004961
8004818: 08004a0b .word 0x08004a0b
case 1:
if(dir==FW){
800481c: 79bb ldrb r3, [r7, #6]
800481e: 2b00 cmp r3, #0
8004820: d126 bne.n 8004870 <SetMotPerc+0xa0>
if(pwmval==0){
8004822: 897b ldrh r3, [r7, #10]
8004824: 2b00 cmp r3, #0
8004826: d109 bne.n 800483c <SetMotPerc+0x6c>
StopMot(timMot1,FWMot1);
8004828: 2100 movs r1, #0
800482a: 48a6 ldr r0, [pc, #664] @ (8004ac4 <SetMotPerc+0x2f4>)
800482c: f7ff fdfd bl 800442a <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004830: 2200 movs r2, #0
8004832: 2102 movs r1, #2
8004834: 48a4 ldr r0, [pc, #656] @ (8004ac8 <SetMotPerc+0x2f8>)
8004836: f001 fefa bl 800662e <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
800483a: e13c b.n 8004ab6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, FWMot1)){
800483c: 2100 movs r1, #0
800483e: 48a1 ldr r0, [pc, #644] @ (8004ac4 <SetMotPerc+0x2f4>)
8004840: f7ff fdde bl 8004400 <IsPwmRunning>
8004844: 4603 mov r3, r0
8004846: 2b00 cmp r3, #0
8004848: d006 beq.n 8004858 <SetMotPerc+0x88>
SetMotPwm(timMot1,FWMot1,pwmval);
800484a: 897b ldrh r3, [r7, #10]
800484c: 461a mov r2, r3
800484e: 2100 movs r1, #0
8004850: 489c ldr r0, [pc, #624] @ (8004ac4 <SetMotPerc+0x2f4>)
8004852: f7ff fe22 bl 800449a <SetMotPwm>
break;
8004856: e12e b.n 8004ab6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8004858: 2201 movs r2, #1
800485a: 2102 movs r1, #2
800485c: 489a ldr r0, [pc, #616] @ (8004ac8 <SetMotPerc+0x2f8>)
800485e: f001 fee6 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
8004862: 897b ldrh r3, [r7, #10]
8004864: 461a mov r2, r3
8004866: 2100 movs r1, #0
8004868: 4896 ldr r0, [pc, #600] @ (8004ac4 <SetMotPerc+0x2f4>)
800486a: f7ff fdeb bl 8004444 <StartMot>
break;
800486e: e122 b.n 8004ab6 <SetMotPerc+0x2e6>
if(pwmval==0){
8004870: 897b ldrh r3, [r7, #10]
8004872: 2b00 cmp r3, #0
8004874: d109 bne.n 800488a <SetMotPerc+0xba>
StopMot(timMot1,BWMot1);
8004876: 2104 movs r1, #4
8004878: 4892 ldr r0, [pc, #584] @ (8004ac4 <SetMotPerc+0x2f4>)
800487a: f7ff fdd6 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
800487e: 2200 movs r2, #0
8004880: 2102 movs r1, #2
8004882: 4891 ldr r0, [pc, #580] @ (8004ac8 <SetMotPerc+0x2f8>)
8004884: f001 fed3 bl 800662e <HAL_GPIO_WritePin>
break;
8004888: e115 b.n 8004ab6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, BWMot1)){
800488a: 2104 movs r1, #4
800488c: 488d ldr r0, [pc, #564] @ (8004ac4 <SetMotPerc+0x2f4>)
800488e: f7ff fdb7 bl 8004400 <IsPwmRunning>
8004892: 4603 mov r3, r0
8004894: 2b00 cmp r3, #0
8004896: d006 beq.n 80048a6 <SetMotPerc+0xd6>
SetMotPwm(timMot1,BWMot1,pwmval);
8004898: 897b ldrh r3, [r7, #10]
800489a: 461a mov r2, r3
800489c: 2104 movs r1, #4
800489e: 4889 ldr r0, [pc, #548] @ (8004ac4 <SetMotPerc+0x2f4>)
80048a0: f7ff fdfb bl 800449a <SetMotPwm>
break;
80048a4: e107 b.n 8004ab6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80048a6: 2201 movs r2, #1
80048a8: 2102 movs r1, #2
80048aa: 4887 ldr r0, [pc, #540] @ (8004ac8 <SetMotPerc+0x2f8>)
80048ac: f001 febf bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
80048b0: 897b ldrh r3, [r7, #10]
80048b2: 461a mov r2, r3
80048b4: 2104 movs r1, #4
80048b6: 4883 ldr r0, [pc, #524] @ (8004ac4 <SetMotPerc+0x2f4>)
80048b8: f7ff fdc4 bl 8004444 <StartMot>
break;
80048bc: e0fb b.n 8004ab6 <SetMotPerc+0x2e6>
case 2:
if(dir==FW){
80048be: 79bb ldrb r3, [r7, #6]
80048c0: 2b00 cmp r3, #0
80048c2: d126 bne.n 8004912 <SetMotPerc+0x142>
if(pwmval==0){
80048c4: 897b ldrh r3, [r7, #10]
80048c6: 2b00 cmp r3, #0
80048c8: d109 bne.n 80048de <SetMotPerc+0x10e>
StopMot(timMot2,FWMot2);
80048ca: 2108 movs r1, #8
80048cc: 487d ldr r0, [pc, #500] @ (8004ac4 <SetMotPerc+0x2f4>)
80048ce: f7ff fdac bl 800442a <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80048d2: 2200 movs r2, #0
80048d4: 2104 movs r1, #4
80048d6: 487c ldr r0, [pc, #496] @ (8004ac8 <SetMotPerc+0x2f8>)
80048d8: f001 fea9 bl 800662e <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
80048dc: e0eb b.n 8004ab6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, FWMot2)){
80048de: 2108 movs r1, #8
80048e0: 4878 ldr r0, [pc, #480] @ (8004ac4 <SetMotPerc+0x2f4>)
80048e2: f7ff fd8d bl 8004400 <IsPwmRunning>
80048e6: 4603 mov r3, r0
80048e8: 2b00 cmp r3, #0
80048ea: d006 beq.n 80048fa <SetMotPerc+0x12a>
SetMotPwm(timMot2,FWMot2,pwmval);
80048ec: 897b ldrh r3, [r7, #10]
80048ee: 461a mov r2, r3
80048f0: 2108 movs r1, #8
80048f2: 4874 ldr r0, [pc, #464] @ (8004ac4 <SetMotPerc+0x2f4>)
80048f4: f7ff fdd1 bl 800449a <SetMotPwm>
break;
80048f8: e0dd b.n 8004ab6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80048fa: 2201 movs r2, #1
80048fc: 2104 movs r1, #4
80048fe: 4872 ldr r0, [pc, #456] @ (8004ac8 <SetMotPerc+0x2f8>)
8004900: f001 fe95 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8004904: 897b ldrh r3, [r7, #10]
8004906: 461a mov r2, r3
8004908: 2108 movs r1, #8
800490a: 486e ldr r0, [pc, #440] @ (8004ac4 <SetMotPerc+0x2f4>)
800490c: f7ff fd9a bl 8004444 <StartMot>
break;
8004910: e0d1 b.n 8004ab6 <SetMotPerc+0x2e6>
if(pwmval==0){
8004912: 897b ldrh r3, [r7, #10]
8004914: 2b00 cmp r3, #0
8004916: d109 bne.n 800492c <SetMotPerc+0x15c>
StopMot(timMot2,BWMot2);
8004918: 210c movs r1, #12
800491a: 486a ldr r0, [pc, #424] @ (8004ac4 <SetMotPerc+0x2f4>)
800491c: f7ff fd85 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8004920: 2200 movs r2, #0
8004922: 2104 movs r1, #4
8004924: 4868 ldr r0, [pc, #416] @ (8004ac8 <SetMotPerc+0x2f8>)
8004926: f001 fe82 bl 800662e <HAL_GPIO_WritePin>
break;
800492a: e0c4 b.n 8004ab6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, BWMot2)){
800492c: 210c movs r1, #12
800492e: 4865 ldr r0, [pc, #404] @ (8004ac4 <SetMotPerc+0x2f4>)
8004930: f7ff fd66 bl 8004400 <IsPwmRunning>
8004934: 4603 mov r3, r0
8004936: 2b00 cmp r3, #0
8004938: d006 beq.n 8004948 <SetMotPerc+0x178>
SetMotPwm(timMot2,BWMot2,pwmval);
800493a: 897b ldrh r3, [r7, #10]
800493c: 461a mov r2, r3
800493e: 210c movs r1, #12
8004940: 4860 ldr r0, [pc, #384] @ (8004ac4 <SetMotPerc+0x2f4>)
8004942: f7ff fdaa bl 800449a <SetMotPwm>
break;
8004946: e0b6 b.n 8004ab6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004948: 2201 movs r2, #1
800494a: 2104 movs r1, #4
800494c: 485e ldr r0, [pc, #376] @ (8004ac8 <SetMotPerc+0x2f8>)
800494e: f001 fe6e bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8004952: 897b ldrh r3, [r7, #10]
8004954: 461a mov r2, r3
8004956: 210c movs r1, #12
8004958: 485a ldr r0, [pc, #360] @ (8004ac4 <SetMotPerc+0x2f4>)
800495a: f7ff fd73 bl 8004444 <StartMot>
break;
800495e: e0aa b.n 8004ab6 <SetMotPerc+0x2e6>
case 3:
if(dir==FW){
8004960: 79bb ldrb r3, [r7, #6]
8004962: 2b00 cmp r3, #0
8004964: d128 bne.n 80049b8 <SetMotPerc+0x1e8>
if(pwmval==0){
8004966: 897b ldrh r3, [r7, #10]
8004968: 2b00 cmp r3, #0
800496a: d10a bne.n 8004982 <SetMotPerc+0x1b2>
StopMot(timMot3,FWMot3);
800496c: 2100 movs r1, #0
800496e: 4857 ldr r0, [pc, #348] @ (8004acc <SetMotPerc+0x2fc>)
8004970: f7ff fd5b bl 800442a <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004974: 2200 movs r2, #0
8004976: f44f 6180 mov.w r1, #1024 @ 0x400
800497a: 4853 ldr r0, [pc, #332] @ (8004ac8 <SetMotPerc+0x2f8>)
800497c: f001 fe57 bl 800662e <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8004980: e099 b.n 8004ab6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, FWMot3)){
8004982: 2100 movs r1, #0
8004984: 4851 ldr r0, [pc, #324] @ (8004acc <SetMotPerc+0x2fc>)
8004986: f7ff fd3b bl 8004400 <IsPwmRunning>
800498a: 4603 mov r3, r0
800498c: 2b00 cmp r3, #0
800498e: d006 beq.n 800499e <SetMotPerc+0x1ce>
SetMotPwm(timMot3,FWMot3,pwmval);
8004990: 897b ldrh r3, [r7, #10]
8004992: 461a mov r2, r3
8004994: 2100 movs r1, #0
8004996: 484d ldr r0, [pc, #308] @ (8004acc <SetMotPerc+0x2fc>)
8004998: f7ff fd7f bl 800449a <SetMotPwm>
break;
800499c: e08b b.n 8004ab6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
800499e: 2201 movs r2, #1
80049a0: f44f 6180 mov.w r1, #1024 @ 0x400
80049a4: 4848 ldr r0, [pc, #288] @ (8004ac8 <SetMotPerc+0x2f8>)
80049a6: f001 fe42 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
80049aa: 897b ldrh r3, [r7, #10]
80049ac: 461a mov r2, r3
80049ae: 2100 movs r1, #0
80049b0: 4846 ldr r0, [pc, #280] @ (8004acc <SetMotPerc+0x2fc>)
80049b2: f7ff fd47 bl 8004444 <StartMot>
break;
80049b6: e07e b.n 8004ab6 <SetMotPerc+0x2e6>
if(pwmval==0){
80049b8: 897b ldrh r3, [r7, #10]
80049ba: 2b00 cmp r3, #0
80049bc: d10a bne.n 80049d4 <SetMotPerc+0x204>
StopMot(timMot3,BWMot3);
80049be: 2104 movs r1, #4
80049c0: 4842 ldr r0, [pc, #264] @ (8004acc <SetMotPerc+0x2fc>)
80049c2: f7ff fd32 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
80049c6: 2200 movs r2, #0
80049c8: f44f 6180 mov.w r1, #1024 @ 0x400
80049cc: 483e ldr r0, [pc, #248] @ (8004ac8 <SetMotPerc+0x2f8>)
80049ce: f001 fe2e bl 800662e <HAL_GPIO_WritePin>
break;
80049d2: e070 b.n 8004ab6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, BWMot3)){
80049d4: 2104 movs r1, #4
80049d6: 483d ldr r0, [pc, #244] @ (8004acc <SetMotPerc+0x2fc>)
80049d8: f7ff fd12 bl 8004400 <IsPwmRunning>
80049dc: 4603 mov r3, r0
80049de: 2b00 cmp r3, #0
80049e0: d006 beq.n 80049f0 <SetMotPerc+0x220>
SetMotPwm(timMot3,BWMot3,pwmval);
80049e2: 897b ldrh r3, [r7, #10]
80049e4: 461a mov r2, r3
80049e6: 2104 movs r1, #4
80049e8: 4838 ldr r0, [pc, #224] @ (8004acc <SetMotPerc+0x2fc>)
80049ea: f7ff fd56 bl 800449a <SetMotPwm>
break;
80049ee: e062 b.n 8004ab6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80049f0: 2201 movs r2, #1
80049f2: f44f 6180 mov.w r1, #1024 @ 0x400
80049f6: 4834 ldr r0, [pc, #208] @ (8004ac8 <SetMotPerc+0x2f8>)
80049f8: f001 fe19 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
80049fc: 897b ldrh r3, [r7, #10]
80049fe: 461a mov r2, r3
8004a00: 2104 movs r1, #4
8004a02: 4832 ldr r0, [pc, #200] @ (8004acc <SetMotPerc+0x2fc>)
8004a04: f7ff fd1e bl 8004444 <StartMot>
break;
8004a08: e055 b.n 8004ab6 <SetMotPerc+0x2e6>
case 4:
if(dir==FW){
8004a0a: 79bb ldrb r3, [r7, #6]
8004a0c: 2b00 cmp r3, #0
8004a0e: d128 bne.n 8004a62 <SetMotPerc+0x292>
if(pwmval==0){
8004a10: 897b ldrh r3, [r7, #10]
8004a12: 2b00 cmp r3, #0
8004a14: d10a bne.n 8004a2c <SetMotPerc+0x25c>
StopMot(timMot4,FWMot4);
8004a16: 2108 movs r1, #8
8004a18: 482c ldr r0, [pc, #176] @ (8004acc <SetMotPerc+0x2fc>)
8004a1a: f7ff fd06 bl 800442a <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004a1e: 2200 movs r2, #0
8004a20: f44f 6100 mov.w r1, #2048 @ 0x800
8004a24: 4828 ldr r0, [pc, #160] @ (8004ac8 <SetMotPerc+0x2f8>)
8004a26: f001 fe02 bl 800662e <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8004a2a: e044 b.n 8004ab6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004a2c: 2108 movs r1, #8
8004a2e: 4827 ldr r0, [pc, #156] @ (8004acc <SetMotPerc+0x2fc>)
8004a30: f7ff fce6 bl 8004400 <IsPwmRunning>
8004a34: 4603 mov r3, r0
8004a36: 2b00 cmp r3, #0
8004a38: d006 beq.n 8004a48 <SetMotPerc+0x278>
SetMotPwm(timMot4,FWMot4,pwmval);
8004a3a: 897b ldrh r3, [r7, #10]
8004a3c: 461a mov r2, r3
8004a3e: 2108 movs r1, #8
8004a40: 4822 ldr r0, [pc, #136] @ (8004acc <SetMotPerc+0x2fc>)
8004a42: f7ff fd2a bl 800449a <SetMotPwm>
break;
8004a46: e036 b.n 8004ab6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004a48: 2201 movs r2, #1
8004a4a: f44f 6100 mov.w r1, #2048 @ 0x800
8004a4e: 481e ldr r0, [pc, #120] @ (8004ac8 <SetMotPerc+0x2f8>)
8004a50: f001 fded bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8004a54: 897b ldrh r3, [r7, #10]
8004a56: 461a mov r2, r3
8004a58: 2108 movs r1, #8
8004a5a: 481c ldr r0, [pc, #112] @ (8004acc <SetMotPerc+0x2fc>)
8004a5c: f7ff fcf2 bl 8004444 <StartMot>
break;
8004a60: e029 b.n 8004ab6 <SetMotPerc+0x2e6>
if(pwmval==0){
8004a62: 897b ldrh r3, [r7, #10]
8004a64: 2b00 cmp r3, #0
8004a66: d10a bne.n 8004a7e <SetMotPerc+0x2ae>
StopMot(timMot4,BWMot4);
8004a68: 210c movs r1, #12
8004a6a: 4818 ldr r0, [pc, #96] @ (8004acc <SetMotPerc+0x2fc>)
8004a6c: f7ff fcdd bl 800442a <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004a70: 2200 movs r2, #0
8004a72: f44f 6100 mov.w r1, #2048 @ 0x800
8004a76: 4814 ldr r0, [pc, #80] @ (8004ac8 <SetMotPerc+0x2f8>)
8004a78: f001 fdd9 bl 800662e <HAL_GPIO_WritePin>
break;
8004a7c: e01b b.n 8004ab6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, BWMot4)){
8004a7e: 210c movs r1, #12
8004a80: 4812 ldr r0, [pc, #72] @ (8004acc <SetMotPerc+0x2fc>)
8004a82: f7ff fcbd bl 8004400 <IsPwmRunning>
8004a86: 4603 mov r3, r0
8004a88: 2b00 cmp r3, #0
8004a8a: d006 beq.n 8004a9a <SetMotPerc+0x2ca>
SetMotPwm(timMot4,BWMot4,pwmval);
8004a8c: 897b ldrh r3, [r7, #10]
8004a8e: 461a mov r2, r3
8004a90: 210c movs r1, #12
8004a92: 480e ldr r0, [pc, #56] @ (8004acc <SetMotPerc+0x2fc>)
8004a94: f7ff fd01 bl 800449a <SetMotPwm>
break;
8004a98: e00d b.n 8004ab6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004a9a: 2201 movs r2, #1
8004a9c: f44f 6100 mov.w r1, #2048 @ 0x800
8004aa0: 4809 ldr r0, [pc, #36] @ (8004ac8 <SetMotPerc+0x2f8>)
8004aa2: f001 fdc4 bl 800662e <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8004aa6: 897b ldrh r3, [r7, #10]
8004aa8: 461a mov r2, r3
8004aaa: 210c movs r1, #12
8004aac: 4807 ldr r0, [pc, #28] @ (8004acc <SetMotPerc+0x2fc>)
8004aae: f7ff fcc9 bl 8004444 <StartMot>
break;
8004ab2: e000 b.n 8004ab6 <SetMotPerc+0x2e6>
default:
break;
8004ab4: bf00 nop
}
}
8004ab6: bf00 nop
8004ab8: 3710 adds r7, #16
8004aba: 46bd mov sp, r7
8004abc: bd80 pop {r7, pc}
8004abe: bf00 nop
8004ac0: 51eb851f .word 0x51eb851f
8004ac4: 20000318 .word 0x20000318
8004ac8: 40010c00 .word 0x40010c00
8004acc: 20000360 .word 0x20000360
08004ad0 <ramp>:
uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){
8004ad0: b590 push {r4, r7, lr}
8004ad2: b085 sub sp, #20
8004ad4: af00 add r7, sp, #0
8004ad6: 4604 mov r4, r0
8004ad8: 4608 mov r0, r1
8004ada: 4611 mov r1, r2
8004adc: 461a mov r2, r3
8004ade: 4623 mov r3, r4
8004ae0: 71fb strb r3, [r7, #7]
8004ae2: 4603 mov r3, r0
8004ae4: 71bb strb r3, [r7, #6]
8004ae6: 460b mov r3, r1
8004ae8: 717b strb r3, [r7, #5]
8004aea: 4613 mov r3, r2
8004aec: 713b strb r3, [r7, #4]
static uint8_t memrtramp[4];
// char s[10];
uint16_t delta;
switch(mode){
8004aee: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8004af2: 2b00 cmp r3, #0
8004af4: d002 beq.n 8004afc <ramp+0x2c>
8004af6: 2b0a cmp r3, #10
8004af8: d016 beq.n 8004b28 <ramp+0x58>
8004afa: e09d b.n 8004c38 <ramp+0x168>
case RAMPINIT:
memrtramp[mot-1]=rtramp[mot-1]=tr;
8004afc: 79fb ldrb r3, [r7, #7]
8004afe: 3b01 subs r3, #1
8004b00: f897 2020 ldrb.w r2, [r7, #32]
8004b04: b291 uxth r1, r2
8004b06: 4a4f ldr r2, [pc, #316] @ (8004c44 <ramp+0x174>)
8004b08: 4608 mov r0, r1
8004b0a: f822 0013 strh.w r0, [r2, r3, lsl #1]
8004b0e: 79fb ldrb r3, [r7, #7]
8004b10: 3b01 subs r3, #1
8004b12: b2c9 uxtb r1, r1
8004b14: 4a4c ldr r2, [pc, #304] @ (8004c48 <ramp+0x178>)
8004b16: 54d1 strb r1, [r2, r3]
SetMotPerc(mot,dir,percStart);
8004b18: 797a ldrb r2, [r7, #5]
8004b1a: 79b9 ldrb r1, [r7, #6]
8004b1c: 79fb ldrb r3, [r7, #7]
8004b1e: 4618 mov r0, r3
8004b20: f7ff fe56 bl 80047d0 <SetMotPerc>
return DONE;
8004b24: 2300 movs r3, #0
8004b26: e088 b.n 8004c3a <ramp+0x16a>
case RAMPRUN:
if(memrtramp[mot-1]!=rtramp[mot-1]){
8004b28: 79fb ldrb r3, [r7, #7]
8004b2a: 3b01 subs r3, #1
8004b2c: 4a46 ldr r2, [pc, #280] @ (8004c48 <ramp+0x178>)
8004b2e: 5cd3 ldrb r3, [r2, r3]
8004b30: 4619 mov r1, r3
8004b32: 79fb ldrb r3, [r7, #7]
8004b34: 3b01 subs r3, #1
8004b36: 4a43 ldr r2, [pc, #268] @ (8004c44 <ramp+0x174>)
8004b38: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004b3c: b29b uxth r3, r3
8004b3e: 4299 cmp r1, r3
8004b40: d078 beq.n 8004c34 <ramp+0x164>
memrtramp[mot-1]=rtramp[mot-1];
8004b42: 79fb ldrb r3, [r7, #7]
8004b44: 3b01 subs r3, #1
8004b46: 4a3f ldr r2, [pc, #252] @ (8004c44 <ramp+0x174>)
8004b48: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004b4c: b29a uxth r2, r3
8004b4e: 79fb ldrb r3, [r7, #7]
8004b50: 3b01 subs r3, #1
8004b52: b2d1 uxtb r1, r2
8004b54: 4a3c ldr r2, [pc, #240] @ (8004c48 <ramp+0x178>)
8004b56: 54d1 strb r1, [r2, r3]
if(rtramp[mot-1]){
8004b58: 79fb ldrb r3, [r7, #7]
8004b5a: 3b01 subs r3, #1
8004b5c: 4a39 ldr r2, [pc, #228] @ (8004c44 <ramp+0x174>)
8004b5e: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004b62: b29b uxth r3, r3
8004b64: 2b00 cmp r3, #0
8004b66: d05d beq.n 8004c24 <ramp+0x154>
if(percStart>percEnd){
8004b68: 797a ldrb r2, [r7, #5]
8004b6a: 793b ldrb r3, [r7, #4]
8004b6c: 429a cmp r2, r3
8004b6e: d926 bls.n 8004bbe <ramp+0xee>
delta=percStart-percEnd;
8004b70: 797b ldrb r3, [r7, #5]
8004b72: b29a uxth r2, r3
8004b74: 793b ldrb r3, [r7, #4]
8004b76: b29b uxth r3, r3
8004b78: 1ad3 subs r3, r2, r3
8004b7a: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004b7c: f897 3020 ldrb.w r3, [r7, #32]
8004b80: b29a uxth r2, r3
8004b82: 79fb ldrb r3, [r7, #7]
8004b84: 3b01 subs r3, #1
8004b86: 492f ldr r1, [pc, #188] @ (8004c44 <ramp+0x174>)
8004b88: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8004b8c: b29b uxth r3, r3
8004b8e: 1ad3 subs r3, r2, r3
8004b90: b29b uxth r3, r3
8004b92: 89fa ldrh r2, [r7, #14]
8004b94: fb02 f303 mul.w r3, r2, r3
8004b98: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004b9a: 89fa ldrh r2, [r7, #14]
8004b9c: f897 3020 ldrb.w r3, [r7, #32]
8004ba0: fb92 f3f3 sdiv r3, r2, r3
8004ba4: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart-delta);
8004ba6: 89fb ldrh r3, [r7, #14]
8004ba8: b2db uxtb r3, r3
8004baa: 797a ldrb r2, [r7, #5]
8004bac: 1ad3 subs r3, r2, r3
8004bae: b2da uxtb r2, r3
8004bb0: 79b9 ldrb r1, [r7, #6]
8004bb2: 79fb ldrb r3, [r7, #7]
8004bb4: 4618 mov r0, r3
8004bb6: f7ff fe0b bl 80047d0 <SetMotPerc>
return RUNNING;
8004bba: 2301 movs r3, #1
8004bbc: e03d b.n 8004c3a <ramp+0x16a>
}else if(percStart<percEnd){
8004bbe: 797a ldrb r2, [r7, #5]
8004bc0: 793b ldrb r3, [r7, #4]
8004bc2: 429a cmp r2, r3
8004bc4: d226 bcs.n 8004c14 <ramp+0x144>
delta=percEnd-percStart;
8004bc6: 793b ldrb r3, [r7, #4]
8004bc8: b29a uxth r2, r3
8004bca: 797b ldrb r3, [r7, #5]
8004bcc: b29b uxth r3, r3
8004bce: 1ad3 subs r3, r2, r3
8004bd0: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004bd2: f897 3020 ldrb.w r3, [r7, #32]
8004bd6: b29a uxth r2, r3
8004bd8: 79fb ldrb r3, [r7, #7]
8004bda: 3b01 subs r3, #1
8004bdc: 4919 ldr r1, [pc, #100] @ (8004c44 <ramp+0x174>)
8004bde: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8004be2: b29b uxth r3, r3
8004be4: 1ad3 subs r3, r2, r3
8004be6: b29b uxth r3, r3
8004be8: 89fa ldrh r2, [r7, #14]
8004bea: fb02 f303 mul.w r3, r2, r3
8004bee: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004bf0: 89fa ldrh r2, [r7, #14]
8004bf2: f897 3020 ldrb.w r3, [r7, #32]
8004bf6: fb92 f3f3 sdiv r3, r2, r3
8004bfa: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart+delta);
8004bfc: 89fb ldrh r3, [r7, #14]
8004bfe: b2da uxtb r2, r3
8004c00: 797b ldrb r3, [r7, #5]
8004c02: 4413 add r3, r2
8004c04: b2da uxtb r2, r3
8004c06: 79b9 ldrb r1, [r7, #6]
8004c08: 79fb ldrb r3, [r7, #7]
8004c0a: 4618 mov r0, r3
8004c0c: f7ff fde0 bl 80047d0 <SetMotPerc>
// sprintf((char*)s,"\n%d",percStart+delta);
// HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
return RUNNING;
8004c10: 2301 movs r3, #1
8004c12: e012 b.n 8004c3a <ramp+0x16a>
}else{
SetMotPerc(mot,dir,percEnd);
8004c14: 793a ldrb r2, [r7, #4]
8004c16: 79b9 ldrb r1, [r7, #6]
8004c18: 79fb ldrb r3, [r7, #7]
8004c1a: 4618 mov r0, r3
8004c1c: f7ff fdd8 bl 80047d0 <SetMotPerc>
return DONE;
8004c20: 2300 movs r3, #0
8004c22: e00a b.n 8004c3a <ramp+0x16a>
}
}else{
SetMotPerc(mot,dir,percEnd);
8004c24: 793a ldrb r2, [r7, #4]
8004c26: 79b9 ldrb r1, [r7, #6]
8004c28: 79fb ldrb r3, [r7, #7]
8004c2a: 4618 mov r0, r3
8004c2c: f7ff fdd0 bl 80047d0 <SetMotPerc>
return DONE;
8004c30: 2300 movs r3, #0
8004c32: e002 b.n 8004c3a <ramp+0x16a>
}
}else return RUNNING;
8004c34: 2301 movs r3, #1
8004c36: e000 b.n 8004c3a <ramp+0x16a>
break;
}
return DONE;
8004c38: 2300 movs r3, #0
}
8004c3a: 4618 mov r0, r3
8004c3c: 3714 adds r7, #20
8004c3e: 46bd mov sp, r7
8004c40: bd90 pop {r4, r7, pc}
8004c42: bf00 nop
8004c44: 200003f4 .word 0x200003f4
8004c48: 2000046c .word 0x2000046c
08004c4c <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8004c4c: b480 push {r7}
8004c4e: b085 sub sp, #20
8004c50: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8004c52: 4b15 ldr r3, [pc, #84] @ (8004ca8 <HAL_MspInit+0x5c>)
8004c54: 699b ldr r3, [r3, #24]
8004c56: 4a14 ldr r2, [pc, #80] @ (8004ca8 <HAL_MspInit+0x5c>)
8004c58: f043 0301 orr.w r3, r3, #1
8004c5c: 6193 str r3, [r2, #24]
8004c5e: 4b12 ldr r3, [pc, #72] @ (8004ca8 <HAL_MspInit+0x5c>)
8004c60: 699b ldr r3, [r3, #24]
8004c62: f003 0301 and.w r3, r3, #1
8004c66: 60bb str r3, [r7, #8]
8004c68: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
8004c6a: 4b0f ldr r3, [pc, #60] @ (8004ca8 <HAL_MspInit+0x5c>)
8004c6c: 69db ldr r3, [r3, #28]
8004c6e: 4a0e ldr r2, [pc, #56] @ (8004ca8 <HAL_MspInit+0x5c>)
8004c70: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8004c74: 61d3 str r3, [r2, #28]
8004c76: 4b0c ldr r3, [pc, #48] @ (8004ca8 <HAL_MspInit+0x5c>)
8004c78: 69db ldr r3, [r3, #28]
8004c7a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004c7e: 607b str r3, [r7, #4]
8004c80: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
8004c82: 4b0a ldr r3, [pc, #40] @ (8004cac <HAL_MspInit+0x60>)
8004c84: 685b ldr r3, [r3, #4]
8004c86: 60fb str r3, [r7, #12]
8004c88: 68fb ldr r3, [r7, #12]
8004c8a: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
8004c8e: 60fb str r3, [r7, #12]
8004c90: 68fb ldr r3, [r7, #12]
8004c92: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
8004c96: 60fb str r3, [r7, #12]
8004c98: 4a04 ldr r2, [pc, #16] @ (8004cac <HAL_MspInit+0x60>)
8004c9a: 68fb ldr r3, [r7, #12]
8004c9c: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8004c9e: bf00 nop
8004ca0: 3714 adds r7, #20
8004ca2: 46bd mov sp, r7
8004ca4: bc80 pop {r7}
8004ca6: 4770 bx lr
8004ca8: 40021000 .word 0x40021000
8004cac: 40010000 .word 0x40010000
08004cb0 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8004cb0: b580 push {r7, lr}
8004cb2: b08a sub sp, #40 @ 0x28
8004cb4: af00 add r7, sp, #0
8004cb6: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004cb8: f107 0318 add.w r3, r7, #24
8004cbc: 2200 movs r2, #0
8004cbe: 601a str r2, [r3, #0]
8004cc0: 605a str r2, [r3, #4]
8004cc2: 609a str r2, [r3, #8]
8004cc4: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
8004cc6: 687b ldr r3, [r7, #4]
8004cc8: 681b ldr r3, [r3, #0]
8004cca: 4a33 ldr r2, [pc, #204] @ (8004d98 <HAL_ADC_MspInit+0xe8>)
8004ccc: 4293 cmp r3, r2
8004cce: d15f bne.n 8004d90 <HAL_ADC_MspInit+0xe0>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
8004cd0: 4b32 ldr r3, [pc, #200] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004cd2: 699b ldr r3, [r3, #24]
8004cd4: 4a31 ldr r2, [pc, #196] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004cd6: f443 7300 orr.w r3, r3, #512 @ 0x200
8004cda: 6193 str r3, [r2, #24]
8004cdc: 4b2f ldr r3, [pc, #188] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004cde: 699b ldr r3, [r3, #24]
8004ce0: f403 7300 and.w r3, r3, #512 @ 0x200
8004ce4: 617b str r3, [r7, #20]
8004ce6: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004ce8: 4b2c ldr r3, [pc, #176] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004cea: 699b ldr r3, [r3, #24]
8004cec: 4a2b ldr r2, [pc, #172] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004cee: f043 0304 orr.w r3, r3, #4
8004cf2: 6193 str r3, [r2, #24]
8004cf4: 4b29 ldr r3, [pc, #164] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004cf6: 699b ldr r3, [r3, #24]
8004cf8: f003 0304 and.w r3, r3, #4
8004cfc: 613b str r3, [r7, #16]
8004cfe: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8004d00: 4b26 ldr r3, [pc, #152] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004d02: 699b ldr r3, [r3, #24]
8004d04: 4a25 ldr r2, [pc, #148] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004d06: f043 0308 orr.w r3, r3, #8
8004d0a: 6193 str r3, [r2, #24]
8004d0c: 4b23 ldr r3, [pc, #140] @ (8004d9c <HAL_ADC_MspInit+0xec>)
8004d0e: 699b ldr r3, [r3, #24]
8004d10: f003 0308 and.w r3, r3, #8
8004d14: 60fb str r3, [r7, #12]
8004d16: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
8004d18: 23f0 movs r3, #240 @ 0xf0
8004d1a: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004d1c: 2303 movs r3, #3
8004d1e: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004d20: f107 0318 add.w r3, r7, #24
8004d24: 4619 mov r1, r3
8004d26: 481e ldr r0, [pc, #120] @ (8004da0 <HAL_ADC_MspInit+0xf0>)
8004d28: f001 fae6 bl 80062f8 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8004d2c: 2301 movs r3, #1
8004d2e: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004d30: 2303 movs r3, #3
8004d32: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
8004d34: f107 0318 add.w r3, r7, #24
8004d38: 4619 mov r1, r3
8004d3a: 481a ldr r0, [pc, #104] @ (8004da4 <HAL_ADC_MspInit+0xf4>)
8004d3c: f001 fadc bl 80062f8 <HAL_GPIO_Init>
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
8004d40: 4b19 ldr r3, [pc, #100] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d42: 4a1a ldr r2, [pc, #104] @ (8004dac <HAL_ADC_MspInit+0xfc>)
8004d44: 601a str r2, [r3, #0]
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
8004d46: 4b18 ldr r3, [pc, #96] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d48: 2200 movs r2, #0
8004d4a: 605a str r2, [r3, #4]
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
8004d4c: 4b16 ldr r3, [pc, #88] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d4e: 2200 movs r2, #0
8004d50: 609a str r2, [r3, #8]
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
8004d52: 4b15 ldr r3, [pc, #84] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d54: 2280 movs r2, #128 @ 0x80
8004d56: 60da str r2, [r3, #12]
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
8004d58: 4b13 ldr r3, [pc, #76] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d5a: f44f 7280 mov.w r2, #256 @ 0x100
8004d5e: 611a str r2, [r3, #16]
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
8004d60: 4b11 ldr r3, [pc, #68] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d62: f44f 6280 mov.w r2, #1024 @ 0x400
8004d66: 615a str r2, [r3, #20]
hdma_adc1.Init.Mode = DMA_CIRCULAR;
8004d68: 4b0f ldr r3, [pc, #60] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d6a: 2220 movs r2, #32
8004d6c: 619a str r2, [r3, #24]
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
8004d6e: 4b0e ldr r3, [pc, #56] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d70: 2200 movs r2, #0
8004d72: 61da str r2, [r3, #28]
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
8004d74: 480c ldr r0, [pc, #48] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d76: f000 fed1 bl 8005b1c <HAL_DMA_Init>
8004d7a: 4603 mov r3, r0
8004d7c: 2b00 cmp r3, #0
8004d7e: d001 beq.n 8004d84 <HAL_ADC_MspInit+0xd4>
{
Error_Handler();
8004d80: f7fe fca2 bl 80036c8 <Error_Handler>
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
8004d84: 687b ldr r3, [r7, #4]
8004d86: 4a08 ldr r2, [pc, #32] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d88: 621a str r2, [r3, #32]
8004d8a: 4a07 ldr r2, [pc, #28] @ (8004da8 <HAL_ADC_MspInit+0xf8>)
8004d8c: 687b ldr r3, [r7, #4]
8004d8e: 6253 str r3, [r2, #36] @ 0x24
/* USER CODE END ADC1_MspInit 1 */
}
}
8004d90: bf00 nop
8004d92: 3728 adds r7, #40 @ 0x28
8004d94: 46bd mov sp, r7
8004d96: bd80 pop {r7, pc}
8004d98: 40012400 .word 0x40012400
8004d9c: 40021000 .word 0x40021000
8004da0: 40010800 .word 0x40010800
8004da4: 40010c00 .word 0x40010c00
8004da8: 200002d4 .word 0x200002d4
8004dac: 40020008 .word 0x40020008
08004db0 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8004db0: b480 push {r7}
8004db2: b085 sub sp, #20
8004db4: af00 add r7, sp, #0
8004db6: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8004db8: 687b ldr r3, [r7, #4]
8004dba: 681b ldr r3, [r3, #0]
8004dbc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004dc0: d10c bne.n 8004ddc <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
8004dc2: 4b11 ldr r3, [pc, #68] @ (8004e08 <HAL_TIM_Base_MspInit+0x58>)
8004dc4: 69db ldr r3, [r3, #28]
8004dc6: 4a10 ldr r2, [pc, #64] @ (8004e08 <HAL_TIM_Base_MspInit+0x58>)
8004dc8: f043 0301 orr.w r3, r3, #1
8004dcc: 61d3 str r3, [r2, #28]
8004dce: 4b0e ldr r3, [pc, #56] @ (8004e08 <HAL_TIM_Base_MspInit+0x58>)
8004dd0: 69db ldr r3, [r3, #28]
8004dd2: f003 0301 and.w r3, r3, #1
8004dd6: 60fb str r3, [r7, #12]
8004dd8: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8004dda: e010 b.n 8004dfe <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8004ddc: 687b ldr r3, [r7, #4]
8004dde: 681b ldr r3, [r3, #0]
8004de0: 4a0a ldr r2, [pc, #40] @ (8004e0c <HAL_TIM_Base_MspInit+0x5c>)
8004de2: 4293 cmp r3, r2
8004de4: d10b bne.n 8004dfe <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
8004de6: 4b08 ldr r3, [pc, #32] @ (8004e08 <HAL_TIM_Base_MspInit+0x58>)
8004de8: 69db ldr r3, [r3, #28]
8004dea: 4a07 ldr r2, [pc, #28] @ (8004e08 <HAL_TIM_Base_MspInit+0x58>)
8004dec: f043 0304 orr.w r3, r3, #4
8004df0: 61d3 str r3, [r2, #28]
8004df2: 4b05 ldr r3, [pc, #20] @ (8004e08 <HAL_TIM_Base_MspInit+0x58>)
8004df4: 69db ldr r3, [r3, #28]
8004df6: f003 0304 and.w r3, r3, #4
8004dfa: 60bb str r3, [r7, #8]
8004dfc: 68bb ldr r3, [r7, #8]
}
8004dfe: bf00 nop
8004e00: 3714 adds r7, #20
8004e02: 46bd mov sp, r7
8004e04: bc80 pop {r7}
8004e06: 4770 bx lr
8004e08: 40021000 .word 0x40021000
8004e0c: 40000800 .word 0x40000800
08004e10 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8004e10: b580 push {r7, lr}
8004e12: b088 sub sp, #32
8004e14: af00 add r7, sp, #0
8004e16: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004e18: f107 0310 add.w r3, r7, #16
8004e1c: 2200 movs r2, #0
8004e1e: 601a str r2, [r3, #0]
8004e20: 605a str r2, [r3, #4]
8004e22: 609a str r2, [r3, #8]
8004e24: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
8004e26: 687b ldr r3, [r7, #4]
8004e28: 681b ldr r3, [r3, #0]
8004e2a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004e2e: d118 bne.n 8004e62 <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8004e30: 4b1d ldr r3, [pc, #116] @ (8004ea8 <HAL_TIM_MspPostInit+0x98>)
8004e32: 699b ldr r3, [r3, #24]
8004e34: 4a1c ldr r2, [pc, #112] @ (8004ea8 <HAL_TIM_MspPostInit+0x98>)
8004e36: f043 0304 orr.w r3, r3, #4
8004e3a: 6193 str r3, [r2, #24]
8004e3c: 4b1a ldr r3, [pc, #104] @ (8004ea8 <HAL_TIM_MspPostInit+0x98>)
8004e3e: 699b ldr r3, [r3, #24]
8004e40: f003 0304 and.w r3, r3, #4
8004e44: 60fb str r3, [r7, #12]
8004e46: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
8004e48: 230f movs r3, #15
8004e4a: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004e4c: 2302 movs r3, #2
8004e4e: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004e50: 2302 movs r3, #2
8004e52: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004e54: f107 0310 add.w r3, r7, #16
8004e58: 4619 mov r1, r3
8004e5a: 4814 ldr r0, [pc, #80] @ (8004eac <HAL_TIM_MspPostInit+0x9c>)
8004e5c: f001 fa4c bl 80062f8 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8004e60: e01d b.n 8004e9e <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
8004e62: 687b ldr r3, [r7, #4]
8004e64: 681b ldr r3, [r3, #0]
8004e66: 4a12 ldr r2, [pc, #72] @ (8004eb0 <HAL_TIM_MspPostInit+0xa0>)
8004e68: 4293 cmp r3, r2
8004e6a: d118 bne.n 8004e9e <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
8004e6c: 4b0e ldr r3, [pc, #56] @ (8004ea8 <HAL_TIM_MspPostInit+0x98>)
8004e6e: 699b ldr r3, [r3, #24]
8004e70: 4a0d ldr r2, [pc, #52] @ (8004ea8 <HAL_TIM_MspPostInit+0x98>)
8004e72: f043 0308 orr.w r3, r3, #8
8004e76: 6193 str r3, [r2, #24]
8004e78: 4b0b ldr r3, [pc, #44] @ (8004ea8 <HAL_TIM_MspPostInit+0x98>)
8004e7a: 699b ldr r3, [r3, #24]
8004e7c: f003 0308 and.w r3, r3, #8
8004e80: 60bb str r3, [r7, #8]
8004e82: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
8004e84: f44f 7370 mov.w r3, #960 @ 0x3c0
8004e88: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004e8a: 2302 movs r3, #2
8004e8c: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004e8e: 2302 movs r3, #2
8004e90: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8004e92: f107 0310 add.w r3, r7, #16
8004e96: 4619 mov r1, r3
8004e98: 4806 ldr r0, [pc, #24] @ (8004eb4 <HAL_TIM_MspPostInit+0xa4>)
8004e9a: f001 fa2d bl 80062f8 <HAL_GPIO_Init>
}
8004e9e: bf00 nop
8004ea0: 3720 adds r7, #32
8004ea2: 46bd mov sp, r7
8004ea4: bd80 pop {r7, pc}
8004ea6: bf00 nop
8004ea8: 40021000 .word 0x40021000
8004eac: 40010800 .word 0x40010800
8004eb0: 40000800 .word 0x40000800
8004eb4: 40010c00 .word 0x40010c00
08004eb8 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8004eb8: b580 push {r7, lr}
8004eba: b088 sub sp, #32
8004ebc: af00 add r7, sp, #0
8004ebe: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004ec0: f107 0310 add.w r3, r7, #16
8004ec4: 2200 movs r2, #0
8004ec6: 601a str r2, [r3, #0]
8004ec8: 605a str r2, [r3, #4]
8004eca: 609a str r2, [r3, #8]
8004ecc: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
8004ece: 687b ldr r3, [r7, #4]
8004ed0: 681b ldr r3, [r3, #0]
8004ed2: 4a1c ldr r2, [pc, #112] @ (8004f44 <HAL_UART_MspInit+0x8c>)
8004ed4: 4293 cmp r3, r2
8004ed6: d131 bne.n 8004f3c <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8004ed8: 4b1b ldr r3, [pc, #108] @ (8004f48 <HAL_UART_MspInit+0x90>)
8004eda: 699b ldr r3, [r3, #24]
8004edc: 4a1a ldr r2, [pc, #104] @ (8004f48 <HAL_UART_MspInit+0x90>)
8004ede: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8004ee2: 6193 str r3, [r2, #24]
8004ee4: 4b18 ldr r3, [pc, #96] @ (8004f48 <HAL_UART_MspInit+0x90>)
8004ee6: 699b ldr r3, [r3, #24]
8004ee8: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004eec: 60fb str r3, [r7, #12]
8004eee: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004ef0: 4b15 ldr r3, [pc, #84] @ (8004f48 <HAL_UART_MspInit+0x90>)
8004ef2: 699b ldr r3, [r3, #24]
8004ef4: 4a14 ldr r2, [pc, #80] @ (8004f48 <HAL_UART_MspInit+0x90>)
8004ef6: f043 0304 orr.w r3, r3, #4
8004efa: 6193 str r3, [r2, #24]
8004efc: 4b12 ldr r3, [pc, #72] @ (8004f48 <HAL_UART_MspInit+0x90>)
8004efe: 699b ldr r3, [r3, #24]
8004f00: f003 0304 and.w r3, r3, #4
8004f04: 60bb str r3, [r7, #8]
8004f06: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8004f08: f44f 7300 mov.w r3, #512 @ 0x200
8004f0c: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004f0e: 2302 movs r3, #2
8004f10: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8004f12: 2303 movs r3, #3
8004f14: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004f16: f107 0310 add.w r3, r7, #16
8004f1a: 4619 mov r1, r3
8004f1c: 480b ldr r0, [pc, #44] @ (8004f4c <HAL_UART_MspInit+0x94>)
8004f1e: f001 f9eb bl 80062f8 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
8004f22: f44f 6380 mov.w r3, #1024 @ 0x400
8004f26: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8004f28: 2300 movs r3, #0
8004f2a: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8004f2c: 2300 movs r3, #0
8004f2e: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004f30: f107 0310 add.w r3, r7, #16
8004f34: 4619 mov r1, r3
8004f36: 4805 ldr r0, [pc, #20] @ (8004f4c <HAL_UART_MspInit+0x94>)
8004f38: f001 f9de bl 80062f8 <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8004f3c: bf00 nop
8004f3e: 3720 adds r7, #32
8004f40: 46bd mov sp, r7
8004f42: bd80 pop {r7, pc}
8004f44: 40013800 .word 0x40013800
8004f48: 40021000 .word 0x40021000
8004f4c: 40010800 .word 0x40010800
08004f50 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8004f50: b480 push {r7}
8004f52: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8004f54: bf00 nop
8004f56: e7fd b.n 8004f54 <NMI_Handler+0x4>
08004f58 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8004f58: b480 push {r7}
8004f5a: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8004f5c: bf00 nop
8004f5e: e7fd b.n 8004f5c <HardFault_Handler+0x4>
08004f60 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8004f60: b480 push {r7}
8004f62: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8004f64: bf00 nop
8004f66: e7fd b.n 8004f64 <MemManage_Handler+0x4>
08004f68 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8004f68: b480 push {r7}
8004f6a: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8004f6c: bf00 nop
8004f6e: e7fd b.n 8004f6c <BusFault_Handler+0x4>
08004f70 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8004f70: b480 push {r7}
8004f72: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8004f74: bf00 nop
8004f76: e7fd b.n 8004f74 <UsageFault_Handler+0x4>
08004f78 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8004f78: b480 push {r7}
8004f7a: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8004f7c: bf00 nop
8004f7e: 46bd mov sp, r7
8004f80: bc80 pop {r7}
8004f82: 4770 bx lr
08004f84 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8004f84: b480 push {r7}
8004f86: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8004f88: bf00 nop
8004f8a: 46bd mov sp, r7
8004f8c: bc80 pop {r7}
8004f8e: 4770 bx lr
08004f90 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8004f90: b480 push {r7}
8004f92: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8004f94: bf00 nop
8004f96: 46bd mov sp, r7
8004f98: bc80 pop {r7}
8004f9a: 4770 bx lr
08004f9c <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8004f9c: b580 push {r7, lr}
8004f9e: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8004fa0: f000 f8c0 bl 8005124 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
8004fa4: f000 fdb3 bl 8005b0e <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
8004fa8: bf00 nop
8004faa: bd80 pop {r7, pc}
08004fac <DMA1_Channel1_IRQHandler>:
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
8004fac: b580 push {r7, lr}
8004fae: af00 add r7, sp, #0
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
8004fb0: 4802 ldr r0, [pc, #8] @ (8004fbc <DMA1_Channel1_IRQHandler+0x10>)
8004fb2: f000 fe6d bl 8005c90 <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
8004fb6: bf00 nop
8004fb8: bd80 pop {r7, pc}
8004fba: bf00 nop
8004fbc: 200002d4 .word 0x200002d4
08004fc0 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8004fc0: b580 push {r7, lr}
8004fc2: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8004fc4: 4802 ldr r0, [pc, #8] @ (8004fd0 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8004fc6: f001 fc66 bl 8006896 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8004fca: bf00 nop
8004fcc: bd80 pop {r7, pc}
8004fce: bf00 nop
8004fd0: 20001264 .word 0x20001264
08004fd4 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8004fd4: b580 push {r7, lr}
8004fd6: b086 sub sp, #24
8004fd8: af00 add r7, sp, #0
8004fda: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8004fdc: 4a14 ldr r2, [pc, #80] @ (8005030 <_sbrk+0x5c>)
8004fde: 4b15 ldr r3, [pc, #84] @ (8005034 <_sbrk+0x60>)
8004fe0: 1ad3 subs r3, r2, r3
8004fe2: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8004fe4: 697b ldr r3, [r7, #20]
8004fe6: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8004fe8: 4b13 ldr r3, [pc, #76] @ (8005038 <_sbrk+0x64>)
8004fea: 681b ldr r3, [r3, #0]
8004fec: 2b00 cmp r3, #0
8004fee: d102 bne.n 8004ff6 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8004ff0: 4b11 ldr r3, [pc, #68] @ (8005038 <_sbrk+0x64>)
8004ff2: 4a12 ldr r2, [pc, #72] @ (800503c <_sbrk+0x68>)
8004ff4: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8004ff6: 4b10 ldr r3, [pc, #64] @ (8005038 <_sbrk+0x64>)
8004ff8: 681a ldr r2, [r3, #0]
8004ffa: 687b ldr r3, [r7, #4]
8004ffc: 4413 add r3, r2
8004ffe: 693a ldr r2, [r7, #16]
8005000: 429a cmp r2, r3
8005002: d207 bcs.n 8005014 <_sbrk+0x40>
{
errno = ENOMEM;
8005004: f009 fa2c bl 800e460 <__errno>
8005008: 4603 mov r3, r0
800500a: 220c movs r2, #12
800500c: 601a str r2, [r3, #0]
return (void *)-1;
800500e: f04f 33ff mov.w r3, #4294967295
8005012: e009 b.n 8005028 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8005014: 4b08 ldr r3, [pc, #32] @ (8005038 <_sbrk+0x64>)
8005016: 681b ldr r3, [r3, #0]
8005018: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
800501a: 4b07 ldr r3, [pc, #28] @ (8005038 <_sbrk+0x64>)
800501c: 681a ldr r2, [r3, #0]
800501e: 687b ldr r3, [r7, #4]
8005020: 4413 add r3, r2
8005022: 4a05 ldr r2, [pc, #20] @ (8005038 <_sbrk+0x64>)
8005024: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8005026: 68fb ldr r3, [r7, #12]
}
8005028: 4618 mov r0, r3
800502a: 3718 adds r7, #24
800502c: 46bd mov sp, r7
800502e: bd80 pop {r7, pc}
8005030: 20005000 .word 0x20005000
8005034: 00000400 .word 0x00000400
8005038: 20000470 .word 0x20000470
800503c: 200018a8 .word 0x200018a8
08005040 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8005040: b480 push {r7}
8005042: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8005044: bf00 nop
8005046: 46bd mov sp, r7
8005048: bc80 pop {r7}
800504a: 4770 bx lr
0800504c <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
800504c: f7ff fff8 bl 8005040 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8005050: 480b ldr r0, [pc, #44] @ (8005080 <LoopFillZerobss+0xe>)
ldr r1, =_edata
8005052: 490c ldr r1, [pc, #48] @ (8005084 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8005054: 4a0c ldr r2, [pc, #48] @ (8005088 <LoopFillZerobss+0x16>)
movs r3, #0
8005056: 2300 movs r3, #0
b LoopCopyDataInit
8005058: e002 b.n 8005060 <LoopCopyDataInit>
0800505a <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
800505a: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
800505c: 50c4 str r4, [r0, r3]
adds r3, r3, #4
800505e: 3304 adds r3, #4
08005060 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8005060: 18c4 adds r4, r0, r3
cmp r4, r1
8005062: 428c cmp r4, r1
bcc CopyDataInit
8005064: d3f9 bcc.n 800505a <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8005066: 4a09 ldr r2, [pc, #36] @ (800508c <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8005068: 4c09 ldr r4, [pc, #36] @ (8005090 <LoopFillZerobss+0x1e>)
movs r3, #0
800506a: 2300 movs r3, #0
b LoopFillZerobss
800506c: e001 b.n 8005072 <LoopFillZerobss>
0800506e <FillZerobss>:
FillZerobss:
str r3, [r2]
800506e: 6013 str r3, [r2, #0]
adds r2, r2, #4
8005070: 3204 adds r2, #4
08005072 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8005072: 42a2 cmp r2, r4
bcc FillZerobss
8005074: d3fb bcc.n 800506e <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8005076: f009 f9f9 bl 800e46c <__libc_init_array>
/* Call the application's entry point.*/
bl main
800507a: f7fd ffbb bl 8002ff4 <main>
bx lr
800507e: 4770 bx lr
ldr r0, =_sdata
8005080: 20000000 .word 0x20000000
ldr r1, =_edata
8005084: 200001dc .word 0x200001dc
ldr r2, =_sidata
8005088: 0800f580 .word 0x0800f580
ldr r2, =_sbss
800508c: 200001e0 .word 0x200001e0
ldr r4, =_ebss
8005090: 200018a4 .word 0x200018a4
08005094 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8005094: e7fe b.n 8005094 <ADC1_2_IRQHandler>
...
08005098 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8005098: b580 push {r7, lr}
800509a: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
800509c: 4b08 ldr r3, [pc, #32] @ (80050c0 <HAL_Init+0x28>)
800509e: 681b ldr r3, [r3, #0]
80050a0: 4a07 ldr r2, [pc, #28] @ (80050c0 <HAL_Init+0x28>)
80050a2: f043 0310 orr.w r3, r3, #16
80050a6: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
80050a8: 2003 movs r0, #3
80050aa: f000 fcef bl 8005a8c <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
80050ae: 200f movs r0, #15
80050b0: f000 f808 bl 80050c4 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
80050b4: f7ff fdca bl 8004c4c <HAL_MspInit>
/* Return function status */
return HAL_OK;
80050b8: 2300 movs r3, #0
}
80050ba: 4618 mov r0, r3
80050bc: bd80 pop {r7, pc}
80050be: bf00 nop
80050c0: 40022000 .word 0x40022000
080050c4 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
80050c4: b580 push {r7, lr}
80050c6: b082 sub sp, #8
80050c8: af00 add r7, sp, #0
80050ca: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
80050cc: 4b12 ldr r3, [pc, #72] @ (8005118 <HAL_InitTick+0x54>)
80050ce: 681a ldr r2, [r3, #0]
80050d0: 4b12 ldr r3, [pc, #72] @ (800511c <HAL_InitTick+0x58>)
80050d2: 781b ldrb r3, [r3, #0]
80050d4: 4619 mov r1, r3
80050d6: f44f 737a mov.w r3, #1000 @ 0x3e8
80050da: fbb3 f3f1 udiv r3, r3, r1
80050de: fbb2 f3f3 udiv r3, r2, r3
80050e2: 4618 mov r0, r3
80050e4: f000 fd07 bl 8005af6 <HAL_SYSTICK_Config>
80050e8: 4603 mov r3, r0
80050ea: 2b00 cmp r3, #0
80050ec: d001 beq.n 80050f2 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
80050ee: 2301 movs r3, #1
80050f0: e00e b.n 8005110 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
80050f2: 687b ldr r3, [r7, #4]
80050f4: 2b0f cmp r3, #15
80050f6: d80a bhi.n 800510e <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
80050f8: 2200 movs r2, #0
80050fa: 6879 ldr r1, [r7, #4]
80050fc: f04f 30ff mov.w r0, #4294967295
8005100: f000 fccf bl 8005aa2 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8005104: 4a06 ldr r2, [pc, #24] @ (8005120 <HAL_InitTick+0x5c>)
8005106: 687b ldr r3, [r7, #4]
8005108: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
800510a: 2300 movs r3, #0
800510c: e000 b.n 8005110 <HAL_InitTick+0x4c>
return HAL_ERROR;
800510e: 2301 movs r3, #1
}
8005110: 4618 mov r0, r3
8005112: 3708 adds r7, #8
8005114: 46bd mov sp, r7
8005116: bd80 pop {r7, pc}
8005118: 20000010 .word 0x20000010
800511c: 20000018 .word 0x20000018
8005120: 20000014 .word 0x20000014
08005124 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8005124: b480 push {r7}
8005126: af00 add r7, sp, #0
uwTick += uwTickFreq;
8005128: 4b05 ldr r3, [pc, #20] @ (8005140 <HAL_IncTick+0x1c>)
800512a: 781b ldrb r3, [r3, #0]
800512c: 461a mov r2, r3
800512e: 4b05 ldr r3, [pc, #20] @ (8005144 <HAL_IncTick+0x20>)
8005130: 681b ldr r3, [r3, #0]
8005132: 4413 add r3, r2
8005134: 4a03 ldr r2, [pc, #12] @ (8005144 <HAL_IncTick+0x20>)
8005136: 6013 str r3, [r2, #0]
}
8005138: bf00 nop
800513a: 46bd mov sp, r7
800513c: bc80 pop {r7}
800513e: 4770 bx lr
8005140: 20000018 .word 0x20000018
8005144: 20000474 .word 0x20000474
08005148 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8005148: b480 push {r7}
800514a: af00 add r7, sp, #0
return uwTick;
800514c: 4b02 ldr r3, [pc, #8] @ (8005158 <HAL_GetTick+0x10>)
800514e: 681b ldr r3, [r3, #0]
}
8005150: 4618 mov r0, r3
8005152: 46bd mov sp, r7
8005154: bc80 pop {r7}
8005156: 4770 bx lr
8005158: 20000474 .word 0x20000474
0800515c <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
800515c: b580 push {r7, lr}
800515e: b086 sub sp, #24
8005160: af00 add r7, sp, #0
8005162: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8005164: 2300 movs r3, #0
8005166: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
8005168: 2300 movs r3, #0
800516a: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
800516c: 2300 movs r3, #0
800516e: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8005170: 2300 movs r3, #0
8005172: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
8005174: 687b ldr r3, [r7, #4]
8005176: 2b00 cmp r3, #0
8005178: d101 bne.n 800517e <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
800517a: 2301 movs r3, #1
800517c: e0be b.n 80052fc <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
800517e: 687b ldr r3, [r7, #4]
8005180: 689b ldr r3, [r3, #8]
8005182: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
8005184: 687b ldr r3, [r7, #4]
8005186: 6a9b ldr r3, [r3, #40] @ 0x28
8005188: 2b00 cmp r3, #0
800518a: d109 bne.n 80051a0 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
800518c: 687b ldr r3, [r7, #4]
800518e: 2200 movs r2, #0
8005190: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8005192: 687b ldr r3, [r7, #4]
8005194: 2200 movs r2, #0
8005196: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
800519a: 6878 ldr r0, [r7, #4]
800519c: f7ff fd88 bl 8004cb0 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
80051a0: 6878 ldr r0, [r7, #4]
80051a2: f000 faff bl 80057a4 <ADC_ConversionStop_Disable>
80051a6: 4603 mov r3, r0
80051a8: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
80051aa: 687b ldr r3, [r7, #4]
80051ac: 6a9b ldr r3, [r3, #40] @ 0x28
80051ae: f003 0310 and.w r3, r3, #16
80051b2: 2b00 cmp r3, #0
80051b4: f040 8099 bne.w 80052ea <HAL_ADC_Init+0x18e>
80051b8: 7dfb ldrb r3, [r7, #23]
80051ba: 2b00 cmp r3, #0
80051bc: f040 8095 bne.w 80052ea <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
80051c0: 687b ldr r3, [r7, #4]
80051c2: 6a9b ldr r3, [r3, #40] @ 0x28
80051c4: f423 5388 bic.w r3, r3, #4352 @ 0x1100
80051c8: f023 0302 bic.w r3, r3, #2
80051cc: f043 0202 orr.w r2, r3, #2
80051d0: 687b ldr r3, [r7, #4]
80051d2: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
80051d4: 687b ldr r3, [r7, #4]
80051d6: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
80051d8: 687b ldr r3, [r7, #4]
80051da: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
80051dc: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
80051de: 687b ldr r3, [r7, #4]
80051e0: 7b1b ldrb r3, [r3, #12]
80051e2: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
80051e4: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
80051e6: 68ba ldr r2, [r7, #8]
80051e8: 4313 orrs r3, r2
80051ea: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
80051ec: 687b ldr r3, [r7, #4]
80051ee: 689b ldr r3, [r3, #8]
80051f0: f5b3 7f80 cmp.w r3, #256 @ 0x100
80051f4: d003 beq.n 80051fe <HAL_ADC_Init+0xa2>
80051f6: 687b ldr r3, [r7, #4]
80051f8: 689b ldr r3, [r3, #8]
80051fa: 2b01 cmp r3, #1
80051fc: d102 bne.n 8005204 <HAL_ADC_Init+0xa8>
80051fe: f44f 7380 mov.w r3, #256 @ 0x100
8005202: e000 b.n 8005206 <HAL_ADC_Init+0xaa>
8005204: 2300 movs r3, #0
8005206: 693a ldr r2, [r7, #16]
8005208: 4313 orrs r3, r2
800520a: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
800520c: 687b ldr r3, [r7, #4]
800520e: 7d1b ldrb r3, [r3, #20]
8005210: 2b01 cmp r3, #1
8005212: d119 bne.n 8005248 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8005214: 687b ldr r3, [r7, #4]
8005216: 7b1b ldrb r3, [r3, #12]
8005218: 2b00 cmp r3, #0
800521a: d109 bne.n 8005230 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
800521c: 687b ldr r3, [r7, #4]
800521e: 699b ldr r3, [r3, #24]
8005220: 3b01 subs r3, #1
8005222: 035a lsls r2, r3, #13
8005224: 693b ldr r3, [r7, #16]
8005226: 4313 orrs r3, r2
8005228: f443 6300 orr.w r3, r3, #2048 @ 0x800
800522c: 613b str r3, [r7, #16]
800522e: e00b b.n 8005248 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8005230: 687b ldr r3, [r7, #4]
8005232: 6a9b ldr r3, [r3, #40] @ 0x28
8005234: f043 0220 orr.w r2, r3, #32
8005238: 687b ldr r3, [r7, #4]
800523a: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
800523c: 687b ldr r3, [r7, #4]
800523e: 6adb ldr r3, [r3, #44] @ 0x2c
8005240: f043 0201 orr.w r2, r3, #1
8005244: 687b ldr r3, [r7, #4]
8005246: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
8005248: 687b ldr r3, [r7, #4]
800524a: 681b ldr r3, [r3, #0]
800524c: 685b ldr r3, [r3, #4]
800524e: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8005252: 687b ldr r3, [r7, #4]
8005254: 681b ldr r3, [r3, #0]
8005256: 693a ldr r2, [r7, #16]
8005258: 430a orrs r2, r1
800525a: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
800525c: 687b ldr r3, [r7, #4]
800525e: 681b ldr r3, [r3, #0]
8005260: 689a ldr r2, [r3, #8]
8005262: 4b28 ldr r3, [pc, #160] @ (8005304 <HAL_ADC_Init+0x1a8>)
8005264: 4013 ands r3, r2
8005266: 687a ldr r2, [r7, #4]
8005268: 6812 ldr r2, [r2, #0]
800526a: 68b9 ldr r1, [r7, #8]
800526c: 430b orrs r3, r1
800526e: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8005270: 687b ldr r3, [r7, #4]
8005272: 689b ldr r3, [r3, #8]
8005274: f5b3 7f80 cmp.w r3, #256 @ 0x100
8005278: d003 beq.n 8005282 <HAL_ADC_Init+0x126>
800527a: 687b ldr r3, [r7, #4]
800527c: 689b ldr r3, [r3, #8]
800527e: 2b01 cmp r3, #1
8005280: d104 bne.n 800528c <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
8005282: 687b ldr r3, [r7, #4]
8005284: 691b ldr r3, [r3, #16]
8005286: 3b01 subs r3, #1
8005288: 051b lsls r3, r3, #20
800528a: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
800528c: 687b ldr r3, [r7, #4]
800528e: 681b ldr r3, [r3, #0]
8005290: 6adb ldr r3, [r3, #44] @ 0x2c
8005292: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
8005296: 687b ldr r3, [r7, #4]
8005298: 681b ldr r3, [r3, #0]
800529a: 68fa ldr r2, [r7, #12]
800529c: 430a orrs r2, r1
800529e: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80052a0: 687b ldr r3, [r7, #4]
80052a2: 681b ldr r3, [r3, #0]
80052a4: 689a ldr r2, [r3, #8]
80052a6: 4b18 ldr r3, [pc, #96] @ (8005308 <HAL_ADC_Init+0x1ac>)
80052a8: 4013 ands r3, r2
80052aa: 68ba ldr r2, [r7, #8]
80052ac: 429a cmp r2, r3
80052ae: d10b bne.n 80052c8 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
80052b0: 687b ldr r3, [r7, #4]
80052b2: 2200 movs r2, #0
80052b4: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
80052b6: 687b ldr r3, [r7, #4]
80052b8: 6a9b ldr r3, [r3, #40] @ 0x28
80052ba: f023 0303 bic.w r3, r3, #3
80052be: f043 0201 orr.w r2, r3, #1
80052c2: 687b ldr r3, [r7, #4]
80052c4: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80052c6: e018 b.n 80052fa <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
80052c8: 687b ldr r3, [r7, #4]
80052ca: 6a9b ldr r3, [r3, #40] @ 0x28
80052cc: f023 0312 bic.w r3, r3, #18
80052d0: f043 0210 orr.w r2, r3, #16
80052d4: 687b ldr r3, [r7, #4]
80052d6: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80052d8: 687b ldr r3, [r7, #4]
80052da: 6adb ldr r3, [r3, #44] @ 0x2c
80052dc: f043 0201 orr.w r2, r3, #1
80052e0: 687b ldr r3, [r7, #4]
80052e2: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
80052e4: 2301 movs r3, #1
80052e6: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80052e8: e007 b.n 80052fa <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80052ea: 687b ldr r3, [r7, #4]
80052ec: 6a9b ldr r3, [r3, #40] @ 0x28
80052ee: f043 0210 orr.w r2, r3, #16
80052f2: 687b ldr r3, [r7, #4]
80052f4: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
80052f6: 2301 movs r3, #1
80052f8: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
80052fa: 7dfb ldrb r3, [r7, #23]
}
80052fc: 4618 mov r0, r3
80052fe: 3718 adds r7, #24
8005300: 46bd mov sp, r7
8005302: bd80 pop {r7, pc}
8005304: ffe1f7fd .word 0xffe1f7fd
8005308: ff1f0efe .word 0xff1f0efe
0800530c <HAL_ADC_Start_DMA>:
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @retval None
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
{
800530c: b580 push {r7, lr}
800530e: b086 sub sp, #24
8005310: af00 add r7, sp, #0
8005312: 60f8 str r0, [r7, #12]
8005314: 60b9 str r1, [r7, #8]
8005316: 607a str r2, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8005318: 2300 movs r3, #0
800531a: 75fb strb r3, [r7, #23]
assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
/* Verification if multimode is disabled (for devices with several ADC) */
/* If multimode is enabled, dedicated function multimode conversion */
/* start DMA must be used. */
if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
800531c: 68fb ldr r3, [r7, #12]
800531e: 681b ldr r3, [r3, #0]
8005320: 4a64 ldr r2, [pc, #400] @ (80054b4 <HAL_ADC_Start_DMA+0x1a8>)
8005322: 4293 cmp r3, r2
8005324: d004 beq.n 8005330 <HAL_ADC_Start_DMA+0x24>
8005326: 68fb ldr r3, [r7, #12]
8005328: 681b ldr r3, [r3, #0]
800532a: 4a63 ldr r2, [pc, #396] @ (80054b8 <HAL_ADC_Start_DMA+0x1ac>)
800532c: 4293 cmp r3, r2
800532e: d106 bne.n 800533e <HAL_ADC_Start_DMA+0x32>
8005330: 4b60 ldr r3, [pc, #384] @ (80054b4 <HAL_ADC_Start_DMA+0x1a8>)
8005332: 685b ldr r3, [r3, #4]
8005334: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8005338: 2b00 cmp r3, #0
800533a: f040 80b3 bne.w 80054a4 <HAL_ADC_Start_DMA+0x198>
{
/* Process locked */
__HAL_LOCK(hadc);
800533e: 68fb ldr r3, [r7, #12]
8005340: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8005344: 2b01 cmp r3, #1
8005346: d101 bne.n 800534c <HAL_ADC_Start_DMA+0x40>
8005348: 2302 movs r3, #2
800534a: e0ae b.n 80054aa <HAL_ADC_Start_DMA+0x19e>
800534c: 68fb ldr r3, [r7, #12]
800534e: 2201 movs r2, #1
8005350: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
8005354: 68f8 ldr r0, [r7, #12]
8005356: f000 f9cb bl 80056f0 <ADC_Enable>
800535a: 4603 mov r3, r0
800535c: 75fb strb r3, [r7, #23]
/* Start conversion if ADC is effectively enabled */
if (tmp_hal_status == HAL_OK)
800535e: 7dfb ldrb r3, [r7, #23]
8005360: 2b00 cmp r3, #0
8005362: f040 809a bne.w 800549a <HAL_ADC_Start_DMA+0x18e>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular operation */
ADC_STATE_CLR_SET(hadc->State,
8005366: 68fb ldr r3, [r7, #12]
8005368: 6a9b ldr r3, [r3, #40] @ 0x28
800536a: f423 6370 bic.w r3, r3, #3840 @ 0xf00
800536e: f023 0301 bic.w r3, r3, #1
8005372: f443 7280 orr.w r2, r3, #256 @ 0x100
8005376: 68fb ldr r3, [r7, #12]
8005378: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_REG_BUSY);
/* Set group injected state (from auto-injection) and multimode state */
/* for all cases of multimode: independent mode, multimode ADC master */
/* or multimode ADC slave (for devices with several ADCs): */
if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
800537a: 68fb ldr r3, [r7, #12]
800537c: 681b ldr r3, [r3, #0]
800537e: 4a4e ldr r2, [pc, #312] @ (80054b8 <HAL_ADC_Start_DMA+0x1ac>)
8005380: 4293 cmp r3, r2
8005382: d105 bne.n 8005390 <HAL_ADC_Start_DMA+0x84>
8005384: 4b4b ldr r3, [pc, #300] @ (80054b4 <HAL_ADC_Start_DMA+0x1a8>)
8005386: 685b ldr r3, [r3, #4]
8005388: f403 2370 and.w r3, r3, #983040 @ 0xf0000
800538c: 2b00 cmp r3, #0
800538e: d115 bne.n 80053bc <HAL_ADC_Start_DMA+0xb0>
{
/* Set ADC state (ADC independent or master) */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8005390: 68fb ldr r3, [r7, #12]
8005392: 6a9b ldr r3, [r3, #40] @ 0x28
8005394: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
8005398: 68fb ldr r3, [r7, #12]
800539a: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
800539c: 68fb ldr r3, [r7, #12]
800539e: 681b ldr r3, [r3, #0]
80053a0: 685b ldr r3, [r3, #4]
80053a2: f403 6380 and.w r3, r3, #1024 @ 0x400
80053a6: 2b00 cmp r3, #0
80053a8: d026 beq.n 80053f8 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
80053aa: 68fb ldr r3, [r7, #12]
80053ac: 6a9b ldr r3, [r3, #40] @ 0x28
80053ae: f423 5340 bic.w r3, r3, #12288 @ 0x3000
80053b2: f443 5280 orr.w r2, r3, #4096 @ 0x1000
80053b6: 68fb ldr r3, [r7, #12]
80053b8: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
80053ba: e01d b.n 80053f8 <HAL_ADC_Start_DMA+0xec>
}
}
else
{
/* Set ADC state (ADC slave) */
SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
80053bc: 68fb ldr r3, [r7, #12]
80053be: 6a9b ldr r3, [r3, #40] @ 0x28
80053c0: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
80053c4: 68fb ldr r3, [r7, #12]
80053c6: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
80053c8: 68fb ldr r3, [r7, #12]
80053ca: 681b ldr r3, [r3, #0]
80053cc: 4a39 ldr r2, [pc, #228] @ (80054b4 <HAL_ADC_Start_DMA+0x1a8>)
80053ce: 4293 cmp r3, r2
80053d0: d004 beq.n 80053dc <HAL_ADC_Start_DMA+0xd0>
80053d2: 68fb ldr r3, [r7, #12]
80053d4: 681b ldr r3, [r3, #0]
80053d6: 4a38 ldr r2, [pc, #224] @ (80054b8 <HAL_ADC_Start_DMA+0x1ac>)
80053d8: 4293 cmp r3, r2
80053da: d10d bne.n 80053f8 <HAL_ADC_Start_DMA+0xec>
80053dc: 4b35 ldr r3, [pc, #212] @ (80054b4 <HAL_ADC_Start_DMA+0x1a8>)
80053de: 685b ldr r3, [r3, #4]
80053e0: f403 6380 and.w r3, r3, #1024 @ 0x400
80053e4: 2b00 cmp r3, #0
80053e6: d007 beq.n 80053f8 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
80053e8: 68fb ldr r3, [r7, #12]
80053ea: 6a9b ldr r3, [r3, #40] @ 0x28
80053ec: f423 5340 bic.w r3, r3, #12288 @ 0x3000
80053f0: f443 5280 orr.w r2, r3, #4096 @ 0x1000
80053f4: 68fb ldr r3, [r7, #12]
80053f6: 629a str r2, [r3, #40] @ 0x28
}
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
80053f8: 68fb ldr r3, [r7, #12]
80053fa: 6a9b ldr r3, [r3, #40] @ 0x28
80053fc: f403 5380 and.w r3, r3, #4096 @ 0x1000
8005400: 2b00 cmp r3, #0
8005402: d006 beq.n 8005412 <HAL_ADC_Start_DMA+0x106>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
8005404: 68fb ldr r3, [r7, #12]
8005406: 6adb ldr r3, [r3, #44] @ 0x2c
8005408: f023 0206 bic.w r2, r3, #6
800540c: 68fb ldr r3, [r7, #12]
800540e: 62da str r2, [r3, #44] @ 0x2c
8005410: e002 b.n 8005418 <HAL_ADC_Start_DMA+0x10c>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
8005412: 68fb ldr r3, [r7, #12]
8005414: 2200 movs r2, #0
8005416: 62da str r2, [r3, #44] @ 0x2c
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
8005418: 68fb ldr r3, [r7, #12]
800541a: 2200 movs r2, #0
800541c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Set the DMA transfer complete callback */
hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
8005420: 68fb ldr r3, [r7, #12]
8005422: 6a1b ldr r3, [r3, #32]
8005424: 4a25 ldr r2, [pc, #148] @ (80054bc <HAL_ADC_Start_DMA+0x1b0>)
8005426: 629a str r2, [r3, #40] @ 0x28
/* Set the DMA half transfer complete callback */
hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
8005428: 68fb ldr r3, [r7, #12]
800542a: 6a1b ldr r3, [r3, #32]
800542c: 4a24 ldr r2, [pc, #144] @ (80054c0 <HAL_ADC_Start_DMA+0x1b4>)
800542e: 62da str r2, [r3, #44] @ 0x2c
/* Set the DMA error callback */
hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
8005430: 68fb ldr r3, [r7, #12]
8005432: 6a1b ldr r3, [r3, #32]
8005434: 4a23 ldr r2, [pc, #140] @ (80054c4 <HAL_ADC_Start_DMA+0x1b8>)
8005436: 631a str r2, [r3, #48] @ 0x30
/* start (in case of SW start): */
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC */
/* operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
8005438: 68fb ldr r3, [r7, #12]
800543a: 681b ldr r3, [r3, #0]
800543c: f06f 0202 mvn.w r2, #2
8005440: 601a str r2, [r3, #0]
/* Enable ADC DMA mode */
SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
8005442: 68fb ldr r3, [r7, #12]
8005444: 681b ldr r3, [r3, #0]
8005446: 689a ldr r2, [r3, #8]
8005448: 68fb ldr r3, [r7, #12]
800544a: 681b ldr r3, [r3, #0]
800544c: f442 7280 orr.w r2, r2, #256 @ 0x100
8005450: 609a str r2, [r3, #8]
/* Start the DMA channel */
HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
8005452: 68fb ldr r3, [r7, #12]
8005454: 6a18 ldr r0, [r3, #32]
8005456: 68fb ldr r3, [r7, #12]
8005458: 681b ldr r3, [r3, #0]
800545a: 334c adds r3, #76 @ 0x4c
800545c: 4619 mov r1, r3
800545e: 68ba ldr r2, [r7, #8]
8005460: 687b ldr r3, [r7, #4]
8005462: f000 fbb5 bl 8005bd0 <HAL_DMA_Start_IT>
/* Enable conversion of regular group. */
/* If software start has been selected, conversion starts immediately. */
/* If external trigger has been selected, conversion will start at next */
/* trigger event. */
if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
8005466: 68fb ldr r3, [r7, #12]
8005468: 681b ldr r3, [r3, #0]
800546a: 689b ldr r3, [r3, #8]
800546c: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8005470: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
8005474: d108 bne.n 8005488 <HAL_ADC_Start_DMA+0x17c>
{
/* Start ADC conversion on regular group with SW start */
SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
8005476: 68fb ldr r3, [r7, #12]
8005478: 681b ldr r3, [r3, #0]
800547a: 689a ldr r2, [r3, #8]
800547c: 68fb ldr r3, [r7, #12]
800547e: 681b ldr r3, [r3, #0]
8005480: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000
8005484: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
8005486: e00f b.n 80054a8 <HAL_ADC_Start_DMA+0x19c>
}
else
{
/* Start ADC conversion on regular group with external trigger */
SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
8005488: 68fb ldr r3, [r7, #12]
800548a: 681b ldr r3, [r3, #0]
800548c: 689a ldr r2, [r3, #8]
800548e: 68fb ldr r3, [r7, #12]
8005490: 681b ldr r3, [r3, #0]
8005492: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
8005496: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
8005498: e006 b.n 80054a8 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hadc);
800549a: 68fb ldr r3, [r7, #12]
800549c: 2200 movs r2, #0
800549e: f883 2024 strb.w r2, [r3, #36] @ 0x24
if (tmp_hal_status == HAL_OK)
80054a2: e001 b.n 80054a8 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
tmp_hal_status = HAL_ERROR;
80054a4: 2301 movs r3, #1
80054a6: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
80054a8: 7dfb ldrb r3, [r7, #23]
}
80054aa: 4618 mov r0, r3
80054ac: 3718 adds r7, #24
80054ae: 46bd mov sp, r7
80054b0: bd80 pop {r7, pc}
80054b2: bf00 nop
80054b4: 40012400 .word 0x40012400
80054b8: 40012800 .word 0x40012800
80054bc: 08005827 .word 0x08005827
80054c0: 080058a3 .word 0x080058a3
80054c4: 080058bf .word 0x080058bf
080054c8 <HAL_ADC_ConvCpltCallback>:
* @brief Conversion complete callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
80054c8: b480 push {r7}
80054ca: b083 sub sp, #12
80054cc: af00 add r7, sp, #0
80054ce: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvCpltCallback must be implemented in the user file.
*/
}
80054d0: bf00 nop
80054d2: 370c adds r7, #12
80054d4: 46bd mov sp, r7
80054d6: bc80 pop {r7}
80054d8: 4770 bx lr
080054da <HAL_ADC_ConvHalfCpltCallback>:
* @brief Conversion DMA half-transfer callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
{
80054da: b480 push {r7}
80054dc: b083 sub sp, #12
80054de: af00 add r7, sp, #0
80054e0: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
*/
}
80054e2: bf00 nop
80054e4: 370c adds r7, #12
80054e6: 46bd mov sp, r7
80054e8: bc80 pop {r7}
80054ea: 4770 bx lr
080054ec <HAL_ADC_ErrorCallback>:
* (ADC conversion with interruption or transfer by DMA)
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
80054ec: b480 push {r7}
80054ee: b083 sub sp, #12
80054f0: af00 add r7, sp, #0
80054f2: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ErrorCallback must be implemented in the user file.
*/
}
80054f4: bf00 nop
80054f6: 370c adds r7, #12
80054f8: 46bd mov sp, r7
80054fa: bc80 pop {r7}
80054fc: 4770 bx lr
...
08005500 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8005500: b480 push {r7}
8005502: b085 sub sp, #20
8005504: af00 add r7, sp, #0
8005506: 6078 str r0, [r7, #4]
8005508: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
800550a: 2300 movs r3, #0
800550c: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
800550e: 2300 movs r3, #0
8005510: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8005512: 687b ldr r3, [r7, #4]
8005514: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8005518: 2b01 cmp r3, #1
800551a: d101 bne.n 8005520 <HAL_ADC_ConfigChannel+0x20>
800551c: 2302 movs r3, #2
800551e: e0dc b.n 80056da <HAL_ADC_ConfigChannel+0x1da>
8005520: 687b ldr r3, [r7, #4]
8005522: 2201 movs r2, #1
8005524: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
8005528: 683b ldr r3, [r7, #0]
800552a: 685b ldr r3, [r3, #4]
800552c: 2b06 cmp r3, #6
800552e: d81c bhi.n 800556a <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8005530: 687b ldr r3, [r7, #4]
8005532: 681b ldr r3, [r3, #0]
8005534: 6b59 ldr r1, [r3, #52] @ 0x34
8005536: 683b ldr r3, [r7, #0]
8005538: 685a ldr r2, [r3, #4]
800553a: 4613 mov r3, r2
800553c: 009b lsls r3, r3, #2
800553e: 4413 add r3, r2
8005540: 3b05 subs r3, #5
8005542: 221f movs r2, #31
8005544: fa02 f303 lsl.w r3, r2, r3
8005548: 43db mvns r3, r3
800554a: 4019 ands r1, r3
800554c: 683b ldr r3, [r7, #0]
800554e: 6818 ldr r0, [r3, #0]
8005550: 683b ldr r3, [r7, #0]
8005552: 685a ldr r2, [r3, #4]
8005554: 4613 mov r3, r2
8005556: 009b lsls r3, r3, #2
8005558: 4413 add r3, r2
800555a: 3b05 subs r3, #5
800555c: fa00 f203 lsl.w r2, r0, r3
8005560: 687b ldr r3, [r7, #4]
8005562: 681b ldr r3, [r3, #0]
8005564: 430a orrs r2, r1
8005566: 635a str r2, [r3, #52] @ 0x34
8005568: e03c b.n 80055e4 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
800556a: 683b ldr r3, [r7, #0]
800556c: 685b ldr r3, [r3, #4]
800556e: 2b0c cmp r3, #12
8005570: d81c bhi.n 80055ac <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
8005572: 687b ldr r3, [r7, #4]
8005574: 681b ldr r3, [r3, #0]
8005576: 6b19 ldr r1, [r3, #48] @ 0x30
8005578: 683b ldr r3, [r7, #0]
800557a: 685a ldr r2, [r3, #4]
800557c: 4613 mov r3, r2
800557e: 009b lsls r3, r3, #2
8005580: 4413 add r3, r2
8005582: 3b23 subs r3, #35 @ 0x23
8005584: 221f movs r2, #31
8005586: fa02 f303 lsl.w r3, r2, r3
800558a: 43db mvns r3, r3
800558c: 4019 ands r1, r3
800558e: 683b ldr r3, [r7, #0]
8005590: 6818 ldr r0, [r3, #0]
8005592: 683b ldr r3, [r7, #0]
8005594: 685a ldr r2, [r3, #4]
8005596: 4613 mov r3, r2
8005598: 009b lsls r3, r3, #2
800559a: 4413 add r3, r2
800559c: 3b23 subs r3, #35 @ 0x23
800559e: fa00 f203 lsl.w r2, r0, r3
80055a2: 687b ldr r3, [r7, #4]
80055a4: 681b ldr r3, [r3, #0]
80055a6: 430a orrs r2, r1
80055a8: 631a str r2, [r3, #48] @ 0x30
80055aa: e01b b.n 80055e4 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
80055ac: 687b ldr r3, [r7, #4]
80055ae: 681b ldr r3, [r3, #0]
80055b0: 6ad9 ldr r1, [r3, #44] @ 0x2c
80055b2: 683b ldr r3, [r7, #0]
80055b4: 685a ldr r2, [r3, #4]
80055b6: 4613 mov r3, r2
80055b8: 009b lsls r3, r3, #2
80055ba: 4413 add r3, r2
80055bc: 3b41 subs r3, #65 @ 0x41
80055be: 221f movs r2, #31
80055c0: fa02 f303 lsl.w r3, r2, r3
80055c4: 43db mvns r3, r3
80055c6: 4019 ands r1, r3
80055c8: 683b ldr r3, [r7, #0]
80055ca: 6818 ldr r0, [r3, #0]
80055cc: 683b ldr r3, [r7, #0]
80055ce: 685a ldr r2, [r3, #4]
80055d0: 4613 mov r3, r2
80055d2: 009b lsls r3, r3, #2
80055d4: 4413 add r3, r2
80055d6: 3b41 subs r3, #65 @ 0x41
80055d8: fa00 f203 lsl.w r2, r0, r3
80055dc: 687b ldr r3, [r7, #4]
80055de: 681b ldr r3, [r3, #0]
80055e0: 430a orrs r2, r1
80055e2: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
80055e4: 683b ldr r3, [r7, #0]
80055e6: 681b ldr r3, [r3, #0]
80055e8: 2b09 cmp r3, #9
80055ea: d91c bls.n 8005626 <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
80055ec: 687b ldr r3, [r7, #4]
80055ee: 681b ldr r3, [r3, #0]
80055f0: 68d9 ldr r1, [r3, #12]
80055f2: 683b ldr r3, [r7, #0]
80055f4: 681a ldr r2, [r3, #0]
80055f6: 4613 mov r3, r2
80055f8: 005b lsls r3, r3, #1
80055fa: 4413 add r3, r2
80055fc: 3b1e subs r3, #30
80055fe: 2207 movs r2, #7
8005600: fa02 f303 lsl.w r3, r2, r3
8005604: 43db mvns r3, r3
8005606: 4019 ands r1, r3
8005608: 683b ldr r3, [r7, #0]
800560a: 6898 ldr r0, [r3, #8]
800560c: 683b ldr r3, [r7, #0]
800560e: 681a ldr r2, [r3, #0]
8005610: 4613 mov r3, r2
8005612: 005b lsls r3, r3, #1
8005614: 4413 add r3, r2
8005616: 3b1e subs r3, #30
8005618: fa00 f203 lsl.w r2, r0, r3
800561c: 687b ldr r3, [r7, #4]
800561e: 681b ldr r3, [r3, #0]
8005620: 430a orrs r2, r1
8005622: 60da str r2, [r3, #12]
8005624: e019 b.n 800565a <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8005626: 687b ldr r3, [r7, #4]
8005628: 681b ldr r3, [r3, #0]
800562a: 6919 ldr r1, [r3, #16]
800562c: 683b ldr r3, [r7, #0]
800562e: 681a ldr r2, [r3, #0]
8005630: 4613 mov r3, r2
8005632: 005b lsls r3, r3, #1
8005634: 4413 add r3, r2
8005636: 2207 movs r2, #7
8005638: fa02 f303 lsl.w r3, r2, r3
800563c: 43db mvns r3, r3
800563e: 4019 ands r1, r3
8005640: 683b ldr r3, [r7, #0]
8005642: 6898 ldr r0, [r3, #8]
8005644: 683b ldr r3, [r7, #0]
8005646: 681a ldr r2, [r3, #0]
8005648: 4613 mov r3, r2
800564a: 005b lsls r3, r3, #1
800564c: 4413 add r3, r2
800564e: fa00 f203 lsl.w r2, r0, r3
8005652: 687b ldr r3, [r7, #4]
8005654: 681b ldr r3, [r3, #0]
8005656: 430a orrs r2, r1
8005658: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
800565a: 683b ldr r3, [r7, #0]
800565c: 681b ldr r3, [r3, #0]
800565e: 2b10 cmp r3, #16
8005660: d003 beq.n 800566a <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8005662: 683b ldr r3, [r7, #0]
8005664: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8005666: 2b11 cmp r3, #17
8005668: d132 bne.n 80056d0 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
800566a: 687b ldr r3, [r7, #4]
800566c: 681b ldr r3, [r3, #0]
800566e: 4a1d ldr r2, [pc, #116] @ (80056e4 <HAL_ADC_ConfigChannel+0x1e4>)
8005670: 4293 cmp r3, r2
8005672: d125 bne.n 80056c0 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8005674: 687b ldr r3, [r7, #4]
8005676: 681b ldr r3, [r3, #0]
8005678: 689b ldr r3, [r3, #8]
800567a: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800567e: 2b00 cmp r3, #0
8005680: d126 bne.n 80056d0 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8005682: 687b ldr r3, [r7, #4]
8005684: 681b ldr r3, [r3, #0]
8005686: 689a ldr r2, [r3, #8]
8005688: 687b ldr r3, [r7, #4]
800568a: 681b ldr r3, [r3, #0]
800568c: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8005690: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
8005692: 683b ldr r3, [r7, #0]
8005694: 681b ldr r3, [r3, #0]
8005696: 2b10 cmp r3, #16
8005698: d11a bne.n 80056d0 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
800569a: 4b13 ldr r3, [pc, #76] @ (80056e8 <HAL_ADC_ConfigChannel+0x1e8>)
800569c: 681b ldr r3, [r3, #0]
800569e: 4a13 ldr r2, [pc, #76] @ (80056ec <HAL_ADC_ConfigChannel+0x1ec>)
80056a0: fba2 2303 umull r2, r3, r2, r3
80056a4: 0c9a lsrs r2, r3, #18
80056a6: 4613 mov r3, r2
80056a8: 009b lsls r3, r3, #2
80056aa: 4413 add r3, r2
80056ac: 005b lsls r3, r3, #1
80056ae: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80056b0: e002 b.n 80056b8 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
80056b2: 68bb ldr r3, [r7, #8]
80056b4: 3b01 subs r3, #1
80056b6: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80056b8: 68bb ldr r3, [r7, #8]
80056ba: 2b00 cmp r3, #0
80056bc: d1f9 bne.n 80056b2 <HAL_ADC_ConfigChannel+0x1b2>
80056be: e007 b.n 80056d0 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
80056c0: 687b ldr r3, [r7, #4]
80056c2: 6a9b ldr r3, [r3, #40] @ 0x28
80056c4: f043 0220 orr.w r2, r3, #32
80056c8: 687b ldr r3, [r7, #4]
80056ca: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
80056cc: 2301 movs r3, #1
80056ce: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
80056d0: 687b ldr r3, [r7, #4]
80056d2: 2200 movs r2, #0
80056d4: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
80056d8: 7bfb ldrb r3, [r7, #15]
}
80056da: 4618 mov r0, r3
80056dc: 3714 adds r7, #20
80056de: 46bd mov sp, r7
80056e0: bc80 pop {r7}
80056e2: 4770 bx lr
80056e4: 40012400 .word 0x40012400
80056e8: 20000010 .word 0x20000010
80056ec: 431bde83 .word 0x431bde83
080056f0 <ADC_Enable>:
* and voltage regulator must be enabled (done into HAL_ADC_Init()).
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
{
80056f0: b580 push {r7, lr}
80056f2: b084 sub sp, #16
80056f4: af00 add r7, sp, #0
80056f6: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
80056f8: 2300 movs r3, #0
80056fa: 60fb str r3, [r7, #12]
__IO uint32_t wait_loop_index = 0U;
80056fc: 2300 movs r3, #0
80056fe: 60bb str r3, [r7, #8]
/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
/* enabling phase not yet completed: flag ADC ready not yet set). */
/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
/* causes: ADC clock not running, ...). */
if (ADC_IS_ENABLE(hadc) == RESET)
8005700: 687b ldr r3, [r7, #4]
8005702: 681b ldr r3, [r3, #0]
8005704: 689b ldr r3, [r3, #8]
8005706: f003 0301 and.w r3, r3, #1
800570a: 2b01 cmp r3, #1
800570c: d040 beq.n 8005790 <ADC_Enable+0xa0>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
800570e: 687b ldr r3, [r7, #4]
8005710: 681b ldr r3, [r3, #0]
8005712: 689a ldr r2, [r3, #8]
8005714: 687b ldr r3, [r7, #4]
8005716: 681b ldr r3, [r3, #0]
8005718: f042 0201 orr.w r2, r2, #1
800571c: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
800571e: 4b1f ldr r3, [pc, #124] @ (800579c <ADC_Enable+0xac>)
8005720: 681b ldr r3, [r3, #0]
8005722: 4a1f ldr r2, [pc, #124] @ (80057a0 <ADC_Enable+0xb0>)
8005724: fba2 2303 umull r2, r3, r2, r3
8005728: 0c9b lsrs r3, r3, #18
800572a: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
800572c: e002 b.n 8005734 <ADC_Enable+0x44>
{
wait_loop_index--;
800572e: 68bb ldr r3, [r7, #8]
8005730: 3b01 subs r3, #1
8005732: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005734: 68bb ldr r3, [r7, #8]
8005736: 2b00 cmp r3, #0
8005738: d1f9 bne.n 800572e <ADC_Enable+0x3e>
}
/* Get tick count */
tickstart = HAL_GetTick();
800573a: f7ff fd05 bl 8005148 <HAL_GetTick>
800573e: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively enabled */
while(ADC_IS_ENABLE(hadc) == RESET)
8005740: e01f b.n 8005782 <ADC_Enable+0x92>
{
if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
8005742: f7ff fd01 bl 8005148 <HAL_GetTick>
8005746: 4602 mov r2, r0
8005748: 68fb ldr r3, [r7, #12]
800574a: 1ad3 subs r3, r2, r3
800574c: 2b02 cmp r3, #2
800574e: d918 bls.n 8005782 <ADC_Enable+0x92>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) == RESET)
8005750: 687b ldr r3, [r7, #4]
8005752: 681b ldr r3, [r3, #0]
8005754: 689b ldr r3, [r3, #8]
8005756: f003 0301 and.w r3, r3, #1
800575a: 2b01 cmp r3, #1
800575c: d011 beq.n 8005782 <ADC_Enable+0x92>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800575e: 687b ldr r3, [r7, #4]
8005760: 6a9b ldr r3, [r3, #40] @ 0x28
8005762: f043 0210 orr.w r2, r3, #16
8005766: 687b ldr r3, [r7, #4]
8005768: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
800576a: 687b ldr r3, [r7, #4]
800576c: 6adb ldr r3, [r3, #44] @ 0x2c
800576e: f043 0201 orr.w r2, r3, #1
8005772: 687b ldr r3, [r7, #4]
8005774: 62da str r2, [r3, #44] @ 0x2c
/* Process unlocked */
__HAL_UNLOCK(hadc);
8005776: 687b ldr r3, [r7, #4]
8005778: 2200 movs r2, #0
800577a: f883 2024 strb.w r2, [r3, #36] @ 0x24
return HAL_ERROR;
800577e: 2301 movs r3, #1
8005780: e007 b.n 8005792 <ADC_Enable+0xa2>
while(ADC_IS_ENABLE(hadc) == RESET)
8005782: 687b ldr r3, [r7, #4]
8005784: 681b ldr r3, [r3, #0]
8005786: 689b ldr r3, [r3, #8]
8005788: f003 0301 and.w r3, r3, #1
800578c: 2b01 cmp r3, #1
800578e: d1d8 bne.n 8005742 <ADC_Enable+0x52>
}
}
}
/* Return HAL status */
return HAL_OK;
8005790: 2300 movs r3, #0
}
8005792: 4618 mov r0, r3
8005794: 3710 adds r7, #16
8005796: 46bd mov sp, r7
8005798: bd80 pop {r7, pc}
800579a: bf00 nop
800579c: 20000010 .word 0x20000010
80057a0: 431bde83 .word 0x431bde83
080057a4 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
80057a4: b580 push {r7, lr}
80057a6: b084 sub sp, #16
80057a8: af00 add r7, sp, #0
80057aa: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
80057ac: 2300 movs r3, #0
80057ae: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
80057b0: 687b ldr r3, [r7, #4]
80057b2: 681b ldr r3, [r3, #0]
80057b4: 689b ldr r3, [r3, #8]
80057b6: f003 0301 and.w r3, r3, #1
80057ba: 2b01 cmp r3, #1
80057bc: d12e bne.n 800581c <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
80057be: 687b ldr r3, [r7, #4]
80057c0: 681b ldr r3, [r3, #0]
80057c2: 689a ldr r2, [r3, #8]
80057c4: 687b ldr r3, [r7, #4]
80057c6: 681b ldr r3, [r3, #0]
80057c8: f022 0201 bic.w r2, r2, #1
80057cc: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
80057ce: f7ff fcbb bl 8005148 <HAL_GetTick>
80057d2: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
80057d4: e01b b.n 800580e <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
80057d6: f7ff fcb7 bl 8005148 <HAL_GetTick>
80057da: 4602 mov r2, r0
80057dc: 68fb ldr r3, [r7, #12]
80057de: 1ad3 subs r3, r2, r3
80057e0: 2b02 cmp r3, #2
80057e2: d914 bls.n 800580e <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
80057e4: 687b ldr r3, [r7, #4]
80057e6: 681b ldr r3, [r3, #0]
80057e8: 689b ldr r3, [r3, #8]
80057ea: f003 0301 and.w r3, r3, #1
80057ee: 2b01 cmp r3, #1
80057f0: d10d bne.n 800580e <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80057f2: 687b ldr r3, [r7, #4]
80057f4: 6a9b ldr r3, [r3, #40] @ 0x28
80057f6: f043 0210 orr.w r2, r3, #16
80057fa: 687b ldr r3, [r7, #4]
80057fc: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80057fe: 687b ldr r3, [r7, #4]
8005800: 6adb ldr r3, [r3, #44] @ 0x2c
8005802: f043 0201 orr.w r2, r3, #1
8005806: 687b ldr r3, [r7, #4]
8005808: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
800580a: 2301 movs r3, #1
800580c: e007 b.n 800581e <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
800580e: 687b ldr r3, [r7, #4]
8005810: 681b ldr r3, [r3, #0]
8005812: 689b ldr r3, [r3, #8]
8005814: f003 0301 and.w r3, r3, #1
8005818: 2b01 cmp r3, #1
800581a: d0dc beq.n 80057d6 <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
800581c: 2300 movs r3, #0
}
800581e: 4618 mov r0, r3
8005820: 3710 adds r7, #16
8005822: 46bd mov sp, r7
8005824: bd80 pop {r7, pc}
08005826 <ADC_DMAConvCplt>:
* @brief DMA transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
8005826: b580 push {r7, lr}
8005828: b084 sub sp, #16
800582a: af00 add r7, sp, #0
800582c: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
800582e: 687b ldr r3, [r7, #4]
8005830: 6a5b ldr r3, [r3, #36] @ 0x24
8005832: 60fb str r3, [r7, #12]
/* Update state machine on conversion status if not in error state */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
8005834: 68fb ldr r3, [r7, #12]
8005836: 6a9b ldr r3, [r3, #40] @ 0x28
8005838: f003 0350 and.w r3, r3, #80 @ 0x50
800583c: 2b00 cmp r3, #0
800583e: d127 bne.n 8005890 <ADC_DMAConvCplt+0x6a>
{
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
8005840: 68fb ldr r3, [r7, #12]
8005842: 6a9b ldr r3, [r3, #40] @ 0x28
8005844: f443 7200 orr.w r2, r3, #512 @ 0x200
8005848: 68fb ldr r3, [r7, #12]
800584a: 629a str r2, [r3, #40] @ 0x28
/* Determine whether any further conversion upcoming on group regular */
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F1 devices, in case of sequencer enabled */
/* (several ranks selected), end of conversion flag is raised */
/* at the end of the sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
800584c: 68fb ldr r3, [r7, #12]
800584e: 681b ldr r3, [r3, #0]
8005850: 689b ldr r3, [r3, #8]
8005852: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8005856: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
800585a: d115 bne.n 8005888 <ADC_DMAConvCplt+0x62>
(hadc->Init.ContinuousConvMode == DISABLE) )
800585c: 68fb ldr r3, [r7, #12]
800585e: 7b1b ldrb r3, [r3, #12]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8005860: 2b00 cmp r3, #0
8005862: d111 bne.n 8005888 <ADC_DMAConvCplt+0x62>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
8005864: 68fb ldr r3, [r7, #12]
8005866: 6a9b ldr r3, [r3, #40] @ 0x28
8005868: f423 7280 bic.w r2, r3, #256 @ 0x100
800586c: 68fb ldr r3, [r7, #12]
800586e: 629a str r2, [r3, #40] @ 0x28
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8005870: 68fb ldr r3, [r7, #12]
8005872: 6a9b ldr r3, [r3, #40] @ 0x28
8005874: f403 5380 and.w r3, r3, #4096 @ 0x1000
8005878: 2b00 cmp r3, #0
800587a: d105 bne.n 8005888 <ADC_DMAConvCplt+0x62>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
800587c: 68fb ldr r3, [r7, #12]
800587e: 6a9b ldr r3, [r3, #40] @ 0x28
8005880: f043 0201 orr.w r2, r3, #1
8005884: 68fb ldr r3, [r7, #12]
8005886: 629a str r2, [r3, #40] @ 0x28
/* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvCpltCallback(hadc);
#else
HAL_ADC_ConvCpltCallback(hadc);
8005888: 68f8 ldr r0, [r7, #12]
800588a: f7ff fe1d bl 80054c8 <HAL_ADC_ConvCpltCallback>
else
{
/* Call DMA error callback */
hadc->DMA_Handle->XferErrorCallback(hdma);
}
}
800588e: e004 b.n 800589a <ADC_DMAConvCplt+0x74>
hadc->DMA_Handle->XferErrorCallback(hdma);
8005890: 68fb ldr r3, [r7, #12]
8005892: 6a1b ldr r3, [r3, #32]
8005894: 6b1b ldr r3, [r3, #48] @ 0x30
8005896: 6878 ldr r0, [r7, #4]
8005898: 4798 blx r3
}
800589a: bf00 nop
800589c: 3710 adds r7, #16
800589e: 46bd mov sp, r7
80058a0: bd80 pop {r7, pc}
080058a2 <ADC_DMAHalfConvCplt>:
* @brief DMA half transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
{
80058a2: b580 push {r7, lr}
80058a4: b084 sub sp, #16
80058a6: af00 add r7, sp, #0
80058a8: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80058aa: 687b ldr r3, [r7, #4]
80058ac: 6a5b ldr r3, [r3, #36] @ 0x24
80058ae: 60fb str r3, [r7, #12]
/* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvHalfCpltCallback(hadc);
#else
HAL_ADC_ConvHalfCpltCallback(hadc);
80058b0: 68f8 ldr r0, [r7, #12]
80058b2: f7ff fe12 bl 80054da <HAL_ADC_ConvHalfCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
80058b6: bf00 nop
80058b8: 3710 adds r7, #16
80058ba: 46bd mov sp, r7
80058bc: bd80 pop {r7, pc}
080058be <ADC_DMAError>:
* @brief DMA error callback
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAError(DMA_HandleTypeDef *hdma)
{
80058be: b580 push {r7, lr}
80058c0: b084 sub sp, #16
80058c2: af00 add r7, sp, #0
80058c4: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80058c6: 687b ldr r3, [r7, #4]
80058c8: 6a5b ldr r3, [r3, #36] @ 0x24
80058ca: 60fb str r3, [r7, #12]
/* Set ADC state */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
80058cc: 68fb ldr r3, [r7, #12]
80058ce: 6a9b ldr r3, [r3, #40] @ 0x28
80058d0: f043 0240 orr.w r2, r3, #64 @ 0x40
80058d4: 68fb ldr r3, [r7, #12]
80058d6: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to DMA error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
80058d8: 68fb ldr r3, [r7, #12]
80058da: 6adb ldr r3, [r3, #44] @ 0x2c
80058dc: f043 0204 orr.w r2, r3, #4
80058e0: 68fb ldr r3, [r7, #12]
80058e2: 62da str r2, [r3, #44] @ 0x2c
/* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ErrorCallback(hadc);
#else
HAL_ADC_ErrorCallback(hadc);
80058e4: 68f8 ldr r0, [r7, #12]
80058e6: f7ff fe01 bl 80054ec <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
80058ea: bf00 nop
80058ec: 3710 adds r7, #16
80058ee: 46bd mov sp, r7
80058f0: bd80 pop {r7, pc}
...
080058f4 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80058f4: b480 push {r7}
80058f6: b085 sub sp, #20
80058f8: af00 add r7, sp, #0
80058fa: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80058fc: 687b ldr r3, [r7, #4]
80058fe: f003 0307 and.w r3, r3, #7
8005902: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8005904: 4b0c ldr r3, [pc, #48] @ (8005938 <__NVIC_SetPriorityGrouping+0x44>)
8005906: 68db ldr r3, [r3, #12]
8005908: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
800590a: 68ba ldr r2, [r7, #8]
800590c: f64f 03ff movw r3, #63743 @ 0xf8ff
8005910: 4013 ands r3, r2
8005912: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8005914: 68fb ldr r3, [r7, #12]
8005916: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8005918: 68bb ldr r3, [r7, #8]
800591a: 4313 orrs r3, r2
reg_value = (reg_value |
800591c: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8005920: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8005924: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8005926: 4a04 ldr r2, [pc, #16] @ (8005938 <__NVIC_SetPriorityGrouping+0x44>)
8005928: 68bb ldr r3, [r7, #8]
800592a: 60d3 str r3, [r2, #12]
}
800592c: bf00 nop
800592e: 3714 adds r7, #20
8005930: 46bd mov sp, r7
8005932: bc80 pop {r7}
8005934: 4770 bx lr
8005936: bf00 nop
8005938: e000ed00 .word 0xe000ed00
0800593c <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
800593c: b480 push {r7}
800593e: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8005940: 4b04 ldr r3, [pc, #16] @ (8005954 <__NVIC_GetPriorityGrouping+0x18>)
8005942: 68db ldr r3, [r3, #12]
8005944: 0a1b lsrs r3, r3, #8
8005946: f003 0307 and.w r3, r3, #7
}
800594a: 4618 mov r0, r3
800594c: 46bd mov sp, r7
800594e: bc80 pop {r7}
8005950: 4770 bx lr
8005952: bf00 nop
8005954: e000ed00 .word 0xe000ed00
08005958 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8005958: b480 push {r7}
800595a: b083 sub sp, #12
800595c: af00 add r7, sp, #0
800595e: 4603 mov r3, r0
8005960: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8005962: f997 3007 ldrsb.w r3, [r7, #7]
8005966: 2b00 cmp r3, #0
8005968: db0b blt.n 8005982 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
800596a: 79fb ldrb r3, [r7, #7]
800596c: f003 021f and.w r2, r3, #31
8005970: 4906 ldr r1, [pc, #24] @ (800598c <__NVIC_EnableIRQ+0x34>)
8005972: f997 3007 ldrsb.w r3, [r7, #7]
8005976: 095b lsrs r3, r3, #5
8005978: 2001 movs r0, #1
800597a: fa00 f202 lsl.w r2, r0, r2
800597e: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8005982: bf00 nop
8005984: 370c adds r7, #12
8005986: 46bd mov sp, r7
8005988: bc80 pop {r7}
800598a: 4770 bx lr
800598c: e000e100 .word 0xe000e100
08005990 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8005990: b480 push {r7}
8005992: b083 sub sp, #12
8005994: af00 add r7, sp, #0
8005996: 4603 mov r3, r0
8005998: 6039 str r1, [r7, #0]
800599a: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
800599c: f997 3007 ldrsb.w r3, [r7, #7]
80059a0: 2b00 cmp r3, #0
80059a2: db0a blt.n 80059ba <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80059a4: 683b ldr r3, [r7, #0]
80059a6: b2da uxtb r2, r3
80059a8: 490c ldr r1, [pc, #48] @ (80059dc <__NVIC_SetPriority+0x4c>)
80059aa: f997 3007 ldrsb.w r3, [r7, #7]
80059ae: 0112 lsls r2, r2, #4
80059b0: b2d2 uxtb r2, r2
80059b2: 440b add r3, r1
80059b4: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
80059b8: e00a b.n 80059d0 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80059ba: 683b ldr r3, [r7, #0]
80059bc: b2da uxtb r2, r3
80059be: 4908 ldr r1, [pc, #32] @ (80059e0 <__NVIC_SetPriority+0x50>)
80059c0: 79fb ldrb r3, [r7, #7]
80059c2: f003 030f and.w r3, r3, #15
80059c6: 3b04 subs r3, #4
80059c8: 0112 lsls r2, r2, #4
80059ca: b2d2 uxtb r2, r2
80059cc: 440b add r3, r1
80059ce: 761a strb r2, [r3, #24]
}
80059d0: bf00 nop
80059d2: 370c adds r7, #12
80059d4: 46bd mov sp, r7
80059d6: bc80 pop {r7}
80059d8: 4770 bx lr
80059da: bf00 nop
80059dc: e000e100 .word 0xe000e100
80059e0: e000ed00 .word 0xe000ed00
080059e4 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
80059e4: b480 push {r7}
80059e6: b089 sub sp, #36 @ 0x24
80059e8: af00 add r7, sp, #0
80059ea: 60f8 str r0, [r7, #12]
80059ec: 60b9 str r1, [r7, #8]
80059ee: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80059f0: 68fb ldr r3, [r7, #12]
80059f2: f003 0307 and.w r3, r3, #7
80059f6: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
80059f8: 69fb ldr r3, [r7, #28]
80059fa: f1c3 0307 rsb r3, r3, #7
80059fe: 2b04 cmp r3, #4
8005a00: bf28 it cs
8005a02: 2304 movcs r3, #4
8005a04: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8005a06: 69fb ldr r3, [r7, #28]
8005a08: 3304 adds r3, #4
8005a0a: 2b06 cmp r3, #6
8005a0c: d902 bls.n 8005a14 <NVIC_EncodePriority+0x30>
8005a0e: 69fb ldr r3, [r7, #28]
8005a10: 3b03 subs r3, #3
8005a12: e000 b.n 8005a16 <NVIC_EncodePriority+0x32>
8005a14: 2300 movs r3, #0
8005a16: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005a18: f04f 32ff mov.w r2, #4294967295
8005a1c: 69bb ldr r3, [r7, #24]
8005a1e: fa02 f303 lsl.w r3, r2, r3
8005a22: 43da mvns r2, r3
8005a24: 68bb ldr r3, [r7, #8]
8005a26: 401a ands r2, r3
8005a28: 697b ldr r3, [r7, #20]
8005a2a: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8005a2c: f04f 31ff mov.w r1, #4294967295
8005a30: 697b ldr r3, [r7, #20]
8005a32: fa01 f303 lsl.w r3, r1, r3
8005a36: 43d9 mvns r1, r3
8005a38: 687b ldr r3, [r7, #4]
8005a3a: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005a3c: 4313 orrs r3, r2
);
}
8005a3e: 4618 mov r0, r3
8005a40: 3724 adds r7, #36 @ 0x24
8005a42: 46bd mov sp, r7
8005a44: bc80 pop {r7}
8005a46: 4770 bx lr
08005a48 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8005a48: b580 push {r7, lr}
8005a4a: b082 sub sp, #8
8005a4c: af00 add r7, sp, #0
8005a4e: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8005a50: 687b ldr r3, [r7, #4]
8005a52: 3b01 subs r3, #1
8005a54: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
8005a58: d301 bcc.n 8005a5e <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8005a5a: 2301 movs r3, #1
8005a5c: e00f b.n 8005a7e <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8005a5e: 4a0a ldr r2, [pc, #40] @ (8005a88 <SysTick_Config+0x40>)
8005a60: 687b ldr r3, [r7, #4]
8005a62: 3b01 subs r3, #1
8005a64: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8005a66: 210f movs r1, #15
8005a68: f04f 30ff mov.w r0, #4294967295
8005a6c: f7ff ff90 bl 8005990 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8005a70: 4b05 ldr r3, [pc, #20] @ (8005a88 <SysTick_Config+0x40>)
8005a72: 2200 movs r2, #0
8005a74: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8005a76: 4b04 ldr r3, [pc, #16] @ (8005a88 <SysTick_Config+0x40>)
8005a78: 2207 movs r2, #7
8005a7a: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8005a7c: 2300 movs r3, #0
}
8005a7e: 4618 mov r0, r3
8005a80: 3708 adds r7, #8
8005a82: 46bd mov sp, r7
8005a84: bd80 pop {r7, pc}
8005a86: bf00 nop
8005a88: e000e010 .word 0xe000e010
08005a8c <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8005a8c: b580 push {r7, lr}
8005a8e: b082 sub sp, #8
8005a90: af00 add r7, sp, #0
8005a92: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8005a94: 6878 ldr r0, [r7, #4]
8005a96: f7ff ff2d bl 80058f4 <__NVIC_SetPriorityGrouping>
}
8005a9a: bf00 nop
8005a9c: 3708 adds r7, #8
8005a9e: 46bd mov sp, r7
8005aa0: bd80 pop {r7, pc}
08005aa2 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8005aa2: b580 push {r7, lr}
8005aa4: b086 sub sp, #24
8005aa6: af00 add r7, sp, #0
8005aa8: 4603 mov r3, r0
8005aaa: 60b9 str r1, [r7, #8]
8005aac: 607a str r2, [r7, #4]
8005aae: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8005ab0: 2300 movs r3, #0
8005ab2: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8005ab4: f7ff ff42 bl 800593c <__NVIC_GetPriorityGrouping>
8005ab8: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8005aba: 687a ldr r2, [r7, #4]
8005abc: 68b9 ldr r1, [r7, #8]
8005abe: 6978 ldr r0, [r7, #20]
8005ac0: f7ff ff90 bl 80059e4 <NVIC_EncodePriority>
8005ac4: 4602 mov r2, r0
8005ac6: f997 300f ldrsb.w r3, [r7, #15]
8005aca: 4611 mov r1, r2
8005acc: 4618 mov r0, r3
8005ace: f7ff ff5f bl 8005990 <__NVIC_SetPriority>
}
8005ad2: bf00 nop
8005ad4: 3718 adds r7, #24
8005ad6: 46bd mov sp, r7
8005ad8: bd80 pop {r7, pc}
08005ada <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8005ada: b580 push {r7, lr}
8005adc: b082 sub sp, #8
8005ade: af00 add r7, sp, #0
8005ae0: 4603 mov r3, r0
8005ae2: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8005ae4: f997 3007 ldrsb.w r3, [r7, #7]
8005ae8: 4618 mov r0, r3
8005aea: f7ff ff35 bl 8005958 <__NVIC_EnableIRQ>
}
8005aee: bf00 nop
8005af0: 3708 adds r7, #8
8005af2: 46bd mov sp, r7
8005af4: bd80 pop {r7, pc}
08005af6 <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8005af6: b580 push {r7, lr}
8005af8: b082 sub sp, #8
8005afa: af00 add r7, sp, #0
8005afc: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8005afe: 6878 ldr r0, [r7, #4]
8005b00: f7ff ffa2 bl 8005a48 <SysTick_Config>
8005b04: 4603 mov r3, r0
}
8005b06: 4618 mov r0, r3
8005b08: 3708 adds r7, #8
8005b0a: 46bd mov sp, r7
8005b0c: bd80 pop {r7, pc}
08005b0e <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8005b0e: b580 push {r7, lr}
8005b10: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
8005b12: f7fc f843 bl 8001b9c <HAL_SYSTICK_Callback>
}
8005b16: bf00 nop
8005b18: bd80 pop {r7, pc}
...
08005b1c <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8005b1c: b480 push {r7}
8005b1e: b085 sub sp, #20
8005b20: af00 add r7, sp, #0
8005b22: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
8005b24: 2300 movs r3, #0
8005b26: 60fb str r3, [r7, #12]
/* Check the DMA handle allocation */
if(hdma == NULL)
8005b28: 687b ldr r3, [r7, #4]
8005b2a: 2b00 cmp r3, #0
8005b2c: d101 bne.n 8005b32 <HAL_DMA_Init+0x16>
{
return HAL_ERROR;
8005b2e: 2301 movs r3, #1
8005b30: e043 b.n 8005bba <HAL_DMA_Init+0x9e>
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
hdma->DmaBaseAddress = DMA2;
}
#else
/* DMA1 */
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
8005b32: 687b ldr r3, [r7, #4]
8005b34: 681b ldr r3, [r3, #0]
8005b36: 461a mov r2, r3
8005b38: 4b22 ldr r3, [pc, #136] @ (8005bc4 <HAL_DMA_Init+0xa8>)
8005b3a: 4413 add r3, r2
8005b3c: 4a22 ldr r2, [pc, #136] @ (8005bc8 <HAL_DMA_Init+0xac>)
8005b3e: fba2 2303 umull r2, r3, r2, r3
8005b42: 091b lsrs r3, r3, #4
8005b44: 009a lsls r2, r3, #2
8005b46: 687b ldr r3, [r7, #4]
8005b48: 641a str r2, [r3, #64] @ 0x40
hdma->DmaBaseAddress = DMA1;
8005b4a: 687b ldr r3, [r7, #4]
8005b4c: 4a1f ldr r2, [pc, #124] @ (8005bcc <HAL_DMA_Init+0xb0>)
8005b4e: 63da str r2, [r3, #60] @ 0x3c
#endif /* DMA2 */
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005b50: 687b ldr r3, [r7, #4]
8005b52: 2202 movs r2, #2
8005b54: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Get the CR register value */
tmp = hdma->Instance->CCR;
8005b58: 687b ldr r3, [r7, #4]
8005b5a: 681b ldr r3, [r3, #0]
8005b5c: 681b ldr r3, [r3, #0]
8005b5e: 60fb str r3, [r7, #12]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
8005b60: 68fb ldr r3, [r7, #12]
8005b62: f423 537f bic.w r3, r3, #16320 @ 0x3fc0
8005b66: f023 0330 bic.w r3, r3, #48 @ 0x30
8005b6a: 60fb str r3, [r7, #12]
DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
DMA_CCR_DIR));
/* Prepare the DMA Channel configuration */
tmp |= hdma->Init.Direction |
8005b6c: 687b ldr r3, [r7, #4]
8005b6e: 685a ldr r2, [r3, #4]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005b70: 687b ldr r3, [r7, #4]
8005b72: 689b ldr r3, [r3, #8]
tmp |= hdma->Init.Direction |
8005b74: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005b76: 687b ldr r3, [r7, #4]
8005b78: 68db ldr r3, [r3, #12]
8005b7a: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005b7c: 687b ldr r3, [r7, #4]
8005b7e: 691b ldr r3, [r3, #16]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005b80: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005b82: 687b ldr r3, [r7, #4]
8005b84: 695b ldr r3, [r3, #20]
8005b86: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8005b88: 687b ldr r3, [r7, #4]
8005b8a: 699b ldr r3, [r3, #24]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005b8c: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8005b8e: 687b ldr r3, [r7, #4]
8005b90: 69db ldr r3, [r3, #28]
8005b92: 4313 orrs r3, r2
tmp |= hdma->Init.Direction |
8005b94: 68fa ldr r2, [r7, #12]
8005b96: 4313 orrs r3, r2
8005b98: 60fb str r3, [r7, #12]
/* Write to DMA Channel CR register */
hdma->Instance->CCR = tmp;
8005b9a: 687b ldr r3, [r7, #4]
8005b9c: 681b ldr r3, [r3, #0]
8005b9e: 68fa ldr r2, [r7, #12]
8005ba0: 601a str r2, [r3, #0]
/* Initialise the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005ba2: 687b ldr r3, [r7, #4]
8005ba4: 2200 movs r2, #0
8005ba6: 639a str r2, [r3, #56] @ 0x38
/* Initialize the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
8005ba8: 687b ldr r3, [r7, #4]
8005baa: 2201 movs r2, #1
8005bac: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Allocate lock resource and initialize it */
hdma->Lock = HAL_UNLOCKED;
8005bb0: 687b ldr r3, [r7, #4]
8005bb2: 2200 movs r2, #0
8005bb4: f883 2020 strb.w r2, [r3, #32]
return HAL_OK;
8005bb8: 2300 movs r3, #0
}
8005bba: 4618 mov r0, r3
8005bbc: 3714 adds r7, #20
8005bbe: 46bd mov sp, r7
8005bc0: bc80 pop {r7}
8005bc2: 4770 bx lr
8005bc4: bffdfff8 .word 0xbffdfff8
8005bc8: cccccccd .word 0xcccccccd
8005bcc: 40020000 .word 0x40020000
08005bd0 <HAL_DMA_Start_IT>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005bd0: b580 push {r7, lr}
8005bd2: b086 sub sp, #24
8005bd4: af00 add r7, sp, #0
8005bd6: 60f8 str r0, [r7, #12]
8005bd8: 60b9 str r1, [r7, #8]
8005bda: 607a str r2, [r7, #4]
8005bdc: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8005bde: 2300 movs r3, #0
8005be0: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
8005be2: 68fb ldr r3, [r7, #12]
8005be4: f893 3020 ldrb.w r3, [r3, #32]
8005be8: 2b01 cmp r3, #1
8005bea: d101 bne.n 8005bf0 <HAL_DMA_Start_IT+0x20>
8005bec: 2302 movs r3, #2
8005bee: e04b b.n 8005c88 <HAL_DMA_Start_IT+0xb8>
8005bf0: 68fb ldr r3, [r7, #12]
8005bf2: 2201 movs r2, #1
8005bf4: f883 2020 strb.w r2, [r3, #32]
if(HAL_DMA_STATE_READY == hdma->State)
8005bf8: 68fb ldr r3, [r7, #12]
8005bfa: f893 3021 ldrb.w r3, [r3, #33] @ 0x21
8005bfe: b2db uxtb r3, r3
8005c00: 2b01 cmp r3, #1
8005c02: d13a bne.n 8005c7a <HAL_DMA_Start_IT+0xaa>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005c04: 68fb ldr r3, [r7, #12]
8005c06: 2202 movs r2, #2
8005c08: f883 2021 strb.w r2, [r3, #33] @ 0x21
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005c0c: 68fb ldr r3, [r7, #12]
8005c0e: 2200 movs r2, #0
8005c10: 639a str r2, [r3, #56] @ 0x38
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
8005c12: 68fb ldr r3, [r7, #12]
8005c14: 681b ldr r3, [r3, #0]
8005c16: 681a ldr r2, [r3, #0]
8005c18: 68fb ldr r3, [r7, #12]
8005c1a: 681b ldr r3, [r3, #0]
8005c1c: f022 0201 bic.w r2, r2, #1
8005c20: 601a str r2, [r3, #0]
/* Configure the source, destination address and the data length & clear flags*/
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
8005c22: 683b ldr r3, [r7, #0]
8005c24: 687a ldr r2, [r7, #4]
8005c26: 68b9 ldr r1, [r7, #8]
8005c28: 68f8 ldr r0, [r7, #12]
8005c2a: f000 f937 bl 8005e9c <DMA_SetConfig>
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback)
8005c2e: 68fb ldr r3, [r7, #12]
8005c30: 6adb ldr r3, [r3, #44] @ 0x2c
8005c32: 2b00 cmp r3, #0
8005c34: d008 beq.n 8005c48 <HAL_DMA_Start_IT+0x78>
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005c36: 68fb ldr r3, [r7, #12]
8005c38: 681b ldr r3, [r3, #0]
8005c3a: 681a ldr r2, [r3, #0]
8005c3c: 68fb ldr r3, [r7, #12]
8005c3e: 681b ldr r3, [r3, #0]
8005c40: f042 020e orr.w r2, r2, #14
8005c44: 601a str r2, [r3, #0]
8005c46: e00f b.n 8005c68 <HAL_DMA_Start_IT+0x98>
}
else
{
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005c48: 68fb ldr r3, [r7, #12]
8005c4a: 681b ldr r3, [r3, #0]
8005c4c: 681a ldr r2, [r3, #0]
8005c4e: 68fb ldr r3, [r7, #12]
8005c50: 681b ldr r3, [r3, #0]
8005c52: f022 0204 bic.w r2, r2, #4
8005c56: 601a str r2, [r3, #0]
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
8005c58: 68fb ldr r3, [r7, #12]
8005c5a: 681b ldr r3, [r3, #0]
8005c5c: 681a ldr r2, [r3, #0]
8005c5e: 68fb ldr r3, [r7, #12]
8005c60: 681b ldr r3, [r3, #0]
8005c62: f042 020a orr.w r2, r2, #10
8005c66: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
8005c68: 68fb ldr r3, [r7, #12]
8005c6a: 681b ldr r3, [r3, #0]
8005c6c: 681a ldr r2, [r3, #0]
8005c6e: 68fb ldr r3, [r7, #12]
8005c70: 681b ldr r3, [r3, #0]
8005c72: f042 0201 orr.w r2, r2, #1
8005c76: 601a str r2, [r3, #0]
8005c78: e005 b.n 8005c86 <HAL_DMA_Start_IT+0xb6>
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005c7a: 68fb ldr r3, [r7, #12]
8005c7c: 2200 movs r2, #0
8005c7e: f883 2020 strb.w r2, [r3, #32]
/* Remain BUSY */
status = HAL_BUSY;
8005c82: 2302 movs r3, #2
8005c84: 75fb strb r3, [r7, #23]
}
return status;
8005c86: 7dfb ldrb r3, [r7, #23]
}
8005c88: 4618 mov r0, r3
8005c8a: 3718 adds r7, #24
8005c8c: 46bd mov sp, r7
8005c8e: bd80 pop {r7, pc}
08005c90 <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
8005c90: b580 push {r7, lr}
8005c92: b084 sub sp, #16
8005c94: af00 add r7, sp, #0
8005c96: 6078 str r0, [r7, #4]
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
8005c98: 687b ldr r3, [r7, #4]
8005c9a: 6bdb ldr r3, [r3, #60] @ 0x3c
8005c9c: 681b ldr r3, [r3, #0]
8005c9e: 60fb str r3, [r7, #12]
uint32_t source_it = hdma->Instance->CCR;
8005ca0: 687b ldr r3, [r7, #4]
8005ca2: 681b ldr r3, [r3, #0]
8005ca4: 681b ldr r3, [r3, #0]
8005ca6: 60bb str r3, [r7, #8]
/* Half Transfer Complete Interrupt management ******************************/
if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
8005ca8: 687b ldr r3, [r7, #4]
8005caa: 6c1b ldr r3, [r3, #64] @ 0x40
8005cac: 2204 movs r2, #4
8005cae: 409a lsls r2, r3
8005cb0: 68fb ldr r3, [r7, #12]
8005cb2: 4013 ands r3, r2
8005cb4: 2b00 cmp r3, #0
8005cb6: d04f beq.n 8005d58 <HAL_DMA_IRQHandler+0xc8>
8005cb8: 68bb ldr r3, [r7, #8]
8005cba: f003 0304 and.w r3, r3, #4
8005cbe: 2b00 cmp r3, #0
8005cc0: d04a beq.n 8005d58 <HAL_DMA_IRQHandler+0xc8>
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
8005cc2: 687b ldr r3, [r7, #4]
8005cc4: 681b ldr r3, [r3, #0]
8005cc6: 681b ldr r3, [r3, #0]
8005cc8: f003 0320 and.w r3, r3, #32
8005ccc: 2b00 cmp r3, #0
8005cce: d107 bne.n 8005ce0 <HAL_DMA_IRQHandler+0x50>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005cd0: 687b ldr r3, [r7, #4]
8005cd2: 681b ldr r3, [r3, #0]
8005cd4: 681a ldr r2, [r3, #0]
8005cd6: 687b ldr r3, [r7, #4]
8005cd8: 681b ldr r3, [r3, #0]
8005cda: f022 0204 bic.w r2, r2, #4
8005cde: 601a str r2, [r3, #0]
}
/* Clear the half transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
8005ce0: 687b ldr r3, [r7, #4]
8005ce2: 681b ldr r3, [r3, #0]
8005ce4: 4a66 ldr r2, [pc, #408] @ (8005e80 <HAL_DMA_IRQHandler+0x1f0>)
8005ce6: 4293 cmp r3, r2
8005ce8: d029 beq.n 8005d3e <HAL_DMA_IRQHandler+0xae>
8005cea: 687b ldr r3, [r7, #4]
8005cec: 681b ldr r3, [r3, #0]
8005cee: 4a65 ldr r2, [pc, #404] @ (8005e84 <HAL_DMA_IRQHandler+0x1f4>)
8005cf0: 4293 cmp r3, r2
8005cf2: d022 beq.n 8005d3a <HAL_DMA_IRQHandler+0xaa>
8005cf4: 687b ldr r3, [r7, #4]
8005cf6: 681b ldr r3, [r3, #0]
8005cf8: 4a63 ldr r2, [pc, #396] @ (8005e88 <HAL_DMA_IRQHandler+0x1f8>)
8005cfa: 4293 cmp r3, r2
8005cfc: d01a beq.n 8005d34 <HAL_DMA_IRQHandler+0xa4>
8005cfe: 687b ldr r3, [r7, #4]
8005d00: 681b ldr r3, [r3, #0]
8005d02: 4a62 ldr r2, [pc, #392] @ (8005e8c <HAL_DMA_IRQHandler+0x1fc>)
8005d04: 4293 cmp r3, r2
8005d06: d012 beq.n 8005d2e <HAL_DMA_IRQHandler+0x9e>
8005d08: 687b ldr r3, [r7, #4]
8005d0a: 681b ldr r3, [r3, #0]
8005d0c: 4a60 ldr r2, [pc, #384] @ (8005e90 <HAL_DMA_IRQHandler+0x200>)
8005d0e: 4293 cmp r3, r2
8005d10: d00a beq.n 8005d28 <HAL_DMA_IRQHandler+0x98>
8005d12: 687b ldr r3, [r7, #4]
8005d14: 681b ldr r3, [r3, #0]
8005d16: 4a5f ldr r2, [pc, #380] @ (8005e94 <HAL_DMA_IRQHandler+0x204>)
8005d18: 4293 cmp r3, r2
8005d1a: d102 bne.n 8005d22 <HAL_DMA_IRQHandler+0x92>
8005d1c: f44f 0380 mov.w r3, #4194304 @ 0x400000
8005d20: e00e b.n 8005d40 <HAL_DMA_IRQHandler+0xb0>
8005d22: f04f 6380 mov.w r3, #67108864 @ 0x4000000
8005d26: e00b b.n 8005d40 <HAL_DMA_IRQHandler+0xb0>
8005d28: f44f 2380 mov.w r3, #262144 @ 0x40000
8005d2c: e008 b.n 8005d40 <HAL_DMA_IRQHandler+0xb0>
8005d2e: f44f 4380 mov.w r3, #16384 @ 0x4000
8005d32: e005 b.n 8005d40 <HAL_DMA_IRQHandler+0xb0>
8005d34: f44f 6380 mov.w r3, #1024 @ 0x400
8005d38: e002 b.n 8005d40 <HAL_DMA_IRQHandler+0xb0>
8005d3a: 2340 movs r3, #64 @ 0x40
8005d3c: e000 b.n 8005d40 <HAL_DMA_IRQHandler+0xb0>
8005d3e: 2304 movs r3, #4
8005d40: 4a55 ldr r2, [pc, #340] @ (8005e98 <HAL_DMA_IRQHandler+0x208>)
8005d42: 6053 str r3, [r2, #4]
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
8005d44: 687b ldr r3, [r7, #4]
8005d46: 6adb ldr r3, [r3, #44] @ 0x2c
8005d48: 2b00 cmp r3, #0
8005d4a: f000 8094 beq.w 8005e76 <HAL_DMA_IRQHandler+0x1e6>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8005d4e: 687b ldr r3, [r7, #4]
8005d50: 6adb ldr r3, [r3, #44] @ 0x2c
8005d52: 6878 ldr r0, [r7, #4]
8005d54: 4798 blx r3
if(hdma->XferHalfCpltCallback != NULL)
8005d56: e08e b.n 8005e76 <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
8005d58: 687b ldr r3, [r7, #4]
8005d5a: 6c1b ldr r3, [r3, #64] @ 0x40
8005d5c: 2202 movs r2, #2
8005d5e: 409a lsls r2, r3
8005d60: 68fb ldr r3, [r7, #12]
8005d62: 4013 ands r3, r2
8005d64: 2b00 cmp r3, #0
8005d66: d056 beq.n 8005e16 <HAL_DMA_IRQHandler+0x186>
8005d68: 68bb ldr r3, [r7, #8]
8005d6a: f003 0302 and.w r3, r3, #2
8005d6e: 2b00 cmp r3, #0
8005d70: d051 beq.n 8005e16 <HAL_DMA_IRQHandler+0x186>
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
8005d72: 687b ldr r3, [r7, #4]
8005d74: 681b ldr r3, [r3, #0]
8005d76: 681b ldr r3, [r3, #0]
8005d78: f003 0320 and.w r3, r3, #32
8005d7c: 2b00 cmp r3, #0
8005d7e: d10b bne.n 8005d98 <HAL_DMA_IRQHandler+0x108>
{
/* Disable the transfer complete and error interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
8005d80: 687b ldr r3, [r7, #4]
8005d82: 681b ldr r3, [r3, #0]
8005d84: 681a ldr r2, [r3, #0]
8005d86: 687b ldr r3, [r7, #4]
8005d88: 681b ldr r3, [r3, #0]
8005d8a: f022 020a bic.w r2, r2, #10
8005d8e: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005d90: 687b ldr r3, [r7, #4]
8005d92: 2201 movs r2, #1
8005d94: f883 2021 strb.w r2, [r3, #33] @ 0x21
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
8005d98: 687b ldr r3, [r7, #4]
8005d9a: 681b ldr r3, [r3, #0]
8005d9c: 4a38 ldr r2, [pc, #224] @ (8005e80 <HAL_DMA_IRQHandler+0x1f0>)
8005d9e: 4293 cmp r3, r2
8005da0: d029 beq.n 8005df6 <HAL_DMA_IRQHandler+0x166>
8005da2: 687b ldr r3, [r7, #4]
8005da4: 681b ldr r3, [r3, #0]
8005da6: 4a37 ldr r2, [pc, #220] @ (8005e84 <HAL_DMA_IRQHandler+0x1f4>)
8005da8: 4293 cmp r3, r2
8005daa: d022 beq.n 8005df2 <HAL_DMA_IRQHandler+0x162>
8005dac: 687b ldr r3, [r7, #4]
8005dae: 681b ldr r3, [r3, #0]
8005db0: 4a35 ldr r2, [pc, #212] @ (8005e88 <HAL_DMA_IRQHandler+0x1f8>)
8005db2: 4293 cmp r3, r2
8005db4: d01a beq.n 8005dec <HAL_DMA_IRQHandler+0x15c>
8005db6: 687b ldr r3, [r7, #4]
8005db8: 681b ldr r3, [r3, #0]
8005dba: 4a34 ldr r2, [pc, #208] @ (8005e8c <HAL_DMA_IRQHandler+0x1fc>)
8005dbc: 4293 cmp r3, r2
8005dbe: d012 beq.n 8005de6 <HAL_DMA_IRQHandler+0x156>
8005dc0: 687b ldr r3, [r7, #4]
8005dc2: 681b ldr r3, [r3, #0]
8005dc4: 4a32 ldr r2, [pc, #200] @ (8005e90 <HAL_DMA_IRQHandler+0x200>)
8005dc6: 4293 cmp r3, r2
8005dc8: d00a beq.n 8005de0 <HAL_DMA_IRQHandler+0x150>
8005dca: 687b ldr r3, [r7, #4]
8005dcc: 681b ldr r3, [r3, #0]
8005dce: 4a31 ldr r2, [pc, #196] @ (8005e94 <HAL_DMA_IRQHandler+0x204>)
8005dd0: 4293 cmp r3, r2
8005dd2: d102 bne.n 8005dda <HAL_DMA_IRQHandler+0x14a>
8005dd4: f44f 1300 mov.w r3, #2097152 @ 0x200000
8005dd8: e00e b.n 8005df8 <HAL_DMA_IRQHandler+0x168>
8005dda: f04f 7300 mov.w r3, #33554432 @ 0x2000000
8005dde: e00b b.n 8005df8 <HAL_DMA_IRQHandler+0x168>
8005de0: f44f 3300 mov.w r3, #131072 @ 0x20000
8005de4: e008 b.n 8005df8 <HAL_DMA_IRQHandler+0x168>
8005de6: f44f 5300 mov.w r3, #8192 @ 0x2000
8005dea: e005 b.n 8005df8 <HAL_DMA_IRQHandler+0x168>
8005dec: f44f 7300 mov.w r3, #512 @ 0x200
8005df0: e002 b.n 8005df8 <HAL_DMA_IRQHandler+0x168>
8005df2: 2320 movs r3, #32
8005df4: e000 b.n 8005df8 <HAL_DMA_IRQHandler+0x168>
8005df6: 2302 movs r3, #2
8005df8: 4a27 ldr r2, [pc, #156] @ (8005e98 <HAL_DMA_IRQHandler+0x208>)
8005dfa: 6053 str r3, [r2, #4]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005dfc: 687b ldr r3, [r7, #4]
8005dfe: 2200 movs r2, #0
8005e00: f883 2020 strb.w r2, [r3, #32]
if(hdma->XferCpltCallback != NULL)
8005e04: 687b ldr r3, [r7, #4]
8005e06: 6a9b ldr r3, [r3, #40] @ 0x28
8005e08: 2b00 cmp r3, #0
8005e0a: d034 beq.n 8005e76 <HAL_DMA_IRQHandler+0x1e6>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8005e0c: 687b ldr r3, [r7, #4]
8005e0e: 6a9b ldr r3, [r3, #40] @ 0x28
8005e10: 6878 ldr r0, [r7, #4]
8005e12: 4798 blx r3
if(hdma->XferCpltCallback != NULL)
8005e14: e02f b.n 8005e76 <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Error Interrupt management **************************************/
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
8005e16: 687b ldr r3, [r7, #4]
8005e18: 6c1b ldr r3, [r3, #64] @ 0x40
8005e1a: 2208 movs r2, #8
8005e1c: 409a lsls r2, r3
8005e1e: 68fb ldr r3, [r7, #12]
8005e20: 4013 ands r3, r2
8005e22: 2b00 cmp r3, #0
8005e24: d028 beq.n 8005e78 <HAL_DMA_IRQHandler+0x1e8>
8005e26: 68bb ldr r3, [r7, #8]
8005e28: f003 0308 and.w r3, r3, #8
8005e2c: 2b00 cmp r3, #0
8005e2e: d023 beq.n 8005e78 <HAL_DMA_IRQHandler+0x1e8>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005e30: 687b ldr r3, [r7, #4]
8005e32: 681b ldr r3, [r3, #0]
8005e34: 681a ldr r2, [r3, #0]
8005e36: 687b ldr r3, [r7, #4]
8005e38: 681b ldr r3, [r3, #0]
8005e3a: f022 020e bic.w r2, r2, #14
8005e3e: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005e40: 687b ldr r3, [r7, #4]
8005e42: 6c1a ldr r2, [r3, #64] @ 0x40
8005e44: 687b ldr r3, [r7, #4]
8005e46: 6bdb ldr r3, [r3, #60] @ 0x3c
8005e48: 2101 movs r1, #1
8005e4a: fa01 f202 lsl.w r2, r1, r2
8005e4e: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
8005e50: 687b ldr r3, [r7, #4]
8005e52: 2201 movs r2, #1
8005e54: 639a str r2, [r3, #56] @ 0x38
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005e56: 687b ldr r3, [r7, #4]
8005e58: 2201 movs r2, #1
8005e5a: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005e5e: 687b ldr r3, [r7, #4]
8005e60: 2200 movs r2, #0
8005e62: f883 2020 strb.w r2, [r3, #32]
if (hdma->XferErrorCallback != NULL)
8005e66: 687b ldr r3, [r7, #4]
8005e68: 6b1b ldr r3, [r3, #48] @ 0x30
8005e6a: 2b00 cmp r3, #0
8005e6c: d004 beq.n 8005e78 <HAL_DMA_IRQHandler+0x1e8>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
8005e6e: 687b ldr r3, [r7, #4]
8005e70: 6b1b ldr r3, [r3, #48] @ 0x30
8005e72: 6878 ldr r0, [r7, #4]
8005e74: 4798 blx r3
}
}
return;
8005e76: bf00 nop
8005e78: bf00 nop
}
8005e7a: 3710 adds r7, #16
8005e7c: 46bd mov sp, r7
8005e7e: bd80 pop {r7, pc}
8005e80: 40020008 .word 0x40020008
8005e84: 4002001c .word 0x4002001c
8005e88: 40020030 .word 0x40020030
8005e8c: 40020044 .word 0x40020044
8005e90: 40020058 .word 0x40020058
8005e94: 4002006c .word 0x4002006c
8005e98: 40020000 .word 0x40020000
08005e9c <DMA_SetConfig>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005e9c: b480 push {r7}
8005e9e: b085 sub sp, #20
8005ea0: af00 add r7, sp, #0
8005ea2: 60f8 str r0, [r7, #12]
8005ea4: 60b9 str r1, [r7, #8]
8005ea6: 607a str r2, [r7, #4]
8005ea8: 603b str r3, [r7, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005eaa: 68fb ldr r3, [r7, #12]
8005eac: 6c1a ldr r2, [r3, #64] @ 0x40
8005eae: 68fb ldr r3, [r7, #12]
8005eb0: 6bdb ldr r3, [r3, #60] @ 0x3c
8005eb2: 2101 movs r1, #1
8005eb4: fa01 f202 lsl.w r2, r1, r2
8005eb8: 605a str r2, [r3, #4]
/* Configure DMA Channel data length */
hdma->Instance->CNDTR = DataLength;
8005eba: 68fb ldr r3, [r7, #12]
8005ebc: 681b ldr r3, [r3, #0]
8005ebe: 683a ldr r2, [r7, #0]
8005ec0: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
8005ec2: 68fb ldr r3, [r7, #12]
8005ec4: 685b ldr r3, [r3, #4]
8005ec6: 2b10 cmp r3, #16
8005ec8: d108 bne.n 8005edc <DMA_SetConfig+0x40>
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;
8005eca: 68fb ldr r3, [r7, #12]
8005ecc: 681b ldr r3, [r3, #0]
8005ece: 687a ldr r2, [r7, #4]
8005ed0: 609a str r2, [r3, #8]
/* Configure DMA Channel source address */
hdma->Instance->CMAR = SrcAddress;
8005ed2: 68fb ldr r3, [r7, #12]
8005ed4: 681b ldr r3, [r3, #0]
8005ed6: 68ba ldr r2, [r7, #8]
8005ed8: 60da str r2, [r3, #12]
hdma->Instance->CPAR = SrcAddress;
/* Configure DMA Channel destination address */
hdma->Instance->CMAR = DstAddress;
}
}
8005eda: e007 b.n 8005eec <DMA_SetConfig+0x50>
hdma->Instance->CPAR = SrcAddress;
8005edc: 68fb ldr r3, [r7, #12]
8005ede: 681b ldr r3, [r3, #0]
8005ee0: 68ba ldr r2, [r7, #8]
8005ee2: 609a str r2, [r3, #8]
hdma->Instance->CMAR = DstAddress;
8005ee4: 68fb ldr r3, [r7, #12]
8005ee6: 681b ldr r3, [r3, #0]
8005ee8: 687a ldr r2, [r7, #4]
8005eea: 60da str r2, [r3, #12]
}
8005eec: bf00 nop
8005eee: 3714 adds r7, #20
8005ef0: 46bd mov sp, r7
8005ef2: bc80 pop {r7}
8005ef4: 4770 bx lr
...
08005ef8 <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8005ef8: b5f0 push {r4, r5, r6, r7, lr}
8005efa: b087 sub sp, #28
8005efc: af00 add r7, sp, #0
8005efe: 60f8 str r0, [r7, #12]
8005f00: 60b9 str r1, [r7, #8]
8005f02: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
8005f06: 2301 movs r3, #1
8005f08: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8005f0a: 2300 movs r3, #0
8005f0c: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
8005f0e: 2300 movs r3, #0
8005f10: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
8005f12: 4b2f ldr r3, [pc, #188] @ (8005fd0 <HAL_FLASH_Program+0xd8>)
8005f14: 7e1b ldrb r3, [r3, #24]
8005f16: 2b01 cmp r3, #1
8005f18: d101 bne.n 8005f1e <HAL_FLASH_Program+0x26>
8005f1a: 2302 movs r3, #2
8005f1c: e054 b.n 8005fc8 <HAL_FLASH_Program+0xd0>
8005f1e: 4b2c ldr r3, [pc, #176] @ (8005fd0 <HAL_FLASH_Program+0xd8>)
8005f20: 2201 movs r2, #1
8005f22: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005f24: f24c 3050 movw r0, #50000 @ 0xc350
8005f28: f000 f8a8 bl 800607c <FLASH_WaitForLastOperation>
8005f2c: 4603 mov r3, r0
8005f2e: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
8005f30: 7dfb ldrb r3, [r7, #23]
8005f32: 2b00 cmp r3, #0
8005f34: d144 bne.n 8005fc0 <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
8005f36: 68fb ldr r3, [r7, #12]
8005f38: 2b01 cmp r3, #1
8005f3a: d102 bne.n 8005f42 <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8005f3c: 2301 movs r3, #1
8005f3e: 757b strb r3, [r7, #21]
8005f40: e007 b.n 8005f52 <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
8005f42: 68fb ldr r3, [r7, #12]
8005f44: 2b02 cmp r3, #2
8005f46: d102 bne.n 8005f4e <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
8005f48: 2302 movs r3, #2
8005f4a: 757b strb r3, [r7, #21]
8005f4c: e001 b.n 8005f52 <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
8005f4e: 2304 movs r3, #4
8005f50: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
8005f52: 2300 movs r3, #0
8005f54: 75bb strb r3, [r7, #22]
8005f56: e02d b.n 8005fb4 <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
8005f58: 7dbb ldrb r3, [r7, #22]
8005f5a: 005a lsls r2, r3, #1
8005f5c: 68bb ldr r3, [r7, #8]
8005f5e: eb02 0c03 add.w ip, r2, r3
8005f62: 7dbb ldrb r3, [r7, #22]
8005f64: 0119 lsls r1, r3, #4
8005f66: e9d7 2300 ldrd r2, r3, [r7]
8005f6a: f1c1 0620 rsb r6, r1, #32
8005f6e: f1a1 0020 sub.w r0, r1, #32
8005f72: fa22 f401 lsr.w r4, r2, r1
8005f76: fa03 f606 lsl.w r6, r3, r6
8005f7a: 4334 orrs r4, r6
8005f7c: fa23 f000 lsr.w r0, r3, r0
8005f80: 4304 orrs r4, r0
8005f82: fa23 f501 lsr.w r5, r3, r1
8005f86: b2a3 uxth r3, r4
8005f88: 4619 mov r1, r3
8005f8a: 4660 mov r0, ip
8005f8c: f000 f85a bl 8006044 <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005f90: f24c 3050 movw r0, #50000 @ 0xc350
8005f94: f000 f872 bl 800607c <FLASH_WaitForLastOperation>
8005f98: 4603 mov r3, r0
8005f9a: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
8005f9c: 4b0d ldr r3, [pc, #52] @ (8005fd4 <HAL_FLASH_Program+0xdc>)
8005f9e: 691b ldr r3, [r3, #16]
8005fa0: 4a0c ldr r2, [pc, #48] @ (8005fd4 <HAL_FLASH_Program+0xdc>)
8005fa2: f023 0301 bic.w r3, r3, #1
8005fa6: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
8005fa8: 7dfb ldrb r3, [r7, #23]
8005faa: 2b00 cmp r3, #0
8005fac: d107 bne.n 8005fbe <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
8005fae: 7dbb ldrb r3, [r7, #22]
8005fb0: 3301 adds r3, #1
8005fb2: 75bb strb r3, [r7, #22]
8005fb4: 7dba ldrb r2, [r7, #22]
8005fb6: 7d7b ldrb r3, [r7, #21]
8005fb8: 429a cmp r2, r3
8005fba: d3cd bcc.n 8005f58 <HAL_FLASH_Program+0x60>
8005fbc: e000 b.n 8005fc0 <HAL_FLASH_Program+0xc8>
{
break;
8005fbe: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8005fc0: 4b03 ldr r3, [pc, #12] @ (8005fd0 <HAL_FLASH_Program+0xd8>)
8005fc2: 2200 movs r2, #0
8005fc4: 761a strb r2, [r3, #24]
return status;
8005fc6: 7dfb ldrb r3, [r7, #23]
}
8005fc8: 4618 mov r0, r3
8005fca: 371c adds r7, #28
8005fcc: 46bd mov sp, r7
8005fce: bdf0 pop {r4, r5, r6, r7, pc}
8005fd0: 20000478 .word 0x20000478
8005fd4: 40022000 .word 0x40022000
08005fd8 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8005fd8: b480 push {r7}
8005fda: b083 sub sp, #12
8005fdc: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
8005fde: 2300 movs r3, #0
8005fe0: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005fe2: 4b0d ldr r3, [pc, #52] @ (8006018 <HAL_FLASH_Unlock+0x40>)
8005fe4: 691b ldr r3, [r3, #16]
8005fe6: f003 0380 and.w r3, r3, #128 @ 0x80
8005fea: 2b00 cmp r3, #0
8005fec: d00d beq.n 800600a <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
8005fee: 4b0a ldr r3, [pc, #40] @ (8006018 <HAL_FLASH_Unlock+0x40>)
8005ff0: 4a0a ldr r2, [pc, #40] @ (800601c <HAL_FLASH_Unlock+0x44>)
8005ff2: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
8005ff4: 4b08 ldr r3, [pc, #32] @ (8006018 <HAL_FLASH_Unlock+0x40>)
8005ff6: 4a0a ldr r2, [pc, #40] @ (8006020 <HAL_FLASH_Unlock+0x48>)
8005ff8: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005ffa: 4b07 ldr r3, [pc, #28] @ (8006018 <HAL_FLASH_Unlock+0x40>)
8005ffc: 691b ldr r3, [r3, #16]
8005ffe: f003 0380 and.w r3, r3, #128 @ 0x80
8006002: 2b00 cmp r3, #0
8006004: d001 beq.n 800600a <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
8006006: 2301 movs r3, #1
8006008: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
800600a: 79fb ldrb r3, [r7, #7]
}
800600c: 4618 mov r0, r3
800600e: 370c adds r7, #12
8006010: 46bd mov sp, r7
8006012: bc80 pop {r7}
8006014: 4770 bx lr
8006016: bf00 nop
8006018: 40022000 .word 0x40022000
800601c: 45670123 .word 0x45670123
8006020: cdef89ab .word 0xcdef89ab
08006024 <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
8006024: b480 push {r7}
8006026: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
8006028: 4b05 ldr r3, [pc, #20] @ (8006040 <HAL_FLASH_Lock+0x1c>)
800602a: 691b ldr r3, [r3, #16]
800602c: 4a04 ldr r2, [pc, #16] @ (8006040 <HAL_FLASH_Lock+0x1c>)
800602e: f043 0380 orr.w r3, r3, #128 @ 0x80
8006032: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
8006034: 2300 movs r3, #0
}
8006036: 4618 mov r0, r3
8006038: 46bd mov sp, r7
800603a: bc80 pop {r7}
800603c: 4770 bx lr
800603e: bf00 nop
8006040: 40022000 .word 0x40022000
08006044 <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
8006044: b480 push {r7}
8006046: b083 sub sp, #12
8006048: af00 add r7, sp, #0
800604a: 6078 str r0, [r7, #4]
800604c: 460b mov r3, r1
800604e: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8006050: 4b08 ldr r3, [pc, #32] @ (8006074 <FLASH_Program_HalfWord+0x30>)
8006052: 2200 movs r2, #0
8006054: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
8006056: 4b08 ldr r3, [pc, #32] @ (8006078 <FLASH_Program_HalfWord+0x34>)
8006058: 691b ldr r3, [r3, #16]
800605a: 4a07 ldr r2, [pc, #28] @ (8006078 <FLASH_Program_HalfWord+0x34>)
800605c: f043 0301 orr.w r3, r3, #1
8006060: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
8006062: 687b ldr r3, [r7, #4]
8006064: 887a ldrh r2, [r7, #2]
8006066: 801a strh r2, [r3, #0]
}
8006068: bf00 nop
800606a: 370c adds r7, #12
800606c: 46bd mov sp, r7
800606e: bc80 pop {r7}
8006070: 4770 bx lr
8006072: bf00 nop
8006074: 20000478 .word 0x20000478
8006078: 40022000 .word 0x40022000
0800607c <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
800607c: b580 push {r7, lr}
800607e: b084 sub sp, #16
8006080: af00 add r7, sp, #0
8006082: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
8006084: f7ff f860 bl 8005148 <HAL_GetTick>
8006088: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
800608a: e010 b.n 80060ae <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
800608c: 687b ldr r3, [r7, #4]
800608e: f1b3 3fff cmp.w r3, #4294967295
8006092: d00c beq.n 80060ae <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
8006094: 687b ldr r3, [r7, #4]
8006096: 2b00 cmp r3, #0
8006098: d007 beq.n 80060aa <FLASH_WaitForLastOperation+0x2e>
800609a: f7ff f855 bl 8005148 <HAL_GetTick>
800609e: 4602 mov r2, r0
80060a0: 68fb ldr r3, [r7, #12]
80060a2: 1ad3 subs r3, r2, r3
80060a4: 687a ldr r2, [r7, #4]
80060a6: 429a cmp r2, r3
80060a8: d201 bcs.n 80060ae <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
80060aa: 2303 movs r3, #3
80060ac: e025 b.n 80060fa <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80060ae: 4b15 ldr r3, [pc, #84] @ (8006104 <FLASH_WaitForLastOperation+0x88>)
80060b0: 68db ldr r3, [r3, #12]
80060b2: f003 0301 and.w r3, r3, #1
80060b6: 2b00 cmp r3, #0
80060b8: d1e8 bne.n 800608c <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
80060ba: 4b12 ldr r3, [pc, #72] @ (8006104 <FLASH_WaitForLastOperation+0x88>)
80060bc: 68db ldr r3, [r3, #12]
80060be: f003 0320 and.w r3, r3, #32
80060c2: 2b00 cmp r3, #0
80060c4: d002 beq.n 80060cc <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
80060c6: 4b0f ldr r3, [pc, #60] @ (8006104 <FLASH_WaitForLastOperation+0x88>)
80060c8: 2220 movs r2, #32
80060ca: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
80060cc: 4b0d ldr r3, [pc, #52] @ (8006104 <FLASH_WaitForLastOperation+0x88>)
80060ce: 68db ldr r3, [r3, #12]
80060d0: f003 0310 and.w r3, r3, #16
80060d4: 2b00 cmp r3, #0
80060d6: d10b bne.n 80060f0 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
80060d8: 4b0a ldr r3, [pc, #40] @ (8006104 <FLASH_WaitForLastOperation+0x88>)
80060da: 69db ldr r3, [r3, #28]
80060dc: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
80060e0: 2b00 cmp r3, #0
80060e2: d105 bne.n 80060f0 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
80060e4: 4b07 ldr r3, [pc, #28] @ (8006104 <FLASH_WaitForLastOperation+0x88>)
80060e6: 68db ldr r3, [r3, #12]
80060e8: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
80060ec: 2b00 cmp r3, #0
80060ee: d003 beq.n 80060f8 <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
80060f0: f000 f80a bl 8006108 <FLASH_SetErrorCode>
return HAL_ERROR;
80060f4: 2301 movs r3, #1
80060f6: e000 b.n 80060fa <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
80060f8: 2300 movs r3, #0
}
80060fa: 4618 mov r0, r3
80060fc: 3710 adds r7, #16
80060fe: 46bd mov sp, r7
8006100: bd80 pop {r7, pc}
8006102: bf00 nop
8006104: 40022000 .word 0x40022000
08006108 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
8006108: b480 push {r7}
800610a: b083 sub sp, #12
800610c: af00 add r7, sp, #0
uint32_t flags = 0U;
800610e: 2300 movs r3, #0
8006110: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
8006112: 4b23 ldr r3, [pc, #140] @ (80061a0 <FLASH_SetErrorCode+0x98>)
8006114: 68db ldr r3, [r3, #12]
8006116: f003 0310 and.w r3, r3, #16
800611a: 2b00 cmp r3, #0
800611c: d009 beq.n 8006132 <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
800611e: 4b21 ldr r3, [pc, #132] @ (80061a4 <FLASH_SetErrorCode+0x9c>)
8006120: 69db ldr r3, [r3, #28]
8006122: f043 0302 orr.w r3, r3, #2
8006126: 4a1f ldr r2, [pc, #124] @ (80061a4 <FLASH_SetErrorCode+0x9c>)
8006128: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
800612a: 687b ldr r3, [r7, #4]
800612c: f043 0310 orr.w r3, r3, #16
8006130: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8006132: 4b1b ldr r3, [pc, #108] @ (80061a0 <FLASH_SetErrorCode+0x98>)
8006134: 68db ldr r3, [r3, #12]
8006136: f003 0304 and.w r3, r3, #4
800613a: 2b00 cmp r3, #0
800613c: d009 beq.n 8006152 <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
800613e: 4b19 ldr r3, [pc, #100] @ (80061a4 <FLASH_SetErrorCode+0x9c>)
8006140: 69db ldr r3, [r3, #28]
8006142: f043 0301 orr.w r3, r3, #1
8006146: 4a17 ldr r2, [pc, #92] @ (80061a4 <FLASH_SetErrorCode+0x9c>)
8006148: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
800614a: 687b ldr r3, [r7, #4]
800614c: f043 0304 orr.w r3, r3, #4
8006150: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
8006152: 4b13 ldr r3, [pc, #76] @ (80061a0 <FLASH_SetErrorCode+0x98>)
8006154: 69db ldr r3, [r3, #28]
8006156: f003 0301 and.w r3, r3, #1
800615a: 2b00 cmp r3, #0
800615c: d00b beq.n 8006176 <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
800615e: 4b11 ldr r3, [pc, #68] @ (80061a4 <FLASH_SetErrorCode+0x9c>)
8006160: 69db ldr r3, [r3, #28]
8006162: f043 0304 orr.w r3, r3, #4
8006166: 4a0f ldr r2, [pc, #60] @ (80061a4 <FLASH_SetErrorCode+0x9c>)
8006168: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
800616a: 4b0d ldr r3, [pc, #52] @ (80061a0 <FLASH_SetErrorCode+0x98>)
800616c: 69db ldr r3, [r3, #28]
800616e: 4a0c ldr r2, [pc, #48] @ (80061a0 <FLASH_SetErrorCode+0x98>)
8006170: f023 0301 bic.w r3, r3, #1
8006174: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
8006176: 687b ldr r3, [r7, #4]
8006178: f240 1201 movw r2, #257 @ 0x101
800617c: 4293 cmp r3, r2
800617e: d106 bne.n 800618e <FLASH_SetErrorCode+0x86>
8006180: 4b07 ldr r3, [pc, #28] @ (80061a0 <FLASH_SetErrorCode+0x98>)
8006182: 69db ldr r3, [r3, #28]
8006184: 4a06 ldr r2, [pc, #24] @ (80061a0 <FLASH_SetErrorCode+0x98>)
8006186: f023 0301 bic.w r3, r3, #1
800618a: 61d3 str r3, [r2, #28]
}
800618c: e002 b.n 8006194 <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
800618e: 4a04 ldr r2, [pc, #16] @ (80061a0 <FLASH_SetErrorCode+0x98>)
8006190: 687b ldr r3, [r7, #4]
8006192: 60d3 str r3, [r2, #12]
}
8006194: bf00 nop
8006196: 370c adds r7, #12
8006198: 46bd mov sp, r7
800619a: bc80 pop {r7}
800619c: 4770 bx lr
800619e: bf00 nop
80061a0: 40022000 .word 0x40022000
80061a4: 20000478 .word 0x20000478
080061a8 <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
80061a8: b580 push {r7, lr}
80061aa: b084 sub sp, #16
80061ac: af00 add r7, sp, #0
80061ae: 6078 str r0, [r7, #4]
80061b0: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
80061b2: 2301 movs r3, #1
80061b4: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
80061b6: 2300 movs r3, #0
80061b8: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
80061ba: 4b2f ldr r3, [pc, #188] @ (8006278 <HAL_FLASHEx_Erase+0xd0>)
80061bc: 7e1b ldrb r3, [r3, #24]
80061be: 2b01 cmp r3, #1
80061c0: d101 bne.n 80061c6 <HAL_FLASHEx_Erase+0x1e>
80061c2: 2302 movs r3, #2
80061c4: e053 b.n 800626e <HAL_FLASHEx_Erase+0xc6>
80061c6: 4b2c ldr r3, [pc, #176] @ (8006278 <HAL_FLASHEx_Erase+0xd0>)
80061c8: 2201 movs r2, #1
80061ca: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
80061cc: 687b ldr r3, [r7, #4]
80061ce: 681b ldr r3, [r3, #0]
80061d0: 2b02 cmp r3, #2
80061d2: d116 bne.n 8006202 <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
80061d4: f24c 3050 movw r0, #50000 @ 0xc350
80061d8: f7ff ff50 bl 800607c <FLASH_WaitForLastOperation>
80061dc: 4603 mov r3, r0
80061de: 2b00 cmp r3, #0
80061e0: d141 bne.n 8006266 <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
80061e2: 2001 movs r0, #1
80061e4: f000 f84c bl 8006280 <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
80061e8: f24c 3050 movw r0, #50000 @ 0xc350
80061ec: f7ff ff46 bl 800607c <FLASH_WaitForLastOperation>
80061f0: 4603 mov r3, r0
80061f2: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
80061f4: 4b21 ldr r3, [pc, #132] @ (800627c <HAL_FLASHEx_Erase+0xd4>)
80061f6: 691b ldr r3, [r3, #16]
80061f8: 4a20 ldr r2, [pc, #128] @ (800627c <HAL_FLASHEx_Erase+0xd4>)
80061fa: f023 0304 bic.w r3, r3, #4
80061fe: 6113 str r3, [r2, #16]
8006200: e031 b.n 8006266 <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8006202: f24c 3050 movw r0, #50000 @ 0xc350
8006206: f7ff ff39 bl 800607c <FLASH_WaitForLastOperation>
800620a: 4603 mov r3, r0
800620c: 2b00 cmp r3, #0
800620e: d12a bne.n 8006266 <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
8006210: 683b ldr r3, [r7, #0]
8006212: f04f 32ff mov.w r2, #4294967295
8006216: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
8006218: 687b ldr r3, [r7, #4]
800621a: 689b ldr r3, [r3, #8]
800621c: 60bb str r3, [r7, #8]
800621e: e019 b.n 8006254 <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
8006220: 68b8 ldr r0, [r7, #8]
8006222: f000 f849 bl 80062b8 <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8006226: f24c 3050 movw r0, #50000 @ 0xc350
800622a: f7ff ff27 bl 800607c <FLASH_WaitForLastOperation>
800622e: 4603 mov r3, r0
8006230: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
8006232: 4b12 ldr r3, [pc, #72] @ (800627c <HAL_FLASHEx_Erase+0xd4>)
8006234: 691b ldr r3, [r3, #16]
8006236: 4a11 ldr r2, [pc, #68] @ (800627c <HAL_FLASHEx_Erase+0xd4>)
8006238: f023 0302 bic.w r3, r3, #2
800623c: 6113 str r3, [r2, #16]
if (status != HAL_OK)
800623e: 7bfb ldrb r3, [r7, #15]
8006240: 2b00 cmp r3, #0
8006242: d003 beq.n 800624c <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
8006244: 683b ldr r3, [r7, #0]
8006246: 68ba ldr r2, [r7, #8]
8006248: 601a str r2, [r3, #0]
break;
800624a: e00c b.n 8006266 <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
800624c: 68bb ldr r3, [r7, #8]
800624e: f503 6380 add.w r3, r3, #1024 @ 0x400
8006252: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
8006254: 687b ldr r3, [r7, #4]
8006256: 68db ldr r3, [r3, #12]
8006258: 029a lsls r2, r3, #10
800625a: 687b ldr r3, [r7, #4]
800625c: 689b ldr r3, [r3, #8]
800625e: 4413 add r3, r2
8006260: 68ba ldr r2, [r7, #8]
8006262: 429a cmp r2, r3
8006264: d3dc bcc.n 8006220 <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8006266: 4b04 ldr r3, [pc, #16] @ (8006278 <HAL_FLASHEx_Erase+0xd0>)
8006268: 2200 movs r2, #0
800626a: 761a strb r2, [r3, #24]
return status;
800626c: 7bfb ldrb r3, [r7, #15]
}
800626e: 4618 mov r0, r3
8006270: 3710 adds r7, #16
8006272: 46bd mov sp, r7
8006274: bd80 pop {r7, pc}
8006276: bf00 nop
8006278: 20000478 .word 0x20000478
800627c: 40022000 .word 0x40022000
08006280 <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
8006280: b480 push {r7}
8006282: b083 sub sp, #12
8006284: af00 add r7, sp, #0
8006286: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8006288: 4b09 ldr r3, [pc, #36] @ (80062b0 <FLASH_MassErase+0x30>)
800628a: 2200 movs r2, #0
800628c: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
800628e: 4b09 ldr r3, [pc, #36] @ (80062b4 <FLASH_MassErase+0x34>)
8006290: 691b ldr r3, [r3, #16]
8006292: 4a08 ldr r2, [pc, #32] @ (80062b4 <FLASH_MassErase+0x34>)
8006294: f043 0304 orr.w r3, r3, #4
8006298: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
800629a: 4b06 ldr r3, [pc, #24] @ (80062b4 <FLASH_MassErase+0x34>)
800629c: 691b ldr r3, [r3, #16]
800629e: 4a05 ldr r2, [pc, #20] @ (80062b4 <FLASH_MassErase+0x34>)
80062a0: f043 0340 orr.w r3, r3, #64 @ 0x40
80062a4: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
80062a6: bf00 nop
80062a8: 370c adds r7, #12
80062aa: 46bd mov sp, r7
80062ac: bc80 pop {r7}
80062ae: 4770 bx lr
80062b0: 20000478 .word 0x20000478
80062b4: 40022000 .word 0x40022000
080062b8 <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
80062b8: b480 push {r7}
80062ba: b083 sub sp, #12
80062bc: af00 add r7, sp, #0
80062be: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80062c0: 4b0b ldr r3, [pc, #44] @ (80062f0 <FLASH_PageErase+0x38>)
80062c2: 2200 movs r2, #0
80062c4: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
80062c6: 4b0b ldr r3, [pc, #44] @ (80062f4 <FLASH_PageErase+0x3c>)
80062c8: 691b ldr r3, [r3, #16]
80062ca: 4a0a ldr r2, [pc, #40] @ (80062f4 <FLASH_PageErase+0x3c>)
80062cc: f043 0302 orr.w r3, r3, #2
80062d0: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
80062d2: 4a08 ldr r2, [pc, #32] @ (80062f4 <FLASH_PageErase+0x3c>)
80062d4: 687b ldr r3, [r7, #4]
80062d6: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
80062d8: 4b06 ldr r3, [pc, #24] @ (80062f4 <FLASH_PageErase+0x3c>)
80062da: 691b ldr r3, [r3, #16]
80062dc: 4a05 ldr r2, [pc, #20] @ (80062f4 <FLASH_PageErase+0x3c>)
80062de: f043 0340 orr.w r3, r3, #64 @ 0x40
80062e2: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
80062e4: bf00 nop
80062e6: 370c adds r7, #12
80062e8: 46bd mov sp, r7
80062ea: bc80 pop {r7}
80062ec: 4770 bx lr
80062ee: bf00 nop
80062f0: 20000478 .word 0x20000478
80062f4: 40022000 .word 0x40022000
080062f8 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
80062f8: b480 push {r7}
80062fa: b08b sub sp, #44 @ 0x2c
80062fc: af00 add r7, sp, #0
80062fe: 6078 str r0, [r7, #4]
8006300: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8006302: 2300 movs r3, #0
8006304: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
8006306: 2300 movs r3, #0
8006308: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
800630a: e169 b.n 80065e0 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
800630c: 2201 movs r2, #1
800630e: 6a7b ldr r3, [r7, #36] @ 0x24
8006310: fa02 f303 lsl.w r3, r2, r3
8006314: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8006316: 683b ldr r3, [r7, #0]
8006318: 681b ldr r3, [r3, #0]
800631a: 69fa ldr r2, [r7, #28]
800631c: 4013 ands r3, r2
800631e: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8006320: 69ba ldr r2, [r7, #24]
8006322: 69fb ldr r3, [r7, #28]
8006324: 429a cmp r2, r3
8006326: f040 8158 bne.w 80065da <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
800632a: 683b ldr r3, [r7, #0]
800632c: 685b ldr r3, [r3, #4]
800632e: 4a9a ldr r2, [pc, #616] @ (8006598 <HAL_GPIO_Init+0x2a0>)
8006330: 4293 cmp r3, r2
8006332: d05e beq.n 80063f2 <HAL_GPIO_Init+0xfa>
8006334: 4a98 ldr r2, [pc, #608] @ (8006598 <HAL_GPIO_Init+0x2a0>)
8006336: 4293 cmp r3, r2
8006338: d875 bhi.n 8006426 <HAL_GPIO_Init+0x12e>
800633a: 4a98 ldr r2, [pc, #608] @ (800659c <HAL_GPIO_Init+0x2a4>)
800633c: 4293 cmp r3, r2
800633e: d058 beq.n 80063f2 <HAL_GPIO_Init+0xfa>
8006340: 4a96 ldr r2, [pc, #600] @ (800659c <HAL_GPIO_Init+0x2a4>)
8006342: 4293 cmp r3, r2
8006344: d86f bhi.n 8006426 <HAL_GPIO_Init+0x12e>
8006346: 4a96 ldr r2, [pc, #600] @ (80065a0 <HAL_GPIO_Init+0x2a8>)
8006348: 4293 cmp r3, r2
800634a: d052 beq.n 80063f2 <HAL_GPIO_Init+0xfa>
800634c: 4a94 ldr r2, [pc, #592] @ (80065a0 <HAL_GPIO_Init+0x2a8>)
800634e: 4293 cmp r3, r2
8006350: d869 bhi.n 8006426 <HAL_GPIO_Init+0x12e>
8006352: 4a94 ldr r2, [pc, #592] @ (80065a4 <HAL_GPIO_Init+0x2ac>)
8006354: 4293 cmp r3, r2
8006356: d04c beq.n 80063f2 <HAL_GPIO_Init+0xfa>
8006358: 4a92 ldr r2, [pc, #584] @ (80065a4 <HAL_GPIO_Init+0x2ac>)
800635a: 4293 cmp r3, r2
800635c: d863 bhi.n 8006426 <HAL_GPIO_Init+0x12e>
800635e: 4a92 ldr r2, [pc, #584] @ (80065a8 <HAL_GPIO_Init+0x2b0>)
8006360: 4293 cmp r3, r2
8006362: d046 beq.n 80063f2 <HAL_GPIO_Init+0xfa>
8006364: 4a90 ldr r2, [pc, #576] @ (80065a8 <HAL_GPIO_Init+0x2b0>)
8006366: 4293 cmp r3, r2
8006368: d85d bhi.n 8006426 <HAL_GPIO_Init+0x12e>
800636a: 2b12 cmp r3, #18
800636c: d82a bhi.n 80063c4 <HAL_GPIO_Init+0xcc>
800636e: 2b12 cmp r3, #18
8006370: d859 bhi.n 8006426 <HAL_GPIO_Init+0x12e>
8006372: a201 add r2, pc, #4 @ (adr r2, 8006378 <HAL_GPIO_Init+0x80>)
8006374: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006378: 080063f3 .word 0x080063f3
800637c: 080063cd .word 0x080063cd
8006380: 080063df .word 0x080063df
8006384: 08006421 .word 0x08006421
8006388: 08006427 .word 0x08006427
800638c: 08006427 .word 0x08006427
8006390: 08006427 .word 0x08006427
8006394: 08006427 .word 0x08006427
8006398: 08006427 .word 0x08006427
800639c: 08006427 .word 0x08006427
80063a0: 08006427 .word 0x08006427
80063a4: 08006427 .word 0x08006427
80063a8: 08006427 .word 0x08006427
80063ac: 08006427 .word 0x08006427
80063b0: 08006427 .word 0x08006427
80063b4: 08006427 .word 0x08006427
80063b8: 08006427 .word 0x08006427
80063bc: 080063d5 .word 0x080063d5
80063c0: 080063e9 .word 0x080063e9
80063c4: 4a79 ldr r2, [pc, #484] @ (80065ac <HAL_GPIO_Init+0x2b4>)
80063c6: 4293 cmp r3, r2
80063c8: d013 beq.n 80063f2 <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
80063ca: e02c b.n 8006426 <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
80063cc: 683b ldr r3, [r7, #0]
80063ce: 68db ldr r3, [r3, #12]
80063d0: 623b str r3, [r7, #32]
break;
80063d2: e029 b.n 8006428 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
80063d4: 683b ldr r3, [r7, #0]
80063d6: 68db ldr r3, [r3, #12]
80063d8: 3304 adds r3, #4
80063da: 623b str r3, [r7, #32]
break;
80063dc: e024 b.n 8006428 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
80063de: 683b ldr r3, [r7, #0]
80063e0: 68db ldr r3, [r3, #12]
80063e2: 3308 adds r3, #8
80063e4: 623b str r3, [r7, #32]
break;
80063e6: e01f b.n 8006428 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
80063e8: 683b ldr r3, [r7, #0]
80063ea: 68db ldr r3, [r3, #12]
80063ec: 330c adds r3, #12
80063ee: 623b str r3, [r7, #32]
break;
80063f0: e01a b.n 8006428 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
80063f2: 683b ldr r3, [r7, #0]
80063f4: 689b ldr r3, [r3, #8]
80063f6: 2b00 cmp r3, #0
80063f8: d102 bne.n 8006400 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
80063fa: 2304 movs r3, #4
80063fc: 623b str r3, [r7, #32]
break;
80063fe: e013 b.n 8006428 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8006400: 683b ldr r3, [r7, #0]
8006402: 689b ldr r3, [r3, #8]
8006404: 2b01 cmp r3, #1
8006406: d105 bne.n 8006414 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8006408: 2308 movs r3, #8
800640a: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
800640c: 687b ldr r3, [r7, #4]
800640e: 69fa ldr r2, [r7, #28]
8006410: 611a str r2, [r3, #16]
break;
8006412: e009 b.n 8006428 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8006414: 2308 movs r3, #8
8006416: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8006418: 687b ldr r3, [r7, #4]
800641a: 69fa ldr r2, [r7, #28]
800641c: 615a str r2, [r3, #20]
break;
800641e: e003 b.n 8006428 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8006420: 2300 movs r3, #0
8006422: 623b str r3, [r7, #32]
break;
8006424: e000 b.n 8006428 <HAL_GPIO_Init+0x130>
break;
8006426: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8006428: 69bb ldr r3, [r7, #24]
800642a: 2bff cmp r3, #255 @ 0xff
800642c: d801 bhi.n 8006432 <HAL_GPIO_Init+0x13a>
800642e: 687b ldr r3, [r7, #4]
8006430: e001 b.n 8006436 <HAL_GPIO_Init+0x13e>
8006432: 687b ldr r3, [r7, #4]
8006434: 3304 adds r3, #4
8006436: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8006438: 69bb ldr r3, [r7, #24]
800643a: 2bff cmp r3, #255 @ 0xff
800643c: d802 bhi.n 8006444 <HAL_GPIO_Init+0x14c>
800643e: 6a7b ldr r3, [r7, #36] @ 0x24
8006440: 009b lsls r3, r3, #2
8006442: e002 b.n 800644a <HAL_GPIO_Init+0x152>
8006444: 6a7b ldr r3, [r7, #36] @ 0x24
8006446: 3b08 subs r3, #8
8006448: 009b lsls r3, r3, #2
800644a: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
800644c: 697b ldr r3, [r7, #20]
800644e: 681a ldr r2, [r3, #0]
8006450: 210f movs r1, #15
8006452: 693b ldr r3, [r7, #16]
8006454: fa01 f303 lsl.w r3, r1, r3
8006458: 43db mvns r3, r3
800645a: 401a ands r2, r3
800645c: 6a39 ldr r1, [r7, #32]
800645e: 693b ldr r3, [r7, #16]
8006460: fa01 f303 lsl.w r3, r1, r3
8006464: 431a orrs r2, r3
8006466: 697b ldr r3, [r7, #20]
8006468: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
800646a: 683b ldr r3, [r7, #0]
800646c: 685b ldr r3, [r3, #4]
800646e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8006472: 2b00 cmp r3, #0
8006474: f000 80b1 beq.w 80065da <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8006478: 4b4d ldr r3, [pc, #308] @ (80065b0 <HAL_GPIO_Init+0x2b8>)
800647a: 699b ldr r3, [r3, #24]
800647c: 4a4c ldr r2, [pc, #304] @ (80065b0 <HAL_GPIO_Init+0x2b8>)
800647e: f043 0301 orr.w r3, r3, #1
8006482: 6193 str r3, [r2, #24]
8006484: 4b4a ldr r3, [pc, #296] @ (80065b0 <HAL_GPIO_Init+0x2b8>)
8006486: 699b ldr r3, [r3, #24]
8006488: f003 0301 and.w r3, r3, #1
800648c: 60bb str r3, [r7, #8]
800648e: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8006490: 4a48 ldr r2, [pc, #288] @ (80065b4 <HAL_GPIO_Init+0x2bc>)
8006492: 6a7b ldr r3, [r7, #36] @ 0x24
8006494: 089b lsrs r3, r3, #2
8006496: 3302 adds r3, #2
8006498: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800649c: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
800649e: 6a7b ldr r3, [r7, #36] @ 0x24
80064a0: f003 0303 and.w r3, r3, #3
80064a4: 009b lsls r3, r3, #2
80064a6: 220f movs r2, #15
80064a8: fa02 f303 lsl.w r3, r2, r3
80064ac: 43db mvns r3, r3
80064ae: 68fa ldr r2, [r7, #12]
80064b0: 4013 ands r3, r2
80064b2: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
80064b4: 687b ldr r3, [r7, #4]
80064b6: 4a40 ldr r2, [pc, #256] @ (80065b8 <HAL_GPIO_Init+0x2c0>)
80064b8: 4293 cmp r3, r2
80064ba: d013 beq.n 80064e4 <HAL_GPIO_Init+0x1ec>
80064bc: 687b ldr r3, [r7, #4]
80064be: 4a3f ldr r2, [pc, #252] @ (80065bc <HAL_GPIO_Init+0x2c4>)
80064c0: 4293 cmp r3, r2
80064c2: d00d beq.n 80064e0 <HAL_GPIO_Init+0x1e8>
80064c4: 687b ldr r3, [r7, #4]
80064c6: 4a3e ldr r2, [pc, #248] @ (80065c0 <HAL_GPIO_Init+0x2c8>)
80064c8: 4293 cmp r3, r2
80064ca: d007 beq.n 80064dc <HAL_GPIO_Init+0x1e4>
80064cc: 687b ldr r3, [r7, #4]
80064ce: 4a3d ldr r2, [pc, #244] @ (80065c4 <HAL_GPIO_Init+0x2cc>)
80064d0: 4293 cmp r3, r2
80064d2: d101 bne.n 80064d8 <HAL_GPIO_Init+0x1e0>
80064d4: 2303 movs r3, #3
80064d6: e006 b.n 80064e6 <HAL_GPIO_Init+0x1ee>
80064d8: 2304 movs r3, #4
80064da: e004 b.n 80064e6 <HAL_GPIO_Init+0x1ee>
80064dc: 2302 movs r3, #2
80064de: e002 b.n 80064e6 <HAL_GPIO_Init+0x1ee>
80064e0: 2301 movs r3, #1
80064e2: e000 b.n 80064e6 <HAL_GPIO_Init+0x1ee>
80064e4: 2300 movs r3, #0
80064e6: 6a7a ldr r2, [r7, #36] @ 0x24
80064e8: f002 0203 and.w r2, r2, #3
80064ec: 0092 lsls r2, r2, #2
80064ee: 4093 lsls r3, r2
80064f0: 68fa ldr r2, [r7, #12]
80064f2: 4313 orrs r3, r2
80064f4: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
80064f6: 492f ldr r1, [pc, #188] @ (80065b4 <HAL_GPIO_Init+0x2bc>)
80064f8: 6a7b ldr r3, [r7, #36] @ 0x24
80064fa: 089b lsrs r3, r3, #2
80064fc: 3302 adds r3, #2
80064fe: 68fa ldr r2, [r7, #12]
8006500: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8006504: 683b ldr r3, [r7, #0]
8006506: 685b ldr r3, [r3, #4]
8006508: f403 1380 and.w r3, r3, #1048576 @ 0x100000
800650c: 2b00 cmp r3, #0
800650e: d006 beq.n 800651e <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
8006510: 4b2d ldr r3, [pc, #180] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006512: 689a ldr r2, [r3, #8]
8006514: 492c ldr r1, [pc, #176] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006516: 69bb ldr r3, [r7, #24]
8006518: 4313 orrs r3, r2
800651a: 608b str r3, [r1, #8]
800651c: e006 b.n 800652c <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
800651e: 4b2a ldr r3, [pc, #168] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006520: 689a ldr r2, [r3, #8]
8006522: 69bb ldr r3, [r7, #24]
8006524: 43db mvns r3, r3
8006526: 4928 ldr r1, [pc, #160] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006528: 4013 ands r3, r2
800652a: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
800652c: 683b ldr r3, [r7, #0]
800652e: 685b ldr r3, [r3, #4]
8006530: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8006534: 2b00 cmp r3, #0
8006536: d006 beq.n 8006546 <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
8006538: 4b23 ldr r3, [pc, #140] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
800653a: 68da ldr r2, [r3, #12]
800653c: 4922 ldr r1, [pc, #136] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
800653e: 69bb ldr r3, [r7, #24]
8006540: 4313 orrs r3, r2
8006542: 60cb str r3, [r1, #12]
8006544: e006 b.n 8006554 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
8006546: 4b20 ldr r3, [pc, #128] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006548: 68da ldr r2, [r3, #12]
800654a: 69bb ldr r3, [r7, #24]
800654c: 43db mvns r3, r3
800654e: 491e ldr r1, [pc, #120] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006550: 4013 ands r3, r2
8006552: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8006554: 683b ldr r3, [r7, #0]
8006556: 685b ldr r3, [r3, #4]
8006558: f403 3300 and.w r3, r3, #131072 @ 0x20000
800655c: 2b00 cmp r3, #0
800655e: d006 beq.n 800656e <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
8006560: 4b19 ldr r3, [pc, #100] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006562: 685a ldr r2, [r3, #4]
8006564: 4918 ldr r1, [pc, #96] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006566: 69bb ldr r3, [r7, #24]
8006568: 4313 orrs r3, r2
800656a: 604b str r3, [r1, #4]
800656c: e006 b.n 800657c <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
800656e: 4b16 ldr r3, [pc, #88] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006570: 685a ldr r2, [r3, #4]
8006572: 69bb ldr r3, [r7, #24]
8006574: 43db mvns r3, r3
8006576: 4914 ldr r1, [pc, #80] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
8006578: 4013 ands r3, r2
800657a: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
800657c: 683b ldr r3, [r7, #0]
800657e: 685b ldr r3, [r3, #4]
8006580: f403 3380 and.w r3, r3, #65536 @ 0x10000
8006584: 2b00 cmp r3, #0
8006586: d021 beq.n 80065cc <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
8006588: 4b0f ldr r3, [pc, #60] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
800658a: 681a ldr r2, [r3, #0]
800658c: 490e ldr r1, [pc, #56] @ (80065c8 <HAL_GPIO_Init+0x2d0>)
800658e: 69bb ldr r3, [r7, #24]
8006590: 4313 orrs r3, r2
8006592: 600b str r3, [r1, #0]
8006594: e021 b.n 80065da <HAL_GPIO_Init+0x2e2>
8006596: bf00 nop
8006598: 10320000 .word 0x10320000
800659c: 10310000 .word 0x10310000
80065a0: 10220000 .word 0x10220000
80065a4: 10210000 .word 0x10210000
80065a8: 10120000 .word 0x10120000
80065ac: 10110000 .word 0x10110000
80065b0: 40021000 .word 0x40021000
80065b4: 40010000 .word 0x40010000
80065b8: 40010800 .word 0x40010800
80065bc: 40010c00 .word 0x40010c00
80065c0: 40011000 .word 0x40011000
80065c4: 40011400 .word 0x40011400
80065c8: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
80065cc: 4b0b ldr r3, [pc, #44] @ (80065fc <HAL_GPIO_Init+0x304>)
80065ce: 681a ldr r2, [r3, #0]
80065d0: 69bb ldr r3, [r7, #24]
80065d2: 43db mvns r3, r3
80065d4: 4909 ldr r1, [pc, #36] @ (80065fc <HAL_GPIO_Init+0x304>)
80065d6: 4013 ands r3, r2
80065d8: 600b str r3, [r1, #0]
}
}
}
position++;
80065da: 6a7b ldr r3, [r7, #36] @ 0x24
80065dc: 3301 adds r3, #1
80065de: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
80065e0: 683b ldr r3, [r7, #0]
80065e2: 681a ldr r2, [r3, #0]
80065e4: 6a7b ldr r3, [r7, #36] @ 0x24
80065e6: fa22 f303 lsr.w r3, r2, r3
80065ea: 2b00 cmp r3, #0
80065ec: f47f ae8e bne.w 800630c <HAL_GPIO_Init+0x14>
}
}
80065f0: bf00 nop
80065f2: bf00 nop
80065f4: 372c adds r7, #44 @ 0x2c
80065f6: 46bd mov sp, r7
80065f8: bc80 pop {r7}
80065fa: 4770 bx lr
80065fc: 40010400 .word 0x40010400
08006600 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8006600: b480 push {r7}
8006602: b085 sub sp, #20
8006604: af00 add r7, sp, #0
8006606: 6078 str r0, [r7, #4]
8006608: 460b mov r3, r1
800660a: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
800660c: 687b ldr r3, [r7, #4]
800660e: 689a ldr r2, [r3, #8]
8006610: 887b ldrh r3, [r7, #2]
8006612: 4013 ands r3, r2
8006614: 2b00 cmp r3, #0
8006616: d002 beq.n 800661e <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
8006618: 2301 movs r3, #1
800661a: 73fb strb r3, [r7, #15]
800661c: e001 b.n 8006622 <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
800661e: 2300 movs r3, #0
8006620: 73fb strb r3, [r7, #15]
}
return bitstatus;
8006622: 7bfb ldrb r3, [r7, #15]
}
8006624: 4618 mov r0, r3
8006626: 3714 adds r7, #20
8006628: 46bd mov sp, r7
800662a: bc80 pop {r7}
800662c: 4770 bx lr
0800662e <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
800662e: b480 push {r7}
8006630: b083 sub sp, #12
8006632: af00 add r7, sp, #0
8006634: 6078 str r0, [r7, #4]
8006636: 460b mov r3, r1
8006638: 807b strh r3, [r7, #2]
800663a: 4613 mov r3, r2
800663c: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
800663e: 787b ldrb r3, [r7, #1]
8006640: 2b00 cmp r3, #0
8006642: d003 beq.n 800664c <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8006644: 887a ldrh r2, [r7, #2]
8006646: 687b ldr r3, [r7, #4]
8006648: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
800664a: e003 b.n 8006654 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
800664c: 887b ldrh r3, [r7, #2]
800664e: 041a lsls r2, r3, #16
8006650: 687b ldr r3, [r7, #4]
8006652: 611a str r2, [r3, #16]
}
8006654: bf00 nop
8006656: 370c adds r7, #12
8006658: 46bd mov sp, r7
800665a: bc80 pop {r7}
800665c: 4770 bx lr
0800665e <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
800665e: b580 push {r7, lr}
8006660: b084 sub sp, #16
8006662: af00 add r7, sp, #0
8006664: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8006666: 687b ldr r3, [r7, #4]
8006668: 2b00 cmp r3, #0
800666a: d101 bne.n 8006670 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
800666c: 2301 movs r3, #1
800666e: e0e8 b.n 8006842 <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8006670: 687b ldr r3, [r7, #4]
8006672: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8006676: b2db uxtb r3, r3
8006678: 2b00 cmp r3, #0
800667a: d106 bne.n 800668a <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
800667c: 687b ldr r3, [r7, #4]
800667e: 2200 movs r2, #0
8006680: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8006684: 6878 ldr r0, [r7, #4]
8006686: f007 fc17 bl 800deb8 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
800668a: 687b ldr r3, [r7, #4]
800668c: 2203 movs r2, #3
800668e: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8006692: 687b ldr r3, [r7, #4]
8006694: 2200 movs r2, #0
8006696: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8006698: 687b ldr r3, [r7, #4]
800669a: 681b ldr r3, [r3, #0]
800669c: 4618 mov r0, r3
800669e: f003 fabc bl 8009c1a <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80066a2: 687b ldr r3, [r7, #4]
80066a4: 6818 ldr r0, [r3, #0]
80066a6: 687b ldr r3, [r7, #4]
80066a8: 3304 adds r3, #4
80066aa: cb0e ldmia r3, {r1, r2, r3}
80066ac: f003 fa92 bl 8009bd4 <USB_CoreInit>
80066b0: 4603 mov r3, r0
80066b2: 2b00 cmp r3, #0
80066b4: d005 beq.n 80066c2 <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80066b6: 687b ldr r3, [r7, #4]
80066b8: 2202 movs r2, #2
80066ba: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80066be: 2301 movs r3, #1
80066c0: e0bf b.n 8006842 <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
80066c2: 687b ldr r3, [r7, #4]
80066c4: 681b ldr r3, [r3, #0]
80066c6: 2100 movs r1, #0
80066c8: 4618 mov r0, r3
80066ca: f003 fac0 bl 8009c4e <USB_SetCurrentMode>
80066ce: 4603 mov r3, r0
80066d0: 2b00 cmp r3, #0
80066d2: d005 beq.n 80066e0 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80066d4: 687b ldr r3, [r7, #4]
80066d6: 2202 movs r2, #2
80066d8: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80066dc: 2301 movs r3, #1
80066de: e0b0 b.n 8006842 <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80066e0: 2300 movs r3, #0
80066e2: 73fb strb r3, [r7, #15]
80066e4: e03e b.n 8006764 <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
80066e6: 7bfa ldrb r2, [r7, #15]
80066e8: 6879 ldr r1, [r7, #4]
80066ea: 4613 mov r3, r2
80066ec: 009b lsls r3, r3, #2
80066ee: 4413 add r3, r2
80066f0: 00db lsls r3, r3, #3
80066f2: 440b add r3, r1
80066f4: 3311 adds r3, #17
80066f6: 2201 movs r2, #1
80066f8: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
80066fa: 7bfa ldrb r2, [r7, #15]
80066fc: 6879 ldr r1, [r7, #4]
80066fe: 4613 mov r3, r2
8006700: 009b lsls r3, r3, #2
8006702: 4413 add r3, r2
8006704: 00db lsls r3, r3, #3
8006706: 440b add r3, r1
8006708: 3310 adds r3, #16
800670a: 7bfa ldrb r2, [r7, #15]
800670c: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
800670e: 7bfa ldrb r2, [r7, #15]
8006710: 6879 ldr r1, [r7, #4]
8006712: 4613 mov r3, r2
8006714: 009b lsls r3, r3, #2
8006716: 4413 add r3, r2
8006718: 00db lsls r3, r3, #3
800671a: 440b add r3, r1
800671c: 3313 adds r3, #19
800671e: 2200 movs r2, #0
8006720: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8006722: 7bfa ldrb r2, [r7, #15]
8006724: 6879 ldr r1, [r7, #4]
8006726: 4613 mov r3, r2
8006728: 009b lsls r3, r3, #2
800672a: 4413 add r3, r2
800672c: 00db lsls r3, r3, #3
800672e: 440b add r3, r1
8006730: 3320 adds r3, #32
8006732: 2200 movs r2, #0
8006734: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8006736: 7bfa ldrb r2, [r7, #15]
8006738: 6879 ldr r1, [r7, #4]
800673a: 4613 mov r3, r2
800673c: 009b lsls r3, r3, #2
800673e: 4413 add r3, r2
8006740: 00db lsls r3, r3, #3
8006742: 440b add r3, r1
8006744: 3324 adds r3, #36 @ 0x24
8006746: 2200 movs r2, #0
8006748: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
800674a: 7bfb ldrb r3, [r7, #15]
800674c: 6879 ldr r1, [r7, #4]
800674e: 1c5a adds r2, r3, #1
8006750: 4613 mov r3, r2
8006752: 009b lsls r3, r3, #2
8006754: 4413 add r3, r2
8006756: 00db lsls r3, r3, #3
8006758: 440b add r3, r1
800675a: 2200 movs r2, #0
800675c: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800675e: 7bfb ldrb r3, [r7, #15]
8006760: 3301 adds r3, #1
8006762: 73fb strb r3, [r7, #15]
8006764: 687b ldr r3, [r7, #4]
8006766: 791b ldrb r3, [r3, #4]
8006768: 7bfa ldrb r2, [r7, #15]
800676a: 429a cmp r2, r3
800676c: d3bb bcc.n 80066e6 <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800676e: 2300 movs r3, #0
8006770: 73fb strb r3, [r7, #15]
8006772: e044 b.n 80067fe <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
8006774: 7bfa ldrb r2, [r7, #15]
8006776: 6879 ldr r1, [r7, #4]
8006778: 4613 mov r3, r2
800677a: 009b lsls r3, r3, #2
800677c: 4413 add r3, r2
800677e: 00db lsls r3, r3, #3
8006780: 440b add r3, r1
8006782: f203 1351 addw r3, r3, #337 @ 0x151
8006786: 2200 movs r2, #0
8006788: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
800678a: 7bfa ldrb r2, [r7, #15]
800678c: 6879 ldr r1, [r7, #4]
800678e: 4613 mov r3, r2
8006790: 009b lsls r3, r3, #2
8006792: 4413 add r3, r2
8006794: 00db lsls r3, r3, #3
8006796: 440b add r3, r1
8006798: f503 73a8 add.w r3, r3, #336 @ 0x150
800679c: 7bfa ldrb r2, [r7, #15]
800679e: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
80067a0: 7bfa ldrb r2, [r7, #15]
80067a2: 6879 ldr r1, [r7, #4]
80067a4: 4613 mov r3, r2
80067a6: 009b lsls r3, r3, #2
80067a8: 4413 add r3, r2
80067aa: 00db lsls r3, r3, #3
80067ac: 440b add r3, r1
80067ae: f203 1353 addw r3, r3, #339 @ 0x153
80067b2: 2200 movs r2, #0
80067b4: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
80067b6: 7bfa ldrb r2, [r7, #15]
80067b8: 6879 ldr r1, [r7, #4]
80067ba: 4613 mov r3, r2
80067bc: 009b lsls r3, r3, #2
80067be: 4413 add r3, r2
80067c0: 00db lsls r3, r3, #3
80067c2: 440b add r3, r1
80067c4: f503 73b0 add.w r3, r3, #352 @ 0x160
80067c8: 2200 movs r2, #0
80067ca: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
80067cc: 7bfa ldrb r2, [r7, #15]
80067ce: 6879 ldr r1, [r7, #4]
80067d0: 4613 mov r3, r2
80067d2: 009b lsls r3, r3, #2
80067d4: 4413 add r3, r2
80067d6: 00db lsls r3, r3, #3
80067d8: 440b add r3, r1
80067da: f503 73b2 add.w r3, r3, #356 @ 0x164
80067de: 2200 movs r2, #0
80067e0: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
80067e2: 7bfa ldrb r2, [r7, #15]
80067e4: 6879 ldr r1, [r7, #4]
80067e6: 4613 mov r3, r2
80067e8: 009b lsls r3, r3, #2
80067ea: 4413 add r3, r2
80067ec: 00db lsls r3, r3, #3
80067ee: 440b add r3, r1
80067f0: f503 73b4 add.w r3, r3, #360 @ 0x168
80067f4: 2200 movs r2, #0
80067f6: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80067f8: 7bfb ldrb r3, [r7, #15]
80067fa: 3301 adds r3, #1
80067fc: 73fb strb r3, [r7, #15]
80067fe: 687b ldr r3, [r7, #4]
8006800: 791b ldrb r3, [r3, #4]
8006802: 7bfa ldrb r2, [r7, #15]
8006804: 429a cmp r2, r3
8006806: d3b5 bcc.n 8006774 <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8006808: 687b ldr r3, [r7, #4]
800680a: 6818 ldr r0, [r3, #0]
800680c: 687b ldr r3, [r7, #4]
800680e: 3304 adds r3, #4
8006810: cb0e ldmia r3, {r1, r2, r3}
8006812: f003 fa28 bl 8009c66 <USB_DevInit>
8006816: 4603 mov r3, r0
8006818: 2b00 cmp r3, #0
800681a: d005 beq.n 8006828 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800681c: 687b ldr r3, [r7, #4]
800681e: 2202 movs r2, #2
8006820: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006824: 2301 movs r3, #1
8006826: e00c b.n 8006842 <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
8006828: 687b ldr r3, [r7, #4]
800682a: 2200 movs r2, #0
800682c: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
800682e: 687b ldr r3, [r7, #4]
8006830: 2201 movs r2, #1
8006832: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
8006836: 687b ldr r3, [r7, #4]
8006838: 681b ldr r3, [r3, #0]
800683a: 4618 mov r0, r3
800683c: f005 fca7 bl 800c18e <USB_DevDisconnect>
return HAL_OK;
8006840: 2300 movs r3, #0
}
8006842: 4618 mov r0, r3
8006844: 3710 adds r7, #16
8006846: 46bd mov sp, r7
8006848: bd80 pop {r7, pc}
0800684a <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
800684a: b580 push {r7, lr}
800684c: b082 sub sp, #8
800684e: af00 add r7, sp, #0
8006850: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8006852: 687b ldr r3, [r7, #4]
8006854: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006858: 2b01 cmp r3, #1
800685a: d101 bne.n 8006860 <HAL_PCD_Start+0x16>
800685c: 2302 movs r3, #2
800685e: e016 b.n 800688e <HAL_PCD_Start+0x44>
8006860: 687b ldr r3, [r7, #4]
8006862: 2201 movs r2, #1
8006864: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8006868: 687b ldr r3, [r7, #4]
800686a: 681b ldr r3, [r3, #0]
800686c: 4618 mov r0, r3
800686e: f003 f9be bl 8009bee <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8006872: 2101 movs r1, #1
8006874: 6878 ldr r0, [r7, #4]
8006876: f007 fd92 bl 800e39e <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
800687a: 687b ldr r3, [r7, #4]
800687c: 681b ldr r3, [r3, #0]
800687e: 4618 mov r0, r3
8006880: f005 fc7b bl 800c17a <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8006884: 687b ldr r3, [r7, #4]
8006886: 2200 movs r2, #0
8006888: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
800688c: 2300 movs r3, #0
}
800688e: 4618 mov r0, r3
8006890: 3708 adds r7, #8
8006892: 46bd mov sp, r7
8006894: bd80 pop {r7, pc}
08006896 <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8006896: b580 push {r7, lr}
8006898: b088 sub sp, #32
800689a: af00 add r7, sp, #0
800689c: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
800689e: 687b ldr r3, [r7, #4]
80068a0: 681b ldr r3, [r3, #0]
80068a2: 4618 mov r0, r3
80068a4: f005 fc7d bl 800c1a2 <USB_ReadInterrupts>
80068a8: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
80068aa: 69bb ldr r3, [r7, #24]
80068ac: f403 4300 and.w r3, r3, #32768 @ 0x8000
80068b0: 2b00 cmp r3, #0
80068b2: d003 beq.n 80068bc <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
80068b4: 6878 ldr r0, [r7, #4]
80068b6: f000 fb1a bl 8006eee <PCD_EP_ISR_Handler>
return;
80068ba: e119 b.n 8006af0 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
80068bc: 69bb ldr r3, [r7, #24]
80068be: f403 6380 and.w r3, r3, #1024 @ 0x400
80068c2: 2b00 cmp r3, #0
80068c4: d013 beq.n 80068ee <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
80068c6: 687b ldr r3, [r7, #4]
80068c8: 681b ldr r3, [r3, #0]
80068ca: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80068ce: b29a uxth r2, r3
80068d0: 687b ldr r3, [r7, #4]
80068d2: 681b ldr r3, [r3, #0]
80068d4: f422 6280 bic.w r2, r2, #1024 @ 0x400
80068d8: b292 uxth r2, r2
80068da: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
80068de: 6878 ldr r0, [r7, #4]
80068e0: f007 fb65 bl 800dfae <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
80068e4: 2100 movs r1, #0
80068e6: 6878 ldr r0, [r7, #4]
80068e8: f000 f905 bl 8006af6 <HAL_PCD_SetAddress>
return;
80068ec: e100 b.n 8006af0 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
80068ee: 69bb ldr r3, [r7, #24]
80068f0: f403 4380 and.w r3, r3, #16384 @ 0x4000
80068f4: 2b00 cmp r3, #0
80068f6: d00c beq.n 8006912 <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
80068f8: 687b ldr r3, [r7, #4]
80068fa: 681b ldr r3, [r3, #0]
80068fc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006900: b29a uxth r2, r3
8006902: 687b ldr r3, [r7, #4]
8006904: 681b ldr r3, [r3, #0]
8006906: f422 4280 bic.w r2, r2, #16384 @ 0x4000
800690a: b292 uxth r2, r2
800690c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006910: e0ee b.n 8006af0 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
8006912: 69bb ldr r3, [r7, #24]
8006914: f403 5300 and.w r3, r3, #8192 @ 0x2000
8006918: 2b00 cmp r3, #0
800691a: d00c beq.n 8006936 <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
800691c: 687b ldr r3, [r7, #4]
800691e: 681b ldr r3, [r3, #0]
8006920: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006924: b29a uxth r2, r3
8006926: 687b ldr r3, [r7, #4]
8006928: 681b ldr r3, [r3, #0]
800692a: f422 5200 bic.w r2, r2, #8192 @ 0x2000
800692e: b292 uxth r2, r2
8006930: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006934: e0dc b.n 8006af0 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8006936: 69bb ldr r3, [r7, #24]
8006938: f403 5380 and.w r3, r3, #4096 @ 0x1000
800693c: 2b00 cmp r3, #0
800693e: d027 beq.n 8006990 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8006940: 687b ldr r3, [r7, #4]
8006942: 681b ldr r3, [r3, #0]
8006944: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006948: b29a uxth r2, r3
800694a: 687b ldr r3, [r7, #4]
800694c: 681b ldr r3, [r3, #0]
800694e: f022 0204 bic.w r2, r2, #4
8006952: b292 uxth r2, r2
8006954: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8006958: 687b ldr r3, [r7, #4]
800695a: 681b ldr r3, [r3, #0]
800695c: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006960: b29a uxth r2, r3
8006962: 687b ldr r3, [r7, #4]
8006964: 681b ldr r3, [r3, #0]
8006966: f022 0208 bic.w r2, r2, #8
800696a: b292 uxth r2, r2
800696c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8006970: 6878 ldr r0, [r7, #4]
8006972: f007 fb55 bl 800e020 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8006976: 687b ldr r3, [r7, #4]
8006978: 681b ldr r3, [r3, #0]
800697a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800697e: b29a uxth r2, r3
8006980: 687b ldr r3, [r7, #4]
8006982: 681b ldr r3, [r3, #0]
8006984: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8006988: b292 uxth r2, r2
800698a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
800698e: e0af b.n 8006af0 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8006990: 69bb ldr r3, [r7, #24]
8006992: f403 6300 and.w r3, r3, #2048 @ 0x800
8006996: 2b00 cmp r3, #0
8006998: f000 8083 beq.w 8006aa2 <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
800699c: 2300 movs r3, #0
800699e: 77fb strb r3, [r7, #31]
80069a0: e010 b.n 80069c4 <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
80069a2: 687b ldr r3, [r7, #4]
80069a4: 681b ldr r3, [r3, #0]
80069a6: 461a mov r2, r3
80069a8: 7ffb ldrb r3, [r7, #31]
80069aa: 009b lsls r3, r3, #2
80069ac: 441a add r2, r3
80069ae: 7ffb ldrb r3, [r7, #31]
80069b0: 8812 ldrh r2, [r2, #0]
80069b2: b292 uxth r2, r2
80069b4: 005b lsls r3, r3, #1
80069b6: 3320 adds r3, #32
80069b8: 443b add r3, r7
80069ba: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
80069be: 7ffb ldrb r3, [r7, #31]
80069c0: 3301 adds r3, #1
80069c2: 77fb strb r3, [r7, #31]
80069c4: 7ffb ldrb r3, [r7, #31]
80069c6: 2b07 cmp r3, #7
80069c8: d9eb bls.n 80069a2 <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
80069ca: 687b ldr r3, [r7, #4]
80069cc: 681b ldr r3, [r3, #0]
80069ce: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80069d2: b29a uxth r2, r3
80069d4: 687b ldr r3, [r7, #4]
80069d6: 681b ldr r3, [r3, #0]
80069d8: f042 0201 orr.w r2, r2, #1
80069dc: b292 uxth r2, r2
80069de: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
80069e2: 687b ldr r3, [r7, #4]
80069e4: 681b ldr r3, [r3, #0]
80069e6: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80069ea: b29a uxth r2, r3
80069ec: 687b ldr r3, [r7, #4]
80069ee: 681b ldr r3, [r3, #0]
80069f0: f022 0201 bic.w r2, r2, #1
80069f4: b292 uxth r2, r2
80069f6: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
80069fa: bf00 nop
80069fc: 687b ldr r3, [r7, #4]
80069fe: 681b ldr r3, [r3, #0]
8006a00: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006a04: b29b uxth r3, r3
8006a06: f403 6380 and.w r3, r3, #1024 @ 0x400
8006a0a: 2b00 cmp r3, #0
8006a0c: d0f6 beq.n 80069fc <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8006a0e: 687b ldr r3, [r7, #4]
8006a10: 681b ldr r3, [r3, #0]
8006a12: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006a16: b29a uxth r2, r3
8006a18: 687b ldr r3, [r7, #4]
8006a1a: 681b ldr r3, [r3, #0]
8006a1c: f422 6280 bic.w r2, r2, #1024 @ 0x400
8006a20: b292 uxth r2, r2
8006a22: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8006a26: 2300 movs r3, #0
8006a28: 77fb strb r3, [r7, #31]
8006a2a: e00f b.n 8006a4c <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8006a2c: 7ffb ldrb r3, [r7, #31]
8006a2e: 687a ldr r2, [r7, #4]
8006a30: 6812 ldr r2, [r2, #0]
8006a32: 4611 mov r1, r2
8006a34: 7ffa ldrb r2, [r7, #31]
8006a36: 0092 lsls r2, r2, #2
8006a38: 440a add r2, r1
8006a3a: 005b lsls r3, r3, #1
8006a3c: 3320 adds r3, #32
8006a3e: 443b add r3, r7
8006a40: f833 3c18 ldrh.w r3, [r3, #-24]
8006a44: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8006a46: 7ffb ldrb r3, [r7, #31]
8006a48: 3301 adds r3, #1
8006a4a: 77fb strb r3, [r7, #31]
8006a4c: 7ffb ldrb r3, [r7, #31]
8006a4e: 2b07 cmp r3, #7
8006a50: d9ec bls.n 8006a2c <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8006a52: 687b ldr r3, [r7, #4]
8006a54: 681b ldr r3, [r3, #0]
8006a56: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006a5a: b29a uxth r2, r3
8006a5c: 687b ldr r3, [r7, #4]
8006a5e: 681b ldr r3, [r3, #0]
8006a60: f042 0208 orr.w r2, r2, #8
8006a64: b292 uxth r2, r2
8006a66: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8006a6a: 687b ldr r3, [r7, #4]
8006a6c: 681b ldr r3, [r3, #0]
8006a6e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006a72: b29a uxth r2, r3
8006a74: 687b ldr r3, [r7, #4]
8006a76: 681b ldr r3, [r3, #0]
8006a78: f422 6200 bic.w r2, r2, #2048 @ 0x800
8006a7c: b292 uxth r2, r2
8006a7e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8006a82: 687b ldr r3, [r7, #4]
8006a84: 681b ldr r3, [r3, #0]
8006a86: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006a8a: b29a uxth r2, r3
8006a8c: 687b ldr r3, [r7, #4]
8006a8e: 681b ldr r3, [r3, #0]
8006a90: f042 0204 orr.w r2, r2, #4
8006a94: b292 uxth r2, r2
8006a96: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8006a9a: 6878 ldr r0, [r7, #4]
8006a9c: f007 faa6 bl 800dfec <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8006aa0: e026 b.n 8006af0 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8006aa2: 69bb ldr r3, [r7, #24]
8006aa4: f403 7300 and.w r3, r3, #512 @ 0x200
8006aa8: 2b00 cmp r3, #0
8006aaa: d00f beq.n 8006acc <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8006aac: 687b ldr r3, [r7, #4]
8006aae: 681b ldr r3, [r3, #0]
8006ab0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006ab4: b29a uxth r2, r3
8006ab6: 687b ldr r3, [r7, #4]
8006ab8: 681b ldr r3, [r3, #0]
8006aba: f422 7200 bic.w r2, r2, #512 @ 0x200
8006abe: b292 uxth r2, r2
8006ac0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8006ac4: 6878 ldr r0, [r7, #4]
8006ac6: f007 fa64 bl 800df92 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8006aca: e011 b.n 8006af0 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8006acc: 69bb ldr r3, [r7, #24]
8006ace: f403 7380 and.w r3, r3, #256 @ 0x100
8006ad2: 2b00 cmp r3, #0
8006ad4: d00c beq.n 8006af0 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8006ad6: 687b ldr r3, [r7, #4]
8006ad8: 681b ldr r3, [r3, #0]
8006ada: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006ade: b29a uxth r2, r3
8006ae0: 687b ldr r3, [r7, #4]
8006ae2: 681b ldr r3, [r3, #0]
8006ae4: f422 7280 bic.w r2, r2, #256 @ 0x100
8006ae8: b292 uxth r2, r2
8006aea: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006aee: bf00 nop
}
}
8006af0: 3720 adds r7, #32
8006af2: 46bd mov sp, r7
8006af4: bd80 pop {r7, pc}
08006af6 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8006af6: b580 push {r7, lr}
8006af8: b082 sub sp, #8
8006afa: af00 add r7, sp, #0
8006afc: 6078 str r0, [r7, #4]
8006afe: 460b mov r3, r1
8006b00: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8006b02: 687b ldr r3, [r7, #4]
8006b04: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006b08: 2b01 cmp r3, #1
8006b0a: d101 bne.n 8006b10 <HAL_PCD_SetAddress+0x1a>
8006b0c: 2302 movs r3, #2
8006b0e: e012 b.n 8006b36 <HAL_PCD_SetAddress+0x40>
8006b10: 687b ldr r3, [r7, #4]
8006b12: 2201 movs r2, #1
8006b14: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8006b18: 687b ldr r3, [r7, #4]
8006b1a: 78fa ldrb r2, [r7, #3]
8006b1c: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8006b1e: 687b ldr r3, [r7, #4]
8006b20: 681b ldr r3, [r3, #0]
8006b22: 78fa ldrb r2, [r7, #3]
8006b24: 4611 mov r1, r2
8006b26: 4618 mov r0, r3
8006b28: f005 fb14 bl 800c154 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8006b2c: 687b ldr r3, [r7, #4]
8006b2e: 2200 movs r2, #0
8006b30: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006b34: 2300 movs r3, #0
}
8006b36: 4618 mov r0, r3
8006b38: 3708 adds r7, #8
8006b3a: 46bd mov sp, r7
8006b3c: bd80 pop {r7, pc}
08006b3e <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8006b3e: b580 push {r7, lr}
8006b40: b084 sub sp, #16
8006b42: af00 add r7, sp, #0
8006b44: 6078 str r0, [r7, #4]
8006b46: 4608 mov r0, r1
8006b48: 4611 mov r1, r2
8006b4a: 461a mov r2, r3
8006b4c: 4603 mov r3, r0
8006b4e: 70fb strb r3, [r7, #3]
8006b50: 460b mov r3, r1
8006b52: 803b strh r3, [r7, #0]
8006b54: 4613 mov r3, r2
8006b56: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8006b58: 2300 movs r3, #0
8006b5a: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006b5c: f997 3003 ldrsb.w r3, [r7, #3]
8006b60: 2b00 cmp r3, #0
8006b62: da0e bge.n 8006b82 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006b64: 78fb ldrb r3, [r7, #3]
8006b66: f003 0207 and.w r2, r3, #7
8006b6a: 4613 mov r3, r2
8006b6c: 009b lsls r3, r3, #2
8006b6e: 4413 add r3, r2
8006b70: 00db lsls r3, r3, #3
8006b72: 3310 adds r3, #16
8006b74: 687a ldr r2, [r7, #4]
8006b76: 4413 add r3, r2
8006b78: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006b7a: 68fb ldr r3, [r7, #12]
8006b7c: 2201 movs r2, #1
8006b7e: 705a strb r2, [r3, #1]
8006b80: e00e b.n 8006ba0 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006b82: 78fb ldrb r3, [r7, #3]
8006b84: f003 0207 and.w r2, r3, #7
8006b88: 4613 mov r3, r2
8006b8a: 009b lsls r3, r3, #2
8006b8c: 4413 add r3, r2
8006b8e: 00db lsls r3, r3, #3
8006b90: f503 73a8 add.w r3, r3, #336 @ 0x150
8006b94: 687a ldr r2, [r7, #4]
8006b96: 4413 add r3, r2
8006b98: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006b9a: 68fb ldr r3, [r7, #12]
8006b9c: 2200 movs r2, #0
8006b9e: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006ba0: 78fb ldrb r3, [r7, #3]
8006ba2: f003 0307 and.w r3, r3, #7
8006ba6: b2da uxtb r2, r3
8006ba8: 68fb ldr r3, [r7, #12]
8006baa: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8006bac: 883a ldrh r2, [r7, #0]
8006bae: 68fb ldr r3, [r7, #12]
8006bb0: 611a str r2, [r3, #16]
ep->type = ep_type;
8006bb2: 68fb ldr r3, [r7, #12]
8006bb4: 78ba ldrb r2, [r7, #2]
8006bb6: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8006bb8: 78bb ldrb r3, [r7, #2]
8006bba: 2b02 cmp r3, #2
8006bbc: d102 bne.n 8006bc4 <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8006bbe: 68fb ldr r3, [r7, #12]
8006bc0: 2200 movs r2, #0
8006bc2: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8006bc4: 687b ldr r3, [r7, #4]
8006bc6: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006bca: 2b01 cmp r3, #1
8006bcc: d101 bne.n 8006bd2 <HAL_PCD_EP_Open+0x94>
8006bce: 2302 movs r3, #2
8006bd0: e00e b.n 8006bf0 <HAL_PCD_EP_Open+0xb2>
8006bd2: 687b ldr r3, [r7, #4]
8006bd4: 2201 movs r2, #1
8006bd6: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8006bda: 687b ldr r3, [r7, #4]
8006bdc: 681b ldr r3, [r3, #0]
8006bde: 68f9 ldr r1, [r7, #12]
8006be0: 4618 mov r0, r3
8006be2: f003 f85d bl 8009ca0 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8006be6: 687b ldr r3, [r7, #4]
8006be8: 2200 movs r2, #0
8006bea: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
8006bee: 7afb ldrb r3, [r7, #11]
}
8006bf0: 4618 mov r0, r3
8006bf2: 3710 adds r7, #16
8006bf4: 46bd mov sp, r7
8006bf6: bd80 pop {r7, pc}
08006bf8 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006bf8: b580 push {r7, lr}
8006bfa: b084 sub sp, #16
8006bfc: af00 add r7, sp, #0
8006bfe: 6078 str r0, [r7, #4]
8006c00: 460b mov r3, r1
8006c02: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006c04: f997 3003 ldrsb.w r3, [r7, #3]
8006c08: 2b00 cmp r3, #0
8006c0a: da0e bge.n 8006c2a <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006c0c: 78fb ldrb r3, [r7, #3]
8006c0e: f003 0207 and.w r2, r3, #7
8006c12: 4613 mov r3, r2
8006c14: 009b lsls r3, r3, #2
8006c16: 4413 add r3, r2
8006c18: 00db lsls r3, r3, #3
8006c1a: 3310 adds r3, #16
8006c1c: 687a ldr r2, [r7, #4]
8006c1e: 4413 add r3, r2
8006c20: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006c22: 68fb ldr r3, [r7, #12]
8006c24: 2201 movs r2, #1
8006c26: 705a strb r2, [r3, #1]
8006c28: e00e b.n 8006c48 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006c2a: 78fb ldrb r3, [r7, #3]
8006c2c: f003 0207 and.w r2, r3, #7
8006c30: 4613 mov r3, r2
8006c32: 009b lsls r3, r3, #2
8006c34: 4413 add r3, r2
8006c36: 00db lsls r3, r3, #3
8006c38: f503 73a8 add.w r3, r3, #336 @ 0x150
8006c3c: 687a ldr r2, [r7, #4]
8006c3e: 4413 add r3, r2
8006c40: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006c42: 68fb ldr r3, [r7, #12]
8006c44: 2200 movs r2, #0
8006c46: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006c48: 78fb ldrb r3, [r7, #3]
8006c4a: f003 0307 and.w r3, r3, #7
8006c4e: b2da uxtb r2, r3
8006c50: 68fb ldr r3, [r7, #12]
8006c52: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006c54: 687b ldr r3, [r7, #4]
8006c56: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006c5a: 2b01 cmp r3, #1
8006c5c: d101 bne.n 8006c62 <HAL_PCD_EP_Close+0x6a>
8006c5e: 2302 movs r3, #2
8006c60: e00e b.n 8006c80 <HAL_PCD_EP_Close+0x88>
8006c62: 687b ldr r3, [r7, #4]
8006c64: 2201 movs r2, #1
8006c66: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8006c6a: 687b ldr r3, [r7, #4]
8006c6c: 681b ldr r3, [r3, #0]
8006c6e: 68f9 ldr r1, [r7, #12]
8006c70: 4618 mov r0, r3
8006c72: f003 fbd5 bl 800a420 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8006c76: 687b ldr r3, [r7, #4]
8006c78: 2200 movs r2, #0
8006c7a: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006c7e: 2300 movs r3, #0
}
8006c80: 4618 mov r0, r3
8006c82: 3710 adds r7, #16
8006c84: 46bd mov sp, r7
8006c86: bd80 pop {r7, pc}
08006c88 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006c88: b580 push {r7, lr}
8006c8a: b086 sub sp, #24
8006c8c: af00 add r7, sp, #0
8006c8e: 60f8 str r0, [r7, #12]
8006c90: 607a str r2, [r7, #4]
8006c92: 603b str r3, [r7, #0]
8006c94: 460b mov r3, r1
8006c96: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006c98: 7afb ldrb r3, [r7, #11]
8006c9a: f003 0207 and.w r2, r3, #7
8006c9e: 4613 mov r3, r2
8006ca0: 009b lsls r3, r3, #2
8006ca2: 4413 add r3, r2
8006ca4: 00db lsls r3, r3, #3
8006ca6: f503 73a8 add.w r3, r3, #336 @ 0x150
8006caa: 68fa ldr r2, [r7, #12]
8006cac: 4413 add r3, r2
8006cae: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006cb0: 697b ldr r3, [r7, #20]
8006cb2: 687a ldr r2, [r7, #4]
8006cb4: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006cb6: 697b ldr r3, [r7, #20]
8006cb8: 683a ldr r2, [r7, #0]
8006cba: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8006cbc: 697b ldr r3, [r7, #20]
8006cbe: 2200 movs r2, #0
8006cc0: 61da str r2, [r3, #28]
ep->is_in = 0U;
8006cc2: 697b ldr r3, [r7, #20]
8006cc4: 2200 movs r2, #0
8006cc6: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006cc8: 7afb ldrb r3, [r7, #11]
8006cca: f003 0307 and.w r3, r3, #7
8006cce: b2da uxtb r2, r3
8006cd0: 697b ldr r3, [r7, #20]
8006cd2: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006cd4: 68fb ldr r3, [r7, #12]
8006cd6: 681b ldr r3, [r3, #0]
8006cd8: 6979 ldr r1, [r7, #20]
8006cda: 4618 mov r0, r3
8006cdc: f003 fd8c bl 800a7f8 <USB_EPStartXfer>
return HAL_OK;
8006ce0: 2300 movs r3, #0
}
8006ce2: 4618 mov r0, r3
8006ce4: 3718 adds r7, #24
8006ce6: 46bd mov sp, r7
8006ce8: bd80 pop {r7, pc}
08006cea <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8006cea: b480 push {r7}
8006cec: b083 sub sp, #12
8006cee: af00 add r7, sp, #0
8006cf0: 6078 str r0, [r7, #4]
8006cf2: 460b mov r3, r1
8006cf4: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8006cf6: 78fb ldrb r3, [r7, #3]
8006cf8: f003 0207 and.w r2, r3, #7
8006cfc: 6879 ldr r1, [r7, #4]
8006cfe: 4613 mov r3, r2
8006d00: 009b lsls r3, r3, #2
8006d02: 4413 add r3, r2
8006d04: 00db lsls r3, r3, #3
8006d06: 440b add r3, r1
8006d08: f503 73b6 add.w r3, r3, #364 @ 0x16c
8006d0c: 681b ldr r3, [r3, #0]
}
8006d0e: 4618 mov r0, r3
8006d10: 370c adds r7, #12
8006d12: 46bd mov sp, r7
8006d14: bc80 pop {r7}
8006d16: 4770 bx lr
08006d18 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006d18: b580 push {r7, lr}
8006d1a: b086 sub sp, #24
8006d1c: af00 add r7, sp, #0
8006d1e: 60f8 str r0, [r7, #12]
8006d20: 607a str r2, [r7, #4]
8006d22: 603b str r3, [r7, #0]
8006d24: 460b mov r3, r1
8006d26: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006d28: 7afb ldrb r3, [r7, #11]
8006d2a: f003 0207 and.w r2, r3, #7
8006d2e: 4613 mov r3, r2
8006d30: 009b lsls r3, r3, #2
8006d32: 4413 add r3, r2
8006d34: 00db lsls r3, r3, #3
8006d36: 3310 adds r3, #16
8006d38: 68fa ldr r2, [r7, #12]
8006d3a: 4413 add r3, r2
8006d3c: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006d3e: 697b ldr r3, [r7, #20]
8006d40: 687a ldr r2, [r7, #4]
8006d42: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006d44: 697b ldr r3, [r7, #20]
8006d46: 683a ldr r2, [r7, #0]
8006d48: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8006d4a: 697b ldr r3, [r7, #20]
8006d4c: 2201 movs r2, #1
8006d4e: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
8006d52: 697b ldr r3, [r7, #20]
8006d54: 683a ldr r2, [r7, #0]
8006d56: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8006d58: 697b ldr r3, [r7, #20]
8006d5a: 2200 movs r2, #0
8006d5c: 61da str r2, [r3, #28]
ep->is_in = 1U;
8006d5e: 697b ldr r3, [r7, #20]
8006d60: 2201 movs r2, #1
8006d62: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006d64: 7afb ldrb r3, [r7, #11]
8006d66: f003 0307 and.w r3, r3, #7
8006d6a: b2da uxtb r2, r3
8006d6c: 697b ldr r3, [r7, #20]
8006d6e: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006d70: 68fb ldr r3, [r7, #12]
8006d72: 681b ldr r3, [r3, #0]
8006d74: 6979 ldr r1, [r7, #20]
8006d76: 4618 mov r0, r3
8006d78: f003 fd3e bl 800a7f8 <USB_EPStartXfer>
return HAL_OK;
8006d7c: 2300 movs r3, #0
}
8006d7e: 4618 mov r0, r3
8006d80: 3718 adds r7, #24
8006d82: 46bd mov sp, r7
8006d84: bd80 pop {r7, pc}
08006d86 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006d86: b580 push {r7, lr}
8006d88: b084 sub sp, #16
8006d8a: af00 add r7, sp, #0
8006d8c: 6078 str r0, [r7, #4]
8006d8e: 460b mov r3, r1
8006d90: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8006d92: 78fb ldrb r3, [r7, #3]
8006d94: f003 0307 and.w r3, r3, #7
8006d98: 687a ldr r2, [r7, #4]
8006d9a: 7912 ldrb r2, [r2, #4]
8006d9c: 4293 cmp r3, r2
8006d9e: d901 bls.n 8006da4 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8006da0: 2301 movs r3, #1
8006da2: e04c b.n 8006e3e <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8006da4: f997 3003 ldrsb.w r3, [r7, #3]
8006da8: 2b00 cmp r3, #0
8006daa: da0e bge.n 8006dca <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006dac: 78fb ldrb r3, [r7, #3]
8006dae: f003 0207 and.w r2, r3, #7
8006db2: 4613 mov r3, r2
8006db4: 009b lsls r3, r3, #2
8006db6: 4413 add r3, r2
8006db8: 00db lsls r3, r3, #3
8006dba: 3310 adds r3, #16
8006dbc: 687a ldr r2, [r7, #4]
8006dbe: 4413 add r3, r2
8006dc0: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006dc2: 68fb ldr r3, [r7, #12]
8006dc4: 2201 movs r2, #1
8006dc6: 705a strb r2, [r3, #1]
8006dc8: e00c b.n 8006de4 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8006dca: 78fa ldrb r2, [r7, #3]
8006dcc: 4613 mov r3, r2
8006dce: 009b lsls r3, r3, #2
8006dd0: 4413 add r3, r2
8006dd2: 00db lsls r3, r3, #3
8006dd4: f503 73a8 add.w r3, r3, #336 @ 0x150
8006dd8: 687a ldr r2, [r7, #4]
8006dda: 4413 add r3, r2
8006ddc: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006dde: 68fb ldr r3, [r7, #12]
8006de0: 2200 movs r2, #0
8006de2: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8006de4: 68fb ldr r3, [r7, #12]
8006de6: 2201 movs r2, #1
8006de8: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006dea: 78fb ldrb r3, [r7, #3]
8006dec: f003 0307 and.w r3, r3, #7
8006df0: b2da uxtb r2, r3
8006df2: 68fb ldr r3, [r7, #12]
8006df4: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006df6: 687b ldr r3, [r7, #4]
8006df8: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006dfc: 2b01 cmp r3, #1
8006dfe: d101 bne.n 8006e04 <HAL_PCD_EP_SetStall+0x7e>
8006e00: 2302 movs r3, #2
8006e02: e01c b.n 8006e3e <HAL_PCD_EP_SetStall+0xb8>
8006e04: 687b ldr r3, [r7, #4]
8006e06: 2201 movs r2, #1
8006e08: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8006e0c: 687b ldr r3, [r7, #4]
8006e0e: 681b ldr r3, [r3, #0]
8006e10: 68f9 ldr r1, [r7, #12]
8006e12: 4618 mov r0, r3
8006e14: f005 f8a1 bl 800bf5a <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8006e18: 78fb ldrb r3, [r7, #3]
8006e1a: f003 0307 and.w r3, r3, #7
8006e1e: 2b00 cmp r3, #0
8006e20: d108 bne.n 8006e34 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8006e22: 687b ldr r3, [r7, #4]
8006e24: 681a ldr r2, [r3, #0]
8006e26: 687b ldr r3, [r7, #4]
8006e28: f503 7326 add.w r3, r3, #664 @ 0x298
8006e2c: 4619 mov r1, r3
8006e2e: 4610 mov r0, r2
8006e30: f005 f9c6 bl 800c1c0 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8006e34: 687b ldr r3, [r7, #4]
8006e36: 2200 movs r2, #0
8006e38: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006e3c: 2300 movs r3, #0
}
8006e3e: 4618 mov r0, r3
8006e40: 3710 adds r7, #16
8006e42: 46bd mov sp, r7
8006e44: bd80 pop {r7, pc}
08006e46 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006e46: b580 push {r7, lr}
8006e48: b084 sub sp, #16
8006e4a: af00 add r7, sp, #0
8006e4c: 6078 str r0, [r7, #4]
8006e4e: 460b mov r3, r1
8006e50: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8006e52: 78fb ldrb r3, [r7, #3]
8006e54: f003 030f and.w r3, r3, #15
8006e58: 687a ldr r2, [r7, #4]
8006e5a: 7912 ldrb r2, [r2, #4]
8006e5c: 4293 cmp r3, r2
8006e5e: d901 bls.n 8006e64 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8006e60: 2301 movs r3, #1
8006e62: e040 b.n 8006ee6 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8006e64: f997 3003 ldrsb.w r3, [r7, #3]
8006e68: 2b00 cmp r3, #0
8006e6a: da0e bge.n 8006e8a <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006e6c: 78fb ldrb r3, [r7, #3]
8006e6e: f003 0207 and.w r2, r3, #7
8006e72: 4613 mov r3, r2
8006e74: 009b lsls r3, r3, #2
8006e76: 4413 add r3, r2
8006e78: 00db lsls r3, r3, #3
8006e7a: 3310 adds r3, #16
8006e7c: 687a ldr r2, [r7, #4]
8006e7e: 4413 add r3, r2
8006e80: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006e82: 68fb ldr r3, [r7, #12]
8006e84: 2201 movs r2, #1
8006e86: 705a strb r2, [r3, #1]
8006e88: e00e b.n 8006ea8 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006e8a: 78fb ldrb r3, [r7, #3]
8006e8c: f003 0207 and.w r2, r3, #7
8006e90: 4613 mov r3, r2
8006e92: 009b lsls r3, r3, #2
8006e94: 4413 add r3, r2
8006e96: 00db lsls r3, r3, #3
8006e98: f503 73a8 add.w r3, r3, #336 @ 0x150
8006e9c: 687a ldr r2, [r7, #4]
8006e9e: 4413 add r3, r2
8006ea0: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006ea2: 68fb ldr r3, [r7, #12]
8006ea4: 2200 movs r2, #0
8006ea6: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8006ea8: 68fb ldr r3, [r7, #12]
8006eaa: 2200 movs r2, #0
8006eac: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006eae: 78fb ldrb r3, [r7, #3]
8006eb0: f003 0307 and.w r3, r3, #7
8006eb4: b2da uxtb r2, r3
8006eb6: 68fb ldr r3, [r7, #12]
8006eb8: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006eba: 687b ldr r3, [r7, #4]
8006ebc: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006ec0: 2b01 cmp r3, #1
8006ec2: d101 bne.n 8006ec8 <HAL_PCD_EP_ClrStall+0x82>
8006ec4: 2302 movs r3, #2
8006ec6: e00e b.n 8006ee6 <HAL_PCD_EP_ClrStall+0xa0>
8006ec8: 687b ldr r3, [r7, #4]
8006eca: 2201 movs r2, #1
8006ecc: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
8006ed0: 687b ldr r3, [r7, #4]
8006ed2: 681b ldr r3, [r3, #0]
8006ed4: 68f9 ldr r1, [r7, #12]
8006ed6: 4618 mov r0, r3
8006ed8: f005 f88f bl 800bffa <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8006edc: 687b ldr r3, [r7, #4]
8006ede: 2200 movs r2, #0
8006ee0: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006ee4: 2300 movs r3, #0
}
8006ee6: 4618 mov r0, r3
8006ee8: 3710 adds r7, #16
8006eea: 46bd mov sp, r7
8006eec: bd80 pop {r7, pc}
08006eee <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
8006eee: b580 push {r7, lr}
8006ef0: b096 sub sp, #88 @ 0x58
8006ef2: af00 add r7, sp, #0
8006ef4: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006ef6: e3bb b.n 8007670 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8006ef8: 687b ldr r3, [r7, #4]
8006efa: 681b ldr r3, [r3, #0]
8006efc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006f00: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8006f04: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006f08: b2db uxtb r3, r3
8006f0a: f003 030f and.w r3, r3, #15
8006f0e: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
8006f12: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006f16: 2b00 cmp r3, #0
8006f18: f040 8175 bne.w 8007206 <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8006f1c: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006f20: f003 0310 and.w r3, r3, #16
8006f24: 2b00 cmp r3, #0
8006f26: d14e bne.n 8006fc6 <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006f28: 687b ldr r3, [r7, #4]
8006f2a: 681b ldr r3, [r3, #0]
8006f2c: 881b ldrh r3, [r3, #0]
8006f2e: b29b uxth r3, r3
8006f30: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8006f34: f023 0370 bic.w r3, r3, #112 @ 0x70
8006f38: 81fb strh r3, [r7, #14]
8006f3a: 687b ldr r3, [r7, #4]
8006f3c: 681a ldr r2, [r3, #0]
8006f3e: 89fb ldrh r3, [r7, #14]
8006f40: ea6f 4343 mvn.w r3, r3, lsl #17
8006f44: ea6f 4353 mvn.w r3, r3, lsr #17
8006f48: b29b uxth r3, r3
8006f4a: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8006f4c: 687b ldr r3, [r7, #4]
8006f4e: 3310 adds r3, #16
8006f50: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8006f52: 687b ldr r3, [r7, #4]
8006f54: 681b ldr r3, [r3, #0]
8006f56: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006f5a: b29b uxth r3, r3
8006f5c: 461a mov r2, r3
8006f5e: 6d7b ldr r3, [r7, #84] @ 0x54
8006f60: 781b ldrb r3, [r3, #0]
8006f62: 00db lsls r3, r3, #3
8006f64: 4413 add r3, r2
8006f66: 3302 adds r3, #2
8006f68: 005b lsls r3, r3, #1
8006f6a: 687a ldr r2, [r7, #4]
8006f6c: 6812 ldr r2, [r2, #0]
8006f6e: 4413 add r3, r2
8006f70: f503 6380 add.w r3, r3, #1024 @ 0x400
8006f74: 881b ldrh r3, [r3, #0]
8006f76: f3c3 0209 ubfx r2, r3, #0, #10
8006f7a: 6d7b ldr r3, [r7, #84] @ 0x54
8006f7c: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
8006f7e: 6d7b ldr r3, [r7, #84] @ 0x54
8006f80: 695a ldr r2, [r3, #20]
8006f82: 6d7b ldr r3, [r7, #84] @ 0x54
8006f84: 69db ldr r3, [r3, #28]
8006f86: 441a add r2, r3
8006f88: 6d7b ldr r3, [r7, #84] @ 0x54
8006f8a: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
8006f8c: 2100 movs r1, #0
8006f8e: 6878 ldr r0, [r7, #4]
8006f90: f006 ffe5 bl 800df5e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
8006f94: 687b ldr r3, [r7, #4]
8006f96: 7b5b ldrb r3, [r3, #13]
8006f98: b2db uxtb r3, r3
8006f9a: 2b00 cmp r3, #0
8006f9c: f000 8368 beq.w 8007670 <PCD_EP_ISR_Handler+0x782>
8006fa0: 6d7b ldr r3, [r7, #84] @ 0x54
8006fa2: 699b ldr r3, [r3, #24]
8006fa4: 2b00 cmp r3, #0
8006fa6: f040 8363 bne.w 8007670 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8006faa: 687b ldr r3, [r7, #4]
8006fac: 7b5b ldrb r3, [r3, #13]
8006fae: b2db uxtb r3, r3
8006fb0: f063 037f orn r3, r3, #127 @ 0x7f
8006fb4: b2da uxtb r2, r3
8006fb6: 687b ldr r3, [r7, #4]
8006fb8: 681b ldr r3, [r3, #0]
8006fba: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
8006fbe: 687b ldr r3, [r7, #4]
8006fc0: 2200 movs r2, #0
8006fc2: 735a strb r2, [r3, #13]
8006fc4: e354 b.n 8007670 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
8006fc6: 687b ldr r3, [r7, #4]
8006fc8: f503 73a8 add.w r3, r3, #336 @ 0x150
8006fcc: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8006fce: 687b ldr r3, [r7, #4]
8006fd0: 681b ldr r3, [r3, #0]
8006fd2: 881b ldrh r3, [r3, #0]
8006fd4: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8006fd8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006fdc: f403 6300 and.w r3, r3, #2048 @ 0x800
8006fe0: 2b00 cmp r3, #0
8006fe2: d034 beq.n 800704e <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006fe4: 687b ldr r3, [r7, #4]
8006fe6: 681b ldr r3, [r3, #0]
8006fe8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006fec: b29b uxth r3, r3
8006fee: 461a mov r2, r3
8006ff0: 6d7b ldr r3, [r7, #84] @ 0x54
8006ff2: 781b ldrb r3, [r3, #0]
8006ff4: 00db lsls r3, r3, #3
8006ff6: 4413 add r3, r2
8006ff8: 3306 adds r3, #6
8006ffa: 005b lsls r3, r3, #1
8006ffc: 687a ldr r2, [r7, #4]
8006ffe: 6812 ldr r2, [r2, #0]
8007000: 4413 add r3, r2
8007002: f503 6380 add.w r3, r3, #1024 @ 0x400
8007006: 881b ldrh r3, [r3, #0]
8007008: f3c3 0209 ubfx r2, r3, #0, #10
800700c: 6d7b ldr r3, [r7, #84] @ 0x54
800700e: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8007010: 687b ldr r3, [r7, #4]
8007012: 6818 ldr r0, [r3, #0]
8007014: 687b ldr r3, [r7, #4]
8007016: f503 7126 add.w r1, r3, #664 @ 0x298
800701a: 6d7b ldr r3, [r7, #84] @ 0x54
800701c: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
800701e: 6d7b ldr r3, [r7, #84] @ 0x54
8007020: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8007022: b29b uxth r3, r3
8007024: f005 f91d bl 800c262 <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8007028: 687b ldr r3, [r7, #4]
800702a: 681b ldr r3, [r3, #0]
800702c: 881b ldrh r3, [r3, #0]
800702e: b29a uxth r2, r3
8007030: f640 738f movw r3, #3983 @ 0xf8f
8007034: 4013 ands r3, r2
8007036: 823b strh r3, [r7, #16]
8007038: 687b ldr r3, [r7, #4]
800703a: 681b ldr r3, [r3, #0]
800703c: 8a3a ldrh r2, [r7, #16]
800703e: f042 0280 orr.w r2, r2, #128 @ 0x80
8007042: b292 uxth r2, r2
8007044: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8007046: 6878 ldr r0, [r7, #4]
8007048: f006 ff5c bl 800df04 <HAL_PCD_SetupStageCallback>
800704c: e310 b.n 8007670 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
800704e: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8007052: 2b00 cmp r3, #0
8007054: f280 830c bge.w 8007670 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8007058: 687b ldr r3, [r7, #4]
800705a: 681b ldr r3, [r3, #0]
800705c: 881b ldrh r3, [r3, #0]
800705e: b29a uxth r2, r3
8007060: f640 738f movw r3, #3983 @ 0xf8f
8007064: 4013 ands r3, r2
8007066: 83fb strh r3, [r7, #30]
8007068: 687b ldr r3, [r7, #4]
800706a: 681b ldr r3, [r3, #0]
800706c: 8bfa ldrh r2, [r7, #30]
800706e: f042 0280 orr.w r2, r2, #128 @ 0x80
8007072: b292 uxth r2, r2
8007074: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8007076: 687b ldr r3, [r7, #4]
8007078: 681b ldr r3, [r3, #0]
800707a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800707e: b29b uxth r3, r3
8007080: 461a mov r2, r3
8007082: 6d7b ldr r3, [r7, #84] @ 0x54
8007084: 781b ldrb r3, [r3, #0]
8007086: 00db lsls r3, r3, #3
8007088: 4413 add r3, r2
800708a: 3306 adds r3, #6
800708c: 005b lsls r3, r3, #1
800708e: 687a ldr r2, [r7, #4]
8007090: 6812 ldr r2, [r2, #0]
8007092: 4413 add r3, r2
8007094: f503 6380 add.w r3, r3, #1024 @ 0x400
8007098: 881b ldrh r3, [r3, #0]
800709a: f3c3 0209 ubfx r2, r3, #0, #10
800709e: 6d7b ldr r3, [r7, #84] @ 0x54
80070a0: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
80070a2: 6d7b ldr r3, [r7, #84] @ 0x54
80070a4: 69db ldr r3, [r3, #28]
80070a6: 2b00 cmp r3, #0
80070a8: d019 beq.n 80070de <PCD_EP_ISR_Handler+0x1f0>
80070aa: 6d7b ldr r3, [r7, #84] @ 0x54
80070ac: 695b ldr r3, [r3, #20]
80070ae: 2b00 cmp r3, #0
80070b0: d015 beq.n 80070de <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80070b2: 687b ldr r3, [r7, #4]
80070b4: 6818 ldr r0, [r3, #0]
80070b6: 6d7b ldr r3, [r7, #84] @ 0x54
80070b8: 6959 ldr r1, [r3, #20]
80070ba: 6d7b ldr r3, [r7, #84] @ 0x54
80070bc: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80070be: 6d7b ldr r3, [r7, #84] @ 0x54
80070c0: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80070c2: b29b uxth r3, r3
80070c4: f005 f8cd bl 800c262 <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
80070c8: 6d7b ldr r3, [r7, #84] @ 0x54
80070ca: 695a ldr r2, [r3, #20]
80070cc: 6d7b ldr r3, [r7, #84] @ 0x54
80070ce: 69db ldr r3, [r3, #28]
80070d0: 441a add r2, r3
80070d2: 6d7b ldr r3, [r7, #84] @ 0x54
80070d4: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
80070d6: 2100 movs r1, #0
80070d8: 6878 ldr r0, [r7, #4]
80070da: f006 ff25 bl 800df28 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80070de: 687b ldr r3, [r7, #4]
80070e0: 681b ldr r3, [r3, #0]
80070e2: 881b ldrh r3, [r3, #0]
80070e4: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
80070e8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80070ec: f403 6300 and.w r3, r3, #2048 @ 0x800
80070f0: 2b00 cmp r3, #0
80070f2: f040 82bd bne.w 8007670 <PCD_EP_ISR_Handler+0x782>
80070f6: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80070fa: f403 5340 and.w r3, r3, #12288 @ 0x3000
80070fe: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
8007102: f000 82b5 beq.w 8007670 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
8007106: 687b ldr r3, [r7, #4]
8007108: 681b ldr r3, [r3, #0]
800710a: 61bb str r3, [r7, #24]
800710c: 687b ldr r3, [r7, #4]
800710e: 681b ldr r3, [r3, #0]
8007110: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007114: b29b uxth r3, r3
8007116: 461a mov r2, r3
8007118: 69bb ldr r3, [r7, #24]
800711a: 4413 add r3, r2
800711c: 61bb str r3, [r7, #24]
800711e: 69bb ldr r3, [r7, #24]
8007120: f203 430c addw r3, r3, #1036 @ 0x40c
8007124: 617b str r3, [r7, #20]
8007126: 697b ldr r3, [r7, #20]
8007128: 881b ldrh r3, [r3, #0]
800712a: b29b uxth r3, r3
800712c: f3c3 0309 ubfx r3, r3, #0, #10
8007130: b29a uxth r2, r3
8007132: 697b ldr r3, [r7, #20]
8007134: 801a strh r2, [r3, #0]
8007136: 6d7b ldr r3, [r7, #84] @ 0x54
8007138: 691b ldr r3, [r3, #16]
800713a: 2b3e cmp r3, #62 @ 0x3e
800713c: d91d bls.n 800717a <PCD_EP_ISR_Handler+0x28c>
800713e: 6d7b ldr r3, [r7, #84] @ 0x54
8007140: 691b ldr r3, [r3, #16]
8007142: 095b lsrs r3, r3, #5
8007144: 647b str r3, [r7, #68] @ 0x44
8007146: 6d7b ldr r3, [r7, #84] @ 0x54
8007148: 691b ldr r3, [r3, #16]
800714a: f003 031f and.w r3, r3, #31
800714e: 2b00 cmp r3, #0
8007150: d102 bne.n 8007158 <PCD_EP_ISR_Handler+0x26a>
8007152: 6c7b ldr r3, [r7, #68] @ 0x44
8007154: 3b01 subs r3, #1
8007156: 647b str r3, [r7, #68] @ 0x44
8007158: 697b ldr r3, [r7, #20]
800715a: 881b ldrh r3, [r3, #0]
800715c: b29a uxth r2, r3
800715e: 6c7b ldr r3, [r7, #68] @ 0x44
8007160: b29b uxth r3, r3
8007162: 029b lsls r3, r3, #10
8007164: b29b uxth r3, r3
8007166: 4313 orrs r3, r2
8007168: b29b uxth r3, r3
800716a: ea6f 4343 mvn.w r3, r3, lsl #17
800716e: ea6f 4353 mvn.w r3, r3, lsr #17
8007172: b29a uxth r2, r3
8007174: 697b ldr r3, [r7, #20]
8007176: 801a strh r2, [r3, #0]
8007178: e026 b.n 80071c8 <PCD_EP_ISR_Handler+0x2da>
800717a: 6d7b ldr r3, [r7, #84] @ 0x54
800717c: 691b ldr r3, [r3, #16]
800717e: 2b00 cmp r3, #0
8007180: d10a bne.n 8007198 <PCD_EP_ISR_Handler+0x2aa>
8007182: 697b ldr r3, [r7, #20]
8007184: 881b ldrh r3, [r3, #0]
8007186: b29b uxth r3, r3
8007188: ea6f 4343 mvn.w r3, r3, lsl #17
800718c: ea6f 4353 mvn.w r3, r3, lsr #17
8007190: b29a uxth r2, r3
8007192: 697b ldr r3, [r7, #20]
8007194: 801a strh r2, [r3, #0]
8007196: e017 b.n 80071c8 <PCD_EP_ISR_Handler+0x2da>
8007198: 6d7b ldr r3, [r7, #84] @ 0x54
800719a: 691b ldr r3, [r3, #16]
800719c: 085b lsrs r3, r3, #1
800719e: 647b str r3, [r7, #68] @ 0x44
80071a0: 6d7b ldr r3, [r7, #84] @ 0x54
80071a2: 691b ldr r3, [r3, #16]
80071a4: f003 0301 and.w r3, r3, #1
80071a8: 2b00 cmp r3, #0
80071aa: d002 beq.n 80071b2 <PCD_EP_ISR_Handler+0x2c4>
80071ac: 6c7b ldr r3, [r7, #68] @ 0x44
80071ae: 3301 adds r3, #1
80071b0: 647b str r3, [r7, #68] @ 0x44
80071b2: 697b ldr r3, [r7, #20]
80071b4: 881b ldrh r3, [r3, #0]
80071b6: b29a uxth r2, r3
80071b8: 6c7b ldr r3, [r7, #68] @ 0x44
80071ba: b29b uxth r3, r3
80071bc: 029b lsls r3, r3, #10
80071be: b29b uxth r3, r3
80071c0: 4313 orrs r3, r2
80071c2: b29a uxth r2, r3
80071c4: 697b ldr r3, [r7, #20]
80071c6: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
80071c8: 687b ldr r3, [r7, #4]
80071ca: 681b ldr r3, [r3, #0]
80071cc: 881b ldrh r3, [r3, #0]
80071ce: b29b uxth r3, r3
80071d0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80071d4: f023 0370 bic.w r3, r3, #112 @ 0x70
80071d8: 827b strh r3, [r7, #18]
80071da: 8a7b ldrh r3, [r7, #18]
80071dc: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80071e0: 827b strh r3, [r7, #18]
80071e2: 8a7b ldrh r3, [r7, #18]
80071e4: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80071e8: 827b strh r3, [r7, #18]
80071ea: 687b ldr r3, [r7, #4]
80071ec: 681a ldr r2, [r3, #0]
80071ee: 8a7b ldrh r3, [r7, #18]
80071f0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80071f4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80071f8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80071fc: f043 0380 orr.w r3, r3, #128 @ 0x80
8007200: b29b uxth r3, r3
8007202: 8013 strh r3, [r2, #0]
8007204: e234 b.n 8007670 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
8007206: 687b ldr r3, [r7, #4]
8007208: 681b ldr r3, [r3, #0]
800720a: 461a mov r2, r3
800720c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8007210: 009b lsls r3, r3, #2
8007212: 4413 add r3, r2
8007214: 881b ldrh r3, [r3, #0]
8007216: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
800721a: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
800721e: 2b00 cmp r3, #0
8007220: f280 80fc bge.w 800741c <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
8007224: 687b ldr r3, [r7, #4]
8007226: 681b ldr r3, [r3, #0]
8007228: 461a mov r2, r3
800722a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800722e: 009b lsls r3, r3, #2
8007230: 4413 add r3, r2
8007232: 881b ldrh r3, [r3, #0]
8007234: b29a uxth r2, r3
8007236: f640 738f movw r3, #3983 @ 0xf8f
800723a: 4013 ands r3, r2
800723c: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8007240: 687b ldr r3, [r7, #4]
8007242: 681b ldr r3, [r3, #0]
8007244: 461a mov r2, r3
8007246: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800724a: 009b lsls r3, r3, #2
800724c: 4413 add r3, r2
800724e: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
8007252: f042 0280 orr.w r2, r2, #128 @ 0x80
8007256: b292 uxth r2, r2
8007258: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
800725a: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
800725e: 4613 mov r3, r2
8007260: 009b lsls r3, r3, #2
8007262: 4413 add r3, r2
8007264: 00db lsls r3, r3, #3
8007266: f503 73a8 add.w r3, r3, #336 @ 0x150
800726a: 687a ldr r2, [r7, #4]
800726c: 4413 add r3, r2
800726e: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8007270: 6d7b ldr r3, [r7, #84] @ 0x54
8007272: 7b1b ldrb r3, [r3, #12]
8007274: 2b00 cmp r3, #0
8007276: d125 bne.n 80072c4 <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8007278: 687b ldr r3, [r7, #4]
800727a: 681b ldr r3, [r3, #0]
800727c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007280: b29b uxth r3, r3
8007282: 461a mov r2, r3
8007284: 6d7b ldr r3, [r7, #84] @ 0x54
8007286: 781b ldrb r3, [r3, #0]
8007288: 00db lsls r3, r3, #3
800728a: 4413 add r3, r2
800728c: 3306 adds r3, #6
800728e: 005b lsls r3, r3, #1
8007290: 687a ldr r2, [r7, #4]
8007292: 6812 ldr r2, [r2, #0]
8007294: 4413 add r3, r2
8007296: f503 6380 add.w r3, r3, #1024 @ 0x400
800729a: 881b ldrh r3, [r3, #0]
800729c: f3c3 0309 ubfx r3, r3, #0, #10
80072a0: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80072a4: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80072a8: 2b00 cmp r3, #0
80072aa: f000 8092 beq.w 80073d2 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
80072ae: 687b ldr r3, [r7, #4]
80072b0: 6818 ldr r0, [r3, #0]
80072b2: 6d7b ldr r3, [r7, #84] @ 0x54
80072b4: 6959 ldr r1, [r3, #20]
80072b6: 6d7b ldr r3, [r7, #84] @ 0x54
80072b8: 88da ldrh r2, [r3, #6]
80072ba: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80072be: f004 ffd0 bl 800c262 <USB_ReadPMA>
80072c2: e086 b.n 80073d2 <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
80072c4: 6d7b ldr r3, [r7, #84] @ 0x54
80072c6: 78db ldrb r3, [r3, #3]
80072c8: 2b02 cmp r3, #2
80072ca: d10a bne.n 80072e2 <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
80072cc: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80072d0: 461a mov r2, r3
80072d2: 6d79 ldr r1, [r7, #84] @ 0x54
80072d4: 6878 ldr r0, [r7, #4]
80072d6: f000 f9d9 bl 800768c <HAL_PCD_EP_DB_Receive>
80072da: 4603 mov r3, r0
80072dc: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
80072e0: e077 b.n 80073d2 <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80072e2: 687b ldr r3, [r7, #4]
80072e4: 681b ldr r3, [r3, #0]
80072e6: 461a mov r2, r3
80072e8: 6d7b ldr r3, [r7, #84] @ 0x54
80072ea: 781b ldrb r3, [r3, #0]
80072ec: 009b lsls r3, r3, #2
80072ee: 4413 add r3, r2
80072f0: 881b ldrh r3, [r3, #0]
80072f2: b29b uxth r3, r3
80072f4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80072f8: f023 0370 bic.w r3, r3, #112 @ 0x70
80072fc: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8007300: 687b ldr r3, [r7, #4]
8007302: 681b ldr r3, [r3, #0]
8007304: 461a mov r2, r3
8007306: 6d7b ldr r3, [r7, #84] @ 0x54
8007308: 781b ldrb r3, [r3, #0]
800730a: 009b lsls r3, r3, #2
800730c: 441a add r2, r3
800730e: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
8007312: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007316: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800731a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800731e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007322: b29b uxth r3, r3
8007324: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
8007326: 687b ldr r3, [r7, #4]
8007328: 681b ldr r3, [r3, #0]
800732a: 461a mov r2, r3
800732c: 6d7b ldr r3, [r7, #84] @ 0x54
800732e: 781b ldrb r3, [r3, #0]
8007330: 009b lsls r3, r3, #2
8007332: 4413 add r3, r2
8007334: 881b ldrh r3, [r3, #0]
8007336: b29b uxth r3, r3
8007338: f403 4380 and.w r3, r3, #16384 @ 0x4000
800733c: 2b00 cmp r3, #0
800733e: d024 beq.n 800738a <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8007340: 687b ldr r3, [r7, #4]
8007342: 681b ldr r3, [r3, #0]
8007344: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007348: b29b uxth r3, r3
800734a: 461a mov r2, r3
800734c: 6d7b ldr r3, [r7, #84] @ 0x54
800734e: 781b ldrb r3, [r3, #0]
8007350: 00db lsls r3, r3, #3
8007352: 4413 add r3, r2
8007354: 3302 adds r3, #2
8007356: 005b lsls r3, r3, #1
8007358: 687a ldr r2, [r7, #4]
800735a: 6812 ldr r2, [r2, #0]
800735c: 4413 add r3, r2
800735e: f503 6380 add.w r3, r3, #1024 @ 0x400
8007362: 881b ldrh r3, [r3, #0]
8007364: f3c3 0309 ubfx r3, r3, #0, #10
8007368: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800736c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007370: 2b00 cmp r3, #0
8007372: d02e beq.n 80073d2 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8007374: 687b ldr r3, [r7, #4]
8007376: 6818 ldr r0, [r3, #0]
8007378: 6d7b ldr r3, [r7, #84] @ 0x54
800737a: 6959 ldr r1, [r3, #20]
800737c: 6d7b ldr r3, [r7, #84] @ 0x54
800737e: 891a ldrh r2, [r3, #8]
8007380: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007384: f004 ff6d bl 800c262 <USB_ReadPMA>
8007388: e023 b.n 80073d2 <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800738a: 687b ldr r3, [r7, #4]
800738c: 681b ldr r3, [r3, #0]
800738e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007392: b29b uxth r3, r3
8007394: 461a mov r2, r3
8007396: 6d7b ldr r3, [r7, #84] @ 0x54
8007398: 781b ldrb r3, [r3, #0]
800739a: 00db lsls r3, r3, #3
800739c: 4413 add r3, r2
800739e: 3306 adds r3, #6
80073a0: 005b lsls r3, r3, #1
80073a2: 687a ldr r2, [r7, #4]
80073a4: 6812 ldr r2, [r2, #0]
80073a6: 4413 add r3, r2
80073a8: f503 6380 add.w r3, r3, #1024 @ 0x400
80073ac: 881b ldrh r3, [r3, #0]
80073ae: f3c3 0309 ubfx r3, r3, #0, #10
80073b2: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80073b6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80073ba: 2b00 cmp r3, #0
80073bc: d009 beq.n 80073d2 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
80073be: 687b ldr r3, [r7, #4]
80073c0: 6818 ldr r0, [r3, #0]
80073c2: 6d7b ldr r3, [r7, #84] @ 0x54
80073c4: 6959 ldr r1, [r3, #20]
80073c6: 6d7b ldr r3, [r7, #84] @ 0x54
80073c8: 895a ldrh r2, [r3, #10]
80073ca: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80073ce: f004 ff48 bl 800c262 <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
80073d2: 6d7b ldr r3, [r7, #84] @ 0x54
80073d4: 69da ldr r2, [r3, #28]
80073d6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80073da: 441a add r2, r3
80073dc: 6d7b ldr r3, [r7, #84] @ 0x54
80073de: 61da str r2, [r3, #28]
ep->xfer_buff += count;
80073e0: 6d7b ldr r3, [r7, #84] @ 0x54
80073e2: 695a ldr r2, [r3, #20]
80073e4: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80073e8: 441a add r2, r3
80073ea: 6d7b ldr r3, [r7, #84] @ 0x54
80073ec: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
80073ee: 6d7b ldr r3, [r7, #84] @ 0x54
80073f0: 699b ldr r3, [r3, #24]
80073f2: 2b00 cmp r3, #0
80073f4: d005 beq.n 8007402 <PCD_EP_ISR_Handler+0x514>
80073f6: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
80073fa: 6d7b ldr r3, [r7, #84] @ 0x54
80073fc: 691b ldr r3, [r3, #16]
80073fe: 429a cmp r2, r3
8007400: d206 bcs.n 8007410 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8007402: 6d7b ldr r3, [r7, #84] @ 0x54
8007404: 781b ldrb r3, [r3, #0]
8007406: 4619 mov r1, r3
8007408: 6878 ldr r0, [r7, #4]
800740a: f006 fd8d bl 800df28 <HAL_PCD_DataOutStageCallback>
800740e: e005 b.n 800741c <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8007410: 687b ldr r3, [r7, #4]
8007412: 681b ldr r3, [r3, #0]
8007414: 6d79 ldr r1, [r7, #84] @ 0x54
8007416: 4618 mov r0, r3
8007418: f003 f9ee bl 800a7f8 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
800741c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007420: f003 0380 and.w r3, r3, #128 @ 0x80
8007424: 2b00 cmp r3, #0
8007426: f000 8123 beq.w 8007670 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
800742a: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
800742e: 4613 mov r3, r2
8007430: 009b lsls r3, r3, #2
8007432: 4413 add r3, r2
8007434: 00db lsls r3, r3, #3
8007436: 3310 adds r3, #16
8007438: 687a ldr r2, [r7, #4]
800743a: 4413 add r3, r2
800743c: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
800743e: 687b ldr r3, [r7, #4]
8007440: 681b ldr r3, [r3, #0]
8007442: 461a mov r2, r3
8007444: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8007448: 009b lsls r3, r3, #2
800744a: 4413 add r3, r2
800744c: 881b ldrh r3, [r3, #0]
800744e: b29b uxth r3, r3
8007450: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8007454: f023 0370 bic.w r3, r3, #112 @ 0x70
8007458: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
800745c: 687b ldr r3, [r7, #4]
800745e: 681b ldr r3, [r3, #0]
8007460: 461a mov r2, r3
8007462: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8007466: 009b lsls r3, r3, #2
8007468: 441a add r2, r3
800746a: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
800746e: ea6f 4343 mvn.w r3, r3, lsl #17
8007472: ea6f 4353 mvn.w r3, r3, lsr #17
8007476: b29b uxth r3, r3
8007478: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
800747a: 6d7b ldr r3, [r7, #84] @ 0x54
800747c: 78db ldrb r3, [r3, #3]
800747e: 2b01 cmp r3, #1
8007480: f040 80a2 bne.w 80075c8 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
8007484: 6d7b ldr r3, [r7, #84] @ 0x54
8007486: 2200 movs r2, #0
8007488: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
800748a: 6d7b ldr r3, [r7, #84] @ 0x54
800748c: 7b1b ldrb r3, [r3, #12]
800748e: 2b00 cmp r3, #0
8007490: f000 8093 beq.w 80075ba <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8007494: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007498: f003 0340 and.w r3, r3, #64 @ 0x40
800749c: 2b00 cmp r3, #0
800749e: d046 beq.n 800752e <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80074a0: 6d7b ldr r3, [r7, #84] @ 0x54
80074a2: 785b ldrb r3, [r3, #1]
80074a4: 2b00 cmp r3, #0
80074a6: d126 bne.n 80074f6 <PCD_EP_ISR_Handler+0x608>
80074a8: 687b ldr r3, [r7, #4]
80074aa: 681b ldr r3, [r3, #0]
80074ac: 627b str r3, [r7, #36] @ 0x24
80074ae: 687b ldr r3, [r7, #4]
80074b0: 681b ldr r3, [r3, #0]
80074b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80074b6: b29b uxth r3, r3
80074b8: 461a mov r2, r3
80074ba: 6a7b ldr r3, [r7, #36] @ 0x24
80074bc: 4413 add r3, r2
80074be: 627b str r3, [r7, #36] @ 0x24
80074c0: 6d7b ldr r3, [r7, #84] @ 0x54
80074c2: 781b ldrb r3, [r3, #0]
80074c4: 011a lsls r2, r3, #4
80074c6: 6a7b ldr r3, [r7, #36] @ 0x24
80074c8: 4413 add r3, r2
80074ca: f203 4304 addw r3, r3, #1028 @ 0x404
80074ce: 623b str r3, [r7, #32]
80074d0: 6a3b ldr r3, [r7, #32]
80074d2: 881b ldrh r3, [r3, #0]
80074d4: b29b uxth r3, r3
80074d6: f3c3 0309 ubfx r3, r3, #0, #10
80074da: b29a uxth r2, r3
80074dc: 6a3b ldr r3, [r7, #32]
80074de: 801a strh r2, [r3, #0]
80074e0: 6a3b ldr r3, [r7, #32]
80074e2: 881b ldrh r3, [r3, #0]
80074e4: b29b uxth r3, r3
80074e6: ea6f 4343 mvn.w r3, r3, lsl #17
80074ea: ea6f 4353 mvn.w r3, r3, lsr #17
80074ee: b29a uxth r2, r3
80074f0: 6a3b ldr r3, [r7, #32]
80074f2: 801a strh r2, [r3, #0]
80074f4: e061 b.n 80075ba <PCD_EP_ISR_Handler+0x6cc>
80074f6: 6d7b ldr r3, [r7, #84] @ 0x54
80074f8: 785b ldrb r3, [r3, #1]
80074fa: 2b01 cmp r3, #1
80074fc: d15d bne.n 80075ba <PCD_EP_ISR_Handler+0x6cc>
80074fe: 687b ldr r3, [r7, #4]
8007500: 681b ldr r3, [r3, #0]
8007502: 62fb str r3, [r7, #44] @ 0x2c
8007504: 687b ldr r3, [r7, #4]
8007506: 681b ldr r3, [r3, #0]
8007508: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800750c: b29b uxth r3, r3
800750e: 461a mov r2, r3
8007510: 6afb ldr r3, [r7, #44] @ 0x2c
8007512: 4413 add r3, r2
8007514: 62fb str r3, [r7, #44] @ 0x2c
8007516: 6d7b ldr r3, [r7, #84] @ 0x54
8007518: 781b ldrb r3, [r3, #0]
800751a: 011a lsls r2, r3, #4
800751c: 6afb ldr r3, [r7, #44] @ 0x2c
800751e: 4413 add r3, r2
8007520: f203 4304 addw r3, r3, #1028 @ 0x404
8007524: 62bb str r3, [r7, #40] @ 0x28
8007526: 6abb ldr r3, [r7, #40] @ 0x28
8007528: 2200 movs r2, #0
800752a: 801a strh r2, [r3, #0]
800752c: e045 b.n 80075ba <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800752e: 687b ldr r3, [r7, #4]
8007530: 681b ldr r3, [r3, #0]
8007532: 63fb str r3, [r7, #60] @ 0x3c
8007534: 6d7b ldr r3, [r7, #84] @ 0x54
8007536: 785b ldrb r3, [r3, #1]
8007538: 2b00 cmp r3, #0
800753a: d126 bne.n 800758a <PCD_EP_ISR_Handler+0x69c>
800753c: 687b ldr r3, [r7, #4]
800753e: 681b ldr r3, [r3, #0]
8007540: 637b str r3, [r7, #52] @ 0x34
8007542: 687b ldr r3, [r7, #4]
8007544: 681b ldr r3, [r3, #0]
8007546: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800754a: b29b uxth r3, r3
800754c: 461a mov r2, r3
800754e: 6b7b ldr r3, [r7, #52] @ 0x34
8007550: 4413 add r3, r2
8007552: 637b str r3, [r7, #52] @ 0x34
8007554: 6d7b ldr r3, [r7, #84] @ 0x54
8007556: 781b ldrb r3, [r3, #0]
8007558: 011a lsls r2, r3, #4
800755a: 6b7b ldr r3, [r7, #52] @ 0x34
800755c: 4413 add r3, r2
800755e: f203 430c addw r3, r3, #1036 @ 0x40c
8007562: 633b str r3, [r7, #48] @ 0x30
8007564: 6b3b ldr r3, [r7, #48] @ 0x30
8007566: 881b ldrh r3, [r3, #0]
8007568: b29b uxth r3, r3
800756a: f3c3 0309 ubfx r3, r3, #0, #10
800756e: b29a uxth r2, r3
8007570: 6b3b ldr r3, [r7, #48] @ 0x30
8007572: 801a strh r2, [r3, #0]
8007574: 6b3b ldr r3, [r7, #48] @ 0x30
8007576: 881b ldrh r3, [r3, #0]
8007578: b29b uxth r3, r3
800757a: ea6f 4343 mvn.w r3, r3, lsl #17
800757e: ea6f 4353 mvn.w r3, r3, lsr #17
8007582: b29a uxth r2, r3
8007584: 6b3b ldr r3, [r7, #48] @ 0x30
8007586: 801a strh r2, [r3, #0]
8007588: e017 b.n 80075ba <PCD_EP_ISR_Handler+0x6cc>
800758a: 6d7b ldr r3, [r7, #84] @ 0x54
800758c: 785b ldrb r3, [r3, #1]
800758e: 2b01 cmp r3, #1
8007590: d113 bne.n 80075ba <PCD_EP_ISR_Handler+0x6cc>
8007592: 687b ldr r3, [r7, #4]
8007594: 681b ldr r3, [r3, #0]
8007596: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800759a: b29b uxth r3, r3
800759c: 461a mov r2, r3
800759e: 6bfb ldr r3, [r7, #60] @ 0x3c
80075a0: 4413 add r3, r2
80075a2: 63fb str r3, [r7, #60] @ 0x3c
80075a4: 6d7b ldr r3, [r7, #84] @ 0x54
80075a6: 781b ldrb r3, [r3, #0]
80075a8: 011a lsls r2, r3, #4
80075aa: 6bfb ldr r3, [r7, #60] @ 0x3c
80075ac: 4413 add r3, r2
80075ae: f203 430c addw r3, r3, #1036 @ 0x40c
80075b2: 63bb str r3, [r7, #56] @ 0x38
80075b4: 6bbb ldr r3, [r7, #56] @ 0x38
80075b6: 2200 movs r2, #0
80075b8: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80075ba: 6d7b ldr r3, [r7, #84] @ 0x54
80075bc: 781b ldrb r3, [r3, #0]
80075be: 4619 mov r1, r3
80075c0: 6878 ldr r0, [r7, #4]
80075c2: f006 fccc bl 800df5e <HAL_PCD_DataInStageCallback>
80075c6: e053 b.n 8007670 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
80075c8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80075cc: f403 7380 and.w r3, r3, #256 @ 0x100
80075d0: 2b00 cmp r3, #0
80075d2: d146 bne.n 8007662 <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80075d4: 687b ldr r3, [r7, #4]
80075d6: 681b ldr r3, [r3, #0]
80075d8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80075dc: b29b uxth r3, r3
80075de: 461a mov r2, r3
80075e0: 6d7b ldr r3, [r7, #84] @ 0x54
80075e2: 781b ldrb r3, [r3, #0]
80075e4: 00db lsls r3, r3, #3
80075e6: 4413 add r3, r2
80075e8: 3302 adds r3, #2
80075ea: 005b lsls r3, r3, #1
80075ec: 687a ldr r2, [r7, #4]
80075ee: 6812 ldr r2, [r2, #0]
80075f0: 4413 add r3, r2
80075f2: f503 6380 add.w r3, r3, #1024 @ 0x400
80075f6: 881b ldrh r3, [r3, #0]
80075f8: f3c3 0309 ubfx r3, r3, #0, #10
80075fc: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8007600: 6d7b ldr r3, [r7, #84] @ 0x54
8007602: 699a ldr r2, [r3, #24]
8007604: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8007608: 429a cmp r2, r3
800760a: d907 bls.n 800761c <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
800760c: 6d7b ldr r3, [r7, #84] @ 0x54
800760e: 699a ldr r2, [r3, #24]
8007610: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8007614: 1ad2 subs r2, r2, r3
8007616: 6d7b ldr r3, [r7, #84] @ 0x54
8007618: 619a str r2, [r3, #24]
800761a: e002 b.n 8007622 <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
800761c: 6d7b ldr r3, [r7, #84] @ 0x54
800761e: 2200 movs r2, #0
8007620: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8007622: 6d7b ldr r3, [r7, #84] @ 0x54
8007624: 699b ldr r3, [r3, #24]
8007626: 2b00 cmp r3, #0
8007628: d106 bne.n 8007638 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
800762a: 6d7b ldr r3, [r7, #84] @ 0x54
800762c: 781b ldrb r3, [r3, #0]
800762e: 4619 mov r1, r3
8007630: 6878 ldr r0, [r7, #4]
8007632: f006 fc94 bl 800df5e <HAL_PCD_DataInStageCallback>
8007636: e01b b.n 8007670 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
8007638: 6d7b ldr r3, [r7, #84] @ 0x54
800763a: 695a ldr r2, [r3, #20]
800763c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8007640: 441a add r2, r3
8007642: 6d7b ldr r3, [r7, #84] @ 0x54
8007644: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007646: 6d7b ldr r3, [r7, #84] @ 0x54
8007648: 69da ldr r2, [r3, #28]
800764a: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800764e: 441a add r2, r3
8007650: 6d7b ldr r3, [r7, #84] @ 0x54
8007652: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8007654: 687b ldr r3, [r7, #4]
8007656: 681b ldr r3, [r3, #0]
8007658: 6d79 ldr r1, [r7, #84] @ 0x54
800765a: 4618 mov r0, r3
800765c: f003 f8cc bl 800a7f8 <USB_EPStartXfer>
8007660: e006 b.n 8007670 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8007662: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007666: 461a mov r2, r3
8007668: 6d79 ldr r1, [r7, #84] @ 0x54
800766a: 6878 ldr r0, [r7, #4]
800766c: f000 f91b bl 80078a6 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8007670: 687b ldr r3, [r7, #4]
8007672: 681b ldr r3, [r3, #0]
8007674: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8007678: b29b uxth r3, r3
800767a: b21b sxth r3, r3
800767c: 2b00 cmp r3, #0
800767e: f6ff ac3b blt.w 8006ef8 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8007682: 2300 movs r3, #0
}
8007684: 4618 mov r0, r3
8007686: 3758 adds r7, #88 @ 0x58
8007688: 46bd mov sp, r7
800768a: bd80 pop {r7, pc}
0800768c <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
800768c: b580 push {r7, lr}
800768e: b088 sub sp, #32
8007690: af00 add r7, sp, #0
8007692: 60f8 str r0, [r7, #12]
8007694: 60b9 str r1, [r7, #8]
8007696: 4613 mov r3, r2
8007698: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800769a: 88fb ldrh r3, [r7, #6]
800769c: f403 4380 and.w r3, r3, #16384 @ 0x4000
80076a0: 2b00 cmp r3, #0
80076a2: d07e beq.n 80077a2 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80076a4: 68fb ldr r3, [r7, #12]
80076a6: 681b ldr r3, [r3, #0]
80076a8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80076ac: b29b uxth r3, r3
80076ae: 461a mov r2, r3
80076b0: 68bb ldr r3, [r7, #8]
80076b2: 781b ldrb r3, [r3, #0]
80076b4: 00db lsls r3, r3, #3
80076b6: 4413 add r3, r2
80076b8: 3302 adds r3, #2
80076ba: 005b lsls r3, r3, #1
80076bc: 68fa ldr r2, [r7, #12]
80076be: 6812 ldr r2, [r2, #0]
80076c0: 4413 add r3, r2
80076c2: f503 6380 add.w r3, r3, #1024 @ 0x400
80076c6: 881b ldrh r3, [r3, #0]
80076c8: f3c3 0309 ubfx r3, r3, #0, #10
80076cc: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
80076ce: 68bb ldr r3, [r7, #8]
80076d0: 699a ldr r2, [r3, #24]
80076d2: 8b7b ldrh r3, [r7, #26]
80076d4: 429a cmp r2, r3
80076d6: d306 bcc.n 80076e6 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
80076d8: 68bb ldr r3, [r7, #8]
80076da: 699a ldr r2, [r3, #24]
80076dc: 8b7b ldrh r3, [r7, #26]
80076de: 1ad2 subs r2, r2, r3
80076e0: 68bb ldr r3, [r7, #8]
80076e2: 619a str r2, [r3, #24]
80076e4: e002 b.n 80076ec <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
80076e6: 68bb ldr r3, [r7, #8]
80076e8: 2200 movs r2, #0
80076ea: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80076ec: 68bb ldr r3, [r7, #8]
80076ee: 699b ldr r3, [r3, #24]
80076f0: 2b00 cmp r3, #0
80076f2: d123 bne.n 800773c <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80076f4: 68fb ldr r3, [r7, #12]
80076f6: 681b ldr r3, [r3, #0]
80076f8: 461a mov r2, r3
80076fa: 68bb ldr r3, [r7, #8]
80076fc: 781b ldrb r3, [r3, #0]
80076fe: 009b lsls r3, r3, #2
8007700: 4413 add r3, r2
8007702: 881b ldrh r3, [r3, #0]
8007704: b29b uxth r3, r3
8007706: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800770a: f023 0370 bic.w r3, r3, #112 @ 0x70
800770e: 833b strh r3, [r7, #24]
8007710: 8b3b ldrh r3, [r7, #24]
8007712: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8007716: 833b strh r3, [r7, #24]
8007718: 68fb ldr r3, [r7, #12]
800771a: 681b ldr r3, [r3, #0]
800771c: 461a mov r2, r3
800771e: 68bb ldr r3, [r7, #8]
8007720: 781b ldrb r3, [r3, #0]
8007722: 009b lsls r3, r3, #2
8007724: 441a add r2, r3
8007726: 8b3b ldrh r3, [r7, #24]
8007728: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800772c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007730: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007734: f043 0380 orr.w r3, r3, #128 @ 0x80
8007738: b29b uxth r3, r3
800773a: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
800773c: 88fb ldrh r3, [r7, #6]
800773e: f003 0340 and.w r3, r3, #64 @ 0x40
8007742: 2b00 cmp r3, #0
8007744: d01f beq.n 8007786 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8007746: 68fb ldr r3, [r7, #12]
8007748: 681b ldr r3, [r3, #0]
800774a: 461a mov r2, r3
800774c: 68bb ldr r3, [r7, #8]
800774e: 781b ldrb r3, [r3, #0]
8007750: 009b lsls r3, r3, #2
8007752: 4413 add r3, r2
8007754: 881b ldrh r3, [r3, #0]
8007756: b29b uxth r3, r3
8007758: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800775c: f023 0370 bic.w r3, r3, #112 @ 0x70
8007760: 82fb strh r3, [r7, #22]
8007762: 68fb ldr r3, [r7, #12]
8007764: 681b ldr r3, [r3, #0]
8007766: 461a mov r2, r3
8007768: 68bb ldr r3, [r7, #8]
800776a: 781b ldrb r3, [r3, #0]
800776c: 009b lsls r3, r3, #2
800776e: 441a add r2, r3
8007770: 8afb ldrh r3, [r7, #22]
8007772: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007776: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800777a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800777e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007782: b29b uxth r3, r3
8007784: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8007786: 8b7b ldrh r3, [r7, #26]
8007788: 2b00 cmp r3, #0
800778a: f000 8087 beq.w 800789c <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
800778e: 68fb ldr r3, [r7, #12]
8007790: 6818 ldr r0, [r3, #0]
8007792: 68bb ldr r3, [r7, #8]
8007794: 6959 ldr r1, [r3, #20]
8007796: 68bb ldr r3, [r7, #8]
8007798: 891a ldrh r2, [r3, #8]
800779a: 8b7b ldrh r3, [r7, #26]
800779c: f004 fd61 bl 800c262 <USB_ReadPMA>
80077a0: e07c b.n 800789c <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80077a2: 68fb ldr r3, [r7, #12]
80077a4: 681b ldr r3, [r3, #0]
80077a6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80077aa: b29b uxth r3, r3
80077ac: 461a mov r2, r3
80077ae: 68bb ldr r3, [r7, #8]
80077b0: 781b ldrb r3, [r3, #0]
80077b2: 00db lsls r3, r3, #3
80077b4: 4413 add r3, r2
80077b6: 3306 adds r3, #6
80077b8: 005b lsls r3, r3, #1
80077ba: 68fa ldr r2, [r7, #12]
80077bc: 6812 ldr r2, [r2, #0]
80077be: 4413 add r3, r2
80077c0: f503 6380 add.w r3, r3, #1024 @ 0x400
80077c4: 881b ldrh r3, [r3, #0]
80077c6: f3c3 0309 ubfx r3, r3, #0, #10
80077ca: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
80077cc: 68bb ldr r3, [r7, #8]
80077ce: 699a ldr r2, [r3, #24]
80077d0: 8b7b ldrh r3, [r7, #26]
80077d2: 429a cmp r2, r3
80077d4: d306 bcc.n 80077e4 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
80077d6: 68bb ldr r3, [r7, #8]
80077d8: 699a ldr r2, [r3, #24]
80077da: 8b7b ldrh r3, [r7, #26]
80077dc: 1ad2 subs r2, r2, r3
80077de: 68bb ldr r3, [r7, #8]
80077e0: 619a str r2, [r3, #24]
80077e2: e002 b.n 80077ea <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
80077e4: 68bb ldr r3, [r7, #8]
80077e6: 2200 movs r2, #0
80077e8: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80077ea: 68bb ldr r3, [r7, #8]
80077ec: 699b ldr r3, [r3, #24]
80077ee: 2b00 cmp r3, #0
80077f0: d123 bne.n 800783a <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80077f2: 68fb ldr r3, [r7, #12]
80077f4: 681b ldr r3, [r3, #0]
80077f6: 461a mov r2, r3
80077f8: 68bb ldr r3, [r7, #8]
80077fa: 781b ldrb r3, [r3, #0]
80077fc: 009b lsls r3, r3, #2
80077fe: 4413 add r3, r2
8007800: 881b ldrh r3, [r3, #0]
8007802: b29b uxth r3, r3
8007804: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8007808: f023 0370 bic.w r3, r3, #112 @ 0x70
800780c: 83fb strh r3, [r7, #30]
800780e: 8bfb ldrh r3, [r7, #30]
8007810: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8007814: 83fb strh r3, [r7, #30]
8007816: 68fb ldr r3, [r7, #12]
8007818: 681b ldr r3, [r3, #0]
800781a: 461a mov r2, r3
800781c: 68bb ldr r3, [r7, #8]
800781e: 781b ldrb r3, [r3, #0]
8007820: 009b lsls r3, r3, #2
8007822: 441a add r2, r3
8007824: 8bfb ldrh r3, [r7, #30]
8007826: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800782a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800782e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007832: f043 0380 orr.w r3, r3, #128 @ 0x80
8007836: b29b uxth r3, r3
8007838: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
800783a: 88fb ldrh r3, [r7, #6]
800783c: f003 0340 and.w r3, r3, #64 @ 0x40
8007840: 2b00 cmp r3, #0
8007842: d11f bne.n 8007884 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8007844: 68fb ldr r3, [r7, #12]
8007846: 681b ldr r3, [r3, #0]
8007848: 461a mov r2, r3
800784a: 68bb ldr r3, [r7, #8]
800784c: 781b ldrb r3, [r3, #0]
800784e: 009b lsls r3, r3, #2
8007850: 4413 add r3, r2
8007852: 881b ldrh r3, [r3, #0]
8007854: b29b uxth r3, r3
8007856: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800785a: f023 0370 bic.w r3, r3, #112 @ 0x70
800785e: 83bb strh r3, [r7, #28]
8007860: 68fb ldr r3, [r7, #12]
8007862: 681b ldr r3, [r3, #0]
8007864: 461a mov r2, r3
8007866: 68bb ldr r3, [r7, #8]
8007868: 781b ldrb r3, [r3, #0]
800786a: 009b lsls r3, r3, #2
800786c: 441a add r2, r3
800786e: 8bbb ldrh r3, [r7, #28]
8007870: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007874: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007878: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800787c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007880: b29b uxth r3, r3
8007882: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8007884: 8b7b ldrh r3, [r7, #26]
8007886: 2b00 cmp r3, #0
8007888: d008 beq.n 800789c <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
800788a: 68fb ldr r3, [r7, #12]
800788c: 6818 ldr r0, [r3, #0]
800788e: 68bb ldr r3, [r7, #8]
8007890: 6959 ldr r1, [r3, #20]
8007892: 68bb ldr r3, [r7, #8]
8007894: 895a ldrh r2, [r3, #10]
8007896: 8b7b ldrh r3, [r7, #26]
8007898: f004 fce3 bl 800c262 <USB_ReadPMA>
}
}
return count;
800789c: 8b7b ldrh r3, [r7, #26]
}
800789e: 4618 mov r0, r3
80078a0: 3720 adds r7, #32
80078a2: 46bd mov sp, r7
80078a4: bd80 pop {r7, pc}
080078a6 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
80078a6: b580 push {r7, lr}
80078a8: b0a4 sub sp, #144 @ 0x90
80078aa: af00 add r7, sp, #0
80078ac: 60f8 str r0, [r7, #12]
80078ae: 60b9 str r1, [r7, #8]
80078b0: 4613 mov r3, r2
80078b2: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80078b4: 88fb ldrh r3, [r7, #6]
80078b6: f003 0340 and.w r3, r3, #64 @ 0x40
80078ba: 2b00 cmp r3, #0
80078bc: f000 81dd beq.w 8007c7a <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80078c0: 68fb ldr r3, [r7, #12]
80078c2: 681b ldr r3, [r3, #0]
80078c4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80078c8: b29b uxth r3, r3
80078ca: 461a mov r2, r3
80078cc: 68bb ldr r3, [r7, #8]
80078ce: 781b ldrb r3, [r3, #0]
80078d0: 00db lsls r3, r3, #3
80078d2: 4413 add r3, r2
80078d4: 3302 adds r3, #2
80078d6: 005b lsls r3, r3, #1
80078d8: 68fa ldr r2, [r7, #12]
80078da: 6812 ldr r2, [r2, #0]
80078dc: 4413 add r3, r2
80078de: f503 6380 add.w r3, r3, #1024 @ 0x400
80078e2: 881b ldrh r3, [r3, #0]
80078e4: f3c3 0309 ubfx r3, r3, #0, #10
80078e8: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
80078ec: 68bb ldr r3, [r7, #8]
80078ee: 699a ldr r2, [r3, #24]
80078f0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80078f4: 429a cmp r2, r3
80078f6: d907 bls.n 8007908 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
80078f8: 68bb ldr r3, [r7, #8]
80078fa: 699a ldr r2, [r3, #24]
80078fc: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007900: 1ad2 subs r2, r2, r3
8007902: 68bb ldr r3, [r7, #8]
8007904: 619a str r2, [r3, #24]
8007906: e002 b.n 800790e <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8007908: 68bb ldr r3, [r7, #8]
800790a: 2200 movs r2, #0
800790c: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
800790e: 68bb ldr r3, [r7, #8]
8007910: 699b ldr r3, [r3, #24]
8007912: 2b00 cmp r3, #0
8007914: f040 80b9 bne.w 8007a8a <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007918: 68bb ldr r3, [r7, #8]
800791a: 785b ldrb r3, [r3, #1]
800791c: 2b00 cmp r3, #0
800791e: d126 bne.n 800796e <HAL_PCD_EP_DB_Transmit+0xc8>
8007920: 68fb ldr r3, [r7, #12]
8007922: 681b ldr r3, [r3, #0]
8007924: 62fb str r3, [r7, #44] @ 0x2c
8007926: 68fb ldr r3, [r7, #12]
8007928: 681b ldr r3, [r3, #0]
800792a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800792e: b29b uxth r3, r3
8007930: 461a mov r2, r3
8007932: 6afb ldr r3, [r7, #44] @ 0x2c
8007934: 4413 add r3, r2
8007936: 62fb str r3, [r7, #44] @ 0x2c
8007938: 68bb ldr r3, [r7, #8]
800793a: 781b ldrb r3, [r3, #0]
800793c: 011a lsls r2, r3, #4
800793e: 6afb ldr r3, [r7, #44] @ 0x2c
8007940: 4413 add r3, r2
8007942: f203 4304 addw r3, r3, #1028 @ 0x404
8007946: 62bb str r3, [r7, #40] @ 0x28
8007948: 6abb ldr r3, [r7, #40] @ 0x28
800794a: 881b ldrh r3, [r3, #0]
800794c: b29b uxth r3, r3
800794e: f3c3 0309 ubfx r3, r3, #0, #10
8007952: b29a uxth r2, r3
8007954: 6abb ldr r3, [r7, #40] @ 0x28
8007956: 801a strh r2, [r3, #0]
8007958: 6abb ldr r3, [r7, #40] @ 0x28
800795a: 881b ldrh r3, [r3, #0]
800795c: b29b uxth r3, r3
800795e: ea6f 4343 mvn.w r3, r3, lsl #17
8007962: ea6f 4353 mvn.w r3, r3, lsr #17
8007966: b29a uxth r2, r3
8007968: 6abb ldr r3, [r7, #40] @ 0x28
800796a: 801a strh r2, [r3, #0]
800796c: e01a b.n 80079a4 <HAL_PCD_EP_DB_Transmit+0xfe>
800796e: 68bb ldr r3, [r7, #8]
8007970: 785b ldrb r3, [r3, #1]
8007972: 2b01 cmp r3, #1
8007974: d116 bne.n 80079a4 <HAL_PCD_EP_DB_Transmit+0xfe>
8007976: 68fb ldr r3, [r7, #12]
8007978: 681b ldr r3, [r3, #0]
800797a: 637b str r3, [r7, #52] @ 0x34
800797c: 68fb ldr r3, [r7, #12]
800797e: 681b ldr r3, [r3, #0]
8007980: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007984: b29b uxth r3, r3
8007986: 461a mov r2, r3
8007988: 6b7b ldr r3, [r7, #52] @ 0x34
800798a: 4413 add r3, r2
800798c: 637b str r3, [r7, #52] @ 0x34
800798e: 68bb ldr r3, [r7, #8]
8007990: 781b ldrb r3, [r3, #0]
8007992: 011a lsls r2, r3, #4
8007994: 6b7b ldr r3, [r7, #52] @ 0x34
8007996: 4413 add r3, r2
8007998: f203 4304 addw r3, r3, #1028 @ 0x404
800799c: 633b str r3, [r7, #48] @ 0x30
800799e: 6b3b ldr r3, [r7, #48] @ 0x30
80079a0: 2200 movs r2, #0
80079a2: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80079a4: 68fb ldr r3, [r7, #12]
80079a6: 681b ldr r3, [r3, #0]
80079a8: 627b str r3, [r7, #36] @ 0x24
80079aa: 68bb ldr r3, [r7, #8]
80079ac: 785b ldrb r3, [r3, #1]
80079ae: 2b00 cmp r3, #0
80079b0: d126 bne.n 8007a00 <HAL_PCD_EP_DB_Transmit+0x15a>
80079b2: 68fb ldr r3, [r7, #12]
80079b4: 681b ldr r3, [r3, #0]
80079b6: 61fb str r3, [r7, #28]
80079b8: 68fb ldr r3, [r7, #12]
80079ba: 681b ldr r3, [r3, #0]
80079bc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80079c0: b29b uxth r3, r3
80079c2: 461a mov r2, r3
80079c4: 69fb ldr r3, [r7, #28]
80079c6: 4413 add r3, r2
80079c8: 61fb str r3, [r7, #28]
80079ca: 68bb ldr r3, [r7, #8]
80079cc: 781b ldrb r3, [r3, #0]
80079ce: 011a lsls r2, r3, #4
80079d0: 69fb ldr r3, [r7, #28]
80079d2: 4413 add r3, r2
80079d4: f203 430c addw r3, r3, #1036 @ 0x40c
80079d8: 61bb str r3, [r7, #24]
80079da: 69bb ldr r3, [r7, #24]
80079dc: 881b ldrh r3, [r3, #0]
80079de: b29b uxth r3, r3
80079e0: f3c3 0309 ubfx r3, r3, #0, #10
80079e4: b29a uxth r2, r3
80079e6: 69bb ldr r3, [r7, #24]
80079e8: 801a strh r2, [r3, #0]
80079ea: 69bb ldr r3, [r7, #24]
80079ec: 881b ldrh r3, [r3, #0]
80079ee: b29b uxth r3, r3
80079f0: ea6f 4343 mvn.w r3, r3, lsl #17
80079f4: ea6f 4353 mvn.w r3, r3, lsr #17
80079f8: b29a uxth r2, r3
80079fa: 69bb ldr r3, [r7, #24]
80079fc: 801a strh r2, [r3, #0]
80079fe: e017 b.n 8007a30 <HAL_PCD_EP_DB_Transmit+0x18a>
8007a00: 68bb ldr r3, [r7, #8]
8007a02: 785b ldrb r3, [r3, #1]
8007a04: 2b01 cmp r3, #1
8007a06: d113 bne.n 8007a30 <HAL_PCD_EP_DB_Transmit+0x18a>
8007a08: 68fb ldr r3, [r7, #12]
8007a0a: 681b ldr r3, [r3, #0]
8007a0c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007a10: b29b uxth r3, r3
8007a12: 461a mov r2, r3
8007a14: 6a7b ldr r3, [r7, #36] @ 0x24
8007a16: 4413 add r3, r2
8007a18: 627b str r3, [r7, #36] @ 0x24
8007a1a: 68bb ldr r3, [r7, #8]
8007a1c: 781b ldrb r3, [r3, #0]
8007a1e: 011a lsls r2, r3, #4
8007a20: 6a7b ldr r3, [r7, #36] @ 0x24
8007a22: 4413 add r3, r2
8007a24: f203 430c addw r3, r3, #1036 @ 0x40c
8007a28: 623b str r3, [r7, #32]
8007a2a: 6a3b ldr r3, [r7, #32]
8007a2c: 2200 movs r2, #0
8007a2e: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007a30: 68bb ldr r3, [r7, #8]
8007a32: 781b ldrb r3, [r3, #0]
8007a34: 4619 mov r1, r3
8007a36: 68f8 ldr r0, [r7, #12]
8007a38: f006 fa91 bl 800df5e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007a3c: 88fb ldrh r3, [r7, #6]
8007a3e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007a42: 2b00 cmp r3, #0
8007a44: f000 82fc beq.w 8008040 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007a48: 68fb ldr r3, [r7, #12]
8007a4a: 681b ldr r3, [r3, #0]
8007a4c: 461a mov r2, r3
8007a4e: 68bb ldr r3, [r7, #8]
8007a50: 781b ldrb r3, [r3, #0]
8007a52: 009b lsls r3, r3, #2
8007a54: 4413 add r3, r2
8007a56: 881b ldrh r3, [r3, #0]
8007a58: b29b uxth r3, r3
8007a5a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007a5e: f023 0370 bic.w r3, r3, #112 @ 0x70
8007a62: 82fb strh r3, [r7, #22]
8007a64: 68fb ldr r3, [r7, #12]
8007a66: 681b ldr r3, [r3, #0]
8007a68: 461a mov r2, r3
8007a6a: 68bb ldr r3, [r7, #8]
8007a6c: 781b ldrb r3, [r3, #0]
8007a6e: 009b lsls r3, r3, #2
8007a70: 441a add r2, r3
8007a72: 8afb ldrh r3, [r7, #22]
8007a74: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007a78: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007a7c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007a80: f043 0380 orr.w r3, r3, #128 @ 0x80
8007a84: b29b uxth r3, r3
8007a86: 8013 strh r3, [r2, #0]
8007a88: e2da b.n 8008040 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007a8a: 88fb ldrh r3, [r7, #6]
8007a8c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007a90: 2b00 cmp r3, #0
8007a92: d021 beq.n 8007ad8 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007a94: 68fb ldr r3, [r7, #12]
8007a96: 681b ldr r3, [r3, #0]
8007a98: 461a mov r2, r3
8007a9a: 68bb ldr r3, [r7, #8]
8007a9c: 781b ldrb r3, [r3, #0]
8007a9e: 009b lsls r3, r3, #2
8007aa0: 4413 add r3, r2
8007aa2: 881b ldrh r3, [r3, #0]
8007aa4: b29b uxth r3, r3
8007aa6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007aaa: f023 0370 bic.w r3, r3, #112 @ 0x70
8007aae: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8007ab2: 68fb ldr r3, [r7, #12]
8007ab4: 681b ldr r3, [r3, #0]
8007ab6: 461a mov r2, r3
8007ab8: 68bb ldr r3, [r7, #8]
8007aba: 781b ldrb r3, [r3, #0]
8007abc: 009b lsls r3, r3, #2
8007abe: 441a add r2, r3
8007ac0: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8007ac4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007ac8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007acc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007ad0: f043 0380 orr.w r3, r3, #128 @ 0x80
8007ad4: b29b uxth r3, r3
8007ad6: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007ad8: 68bb ldr r3, [r7, #8]
8007ada: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007ade: 2b01 cmp r3, #1
8007ae0: f040 82ae bne.w 8008040 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8007ae4: 68bb ldr r3, [r7, #8]
8007ae6: 695a ldr r2, [r3, #20]
8007ae8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007aec: 441a add r2, r3
8007aee: 68bb ldr r3, [r7, #8]
8007af0: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007af2: 68bb ldr r3, [r7, #8]
8007af4: 69da ldr r2, [r3, #28]
8007af6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007afa: 441a add r2, r3
8007afc: 68bb ldr r3, [r7, #8]
8007afe: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007b00: 68bb ldr r3, [r7, #8]
8007b02: 6a1a ldr r2, [r3, #32]
8007b04: 68bb ldr r3, [r7, #8]
8007b06: 691b ldr r3, [r3, #16]
8007b08: 429a cmp r2, r3
8007b0a: d30b bcc.n 8007b24 <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8007b0c: 68bb ldr r3, [r7, #8]
8007b0e: 691b ldr r3, [r3, #16]
8007b10: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007b14: 68bb ldr r3, [r7, #8]
8007b16: 6a1a ldr r2, [r3, #32]
8007b18: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b1c: 1ad2 subs r2, r2, r3
8007b1e: 68bb ldr r3, [r7, #8]
8007b20: 621a str r2, [r3, #32]
8007b22: e017 b.n 8007b54 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8007b24: 68bb ldr r3, [r7, #8]
8007b26: 6a1b ldr r3, [r3, #32]
8007b28: 2b00 cmp r3, #0
8007b2a: d108 bne.n 8007b3e <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8007b2c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007b30: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007b34: 68bb ldr r3, [r7, #8]
8007b36: 2200 movs r2, #0
8007b38: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007b3c: e00a b.n 8007b54 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8007b3e: 68bb ldr r3, [r7, #8]
8007b40: 2200 movs r2, #0
8007b42: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8007b46: 68bb ldr r3, [r7, #8]
8007b48: 6a1b ldr r3, [r3, #32]
8007b4a: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007b4e: 68bb ldr r3, [r7, #8]
8007b50: 2200 movs r2, #0
8007b52: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007b54: 68bb ldr r3, [r7, #8]
8007b56: 785b ldrb r3, [r3, #1]
8007b58: 2b00 cmp r3, #0
8007b5a: d165 bne.n 8007c28 <HAL_PCD_EP_DB_Transmit+0x382>
8007b5c: 68fb ldr r3, [r7, #12]
8007b5e: 681b ldr r3, [r3, #0]
8007b60: 63fb str r3, [r7, #60] @ 0x3c
8007b62: 68fb ldr r3, [r7, #12]
8007b64: 681b ldr r3, [r3, #0]
8007b66: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007b6a: b29b uxth r3, r3
8007b6c: 461a mov r2, r3
8007b6e: 6bfb ldr r3, [r7, #60] @ 0x3c
8007b70: 4413 add r3, r2
8007b72: 63fb str r3, [r7, #60] @ 0x3c
8007b74: 68bb ldr r3, [r7, #8]
8007b76: 781b ldrb r3, [r3, #0]
8007b78: 011a lsls r2, r3, #4
8007b7a: 6bfb ldr r3, [r7, #60] @ 0x3c
8007b7c: 4413 add r3, r2
8007b7e: f203 4304 addw r3, r3, #1028 @ 0x404
8007b82: 63bb str r3, [r7, #56] @ 0x38
8007b84: 6bbb ldr r3, [r7, #56] @ 0x38
8007b86: 881b ldrh r3, [r3, #0]
8007b88: b29b uxth r3, r3
8007b8a: f3c3 0309 ubfx r3, r3, #0, #10
8007b8e: b29a uxth r2, r3
8007b90: 6bbb ldr r3, [r7, #56] @ 0x38
8007b92: 801a strh r2, [r3, #0]
8007b94: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b98: 2b3e cmp r3, #62 @ 0x3e
8007b9a: d91d bls.n 8007bd8 <HAL_PCD_EP_DB_Transmit+0x332>
8007b9c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007ba0: 095b lsrs r3, r3, #5
8007ba2: 64bb str r3, [r7, #72] @ 0x48
8007ba4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007ba8: f003 031f and.w r3, r3, #31
8007bac: 2b00 cmp r3, #0
8007bae: d102 bne.n 8007bb6 <HAL_PCD_EP_DB_Transmit+0x310>
8007bb0: 6cbb ldr r3, [r7, #72] @ 0x48
8007bb2: 3b01 subs r3, #1
8007bb4: 64bb str r3, [r7, #72] @ 0x48
8007bb6: 6bbb ldr r3, [r7, #56] @ 0x38
8007bb8: 881b ldrh r3, [r3, #0]
8007bba: b29a uxth r2, r3
8007bbc: 6cbb ldr r3, [r7, #72] @ 0x48
8007bbe: b29b uxth r3, r3
8007bc0: 029b lsls r3, r3, #10
8007bc2: b29b uxth r3, r3
8007bc4: 4313 orrs r3, r2
8007bc6: b29b uxth r3, r3
8007bc8: ea6f 4343 mvn.w r3, r3, lsl #17
8007bcc: ea6f 4353 mvn.w r3, r3, lsr #17
8007bd0: b29a uxth r2, r3
8007bd2: 6bbb ldr r3, [r7, #56] @ 0x38
8007bd4: 801a strh r2, [r3, #0]
8007bd6: e044 b.n 8007c62 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007bd8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007bdc: 2b00 cmp r3, #0
8007bde: d10a bne.n 8007bf6 <HAL_PCD_EP_DB_Transmit+0x350>
8007be0: 6bbb ldr r3, [r7, #56] @ 0x38
8007be2: 881b ldrh r3, [r3, #0]
8007be4: b29b uxth r3, r3
8007be6: ea6f 4343 mvn.w r3, r3, lsl #17
8007bea: ea6f 4353 mvn.w r3, r3, lsr #17
8007bee: b29a uxth r2, r3
8007bf0: 6bbb ldr r3, [r7, #56] @ 0x38
8007bf2: 801a strh r2, [r3, #0]
8007bf4: e035 b.n 8007c62 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007bf6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007bfa: 085b lsrs r3, r3, #1
8007bfc: 64bb str r3, [r7, #72] @ 0x48
8007bfe: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c02: f003 0301 and.w r3, r3, #1
8007c06: 2b00 cmp r3, #0
8007c08: d002 beq.n 8007c10 <HAL_PCD_EP_DB_Transmit+0x36a>
8007c0a: 6cbb ldr r3, [r7, #72] @ 0x48
8007c0c: 3301 adds r3, #1
8007c0e: 64bb str r3, [r7, #72] @ 0x48
8007c10: 6bbb ldr r3, [r7, #56] @ 0x38
8007c12: 881b ldrh r3, [r3, #0]
8007c14: b29a uxth r2, r3
8007c16: 6cbb ldr r3, [r7, #72] @ 0x48
8007c18: b29b uxth r3, r3
8007c1a: 029b lsls r3, r3, #10
8007c1c: b29b uxth r3, r3
8007c1e: 4313 orrs r3, r2
8007c20: b29a uxth r2, r3
8007c22: 6bbb ldr r3, [r7, #56] @ 0x38
8007c24: 801a strh r2, [r3, #0]
8007c26: e01c b.n 8007c62 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007c28: 68bb ldr r3, [r7, #8]
8007c2a: 785b ldrb r3, [r3, #1]
8007c2c: 2b01 cmp r3, #1
8007c2e: d118 bne.n 8007c62 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007c30: 68fb ldr r3, [r7, #12]
8007c32: 681b ldr r3, [r3, #0]
8007c34: 647b str r3, [r7, #68] @ 0x44
8007c36: 68fb ldr r3, [r7, #12]
8007c38: 681b ldr r3, [r3, #0]
8007c3a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007c3e: b29b uxth r3, r3
8007c40: 461a mov r2, r3
8007c42: 6c7b ldr r3, [r7, #68] @ 0x44
8007c44: 4413 add r3, r2
8007c46: 647b str r3, [r7, #68] @ 0x44
8007c48: 68bb ldr r3, [r7, #8]
8007c4a: 781b ldrb r3, [r3, #0]
8007c4c: 011a lsls r2, r3, #4
8007c4e: 6c7b ldr r3, [r7, #68] @ 0x44
8007c50: 4413 add r3, r2
8007c52: f203 4304 addw r3, r3, #1028 @ 0x404
8007c56: 643b str r3, [r7, #64] @ 0x40
8007c58: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c5c: b29a uxth r2, r3
8007c5e: 6c3b ldr r3, [r7, #64] @ 0x40
8007c60: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8007c62: 68fb ldr r3, [r7, #12]
8007c64: 6818 ldr r0, [r3, #0]
8007c66: 68bb ldr r3, [r7, #8]
8007c68: 6959 ldr r1, [r3, #20]
8007c6a: 68bb ldr r3, [r7, #8]
8007c6c: 891a ldrh r2, [r3, #8]
8007c6e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c72: b29b uxth r3, r3
8007c74: f004 faaf bl 800c1d6 <USB_WritePMA>
8007c78: e1e2 b.n 8008040 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8007c7a: 68fb ldr r3, [r7, #12]
8007c7c: 681b ldr r3, [r3, #0]
8007c7e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007c82: b29b uxth r3, r3
8007c84: 461a mov r2, r3
8007c86: 68bb ldr r3, [r7, #8]
8007c88: 781b ldrb r3, [r3, #0]
8007c8a: 00db lsls r3, r3, #3
8007c8c: 4413 add r3, r2
8007c8e: 3306 adds r3, #6
8007c90: 005b lsls r3, r3, #1
8007c92: 68fa ldr r2, [r7, #12]
8007c94: 6812 ldr r2, [r2, #0]
8007c96: 4413 add r3, r2
8007c98: f503 6380 add.w r3, r3, #1024 @ 0x400
8007c9c: 881b ldrh r3, [r3, #0]
8007c9e: f3c3 0309 ubfx r3, r3, #0, #10
8007ca2: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8007ca6: 68bb ldr r3, [r7, #8]
8007ca8: 699a ldr r2, [r3, #24]
8007caa: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007cae: 429a cmp r2, r3
8007cb0: d307 bcc.n 8007cc2 <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8007cb2: 68bb ldr r3, [r7, #8]
8007cb4: 699a ldr r2, [r3, #24]
8007cb6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007cba: 1ad2 subs r2, r2, r3
8007cbc: 68bb ldr r3, [r7, #8]
8007cbe: 619a str r2, [r3, #24]
8007cc0: e002 b.n 8007cc8 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8007cc2: 68bb ldr r3, [r7, #8]
8007cc4: 2200 movs r2, #0
8007cc6: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007cc8: 68bb ldr r3, [r7, #8]
8007cca: 699b ldr r3, [r3, #24]
8007ccc: 2b00 cmp r3, #0
8007cce: f040 80c0 bne.w 8007e52 <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007cd2: 68bb ldr r3, [r7, #8]
8007cd4: 785b ldrb r3, [r3, #1]
8007cd6: 2b00 cmp r3, #0
8007cd8: d126 bne.n 8007d28 <HAL_PCD_EP_DB_Transmit+0x482>
8007cda: 68fb ldr r3, [r7, #12]
8007cdc: 681b ldr r3, [r3, #0]
8007cde: 67fb str r3, [r7, #124] @ 0x7c
8007ce0: 68fb ldr r3, [r7, #12]
8007ce2: 681b ldr r3, [r3, #0]
8007ce4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007ce8: b29b uxth r3, r3
8007cea: 461a mov r2, r3
8007cec: 6ffb ldr r3, [r7, #124] @ 0x7c
8007cee: 4413 add r3, r2
8007cf0: 67fb str r3, [r7, #124] @ 0x7c
8007cf2: 68bb ldr r3, [r7, #8]
8007cf4: 781b ldrb r3, [r3, #0]
8007cf6: 011a lsls r2, r3, #4
8007cf8: 6ffb ldr r3, [r7, #124] @ 0x7c
8007cfa: 4413 add r3, r2
8007cfc: f203 4304 addw r3, r3, #1028 @ 0x404
8007d00: 67bb str r3, [r7, #120] @ 0x78
8007d02: 6fbb ldr r3, [r7, #120] @ 0x78
8007d04: 881b ldrh r3, [r3, #0]
8007d06: b29b uxth r3, r3
8007d08: f3c3 0309 ubfx r3, r3, #0, #10
8007d0c: b29a uxth r2, r3
8007d0e: 6fbb ldr r3, [r7, #120] @ 0x78
8007d10: 801a strh r2, [r3, #0]
8007d12: 6fbb ldr r3, [r7, #120] @ 0x78
8007d14: 881b ldrh r3, [r3, #0]
8007d16: b29b uxth r3, r3
8007d18: ea6f 4343 mvn.w r3, r3, lsl #17
8007d1c: ea6f 4353 mvn.w r3, r3, lsr #17
8007d20: b29a uxth r2, r3
8007d22: 6fbb ldr r3, [r7, #120] @ 0x78
8007d24: 801a strh r2, [r3, #0]
8007d26: e01a b.n 8007d5e <HAL_PCD_EP_DB_Transmit+0x4b8>
8007d28: 68bb ldr r3, [r7, #8]
8007d2a: 785b ldrb r3, [r3, #1]
8007d2c: 2b01 cmp r3, #1
8007d2e: d116 bne.n 8007d5e <HAL_PCD_EP_DB_Transmit+0x4b8>
8007d30: 68fb ldr r3, [r7, #12]
8007d32: 681b ldr r3, [r3, #0]
8007d34: 667b str r3, [r7, #100] @ 0x64
8007d36: 68fb ldr r3, [r7, #12]
8007d38: 681b ldr r3, [r3, #0]
8007d3a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007d3e: b29b uxth r3, r3
8007d40: 461a mov r2, r3
8007d42: 6e7b ldr r3, [r7, #100] @ 0x64
8007d44: 4413 add r3, r2
8007d46: 667b str r3, [r7, #100] @ 0x64
8007d48: 68bb ldr r3, [r7, #8]
8007d4a: 781b ldrb r3, [r3, #0]
8007d4c: 011a lsls r2, r3, #4
8007d4e: 6e7b ldr r3, [r7, #100] @ 0x64
8007d50: 4413 add r3, r2
8007d52: f203 4304 addw r3, r3, #1028 @ 0x404
8007d56: 663b str r3, [r7, #96] @ 0x60
8007d58: 6e3b ldr r3, [r7, #96] @ 0x60
8007d5a: 2200 movs r2, #0
8007d5c: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007d5e: 68fb ldr r3, [r7, #12]
8007d60: 681b ldr r3, [r3, #0]
8007d62: 677b str r3, [r7, #116] @ 0x74
8007d64: 68bb ldr r3, [r7, #8]
8007d66: 785b ldrb r3, [r3, #1]
8007d68: 2b00 cmp r3, #0
8007d6a: d12b bne.n 8007dc4 <HAL_PCD_EP_DB_Transmit+0x51e>
8007d6c: 68fb ldr r3, [r7, #12]
8007d6e: 681b ldr r3, [r3, #0]
8007d70: 66fb str r3, [r7, #108] @ 0x6c
8007d72: 68fb ldr r3, [r7, #12]
8007d74: 681b ldr r3, [r3, #0]
8007d76: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007d7a: b29b uxth r3, r3
8007d7c: 461a mov r2, r3
8007d7e: 6efb ldr r3, [r7, #108] @ 0x6c
8007d80: 4413 add r3, r2
8007d82: 66fb str r3, [r7, #108] @ 0x6c
8007d84: 68bb ldr r3, [r7, #8]
8007d86: 781b ldrb r3, [r3, #0]
8007d88: 011a lsls r2, r3, #4
8007d8a: 6efb ldr r3, [r7, #108] @ 0x6c
8007d8c: 4413 add r3, r2
8007d8e: f203 430c addw r3, r3, #1036 @ 0x40c
8007d92: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8007d96: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007d9a: 881b ldrh r3, [r3, #0]
8007d9c: b29b uxth r3, r3
8007d9e: f3c3 0309 ubfx r3, r3, #0, #10
8007da2: b29a uxth r2, r3
8007da4: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007da8: 801a strh r2, [r3, #0]
8007daa: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007dae: 881b ldrh r3, [r3, #0]
8007db0: b29b uxth r3, r3
8007db2: ea6f 4343 mvn.w r3, r3, lsl #17
8007db6: ea6f 4353 mvn.w r3, r3, lsr #17
8007dba: b29a uxth r2, r3
8007dbc: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007dc0: 801a strh r2, [r3, #0]
8007dc2: e017 b.n 8007df4 <HAL_PCD_EP_DB_Transmit+0x54e>
8007dc4: 68bb ldr r3, [r7, #8]
8007dc6: 785b ldrb r3, [r3, #1]
8007dc8: 2b01 cmp r3, #1
8007dca: d113 bne.n 8007df4 <HAL_PCD_EP_DB_Transmit+0x54e>
8007dcc: 68fb ldr r3, [r7, #12]
8007dce: 681b ldr r3, [r3, #0]
8007dd0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007dd4: b29b uxth r3, r3
8007dd6: 461a mov r2, r3
8007dd8: 6f7b ldr r3, [r7, #116] @ 0x74
8007dda: 4413 add r3, r2
8007ddc: 677b str r3, [r7, #116] @ 0x74
8007dde: 68bb ldr r3, [r7, #8]
8007de0: 781b ldrb r3, [r3, #0]
8007de2: 011a lsls r2, r3, #4
8007de4: 6f7b ldr r3, [r7, #116] @ 0x74
8007de6: 4413 add r3, r2
8007de8: f203 430c addw r3, r3, #1036 @ 0x40c
8007dec: 673b str r3, [r7, #112] @ 0x70
8007dee: 6f3b ldr r3, [r7, #112] @ 0x70
8007df0: 2200 movs r2, #0
8007df2: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007df4: 68bb ldr r3, [r7, #8]
8007df6: 781b ldrb r3, [r3, #0]
8007df8: 4619 mov r1, r3
8007dfa: 68f8 ldr r0, [r7, #12]
8007dfc: f006 f8af bl 800df5e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007e00: 88fb ldrh r3, [r7, #6]
8007e02: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007e06: 2b00 cmp r3, #0
8007e08: f040 811a bne.w 8008040 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007e0c: 68fb ldr r3, [r7, #12]
8007e0e: 681b ldr r3, [r3, #0]
8007e10: 461a mov r2, r3
8007e12: 68bb ldr r3, [r7, #8]
8007e14: 781b ldrb r3, [r3, #0]
8007e16: 009b lsls r3, r3, #2
8007e18: 4413 add r3, r2
8007e1a: 881b ldrh r3, [r3, #0]
8007e1c: b29b uxth r3, r3
8007e1e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007e22: f023 0370 bic.w r3, r3, #112 @ 0x70
8007e26: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8007e2a: 68fb ldr r3, [r7, #12]
8007e2c: 681b ldr r3, [r3, #0]
8007e2e: 461a mov r2, r3
8007e30: 68bb ldr r3, [r7, #8]
8007e32: 781b ldrb r3, [r3, #0]
8007e34: 009b lsls r3, r3, #2
8007e36: 441a add r2, r3
8007e38: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8007e3c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007e40: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007e44: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007e48: f043 0380 orr.w r3, r3, #128 @ 0x80
8007e4c: b29b uxth r3, r3
8007e4e: 8013 strh r3, [r2, #0]
8007e50: e0f6 b.n 8008040 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007e52: 88fb ldrh r3, [r7, #6]
8007e54: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007e58: 2b00 cmp r3, #0
8007e5a: d121 bne.n 8007ea0 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007e5c: 68fb ldr r3, [r7, #12]
8007e5e: 681b ldr r3, [r3, #0]
8007e60: 461a mov r2, r3
8007e62: 68bb ldr r3, [r7, #8]
8007e64: 781b ldrb r3, [r3, #0]
8007e66: 009b lsls r3, r3, #2
8007e68: 4413 add r3, r2
8007e6a: 881b ldrh r3, [r3, #0]
8007e6c: b29b uxth r3, r3
8007e6e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007e72: f023 0370 bic.w r3, r3, #112 @ 0x70
8007e76: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8007e7a: 68fb ldr r3, [r7, #12]
8007e7c: 681b ldr r3, [r3, #0]
8007e7e: 461a mov r2, r3
8007e80: 68bb ldr r3, [r7, #8]
8007e82: 781b ldrb r3, [r3, #0]
8007e84: 009b lsls r3, r3, #2
8007e86: 441a add r2, r3
8007e88: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8007e8c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007e90: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007e94: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007e98: f043 0380 orr.w r3, r3, #128 @ 0x80
8007e9c: b29b uxth r3, r3
8007e9e: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007ea0: 68bb ldr r3, [r7, #8]
8007ea2: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007ea6: 2b01 cmp r3, #1
8007ea8: f040 80ca bne.w 8008040 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8007eac: 68bb ldr r3, [r7, #8]
8007eae: 695a ldr r2, [r3, #20]
8007eb0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007eb4: 441a add r2, r3
8007eb6: 68bb ldr r3, [r7, #8]
8007eb8: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007eba: 68bb ldr r3, [r7, #8]
8007ebc: 69da ldr r2, [r3, #28]
8007ebe: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007ec2: 441a add r2, r3
8007ec4: 68bb ldr r3, [r7, #8]
8007ec6: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007ec8: 68bb ldr r3, [r7, #8]
8007eca: 6a1a ldr r2, [r3, #32]
8007ecc: 68bb ldr r3, [r7, #8]
8007ece: 691b ldr r3, [r3, #16]
8007ed0: 429a cmp r2, r3
8007ed2: d30b bcc.n 8007eec <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
8007ed4: 68bb ldr r3, [r7, #8]
8007ed6: 691b ldr r3, [r3, #16]
8007ed8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007edc: 68bb ldr r3, [r7, #8]
8007ede: 6a1a ldr r2, [r3, #32]
8007ee0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007ee4: 1ad2 subs r2, r2, r3
8007ee6: 68bb ldr r3, [r7, #8]
8007ee8: 621a str r2, [r3, #32]
8007eea: e017 b.n 8007f1c <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
8007eec: 68bb ldr r3, [r7, #8]
8007eee: 6a1b ldr r3, [r3, #32]
8007ef0: 2b00 cmp r3, #0
8007ef2: d108 bne.n 8007f06 <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8007ef4: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007ef8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007efc: 68bb ldr r3, [r7, #8]
8007efe: 2200 movs r2, #0
8007f00: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007f04: e00a b.n 8007f1c <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
8007f06: 68bb ldr r3, [r7, #8]
8007f08: 6a1b ldr r3, [r3, #32]
8007f0a: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007f0e: 68bb ldr r3, [r7, #8]
8007f10: 2200 movs r2, #0
8007f12: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8007f14: 68bb ldr r3, [r7, #8]
8007f16: 2200 movs r2, #0
8007f18: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007f1c: 68fb ldr r3, [r7, #12]
8007f1e: 681b ldr r3, [r3, #0]
8007f20: 657b str r3, [r7, #84] @ 0x54
8007f22: 68bb ldr r3, [r7, #8]
8007f24: 785b ldrb r3, [r3, #1]
8007f26: 2b00 cmp r3, #0
8007f28: d165 bne.n 8007ff6 <HAL_PCD_EP_DB_Transmit+0x750>
8007f2a: 68fb ldr r3, [r7, #12]
8007f2c: 681b ldr r3, [r3, #0]
8007f2e: 65fb str r3, [r7, #92] @ 0x5c
8007f30: 68fb ldr r3, [r7, #12]
8007f32: 681b ldr r3, [r3, #0]
8007f34: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007f38: b29b uxth r3, r3
8007f3a: 461a mov r2, r3
8007f3c: 6dfb ldr r3, [r7, #92] @ 0x5c
8007f3e: 4413 add r3, r2
8007f40: 65fb str r3, [r7, #92] @ 0x5c
8007f42: 68bb ldr r3, [r7, #8]
8007f44: 781b ldrb r3, [r3, #0]
8007f46: 011a lsls r2, r3, #4
8007f48: 6dfb ldr r3, [r7, #92] @ 0x5c
8007f4a: 4413 add r3, r2
8007f4c: f203 430c addw r3, r3, #1036 @ 0x40c
8007f50: 65bb str r3, [r7, #88] @ 0x58
8007f52: 6dbb ldr r3, [r7, #88] @ 0x58
8007f54: 881b ldrh r3, [r3, #0]
8007f56: b29b uxth r3, r3
8007f58: f3c3 0309 ubfx r3, r3, #0, #10
8007f5c: b29a uxth r2, r3
8007f5e: 6dbb ldr r3, [r7, #88] @ 0x58
8007f60: 801a strh r2, [r3, #0]
8007f62: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f66: 2b3e cmp r3, #62 @ 0x3e
8007f68: d91d bls.n 8007fa6 <HAL_PCD_EP_DB_Transmit+0x700>
8007f6a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f6e: 095b lsrs r3, r3, #5
8007f70: 66bb str r3, [r7, #104] @ 0x68
8007f72: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f76: f003 031f and.w r3, r3, #31
8007f7a: 2b00 cmp r3, #0
8007f7c: d102 bne.n 8007f84 <HAL_PCD_EP_DB_Transmit+0x6de>
8007f7e: 6ebb ldr r3, [r7, #104] @ 0x68
8007f80: 3b01 subs r3, #1
8007f82: 66bb str r3, [r7, #104] @ 0x68
8007f84: 6dbb ldr r3, [r7, #88] @ 0x58
8007f86: 881b ldrh r3, [r3, #0]
8007f88: b29a uxth r2, r3
8007f8a: 6ebb ldr r3, [r7, #104] @ 0x68
8007f8c: b29b uxth r3, r3
8007f8e: 029b lsls r3, r3, #10
8007f90: b29b uxth r3, r3
8007f92: 4313 orrs r3, r2
8007f94: b29b uxth r3, r3
8007f96: ea6f 4343 mvn.w r3, r3, lsl #17
8007f9a: ea6f 4353 mvn.w r3, r3, lsr #17
8007f9e: b29a uxth r2, r3
8007fa0: 6dbb ldr r3, [r7, #88] @ 0x58
8007fa2: 801a strh r2, [r3, #0]
8007fa4: e041 b.n 800802a <HAL_PCD_EP_DB_Transmit+0x784>
8007fa6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007faa: 2b00 cmp r3, #0
8007fac: d10a bne.n 8007fc4 <HAL_PCD_EP_DB_Transmit+0x71e>
8007fae: 6dbb ldr r3, [r7, #88] @ 0x58
8007fb0: 881b ldrh r3, [r3, #0]
8007fb2: b29b uxth r3, r3
8007fb4: ea6f 4343 mvn.w r3, r3, lsl #17
8007fb8: ea6f 4353 mvn.w r3, r3, lsr #17
8007fbc: b29a uxth r2, r3
8007fbe: 6dbb ldr r3, [r7, #88] @ 0x58
8007fc0: 801a strh r2, [r3, #0]
8007fc2: e032 b.n 800802a <HAL_PCD_EP_DB_Transmit+0x784>
8007fc4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007fc8: 085b lsrs r3, r3, #1
8007fca: 66bb str r3, [r7, #104] @ 0x68
8007fcc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007fd0: f003 0301 and.w r3, r3, #1
8007fd4: 2b00 cmp r3, #0
8007fd6: d002 beq.n 8007fde <HAL_PCD_EP_DB_Transmit+0x738>
8007fd8: 6ebb ldr r3, [r7, #104] @ 0x68
8007fda: 3301 adds r3, #1
8007fdc: 66bb str r3, [r7, #104] @ 0x68
8007fde: 6dbb ldr r3, [r7, #88] @ 0x58
8007fe0: 881b ldrh r3, [r3, #0]
8007fe2: b29a uxth r2, r3
8007fe4: 6ebb ldr r3, [r7, #104] @ 0x68
8007fe6: b29b uxth r3, r3
8007fe8: 029b lsls r3, r3, #10
8007fea: b29b uxth r3, r3
8007fec: 4313 orrs r3, r2
8007fee: b29a uxth r2, r3
8007ff0: 6dbb ldr r3, [r7, #88] @ 0x58
8007ff2: 801a strh r2, [r3, #0]
8007ff4: e019 b.n 800802a <HAL_PCD_EP_DB_Transmit+0x784>
8007ff6: 68bb ldr r3, [r7, #8]
8007ff8: 785b ldrb r3, [r3, #1]
8007ffa: 2b01 cmp r3, #1
8007ffc: d115 bne.n 800802a <HAL_PCD_EP_DB_Transmit+0x784>
8007ffe: 68fb ldr r3, [r7, #12]
8008000: 681b ldr r3, [r3, #0]
8008002: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008006: b29b uxth r3, r3
8008008: 461a mov r2, r3
800800a: 6d7b ldr r3, [r7, #84] @ 0x54
800800c: 4413 add r3, r2
800800e: 657b str r3, [r7, #84] @ 0x54
8008010: 68bb ldr r3, [r7, #8]
8008012: 781b ldrb r3, [r3, #0]
8008014: 011a lsls r2, r3, #4
8008016: 6d7b ldr r3, [r7, #84] @ 0x54
8008018: 4413 add r3, r2
800801a: f203 430c addw r3, r3, #1036 @ 0x40c
800801e: 653b str r3, [r7, #80] @ 0x50
8008020: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8008024: b29a uxth r2, r3
8008026: 6d3b ldr r3, [r7, #80] @ 0x50
8008028: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
800802a: 68fb ldr r3, [r7, #12]
800802c: 6818 ldr r0, [r3, #0]
800802e: 68bb ldr r3, [r7, #8]
8008030: 6959 ldr r1, [r3, #20]
8008032: 68bb ldr r3, [r7, #8]
8008034: 895a ldrh r2, [r3, #10]
8008036: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800803a: b29b uxth r3, r3
800803c: f004 f8cb bl 800c1d6 <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8008040: 68fb ldr r3, [r7, #12]
8008042: 681b ldr r3, [r3, #0]
8008044: 461a mov r2, r3
8008046: 68bb ldr r3, [r7, #8]
8008048: 781b ldrb r3, [r3, #0]
800804a: 009b lsls r3, r3, #2
800804c: 4413 add r3, r2
800804e: 881b ldrh r3, [r3, #0]
8008050: b29b uxth r3, r3
8008052: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008056: f023 0340 bic.w r3, r3, #64 @ 0x40
800805a: 82bb strh r3, [r7, #20]
800805c: 8abb ldrh r3, [r7, #20]
800805e: f083 0310 eor.w r3, r3, #16
8008062: 82bb strh r3, [r7, #20]
8008064: 8abb ldrh r3, [r7, #20]
8008066: f083 0320 eor.w r3, r3, #32
800806a: 82bb strh r3, [r7, #20]
800806c: 68fb ldr r3, [r7, #12]
800806e: 681b ldr r3, [r3, #0]
8008070: 461a mov r2, r3
8008072: 68bb ldr r3, [r7, #8]
8008074: 781b ldrb r3, [r3, #0]
8008076: 009b lsls r3, r3, #2
8008078: 441a add r2, r3
800807a: 8abb ldrh r3, [r7, #20]
800807c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008080: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008084: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008088: f043 0380 orr.w r3, r3, #128 @ 0x80
800808c: b29b uxth r3, r3
800808e: 8013 strh r3, [r2, #0]
return HAL_OK;
8008090: 2300 movs r3, #0
}
8008092: 4618 mov r0, r3
8008094: 3790 adds r7, #144 @ 0x90
8008096: 46bd mov sp, r7
8008098: bd80 pop {r7, pc}
0800809a <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
800809a: b480 push {r7}
800809c: b087 sub sp, #28
800809e: af00 add r7, sp, #0
80080a0: 60f8 str r0, [r7, #12]
80080a2: 607b str r3, [r7, #4]
80080a4: 460b mov r3, r1
80080a6: 817b strh r3, [r7, #10]
80080a8: 4613 mov r3, r2
80080aa: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
80080ac: 897b ldrh r3, [r7, #10]
80080ae: f003 0380 and.w r3, r3, #128 @ 0x80
80080b2: b29b uxth r3, r3
80080b4: 2b00 cmp r3, #0
80080b6: d00b beq.n 80080d0 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80080b8: 897b ldrh r3, [r7, #10]
80080ba: f003 0207 and.w r2, r3, #7
80080be: 4613 mov r3, r2
80080c0: 009b lsls r3, r3, #2
80080c2: 4413 add r3, r2
80080c4: 00db lsls r3, r3, #3
80080c6: 3310 adds r3, #16
80080c8: 68fa ldr r2, [r7, #12]
80080ca: 4413 add r3, r2
80080cc: 617b str r3, [r7, #20]
80080ce: e009 b.n 80080e4 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
80080d0: 897a ldrh r2, [r7, #10]
80080d2: 4613 mov r3, r2
80080d4: 009b lsls r3, r3, #2
80080d6: 4413 add r3, r2
80080d8: 00db lsls r3, r3, #3
80080da: f503 73a8 add.w r3, r3, #336 @ 0x150
80080de: 68fa ldr r2, [r7, #12]
80080e0: 4413 add r3, r2
80080e2: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
80080e4: 893b ldrh r3, [r7, #8]
80080e6: 2b00 cmp r3, #0
80080e8: d107 bne.n 80080fa <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
80080ea: 697b ldr r3, [r7, #20]
80080ec: 2200 movs r2, #0
80080ee: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
80080f0: 687b ldr r3, [r7, #4]
80080f2: b29a uxth r2, r3
80080f4: 697b ldr r3, [r7, #20]
80080f6: 80da strh r2, [r3, #6]
80080f8: e00b b.n 8008112 <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
80080fa: 697b ldr r3, [r7, #20]
80080fc: 2201 movs r2, #1
80080fe: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8008100: 687b ldr r3, [r7, #4]
8008102: b29a uxth r2, r3
8008104: 697b ldr r3, [r7, #20]
8008106: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8008108: 687b ldr r3, [r7, #4]
800810a: 0c1b lsrs r3, r3, #16
800810c: b29a uxth r2, r3
800810e: 697b ldr r3, [r7, #20]
8008110: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8008112: 2300 movs r3, #0
}
8008114: 4618 mov r0, r3
8008116: 371c adds r7, #28
8008118: 46bd mov sp, r7
800811a: bc80 pop {r7}
800811c: 4770 bx lr
...
08008120 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8008120: b580 push {r7, lr}
8008122: b086 sub sp, #24
8008124: af00 add r7, sp, #0
8008126: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8008128: 687b ldr r3, [r7, #4]
800812a: 2b00 cmp r3, #0
800812c: d101 bne.n 8008132 <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
800812e: 2301 movs r3, #1
8008130: e272 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8008132: 687b ldr r3, [r7, #4]
8008134: 681b ldr r3, [r3, #0]
8008136: f003 0301 and.w r3, r3, #1
800813a: 2b00 cmp r3, #0
800813c: f000 8087 beq.w 800824e <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8008140: 4b92 ldr r3, [pc, #584] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008142: 685b ldr r3, [r3, #4]
8008144: f003 030c and.w r3, r3, #12
8008148: 2b04 cmp r3, #4
800814a: d00c beq.n 8008166 <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
800814c: 4b8f ldr r3, [pc, #572] @ (800838c <HAL_RCC_OscConfig+0x26c>)
800814e: 685b ldr r3, [r3, #4]
8008150: f003 030c and.w r3, r3, #12
8008154: 2b08 cmp r3, #8
8008156: d112 bne.n 800817e <HAL_RCC_OscConfig+0x5e>
8008158: 4b8c ldr r3, [pc, #560] @ (800838c <HAL_RCC_OscConfig+0x26c>)
800815a: 685b ldr r3, [r3, #4]
800815c: f403 3380 and.w r3, r3, #65536 @ 0x10000
8008160: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8008164: d10b bne.n 800817e <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8008166: 4b89 ldr r3, [pc, #548] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008168: 681b ldr r3, [r3, #0]
800816a: f403 3300 and.w r3, r3, #131072 @ 0x20000
800816e: 2b00 cmp r3, #0
8008170: d06c beq.n 800824c <HAL_RCC_OscConfig+0x12c>
8008172: 687b ldr r3, [r7, #4]
8008174: 685b ldr r3, [r3, #4]
8008176: 2b00 cmp r3, #0
8008178: d168 bne.n 800824c <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
800817a: 2301 movs r3, #1
800817c: e24c b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
800817e: 687b ldr r3, [r7, #4]
8008180: 685b ldr r3, [r3, #4]
8008182: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8008186: d106 bne.n 8008196 <HAL_RCC_OscConfig+0x76>
8008188: 4b80 ldr r3, [pc, #512] @ (800838c <HAL_RCC_OscConfig+0x26c>)
800818a: 681b ldr r3, [r3, #0]
800818c: 4a7f ldr r2, [pc, #508] @ (800838c <HAL_RCC_OscConfig+0x26c>)
800818e: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8008192: 6013 str r3, [r2, #0]
8008194: e02e b.n 80081f4 <HAL_RCC_OscConfig+0xd4>
8008196: 687b ldr r3, [r7, #4]
8008198: 685b ldr r3, [r3, #4]
800819a: 2b00 cmp r3, #0
800819c: d10c bne.n 80081b8 <HAL_RCC_OscConfig+0x98>
800819e: 4b7b ldr r3, [pc, #492] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081a0: 681b ldr r3, [r3, #0]
80081a2: 4a7a ldr r2, [pc, #488] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081a4: f423 3380 bic.w r3, r3, #65536 @ 0x10000
80081a8: 6013 str r3, [r2, #0]
80081aa: 4b78 ldr r3, [pc, #480] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081ac: 681b ldr r3, [r3, #0]
80081ae: 4a77 ldr r2, [pc, #476] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081b0: f423 2380 bic.w r3, r3, #262144 @ 0x40000
80081b4: 6013 str r3, [r2, #0]
80081b6: e01d b.n 80081f4 <HAL_RCC_OscConfig+0xd4>
80081b8: 687b ldr r3, [r7, #4]
80081ba: 685b ldr r3, [r3, #4]
80081bc: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
80081c0: d10c bne.n 80081dc <HAL_RCC_OscConfig+0xbc>
80081c2: 4b72 ldr r3, [pc, #456] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081c4: 681b ldr r3, [r3, #0]
80081c6: 4a71 ldr r2, [pc, #452] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081c8: f443 2380 orr.w r3, r3, #262144 @ 0x40000
80081cc: 6013 str r3, [r2, #0]
80081ce: 4b6f ldr r3, [pc, #444] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081d0: 681b ldr r3, [r3, #0]
80081d2: 4a6e ldr r2, [pc, #440] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081d4: f443 3380 orr.w r3, r3, #65536 @ 0x10000
80081d8: 6013 str r3, [r2, #0]
80081da: e00b b.n 80081f4 <HAL_RCC_OscConfig+0xd4>
80081dc: 4b6b ldr r3, [pc, #428] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081de: 681b ldr r3, [r3, #0]
80081e0: 4a6a ldr r2, [pc, #424] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081e2: f423 3380 bic.w r3, r3, #65536 @ 0x10000
80081e6: 6013 str r3, [r2, #0]
80081e8: 4b68 ldr r3, [pc, #416] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081ea: 681b ldr r3, [r3, #0]
80081ec: 4a67 ldr r2, [pc, #412] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80081ee: f423 2380 bic.w r3, r3, #262144 @ 0x40000
80081f2: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
80081f4: 687b ldr r3, [r7, #4]
80081f6: 685b ldr r3, [r3, #4]
80081f8: 2b00 cmp r3, #0
80081fa: d013 beq.n 8008224 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80081fc: f7fc ffa4 bl 8005148 <HAL_GetTick>
8008200: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8008202: e008 b.n 8008216 <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8008204: f7fc ffa0 bl 8005148 <HAL_GetTick>
8008208: 4602 mov r2, r0
800820a: 693b ldr r3, [r7, #16]
800820c: 1ad3 subs r3, r2, r3
800820e: 2b64 cmp r3, #100 @ 0x64
8008210: d901 bls.n 8008216 <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8008212: 2303 movs r3, #3
8008214: e200 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8008216: 4b5d ldr r3, [pc, #372] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008218: 681b ldr r3, [r3, #0]
800821a: f403 3300 and.w r3, r3, #131072 @ 0x20000
800821e: 2b00 cmp r3, #0
8008220: d0f0 beq.n 8008204 <HAL_RCC_OscConfig+0xe4>
8008222: e014 b.n 800824e <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008224: f7fc ff90 bl 8005148 <HAL_GetTick>
8008228: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
800822a: e008 b.n 800823e <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
800822c: f7fc ff8c bl 8005148 <HAL_GetTick>
8008230: 4602 mov r2, r0
8008232: 693b ldr r3, [r7, #16]
8008234: 1ad3 subs r3, r2, r3
8008236: 2b64 cmp r3, #100 @ 0x64
8008238: d901 bls.n 800823e <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
800823a: 2303 movs r3, #3
800823c: e1ec b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
800823e: 4b53 ldr r3, [pc, #332] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008240: 681b ldr r3, [r3, #0]
8008242: f403 3300 and.w r3, r3, #131072 @ 0x20000
8008246: 2b00 cmp r3, #0
8008248: d1f0 bne.n 800822c <HAL_RCC_OscConfig+0x10c>
800824a: e000 b.n 800824e <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
800824c: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
800824e: 687b ldr r3, [r7, #4]
8008250: 681b ldr r3, [r3, #0]
8008252: f003 0302 and.w r3, r3, #2
8008256: 2b00 cmp r3, #0
8008258: d063 beq.n 8008322 <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
800825a: 4b4c ldr r3, [pc, #304] @ (800838c <HAL_RCC_OscConfig+0x26c>)
800825c: 685b ldr r3, [r3, #4]
800825e: f003 030c and.w r3, r3, #12
8008262: 2b00 cmp r3, #0
8008264: d00b beq.n 800827e <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
8008266: 4b49 ldr r3, [pc, #292] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008268: 685b ldr r3, [r3, #4]
800826a: f003 030c and.w r3, r3, #12
800826e: 2b08 cmp r3, #8
8008270: d11c bne.n 80082ac <HAL_RCC_OscConfig+0x18c>
8008272: 4b46 ldr r3, [pc, #280] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008274: 685b ldr r3, [r3, #4]
8008276: f403 3380 and.w r3, r3, #65536 @ 0x10000
800827a: 2b00 cmp r3, #0
800827c: d116 bne.n 80082ac <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
800827e: 4b43 ldr r3, [pc, #268] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008280: 681b ldr r3, [r3, #0]
8008282: f003 0302 and.w r3, r3, #2
8008286: 2b00 cmp r3, #0
8008288: d005 beq.n 8008296 <HAL_RCC_OscConfig+0x176>
800828a: 687b ldr r3, [r7, #4]
800828c: 691b ldr r3, [r3, #16]
800828e: 2b01 cmp r3, #1
8008290: d001 beq.n 8008296 <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
8008292: 2301 movs r3, #1
8008294: e1c0 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8008296: 4b3d ldr r3, [pc, #244] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008298: 681b ldr r3, [r3, #0]
800829a: f023 02f8 bic.w r2, r3, #248 @ 0xf8
800829e: 687b ldr r3, [r7, #4]
80082a0: 695b ldr r3, [r3, #20]
80082a2: 00db lsls r3, r3, #3
80082a4: 4939 ldr r1, [pc, #228] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80082a6: 4313 orrs r3, r2
80082a8: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
80082aa: e03a b.n 8008322 <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
80082ac: 687b ldr r3, [r7, #4]
80082ae: 691b ldr r3, [r3, #16]
80082b0: 2b00 cmp r3, #0
80082b2: d020 beq.n 80082f6 <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
80082b4: 4b36 ldr r3, [pc, #216] @ (8008390 <HAL_RCC_OscConfig+0x270>)
80082b6: 2201 movs r2, #1
80082b8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80082ba: f7fc ff45 bl 8005148 <HAL_GetTick>
80082be: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80082c0: e008 b.n 80082d4 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
80082c2: f7fc ff41 bl 8005148 <HAL_GetTick>
80082c6: 4602 mov r2, r0
80082c8: 693b ldr r3, [r7, #16]
80082ca: 1ad3 subs r3, r2, r3
80082cc: 2b02 cmp r3, #2
80082ce: d901 bls.n 80082d4 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
80082d0: 2303 movs r3, #3
80082d2: e1a1 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80082d4: 4b2d ldr r3, [pc, #180] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80082d6: 681b ldr r3, [r3, #0]
80082d8: f003 0302 and.w r3, r3, #2
80082dc: 2b00 cmp r3, #0
80082de: d0f0 beq.n 80082c2 <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
80082e0: 4b2a ldr r3, [pc, #168] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80082e2: 681b ldr r3, [r3, #0]
80082e4: f023 02f8 bic.w r2, r3, #248 @ 0xf8
80082e8: 687b ldr r3, [r7, #4]
80082ea: 695b ldr r3, [r3, #20]
80082ec: 00db lsls r3, r3, #3
80082ee: 4927 ldr r1, [pc, #156] @ (800838c <HAL_RCC_OscConfig+0x26c>)
80082f0: 4313 orrs r3, r2
80082f2: 600b str r3, [r1, #0]
80082f4: e015 b.n 8008322 <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
80082f6: 4b26 ldr r3, [pc, #152] @ (8008390 <HAL_RCC_OscConfig+0x270>)
80082f8: 2200 movs r2, #0
80082fa: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80082fc: f7fc ff24 bl 8005148 <HAL_GetTick>
8008300: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8008302: e008 b.n 8008316 <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8008304: f7fc ff20 bl 8005148 <HAL_GetTick>
8008308: 4602 mov r2, r0
800830a: 693b ldr r3, [r7, #16]
800830c: 1ad3 subs r3, r2, r3
800830e: 2b02 cmp r3, #2
8008310: d901 bls.n 8008316 <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
8008312: 2303 movs r3, #3
8008314: e180 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8008316: 4b1d ldr r3, [pc, #116] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008318: 681b ldr r3, [r3, #0]
800831a: f003 0302 and.w r3, r3, #2
800831e: 2b00 cmp r3, #0
8008320: d1f0 bne.n 8008304 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8008322: 687b ldr r3, [r7, #4]
8008324: 681b ldr r3, [r3, #0]
8008326: f003 0308 and.w r3, r3, #8
800832a: 2b00 cmp r3, #0
800832c: d03a beq.n 80083a4 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
800832e: 687b ldr r3, [r7, #4]
8008330: 699b ldr r3, [r3, #24]
8008332: 2b00 cmp r3, #0
8008334: d019 beq.n 800836a <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8008336: 4b17 ldr r3, [pc, #92] @ (8008394 <HAL_RCC_OscConfig+0x274>)
8008338: 2201 movs r2, #1
800833a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800833c: f7fc ff04 bl 8005148 <HAL_GetTick>
8008340: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8008342: e008 b.n 8008356 <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8008344: f7fc ff00 bl 8005148 <HAL_GetTick>
8008348: 4602 mov r2, r0
800834a: 693b ldr r3, [r7, #16]
800834c: 1ad3 subs r3, r2, r3
800834e: 2b02 cmp r3, #2
8008350: d901 bls.n 8008356 <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
8008352: 2303 movs r3, #3
8008354: e160 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8008356: 4b0d ldr r3, [pc, #52] @ (800838c <HAL_RCC_OscConfig+0x26c>)
8008358: 6a5b ldr r3, [r3, #36] @ 0x24
800835a: f003 0302 and.w r3, r3, #2
800835e: 2b00 cmp r3, #0
8008360: d0f0 beq.n 8008344 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
8008362: 2001 movs r0, #1
8008364: f000 fad0 bl 8008908 <RCC_Delay>
8008368: e01c b.n 80083a4 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
800836a: 4b0a ldr r3, [pc, #40] @ (8008394 <HAL_RCC_OscConfig+0x274>)
800836c: 2200 movs r2, #0
800836e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008370: f7fc feea bl 8005148 <HAL_GetTick>
8008374: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8008376: e00f b.n 8008398 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8008378: f7fc fee6 bl 8005148 <HAL_GetTick>
800837c: 4602 mov r2, r0
800837e: 693b ldr r3, [r7, #16]
8008380: 1ad3 subs r3, r2, r3
8008382: 2b02 cmp r3, #2
8008384: d908 bls.n 8008398 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
8008386: 2303 movs r3, #3
8008388: e146 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
800838a: bf00 nop
800838c: 40021000 .word 0x40021000
8008390: 42420000 .word 0x42420000
8008394: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8008398: 4b92 ldr r3, [pc, #584] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800839a: 6a5b ldr r3, [r3, #36] @ 0x24
800839c: f003 0302 and.w r3, r3, #2
80083a0: 2b00 cmp r3, #0
80083a2: d1e9 bne.n 8008378 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
80083a4: 687b ldr r3, [r7, #4]
80083a6: 681b ldr r3, [r3, #0]
80083a8: f003 0304 and.w r3, r3, #4
80083ac: 2b00 cmp r3, #0
80083ae: f000 80a6 beq.w 80084fe <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
80083b2: 2300 movs r3, #0
80083b4: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80083b6: 4b8b ldr r3, [pc, #556] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80083b8: 69db ldr r3, [r3, #28]
80083ba: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80083be: 2b00 cmp r3, #0
80083c0: d10d bne.n 80083de <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
80083c2: 4b88 ldr r3, [pc, #544] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80083c4: 69db ldr r3, [r3, #28]
80083c6: 4a87 ldr r2, [pc, #540] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80083c8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80083cc: 61d3 str r3, [r2, #28]
80083ce: 4b85 ldr r3, [pc, #532] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80083d0: 69db ldr r3, [r3, #28]
80083d2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80083d6: 60bb str r3, [r7, #8]
80083d8: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
80083da: 2301 movs r3, #1
80083dc: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80083de: 4b82 ldr r3, [pc, #520] @ (80085e8 <HAL_RCC_OscConfig+0x4c8>)
80083e0: 681b ldr r3, [r3, #0]
80083e2: f403 7380 and.w r3, r3, #256 @ 0x100
80083e6: 2b00 cmp r3, #0
80083e8: d118 bne.n 800841c <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
80083ea: 4b7f ldr r3, [pc, #508] @ (80085e8 <HAL_RCC_OscConfig+0x4c8>)
80083ec: 681b ldr r3, [r3, #0]
80083ee: 4a7e ldr r2, [pc, #504] @ (80085e8 <HAL_RCC_OscConfig+0x4c8>)
80083f0: f443 7380 orr.w r3, r3, #256 @ 0x100
80083f4: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
80083f6: f7fc fea7 bl 8005148 <HAL_GetTick>
80083fa: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80083fc: e008 b.n 8008410 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
80083fe: f7fc fea3 bl 8005148 <HAL_GetTick>
8008402: 4602 mov r2, r0
8008404: 693b ldr r3, [r7, #16]
8008406: 1ad3 subs r3, r2, r3
8008408: 2b64 cmp r3, #100 @ 0x64
800840a: d901 bls.n 8008410 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
800840c: 2303 movs r3, #3
800840e: e103 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008410: 4b75 ldr r3, [pc, #468] @ (80085e8 <HAL_RCC_OscConfig+0x4c8>)
8008412: 681b ldr r3, [r3, #0]
8008414: f403 7380 and.w r3, r3, #256 @ 0x100
8008418: 2b00 cmp r3, #0
800841a: d0f0 beq.n 80083fe <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
800841c: 687b ldr r3, [r7, #4]
800841e: 68db ldr r3, [r3, #12]
8008420: 2b01 cmp r3, #1
8008422: d106 bne.n 8008432 <HAL_RCC_OscConfig+0x312>
8008424: 4b6f ldr r3, [pc, #444] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008426: 6a1b ldr r3, [r3, #32]
8008428: 4a6e ldr r2, [pc, #440] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800842a: f043 0301 orr.w r3, r3, #1
800842e: 6213 str r3, [r2, #32]
8008430: e02d b.n 800848e <HAL_RCC_OscConfig+0x36e>
8008432: 687b ldr r3, [r7, #4]
8008434: 68db ldr r3, [r3, #12]
8008436: 2b00 cmp r3, #0
8008438: d10c bne.n 8008454 <HAL_RCC_OscConfig+0x334>
800843a: 4b6a ldr r3, [pc, #424] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800843c: 6a1b ldr r3, [r3, #32]
800843e: 4a69 ldr r2, [pc, #420] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008440: f023 0301 bic.w r3, r3, #1
8008444: 6213 str r3, [r2, #32]
8008446: 4b67 ldr r3, [pc, #412] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008448: 6a1b ldr r3, [r3, #32]
800844a: 4a66 ldr r2, [pc, #408] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800844c: f023 0304 bic.w r3, r3, #4
8008450: 6213 str r3, [r2, #32]
8008452: e01c b.n 800848e <HAL_RCC_OscConfig+0x36e>
8008454: 687b ldr r3, [r7, #4]
8008456: 68db ldr r3, [r3, #12]
8008458: 2b05 cmp r3, #5
800845a: d10c bne.n 8008476 <HAL_RCC_OscConfig+0x356>
800845c: 4b61 ldr r3, [pc, #388] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800845e: 6a1b ldr r3, [r3, #32]
8008460: 4a60 ldr r2, [pc, #384] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008462: f043 0304 orr.w r3, r3, #4
8008466: 6213 str r3, [r2, #32]
8008468: 4b5e ldr r3, [pc, #376] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800846a: 6a1b ldr r3, [r3, #32]
800846c: 4a5d ldr r2, [pc, #372] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800846e: f043 0301 orr.w r3, r3, #1
8008472: 6213 str r3, [r2, #32]
8008474: e00b b.n 800848e <HAL_RCC_OscConfig+0x36e>
8008476: 4b5b ldr r3, [pc, #364] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008478: 6a1b ldr r3, [r3, #32]
800847a: 4a5a ldr r2, [pc, #360] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800847c: f023 0301 bic.w r3, r3, #1
8008480: 6213 str r3, [r2, #32]
8008482: 4b58 ldr r3, [pc, #352] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008484: 6a1b ldr r3, [r3, #32]
8008486: 4a57 ldr r2, [pc, #348] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008488: f023 0304 bic.w r3, r3, #4
800848c: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
800848e: 687b ldr r3, [r7, #4]
8008490: 68db ldr r3, [r3, #12]
8008492: 2b00 cmp r3, #0
8008494: d015 beq.n 80084c2 <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008496: f7fc fe57 bl 8005148 <HAL_GetTick>
800849a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800849c: e00a b.n 80084b4 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800849e: f7fc fe53 bl 8005148 <HAL_GetTick>
80084a2: 4602 mov r2, r0
80084a4: 693b ldr r3, [r7, #16]
80084a6: 1ad3 subs r3, r2, r3
80084a8: f241 3288 movw r2, #5000 @ 0x1388
80084ac: 4293 cmp r3, r2
80084ae: d901 bls.n 80084b4 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
80084b0: 2303 movs r3, #3
80084b2: e0b1 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80084b4: 4b4b ldr r3, [pc, #300] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80084b6: 6a1b ldr r3, [r3, #32]
80084b8: f003 0302 and.w r3, r3, #2
80084bc: 2b00 cmp r3, #0
80084be: d0ee beq.n 800849e <HAL_RCC_OscConfig+0x37e>
80084c0: e014 b.n 80084ec <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80084c2: f7fc fe41 bl 8005148 <HAL_GetTick>
80084c6: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80084c8: e00a b.n 80084e0 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80084ca: f7fc fe3d bl 8005148 <HAL_GetTick>
80084ce: 4602 mov r2, r0
80084d0: 693b ldr r3, [r7, #16]
80084d2: 1ad3 subs r3, r2, r3
80084d4: f241 3288 movw r2, #5000 @ 0x1388
80084d8: 4293 cmp r3, r2
80084da: d901 bls.n 80084e0 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
80084dc: 2303 movs r3, #3
80084de: e09b b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80084e0: 4b40 ldr r3, [pc, #256] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80084e2: 6a1b ldr r3, [r3, #32]
80084e4: f003 0302 and.w r3, r3, #2
80084e8: 2b00 cmp r3, #0
80084ea: d1ee bne.n 80084ca <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
80084ec: 7dfb ldrb r3, [r7, #23]
80084ee: 2b01 cmp r3, #1
80084f0: d105 bne.n 80084fe <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
80084f2: 4b3c ldr r3, [pc, #240] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80084f4: 69db ldr r3, [r3, #28]
80084f6: 4a3b ldr r2, [pc, #236] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80084f8: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
80084fc: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
80084fe: 687b ldr r3, [r7, #4]
8008500: 69db ldr r3, [r3, #28]
8008502: 2b00 cmp r3, #0
8008504: f000 8087 beq.w 8008616 <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8008508: 4b36 ldr r3, [pc, #216] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800850a: 685b ldr r3, [r3, #4]
800850c: f003 030c and.w r3, r3, #12
8008510: 2b08 cmp r3, #8
8008512: d061 beq.n 80085d8 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8008514: 687b ldr r3, [r7, #4]
8008516: 69db ldr r3, [r3, #28]
8008518: 2b02 cmp r3, #2
800851a: d146 bne.n 80085aa <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
800851c: 4b33 ldr r3, [pc, #204] @ (80085ec <HAL_RCC_OscConfig+0x4cc>)
800851e: 2200 movs r2, #0
8008520: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008522: f7fc fe11 bl 8005148 <HAL_GetTick>
8008526: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8008528: e008 b.n 800853c <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800852a: f7fc fe0d bl 8005148 <HAL_GetTick>
800852e: 4602 mov r2, r0
8008530: 693b ldr r3, [r7, #16]
8008532: 1ad3 subs r3, r2, r3
8008534: 2b02 cmp r3, #2
8008536: d901 bls.n 800853c <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
8008538: 2303 movs r3, #3
800853a: e06d b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800853c: 4b29 ldr r3, [pc, #164] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800853e: 681b ldr r3, [r3, #0]
8008540: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8008544: 2b00 cmp r3, #0
8008546: d1f0 bne.n 800852a <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
8008548: 687b ldr r3, [r7, #4]
800854a: 6a1b ldr r3, [r3, #32]
800854c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8008550: d108 bne.n 8008564 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
8008552: 4b24 ldr r3, [pc, #144] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008554: 685b ldr r3, [r3, #4]
8008556: f423 3200 bic.w r2, r3, #131072 @ 0x20000
800855a: 687b ldr r3, [r7, #4]
800855c: 689b ldr r3, [r3, #8]
800855e: 4921 ldr r1, [pc, #132] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008560: 4313 orrs r3, r2
8008562: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8008564: 4b1f ldr r3, [pc, #124] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008566: 685b ldr r3, [r3, #4]
8008568: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
800856c: 687b ldr r3, [r7, #4]
800856e: 6a19 ldr r1, [r3, #32]
8008570: 687b ldr r3, [r7, #4]
8008572: 6a5b ldr r3, [r3, #36] @ 0x24
8008574: 430b orrs r3, r1
8008576: 491b ldr r1, [pc, #108] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
8008578: 4313 orrs r3, r2
800857a: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
800857c: 4b1b ldr r3, [pc, #108] @ (80085ec <HAL_RCC_OscConfig+0x4cc>)
800857e: 2201 movs r2, #1
8008580: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008582: f7fc fde1 bl 8005148 <HAL_GetTick>
8008586: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8008588: e008 b.n 800859c <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800858a: f7fc fddd bl 8005148 <HAL_GetTick>
800858e: 4602 mov r2, r0
8008590: 693b ldr r3, [r7, #16]
8008592: 1ad3 subs r3, r2, r3
8008594: 2b02 cmp r3, #2
8008596: d901 bls.n 800859c <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8008598: 2303 movs r3, #3
800859a: e03d b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800859c: 4b11 ldr r3, [pc, #68] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
800859e: 681b ldr r3, [r3, #0]
80085a0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80085a4: 2b00 cmp r3, #0
80085a6: d0f0 beq.n 800858a <HAL_RCC_OscConfig+0x46a>
80085a8: e035 b.n 8008616 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80085aa: 4b10 ldr r3, [pc, #64] @ (80085ec <HAL_RCC_OscConfig+0x4cc>)
80085ac: 2200 movs r2, #0
80085ae: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80085b0: f7fc fdca bl 8005148 <HAL_GetTick>
80085b4: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80085b6: e008 b.n 80085ca <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80085b8: f7fc fdc6 bl 8005148 <HAL_GetTick>
80085bc: 4602 mov r2, r0
80085be: 693b ldr r3, [r7, #16]
80085c0: 1ad3 subs r3, r2, r3
80085c2: 2b02 cmp r3, #2
80085c4: d901 bls.n 80085ca <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
80085c6: 2303 movs r3, #3
80085c8: e026 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80085ca: 4b06 ldr r3, [pc, #24] @ (80085e4 <HAL_RCC_OscConfig+0x4c4>)
80085cc: 681b ldr r3, [r3, #0]
80085ce: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80085d2: 2b00 cmp r3, #0
80085d4: d1f0 bne.n 80085b8 <HAL_RCC_OscConfig+0x498>
80085d6: e01e b.n 8008616 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
80085d8: 687b ldr r3, [r7, #4]
80085da: 69db ldr r3, [r3, #28]
80085dc: 2b01 cmp r3, #1
80085de: d107 bne.n 80085f0 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
80085e0: 2301 movs r3, #1
80085e2: e019 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
80085e4: 40021000 .word 0x40021000
80085e8: 40007000 .word 0x40007000
80085ec: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
80085f0: 4b0b ldr r3, [pc, #44] @ (8008620 <HAL_RCC_OscConfig+0x500>)
80085f2: 685b ldr r3, [r3, #4]
80085f4: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
80085f6: 68fb ldr r3, [r7, #12]
80085f8: f403 3280 and.w r2, r3, #65536 @ 0x10000
80085fc: 687b ldr r3, [r7, #4]
80085fe: 6a1b ldr r3, [r3, #32]
8008600: 429a cmp r2, r3
8008602: d106 bne.n 8008612 <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8008604: 68fb ldr r3, [r7, #12]
8008606: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
800860a: 687b ldr r3, [r7, #4]
800860c: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800860e: 429a cmp r2, r3
8008610: d001 beq.n 8008616 <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8008612: 2301 movs r3, #1
8008614: e000 b.n 8008618 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
8008616: 2300 movs r3, #0
}
8008618: 4618 mov r0, r3
800861a: 3718 adds r7, #24
800861c: 46bd mov sp, r7
800861e: bd80 pop {r7, pc}
8008620: 40021000 .word 0x40021000
08008624 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8008624: b580 push {r7, lr}
8008626: b084 sub sp, #16
8008628: af00 add r7, sp, #0
800862a: 6078 str r0, [r7, #4]
800862c: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
800862e: 687b ldr r3, [r7, #4]
8008630: 2b00 cmp r3, #0
8008632: d101 bne.n 8008638 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8008634: 2301 movs r3, #1
8008636: e0d0 b.n 80087da <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8008638: 4b6a ldr r3, [pc, #424] @ (80087e4 <HAL_RCC_ClockConfig+0x1c0>)
800863a: 681b ldr r3, [r3, #0]
800863c: f003 0307 and.w r3, r3, #7
8008640: 683a ldr r2, [r7, #0]
8008642: 429a cmp r2, r3
8008644: d910 bls.n 8008668 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8008646: 4b67 ldr r3, [pc, #412] @ (80087e4 <HAL_RCC_ClockConfig+0x1c0>)
8008648: 681b ldr r3, [r3, #0]
800864a: f023 0207 bic.w r2, r3, #7
800864e: 4965 ldr r1, [pc, #404] @ (80087e4 <HAL_RCC_ClockConfig+0x1c0>)
8008650: 683b ldr r3, [r7, #0]
8008652: 4313 orrs r3, r2
8008654: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8008656: 4b63 ldr r3, [pc, #396] @ (80087e4 <HAL_RCC_ClockConfig+0x1c0>)
8008658: 681b ldr r3, [r3, #0]
800865a: f003 0307 and.w r3, r3, #7
800865e: 683a ldr r2, [r7, #0]
8008660: 429a cmp r2, r3
8008662: d001 beq.n 8008668 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8008664: 2301 movs r3, #1
8008666: e0b8 b.n 80087da <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8008668: 687b ldr r3, [r7, #4]
800866a: 681b ldr r3, [r3, #0]
800866c: f003 0302 and.w r3, r3, #2
8008670: 2b00 cmp r3, #0
8008672: d020 beq.n 80086b6 <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8008674: 687b ldr r3, [r7, #4]
8008676: 681b ldr r3, [r3, #0]
8008678: f003 0304 and.w r3, r3, #4
800867c: 2b00 cmp r3, #0
800867e: d005 beq.n 800868c <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8008680: 4b59 ldr r3, [pc, #356] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
8008682: 685b ldr r3, [r3, #4]
8008684: 4a58 ldr r2, [pc, #352] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
8008686: f443 63e0 orr.w r3, r3, #1792 @ 0x700
800868a: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800868c: 687b ldr r3, [r7, #4]
800868e: 681b ldr r3, [r3, #0]
8008690: f003 0308 and.w r3, r3, #8
8008694: 2b00 cmp r3, #0
8008696: d005 beq.n 80086a4 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8008698: 4b53 ldr r3, [pc, #332] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
800869a: 685b ldr r3, [r3, #4]
800869c: 4a52 ldr r2, [pc, #328] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
800869e: f443 5360 orr.w r3, r3, #14336 @ 0x3800
80086a2: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
80086a4: 4b50 ldr r3, [pc, #320] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
80086a6: 685b ldr r3, [r3, #4]
80086a8: f023 02f0 bic.w r2, r3, #240 @ 0xf0
80086ac: 687b ldr r3, [r7, #4]
80086ae: 689b ldr r3, [r3, #8]
80086b0: 494d ldr r1, [pc, #308] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
80086b2: 4313 orrs r3, r2
80086b4: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
80086b6: 687b ldr r3, [r7, #4]
80086b8: 681b ldr r3, [r3, #0]
80086ba: f003 0301 and.w r3, r3, #1
80086be: 2b00 cmp r3, #0
80086c0: d040 beq.n 8008744 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
80086c2: 687b ldr r3, [r7, #4]
80086c4: 685b ldr r3, [r3, #4]
80086c6: 2b01 cmp r3, #1
80086c8: d107 bne.n 80086da <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80086ca: 4b47 ldr r3, [pc, #284] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
80086cc: 681b ldr r3, [r3, #0]
80086ce: f403 3300 and.w r3, r3, #131072 @ 0x20000
80086d2: 2b00 cmp r3, #0
80086d4: d115 bne.n 8008702 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80086d6: 2301 movs r3, #1
80086d8: e07f b.n 80087da <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
80086da: 687b ldr r3, [r7, #4]
80086dc: 685b ldr r3, [r3, #4]
80086de: 2b02 cmp r3, #2
80086e0: d107 bne.n 80086f2 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80086e2: 4b41 ldr r3, [pc, #260] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
80086e4: 681b ldr r3, [r3, #0]
80086e6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80086ea: 2b00 cmp r3, #0
80086ec: d109 bne.n 8008702 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80086ee: 2301 movs r3, #1
80086f0: e073 b.n 80087da <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80086f2: 4b3d ldr r3, [pc, #244] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
80086f4: 681b ldr r3, [r3, #0]
80086f6: f003 0302 and.w r3, r3, #2
80086fa: 2b00 cmp r3, #0
80086fc: d101 bne.n 8008702 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80086fe: 2301 movs r3, #1
8008700: e06b b.n 80087da <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8008702: 4b39 ldr r3, [pc, #228] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
8008704: 685b ldr r3, [r3, #4]
8008706: f023 0203 bic.w r2, r3, #3
800870a: 687b ldr r3, [r7, #4]
800870c: 685b ldr r3, [r3, #4]
800870e: 4936 ldr r1, [pc, #216] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
8008710: 4313 orrs r3, r2
8008712: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008714: f7fc fd18 bl 8005148 <HAL_GetTick>
8008718: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800871a: e00a b.n 8008732 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
800871c: f7fc fd14 bl 8005148 <HAL_GetTick>
8008720: 4602 mov r2, r0
8008722: 68fb ldr r3, [r7, #12]
8008724: 1ad3 subs r3, r2, r3
8008726: f241 3288 movw r2, #5000 @ 0x1388
800872a: 4293 cmp r3, r2
800872c: d901 bls.n 8008732 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
800872e: 2303 movs r3, #3
8008730: e053 b.n 80087da <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8008732: 4b2d ldr r3, [pc, #180] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
8008734: 685b ldr r3, [r3, #4]
8008736: f003 020c and.w r2, r3, #12
800873a: 687b ldr r3, [r7, #4]
800873c: 685b ldr r3, [r3, #4]
800873e: 009b lsls r3, r3, #2
8008740: 429a cmp r2, r3
8008742: d1eb bne.n 800871c <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8008744: 4b27 ldr r3, [pc, #156] @ (80087e4 <HAL_RCC_ClockConfig+0x1c0>)
8008746: 681b ldr r3, [r3, #0]
8008748: f003 0307 and.w r3, r3, #7
800874c: 683a ldr r2, [r7, #0]
800874e: 429a cmp r2, r3
8008750: d210 bcs.n 8008774 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8008752: 4b24 ldr r3, [pc, #144] @ (80087e4 <HAL_RCC_ClockConfig+0x1c0>)
8008754: 681b ldr r3, [r3, #0]
8008756: f023 0207 bic.w r2, r3, #7
800875a: 4922 ldr r1, [pc, #136] @ (80087e4 <HAL_RCC_ClockConfig+0x1c0>)
800875c: 683b ldr r3, [r7, #0]
800875e: 4313 orrs r3, r2
8008760: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8008762: 4b20 ldr r3, [pc, #128] @ (80087e4 <HAL_RCC_ClockConfig+0x1c0>)
8008764: 681b ldr r3, [r3, #0]
8008766: f003 0307 and.w r3, r3, #7
800876a: 683a ldr r2, [r7, #0]
800876c: 429a cmp r2, r3
800876e: d001 beq.n 8008774 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8008770: 2301 movs r3, #1
8008772: e032 b.n 80087da <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8008774: 687b ldr r3, [r7, #4]
8008776: 681b ldr r3, [r3, #0]
8008778: f003 0304 and.w r3, r3, #4
800877c: 2b00 cmp r3, #0
800877e: d008 beq.n 8008792 <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8008780: 4b19 ldr r3, [pc, #100] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
8008782: 685b ldr r3, [r3, #4]
8008784: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8008788: 687b ldr r3, [r7, #4]
800878a: 68db ldr r3, [r3, #12]
800878c: 4916 ldr r1, [pc, #88] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
800878e: 4313 orrs r3, r2
8008790: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8008792: 687b ldr r3, [r7, #4]
8008794: 681b ldr r3, [r3, #0]
8008796: f003 0308 and.w r3, r3, #8
800879a: 2b00 cmp r3, #0
800879c: d009 beq.n 80087b2 <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
800879e: 4b12 ldr r3, [pc, #72] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
80087a0: 685b ldr r3, [r3, #4]
80087a2: f423 5260 bic.w r2, r3, #14336 @ 0x3800
80087a6: 687b ldr r3, [r7, #4]
80087a8: 691b ldr r3, [r3, #16]
80087aa: 00db lsls r3, r3, #3
80087ac: 490e ldr r1, [pc, #56] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
80087ae: 4313 orrs r3, r2
80087b0: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
80087b2: f000 f821 bl 80087f8 <HAL_RCC_GetSysClockFreq>
80087b6: 4602 mov r2, r0
80087b8: 4b0b ldr r3, [pc, #44] @ (80087e8 <HAL_RCC_ClockConfig+0x1c4>)
80087ba: 685b ldr r3, [r3, #4]
80087bc: 091b lsrs r3, r3, #4
80087be: f003 030f and.w r3, r3, #15
80087c2: 490a ldr r1, [pc, #40] @ (80087ec <HAL_RCC_ClockConfig+0x1c8>)
80087c4: 5ccb ldrb r3, [r1, r3]
80087c6: fa22 f303 lsr.w r3, r2, r3
80087ca: 4a09 ldr r2, [pc, #36] @ (80087f0 <HAL_RCC_ClockConfig+0x1cc>)
80087cc: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
80087ce: 4b09 ldr r3, [pc, #36] @ (80087f4 <HAL_RCC_ClockConfig+0x1d0>)
80087d0: 681b ldr r3, [r3, #0]
80087d2: 4618 mov r0, r3
80087d4: f7fc fc76 bl 80050c4 <HAL_InitTick>
return HAL_OK;
80087d8: 2300 movs r3, #0
}
80087da: 4618 mov r0, r3
80087dc: 3710 adds r7, #16
80087de: 46bd mov sp, r7
80087e0: bd80 pop {r7, pc}
80087e2: bf00 nop
80087e4: 40022000 .word 0x40022000
80087e8: 40021000 .word 0x40021000
80087ec: 0800f510 .word 0x0800f510
80087f0: 20000010 .word 0x20000010
80087f4: 20000014 .word 0x20000014
080087f8 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
80087f8: b480 push {r7}
80087fa: b087 sub sp, #28
80087fc: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
80087fe: 2300 movs r3, #0
8008800: 60fb str r3, [r7, #12]
8008802: 2300 movs r3, #0
8008804: 60bb str r3, [r7, #8]
8008806: 2300 movs r3, #0
8008808: 617b str r3, [r7, #20]
800880a: 2300 movs r3, #0
800880c: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
800880e: 2300 movs r3, #0
8008810: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
8008812: 4b1e ldr r3, [pc, #120] @ (800888c <HAL_RCC_GetSysClockFreq+0x94>)
8008814: 685b ldr r3, [r3, #4]
8008816: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8008818: 68fb ldr r3, [r7, #12]
800881a: f003 030c and.w r3, r3, #12
800881e: 2b04 cmp r3, #4
8008820: d002 beq.n 8008828 <HAL_RCC_GetSysClockFreq+0x30>
8008822: 2b08 cmp r3, #8
8008824: d003 beq.n 800882e <HAL_RCC_GetSysClockFreq+0x36>
8008826: e027 b.n 8008878 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8008828: 4b19 ldr r3, [pc, #100] @ (8008890 <HAL_RCC_GetSysClockFreq+0x98>)
800882a: 613b str r3, [r7, #16]
break;
800882c: e027 b.n 800887e <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
800882e: 68fb ldr r3, [r7, #12]
8008830: 0c9b lsrs r3, r3, #18
8008832: f003 030f and.w r3, r3, #15
8008836: 4a17 ldr r2, [pc, #92] @ (8008894 <HAL_RCC_GetSysClockFreq+0x9c>)
8008838: 5cd3 ldrb r3, [r2, r3]
800883a: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
800883c: 68fb ldr r3, [r7, #12]
800883e: f403 3380 and.w r3, r3, #65536 @ 0x10000
8008842: 2b00 cmp r3, #0
8008844: d010 beq.n 8008868 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
8008846: 4b11 ldr r3, [pc, #68] @ (800888c <HAL_RCC_GetSysClockFreq+0x94>)
8008848: 685b ldr r3, [r3, #4]
800884a: 0c5b lsrs r3, r3, #17
800884c: f003 0301 and.w r3, r3, #1
8008850: 4a11 ldr r2, [pc, #68] @ (8008898 <HAL_RCC_GetSysClockFreq+0xa0>)
8008852: 5cd3 ldrb r3, [r2, r3]
8008854: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
8008856: 687b ldr r3, [r7, #4]
8008858: 4a0d ldr r2, [pc, #52] @ (8008890 <HAL_RCC_GetSysClockFreq+0x98>)
800885a: fb03 f202 mul.w r2, r3, r2
800885e: 68bb ldr r3, [r7, #8]
8008860: fbb2 f3f3 udiv r3, r2, r3
8008864: 617b str r3, [r7, #20]
8008866: e004 b.n 8008872 <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8008868: 687b ldr r3, [r7, #4]
800886a: 4a0c ldr r2, [pc, #48] @ (800889c <HAL_RCC_GetSysClockFreq+0xa4>)
800886c: fb02 f303 mul.w r3, r2, r3
8008870: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8008872: 697b ldr r3, [r7, #20]
8008874: 613b str r3, [r7, #16]
break;
8008876: e002 b.n 800887e <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8008878: 4b09 ldr r3, [pc, #36] @ (80088a0 <HAL_RCC_GetSysClockFreq+0xa8>)
800887a: 613b str r3, [r7, #16]
break;
800887c: bf00 nop
}
}
return sysclockfreq;
800887e: 693b ldr r3, [r7, #16]
}
8008880: 4618 mov r0, r3
8008882: 371c adds r7, #28
8008884: 46bd mov sp, r7
8008886: bc80 pop {r7}
8008888: 4770 bx lr
800888a: bf00 nop
800888c: 40021000 .word 0x40021000
8008890: 00b71b00 .word 0x00b71b00
8008894: 0800f528 .word 0x0800f528
8008898: 0800f538 .word 0x0800f538
800889c: 003d0900 .word 0x003d0900
80088a0: 007a1200 .word 0x007a1200
080088a4 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
80088a4: b480 push {r7}
80088a6: af00 add r7, sp, #0
return SystemCoreClock;
80088a8: 4b02 ldr r3, [pc, #8] @ (80088b4 <HAL_RCC_GetHCLKFreq+0x10>)
80088aa: 681b ldr r3, [r3, #0]
}
80088ac: 4618 mov r0, r3
80088ae: 46bd mov sp, r7
80088b0: bc80 pop {r7}
80088b2: 4770 bx lr
80088b4: 20000010 .word 0x20000010
080088b8 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
80088b8: b580 push {r7, lr}
80088ba: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
80088bc: f7ff fff2 bl 80088a4 <HAL_RCC_GetHCLKFreq>
80088c0: 4602 mov r2, r0
80088c2: 4b05 ldr r3, [pc, #20] @ (80088d8 <HAL_RCC_GetPCLK1Freq+0x20>)
80088c4: 685b ldr r3, [r3, #4]
80088c6: 0a1b lsrs r3, r3, #8
80088c8: f003 0307 and.w r3, r3, #7
80088cc: 4903 ldr r1, [pc, #12] @ (80088dc <HAL_RCC_GetPCLK1Freq+0x24>)
80088ce: 5ccb ldrb r3, [r1, r3]
80088d0: fa22 f303 lsr.w r3, r2, r3
}
80088d4: 4618 mov r0, r3
80088d6: bd80 pop {r7, pc}
80088d8: 40021000 .word 0x40021000
80088dc: 0800f520 .word 0x0800f520
080088e0 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
80088e0: b580 push {r7, lr}
80088e2: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
80088e4: f7ff ffde bl 80088a4 <HAL_RCC_GetHCLKFreq>
80088e8: 4602 mov r2, r0
80088ea: 4b05 ldr r3, [pc, #20] @ (8008900 <HAL_RCC_GetPCLK2Freq+0x20>)
80088ec: 685b ldr r3, [r3, #4]
80088ee: 0adb lsrs r3, r3, #11
80088f0: f003 0307 and.w r3, r3, #7
80088f4: 4903 ldr r1, [pc, #12] @ (8008904 <HAL_RCC_GetPCLK2Freq+0x24>)
80088f6: 5ccb ldrb r3, [r1, r3]
80088f8: fa22 f303 lsr.w r3, r2, r3
}
80088fc: 4618 mov r0, r3
80088fe: bd80 pop {r7, pc}
8008900: 40021000 .word 0x40021000
8008904: 0800f520 .word 0x0800f520
08008908 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8008908: b480 push {r7}
800890a: b085 sub sp, #20
800890c: af00 add r7, sp, #0
800890e: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8008910: 4b0a ldr r3, [pc, #40] @ (800893c <RCC_Delay+0x34>)
8008912: 681b ldr r3, [r3, #0]
8008914: 4a0a ldr r2, [pc, #40] @ (8008940 <RCC_Delay+0x38>)
8008916: fba2 2303 umull r2, r3, r2, r3
800891a: 0a5b lsrs r3, r3, #9
800891c: 687a ldr r2, [r7, #4]
800891e: fb02 f303 mul.w r3, r2, r3
8008922: 60fb str r3, [r7, #12]
do
{
__NOP();
8008924: bf00 nop
}
while (Delay --);
8008926: 68fb ldr r3, [r7, #12]
8008928: 1e5a subs r2, r3, #1
800892a: 60fa str r2, [r7, #12]
800892c: 2b00 cmp r3, #0
800892e: d1f9 bne.n 8008924 <RCC_Delay+0x1c>
}
8008930: bf00 nop
8008932: bf00 nop
8008934: 3714 adds r7, #20
8008936: 46bd mov sp, r7
8008938: bc80 pop {r7}
800893a: 4770 bx lr
800893c: 20000010 .word 0x20000010
8008940: 10624dd3 .word 0x10624dd3
08008944 <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8008944: b580 push {r7, lr}
8008946: b086 sub sp, #24
8008948: af00 add r7, sp, #0
800894a: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
800894c: 2300 movs r3, #0
800894e: 613b str r3, [r7, #16]
8008950: 2300 movs r3, #0
8008952: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8008954: 687b ldr r3, [r7, #4]
8008956: 681b ldr r3, [r3, #0]
8008958: f003 0301 and.w r3, r3, #1
800895c: 2b00 cmp r3, #0
800895e: d07d beq.n 8008a5c <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
8008960: 2300 movs r3, #0
8008962: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8008964: 4b4f ldr r3, [pc, #316] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008966: 69db ldr r3, [r3, #28]
8008968: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800896c: 2b00 cmp r3, #0
800896e: d10d bne.n 800898c <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8008970: 4b4c ldr r3, [pc, #304] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008972: 69db ldr r3, [r3, #28]
8008974: 4a4b ldr r2, [pc, #300] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008976: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
800897a: 61d3 str r3, [r2, #28]
800897c: 4b49 ldr r3, [pc, #292] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800897e: 69db ldr r3, [r3, #28]
8008980: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008984: 60bb str r3, [r7, #8]
8008986: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8008988: 2301 movs r3, #1
800898a: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800898c: 4b46 ldr r3, [pc, #280] @ (8008aa8 <HAL_RCCEx_PeriphCLKConfig+0x164>)
800898e: 681b ldr r3, [r3, #0]
8008990: f403 7380 and.w r3, r3, #256 @ 0x100
8008994: 2b00 cmp r3, #0
8008996: d118 bne.n 80089ca <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8008998: 4b43 ldr r3, [pc, #268] @ (8008aa8 <HAL_RCCEx_PeriphCLKConfig+0x164>)
800899a: 681b ldr r3, [r3, #0]
800899c: 4a42 ldr r2, [pc, #264] @ (8008aa8 <HAL_RCCEx_PeriphCLKConfig+0x164>)
800899e: f443 7380 orr.w r3, r3, #256 @ 0x100
80089a2: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
80089a4: f7fc fbd0 bl 8005148 <HAL_GetTick>
80089a8: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80089aa: e008 b.n 80089be <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
80089ac: f7fc fbcc bl 8005148 <HAL_GetTick>
80089b0: 4602 mov r2, r0
80089b2: 693b ldr r3, [r7, #16]
80089b4: 1ad3 subs r3, r2, r3
80089b6: 2b64 cmp r3, #100 @ 0x64
80089b8: d901 bls.n 80089be <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
80089ba: 2303 movs r3, #3
80089bc: e06d b.n 8008a9a <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80089be: 4b3a ldr r3, [pc, #232] @ (8008aa8 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80089c0: 681b ldr r3, [r3, #0]
80089c2: f403 7380 and.w r3, r3, #256 @ 0x100
80089c6: 2b00 cmp r3, #0
80089c8: d0f0 beq.n 80089ac <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
80089ca: 4b36 ldr r3, [pc, #216] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089cc: 6a1b ldr r3, [r3, #32]
80089ce: f403 7340 and.w r3, r3, #768 @ 0x300
80089d2: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
80089d4: 68fb ldr r3, [r7, #12]
80089d6: 2b00 cmp r3, #0
80089d8: d02e beq.n 8008a38 <HAL_RCCEx_PeriphCLKConfig+0xf4>
80089da: 687b ldr r3, [r7, #4]
80089dc: 685b ldr r3, [r3, #4]
80089de: f403 7340 and.w r3, r3, #768 @ 0x300
80089e2: 68fa ldr r2, [r7, #12]
80089e4: 429a cmp r2, r3
80089e6: d027 beq.n 8008a38 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
80089e8: 4b2e ldr r3, [pc, #184] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089ea: 6a1b ldr r3, [r3, #32]
80089ec: f423 7340 bic.w r3, r3, #768 @ 0x300
80089f0: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
80089f2: 4b2e ldr r3, [pc, #184] @ (8008aac <HAL_RCCEx_PeriphCLKConfig+0x168>)
80089f4: 2201 movs r2, #1
80089f6: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
80089f8: 4b2c ldr r3, [pc, #176] @ (8008aac <HAL_RCCEx_PeriphCLKConfig+0x168>)
80089fa: 2200 movs r2, #0
80089fc: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
80089fe: 4a29 ldr r2, [pc, #164] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a00: 68fb ldr r3, [r7, #12]
8008a02: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8008a04: 68fb ldr r3, [r7, #12]
8008a06: f003 0301 and.w r3, r3, #1
8008a0a: 2b00 cmp r3, #0
8008a0c: d014 beq.n 8008a38 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008a0e: f7fc fb9b bl 8005148 <HAL_GetTick>
8008a12: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008a14: e00a b.n 8008a2c <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8008a16: f7fc fb97 bl 8005148 <HAL_GetTick>
8008a1a: 4602 mov r2, r0
8008a1c: 693b ldr r3, [r7, #16]
8008a1e: 1ad3 subs r3, r2, r3
8008a20: f241 3288 movw r2, #5000 @ 0x1388
8008a24: 4293 cmp r3, r2
8008a26: d901 bls.n 8008a2c <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8008a28: 2303 movs r3, #3
8008a2a: e036 b.n 8008a9a <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008a2c: 4b1d ldr r3, [pc, #116] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a2e: 6a1b ldr r3, [r3, #32]
8008a30: f003 0302 and.w r3, r3, #2
8008a34: 2b00 cmp r3, #0
8008a36: d0ee beq.n 8008a16 <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8008a38: 4b1a ldr r3, [pc, #104] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a3a: 6a1b ldr r3, [r3, #32]
8008a3c: f423 7240 bic.w r2, r3, #768 @ 0x300
8008a40: 687b ldr r3, [r7, #4]
8008a42: 685b ldr r3, [r3, #4]
8008a44: 4917 ldr r1, [pc, #92] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a46: 4313 orrs r3, r2
8008a48: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8008a4a: 7dfb ldrb r3, [r7, #23]
8008a4c: 2b01 cmp r3, #1
8008a4e: d105 bne.n 8008a5c <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8008a50: 4b14 ldr r3, [pc, #80] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a52: 69db ldr r3, [r3, #28]
8008a54: 4a13 ldr r2, [pc, #76] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a56: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8008a5a: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8008a5c: 687b ldr r3, [r7, #4]
8008a5e: 681b ldr r3, [r3, #0]
8008a60: f003 0302 and.w r3, r3, #2
8008a64: 2b00 cmp r3, #0
8008a66: d008 beq.n 8008a7a <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8008a68: 4b0e ldr r3, [pc, #56] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a6a: 685b ldr r3, [r3, #4]
8008a6c: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8008a70: 687b ldr r3, [r7, #4]
8008a72: 689b ldr r3, [r3, #8]
8008a74: 490b ldr r1, [pc, #44] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a76: 4313 orrs r3, r2
8008a78: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8008a7a: 687b ldr r3, [r7, #4]
8008a7c: 681b ldr r3, [r3, #0]
8008a7e: f003 0310 and.w r3, r3, #16
8008a82: 2b00 cmp r3, #0
8008a84: d008 beq.n 8008a98 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8008a86: 4b07 ldr r3, [pc, #28] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a88: 685b ldr r3, [r3, #4]
8008a8a: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8008a8e: 687b ldr r3, [r7, #4]
8008a90: 68db ldr r3, [r3, #12]
8008a92: 4904 ldr r1, [pc, #16] @ (8008aa4 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a94: 4313 orrs r3, r2
8008a96: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8008a98: 2300 movs r3, #0
}
8008a9a: 4618 mov r0, r3
8008a9c: 3718 adds r7, #24
8008a9e: 46bd mov sp, r7
8008aa0: bd80 pop {r7, pc}
8008aa2: bf00 nop
8008aa4: 40021000 .word 0x40021000
8008aa8: 40007000 .word 0x40007000
8008aac: 42420440 .word 0x42420440
08008ab0 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8008ab0: b580 push {r7, lr}
8008ab2: b082 sub sp, #8
8008ab4: af00 add r7, sp, #0
8008ab6: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008ab8: 687b ldr r3, [r7, #4]
8008aba: 2b00 cmp r3, #0
8008abc: d101 bne.n 8008ac2 <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8008abe: 2301 movs r3, #1
8008ac0: e041 b.n 8008b46 <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8008ac2: 687b ldr r3, [r7, #4]
8008ac4: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008ac8: b2db uxtb r3, r3
8008aca: 2b00 cmp r3, #0
8008acc: d106 bne.n 8008adc <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008ace: 687b ldr r3, [r7, #4]
8008ad0: 2200 movs r2, #0
8008ad2: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8008ad6: 6878 ldr r0, [r7, #4]
8008ad8: f7fc f96a bl 8004db0 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008adc: 687b ldr r3, [r7, #4]
8008ade: 2202 movs r2, #2
8008ae0: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8008ae4: 687b ldr r3, [r7, #4]
8008ae6: 681a ldr r2, [r3, #0]
8008ae8: 687b ldr r3, [r7, #4]
8008aea: 3304 adds r3, #4
8008aec: 4619 mov r1, r3
8008aee: 4610 mov r0, r2
8008af0: f000 fb3e bl 8009170 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8008af4: 687b ldr r3, [r7, #4]
8008af6: 2201 movs r2, #1
8008af8: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008afc: 687b ldr r3, [r7, #4]
8008afe: 2201 movs r2, #1
8008b00: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008b04: 687b ldr r3, [r7, #4]
8008b06: 2201 movs r2, #1
8008b08: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008b0c: 687b ldr r3, [r7, #4]
8008b0e: 2201 movs r2, #1
8008b10: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008b14: 687b ldr r3, [r7, #4]
8008b16: 2201 movs r2, #1
8008b18: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008b1c: 687b ldr r3, [r7, #4]
8008b1e: 2201 movs r2, #1
8008b20: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008b24: 687b ldr r3, [r7, #4]
8008b26: 2201 movs r2, #1
8008b28: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008b2c: 687b ldr r3, [r7, #4]
8008b2e: 2201 movs r2, #1
8008b30: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008b34: 687b ldr r3, [r7, #4]
8008b36: 2201 movs r2, #1
8008b38: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008b3c: 687b ldr r3, [r7, #4]
8008b3e: 2201 movs r2, #1
8008b40: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008b44: 2300 movs r3, #0
}
8008b46: 4618 mov r0, r3
8008b48: 3708 adds r7, #8
8008b4a: 46bd mov sp, r7
8008b4c: bd80 pop {r7, pc}
08008b4e <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8008b4e: b580 push {r7, lr}
8008b50: b082 sub sp, #8
8008b52: af00 add r7, sp, #0
8008b54: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008b56: 687b ldr r3, [r7, #4]
8008b58: 2b00 cmp r3, #0
8008b5a: d101 bne.n 8008b60 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8008b5c: 2301 movs r3, #1
8008b5e: e041 b.n 8008be4 <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8008b60: 687b ldr r3, [r7, #4]
8008b62: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008b66: b2db uxtb r3, r3
8008b68: 2b00 cmp r3, #0
8008b6a: d106 bne.n 8008b7a <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008b6c: 687b ldr r3, [r7, #4]
8008b6e: 2200 movs r2, #0
8008b70: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8008b74: 6878 ldr r0, [r7, #4]
8008b76: f000 f839 bl 8008bec <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008b7a: 687b ldr r3, [r7, #4]
8008b7c: 2202 movs r2, #2
8008b7e: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8008b82: 687b ldr r3, [r7, #4]
8008b84: 681a ldr r2, [r3, #0]
8008b86: 687b ldr r3, [r7, #4]
8008b88: 3304 adds r3, #4
8008b8a: 4619 mov r1, r3
8008b8c: 4610 mov r0, r2
8008b8e: f000 faef bl 8009170 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8008b92: 687b ldr r3, [r7, #4]
8008b94: 2201 movs r2, #1
8008b96: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008b9a: 687b ldr r3, [r7, #4]
8008b9c: 2201 movs r2, #1
8008b9e: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008ba2: 687b ldr r3, [r7, #4]
8008ba4: 2201 movs r2, #1
8008ba6: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008baa: 687b ldr r3, [r7, #4]
8008bac: 2201 movs r2, #1
8008bae: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008bb2: 687b ldr r3, [r7, #4]
8008bb4: 2201 movs r2, #1
8008bb6: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008bba: 687b ldr r3, [r7, #4]
8008bbc: 2201 movs r2, #1
8008bbe: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008bc2: 687b ldr r3, [r7, #4]
8008bc4: 2201 movs r2, #1
8008bc6: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008bca: 687b ldr r3, [r7, #4]
8008bcc: 2201 movs r2, #1
8008bce: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008bd2: 687b ldr r3, [r7, #4]
8008bd4: 2201 movs r2, #1
8008bd6: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008bda: 687b ldr r3, [r7, #4]
8008bdc: 2201 movs r2, #1
8008bde: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008be2: 2300 movs r3, #0
}
8008be4: 4618 mov r0, r3
8008be6: 3708 adds r7, #8
8008be8: 46bd mov sp, r7
8008bea: bd80 pop {r7, pc}
08008bec <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8008bec: b480 push {r7}
8008bee: b083 sub sp, #12
8008bf0: af00 add r7, sp, #0
8008bf2: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8008bf4: bf00 nop
8008bf6: 370c adds r7, #12
8008bf8: 46bd mov sp, r7
8008bfa: bc80 pop {r7}
8008bfc: 4770 bx lr
...
08008c00 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008c00: b580 push {r7, lr}
8008c02: b084 sub sp, #16
8008c04: af00 add r7, sp, #0
8008c06: 6078 str r0, [r7, #4]
8008c08: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8008c0a: 683b ldr r3, [r7, #0]
8008c0c: 2b00 cmp r3, #0
8008c0e: d109 bne.n 8008c24 <HAL_TIM_PWM_Start+0x24>
8008c10: 687b ldr r3, [r7, #4]
8008c12: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8008c16: b2db uxtb r3, r3
8008c18: 2b01 cmp r3, #1
8008c1a: bf14 ite ne
8008c1c: 2301 movne r3, #1
8008c1e: 2300 moveq r3, #0
8008c20: b2db uxtb r3, r3
8008c22: e022 b.n 8008c6a <HAL_TIM_PWM_Start+0x6a>
8008c24: 683b ldr r3, [r7, #0]
8008c26: 2b04 cmp r3, #4
8008c28: d109 bne.n 8008c3e <HAL_TIM_PWM_Start+0x3e>
8008c2a: 687b ldr r3, [r7, #4]
8008c2c: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8008c30: b2db uxtb r3, r3
8008c32: 2b01 cmp r3, #1
8008c34: bf14 ite ne
8008c36: 2301 movne r3, #1
8008c38: 2300 moveq r3, #0
8008c3a: b2db uxtb r3, r3
8008c3c: e015 b.n 8008c6a <HAL_TIM_PWM_Start+0x6a>
8008c3e: 683b ldr r3, [r7, #0]
8008c40: 2b08 cmp r3, #8
8008c42: d109 bne.n 8008c58 <HAL_TIM_PWM_Start+0x58>
8008c44: 687b ldr r3, [r7, #4]
8008c46: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8008c4a: b2db uxtb r3, r3
8008c4c: 2b01 cmp r3, #1
8008c4e: bf14 ite ne
8008c50: 2301 movne r3, #1
8008c52: 2300 moveq r3, #0
8008c54: b2db uxtb r3, r3
8008c56: e008 b.n 8008c6a <HAL_TIM_PWM_Start+0x6a>
8008c58: 687b ldr r3, [r7, #4]
8008c5a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8008c5e: b2db uxtb r3, r3
8008c60: 2b01 cmp r3, #1
8008c62: bf14 ite ne
8008c64: 2301 movne r3, #1
8008c66: 2300 moveq r3, #0
8008c68: b2db uxtb r3, r3
8008c6a: 2b00 cmp r3, #0
8008c6c: d001 beq.n 8008c72 <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
8008c6e: 2301 movs r3, #1
8008c70: e05e b.n 8008d30 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
8008c72: 683b ldr r3, [r7, #0]
8008c74: 2b00 cmp r3, #0
8008c76: d104 bne.n 8008c82 <HAL_TIM_PWM_Start+0x82>
8008c78: 687b ldr r3, [r7, #4]
8008c7a: 2202 movs r2, #2
8008c7c: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008c80: e013 b.n 8008caa <HAL_TIM_PWM_Start+0xaa>
8008c82: 683b ldr r3, [r7, #0]
8008c84: 2b04 cmp r3, #4
8008c86: d104 bne.n 8008c92 <HAL_TIM_PWM_Start+0x92>
8008c88: 687b ldr r3, [r7, #4]
8008c8a: 2202 movs r2, #2
8008c8c: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008c90: e00b b.n 8008caa <HAL_TIM_PWM_Start+0xaa>
8008c92: 683b ldr r3, [r7, #0]
8008c94: 2b08 cmp r3, #8
8008c96: d104 bne.n 8008ca2 <HAL_TIM_PWM_Start+0xa2>
8008c98: 687b ldr r3, [r7, #4]
8008c9a: 2202 movs r2, #2
8008c9c: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008ca0: e003 b.n 8008caa <HAL_TIM_PWM_Start+0xaa>
8008ca2: 687b ldr r3, [r7, #4]
8008ca4: 2202 movs r2, #2
8008ca6: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
8008caa: 687b ldr r3, [r7, #4]
8008cac: 681b ldr r3, [r3, #0]
8008cae: 2201 movs r2, #1
8008cb0: 6839 ldr r1, [r7, #0]
8008cb2: 4618 mov r0, r3
8008cb4: f000 fce8 bl 8009688 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008cb8: 687b ldr r3, [r7, #4]
8008cba: 681b ldr r3, [r3, #0]
8008cbc: 4a1e ldr r2, [pc, #120] @ (8008d38 <HAL_TIM_PWM_Start+0x138>)
8008cbe: 4293 cmp r3, r2
8008cc0: d107 bne.n 8008cd2 <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
8008cc2: 687b ldr r3, [r7, #4]
8008cc4: 681b ldr r3, [r3, #0]
8008cc6: 6c5a ldr r2, [r3, #68] @ 0x44
8008cc8: 687b ldr r3, [r7, #4]
8008cca: 681b ldr r3, [r3, #0]
8008ccc: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8008cd0: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8008cd2: 687b ldr r3, [r7, #4]
8008cd4: 681b ldr r3, [r3, #0]
8008cd6: 4a18 ldr r2, [pc, #96] @ (8008d38 <HAL_TIM_PWM_Start+0x138>)
8008cd8: 4293 cmp r3, r2
8008cda: d00e beq.n 8008cfa <HAL_TIM_PWM_Start+0xfa>
8008cdc: 687b ldr r3, [r7, #4]
8008cde: 681b ldr r3, [r3, #0]
8008ce0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008ce4: d009 beq.n 8008cfa <HAL_TIM_PWM_Start+0xfa>
8008ce6: 687b ldr r3, [r7, #4]
8008ce8: 681b ldr r3, [r3, #0]
8008cea: 4a14 ldr r2, [pc, #80] @ (8008d3c <HAL_TIM_PWM_Start+0x13c>)
8008cec: 4293 cmp r3, r2
8008cee: d004 beq.n 8008cfa <HAL_TIM_PWM_Start+0xfa>
8008cf0: 687b ldr r3, [r7, #4]
8008cf2: 681b ldr r3, [r3, #0]
8008cf4: 4a12 ldr r2, [pc, #72] @ (8008d40 <HAL_TIM_PWM_Start+0x140>)
8008cf6: 4293 cmp r3, r2
8008cf8: d111 bne.n 8008d1e <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8008cfa: 687b ldr r3, [r7, #4]
8008cfc: 681b ldr r3, [r3, #0]
8008cfe: 689b ldr r3, [r3, #8]
8008d00: f003 0307 and.w r3, r3, #7
8008d04: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008d06: 68fb ldr r3, [r7, #12]
8008d08: 2b06 cmp r3, #6
8008d0a: d010 beq.n 8008d2e <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8008d0c: 687b ldr r3, [r7, #4]
8008d0e: 681b ldr r3, [r3, #0]
8008d10: 681a ldr r2, [r3, #0]
8008d12: 687b ldr r3, [r7, #4]
8008d14: 681b ldr r3, [r3, #0]
8008d16: f042 0201 orr.w r2, r2, #1
8008d1a: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008d1c: e007 b.n 8008d2e <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8008d1e: 687b ldr r3, [r7, #4]
8008d20: 681b ldr r3, [r3, #0]
8008d22: 681a ldr r2, [r3, #0]
8008d24: 687b ldr r3, [r7, #4]
8008d26: 681b ldr r3, [r3, #0]
8008d28: f042 0201 orr.w r2, r2, #1
8008d2c: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8008d2e: 2300 movs r3, #0
}
8008d30: 4618 mov r0, r3
8008d32: 3710 adds r7, #16
8008d34: 46bd mov sp, r7
8008d36: bd80 pop {r7, pc}
8008d38: 40012c00 .word 0x40012c00
8008d3c: 40000400 .word 0x40000400
8008d40: 40000800 .word 0x40000800
08008d44 <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008d44: b580 push {r7, lr}
8008d46: b082 sub sp, #8
8008d48: af00 add r7, sp, #0
8008d4a: 6078 str r0, [r7, #4]
8008d4c: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
8008d4e: 687b ldr r3, [r7, #4]
8008d50: 681b ldr r3, [r3, #0]
8008d52: 2200 movs r2, #0
8008d54: 6839 ldr r1, [r7, #0]
8008d56: 4618 mov r0, r3
8008d58: f000 fc96 bl 8009688 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008d5c: 687b ldr r3, [r7, #4]
8008d5e: 681b ldr r3, [r3, #0]
8008d60: 4a29 ldr r2, [pc, #164] @ (8008e08 <HAL_TIM_PWM_Stop+0xc4>)
8008d62: 4293 cmp r3, r2
8008d64: d117 bne.n 8008d96 <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
8008d66: 687b ldr r3, [r7, #4]
8008d68: 681b ldr r3, [r3, #0]
8008d6a: 6a1a ldr r2, [r3, #32]
8008d6c: f241 1311 movw r3, #4369 @ 0x1111
8008d70: 4013 ands r3, r2
8008d72: 2b00 cmp r3, #0
8008d74: d10f bne.n 8008d96 <HAL_TIM_PWM_Stop+0x52>
8008d76: 687b ldr r3, [r7, #4]
8008d78: 681b ldr r3, [r3, #0]
8008d7a: 6a1a ldr r2, [r3, #32]
8008d7c: f240 4344 movw r3, #1092 @ 0x444
8008d80: 4013 ands r3, r2
8008d82: 2b00 cmp r3, #0
8008d84: d107 bne.n 8008d96 <HAL_TIM_PWM_Stop+0x52>
8008d86: 687b ldr r3, [r7, #4]
8008d88: 681b ldr r3, [r3, #0]
8008d8a: 6c5a ldr r2, [r3, #68] @ 0x44
8008d8c: 687b ldr r3, [r7, #4]
8008d8e: 681b ldr r3, [r3, #0]
8008d90: f422 4200 bic.w r2, r2, #32768 @ 0x8000
8008d94: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
8008d96: 687b ldr r3, [r7, #4]
8008d98: 681b ldr r3, [r3, #0]
8008d9a: 6a1a ldr r2, [r3, #32]
8008d9c: f241 1311 movw r3, #4369 @ 0x1111
8008da0: 4013 ands r3, r2
8008da2: 2b00 cmp r3, #0
8008da4: d10f bne.n 8008dc6 <HAL_TIM_PWM_Stop+0x82>
8008da6: 687b ldr r3, [r7, #4]
8008da8: 681b ldr r3, [r3, #0]
8008daa: 6a1a ldr r2, [r3, #32]
8008dac: f240 4344 movw r3, #1092 @ 0x444
8008db0: 4013 ands r3, r2
8008db2: 2b00 cmp r3, #0
8008db4: d107 bne.n 8008dc6 <HAL_TIM_PWM_Stop+0x82>
8008db6: 687b ldr r3, [r7, #4]
8008db8: 681b ldr r3, [r3, #0]
8008dba: 681a ldr r2, [r3, #0]
8008dbc: 687b ldr r3, [r7, #4]
8008dbe: 681b ldr r3, [r3, #0]
8008dc0: f022 0201 bic.w r2, r2, #1
8008dc4: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
8008dc6: 683b ldr r3, [r7, #0]
8008dc8: 2b00 cmp r3, #0
8008dca: d104 bne.n 8008dd6 <HAL_TIM_PWM_Stop+0x92>
8008dcc: 687b ldr r3, [r7, #4]
8008dce: 2201 movs r2, #1
8008dd0: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008dd4: e013 b.n 8008dfe <HAL_TIM_PWM_Stop+0xba>
8008dd6: 683b ldr r3, [r7, #0]
8008dd8: 2b04 cmp r3, #4
8008dda: d104 bne.n 8008de6 <HAL_TIM_PWM_Stop+0xa2>
8008ddc: 687b ldr r3, [r7, #4]
8008dde: 2201 movs r2, #1
8008de0: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008de4: e00b b.n 8008dfe <HAL_TIM_PWM_Stop+0xba>
8008de6: 683b ldr r3, [r7, #0]
8008de8: 2b08 cmp r3, #8
8008dea: d104 bne.n 8008df6 <HAL_TIM_PWM_Stop+0xb2>
8008dec: 687b ldr r3, [r7, #4]
8008dee: 2201 movs r2, #1
8008df0: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008df4: e003 b.n 8008dfe <HAL_TIM_PWM_Stop+0xba>
8008df6: 687b ldr r3, [r7, #4]
8008df8: 2201 movs r2, #1
8008dfa: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
8008dfe: 2300 movs r3, #0
}
8008e00: 4618 mov r0, r3
8008e02: 3708 adds r7, #8
8008e04: 46bd mov sp, r7
8008e06: bd80 pop {r7, pc}
8008e08: 40012c00 .word 0x40012c00
08008e0c <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8008e0c: b580 push {r7, lr}
8008e0e: b086 sub sp, #24
8008e10: af00 add r7, sp, #0
8008e12: 60f8 str r0, [r7, #12]
8008e14: 60b9 str r1, [r7, #8]
8008e16: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8008e18: 2300 movs r3, #0
8008e1a: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8008e1c: 68fb ldr r3, [r7, #12]
8008e1e: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008e22: 2b01 cmp r3, #1
8008e24: d101 bne.n 8008e2a <HAL_TIM_PWM_ConfigChannel+0x1e>
8008e26: 2302 movs r3, #2
8008e28: e0ae b.n 8008f88 <HAL_TIM_PWM_ConfigChannel+0x17c>
8008e2a: 68fb ldr r3, [r7, #12]
8008e2c: 2201 movs r2, #1
8008e2e: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
8008e32: 687b ldr r3, [r7, #4]
8008e34: 2b0c cmp r3, #12
8008e36: f200 809f bhi.w 8008f78 <HAL_TIM_PWM_ConfigChannel+0x16c>
8008e3a: a201 add r2, pc, #4 @ (adr r2, 8008e40 <HAL_TIM_PWM_ConfigChannel+0x34>)
8008e3c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008e40: 08008e75 .word 0x08008e75
8008e44: 08008f79 .word 0x08008f79
8008e48: 08008f79 .word 0x08008f79
8008e4c: 08008f79 .word 0x08008f79
8008e50: 08008eb5 .word 0x08008eb5
8008e54: 08008f79 .word 0x08008f79
8008e58: 08008f79 .word 0x08008f79
8008e5c: 08008f79 .word 0x08008f79
8008e60: 08008ef7 .word 0x08008ef7
8008e64: 08008f79 .word 0x08008f79
8008e68: 08008f79 .word 0x08008f79
8008e6c: 08008f79 .word 0x08008f79
8008e70: 08008f37 .word 0x08008f37
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
8008e74: 68fb ldr r3, [r7, #12]
8008e76: 681b ldr r3, [r3, #0]
8008e78: 68b9 ldr r1, [r7, #8]
8008e7a: 4618 mov r0, r3
8008e7c: f000 f9e6 bl 800924c <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
8008e80: 68fb ldr r3, [r7, #12]
8008e82: 681b ldr r3, [r3, #0]
8008e84: 699a ldr r2, [r3, #24]
8008e86: 68fb ldr r3, [r7, #12]
8008e88: 681b ldr r3, [r3, #0]
8008e8a: f042 0208 orr.w r2, r2, #8
8008e8e: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
8008e90: 68fb ldr r3, [r7, #12]
8008e92: 681b ldr r3, [r3, #0]
8008e94: 699a ldr r2, [r3, #24]
8008e96: 68fb ldr r3, [r7, #12]
8008e98: 681b ldr r3, [r3, #0]
8008e9a: f022 0204 bic.w r2, r2, #4
8008e9e: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
8008ea0: 68fb ldr r3, [r7, #12]
8008ea2: 681b ldr r3, [r3, #0]
8008ea4: 6999 ldr r1, [r3, #24]
8008ea6: 68bb ldr r3, [r7, #8]
8008ea8: 691a ldr r2, [r3, #16]
8008eaa: 68fb ldr r3, [r7, #12]
8008eac: 681b ldr r3, [r3, #0]
8008eae: 430a orrs r2, r1
8008eb0: 619a str r2, [r3, #24]
break;
8008eb2: e064 b.n 8008f7e <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8008eb4: 68fb ldr r3, [r7, #12]
8008eb6: 681b ldr r3, [r3, #0]
8008eb8: 68b9 ldr r1, [r7, #8]
8008eba: 4618 mov r0, r3
8008ebc: f000 fa2c bl 8009318 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8008ec0: 68fb ldr r3, [r7, #12]
8008ec2: 681b ldr r3, [r3, #0]
8008ec4: 699a ldr r2, [r3, #24]
8008ec6: 68fb ldr r3, [r7, #12]
8008ec8: 681b ldr r3, [r3, #0]
8008eca: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008ece: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8008ed0: 68fb ldr r3, [r7, #12]
8008ed2: 681b ldr r3, [r3, #0]
8008ed4: 699a ldr r2, [r3, #24]
8008ed6: 68fb ldr r3, [r7, #12]
8008ed8: 681b ldr r3, [r3, #0]
8008eda: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008ede: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8008ee0: 68fb ldr r3, [r7, #12]
8008ee2: 681b ldr r3, [r3, #0]
8008ee4: 6999 ldr r1, [r3, #24]
8008ee6: 68bb ldr r3, [r7, #8]
8008ee8: 691b ldr r3, [r3, #16]
8008eea: 021a lsls r2, r3, #8
8008eec: 68fb ldr r3, [r7, #12]
8008eee: 681b ldr r3, [r3, #0]
8008ef0: 430a orrs r2, r1
8008ef2: 619a str r2, [r3, #24]
break;
8008ef4: e043 b.n 8008f7e <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8008ef6: 68fb ldr r3, [r7, #12]
8008ef8: 681b ldr r3, [r3, #0]
8008efa: 68b9 ldr r1, [r7, #8]
8008efc: 4618 mov r0, r3
8008efe: f000 fa75 bl 80093ec <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
8008f02: 68fb ldr r3, [r7, #12]
8008f04: 681b ldr r3, [r3, #0]
8008f06: 69da ldr r2, [r3, #28]
8008f08: 68fb ldr r3, [r7, #12]
8008f0a: 681b ldr r3, [r3, #0]
8008f0c: f042 0208 orr.w r2, r2, #8
8008f10: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
8008f12: 68fb ldr r3, [r7, #12]
8008f14: 681b ldr r3, [r3, #0]
8008f16: 69da ldr r2, [r3, #28]
8008f18: 68fb ldr r3, [r7, #12]
8008f1a: 681b ldr r3, [r3, #0]
8008f1c: f022 0204 bic.w r2, r2, #4
8008f20: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
8008f22: 68fb ldr r3, [r7, #12]
8008f24: 681b ldr r3, [r3, #0]
8008f26: 69d9 ldr r1, [r3, #28]
8008f28: 68bb ldr r3, [r7, #8]
8008f2a: 691a ldr r2, [r3, #16]
8008f2c: 68fb ldr r3, [r7, #12]
8008f2e: 681b ldr r3, [r3, #0]
8008f30: 430a orrs r2, r1
8008f32: 61da str r2, [r3, #28]
break;
8008f34: e023 b.n 8008f7e <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
8008f36: 68fb ldr r3, [r7, #12]
8008f38: 681b ldr r3, [r3, #0]
8008f3a: 68b9 ldr r1, [r7, #8]
8008f3c: 4618 mov r0, r3
8008f3e: f000 fabf bl 80094c0 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
8008f42: 68fb ldr r3, [r7, #12]
8008f44: 681b ldr r3, [r3, #0]
8008f46: 69da ldr r2, [r3, #28]
8008f48: 68fb ldr r3, [r7, #12]
8008f4a: 681b ldr r3, [r3, #0]
8008f4c: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008f50: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
8008f52: 68fb ldr r3, [r7, #12]
8008f54: 681b ldr r3, [r3, #0]
8008f56: 69da ldr r2, [r3, #28]
8008f58: 68fb ldr r3, [r7, #12]
8008f5a: 681b ldr r3, [r3, #0]
8008f5c: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008f60: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
8008f62: 68fb ldr r3, [r7, #12]
8008f64: 681b ldr r3, [r3, #0]
8008f66: 69d9 ldr r1, [r3, #28]
8008f68: 68bb ldr r3, [r7, #8]
8008f6a: 691b ldr r3, [r3, #16]
8008f6c: 021a lsls r2, r3, #8
8008f6e: 68fb ldr r3, [r7, #12]
8008f70: 681b ldr r3, [r3, #0]
8008f72: 430a orrs r2, r1
8008f74: 61da str r2, [r3, #28]
break;
8008f76: e002 b.n 8008f7e <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
8008f78: 2301 movs r3, #1
8008f7a: 75fb strb r3, [r7, #23]
break;
8008f7c: bf00 nop
}
__HAL_UNLOCK(htim);
8008f7e: 68fb ldr r3, [r7, #12]
8008f80: 2200 movs r2, #0
8008f82: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8008f86: 7dfb ldrb r3, [r7, #23]
}
8008f88: 4618 mov r0, r3
8008f8a: 3718 adds r7, #24
8008f8c: 46bd mov sp, r7
8008f8e: bd80 pop {r7, pc}
08008f90 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
8008f90: b580 push {r7, lr}
8008f92: b084 sub sp, #16
8008f94: af00 add r7, sp, #0
8008f96: 6078 str r0, [r7, #4]
8008f98: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8008f9a: 2300 movs r3, #0
8008f9c: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
8008f9e: 687b ldr r3, [r7, #4]
8008fa0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008fa4: 2b01 cmp r3, #1
8008fa6: d101 bne.n 8008fac <HAL_TIM_ConfigClockSource+0x1c>
8008fa8: 2302 movs r3, #2
8008faa: e0b4 b.n 8009116 <HAL_TIM_ConfigClockSource+0x186>
8008fac: 687b ldr r3, [r7, #4]
8008fae: 2201 movs r2, #1
8008fb0: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
8008fb4: 687b ldr r3, [r7, #4]
8008fb6: 2202 movs r2, #2
8008fb8: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8008fbc: 687b ldr r3, [r7, #4]
8008fbe: 681b ldr r3, [r3, #0]
8008fc0: 689b ldr r3, [r3, #8]
8008fc2: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
8008fc4: 68bb ldr r3, [r7, #8]
8008fc6: f023 0377 bic.w r3, r3, #119 @ 0x77
8008fca: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8008fcc: 68bb ldr r3, [r7, #8]
8008fce: f423 437f bic.w r3, r3, #65280 @ 0xff00
8008fd2: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
8008fd4: 687b ldr r3, [r7, #4]
8008fd6: 681b ldr r3, [r3, #0]
8008fd8: 68ba ldr r2, [r7, #8]
8008fda: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8008fdc: 683b ldr r3, [r7, #0]
8008fde: 681b ldr r3, [r3, #0]
8008fe0: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008fe4: d03e beq.n 8009064 <HAL_TIM_ConfigClockSource+0xd4>
8008fe6: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008fea: f200 8087 bhi.w 80090fc <HAL_TIM_ConfigClockSource+0x16c>
8008fee: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008ff2: f000 8086 beq.w 8009102 <HAL_TIM_ConfigClockSource+0x172>
8008ff6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008ffa: d87f bhi.n 80090fc <HAL_TIM_ConfigClockSource+0x16c>
8008ffc: 2b70 cmp r3, #112 @ 0x70
8008ffe: d01a beq.n 8009036 <HAL_TIM_ConfigClockSource+0xa6>
8009000: 2b70 cmp r3, #112 @ 0x70
8009002: d87b bhi.n 80090fc <HAL_TIM_ConfigClockSource+0x16c>
8009004: 2b60 cmp r3, #96 @ 0x60
8009006: d050 beq.n 80090aa <HAL_TIM_ConfigClockSource+0x11a>
8009008: 2b60 cmp r3, #96 @ 0x60
800900a: d877 bhi.n 80090fc <HAL_TIM_ConfigClockSource+0x16c>
800900c: 2b50 cmp r3, #80 @ 0x50
800900e: d03c beq.n 800908a <HAL_TIM_ConfigClockSource+0xfa>
8009010: 2b50 cmp r3, #80 @ 0x50
8009012: d873 bhi.n 80090fc <HAL_TIM_ConfigClockSource+0x16c>
8009014: 2b40 cmp r3, #64 @ 0x40
8009016: d058 beq.n 80090ca <HAL_TIM_ConfigClockSource+0x13a>
8009018: 2b40 cmp r3, #64 @ 0x40
800901a: d86f bhi.n 80090fc <HAL_TIM_ConfigClockSource+0x16c>
800901c: 2b30 cmp r3, #48 @ 0x30
800901e: d064 beq.n 80090ea <HAL_TIM_ConfigClockSource+0x15a>
8009020: 2b30 cmp r3, #48 @ 0x30
8009022: d86b bhi.n 80090fc <HAL_TIM_ConfigClockSource+0x16c>
8009024: 2b20 cmp r3, #32
8009026: d060 beq.n 80090ea <HAL_TIM_ConfigClockSource+0x15a>
8009028: 2b20 cmp r3, #32
800902a: d867 bhi.n 80090fc <HAL_TIM_ConfigClockSource+0x16c>
800902c: 2b00 cmp r3, #0
800902e: d05c beq.n 80090ea <HAL_TIM_ConfigClockSource+0x15a>
8009030: 2b10 cmp r3, #16
8009032: d05a beq.n 80090ea <HAL_TIM_ConfigClockSource+0x15a>
8009034: e062 b.n 80090fc <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8009036: 687b ldr r3, [r7, #4]
8009038: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
800903a: 683b ldr r3, [r7, #0]
800903c: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
800903e: 683b ldr r3, [r7, #0]
8009040: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8009042: 683b ldr r3, [r7, #0]
8009044: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8009046: f000 fb00 bl 800964a <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
800904a: 687b ldr r3, [r7, #4]
800904c: 681b ldr r3, [r3, #0]
800904e: 689b ldr r3, [r3, #8]
8009050: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
8009052: 68bb ldr r3, [r7, #8]
8009054: f043 0377 orr.w r3, r3, #119 @ 0x77
8009058: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
800905a: 687b ldr r3, [r7, #4]
800905c: 681b ldr r3, [r3, #0]
800905e: 68ba ldr r2, [r7, #8]
8009060: 609a str r2, [r3, #8]
break;
8009062: e04f b.n 8009104 <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8009064: 687b ldr r3, [r7, #4]
8009066: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8009068: 683b ldr r3, [r7, #0]
800906a: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
800906c: 683b ldr r3, [r7, #0]
800906e: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8009070: 683b ldr r3, [r7, #0]
8009072: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8009074: f000 fae9 bl 800964a <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
8009078: 687b ldr r3, [r7, #4]
800907a: 681b ldr r3, [r3, #0]
800907c: 689a ldr r2, [r3, #8]
800907e: 687b ldr r3, [r7, #4]
8009080: 681b ldr r3, [r3, #0]
8009082: f442 4280 orr.w r2, r2, #16384 @ 0x4000
8009086: 609a str r2, [r3, #8]
break;
8009088: e03c b.n 8009104 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
800908a: 687b ldr r3, [r7, #4]
800908c: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
800908e: 683b ldr r3, [r7, #0]
8009090: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8009092: 683b ldr r3, [r7, #0]
8009094: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8009096: 461a mov r2, r3
8009098: f000 fa60 bl 800955c <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
800909c: 687b ldr r3, [r7, #4]
800909e: 681b ldr r3, [r3, #0]
80090a0: 2150 movs r1, #80 @ 0x50
80090a2: 4618 mov r0, r3
80090a4: f000 fab7 bl 8009616 <TIM_ITRx_SetConfig>
break;
80090a8: e02c b.n 8009104 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
80090aa: 687b ldr r3, [r7, #4]
80090ac: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80090ae: 683b ldr r3, [r7, #0]
80090b0: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80090b2: 683b ldr r3, [r7, #0]
80090b4: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
80090b6: 461a mov r2, r3
80090b8: f000 fa7e bl 80095b8 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
80090bc: 687b ldr r3, [r7, #4]
80090be: 681b ldr r3, [r3, #0]
80090c0: 2160 movs r1, #96 @ 0x60
80090c2: 4618 mov r0, r3
80090c4: f000 faa7 bl 8009616 <TIM_ITRx_SetConfig>
break;
80090c8: e01c b.n 8009104 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
80090ca: 687b ldr r3, [r7, #4]
80090cc: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80090ce: 683b ldr r3, [r7, #0]
80090d0: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80090d2: 683b ldr r3, [r7, #0]
80090d4: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
80090d6: 461a mov r2, r3
80090d8: f000 fa40 bl 800955c <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
80090dc: 687b ldr r3, [r7, #4]
80090de: 681b ldr r3, [r3, #0]
80090e0: 2140 movs r1, #64 @ 0x40
80090e2: 4618 mov r0, r3
80090e4: f000 fa97 bl 8009616 <TIM_ITRx_SetConfig>
break;
80090e8: e00c b.n 8009104 <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
80090ea: 687b ldr r3, [r7, #4]
80090ec: 681a ldr r2, [r3, #0]
80090ee: 683b ldr r3, [r7, #0]
80090f0: 681b ldr r3, [r3, #0]
80090f2: 4619 mov r1, r3
80090f4: 4610 mov r0, r2
80090f6: f000 fa8e bl 8009616 <TIM_ITRx_SetConfig>
break;
80090fa: e003 b.n 8009104 <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
80090fc: 2301 movs r3, #1
80090fe: 73fb strb r3, [r7, #15]
break;
8009100: e000 b.n 8009104 <HAL_TIM_ConfigClockSource+0x174>
break;
8009102: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
8009104: 687b ldr r3, [r7, #4]
8009106: 2201 movs r2, #1
8009108: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
800910c: 687b ldr r3, [r7, #4]
800910e: 2200 movs r2, #0
8009110: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8009114: 7bfb ldrb r3, [r7, #15]
}
8009116: 4618 mov r0, r3
8009118: 3710 adds r7, #16
800911a: 46bd mov sp, r7
800911c: bd80 pop {r7, pc}
0800911e <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
800911e: b480 push {r7}
8009120: b085 sub sp, #20
8009122: af00 add r7, sp, #0
8009124: 6078 str r0, [r7, #4]
8009126: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
8009128: 683b ldr r3, [r7, #0]
800912a: 2b00 cmp r3, #0
800912c: d104 bne.n 8009138 <HAL_TIM_GetChannelState+0x1a>
800912e: 687b ldr r3, [r7, #4]
8009130: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8009134: b2db uxtb r3, r3
8009136: e013 b.n 8009160 <HAL_TIM_GetChannelState+0x42>
8009138: 683b ldr r3, [r7, #0]
800913a: 2b04 cmp r3, #4
800913c: d104 bne.n 8009148 <HAL_TIM_GetChannelState+0x2a>
800913e: 687b ldr r3, [r7, #4]
8009140: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8009144: b2db uxtb r3, r3
8009146: e00b b.n 8009160 <HAL_TIM_GetChannelState+0x42>
8009148: 683b ldr r3, [r7, #0]
800914a: 2b08 cmp r3, #8
800914c: d104 bne.n 8009158 <HAL_TIM_GetChannelState+0x3a>
800914e: 687b ldr r3, [r7, #4]
8009150: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8009154: b2db uxtb r3, r3
8009156: e003 b.n 8009160 <HAL_TIM_GetChannelState+0x42>
8009158: 687b ldr r3, [r7, #4]
800915a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800915e: b2db uxtb r3, r3
8009160: 73fb strb r3, [r7, #15]
return channel_state;
8009162: 7bfb ldrb r3, [r7, #15]
}
8009164: 4618 mov r0, r3
8009166: 3714 adds r7, #20
8009168: 46bd mov sp, r7
800916a: bc80 pop {r7}
800916c: 4770 bx lr
...
08009170 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
8009170: b480 push {r7}
8009172: b085 sub sp, #20
8009174: af00 add r7, sp, #0
8009176: 6078 str r0, [r7, #4]
8009178: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
800917a: 687b ldr r3, [r7, #4]
800917c: 681b ldr r3, [r3, #0]
800917e: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8009180: 687b ldr r3, [r7, #4]
8009182: 4a2f ldr r2, [pc, #188] @ (8009240 <TIM_Base_SetConfig+0xd0>)
8009184: 4293 cmp r3, r2
8009186: d00b beq.n 80091a0 <TIM_Base_SetConfig+0x30>
8009188: 687b ldr r3, [r7, #4]
800918a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800918e: d007 beq.n 80091a0 <TIM_Base_SetConfig+0x30>
8009190: 687b ldr r3, [r7, #4]
8009192: 4a2c ldr r2, [pc, #176] @ (8009244 <TIM_Base_SetConfig+0xd4>)
8009194: 4293 cmp r3, r2
8009196: d003 beq.n 80091a0 <TIM_Base_SetConfig+0x30>
8009198: 687b ldr r3, [r7, #4]
800919a: 4a2b ldr r2, [pc, #172] @ (8009248 <TIM_Base_SetConfig+0xd8>)
800919c: 4293 cmp r3, r2
800919e: d108 bne.n 80091b2 <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
80091a0: 68fb ldr r3, [r7, #12]
80091a2: f023 0370 bic.w r3, r3, #112 @ 0x70
80091a6: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
80091a8: 683b ldr r3, [r7, #0]
80091aa: 685b ldr r3, [r3, #4]
80091ac: 68fa ldr r2, [r7, #12]
80091ae: 4313 orrs r3, r2
80091b0: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
80091b2: 687b ldr r3, [r7, #4]
80091b4: 4a22 ldr r2, [pc, #136] @ (8009240 <TIM_Base_SetConfig+0xd0>)
80091b6: 4293 cmp r3, r2
80091b8: d00b beq.n 80091d2 <TIM_Base_SetConfig+0x62>
80091ba: 687b ldr r3, [r7, #4]
80091bc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80091c0: d007 beq.n 80091d2 <TIM_Base_SetConfig+0x62>
80091c2: 687b ldr r3, [r7, #4]
80091c4: 4a1f ldr r2, [pc, #124] @ (8009244 <TIM_Base_SetConfig+0xd4>)
80091c6: 4293 cmp r3, r2
80091c8: d003 beq.n 80091d2 <TIM_Base_SetConfig+0x62>
80091ca: 687b ldr r3, [r7, #4]
80091cc: 4a1e ldr r2, [pc, #120] @ (8009248 <TIM_Base_SetConfig+0xd8>)
80091ce: 4293 cmp r3, r2
80091d0: d108 bne.n 80091e4 <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
80091d2: 68fb ldr r3, [r7, #12]
80091d4: f423 7340 bic.w r3, r3, #768 @ 0x300
80091d8: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
80091da: 683b ldr r3, [r7, #0]
80091dc: 68db ldr r3, [r3, #12]
80091de: 68fa ldr r2, [r7, #12]
80091e0: 4313 orrs r3, r2
80091e2: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
80091e4: 68fb ldr r3, [r7, #12]
80091e6: f023 0280 bic.w r2, r3, #128 @ 0x80
80091ea: 683b ldr r3, [r7, #0]
80091ec: 695b ldr r3, [r3, #20]
80091ee: 4313 orrs r3, r2
80091f0: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
80091f2: 687b ldr r3, [r7, #4]
80091f4: 68fa ldr r2, [r7, #12]
80091f6: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
80091f8: 683b ldr r3, [r7, #0]
80091fa: 689a ldr r2, [r3, #8]
80091fc: 687b ldr r3, [r7, #4]
80091fe: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8009200: 683b ldr r3, [r7, #0]
8009202: 681a ldr r2, [r3, #0]
8009204: 687b ldr r3, [r7, #4]
8009206: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8009208: 687b ldr r3, [r7, #4]
800920a: 4a0d ldr r2, [pc, #52] @ (8009240 <TIM_Base_SetConfig+0xd0>)
800920c: 4293 cmp r3, r2
800920e: d103 bne.n 8009218 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8009210: 683b ldr r3, [r7, #0]
8009212: 691a ldr r2, [r3, #16]
8009214: 687b ldr r3, [r7, #4]
8009216: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8009218: 687b ldr r3, [r7, #4]
800921a: 2201 movs r2, #1
800921c: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
800921e: 687b ldr r3, [r7, #4]
8009220: 691b ldr r3, [r3, #16]
8009222: f003 0301 and.w r3, r3, #1
8009226: 2b00 cmp r3, #0
8009228: d005 beq.n 8009236 <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
800922a: 687b ldr r3, [r7, #4]
800922c: 691b ldr r3, [r3, #16]
800922e: f023 0201 bic.w r2, r3, #1
8009232: 687b ldr r3, [r7, #4]
8009234: 611a str r2, [r3, #16]
}
}
8009236: bf00 nop
8009238: 3714 adds r7, #20
800923a: 46bd mov sp, r7
800923c: bc80 pop {r7}
800923e: 4770 bx lr
8009240: 40012c00 .word 0x40012c00
8009244: 40000400 .word 0x40000400
8009248: 40000800 .word 0x40000800
0800924c <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
800924c: b480 push {r7}
800924e: b087 sub sp, #28
8009250: af00 add r7, sp, #0
8009252: 6078 str r0, [r7, #4]
8009254: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8009256: 687b ldr r3, [r7, #4]
8009258: 6a1b ldr r3, [r3, #32]
800925a: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
800925c: 687b ldr r3, [r7, #4]
800925e: 6a1b ldr r3, [r3, #32]
8009260: f023 0201 bic.w r2, r3, #1
8009264: 687b ldr r3, [r7, #4]
8009266: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8009268: 687b ldr r3, [r7, #4]
800926a: 685b ldr r3, [r3, #4]
800926c: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
800926e: 687b ldr r3, [r7, #4]
8009270: 699b ldr r3, [r3, #24]
8009272: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
8009274: 68fb ldr r3, [r7, #12]
8009276: f023 0370 bic.w r3, r3, #112 @ 0x70
800927a: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
800927c: 68fb ldr r3, [r7, #12]
800927e: f023 0303 bic.w r3, r3, #3
8009282: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8009284: 683b ldr r3, [r7, #0]
8009286: 681b ldr r3, [r3, #0]
8009288: 68fa ldr r2, [r7, #12]
800928a: 4313 orrs r3, r2
800928c: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
800928e: 697b ldr r3, [r7, #20]
8009290: f023 0302 bic.w r3, r3, #2
8009294: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
8009296: 683b ldr r3, [r7, #0]
8009298: 689b ldr r3, [r3, #8]
800929a: 697a ldr r2, [r7, #20]
800929c: 4313 orrs r3, r2
800929e: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
80092a0: 687b ldr r3, [r7, #4]
80092a2: 4a1c ldr r2, [pc, #112] @ (8009314 <TIM_OC1_SetConfig+0xc8>)
80092a4: 4293 cmp r3, r2
80092a6: d10c bne.n 80092c2 <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
80092a8: 697b ldr r3, [r7, #20]
80092aa: f023 0308 bic.w r3, r3, #8
80092ae: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
80092b0: 683b ldr r3, [r7, #0]
80092b2: 68db ldr r3, [r3, #12]
80092b4: 697a ldr r2, [r7, #20]
80092b6: 4313 orrs r3, r2
80092b8: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
80092ba: 697b ldr r3, [r7, #20]
80092bc: f023 0304 bic.w r3, r3, #4
80092c0: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80092c2: 687b ldr r3, [r7, #4]
80092c4: 4a13 ldr r2, [pc, #76] @ (8009314 <TIM_OC1_SetConfig+0xc8>)
80092c6: 4293 cmp r3, r2
80092c8: d111 bne.n 80092ee <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
80092ca: 693b ldr r3, [r7, #16]
80092cc: f423 7380 bic.w r3, r3, #256 @ 0x100
80092d0: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
80092d2: 693b ldr r3, [r7, #16]
80092d4: f423 7300 bic.w r3, r3, #512 @ 0x200
80092d8: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
80092da: 683b ldr r3, [r7, #0]
80092dc: 695b ldr r3, [r3, #20]
80092de: 693a ldr r2, [r7, #16]
80092e0: 4313 orrs r3, r2
80092e2: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
80092e4: 683b ldr r3, [r7, #0]
80092e6: 699b ldr r3, [r3, #24]
80092e8: 693a ldr r2, [r7, #16]
80092ea: 4313 orrs r3, r2
80092ec: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80092ee: 687b ldr r3, [r7, #4]
80092f0: 693a ldr r2, [r7, #16]
80092f2: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
80092f4: 687b ldr r3, [r7, #4]
80092f6: 68fa ldr r2, [r7, #12]
80092f8: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
80092fa: 683b ldr r3, [r7, #0]
80092fc: 685a ldr r2, [r3, #4]
80092fe: 687b ldr r3, [r7, #4]
8009300: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8009302: 687b ldr r3, [r7, #4]
8009304: 697a ldr r2, [r7, #20]
8009306: 621a str r2, [r3, #32]
}
8009308: bf00 nop
800930a: 371c adds r7, #28
800930c: 46bd mov sp, r7
800930e: bc80 pop {r7}
8009310: 4770 bx lr
8009312: bf00 nop
8009314: 40012c00 .word 0x40012c00
08009318 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8009318: b480 push {r7}
800931a: b087 sub sp, #28
800931c: af00 add r7, sp, #0
800931e: 6078 str r0, [r7, #4]
8009320: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8009322: 687b ldr r3, [r7, #4]
8009324: 6a1b ldr r3, [r3, #32]
8009326: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8009328: 687b ldr r3, [r7, #4]
800932a: 6a1b ldr r3, [r3, #32]
800932c: f023 0210 bic.w r2, r3, #16
8009330: 687b ldr r3, [r7, #4]
8009332: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8009334: 687b ldr r3, [r7, #4]
8009336: 685b ldr r3, [r3, #4]
8009338: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
800933a: 687b ldr r3, [r7, #4]
800933c: 699b ldr r3, [r3, #24]
800933e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
8009340: 68fb ldr r3, [r7, #12]
8009342: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009346: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
8009348: 68fb ldr r3, [r7, #12]
800934a: f423 7340 bic.w r3, r3, #768 @ 0x300
800934e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8009350: 683b ldr r3, [r7, #0]
8009352: 681b ldr r3, [r3, #0]
8009354: 021b lsls r3, r3, #8
8009356: 68fa ldr r2, [r7, #12]
8009358: 4313 orrs r3, r2
800935a: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
800935c: 697b ldr r3, [r7, #20]
800935e: f023 0320 bic.w r3, r3, #32
8009362: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
8009364: 683b ldr r3, [r7, #0]
8009366: 689b ldr r3, [r3, #8]
8009368: 011b lsls r3, r3, #4
800936a: 697a ldr r2, [r7, #20]
800936c: 4313 orrs r3, r2
800936e: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
8009370: 687b ldr r3, [r7, #4]
8009372: 4a1d ldr r2, [pc, #116] @ (80093e8 <TIM_OC2_SetConfig+0xd0>)
8009374: 4293 cmp r3, r2
8009376: d10d bne.n 8009394 <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
8009378: 697b ldr r3, [r7, #20]
800937a: f023 0380 bic.w r3, r3, #128 @ 0x80
800937e: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
8009380: 683b ldr r3, [r7, #0]
8009382: 68db ldr r3, [r3, #12]
8009384: 011b lsls r3, r3, #4
8009386: 697a ldr r2, [r7, #20]
8009388: 4313 orrs r3, r2
800938a: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
800938c: 697b ldr r3, [r7, #20]
800938e: f023 0340 bic.w r3, r3, #64 @ 0x40
8009392: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8009394: 687b ldr r3, [r7, #4]
8009396: 4a14 ldr r2, [pc, #80] @ (80093e8 <TIM_OC2_SetConfig+0xd0>)
8009398: 4293 cmp r3, r2
800939a: d113 bne.n 80093c4 <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
800939c: 693b ldr r3, [r7, #16]
800939e: f423 6380 bic.w r3, r3, #1024 @ 0x400
80093a2: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
80093a4: 693b ldr r3, [r7, #16]
80093a6: f423 6300 bic.w r3, r3, #2048 @ 0x800
80093aa: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
80093ac: 683b ldr r3, [r7, #0]
80093ae: 695b ldr r3, [r3, #20]
80093b0: 009b lsls r3, r3, #2
80093b2: 693a ldr r2, [r7, #16]
80093b4: 4313 orrs r3, r2
80093b6: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
80093b8: 683b ldr r3, [r7, #0]
80093ba: 699b ldr r3, [r3, #24]
80093bc: 009b lsls r3, r3, #2
80093be: 693a ldr r2, [r7, #16]
80093c0: 4313 orrs r3, r2
80093c2: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80093c4: 687b ldr r3, [r7, #4]
80093c6: 693a ldr r2, [r7, #16]
80093c8: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
80093ca: 687b ldr r3, [r7, #4]
80093cc: 68fa ldr r2, [r7, #12]
80093ce: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
80093d0: 683b ldr r3, [r7, #0]
80093d2: 685a ldr r2, [r3, #4]
80093d4: 687b ldr r3, [r7, #4]
80093d6: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80093d8: 687b ldr r3, [r7, #4]
80093da: 697a ldr r2, [r7, #20]
80093dc: 621a str r2, [r3, #32]
}
80093de: bf00 nop
80093e0: 371c adds r7, #28
80093e2: 46bd mov sp, r7
80093e4: bc80 pop {r7}
80093e6: 4770 bx lr
80093e8: 40012c00 .word 0x40012c00
080093ec <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80093ec: b480 push {r7}
80093ee: b087 sub sp, #28
80093f0: af00 add r7, sp, #0
80093f2: 6078 str r0, [r7, #4]
80093f4: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80093f6: 687b ldr r3, [r7, #4]
80093f8: 6a1b ldr r3, [r3, #32]
80093fa: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
80093fc: 687b ldr r3, [r7, #4]
80093fe: 6a1b ldr r3, [r3, #32]
8009400: f423 7280 bic.w r2, r3, #256 @ 0x100
8009404: 687b ldr r3, [r7, #4]
8009406: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8009408: 687b ldr r3, [r7, #4]
800940a: 685b ldr r3, [r3, #4]
800940c: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
800940e: 687b ldr r3, [r7, #4]
8009410: 69db ldr r3, [r3, #28]
8009412: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
8009414: 68fb ldr r3, [r7, #12]
8009416: f023 0370 bic.w r3, r3, #112 @ 0x70
800941a: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
800941c: 68fb ldr r3, [r7, #12]
800941e: f023 0303 bic.w r3, r3, #3
8009422: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8009424: 683b ldr r3, [r7, #0]
8009426: 681b ldr r3, [r3, #0]
8009428: 68fa ldr r2, [r7, #12]
800942a: 4313 orrs r3, r2
800942c: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
800942e: 697b ldr r3, [r7, #20]
8009430: f423 7300 bic.w r3, r3, #512 @ 0x200
8009434: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
8009436: 683b ldr r3, [r7, #0]
8009438: 689b ldr r3, [r3, #8]
800943a: 021b lsls r3, r3, #8
800943c: 697a ldr r2, [r7, #20]
800943e: 4313 orrs r3, r2
8009440: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
8009442: 687b ldr r3, [r7, #4]
8009444: 4a1d ldr r2, [pc, #116] @ (80094bc <TIM_OC3_SetConfig+0xd0>)
8009446: 4293 cmp r3, r2
8009448: d10d bne.n 8009466 <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
800944a: 697b ldr r3, [r7, #20]
800944c: f423 6300 bic.w r3, r3, #2048 @ 0x800
8009450: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
8009452: 683b ldr r3, [r7, #0]
8009454: 68db ldr r3, [r3, #12]
8009456: 021b lsls r3, r3, #8
8009458: 697a ldr r2, [r7, #20]
800945a: 4313 orrs r3, r2
800945c: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
800945e: 697b ldr r3, [r7, #20]
8009460: f423 6380 bic.w r3, r3, #1024 @ 0x400
8009464: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8009466: 687b ldr r3, [r7, #4]
8009468: 4a14 ldr r2, [pc, #80] @ (80094bc <TIM_OC3_SetConfig+0xd0>)
800946a: 4293 cmp r3, r2
800946c: d113 bne.n 8009496 <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
800946e: 693b ldr r3, [r7, #16]
8009470: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8009474: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
8009476: 693b ldr r3, [r7, #16]
8009478: f423 5300 bic.w r3, r3, #8192 @ 0x2000
800947c: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
800947e: 683b ldr r3, [r7, #0]
8009480: 695b ldr r3, [r3, #20]
8009482: 011b lsls r3, r3, #4
8009484: 693a ldr r2, [r7, #16]
8009486: 4313 orrs r3, r2
8009488: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
800948a: 683b ldr r3, [r7, #0]
800948c: 699b ldr r3, [r3, #24]
800948e: 011b lsls r3, r3, #4
8009490: 693a ldr r2, [r7, #16]
8009492: 4313 orrs r3, r2
8009494: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8009496: 687b ldr r3, [r7, #4]
8009498: 693a ldr r2, [r7, #16]
800949a: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
800949c: 687b ldr r3, [r7, #4]
800949e: 68fa ldr r2, [r7, #12]
80094a0: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
80094a2: 683b ldr r3, [r7, #0]
80094a4: 685a ldr r2, [r3, #4]
80094a6: 687b ldr r3, [r7, #4]
80094a8: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80094aa: 687b ldr r3, [r7, #4]
80094ac: 697a ldr r2, [r7, #20]
80094ae: 621a str r2, [r3, #32]
}
80094b0: bf00 nop
80094b2: 371c adds r7, #28
80094b4: 46bd mov sp, r7
80094b6: bc80 pop {r7}
80094b8: 4770 bx lr
80094ba: bf00 nop
80094bc: 40012c00 .word 0x40012c00
080094c0 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80094c0: b480 push {r7}
80094c2: b087 sub sp, #28
80094c4: af00 add r7, sp, #0
80094c6: 6078 str r0, [r7, #4]
80094c8: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80094ca: 687b ldr r3, [r7, #4]
80094cc: 6a1b ldr r3, [r3, #32]
80094ce: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
80094d0: 687b ldr r3, [r7, #4]
80094d2: 6a1b ldr r3, [r3, #32]
80094d4: f423 5280 bic.w r2, r3, #4096 @ 0x1000
80094d8: 687b ldr r3, [r7, #4]
80094da: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80094dc: 687b ldr r3, [r7, #4]
80094de: 685b ldr r3, [r3, #4]
80094e0: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
80094e2: 687b ldr r3, [r7, #4]
80094e4: 69db ldr r3, [r3, #28]
80094e6: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
80094e8: 68fb ldr r3, [r7, #12]
80094ea: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80094ee: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
80094f0: 68fb ldr r3, [r7, #12]
80094f2: f423 7340 bic.w r3, r3, #768 @ 0x300
80094f6: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80094f8: 683b ldr r3, [r7, #0]
80094fa: 681b ldr r3, [r3, #0]
80094fc: 021b lsls r3, r3, #8
80094fe: 68fa ldr r2, [r7, #12]
8009500: 4313 orrs r3, r2
8009502: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8009504: 693b ldr r3, [r7, #16]
8009506: f423 5300 bic.w r3, r3, #8192 @ 0x2000
800950a: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
800950c: 683b ldr r3, [r7, #0]
800950e: 689b ldr r3, [r3, #8]
8009510: 031b lsls r3, r3, #12
8009512: 693a ldr r2, [r7, #16]
8009514: 4313 orrs r3, r2
8009516: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8009518: 687b ldr r3, [r7, #4]
800951a: 4a0f ldr r2, [pc, #60] @ (8009558 <TIM_OC4_SetConfig+0x98>)
800951c: 4293 cmp r3, r2
800951e: d109 bne.n 8009534 <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8009520: 697b ldr r3, [r7, #20]
8009522: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009526: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
8009528: 683b ldr r3, [r7, #0]
800952a: 695b ldr r3, [r3, #20]
800952c: 019b lsls r3, r3, #6
800952e: 697a ldr r2, [r7, #20]
8009530: 4313 orrs r3, r2
8009532: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8009534: 687b ldr r3, [r7, #4]
8009536: 697a ldr r2, [r7, #20]
8009538: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
800953a: 687b ldr r3, [r7, #4]
800953c: 68fa ldr r2, [r7, #12]
800953e: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
8009540: 683b ldr r3, [r7, #0]
8009542: 685a ldr r2, [r3, #4]
8009544: 687b ldr r3, [r7, #4]
8009546: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8009548: 687b ldr r3, [r7, #4]
800954a: 693a ldr r2, [r7, #16]
800954c: 621a str r2, [r3, #32]
}
800954e: bf00 nop
8009550: 371c adds r7, #28
8009552: 46bd mov sp, r7
8009554: bc80 pop {r7}
8009556: 4770 bx lr
8009558: 40012c00 .word 0x40012c00
0800955c <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
800955c: b480 push {r7}
800955e: b087 sub sp, #28
8009560: af00 add r7, sp, #0
8009562: 60f8 str r0, [r7, #12]
8009564: 60b9 str r1, [r7, #8]
8009566: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
8009568: 68fb ldr r3, [r7, #12]
800956a: 6a1b ldr r3, [r3, #32]
800956c: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
800956e: 68fb ldr r3, [r7, #12]
8009570: 6a1b ldr r3, [r3, #32]
8009572: f023 0201 bic.w r2, r3, #1
8009576: 68fb ldr r3, [r7, #12]
8009578: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
800957a: 68fb ldr r3, [r7, #12]
800957c: 699b ldr r3, [r3, #24]
800957e: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
8009580: 693b ldr r3, [r7, #16]
8009582: f023 03f0 bic.w r3, r3, #240 @ 0xf0
8009586: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8009588: 687b ldr r3, [r7, #4]
800958a: 011b lsls r3, r3, #4
800958c: 693a ldr r2, [r7, #16]
800958e: 4313 orrs r3, r2
8009590: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
8009592: 697b ldr r3, [r7, #20]
8009594: f023 030a bic.w r3, r3, #10
8009598: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
800959a: 697a ldr r2, [r7, #20]
800959c: 68bb ldr r3, [r7, #8]
800959e: 4313 orrs r3, r2
80095a0: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
80095a2: 68fb ldr r3, [r7, #12]
80095a4: 693a ldr r2, [r7, #16]
80095a6: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
80095a8: 68fb ldr r3, [r7, #12]
80095aa: 697a ldr r2, [r7, #20]
80095ac: 621a str r2, [r3, #32]
}
80095ae: bf00 nop
80095b0: 371c adds r7, #28
80095b2: 46bd mov sp, r7
80095b4: bc80 pop {r7}
80095b6: 4770 bx lr
080095b8 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
80095b8: b480 push {r7}
80095ba: b087 sub sp, #28
80095bc: af00 add r7, sp, #0
80095be: 60f8 str r0, [r7, #12]
80095c0: 60b9 str r1, [r7, #8]
80095c2: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
80095c4: 68fb ldr r3, [r7, #12]
80095c6: 6a1b ldr r3, [r3, #32]
80095c8: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
80095ca: 68fb ldr r3, [r7, #12]
80095cc: 6a1b ldr r3, [r3, #32]
80095ce: f023 0210 bic.w r2, r3, #16
80095d2: 68fb ldr r3, [r7, #12]
80095d4: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
80095d6: 68fb ldr r3, [r7, #12]
80095d8: 699b ldr r3, [r3, #24]
80095da: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
80095dc: 693b ldr r3, [r7, #16]
80095de: f423 4370 bic.w r3, r3, #61440 @ 0xf000
80095e2: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
80095e4: 687b ldr r3, [r7, #4]
80095e6: 031b lsls r3, r3, #12
80095e8: 693a ldr r2, [r7, #16]
80095ea: 4313 orrs r3, r2
80095ec: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
80095ee: 697b ldr r3, [r7, #20]
80095f0: f023 03a0 bic.w r3, r3, #160 @ 0xa0
80095f4: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
80095f6: 68bb ldr r3, [r7, #8]
80095f8: 011b lsls r3, r3, #4
80095fa: 697a ldr r2, [r7, #20]
80095fc: 4313 orrs r3, r2
80095fe: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8009600: 68fb ldr r3, [r7, #12]
8009602: 693a ldr r2, [r7, #16]
8009604: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8009606: 68fb ldr r3, [r7, #12]
8009608: 697a ldr r2, [r7, #20]
800960a: 621a str r2, [r3, #32]
}
800960c: bf00 nop
800960e: 371c adds r7, #28
8009610: 46bd mov sp, r7
8009612: bc80 pop {r7}
8009614: 4770 bx lr
08009616 <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
8009616: b480 push {r7}
8009618: b085 sub sp, #20
800961a: af00 add r7, sp, #0
800961c: 6078 str r0, [r7, #4]
800961e: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8009620: 687b ldr r3, [r7, #4]
8009622: 689b ldr r3, [r3, #8]
8009624: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8009626: 68fb ldr r3, [r7, #12]
8009628: f023 0370 bic.w r3, r3, #112 @ 0x70
800962c: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
800962e: 683a ldr r2, [r7, #0]
8009630: 68fb ldr r3, [r7, #12]
8009632: 4313 orrs r3, r2
8009634: f043 0307 orr.w r3, r3, #7
8009638: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
800963a: 687b ldr r3, [r7, #4]
800963c: 68fa ldr r2, [r7, #12]
800963e: 609a str r2, [r3, #8]
}
8009640: bf00 nop
8009642: 3714 adds r7, #20
8009644: 46bd mov sp, r7
8009646: bc80 pop {r7}
8009648: 4770 bx lr
0800964a <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
800964a: b480 push {r7}
800964c: b087 sub sp, #28
800964e: af00 add r7, sp, #0
8009650: 60f8 str r0, [r7, #12]
8009652: 60b9 str r1, [r7, #8]
8009654: 607a str r2, [r7, #4]
8009656: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8009658: 68fb ldr r3, [r7, #12]
800965a: 689b ldr r3, [r3, #8]
800965c: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
800965e: 697b ldr r3, [r7, #20]
8009660: f423 437f bic.w r3, r3, #65280 @ 0xff00
8009664: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8009666: 683b ldr r3, [r7, #0]
8009668: 021a lsls r2, r3, #8
800966a: 687b ldr r3, [r7, #4]
800966c: 431a orrs r2, r3
800966e: 68bb ldr r3, [r7, #8]
8009670: 4313 orrs r3, r2
8009672: 697a ldr r2, [r7, #20]
8009674: 4313 orrs r3, r2
8009676: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8009678: 68fb ldr r3, [r7, #12]
800967a: 697a ldr r2, [r7, #20]
800967c: 609a str r2, [r3, #8]
}
800967e: bf00 nop
8009680: 371c adds r7, #28
8009682: 46bd mov sp, r7
8009684: bc80 pop {r7}
8009686: 4770 bx lr
08009688 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8009688: b480 push {r7}
800968a: b087 sub sp, #28
800968c: af00 add r7, sp, #0
800968e: 60f8 str r0, [r7, #12]
8009690: 60b9 str r1, [r7, #8]
8009692: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8009694: 68bb ldr r3, [r7, #8]
8009696: f003 031f and.w r3, r3, #31
800969a: 2201 movs r2, #1
800969c: fa02 f303 lsl.w r3, r2, r3
80096a0: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
80096a2: 68fb ldr r3, [r7, #12]
80096a4: 6a1a ldr r2, [r3, #32]
80096a6: 697b ldr r3, [r7, #20]
80096a8: 43db mvns r3, r3
80096aa: 401a ands r2, r3
80096ac: 68fb ldr r3, [r7, #12]
80096ae: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
80096b0: 68fb ldr r3, [r7, #12]
80096b2: 6a1a ldr r2, [r3, #32]
80096b4: 68bb ldr r3, [r7, #8]
80096b6: f003 031f and.w r3, r3, #31
80096ba: 6879 ldr r1, [r7, #4]
80096bc: fa01 f303 lsl.w r3, r1, r3
80096c0: 431a orrs r2, r3
80096c2: 68fb ldr r3, [r7, #12]
80096c4: 621a str r2, [r3, #32]
}
80096c6: bf00 nop
80096c8: 371c adds r7, #28
80096ca: 46bd mov sp, r7
80096cc: bc80 pop {r7}
80096ce: 4770 bx lr
080096d0 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
80096d0: b480 push {r7}
80096d2: b085 sub sp, #20
80096d4: af00 add r7, sp, #0
80096d6: 6078 str r0, [r7, #4]
80096d8: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
80096da: 687b ldr r3, [r7, #4]
80096dc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80096e0: 2b01 cmp r3, #1
80096e2: d101 bne.n 80096e8 <HAL_TIMEx_MasterConfigSynchronization+0x18>
80096e4: 2302 movs r3, #2
80096e6: e046 b.n 8009776 <HAL_TIMEx_MasterConfigSynchronization+0xa6>
80096e8: 687b ldr r3, [r7, #4]
80096ea: 2201 movs r2, #1
80096ec: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
80096f0: 687b ldr r3, [r7, #4]
80096f2: 2202 movs r2, #2
80096f4: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
80096f8: 687b ldr r3, [r7, #4]
80096fa: 681b ldr r3, [r3, #0]
80096fc: 685b ldr r3, [r3, #4]
80096fe: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8009700: 687b ldr r3, [r7, #4]
8009702: 681b ldr r3, [r3, #0]
8009704: 689b ldr r3, [r3, #8]
8009706: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8009708: 68fb ldr r3, [r7, #12]
800970a: f023 0370 bic.w r3, r3, #112 @ 0x70
800970e: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8009710: 683b ldr r3, [r7, #0]
8009712: 681b ldr r3, [r3, #0]
8009714: 68fa ldr r2, [r7, #12]
8009716: 4313 orrs r3, r2
8009718: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
800971a: 687b ldr r3, [r7, #4]
800971c: 681b ldr r3, [r3, #0]
800971e: 68fa ldr r2, [r7, #12]
8009720: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8009722: 687b ldr r3, [r7, #4]
8009724: 681b ldr r3, [r3, #0]
8009726: 4a16 ldr r2, [pc, #88] @ (8009780 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8009728: 4293 cmp r3, r2
800972a: d00e beq.n 800974a <HAL_TIMEx_MasterConfigSynchronization+0x7a>
800972c: 687b ldr r3, [r7, #4]
800972e: 681b ldr r3, [r3, #0]
8009730: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8009734: d009 beq.n 800974a <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8009736: 687b ldr r3, [r7, #4]
8009738: 681b ldr r3, [r3, #0]
800973a: 4a12 ldr r2, [pc, #72] @ (8009784 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
800973c: 4293 cmp r3, r2
800973e: d004 beq.n 800974a <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8009740: 687b ldr r3, [r7, #4]
8009742: 681b ldr r3, [r3, #0]
8009744: 4a10 ldr r2, [pc, #64] @ (8009788 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
8009746: 4293 cmp r3, r2
8009748: d10c bne.n 8009764 <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
800974a: 68bb ldr r3, [r7, #8]
800974c: f023 0380 bic.w r3, r3, #128 @ 0x80
8009750: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8009752: 683b ldr r3, [r7, #0]
8009754: 685b ldr r3, [r3, #4]
8009756: 68ba ldr r2, [r7, #8]
8009758: 4313 orrs r3, r2
800975a: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
800975c: 687b ldr r3, [r7, #4]
800975e: 681b ldr r3, [r3, #0]
8009760: 68ba ldr r2, [r7, #8]
8009762: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8009764: 687b ldr r3, [r7, #4]
8009766: 2201 movs r2, #1
8009768: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
800976c: 687b ldr r3, [r7, #4]
800976e: 2200 movs r2, #0
8009770: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8009774: 2300 movs r3, #0
}
8009776: 4618 mov r0, r3
8009778: 3714 adds r7, #20
800977a: 46bd mov sp, r7
800977c: bc80 pop {r7}
800977e: 4770 bx lr
8009780: 40012c00 .word 0x40012c00
8009784: 40000400 .word 0x40000400
8009788: 40000800 .word 0x40000800
0800978c <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
800978c: b580 push {r7, lr}
800978e: b082 sub sp, #8
8009790: af00 add r7, sp, #0
8009792: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8009794: 687b ldr r3, [r7, #4]
8009796: 2b00 cmp r3, #0
8009798: d101 bne.n 800979e <HAL_UART_Init+0x12>
{
return HAL_ERROR;
800979a: 2301 movs r3, #1
800979c: e042 b.n 8009824 <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
800979e: 687b ldr r3, [r7, #4]
80097a0: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80097a4: b2db uxtb r3, r3
80097a6: 2b00 cmp r3, #0
80097a8: d106 bne.n 80097b8 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
80097aa: 687b ldr r3, [r7, #4]
80097ac: 2200 movs r2, #0
80097ae: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
80097b2: 6878 ldr r0, [r7, #4]
80097b4: f7fb fb80 bl 8004eb8 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
80097b8: 687b ldr r3, [r7, #4]
80097ba: 2224 movs r2, #36 @ 0x24
80097bc: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
80097c0: 687b ldr r3, [r7, #4]
80097c2: 681b ldr r3, [r3, #0]
80097c4: 68da ldr r2, [r3, #12]
80097c6: 687b ldr r3, [r7, #4]
80097c8: 681b ldr r3, [r3, #0]
80097ca: f422 5200 bic.w r2, r2, #8192 @ 0x2000
80097ce: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
80097d0: 6878 ldr r0, [r7, #4]
80097d2: f000 f971 bl 8009ab8 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
80097d6: 687b ldr r3, [r7, #4]
80097d8: 681b ldr r3, [r3, #0]
80097da: 691a ldr r2, [r3, #16]
80097dc: 687b ldr r3, [r7, #4]
80097de: 681b ldr r3, [r3, #0]
80097e0: f422 4290 bic.w r2, r2, #18432 @ 0x4800
80097e4: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
80097e6: 687b ldr r3, [r7, #4]
80097e8: 681b ldr r3, [r3, #0]
80097ea: 695a ldr r2, [r3, #20]
80097ec: 687b ldr r3, [r7, #4]
80097ee: 681b ldr r3, [r3, #0]
80097f0: f022 022a bic.w r2, r2, #42 @ 0x2a
80097f4: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
80097f6: 687b ldr r3, [r7, #4]
80097f8: 681b ldr r3, [r3, #0]
80097fa: 68da ldr r2, [r3, #12]
80097fc: 687b ldr r3, [r7, #4]
80097fe: 681b ldr r3, [r3, #0]
8009800: f442 5200 orr.w r2, r2, #8192 @ 0x2000
8009804: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8009806: 687b ldr r3, [r7, #4]
8009808: 2200 movs r2, #0
800980a: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
800980c: 687b ldr r3, [r7, #4]
800980e: 2220 movs r2, #32
8009810: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
8009814: 687b ldr r3, [r7, #4]
8009816: 2220 movs r2, #32
8009818: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
800981c: 687b ldr r3, [r7, #4]
800981e: 2200 movs r2, #0
8009820: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
8009822: 2300 movs r3, #0
}
8009824: 4618 mov r0, r3
8009826: 3708 adds r7, #8
8009828: 46bd mov sp, r7
800982a: bd80 pop {r7, pc}
0800982c <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
800982c: b580 push {r7, lr}
800982e: b08a sub sp, #40 @ 0x28
8009830: af02 add r7, sp, #8
8009832: 60f8 str r0, [r7, #12]
8009834: 60b9 str r1, [r7, #8]
8009836: 603b str r3, [r7, #0]
8009838: 4613 mov r3, r2
800983a: 80fb strh r3, [r7, #6]
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart = 0U;
800983c: 2300 movs r3, #0
800983e: 617b str r3, [r7, #20]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
8009840: 68fb ldr r3, [r7, #12]
8009842: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8009846: b2db uxtb r3, r3
8009848: 2b20 cmp r3, #32
800984a: d175 bne.n 8009938 <HAL_UART_Transmit+0x10c>
{
if ((pData == NULL) || (Size == 0U))
800984c: 68bb ldr r3, [r7, #8]
800984e: 2b00 cmp r3, #0
8009850: d002 beq.n 8009858 <HAL_UART_Transmit+0x2c>
8009852: 88fb ldrh r3, [r7, #6]
8009854: 2b00 cmp r3, #0
8009856: d101 bne.n 800985c <HAL_UART_Transmit+0x30>
{
return HAL_ERROR;
8009858: 2301 movs r3, #1
800985a: e06e b.n 800993a <HAL_UART_Transmit+0x10e>
}
huart->ErrorCode = HAL_UART_ERROR_NONE;
800985c: 68fb ldr r3, [r7, #12]
800985e: 2200 movs r2, #0
8009860: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_BUSY_TX;
8009862: 68fb ldr r3, [r7, #12]
8009864: 2221 movs r2, #33 @ 0x21
8009866: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
800986a: f7fb fc6d bl 8005148 <HAL_GetTick>
800986e: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
8009870: 68fb ldr r3, [r7, #12]
8009872: 88fa ldrh r2, [r7, #6]
8009874: 849a strh r2, [r3, #36] @ 0x24
huart->TxXferCount = Size;
8009876: 68fb ldr r3, [r7, #12]
8009878: 88fa ldrh r2, [r7, #6]
800987a: 84da strh r2, [r3, #38] @ 0x26
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
800987c: 68fb ldr r3, [r7, #12]
800987e: 689b ldr r3, [r3, #8]
8009880: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8009884: d108 bne.n 8009898 <HAL_UART_Transmit+0x6c>
8009886: 68fb ldr r3, [r7, #12]
8009888: 691b ldr r3, [r3, #16]
800988a: 2b00 cmp r3, #0
800988c: d104 bne.n 8009898 <HAL_UART_Transmit+0x6c>
{
pdata8bits = NULL;
800988e: 2300 movs r3, #0
8009890: 61fb str r3, [r7, #28]
pdata16bits = (const uint16_t *) pData;
8009892: 68bb ldr r3, [r7, #8]
8009894: 61bb str r3, [r7, #24]
8009896: e003 b.n 80098a0 <HAL_UART_Transmit+0x74>
}
else
{
pdata8bits = pData;
8009898: 68bb ldr r3, [r7, #8]
800989a: 61fb str r3, [r7, #28]
pdata16bits = NULL;
800989c: 2300 movs r3, #0
800989e: 61bb str r3, [r7, #24]
}
while (huart->TxXferCount > 0U)
80098a0: e02e b.n 8009900 <HAL_UART_Transmit+0xd4>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
80098a2: 683b ldr r3, [r7, #0]
80098a4: 9300 str r3, [sp, #0]
80098a6: 697b ldr r3, [r7, #20]
80098a8: 2200 movs r2, #0
80098aa: 2180 movs r1, #128 @ 0x80
80098ac: 68f8 ldr r0, [r7, #12]
80098ae: f000 f848 bl 8009942 <UART_WaitOnFlagUntilTimeout>
80098b2: 4603 mov r3, r0
80098b4: 2b00 cmp r3, #0
80098b6: d005 beq.n 80098c4 <HAL_UART_Transmit+0x98>
{
huart->gState = HAL_UART_STATE_READY;
80098b8: 68fb ldr r3, [r7, #12]
80098ba: 2220 movs r2, #32
80098bc: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
80098c0: 2303 movs r3, #3
80098c2: e03a b.n 800993a <HAL_UART_Transmit+0x10e>
}
if (pdata8bits == NULL)
80098c4: 69fb ldr r3, [r7, #28]
80098c6: 2b00 cmp r3, #0
80098c8: d10b bne.n 80098e2 <HAL_UART_Transmit+0xb6>
{
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
80098ca: 69bb ldr r3, [r7, #24]
80098cc: 881b ldrh r3, [r3, #0]
80098ce: 461a mov r2, r3
80098d0: 68fb ldr r3, [r7, #12]
80098d2: 681b ldr r3, [r3, #0]
80098d4: f3c2 0208 ubfx r2, r2, #0, #9
80098d8: 605a str r2, [r3, #4]
pdata16bits++;
80098da: 69bb ldr r3, [r7, #24]
80098dc: 3302 adds r3, #2
80098de: 61bb str r3, [r7, #24]
80098e0: e007 b.n 80098f2 <HAL_UART_Transmit+0xc6>
}
else
{
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
80098e2: 69fb ldr r3, [r7, #28]
80098e4: 781a ldrb r2, [r3, #0]
80098e6: 68fb ldr r3, [r7, #12]
80098e8: 681b ldr r3, [r3, #0]
80098ea: 605a str r2, [r3, #4]
pdata8bits++;
80098ec: 69fb ldr r3, [r7, #28]
80098ee: 3301 adds r3, #1
80098f0: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
80098f2: 68fb ldr r3, [r7, #12]
80098f4: 8cdb ldrh r3, [r3, #38] @ 0x26
80098f6: b29b uxth r3, r3
80098f8: 3b01 subs r3, #1
80098fa: b29a uxth r2, r3
80098fc: 68fb ldr r3, [r7, #12]
80098fe: 84da strh r2, [r3, #38] @ 0x26
while (huart->TxXferCount > 0U)
8009900: 68fb ldr r3, [r7, #12]
8009902: 8cdb ldrh r3, [r3, #38] @ 0x26
8009904: b29b uxth r3, r3
8009906: 2b00 cmp r3, #0
8009908: d1cb bne.n 80098a2 <HAL_UART_Transmit+0x76>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
800990a: 683b ldr r3, [r7, #0]
800990c: 9300 str r3, [sp, #0]
800990e: 697b ldr r3, [r7, #20]
8009910: 2200 movs r2, #0
8009912: 2140 movs r1, #64 @ 0x40
8009914: 68f8 ldr r0, [r7, #12]
8009916: f000 f814 bl 8009942 <UART_WaitOnFlagUntilTimeout>
800991a: 4603 mov r3, r0
800991c: 2b00 cmp r3, #0
800991e: d005 beq.n 800992c <HAL_UART_Transmit+0x100>
{
huart->gState = HAL_UART_STATE_READY;
8009920: 68fb ldr r3, [r7, #12]
8009922: 2220 movs r2, #32
8009924: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
8009928: 2303 movs r3, #3
800992a: e006 b.n 800993a <HAL_UART_Transmit+0x10e>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
800992c: 68fb ldr r3, [r7, #12]
800992e: 2220 movs r2, #32
8009930: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_OK;
8009934: 2300 movs r3, #0
8009936: e000 b.n 800993a <HAL_UART_Transmit+0x10e>
}
else
{
return HAL_BUSY;
8009938: 2302 movs r3, #2
}
}
800993a: 4618 mov r0, r3
800993c: 3720 adds r7, #32
800993e: 46bd mov sp, r7
8009940: bd80 pop {r7, pc}
08009942 <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
8009942: b580 push {r7, lr}
8009944: b086 sub sp, #24
8009946: af00 add r7, sp, #0
8009948: 60f8 str r0, [r7, #12]
800994a: 60b9 str r1, [r7, #8]
800994c: 603b str r3, [r7, #0]
800994e: 4613 mov r3, r2
8009950: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8009952: e03b b.n 80099cc <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8009954: 6a3b ldr r3, [r7, #32]
8009956: f1b3 3fff cmp.w r3, #4294967295
800995a: d037 beq.n 80099cc <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
800995c: f7fb fbf4 bl 8005148 <HAL_GetTick>
8009960: 4602 mov r2, r0
8009962: 683b ldr r3, [r7, #0]
8009964: 1ad3 subs r3, r2, r3
8009966: 6a3a ldr r2, [r7, #32]
8009968: 429a cmp r2, r3
800996a: d302 bcc.n 8009972 <UART_WaitOnFlagUntilTimeout+0x30>
800996c: 6a3b ldr r3, [r7, #32]
800996e: 2b00 cmp r3, #0
8009970: d101 bne.n 8009976 <UART_WaitOnFlagUntilTimeout+0x34>
{
return HAL_TIMEOUT;
8009972: 2303 movs r3, #3
8009974: e03a b.n 80099ec <UART_WaitOnFlagUntilTimeout+0xaa>
}
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
8009976: 68fb ldr r3, [r7, #12]
8009978: 681b ldr r3, [r3, #0]
800997a: 68db ldr r3, [r3, #12]
800997c: f003 0304 and.w r3, r3, #4
8009980: 2b00 cmp r3, #0
8009982: d023 beq.n 80099cc <UART_WaitOnFlagUntilTimeout+0x8a>
8009984: 68bb ldr r3, [r7, #8]
8009986: 2b80 cmp r3, #128 @ 0x80
8009988: d020 beq.n 80099cc <UART_WaitOnFlagUntilTimeout+0x8a>
800998a: 68bb ldr r3, [r7, #8]
800998c: 2b40 cmp r3, #64 @ 0x40
800998e: d01d beq.n 80099cc <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
8009990: 68fb ldr r3, [r7, #12]
8009992: 681b ldr r3, [r3, #0]
8009994: 681b ldr r3, [r3, #0]
8009996: f003 0308 and.w r3, r3, #8
800999a: 2b08 cmp r3, #8
800999c: d116 bne.n 80099cc <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_OREFLAG(huart);
800999e: 2300 movs r3, #0
80099a0: 617b str r3, [r7, #20]
80099a2: 68fb ldr r3, [r7, #12]
80099a4: 681b ldr r3, [r3, #0]
80099a6: 681b ldr r3, [r3, #0]
80099a8: 617b str r3, [r7, #20]
80099aa: 68fb ldr r3, [r7, #12]
80099ac: 681b ldr r3, [r3, #0]
80099ae: 685b ldr r3, [r3, #4]
80099b0: 617b str r3, [r7, #20]
80099b2: 697b ldr r3, [r7, #20]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
80099b4: 68f8 ldr r0, [r7, #12]
80099b6: f000 f81d bl 80099f4 <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_ORE;
80099ba: 68fb ldr r3, [r7, #12]
80099bc: 2208 movs r2, #8
80099be: 645a str r2, [r3, #68] @ 0x44
/* Process Unlocked */
__HAL_UNLOCK(huart);
80099c0: 68fb ldr r3, [r7, #12]
80099c2: 2200 movs r2, #0
80099c4: f883 2040 strb.w r2, [r3, #64] @ 0x40
return HAL_ERROR;
80099c8: 2301 movs r3, #1
80099ca: e00f b.n 80099ec <UART_WaitOnFlagUntilTimeout+0xaa>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
80099cc: 68fb ldr r3, [r7, #12]
80099ce: 681b ldr r3, [r3, #0]
80099d0: 681a ldr r2, [r3, #0]
80099d2: 68bb ldr r3, [r7, #8]
80099d4: 4013 ands r3, r2
80099d6: 68ba ldr r2, [r7, #8]
80099d8: 429a cmp r2, r3
80099da: bf0c ite eq
80099dc: 2301 moveq r3, #1
80099de: 2300 movne r3, #0
80099e0: b2db uxtb r3, r3
80099e2: 461a mov r2, r3
80099e4: 79fb ldrb r3, [r7, #7]
80099e6: 429a cmp r2, r3
80099e8: d0b4 beq.n 8009954 <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
80099ea: 2300 movs r3, #0
}
80099ec: 4618 mov r0, r3
80099ee: 3718 adds r7, #24
80099f0: 46bd mov sp, r7
80099f2: bd80 pop {r7, pc}
080099f4 <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
80099f4: b480 push {r7}
80099f6: b095 sub sp, #84 @ 0x54
80099f8: af00 add r7, sp, #0
80099fa: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
80099fc: 687b ldr r3, [r7, #4]
80099fe: 681b ldr r3, [r3, #0]
8009a00: 330c adds r3, #12
8009a02: 637b str r3, [r7, #52] @ 0x34
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009a04: 6b7b ldr r3, [r7, #52] @ 0x34
8009a06: e853 3f00 ldrex r3, [r3]
8009a0a: 633b str r3, [r7, #48] @ 0x30
return(result);
8009a0c: 6b3b ldr r3, [r7, #48] @ 0x30
8009a0e: f423 7390 bic.w r3, r3, #288 @ 0x120
8009a12: 64fb str r3, [r7, #76] @ 0x4c
8009a14: 687b ldr r3, [r7, #4]
8009a16: 681b ldr r3, [r3, #0]
8009a18: 330c adds r3, #12
8009a1a: 6cfa ldr r2, [r7, #76] @ 0x4c
8009a1c: 643a str r2, [r7, #64] @ 0x40
8009a1e: 63fb str r3, [r7, #60] @ 0x3c
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009a20: 6bf9 ldr r1, [r7, #60] @ 0x3c
8009a22: 6c3a ldr r2, [r7, #64] @ 0x40
8009a24: e841 2300 strex r3, r2, [r1]
8009a28: 63bb str r3, [r7, #56] @ 0x38
return(result);
8009a2a: 6bbb ldr r3, [r7, #56] @ 0x38
8009a2c: 2b00 cmp r3, #0
8009a2e: d1e5 bne.n 80099fc <UART_EndRxTransfer+0x8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8009a30: 687b ldr r3, [r7, #4]
8009a32: 681b ldr r3, [r3, #0]
8009a34: 3314 adds r3, #20
8009a36: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009a38: 6a3b ldr r3, [r7, #32]
8009a3a: e853 3f00 ldrex r3, [r3]
8009a3e: 61fb str r3, [r7, #28]
return(result);
8009a40: 69fb ldr r3, [r7, #28]
8009a42: f023 0301 bic.w r3, r3, #1
8009a46: 64bb str r3, [r7, #72] @ 0x48
8009a48: 687b ldr r3, [r7, #4]
8009a4a: 681b ldr r3, [r3, #0]
8009a4c: 3314 adds r3, #20
8009a4e: 6cba ldr r2, [r7, #72] @ 0x48
8009a50: 62fa str r2, [r7, #44] @ 0x2c
8009a52: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009a54: 6ab9 ldr r1, [r7, #40] @ 0x28
8009a56: 6afa ldr r2, [r7, #44] @ 0x2c
8009a58: e841 2300 strex r3, r2, [r1]
8009a5c: 627b str r3, [r7, #36] @ 0x24
return(result);
8009a5e: 6a7b ldr r3, [r7, #36] @ 0x24
8009a60: 2b00 cmp r3, #0
8009a62: d1e5 bne.n 8009a30 <UART_EndRxTransfer+0x3c>
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
8009a64: 687b ldr r3, [r7, #4]
8009a66: 6b1b ldr r3, [r3, #48] @ 0x30
8009a68: 2b01 cmp r3, #1
8009a6a: d119 bne.n 8009aa0 <UART_EndRxTransfer+0xac>
{
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
8009a6c: 687b ldr r3, [r7, #4]
8009a6e: 681b ldr r3, [r3, #0]
8009a70: 330c adds r3, #12
8009a72: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009a74: 68fb ldr r3, [r7, #12]
8009a76: e853 3f00 ldrex r3, [r3]
8009a7a: 60bb str r3, [r7, #8]
return(result);
8009a7c: 68bb ldr r3, [r7, #8]
8009a7e: f023 0310 bic.w r3, r3, #16
8009a82: 647b str r3, [r7, #68] @ 0x44
8009a84: 687b ldr r3, [r7, #4]
8009a86: 681b ldr r3, [r3, #0]
8009a88: 330c adds r3, #12
8009a8a: 6c7a ldr r2, [r7, #68] @ 0x44
8009a8c: 61ba str r2, [r7, #24]
8009a8e: 617b str r3, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009a90: 6979 ldr r1, [r7, #20]
8009a92: 69ba ldr r2, [r7, #24]
8009a94: e841 2300 strex r3, r2, [r1]
8009a98: 613b str r3, [r7, #16]
return(result);
8009a9a: 693b ldr r3, [r7, #16]
8009a9c: 2b00 cmp r3, #0
8009a9e: d1e5 bne.n 8009a6c <UART_EndRxTransfer+0x78>
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
8009aa0: 687b ldr r3, [r7, #4]
8009aa2: 2220 movs r2, #32
8009aa4: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8009aa8: 687b ldr r3, [r7, #4]
8009aaa: 2200 movs r2, #0
8009aac: 631a str r2, [r3, #48] @ 0x30
}
8009aae: bf00 nop
8009ab0: 3754 adds r7, #84 @ 0x54
8009ab2: 46bd mov sp, r7
8009ab4: bc80 pop {r7}
8009ab6: 4770 bx lr
08009ab8 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8009ab8: b580 push {r7, lr}
8009aba: b084 sub sp, #16
8009abc: af00 add r7, sp, #0
8009abe: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8009ac0: 687b ldr r3, [r7, #4]
8009ac2: 681b ldr r3, [r3, #0]
8009ac4: 691b ldr r3, [r3, #16]
8009ac6: f423 5140 bic.w r1, r3, #12288 @ 0x3000
8009aca: 687b ldr r3, [r7, #4]
8009acc: 68da ldr r2, [r3, #12]
8009ace: 687b ldr r3, [r7, #4]
8009ad0: 681b ldr r3, [r3, #0]
8009ad2: 430a orrs r2, r1
8009ad4: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
8009ad6: 687b ldr r3, [r7, #4]
8009ad8: 689a ldr r2, [r3, #8]
8009ada: 687b ldr r3, [r7, #4]
8009adc: 691b ldr r3, [r3, #16]
8009ade: 431a orrs r2, r3
8009ae0: 687b ldr r3, [r7, #4]
8009ae2: 695b ldr r3, [r3, #20]
8009ae4: 4313 orrs r3, r2
8009ae6: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8009ae8: 687b ldr r3, [r7, #4]
8009aea: 681b ldr r3, [r3, #0]
8009aec: 68db ldr r3, [r3, #12]
8009aee: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
8009af2: f023 030c bic.w r3, r3, #12
8009af6: 687a ldr r2, [r7, #4]
8009af8: 6812 ldr r2, [r2, #0]
8009afa: 68b9 ldr r1, [r7, #8]
8009afc: 430b orrs r3, r1
8009afe: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8009b00: 687b ldr r3, [r7, #4]
8009b02: 681b ldr r3, [r3, #0]
8009b04: 695b ldr r3, [r3, #20]
8009b06: f423 7140 bic.w r1, r3, #768 @ 0x300
8009b0a: 687b ldr r3, [r7, #4]
8009b0c: 699a ldr r2, [r3, #24]
8009b0e: 687b ldr r3, [r7, #4]
8009b10: 681b ldr r3, [r3, #0]
8009b12: 430a orrs r2, r1
8009b14: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8009b16: 687b ldr r3, [r7, #4]
8009b18: 681b ldr r3, [r3, #0]
8009b1a: 4a2c ldr r2, [pc, #176] @ (8009bcc <UART_SetConfig+0x114>)
8009b1c: 4293 cmp r3, r2
8009b1e: d103 bne.n 8009b28 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8009b20: f7fe fede bl 80088e0 <HAL_RCC_GetPCLK2Freq>
8009b24: 60f8 str r0, [r7, #12]
8009b26: e002 b.n 8009b2e <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8009b28: f7fe fec6 bl 80088b8 <HAL_RCC_GetPCLK1Freq>
8009b2c: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8009b2e: 68fa ldr r2, [r7, #12]
8009b30: 4613 mov r3, r2
8009b32: 009b lsls r3, r3, #2
8009b34: 4413 add r3, r2
8009b36: 009a lsls r2, r3, #2
8009b38: 441a add r2, r3
8009b3a: 687b ldr r3, [r7, #4]
8009b3c: 685b ldr r3, [r3, #4]
8009b3e: 009b lsls r3, r3, #2
8009b40: fbb2 f3f3 udiv r3, r2, r3
8009b44: 4a22 ldr r2, [pc, #136] @ (8009bd0 <UART_SetConfig+0x118>)
8009b46: fba2 2303 umull r2, r3, r2, r3
8009b4a: 095b lsrs r3, r3, #5
8009b4c: 0119 lsls r1, r3, #4
8009b4e: 68fa ldr r2, [r7, #12]
8009b50: 4613 mov r3, r2
8009b52: 009b lsls r3, r3, #2
8009b54: 4413 add r3, r2
8009b56: 009a lsls r2, r3, #2
8009b58: 441a add r2, r3
8009b5a: 687b ldr r3, [r7, #4]
8009b5c: 685b ldr r3, [r3, #4]
8009b5e: 009b lsls r3, r3, #2
8009b60: fbb2 f2f3 udiv r2, r2, r3
8009b64: 4b1a ldr r3, [pc, #104] @ (8009bd0 <UART_SetConfig+0x118>)
8009b66: fba3 0302 umull r0, r3, r3, r2
8009b6a: 095b lsrs r3, r3, #5
8009b6c: 2064 movs r0, #100 @ 0x64
8009b6e: fb00 f303 mul.w r3, r0, r3
8009b72: 1ad3 subs r3, r2, r3
8009b74: 011b lsls r3, r3, #4
8009b76: 3332 adds r3, #50 @ 0x32
8009b78: 4a15 ldr r2, [pc, #84] @ (8009bd0 <UART_SetConfig+0x118>)
8009b7a: fba2 2303 umull r2, r3, r2, r3
8009b7e: 095b lsrs r3, r3, #5
8009b80: f003 03f0 and.w r3, r3, #240 @ 0xf0
8009b84: 4419 add r1, r3
8009b86: 68fa ldr r2, [r7, #12]
8009b88: 4613 mov r3, r2
8009b8a: 009b lsls r3, r3, #2
8009b8c: 4413 add r3, r2
8009b8e: 009a lsls r2, r3, #2
8009b90: 441a add r2, r3
8009b92: 687b ldr r3, [r7, #4]
8009b94: 685b ldr r3, [r3, #4]
8009b96: 009b lsls r3, r3, #2
8009b98: fbb2 f2f3 udiv r2, r2, r3
8009b9c: 4b0c ldr r3, [pc, #48] @ (8009bd0 <UART_SetConfig+0x118>)
8009b9e: fba3 0302 umull r0, r3, r3, r2
8009ba2: 095b lsrs r3, r3, #5
8009ba4: 2064 movs r0, #100 @ 0x64
8009ba6: fb00 f303 mul.w r3, r0, r3
8009baa: 1ad3 subs r3, r2, r3
8009bac: 011b lsls r3, r3, #4
8009bae: 3332 adds r3, #50 @ 0x32
8009bb0: 4a07 ldr r2, [pc, #28] @ (8009bd0 <UART_SetConfig+0x118>)
8009bb2: fba2 2303 umull r2, r3, r2, r3
8009bb6: 095b lsrs r3, r3, #5
8009bb8: f003 020f and.w r2, r3, #15
8009bbc: 687b ldr r3, [r7, #4]
8009bbe: 681b ldr r3, [r3, #0]
8009bc0: 440a add r2, r1
8009bc2: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
8009bc4: bf00 nop
8009bc6: 3710 adds r7, #16
8009bc8: 46bd mov sp, r7
8009bca: bd80 pop {r7, pc}
8009bcc: 40013800 .word 0x40013800
8009bd0: 51eb851f .word 0x51eb851f
08009bd4 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009bd4: b480 push {r7}
8009bd6: b085 sub sp, #20
8009bd8: af00 add r7, sp, #0
8009bda: 60f8 str r0, [r7, #12]
8009bdc: 4638 mov r0, r7
8009bde: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009be2: 2300 movs r3, #0
}
8009be4: 4618 mov r0, r3
8009be6: 3714 adds r7, #20
8009be8: 46bd mov sp, r7
8009bea: bc80 pop {r7}
8009bec: 4770 bx lr
08009bee <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8009bee: b480 push {r7}
8009bf0: b085 sub sp, #20
8009bf2: af00 add r7, sp, #0
8009bf4: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009bf6: 687b ldr r3, [r7, #4]
8009bf8: 2200 movs r2, #0
8009bfa: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009bfe: f44f 433f mov.w r3, #48896 @ 0xbf00
8009c02: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8009c04: 68fb ldr r3, [r7, #12]
8009c06: b29a uxth r2, r3
8009c08: 687b ldr r3, [r7, #4]
8009c0a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009c0e: 2300 movs r3, #0
}
8009c10: 4618 mov r0, r3
8009c12: 3714 adds r7, #20
8009c14: 46bd mov sp, r7
8009c16: bc80 pop {r7}
8009c18: 4770 bx lr
08009c1a <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8009c1a: b480 push {r7}
8009c1c: b085 sub sp, #20
8009c1e: af00 add r7, sp, #0
8009c20: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009c22: f44f 433f mov.w r3, #48896 @ 0xbf00
8009c26: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8009c28: 687b ldr r3, [r7, #4]
8009c2a: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8009c2e: b29a uxth r2, r3
8009c30: 68fb ldr r3, [r7, #12]
8009c32: b29b uxth r3, r3
8009c34: 43db mvns r3, r3
8009c36: b29b uxth r3, r3
8009c38: 4013 ands r3, r2
8009c3a: b29a uxth r2, r3
8009c3c: 687b ldr r3, [r7, #4]
8009c3e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009c42: 2300 movs r3, #0
}
8009c44: 4618 mov r0, r3
8009c46: 3714 adds r7, #20
8009c48: 46bd mov sp, r7
8009c4a: bc80 pop {r7}
8009c4c: 4770 bx lr
08009c4e <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8009c4e: b480 push {r7}
8009c50: b083 sub sp, #12
8009c52: af00 add r7, sp, #0
8009c54: 6078 str r0, [r7, #4]
8009c56: 460b mov r3, r1
8009c58: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009c5a: 2300 movs r3, #0
}
8009c5c: 4618 mov r0, r3
8009c5e: 370c adds r7, #12
8009c60: 46bd mov sp, r7
8009c62: bc80 pop {r7}
8009c64: 4770 bx lr
08009c66 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009c66: b480 push {r7}
8009c68: b085 sub sp, #20
8009c6a: af00 add r7, sp, #0
8009c6c: 60f8 str r0, [r7, #12]
8009c6e: 4638 mov r0, r7
8009c70: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8009c74: 68fb ldr r3, [r7, #12]
8009c76: 2201 movs r2, #1
8009c78: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
8009c7c: 68fb ldr r3, [r7, #12]
8009c7e: 2200 movs r2, #0
8009c80: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009c84: 68fb ldr r3, [r7, #12]
8009c86: 2200 movs r2, #0
8009c88: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8009c8c: 68fb ldr r3, [r7, #12]
8009c8e: 2200 movs r2, #0
8009c90: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8009c94: 2300 movs r3, #0
}
8009c96: 4618 mov r0, r3
8009c98: 3714 adds r7, #20
8009c9a: 46bd mov sp, r7
8009c9c: bc80 pop {r7}
8009c9e: 4770 bx lr
08009ca0 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8009ca0: b480 push {r7}
8009ca2: b09d sub sp, #116 @ 0x74
8009ca4: af00 add r7, sp, #0
8009ca6: 6078 str r0, [r7, #4]
8009ca8: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8009caa: 2300 movs r3, #0
8009cac: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
8009cb0: 687a ldr r2, [r7, #4]
8009cb2: 683b ldr r3, [r7, #0]
8009cb4: 781b ldrb r3, [r3, #0]
8009cb6: 009b lsls r3, r3, #2
8009cb8: 4413 add r3, r2
8009cba: 881b ldrh r3, [r3, #0]
8009cbc: b29b uxth r3, r3
8009cbe: f423 43ec bic.w r3, r3, #30208 @ 0x7600
8009cc2: f023 0370 bic.w r3, r3, #112 @ 0x70
8009cc6: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8009cca: 683b ldr r3, [r7, #0]
8009ccc: 78db ldrb r3, [r3, #3]
8009cce: 2b03 cmp r3, #3
8009cd0: d81f bhi.n 8009d12 <USB_ActivateEndpoint+0x72>
8009cd2: a201 add r2, pc, #4 @ (adr r2, 8009cd8 <USB_ActivateEndpoint+0x38>)
8009cd4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009cd8: 08009ce9 .word 0x08009ce9
8009cdc: 08009d05 .word 0x08009d05
8009ce0: 08009d1b .word 0x08009d1b
8009ce4: 08009cf7 .word 0x08009cf7
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8009ce8: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009cec: f443 7300 orr.w r3, r3, #512 @ 0x200
8009cf0: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009cf4: e012 b.n 8009d1c <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8009cf6: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009cfa: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8009cfe: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009d02: e00b b.n 8009d1c <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8009d04: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009d08: f443 6380 orr.w r3, r3, #1024 @ 0x400
8009d0c: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009d10: e004 b.n 8009d1c <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
8009d12: 2301 movs r3, #1
8009d14: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8009d18: e000 b.n 8009d1c <USB_ActivateEndpoint+0x7c>
break;
8009d1a: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8009d1c: 687a ldr r2, [r7, #4]
8009d1e: 683b ldr r3, [r7, #0]
8009d20: 781b ldrb r3, [r3, #0]
8009d22: 009b lsls r3, r3, #2
8009d24: 441a add r2, r3
8009d26: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009d2a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d2e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d32: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d36: f043 0380 orr.w r3, r3, #128 @ 0x80
8009d3a: b29b uxth r3, r3
8009d3c: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8009d3e: 687a ldr r2, [r7, #4]
8009d40: 683b ldr r3, [r7, #0]
8009d42: 781b ldrb r3, [r3, #0]
8009d44: 009b lsls r3, r3, #2
8009d46: 4413 add r3, r2
8009d48: 881b ldrh r3, [r3, #0]
8009d4a: b29b uxth r3, r3
8009d4c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009d50: f023 0370 bic.w r3, r3, #112 @ 0x70
8009d54: b29b uxth r3, r3
8009d56: 683a ldr r2, [r7, #0]
8009d58: 7812 ldrb r2, [r2, #0]
8009d5a: 4313 orrs r3, r2
8009d5c: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8009d60: 687a ldr r2, [r7, #4]
8009d62: 683b ldr r3, [r7, #0]
8009d64: 781b ldrb r3, [r3, #0]
8009d66: 009b lsls r3, r3, #2
8009d68: 441a add r2, r3
8009d6a: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
8009d6e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d72: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d76: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d7a: f043 0380 orr.w r3, r3, #128 @ 0x80
8009d7e: b29b uxth r3, r3
8009d80: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8009d82: 683b ldr r3, [r7, #0]
8009d84: 7b1b ldrb r3, [r3, #12]
8009d86: 2b00 cmp r3, #0
8009d88: f040 8178 bne.w 800a07c <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8009d8c: 683b ldr r3, [r7, #0]
8009d8e: 785b ldrb r3, [r3, #1]
8009d90: 2b00 cmp r3, #0
8009d92: f000 8084 beq.w 8009e9e <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009d96: 687b ldr r3, [r7, #4]
8009d98: 61bb str r3, [r7, #24]
8009d9a: 687b ldr r3, [r7, #4]
8009d9c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009da0: b29b uxth r3, r3
8009da2: 461a mov r2, r3
8009da4: 69bb ldr r3, [r7, #24]
8009da6: 4413 add r3, r2
8009da8: 61bb str r3, [r7, #24]
8009daa: 683b ldr r3, [r7, #0]
8009dac: 781b ldrb r3, [r3, #0]
8009dae: 011a lsls r2, r3, #4
8009db0: 69bb ldr r3, [r7, #24]
8009db2: 4413 add r3, r2
8009db4: f503 6380 add.w r3, r3, #1024 @ 0x400
8009db8: 617b str r3, [r7, #20]
8009dba: 683b ldr r3, [r7, #0]
8009dbc: 88db ldrh r3, [r3, #6]
8009dbe: 085b lsrs r3, r3, #1
8009dc0: b29b uxth r3, r3
8009dc2: 005b lsls r3, r3, #1
8009dc4: b29a uxth r2, r3
8009dc6: 697b ldr r3, [r7, #20]
8009dc8: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009dca: 687a ldr r2, [r7, #4]
8009dcc: 683b ldr r3, [r7, #0]
8009dce: 781b ldrb r3, [r3, #0]
8009dd0: 009b lsls r3, r3, #2
8009dd2: 4413 add r3, r2
8009dd4: 881b ldrh r3, [r3, #0]
8009dd6: 827b strh r3, [r7, #18]
8009dd8: 8a7b ldrh r3, [r7, #18]
8009dda: f003 0340 and.w r3, r3, #64 @ 0x40
8009dde: 2b00 cmp r3, #0
8009de0: d01b beq.n 8009e1a <USB_ActivateEndpoint+0x17a>
8009de2: 687a ldr r2, [r7, #4]
8009de4: 683b ldr r3, [r7, #0]
8009de6: 781b ldrb r3, [r3, #0]
8009de8: 009b lsls r3, r3, #2
8009dea: 4413 add r3, r2
8009dec: 881b ldrh r3, [r3, #0]
8009dee: b29b uxth r3, r3
8009df0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009df4: f023 0370 bic.w r3, r3, #112 @ 0x70
8009df8: 823b strh r3, [r7, #16]
8009dfa: 687a ldr r2, [r7, #4]
8009dfc: 683b ldr r3, [r7, #0]
8009dfe: 781b ldrb r3, [r3, #0]
8009e00: 009b lsls r3, r3, #2
8009e02: 441a add r2, r3
8009e04: 8a3b ldrh r3, [r7, #16]
8009e06: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e0a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e0e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009e12: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009e16: b29b uxth r3, r3
8009e18: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009e1a: 683b ldr r3, [r7, #0]
8009e1c: 78db ldrb r3, [r3, #3]
8009e1e: 2b01 cmp r3, #1
8009e20: d020 beq.n 8009e64 <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8009e22: 687a ldr r2, [r7, #4]
8009e24: 683b ldr r3, [r7, #0]
8009e26: 781b ldrb r3, [r3, #0]
8009e28: 009b lsls r3, r3, #2
8009e2a: 4413 add r3, r2
8009e2c: 881b ldrh r3, [r3, #0]
8009e2e: b29b uxth r3, r3
8009e30: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009e34: f023 0340 bic.w r3, r3, #64 @ 0x40
8009e38: 81bb strh r3, [r7, #12]
8009e3a: 89bb ldrh r3, [r7, #12]
8009e3c: f083 0320 eor.w r3, r3, #32
8009e40: 81bb strh r3, [r7, #12]
8009e42: 687a ldr r2, [r7, #4]
8009e44: 683b ldr r3, [r7, #0]
8009e46: 781b ldrb r3, [r3, #0]
8009e48: 009b lsls r3, r3, #2
8009e4a: 441a add r2, r3
8009e4c: 89bb ldrh r3, [r7, #12]
8009e4e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e52: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e56: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009e5a: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e5e: b29b uxth r3, r3
8009e60: 8013 strh r3, [r2, #0]
8009e62: e2d5 b.n 800a410 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009e64: 687a ldr r2, [r7, #4]
8009e66: 683b ldr r3, [r7, #0]
8009e68: 781b ldrb r3, [r3, #0]
8009e6a: 009b lsls r3, r3, #2
8009e6c: 4413 add r3, r2
8009e6e: 881b ldrh r3, [r3, #0]
8009e70: b29b uxth r3, r3
8009e72: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009e76: f023 0340 bic.w r3, r3, #64 @ 0x40
8009e7a: 81fb strh r3, [r7, #14]
8009e7c: 687a ldr r2, [r7, #4]
8009e7e: 683b ldr r3, [r7, #0]
8009e80: 781b ldrb r3, [r3, #0]
8009e82: 009b lsls r3, r3, #2
8009e84: 441a add r2, r3
8009e86: 89fb ldrh r3, [r7, #14]
8009e88: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e8c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e90: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009e94: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e98: b29b uxth r3, r3
8009e9a: 8013 strh r3, [r2, #0]
8009e9c: e2b8 b.n 800a410 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009e9e: 687b ldr r3, [r7, #4]
8009ea0: 633b str r3, [r7, #48] @ 0x30
8009ea2: 687b ldr r3, [r7, #4]
8009ea4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009ea8: b29b uxth r3, r3
8009eaa: 461a mov r2, r3
8009eac: 6b3b ldr r3, [r7, #48] @ 0x30
8009eae: 4413 add r3, r2
8009eb0: 633b str r3, [r7, #48] @ 0x30
8009eb2: 683b ldr r3, [r7, #0]
8009eb4: 781b ldrb r3, [r3, #0]
8009eb6: 011a lsls r2, r3, #4
8009eb8: 6b3b ldr r3, [r7, #48] @ 0x30
8009eba: 4413 add r3, r2
8009ebc: f503 6381 add.w r3, r3, #1032 @ 0x408
8009ec0: 62fb str r3, [r7, #44] @ 0x2c
8009ec2: 683b ldr r3, [r7, #0]
8009ec4: 88db ldrh r3, [r3, #6]
8009ec6: 085b lsrs r3, r3, #1
8009ec8: b29b uxth r3, r3
8009eca: 005b lsls r3, r3, #1
8009ecc: b29a uxth r2, r3
8009ece: 6afb ldr r3, [r7, #44] @ 0x2c
8009ed0: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
8009ed2: 687b ldr r3, [r7, #4]
8009ed4: 62bb str r3, [r7, #40] @ 0x28
8009ed6: 687b ldr r3, [r7, #4]
8009ed8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009edc: b29b uxth r3, r3
8009ede: 461a mov r2, r3
8009ee0: 6abb ldr r3, [r7, #40] @ 0x28
8009ee2: 4413 add r3, r2
8009ee4: 62bb str r3, [r7, #40] @ 0x28
8009ee6: 683b ldr r3, [r7, #0]
8009ee8: 781b ldrb r3, [r3, #0]
8009eea: 011a lsls r2, r3, #4
8009eec: 6abb ldr r3, [r7, #40] @ 0x28
8009eee: 4413 add r3, r2
8009ef0: f203 430c addw r3, r3, #1036 @ 0x40c
8009ef4: 627b str r3, [r7, #36] @ 0x24
8009ef6: 6a7b ldr r3, [r7, #36] @ 0x24
8009ef8: 881b ldrh r3, [r3, #0]
8009efa: b29b uxth r3, r3
8009efc: f3c3 0309 ubfx r3, r3, #0, #10
8009f00: b29a uxth r2, r3
8009f02: 6a7b ldr r3, [r7, #36] @ 0x24
8009f04: 801a strh r2, [r3, #0]
8009f06: 683b ldr r3, [r7, #0]
8009f08: 691b ldr r3, [r3, #16]
8009f0a: 2b3e cmp r3, #62 @ 0x3e
8009f0c: d91d bls.n 8009f4a <USB_ActivateEndpoint+0x2aa>
8009f0e: 683b ldr r3, [r7, #0]
8009f10: 691b ldr r3, [r3, #16]
8009f12: 095b lsrs r3, r3, #5
8009f14: 66bb str r3, [r7, #104] @ 0x68
8009f16: 683b ldr r3, [r7, #0]
8009f18: 691b ldr r3, [r3, #16]
8009f1a: f003 031f and.w r3, r3, #31
8009f1e: 2b00 cmp r3, #0
8009f20: d102 bne.n 8009f28 <USB_ActivateEndpoint+0x288>
8009f22: 6ebb ldr r3, [r7, #104] @ 0x68
8009f24: 3b01 subs r3, #1
8009f26: 66bb str r3, [r7, #104] @ 0x68
8009f28: 6a7b ldr r3, [r7, #36] @ 0x24
8009f2a: 881b ldrh r3, [r3, #0]
8009f2c: b29a uxth r2, r3
8009f2e: 6ebb ldr r3, [r7, #104] @ 0x68
8009f30: b29b uxth r3, r3
8009f32: 029b lsls r3, r3, #10
8009f34: b29b uxth r3, r3
8009f36: 4313 orrs r3, r2
8009f38: b29b uxth r3, r3
8009f3a: ea6f 4343 mvn.w r3, r3, lsl #17
8009f3e: ea6f 4353 mvn.w r3, r3, lsr #17
8009f42: b29a uxth r2, r3
8009f44: 6a7b ldr r3, [r7, #36] @ 0x24
8009f46: 801a strh r2, [r3, #0]
8009f48: e026 b.n 8009f98 <USB_ActivateEndpoint+0x2f8>
8009f4a: 683b ldr r3, [r7, #0]
8009f4c: 691b ldr r3, [r3, #16]
8009f4e: 2b00 cmp r3, #0
8009f50: d10a bne.n 8009f68 <USB_ActivateEndpoint+0x2c8>
8009f52: 6a7b ldr r3, [r7, #36] @ 0x24
8009f54: 881b ldrh r3, [r3, #0]
8009f56: b29b uxth r3, r3
8009f58: ea6f 4343 mvn.w r3, r3, lsl #17
8009f5c: ea6f 4353 mvn.w r3, r3, lsr #17
8009f60: b29a uxth r2, r3
8009f62: 6a7b ldr r3, [r7, #36] @ 0x24
8009f64: 801a strh r2, [r3, #0]
8009f66: e017 b.n 8009f98 <USB_ActivateEndpoint+0x2f8>
8009f68: 683b ldr r3, [r7, #0]
8009f6a: 691b ldr r3, [r3, #16]
8009f6c: 085b lsrs r3, r3, #1
8009f6e: 66bb str r3, [r7, #104] @ 0x68
8009f70: 683b ldr r3, [r7, #0]
8009f72: 691b ldr r3, [r3, #16]
8009f74: f003 0301 and.w r3, r3, #1
8009f78: 2b00 cmp r3, #0
8009f7a: d002 beq.n 8009f82 <USB_ActivateEndpoint+0x2e2>
8009f7c: 6ebb ldr r3, [r7, #104] @ 0x68
8009f7e: 3301 adds r3, #1
8009f80: 66bb str r3, [r7, #104] @ 0x68
8009f82: 6a7b ldr r3, [r7, #36] @ 0x24
8009f84: 881b ldrh r3, [r3, #0]
8009f86: b29a uxth r2, r3
8009f88: 6ebb ldr r3, [r7, #104] @ 0x68
8009f8a: b29b uxth r3, r3
8009f8c: 029b lsls r3, r3, #10
8009f8e: b29b uxth r3, r3
8009f90: 4313 orrs r3, r2
8009f92: b29a uxth r2, r3
8009f94: 6a7b ldr r3, [r7, #36] @ 0x24
8009f96: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009f98: 687a ldr r2, [r7, #4]
8009f9a: 683b ldr r3, [r7, #0]
8009f9c: 781b ldrb r3, [r3, #0]
8009f9e: 009b lsls r3, r3, #2
8009fa0: 4413 add r3, r2
8009fa2: 881b ldrh r3, [r3, #0]
8009fa4: 847b strh r3, [r7, #34] @ 0x22
8009fa6: 8c7b ldrh r3, [r7, #34] @ 0x22
8009fa8: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009fac: 2b00 cmp r3, #0
8009fae: d01b beq.n 8009fe8 <USB_ActivateEndpoint+0x348>
8009fb0: 687a ldr r2, [r7, #4]
8009fb2: 683b ldr r3, [r7, #0]
8009fb4: 781b ldrb r3, [r3, #0]
8009fb6: 009b lsls r3, r3, #2
8009fb8: 4413 add r3, r2
8009fba: 881b ldrh r3, [r3, #0]
8009fbc: b29b uxth r3, r3
8009fbe: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009fc2: f023 0370 bic.w r3, r3, #112 @ 0x70
8009fc6: 843b strh r3, [r7, #32]
8009fc8: 687a ldr r2, [r7, #4]
8009fca: 683b ldr r3, [r7, #0]
8009fcc: 781b ldrb r3, [r3, #0]
8009fce: 009b lsls r3, r3, #2
8009fd0: 441a add r2, r3
8009fd2: 8c3b ldrh r3, [r7, #32]
8009fd4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009fd8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009fdc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009fe0: f043 0380 orr.w r3, r3, #128 @ 0x80
8009fe4: b29b uxth r3, r3
8009fe6: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8009fe8: 683b ldr r3, [r7, #0]
8009fea: 781b ldrb r3, [r3, #0]
8009fec: 2b00 cmp r3, #0
8009fee: d124 bne.n 800a03a <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8009ff0: 687a ldr r2, [r7, #4]
8009ff2: 683b ldr r3, [r7, #0]
8009ff4: 781b ldrb r3, [r3, #0]
8009ff6: 009b lsls r3, r3, #2
8009ff8: 4413 add r3, r2
8009ffa: 881b ldrh r3, [r3, #0]
8009ffc: b29b uxth r3, r3
8009ffe: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a002: f023 0370 bic.w r3, r3, #112 @ 0x70
800a006: 83bb strh r3, [r7, #28]
800a008: 8bbb ldrh r3, [r7, #28]
800a00a: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a00e: 83bb strh r3, [r7, #28]
800a010: 8bbb ldrh r3, [r7, #28]
800a012: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a016: 83bb strh r3, [r7, #28]
800a018: 687a ldr r2, [r7, #4]
800a01a: 683b ldr r3, [r7, #0]
800a01c: 781b ldrb r3, [r3, #0]
800a01e: 009b lsls r3, r3, #2
800a020: 441a add r2, r3
800a022: 8bbb ldrh r3, [r7, #28]
800a024: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a028: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a02c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a030: f043 0380 orr.w r3, r3, #128 @ 0x80
800a034: b29b uxth r3, r3
800a036: 8013 strh r3, [r2, #0]
800a038: e1ea b.n 800a410 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
800a03a: 687a ldr r2, [r7, #4]
800a03c: 683b ldr r3, [r7, #0]
800a03e: 781b ldrb r3, [r3, #0]
800a040: 009b lsls r3, r3, #2
800a042: 4413 add r3, r2
800a044: 881b ldrh r3, [r3, #0]
800a046: b29b uxth r3, r3
800a048: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a04c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a050: 83fb strh r3, [r7, #30]
800a052: 8bfb ldrh r3, [r7, #30]
800a054: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a058: 83fb strh r3, [r7, #30]
800a05a: 687a ldr r2, [r7, #4]
800a05c: 683b ldr r3, [r7, #0]
800a05e: 781b ldrb r3, [r3, #0]
800a060: 009b lsls r3, r3, #2
800a062: 441a add r2, r3
800a064: 8bfb ldrh r3, [r7, #30]
800a066: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a06a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a06e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a072: f043 0380 orr.w r3, r3, #128 @ 0x80
800a076: b29b uxth r3, r3
800a078: 8013 strh r3, [r2, #0]
800a07a: e1c9 b.n 800a410 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
800a07c: 683b ldr r3, [r7, #0]
800a07e: 78db ldrb r3, [r3, #3]
800a080: 2b02 cmp r3, #2
800a082: d11e bne.n 800a0c2 <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a084: 687a ldr r2, [r7, #4]
800a086: 683b ldr r3, [r7, #0]
800a088: 781b ldrb r3, [r3, #0]
800a08a: 009b lsls r3, r3, #2
800a08c: 4413 add r3, r2
800a08e: 881b ldrh r3, [r3, #0]
800a090: b29b uxth r3, r3
800a092: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a096: f023 0370 bic.w r3, r3, #112 @ 0x70
800a09a: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800a09e: 687a ldr r2, [r7, #4]
800a0a0: 683b ldr r3, [r7, #0]
800a0a2: 781b ldrb r3, [r3, #0]
800a0a4: 009b lsls r3, r3, #2
800a0a6: 441a add r2, r3
800a0a8: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800a0ac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a0b0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a0b4: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800a0b8: f043 0380 orr.w r3, r3, #128 @ 0x80
800a0bc: b29b uxth r3, r3
800a0be: 8013 strh r3, [r2, #0]
800a0c0: e01d b.n 800a0fe <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
800a0c2: 687a ldr r2, [r7, #4]
800a0c4: 683b ldr r3, [r7, #0]
800a0c6: 781b ldrb r3, [r3, #0]
800a0c8: 009b lsls r3, r3, #2
800a0ca: 4413 add r3, r2
800a0cc: 881b ldrh r3, [r3, #0]
800a0ce: b29b uxth r3, r3
800a0d0: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800a0d4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a0d8: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
800a0dc: 687a ldr r2, [r7, #4]
800a0de: 683b ldr r3, [r7, #0]
800a0e0: 781b ldrb r3, [r3, #0]
800a0e2: 009b lsls r3, r3, #2
800a0e4: 441a add r2, r3
800a0e6: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
800a0ea: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a0ee: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a0f2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a0f6: f043 0380 orr.w r3, r3, #128 @ 0x80
800a0fa: b29b uxth r3, r3
800a0fc: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
800a0fe: 687b ldr r3, [r7, #4]
800a100: 65fb str r3, [r7, #92] @ 0x5c
800a102: 687b ldr r3, [r7, #4]
800a104: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a108: b29b uxth r3, r3
800a10a: 461a mov r2, r3
800a10c: 6dfb ldr r3, [r7, #92] @ 0x5c
800a10e: 4413 add r3, r2
800a110: 65fb str r3, [r7, #92] @ 0x5c
800a112: 683b ldr r3, [r7, #0]
800a114: 781b ldrb r3, [r3, #0]
800a116: 011a lsls r2, r3, #4
800a118: 6dfb ldr r3, [r7, #92] @ 0x5c
800a11a: 4413 add r3, r2
800a11c: f503 6380 add.w r3, r3, #1024 @ 0x400
800a120: 65bb str r3, [r7, #88] @ 0x58
800a122: 683b ldr r3, [r7, #0]
800a124: 891b ldrh r3, [r3, #8]
800a126: 085b lsrs r3, r3, #1
800a128: b29b uxth r3, r3
800a12a: 005b lsls r3, r3, #1
800a12c: b29a uxth r2, r3
800a12e: 6dbb ldr r3, [r7, #88] @ 0x58
800a130: 801a strh r2, [r3, #0]
800a132: 687b ldr r3, [r7, #4]
800a134: 657b str r3, [r7, #84] @ 0x54
800a136: 687b ldr r3, [r7, #4]
800a138: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a13c: b29b uxth r3, r3
800a13e: 461a mov r2, r3
800a140: 6d7b ldr r3, [r7, #84] @ 0x54
800a142: 4413 add r3, r2
800a144: 657b str r3, [r7, #84] @ 0x54
800a146: 683b ldr r3, [r7, #0]
800a148: 781b ldrb r3, [r3, #0]
800a14a: 011a lsls r2, r3, #4
800a14c: 6d7b ldr r3, [r7, #84] @ 0x54
800a14e: 4413 add r3, r2
800a150: f503 6381 add.w r3, r3, #1032 @ 0x408
800a154: 653b str r3, [r7, #80] @ 0x50
800a156: 683b ldr r3, [r7, #0]
800a158: 895b ldrh r3, [r3, #10]
800a15a: 085b lsrs r3, r3, #1
800a15c: b29b uxth r3, r3
800a15e: 005b lsls r3, r3, #1
800a160: b29a uxth r2, r3
800a162: 6d3b ldr r3, [r7, #80] @ 0x50
800a164: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
800a166: 683b ldr r3, [r7, #0]
800a168: 785b ldrb r3, [r3, #1]
800a16a: 2b00 cmp r3, #0
800a16c: f040 8093 bne.w 800a296 <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a170: 687a ldr r2, [r7, #4]
800a172: 683b ldr r3, [r7, #0]
800a174: 781b ldrb r3, [r3, #0]
800a176: 009b lsls r3, r3, #2
800a178: 4413 add r3, r2
800a17a: 881b ldrh r3, [r3, #0]
800a17c: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
800a180: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800a184: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a188: 2b00 cmp r3, #0
800a18a: d01b beq.n 800a1c4 <USB_ActivateEndpoint+0x524>
800a18c: 687a ldr r2, [r7, #4]
800a18e: 683b ldr r3, [r7, #0]
800a190: 781b ldrb r3, [r3, #0]
800a192: 009b lsls r3, r3, #2
800a194: 4413 add r3, r2
800a196: 881b ldrh r3, [r3, #0]
800a198: b29b uxth r3, r3
800a19a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a19e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a1a2: 87fb strh r3, [r7, #62] @ 0x3e
800a1a4: 687a ldr r2, [r7, #4]
800a1a6: 683b ldr r3, [r7, #0]
800a1a8: 781b ldrb r3, [r3, #0]
800a1aa: 009b lsls r3, r3, #2
800a1ac: 441a add r2, r3
800a1ae: 8ffb ldrh r3, [r7, #62] @ 0x3e
800a1b0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a1b4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a1b8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a1bc: f043 0380 orr.w r3, r3, #128 @ 0x80
800a1c0: b29b uxth r3, r3
800a1c2: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a1c4: 687a ldr r2, [r7, #4]
800a1c6: 683b ldr r3, [r7, #0]
800a1c8: 781b ldrb r3, [r3, #0]
800a1ca: 009b lsls r3, r3, #2
800a1cc: 4413 add r3, r2
800a1ce: 881b ldrh r3, [r3, #0]
800a1d0: 87bb strh r3, [r7, #60] @ 0x3c
800a1d2: 8fbb ldrh r3, [r7, #60] @ 0x3c
800a1d4: f003 0340 and.w r3, r3, #64 @ 0x40
800a1d8: 2b00 cmp r3, #0
800a1da: d01b beq.n 800a214 <USB_ActivateEndpoint+0x574>
800a1dc: 687a ldr r2, [r7, #4]
800a1de: 683b ldr r3, [r7, #0]
800a1e0: 781b ldrb r3, [r3, #0]
800a1e2: 009b lsls r3, r3, #2
800a1e4: 4413 add r3, r2
800a1e6: 881b ldrh r3, [r3, #0]
800a1e8: b29b uxth r3, r3
800a1ea: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a1ee: f023 0370 bic.w r3, r3, #112 @ 0x70
800a1f2: 877b strh r3, [r7, #58] @ 0x3a
800a1f4: 687a ldr r2, [r7, #4]
800a1f6: 683b ldr r3, [r7, #0]
800a1f8: 781b ldrb r3, [r3, #0]
800a1fa: 009b lsls r3, r3, #2
800a1fc: 441a add r2, r3
800a1fe: 8f7b ldrh r3, [r7, #58] @ 0x3a
800a200: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a204: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a208: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a20c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a210: b29b uxth r3, r3
800a212: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800a214: 687a ldr r2, [r7, #4]
800a216: 683b ldr r3, [r7, #0]
800a218: 781b ldrb r3, [r3, #0]
800a21a: 009b lsls r3, r3, #2
800a21c: 4413 add r3, r2
800a21e: 881b ldrh r3, [r3, #0]
800a220: b29b uxth r3, r3
800a222: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a226: f023 0370 bic.w r3, r3, #112 @ 0x70
800a22a: 873b strh r3, [r7, #56] @ 0x38
800a22c: 8f3b ldrh r3, [r7, #56] @ 0x38
800a22e: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a232: 873b strh r3, [r7, #56] @ 0x38
800a234: 8f3b ldrh r3, [r7, #56] @ 0x38
800a236: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a23a: 873b strh r3, [r7, #56] @ 0x38
800a23c: 687a ldr r2, [r7, #4]
800a23e: 683b ldr r3, [r7, #0]
800a240: 781b ldrb r3, [r3, #0]
800a242: 009b lsls r3, r3, #2
800a244: 441a add r2, r3
800a246: 8f3b ldrh r3, [r7, #56] @ 0x38
800a248: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a24c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a250: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a254: f043 0380 orr.w r3, r3, #128 @ 0x80
800a258: b29b uxth r3, r3
800a25a: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a25c: 687a ldr r2, [r7, #4]
800a25e: 683b ldr r3, [r7, #0]
800a260: 781b ldrb r3, [r3, #0]
800a262: 009b lsls r3, r3, #2
800a264: 4413 add r3, r2
800a266: 881b ldrh r3, [r3, #0]
800a268: b29b uxth r3, r3
800a26a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a26e: f023 0340 bic.w r3, r3, #64 @ 0x40
800a272: 86fb strh r3, [r7, #54] @ 0x36
800a274: 687a ldr r2, [r7, #4]
800a276: 683b ldr r3, [r7, #0]
800a278: 781b ldrb r3, [r3, #0]
800a27a: 009b lsls r3, r3, #2
800a27c: 441a add r2, r3
800a27e: 8efb ldrh r3, [r7, #54] @ 0x36
800a280: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a284: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a288: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a28c: f043 0380 orr.w r3, r3, #128 @ 0x80
800a290: b29b uxth r3, r3
800a292: 8013 strh r3, [r2, #0]
800a294: e0bc b.n 800a410 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a296: 687a ldr r2, [r7, #4]
800a298: 683b ldr r3, [r7, #0]
800a29a: 781b ldrb r3, [r3, #0]
800a29c: 009b lsls r3, r3, #2
800a29e: 4413 add r3, r2
800a2a0: 881b ldrh r3, [r3, #0]
800a2a2: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
800a2a6: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800a2aa: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a2ae: 2b00 cmp r3, #0
800a2b0: d01d beq.n 800a2ee <USB_ActivateEndpoint+0x64e>
800a2b2: 687a ldr r2, [r7, #4]
800a2b4: 683b ldr r3, [r7, #0]
800a2b6: 781b ldrb r3, [r3, #0]
800a2b8: 009b lsls r3, r3, #2
800a2ba: 4413 add r3, r2
800a2bc: 881b ldrh r3, [r3, #0]
800a2be: b29b uxth r3, r3
800a2c0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a2c4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a2c8: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
800a2cc: 687a ldr r2, [r7, #4]
800a2ce: 683b ldr r3, [r7, #0]
800a2d0: 781b ldrb r3, [r3, #0]
800a2d2: 009b lsls r3, r3, #2
800a2d4: 441a add r2, r3
800a2d6: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
800a2da: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a2de: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a2e2: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a2e6: f043 0380 orr.w r3, r3, #128 @ 0x80
800a2ea: b29b uxth r3, r3
800a2ec: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a2ee: 687a ldr r2, [r7, #4]
800a2f0: 683b ldr r3, [r7, #0]
800a2f2: 781b ldrb r3, [r3, #0]
800a2f4: 009b lsls r3, r3, #2
800a2f6: 4413 add r3, r2
800a2f8: 881b ldrh r3, [r3, #0]
800a2fa: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
800a2fe: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800a302: f003 0340 and.w r3, r3, #64 @ 0x40
800a306: 2b00 cmp r3, #0
800a308: d01d beq.n 800a346 <USB_ActivateEndpoint+0x6a6>
800a30a: 687a ldr r2, [r7, #4]
800a30c: 683b ldr r3, [r7, #0]
800a30e: 781b ldrb r3, [r3, #0]
800a310: 009b lsls r3, r3, #2
800a312: 4413 add r3, r2
800a314: 881b ldrh r3, [r3, #0]
800a316: b29b uxth r3, r3
800a318: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a31c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a320: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
800a324: 687a ldr r2, [r7, #4]
800a326: 683b ldr r3, [r7, #0]
800a328: 781b ldrb r3, [r3, #0]
800a32a: 009b lsls r3, r3, #2
800a32c: 441a add r2, r3
800a32e: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
800a332: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a336: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a33a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a33e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a342: b29b uxth r3, r3
800a344: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800a346: 683b ldr r3, [r7, #0]
800a348: 78db ldrb r3, [r3, #3]
800a34a: 2b01 cmp r3, #1
800a34c: d024 beq.n 800a398 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800a34e: 687a ldr r2, [r7, #4]
800a350: 683b ldr r3, [r7, #0]
800a352: 781b ldrb r3, [r3, #0]
800a354: 009b lsls r3, r3, #2
800a356: 4413 add r3, r2
800a358: 881b ldrh r3, [r3, #0]
800a35a: b29b uxth r3, r3
800a35c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a360: f023 0340 bic.w r3, r3, #64 @ 0x40
800a364: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800a368: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800a36c: f083 0320 eor.w r3, r3, #32
800a370: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800a374: 687a ldr r2, [r7, #4]
800a376: 683b ldr r3, [r7, #0]
800a378: 781b ldrb r3, [r3, #0]
800a37a: 009b lsls r3, r3, #2
800a37c: 441a add r2, r3
800a37e: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800a382: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a386: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a38a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a38e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a392: b29b uxth r3, r3
800a394: 8013 strh r3, [r2, #0]
800a396: e01d b.n 800a3d4 <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a398: 687a ldr r2, [r7, #4]
800a39a: 683b ldr r3, [r7, #0]
800a39c: 781b ldrb r3, [r3, #0]
800a39e: 009b lsls r3, r3, #2
800a3a0: 4413 add r3, r2
800a3a2: 881b ldrh r3, [r3, #0]
800a3a4: b29b uxth r3, r3
800a3a6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a3aa: f023 0340 bic.w r3, r3, #64 @ 0x40
800a3ae: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
800a3b2: 687a ldr r2, [r7, #4]
800a3b4: 683b ldr r3, [r7, #0]
800a3b6: 781b ldrb r3, [r3, #0]
800a3b8: 009b lsls r3, r3, #2
800a3ba: 441a add r2, r3
800a3bc: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800a3c0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a3c4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a3c8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a3cc: f043 0380 orr.w r3, r3, #128 @ 0x80
800a3d0: b29b uxth r3, r3
800a3d2: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a3d4: 687a ldr r2, [r7, #4]
800a3d6: 683b ldr r3, [r7, #0]
800a3d8: 781b ldrb r3, [r3, #0]
800a3da: 009b lsls r3, r3, #2
800a3dc: 4413 add r3, r2
800a3de: 881b ldrh r3, [r3, #0]
800a3e0: b29b uxth r3, r3
800a3e2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a3e6: f023 0370 bic.w r3, r3, #112 @ 0x70
800a3ea: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
800a3ee: 687a ldr r2, [r7, #4]
800a3f0: 683b ldr r3, [r7, #0]
800a3f2: 781b ldrb r3, [r3, #0]
800a3f4: 009b lsls r3, r3, #2
800a3f6: 441a add r2, r3
800a3f8: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
800a3fc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a400: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a404: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a408: f043 0380 orr.w r3, r3, #128 @ 0x80
800a40c: b29b uxth r3, r3
800a40e: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
800a410: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
800a414: 4618 mov r0, r3
800a416: 3774 adds r7, #116 @ 0x74
800a418: 46bd mov sp, r7
800a41a: bc80 pop {r7}
800a41c: 4770 bx lr
800a41e: bf00 nop
0800a420 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a420: b480 push {r7}
800a422: b08d sub sp, #52 @ 0x34
800a424: af00 add r7, sp, #0
800a426: 6078 str r0, [r7, #4]
800a428: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800a42a: 683b ldr r3, [r7, #0]
800a42c: 7b1b ldrb r3, [r3, #12]
800a42e: 2b00 cmp r3, #0
800a430: f040 808e bne.w 800a550 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
800a434: 683b ldr r3, [r7, #0]
800a436: 785b ldrb r3, [r3, #1]
800a438: 2b00 cmp r3, #0
800a43a: d044 beq.n 800a4c6 <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a43c: 687a ldr r2, [r7, #4]
800a43e: 683b ldr r3, [r7, #0]
800a440: 781b ldrb r3, [r3, #0]
800a442: 009b lsls r3, r3, #2
800a444: 4413 add r3, r2
800a446: 881b ldrh r3, [r3, #0]
800a448: 81bb strh r3, [r7, #12]
800a44a: 89bb ldrh r3, [r7, #12]
800a44c: f003 0340 and.w r3, r3, #64 @ 0x40
800a450: 2b00 cmp r3, #0
800a452: d01b beq.n 800a48c <USB_DeactivateEndpoint+0x6c>
800a454: 687a ldr r2, [r7, #4]
800a456: 683b ldr r3, [r7, #0]
800a458: 781b ldrb r3, [r3, #0]
800a45a: 009b lsls r3, r3, #2
800a45c: 4413 add r3, r2
800a45e: 881b ldrh r3, [r3, #0]
800a460: b29b uxth r3, r3
800a462: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a466: f023 0370 bic.w r3, r3, #112 @ 0x70
800a46a: 817b strh r3, [r7, #10]
800a46c: 687a ldr r2, [r7, #4]
800a46e: 683b ldr r3, [r7, #0]
800a470: 781b ldrb r3, [r3, #0]
800a472: 009b lsls r3, r3, #2
800a474: 441a add r2, r3
800a476: 897b ldrh r3, [r7, #10]
800a478: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a47c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a480: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a484: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a488: b29b uxth r3, r3
800a48a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a48c: 687a ldr r2, [r7, #4]
800a48e: 683b ldr r3, [r7, #0]
800a490: 781b ldrb r3, [r3, #0]
800a492: 009b lsls r3, r3, #2
800a494: 4413 add r3, r2
800a496: 881b ldrh r3, [r3, #0]
800a498: b29b uxth r3, r3
800a49a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a49e: f023 0340 bic.w r3, r3, #64 @ 0x40
800a4a2: 813b strh r3, [r7, #8]
800a4a4: 687a ldr r2, [r7, #4]
800a4a6: 683b ldr r3, [r7, #0]
800a4a8: 781b ldrb r3, [r3, #0]
800a4aa: 009b lsls r3, r3, #2
800a4ac: 441a add r2, r3
800a4ae: 893b ldrh r3, [r7, #8]
800a4b0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a4b4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a4b8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a4bc: f043 0380 orr.w r3, r3, #128 @ 0x80
800a4c0: b29b uxth r3, r3
800a4c2: 8013 strh r3, [r2, #0]
800a4c4: e192 b.n 800a7ec <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a4c6: 687a ldr r2, [r7, #4]
800a4c8: 683b ldr r3, [r7, #0]
800a4ca: 781b ldrb r3, [r3, #0]
800a4cc: 009b lsls r3, r3, #2
800a4ce: 4413 add r3, r2
800a4d0: 881b ldrh r3, [r3, #0]
800a4d2: 827b strh r3, [r7, #18]
800a4d4: 8a7b ldrh r3, [r7, #18]
800a4d6: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a4da: 2b00 cmp r3, #0
800a4dc: d01b beq.n 800a516 <USB_DeactivateEndpoint+0xf6>
800a4de: 687a ldr r2, [r7, #4]
800a4e0: 683b ldr r3, [r7, #0]
800a4e2: 781b ldrb r3, [r3, #0]
800a4e4: 009b lsls r3, r3, #2
800a4e6: 4413 add r3, r2
800a4e8: 881b ldrh r3, [r3, #0]
800a4ea: b29b uxth r3, r3
800a4ec: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a4f0: f023 0370 bic.w r3, r3, #112 @ 0x70
800a4f4: 823b strh r3, [r7, #16]
800a4f6: 687a ldr r2, [r7, #4]
800a4f8: 683b ldr r3, [r7, #0]
800a4fa: 781b ldrb r3, [r3, #0]
800a4fc: 009b lsls r3, r3, #2
800a4fe: 441a add r2, r3
800a500: 8a3b ldrh r3, [r7, #16]
800a502: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a506: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a50a: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a50e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a512: b29b uxth r3, r3
800a514: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a516: 687a ldr r2, [r7, #4]
800a518: 683b ldr r3, [r7, #0]
800a51a: 781b ldrb r3, [r3, #0]
800a51c: 009b lsls r3, r3, #2
800a51e: 4413 add r3, r2
800a520: 881b ldrh r3, [r3, #0]
800a522: b29b uxth r3, r3
800a524: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a528: f023 0370 bic.w r3, r3, #112 @ 0x70
800a52c: 81fb strh r3, [r7, #14]
800a52e: 687a ldr r2, [r7, #4]
800a530: 683b ldr r3, [r7, #0]
800a532: 781b ldrb r3, [r3, #0]
800a534: 009b lsls r3, r3, #2
800a536: 441a add r2, r3
800a538: 89fb ldrh r3, [r7, #14]
800a53a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a53e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a542: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a546: f043 0380 orr.w r3, r3, #128 @ 0x80
800a54a: b29b uxth r3, r3
800a54c: 8013 strh r3, [r2, #0]
800a54e: e14d b.n 800a7ec <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
800a550: 683b ldr r3, [r7, #0]
800a552: 785b ldrb r3, [r3, #1]
800a554: 2b00 cmp r3, #0
800a556: f040 80a5 bne.w 800a6a4 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a55a: 687a ldr r2, [r7, #4]
800a55c: 683b ldr r3, [r7, #0]
800a55e: 781b ldrb r3, [r3, #0]
800a560: 009b lsls r3, r3, #2
800a562: 4413 add r3, r2
800a564: 881b ldrh r3, [r3, #0]
800a566: 843b strh r3, [r7, #32]
800a568: 8c3b ldrh r3, [r7, #32]
800a56a: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a56e: 2b00 cmp r3, #0
800a570: d01b beq.n 800a5aa <USB_DeactivateEndpoint+0x18a>
800a572: 687a ldr r2, [r7, #4]
800a574: 683b ldr r3, [r7, #0]
800a576: 781b ldrb r3, [r3, #0]
800a578: 009b lsls r3, r3, #2
800a57a: 4413 add r3, r2
800a57c: 881b ldrh r3, [r3, #0]
800a57e: b29b uxth r3, r3
800a580: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a584: f023 0370 bic.w r3, r3, #112 @ 0x70
800a588: 83fb strh r3, [r7, #30]
800a58a: 687a ldr r2, [r7, #4]
800a58c: 683b ldr r3, [r7, #0]
800a58e: 781b ldrb r3, [r3, #0]
800a590: 009b lsls r3, r3, #2
800a592: 441a add r2, r3
800a594: 8bfb ldrh r3, [r7, #30]
800a596: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a59a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a59e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a5a2: f043 0380 orr.w r3, r3, #128 @ 0x80
800a5a6: b29b uxth r3, r3
800a5a8: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a5aa: 687a ldr r2, [r7, #4]
800a5ac: 683b ldr r3, [r7, #0]
800a5ae: 781b ldrb r3, [r3, #0]
800a5b0: 009b lsls r3, r3, #2
800a5b2: 4413 add r3, r2
800a5b4: 881b ldrh r3, [r3, #0]
800a5b6: 83bb strh r3, [r7, #28]
800a5b8: 8bbb ldrh r3, [r7, #28]
800a5ba: f003 0340 and.w r3, r3, #64 @ 0x40
800a5be: 2b00 cmp r3, #0
800a5c0: d01b beq.n 800a5fa <USB_DeactivateEndpoint+0x1da>
800a5c2: 687a ldr r2, [r7, #4]
800a5c4: 683b ldr r3, [r7, #0]
800a5c6: 781b ldrb r3, [r3, #0]
800a5c8: 009b lsls r3, r3, #2
800a5ca: 4413 add r3, r2
800a5cc: 881b ldrh r3, [r3, #0]
800a5ce: b29b uxth r3, r3
800a5d0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a5d4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a5d8: 837b strh r3, [r7, #26]
800a5da: 687a ldr r2, [r7, #4]
800a5dc: 683b ldr r3, [r7, #0]
800a5de: 781b ldrb r3, [r3, #0]
800a5e0: 009b lsls r3, r3, #2
800a5e2: 441a add r2, r3
800a5e4: 8b7b ldrh r3, [r7, #26]
800a5e6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a5ea: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a5ee: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a5f2: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a5f6: b29b uxth r3, r3
800a5f8: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
800a5fa: 687a ldr r2, [r7, #4]
800a5fc: 683b ldr r3, [r7, #0]
800a5fe: 781b ldrb r3, [r3, #0]
800a600: 009b lsls r3, r3, #2
800a602: 4413 add r3, r2
800a604: 881b ldrh r3, [r3, #0]
800a606: b29b uxth r3, r3
800a608: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a60c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a610: 833b strh r3, [r7, #24]
800a612: 687a ldr r2, [r7, #4]
800a614: 683b ldr r3, [r7, #0]
800a616: 781b ldrb r3, [r3, #0]
800a618: 009b lsls r3, r3, #2
800a61a: 441a add r2, r3
800a61c: 8b3b ldrh r3, [r7, #24]
800a61e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a622: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a626: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a62a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a62e: b29b uxth r3, r3
800a630: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a632: 687a ldr r2, [r7, #4]
800a634: 683b ldr r3, [r7, #0]
800a636: 781b ldrb r3, [r3, #0]
800a638: 009b lsls r3, r3, #2
800a63a: 4413 add r3, r2
800a63c: 881b ldrh r3, [r3, #0]
800a63e: b29b uxth r3, r3
800a640: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a644: f023 0370 bic.w r3, r3, #112 @ 0x70
800a648: 82fb strh r3, [r7, #22]
800a64a: 687a ldr r2, [r7, #4]
800a64c: 683b ldr r3, [r7, #0]
800a64e: 781b ldrb r3, [r3, #0]
800a650: 009b lsls r3, r3, #2
800a652: 441a add r2, r3
800a654: 8afb ldrh r3, [r7, #22]
800a656: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a65a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a65e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a662: f043 0380 orr.w r3, r3, #128 @ 0x80
800a666: b29b uxth r3, r3
800a668: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a66a: 687a ldr r2, [r7, #4]
800a66c: 683b ldr r3, [r7, #0]
800a66e: 781b ldrb r3, [r3, #0]
800a670: 009b lsls r3, r3, #2
800a672: 4413 add r3, r2
800a674: 881b ldrh r3, [r3, #0]
800a676: b29b uxth r3, r3
800a678: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a67c: f023 0340 bic.w r3, r3, #64 @ 0x40
800a680: 82bb strh r3, [r7, #20]
800a682: 687a ldr r2, [r7, #4]
800a684: 683b ldr r3, [r7, #0]
800a686: 781b ldrb r3, [r3, #0]
800a688: 009b lsls r3, r3, #2
800a68a: 441a add r2, r3
800a68c: 8abb ldrh r3, [r7, #20]
800a68e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a692: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a696: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a69a: f043 0380 orr.w r3, r3, #128 @ 0x80
800a69e: b29b uxth r3, r3
800a6a0: 8013 strh r3, [r2, #0]
800a6a2: e0a3 b.n 800a7ec <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a6a4: 687a ldr r2, [r7, #4]
800a6a6: 683b ldr r3, [r7, #0]
800a6a8: 781b ldrb r3, [r3, #0]
800a6aa: 009b lsls r3, r3, #2
800a6ac: 4413 add r3, r2
800a6ae: 881b ldrh r3, [r3, #0]
800a6b0: 85fb strh r3, [r7, #46] @ 0x2e
800a6b2: 8dfb ldrh r3, [r7, #46] @ 0x2e
800a6b4: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a6b8: 2b00 cmp r3, #0
800a6ba: d01b beq.n 800a6f4 <USB_DeactivateEndpoint+0x2d4>
800a6bc: 687a ldr r2, [r7, #4]
800a6be: 683b ldr r3, [r7, #0]
800a6c0: 781b ldrb r3, [r3, #0]
800a6c2: 009b lsls r3, r3, #2
800a6c4: 4413 add r3, r2
800a6c6: 881b ldrh r3, [r3, #0]
800a6c8: b29b uxth r3, r3
800a6ca: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a6ce: f023 0370 bic.w r3, r3, #112 @ 0x70
800a6d2: 85bb strh r3, [r7, #44] @ 0x2c
800a6d4: 687a ldr r2, [r7, #4]
800a6d6: 683b ldr r3, [r7, #0]
800a6d8: 781b ldrb r3, [r3, #0]
800a6da: 009b lsls r3, r3, #2
800a6dc: 441a add r2, r3
800a6de: 8dbb ldrh r3, [r7, #44] @ 0x2c
800a6e0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a6e4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a6e8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a6ec: f043 0380 orr.w r3, r3, #128 @ 0x80
800a6f0: b29b uxth r3, r3
800a6f2: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a6f4: 687a ldr r2, [r7, #4]
800a6f6: 683b ldr r3, [r7, #0]
800a6f8: 781b ldrb r3, [r3, #0]
800a6fa: 009b lsls r3, r3, #2
800a6fc: 4413 add r3, r2
800a6fe: 881b ldrh r3, [r3, #0]
800a700: 857b strh r3, [r7, #42] @ 0x2a
800a702: 8d7b ldrh r3, [r7, #42] @ 0x2a
800a704: f003 0340 and.w r3, r3, #64 @ 0x40
800a708: 2b00 cmp r3, #0
800a70a: d01b beq.n 800a744 <USB_DeactivateEndpoint+0x324>
800a70c: 687a ldr r2, [r7, #4]
800a70e: 683b ldr r3, [r7, #0]
800a710: 781b ldrb r3, [r3, #0]
800a712: 009b lsls r3, r3, #2
800a714: 4413 add r3, r2
800a716: 881b ldrh r3, [r3, #0]
800a718: b29b uxth r3, r3
800a71a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a71e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a722: 853b strh r3, [r7, #40] @ 0x28
800a724: 687a ldr r2, [r7, #4]
800a726: 683b ldr r3, [r7, #0]
800a728: 781b ldrb r3, [r3, #0]
800a72a: 009b lsls r3, r3, #2
800a72c: 441a add r2, r3
800a72e: 8d3b ldrh r3, [r7, #40] @ 0x28
800a730: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a734: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a738: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a73c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a740: b29b uxth r3, r3
800a742: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
800a744: 687a ldr r2, [r7, #4]
800a746: 683b ldr r3, [r7, #0]
800a748: 781b ldrb r3, [r3, #0]
800a74a: 009b lsls r3, r3, #2
800a74c: 4413 add r3, r2
800a74e: 881b ldrh r3, [r3, #0]
800a750: b29b uxth r3, r3
800a752: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a756: f023 0370 bic.w r3, r3, #112 @ 0x70
800a75a: 84fb strh r3, [r7, #38] @ 0x26
800a75c: 687a ldr r2, [r7, #4]
800a75e: 683b ldr r3, [r7, #0]
800a760: 781b ldrb r3, [r3, #0]
800a762: 009b lsls r3, r3, #2
800a764: 441a add r2, r3
800a766: 8cfb ldrh r3, [r7, #38] @ 0x26
800a768: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a76c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a770: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a774: f043 0380 orr.w r3, r3, #128 @ 0x80
800a778: b29b uxth r3, r3
800a77a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a77c: 687a ldr r2, [r7, #4]
800a77e: 683b ldr r3, [r7, #0]
800a780: 781b ldrb r3, [r3, #0]
800a782: 009b lsls r3, r3, #2
800a784: 4413 add r3, r2
800a786: 881b ldrh r3, [r3, #0]
800a788: b29b uxth r3, r3
800a78a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a78e: f023 0340 bic.w r3, r3, #64 @ 0x40
800a792: 84bb strh r3, [r7, #36] @ 0x24
800a794: 687a ldr r2, [r7, #4]
800a796: 683b ldr r3, [r7, #0]
800a798: 781b ldrb r3, [r3, #0]
800a79a: 009b lsls r3, r3, #2
800a79c: 441a add r2, r3
800a79e: 8cbb ldrh r3, [r7, #36] @ 0x24
800a7a0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a7a4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a7a8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a7ac: f043 0380 orr.w r3, r3, #128 @ 0x80
800a7b0: b29b uxth r3, r3
800a7b2: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a7b4: 687a ldr r2, [r7, #4]
800a7b6: 683b ldr r3, [r7, #0]
800a7b8: 781b ldrb r3, [r3, #0]
800a7ba: 009b lsls r3, r3, #2
800a7bc: 4413 add r3, r2
800a7be: 881b ldrh r3, [r3, #0]
800a7c0: b29b uxth r3, r3
800a7c2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a7c6: f023 0370 bic.w r3, r3, #112 @ 0x70
800a7ca: 847b strh r3, [r7, #34] @ 0x22
800a7cc: 687a ldr r2, [r7, #4]
800a7ce: 683b ldr r3, [r7, #0]
800a7d0: 781b ldrb r3, [r3, #0]
800a7d2: 009b lsls r3, r3, #2
800a7d4: 441a add r2, r3
800a7d6: 8c7b ldrh r3, [r7, #34] @ 0x22
800a7d8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a7dc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a7e0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a7e4: f043 0380 orr.w r3, r3, #128 @ 0x80
800a7e8: b29b uxth r3, r3
800a7ea: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800a7ec: 2300 movs r3, #0
}
800a7ee: 4618 mov r0, r3
800a7f0: 3734 adds r7, #52 @ 0x34
800a7f2: 46bd mov sp, r7
800a7f4: bc80 pop {r7}
800a7f6: 4770 bx lr
0800a7f8 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a7f8: b580 push {r7, lr}
800a7fa: b0c2 sub sp, #264 @ 0x108
800a7fc: af00 add r7, sp, #0
800a7fe: f507 7384 add.w r3, r7, #264 @ 0x108
800a802: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a806: 6018 str r0, [r3, #0]
800a808: f507 7384 add.w r3, r7, #264 @ 0x108
800a80c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a810: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
800a812: f507 7384 add.w r3, r7, #264 @ 0x108
800a816: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a81a: 681b ldr r3, [r3, #0]
800a81c: 785b ldrb r3, [r3, #1]
800a81e: 2b01 cmp r3, #1
800a820: f040 86b7 bne.w 800b592 <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
800a824: f507 7384 add.w r3, r7, #264 @ 0x108
800a828: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a82c: 681b ldr r3, [r3, #0]
800a82e: 699a ldr r2, [r3, #24]
800a830: f507 7384 add.w r3, r7, #264 @ 0x108
800a834: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a838: 681b ldr r3, [r3, #0]
800a83a: 691b ldr r3, [r3, #16]
800a83c: 429a cmp r2, r3
800a83e: d908 bls.n 800a852 <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
800a840: f507 7384 add.w r3, r7, #264 @ 0x108
800a844: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a848: 681b ldr r3, [r3, #0]
800a84a: 691b ldr r3, [r3, #16]
800a84c: f8c7 3104 str.w r3, [r7, #260] @ 0x104
800a850: e007 b.n 800a862 <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
800a852: f507 7384 add.w r3, r7, #264 @ 0x108
800a856: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a85a: 681b ldr r3, [r3, #0]
800a85c: 699b ldr r3, [r3, #24]
800a85e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
800a862: f507 7384 add.w r3, r7, #264 @ 0x108
800a866: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a86a: 681b ldr r3, [r3, #0]
800a86c: 7b1b ldrb r3, [r3, #12]
800a86e: 2b00 cmp r3, #0
800a870: d13a bne.n 800a8e8 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
800a872: f507 7384 add.w r3, r7, #264 @ 0x108
800a876: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a87a: 681b ldr r3, [r3, #0]
800a87c: 6959 ldr r1, [r3, #20]
800a87e: f507 7384 add.w r3, r7, #264 @ 0x108
800a882: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a886: 681b ldr r3, [r3, #0]
800a888: 88da ldrh r2, [r3, #6]
800a88a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a88e: b29b uxth r3, r3
800a890: f507 7084 add.w r0, r7, #264 @ 0x108
800a894: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a898: 6800 ldr r0, [r0, #0]
800a89a: f001 fc9c bl 800c1d6 <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800a89e: f507 7384 add.w r3, r7, #264 @ 0x108
800a8a2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8a6: 681b ldr r3, [r3, #0]
800a8a8: 613b str r3, [r7, #16]
800a8aa: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ae: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8b2: 681b ldr r3, [r3, #0]
800a8b4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a8b8: b29b uxth r3, r3
800a8ba: 461a mov r2, r3
800a8bc: 693b ldr r3, [r7, #16]
800a8be: 4413 add r3, r2
800a8c0: 613b str r3, [r7, #16]
800a8c2: f507 7384 add.w r3, r7, #264 @ 0x108
800a8c6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8ca: 681b ldr r3, [r3, #0]
800a8cc: 781b ldrb r3, [r3, #0]
800a8ce: 011a lsls r2, r3, #4
800a8d0: 693b ldr r3, [r7, #16]
800a8d2: 4413 add r3, r2
800a8d4: f203 4304 addw r3, r3, #1028 @ 0x404
800a8d8: 60fb str r3, [r7, #12]
800a8da: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a8de: b29a uxth r2, r3
800a8e0: 68fb ldr r3, [r7, #12]
800a8e2: 801a strh r2, [r3, #0]
800a8e4: f000 be1f b.w 800b526 <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
800a8e8: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8f0: 681b ldr r3, [r3, #0]
800a8f2: 78db ldrb r3, [r3, #3]
800a8f4: 2b02 cmp r3, #2
800a8f6: f040 8462 bne.w 800b1be <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
800a8fa: f507 7384 add.w r3, r7, #264 @ 0x108
800a8fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a902: 681b ldr r3, [r3, #0]
800a904: 6a1a ldr r2, [r3, #32]
800a906: f507 7384 add.w r3, r7, #264 @ 0x108
800a90a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a90e: 681b ldr r3, [r3, #0]
800a910: 691b ldr r3, [r3, #16]
800a912: 429a cmp r2, r3
800a914: f240 83df bls.w 800b0d6 <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a918: f507 7384 add.w r3, r7, #264 @ 0x108
800a91c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a920: 681a ldr r2, [r3, #0]
800a922: f507 7384 add.w r3, r7, #264 @ 0x108
800a926: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a92a: 681b ldr r3, [r3, #0]
800a92c: 781b ldrb r3, [r3, #0]
800a92e: 009b lsls r3, r3, #2
800a930: 4413 add r3, r2
800a932: 881b ldrh r3, [r3, #0]
800a934: b29b uxth r3, r3
800a936: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a93a: f023 0370 bic.w r3, r3, #112 @ 0x70
800a93e: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
800a942: f507 7384 add.w r3, r7, #264 @ 0x108
800a946: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a94a: 681a ldr r2, [r3, #0]
800a94c: f507 7384 add.w r3, r7, #264 @ 0x108
800a950: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a954: 681b ldr r3, [r3, #0]
800a956: 781b ldrb r3, [r3, #0]
800a958: 009b lsls r3, r3, #2
800a95a: 441a add r2, r3
800a95c: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
800a960: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a964: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a968: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800a96c: f043 0380 orr.w r3, r3, #128 @ 0x80
800a970: b29b uxth r3, r3
800a972: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800a974: f507 7384 add.w r3, r7, #264 @ 0x108
800a978: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a97c: 681b ldr r3, [r3, #0]
800a97e: 6a1a ldr r2, [r3, #32]
800a980: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a984: 1ad2 subs r2, r2, r3
800a986: f507 7384 add.w r3, r7, #264 @ 0x108
800a98a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a98e: 681b ldr r3, [r3, #0]
800a990: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800a992: f507 7384 add.w r3, r7, #264 @ 0x108
800a996: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a99a: 681a ldr r2, [r3, #0]
800a99c: f507 7384 add.w r3, r7, #264 @ 0x108
800a9a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9a4: 681b ldr r3, [r3, #0]
800a9a6: 781b ldrb r3, [r3, #0]
800a9a8: 009b lsls r3, r3, #2
800a9aa: 4413 add r3, r2
800a9ac: 881b ldrh r3, [r3, #0]
800a9ae: b29b uxth r3, r3
800a9b0: f003 0340 and.w r3, r3, #64 @ 0x40
800a9b4: 2b00 cmp r3, #0
800a9b6: f000 81c7 beq.w 800ad48 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a9ba: f507 7384 add.w r3, r7, #264 @ 0x108
800a9be: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9c2: 681b ldr r3, [r3, #0]
800a9c4: 633b str r3, [r7, #48] @ 0x30
800a9c6: f507 7384 add.w r3, r7, #264 @ 0x108
800a9ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9ce: 681b ldr r3, [r3, #0]
800a9d0: 785b ldrb r3, [r3, #1]
800a9d2: 2b00 cmp r3, #0
800a9d4: d177 bne.n 800aac6 <USB_EPStartXfer+0x2ce>
800a9d6: f507 7384 add.w r3, r7, #264 @ 0x108
800a9da: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9de: 681b ldr r3, [r3, #0]
800a9e0: 62bb str r3, [r7, #40] @ 0x28
800a9e2: f507 7384 add.w r3, r7, #264 @ 0x108
800a9e6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9ea: 681b ldr r3, [r3, #0]
800a9ec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a9f0: b29b uxth r3, r3
800a9f2: 461a mov r2, r3
800a9f4: 6abb ldr r3, [r7, #40] @ 0x28
800a9f6: 4413 add r3, r2
800a9f8: 62bb str r3, [r7, #40] @ 0x28
800a9fa: f507 7384 add.w r3, r7, #264 @ 0x108
800a9fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa02: 681b ldr r3, [r3, #0]
800aa04: 781b ldrb r3, [r3, #0]
800aa06: 011a lsls r2, r3, #4
800aa08: 6abb ldr r3, [r7, #40] @ 0x28
800aa0a: 4413 add r3, r2
800aa0c: f203 430c addw r3, r3, #1036 @ 0x40c
800aa10: 627b str r3, [r7, #36] @ 0x24
800aa12: 6a7b ldr r3, [r7, #36] @ 0x24
800aa14: 881b ldrh r3, [r3, #0]
800aa16: b29b uxth r3, r3
800aa18: f3c3 0309 ubfx r3, r3, #0, #10
800aa1c: b29a uxth r2, r3
800aa1e: 6a7b ldr r3, [r7, #36] @ 0x24
800aa20: 801a strh r2, [r3, #0]
800aa22: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa26: 2b3e cmp r3, #62 @ 0x3e
800aa28: d921 bls.n 800aa6e <USB_EPStartXfer+0x276>
800aa2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa2e: 095b lsrs r3, r3, #5
800aa30: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800aa34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa38: f003 031f and.w r3, r3, #31
800aa3c: 2b00 cmp r3, #0
800aa3e: d104 bne.n 800aa4a <USB_EPStartXfer+0x252>
800aa40: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800aa44: 3b01 subs r3, #1
800aa46: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800aa4a: 6a7b ldr r3, [r7, #36] @ 0x24
800aa4c: 881b ldrh r3, [r3, #0]
800aa4e: b29a uxth r2, r3
800aa50: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800aa54: b29b uxth r3, r3
800aa56: 029b lsls r3, r3, #10
800aa58: b29b uxth r3, r3
800aa5a: 4313 orrs r3, r2
800aa5c: b29b uxth r3, r3
800aa5e: ea6f 4343 mvn.w r3, r3, lsl #17
800aa62: ea6f 4353 mvn.w r3, r3, lsr #17
800aa66: b29a uxth r2, r3
800aa68: 6a7b ldr r3, [r7, #36] @ 0x24
800aa6a: 801a strh r2, [r3, #0]
800aa6c: e050 b.n 800ab10 <USB_EPStartXfer+0x318>
800aa6e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa72: 2b00 cmp r3, #0
800aa74: d10a bne.n 800aa8c <USB_EPStartXfer+0x294>
800aa76: 6a7b ldr r3, [r7, #36] @ 0x24
800aa78: 881b ldrh r3, [r3, #0]
800aa7a: b29b uxth r3, r3
800aa7c: ea6f 4343 mvn.w r3, r3, lsl #17
800aa80: ea6f 4353 mvn.w r3, r3, lsr #17
800aa84: b29a uxth r2, r3
800aa86: 6a7b ldr r3, [r7, #36] @ 0x24
800aa88: 801a strh r2, [r3, #0]
800aa8a: e041 b.n 800ab10 <USB_EPStartXfer+0x318>
800aa8c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa90: 085b lsrs r3, r3, #1
800aa92: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800aa96: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa9a: f003 0301 and.w r3, r3, #1
800aa9e: 2b00 cmp r3, #0
800aaa0: d004 beq.n 800aaac <USB_EPStartXfer+0x2b4>
800aaa2: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800aaa6: 3301 adds r3, #1
800aaa8: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800aaac: 6a7b ldr r3, [r7, #36] @ 0x24
800aaae: 881b ldrh r3, [r3, #0]
800aab0: b29a uxth r2, r3
800aab2: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800aab6: b29b uxth r3, r3
800aab8: 029b lsls r3, r3, #10
800aaba: b29b uxth r3, r3
800aabc: 4313 orrs r3, r2
800aabe: b29a uxth r2, r3
800aac0: 6a7b ldr r3, [r7, #36] @ 0x24
800aac2: 801a strh r2, [r3, #0]
800aac4: e024 b.n 800ab10 <USB_EPStartXfer+0x318>
800aac6: f507 7384 add.w r3, r7, #264 @ 0x108
800aaca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aace: 681b ldr r3, [r3, #0]
800aad0: 785b ldrb r3, [r3, #1]
800aad2: 2b01 cmp r3, #1
800aad4: d11c bne.n 800ab10 <USB_EPStartXfer+0x318>
800aad6: f507 7384 add.w r3, r7, #264 @ 0x108
800aada: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aade: 681b ldr r3, [r3, #0]
800aae0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800aae4: b29b uxth r3, r3
800aae6: 461a mov r2, r3
800aae8: 6b3b ldr r3, [r7, #48] @ 0x30
800aaea: 4413 add r3, r2
800aaec: 633b str r3, [r7, #48] @ 0x30
800aaee: f507 7384 add.w r3, r7, #264 @ 0x108
800aaf2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aaf6: 681b ldr r3, [r3, #0]
800aaf8: 781b ldrb r3, [r3, #0]
800aafa: 011a lsls r2, r3, #4
800aafc: 6b3b ldr r3, [r7, #48] @ 0x30
800aafe: 4413 add r3, r2
800ab00: f203 430c addw r3, r3, #1036 @ 0x40c
800ab04: 62fb str r3, [r7, #44] @ 0x2c
800ab06: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab0a: b29a uxth r2, r3
800ab0c: 6afb ldr r3, [r7, #44] @ 0x2c
800ab0e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800ab10: f507 7384 add.w r3, r7, #264 @ 0x108
800ab14: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab18: 681b ldr r3, [r3, #0]
800ab1a: 895b ldrh r3, [r3, #10]
800ab1c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800ab20: f507 7384 add.w r3, r7, #264 @ 0x108
800ab24: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab28: 681b ldr r3, [r3, #0]
800ab2a: 6959 ldr r1, [r3, #20]
800ab2c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab30: b29b uxth r3, r3
800ab32: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800ab36: f507 7084 add.w r0, r7, #264 @ 0x108
800ab3a: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800ab3e: 6800 ldr r0, [r0, #0]
800ab40: f001 fb49 bl 800c1d6 <USB_WritePMA>
ep->xfer_buff += len;
800ab44: f507 7384 add.w r3, r7, #264 @ 0x108
800ab48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab4c: 681b ldr r3, [r3, #0]
800ab4e: 695a ldr r2, [r3, #20]
800ab50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab54: 441a add r2, r3
800ab56: f507 7384 add.w r3, r7, #264 @ 0x108
800ab5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab5e: 681b ldr r3, [r3, #0]
800ab60: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800ab62: f507 7384 add.w r3, r7, #264 @ 0x108
800ab66: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab6a: 681b ldr r3, [r3, #0]
800ab6c: 6a1a ldr r2, [r3, #32]
800ab6e: f507 7384 add.w r3, r7, #264 @ 0x108
800ab72: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab76: 681b ldr r3, [r3, #0]
800ab78: 691b ldr r3, [r3, #16]
800ab7a: 429a cmp r2, r3
800ab7c: d90f bls.n 800ab9e <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
800ab7e: f507 7384 add.w r3, r7, #264 @ 0x108
800ab82: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab86: 681b ldr r3, [r3, #0]
800ab88: 6a1a ldr r2, [r3, #32]
800ab8a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab8e: 1ad2 subs r2, r2, r3
800ab90: f507 7384 add.w r3, r7, #264 @ 0x108
800ab94: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab98: 681b ldr r3, [r3, #0]
800ab9a: 621a str r2, [r3, #32]
800ab9c: e00e b.n 800abbc <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
800ab9e: f507 7384 add.w r3, r7, #264 @ 0x108
800aba2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aba6: 681b ldr r3, [r3, #0]
800aba8: 6a1b ldr r3, [r3, #32]
800abaa: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800abae: f507 7384 add.w r3, r7, #264 @ 0x108
800abb2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abb6: 681b ldr r3, [r3, #0]
800abb8: 2200 movs r2, #0
800abba: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800abbc: f507 7384 add.w r3, r7, #264 @ 0x108
800abc0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abc4: 681b ldr r3, [r3, #0]
800abc6: 785b ldrb r3, [r3, #1]
800abc8: 2b00 cmp r3, #0
800abca: d177 bne.n 800acbc <USB_EPStartXfer+0x4c4>
800abcc: f507 7384 add.w r3, r7, #264 @ 0x108
800abd0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800abd4: 681b ldr r3, [r3, #0]
800abd6: 61bb str r3, [r7, #24]
800abd8: f507 7384 add.w r3, r7, #264 @ 0x108
800abdc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800abe0: 681b ldr r3, [r3, #0]
800abe2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800abe6: b29b uxth r3, r3
800abe8: 461a mov r2, r3
800abea: 69bb ldr r3, [r7, #24]
800abec: 4413 add r3, r2
800abee: 61bb str r3, [r7, #24]
800abf0: f507 7384 add.w r3, r7, #264 @ 0x108
800abf4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abf8: 681b ldr r3, [r3, #0]
800abfa: 781b ldrb r3, [r3, #0]
800abfc: 011a lsls r2, r3, #4
800abfe: 69bb ldr r3, [r7, #24]
800ac00: 4413 add r3, r2
800ac02: f203 4304 addw r3, r3, #1028 @ 0x404
800ac06: 617b str r3, [r7, #20]
800ac08: 697b ldr r3, [r7, #20]
800ac0a: 881b ldrh r3, [r3, #0]
800ac0c: b29b uxth r3, r3
800ac0e: f3c3 0309 ubfx r3, r3, #0, #10
800ac12: b29a uxth r2, r3
800ac14: 697b ldr r3, [r7, #20]
800ac16: 801a strh r2, [r3, #0]
800ac18: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac1c: 2b3e cmp r3, #62 @ 0x3e
800ac1e: d921 bls.n 800ac64 <USB_EPStartXfer+0x46c>
800ac20: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac24: 095b lsrs r3, r3, #5
800ac26: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ac2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac2e: f003 031f and.w r3, r3, #31
800ac32: 2b00 cmp r3, #0
800ac34: d104 bne.n 800ac40 <USB_EPStartXfer+0x448>
800ac36: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ac3a: 3b01 subs r3, #1
800ac3c: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ac40: 697b ldr r3, [r7, #20]
800ac42: 881b ldrh r3, [r3, #0]
800ac44: b29a uxth r2, r3
800ac46: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ac4a: b29b uxth r3, r3
800ac4c: 029b lsls r3, r3, #10
800ac4e: b29b uxth r3, r3
800ac50: 4313 orrs r3, r2
800ac52: b29b uxth r3, r3
800ac54: ea6f 4343 mvn.w r3, r3, lsl #17
800ac58: ea6f 4353 mvn.w r3, r3, lsr #17
800ac5c: b29a uxth r2, r3
800ac5e: 697b ldr r3, [r7, #20]
800ac60: 801a strh r2, [r3, #0]
800ac62: e056 b.n 800ad12 <USB_EPStartXfer+0x51a>
800ac64: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac68: 2b00 cmp r3, #0
800ac6a: d10a bne.n 800ac82 <USB_EPStartXfer+0x48a>
800ac6c: 697b ldr r3, [r7, #20]
800ac6e: 881b ldrh r3, [r3, #0]
800ac70: b29b uxth r3, r3
800ac72: ea6f 4343 mvn.w r3, r3, lsl #17
800ac76: ea6f 4353 mvn.w r3, r3, lsr #17
800ac7a: b29a uxth r2, r3
800ac7c: 697b ldr r3, [r7, #20]
800ac7e: 801a strh r2, [r3, #0]
800ac80: e047 b.n 800ad12 <USB_EPStartXfer+0x51a>
800ac82: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac86: 085b lsrs r3, r3, #1
800ac88: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ac8c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac90: f003 0301 and.w r3, r3, #1
800ac94: 2b00 cmp r3, #0
800ac96: d004 beq.n 800aca2 <USB_EPStartXfer+0x4aa>
800ac98: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ac9c: 3301 adds r3, #1
800ac9e: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800aca2: 697b ldr r3, [r7, #20]
800aca4: 881b ldrh r3, [r3, #0]
800aca6: b29a uxth r2, r3
800aca8: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800acac: b29b uxth r3, r3
800acae: 029b lsls r3, r3, #10
800acb0: b29b uxth r3, r3
800acb2: 4313 orrs r3, r2
800acb4: b29a uxth r2, r3
800acb6: 697b ldr r3, [r7, #20]
800acb8: 801a strh r2, [r3, #0]
800acba: e02a b.n 800ad12 <USB_EPStartXfer+0x51a>
800acbc: f507 7384 add.w r3, r7, #264 @ 0x108
800acc0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acc4: 681b ldr r3, [r3, #0]
800acc6: 785b ldrb r3, [r3, #1]
800acc8: 2b01 cmp r3, #1
800acca: d122 bne.n 800ad12 <USB_EPStartXfer+0x51a>
800accc: f507 7384 add.w r3, r7, #264 @ 0x108
800acd0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800acd4: 681b ldr r3, [r3, #0]
800acd6: 623b str r3, [r7, #32]
800acd8: f507 7384 add.w r3, r7, #264 @ 0x108
800acdc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ace0: 681b ldr r3, [r3, #0]
800ace2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ace6: b29b uxth r3, r3
800ace8: 461a mov r2, r3
800acea: 6a3b ldr r3, [r7, #32]
800acec: 4413 add r3, r2
800acee: 623b str r3, [r7, #32]
800acf0: f507 7384 add.w r3, r7, #264 @ 0x108
800acf4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acf8: 681b ldr r3, [r3, #0]
800acfa: 781b ldrb r3, [r3, #0]
800acfc: 011a lsls r2, r3, #4
800acfe: 6a3b ldr r3, [r7, #32]
800ad00: 4413 add r3, r2
800ad02: f203 4304 addw r3, r3, #1028 @ 0x404
800ad06: 61fb str r3, [r7, #28]
800ad08: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad0c: b29a uxth r2, r3
800ad0e: 69fb ldr r3, [r7, #28]
800ad10: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800ad12: f507 7384 add.w r3, r7, #264 @ 0x108
800ad16: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad1a: 681b ldr r3, [r3, #0]
800ad1c: 891b ldrh r3, [r3, #8]
800ad1e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800ad22: f507 7384 add.w r3, r7, #264 @ 0x108
800ad26: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad2a: 681b ldr r3, [r3, #0]
800ad2c: 6959 ldr r1, [r3, #20]
800ad2e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad32: b29b uxth r3, r3
800ad34: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800ad38: f507 7084 add.w r0, r7, #264 @ 0x108
800ad3c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800ad40: 6800 ldr r0, [r0, #0]
800ad42: f001 fa48 bl 800c1d6 <USB_WritePMA>
800ad46: e3ee b.n 800b526 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800ad48: f507 7384 add.w r3, r7, #264 @ 0x108
800ad4c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad50: 681b ldr r3, [r3, #0]
800ad52: 785b ldrb r3, [r3, #1]
800ad54: 2b00 cmp r3, #0
800ad56: d177 bne.n 800ae48 <USB_EPStartXfer+0x650>
800ad58: f507 7384 add.w r3, r7, #264 @ 0x108
800ad5c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad60: 681b ldr r3, [r3, #0]
800ad62: 64bb str r3, [r7, #72] @ 0x48
800ad64: f507 7384 add.w r3, r7, #264 @ 0x108
800ad68: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad6c: 681b ldr r3, [r3, #0]
800ad6e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ad72: b29b uxth r3, r3
800ad74: 461a mov r2, r3
800ad76: 6cbb ldr r3, [r7, #72] @ 0x48
800ad78: 4413 add r3, r2
800ad7a: 64bb str r3, [r7, #72] @ 0x48
800ad7c: f507 7384 add.w r3, r7, #264 @ 0x108
800ad80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad84: 681b ldr r3, [r3, #0]
800ad86: 781b ldrb r3, [r3, #0]
800ad88: 011a lsls r2, r3, #4
800ad8a: 6cbb ldr r3, [r7, #72] @ 0x48
800ad8c: 4413 add r3, r2
800ad8e: f203 4304 addw r3, r3, #1028 @ 0x404
800ad92: 647b str r3, [r7, #68] @ 0x44
800ad94: 6c7b ldr r3, [r7, #68] @ 0x44
800ad96: 881b ldrh r3, [r3, #0]
800ad98: b29b uxth r3, r3
800ad9a: f3c3 0309 ubfx r3, r3, #0, #10
800ad9e: b29a uxth r2, r3
800ada0: 6c7b ldr r3, [r7, #68] @ 0x44
800ada2: 801a strh r2, [r3, #0]
800ada4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ada8: 2b3e cmp r3, #62 @ 0x3e
800adaa: d921 bls.n 800adf0 <USB_EPStartXfer+0x5f8>
800adac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800adb0: 095b lsrs r3, r3, #5
800adb2: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800adb6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800adba: f003 031f and.w r3, r3, #31
800adbe: 2b00 cmp r3, #0
800adc0: d104 bne.n 800adcc <USB_EPStartXfer+0x5d4>
800adc2: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800adc6: 3b01 subs r3, #1
800adc8: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800adcc: 6c7b ldr r3, [r7, #68] @ 0x44
800adce: 881b ldrh r3, [r3, #0]
800add0: b29a uxth r2, r3
800add2: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800add6: b29b uxth r3, r3
800add8: 029b lsls r3, r3, #10
800adda: b29b uxth r3, r3
800addc: 4313 orrs r3, r2
800adde: b29b uxth r3, r3
800ade0: ea6f 4343 mvn.w r3, r3, lsl #17
800ade4: ea6f 4353 mvn.w r3, r3, lsr #17
800ade8: b29a uxth r2, r3
800adea: 6c7b ldr r3, [r7, #68] @ 0x44
800adec: 801a strh r2, [r3, #0]
800adee: e056 b.n 800ae9e <USB_EPStartXfer+0x6a6>
800adf0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800adf4: 2b00 cmp r3, #0
800adf6: d10a bne.n 800ae0e <USB_EPStartXfer+0x616>
800adf8: 6c7b ldr r3, [r7, #68] @ 0x44
800adfa: 881b ldrh r3, [r3, #0]
800adfc: b29b uxth r3, r3
800adfe: ea6f 4343 mvn.w r3, r3, lsl #17
800ae02: ea6f 4353 mvn.w r3, r3, lsr #17
800ae06: b29a uxth r2, r3
800ae08: 6c7b ldr r3, [r7, #68] @ 0x44
800ae0a: 801a strh r2, [r3, #0]
800ae0c: e047 b.n 800ae9e <USB_EPStartXfer+0x6a6>
800ae0e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae12: 085b lsrs r3, r3, #1
800ae14: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ae18: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae1c: f003 0301 and.w r3, r3, #1
800ae20: 2b00 cmp r3, #0
800ae22: d004 beq.n 800ae2e <USB_EPStartXfer+0x636>
800ae24: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800ae28: 3301 adds r3, #1
800ae2a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ae2e: 6c7b ldr r3, [r7, #68] @ 0x44
800ae30: 881b ldrh r3, [r3, #0]
800ae32: b29a uxth r2, r3
800ae34: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800ae38: b29b uxth r3, r3
800ae3a: 029b lsls r3, r3, #10
800ae3c: b29b uxth r3, r3
800ae3e: 4313 orrs r3, r2
800ae40: b29a uxth r2, r3
800ae42: 6c7b ldr r3, [r7, #68] @ 0x44
800ae44: 801a strh r2, [r3, #0]
800ae46: e02a b.n 800ae9e <USB_EPStartXfer+0x6a6>
800ae48: f507 7384 add.w r3, r7, #264 @ 0x108
800ae4c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae50: 681b ldr r3, [r3, #0]
800ae52: 785b ldrb r3, [r3, #1]
800ae54: 2b01 cmp r3, #1
800ae56: d122 bne.n 800ae9e <USB_EPStartXfer+0x6a6>
800ae58: f507 7384 add.w r3, r7, #264 @ 0x108
800ae5c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae60: 681b ldr r3, [r3, #0]
800ae62: 653b str r3, [r7, #80] @ 0x50
800ae64: f507 7384 add.w r3, r7, #264 @ 0x108
800ae68: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae6c: 681b ldr r3, [r3, #0]
800ae6e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ae72: b29b uxth r3, r3
800ae74: 461a mov r2, r3
800ae76: 6d3b ldr r3, [r7, #80] @ 0x50
800ae78: 4413 add r3, r2
800ae7a: 653b str r3, [r7, #80] @ 0x50
800ae7c: f507 7384 add.w r3, r7, #264 @ 0x108
800ae80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae84: 681b ldr r3, [r3, #0]
800ae86: 781b ldrb r3, [r3, #0]
800ae88: 011a lsls r2, r3, #4
800ae8a: 6d3b ldr r3, [r7, #80] @ 0x50
800ae8c: 4413 add r3, r2
800ae8e: f203 4304 addw r3, r3, #1028 @ 0x404
800ae92: 64fb str r3, [r7, #76] @ 0x4c
800ae94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae98: b29a uxth r2, r3
800ae9a: 6cfb ldr r3, [r7, #76] @ 0x4c
800ae9c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800ae9e: f507 7384 add.w r3, r7, #264 @ 0x108
800aea2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aea6: 681b ldr r3, [r3, #0]
800aea8: 891b ldrh r3, [r3, #8]
800aeaa: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800aeae: f507 7384 add.w r3, r7, #264 @ 0x108
800aeb2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aeb6: 681b ldr r3, [r3, #0]
800aeb8: 6959 ldr r1, [r3, #20]
800aeba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aebe: b29b uxth r3, r3
800aec0: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800aec4: f507 7084 add.w r0, r7, #264 @ 0x108
800aec8: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800aecc: 6800 ldr r0, [r0, #0]
800aece: f001 f982 bl 800c1d6 <USB_WritePMA>
ep->xfer_buff += len;
800aed2: f507 7384 add.w r3, r7, #264 @ 0x108
800aed6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aeda: 681b ldr r3, [r3, #0]
800aedc: 695a ldr r2, [r3, #20]
800aede: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aee2: 441a add r2, r3
800aee4: f507 7384 add.w r3, r7, #264 @ 0x108
800aee8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aeec: 681b ldr r3, [r3, #0]
800aeee: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800aef0: f507 7384 add.w r3, r7, #264 @ 0x108
800aef4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aef8: 681b ldr r3, [r3, #0]
800aefa: 6a1a ldr r2, [r3, #32]
800aefc: f507 7384 add.w r3, r7, #264 @ 0x108
800af00: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af04: 681b ldr r3, [r3, #0]
800af06: 691b ldr r3, [r3, #16]
800af08: 429a cmp r2, r3
800af0a: d90f bls.n 800af2c <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
800af0c: f507 7384 add.w r3, r7, #264 @ 0x108
800af10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af14: 681b ldr r3, [r3, #0]
800af16: 6a1a ldr r2, [r3, #32]
800af18: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af1c: 1ad2 subs r2, r2, r3
800af1e: f507 7384 add.w r3, r7, #264 @ 0x108
800af22: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af26: 681b ldr r3, [r3, #0]
800af28: 621a str r2, [r3, #32]
800af2a: e00e b.n 800af4a <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
800af2c: f507 7384 add.w r3, r7, #264 @ 0x108
800af30: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af34: 681b ldr r3, [r3, #0]
800af36: 6a1b ldr r3, [r3, #32]
800af38: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800af3c: f507 7384 add.w r3, r7, #264 @ 0x108
800af40: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af44: 681b ldr r3, [r3, #0]
800af46: 2200 movs r2, #0
800af48: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800af4a: f507 7384 add.w r3, r7, #264 @ 0x108
800af4e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af52: 681b ldr r3, [r3, #0]
800af54: 643b str r3, [r7, #64] @ 0x40
800af56: f507 7384 add.w r3, r7, #264 @ 0x108
800af5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af5e: 681b ldr r3, [r3, #0]
800af60: 785b ldrb r3, [r3, #1]
800af62: 2b00 cmp r3, #0
800af64: d177 bne.n 800b056 <USB_EPStartXfer+0x85e>
800af66: f507 7384 add.w r3, r7, #264 @ 0x108
800af6a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af6e: 681b ldr r3, [r3, #0]
800af70: 63bb str r3, [r7, #56] @ 0x38
800af72: f507 7384 add.w r3, r7, #264 @ 0x108
800af76: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af7a: 681b ldr r3, [r3, #0]
800af7c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800af80: b29b uxth r3, r3
800af82: 461a mov r2, r3
800af84: 6bbb ldr r3, [r7, #56] @ 0x38
800af86: 4413 add r3, r2
800af88: 63bb str r3, [r7, #56] @ 0x38
800af8a: f507 7384 add.w r3, r7, #264 @ 0x108
800af8e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af92: 681b ldr r3, [r3, #0]
800af94: 781b ldrb r3, [r3, #0]
800af96: 011a lsls r2, r3, #4
800af98: 6bbb ldr r3, [r7, #56] @ 0x38
800af9a: 4413 add r3, r2
800af9c: f203 430c addw r3, r3, #1036 @ 0x40c
800afa0: 637b str r3, [r7, #52] @ 0x34
800afa2: 6b7b ldr r3, [r7, #52] @ 0x34
800afa4: 881b ldrh r3, [r3, #0]
800afa6: b29b uxth r3, r3
800afa8: f3c3 0309 ubfx r3, r3, #0, #10
800afac: b29a uxth r2, r3
800afae: 6b7b ldr r3, [r7, #52] @ 0x34
800afb0: 801a strh r2, [r3, #0]
800afb2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afb6: 2b3e cmp r3, #62 @ 0x3e
800afb8: d921 bls.n 800affe <USB_EPStartXfer+0x806>
800afba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afbe: 095b lsrs r3, r3, #5
800afc0: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800afc4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afc8: f003 031f and.w r3, r3, #31
800afcc: 2b00 cmp r3, #0
800afce: d104 bne.n 800afda <USB_EPStartXfer+0x7e2>
800afd0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800afd4: 3b01 subs r3, #1
800afd6: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800afda: 6b7b ldr r3, [r7, #52] @ 0x34
800afdc: 881b ldrh r3, [r3, #0]
800afde: b29a uxth r2, r3
800afe0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800afe4: b29b uxth r3, r3
800afe6: 029b lsls r3, r3, #10
800afe8: b29b uxth r3, r3
800afea: 4313 orrs r3, r2
800afec: b29b uxth r3, r3
800afee: ea6f 4343 mvn.w r3, r3, lsl #17
800aff2: ea6f 4353 mvn.w r3, r3, lsr #17
800aff6: b29a uxth r2, r3
800aff8: 6b7b ldr r3, [r7, #52] @ 0x34
800affa: 801a strh r2, [r3, #0]
800affc: e050 b.n 800b0a0 <USB_EPStartXfer+0x8a8>
800affe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b002: 2b00 cmp r3, #0
800b004: d10a bne.n 800b01c <USB_EPStartXfer+0x824>
800b006: 6b7b ldr r3, [r7, #52] @ 0x34
800b008: 881b ldrh r3, [r3, #0]
800b00a: b29b uxth r3, r3
800b00c: ea6f 4343 mvn.w r3, r3, lsl #17
800b010: ea6f 4353 mvn.w r3, r3, lsr #17
800b014: b29a uxth r2, r3
800b016: 6b7b ldr r3, [r7, #52] @ 0x34
800b018: 801a strh r2, [r3, #0]
800b01a: e041 b.n 800b0a0 <USB_EPStartXfer+0x8a8>
800b01c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b020: 085b lsrs r3, r3, #1
800b022: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800b026: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b02a: f003 0301 and.w r3, r3, #1
800b02e: 2b00 cmp r3, #0
800b030: d004 beq.n 800b03c <USB_EPStartXfer+0x844>
800b032: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800b036: 3301 adds r3, #1
800b038: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800b03c: 6b7b ldr r3, [r7, #52] @ 0x34
800b03e: 881b ldrh r3, [r3, #0]
800b040: b29a uxth r2, r3
800b042: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800b046: b29b uxth r3, r3
800b048: 029b lsls r3, r3, #10
800b04a: b29b uxth r3, r3
800b04c: 4313 orrs r3, r2
800b04e: b29a uxth r2, r3
800b050: 6b7b ldr r3, [r7, #52] @ 0x34
800b052: 801a strh r2, [r3, #0]
800b054: e024 b.n 800b0a0 <USB_EPStartXfer+0x8a8>
800b056: f507 7384 add.w r3, r7, #264 @ 0x108
800b05a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b05e: 681b ldr r3, [r3, #0]
800b060: 785b ldrb r3, [r3, #1]
800b062: 2b01 cmp r3, #1
800b064: d11c bne.n 800b0a0 <USB_EPStartXfer+0x8a8>
800b066: f507 7384 add.w r3, r7, #264 @ 0x108
800b06a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b06e: 681b ldr r3, [r3, #0]
800b070: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b074: b29b uxth r3, r3
800b076: 461a mov r2, r3
800b078: 6c3b ldr r3, [r7, #64] @ 0x40
800b07a: 4413 add r3, r2
800b07c: 643b str r3, [r7, #64] @ 0x40
800b07e: f507 7384 add.w r3, r7, #264 @ 0x108
800b082: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b086: 681b ldr r3, [r3, #0]
800b088: 781b ldrb r3, [r3, #0]
800b08a: 011a lsls r2, r3, #4
800b08c: 6c3b ldr r3, [r7, #64] @ 0x40
800b08e: 4413 add r3, r2
800b090: f203 430c addw r3, r3, #1036 @ 0x40c
800b094: 63fb str r3, [r7, #60] @ 0x3c
800b096: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b09a: b29a uxth r2, r3
800b09c: 6bfb ldr r3, [r7, #60] @ 0x3c
800b09e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800b0a0: f507 7384 add.w r3, r7, #264 @ 0x108
800b0a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0a8: 681b ldr r3, [r3, #0]
800b0aa: 895b ldrh r3, [r3, #10]
800b0ac: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b0b0: f507 7384 add.w r3, r7, #264 @ 0x108
800b0b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0b8: 681b ldr r3, [r3, #0]
800b0ba: 6959 ldr r1, [r3, #20]
800b0bc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b0c0: b29b uxth r3, r3
800b0c2: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b0c6: f507 7084 add.w r0, r7, #264 @ 0x108
800b0ca: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b0ce: 6800 ldr r0, [r0, #0]
800b0d0: f001 f881 bl 800c1d6 <USB_WritePMA>
800b0d4: e227 b.n 800b526 <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
800b0d6: f507 7384 add.w r3, r7, #264 @ 0x108
800b0da: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0de: 681b ldr r3, [r3, #0]
800b0e0: 6a1b ldr r3, [r3, #32]
800b0e2: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
800b0e6: f507 7384 add.w r3, r7, #264 @ 0x108
800b0ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b0ee: 681a ldr r2, [r3, #0]
800b0f0: f507 7384 add.w r3, r7, #264 @ 0x108
800b0f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0f8: 681b ldr r3, [r3, #0]
800b0fa: 781b ldrb r3, [r3, #0]
800b0fc: 009b lsls r3, r3, #2
800b0fe: 4413 add r3, r2
800b100: 881b ldrh r3, [r3, #0]
800b102: b29b uxth r3, r3
800b104: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800b108: f023 0370 bic.w r3, r3, #112 @ 0x70
800b10c: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800b110: f507 7384 add.w r3, r7, #264 @ 0x108
800b114: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b118: 681a ldr r2, [r3, #0]
800b11a: f507 7384 add.w r3, r7, #264 @ 0x108
800b11e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b122: 681b ldr r3, [r3, #0]
800b124: 781b ldrb r3, [r3, #0]
800b126: 009b lsls r3, r3, #2
800b128: 441a add r2, r3
800b12a: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800b12e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b132: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b136: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b13a: f043 0380 orr.w r3, r3, #128 @ 0x80
800b13e: b29b uxth r3, r3
800b140: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800b142: f507 7384 add.w r3, r7, #264 @ 0x108
800b146: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b14a: 681b ldr r3, [r3, #0]
800b14c: 65fb str r3, [r7, #92] @ 0x5c
800b14e: f507 7384 add.w r3, r7, #264 @ 0x108
800b152: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b156: 681b ldr r3, [r3, #0]
800b158: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b15c: b29b uxth r3, r3
800b15e: 461a mov r2, r3
800b160: 6dfb ldr r3, [r7, #92] @ 0x5c
800b162: 4413 add r3, r2
800b164: 65fb str r3, [r7, #92] @ 0x5c
800b166: f507 7384 add.w r3, r7, #264 @ 0x108
800b16a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b16e: 681b ldr r3, [r3, #0]
800b170: 781b ldrb r3, [r3, #0]
800b172: 011a lsls r2, r3, #4
800b174: 6dfb ldr r3, [r7, #92] @ 0x5c
800b176: 4413 add r3, r2
800b178: f203 4304 addw r3, r3, #1028 @ 0x404
800b17c: 65bb str r3, [r7, #88] @ 0x58
800b17e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b182: b29a uxth r2, r3
800b184: 6dbb ldr r3, [r7, #88] @ 0x58
800b186: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800b188: f507 7384 add.w r3, r7, #264 @ 0x108
800b18c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b190: 681b ldr r3, [r3, #0]
800b192: 891b ldrh r3, [r3, #8]
800b194: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b198: f507 7384 add.w r3, r7, #264 @ 0x108
800b19c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1a0: 681b ldr r3, [r3, #0]
800b1a2: 6959 ldr r1, [r3, #20]
800b1a4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b1a8: b29b uxth r3, r3
800b1aa: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b1ae: f507 7084 add.w r0, r7, #264 @ 0x108
800b1b2: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b1b6: 6800 ldr r0, [r0, #0]
800b1b8: f001 f80d bl 800c1d6 <USB_WritePMA>
800b1bc: e1b3 b.n 800b526 <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800b1be: f507 7384 add.w r3, r7, #264 @ 0x108
800b1c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1c6: 681b ldr r3, [r3, #0]
800b1c8: 6a1a ldr r2, [r3, #32]
800b1ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b1ce: 1ad2 subs r2, r2, r3
800b1d0: f507 7384 add.w r3, r7, #264 @ 0x108
800b1d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1d8: 681b ldr r3, [r3, #0]
800b1da: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800b1dc: f507 7384 add.w r3, r7, #264 @ 0x108
800b1e0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1e4: 681a ldr r2, [r3, #0]
800b1e6: f507 7384 add.w r3, r7, #264 @ 0x108
800b1ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1ee: 681b ldr r3, [r3, #0]
800b1f0: 781b ldrb r3, [r3, #0]
800b1f2: 009b lsls r3, r3, #2
800b1f4: 4413 add r3, r2
800b1f6: 881b ldrh r3, [r3, #0]
800b1f8: b29b uxth r3, r3
800b1fa: f003 0340 and.w r3, r3, #64 @ 0x40
800b1fe: 2b00 cmp r3, #0
800b200: f000 80c6 beq.w 800b390 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800b204: f507 7384 add.w r3, r7, #264 @ 0x108
800b208: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b20c: 681b ldr r3, [r3, #0]
800b20e: 673b str r3, [r7, #112] @ 0x70
800b210: f507 7384 add.w r3, r7, #264 @ 0x108
800b214: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b218: 681b ldr r3, [r3, #0]
800b21a: 785b ldrb r3, [r3, #1]
800b21c: 2b00 cmp r3, #0
800b21e: d177 bne.n 800b310 <USB_EPStartXfer+0xb18>
800b220: f507 7384 add.w r3, r7, #264 @ 0x108
800b224: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b228: 681b ldr r3, [r3, #0]
800b22a: 66bb str r3, [r7, #104] @ 0x68
800b22c: f507 7384 add.w r3, r7, #264 @ 0x108
800b230: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b234: 681b ldr r3, [r3, #0]
800b236: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b23a: b29b uxth r3, r3
800b23c: 461a mov r2, r3
800b23e: 6ebb ldr r3, [r7, #104] @ 0x68
800b240: 4413 add r3, r2
800b242: 66bb str r3, [r7, #104] @ 0x68
800b244: f507 7384 add.w r3, r7, #264 @ 0x108
800b248: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b24c: 681b ldr r3, [r3, #0]
800b24e: 781b ldrb r3, [r3, #0]
800b250: 011a lsls r2, r3, #4
800b252: 6ebb ldr r3, [r7, #104] @ 0x68
800b254: 4413 add r3, r2
800b256: f203 430c addw r3, r3, #1036 @ 0x40c
800b25a: 667b str r3, [r7, #100] @ 0x64
800b25c: 6e7b ldr r3, [r7, #100] @ 0x64
800b25e: 881b ldrh r3, [r3, #0]
800b260: b29b uxth r3, r3
800b262: f3c3 0309 ubfx r3, r3, #0, #10
800b266: b29a uxth r2, r3
800b268: 6e7b ldr r3, [r7, #100] @ 0x64
800b26a: 801a strh r2, [r3, #0]
800b26c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b270: 2b3e cmp r3, #62 @ 0x3e
800b272: d921 bls.n 800b2b8 <USB_EPStartXfer+0xac0>
800b274: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b278: 095b lsrs r3, r3, #5
800b27a: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b27e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b282: f003 031f and.w r3, r3, #31
800b286: 2b00 cmp r3, #0
800b288: d104 bne.n 800b294 <USB_EPStartXfer+0xa9c>
800b28a: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b28e: 3b01 subs r3, #1
800b290: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b294: 6e7b ldr r3, [r7, #100] @ 0x64
800b296: 881b ldrh r3, [r3, #0]
800b298: b29a uxth r2, r3
800b29a: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b29e: b29b uxth r3, r3
800b2a0: 029b lsls r3, r3, #10
800b2a2: b29b uxth r3, r3
800b2a4: 4313 orrs r3, r2
800b2a6: b29b uxth r3, r3
800b2a8: ea6f 4343 mvn.w r3, r3, lsl #17
800b2ac: ea6f 4353 mvn.w r3, r3, lsr #17
800b2b0: b29a uxth r2, r3
800b2b2: 6e7b ldr r3, [r7, #100] @ 0x64
800b2b4: 801a strh r2, [r3, #0]
800b2b6: e050 b.n 800b35a <USB_EPStartXfer+0xb62>
800b2b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2bc: 2b00 cmp r3, #0
800b2be: d10a bne.n 800b2d6 <USB_EPStartXfer+0xade>
800b2c0: 6e7b ldr r3, [r7, #100] @ 0x64
800b2c2: 881b ldrh r3, [r3, #0]
800b2c4: b29b uxth r3, r3
800b2c6: ea6f 4343 mvn.w r3, r3, lsl #17
800b2ca: ea6f 4353 mvn.w r3, r3, lsr #17
800b2ce: b29a uxth r2, r3
800b2d0: 6e7b ldr r3, [r7, #100] @ 0x64
800b2d2: 801a strh r2, [r3, #0]
800b2d4: e041 b.n 800b35a <USB_EPStartXfer+0xb62>
800b2d6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2da: 085b lsrs r3, r3, #1
800b2dc: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b2e0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2e4: f003 0301 and.w r3, r3, #1
800b2e8: 2b00 cmp r3, #0
800b2ea: d004 beq.n 800b2f6 <USB_EPStartXfer+0xafe>
800b2ec: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b2f0: 3301 adds r3, #1
800b2f2: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b2f6: 6e7b ldr r3, [r7, #100] @ 0x64
800b2f8: 881b ldrh r3, [r3, #0]
800b2fa: b29a uxth r2, r3
800b2fc: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b300: b29b uxth r3, r3
800b302: 029b lsls r3, r3, #10
800b304: b29b uxth r3, r3
800b306: 4313 orrs r3, r2
800b308: b29a uxth r2, r3
800b30a: 6e7b ldr r3, [r7, #100] @ 0x64
800b30c: 801a strh r2, [r3, #0]
800b30e: e024 b.n 800b35a <USB_EPStartXfer+0xb62>
800b310: f507 7384 add.w r3, r7, #264 @ 0x108
800b314: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b318: 681b ldr r3, [r3, #0]
800b31a: 785b ldrb r3, [r3, #1]
800b31c: 2b01 cmp r3, #1
800b31e: d11c bne.n 800b35a <USB_EPStartXfer+0xb62>
800b320: f507 7384 add.w r3, r7, #264 @ 0x108
800b324: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b328: 681b ldr r3, [r3, #0]
800b32a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b32e: b29b uxth r3, r3
800b330: 461a mov r2, r3
800b332: 6f3b ldr r3, [r7, #112] @ 0x70
800b334: 4413 add r3, r2
800b336: 673b str r3, [r7, #112] @ 0x70
800b338: f507 7384 add.w r3, r7, #264 @ 0x108
800b33c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b340: 681b ldr r3, [r3, #0]
800b342: 781b ldrb r3, [r3, #0]
800b344: 011a lsls r2, r3, #4
800b346: 6f3b ldr r3, [r7, #112] @ 0x70
800b348: 4413 add r3, r2
800b34a: f203 430c addw r3, r3, #1036 @ 0x40c
800b34e: 66fb str r3, [r7, #108] @ 0x6c
800b350: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b354: b29a uxth r2, r3
800b356: 6efb ldr r3, [r7, #108] @ 0x6c
800b358: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800b35a: f507 7384 add.w r3, r7, #264 @ 0x108
800b35e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b362: 681b ldr r3, [r3, #0]
800b364: 895b ldrh r3, [r3, #10]
800b366: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b36a: f507 7384 add.w r3, r7, #264 @ 0x108
800b36e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b372: 681b ldr r3, [r3, #0]
800b374: 6959 ldr r1, [r3, #20]
800b376: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b37a: b29b uxth r3, r3
800b37c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b380: f507 7084 add.w r0, r7, #264 @ 0x108
800b384: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b388: 6800 ldr r0, [r0, #0]
800b38a: f000 ff24 bl 800c1d6 <USB_WritePMA>
800b38e: e0ca b.n 800b526 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800b390: f507 7384 add.w r3, r7, #264 @ 0x108
800b394: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b398: 681b ldr r3, [r3, #0]
800b39a: 785b ldrb r3, [r3, #1]
800b39c: 2b00 cmp r3, #0
800b39e: d177 bne.n 800b490 <USB_EPStartXfer+0xc98>
800b3a0: f507 7384 add.w r3, r7, #264 @ 0x108
800b3a4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b3a8: 681b ldr r3, [r3, #0]
800b3aa: 67fb str r3, [r7, #124] @ 0x7c
800b3ac: f507 7384 add.w r3, r7, #264 @ 0x108
800b3b0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b3b4: 681b ldr r3, [r3, #0]
800b3b6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b3ba: b29b uxth r3, r3
800b3bc: 461a mov r2, r3
800b3be: 6ffb ldr r3, [r7, #124] @ 0x7c
800b3c0: 4413 add r3, r2
800b3c2: 67fb str r3, [r7, #124] @ 0x7c
800b3c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b3c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3cc: 681b ldr r3, [r3, #0]
800b3ce: 781b ldrb r3, [r3, #0]
800b3d0: 011a lsls r2, r3, #4
800b3d2: 6ffb ldr r3, [r7, #124] @ 0x7c
800b3d4: 4413 add r3, r2
800b3d6: f203 4304 addw r3, r3, #1028 @ 0x404
800b3da: 67bb str r3, [r7, #120] @ 0x78
800b3dc: 6fbb ldr r3, [r7, #120] @ 0x78
800b3de: 881b ldrh r3, [r3, #0]
800b3e0: b29b uxth r3, r3
800b3e2: f3c3 0309 ubfx r3, r3, #0, #10
800b3e6: b29a uxth r2, r3
800b3e8: 6fbb ldr r3, [r7, #120] @ 0x78
800b3ea: 801a strh r2, [r3, #0]
800b3ec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b3f0: 2b3e cmp r3, #62 @ 0x3e
800b3f2: d921 bls.n 800b438 <USB_EPStartXfer+0xc40>
800b3f4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b3f8: 095b lsrs r3, r3, #5
800b3fa: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b3fe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b402: f003 031f and.w r3, r3, #31
800b406: 2b00 cmp r3, #0
800b408: d104 bne.n 800b414 <USB_EPStartXfer+0xc1c>
800b40a: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b40e: 3b01 subs r3, #1
800b410: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b414: 6fbb ldr r3, [r7, #120] @ 0x78
800b416: 881b ldrh r3, [r3, #0]
800b418: b29a uxth r2, r3
800b41a: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b41e: b29b uxth r3, r3
800b420: 029b lsls r3, r3, #10
800b422: b29b uxth r3, r3
800b424: 4313 orrs r3, r2
800b426: b29b uxth r3, r3
800b428: ea6f 4343 mvn.w r3, r3, lsl #17
800b42c: ea6f 4353 mvn.w r3, r3, lsr #17
800b430: b29a uxth r2, r3
800b432: 6fbb ldr r3, [r7, #120] @ 0x78
800b434: 801a strh r2, [r3, #0]
800b436: e05c b.n 800b4f2 <USB_EPStartXfer+0xcfa>
800b438: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b43c: 2b00 cmp r3, #0
800b43e: d10a bne.n 800b456 <USB_EPStartXfer+0xc5e>
800b440: 6fbb ldr r3, [r7, #120] @ 0x78
800b442: 881b ldrh r3, [r3, #0]
800b444: b29b uxth r3, r3
800b446: ea6f 4343 mvn.w r3, r3, lsl #17
800b44a: ea6f 4353 mvn.w r3, r3, lsr #17
800b44e: b29a uxth r2, r3
800b450: 6fbb ldr r3, [r7, #120] @ 0x78
800b452: 801a strh r2, [r3, #0]
800b454: e04d b.n 800b4f2 <USB_EPStartXfer+0xcfa>
800b456: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b45a: 085b lsrs r3, r3, #1
800b45c: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b460: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b464: f003 0301 and.w r3, r3, #1
800b468: 2b00 cmp r3, #0
800b46a: d004 beq.n 800b476 <USB_EPStartXfer+0xc7e>
800b46c: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b470: 3301 adds r3, #1
800b472: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b476: 6fbb ldr r3, [r7, #120] @ 0x78
800b478: 881b ldrh r3, [r3, #0]
800b47a: b29a uxth r2, r3
800b47c: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b480: b29b uxth r3, r3
800b482: 029b lsls r3, r3, #10
800b484: b29b uxth r3, r3
800b486: 4313 orrs r3, r2
800b488: b29a uxth r2, r3
800b48a: 6fbb ldr r3, [r7, #120] @ 0x78
800b48c: 801a strh r2, [r3, #0]
800b48e: e030 b.n 800b4f2 <USB_EPStartXfer+0xcfa>
800b490: f507 7384 add.w r3, r7, #264 @ 0x108
800b494: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b498: 681b ldr r3, [r3, #0]
800b49a: 785b ldrb r3, [r3, #1]
800b49c: 2b01 cmp r3, #1
800b49e: d128 bne.n 800b4f2 <USB_EPStartXfer+0xcfa>
800b4a0: f507 7384 add.w r3, r7, #264 @ 0x108
800b4a4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b4a8: 681b ldr r3, [r3, #0]
800b4aa: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800b4ae: f507 7384 add.w r3, r7, #264 @ 0x108
800b4b2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b4b6: 681b ldr r3, [r3, #0]
800b4b8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b4bc: b29b uxth r3, r3
800b4be: 461a mov r2, r3
800b4c0: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800b4c4: 4413 add r3, r2
800b4c6: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800b4ca: f507 7384 add.w r3, r7, #264 @ 0x108
800b4ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4d2: 681b ldr r3, [r3, #0]
800b4d4: 781b ldrb r3, [r3, #0]
800b4d6: 011a lsls r2, r3, #4
800b4d8: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800b4dc: 4413 add r3, r2
800b4de: f203 4304 addw r3, r3, #1028 @ 0x404
800b4e2: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800b4e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b4ea: b29a uxth r2, r3
800b4ec: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800b4f0: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800b4f2: f507 7384 add.w r3, r7, #264 @ 0x108
800b4f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4fa: 681b ldr r3, [r3, #0]
800b4fc: 891b ldrh r3, [r3, #8]
800b4fe: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b502: f507 7384 add.w r3, r7, #264 @ 0x108
800b506: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b50a: 681b ldr r3, [r3, #0]
800b50c: 6959 ldr r1, [r3, #20]
800b50e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b512: b29b uxth r3, r3
800b514: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b518: f507 7084 add.w r0, r7, #264 @ 0x108
800b51c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b520: 6800 ldr r0, [r0, #0]
800b522: f000 fe58 bl 800c1d6 <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
800b526: f507 7384 add.w r3, r7, #264 @ 0x108
800b52a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b52e: 681a ldr r2, [r3, #0]
800b530: f507 7384 add.w r3, r7, #264 @ 0x108
800b534: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b538: 681b ldr r3, [r3, #0]
800b53a: 781b ldrb r3, [r3, #0]
800b53c: 009b lsls r3, r3, #2
800b53e: 4413 add r3, r2
800b540: 881b ldrh r3, [r3, #0]
800b542: b29b uxth r3, r3
800b544: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b548: f023 0340 bic.w r3, r3, #64 @ 0x40
800b54c: 817b strh r3, [r7, #10]
800b54e: 897b ldrh r3, [r7, #10]
800b550: f083 0310 eor.w r3, r3, #16
800b554: 817b strh r3, [r7, #10]
800b556: 897b ldrh r3, [r7, #10]
800b558: f083 0320 eor.w r3, r3, #32
800b55c: 817b strh r3, [r7, #10]
800b55e: f507 7384 add.w r3, r7, #264 @ 0x108
800b562: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b566: 681a ldr r2, [r3, #0]
800b568: f507 7384 add.w r3, r7, #264 @ 0x108
800b56c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b570: 681b ldr r3, [r3, #0]
800b572: 781b ldrb r3, [r3, #0]
800b574: 009b lsls r3, r3, #2
800b576: 441a add r2, r3
800b578: 897b ldrh r3, [r7, #10]
800b57a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b57e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b582: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b586: f043 0380 orr.w r3, r3, #128 @ 0x80
800b58a: b29b uxth r3, r3
800b58c: 8013 strh r3, [r2, #0]
800b58e: f000 bcde b.w 800bf4e <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800b592: f507 7384 add.w r3, r7, #264 @ 0x108
800b596: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b59a: 681b ldr r3, [r3, #0]
800b59c: 7b1b ldrb r3, [r3, #12]
800b59e: 2b00 cmp r3, #0
800b5a0: f040 80bb bne.w 800b71a <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800b5a4: f507 7384 add.w r3, r7, #264 @ 0x108
800b5a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5ac: 681b ldr r3, [r3, #0]
800b5ae: 699a ldr r2, [r3, #24]
800b5b0: f507 7384 add.w r3, r7, #264 @ 0x108
800b5b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5b8: 681b ldr r3, [r3, #0]
800b5ba: 691b ldr r3, [r3, #16]
800b5bc: 429a cmp r2, r3
800b5be: d917 bls.n 800b5f0 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
800b5c0: f507 7384 add.w r3, r7, #264 @ 0x108
800b5c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5c8: 681b ldr r3, [r3, #0]
800b5ca: 691b ldr r3, [r3, #16]
800b5cc: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800b5d0: f507 7384 add.w r3, r7, #264 @ 0x108
800b5d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5d8: 681b ldr r3, [r3, #0]
800b5da: 699a ldr r2, [r3, #24]
800b5dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5e0: 1ad2 subs r2, r2, r3
800b5e2: f507 7384 add.w r3, r7, #264 @ 0x108
800b5e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5ea: 681b ldr r3, [r3, #0]
800b5ec: 619a str r2, [r3, #24]
800b5ee: e00e b.n 800b60e <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
800b5f0: f507 7384 add.w r3, r7, #264 @ 0x108
800b5f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5f8: 681b ldr r3, [r3, #0]
800b5fa: 699b ldr r3, [r3, #24]
800b5fc: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800b600: f507 7384 add.w r3, r7, #264 @ 0x108
800b604: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b608: 681b ldr r3, [r3, #0]
800b60a: 2200 movs r2, #0
800b60c: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
800b60e: f507 7384 add.w r3, r7, #264 @ 0x108
800b612: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b616: 681b ldr r3, [r3, #0]
800b618: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800b61c: f507 7384 add.w r3, r7, #264 @ 0x108
800b620: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b624: 681b ldr r3, [r3, #0]
800b626: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b62a: b29b uxth r3, r3
800b62c: 461a mov r2, r3
800b62e: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800b632: 4413 add r3, r2
800b634: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800b638: f507 7384 add.w r3, r7, #264 @ 0x108
800b63c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b640: 681b ldr r3, [r3, #0]
800b642: 781b ldrb r3, [r3, #0]
800b644: 011a lsls r2, r3, #4
800b646: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800b64a: 4413 add r3, r2
800b64c: f203 430c addw r3, r3, #1036 @ 0x40c
800b650: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800b654: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b658: 881b ldrh r3, [r3, #0]
800b65a: b29b uxth r3, r3
800b65c: f3c3 0309 ubfx r3, r3, #0, #10
800b660: b29a uxth r2, r3
800b662: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b666: 801a strh r2, [r3, #0]
800b668: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b66c: 2b3e cmp r3, #62 @ 0x3e
800b66e: d924 bls.n 800b6ba <USB_EPStartXfer+0xec2>
800b670: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b674: 095b lsrs r3, r3, #5
800b676: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b67a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b67e: f003 031f and.w r3, r3, #31
800b682: 2b00 cmp r3, #0
800b684: d104 bne.n 800b690 <USB_EPStartXfer+0xe98>
800b686: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b68a: 3b01 subs r3, #1
800b68c: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b690: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b694: 881b ldrh r3, [r3, #0]
800b696: b29a uxth r2, r3
800b698: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b69c: b29b uxth r3, r3
800b69e: 029b lsls r3, r3, #10
800b6a0: b29b uxth r3, r3
800b6a2: 4313 orrs r3, r2
800b6a4: b29b uxth r3, r3
800b6a6: ea6f 4343 mvn.w r3, r3, lsl #17
800b6aa: ea6f 4353 mvn.w r3, r3, lsr #17
800b6ae: b29a uxth r2, r3
800b6b0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b6b4: 801a strh r2, [r3, #0]
800b6b6: f000 bc10 b.w 800beda <USB_EPStartXfer+0x16e2>
800b6ba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b6be: 2b00 cmp r3, #0
800b6c0: d10c bne.n 800b6dc <USB_EPStartXfer+0xee4>
800b6c2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b6c6: 881b ldrh r3, [r3, #0]
800b6c8: b29b uxth r3, r3
800b6ca: ea6f 4343 mvn.w r3, r3, lsl #17
800b6ce: ea6f 4353 mvn.w r3, r3, lsr #17
800b6d2: b29a uxth r2, r3
800b6d4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b6d8: 801a strh r2, [r3, #0]
800b6da: e3fe b.n 800beda <USB_EPStartXfer+0x16e2>
800b6dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b6e0: 085b lsrs r3, r3, #1
800b6e2: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b6e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b6ea: f003 0301 and.w r3, r3, #1
800b6ee: 2b00 cmp r3, #0
800b6f0: d004 beq.n 800b6fc <USB_EPStartXfer+0xf04>
800b6f2: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b6f6: 3301 adds r3, #1
800b6f8: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b6fc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b700: 881b ldrh r3, [r3, #0]
800b702: b29a uxth r2, r3
800b704: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b708: b29b uxth r3, r3
800b70a: 029b lsls r3, r3, #10
800b70c: b29b uxth r3, r3
800b70e: 4313 orrs r3, r2
800b710: b29a uxth r2, r3
800b712: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b716: 801a strh r2, [r3, #0]
800b718: e3df b.n 800beda <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800b71a: f507 7384 add.w r3, r7, #264 @ 0x108
800b71e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b722: 681b ldr r3, [r3, #0]
800b724: 78db ldrb r3, [r3, #3]
800b726: 2b02 cmp r3, #2
800b728: f040 8218 bne.w 800bb5c <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800b72c: f507 7384 add.w r3, r7, #264 @ 0x108
800b730: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b734: 681b ldr r3, [r3, #0]
800b736: 785b ldrb r3, [r3, #1]
800b738: 2b00 cmp r3, #0
800b73a: f040 809d bne.w 800b878 <USB_EPStartXfer+0x1080>
800b73e: f507 7384 add.w r3, r7, #264 @ 0x108
800b742: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b746: 681b ldr r3, [r3, #0]
800b748: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b74c: f507 7384 add.w r3, r7, #264 @ 0x108
800b750: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b754: 681b ldr r3, [r3, #0]
800b756: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b75a: b29b uxth r3, r3
800b75c: 461a mov r2, r3
800b75e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b762: 4413 add r3, r2
800b764: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b768: f507 7384 add.w r3, r7, #264 @ 0x108
800b76c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b770: 681b ldr r3, [r3, #0]
800b772: 781b ldrb r3, [r3, #0]
800b774: 011a lsls r2, r3, #4
800b776: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b77a: 4413 add r3, r2
800b77c: f203 4304 addw r3, r3, #1028 @ 0x404
800b780: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800b784: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b788: 881b ldrh r3, [r3, #0]
800b78a: b29b uxth r3, r3
800b78c: f3c3 0309 ubfx r3, r3, #0, #10
800b790: b29a uxth r2, r3
800b792: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b796: 801a strh r2, [r3, #0]
800b798: f507 7384 add.w r3, r7, #264 @ 0x108
800b79c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7a0: 681b ldr r3, [r3, #0]
800b7a2: 691b ldr r3, [r3, #16]
800b7a4: 2b3e cmp r3, #62 @ 0x3e
800b7a6: d92b bls.n 800b800 <USB_EPStartXfer+0x1008>
800b7a8: f507 7384 add.w r3, r7, #264 @ 0x108
800b7ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7b0: 681b ldr r3, [r3, #0]
800b7b2: 691b ldr r3, [r3, #16]
800b7b4: 095b lsrs r3, r3, #5
800b7b6: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b7ba: f507 7384 add.w r3, r7, #264 @ 0x108
800b7be: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7c2: 681b ldr r3, [r3, #0]
800b7c4: 691b ldr r3, [r3, #16]
800b7c6: f003 031f and.w r3, r3, #31
800b7ca: 2b00 cmp r3, #0
800b7cc: d104 bne.n 800b7d8 <USB_EPStartXfer+0xfe0>
800b7ce: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b7d2: 3b01 subs r3, #1
800b7d4: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b7d8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b7dc: 881b ldrh r3, [r3, #0]
800b7de: b29a uxth r2, r3
800b7e0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b7e4: b29b uxth r3, r3
800b7e6: 029b lsls r3, r3, #10
800b7e8: b29b uxth r3, r3
800b7ea: 4313 orrs r3, r2
800b7ec: b29b uxth r3, r3
800b7ee: ea6f 4343 mvn.w r3, r3, lsl #17
800b7f2: ea6f 4353 mvn.w r3, r3, lsr #17
800b7f6: b29a uxth r2, r3
800b7f8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b7fc: 801a strh r2, [r3, #0]
800b7fe: e070 b.n 800b8e2 <USB_EPStartXfer+0x10ea>
800b800: f507 7384 add.w r3, r7, #264 @ 0x108
800b804: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b808: 681b ldr r3, [r3, #0]
800b80a: 691b ldr r3, [r3, #16]
800b80c: 2b00 cmp r3, #0
800b80e: d10c bne.n 800b82a <USB_EPStartXfer+0x1032>
800b810: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b814: 881b ldrh r3, [r3, #0]
800b816: b29b uxth r3, r3
800b818: ea6f 4343 mvn.w r3, r3, lsl #17
800b81c: ea6f 4353 mvn.w r3, r3, lsr #17
800b820: b29a uxth r2, r3
800b822: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b826: 801a strh r2, [r3, #0]
800b828: e05b b.n 800b8e2 <USB_EPStartXfer+0x10ea>
800b82a: f507 7384 add.w r3, r7, #264 @ 0x108
800b82e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b832: 681b ldr r3, [r3, #0]
800b834: 691b ldr r3, [r3, #16]
800b836: 085b lsrs r3, r3, #1
800b838: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b83c: f507 7384 add.w r3, r7, #264 @ 0x108
800b840: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b844: 681b ldr r3, [r3, #0]
800b846: 691b ldr r3, [r3, #16]
800b848: f003 0301 and.w r3, r3, #1
800b84c: 2b00 cmp r3, #0
800b84e: d004 beq.n 800b85a <USB_EPStartXfer+0x1062>
800b850: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b854: 3301 adds r3, #1
800b856: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b85a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b85e: 881b ldrh r3, [r3, #0]
800b860: b29a uxth r2, r3
800b862: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b866: b29b uxth r3, r3
800b868: 029b lsls r3, r3, #10
800b86a: b29b uxth r3, r3
800b86c: 4313 orrs r3, r2
800b86e: b29a uxth r2, r3
800b870: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b874: 801a strh r2, [r3, #0]
800b876: e034 b.n 800b8e2 <USB_EPStartXfer+0x10ea>
800b878: f507 7384 add.w r3, r7, #264 @ 0x108
800b87c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b880: 681b ldr r3, [r3, #0]
800b882: 785b ldrb r3, [r3, #1]
800b884: 2b01 cmp r3, #1
800b886: d12c bne.n 800b8e2 <USB_EPStartXfer+0x10ea>
800b888: f507 7384 add.w r3, r7, #264 @ 0x108
800b88c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b890: 681b ldr r3, [r3, #0]
800b892: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b896: f507 7384 add.w r3, r7, #264 @ 0x108
800b89a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b89e: 681b ldr r3, [r3, #0]
800b8a0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b8a4: b29b uxth r3, r3
800b8a6: 461a mov r2, r3
800b8a8: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b8ac: 4413 add r3, r2
800b8ae: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b8b2: f507 7384 add.w r3, r7, #264 @ 0x108
800b8b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8ba: 681b ldr r3, [r3, #0]
800b8bc: 781b ldrb r3, [r3, #0]
800b8be: 011a lsls r2, r3, #4
800b8c0: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b8c4: 4413 add r3, r2
800b8c6: f203 4304 addw r3, r3, #1028 @ 0x404
800b8ca: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800b8ce: f507 7384 add.w r3, r7, #264 @ 0x108
800b8d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8d6: 681b ldr r3, [r3, #0]
800b8d8: 691b ldr r3, [r3, #16]
800b8da: b29a uxth r2, r3
800b8dc: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
800b8e0: 801a strh r2, [r3, #0]
800b8e2: f507 7384 add.w r3, r7, #264 @ 0x108
800b8e6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b8ea: 681b ldr r3, [r3, #0]
800b8ec: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b8f0: f507 7384 add.w r3, r7, #264 @ 0x108
800b8f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8f8: 681b ldr r3, [r3, #0]
800b8fa: 785b ldrb r3, [r3, #1]
800b8fc: 2b00 cmp r3, #0
800b8fe: f040 809d bne.w 800ba3c <USB_EPStartXfer+0x1244>
800b902: f507 7384 add.w r3, r7, #264 @ 0x108
800b906: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b90a: 681b ldr r3, [r3, #0]
800b90c: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b910: f507 7384 add.w r3, r7, #264 @ 0x108
800b914: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b918: 681b ldr r3, [r3, #0]
800b91a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b91e: b29b uxth r3, r3
800b920: 461a mov r2, r3
800b922: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b926: 4413 add r3, r2
800b928: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b92c: f507 7384 add.w r3, r7, #264 @ 0x108
800b930: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b934: 681b ldr r3, [r3, #0]
800b936: 781b ldrb r3, [r3, #0]
800b938: 011a lsls r2, r3, #4
800b93a: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b93e: 4413 add r3, r2
800b940: f203 430c addw r3, r3, #1036 @ 0x40c
800b944: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800b948: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b94c: 881b ldrh r3, [r3, #0]
800b94e: b29b uxth r3, r3
800b950: f3c3 0309 ubfx r3, r3, #0, #10
800b954: b29a uxth r2, r3
800b956: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b95a: 801a strh r2, [r3, #0]
800b95c: f507 7384 add.w r3, r7, #264 @ 0x108
800b960: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b964: 681b ldr r3, [r3, #0]
800b966: 691b ldr r3, [r3, #16]
800b968: 2b3e cmp r3, #62 @ 0x3e
800b96a: d92b bls.n 800b9c4 <USB_EPStartXfer+0x11cc>
800b96c: f507 7384 add.w r3, r7, #264 @ 0x108
800b970: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b974: 681b ldr r3, [r3, #0]
800b976: 691b ldr r3, [r3, #16]
800b978: 095b lsrs r3, r3, #5
800b97a: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b97e: f507 7384 add.w r3, r7, #264 @ 0x108
800b982: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b986: 681b ldr r3, [r3, #0]
800b988: 691b ldr r3, [r3, #16]
800b98a: f003 031f and.w r3, r3, #31
800b98e: 2b00 cmp r3, #0
800b990: d104 bne.n 800b99c <USB_EPStartXfer+0x11a4>
800b992: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b996: 3b01 subs r3, #1
800b998: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b99c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b9a0: 881b ldrh r3, [r3, #0]
800b9a2: b29a uxth r2, r3
800b9a4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b9a8: b29b uxth r3, r3
800b9aa: 029b lsls r3, r3, #10
800b9ac: b29b uxth r3, r3
800b9ae: 4313 orrs r3, r2
800b9b0: b29b uxth r3, r3
800b9b2: ea6f 4343 mvn.w r3, r3, lsl #17
800b9b6: ea6f 4353 mvn.w r3, r3, lsr #17
800b9ba: b29a uxth r2, r3
800b9bc: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b9c0: 801a strh r2, [r3, #0]
800b9c2: e069 b.n 800ba98 <USB_EPStartXfer+0x12a0>
800b9c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b9c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b9cc: 681b ldr r3, [r3, #0]
800b9ce: 691b ldr r3, [r3, #16]
800b9d0: 2b00 cmp r3, #0
800b9d2: d10c bne.n 800b9ee <USB_EPStartXfer+0x11f6>
800b9d4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b9d8: 881b ldrh r3, [r3, #0]
800b9da: b29b uxth r3, r3
800b9dc: ea6f 4343 mvn.w r3, r3, lsl #17
800b9e0: ea6f 4353 mvn.w r3, r3, lsr #17
800b9e4: b29a uxth r2, r3
800b9e6: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b9ea: 801a strh r2, [r3, #0]
800b9ec: e054 b.n 800ba98 <USB_EPStartXfer+0x12a0>
800b9ee: f507 7384 add.w r3, r7, #264 @ 0x108
800b9f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b9f6: 681b ldr r3, [r3, #0]
800b9f8: 691b ldr r3, [r3, #16]
800b9fa: 085b lsrs r3, r3, #1
800b9fc: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800ba00: f507 7384 add.w r3, r7, #264 @ 0x108
800ba04: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba08: 681b ldr r3, [r3, #0]
800ba0a: 691b ldr r3, [r3, #16]
800ba0c: f003 0301 and.w r3, r3, #1
800ba10: 2b00 cmp r3, #0
800ba12: d004 beq.n 800ba1e <USB_EPStartXfer+0x1226>
800ba14: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ba18: 3301 adds r3, #1
800ba1a: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800ba1e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ba22: 881b ldrh r3, [r3, #0]
800ba24: b29a uxth r2, r3
800ba26: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ba2a: b29b uxth r3, r3
800ba2c: 029b lsls r3, r3, #10
800ba2e: b29b uxth r3, r3
800ba30: 4313 orrs r3, r2
800ba32: b29a uxth r2, r3
800ba34: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ba38: 801a strh r2, [r3, #0]
800ba3a: e02d b.n 800ba98 <USB_EPStartXfer+0x12a0>
800ba3c: f507 7384 add.w r3, r7, #264 @ 0x108
800ba40: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba44: 681b ldr r3, [r3, #0]
800ba46: 785b ldrb r3, [r3, #1]
800ba48: 2b01 cmp r3, #1
800ba4a: d125 bne.n 800ba98 <USB_EPStartXfer+0x12a0>
800ba4c: f507 7384 add.w r3, r7, #264 @ 0x108
800ba50: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ba54: 681b ldr r3, [r3, #0]
800ba56: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ba5a: b29b uxth r3, r3
800ba5c: 461a mov r2, r3
800ba5e: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800ba62: 4413 add r3, r2
800ba64: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800ba68: f507 7384 add.w r3, r7, #264 @ 0x108
800ba6c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba70: 681b ldr r3, [r3, #0]
800ba72: 781b ldrb r3, [r3, #0]
800ba74: 011a lsls r2, r3, #4
800ba76: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800ba7a: 4413 add r3, r2
800ba7c: f203 430c addw r3, r3, #1036 @ 0x40c
800ba80: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
800ba84: f507 7384 add.w r3, r7, #264 @ 0x108
800ba88: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba8c: 681b ldr r3, [r3, #0]
800ba8e: 691b ldr r3, [r3, #16]
800ba90: b29a uxth r2, r3
800ba92: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800ba96: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
800ba98: f507 7384 add.w r3, r7, #264 @ 0x108
800ba9c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800baa0: 681b ldr r3, [r3, #0]
800baa2: 69db ldr r3, [r3, #28]
800baa4: 2b00 cmp r3, #0
800baa6: f000 8218 beq.w 800beda <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800baaa: f507 7384 add.w r3, r7, #264 @ 0x108
800baae: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bab2: 681a ldr r2, [r3, #0]
800bab4: f507 7384 add.w r3, r7, #264 @ 0x108
800bab8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800babc: 681b ldr r3, [r3, #0]
800babe: 781b ldrb r3, [r3, #0]
800bac0: 009b lsls r3, r3, #2
800bac2: 4413 add r3, r2
800bac4: 881b ldrh r3, [r3, #0]
800bac6: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800baca: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800bace: f403 4380 and.w r3, r3, #16384 @ 0x4000
800bad2: 2b00 cmp r3, #0
800bad4: d005 beq.n 800bae2 <USB_EPStartXfer+0x12ea>
800bad6: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800bada: f003 0340 and.w r3, r3, #64 @ 0x40
800bade: 2b00 cmp r3, #0
800bae0: d10d bne.n 800bafe <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800bae2: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800bae6: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800baea: 2b00 cmp r3, #0
800baec: f040 81f5 bne.w 800beda <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800baf0: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800baf4: f003 0340 and.w r3, r3, #64 @ 0x40
800baf8: 2b00 cmp r3, #0
800bafa: f040 81ee bne.w 800beda <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
800bafe: f507 7384 add.w r3, r7, #264 @ 0x108
800bb02: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bb06: 681a ldr r2, [r3, #0]
800bb08: f507 7384 add.w r3, r7, #264 @ 0x108
800bb0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb10: 681b ldr r3, [r3, #0]
800bb12: 781b ldrb r3, [r3, #0]
800bb14: 009b lsls r3, r3, #2
800bb16: 4413 add r3, r2
800bb18: 881b ldrh r3, [r3, #0]
800bb1a: b29b uxth r3, r3
800bb1c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800bb20: f023 0370 bic.w r3, r3, #112 @ 0x70
800bb24: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
800bb28: f507 7384 add.w r3, r7, #264 @ 0x108
800bb2c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bb30: 681a ldr r2, [r3, #0]
800bb32: f507 7384 add.w r3, r7, #264 @ 0x108
800bb36: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb3a: 681b ldr r3, [r3, #0]
800bb3c: 781b ldrb r3, [r3, #0]
800bb3e: 009b lsls r3, r3, #2
800bb40: 441a add r2, r3
800bb42: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
800bb46: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bb4a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bb4e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bb52: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800bb56: b29b uxth r3, r3
800bb58: 8013 strh r3, [r2, #0]
800bb5a: e1be b.n 800beda <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800bb5c: f507 7384 add.w r3, r7, #264 @ 0x108
800bb60: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb64: 681b ldr r3, [r3, #0]
800bb66: 78db ldrb r3, [r3, #3]
800bb68: 2b01 cmp r3, #1
800bb6a: f040 81b4 bne.w 800bed6 <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800bb6e: f507 7384 add.w r3, r7, #264 @ 0x108
800bb72: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb76: 681b ldr r3, [r3, #0]
800bb78: 699a ldr r2, [r3, #24]
800bb7a: f507 7384 add.w r3, r7, #264 @ 0x108
800bb7e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb82: 681b ldr r3, [r3, #0]
800bb84: 691b ldr r3, [r3, #16]
800bb86: 429a cmp r2, r3
800bb88: d917 bls.n 800bbba <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800bb8a: f507 7384 add.w r3, r7, #264 @ 0x108
800bb8e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb92: 681b ldr r3, [r3, #0]
800bb94: 691b ldr r3, [r3, #16]
800bb96: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800bb9a: f507 7384 add.w r3, r7, #264 @ 0x108
800bb9e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bba2: 681b ldr r3, [r3, #0]
800bba4: 699a ldr r2, [r3, #24]
800bba6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bbaa: 1ad2 subs r2, r2, r3
800bbac: f507 7384 add.w r3, r7, #264 @ 0x108
800bbb0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bbb4: 681b ldr r3, [r3, #0]
800bbb6: 619a str r2, [r3, #24]
800bbb8: e00e b.n 800bbd8 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
800bbba: f507 7384 add.w r3, r7, #264 @ 0x108
800bbbe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bbc2: 681b ldr r3, [r3, #0]
800bbc4: 699b ldr r3, [r3, #24]
800bbc6: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800bbca: f507 7384 add.w r3, r7, #264 @ 0x108
800bbce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bbd2: 681b ldr r3, [r3, #0]
800bbd4: 2200 movs r2, #0
800bbd6: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
800bbd8: f507 7384 add.w r3, r7, #264 @ 0x108
800bbdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bbe0: 681b ldr r3, [r3, #0]
800bbe2: 785b ldrb r3, [r3, #1]
800bbe4: 2b00 cmp r3, #0
800bbe6: f040 8085 bne.w 800bcf4 <USB_EPStartXfer+0x14fc>
800bbea: f507 7384 add.w r3, r7, #264 @ 0x108
800bbee: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bbf2: 681b ldr r3, [r3, #0]
800bbf4: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bbf8: f507 7384 add.w r3, r7, #264 @ 0x108
800bbfc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc00: 681b ldr r3, [r3, #0]
800bc02: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bc06: b29b uxth r3, r3
800bc08: 461a mov r2, r3
800bc0a: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800bc0e: 4413 add r3, r2
800bc10: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bc14: f507 7384 add.w r3, r7, #264 @ 0x108
800bc18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc1c: 681b ldr r3, [r3, #0]
800bc1e: 781b ldrb r3, [r3, #0]
800bc20: 011a lsls r2, r3, #4
800bc22: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800bc26: 4413 add r3, r2
800bc28: f203 4304 addw r3, r3, #1028 @ 0x404
800bc2c: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800bc30: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc34: 881b ldrh r3, [r3, #0]
800bc36: b29b uxth r3, r3
800bc38: f3c3 0309 ubfx r3, r3, #0, #10
800bc3c: b29a uxth r2, r3
800bc3e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc42: 801a strh r2, [r3, #0]
800bc44: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc48: 2b3e cmp r3, #62 @ 0x3e
800bc4a: d923 bls.n 800bc94 <USB_EPStartXfer+0x149c>
800bc4c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc50: 095b lsrs r3, r3, #5
800bc52: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bc56: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc5a: f003 031f and.w r3, r3, #31
800bc5e: 2b00 cmp r3, #0
800bc60: d104 bne.n 800bc6c <USB_EPStartXfer+0x1474>
800bc62: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bc66: 3b01 subs r3, #1
800bc68: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bc6c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc70: 881b ldrh r3, [r3, #0]
800bc72: b29a uxth r2, r3
800bc74: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bc78: b29b uxth r3, r3
800bc7a: 029b lsls r3, r3, #10
800bc7c: b29b uxth r3, r3
800bc7e: 4313 orrs r3, r2
800bc80: b29b uxth r3, r3
800bc82: ea6f 4343 mvn.w r3, r3, lsl #17
800bc86: ea6f 4353 mvn.w r3, r3, lsr #17
800bc8a: b29a uxth r2, r3
800bc8c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc90: 801a strh r2, [r3, #0]
800bc92: e060 b.n 800bd56 <USB_EPStartXfer+0x155e>
800bc94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc98: 2b00 cmp r3, #0
800bc9a: d10c bne.n 800bcb6 <USB_EPStartXfer+0x14be>
800bc9c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bca0: 881b ldrh r3, [r3, #0]
800bca2: b29b uxth r3, r3
800bca4: ea6f 4343 mvn.w r3, r3, lsl #17
800bca8: ea6f 4353 mvn.w r3, r3, lsr #17
800bcac: b29a uxth r2, r3
800bcae: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bcb2: 801a strh r2, [r3, #0]
800bcb4: e04f b.n 800bd56 <USB_EPStartXfer+0x155e>
800bcb6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bcba: 085b lsrs r3, r3, #1
800bcbc: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bcc0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bcc4: f003 0301 and.w r3, r3, #1
800bcc8: 2b00 cmp r3, #0
800bcca: d004 beq.n 800bcd6 <USB_EPStartXfer+0x14de>
800bccc: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bcd0: 3301 adds r3, #1
800bcd2: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bcd6: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bcda: 881b ldrh r3, [r3, #0]
800bcdc: b29a uxth r2, r3
800bcde: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bce2: b29b uxth r3, r3
800bce4: 029b lsls r3, r3, #10
800bce6: b29b uxth r3, r3
800bce8: 4313 orrs r3, r2
800bcea: b29a uxth r2, r3
800bcec: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bcf0: 801a strh r2, [r3, #0]
800bcf2: e030 b.n 800bd56 <USB_EPStartXfer+0x155e>
800bcf4: f507 7384 add.w r3, r7, #264 @ 0x108
800bcf8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bcfc: 681b ldr r3, [r3, #0]
800bcfe: 785b ldrb r3, [r3, #1]
800bd00: 2b01 cmp r3, #1
800bd02: d128 bne.n 800bd56 <USB_EPStartXfer+0x155e>
800bd04: f507 7384 add.w r3, r7, #264 @ 0x108
800bd08: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bd0c: 681b ldr r3, [r3, #0]
800bd0e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800bd12: f507 7384 add.w r3, r7, #264 @ 0x108
800bd16: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bd1a: 681b ldr r3, [r3, #0]
800bd1c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bd20: b29b uxth r3, r3
800bd22: 461a mov r2, r3
800bd24: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800bd28: 4413 add r3, r2
800bd2a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800bd2e: f507 7384 add.w r3, r7, #264 @ 0x108
800bd32: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bd36: 681b ldr r3, [r3, #0]
800bd38: 781b ldrb r3, [r3, #0]
800bd3a: 011a lsls r2, r3, #4
800bd3c: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800bd40: 4413 add r3, r2
800bd42: f203 4304 addw r3, r3, #1028 @ 0x404
800bd46: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800bd4a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd4e: b29a uxth r2, r3
800bd50: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
800bd54: 801a strh r2, [r3, #0]
800bd56: f507 7384 add.w r3, r7, #264 @ 0x108
800bd5a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bd5e: 681b ldr r3, [r3, #0]
800bd60: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800bd64: f507 7384 add.w r3, r7, #264 @ 0x108
800bd68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bd6c: 681b ldr r3, [r3, #0]
800bd6e: 785b ldrb r3, [r3, #1]
800bd70: 2b00 cmp r3, #0
800bd72: f040 8085 bne.w 800be80 <USB_EPStartXfer+0x1688>
800bd76: f507 7384 add.w r3, r7, #264 @ 0x108
800bd7a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bd7e: 681b ldr r3, [r3, #0]
800bd80: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800bd84: f507 7384 add.w r3, r7, #264 @ 0x108
800bd88: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bd8c: 681b ldr r3, [r3, #0]
800bd8e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bd92: b29b uxth r3, r3
800bd94: 461a mov r2, r3
800bd96: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800bd9a: 4413 add r3, r2
800bd9c: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800bda0: f507 7384 add.w r3, r7, #264 @ 0x108
800bda4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bda8: 681b ldr r3, [r3, #0]
800bdaa: 781b ldrb r3, [r3, #0]
800bdac: 011a lsls r2, r3, #4
800bdae: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800bdb2: 4413 add r3, r2
800bdb4: f203 430c addw r3, r3, #1036 @ 0x40c
800bdb8: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800bdbc: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bdc0: 881b ldrh r3, [r3, #0]
800bdc2: b29b uxth r3, r3
800bdc4: f3c3 0309 ubfx r3, r3, #0, #10
800bdc8: b29a uxth r2, r3
800bdca: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bdce: 801a strh r2, [r3, #0]
800bdd0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bdd4: 2b3e cmp r3, #62 @ 0x3e
800bdd6: d923 bls.n 800be20 <USB_EPStartXfer+0x1628>
800bdd8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bddc: 095b lsrs r3, r3, #5
800bdde: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bde2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bde6: f003 031f and.w r3, r3, #31
800bdea: 2b00 cmp r3, #0
800bdec: d104 bne.n 800bdf8 <USB_EPStartXfer+0x1600>
800bdee: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bdf2: 3b01 subs r3, #1
800bdf4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bdf8: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bdfc: 881b ldrh r3, [r3, #0]
800bdfe: b29a uxth r2, r3
800be00: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800be04: b29b uxth r3, r3
800be06: 029b lsls r3, r3, #10
800be08: b29b uxth r3, r3
800be0a: 4313 orrs r3, r2
800be0c: b29b uxth r3, r3
800be0e: ea6f 4343 mvn.w r3, r3, lsl #17
800be12: ea6f 4353 mvn.w r3, r3, lsr #17
800be16: b29a uxth r2, r3
800be18: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be1c: 801a strh r2, [r3, #0]
800be1e: e05c b.n 800beda <USB_EPStartXfer+0x16e2>
800be20: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800be24: 2b00 cmp r3, #0
800be26: d10c bne.n 800be42 <USB_EPStartXfer+0x164a>
800be28: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be2c: 881b ldrh r3, [r3, #0]
800be2e: b29b uxth r3, r3
800be30: ea6f 4343 mvn.w r3, r3, lsl #17
800be34: ea6f 4353 mvn.w r3, r3, lsr #17
800be38: b29a uxth r2, r3
800be3a: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be3e: 801a strh r2, [r3, #0]
800be40: e04b b.n 800beda <USB_EPStartXfer+0x16e2>
800be42: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800be46: 085b lsrs r3, r3, #1
800be48: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800be4c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800be50: f003 0301 and.w r3, r3, #1
800be54: 2b00 cmp r3, #0
800be56: d004 beq.n 800be62 <USB_EPStartXfer+0x166a>
800be58: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800be5c: 3301 adds r3, #1
800be5e: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800be62: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be66: 881b ldrh r3, [r3, #0]
800be68: b29a uxth r2, r3
800be6a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800be6e: b29b uxth r3, r3
800be70: 029b lsls r3, r3, #10
800be72: b29b uxth r3, r3
800be74: 4313 orrs r3, r2
800be76: b29a uxth r2, r3
800be78: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be7c: 801a strh r2, [r3, #0]
800be7e: e02c b.n 800beda <USB_EPStartXfer+0x16e2>
800be80: f507 7384 add.w r3, r7, #264 @ 0x108
800be84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800be88: 681b ldr r3, [r3, #0]
800be8a: 785b ldrb r3, [r3, #1]
800be8c: 2b01 cmp r3, #1
800be8e: d124 bne.n 800beda <USB_EPStartXfer+0x16e2>
800be90: f507 7384 add.w r3, r7, #264 @ 0x108
800be94: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800be98: 681b ldr r3, [r3, #0]
800be9a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800be9e: b29b uxth r3, r3
800bea0: 461a mov r2, r3
800bea2: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800bea6: 4413 add r3, r2
800bea8: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800beac: f507 7384 add.w r3, r7, #264 @ 0x108
800beb0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800beb4: 681b ldr r3, [r3, #0]
800beb6: 781b ldrb r3, [r3, #0]
800beb8: 011a lsls r2, r3, #4
800beba: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800bebe: 4413 add r3, r2
800bec0: f203 430c addw r3, r3, #1036 @ 0x40c
800bec4: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800bec8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800becc: b29a uxth r2, r3
800bece: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800bed2: 801a strh r2, [r3, #0]
800bed4: e001 b.n 800beda <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
800bed6: 2301 movs r3, #1
800bed8: e03a b.n 800bf50 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800beda: f507 7384 add.w r3, r7, #264 @ 0x108
800bede: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bee2: 681a ldr r2, [r3, #0]
800bee4: f507 7384 add.w r3, r7, #264 @ 0x108
800bee8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800beec: 681b ldr r3, [r3, #0]
800beee: 781b ldrb r3, [r3, #0]
800bef0: 009b lsls r3, r3, #2
800bef2: 4413 add r3, r2
800bef4: 881b ldrh r3, [r3, #0]
800bef6: b29b uxth r3, r3
800bef8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800befc: f023 0370 bic.w r3, r3, #112 @ 0x70
800bf00: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800bf04: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800bf08: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800bf0c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800bf10: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800bf14: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800bf18: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800bf1c: f507 7384 add.w r3, r7, #264 @ 0x108
800bf20: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bf24: 681a ldr r2, [r3, #0]
800bf26: f507 7384 add.w r3, r7, #264 @ 0x108
800bf2a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bf2e: 681b ldr r3, [r3, #0]
800bf30: 781b ldrb r3, [r3, #0]
800bf32: 009b lsls r3, r3, #2
800bf34: 441a add r2, r3
800bf36: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800bf3a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bf3e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bf42: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bf46: f043 0380 orr.w r3, r3, #128 @ 0x80
800bf4a: b29b uxth r3, r3
800bf4c: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800bf4e: 2300 movs r3, #0
}
800bf50: 4618 mov r0, r3
800bf52: f507 7784 add.w r7, r7, #264 @ 0x108
800bf56: 46bd mov sp, r7
800bf58: bd80 pop {r7, pc}
0800bf5a <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800bf5a: b480 push {r7}
800bf5c: b085 sub sp, #20
800bf5e: af00 add r7, sp, #0
800bf60: 6078 str r0, [r7, #4]
800bf62: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800bf64: 683b ldr r3, [r7, #0]
800bf66: 785b ldrb r3, [r3, #1]
800bf68: 2b00 cmp r3, #0
800bf6a: d020 beq.n 800bfae <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800bf6c: 687a ldr r2, [r7, #4]
800bf6e: 683b ldr r3, [r7, #0]
800bf70: 781b ldrb r3, [r3, #0]
800bf72: 009b lsls r3, r3, #2
800bf74: 4413 add r3, r2
800bf76: 881b ldrh r3, [r3, #0]
800bf78: b29b uxth r3, r3
800bf7a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800bf7e: f023 0340 bic.w r3, r3, #64 @ 0x40
800bf82: 81bb strh r3, [r7, #12]
800bf84: 89bb ldrh r3, [r7, #12]
800bf86: f083 0310 eor.w r3, r3, #16
800bf8a: 81bb strh r3, [r7, #12]
800bf8c: 687a ldr r2, [r7, #4]
800bf8e: 683b ldr r3, [r7, #0]
800bf90: 781b ldrb r3, [r3, #0]
800bf92: 009b lsls r3, r3, #2
800bf94: 441a add r2, r3
800bf96: 89bb ldrh r3, [r7, #12]
800bf98: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bf9c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bfa0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bfa4: f043 0380 orr.w r3, r3, #128 @ 0x80
800bfa8: b29b uxth r3, r3
800bfaa: 8013 strh r3, [r2, #0]
800bfac: e01f b.n 800bfee <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800bfae: 687a ldr r2, [r7, #4]
800bfb0: 683b ldr r3, [r7, #0]
800bfb2: 781b ldrb r3, [r3, #0]
800bfb4: 009b lsls r3, r3, #2
800bfb6: 4413 add r3, r2
800bfb8: 881b ldrh r3, [r3, #0]
800bfba: b29b uxth r3, r3
800bfbc: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800bfc0: f023 0370 bic.w r3, r3, #112 @ 0x70
800bfc4: 81fb strh r3, [r7, #14]
800bfc6: 89fb ldrh r3, [r7, #14]
800bfc8: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800bfcc: 81fb strh r3, [r7, #14]
800bfce: 687a ldr r2, [r7, #4]
800bfd0: 683b ldr r3, [r7, #0]
800bfd2: 781b ldrb r3, [r3, #0]
800bfd4: 009b lsls r3, r3, #2
800bfd6: 441a add r2, r3
800bfd8: 89fb ldrh r3, [r7, #14]
800bfda: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bfde: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bfe2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bfe6: f043 0380 orr.w r3, r3, #128 @ 0x80
800bfea: b29b uxth r3, r3
800bfec: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800bfee: 2300 movs r3, #0
}
800bff0: 4618 mov r0, r3
800bff2: 3714 adds r7, #20
800bff4: 46bd mov sp, r7
800bff6: bc80 pop {r7}
800bff8: 4770 bx lr
0800bffa <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800bffa: b480 push {r7}
800bffc: b087 sub sp, #28
800bffe: af00 add r7, sp, #0
800c000: 6078 str r0, [r7, #4]
800c002: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800c004: 683b ldr r3, [r7, #0]
800c006: 7b1b ldrb r3, [r3, #12]
800c008: 2b00 cmp r3, #0
800c00a: f040 809d bne.w 800c148 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800c00e: 683b ldr r3, [r7, #0]
800c010: 785b ldrb r3, [r3, #1]
800c012: 2b00 cmp r3, #0
800c014: d04c beq.n 800c0b0 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800c016: 687a ldr r2, [r7, #4]
800c018: 683b ldr r3, [r7, #0]
800c01a: 781b ldrb r3, [r3, #0]
800c01c: 009b lsls r3, r3, #2
800c01e: 4413 add r3, r2
800c020: 881b ldrh r3, [r3, #0]
800c022: 823b strh r3, [r7, #16]
800c024: 8a3b ldrh r3, [r7, #16]
800c026: f003 0340 and.w r3, r3, #64 @ 0x40
800c02a: 2b00 cmp r3, #0
800c02c: d01b beq.n 800c066 <USB_EPClearStall+0x6c>
800c02e: 687a ldr r2, [r7, #4]
800c030: 683b ldr r3, [r7, #0]
800c032: 781b ldrb r3, [r3, #0]
800c034: 009b lsls r3, r3, #2
800c036: 4413 add r3, r2
800c038: 881b ldrh r3, [r3, #0]
800c03a: b29b uxth r3, r3
800c03c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c040: f023 0370 bic.w r3, r3, #112 @ 0x70
800c044: 81fb strh r3, [r7, #14]
800c046: 687a ldr r2, [r7, #4]
800c048: 683b ldr r3, [r7, #0]
800c04a: 781b ldrb r3, [r3, #0]
800c04c: 009b lsls r3, r3, #2
800c04e: 441a add r2, r3
800c050: 89fb ldrh r3, [r7, #14]
800c052: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c056: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c05a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c05e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800c062: b29b uxth r3, r3
800c064: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800c066: 683b ldr r3, [r7, #0]
800c068: 78db ldrb r3, [r3, #3]
800c06a: 2b01 cmp r3, #1
800c06c: d06c beq.n 800c148 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800c06e: 687a ldr r2, [r7, #4]
800c070: 683b ldr r3, [r7, #0]
800c072: 781b ldrb r3, [r3, #0]
800c074: 009b lsls r3, r3, #2
800c076: 4413 add r3, r2
800c078: 881b ldrh r3, [r3, #0]
800c07a: b29b uxth r3, r3
800c07c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c080: f023 0340 bic.w r3, r3, #64 @ 0x40
800c084: 81bb strh r3, [r7, #12]
800c086: 89bb ldrh r3, [r7, #12]
800c088: f083 0320 eor.w r3, r3, #32
800c08c: 81bb strh r3, [r7, #12]
800c08e: 687a ldr r2, [r7, #4]
800c090: 683b ldr r3, [r7, #0]
800c092: 781b ldrb r3, [r3, #0]
800c094: 009b lsls r3, r3, #2
800c096: 441a add r2, r3
800c098: 89bb ldrh r3, [r7, #12]
800c09a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c09e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c0a2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c0a6: f043 0380 orr.w r3, r3, #128 @ 0x80
800c0aa: b29b uxth r3, r3
800c0ac: 8013 strh r3, [r2, #0]
800c0ae: e04b b.n 800c148 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800c0b0: 687a ldr r2, [r7, #4]
800c0b2: 683b ldr r3, [r7, #0]
800c0b4: 781b ldrb r3, [r3, #0]
800c0b6: 009b lsls r3, r3, #2
800c0b8: 4413 add r3, r2
800c0ba: 881b ldrh r3, [r3, #0]
800c0bc: 82fb strh r3, [r7, #22]
800c0be: 8afb ldrh r3, [r7, #22]
800c0c0: f403 4380 and.w r3, r3, #16384 @ 0x4000
800c0c4: 2b00 cmp r3, #0
800c0c6: d01b beq.n 800c100 <USB_EPClearStall+0x106>
800c0c8: 687a ldr r2, [r7, #4]
800c0ca: 683b ldr r3, [r7, #0]
800c0cc: 781b ldrb r3, [r3, #0]
800c0ce: 009b lsls r3, r3, #2
800c0d0: 4413 add r3, r2
800c0d2: 881b ldrh r3, [r3, #0]
800c0d4: b29b uxth r3, r3
800c0d6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c0da: f023 0370 bic.w r3, r3, #112 @ 0x70
800c0de: 82bb strh r3, [r7, #20]
800c0e0: 687a ldr r2, [r7, #4]
800c0e2: 683b ldr r3, [r7, #0]
800c0e4: 781b ldrb r3, [r3, #0]
800c0e6: 009b lsls r3, r3, #2
800c0e8: 441a add r2, r3
800c0ea: 8abb ldrh r3, [r7, #20]
800c0ec: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c0f0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c0f4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800c0f8: f043 0380 orr.w r3, r3, #128 @ 0x80
800c0fc: b29b uxth r3, r3
800c0fe: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800c100: 687a ldr r2, [r7, #4]
800c102: 683b ldr r3, [r7, #0]
800c104: 781b ldrb r3, [r3, #0]
800c106: 009b lsls r3, r3, #2
800c108: 4413 add r3, r2
800c10a: 881b ldrh r3, [r3, #0]
800c10c: b29b uxth r3, r3
800c10e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800c112: f023 0370 bic.w r3, r3, #112 @ 0x70
800c116: 827b strh r3, [r7, #18]
800c118: 8a7b ldrh r3, [r7, #18]
800c11a: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800c11e: 827b strh r3, [r7, #18]
800c120: 8a7b ldrh r3, [r7, #18]
800c122: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800c126: 827b strh r3, [r7, #18]
800c128: 687a ldr r2, [r7, #4]
800c12a: 683b ldr r3, [r7, #0]
800c12c: 781b ldrb r3, [r3, #0]
800c12e: 009b lsls r3, r3, #2
800c130: 441a add r2, r3
800c132: 8a7b ldrh r3, [r7, #18]
800c134: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c138: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c13c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c140: f043 0380 orr.w r3, r3, #128 @ 0x80
800c144: b29b uxth r3, r3
800c146: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800c148: 2300 movs r3, #0
}
800c14a: 4618 mov r0, r3
800c14c: 371c adds r7, #28
800c14e: 46bd mov sp, r7
800c150: bc80 pop {r7}
800c152: 4770 bx lr
0800c154 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800c154: b480 push {r7}
800c156: b083 sub sp, #12
800c158: af00 add r7, sp, #0
800c15a: 6078 str r0, [r7, #4]
800c15c: 460b mov r3, r1
800c15e: 70fb strb r3, [r7, #3]
if (address == 0U)
800c160: 78fb ldrb r3, [r7, #3]
800c162: 2b00 cmp r3, #0
800c164: d103 bne.n 800c16e <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800c166: 687b ldr r3, [r7, #4]
800c168: 2280 movs r2, #128 @ 0x80
800c16a: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800c16e: 2300 movs r3, #0
}
800c170: 4618 mov r0, r3
800c172: 370c adds r7, #12
800c174: 46bd mov sp, r7
800c176: bc80 pop {r7}
800c178: 4770 bx lr
0800c17a <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800c17a: b480 push {r7}
800c17c: b083 sub sp, #12
800c17e: af00 add r7, sp, #0
800c180: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c182: 2300 movs r3, #0
}
800c184: 4618 mov r0, r3
800c186: 370c adds r7, #12
800c188: 46bd mov sp, r7
800c18a: bc80 pop {r7}
800c18c: 4770 bx lr
0800c18e <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800c18e: b480 push {r7}
800c190: b083 sub sp, #12
800c192: af00 add r7, sp, #0
800c194: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c196: 2300 movs r3, #0
}
800c198: 4618 mov r0, r3
800c19a: 370c adds r7, #12
800c19c: 46bd mov sp, r7
800c19e: bc80 pop {r7}
800c1a0: 4770 bx lr
0800c1a2 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800c1a2: b480 push {r7}
800c1a4: b085 sub sp, #20
800c1a6: af00 add r7, sp, #0
800c1a8: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800c1aa: 687b ldr r3, [r7, #4]
800c1ac: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800c1b0: b29b uxth r3, r3
800c1b2: 60fb str r3, [r7, #12]
return tmpreg;
800c1b4: 68fb ldr r3, [r7, #12]
}
800c1b6: 4618 mov r0, r3
800c1b8: 3714 adds r7, #20
800c1ba: 46bd mov sp, r7
800c1bc: bc80 pop {r7}
800c1be: 4770 bx lr
0800c1c0 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800c1c0: b480 push {r7}
800c1c2: b083 sub sp, #12
800c1c4: af00 add r7, sp, #0
800c1c6: 6078 str r0, [r7, #4]
800c1c8: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c1ca: 2300 movs r3, #0
}
800c1cc: 4618 mov r0, r3
800c1ce: 370c adds r7, #12
800c1d0: 46bd mov sp, r7
800c1d2: bc80 pop {r7}
800c1d4: 4770 bx lr
0800c1d6 <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800c1d6: b480 push {r7}
800c1d8: b08b sub sp, #44 @ 0x2c
800c1da: af00 add r7, sp, #0
800c1dc: 60f8 str r0, [r7, #12]
800c1de: 60b9 str r1, [r7, #8]
800c1e0: 4611 mov r1, r2
800c1e2: 461a mov r2, r3
800c1e4: 460b mov r3, r1
800c1e6: 80fb strh r3, [r7, #6]
800c1e8: 4613 mov r3, r2
800c1ea: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800c1ec: 88bb ldrh r3, [r7, #4]
800c1ee: 3301 adds r3, #1
800c1f0: 085b lsrs r3, r3, #1
800c1f2: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800c1f4: 68fb ldr r3, [r7, #12]
800c1f6: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800c1f8: 68bb ldr r3, [r7, #8]
800c1fa: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800c1fc: 88fb ldrh r3, [r7, #6]
800c1fe: 005a lsls r2, r3, #1
800c200: 697b ldr r3, [r7, #20]
800c202: 4413 add r3, r2
800c204: f503 6380 add.w r3, r3, #1024 @ 0x400
800c208: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c20a: 69bb ldr r3, [r7, #24]
800c20c: 627b str r3, [r7, #36] @ 0x24
800c20e: e01f b.n 800c250 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
800c210: 69fb ldr r3, [r7, #28]
800c212: 781b ldrb r3, [r3, #0]
800c214: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800c216: 69fb ldr r3, [r7, #28]
800c218: 3301 adds r3, #1
800c21a: 781b ldrb r3, [r3, #0]
800c21c: b21b sxth r3, r3
800c21e: 021b lsls r3, r3, #8
800c220: b21a sxth r2, r3
800c222: f9b7 3012 ldrsh.w r3, [r7, #18]
800c226: 4313 orrs r3, r2
800c228: b21b sxth r3, r3
800c22a: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
800c22c: 6a3b ldr r3, [r7, #32]
800c22e: 8a7a ldrh r2, [r7, #18]
800c230: 801a strh r2, [r3, #0]
pdwVal++;
800c232: 6a3b ldr r3, [r7, #32]
800c234: 3302 adds r3, #2
800c236: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
800c238: 6a3b ldr r3, [r7, #32]
800c23a: 3302 adds r3, #2
800c23c: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800c23e: 69fb ldr r3, [r7, #28]
800c240: 3301 adds r3, #1
800c242: 61fb str r3, [r7, #28]
pBuf++;
800c244: 69fb ldr r3, [r7, #28]
800c246: 3301 adds r3, #1
800c248: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
800c24a: 6a7b ldr r3, [r7, #36] @ 0x24
800c24c: 3b01 subs r3, #1
800c24e: 627b str r3, [r7, #36] @ 0x24
800c250: 6a7b ldr r3, [r7, #36] @ 0x24
800c252: 2b00 cmp r3, #0
800c254: d1dc bne.n 800c210 <USB_WritePMA+0x3a>
}
}
800c256: bf00 nop
800c258: bf00 nop
800c25a: 372c adds r7, #44 @ 0x2c
800c25c: 46bd mov sp, r7
800c25e: bc80 pop {r7}
800c260: 4770 bx lr
0800c262 <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800c262: b480 push {r7}
800c264: b08b sub sp, #44 @ 0x2c
800c266: af00 add r7, sp, #0
800c268: 60f8 str r0, [r7, #12]
800c26a: 60b9 str r1, [r7, #8]
800c26c: 4611 mov r1, r2
800c26e: 461a mov r2, r3
800c270: 460b mov r3, r1
800c272: 80fb strh r3, [r7, #6]
800c274: 4613 mov r3, r2
800c276: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
800c278: 88bb ldrh r3, [r7, #4]
800c27a: 085b lsrs r3, r3, #1
800c27c: b29b uxth r3, r3
800c27e: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800c280: 68fb ldr r3, [r7, #12]
800c282: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800c284: 68bb ldr r3, [r7, #8]
800c286: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800c288: 88fb ldrh r3, [r7, #6]
800c28a: 005a lsls r2, r3, #1
800c28c: 697b ldr r3, [r7, #20]
800c28e: 4413 add r3, r2
800c290: f503 6380 add.w r3, r3, #1024 @ 0x400
800c294: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c296: 69bb ldr r3, [r7, #24]
800c298: 627b str r3, [r7, #36] @ 0x24
800c29a: e01b b.n 800c2d4 <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800c29c: 6a3b ldr r3, [r7, #32]
800c29e: 881b ldrh r3, [r3, #0]
800c2a0: b29b uxth r3, r3
800c2a2: 613b str r3, [r7, #16]
pdwVal++;
800c2a4: 6a3b ldr r3, [r7, #32]
800c2a6: 3302 adds r3, #2
800c2a8: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800c2aa: 693b ldr r3, [r7, #16]
800c2ac: b2da uxtb r2, r3
800c2ae: 69fb ldr r3, [r7, #28]
800c2b0: 701a strb r2, [r3, #0]
pBuf++;
800c2b2: 69fb ldr r3, [r7, #28]
800c2b4: 3301 adds r3, #1
800c2b6: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
800c2b8: 693b ldr r3, [r7, #16]
800c2ba: 0a1b lsrs r3, r3, #8
800c2bc: b2da uxtb r2, r3
800c2be: 69fb ldr r3, [r7, #28]
800c2c0: 701a strb r2, [r3, #0]
pBuf++;
800c2c2: 69fb ldr r3, [r7, #28]
800c2c4: 3301 adds r3, #1
800c2c6: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
800c2c8: 6a3b ldr r3, [r7, #32]
800c2ca: 3302 adds r3, #2
800c2cc: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c2ce: 6a7b ldr r3, [r7, #36] @ 0x24
800c2d0: 3b01 subs r3, #1
800c2d2: 627b str r3, [r7, #36] @ 0x24
800c2d4: 6a7b ldr r3, [r7, #36] @ 0x24
800c2d6: 2b00 cmp r3, #0
800c2d8: d1e0 bne.n 800c29c <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800c2da: 88bb ldrh r3, [r7, #4]
800c2dc: f003 0301 and.w r3, r3, #1
800c2e0: b29b uxth r3, r3
800c2e2: 2b00 cmp r3, #0
800c2e4: d007 beq.n 800c2f6 <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
800c2e6: 6a3b ldr r3, [r7, #32]
800c2e8: 881b ldrh r3, [r3, #0]
800c2ea: b29b uxth r3, r3
800c2ec: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800c2ee: 693b ldr r3, [r7, #16]
800c2f0: b2da uxtb r2, r3
800c2f2: 69fb ldr r3, [r7, #28]
800c2f4: 701a strb r2, [r3, #0]
}
}
800c2f6: bf00 nop
800c2f8: 372c adds r7, #44 @ 0x2c
800c2fa: 46bd mov sp, r7
800c2fc: bc80 pop {r7}
800c2fe: 4770 bx lr
0800c300 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c300: b580 push {r7, lr}
800c302: b084 sub sp, #16
800c304: af00 add r7, sp, #0
800c306: 6078 str r0, [r7, #4]
800c308: 460b mov r3, r1
800c30a: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800c30c: 2300 movs r3, #0
800c30e: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c310: 687b ldr r3, [r7, #4]
800c312: 7c1b ldrb r3, [r3, #16]
800c314: 2b00 cmp r3, #0
800c316: d115 bne.n 800c344 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800c318: f44f 7300 mov.w r3, #512 @ 0x200
800c31c: 2202 movs r2, #2
800c31e: 2181 movs r1, #129 @ 0x81
800c320: 6878 ldr r0, [r7, #4]
800c322: f001 ff00 bl 800e126 <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800c326: 687b ldr r3, [r7, #4]
800c328: 2201 movs r2, #1
800c32a: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800c32c: f44f 7300 mov.w r3, #512 @ 0x200
800c330: 2202 movs r2, #2
800c332: 2101 movs r1, #1
800c334: 6878 ldr r0, [r7, #4]
800c336: f001 fef6 bl 800e126 <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800c33a: 687b ldr r3, [r7, #4]
800c33c: 2201 movs r2, #1
800c33e: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800c342: e012 b.n 800c36a <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800c344: 2340 movs r3, #64 @ 0x40
800c346: 2202 movs r2, #2
800c348: 2181 movs r1, #129 @ 0x81
800c34a: 6878 ldr r0, [r7, #4]
800c34c: f001 feeb bl 800e126 <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800c350: 687b ldr r3, [r7, #4]
800c352: 2201 movs r2, #1
800c354: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800c356: 2340 movs r3, #64 @ 0x40
800c358: 2202 movs r2, #2
800c35a: 2101 movs r1, #1
800c35c: 6878 ldr r0, [r7, #4]
800c35e: f001 fee2 bl 800e126 <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800c362: 687b ldr r3, [r7, #4]
800c364: 2201 movs r2, #1
800c366: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800c36a: 2308 movs r3, #8
800c36c: 2203 movs r2, #3
800c36e: 2182 movs r1, #130 @ 0x82
800c370: 6878 ldr r0, [r7, #4]
800c372: f001 fed8 bl 800e126 <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800c376: 687b ldr r3, [r7, #4]
800c378: 2201 movs r2, #1
800c37a: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800c37c: f44f 7007 mov.w r0, #540 @ 0x21c
800c380: f001 fff8 bl 800e374 <USBD_static_malloc>
800c384: 4602 mov r2, r0
800c386: 687b ldr r3, [r7, #4]
800c388: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800c38c: 687b ldr r3, [r7, #4]
800c38e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c392: 2b00 cmp r3, #0
800c394: d102 bne.n 800c39c <USBD_CDC_Init+0x9c>
{
ret = 1U;
800c396: 2301 movs r3, #1
800c398: 73fb strb r3, [r7, #15]
800c39a: e026 b.n 800c3ea <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c39c: 687b ldr r3, [r7, #4]
800c39e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c3a2: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
800c3a4: 687b ldr r3, [r7, #4]
800c3a6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c3aa: 681b ldr r3, [r3, #0]
800c3ac: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800c3ae: 68bb ldr r3, [r7, #8]
800c3b0: 2200 movs r2, #0
800c3b2: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800c3b6: 68bb ldr r3, [r7, #8]
800c3b8: 2200 movs r2, #0
800c3ba: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c3be: 687b ldr r3, [r7, #4]
800c3c0: 7c1b ldrb r3, [r3, #16]
800c3c2: 2b00 cmp r3, #0
800c3c4: d109 bne.n 800c3da <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800c3c6: 68bb ldr r3, [r7, #8]
800c3c8: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c3cc: f44f 7300 mov.w r3, #512 @ 0x200
800c3d0: 2101 movs r1, #1
800c3d2: 6878 ldr r0, [r7, #4]
800c3d4: f001 ff97 bl 800e306 <USBD_LL_PrepareReceive>
800c3d8: e007 b.n 800c3ea <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800c3da: 68bb ldr r3, [r7, #8]
800c3dc: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c3e0: 2340 movs r3, #64 @ 0x40
800c3e2: 2101 movs r1, #1
800c3e4: 6878 ldr r0, [r7, #4]
800c3e6: f001 ff8e bl 800e306 <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800c3ea: 7bfb ldrb r3, [r7, #15]
}
800c3ec: 4618 mov r0, r3
800c3ee: 3710 adds r7, #16
800c3f0: 46bd mov sp, r7
800c3f2: bd80 pop {r7, pc}
0800c3f4 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c3f4: b580 push {r7, lr}
800c3f6: b084 sub sp, #16
800c3f8: af00 add r7, sp, #0
800c3fa: 6078 str r0, [r7, #4]
800c3fc: 460b mov r3, r1
800c3fe: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800c400: 2300 movs r3, #0
800c402: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800c404: 2181 movs r1, #129 @ 0x81
800c406: 6878 ldr r0, [r7, #4]
800c408: f001 feb3 bl 800e172 <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800c40c: 687b ldr r3, [r7, #4]
800c40e: 2200 movs r2, #0
800c410: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800c412: 2101 movs r1, #1
800c414: 6878 ldr r0, [r7, #4]
800c416: f001 feac bl 800e172 <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
800c41a: 687b ldr r3, [r7, #4]
800c41c: 2200 movs r2, #0
800c41e: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800c422: 2182 movs r1, #130 @ 0x82
800c424: 6878 ldr r0, [r7, #4]
800c426: f001 fea4 bl 800e172 <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
800c42a: 687b ldr r3, [r7, #4]
800c42c: 2200 movs r2, #0
800c42e: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
800c430: 687b ldr r3, [r7, #4]
800c432: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c436: 2b00 cmp r3, #0
800c438: d00e beq.n 800c458 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
800c43a: 687b ldr r3, [r7, #4]
800c43c: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c440: 685b ldr r3, [r3, #4]
800c442: 4798 blx r3
USBD_free(pdev->pClassData);
800c444: 687b ldr r3, [r7, #4]
800c446: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c44a: 4618 mov r0, r3
800c44c: f001 ff9e bl 800e38c <USBD_static_free>
pdev->pClassData = NULL;
800c450: 687b ldr r3, [r7, #4]
800c452: 2200 movs r2, #0
800c454: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800c458: 7bfb ldrb r3, [r7, #15]
}
800c45a: 4618 mov r0, r3
800c45c: 3710 adds r7, #16
800c45e: 46bd mov sp, r7
800c460: bd80 pop {r7, pc}
0800c462 <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c462: b580 push {r7, lr}
800c464: b086 sub sp, #24
800c466: af00 add r7, sp, #0
800c468: 6078 str r0, [r7, #4]
800c46a: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c46c: 687b ldr r3, [r7, #4]
800c46e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c472: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800c474: 2300 movs r3, #0
800c476: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800c478: 2300 movs r3, #0
800c47a: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800c47c: 2300 movs r3, #0
800c47e: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c480: 683b ldr r3, [r7, #0]
800c482: 781b ldrb r3, [r3, #0]
800c484: f003 0360 and.w r3, r3, #96 @ 0x60
800c488: 2b00 cmp r3, #0
800c48a: d039 beq.n 800c500 <USBD_CDC_Setup+0x9e>
800c48c: 2b20 cmp r3, #32
800c48e: d17f bne.n 800c590 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800c490: 683b ldr r3, [r7, #0]
800c492: 88db ldrh r3, [r3, #6]
800c494: 2b00 cmp r3, #0
800c496: d029 beq.n 800c4ec <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800c498: 683b ldr r3, [r7, #0]
800c49a: 781b ldrb r3, [r3, #0]
800c49c: b25b sxtb r3, r3
800c49e: 2b00 cmp r3, #0
800c4a0: da11 bge.n 800c4c6 <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c4a2: 687b ldr r3, [r7, #4]
800c4a4: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c4a8: 689b ldr r3, [r3, #8]
800c4aa: 683a ldr r2, [r7, #0]
800c4ac: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800c4ae: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c4b0: 683a ldr r2, [r7, #0]
800c4b2: 88d2 ldrh r2, [r2, #6]
800c4b4: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800c4b6: 6939 ldr r1, [r7, #16]
800c4b8: 683b ldr r3, [r7, #0]
800c4ba: 88db ldrh r3, [r3, #6]
800c4bc: 461a mov r2, r3
800c4be: 6878 ldr r0, [r7, #4]
800c4c0: f001 fa06 bl 800d8d0 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
800c4c4: e06b b.n 800c59e <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800c4c6: 683b ldr r3, [r7, #0]
800c4c8: 785a ldrb r2, [r3, #1]
800c4ca: 693b ldr r3, [r7, #16]
800c4cc: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800c4d0: 683b ldr r3, [r7, #0]
800c4d2: 88db ldrh r3, [r3, #6]
800c4d4: b2da uxtb r2, r3
800c4d6: 693b ldr r3, [r7, #16]
800c4d8: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800c4dc: 6939 ldr r1, [r7, #16]
800c4de: 683b ldr r3, [r7, #0]
800c4e0: 88db ldrh r3, [r3, #6]
800c4e2: 461a mov r2, r3
800c4e4: 6878 ldr r0, [r7, #4]
800c4e6: f001 fa21 bl 800d92c <USBD_CtlPrepareRx>
break;
800c4ea: e058 b.n 800c59e <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c4ec: 687b ldr r3, [r7, #4]
800c4ee: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c4f2: 689b ldr r3, [r3, #8]
800c4f4: 683a ldr r2, [r7, #0]
800c4f6: 7850 ldrb r0, [r2, #1]
800c4f8: 2200 movs r2, #0
800c4fa: 6839 ldr r1, [r7, #0]
800c4fc: 4798 blx r3
break;
800c4fe: e04e b.n 800c59e <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800c500: 683b ldr r3, [r7, #0]
800c502: 785b ldrb r3, [r3, #1]
800c504: 2b0b cmp r3, #11
800c506: d02e beq.n 800c566 <USBD_CDC_Setup+0x104>
800c508: 2b0b cmp r3, #11
800c50a: dc38 bgt.n 800c57e <USBD_CDC_Setup+0x11c>
800c50c: 2b00 cmp r3, #0
800c50e: d002 beq.n 800c516 <USBD_CDC_Setup+0xb4>
800c510: 2b0a cmp r3, #10
800c512: d014 beq.n 800c53e <USBD_CDC_Setup+0xdc>
800c514: e033 b.n 800c57e <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c516: 687b ldr r3, [r7, #4]
800c518: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c51c: 2b03 cmp r3, #3
800c51e: d107 bne.n 800c530 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
800c520: f107 030c add.w r3, r7, #12
800c524: 2202 movs r2, #2
800c526: 4619 mov r1, r3
800c528: 6878 ldr r0, [r7, #4]
800c52a: f001 f9d1 bl 800d8d0 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800c52e: e02e b.n 800c58e <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800c530: 6839 ldr r1, [r7, #0]
800c532: 6878 ldr r0, [r7, #4]
800c534: f001 f962 bl 800d7fc <USBD_CtlError>
ret = USBD_FAIL;
800c538: 2302 movs r3, #2
800c53a: 75fb strb r3, [r7, #23]
break;
800c53c: e027 b.n 800c58e <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c53e: 687b ldr r3, [r7, #4]
800c540: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c544: 2b03 cmp r3, #3
800c546: d107 bne.n 800c558 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800c548: f107 030f add.w r3, r7, #15
800c54c: 2201 movs r2, #1
800c54e: 4619 mov r1, r3
800c550: 6878 ldr r0, [r7, #4]
800c552: f001 f9bd bl 800d8d0 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800c556: e01a b.n 800c58e <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800c558: 6839 ldr r1, [r7, #0]
800c55a: 6878 ldr r0, [r7, #4]
800c55c: f001 f94e bl 800d7fc <USBD_CtlError>
ret = USBD_FAIL;
800c560: 2302 movs r3, #2
800c562: 75fb strb r3, [r7, #23]
break;
800c564: e013 b.n 800c58e <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800c566: 687b ldr r3, [r7, #4]
800c568: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c56c: 2b03 cmp r3, #3
800c56e: d00d beq.n 800c58c <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800c570: 6839 ldr r1, [r7, #0]
800c572: 6878 ldr r0, [r7, #4]
800c574: f001 f942 bl 800d7fc <USBD_CtlError>
ret = USBD_FAIL;
800c578: 2302 movs r3, #2
800c57a: 75fb strb r3, [r7, #23]
}
break;
800c57c: e006 b.n 800c58c <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800c57e: 6839 ldr r1, [r7, #0]
800c580: 6878 ldr r0, [r7, #4]
800c582: f001 f93b bl 800d7fc <USBD_CtlError>
ret = USBD_FAIL;
800c586: 2302 movs r3, #2
800c588: 75fb strb r3, [r7, #23]
break;
800c58a: e000 b.n 800c58e <USBD_CDC_Setup+0x12c>
break;
800c58c: bf00 nop
}
break;
800c58e: e006 b.n 800c59e <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800c590: 6839 ldr r1, [r7, #0]
800c592: 6878 ldr r0, [r7, #4]
800c594: f001 f932 bl 800d7fc <USBD_CtlError>
ret = USBD_FAIL;
800c598: 2302 movs r3, #2
800c59a: 75fb strb r3, [r7, #23]
break;
800c59c: bf00 nop
}
return ret;
800c59e: 7dfb ldrb r3, [r7, #23]
}
800c5a0: 4618 mov r0, r3
800c5a2: 3718 adds r7, #24
800c5a4: 46bd mov sp, r7
800c5a6: bd80 pop {r7, pc}
0800c5a8 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800c5a8: b580 push {r7, lr}
800c5aa: b084 sub sp, #16
800c5ac: af00 add r7, sp, #0
800c5ae: 6078 str r0, [r7, #4]
800c5b0: 460b mov r3, r1
800c5b2: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
800c5b4: 687b ldr r3, [r7, #4]
800c5b6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c5ba: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800c5bc: 687b ldr r3, [r7, #4]
800c5be: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c5c2: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
800c5c4: 687b ldr r3, [r7, #4]
800c5c6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c5ca: 2b00 cmp r3, #0
800c5cc: d03a beq.n 800c644 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800c5ce: 78fa ldrb r2, [r7, #3]
800c5d0: 6879 ldr r1, [r7, #4]
800c5d2: 4613 mov r3, r2
800c5d4: 009b lsls r3, r3, #2
800c5d6: 4413 add r3, r2
800c5d8: 009b lsls r3, r3, #2
800c5da: 440b add r3, r1
800c5dc: 331c adds r3, #28
800c5de: 681b ldr r3, [r3, #0]
800c5e0: 2b00 cmp r3, #0
800c5e2: d029 beq.n 800c638 <USBD_CDC_DataIn+0x90>
800c5e4: 78fa ldrb r2, [r7, #3]
800c5e6: 6879 ldr r1, [r7, #4]
800c5e8: 4613 mov r3, r2
800c5ea: 009b lsls r3, r3, #2
800c5ec: 4413 add r3, r2
800c5ee: 009b lsls r3, r3, #2
800c5f0: 440b add r3, r1
800c5f2: 331c adds r3, #28
800c5f4: 681a ldr r2, [r3, #0]
800c5f6: 78f9 ldrb r1, [r7, #3]
800c5f8: 68b8 ldr r0, [r7, #8]
800c5fa: 460b mov r3, r1
800c5fc: 009b lsls r3, r3, #2
800c5fe: 440b add r3, r1
800c600: 00db lsls r3, r3, #3
800c602: 4403 add r3, r0
800c604: 3320 adds r3, #32
800c606: 681b ldr r3, [r3, #0]
800c608: fbb2 f1f3 udiv r1, r2, r3
800c60c: fb01 f303 mul.w r3, r1, r3
800c610: 1ad3 subs r3, r2, r3
800c612: 2b00 cmp r3, #0
800c614: d110 bne.n 800c638 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
800c616: 78fa ldrb r2, [r7, #3]
800c618: 6879 ldr r1, [r7, #4]
800c61a: 4613 mov r3, r2
800c61c: 009b lsls r3, r3, #2
800c61e: 4413 add r3, r2
800c620: 009b lsls r3, r3, #2
800c622: 440b add r3, r1
800c624: 331c adds r3, #28
800c626: 2200 movs r2, #0
800c628: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800c62a: 78f9 ldrb r1, [r7, #3]
800c62c: 2300 movs r3, #0
800c62e: 2200 movs r2, #0
800c630: 6878 ldr r0, [r7, #4]
800c632: f001 fe45 bl 800e2c0 <USBD_LL_Transmit>
800c636: e003 b.n 800c640 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
800c638: 68fb ldr r3, [r7, #12]
800c63a: 2200 movs r2, #0
800c63c: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800c640: 2300 movs r3, #0
800c642: e000 b.n 800c646 <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
800c644: 2302 movs r3, #2
}
}
800c646: 4618 mov r0, r3
800c648: 3710 adds r7, #16
800c64a: 46bd mov sp, r7
800c64c: bd80 pop {r7, pc}
0800c64e <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800c64e: b580 push {r7, lr}
800c650: b084 sub sp, #16
800c652: af00 add r7, sp, #0
800c654: 6078 str r0, [r7, #4]
800c656: 460b mov r3, r1
800c658: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c65a: 687b ldr r3, [r7, #4]
800c65c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c660: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800c662: 78fb ldrb r3, [r7, #3]
800c664: 4619 mov r1, r3
800c666: 6878 ldr r0, [r7, #4]
800c668: f001 fe70 bl 800e34c <USBD_LL_GetRxDataSize>
800c66c: 4602 mov r2, r0
800c66e: 68fb ldr r3, [r7, #12]
800c670: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
800c674: 687b ldr r3, [r7, #4]
800c676: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c67a: 2b00 cmp r3, #0
800c67c: d00d beq.n 800c69a <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800c67e: 687b ldr r3, [r7, #4]
800c680: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c684: 68db ldr r3, [r3, #12]
800c686: 68fa ldr r2, [r7, #12]
800c688: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800c68c: 68fa ldr r2, [r7, #12]
800c68e: f502 7203 add.w r2, r2, #524 @ 0x20c
800c692: 4611 mov r1, r2
800c694: 4798 blx r3
return USBD_OK;
800c696: 2300 movs r3, #0
800c698: e000 b.n 800c69c <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800c69a: 2302 movs r3, #2
}
}
800c69c: 4618 mov r0, r3
800c69e: 3710 adds r7, #16
800c6a0: 46bd mov sp, r7
800c6a2: bd80 pop {r7, pc}
0800c6a4 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
800c6a4: b580 push {r7, lr}
800c6a6: b084 sub sp, #16
800c6a8: af00 add r7, sp, #0
800c6aa: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c6ac: 687b ldr r3, [r7, #4]
800c6ae: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c6b2: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
800c6b4: 687b ldr r3, [r7, #4]
800c6b6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c6ba: 2b00 cmp r3, #0
800c6bc: d014 beq.n 800c6e8 <USBD_CDC_EP0_RxReady+0x44>
800c6be: 68fb ldr r3, [r7, #12]
800c6c0: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
800c6c4: 2bff cmp r3, #255 @ 0xff
800c6c6: d00f beq.n 800c6e8 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c6c8: 687b ldr r3, [r7, #4]
800c6ca: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c6ce: 689b ldr r3, [r3, #8]
800c6d0: 68fa ldr r2, [r7, #12]
800c6d2: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800c6d6: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800c6d8: 68fa ldr r2, [r7, #12]
800c6da: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c6de: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
800c6e0: 68fb ldr r3, [r7, #12]
800c6e2: 22ff movs r2, #255 @ 0xff
800c6e4: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
800c6e8: 2300 movs r3, #0
}
800c6ea: 4618 mov r0, r3
800c6ec: 3710 adds r7, #16
800c6ee: 46bd mov sp, r7
800c6f0: bd80 pop {r7, pc}
...
0800c6f4 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
800c6f4: b480 push {r7}
800c6f6: b083 sub sp, #12
800c6f8: af00 add r7, sp, #0
800c6fa: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800c6fc: 687b ldr r3, [r7, #4]
800c6fe: 2243 movs r2, #67 @ 0x43
800c700: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
800c702: 4b03 ldr r3, [pc, #12] @ (800c710 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
800c704: 4618 mov r0, r3
800c706: 370c adds r7, #12
800c708: 46bd mov sp, r7
800c70a: bc80 pop {r7}
800c70c: 4770 bx lr
800c70e: bf00 nop
800c710: 200000a4 .word 0x200000a4
0800c714 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
800c714: b480 push {r7}
800c716: b083 sub sp, #12
800c718: af00 add r7, sp, #0
800c71a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800c71c: 687b ldr r3, [r7, #4]
800c71e: 2243 movs r2, #67 @ 0x43
800c720: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
800c722: 4b03 ldr r3, [pc, #12] @ (800c730 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
800c724: 4618 mov r0, r3
800c726: 370c adds r7, #12
800c728: 46bd mov sp, r7
800c72a: bc80 pop {r7}
800c72c: 4770 bx lr
800c72e: bf00 nop
800c730: 20000060 .word 0x20000060
0800c734 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
800c734: b480 push {r7}
800c736: b083 sub sp, #12
800c738: af00 add r7, sp, #0
800c73a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800c73c: 687b ldr r3, [r7, #4]
800c73e: 2243 movs r2, #67 @ 0x43
800c740: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
800c742: 4b03 ldr r3, [pc, #12] @ (800c750 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
800c744: 4618 mov r0, r3
800c746: 370c adds r7, #12
800c748: 46bd mov sp, r7
800c74a: bc80 pop {r7}
800c74c: 4770 bx lr
800c74e: bf00 nop
800c750: 200000e8 .word 0x200000e8
0800c754 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
800c754: b480 push {r7}
800c756: b083 sub sp, #12
800c758: af00 add r7, sp, #0
800c75a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800c75c: 687b ldr r3, [r7, #4]
800c75e: 220a movs r2, #10
800c760: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
800c762: 4b03 ldr r3, [pc, #12] @ (800c770 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
800c764: 4618 mov r0, r3
800c766: 370c adds r7, #12
800c768: 46bd mov sp, r7
800c76a: bc80 pop {r7}
800c76c: 4770 bx lr
800c76e: bf00 nop
800c770: 2000001c .word 0x2000001c
0800c774 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
800c774: b480 push {r7}
800c776: b085 sub sp, #20
800c778: af00 add r7, sp, #0
800c77a: 6078 str r0, [r7, #4]
800c77c: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800c77e: 2302 movs r3, #2
800c780: 73fb strb r3, [r7, #15]
if (fops != NULL)
800c782: 683b ldr r3, [r7, #0]
800c784: 2b00 cmp r3, #0
800c786: d005 beq.n 800c794 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800c788: 687b ldr r3, [r7, #4]
800c78a: 683a ldr r2, [r7, #0]
800c78c: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
800c790: 2300 movs r3, #0
800c792: 73fb strb r3, [r7, #15]
}
return ret;
800c794: 7bfb ldrb r3, [r7, #15]
}
800c796: 4618 mov r0, r3
800c798: 3714 adds r7, #20
800c79a: 46bd mov sp, r7
800c79c: bc80 pop {r7}
800c79e: 4770 bx lr
0800c7a0 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
800c7a0: b480 push {r7}
800c7a2: b087 sub sp, #28
800c7a4: af00 add r7, sp, #0
800c7a6: 60f8 str r0, [r7, #12]
800c7a8: 60b9 str r1, [r7, #8]
800c7aa: 4613 mov r3, r2
800c7ac: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c7ae: 68fb ldr r3, [r7, #12]
800c7b0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c7b4: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800c7b6: 697b ldr r3, [r7, #20]
800c7b8: 68ba ldr r2, [r7, #8]
800c7ba: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800c7be: 88fa ldrh r2, [r7, #6]
800c7c0: 697b ldr r3, [r7, #20]
800c7c2: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800c7c6: 2300 movs r3, #0
}
800c7c8: 4618 mov r0, r3
800c7ca: 371c adds r7, #28
800c7cc: 46bd mov sp, r7
800c7ce: bc80 pop {r7}
800c7d0: 4770 bx lr
0800c7d2 <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
800c7d2: b480 push {r7}
800c7d4: b085 sub sp, #20
800c7d6: af00 add r7, sp, #0
800c7d8: 6078 str r0, [r7, #4]
800c7da: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c7dc: 687b ldr r3, [r7, #4]
800c7de: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c7e2: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
800c7e4: 68fb ldr r3, [r7, #12]
800c7e6: 683a ldr r2, [r7, #0]
800c7e8: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800c7ec: 2300 movs r3, #0
}
800c7ee: 4618 mov r0, r3
800c7f0: 3714 adds r7, #20
800c7f2: 46bd mov sp, r7
800c7f4: bc80 pop {r7}
800c7f6: 4770 bx lr
0800c7f8 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
800c7f8: b580 push {r7, lr}
800c7fa: b084 sub sp, #16
800c7fc: af00 add r7, sp, #0
800c7fe: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c800: 687b ldr r3, [r7, #4]
800c802: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c806: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
800c808: 687b ldr r3, [r7, #4]
800c80a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c80e: 2b00 cmp r3, #0
800c810: d01c beq.n 800c84c <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
800c812: 68fb ldr r3, [r7, #12]
800c814: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800c818: 2b00 cmp r3, #0
800c81a: d115 bne.n 800c848 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800c81c: 68fb ldr r3, [r7, #12]
800c81e: 2201 movs r2, #1
800c820: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
800c824: 68fb ldr r3, [r7, #12]
800c826: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800c82a: 687b ldr r3, [r7, #4]
800c82c: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c82e: 68fb ldr r3, [r7, #12]
800c830: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
800c834: 68fb ldr r3, [r7, #12]
800c836: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c83a: b29b uxth r3, r3
800c83c: 2181 movs r1, #129 @ 0x81
800c83e: 6878 ldr r0, [r7, #4]
800c840: f001 fd3e bl 800e2c0 <USBD_LL_Transmit>
return USBD_OK;
800c844: 2300 movs r3, #0
800c846: e002 b.n 800c84e <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800c848: 2301 movs r3, #1
800c84a: e000 b.n 800c84e <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800c84c: 2302 movs r3, #2
}
}
800c84e: 4618 mov r0, r3
800c850: 3710 adds r7, #16
800c852: 46bd mov sp, r7
800c854: bd80 pop {r7, pc}
0800c856 <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800c856: b580 push {r7, lr}
800c858: b084 sub sp, #16
800c85a: af00 add r7, sp, #0
800c85c: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c85e: 687b ldr r3, [r7, #4]
800c860: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c864: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800c866: 687b ldr r3, [r7, #4]
800c868: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c86c: 2b00 cmp r3, #0
800c86e: d017 beq.n 800c8a0 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c870: 687b ldr r3, [r7, #4]
800c872: 7c1b ldrb r3, [r3, #16]
800c874: 2b00 cmp r3, #0
800c876: d109 bne.n 800c88c <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c878: 68fb ldr r3, [r7, #12]
800c87a: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c87e: f44f 7300 mov.w r3, #512 @ 0x200
800c882: 2101 movs r1, #1
800c884: 6878 ldr r0, [r7, #4]
800c886: f001 fd3e bl 800e306 <USBD_LL_PrepareReceive>
800c88a: e007 b.n 800c89c <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c88c: 68fb ldr r3, [r7, #12]
800c88e: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c892: 2340 movs r3, #64 @ 0x40
800c894: 2101 movs r1, #1
800c896: 6878 ldr r0, [r7, #4]
800c898: f001 fd35 bl 800e306 <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800c89c: 2300 movs r3, #0
800c89e: e000 b.n 800c8a2 <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
800c8a0: 2302 movs r3, #2
}
}
800c8a2: 4618 mov r0, r3
800c8a4: 3710 adds r7, #16
800c8a6: 46bd mov sp, r7
800c8a8: bd80 pop {r7, pc}
0800c8aa <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800c8aa: b580 push {r7, lr}
800c8ac: b084 sub sp, #16
800c8ae: af00 add r7, sp, #0
800c8b0: 60f8 str r0, [r7, #12]
800c8b2: 60b9 str r1, [r7, #8]
800c8b4: 4613 mov r3, r2
800c8b6: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800c8b8: 68fb ldr r3, [r7, #12]
800c8ba: 2b00 cmp r3, #0
800c8bc: d101 bne.n 800c8c2 <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
800c8be: 2302 movs r3, #2
800c8c0: e01a b.n 800c8f8 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
800c8c2: 68fb ldr r3, [r7, #12]
800c8c4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c8c8: 2b00 cmp r3, #0
800c8ca: d003 beq.n 800c8d4 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800c8cc: 68fb ldr r3, [r7, #12]
800c8ce: 2200 movs r2, #0
800c8d0: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
800c8d4: 68bb ldr r3, [r7, #8]
800c8d6: 2b00 cmp r3, #0
800c8d8: d003 beq.n 800c8e2 <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800c8da: 68fb ldr r3, [r7, #12]
800c8dc: 68ba ldr r2, [r7, #8]
800c8de: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800c8e2: 68fb ldr r3, [r7, #12]
800c8e4: 2201 movs r2, #1
800c8e6: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800c8ea: 68fb ldr r3, [r7, #12]
800c8ec: 79fa ldrb r2, [r7, #7]
800c8ee: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800c8f0: 68f8 ldr r0, [r7, #12]
800c8f2: f001 fba3 bl 800e03c <USBD_LL_Init>
return USBD_OK;
800c8f6: 2300 movs r3, #0
}
800c8f8: 4618 mov r0, r3
800c8fa: 3710 adds r7, #16
800c8fc: 46bd mov sp, r7
800c8fe: bd80 pop {r7, pc}
0800c900 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800c900: b480 push {r7}
800c902: b085 sub sp, #20
800c904: af00 add r7, sp, #0
800c906: 6078 str r0, [r7, #4]
800c908: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
800c90a: 2300 movs r3, #0
800c90c: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800c90e: 683b ldr r3, [r7, #0]
800c910: 2b00 cmp r3, #0
800c912: d006 beq.n 800c922 <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
800c914: 687b ldr r3, [r7, #4]
800c916: 683a ldr r2, [r7, #0]
800c918: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800c91c: 2300 movs r3, #0
800c91e: 73fb strb r3, [r7, #15]
800c920: e001 b.n 800c926 <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
800c922: 2302 movs r3, #2
800c924: 73fb strb r3, [r7, #15]
}
return status;
800c926: 7bfb ldrb r3, [r7, #15]
}
800c928: 4618 mov r0, r3
800c92a: 3714 adds r7, #20
800c92c: 46bd mov sp, r7
800c92e: bc80 pop {r7}
800c930: 4770 bx lr
0800c932 <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800c932: b580 push {r7, lr}
800c934: b082 sub sp, #8
800c936: af00 add r7, sp, #0
800c938: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800c93a: 6878 ldr r0, [r7, #4]
800c93c: f001 fbd8 bl 800e0f0 <USBD_LL_Start>
return USBD_OK;
800c940: 2300 movs r3, #0
}
800c942: 4618 mov r0, r3
800c944: 3708 adds r7, #8
800c946: 46bd mov sp, r7
800c948: bd80 pop {r7, pc}
0800c94a <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800c94a: b480 push {r7}
800c94c: b083 sub sp, #12
800c94e: af00 add r7, sp, #0
800c950: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800c952: 2300 movs r3, #0
}
800c954: 4618 mov r0, r3
800c956: 370c adds r7, #12
800c958: 46bd mov sp, r7
800c95a: bc80 pop {r7}
800c95c: 4770 bx lr
0800c95e <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c95e: b580 push {r7, lr}
800c960: b084 sub sp, #16
800c962: af00 add r7, sp, #0
800c964: 6078 str r0, [r7, #4]
800c966: 460b mov r3, r1
800c968: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800c96a: 2302 movs r3, #2
800c96c: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800c96e: 687b ldr r3, [r7, #4]
800c970: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c974: 2b00 cmp r3, #0
800c976: d00c beq.n 800c992 <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800c978: 687b ldr r3, [r7, #4]
800c97a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c97e: 681b ldr r3, [r3, #0]
800c980: 78fa ldrb r2, [r7, #3]
800c982: 4611 mov r1, r2
800c984: 6878 ldr r0, [r7, #4]
800c986: 4798 blx r3
800c988: 4603 mov r3, r0
800c98a: 2b00 cmp r3, #0
800c98c: d101 bne.n 800c992 <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800c98e: 2300 movs r3, #0
800c990: 73fb strb r3, [r7, #15]
}
}
return ret;
800c992: 7bfb ldrb r3, [r7, #15]
}
800c994: 4618 mov r0, r3
800c996: 3710 adds r7, #16
800c998: 46bd mov sp, r7
800c99a: bd80 pop {r7, pc}
0800c99c <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c99c: b580 push {r7, lr}
800c99e: b082 sub sp, #8
800c9a0: af00 add r7, sp, #0
800c9a2: 6078 str r0, [r7, #4]
800c9a4: 460b mov r3, r1
800c9a6: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800c9a8: 687b ldr r3, [r7, #4]
800c9aa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c9ae: 685b ldr r3, [r3, #4]
800c9b0: 78fa ldrb r2, [r7, #3]
800c9b2: 4611 mov r1, r2
800c9b4: 6878 ldr r0, [r7, #4]
800c9b6: 4798 blx r3
return USBD_OK;
800c9b8: 2300 movs r3, #0
}
800c9ba: 4618 mov r0, r3
800c9bc: 3708 adds r7, #8
800c9be: 46bd mov sp, r7
800c9c0: bd80 pop {r7, pc}
0800c9c2 <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800c9c2: b580 push {r7, lr}
800c9c4: b082 sub sp, #8
800c9c6: af00 add r7, sp, #0
800c9c8: 6078 str r0, [r7, #4]
800c9ca: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
800c9cc: 687b ldr r3, [r7, #4]
800c9ce: f503 732a add.w r3, r3, #680 @ 0x2a8
800c9d2: 6839 ldr r1, [r7, #0]
800c9d4: 4618 mov r0, r3
800c9d6: f000 fed8 bl 800d78a <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800c9da: 687b ldr r3, [r7, #4]
800c9dc: 2201 movs r2, #1
800c9de: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800c9e2: 687b ldr r3, [r7, #4]
800c9e4: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800c9e8: 461a mov r2, r3
800c9ea: 687b ldr r3, [r7, #4]
800c9ec: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800c9f0: 687b ldr r3, [r7, #4]
800c9f2: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c9f6: f003 031f and.w r3, r3, #31
800c9fa: 2b02 cmp r3, #2
800c9fc: d016 beq.n 800ca2c <USBD_LL_SetupStage+0x6a>
800c9fe: 2b02 cmp r3, #2
800ca00: d81c bhi.n 800ca3c <USBD_LL_SetupStage+0x7a>
800ca02: 2b00 cmp r3, #0
800ca04: d002 beq.n 800ca0c <USBD_LL_SetupStage+0x4a>
800ca06: 2b01 cmp r3, #1
800ca08: d008 beq.n 800ca1c <USBD_LL_SetupStage+0x5a>
800ca0a: e017 b.n 800ca3c <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
800ca0c: 687b ldr r3, [r7, #4]
800ca0e: f503 732a add.w r3, r3, #680 @ 0x2a8
800ca12: 4619 mov r1, r3
800ca14: 6878 ldr r0, [r7, #4]
800ca16: f000 f9cb bl 800cdb0 <USBD_StdDevReq>
break;
800ca1a: e01a b.n 800ca52 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800ca1c: 687b ldr r3, [r7, #4]
800ca1e: f503 732a add.w r3, r3, #680 @ 0x2a8
800ca22: 4619 mov r1, r3
800ca24: 6878 ldr r0, [r7, #4]
800ca26: f000 fa2d bl 800ce84 <USBD_StdItfReq>
break;
800ca2a: e012 b.n 800ca52 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800ca2c: 687b ldr r3, [r7, #4]
800ca2e: f503 732a add.w r3, r3, #680 @ 0x2a8
800ca32: 4619 mov r1, r3
800ca34: 6878 ldr r0, [r7, #4]
800ca36: f000 fa6d bl 800cf14 <USBD_StdEPReq>
break;
800ca3a: e00a b.n 800ca52 <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800ca3c: 687b ldr r3, [r7, #4]
800ca3e: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800ca42: f023 037f bic.w r3, r3, #127 @ 0x7f
800ca46: b2db uxtb r3, r3
800ca48: 4619 mov r1, r3
800ca4a: 6878 ldr r0, [r7, #4]
800ca4c: f001 fbb0 bl 800e1b0 <USBD_LL_StallEP>
break;
800ca50: bf00 nop
}
return USBD_OK;
800ca52: 2300 movs r3, #0
}
800ca54: 4618 mov r0, r3
800ca56: 3708 adds r7, #8
800ca58: 46bd mov sp, r7
800ca5a: bd80 pop {r7, pc}
0800ca5c <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800ca5c: b580 push {r7, lr}
800ca5e: b086 sub sp, #24
800ca60: af00 add r7, sp, #0
800ca62: 60f8 str r0, [r7, #12]
800ca64: 460b mov r3, r1
800ca66: 607a str r2, [r7, #4]
800ca68: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800ca6a: 7afb ldrb r3, [r7, #11]
800ca6c: 2b00 cmp r3, #0
800ca6e: d14b bne.n 800cb08 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800ca70: 68fb ldr r3, [r7, #12]
800ca72: f503 73aa add.w r3, r3, #340 @ 0x154
800ca76: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800ca78: 68fb ldr r3, [r7, #12]
800ca7a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800ca7e: 2b03 cmp r3, #3
800ca80: d134 bne.n 800caec <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800ca82: 697b ldr r3, [r7, #20]
800ca84: 68da ldr r2, [r3, #12]
800ca86: 697b ldr r3, [r7, #20]
800ca88: 691b ldr r3, [r3, #16]
800ca8a: 429a cmp r2, r3
800ca8c: d919 bls.n 800cac2 <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800ca8e: 697b ldr r3, [r7, #20]
800ca90: 68da ldr r2, [r3, #12]
800ca92: 697b ldr r3, [r7, #20]
800ca94: 691b ldr r3, [r3, #16]
800ca96: 1ad2 subs r2, r2, r3
800ca98: 697b ldr r3, [r7, #20]
800ca9a: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800ca9c: 697b ldr r3, [r7, #20]
800ca9e: 68da ldr r2, [r3, #12]
800caa0: 697b ldr r3, [r7, #20]
800caa2: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800caa4: 429a cmp r2, r3
800caa6: d203 bcs.n 800cab0 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800caa8: 697b ldr r3, [r7, #20]
800caaa: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800caac: b29b uxth r3, r3
800caae: e002 b.n 800cab6 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800cab0: 697b ldr r3, [r7, #20]
800cab2: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800cab4: b29b uxth r3, r3
800cab6: 461a mov r2, r3
800cab8: 6879 ldr r1, [r7, #4]
800caba: 68f8 ldr r0, [r7, #12]
800cabc: f000 ff54 bl 800d968 <USBD_CtlContinueRx>
800cac0: e038 b.n 800cb34 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800cac2: 68fb ldr r3, [r7, #12]
800cac4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cac8: 691b ldr r3, [r3, #16]
800caca: 2b00 cmp r3, #0
800cacc: d00a beq.n 800cae4 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cace: 68fb ldr r3, [r7, #12]
800cad0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800cad4: 2b03 cmp r3, #3
800cad6: d105 bne.n 800cae4 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800cad8: 68fb ldr r3, [r7, #12]
800cada: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cade: 691b ldr r3, [r3, #16]
800cae0: 68f8 ldr r0, [r7, #12]
800cae2: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800cae4: 68f8 ldr r0, [r7, #12]
800cae6: f000 ff51 bl 800d98c <USBD_CtlSendStatus>
800caea: e023 b.n 800cb34 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
800caec: 68fb ldr r3, [r7, #12]
800caee: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800caf2: 2b05 cmp r3, #5
800caf4: d11e bne.n 800cb34 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
800caf6: 68fb ldr r3, [r7, #12]
800caf8: 2200 movs r2, #0
800cafa: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
800cafe: 2100 movs r1, #0
800cb00: 68f8 ldr r0, [r7, #12]
800cb02: f001 fb55 bl 800e1b0 <USBD_LL_StallEP>
800cb06: e015 b.n 800cb34 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
800cb08: 68fb ldr r3, [r7, #12]
800cb0a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb0e: 699b ldr r3, [r3, #24]
800cb10: 2b00 cmp r3, #0
800cb12: d00d beq.n 800cb30 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cb14: 68fb ldr r3, [r7, #12]
800cb16: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800cb1a: 2b03 cmp r3, #3
800cb1c: d108 bne.n 800cb30 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800cb1e: 68fb ldr r3, [r7, #12]
800cb20: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb24: 699b ldr r3, [r3, #24]
800cb26: 7afa ldrb r2, [r7, #11]
800cb28: 4611 mov r1, r2
800cb2a: 68f8 ldr r0, [r7, #12]
800cb2c: 4798 blx r3
800cb2e: e001 b.n 800cb34 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800cb30: 2302 movs r3, #2
800cb32: e000 b.n 800cb36 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800cb34: 2300 movs r3, #0
}
800cb36: 4618 mov r0, r3
800cb38: 3718 adds r7, #24
800cb3a: 46bd mov sp, r7
800cb3c: bd80 pop {r7, pc}
0800cb3e <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800cb3e: b580 push {r7, lr}
800cb40: b086 sub sp, #24
800cb42: af00 add r7, sp, #0
800cb44: 60f8 str r0, [r7, #12]
800cb46: 460b mov r3, r1
800cb48: 607a str r2, [r7, #4]
800cb4a: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800cb4c: 7afb ldrb r3, [r7, #11]
800cb4e: 2b00 cmp r3, #0
800cb50: d17f bne.n 800cc52 <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800cb52: 68fb ldr r3, [r7, #12]
800cb54: 3314 adds r3, #20
800cb56: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800cb58: 68fb ldr r3, [r7, #12]
800cb5a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800cb5e: 2b02 cmp r3, #2
800cb60: d15c bne.n 800cc1c <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800cb62: 697b ldr r3, [r7, #20]
800cb64: 68da ldr r2, [r3, #12]
800cb66: 697b ldr r3, [r7, #20]
800cb68: 691b ldr r3, [r3, #16]
800cb6a: 429a cmp r2, r3
800cb6c: d915 bls.n 800cb9a <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800cb6e: 697b ldr r3, [r7, #20]
800cb70: 68da ldr r2, [r3, #12]
800cb72: 697b ldr r3, [r7, #20]
800cb74: 691b ldr r3, [r3, #16]
800cb76: 1ad2 subs r2, r2, r3
800cb78: 697b ldr r3, [r7, #20]
800cb7a: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800cb7c: 697b ldr r3, [r7, #20]
800cb7e: 68db ldr r3, [r3, #12]
800cb80: b29b uxth r3, r3
800cb82: 461a mov r2, r3
800cb84: 6879 ldr r1, [r7, #4]
800cb86: 68f8 ldr r0, [r7, #12]
800cb88: f000 febe bl 800d908 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800cb8c: 2300 movs r3, #0
800cb8e: 2200 movs r2, #0
800cb90: 2100 movs r1, #0
800cb92: 68f8 ldr r0, [r7, #12]
800cb94: f001 fbb7 bl 800e306 <USBD_LL_PrepareReceive>
800cb98: e04e b.n 800cc38 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800cb9a: 697b ldr r3, [r7, #20]
800cb9c: 689b ldr r3, [r3, #8]
800cb9e: 697a ldr r2, [r7, #20]
800cba0: 6912 ldr r2, [r2, #16]
800cba2: fbb3 f1f2 udiv r1, r3, r2
800cba6: fb01 f202 mul.w r2, r1, r2
800cbaa: 1a9b subs r3, r3, r2
800cbac: 2b00 cmp r3, #0
800cbae: d11c bne.n 800cbea <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800cbb0: 697b ldr r3, [r7, #20]
800cbb2: 689a ldr r2, [r3, #8]
800cbb4: 697b ldr r3, [r7, #20]
800cbb6: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800cbb8: 429a cmp r2, r3
800cbba: d316 bcc.n 800cbea <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
800cbbc: 697b ldr r3, [r7, #20]
800cbbe: 689a ldr r2, [r3, #8]
800cbc0: 68fb ldr r3, [r7, #12]
800cbc2: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800cbc6: 429a cmp r2, r3
800cbc8: d20f bcs.n 800cbea <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800cbca: 2200 movs r2, #0
800cbcc: 2100 movs r1, #0
800cbce: 68f8 ldr r0, [r7, #12]
800cbd0: f000 fe9a bl 800d908 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800cbd4: 68fb ldr r3, [r7, #12]
800cbd6: 2200 movs r2, #0
800cbd8: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800cbdc: 2300 movs r3, #0
800cbde: 2200 movs r2, #0
800cbe0: 2100 movs r1, #0
800cbe2: 68f8 ldr r0, [r7, #12]
800cbe4: f001 fb8f bl 800e306 <USBD_LL_PrepareReceive>
800cbe8: e026 b.n 800cc38 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
800cbea: 68fb ldr r3, [r7, #12]
800cbec: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cbf0: 68db ldr r3, [r3, #12]
800cbf2: 2b00 cmp r3, #0
800cbf4: d00a beq.n 800cc0c <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cbf6: 68fb ldr r3, [r7, #12]
800cbf8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
800cbfc: 2b03 cmp r3, #3
800cbfe: d105 bne.n 800cc0c <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800cc00: 68fb ldr r3, [r7, #12]
800cc02: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cc06: 68db ldr r3, [r3, #12]
800cc08: 68f8 ldr r0, [r7, #12]
800cc0a: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
800cc0c: 2180 movs r1, #128 @ 0x80
800cc0e: 68f8 ldr r0, [r7, #12]
800cc10: f001 face bl 800e1b0 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800cc14: 68f8 ldr r0, [r7, #12]
800cc16: f000 fecc bl 800d9b2 <USBD_CtlReceiveStatus>
800cc1a: e00d b.n 800cc38 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800cc1c: 68fb ldr r3, [r7, #12]
800cc1e: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800cc22: 2b04 cmp r3, #4
800cc24: d004 beq.n 800cc30 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800cc26: 68fb ldr r3, [r7, #12]
800cc28: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800cc2c: 2b00 cmp r3, #0
800cc2e: d103 bne.n 800cc38 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800cc30: 2180 movs r1, #128 @ 0x80
800cc32: 68f8 ldr r0, [r7, #12]
800cc34: f001 fabc bl 800e1b0 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
800cc38: 68fb ldr r3, [r7, #12]
800cc3a: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800cc3e: 2b01 cmp r3, #1
800cc40: d11d bne.n 800cc7e <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800cc42: 68f8 ldr r0, [r7, #12]
800cc44: f7ff fe81 bl 800c94a <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800cc48: 68fb ldr r3, [r7, #12]
800cc4a: 2200 movs r2, #0
800cc4c: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800cc50: e015 b.n 800cc7e <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800cc52: 68fb ldr r3, [r7, #12]
800cc54: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cc58: 695b ldr r3, [r3, #20]
800cc5a: 2b00 cmp r3, #0
800cc5c: d00d beq.n 800cc7a <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cc5e: 68fb ldr r3, [r7, #12]
800cc60: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800cc64: 2b03 cmp r3, #3
800cc66: d108 bne.n 800cc7a <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800cc68: 68fb ldr r3, [r7, #12]
800cc6a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cc6e: 695b ldr r3, [r3, #20]
800cc70: 7afa ldrb r2, [r7, #11]
800cc72: 4611 mov r1, r2
800cc74: 68f8 ldr r0, [r7, #12]
800cc76: 4798 blx r3
800cc78: e001 b.n 800cc7e <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800cc7a: 2302 movs r3, #2
800cc7c: e000 b.n 800cc80 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800cc7e: 2300 movs r3, #0
}
800cc80: 4618 mov r0, r3
800cc82: 3718 adds r7, #24
800cc84: 46bd mov sp, r7
800cc86: bd80 pop {r7, pc}
0800cc88 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800cc88: b580 push {r7, lr}
800cc8a: b082 sub sp, #8
800cc8c: af00 add r7, sp, #0
800cc8e: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800cc90: 2340 movs r3, #64 @ 0x40
800cc92: 2200 movs r2, #0
800cc94: 2100 movs r1, #0
800cc96: 6878 ldr r0, [r7, #4]
800cc98: f001 fa45 bl 800e126 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800cc9c: 687b ldr r3, [r7, #4]
800cc9e: 2201 movs r2, #1
800cca0: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800cca4: 687b ldr r3, [r7, #4]
800cca6: 2240 movs r2, #64 @ 0x40
800cca8: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800ccac: 2340 movs r3, #64 @ 0x40
800ccae: 2200 movs r2, #0
800ccb0: 2180 movs r1, #128 @ 0x80
800ccb2: 6878 ldr r0, [r7, #4]
800ccb4: f001 fa37 bl 800e126 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800ccb8: 687b ldr r3, [r7, #4]
800ccba: 2201 movs r2, #1
800ccbc: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800ccbe: 687b ldr r3, [r7, #4]
800ccc0: 2240 movs r2, #64 @ 0x40
800ccc2: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800ccc4: 687b ldr r3, [r7, #4]
800ccc6: 2201 movs r2, #1
800ccc8: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800cccc: 687b ldr r3, [r7, #4]
800ccce: 2200 movs r2, #0
800ccd0: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800ccd4: 687b ldr r3, [r7, #4]
800ccd6: 2200 movs r2, #0
800ccd8: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800ccda: 687b ldr r3, [r7, #4]
800ccdc: 2200 movs r2, #0
800ccde: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
800cce2: 687b ldr r3, [r7, #4]
800cce4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800cce8: 2b00 cmp r3, #0
800ccea: d009 beq.n 800cd00 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
800ccec: 687b ldr r3, [r7, #4]
800ccee: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ccf2: 685b ldr r3, [r3, #4]
800ccf4: 687a ldr r2, [r7, #4]
800ccf6: 6852 ldr r2, [r2, #4]
800ccf8: b2d2 uxtb r2, r2
800ccfa: 4611 mov r1, r2
800ccfc: 6878 ldr r0, [r7, #4]
800ccfe: 4798 blx r3
}
return USBD_OK;
800cd00: 2300 movs r3, #0
}
800cd02: 4618 mov r0, r3
800cd04: 3708 adds r7, #8
800cd06: 46bd mov sp, r7
800cd08: bd80 pop {r7, pc}
0800cd0a <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800cd0a: b480 push {r7}
800cd0c: b083 sub sp, #12
800cd0e: af00 add r7, sp, #0
800cd10: 6078 str r0, [r7, #4]
800cd12: 460b mov r3, r1
800cd14: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800cd16: 687b ldr r3, [r7, #4]
800cd18: 78fa ldrb r2, [r7, #3]
800cd1a: 741a strb r2, [r3, #16]
return USBD_OK;
800cd1c: 2300 movs r3, #0
}
800cd1e: 4618 mov r0, r3
800cd20: 370c adds r7, #12
800cd22: 46bd mov sp, r7
800cd24: bc80 pop {r7}
800cd26: 4770 bx lr
0800cd28 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800cd28: b480 push {r7}
800cd2a: b083 sub sp, #12
800cd2c: af00 add r7, sp, #0
800cd2e: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800cd30: 687b ldr r3, [r7, #4]
800cd32: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800cd36: 687b ldr r3, [r7, #4]
800cd38: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800cd3c: 687b ldr r3, [r7, #4]
800cd3e: 2204 movs r2, #4
800cd40: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800cd44: 2300 movs r3, #0
}
800cd46: 4618 mov r0, r3
800cd48: 370c adds r7, #12
800cd4a: 46bd mov sp, r7
800cd4c: bc80 pop {r7}
800cd4e: 4770 bx lr
0800cd50 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800cd50: b480 push {r7}
800cd52: b083 sub sp, #12
800cd54: af00 add r7, sp, #0
800cd56: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800cd58: 687b ldr r3, [r7, #4]
800cd5a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cd5e: 2b04 cmp r3, #4
800cd60: d105 bne.n 800cd6e <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800cd62: 687b ldr r3, [r7, #4]
800cd64: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
800cd68: 687b ldr r3, [r7, #4]
800cd6a: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800cd6e: 2300 movs r3, #0
}
800cd70: 4618 mov r0, r3
800cd72: 370c adds r7, #12
800cd74: 46bd mov sp, r7
800cd76: bc80 pop {r7}
800cd78: 4770 bx lr
0800cd7a <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800cd7a: b580 push {r7, lr}
800cd7c: b082 sub sp, #8
800cd7e: af00 add r7, sp, #0
800cd80: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800cd82: 687b ldr r3, [r7, #4]
800cd84: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cd88: 2b03 cmp r3, #3
800cd8a: d10b bne.n 800cda4 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800cd8c: 687b ldr r3, [r7, #4]
800cd8e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd92: 69db ldr r3, [r3, #28]
800cd94: 2b00 cmp r3, #0
800cd96: d005 beq.n 800cda4 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800cd98: 687b ldr r3, [r7, #4]
800cd9a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd9e: 69db ldr r3, [r3, #28]
800cda0: 6878 ldr r0, [r7, #4]
800cda2: 4798 blx r3
}
}
return USBD_OK;
800cda4: 2300 movs r3, #0
}
800cda6: 4618 mov r0, r3
800cda8: 3708 adds r7, #8
800cdaa: 46bd mov sp, r7
800cdac: bd80 pop {r7, pc}
...
0800cdb0 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cdb0: b580 push {r7, lr}
800cdb2: b084 sub sp, #16
800cdb4: af00 add r7, sp, #0
800cdb6: 6078 str r0, [r7, #4]
800cdb8: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800cdba: 2300 movs r3, #0
800cdbc: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800cdbe: 683b ldr r3, [r7, #0]
800cdc0: 781b ldrb r3, [r3, #0]
800cdc2: f003 0360 and.w r3, r3, #96 @ 0x60
800cdc6: 2b40 cmp r3, #64 @ 0x40
800cdc8: d005 beq.n 800cdd6 <USBD_StdDevReq+0x26>
800cdca: 2b40 cmp r3, #64 @ 0x40
800cdcc: d84f bhi.n 800ce6e <USBD_StdDevReq+0xbe>
800cdce: 2b00 cmp r3, #0
800cdd0: d009 beq.n 800cde6 <USBD_StdDevReq+0x36>
800cdd2: 2b20 cmp r3, #32
800cdd4: d14b bne.n 800ce6e <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800cdd6: 687b ldr r3, [r7, #4]
800cdd8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cddc: 689b ldr r3, [r3, #8]
800cdde: 6839 ldr r1, [r7, #0]
800cde0: 6878 ldr r0, [r7, #4]
800cde2: 4798 blx r3
break;
800cde4: e048 b.n 800ce78 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800cde6: 683b ldr r3, [r7, #0]
800cde8: 785b ldrb r3, [r3, #1]
800cdea: 2b09 cmp r3, #9
800cdec: d839 bhi.n 800ce62 <USBD_StdDevReq+0xb2>
800cdee: a201 add r2, pc, #4 @ (adr r2, 800cdf4 <USBD_StdDevReq+0x44>)
800cdf0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800cdf4: 0800ce45 .word 0x0800ce45
800cdf8: 0800ce59 .word 0x0800ce59
800cdfc: 0800ce63 .word 0x0800ce63
800ce00: 0800ce4f .word 0x0800ce4f
800ce04: 0800ce63 .word 0x0800ce63
800ce08: 0800ce27 .word 0x0800ce27
800ce0c: 0800ce1d .word 0x0800ce1d
800ce10: 0800ce63 .word 0x0800ce63
800ce14: 0800ce3b .word 0x0800ce3b
800ce18: 0800ce31 .word 0x0800ce31
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800ce1c: 6839 ldr r1, [r7, #0]
800ce1e: 6878 ldr r0, [r7, #4]
800ce20: f000 f9dc bl 800d1dc <USBD_GetDescriptor>
break;
800ce24: e022 b.n 800ce6c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800ce26: 6839 ldr r1, [r7, #0]
800ce28: 6878 ldr r0, [r7, #4]
800ce2a: f000 fb3f bl 800d4ac <USBD_SetAddress>
break;
800ce2e: e01d b.n 800ce6c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
800ce30: 6839 ldr r1, [r7, #0]
800ce32: 6878 ldr r0, [r7, #4]
800ce34: f000 fb7e bl 800d534 <USBD_SetConfig>
break;
800ce38: e018 b.n 800ce6c <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800ce3a: 6839 ldr r1, [r7, #0]
800ce3c: 6878 ldr r0, [r7, #4]
800ce3e: f000 fc07 bl 800d650 <USBD_GetConfig>
break;
800ce42: e013 b.n 800ce6c <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800ce44: 6839 ldr r1, [r7, #0]
800ce46: 6878 ldr r0, [r7, #4]
800ce48: f000 fc37 bl 800d6ba <USBD_GetStatus>
break;
800ce4c: e00e b.n 800ce6c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800ce4e: 6839 ldr r1, [r7, #0]
800ce50: 6878 ldr r0, [r7, #4]
800ce52: f000 fc65 bl 800d720 <USBD_SetFeature>
break;
800ce56: e009 b.n 800ce6c <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800ce58: 6839 ldr r1, [r7, #0]
800ce5a: 6878 ldr r0, [r7, #4]
800ce5c: f000 fc74 bl 800d748 <USBD_ClrFeature>
break;
800ce60: e004 b.n 800ce6c <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800ce62: 6839 ldr r1, [r7, #0]
800ce64: 6878 ldr r0, [r7, #4]
800ce66: f000 fcc9 bl 800d7fc <USBD_CtlError>
break;
800ce6a: bf00 nop
}
break;
800ce6c: e004 b.n 800ce78 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800ce6e: 6839 ldr r1, [r7, #0]
800ce70: 6878 ldr r0, [r7, #4]
800ce72: f000 fcc3 bl 800d7fc <USBD_CtlError>
break;
800ce76: bf00 nop
}
return ret;
800ce78: 7bfb ldrb r3, [r7, #15]
}
800ce7a: 4618 mov r0, r3
800ce7c: 3710 adds r7, #16
800ce7e: 46bd mov sp, r7
800ce80: bd80 pop {r7, pc}
800ce82: bf00 nop
0800ce84 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800ce84: b580 push {r7, lr}
800ce86: b084 sub sp, #16
800ce88: af00 add r7, sp, #0
800ce8a: 6078 str r0, [r7, #4]
800ce8c: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800ce8e: 2300 movs r3, #0
800ce90: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800ce92: 683b ldr r3, [r7, #0]
800ce94: 781b ldrb r3, [r3, #0]
800ce96: f003 0360 and.w r3, r3, #96 @ 0x60
800ce9a: 2b40 cmp r3, #64 @ 0x40
800ce9c: d005 beq.n 800ceaa <USBD_StdItfReq+0x26>
800ce9e: 2b40 cmp r3, #64 @ 0x40
800cea0: d82e bhi.n 800cf00 <USBD_StdItfReq+0x7c>
800cea2: 2b00 cmp r3, #0
800cea4: d001 beq.n 800ceaa <USBD_StdItfReq+0x26>
800cea6: 2b20 cmp r3, #32
800cea8: d12a bne.n 800cf00 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800ceaa: 687b ldr r3, [r7, #4]
800ceac: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800ceb0: 3b01 subs r3, #1
800ceb2: 2b02 cmp r3, #2
800ceb4: d81d bhi.n 800cef2 <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800ceb6: 683b ldr r3, [r7, #0]
800ceb8: 889b ldrh r3, [r3, #4]
800ceba: b2db uxtb r3, r3
800cebc: 2b01 cmp r3, #1
800cebe: d813 bhi.n 800cee8 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800cec0: 687b ldr r3, [r7, #4]
800cec2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cec6: 689b ldr r3, [r3, #8]
800cec8: 6839 ldr r1, [r7, #0]
800ceca: 6878 ldr r0, [r7, #4]
800cecc: 4798 blx r3
800cece: 4603 mov r3, r0
800ced0: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800ced2: 683b ldr r3, [r7, #0]
800ced4: 88db ldrh r3, [r3, #6]
800ced6: 2b00 cmp r3, #0
800ced8: d110 bne.n 800cefc <USBD_StdItfReq+0x78>
800ceda: 7bfb ldrb r3, [r7, #15]
800cedc: 2b00 cmp r3, #0
800cede: d10d bne.n 800cefc <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
800cee0: 6878 ldr r0, [r7, #4]
800cee2: f000 fd53 bl 800d98c <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800cee6: e009 b.n 800cefc <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
800cee8: 6839 ldr r1, [r7, #0]
800ceea: 6878 ldr r0, [r7, #4]
800ceec: f000 fc86 bl 800d7fc <USBD_CtlError>
break;
800cef0: e004 b.n 800cefc <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
800cef2: 6839 ldr r1, [r7, #0]
800cef4: 6878 ldr r0, [r7, #4]
800cef6: f000 fc81 bl 800d7fc <USBD_CtlError>
break;
800cefa: e000 b.n 800cefe <USBD_StdItfReq+0x7a>
break;
800cefc: bf00 nop
}
break;
800cefe: e004 b.n 800cf0a <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
800cf00: 6839 ldr r1, [r7, #0]
800cf02: 6878 ldr r0, [r7, #4]
800cf04: f000 fc7a bl 800d7fc <USBD_CtlError>
break;
800cf08: bf00 nop
}
return USBD_OK;
800cf0a: 2300 movs r3, #0
}
800cf0c: 4618 mov r0, r3
800cf0e: 3710 adds r7, #16
800cf10: 46bd mov sp, r7
800cf12: bd80 pop {r7, pc}
0800cf14 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cf14: b580 push {r7, lr}
800cf16: b084 sub sp, #16
800cf18: af00 add r7, sp, #0
800cf1a: 6078 str r0, [r7, #4]
800cf1c: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
800cf1e: 2300 movs r3, #0
800cf20: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800cf22: 683b ldr r3, [r7, #0]
800cf24: 889b ldrh r3, [r3, #4]
800cf26: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800cf28: 683b ldr r3, [r7, #0]
800cf2a: 781b ldrb r3, [r3, #0]
800cf2c: f003 0360 and.w r3, r3, #96 @ 0x60
800cf30: 2b40 cmp r3, #64 @ 0x40
800cf32: d007 beq.n 800cf44 <USBD_StdEPReq+0x30>
800cf34: 2b40 cmp r3, #64 @ 0x40
800cf36: f200 8146 bhi.w 800d1c6 <USBD_StdEPReq+0x2b2>
800cf3a: 2b00 cmp r3, #0
800cf3c: d00a beq.n 800cf54 <USBD_StdEPReq+0x40>
800cf3e: 2b20 cmp r3, #32
800cf40: f040 8141 bne.w 800d1c6 <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800cf44: 687b ldr r3, [r7, #4]
800cf46: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cf4a: 689b ldr r3, [r3, #8]
800cf4c: 6839 ldr r1, [r7, #0]
800cf4e: 6878 ldr r0, [r7, #4]
800cf50: 4798 blx r3
break;
800cf52: e13d b.n 800d1d0 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800cf54: 683b ldr r3, [r7, #0]
800cf56: 781b ldrb r3, [r3, #0]
800cf58: f003 0360 and.w r3, r3, #96 @ 0x60
800cf5c: 2b20 cmp r3, #32
800cf5e: d10a bne.n 800cf76 <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800cf60: 687b ldr r3, [r7, #4]
800cf62: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cf66: 689b ldr r3, [r3, #8]
800cf68: 6839 ldr r1, [r7, #0]
800cf6a: 6878 ldr r0, [r7, #4]
800cf6c: 4798 blx r3
800cf6e: 4603 mov r3, r0
800cf70: 73fb strb r3, [r7, #15]
return ret;
800cf72: 7bfb ldrb r3, [r7, #15]
800cf74: e12d b.n 800d1d2 <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800cf76: 683b ldr r3, [r7, #0]
800cf78: 785b ldrb r3, [r3, #1]
800cf7a: 2b03 cmp r3, #3
800cf7c: d007 beq.n 800cf8e <USBD_StdEPReq+0x7a>
800cf7e: 2b03 cmp r3, #3
800cf80: f300 811b bgt.w 800d1ba <USBD_StdEPReq+0x2a6>
800cf84: 2b00 cmp r3, #0
800cf86: d072 beq.n 800d06e <USBD_StdEPReq+0x15a>
800cf88: 2b01 cmp r3, #1
800cf8a: d03a beq.n 800d002 <USBD_StdEPReq+0xee>
800cf8c: e115 b.n 800d1ba <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800cf8e: 687b ldr r3, [r7, #4]
800cf90: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cf94: 2b02 cmp r3, #2
800cf96: d002 beq.n 800cf9e <USBD_StdEPReq+0x8a>
800cf98: 2b03 cmp r3, #3
800cf9a: d015 beq.n 800cfc8 <USBD_StdEPReq+0xb4>
800cf9c: e02b b.n 800cff6 <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800cf9e: 7bbb ldrb r3, [r7, #14]
800cfa0: 2b00 cmp r3, #0
800cfa2: d00c beq.n 800cfbe <USBD_StdEPReq+0xaa>
800cfa4: 7bbb ldrb r3, [r7, #14]
800cfa6: 2b80 cmp r3, #128 @ 0x80
800cfa8: d009 beq.n 800cfbe <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800cfaa: 7bbb ldrb r3, [r7, #14]
800cfac: 4619 mov r1, r3
800cfae: 6878 ldr r0, [r7, #4]
800cfb0: f001 f8fe bl 800e1b0 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800cfb4: 2180 movs r1, #128 @ 0x80
800cfb6: 6878 ldr r0, [r7, #4]
800cfb8: f001 f8fa bl 800e1b0 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800cfbc: e020 b.n 800d000 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800cfbe: 6839 ldr r1, [r7, #0]
800cfc0: 6878 ldr r0, [r7, #4]
800cfc2: f000 fc1b bl 800d7fc <USBD_CtlError>
break;
800cfc6: e01b b.n 800d000 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800cfc8: 683b ldr r3, [r7, #0]
800cfca: 885b ldrh r3, [r3, #2]
800cfcc: 2b00 cmp r3, #0
800cfce: d10e bne.n 800cfee <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800cfd0: 7bbb ldrb r3, [r7, #14]
800cfd2: 2b00 cmp r3, #0
800cfd4: d00b beq.n 800cfee <USBD_StdEPReq+0xda>
800cfd6: 7bbb ldrb r3, [r7, #14]
800cfd8: 2b80 cmp r3, #128 @ 0x80
800cfda: d008 beq.n 800cfee <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800cfdc: 683b ldr r3, [r7, #0]
800cfde: 88db ldrh r3, [r3, #6]
800cfe0: 2b00 cmp r3, #0
800cfe2: d104 bne.n 800cfee <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
800cfe4: 7bbb ldrb r3, [r7, #14]
800cfe6: 4619 mov r1, r3
800cfe8: 6878 ldr r0, [r7, #4]
800cfea: f001 f8e1 bl 800e1b0 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800cfee: 6878 ldr r0, [r7, #4]
800cff0: f000 fccc bl 800d98c <USBD_CtlSendStatus>
break;
800cff4: e004 b.n 800d000 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
800cff6: 6839 ldr r1, [r7, #0]
800cff8: 6878 ldr r0, [r7, #4]
800cffa: f000 fbff bl 800d7fc <USBD_CtlError>
break;
800cffe: bf00 nop
}
break;
800d000: e0e0 b.n 800d1c4 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800d002: 687b ldr r3, [r7, #4]
800d004: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d008: 2b02 cmp r3, #2
800d00a: d002 beq.n 800d012 <USBD_StdEPReq+0xfe>
800d00c: 2b03 cmp r3, #3
800d00e: d015 beq.n 800d03c <USBD_StdEPReq+0x128>
800d010: e026 b.n 800d060 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800d012: 7bbb ldrb r3, [r7, #14]
800d014: 2b00 cmp r3, #0
800d016: d00c beq.n 800d032 <USBD_StdEPReq+0x11e>
800d018: 7bbb ldrb r3, [r7, #14]
800d01a: 2b80 cmp r3, #128 @ 0x80
800d01c: d009 beq.n 800d032 <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
800d01e: 7bbb ldrb r3, [r7, #14]
800d020: 4619 mov r1, r3
800d022: 6878 ldr r0, [r7, #4]
800d024: f001 f8c4 bl 800e1b0 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800d028: 2180 movs r1, #128 @ 0x80
800d02a: 6878 ldr r0, [r7, #4]
800d02c: f001 f8c0 bl 800e1b0 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800d030: e01c b.n 800d06c <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800d032: 6839 ldr r1, [r7, #0]
800d034: 6878 ldr r0, [r7, #4]
800d036: f000 fbe1 bl 800d7fc <USBD_CtlError>
break;
800d03a: e017 b.n 800d06c <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800d03c: 683b ldr r3, [r7, #0]
800d03e: 885b ldrh r3, [r3, #2]
800d040: 2b00 cmp r3, #0
800d042: d112 bne.n 800d06a <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800d044: 7bbb ldrb r3, [r7, #14]
800d046: f003 037f and.w r3, r3, #127 @ 0x7f
800d04a: 2b00 cmp r3, #0
800d04c: d004 beq.n 800d058 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800d04e: 7bbb ldrb r3, [r7, #14]
800d050: 4619 mov r1, r3
800d052: 6878 ldr r0, [r7, #4]
800d054: f001 f8cb bl 800e1ee <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
800d058: 6878 ldr r0, [r7, #4]
800d05a: f000 fc97 bl 800d98c <USBD_CtlSendStatus>
}
break;
800d05e: e004 b.n 800d06a <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800d060: 6839 ldr r1, [r7, #0]
800d062: 6878 ldr r0, [r7, #4]
800d064: f000 fbca bl 800d7fc <USBD_CtlError>
break;
800d068: e000 b.n 800d06c <USBD_StdEPReq+0x158>
break;
800d06a: bf00 nop
}
break;
800d06c: e0aa b.n 800d1c4 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800d06e: 687b ldr r3, [r7, #4]
800d070: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d074: 2b02 cmp r3, #2
800d076: d002 beq.n 800d07e <USBD_StdEPReq+0x16a>
800d078: 2b03 cmp r3, #3
800d07a: d032 beq.n 800d0e2 <USBD_StdEPReq+0x1ce>
800d07c: e097 b.n 800d1ae <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800d07e: 7bbb ldrb r3, [r7, #14]
800d080: 2b00 cmp r3, #0
800d082: d007 beq.n 800d094 <USBD_StdEPReq+0x180>
800d084: 7bbb ldrb r3, [r7, #14]
800d086: 2b80 cmp r3, #128 @ 0x80
800d088: d004 beq.n 800d094 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800d08a: 6839 ldr r1, [r7, #0]
800d08c: 6878 ldr r0, [r7, #4]
800d08e: f000 fbb5 bl 800d7fc <USBD_CtlError>
break;
800d092: e091 b.n 800d1b8 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d094: f997 300e ldrsb.w r3, [r7, #14]
800d098: 2b00 cmp r3, #0
800d09a: da0b bge.n 800d0b4 <USBD_StdEPReq+0x1a0>
800d09c: 7bbb ldrb r3, [r7, #14]
800d09e: f003 027f and.w r2, r3, #127 @ 0x7f
800d0a2: 4613 mov r3, r2
800d0a4: 009b lsls r3, r3, #2
800d0a6: 4413 add r3, r2
800d0a8: 009b lsls r3, r3, #2
800d0aa: 3310 adds r3, #16
800d0ac: 687a ldr r2, [r7, #4]
800d0ae: 4413 add r3, r2
800d0b0: 3304 adds r3, #4
800d0b2: e00b b.n 800d0cc <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
800d0b4: 7bbb ldrb r3, [r7, #14]
800d0b6: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d0ba: 4613 mov r3, r2
800d0bc: 009b lsls r3, r3, #2
800d0be: 4413 add r3, r2
800d0c0: 009b lsls r3, r3, #2
800d0c2: f503 73a8 add.w r3, r3, #336 @ 0x150
800d0c6: 687a ldr r2, [r7, #4]
800d0c8: 4413 add r3, r2
800d0ca: 3304 adds r3, #4
800d0cc: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800d0ce: 68bb ldr r3, [r7, #8]
800d0d0: 2200 movs r2, #0
800d0d2: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800d0d4: 68bb ldr r3, [r7, #8]
800d0d6: 2202 movs r2, #2
800d0d8: 4619 mov r1, r3
800d0da: 6878 ldr r0, [r7, #4]
800d0dc: f000 fbf8 bl 800d8d0 <USBD_CtlSendData>
break;
800d0e0: e06a b.n 800d1b8 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800d0e2: f997 300e ldrsb.w r3, [r7, #14]
800d0e6: 2b00 cmp r3, #0
800d0e8: da11 bge.n 800d10e <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800d0ea: 7bbb ldrb r3, [r7, #14]
800d0ec: f003 020f and.w r2, r3, #15
800d0f0: 6879 ldr r1, [r7, #4]
800d0f2: 4613 mov r3, r2
800d0f4: 009b lsls r3, r3, #2
800d0f6: 4413 add r3, r2
800d0f8: 009b lsls r3, r3, #2
800d0fa: 440b add r3, r1
800d0fc: 3318 adds r3, #24
800d0fe: 681b ldr r3, [r3, #0]
800d100: 2b00 cmp r3, #0
800d102: d117 bne.n 800d134 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800d104: 6839 ldr r1, [r7, #0]
800d106: 6878 ldr r0, [r7, #4]
800d108: f000 fb78 bl 800d7fc <USBD_CtlError>
break;
800d10c: e054 b.n 800d1b8 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800d10e: 7bbb ldrb r3, [r7, #14]
800d110: f003 020f and.w r2, r3, #15
800d114: 6879 ldr r1, [r7, #4]
800d116: 4613 mov r3, r2
800d118: 009b lsls r3, r3, #2
800d11a: 4413 add r3, r2
800d11c: 009b lsls r3, r3, #2
800d11e: 440b add r3, r1
800d120: f503 73ac add.w r3, r3, #344 @ 0x158
800d124: 681b ldr r3, [r3, #0]
800d126: 2b00 cmp r3, #0
800d128: d104 bne.n 800d134 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800d12a: 6839 ldr r1, [r7, #0]
800d12c: 6878 ldr r0, [r7, #4]
800d12e: f000 fb65 bl 800d7fc <USBD_CtlError>
break;
800d132: e041 b.n 800d1b8 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d134: f997 300e ldrsb.w r3, [r7, #14]
800d138: 2b00 cmp r3, #0
800d13a: da0b bge.n 800d154 <USBD_StdEPReq+0x240>
800d13c: 7bbb ldrb r3, [r7, #14]
800d13e: f003 027f and.w r2, r3, #127 @ 0x7f
800d142: 4613 mov r3, r2
800d144: 009b lsls r3, r3, #2
800d146: 4413 add r3, r2
800d148: 009b lsls r3, r3, #2
800d14a: 3310 adds r3, #16
800d14c: 687a ldr r2, [r7, #4]
800d14e: 4413 add r3, r2
800d150: 3304 adds r3, #4
800d152: e00b b.n 800d16c <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800d154: 7bbb ldrb r3, [r7, #14]
800d156: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d15a: 4613 mov r3, r2
800d15c: 009b lsls r3, r3, #2
800d15e: 4413 add r3, r2
800d160: 009b lsls r3, r3, #2
800d162: f503 73a8 add.w r3, r3, #336 @ 0x150
800d166: 687a ldr r2, [r7, #4]
800d168: 4413 add r3, r2
800d16a: 3304 adds r3, #4
800d16c: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800d16e: 7bbb ldrb r3, [r7, #14]
800d170: 2b00 cmp r3, #0
800d172: d002 beq.n 800d17a <USBD_StdEPReq+0x266>
800d174: 7bbb ldrb r3, [r7, #14]
800d176: 2b80 cmp r3, #128 @ 0x80
800d178: d103 bne.n 800d182 <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800d17a: 68bb ldr r3, [r7, #8]
800d17c: 2200 movs r2, #0
800d17e: 601a str r2, [r3, #0]
800d180: e00e b.n 800d1a0 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800d182: 7bbb ldrb r3, [r7, #14]
800d184: 4619 mov r1, r3
800d186: 6878 ldr r0, [r7, #4]
800d188: f001 f850 bl 800e22c <USBD_LL_IsStallEP>
800d18c: 4603 mov r3, r0
800d18e: 2b00 cmp r3, #0
800d190: d003 beq.n 800d19a <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800d192: 68bb ldr r3, [r7, #8]
800d194: 2201 movs r2, #1
800d196: 601a str r2, [r3, #0]
800d198: e002 b.n 800d1a0 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800d19a: 68bb ldr r3, [r7, #8]
800d19c: 2200 movs r2, #0
800d19e: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800d1a0: 68bb ldr r3, [r7, #8]
800d1a2: 2202 movs r2, #2
800d1a4: 4619 mov r1, r3
800d1a6: 6878 ldr r0, [r7, #4]
800d1a8: f000 fb92 bl 800d8d0 <USBD_CtlSendData>
break;
800d1ac: e004 b.n 800d1b8 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800d1ae: 6839 ldr r1, [r7, #0]
800d1b0: 6878 ldr r0, [r7, #4]
800d1b2: f000 fb23 bl 800d7fc <USBD_CtlError>
break;
800d1b6: bf00 nop
}
break;
800d1b8: e004 b.n 800d1c4 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800d1ba: 6839 ldr r1, [r7, #0]
800d1bc: 6878 ldr r0, [r7, #4]
800d1be: f000 fb1d bl 800d7fc <USBD_CtlError>
break;
800d1c2: bf00 nop
}
break;
800d1c4: e004 b.n 800d1d0 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
800d1c6: 6839 ldr r1, [r7, #0]
800d1c8: 6878 ldr r0, [r7, #4]
800d1ca: f000 fb17 bl 800d7fc <USBD_CtlError>
break;
800d1ce: bf00 nop
}
return ret;
800d1d0: 7bfb ldrb r3, [r7, #15]
}
800d1d2: 4618 mov r0, r3
800d1d4: 3710 adds r7, #16
800d1d6: 46bd mov sp, r7
800d1d8: bd80 pop {r7, pc}
...
0800d1dc <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d1dc: b580 push {r7, lr}
800d1de: b084 sub sp, #16
800d1e0: af00 add r7, sp, #0
800d1e2: 6078 str r0, [r7, #4]
800d1e4: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800d1e6: 2300 movs r3, #0
800d1e8: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800d1ea: 2300 movs r3, #0
800d1ec: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800d1ee: 2300 movs r3, #0
800d1f0: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800d1f2: 683b ldr r3, [r7, #0]
800d1f4: 885b ldrh r3, [r3, #2]
800d1f6: 0a1b lsrs r3, r3, #8
800d1f8: b29b uxth r3, r3
800d1fa: 3b01 subs r3, #1
800d1fc: 2b06 cmp r3, #6
800d1fe: f200 8128 bhi.w 800d452 <USBD_GetDescriptor+0x276>
800d202: a201 add r2, pc, #4 @ (adr r2, 800d208 <USBD_GetDescriptor+0x2c>)
800d204: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d208: 0800d225 .word 0x0800d225
800d20c: 0800d23d .word 0x0800d23d
800d210: 0800d27d .word 0x0800d27d
800d214: 0800d453 .word 0x0800d453
800d218: 0800d453 .word 0x0800d453
800d21c: 0800d3f3 .word 0x0800d3f3
800d220: 0800d41f .word 0x0800d41f
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800d224: 687b ldr r3, [r7, #4]
800d226: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d22a: 681b ldr r3, [r3, #0]
800d22c: 687a ldr r2, [r7, #4]
800d22e: 7c12 ldrb r2, [r2, #16]
800d230: f107 0108 add.w r1, r7, #8
800d234: 4610 mov r0, r2
800d236: 4798 blx r3
800d238: 60f8 str r0, [r7, #12]
break;
800d23a: e112 b.n 800d462 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d23c: 687b ldr r3, [r7, #4]
800d23e: 7c1b ldrb r3, [r3, #16]
800d240: 2b00 cmp r3, #0
800d242: d10d bne.n 800d260 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800d244: 687b ldr r3, [r7, #4]
800d246: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d24a: 6a9b ldr r3, [r3, #40] @ 0x28
800d24c: f107 0208 add.w r2, r7, #8
800d250: 4610 mov r0, r2
800d252: 4798 blx r3
800d254: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800d256: 68fb ldr r3, [r7, #12]
800d258: 3301 adds r3, #1
800d25a: 2202 movs r2, #2
800d25c: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800d25e: e100 b.n 800d462 <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800d260: 687b ldr r3, [r7, #4]
800d262: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d266: 6adb ldr r3, [r3, #44] @ 0x2c
800d268: f107 0208 add.w r2, r7, #8
800d26c: 4610 mov r0, r2
800d26e: 4798 blx r3
800d270: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800d272: 68fb ldr r3, [r7, #12]
800d274: 3301 adds r3, #1
800d276: 2202 movs r2, #2
800d278: 701a strb r2, [r3, #0]
break;
800d27a: e0f2 b.n 800d462 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800d27c: 683b ldr r3, [r7, #0]
800d27e: 885b ldrh r3, [r3, #2]
800d280: b2db uxtb r3, r3
800d282: 2b05 cmp r3, #5
800d284: f200 80ac bhi.w 800d3e0 <USBD_GetDescriptor+0x204>
800d288: a201 add r2, pc, #4 @ (adr r2, 800d290 <USBD_GetDescriptor+0xb4>)
800d28a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d28e: bf00 nop
800d290: 0800d2a9 .word 0x0800d2a9
800d294: 0800d2dd .word 0x0800d2dd
800d298: 0800d311 .word 0x0800d311
800d29c: 0800d345 .word 0x0800d345
800d2a0: 0800d379 .word 0x0800d379
800d2a4: 0800d3ad .word 0x0800d3ad
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800d2a8: 687b ldr r3, [r7, #4]
800d2aa: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2ae: 685b ldr r3, [r3, #4]
800d2b0: 2b00 cmp r3, #0
800d2b2: d00b beq.n 800d2cc <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800d2b4: 687b ldr r3, [r7, #4]
800d2b6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2ba: 685b ldr r3, [r3, #4]
800d2bc: 687a ldr r2, [r7, #4]
800d2be: 7c12 ldrb r2, [r2, #16]
800d2c0: f107 0108 add.w r1, r7, #8
800d2c4: 4610 mov r0, r2
800d2c6: 4798 blx r3
800d2c8: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d2ca: e091 b.n 800d3f0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d2cc: 6839 ldr r1, [r7, #0]
800d2ce: 6878 ldr r0, [r7, #4]
800d2d0: f000 fa94 bl 800d7fc <USBD_CtlError>
err++;
800d2d4: 7afb ldrb r3, [r7, #11]
800d2d6: 3301 adds r3, #1
800d2d8: 72fb strb r3, [r7, #11]
break;
800d2da: e089 b.n 800d3f0 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800d2dc: 687b ldr r3, [r7, #4]
800d2de: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2e2: 689b ldr r3, [r3, #8]
800d2e4: 2b00 cmp r3, #0
800d2e6: d00b beq.n 800d300 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800d2e8: 687b ldr r3, [r7, #4]
800d2ea: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2ee: 689b ldr r3, [r3, #8]
800d2f0: 687a ldr r2, [r7, #4]
800d2f2: 7c12 ldrb r2, [r2, #16]
800d2f4: f107 0108 add.w r1, r7, #8
800d2f8: 4610 mov r0, r2
800d2fa: 4798 blx r3
800d2fc: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d2fe: e077 b.n 800d3f0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d300: 6839 ldr r1, [r7, #0]
800d302: 6878 ldr r0, [r7, #4]
800d304: f000 fa7a bl 800d7fc <USBD_CtlError>
err++;
800d308: 7afb ldrb r3, [r7, #11]
800d30a: 3301 adds r3, #1
800d30c: 72fb strb r3, [r7, #11]
break;
800d30e: e06f b.n 800d3f0 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800d310: 687b ldr r3, [r7, #4]
800d312: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d316: 68db ldr r3, [r3, #12]
800d318: 2b00 cmp r3, #0
800d31a: d00b beq.n 800d334 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800d31c: 687b ldr r3, [r7, #4]
800d31e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d322: 68db ldr r3, [r3, #12]
800d324: 687a ldr r2, [r7, #4]
800d326: 7c12 ldrb r2, [r2, #16]
800d328: f107 0108 add.w r1, r7, #8
800d32c: 4610 mov r0, r2
800d32e: 4798 blx r3
800d330: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d332: e05d b.n 800d3f0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d334: 6839 ldr r1, [r7, #0]
800d336: 6878 ldr r0, [r7, #4]
800d338: f000 fa60 bl 800d7fc <USBD_CtlError>
err++;
800d33c: 7afb ldrb r3, [r7, #11]
800d33e: 3301 adds r3, #1
800d340: 72fb strb r3, [r7, #11]
break;
800d342: e055 b.n 800d3f0 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800d344: 687b ldr r3, [r7, #4]
800d346: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d34a: 691b ldr r3, [r3, #16]
800d34c: 2b00 cmp r3, #0
800d34e: d00b beq.n 800d368 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800d350: 687b ldr r3, [r7, #4]
800d352: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d356: 691b ldr r3, [r3, #16]
800d358: 687a ldr r2, [r7, #4]
800d35a: 7c12 ldrb r2, [r2, #16]
800d35c: f107 0108 add.w r1, r7, #8
800d360: 4610 mov r0, r2
800d362: 4798 blx r3
800d364: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d366: e043 b.n 800d3f0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d368: 6839 ldr r1, [r7, #0]
800d36a: 6878 ldr r0, [r7, #4]
800d36c: f000 fa46 bl 800d7fc <USBD_CtlError>
err++;
800d370: 7afb ldrb r3, [r7, #11]
800d372: 3301 adds r3, #1
800d374: 72fb strb r3, [r7, #11]
break;
800d376: e03b b.n 800d3f0 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800d378: 687b ldr r3, [r7, #4]
800d37a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d37e: 695b ldr r3, [r3, #20]
800d380: 2b00 cmp r3, #0
800d382: d00b beq.n 800d39c <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800d384: 687b ldr r3, [r7, #4]
800d386: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d38a: 695b ldr r3, [r3, #20]
800d38c: 687a ldr r2, [r7, #4]
800d38e: 7c12 ldrb r2, [r2, #16]
800d390: f107 0108 add.w r1, r7, #8
800d394: 4610 mov r0, r2
800d396: 4798 blx r3
800d398: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d39a: e029 b.n 800d3f0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d39c: 6839 ldr r1, [r7, #0]
800d39e: 6878 ldr r0, [r7, #4]
800d3a0: f000 fa2c bl 800d7fc <USBD_CtlError>
err++;
800d3a4: 7afb ldrb r3, [r7, #11]
800d3a6: 3301 adds r3, #1
800d3a8: 72fb strb r3, [r7, #11]
break;
800d3aa: e021 b.n 800d3f0 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800d3ac: 687b ldr r3, [r7, #4]
800d3ae: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d3b2: 699b ldr r3, [r3, #24]
800d3b4: 2b00 cmp r3, #0
800d3b6: d00b beq.n 800d3d0 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800d3b8: 687b ldr r3, [r7, #4]
800d3ba: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d3be: 699b ldr r3, [r3, #24]
800d3c0: 687a ldr r2, [r7, #4]
800d3c2: 7c12 ldrb r2, [r2, #16]
800d3c4: f107 0108 add.w r1, r7, #8
800d3c8: 4610 mov r0, r2
800d3ca: 4798 blx r3
800d3cc: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d3ce: e00f b.n 800d3f0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d3d0: 6839 ldr r1, [r7, #0]
800d3d2: 6878 ldr r0, [r7, #4]
800d3d4: f000 fa12 bl 800d7fc <USBD_CtlError>
err++;
800d3d8: 7afb ldrb r3, [r7, #11]
800d3da: 3301 adds r3, #1
800d3dc: 72fb strb r3, [r7, #11]
break;
800d3de: e007 b.n 800d3f0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
800d3e0: 6839 ldr r1, [r7, #0]
800d3e2: 6878 ldr r0, [r7, #4]
800d3e4: f000 fa0a bl 800d7fc <USBD_CtlError>
err++;
800d3e8: 7afb ldrb r3, [r7, #11]
800d3ea: 3301 adds r3, #1
800d3ec: 72fb strb r3, [r7, #11]
#endif
}
break;
800d3ee: e038 b.n 800d462 <USBD_GetDescriptor+0x286>
800d3f0: e037 b.n 800d462 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d3f2: 687b ldr r3, [r7, #4]
800d3f4: 7c1b ldrb r3, [r3, #16]
800d3f6: 2b00 cmp r3, #0
800d3f8: d109 bne.n 800d40e <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800d3fa: 687b ldr r3, [r7, #4]
800d3fc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d400: 6b5b ldr r3, [r3, #52] @ 0x34
800d402: f107 0208 add.w r2, r7, #8
800d406: 4610 mov r0, r2
800d408: 4798 blx r3
800d40a: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d40c: e029 b.n 800d462 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800d40e: 6839 ldr r1, [r7, #0]
800d410: 6878 ldr r0, [r7, #4]
800d412: f000 f9f3 bl 800d7fc <USBD_CtlError>
err++;
800d416: 7afb ldrb r3, [r7, #11]
800d418: 3301 adds r3, #1
800d41a: 72fb strb r3, [r7, #11]
break;
800d41c: e021 b.n 800d462 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d41e: 687b ldr r3, [r7, #4]
800d420: 7c1b ldrb r3, [r3, #16]
800d422: 2b00 cmp r3, #0
800d424: d10d bne.n 800d442 <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800d426: 687b ldr r3, [r7, #4]
800d428: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d42c: 6b1b ldr r3, [r3, #48] @ 0x30
800d42e: f107 0208 add.w r2, r7, #8
800d432: 4610 mov r0, r2
800d434: 4798 blx r3
800d436: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800d438: 68fb ldr r3, [r7, #12]
800d43a: 3301 adds r3, #1
800d43c: 2207 movs r2, #7
800d43e: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d440: e00f b.n 800d462 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800d442: 6839 ldr r1, [r7, #0]
800d444: 6878 ldr r0, [r7, #4]
800d446: f000 f9d9 bl 800d7fc <USBD_CtlError>
err++;
800d44a: 7afb ldrb r3, [r7, #11]
800d44c: 3301 adds r3, #1
800d44e: 72fb strb r3, [r7, #11]
break;
800d450: e007 b.n 800d462 <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800d452: 6839 ldr r1, [r7, #0]
800d454: 6878 ldr r0, [r7, #4]
800d456: f000 f9d1 bl 800d7fc <USBD_CtlError>
err++;
800d45a: 7afb ldrb r3, [r7, #11]
800d45c: 3301 adds r3, #1
800d45e: 72fb strb r3, [r7, #11]
break;
800d460: bf00 nop
}
if (err != 0U)
800d462: 7afb ldrb r3, [r7, #11]
800d464: 2b00 cmp r3, #0
800d466: d11c bne.n 800d4a2 <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800d468: 893b ldrh r3, [r7, #8]
800d46a: 2b00 cmp r3, #0
800d46c: d011 beq.n 800d492 <USBD_GetDescriptor+0x2b6>
800d46e: 683b ldr r3, [r7, #0]
800d470: 88db ldrh r3, [r3, #6]
800d472: 2b00 cmp r3, #0
800d474: d00d beq.n 800d492 <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800d476: 683b ldr r3, [r7, #0]
800d478: 88da ldrh r2, [r3, #6]
800d47a: 893b ldrh r3, [r7, #8]
800d47c: 4293 cmp r3, r2
800d47e: bf28 it cs
800d480: 4613 movcs r3, r2
800d482: b29b uxth r3, r3
800d484: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800d486: 893b ldrh r3, [r7, #8]
800d488: 461a mov r2, r3
800d48a: 68f9 ldr r1, [r7, #12]
800d48c: 6878 ldr r0, [r7, #4]
800d48e: f000 fa1f bl 800d8d0 <USBD_CtlSendData>
}
if (req->wLength == 0U)
800d492: 683b ldr r3, [r7, #0]
800d494: 88db ldrh r3, [r3, #6]
800d496: 2b00 cmp r3, #0
800d498: d104 bne.n 800d4a4 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800d49a: 6878 ldr r0, [r7, #4]
800d49c: f000 fa76 bl 800d98c <USBD_CtlSendStatus>
800d4a0: e000 b.n 800d4a4 <USBD_GetDescriptor+0x2c8>
return;
800d4a2: bf00 nop
}
}
}
800d4a4: 3710 adds r7, #16
800d4a6: 46bd mov sp, r7
800d4a8: bd80 pop {r7, pc}
800d4aa: bf00 nop
0800d4ac <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d4ac: b580 push {r7, lr}
800d4ae: b084 sub sp, #16
800d4b0: af00 add r7, sp, #0
800d4b2: 6078 str r0, [r7, #4]
800d4b4: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800d4b6: 683b ldr r3, [r7, #0]
800d4b8: 889b ldrh r3, [r3, #4]
800d4ba: 2b00 cmp r3, #0
800d4bc: d130 bne.n 800d520 <USBD_SetAddress+0x74>
800d4be: 683b ldr r3, [r7, #0]
800d4c0: 88db ldrh r3, [r3, #6]
800d4c2: 2b00 cmp r3, #0
800d4c4: d12c bne.n 800d520 <USBD_SetAddress+0x74>
800d4c6: 683b ldr r3, [r7, #0]
800d4c8: 885b ldrh r3, [r3, #2]
800d4ca: 2b7f cmp r3, #127 @ 0x7f
800d4cc: d828 bhi.n 800d520 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800d4ce: 683b ldr r3, [r7, #0]
800d4d0: 885b ldrh r3, [r3, #2]
800d4d2: b2db uxtb r3, r3
800d4d4: f003 037f and.w r3, r3, #127 @ 0x7f
800d4d8: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d4da: 687b ldr r3, [r7, #4]
800d4dc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d4e0: 2b03 cmp r3, #3
800d4e2: d104 bne.n 800d4ee <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
800d4e4: 6839 ldr r1, [r7, #0]
800d4e6: 6878 ldr r0, [r7, #4]
800d4e8: f000 f988 bl 800d7fc <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d4ec: e01d b.n 800d52a <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800d4ee: 687b ldr r3, [r7, #4]
800d4f0: 7bfa ldrb r2, [r7, #15]
800d4f2: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
800d4f6: 7bfb ldrb r3, [r7, #15]
800d4f8: 4619 mov r1, r3
800d4fa: 6878 ldr r0, [r7, #4]
800d4fc: f000 fec1 bl 800e282 <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800d500: 6878 ldr r0, [r7, #4]
800d502: f000 fa43 bl 800d98c <USBD_CtlSendStatus>
if (dev_addr != 0U)
800d506: 7bfb ldrb r3, [r7, #15]
800d508: 2b00 cmp r3, #0
800d50a: d004 beq.n 800d516 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800d50c: 687b ldr r3, [r7, #4]
800d50e: 2202 movs r2, #2
800d510: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d514: e009 b.n 800d52a <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800d516: 687b ldr r3, [r7, #4]
800d518: 2201 movs r2, #1
800d51a: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d51e: e004 b.n 800d52a <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
800d520: 6839 ldr r1, [r7, #0]
800d522: 6878 ldr r0, [r7, #4]
800d524: f000 f96a bl 800d7fc <USBD_CtlError>
}
}
800d528: bf00 nop
800d52a: bf00 nop
800d52c: 3710 adds r7, #16
800d52e: 46bd mov sp, r7
800d530: bd80 pop {r7, pc}
...
0800d534 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d534: b580 push {r7, lr}
800d536: b082 sub sp, #8
800d538: af00 add r7, sp, #0
800d53a: 6078 str r0, [r7, #4]
800d53c: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800d53e: 683b ldr r3, [r7, #0]
800d540: 885b ldrh r3, [r3, #2]
800d542: b2da uxtb r2, r3
800d544: 4b41 ldr r3, [pc, #260] @ (800d64c <USBD_SetConfig+0x118>)
800d546: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800d548: 4b40 ldr r3, [pc, #256] @ (800d64c <USBD_SetConfig+0x118>)
800d54a: 781b ldrb r3, [r3, #0]
800d54c: 2b01 cmp r3, #1
800d54e: d904 bls.n 800d55a <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800d550: 6839 ldr r1, [r7, #0]
800d552: 6878 ldr r0, [r7, #4]
800d554: f000 f952 bl 800d7fc <USBD_CtlError>
800d558: e075 b.n 800d646 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800d55a: 687b ldr r3, [r7, #4]
800d55c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d560: 2b02 cmp r3, #2
800d562: d002 beq.n 800d56a <USBD_SetConfig+0x36>
800d564: 2b03 cmp r3, #3
800d566: d023 beq.n 800d5b0 <USBD_SetConfig+0x7c>
800d568: e062 b.n 800d630 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800d56a: 4b38 ldr r3, [pc, #224] @ (800d64c <USBD_SetConfig+0x118>)
800d56c: 781b ldrb r3, [r3, #0]
800d56e: 2b00 cmp r3, #0
800d570: d01a beq.n 800d5a8 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800d572: 4b36 ldr r3, [pc, #216] @ (800d64c <USBD_SetConfig+0x118>)
800d574: 781b ldrb r3, [r3, #0]
800d576: 461a mov r2, r3
800d578: 687b ldr r3, [r7, #4]
800d57a: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800d57c: 687b ldr r3, [r7, #4]
800d57e: 2203 movs r2, #3
800d580: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800d584: 4b31 ldr r3, [pc, #196] @ (800d64c <USBD_SetConfig+0x118>)
800d586: 781b ldrb r3, [r3, #0]
800d588: 4619 mov r1, r3
800d58a: 6878 ldr r0, [r7, #4]
800d58c: f7ff f9e7 bl 800c95e <USBD_SetClassConfig>
800d590: 4603 mov r3, r0
800d592: 2b02 cmp r3, #2
800d594: d104 bne.n 800d5a0 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800d596: 6839 ldr r1, [r7, #0]
800d598: 6878 ldr r0, [r7, #4]
800d59a: f000 f92f bl 800d7fc <USBD_CtlError>
return;
800d59e: e052 b.n 800d646 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800d5a0: 6878 ldr r0, [r7, #4]
800d5a2: f000 f9f3 bl 800d98c <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800d5a6: e04e b.n 800d646 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d5a8: 6878 ldr r0, [r7, #4]
800d5aa: f000 f9ef bl 800d98c <USBD_CtlSendStatus>
break;
800d5ae: e04a b.n 800d646 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800d5b0: 4b26 ldr r3, [pc, #152] @ (800d64c <USBD_SetConfig+0x118>)
800d5b2: 781b ldrb r3, [r3, #0]
800d5b4: 2b00 cmp r3, #0
800d5b6: d112 bne.n 800d5de <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800d5b8: 687b ldr r3, [r7, #4]
800d5ba: 2202 movs r2, #2
800d5bc: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800d5c0: 4b22 ldr r3, [pc, #136] @ (800d64c <USBD_SetConfig+0x118>)
800d5c2: 781b ldrb r3, [r3, #0]
800d5c4: 461a mov r2, r3
800d5c6: 687b ldr r3, [r7, #4]
800d5c8: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800d5ca: 4b20 ldr r3, [pc, #128] @ (800d64c <USBD_SetConfig+0x118>)
800d5cc: 781b ldrb r3, [r3, #0]
800d5ce: 4619 mov r1, r3
800d5d0: 6878 ldr r0, [r7, #4]
800d5d2: f7ff f9e3 bl 800c99c <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800d5d6: 6878 ldr r0, [r7, #4]
800d5d8: f000 f9d8 bl 800d98c <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800d5dc: e033 b.n 800d646 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800d5de: 4b1b ldr r3, [pc, #108] @ (800d64c <USBD_SetConfig+0x118>)
800d5e0: 781b ldrb r3, [r3, #0]
800d5e2: 461a mov r2, r3
800d5e4: 687b ldr r3, [r7, #4]
800d5e6: 685b ldr r3, [r3, #4]
800d5e8: 429a cmp r2, r3
800d5ea: d01d beq.n 800d628 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800d5ec: 687b ldr r3, [r7, #4]
800d5ee: 685b ldr r3, [r3, #4]
800d5f0: b2db uxtb r3, r3
800d5f2: 4619 mov r1, r3
800d5f4: 6878 ldr r0, [r7, #4]
800d5f6: f7ff f9d1 bl 800c99c <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800d5fa: 4b14 ldr r3, [pc, #80] @ (800d64c <USBD_SetConfig+0x118>)
800d5fc: 781b ldrb r3, [r3, #0]
800d5fe: 461a mov r2, r3
800d600: 687b ldr r3, [r7, #4]
800d602: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800d604: 4b11 ldr r3, [pc, #68] @ (800d64c <USBD_SetConfig+0x118>)
800d606: 781b ldrb r3, [r3, #0]
800d608: 4619 mov r1, r3
800d60a: 6878 ldr r0, [r7, #4]
800d60c: f7ff f9a7 bl 800c95e <USBD_SetClassConfig>
800d610: 4603 mov r3, r0
800d612: 2b02 cmp r3, #2
800d614: d104 bne.n 800d620 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
800d616: 6839 ldr r1, [r7, #0]
800d618: 6878 ldr r0, [r7, #4]
800d61a: f000 f8ef bl 800d7fc <USBD_CtlError>
return;
800d61e: e012 b.n 800d646 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d620: 6878 ldr r0, [r7, #4]
800d622: f000 f9b3 bl 800d98c <USBD_CtlSendStatus>
break;
800d626: e00e b.n 800d646 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d628: 6878 ldr r0, [r7, #4]
800d62a: f000 f9af bl 800d98c <USBD_CtlSendStatus>
break;
800d62e: e00a b.n 800d646 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
800d630: 6839 ldr r1, [r7, #0]
800d632: 6878 ldr r0, [r7, #4]
800d634: f000 f8e2 bl 800d7fc <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
800d638: 4b04 ldr r3, [pc, #16] @ (800d64c <USBD_SetConfig+0x118>)
800d63a: 781b ldrb r3, [r3, #0]
800d63c: 4619 mov r1, r3
800d63e: 6878 ldr r0, [r7, #4]
800d640: f7ff f9ac bl 800c99c <USBD_ClrClassConfig>
break;
800d644: bf00 nop
}
}
}
800d646: 3708 adds r7, #8
800d648: 46bd mov sp, r7
800d64a: bd80 pop {r7, pc}
800d64c: 20000498 .word 0x20000498
0800d650 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d650: b580 push {r7, lr}
800d652: b082 sub sp, #8
800d654: af00 add r7, sp, #0
800d656: 6078 str r0, [r7, #4]
800d658: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800d65a: 683b ldr r3, [r7, #0]
800d65c: 88db ldrh r3, [r3, #6]
800d65e: 2b01 cmp r3, #1
800d660: d004 beq.n 800d66c <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800d662: 6839 ldr r1, [r7, #0]
800d664: 6878 ldr r0, [r7, #4]
800d666: f000 f8c9 bl 800d7fc <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800d66a: e022 b.n 800d6b2 <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800d66c: 687b ldr r3, [r7, #4]
800d66e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d672: 2b02 cmp r3, #2
800d674: dc02 bgt.n 800d67c <USBD_GetConfig+0x2c>
800d676: 2b00 cmp r3, #0
800d678: dc03 bgt.n 800d682 <USBD_GetConfig+0x32>
800d67a: e015 b.n 800d6a8 <USBD_GetConfig+0x58>
800d67c: 2b03 cmp r3, #3
800d67e: d00b beq.n 800d698 <USBD_GetConfig+0x48>
800d680: e012 b.n 800d6a8 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800d682: 687b ldr r3, [r7, #4]
800d684: 2200 movs r2, #0
800d686: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800d688: 687b ldr r3, [r7, #4]
800d68a: 3308 adds r3, #8
800d68c: 2201 movs r2, #1
800d68e: 4619 mov r1, r3
800d690: 6878 ldr r0, [r7, #4]
800d692: f000 f91d bl 800d8d0 <USBD_CtlSendData>
break;
800d696: e00c b.n 800d6b2 <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800d698: 687b ldr r3, [r7, #4]
800d69a: 3304 adds r3, #4
800d69c: 2201 movs r2, #1
800d69e: 4619 mov r1, r3
800d6a0: 6878 ldr r0, [r7, #4]
800d6a2: f000 f915 bl 800d8d0 <USBD_CtlSendData>
break;
800d6a6: e004 b.n 800d6b2 <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800d6a8: 6839 ldr r1, [r7, #0]
800d6aa: 6878 ldr r0, [r7, #4]
800d6ac: f000 f8a6 bl 800d7fc <USBD_CtlError>
break;
800d6b0: bf00 nop
}
800d6b2: bf00 nop
800d6b4: 3708 adds r7, #8
800d6b6: 46bd mov sp, r7
800d6b8: bd80 pop {r7, pc}
0800d6ba <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d6ba: b580 push {r7, lr}
800d6bc: b082 sub sp, #8
800d6be: af00 add r7, sp, #0
800d6c0: 6078 str r0, [r7, #4]
800d6c2: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d6c4: 687b ldr r3, [r7, #4]
800d6c6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d6ca: 3b01 subs r3, #1
800d6cc: 2b02 cmp r3, #2
800d6ce: d81e bhi.n 800d70e <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800d6d0: 683b ldr r3, [r7, #0]
800d6d2: 88db ldrh r3, [r3, #6]
800d6d4: 2b02 cmp r3, #2
800d6d6: d004 beq.n 800d6e2 <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800d6d8: 6839 ldr r1, [r7, #0]
800d6da: 6878 ldr r0, [r7, #4]
800d6dc: f000 f88e bl 800d7fc <USBD_CtlError>
break;
800d6e0: e01a b.n 800d718 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800d6e2: 687b ldr r3, [r7, #4]
800d6e4: 2201 movs r2, #1
800d6e6: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
800d6e8: 687b ldr r3, [r7, #4]
800d6ea: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800d6ee: 2b00 cmp r3, #0
800d6f0: d005 beq.n 800d6fe <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800d6f2: 687b ldr r3, [r7, #4]
800d6f4: 68db ldr r3, [r3, #12]
800d6f6: f043 0202 orr.w r2, r3, #2
800d6fa: 687b ldr r3, [r7, #4]
800d6fc: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800d6fe: 687b ldr r3, [r7, #4]
800d700: 330c adds r3, #12
800d702: 2202 movs r2, #2
800d704: 4619 mov r1, r3
800d706: 6878 ldr r0, [r7, #4]
800d708: f000 f8e2 bl 800d8d0 <USBD_CtlSendData>
break;
800d70c: e004 b.n 800d718 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800d70e: 6839 ldr r1, [r7, #0]
800d710: 6878 ldr r0, [r7, #4]
800d712: f000 f873 bl 800d7fc <USBD_CtlError>
break;
800d716: bf00 nop
}
}
800d718: bf00 nop
800d71a: 3708 adds r7, #8
800d71c: 46bd mov sp, r7
800d71e: bd80 pop {r7, pc}
0800d720 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d720: b580 push {r7, lr}
800d722: b082 sub sp, #8
800d724: af00 add r7, sp, #0
800d726: 6078 str r0, [r7, #4]
800d728: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d72a: 683b ldr r3, [r7, #0]
800d72c: 885b ldrh r3, [r3, #2]
800d72e: 2b01 cmp r3, #1
800d730: d106 bne.n 800d740 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
800d732: 687b ldr r3, [r7, #4]
800d734: 2201 movs r2, #1
800d736: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d73a: 6878 ldr r0, [r7, #4]
800d73c: f000 f926 bl 800d98c <USBD_CtlSendStatus>
}
}
800d740: bf00 nop
800d742: 3708 adds r7, #8
800d744: 46bd mov sp, r7
800d746: bd80 pop {r7, pc}
0800d748 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d748: b580 push {r7, lr}
800d74a: b082 sub sp, #8
800d74c: af00 add r7, sp, #0
800d74e: 6078 str r0, [r7, #4]
800d750: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d752: 687b ldr r3, [r7, #4]
800d754: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d758: 3b01 subs r3, #1
800d75a: 2b02 cmp r3, #2
800d75c: d80b bhi.n 800d776 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d75e: 683b ldr r3, [r7, #0]
800d760: 885b ldrh r3, [r3, #2]
800d762: 2b01 cmp r3, #1
800d764: d10c bne.n 800d780 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800d766: 687b ldr r3, [r7, #4]
800d768: 2200 movs r2, #0
800d76a: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d76e: 6878 ldr r0, [r7, #4]
800d770: f000 f90c bl 800d98c <USBD_CtlSendStatus>
}
break;
800d774: e004 b.n 800d780 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800d776: 6839 ldr r1, [r7, #0]
800d778: 6878 ldr r0, [r7, #4]
800d77a: f000 f83f bl 800d7fc <USBD_CtlError>
break;
800d77e: e000 b.n 800d782 <USBD_ClrFeature+0x3a>
break;
800d780: bf00 nop
}
}
800d782: bf00 nop
800d784: 3708 adds r7, #8
800d786: 46bd mov sp, r7
800d788: bd80 pop {r7, pc}
0800d78a <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800d78a: b480 push {r7}
800d78c: b083 sub sp, #12
800d78e: af00 add r7, sp, #0
800d790: 6078 str r0, [r7, #4]
800d792: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
800d794: 683b ldr r3, [r7, #0]
800d796: 781a ldrb r2, [r3, #0]
800d798: 687b ldr r3, [r7, #4]
800d79a: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800d79c: 683b ldr r3, [r7, #0]
800d79e: 785a ldrb r2, [r3, #1]
800d7a0: 687b ldr r3, [r7, #4]
800d7a2: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
800d7a4: 683b ldr r3, [r7, #0]
800d7a6: 3302 adds r3, #2
800d7a8: 781b ldrb r3, [r3, #0]
800d7aa: 461a mov r2, r3
800d7ac: 683b ldr r3, [r7, #0]
800d7ae: 3303 adds r3, #3
800d7b0: 781b ldrb r3, [r3, #0]
800d7b2: 021b lsls r3, r3, #8
800d7b4: b29b uxth r3, r3
800d7b6: 4413 add r3, r2
800d7b8: b29a uxth r2, r3
800d7ba: 687b ldr r3, [r7, #4]
800d7bc: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800d7be: 683b ldr r3, [r7, #0]
800d7c0: 3304 adds r3, #4
800d7c2: 781b ldrb r3, [r3, #0]
800d7c4: 461a mov r2, r3
800d7c6: 683b ldr r3, [r7, #0]
800d7c8: 3305 adds r3, #5
800d7ca: 781b ldrb r3, [r3, #0]
800d7cc: 021b lsls r3, r3, #8
800d7ce: b29b uxth r3, r3
800d7d0: 4413 add r3, r2
800d7d2: b29a uxth r2, r3
800d7d4: 687b ldr r3, [r7, #4]
800d7d6: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800d7d8: 683b ldr r3, [r7, #0]
800d7da: 3306 adds r3, #6
800d7dc: 781b ldrb r3, [r3, #0]
800d7de: 461a mov r2, r3
800d7e0: 683b ldr r3, [r7, #0]
800d7e2: 3307 adds r3, #7
800d7e4: 781b ldrb r3, [r3, #0]
800d7e6: 021b lsls r3, r3, #8
800d7e8: b29b uxth r3, r3
800d7ea: 4413 add r3, r2
800d7ec: b29a uxth r2, r3
800d7ee: 687b ldr r3, [r7, #4]
800d7f0: 80da strh r2, [r3, #6]
}
800d7f2: bf00 nop
800d7f4: 370c adds r7, #12
800d7f6: 46bd mov sp, r7
800d7f8: bc80 pop {r7}
800d7fa: 4770 bx lr
0800d7fc <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d7fc: b580 push {r7, lr}
800d7fe: b082 sub sp, #8
800d800: af00 add r7, sp, #0
800d802: 6078 str r0, [r7, #4]
800d804: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
800d806: 2180 movs r1, #128 @ 0x80
800d808: 6878 ldr r0, [r7, #4]
800d80a: f000 fcd1 bl 800e1b0 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800d80e: 2100 movs r1, #0
800d810: 6878 ldr r0, [r7, #4]
800d812: f000 fccd bl 800e1b0 <USBD_LL_StallEP>
}
800d816: bf00 nop
800d818: 3708 adds r7, #8
800d81a: 46bd mov sp, r7
800d81c: bd80 pop {r7, pc}
0800d81e <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800d81e: b580 push {r7, lr}
800d820: b086 sub sp, #24
800d822: af00 add r7, sp, #0
800d824: 60f8 str r0, [r7, #12]
800d826: 60b9 str r1, [r7, #8]
800d828: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800d82a: 2300 movs r3, #0
800d82c: 75fb strb r3, [r7, #23]
if (desc != NULL)
800d82e: 68fb ldr r3, [r7, #12]
800d830: 2b00 cmp r3, #0
800d832: d032 beq.n 800d89a <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800d834: 68f8 ldr r0, [r7, #12]
800d836: f000 f834 bl 800d8a2 <USBD_GetLen>
800d83a: 4603 mov r3, r0
800d83c: 3301 adds r3, #1
800d83e: b29b uxth r3, r3
800d840: 005b lsls r3, r3, #1
800d842: b29a uxth r2, r3
800d844: 687b ldr r3, [r7, #4]
800d846: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800d848: 7dfb ldrb r3, [r7, #23]
800d84a: 1c5a adds r2, r3, #1
800d84c: 75fa strb r2, [r7, #23]
800d84e: 461a mov r2, r3
800d850: 68bb ldr r3, [r7, #8]
800d852: 4413 add r3, r2
800d854: 687a ldr r2, [r7, #4]
800d856: 7812 ldrb r2, [r2, #0]
800d858: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800d85a: 7dfb ldrb r3, [r7, #23]
800d85c: 1c5a adds r2, r3, #1
800d85e: 75fa strb r2, [r7, #23]
800d860: 461a mov r2, r3
800d862: 68bb ldr r3, [r7, #8]
800d864: 4413 add r3, r2
800d866: 2203 movs r2, #3
800d868: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d86a: e012 b.n 800d892 <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800d86c: 68fb ldr r3, [r7, #12]
800d86e: 1c5a adds r2, r3, #1
800d870: 60fa str r2, [r7, #12]
800d872: 7dfa ldrb r2, [r7, #23]
800d874: 1c51 adds r1, r2, #1
800d876: 75f9 strb r1, [r7, #23]
800d878: 4611 mov r1, r2
800d87a: 68ba ldr r2, [r7, #8]
800d87c: 440a add r2, r1
800d87e: 781b ldrb r3, [r3, #0]
800d880: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800d882: 7dfb ldrb r3, [r7, #23]
800d884: 1c5a adds r2, r3, #1
800d886: 75fa strb r2, [r7, #23]
800d888: 461a mov r2, r3
800d88a: 68bb ldr r3, [r7, #8]
800d88c: 4413 add r3, r2
800d88e: 2200 movs r2, #0
800d890: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d892: 68fb ldr r3, [r7, #12]
800d894: 781b ldrb r3, [r3, #0]
800d896: 2b00 cmp r3, #0
800d898: d1e8 bne.n 800d86c <USBD_GetString+0x4e>
}
}
}
800d89a: bf00 nop
800d89c: 3718 adds r7, #24
800d89e: 46bd mov sp, r7
800d8a0: bd80 pop {r7, pc}
0800d8a2 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800d8a2: b480 push {r7}
800d8a4: b085 sub sp, #20
800d8a6: af00 add r7, sp, #0
800d8a8: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800d8aa: 2300 movs r3, #0
800d8ac: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800d8ae: e005 b.n 800d8bc <USBD_GetLen+0x1a>
{
len++;
800d8b0: 7bfb ldrb r3, [r7, #15]
800d8b2: 3301 adds r3, #1
800d8b4: 73fb strb r3, [r7, #15]
buf++;
800d8b6: 687b ldr r3, [r7, #4]
800d8b8: 3301 adds r3, #1
800d8ba: 607b str r3, [r7, #4]
while (*buf != '\0')
800d8bc: 687b ldr r3, [r7, #4]
800d8be: 781b ldrb r3, [r3, #0]
800d8c0: 2b00 cmp r3, #0
800d8c2: d1f5 bne.n 800d8b0 <USBD_GetLen+0xe>
}
return len;
800d8c4: 7bfb ldrb r3, [r7, #15]
}
800d8c6: 4618 mov r0, r3
800d8c8: 3714 adds r7, #20
800d8ca: 46bd mov sp, r7
800d8cc: bc80 pop {r7}
800d8ce: 4770 bx lr
0800d8d0 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d8d0: b580 push {r7, lr}
800d8d2: b084 sub sp, #16
800d8d4: af00 add r7, sp, #0
800d8d6: 60f8 str r0, [r7, #12]
800d8d8: 60b9 str r1, [r7, #8]
800d8da: 4613 mov r3, r2
800d8dc: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800d8de: 68fb ldr r3, [r7, #12]
800d8e0: 2202 movs r2, #2
800d8e2: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800d8e6: 88fa ldrh r2, [r7, #6]
800d8e8: 68fb ldr r3, [r7, #12]
800d8ea: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800d8ec: 88fa ldrh r2, [r7, #6]
800d8ee: 68fb ldr r3, [r7, #12]
800d8f0: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d8f2: 88fb ldrh r3, [r7, #6]
800d8f4: 68ba ldr r2, [r7, #8]
800d8f6: 2100 movs r1, #0
800d8f8: 68f8 ldr r0, [r7, #12]
800d8fa: f000 fce1 bl 800e2c0 <USBD_LL_Transmit>
return USBD_OK;
800d8fe: 2300 movs r3, #0
}
800d900: 4618 mov r0, r3
800d902: 3710 adds r7, #16
800d904: 46bd mov sp, r7
800d906: bd80 pop {r7, pc}
0800d908 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d908: b580 push {r7, lr}
800d90a: b084 sub sp, #16
800d90c: af00 add r7, sp, #0
800d90e: 60f8 str r0, [r7, #12]
800d910: 60b9 str r1, [r7, #8]
800d912: 4613 mov r3, r2
800d914: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d916: 88fb ldrh r3, [r7, #6]
800d918: 68ba ldr r2, [r7, #8]
800d91a: 2100 movs r1, #0
800d91c: 68f8 ldr r0, [r7, #12]
800d91e: f000 fccf bl 800e2c0 <USBD_LL_Transmit>
return USBD_OK;
800d922: 2300 movs r3, #0
}
800d924: 4618 mov r0, r3
800d926: 3710 adds r7, #16
800d928: 46bd mov sp, r7
800d92a: bd80 pop {r7, pc}
0800d92c <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d92c: b580 push {r7, lr}
800d92e: b084 sub sp, #16
800d930: af00 add r7, sp, #0
800d932: 60f8 str r0, [r7, #12]
800d934: 60b9 str r1, [r7, #8]
800d936: 4613 mov r3, r2
800d938: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800d93a: 68fb ldr r3, [r7, #12]
800d93c: 2203 movs r2, #3
800d93e: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
800d942: 88fa ldrh r2, [r7, #6]
800d944: 68fb ldr r3, [r7, #12]
800d946: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800d94a: 88fa ldrh r2, [r7, #6]
800d94c: 68fb ldr r3, [r7, #12]
800d94e: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d952: 88fb ldrh r3, [r7, #6]
800d954: 68ba ldr r2, [r7, #8]
800d956: 2100 movs r1, #0
800d958: 68f8 ldr r0, [r7, #12]
800d95a: f000 fcd4 bl 800e306 <USBD_LL_PrepareReceive>
return USBD_OK;
800d95e: 2300 movs r3, #0
}
800d960: 4618 mov r0, r3
800d962: 3710 adds r7, #16
800d964: 46bd mov sp, r7
800d966: bd80 pop {r7, pc}
0800d968 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d968: b580 push {r7, lr}
800d96a: b084 sub sp, #16
800d96c: af00 add r7, sp, #0
800d96e: 60f8 str r0, [r7, #12]
800d970: 60b9 str r1, [r7, #8]
800d972: 4613 mov r3, r2
800d974: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d976: 88fb ldrh r3, [r7, #6]
800d978: 68ba ldr r2, [r7, #8]
800d97a: 2100 movs r1, #0
800d97c: 68f8 ldr r0, [r7, #12]
800d97e: f000 fcc2 bl 800e306 <USBD_LL_PrepareReceive>
return USBD_OK;
800d982: 2300 movs r3, #0
}
800d984: 4618 mov r0, r3
800d986: 3710 adds r7, #16
800d988: 46bd mov sp, r7
800d98a: bd80 pop {r7, pc}
0800d98c <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800d98c: b580 push {r7, lr}
800d98e: b082 sub sp, #8
800d990: af00 add r7, sp, #0
800d992: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800d994: 687b ldr r3, [r7, #4]
800d996: 2204 movs r2, #4
800d998: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800d99c: 2300 movs r3, #0
800d99e: 2200 movs r2, #0
800d9a0: 2100 movs r1, #0
800d9a2: 6878 ldr r0, [r7, #4]
800d9a4: f000 fc8c bl 800e2c0 <USBD_LL_Transmit>
return USBD_OK;
800d9a8: 2300 movs r3, #0
}
800d9aa: 4618 mov r0, r3
800d9ac: 3708 adds r7, #8
800d9ae: 46bd mov sp, r7
800d9b0: bd80 pop {r7, pc}
0800d9b2 <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800d9b2: b580 push {r7, lr}
800d9b4: b082 sub sp, #8
800d9b6: af00 add r7, sp, #0
800d9b8: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800d9ba: 687b ldr r3, [r7, #4]
800d9bc: 2205 movs r2, #5
800d9be: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800d9c2: 2300 movs r3, #0
800d9c4: 2200 movs r2, #0
800d9c6: 2100 movs r1, #0
800d9c8: 6878 ldr r0, [r7, #4]
800d9ca: f000 fc9c bl 800e306 <USBD_LL_PrepareReceive>
return USBD_OK;
800d9ce: 2300 movs r3, #0
}
800d9d0: 4618 mov r0, r3
800d9d2: 3708 adds r7, #8
800d9d4: 46bd mov sp, r7
800d9d6: bd80 pop {r7, pc}
0800d9d8 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800d9d8: b580 push {r7, lr}
800d9da: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
800d9dc: 2200 movs r2, #0
800d9de: 4912 ldr r1, [pc, #72] @ (800da28 <MX_USB_DEVICE_Init+0x50>)
800d9e0: 4812 ldr r0, [pc, #72] @ (800da2c <MX_USB_DEVICE_Init+0x54>)
800d9e2: f7fe ff62 bl 800c8aa <USBD_Init>
800d9e6: 4603 mov r3, r0
800d9e8: 2b00 cmp r3, #0
800d9ea: d001 beq.n 800d9f0 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
800d9ec: f7f5 fe6c bl 80036c8 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
800d9f0: 490f ldr r1, [pc, #60] @ (800da30 <MX_USB_DEVICE_Init+0x58>)
800d9f2: 480e ldr r0, [pc, #56] @ (800da2c <MX_USB_DEVICE_Init+0x54>)
800d9f4: f7fe ff84 bl 800c900 <USBD_RegisterClass>
800d9f8: 4603 mov r3, r0
800d9fa: 2b00 cmp r3, #0
800d9fc: d001 beq.n 800da02 <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800d9fe: f7f5 fe63 bl 80036c8 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
800da02: 490c ldr r1, [pc, #48] @ (800da34 <MX_USB_DEVICE_Init+0x5c>)
800da04: 4809 ldr r0, [pc, #36] @ (800da2c <MX_USB_DEVICE_Init+0x54>)
800da06: f7fe feb5 bl 800c774 <USBD_CDC_RegisterInterface>
800da0a: 4603 mov r3, r0
800da0c: 2b00 cmp r3, #0
800da0e: d001 beq.n 800da14 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
800da10: f7f5 fe5a bl 80036c8 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800da14: 4805 ldr r0, [pc, #20] @ (800da2c <MX_USB_DEVICE_Init+0x54>)
800da16: f7fe ff8c bl 800c932 <USBD_Start>
800da1a: 4603 mov r3, r0
800da1c: 2b00 cmp r3, #0
800da1e: d001 beq.n 800da24 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800da20: f7f5 fe52 bl 80036c8 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800da24: bf00 nop
800da26: bd80 pop {r7, pc}
800da28: 2000013c .word 0x2000013c
800da2c: 2000049c .word 0x2000049c
800da30: 20000028 .word 0x20000028
800da34: 2000012c .word 0x2000012c
0800da38 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
800da38: b480 push {r7}
800da3a: b085 sub sp, #20
800da3c: af00 add r7, sp, #0
800da3e: 6078 str r0, [r7, #4]
800da40: 6039 str r1, [r7, #0]
while (len--) {
800da42: e01e b.n 800da82 <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
800da44: 4b14 ldr r3, [pc, #80] @ (800da98 <fifo_push+0x60>)
800da46: 881b ldrh r3, [r3, #0]
800da48: b29b uxth r3, r3
800da4a: 3301 adds r3, #1
800da4c: b29b uxth r3, r3
800da4e: b2db uxtb r3, r3
800da50: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
800da52: 89fa ldrh r2, [r7, #14]
800da54: 4b11 ldr r3, [pc, #68] @ (800da9c <fifo_push+0x64>)
800da56: 881b ldrh r3, [r3, #0]
800da58: b29b uxth r3, r3
800da5a: b2db uxtb r3, r3
800da5c: 429a cmp r2, r3
800da5e: d103 bne.n 800da68 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
800da60: 687b ldr r3, [r7, #4]
800da62: 3301 adds r3, #1
800da64: 607b str r3, [r7, #4]
continue;
800da66: e00c b.n 800da82 <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800da68: 687b ldr r3, [r7, #4]
800da6a: 1c5a adds r2, r3, #1
800da6c: 607a str r2, [r7, #4]
800da6e: 4a0a ldr r2, [pc, #40] @ (800da98 <fifo_push+0x60>)
800da70: 8812 ldrh r2, [r2, #0]
800da72: b292 uxth r2, r2
800da74: b2d2 uxtb r2, r2
800da76: 7819 ldrb r1, [r3, #0]
800da78: 4b09 ldr r3, [pc, #36] @ (800daa0 <fifo_push+0x68>)
800da7a: 5499 strb r1, [r3, r2]
rx_head = next;
800da7c: 4a06 ldr r2, [pc, #24] @ (800da98 <fifo_push+0x60>)
800da7e: 89fb ldrh r3, [r7, #14]
800da80: 8013 strh r3, [r2, #0]
while (len--) {
800da82: 683b ldr r3, [r7, #0]
800da84: 1e5a subs r2, r3, #1
800da86: 603a str r2, [r7, #0]
800da88: 2b00 cmp r3, #0
800da8a: d1db bne.n 800da44 <fifo_push+0xc>
}
}
800da8c: bf00 nop
800da8e: bf00 nop
800da90: 3714 adds r7, #20
800da92: 46bd mov sp, r7
800da94: bc80 pop {r7}
800da96: 4770 bx lr
800da98: 20001060 .word 0x20001060
800da9c: 20001062 .word 0x20001062
800daa0: 20000f60 .word 0x20000f60
0800daa4 <CDC_Available>:
uint32_t CDC_Available(void) {
800daa4: b480 push {r7}
800daa6: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800daa8: 4b06 ldr r3, [pc, #24] @ (800dac4 <CDC_Available+0x20>)
800daaa: 881b ldrh r3, [r3, #0]
800daac: b29a uxth r2, r3
800daae: 4b06 ldr r3, [pc, #24] @ (800dac8 <CDC_Available+0x24>)
800dab0: 881b ldrh r3, [r3, #0]
800dab2: b29b uxth r3, r3
800dab4: 1ad3 subs r3, r2, r3
800dab6: b29b uxth r3, r3
800dab8: b2db uxtb r3, r3
}
800daba: 4618 mov r0, r3
800dabc: 46bd mov sp, r7
800dabe: bc80 pop {r7}
800dac0: 4770 bx lr
800dac2: bf00 nop
800dac4: 20001060 .word 0x20001060
800dac8: 20001062 .word 0x20001062
0800dacc <CDC_ReadByte>:
int CDC_ReadByte(void) {
800dacc: b480 push {r7}
800dace: b083 sub sp, #12
800dad0: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
800dad2: 4b10 ldr r3, [pc, #64] @ (800db14 <CDC_ReadByte+0x48>)
800dad4: 881b ldrh r3, [r3, #0]
800dad6: b29a uxth r2, r3
800dad8: 4b0f ldr r3, [pc, #60] @ (800db18 <CDC_ReadByte+0x4c>)
800dada: 881b ldrh r3, [r3, #0]
800dadc: b29b uxth r3, r3
800dade: 429a cmp r2, r3
800dae0: d102 bne.n 800dae8 <CDC_ReadByte+0x1c>
800dae2: f04f 33ff mov.w r3, #4294967295
800dae6: e010 b.n 800db0a <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
800dae8: 4b0a ldr r3, [pc, #40] @ (800db14 <CDC_ReadByte+0x48>)
800daea: 881b ldrh r3, [r3, #0]
800daec: b29b uxth r3, r3
800daee: b2db uxtb r3, r3
800daf0: 4a0a ldr r2, [pc, #40] @ (800db1c <CDC_ReadByte+0x50>)
800daf2: 5cd3 ldrb r3, [r2, r3]
800daf4: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
800daf6: 4b07 ldr r3, [pc, #28] @ (800db14 <CDC_ReadByte+0x48>)
800daf8: 881b ldrh r3, [r3, #0]
800dafa: b29b uxth r3, r3
800dafc: 3301 adds r3, #1
800dafe: b29b uxth r3, r3
800db00: b2db uxtb r3, r3
800db02: b29a uxth r2, r3
800db04: 4b03 ldr r3, [pc, #12] @ (800db14 <CDC_ReadByte+0x48>)
800db06: 801a strh r2, [r3, #0]
return b;
800db08: 687b ldr r3, [r7, #4]
}
800db0a: 4618 mov r0, r3
800db0c: 370c adds r7, #12
800db0e: 46bd mov sp, r7
800db10: bc80 pop {r7}
800db12: 4770 bx lr
800db14: 20001062 .word 0x20001062
800db18: 20001060 .word 0x20001060
800db1c: 20000f60 .word 0x20000f60
0800db20 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
800db20: b580 push {r7, lr}
800db22: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
800db24: 2200 movs r2, #0
800db26: 4905 ldr r1, [pc, #20] @ (800db3c <CDC_Init_FS+0x1c>)
800db28: 4805 ldr r0, [pc, #20] @ (800db40 <CDC_Init_FS+0x20>)
800db2a: f7fe fe39 bl 800c7a0 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800db2e: 4905 ldr r1, [pc, #20] @ (800db44 <CDC_Init_FS+0x24>)
800db30: 4803 ldr r0, [pc, #12] @ (800db40 <CDC_Init_FS+0x20>)
800db32: f7fe fe4e bl 800c7d2 <USBD_CDC_SetRxBuffer>
return (USBD_OK);
800db36: 2300 movs r3, #0
/* USER CODE END 3 */
}
800db38: 4618 mov r0, r3
800db3a: bd80 pop {r7, pc}
800db3c: 20000b60 .word 0x20000b60
800db40: 2000049c .word 0x2000049c
800db44: 20000760 .word 0x20000760
0800db48 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800db48: b480 push {r7}
800db4a: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800db4c: 2300 movs r3, #0
/* USER CODE END 4 */
}
800db4e: 4618 mov r0, r3
800db50: 46bd mov sp, r7
800db52: bc80 pop {r7}
800db54: 4770 bx lr
...
0800db58 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800db58: b480 push {r7}
800db5a: b083 sub sp, #12
800db5c: af00 add r7, sp, #0
800db5e: 4603 mov r3, r0
800db60: 6039 str r1, [r7, #0]
800db62: 71fb strb r3, [r7, #7]
800db64: 4613 mov r3, r2
800db66: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800db68: 79fb ldrb r3, [r7, #7]
800db6a: 2b23 cmp r3, #35 @ 0x23
800db6c: d84a bhi.n 800dc04 <CDC_Control_FS+0xac>
800db6e: a201 add r2, pc, #4 @ (adr r2, 800db74 <CDC_Control_FS+0x1c>)
800db70: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800db74: 0800dc05 .word 0x0800dc05
800db78: 0800dc05 .word 0x0800dc05
800db7c: 0800dc05 .word 0x0800dc05
800db80: 0800dc05 .word 0x0800dc05
800db84: 0800dc05 .word 0x0800dc05
800db88: 0800dc05 .word 0x0800dc05
800db8c: 0800dc05 .word 0x0800dc05
800db90: 0800dc05 .word 0x0800dc05
800db94: 0800dc05 .word 0x0800dc05
800db98: 0800dc05 .word 0x0800dc05
800db9c: 0800dc05 .word 0x0800dc05
800dba0: 0800dc05 .word 0x0800dc05
800dba4: 0800dc05 .word 0x0800dc05
800dba8: 0800dc05 .word 0x0800dc05
800dbac: 0800dc05 .word 0x0800dc05
800dbb0: 0800dc05 .word 0x0800dc05
800dbb4: 0800dc05 .word 0x0800dc05
800dbb8: 0800dc05 .word 0x0800dc05
800dbbc: 0800dc05 .word 0x0800dc05
800dbc0: 0800dc05 .word 0x0800dc05
800dbc4: 0800dc05 .word 0x0800dc05
800dbc8: 0800dc05 .word 0x0800dc05
800dbcc: 0800dc05 .word 0x0800dc05
800dbd0: 0800dc05 .word 0x0800dc05
800dbd4: 0800dc05 .word 0x0800dc05
800dbd8: 0800dc05 .word 0x0800dc05
800dbdc: 0800dc05 .word 0x0800dc05
800dbe0: 0800dc05 .word 0x0800dc05
800dbe4: 0800dc05 .word 0x0800dc05
800dbe8: 0800dc05 .word 0x0800dc05
800dbec: 0800dc05 .word 0x0800dc05
800dbf0: 0800dc05 .word 0x0800dc05
800dbf4: 0800dc05 .word 0x0800dc05
800dbf8: 0800dc05 .word 0x0800dc05
800dbfc: 0800dc05 .word 0x0800dc05
800dc00: 0800dc05 .word 0x0800dc05
case CDC_SEND_BREAK:
break;
default:
break;
800dc04: bf00 nop
}
return (USBD_OK);
800dc06: 2300 movs r3, #0
/* USER CODE END 5 */
}
800dc08: 4618 mov r0, r3
800dc0a: 370c adds r7, #12
800dc0c: 46bd mov sp, r7
800dc0e: bc80 pop {r7}
800dc10: 4770 bx lr
800dc12: bf00 nop
0800dc14 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800dc14: b580 push {r7, lr}
800dc16: b082 sub sp, #8
800dc18: af00 add r7, sp, #0
800dc1a: 6078 str r0, [r7, #4]
800dc1c: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800dc1e: 683b ldr r3, [r7, #0]
800dc20: 681b ldr r3, [r3, #0]
800dc22: 2b00 cmp r3, #0
800dc24: d005 beq.n 800dc32 <CDC_Receive_FS+0x1e>
800dc26: 683b ldr r3, [r7, #0]
800dc28: 681b ldr r3, [r3, #0]
800dc2a: 4619 mov r1, r3
800dc2c: 6878 ldr r0, [r7, #4]
800dc2e: f7ff ff03 bl 800da38 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800dc32: 6879 ldr r1, [r7, #4]
800dc34: 4805 ldr r0, [pc, #20] @ (800dc4c <CDC_Receive_FS+0x38>)
800dc36: f7fe fdcc bl 800c7d2 <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800dc3a: 4804 ldr r0, [pc, #16] @ (800dc4c <CDC_Receive_FS+0x38>)
800dc3c: f7fe fe0b bl 800c856 <USBD_CDC_ReceivePacket>
return (USBD_OK);
800dc40: 2300 movs r3, #0
/* USER CODE END 6 */
}
800dc42: 4618 mov r0, r3
800dc44: 3708 adds r7, #8
800dc46: 46bd mov sp, r7
800dc48: bd80 pop {r7, pc}
800dc4a: bf00 nop
800dc4c: 2000049c .word 0x2000049c
0800dc50 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
800dc50: b580 push {r7, lr}
800dc52: b084 sub sp, #16
800dc54: af00 add r7, sp, #0
800dc56: 6078 str r0, [r7, #4]
800dc58: 460b mov r3, r1
800dc5a: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800dc5c: 2300 movs r3, #0
800dc5e: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800dc60: 4b0d ldr r3, [pc, #52] @ (800dc98 <CDC_Transmit_FS+0x48>)
800dc62: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800dc66: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800dc68: 68bb ldr r3, [r7, #8]
800dc6a: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800dc6e: 2b00 cmp r3, #0
800dc70: d001 beq.n 800dc76 <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800dc72: 2301 movs r3, #1
800dc74: e00b b.n 800dc8e <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800dc76: 887b ldrh r3, [r7, #2]
800dc78: 461a mov r2, r3
800dc7a: 6879 ldr r1, [r7, #4]
800dc7c: 4806 ldr r0, [pc, #24] @ (800dc98 <CDC_Transmit_FS+0x48>)
800dc7e: f7fe fd8f bl 800c7a0 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800dc82: 4805 ldr r0, [pc, #20] @ (800dc98 <CDC_Transmit_FS+0x48>)
800dc84: f7fe fdb8 bl 800c7f8 <USBD_CDC_TransmitPacket>
800dc88: 4603 mov r3, r0
800dc8a: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800dc8c: 7bfb ldrb r3, [r7, #15]
}
800dc8e: 4618 mov r0, r3
800dc90: 3710 adds r7, #16
800dc92: 46bd mov sp, r7
800dc94: bd80 pop {r7, pc}
800dc96: bf00 nop
800dc98: 2000049c .word 0x2000049c
0800dc9c <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dc9c: b480 push {r7}
800dc9e: b083 sub sp, #12
800dca0: af00 add r7, sp, #0
800dca2: 4603 mov r3, r0
800dca4: 6039 str r1, [r7, #0]
800dca6: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800dca8: 683b ldr r3, [r7, #0]
800dcaa: 2212 movs r2, #18
800dcac: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800dcae: 4b03 ldr r3, [pc, #12] @ (800dcbc <USBD_FS_DeviceDescriptor+0x20>)
}
800dcb0: 4618 mov r0, r3
800dcb2: 370c adds r7, #12
800dcb4: 46bd mov sp, r7
800dcb6: bc80 pop {r7}
800dcb8: 4770 bx lr
800dcba: bf00 nop
800dcbc: 20000158 .word 0x20000158
0800dcc0 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dcc0: b480 push {r7}
800dcc2: b083 sub sp, #12
800dcc4: af00 add r7, sp, #0
800dcc6: 4603 mov r3, r0
800dcc8: 6039 str r1, [r7, #0]
800dcca: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
800dccc: 683b ldr r3, [r7, #0]
800dcce: 2204 movs r2, #4
800dcd0: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
800dcd2: 4b03 ldr r3, [pc, #12] @ (800dce0 <USBD_FS_LangIDStrDescriptor+0x20>)
}
800dcd4: 4618 mov r0, r3
800dcd6: 370c adds r7, #12
800dcd8: 46bd mov sp, r7
800dcda: bc80 pop {r7}
800dcdc: 4770 bx lr
800dcde: bf00 nop
800dce0: 2000016c .word 0x2000016c
0800dce4 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dce4: b580 push {r7, lr}
800dce6: b082 sub sp, #8
800dce8: af00 add r7, sp, #0
800dcea: 4603 mov r3, r0
800dcec: 6039 str r1, [r7, #0]
800dcee: 71fb strb r3, [r7, #7]
if(speed == 0)
800dcf0: 79fb ldrb r3, [r7, #7]
800dcf2: 2b00 cmp r3, #0
800dcf4: d105 bne.n 800dd02 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800dcf6: 683a ldr r2, [r7, #0]
800dcf8: 4907 ldr r1, [pc, #28] @ (800dd18 <USBD_FS_ProductStrDescriptor+0x34>)
800dcfa: 4808 ldr r0, [pc, #32] @ (800dd1c <USBD_FS_ProductStrDescriptor+0x38>)
800dcfc: f7ff fd8f bl 800d81e <USBD_GetString>
800dd00: e004 b.n 800dd0c <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800dd02: 683a ldr r2, [r7, #0]
800dd04: 4904 ldr r1, [pc, #16] @ (800dd18 <USBD_FS_ProductStrDescriptor+0x34>)
800dd06: 4805 ldr r0, [pc, #20] @ (800dd1c <USBD_FS_ProductStrDescriptor+0x38>)
800dd08: f7ff fd89 bl 800d81e <USBD_GetString>
}
return USBD_StrDesc;
800dd0c: 4b02 ldr r3, [pc, #8] @ (800dd18 <USBD_FS_ProductStrDescriptor+0x34>)
}
800dd0e: 4618 mov r0, r3
800dd10: 3708 adds r7, #8
800dd12: 46bd mov sp, r7
800dd14: bd80 pop {r7, pc}
800dd16: bf00 nop
800dd18: 20001064 .word 0x20001064
800dd1c: 0800f3c8 .word 0x0800f3c8
0800dd20 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dd20: b580 push {r7, lr}
800dd22: b082 sub sp, #8
800dd24: af00 add r7, sp, #0
800dd26: 4603 mov r3, r0
800dd28: 6039 str r1, [r7, #0]
800dd2a: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800dd2c: 683a ldr r2, [r7, #0]
800dd2e: 4904 ldr r1, [pc, #16] @ (800dd40 <USBD_FS_ManufacturerStrDescriptor+0x20>)
800dd30: 4804 ldr r0, [pc, #16] @ (800dd44 <USBD_FS_ManufacturerStrDescriptor+0x24>)
800dd32: f7ff fd74 bl 800d81e <USBD_GetString>
return USBD_StrDesc;
800dd36: 4b02 ldr r3, [pc, #8] @ (800dd40 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800dd38: 4618 mov r0, r3
800dd3a: 3708 adds r7, #8
800dd3c: 46bd mov sp, r7
800dd3e: bd80 pop {r7, pc}
800dd40: 20001064 .word 0x20001064
800dd44: 0800f3e0 .word 0x0800f3e0
0800dd48 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dd48: b580 push {r7, lr}
800dd4a: b082 sub sp, #8
800dd4c: af00 add r7, sp, #0
800dd4e: 4603 mov r3, r0
800dd50: 6039 str r1, [r7, #0]
800dd52: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800dd54: 683b ldr r3, [r7, #0]
800dd56: 221a movs r2, #26
800dd58: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800dd5a: f000 f843 bl 800dde4 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800dd5e: 4b02 ldr r3, [pc, #8] @ (800dd68 <USBD_FS_SerialStrDescriptor+0x20>)
}
800dd60: 4618 mov r0, r3
800dd62: 3708 adds r7, #8
800dd64: 46bd mov sp, r7
800dd66: bd80 pop {r7, pc}
800dd68: 20000170 .word 0x20000170
0800dd6c <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dd6c: b580 push {r7, lr}
800dd6e: b082 sub sp, #8
800dd70: af00 add r7, sp, #0
800dd72: 4603 mov r3, r0
800dd74: 6039 str r1, [r7, #0]
800dd76: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800dd78: 79fb ldrb r3, [r7, #7]
800dd7a: 2b00 cmp r3, #0
800dd7c: d105 bne.n 800dd8a <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800dd7e: 683a ldr r2, [r7, #0]
800dd80: 4907 ldr r1, [pc, #28] @ (800dda0 <USBD_FS_ConfigStrDescriptor+0x34>)
800dd82: 4808 ldr r0, [pc, #32] @ (800dda4 <USBD_FS_ConfigStrDescriptor+0x38>)
800dd84: f7ff fd4b bl 800d81e <USBD_GetString>
800dd88: e004 b.n 800dd94 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800dd8a: 683a ldr r2, [r7, #0]
800dd8c: 4904 ldr r1, [pc, #16] @ (800dda0 <USBD_FS_ConfigStrDescriptor+0x34>)
800dd8e: 4805 ldr r0, [pc, #20] @ (800dda4 <USBD_FS_ConfigStrDescriptor+0x38>)
800dd90: f7ff fd45 bl 800d81e <USBD_GetString>
}
return USBD_StrDesc;
800dd94: 4b02 ldr r3, [pc, #8] @ (800dda0 <USBD_FS_ConfigStrDescriptor+0x34>)
}
800dd96: 4618 mov r0, r3
800dd98: 3708 adds r7, #8
800dd9a: 46bd mov sp, r7
800dd9c: bd80 pop {r7, pc}
800dd9e: bf00 nop
800dda0: 20001064 .word 0x20001064
800dda4: 0800f3f4 .word 0x0800f3f4
0800dda8 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dda8: b580 push {r7, lr}
800ddaa: b082 sub sp, #8
800ddac: af00 add r7, sp, #0
800ddae: 4603 mov r3, r0
800ddb0: 6039 str r1, [r7, #0]
800ddb2: 71fb strb r3, [r7, #7]
if(speed == 0)
800ddb4: 79fb ldrb r3, [r7, #7]
800ddb6: 2b00 cmp r3, #0
800ddb8: d105 bne.n 800ddc6 <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800ddba: 683a ldr r2, [r7, #0]
800ddbc: 4907 ldr r1, [pc, #28] @ (800dddc <USBD_FS_InterfaceStrDescriptor+0x34>)
800ddbe: 4808 ldr r0, [pc, #32] @ (800dde0 <USBD_FS_InterfaceStrDescriptor+0x38>)
800ddc0: f7ff fd2d bl 800d81e <USBD_GetString>
800ddc4: e004 b.n 800ddd0 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800ddc6: 683a ldr r2, [r7, #0]
800ddc8: 4904 ldr r1, [pc, #16] @ (800dddc <USBD_FS_InterfaceStrDescriptor+0x34>)
800ddca: 4805 ldr r0, [pc, #20] @ (800dde0 <USBD_FS_InterfaceStrDescriptor+0x38>)
800ddcc: f7ff fd27 bl 800d81e <USBD_GetString>
}
return USBD_StrDesc;
800ddd0: 4b02 ldr r3, [pc, #8] @ (800dddc <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800ddd2: 4618 mov r0, r3
800ddd4: 3708 adds r7, #8
800ddd6: 46bd mov sp, r7
800ddd8: bd80 pop {r7, pc}
800ddda: bf00 nop
800dddc: 20001064 .word 0x20001064
800dde0: 0800f400 .word 0x0800f400
0800dde4 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800dde4: b580 push {r7, lr}
800dde6: b084 sub sp, #16
800dde8: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800ddea: 4b0f ldr r3, [pc, #60] @ (800de28 <Get_SerialNum+0x44>)
800ddec: 681b ldr r3, [r3, #0]
800ddee: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800ddf0: 4b0e ldr r3, [pc, #56] @ (800de2c <Get_SerialNum+0x48>)
800ddf2: 681b ldr r3, [r3, #0]
800ddf4: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800ddf6: 4b0e ldr r3, [pc, #56] @ (800de30 <Get_SerialNum+0x4c>)
800ddf8: 681b ldr r3, [r3, #0]
800ddfa: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800ddfc: 68fa ldr r2, [r7, #12]
800ddfe: 687b ldr r3, [r7, #4]
800de00: 4413 add r3, r2
800de02: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800de04: 68fb ldr r3, [r7, #12]
800de06: 2b00 cmp r3, #0
800de08: d009 beq.n 800de1e <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800de0a: 2208 movs r2, #8
800de0c: 4909 ldr r1, [pc, #36] @ (800de34 <Get_SerialNum+0x50>)
800de0e: 68f8 ldr r0, [r7, #12]
800de10: f000 f814 bl 800de3c <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800de14: 2204 movs r2, #4
800de16: 4908 ldr r1, [pc, #32] @ (800de38 <Get_SerialNum+0x54>)
800de18: 68b8 ldr r0, [r7, #8]
800de1a: f000 f80f bl 800de3c <IntToUnicode>
}
}
800de1e: bf00 nop
800de20: 3710 adds r7, #16
800de22: 46bd mov sp, r7
800de24: bd80 pop {r7, pc}
800de26: bf00 nop
800de28: 1ffff7e8 .word 0x1ffff7e8
800de2c: 1ffff7ec .word 0x1ffff7ec
800de30: 1ffff7f0 .word 0x1ffff7f0
800de34: 20000172 .word 0x20000172
800de38: 20000182 .word 0x20000182
0800de3c <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800de3c: b480 push {r7}
800de3e: b087 sub sp, #28
800de40: af00 add r7, sp, #0
800de42: 60f8 str r0, [r7, #12]
800de44: 60b9 str r1, [r7, #8]
800de46: 4613 mov r3, r2
800de48: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800de4a: 2300 movs r3, #0
800de4c: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800de4e: 2300 movs r3, #0
800de50: 75fb strb r3, [r7, #23]
800de52: e027 b.n 800dea4 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800de54: 68fb ldr r3, [r7, #12]
800de56: 0f1b lsrs r3, r3, #28
800de58: 2b09 cmp r3, #9
800de5a: d80b bhi.n 800de74 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800de5c: 68fb ldr r3, [r7, #12]
800de5e: 0f1b lsrs r3, r3, #28
800de60: b2da uxtb r2, r3
800de62: 7dfb ldrb r3, [r7, #23]
800de64: 005b lsls r3, r3, #1
800de66: 4619 mov r1, r3
800de68: 68bb ldr r3, [r7, #8]
800de6a: 440b add r3, r1
800de6c: 3230 adds r2, #48 @ 0x30
800de6e: b2d2 uxtb r2, r2
800de70: 701a strb r2, [r3, #0]
800de72: e00a b.n 800de8a <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800de74: 68fb ldr r3, [r7, #12]
800de76: 0f1b lsrs r3, r3, #28
800de78: b2da uxtb r2, r3
800de7a: 7dfb ldrb r3, [r7, #23]
800de7c: 005b lsls r3, r3, #1
800de7e: 4619 mov r1, r3
800de80: 68bb ldr r3, [r7, #8]
800de82: 440b add r3, r1
800de84: 3237 adds r2, #55 @ 0x37
800de86: b2d2 uxtb r2, r2
800de88: 701a strb r2, [r3, #0]
}
value = value << 4;
800de8a: 68fb ldr r3, [r7, #12]
800de8c: 011b lsls r3, r3, #4
800de8e: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800de90: 7dfb ldrb r3, [r7, #23]
800de92: 005b lsls r3, r3, #1
800de94: 3301 adds r3, #1
800de96: 68ba ldr r2, [r7, #8]
800de98: 4413 add r3, r2
800de9a: 2200 movs r2, #0
800de9c: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800de9e: 7dfb ldrb r3, [r7, #23]
800dea0: 3301 adds r3, #1
800dea2: 75fb strb r3, [r7, #23]
800dea4: 7dfa ldrb r2, [r7, #23]
800dea6: 79fb ldrb r3, [r7, #7]
800dea8: 429a cmp r2, r3
800deaa: d3d3 bcc.n 800de54 <IntToUnicode+0x18>
}
}
800deac: bf00 nop
800deae: bf00 nop
800deb0: 371c adds r7, #28
800deb2: 46bd mov sp, r7
800deb4: bc80 pop {r7}
800deb6: 4770 bx lr
0800deb8 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800deb8: b580 push {r7, lr}
800deba: b084 sub sp, #16
800debc: af00 add r7, sp, #0
800debe: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800dec0: 687b ldr r3, [r7, #4]
800dec2: 681b ldr r3, [r3, #0]
800dec4: 4a0d ldr r2, [pc, #52] @ (800defc <HAL_PCD_MspInit+0x44>)
800dec6: 4293 cmp r3, r2
800dec8: d113 bne.n 800def2 <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800deca: 4b0d ldr r3, [pc, #52] @ (800df00 <HAL_PCD_MspInit+0x48>)
800decc: 69db ldr r3, [r3, #28]
800dece: 4a0c ldr r2, [pc, #48] @ (800df00 <HAL_PCD_MspInit+0x48>)
800ded0: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800ded4: 61d3 str r3, [r2, #28]
800ded6: 4b0a ldr r3, [pc, #40] @ (800df00 <HAL_PCD_MspInit+0x48>)
800ded8: 69db ldr r3, [r3, #28]
800deda: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800dede: 60fb str r3, [r7, #12]
800dee0: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800dee2: 2200 movs r2, #0
800dee4: 2100 movs r1, #0
800dee6: 2014 movs r0, #20
800dee8: f7f7 fddb bl 8005aa2 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800deec: 2014 movs r0, #20
800deee: f7f7 fdf4 bl 8005ada <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800def2: bf00 nop
800def4: 3710 adds r7, #16
800def6: 46bd mov sp, r7
800def8: bd80 pop {r7, pc}
800defa: bf00 nop
800defc: 40005c00 .word 0x40005c00
800df00: 40021000 .word 0x40021000
0800df04 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df04: b580 push {r7, lr}
800df06: b082 sub sp, #8
800df08: af00 add r7, sp, #0
800df0a: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800df0c: 687b ldr r3, [r7, #4]
800df0e: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800df12: 687b ldr r3, [r7, #4]
800df14: f503 7326 add.w r3, r3, #664 @ 0x298
800df18: 4619 mov r1, r3
800df1a: 4610 mov r0, r2
800df1c: f7fe fd51 bl 800c9c2 <USBD_LL_SetupStage>
}
800df20: bf00 nop
800df22: 3708 adds r7, #8
800df24: 46bd mov sp, r7
800df26: bd80 pop {r7, pc}
0800df28 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df28: b580 push {r7, lr}
800df2a: b082 sub sp, #8
800df2c: af00 add r7, sp, #0
800df2e: 6078 str r0, [r7, #4]
800df30: 460b mov r3, r1
800df32: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800df34: 687b ldr r3, [r7, #4]
800df36: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800df3a: 78fa ldrb r2, [r7, #3]
800df3c: 6879 ldr r1, [r7, #4]
800df3e: 4613 mov r3, r2
800df40: 009b lsls r3, r3, #2
800df42: 4413 add r3, r2
800df44: 00db lsls r3, r3, #3
800df46: 440b add r3, r1
800df48: f503 73b2 add.w r3, r3, #356 @ 0x164
800df4c: 681a ldr r2, [r3, #0]
800df4e: 78fb ldrb r3, [r7, #3]
800df50: 4619 mov r1, r3
800df52: f7fe fd83 bl 800ca5c <USBD_LL_DataOutStage>
}
800df56: bf00 nop
800df58: 3708 adds r7, #8
800df5a: 46bd mov sp, r7
800df5c: bd80 pop {r7, pc}
0800df5e <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df5e: b580 push {r7, lr}
800df60: b082 sub sp, #8
800df62: af00 add r7, sp, #0
800df64: 6078 str r0, [r7, #4]
800df66: 460b mov r3, r1
800df68: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800df6a: 687b ldr r3, [r7, #4]
800df6c: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800df70: 78fa ldrb r2, [r7, #3]
800df72: 6879 ldr r1, [r7, #4]
800df74: 4613 mov r3, r2
800df76: 009b lsls r3, r3, #2
800df78: 4413 add r3, r2
800df7a: 00db lsls r3, r3, #3
800df7c: 440b add r3, r1
800df7e: 3324 adds r3, #36 @ 0x24
800df80: 681a ldr r2, [r3, #0]
800df82: 78fb ldrb r3, [r7, #3]
800df84: 4619 mov r1, r3
800df86: f7fe fdda bl 800cb3e <USBD_LL_DataInStage>
}
800df8a: bf00 nop
800df8c: 3708 adds r7, #8
800df8e: 46bd mov sp, r7
800df90: bd80 pop {r7, pc}
0800df92 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df92: b580 push {r7, lr}
800df94: b082 sub sp, #8
800df96: af00 add r7, sp, #0
800df98: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800df9a: 687b ldr r3, [r7, #4]
800df9c: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800dfa0: 4618 mov r0, r3
800dfa2: f7fe feea bl 800cd7a <USBD_LL_SOF>
}
800dfa6: bf00 nop
800dfa8: 3708 adds r7, #8
800dfaa: 46bd mov sp, r7
800dfac: bd80 pop {r7, pc}
0800dfae <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800dfae: b580 push {r7, lr}
800dfb0: b084 sub sp, #16
800dfb2: af00 add r7, sp, #0
800dfb4: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800dfb6: 2301 movs r3, #1
800dfb8: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800dfba: 687b ldr r3, [r7, #4]
800dfbc: 799b ldrb r3, [r3, #6]
800dfbe: 2b02 cmp r3, #2
800dfc0: d001 beq.n 800dfc6 <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800dfc2: f7f5 fb81 bl 80036c8 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800dfc6: 687b ldr r3, [r7, #4]
800dfc8: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800dfcc: 7bfa ldrb r2, [r7, #15]
800dfce: 4611 mov r1, r2
800dfd0: 4618 mov r0, r3
800dfd2: f7fe fe9a bl 800cd0a <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800dfd6: 687b ldr r3, [r7, #4]
800dfd8: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800dfdc: 4618 mov r0, r3
800dfde: f7fe fe53 bl 800cc88 <USBD_LL_Reset>
}
800dfe2: bf00 nop
800dfe4: 3710 adds r7, #16
800dfe6: 46bd mov sp, r7
800dfe8: bd80 pop {r7, pc}
...
0800dfec <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800dfec: b580 push {r7, lr}
800dfee: b082 sub sp, #8
800dff0: af00 add r7, sp, #0
800dff2: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800dff4: 687b ldr r3, [r7, #4]
800dff6: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800dffa: 4618 mov r0, r3
800dffc: f7fe fe94 bl 800cd28 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800e000: 687b ldr r3, [r7, #4]
800e002: 7a9b ldrb r3, [r3, #10]
800e004: 2b00 cmp r3, #0
800e006: d005 beq.n 800e014 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800e008: 4b04 ldr r3, [pc, #16] @ (800e01c <HAL_PCD_SuspendCallback+0x30>)
800e00a: 691b ldr r3, [r3, #16]
800e00c: 4a03 ldr r2, [pc, #12] @ (800e01c <HAL_PCD_SuspendCallback+0x30>)
800e00e: f043 0306 orr.w r3, r3, #6
800e012: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800e014: bf00 nop
800e016: 3708 adds r7, #8
800e018: 46bd mov sp, r7
800e01a: bd80 pop {r7, pc}
800e01c: e000ed00 .word 0xe000ed00
0800e020 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e020: b580 push {r7, lr}
800e022: b082 sub sp, #8
800e024: af00 add r7, sp, #0
800e026: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800e028: 687b ldr r3, [r7, #4]
800e02a: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800e02e: 4618 mov r0, r3
800e030: f7fe fe8e bl 800cd50 <USBD_LL_Resume>
}
800e034: bf00 nop
800e036: 3708 adds r7, #8
800e038: 46bd mov sp, r7
800e03a: bd80 pop {r7, pc}
0800e03c <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800e03c: b580 push {r7, lr}
800e03e: b082 sub sp, #8
800e040: af00 add r7, sp, #0
800e042: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800e044: 4a28 ldr r2, [pc, #160] @ (800e0e8 <USBD_LL_Init+0xac>)
800e046: 687b ldr r3, [r7, #4]
800e048: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800e04c: 687b ldr r3, [r7, #4]
800e04e: 4a26 ldr r2, [pc, #152] @ (800e0e8 <USBD_LL_Init+0xac>)
800e050: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800e054: 4b24 ldr r3, [pc, #144] @ (800e0e8 <USBD_LL_Init+0xac>)
800e056: 4a25 ldr r2, [pc, #148] @ (800e0ec <USBD_LL_Init+0xb0>)
800e058: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800e05a: 4b23 ldr r3, [pc, #140] @ (800e0e8 <USBD_LL_Init+0xac>)
800e05c: 2208 movs r2, #8
800e05e: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800e060: 4b21 ldr r3, [pc, #132] @ (800e0e8 <USBD_LL_Init+0xac>)
800e062: 2202 movs r2, #2
800e064: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800e066: 4b20 ldr r3, [pc, #128] @ (800e0e8 <USBD_LL_Init+0xac>)
800e068: 2200 movs r2, #0
800e06a: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800e06c: 4b1e ldr r3, [pc, #120] @ (800e0e8 <USBD_LL_Init+0xac>)
800e06e: 2200 movs r2, #0
800e070: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800e072: 4b1d ldr r3, [pc, #116] @ (800e0e8 <USBD_LL_Init+0xac>)
800e074: 2200 movs r2, #0
800e076: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800e078: 481b ldr r0, [pc, #108] @ (800e0e8 <USBD_LL_Init+0xac>)
800e07a: f7f8 faf0 bl 800665e <HAL_PCD_Init>
800e07e: 4603 mov r3, r0
800e080: 2b00 cmp r3, #0
800e082: d001 beq.n 800e088 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800e084: f7f5 fb20 bl 80036c8 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800e088: 687b ldr r3, [r7, #4]
800e08a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e08e: 2318 movs r3, #24
800e090: 2200 movs r2, #0
800e092: 2100 movs r1, #0
800e094: f7fa f801 bl 800809a <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800e098: 687b ldr r3, [r7, #4]
800e09a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e09e: 2358 movs r3, #88 @ 0x58
800e0a0: 2200 movs r2, #0
800e0a2: 2180 movs r1, #128 @ 0x80
800e0a4: f7f9 fff9 bl 800809a <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800e0a8: 687b ldr r3, [r7, #4]
800e0aa: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e0ae: 23c0 movs r3, #192 @ 0xc0
800e0b0: 2200 movs r2, #0
800e0b2: 2181 movs r1, #129 @ 0x81
800e0b4: f7f9 fff1 bl 800809a <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800e0b8: 687b ldr r3, [r7, #4]
800e0ba: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e0be: f44f 7388 mov.w r3, #272 @ 0x110
800e0c2: 2200 movs r2, #0
800e0c4: 2101 movs r1, #1
800e0c6: f7f9 ffe8 bl 800809a <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800e0ca: 687b ldr r3, [r7, #4]
800e0cc: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e0d0: f44f 7380 mov.w r3, #256 @ 0x100
800e0d4: 2200 movs r2, #0
800e0d6: 2182 movs r1, #130 @ 0x82
800e0d8: f7f9 ffdf bl 800809a <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800e0dc: 2300 movs r3, #0
}
800e0de: 4618 mov r0, r3
800e0e0: 3708 adds r7, #8
800e0e2: 46bd mov sp, r7
800e0e4: bd80 pop {r7, pc}
800e0e6: bf00 nop
800e0e8: 20001264 .word 0x20001264
800e0ec: 40005c00 .word 0x40005c00
0800e0f0 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800e0f0: b580 push {r7, lr}
800e0f2: b084 sub sp, #16
800e0f4: af00 add r7, sp, #0
800e0f6: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800e0f8: 2300 movs r3, #0
800e0fa: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e0fc: 2300 movs r3, #0
800e0fe: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800e100: 687b ldr r3, [r7, #4]
800e102: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e106: 4618 mov r0, r3
800e108: f7f8 fb9f bl 800684a <HAL_PCD_Start>
800e10c: 4603 mov r3, r0
800e10e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e110: 7bfb ldrb r3, [r7, #15]
800e112: 4618 mov r0, r3
800e114: f000 f94e bl 800e3b4 <USBD_Get_USB_Status>
800e118: 4603 mov r3, r0
800e11a: 73bb strb r3, [r7, #14]
return usb_status;
800e11c: 7bbb ldrb r3, [r7, #14]
}
800e11e: 4618 mov r0, r3
800e120: 3710 adds r7, #16
800e122: 46bd mov sp, r7
800e124: bd80 pop {r7, pc}
0800e126 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800e126: b580 push {r7, lr}
800e128: b084 sub sp, #16
800e12a: af00 add r7, sp, #0
800e12c: 6078 str r0, [r7, #4]
800e12e: 4608 mov r0, r1
800e130: 4611 mov r1, r2
800e132: 461a mov r2, r3
800e134: 4603 mov r3, r0
800e136: 70fb strb r3, [r7, #3]
800e138: 460b mov r3, r1
800e13a: 70bb strb r3, [r7, #2]
800e13c: 4613 mov r3, r2
800e13e: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800e140: 2300 movs r3, #0
800e142: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e144: 2300 movs r3, #0
800e146: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800e148: 687b ldr r3, [r7, #4]
800e14a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e14e: 78bb ldrb r3, [r7, #2]
800e150: 883a ldrh r2, [r7, #0]
800e152: 78f9 ldrb r1, [r7, #3]
800e154: f7f8 fcf3 bl 8006b3e <HAL_PCD_EP_Open>
800e158: 4603 mov r3, r0
800e15a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e15c: 7bfb ldrb r3, [r7, #15]
800e15e: 4618 mov r0, r3
800e160: f000 f928 bl 800e3b4 <USBD_Get_USB_Status>
800e164: 4603 mov r3, r0
800e166: 73bb strb r3, [r7, #14]
return usb_status;
800e168: 7bbb ldrb r3, [r7, #14]
}
800e16a: 4618 mov r0, r3
800e16c: 3710 adds r7, #16
800e16e: 46bd mov sp, r7
800e170: bd80 pop {r7, pc}
0800e172 <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e172: b580 push {r7, lr}
800e174: b084 sub sp, #16
800e176: af00 add r7, sp, #0
800e178: 6078 str r0, [r7, #4]
800e17a: 460b mov r3, r1
800e17c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e17e: 2300 movs r3, #0
800e180: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e182: 2300 movs r3, #0
800e184: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800e186: 687b ldr r3, [r7, #4]
800e188: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e18c: 78fa ldrb r2, [r7, #3]
800e18e: 4611 mov r1, r2
800e190: 4618 mov r0, r3
800e192: f7f8 fd31 bl 8006bf8 <HAL_PCD_EP_Close>
800e196: 4603 mov r3, r0
800e198: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e19a: 7bfb ldrb r3, [r7, #15]
800e19c: 4618 mov r0, r3
800e19e: f000 f909 bl 800e3b4 <USBD_Get_USB_Status>
800e1a2: 4603 mov r3, r0
800e1a4: 73bb strb r3, [r7, #14]
return usb_status;
800e1a6: 7bbb ldrb r3, [r7, #14]
}
800e1a8: 4618 mov r0, r3
800e1aa: 3710 adds r7, #16
800e1ac: 46bd mov sp, r7
800e1ae: bd80 pop {r7, pc}
0800e1b0 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e1b0: b580 push {r7, lr}
800e1b2: b084 sub sp, #16
800e1b4: af00 add r7, sp, #0
800e1b6: 6078 str r0, [r7, #4]
800e1b8: 460b mov r3, r1
800e1ba: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e1bc: 2300 movs r3, #0
800e1be: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e1c0: 2300 movs r3, #0
800e1c2: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800e1c4: 687b ldr r3, [r7, #4]
800e1c6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e1ca: 78fa ldrb r2, [r7, #3]
800e1cc: 4611 mov r1, r2
800e1ce: 4618 mov r0, r3
800e1d0: f7f8 fdd9 bl 8006d86 <HAL_PCD_EP_SetStall>
800e1d4: 4603 mov r3, r0
800e1d6: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e1d8: 7bfb ldrb r3, [r7, #15]
800e1da: 4618 mov r0, r3
800e1dc: f000 f8ea bl 800e3b4 <USBD_Get_USB_Status>
800e1e0: 4603 mov r3, r0
800e1e2: 73bb strb r3, [r7, #14]
return usb_status;
800e1e4: 7bbb ldrb r3, [r7, #14]
}
800e1e6: 4618 mov r0, r3
800e1e8: 3710 adds r7, #16
800e1ea: 46bd mov sp, r7
800e1ec: bd80 pop {r7, pc}
0800e1ee <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e1ee: b580 push {r7, lr}
800e1f0: b084 sub sp, #16
800e1f2: af00 add r7, sp, #0
800e1f4: 6078 str r0, [r7, #4]
800e1f6: 460b mov r3, r1
800e1f8: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e1fa: 2300 movs r3, #0
800e1fc: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e1fe: 2300 movs r3, #0
800e200: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800e202: 687b ldr r3, [r7, #4]
800e204: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e208: 78fa ldrb r2, [r7, #3]
800e20a: 4611 mov r1, r2
800e20c: 4618 mov r0, r3
800e20e: f7f8 fe1a bl 8006e46 <HAL_PCD_EP_ClrStall>
800e212: 4603 mov r3, r0
800e214: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e216: 7bfb ldrb r3, [r7, #15]
800e218: 4618 mov r0, r3
800e21a: f000 f8cb bl 800e3b4 <USBD_Get_USB_Status>
800e21e: 4603 mov r3, r0
800e220: 73bb strb r3, [r7, #14]
return usb_status;
800e222: 7bbb ldrb r3, [r7, #14]
}
800e224: 4618 mov r0, r3
800e226: 3710 adds r7, #16
800e228: 46bd mov sp, r7
800e22a: bd80 pop {r7, pc}
0800e22c <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e22c: b480 push {r7}
800e22e: b085 sub sp, #20
800e230: af00 add r7, sp, #0
800e232: 6078 str r0, [r7, #4]
800e234: 460b mov r3, r1
800e236: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800e238: 687b ldr r3, [r7, #4]
800e23a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e23e: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800e240: f997 3003 ldrsb.w r3, [r7, #3]
800e244: 2b00 cmp r3, #0
800e246: da0b bge.n 800e260 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800e248: 78fb ldrb r3, [r7, #3]
800e24a: f003 027f and.w r2, r3, #127 @ 0x7f
800e24e: 68f9 ldr r1, [r7, #12]
800e250: 4613 mov r3, r2
800e252: 009b lsls r3, r3, #2
800e254: 4413 add r3, r2
800e256: 00db lsls r3, r3, #3
800e258: 440b add r3, r1
800e25a: 3312 adds r3, #18
800e25c: 781b ldrb r3, [r3, #0]
800e25e: e00b b.n 800e278 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800e260: 78fb ldrb r3, [r7, #3]
800e262: f003 027f and.w r2, r3, #127 @ 0x7f
800e266: 68f9 ldr r1, [r7, #12]
800e268: 4613 mov r3, r2
800e26a: 009b lsls r3, r3, #2
800e26c: 4413 add r3, r2
800e26e: 00db lsls r3, r3, #3
800e270: 440b add r3, r1
800e272: f503 73a9 add.w r3, r3, #338 @ 0x152
800e276: 781b ldrb r3, [r3, #0]
}
}
800e278: 4618 mov r0, r3
800e27a: 3714 adds r7, #20
800e27c: 46bd mov sp, r7
800e27e: bc80 pop {r7}
800e280: 4770 bx lr
0800e282 <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800e282: b580 push {r7, lr}
800e284: b084 sub sp, #16
800e286: af00 add r7, sp, #0
800e288: 6078 str r0, [r7, #4]
800e28a: 460b mov r3, r1
800e28c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e28e: 2300 movs r3, #0
800e290: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e292: 2300 movs r3, #0
800e294: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800e296: 687b ldr r3, [r7, #4]
800e298: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e29c: 78fa ldrb r2, [r7, #3]
800e29e: 4611 mov r1, r2
800e2a0: 4618 mov r0, r3
800e2a2: f7f8 fc28 bl 8006af6 <HAL_PCD_SetAddress>
800e2a6: 4603 mov r3, r0
800e2a8: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e2aa: 7bfb ldrb r3, [r7, #15]
800e2ac: 4618 mov r0, r3
800e2ae: f000 f881 bl 800e3b4 <USBD_Get_USB_Status>
800e2b2: 4603 mov r3, r0
800e2b4: 73bb strb r3, [r7, #14]
return usb_status;
800e2b6: 7bbb ldrb r3, [r7, #14]
}
800e2b8: 4618 mov r0, r3
800e2ba: 3710 adds r7, #16
800e2bc: 46bd mov sp, r7
800e2be: bd80 pop {r7, pc}
0800e2c0 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800e2c0: b580 push {r7, lr}
800e2c2: b086 sub sp, #24
800e2c4: af00 add r7, sp, #0
800e2c6: 60f8 str r0, [r7, #12]
800e2c8: 607a str r2, [r7, #4]
800e2ca: 461a mov r2, r3
800e2cc: 460b mov r3, r1
800e2ce: 72fb strb r3, [r7, #11]
800e2d0: 4613 mov r3, r2
800e2d2: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800e2d4: 2300 movs r3, #0
800e2d6: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800e2d8: 2300 movs r3, #0
800e2da: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800e2dc: 68fb ldr r3, [r7, #12]
800e2de: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e2e2: 893b ldrh r3, [r7, #8]
800e2e4: 7af9 ldrb r1, [r7, #11]
800e2e6: 687a ldr r2, [r7, #4]
800e2e8: f7f8 fd16 bl 8006d18 <HAL_PCD_EP_Transmit>
800e2ec: 4603 mov r3, r0
800e2ee: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800e2f0: 7dfb ldrb r3, [r7, #23]
800e2f2: 4618 mov r0, r3
800e2f4: f000 f85e bl 800e3b4 <USBD_Get_USB_Status>
800e2f8: 4603 mov r3, r0
800e2fa: 75bb strb r3, [r7, #22]
return usb_status;
800e2fc: 7dbb ldrb r3, [r7, #22]
}
800e2fe: 4618 mov r0, r3
800e300: 3718 adds r7, #24
800e302: 46bd mov sp, r7
800e304: bd80 pop {r7, pc}
0800e306 <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800e306: b580 push {r7, lr}
800e308: b086 sub sp, #24
800e30a: af00 add r7, sp, #0
800e30c: 60f8 str r0, [r7, #12]
800e30e: 607a str r2, [r7, #4]
800e310: 461a mov r2, r3
800e312: 460b mov r3, r1
800e314: 72fb strb r3, [r7, #11]
800e316: 4613 mov r3, r2
800e318: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800e31a: 2300 movs r3, #0
800e31c: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800e31e: 2300 movs r3, #0
800e320: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800e322: 68fb ldr r3, [r7, #12]
800e324: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e328: 893b ldrh r3, [r7, #8]
800e32a: 7af9 ldrb r1, [r7, #11]
800e32c: 687a ldr r2, [r7, #4]
800e32e: f7f8 fcab bl 8006c88 <HAL_PCD_EP_Receive>
800e332: 4603 mov r3, r0
800e334: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800e336: 7dfb ldrb r3, [r7, #23]
800e338: 4618 mov r0, r3
800e33a: f000 f83b bl 800e3b4 <USBD_Get_USB_Status>
800e33e: 4603 mov r3, r0
800e340: 75bb strb r3, [r7, #22]
return usb_status;
800e342: 7dbb ldrb r3, [r7, #22]
}
800e344: 4618 mov r0, r3
800e346: 3718 adds r7, #24
800e348: 46bd mov sp, r7
800e34a: bd80 pop {r7, pc}
0800e34c <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e34c: b580 push {r7, lr}
800e34e: b082 sub sp, #8
800e350: af00 add r7, sp, #0
800e352: 6078 str r0, [r7, #4]
800e354: 460b mov r3, r1
800e356: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800e358: 687b ldr r3, [r7, #4]
800e35a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e35e: 78fa ldrb r2, [r7, #3]
800e360: 4611 mov r1, r2
800e362: 4618 mov r0, r3
800e364: f7f8 fcc1 bl 8006cea <HAL_PCD_EP_GetRxCount>
800e368: 4603 mov r3, r0
}
800e36a: 4618 mov r0, r3
800e36c: 3708 adds r7, #8
800e36e: 46bd mov sp, r7
800e370: bd80 pop {r7, pc}
...
0800e374 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800e374: b480 push {r7}
800e376: b083 sub sp, #12
800e378: af00 add r7, sp, #0
800e37a: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800e37c: 4b02 ldr r3, [pc, #8] @ (800e388 <USBD_static_malloc+0x14>)
}
800e37e: 4618 mov r0, r3
800e380: 370c adds r7, #12
800e382: 46bd mov sp, r7
800e384: bc80 pop {r7}
800e386: 4770 bx lr
800e388: 2000153c .word 0x2000153c
0800e38c <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800e38c: b480 push {r7}
800e38e: b083 sub sp, #12
800e390: af00 add r7, sp, #0
800e392: 6078 str r0, [r7, #4]
}
800e394: bf00 nop
800e396: 370c adds r7, #12
800e398: 46bd mov sp, r7
800e39a: bc80 pop {r7}
800e39c: 4770 bx lr
0800e39e <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e39e: b480 push {r7}
800e3a0: b083 sub sp, #12
800e3a2: af00 add r7, sp, #0
800e3a4: 6078 str r0, [r7, #4]
800e3a6: 460b mov r3, r1
800e3a8: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800e3aa: bf00 nop
800e3ac: 370c adds r7, #12
800e3ae: 46bd mov sp, r7
800e3b0: bc80 pop {r7}
800e3b2: 4770 bx lr
0800e3b4 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800e3b4: b480 push {r7}
800e3b6: b085 sub sp, #20
800e3b8: af00 add r7, sp, #0
800e3ba: 4603 mov r3, r0
800e3bc: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800e3be: 2300 movs r3, #0
800e3c0: 73fb strb r3, [r7, #15]
switch (hal_status)
800e3c2: 79fb ldrb r3, [r7, #7]
800e3c4: 2b03 cmp r3, #3
800e3c6: d817 bhi.n 800e3f8 <USBD_Get_USB_Status+0x44>
800e3c8: a201 add r2, pc, #4 @ (adr r2, 800e3d0 <USBD_Get_USB_Status+0x1c>)
800e3ca: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e3ce: bf00 nop
800e3d0: 0800e3e1 .word 0x0800e3e1
800e3d4: 0800e3e7 .word 0x0800e3e7
800e3d8: 0800e3ed .word 0x0800e3ed
800e3dc: 0800e3f3 .word 0x0800e3f3
{
case HAL_OK :
usb_status = USBD_OK;
800e3e0: 2300 movs r3, #0
800e3e2: 73fb strb r3, [r7, #15]
break;
800e3e4: e00b b.n 800e3fe <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800e3e6: 2302 movs r3, #2
800e3e8: 73fb strb r3, [r7, #15]
break;
800e3ea: e008 b.n 800e3fe <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800e3ec: 2301 movs r3, #1
800e3ee: 73fb strb r3, [r7, #15]
break;
800e3f0: e005 b.n 800e3fe <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800e3f2: 2302 movs r3, #2
800e3f4: 73fb strb r3, [r7, #15]
break;
800e3f6: e002 b.n 800e3fe <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800e3f8: 2302 movs r3, #2
800e3fa: 73fb strb r3, [r7, #15]
break;
800e3fc: bf00 nop
}
return usb_status;
800e3fe: 7bfb ldrb r3, [r7, #15]
}
800e400: 4618 mov r0, r3
800e402: 3714 adds r7, #20
800e404: 46bd mov sp, r7
800e406: bc80 pop {r7}
800e408: 4770 bx lr
800e40a: bf00 nop
0800e40c <siprintf>:
800e40c: b40e push {r1, r2, r3}
800e40e: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800e412: b510 push {r4, lr}
800e414: 2400 movs r4, #0
800e416: b09d sub sp, #116 @ 0x74
800e418: ab1f add r3, sp, #124 @ 0x7c
800e41a: 9002 str r0, [sp, #8]
800e41c: 9006 str r0, [sp, #24]
800e41e: 9107 str r1, [sp, #28]
800e420: 9104 str r1, [sp, #16]
800e422: 4809 ldr r0, [pc, #36] @ (800e448 <siprintf+0x3c>)
800e424: 4909 ldr r1, [pc, #36] @ (800e44c <siprintf+0x40>)
800e426: f853 2b04 ldr.w r2, [r3], #4
800e42a: 9105 str r1, [sp, #20]
800e42c: 6800 ldr r0, [r0, #0]
800e42e: a902 add r1, sp, #8
800e430: 9301 str r3, [sp, #4]
800e432: 941b str r4, [sp, #108] @ 0x6c
800e434: f000 f992 bl 800e75c <_svfiprintf_r>
800e438: 9b02 ldr r3, [sp, #8]
800e43a: 701c strb r4, [r3, #0]
800e43c: b01d add sp, #116 @ 0x74
800e43e: e8bd 4010 ldmia.w sp!, {r4, lr}
800e442: b003 add sp, #12
800e444: 4770 bx lr
800e446: bf00 nop
800e448: 2000018c .word 0x2000018c
800e44c: ffff0208 .word 0xffff0208
0800e450 <memset>:
800e450: 4603 mov r3, r0
800e452: 4402 add r2, r0
800e454: 4293 cmp r3, r2
800e456: d100 bne.n 800e45a <memset+0xa>
800e458: 4770 bx lr
800e45a: f803 1b01 strb.w r1, [r3], #1
800e45e: e7f9 b.n 800e454 <memset+0x4>
0800e460 <__errno>:
800e460: 4b01 ldr r3, [pc, #4] @ (800e468 <__errno+0x8>)
800e462: 6818 ldr r0, [r3, #0]
800e464: 4770 bx lr
800e466: bf00 nop
800e468: 2000018c .word 0x2000018c
0800e46c <__libc_init_array>:
800e46c: b570 push {r4, r5, r6, lr}
800e46e: 2600 movs r6, #0
800e470: 4d0c ldr r5, [pc, #48] @ (800e4a4 <__libc_init_array+0x38>)
800e472: 4c0d ldr r4, [pc, #52] @ (800e4a8 <__libc_init_array+0x3c>)
800e474: 1b64 subs r4, r4, r5
800e476: 10a4 asrs r4, r4, #2
800e478: 42a6 cmp r6, r4
800e47a: d109 bne.n 800e490 <__libc_init_array+0x24>
800e47c: f000 fc76 bl 800ed6c <_init>
800e480: 2600 movs r6, #0
800e482: 4d0a ldr r5, [pc, #40] @ (800e4ac <__libc_init_array+0x40>)
800e484: 4c0a ldr r4, [pc, #40] @ (800e4b0 <__libc_init_array+0x44>)
800e486: 1b64 subs r4, r4, r5
800e488: 10a4 asrs r4, r4, #2
800e48a: 42a6 cmp r6, r4
800e48c: d105 bne.n 800e49a <__libc_init_array+0x2e>
800e48e: bd70 pop {r4, r5, r6, pc}
800e490: f855 3b04 ldr.w r3, [r5], #4
800e494: 4798 blx r3
800e496: 3601 adds r6, #1
800e498: e7ee b.n 800e478 <__libc_init_array+0xc>
800e49a: f855 3b04 ldr.w r3, [r5], #4
800e49e: 4798 blx r3
800e4a0: 3601 adds r6, #1
800e4a2: e7f2 b.n 800e48a <__libc_init_array+0x1e>
800e4a4: 0800f578 .word 0x0800f578
800e4a8: 0800f578 .word 0x0800f578
800e4ac: 0800f578 .word 0x0800f578
800e4b0: 0800f57c .word 0x0800f57c
0800e4b4 <__retarget_lock_acquire_recursive>:
800e4b4: 4770 bx lr
0800e4b6 <__retarget_lock_release_recursive>:
800e4b6: 4770 bx lr
0800e4b8 <_free_r>:
800e4b8: b538 push {r3, r4, r5, lr}
800e4ba: 4605 mov r5, r0
800e4bc: 2900 cmp r1, #0
800e4be: d040 beq.n 800e542 <_free_r+0x8a>
800e4c0: f851 3c04 ldr.w r3, [r1, #-4]
800e4c4: 1f0c subs r4, r1, #4
800e4c6: 2b00 cmp r3, #0
800e4c8: bfb8 it lt
800e4ca: 18e4 addlt r4, r4, r3
800e4cc: f000 f8de bl 800e68c <__malloc_lock>
800e4d0: 4a1c ldr r2, [pc, #112] @ (800e544 <_free_r+0x8c>)
800e4d2: 6813 ldr r3, [r2, #0]
800e4d4: b933 cbnz r3, 800e4e4 <_free_r+0x2c>
800e4d6: 6063 str r3, [r4, #4]
800e4d8: 6014 str r4, [r2, #0]
800e4da: 4628 mov r0, r5
800e4dc: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800e4e0: f000 b8da b.w 800e698 <__malloc_unlock>
800e4e4: 42a3 cmp r3, r4
800e4e6: d908 bls.n 800e4fa <_free_r+0x42>
800e4e8: 6820 ldr r0, [r4, #0]
800e4ea: 1821 adds r1, r4, r0
800e4ec: 428b cmp r3, r1
800e4ee: bf01 itttt eq
800e4f0: 6819 ldreq r1, [r3, #0]
800e4f2: 685b ldreq r3, [r3, #4]
800e4f4: 1809 addeq r1, r1, r0
800e4f6: 6021 streq r1, [r4, #0]
800e4f8: e7ed b.n 800e4d6 <_free_r+0x1e>
800e4fa: 461a mov r2, r3
800e4fc: 685b ldr r3, [r3, #4]
800e4fe: b10b cbz r3, 800e504 <_free_r+0x4c>
800e500: 42a3 cmp r3, r4
800e502: d9fa bls.n 800e4fa <_free_r+0x42>
800e504: 6811 ldr r1, [r2, #0]
800e506: 1850 adds r0, r2, r1
800e508: 42a0 cmp r0, r4
800e50a: d10b bne.n 800e524 <_free_r+0x6c>
800e50c: 6820 ldr r0, [r4, #0]
800e50e: 4401 add r1, r0
800e510: 1850 adds r0, r2, r1
800e512: 4283 cmp r3, r0
800e514: 6011 str r1, [r2, #0]
800e516: d1e0 bne.n 800e4da <_free_r+0x22>
800e518: 6818 ldr r0, [r3, #0]
800e51a: 685b ldr r3, [r3, #4]
800e51c: 4408 add r0, r1
800e51e: 6010 str r0, [r2, #0]
800e520: 6053 str r3, [r2, #4]
800e522: e7da b.n 800e4da <_free_r+0x22>
800e524: d902 bls.n 800e52c <_free_r+0x74>
800e526: 230c movs r3, #12
800e528: 602b str r3, [r5, #0]
800e52a: e7d6 b.n 800e4da <_free_r+0x22>
800e52c: 6820 ldr r0, [r4, #0]
800e52e: 1821 adds r1, r4, r0
800e530: 428b cmp r3, r1
800e532: bf01 itttt eq
800e534: 6819 ldreq r1, [r3, #0]
800e536: 685b ldreq r3, [r3, #4]
800e538: 1809 addeq r1, r1, r0
800e53a: 6021 streq r1, [r4, #0]
800e53c: 6063 str r3, [r4, #4]
800e53e: 6054 str r4, [r2, #4]
800e540: e7cb b.n 800e4da <_free_r+0x22>
800e542: bd38 pop {r3, r4, r5, pc}
800e544: 200018a0 .word 0x200018a0
0800e548 <sbrk_aligned>:
800e548: b570 push {r4, r5, r6, lr}
800e54a: 4e0f ldr r6, [pc, #60] @ (800e588 <sbrk_aligned+0x40>)
800e54c: 460c mov r4, r1
800e54e: 6831 ldr r1, [r6, #0]
800e550: 4605 mov r5, r0
800e552: b911 cbnz r1, 800e55a <sbrk_aligned+0x12>
800e554: f000 fba8 bl 800eca8 <_sbrk_r>
800e558: 6030 str r0, [r6, #0]
800e55a: 4621 mov r1, r4
800e55c: 4628 mov r0, r5
800e55e: f000 fba3 bl 800eca8 <_sbrk_r>
800e562: 1c43 adds r3, r0, #1
800e564: d103 bne.n 800e56e <sbrk_aligned+0x26>
800e566: f04f 34ff mov.w r4, #4294967295
800e56a: 4620 mov r0, r4
800e56c: bd70 pop {r4, r5, r6, pc}
800e56e: 1cc4 adds r4, r0, #3
800e570: f024 0403 bic.w r4, r4, #3
800e574: 42a0 cmp r0, r4
800e576: d0f8 beq.n 800e56a <sbrk_aligned+0x22>
800e578: 1a21 subs r1, r4, r0
800e57a: 4628 mov r0, r5
800e57c: f000 fb94 bl 800eca8 <_sbrk_r>
800e580: 3001 adds r0, #1
800e582: d1f2 bne.n 800e56a <sbrk_aligned+0x22>
800e584: e7ef b.n 800e566 <sbrk_aligned+0x1e>
800e586: bf00 nop
800e588: 2000189c .word 0x2000189c
0800e58c <_malloc_r>:
800e58c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800e590: 1ccd adds r5, r1, #3
800e592: f025 0503 bic.w r5, r5, #3
800e596: 3508 adds r5, #8
800e598: 2d0c cmp r5, #12
800e59a: bf38 it cc
800e59c: 250c movcc r5, #12
800e59e: 2d00 cmp r5, #0
800e5a0: 4606 mov r6, r0
800e5a2: db01 blt.n 800e5a8 <_malloc_r+0x1c>
800e5a4: 42a9 cmp r1, r5
800e5a6: d904 bls.n 800e5b2 <_malloc_r+0x26>
800e5a8: 230c movs r3, #12
800e5aa: 6033 str r3, [r6, #0]
800e5ac: 2000 movs r0, #0
800e5ae: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800e5b2: f8df 80d4 ldr.w r8, [pc, #212] @ 800e688 <_malloc_r+0xfc>
800e5b6: f000 f869 bl 800e68c <__malloc_lock>
800e5ba: f8d8 3000 ldr.w r3, [r8]
800e5be: 461c mov r4, r3
800e5c0: bb44 cbnz r4, 800e614 <_malloc_r+0x88>
800e5c2: 4629 mov r1, r5
800e5c4: 4630 mov r0, r6
800e5c6: f7ff ffbf bl 800e548 <sbrk_aligned>
800e5ca: 1c43 adds r3, r0, #1
800e5cc: 4604 mov r4, r0
800e5ce: d158 bne.n 800e682 <_malloc_r+0xf6>
800e5d0: f8d8 4000 ldr.w r4, [r8]
800e5d4: 4627 mov r7, r4
800e5d6: 2f00 cmp r7, #0
800e5d8: d143 bne.n 800e662 <_malloc_r+0xd6>
800e5da: 2c00 cmp r4, #0
800e5dc: d04b beq.n 800e676 <_malloc_r+0xea>
800e5de: 6823 ldr r3, [r4, #0]
800e5e0: 4639 mov r1, r7
800e5e2: 4630 mov r0, r6
800e5e4: eb04 0903 add.w r9, r4, r3
800e5e8: f000 fb5e bl 800eca8 <_sbrk_r>
800e5ec: 4581 cmp r9, r0
800e5ee: d142 bne.n 800e676 <_malloc_r+0xea>
800e5f0: 6821 ldr r1, [r4, #0]
800e5f2: 4630 mov r0, r6
800e5f4: 1a6d subs r5, r5, r1
800e5f6: 4629 mov r1, r5
800e5f8: f7ff ffa6 bl 800e548 <sbrk_aligned>
800e5fc: 3001 adds r0, #1
800e5fe: d03a beq.n 800e676 <_malloc_r+0xea>
800e600: 6823 ldr r3, [r4, #0]
800e602: 442b add r3, r5
800e604: 6023 str r3, [r4, #0]
800e606: f8d8 3000 ldr.w r3, [r8]
800e60a: 685a ldr r2, [r3, #4]
800e60c: bb62 cbnz r2, 800e668 <_malloc_r+0xdc>
800e60e: f8c8 7000 str.w r7, [r8]
800e612: e00f b.n 800e634 <_malloc_r+0xa8>
800e614: 6822 ldr r2, [r4, #0]
800e616: 1b52 subs r2, r2, r5
800e618: d420 bmi.n 800e65c <_malloc_r+0xd0>
800e61a: 2a0b cmp r2, #11
800e61c: d917 bls.n 800e64e <_malloc_r+0xc2>
800e61e: 1961 adds r1, r4, r5
800e620: 42a3 cmp r3, r4
800e622: 6025 str r5, [r4, #0]
800e624: bf18 it ne
800e626: 6059 strne r1, [r3, #4]
800e628: 6863 ldr r3, [r4, #4]
800e62a: bf08 it eq
800e62c: f8c8 1000 streq.w r1, [r8]
800e630: 5162 str r2, [r4, r5]
800e632: 604b str r3, [r1, #4]
800e634: 4630 mov r0, r6
800e636: f000 f82f bl 800e698 <__malloc_unlock>
800e63a: f104 000b add.w r0, r4, #11
800e63e: 1d23 adds r3, r4, #4
800e640: f020 0007 bic.w r0, r0, #7
800e644: 1ac2 subs r2, r0, r3
800e646: bf1c itt ne
800e648: 1a1b subne r3, r3, r0
800e64a: 50a3 strne r3, [r4, r2]
800e64c: e7af b.n 800e5ae <_malloc_r+0x22>
800e64e: 6862 ldr r2, [r4, #4]
800e650: 42a3 cmp r3, r4
800e652: bf0c ite eq
800e654: f8c8 2000 streq.w r2, [r8]
800e658: 605a strne r2, [r3, #4]
800e65a: e7eb b.n 800e634 <_malloc_r+0xa8>
800e65c: 4623 mov r3, r4
800e65e: 6864 ldr r4, [r4, #4]
800e660: e7ae b.n 800e5c0 <_malloc_r+0x34>
800e662: 463c mov r4, r7
800e664: 687f ldr r7, [r7, #4]
800e666: e7b6 b.n 800e5d6 <_malloc_r+0x4a>
800e668: 461a mov r2, r3
800e66a: 685b ldr r3, [r3, #4]
800e66c: 42a3 cmp r3, r4
800e66e: d1fb bne.n 800e668 <_malloc_r+0xdc>
800e670: 2300 movs r3, #0
800e672: 6053 str r3, [r2, #4]
800e674: e7de b.n 800e634 <_malloc_r+0xa8>
800e676: 230c movs r3, #12
800e678: 4630 mov r0, r6
800e67a: 6033 str r3, [r6, #0]
800e67c: f000 f80c bl 800e698 <__malloc_unlock>
800e680: e794 b.n 800e5ac <_malloc_r+0x20>
800e682: 6005 str r5, [r0, #0]
800e684: e7d6 b.n 800e634 <_malloc_r+0xa8>
800e686: bf00 nop
800e688: 200018a0 .word 0x200018a0
0800e68c <__malloc_lock>:
800e68c: 4801 ldr r0, [pc, #4] @ (800e694 <__malloc_lock+0x8>)
800e68e: f7ff bf11 b.w 800e4b4 <__retarget_lock_acquire_recursive>
800e692: bf00 nop
800e694: 20001898 .word 0x20001898
0800e698 <__malloc_unlock>:
800e698: 4801 ldr r0, [pc, #4] @ (800e6a0 <__malloc_unlock+0x8>)
800e69a: f7ff bf0c b.w 800e4b6 <__retarget_lock_release_recursive>
800e69e: bf00 nop
800e6a0: 20001898 .word 0x20001898
0800e6a4 <__ssputs_r>:
800e6a4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e6a8: 461f mov r7, r3
800e6aa: 688e ldr r6, [r1, #8]
800e6ac: 4682 mov sl, r0
800e6ae: 42be cmp r6, r7
800e6b0: 460c mov r4, r1
800e6b2: 4690 mov r8, r2
800e6b4: 680b ldr r3, [r1, #0]
800e6b6: d82d bhi.n 800e714 <__ssputs_r+0x70>
800e6b8: f9b1 200c ldrsh.w r2, [r1, #12]
800e6bc: f412 6f90 tst.w r2, #1152 @ 0x480
800e6c0: d026 beq.n 800e710 <__ssputs_r+0x6c>
800e6c2: 6965 ldr r5, [r4, #20]
800e6c4: 6909 ldr r1, [r1, #16]
800e6c6: eb05 0545 add.w r5, r5, r5, lsl #1
800e6ca: eba3 0901 sub.w r9, r3, r1
800e6ce: eb05 75d5 add.w r5, r5, r5, lsr #31
800e6d2: 1c7b adds r3, r7, #1
800e6d4: 444b add r3, r9
800e6d6: 106d asrs r5, r5, #1
800e6d8: 429d cmp r5, r3
800e6da: bf38 it cc
800e6dc: 461d movcc r5, r3
800e6de: 0553 lsls r3, r2, #21
800e6e0: d527 bpl.n 800e732 <__ssputs_r+0x8e>
800e6e2: 4629 mov r1, r5
800e6e4: f7ff ff52 bl 800e58c <_malloc_r>
800e6e8: 4606 mov r6, r0
800e6ea: b360 cbz r0, 800e746 <__ssputs_r+0xa2>
800e6ec: 464a mov r2, r9
800e6ee: 6921 ldr r1, [r4, #16]
800e6f0: f000 faf8 bl 800ece4 <memcpy>
800e6f4: 89a3 ldrh r3, [r4, #12]
800e6f6: f423 6390 bic.w r3, r3, #1152 @ 0x480
800e6fa: f043 0380 orr.w r3, r3, #128 @ 0x80
800e6fe: 81a3 strh r3, [r4, #12]
800e700: 6126 str r6, [r4, #16]
800e702: 444e add r6, r9
800e704: 6026 str r6, [r4, #0]
800e706: 463e mov r6, r7
800e708: 6165 str r5, [r4, #20]
800e70a: eba5 0509 sub.w r5, r5, r9
800e70e: 60a5 str r5, [r4, #8]
800e710: 42be cmp r6, r7
800e712: d900 bls.n 800e716 <__ssputs_r+0x72>
800e714: 463e mov r6, r7
800e716: 4632 mov r2, r6
800e718: 4641 mov r1, r8
800e71a: 6820 ldr r0, [r4, #0]
800e71c: f000 faaa bl 800ec74 <memmove>
800e720: 2000 movs r0, #0
800e722: 68a3 ldr r3, [r4, #8]
800e724: 1b9b subs r3, r3, r6
800e726: 60a3 str r3, [r4, #8]
800e728: 6823 ldr r3, [r4, #0]
800e72a: 4433 add r3, r6
800e72c: 6023 str r3, [r4, #0]
800e72e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e732: 462a mov r2, r5
800e734: f000 fae4 bl 800ed00 <_realloc_r>
800e738: 4606 mov r6, r0
800e73a: 2800 cmp r0, #0
800e73c: d1e0 bne.n 800e700 <__ssputs_r+0x5c>
800e73e: 4650 mov r0, sl
800e740: 6921 ldr r1, [r4, #16]
800e742: f7ff feb9 bl 800e4b8 <_free_r>
800e746: 230c movs r3, #12
800e748: f8ca 3000 str.w r3, [sl]
800e74c: 89a3 ldrh r3, [r4, #12]
800e74e: f04f 30ff mov.w r0, #4294967295
800e752: f043 0340 orr.w r3, r3, #64 @ 0x40
800e756: 81a3 strh r3, [r4, #12]
800e758: e7e9 b.n 800e72e <__ssputs_r+0x8a>
...
0800e75c <_svfiprintf_r>:
800e75c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800e760: 4698 mov r8, r3
800e762: 898b ldrh r3, [r1, #12]
800e764: 4607 mov r7, r0
800e766: 061b lsls r3, r3, #24
800e768: 460d mov r5, r1
800e76a: 4614 mov r4, r2
800e76c: b09d sub sp, #116 @ 0x74
800e76e: d510 bpl.n 800e792 <_svfiprintf_r+0x36>
800e770: 690b ldr r3, [r1, #16]
800e772: b973 cbnz r3, 800e792 <_svfiprintf_r+0x36>
800e774: 2140 movs r1, #64 @ 0x40
800e776: f7ff ff09 bl 800e58c <_malloc_r>
800e77a: 6028 str r0, [r5, #0]
800e77c: 6128 str r0, [r5, #16]
800e77e: b930 cbnz r0, 800e78e <_svfiprintf_r+0x32>
800e780: 230c movs r3, #12
800e782: 603b str r3, [r7, #0]
800e784: f04f 30ff mov.w r0, #4294967295
800e788: b01d add sp, #116 @ 0x74
800e78a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800e78e: 2340 movs r3, #64 @ 0x40
800e790: 616b str r3, [r5, #20]
800e792: 2300 movs r3, #0
800e794: 9309 str r3, [sp, #36] @ 0x24
800e796: 2320 movs r3, #32
800e798: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800e79c: 2330 movs r3, #48 @ 0x30
800e79e: f04f 0901 mov.w r9, #1
800e7a2: f8cd 800c str.w r8, [sp, #12]
800e7a6: f8df 8198 ldr.w r8, [pc, #408] @ 800e940 <_svfiprintf_r+0x1e4>
800e7aa: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800e7ae: 4623 mov r3, r4
800e7b0: 469a mov sl, r3
800e7b2: f813 2b01 ldrb.w r2, [r3], #1
800e7b6: b10a cbz r2, 800e7bc <_svfiprintf_r+0x60>
800e7b8: 2a25 cmp r2, #37 @ 0x25
800e7ba: d1f9 bne.n 800e7b0 <_svfiprintf_r+0x54>
800e7bc: ebba 0b04 subs.w fp, sl, r4
800e7c0: d00b beq.n 800e7da <_svfiprintf_r+0x7e>
800e7c2: 465b mov r3, fp
800e7c4: 4622 mov r2, r4
800e7c6: 4629 mov r1, r5
800e7c8: 4638 mov r0, r7
800e7ca: f7ff ff6b bl 800e6a4 <__ssputs_r>
800e7ce: 3001 adds r0, #1
800e7d0: f000 80a7 beq.w 800e922 <_svfiprintf_r+0x1c6>
800e7d4: 9a09 ldr r2, [sp, #36] @ 0x24
800e7d6: 445a add r2, fp
800e7d8: 9209 str r2, [sp, #36] @ 0x24
800e7da: f89a 3000 ldrb.w r3, [sl]
800e7de: 2b00 cmp r3, #0
800e7e0: f000 809f beq.w 800e922 <_svfiprintf_r+0x1c6>
800e7e4: 2300 movs r3, #0
800e7e6: f04f 32ff mov.w r2, #4294967295
800e7ea: e9cd 2305 strd r2, r3, [sp, #20]
800e7ee: f10a 0a01 add.w sl, sl, #1
800e7f2: 9304 str r3, [sp, #16]
800e7f4: 9307 str r3, [sp, #28]
800e7f6: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800e7fa: 931a str r3, [sp, #104] @ 0x68
800e7fc: 4654 mov r4, sl
800e7fe: 2205 movs r2, #5
800e800: f814 1b01 ldrb.w r1, [r4], #1
800e804: 484e ldr r0, [pc, #312] @ (800e940 <_svfiprintf_r+0x1e4>)
800e806: f000 fa5f bl 800ecc8 <memchr>
800e80a: 9a04 ldr r2, [sp, #16]
800e80c: b9d8 cbnz r0, 800e846 <_svfiprintf_r+0xea>
800e80e: 06d0 lsls r0, r2, #27
800e810: bf44 itt mi
800e812: 2320 movmi r3, #32
800e814: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e818: 0711 lsls r1, r2, #28
800e81a: bf44 itt mi
800e81c: 232b movmi r3, #43 @ 0x2b
800e81e: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e822: f89a 3000 ldrb.w r3, [sl]
800e826: 2b2a cmp r3, #42 @ 0x2a
800e828: d015 beq.n 800e856 <_svfiprintf_r+0xfa>
800e82a: 4654 mov r4, sl
800e82c: 2000 movs r0, #0
800e82e: f04f 0c0a mov.w ip, #10
800e832: 9a07 ldr r2, [sp, #28]
800e834: 4621 mov r1, r4
800e836: f811 3b01 ldrb.w r3, [r1], #1
800e83a: 3b30 subs r3, #48 @ 0x30
800e83c: 2b09 cmp r3, #9
800e83e: d94b bls.n 800e8d8 <_svfiprintf_r+0x17c>
800e840: b1b0 cbz r0, 800e870 <_svfiprintf_r+0x114>
800e842: 9207 str r2, [sp, #28]
800e844: e014 b.n 800e870 <_svfiprintf_r+0x114>
800e846: eba0 0308 sub.w r3, r0, r8
800e84a: fa09 f303 lsl.w r3, r9, r3
800e84e: 4313 orrs r3, r2
800e850: 46a2 mov sl, r4
800e852: 9304 str r3, [sp, #16]
800e854: e7d2 b.n 800e7fc <_svfiprintf_r+0xa0>
800e856: 9b03 ldr r3, [sp, #12]
800e858: 1d19 adds r1, r3, #4
800e85a: 681b ldr r3, [r3, #0]
800e85c: 9103 str r1, [sp, #12]
800e85e: 2b00 cmp r3, #0
800e860: bfbb ittet lt
800e862: 425b neglt r3, r3
800e864: f042 0202 orrlt.w r2, r2, #2
800e868: 9307 strge r3, [sp, #28]
800e86a: 9307 strlt r3, [sp, #28]
800e86c: bfb8 it lt
800e86e: 9204 strlt r2, [sp, #16]
800e870: 7823 ldrb r3, [r4, #0]
800e872: 2b2e cmp r3, #46 @ 0x2e
800e874: d10a bne.n 800e88c <_svfiprintf_r+0x130>
800e876: 7863 ldrb r3, [r4, #1]
800e878: 2b2a cmp r3, #42 @ 0x2a
800e87a: d132 bne.n 800e8e2 <_svfiprintf_r+0x186>
800e87c: 9b03 ldr r3, [sp, #12]
800e87e: 3402 adds r4, #2
800e880: 1d1a adds r2, r3, #4
800e882: 681b ldr r3, [r3, #0]
800e884: 9203 str r2, [sp, #12]
800e886: ea43 73e3 orr.w r3, r3, r3, asr #31
800e88a: 9305 str r3, [sp, #20]
800e88c: f8df a0b4 ldr.w sl, [pc, #180] @ 800e944 <_svfiprintf_r+0x1e8>
800e890: 2203 movs r2, #3
800e892: 4650 mov r0, sl
800e894: 7821 ldrb r1, [r4, #0]
800e896: f000 fa17 bl 800ecc8 <memchr>
800e89a: b138 cbz r0, 800e8ac <_svfiprintf_r+0x150>
800e89c: 2240 movs r2, #64 @ 0x40
800e89e: 9b04 ldr r3, [sp, #16]
800e8a0: eba0 000a sub.w r0, r0, sl
800e8a4: 4082 lsls r2, r0
800e8a6: 4313 orrs r3, r2
800e8a8: 3401 adds r4, #1
800e8aa: 9304 str r3, [sp, #16]
800e8ac: f814 1b01 ldrb.w r1, [r4], #1
800e8b0: 2206 movs r2, #6
800e8b2: 4825 ldr r0, [pc, #148] @ (800e948 <_svfiprintf_r+0x1ec>)
800e8b4: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800e8b8: f000 fa06 bl 800ecc8 <memchr>
800e8bc: 2800 cmp r0, #0
800e8be: d036 beq.n 800e92e <_svfiprintf_r+0x1d2>
800e8c0: 4b22 ldr r3, [pc, #136] @ (800e94c <_svfiprintf_r+0x1f0>)
800e8c2: bb1b cbnz r3, 800e90c <_svfiprintf_r+0x1b0>
800e8c4: 9b03 ldr r3, [sp, #12]
800e8c6: 3307 adds r3, #7
800e8c8: f023 0307 bic.w r3, r3, #7
800e8cc: 3308 adds r3, #8
800e8ce: 9303 str r3, [sp, #12]
800e8d0: 9b09 ldr r3, [sp, #36] @ 0x24
800e8d2: 4433 add r3, r6
800e8d4: 9309 str r3, [sp, #36] @ 0x24
800e8d6: e76a b.n 800e7ae <_svfiprintf_r+0x52>
800e8d8: 460c mov r4, r1
800e8da: 2001 movs r0, #1
800e8dc: fb0c 3202 mla r2, ip, r2, r3
800e8e0: e7a8 b.n 800e834 <_svfiprintf_r+0xd8>
800e8e2: 2300 movs r3, #0
800e8e4: f04f 0c0a mov.w ip, #10
800e8e8: 4619 mov r1, r3
800e8ea: 3401 adds r4, #1
800e8ec: 9305 str r3, [sp, #20]
800e8ee: 4620 mov r0, r4
800e8f0: f810 2b01 ldrb.w r2, [r0], #1
800e8f4: 3a30 subs r2, #48 @ 0x30
800e8f6: 2a09 cmp r2, #9
800e8f8: d903 bls.n 800e902 <_svfiprintf_r+0x1a6>
800e8fa: 2b00 cmp r3, #0
800e8fc: d0c6 beq.n 800e88c <_svfiprintf_r+0x130>
800e8fe: 9105 str r1, [sp, #20]
800e900: e7c4 b.n 800e88c <_svfiprintf_r+0x130>
800e902: 4604 mov r4, r0
800e904: 2301 movs r3, #1
800e906: fb0c 2101 mla r1, ip, r1, r2
800e90a: e7f0 b.n 800e8ee <_svfiprintf_r+0x192>
800e90c: ab03 add r3, sp, #12
800e90e: 9300 str r3, [sp, #0]
800e910: 462a mov r2, r5
800e912: 4638 mov r0, r7
800e914: 4b0e ldr r3, [pc, #56] @ (800e950 <_svfiprintf_r+0x1f4>)
800e916: a904 add r1, sp, #16
800e918: f3af 8000 nop.w
800e91c: 1c42 adds r2, r0, #1
800e91e: 4606 mov r6, r0
800e920: d1d6 bne.n 800e8d0 <_svfiprintf_r+0x174>
800e922: 89ab ldrh r3, [r5, #12]
800e924: 065b lsls r3, r3, #25
800e926: f53f af2d bmi.w 800e784 <_svfiprintf_r+0x28>
800e92a: 9809 ldr r0, [sp, #36] @ 0x24
800e92c: e72c b.n 800e788 <_svfiprintf_r+0x2c>
800e92e: ab03 add r3, sp, #12
800e930: 9300 str r3, [sp, #0]
800e932: 462a mov r2, r5
800e934: 4638 mov r0, r7
800e936: 4b06 ldr r3, [pc, #24] @ (800e950 <_svfiprintf_r+0x1f4>)
800e938: a904 add r1, sp, #16
800e93a: f000 f87d bl 800ea38 <_printf_i>
800e93e: e7ed b.n 800e91c <_svfiprintf_r+0x1c0>
800e940: 0800f53a .word 0x0800f53a
800e944: 0800f540 .word 0x0800f540
800e948: 0800f544 .word 0x0800f544
800e94c: 00000000 .word 0x00000000
800e950: 0800e6a5 .word 0x0800e6a5
0800e954 <_printf_common>:
800e954: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e958: 4616 mov r6, r2
800e95a: 4698 mov r8, r3
800e95c: 688a ldr r2, [r1, #8]
800e95e: 690b ldr r3, [r1, #16]
800e960: 4607 mov r7, r0
800e962: 4293 cmp r3, r2
800e964: bfb8 it lt
800e966: 4613 movlt r3, r2
800e968: 6033 str r3, [r6, #0]
800e96a: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800e96e: 460c mov r4, r1
800e970: f8dd 9020 ldr.w r9, [sp, #32]
800e974: b10a cbz r2, 800e97a <_printf_common+0x26>
800e976: 3301 adds r3, #1
800e978: 6033 str r3, [r6, #0]
800e97a: 6823 ldr r3, [r4, #0]
800e97c: 0699 lsls r1, r3, #26
800e97e: bf42 ittt mi
800e980: 6833 ldrmi r3, [r6, #0]
800e982: 3302 addmi r3, #2
800e984: 6033 strmi r3, [r6, #0]
800e986: 6825 ldr r5, [r4, #0]
800e988: f015 0506 ands.w r5, r5, #6
800e98c: d106 bne.n 800e99c <_printf_common+0x48>
800e98e: f104 0a19 add.w sl, r4, #25
800e992: 68e3 ldr r3, [r4, #12]
800e994: 6832 ldr r2, [r6, #0]
800e996: 1a9b subs r3, r3, r2
800e998: 42ab cmp r3, r5
800e99a: dc2b bgt.n 800e9f4 <_printf_common+0xa0>
800e99c: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800e9a0: 6822 ldr r2, [r4, #0]
800e9a2: 3b00 subs r3, #0
800e9a4: bf18 it ne
800e9a6: 2301 movne r3, #1
800e9a8: 0692 lsls r2, r2, #26
800e9aa: d430 bmi.n 800ea0e <_printf_common+0xba>
800e9ac: 4641 mov r1, r8
800e9ae: 4638 mov r0, r7
800e9b0: f104 0243 add.w r2, r4, #67 @ 0x43
800e9b4: 47c8 blx r9
800e9b6: 3001 adds r0, #1
800e9b8: d023 beq.n 800ea02 <_printf_common+0xae>
800e9ba: 6823 ldr r3, [r4, #0]
800e9bc: 6922 ldr r2, [r4, #16]
800e9be: f003 0306 and.w r3, r3, #6
800e9c2: 2b04 cmp r3, #4
800e9c4: bf14 ite ne
800e9c6: 2500 movne r5, #0
800e9c8: 6833 ldreq r3, [r6, #0]
800e9ca: f04f 0600 mov.w r6, #0
800e9ce: bf08 it eq
800e9d0: 68e5 ldreq r5, [r4, #12]
800e9d2: f104 041a add.w r4, r4, #26
800e9d6: bf08 it eq
800e9d8: 1aed subeq r5, r5, r3
800e9da: f854 3c12 ldr.w r3, [r4, #-18]
800e9de: bf08 it eq
800e9e0: ea25 75e5 biceq.w r5, r5, r5, asr #31
800e9e4: 4293 cmp r3, r2
800e9e6: bfc4 itt gt
800e9e8: 1a9b subgt r3, r3, r2
800e9ea: 18ed addgt r5, r5, r3
800e9ec: 42b5 cmp r5, r6
800e9ee: d11a bne.n 800ea26 <_printf_common+0xd2>
800e9f0: 2000 movs r0, #0
800e9f2: e008 b.n 800ea06 <_printf_common+0xb2>
800e9f4: 2301 movs r3, #1
800e9f6: 4652 mov r2, sl
800e9f8: 4641 mov r1, r8
800e9fa: 4638 mov r0, r7
800e9fc: 47c8 blx r9
800e9fe: 3001 adds r0, #1
800ea00: d103 bne.n 800ea0a <_printf_common+0xb6>
800ea02: f04f 30ff mov.w r0, #4294967295
800ea06: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800ea0a: 3501 adds r5, #1
800ea0c: e7c1 b.n 800e992 <_printf_common+0x3e>
800ea0e: 2030 movs r0, #48 @ 0x30
800ea10: 18e1 adds r1, r4, r3
800ea12: f881 0043 strb.w r0, [r1, #67] @ 0x43
800ea16: 1c5a adds r2, r3, #1
800ea18: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800ea1c: 4422 add r2, r4
800ea1e: 3302 adds r3, #2
800ea20: f882 1043 strb.w r1, [r2, #67] @ 0x43
800ea24: e7c2 b.n 800e9ac <_printf_common+0x58>
800ea26: 2301 movs r3, #1
800ea28: 4622 mov r2, r4
800ea2a: 4641 mov r1, r8
800ea2c: 4638 mov r0, r7
800ea2e: 47c8 blx r9
800ea30: 3001 adds r0, #1
800ea32: d0e6 beq.n 800ea02 <_printf_common+0xae>
800ea34: 3601 adds r6, #1
800ea36: e7d9 b.n 800e9ec <_printf_common+0x98>
0800ea38 <_printf_i>:
800ea38: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800ea3c: 7e0f ldrb r7, [r1, #24]
800ea3e: 4691 mov r9, r2
800ea40: 2f78 cmp r7, #120 @ 0x78
800ea42: 4680 mov r8, r0
800ea44: 460c mov r4, r1
800ea46: 469a mov sl, r3
800ea48: 9e0c ldr r6, [sp, #48] @ 0x30
800ea4a: f101 0243 add.w r2, r1, #67 @ 0x43
800ea4e: d807 bhi.n 800ea60 <_printf_i+0x28>
800ea50: 2f62 cmp r7, #98 @ 0x62
800ea52: d80a bhi.n 800ea6a <_printf_i+0x32>
800ea54: 2f00 cmp r7, #0
800ea56: f000 80d1 beq.w 800ebfc <_printf_i+0x1c4>
800ea5a: 2f58 cmp r7, #88 @ 0x58
800ea5c: f000 80b8 beq.w 800ebd0 <_printf_i+0x198>
800ea60: f104 0642 add.w r6, r4, #66 @ 0x42
800ea64: f884 7042 strb.w r7, [r4, #66] @ 0x42
800ea68: e03a b.n 800eae0 <_printf_i+0xa8>
800ea6a: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800ea6e: 2b15 cmp r3, #21
800ea70: d8f6 bhi.n 800ea60 <_printf_i+0x28>
800ea72: a101 add r1, pc, #4 @ (adr r1, 800ea78 <_printf_i+0x40>)
800ea74: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800ea78: 0800ead1 .word 0x0800ead1
800ea7c: 0800eae5 .word 0x0800eae5
800ea80: 0800ea61 .word 0x0800ea61
800ea84: 0800ea61 .word 0x0800ea61
800ea88: 0800ea61 .word 0x0800ea61
800ea8c: 0800ea61 .word 0x0800ea61
800ea90: 0800eae5 .word 0x0800eae5
800ea94: 0800ea61 .word 0x0800ea61
800ea98: 0800ea61 .word 0x0800ea61
800ea9c: 0800ea61 .word 0x0800ea61
800eaa0: 0800ea61 .word 0x0800ea61
800eaa4: 0800ebe3 .word 0x0800ebe3
800eaa8: 0800eb0f .word 0x0800eb0f
800eaac: 0800eb9d .word 0x0800eb9d
800eab0: 0800ea61 .word 0x0800ea61
800eab4: 0800ea61 .word 0x0800ea61
800eab8: 0800ec05 .word 0x0800ec05
800eabc: 0800ea61 .word 0x0800ea61
800eac0: 0800eb0f .word 0x0800eb0f
800eac4: 0800ea61 .word 0x0800ea61
800eac8: 0800ea61 .word 0x0800ea61
800eacc: 0800eba5 .word 0x0800eba5
800ead0: 6833 ldr r3, [r6, #0]
800ead2: 1d1a adds r2, r3, #4
800ead4: 681b ldr r3, [r3, #0]
800ead6: 6032 str r2, [r6, #0]
800ead8: f104 0642 add.w r6, r4, #66 @ 0x42
800eadc: f884 3042 strb.w r3, [r4, #66] @ 0x42
800eae0: 2301 movs r3, #1
800eae2: e09c b.n 800ec1e <_printf_i+0x1e6>
800eae4: 6833 ldr r3, [r6, #0]
800eae6: 6820 ldr r0, [r4, #0]
800eae8: 1d19 adds r1, r3, #4
800eaea: 6031 str r1, [r6, #0]
800eaec: 0606 lsls r6, r0, #24
800eaee: d501 bpl.n 800eaf4 <_printf_i+0xbc>
800eaf0: 681d ldr r5, [r3, #0]
800eaf2: e003 b.n 800eafc <_printf_i+0xc4>
800eaf4: 0645 lsls r5, r0, #25
800eaf6: d5fb bpl.n 800eaf0 <_printf_i+0xb8>
800eaf8: f9b3 5000 ldrsh.w r5, [r3]
800eafc: 2d00 cmp r5, #0
800eafe: da03 bge.n 800eb08 <_printf_i+0xd0>
800eb00: 232d movs r3, #45 @ 0x2d
800eb02: 426d negs r5, r5
800eb04: f884 3043 strb.w r3, [r4, #67] @ 0x43
800eb08: 230a movs r3, #10
800eb0a: 4858 ldr r0, [pc, #352] @ (800ec6c <_printf_i+0x234>)
800eb0c: e011 b.n 800eb32 <_printf_i+0xfa>
800eb0e: 6821 ldr r1, [r4, #0]
800eb10: 6833 ldr r3, [r6, #0]
800eb12: 0608 lsls r0, r1, #24
800eb14: f853 5b04 ldr.w r5, [r3], #4
800eb18: d402 bmi.n 800eb20 <_printf_i+0xe8>
800eb1a: 0649 lsls r1, r1, #25
800eb1c: bf48 it mi
800eb1e: b2ad uxthmi r5, r5
800eb20: 2f6f cmp r7, #111 @ 0x6f
800eb22: 6033 str r3, [r6, #0]
800eb24: bf14 ite ne
800eb26: 230a movne r3, #10
800eb28: 2308 moveq r3, #8
800eb2a: 4850 ldr r0, [pc, #320] @ (800ec6c <_printf_i+0x234>)
800eb2c: 2100 movs r1, #0
800eb2e: f884 1043 strb.w r1, [r4, #67] @ 0x43
800eb32: 6866 ldr r6, [r4, #4]
800eb34: 2e00 cmp r6, #0
800eb36: 60a6 str r6, [r4, #8]
800eb38: db05 blt.n 800eb46 <_printf_i+0x10e>
800eb3a: 6821 ldr r1, [r4, #0]
800eb3c: 432e orrs r6, r5
800eb3e: f021 0104 bic.w r1, r1, #4
800eb42: 6021 str r1, [r4, #0]
800eb44: d04b beq.n 800ebde <_printf_i+0x1a6>
800eb46: 4616 mov r6, r2
800eb48: fbb5 f1f3 udiv r1, r5, r3
800eb4c: fb03 5711 mls r7, r3, r1, r5
800eb50: 5dc7 ldrb r7, [r0, r7]
800eb52: f806 7d01 strb.w r7, [r6, #-1]!
800eb56: 462f mov r7, r5
800eb58: 42bb cmp r3, r7
800eb5a: 460d mov r5, r1
800eb5c: d9f4 bls.n 800eb48 <_printf_i+0x110>
800eb5e: 2b08 cmp r3, #8
800eb60: d10b bne.n 800eb7a <_printf_i+0x142>
800eb62: 6823 ldr r3, [r4, #0]
800eb64: 07df lsls r7, r3, #31
800eb66: d508 bpl.n 800eb7a <_printf_i+0x142>
800eb68: 6923 ldr r3, [r4, #16]
800eb6a: 6861 ldr r1, [r4, #4]
800eb6c: 4299 cmp r1, r3
800eb6e: bfde ittt le
800eb70: 2330 movle r3, #48 @ 0x30
800eb72: f806 3c01 strble.w r3, [r6, #-1]
800eb76: f106 36ff addle.w r6, r6, #4294967295
800eb7a: 1b92 subs r2, r2, r6
800eb7c: 6122 str r2, [r4, #16]
800eb7e: 464b mov r3, r9
800eb80: 4621 mov r1, r4
800eb82: 4640 mov r0, r8
800eb84: f8cd a000 str.w sl, [sp]
800eb88: aa03 add r2, sp, #12
800eb8a: f7ff fee3 bl 800e954 <_printf_common>
800eb8e: 3001 adds r0, #1
800eb90: d14a bne.n 800ec28 <_printf_i+0x1f0>
800eb92: f04f 30ff mov.w r0, #4294967295
800eb96: b004 add sp, #16
800eb98: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800eb9c: 6823 ldr r3, [r4, #0]
800eb9e: f043 0320 orr.w r3, r3, #32
800eba2: 6023 str r3, [r4, #0]
800eba4: 2778 movs r7, #120 @ 0x78
800eba6: 4832 ldr r0, [pc, #200] @ (800ec70 <_printf_i+0x238>)
800eba8: f884 7045 strb.w r7, [r4, #69] @ 0x45
800ebac: 6823 ldr r3, [r4, #0]
800ebae: 6831 ldr r1, [r6, #0]
800ebb0: 061f lsls r7, r3, #24
800ebb2: f851 5b04 ldr.w r5, [r1], #4
800ebb6: d402 bmi.n 800ebbe <_printf_i+0x186>
800ebb8: 065f lsls r7, r3, #25
800ebba: bf48 it mi
800ebbc: b2ad uxthmi r5, r5
800ebbe: 6031 str r1, [r6, #0]
800ebc0: 07d9 lsls r1, r3, #31
800ebc2: bf44 itt mi
800ebc4: f043 0320 orrmi.w r3, r3, #32
800ebc8: 6023 strmi r3, [r4, #0]
800ebca: b11d cbz r5, 800ebd4 <_printf_i+0x19c>
800ebcc: 2310 movs r3, #16
800ebce: e7ad b.n 800eb2c <_printf_i+0xf4>
800ebd0: 4826 ldr r0, [pc, #152] @ (800ec6c <_printf_i+0x234>)
800ebd2: e7e9 b.n 800eba8 <_printf_i+0x170>
800ebd4: 6823 ldr r3, [r4, #0]
800ebd6: f023 0320 bic.w r3, r3, #32
800ebda: 6023 str r3, [r4, #0]
800ebdc: e7f6 b.n 800ebcc <_printf_i+0x194>
800ebde: 4616 mov r6, r2
800ebe0: e7bd b.n 800eb5e <_printf_i+0x126>
800ebe2: 6833 ldr r3, [r6, #0]
800ebe4: 6825 ldr r5, [r4, #0]
800ebe6: 1d18 adds r0, r3, #4
800ebe8: 6961 ldr r1, [r4, #20]
800ebea: 6030 str r0, [r6, #0]
800ebec: 062e lsls r6, r5, #24
800ebee: 681b ldr r3, [r3, #0]
800ebf0: d501 bpl.n 800ebf6 <_printf_i+0x1be>
800ebf2: 6019 str r1, [r3, #0]
800ebf4: e002 b.n 800ebfc <_printf_i+0x1c4>
800ebf6: 0668 lsls r0, r5, #25
800ebf8: d5fb bpl.n 800ebf2 <_printf_i+0x1ba>
800ebfa: 8019 strh r1, [r3, #0]
800ebfc: 2300 movs r3, #0
800ebfe: 4616 mov r6, r2
800ec00: 6123 str r3, [r4, #16]
800ec02: e7bc b.n 800eb7e <_printf_i+0x146>
800ec04: 6833 ldr r3, [r6, #0]
800ec06: 2100 movs r1, #0
800ec08: 1d1a adds r2, r3, #4
800ec0a: 6032 str r2, [r6, #0]
800ec0c: 681e ldr r6, [r3, #0]
800ec0e: 6862 ldr r2, [r4, #4]
800ec10: 4630 mov r0, r6
800ec12: f000 f859 bl 800ecc8 <memchr>
800ec16: b108 cbz r0, 800ec1c <_printf_i+0x1e4>
800ec18: 1b80 subs r0, r0, r6
800ec1a: 6060 str r0, [r4, #4]
800ec1c: 6863 ldr r3, [r4, #4]
800ec1e: 6123 str r3, [r4, #16]
800ec20: 2300 movs r3, #0
800ec22: f884 3043 strb.w r3, [r4, #67] @ 0x43
800ec26: e7aa b.n 800eb7e <_printf_i+0x146>
800ec28: 4632 mov r2, r6
800ec2a: 4649 mov r1, r9
800ec2c: 4640 mov r0, r8
800ec2e: 6923 ldr r3, [r4, #16]
800ec30: 47d0 blx sl
800ec32: 3001 adds r0, #1
800ec34: d0ad beq.n 800eb92 <_printf_i+0x15a>
800ec36: 6823 ldr r3, [r4, #0]
800ec38: 079b lsls r3, r3, #30
800ec3a: d413 bmi.n 800ec64 <_printf_i+0x22c>
800ec3c: 68e0 ldr r0, [r4, #12]
800ec3e: 9b03 ldr r3, [sp, #12]
800ec40: 4298 cmp r0, r3
800ec42: bfb8 it lt
800ec44: 4618 movlt r0, r3
800ec46: e7a6 b.n 800eb96 <_printf_i+0x15e>
800ec48: 2301 movs r3, #1
800ec4a: 4632 mov r2, r6
800ec4c: 4649 mov r1, r9
800ec4e: 4640 mov r0, r8
800ec50: 47d0 blx sl
800ec52: 3001 adds r0, #1
800ec54: d09d beq.n 800eb92 <_printf_i+0x15a>
800ec56: 3501 adds r5, #1
800ec58: 68e3 ldr r3, [r4, #12]
800ec5a: 9903 ldr r1, [sp, #12]
800ec5c: 1a5b subs r3, r3, r1
800ec5e: 42ab cmp r3, r5
800ec60: dcf2 bgt.n 800ec48 <_printf_i+0x210>
800ec62: e7eb b.n 800ec3c <_printf_i+0x204>
800ec64: 2500 movs r5, #0
800ec66: f104 0619 add.w r6, r4, #25
800ec6a: e7f5 b.n 800ec58 <_printf_i+0x220>
800ec6c: 0800f54b .word 0x0800f54b
800ec70: 0800f55c .word 0x0800f55c
0800ec74 <memmove>:
800ec74: 4288 cmp r0, r1
800ec76: b510 push {r4, lr}
800ec78: eb01 0402 add.w r4, r1, r2
800ec7c: d902 bls.n 800ec84 <memmove+0x10>
800ec7e: 4284 cmp r4, r0
800ec80: 4623 mov r3, r4
800ec82: d807 bhi.n 800ec94 <memmove+0x20>
800ec84: 1e43 subs r3, r0, #1
800ec86: 42a1 cmp r1, r4
800ec88: d008 beq.n 800ec9c <memmove+0x28>
800ec8a: f811 2b01 ldrb.w r2, [r1], #1
800ec8e: f803 2f01 strb.w r2, [r3, #1]!
800ec92: e7f8 b.n 800ec86 <memmove+0x12>
800ec94: 4601 mov r1, r0
800ec96: 4402 add r2, r0
800ec98: 428a cmp r2, r1
800ec9a: d100 bne.n 800ec9e <memmove+0x2a>
800ec9c: bd10 pop {r4, pc}
800ec9e: f813 4d01 ldrb.w r4, [r3, #-1]!
800eca2: f802 4d01 strb.w r4, [r2, #-1]!
800eca6: e7f7 b.n 800ec98 <memmove+0x24>
0800eca8 <_sbrk_r>:
800eca8: b538 push {r3, r4, r5, lr}
800ecaa: 2300 movs r3, #0
800ecac: 4d05 ldr r5, [pc, #20] @ (800ecc4 <_sbrk_r+0x1c>)
800ecae: 4604 mov r4, r0
800ecb0: 4608 mov r0, r1
800ecb2: 602b str r3, [r5, #0]
800ecb4: f7f6 f98e bl 8004fd4 <_sbrk>
800ecb8: 1c43 adds r3, r0, #1
800ecba: d102 bne.n 800ecc2 <_sbrk_r+0x1a>
800ecbc: 682b ldr r3, [r5, #0]
800ecbe: b103 cbz r3, 800ecc2 <_sbrk_r+0x1a>
800ecc0: 6023 str r3, [r4, #0]
800ecc2: bd38 pop {r3, r4, r5, pc}
800ecc4: 20001894 .word 0x20001894
0800ecc8 <memchr>:
800ecc8: 4603 mov r3, r0
800ecca: b510 push {r4, lr}
800eccc: b2c9 uxtb r1, r1
800ecce: 4402 add r2, r0
800ecd0: 4293 cmp r3, r2
800ecd2: 4618 mov r0, r3
800ecd4: d101 bne.n 800ecda <memchr+0x12>
800ecd6: 2000 movs r0, #0
800ecd8: e003 b.n 800ece2 <memchr+0x1a>
800ecda: 7804 ldrb r4, [r0, #0]
800ecdc: 3301 adds r3, #1
800ecde: 428c cmp r4, r1
800ece0: d1f6 bne.n 800ecd0 <memchr+0x8>
800ece2: bd10 pop {r4, pc}
0800ece4 <memcpy>:
800ece4: 440a add r2, r1
800ece6: 4291 cmp r1, r2
800ece8: f100 33ff add.w r3, r0, #4294967295
800ecec: d100 bne.n 800ecf0 <memcpy+0xc>
800ecee: 4770 bx lr
800ecf0: b510 push {r4, lr}
800ecf2: f811 4b01 ldrb.w r4, [r1], #1
800ecf6: 4291 cmp r1, r2
800ecf8: f803 4f01 strb.w r4, [r3, #1]!
800ecfc: d1f9 bne.n 800ecf2 <memcpy+0xe>
800ecfe: bd10 pop {r4, pc}
0800ed00 <_realloc_r>:
800ed00: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800ed04: 4607 mov r7, r0
800ed06: 4614 mov r4, r2
800ed08: 460d mov r5, r1
800ed0a: b921 cbnz r1, 800ed16 <_realloc_r+0x16>
800ed0c: 4611 mov r1, r2
800ed0e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800ed12: f7ff bc3b b.w 800e58c <_malloc_r>
800ed16: b92a cbnz r2, 800ed24 <_realloc_r+0x24>
800ed18: f7ff fbce bl 800e4b8 <_free_r>
800ed1c: 4625 mov r5, r4
800ed1e: 4628 mov r0, r5
800ed20: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800ed24: f000 f81a bl 800ed5c <_malloc_usable_size_r>
800ed28: 4284 cmp r4, r0
800ed2a: 4606 mov r6, r0
800ed2c: d802 bhi.n 800ed34 <_realloc_r+0x34>
800ed2e: ebb4 0f50 cmp.w r4, r0, lsr #1
800ed32: d8f4 bhi.n 800ed1e <_realloc_r+0x1e>
800ed34: 4621 mov r1, r4
800ed36: 4638 mov r0, r7
800ed38: f7ff fc28 bl 800e58c <_malloc_r>
800ed3c: 4680 mov r8, r0
800ed3e: b908 cbnz r0, 800ed44 <_realloc_r+0x44>
800ed40: 4645 mov r5, r8
800ed42: e7ec b.n 800ed1e <_realloc_r+0x1e>
800ed44: 42b4 cmp r4, r6
800ed46: 4622 mov r2, r4
800ed48: 4629 mov r1, r5
800ed4a: bf28 it cs
800ed4c: 4632 movcs r2, r6
800ed4e: f7ff ffc9 bl 800ece4 <memcpy>
800ed52: 4629 mov r1, r5
800ed54: 4638 mov r0, r7
800ed56: f7ff fbaf bl 800e4b8 <_free_r>
800ed5a: e7f1 b.n 800ed40 <_realloc_r+0x40>
0800ed5c <_malloc_usable_size_r>:
800ed5c: f851 3c04 ldr.w r3, [r1, #-4]
800ed60: 1f18 subs r0, r3, #4
800ed62: 2b00 cmp r3, #0
800ed64: bfbc itt lt
800ed66: 580b ldrlt r3, [r1, r0]
800ed68: 18c0 addlt r0, r0, r3
800ed6a: 4770 bx lr
0800ed6c <_init>:
800ed6c: b5f8 push {r3, r4, r5, r6, r7, lr}
800ed6e: bf00 nop
800ed70: bcf8 pop {r3, r4, r5, r6, r7}
800ed72: bc08 pop {r3}
800ed74: 469e mov lr, r3
800ed76: 4770 bx lr
0800ed78 <_fini>:
800ed78: b5f8 push {r3, r4, r5, r6, r7, lr}
800ed7a: bf00 nop
800ed7c: bcf8 pop {r3, r4, r5, r6, r7}
800ed7e: bc08 pop {r3}
800ed80: 469e mov lr, r3
800ed82: 4770 bx lr
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