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63d3980ddc47e68756aa291d008adba36d84f963
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea 63d3980ddc wip
2026-04-16 20:28:50 +02:00

31826 lines
1.2 MiB
Raw Blame History

AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000ce50 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 0000030c 0800cf5c 0800cf5c 0000df5c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800d268 0800d268 0000f1d4 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800d268 0800d268 0000e268 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800d270 0800d270 0000f1d4 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800d270 0800d270 0000e270 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800d274 0800d274 0000e274 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001d4 20000000 0800d278 0000f000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 0000168c 200001d8 0800d44c 0000f1d8 2**3
ALLOC
10 ._user_heap_stack 00000604 20001864 0800d44c 0000f864 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 0000f1d4 2**0
CONTENTS, READONLY
12 .debug_info 00018c13 00000000 00000000 0000f1fd 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00004586 00000000 00000000 00027e10 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00001628 00000000 00000000 0002c398 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00001102 00000000 00000000 0002d9c0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001c8e2 00000000 00000000 0002eac2 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001d4aa 00000000 00000000 0004b3a4 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 00095b5f 00000000 00000000 0006884e 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 000fe3ad 2**0
CONTENTS, READONLY
20 .debug_frame 00005fd8 00000000 00000000 000fe3f0 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 001043c8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001d8 .word 0x200001d8
8000128: 00000000 .word 0x00000000
800012c: 0800cf44 .word 0x0800cf44
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001dc .word 0x200001dc
8000148: 0800cf44 .word 0x0800cf44
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <manageAdc>:
uint16_t ch5 ;
uint16_t ch6 ;
uint16_t ch7 ;
uint16_t ch8 ;
void manageAdc(void){
800015c: b480 push {r7}
800015e: af00 add r7, sp, #0
if (adc_avg_ready)
8000160: 4b12 ldr r3, [pc, #72] @ (80001ac <manageAdc+0x50>)
8000162: 781b ldrb r3, [r3, #0]
8000164: b2db uxtb r3, r3
8000166: 2b00 cmp r3, #0
8000168: d01b beq.n 80001a2 <manageAdc+0x46>
{
adc_avg_ready = 0;
800016a: 4b10 ldr r3, [pc, #64] @ (80001ac <manageAdc+0x50>)
800016c: 2200 movs r2, #0
800016e: 701a strb r2, [r3, #0]
// Read averaged channels (example mapping)
ch4 = adc_avg[0];
8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 <manageAdc+0x54>)
8000172: 881b ldrh r3, [r3, #0]
8000174: b29a uxth r2, r3
8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 <manageAdc+0x58>)
8000178: 801a strh r2, [r3, #0]
ch5 = adc_avg[1];
800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 <manageAdc+0x54>)
800017c: 885b ldrh r3, [r3, #2]
800017e: b29a uxth r2, r3
8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 <manageAdc+0x5c>)
8000182: 801a strh r2, [r3, #0]
ch6 = adc_avg[2];
8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 <manageAdc+0x54>)
8000186: 889b ldrh r3, [r3, #4]
8000188: b29a uxth r2, r3
800018a: 4b0c ldr r3, [pc, #48] @ (80001bc <manageAdc+0x60>)
800018c: 801a strh r2, [r3, #0]
ch7 = adc_avg[3];
800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 <manageAdc+0x54>)
8000190: 88db ldrh r3, [r3, #6]
8000192: b29a uxth r2, r3
8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 <manageAdc+0x64>)
8000196: 801a strh r2, [r3, #0]
ch8 = adc_avg[4];
8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 <manageAdc+0x54>)
800019a: 891b ldrh r3, [r3, #8]
800019c: b29a uxth r2, r3
800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 <manageAdc+0x68>)
80001a0: 801a strh r2, [r3, #0]
// Use them (convert to volts, control, etc.)
// float v4 = (3.3f * ch4) / 4095.0f;
}
}
80001a2: bf00 nop
80001a4: 46bd mov sp, r7
80001a6: bc80 pop {r7}
80001a8: 4770 bx lr
80001aa: bf00 nop
80001ac: 20000221 .word 0x20000221
80001b0: 20000200 .word 0x20000200
80001b4: 20000222 .word 0x20000222
80001b8: 20000224 .word 0x20000224
80001bc: 20000226 .word 0x20000226
80001c0: 20000228 .word 0x20000228
80001c4: 2000022a .word 0x2000022a
080001c8 <readAdc>:
void readAdc(void){
80001c8: b480 push {r7}
80001ca: b083 sub sp, #12
80001cc: af00 add r7, sp, #0
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001ce: 2300 movs r3, #0
80001d0: 71fb strb r3, [r7, #7]
80001d2: e010 b.n 80001f6 <readAdc+0x2e>
{
adc_sum[i] += adc_dma_buf[i];
80001d4: 79fb ldrb r3, [r7, #7]
80001d6: 4a21 ldr r2, [pc, #132] @ (800025c <readAdc+0x94>)
80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80001dc: b299 uxth r1, r3
80001de: 79fb ldrb r3, [r7, #7]
80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 <readAdc+0x98>)
80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2]
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 440a add r2, r1
80001ea: 491d ldr r1, [pc, #116] @ (8000260 <readAdc+0x98>)
80001ec: f841 2023 str.w r2, [r1, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001f0: 79fb ldrb r3, [r7, #7]
80001f2: 3301 adds r3, #1
80001f4: 71fb strb r3, [r7, #7]
80001f6: 79fb ldrb r3, [r7, #7]
80001f8: 2b04 cmp r3, #4
80001fa: d9eb bls.n 80001d4 <readAdc+0xc>
}
adc_sum_count++;
80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 <readAdc+0x9c>)
80001fe: 781b ldrb r3, [r3, #0]
8000200: 3301 adds r3, #1
8000202: b2da uxtb r2, r3
8000204: 4b17 ldr r3, [pc, #92] @ (8000264 <readAdc+0x9c>)
8000206: 701a strb r2, [r3, #0]
/* When we collected ADC_AVG_WINDOW samples → compute average */
if (adc_sum_count >= ADC_AVG_WINDOW)
8000208: 4b16 ldr r3, [pc, #88] @ (8000264 <readAdc+0x9c>)
800020a: 781b ldrb r3, [r3, #0]
800020c: 2b04 cmp r3, #4
800020e: d920 bls.n 8000252 <readAdc+0x8a>
{
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
8000210: 2300 movs r3, #0
8000212: 71bb strb r3, [r7, #6]
8000214: e014 b.n 8000240 <readAdc+0x78>
{
adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW);
8000216: 79bb ldrb r3, [r7, #6]
8000218: 4a11 ldr r2, [pc, #68] @ (8000260 <readAdc+0x98>)
800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800021e: 4a12 ldr r2, [pc, #72] @ (8000268 <readAdc+0xa0>)
8000220: fba2 2303 umull r2, r3, r2, r3
8000224: 089a lsrs r2, r3, #2
8000226: 79bb ldrb r3, [r7, #6]
8000228: b291 uxth r1, r2
800022a: 4a10 ldr r2, [pc, #64] @ (800026c <readAdc+0xa4>)
800022c: f822 1013 strh.w r1, [r2, r3, lsl #1]
adc_sum[i] = 0;
8000230: 79bb ldrb r3, [r7, #6]
8000232: 4a0b ldr r2, [pc, #44] @ (8000260 <readAdc+0x98>)
8000234: 2100 movs r1, #0
8000236: f842 1023 str.w r1, [r2, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
800023a: 79bb ldrb r3, [r7, #6]
800023c: 3301 adds r3, #1
800023e: 71bb strb r3, [r7, #6]
8000240: 79bb ldrb r3, [r7, #6]
8000242: 2b04 cmp r3, #4
8000244: d9e7 bls.n 8000216 <readAdc+0x4e>
}
adc_sum_count = 0;
8000246: 4b07 ldr r3, [pc, #28] @ (8000264 <readAdc+0x9c>)
8000248: 2200 movs r2, #0
800024a: 701a strb r2, [r3, #0]
adc_avg_ready = 1; // tell main loop new data is ready
800024c: 4b08 ldr r3, [pc, #32] @ (8000270 <readAdc+0xa8>)
800024e: 2201 movs r2, #1
8000250: 701a strb r2, [r3, #0]
}
}
8000252: bf00 nop
8000254: 370c adds r7, #12
8000256: 46bd mov sp, r7
8000258: bc80 pop {r7}
800025a: 4770 bx lr
800025c: 200001f4 .word 0x200001f4
8000260: 2000020c .word 0x2000020c
8000264: 20000220 .word 0x20000220
8000268: cccccccd .word 0xcccccccd
800026c: 20000200 .word 0x20000200
8000270: 20000221 .word 0x20000221
08000274 <EEW_Read>:
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data);
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
void loadEE(void);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
8000274: b580 push {r7, lr}
8000276: b082 sub sp, #8
8000278: af00 add r7, sp, #0
800027a: 4603 mov r3, r0
800027c: 6039 str r1, [r7, #0]
800027e: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000280: 79fb ldrb r3, [r7, #7]
8000282: b29b uxth r3, r3
8000284: 3301 adds r3, #1
8000286: b29b uxth r3, r3
8000288: 6839 ldr r1, [r7, #0]
800028a: 4618 mov r0, r3
800028c: f000 ff62 bl 8001154 <EE_ReadVariable>
8000290: 4603 mov r3, r0
}
8000292: 4618 mov r0, r3
8000294: 3708 adds r7, #8
8000296: 46bd mov sp, r7
8000298: bd80 pop {r7, pc}
0800029a <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
800029a: b580 push {r7, lr}
800029c: b082 sub sp, #8
800029e: af00 add r7, sp, #0
80002a0: 4603 mov r3, r0
80002a2: 460a mov r2, r1
80002a4: 71fb strb r3, [r7, #7]
80002a6: 4613 mov r3, r2
80002a8: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80002aa: 79fb ldrb r3, [r7, #7]
80002ac: b29b uxth r3, r3
80002ae: 3301 adds r3, #1
80002b0: b29b uxth r3, r3
80002b2: 88ba ldrh r2, [r7, #4]
80002b4: 4611 mov r1, r2
80002b6: 4618 mov r0, r3
80002b8: f000 ff68 bl 800118c <EE_WriteVariable>
80002bc: 4603 mov r3, r0
}
80002be: 4618 mov r0, r3
80002c0: 3708 adds r7, #8
80002c2: 46bd mov sp, r7
80002c4: bd80 pop {r7, pc}
080002c6 <toHex>:
extern const uint8_t deftab[];
extern omCiclo_st stCiclo;
extern omCiclo_st memstCiclo;
extern uint8_t stPulsanti;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80002c6: b490 push {r4, r7}
80002c8: b082 sub sp, #8
80002ca: af00 add r7, sp, #0
80002cc: 4604 mov r4, r0
80002ce: 4608 mov r0, r1
80002d0: 4611 mov r1, r2
80002d2: 461a mov r2, r3
80002d4: 4623 mov r3, r4
80002d6: 71fb strb r3, [r7, #7]
80002d8: 4603 mov r3, r0
80002da: 71bb strb r3, [r7, #6]
80002dc: 460b mov r3, r1
80002de: 717b strb r3, [r7, #5]
80002e0: 4613 mov r3, r2
80002e2: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80002e4: 79fb ldrb r3, [r7, #7]
80002e6: 2b2f cmp r3, #47 @ 0x2f
80002e8: d906 bls.n 80002f8 <toHex+0x32>
80002ea: 79fb ldrb r3, [r7, #7]
80002ec: 2b39 cmp r3, #57 @ 0x39
80002ee: d803 bhi.n 80002f8 <toHex+0x32>
c1-='0';
80002f0: 79fb ldrb r3, [r7, #7]
80002f2: 3b30 subs r3, #48 @ 0x30
80002f4: 71fb strb r3, [r7, #7]
80002f6: e00b b.n 8000310 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80002f8: 79fb ldrb r3, [r7, #7]
80002fa: 2b60 cmp r3, #96 @ 0x60
80002fc: d906 bls.n 800030c <toHex+0x46>
80002fe: 79fb ldrb r3, [r7, #7]
8000300: 2b66 cmp r3, #102 @ 0x66
8000302: d803 bhi.n 800030c <toHex+0x46>
c1=(c1-'a')+10;
8000304: 79fb ldrb r3, [r7, #7]
8000306: 3b57 subs r3, #87 @ 0x57
8000308: 71fb strb r3, [r7, #7]
800030a: e001 b.n 8000310 <toHex+0x4a>
}else return false;
800030c: 2300 movs r3, #0
800030e: e070 b.n 80003f2 <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
8000310: 79bb ldrb r3, [r7, #6]
8000312: 2b2f cmp r3, #47 @ 0x2f
8000314: d906 bls.n 8000324 <toHex+0x5e>
8000316: 79bb ldrb r3, [r7, #6]
8000318: 2b39 cmp r3, #57 @ 0x39
800031a: d803 bhi.n 8000324 <toHex+0x5e>
c2-='0';
800031c: 79bb ldrb r3, [r7, #6]
800031e: 3b30 subs r3, #48 @ 0x30
8000320: 71bb strb r3, [r7, #6]
8000322: e00b b.n 800033c <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
8000324: 79bb ldrb r3, [r7, #6]
8000326: 2b60 cmp r3, #96 @ 0x60
8000328: d906 bls.n 8000338 <toHex+0x72>
800032a: 79bb ldrb r3, [r7, #6]
800032c: 2b66 cmp r3, #102 @ 0x66
800032e: d803 bhi.n 8000338 <toHex+0x72>
c2=(c2-'a')+10;
8000330: 79bb ldrb r3, [r7, #6]
8000332: 3b57 subs r3, #87 @ 0x57
8000334: 71bb strb r3, [r7, #6]
8000336: e001 b.n 800033c <toHex+0x76>
}else return false;
8000338: 2300 movs r3, #0
800033a: e05a b.n 80003f2 <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
800033c: 797b ldrb r3, [r7, #5]
800033e: 2b2f cmp r3, #47 @ 0x2f
8000340: d906 bls.n 8000350 <toHex+0x8a>
8000342: 797b ldrb r3, [r7, #5]
8000344: 2b39 cmp r3, #57 @ 0x39
8000346: d803 bhi.n 8000350 <toHex+0x8a>
c3-='0';
8000348: 797b ldrb r3, [r7, #5]
800034a: 3b30 subs r3, #48 @ 0x30
800034c: 717b strb r3, [r7, #5]
800034e: e00b b.n 8000368 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000350: 797b ldrb r3, [r7, #5]
8000352: 2b60 cmp r3, #96 @ 0x60
8000354: d906 bls.n 8000364 <toHex+0x9e>
8000356: 797b ldrb r3, [r7, #5]
8000358: 2b66 cmp r3, #102 @ 0x66
800035a: d803 bhi.n 8000364 <toHex+0x9e>
c3=(c3-'a')+10;
800035c: 797b ldrb r3, [r7, #5]
800035e: 3b57 subs r3, #87 @ 0x57
8000360: 717b strb r3, [r7, #5]
8000362: e001 b.n 8000368 <toHex+0xa2>
}else return false;
8000364: 2300 movs r3, #0
8000366: e044 b.n 80003f2 <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000368: 793b ldrb r3, [r7, #4]
800036a: 2b2f cmp r3, #47 @ 0x2f
800036c: d906 bls.n 800037c <toHex+0xb6>
800036e: 793b ldrb r3, [r7, #4]
8000370: 2b39 cmp r3, #57 @ 0x39
8000372: d803 bhi.n 800037c <toHex+0xb6>
c4-='0';
8000374: 793b ldrb r3, [r7, #4]
8000376: 3b30 subs r3, #48 @ 0x30
8000378: 713b strb r3, [r7, #4]
800037a: e00b b.n 8000394 <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
800037c: 793b ldrb r3, [r7, #4]
800037e: 2b60 cmp r3, #96 @ 0x60
8000380: d906 bls.n 8000390 <toHex+0xca>
8000382: 793b ldrb r3, [r7, #4]
8000384: 2b66 cmp r3, #102 @ 0x66
8000386: d803 bhi.n 8000390 <toHex+0xca>
c4=(c4-'a')+10;
8000388: 793b ldrb r3, [r7, #4]
800038a: 3b57 subs r3, #87 @ 0x57
800038c: 713b strb r3, [r7, #4]
800038e: e001 b.n 8000394 <toHex+0xce>
}else return false;
8000390: 2300 movs r3, #0
8000392: e02e b.n 80003f2 <toHex+0x12c>
*retval=c1;
8000394: 79fb ldrb r3, [r7, #7]
8000396: b29a uxth r2, r3
8000398: 693b ldr r3, [r7, #16]
800039a: 801a strh r2, [r3, #0]
*retval*=16;
800039c: 693b ldr r3, [r7, #16]
800039e: 881b ldrh r3, [r3, #0]
80003a0: 011b lsls r3, r3, #4
80003a2: b29a uxth r2, r3
80003a4: 693b ldr r3, [r7, #16]
80003a6: 801a strh r2, [r3, #0]
*retval+=c2;
80003a8: 693b ldr r3, [r7, #16]
80003aa: 881a ldrh r2, [r3, #0]
80003ac: 79bb ldrb r3, [r7, #6]
80003ae: b29b uxth r3, r3
80003b0: 4413 add r3, r2
80003b2: b29a uxth r2, r3
80003b4: 693b ldr r3, [r7, #16]
80003b6: 801a strh r2, [r3, #0]
*retval*=16;
80003b8: 693b ldr r3, [r7, #16]
80003ba: 881b ldrh r3, [r3, #0]
80003bc: 011b lsls r3, r3, #4
80003be: b29a uxth r2, r3
80003c0: 693b ldr r3, [r7, #16]
80003c2: 801a strh r2, [r3, #0]
*retval+=c3;
80003c4: 693b ldr r3, [r7, #16]
80003c6: 881a ldrh r2, [r3, #0]
80003c8: 797b ldrb r3, [r7, #5]
80003ca: b29b uxth r3, r3
80003cc: 4413 add r3, r2
80003ce: b29a uxth r2, r3
80003d0: 693b ldr r3, [r7, #16]
80003d2: 801a strh r2, [r3, #0]
*retval*=16;
80003d4: 693b ldr r3, [r7, #16]
80003d6: 881b ldrh r3, [r3, #0]
80003d8: 011b lsls r3, r3, #4
80003da: b29a uxth r2, r3
80003dc: 693b ldr r3, [r7, #16]
80003de: 801a strh r2, [r3, #0]
*retval+=c4;
80003e0: 693b ldr r3, [r7, #16]
80003e2: 881a ldrh r2, [r3, #0]
80003e4: 793b ldrb r3, [r7, #4]
80003e6: b29b uxth r3, r3
80003e8: 4413 add r3, r2
80003ea: b29a uxth r2, r3
80003ec: 693b ldr r3, [r7, #16]
80003ee: 801a strh r2, [r3, #0]
return true;
80003f0: 2301 movs r3, #1
}
80003f2: 4618 mov r0, r3
80003f4: 3708 adds r7, #8
80003f6: 46bd mov sp, r7
80003f8: bc90 pop {r4, r7}
80003fa: 4770 bx lr
080003fc <manageCDC>:
void manageCDC(void){
80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8000400: b0a7 sub sp, #156 @ 0x9c
8000402: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
8000404: f00b fc3a bl 800bc7c <CDC_Available>
8000408: 4603 mov r3, r0
800040a: 2b00 cmp r3, #0
800040c: f000 84d2 beq.w 8000db4 <manageCDC+0x9b8>
int rx = CDC_ReadByte();
8000410: f00b fc48 bl 800bca4 <CDC_ReadByte>
8000414: 67b8 str r0, [r7, #120] @ 0x78
if (rx < 0) return;
8000416: 6fbb ldr r3, [r7, #120] @ 0x78
8000418: 2b00 cmp r3, #0
800041a: f2c0 84ca blt.w 8000db2 <manageCDC+0x9b6>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
800041e: 4bad ldr r3, [pc, #692] @ (80006d4 <manageCDC+0x2d8>)
8000420: 781b ldrb r3, [r3, #0]
8000422: 461a mov r2, r3
8000424: 6fbb ldr r3, [r7, #120] @ 0x78
8000426: b2d9 uxtb r1, r3
8000428: 4bab ldr r3, [pc, #684] @ (80006d8 <manageCDC+0x2dc>)
800042a: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
800042c: bf00 nop
800042e: 4ba9 ldr r3, [pc, #676] @ (80006d4 <manageCDC+0x2d8>)
8000430: 781b ldrb r3, [r3, #0]
8000432: 461a mov r2, r3
8000434: 4ba8 ldr r3, [pc, #672] @ (80006d8 <manageCDC+0x2dc>)
8000436: 4413 add r3, r2
8000438: 2101 movs r1, #1
800043a: 4618 mov r0, r3
800043c: f00b fcf4 bl 800be28 <CDC_Transmit_FS>
8000440: 4603 mov r3, r0
8000442: 2b01 cmp r3, #1
8000444: d0f3 beq.n 800042e <manageCDC+0x32>
if((rx==0x0d)||(rx==0x0a)){
8000446: 6fbb ldr r3, [r7, #120] @ 0x78
8000448: 2b0d cmp r3, #13
800044a: d003 beq.n 8000454 <manageCDC+0x58>
800044c: 6fbb ldr r3, [r7, #120] @ 0x78
800044e: 2b0a cmp r3, #10
8000450: f040 84a8 bne.w 8000da4 <manageCDC+0x9a8>
if(rxidx){
8000454: 4b9f ldr r3, [pc, #636] @ (80006d4 <manageCDC+0x2d8>)
8000456: 781b ldrb r3, [r3, #0]
8000458: 2b00 cmp r3, #0
800045a: f000 849f beq.w 8000d9c <manageCDC+0x9a0>
switch(rxbuf[0]){
800045e: 4b9e ldr r3, [pc, #632] @ (80006d8 <manageCDC+0x2dc>)
8000460: 781b ldrb r3, [r3, #0]
8000462: 2b6d cmp r3, #109 @ 0x6d
8000464: f000 80fb beq.w 800065e <manageCDC+0x262>
8000468: 2b6d cmp r3, #109 @ 0x6d
800046a: f300 8485 bgt.w 8000d78 <manageCDC+0x97c>
800046e: 2b69 cmp r3, #105 @ 0x69
8000470: d00a beq.n 8000488 <manageCDC+0x8c>
8000472: 2b69 cmp r3, #105 @ 0x69
8000474: f300 8480 bgt.w 8000d78 <manageCDC+0x97c>
8000478: 2b49 cmp r3, #73 @ 0x49
800047a: f000 80df beq.w 800063c <manageCDC+0x240>
800047e: 2b65 cmp r3, #101 @ 0x65
8000480: f000 8228 beq.w 80008d4 <manageCDC+0x4d8>
8000484: f000 bc78 b.w 8000d78 <manageCDC+0x97c>
case 'i':
sprintf((char*)s,"info\n");
8000488: f107 030c add.w r3, r7, #12
800048c: 4993 ldr r1, [pc, #588] @ (80006dc <manageCDC+0x2e0>)
800048e: 4618 mov r0, r3
8000490: f00c f8a8 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000494: bf00 nop
8000496: f107 030c add.w r3, r7, #12
800049a: 2105 movs r1, #5
800049c: 4618 mov r0, r3
800049e: f00b fcc3 bl 800be28 <CDC_Transmit_FS>
80004a2: 4603 mov r3, r0
80004a4: 2b01 cmp r3, #1
80004a6: d0f6 beq.n 8000496 <manageCDC+0x9a>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
80004a8: 2100 movs r1, #0
80004aa: 488d ldr r0, [pc, #564] @ (80006e0 <manageCDC+0x2e4>)
80004ac: f002 f9b8 bl 8002820 <IsPwmRunning>
80004b0: 4603 mov r3, r0
80004b2: 4698 mov r8, r3
80004b4: 2104 movs r1, #4
80004b6: 488a ldr r0, [pc, #552] @ (80006e0 <manageCDC+0x2e4>)
80004b8: f002 f9b2 bl 8002820 <IsPwmRunning>
80004bc: 4603 mov r3, r0
80004be: 4699 mov r9, r3
80004c0: 2108 movs r1, #8
80004c2: 4887 ldr r0, [pc, #540] @ (80006e0 <manageCDC+0x2e4>)
80004c4: f002 f9ac bl 8002820 <IsPwmRunning>
80004c8: 4603 mov r3, r0
80004ca: 461c mov r4, r3
80004cc: 210c movs r1, #12
80004ce: 4884 ldr r0, [pc, #528] @ (80006e0 <manageCDC+0x2e4>)
80004d0: f002 f9a6 bl 8002820 <IsPwmRunning>
80004d4: 4603 mov r3, r0
80004d6: 461d mov r5, r3
80004d8: 2100 movs r1, #0
80004da: 4882 ldr r0, [pc, #520] @ (80006e4 <manageCDC+0x2e8>)
80004dc: f002 f9a0 bl 8002820 <IsPwmRunning>
80004e0: 4603 mov r3, r0
80004e2: 461e mov r6, r3
80004e4: 2104 movs r1, #4
80004e6: 487f ldr r0, [pc, #508] @ (80006e4 <manageCDC+0x2e8>)
80004e8: f002 f99a bl 8002820 <IsPwmRunning>
80004ec: 4603 mov r3, r0
80004ee: 607b str r3, [r7, #4]
80004f0: 2108 movs r1, #8
80004f2: 487c ldr r0, [pc, #496] @ (80006e4 <manageCDC+0x2e8>)
80004f4: f002 f994 bl 8002820 <IsPwmRunning>
80004f8: 4603 mov r3, r0
80004fa: 603b str r3, [r7, #0]
80004fc: 210c movs r1, #12
80004fe: 4879 ldr r0, [pc, #484] @ (80006e4 <manageCDC+0x2e8>)
8000500: f002 f98e bl 8002820 <IsPwmRunning>
8000504: 4603 mov r3, r0
8000506: f107 000c add.w r0, r7, #12
800050a: 9305 str r3, [sp, #20]
800050c: 683a ldr r2, [r7, #0]
800050e: 9204 str r2, [sp, #16]
8000510: 687b ldr r3, [r7, #4]
8000512: 9303 str r3, [sp, #12]
8000514: 9602 str r6, [sp, #8]
8000516: 9501 str r5, [sp, #4]
8000518: 9400 str r4, [sp, #0]
800051a: 464b mov r3, r9
800051c: 4642 mov r2, r8
800051e: 4972 ldr r1, [pc, #456] @ (80006e8 <manageCDC+0x2ec>)
8000520: f00c f860 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000524: bf00 nop
8000526: f107 030c add.w r3, r7, #12
800052a: 4618 mov r0, r3
800052c: f7ff fe0e bl 800014c <strlen>
8000530: 4603 mov r3, r0
8000532: b29a uxth r2, r3
8000534: f107 030c add.w r3, r7, #12
8000538: 4611 mov r1, r2
800053a: 4618 mov r0, r3
800053c: f00b fc74 bl 800be28 <CDC_Transmit_FS>
8000540: 4603 mov r3, r0
8000542: 2b01 cmp r3, #1
8000544: d0ef beq.n 8000526 <manageCDC+0x12a>
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
8000546: 4b66 ldr r3, [pc, #408] @ (80006e0 <manageCDC+0x2e4>)
8000548: 681b ldr r3, [r3, #0]
800054a: 6b5b ldr r3, [r3, #52] @ 0x34
800054c: 607b str r3, [r7, #4]
800054e: 4b64 ldr r3, [pc, #400] @ (80006e0 <manageCDC+0x2e4>)
8000550: 681b ldr r3, [r3, #0]
8000552: 6b99 ldr r1, [r3, #56] @ 0x38
8000554: 6039 str r1, [r7, #0]
8000556: 4b62 ldr r3, [pc, #392] @ (80006e0 <manageCDC+0x2e4>)
8000558: 681b ldr r3, [r3, #0]
800055a: 6bdb ldr r3, [r3, #60] @ 0x3c
800055c: 4a60 ldr r2, [pc, #384] @ (80006e0 <manageCDC+0x2e4>)
800055e: 6812 ldr r2, [r2, #0]
8000560: 6c12 ldr r2, [r2, #64] @ 0x40
8000562: 4960 ldr r1, [pc, #384] @ (80006e4 <manageCDC+0x2e8>)
8000564: 6809 ldr r1, [r1, #0]
8000566: 6b49 ldr r1, [r1, #52] @ 0x34
8000568: 485e ldr r0, [pc, #376] @ (80006e4 <manageCDC+0x2e8>)
800056a: 6800 ldr r0, [r0, #0]
800056c: 6b80 ldr r0, [r0, #56] @ 0x38
800056e: 4c5d ldr r4, [pc, #372] @ (80006e4 <manageCDC+0x2e8>)
8000570: 6824 ldr r4, [r4, #0]
8000572: 6be4 ldr r4, [r4, #60] @ 0x3c
8000574: 4d5b ldr r5, [pc, #364] @ (80006e4 <manageCDC+0x2e8>)
8000576: 682d ldr r5, [r5, #0]
8000578: 6c2d ldr r5, [r5, #64] @ 0x40
800057a: f107 060c add.w r6, r7, #12
800057e: 9505 str r5, [sp, #20]
8000580: 9404 str r4, [sp, #16]
8000582: 9003 str r0, [sp, #12]
8000584: 9102 str r1, [sp, #8]
8000586: 9201 str r2, [sp, #4]
8000588: 9300 str r3, [sp, #0]
800058a: 683b ldr r3, [r7, #0]
800058c: 687a ldr r2, [r7, #4]
800058e: 4957 ldr r1, [pc, #348] @ (80006ec <manageCDC+0x2f0>)
8000590: 4630 mov r0, r6
8000592: f00c f827 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000596: bf00 nop
8000598: f107 030c add.w r3, r7, #12
800059c: 4618 mov r0, r3
800059e: f7ff fdd5 bl 800014c <strlen>
80005a2: 4603 mov r3, r0
80005a4: b29a uxth r2, r3
80005a6: f107 030c add.w r3, r7, #12
80005aa: 4611 mov r1, r2
80005ac: 4618 mov r0, r3
80005ae: f00b fc3b bl 800be28 <CDC_Transmit_FS>
80005b2: 4603 mov r3, r0
80005b4: 2b01 cmp r3, #1
80005b6: d0ef beq.n 8000598 <manageCDC+0x19c>
sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8);
80005b8: 4b4d ldr r3, [pc, #308] @ (80006f0 <manageCDC+0x2f4>)
80005ba: 781b ldrb r3, [r3, #0]
80005bc: 461d mov r5, r3
80005be: 4b4d ldr r3, [pc, #308] @ (80006f4 <manageCDC+0x2f8>)
80005c0: 881b ldrh r3, [r3, #0]
80005c2: 461e mov r6, r3
80005c4: 4b4c ldr r3, [pc, #304] @ (80006f8 <manageCDC+0x2fc>)
80005c6: 881b ldrh r3, [r3, #0]
80005c8: 461a mov r2, r3
80005ca: 4b4c ldr r3, [pc, #304] @ (80006fc <manageCDC+0x300>)
80005cc: 881b ldrh r3, [r3, #0]
80005ce: 4619 mov r1, r3
80005d0: 4b4b ldr r3, [pc, #300] @ (8000700 <manageCDC+0x304>)
80005d2: 881b ldrh r3, [r3, #0]
80005d4: 461c mov r4, r3
80005d6: 4b4b ldr r3, [pc, #300] @ (8000704 <manageCDC+0x308>)
80005d8: 881b ldrh r3, [r3, #0]
80005da: f107 000c add.w r0, r7, #12
80005de: 9303 str r3, [sp, #12]
80005e0: 9402 str r4, [sp, #8]
80005e2: 9101 str r1, [sp, #4]
80005e4: 9200 str r2, [sp, #0]
80005e6: 4633 mov r3, r6
80005e8: 462a mov r2, r5
80005ea: 4947 ldr r1, [pc, #284] @ (8000708 <manageCDC+0x30c>)
80005ec: f00b fffa bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80005f0: bf00 nop
80005f2: f107 030c add.w r3, r7, #12
80005f6: 4618 mov r0, r3
80005f8: f7ff fda8 bl 800014c <strlen>
80005fc: 4603 mov r3, r0
80005fe: b29a uxth r2, r3
8000600: f107 030c add.w r3, r7, #12
8000604: 4611 mov r1, r2
8000606: 4618 mov r0, r3
8000608: f00b fc0e bl 800be28 <CDC_Transmit_FS>
800060c: 4603 mov r3, r0
800060e: 2b01 cmp r3, #1
8000610: d0ef beq.n 80005f2 <manageCDC+0x1f6>
sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti);
8000612: 4b3e ldr r3, [pc, #248] @ (800070c <manageCDC+0x310>)
8000614: 781b ldrb r3, [r3, #0]
8000616: 461a mov r2, r3
8000618: 4b3d ldr r3, [pc, #244] @ (8000710 <manageCDC+0x314>)
800061a: 781b ldrb r3, [r3, #0]
800061c: f107 000c add.w r0, r7, #12
8000620: 493c ldr r1, [pc, #240] @ (8000714 <manageCDC+0x318>)
8000622: f00b ffdf bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, 31) == USBD_BUSY);
8000626: bf00 nop
8000628: f107 030c add.w r3, r7, #12
800062c: 211f movs r1, #31
800062e: 4618 mov r0, r3
8000630: f00b fbfa bl 800be28 <CDC_Transmit_FS>
8000634: 4603 mov r3, r0
8000636: 2b01 cmp r3, #1
8000638: d0f6 beq.n 8000628 <manageCDC+0x22c>
break;
800063a: e3af b.n 8000d9c <manageCDC+0x9a0>
case 'I':
sprintf((char*)s,"\nID000000");
800063c: f107 030c add.w r3, r7, #12
8000640: 4935 ldr r1, [pc, #212] @ (8000718 <manageCDC+0x31c>)
8000642: 4618 mov r0, r3
8000644: f00b ffce bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, 9) == USBD_BUSY);
8000648: bf00 nop
800064a: f107 030c add.w r3, r7, #12
800064e: 2109 movs r1, #9
8000650: 4618 mov r0, r3
8000652: f00b fbe9 bl 800be28 <CDC_Transmit_FS>
8000656: 4603 mov r3, r0
8000658: 2b01 cmp r3, #1
800065a: d0f6 beq.n 800064a <manageCDC+0x24e>
break;
800065c: e39e b.n 8000d9c <manageCDC+0x9a0>
case 'm':
if(rxidx==8){
800065e: 4b1d ldr r3, [pc, #116] @ (80006d4 <manageCDC+0x2d8>)
8000660: 781b ldrb r3, [r3, #0]
8000662: 2b08 cmp r3, #8
8000664: f040 8124 bne.w 80008b0 <manageCDC+0x4b4>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
8000668: 4b1b ldr r3, [pc, #108] @ (80006d8 <manageCDC+0x2dc>)
800066a: 785b ldrb r3, [r3, #1]
800066c: 2b30 cmp r3, #48 @ 0x30
800066e: f240 810e bls.w 800088e <manageCDC+0x492>
8000672: 4b19 ldr r3, [pc, #100] @ (80006d8 <manageCDC+0x2dc>)
8000674: 785b ldrb r3, [r3, #1]
8000676: 2b34 cmp r3, #52 @ 0x34
8000678: f200 8109 bhi.w 800088e <manageCDC+0x492>
mot=rxbuf[1]-='0';
800067c: 4b16 ldr r3, [pc, #88] @ (80006d8 <manageCDC+0x2dc>)
800067e: 785b ldrb r3, [r3, #1]
8000680: 3b30 subs r3, #48 @ 0x30
8000682: b2da uxtb r2, r3
8000684: 4b14 ldr r3, [pc, #80] @ (80006d8 <manageCDC+0x2dc>)
8000686: 705a strb r2, [r3, #1]
8000688: 4b13 ldr r3, [pc, #76] @ (80006d8 <manageCDC+0x2dc>)
800068a: 785b ldrb r3, [r3, #1]
800068c: f887 3077 strb.w r3, [r7, #119] @ 0x77
if(rxbuf[2]=='f'){
8000690: 4b11 ldr r3, [pc, #68] @ (80006d8 <manageCDC+0x2dc>)
8000692: 789b ldrb r3, [r3, #2]
8000694: 2b66 cmp r3, #102 @ 0x66
8000696: d103 bne.n 80006a0 <manageCDC+0x2a4>
dir=FW;
8000698: 2300 movs r3, #0
800069a: f887 307f strb.w r3, [r7, #127] @ 0x7f
800069e: e03f b.n 8000720 <manageCDC+0x324>
}else if(rxbuf[2]=='b'){
80006a0: 4b0d ldr r3, [pc, #52] @ (80006d8 <manageCDC+0x2dc>)
80006a2: 789b ldrb r3, [r3, #2]
80006a4: 2b62 cmp r3, #98 @ 0x62
80006a6: d103 bne.n 80006b0 <manageCDC+0x2b4>
dir=BW;
80006a8: 2301 movs r3, #1
80006aa: f887 307f strb.w r3, [r7, #127] @ 0x7f
80006ae: e037 b.n 8000720 <manageCDC+0x324>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80006b0: f107 030c add.w r3, r7, #12
80006b4: 4919 ldr r1, [pc, #100] @ (800071c <manageCDC+0x320>)
80006b6: 4618 mov r0, r3
80006b8: f00b ff94 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
80006bc: bf00 nop
80006be: f107 030c add.w r3, r7, #12
80006c2: 2110 movs r1, #16
80006c4: 4618 mov r0, r3
80006c6: f00b fbaf bl 800be28 <CDC_Transmit_FS>
80006ca: 4603 mov r3, r0
80006cc: 2b01 cmp r3, #1
80006ce: d0f6 beq.n 80006be <manageCDC+0x2c2>
break;
80006d0: e364 b.n 8000d9c <manageCDC+0x9a0>
80006d2: bf00 nop
80006d4: 2000022c .word 0x2000022c
80006d8: 20000230 .word 0x20000230
80006dc: 0800cf5c .word 0x0800cf5c
80006e0: 20000308 .word 0x20000308
80006e4: 20000350 .word 0x20000350
80006e8: 0800cf64 .word 0x0800cf64
80006ec: 0800cf7c .word 0x0800cf7c
80006f0: 200003e0 .word 0x200003e0
80006f4: 20000222 .word 0x20000222
80006f8: 20000224 .word 0x20000224
80006fc: 20000226 .word 0x20000226
8000700: 20000228 .word 0x20000228
8000704: 2000022a .word 0x2000022a
8000708: 0800cfb0 .word 0x0800cfb0
800070c: 2000041d .word 0x2000041d
8000710: 2000041c .word 0x2000041c
8000714: 0800cfe8 .word 0x0800cfe8
8000718: 0800d008 .word 0x0800d008
800071c: 0800d014 .word 0x0800d014
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000720: 4bb4 ldr r3, [pc, #720] @ (80009f4 <manageCDC+0x5f8>)
8000722: 78db ldrb r3, [r3, #3]
8000724: 2b2f cmp r3, #47 @ 0x2f
8000726: f240 80a1 bls.w 800086c <manageCDC+0x470>
800072a: 4bb2 ldr r3, [pc, #712] @ (80009f4 <manageCDC+0x5f8>)
800072c: 78db ldrb r3, [r3, #3]
800072e: 2b39 cmp r3, #57 @ 0x39
8000730: f200 809c bhi.w 800086c <manageCDC+0x470>
8000734: 4baf ldr r3, [pc, #700] @ (80009f4 <manageCDC+0x5f8>)
8000736: 791b ldrb r3, [r3, #4]
8000738: 2b2f cmp r3, #47 @ 0x2f
800073a: f240 8097 bls.w 800086c <manageCDC+0x470>
800073e: 4bad ldr r3, [pc, #692] @ (80009f4 <manageCDC+0x5f8>)
8000740: 791b ldrb r3, [r3, #4]
8000742: 2b39 cmp r3, #57 @ 0x39
8000744: f200 8092 bhi.w 800086c <manageCDC+0x470>
8000748: 4baa ldr r3, [pc, #680] @ (80009f4 <manageCDC+0x5f8>)
800074a: 795b ldrb r3, [r3, #5]
800074c: 2b2f cmp r3, #47 @ 0x2f
800074e: f240 808d bls.w 800086c <manageCDC+0x470>
8000752: 4ba8 ldr r3, [pc, #672] @ (80009f4 <manageCDC+0x5f8>)
8000754: 795b ldrb r3, [r3, #5]
8000756: 2b39 cmp r3, #57 @ 0x39
8000758: f200 8088 bhi.w 800086c <manageCDC+0x470>
800075c: 4ba5 ldr r3, [pc, #660] @ (80009f4 <manageCDC+0x5f8>)
800075e: 799b ldrb r3, [r3, #6]
8000760: 2b2f cmp r3, #47 @ 0x2f
8000762: f240 8083 bls.w 800086c <manageCDC+0x470>
8000766: 4ba3 ldr r3, [pc, #652] @ (80009f4 <manageCDC+0x5f8>)
8000768: 799b ldrb r3, [r3, #6]
800076a: 2b39 cmp r3, #57 @ 0x39
800076c: d87e bhi.n 800086c <manageCDC+0x470>
800076e: 4ba1 ldr r3, [pc, #644] @ (80009f4 <manageCDC+0x5f8>)
8000770: 79db ldrb r3, [r3, #7]
8000772: 2b2f cmp r3, #47 @ 0x2f
8000774: d97a bls.n 800086c <manageCDC+0x470>
8000776: 4b9f ldr r3, [pc, #636] @ (80009f4 <manageCDC+0x5f8>)
8000778: 79db ldrb r3, [r3, #7]
800077a: 2b39 cmp r3, #57 @ 0x39
800077c: d876 bhi.n 800086c <manageCDC+0x470>
dm=rxbuf[3]-='0';
800077e: 4b9d ldr r3, [pc, #628] @ (80009f4 <manageCDC+0x5f8>)
8000780: 78db ldrb r3, [r3, #3]
8000782: 3b30 subs r3, #48 @ 0x30
8000784: b2da uxtb r2, r3
8000786: 4b9b ldr r3, [pc, #620] @ (80009f4 <manageCDC+0x5f8>)
8000788: 70da strb r2, [r3, #3]
800078a: 4b9a ldr r3, [pc, #616] @ (80009f4 <manageCDC+0x5f8>)
800078c: 78db ldrb r3, [r3, #3]
800078e: f887 3076 strb.w r3, [r7, #118] @ 0x76
m=rxbuf[4]-='0';
8000792: 4b98 ldr r3, [pc, #608] @ (80009f4 <manageCDC+0x5f8>)
8000794: 791b ldrb r3, [r3, #4]
8000796: 3b30 subs r3, #48 @ 0x30
8000798: b2da uxtb r2, r3
800079a: 4b96 ldr r3, [pc, #600] @ (80009f4 <manageCDC+0x5f8>)
800079c: 711a strb r2, [r3, #4]
800079e: 4b95 ldr r3, [pc, #596] @ (80009f4 <manageCDC+0x5f8>)
80007a0: 791b ldrb r3, [r3, #4]
80007a2: f887 3075 strb.w r3, [r7, #117] @ 0x75
c=rxbuf[5]-='0';
80007a6: 4b93 ldr r3, [pc, #588] @ (80009f4 <manageCDC+0x5f8>)
80007a8: 795b ldrb r3, [r3, #5]
80007aa: 3b30 subs r3, #48 @ 0x30
80007ac: b2da uxtb r2, r3
80007ae: 4b91 ldr r3, [pc, #580] @ (80009f4 <manageCDC+0x5f8>)
80007b0: 715a strb r2, [r3, #5]
80007b2: 4b90 ldr r3, [pc, #576] @ (80009f4 <manageCDC+0x5f8>)
80007b4: 795b ldrb r3, [r3, #5]
80007b6: f887 3074 strb.w r3, [r7, #116] @ 0x74
d=rxbuf[6]-='0';
80007ba: 4b8e ldr r3, [pc, #568] @ (80009f4 <manageCDC+0x5f8>)
80007bc: 799b ldrb r3, [r3, #6]
80007be: 3b30 subs r3, #48 @ 0x30
80007c0: b2da uxtb r2, r3
80007c2: 4b8c ldr r3, [pc, #560] @ (80009f4 <manageCDC+0x5f8>)
80007c4: 719a strb r2, [r3, #6]
80007c6: 4b8b ldr r3, [pc, #556] @ (80009f4 <manageCDC+0x5f8>)
80007c8: 799b ldrb r3, [r3, #6]
80007ca: f887 3073 strb.w r3, [r7, #115] @ 0x73
u=rxbuf[7]-='0';
80007ce: 4b89 ldr r3, [pc, #548] @ (80009f4 <manageCDC+0x5f8>)
80007d0: 79db ldrb r3, [r3, #7]
80007d2: 3b30 subs r3, #48 @ 0x30
80007d4: b2da uxtb r2, r3
80007d6: 4b87 ldr r3, [pc, #540] @ (80009f4 <manageCDC+0x5f8>)
80007d8: 71da strb r2, [r3, #7]
80007da: 4b86 ldr r3, [pc, #536] @ (80009f4 <manageCDC+0x5f8>)
80007dc: 79db ldrb r3, [r3, #7]
80007de: f887 3072 strb.w r3, [r7, #114] @ 0x72
val=dm;
80007e2: f897 3076 ldrb.w r3, [r7, #118] @ 0x76
80007e6: b29b uxth r3, r3
80007e8: 817b strh r3, [r7, #10]
val*=10;
80007ea: 897b ldrh r3, [r7, #10]
80007ec: 461a mov r2, r3
80007ee: 0092 lsls r2, r2, #2
80007f0: 4413 add r3, r2
80007f2: 005b lsls r3, r3, #1
80007f4: b29b uxth r3, r3
80007f6: 817b strh r3, [r7, #10]
val+=m;
80007f8: f897 3075 ldrb.w r3, [r7, #117] @ 0x75
80007fc: b29a uxth r2, r3
80007fe: 897b ldrh r3, [r7, #10]
8000800: 4413 add r3, r2
8000802: b29b uxth r3, r3
8000804: 817b strh r3, [r7, #10]
val*=10;
8000806: 897b ldrh r3, [r7, #10]
8000808: 461a mov r2, r3
800080a: 0092 lsls r2, r2, #2
800080c: 4413 add r3, r2
800080e: 005b lsls r3, r3, #1
8000810: b29b uxth r3, r3
8000812: 817b strh r3, [r7, #10]
val+=c;
8000814: f897 3074 ldrb.w r3, [r7, #116] @ 0x74
8000818: b29a uxth r2, r3
800081a: 897b ldrh r3, [r7, #10]
800081c: 4413 add r3, r2
800081e: b29b uxth r3, r3
8000820: 817b strh r3, [r7, #10]
val*=10;
8000822: 897b ldrh r3, [r7, #10]
8000824: 461a mov r2, r3
8000826: 0092 lsls r2, r2, #2
8000828: 4413 add r3, r2
800082a: 005b lsls r3, r3, #1
800082c: b29b uxth r3, r3
800082e: 817b strh r3, [r7, #10]
val+=d;
8000830: f897 3073 ldrb.w r3, [r7, #115] @ 0x73
8000834: b29a uxth r2, r3
8000836: 897b ldrh r3, [r7, #10]
8000838: 4413 add r3, r2
800083a: b29b uxth r3, r3
800083c: 817b strh r3, [r7, #10]
val*=10;
800083e: 897b ldrh r3, [r7, #10]
8000840: 461a mov r2, r3
8000842: 0092 lsls r2, r2, #2
8000844: 4413 add r3, r2
8000846: 005b lsls r3, r3, #1
8000848: b29b uxth r3, r3
800084a: 817b strh r3, [r7, #10]
val+=u;
800084c: f897 3072 ldrb.w r3, [r7, #114] @ 0x72
8000850: b29a uxth r2, r3
8000852: 897b ldrh r3, [r7, #10]
8000854: 4413 add r3, r2
8000856: b29b uxth r3, r3
8000858: 817b strh r3, [r7, #10]
SetMot(mot,dir,val);
800085a: 897a ldrh r2, [r7, #10]
800085c: f897 107f ldrb.w r1, [r7, #127] @ 0x7f
8000860: f897 3077 ldrb.w r3, [r7, #119] @ 0x77
8000864: 4618 mov r0, r3
8000866: f002 f851 bl 800290c <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800086a: e032 b.n 80008d2 <manageCDC+0x4d6>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
800086c: f107 030c add.w r3, r7, #12
8000870: 4961 ldr r1, [pc, #388] @ (80009f8 <manageCDC+0x5fc>)
8000872: 4618 mov r0, r3
8000874: f00b feb6 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
8000878: bf00 nop
800087a: f107 030c add.w r3, r7, #12
800087e: 2113 movs r1, #19
8000880: 4618 mov r0, r3
8000882: f00b fad1 bl 800be28 <CDC_Transmit_FS>
8000886: 4603 mov r3, r0
8000888: 2b01 cmp r3, #1
800088a: d0f6 beq.n 800087a <manageCDC+0x47e>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800088c: e021 b.n 80008d2 <manageCDC+0x4d6>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
800088e: f107 030c add.w r3, r7, #12
8000892: 495a ldr r1, [pc, #360] @ (80009fc <manageCDC+0x600>)
8000894: 4618 mov r0, r3
8000896: f00b fea5 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800089a: bf00 nop
800089c: f107 030c add.w r3, r7, #12
80008a0: 2113 movs r1, #19
80008a2: 4618 mov r0, r3
80008a4: f00b fac0 bl 800be28 <CDC_Transmit_FS>
80008a8: 4603 mov r3, r0
80008aa: 2b01 cmp r3, #1
80008ac: d0f6 beq.n 800089c <manageCDC+0x4a0>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
80008ae: e275 b.n 8000d9c <manageCDC+0x9a0>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
80008b0: f107 030c add.w r3, r7, #12
80008b4: 4952 ldr r1, [pc, #328] @ (8000a00 <manageCDC+0x604>)
80008b6: 4618 mov r0, r3
80008b8: f00b fe94 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80008bc: bf00 nop
80008be: f107 030c add.w r3, r7, #12
80008c2: 210a movs r1, #10
80008c4: 4618 mov r0, r3
80008c6: f00b faaf bl 800be28 <CDC_Transmit_FS>
80008ca: 4603 mov r3, r0
80008cc: 2b01 cmp r3, #1
80008ce: d0f6 beq.n 80008be <manageCDC+0x4c2>
break;
80008d0: e264 b.n 8000d9c <manageCDC+0x9a0>
80008d2: e263 b.n 8000d9c <manageCDC+0x9a0>
case 'e':
if(rxidx>1){
80008d4: 4b4b ldr r3, [pc, #300] @ (8000a04 <manageCDC+0x608>)
80008d6: 781b ldrb r3, [r3, #0]
80008d8: 2b01 cmp r3, #1
80008da: f240 8235 bls.w 8000d48 <manageCDC+0x94c>
if(rxbuf[1]=='r'){
80008de: 4b45 ldr r3, [pc, #276] @ (80009f4 <manageCDC+0x5f8>)
80008e0: 785b ldrb r3, [r3, #1]
80008e2: 2b72 cmp r3, #114 @ 0x72
80008e4: f040 8098 bne.w 8000a18 <manageCDC+0x61c>
if(rxidx==4){
80008e8: 4b46 ldr r3, [pc, #280] @ (8000a04 <manageCDC+0x608>)
80008ea: 781b ldrb r3, [r3, #0]
80008ec: 2b04 cmp r3, #4
80008ee: d169 bne.n 80009c4 <manageCDC+0x5c8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
80008f0: 4b40 ldr r3, [pc, #256] @ (80009f4 <manageCDC+0x5f8>)
80008f2: 789a ldrb r2, [r3, #2]
80008f4: 4b3f ldr r3, [pc, #252] @ (80009f4 <manageCDC+0x5f8>)
80008f6: 78d9 ldrb r1, [r3, #3]
80008f8: f107 0308 add.w r3, r7, #8
80008fc: 9300 str r3, [sp, #0]
80008fe: 460b mov r3, r1
8000900: 2130 movs r1, #48 @ 0x30
8000902: 2030 movs r0, #48 @ 0x30
8000904: f7ff fcdf bl 80002c6 <toHex>
8000908: 4603 mov r3, r0
800090a: 2b00 cmp r3, #0
800090c: d042 beq.n 8000994 <manageCDC+0x598>
st=EEW_Read(eeadd, &val);
800090e: 893b ldrh r3, [r7, #8]
8000910: b2db uxtb r3, r3
8000912: f107 020a add.w r2, r7, #10
8000916: 4611 mov r1, r2
8000918: 4618 mov r0, r3
800091a: f7ff fcab bl 8000274 <EEW_Read>
800091e: 4603 mov r3, r0
8000920: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000924: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000928: 2b00 cmp r3, #0
800092a: d119 bne.n 8000960 <manageCDC+0x564>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
800092c: 893b ldrh r3, [r7, #8]
800092e: 461a mov r2, r3
8000930: 897b ldrh r3, [r7, #10]
8000932: f107 000c add.w r0, r7, #12
8000936: 4934 ldr r1, [pc, #208] @ (8000a08 <manageCDC+0x60c>)
8000938: f00b fe54 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800093c: bf00 nop
800093e: f107 030c add.w r3, r7, #12
8000942: 4618 mov r0, r3
8000944: f7ff fc02 bl 800014c <strlen>
8000948: 4603 mov r3, r0
800094a: b29a uxth r2, r3
800094c: f107 030c add.w r3, r7, #12
8000950: 4611 mov r1, r2
8000952: 4618 mov r0, r3
8000954: f00b fa68 bl 800be28 <CDC_Transmit_FS>
8000958: 4603 mov r3, r0
800095a: 2b01 cmp r3, #1
800095c: d0ef beq.n 800093e <manageCDC+0x542>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
800095e: e21c b.n 8000d9a <manageCDC+0x99e>
sprintf((char*)s,"\nee read error %d",st);
8000960: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000964: f107 030c add.w r3, r7, #12
8000968: 4928 ldr r1, [pc, #160] @ (8000a0c <manageCDC+0x610>)
800096a: 4618 mov r0, r3
800096c: f00b fe3a bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000970: bf00 nop
8000972: f107 030c add.w r3, r7, #12
8000976: 4618 mov r0, r3
8000978: f7ff fbe8 bl 800014c <strlen>
800097c: 4603 mov r3, r0
800097e: b29a uxth r2, r3
8000980: f107 030c add.w r3, r7, #12
8000984: 4611 mov r1, r2
8000986: 4618 mov r0, r3
8000988: f00b fa4e bl 800be28 <CDC_Transmit_FS>
800098c: 4603 mov r3, r0
800098e: 2b01 cmp r3, #1
8000990: d0ef beq.n 8000972 <manageCDC+0x576>
break;
8000992: e202 b.n 8000d9a <manageCDC+0x99e>
sprintf((char*)s,"\n?eraa hex values");
8000994: f107 030c add.w r3, r7, #12
8000998: 491d ldr r1, [pc, #116] @ (8000a10 <manageCDC+0x614>)
800099a: 4618 mov r0, r3
800099c: f00b fe22 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80009a0: bf00 nop
80009a2: f107 030c add.w r3, r7, #12
80009a6: 4618 mov r0, r3
80009a8: f7ff fbd0 bl 800014c <strlen>
80009ac: 4603 mov r3, r0
80009ae: b29a uxth r2, r3
80009b0: f107 030c add.w r3, r7, #12
80009b4: 4611 mov r1, r2
80009b6: 4618 mov r0, r3
80009b8: f00b fa36 bl 800be28 <CDC_Transmit_FS>
80009bc: 4603 mov r3, r0
80009be: 2b01 cmp r3, #1
80009c0: d0ef beq.n 80009a2 <manageCDC+0x5a6>
break;
80009c2: e1ea b.n 8000d9a <manageCDC+0x99e>
sprintf((char*)s,"\n?eraa");
80009c4: f107 030c add.w r3, r7, #12
80009c8: 4912 ldr r1, [pc, #72] @ (8000a14 <manageCDC+0x618>)
80009ca: 4618 mov r0, r3
80009cc: f00b fe0a bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80009d0: bf00 nop
80009d2: f107 030c add.w r3, r7, #12
80009d6: 4618 mov r0, r3
80009d8: f7ff fbb8 bl 800014c <strlen>
80009dc: 4603 mov r3, r0
80009de: b29a uxth r2, r3
80009e0: f107 030c add.w r3, r7, #12
80009e4: 4611 mov r1, r2
80009e6: 4618 mov r0, r3
80009e8: f00b fa1e bl 800be28 <CDC_Transmit_FS>
80009ec: 4603 mov r3, r0
80009ee: 2b01 cmp r3, #1
80009f0: d0ef beq.n 80009d2 <manageCDC+0x5d6>
break;
80009f2: e1d2 b.n 8000d9a <manageCDC+0x99e>
80009f4: 20000230 .word 0x20000230
80009f8: 0800d028 .word 0x0800d028
80009fc: 0800d048 .word 0x0800d048
8000a00: 0800d05c .word 0x0800d05c
8000a04: 2000022c .word 0x2000022c
8000a08: 0800d068 .word 0x0800d068
8000a0c: 0800d07c .word 0x0800d07c
8000a10: 0800d090 .word 0x0800d090
8000a14: 0800d0a4 .word 0x0800d0a4
}else if(rxbuf[1]=='w'){
8000a18: 4bbd ldr r3, [pc, #756] @ (8000d10 <manageCDC+0x914>)
8000a1a: 785b ldrb r3, [r3, #1]
8000a1c: 2b77 cmp r3, #119 @ 0x77
8000a1e: d169 bne.n 8000af4 <manageCDC+0x6f8>
if(rxidx==8){
8000a20: 4bbc ldr r3, [pc, #752] @ (8000d14 <manageCDC+0x918>)
8000a22: 781b ldrb r3, [r3, #0]
8000a24: 2b08 cmp r3, #8
8000a26: d14d bne.n 8000ac4 <manageCDC+0x6c8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000a28: 4bb9 ldr r3, [pc, #740] @ (8000d10 <manageCDC+0x914>)
8000a2a: 789a ldrb r2, [r3, #2]
8000a2c: 4bb8 ldr r3, [pc, #736] @ (8000d10 <manageCDC+0x914>)
8000a2e: 78d9 ldrb r1, [r3, #3]
8000a30: f107 0308 add.w r3, r7, #8
8000a34: 9300 str r3, [sp, #0]
8000a36: 460b mov r3, r1
8000a38: 2130 movs r1, #48 @ 0x30
8000a3a: 2030 movs r0, #48 @ 0x30
8000a3c: f7ff fc43 bl 80002c6 <toHex>
8000a40: 4603 mov r3, r0
8000a42: 2b00 cmp r3, #0
8000a44: d037 beq.n 8000ab6 <manageCDC+0x6ba>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000a46: 4bb2 ldr r3, [pc, #712] @ (8000d10 <manageCDC+0x914>)
8000a48: 7918 ldrb r0, [r3, #4]
8000a4a: 4bb1 ldr r3, [pc, #708] @ (8000d10 <manageCDC+0x914>)
8000a4c: 7959 ldrb r1, [r3, #5]
8000a4e: 4bb0 ldr r3, [pc, #704] @ (8000d10 <manageCDC+0x914>)
8000a50: 799a ldrb r2, [r3, #6]
8000a52: 4baf ldr r3, [pc, #700] @ (8000d10 <manageCDC+0x914>)
8000a54: 79dc ldrb r4, [r3, #7]
8000a56: f107 030a add.w r3, r7, #10
8000a5a: 9300 str r3, [sp, #0]
8000a5c: 4623 mov r3, r4
8000a5e: f7ff fc32 bl 80002c6 <toHex>
8000a62: 4603 mov r3, r0
8000a64: 2b00 cmp r3, #0
8000a66: d01f beq.n 8000aa8 <manageCDC+0x6ac>
st=EEW_Write(eeadd, val);
8000a68: 893b ldrh r3, [r7, #8]
8000a6a: b2db uxtb r3, r3
8000a6c: 897a ldrh r2, [r7, #10]
8000a6e: 4611 mov r1, r2
8000a70: 4618 mov r0, r3
8000a72: f7ff fc12 bl 800029a <EEW_Write>
8000a76: 4603 mov r3, r0
8000a78: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000a7c: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000a80: 2b00 cmp r3, #0
8000a82: d108 bne.n 8000a96 <manageCDC+0x69a>
8000a84: 893b ldrh r3, [r7, #8]
8000a86: 461a mov r2, r3
8000a88: 897b ldrh r3, [r7, #10]
8000a8a: f107 000c add.w r0, r7, #12
8000a8e: 49a2 ldr r1, [pc, #648] @ (8000d18 <manageCDC+0x91c>)
8000a90: f00b fda8 bl 800c5e4 <siprintf>
8000a94: e01c b.n 8000ad0 <manageCDC+0x6d4>
else sprintf((char*)s,"\nee write error %d", st);
8000a96: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000a9a: f107 030c add.w r3, r7, #12
8000a9e: 499f ldr r1, [pc, #636] @ (8000d1c <manageCDC+0x920>)
8000aa0: 4618 mov r0, r3
8000aa2: f00b fd9f bl 800c5e4 <siprintf>
8000aa6: e013 b.n 8000ad0 <manageCDC+0x6d4>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
8000aa8: f107 030c add.w r3, r7, #12
8000aac: 499c ldr r1, [pc, #624] @ (8000d20 <manageCDC+0x924>)
8000aae: 4618 mov r0, r3
8000ab0: f00b fd98 bl 800c5e4 <siprintf>
8000ab4: e00c b.n 8000ad0 <manageCDC+0x6d4>
}else sprintf((char*)s,"\n?ewaa hex values");
8000ab6: f107 030c add.w r3, r7, #12
8000aba: 499a ldr r1, [pc, #616] @ (8000d24 <manageCDC+0x928>)
8000abc: 4618 mov r0, r3
8000abe: f00b fd91 bl 800c5e4 <siprintf>
8000ac2: e005 b.n 8000ad0 <manageCDC+0x6d4>
}else sprintf((char*)s,"\n?ewaavvvv");
8000ac4: f107 030c add.w r3, r7, #12
8000ac8: 4997 ldr r1, [pc, #604] @ (8000d28 <manageCDC+0x92c>)
8000aca: 4618 mov r0, r3
8000acc: f00b fd8a bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ad0: bf00 nop
8000ad2: f107 030c add.w r3, r7, #12
8000ad6: 4618 mov r0, r3
8000ad8: f7ff fb38 bl 800014c <strlen>
8000adc: 4603 mov r3, r0
8000ade: b29a uxth r2, r3
8000ae0: f107 030c add.w r3, r7, #12
8000ae4: 4611 mov r1, r2
8000ae6: 4618 mov r0, r3
8000ae8: f00b f99e bl 800be28 <CDC_Transmit_FS>
8000aec: 4603 mov r3, r0
8000aee: 2b01 cmp r3, #1
8000af0: d0ef beq.n 8000ad2 <manageCDC+0x6d6>
break;
8000af2: e152 b.n 8000d9a <manageCDC+0x99e>
}else if(rxbuf[1]=='d'){
8000af4: 4b86 ldr r3, [pc, #536] @ (8000d10 <manageCDC+0x914>)
8000af6: 785b ldrb r3, [r3, #1]
8000af8: 2b64 cmp r3, #100 @ 0x64
8000afa: f040 808b bne.w 8000c14 <manageCDC+0x818>
if(rxidx==2){
8000afe: 4b85 ldr r3, [pc, #532] @ (8000d14 <manageCDC+0x918>)
8000b00: 781b ldrb r3, [r3, #0]
8000b02: 2b02 cmp r3, #2
8000b04: d16e bne.n 8000be4 <manageCDC+0x7e8>
for(i=0;i<32;i++){
8000b06: 2300 movs r3, #0
8000b08: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000b0c: e046 b.n 8000b9c <manageCDC+0x7a0>
st=EEW_Read(i, &val);
8000b0e: f107 020a add.w r2, r7, #10
8000b12: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000b16: 4611 mov r1, r2
8000b18: 4618 mov r0, r3
8000b1a: f7ff fbab bl 8000274 <EEW_Read>
8000b1e: 4603 mov r3, r0
8000b20: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000b24: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000b28: 2b00 cmp r3, #0
8000b2a: d119 bne.n 8000b60 <manageCDC+0x764>
sprintf((char*)s,"\n0x%02x=%5d ",i,val);
8000b2c: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000b30: 897b ldrh r3, [r7, #10]
8000b32: f107 000c add.w r0, r7, #12
8000b36: 497d ldr r1, [pc, #500] @ (8000d2c <manageCDC+0x930>)
8000b38: f00b fd54 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000b3c: bf00 nop
8000b3e: f107 030c add.w r3, r7, #12
8000b42: 4618 mov r0, r3
8000b44: f7ff fb02 bl 800014c <strlen>
8000b48: 4603 mov r3, r0
8000b4a: b29a uxth r2, r3
8000b4c: f107 030c add.w r3, r7, #12
8000b50: 4611 mov r1, r2
8000b52: 4618 mov r0, r3
8000b54: f00b f968 bl 800be28 <CDC_Transmit_FS>
8000b58: 4603 mov r3, r0
8000b5a: 2b01 cmp r3, #1
8000b5c: d0ef beq.n 8000b3e <manageCDC+0x742>
8000b5e: e018 b.n 8000b92 <manageCDC+0x796>
sprintf((char*)s,"rderr %d ",st);
8000b60: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000b64: f107 030c add.w r3, r7, #12
8000b68: 4971 ldr r1, [pc, #452] @ (8000d30 <manageCDC+0x934>)
8000b6a: 4618 mov r0, r3
8000b6c: f00b fd3a bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000b70: bf00 nop
8000b72: f107 030c add.w r3, r7, #12
8000b76: 4618 mov r0, r3
8000b78: f7ff fae8 bl 800014c <strlen>
8000b7c: 4603 mov r3, r0
8000b7e: b29a uxth r2, r3
8000b80: f107 030c add.w r3, r7, #12
8000b84: 4611 mov r1, r2
8000b86: 4618 mov r0, r3
8000b88: f00b f94e bl 800be28 <CDC_Transmit_FS>
8000b8c: 4603 mov r3, r0
8000b8e: 2b01 cmp r3, #1
8000b90: d0ef beq.n 8000b72 <manageCDC+0x776>
for(i=0;i<32;i++){
8000b92: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000b96: 3301 adds r3, #1
8000b98: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000b9c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000ba0: 2b1f cmp r3, #31
8000ba2: d9b4 bls.n 8000b0e <manageCDC+0x712>
if((i%4)==0){
8000ba4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000ba8: f003 0303 and.w r3, r3, #3
8000bac: b2db uxtb r3, r3
8000bae: 2b00 cmp r3, #0
8000bb0: f040 80f3 bne.w 8000d9a <manageCDC+0x99e>
sprintf((char*)s,"\n");
8000bb4: f107 030c add.w r3, r7, #12
8000bb8: 495e ldr r1, [pc, #376] @ (8000d34 <manageCDC+0x938>)
8000bba: 4618 mov r0, r3
8000bbc: f00b fd12 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bc0: bf00 nop
8000bc2: f107 030c add.w r3, r7, #12
8000bc6: 4618 mov r0, r3
8000bc8: f7ff fac0 bl 800014c <strlen>
8000bcc: 4603 mov r3, r0
8000bce: b29a uxth r2, r3
8000bd0: f107 030c add.w r3, r7, #12
8000bd4: 4611 mov r1, r2
8000bd6: 4618 mov r0, r3
8000bd8: f00b f926 bl 800be28 <CDC_Transmit_FS>
8000bdc: 4603 mov r3, r0
8000bde: 2b01 cmp r3, #1
8000be0: d0ef beq.n 8000bc2 <manageCDC+0x7c6>
break;
8000be2: e0da b.n 8000d9a <manageCDC+0x99e>
sprintf((char*)s,"\n?ed");
8000be4: f107 030c add.w r3, r7, #12
8000be8: 4953 ldr r1, [pc, #332] @ (8000d38 <manageCDC+0x93c>)
8000bea: 4618 mov r0, r3
8000bec: f00b fcfa bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bf0: bf00 nop
8000bf2: f107 030c add.w r3, r7, #12
8000bf6: 4618 mov r0, r3
8000bf8: f7ff faa8 bl 800014c <strlen>
8000bfc: 4603 mov r3, r0
8000bfe: b29a uxth r2, r3
8000c00: f107 030c add.w r3, r7, #12
8000c04: 4611 mov r1, r2
8000c06: 4618 mov r0, r3
8000c08: f00b f90e bl 800be28 <CDC_Transmit_FS>
8000c0c: 4603 mov r3, r0
8000c0e: 2b01 cmp r3, #1
8000c10: d0ef beq.n 8000bf2 <manageCDC+0x7f6>
break;
8000c12: e0c2 b.n 8000d9a <manageCDC+0x99e>
}else if(rxbuf[1]=='x'){
8000c14: 4b3e ldr r3, [pc, #248] @ (8000d10 <manageCDC+0x914>)
8000c16: 785b ldrb r3, [r3, #1]
8000c18: 2b78 cmp r3, #120 @ 0x78
8000c1a: d160 bne.n 8000cde <manageCDC+0x8e2>
if(rxidx==2){
8000c1c: 4b3d ldr r3, [pc, #244] @ (8000d14 <manageCDC+0x918>)
8000c1e: 781b ldrb r3, [r3, #0]
8000c20: 2b02 cmp r3, #2
8000c22: d144 bne.n 8000cae <manageCDC+0x8b2>
for(i=0;i<32;i++){
8000c24: 2300 movs r3, #0
8000c26: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000c2a: e03b b.n 8000ca4 <manageCDC+0x8a8>
st=EEW_Write(i,deftab[i]);
8000c2c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c30: 4a42 ldr r2, [pc, #264] @ (8000d3c <manageCDC+0x940>)
8000c32: 5cd3 ldrb r3, [r2, r3]
8000c34: 461a mov r2, r3
8000c36: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c3a: 4611 mov r1, r2
8000c3c: 4618 mov r0, r3
8000c3e: f7ff fb2c bl 800029a <EEW_Write>
8000c42: 4603 mov r3, r0
8000c44: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",i,deftab[i]);
8000c48: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000c4c: 2b00 cmp r3, #0
8000c4e: d10b bne.n 8000c68 <manageCDC+0x86c>
8000c50: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000c54: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c58: 4938 ldr r1, [pc, #224] @ (8000d3c <manageCDC+0x940>)
8000c5a: 5ccb ldrb r3, [r1, r3]
8000c5c: f107 000c add.w r0, r7, #12
8000c60: 492d ldr r1, [pc, #180] @ (8000d18 <manageCDC+0x91c>)
8000c62: f00b fcbf bl 800c5e4 <siprintf>
8000c66: e007 b.n 8000c78 <manageCDC+0x87c>
else sprintf((char*)s,"\nee write error %d", st);
8000c68: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000c6c: f107 030c add.w r3, r7, #12
8000c70: 492a ldr r1, [pc, #168] @ (8000d1c <manageCDC+0x920>)
8000c72: 4618 mov r0, r3
8000c74: f00b fcb6 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c78: bf00 nop
8000c7a: f107 030c add.w r3, r7, #12
8000c7e: 4618 mov r0, r3
8000c80: f7ff fa64 bl 800014c <strlen>
8000c84: 4603 mov r3, r0
8000c86: b29a uxth r2, r3
8000c88: f107 030c add.w r3, r7, #12
8000c8c: 4611 mov r1, r2
8000c8e: 4618 mov r0, r3
8000c90: f00b f8ca bl 800be28 <CDC_Transmit_FS>
8000c94: 4603 mov r3, r0
8000c96: 2b01 cmp r3, #1
8000c98: d0ef beq.n 8000c7a <manageCDC+0x87e>
for(i=0;i<32;i++){
8000c9a: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c9e: 3301 adds r3, #1
8000ca0: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000ca4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000ca8: 2b1f cmp r3, #31
8000caa: d9bf bls.n 8000c2c <manageCDC+0x830>
break;
8000cac: e075 b.n 8000d9a <manageCDC+0x99e>
sprintf((char*)s,"\n?ex");
8000cae: f107 030c add.w r3, r7, #12
8000cb2: 4923 ldr r1, [pc, #140] @ (8000d40 <manageCDC+0x944>)
8000cb4: 4618 mov r0, r3
8000cb6: f00b fc95 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000cba: bf00 nop
8000cbc: f107 030c add.w r3, r7, #12
8000cc0: 4618 mov r0, r3
8000cc2: f7ff fa43 bl 800014c <strlen>
8000cc6: 4603 mov r3, r0
8000cc8: b29a uxth r2, r3
8000cca: f107 030c add.w r3, r7, #12
8000cce: 4611 mov r1, r2
8000cd0: 4618 mov r0, r3
8000cd2: f00b f8a9 bl 800be28 <CDC_Transmit_FS>
8000cd6: 4603 mov r3, r0
8000cd8: 2b01 cmp r3, #1
8000cda: d0ef beq.n 8000cbc <manageCDC+0x8c0>
break;
8000cdc: e05d b.n 8000d9a <manageCDC+0x99e>
sprintf((char*)s,"\n?er|w|d|x");
8000cde: f107 030c add.w r3, r7, #12
8000ce2: 4918 ldr r1, [pc, #96] @ (8000d44 <manageCDC+0x948>)
8000ce4: 4618 mov r0, r3
8000ce6: f00b fc7d bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000cea: bf00 nop
8000cec: f107 030c add.w r3, r7, #12
8000cf0: 4618 mov r0, r3
8000cf2: f7ff fa2b bl 800014c <strlen>
8000cf6: 4603 mov r3, r0
8000cf8: b29a uxth r2, r3
8000cfa: f107 030c add.w r3, r7, #12
8000cfe: 4611 mov r1, r2
8000d00: 4618 mov r0, r3
8000d02: f00b f891 bl 800be28 <CDC_Transmit_FS>
8000d06: 4603 mov r3, r0
8000d08: 2b01 cmp r3, #1
8000d0a: d0ef beq.n 8000cec <manageCDC+0x8f0>
break;
8000d0c: e045 b.n 8000d9a <manageCDC+0x99e>
8000d0e: bf00 nop
8000d10: 20000230 .word 0x20000230
8000d14: 2000022c .word 0x2000022c
8000d18: 0800d0ac .word 0x0800d0ac
8000d1c: 0800d0c0 .word 0x0800d0c0
8000d20: 0800d0d4 .word 0x0800d0d4
8000d24: 0800d0ec .word 0x0800d0ec
8000d28: 0800d100 .word 0x0800d100
8000d2c: 0800d10c .word 0x0800d10c
8000d30: 0800d11c .word 0x0800d11c
8000d34: 0800d128 .word 0x0800d128
8000d38: 0800d12c .word 0x0800d12c
8000d3c: 0800d1a8 .word 0x0800d1a8
8000d40: 0800d134 .word 0x0800d134
8000d44: 0800d13c .word 0x0800d13c
sprintf((char*)s,"\n?eraa | ewaavvvv");
8000d48: f107 030c add.w r3, r7, #12
8000d4c: 491b ldr r1, [pc, #108] @ (8000dbc <manageCDC+0x9c0>)
8000d4e: 4618 mov r0, r3
8000d50: f00b fc48 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d54: bf00 nop
8000d56: f107 030c add.w r3, r7, #12
8000d5a: 4618 mov r0, r3
8000d5c: f7ff f9f6 bl 800014c <strlen>
8000d60: 4603 mov r3, r0
8000d62: b29a uxth r2, r3
8000d64: f107 030c add.w r3, r7, #12
8000d68: 4611 mov r1, r2
8000d6a: 4618 mov r0, r3
8000d6c: f00b f85c bl 800be28 <CDC_Transmit_FS>
8000d70: 4603 mov r3, r0
8000d72: 2b01 cmp r3, #1
8000d74: d0ef beq.n 8000d56 <manageCDC+0x95a>
break;
8000d76: e010 b.n 8000d9a <manageCDC+0x99e>
default:
sprintf((char*)s,"\n?");
8000d78: f107 030c add.w r3, r7, #12
8000d7c: 4910 ldr r1, [pc, #64] @ (8000dc0 <manageCDC+0x9c4>)
8000d7e: 4618 mov r0, r3
8000d80: f00b fc30 bl 800c5e4 <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8000d84: bf00 nop
8000d86: f107 030c add.w r3, r7, #12
8000d8a: 2102 movs r1, #2
8000d8c: 4618 mov r0, r3
8000d8e: f00b f84b bl 800be28 <CDC_Transmit_FS>
8000d92: 4603 mov r3, r0
8000d94: 2b01 cmp r3, #1
8000d96: d0f6 beq.n 8000d86 <manageCDC+0x98a>
break;
8000d98: e000 b.n 8000d9c <manageCDC+0x9a0>
break;
8000d9a: bf00 nop
}
}
rxidx=0;
8000d9c: 4b09 ldr r3, [pc, #36] @ (8000dc4 <manageCDC+0x9c8>)
8000d9e: 2200 movs r2, #0
8000da0: 701a strb r2, [r3, #0]
8000da2: e007 b.n 8000db4 <manageCDC+0x9b8>
}else rxidx++;
8000da4: 4b07 ldr r3, [pc, #28] @ (8000dc4 <manageCDC+0x9c8>)
8000da6: 781b ldrb r3, [r3, #0]
8000da8: 3301 adds r3, #1
8000daa: b2da uxtb r2, r3
8000dac: 4b05 ldr r3, [pc, #20] @ (8000dc4 <manageCDC+0x9c8>)
8000dae: 701a strb r2, [r3, #0]
8000db0: e000 b.n 8000db4 <manageCDC+0x9b8>
if (rx < 0) return;
8000db2: bf00 nop
// tiny spin or yield
}
}
8000db4: 3784 adds r7, #132 @ 0x84
8000db6: 46bd mov sp, r7
8000db8: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
8000dbc: 0800d148 .word 0x0800d148
8000dc0: 0800d15c .word 0x0800d15c
8000dc4: 2000022c .word 0x2000022c
08000dc8 <EEW_Read>:
{
8000dc8: b580 push {r7, lr}
8000dca: b082 sub sp, #8
8000dcc: af00 add r7, sp, #0
8000dce: 4603 mov r3, r0
8000dd0: 6039 str r1, [r7, #0]
8000dd2: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000dd4: 79fb ldrb r3, [r7, #7]
8000dd6: b29b uxth r3, r3
8000dd8: 3301 adds r3, #1
8000dda: b29b uxth r3, r3
8000ddc: 6839 ldr r1, [r7, #0]
8000dde: 4618 mov r0, r3
8000de0: f000 f9b8 bl 8001154 <EE_ReadVariable>
8000de4: 4603 mov r3, r0
}
8000de6: 4618 mov r0, r3
8000de8: 3708 adds r7, #8
8000dea: 46bd mov sp, r7
8000dec: bd80 pop {r7, pc}
08000dee <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
8000dee: b480 push {r7}
8000df0: b083 sub sp, #12
8000df2: af00 add r7, sp, #0
8000df4: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
8000df6: 687b ldr r3, [r7, #4]
8000df8: 881b ldrh r3, [r3, #0]
8000dfa: b29b uxth r3, r3
}
8000dfc: 4618 mov r0, r3
8000dfe: 370c adds r7, #12
8000e00: 46bd mov sp, r7
8000e02: bc80 pop {r7}
8000e04: 4770 bx lr
08000e06 <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
8000e06: b5b0 push {r4, r5, r7, lr}
8000e08: b084 sub sp, #16
8000e0a: af00 add r7, sp, #0
8000e0c: 6078 str r0, [r7, #4]
8000e0e: 460b mov r3, r1
8000e10: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8000e12: f003 fafb bl 800440c <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
8000e16: 887b ldrh r3, [r7, #2]
8000e18: 2200 movs r2, #0
8000e1a: 461c mov r4, r3
8000e1c: 4615 mov r5, r2
8000e1e: 4622 mov r2, r4
8000e20: 462b mov r3, r5
8000e22: 6879 ldr r1, [r7, #4]
8000e24: 2001 movs r0, #1
8000e26: f003 fa81 bl 800432c <HAL_FLASH_Program>
8000e2a: 4603 mov r3, r0
8000e2c: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
8000e2e: f003 fb13 bl 8004458 <HAL_FLASH_Lock>
return status;
8000e32: 7bfb ldrb r3, [r7, #15]
}
8000e34: 4618 mov r0, r3
8000e36: 3710 adds r7, #16
8000e38: 46bd mov sp, r7
8000e3a: bdb0 pop {r4, r5, r7, pc}
08000e3c <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
8000e3c: b580 push {r7, lr}
8000e3e: b088 sub sp, #32
8000e40: af00 add r7, sp, #0
8000e42: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8000e44: 2300 movs r3, #0
8000e46: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
8000e48: f003 fae0 bl 800440c <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
8000e4c: 2300 movs r3, #0
8000e4e: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8000e50: 687b ldr r3, [r7, #4]
8000e52: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8000e54: 2301 movs r3, #1
8000e56: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
8000e58: f107 0208 add.w r2, r7, #8
8000e5c: f107 030c add.w r3, r7, #12
8000e60: 4611 mov r1, r2
8000e62: 4618 mov r0, r3
8000e64: f003 fbba bl 80045dc <HAL_FLASHEx_Erase>
8000e68: 4603 mov r3, r0
8000e6a: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
8000e6c: f003 faf4 bl 8004458 <HAL_FLASH_Lock>
return status;
8000e70: 7ffb ldrb r3, [r7, #31]
}
8000e72: 4618 mov r0, r3
8000e74: 3720 adds r7, #32
8000e76: 46bd mov sp, r7
8000e78: bd80 pop {r7, pc}
08000e7a <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
8000e7a: b480 push {r7}
8000e7c: b087 sub sp, #28
8000e7e: af00 add r7, sp, #0
8000e80: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8000e82: 687b ldr r3, [r7, #4]
8000e84: 3302 adds r3, #2
8000e86: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8000e88: 687b ldr r3, [r7, #4]
8000e8a: f503 6380 add.w r3, r3, #1024 @ 0x400
8000e8e: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8000e90: e00c b.n 8000eac <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8000e92: 697b ldr r3, [r7, #20]
8000e94: 881b ldrh r3, [r3, #0]
8000e96: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
8000e98: 89fb ldrh r3, [r7, #14]
8000e9a: f64f 72ff movw r2, #65535 @ 0xffff
8000e9e: 4293 cmp r3, r2
8000ea0: d101 bne.n 8000ea6 <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
8000ea2: 697b ldr r3, [r7, #20]
8000ea4: e008 b.n 8000eb8 <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
8000ea6: 697b ldr r3, [r7, #20]
8000ea8: 3304 adds r3, #4
8000eaa: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8000eac: 693b ldr r3, [r7, #16]
8000eae: 3b03 subs r3, #3
8000eb0: 697a ldr r2, [r7, #20]
8000eb2: 429a cmp r2, r3
8000eb4: d3ed bcc.n 8000e92 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
8000eb6: 2300 movs r3, #0
}
8000eb8: 4618 mov r0, r3
8000eba: 371c adds r7, #28
8000ebc: 46bd mov sp, r7
8000ebe: bc80 pop {r7}
8000ec0: 4770 bx lr
08000ec2 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
8000ec2: b480 push {r7}
8000ec4: b089 sub sp, #36 @ 0x24
8000ec6: af00 add r7, sp, #0
8000ec8: 60f8 str r0, [r7, #12]
8000eca: 460b mov r3, r1
8000ecc: 607a str r2, [r7, #4]
8000ece: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
8000ed0: 68fb ldr r3, [r7, #12]
8000ed2: 3302 adds r3, #2
8000ed4: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8000ed6: 68fb ldr r3, [r7, #12]
8000ed8: f503 6380 add.w r3, r3, #1024 @ 0x400
8000edc: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
8000ede: 2302 movs r3, #2
8000ee0: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
8000ee2: 2300 movs r3, #0
8000ee4: 833b strh r3, [r7, #24]
if (Data == NULL)
8000ee6: 687b ldr r3, [r7, #4]
8000ee8: 2b00 cmp r3, #0
8000eea: d118 bne.n 8000f1e <EE_FindInPage+0x5c>
return EE_ERROR;
8000eec: 2301 movs r3, #1
8000eee: e024 b.n 8000f3a <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8000ef0: 69fb ldr r3, [r7, #28]
8000ef2: 881b ldrh r3, [r3, #0]
8000ef4: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
8000ef6: 8a7b ldrh r3, [r7, #18]
8000ef8: f64f 72ff movw r2, #65535 @ 0xffff
8000efc: 4293 cmp r3, r2
8000efe: d014 beq.n 8000f2a <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
8000f00: 69fb ldr r3, [r7, #28]
8000f02: 3302 adds r3, #2
8000f04: 881b ldrh r3, [r3, #0]
8000f06: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
8000f08: 8a7a ldrh r2, [r7, #18]
8000f0a: 897b ldrh r3, [r7, #10]
8000f0c: 429a cmp r2, r3
8000f0e: d103 bne.n 8000f18 <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
8000f10: 8a3b ldrh r3, [r7, #16]
8000f12: 833b strh r3, [r7, #24]
result = EE_OK;
8000f14: 2300 movs r3, #0
8000f16: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
8000f18: 69fb ldr r3, [r7, #28]
8000f1a: 3304 adds r3, #4
8000f1c: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
8000f1e: 697b ldr r3, [r7, #20]
8000f20: 3b04 subs r3, #4
8000f22: 69fa ldr r2, [r7, #28]
8000f24: 429a cmp r2, r3
8000f26: d9e3 bls.n 8000ef0 <EE_FindInPage+0x2e>
8000f28: e000 b.n 8000f2c <EE_FindInPage+0x6a>
break;
8000f2a: bf00 nop
}
if (result == EE_OK)
8000f2c: 7efb ldrb r3, [r7, #27]
8000f2e: 2b00 cmp r3, #0
8000f30: d102 bne.n 8000f38 <EE_FindInPage+0x76>
*Data = lastVal;
8000f32: 687b ldr r3, [r7, #4]
8000f34: 8b3a ldrh r2, [r7, #24]
8000f36: 801a strh r2, [r3, #0]
return result;
8000f38: 7efb ldrb r3, [r7, #27]
}
8000f3a: 4618 mov r0, r3
8000f3c: 3724 adds r7, #36 @ 0x24
8000f3e: 46bd mov sp, r7
8000f40: bc80 pop {r7}
8000f42: 4770 bx lr
08000f44 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8000f44: b580 push {r7, lr}
8000f46: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
8000f48: 480f ldr r0, [pc, #60] @ (8000f88 <EE_Format+0x44>)
8000f4a: f7ff ff77 bl 8000e3c <EE_FlashErasePage>
8000f4e: 4603 mov r3, r0
8000f50: 2b00 cmp r3, #0
8000f52: d001 beq.n 8000f58 <EE_Format+0x14>
return EE_STATUS_ERROR;
8000f54: 2301 movs r3, #1
8000f56: e015 b.n 8000f84 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
8000f58: 480c ldr r0, [pc, #48] @ (8000f8c <EE_Format+0x48>)
8000f5a: f7ff ff6f bl 8000e3c <EE_FlashErasePage>
8000f5e: 4603 mov r3, r0
8000f60: 2b00 cmp r3, #0
8000f62: d001 beq.n 8000f68 <EE_Format+0x24>
return EE_STATUS_ERROR;
8000f64: 2301 movs r3, #1
8000f66: e00d b.n 8000f84 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
8000f68: f64a 21aa movw r1, #43690 @ 0xaaaa
8000f6c: 4806 ldr r0, [pc, #24] @ (8000f88 <EE_Format+0x44>)
8000f6e: f7ff ff4a bl 8000e06 <EE_FlashProgramHalfWord>
8000f72: 4603 mov r3, r0
8000f74: 2b00 cmp r3, #0
8000f76: d001 beq.n 8000f7c <EE_Format+0x38>
return EE_STATUS_ERROR;
8000f78: 2301 movs r3, #1
8000f7a: e003 b.n 8000f84 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
8000f7c: 4b04 ldr r3, [pc, #16] @ (8000f90 <EE_Format+0x4c>)
8000f7e: 4a02 ldr r2, [pc, #8] @ (8000f88 <EE_Format+0x44>)
8000f80: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8000f82: 2300 movs r3, #0
}
8000f84: 4618 mov r0, r3
8000f86: bd80 pop {r7, pc}
8000f88: 0800f800 .word 0x0800f800
8000f8c: 0800fc00 .word 0x0800fc00
8000f90: 20000000 .word 0x20000000
08000f94 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8000f94: b480 push {r7}
8000f96: b083 sub sp, #12
8000f98: af00 add r7, sp, #0
8000f9a: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
8000f9c: 687b ldr r3, [r7, #4]
8000f9e: 4a05 ldr r2, [pc, #20] @ (8000fb4 <EE_GetOtherPageBase+0x20>)
8000fa0: 4293 cmp r3, r2
8000fa2: d101 bne.n 8000fa8 <EE_GetOtherPageBase+0x14>
8000fa4: 4b04 ldr r3, [pc, #16] @ (8000fb8 <EE_GetOtherPageBase+0x24>)
8000fa6: e000 b.n 8000faa <EE_GetOtherPageBase+0x16>
8000fa8: 4b02 ldr r3, [pc, #8] @ (8000fb4 <EE_GetOtherPageBase+0x20>)
}
8000faa: 4618 mov r0, r3
8000fac: 370c adds r7, #12
8000fae: 46bd mov sp, r7
8000fb0: bc80 pop {r7}
8000fb2: 4770 bx lr
8000fb4: 0800f800 .word 0x0800f800
8000fb8: 0800fc00 .word 0x0800fc00
08000fbc <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
8000fbc: b580 push {r7, lr}
8000fbe: b088 sub sp, #32
8000fc0: af00 add r7, sp, #0
8000fc2: 4603 mov r3, r0
8000fc4: 460a mov r2, r1
8000fc6: 80fb strh r3, [r7, #6]
8000fc8: 4613 mov r3, r2
8000fca: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
8000fcc: 4b3c ldr r3, [pc, #240] @ (80010c0 <EE_PageTransfer+0x104>)
8000fce: 681b ldr r3, [r3, #0]
8000fd0: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
8000fd2: 6978 ldr r0, [r7, #20]
8000fd4: f7ff ffde bl 8000f94 <EE_GetOtherPageBase>
8000fd8: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
8000fda: 6938 ldr r0, [r7, #16]
8000fdc: f7ff ff2e bl 8000e3c <EE_FlashErasePage>
8000fe0: 4603 mov r3, r0
8000fe2: 2b00 cmp r3, #0
8000fe4: d001 beq.n 8000fea <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
8000fe6: 2301 movs r3, #1
8000fe8: e065 b.n 80010b6 <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
8000fea: f245 5155 movw r1, #21845 @ 0x5555
8000fee: 6938 ldr r0, [r7, #16]
8000ff0: f7ff ff09 bl 8000e06 <EE_FlashProgramHalfWord>
8000ff4: 4603 mov r3, r0
8000ff6: 2b00 cmp r3, #0
8000ff8: d001 beq.n 8000ffe <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
8000ffa: 2301 movs r3, #1
8000ffc: e05b b.n 80010b6 <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
8000ffe: 693b ldr r3, [r7, #16]
8001000: 3302 adds r3, #2
8001002: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8001004: 2300 movs r3, #0
8001006: 837b strh r3, [r7, #26]
8001008: e03c b.n 8001084 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
800100a: 8b7b ldrh r3, [r7, #26]
800100c: 4a2d ldr r2, [pc, #180] @ (80010c4 <EE_PageTransfer+0x108>)
800100e: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001012: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8001014: 89fa ldrh r2, [r7, #14]
8001016: 88fb ldrh r3, [r7, #6]
8001018: 429a cmp r2, r3
800101a: d102 bne.n 8001022 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
800101c: 88bb ldrh r3, [r7, #4]
800101e: 817b strh r3, [r7, #10]
8001020: e00b b.n 800103a <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8001022: f107 020a add.w r2, r7, #10
8001026: 89fb ldrh r3, [r7, #14]
8001028: 4619 mov r1, r3
800102a: 6978 ldr r0, [r7, #20]
800102c: f7ff ff49 bl 8000ec2 <EE_FindInPage>
8001030: 4603 mov r3, r0
8001032: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8001034: 7b7b ldrb r3, [r7, #13]
8001036: 2b00 cmp r3, #0
8001038: d120 bne.n 800107c <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
800103a: 89fb ldrh r3, [r7, #14]
800103c: 4619 mov r1, r3
800103e: 69f8 ldr r0, [r7, #28]
8001040: f7ff fee1 bl 8000e06 <EE_FlashProgramHalfWord>
8001044: 4603 mov r3, r0
8001046: 2b00 cmp r3, #0
8001048: d001 beq.n 800104e <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
800104a: 2301 movs r3, #1
800104c: e033 b.n 80010b6 <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
800104e: 69fb ldr r3, [r7, #28]
8001050: 3302 adds r3, #2
8001052: 897a ldrh r2, [r7, #10]
8001054: 4611 mov r1, r2
8001056: 4618 mov r0, r3
8001058: f7ff fed5 bl 8000e06 <EE_FlashProgramHalfWord>
800105c: 4603 mov r3, r0
800105e: 2b00 cmp r3, #0
8001060: d001 beq.n 8001066 <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8001062: 2301 movs r3, #1
8001064: e027 b.n 80010b6 <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
8001066: 69fb ldr r3, [r7, #28]
8001068: 3304 adds r3, #4
800106a: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
800106c: 693b ldr r3, [r7, #16]
800106e: f503 6380 add.w r3, r3, #1024 @ 0x400
8001072: 69fa ldr r2, [r7, #28]
8001074: 429a cmp r2, r3
8001076: d302 bcc.n 800107e <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
8001078: 2303 movs r3, #3
800107a: e01c b.n 80010b6 <EE_PageTransfer+0xfa>
continue;
800107c: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
800107e: 8b7b ldrh r3, [r7, #26]
8001080: 3301 adds r3, #1
8001082: 837b strh r3, [r7, #26]
8001084: 8b7b ldrh r3, [r7, #26]
8001086: 2b1f cmp r3, #31
8001088: d9bf bls.n 800100a <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
800108a: 6978 ldr r0, [r7, #20]
800108c: f7ff fed6 bl 8000e3c <EE_FlashErasePage>
8001090: 4603 mov r3, r0
8001092: 2b00 cmp r3, #0
8001094: d001 beq.n 800109a <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
8001096: 2301 movs r3, #1
8001098: e00d b.n 80010b6 <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
800109a: f64a 21aa movw r1, #43690 @ 0xaaaa
800109e: 6938 ldr r0, [r7, #16]
80010a0: f7ff feb1 bl 8000e06 <EE_FlashProgramHalfWord>
80010a4: 4603 mov r3, r0
80010a6: 2b00 cmp r3, #0
80010a8: d001 beq.n 80010ae <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
80010aa: 2301 movs r3, #1
80010ac: e003 b.n 80010b6 <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
80010ae: 4a04 ldr r2, [pc, #16] @ (80010c0 <EE_PageTransfer+0x104>)
80010b0: 693b ldr r3, [r7, #16]
80010b2: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
80010b4: 2300 movs r3, #0
}
80010b6: 4618 mov r0, r3
80010b8: 3720 adds r7, #32
80010ba: 46bd mov sp, r7
80010bc: bd80 pop {r7, pc}
80010be: bf00 nop
80010c0: 20000000 .word 0x20000000
80010c4: 0800d1c8 .word 0x0800d1c8
080010c8 <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
80010c8: b580 push {r7, lr}
80010ca: b082 sub sp, #8
80010cc: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
80010ce: 481e ldr r0, [pc, #120] @ (8001148 <EE_Init+0x80>)
80010d0: f7ff fe8d bl 8000dee <EE_GetPageStatus>
80010d4: 4603 mov r3, r0
80010d6: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
80010d8: 481c ldr r0, [pc, #112] @ (800114c <EE_Init+0x84>)
80010da: f7ff fe88 bl 8000dee <EE_GetPageStatus>
80010de: 4603 mov r3, r0
80010e0: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
80010e2: 88fb ldrh r3, [r7, #6]
80010e4: f64f 72ff movw r2, #65535 @ 0xffff
80010e8: 4293 cmp r3, r2
80010ea: d108 bne.n 80010fe <EE_Init+0x36>
80010ec: 88bb ldrh r3, [r7, #4]
80010ee: f64f 72ff movw r2, #65535 @ 0xffff
80010f2: 4293 cmp r3, r2
80010f4: d103 bne.n 80010fe <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
80010f6: f7ff ff25 bl 8000f44 <EE_Format>
80010fa: 4603 mov r3, r0
80010fc: e020 b.n 8001140 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
80010fe: 88fb ldrh r3, [r7, #6]
8001100: f64a 22aa movw r2, #43690 @ 0xaaaa
8001104: 4293 cmp r3, r2
8001106: d109 bne.n 800111c <EE_Init+0x54>
8001108: 88bb ldrh r3, [r7, #4]
800110a: f64f 72ff movw r2, #65535 @ 0xffff
800110e: 4293 cmp r3, r2
8001110: d104 bne.n 800111c <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8001112: 4b0f ldr r3, [pc, #60] @ (8001150 <EE_Init+0x88>)
8001114: 4a0c ldr r2, [pc, #48] @ (8001148 <EE_Init+0x80>)
8001116: 601a str r2, [r3, #0]
return EE_OK;
8001118: 2300 movs r3, #0
800111a: e011 b.n 8001140 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
800111c: 88bb ldrh r3, [r7, #4]
800111e: f64a 22aa movw r2, #43690 @ 0xaaaa
8001122: 4293 cmp r3, r2
8001124: d109 bne.n 800113a <EE_Init+0x72>
8001126: 88fb ldrh r3, [r7, #6]
8001128: f64f 72ff movw r2, #65535 @ 0xffff
800112c: 4293 cmp r3, r2
800112e: d104 bne.n 800113a <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8001130: 4b07 ldr r3, [pc, #28] @ (8001150 <EE_Init+0x88>)
8001132: 4a06 ldr r2, [pc, #24] @ (800114c <EE_Init+0x84>)
8001134: 601a str r2, [r3, #0]
return EE_OK;
8001136: 2300 movs r3, #0
8001138: e002 b.n 8001140 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
800113a: f7ff ff03 bl 8000f44 <EE_Format>
800113e: 4603 mov r3, r0
}
}
8001140: 4618 mov r0, r3
8001142: 3708 adds r7, #8
8001144: 46bd mov sp, r7
8001146: bd80 pop {r7, pc}
8001148: 0800f800 .word 0x0800f800
800114c: 0800fc00 .word 0x0800fc00
8001150: 20000000 .word 0x20000000
08001154 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8001154: b580 push {r7, lr}
8001156: b084 sub sp, #16
8001158: af00 add r7, sp, #0
800115a: 4603 mov r3, r0
800115c: 6039 str r1, [r7, #0]
800115e: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8001160: 683b ldr r3, [r7, #0]
8001162: 2b00 cmp r3, #0
8001164: d101 bne.n 800116a <EE_ReadVariable+0x16>
return EE_ERROR;
8001166: 2301 movs r3, #1
8001168: e00a b.n 8001180 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
800116a: 4b07 ldr r3, [pc, #28] @ (8001188 <EE_ReadVariable+0x34>)
800116c: 681b ldr r3, [r3, #0]
800116e: 88f9 ldrh r1, [r7, #6]
8001170: 683a ldr r2, [r7, #0]
8001172: 4618 mov r0, r3
8001174: f7ff fea5 bl 8000ec2 <EE_FindInPage>
8001178: 4603 mov r3, r0
800117a: 73fb strb r3, [r7, #15]
return (uint16_t)st;
800117c: 7bfb ldrb r3, [r7, #15]
800117e: b29b uxth r3, r3
}
8001180: 4618 mov r0, r3
8001182: 3710 adds r7, #16
8001184: 46bd mov sp, r7
8001186: bd80 pop {r7, pc}
8001188: 20000000 .word 0x20000000
0800118c <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
800118c: b580 push {r7, lr}
800118e: b084 sub sp, #16
8001190: af00 add r7, sp, #0
8001192: 4603 mov r3, r0
8001194: 460a mov r2, r1
8001196: 80fb strh r3, [r7, #6]
8001198: 4613 mov r3, r2
800119a: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
800119c: 4b17 ldr r3, [pc, #92] @ (80011fc <EE_WriteVariable+0x70>)
800119e: 681b ldr r3, [r3, #0]
80011a0: 4618 mov r0, r3
80011a2: f7ff fe6a bl 8000e7a <EE_FindFreeAddress>
80011a6: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
80011a8: 68fb ldr r3, [r7, #12]
80011aa: 2b00 cmp r3, #0
80011ac: d017 beq.n 80011de <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
80011ae: 88fb ldrh r3, [r7, #6]
80011b0: 4619 mov r1, r3
80011b2: 68f8 ldr r0, [r7, #12]
80011b4: f7ff fe27 bl 8000e06 <EE_FlashProgramHalfWord>
80011b8: 4603 mov r3, r0
80011ba: 2b00 cmp r3, #0
80011bc: d001 beq.n 80011c2 <EE_WriteVariable+0x36>
return EE_ERROR;
80011be: 2301 movs r3, #1
80011c0: e017 b.n 80011f2 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
80011c2: 68fb ldr r3, [r7, #12]
80011c4: 3302 adds r3, #2
80011c6: 88ba ldrh r2, [r7, #4]
80011c8: 4611 mov r1, r2
80011ca: 4618 mov r0, r3
80011cc: f7ff fe1b bl 8000e06 <EE_FlashProgramHalfWord>
80011d0: 4603 mov r3, r0
80011d2: 2b00 cmp r3, #0
80011d4: d001 beq.n 80011da <EE_WriteVariable+0x4e>
return EE_ERROR;
80011d6: 2301 movs r3, #1
80011d8: e00b b.n 80011f2 <EE_WriteVariable+0x66>
return EE_OK;
80011da: 2300 movs r3, #0
80011dc: e009 b.n 80011f2 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
80011de: 88ba ldrh r2, [r7, #4]
80011e0: 88fb ldrh r3, [r7, #6]
80011e2: 4611 mov r1, r2
80011e4: 4618 mov r0, r3
80011e6: f7ff fee9 bl 8000fbc <EE_PageTransfer>
80011ea: 4603 mov r3, r0
80011ec: 72fb strb r3, [r7, #11]
return (uint16_t)st;
80011ee: 7afb ldrb r3, [r7, #11]
80011f0: b29b uxth r3, r3
}
80011f2: 4618 mov r0, r3
80011f4: 3710 adds r7, #16
80011f6: 46bd mov sp, r7
80011f8: bd80 pop {r7, pc}
80011fa: bf00 nop
80011fc: 20000000 .word 0x20000000
08001200 <loadEE>:
void loadEE(void){
8001200: b580 push {r7, lr}
8001202: af00 add r7, sp, #0
EEW_Read(M1PWMAP, &m1pwmap);
8001204: 4926 ldr r1, [pc, #152] @ (80012a0 <loadEE+0xa0>)
8001206: 2000 movs r0, #0
8001208: f7ff fdde bl 8000dc8 <EEW_Read>
EEW_Read(M1PWMCH, &m1pwmch);
800120c: 4925 ldr r1, [pc, #148] @ (80012a4 <loadEE+0xa4>)
800120e: 2001 movs r0, #1
8001210: f7ff fdda bl 8000dc8 <EEW_Read>
EEW_Read(M2PWMAP, &m2pwmap);
8001214: 4924 ldr r1, [pc, #144] @ (80012a8 <loadEE+0xa8>)
8001216: 2002 movs r0, #2
8001218: f7ff fdd6 bl 8000dc8 <EEW_Read>
EEW_Read(M2PWMCH, &m2pwmch);
800121c: 4923 ldr r1, [pc, #140] @ (80012ac <loadEE+0xac>)
800121e: 2003 movs r0, #3
8001220: f7ff fdd2 bl 8000dc8 <EEW_Read>
EEW_Read(M3PWMAP, &m3pwmap);
8001224: 4922 ldr r1, [pc, #136] @ (80012b0 <loadEE+0xb0>)
8001226: 2004 movs r0, #4
8001228: f7ff fdce bl 8000dc8 <EEW_Read>
EEW_Read(M3PWMCH, &m3pwmch);
800122c: 4921 ldr r1, [pc, #132] @ (80012b4 <loadEE+0xb4>)
800122e: 2005 movs r0, #5
8001230: f7ff fdca bl 8000dc8 <EEW_Read>
EEW_Read(M4PWMAP, &m4pwmap);
8001234: 4920 ldr r1, [pc, #128] @ (80012b8 <loadEE+0xb8>)
8001236: 2006 movs r0, #6
8001238: f7ff fdc6 bl 8000dc8 <EEW_Read>
EEW_Read(M4PWMCH, &m4pwmch);
800123c: 491f ldr r1, [pc, #124] @ (80012bc <loadEE+0xbc>)
800123e: 2007 movs r0, #7
8001240: f7ff fdc2 bl 8000dc8 <EEW_Read>
EEW_Read(T1AP, &t1ap);
8001244: 491e ldr r1, [pc, #120] @ (80012c0 <loadEE+0xc0>)
8001246: 200c movs r0, #12
8001248: f7ff fdbe bl 8000dc8 <EEW_Read>
EEW_Read(T2AP, &t2ap);
800124c: 491d ldr r1, [pc, #116] @ (80012c4 <loadEE+0xc4>)
800124e: 200d movs r0, #13
8001250: f7ff fdba bl 8000dc8 <EEW_Read>
EEW_Read(T3AP, &t3ap);
8001254: 491c ldr r1, [pc, #112] @ (80012c8 <loadEE+0xc8>)
8001256: 200e movs r0, #14
8001258: f7ff fdb6 bl 8000dc8 <EEW_Read>
EEW_Read(T4AP, &t4ap);
800125c: 491b ldr r1, [pc, #108] @ (80012cc <loadEE+0xcc>)
800125e: 200f movs r0, #15
8001260: f7ff fdb2 bl 8000dc8 <EEW_Read>
EEW_Read(TWAP, &twap);
8001264: 491a ldr r1, [pc, #104] @ (80012d0 <loadEE+0xd0>)
8001266: 2010 movs r0, #16
8001268: f7ff fdae bl 8000dc8 <EEW_Read>
EEW_Read(T1CH, &t1ch);
800126c: 4919 ldr r1, [pc, #100] @ (80012d4 <loadEE+0xd4>)
800126e: 2011 movs r0, #17
8001270: f7ff fdaa bl 8000dc8 <EEW_Read>
EEW_Read(T2CH, &t2ch);
8001274: 4918 ldr r1, [pc, #96] @ (80012d8 <loadEE+0xd8>)
8001276: 2012 movs r0, #18
8001278: f7ff fda6 bl 8000dc8 <EEW_Read>
EEW_Read(T3CH, &t3ch);
800127c: 4917 ldr r1, [pc, #92] @ (80012dc <loadEE+0xdc>)
800127e: 2013 movs r0, #19
8001280: f7ff fda2 bl 8000dc8 <EEW_Read>
EEW_Read(T4CH, &t4ch);
8001284: 4916 ldr r1, [pc, #88] @ (80012e0 <loadEE+0xe0>)
8001286: 2014 movs r0, #20
8001288: f7ff fd9e bl 8000dc8 <EEW_Read>
EEW_Read(TWCH, &twch);
800128c: 4915 ldr r1, [pc, #84] @ (80012e4 <loadEE+0xe4>)
800128e: 2015 movs r0, #21
8001290: f7ff fd9a bl 8000dc8 <EEW_Read>
EEW_Read(TRAMP, &tramp);
8001294: 4914 ldr r1, [pc, #80] @ (80012e8 <loadEE+0xe8>)
8001296: 201f movs r0, #31
8001298: f7ff fd96 bl 8000dc8 <EEW_Read>
}
800129c: bf00 nop
800129e: bd80 pop {r7, pc}
80012a0: 200003ee .word 0x200003ee
80012a4: 200003f0 .word 0x200003f0
80012a8: 200003f2 .word 0x200003f2
80012ac: 200003f4 .word 0x200003f4
80012b0: 200003f6 .word 0x200003f6
80012b4: 200003f8 .word 0x200003f8
80012b8: 200003fa .word 0x200003fa
80012bc: 200003fc .word 0x200003fc
80012c0: 200003fe .word 0x200003fe
80012c4: 20000400 .word 0x20000400
80012c8: 20000402 .word 0x20000402
80012cc: 20000404 .word 0x20000404
80012d0: 20000406 .word 0x20000406
80012d4: 20000408 .word 0x20000408
80012d8: 2000040a .word 0x2000040a
80012dc: 2000040c .word 0x2000040c
80012e0: 2000040e .word 0x2000040e
80012e4: 20000410 .word 0x20000410
80012e8: 20000412 .word 0x20000412
080012ec <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
80012ec: b580 push {r7, lr}
80012ee: b082 sub sp, #8
80012f0: af00 add r7, sp, #0
static uint8_t c1s = 0;
static uint8_t inidx=0;
static uint8_t inbuf[4];
uint8_t i;
if (++c10ms >= 10) { // 10 ms
80012f2: 4b82 ldr r3, [pc, #520] @ (80014fc <HAL_SYSTICK_Callback+0x210>)
80012f4: 781b ldrb r3, [r3, #0]
80012f6: 3301 adds r3, #1
80012f8: b2da uxtb r2, r3
80012fa: 4b80 ldr r3, [pc, #512] @ (80014fc <HAL_SYSTICK_Callback+0x210>)
80012fc: 701a strb r2, [r3, #0]
80012fe: 4b7f ldr r3, [pc, #508] @ (80014fc <HAL_SYSTICK_Callback+0x210>)
8001300: 781b ldrb r3, [r3, #0]
8001302: 2b09 cmp r3, #9
8001304: f240 80f6 bls.w 80014f4 <HAL_SYSTICK_Callback+0x208>
c10ms = 0;
8001308: 4b7c ldr r3, [pc, #496] @ (80014fc <HAL_SYSTICK_Callback+0x210>)
800130a: 2200 movs r2, #0
800130c: 701a strb r2, [r3, #0]
if(rtP1)rtP1--;
800130e: 4b7c ldr r3, [pc, #496] @ (8001500 <HAL_SYSTICK_Callback+0x214>)
8001310: 781b ldrb r3, [r3, #0]
8001312: b2db uxtb r3, r3
8001314: 2b00 cmp r3, #0
8001316: d006 beq.n 8001326 <HAL_SYSTICK_Callback+0x3a>
8001318: 4b79 ldr r3, [pc, #484] @ (8001500 <HAL_SYSTICK_Callback+0x214>)
800131a: 781b ldrb r3, [r3, #0]
800131c: b2db uxtb r3, r3
800131e: 3b01 subs r3, #1
8001320: b2da uxtb r2, r3
8001322: 4b77 ldr r3, [pc, #476] @ (8001500 <HAL_SYSTICK_Callback+0x214>)
8001324: 701a strb r2, [r3, #0]
if(rtP2)rtP2--;
8001326: 4b77 ldr r3, [pc, #476] @ (8001504 <HAL_SYSTICK_Callback+0x218>)
8001328: 781b ldrb r3, [r3, #0]
800132a: b2db uxtb r3, r3
800132c: 2b00 cmp r3, #0
800132e: d006 beq.n 800133e <HAL_SYSTICK_Callback+0x52>
8001330: 4b74 ldr r3, [pc, #464] @ (8001504 <HAL_SYSTICK_Callback+0x218>)
8001332: 781b ldrb r3, [r3, #0]
8001334: b2db uxtb r3, r3
8001336: 3b01 subs r3, #1
8001338: b2da uxtb r2, r3
800133a: 4b72 ldr r3, [pc, #456] @ (8001504 <HAL_SYSTICK_Callback+0x218>)
800133c: 701a strb r2, [r3, #0]
//**** legge i tasti********************************************************************************
inidx++;
800133e: 4b72 ldr r3, [pc, #456] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
8001340: 781b ldrb r3, [r3, #0]
8001342: 3301 adds r3, #1
8001344: b2da uxtb r2, r3
8001346: 4b70 ldr r3, [pc, #448] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
8001348: 701a strb r2, [r3, #0]
inidx&=0x03;
800134a: 4b6f ldr r3, [pc, #444] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
800134c: 781b ldrb r3, [r3, #0]
800134e: f003 0303 and.w r3, r3, #3
8001352: b2da uxtb r2, r3
8001354: 4b6c ldr r3, [pc, #432] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
8001356: 701a strb r2, [r3, #0]
if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1);
8001358: f44f 4180 mov.w r1, #16384 @ 0x4000
800135c: 486b ldr r0, [pc, #428] @ (800150c <HAL_SYSTICK_Callback+0x220>)
800135e: f003 fb69 bl 8004a34 <HAL_GPIO_ReadPin>
8001362: 4603 mov r3, r0
8001364: 2b00 cmp r3, #0
8001366: d10c bne.n 8001382 <HAL_SYSTICK_Callback+0x96>
8001368: 4b67 ldr r3, [pc, #412] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
800136a: 781b ldrb r3, [r3, #0]
800136c: 461a mov r2, r3
800136e: 4b68 ldr r3, [pc, #416] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
8001370: 5c9b ldrb r3, [r3, r2]
8001372: 4a65 ldr r2, [pc, #404] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
8001374: 7812 ldrb r2, [r2, #0]
8001376: f043 0301 orr.w r3, r3, #1
800137a: b2d9 uxtb r1, r3
800137c: 4b64 ldr r3, [pc, #400] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
800137e: 5499 strb r1, [r3, r2]
8001380: e00b b.n 800139a <HAL_SYSTICK_Callback+0xae>
8001382: 4b61 ldr r3, [pc, #388] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
8001384: 781b ldrb r3, [r3, #0]
8001386: 461a mov r2, r3
8001388: 4b61 ldr r3, [pc, #388] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
800138a: 5c9b ldrb r3, [r3, r2]
800138c: 4a5e ldr r2, [pc, #376] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
800138e: 7812 ldrb r2, [r2, #0]
8001390: f023 0301 bic.w r3, r3, #1
8001394: b2d9 uxtb r1, r3
8001396: 4b5e ldr r3, [pc, #376] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
8001398: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2);
800139a: f44f 4100 mov.w r1, #32768 @ 0x8000
800139e: 485b ldr r0, [pc, #364] @ (800150c <HAL_SYSTICK_Callback+0x220>)
80013a0: f003 fb48 bl 8004a34 <HAL_GPIO_ReadPin>
80013a4: 4603 mov r3, r0
80013a6: 2b00 cmp r3, #0
80013a8: d10c bne.n 80013c4 <HAL_SYSTICK_Callback+0xd8>
80013aa: 4b57 ldr r3, [pc, #348] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
80013ac: 781b ldrb r3, [r3, #0]
80013ae: 461a mov r2, r3
80013b0: 4b57 ldr r3, [pc, #348] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
80013b2: 5c9b ldrb r3, [r3, r2]
80013b4: 4a54 ldr r2, [pc, #336] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
80013b6: 7812 ldrb r2, [r2, #0]
80013b8: f043 0302 orr.w r3, r3, #2
80013bc: b2d9 uxtb r1, r3
80013be: 4b54 ldr r3, [pc, #336] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
80013c0: 5499 strb r1, [r3, r2]
80013c2: e00b b.n 80013dc <HAL_SYSTICK_Callback+0xf0>
80013c4: 4b50 ldr r3, [pc, #320] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
80013c6: 781b ldrb r3, [r3, #0]
80013c8: 461a mov r2, r3
80013ca: 4b51 ldr r3, [pc, #324] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
80013cc: 5c9b ldrb r3, [r3, r2]
80013ce: 4a4e ldr r2, [pc, #312] @ (8001508 <HAL_SYSTICK_Callback+0x21c>)
80013d0: 7812 ldrb r2, [r2, #0]
80013d2: f023 0302 bic.w r3, r3, #2
80013d6: b2d9 uxtb r1, r3
80013d8: 4b4d ldr r3, [pc, #308] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
80013da: 5499 strb r1, [r3, r2]
pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]);
80013dc: 4b4c ldr r3, [pc, #304] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
80013de: 781a ldrb r2, [r3, #0]
80013e0: 4b4b ldr r3, [pc, #300] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
80013e2: 785b ldrb r3, [r3, #1]
80013e4: 4013 ands r3, r2
80013e6: b2da uxtb r2, r3
80013e8: 4b49 ldr r3, [pc, #292] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
80013ea: 789b ldrb r3, [r3, #2]
80013ec: 4013 ands r3, r2
80013ee: b2da uxtb r2, r3
80013f0: 4b47 ldr r3, [pc, #284] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
80013f2: 78db ldrb r3, [r3, #3]
80013f4: 4013 ands r3, r2
80013f6: b2da uxtb r2, r3
80013f8: 4b46 ldr r3, [pc, #280] @ (8001514 <HAL_SYSTICK_Callback+0x228>)
80013fa: 781b ldrb r3, [r3, #0]
80013fc: 4313 orrs r3, r2
80013fe: b2da uxtb r2, r3
8001400: 4b44 ldr r3, [pc, #272] @ (8001514 <HAL_SYSTICK_Callback+0x228>)
8001402: 701a strb r2, [r3, #0]
pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]);
8001404: 4b42 ldr r3, [pc, #264] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
8001406: 781a ldrb r2, [r3, #0]
8001408: 4b41 ldr r3, [pc, #260] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
800140a: 785b ldrb r3, [r3, #1]
800140c: 4313 orrs r3, r2
800140e: b2da uxtb r2, r3
8001410: 4b3f ldr r3, [pc, #252] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
8001412: 789b ldrb r3, [r3, #2]
8001414: 4313 orrs r3, r2
8001416: b2da uxtb r2, r3
8001418: 4b3d ldr r3, [pc, #244] @ (8001510 <HAL_SYSTICK_Callback+0x224>)
800141a: 78db ldrb r3, [r3, #3]
800141c: 4313 orrs r3, r2
800141e: b2da uxtb r2, r3
8001420: 4b3c ldr r3, [pc, #240] @ (8001514 <HAL_SYSTICK_Callback+0x228>)
8001422: 781b ldrb r3, [r3, #0]
8001424: 4013 ands r3, r2
8001426: b2da uxtb r2, r3
8001428: 4b3a ldr r3, [pc, #232] @ (8001514 <HAL_SYSTICK_Callback+0x228>)
800142a: 701a strb r2, [r3, #0]
//**** legge adc ***********************************************************************************
readAdc();
800142c: f7fe fecc bl 80001c8 <readAdc>
if (++c100ms >= 10) { // 10 ms
8001430: 4b39 ldr r3, [pc, #228] @ (8001518 <HAL_SYSTICK_Callback+0x22c>)
8001432: 781b ldrb r3, [r3, #0]
8001434: 3301 adds r3, #1
8001436: b2da uxtb r2, r3
8001438: 4b37 ldr r3, [pc, #220] @ (8001518 <HAL_SYSTICK_Callback+0x22c>)
800143a: 701a strb r2, [r3, #0]
800143c: 4b36 ldr r3, [pc, #216] @ (8001518 <HAL_SYSTICK_Callback+0x22c>)
800143e: 781b ldrb r3, [r3, #0]
8001440: 2b09 cmp r3, #9
8001442: d957 bls.n 80014f4 <HAL_SYSTICK_Callback+0x208>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8001444: 4b34 ldr r3, [pc, #208] @ (8001518 <HAL_SYSTICK_Callback+0x22c>)
8001446: 2200 movs r2, #0
8001448: 701a strb r2, [r3, #0]
for(i=0;i<4;i++){
800144a: 2300 movs r3, #0
800144c: 71fb strb r3, [r7, #7]
800144e: e013 b.n 8001478 <HAL_SYSTICK_Callback+0x18c>
if(rtramp[i])rtramp[i]--;
8001450: 79fb ldrb r3, [r7, #7]
8001452: 4a32 ldr r2, [pc, #200] @ (800151c <HAL_SYSTICK_Callback+0x230>)
8001454: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001458: b29b uxth r3, r3
800145a: 2b00 cmp r3, #0
800145c: d009 beq.n 8001472 <HAL_SYSTICK_Callback+0x186>
800145e: 79fb ldrb r3, [r7, #7]
8001460: 4a2e ldr r2, [pc, #184] @ (800151c <HAL_SYSTICK_Callback+0x230>)
8001462: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8001466: b292 uxth r2, r2
8001468: 3a01 subs r2, #1
800146a: b291 uxth r1, r2
800146c: 4a2b ldr r2, [pc, #172] @ (800151c <HAL_SYSTICK_Callback+0x230>)
800146e: f822 1013 strh.w r1, [r2, r3, lsl #1]
for(i=0;i<4;i++){
8001472: 79fb ldrb r3, [r7, #7]
8001474: 3301 adds r3, #1
8001476: 71fb strb r3, [r7, #7]
8001478: 79fb ldrb r3, [r7, #7]
800147a: 2b03 cmp r3, #3
800147c: d9e8 bls.n 8001450 <HAL_SYSTICK_Callback+0x164>
}
//**** gestione buzzer *****************************************************************************
if(stBuz==bzmoving){
800147e: 4b28 ldr r3, [pc, #160] @ (8001520 <HAL_SYSTICK_Callback+0x234>)
8001480: 781b ldrb r3, [r3, #0]
8001482: b2db uxtb r3, r3
8001484: 2b01 cmp r3, #1
8001486: d111 bne.n 80014ac <HAL_SYSTICK_Callback+0x1c0>
if(c1s>=5)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001488: 4b26 ldr r3, [pc, #152] @ (8001524 <HAL_SYSTICK_Callback+0x238>)
800148a: 781b ldrb r3, [r3, #0]
800148c: 2b04 cmp r3, #4
800148e: d906 bls.n 800149e <HAL_SYSTICK_Callback+0x1b2>
8001490: 2200 movs r2, #0
8001492: f44f 7180 mov.w r1, #256 @ 0x100
8001496: 4824 ldr r0, [pc, #144] @ (8001528 <HAL_SYSTICK_Callback+0x23c>)
8001498: f003 fae3 bl 8004a62 <HAL_GPIO_WritePin>
800149c: e00c b.n 80014b8 <HAL_SYSTICK_Callback+0x1cc>
800149e: 2201 movs r2, #1
80014a0: f44f 7180 mov.w r1, #256 @ 0x100
80014a4: 4820 ldr r0, [pc, #128] @ (8001528 <HAL_SYSTICK_Callback+0x23c>)
80014a6: f003 fadc bl 8004a62 <HAL_GPIO_WritePin>
80014aa: e005 b.n 80014b8 <HAL_SYSTICK_Callback+0x1cc>
}else{//bzoff
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
80014ac: 2200 movs r2, #0
80014ae: f44f 7180 mov.w r1, #256 @ 0x100
80014b2: 481d ldr r0, [pc, #116] @ (8001528 <HAL_SYSTICK_Callback+0x23c>)
80014b4: f003 fad5 bl 8004a62 <HAL_GPIO_WritePin>
}
//**************************************************************************************************
if (++c1s >= 10) { // 10 ms
80014b8: 4b1a ldr r3, [pc, #104] @ (8001524 <HAL_SYSTICK_Callback+0x238>)
80014ba: 781b ldrb r3, [r3, #0]
80014bc: 3301 adds r3, #1
80014be: b2da uxtb r2, r3
80014c0: 4b18 ldr r3, [pc, #96] @ (8001524 <HAL_SYSTICK_Callback+0x238>)
80014c2: 701a strb r2, [r3, #0]
80014c4: 4b17 ldr r3, [pc, #92] @ (8001524 <HAL_SYSTICK_Callback+0x238>)
80014c6: 781b ldrb r3, [r3, #0]
80014c8: 2b09 cmp r3, #9
80014ca: d913 bls.n 80014f4 <HAL_SYSTICK_Callback+0x208>
c1s = 0;
80014cc: 4b15 ldr r3, [pc, #84] @ (8001524 <HAL_SYSTICK_Callback+0x238>)
80014ce: 2200 movs r2, #0
80014d0: 701a strb r2, [r3, #0]
if(rtCiclo)rtCiclo--;
80014d2: 4b16 ldr r3, [pc, #88] @ (800152c <HAL_SYSTICK_Callback+0x240>)
80014d4: 881b ldrh r3, [r3, #0]
80014d6: b29b uxth r3, r3
80014d8: 2b00 cmp r3, #0
80014da: d006 beq.n 80014ea <HAL_SYSTICK_Callback+0x1fe>
80014dc: 4b13 ldr r3, [pc, #76] @ (800152c <HAL_SYSTICK_Callback+0x240>)
80014de: 881b ldrh r3, [r3, #0]
80014e0: b29b uxth r3, r3
80014e2: 3b01 subs r3, #1
80014e4: b29a uxth r2, r3
80014e6: 4b11 ldr r3, [pc, #68] @ (800152c <HAL_SYSTICK_Callback+0x240>)
80014e8: 801a strh r2, [r3, #0]
HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
80014ea: f44f 5100 mov.w r1, #8192 @ 0x2000
80014ee: 4807 ldr r0, [pc, #28] @ (800150c <HAL_SYSTICK_Callback+0x220>)
80014f0: f003 facf bl 8004a92 <HAL_GPIO_TogglePin>
}
}
}
}
80014f4: bf00 nop
80014f6: 3708 adds r7, #8
80014f8: 46bd mov sp, r7
80014fa: bd80 pop {r7, pc}
80014fc: 2000041f .word 0x2000041f
8001500: 20000004 .word 0x20000004
8001504: 20000005 .word 0x20000005
8001508: 20000420 .word 0x20000420
800150c: 40011000 .word 0x40011000
8001510: 20000424 .word 0x20000424
8001514: 200003e0 .word 0x200003e0
8001518: 20000428 .word 0x20000428
800151c: 200003e4 .word 0x200003e4
8001520: 2000041e .word 0x2000041e
8001524: 20000429 .word 0x20000429
8001528: 40010800 .word 0x40010800
800152c: 200003ec .word 0x200003ec
08001530 <managePulsanti>:
void managePulsanti(void){
8001530: b480 push {r7}
8001532: af00 add r7, sp, #0
if(pulsanti&INP1){
8001534: 4b31 ldr r3, [pc, #196] @ (80015fc <managePulsanti+0xcc>)
8001536: 781b ldrb r3, [r3, #0]
8001538: f003 0301 and.w r3, r3, #1
800153c: 2b00 cmp r3, #0
800153e: d00c beq.n 800155a <managePulsanti+0x2a>
if(rtP1==0)stPulsanti|=P1START;
8001540: 4b2f ldr r3, [pc, #188] @ (8001600 <managePulsanti+0xd0>)
8001542: 781b ldrb r3, [r3, #0]
8001544: b2db uxtb r3, r3
8001546: 2b00 cmp r3, #0
8001548: d124 bne.n 8001594 <managePulsanti+0x64>
800154a: 4b2e ldr r3, [pc, #184] @ (8001604 <managePulsanti+0xd4>)
800154c: 781b ldrb r3, [r3, #0]
800154e: f043 0301 orr.w r3, r3, #1
8001552: b2da uxtb r2, r3
8001554: 4b2b ldr r3, [pc, #172] @ (8001604 <managePulsanti+0xd4>)
8001556: 701a strb r2, [r3, #0]
8001558: e01c b.n 8001594 <managePulsanti+0x64>
}else{
if(stPulsanti&P1START)stPulsanti&=(~P1START);
800155a: 4b2a ldr r3, [pc, #168] @ (8001604 <managePulsanti+0xd4>)
800155c: 781b ldrb r3, [r3, #0]
800155e: f003 0301 and.w r3, r3, #1
8001562: 2b00 cmp r3, #0
8001564: d007 beq.n 8001576 <managePulsanti+0x46>
8001566: 4b27 ldr r3, [pc, #156] @ (8001604 <managePulsanti+0xd4>)
8001568: 781b ldrb r3, [r3, #0]
800156a: f023 0301 bic.w r3, r3, #1
800156e: b2da uxtb r2, r3
8001570: 4b24 ldr r3, [pc, #144] @ (8001604 <managePulsanti+0xd4>)
8001572: 701a strb r2, [r3, #0]
8001574: e00b b.n 800158e <managePulsanti+0x5e>
else if(rtP1<=190){
8001576: 4b22 ldr r3, [pc, #136] @ (8001600 <managePulsanti+0xd0>)
8001578: 781b ldrb r3, [r3, #0]
800157a: b2db uxtb r3, r3
800157c: 2bbe cmp r3, #190 @ 0xbe
800157e: d806 bhi.n 800158e <managePulsanti+0x5e>
stPulsanti|=P1STOP;
8001580: 4b20 ldr r3, [pc, #128] @ (8001604 <managePulsanti+0xd4>)
8001582: 781b ldrb r3, [r3, #0]
8001584: f043 0302 orr.w r3, r3, #2
8001588: b2da uxtb r2, r3
800158a: 4b1e ldr r3, [pc, #120] @ (8001604 <managePulsanti+0xd4>)
800158c: 701a strb r2, [r3, #0]
}
rtP1=200;
800158e: 4b1c ldr r3, [pc, #112] @ (8001600 <managePulsanti+0xd0>)
8001590: 22c8 movs r2, #200 @ 0xc8
8001592: 701a strb r2, [r3, #0]
}
if(pulsanti&INP2){
8001594: 4b19 ldr r3, [pc, #100] @ (80015fc <managePulsanti+0xcc>)
8001596: 781b ldrb r3, [r3, #0]
8001598: f003 0302 and.w r3, r3, #2
800159c: 2b00 cmp r3, #0
800159e: d00c beq.n 80015ba <managePulsanti+0x8a>
if(rtP2==0)stPulsanti|=P2START;
80015a0: 4b19 ldr r3, [pc, #100] @ (8001608 <managePulsanti+0xd8>)
80015a2: 781b ldrb r3, [r3, #0]
80015a4: b2db uxtb r3, r3
80015a6: 2b00 cmp r3, #0
80015a8: d124 bne.n 80015f4 <managePulsanti+0xc4>
80015aa: 4b16 ldr r3, [pc, #88] @ (8001604 <managePulsanti+0xd4>)
80015ac: 781b ldrb r3, [r3, #0]
80015ae: f043 0304 orr.w r3, r3, #4
80015b2: b2da uxtb r2, r3
80015b4: 4b13 ldr r3, [pc, #76] @ (8001604 <managePulsanti+0xd4>)
80015b6: 701a strb r2, [r3, #0]
}else{
if(stPulsanti&P2START)stPulsanti&=(~P2START);
else if(rtP2<=190)stPulsanti|=P2STOP;
rtP2=200;
}
}
80015b8: e01c b.n 80015f4 <managePulsanti+0xc4>
if(stPulsanti&P2START)stPulsanti&=(~P2START);
80015ba: 4b12 ldr r3, [pc, #72] @ (8001604 <managePulsanti+0xd4>)
80015bc: 781b ldrb r3, [r3, #0]
80015be: f003 0304 and.w r3, r3, #4
80015c2: 2b00 cmp r3, #0
80015c4: d007 beq.n 80015d6 <managePulsanti+0xa6>
80015c6: 4b0f ldr r3, [pc, #60] @ (8001604 <managePulsanti+0xd4>)
80015c8: 781b ldrb r3, [r3, #0]
80015ca: f023 0304 bic.w r3, r3, #4
80015ce: b2da uxtb r2, r3
80015d0: 4b0c ldr r3, [pc, #48] @ (8001604 <managePulsanti+0xd4>)
80015d2: 701a strb r2, [r3, #0]
80015d4: e00b b.n 80015ee <managePulsanti+0xbe>
else if(rtP2<=190)stPulsanti|=P2STOP;
80015d6: 4b0c ldr r3, [pc, #48] @ (8001608 <managePulsanti+0xd8>)
80015d8: 781b ldrb r3, [r3, #0]
80015da: b2db uxtb r3, r3
80015dc: 2bbe cmp r3, #190 @ 0xbe
80015de: d806 bhi.n 80015ee <managePulsanti+0xbe>
80015e0: 4b08 ldr r3, [pc, #32] @ (8001604 <managePulsanti+0xd4>)
80015e2: 781b ldrb r3, [r3, #0]
80015e4: f043 0308 orr.w r3, r3, #8
80015e8: b2da uxtb r2, r3
80015ea: 4b06 ldr r3, [pc, #24] @ (8001604 <managePulsanti+0xd4>)
80015ec: 701a strb r2, [r3, #0]
rtP2=200;
80015ee: 4b06 ldr r3, [pc, #24] @ (8001608 <managePulsanti+0xd8>)
80015f0: 22c8 movs r2, #200 @ 0xc8
80015f2: 701a strb r2, [r3, #0]
}
80015f4: bf00 nop
80015f6: 46bd mov sp, r7
80015f8: bc80 pop {r7}
80015fa: 4770 bx lr
80015fc: 200003e0 .word 0x200003e0
8001600: 20000004 .word 0x20000004
8001604: 2000041c .word 0x2000041c
8001608: 20000005 .word 0x20000005
0800160c <manageCiclo>:
void manageCiclo(void){
800160c: b580 push {r7, lr}
800160e: b082 sub sp, #8
8001610: af02 add r7, sp, #8
switch(stCiclo){
8001612: 4ba8 ldr r3, [pc, #672] @ (80018b4 <manageCiclo+0x2a8>)
8001614: 781b ldrb r3, [r3, #0]
8001616: 2b1f cmp r3, #31
8001618: f200 8597 bhi.w 800214a <manageCiclo+0xb3e>
800161c: a201 add r2, pc, #4 @ (adr r2, 8001624 <manageCiclo+0x18>)
800161e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001622: bf00 nop
8001624: 080016a5 .word 0x080016a5
8001628: 080016f7 .word 0x080016f7
800162c: 08001745 .word 0x08001745
8001630: 08001789 .word 0x08001789
8001634: 080017d1 .word 0x080017d1
8001638: 0800181b .word 0x0800181b
800163c: 08001869 .word 0x08001869
8001640: 080018e5 .word 0x080018e5
8001644: 08001931 .word 0x08001931
8001648: 0800198f .word 0x0800198f
800164c: 080019f7 .word 0x080019f7
8001650: 08001a3f .word 0x08001a3f
8001654: 08001a8b .word 0x08001a8b
8001658: 08001acd .word 0x08001acd
800165c: 08001b13 .word 0x08001b13
8001660: 08001b71 .word 0x08001b71
8001664: 08001bb5 .word 0x08001bb5
8001668: 08001c05 .word 0x08001c05
800166c: 08001c51 .word 0x08001c51
8001670: 08001c99 .word 0x08001c99
8001674: 08001ce5 .word 0x08001ce5
8001678: 08001d43 .word 0x08001d43
800167c: 08001dab .word 0x08001dab
8001680: 08001e49 .word 0x08001e49
8001684: 08001ebd .word 0x08001ebd
8001688: 08001eff .word 0x08001eff
800168c: 08001f45 .word 0x08001f45
8001690: 08001f87 .word 0x08001f87
8001694: 08001fcd .word 0x08001fcd
8001698: 08001ff3 .word 0x08001ff3
800169c: 08002039 .word 0x08002039
80016a0: 08002063 .word 0x08002063
case omchiuso:
if(stPulsanti&P1START){
80016a4: 4b84 ldr r3, [pc, #528] @ (80018b8 <manageCiclo+0x2ac>)
80016a6: 781b ldrb r3, [r3, #0]
80016a8: f003 0301 and.w r3, r3, #1
80016ac: 2b00 cmp r3, #0
80016ae: d016 beq.n 80016de <manageCiclo+0xd2>
stBuz=bzmoving;
80016b0: 4b82 ldr r3, [pc, #520] @ (80018bc <manageCiclo+0x2b0>)
80016b2: 2201 movs r2, #1
80016b4: 701a strb r2, [r3, #0]
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT);
80016b6: 4b82 ldr r3, [pc, #520] @ (80018c0 <manageCiclo+0x2b4>)
80016b8: 885b ldrh r3, [r3, #2]
80016ba: b2da uxtb r2, r3
80016bc: 4b81 ldr r3, [pc, #516] @ (80018c4 <manageCiclo+0x2b8>)
80016be: 881b ldrh r3, [r3, #0]
80016c0: b2d9 uxtb r1, r3
80016c2: 4b81 ldr r3, [pc, #516] @ (80018c8 <manageCiclo+0x2bc>)
80016c4: 881b ldrh r3, [r3, #0]
80016c6: b2db uxtb r3, r3
80016c8: 2000 movs r0, #0
80016ca: 9001 str r0, [sp, #4]
80016cc: 9300 str r3, [sp, #0]
80016ce: 460b mov r3, r1
80016d0: 2101 movs r1, #1
80016d2: 2002 movs r0, #2
80016d4: f001 fc0c bl 8002ef0 <ramp>
stCiclo=omapertura1;
80016d8: 4b76 ldr r3, [pc, #472] @ (80018b4 <manageCiclo+0x2a8>)
80016da: 2201 movs r2, #1
80016dc: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
80016de: 4b76 ldr r3, [pc, #472] @ (80018b8 <manageCiclo+0x2ac>)
80016e0: 781b ldrb r3, [r3, #0]
80016e2: f003 0302 and.w r3, r3, #2
80016e6: 2b00 cmp r3, #0
80016e8: f000 84dd beq.w 80020a6 <manageCiclo+0xa9a>
80016ec: 4b71 ldr r3, [pc, #452] @ (80018b4 <manageCiclo+0x2a8>)
80016ee: 220f movs r2, #15
80016f0: 701a strb r2, [r3, #0]
break;
80016f2: f000 bcd8 b.w 80020a6 <manageCiclo+0xa9a>
case omapertura1:
if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){
80016f6: 4b72 ldr r3, [pc, #456] @ (80018c0 <manageCiclo+0x2b4>)
80016f8: 885b ldrh r3, [r3, #2]
80016fa: b2da uxtb r2, r3
80016fc: 4b71 ldr r3, [pc, #452] @ (80018c4 <manageCiclo+0x2b8>)
80016fe: 881b ldrh r3, [r3, #0]
8001700: b2d9 uxtb r1, r3
8001702: 4b71 ldr r3, [pc, #452] @ (80018c8 <manageCiclo+0x2bc>)
8001704: 881b ldrh r3, [r3, #0]
8001706: b2db uxtb r3, r3
8001708: 200a movs r0, #10
800170a: 9001 str r0, [sp, #4]
800170c: 9300 str r3, [sp, #0]
800170e: 460b mov r3, r1
8001710: 2101 movs r1, #1
8001712: 2002 movs r0, #2
8001714: f001 fbec bl 8002ef0 <ramp>
8001718: 4603 mov r3, r0
800171a: 2b00 cmp r3, #0
800171c: d106 bne.n 800172c <manageCiclo+0x120>
rtCiclo=t1ap;
800171e: 4b6b ldr r3, [pc, #428] @ (80018cc <manageCiclo+0x2c0>)
8001720: 881a ldrh r2, [r3, #0]
8001722: 4b6b ldr r3, [pc, #428] @ (80018d0 <manageCiclo+0x2c4>)
8001724: 801a strh r2, [r3, #0]
stCiclo=omapertura2;
8001726: 4b63 ldr r3, [pc, #396] @ (80018b4 <manageCiclo+0x2a8>)
8001728: 2202 movs r2, #2
800172a: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
800172c: 4b62 ldr r3, [pc, #392] @ (80018b8 <manageCiclo+0x2ac>)
800172e: 781b ldrb r3, [r3, #0]
8001730: f003 0302 and.w r3, r3, #2
8001734: 2b00 cmp r3, #0
8001736: f000 84b8 beq.w 80020aa <manageCiclo+0xa9e>
800173a: 4b5e ldr r3, [pc, #376] @ (80018b4 <manageCiclo+0x2a8>)
800173c: 220f movs r2, #15
800173e: 701a strb r2, [r3, #0]
break;
8001740: f000 bcb3 b.w 80020aa <manageCiclo+0xa9e>
case omapertura2:
if(rtCiclo==0){
8001744: 4b62 ldr r3, [pc, #392] @ (80018d0 <manageCiclo+0x2c4>)
8001746: 881b ldrh r3, [r3, #0]
8001748: b29b uxth r3, r3
800174a: 2b00 cmp r3, #0
800174c: d110 bne.n 8001770 <manageCiclo+0x164>
(void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT);
800174e: 4b5d ldr r3, [pc, #372] @ (80018c4 <manageCiclo+0x2b8>)
8001750: 881b ldrh r3, [r3, #0]
8001752: b2da uxtb r2, r3
8001754: 4b5c ldr r3, [pc, #368] @ (80018c8 <manageCiclo+0x2bc>)
8001756: 881b ldrh r3, [r3, #0]
8001758: b2db uxtb r3, r3
800175a: 2100 movs r1, #0
800175c: 9101 str r1, [sp, #4]
800175e: 9300 str r3, [sp, #0]
8001760: 2300 movs r3, #0
8001762: 2101 movs r1, #1
8001764: 2002 movs r0, #2
8001766: f001 fbc3 bl 8002ef0 <ramp>
stCiclo=omapertura3;
800176a: 4b52 ldr r3, [pc, #328] @ (80018b4 <manageCiclo+0x2a8>)
800176c: 2203 movs r2, #3
800176e: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001770: 4b51 ldr r3, [pc, #324] @ (80018b8 <manageCiclo+0x2ac>)
8001772: 781b ldrb r3, [r3, #0]
8001774: f003 0302 and.w r3, r3, #2
8001778: 2b00 cmp r3, #0
800177a: f000 8498 beq.w 80020ae <manageCiclo+0xaa2>
800177e: 4b4d ldr r3, [pc, #308] @ (80018b4 <manageCiclo+0x2a8>)
8001780: 220f movs r2, #15
8001782: 701a strb r2, [r3, #0]
break;
8001784: f000 bc93 b.w 80020ae <manageCiclo+0xaa2>
case omapertura3:
if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){
8001788: 4b4e ldr r3, [pc, #312] @ (80018c4 <manageCiclo+0x2b8>)
800178a: 881b ldrh r3, [r3, #0]
800178c: b2da uxtb r2, r3
800178e: 4b4e ldr r3, [pc, #312] @ (80018c8 <manageCiclo+0x2bc>)
8001790: 881b ldrh r3, [r3, #0]
8001792: b2db uxtb r3, r3
8001794: 210a movs r1, #10
8001796: 9101 str r1, [sp, #4]
8001798: 9300 str r3, [sp, #0]
800179a: 2300 movs r3, #0
800179c: 2101 movs r1, #1
800179e: 2002 movs r0, #2
80017a0: f001 fba6 bl 8002ef0 <ramp>
80017a4: 4603 mov r3, r0
80017a6: 2b00 cmp r3, #0
80017a8: d106 bne.n 80017b8 <manageCiclo+0x1ac>
rtCiclo=twap;
80017aa: 4b4a ldr r3, [pc, #296] @ (80018d4 <manageCiclo+0x2c8>)
80017ac: 881a ldrh r2, [r3, #0]
80017ae: 4b48 ldr r3, [pc, #288] @ (80018d0 <manageCiclo+0x2c4>)
80017b0: 801a strh r2, [r3, #0]
stCiclo=omapertura4;
80017b2: 4b40 ldr r3, [pc, #256] @ (80018b4 <manageCiclo+0x2a8>)
80017b4: 2204 movs r2, #4
80017b6: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
80017b8: 4b3f ldr r3, [pc, #252] @ (80018b8 <manageCiclo+0x2ac>)
80017ba: 781b ldrb r3, [r3, #0]
80017bc: f003 0302 and.w r3, r3, #2
80017c0: 2b00 cmp r3, #0
80017c2: f000 8476 beq.w 80020b2 <manageCiclo+0xaa6>
80017c6: 4b3b ldr r3, [pc, #236] @ (80018b4 <manageCiclo+0x2a8>)
80017c8: 220f movs r2, #15
80017ca: 701a strb r2, [r3, #0]
break;
80017cc: f000 bc71 b.w 80020b2 <manageCiclo+0xaa6>
case omapertura4:
if(rtCiclo==0){
80017d0: 4b3f ldr r3, [pc, #252] @ (80018d0 <manageCiclo+0x2c4>)
80017d2: 881b ldrh r3, [r3, #0]
80017d4: b29b uxth r3, r3
80017d6: 2b00 cmp r3, #0
80017d8: d113 bne.n 8001802 <manageCiclo+0x1f6>
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT);
80017da: 4b39 ldr r3, [pc, #228] @ (80018c0 <manageCiclo+0x2b4>)
80017dc: 881b ldrh r3, [r3, #0]
80017de: b2da uxtb r2, r3
80017e0: 4b3d ldr r3, [pc, #244] @ (80018d8 <manageCiclo+0x2cc>)
80017e2: 881b ldrh r3, [r3, #0]
80017e4: b2d9 uxtb r1, r3
80017e6: 4b38 ldr r3, [pc, #224] @ (80018c8 <manageCiclo+0x2bc>)
80017e8: 881b ldrh r3, [r3, #0]
80017ea: b2db uxtb r3, r3
80017ec: 2000 movs r0, #0
80017ee: 9001 str r0, [sp, #4]
80017f0: 9300 str r3, [sp, #0]
80017f2: 460b mov r3, r1
80017f4: 2100 movs r1, #0
80017f6: 2001 movs r0, #1
80017f8: f001 fb7a bl 8002ef0 <ramp>
stCiclo=omapertura5;
80017fc: 4b2d ldr r3, [pc, #180] @ (80018b4 <manageCiclo+0x2a8>)
80017fe: 2205 movs r2, #5
8001800: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001802: 4b2d ldr r3, [pc, #180] @ (80018b8 <manageCiclo+0x2ac>)
8001804: 781b ldrb r3, [r3, #0]
8001806: f003 0302 and.w r3, r3, #2
800180a: 2b00 cmp r3, #0
800180c: f000 8453 beq.w 80020b6 <manageCiclo+0xaaa>
8001810: 4b28 ldr r3, [pc, #160] @ (80018b4 <manageCiclo+0x2a8>)
8001812: 220f movs r2, #15
8001814: 701a strb r2, [r3, #0]
break;
8001816: f000 bc4e b.w 80020b6 <manageCiclo+0xaaa>
case omapertura5:
if(ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){
800181a: 4b29 ldr r3, [pc, #164] @ (80018c0 <manageCiclo+0x2b4>)
800181c: 881b ldrh r3, [r3, #0]
800181e: b2da uxtb r2, r3
8001820: 4b2d ldr r3, [pc, #180] @ (80018d8 <manageCiclo+0x2cc>)
8001822: 881b ldrh r3, [r3, #0]
8001824: b2d9 uxtb r1, r3
8001826: 4b28 ldr r3, [pc, #160] @ (80018c8 <manageCiclo+0x2bc>)
8001828: 881b ldrh r3, [r3, #0]
800182a: b2db uxtb r3, r3
800182c: 200a movs r0, #10
800182e: 9001 str r0, [sp, #4]
8001830: 9300 str r3, [sp, #0]
8001832: 460b mov r3, r1
8001834: 2100 movs r1, #0
8001836: 2001 movs r0, #1
8001838: f001 fb5a bl 8002ef0 <ramp>
800183c: 4603 mov r3, r0
800183e: 2b00 cmp r3, #0
8001840: d106 bne.n 8001850 <manageCiclo+0x244>
rtCiclo=t2ap;
8001842: 4b26 ldr r3, [pc, #152] @ (80018dc <manageCiclo+0x2d0>)
8001844: 881a ldrh r2, [r3, #0]
8001846: 4b22 ldr r3, [pc, #136] @ (80018d0 <manageCiclo+0x2c4>)
8001848: 801a strh r2, [r3, #0]
stCiclo=omapertura6;
800184a: 4b1a ldr r3, [pc, #104] @ (80018b4 <manageCiclo+0x2a8>)
800184c: 2206 movs r2, #6
800184e: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001850: 4b19 ldr r3, [pc, #100] @ (80018b8 <manageCiclo+0x2ac>)
8001852: 781b ldrb r3, [r3, #0]
8001854: f003 0302 and.w r3, r3, #2
8001858: 2b00 cmp r3, #0
800185a: f000 842e beq.w 80020ba <manageCiclo+0xaae>
800185e: 4b15 ldr r3, [pc, #84] @ (80018b4 <manageCiclo+0x2a8>)
8001860: 220f movs r2, #15
8001862: 701a strb r2, [r3, #0]
break;
8001864: f000 bc29 b.w 80020ba <manageCiclo+0xaae>
case omapertura6:
if(rtCiclo==0){
8001868: 4b19 ldr r3, [pc, #100] @ (80018d0 <manageCiclo+0x2c4>)
800186a: 881b ldrh r3, [r3, #0]
800186c: b29b uxth r3, r3
800186e: 2b00 cmp r3, #0
8001870: d113 bne.n 800189a <manageCiclo+0x28e>
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPINIT);
8001872: 4b13 ldr r3, [pc, #76] @ (80018c0 <manageCiclo+0x2b4>)
8001874: 889b ldrh r3, [r3, #4]
8001876: b2da uxtb r2, r3
8001878: 4b19 ldr r3, [pc, #100] @ (80018e0 <manageCiclo+0x2d4>)
800187a: 881b ldrh r3, [r3, #0]
800187c: b2d9 uxtb r1, r3
800187e: 4b12 ldr r3, [pc, #72] @ (80018c8 <manageCiclo+0x2bc>)
8001880: 881b ldrh r3, [r3, #0]
8001882: b2db uxtb r3, r3
8001884: 2000 movs r0, #0
8001886: 9001 str r0, [sp, #4]
8001888: 9300 str r3, [sp, #0]
800188a: 460b mov r3, r1
800188c: 2100 movs r1, #0
800188e: 2003 movs r0, #3
8001890: f001 fb2e bl 8002ef0 <ramp>
stCiclo=omapertura7;
8001894: 4b07 ldr r3, [pc, #28] @ (80018b4 <manageCiclo+0x2a8>)
8001896: 2207 movs r2, #7
8001898: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
800189a: 4b07 ldr r3, [pc, #28] @ (80018b8 <manageCiclo+0x2ac>)
800189c: 781b ldrb r3, [r3, #0]
800189e: f003 0302 and.w r3, r3, #2
80018a2: 2b00 cmp r3, #0
80018a4: f000 840b beq.w 80020be <manageCiclo+0xab2>
80018a8: 4b02 ldr r3, [pc, #8] @ (80018b4 <manageCiclo+0x2a8>)
80018aa: 220f movs r2, #15
80018ac: 701a strb r2, [r3, #0]
break;
80018ae: f000 bc06 b.w 80020be <manageCiclo+0xab2>
80018b2: bf00 nop
80018b4: 2000041d .word 0x2000041d
80018b8: 2000041c .word 0x2000041c
80018bc: 2000041e .word 0x2000041e
80018c0: 20000414 .word 0x20000414
80018c4: 200003f2 .word 0x200003f2
80018c8: 20000412 .word 0x20000412
80018cc: 200003fe .word 0x200003fe
80018d0: 200003ec .word 0x200003ec
80018d4: 20000406 .word 0x20000406
80018d8: 200003ee .word 0x200003ee
80018dc: 20000400 .word 0x20000400
80018e0: 200003f6 .word 0x200003f6
case omapertura7:
if(ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){
80018e4: 4b96 ldr r3, [pc, #600] @ (8001b40 <manageCiclo+0x534>)
80018e6: 889b ldrh r3, [r3, #4]
80018e8: b2da uxtb r2, r3
80018ea: 4b96 ldr r3, [pc, #600] @ (8001b44 <manageCiclo+0x538>)
80018ec: 881b ldrh r3, [r3, #0]
80018ee: b2d9 uxtb r1, r3
80018f0: 4b95 ldr r3, [pc, #596] @ (8001b48 <manageCiclo+0x53c>)
80018f2: 881b ldrh r3, [r3, #0]
80018f4: b2db uxtb r3, r3
80018f6: 200a movs r0, #10
80018f8: 9001 str r0, [sp, #4]
80018fa: 9300 str r3, [sp, #0]
80018fc: 460b mov r3, r1
80018fe: 2100 movs r1, #0
8001900: 2003 movs r0, #3
8001902: f001 faf5 bl 8002ef0 <ramp>
8001906: 4603 mov r3, r0
8001908: 2b00 cmp r3, #0
800190a: d106 bne.n 800191a <manageCiclo+0x30e>
rtCiclo=t3ap;
800190c: 4b8f ldr r3, [pc, #572] @ (8001b4c <manageCiclo+0x540>)
800190e: 881a ldrh r2, [r3, #0]
8001910: 4b8f ldr r3, [pc, #572] @ (8001b50 <manageCiclo+0x544>)
8001912: 801a strh r2, [r3, #0]
stCiclo=omapertura8;
8001914: 4b8f ldr r3, [pc, #572] @ (8001b54 <manageCiclo+0x548>)
8001916: 2208 movs r2, #8
8001918: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
800191a: 4b8f ldr r3, [pc, #572] @ (8001b58 <manageCiclo+0x54c>)
800191c: 781b ldrb r3, [r3, #0]
800191e: f003 0302 and.w r3, r3, #2
8001922: 2b00 cmp r3, #0
8001924: f000 83cd beq.w 80020c2 <manageCiclo+0xab6>
8001928: 4b8a ldr r3, [pc, #552] @ (8001b54 <manageCiclo+0x548>)
800192a: 220f movs r2, #15
800192c: 701a strb r2, [r3, #0]
break;
800192e: e3c8 b.n 80020c2 <manageCiclo+0xab6>
case omapertura8:
if(rtCiclo==0){
8001930: 4b87 ldr r3, [pc, #540] @ (8001b50 <manageCiclo+0x544>)
8001932: 881b ldrh r3, [r3, #0]
8001934: b29b uxth r3, r3
8001936: 2b00 cmp r3, #0
8001938: d11e bne.n 8001978 <manageCiclo+0x36c>
(void)ramp(M3,FW,m3pwmap,0,tramp,RAMPINIT);
800193a: 4b82 ldr r3, [pc, #520] @ (8001b44 <manageCiclo+0x538>)
800193c: 881b ldrh r3, [r3, #0]
800193e: b2da uxtb r2, r3
8001940: 4b81 ldr r3, [pc, #516] @ (8001b48 <manageCiclo+0x53c>)
8001942: 881b ldrh r3, [r3, #0]
8001944: b2db uxtb r3, r3
8001946: 2100 movs r1, #0
8001948: 9101 str r1, [sp, #4]
800194a: 9300 str r3, [sp, #0]
800194c: 2300 movs r3, #0
800194e: 2100 movs r1, #0
8001950: 2003 movs r0, #3
8001952: f001 facd bl 8002ef0 <ramp>
(void)ramp(M1,FW,m1pwmap,0,tramp,RAMPINIT);
8001956: 4b81 ldr r3, [pc, #516] @ (8001b5c <manageCiclo+0x550>)
8001958: 881b ldrh r3, [r3, #0]
800195a: b2da uxtb r2, r3
800195c: 4b7a ldr r3, [pc, #488] @ (8001b48 <manageCiclo+0x53c>)
800195e: 881b ldrh r3, [r3, #0]
8001960: b2db uxtb r3, r3
8001962: 2100 movs r1, #0
8001964: 9101 str r1, [sp, #4]
8001966: 9300 str r3, [sp, #0]
8001968: 2300 movs r3, #0
800196a: 2100 movs r1, #0
800196c: 2001 movs r0, #1
800196e: f001 fabf bl 8002ef0 <ramp>
stCiclo=omapertura9;
8001972: 4b78 ldr r3, [pc, #480] @ (8001b54 <manageCiclo+0x548>)
8001974: 2209 movs r2, #9
8001976: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001978: 4b77 ldr r3, [pc, #476] @ (8001b58 <manageCiclo+0x54c>)
800197a: 781b ldrb r3, [r3, #0]
800197c: f003 0302 and.w r3, r3, #2
8001980: 2b00 cmp r3, #0
8001982: f000 83a0 beq.w 80020c6 <manageCiclo+0xaba>
8001986: 4b73 ldr r3, [pc, #460] @ (8001b54 <manageCiclo+0x548>)
8001988: 220f movs r2, #15
800198a: 701a strb r2, [r3, #0]
break;
800198c: e39b b.n 80020c6 <manageCiclo+0xaba>
case omapertura9:
if((ramp(M3,FW,m3pwmap,0,tramp,RAMPRUN)==DONE)&&(ramp(M1,FW,m1pwmap,0,tramp,RAMPRUN)==DONE)){
800198e: 4b6d ldr r3, [pc, #436] @ (8001b44 <manageCiclo+0x538>)
8001990: 881b ldrh r3, [r3, #0]
8001992: b2da uxtb r2, r3
8001994: 4b6c ldr r3, [pc, #432] @ (8001b48 <manageCiclo+0x53c>)
8001996: 881b ldrh r3, [r3, #0]
8001998: b2db uxtb r3, r3
800199a: 210a movs r1, #10
800199c: 9101 str r1, [sp, #4]
800199e: 9300 str r3, [sp, #0]
80019a0: 2300 movs r3, #0
80019a2: 2100 movs r1, #0
80019a4: 2003 movs r0, #3
80019a6: f001 faa3 bl 8002ef0 <ramp>
80019aa: 4603 mov r3, r0
80019ac: 2b00 cmp r3, #0
80019ae: d117 bne.n 80019e0 <manageCiclo+0x3d4>
80019b0: 4b6a ldr r3, [pc, #424] @ (8001b5c <manageCiclo+0x550>)
80019b2: 881b ldrh r3, [r3, #0]
80019b4: b2da uxtb r2, r3
80019b6: 4b64 ldr r3, [pc, #400] @ (8001b48 <manageCiclo+0x53c>)
80019b8: 881b ldrh r3, [r3, #0]
80019ba: b2db uxtb r3, r3
80019bc: 210a movs r1, #10
80019be: 9101 str r1, [sp, #4]
80019c0: 9300 str r3, [sp, #0]
80019c2: 2300 movs r3, #0
80019c4: 2100 movs r1, #0
80019c6: 2001 movs r0, #1
80019c8: f001 fa92 bl 8002ef0 <ramp>
80019cc: 4603 mov r3, r0
80019ce: 2b00 cmp r3, #0
80019d0: d106 bne.n 80019e0 <manageCiclo+0x3d4>
rtCiclo=twap;
80019d2: 4b63 ldr r3, [pc, #396] @ (8001b60 <manageCiclo+0x554>)
80019d4: 881a ldrh r2, [r3, #0]
80019d6: 4b5e ldr r3, [pc, #376] @ (8001b50 <manageCiclo+0x544>)
80019d8: 801a strh r2, [r3, #0]
stCiclo=omapertura10;
80019da: 4b5e ldr r3, [pc, #376] @ (8001b54 <manageCiclo+0x548>)
80019dc: 220a movs r2, #10
80019de: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
80019e0: 4b5d ldr r3, [pc, #372] @ (8001b58 <manageCiclo+0x54c>)
80019e2: 781b ldrb r3, [r3, #0]
80019e4: f003 0302 and.w r3, r3, #2
80019e8: 2b00 cmp r3, #0
80019ea: f000 836e beq.w 80020ca <manageCiclo+0xabe>
80019ee: 4b59 ldr r3, [pc, #356] @ (8001b54 <manageCiclo+0x548>)
80019f0: 220f movs r2, #15
80019f2: 701a strb r2, [r3, #0]
break;
80019f4: e369 b.n 80020ca <manageCiclo+0xabe>
case omapertura10:
if(rtCiclo==0){
80019f6: 4b56 ldr r3, [pc, #344] @ (8001b50 <manageCiclo+0x544>)
80019f8: 881b ldrh r3, [r3, #0]
80019fa: b29b uxth r3, r3
80019fc: 2b00 cmp r3, #0
80019fe: d113 bne.n 8001a28 <manageCiclo+0x41c>
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPINIT);
8001a00: 4b4f ldr r3, [pc, #316] @ (8001b40 <manageCiclo+0x534>)
8001a02: 88db ldrh r3, [r3, #6]
8001a04: b2da uxtb r2, r3
8001a06: 4b57 ldr r3, [pc, #348] @ (8001b64 <manageCiclo+0x558>)
8001a08: 881b ldrh r3, [r3, #0]
8001a0a: b2d9 uxtb r1, r3
8001a0c: 4b4e ldr r3, [pc, #312] @ (8001b48 <manageCiclo+0x53c>)
8001a0e: 881b ldrh r3, [r3, #0]
8001a10: b2db uxtb r3, r3
8001a12: 2000 movs r0, #0
8001a14: 9001 str r0, [sp, #4]
8001a16: 9300 str r3, [sp, #0]
8001a18: 460b mov r3, r1
8001a1a: 2100 movs r1, #0
8001a1c: 2004 movs r0, #4
8001a1e: f001 fa67 bl 8002ef0 <ramp>
stCiclo=omapertura11;
8001a22: 4b4c ldr r3, [pc, #304] @ (8001b54 <manageCiclo+0x548>)
8001a24: 220b movs r2, #11
8001a26: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001a28: 4b4b ldr r3, [pc, #300] @ (8001b58 <manageCiclo+0x54c>)
8001a2a: 781b ldrb r3, [r3, #0]
8001a2c: f003 0302 and.w r3, r3, #2
8001a30: 2b00 cmp r3, #0
8001a32: f000 834c beq.w 80020ce <manageCiclo+0xac2>
8001a36: 4b47 ldr r3, [pc, #284] @ (8001b54 <manageCiclo+0x548>)
8001a38: 220f movs r2, #15
8001a3a: 701a strb r2, [r3, #0]
break;
8001a3c: e347 b.n 80020ce <manageCiclo+0xac2>
case omapertura11:
if(ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){
8001a3e: 4b40 ldr r3, [pc, #256] @ (8001b40 <manageCiclo+0x534>)
8001a40: 88db ldrh r3, [r3, #6]
8001a42: b2da uxtb r2, r3
8001a44: 4b47 ldr r3, [pc, #284] @ (8001b64 <manageCiclo+0x558>)
8001a46: 881b ldrh r3, [r3, #0]
8001a48: b2d9 uxtb r1, r3
8001a4a: 4b3f ldr r3, [pc, #252] @ (8001b48 <manageCiclo+0x53c>)
8001a4c: 881b ldrh r3, [r3, #0]
8001a4e: b2db uxtb r3, r3
8001a50: 200a movs r0, #10
8001a52: 9001 str r0, [sp, #4]
8001a54: 9300 str r3, [sp, #0]
8001a56: 460b mov r3, r1
8001a58: 2100 movs r1, #0
8001a5a: 2004 movs r0, #4
8001a5c: f001 fa48 bl 8002ef0 <ramp>
8001a60: 4603 mov r3, r0
8001a62: 2b00 cmp r3, #0
8001a64: d106 bne.n 8001a74 <manageCiclo+0x468>
rtCiclo=t4ap;
8001a66: 4b40 ldr r3, [pc, #256] @ (8001b68 <manageCiclo+0x55c>)
8001a68: 881a ldrh r2, [r3, #0]
8001a6a: 4b39 ldr r3, [pc, #228] @ (8001b50 <manageCiclo+0x544>)
8001a6c: 801a strh r2, [r3, #0]
stCiclo=omapertura12;
8001a6e: 4b39 ldr r3, [pc, #228] @ (8001b54 <manageCiclo+0x548>)
8001a70: 220c movs r2, #12
8001a72: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001a74: 4b38 ldr r3, [pc, #224] @ (8001b58 <manageCiclo+0x54c>)
8001a76: 781b ldrb r3, [r3, #0]
8001a78: f003 0302 and.w r3, r3, #2
8001a7c: 2b00 cmp r3, #0
8001a7e: f000 8328 beq.w 80020d2 <manageCiclo+0xac6>
8001a82: 4b34 ldr r3, [pc, #208] @ (8001b54 <manageCiclo+0x548>)
8001a84: 220f movs r2, #15
8001a86: 701a strb r2, [r3, #0]
break;
8001a88: e323 b.n 80020d2 <manageCiclo+0xac6>
case omapertura12:
if(rtCiclo==0){
8001a8a: 4b31 ldr r3, [pc, #196] @ (8001b50 <manageCiclo+0x544>)
8001a8c: 881b ldrh r3, [r3, #0]
8001a8e: b29b uxth r3, r3
8001a90: 2b00 cmp r3, #0
8001a92: d110 bne.n 8001ab6 <manageCiclo+0x4aa>
(void)ramp(M4,FW,m4pwmap,0,tramp,RAMPINIT);
8001a94: 4b33 ldr r3, [pc, #204] @ (8001b64 <manageCiclo+0x558>)
8001a96: 881b ldrh r3, [r3, #0]
8001a98: b2da uxtb r2, r3
8001a9a: 4b2b ldr r3, [pc, #172] @ (8001b48 <manageCiclo+0x53c>)
8001a9c: 881b ldrh r3, [r3, #0]
8001a9e: b2db uxtb r3, r3
8001aa0: 2100 movs r1, #0
8001aa2: 9101 str r1, [sp, #4]
8001aa4: 9300 str r3, [sp, #0]
8001aa6: 2300 movs r3, #0
8001aa8: 2100 movs r1, #0
8001aaa: 2004 movs r0, #4
8001aac: f001 fa20 bl 8002ef0 <ramp>
stCiclo=omapertura13;
8001ab0: 4b28 ldr r3, [pc, #160] @ (8001b54 <manageCiclo+0x548>)
8001ab2: 220d movs r2, #13
8001ab4: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001ab6: 4b28 ldr r3, [pc, #160] @ (8001b58 <manageCiclo+0x54c>)
8001ab8: 781b ldrb r3, [r3, #0]
8001aba: f003 0302 and.w r3, r3, #2
8001abe: 2b00 cmp r3, #0
8001ac0: f000 8309 beq.w 80020d6 <manageCiclo+0xaca>
8001ac4: 4b23 ldr r3, [pc, #140] @ (8001b54 <manageCiclo+0x548>)
8001ac6: 220f movs r2, #15
8001ac8: 701a strb r2, [r3, #0]
break;
8001aca: e304 b.n 80020d6 <manageCiclo+0xaca>
case omapertura13:
if(ramp(M4,FW,m4pwmap,0,tramp,RAMPRUN)==DONE){
8001acc: 4b25 ldr r3, [pc, #148] @ (8001b64 <manageCiclo+0x558>)
8001ace: 881b ldrh r3, [r3, #0]
8001ad0: b2da uxtb r2, r3
8001ad2: 4b1d ldr r3, [pc, #116] @ (8001b48 <manageCiclo+0x53c>)
8001ad4: 881b ldrh r3, [r3, #0]
8001ad6: b2db uxtb r3, r3
8001ad8: 210a movs r1, #10
8001ada: 9101 str r1, [sp, #4]
8001adc: 9300 str r3, [sp, #0]
8001ade: 2300 movs r3, #0
8001ae0: 2100 movs r1, #0
8001ae2: 2004 movs r0, #4
8001ae4: f001 fa04 bl 8002ef0 <ramp>
8001ae8: 4603 mov r3, r0
8001aea: 2b00 cmp r3, #0
8001aec: d106 bne.n 8001afc <manageCiclo+0x4f0>
rtCiclo=twap;
8001aee: 4b1c ldr r3, [pc, #112] @ (8001b60 <manageCiclo+0x554>)
8001af0: 881a ldrh r2, [r3, #0]
8001af2: 4b17 ldr r3, [pc, #92] @ (8001b50 <manageCiclo+0x544>)
8001af4: 801a strh r2, [r3, #0]
stCiclo=omapertura14;
8001af6: 4b17 ldr r3, [pc, #92] @ (8001b54 <manageCiclo+0x548>)
8001af8: 220e movs r2, #14
8001afa: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001afc: 4b16 ldr r3, [pc, #88] @ (8001b58 <manageCiclo+0x54c>)
8001afe: 781b ldrb r3, [r3, #0]
8001b00: f003 0302 and.w r3, r3, #2
8001b04: 2b00 cmp r3, #0
8001b06: f000 82ff beq.w 8002108 <manageCiclo+0xafc>
8001b0a: 4b12 ldr r3, [pc, #72] @ (8001b54 <manageCiclo+0x548>)
8001b0c: 220f movs r2, #15
8001b0e: 701a strb r2, [r3, #0]
break;
8001b10: e2fa b.n 8002108 <manageCiclo+0xafc>
case omapertura14:
if(rtCiclo==0){
8001b12: 4b0f ldr r3, [pc, #60] @ (8001b50 <manageCiclo+0x544>)
8001b14: 881b ldrh r3, [r3, #0]
8001b16: b29b uxth r3, r3
8001b18: 2b00 cmp r3, #0
8001b1a: d105 bne.n 8001b28 <manageCiclo+0x51c>
stBuz=bzoff;
8001b1c: 4b13 ldr r3, [pc, #76] @ (8001b6c <manageCiclo+0x560>)
8001b1e: 2200 movs r2, #0
8001b20: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8001b22: 4b0c ldr r3, [pc, #48] @ (8001b54 <manageCiclo+0x548>)
8001b24: 2210 movs r2, #16
8001b26: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001b28: 4b0b ldr r3, [pc, #44] @ (8001b58 <manageCiclo+0x54c>)
8001b2a: 781b ldrb r3, [r3, #0]
8001b2c: f003 0302 and.w r3, r3, #2
8001b30: 2b00 cmp r3, #0
8001b32: f000 82eb beq.w 800210c <manageCiclo+0xb00>
8001b36: 4b07 ldr r3, [pc, #28] @ (8001b54 <manageCiclo+0x548>)
8001b38: 220f movs r2, #15
8001b3a: 701a strb r2, [r3, #0]
break;
8001b3c: e2e6 b.n 800210c <manageCiclo+0xb00>
8001b3e: bf00 nop
8001b40: 20000414 .word 0x20000414
8001b44: 200003f6 .word 0x200003f6
8001b48: 20000412 .word 0x20000412
8001b4c: 20000402 .word 0x20000402
8001b50: 200003ec .word 0x200003ec
8001b54: 2000041d .word 0x2000041d
8001b58: 2000041c .word 0x2000041c
8001b5c: 200003ee .word 0x200003ee
8001b60: 20000406 .word 0x20000406
8001b64: 200003fa .word 0x200003fa
8001b68: 20000404 .word 0x20000404
8001b6c: 2000041e .word 0x2000041e
case omstopapertura:
SetMotPerc(M1,FW,0);
8001b70: 2200 movs r2, #0
8001b72: 2100 movs r1, #0
8001b74: 2001 movs r0, #1
8001b76: f001 f83b bl 8002bf0 <SetMotPerc>
SetMotPerc(M2,FW,0);
8001b7a: 2200 movs r2, #0
8001b7c: 2100 movs r1, #0
8001b7e: 2002 movs r0, #2
8001b80: f001 f836 bl 8002bf0 <SetMotPerc>
SetMotPerc(M3,FW,0);
8001b84: 2200 movs r2, #0
8001b86: 2100 movs r1, #0
8001b88: 2003 movs r0, #3
8001b8a: f001 f831 bl 8002bf0 <SetMotPerc>
SetMotPerc(M4,FW,0);
8001b8e: 2200 movs r2, #0
8001b90: 2100 movs r1, #0
8001b92: 2004 movs r0, #4
8001b94: f001 f82c bl 8002bf0 <SetMotPerc>
stBuz=bzoff;
8001b98: 4b9e ldr r3, [pc, #632] @ (8001e14 <manageCiclo+0x808>)
8001b9a: 2200 movs r2, #0
8001b9c: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
8001b9e: 4b9e ldr r3, [pc, #632] @ (8001e18 <manageCiclo+0x80c>)
8001ba0: 2200 movs r2, #0
8001ba2: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
8001ba4: 4b9d ldr r3, [pc, #628] @ (8001e1c <manageCiclo+0x810>)
8001ba6: 781b ldrb r3, [r3, #0]
8001ba8: f023 0302 bic.w r3, r3, #2
8001bac: b2da uxtb r2, r3
8001bae: 4b9b ldr r3, [pc, #620] @ (8001e1c <manageCiclo+0x810>)
8001bb0: 701a strb r2, [r3, #0]
break;
8001bb2: e2ca b.n 800214a <manageCiclo+0xb3e>
case omaperto:
if(stPulsanti&P1START){
8001bb4: 4b99 ldr r3, [pc, #612] @ (8001e1c <manageCiclo+0x810>)
8001bb6: 781b ldrb r3, [r3, #0]
8001bb8: f003 0301 and.w r3, r3, #1
8001bbc: 2b00 cmp r3, #0
8001bbe: d016 beq.n 8001bee <manageCiclo+0x5e2>
stBuz=bzmoving;
8001bc0: 4b94 ldr r3, [pc, #592] @ (8001e14 <manageCiclo+0x808>)
8001bc2: 2201 movs r2, #1
8001bc4: 701a strb r2, [r3, #0]
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
8001bc6: 4b96 ldr r3, [pc, #600] @ (8001e20 <manageCiclo+0x814>)
8001bc8: 881b ldrh r3, [r3, #0]
8001bca: b2da uxtb r2, r3
8001bcc: 4b95 ldr r3, [pc, #596] @ (8001e24 <manageCiclo+0x818>)
8001bce: 881b ldrh r3, [r3, #0]
8001bd0: b2d9 uxtb r1, r3
8001bd2: 4b95 ldr r3, [pc, #596] @ (8001e28 <manageCiclo+0x81c>)
8001bd4: 881b ldrh r3, [r3, #0]
8001bd6: b2db uxtb r3, r3
8001bd8: 2000 movs r0, #0
8001bda: 9001 str r0, [sp, #4]
8001bdc: 9300 str r3, [sp, #0]
8001bde: 460b mov r3, r1
8001be0: 2101 movs r1, #1
8001be2: 2001 movs r0, #1
8001be4: f001 f984 bl 8002ef0 <ramp>
stCiclo=omchiusura1;
8001be8: 4b8b ldr r3, [pc, #556] @ (8001e18 <manageCiclo+0x80c>)
8001bea: 2211 movs r2, #17
8001bec: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001bee: 4b8b ldr r3, [pc, #556] @ (8001e1c <manageCiclo+0x810>)
8001bf0: 781b ldrb r3, [r3, #0]
8001bf2: f003 0302 and.w r3, r3, #2
8001bf6: 2b00 cmp r3, #0
8001bf8: f000 828a beq.w 8002110 <manageCiclo+0xb04>
8001bfc: 4b86 ldr r3, [pc, #536] @ (8001e18 <manageCiclo+0x80c>)
8001bfe: 221f movs r2, #31
8001c00: 701a strb r2, [r3, #0]
break;
8001c02: e285 b.n 8002110 <manageCiclo+0xb04>
case omchiusura1:
if(ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){
8001c04: 4b86 ldr r3, [pc, #536] @ (8001e20 <manageCiclo+0x814>)
8001c06: 881b ldrh r3, [r3, #0]
8001c08: b2da uxtb r2, r3
8001c0a: 4b86 ldr r3, [pc, #536] @ (8001e24 <manageCiclo+0x818>)
8001c0c: 881b ldrh r3, [r3, #0]
8001c0e: b2d9 uxtb r1, r3
8001c10: 4b85 ldr r3, [pc, #532] @ (8001e28 <manageCiclo+0x81c>)
8001c12: 881b ldrh r3, [r3, #0]
8001c14: b2db uxtb r3, r3
8001c16: 200a movs r0, #10
8001c18: 9001 str r0, [sp, #4]
8001c1a: 9300 str r3, [sp, #0]
8001c1c: 460b mov r3, r1
8001c1e: 2101 movs r1, #1
8001c20: 2001 movs r0, #1
8001c22: f001 f965 bl 8002ef0 <ramp>
8001c26: 4603 mov r3, r0
8001c28: 2b00 cmp r3, #0
8001c2a: d106 bne.n 8001c3a <manageCiclo+0x62e>
rtCiclo=t4ch;
8001c2c: 4b7f ldr r3, [pc, #508] @ (8001e2c <manageCiclo+0x820>)
8001c2e: 881a ldrh r2, [r3, #0]
8001c30: 4b7f ldr r3, [pc, #508] @ (8001e30 <manageCiclo+0x824>)
8001c32: 801a strh r2, [r3, #0]
stCiclo=omchiusura2;
8001c34: 4b78 ldr r3, [pc, #480] @ (8001e18 <manageCiclo+0x80c>)
8001c36: 2212 movs r2, #18
8001c38: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001c3a: 4b78 ldr r3, [pc, #480] @ (8001e1c <manageCiclo+0x810>)
8001c3c: 781b ldrb r3, [r3, #0]
8001c3e: f003 0302 and.w r3, r3, #2
8001c42: 2b00 cmp r3, #0
8001c44: f000 8266 beq.w 8002114 <manageCiclo+0xb08>
8001c48: 4b73 ldr r3, [pc, #460] @ (8001e18 <manageCiclo+0x80c>)
8001c4a: 221f movs r2, #31
8001c4c: 701a strb r2, [r3, #0]
break;
8001c4e: e261 b.n 8002114 <manageCiclo+0xb08>
case omchiusura2:
if(rtCiclo==0){
8001c50: 4b77 ldr r3, [pc, #476] @ (8001e30 <manageCiclo+0x824>)
8001c52: 881b ldrh r3, [r3, #0]
8001c54: b29b uxth r3, r3
8001c56: 2b00 cmp r3, #0
8001c58: d113 bne.n 8001c82 <manageCiclo+0x676>
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPINIT);
8001c5a: 4b71 ldr r3, [pc, #452] @ (8001e20 <manageCiclo+0x814>)
8001c5c: 889b ldrh r3, [r3, #4]
8001c5e: b2da uxtb r2, r3
8001c60: 4b74 ldr r3, [pc, #464] @ (8001e34 <manageCiclo+0x828>)
8001c62: 881b ldrh r3, [r3, #0]
8001c64: b2d9 uxtb r1, r3
8001c66: 4b70 ldr r3, [pc, #448] @ (8001e28 <manageCiclo+0x81c>)
8001c68: 881b ldrh r3, [r3, #0]
8001c6a: b2db uxtb r3, r3
8001c6c: 2000 movs r0, #0
8001c6e: 9001 str r0, [sp, #4]
8001c70: 9300 str r3, [sp, #0]
8001c72: 460b mov r3, r1
8001c74: 2101 movs r1, #1
8001c76: 2003 movs r0, #3
8001c78: f001 f93a bl 8002ef0 <ramp>
stCiclo=omchiusura3;
8001c7c: 4b66 ldr r3, [pc, #408] @ (8001e18 <manageCiclo+0x80c>)
8001c7e: 2213 movs r2, #19
8001c80: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001c82: 4b66 ldr r3, [pc, #408] @ (8001e1c <manageCiclo+0x810>)
8001c84: 781b ldrb r3, [r3, #0]
8001c86: f003 0302 and.w r3, r3, #2
8001c8a: 2b00 cmp r3, #0
8001c8c: f000 8244 beq.w 8002118 <manageCiclo+0xb0c>
8001c90: 4b61 ldr r3, [pc, #388] @ (8001e18 <manageCiclo+0x80c>)
8001c92: 221f movs r2, #31
8001c94: 701a strb r2, [r3, #0]
break;
8001c96: e23f b.n 8002118 <manageCiclo+0xb0c>
case omchiusura3:
if(ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){
8001c98: 4b61 ldr r3, [pc, #388] @ (8001e20 <manageCiclo+0x814>)
8001c9a: 889b ldrh r3, [r3, #4]
8001c9c: b2da uxtb r2, r3
8001c9e: 4b65 ldr r3, [pc, #404] @ (8001e34 <manageCiclo+0x828>)
8001ca0: 881b ldrh r3, [r3, #0]
8001ca2: b2d9 uxtb r1, r3
8001ca4: 4b60 ldr r3, [pc, #384] @ (8001e28 <manageCiclo+0x81c>)
8001ca6: 881b ldrh r3, [r3, #0]
8001ca8: b2db uxtb r3, r3
8001caa: 200a movs r0, #10
8001cac: 9001 str r0, [sp, #4]
8001cae: 9300 str r3, [sp, #0]
8001cb0: 460b mov r3, r1
8001cb2: 2101 movs r1, #1
8001cb4: 2003 movs r0, #3
8001cb6: f001 f91b bl 8002ef0 <ramp>
8001cba: 4603 mov r3, r0
8001cbc: 2b00 cmp r3, #0
8001cbe: d106 bne.n 8001cce <manageCiclo+0x6c2>
rtCiclo=t1ch;
8001cc0: 4b5d ldr r3, [pc, #372] @ (8001e38 <manageCiclo+0x82c>)
8001cc2: 881a ldrh r2, [r3, #0]
8001cc4: 4b5a ldr r3, [pc, #360] @ (8001e30 <manageCiclo+0x824>)
8001cc6: 801a strh r2, [r3, #0]
stCiclo=omchiusura4;
8001cc8: 4b53 ldr r3, [pc, #332] @ (8001e18 <manageCiclo+0x80c>)
8001cca: 2214 movs r2, #20
8001ccc: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001cce: 4b53 ldr r3, [pc, #332] @ (8001e1c <manageCiclo+0x810>)
8001cd0: 781b ldrb r3, [r3, #0]
8001cd2: f003 0302 and.w r3, r3, #2
8001cd6: 2b00 cmp r3, #0
8001cd8: f000 8220 beq.w 800211c <manageCiclo+0xb10>
8001cdc: 4b4e ldr r3, [pc, #312] @ (8001e18 <manageCiclo+0x80c>)
8001cde: 221f movs r2, #31
8001ce0: 701a strb r2, [r3, #0]
break;
8001ce2: e21b b.n 800211c <manageCiclo+0xb10>
case omchiusura4:
if(rtCiclo==0){
8001ce4: 4b52 ldr r3, [pc, #328] @ (8001e30 <manageCiclo+0x824>)
8001ce6: 881b ldrh r3, [r3, #0]
8001ce8: b29b uxth r3, r3
8001cea: 2b00 cmp r3, #0
8001cec: d11e bne.n 8001d2c <manageCiclo+0x720>
(void)ramp(M3,BW,m3pwmch,0,tramp,RAMPINIT);
8001cee: 4b51 ldr r3, [pc, #324] @ (8001e34 <manageCiclo+0x828>)
8001cf0: 881b ldrh r3, [r3, #0]
8001cf2: b2da uxtb r2, r3
8001cf4: 4b4c ldr r3, [pc, #304] @ (8001e28 <manageCiclo+0x81c>)
8001cf6: 881b ldrh r3, [r3, #0]
8001cf8: b2db uxtb r3, r3
8001cfa: 2100 movs r1, #0
8001cfc: 9101 str r1, [sp, #4]
8001cfe: 9300 str r3, [sp, #0]
8001d00: 2300 movs r3, #0
8001d02: 2101 movs r1, #1
8001d04: 2003 movs r0, #3
8001d06: f001 f8f3 bl 8002ef0 <ramp>
(void)ramp(M1,BW,m1pwmch,0,tramp,RAMPINIT);
8001d0a: 4b46 ldr r3, [pc, #280] @ (8001e24 <manageCiclo+0x818>)
8001d0c: 881b ldrh r3, [r3, #0]
8001d0e: b2da uxtb r2, r3
8001d10: 4b45 ldr r3, [pc, #276] @ (8001e28 <manageCiclo+0x81c>)
8001d12: 881b ldrh r3, [r3, #0]
8001d14: b2db uxtb r3, r3
8001d16: 2100 movs r1, #0
8001d18: 9101 str r1, [sp, #4]
8001d1a: 9300 str r3, [sp, #0]
8001d1c: 2300 movs r3, #0
8001d1e: 2101 movs r1, #1
8001d20: 2001 movs r0, #1
8001d22: f001 f8e5 bl 8002ef0 <ramp>
stCiclo=omchiusura5;
8001d26: 4b3c ldr r3, [pc, #240] @ (8001e18 <manageCiclo+0x80c>)
8001d28: 2215 movs r2, #21
8001d2a: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001d2c: 4b3b ldr r3, [pc, #236] @ (8001e1c <manageCiclo+0x810>)
8001d2e: 781b ldrb r3, [r3, #0]
8001d30: f003 0302 and.w r3, r3, #2
8001d34: 2b00 cmp r3, #0
8001d36: f000 81f3 beq.w 8002120 <manageCiclo+0xb14>
8001d3a: 4b37 ldr r3, [pc, #220] @ (8001e18 <manageCiclo+0x80c>)
8001d3c: 221f movs r2, #31
8001d3e: 701a strb r2, [r3, #0]
break;
8001d40: e1ee b.n 8002120 <manageCiclo+0xb14>
case omchiusura5:
if((ramp(M3,BW,m3pwmch,0,tramp,RAMPRUN)==DONE)&&(ramp(M1,BW,m1pwmch,0,tramp,RAMPRUN)==DONE)){
8001d42: 4b3c ldr r3, [pc, #240] @ (8001e34 <manageCiclo+0x828>)
8001d44: 881b ldrh r3, [r3, #0]
8001d46: b2da uxtb r2, r3
8001d48: 4b37 ldr r3, [pc, #220] @ (8001e28 <manageCiclo+0x81c>)
8001d4a: 881b ldrh r3, [r3, #0]
8001d4c: b2db uxtb r3, r3
8001d4e: 210a movs r1, #10
8001d50: 9101 str r1, [sp, #4]
8001d52: 9300 str r3, [sp, #0]
8001d54: 2300 movs r3, #0
8001d56: 2101 movs r1, #1
8001d58: 2003 movs r0, #3
8001d5a: f001 f8c9 bl 8002ef0 <ramp>
8001d5e: 4603 mov r3, r0
8001d60: 2b00 cmp r3, #0
8001d62: d117 bne.n 8001d94 <manageCiclo+0x788>
8001d64: 4b2f ldr r3, [pc, #188] @ (8001e24 <manageCiclo+0x818>)
8001d66: 881b ldrh r3, [r3, #0]
8001d68: b2da uxtb r2, r3
8001d6a: 4b2f ldr r3, [pc, #188] @ (8001e28 <manageCiclo+0x81c>)
8001d6c: 881b ldrh r3, [r3, #0]
8001d6e: b2db uxtb r3, r3
8001d70: 210a movs r1, #10
8001d72: 9101 str r1, [sp, #4]
8001d74: 9300 str r3, [sp, #0]
8001d76: 2300 movs r3, #0
8001d78: 2101 movs r1, #1
8001d7a: 2001 movs r0, #1
8001d7c: f001 f8b8 bl 8002ef0 <ramp>
8001d80: 4603 mov r3, r0
8001d82: 2b00 cmp r3, #0
8001d84: d106 bne.n 8001d94 <manageCiclo+0x788>
rtCiclo=twch;
8001d86: 4b2d ldr r3, [pc, #180] @ (8001e3c <manageCiclo+0x830>)
8001d88: 881a ldrh r2, [r3, #0]
8001d8a: 4b29 ldr r3, [pc, #164] @ (8001e30 <manageCiclo+0x824>)
8001d8c: 801a strh r2, [r3, #0]
stCiclo=omchiusura6;
8001d8e: 4b22 ldr r3, [pc, #136] @ (8001e18 <manageCiclo+0x80c>)
8001d90: 2216 movs r2, #22
8001d92: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001d94: 4b21 ldr r3, [pc, #132] @ (8001e1c <manageCiclo+0x810>)
8001d96: 781b ldrb r3, [r3, #0]
8001d98: f003 0302 and.w r3, r3, #2
8001d9c: 2b00 cmp r3, #0
8001d9e: f000 81c1 beq.w 8002124 <manageCiclo+0xb18>
8001da2: 4b1d ldr r3, [pc, #116] @ (8001e18 <manageCiclo+0x80c>)
8001da4: 221f movs r2, #31
8001da6: 701a strb r2, [r3, #0]
break;
8001da8: e1bc b.n 8002124 <manageCiclo+0xb18>
case omchiusura6:
if(rtCiclo==0){
8001daa: 4b21 ldr r3, [pc, #132] @ (8001e30 <manageCiclo+0x824>)
8001dac: 881b ldrh r3, [r3, #0]
8001dae: b29b uxth r3, r3
8001db0: 2b00 cmp r3, #0
8001db2: d124 bne.n 8001dfe <manageCiclo+0x7f2>
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT);
8001db4: 4b1a ldr r3, [pc, #104] @ (8001e20 <manageCiclo+0x814>)
8001db6: 885b ldrh r3, [r3, #2]
8001db8: b2da uxtb r2, r3
8001dba: 4b21 ldr r3, [pc, #132] @ (8001e40 <manageCiclo+0x834>)
8001dbc: 881b ldrh r3, [r3, #0]
8001dbe: b2d9 uxtb r1, r3
8001dc0: 4b19 ldr r3, [pc, #100] @ (8001e28 <manageCiclo+0x81c>)
8001dc2: 881b ldrh r3, [r3, #0]
8001dc4: b2db uxtb r3, r3
8001dc6: 2000 movs r0, #0
8001dc8: 9001 str r0, [sp, #4]
8001dca: 9300 str r3, [sp, #0]
8001dcc: 460b mov r3, r1
8001dce: 2100 movs r1, #0
8001dd0: 2002 movs r0, #2
8001dd2: f001 f88d bl 8002ef0 <ramp>
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT);
8001dd6: 4b12 ldr r3, [pc, #72] @ (8001e20 <manageCiclo+0x814>)
8001dd8: 88db ldrh r3, [r3, #6]
8001dda: b2da uxtb r2, r3
8001ddc: 4b19 ldr r3, [pc, #100] @ (8001e44 <manageCiclo+0x838>)
8001dde: 881b ldrh r3, [r3, #0]
8001de0: b2d9 uxtb r1, r3
8001de2: 4b11 ldr r3, [pc, #68] @ (8001e28 <manageCiclo+0x81c>)
8001de4: 881b ldrh r3, [r3, #0]
8001de6: b2db uxtb r3, r3
8001de8: 2000 movs r0, #0
8001dea: 9001 str r0, [sp, #4]
8001dec: 9300 str r3, [sp, #0]
8001dee: 460b mov r3, r1
8001df0: 2101 movs r1, #1
8001df2: 2004 movs r0, #4
8001df4: f001 f87c bl 8002ef0 <ramp>
stCiclo=omchiusura7;
8001df8: 4b07 ldr r3, [pc, #28] @ (8001e18 <manageCiclo+0x80c>)
8001dfa: 2217 movs r2, #23
8001dfc: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001dfe: 4b07 ldr r3, [pc, #28] @ (8001e1c <manageCiclo+0x810>)
8001e00: 781b ldrb r3, [r3, #0]
8001e02: f003 0302 and.w r3, r3, #2
8001e06: 2b00 cmp r3, #0
8001e08: f000 818e beq.w 8002128 <manageCiclo+0xb1c>
8001e0c: 4b02 ldr r3, [pc, #8] @ (8001e18 <manageCiclo+0x80c>)
8001e0e: 221f movs r2, #31
8001e10: 701a strb r2, [r3, #0]
break;
8001e12: e189 b.n 8002128 <manageCiclo+0xb1c>
8001e14: 2000041e .word 0x2000041e
8001e18: 2000041d .word 0x2000041d
8001e1c: 2000041c .word 0x2000041c
8001e20: 20000414 .word 0x20000414
8001e24: 200003f0 .word 0x200003f0
8001e28: 20000412 .word 0x20000412
8001e2c: 2000040e .word 0x2000040e
8001e30: 200003ec .word 0x200003ec
8001e34: 200003f8 .word 0x200003f8
8001e38: 20000408 .word 0x20000408
8001e3c: 20000410 .word 0x20000410
8001e40: 200003f4 .word 0x200003f4
8001e44: 200003fc .word 0x200003fc
case omchiusura7:
if((ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE)&&(ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE)){
8001e48: 4ba4 ldr r3, [pc, #656] @ (80020dc <manageCiclo+0xad0>)
8001e4a: 885b ldrh r3, [r3, #2]
8001e4c: b2da uxtb r2, r3
8001e4e: 4ba4 ldr r3, [pc, #656] @ (80020e0 <manageCiclo+0xad4>)
8001e50: 881b ldrh r3, [r3, #0]
8001e52: b2d9 uxtb r1, r3
8001e54: 4ba3 ldr r3, [pc, #652] @ (80020e4 <manageCiclo+0xad8>)
8001e56: 881b ldrh r3, [r3, #0]
8001e58: b2db uxtb r3, r3
8001e5a: 200a movs r0, #10
8001e5c: 9001 str r0, [sp, #4]
8001e5e: 9300 str r3, [sp, #0]
8001e60: 460b mov r3, r1
8001e62: 2100 movs r1, #0
8001e64: 2002 movs r0, #2
8001e66: f001 f843 bl 8002ef0 <ramp>
8001e6a: 4603 mov r3, r0
8001e6c: 2b00 cmp r3, #0
8001e6e: d11a bne.n 8001ea6 <manageCiclo+0x89a>
8001e70: 4b9a ldr r3, [pc, #616] @ (80020dc <manageCiclo+0xad0>)
8001e72: 88db ldrh r3, [r3, #6]
8001e74: b2da uxtb r2, r3
8001e76: 4b9c ldr r3, [pc, #624] @ (80020e8 <manageCiclo+0xadc>)
8001e78: 881b ldrh r3, [r3, #0]
8001e7a: b2d9 uxtb r1, r3
8001e7c: 4b99 ldr r3, [pc, #612] @ (80020e4 <manageCiclo+0xad8>)
8001e7e: 881b ldrh r3, [r3, #0]
8001e80: b2db uxtb r3, r3
8001e82: 200a movs r0, #10
8001e84: 9001 str r0, [sp, #4]
8001e86: 9300 str r3, [sp, #0]
8001e88: 460b mov r3, r1
8001e8a: 2101 movs r1, #1
8001e8c: 2004 movs r0, #4
8001e8e: f001 f82f bl 8002ef0 <ramp>
8001e92: 4603 mov r3, r0
8001e94: 2b00 cmp r3, #0
8001e96: d106 bne.n 8001ea6 <manageCiclo+0x89a>
rtCiclo=t3ch;
8001e98: 4b94 ldr r3, [pc, #592] @ (80020ec <manageCiclo+0xae0>)
8001e9a: 881a ldrh r2, [r3, #0]
8001e9c: 4b94 ldr r3, [pc, #592] @ (80020f0 <manageCiclo+0xae4>)
8001e9e: 801a strh r2, [r3, #0]
stCiclo=omchiusura8;
8001ea0: 4b94 ldr r3, [pc, #592] @ (80020f4 <manageCiclo+0xae8>)
8001ea2: 2218 movs r2, #24
8001ea4: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001ea6: 4b94 ldr r3, [pc, #592] @ (80020f8 <manageCiclo+0xaec>)
8001ea8: 781b ldrb r3, [r3, #0]
8001eaa: f003 0302 and.w r3, r3, #2
8001eae: 2b00 cmp r3, #0
8001eb0: f000 813c beq.w 800212c <manageCiclo+0xb20>
8001eb4: 4b8f ldr r3, [pc, #572] @ (80020f4 <manageCiclo+0xae8>)
8001eb6: 221f movs r2, #31
8001eb8: 701a strb r2, [r3, #0]
break;
8001eba: e137 b.n 800212c <manageCiclo+0xb20>
case omchiusura8:
if(rtCiclo==0){
8001ebc: 4b8c ldr r3, [pc, #560] @ (80020f0 <manageCiclo+0xae4>)
8001ebe: 881b ldrh r3, [r3, #0]
8001ec0: b29b uxth r3, r3
8001ec2: 2b00 cmp r3, #0
8001ec4: d110 bne.n 8001ee8 <manageCiclo+0x8dc>
(void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT);
8001ec6: 4b86 ldr r3, [pc, #536] @ (80020e0 <manageCiclo+0xad4>)
8001ec8: 881b ldrh r3, [r3, #0]
8001eca: b2da uxtb r2, r3
8001ecc: 4b85 ldr r3, [pc, #532] @ (80020e4 <manageCiclo+0xad8>)
8001ece: 881b ldrh r3, [r3, #0]
8001ed0: b2db uxtb r3, r3
8001ed2: 2100 movs r1, #0
8001ed4: 9101 str r1, [sp, #4]
8001ed6: 9300 str r3, [sp, #0]
8001ed8: 2300 movs r3, #0
8001eda: 2100 movs r1, #0
8001edc: 2002 movs r0, #2
8001ede: f001 f807 bl 8002ef0 <ramp>
stCiclo=omchiusura9;
8001ee2: 4b84 ldr r3, [pc, #528] @ (80020f4 <manageCiclo+0xae8>)
8001ee4: 2219 movs r2, #25
8001ee6: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001ee8: 4b83 ldr r3, [pc, #524] @ (80020f8 <manageCiclo+0xaec>)
8001eea: 781b ldrb r3, [r3, #0]
8001eec: f003 0302 and.w r3, r3, #2
8001ef0: 2b00 cmp r3, #0
8001ef2: f000 811d beq.w 8002130 <manageCiclo+0xb24>
8001ef6: 4b7f ldr r3, [pc, #508] @ (80020f4 <manageCiclo+0xae8>)
8001ef8: 221f movs r2, #31
8001efa: 701a strb r2, [r3, #0]
break;
8001efc: e118 b.n 8002130 <manageCiclo+0xb24>
case omchiusura9:
if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){
8001efe: 4b78 ldr r3, [pc, #480] @ (80020e0 <manageCiclo+0xad4>)
8001f00: 881b ldrh r3, [r3, #0]
8001f02: b2da uxtb r2, r3
8001f04: 4b77 ldr r3, [pc, #476] @ (80020e4 <manageCiclo+0xad8>)
8001f06: 881b ldrh r3, [r3, #0]
8001f08: b2db uxtb r3, r3
8001f0a: 210a movs r1, #10
8001f0c: 9101 str r1, [sp, #4]
8001f0e: 9300 str r3, [sp, #0]
8001f10: 2300 movs r3, #0
8001f12: 2100 movs r1, #0
8001f14: 2002 movs r0, #2
8001f16: f000 ffeb bl 8002ef0 <ramp>
8001f1a: 4603 mov r3, r0
8001f1c: 2b00 cmp r3, #0
8001f1e: d106 bne.n 8001f2e <manageCiclo+0x922>
rtCiclo=t2ch;
8001f20: 4b76 ldr r3, [pc, #472] @ (80020fc <manageCiclo+0xaf0>)
8001f22: 881a ldrh r2, [r3, #0]
8001f24: 4b72 ldr r3, [pc, #456] @ (80020f0 <manageCiclo+0xae4>)
8001f26: 801a strh r2, [r3, #0]
stCiclo=omchiusura10;
8001f28: 4b72 ldr r3, [pc, #456] @ (80020f4 <manageCiclo+0xae8>)
8001f2a: 221a movs r2, #26
8001f2c: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001f2e: 4b72 ldr r3, [pc, #456] @ (80020f8 <manageCiclo+0xaec>)
8001f30: 781b ldrb r3, [r3, #0]
8001f32: f003 0302 and.w r3, r3, #2
8001f36: 2b00 cmp r3, #0
8001f38: f000 80fc beq.w 8002134 <manageCiclo+0xb28>
8001f3c: 4b6d ldr r3, [pc, #436] @ (80020f4 <manageCiclo+0xae8>)
8001f3e: 221f movs r2, #31
8001f40: 701a strb r2, [r3, #0]
break;
8001f42: e0f7 b.n 8002134 <manageCiclo+0xb28>
case omchiusura10:
if(rtCiclo==0){
8001f44: 4b6a ldr r3, [pc, #424] @ (80020f0 <manageCiclo+0xae4>)
8001f46: 881b ldrh r3, [r3, #0]
8001f48: b29b uxth r3, r3
8001f4a: 2b00 cmp r3, #0
8001f4c: d110 bne.n 8001f70 <manageCiclo+0x964>
(void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT);
8001f4e: 4b66 ldr r3, [pc, #408] @ (80020e8 <manageCiclo+0xadc>)
8001f50: 881b ldrh r3, [r3, #0]
8001f52: b2da uxtb r2, r3
8001f54: 4b63 ldr r3, [pc, #396] @ (80020e4 <manageCiclo+0xad8>)
8001f56: 881b ldrh r3, [r3, #0]
8001f58: b2db uxtb r3, r3
8001f5a: 2100 movs r1, #0
8001f5c: 9101 str r1, [sp, #4]
8001f5e: 9300 str r3, [sp, #0]
8001f60: 2300 movs r3, #0
8001f62: 2101 movs r1, #1
8001f64: 2004 movs r0, #4
8001f66: f000 ffc3 bl 8002ef0 <ramp>
stCiclo=omchiusura11;
8001f6a: 4b62 ldr r3, [pc, #392] @ (80020f4 <manageCiclo+0xae8>)
8001f6c: 221b movs r2, #27
8001f6e: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001f70: 4b61 ldr r3, [pc, #388] @ (80020f8 <manageCiclo+0xaec>)
8001f72: 781b ldrb r3, [r3, #0]
8001f74: f003 0302 and.w r3, r3, #2
8001f78: 2b00 cmp r3, #0
8001f7a: f000 80dd beq.w 8002138 <manageCiclo+0xb2c>
8001f7e: 4b5d ldr r3, [pc, #372] @ (80020f4 <manageCiclo+0xae8>)
8001f80: 221f movs r2, #31
8001f82: 701a strb r2, [r3, #0]
break;
8001f84: e0d8 b.n 8002138 <manageCiclo+0xb2c>
case omchiusura11:
if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){
8001f86: 4b58 ldr r3, [pc, #352] @ (80020e8 <manageCiclo+0xadc>)
8001f88: 881b ldrh r3, [r3, #0]
8001f8a: b2da uxtb r2, r3
8001f8c: 4b55 ldr r3, [pc, #340] @ (80020e4 <manageCiclo+0xad8>)
8001f8e: 881b ldrh r3, [r3, #0]
8001f90: b2db uxtb r3, r3
8001f92: 210a movs r1, #10
8001f94: 9101 str r1, [sp, #4]
8001f96: 9300 str r3, [sp, #0]
8001f98: 2300 movs r3, #0
8001f9a: 2101 movs r1, #1
8001f9c: 2004 movs r0, #4
8001f9e: f000 ffa7 bl 8002ef0 <ramp>
8001fa2: 4603 mov r3, r0
8001fa4: 2b00 cmp r3, #0
8001fa6: d106 bne.n 8001fb6 <manageCiclo+0x9aa>
rtCiclo=twch;
8001fa8: 4b55 ldr r3, [pc, #340] @ (8002100 <manageCiclo+0xaf4>)
8001faa: 881a ldrh r2, [r3, #0]
8001fac: 4b50 ldr r3, [pc, #320] @ (80020f0 <manageCiclo+0xae4>)
8001fae: 801a strh r2, [r3, #0]
stCiclo=omchiusura14;
8001fb0: 4b50 ldr r3, [pc, #320] @ (80020f4 <manageCiclo+0xae8>)
8001fb2: 221e movs r2, #30
8001fb4: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001fb6: 4b50 ldr r3, [pc, #320] @ (80020f8 <manageCiclo+0xaec>)
8001fb8: 781b ldrb r3, [r3, #0]
8001fba: f003 0302 and.w r3, r3, #2
8001fbe: 2b00 cmp r3, #0
8001fc0: f000 80bc beq.w 800213c <manageCiclo+0xb30>
8001fc4: 4b4b ldr r3, [pc, #300] @ (80020f4 <manageCiclo+0xae8>)
8001fc6: 221f movs r2, #31
8001fc8: 701a strb r2, [r3, #0]
break;
8001fca: e0b7 b.n 800213c <manageCiclo+0xb30>
case omchiusura12:
if(rtCiclo==0){
8001fcc: 4b48 ldr r3, [pc, #288] @ (80020f0 <manageCiclo+0xae4>)
8001fce: 881b ldrh r3, [r3, #0]
8001fd0: b29b uxth r3, r3
8001fd2: 2b00 cmp r3, #0
8001fd4: d102 bne.n 8001fdc <manageCiclo+0x9d0>
//(void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT);
stCiclo=omchiusura14;
8001fd6: 4b47 ldr r3, [pc, #284] @ (80020f4 <manageCiclo+0xae8>)
8001fd8: 221e movs r2, #30
8001fda: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8001fdc: 4b46 ldr r3, [pc, #280] @ (80020f8 <manageCiclo+0xaec>)
8001fde: 781b ldrb r3, [r3, #0]
8001fe0: f003 0302 and.w r3, r3, #2
8001fe4: 2b00 cmp r3, #0
8001fe6: f000 80ab beq.w 8002140 <manageCiclo+0xb34>
8001fea: 4b42 ldr r3, [pc, #264] @ (80020f4 <manageCiclo+0xae8>)
8001fec: 221f movs r2, #31
8001fee: 701a strb r2, [r3, #0]
break;
8001ff0: e0a6 b.n 8002140 <manageCiclo+0xb34>
case omchiusura13:
if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){
8001ff2: 4b3d ldr r3, [pc, #244] @ (80020e8 <manageCiclo+0xadc>)
8001ff4: 881b ldrh r3, [r3, #0]
8001ff6: b2da uxtb r2, r3
8001ff8: 4b3a ldr r3, [pc, #232] @ (80020e4 <manageCiclo+0xad8>)
8001ffa: 881b ldrh r3, [r3, #0]
8001ffc: b2db uxtb r3, r3
8001ffe: 210a movs r1, #10
8002000: 9101 str r1, [sp, #4]
8002002: 9300 str r3, [sp, #0]
8002004: 2300 movs r3, #0
8002006: 2101 movs r1, #1
8002008: 2004 movs r0, #4
800200a: f000 ff71 bl 8002ef0 <ramp>
800200e: 4603 mov r3, r0
8002010: 2b00 cmp r3, #0
8002012: d106 bne.n 8002022 <manageCiclo+0xa16>
rtCiclo=twch;
8002014: 4b3a ldr r3, [pc, #232] @ (8002100 <manageCiclo+0xaf4>)
8002016: 881a ldrh r2, [r3, #0]
8002018: 4b35 ldr r3, [pc, #212] @ (80020f0 <manageCiclo+0xae4>)
800201a: 801a strh r2, [r3, #0]
stCiclo=omchiusura14;
800201c: 4b35 ldr r3, [pc, #212] @ (80020f4 <manageCiclo+0xae8>)
800201e: 221e movs r2, #30
8002020: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8002022: 4b35 ldr r3, [pc, #212] @ (80020f8 <manageCiclo+0xaec>)
8002024: 781b ldrb r3, [r3, #0]
8002026: f003 0302 and.w r3, r3, #2
800202a: 2b00 cmp r3, #0
800202c: f000 808a beq.w 8002144 <manageCiclo+0xb38>
8002030: 4b30 ldr r3, [pc, #192] @ (80020f4 <manageCiclo+0xae8>)
8002032: 221f movs r2, #31
8002034: 701a strb r2, [r3, #0]
break;
8002036: e085 b.n 8002144 <manageCiclo+0xb38>
case omchiusura14:
if(rtCiclo==0){
8002038: 4b2d ldr r3, [pc, #180] @ (80020f0 <manageCiclo+0xae4>)
800203a: 881b ldrh r3, [r3, #0]
800203c: b29b uxth r3, r3
800203e: 2b00 cmp r3, #0
8002040: d105 bne.n 800204e <manageCiclo+0xa42>
stBuz=bzoff;
8002042: 4b30 ldr r3, [pc, #192] @ (8002104 <manageCiclo+0xaf8>)
8002044: 2200 movs r2, #0
8002046: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
8002048: 4b2a ldr r3, [pc, #168] @ (80020f4 <manageCiclo+0xae8>)
800204a: 2200 movs r2, #0
800204c: 701a strb r2, [r3, #0]
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
800204e: 4b2a ldr r3, [pc, #168] @ (80020f8 <manageCiclo+0xaec>)
8002050: 781b ldrb r3, [r3, #0]
8002052: f003 0302 and.w r3, r3, #2
8002056: 2b00 cmp r3, #0
8002058: d076 beq.n 8002148 <manageCiclo+0xb3c>
800205a: 4b26 ldr r3, [pc, #152] @ (80020f4 <manageCiclo+0xae8>)
800205c: 221f movs r2, #31
800205e: 701a strb r2, [r3, #0]
break;
8002060: e072 b.n 8002148 <manageCiclo+0xb3c>
case omstopchiusura:
SetMotPerc(M1,FW,0);
8002062: 2200 movs r2, #0
8002064: 2100 movs r1, #0
8002066: 2001 movs r0, #1
8002068: f000 fdc2 bl 8002bf0 <SetMotPerc>
SetMotPerc(M2,FW,0);
800206c: 2200 movs r2, #0
800206e: 2100 movs r1, #0
8002070: 2002 movs r0, #2
8002072: f000 fdbd bl 8002bf0 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002076: 2200 movs r2, #0
8002078: 2100 movs r1, #0
800207a: 2003 movs r0, #3
800207c: f000 fdb8 bl 8002bf0 <SetMotPerc>
SetMotPerc(M4,FW,0);
8002080: 2200 movs r2, #0
8002082: 2100 movs r1, #0
8002084: 2004 movs r0, #4
8002086: f000 fdb3 bl 8002bf0 <SetMotPerc>
stBuz=bzoff;
800208a: 4b1e ldr r3, [pc, #120] @ (8002104 <manageCiclo+0xaf8>)
800208c: 2200 movs r2, #0
800208e: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002090: 4b18 ldr r3, [pc, #96] @ (80020f4 <manageCiclo+0xae8>)
8002092: 2210 movs r2, #16
8002094: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
8002096: 4b18 ldr r3, [pc, #96] @ (80020f8 <manageCiclo+0xaec>)
8002098: 781b ldrb r3, [r3, #0]
800209a: f023 0302 bic.w r3, r3, #2
800209e: b2da uxtb r2, r3
80020a0: 4b15 ldr r3, [pc, #84] @ (80020f8 <manageCiclo+0xaec>)
80020a2: 701a strb r2, [r3, #0]
break;
80020a4: e051 b.n 800214a <manageCiclo+0xb3e>
break;
80020a6: bf00 nop
80020a8: e04f b.n 800214a <manageCiclo+0xb3e>
break;
80020aa: bf00 nop
80020ac: e04d b.n 800214a <manageCiclo+0xb3e>
break;
80020ae: bf00 nop
80020b0: e04b b.n 800214a <manageCiclo+0xb3e>
break;
80020b2: bf00 nop
80020b4: e049 b.n 800214a <manageCiclo+0xb3e>
break;
80020b6: bf00 nop
80020b8: e047 b.n 800214a <manageCiclo+0xb3e>
break;
80020ba: bf00 nop
80020bc: e045 b.n 800214a <manageCiclo+0xb3e>
break;
80020be: bf00 nop
80020c0: e043 b.n 800214a <manageCiclo+0xb3e>
break;
80020c2: bf00 nop
80020c4: e041 b.n 800214a <manageCiclo+0xb3e>
break;
80020c6: bf00 nop
80020c8: e03f b.n 800214a <manageCiclo+0xb3e>
break;
80020ca: bf00 nop
80020cc: e03d b.n 800214a <manageCiclo+0xb3e>
break;
80020ce: bf00 nop
80020d0: e03b b.n 800214a <manageCiclo+0xb3e>
break;
80020d2: bf00 nop
80020d4: e039 b.n 800214a <manageCiclo+0xb3e>
break;
80020d6: bf00 nop
80020d8: e037 b.n 800214a <manageCiclo+0xb3e>
80020da: bf00 nop
80020dc: 20000414 .word 0x20000414
80020e0: 200003f4 .word 0x200003f4
80020e4: 20000412 .word 0x20000412
80020e8: 200003fc .word 0x200003fc
80020ec: 2000040c .word 0x2000040c
80020f0: 200003ec .word 0x200003ec
80020f4: 2000041d .word 0x2000041d
80020f8: 2000041c .word 0x2000041c
80020fc: 2000040a .word 0x2000040a
8002100: 20000410 .word 0x20000410
8002104: 2000041e .word 0x2000041e
break;
8002108: bf00 nop
800210a: e01e b.n 800214a <manageCiclo+0xb3e>
break;
800210c: bf00 nop
800210e: e01c b.n 800214a <manageCiclo+0xb3e>
break;
8002110: bf00 nop
8002112: e01a b.n 800214a <manageCiclo+0xb3e>
break;
8002114: bf00 nop
8002116: e018 b.n 800214a <manageCiclo+0xb3e>
break;
8002118: bf00 nop
800211a: e016 b.n 800214a <manageCiclo+0xb3e>
break;
800211c: bf00 nop
800211e: e014 b.n 800214a <manageCiclo+0xb3e>
break;
8002120: bf00 nop
8002122: e012 b.n 800214a <manageCiclo+0xb3e>
break;
8002124: bf00 nop
8002126: e010 b.n 800214a <manageCiclo+0xb3e>
break;
8002128: bf00 nop
800212a: e00e b.n 800214a <manageCiclo+0xb3e>
break;
800212c: bf00 nop
800212e: e00c b.n 800214a <manageCiclo+0xb3e>
break;
8002130: bf00 nop
8002132: e00a b.n 800214a <manageCiclo+0xb3e>
break;
8002134: bf00 nop
8002136: e008 b.n 800214a <manageCiclo+0xb3e>
break;
8002138: bf00 nop
800213a: e006 b.n 800214a <manageCiclo+0xb3e>
break;
800213c: bf00 nop
800213e: e004 b.n 800214a <manageCiclo+0xb3e>
break;
8002140: bf00 nop
8002142: e002 b.n 800214a <manageCiclo+0xb3e>
break;
8002144: bf00 nop
8002146: e000 b.n 800214a <manageCiclo+0xb3e>
break;
8002148: bf00 nop
}
}
800214a: bf00 nop
800214c: 46bd mov sp, r7
800214e: bd80 pop {r7, pc}
08002150 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8002150: b580 push {r7, lr}
8002152: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8002154: f001 f9ba bl 80034cc <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8002158: f000 f84e bl 80021f8 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
800215c: f000 fab0 bl 80026c0 <MX_GPIO_Init>
MX_DMA_Init();
8002160: f000 fa90 bl 8002684 <MX_DMA_Init>
MX_USB_DEVICE_Init();
8002164: f009 fd24 bl 800bbb0 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
8002168: f000 f91c bl 80023a4 <MX_TIM2_Init>
MX_TIM4_Init();
800216c: f000 f9be bl 80024ec <MX_TIM4_Init>
MX_ADC1_Init();
8002170: f000 f8a0 bl 80022b4 <MX_ADC1_Init>
MX_USART1_UART_Init();
8002174: f000 fa5c bl 8002630 <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS);
8002178: 2205 movs r2, #5
800217a: 491b ldr r1, [pc, #108] @ (80021e8 <main+0x98>)
800217c: 481b ldr r0, [pc, #108] @ (80021ec <main+0x9c>)
800217e: f001 fadf bl 8003740 <HAL_ADC_Start_DMA>
StopMot(timMot1,FWMot1);
8002182: 2100 movs r1, #0
8002184: 481a ldr r0, [pc, #104] @ (80021f0 <main+0xa0>)
8002186: f000 fb60 bl 800284a <StopMot>
StopMot(timMot1,BWMot1);
800218a: 2104 movs r1, #4
800218c: 4818 ldr r0, [pc, #96] @ (80021f0 <main+0xa0>)
800218e: f000 fb5c bl 800284a <StopMot>
StopMot(timMot2,FWMot2);
8002192: 2108 movs r1, #8
8002194: 4816 ldr r0, [pc, #88] @ (80021f0 <main+0xa0>)
8002196: f000 fb58 bl 800284a <StopMot>
StopMot(timMot2,BWMot2);
800219a: 210c movs r1, #12
800219c: 4814 ldr r0, [pc, #80] @ (80021f0 <main+0xa0>)
800219e: f000 fb54 bl 800284a <StopMot>
StopMot(timMot3,FWMot3);
80021a2: 2100 movs r1, #0
80021a4: 4813 ldr r0, [pc, #76] @ (80021f4 <main+0xa4>)
80021a6: f000 fb50 bl 800284a <StopMot>
StopMot(timMot3,BWMot3);
80021aa: 2104 movs r1, #4
80021ac: 4811 ldr r0, [pc, #68] @ (80021f4 <main+0xa4>)
80021ae: f000 fb4c bl 800284a <StopMot>
StopMot(timMot4,FWMot4);
80021b2: 2108 movs r1, #8
80021b4: 480f ldr r0, [pc, #60] @ (80021f4 <main+0xa4>)
80021b6: f000 fb48 bl 800284a <StopMot>
StopMot(timMot4,BWMot4);
80021ba: 210c movs r1, #12
80021bc: 480d ldr r0, [pc, #52] @ (80021f4 <main+0xa4>)
80021be: f000 fb44 bl 800284a <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
//while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
if (EE_Init() != EE_OK){
80021c2: f7fe ff81 bl 80010c8 <EE_Init>
80021c6: 4603 mov r3, r0
80021c8: 2b00 cmp r3, #0
80021ca: d001 beq.n 80021d0 <main+0x80>
for(;;);//errore eeprom
80021cc: bf00 nop
80021ce: e7fd b.n 80021cc <main+0x7c>
}
loadEE();
80021d0: f7ff f816 bl 8001200 <loadEE>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
manageCDC();
80021d4: f7fe f912 bl 80003fc <manageCDC>
manageAdc();
80021d8: f7fd ffc0 bl 800015c <manageAdc>
managePulsanti();
80021dc: f7ff f9a8 bl 8001530 <managePulsanti>
manageCiclo();
80021e0: f7ff fa14 bl 800160c <manageCiclo>
manageCDC();
80021e4: bf00 nop
80021e6: e7f5 b.n 80021d4 <main+0x84>
80021e8: 200001f4 .word 0x200001f4
80021ec: 20000294 .word 0x20000294
80021f0: 20000308 .word 0x20000308
80021f4: 20000350 .word 0x20000350
080021f8 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
80021f8: b580 push {r7, lr}
80021fa: b094 sub sp, #80 @ 0x50
80021fc: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
80021fe: f107 0328 add.w r3, r7, #40 @ 0x28
8002202: 2228 movs r2, #40 @ 0x28
8002204: 2100 movs r1, #0
8002206: 4618 mov r0, r3
8002208: f00a fa0e bl 800c628 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
800220c: f107 0314 add.w r3, r7, #20
8002210: 2200 movs r2, #0
8002212: 601a str r2, [r3, #0]
8002214: 605a str r2, [r3, #4]
8002216: 609a str r2, [r3, #8]
8002218: 60da str r2, [r3, #12]
800221a: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
800221c: 1d3b adds r3, r7, #4
800221e: 2200 movs r2, #0
8002220: 601a str r2, [r3, #0]
8002222: 605a str r2, [r3, #4]
8002224: 609a str r2, [r3, #8]
8002226: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8002228: 2301 movs r3, #1
800222a: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
800222c: f44f 3380 mov.w r3, #65536 @ 0x10000
8002230: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
8002232: 2300 movs r3, #0
8002234: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8002236: 2301 movs r3, #1
8002238: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
800223a: 2302 movs r3, #2
800223c: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
800223e: f44f 3380 mov.w r3, #65536 @ 0x10000
8002242: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
8002244: f44f 1380 mov.w r3, #1048576 @ 0x100000
8002248: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
800224a: f107 0328 add.w r3, r7, #40 @ 0x28
800224e: 4618 mov r0, r3
8002250: f004 f998 bl 8006584 <HAL_RCC_OscConfig>
8002254: 4603 mov r3, r0
8002256: 2b00 cmp r3, #0
8002258: d001 beq.n 800225e <SystemClock_Config+0x66>
{
Error_Handler();
800225a: f000 fadb bl 8002814 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
800225e: 230f movs r3, #15
8002260: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8002262: 2302 movs r3, #2
8002264: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8002266: 2300 movs r3, #0
8002268: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
800226a: f44f 6380 mov.w r3, #1024 @ 0x400
800226e: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8002270: 2300 movs r3, #0
8002272: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
8002274: f107 0314 add.w r3, r7, #20
8002278: 2102 movs r1, #2
800227a: 4618 mov r0, r3
800227c: f004 fc04 bl 8006a88 <HAL_RCC_ClockConfig>
8002280: 4603 mov r3, r0
8002282: 2b00 cmp r3, #0
8002284: d001 beq.n 800228a <SystemClock_Config+0x92>
{
Error_Handler();
8002286: f000 fac5 bl 8002814 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
800228a: 2312 movs r3, #18
800228c: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
800228e: f44f 4300 mov.w r3, #32768 @ 0x8000
8002292: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
8002294: 2300 movs r3, #0
8002296: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
8002298: 1d3b adds r3, r7, #4
800229a: 4618 mov r0, r3
800229c: f004 fd84 bl 8006da8 <HAL_RCCEx_PeriphCLKConfig>
80022a0: 4603 mov r3, r0
80022a2: 2b00 cmp r3, #0
80022a4: d001 beq.n 80022aa <SystemClock_Config+0xb2>
{
Error_Handler();
80022a6: f000 fab5 bl 8002814 <Error_Handler>
}
}
80022aa: bf00 nop
80022ac: 3750 adds r7, #80 @ 0x50
80022ae: 46bd mov sp, r7
80022b0: bd80 pop {r7, pc}
...
080022b4 <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
80022b4: b580 push {r7, lr}
80022b6: b084 sub sp, #16
80022b8: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
80022ba: 1d3b adds r3, r7, #4
80022bc: 2200 movs r2, #0
80022be: 601a str r2, [r3, #0]
80022c0: 605a str r2, [r3, #4]
80022c2: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
80022c4: 4b35 ldr r3, [pc, #212] @ (800239c <MX_ADC1_Init+0xe8>)
80022c6: 4a36 ldr r2, [pc, #216] @ (80023a0 <MX_ADC1_Init+0xec>)
80022c8: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
80022ca: 4b34 ldr r3, [pc, #208] @ (800239c <MX_ADC1_Init+0xe8>)
80022cc: f44f 7280 mov.w r2, #256 @ 0x100
80022d0: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = ENABLE;
80022d2: 4b32 ldr r3, [pc, #200] @ (800239c <MX_ADC1_Init+0xe8>)
80022d4: 2201 movs r2, #1
80022d6: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
80022d8: 4b30 ldr r3, [pc, #192] @ (800239c <MX_ADC1_Init+0xe8>)
80022da: 2200 movs r2, #0
80022dc: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
80022de: 4b2f ldr r3, [pc, #188] @ (800239c <MX_ADC1_Init+0xe8>)
80022e0: f44f 2260 mov.w r2, #917504 @ 0xe0000
80022e4: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
80022e6: 4b2d ldr r3, [pc, #180] @ (800239c <MX_ADC1_Init+0xe8>)
80022e8: 2200 movs r2, #0
80022ea: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 5;
80022ec: 4b2b ldr r3, [pc, #172] @ (800239c <MX_ADC1_Init+0xe8>)
80022ee: 2205 movs r2, #5
80022f0: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
80022f2: 482a ldr r0, [pc, #168] @ (800239c <MX_ADC1_Init+0xe8>)
80022f4: f001 f94c bl 8003590 <HAL_ADC_Init>
80022f8: 4603 mov r3, r0
80022fa: 2b00 cmp r3, #0
80022fc: d001 beq.n 8002302 <MX_ADC1_Init+0x4e>
{
Error_Handler();
80022fe: f000 fa89 bl 8002814 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
8002302: 2304 movs r3, #4
8002304: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8002306: 2301 movs r3, #1
8002308: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5;
800230a: 2303 movs r3, #3
800230c: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
800230e: 1d3b adds r3, r7, #4
8002310: 4619 mov r1, r3
8002312: 4822 ldr r0, [pc, #136] @ (800239c <MX_ADC1_Init+0xe8>)
8002314: f001 fb0e bl 8003934 <HAL_ADC_ConfigChannel>
8002318: 4603 mov r3, r0
800231a: 2b00 cmp r3, #0
800231c: d001 beq.n 8002322 <MX_ADC1_Init+0x6e>
{
Error_Handler();
800231e: f000 fa79 bl 8002814 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_5;
8002322: 2305 movs r3, #5
8002324: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_2;
8002326: 2302 movs r3, #2
8002328: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
800232a: 1d3b adds r3, r7, #4
800232c: 4619 mov r1, r3
800232e: 481b ldr r0, [pc, #108] @ (800239c <MX_ADC1_Init+0xe8>)
8002330: f001 fb00 bl 8003934 <HAL_ADC_ConfigChannel>
8002334: 4603 mov r3, r0
8002336: 2b00 cmp r3, #0
8002338: d001 beq.n 800233e <MX_ADC1_Init+0x8a>
{
Error_Handler();
800233a: f000 fa6b bl 8002814 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
800233e: 2306 movs r3, #6
8002340: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_3;
8002342: 2303 movs r3, #3
8002344: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002346: 1d3b adds r3, r7, #4
8002348: 4619 mov r1, r3
800234a: 4814 ldr r0, [pc, #80] @ (800239c <MX_ADC1_Init+0xe8>)
800234c: f001 faf2 bl 8003934 <HAL_ADC_ConfigChannel>
8002350: 4603 mov r3, r0
8002352: 2b00 cmp r3, #0
8002354: d001 beq.n 800235a <MX_ADC1_Init+0xa6>
{
Error_Handler();
8002356: f000 fa5d bl 8002814 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_7;
800235a: 2307 movs r3, #7
800235c: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_4;
800235e: 2304 movs r3, #4
8002360: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002362: 1d3b adds r3, r7, #4
8002364: 4619 mov r1, r3
8002366: 480d ldr r0, [pc, #52] @ (800239c <MX_ADC1_Init+0xe8>)
8002368: f001 fae4 bl 8003934 <HAL_ADC_ConfigChannel>
800236c: 4603 mov r3, r0
800236e: 2b00 cmp r3, #0
8002370: d001 beq.n 8002376 <MX_ADC1_Init+0xc2>
{
Error_Handler();
8002372: f000 fa4f bl 8002814 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
8002376: 2308 movs r3, #8
8002378: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_5;
800237a: 2305 movs r3, #5
800237c: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
800237e: 1d3b adds r3, r7, #4
8002380: 4619 mov r1, r3
8002382: 4806 ldr r0, [pc, #24] @ (800239c <MX_ADC1_Init+0xe8>)
8002384: f001 fad6 bl 8003934 <HAL_ADC_ConfigChannel>
8002388: 4603 mov r3, r0
800238a: 2b00 cmp r3, #0
800238c: d001 beq.n 8002392 <MX_ADC1_Init+0xde>
{
Error_Handler();
800238e: f000 fa41 bl 8002814 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8002392: bf00 nop
8002394: 3710 adds r7, #16
8002396: 46bd mov sp, r7
8002398: bd80 pop {r7, pc}
800239a: bf00 nop
800239c: 20000294 .word 0x20000294
80023a0: 40012400 .word 0x40012400
080023a4 <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
80023a4: b580 push {r7, lr}
80023a6: b08e sub sp, #56 @ 0x38
80023a8: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
80023aa: f107 0328 add.w r3, r7, #40 @ 0x28
80023ae: 2200 movs r2, #0
80023b0: 601a str r2, [r3, #0]
80023b2: 605a str r2, [r3, #4]
80023b4: 609a str r2, [r3, #8]
80023b6: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
80023b8: f107 0320 add.w r3, r7, #32
80023bc: 2200 movs r2, #0
80023be: 601a str r2, [r3, #0]
80023c0: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80023c2: 1d3b adds r3, r7, #4
80023c4: 2200 movs r2, #0
80023c6: 601a str r2, [r3, #0]
80023c8: 605a str r2, [r3, #4]
80023ca: 609a str r2, [r3, #8]
80023cc: 60da str r2, [r3, #12]
80023ce: 611a str r2, [r3, #16]
80023d0: 615a str r2, [r3, #20]
80023d2: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
80023d4: 4b44 ldr r3, [pc, #272] @ (80024e8 <MX_TIM2_Init+0x144>)
80023d6: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
80023da: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
80023dc: 4b42 ldr r3, [pc, #264] @ (80024e8 <MX_TIM2_Init+0x144>)
80023de: 2200 movs r2, #0
80023e0: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
80023e2: 4b41 ldr r3, [pc, #260] @ (80024e8 <MX_TIM2_Init+0x144>)
80023e4: 2200 movs r2, #0
80023e6: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
80023e8: 4b3f ldr r3, [pc, #252] @ (80024e8 <MX_TIM2_Init+0x144>)
80023ea: f244 624f movw r2, #17999 @ 0x464f
80023ee: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80023f0: 4b3d ldr r3, [pc, #244] @ (80024e8 <MX_TIM2_Init+0x144>)
80023f2: 2200 movs r2, #0
80023f4: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80023f6: 4b3c ldr r3, [pc, #240] @ (80024e8 <MX_TIM2_Init+0x144>)
80023f8: 2200 movs r2, #0
80023fa: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
80023fc: 483a ldr r0, [pc, #232] @ (80024e8 <MX_TIM2_Init+0x144>)
80023fe: f004 fd89 bl 8006f14 <HAL_TIM_Base_Init>
8002402: 4603 mov r3, r0
8002404: 2b00 cmp r3, #0
8002406: d001 beq.n 800240c <MX_TIM2_Init+0x68>
{
Error_Handler();
8002408: f000 fa04 bl 8002814 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
800240c: f44f 5380 mov.w r3, #4096 @ 0x1000
8002410: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
8002412: f107 0328 add.w r3, r7, #40 @ 0x28
8002416: 4619 mov r1, r3
8002418: 4833 ldr r0, [pc, #204] @ (80024e8 <MX_TIM2_Init+0x144>)
800241a: f004 ffeb bl 80073f4 <HAL_TIM_ConfigClockSource>
800241e: 4603 mov r3, r0
8002420: 2b00 cmp r3, #0
8002422: d001 beq.n 8002428 <MX_TIM2_Init+0x84>
{
Error_Handler();
8002424: f000 f9f6 bl 8002814 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
8002428: 482f ldr r0, [pc, #188] @ (80024e8 <MX_TIM2_Init+0x144>)
800242a: f004 fdc2 bl 8006fb2 <HAL_TIM_PWM_Init>
800242e: 4603 mov r3, r0
8002430: 2b00 cmp r3, #0
8002432: d001 beq.n 8002438 <MX_TIM2_Init+0x94>
{
Error_Handler();
8002434: f000 f9ee bl 8002814 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8002438: 2300 movs r3, #0
800243a: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
800243c: 2300 movs r3, #0
800243e: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
8002440: f107 0320 add.w r3, r7, #32
8002444: 4619 mov r1, r3
8002446: 4828 ldr r0, [pc, #160] @ (80024e8 <MX_TIM2_Init+0x144>)
8002448: f005 fb74 bl 8007b34 <HAL_TIMEx_MasterConfigSynchronization>
800244c: 4603 mov r3, r0
800244e: 2b00 cmp r3, #0
8002450: d001 beq.n 8002456 <MX_TIM2_Init+0xb2>
{
Error_Handler();
8002452: f000 f9df bl 8002814 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8002456: 2360 movs r3, #96 @ 0x60
8002458: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
800245a: f44f 737a mov.w r3, #1000 @ 0x3e8
800245e: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8002460: 2300 movs r3, #0
8002462: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8002464: 2304 movs r3, #4
8002466: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8002468: 1d3b adds r3, r7, #4
800246a: 2200 movs r2, #0
800246c: 4619 mov r1, r3
800246e: 481e ldr r0, [pc, #120] @ (80024e8 <MX_TIM2_Init+0x144>)
8002470: f004 fefe bl 8007270 <HAL_TIM_PWM_ConfigChannel>
8002474: 4603 mov r3, r0
8002476: 2b00 cmp r3, #0
8002478: d001 beq.n 800247e <MX_TIM2_Init+0xda>
{
Error_Handler();
800247a: f000 f9cb bl 8002814 <Error_Handler>
}
sConfigOC.Pulse = 2000;
800247e: f44f 63fa mov.w r3, #2000 @ 0x7d0
8002482: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8002484: 1d3b adds r3, r7, #4
8002486: 2204 movs r2, #4
8002488: 4619 mov r1, r3
800248a: 4817 ldr r0, [pc, #92] @ (80024e8 <MX_TIM2_Init+0x144>)
800248c: f004 fef0 bl 8007270 <HAL_TIM_PWM_ConfigChannel>
8002490: 4603 mov r3, r0
8002492: 2b00 cmp r3, #0
8002494: d001 beq.n 800249a <MX_TIM2_Init+0xf6>
{
Error_Handler();
8002496: f000 f9bd bl 8002814 <Error_Handler>
}
sConfigOC.Pulse = 3000;
800249a: f640 33b8 movw r3, #3000 @ 0xbb8
800249e: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
80024a0: 2300 movs r3, #0
80024a2: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
80024a4: 1d3b adds r3, r7, #4
80024a6: 2208 movs r2, #8
80024a8: 4619 mov r1, r3
80024aa: 480f ldr r0, [pc, #60] @ (80024e8 <MX_TIM2_Init+0x144>)
80024ac: f004 fee0 bl 8007270 <HAL_TIM_PWM_ConfigChannel>
80024b0: 4603 mov r3, r0
80024b2: 2b00 cmp r3, #0
80024b4: d001 beq.n 80024ba <MX_TIM2_Init+0x116>
{
Error_Handler();
80024b6: f000 f9ad bl 8002814 <Error_Handler>
}
sConfigOC.Pulse = 4000;
80024ba: f44f 637a mov.w r3, #4000 @ 0xfa0
80024be: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80024c0: 2304 movs r3, #4
80024c2: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
80024c4: 1d3b adds r3, r7, #4
80024c6: 220c movs r2, #12
80024c8: 4619 mov r1, r3
80024ca: 4807 ldr r0, [pc, #28] @ (80024e8 <MX_TIM2_Init+0x144>)
80024cc: f004 fed0 bl 8007270 <HAL_TIM_PWM_ConfigChannel>
80024d0: 4603 mov r3, r0
80024d2: 2b00 cmp r3, #0
80024d4: d001 beq.n 80024da <MX_TIM2_Init+0x136>
{
Error_Handler();
80024d6: f000 f99d bl 8002814 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
80024da: 4803 ldr r0, [pc, #12] @ (80024e8 <MX_TIM2_Init+0x144>)
80024dc: f000 feb2 bl 8003244 <HAL_TIM_MspPostInit>
}
80024e0: bf00 nop
80024e2: 3738 adds r7, #56 @ 0x38
80024e4: 46bd mov sp, r7
80024e6: bd80 pop {r7, pc}
80024e8: 20000308 .word 0x20000308
080024ec <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
80024ec: b580 push {r7, lr}
80024ee: b08e sub sp, #56 @ 0x38
80024f0: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
80024f2: f107 0328 add.w r3, r7, #40 @ 0x28
80024f6: 2200 movs r2, #0
80024f8: 601a str r2, [r3, #0]
80024fa: 605a str r2, [r3, #4]
80024fc: 609a str r2, [r3, #8]
80024fe: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8002500: f107 0320 add.w r3, r7, #32
8002504: 2200 movs r2, #0
8002506: 601a str r2, [r3, #0]
8002508: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
800250a: 1d3b adds r3, r7, #4
800250c: 2200 movs r2, #0
800250e: 601a str r2, [r3, #0]
8002510: 605a str r2, [r3, #4]
8002512: 609a str r2, [r3, #8]
8002514: 60da str r2, [r3, #12]
8002516: 611a str r2, [r3, #16]
8002518: 615a str r2, [r3, #20]
800251a: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
800251c: 4b42 ldr r3, [pc, #264] @ (8002628 <MX_TIM4_Init+0x13c>)
800251e: 4a43 ldr r2, [pc, #268] @ (800262c <MX_TIM4_Init+0x140>)
8002520: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
8002522: 4b41 ldr r3, [pc, #260] @ (8002628 <MX_TIM4_Init+0x13c>)
8002524: 2200 movs r2, #0
8002526: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
8002528: 4b3f ldr r3, [pc, #252] @ (8002628 <MX_TIM4_Init+0x13c>)
800252a: 2200 movs r2, #0
800252c: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
800252e: 4b3e ldr r3, [pc, #248] @ (8002628 <MX_TIM4_Init+0x13c>)
8002530: f244 624f movw r2, #17999 @ 0x464f
8002534: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8002536: 4b3c ldr r3, [pc, #240] @ (8002628 <MX_TIM4_Init+0x13c>)
8002538: 2200 movs r2, #0
800253a: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
800253c: 4b3a ldr r3, [pc, #232] @ (8002628 <MX_TIM4_Init+0x13c>)
800253e: 2200 movs r2, #0
8002540: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
8002542: 4839 ldr r0, [pc, #228] @ (8002628 <MX_TIM4_Init+0x13c>)
8002544: f004 fce6 bl 8006f14 <HAL_TIM_Base_Init>
8002548: 4603 mov r3, r0
800254a: 2b00 cmp r3, #0
800254c: d001 beq.n 8002552 <MX_TIM4_Init+0x66>
{
Error_Handler();
800254e: f000 f961 bl 8002814 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8002552: f44f 5380 mov.w r3, #4096 @ 0x1000
8002556: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
8002558: f107 0328 add.w r3, r7, #40 @ 0x28
800255c: 4619 mov r1, r3
800255e: 4832 ldr r0, [pc, #200] @ (8002628 <MX_TIM4_Init+0x13c>)
8002560: f004 ff48 bl 80073f4 <HAL_TIM_ConfigClockSource>
8002564: 4603 mov r3, r0
8002566: 2b00 cmp r3, #0
8002568: d001 beq.n 800256e <MX_TIM4_Init+0x82>
{
Error_Handler();
800256a: f000 f953 bl 8002814 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
800256e: 482e ldr r0, [pc, #184] @ (8002628 <MX_TIM4_Init+0x13c>)
8002570: f004 fd1f bl 8006fb2 <HAL_TIM_PWM_Init>
8002574: 4603 mov r3, r0
8002576: 2b00 cmp r3, #0
8002578: d001 beq.n 800257e <MX_TIM4_Init+0x92>
{
Error_Handler();
800257a: f000 f94b bl 8002814 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
800257e: 2300 movs r3, #0
8002580: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8002582: 2300 movs r3, #0
8002584: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
8002586: f107 0320 add.w r3, r7, #32
800258a: 4619 mov r1, r3
800258c: 4826 ldr r0, [pc, #152] @ (8002628 <MX_TIM4_Init+0x13c>)
800258e: f005 fad1 bl 8007b34 <HAL_TIMEx_MasterConfigSynchronization>
8002592: 4603 mov r3, r0
8002594: 2b00 cmp r3, #0
8002596: d001 beq.n 800259c <MX_TIM4_Init+0xb0>
{
Error_Handler();
8002598: f000 f93c bl 8002814 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
800259c: 2360 movs r3, #96 @ 0x60
800259e: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
80025a0: f241 3388 movw r3, #5000 @ 0x1388
80025a4: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
80025a6: 2300 movs r3, #0
80025a8: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80025aa: 2304 movs r3, #4
80025ac: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
80025ae: 1d3b adds r3, r7, #4
80025b0: 2200 movs r2, #0
80025b2: 4619 mov r1, r3
80025b4: 481c ldr r0, [pc, #112] @ (8002628 <MX_TIM4_Init+0x13c>)
80025b6: f004 fe5b bl 8007270 <HAL_TIM_PWM_ConfigChannel>
80025ba: 4603 mov r3, r0
80025bc: 2b00 cmp r3, #0
80025be: d001 beq.n 80025c4 <MX_TIM4_Init+0xd8>
{
Error_Handler();
80025c0: f000 f928 bl 8002814 <Error_Handler>
}
sConfigOC.Pulse = 6000;
80025c4: f241 7370 movw r3, #6000 @ 0x1770
80025c8: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
80025ca: 1d3b adds r3, r7, #4
80025cc: 2204 movs r2, #4
80025ce: 4619 mov r1, r3
80025d0: 4815 ldr r0, [pc, #84] @ (8002628 <MX_TIM4_Init+0x13c>)
80025d2: f004 fe4d bl 8007270 <HAL_TIM_PWM_ConfigChannel>
80025d6: 4603 mov r3, r0
80025d8: 2b00 cmp r3, #0
80025da: d001 beq.n 80025e0 <MX_TIM4_Init+0xf4>
{
Error_Handler();
80025dc: f000 f91a bl 8002814 <Error_Handler>
}
sConfigOC.Pulse = 7000;
80025e0: f641 3358 movw r3, #7000 @ 0x1b58
80025e4: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
80025e6: 1d3b adds r3, r7, #4
80025e8: 2208 movs r2, #8
80025ea: 4619 mov r1, r3
80025ec: 480e ldr r0, [pc, #56] @ (8002628 <MX_TIM4_Init+0x13c>)
80025ee: f004 fe3f bl 8007270 <HAL_TIM_PWM_ConfigChannel>
80025f2: 4603 mov r3, r0
80025f4: 2b00 cmp r3, #0
80025f6: d001 beq.n 80025fc <MX_TIM4_Init+0x110>
{
Error_Handler();
80025f8: f000 f90c bl 8002814 <Error_Handler>
}
sConfigOC.Pulse = 8000;
80025fc: f44f 53fa mov.w r3, #8000 @ 0x1f40
8002600: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8002602: 1d3b adds r3, r7, #4
8002604: 220c movs r2, #12
8002606: 4619 mov r1, r3
8002608: 4807 ldr r0, [pc, #28] @ (8002628 <MX_TIM4_Init+0x13c>)
800260a: f004 fe31 bl 8007270 <HAL_TIM_PWM_ConfigChannel>
800260e: 4603 mov r3, r0
8002610: 2b00 cmp r3, #0
8002612: d001 beq.n 8002618 <MX_TIM4_Init+0x12c>
{
Error_Handler();
8002614: f000 f8fe bl 8002814 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8002618: 4803 ldr r0, [pc, #12] @ (8002628 <MX_TIM4_Init+0x13c>)
800261a: f000 fe13 bl 8003244 <HAL_TIM_MspPostInit>
}
800261e: bf00 nop
8002620: 3738 adds r7, #56 @ 0x38
8002622: 46bd mov sp, r7
8002624: bd80 pop {r7, pc}
8002626: bf00 nop
8002628: 20000350 .word 0x20000350
800262c: 40000800 .word 0x40000800
08002630 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
8002630: b580 push {r7, lr}
8002632: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
8002634: 4b11 ldr r3, [pc, #68] @ (800267c <MX_USART1_UART_Init+0x4c>)
8002636: 4a12 ldr r2, [pc, #72] @ (8002680 <MX_USART1_UART_Init+0x50>)
8002638: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
800263a: 4b10 ldr r3, [pc, #64] @ (800267c <MX_USART1_UART_Init+0x4c>)
800263c: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8002640: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
8002642: 4b0e ldr r3, [pc, #56] @ (800267c <MX_USART1_UART_Init+0x4c>)
8002644: 2200 movs r2, #0
8002646: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8002648: 4b0c ldr r3, [pc, #48] @ (800267c <MX_USART1_UART_Init+0x4c>)
800264a: 2200 movs r2, #0
800264c: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
800264e: 4b0b ldr r3, [pc, #44] @ (800267c <MX_USART1_UART_Init+0x4c>)
8002650: 2200 movs r2, #0
8002652: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8002654: 4b09 ldr r3, [pc, #36] @ (800267c <MX_USART1_UART_Init+0x4c>)
8002656: 220c movs r2, #12
8002658: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
800265a: 4b08 ldr r3, [pc, #32] @ (800267c <MX_USART1_UART_Init+0x4c>)
800265c: 2200 movs r2, #0
800265e: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8002660: 4b06 ldr r3, [pc, #24] @ (800267c <MX_USART1_UART_Init+0x4c>)
8002662: 2200 movs r2, #0
8002664: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
8002666: 4805 ldr r0, [pc, #20] @ (800267c <MX_USART1_UART_Init+0x4c>)
8002668: f005 fac2 bl 8007bf0 <HAL_UART_Init>
800266c: 4603 mov r3, r0
800266e: 2b00 cmp r3, #0
8002670: d001 beq.n 8002676 <MX_USART1_UART_Init+0x46>
{
Error_Handler();
8002672: f000 f8cf bl 8002814 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
8002676: bf00 nop
8002678: bd80 pop {r7, pc}
800267a: bf00 nop
800267c: 20000398 .word 0x20000398
8002680: 40013800 .word 0x40013800
08002684 <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
8002684: b580 push {r7, lr}
8002686: b082 sub sp, #8
8002688: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
800268a: 4b0c ldr r3, [pc, #48] @ (80026bc <MX_DMA_Init+0x38>)
800268c: 695b ldr r3, [r3, #20]
800268e: 4a0b ldr r2, [pc, #44] @ (80026bc <MX_DMA_Init+0x38>)
8002690: f043 0301 orr.w r3, r3, #1
8002694: 6153 str r3, [r2, #20]
8002696: 4b09 ldr r3, [pc, #36] @ (80026bc <MX_DMA_Init+0x38>)
8002698: 695b ldr r3, [r3, #20]
800269a: f003 0301 and.w r3, r3, #1
800269e: 607b str r3, [r7, #4]
80026a0: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
80026a2: 2200 movs r2, #0
80026a4: 2100 movs r1, #0
80026a6: 200b movs r0, #11
80026a8: f001 fc15 bl 8003ed6 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
80026ac: 200b movs r0, #11
80026ae: f001 fc2e bl 8003f0e <HAL_NVIC_EnableIRQ>
}
80026b2: bf00 nop
80026b4: 3708 adds r7, #8
80026b6: 46bd mov sp, r7
80026b8: bd80 pop {r7, pc}
80026ba: bf00 nop
80026bc: 40021000 .word 0x40021000
080026c0 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
80026c0: b580 push {r7, lr}
80026c2: b088 sub sp, #32
80026c4: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
80026c6: f107 0310 add.w r3, r7, #16
80026ca: 2200 movs r2, #0
80026cc: 601a str r2, [r3, #0]
80026ce: 605a str r2, [r3, #4]
80026d0: 609a str r2, [r3, #8]
80026d2: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
80026d4: 4b4b ldr r3, [pc, #300] @ (8002804 <MX_GPIO_Init+0x144>)
80026d6: 699b ldr r3, [r3, #24]
80026d8: 4a4a ldr r2, [pc, #296] @ (8002804 <MX_GPIO_Init+0x144>)
80026da: f043 0310 orr.w r3, r3, #16
80026de: 6193 str r3, [r2, #24]
80026e0: 4b48 ldr r3, [pc, #288] @ (8002804 <MX_GPIO_Init+0x144>)
80026e2: 699b ldr r3, [r3, #24]
80026e4: f003 0310 and.w r3, r3, #16
80026e8: 60fb str r3, [r7, #12]
80026ea: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
80026ec: 4b45 ldr r3, [pc, #276] @ (8002804 <MX_GPIO_Init+0x144>)
80026ee: 699b ldr r3, [r3, #24]
80026f0: 4a44 ldr r2, [pc, #272] @ (8002804 <MX_GPIO_Init+0x144>)
80026f2: f043 0320 orr.w r3, r3, #32
80026f6: 6193 str r3, [r2, #24]
80026f8: 4b42 ldr r3, [pc, #264] @ (8002804 <MX_GPIO_Init+0x144>)
80026fa: 699b ldr r3, [r3, #24]
80026fc: f003 0320 and.w r3, r3, #32
8002700: 60bb str r3, [r7, #8]
8002702: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8002704: 4b3f ldr r3, [pc, #252] @ (8002804 <MX_GPIO_Init+0x144>)
8002706: 699b ldr r3, [r3, #24]
8002708: 4a3e ldr r2, [pc, #248] @ (8002804 <MX_GPIO_Init+0x144>)
800270a: f043 0304 orr.w r3, r3, #4
800270e: 6193 str r3, [r2, #24]
8002710: 4b3c ldr r3, [pc, #240] @ (8002804 <MX_GPIO_Init+0x144>)
8002712: 699b ldr r3, [r3, #24]
8002714: f003 0304 and.w r3, r3, #4
8002718: 607b str r3, [r7, #4]
800271a: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
800271c: 4b39 ldr r3, [pc, #228] @ (8002804 <MX_GPIO_Init+0x144>)
800271e: 699b ldr r3, [r3, #24]
8002720: 4a38 ldr r2, [pc, #224] @ (8002804 <MX_GPIO_Init+0x144>)
8002722: f043 0308 orr.w r3, r3, #8
8002726: 6193 str r3, [r2, #24]
8002728: 4b36 ldr r3, [pc, #216] @ (8002804 <MX_GPIO_Init+0x144>)
800272a: 699b ldr r3, [r3, #24]
800272c: f003 0308 and.w r3, r3, #8
8002730: 603b str r3, [r7, #0]
8002732: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8002734: 2200 movs r2, #0
8002736: f44f 5100 mov.w r1, #8192 @ 0x2000
800273a: 4833 ldr r0, [pc, #204] @ (8002808 <MX_GPIO_Init+0x148>)
800273c: f002 f991 bl 8004a62 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8002740: 2200 movs r2, #0
8002742: f640 413e movw r1, #3134 @ 0xc3e
8002746: 4831 ldr r0, [pc, #196] @ (800280c <MX_GPIO_Init+0x14c>)
8002748: f002 f98b bl 8004a62 <HAL_GPIO_WritePin>
|EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET);
800274c: 2200 movs r2, #0
800274e: f44f 4101 mov.w r1, #33024 @ 0x8100
8002752: 482f ldr r0, [pc, #188] @ (8002810 <MX_GPIO_Init+0x150>)
8002754: f002 f985 bl 8004a62 <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
8002758: f44f 5300 mov.w r3, #8192 @ 0x2000
800275c: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800275e: 2301 movs r3, #1
8002760: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002762: 2300 movs r3, #0
8002764: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002766: 2302 movs r3, #2
8002768: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
800276a: f107 0310 add.w r3, r7, #16
800276e: 4619 mov r1, r3
8002770: 4825 ldr r0, [pc, #148] @ (8002808 <MX_GPIO_Init+0x148>)
8002772: f001 ffdb bl 800472c <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin|P2_Pin;
8002776: f44f 4340 mov.w r3, #49152 @ 0xc000
800277a: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
800277c: 2300 movs r3, #0
800277e: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002780: 2300 movs r3, #0
8002782: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8002784: f107 0310 add.w r3, r7, #16
8002788: 4619 mov r1, r3
800278a: 481f ldr r0, [pc, #124] @ (8002808 <MX_GPIO_Init+0x148>)
800278c: f001 ffce bl 800472c <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
8002790: 2310 movs r3, #16
8002792: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8002794: 2303 movs r3, #3
8002796: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
8002798: f107 0310 add.w r3, r7, #16
800279c: 4619 mov r1, r3
800279e: 481c ldr r0, [pc, #112] @ (8002810 <MX_GPIO_Init+0x150>)
80027a0: f001 ffc4 bl 800472c <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
80027a4: f640 433e movw r3, #3134 @ 0xc3e
80027a8: 613b str r3, [r7, #16]
|EXP1_Pin|EXP2_Pin|EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80027aa: 2301 movs r3, #1
80027ac: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80027ae: 2300 movs r3, #0
80027b0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80027b2: 2302 movs r3, #2
80027b4: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80027b6: f107 0310 add.w r3, r7, #16
80027ba: 4619 mov r1, r3
80027bc: 4813 ldr r0, [pc, #76] @ (800280c <MX_GPIO_Init+0x14c>)
80027be: f001 ffb5 bl 800472c <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin;
80027c2: f44f 4370 mov.w r3, #61440 @ 0xf000
80027c6: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80027c8: 2300 movs r3, #0
80027ca: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80027cc: 2300 movs r3, #0
80027ce: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80027d0: f107 0310 add.w r3, r7, #16
80027d4: 4619 mov r1, r3
80027d6: 480d ldr r0, [pc, #52] @ (800280c <MX_GPIO_Init+0x14c>)
80027d8: f001 ffa8 bl 800472c <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin;
80027dc: f44f 4301 mov.w r3, #33024 @ 0x8100
80027e0: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80027e2: 2301 movs r3, #1
80027e4: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80027e6: 2300 movs r3, #0
80027e8: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80027ea: 2302 movs r3, #2
80027ec: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80027ee: f107 0310 add.w r3, r7, #16
80027f2: 4619 mov r1, r3
80027f4: 4806 ldr r0, [pc, #24] @ (8002810 <MX_GPIO_Init+0x150>)
80027f6: f001 ff99 bl 800472c <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
80027fa: bf00 nop
80027fc: 3720 adds r7, #32
80027fe: 46bd mov sp, r7
8002800: bd80 pop {r7, pc}
8002802: bf00 nop
8002804: 40021000 .word 0x40021000
8002808: 40011000 .word 0x40011000
800280c: 40010c00 .word 0x40010c00
8002810: 40010800 .word 0x40010800
08002814 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8002814: b480 push {r7}
8002816: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8002818: b672 cpsid i
}
800281a: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
800281c: bf00 nop
800281e: e7fd b.n 800281c <Error_Handler+0x8>
08002820 <IsPwmRunning>:
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim4;
extern volatile uint8_t rtramp[4];
extern uint8_t mrampstart[4];
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8002820: b580 push {r7, lr}
8002822: b084 sub sp, #16
8002824: af00 add r7, sp, #0
8002826: 6078 str r0, [r7, #4]
8002828: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
800282a: 6839 ldr r1, [r7, #0]
800282c: 6878 ldr r0, [r7, #4]
800282e: f004 fea8 bl 8007582 <HAL_TIM_GetChannelState>
8002832: 4603 mov r3, r0
8002834: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
8002836: 7bfb ldrb r3, [r7, #15]
8002838: 2b02 cmp r3, #2
800283a: bf0c ite eq
800283c: 2301 moveq r3, #1
800283e: 2300 movne r3, #0
8002840: b2db uxtb r3, r3
}
8002842: 4618 mov r0, r3
8002844: 3710 adds r7, #16
8002846: 46bd mov sp, r7
8002848: bd80 pop {r7, pc}
0800284a <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
800284a: b580 push {r7, lr}
800284c: b082 sub sp, #8
800284e: af00 add r7, sp, #0
8002850: 6078 str r0, [r7, #4]
8002852: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
8002854: 6839 ldr r1, [r7, #0]
8002856: 6878 ldr r0, [r7, #4]
8002858: f004 fca6 bl 80071a8 <HAL_TIM_PWM_Stop>
}
800285c: bf00 nop
800285e: 3708 adds r7, #8
8002860: 46bd mov sp, r7
8002862: bd80 pop {r7, pc}
08002864 <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8002864: b580 push {r7, lr}
8002866: b084 sub sp, #16
8002868: af00 add r7, sp, #0
800286a: 60f8 str r0, [r7, #12]
800286c: 60b9 str r1, [r7, #8]
800286e: 4613 mov r3, r2
8002870: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8002872: 68bb ldr r3, [r7, #8]
8002874: 2b00 cmp r3, #0
8002876: d104 bne.n 8002882 <StartMot+0x1e>
8002878: 68fb ldr r3, [r7, #12]
800287a: 681b ldr r3, [r3, #0]
800287c: 88fa ldrh r2, [r7, #6]
800287e: 635a str r2, [r3, #52] @ 0x34
8002880: e013 b.n 80028aa <StartMot+0x46>
8002882: 68bb ldr r3, [r7, #8]
8002884: 2b04 cmp r3, #4
8002886: d104 bne.n 8002892 <StartMot+0x2e>
8002888: 68fb ldr r3, [r7, #12]
800288a: 681a ldr r2, [r3, #0]
800288c: 88fb ldrh r3, [r7, #6]
800288e: 6393 str r3, [r2, #56] @ 0x38
8002890: e00b b.n 80028aa <StartMot+0x46>
8002892: 68bb ldr r3, [r7, #8]
8002894: 2b08 cmp r3, #8
8002896: d104 bne.n 80028a2 <StartMot+0x3e>
8002898: 68fb ldr r3, [r7, #12]
800289a: 681a ldr r2, [r3, #0]
800289c: 88fb ldrh r3, [r7, #6]
800289e: 63d3 str r3, [r2, #60] @ 0x3c
80028a0: e003 b.n 80028aa <StartMot+0x46>
80028a2: 68fb ldr r3, [r7, #12]
80028a4: 681a ldr r2, [r3, #0]
80028a6: 88fb ldrh r3, [r7, #6]
80028a8: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
80028aa: 68b9 ldr r1, [r7, #8]
80028ac: 68f8 ldr r0, [r7, #12]
80028ae: f004 fbd9 bl 8007064 <HAL_TIM_PWM_Start>
}
80028b2: bf00 nop
80028b4: 3710 adds r7, #16
80028b6: 46bd mov sp, r7
80028b8: bd80 pop {r7, pc}
080028ba <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
80028ba: b480 push {r7}
80028bc: b085 sub sp, #20
80028be: af00 add r7, sp, #0
80028c0: 60f8 str r0, [r7, #12]
80028c2: 60b9 str r1, [r7, #8]
80028c4: 4613 mov r3, r2
80028c6: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80028c8: 68bb ldr r3, [r7, #8]
80028ca: 2b00 cmp r3, #0
80028cc: d104 bne.n 80028d8 <SetMotPwm+0x1e>
80028ce: 68fb ldr r3, [r7, #12]
80028d0: 681b ldr r3, [r3, #0]
80028d2: 88fa ldrh r2, [r7, #6]
80028d4: 635a str r2, [r3, #52] @ 0x34
}
80028d6: e013 b.n 8002900 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80028d8: 68bb ldr r3, [r7, #8]
80028da: 2b04 cmp r3, #4
80028dc: d104 bne.n 80028e8 <SetMotPwm+0x2e>
80028de: 68fb ldr r3, [r7, #12]
80028e0: 681a ldr r2, [r3, #0]
80028e2: 88fb ldrh r3, [r7, #6]
80028e4: 6393 str r3, [r2, #56] @ 0x38
}
80028e6: e00b b.n 8002900 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80028e8: 68bb ldr r3, [r7, #8]
80028ea: 2b08 cmp r3, #8
80028ec: d104 bne.n 80028f8 <SetMotPwm+0x3e>
80028ee: 68fb ldr r3, [r7, #12]
80028f0: 681a ldr r2, [r3, #0]
80028f2: 88fb ldrh r3, [r7, #6]
80028f4: 63d3 str r3, [r2, #60] @ 0x3c
}
80028f6: e003 b.n 8002900 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80028f8: 68fb ldr r3, [r7, #12]
80028fa: 681a ldr r2, [r3, #0]
80028fc: 88fb ldrh r3, [r7, #6]
80028fe: 6413 str r3, [r2, #64] @ 0x40
}
8002900: bf00 nop
8002902: 3714 adds r7, #20
8002904: 46bd mov sp, r7
8002906: bc80 pop {r7}
8002908: 4770 bx lr
...
0800290c <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
800290c: b580 push {r7, lr}
800290e: b082 sub sp, #8
8002910: af00 add r7, sp, #0
8002912: 4603 mov r3, r0
8002914: 71fb strb r3, [r7, #7]
8002916: 460b mov r3, r1
8002918: 71bb strb r3, [r7, #6]
800291a: 4613 mov r3, r2
800291c: 80bb strh r3, [r7, #4]
switch(mot){
800291e: 79fb ldrb r3, [r7, #7]
8002920: 3b01 subs r3, #1
8002922: 2b03 cmp r3, #3
8002924: f200 8158 bhi.w 8002bd8 <SetMot+0x2cc>
8002928: a201 add r2, pc, #4 @ (adr r2, 8002930 <SetMot+0x24>)
800292a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800292e: bf00 nop
8002930: 08002941 .word 0x08002941
8002934: 080029e3 .word 0x080029e3
8002938: 08002a85 .word 0x08002a85
800293c: 08002b2f .word 0x08002b2f
case 1:
if(dir==FW){
8002940: 79bb ldrb r3, [r7, #6]
8002942: 2b00 cmp r3, #0
8002944: d126 bne.n 8002994 <SetMot+0x88>
if(pwmval==0){
8002946: 88bb ldrh r3, [r7, #4]
8002948: 2b00 cmp r3, #0
800294a: d109 bne.n 8002960 <SetMot+0x54>
StopMot(timMot1,FWMot1);
800294c: 2100 movs r1, #0
800294e: 48a5 ldr r0, [pc, #660] @ (8002be4 <SetMot+0x2d8>)
8002950: f7ff ff7b bl 800284a <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8002954: 2200 movs r2, #0
8002956: 2102 movs r1, #2
8002958: 48a3 ldr r0, [pc, #652] @ (8002be8 <SetMot+0x2dc>)
800295a: f002 f882 bl 8004a62 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
800295e: e13c b.n 8002bda <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
8002960: 2100 movs r1, #0
8002962: 48a0 ldr r0, [pc, #640] @ (8002be4 <SetMot+0x2d8>)
8002964: f7ff ff5c bl 8002820 <IsPwmRunning>
8002968: 4603 mov r3, r0
800296a: 2b00 cmp r3, #0
800296c: d006 beq.n 800297c <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
800296e: 88bb ldrh r3, [r7, #4]
8002970: 461a mov r2, r3
8002972: 2100 movs r1, #0
8002974: 489b ldr r0, [pc, #620] @ (8002be4 <SetMot+0x2d8>)
8002976: f7ff ffa0 bl 80028ba <SetMotPwm>
break;
800297a: e12e b.n 8002bda <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
800297c: 2201 movs r2, #1
800297e: 2102 movs r1, #2
8002980: 4899 ldr r0, [pc, #612] @ (8002be8 <SetMot+0x2dc>)
8002982: f002 f86e bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
8002986: 88bb ldrh r3, [r7, #4]
8002988: 461a mov r2, r3
800298a: 2100 movs r1, #0
800298c: 4895 ldr r0, [pc, #596] @ (8002be4 <SetMot+0x2d8>)
800298e: f7ff ff69 bl 8002864 <StartMot>
break;
8002992: e122 b.n 8002bda <SetMot+0x2ce>
if(pwmval==0){
8002994: 88bb ldrh r3, [r7, #4]
8002996: 2b00 cmp r3, #0
8002998: d109 bne.n 80029ae <SetMot+0xa2>
StopMot(timMot1,BWMot1);
800299a: 2104 movs r1, #4
800299c: 4891 ldr r0, [pc, #580] @ (8002be4 <SetMot+0x2d8>)
800299e: f7ff ff54 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80029a2: 2200 movs r2, #0
80029a4: 2102 movs r1, #2
80029a6: 4890 ldr r0, [pc, #576] @ (8002be8 <SetMot+0x2dc>)
80029a8: f002 f85b bl 8004a62 <HAL_GPIO_WritePin>
break;
80029ac: e115 b.n 8002bda <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
80029ae: 2104 movs r1, #4
80029b0: 488c ldr r0, [pc, #560] @ (8002be4 <SetMot+0x2d8>)
80029b2: f7ff ff35 bl 8002820 <IsPwmRunning>
80029b6: 4603 mov r3, r0
80029b8: 2b00 cmp r3, #0
80029ba: d006 beq.n 80029ca <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
80029bc: 88bb ldrh r3, [r7, #4]
80029be: 461a mov r2, r3
80029c0: 2104 movs r1, #4
80029c2: 4888 ldr r0, [pc, #544] @ (8002be4 <SetMot+0x2d8>)
80029c4: f7ff ff79 bl 80028ba <SetMotPwm>
break;
80029c8: e107 b.n 8002bda <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80029ca: 2201 movs r2, #1
80029cc: 2102 movs r1, #2
80029ce: 4886 ldr r0, [pc, #536] @ (8002be8 <SetMot+0x2dc>)
80029d0: f002 f847 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
80029d4: 88bb ldrh r3, [r7, #4]
80029d6: 461a mov r2, r3
80029d8: 2104 movs r1, #4
80029da: 4882 ldr r0, [pc, #520] @ (8002be4 <SetMot+0x2d8>)
80029dc: f7ff ff42 bl 8002864 <StartMot>
break;
80029e0: e0fb b.n 8002bda <SetMot+0x2ce>
case 2:
if(dir==FW){
80029e2: 79bb ldrb r3, [r7, #6]
80029e4: 2b00 cmp r3, #0
80029e6: d126 bne.n 8002a36 <SetMot+0x12a>
if(pwmval==0){
80029e8: 88bb ldrh r3, [r7, #4]
80029ea: 2b00 cmp r3, #0
80029ec: d109 bne.n 8002a02 <SetMot+0xf6>
StopMot(timMot2,FWMot2);
80029ee: 2108 movs r1, #8
80029f0: 487c ldr r0, [pc, #496] @ (8002be4 <SetMot+0x2d8>)
80029f2: f7ff ff2a bl 800284a <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80029f6: 2200 movs r2, #0
80029f8: 2104 movs r1, #4
80029fa: 487b ldr r0, [pc, #492] @ (8002be8 <SetMot+0x2dc>)
80029fc: f002 f831 bl 8004a62 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8002a00: e0eb b.n 8002bda <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
8002a02: 2108 movs r1, #8
8002a04: 4877 ldr r0, [pc, #476] @ (8002be4 <SetMot+0x2d8>)
8002a06: f7ff ff0b bl 8002820 <IsPwmRunning>
8002a0a: 4603 mov r3, r0
8002a0c: 2b00 cmp r3, #0
8002a0e: d006 beq.n 8002a1e <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
8002a10: 88bb ldrh r3, [r7, #4]
8002a12: 461a mov r2, r3
8002a14: 2108 movs r1, #8
8002a16: 4873 ldr r0, [pc, #460] @ (8002be4 <SetMot+0x2d8>)
8002a18: f7ff ff4f bl 80028ba <SetMotPwm>
break;
8002a1c: e0dd b.n 8002bda <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8002a1e: 2201 movs r2, #1
8002a20: 2104 movs r1, #4
8002a22: 4871 ldr r0, [pc, #452] @ (8002be8 <SetMot+0x2dc>)
8002a24: f002 f81d bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8002a28: 88bb ldrh r3, [r7, #4]
8002a2a: 461a mov r2, r3
8002a2c: 2108 movs r1, #8
8002a2e: 486d ldr r0, [pc, #436] @ (8002be4 <SetMot+0x2d8>)
8002a30: f7ff ff18 bl 8002864 <StartMot>
break;
8002a34: e0d1 b.n 8002bda <SetMot+0x2ce>
if(pwmval==0){
8002a36: 88bb ldrh r3, [r7, #4]
8002a38: 2b00 cmp r3, #0
8002a3a: d109 bne.n 8002a50 <SetMot+0x144>
StopMot(timMot2,BWMot2);
8002a3c: 210c movs r1, #12
8002a3e: 4869 ldr r0, [pc, #420] @ (8002be4 <SetMot+0x2d8>)
8002a40: f7ff ff03 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8002a44: 2200 movs r2, #0
8002a46: 2104 movs r1, #4
8002a48: 4867 ldr r0, [pc, #412] @ (8002be8 <SetMot+0x2dc>)
8002a4a: f002 f80a bl 8004a62 <HAL_GPIO_WritePin>
break;
8002a4e: e0c4 b.n 8002bda <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
8002a50: 210c movs r1, #12
8002a52: 4864 ldr r0, [pc, #400] @ (8002be4 <SetMot+0x2d8>)
8002a54: f7ff fee4 bl 8002820 <IsPwmRunning>
8002a58: 4603 mov r3, r0
8002a5a: 2b00 cmp r3, #0
8002a5c: d006 beq.n 8002a6c <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
8002a5e: 88bb ldrh r3, [r7, #4]
8002a60: 461a mov r2, r3
8002a62: 210c movs r1, #12
8002a64: 485f ldr r0, [pc, #380] @ (8002be4 <SetMot+0x2d8>)
8002a66: f7ff ff28 bl 80028ba <SetMotPwm>
break;
8002a6a: e0b6 b.n 8002bda <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8002a6c: 2201 movs r2, #1
8002a6e: 2104 movs r1, #4
8002a70: 485d ldr r0, [pc, #372] @ (8002be8 <SetMot+0x2dc>)
8002a72: f001 fff6 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8002a76: 88bb ldrh r3, [r7, #4]
8002a78: 461a mov r2, r3
8002a7a: 210c movs r1, #12
8002a7c: 4859 ldr r0, [pc, #356] @ (8002be4 <SetMot+0x2d8>)
8002a7e: f7ff fef1 bl 8002864 <StartMot>
break;
8002a82: e0aa b.n 8002bda <SetMot+0x2ce>
case 3:
if(dir==FW){
8002a84: 79bb ldrb r3, [r7, #6]
8002a86: 2b00 cmp r3, #0
8002a88: d128 bne.n 8002adc <SetMot+0x1d0>
if(pwmval==0){
8002a8a: 88bb ldrh r3, [r7, #4]
8002a8c: 2b00 cmp r3, #0
8002a8e: d10a bne.n 8002aa6 <SetMot+0x19a>
StopMot(timMot3,FWMot3);
8002a90: 2100 movs r1, #0
8002a92: 4856 ldr r0, [pc, #344] @ (8002bec <SetMot+0x2e0>)
8002a94: f7ff fed9 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8002a98: 2200 movs r2, #0
8002a9a: f44f 6180 mov.w r1, #1024 @ 0x400
8002a9e: 4852 ldr r0, [pc, #328] @ (8002be8 <SetMot+0x2dc>)
8002aa0: f001 ffdf bl 8004a62 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8002aa4: e099 b.n 8002bda <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
8002aa6: 2100 movs r1, #0
8002aa8: 4850 ldr r0, [pc, #320] @ (8002bec <SetMot+0x2e0>)
8002aaa: f7ff feb9 bl 8002820 <IsPwmRunning>
8002aae: 4603 mov r3, r0
8002ab0: 2b00 cmp r3, #0
8002ab2: d006 beq.n 8002ac2 <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
8002ab4: 88bb ldrh r3, [r7, #4]
8002ab6: 461a mov r2, r3
8002ab8: 2100 movs r1, #0
8002aba: 484c ldr r0, [pc, #304] @ (8002bec <SetMot+0x2e0>)
8002abc: f7ff fefd bl 80028ba <SetMotPwm>
break;
8002ac0: e08b b.n 8002bda <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8002ac2: 2201 movs r2, #1
8002ac4: f44f 6180 mov.w r1, #1024 @ 0x400
8002ac8: 4847 ldr r0, [pc, #284] @ (8002be8 <SetMot+0x2dc>)
8002aca: f001 ffca bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8002ace: 88bb ldrh r3, [r7, #4]
8002ad0: 461a mov r2, r3
8002ad2: 2100 movs r1, #0
8002ad4: 4845 ldr r0, [pc, #276] @ (8002bec <SetMot+0x2e0>)
8002ad6: f7ff fec5 bl 8002864 <StartMot>
break;
8002ada: e07e b.n 8002bda <SetMot+0x2ce>
if(pwmval==0){
8002adc: 88bb ldrh r3, [r7, #4]
8002ade: 2b00 cmp r3, #0
8002ae0: d10a bne.n 8002af8 <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
8002ae2: 2104 movs r1, #4
8002ae4: 4841 ldr r0, [pc, #260] @ (8002bec <SetMot+0x2e0>)
8002ae6: f7ff feb0 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8002aea: 2200 movs r2, #0
8002aec: f44f 6180 mov.w r1, #1024 @ 0x400
8002af0: 483d ldr r0, [pc, #244] @ (8002be8 <SetMot+0x2dc>)
8002af2: f001 ffb6 bl 8004a62 <HAL_GPIO_WritePin>
break;
8002af6: e070 b.n 8002bda <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
8002af8: 2104 movs r1, #4
8002afa: 483c ldr r0, [pc, #240] @ (8002bec <SetMot+0x2e0>)
8002afc: f7ff fe90 bl 8002820 <IsPwmRunning>
8002b00: 4603 mov r3, r0
8002b02: 2b00 cmp r3, #0
8002b04: d006 beq.n 8002b14 <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
8002b06: 88bb ldrh r3, [r7, #4]
8002b08: 461a mov r2, r3
8002b0a: 2104 movs r1, #4
8002b0c: 4837 ldr r0, [pc, #220] @ (8002bec <SetMot+0x2e0>)
8002b0e: f7ff fed4 bl 80028ba <SetMotPwm>
break;
8002b12: e062 b.n 8002bda <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8002b14: 2201 movs r2, #1
8002b16: f44f 6180 mov.w r1, #1024 @ 0x400
8002b1a: 4833 ldr r0, [pc, #204] @ (8002be8 <SetMot+0x2dc>)
8002b1c: f001 ffa1 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8002b20: 88bb ldrh r3, [r7, #4]
8002b22: 461a mov r2, r3
8002b24: 2104 movs r1, #4
8002b26: 4831 ldr r0, [pc, #196] @ (8002bec <SetMot+0x2e0>)
8002b28: f7ff fe9c bl 8002864 <StartMot>
break;
8002b2c: e055 b.n 8002bda <SetMot+0x2ce>
case 4:
if(dir==FW){
8002b2e: 79bb ldrb r3, [r7, #6]
8002b30: 2b00 cmp r3, #0
8002b32: d128 bne.n 8002b86 <SetMot+0x27a>
if(pwmval==0){
8002b34: 88bb ldrh r3, [r7, #4]
8002b36: 2b00 cmp r3, #0
8002b38: d10a bne.n 8002b50 <SetMot+0x244>
StopMot(timMot4,FWMot4);
8002b3a: 2108 movs r1, #8
8002b3c: 482b ldr r0, [pc, #172] @ (8002bec <SetMot+0x2e0>)
8002b3e: f7ff fe84 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8002b42: 2200 movs r2, #0
8002b44: f44f 6100 mov.w r1, #2048 @ 0x800
8002b48: 4827 ldr r0, [pc, #156] @ (8002be8 <SetMot+0x2dc>)
8002b4a: f001 ff8a bl 8004a62 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8002b4e: e044 b.n 8002bda <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
8002b50: 2108 movs r1, #8
8002b52: 4826 ldr r0, [pc, #152] @ (8002bec <SetMot+0x2e0>)
8002b54: f7ff fe64 bl 8002820 <IsPwmRunning>
8002b58: 4603 mov r3, r0
8002b5a: 2b00 cmp r3, #0
8002b5c: d006 beq.n 8002b6c <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
8002b5e: 88bb ldrh r3, [r7, #4]
8002b60: 461a mov r2, r3
8002b62: 2108 movs r1, #8
8002b64: 4821 ldr r0, [pc, #132] @ (8002bec <SetMot+0x2e0>)
8002b66: f7ff fea8 bl 80028ba <SetMotPwm>
break;
8002b6a: e036 b.n 8002bda <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8002b6c: 2201 movs r2, #1
8002b6e: f44f 6100 mov.w r1, #2048 @ 0x800
8002b72: 481d ldr r0, [pc, #116] @ (8002be8 <SetMot+0x2dc>)
8002b74: f001 ff75 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8002b78: 88bb ldrh r3, [r7, #4]
8002b7a: 461a mov r2, r3
8002b7c: 2108 movs r1, #8
8002b7e: 481b ldr r0, [pc, #108] @ (8002bec <SetMot+0x2e0>)
8002b80: f7ff fe70 bl 8002864 <StartMot>
break;
8002b84: e029 b.n 8002bda <SetMot+0x2ce>
if(pwmval==0){
8002b86: 88bb ldrh r3, [r7, #4]
8002b88: 2b00 cmp r3, #0
8002b8a: d10a bne.n 8002ba2 <SetMot+0x296>
StopMot(timMot4,BWMot4);
8002b8c: 210c movs r1, #12
8002b8e: 4817 ldr r0, [pc, #92] @ (8002bec <SetMot+0x2e0>)
8002b90: f7ff fe5b bl 800284a <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8002b94: 2200 movs r2, #0
8002b96: f44f 6100 mov.w r1, #2048 @ 0x800
8002b9a: 4813 ldr r0, [pc, #76] @ (8002be8 <SetMot+0x2dc>)
8002b9c: f001 ff61 bl 8004a62 <HAL_GPIO_WritePin>
break;
8002ba0: e01b b.n 8002bda <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
8002ba2: 210c movs r1, #12
8002ba4: 4811 ldr r0, [pc, #68] @ (8002bec <SetMot+0x2e0>)
8002ba6: f7ff fe3b bl 8002820 <IsPwmRunning>
8002baa: 4603 mov r3, r0
8002bac: 2b00 cmp r3, #0
8002bae: d006 beq.n 8002bbe <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
8002bb0: 88bb ldrh r3, [r7, #4]
8002bb2: 461a mov r2, r3
8002bb4: 210c movs r1, #12
8002bb6: 480d ldr r0, [pc, #52] @ (8002bec <SetMot+0x2e0>)
8002bb8: f7ff fe7f bl 80028ba <SetMotPwm>
break;
8002bbc: e00d b.n 8002bda <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8002bbe: 2201 movs r2, #1
8002bc0: f44f 6100 mov.w r1, #2048 @ 0x800
8002bc4: 4808 ldr r0, [pc, #32] @ (8002be8 <SetMot+0x2dc>)
8002bc6: f001 ff4c bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8002bca: 88bb ldrh r3, [r7, #4]
8002bcc: 461a mov r2, r3
8002bce: 210c movs r1, #12
8002bd0: 4806 ldr r0, [pc, #24] @ (8002bec <SetMot+0x2e0>)
8002bd2: f7ff fe47 bl 8002864 <StartMot>
break;
8002bd6: e000 b.n 8002bda <SetMot+0x2ce>
default:
break;
8002bd8: bf00 nop
}
}
8002bda: bf00 nop
8002bdc: 3708 adds r7, #8
8002bde: 46bd mov sp, r7
8002be0: bd80 pop {r7, pc}
8002be2: bf00 nop
8002be4: 20000308 .word 0x20000308
8002be8: 40010c00 .word 0x40010c00
8002bec: 20000350 .word 0x20000350
08002bf0 <SetMotPerc>:
void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){
8002bf0: b580 push {r7, lr}
8002bf2: b084 sub sp, #16
8002bf4: af00 add r7, sp, #0
8002bf6: 4603 mov r3, r0
8002bf8: 71fb strb r3, [r7, #7]
8002bfa: 460b mov r3, r1
8002bfc: 71bb strb r3, [r7, #6]
8002bfe: 4613 mov r3, r2
8002c00: 717b strb r3, [r7, #5]
uint16_t pwmval;
uint32_t tempval;
tempval=perc;
8002c02: 797b ldrb r3, [r7, #5]
8002c04: 60fb str r3, [r7, #12]
tempval*=16384;
8002c06: 68fb ldr r3, [r7, #12]
8002c08: 039b lsls r3, r3, #14
8002c0a: 60fb str r3, [r7, #12]
tempval/=100;
8002c0c: 68fb ldr r3, [r7, #12]
8002c0e: 4ab4 ldr r2, [pc, #720] @ (8002ee0 <SetMotPerc+0x2f0>)
8002c10: fba2 2303 umull r2, r3, r2, r3
8002c14: 095b lsrs r3, r3, #5
8002c16: 60fb str r3, [r7, #12]
pwmval=(uint16_t)tempval;
8002c18: 68fb ldr r3, [r7, #12]
8002c1a: 817b strh r3, [r7, #10]
switch(mot){
8002c1c: 79fb ldrb r3, [r7, #7]
8002c1e: 3b01 subs r3, #1
8002c20: 2b03 cmp r3, #3
8002c22: f200 8157 bhi.w 8002ed4 <SetMotPerc+0x2e4>
8002c26: a201 add r2, pc, #4 @ (adr r2, 8002c2c <SetMotPerc+0x3c>)
8002c28: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002c2c: 08002c3d .word 0x08002c3d
8002c30: 08002cdf .word 0x08002cdf
8002c34: 08002d81 .word 0x08002d81
8002c38: 08002e2b .word 0x08002e2b
case 1:
if(dir==FW){
8002c3c: 79bb ldrb r3, [r7, #6]
8002c3e: 2b00 cmp r3, #0
8002c40: d126 bne.n 8002c90 <SetMotPerc+0xa0>
if(pwmval==0){
8002c42: 897b ldrh r3, [r7, #10]
8002c44: 2b00 cmp r3, #0
8002c46: d109 bne.n 8002c5c <SetMotPerc+0x6c>
StopMot(timMot1,FWMot1);
8002c48: 2100 movs r1, #0
8002c4a: 48a6 ldr r0, [pc, #664] @ (8002ee4 <SetMotPerc+0x2f4>)
8002c4c: f7ff fdfd bl 800284a <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8002c50: 2200 movs r2, #0
8002c52: 2102 movs r1, #2
8002c54: 48a4 ldr r0, [pc, #656] @ (8002ee8 <SetMotPerc+0x2f8>)
8002c56: f001 ff04 bl 8004a62 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8002c5a: e13c b.n 8002ed6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, FWMot1)){
8002c5c: 2100 movs r1, #0
8002c5e: 48a1 ldr r0, [pc, #644] @ (8002ee4 <SetMotPerc+0x2f4>)
8002c60: f7ff fdde bl 8002820 <IsPwmRunning>
8002c64: 4603 mov r3, r0
8002c66: 2b00 cmp r3, #0
8002c68: d006 beq.n 8002c78 <SetMotPerc+0x88>
SetMotPwm(timMot1,FWMot1,pwmval);
8002c6a: 897b ldrh r3, [r7, #10]
8002c6c: 461a mov r2, r3
8002c6e: 2100 movs r1, #0
8002c70: 489c ldr r0, [pc, #624] @ (8002ee4 <SetMotPerc+0x2f4>)
8002c72: f7ff fe22 bl 80028ba <SetMotPwm>
break;
8002c76: e12e b.n 8002ed6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8002c78: 2201 movs r2, #1
8002c7a: 2102 movs r1, #2
8002c7c: 489a ldr r0, [pc, #616] @ (8002ee8 <SetMotPerc+0x2f8>)
8002c7e: f001 fef0 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
8002c82: 897b ldrh r3, [r7, #10]
8002c84: 461a mov r2, r3
8002c86: 2100 movs r1, #0
8002c88: 4896 ldr r0, [pc, #600] @ (8002ee4 <SetMotPerc+0x2f4>)
8002c8a: f7ff fdeb bl 8002864 <StartMot>
break;
8002c8e: e122 b.n 8002ed6 <SetMotPerc+0x2e6>
if(pwmval==0){
8002c90: 897b ldrh r3, [r7, #10]
8002c92: 2b00 cmp r3, #0
8002c94: d109 bne.n 8002caa <SetMotPerc+0xba>
StopMot(timMot1,BWMot1);
8002c96: 2104 movs r1, #4
8002c98: 4892 ldr r0, [pc, #584] @ (8002ee4 <SetMotPerc+0x2f4>)
8002c9a: f7ff fdd6 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8002c9e: 2200 movs r2, #0
8002ca0: 2102 movs r1, #2
8002ca2: 4891 ldr r0, [pc, #580] @ (8002ee8 <SetMotPerc+0x2f8>)
8002ca4: f001 fedd bl 8004a62 <HAL_GPIO_WritePin>
break;
8002ca8: e115 b.n 8002ed6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, BWMot1)){
8002caa: 2104 movs r1, #4
8002cac: 488d ldr r0, [pc, #564] @ (8002ee4 <SetMotPerc+0x2f4>)
8002cae: f7ff fdb7 bl 8002820 <IsPwmRunning>
8002cb2: 4603 mov r3, r0
8002cb4: 2b00 cmp r3, #0
8002cb6: d006 beq.n 8002cc6 <SetMotPerc+0xd6>
SetMotPwm(timMot1,BWMot1,pwmval);
8002cb8: 897b ldrh r3, [r7, #10]
8002cba: 461a mov r2, r3
8002cbc: 2104 movs r1, #4
8002cbe: 4889 ldr r0, [pc, #548] @ (8002ee4 <SetMotPerc+0x2f4>)
8002cc0: f7ff fdfb bl 80028ba <SetMotPwm>
break;
8002cc4: e107 b.n 8002ed6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8002cc6: 2201 movs r2, #1
8002cc8: 2102 movs r1, #2
8002cca: 4887 ldr r0, [pc, #540] @ (8002ee8 <SetMotPerc+0x2f8>)
8002ccc: f001 fec9 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
8002cd0: 897b ldrh r3, [r7, #10]
8002cd2: 461a mov r2, r3
8002cd4: 2104 movs r1, #4
8002cd6: 4883 ldr r0, [pc, #524] @ (8002ee4 <SetMotPerc+0x2f4>)
8002cd8: f7ff fdc4 bl 8002864 <StartMot>
break;
8002cdc: e0fb b.n 8002ed6 <SetMotPerc+0x2e6>
case 2:
if(dir==FW){
8002cde: 79bb ldrb r3, [r7, #6]
8002ce0: 2b00 cmp r3, #0
8002ce2: d126 bne.n 8002d32 <SetMotPerc+0x142>
if(pwmval==0){
8002ce4: 897b ldrh r3, [r7, #10]
8002ce6: 2b00 cmp r3, #0
8002ce8: d109 bne.n 8002cfe <SetMotPerc+0x10e>
StopMot(timMot2,FWMot2);
8002cea: 2108 movs r1, #8
8002cec: 487d ldr r0, [pc, #500] @ (8002ee4 <SetMotPerc+0x2f4>)
8002cee: f7ff fdac bl 800284a <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8002cf2: 2200 movs r2, #0
8002cf4: 2104 movs r1, #4
8002cf6: 487c ldr r0, [pc, #496] @ (8002ee8 <SetMotPerc+0x2f8>)
8002cf8: f001 feb3 bl 8004a62 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8002cfc: e0eb b.n 8002ed6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, FWMot2)){
8002cfe: 2108 movs r1, #8
8002d00: 4878 ldr r0, [pc, #480] @ (8002ee4 <SetMotPerc+0x2f4>)
8002d02: f7ff fd8d bl 8002820 <IsPwmRunning>
8002d06: 4603 mov r3, r0
8002d08: 2b00 cmp r3, #0
8002d0a: d006 beq.n 8002d1a <SetMotPerc+0x12a>
SetMotPwm(timMot2,FWMot2,pwmval);
8002d0c: 897b ldrh r3, [r7, #10]
8002d0e: 461a mov r2, r3
8002d10: 2108 movs r1, #8
8002d12: 4874 ldr r0, [pc, #464] @ (8002ee4 <SetMotPerc+0x2f4>)
8002d14: f7ff fdd1 bl 80028ba <SetMotPwm>
break;
8002d18: e0dd b.n 8002ed6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8002d1a: 2201 movs r2, #1
8002d1c: 2104 movs r1, #4
8002d1e: 4872 ldr r0, [pc, #456] @ (8002ee8 <SetMotPerc+0x2f8>)
8002d20: f001 fe9f bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8002d24: 897b ldrh r3, [r7, #10]
8002d26: 461a mov r2, r3
8002d28: 2108 movs r1, #8
8002d2a: 486e ldr r0, [pc, #440] @ (8002ee4 <SetMotPerc+0x2f4>)
8002d2c: f7ff fd9a bl 8002864 <StartMot>
break;
8002d30: e0d1 b.n 8002ed6 <SetMotPerc+0x2e6>
if(pwmval==0){
8002d32: 897b ldrh r3, [r7, #10]
8002d34: 2b00 cmp r3, #0
8002d36: d109 bne.n 8002d4c <SetMotPerc+0x15c>
StopMot(timMot2,BWMot2);
8002d38: 210c movs r1, #12
8002d3a: 486a ldr r0, [pc, #424] @ (8002ee4 <SetMotPerc+0x2f4>)
8002d3c: f7ff fd85 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8002d40: 2200 movs r2, #0
8002d42: 2104 movs r1, #4
8002d44: 4868 ldr r0, [pc, #416] @ (8002ee8 <SetMotPerc+0x2f8>)
8002d46: f001 fe8c bl 8004a62 <HAL_GPIO_WritePin>
break;
8002d4a: e0c4 b.n 8002ed6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, BWMot2)){
8002d4c: 210c movs r1, #12
8002d4e: 4865 ldr r0, [pc, #404] @ (8002ee4 <SetMotPerc+0x2f4>)
8002d50: f7ff fd66 bl 8002820 <IsPwmRunning>
8002d54: 4603 mov r3, r0
8002d56: 2b00 cmp r3, #0
8002d58: d006 beq.n 8002d68 <SetMotPerc+0x178>
SetMotPwm(timMot2,BWMot2,pwmval);
8002d5a: 897b ldrh r3, [r7, #10]
8002d5c: 461a mov r2, r3
8002d5e: 210c movs r1, #12
8002d60: 4860 ldr r0, [pc, #384] @ (8002ee4 <SetMotPerc+0x2f4>)
8002d62: f7ff fdaa bl 80028ba <SetMotPwm>
break;
8002d66: e0b6 b.n 8002ed6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8002d68: 2201 movs r2, #1
8002d6a: 2104 movs r1, #4
8002d6c: 485e ldr r0, [pc, #376] @ (8002ee8 <SetMotPerc+0x2f8>)
8002d6e: f001 fe78 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8002d72: 897b ldrh r3, [r7, #10]
8002d74: 461a mov r2, r3
8002d76: 210c movs r1, #12
8002d78: 485a ldr r0, [pc, #360] @ (8002ee4 <SetMotPerc+0x2f4>)
8002d7a: f7ff fd73 bl 8002864 <StartMot>
break;
8002d7e: e0aa b.n 8002ed6 <SetMotPerc+0x2e6>
case 3:
if(dir==FW){
8002d80: 79bb ldrb r3, [r7, #6]
8002d82: 2b00 cmp r3, #0
8002d84: d128 bne.n 8002dd8 <SetMotPerc+0x1e8>
if(pwmval==0){
8002d86: 897b ldrh r3, [r7, #10]
8002d88: 2b00 cmp r3, #0
8002d8a: d10a bne.n 8002da2 <SetMotPerc+0x1b2>
StopMot(timMot3,FWMot3);
8002d8c: 2100 movs r1, #0
8002d8e: 4857 ldr r0, [pc, #348] @ (8002eec <SetMotPerc+0x2fc>)
8002d90: f7ff fd5b bl 800284a <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8002d94: 2200 movs r2, #0
8002d96: f44f 6180 mov.w r1, #1024 @ 0x400
8002d9a: 4853 ldr r0, [pc, #332] @ (8002ee8 <SetMotPerc+0x2f8>)
8002d9c: f001 fe61 bl 8004a62 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8002da0: e099 b.n 8002ed6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, FWMot3)){
8002da2: 2100 movs r1, #0
8002da4: 4851 ldr r0, [pc, #324] @ (8002eec <SetMotPerc+0x2fc>)
8002da6: f7ff fd3b bl 8002820 <IsPwmRunning>
8002daa: 4603 mov r3, r0
8002dac: 2b00 cmp r3, #0
8002dae: d006 beq.n 8002dbe <SetMotPerc+0x1ce>
SetMotPwm(timMot3,FWMot3,pwmval);
8002db0: 897b ldrh r3, [r7, #10]
8002db2: 461a mov r2, r3
8002db4: 2100 movs r1, #0
8002db6: 484d ldr r0, [pc, #308] @ (8002eec <SetMotPerc+0x2fc>)
8002db8: f7ff fd7f bl 80028ba <SetMotPwm>
break;
8002dbc: e08b b.n 8002ed6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8002dbe: 2201 movs r2, #1
8002dc0: f44f 6180 mov.w r1, #1024 @ 0x400
8002dc4: 4848 ldr r0, [pc, #288] @ (8002ee8 <SetMotPerc+0x2f8>)
8002dc6: f001 fe4c bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8002dca: 897b ldrh r3, [r7, #10]
8002dcc: 461a mov r2, r3
8002dce: 2100 movs r1, #0
8002dd0: 4846 ldr r0, [pc, #280] @ (8002eec <SetMotPerc+0x2fc>)
8002dd2: f7ff fd47 bl 8002864 <StartMot>
break;
8002dd6: e07e b.n 8002ed6 <SetMotPerc+0x2e6>
if(pwmval==0){
8002dd8: 897b ldrh r3, [r7, #10]
8002dda: 2b00 cmp r3, #0
8002ddc: d10a bne.n 8002df4 <SetMotPerc+0x204>
StopMot(timMot3,BWMot3);
8002dde: 2104 movs r1, #4
8002de0: 4842 ldr r0, [pc, #264] @ (8002eec <SetMotPerc+0x2fc>)
8002de2: f7ff fd32 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8002de6: 2200 movs r2, #0
8002de8: f44f 6180 mov.w r1, #1024 @ 0x400
8002dec: 483e ldr r0, [pc, #248] @ (8002ee8 <SetMotPerc+0x2f8>)
8002dee: f001 fe38 bl 8004a62 <HAL_GPIO_WritePin>
break;
8002df2: e070 b.n 8002ed6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, BWMot3)){
8002df4: 2104 movs r1, #4
8002df6: 483d ldr r0, [pc, #244] @ (8002eec <SetMotPerc+0x2fc>)
8002df8: f7ff fd12 bl 8002820 <IsPwmRunning>
8002dfc: 4603 mov r3, r0
8002dfe: 2b00 cmp r3, #0
8002e00: d006 beq.n 8002e10 <SetMotPerc+0x220>
SetMotPwm(timMot3,BWMot3,pwmval);
8002e02: 897b ldrh r3, [r7, #10]
8002e04: 461a mov r2, r3
8002e06: 2104 movs r1, #4
8002e08: 4838 ldr r0, [pc, #224] @ (8002eec <SetMotPerc+0x2fc>)
8002e0a: f7ff fd56 bl 80028ba <SetMotPwm>
break;
8002e0e: e062 b.n 8002ed6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8002e10: 2201 movs r2, #1
8002e12: f44f 6180 mov.w r1, #1024 @ 0x400
8002e16: 4834 ldr r0, [pc, #208] @ (8002ee8 <SetMotPerc+0x2f8>)
8002e18: f001 fe23 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8002e1c: 897b ldrh r3, [r7, #10]
8002e1e: 461a mov r2, r3
8002e20: 2104 movs r1, #4
8002e22: 4832 ldr r0, [pc, #200] @ (8002eec <SetMotPerc+0x2fc>)
8002e24: f7ff fd1e bl 8002864 <StartMot>
break;
8002e28: e055 b.n 8002ed6 <SetMotPerc+0x2e6>
case 4:
if(dir==FW){
8002e2a: 79bb ldrb r3, [r7, #6]
8002e2c: 2b00 cmp r3, #0
8002e2e: d128 bne.n 8002e82 <SetMotPerc+0x292>
if(pwmval==0){
8002e30: 897b ldrh r3, [r7, #10]
8002e32: 2b00 cmp r3, #0
8002e34: d10a bne.n 8002e4c <SetMotPerc+0x25c>
StopMot(timMot4,FWMot4);
8002e36: 2108 movs r1, #8
8002e38: 482c ldr r0, [pc, #176] @ (8002eec <SetMotPerc+0x2fc>)
8002e3a: f7ff fd06 bl 800284a <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8002e3e: 2200 movs r2, #0
8002e40: f44f 6100 mov.w r1, #2048 @ 0x800
8002e44: 4828 ldr r0, [pc, #160] @ (8002ee8 <SetMotPerc+0x2f8>)
8002e46: f001 fe0c bl 8004a62 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8002e4a: e044 b.n 8002ed6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, FWMot4)){
8002e4c: 2108 movs r1, #8
8002e4e: 4827 ldr r0, [pc, #156] @ (8002eec <SetMotPerc+0x2fc>)
8002e50: f7ff fce6 bl 8002820 <IsPwmRunning>
8002e54: 4603 mov r3, r0
8002e56: 2b00 cmp r3, #0
8002e58: d006 beq.n 8002e68 <SetMotPerc+0x278>
SetMotPwm(timMot4,FWMot4,pwmval);
8002e5a: 897b ldrh r3, [r7, #10]
8002e5c: 461a mov r2, r3
8002e5e: 2108 movs r1, #8
8002e60: 4822 ldr r0, [pc, #136] @ (8002eec <SetMotPerc+0x2fc>)
8002e62: f7ff fd2a bl 80028ba <SetMotPwm>
break;
8002e66: e036 b.n 8002ed6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8002e68: 2201 movs r2, #1
8002e6a: f44f 6100 mov.w r1, #2048 @ 0x800
8002e6e: 481e ldr r0, [pc, #120] @ (8002ee8 <SetMotPerc+0x2f8>)
8002e70: f001 fdf7 bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8002e74: 897b ldrh r3, [r7, #10]
8002e76: 461a mov r2, r3
8002e78: 2108 movs r1, #8
8002e7a: 481c ldr r0, [pc, #112] @ (8002eec <SetMotPerc+0x2fc>)
8002e7c: f7ff fcf2 bl 8002864 <StartMot>
break;
8002e80: e029 b.n 8002ed6 <SetMotPerc+0x2e6>
if(pwmval==0){
8002e82: 897b ldrh r3, [r7, #10]
8002e84: 2b00 cmp r3, #0
8002e86: d10a bne.n 8002e9e <SetMotPerc+0x2ae>
StopMot(timMot4,BWMot4);
8002e88: 210c movs r1, #12
8002e8a: 4818 ldr r0, [pc, #96] @ (8002eec <SetMotPerc+0x2fc>)
8002e8c: f7ff fcdd bl 800284a <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8002e90: 2200 movs r2, #0
8002e92: f44f 6100 mov.w r1, #2048 @ 0x800
8002e96: 4814 ldr r0, [pc, #80] @ (8002ee8 <SetMotPerc+0x2f8>)
8002e98: f001 fde3 bl 8004a62 <HAL_GPIO_WritePin>
break;
8002e9c: e01b b.n 8002ed6 <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, BWMot4)){
8002e9e: 210c movs r1, #12
8002ea0: 4812 ldr r0, [pc, #72] @ (8002eec <SetMotPerc+0x2fc>)
8002ea2: f7ff fcbd bl 8002820 <IsPwmRunning>
8002ea6: 4603 mov r3, r0
8002ea8: 2b00 cmp r3, #0
8002eaa: d006 beq.n 8002eba <SetMotPerc+0x2ca>
SetMotPwm(timMot4,BWMot4,pwmval);
8002eac: 897b ldrh r3, [r7, #10]
8002eae: 461a mov r2, r3
8002eb0: 210c movs r1, #12
8002eb2: 480e ldr r0, [pc, #56] @ (8002eec <SetMotPerc+0x2fc>)
8002eb4: f7ff fd01 bl 80028ba <SetMotPwm>
break;
8002eb8: e00d b.n 8002ed6 <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8002eba: 2201 movs r2, #1
8002ebc: f44f 6100 mov.w r1, #2048 @ 0x800
8002ec0: 4809 ldr r0, [pc, #36] @ (8002ee8 <SetMotPerc+0x2f8>)
8002ec2: f001 fdce bl 8004a62 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8002ec6: 897b ldrh r3, [r7, #10]
8002ec8: 461a mov r2, r3
8002eca: 210c movs r1, #12
8002ecc: 4807 ldr r0, [pc, #28] @ (8002eec <SetMotPerc+0x2fc>)
8002ece: f7ff fcc9 bl 8002864 <StartMot>
break;
8002ed2: e000 b.n 8002ed6 <SetMotPerc+0x2e6>
default:
break;
8002ed4: bf00 nop
}
}
8002ed6: bf00 nop
8002ed8: 3710 adds r7, #16
8002eda: 46bd mov sp, r7
8002edc: bd80 pop {r7, pc}
8002ede: bf00 nop
8002ee0: 51eb851f .word 0x51eb851f
8002ee4: 20000308 .word 0x20000308
8002ee8: 40010c00 .word 0x40010c00
8002eec: 20000350 .word 0x20000350
08002ef0 <ramp>:
uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){
8002ef0: b590 push {r4, r7, lr}
8002ef2: b085 sub sp, #20
8002ef4: af00 add r7, sp, #0
8002ef6: 4604 mov r4, r0
8002ef8: 4608 mov r0, r1
8002efa: 4611 mov r1, r2
8002efc: 461a mov r2, r3
8002efe: 4623 mov r3, r4
8002f00: 71fb strb r3, [r7, #7]
8002f02: 4603 mov r3, r0
8002f04: 71bb strb r3, [r7, #6]
8002f06: 460b mov r3, r1
8002f08: 717b strb r3, [r7, #5]
8002f0a: 4613 mov r3, r2
8002f0c: 713b strb r3, [r7, #4]
static uint8_t memrtramp[4];
uint16_t delta;
switch(mode){
8002f0e: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8002f12: 2b00 cmp r3, #0
8002f14: d002 beq.n 8002f1c <ramp+0x2c>
8002f16: 2b0a cmp r3, #10
8002f18: d013 beq.n 8002f42 <ramp+0x52>
8002f1a: e0a5 b.n 8003068 <ramp+0x178>
case RAMPINIT:
memrtramp[mot-1]=percStart=tr;
8002f1c: f897 3020 ldrb.w r3, [r7, #32]
8002f20: 717b strb r3, [r7, #5]
8002f22: 79fb ldrb r3, [r7, #7]
8002f24: 3b01 subs r3, #1
8002f26: 4953 ldr r1, [pc, #332] @ (8003074 <ramp+0x184>)
8002f28: 797a ldrb r2, [r7, #5]
8002f2a: 54ca strb r2, [r1, r3]
SetMotPerc(mot,dir,mrampstart[mot-1]);
8002f2c: 79fb ldrb r3, [r7, #7]
8002f2e: 3b01 subs r3, #1
8002f30: 4a51 ldr r2, [pc, #324] @ (8003078 <ramp+0x188>)
8002f32: 5cd2 ldrb r2, [r2, r3]
8002f34: 79b9 ldrb r1, [r7, #6]
8002f36: 79fb ldrb r3, [r7, #7]
8002f38: 4618 mov r0, r3
8002f3a: f7ff fe59 bl 8002bf0 <SetMotPerc>
return DONE;
8002f3e: 2300 movs r3, #0
8002f40: e093 b.n 800306a <ramp+0x17a>
case RAMPRUN:
if(memrtramp[mot-1]!=rtramp[mot-1]){
8002f42: 79fb ldrb r3, [r7, #7]
8002f44: 3b01 subs r3, #1
8002f46: 4a4b ldr r2, [pc, #300] @ (8003074 <ramp+0x184>)
8002f48: 5cd2 ldrb r2, [r2, r3]
8002f4a: 79fb ldrb r3, [r7, #7]
8002f4c: 3b01 subs r3, #1
8002f4e: 494b ldr r1, [pc, #300] @ (800307c <ramp+0x18c>)
8002f50: 5ccb ldrb r3, [r1, r3]
8002f52: b2db uxtb r3, r3
8002f54: 429a cmp r2, r3
8002f56: f000 8085 beq.w 8003064 <ramp+0x174>
memrtramp[mot-1]=rtramp[mot-1];
8002f5a: 79fb ldrb r3, [r7, #7]
8002f5c: 1e5a subs r2, r3, #1
8002f5e: 79fb ldrb r3, [r7, #7]
8002f60: 3b01 subs r3, #1
8002f62: 4946 ldr r1, [pc, #280] @ (800307c <ramp+0x18c>)
8002f64: 5c8a ldrb r2, [r1, r2]
8002f66: b2d1 uxtb r1, r2
8002f68: 4a42 ldr r2, [pc, #264] @ (8003074 <ramp+0x184>)
8002f6a: 54d1 strb r1, [r2, r3]
if(rtramp[mot-1]){
8002f6c: 79fb ldrb r3, [r7, #7]
8002f6e: 3b01 subs r3, #1
8002f70: 4a42 ldr r2, [pc, #264] @ (800307c <ramp+0x18c>)
8002f72: 5cd3 ldrb r3, [r2, r3]
8002f74: b2db uxtb r3, r3
8002f76: 2b00 cmp r3, #0
8002f78: d06c beq.n 8003054 <ramp+0x164>
if(mrampstart[mot-1]>percEnd){
8002f7a: 79fb ldrb r3, [r7, #7]
8002f7c: 3b01 subs r3, #1
8002f7e: 4a3e ldr r2, [pc, #248] @ (8003078 <ramp+0x188>)
8002f80: 5cd3 ldrb r3, [r2, r3]
8002f82: 793a ldrb r2, [r7, #4]
8002f84: 429a cmp r2, r3
8002f86: d22b bcs.n 8002fe0 <ramp+0xf0>
delta=mrampstart[mot-1]-percEnd;
8002f88: 79fb ldrb r3, [r7, #7]
8002f8a: 3b01 subs r3, #1
8002f8c: 4a3a ldr r2, [pc, #232] @ (8003078 <ramp+0x188>)
8002f8e: 5cd3 ldrb r3, [r2, r3]
8002f90: 461a mov r2, r3
8002f92: 793b ldrb r3, [r7, #4]
8002f94: b29b uxth r3, r3
8002f96: 1ad3 subs r3, r2, r3
8002f98: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8002f9a: f897 3020 ldrb.w r3, [r7, #32]
8002f9e: b29b uxth r3, r3
8002fa0: 79fa ldrb r2, [r7, #7]
8002fa2: 3a01 subs r2, #1
8002fa4: 4935 ldr r1, [pc, #212] @ (800307c <ramp+0x18c>)
8002fa6: 5c8a ldrb r2, [r1, r2]
8002fa8: b2d2 uxtb r2, r2
8002faa: 1a9b subs r3, r3, r2
8002fac: b29b uxth r3, r3
8002fae: 89fa ldrh r2, [r7, #14]
8002fb0: fb02 f303 mul.w r3, r2, r3
8002fb4: 81fb strh r3, [r7, #14]
delta=delta/tr;
8002fb6: 89fa ldrh r2, [r7, #14]
8002fb8: f897 3020 ldrb.w r3, [r7, #32]
8002fbc: fb92 f3f3 sdiv r3, r2, r3
8002fc0: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,mrampstart[mot-1]-delta);
8002fc2: 79fb ldrb r3, [r7, #7]
8002fc4: 3b01 subs r3, #1
8002fc6: 4a2c ldr r2, [pc, #176] @ (8003078 <ramp+0x188>)
8002fc8: 5cd2 ldrb r2, [r2, r3]
8002fca: 89fb ldrh r3, [r7, #14]
8002fcc: b2db uxtb r3, r3
8002fce: 1ad3 subs r3, r2, r3
8002fd0: b2da uxtb r2, r3
8002fd2: 79b9 ldrb r1, [r7, #6]
8002fd4: 79fb ldrb r3, [r7, #7]
8002fd6: 4618 mov r0, r3
8002fd8: f7ff fe0a bl 8002bf0 <SetMotPerc>
return RUNNING;
8002fdc: 2301 movs r3, #1
8002fde: e044 b.n 800306a <ramp+0x17a>
}else if(mrampstart[mot-1]<percEnd){
8002fe0: 79fb ldrb r3, [r7, #7]
8002fe2: 3b01 subs r3, #1
8002fe4: 4a24 ldr r2, [pc, #144] @ (8003078 <ramp+0x188>)
8002fe6: 5cd3 ldrb r3, [r2, r3]
8002fe8: 793a ldrb r2, [r7, #4]
8002fea: 429a cmp r2, r3
8002fec: d92a bls.n 8003044 <ramp+0x154>
delta=percEnd-mrampstart[mot-1];
8002fee: 793b ldrb r3, [r7, #4]
8002ff0: b29b uxth r3, r3
8002ff2: 79fa ldrb r2, [r7, #7]
8002ff4: 3a01 subs r2, #1
8002ff6: 4920 ldr r1, [pc, #128] @ (8003078 <ramp+0x188>)
8002ff8: 5c8a ldrb r2, [r1, r2]
8002ffa: 1a9b subs r3, r3, r2
8002ffc: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8002ffe: f897 3020 ldrb.w r3, [r7, #32]
8003002: b29b uxth r3, r3
8003004: 79fa ldrb r2, [r7, #7]
8003006: 3a01 subs r2, #1
8003008: 491c ldr r1, [pc, #112] @ (800307c <ramp+0x18c>)
800300a: 5c8a ldrb r2, [r1, r2]
800300c: b2d2 uxtb r2, r2
800300e: 1a9b subs r3, r3, r2
8003010: b29b uxth r3, r3
8003012: 89fa ldrh r2, [r7, #14]
8003014: fb02 f303 mul.w r3, r2, r3
8003018: 81fb strh r3, [r7, #14]
delta=delta/tr;
800301a: 89fa ldrh r2, [r7, #14]
800301c: f897 3020 ldrb.w r3, [r7, #32]
8003020: fb92 f3f3 sdiv r3, r2, r3
8003024: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,mrampstart[mot-1]+delta);
8003026: 79fb ldrb r3, [r7, #7]
8003028: 3b01 subs r3, #1
800302a: 4a13 ldr r2, [pc, #76] @ (8003078 <ramp+0x188>)
800302c: 5cd2 ldrb r2, [r2, r3]
800302e: 89fb ldrh r3, [r7, #14]
8003030: b2db uxtb r3, r3
8003032: 4413 add r3, r2
8003034: b2da uxtb r2, r3
8003036: 79b9 ldrb r1, [r7, #6]
8003038: 79fb ldrb r3, [r7, #7]
800303a: 4618 mov r0, r3
800303c: f7ff fdd8 bl 8002bf0 <SetMotPerc>
return RUNNING;
8003040: 2301 movs r3, #1
8003042: e012 b.n 800306a <ramp+0x17a>
}else{
SetMotPerc(mot,dir,percEnd);
8003044: 793a ldrb r2, [r7, #4]
8003046: 79b9 ldrb r1, [r7, #6]
8003048: 79fb ldrb r3, [r7, #7]
800304a: 4618 mov r0, r3
800304c: f7ff fdd0 bl 8002bf0 <SetMotPerc>
return DONE;
8003050: 2300 movs r3, #0
8003052: e00a b.n 800306a <ramp+0x17a>
}
}else{
SetMotPerc(mot,dir,percEnd);
8003054: 793a ldrb r2, [r7, #4]
8003056: 79b9 ldrb r1, [r7, #6]
8003058: 79fb ldrb r3, [r7, #7]
800305a: 4618 mov r0, r3
800305c: f7ff fdc8 bl 8002bf0 <SetMotPerc>
return DONE;
8003060: 2300 movs r3, #0
8003062: e002 b.n 800306a <ramp+0x17a>
}
}else return RUNNING;
8003064: 2301 movs r3, #1
8003066: e000 b.n 800306a <ramp+0x17a>
break;
}
return DONE;
8003068: 2300 movs r3, #0
}
800306a: 4618 mov r0, r3
800306c: 3714 adds r7, #20
800306e: 46bd mov sp, r7
8003070: bd90 pop {r4, r7, pc}
8003072: bf00 nop
8003074: 2000042c .word 0x2000042c
8003078: 20000414 .word 0x20000414
800307c: 200003e4 .word 0x200003e4
08003080 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8003080: b480 push {r7}
8003082: b085 sub sp, #20
8003084: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8003086: 4b15 ldr r3, [pc, #84] @ (80030dc <HAL_MspInit+0x5c>)
8003088: 699b ldr r3, [r3, #24]
800308a: 4a14 ldr r2, [pc, #80] @ (80030dc <HAL_MspInit+0x5c>)
800308c: f043 0301 orr.w r3, r3, #1
8003090: 6193 str r3, [r2, #24]
8003092: 4b12 ldr r3, [pc, #72] @ (80030dc <HAL_MspInit+0x5c>)
8003094: 699b ldr r3, [r3, #24]
8003096: f003 0301 and.w r3, r3, #1
800309a: 60bb str r3, [r7, #8]
800309c: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
800309e: 4b0f ldr r3, [pc, #60] @ (80030dc <HAL_MspInit+0x5c>)
80030a0: 69db ldr r3, [r3, #28]
80030a2: 4a0e ldr r2, [pc, #56] @ (80030dc <HAL_MspInit+0x5c>)
80030a4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80030a8: 61d3 str r3, [r2, #28]
80030aa: 4b0c ldr r3, [pc, #48] @ (80030dc <HAL_MspInit+0x5c>)
80030ac: 69db ldr r3, [r3, #28]
80030ae: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80030b2: 607b str r3, [r7, #4]
80030b4: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
80030b6: 4b0a ldr r3, [pc, #40] @ (80030e0 <HAL_MspInit+0x60>)
80030b8: 685b ldr r3, [r3, #4]
80030ba: 60fb str r3, [r7, #12]
80030bc: 68fb ldr r3, [r7, #12]
80030be: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
80030c2: 60fb str r3, [r7, #12]
80030c4: 68fb ldr r3, [r7, #12]
80030c6: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
80030ca: 60fb str r3, [r7, #12]
80030cc: 4a04 ldr r2, [pc, #16] @ (80030e0 <HAL_MspInit+0x60>)
80030ce: 68fb ldr r3, [r7, #12]
80030d0: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80030d2: bf00 nop
80030d4: 3714 adds r7, #20
80030d6: 46bd mov sp, r7
80030d8: bc80 pop {r7}
80030da: 4770 bx lr
80030dc: 40021000 .word 0x40021000
80030e0: 40010000 .word 0x40010000
080030e4 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
80030e4: b580 push {r7, lr}
80030e6: b08a sub sp, #40 @ 0x28
80030e8: af00 add r7, sp, #0
80030ea: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80030ec: f107 0318 add.w r3, r7, #24
80030f0: 2200 movs r2, #0
80030f2: 601a str r2, [r3, #0]
80030f4: 605a str r2, [r3, #4]
80030f6: 609a str r2, [r3, #8]
80030f8: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
80030fa: 687b ldr r3, [r7, #4]
80030fc: 681b ldr r3, [r3, #0]
80030fe: 4a33 ldr r2, [pc, #204] @ (80031cc <HAL_ADC_MspInit+0xe8>)
8003100: 4293 cmp r3, r2
8003102: d15f bne.n 80031c4 <HAL_ADC_MspInit+0xe0>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
8003104: 4b32 ldr r3, [pc, #200] @ (80031d0 <HAL_ADC_MspInit+0xec>)
8003106: 699b ldr r3, [r3, #24]
8003108: 4a31 ldr r2, [pc, #196] @ (80031d0 <HAL_ADC_MspInit+0xec>)
800310a: f443 7300 orr.w r3, r3, #512 @ 0x200
800310e: 6193 str r3, [r2, #24]
8003110: 4b2f ldr r3, [pc, #188] @ (80031d0 <HAL_ADC_MspInit+0xec>)
8003112: 699b ldr r3, [r3, #24]
8003114: f403 7300 and.w r3, r3, #512 @ 0x200
8003118: 617b str r3, [r7, #20]
800311a: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
800311c: 4b2c ldr r3, [pc, #176] @ (80031d0 <HAL_ADC_MspInit+0xec>)
800311e: 699b ldr r3, [r3, #24]
8003120: 4a2b ldr r2, [pc, #172] @ (80031d0 <HAL_ADC_MspInit+0xec>)
8003122: f043 0304 orr.w r3, r3, #4
8003126: 6193 str r3, [r2, #24]
8003128: 4b29 ldr r3, [pc, #164] @ (80031d0 <HAL_ADC_MspInit+0xec>)
800312a: 699b ldr r3, [r3, #24]
800312c: f003 0304 and.w r3, r3, #4
8003130: 613b str r3, [r7, #16]
8003132: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8003134: 4b26 ldr r3, [pc, #152] @ (80031d0 <HAL_ADC_MspInit+0xec>)
8003136: 699b ldr r3, [r3, #24]
8003138: 4a25 ldr r2, [pc, #148] @ (80031d0 <HAL_ADC_MspInit+0xec>)
800313a: f043 0308 orr.w r3, r3, #8
800313e: 6193 str r3, [r2, #24]
8003140: 4b23 ldr r3, [pc, #140] @ (80031d0 <HAL_ADC_MspInit+0xec>)
8003142: 699b ldr r3, [r3, #24]
8003144: f003 0308 and.w r3, r3, #8
8003148: 60fb str r3, [r7, #12]
800314a: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
800314c: 23f0 movs r3, #240 @ 0xf0
800314e: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8003150: 2303 movs r3, #3
8003152: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8003154: f107 0318 add.w r3, r7, #24
8003158: 4619 mov r1, r3
800315a: 481e ldr r0, [pc, #120] @ (80031d4 <HAL_ADC_MspInit+0xf0>)
800315c: f001 fae6 bl 800472c <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8003160: 2301 movs r3, #1
8003162: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8003164: 2303 movs r3, #3
8003166: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
8003168: f107 0318 add.w r3, r7, #24
800316c: 4619 mov r1, r3
800316e: 481a ldr r0, [pc, #104] @ (80031d8 <HAL_ADC_MspInit+0xf4>)
8003170: f001 fadc bl 800472c <HAL_GPIO_Init>
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
8003174: 4b19 ldr r3, [pc, #100] @ (80031dc <HAL_ADC_MspInit+0xf8>)
8003176: 4a1a ldr r2, [pc, #104] @ (80031e0 <HAL_ADC_MspInit+0xfc>)
8003178: 601a str r2, [r3, #0]
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
800317a: 4b18 ldr r3, [pc, #96] @ (80031dc <HAL_ADC_MspInit+0xf8>)
800317c: 2200 movs r2, #0
800317e: 605a str r2, [r3, #4]
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
8003180: 4b16 ldr r3, [pc, #88] @ (80031dc <HAL_ADC_MspInit+0xf8>)
8003182: 2200 movs r2, #0
8003184: 609a str r2, [r3, #8]
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
8003186: 4b15 ldr r3, [pc, #84] @ (80031dc <HAL_ADC_MspInit+0xf8>)
8003188: 2280 movs r2, #128 @ 0x80
800318a: 60da str r2, [r3, #12]
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
800318c: 4b13 ldr r3, [pc, #76] @ (80031dc <HAL_ADC_MspInit+0xf8>)
800318e: f44f 7280 mov.w r2, #256 @ 0x100
8003192: 611a str r2, [r3, #16]
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
8003194: 4b11 ldr r3, [pc, #68] @ (80031dc <HAL_ADC_MspInit+0xf8>)
8003196: f44f 6280 mov.w r2, #1024 @ 0x400
800319a: 615a str r2, [r3, #20]
hdma_adc1.Init.Mode = DMA_CIRCULAR;
800319c: 4b0f ldr r3, [pc, #60] @ (80031dc <HAL_ADC_MspInit+0xf8>)
800319e: 2220 movs r2, #32
80031a0: 619a str r2, [r3, #24]
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
80031a2: 4b0e ldr r3, [pc, #56] @ (80031dc <HAL_ADC_MspInit+0xf8>)
80031a4: 2200 movs r2, #0
80031a6: 61da str r2, [r3, #28]
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
80031a8: 480c ldr r0, [pc, #48] @ (80031dc <HAL_ADC_MspInit+0xf8>)
80031aa: f000 fed1 bl 8003f50 <HAL_DMA_Init>
80031ae: 4603 mov r3, r0
80031b0: 2b00 cmp r3, #0
80031b2: d001 beq.n 80031b8 <HAL_ADC_MspInit+0xd4>
{
Error_Handler();
80031b4: f7ff fb2e bl 8002814 <Error_Handler>
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
80031b8: 687b ldr r3, [r7, #4]
80031ba: 4a08 ldr r2, [pc, #32] @ (80031dc <HAL_ADC_MspInit+0xf8>)
80031bc: 621a str r2, [r3, #32]
80031be: 4a07 ldr r2, [pc, #28] @ (80031dc <HAL_ADC_MspInit+0xf8>)
80031c0: 687b ldr r3, [r7, #4]
80031c2: 6253 str r3, [r2, #36] @ 0x24
/* USER CODE END ADC1_MspInit 1 */
}
}
80031c4: bf00 nop
80031c6: 3728 adds r7, #40 @ 0x28
80031c8: 46bd mov sp, r7
80031ca: bd80 pop {r7, pc}
80031cc: 40012400 .word 0x40012400
80031d0: 40021000 .word 0x40021000
80031d4: 40010800 .word 0x40010800
80031d8: 40010c00 .word 0x40010c00
80031dc: 200002c4 .word 0x200002c4
80031e0: 40020008 .word 0x40020008
080031e4 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
80031e4: b480 push {r7}
80031e6: b085 sub sp, #20
80031e8: af00 add r7, sp, #0
80031ea: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
80031ec: 687b ldr r3, [r7, #4]
80031ee: 681b ldr r3, [r3, #0]
80031f0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80031f4: d10c bne.n 8003210 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
80031f6: 4b11 ldr r3, [pc, #68] @ (800323c <HAL_TIM_Base_MspInit+0x58>)
80031f8: 69db ldr r3, [r3, #28]
80031fa: 4a10 ldr r2, [pc, #64] @ (800323c <HAL_TIM_Base_MspInit+0x58>)
80031fc: f043 0301 orr.w r3, r3, #1
8003200: 61d3 str r3, [r2, #28]
8003202: 4b0e ldr r3, [pc, #56] @ (800323c <HAL_TIM_Base_MspInit+0x58>)
8003204: 69db ldr r3, [r3, #28]
8003206: f003 0301 and.w r3, r3, #1
800320a: 60fb str r3, [r7, #12]
800320c: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
800320e: e010 b.n 8003232 <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8003210: 687b ldr r3, [r7, #4]
8003212: 681b ldr r3, [r3, #0]
8003214: 4a0a ldr r2, [pc, #40] @ (8003240 <HAL_TIM_Base_MspInit+0x5c>)
8003216: 4293 cmp r3, r2
8003218: d10b bne.n 8003232 <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
800321a: 4b08 ldr r3, [pc, #32] @ (800323c <HAL_TIM_Base_MspInit+0x58>)
800321c: 69db ldr r3, [r3, #28]
800321e: 4a07 ldr r2, [pc, #28] @ (800323c <HAL_TIM_Base_MspInit+0x58>)
8003220: f043 0304 orr.w r3, r3, #4
8003224: 61d3 str r3, [r2, #28]
8003226: 4b05 ldr r3, [pc, #20] @ (800323c <HAL_TIM_Base_MspInit+0x58>)
8003228: 69db ldr r3, [r3, #28]
800322a: f003 0304 and.w r3, r3, #4
800322e: 60bb str r3, [r7, #8]
8003230: 68bb ldr r3, [r7, #8]
}
8003232: bf00 nop
8003234: 3714 adds r7, #20
8003236: 46bd mov sp, r7
8003238: bc80 pop {r7}
800323a: 4770 bx lr
800323c: 40021000 .word 0x40021000
8003240: 40000800 .word 0x40000800
08003244 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8003244: b580 push {r7, lr}
8003246: b088 sub sp, #32
8003248: af00 add r7, sp, #0
800324a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
800324c: f107 0310 add.w r3, r7, #16
8003250: 2200 movs r2, #0
8003252: 601a str r2, [r3, #0]
8003254: 605a str r2, [r3, #4]
8003256: 609a str r2, [r3, #8]
8003258: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
800325a: 687b ldr r3, [r7, #4]
800325c: 681b ldr r3, [r3, #0]
800325e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8003262: d118 bne.n 8003296 <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8003264: 4b1d ldr r3, [pc, #116] @ (80032dc <HAL_TIM_MspPostInit+0x98>)
8003266: 699b ldr r3, [r3, #24]
8003268: 4a1c ldr r2, [pc, #112] @ (80032dc <HAL_TIM_MspPostInit+0x98>)
800326a: f043 0304 orr.w r3, r3, #4
800326e: 6193 str r3, [r2, #24]
8003270: 4b1a ldr r3, [pc, #104] @ (80032dc <HAL_TIM_MspPostInit+0x98>)
8003272: 699b ldr r3, [r3, #24]
8003274: f003 0304 and.w r3, r3, #4
8003278: 60fb str r3, [r7, #12]
800327a: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
800327c: 230f movs r3, #15
800327e: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8003280: 2302 movs r3, #2
8003282: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8003284: 2302 movs r3, #2
8003286: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8003288: f107 0310 add.w r3, r7, #16
800328c: 4619 mov r1, r3
800328e: 4814 ldr r0, [pc, #80] @ (80032e0 <HAL_TIM_MspPostInit+0x9c>)
8003290: f001 fa4c bl 800472c <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8003294: e01d b.n 80032d2 <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
8003296: 687b ldr r3, [r7, #4]
8003298: 681b ldr r3, [r3, #0]
800329a: 4a12 ldr r2, [pc, #72] @ (80032e4 <HAL_TIM_MspPostInit+0xa0>)
800329c: 4293 cmp r3, r2
800329e: d118 bne.n 80032d2 <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
80032a0: 4b0e ldr r3, [pc, #56] @ (80032dc <HAL_TIM_MspPostInit+0x98>)
80032a2: 699b ldr r3, [r3, #24]
80032a4: 4a0d ldr r2, [pc, #52] @ (80032dc <HAL_TIM_MspPostInit+0x98>)
80032a6: f043 0308 orr.w r3, r3, #8
80032aa: 6193 str r3, [r2, #24]
80032ac: 4b0b ldr r3, [pc, #44] @ (80032dc <HAL_TIM_MspPostInit+0x98>)
80032ae: 699b ldr r3, [r3, #24]
80032b0: f003 0308 and.w r3, r3, #8
80032b4: 60bb str r3, [r7, #8]
80032b6: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
80032b8: f44f 7370 mov.w r3, #960 @ 0x3c0
80032bc: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80032be: 2302 movs r3, #2
80032c0: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80032c2: 2302 movs r3, #2
80032c4: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80032c6: f107 0310 add.w r3, r7, #16
80032ca: 4619 mov r1, r3
80032cc: 4806 ldr r0, [pc, #24] @ (80032e8 <HAL_TIM_MspPostInit+0xa4>)
80032ce: f001 fa2d bl 800472c <HAL_GPIO_Init>
}
80032d2: bf00 nop
80032d4: 3720 adds r7, #32
80032d6: 46bd mov sp, r7
80032d8: bd80 pop {r7, pc}
80032da: bf00 nop
80032dc: 40021000 .word 0x40021000
80032e0: 40010800 .word 0x40010800
80032e4: 40000800 .word 0x40000800
80032e8: 40010c00 .word 0x40010c00
080032ec <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
80032ec: b580 push {r7, lr}
80032ee: b088 sub sp, #32
80032f0: af00 add r7, sp, #0
80032f2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80032f4: f107 0310 add.w r3, r7, #16
80032f8: 2200 movs r2, #0
80032fa: 601a str r2, [r3, #0]
80032fc: 605a str r2, [r3, #4]
80032fe: 609a str r2, [r3, #8]
8003300: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
8003302: 687b ldr r3, [r7, #4]
8003304: 681b ldr r3, [r3, #0]
8003306: 4a1c ldr r2, [pc, #112] @ (8003378 <HAL_UART_MspInit+0x8c>)
8003308: 4293 cmp r3, r2
800330a: d131 bne.n 8003370 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
800330c: 4b1b ldr r3, [pc, #108] @ (800337c <HAL_UART_MspInit+0x90>)
800330e: 699b ldr r3, [r3, #24]
8003310: 4a1a ldr r2, [pc, #104] @ (800337c <HAL_UART_MspInit+0x90>)
8003312: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8003316: 6193 str r3, [r2, #24]
8003318: 4b18 ldr r3, [pc, #96] @ (800337c <HAL_UART_MspInit+0x90>)
800331a: 699b ldr r3, [r3, #24]
800331c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003320: 60fb str r3, [r7, #12]
8003322: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8003324: 4b15 ldr r3, [pc, #84] @ (800337c <HAL_UART_MspInit+0x90>)
8003326: 699b ldr r3, [r3, #24]
8003328: 4a14 ldr r2, [pc, #80] @ (800337c <HAL_UART_MspInit+0x90>)
800332a: f043 0304 orr.w r3, r3, #4
800332e: 6193 str r3, [r2, #24]
8003330: 4b12 ldr r3, [pc, #72] @ (800337c <HAL_UART_MspInit+0x90>)
8003332: 699b ldr r3, [r3, #24]
8003334: f003 0304 and.w r3, r3, #4
8003338: 60bb str r3, [r7, #8]
800333a: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
800333c: f44f 7300 mov.w r3, #512 @ 0x200
8003340: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8003342: 2302 movs r3, #2
8003344: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8003346: 2303 movs r3, #3
8003348: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800334a: f107 0310 add.w r3, r7, #16
800334e: 4619 mov r1, r3
8003350: 480b ldr r0, [pc, #44] @ (8003380 <HAL_UART_MspInit+0x94>)
8003352: f001 f9eb bl 800472c <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
8003356: f44f 6380 mov.w r3, #1024 @ 0x400
800335a: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
800335c: 2300 movs r3, #0
800335e: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003360: 2300 movs r3, #0
8003362: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8003364: f107 0310 add.w r3, r7, #16
8003368: 4619 mov r1, r3
800336a: 4805 ldr r0, [pc, #20] @ (8003380 <HAL_UART_MspInit+0x94>)
800336c: f001 f9de bl 800472c <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8003370: bf00 nop
8003372: 3720 adds r7, #32
8003374: 46bd mov sp, r7
8003376: bd80 pop {r7, pc}
8003378: 40013800 .word 0x40013800
800337c: 40021000 .word 0x40021000
8003380: 40010800 .word 0x40010800
08003384 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8003384: b480 push {r7}
8003386: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8003388: bf00 nop
800338a: e7fd b.n 8003388 <NMI_Handler+0x4>
0800338c <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
800338c: b480 push {r7}
800338e: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8003390: bf00 nop
8003392: e7fd b.n 8003390 <HardFault_Handler+0x4>
08003394 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8003394: b480 push {r7}
8003396: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8003398: bf00 nop
800339a: e7fd b.n 8003398 <MemManage_Handler+0x4>
0800339c <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
800339c: b480 push {r7}
800339e: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
80033a0: bf00 nop
80033a2: e7fd b.n 80033a0 <BusFault_Handler+0x4>
080033a4 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
80033a4: b480 push {r7}
80033a6: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
80033a8: bf00 nop
80033aa: e7fd b.n 80033a8 <UsageFault_Handler+0x4>
080033ac <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
80033ac: b480 push {r7}
80033ae: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
80033b0: bf00 nop
80033b2: 46bd mov sp, r7
80033b4: bc80 pop {r7}
80033b6: 4770 bx lr
080033b8 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
80033b8: b480 push {r7}
80033ba: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
80033bc: bf00 nop
80033be: 46bd mov sp, r7
80033c0: bc80 pop {r7}
80033c2: 4770 bx lr
080033c4 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
80033c4: b480 push {r7}
80033c6: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
80033c8: bf00 nop
80033ca: 46bd mov sp, r7
80033cc: bc80 pop {r7}
80033ce: 4770 bx lr
080033d0 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
80033d0: b580 push {r7, lr}
80033d2: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
80033d4: f000 f8c0 bl 8003558 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
80033d8: f000 fdb3 bl 8003f42 <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
80033dc: bf00 nop
80033de: bd80 pop {r7, pc}
080033e0 <DMA1_Channel1_IRQHandler>:
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
80033e0: b580 push {r7, lr}
80033e2: af00 add r7, sp, #0
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
80033e4: 4802 ldr r0, [pc, #8] @ (80033f0 <DMA1_Channel1_IRQHandler+0x10>)
80033e6: f000 fe6d bl 80040c4 <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
80033ea: bf00 nop
80033ec: bd80 pop {r7, pc}
80033ee: bf00 nop
80033f0: 200002c4 .word 0x200002c4
080033f4 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
80033f4: b580 push {r7, lr}
80033f6: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
80033f8: 4802 ldr r0, [pc, #8] @ (8003404 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
80033fa: f001 fc7f bl 8004cfc <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
80033fe: bf00 nop
8003400: bd80 pop {r7, pc}
8003402: bf00 nop
8003404: 20001224 .word 0x20001224
08003408 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8003408: b580 push {r7, lr}
800340a: b086 sub sp, #24
800340c: af00 add r7, sp, #0
800340e: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8003410: 4a14 ldr r2, [pc, #80] @ (8003464 <_sbrk+0x5c>)
8003412: 4b15 ldr r3, [pc, #84] @ (8003468 <_sbrk+0x60>)
8003414: 1ad3 subs r3, r2, r3
8003416: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8003418: 697b ldr r3, [r7, #20]
800341a: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
800341c: 4b13 ldr r3, [pc, #76] @ (800346c <_sbrk+0x64>)
800341e: 681b ldr r3, [r3, #0]
8003420: 2b00 cmp r3, #0
8003422: d102 bne.n 800342a <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8003424: 4b11 ldr r3, [pc, #68] @ (800346c <_sbrk+0x64>)
8003426: 4a12 ldr r2, [pc, #72] @ (8003470 <_sbrk+0x68>)
8003428: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
800342a: 4b10 ldr r3, [pc, #64] @ (800346c <_sbrk+0x64>)
800342c: 681a ldr r2, [r3, #0]
800342e: 687b ldr r3, [r7, #4]
8003430: 4413 add r3, r2
8003432: 693a ldr r2, [r7, #16]
8003434: 429a cmp r2, r3
8003436: d207 bcs.n 8003448 <_sbrk+0x40>
{
errno = ENOMEM;
8003438: f009 f8fe bl 800c638 <__errno>
800343c: 4603 mov r3, r0
800343e: 220c movs r2, #12
8003440: 601a str r2, [r3, #0]
return (void *)-1;
8003442: f04f 33ff mov.w r3, #4294967295
8003446: e009 b.n 800345c <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8003448: 4b08 ldr r3, [pc, #32] @ (800346c <_sbrk+0x64>)
800344a: 681b ldr r3, [r3, #0]
800344c: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
800344e: 4b07 ldr r3, [pc, #28] @ (800346c <_sbrk+0x64>)
8003450: 681a ldr r2, [r3, #0]
8003452: 687b ldr r3, [r7, #4]
8003454: 4413 add r3, r2
8003456: 4a05 ldr r2, [pc, #20] @ (800346c <_sbrk+0x64>)
8003458: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
800345a: 68fb ldr r3, [r7, #12]
}
800345c: 4618 mov r0, r3
800345e: 3718 adds r7, #24
8003460: 46bd mov sp, r7
8003462: bd80 pop {r7, pc}
8003464: 20005000 .word 0x20005000
8003468: 00000400 .word 0x00000400
800346c: 20000430 .word 0x20000430
8003470: 20001868 .word 0x20001868
08003474 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8003474: b480 push {r7}
8003476: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8003478: bf00 nop
800347a: 46bd mov sp, r7
800347c: bc80 pop {r7}
800347e: 4770 bx lr
08003480 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8003480: f7ff fff8 bl 8003474 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8003484: 480b ldr r0, [pc, #44] @ (80034b4 <LoopFillZerobss+0xe>)
ldr r1, =_edata
8003486: 490c ldr r1, [pc, #48] @ (80034b8 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8003488: 4a0c ldr r2, [pc, #48] @ (80034bc <LoopFillZerobss+0x16>)
movs r3, #0
800348a: 2300 movs r3, #0
b LoopCopyDataInit
800348c: e002 b.n 8003494 <LoopCopyDataInit>
0800348e <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
800348e: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8003490: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8003492: 3304 adds r3, #4
08003494 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8003494: 18c4 adds r4, r0, r3
cmp r4, r1
8003496: 428c cmp r4, r1
bcc CopyDataInit
8003498: d3f9 bcc.n 800348e <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
800349a: 4a09 ldr r2, [pc, #36] @ (80034c0 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
800349c: 4c09 ldr r4, [pc, #36] @ (80034c4 <LoopFillZerobss+0x1e>)
movs r3, #0
800349e: 2300 movs r3, #0
b LoopFillZerobss
80034a0: e001 b.n 80034a6 <LoopFillZerobss>
080034a2 <FillZerobss>:
FillZerobss:
str r3, [r2]
80034a2: 6013 str r3, [r2, #0]
adds r2, r2, #4
80034a4: 3204 adds r2, #4
080034a6 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
80034a6: 42a2 cmp r2, r4
bcc FillZerobss
80034a8: d3fb bcc.n 80034a2 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
80034aa: f009 f8cb bl 800c644 <__libc_init_array>
/* Call the application's entry point.*/
bl main
80034ae: f7fe fe4f bl 8002150 <main>
bx lr
80034b2: 4770 bx lr
ldr r0, =_sdata
80034b4: 20000000 .word 0x20000000
ldr r1, =_edata
80034b8: 200001d4 .word 0x200001d4
ldr r2, =_sidata
80034bc: 0800d278 .word 0x0800d278
ldr r2, =_sbss
80034c0: 200001d8 .word 0x200001d8
ldr r4, =_ebss
80034c4: 20001864 .word 0x20001864
080034c8 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
80034c8: e7fe b.n 80034c8 <ADC1_2_IRQHandler>
...
080034cc <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
80034cc: b580 push {r7, lr}
80034ce: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
80034d0: 4b08 ldr r3, [pc, #32] @ (80034f4 <HAL_Init+0x28>)
80034d2: 681b ldr r3, [r3, #0]
80034d4: 4a07 ldr r2, [pc, #28] @ (80034f4 <HAL_Init+0x28>)
80034d6: f043 0310 orr.w r3, r3, #16
80034da: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
80034dc: 2003 movs r0, #3
80034de: f000 fcef bl 8003ec0 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
80034e2: 200f movs r0, #15
80034e4: f000 f808 bl 80034f8 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
80034e8: f7ff fdca bl 8003080 <HAL_MspInit>
/* Return function status */
return HAL_OK;
80034ec: 2300 movs r3, #0
}
80034ee: 4618 mov r0, r3
80034f0: bd80 pop {r7, pc}
80034f2: bf00 nop
80034f4: 40022000 .word 0x40022000
080034f8 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
80034f8: b580 push {r7, lr}
80034fa: b082 sub sp, #8
80034fc: af00 add r7, sp, #0
80034fe: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8003500: 4b12 ldr r3, [pc, #72] @ (800354c <HAL_InitTick+0x54>)
8003502: 681a ldr r2, [r3, #0]
8003504: 4b12 ldr r3, [pc, #72] @ (8003550 <HAL_InitTick+0x58>)
8003506: 781b ldrb r3, [r3, #0]
8003508: 4619 mov r1, r3
800350a: f44f 737a mov.w r3, #1000 @ 0x3e8
800350e: fbb3 f3f1 udiv r3, r3, r1
8003512: fbb2 f3f3 udiv r3, r2, r3
8003516: 4618 mov r0, r3
8003518: f000 fd07 bl 8003f2a <HAL_SYSTICK_Config>
800351c: 4603 mov r3, r0
800351e: 2b00 cmp r3, #0
8003520: d001 beq.n 8003526 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8003522: 2301 movs r3, #1
8003524: e00e b.n 8003544 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8003526: 687b ldr r3, [r7, #4]
8003528: 2b0f cmp r3, #15
800352a: d80a bhi.n 8003542 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
800352c: 2200 movs r2, #0
800352e: 6879 ldr r1, [r7, #4]
8003530: f04f 30ff mov.w r0, #4294967295
8003534: f000 fccf bl 8003ed6 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8003538: 4a06 ldr r2, [pc, #24] @ (8003554 <HAL_InitTick+0x5c>)
800353a: 687b ldr r3, [r7, #4]
800353c: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
800353e: 2300 movs r3, #0
8003540: e000 b.n 8003544 <HAL_InitTick+0x4c>
return HAL_ERROR;
8003542: 2301 movs r3, #1
}
8003544: 4618 mov r0, r3
8003546: 3708 adds r7, #8
8003548: 46bd mov sp, r7
800354a: bd80 pop {r7, pc}
800354c: 20000008 .word 0x20000008
8003550: 20000010 .word 0x20000010
8003554: 2000000c .word 0x2000000c
08003558 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8003558: b480 push {r7}
800355a: af00 add r7, sp, #0
uwTick += uwTickFreq;
800355c: 4b05 ldr r3, [pc, #20] @ (8003574 <HAL_IncTick+0x1c>)
800355e: 781b ldrb r3, [r3, #0]
8003560: 461a mov r2, r3
8003562: 4b05 ldr r3, [pc, #20] @ (8003578 <HAL_IncTick+0x20>)
8003564: 681b ldr r3, [r3, #0]
8003566: 4413 add r3, r2
8003568: 4a03 ldr r2, [pc, #12] @ (8003578 <HAL_IncTick+0x20>)
800356a: 6013 str r3, [r2, #0]
}
800356c: bf00 nop
800356e: 46bd mov sp, r7
8003570: bc80 pop {r7}
8003572: 4770 bx lr
8003574: 20000010 .word 0x20000010
8003578: 20000434 .word 0x20000434
0800357c <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
800357c: b480 push {r7}
800357e: af00 add r7, sp, #0
return uwTick;
8003580: 4b02 ldr r3, [pc, #8] @ (800358c <HAL_GetTick+0x10>)
8003582: 681b ldr r3, [r3, #0]
}
8003584: 4618 mov r0, r3
8003586: 46bd mov sp, r7
8003588: bc80 pop {r7}
800358a: 4770 bx lr
800358c: 20000434 .word 0x20000434
08003590 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8003590: b580 push {r7, lr}
8003592: b086 sub sp, #24
8003594: af00 add r7, sp, #0
8003596: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8003598: 2300 movs r3, #0
800359a: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
800359c: 2300 movs r3, #0
800359e: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
80035a0: 2300 movs r3, #0
80035a2: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
80035a4: 2300 movs r3, #0
80035a6: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
80035a8: 687b ldr r3, [r7, #4]
80035aa: 2b00 cmp r3, #0
80035ac: d101 bne.n 80035b2 <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
80035ae: 2301 movs r3, #1
80035b0: e0be b.n 8003730 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
80035b2: 687b ldr r3, [r7, #4]
80035b4: 689b ldr r3, [r3, #8]
80035b6: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
80035b8: 687b ldr r3, [r7, #4]
80035ba: 6a9b ldr r3, [r3, #40] @ 0x28
80035bc: 2b00 cmp r3, #0
80035be: d109 bne.n 80035d4 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
80035c0: 687b ldr r3, [r7, #4]
80035c2: 2200 movs r2, #0
80035c4: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
80035c6: 687b ldr r3, [r7, #4]
80035c8: 2200 movs r2, #0
80035ca: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
80035ce: 6878 ldr r0, [r7, #4]
80035d0: f7ff fd88 bl 80030e4 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
80035d4: 6878 ldr r0, [r7, #4]
80035d6: f000 faff bl 8003bd8 <ADC_ConversionStop_Disable>
80035da: 4603 mov r3, r0
80035dc: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
80035de: 687b ldr r3, [r7, #4]
80035e0: 6a9b ldr r3, [r3, #40] @ 0x28
80035e2: f003 0310 and.w r3, r3, #16
80035e6: 2b00 cmp r3, #0
80035e8: f040 8099 bne.w 800371e <HAL_ADC_Init+0x18e>
80035ec: 7dfb ldrb r3, [r7, #23]
80035ee: 2b00 cmp r3, #0
80035f0: f040 8095 bne.w 800371e <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
80035f4: 687b ldr r3, [r7, #4]
80035f6: 6a9b ldr r3, [r3, #40] @ 0x28
80035f8: f423 5388 bic.w r3, r3, #4352 @ 0x1100
80035fc: f023 0302 bic.w r3, r3, #2
8003600: f043 0202 orr.w r2, r3, #2
8003604: 687b ldr r3, [r7, #4]
8003606: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
8003608: 687b ldr r3, [r7, #4]
800360a: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
800360c: 687b ldr r3, [r7, #4]
800360e: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8003610: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8003612: 687b ldr r3, [r7, #4]
8003614: 7b1b ldrb r3, [r3, #12]
8003616: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8003618: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
800361a: 68ba ldr r2, [r7, #8]
800361c: 4313 orrs r3, r2
800361e: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8003620: 687b ldr r3, [r7, #4]
8003622: 689b ldr r3, [r3, #8]
8003624: f5b3 7f80 cmp.w r3, #256 @ 0x100
8003628: d003 beq.n 8003632 <HAL_ADC_Init+0xa2>
800362a: 687b ldr r3, [r7, #4]
800362c: 689b ldr r3, [r3, #8]
800362e: 2b01 cmp r3, #1
8003630: d102 bne.n 8003638 <HAL_ADC_Init+0xa8>
8003632: f44f 7380 mov.w r3, #256 @ 0x100
8003636: e000 b.n 800363a <HAL_ADC_Init+0xaa>
8003638: 2300 movs r3, #0
800363a: 693a ldr r2, [r7, #16]
800363c: 4313 orrs r3, r2
800363e: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8003640: 687b ldr r3, [r7, #4]
8003642: 7d1b ldrb r3, [r3, #20]
8003644: 2b01 cmp r3, #1
8003646: d119 bne.n 800367c <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8003648: 687b ldr r3, [r7, #4]
800364a: 7b1b ldrb r3, [r3, #12]
800364c: 2b00 cmp r3, #0
800364e: d109 bne.n 8003664 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8003650: 687b ldr r3, [r7, #4]
8003652: 699b ldr r3, [r3, #24]
8003654: 3b01 subs r3, #1
8003656: 035a lsls r2, r3, #13
8003658: 693b ldr r3, [r7, #16]
800365a: 4313 orrs r3, r2
800365c: f443 6300 orr.w r3, r3, #2048 @ 0x800
8003660: 613b str r3, [r7, #16]
8003662: e00b b.n 800367c <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8003664: 687b ldr r3, [r7, #4]
8003666: 6a9b ldr r3, [r3, #40] @ 0x28
8003668: f043 0220 orr.w r2, r3, #32
800366c: 687b ldr r3, [r7, #4]
800366e: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8003670: 687b ldr r3, [r7, #4]
8003672: 6adb ldr r3, [r3, #44] @ 0x2c
8003674: f043 0201 orr.w r2, r3, #1
8003678: 687b ldr r3, [r7, #4]
800367a: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
800367c: 687b ldr r3, [r7, #4]
800367e: 681b ldr r3, [r3, #0]
8003680: 685b ldr r3, [r3, #4]
8003682: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8003686: 687b ldr r3, [r7, #4]
8003688: 681b ldr r3, [r3, #0]
800368a: 693a ldr r2, [r7, #16]
800368c: 430a orrs r2, r1
800368e: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
8003690: 687b ldr r3, [r7, #4]
8003692: 681b ldr r3, [r3, #0]
8003694: 689a ldr r2, [r3, #8]
8003696: 4b28 ldr r3, [pc, #160] @ (8003738 <HAL_ADC_Init+0x1a8>)
8003698: 4013 ands r3, r2
800369a: 687a ldr r2, [r7, #4]
800369c: 6812 ldr r2, [r2, #0]
800369e: 68b9 ldr r1, [r7, #8]
80036a0: 430b orrs r3, r1
80036a2: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
80036a4: 687b ldr r3, [r7, #4]
80036a6: 689b ldr r3, [r3, #8]
80036a8: f5b3 7f80 cmp.w r3, #256 @ 0x100
80036ac: d003 beq.n 80036b6 <HAL_ADC_Init+0x126>
80036ae: 687b ldr r3, [r7, #4]
80036b0: 689b ldr r3, [r3, #8]
80036b2: 2b01 cmp r3, #1
80036b4: d104 bne.n 80036c0 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
80036b6: 687b ldr r3, [r7, #4]
80036b8: 691b ldr r3, [r3, #16]
80036ba: 3b01 subs r3, #1
80036bc: 051b lsls r3, r3, #20
80036be: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
80036c0: 687b ldr r3, [r7, #4]
80036c2: 681b ldr r3, [r3, #0]
80036c4: 6adb ldr r3, [r3, #44] @ 0x2c
80036c6: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
80036ca: 687b ldr r3, [r7, #4]
80036cc: 681b ldr r3, [r3, #0]
80036ce: 68fa ldr r2, [r7, #12]
80036d0: 430a orrs r2, r1
80036d2: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80036d4: 687b ldr r3, [r7, #4]
80036d6: 681b ldr r3, [r3, #0]
80036d8: 689a ldr r2, [r3, #8]
80036da: 4b18 ldr r3, [pc, #96] @ (800373c <HAL_ADC_Init+0x1ac>)
80036dc: 4013 ands r3, r2
80036de: 68ba ldr r2, [r7, #8]
80036e0: 429a cmp r2, r3
80036e2: d10b bne.n 80036fc <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
80036e4: 687b ldr r3, [r7, #4]
80036e6: 2200 movs r2, #0
80036e8: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
80036ea: 687b ldr r3, [r7, #4]
80036ec: 6a9b ldr r3, [r3, #40] @ 0x28
80036ee: f023 0303 bic.w r3, r3, #3
80036f2: f043 0201 orr.w r2, r3, #1
80036f6: 687b ldr r3, [r7, #4]
80036f8: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80036fa: e018 b.n 800372e <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
80036fc: 687b ldr r3, [r7, #4]
80036fe: 6a9b ldr r3, [r3, #40] @ 0x28
8003700: f023 0312 bic.w r3, r3, #18
8003704: f043 0210 orr.w r2, r3, #16
8003708: 687b ldr r3, [r7, #4]
800370a: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
800370c: 687b ldr r3, [r7, #4]
800370e: 6adb ldr r3, [r3, #44] @ 0x2c
8003710: f043 0201 orr.w r2, r3, #1
8003714: 687b ldr r3, [r7, #4]
8003716: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
8003718: 2301 movs r3, #1
800371a: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
800371c: e007 b.n 800372e <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800371e: 687b ldr r3, [r7, #4]
8003720: 6a9b ldr r3, [r3, #40] @ 0x28
8003722: f043 0210 orr.w r2, r3, #16
8003726: 687b ldr r3, [r7, #4]
8003728: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
800372a: 2301 movs r3, #1
800372c: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
800372e: 7dfb ldrb r3, [r7, #23]
}
8003730: 4618 mov r0, r3
8003732: 3718 adds r7, #24
8003734: 46bd mov sp, r7
8003736: bd80 pop {r7, pc}
8003738: ffe1f7fd .word 0xffe1f7fd
800373c: ff1f0efe .word 0xff1f0efe
08003740 <HAL_ADC_Start_DMA>:
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @retval None
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
{
8003740: b580 push {r7, lr}
8003742: b086 sub sp, #24
8003744: af00 add r7, sp, #0
8003746: 60f8 str r0, [r7, #12]
8003748: 60b9 str r1, [r7, #8]
800374a: 607a str r2, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
800374c: 2300 movs r3, #0
800374e: 75fb strb r3, [r7, #23]
assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
/* Verification if multimode is disabled (for devices with several ADC) */
/* If multimode is enabled, dedicated function multimode conversion */
/* start DMA must be used. */
if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
8003750: 68fb ldr r3, [r7, #12]
8003752: 681b ldr r3, [r3, #0]
8003754: 4a64 ldr r2, [pc, #400] @ (80038e8 <HAL_ADC_Start_DMA+0x1a8>)
8003756: 4293 cmp r3, r2
8003758: d004 beq.n 8003764 <HAL_ADC_Start_DMA+0x24>
800375a: 68fb ldr r3, [r7, #12]
800375c: 681b ldr r3, [r3, #0]
800375e: 4a63 ldr r2, [pc, #396] @ (80038ec <HAL_ADC_Start_DMA+0x1ac>)
8003760: 4293 cmp r3, r2
8003762: d106 bne.n 8003772 <HAL_ADC_Start_DMA+0x32>
8003764: 4b60 ldr r3, [pc, #384] @ (80038e8 <HAL_ADC_Start_DMA+0x1a8>)
8003766: 685b ldr r3, [r3, #4]
8003768: f403 2370 and.w r3, r3, #983040 @ 0xf0000
800376c: 2b00 cmp r3, #0
800376e: f040 80b3 bne.w 80038d8 <HAL_ADC_Start_DMA+0x198>
{
/* Process locked */
__HAL_LOCK(hadc);
8003772: 68fb ldr r3, [r7, #12]
8003774: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8003778: 2b01 cmp r3, #1
800377a: d101 bne.n 8003780 <HAL_ADC_Start_DMA+0x40>
800377c: 2302 movs r3, #2
800377e: e0ae b.n 80038de <HAL_ADC_Start_DMA+0x19e>
8003780: 68fb ldr r3, [r7, #12]
8003782: 2201 movs r2, #1
8003784: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
8003788: 68f8 ldr r0, [r7, #12]
800378a: f000 f9cb bl 8003b24 <ADC_Enable>
800378e: 4603 mov r3, r0
8003790: 75fb strb r3, [r7, #23]
/* Start conversion if ADC is effectively enabled */
if (tmp_hal_status == HAL_OK)
8003792: 7dfb ldrb r3, [r7, #23]
8003794: 2b00 cmp r3, #0
8003796: f040 809a bne.w 80038ce <HAL_ADC_Start_DMA+0x18e>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular operation */
ADC_STATE_CLR_SET(hadc->State,
800379a: 68fb ldr r3, [r7, #12]
800379c: 6a9b ldr r3, [r3, #40] @ 0x28
800379e: f423 6370 bic.w r3, r3, #3840 @ 0xf00
80037a2: f023 0301 bic.w r3, r3, #1
80037a6: f443 7280 orr.w r2, r3, #256 @ 0x100
80037aa: 68fb ldr r3, [r7, #12]
80037ac: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_REG_BUSY);
/* Set group injected state (from auto-injection) and multimode state */
/* for all cases of multimode: independent mode, multimode ADC master */
/* or multimode ADC slave (for devices with several ADCs): */
if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
80037ae: 68fb ldr r3, [r7, #12]
80037b0: 681b ldr r3, [r3, #0]
80037b2: 4a4e ldr r2, [pc, #312] @ (80038ec <HAL_ADC_Start_DMA+0x1ac>)
80037b4: 4293 cmp r3, r2
80037b6: d105 bne.n 80037c4 <HAL_ADC_Start_DMA+0x84>
80037b8: 4b4b ldr r3, [pc, #300] @ (80038e8 <HAL_ADC_Start_DMA+0x1a8>)
80037ba: 685b ldr r3, [r3, #4]
80037bc: f403 2370 and.w r3, r3, #983040 @ 0xf0000
80037c0: 2b00 cmp r3, #0
80037c2: d115 bne.n 80037f0 <HAL_ADC_Start_DMA+0xb0>
{
/* Set ADC state (ADC independent or master) */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
80037c4: 68fb ldr r3, [r7, #12]
80037c6: 6a9b ldr r3, [r3, #40] @ 0x28
80037c8: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
80037cc: 68fb ldr r3, [r7, #12]
80037ce: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
80037d0: 68fb ldr r3, [r7, #12]
80037d2: 681b ldr r3, [r3, #0]
80037d4: 685b ldr r3, [r3, #4]
80037d6: f403 6380 and.w r3, r3, #1024 @ 0x400
80037da: 2b00 cmp r3, #0
80037dc: d026 beq.n 800382c <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
80037de: 68fb ldr r3, [r7, #12]
80037e0: 6a9b ldr r3, [r3, #40] @ 0x28
80037e2: f423 5340 bic.w r3, r3, #12288 @ 0x3000
80037e6: f443 5280 orr.w r2, r3, #4096 @ 0x1000
80037ea: 68fb ldr r3, [r7, #12]
80037ec: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
80037ee: e01d b.n 800382c <HAL_ADC_Start_DMA+0xec>
}
}
else
{
/* Set ADC state (ADC slave) */
SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
80037f0: 68fb ldr r3, [r7, #12]
80037f2: 6a9b ldr r3, [r3, #40] @ 0x28
80037f4: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
80037f8: 68fb ldr r3, [r7, #12]
80037fa: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
80037fc: 68fb ldr r3, [r7, #12]
80037fe: 681b ldr r3, [r3, #0]
8003800: 4a39 ldr r2, [pc, #228] @ (80038e8 <HAL_ADC_Start_DMA+0x1a8>)
8003802: 4293 cmp r3, r2
8003804: d004 beq.n 8003810 <HAL_ADC_Start_DMA+0xd0>
8003806: 68fb ldr r3, [r7, #12]
8003808: 681b ldr r3, [r3, #0]
800380a: 4a38 ldr r2, [pc, #224] @ (80038ec <HAL_ADC_Start_DMA+0x1ac>)
800380c: 4293 cmp r3, r2
800380e: d10d bne.n 800382c <HAL_ADC_Start_DMA+0xec>
8003810: 4b35 ldr r3, [pc, #212] @ (80038e8 <HAL_ADC_Start_DMA+0x1a8>)
8003812: 685b ldr r3, [r3, #4]
8003814: f403 6380 and.w r3, r3, #1024 @ 0x400
8003818: 2b00 cmp r3, #0
800381a: d007 beq.n 800382c <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
800381c: 68fb ldr r3, [r7, #12]
800381e: 6a9b ldr r3, [r3, #40] @ 0x28
8003820: f423 5340 bic.w r3, r3, #12288 @ 0x3000
8003824: f443 5280 orr.w r2, r3, #4096 @ 0x1000
8003828: 68fb ldr r3, [r7, #12]
800382a: 629a str r2, [r3, #40] @ 0x28
}
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
800382c: 68fb ldr r3, [r7, #12]
800382e: 6a9b ldr r3, [r3, #40] @ 0x28
8003830: f403 5380 and.w r3, r3, #4096 @ 0x1000
8003834: 2b00 cmp r3, #0
8003836: d006 beq.n 8003846 <HAL_ADC_Start_DMA+0x106>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
8003838: 68fb ldr r3, [r7, #12]
800383a: 6adb ldr r3, [r3, #44] @ 0x2c
800383c: f023 0206 bic.w r2, r3, #6
8003840: 68fb ldr r3, [r7, #12]
8003842: 62da str r2, [r3, #44] @ 0x2c
8003844: e002 b.n 800384c <HAL_ADC_Start_DMA+0x10c>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
8003846: 68fb ldr r3, [r7, #12]
8003848: 2200 movs r2, #0
800384a: 62da str r2, [r3, #44] @ 0x2c
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
800384c: 68fb ldr r3, [r7, #12]
800384e: 2200 movs r2, #0
8003850: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Set the DMA transfer complete callback */
hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
8003854: 68fb ldr r3, [r7, #12]
8003856: 6a1b ldr r3, [r3, #32]
8003858: 4a25 ldr r2, [pc, #148] @ (80038f0 <HAL_ADC_Start_DMA+0x1b0>)
800385a: 629a str r2, [r3, #40] @ 0x28
/* Set the DMA half transfer complete callback */
hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
800385c: 68fb ldr r3, [r7, #12]
800385e: 6a1b ldr r3, [r3, #32]
8003860: 4a24 ldr r2, [pc, #144] @ (80038f4 <HAL_ADC_Start_DMA+0x1b4>)
8003862: 62da str r2, [r3, #44] @ 0x2c
/* Set the DMA error callback */
hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
8003864: 68fb ldr r3, [r7, #12]
8003866: 6a1b ldr r3, [r3, #32]
8003868: 4a23 ldr r2, [pc, #140] @ (80038f8 <HAL_ADC_Start_DMA+0x1b8>)
800386a: 631a str r2, [r3, #48] @ 0x30
/* start (in case of SW start): */
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC */
/* operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
800386c: 68fb ldr r3, [r7, #12]
800386e: 681b ldr r3, [r3, #0]
8003870: f06f 0202 mvn.w r2, #2
8003874: 601a str r2, [r3, #0]
/* Enable ADC DMA mode */
SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
8003876: 68fb ldr r3, [r7, #12]
8003878: 681b ldr r3, [r3, #0]
800387a: 689a ldr r2, [r3, #8]
800387c: 68fb ldr r3, [r7, #12]
800387e: 681b ldr r3, [r3, #0]
8003880: f442 7280 orr.w r2, r2, #256 @ 0x100
8003884: 609a str r2, [r3, #8]
/* Start the DMA channel */
HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
8003886: 68fb ldr r3, [r7, #12]
8003888: 6a18 ldr r0, [r3, #32]
800388a: 68fb ldr r3, [r7, #12]
800388c: 681b ldr r3, [r3, #0]
800388e: 334c adds r3, #76 @ 0x4c
8003890: 4619 mov r1, r3
8003892: 68ba ldr r2, [r7, #8]
8003894: 687b ldr r3, [r7, #4]
8003896: f000 fbb5 bl 8004004 <HAL_DMA_Start_IT>
/* Enable conversion of regular group. */
/* If software start has been selected, conversion starts immediately. */
/* If external trigger has been selected, conversion will start at next */
/* trigger event. */
if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
800389a: 68fb ldr r3, [r7, #12]
800389c: 681b ldr r3, [r3, #0]
800389e: 689b ldr r3, [r3, #8]
80038a0: f403 2360 and.w r3, r3, #917504 @ 0xe0000
80038a4: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
80038a8: d108 bne.n 80038bc <HAL_ADC_Start_DMA+0x17c>
{
/* Start ADC conversion on regular group with SW start */
SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
80038aa: 68fb ldr r3, [r7, #12]
80038ac: 681b ldr r3, [r3, #0]
80038ae: 689a ldr r2, [r3, #8]
80038b0: 68fb ldr r3, [r7, #12]
80038b2: 681b ldr r3, [r3, #0]
80038b4: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000
80038b8: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
80038ba: e00f b.n 80038dc <HAL_ADC_Start_DMA+0x19c>
}
else
{
/* Start ADC conversion on regular group with external trigger */
SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
80038bc: 68fb ldr r3, [r7, #12]
80038be: 681b ldr r3, [r3, #0]
80038c0: 689a ldr r2, [r3, #8]
80038c2: 68fb ldr r3, [r7, #12]
80038c4: 681b ldr r3, [r3, #0]
80038c6: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
80038ca: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
80038cc: e006 b.n 80038dc <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hadc);
80038ce: 68fb ldr r3, [r7, #12]
80038d0: 2200 movs r2, #0
80038d2: f883 2024 strb.w r2, [r3, #36] @ 0x24
if (tmp_hal_status == HAL_OK)
80038d6: e001 b.n 80038dc <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
tmp_hal_status = HAL_ERROR;
80038d8: 2301 movs r3, #1
80038da: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
80038dc: 7dfb ldrb r3, [r7, #23]
}
80038de: 4618 mov r0, r3
80038e0: 3718 adds r7, #24
80038e2: 46bd mov sp, r7
80038e4: bd80 pop {r7, pc}
80038e6: bf00 nop
80038e8: 40012400 .word 0x40012400
80038ec: 40012800 .word 0x40012800
80038f0: 08003c5b .word 0x08003c5b
80038f4: 08003cd7 .word 0x08003cd7
80038f8: 08003cf3 .word 0x08003cf3
080038fc <HAL_ADC_ConvCpltCallback>:
* @brief Conversion complete callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
80038fc: b480 push {r7}
80038fe: b083 sub sp, #12
8003900: af00 add r7, sp, #0
8003902: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvCpltCallback must be implemented in the user file.
*/
}
8003904: bf00 nop
8003906: 370c adds r7, #12
8003908: 46bd mov sp, r7
800390a: bc80 pop {r7}
800390c: 4770 bx lr
0800390e <HAL_ADC_ConvHalfCpltCallback>:
* @brief Conversion DMA half-transfer callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
{
800390e: b480 push {r7}
8003910: b083 sub sp, #12
8003912: af00 add r7, sp, #0
8003914: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
*/
}
8003916: bf00 nop
8003918: 370c adds r7, #12
800391a: 46bd mov sp, r7
800391c: bc80 pop {r7}
800391e: 4770 bx lr
08003920 <HAL_ADC_ErrorCallback>:
* (ADC conversion with interruption or transfer by DMA)
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
8003920: b480 push {r7}
8003922: b083 sub sp, #12
8003924: af00 add r7, sp, #0
8003926: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ErrorCallback must be implemented in the user file.
*/
}
8003928: bf00 nop
800392a: 370c adds r7, #12
800392c: 46bd mov sp, r7
800392e: bc80 pop {r7}
8003930: 4770 bx lr
...
08003934 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8003934: b480 push {r7}
8003936: b085 sub sp, #20
8003938: af00 add r7, sp, #0
800393a: 6078 str r0, [r7, #4]
800393c: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
800393e: 2300 movs r3, #0
8003940: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8003942: 2300 movs r3, #0
8003944: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8003946: 687b ldr r3, [r7, #4]
8003948: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
800394c: 2b01 cmp r3, #1
800394e: d101 bne.n 8003954 <HAL_ADC_ConfigChannel+0x20>
8003950: 2302 movs r3, #2
8003952: e0dc b.n 8003b0e <HAL_ADC_ConfigChannel+0x1da>
8003954: 687b ldr r3, [r7, #4]
8003956: 2201 movs r2, #1
8003958: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
800395c: 683b ldr r3, [r7, #0]
800395e: 685b ldr r3, [r3, #4]
8003960: 2b06 cmp r3, #6
8003962: d81c bhi.n 800399e <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8003964: 687b ldr r3, [r7, #4]
8003966: 681b ldr r3, [r3, #0]
8003968: 6b59 ldr r1, [r3, #52] @ 0x34
800396a: 683b ldr r3, [r7, #0]
800396c: 685a ldr r2, [r3, #4]
800396e: 4613 mov r3, r2
8003970: 009b lsls r3, r3, #2
8003972: 4413 add r3, r2
8003974: 3b05 subs r3, #5
8003976: 221f movs r2, #31
8003978: fa02 f303 lsl.w r3, r2, r3
800397c: 43db mvns r3, r3
800397e: 4019 ands r1, r3
8003980: 683b ldr r3, [r7, #0]
8003982: 6818 ldr r0, [r3, #0]
8003984: 683b ldr r3, [r7, #0]
8003986: 685a ldr r2, [r3, #4]
8003988: 4613 mov r3, r2
800398a: 009b lsls r3, r3, #2
800398c: 4413 add r3, r2
800398e: 3b05 subs r3, #5
8003990: fa00 f203 lsl.w r2, r0, r3
8003994: 687b ldr r3, [r7, #4]
8003996: 681b ldr r3, [r3, #0]
8003998: 430a orrs r2, r1
800399a: 635a str r2, [r3, #52] @ 0x34
800399c: e03c b.n 8003a18 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
800399e: 683b ldr r3, [r7, #0]
80039a0: 685b ldr r3, [r3, #4]
80039a2: 2b0c cmp r3, #12
80039a4: d81c bhi.n 80039e0 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
80039a6: 687b ldr r3, [r7, #4]
80039a8: 681b ldr r3, [r3, #0]
80039aa: 6b19 ldr r1, [r3, #48] @ 0x30
80039ac: 683b ldr r3, [r7, #0]
80039ae: 685a ldr r2, [r3, #4]
80039b0: 4613 mov r3, r2
80039b2: 009b lsls r3, r3, #2
80039b4: 4413 add r3, r2
80039b6: 3b23 subs r3, #35 @ 0x23
80039b8: 221f movs r2, #31
80039ba: fa02 f303 lsl.w r3, r2, r3
80039be: 43db mvns r3, r3
80039c0: 4019 ands r1, r3
80039c2: 683b ldr r3, [r7, #0]
80039c4: 6818 ldr r0, [r3, #0]
80039c6: 683b ldr r3, [r7, #0]
80039c8: 685a ldr r2, [r3, #4]
80039ca: 4613 mov r3, r2
80039cc: 009b lsls r3, r3, #2
80039ce: 4413 add r3, r2
80039d0: 3b23 subs r3, #35 @ 0x23
80039d2: fa00 f203 lsl.w r2, r0, r3
80039d6: 687b ldr r3, [r7, #4]
80039d8: 681b ldr r3, [r3, #0]
80039da: 430a orrs r2, r1
80039dc: 631a str r2, [r3, #48] @ 0x30
80039de: e01b b.n 8003a18 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
80039e0: 687b ldr r3, [r7, #4]
80039e2: 681b ldr r3, [r3, #0]
80039e4: 6ad9 ldr r1, [r3, #44] @ 0x2c
80039e6: 683b ldr r3, [r7, #0]
80039e8: 685a ldr r2, [r3, #4]
80039ea: 4613 mov r3, r2
80039ec: 009b lsls r3, r3, #2
80039ee: 4413 add r3, r2
80039f0: 3b41 subs r3, #65 @ 0x41
80039f2: 221f movs r2, #31
80039f4: fa02 f303 lsl.w r3, r2, r3
80039f8: 43db mvns r3, r3
80039fa: 4019 ands r1, r3
80039fc: 683b ldr r3, [r7, #0]
80039fe: 6818 ldr r0, [r3, #0]
8003a00: 683b ldr r3, [r7, #0]
8003a02: 685a ldr r2, [r3, #4]
8003a04: 4613 mov r3, r2
8003a06: 009b lsls r3, r3, #2
8003a08: 4413 add r3, r2
8003a0a: 3b41 subs r3, #65 @ 0x41
8003a0c: fa00 f203 lsl.w r2, r0, r3
8003a10: 687b ldr r3, [r7, #4]
8003a12: 681b ldr r3, [r3, #0]
8003a14: 430a orrs r2, r1
8003a16: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
8003a18: 683b ldr r3, [r7, #0]
8003a1a: 681b ldr r3, [r3, #0]
8003a1c: 2b09 cmp r3, #9
8003a1e: d91c bls.n 8003a5a <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
8003a20: 687b ldr r3, [r7, #4]
8003a22: 681b ldr r3, [r3, #0]
8003a24: 68d9 ldr r1, [r3, #12]
8003a26: 683b ldr r3, [r7, #0]
8003a28: 681a ldr r2, [r3, #0]
8003a2a: 4613 mov r3, r2
8003a2c: 005b lsls r3, r3, #1
8003a2e: 4413 add r3, r2
8003a30: 3b1e subs r3, #30
8003a32: 2207 movs r2, #7
8003a34: fa02 f303 lsl.w r3, r2, r3
8003a38: 43db mvns r3, r3
8003a3a: 4019 ands r1, r3
8003a3c: 683b ldr r3, [r7, #0]
8003a3e: 6898 ldr r0, [r3, #8]
8003a40: 683b ldr r3, [r7, #0]
8003a42: 681a ldr r2, [r3, #0]
8003a44: 4613 mov r3, r2
8003a46: 005b lsls r3, r3, #1
8003a48: 4413 add r3, r2
8003a4a: 3b1e subs r3, #30
8003a4c: fa00 f203 lsl.w r2, r0, r3
8003a50: 687b ldr r3, [r7, #4]
8003a52: 681b ldr r3, [r3, #0]
8003a54: 430a orrs r2, r1
8003a56: 60da str r2, [r3, #12]
8003a58: e019 b.n 8003a8e <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8003a5a: 687b ldr r3, [r7, #4]
8003a5c: 681b ldr r3, [r3, #0]
8003a5e: 6919 ldr r1, [r3, #16]
8003a60: 683b ldr r3, [r7, #0]
8003a62: 681a ldr r2, [r3, #0]
8003a64: 4613 mov r3, r2
8003a66: 005b lsls r3, r3, #1
8003a68: 4413 add r3, r2
8003a6a: 2207 movs r2, #7
8003a6c: fa02 f303 lsl.w r3, r2, r3
8003a70: 43db mvns r3, r3
8003a72: 4019 ands r1, r3
8003a74: 683b ldr r3, [r7, #0]
8003a76: 6898 ldr r0, [r3, #8]
8003a78: 683b ldr r3, [r7, #0]
8003a7a: 681a ldr r2, [r3, #0]
8003a7c: 4613 mov r3, r2
8003a7e: 005b lsls r3, r3, #1
8003a80: 4413 add r3, r2
8003a82: fa00 f203 lsl.w r2, r0, r3
8003a86: 687b ldr r3, [r7, #4]
8003a88: 681b ldr r3, [r3, #0]
8003a8a: 430a orrs r2, r1
8003a8c: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8003a8e: 683b ldr r3, [r7, #0]
8003a90: 681b ldr r3, [r3, #0]
8003a92: 2b10 cmp r3, #16
8003a94: d003 beq.n 8003a9e <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8003a96: 683b ldr r3, [r7, #0]
8003a98: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8003a9a: 2b11 cmp r3, #17
8003a9c: d132 bne.n 8003b04 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
8003a9e: 687b ldr r3, [r7, #4]
8003aa0: 681b ldr r3, [r3, #0]
8003aa2: 4a1d ldr r2, [pc, #116] @ (8003b18 <HAL_ADC_ConfigChannel+0x1e4>)
8003aa4: 4293 cmp r3, r2
8003aa6: d125 bne.n 8003af4 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8003aa8: 687b ldr r3, [r7, #4]
8003aaa: 681b ldr r3, [r3, #0]
8003aac: 689b ldr r3, [r3, #8]
8003aae: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8003ab2: 2b00 cmp r3, #0
8003ab4: d126 bne.n 8003b04 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8003ab6: 687b ldr r3, [r7, #4]
8003ab8: 681b ldr r3, [r3, #0]
8003aba: 689a ldr r2, [r3, #8]
8003abc: 687b ldr r3, [r7, #4]
8003abe: 681b ldr r3, [r3, #0]
8003ac0: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8003ac4: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
8003ac6: 683b ldr r3, [r7, #0]
8003ac8: 681b ldr r3, [r3, #0]
8003aca: 2b10 cmp r3, #16
8003acc: d11a bne.n 8003b04 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8003ace: 4b13 ldr r3, [pc, #76] @ (8003b1c <HAL_ADC_ConfigChannel+0x1e8>)
8003ad0: 681b ldr r3, [r3, #0]
8003ad2: 4a13 ldr r2, [pc, #76] @ (8003b20 <HAL_ADC_ConfigChannel+0x1ec>)
8003ad4: fba2 2303 umull r2, r3, r2, r3
8003ad8: 0c9a lsrs r2, r3, #18
8003ada: 4613 mov r3, r2
8003adc: 009b lsls r3, r3, #2
8003ade: 4413 add r3, r2
8003ae0: 005b lsls r3, r3, #1
8003ae2: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8003ae4: e002 b.n 8003aec <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
8003ae6: 68bb ldr r3, [r7, #8]
8003ae8: 3b01 subs r3, #1
8003aea: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8003aec: 68bb ldr r3, [r7, #8]
8003aee: 2b00 cmp r3, #0
8003af0: d1f9 bne.n 8003ae6 <HAL_ADC_ConfigChannel+0x1b2>
8003af2: e007 b.n 8003b04 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8003af4: 687b ldr r3, [r7, #4]
8003af6: 6a9b ldr r3, [r3, #40] @ 0x28
8003af8: f043 0220 orr.w r2, r3, #32
8003afc: 687b ldr r3, [r7, #4]
8003afe: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8003b00: 2301 movs r3, #1
8003b02: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8003b04: 687b ldr r3, [r7, #4]
8003b06: 2200 movs r2, #0
8003b08: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
8003b0c: 7bfb ldrb r3, [r7, #15]
}
8003b0e: 4618 mov r0, r3
8003b10: 3714 adds r7, #20
8003b12: 46bd mov sp, r7
8003b14: bc80 pop {r7}
8003b16: 4770 bx lr
8003b18: 40012400 .word 0x40012400
8003b1c: 20000008 .word 0x20000008
8003b20: 431bde83 .word 0x431bde83
08003b24 <ADC_Enable>:
* and voltage regulator must be enabled (done into HAL_ADC_Init()).
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
{
8003b24: b580 push {r7, lr}
8003b26: b084 sub sp, #16
8003b28: af00 add r7, sp, #0
8003b2a: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8003b2c: 2300 movs r3, #0
8003b2e: 60fb str r3, [r7, #12]
__IO uint32_t wait_loop_index = 0U;
8003b30: 2300 movs r3, #0
8003b32: 60bb str r3, [r7, #8]
/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
/* enabling phase not yet completed: flag ADC ready not yet set). */
/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
/* causes: ADC clock not running, ...). */
if (ADC_IS_ENABLE(hadc) == RESET)
8003b34: 687b ldr r3, [r7, #4]
8003b36: 681b ldr r3, [r3, #0]
8003b38: 689b ldr r3, [r3, #8]
8003b3a: f003 0301 and.w r3, r3, #1
8003b3e: 2b01 cmp r3, #1
8003b40: d040 beq.n 8003bc4 <ADC_Enable+0xa0>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
8003b42: 687b ldr r3, [r7, #4]
8003b44: 681b ldr r3, [r3, #0]
8003b46: 689a ldr r2, [r3, #8]
8003b48: 687b ldr r3, [r7, #4]
8003b4a: 681b ldr r3, [r3, #0]
8003b4c: f042 0201 orr.w r2, r2, #1
8003b50: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
8003b52: 4b1f ldr r3, [pc, #124] @ (8003bd0 <ADC_Enable+0xac>)
8003b54: 681b ldr r3, [r3, #0]
8003b56: 4a1f ldr r2, [pc, #124] @ (8003bd4 <ADC_Enable+0xb0>)
8003b58: fba2 2303 umull r2, r3, r2, r3
8003b5c: 0c9b lsrs r3, r3, #18
8003b5e: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8003b60: e002 b.n 8003b68 <ADC_Enable+0x44>
{
wait_loop_index--;
8003b62: 68bb ldr r3, [r7, #8]
8003b64: 3b01 subs r3, #1
8003b66: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8003b68: 68bb ldr r3, [r7, #8]
8003b6a: 2b00 cmp r3, #0
8003b6c: d1f9 bne.n 8003b62 <ADC_Enable+0x3e>
}
/* Get tick count */
tickstart = HAL_GetTick();
8003b6e: f7ff fd05 bl 800357c <HAL_GetTick>
8003b72: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively enabled */
while(ADC_IS_ENABLE(hadc) == RESET)
8003b74: e01f b.n 8003bb6 <ADC_Enable+0x92>
{
if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
8003b76: f7ff fd01 bl 800357c <HAL_GetTick>
8003b7a: 4602 mov r2, r0
8003b7c: 68fb ldr r3, [r7, #12]
8003b7e: 1ad3 subs r3, r2, r3
8003b80: 2b02 cmp r3, #2
8003b82: d918 bls.n 8003bb6 <ADC_Enable+0x92>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) == RESET)
8003b84: 687b ldr r3, [r7, #4]
8003b86: 681b ldr r3, [r3, #0]
8003b88: 689b ldr r3, [r3, #8]
8003b8a: f003 0301 and.w r3, r3, #1
8003b8e: 2b01 cmp r3, #1
8003b90: d011 beq.n 8003bb6 <ADC_Enable+0x92>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8003b92: 687b ldr r3, [r7, #4]
8003b94: 6a9b ldr r3, [r3, #40] @ 0x28
8003b96: f043 0210 orr.w r2, r3, #16
8003b9a: 687b ldr r3, [r7, #4]
8003b9c: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8003b9e: 687b ldr r3, [r7, #4]
8003ba0: 6adb ldr r3, [r3, #44] @ 0x2c
8003ba2: f043 0201 orr.w r2, r3, #1
8003ba6: 687b ldr r3, [r7, #4]
8003ba8: 62da str r2, [r3, #44] @ 0x2c
/* Process unlocked */
__HAL_UNLOCK(hadc);
8003baa: 687b ldr r3, [r7, #4]
8003bac: 2200 movs r2, #0
8003bae: f883 2024 strb.w r2, [r3, #36] @ 0x24
return HAL_ERROR;
8003bb2: 2301 movs r3, #1
8003bb4: e007 b.n 8003bc6 <ADC_Enable+0xa2>
while(ADC_IS_ENABLE(hadc) == RESET)
8003bb6: 687b ldr r3, [r7, #4]
8003bb8: 681b ldr r3, [r3, #0]
8003bba: 689b ldr r3, [r3, #8]
8003bbc: f003 0301 and.w r3, r3, #1
8003bc0: 2b01 cmp r3, #1
8003bc2: d1d8 bne.n 8003b76 <ADC_Enable+0x52>
}
}
}
/* Return HAL status */
return HAL_OK;
8003bc4: 2300 movs r3, #0
}
8003bc6: 4618 mov r0, r3
8003bc8: 3710 adds r7, #16
8003bca: 46bd mov sp, r7
8003bcc: bd80 pop {r7, pc}
8003bce: bf00 nop
8003bd0: 20000008 .word 0x20000008
8003bd4: 431bde83 .word 0x431bde83
08003bd8 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
8003bd8: b580 push {r7, lr}
8003bda: b084 sub sp, #16
8003bdc: af00 add r7, sp, #0
8003bde: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8003be0: 2300 movs r3, #0
8003be2: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
8003be4: 687b ldr r3, [r7, #4]
8003be6: 681b ldr r3, [r3, #0]
8003be8: 689b ldr r3, [r3, #8]
8003bea: f003 0301 and.w r3, r3, #1
8003bee: 2b01 cmp r3, #1
8003bf0: d12e bne.n 8003c50 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8003bf2: 687b ldr r3, [r7, #4]
8003bf4: 681b ldr r3, [r3, #0]
8003bf6: 689a ldr r2, [r3, #8]
8003bf8: 687b ldr r3, [r7, #4]
8003bfa: 681b ldr r3, [r3, #0]
8003bfc: f022 0201 bic.w r2, r2, #1
8003c00: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
8003c02: f7ff fcbb bl 800357c <HAL_GetTick>
8003c06: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
8003c08: e01b b.n 8003c42 <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
8003c0a: f7ff fcb7 bl 800357c <HAL_GetTick>
8003c0e: 4602 mov r2, r0
8003c10: 68fb ldr r3, [r7, #12]
8003c12: 1ad3 subs r3, r2, r3
8003c14: 2b02 cmp r3, #2
8003c16: d914 bls.n 8003c42 <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
8003c18: 687b ldr r3, [r7, #4]
8003c1a: 681b ldr r3, [r3, #0]
8003c1c: 689b ldr r3, [r3, #8]
8003c1e: f003 0301 and.w r3, r3, #1
8003c22: 2b01 cmp r3, #1
8003c24: d10d bne.n 8003c42 <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8003c26: 687b ldr r3, [r7, #4]
8003c28: 6a9b ldr r3, [r3, #40] @ 0x28
8003c2a: f043 0210 orr.w r2, r3, #16
8003c2e: 687b ldr r3, [r7, #4]
8003c30: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8003c32: 687b ldr r3, [r7, #4]
8003c34: 6adb ldr r3, [r3, #44] @ 0x2c
8003c36: f043 0201 orr.w r2, r3, #1
8003c3a: 687b ldr r3, [r7, #4]
8003c3c: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
8003c3e: 2301 movs r3, #1
8003c40: e007 b.n 8003c52 <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
8003c42: 687b ldr r3, [r7, #4]
8003c44: 681b ldr r3, [r3, #0]
8003c46: 689b ldr r3, [r3, #8]
8003c48: f003 0301 and.w r3, r3, #1
8003c4c: 2b01 cmp r3, #1
8003c4e: d0dc beq.n 8003c0a <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
8003c50: 2300 movs r3, #0
}
8003c52: 4618 mov r0, r3
8003c54: 3710 adds r7, #16
8003c56: 46bd mov sp, r7
8003c58: bd80 pop {r7, pc}
08003c5a <ADC_DMAConvCplt>:
* @brief DMA transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
8003c5a: b580 push {r7, lr}
8003c5c: b084 sub sp, #16
8003c5e: af00 add r7, sp, #0
8003c60: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8003c62: 687b ldr r3, [r7, #4]
8003c64: 6a5b ldr r3, [r3, #36] @ 0x24
8003c66: 60fb str r3, [r7, #12]
/* Update state machine on conversion status if not in error state */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
8003c68: 68fb ldr r3, [r7, #12]
8003c6a: 6a9b ldr r3, [r3, #40] @ 0x28
8003c6c: f003 0350 and.w r3, r3, #80 @ 0x50
8003c70: 2b00 cmp r3, #0
8003c72: d127 bne.n 8003cc4 <ADC_DMAConvCplt+0x6a>
{
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
8003c74: 68fb ldr r3, [r7, #12]
8003c76: 6a9b ldr r3, [r3, #40] @ 0x28
8003c78: f443 7200 orr.w r2, r3, #512 @ 0x200
8003c7c: 68fb ldr r3, [r7, #12]
8003c7e: 629a str r2, [r3, #40] @ 0x28
/* Determine whether any further conversion upcoming on group regular */
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F1 devices, in case of sequencer enabled */
/* (several ranks selected), end of conversion flag is raised */
/* at the end of the sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8003c80: 68fb ldr r3, [r7, #12]
8003c82: 681b ldr r3, [r3, #0]
8003c84: 689b ldr r3, [r3, #8]
8003c86: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8003c8a: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
8003c8e: d115 bne.n 8003cbc <ADC_DMAConvCplt+0x62>
(hadc->Init.ContinuousConvMode == DISABLE) )
8003c90: 68fb ldr r3, [r7, #12]
8003c92: 7b1b ldrb r3, [r3, #12]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8003c94: 2b00 cmp r3, #0
8003c96: d111 bne.n 8003cbc <ADC_DMAConvCplt+0x62>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
8003c98: 68fb ldr r3, [r7, #12]
8003c9a: 6a9b ldr r3, [r3, #40] @ 0x28
8003c9c: f423 7280 bic.w r2, r3, #256 @ 0x100
8003ca0: 68fb ldr r3, [r7, #12]
8003ca2: 629a str r2, [r3, #40] @ 0x28
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8003ca4: 68fb ldr r3, [r7, #12]
8003ca6: 6a9b ldr r3, [r3, #40] @ 0x28
8003ca8: f403 5380 and.w r3, r3, #4096 @ 0x1000
8003cac: 2b00 cmp r3, #0
8003cae: d105 bne.n 8003cbc <ADC_DMAConvCplt+0x62>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
8003cb0: 68fb ldr r3, [r7, #12]
8003cb2: 6a9b ldr r3, [r3, #40] @ 0x28
8003cb4: f043 0201 orr.w r2, r3, #1
8003cb8: 68fb ldr r3, [r7, #12]
8003cba: 629a str r2, [r3, #40] @ 0x28
/* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvCpltCallback(hadc);
#else
HAL_ADC_ConvCpltCallback(hadc);
8003cbc: 68f8 ldr r0, [r7, #12]
8003cbe: f7ff fe1d bl 80038fc <HAL_ADC_ConvCpltCallback>
else
{
/* Call DMA error callback */
hadc->DMA_Handle->XferErrorCallback(hdma);
}
}
8003cc2: e004 b.n 8003cce <ADC_DMAConvCplt+0x74>
hadc->DMA_Handle->XferErrorCallback(hdma);
8003cc4: 68fb ldr r3, [r7, #12]
8003cc6: 6a1b ldr r3, [r3, #32]
8003cc8: 6b1b ldr r3, [r3, #48] @ 0x30
8003cca: 6878 ldr r0, [r7, #4]
8003ccc: 4798 blx r3
}
8003cce: bf00 nop
8003cd0: 3710 adds r7, #16
8003cd2: 46bd mov sp, r7
8003cd4: bd80 pop {r7, pc}
08003cd6 <ADC_DMAHalfConvCplt>:
* @brief DMA half transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
{
8003cd6: b580 push {r7, lr}
8003cd8: b084 sub sp, #16
8003cda: af00 add r7, sp, #0
8003cdc: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8003cde: 687b ldr r3, [r7, #4]
8003ce0: 6a5b ldr r3, [r3, #36] @ 0x24
8003ce2: 60fb str r3, [r7, #12]
/* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvHalfCpltCallback(hadc);
#else
HAL_ADC_ConvHalfCpltCallback(hadc);
8003ce4: 68f8 ldr r0, [r7, #12]
8003ce6: f7ff fe12 bl 800390e <HAL_ADC_ConvHalfCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
8003cea: bf00 nop
8003cec: 3710 adds r7, #16
8003cee: 46bd mov sp, r7
8003cf0: bd80 pop {r7, pc}
08003cf2 <ADC_DMAError>:
* @brief DMA error callback
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAError(DMA_HandleTypeDef *hdma)
{
8003cf2: b580 push {r7, lr}
8003cf4: b084 sub sp, #16
8003cf6: af00 add r7, sp, #0
8003cf8: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8003cfa: 687b ldr r3, [r7, #4]
8003cfc: 6a5b ldr r3, [r3, #36] @ 0x24
8003cfe: 60fb str r3, [r7, #12]
/* Set ADC state */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
8003d00: 68fb ldr r3, [r7, #12]
8003d02: 6a9b ldr r3, [r3, #40] @ 0x28
8003d04: f043 0240 orr.w r2, r3, #64 @ 0x40
8003d08: 68fb ldr r3, [r7, #12]
8003d0a: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to DMA error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
8003d0c: 68fb ldr r3, [r7, #12]
8003d0e: 6adb ldr r3, [r3, #44] @ 0x2c
8003d10: f043 0204 orr.w r2, r3, #4
8003d14: 68fb ldr r3, [r7, #12]
8003d16: 62da str r2, [r3, #44] @ 0x2c
/* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ErrorCallback(hadc);
#else
HAL_ADC_ErrorCallback(hadc);
8003d18: 68f8 ldr r0, [r7, #12]
8003d1a: f7ff fe01 bl 8003920 <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
8003d1e: bf00 nop
8003d20: 3710 adds r7, #16
8003d22: 46bd mov sp, r7
8003d24: bd80 pop {r7, pc}
...
08003d28 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8003d28: b480 push {r7}
8003d2a: b085 sub sp, #20
8003d2c: af00 add r7, sp, #0
8003d2e: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8003d30: 687b ldr r3, [r7, #4]
8003d32: f003 0307 and.w r3, r3, #7
8003d36: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8003d38: 4b0c ldr r3, [pc, #48] @ (8003d6c <__NVIC_SetPriorityGrouping+0x44>)
8003d3a: 68db ldr r3, [r3, #12]
8003d3c: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8003d3e: 68ba ldr r2, [r7, #8]
8003d40: f64f 03ff movw r3, #63743 @ 0xf8ff
8003d44: 4013 ands r3, r2
8003d46: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8003d48: 68fb ldr r3, [r7, #12]
8003d4a: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8003d4c: 68bb ldr r3, [r7, #8]
8003d4e: 4313 orrs r3, r2
reg_value = (reg_value |
8003d50: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8003d54: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8003d58: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8003d5a: 4a04 ldr r2, [pc, #16] @ (8003d6c <__NVIC_SetPriorityGrouping+0x44>)
8003d5c: 68bb ldr r3, [r7, #8]
8003d5e: 60d3 str r3, [r2, #12]
}
8003d60: bf00 nop
8003d62: 3714 adds r7, #20
8003d64: 46bd mov sp, r7
8003d66: bc80 pop {r7}
8003d68: 4770 bx lr
8003d6a: bf00 nop
8003d6c: e000ed00 .word 0xe000ed00
08003d70 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8003d70: b480 push {r7}
8003d72: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8003d74: 4b04 ldr r3, [pc, #16] @ (8003d88 <__NVIC_GetPriorityGrouping+0x18>)
8003d76: 68db ldr r3, [r3, #12]
8003d78: 0a1b lsrs r3, r3, #8
8003d7a: f003 0307 and.w r3, r3, #7
}
8003d7e: 4618 mov r0, r3
8003d80: 46bd mov sp, r7
8003d82: bc80 pop {r7}
8003d84: 4770 bx lr
8003d86: bf00 nop
8003d88: e000ed00 .word 0xe000ed00
08003d8c <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8003d8c: b480 push {r7}
8003d8e: b083 sub sp, #12
8003d90: af00 add r7, sp, #0
8003d92: 4603 mov r3, r0
8003d94: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8003d96: f997 3007 ldrsb.w r3, [r7, #7]
8003d9a: 2b00 cmp r3, #0
8003d9c: db0b blt.n 8003db6 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8003d9e: 79fb ldrb r3, [r7, #7]
8003da0: f003 021f and.w r2, r3, #31
8003da4: 4906 ldr r1, [pc, #24] @ (8003dc0 <__NVIC_EnableIRQ+0x34>)
8003da6: f997 3007 ldrsb.w r3, [r7, #7]
8003daa: 095b lsrs r3, r3, #5
8003dac: 2001 movs r0, #1
8003dae: fa00 f202 lsl.w r2, r0, r2
8003db2: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8003db6: bf00 nop
8003db8: 370c adds r7, #12
8003dba: 46bd mov sp, r7
8003dbc: bc80 pop {r7}
8003dbe: 4770 bx lr
8003dc0: e000e100 .word 0xe000e100
08003dc4 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8003dc4: b480 push {r7}
8003dc6: b083 sub sp, #12
8003dc8: af00 add r7, sp, #0
8003dca: 4603 mov r3, r0
8003dcc: 6039 str r1, [r7, #0]
8003dce: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8003dd0: f997 3007 ldrsb.w r3, [r7, #7]
8003dd4: 2b00 cmp r3, #0
8003dd6: db0a blt.n 8003dee <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8003dd8: 683b ldr r3, [r7, #0]
8003dda: b2da uxtb r2, r3
8003ddc: 490c ldr r1, [pc, #48] @ (8003e10 <__NVIC_SetPriority+0x4c>)
8003dde: f997 3007 ldrsb.w r3, [r7, #7]
8003de2: 0112 lsls r2, r2, #4
8003de4: b2d2 uxtb r2, r2
8003de6: 440b add r3, r1
8003de8: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8003dec: e00a b.n 8003e04 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8003dee: 683b ldr r3, [r7, #0]
8003df0: b2da uxtb r2, r3
8003df2: 4908 ldr r1, [pc, #32] @ (8003e14 <__NVIC_SetPriority+0x50>)
8003df4: 79fb ldrb r3, [r7, #7]
8003df6: f003 030f and.w r3, r3, #15
8003dfa: 3b04 subs r3, #4
8003dfc: 0112 lsls r2, r2, #4
8003dfe: b2d2 uxtb r2, r2
8003e00: 440b add r3, r1
8003e02: 761a strb r2, [r3, #24]
}
8003e04: bf00 nop
8003e06: 370c adds r7, #12
8003e08: 46bd mov sp, r7
8003e0a: bc80 pop {r7}
8003e0c: 4770 bx lr
8003e0e: bf00 nop
8003e10: e000e100 .word 0xe000e100
8003e14: e000ed00 .word 0xe000ed00
08003e18 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8003e18: b480 push {r7}
8003e1a: b089 sub sp, #36 @ 0x24
8003e1c: af00 add r7, sp, #0
8003e1e: 60f8 str r0, [r7, #12]
8003e20: 60b9 str r1, [r7, #8]
8003e22: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8003e24: 68fb ldr r3, [r7, #12]
8003e26: f003 0307 and.w r3, r3, #7
8003e2a: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8003e2c: 69fb ldr r3, [r7, #28]
8003e2e: f1c3 0307 rsb r3, r3, #7
8003e32: 2b04 cmp r3, #4
8003e34: bf28 it cs
8003e36: 2304 movcs r3, #4
8003e38: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8003e3a: 69fb ldr r3, [r7, #28]
8003e3c: 3304 adds r3, #4
8003e3e: 2b06 cmp r3, #6
8003e40: d902 bls.n 8003e48 <NVIC_EncodePriority+0x30>
8003e42: 69fb ldr r3, [r7, #28]
8003e44: 3b03 subs r3, #3
8003e46: e000 b.n 8003e4a <NVIC_EncodePriority+0x32>
8003e48: 2300 movs r3, #0
8003e4a: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8003e4c: f04f 32ff mov.w r2, #4294967295
8003e50: 69bb ldr r3, [r7, #24]
8003e52: fa02 f303 lsl.w r3, r2, r3
8003e56: 43da mvns r2, r3
8003e58: 68bb ldr r3, [r7, #8]
8003e5a: 401a ands r2, r3
8003e5c: 697b ldr r3, [r7, #20]
8003e5e: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8003e60: f04f 31ff mov.w r1, #4294967295
8003e64: 697b ldr r3, [r7, #20]
8003e66: fa01 f303 lsl.w r3, r1, r3
8003e6a: 43d9 mvns r1, r3
8003e6c: 687b ldr r3, [r7, #4]
8003e6e: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8003e70: 4313 orrs r3, r2
);
}
8003e72: 4618 mov r0, r3
8003e74: 3724 adds r7, #36 @ 0x24
8003e76: 46bd mov sp, r7
8003e78: bc80 pop {r7}
8003e7a: 4770 bx lr
08003e7c <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8003e7c: b580 push {r7, lr}
8003e7e: b082 sub sp, #8
8003e80: af00 add r7, sp, #0
8003e82: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8003e84: 687b ldr r3, [r7, #4]
8003e86: 3b01 subs r3, #1
8003e88: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
8003e8c: d301 bcc.n 8003e92 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8003e8e: 2301 movs r3, #1
8003e90: e00f b.n 8003eb2 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8003e92: 4a0a ldr r2, [pc, #40] @ (8003ebc <SysTick_Config+0x40>)
8003e94: 687b ldr r3, [r7, #4]
8003e96: 3b01 subs r3, #1
8003e98: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8003e9a: 210f movs r1, #15
8003e9c: f04f 30ff mov.w r0, #4294967295
8003ea0: f7ff ff90 bl 8003dc4 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8003ea4: 4b05 ldr r3, [pc, #20] @ (8003ebc <SysTick_Config+0x40>)
8003ea6: 2200 movs r2, #0
8003ea8: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8003eaa: 4b04 ldr r3, [pc, #16] @ (8003ebc <SysTick_Config+0x40>)
8003eac: 2207 movs r2, #7
8003eae: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8003eb0: 2300 movs r3, #0
}
8003eb2: 4618 mov r0, r3
8003eb4: 3708 adds r7, #8
8003eb6: 46bd mov sp, r7
8003eb8: bd80 pop {r7, pc}
8003eba: bf00 nop
8003ebc: e000e010 .word 0xe000e010
08003ec0 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8003ec0: b580 push {r7, lr}
8003ec2: b082 sub sp, #8
8003ec4: af00 add r7, sp, #0
8003ec6: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8003ec8: 6878 ldr r0, [r7, #4]
8003eca: f7ff ff2d bl 8003d28 <__NVIC_SetPriorityGrouping>
}
8003ece: bf00 nop
8003ed0: 3708 adds r7, #8
8003ed2: 46bd mov sp, r7
8003ed4: bd80 pop {r7, pc}
08003ed6 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8003ed6: b580 push {r7, lr}
8003ed8: b086 sub sp, #24
8003eda: af00 add r7, sp, #0
8003edc: 4603 mov r3, r0
8003ede: 60b9 str r1, [r7, #8]
8003ee0: 607a str r2, [r7, #4]
8003ee2: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8003ee4: 2300 movs r3, #0
8003ee6: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8003ee8: f7ff ff42 bl 8003d70 <__NVIC_GetPriorityGrouping>
8003eec: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8003eee: 687a ldr r2, [r7, #4]
8003ef0: 68b9 ldr r1, [r7, #8]
8003ef2: 6978 ldr r0, [r7, #20]
8003ef4: f7ff ff90 bl 8003e18 <NVIC_EncodePriority>
8003ef8: 4602 mov r2, r0
8003efa: f997 300f ldrsb.w r3, [r7, #15]
8003efe: 4611 mov r1, r2
8003f00: 4618 mov r0, r3
8003f02: f7ff ff5f bl 8003dc4 <__NVIC_SetPriority>
}
8003f06: bf00 nop
8003f08: 3718 adds r7, #24
8003f0a: 46bd mov sp, r7
8003f0c: bd80 pop {r7, pc}
08003f0e <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8003f0e: b580 push {r7, lr}
8003f10: b082 sub sp, #8
8003f12: af00 add r7, sp, #0
8003f14: 4603 mov r3, r0
8003f16: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8003f18: f997 3007 ldrsb.w r3, [r7, #7]
8003f1c: 4618 mov r0, r3
8003f1e: f7ff ff35 bl 8003d8c <__NVIC_EnableIRQ>
}
8003f22: bf00 nop
8003f24: 3708 adds r7, #8
8003f26: 46bd mov sp, r7
8003f28: bd80 pop {r7, pc}
08003f2a <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8003f2a: b580 push {r7, lr}
8003f2c: b082 sub sp, #8
8003f2e: af00 add r7, sp, #0
8003f30: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8003f32: 6878 ldr r0, [r7, #4]
8003f34: f7ff ffa2 bl 8003e7c <SysTick_Config>
8003f38: 4603 mov r3, r0
}
8003f3a: 4618 mov r0, r3
8003f3c: 3708 adds r7, #8
8003f3e: 46bd mov sp, r7
8003f40: bd80 pop {r7, pc}
08003f42 <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8003f42: b580 push {r7, lr}
8003f44: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
8003f46: f7fd f9d1 bl 80012ec <HAL_SYSTICK_Callback>
}
8003f4a: bf00 nop
8003f4c: bd80 pop {r7, pc}
...
08003f50 <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8003f50: b480 push {r7}
8003f52: b085 sub sp, #20
8003f54: af00 add r7, sp, #0
8003f56: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
8003f58: 2300 movs r3, #0
8003f5a: 60fb str r3, [r7, #12]
/* Check the DMA handle allocation */
if(hdma == NULL)
8003f5c: 687b ldr r3, [r7, #4]
8003f5e: 2b00 cmp r3, #0
8003f60: d101 bne.n 8003f66 <HAL_DMA_Init+0x16>
{
return HAL_ERROR;
8003f62: 2301 movs r3, #1
8003f64: e043 b.n 8003fee <HAL_DMA_Init+0x9e>
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
hdma->DmaBaseAddress = DMA2;
}
#else
/* DMA1 */
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
8003f66: 687b ldr r3, [r7, #4]
8003f68: 681b ldr r3, [r3, #0]
8003f6a: 461a mov r2, r3
8003f6c: 4b22 ldr r3, [pc, #136] @ (8003ff8 <HAL_DMA_Init+0xa8>)
8003f6e: 4413 add r3, r2
8003f70: 4a22 ldr r2, [pc, #136] @ (8003ffc <HAL_DMA_Init+0xac>)
8003f72: fba2 2303 umull r2, r3, r2, r3
8003f76: 091b lsrs r3, r3, #4
8003f78: 009a lsls r2, r3, #2
8003f7a: 687b ldr r3, [r7, #4]
8003f7c: 641a str r2, [r3, #64] @ 0x40
hdma->DmaBaseAddress = DMA1;
8003f7e: 687b ldr r3, [r7, #4]
8003f80: 4a1f ldr r2, [pc, #124] @ (8004000 <HAL_DMA_Init+0xb0>)
8003f82: 63da str r2, [r3, #60] @ 0x3c
#endif /* DMA2 */
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8003f84: 687b ldr r3, [r7, #4]
8003f86: 2202 movs r2, #2
8003f88: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Get the CR register value */
tmp = hdma->Instance->CCR;
8003f8c: 687b ldr r3, [r7, #4]
8003f8e: 681b ldr r3, [r3, #0]
8003f90: 681b ldr r3, [r3, #0]
8003f92: 60fb str r3, [r7, #12]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
8003f94: 68fb ldr r3, [r7, #12]
8003f96: f423 537f bic.w r3, r3, #16320 @ 0x3fc0
8003f9a: f023 0330 bic.w r3, r3, #48 @ 0x30
8003f9e: 60fb str r3, [r7, #12]
DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
DMA_CCR_DIR));
/* Prepare the DMA Channel configuration */
tmp |= hdma->Init.Direction |
8003fa0: 687b ldr r3, [r7, #4]
8003fa2: 685a ldr r2, [r3, #4]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8003fa4: 687b ldr r3, [r7, #4]
8003fa6: 689b ldr r3, [r3, #8]
tmp |= hdma->Init.Direction |
8003fa8: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
8003faa: 687b ldr r3, [r7, #4]
8003fac: 68db ldr r3, [r3, #12]
8003fae: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8003fb0: 687b ldr r3, [r7, #4]
8003fb2: 691b ldr r3, [r3, #16]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8003fb4: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8003fb6: 687b ldr r3, [r7, #4]
8003fb8: 695b ldr r3, [r3, #20]
8003fba: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8003fbc: 687b ldr r3, [r7, #4]
8003fbe: 699b ldr r3, [r3, #24]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8003fc0: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8003fc2: 687b ldr r3, [r7, #4]
8003fc4: 69db ldr r3, [r3, #28]
8003fc6: 4313 orrs r3, r2
tmp |= hdma->Init.Direction |
8003fc8: 68fa ldr r2, [r7, #12]
8003fca: 4313 orrs r3, r2
8003fcc: 60fb str r3, [r7, #12]
/* Write to DMA Channel CR register */
hdma->Instance->CCR = tmp;
8003fce: 687b ldr r3, [r7, #4]
8003fd0: 681b ldr r3, [r3, #0]
8003fd2: 68fa ldr r2, [r7, #12]
8003fd4: 601a str r2, [r3, #0]
/* Initialise the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8003fd6: 687b ldr r3, [r7, #4]
8003fd8: 2200 movs r2, #0
8003fda: 639a str r2, [r3, #56] @ 0x38
/* Initialize the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
8003fdc: 687b ldr r3, [r7, #4]
8003fde: 2201 movs r2, #1
8003fe0: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Allocate lock resource and initialize it */
hdma->Lock = HAL_UNLOCKED;
8003fe4: 687b ldr r3, [r7, #4]
8003fe6: 2200 movs r2, #0
8003fe8: f883 2020 strb.w r2, [r3, #32]
return HAL_OK;
8003fec: 2300 movs r3, #0
}
8003fee: 4618 mov r0, r3
8003ff0: 3714 adds r7, #20
8003ff2: 46bd mov sp, r7
8003ff4: bc80 pop {r7}
8003ff6: 4770 bx lr
8003ff8: bffdfff8 .word 0xbffdfff8
8003ffc: cccccccd .word 0xcccccccd
8004000: 40020000 .word 0x40020000
08004004 <HAL_DMA_Start_IT>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8004004: b580 push {r7, lr}
8004006: b086 sub sp, #24
8004008: af00 add r7, sp, #0
800400a: 60f8 str r0, [r7, #12]
800400c: 60b9 str r1, [r7, #8]
800400e: 607a str r2, [r7, #4]
8004010: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8004012: 2300 movs r3, #0
8004014: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
8004016: 68fb ldr r3, [r7, #12]
8004018: f893 3020 ldrb.w r3, [r3, #32]
800401c: 2b01 cmp r3, #1
800401e: d101 bne.n 8004024 <HAL_DMA_Start_IT+0x20>
8004020: 2302 movs r3, #2
8004022: e04b b.n 80040bc <HAL_DMA_Start_IT+0xb8>
8004024: 68fb ldr r3, [r7, #12]
8004026: 2201 movs r2, #1
8004028: f883 2020 strb.w r2, [r3, #32]
if(HAL_DMA_STATE_READY == hdma->State)
800402c: 68fb ldr r3, [r7, #12]
800402e: f893 3021 ldrb.w r3, [r3, #33] @ 0x21
8004032: b2db uxtb r3, r3
8004034: 2b01 cmp r3, #1
8004036: d13a bne.n 80040ae <HAL_DMA_Start_IT+0xaa>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8004038: 68fb ldr r3, [r7, #12]
800403a: 2202 movs r2, #2
800403c: f883 2021 strb.w r2, [r3, #33] @ 0x21
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8004040: 68fb ldr r3, [r7, #12]
8004042: 2200 movs r2, #0
8004044: 639a str r2, [r3, #56] @ 0x38
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
8004046: 68fb ldr r3, [r7, #12]
8004048: 681b ldr r3, [r3, #0]
800404a: 681a ldr r2, [r3, #0]
800404c: 68fb ldr r3, [r7, #12]
800404e: 681b ldr r3, [r3, #0]
8004050: f022 0201 bic.w r2, r2, #1
8004054: 601a str r2, [r3, #0]
/* Configure the source, destination address and the data length & clear flags*/
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
8004056: 683b ldr r3, [r7, #0]
8004058: 687a ldr r2, [r7, #4]
800405a: 68b9 ldr r1, [r7, #8]
800405c: 68f8 ldr r0, [r7, #12]
800405e: f000 f937 bl 80042d0 <DMA_SetConfig>
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback)
8004062: 68fb ldr r3, [r7, #12]
8004064: 6adb ldr r3, [r3, #44] @ 0x2c
8004066: 2b00 cmp r3, #0
8004068: d008 beq.n 800407c <HAL_DMA_Start_IT+0x78>
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
800406a: 68fb ldr r3, [r7, #12]
800406c: 681b ldr r3, [r3, #0]
800406e: 681a ldr r2, [r3, #0]
8004070: 68fb ldr r3, [r7, #12]
8004072: 681b ldr r3, [r3, #0]
8004074: f042 020e orr.w r2, r2, #14
8004078: 601a str r2, [r3, #0]
800407a: e00f b.n 800409c <HAL_DMA_Start_IT+0x98>
}
else
{
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
800407c: 68fb ldr r3, [r7, #12]
800407e: 681b ldr r3, [r3, #0]
8004080: 681a ldr r2, [r3, #0]
8004082: 68fb ldr r3, [r7, #12]
8004084: 681b ldr r3, [r3, #0]
8004086: f022 0204 bic.w r2, r2, #4
800408a: 601a str r2, [r3, #0]
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
800408c: 68fb ldr r3, [r7, #12]
800408e: 681b ldr r3, [r3, #0]
8004090: 681a ldr r2, [r3, #0]
8004092: 68fb ldr r3, [r7, #12]
8004094: 681b ldr r3, [r3, #0]
8004096: f042 020a orr.w r2, r2, #10
800409a: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
800409c: 68fb ldr r3, [r7, #12]
800409e: 681b ldr r3, [r3, #0]
80040a0: 681a ldr r2, [r3, #0]
80040a2: 68fb ldr r3, [r7, #12]
80040a4: 681b ldr r3, [r3, #0]
80040a6: f042 0201 orr.w r2, r2, #1
80040aa: 601a str r2, [r3, #0]
80040ac: e005 b.n 80040ba <HAL_DMA_Start_IT+0xb6>
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80040ae: 68fb ldr r3, [r7, #12]
80040b0: 2200 movs r2, #0
80040b2: f883 2020 strb.w r2, [r3, #32]
/* Remain BUSY */
status = HAL_BUSY;
80040b6: 2302 movs r3, #2
80040b8: 75fb strb r3, [r7, #23]
}
return status;
80040ba: 7dfb ldrb r3, [r7, #23]
}
80040bc: 4618 mov r0, r3
80040be: 3718 adds r7, #24
80040c0: 46bd mov sp, r7
80040c2: bd80 pop {r7, pc}
080040c4 <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
80040c4: b580 push {r7, lr}
80040c6: b084 sub sp, #16
80040c8: af00 add r7, sp, #0
80040ca: 6078 str r0, [r7, #4]
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
80040cc: 687b ldr r3, [r7, #4]
80040ce: 6bdb ldr r3, [r3, #60] @ 0x3c
80040d0: 681b ldr r3, [r3, #0]
80040d2: 60fb str r3, [r7, #12]
uint32_t source_it = hdma->Instance->CCR;
80040d4: 687b ldr r3, [r7, #4]
80040d6: 681b ldr r3, [r3, #0]
80040d8: 681b ldr r3, [r3, #0]
80040da: 60bb str r3, [r7, #8]
/* Half Transfer Complete Interrupt management ******************************/
if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
80040dc: 687b ldr r3, [r7, #4]
80040de: 6c1b ldr r3, [r3, #64] @ 0x40
80040e0: 2204 movs r2, #4
80040e2: 409a lsls r2, r3
80040e4: 68fb ldr r3, [r7, #12]
80040e6: 4013 ands r3, r2
80040e8: 2b00 cmp r3, #0
80040ea: d04f beq.n 800418c <HAL_DMA_IRQHandler+0xc8>
80040ec: 68bb ldr r3, [r7, #8]
80040ee: f003 0304 and.w r3, r3, #4
80040f2: 2b00 cmp r3, #0
80040f4: d04a beq.n 800418c <HAL_DMA_IRQHandler+0xc8>
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
80040f6: 687b ldr r3, [r7, #4]
80040f8: 681b ldr r3, [r3, #0]
80040fa: 681b ldr r3, [r3, #0]
80040fc: f003 0320 and.w r3, r3, #32
8004100: 2b00 cmp r3, #0
8004102: d107 bne.n 8004114 <HAL_DMA_IRQHandler+0x50>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8004104: 687b ldr r3, [r7, #4]
8004106: 681b ldr r3, [r3, #0]
8004108: 681a ldr r2, [r3, #0]
800410a: 687b ldr r3, [r7, #4]
800410c: 681b ldr r3, [r3, #0]
800410e: f022 0204 bic.w r2, r2, #4
8004112: 601a str r2, [r3, #0]
}
/* Clear the half transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
8004114: 687b ldr r3, [r7, #4]
8004116: 681b ldr r3, [r3, #0]
8004118: 4a66 ldr r2, [pc, #408] @ (80042b4 <HAL_DMA_IRQHandler+0x1f0>)
800411a: 4293 cmp r3, r2
800411c: d029 beq.n 8004172 <HAL_DMA_IRQHandler+0xae>
800411e: 687b ldr r3, [r7, #4]
8004120: 681b ldr r3, [r3, #0]
8004122: 4a65 ldr r2, [pc, #404] @ (80042b8 <HAL_DMA_IRQHandler+0x1f4>)
8004124: 4293 cmp r3, r2
8004126: d022 beq.n 800416e <HAL_DMA_IRQHandler+0xaa>
8004128: 687b ldr r3, [r7, #4]
800412a: 681b ldr r3, [r3, #0]
800412c: 4a63 ldr r2, [pc, #396] @ (80042bc <HAL_DMA_IRQHandler+0x1f8>)
800412e: 4293 cmp r3, r2
8004130: d01a beq.n 8004168 <HAL_DMA_IRQHandler+0xa4>
8004132: 687b ldr r3, [r7, #4]
8004134: 681b ldr r3, [r3, #0]
8004136: 4a62 ldr r2, [pc, #392] @ (80042c0 <HAL_DMA_IRQHandler+0x1fc>)
8004138: 4293 cmp r3, r2
800413a: d012 beq.n 8004162 <HAL_DMA_IRQHandler+0x9e>
800413c: 687b ldr r3, [r7, #4]
800413e: 681b ldr r3, [r3, #0]
8004140: 4a60 ldr r2, [pc, #384] @ (80042c4 <HAL_DMA_IRQHandler+0x200>)
8004142: 4293 cmp r3, r2
8004144: d00a beq.n 800415c <HAL_DMA_IRQHandler+0x98>
8004146: 687b ldr r3, [r7, #4]
8004148: 681b ldr r3, [r3, #0]
800414a: 4a5f ldr r2, [pc, #380] @ (80042c8 <HAL_DMA_IRQHandler+0x204>)
800414c: 4293 cmp r3, r2
800414e: d102 bne.n 8004156 <HAL_DMA_IRQHandler+0x92>
8004150: f44f 0380 mov.w r3, #4194304 @ 0x400000
8004154: e00e b.n 8004174 <HAL_DMA_IRQHandler+0xb0>
8004156: f04f 6380 mov.w r3, #67108864 @ 0x4000000
800415a: e00b b.n 8004174 <HAL_DMA_IRQHandler+0xb0>
800415c: f44f 2380 mov.w r3, #262144 @ 0x40000
8004160: e008 b.n 8004174 <HAL_DMA_IRQHandler+0xb0>
8004162: f44f 4380 mov.w r3, #16384 @ 0x4000
8004166: e005 b.n 8004174 <HAL_DMA_IRQHandler+0xb0>
8004168: f44f 6380 mov.w r3, #1024 @ 0x400
800416c: e002 b.n 8004174 <HAL_DMA_IRQHandler+0xb0>
800416e: 2340 movs r3, #64 @ 0x40
8004170: e000 b.n 8004174 <HAL_DMA_IRQHandler+0xb0>
8004172: 2304 movs r3, #4
8004174: 4a55 ldr r2, [pc, #340] @ (80042cc <HAL_DMA_IRQHandler+0x208>)
8004176: 6053 str r3, [r2, #4]
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
8004178: 687b ldr r3, [r7, #4]
800417a: 6adb ldr r3, [r3, #44] @ 0x2c
800417c: 2b00 cmp r3, #0
800417e: f000 8094 beq.w 80042aa <HAL_DMA_IRQHandler+0x1e6>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8004182: 687b ldr r3, [r7, #4]
8004184: 6adb ldr r3, [r3, #44] @ 0x2c
8004186: 6878 ldr r0, [r7, #4]
8004188: 4798 blx r3
if(hdma->XferHalfCpltCallback != NULL)
800418a: e08e b.n 80042aa <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
800418c: 687b ldr r3, [r7, #4]
800418e: 6c1b ldr r3, [r3, #64] @ 0x40
8004190: 2202 movs r2, #2
8004192: 409a lsls r2, r3
8004194: 68fb ldr r3, [r7, #12]
8004196: 4013 ands r3, r2
8004198: 2b00 cmp r3, #0
800419a: d056 beq.n 800424a <HAL_DMA_IRQHandler+0x186>
800419c: 68bb ldr r3, [r7, #8]
800419e: f003 0302 and.w r3, r3, #2
80041a2: 2b00 cmp r3, #0
80041a4: d051 beq.n 800424a <HAL_DMA_IRQHandler+0x186>
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
80041a6: 687b ldr r3, [r7, #4]
80041a8: 681b ldr r3, [r3, #0]
80041aa: 681b ldr r3, [r3, #0]
80041ac: f003 0320 and.w r3, r3, #32
80041b0: 2b00 cmp r3, #0
80041b2: d10b bne.n 80041cc <HAL_DMA_IRQHandler+0x108>
{
/* Disable the transfer complete and error interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
80041b4: 687b ldr r3, [r7, #4]
80041b6: 681b ldr r3, [r3, #0]
80041b8: 681a ldr r2, [r3, #0]
80041ba: 687b ldr r3, [r7, #4]
80041bc: 681b ldr r3, [r3, #0]
80041be: f022 020a bic.w r2, r2, #10
80041c2: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
80041c4: 687b ldr r3, [r7, #4]
80041c6: 2201 movs r2, #1
80041c8: f883 2021 strb.w r2, [r3, #33] @ 0x21
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
80041cc: 687b ldr r3, [r7, #4]
80041ce: 681b ldr r3, [r3, #0]
80041d0: 4a38 ldr r2, [pc, #224] @ (80042b4 <HAL_DMA_IRQHandler+0x1f0>)
80041d2: 4293 cmp r3, r2
80041d4: d029 beq.n 800422a <HAL_DMA_IRQHandler+0x166>
80041d6: 687b ldr r3, [r7, #4]
80041d8: 681b ldr r3, [r3, #0]
80041da: 4a37 ldr r2, [pc, #220] @ (80042b8 <HAL_DMA_IRQHandler+0x1f4>)
80041dc: 4293 cmp r3, r2
80041de: d022 beq.n 8004226 <HAL_DMA_IRQHandler+0x162>
80041e0: 687b ldr r3, [r7, #4]
80041e2: 681b ldr r3, [r3, #0]
80041e4: 4a35 ldr r2, [pc, #212] @ (80042bc <HAL_DMA_IRQHandler+0x1f8>)
80041e6: 4293 cmp r3, r2
80041e8: d01a beq.n 8004220 <HAL_DMA_IRQHandler+0x15c>
80041ea: 687b ldr r3, [r7, #4]
80041ec: 681b ldr r3, [r3, #0]
80041ee: 4a34 ldr r2, [pc, #208] @ (80042c0 <HAL_DMA_IRQHandler+0x1fc>)
80041f0: 4293 cmp r3, r2
80041f2: d012 beq.n 800421a <HAL_DMA_IRQHandler+0x156>
80041f4: 687b ldr r3, [r7, #4]
80041f6: 681b ldr r3, [r3, #0]
80041f8: 4a32 ldr r2, [pc, #200] @ (80042c4 <HAL_DMA_IRQHandler+0x200>)
80041fa: 4293 cmp r3, r2
80041fc: d00a beq.n 8004214 <HAL_DMA_IRQHandler+0x150>
80041fe: 687b ldr r3, [r7, #4]
8004200: 681b ldr r3, [r3, #0]
8004202: 4a31 ldr r2, [pc, #196] @ (80042c8 <HAL_DMA_IRQHandler+0x204>)
8004204: 4293 cmp r3, r2
8004206: d102 bne.n 800420e <HAL_DMA_IRQHandler+0x14a>
8004208: f44f 1300 mov.w r3, #2097152 @ 0x200000
800420c: e00e b.n 800422c <HAL_DMA_IRQHandler+0x168>
800420e: f04f 7300 mov.w r3, #33554432 @ 0x2000000
8004212: e00b b.n 800422c <HAL_DMA_IRQHandler+0x168>
8004214: f44f 3300 mov.w r3, #131072 @ 0x20000
8004218: e008 b.n 800422c <HAL_DMA_IRQHandler+0x168>
800421a: f44f 5300 mov.w r3, #8192 @ 0x2000
800421e: e005 b.n 800422c <HAL_DMA_IRQHandler+0x168>
8004220: f44f 7300 mov.w r3, #512 @ 0x200
8004224: e002 b.n 800422c <HAL_DMA_IRQHandler+0x168>
8004226: 2320 movs r3, #32
8004228: e000 b.n 800422c <HAL_DMA_IRQHandler+0x168>
800422a: 2302 movs r3, #2
800422c: 4a27 ldr r2, [pc, #156] @ (80042cc <HAL_DMA_IRQHandler+0x208>)
800422e: 6053 str r3, [r2, #4]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8004230: 687b ldr r3, [r7, #4]
8004232: 2200 movs r2, #0
8004234: f883 2020 strb.w r2, [r3, #32]
if(hdma->XferCpltCallback != NULL)
8004238: 687b ldr r3, [r7, #4]
800423a: 6a9b ldr r3, [r3, #40] @ 0x28
800423c: 2b00 cmp r3, #0
800423e: d034 beq.n 80042aa <HAL_DMA_IRQHandler+0x1e6>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8004240: 687b ldr r3, [r7, #4]
8004242: 6a9b ldr r3, [r3, #40] @ 0x28
8004244: 6878 ldr r0, [r7, #4]
8004246: 4798 blx r3
if(hdma->XferCpltCallback != NULL)
8004248: e02f b.n 80042aa <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Error Interrupt management **************************************/
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
800424a: 687b ldr r3, [r7, #4]
800424c: 6c1b ldr r3, [r3, #64] @ 0x40
800424e: 2208 movs r2, #8
8004250: 409a lsls r2, r3
8004252: 68fb ldr r3, [r7, #12]
8004254: 4013 ands r3, r2
8004256: 2b00 cmp r3, #0
8004258: d028 beq.n 80042ac <HAL_DMA_IRQHandler+0x1e8>
800425a: 68bb ldr r3, [r7, #8]
800425c: f003 0308 and.w r3, r3, #8
8004260: 2b00 cmp r3, #0
8004262: d023 beq.n 80042ac <HAL_DMA_IRQHandler+0x1e8>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8004264: 687b ldr r3, [r7, #4]
8004266: 681b ldr r3, [r3, #0]
8004268: 681a ldr r2, [r3, #0]
800426a: 687b ldr r3, [r7, #4]
800426c: 681b ldr r3, [r3, #0]
800426e: f022 020e bic.w r2, r2, #14
8004272: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8004274: 687b ldr r3, [r7, #4]
8004276: 6c1a ldr r2, [r3, #64] @ 0x40
8004278: 687b ldr r3, [r7, #4]
800427a: 6bdb ldr r3, [r3, #60] @ 0x3c
800427c: 2101 movs r1, #1
800427e: fa01 f202 lsl.w r2, r1, r2
8004282: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
8004284: 687b ldr r3, [r7, #4]
8004286: 2201 movs r2, #1
8004288: 639a str r2, [r3, #56] @ 0x38
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
800428a: 687b ldr r3, [r7, #4]
800428c: 2201 movs r2, #1
800428e: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8004292: 687b ldr r3, [r7, #4]
8004294: 2200 movs r2, #0
8004296: f883 2020 strb.w r2, [r3, #32]
if (hdma->XferErrorCallback != NULL)
800429a: 687b ldr r3, [r7, #4]
800429c: 6b1b ldr r3, [r3, #48] @ 0x30
800429e: 2b00 cmp r3, #0
80042a0: d004 beq.n 80042ac <HAL_DMA_IRQHandler+0x1e8>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
80042a2: 687b ldr r3, [r7, #4]
80042a4: 6b1b ldr r3, [r3, #48] @ 0x30
80042a6: 6878 ldr r0, [r7, #4]
80042a8: 4798 blx r3
}
}
return;
80042aa: bf00 nop
80042ac: bf00 nop
}
80042ae: 3710 adds r7, #16
80042b0: 46bd mov sp, r7
80042b2: bd80 pop {r7, pc}
80042b4: 40020008 .word 0x40020008
80042b8: 4002001c .word 0x4002001c
80042bc: 40020030 .word 0x40020030
80042c0: 40020044 .word 0x40020044
80042c4: 40020058 .word 0x40020058
80042c8: 4002006c .word 0x4002006c
80042cc: 40020000 .word 0x40020000
080042d0 <DMA_SetConfig>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
80042d0: b480 push {r7}
80042d2: b085 sub sp, #20
80042d4: af00 add r7, sp, #0
80042d6: 60f8 str r0, [r7, #12]
80042d8: 60b9 str r1, [r7, #8]
80042da: 607a str r2, [r7, #4]
80042dc: 603b str r3, [r7, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
80042de: 68fb ldr r3, [r7, #12]
80042e0: 6c1a ldr r2, [r3, #64] @ 0x40
80042e2: 68fb ldr r3, [r7, #12]
80042e4: 6bdb ldr r3, [r3, #60] @ 0x3c
80042e6: 2101 movs r1, #1
80042e8: fa01 f202 lsl.w r2, r1, r2
80042ec: 605a str r2, [r3, #4]
/* Configure DMA Channel data length */
hdma->Instance->CNDTR = DataLength;
80042ee: 68fb ldr r3, [r7, #12]
80042f0: 681b ldr r3, [r3, #0]
80042f2: 683a ldr r2, [r7, #0]
80042f4: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
80042f6: 68fb ldr r3, [r7, #12]
80042f8: 685b ldr r3, [r3, #4]
80042fa: 2b10 cmp r3, #16
80042fc: d108 bne.n 8004310 <DMA_SetConfig+0x40>
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;
80042fe: 68fb ldr r3, [r7, #12]
8004300: 681b ldr r3, [r3, #0]
8004302: 687a ldr r2, [r7, #4]
8004304: 609a str r2, [r3, #8]
/* Configure DMA Channel source address */
hdma->Instance->CMAR = SrcAddress;
8004306: 68fb ldr r3, [r7, #12]
8004308: 681b ldr r3, [r3, #0]
800430a: 68ba ldr r2, [r7, #8]
800430c: 60da str r2, [r3, #12]
hdma->Instance->CPAR = SrcAddress;
/* Configure DMA Channel destination address */
hdma->Instance->CMAR = DstAddress;
}
}
800430e: e007 b.n 8004320 <DMA_SetConfig+0x50>
hdma->Instance->CPAR = SrcAddress;
8004310: 68fb ldr r3, [r7, #12]
8004312: 681b ldr r3, [r3, #0]
8004314: 68ba ldr r2, [r7, #8]
8004316: 609a str r2, [r3, #8]
hdma->Instance->CMAR = DstAddress;
8004318: 68fb ldr r3, [r7, #12]
800431a: 681b ldr r3, [r3, #0]
800431c: 687a ldr r2, [r7, #4]
800431e: 60da str r2, [r3, #12]
}
8004320: bf00 nop
8004322: 3714 adds r7, #20
8004324: 46bd mov sp, r7
8004326: bc80 pop {r7}
8004328: 4770 bx lr
...
0800432c <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
800432c: b5f0 push {r4, r5, r6, r7, lr}
800432e: b087 sub sp, #28
8004330: af00 add r7, sp, #0
8004332: 60f8 str r0, [r7, #12]
8004334: 60b9 str r1, [r7, #8]
8004336: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
800433a: 2301 movs r3, #1
800433c: 75fb strb r3, [r7, #23]
uint8_t index = 0;
800433e: 2300 movs r3, #0
8004340: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
8004342: 2300 movs r3, #0
8004344: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
8004346: 4b2f ldr r3, [pc, #188] @ (8004404 <HAL_FLASH_Program+0xd8>)
8004348: 7e1b ldrb r3, [r3, #24]
800434a: 2b01 cmp r3, #1
800434c: d101 bne.n 8004352 <HAL_FLASH_Program+0x26>
800434e: 2302 movs r3, #2
8004350: e054 b.n 80043fc <HAL_FLASH_Program+0xd0>
8004352: 4b2c ldr r3, [pc, #176] @ (8004404 <HAL_FLASH_Program+0xd8>)
8004354: 2201 movs r2, #1
8004356: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8004358: f24c 3050 movw r0, #50000 @ 0xc350
800435c: f000 f8a8 bl 80044b0 <FLASH_WaitForLastOperation>
8004360: 4603 mov r3, r0
8004362: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
8004364: 7dfb ldrb r3, [r7, #23]
8004366: 2b00 cmp r3, #0
8004368: d144 bne.n 80043f4 <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
800436a: 68fb ldr r3, [r7, #12]
800436c: 2b01 cmp r3, #1
800436e: d102 bne.n 8004376 <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8004370: 2301 movs r3, #1
8004372: 757b strb r3, [r7, #21]
8004374: e007 b.n 8004386 <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
8004376: 68fb ldr r3, [r7, #12]
8004378: 2b02 cmp r3, #2
800437a: d102 bne.n 8004382 <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
800437c: 2302 movs r3, #2
800437e: 757b strb r3, [r7, #21]
8004380: e001 b.n 8004386 <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
8004382: 2304 movs r3, #4
8004384: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
8004386: 2300 movs r3, #0
8004388: 75bb strb r3, [r7, #22]
800438a: e02d b.n 80043e8 <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
800438c: 7dbb ldrb r3, [r7, #22]
800438e: 005a lsls r2, r3, #1
8004390: 68bb ldr r3, [r7, #8]
8004392: eb02 0c03 add.w ip, r2, r3
8004396: 7dbb ldrb r3, [r7, #22]
8004398: 0119 lsls r1, r3, #4
800439a: e9d7 2300 ldrd r2, r3, [r7]
800439e: f1c1 0620 rsb r6, r1, #32
80043a2: f1a1 0020 sub.w r0, r1, #32
80043a6: fa22 f401 lsr.w r4, r2, r1
80043aa: fa03 f606 lsl.w r6, r3, r6
80043ae: 4334 orrs r4, r6
80043b0: fa23 f000 lsr.w r0, r3, r0
80043b4: 4304 orrs r4, r0
80043b6: fa23 f501 lsr.w r5, r3, r1
80043ba: b2a3 uxth r3, r4
80043bc: 4619 mov r1, r3
80043be: 4660 mov r0, ip
80043c0: f000 f85a bl 8004478 <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
80043c4: f24c 3050 movw r0, #50000 @ 0xc350
80043c8: f000 f872 bl 80044b0 <FLASH_WaitForLastOperation>
80043cc: 4603 mov r3, r0
80043ce: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
80043d0: 4b0d ldr r3, [pc, #52] @ (8004408 <HAL_FLASH_Program+0xdc>)
80043d2: 691b ldr r3, [r3, #16]
80043d4: 4a0c ldr r2, [pc, #48] @ (8004408 <HAL_FLASH_Program+0xdc>)
80043d6: f023 0301 bic.w r3, r3, #1
80043da: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
80043dc: 7dfb ldrb r3, [r7, #23]
80043de: 2b00 cmp r3, #0
80043e0: d107 bne.n 80043f2 <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
80043e2: 7dbb ldrb r3, [r7, #22]
80043e4: 3301 adds r3, #1
80043e6: 75bb strb r3, [r7, #22]
80043e8: 7dba ldrb r2, [r7, #22]
80043ea: 7d7b ldrb r3, [r7, #21]
80043ec: 429a cmp r2, r3
80043ee: d3cd bcc.n 800438c <HAL_FLASH_Program+0x60>
80043f0: e000 b.n 80043f4 <HAL_FLASH_Program+0xc8>
{
break;
80043f2: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
80043f4: 4b03 ldr r3, [pc, #12] @ (8004404 <HAL_FLASH_Program+0xd8>)
80043f6: 2200 movs r2, #0
80043f8: 761a strb r2, [r3, #24]
return status;
80043fa: 7dfb ldrb r3, [r7, #23]
}
80043fc: 4618 mov r0, r3
80043fe: 371c adds r7, #28
8004400: 46bd mov sp, r7
8004402: bdf0 pop {r4, r5, r6, r7, pc}
8004404: 20000438 .word 0x20000438
8004408: 40022000 .word 0x40022000
0800440c <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
800440c: b480 push {r7}
800440e: b083 sub sp, #12
8004410: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
8004412: 2300 movs r3, #0
8004414: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8004416: 4b0d ldr r3, [pc, #52] @ (800444c <HAL_FLASH_Unlock+0x40>)
8004418: 691b ldr r3, [r3, #16]
800441a: f003 0380 and.w r3, r3, #128 @ 0x80
800441e: 2b00 cmp r3, #0
8004420: d00d beq.n 800443e <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
8004422: 4b0a ldr r3, [pc, #40] @ (800444c <HAL_FLASH_Unlock+0x40>)
8004424: 4a0a ldr r2, [pc, #40] @ (8004450 <HAL_FLASH_Unlock+0x44>)
8004426: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
8004428: 4b08 ldr r3, [pc, #32] @ (800444c <HAL_FLASH_Unlock+0x40>)
800442a: 4a0a ldr r2, [pc, #40] @ (8004454 <HAL_FLASH_Unlock+0x48>)
800442c: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
800442e: 4b07 ldr r3, [pc, #28] @ (800444c <HAL_FLASH_Unlock+0x40>)
8004430: 691b ldr r3, [r3, #16]
8004432: f003 0380 and.w r3, r3, #128 @ 0x80
8004436: 2b00 cmp r3, #0
8004438: d001 beq.n 800443e <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
800443a: 2301 movs r3, #1
800443c: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
800443e: 79fb ldrb r3, [r7, #7]
}
8004440: 4618 mov r0, r3
8004442: 370c adds r7, #12
8004444: 46bd mov sp, r7
8004446: bc80 pop {r7}
8004448: 4770 bx lr
800444a: bf00 nop
800444c: 40022000 .word 0x40022000
8004450: 45670123 .word 0x45670123
8004454: cdef89ab .word 0xcdef89ab
08004458 <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
8004458: b480 push {r7}
800445a: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
800445c: 4b05 ldr r3, [pc, #20] @ (8004474 <HAL_FLASH_Lock+0x1c>)
800445e: 691b ldr r3, [r3, #16]
8004460: 4a04 ldr r2, [pc, #16] @ (8004474 <HAL_FLASH_Lock+0x1c>)
8004462: f043 0380 orr.w r3, r3, #128 @ 0x80
8004466: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
8004468: 2300 movs r3, #0
}
800446a: 4618 mov r0, r3
800446c: 46bd mov sp, r7
800446e: bc80 pop {r7}
8004470: 4770 bx lr
8004472: bf00 nop
8004474: 40022000 .word 0x40022000
08004478 <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
8004478: b480 push {r7}
800447a: b083 sub sp, #12
800447c: af00 add r7, sp, #0
800447e: 6078 str r0, [r7, #4]
8004480: 460b mov r3, r1
8004482: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8004484: 4b08 ldr r3, [pc, #32] @ (80044a8 <FLASH_Program_HalfWord+0x30>)
8004486: 2200 movs r2, #0
8004488: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
800448a: 4b08 ldr r3, [pc, #32] @ (80044ac <FLASH_Program_HalfWord+0x34>)
800448c: 691b ldr r3, [r3, #16]
800448e: 4a07 ldr r2, [pc, #28] @ (80044ac <FLASH_Program_HalfWord+0x34>)
8004490: f043 0301 orr.w r3, r3, #1
8004494: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
8004496: 687b ldr r3, [r7, #4]
8004498: 887a ldrh r2, [r7, #2]
800449a: 801a strh r2, [r3, #0]
}
800449c: bf00 nop
800449e: 370c adds r7, #12
80044a0: 46bd mov sp, r7
80044a2: bc80 pop {r7}
80044a4: 4770 bx lr
80044a6: bf00 nop
80044a8: 20000438 .word 0x20000438
80044ac: 40022000 .word 0x40022000
080044b0 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
80044b0: b580 push {r7, lr}
80044b2: b084 sub sp, #16
80044b4: af00 add r7, sp, #0
80044b6: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
80044b8: f7ff f860 bl 800357c <HAL_GetTick>
80044bc: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80044be: e010 b.n 80044e2 <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
80044c0: 687b ldr r3, [r7, #4]
80044c2: f1b3 3fff cmp.w r3, #4294967295
80044c6: d00c beq.n 80044e2 <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
80044c8: 687b ldr r3, [r7, #4]
80044ca: 2b00 cmp r3, #0
80044cc: d007 beq.n 80044de <FLASH_WaitForLastOperation+0x2e>
80044ce: f7ff f855 bl 800357c <HAL_GetTick>
80044d2: 4602 mov r2, r0
80044d4: 68fb ldr r3, [r7, #12]
80044d6: 1ad3 subs r3, r2, r3
80044d8: 687a ldr r2, [r7, #4]
80044da: 429a cmp r2, r3
80044dc: d201 bcs.n 80044e2 <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
80044de: 2303 movs r3, #3
80044e0: e025 b.n 800452e <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80044e2: 4b15 ldr r3, [pc, #84] @ (8004538 <FLASH_WaitForLastOperation+0x88>)
80044e4: 68db ldr r3, [r3, #12]
80044e6: f003 0301 and.w r3, r3, #1
80044ea: 2b00 cmp r3, #0
80044ec: d1e8 bne.n 80044c0 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
80044ee: 4b12 ldr r3, [pc, #72] @ (8004538 <FLASH_WaitForLastOperation+0x88>)
80044f0: 68db ldr r3, [r3, #12]
80044f2: f003 0320 and.w r3, r3, #32
80044f6: 2b00 cmp r3, #0
80044f8: d002 beq.n 8004500 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
80044fa: 4b0f ldr r3, [pc, #60] @ (8004538 <FLASH_WaitForLastOperation+0x88>)
80044fc: 2220 movs r2, #32
80044fe: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8004500: 4b0d ldr r3, [pc, #52] @ (8004538 <FLASH_WaitForLastOperation+0x88>)
8004502: 68db ldr r3, [r3, #12]
8004504: f003 0310 and.w r3, r3, #16
8004508: 2b00 cmp r3, #0
800450a: d10b bne.n 8004524 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
800450c: 4b0a ldr r3, [pc, #40] @ (8004538 <FLASH_WaitForLastOperation+0x88>)
800450e: 69db ldr r3, [r3, #28]
8004510: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8004514: 2b00 cmp r3, #0
8004516: d105 bne.n 8004524 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8004518: 4b07 ldr r3, [pc, #28] @ (8004538 <FLASH_WaitForLastOperation+0x88>)
800451a: 68db ldr r3, [r3, #12]
800451c: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8004520: 2b00 cmp r3, #0
8004522: d003 beq.n 800452c <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
8004524: f000 f80a bl 800453c <FLASH_SetErrorCode>
return HAL_ERROR;
8004528: 2301 movs r3, #1
800452a: e000 b.n 800452e <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
800452c: 2300 movs r3, #0
}
800452e: 4618 mov r0, r3
8004530: 3710 adds r7, #16
8004532: 46bd mov sp, r7
8004534: bd80 pop {r7, pc}
8004536: bf00 nop
8004538: 40022000 .word 0x40022000
0800453c <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
800453c: b480 push {r7}
800453e: b083 sub sp, #12
8004540: af00 add r7, sp, #0
uint32_t flags = 0U;
8004542: 2300 movs r3, #0
8004544: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
8004546: 4b23 ldr r3, [pc, #140] @ (80045d4 <FLASH_SetErrorCode+0x98>)
8004548: 68db ldr r3, [r3, #12]
800454a: f003 0310 and.w r3, r3, #16
800454e: 2b00 cmp r3, #0
8004550: d009 beq.n 8004566 <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
8004552: 4b21 ldr r3, [pc, #132] @ (80045d8 <FLASH_SetErrorCode+0x9c>)
8004554: 69db ldr r3, [r3, #28]
8004556: f043 0302 orr.w r3, r3, #2
800455a: 4a1f ldr r2, [pc, #124] @ (80045d8 <FLASH_SetErrorCode+0x9c>)
800455c: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
800455e: 687b ldr r3, [r7, #4]
8004560: f043 0310 orr.w r3, r3, #16
8004564: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8004566: 4b1b ldr r3, [pc, #108] @ (80045d4 <FLASH_SetErrorCode+0x98>)
8004568: 68db ldr r3, [r3, #12]
800456a: f003 0304 and.w r3, r3, #4
800456e: 2b00 cmp r3, #0
8004570: d009 beq.n 8004586 <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
8004572: 4b19 ldr r3, [pc, #100] @ (80045d8 <FLASH_SetErrorCode+0x9c>)
8004574: 69db ldr r3, [r3, #28]
8004576: f043 0301 orr.w r3, r3, #1
800457a: 4a17 ldr r2, [pc, #92] @ (80045d8 <FLASH_SetErrorCode+0x9c>)
800457c: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
800457e: 687b ldr r3, [r7, #4]
8004580: f043 0304 orr.w r3, r3, #4
8004584: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
8004586: 4b13 ldr r3, [pc, #76] @ (80045d4 <FLASH_SetErrorCode+0x98>)
8004588: 69db ldr r3, [r3, #28]
800458a: f003 0301 and.w r3, r3, #1
800458e: 2b00 cmp r3, #0
8004590: d00b beq.n 80045aa <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
8004592: 4b11 ldr r3, [pc, #68] @ (80045d8 <FLASH_SetErrorCode+0x9c>)
8004594: 69db ldr r3, [r3, #28]
8004596: f043 0304 orr.w r3, r3, #4
800459a: 4a0f ldr r2, [pc, #60] @ (80045d8 <FLASH_SetErrorCode+0x9c>)
800459c: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
800459e: 4b0d ldr r3, [pc, #52] @ (80045d4 <FLASH_SetErrorCode+0x98>)
80045a0: 69db ldr r3, [r3, #28]
80045a2: 4a0c ldr r2, [pc, #48] @ (80045d4 <FLASH_SetErrorCode+0x98>)
80045a4: f023 0301 bic.w r3, r3, #1
80045a8: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
80045aa: 687b ldr r3, [r7, #4]
80045ac: f240 1201 movw r2, #257 @ 0x101
80045b0: 4293 cmp r3, r2
80045b2: d106 bne.n 80045c2 <FLASH_SetErrorCode+0x86>
80045b4: 4b07 ldr r3, [pc, #28] @ (80045d4 <FLASH_SetErrorCode+0x98>)
80045b6: 69db ldr r3, [r3, #28]
80045b8: 4a06 ldr r2, [pc, #24] @ (80045d4 <FLASH_SetErrorCode+0x98>)
80045ba: f023 0301 bic.w r3, r3, #1
80045be: 61d3 str r3, [r2, #28]
}
80045c0: e002 b.n 80045c8 <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
80045c2: 4a04 ldr r2, [pc, #16] @ (80045d4 <FLASH_SetErrorCode+0x98>)
80045c4: 687b ldr r3, [r7, #4]
80045c6: 60d3 str r3, [r2, #12]
}
80045c8: bf00 nop
80045ca: 370c adds r7, #12
80045cc: 46bd mov sp, r7
80045ce: bc80 pop {r7}
80045d0: 4770 bx lr
80045d2: bf00 nop
80045d4: 40022000 .word 0x40022000
80045d8: 20000438 .word 0x20000438
080045dc <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
80045dc: b580 push {r7, lr}
80045de: b084 sub sp, #16
80045e0: af00 add r7, sp, #0
80045e2: 6078 str r0, [r7, #4]
80045e4: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
80045e6: 2301 movs r3, #1
80045e8: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
80045ea: 2300 movs r3, #0
80045ec: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
80045ee: 4b2f ldr r3, [pc, #188] @ (80046ac <HAL_FLASHEx_Erase+0xd0>)
80045f0: 7e1b ldrb r3, [r3, #24]
80045f2: 2b01 cmp r3, #1
80045f4: d101 bne.n 80045fa <HAL_FLASHEx_Erase+0x1e>
80045f6: 2302 movs r3, #2
80045f8: e053 b.n 80046a2 <HAL_FLASHEx_Erase+0xc6>
80045fa: 4b2c ldr r3, [pc, #176] @ (80046ac <HAL_FLASHEx_Erase+0xd0>)
80045fc: 2201 movs r2, #1
80045fe: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
8004600: 687b ldr r3, [r7, #4]
8004602: 681b ldr r3, [r3, #0]
8004604: 2b02 cmp r3, #2
8004606: d116 bne.n 8004636 <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8004608: f24c 3050 movw r0, #50000 @ 0xc350
800460c: f7ff ff50 bl 80044b0 <FLASH_WaitForLastOperation>
8004610: 4603 mov r3, r0
8004612: 2b00 cmp r3, #0
8004614: d141 bne.n 800469a <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
8004616: 2001 movs r0, #1
8004618: f000 f84c bl 80046b4 <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
800461c: f24c 3050 movw r0, #50000 @ 0xc350
8004620: f7ff ff46 bl 80044b0 <FLASH_WaitForLastOperation>
8004624: 4603 mov r3, r0
8004626: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
8004628: 4b21 ldr r3, [pc, #132] @ (80046b0 <HAL_FLASHEx_Erase+0xd4>)
800462a: 691b ldr r3, [r3, #16]
800462c: 4a20 ldr r2, [pc, #128] @ (80046b0 <HAL_FLASHEx_Erase+0xd4>)
800462e: f023 0304 bic.w r3, r3, #4
8004632: 6113 str r3, [r2, #16]
8004634: e031 b.n 800469a <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8004636: f24c 3050 movw r0, #50000 @ 0xc350
800463a: f7ff ff39 bl 80044b0 <FLASH_WaitForLastOperation>
800463e: 4603 mov r3, r0
8004640: 2b00 cmp r3, #0
8004642: d12a bne.n 800469a <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
8004644: 683b ldr r3, [r7, #0]
8004646: f04f 32ff mov.w r2, #4294967295
800464a: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
800464c: 687b ldr r3, [r7, #4]
800464e: 689b ldr r3, [r3, #8]
8004650: 60bb str r3, [r7, #8]
8004652: e019 b.n 8004688 <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
8004654: 68b8 ldr r0, [r7, #8]
8004656: f000 f849 bl 80046ec <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
800465a: f24c 3050 movw r0, #50000 @ 0xc350
800465e: f7ff ff27 bl 80044b0 <FLASH_WaitForLastOperation>
8004662: 4603 mov r3, r0
8004664: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
8004666: 4b12 ldr r3, [pc, #72] @ (80046b0 <HAL_FLASHEx_Erase+0xd4>)
8004668: 691b ldr r3, [r3, #16]
800466a: 4a11 ldr r2, [pc, #68] @ (80046b0 <HAL_FLASHEx_Erase+0xd4>)
800466c: f023 0302 bic.w r3, r3, #2
8004670: 6113 str r3, [r2, #16]
if (status != HAL_OK)
8004672: 7bfb ldrb r3, [r7, #15]
8004674: 2b00 cmp r3, #0
8004676: d003 beq.n 8004680 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
8004678: 683b ldr r3, [r7, #0]
800467a: 68ba ldr r2, [r7, #8]
800467c: 601a str r2, [r3, #0]
break;
800467e: e00c b.n 800469a <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
8004680: 68bb ldr r3, [r7, #8]
8004682: f503 6380 add.w r3, r3, #1024 @ 0x400
8004686: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
8004688: 687b ldr r3, [r7, #4]
800468a: 68db ldr r3, [r3, #12]
800468c: 029a lsls r2, r3, #10
800468e: 687b ldr r3, [r7, #4]
8004690: 689b ldr r3, [r3, #8]
8004692: 4413 add r3, r2
8004694: 68ba ldr r2, [r7, #8]
8004696: 429a cmp r2, r3
8004698: d3dc bcc.n 8004654 <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
800469a: 4b04 ldr r3, [pc, #16] @ (80046ac <HAL_FLASHEx_Erase+0xd0>)
800469c: 2200 movs r2, #0
800469e: 761a strb r2, [r3, #24]
return status;
80046a0: 7bfb ldrb r3, [r7, #15]
}
80046a2: 4618 mov r0, r3
80046a4: 3710 adds r7, #16
80046a6: 46bd mov sp, r7
80046a8: bd80 pop {r7, pc}
80046aa: bf00 nop
80046ac: 20000438 .word 0x20000438
80046b0: 40022000 .word 0x40022000
080046b4 <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
80046b4: b480 push {r7}
80046b6: b083 sub sp, #12
80046b8: af00 add r7, sp, #0
80046ba: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80046bc: 4b09 ldr r3, [pc, #36] @ (80046e4 <FLASH_MassErase+0x30>)
80046be: 2200 movs r2, #0
80046c0: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
80046c2: 4b09 ldr r3, [pc, #36] @ (80046e8 <FLASH_MassErase+0x34>)
80046c4: 691b ldr r3, [r3, #16]
80046c6: 4a08 ldr r2, [pc, #32] @ (80046e8 <FLASH_MassErase+0x34>)
80046c8: f043 0304 orr.w r3, r3, #4
80046cc: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
80046ce: 4b06 ldr r3, [pc, #24] @ (80046e8 <FLASH_MassErase+0x34>)
80046d0: 691b ldr r3, [r3, #16]
80046d2: 4a05 ldr r2, [pc, #20] @ (80046e8 <FLASH_MassErase+0x34>)
80046d4: f043 0340 orr.w r3, r3, #64 @ 0x40
80046d8: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
80046da: bf00 nop
80046dc: 370c adds r7, #12
80046de: 46bd mov sp, r7
80046e0: bc80 pop {r7}
80046e2: 4770 bx lr
80046e4: 20000438 .word 0x20000438
80046e8: 40022000 .word 0x40022000
080046ec <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
80046ec: b480 push {r7}
80046ee: b083 sub sp, #12
80046f0: af00 add r7, sp, #0
80046f2: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80046f4: 4b0b ldr r3, [pc, #44] @ (8004724 <FLASH_PageErase+0x38>)
80046f6: 2200 movs r2, #0
80046f8: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
80046fa: 4b0b ldr r3, [pc, #44] @ (8004728 <FLASH_PageErase+0x3c>)
80046fc: 691b ldr r3, [r3, #16]
80046fe: 4a0a ldr r2, [pc, #40] @ (8004728 <FLASH_PageErase+0x3c>)
8004700: f043 0302 orr.w r3, r3, #2
8004704: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
8004706: 4a08 ldr r2, [pc, #32] @ (8004728 <FLASH_PageErase+0x3c>)
8004708: 687b ldr r3, [r7, #4]
800470a: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
800470c: 4b06 ldr r3, [pc, #24] @ (8004728 <FLASH_PageErase+0x3c>)
800470e: 691b ldr r3, [r3, #16]
8004710: 4a05 ldr r2, [pc, #20] @ (8004728 <FLASH_PageErase+0x3c>)
8004712: f043 0340 orr.w r3, r3, #64 @ 0x40
8004716: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
8004718: bf00 nop
800471a: 370c adds r7, #12
800471c: 46bd mov sp, r7
800471e: bc80 pop {r7}
8004720: 4770 bx lr
8004722: bf00 nop
8004724: 20000438 .word 0x20000438
8004728: 40022000 .word 0x40022000
0800472c <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
800472c: b480 push {r7}
800472e: b08b sub sp, #44 @ 0x2c
8004730: af00 add r7, sp, #0
8004732: 6078 str r0, [r7, #4]
8004734: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8004736: 2300 movs r3, #0
8004738: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
800473a: 2300 movs r3, #0
800473c: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
800473e: e169 b.n 8004a14 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8004740: 2201 movs r2, #1
8004742: 6a7b ldr r3, [r7, #36] @ 0x24
8004744: fa02 f303 lsl.w r3, r2, r3
8004748: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
800474a: 683b ldr r3, [r7, #0]
800474c: 681b ldr r3, [r3, #0]
800474e: 69fa ldr r2, [r7, #28]
8004750: 4013 ands r3, r2
8004752: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8004754: 69ba ldr r2, [r7, #24]
8004756: 69fb ldr r3, [r7, #28]
8004758: 429a cmp r2, r3
800475a: f040 8158 bne.w 8004a0e <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
800475e: 683b ldr r3, [r7, #0]
8004760: 685b ldr r3, [r3, #4]
8004762: 4a9a ldr r2, [pc, #616] @ (80049cc <HAL_GPIO_Init+0x2a0>)
8004764: 4293 cmp r3, r2
8004766: d05e beq.n 8004826 <HAL_GPIO_Init+0xfa>
8004768: 4a98 ldr r2, [pc, #608] @ (80049cc <HAL_GPIO_Init+0x2a0>)
800476a: 4293 cmp r3, r2
800476c: d875 bhi.n 800485a <HAL_GPIO_Init+0x12e>
800476e: 4a98 ldr r2, [pc, #608] @ (80049d0 <HAL_GPIO_Init+0x2a4>)
8004770: 4293 cmp r3, r2
8004772: d058 beq.n 8004826 <HAL_GPIO_Init+0xfa>
8004774: 4a96 ldr r2, [pc, #600] @ (80049d0 <HAL_GPIO_Init+0x2a4>)
8004776: 4293 cmp r3, r2
8004778: d86f bhi.n 800485a <HAL_GPIO_Init+0x12e>
800477a: 4a96 ldr r2, [pc, #600] @ (80049d4 <HAL_GPIO_Init+0x2a8>)
800477c: 4293 cmp r3, r2
800477e: d052 beq.n 8004826 <HAL_GPIO_Init+0xfa>
8004780: 4a94 ldr r2, [pc, #592] @ (80049d4 <HAL_GPIO_Init+0x2a8>)
8004782: 4293 cmp r3, r2
8004784: d869 bhi.n 800485a <HAL_GPIO_Init+0x12e>
8004786: 4a94 ldr r2, [pc, #592] @ (80049d8 <HAL_GPIO_Init+0x2ac>)
8004788: 4293 cmp r3, r2
800478a: d04c beq.n 8004826 <HAL_GPIO_Init+0xfa>
800478c: 4a92 ldr r2, [pc, #584] @ (80049d8 <HAL_GPIO_Init+0x2ac>)
800478e: 4293 cmp r3, r2
8004790: d863 bhi.n 800485a <HAL_GPIO_Init+0x12e>
8004792: 4a92 ldr r2, [pc, #584] @ (80049dc <HAL_GPIO_Init+0x2b0>)
8004794: 4293 cmp r3, r2
8004796: d046 beq.n 8004826 <HAL_GPIO_Init+0xfa>
8004798: 4a90 ldr r2, [pc, #576] @ (80049dc <HAL_GPIO_Init+0x2b0>)
800479a: 4293 cmp r3, r2
800479c: d85d bhi.n 800485a <HAL_GPIO_Init+0x12e>
800479e: 2b12 cmp r3, #18
80047a0: d82a bhi.n 80047f8 <HAL_GPIO_Init+0xcc>
80047a2: 2b12 cmp r3, #18
80047a4: d859 bhi.n 800485a <HAL_GPIO_Init+0x12e>
80047a6: a201 add r2, pc, #4 @ (adr r2, 80047ac <HAL_GPIO_Init+0x80>)
80047a8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80047ac: 08004827 .word 0x08004827
80047b0: 08004801 .word 0x08004801
80047b4: 08004813 .word 0x08004813
80047b8: 08004855 .word 0x08004855
80047bc: 0800485b .word 0x0800485b
80047c0: 0800485b .word 0x0800485b
80047c4: 0800485b .word 0x0800485b
80047c8: 0800485b .word 0x0800485b
80047cc: 0800485b .word 0x0800485b
80047d0: 0800485b .word 0x0800485b
80047d4: 0800485b .word 0x0800485b
80047d8: 0800485b .word 0x0800485b
80047dc: 0800485b .word 0x0800485b
80047e0: 0800485b .word 0x0800485b
80047e4: 0800485b .word 0x0800485b
80047e8: 0800485b .word 0x0800485b
80047ec: 0800485b .word 0x0800485b
80047f0: 08004809 .word 0x08004809
80047f4: 0800481d .word 0x0800481d
80047f8: 4a79 ldr r2, [pc, #484] @ (80049e0 <HAL_GPIO_Init+0x2b4>)
80047fa: 4293 cmp r3, r2
80047fc: d013 beq.n 8004826 <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
80047fe: e02c b.n 800485a <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8004800: 683b ldr r3, [r7, #0]
8004802: 68db ldr r3, [r3, #12]
8004804: 623b str r3, [r7, #32]
break;
8004806: e029 b.n 800485c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
8004808: 683b ldr r3, [r7, #0]
800480a: 68db ldr r3, [r3, #12]
800480c: 3304 adds r3, #4
800480e: 623b str r3, [r7, #32]
break;
8004810: e024 b.n 800485c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8004812: 683b ldr r3, [r7, #0]
8004814: 68db ldr r3, [r3, #12]
8004816: 3308 adds r3, #8
8004818: 623b str r3, [r7, #32]
break;
800481a: e01f b.n 800485c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
800481c: 683b ldr r3, [r7, #0]
800481e: 68db ldr r3, [r3, #12]
8004820: 330c adds r3, #12
8004822: 623b str r3, [r7, #32]
break;
8004824: e01a b.n 800485c <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
8004826: 683b ldr r3, [r7, #0]
8004828: 689b ldr r3, [r3, #8]
800482a: 2b00 cmp r3, #0
800482c: d102 bne.n 8004834 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
800482e: 2304 movs r3, #4
8004830: 623b str r3, [r7, #32]
break;
8004832: e013 b.n 800485c <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8004834: 683b ldr r3, [r7, #0]
8004836: 689b ldr r3, [r3, #8]
8004838: 2b01 cmp r3, #1
800483a: d105 bne.n 8004848 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
800483c: 2308 movs r3, #8
800483e: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8004840: 687b ldr r3, [r7, #4]
8004842: 69fa ldr r2, [r7, #28]
8004844: 611a str r2, [r3, #16]
break;
8004846: e009 b.n 800485c <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8004848: 2308 movs r3, #8
800484a: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
800484c: 687b ldr r3, [r7, #4]
800484e: 69fa ldr r2, [r7, #28]
8004850: 615a str r2, [r3, #20]
break;
8004852: e003 b.n 800485c <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8004854: 2300 movs r3, #0
8004856: 623b str r3, [r7, #32]
break;
8004858: e000 b.n 800485c <HAL_GPIO_Init+0x130>
break;
800485a: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
800485c: 69bb ldr r3, [r7, #24]
800485e: 2bff cmp r3, #255 @ 0xff
8004860: d801 bhi.n 8004866 <HAL_GPIO_Init+0x13a>
8004862: 687b ldr r3, [r7, #4]
8004864: e001 b.n 800486a <HAL_GPIO_Init+0x13e>
8004866: 687b ldr r3, [r7, #4]
8004868: 3304 adds r3, #4
800486a: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
800486c: 69bb ldr r3, [r7, #24]
800486e: 2bff cmp r3, #255 @ 0xff
8004870: d802 bhi.n 8004878 <HAL_GPIO_Init+0x14c>
8004872: 6a7b ldr r3, [r7, #36] @ 0x24
8004874: 009b lsls r3, r3, #2
8004876: e002 b.n 800487e <HAL_GPIO_Init+0x152>
8004878: 6a7b ldr r3, [r7, #36] @ 0x24
800487a: 3b08 subs r3, #8
800487c: 009b lsls r3, r3, #2
800487e: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8004880: 697b ldr r3, [r7, #20]
8004882: 681a ldr r2, [r3, #0]
8004884: 210f movs r1, #15
8004886: 693b ldr r3, [r7, #16]
8004888: fa01 f303 lsl.w r3, r1, r3
800488c: 43db mvns r3, r3
800488e: 401a ands r2, r3
8004890: 6a39 ldr r1, [r7, #32]
8004892: 693b ldr r3, [r7, #16]
8004894: fa01 f303 lsl.w r3, r1, r3
8004898: 431a orrs r2, r3
800489a: 697b ldr r3, [r7, #20]
800489c: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
800489e: 683b ldr r3, [r7, #0]
80048a0: 685b ldr r3, [r3, #4]
80048a2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80048a6: 2b00 cmp r3, #0
80048a8: f000 80b1 beq.w 8004a0e <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
80048ac: 4b4d ldr r3, [pc, #308] @ (80049e4 <HAL_GPIO_Init+0x2b8>)
80048ae: 699b ldr r3, [r3, #24]
80048b0: 4a4c ldr r2, [pc, #304] @ (80049e4 <HAL_GPIO_Init+0x2b8>)
80048b2: f043 0301 orr.w r3, r3, #1
80048b6: 6193 str r3, [r2, #24]
80048b8: 4b4a ldr r3, [pc, #296] @ (80049e4 <HAL_GPIO_Init+0x2b8>)
80048ba: 699b ldr r3, [r3, #24]
80048bc: f003 0301 and.w r3, r3, #1
80048c0: 60bb str r3, [r7, #8]
80048c2: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
80048c4: 4a48 ldr r2, [pc, #288] @ (80049e8 <HAL_GPIO_Init+0x2bc>)
80048c6: 6a7b ldr r3, [r7, #36] @ 0x24
80048c8: 089b lsrs r3, r3, #2
80048ca: 3302 adds r3, #2
80048cc: f852 3023 ldr.w r3, [r2, r3, lsl #2]
80048d0: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
80048d2: 6a7b ldr r3, [r7, #36] @ 0x24
80048d4: f003 0303 and.w r3, r3, #3
80048d8: 009b lsls r3, r3, #2
80048da: 220f movs r2, #15
80048dc: fa02 f303 lsl.w r3, r2, r3
80048e0: 43db mvns r3, r3
80048e2: 68fa ldr r2, [r7, #12]
80048e4: 4013 ands r3, r2
80048e6: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
80048e8: 687b ldr r3, [r7, #4]
80048ea: 4a40 ldr r2, [pc, #256] @ (80049ec <HAL_GPIO_Init+0x2c0>)
80048ec: 4293 cmp r3, r2
80048ee: d013 beq.n 8004918 <HAL_GPIO_Init+0x1ec>
80048f0: 687b ldr r3, [r7, #4]
80048f2: 4a3f ldr r2, [pc, #252] @ (80049f0 <HAL_GPIO_Init+0x2c4>)
80048f4: 4293 cmp r3, r2
80048f6: d00d beq.n 8004914 <HAL_GPIO_Init+0x1e8>
80048f8: 687b ldr r3, [r7, #4]
80048fa: 4a3e ldr r2, [pc, #248] @ (80049f4 <HAL_GPIO_Init+0x2c8>)
80048fc: 4293 cmp r3, r2
80048fe: d007 beq.n 8004910 <HAL_GPIO_Init+0x1e4>
8004900: 687b ldr r3, [r7, #4]
8004902: 4a3d ldr r2, [pc, #244] @ (80049f8 <HAL_GPIO_Init+0x2cc>)
8004904: 4293 cmp r3, r2
8004906: d101 bne.n 800490c <HAL_GPIO_Init+0x1e0>
8004908: 2303 movs r3, #3
800490a: e006 b.n 800491a <HAL_GPIO_Init+0x1ee>
800490c: 2304 movs r3, #4
800490e: e004 b.n 800491a <HAL_GPIO_Init+0x1ee>
8004910: 2302 movs r3, #2
8004912: e002 b.n 800491a <HAL_GPIO_Init+0x1ee>
8004914: 2301 movs r3, #1
8004916: e000 b.n 800491a <HAL_GPIO_Init+0x1ee>
8004918: 2300 movs r3, #0
800491a: 6a7a ldr r2, [r7, #36] @ 0x24
800491c: f002 0203 and.w r2, r2, #3
8004920: 0092 lsls r2, r2, #2
8004922: 4093 lsls r3, r2
8004924: 68fa ldr r2, [r7, #12]
8004926: 4313 orrs r3, r2
8004928: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
800492a: 492f ldr r1, [pc, #188] @ (80049e8 <HAL_GPIO_Init+0x2bc>)
800492c: 6a7b ldr r3, [r7, #36] @ 0x24
800492e: 089b lsrs r3, r3, #2
8004930: 3302 adds r3, #2
8004932: 68fa ldr r2, [r7, #12]
8004934: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8004938: 683b ldr r3, [r7, #0]
800493a: 685b ldr r3, [r3, #4]
800493c: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8004940: 2b00 cmp r3, #0
8004942: d006 beq.n 8004952 <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
8004944: 4b2d ldr r3, [pc, #180] @ (80049fc <HAL_GPIO_Init+0x2d0>)
8004946: 689a ldr r2, [r3, #8]
8004948: 492c ldr r1, [pc, #176] @ (80049fc <HAL_GPIO_Init+0x2d0>)
800494a: 69bb ldr r3, [r7, #24]
800494c: 4313 orrs r3, r2
800494e: 608b str r3, [r1, #8]
8004950: e006 b.n 8004960 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
8004952: 4b2a ldr r3, [pc, #168] @ (80049fc <HAL_GPIO_Init+0x2d0>)
8004954: 689a ldr r2, [r3, #8]
8004956: 69bb ldr r3, [r7, #24]
8004958: 43db mvns r3, r3
800495a: 4928 ldr r1, [pc, #160] @ (80049fc <HAL_GPIO_Init+0x2d0>)
800495c: 4013 ands r3, r2
800495e: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8004960: 683b ldr r3, [r7, #0]
8004962: 685b ldr r3, [r3, #4]
8004964: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8004968: 2b00 cmp r3, #0
800496a: d006 beq.n 800497a <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
800496c: 4b23 ldr r3, [pc, #140] @ (80049fc <HAL_GPIO_Init+0x2d0>)
800496e: 68da ldr r2, [r3, #12]
8004970: 4922 ldr r1, [pc, #136] @ (80049fc <HAL_GPIO_Init+0x2d0>)
8004972: 69bb ldr r3, [r7, #24]
8004974: 4313 orrs r3, r2
8004976: 60cb str r3, [r1, #12]
8004978: e006 b.n 8004988 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
800497a: 4b20 ldr r3, [pc, #128] @ (80049fc <HAL_GPIO_Init+0x2d0>)
800497c: 68da ldr r2, [r3, #12]
800497e: 69bb ldr r3, [r7, #24]
8004980: 43db mvns r3, r3
8004982: 491e ldr r1, [pc, #120] @ (80049fc <HAL_GPIO_Init+0x2d0>)
8004984: 4013 ands r3, r2
8004986: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8004988: 683b ldr r3, [r7, #0]
800498a: 685b ldr r3, [r3, #4]
800498c: f403 3300 and.w r3, r3, #131072 @ 0x20000
8004990: 2b00 cmp r3, #0
8004992: d006 beq.n 80049a2 <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
8004994: 4b19 ldr r3, [pc, #100] @ (80049fc <HAL_GPIO_Init+0x2d0>)
8004996: 685a ldr r2, [r3, #4]
8004998: 4918 ldr r1, [pc, #96] @ (80049fc <HAL_GPIO_Init+0x2d0>)
800499a: 69bb ldr r3, [r7, #24]
800499c: 4313 orrs r3, r2
800499e: 604b str r3, [r1, #4]
80049a0: e006 b.n 80049b0 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
80049a2: 4b16 ldr r3, [pc, #88] @ (80049fc <HAL_GPIO_Init+0x2d0>)
80049a4: 685a ldr r2, [r3, #4]
80049a6: 69bb ldr r3, [r7, #24]
80049a8: 43db mvns r3, r3
80049aa: 4914 ldr r1, [pc, #80] @ (80049fc <HAL_GPIO_Init+0x2d0>)
80049ac: 4013 ands r3, r2
80049ae: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
80049b0: 683b ldr r3, [r7, #0]
80049b2: 685b ldr r3, [r3, #4]
80049b4: f403 3380 and.w r3, r3, #65536 @ 0x10000
80049b8: 2b00 cmp r3, #0
80049ba: d021 beq.n 8004a00 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
80049bc: 4b0f ldr r3, [pc, #60] @ (80049fc <HAL_GPIO_Init+0x2d0>)
80049be: 681a ldr r2, [r3, #0]
80049c0: 490e ldr r1, [pc, #56] @ (80049fc <HAL_GPIO_Init+0x2d0>)
80049c2: 69bb ldr r3, [r7, #24]
80049c4: 4313 orrs r3, r2
80049c6: 600b str r3, [r1, #0]
80049c8: e021 b.n 8004a0e <HAL_GPIO_Init+0x2e2>
80049ca: bf00 nop
80049cc: 10320000 .word 0x10320000
80049d0: 10310000 .word 0x10310000
80049d4: 10220000 .word 0x10220000
80049d8: 10210000 .word 0x10210000
80049dc: 10120000 .word 0x10120000
80049e0: 10110000 .word 0x10110000
80049e4: 40021000 .word 0x40021000
80049e8: 40010000 .word 0x40010000
80049ec: 40010800 .word 0x40010800
80049f0: 40010c00 .word 0x40010c00
80049f4: 40011000 .word 0x40011000
80049f8: 40011400 .word 0x40011400
80049fc: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8004a00: 4b0b ldr r3, [pc, #44] @ (8004a30 <HAL_GPIO_Init+0x304>)
8004a02: 681a ldr r2, [r3, #0]
8004a04: 69bb ldr r3, [r7, #24]
8004a06: 43db mvns r3, r3
8004a08: 4909 ldr r1, [pc, #36] @ (8004a30 <HAL_GPIO_Init+0x304>)
8004a0a: 4013 ands r3, r2
8004a0c: 600b str r3, [r1, #0]
}
}
}
position++;
8004a0e: 6a7b ldr r3, [r7, #36] @ 0x24
8004a10: 3301 adds r3, #1
8004a12: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8004a14: 683b ldr r3, [r7, #0]
8004a16: 681a ldr r2, [r3, #0]
8004a18: 6a7b ldr r3, [r7, #36] @ 0x24
8004a1a: fa22 f303 lsr.w r3, r2, r3
8004a1e: 2b00 cmp r3, #0
8004a20: f47f ae8e bne.w 8004740 <HAL_GPIO_Init+0x14>
}
}
8004a24: bf00 nop
8004a26: bf00 nop
8004a28: 372c adds r7, #44 @ 0x2c
8004a2a: 46bd mov sp, r7
8004a2c: bc80 pop {r7}
8004a2e: 4770 bx lr
8004a30: 40010400 .word 0x40010400
08004a34 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8004a34: b480 push {r7}
8004a36: b085 sub sp, #20
8004a38: af00 add r7, sp, #0
8004a3a: 6078 str r0, [r7, #4]
8004a3c: 460b mov r3, r1
8004a3e: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8004a40: 687b ldr r3, [r7, #4]
8004a42: 689a ldr r2, [r3, #8]
8004a44: 887b ldrh r3, [r7, #2]
8004a46: 4013 ands r3, r2
8004a48: 2b00 cmp r3, #0
8004a4a: d002 beq.n 8004a52 <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
8004a4c: 2301 movs r3, #1
8004a4e: 73fb strb r3, [r7, #15]
8004a50: e001 b.n 8004a56 <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
8004a52: 2300 movs r3, #0
8004a54: 73fb strb r3, [r7, #15]
}
return bitstatus;
8004a56: 7bfb ldrb r3, [r7, #15]
}
8004a58: 4618 mov r0, r3
8004a5a: 3714 adds r7, #20
8004a5c: 46bd mov sp, r7
8004a5e: bc80 pop {r7}
8004a60: 4770 bx lr
08004a62 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8004a62: b480 push {r7}
8004a64: b083 sub sp, #12
8004a66: af00 add r7, sp, #0
8004a68: 6078 str r0, [r7, #4]
8004a6a: 460b mov r3, r1
8004a6c: 807b strh r3, [r7, #2]
8004a6e: 4613 mov r3, r2
8004a70: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8004a72: 787b ldrb r3, [r7, #1]
8004a74: 2b00 cmp r3, #0
8004a76: d003 beq.n 8004a80 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8004a78: 887a ldrh r2, [r7, #2]
8004a7a: 687b ldr r3, [r7, #4]
8004a7c: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
8004a7e: e003 b.n 8004a88 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8004a80: 887b ldrh r3, [r7, #2]
8004a82: 041a lsls r2, r3, #16
8004a84: 687b ldr r3, [r7, #4]
8004a86: 611a str r2, [r3, #16]
}
8004a88: bf00 nop
8004a8a: 370c adds r7, #12
8004a8c: 46bd mov sp, r7
8004a8e: bc80 pop {r7}
8004a90: 4770 bx lr
08004a92 <HAL_GPIO_TogglePin>:
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
* @param GPIO_Pin: Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8004a92: b480 push {r7}
8004a94: b085 sub sp, #20
8004a96: af00 add r7, sp, #0
8004a98: 6078 str r0, [r7, #4]
8004a9a: 460b mov r3, r1
8004a9c: 807b strh r3, [r7, #2]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* get current Output Data Register value */
odr = GPIOx->ODR;
8004a9e: 687b ldr r3, [r7, #4]
8004aa0: 68db ldr r3, [r3, #12]
8004aa2: 60fb str r3, [r7, #12]
/* Set selected pins that were at low level, and reset ones that were high */
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
8004aa4: 887a ldrh r2, [r7, #2]
8004aa6: 68fb ldr r3, [r7, #12]
8004aa8: 4013 ands r3, r2
8004aaa: 041a lsls r2, r3, #16
8004aac: 68fb ldr r3, [r7, #12]
8004aae: 43d9 mvns r1, r3
8004ab0: 887b ldrh r3, [r7, #2]
8004ab2: 400b ands r3, r1
8004ab4: 431a orrs r2, r3
8004ab6: 687b ldr r3, [r7, #4]
8004ab8: 611a str r2, [r3, #16]
}
8004aba: bf00 nop
8004abc: 3714 adds r7, #20
8004abe: 46bd mov sp, r7
8004ac0: bc80 pop {r7}
8004ac2: 4770 bx lr
08004ac4 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8004ac4: b580 push {r7, lr}
8004ac6: b084 sub sp, #16
8004ac8: af00 add r7, sp, #0
8004aca: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8004acc: 687b ldr r3, [r7, #4]
8004ace: 2b00 cmp r3, #0
8004ad0: d101 bne.n 8004ad6 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8004ad2: 2301 movs r3, #1
8004ad4: e0e8 b.n 8004ca8 <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8004ad6: 687b ldr r3, [r7, #4]
8004ad8: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8004adc: b2db uxtb r3, r3
8004ade: 2b00 cmp r3, #0
8004ae0: d106 bne.n 8004af0 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8004ae2: 687b ldr r3, [r7, #4]
8004ae4: 2200 movs r2, #0
8004ae6: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8004aea: 6878 ldr r0, [r7, #4]
8004aec: f007 fad0 bl 800c090 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8004af0: 687b ldr r3, [r7, #4]
8004af2: 2203 movs r2, #3
8004af4: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8004af8: 687b ldr r3, [r7, #4]
8004afa: 2200 movs r2, #0
8004afc: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8004afe: 687b ldr r3, [r7, #4]
8004b00: 681b ldr r3, [r3, #0]
8004b02: 4618 mov r0, r3
8004b04: f003 f975 bl 8007df2 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8004b08: 687b ldr r3, [r7, #4]
8004b0a: 6818 ldr r0, [r3, #0]
8004b0c: 687b ldr r3, [r7, #4]
8004b0e: 3304 adds r3, #4
8004b10: cb0e ldmia r3, {r1, r2, r3}
8004b12: f003 f94b bl 8007dac <USB_CoreInit>
8004b16: 4603 mov r3, r0
8004b18: 2b00 cmp r3, #0
8004b1a: d005 beq.n 8004b28 <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8004b1c: 687b ldr r3, [r7, #4]
8004b1e: 2202 movs r2, #2
8004b20: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8004b24: 2301 movs r3, #1
8004b26: e0bf b.n 8004ca8 <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
8004b28: 687b ldr r3, [r7, #4]
8004b2a: 681b ldr r3, [r3, #0]
8004b2c: 2100 movs r1, #0
8004b2e: 4618 mov r0, r3
8004b30: f003 f979 bl 8007e26 <USB_SetCurrentMode>
8004b34: 4603 mov r3, r0
8004b36: 2b00 cmp r3, #0
8004b38: d005 beq.n 8004b46 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8004b3a: 687b ldr r3, [r7, #4]
8004b3c: 2202 movs r2, #2
8004b3e: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8004b42: 2301 movs r3, #1
8004b44: e0b0 b.n 8004ca8 <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8004b46: 2300 movs r3, #0
8004b48: 73fb strb r3, [r7, #15]
8004b4a: e03e b.n 8004bca <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8004b4c: 7bfa ldrb r2, [r7, #15]
8004b4e: 6879 ldr r1, [r7, #4]
8004b50: 4613 mov r3, r2
8004b52: 009b lsls r3, r3, #2
8004b54: 4413 add r3, r2
8004b56: 00db lsls r3, r3, #3
8004b58: 440b add r3, r1
8004b5a: 3311 adds r3, #17
8004b5c: 2201 movs r2, #1
8004b5e: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8004b60: 7bfa ldrb r2, [r7, #15]
8004b62: 6879 ldr r1, [r7, #4]
8004b64: 4613 mov r3, r2
8004b66: 009b lsls r3, r3, #2
8004b68: 4413 add r3, r2
8004b6a: 00db lsls r3, r3, #3
8004b6c: 440b add r3, r1
8004b6e: 3310 adds r3, #16
8004b70: 7bfa ldrb r2, [r7, #15]
8004b72: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8004b74: 7bfa ldrb r2, [r7, #15]
8004b76: 6879 ldr r1, [r7, #4]
8004b78: 4613 mov r3, r2
8004b7a: 009b lsls r3, r3, #2
8004b7c: 4413 add r3, r2
8004b7e: 00db lsls r3, r3, #3
8004b80: 440b add r3, r1
8004b82: 3313 adds r3, #19
8004b84: 2200 movs r2, #0
8004b86: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8004b88: 7bfa ldrb r2, [r7, #15]
8004b8a: 6879 ldr r1, [r7, #4]
8004b8c: 4613 mov r3, r2
8004b8e: 009b lsls r3, r3, #2
8004b90: 4413 add r3, r2
8004b92: 00db lsls r3, r3, #3
8004b94: 440b add r3, r1
8004b96: 3320 adds r3, #32
8004b98: 2200 movs r2, #0
8004b9a: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8004b9c: 7bfa ldrb r2, [r7, #15]
8004b9e: 6879 ldr r1, [r7, #4]
8004ba0: 4613 mov r3, r2
8004ba2: 009b lsls r3, r3, #2
8004ba4: 4413 add r3, r2
8004ba6: 00db lsls r3, r3, #3
8004ba8: 440b add r3, r1
8004baa: 3324 adds r3, #36 @ 0x24
8004bac: 2200 movs r2, #0
8004bae: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8004bb0: 7bfb ldrb r3, [r7, #15]
8004bb2: 6879 ldr r1, [r7, #4]
8004bb4: 1c5a adds r2, r3, #1
8004bb6: 4613 mov r3, r2
8004bb8: 009b lsls r3, r3, #2
8004bba: 4413 add r3, r2
8004bbc: 00db lsls r3, r3, #3
8004bbe: 440b add r3, r1
8004bc0: 2200 movs r2, #0
8004bc2: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8004bc4: 7bfb ldrb r3, [r7, #15]
8004bc6: 3301 adds r3, #1
8004bc8: 73fb strb r3, [r7, #15]
8004bca: 687b ldr r3, [r7, #4]
8004bcc: 791b ldrb r3, [r3, #4]
8004bce: 7bfa ldrb r2, [r7, #15]
8004bd0: 429a cmp r2, r3
8004bd2: d3bb bcc.n 8004b4c <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8004bd4: 2300 movs r3, #0
8004bd6: 73fb strb r3, [r7, #15]
8004bd8: e044 b.n 8004c64 <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
8004bda: 7bfa ldrb r2, [r7, #15]
8004bdc: 6879 ldr r1, [r7, #4]
8004bde: 4613 mov r3, r2
8004be0: 009b lsls r3, r3, #2
8004be2: 4413 add r3, r2
8004be4: 00db lsls r3, r3, #3
8004be6: 440b add r3, r1
8004be8: f203 1351 addw r3, r3, #337 @ 0x151
8004bec: 2200 movs r2, #0
8004bee: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8004bf0: 7bfa ldrb r2, [r7, #15]
8004bf2: 6879 ldr r1, [r7, #4]
8004bf4: 4613 mov r3, r2
8004bf6: 009b lsls r3, r3, #2
8004bf8: 4413 add r3, r2
8004bfa: 00db lsls r3, r3, #3
8004bfc: 440b add r3, r1
8004bfe: f503 73a8 add.w r3, r3, #336 @ 0x150
8004c02: 7bfa ldrb r2, [r7, #15]
8004c04: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8004c06: 7bfa ldrb r2, [r7, #15]
8004c08: 6879 ldr r1, [r7, #4]
8004c0a: 4613 mov r3, r2
8004c0c: 009b lsls r3, r3, #2
8004c0e: 4413 add r3, r2
8004c10: 00db lsls r3, r3, #3
8004c12: 440b add r3, r1
8004c14: f203 1353 addw r3, r3, #339 @ 0x153
8004c18: 2200 movs r2, #0
8004c1a: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8004c1c: 7bfa ldrb r2, [r7, #15]
8004c1e: 6879 ldr r1, [r7, #4]
8004c20: 4613 mov r3, r2
8004c22: 009b lsls r3, r3, #2
8004c24: 4413 add r3, r2
8004c26: 00db lsls r3, r3, #3
8004c28: 440b add r3, r1
8004c2a: f503 73b0 add.w r3, r3, #352 @ 0x160
8004c2e: 2200 movs r2, #0
8004c30: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8004c32: 7bfa ldrb r2, [r7, #15]
8004c34: 6879 ldr r1, [r7, #4]
8004c36: 4613 mov r3, r2
8004c38: 009b lsls r3, r3, #2
8004c3a: 4413 add r3, r2
8004c3c: 00db lsls r3, r3, #3
8004c3e: 440b add r3, r1
8004c40: f503 73b2 add.w r3, r3, #356 @ 0x164
8004c44: 2200 movs r2, #0
8004c46: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
8004c48: 7bfa ldrb r2, [r7, #15]
8004c4a: 6879 ldr r1, [r7, #4]
8004c4c: 4613 mov r3, r2
8004c4e: 009b lsls r3, r3, #2
8004c50: 4413 add r3, r2
8004c52: 00db lsls r3, r3, #3
8004c54: 440b add r3, r1
8004c56: f503 73b4 add.w r3, r3, #360 @ 0x168
8004c5a: 2200 movs r2, #0
8004c5c: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8004c5e: 7bfb ldrb r3, [r7, #15]
8004c60: 3301 adds r3, #1
8004c62: 73fb strb r3, [r7, #15]
8004c64: 687b ldr r3, [r7, #4]
8004c66: 791b ldrb r3, [r3, #4]
8004c68: 7bfa ldrb r2, [r7, #15]
8004c6a: 429a cmp r2, r3
8004c6c: d3b5 bcc.n 8004bda <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8004c6e: 687b ldr r3, [r7, #4]
8004c70: 6818 ldr r0, [r3, #0]
8004c72: 687b ldr r3, [r7, #4]
8004c74: 3304 adds r3, #4
8004c76: cb0e ldmia r3, {r1, r2, r3}
8004c78: f003 f8e1 bl 8007e3e <USB_DevInit>
8004c7c: 4603 mov r3, r0
8004c7e: 2b00 cmp r3, #0
8004c80: d005 beq.n 8004c8e <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8004c82: 687b ldr r3, [r7, #4]
8004c84: 2202 movs r2, #2
8004c86: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8004c8a: 2301 movs r3, #1
8004c8c: e00c b.n 8004ca8 <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
8004c8e: 687b ldr r3, [r7, #4]
8004c90: 2200 movs r2, #0
8004c92: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
8004c94: 687b ldr r3, [r7, #4]
8004c96: 2201 movs r2, #1
8004c98: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
8004c9c: 687b ldr r3, [r7, #4]
8004c9e: 681b ldr r3, [r3, #0]
8004ca0: 4618 mov r0, r3
8004ca2: f005 fb60 bl 800a366 <USB_DevDisconnect>
return HAL_OK;
8004ca6: 2300 movs r3, #0
}
8004ca8: 4618 mov r0, r3
8004caa: 3710 adds r7, #16
8004cac: 46bd mov sp, r7
8004cae: bd80 pop {r7, pc}
08004cb0 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8004cb0: b580 push {r7, lr}
8004cb2: b082 sub sp, #8
8004cb4: af00 add r7, sp, #0
8004cb6: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8004cb8: 687b ldr r3, [r7, #4]
8004cba: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8004cbe: 2b01 cmp r3, #1
8004cc0: d101 bne.n 8004cc6 <HAL_PCD_Start+0x16>
8004cc2: 2302 movs r3, #2
8004cc4: e016 b.n 8004cf4 <HAL_PCD_Start+0x44>
8004cc6: 687b ldr r3, [r7, #4]
8004cc8: 2201 movs r2, #1
8004cca: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8004cce: 687b ldr r3, [r7, #4]
8004cd0: 681b ldr r3, [r3, #0]
8004cd2: 4618 mov r0, r3
8004cd4: f003 f877 bl 8007dc6 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8004cd8: 2101 movs r1, #1
8004cda: 6878 ldr r0, [r7, #4]
8004cdc: f007 fc4b bl 800c576 <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
8004ce0: 687b ldr r3, [r7, #4]
8004ce2: 681b ldr r3, [r3, #0]
8004ce4: 4618 mov r0, r3
8004ce6: f005 fb34 bl 800a352 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8004cea: 687b ldr r3, [r7, #4]
8004cec: 2200 movs r2, #0
8004cee: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8004cf2: 2300 movs r3, #0
}
8004cf4: 4618 mov r0, r3
8004cf6: 3708 adds r7, #8
8004cf8: 46bd mov sp, r7
8004cfa: bd80 pop {r7, pc}
08004cfc <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8004cfc: b580 push {r7, lr}
8004cfe: b088 sub sp, #32
8004d00: af00 add r7, sp, #0
8004d02: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8004d04: 687b ldr r3, [r7, #4]
8004d06: 681b ldr r3, [r3, #0]
8004d08: 4618 mov r0, r3
8004d0a: f005 fb36 bl 800a37a <USB_ReadInterrupts>
8004d0e: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
8004d10: 69bb ldr r3, [r7, #24]
8004d12: f403 4300 and.w r3, r3, #32768 @ 0x8000
8004d16: 2b00 cmp r3, #0
8004d18: d003 beq.n 8004d22 <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8004d1a: 6878 ldr r0, [r7, #4]
8004d1c: f000 fb1a bl 8005354 <PCD_EP_ISR_Handler>
return;
8004d20: e119 b.n 8004f56 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8004d22: 69bb ldr r3, [r7, #24]
8004d24: f403 6380 and.w r3, r3, #1024 @ 0x400
8004d28: 2b00 cmp r3, #0
8004d2a: d013 beq.n 8004d54 <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8004d2c: 687b ldr r3, [r7, #4]
8004d2e: 681b ldr r3, [r3, #0]
8004d30: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004d34: b29a uxth r2, r3
8004d36: 687b ldr r3, [r7, #4]
8004d38: 681b ldr r3, [r3, #0]
8004d3a: f422 6280 bic.w r2, r2, #1024 @ 0x400
8004d3e: b292 uxth r2, r2
8004d40: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8004d44: 6878 ldr r0, [r7, #4]
8004d46: f007 fa1e bl 800c186 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
8004d4a: 2100 movs r1, #0
8004d4c: 6878 ldr r0, [r7, #4]
8004d4e: f000 f905 bl 8004f5c <HAL_PCD_SetAddress>
return;
8004d52: e100 b.n 8004f56 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8004d54: 69bb ldr r3, [r7, #24]
8004d56: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004d5a: 2b00 cmp r3, #0
8004d5c: d00c beq.n 8004d78 <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8004d5e: 687b ldr r3, [r7, #4]
8004d60: 681b ldr r3, [r3, #0]
8004d62: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004d66: b29a uxth r2, r3
8004d68: 687b ldr r3, [r7, #4]
8004d6a: 681b ldr r3, [r3, #0]
8004d6c: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8004d70: b292 uxth r2, r2
8004d72: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8004d76: e0ee b.n 8004f56 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
8004d78: 69bb ldr r3, [r7, #24]
8004d7a: f403 5300 and.w r3, r3, #8192 @ 0x2000
8004d7e: 2b00 cmp r3, #0
8004d80: d00c beq.n 8004d9c <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8004d82: 687b ldr r3, [r7, #4]
8004d84: 681b ldr r3, [r3, #0]
8004d86: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004d8a: b29a uxth r2, r3
8004d8c: 687b ldr r3, [r7, #4]
8004d8e: 681b ldr r3, [r3, #0]
8004d90: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8004d94: b292 uxth r2, r2
8004d96: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8004d9a: e0dc b.n 8004f56 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8004d9c: 69bb ldr r3, [r7, #24]
8004d9e: f403 5380 and.w r3, r3, #4096 @ 0x1000
8004da2: 2b00 cmp r3, #0
8004da4: d027 beq.n 8004df6 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8004da6: 687b ldr r3, [r7, #4]
8004da8: 681b ldr r3, [r3, #0]
8004daa: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8004dae: b29a uxth r2, r3
8004db0: 687b ldr r3, [r7, #4]
8004db2: 681b ldr r3, [r3, #0]
8004db4: f022 0204 bic.w r2, r2, #4
8004db8: b292 uxth r2, r2
8004dba: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8004dbe: 687b ldr r3, [r7, #4]
8004dc0: 681b ldr r3, [r3, #0]
8004dc2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8004dc6: b29a uxth r2, r3
8004dc8: 687b ldr r3, [r7, #4]
8004dca: 681b ldr r3, [r3, #0]
8004dcc: f022 0208 bic.w r2, r2, #8
8004dd0: b292 uxth r2, r2
8004dd2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8004dd6: 6878 ldr r0, [r7, #4]
8004dd8: f007 fa0e bl 800c1f8 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8004ddc: 687b ldr r3, [r7, #4]
8004dde: 681b ldr r3, [r3, #0]
8004de0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004de4: b29a uxth r2, r3
8004de6: 687b ldr r3, [r7, #4]
8004de8: 681b ldr r3, [r3, #0]
8004dea: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8004dee: b292 uxth r2, r2
8004df0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8004df4: e0af b.n 8004f56 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8004df6: 69bb ldr r3, [r7, #24]
8004df8: f403 6300 and.w r3, r3, #2048 @ 0x800
8004dfc: 2b00 cmp r3, #0
8004dfe: f000 8083 beq.w 8004f08 <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
8004e02: 2300 movs r3, #0
8004e04: 77fb strb r3, [r7, #31]
8004e06: e010 b.n 8004e2a <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8004e08: 687b ldr r3, [r7, #4]
8004e0a: 681b ldr r3, [r3, #0]
8004e0c: 461a mov r2, r3
8004e0e: 7ffb ldrb r3, [r7, #31]
8004e10: 009b lsls r3, r3, #2
8004e12: 441a add r2, r3
8004e14: 7ffb ldrb r3, [r7, #31]
8004e16: 8812 ldrh r2, [r2, #0]
8004e18: b292 uxth r2, r2
8004e1a: 005b lsls r3, r3, #1
8004e1c: 3320 adds r3, #32
8004e1e: 443b add r3, r7
8004e20: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8004e24: 7ffb ldrb r3, [r7, #31]
8004e26: 3301 adds r3, #1
8004e28: 77fb strb r3, [r7, #31]
8004e2a: 7ffb ldrb r3, [r7, #31]
8004e2c: 2b07 cmp r3, #7
8004e2e: d9eb bls.n 8004e08 <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8004e30: 687b ldr r3, [r7, #4]
8004e32: 681b ldr r3, [r3, #0]
8004e34: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8004e38: b29a uxth r2, r3
8004e3a: 687b ldr r3, [r7, #4]
8004e3c: 681b ldr r3, [r3, #0]
8004e3e: f042 0201 orr.w r2, r2, #1
8004e42: b292 uxth r2, r2
8004e44: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
8004e48: 687b ldr r3, [r7, #4]
8004e4a: 681b ldr r3, [r3, #0]
8004e4c: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8004e50: b29a uxth r2, r3
8004e52: 687b ldr r3, [r7, #4]
8004e54: 681b ldr r3, [r3, #0]
8004e56: f022 0201 bic.w r2, r2, #1
8004e5a: b292 uxth r2, r2
8004e5c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8004e60: bf00 nop
8004e62: 687b ldr r3, [r7, #4]
8004e64: 681b ldr r3, [r3, #0]
8004e66: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004e6a: b29b uxth r3, r3
8004e6c: f403 6380 and.w r3, r3, #1024 @ 0x400
8004e70: 2b00 cmp r3, #0
8004e72: d0f6 beq.n 8004e62 <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8004e74: 687b ldr r3, [r7, #4]
8004e76: 681b ldr r3, [r3, #0]
8004e78: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004e7c: b29a uxth r2, r3
8004e7e: 687b ldr r3, [r7, #4]
8004e80: 681b ldr r3, [r3, #0]
8004e82: f422 6280 bic.w r2, r2, #1024 @ 0x400
8004e86: b292 uxth r2, r2
8004e88: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8004e8c: 2300 movs r3, #0
8004e8e: 77fb strb r3, [r7, #31]
8004e90: e00f b.n 8004eb2 <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8004e92: 7ffb ldrb r3, [r7, #31]
8004e94: 687a ldr r2, [r7, #4]
8004e96: 6812 ldr r2, [r2, #0]
8004e98: 4611 mov r1, r2
8004e9a: 7ffa ldrb r2, [r7, #31]
8004e9c: 0092 lsls r2, r2, #2
8004e9e: 440a add r2, r1
8004ea0: 005b lsls r3, r3, #1
8004ea2: 3320 adds r3, #32
8004ea4: 443b add r3, r7
8004ea6: f833 3c18 ldrh.w r3, [r3, #-24]
8004eaa: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8004eac: 7ffb ldrb r3, [r7, #31]
8004eae: 3301 adds r3, #1
8004eb0: 77fb strb r3, [r7, #31]
8004eb2: 7ffb ldrb r3, [r7, #31]
8004eb4: 2b07 cmp r3, #7
8004eb6: d9ec bls.n 8004e92 <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8004eb8: 687b ldr r3, [r7, #4]
8004eba: 681b ldr r3, [r3, #0]
8004ebc: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8004ec0: b29a uxth r2, r3
8004ec2: 687b ldr r3, [r7, #4]
8004ec4: 681b ldr r3, [r3, #0]
8004ec6: f042 0208 orr.w r2, r2, #8
8004eca: b292 uxth r2, r2
8004ecc: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8004ed0: 687b ldr r3, [r7, #4]
8004ed2: 681b ldr r3, [r3, #0]
8004ed4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004ed8: b29a uxth r2, r3
8004eda: 687b ldr r3, [r7, #4]
8004edc: 681b ldr r3, [r3, #0]
8004ede: f422 6200 bic.w r2, r2, #2048 @ 0x800
8004ee2: b292 uxth r2, r2
8004ee4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8004ee8: 687b ldr r3, [r7, #4]
8004eea: 681b ldr r3, [r3, #0]
8004eec: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8004ef0: b29a uxth r2, r3
8004ef2: 687b ldr r3, [r7, #4]
8004ef4: 681b ldr r3, [r3, #0]
8004ef6: f042 0204 orr.w r2, r2, #4
8004efa: b292 uxth r2, r2
8004efc: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8004f00: 6878 ldr r0, [r7, #4]
8004f02: f007 f95f bl 800c1c4 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8004f06: e026 b.n 8004f56 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8004f08: 69bb ldr r3, [r7, #24]
8004f0a: f403 7300 and.w r3, r3, #512 @ 0x200
8004f0e: 2b00 cmp r3, #0
8004f10: d00f beq.n 8004f32 <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8004f12: 687b ldr r3, [r7, #4]
8004f14: 681b ldr r3, [r3, #0]
8004f16: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004f1a: b29a uxth r2, r3
8004f1c: 687b ldr r3, [r7, #4]
8004f1e: 681b ldr r3, [r3, #0]
8004f20: f422 7200 bic.w r2, r2, #512 @ 0x200
8004f24: b292 uxth r2, r2
8004f26: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8004f2a: 6878 ldr r0, [r7, #4]
8004f2c: f007 f91d bl 800c16a <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8004f30: e011 b.n 8004f56 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8004f32: 69bb ldr r3, [r7, #24]
8004f34: f403 7380 and.w r3, r3, #256 @ 0x100
8004f38: 2b00 cmp r3, #0
8004f3a: d00c beq.n 8004f56 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8004f3c: 687b ldr r3, [r7, #4]
8004f3e: 681b ldr r3, [r3, #0]
8004f40: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8004f44: b29a uxth r2, r3
8004f46: 687b ldr r3, [r7, #4]
8004f48: 681b ldr r3, [r3, #0]
8004f4a: f422 7280 bic.w r2, r2, #256 @ 0x100
8004f4e: b292 uxth r2, r2
8004f50: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8004f54: bf00 nop
}
}
8004f56: 3720 adds r7, #32
8004f58: 46bd mov sp, r7
8004f5a: bd80 pop {r7, pc}
08004f5c <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8004f5c: b580 push {r7, lr}
8004f5e: b082 sub sp, #8
8004f60: af00 add r7, sp, #0
8004f62: 6078 str r0, [r7, #4]
8004f64: 460b mov r3, r1
8004f66: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8004f68: 687b ldr r3, [r7, #4]
8004f6a: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8004f6e: 2b01 cmp r3, #1
8004f70: d101 bne.n 8004f76 <HAL_PCD_SetAddress+0x1a>
8004f72: 2302 movs r3, #2
8004f74: e012 b.n 8004f9c <HAL_PCD_SetAddress+0x40>
8004f76: 687b ldr r3, [r7, #4]
8004f78: 2201 movs r2, #1
8004f7a: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8004f7e: 687b ldr r3, [r7, #4]
8004f80: 78fa ldrb r2, [r7, #3]
8004f82: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8004f84: 687b ldr r3, [r7, #4]
8004f86: 681b ldr r3, [r3, #0]
8004f88: 78fa ldrb r2, [r7, #3]
8004f8a: 4611 mov r1, r2
8004f8c: 4618 mov r0, r3
8004f8e: f005 f9cd bl 800a32c <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8004f92: 687b ldr r3, [r7, #4]
8004f94: 2200 movs r2, #0
8004f96: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8004f9a: 2300 movs r3, #0
}
8004f9c: 4618 mov r0, r3
8004f9e: 3708 adds r7, #8
8004fa0: 46bd mov sp, r7
8004fa2: bd80 pop {r7, pc}
08004fa4 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8004fa4: b580 push {r7, lr}
8004fa6: b084 sub sp, #16
8004fa8: af00 add r7, sp, #0
8004faa: 6078 str r0, [r7, #4]
8004fac: 4608 mov r0, r1
8004fae: 4611 mov r1, r2
8004fb0: 461a mov r2, r3
8004fb2: 4603 mov r3, r0
8004fb4: 70fb strb r3, [r7, #3]
8004fb6: 460b mov r3, r1
8004fb8: 803b strh r3, [r7, #0]
8004fba: 4613 mov r3, r2
8004fbc: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8004fbe: 2300 movs r3, #0
8004fc0: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8004fc2: f997 3003 ldrsb.w r3, [r7, #3]
8004fc6: 2b00 cmp r3, #0
8004fc8: da0e bge.n 8004fe8 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8004fca: 78fb ldrb r3, [r7, #3]
8004fcc: f003 0207 and.w r2, r3, #7
8004fd0: 4613 mov r3, r2
8004fd2: 009b lsls r3, r3, #2
8004fd4: 4413 add r3, r2
8004fd6: 00db lsls r3, r3, #3
8004fd8: 3310 adds r3, #16
8004fda: 687a ldr r2, [r7, #4]
8004fdc: 4413 add r3, r2
8004fde: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8004fe0: 68fb ldr r3, [r7, #12]
8004fe2: 2201 movs r2, #1
8004fe4: 705a strb r2, [r3, #1]
8004fe6: e00e b.n 8005006 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8004fe8: 78fb ldrb r3, [r7, #3]
8004fea: f003 0207 and.w r2, r3, #7
8004fee: 4613 mov r3, r2
8004ff0: 009b lsls r3, r3, #2
8004ff2: 4413 add r3, r2
8004ff4: 00db lsls r3, r3, #3
8004ff6: f503 73a8 add.w r3, r3, #336 @ 0x150
8004ffa: 687a ldr r2, [r7, #4]
8004ffc: 4413 add r3, r2
8004ffe: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8005000: 68fb ldr r3, [r7, #12]
8005002: 2200 movs r2, #0
8005004: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8005006: 78fb ldrb r3, [r7, #3]
8005008: f003 0307 and.w r3, r3, #7
800500c: b2da uxtb r2, r3
800500e: 68fb ldr r3, [r7, #12]
8005010: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8005012: 883a ldrh r2, [r7, #0]
8005014: 68fb ldr r3, [r7, #12]
8005016: 611a str r2, [r3, #16]
ep->type = ep_type;
8005018: 68fb ldr r3, [r7, #12]
800501a: 78ba ldrb r2, [r7, #2]
800501c: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
800501e: 78bb ldrb r3, [r7, #2]
8005020: 2b02 cmp r3, #2
8005022: d102 bne.n 800502a <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8005024: 68fb ldr r3, [r7, #12]
8005026: 2200 movs r2, #0
8005028: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
800502a: 687b ldr r3, [r7, #4]
800502c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8005030: 2b01 cmp r3, #1
8005032: d101 bne.n 8005038 <HAL_PCD_EP_Open+0x94>
8005034: 2302 movs r3, #2
8005036: e00e b.n 8005056 <HAL_PCD_EP_Open+0xb2>
8005038: 687b ldr r3, [r7, #4]
800503a: 2201 movs r2, #1
800503c: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8005040: 687b ldr r3, [r7, #4]
8005042: 681b ldr r3, [r3, #0]
8005044: 68f9 ldr r1, [r7, #12]
8005046: 4618 mov r0, r3
8005048: f002 ff16 bl 8007e78 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
800504c: 687b ldr r3, [r7, #4]
800504e: 2200 movs r2, #0
8005050: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
8005054: 7afb ldrb r3, [r7, #11]
}
8005056: 4618 mov r0, r3
8005058: 3710 adds r7, #16
800505a: 46bd mov sp, r7
800505c: bd80 pop {r7, pc}
0800505e <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
800505e: b580 push {r7, lr}
8005060: b084 sub sp, #16
8005062: af00 add r7, sp, #0
8005064: 6078 str r0, [r7, #4]
8005066: 460b mov r3, r1
8005068: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
800506a: f997 3003 ldrsb.w r3, [r7, #3]
800506e: 2b00 cmp r3, #0
8005070: da0e bge.n 8005090 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8005072: 78fb ldrb r3, [r7, #3]
8005074: f003 0207 and.w r2, r3, #7
8005078: 4613 mov r3, r2
800507a: 009b lsls r3, r3, #2
800507c: 4413 add r3, r2
800507e: 00db lsls r3, r3, #3
8005080: 3310 adds r3, #16
8005082: 687a ldr r2, [r7, #4]
8005084: 4413 add r3, r2
8005086: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8005088: 68fb ldr r3, [r7, #12]
800508a: 2201 movs r2, #1
800508c: 705a strb r2, [r3, #1]
800508e: e00e b.n 80050ae <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8005090: 78fb ldrb r3, [r7, #3]
8005092: f003 0207 and.w r2, r3, #7
8005096: 4613 mov r3, r2
8005098: 009b lsls r3, r3, #2
800509a: 4413 add r3, r2
800509c: 00db lsls r3, r3, #3
800509e: f503 73a8 add.w r3, r3, #336 @ 0x150
80050a2: 687a ldr r2, [r7, #4]
80050a4: 4413 add r3, r2
80050a6: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80050a8: 68fb ldr r3, [r7, #12]
80050aa: 2200 movs r2, #0
80050ac: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
80050ae: 78fb ldrb r3, [r7, #3]
80050b0: f003 0307 and.w r3, r3, #7
80050b4: b2da uxtb r2, r3
80050b6: 68fb ldr r3, [r7, #12]
80050b8: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80050ba: 687b ldr r3, [r7, #4]
80050bc: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80050c0: 2b01 cmp r3, #1
80050c2: d101 bne.n 80050c8 <HAL_PCD_EP_Close+0x6a>
80050c4: 2302 movs r3, #2
80050c6: e00e b.n 80050e6 <HAL_PCD_EP_Close+0x88>
80050c8: 687b ldr r3, [r7, #4]
80050ca: 2201 movs r2, #1
80050cc: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
80050d0: 687b ldr r3, [r7, #4]
80050d2: 681b ldr r3, [r3, #0]
80050d4: 68f9 ldr r1, [r7, #12]
80050d6: 4618 mov r0, r3
80050d8: f003 fa8e bl 80085f8 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
80050dc: 687b ldr r3, [r7, #4]
80050de: 2200 movs r2, #0
80050e0: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80050e4: 2300 movs r3, #0
}
80050e6: 4618 mov r0, r3
80050e8: 3710 adds r7, #16
80050ea: 46bd mov sp, r7
80050ec: bd80 pop {r7, pc}
080050ee <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80050ee: b580 push {r7, lr}
80050f0: b086 sub sp, #24
80050f2: af00 add r7, sp, #0
80050f4: 60f8 str r0, [r7, #12]
80050f6: 607a str r2, [r7, #4]
80050f8: 603b str r3, [r7, #0]
80050fa: 460b mov r3, r1
80050fc: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80050fe: 7afb ldrb r3, [r7, #11]
8005100: f003 0207 and.w r2, r3, #7
8005104: 4613 mov r3, r2
8005106: 009b lsls r3, r3, #2
8005108: 4413 add r3, r2
800510a: 00db lsls r3, r3, #3
800510c: f503 73a8 add.w r3, r3, #336 @ 0x150
8005110: 68fa ldr r2, [r7, #12]
8005112: 4413 add r3, r2
8005114: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8005116: 697b ldr r3, [r7, #20]
8005118: 687a ldr r2, [r7, #4]
800511a: 615a str r2, [r3, #20]
ep->xfer_len = len;
800511c: 697b ldr r3, [r7, #20]
800511e: 683a ldr r2, [r7, #0]
8005120: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8005122: 697b ldr r3, [r7, #20]
8005124: 2200 movs r2, #0
8005126: 61da str r2, [r3, #28]
ep->is_in = 0U;
8005128: 697b ldr r3, [r7, #20]
800512a: 2200 movs r2, #0
800512c: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
800512e: 7afb ldrb r3, [r7, #11]
8005130: f003 0307 and.w r3, r3, #7
8005134: b2da uxtb r2, r3
8005136: 697b ldr r3, [r7, #20]
8005138: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
800513a: 68fb ldr r3, [r7, #12]
800513c: 681b ldr r3, [r3, #0]
800513e: 6979 ldr r1, [r7, #20]
8005140: 4618 mov r0, r3
8005142: f003 fc45 bl 80089d0 <USB_EPStartXfer>
return HAL_OK;
8005146: 2300 movs r3, #0
}
8005148: 4618 mov r0, r3
800514a: 3718 adds r7, #24
800514c: 46bd mov sp, r7
800514e: bd80 pop {r7, pc}
08005150 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8005150: b480 push {r7}
8005152: b083 sub sp, #12
8005154: af00 add r7, sp, #0
8005156: 6078 str r0, [r7, #4]
8005158: 460b mov r3, r1
800515a: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
800515c: 78fb ldrb r3, [r7, #3]
800515e: f003 0207 and.w r2, r3, #7
8005162: 6879 ldr r1, [r7, #4]
8005164: 4613 mov r3, r2
8005166: 009b lsls r3, r3, #2
8005168: 4413 add r3, r2
800516a: 00db lsls r3, r3, #3
800516c: 440b add r3, r1
800516e: f503 73b6 add.w r3, r3, #364 @ 0x16c
8005172: 681b ldr r3, [r3, #0]
}
8005174: 4618 mov r0, r3
8005176: 370c adds r7, #12
8005178: 46bd mov sp, r7
800517a: bc80 pop {r7}
800517c: 4770 bx lr
0800517e <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
800517e: b580 push {r7, lr}
8005180: b086 sub sp, #24
8005182: af00 add r7, sp, #0
8005184: 60f8 str r0, [r7, #12]
8005186: 607a str r2, [r7, #4]
8005188: 603b str r3, [r7, #0]
800518a: 460b mov r3, r1
800518c: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800518e: 7afb ldrb r3, [r7, #11]
8005190: f003 0207 and.w r2, r3, #7
8005194: 4613 mov r3, r2
8005196: 009b lsls r3, r3, #2
8005198: 4413 add r3, r2
800519a: 00db lsls r3, r3, #3
800519c: 3310 adds r3, #16
800519e: 68fa ldr r2, [r7, #12]
80051a0: 4413 add r3, r2
80051a2: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
80051a4: 697b ldr r3, [r7, #20]
80051a6: 687a ldr r2, [r7, #4]
80051a8: 615a str r2, [r3, #20]
ep->xfer_len = len;
80051aa: 697b ldr r3, [r7, #20]
80051ac: 683a ldr r2, [r7, #0]
80051ae: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
80051b0: 697b ldr r3, [r7, #20]
80051b2: 2201 movs r2, #1
80051b4: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
80051b8: 697b ldr r3, [r7, #20]
80051ba: 683a ldr r2, [r7, #0]
80051bc: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
80051be: 697b ldr r3, [r7, #20]
80051c0: 2200 movs r2, #0
80051c2: 61da str r2, [r3, #28]
ep->is_in = 1U;
80051c4: 697b ldr r3, [r7, #20]
80051c6: 2201 movs r2, #1
80051c8: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
80051ca: 7afb ldrb r3, [r7, #11]
80051cc: f003 0307 and.w r3, r3, #7
80051d0: b2da uxtb r2, r3
80051d2: 697b ldr r3, [r7, #20]
80051d4: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80051d6: 68fb ldr r3, [r7, #12]
80051d8: 681b ldr r3, [r3, #0]
80051da: 6979 ldr r1, [r7, #20]
80051dc: 4618 mov r0, r3
80051de: f003 fbf7 bl 80089d0 <USB_EPStartXfer>
return HAL_OK;
80051e2: 2300 movs r3, #0
}
80051e4: 4618 mov r0, r3
80051e6: 3718 adds r7, #24
80051e8: 46bd mov sp, r7
80051ea: bd80 pop {r7, pc}
080051ec <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80051ec: b580 push {r7, lr}
80051ee: b084 sub sp, #16
80051f0: af00 add r7, sp, #0
80051f2: 6078 str r0, [r7, #4]
80051f4: 460b mov r3, r1
80051f6: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
80051f8: 78fb ldrb r3, [r7, #3]
80051fa: f003 0307 and.w r3, r3, #7
80051fe: 687a ldr r2, [r7, #4]
8005200: 7912 ldrb r2, [r2, #4]
8005202: 4293 cmp r3, r2
8005204: d901 bls.n 800520a <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8005206: 2301 movs r3, #1
8005208: e04c b.n 80052a4 <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
800520a: f997 3003 ldrsb.w r3, [r7, #3]
800520e: 2b00 cmp r3, #0
8005210: da0e bge.n 8005230 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8005212: 78fb ldrb r3, [r7, #3]
8005214: f003 0207 and.w r2, r3, #7
8005218: 4613 mov r3, r2
800521a: 009b lsls r3, r3, #2
800521c: 4413 add r3, r2
800521e: 00db lsls r3, r3, #3
8005220: 3310 adds r3, #16
8005222: 687a ldr r2, [r7, #4]
8005224: 4413 add r3, r2
8005226: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8005228: 68fb ldr r3, [r7, #12]
800522a: 2201 movs r2, #1
800522c: 705a strb r2, [r3, #1]
800522e: e00c b.n 800524a <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8005230: 78fa ldrb r2, [r7, #3]
8005232: 4613 mov r3, r2
8005234: 009b lsls r3, r3, #2
8005236: 4413 add r3, r2
8005238: 00db lsls r3, r3, #3
800523a: f503 73a8 add.w r3, r3, #336 @ 0x150
800523e: 687a ldr r2, [r7, #4]
8005240: 4413 add r3, r2
8005242: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8005244: 68fb ldr r3, [r7, #12]
8005246: 2200 movs r2, #0
8005248: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
800524a: 68fb ldr r3, [r7, #12]
800524c: 2201 movs r2, #1
800524e: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8005250: 78fb ldrb r3, [r7, #3]
8005252: f003 0307 and.w r3, r3, #7
8005256: b2da uxtb r2, r3
8005258: 68fb ldr r3, [r7, #12]
800525a: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800525c: 687b ldr r3, [r7, #4]
800525e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8005262: 2b01 cmp r3, #1
8005264: d101 bne.n 800526a <HAL_PCD_EP_SetStall+0x7e>
8005266: 2302 movs r3, #2
8005268: e01c b.n 80052a4 <HAL_PCD_EP_SetStall+0xb8>
800526a: 687b ldr r3, [r7, #4]
800526c: 2201 movs r2, #1
800526e: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8005272: 687b ldr r3, [r7, #4]
8005274: 681b ldr r3, [r3, #0]
8005276: 68f9 ldr r1, [r7, #12]
8005278: 4618 mov r0, r3
800527a: f004 ff5a bl 800a132 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
800527e: 78fb ldrb r3, [r7, #3]
8005280: f003 0307 and.w r3, r3, #7
8005284: 2b00 cmp r3, #0
8005286: d108 bne.n 800529a <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8005288: 687b ldr r3, [r7, #4]
800528a: 681a ldr r2, [r3, #0]
800528c: 687b ldr r3, [r7, #4]
800528e: f503 7326 add.w r3, r3, #664 @ 0x298
8005292: 4619 mov r1, r3
8005294: 4610 mov r0, r2
8005296: f005 f87f bl 800a398 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
800529a: 687b ldr r3, [r7, #4]
800529c: 2200 movs r2, #0
800529e: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80052a2: 2300 movs r3, #0
}
80052a4: 4618 mov r0, r3
80052a6: 3710 adds r7, #16
80052a8: 46bd mov sp, r7
80052aa: bd80 pop {r7, pc}
080052ac <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80052ac: b580 push {r7, lr}
80052ae: b084 sub sp, #16
80052b0: af00 add r7, sp, #0
80052b2: 6078 str r0, [r7, #4]
80052b4: 460b mov r3, r1
80052b6: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
80052b8: 78fb ldrb r3, [r7, #3]
80052ba: f003 030f and.w r3, r3, #15
80052be: 687a ldr r2, [r7, #4]
80052c0: 7912 ldrb r2, [r2, #4]
80052c2: 4293 cmp r3, r2
80052c4: d901 bls.n 80052ca <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
80052c6: 2301 movs r3, #1
80052c8: e040 b.n 800534c <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
80052ca: f997 3003 ldrsb.w r3, [r7, #3]
80052ce: 2b00 cmp r3, #0
80052d0: da0e bge.n 80052f0 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80052d2: 78fb ldrb r3, [r7, #3]
80052d4: f003 0207 and.w r2, r3, #7
80052d8: 4613 mov r3, r2
80052da: 009b lsls r3, r3, #2
80052dc: 4413 add r3, r2
80052de: 00db lsls r3, r3, #3
80052e0: 3310 adds r3, #16
80052e2: 687a ldr r2, [r7, #4]
80052e4: 4413 add r3, r2
80052e6: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80052e8: 68fb ldr r3, [r7, #12]
80052ea: 2201 movs r2, #1
80052ec: 705a strb r2, [r3, #1]
80052ee: e00e b.n 800530e <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80052f0: 78fb ldrb r3, [r7, #3]
80052f2: f003 0207 and.w r2, r3, #7
80052f6: 4613 mov r3, r2
80052f8: 009b lsls r3, r3, #2
80052fa: 4413 add r3, r2
80052fc: 00db lsls r3, r3, #3
80052fe: f503 73a8 add.w r3, r3, #336 @ 0x150
8005302: 687a ldr r2, [r7, #4]
8005304: 4413 add r3, r2
8005306: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8005308: 68fb ldr r3, [r7, #12]
800530a: 2200 movs r2, #0
800530c: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
800530e: 68fb ldr r3, [r7, #12]
8005310: 2200 movs r2, #0
8005312: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8005314: 78fb ldrb r3, [r7, #3]
8005316: f003 0307 and.w r3, r3, #7
800531a: b2da uxtb r2, r3
800531c: 68fb ldr r3, [r7, #12]
800531e: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8005320: 687b ldr r3, [r7, #4]
8005322: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8005326: 2b01 cmp r3, #1
8005328: d101 bne.n 800532e <HAL_PCD_EP_ClrStall+0x82>
800532a: 2302 movs r3, #2
800532c: e00e b.n 800534c <HAL_PCD_EP_ClrStall+0xa0>
800532e: 687b ldr r3, [r7, #4]
8005330: 2201 movs r2, #1
8005332: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
8005336: 687b ldr r3, [r7, #4]
8005338: 681b ldr r3, [r3, #0]
800533a: 68f9 ldr r1, [r7, #12]
800533c: 4618 mov r0, r3
800533e: f004 ff48 bl 800a1d2 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8005342: 687b ldr r3, [r7, #4]
8005344: 2200 movs r2, #0
8005346: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
800534a: 2300 movs r3, #0
}
800534c: 4618 mov r0, r3
800534e: 3710 adds r7, #16
8005350: 46bd mov sp, r7
8005352: bd80 pop {r7, pc}
08005354 <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
8005354: b580 push {r7, lr}
8005356: b096 sub sp, #88 @ 0x58
8005358: af00 add r7, sp, #0
800535a: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
800535c: e3bb b.n 8005ad6 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
800535e: 687b ldr r3, [r7, #4]
8005360: 681b ldr r3, [r3, #0]
8005362: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005366: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
800536a: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800536e: b2db uxtb r3, r3
8005370: f003 030f and.w r3, r3, #15
8005374: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
8005378: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800537c: 2b00 cmp r3, #0
800537e: f040 8175 bne.w 800566c <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8005382: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8005386: f003 0310 and.w r3, r3, #16
800538a: 2b00 cmp r3, #0
800538c: d14e bne.n 800542c <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
800538e: 687b ldr r3, [r7, #4]
8005390: 681b ldr r3, [r3, #0]
8005392: 881b ldrh r3, [r3, #0]
8005394: b29b uxth r3, r3
8005396: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
800539a: f023 0370 bic.w r3, r3, #112 @ 0x70
800539e: 81fb strh r3, [r7, #14]
80053a0: 687b ldr r3, [r7, #4]
80053a2: 681a ldr r2, [r3, #0]
80053a4: 89fb ldrh r3, [r7, #14]
80053a6: ea6f 4343 mvn.w r3, r3, lsl #17
80053aa: ea6f 4353 mvn.w r3, r3, lsr #17
80053ae: b29b uxth r3, r3
80053b0: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
80053b2: 687b ldr r3, [r7, #4]
80053b4: 3310 adds r3, #16
80053b6: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80053b8: 687b ldr r3, [r7, #4]
80053ba: 681b ldr r3, [r3, #0]
80053bc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80053c0: b29b uxth r3, r3
80053c2: 461a mov r2, r3
80053c4: 6d7b ldr r3, [r7, #84] @ 0x54
80053c6: 781b ldrb r3, [r3, #0]
80053c8: 00db lsls r3, r3, #3
80053ca: 4413 add r3, r2
80053cc: 3302 adds r3, #2
80053ce: 005b lsls r3, r3, #1
80053d0: 687a ldr r2, [r7, #4]
80053d2: 6812 ldr r2, [r2, #0]
80053d4: 4413 add r3, r2
80053d6: f503 6380 add.w r3, r3, #1024 @ 0x400
80053da: 881b ldrh r3, [r3, #0]
80053dc: f3c3 0209 ubfx r2, r3, #0, #10
80053e0: 6d7b ldr r3, [r7, #84] @ 0x54
80053e2: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
80053e4: 6d7b ldr r3, [r7, #84] @ 0x54
80053e6: 695a ldr r2, [r3, #20]
80053e8: 6d7b ldr r3, [r7, #84] @ 0x54
80053ea: 69db ldr r3, [r3, #28]
80053ec: 441a add r2, r3
80053ee: 6d7b ldr r3, [r7, #84] @ 0x54
80053f0: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
80053f2: 2100 movs r1, #0
80053f4: 6878 ldr r0, [r7, #4]
80053f6: f006 fe9e bl 800c136 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
80053fa: 687b ldr r3, [r7, #4]
80053fc: 7b5b ldrb r3, [r3, #13]
80053fe: b2db uxtb r3, r3
8005400: 2b00 cmp r3, #0
8005402: f000 8368 beq.w 8005ad6 <PCD_EP_ISR_Handler+0x782>
8005406: 6d7b ldr r3, [r7, #84] @ 0x54
8005408: 699b ldr r3, [r3, #24]
800540a: 2b00 cmp r3, #0
800540c: f040 8363 bne.w 8005ad6 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8005410: 687b ldr r3, [r7, #4]
8005412: 7b5b ldrb r3, [r3, #13]
8005414: b2db uxtb r3, r3
8005416: f063 037f orn r3, r3, #127 @ 0x7f
800541a: b2da uxtb r2, r3
800541c: 687b ldr r3, [r7, #4]
800541e: 681b ldr r3, [r3, #0]
8005420: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
8005424: 687b ldr r3, [r7, #4]
8005426: 2200 movs r2, #0
8005428: 735a strb r2, [r3, #13]
800542a: e354 b.n 8005ad6 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
800542c: 687b ldr r3, [r7, #4]
800542e: f503 73a8 add.w r3, r3, #336 @ 0x150
8005432: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8005434: 687b ldr r3, [r7, #4]
8005436: 681b ldr r3, [r3, #0]
8005438: 881b ldrh r3, [r3, #0]
800543a: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
800543e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8005442: f403 6300 and.w r3, r3, #2048 @ 0x800
8005446: 2b00 cmp r3, #0
8005448: d034 beq.n 80054b4 <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
800544a: 687b ldr r3, [r7, #4]
800544c: 681b ldr r3, [r3, #0]
800544e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005452: b29b uxth r3, r3
8005454: 461a mov r2, r3
8005456: 6d7b ldr r3, [r7, #84] @ 0x54
8005458: 781b ldrb r3, [r3, #0]
800545a: 00db lsls r3, r3, #3
800545c: 4413 add r3, r2
800545e: 3306 adds r3, #6
8005460: 005b lsls r3, r3, #1
8005462: 687a ldr r2, [r7, #4]
8005464: 6812 ldr r2, [r2, #0]
8005466: 4413 add r3, r2
8005468: f503 6380 add.w r3, r3, #1024 @ 0x400
800546c: 881b ldrh r3, [r3, #0]
800546e: f3c3 0209 ubfx r2, r3, #0, #10
8005472: 6d7b ldr r3, [r7, #84] @ 0x54
8005474: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8005476: 687b ldr r3, [r7, #4]
8005478: 6818 ldr r0, [r3, #0]
800547a: 687b ldr r3, [r7, #4]
800547c: f503 7126 add.w r1, r3, #664 @ 0x298
8005480: 6d7b ldr r3, [r7, #84] @ 0x54
8005482: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8005484: 6d7b ldr r3, [r7, #84] @ 0x54
8005486: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8005488: b29b uxth r3, r3
800548a: f004 ffd6 bl 800a43a <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
800548e: 687b ldr r3, [r7, #4]
8005490: 681b ldr r3, [r3, #0]
8005492: 881b ldrh r3, [r3, #0]
8005494: b29a uxth r2, r3
8005496: f640 738f movw r3, #3983 @ 0xf8f
800549a: 4013 ands r3, r2
800549c: 823b strh r3, [r7, #16]
800549e: 687b ldr r3, [r7, #4]
80054a0: 681b ldr r3, [r3, #0]
80054a2: 8a3a ldrh r2, [r7, #16]
80054a4: f042 0280 orr.w r2, r2, #128 @ 0x80
80054a8: b292 uxth r2, r2
80054aa: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
80054ac: 6878 ldr r0, [r7, #4]
80054ae: f006 fe15 bl 800c0dc <HAL_PCD_SetupStageCallback>
80054b2: e310 b.n 8005ad6 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
80054b4: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
80054b8: 2b00 cmp r3, #0
80054ba: f280 830c bge.w 8005ad6 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80054be: 687b ldr r3, [r7, #4]
80054c0: 681b ldr r3, [r3, #0]
80054c2: 881b ldrh r3, [r3, #0]
80054c4: b29a uxth r2, r3
80054c6: f640 738f movw r3, #3983 @ 0xf8f
80054ca: 4013 ands r3, r2
80054cc: 83fb strh r3, [r7, #30]
80054ce: 687b ldr r3, [r7, #4]
80054d0: 681b ldr r3, [r3, #0]
80054d2: 8bfa ldrh r2, [r7, #30]
80054d4: f042 0280 orr.w r2, r2, #128 @ 0x80
80054d8: b292 uxth r2, r2
80054da: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80054dc: 687b ldr r3, [r7, #4]
80054de: 681b ldr r3, [r3, #0]
80054e0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80054e4: b29b uxth r3, r3
80054e6: 461a mov r2, r3
80054e8: 6d7b ldr r3, [r7, #84] @ 0x54
80054ea: 781b ldrb r3, [r3, #0]
80054ec: 00db lsls r3, r3, #3
80054ee: 4413 add r3, r2
80054f0: 3306 adds r3, #6
80054f2: 005b lsls r3, r3, #1
80054f4: 687a ldr r2, [r7, #4]
80054f6: 6812 ldr r2, [r2, #0]
80054f8: 4413 add r3, r2
80054fa: f503 6380 add.w r3, r3, #1024 @ 0x400
80054fe: 881b ldrh r3, [r3, #0]
8005500: f3c3 0209 ubfx r2, r3, #0, #10
8005504: 6d7b ldr r3, [r7, #84] @ 0x54
8005506: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
8005508: 6d7b ldr r3, [r7, #84] @ 0x54
800550a: 69db ldr r3, [r3, #28]
800550c: 2b00 cmp r3, #0
800550e: d019 beq.n 8005544 <PCD_EP_ISR_Handler+0x1f0>
8005510: 6d7b ldr r3, [r7, #84] @ 0x54
8005512: 695b ldr r3, [r3, #20]
8005514: 2b00 cmp r3, #0
8005516: d015 beq.n 8005544 <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8005518: 687b ldr r3, [r7, #4]
800551a: 6818 ldr r0, [r3, #0]
800551c: 6d7b ldr r3, [r7, #84] @ 0x54
800551e: 6959 ldr r1, [r3, #20]
8005520: 6d7b ldr r3, [r7, #84] @ 0x54
8005522: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8005524: 6d7b ldr r3, [r7, #84] @ 0x54
8005526: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8005528: b29b uxth r3, r3
800552a: f004 ff86 bl 800a43a <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
800552e: 6d7b ldr r3, [r7, #84] @ 0x54
8005530: 695a ldr r2, [r3, #20]
8005532: 6d7b ldr r3, [r7, #84] @ 0x54
8005534: 69db ldr r3, [r3, #28]
8005536: 441a add r2, r3
8005538: 6d7b ldr r3, [r7, #84] @ 0x54
800553a: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
800553c: 2100 movs r1, #0
800553e: 6878 ldr r0, [r7, #4]
8005540: f006 fdde bl 800c100 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8005544: 687b ldr r3, [r7, #4]
8005546: 681b ldr r3, [r3, #0]
8005548: 881b ldrh r3, [r3, #0]
800554a: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
800554e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8005552: f403 6300 and.w r3, r3, #2048 @ 0x800
8005556: 2b00 cmp r3, #0
8005558: f040 82bd bne.w 8005ad6 <PCD_EP_ISR_Handler+0x782>
800555c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8005560: f403 5340 and.w r3, r3, #12288 @ 0x3000
8005564: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
8005568: f000 82b5 beq.w 8005ad6 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
800556c: 687b ldr r3, [r7, #4]
800556e: 681b ldr r3, [r3, #0]
8005570: 61bb str r3, [r7, #24]
8005572: 687b ldr r3, [r7, #4]
8005574: 681b ldr r3, [r3, #0]
8005576: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800557a: b29b uxth r3, r3
800557c: 461a mov r2, r3
800557e: 69bb ldr r3, [r7, #24]
8005580: 4413 add r3, r2
8005582: 61bb str r3, [r7, #24]
8005584: 69bb ldr r3, [r7, #24]
8005586: f203 430c addw r3, r3, #1036 @ 0x40c
800558a: 617b str r3, [r7, #20]
800558c: 697b ldr r3, [r7, #20]
800558e: 881b ldrh r3, [r3, #0]
8005590: b29b uxth r3, r3
8005592: f3c3 0309 ubfx r3, r3, #0, #10
8005596: b29a uxth r2, r3
8005598: 697b ldr r3, [r7, #20]
800559a: 801a strh r2, [r3, #0]
800559c: 6d7b ldr r3, [r7, #84] @ 0x54
800559e: 691b ldr r3, [r3, #16]
80055a0: 2b3e cmp r3, #62 @ 0x3e
80055a2: d91d bls.n 80055e0 <PCD_EP_ISR_Handler+0x28c>
80055a4: 6d7b ldr r3, [r7, #84] @ 0x54
80055a6: 691b ldr r3, [r3, #16]
80055a8: 095b lsrs r3, r3, #5
80055aa: 647b str r3, [r7, #68] @ 0x44
80055ac: 6d7b ldr r3, [r7, #84] @ 0x54
80055ae: 691b ldr r3, [r3, #16]
80055b0: f003 031f and.w r3, r3, #31
80055b4: 2b00 cmp r3, #0
80055b6: d102 bne.n 80055be <PCD_EP_ISR_Handler+0x26a>
80055b8: 6c7b ldr r3, [r7, #68] @ 0x44
80055ba: 3b01 subs r3, #1
80055bc: 647b str r3, [r7, #68] @ 0x44
80055be: 697b ldr r3, [r7, #20]
80055c0: 881b ldrh r3, [r3, #0]
80055c2: b29a uxth r2, r3
80055c4: 6c7b ldr r3, [r7, #68] @ 0x44
80055c6: b29b uxth r3, r3
80055c8: 029b lsls r3, r3, #10
80055ca: b29b uxth r3, r3
80055cc: 4313 orrs r3, r2
80055ce: b29b uxth r3, r3
80055d0: ea6f 4343 mvn.w r3, r3, lsl #17
80055d4: ea6f 4353 mvn.w r3, r3, lsr #17
80055d8: b29a uxth r2, r3
80055da: 697b ldr r3, [r7, #20]
80055dc: 801a strh r2, [r3, #0]
80055de: e026 b.n 800562e <PCD_EP_ISR_Handler+0x2da>
80055e0: 6d7b ldr r3, [r7, #84] @ 0x54
80055e2: 691b ldr r3, [r3, #16]
80055e4: 2b00 cmp r3, #0
80055e6: d10a bne.n 80055fe <PCD_EP_ISR_Handler+0x2aa>
80055e8: 697b ldr r3, [r7, #20]
80055ea: 881b ldrh r3, [r3, #0]
80055ec: b29b uxth r3, r3
80055ee: ea6f 4343 mvn.w r3, r3, lsl #17
80055f2: ea6f 4353 mvn.w r3, r3, lsr #17
80055f6: b29a uxth r2, r3
80055f8: 697b ldr r3, [r7, #20]
80055fa: 801a strh r2, [r3, #0]
80055fc: e017 b.n 800562e <PCD_EP_ISR_Handler+0x2da>
80055fe: 6d7b ldr r3, [r7, #84] @ 0x54
8005600: 691b ldr r3, [r3, #16]
8005602: 085b lsrs r3, r3, #1
8005604: 647b str r3, [r7, #68] @ 0x44
8005606: 6d7b ldr r3, [r7, #84] @ 0x54
8005608: 691b ldr r3, [r3, #16]
800560a: f003 0301 and.w r3, r3, #1
800560e: 2b00 cmp r3, #0
8005610: d002 beq.n 8005618 <PCD_EP_ISR_Handler+0x2c4>
8005612: 6c7b ldr r3, [r7, #68] @ 0x44
8005614: 3301 adds r3, #1
8005616: 647b str r3, [r7, #68] @ 0x44
8005618: 697b ldr r3, [r7, #20]
800561a: 881b ldrh r3, [r3, #0]
800561c: b29a uxth r2, r3
800561e: 6c7b ldr r3, [r7, #68] @ 0x44
8005620: b29b uxth r3, r3
8005622: 029b lsls r3, r3, #10
8005624: b29b uxth r3, r3
8005626: 4313 orrs r3, r2
8005628: b29a uxth r2, r3
800562a: 697b ldr r3, [r7, #20]
800562c: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
800562e: 687b ldr r3, [r7, #4]
8005630: 681b ldr r3, [r3, #0]
8005632: 881b ldrh r3, [r3, #0]
8005634: b29b uxth r3, r3
8005636: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800563a: f023 0370 bic.w r3, r3, #112 @ 0x70
800563e: 827b strh r3, [r7, #18]
8005640: 8a7b ldrh r3, [r7, #18]
8005642: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8005646: 827b strh r3, [r7, #18]
8005648: 8a7b ldrh r3, [r7, #18]
800564a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800564e: 827b strh r3, [r7, #18]
8005650: 687b ldr r3, [r7, #4]
8005652: 681a ldr r2, [r3, #0]
8005654: 8a7b ldrh r3, [r7, #18]
8005656: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800565a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800565e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005662: f043 0380 orr.w r3, r3, #128 @ 0x80
8005666: b29b uxth r3, r3
8005668: 8013 strh r3, [r2, #0]
800566a: e234 b.n 8005ad6 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
800566c: 687b ldr r3, [r7, #4]
800566e: 681b ldr r3, [r3, #0]
8005670: 461a mov r2, r3
8005672: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8005676: 009b lsls r3, r3, #2
8005678: 4413 add r3, r2
800567a: 881b ldrh r3, [r3, #0]
800567c: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
8005680: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8005684: 2b00 cmp r3, #0
8005686: f280 80fc bge.w 8005882 <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
800568a: 687b ldr r3, [r7, #4]
800568c: 681b ldr r3, [r3, #0]
800568e: 461a mov r2, r3
8005690: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8005694: 009b lsls r3, r3, #2
8005696: 4413 add r3, r2
8005698: 881b ldrh r3, [r3, #0]
800569a: b29a uxth r2, r3
800569c: f640 738f movw r3, #3983 @ 0xf8f
80056a0: 4013 ands r3, r2
80056a2: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80056a6: 687b ldr r3, [r7, #4]
80056a8: 681b ldr r3, [r3, #0]
80056aa: 461a mov r2, r3
80056ac: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80056b0: 009b lsls r3, r3, #2
80056b2: 4413 add r3, r2
80056b4: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
80056b8: f042 0280 orr.w r2, r2, #128 @ 0x80
80056bc: b292 uxth r2, r2
80056be: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
80056c0: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80056c4: 4613 mov r3, r2
80056c6: 009b lsls r3, r3, #2
80056c8: 4413 add r3, r2
80056ca: 00db lsls r3, r3, #3
80056cc: f503 73a8 add.w r3, r3, #336 @ 0x150
80056d0: 687a ldr r2, [r7, #4]
80056d2: 4413 add r3, r2
80056d4: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
80056d6: 6d7b ldr r3, [r7, #84] @ 0x54
80056d8: 7b1b ldrb r3, [r3, #12]
80056da: 2b00 cmp r3, #0
80056dc: d125 bne.n 800572a <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80056de: 687b ldr r3, [r7, #4]
80056e0: 681b ldr r3, [r3, #0]
80056e2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80056e6: b29b uxth r3, r3
80056e8: 461a mov r2, r3
80056ea: 6d7b ldr r3, [r7, #84] @ 0x54
80056ec: 781b ldrb r3, [r3, #0]
80056ee: 00db lsls r3, r3, #3
80056f0: 4413 add r3, r2
80056f2: 3306 adds r3, #6
80056f4: 005b lsls r3, r3, #1
80056f6: 687a ldr r2, [r7, #4]
80056f8: 6812 ldr r2, [r2, #0]
80056fa: 4413 add r3, r2
80056fc: f503 6380 add.w r3, r3, #1024 @ 0x400
8005700: 881b ldrh r3, [r3, #0]
8005702: f3c3 0309 ubfx r3, r3, #0, #10
8005706: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800570a: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800570e: 2b00 cmp r3, #0
8005710: f000 8092 beq.w 8005838 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8005714: 687b ldr r3, [r7, #4]
8005716: 6818 ldr r0, [r3, #0]
8005718: 6d7b ldr r3, [r7, #84] @ 0x54
800571a: 6959 ldr r1, [r3, #20]
800571c: 6d7b ldr r3, [r7, #84] @ 0x54
800571e: 88da ldrh r2, [r3, #6]
8005720: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8005724: f004 fe89 bl 800a43a <USB_ReadPMA>
8005728: e086 b.n 8005838 <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
800572a: 6d7b ldr r3, [r7, #84] @ 0x54
800572c: 78db ldrb r3, [r3, #3]
800572e: 2b02 cmp r3, #2
8005730: d10a bne.n 8005748 <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8005732: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8005736: 461a mov r2, r3
8005738: 6d79 ldr r1, [r7, #84] @ 0x54
800573a: 6878 ldr r0, [r7, #4]
800573c: f000 f9d9 bl 8005af2 <HAL_PCD_EP_DB_Receive>
8005740: 4603 mov r3, r0
8005742: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
8005746: e077 b.n 8005838 <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8005748: 687b ldr r3, [r7, #4]
800574a: 681b ldr r3, [r3, #0]
800574c: 461a mov r2, r3
800574e: 6d7b ldr r3, [r7, #84] @ 0x54
8005750: 781b ldrb r3, [r3, #0]
8005752: 009b lsls r3, r3, #2
8005754: 4413 add r3, r2
8005756: 881b ldrh r3, [r3, #0]
8005758: b29b uxth r3, r3
800575a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800575e: f023 0370 bic.w r3, r3, #112 @ 0x70
8005762: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8005766: 687b ldr r3, [r7, #4]
8005768: 681b ldr r3, [r3, #0]
800576a: 461a mov r2, r3
800576c: 6d7b ldr r3, [r7, #84] @ 0x54
800576e: 781b ldrb r3, [r3, #0]
8005770: 009b lsls r3, r3, #2
8005772: 441a add r2, r3
8005774: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
8005778: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800577c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005780: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005784: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8005788: b29b uxth r3, r3
800578a: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
800578c: 687b ldr r3, [r7, #4]
800578e: 681b ldr r3, [r3, #0]
8005790: 461a mov r2, r3
8005792: 6d7b ldr r3, [r7, #84] @ 0x54
8005794: 781b ldrb r3, [r3, #0]
8005796: 009b lsls r3, r3, #2
8005798: 4413 add r3, r2
800579a: 881b ldrh r3, [r3, #0]
800579c: b29b uxth r3, r3
800579e: f403 4380 and.w r3, r3, #16384 @ 0x4000
80057a2: 2b00 cmp r3, #0
80057a4: d024 beq.n 80057f0 <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80057a6: 687b ldr r3, [r7, #4]
80057a8: 681b ldr r3, [r3, #0]
80057aa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80057ae: b29b uxth r3, r3
80057b0: 461a mov r2, r3
80057b2: 6d7b ldr r3, [r7, #84] @ 0x54
80057b4: 781b ldrb r3, [r3, #0]
80057b6: 00db lsls r3, r3, #3
80057b8: 4413 add r3, r2
80057ba: 3302 adds r3, #2
80057bc: 005b lsls r3, r3, #1
80057be: 687a ldr r2, [r7, #4]
80057c0: 6812 ldr r2, [r2, #0]
80057c2: 4413 add r3, r2
80057c4: f503 6380 add.w r3, r3, #1024 @ 0x400
80057c8: 881b ldrh r3, [r3, #0]
80057ca: f3c3 0309 ubfx r3, r3, #0, #10
80057ce: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80057d2: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80057d6: 2b00 cmp r3, #0
80057d8: d02e beq.n 8005838 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
80057da: 687b ldr r3, [r7, #4]
80057dc: 6818 ldr r0, [r3, #0]
80057de: 6d7b ldr r3, [r7, #84] @ 0x54
80057e0: 6959 ldr r1, [r3, #20]
80057e2: 6d7b ldr r3, [r7, #84] @ 0x54
80057e4: 891a ldrh r2, [r3, #8]
80057e6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80057ea: f004 fe26 bl 800a43a <USB_ReadPMA>
80057ee: e023 b.n 8005838 <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80057f0: 687b ldr r3, [r7, #4]
80057f2: 681b ldr r3, [r3, #0]
80057f4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80057f8: b29b uxth r3, r3
80057fa: 461a mov r2, r3
80057fc: 6d7b ldr r3, [r7, #84] @ 0x54
80057fe: 781b ldrb r3, [r3, #0]
8005800: 00db lsls r3, r3, #3
8005802: 4413 add r3, r2
8005804: 3306 adds r3, #6
8005806: 005b lsls r3, r3, #1
8005808: 687a ldr r2, [r7, #4]
800580a: 6812 ldr r2, [r2, #0]
800580c: 4413 add r3, r2
800580e: f503 6380 add.w r3, r3, #1024 @ 0x400
8005812: 881b ldrh r3, [r3, #0]
8005814: f3c3 0309 ubfx r3, r3, #0, #10
8005818: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800581c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8005820: 2b00 cmp r3, #0
8005822: d009 beq.n 8005838 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8005824: 687b ldr r3, [r7, #4]
8005826: 6818 ldr r0, [r3, #0]
8005828: 6d7b ldr r3, [r7, #84] @ 0x54
800582a: 6959 ldr r1, [r3, #20]
800582c: 6d7b ldr r3, [r7, #84] @ 0x54
800582e: 895a ldrh r2, [r3, #10]
8005830: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8005834: f004 fe01 bl 800a43a <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
8005838: 6d7b ldr r3, [r7, #84] @ 0x54
800583a: 69da ldr r2, [r3, #28]
800583c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8005840: 441a add r2, r3
8005842: 6d7b ldr r3, [r7, #84] @ 0x54
8005844: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8005846: 6d7b ldr r3, [r7, #84] @ 0x54
8005848: 695a ldr r2, [r3, #20]
800584a: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800584e: 441a add r2, r3
8005850: 6d7b ldr r3, [r7, #84] @ 0x54
8005852: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
8005854: 6d7b ldr r3, [r7, #84] @ 0x54
8005856: 699b ldr r3, [r3, #24]
8005858: 2b00 cmp r3, #0
800585a: d005 beq.n 8005868 <PCD_EP_ISR_Handler+0x514>
800585c: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
8005860: 6d7b ldr r3, [r7, #84] @ 0x54
8005862: 691b ldr r3, [r3, #16]
8005864: 429a cmp r2, r3
8005866: d206 bcs.n 8005876 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8005868: 6d7b ldr r3, [r7, #84] @ 0x54
800586a: 781b ldrb r3, [r3, #0]
800586c: 4619 mov r1, r3
800586e: 6878 ldr r0, [r7, #4]
8005870: f006 fc46 bl 800c100 <HAL_PCD_DataOutStageCallback>
8005874: e005 b.n 8005882 <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8005876: 687b ldr r3, [r7, #4]
8005878: 681b ldr r3, [r3, #0]
800587a: 6d79 ldr r1, [r7, #84] @ 0x54
800587c: 4618 mov r0, r3
800587e: f003 f8a7 bl 80089d0 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8005882: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8005886: f003 0380 and.w r3, r3, #128 @ 0x80
800588a: 2b00 cmp r3, #0
800588c: f000 8123 beq.w 8005ad6 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
8005890: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8005894: 4613 mov r3, r2
8005896: 009b lsls r3, r3, #2
8005898: 4413 add r3, r2
800589a: 00db lsls r3, r3, #3
800589c: 3310 adds r3, #16
800589e: 687a ldr r2, [r7, #4]
80058a0: 4413 add r3, r2
80058a2: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
80058a4: 687b ldr r3, [r7, #4]
80058a6: 681b ldr r3, [r3, #0]
80058a8: 461a mov r2, r3
80058aa: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80058ae: 009b lsls r3, r3, #2
80058b0: 4413 add r3, r2
80058b2: 881b ldrh r3, [r3, #0]
80058b4: b29b uxth r3, r3
80058b6: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
80058ba: f023 0370 bic.w r3, r3, #112 @ 0x70
80058be: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80058c2: 687b ldr r3, [r7, #4]
80058c4: 681b ldr r3, [r3, #0]
80058c6: 461a mov r2, r3
80058c8: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80058cc: 009b lsls r3, r3, #2
80058ce: 441a add r2, r3
80058d0: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
80058d4: ea6f 4343 mvn.w r3, r3, lsl #17
80058d8: ea6f 4353 mvn.w r3, r3, lsr #17
80058dc: b29b uxth r3, r3
80058de: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
80058e0: 6d7b ldr r3, [r7, #84] @ 0x54
80058e2: 78db ldrb r3, [r3, #3]
80058e4: 2b01 cmp r3, #1
80058e6: f040 80a2 bne.w 8005a2e <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
80058ea: 6d7b ldr r3, [r7, #84] @ 0x54
80058ec: 2200 movs r2, #0
80058ee: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
80058f0: 6d7b ldr r3, [r7, #84] @ 0x54
80058f2: 7b1b ldrb r3, [r3, #12]
80058f4: 2b00 cmp r3, #0
80058f6: f000 8093 beq.w 8005a20 <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80058fa: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80058fe: f003 0340 and.w r3, r3, #64 @ 0x40
8005902: 2b00 cmp r3, #0
8005904: d046 beq.n 8005994 <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8005906: 6d7b ldr r3, [r7, #84] @ 0x54
8005908: 785b ldrb r3, [r3, #1]
800590a: 2b00 cmp r3, #0
800590c: d126 bne.n 800595c <PCD_EP_ISR_Handler+0x608>
800590e: 687b ldr r3, [r7, #4]
8005910: 681b ldr r3, [r3, #0]
8005912: 627b str r3, [r7, #36] @ 0x24
8005914: 687b ldr r3, [r7, #4]
8005916: 681b ldr r3, [r3, #0]
8005918: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800591c: b29b uxth r3, r3
800591e: 461a mov r2, r3
8005920: 6a7b ldr r3, [r7, #36] @ 0x24
8005922: 4413 add r3, r2
8005924: 627b str r3, [r7, #36] @ 0x24
8005926: 6d7b ldr r3, [r7, #84] @ 0x54
8005928: 781b ldrb r3, [r3, #0]
800592a: 011a lsls r2, r3, #4
800592c: 6a7b ldr r3, [r7, #36] @ 0x24
800592e: 4413 add r3, r2
8005930: f203 4304 addw r3, r3, #1028 @ 0x404
8005934: 623b str r3, [r7, #32]
8005936: 6a3b ldr r3, [r7, #32]
8005938: 881b ldrh r3, [r3, #0]
800593a: b29b uxth r3, r3
800593c: f3c3 0309 ubfx r3, r3, #0, #10
8005940: b29a uxth r2, r3
8005942: 6a3b ldr r3, [r7, #32]
8005944: 801a strh r2, [r3, #0]
8005946: 6a3b ldr r3, [r7, #32]
8005948: 881b ldrh r3, [r3, #0]
800594a: b29b uxth r3, r3
800594c: ea6f 4343 mvn.w r3, r3, lsl #17
8005950: ea6f 4353 mvn.w r3, r3, lsr #17
8005954: b29a uxth r2, r3
8005956: 6a3b ldr r3, [r7, #32]
8005958: 801a strh r2, [r3, #0]
800595a: e061 b.n 8005a20 <PCD_EP_ISR_Handler+0x6cc>
800595c: 6d7b ldr r3, [r7, #84] @ 0x54
800595e: 785b ldrb r3, [r3, #1]
8005960: 2b01 cmp r3, #1
8005962: d15d bne.n 8005a20 <PCD_EP_ISR_Handler+0x6cc>
8005964: 687b ldr r3, [r7, #4]
8005966: 681b ldr r3, [r3, #0]
8005968: 62fb str r3, [r7, #44] @ 0x2c
800596a: 687b ldr r3, [r7, #4]
800596c: 681b ldr r3, [r3, #0]
800596e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005972: b29b uxth r3, r3
8005974: 461a mov r2, r3
8005976: 6afb ldr r3, [r7, #44] @ 0x2c
8005978: 4413 add r3, r2
800597a: 62fb str r3, [r7, #44] @ 0x2c
800597c: 6d7b ldr r3, [r7, #84] @ 0x54
800597e: 781b ldrb r3, [r3, #0]
8005980: 011a lsls r2, r3, #4
8005982: 6afb ldr r3, [r7, #44] @ 0x2c
8005984: 4413 add r3, r2
8005986: f203 4304 addw r3, r3, #1028 @ 0x404
800598a: 62bb str r3, [r7, #40] @ 0x28
800598c: 6abb ldr r3, [r7, #40] @ 0x28
800598e: 2200 movs r2, #0
8005990: 801a strh r2, [r3, #0]
8005992: e045 b.n 8005a20 <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8005994: 687b ldr r3, [r7, #4]
8005996: 681b ldr r3, [r3, #0]
8005998: 63fb str r3, [r7, #60] @ 0x3c
800599a: 6d7b ldr r3, [r7, #84] @ 0x54
800599c: 785b ldrb r3, [r3, #1]
800599e: 2b00 cmp r3, #0
80059a0: d126 bne.n 80059f0 <PCD_EP_ISR_Handler+0x69c>
80059a2: 687b ldr r3, [r7, #4]
80059a4: 681b ldr r3, [r3, #0]
80059a6: 637b str r3, [r7, #52] @ 0x34
80059a8: 687b ldr r3, [r7, #4]
80059aa: 681b ldr r3, [r3, #0]
80059ac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80059b0: b29b uxth r3, r3
80059b2: 461a mov r2, r3
80059b4: 6b7b ldr r3, [r7, #52] @ 0x34
80059b6: 4413 add r3, r2
80059b8: 637b str r3, [r7, #52] @ 0x34
80059ba: 6d7b ldr r3, [r7, #84] @ 0x54
80059bc: 781b ldrb r3, [r3, #0]
80059be: 011a lsls r2, r3, #4
80059c0: 6b7b ldr r3, [r7, #52] @ 0x34
80059c2: 4413 add r3, r2
80059c4: f203 430c addw r3, r3, #1036 @ 0x40c
80059c8: 633b str r3, [r7, #48] @ 0x30
80059ca: 6b3b ldr r3, [r7, #48] @ 0x30
80059cc: 881b ldrh r3, [r3, #0]
80059ce: b29b uxth r3, r3
80059d0: f3c3 0309 ubfx r3, r3, #0, #10
80059d4: b29a uxth r2, r3
80059d6: 6b3b ldr r3, [r7, #48] @ 0x30
80059d8: 801a strh r2, [r3, #0]
80059da: 6b3b ldr r3, [r7, #48] @ 0x30
80059dc: 881b ldrh r3, [r3, #0]
80059de: b29b uxth r3, r3
80059e0: ea6f 4343 mvn.w r3, r3, lsl #17
80059e4: ea6f 4353 mvn.w r3, r3, lsr #17
80059e8: b29a uxth r2, r3
80059ea: 6b3b ldr r3, [r7, #48] @ 0x30
80059ec: 801a strh r2, [r3, #0]
80059ee: e017 b.n 8005a20 <PCD_EP_ISR_Handler+0x6cc>
80059f0: 6d7b ldr r3, [r7, #84] @ 0x54
80059f2: 785b ldrb r3, [r3, #1]
80059f4: 2b01 cmp r3, #1
80059f6: d113 bne.n 8005a20 <PCD_EP_ISR_Handler+0x6cc>
80059f8: 687b ldr r3, [r7, #4]
80059fa: 681b ldr r3, [r3, #0]
80059fc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005a00: b29b uxth r3, r3
8005a02: 461a mov r2, r3
8005a04: 6bfb ldr r3, [r7, #60] @ 0x3c
8005a06: 4413 add r3, r2
8005a08: 63fb str r3, [r7, #60] @ 0x3c
8005a0a: 6d7b ldr r3, [r7, #84] @ 0x54
8005a0c: 781b ldrb r3, [r3, #0]
8005a0e: 011a lsls r2, r3, #4
8005a10: 6bfb ldr r3, [r7, #60] @ 0x3c
8005a12: 4413 add r3, r2
8005a14: f203 430c addw r3, r3, #1036 @ 0x40c
8005a18: 63bb str r3, [r7, #56] @ 0x38
8005a1a: 6bbb ldr r3, [r7, #56] @ 0x38
8005a1c: 2200 movs r2, #0
8005a1e: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8005a20: 6d7b ldr r3, [r7, #84] @ 0x54
8005a22: 781b ldrb r3, [r3, #0]
8005a24: 4619 mov r1, r3
8005a26: 6878 ldr r0, [r7, #4]
8005a28: f006 fb85 bl 800c136 <HAL_PCD_DataInStageCallback>
8005a2c: e053 b.n 8005ad6 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8005a2e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8005a32: f403 7380 and.w r3, r3, #256 @ 0x100
8005a36: 2b00 cmp r3, #0
8005a38: d146 bne.n 8005ac8 <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8005a3a: 687b ldr r3, [r7, #4]
8005a3c: 681b ldr r3, [r3, #0]
8005a3e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005a42: b29b uxth r3, r3
8005a44: 461a mov r2, r3
8005a46: 6d7b ldr r3, [r7, #84] @ 0x54
8005a48: 781b ldrb r3, [r3, #0]
8005a4a: 00db lsls r3, r3, #3
8005a4c: 4413 add r3, r2
8005a4e: 3302 adds r3, #2
8005a50: 005b lsls r3, r3, #1
8005a52: 687a ldr r2, [r7, #4]
8005a54: 6812 ldr r2, [r2, #0]
8005a56: 4413 add r3, r2
8005a58: f503 6380 add.w r3, r3, #1024 @ 0x400
8005a5c: 881b ldrh r3, [r3, #0]
8005a5e: f3c3 0309 ubfx r3, r3, #0, #10
8005a62: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8005a66: 6d7b ldr r3, [r7, #84] @ 0x54
8005a68: 699a ldr r2, [r3, #24]
8005a6a: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8005a6e: 429a cmp r2, r3
8005a70: d907 bls.n 8005a82 <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8005a72: 6d7b ldr r3, [r7, #84] @ 0x54
8005a74: 699a ldr r2, [r3, #24]
8005a76: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8005a7a: 1ad2 subs r2, r2, r3
8005a7c: 6d7b ldr r3, [r7, #84] @ 0x54
8005a7e: 619a str r2, [r3, #24]
8005a80: e002 b.n 8005a88 <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8005a82: 6d7b ldr r3, [r7, #84] @ 0x54
8005a84: 2200 movs r2, #0
8005a86: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8005a88: 6d7b ldr r3, [r7, #84] @ 0x54
8005a8a: 699b ldr r3, [r3, #24]
8005a8c: 2b00 cmp r3, #0
8005a8e: d106 bne.n 8005a9e <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8005a90: 6d7b ldr r3, [r7, #84] @ 0x54
8005a92: 781b ldrb r3, [r3, #0]
8005a94: 4619 mov r1, r3
8005a96: 6878 ldr r0, [r7, #4]
8005a98: f006 fb4d bl 800c136 <HAL_PCD_DataInStageCallback>
8005a9c: e01b b.n 8005ad6 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
8005a9e: 6d7b ldr r3, [r7, #84] @ 0x54
8005aa0: 695a ldr r2, [r3, #20]
8005aa2: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8005aa6: 441a add r2, r3
8005aa8: 6d7b ldr r3, [r7, #84] @ 0x54
8005aaa: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8005aac: 6d7b ldr r3, [r7, #84] @ 0x54
8005aae: 69da ldr r2, [r3, #28]
8005ab0: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8005ab4: 441a add r2, r3
8005ab6: 6d7b ldr r3, [r7, #84] @ 0x54
8005ab8: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8005aba: 687b ldr r3, [r7, #4]
8005abc: 681b ldr r3, [r3, #0]
8005abe: 6d79 ldr r1, [r7, #84] @ 0x54
8005ac0: 4618 mov r0, r3
8005ac2: f002 ff85 bl 80089d0 <USB_EPStartXfer>
8005ac6: e006 b.n 8005ad6 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8005ac8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8005acc: 461a mov r2, r3
8005ace: 6d79 ldr r1, [r7, #84] @ 0x54
8005ad0: 6878 ldr r0, [r7, #4]
8005ad2: f000 f91b bl 8005d0c <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8005ad6: 687b ldr r3, [r7, #4]
8005ad8: 681b ldr r3, [r3, #0]
8005ada: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005ade: b29b uxth r3, r3
8005ae0: b21b sxth r3, r3
8005ae2: 2b00 cmp r3, #0
8005ae4: f6ff ac3b blt.w 800535e <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8005ae8: 2300 movs r3, #0
}
8005aea: 4618 mov r0, r3
8005aec: 3758 adds r7, #88 @ 0x58
8005aee: 46bd mov sp, r7
8005af0: bd80 pop {r7, pc}
08005af2 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8005af2: b580 push {r7, lr}
8005af4: b088 sub sp, #32
8005af6: af00 add r7, sp, #0
8005af8: 60f8 str r0, [r7, #12]
8005afa: 60b9 str r1, [r7, #8]
8005afc: 4613 mov r3, r2
8005afe: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8005b00: 88fb ldrh r3, [r7, #6]
8005b02: f403 4380 and.w r3, r3, #16384 @ 0x4000
8005b06: 2b00 cmp r3, #0
8005b08: d07e beq.n 8005c08 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8005b0a: 68fb ldr r3, [r7, #12]
8005b0c: 681b ldr r3, [r3, #0]
8005b0e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005b12: b29b uxth r3, r3
8005b14: 461a mov r2, r3
8005b16: 68bb ldr r3, [r7, #8]
8005b18: 781b ldrb r3, [r3, #0]
8005b1a: 00db lsls r3, r3, #3
8005b1c: 4413 add r3, r2
8005b1e: 3302 adds r3, #2
8005b20: 005b lsls r3, r3, #1
8005b22: 68fa ldr r2, [r7, #12]
8005b24: 6812 ldr r2, [r2, #0]
8005b26: 4413 add r3, r2
8005b28: f503 6380 add.w r3, r3, #1024 @ 0x400
8005b2c: 881b ldrh r3, [r3, #0]
8005b2e: f3c3 0309 ubfx r3, r3, #0, #10
8005b32: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8005b34: 68bb ldr r3, [r7, #8]
8005b36: 699a ldr r2, [r3, #24]
8005b38: 8b7b ldrh r3, [r7, #26]
8005b3a: 429a cmp r2, r3
8005b3c: d306 bcc.n 8005b4c <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8005b3e: 68bb ldr r3, [r7, #8]
8005b40: 699a ldr r2, [r3, #24]
8005b42: 8b7b ldrh r3, [r7, #26]
8005b44: 1ad2 subs r2, r2, r3
8005b46: 68bb ldr r3, [r7, #8]
8005b48: 619a str r2, [r3, #24]
8005b4a: e002 b.n 8005b52 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
8005b4c: 68bb ldr r3, [r7, #8]
8005b4e: 2200 movs r2, #0
8005b50: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8005b52: 68bb ldr r3, [r7, #8]
8005b54: 699b ldr r3, [r3, #24]
8005b56: 2b00 cmp r3, #0
8005b58: d123 bne.n 8005ba2 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8005b5a: 68fb ldr r3, [r7, #12]
8005b5c: 681b ldr r3, [r3, #0]
8005b5e: 461a mov r2, r3
8005b60: 68bb ldr r3, [r7, #8]
8005b62: 781b ldrb r3, [r3, #0]
8005b64: 009b lsls r3, r3, #2
8005b66: 4413 add r3, r2
8005b68: 881b ldrh r3, [r3, #0]
8005b6a: b29b uxth r3, r3
8005b6c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8005b70: f023 0370 bic.w r3, r3, #112 @ 0x70
8005b74: 833b strh r3, [r7, #24]
8005b76: 8b3b ldrh r3, [r7, #24]
8005b78: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8005b7c: 833b strh r3, [r7, #24]
8005b7e: 68fb ldr r3, [r7, #12]
8005b80: 681b ldr r3, [r3, #0]
8005b82: 461a mov r2, r3
8005b84: 68bb ldr r3, [r7, #8]
8005b86: 781b ldrb r3, [r3, #0]
8005b88: 009b lsls r3, r3, #2
8005b8a: 441a add r2, r3
8005b8c: 8b3b ldrh r3, [r7, #24]
8005b8e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005b92: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005b96: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005b9a: f043 0380 orr.w r3, r3, #128 @ 0x80
8005b9e: b29b uxth r3, r3
8005ba0: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8005ba2: 88fb ldrh r3, [r7, #6]
8005ba4: f003 0340 and.w r3, r3, #64 @ 0x40
8005ba8: 2b00 cmp r3, #0
8005baa: d01f beq.n 8005bec <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8005bac: 68fb ldr r3, [r7, #12]
8005bae: 681b ldr r3, [r3, #0]
8005bb0: 461a mov r2, r3
8005bb2: 68bb ldr r3, [r7, #8]
8005bb4: 781b ldrb r3, [r3, #0]
8005bb6: 009b lsls r3, r3, #2
8005bb8: 4413 add r3, r2
8005bba: 881b ldrh r3, [r3, #0]
8005bbc: b29b uxth r3, r3
8005bbe: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005bc2: f023 0370 bic.w r3, r3, #112 @ 0x70
8005bc6: 82fb strh r3, [r7, #22]
8005bc8: 68fb ldr r3, [r7, #12]
8005bca: 681b ldr r3, [r3, #0]
8005bcc: 461a mov r2, r3
8005bce: 68bb ldr r3, [r7, #8]
8005bd0: 781b ldrb r3, [r3, #0]
8005bd2: 009b lsls r3, r3, #2
8005bd4: 441a add r2, r3
8005bd6: 8afb ldrh r3, [r7, #22]
8005bd8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005bdc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005be0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005be4: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8005be8: b29b uxth r3, r3
8005bea: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8005bec: 8b7b ldrh r3, [r7, #26]
8005bee: 2b00 cmp r3, #0
8005bf0: f000 8087 beq.w 8005d02 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8005bf4: 68fb ldr r3, [r7, #12]
8005bf6: 6818 ldr r0, [r3, #0]
8005bf8: 68bb ldr r3, [r7, #8]
8005bfa: 6959 ldr r1, [r3, #20]
8005bfc: 68bb ldr r3, [r7, #8]
8005bfe: 891a ldrh r2, [r3, #8]
8005c00: 8b7b ldrh r3, [r7, #26]
8005c02: f004 fc1a bl 800a43a <USB_ReadPMA>
8005c06: e07c b.n 8005d02 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8005c08: 68fb ldr r3, [r7, #12]
8005c0a: 681b ldr r3, [r3, #0]
8005c0c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005c10: b29b uxth r3, r3
8005c12: 461a mov r2, r3
8005c14: 68bb ldr r3, [r7, #8]
8005c16: 781b ldrb r3, [r3, #0]
8005c18: 00db lsls r3, r3, #3
8005c1a: 4413 add r3, r2
8005c1c: 3306 adds r3, #6
8005c1e: 005b lsls r3, r3, #1
8005c20: 68fa ldr r2, [r7, #12]
8005c22: 6812 ldr r2, [r2, #0]
8005c24: 4413 add r3, r2
8005c26: f503 6380 add.w r3, r3, #1024 @ 0x400
8005c2a: 881b ldrh r3, [r3, #0]
8005c2c: f3c3 0309 ubfx r3, r3, #0, #10
8005c30: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8005c32: 68bb ldr r3, [r7, #8]
8005c34: 699a ldr r2, [r3, #24]
8005c36: 8b7b ldrh r3, [r7, #26]
8005c38: 429a cmp r2, r3
8005c3a: d306 bcc.n 8005c4a <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
8005c3c: 68bb ldr r3, [r7, #8]
8005c3e: 699a ldr r2, [r3, #24]
8005c40: 8b7b ldrh r3, [r7, #26]
8005c42: 1ad2 subs r2, r2, r3
8005c44: 68bb ldr r3, [r7, #8]
8005c46: 619a str r2, [r3, #24]
8005c48: e002 b.n 8005c50 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
8005c4a: 68bb ldr r3, [r7, #8]
8005c4c: 2200 movs r2, #0
8005c4e: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8005c50: 68bb ldr r3, [r7, #8]
8005c52: 699b ldr r3, [r3, #24]
8005c54: 2b00 cmp r3, #0
8005c56: d123 bne.n 8005ca0 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8005c58: 68fb ldr r3, [r7, #12]
8005c5a: 681b ldr r3, [r3, #0]
8005c5c: 461a mov r2, r3
8005c5e: 68bb ldr r3, [r7, #8]
8005c60: 781b ldrb r3, [r3, #0]
8005c62: 009b lsls r3, r3, #2
8005c64: 4413 add r3, r2
8005c66: 881b ldrh r3, [r3, #0]
8005c68: b29b uxth r3, r3
8005c6a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8005c6e: f023 0370 bic.w r3, r3, #112 @ 0x70
8005c72: 83fb strh r3, [r7, #30]
8005c74: 8bfb ldrh r3, [r7, #30]
8005c76: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8005c7a: 83fb strh r3, [r7, #30]
8005c7c: 68fb ldr r3, [r7, #12]
8005c7e: 681b ldr r3, [r3, #0]
8005c80: 461a mov r2, r3
8005c82: 68bb ldr r3, [r7, #8]
8005c84: 781b ldrb r3, [r3, #0]
8005c86: 009b lsls r3, r3, #2
8005c88: 441a add r2, r3
8005c8a: 8bfb ldrh r3, [r7, #30]
8005c8c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005c90: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005c94: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005c98: f043 0380 orr.w r3, r3, #128 @ 0x80
8005c9c: b29b uxth r3, r3
8005c9e: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8005ca0: 88fb ldrh r3, [r7, #6]
8005ca2: f003 0340 and.w r3, r3, #64 @ 0x40
8005ca6: 2b00 cmp r3, #0
8005ca8: d11f bne.n 8005cea <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8005caa: 68fb ldr r3, [r7, #12]
8005cac: 681b ldr r3, [r3, #0]
8005cae: 461a mov r2, r3
8005cb0: 68bb ldr r3, [r7, #8]
8005cb2: 781b ldrb r3, [r3, #0]
8005cb4: 009b lsls r3, r3, #2
8005cb6: 4413 add r3, r2
8005cb8: 881b ldrh r3, [r3, #0]
8005cba: b29b uxth r3, r3
8005cbc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005cc0: f023 0370 bic.w r3, r3, #112 @ 0x70
8005cc4: 83bb strh r3, [r7, #28]
8005cc6: 68fb ldr r3, [r7, #12]
8005cc8: 681b ldr r3, [r3, #0]
8005cca: 461a mov r2, r3
8005ccc: 68bb ldr r3, [r7, #8]
8005cce: 781b ldrb r3, [r3, #0]
8005cd0: 009b lsls r3, r3, #2
8005cd2: 441a add r2, r3
8005cd4: 8bbb ldrh r3, [r7, #28]
8005cd6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005cda: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005cde: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005ce2: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8005ce6: b29b uxth r3, r3
8005ce8: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8005cea: 8b7b ldrh r3, [r7, #26]
8005cec: 2b00 cmp r3, #0
8005cee: d008 beq.n 8005d02 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8005cf0: 68fb ldr r3, [r7, #12]
8005cf2: 6818 ldr r0, [r3, #0]
8005cf4: 68bb ldr r3, [r7, #8]
8005cf6: 6959 ldr r1, [r3, #20]
8005cf8: 68bb ldr r3, [r7, #8]
8005cfa: 895a ldrh r2, [r3, #10]
8005cfc: 8b7b ldrh r3, [r7, #26]
8005cfe: f004 fb9c bl 800a43a <USB_ReadPMA>
}
}
return count;
8005d02: 8b7b ldrh r3, [r7, #26]
}
8005d04: 4618 mov r0, r3
8005d06: 3720 adds r7, #32
8005d08: 46bd mov sp, r7
8005d0a: bd80 pop {r7, pc}
08005d0c <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8005d0c: b580 push {r7, lr}
8005d0e: b0a4 sub sp, #144 @ 0x90
8005d10: af00 add r7, sp, #0
8005d12: 60f8 str r0, [r7, #12]
8005d14: 60b9 str r1, [r7, #8]
8005d16: 4613 mov r3, r2
8005d18: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8005d1a: 88fb ldrh r3, [r7, #6]
8005d1c: f003 0340 and.w r3, r3, #64 @ 0x40
8005d20: 2b00 cmp r3, #0
8005d22: f000 81dd beq.w 80060e0 <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8005d26: 68fb ldr r3, [r7, #12]
8005d28: 681b ldr r3, [r3, #0]
8005d2a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005d2e: b29b uxth r3, r3
8005d30: 461a mov r2, r3
8005d32: 68bb ldr r3, [r7, #8]
8005d34: 781b ldrb r3, [r3, #0]
8005d36: 00db lsls r3, r3, #3
8005d38: 4413 add r3, r2
8005d3a: 3302 adds r3, #2
8005d3c: 005b lsls r3, r3, #1
8005d3e: 68fa ldr r2, [r7, #12]
8005d40: 6812 ldr r2, [r2, #0]
8005d42: 4413 add r3, r2
8005d44: f503 6380 add.w r3, r3, #1024 @ 0x400
8005d48: 881b ldrh r3, [r3, #0]
8005d4a: f3c3 0309 ubfx r3, r3, #0, #10
8005d4e: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8005d52: 68bb ldr r3, [r7, #8]
8005d54: 699a ldr r2, [r3, #24]
8005d56: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8005d5a: 429a cmp r2, r3
8005d5c: d907 bls.n 8005d6e <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8005d5e: 68bb ldr r3, [r7, #8]
8005d60: 699a ldr r2, [r3, #24]
8005d62: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8005d66: 1ad2 subs r2, r2, r3
8005d68: 68bb ldr r3, [r7, #8]
8005d6a: 619a str r2, [r3, #24]
8005d6c: e002 b.n 8005d74 <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8005d6e: 68bb ldr r3, [r7, #8]
8005d70: 2200 movs r2, #0
8005d72: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8005d74: 68bb ldr r3, [r7, #8]
8005d76: 699b ldr r3, [r3, #24]
8005d78: 2b00 cmp r3, #0
8005d7a: f040 80b9 bne.w 8005ef0 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8005d7e: 68bb ldr r3, [r7, #8]
8005d80: 785b ldrb r3, [r3, #1]
8005d82: 2b00 cmp r3, #0
8005d84: d126 bne.n 8005dd4 <HAL_PCD_EP_DB_Transmit+0xc8>
8005d86: 68fb ldr r3, [r7, #12]
8005d88: 681b ldr r3, [r3, #0]
8005d8a: 62fb str r3, [r7, #44] @ 0x2c
8005d8c: 68fb ldr r3, [r7, #12]
8005d8e: 681b ldr r3, [r3, #0]
8005d90: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005d94: b29b uxth r3, r3
8005d96: 461a mov r2, r3
8005d98: 6afb ldr r3, [r7, #44] @ 0x2c
8005d9a: 4413 add r3, r2
8005d9c: 62fb str r3, [r7, #44] @ 0x2c
8005d9e: 68bb ldr r3, [r7, #8]
8005da0: 781b ldrb r3, [r3, #0]
8005da2: 011a lsls r2, r3, #4
8005da4: 6afb ldr r3, [r7, #44] @ 0x2c
8005da6: 4413 add r3, r2
8005da8: f203 4304 addw r3, r3, #1028 @ 0x404
8005dac: 62bb str r3, [r7, #40] @ 0x28
8005dae: 6abb ldr r3, [r7, #40] @ 0x28
8005db0: 881b ldrh r3, [r3, #0]
8005db2: b29b uxth r3, r3
8005db4: f3c3 0309 ubfx r3, r3, #0, #10
8005db8: b29a uxth r2, r3
8005dba: 6abb ldr r3, [r7, #40] @ 0x28
8005dbc: 801a strh r2, [r3, #0]
8005dbe: 6abb ldr r3, [r7, #40] @ 0x28
8005dc0: 881b ldrh r3, [r3, #0]
8005dc2: b29b uxth r3, r3
8005dc4: ea6f 4343 mvn.w r3, r3, lsl #17
8005dc8: ea6f 4353 mvn.w r3, r3, lsr #17
8005dcc: b29a uxth r2, r3
8005dce: 6abb ldr r3, [r7, #40] @ 0x28
8005dd0: 801a strh r2, [r3, #0]
8005dd2: e01a b.n 8005e0a <HAL_PCD_EP_DB_Transmit+0xfe>
8005dd4: 68bb ldr r3, [r7, #8]
8005dd6: 785b ldrb r3, [r3, #1]
8005dd8: 2b01 cmp r3, #1
8005dda: d116 bne.n 8005e0a <HAL_PCD_EP_DB_Transmit+0xfe>
8005ddc: 68fb ldr r3, [r7, #12]
8005dde: 681b ldr r3, [r3, #0]
8005de0: 637b str r3, [r7, #52] @ 0x34
8005de2: 68fb ldr r3, [r7, #12]
8005de4: 681b ldr r3, [r3, #0]
8005de6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005dea: b29b uxth r3, r3
8005dec: 461a mov r2, r3
8005dee: 6b7b ldr r3, [r7, #52] @ 0x34
8005df0: 4413 add r3, r2
8005df2: 637b str r3, [r7, #52] @ 0x34
8005df4: 68bb ldr r3, [r7, #8]
8005df6: 781b ldrb r3, [r3, #0]
8005df8: 011a lsls r2, r3, #4
8005dfa: 6b7b ldr r3, [r7, #52] @ 0x34
8005dfc: 4413 add r3, r2
8005dfe: f203 4304 addw r3, r3, #1028 @ 0x404
8005e02: 633b str r3, [r7, #48] @ 0x30
8005e04: 6b3b ldr r3, [r7, #48] @ 0x30
8005e06: 2200 movs r2, #0
8005e08: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8005e0a: 68fb ldr r3, [r7, #12]
8005e0c: 681b ldr r3, [r3, #0]
8005e0e: 627b str r3, [r7, #36] @ 0x24
8005e10: 68bb ldr r3, [r7, #8]
8005e12: 785b ldrb r3, [r3, #1]
8005e14: 2b00 cmp r3, #0
8005e16: d126 bne.n 8005e66 <HAL_PCD_EP_DB_Transmit+0x15a>
8005e18: 68fb ldr r3, [r7, #12]
8005e1a: 681b ldr r3, [r3, #0]
8005e1c: 61fb str r3, [r7, #28]
8005e1e: 68fb ldr r3, [r7, #12]
8005e20: 681b ldr r3, [r3, #0]
8005e22: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005e26: b29b uxth r3, r3
8005e28: 461a mov r2, r3
8005e2a: 69fb ldr r3, [r7, #28]
8005e2c: 4413 add r3, r2
8005e2e: 61fb str r3, [r7, #28]
8005e30: 68bb ldr r3, [r7, #8]
8005e32: 781b ldrb r3, [r3, #0]
8005e34: 011a lsls r2, r3, #4
8005e36: 69fb ldr r3, [r7, #28]
8005e38: 4413 add r3, r2
8005e3a: f203 430c addw r3, r3, #1036 @ 0x40c
8005e3e: 61bb str r3, [r7, #24]
8005e40: 69bb ldr r3, [r7, #24]
8005e42: 881b ldrh r3, [r3, #0]
8005e44: b29b uxth r3, r3
8005e46: f3c3 0309 ubfx r3, r3, #0, #10
8005e4a: b29a uxth r2, r3
8005e4c: 69bb ldr r3, [r7, #24]
8005e4e: 801a strh r2, [r3, #0]
8005e50: 69bb ldr r3, [r7, #24]
8005e52: 881b ldrh r3, [r3, #0]
8005e54: b29b uxth r3, r3
8005e56: ea6f 4343 mvn.w r3, r3, lsl #17
8005e5a: ea6f 4353 mvn.w r3, r3, lsr #17
8005e5e: b29a uxth r2, r3
8005e60: 69bb ldr r3, [r7, #24]
8005e62: 801a strh r2, [r3, #0]
8005e64: e017 b.n 8005e96 <HAL_PCD_EP_DB_Transmit+0x18a>
8005e66: 68bb ldr r3, [r7, #8]
8005e68: 785b ldrb r3, [r3, #1]
8005e6a: 2b01 cmp r3, #1
8005e6c: d113 bne.n 8005e96 <HAL_PCD_EP_DB_Transmit+0x18a>
8005e6e: 68fb ldr r3, [r7, #12]
8005e70: 681b ldr r3, [r3, #0]
8005e72: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005e76: b29b uxth r3, r3
8005e78: 461a mov r2, r3
8005e7a: 6a7b ldr r3, [r7, #36] @ 0x24
8005e7c: 4413 add r3, r2
8005e7e: 627b str r3, [r7, #36] @ 0x24
8005e80: 68bb ldr r3, [r7, #8]
8005e82: 781b ldrb r3, [r3, #0]
8005e84: 011a lsls r2, r3, #4
8005e86: 6a7b ldr r3, [r7, #36] @ 0x24
8005e88: 4413 add r3, r2
8005e8a: f203 430c addw r3, r3, #1036 @ 0x40c
8005e8e: 623b str r3, [r7, #32]
8005e90: 6a3b ldr r3, [r7, #32]
8005e92: 2200 movs r2, #0
8005e94: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8005e96: 68bb ldr r3, [r7, #8]
8005e98: 781b ldrb r3, [r3, #0]
8005e9a: 4619 mov r1, r3
8005e9c: 68f8 ldr r0, [r7, #12]
8005e9e: f006 f94a bl 800c136 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8005ea2: 88fb ldrh r3, [r7, #6]
8005ea4: f403 4380 and.w r3, r3, #16384 @ 0x4000
8005ea8: 2b00 cmp r3, #0
8005eaa: f000 82fc beq.w 80064a6 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8005eae: 68fb ldr r3, [r7, #12]
8005eb0: 681b ldr r3, [r3, #0]
8005eb2: 461a mov r2, r3
8005eb4: 68bb ldr r3, [r7, #8]
8005eb6: 781b ldrb r3, [r3, #0]
8005eb8: 009b lsls r3, r3, #2
8005eba: 4413 add r3, r2
8005ebc: 881b ldrh r3, [r3, #0]
8005ebe: b29b uxth r3, r3
8005ec0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005ec4: f023 0370 bic.w r3, r3, #112 @ 0x70
8005ec8: 82fb strh r3, [r7, #22]
8005eca: 68fb ldr r3, [r7, #12]
8005ecc: 681b ldr r3, [r3, #0]
8005ece: 461a mov r2, r3
8005ed0: 68bb ldr r3, [r7, #8]
8005ed2: 781b ldrb r3, [r3, #0]
8005ed4: 009b lsls r3, r3, #2
8005ed6: 441a add r2, r3
8005ed8: 8afb ldrh r3, [r7, #22]
8005eda: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005ede: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005ee2: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8005ee6: f043 0380 orr.w r3, r3, #128 @ 0x80
8005eea: b29b uxth r3, r3
8005eec: 8013 strh r3, [r2, #0]
8005eee: e2da b.n 80064a6 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8005ef0: 88fb ldrh r3, [r7, #6]
8005ef2: f403 4380 and.w r3, r3, #16384 @ 0x4000
8005ef6: 2b00 cmp r3, #0
8005ef8: d021 beq.n 8005f3e <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8005efa: 68fb ldr r3, [r7, #12]
8005efc: 681b ldr r3, [r3, #0]
8005efe: 461a mov r2, r3
8005f00: 68bb ldr r3, [r7, #8]
8005f02: 781b ldrb r3, [r3, #0]
8005f04: 009b lsls r3, r3, #2
8005f06: 4413 add r3, r2
8005f08: 881b ldrh r3, [r3, #0]
8005f0a: b29b uxth r3, r3
8005f0c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005f10: f023 0370 bic.w r3, r3, #112 @ 0x70
8005f14: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8005f18: 68fb ldr r3, [r7, #12]
8005f1a: 681b ldr r3, [r3, #0]
8005f1c: 461a mov r2, r3
8005f1e: 68bb ldr r3, [r7, #8]
8005f20: 781b ldrb r3, [r3, #0]
8005f22: 009b lsls r3, r3, #2
8005f24: 441a add r2, r3
8005f26: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8005f2a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005f2e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005f32: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8005f36: f043 0380 orr.w r3, r3, #128 @ 0x80
8005f3a: b29b uxth r3, r3
8005f3c: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8005f3e: 68bb ldr r3, [r7, #8]
8005f40: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8005f44: 2b01 cmp r3, #1
8005f46: f040 82ae bne.w 80064a6 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8005f4a: 68bb ldr r3, [r7, #8]
8005f4c: 695a ldr r2, [r3, #20]
8005f4e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8005f52: 441a add r2, r3
8005f54: 68bb ldr r3, [r7, #8]
8005f56: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8005f58: 68bb ldr r3, [r7, #8]
8005f5a: 69da ldr r2, [r3, #28]
8005f5c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8005f60: 441a add r2, r3
8005f62: 68bb ldr r3, [r7, #8]
8005f64: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8005f66: 68bb ldr r3, [r7, #8]
8005f68: 6a1a ldr r2, [r3, #32]
8005f6a: 68bb ldr r3, [r7, #8]
8005f6c: 691b ldr r3, [r3, #16]
8005f6e: 429a cmp r2, r3
8005f70: d30b bcc.n 8005f8a <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8005f72: 68bb ldr r3, [r7, #8]
8005f74: 691b ldr r3, [r3, #16]
8005f76: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8005f7a: 68bb ldr r3, [r7, #8]
8005f7c: 6a1a ldr r2, [r3, #32]
8005f7e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005f82: 1ad2 subs r2, r2, r3
8005f84: 68bb ldr r3, [r7, #8]
8005f86: 621a str r2, [r3, #32]
8005f88: e017 b.n 8005fba <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8005f8a: 68bb ldr r3, [r7, #8]
8005f8c: 6a1b ldr r3, [r3, #32]
8005f8e: 2b00 cmp r3, #0
8005f90: d108 bne.n 8005fa4 <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8005f92: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8005f96: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8005f9a: 68bb ldr r3, [r7, #8]
8005f9c: 2200 movs r2, #0
8005f9e: f883 2024 strb.w r2, [r3, #36] @ 0x24
8005fa2: e00a b.n 8005fba <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8005fa4: 68bb ldr r3, [r7, #8]
8005fa6: 2200 movs r2, #0
8005fa8: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8005fac: 68bb ldr r3, [r7, #8]
8005fae: 6a1b ldr r3, [r3, #32]
8005fb0: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8005fb4: 68bb ldr r3, [r7, #8]
8005fb6: 2200 movs r2, #0
8005fb8: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8005fba: 68bb ldr r3, [r7, #8]
8005fbc: 785b ldrb r3, [r3, #1]
8005fbe: 2b00 cmp r3, #0
8005fc0: d165 bne.n 800608e <HAL_PCD_EP_DB_Transmit+0x382>
8005fc2: 68fb ldr r3, [r7, #12]
8005fc4: 681b ldr r3, [r3, #0]
8005fc6: 63fb str r3, [r7, #60] @ 0x3c
8005fc8: 68fb ldr r3, [r7, #12]
8005fca: 681b ldr r3, [r3, #0]
8005fcc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005fd0: b29b uxth r3, r3
8005fd2: 461a mov r2, r3
8005fd4: 6bfb ldr r3, [r7, #60] @ 0x3c
8005fd6: 4413 add r3, r2
8005fd8: 63fb str r3, [r7, #60] @ 0x3c
8005fda: 68bb ldr r3, [r7, #8]
8005fdc: 781b ldrb r3, [r3, #0]
8005fde: 011a lsls r2, r3, #4
8005fe0: 6bfb ldr r3, [r7, #60] @ 0x3c
8005fe2: 4413 add r3, r2
8005fe4: f203 4304 addw r3, r3, #1028 @ 0x404
8005fe8: 63bb str r3, [r7, #56] @ 0x38
8005fea: 6bbb ldr r3, [r7, #56] @ 0x38
8005fec: 881b ldrh r3, [r3, #0]
8005fee: b29b uxth r3, r3
8005ff0: f3c3 0309 ubfx r3, r3, #0, #10
8005ff4: b29a uxth r2, r3
8005ff6: 6bbb ldr r3, [r7, #56] @ 0x38
8005ff8: 801a strh r2, [r3, #0]
8005ffa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005ffe: 2b3e cmp r3, #62 @ 0x3e
8006000: d91d bls.n 800603e <HAL_PCD_EP_DB_Transmit+0x332>
8006002: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006006: 095b lsrs r3, r3, #5
8006008: 64bb str r3, [r7, #72] @ 0x48
800600a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800600e: f003 031f and.w r3, r3, #31
8006012: 2b00 cmp r3, #0
8006014: d102 bne.n 800601c <HAL_PCD_EP_DB_Transmit+0x310>
8006016: 6cbb ldr r3, [r7, #72] @ 0x48
8006018: 3b01 subs r3, #1
800601a: 64bb str r3, [r7, #72] @ 0x48
800601c: 6bbb ldr r3, [r7, #56] @ 0x38
800601e: 881b ldrh r3, [r3, #0]
8006020: b29a uxth r2, r3
8006022: 6cbb ldr r3, [r7, #72] @ 0x48
8006024: b29b uxth r3, r3
8006026: 029b lsls r3, r3, #10
8006028: b29b uxth r3, r3
800602a: 4313 orrs r3, r2
800602c: b29b uxth r3, r3
800602e: ea6f 4343 mvn.w r3, r3, lsl #17
8006032: ea6f 4353 mvn.w r3, r3, lsr #17
8006036: b29a uxth r2, r3
8006038: 6bbb ldr r3, [r7, #56] @ 0x38
800603a: 801a strh r2, [r3, #0]
800603c: e044 b.n 80060c8 <HAL_PCD_EP_DB_Transmit+0x3bc>
800603e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006042: 2b00 cmp r3, #0
8006044: d10a bne.n 800605c <HAL_PCD_EP_DB_Transmit+0x350>
8006046: 6bbb ldr r3, [r7, #56] @ 0x38
8006048: 881b ldrh r3, [r3, #0]
800604a: b29b uxth r3, r3
800604c: ea6f 4343 mvn.w r3, r3, lsl #17
8006050: ea6f 4353 mvn.w r3, r3, lsr #17
8006054: b29a uxth r2, r3
8006056: 6bbb ldr r3, [r7, #56] @ 0x38
8006058: 801a strh r2, [r3, #0]
800605a: e035 b.n 80060c8 <HAL_PCD_EP_DB_Transmit+0x3bc>
800605c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006060: 085b lsrs r3, r3, #1
8006062: 64bb str r3, [r7, #72] @ 0x48
8006064: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006068: f003 0301 and.w r3, r3, #1
800606c: 2b00 cmp r3, #0
800606e: d002 beq.n 8006076 <HAL_PCD_EP_DB_Transmit+0x36a>
8006070: 6cbb ldr r3, [r7, #72] @ 0x48
8006072: 3301 adds r3, #1
8006074: 64bb str r3, [r7, #72] @ 0x48
8006076: 6bbb ldr r3, [r7, #56] @ 0x38
8006078: 881b ldrh r3, [r3, #0]
800607a: b29a uxth r2, r3
800607c: 6cbb ldr r3, [r7, #72] @ 0x48
800607e: b29b uxth r3, r3
8006080: 029b lsls r3, r3, #10
8006082: b29b uxth r3, r3
8006084: 4313 orrs r3, r2
8006086: b29a uxth r2, r3
8006088: 6bbb ldr r3, [r7, #56] @ 0x38
800608a: 801a strh r2, [r3, #0]
800608c: e01c b.n 80060c8 <HAL_PCD_EP_DB_Transmit+0x3bc>
800608e: 68bb ldr r3, [r7, #8]
8006090: 785b ldrb r3, [r3, #1]
8006092: 2b01 cmp r3, #1
8006094: d118 bne.n 80060c8 <HAL_PCD_EP_DB_Transmit+0x3bc>
8006096: 68fb ldr r3, [r7, #12]
8006098: 681b ldr r3, [r3, #0]
800609a: 647b str r3, [r7, #68] @ 0x44
800609c: 68fb ldr r3, [r7, #12]
800609e: 681b ldr r3, [r3, #0]
80060a0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80060a4: b29b uxth r3, r3
80060a6: 461a mov r2, r3
80060a8: 6c7b ldr r3, [r7, #68] @ 0x44
80060aa: 4413 add r3, r2
80060ac: 647b str r3, [r7, #68] @ 0x44
80060ae: 68bb ldr r3, [r7, #8]
80060b0: 781b ldrb r3, [r3, #0]
80060b2: 011a lsls r2, r3, #4
80060b4: 6c7b ldr r3, [r7, #68] @ 0x44
80060b6: 4413 add r3, r2
80060b8: f203 4304 addw r3, r3, #1028 @ 0x404
80060bc: 643b str r3, [r7, #64] @ 0x40
80060be: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80060c2: b29a uxth r2, r3
80060c4: 6c3b ldr r3, [r7, #64] @ 0x40
80060c6: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
80060c8: 68fb ldr r3, [r7, #12]
80060ca: 6818 ldr r0, [r3, #0]
80060cc: 68bb ldr r3, [r7, #8]
80060ce: 6959 ldr r1, [r3, #20]
80060d0: 68bb ldr r3, [r7, #8]
80060d2: 891a ldrh r2, [r3, #8]
80060d4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80060d8: b29b uxth r3, r3
80060da: f004 f968 bl 800a3ae <USB_WritePMA>
80060de: e1e2 b.n 80064a6 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80060e0: 68fb ldr r3, [r7, #12]
80060e2: 681b ldr r3, [r3, #0]
80060e4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80060e8: b29b uxth r3, r3
80060ea: 461a mov r2, r3
80060ec: 68bb ldr r3, [r7, #8]
80060ee: 781b ldrb r3, [r3, #0]
80060f0: 00db lsls r3, r3, #3
80060f2: 4413 add r3, r2
80060f4: 3306 adds r3, #6
80060f6: 005b lsls r3, r3, #1
80060f8: 68fa ldr r2, [r7, #12]
80060fa: 6812 ldr r2, [r2, #0]
80060fc: 4413 add r3, r2
80060fe: f503 6380 add.w r3, r3, #1024 @ 0x400
8006102: 881b ldrh r3, [r3, #0]
8006104: f3c3 0309 ubfx r3, r3, #0, #10
8006108: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
800610c: 68bb ldr r3, [r7, #8]
800610e: 699a ldr r2, [r3, #24]
8006110: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8006114: 429a cmp r2, r3
8006116: d307 bcc.n 8006128 <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8006118: 68bb ldr r3, [r7, #8]
800611a: 699a ldr r2, [r3, #24]
800611c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8006120: 1ad2 subs r2, r2, r3
8006122: 68bb ldr r3, [r7, #8]
8006124: 619a str r2, [r3, #24]
8006126: e002 b.n 800612e <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8006128: 68bb ldr r3, [r7, #8]
800612a: 2200 movs r2, #0
800612c: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
800612e: 68bb ldr r3, [r7, #8]
8006130: 699b ldr r3, [r3, #24]
8006132: 2b00 cmp r3, #0
8006134: f040 80c0 bne.w 80062b8 <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8006138: 68bb ldr r3, [r7, #8]
800613a: 785b ldrb r3, [r3, #1]
800613c: 2b00 cmp r3, #0
800613e: d126 bne.n 800618e <HAL_PCD_EP_DB_Transmit+0x482>
8006140: 68fb ldr r3, [r7, #12]
8006142: 681b ldr r3, [r3, #0]
8006144: 67fb str r3, [r7, #124] @ 0x7c
8006146: 68fb ldr r3, [r7, #12]
8006148: 681b ldr r3, [r3, #0]
800614a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800614e: b29b uxth r3, r3
8006150: 461a mov r2, r3
8006152: 6ffb ldr r3, [r7, #124] @ 0x7c
8006154: 4413 add r3, r2
8006156: 67fb str r3, [r7, #124] @ 0x7c
8006158: 68bb ldr r3, [r7, #8]
800615a: 781b ldrb r3, [r3, #0]
800615c: 011a lsls r2, r3, #4
800615e: 6ffb ldr r3, [r7, #124] @ 0x7c
8006160: 4413 add r3, r2
8006162: f203 4304 addw r3, r3, #1028 @ 0x404
8006166: 67bb str r3, [r7, #120] @ 0x78
8006168: 6fbb ldr r3, [r7, #120] @ 0x78
800616a: 881b ldrh r3, [r3, #0]
800616c: b29b uxth r3, r3
800616e: f3c3 0309 ubfx r3, r3, #0, #10
8006172: b29a uxth r2, r3
8006174: 6fbb ldr r3, [r7, #120] @ 0x78
8006176: 801a strh r2, [r3, #0]
8006178: 6fbb ldr r3, [r7, #120] @ 0x78
800617a: 881b ldrh r3, [r3, #0]
800617c: b29b uxth r3, r3
800617e: ea6f 4343 mvn.w r3, r3, lsl #17
8006182: ea6f 4353 mvn.w r3, r3, lsr #17
8006186: b29a uxth r2, r3
8006188: 6fbb ldr r3, [r7, #120] @ 0x78
800618a: 801a strh r2, [r3, #0]
800618c: e01a b.n 80061c4 <HAL_PCD_EP_DB_Transmit+0x4b8>
800618e: 68bb ldr r3, [r7, #8]
8006190: 785b ldrb r3, [r3, #1]
8006192: 2b01 cmp r3, #1
8006194: d116 bne.n 80061c4 <HAL_PCD_EP_DB_Transmit+0x4b8>
8006196: 68fb ldr r3, [r7, #12]
8006198: 681b ldr r3, [r3, #0]
800619a: 667b str r3, [r7, #100] @ 0x64
800619c: 68fb ldr r3, [r7, #12]
800619e: 681b ldr r3, [r3, #0]
80061a0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80061a4: b29b uxth r3, r3
80061a6: 461a mov r2, r3
80061a8: 6e7b ldr r3, [r7, #100] @ 0x64
80061aa: 4413 add r3, r2
80061ac: 667b str r3, [r7, #100] @ 0x64
80061ae: 68bb ldr r3, [r7, #8]
80061b0: 781b ldrb r3, [r3, #0]
80061b2: 011a lsls r2, r3, #4
80061b4: 6e7b ldr r3, [r7, #100] @ 0x64
80061b6: 4413 add r3, r2
80061b8: f203 4304 addw r3, r3, #1028 @ 0x404
80061bc: 663b str r3, [r7, #96] @ 0x60
80061be: 6e3b ldr r3, [r7, #96] @ 0x60
80061c0: 2200 movs r2, #0
80061c2: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80061c4: 68fb ldr r3, [r7, #12]
80061c6: 681b ldr r3, [r3, #0]
80061c8: 677b str r3, [r7, #116] @ 0x74
80061ca: 68bb ldr r3, [r7, #8]
80061cc: 785b ldrb r3, [r3, #1]
80061ce: 2b00 cmp r3, #0
80061d0: d12b bne.n 800622a <HAL_PCD_EP_DB_Transmit+0x51e>
80061d2: 68fb ldr r3, [r7, #12]
80061d4: 681b ldr r3, [r3, #0]
80061d6: 66fb str r3, [r7, #108] @ 0x6c
80061d8: 68fb ldr r3, [r7, #12]
80061da: 681b ldr r3, [r3, #0]
80061dc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80061e0: b29b uxth r3, r3
80061e2: 461a mov r2, r3
80061e4: 6efb ldr r3, [r7, #108] @ 0x6c
80061e6: 4413 add r3, r2
80061e8: 66fb str r3, [r7, #108] @ 0x6c
80061ea: 68bb ldr r3, [r7, #8]
80061ec: 781b ldrb r3, [r3, #0]
80061ee: 011a lsls r2, r3, #4
80061f0: 6efb ldr r3, [r7, #108] @ 0x6c
80061f2: 4413 add r3, r2
80061f4: f203 430c addw r3, r3, #1036 @ 0x40c
80061f8: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80061fc: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8006200: 881b ldrh r3, [r3, #0]
8006202: b29b uxth r3, r3
8006204: f3c3 0309 ubfx r3, r3, #0, #10
8006208: b29a uxth r2, r3
800620a: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800620e: 801a strh r2, [r3, #0]
8006210: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8006214: 881b ldrh r3, [r3, #0]
8006216: b29b uxth r3, r3
8006218: ea6f 4343 mvn.w r3, r3, lsl #17
800621c: ea6f 4353 mvn.w r3, r3, lsr #17
8006220: b29a uxth r2, r3
8006222: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8006226: 801a strh r2, [r3, #0]
8006228: e017 b.n 800625a <HAL_PCD_EP_DB_Transmit+0x54e>
800622a: 68bb ldr r3, [r7, #8]
800622c: 785b ldrb r3, [r3, #1]
800622e: 2b01 cmp r3, #1
8006230: d113 bne.n 800625a <HAL_PCD_EP_DB_Transmit+0x54e>
8006232: 68fb ldr r3, [r7, #12]
8006234: 681b ldr r3, [r3, #0]
8006236: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800623a: b29b uxth r3, r3
800623c: 461a mov r2, r3
800623e: 6f7b ldr r3, [r7, #116] @ 0x74
8006240: 4413 add r3, r2
8006242: 677b str r3, [r7, #116] @ 0x74
8006244: 68bb ldr r3, [r7, #8]
8006246: 781b ldrb r3, [r3, #0]
8006248: 011a lsls r2, r3, #4
800624a: 6f7b ldr r3, [r7, #116] @ 0x74
800624c: 4413 add r3, r2
800624e: f203 430c addw r3, r3, #1036 @ 0x40c
8006252: 673b str r3, [r7, #112] @ 0x70
8006254: 6f3b ldr r3, [r7, #112] @ 0x70
8006256: 2200 movs r2, #0
8006258: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
800625a: 68bb ldr r3, [r7, #8]
800625c: 781b ldrb r3, [r3, #0]
800625e: 4619 mov r1, r3
8006260: 68f8 ldr r0, [r7, #12]
8006262: f005 ff68 bl 800c136 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8006266: 88fb ldrh r3, [r7, #6]
8006268: f403 4380 and.w r3, r3, #16384 @ 0x4000
800626c: 2b00 cmp r3, #0
800626e: f040 811a bne.w 80064a6 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8006272: 68fb ldr r3, [r7, #12]
8006274: 681b ldr r3, [r3, #0]
8006276: 461a mov r2, r3
8006278: 68bb ldr r3, [r7, #8]
800627a: 781b ldrb r3, [r3, #0]
800627c: 009b lsls r3, r3, #2
800627e: 4413 add r3, r2
8006280: 881b ldrh r3, [r3, #0]
8006282: b29b uxth r3, r3
8006284: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006288: f023 0370 bic.w r3, r3, #112 @ 0x70
800628c: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8006290: 68fb ldr r3, [r7, #12]
8006292: 681b ldr r3, [r3, #0]
8006294: 461a mov r2, r3
8006296: 68bb ldr r3, [r7, #8]
8006298: 781b ldrb r3, [r3, #0]
800629a: 009b lsls r3, r3, #2
800629c: 441a add r2, r3
800629e: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
80062a2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80062a6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80062aa: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80062ae: f043 0380 orr.w r3, r3, #128 @ 0x80
80062b2: b29b uxth r3, r3
80062b4: 8013 strh r3, [r2, #0]
80062b6: e0f6 b.n 80064a6 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
80062b8: 88fb ldrh r3, [r7, #6]
80062ba: f403 4380 and.w r3, r3, #16384 @ 0x4000
80062be: 2b00 cmp r3, #0
80062c0: d121 bne.n 8006306 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
80062c2: 68fb ldr r3, [r7, #12]
80062c4: 681b ldr r3, [r3, #0]
80062c6: 461a mov r2, r3
80062c8: 68bb ldr r3, [r7, #8]
80062ca: 781b ldrb r3, [r3, #0]
80062cc: 009b lsls r3, r3, #2
80062ce: 4413 add r3, r2
80062d0: 881b ldrh r3, [r3, #0]
80062d2: b29b uxth r3, r3
80062d4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80062d8: f023 0370 bic.w r3, r3, #112 @ 0x70
80062dc: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
80062e0: 68fb ldr r3, [r7, #12]
80062e2: 681b ldr r3, [r3, #0]
80062e4: 461a mov r2, r3
80062e6: 68bb ldr r3, [r7, #8]
80062e8: 781b ldrb r3, [r3, #0]
80062ea: 009b lsls r3, r3, #2
80062ec: 441a add r2, r3
80062ee: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80062f2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80062f6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80062fa: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80062fe: f043 0380 orr.w r3, r3, #128 @ 0x80
8006302: b29b uxth r3, r3
8006304: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8006306: 68bb ldr r3, [r7, #8]
8006308: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
800630c: 2b01 cmp r3, #1
800630e: f040 80ca bne.w 80064a6 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8006312: 68bb ldr r3, [r7, #8]
8006314: 695a ldr r2, [r3, #20]
8006316: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800631a: 441a add r2, r3
800631c: 68bb ldr r3, [r7, #8]
800631e: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8006320: 68bb ldr r3, [r7, #8]
8006322: 69da ldr r2, [r3, #28]
8006324: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8006328: 441a add r2, r3
800632a: 68bb ldr r3, [r7, #8]
800632c: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
800632e: 68bb ldr r3, [r7, #8]
8006330: 6a1a ldr r2, [r3, #32]
8006332: 68bb ldr r3, [r7, #8]
8006334: 691b ldr r3, [r3, #16]
8006336: 429a cmp r2, r3
8006338: d30b bcc.n 8006352 <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
800633a: 68bb ldr r3, [r7, #8]
800633c: 691b ldr r3, [r3, #16]
800633e: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8006342: 68bb ldr r3, [r7, #8]
8006344: 6a1a ldr r2, [r3, #32]
8006346: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800634a: 1ad2 subs r2, r2, r3
800634c: 68bb ldr r3, [r7, #8]
800634e: 621a str r2, [r3, #32]
8006350: e017 b.n 8006382 <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
8006352: 68bb ldr r3, [r7, #8]
8006354: 6a1b ldr r3, [r3, #32]
8006356: 2b00 cmp r3, #0
8006358: d108 bne.n 800636c <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
800635a: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800635e: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8006362: 68bb ldr r3, [r7, #8]
8006364: 2200 movs r2, #0
8006366: f883 2024 strb.w r2, [r3, #36] @ 0x24
800636a: e00a b.n 8006382 <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
800636c: 68bb ldr r3, [r7, #8]
800636e: 6a1b ldr r3, [r3, #32]
8006370: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8006374: 68bb ldr r3, [r7, #8]
8006376: 2200 movs r2, #0
8006378: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
800637a: 68bb ldr r3, [r7, #8]
800637c: 2200 movs r2, #0
800637e: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8006382: 68fb ldr r3, [r7, #12]
8006384: 681b ldr r3, [r3, #0]
8006386: 657b str r3, [r7, #84] @ 0x54
8006388: 68bb ldr r3, [r7, #8]
800638a: 785b ldrb r3, [r3, #1]
800638c: 2b00 cmp r3, #0
800638e: d165 bne.n 800645c <HAL_PCD_EP_DB_Transmit+0x750>
8006390: 68fb ldr r3, [r7, #12]
8006392: 681b ldr r3, [r3, #0]
8006394: 65fb str r3, [r7, #92] @ 0x5c
8006396: 68fb ldr r3, [r7, #12]
8006398: 681b ldr r3, [r3, #0]
800639a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800639e: b29b uxth r3, r3
80063a0: 461a mov r2, r3
80063a2: 6dfb ldr r3, [r7, #92] @ 0x5c
80063a4: 4413 add r3, r2
80063a6: 65fb str r3, [r7, #92] @ 0x5c
80063a8: 68bb ldr r3, [r7, #8]
80063aa: 781b ldrb r3, [r3, #0]
80063ac: 011a lsls r2, r3, #4
80063ae: 6dfb ldr r3, [r7, #92] @ 0x5c
80063b0: 4413 add r3, r2
80063b2: f203 430c addw r3, r3, #1036 @ 0x40c
80063b6: 65bb str r3, [r7, #88] @ 0x58
80063b8: 6dbb ldr r3, [r7, #88] @ 0x58
80063ba: 881b ldrh r3, [r3, #0]
80063bc: b29b uxth r3, r3
80063be: f3c3 0309 ubfx r3, r3, #0, #10
80063c2: b29a uxth r2, r3
80063c4: 6dbb ldr r3, [r7, #88] @ 0x58
80063c6: 801a strh r2, [r3, #0]
80063c8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80063cc: 2b3e cmp r3, #62 @ 0x3e
80063ce: d91d bls.n 800640c <HAL_PCD_EP_DB_Transmit+0x700>
80063d0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80063d4: 095b lsrs r3, r3, #5
80063d6: 66bb str r3, [r7, #104] @ 0x68
80063d8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80063dc: f003 031f and.w r3, r3, #31
80063e0: 2b00 cmp r3, #0
80063e2: d102 bne.n 80063ea <HAL_PCD_EP_DB_Transmit+0x6de>
80063e4: 6ebb ldr r3, [r7, #104] @ 0x68
80063e6: 3b01 subs r3, #1
80063e8: 66bb str r3, [r7, #104] @ 0x68
80063ea: 6dbb ldr r3, [r7, #88] @ 0x58
80063ec: 881b ldrh r3, [r3, #0]
80063ee: b29a uxth r2, r3
80063f0: 6ebb ldr r3, [r7, #104] @ 0x68
80063f2: b29b uxth r3, r3
80063f4: 029b lsls r3, r3, #10
80063f6: b29b uxth r3, r3
80063f8: 4313 orrs r3, r2
80063fa: b29b uxth r3, r3
80063fc: ea6f 4343 mvn.w r3, r3, lsl #17
8006400: ea6f 4353 mvn.w r3, r3, lsr #17
8006404: b29a uxth r2, r3
8006406: 6dbb ldr r3, [r7, #88] @ 0x58
8006408: 801a strh r2, [r3, #0]
800640a: e041 b.n 8006490 <HAL_PCD_EP_DB_Transmit+0x784>
800640c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006410: 2b00 cmp r3, #0
8006412: d10a bne.n 800642a <HAL_PCD_EP_DB_Transmit+0x71e>
8006414: 6dbb ldr r3, [r7, #88] @ 0x58
8006416: 881b ldrh r3, [r3, #0]
8006418: b29b uxth r3, r3
800641a: ea6f 4343 mvn.w r3, r3, lsl #17
800641e: ea6f 4353 mvn.w r3, r3, lsr #17
8006422: b29a uxth r2, r3
8006424: 6dbb ldr r3, [r7, #88] @ 0x58
8006426: 801a strh r2, [r3, #0]
8006428: e032 b.n 8006490 <HAL_PCD_EP_DB_Transmit+0x784>
800642a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800642e: 085b lsrs r3, r3, #1
8006430: 66bb str r3, [r7, #104] @ 0x68
8006432: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006436: f003 0301 and.w r3, r3, #1
800643a: 2b00 cmp r3, #0
800643c: d002 beq.n 8006444 <HAL_PCD_EP_DB_Transmit+0x738>
800643e: 6ebb ldr r3, [r7, #104] @ 0x68
8006440: 3301 adds r3, #1
8006442: 66bb str r3, [r7, #104] @ 0x68
8006444: 6dbb ldr r3, [r7, #88] @ 0x58
8006446: 881b ldrh r3, [r3, #0]
8006448: b29a uxth r2, r3
800644a: 6ebb ldr r3, [r7, #104] @ 0x68
800644c: b29b uxth r3, r3
800644e: 029b lsls r3, r3, #10
8006450: b29b uxth r3, r3
8006452: 4313 orrs r3, r2
8006454: b29a uxth r2, r3
8006456: 6dbb ldr r3, [r7, #88] @ 0x58
8006458: 801a strh r2, [r3, #0]
800645a: e019 b.n 8006490 <HAL_PCD_EP_DB_Transmit+0x784>
800645c: 68bb ldr r3, [r7, #8]
800645e: 785b ldrb r3, [r3, #1]
8006460: 2b01 cmp r3, #1
8006462: d115 bne.n 8006490 <HAL_PCD_EP_DB_Transmit+0x784>
8006464: 68fb ldr r3, [r7, #12]
8006466: 681b ldr r3, [r3, #0]
8006468: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800646c: b29b uxth r3, r3
800646e: 461a mov r2, r3
8006470: 6d7b ldr r3, [r7, #84] @ 0x54
8006472: 4413 add r3, r2
8006474: 657b str r3, [r7, #84] @ 0x54
8006476: 68bb ldr r3, [r7, #8]
8006478: 781b ldrb r3, [r3, #0]
800647a: 011a lsls r2, r3, #4
800647c: 6d7b ldr r3, [r7, #84] @ 0x54
800647e: 4413 add r3, r2
8006480: f203 430c addw r3, r3, #1036 @ 0x40c
8006484: 653b str r3, [r7, #80] @ 0x50
8006486: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800648a: b29a uxth r2, r3
800648c: 6d3b ldr r3, [r7, #80] @ 0x50
800648e: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8006490: 68fb ldr r3, [r7, #12]
8006492: 6818 ldr r0, [r3, #0]
8006494: 68bb ldr r3, [r7, #8]
8006496: 6959 ldr r1, [r3, #20]
8006498: 68bb ldr r3, [r7, #8]
800649a: 895a ldrh r2, [r3, #10]
800649c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80064a0: b29b uxth r3, r3
80064a2: f003 ff84 bl 800a3ae <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
80064a6: 68fb ldr r3, [r7, #12]
80064a8: 681b ldr r3, [r3, #0]
80064aa: 461a mov r2, r3
80064ac: 68bb ldr r3, [r7, #8]
80064ae: 781b ldrb r3, [r3, #0]
80064b0: 009b lsls r3, r3, #2
80064b2: 4413 add r3, r2
80064b4: 881b ldrh r3, [r3, #0]
80064b6: b29b uxth r3, r3
80064b8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80064bc: f023 0340 bic.w r3, r3, #64 @ 0x40
80064c0: 82bb strh r3, [r7, #20]
80064c2: 8abb ldrh r3, [r7, #20]
80064c4: f083 0310 eor.w r3, r3, #16
80064c8: 82bb strh r3, [r7, #20]
80064ca: 8abb ldrh r3, [r7, #20]
80064cc: f083 0320 eor.w r3, r3, #32
80064d0: 82bb strh r3, [r7, #20]
80064d2: 68fb ldr r3, [r7, #12]
80064d4: 681b ldr r3, [r3, #0]
80064d6: 461a mov r2, r3
80064d8: 68bb ldr r3, [r7, #8]
80064da: 781b ldrb r3, [r3, #0]
80064dc: 009b lsls r3, r3, #2
80064de: 441a add r2, r3
80064e0: 8abb ldrh r3, [r7, #20]
80064e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80064e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80064ea: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80064ee: f043 0380 orr.w r3, r3, #128 @ 0x80
80064f2: b29b uxth r3, r3
80064f4: 8013 strh r3, [r2, #0]
return HAL_OK;
80064f6: 2300 movs r3, #0
}
80064f8: 4618 mov r0, r3
80064fa: 3790 adds r7, #144 @ 0x90
80064fc: 46bd mov sp, r7
80064fe: bd80 pop {r7, pc}
08006500 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8006500: b480 push {r7}
8006502: b087 sub sp, #28
8006504: af00 add r7, sp, #0
8006506: 60f8 str r0, [r7, #12]
8006508: 607b str r3, [r7, #4]
800650a: 460b mov r3, r1
800650c: 817b strh r3, [r7, #10]
800650e: 4613 mov r3, r2
8006510: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8006512: 897b ldrh r3, [r7, #10]
8006514: f003 0380 and.w r3, r3, #128 @ 0x80
8006518: b29b uxth r3, r3
800651a: 2b00 cmp r3, #0
800651c: d00b beq.n 8006536 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800651e: 897b ldrh r3, [r7, #10]
8006520: f003 0207 and.w r2, r3, #7
8006524: 4613 mov r3, r2
8006526: 009b lsls r3, r3, #2
8006528: 4413 add r3, r2
800652a: 00db lsls r3, r3, #3
800652c: 3310 adds r3, #16
800652e: 68fa ldr r2, [r7, #12]
8006530: 4413 add r3, r2
8006532: 617b str r3, [r7, #20]
8006534: e009 b.n 800654a <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8006536: 897a ldrh r2, [r7, #10]
8006538: 4613 mov r3, r2
800653a: 009b lsls r3, r3, #2
800653c: 4413 add r3, r2
800653e: 00db lsls r3, r3, #3
8006540: f503 73a8 add.w r3, r3, #336 @ 0x150
8006544: 68fa ldr r2, [r7, #12]
8006546: 4413 add r3, r2
8006548: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
800654a: 893b ldrh r3, [r7, #8]
800654c: 2b00 cmp r3, #0
800654e: d107 bne.n 8006560 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8006550: 697b ldr r3, [r7, #20]
8006552: 2200 movs r2, #0
8006554: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8006556: 687b ldr r3, [r7, #4]
8006558: b29a uxth r2, r3
800655a: 697b ldr r3, [r7, #20]
800655c: 80da strh r2, [r3, #6]
800655e: e00b b.n 8006578 <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8006560: 697b ldr r3, [r7, #20]
8006562: 2201 movs r2, #1
8006564: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8006566: 687b ldr r3, [r7, #4]
8006568: b29a uxth r2, r3
800656a: 697b ldr r3, [r7, #20]
800656c: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
800656e: 687b ldr r3, [r7, #4]
8006570: 0c1b lsrs r3, r3, #16
8006572: b29a uxth r2, r3
8006574: 697b ldr r3, [r7, #20]
8006576: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8006578: 2300 movs r3, #0
}
800657a: 4618 mov r0, r3
800657c: 371c adds r7, #28
800657e: 46bd mov sp, r7
8006580: bc80 pop {r7}
8006582: 4770 bx lr
08006584 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8006584: b580 push {r7, lr}
8006586: b086 sub sp, #24
8006588: af00 add r7, sp, #0
800658a: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
800658c: 687b ldr r3, [r7, #4]
800658e: 2b00 cmp r3, #0
8006590: d101 bne.n 8006596 <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8006592: 2301 movs r3, #1
8006594: e272 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8006596: 687b ldr r3, [r7, #4]
8006598: 681b ldr r3, [r3, #0]
800659a: f003 0301 and.w r3, r3, #1
800659e: 2b00 cmp r3, #0
80065a0: f000 8087 beq.w 80066b2 <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
80065a4: 4b92 ldr r3, [pc, #584] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80065a6: 685b ldr r3, [r3, #4]
80065a8: f003 030c and.w r3, r3, #12
80065ac: 2b04 cmp r3, #4
80065ae: d00c beq.n 80065ca <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
80065b0: 4b8f ldr r3, [pc, #572] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80065b2: 685b ldr r3, [r3, #4]
80065b4: f003 030c and.w r3, r3, #12
80065b8: 2b08 cmp r3, #8
80065ba: d112 bne.n 80065e2 <HAL_RCC_OscConfig+0x5e>
80065bc: 4b8c ldr r3, [pc, #560] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80065be: 685b ldr r3, [r3, #4]
80065c0: f403 3380 and.w r3, r3, #65536 @ 0x10000
80065c4: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80065c8: d10b bne.n 80065e2 <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80065ca: 4b89 ldr r3, [pc, #548] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80065cc: 681b ldr r3, [r3, #0]
80065ce: f403 3300 and.w r3, r3, #131072 @ 0x20000
80065d2: 2b00 cmp r3, #0
80065d4: d06c beq.n 80066b0 <HAL_RCC_OscConfig+0x12c>
80065d6: 687b ldr r3, [r7, #4]
80065d8: 685b ldr r3, [r3, #4]
80065da: 2b00 cmp r3, #0
80065dc: d168 bne.n 80066b0 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
80065de: 2301 movs r3, #1
80065e0: e24c b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
80065e2: 687b ldr r3, [r7, #4]
80065e4: 685b ldr r3, [r3, #4]
80065e6: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80065ea: d106 bne.n 80065fa <HAL_RCC_OscConfig+0x76>
80065ec: 4b80 ldr r3, [pc, #512] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80065ee: 681b ldr r3, [r3, #0]
80065f0: 4a7f ldr r2, [pc, #508] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80065f2: f443 3380 orr.w r3, r3, #65536 @ 0x10000
80065f6: 6013 str r3, [r2, #0]
80065f8: e02e b.n 8006658 <HAL_RCC_OscConfig+0xd4>
80065fa: 687b ldr r3, [r7, #4]
80065fc: 685b ldr r3, [r3, #4]
80065fe: 2b00 cmp r3, #0
8006600: d10c bne.n 800661c <HAL_RCC_OscConfig+0x98>
8006602: 4b7b ldr r3, [pc, #492] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006604: 681b ldr r3, [r3, #0]
8006606: 4a7a ldr r2, [pc, #488] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006608: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800660c: 6013 str r3, [r2, #0]
800660e: 4b78 ldr r3, [pc, #480] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006610: 681b ldr r3, [r3, #0]
8006612: 4a77 ldr r2, [pc, #476] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006614: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8006618: 6013 str r3, [r2, #0]
800661a: e01d b.n 8006658 <HAL_RCC_OscConfig+0xd4>
800661c: 687b ldr r3, [r7, #4]
800661e: 685b ldr r3, [r3, #4]
8006620: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
8006624: d10c bne.n 8006640 <HAL_RCC_OscConfig+0xbc>
8006626: 4b72 ldr r3, [pc, #456] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006628: 681b ldr r3, [r3, #0]
800662a: 4a71 ldr r2, [pc, #452] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
800662c: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8006630: 6013 str r3, [r2, #0]
8006632: 4b6f ldr r3, [pc, #444] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006634: 681b ldr r3, [r3, #0]
8006636: 4a6e ldr r2, [pc, #440] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006638: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800663c: 6013 str r3, [r2, #0]
800663e: e00b b.n 8006658 <HAL_RCC_OscConfig+0xd4>
8006640: 4b6b ldr r3, [pc, #428] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006642: 681b ldr r3, [r3, #0]
8006644: 4a6a ldr r2, [pc, #424] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006646: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800664a: 6013 str r3, [r2, #0]
800664c: 4b68 ldr r3, [pc, #416] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
800664e: 681b ldr r3, [r3, #0]
8006650: 4a67 ldr r2, [pc, #412] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006652: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8006656: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8006658: 687b ldr r3, [r7, #4]
800665a: 685b ldr r3, [r3, #4]
800665c: 2b00 cmp r3, #0
800665e: d013 beq.n 8006688 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8006660: f7fc ff8c bl 800357c <HAL_GetTick>
8006664: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8006666: e008 b.n 800667a <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8006668: f7fc ff88 bl 800357c <HAL_GetTick>
800666c: 4602 mov r2, r0
800666e: 693b ldr r3, [r7, #16]
8006670: 1ad3 subs r3, r2, r3
8006672: 2b64 cmp r3, #100 @ 0x64
8006674: d901 bls.n 800667a <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8006676: 2303 movs r3, #3
8006678: e200 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800667a: 4b5d ldr r3, [pc, #372] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
800667c: 681b ldr r3, [r3, #0]
800667e: f403 3300 and.w r3, r3, #131072 @ 0x20000
8006682: 2b00 cmp r3, #0
8006684: d0f0 beq.n 8006668 <HAL_RCC_OscConfig+0xe4>
8006686: e014 b.n 80066b2 <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8006688: f7fc ff78 bl 800357c <HAL_GetTick>
800668c: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
800668e: e008 b.n 80066a2 <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8006690: f7fc ff74 bl 800357c <HAL_GetTick>
8006694: 4602 mov r2, r0
8006696: 693b ldr r3, [r7, #16]
8006698: 1ad3 subs r3, r2, r3
800669a: 2b64 cmp r3, #100 @ 0x64
800669c: d901 bls.n 80066a2 <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
800669e: 2303 movs r3, #3
80066a0: e1ec b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80066a2: 4b53 ldr r3, [pc, #332] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80066a4: 681b ldr r3, [r3, #0]
80066a6: f403 3300 and.w r3, r3, #131072 @ 0x20000
80066aa: 2b00 cmp r3, #0
80066ac: d1f0 bne.n 8006690 <HAL_RCC_OscConfig+0x10c>
80066ae: e000 b.n 80066b2 <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80066b0: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
80066b2: 687b ldr r3, [r7, #4]
80066b4: 681b ldr r3, [r3, #0]
80066b6: f003 0302 and.w r3, r3, #2
80066ba: 2b00 cmp r3, #0
80066bc: d063 beq.n 8006786 <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
80066be: 4b4c ldr r3, [pc, #304] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80066c0: 685b ldr r3, [r3, #4]
80066c2: f003 030c and.w r3, r3, #12
80066c6: 2b00 cmp r3, #0
80066c8: d00b beq.n 80066e2 <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
80066ca: 4b49 ldr r3, [pc, #292] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80066cc: 685b ldr r3, [r3, #4]
80066ce: f003 030c and.w r3, r3, #12
80066d2: 2b08 cmp r3, #8
80066d4: d11c bne.n 8006710 <HAL_RCC_OscConfig+0x18c>
80066d6: 4b46 ldr r3, [pc, #280] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80066d8: 685b ldr r3, [r3, #4]
80066da: f403 3380 and.w r3, r3, #65536 @ 0x10000
80066de: 2b00 cmp r3, #0
80066e0: d116 bne.n 8006710 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
80066e2: 4b43 ldr r3, [pc, #268] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80066e4: 681b ldr r3, [r3, #0]
80066e6: f003 0302 and.w r3, r3, #2
80066ea: 2b00 cmp r3, #0
80066ec: d005 beq.n 80066fa <HAL_RCC_OscConfig+0x176>
80066ee: 687b ldr r3, [r7, #4]
80066f0: 691b ldr r3, [r3, #16]
80066f2: 2b01 cmp r3, #1
80066f4: d001 beq.n 80066fa <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
80066f6: 2301 movs r3, #1
80066f8: e1c0 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
80066fa: 4b3d ldr r3, [pc, #244] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80066fc: 681b ldr r3, [r3, #0]
80066fe: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8006702: 687b ldr r3, [r7, #4]
8006704: 695b ldr r3, [r3, #20]
8006706: 00db lsls r3, r3, #3
8006708: 4939 ldr r1, [pc, #228] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
800670a: 4313 orrs r3, r2
800670c: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
800670e: e03a b.n 8006786 <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8006710: 687b ldr r3, [r7, #4]
8006712: 691b ldr r3, [r3, #16]
8006714: 2b00 cmp r3, #0
8006716: d020 beq.n 800675a <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8006718: 4b36 ldr r3, [pc, #216] @ (80067f4 <HAL_RCC_OscConfig+0x270>)
800671a: 2201 movs r2, #1
800671c: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800671e: f7fc ff2d bl 800357c <HAL_GetTick>
8006722: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8006724: e008 b.n 8006738 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8006726: f7fc ff29 bl 800357c <HAL_GetTick>
800672a: 4602 mov r2, r0
800672c: 693b ldr r3, [r7, #16]
800672e: 1ad3 subs r3, r2, r3
8006730: 2b02 cmp r3, #2
8006732: d901 bls.n 8006738 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8006734: 2303 movs r3, #3
8006736: e1a1 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8006738: 4b2d ldr r3, [pc, #180] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
800673a: 681b ldr r3, [r3, #0]
800673c: f003 0302 and.w r3, r3, #2
8006740: 2b00 cmp r3, #0
8006742: d0f0 beq.n 8006726 <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8006744: 4b2a ldr r3, [pc, #168] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006746: 681b ldr r3, [r3, #0]
8006748: f023 02f8 bic.w r2, r3, #248 @ 0xf8
800674c: 687b ldr r3, [r7, #4]
800674e: 695b ldr r3, [r3, #20]
8006750: 00db lsls r3, r3, #3
8006752: 4927 ldr r1, [pc, #156] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
8006754: 4313 orrs r3, r2
8006756: 600b str r3, [r1, #0]
8006758: e015 b.n 8006786 <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
800675a: 4b26 ldr r3, [pc, #152] @ (80067f4 <HAL_RCC_OscConfig+0x270>)
800675c: 2200 movs r2, #0
800675e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8006760: f7fc ff0c bl 800357c <HAL_GetTick>
8006764: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8006766: e008 b.n 800677a <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8006768: f7fc ff08 bl 800357c <HAL_GetTick>
800676c: 4602 mov r2, r0
800676e: 693b ldr r3, [r7, #16]
8006770: 1ad3 subs r3, r2, r3
8006772: 2b02 cmp r3, #2
8006774: d901 bls.n 800677a <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
8006776: 2303 movs r3, #3
8006778: e180 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800677a: 4b1d ldr r3, [pc, #116] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
800677c: 681b ldr r3, [r3, #0]
800677e: f003 0302 and.w r3, r3, #2
8006782: 2b00 cmp r3, #0
8006784: d1f0 bne.n 8006768 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8006786: 687b ldr r3, [r7, #4]
8006788: 681b ldr r3, [r3, #0]
800678a: f003 0308 and.w r3, r3, #8
800678e: 2b00 cmp r3, #0
8006790: d03a beq.n 8006808 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8006792: 687b ldr r3, [r7, #4]
8006794: 699b ldr r3, [r3, #24]
8006796: 2b00 cmp r3, #0
8006798: d019 beq.n 80067ce <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
800679a: 4b17 ldr r3, [pc, #92] @ (80067f8 <HAL_RCC_OscConfig+0x274>)
800679c: 2201 movs r2, #1
800679e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80067a0: f7fc feec bl 800357c <HAL_GetTick>
80067a4: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80067a6: e008 b.n 80067ba <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80067a8: f7fc fee8 bl 800357c <HAL_GetTick>
80067ac: 4602 mov r2, r0
80067ae: 693b ldr r3, [r7, #16]
80067b0: 1ad3 subs r3, r2, r3
80067b2: 2b02 cmp r3, #2
80067b4: d901 bls.n 80067ba <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
80067b6: 2303 movs r3, #3
80067b8: e160 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80067ba: 4b0d ldr r3, [pc, #52] @ (80067f0 <HAL_RCC_OscConfig+0x26c>)
80067bc: 6a5b ldr r3, [r3, #36] @ 0x24
80067be: f003 0302 and.w r3, r3, #2
80067c2: 2b00 cmp r3, #0
80067c4: d0f0 beq.n 80067a8 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
80067c6: 2001 movs r0, #1
80067c8: f000 fad0 bl 8006d6c <RCC_Delay>
80067cc: e01c b.n 8006808 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
80067ce: 4b0a ldr r3, [pc, #40] @ (80067f8 <HAL_RCC_OscConfig+0x274>)
80067d0: 2200 movs r2, #0
80067d2: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80067d4: f7fc fed2 bl 800357c <HAL_GetTick>
80067d8: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80067da: e00f b.n 80067fc <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80067dc: f7fc fece bl 800357c <HAL_GetTick>
80067e0: 4602 mov r2, r0
80067e2: 693b ldr r3, [r7, #16]
80067e4: 1ad3 subs r3, r2, r3
80067e6: 2b02 cmp r3, #2
80067e8: d908 bls.n 80067fc <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
80067ea: 2303 movs r3, #3
80067ec: e146 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
80067ee: bf00 nop
80067f0: 40021000 .word 0x40021000
80067f4: 42420000 .word 0x42420000
80067f8: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80067fc: 4b92 ldr r3, [pc, #584] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80067fe: 6a5b ldr r3, [r3, #36] @ 0x24
8006800: f003 0302 and.w r3, r3, #2
8006804: 2b00 cmp r3, #0
8006806: d1e9 bne.n 80067dc <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8006808: 687b ldr r3, [r7, #4]
800680a: 681b ldr r3, [r3, #0]
800680c: f003 0304 and.w r3, r3, #4
8006810: 2b00 cmp r3, #0
8006812: f000 80a6 beq.w 8006962 <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
8006816: 2300 movs r3, #0
8006818: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
800681a: 4b8b ldr r3, [pc, #556] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
800681c: 69db ldr r3, [r3, #28]
800681e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8006822: 2b00 cmp r3, #0
8006824: d10d bne.n 8006842 <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
8006826: 4b88 ldr r3, [pc, #544] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
8006828: 69db ldr r3, [r3, #28]
800682a: 4a87 ldr r2, [pc, #540] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
800682c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8006830: 61d3 str r3, [r2, #28]
8006832: 4b85 ldr r3, [pc, #532] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
8006834: 69db ldr r3, [r3, #28]
8006836: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800683a: 60bb str r3, [r7, #8]
800683c: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
800683e: 2301 movs r3, #1
8006840: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8006842: 4b82 ldr r3, [pc, #520] @ (8006a4c <HAL_RCC_OscConfig+0x4c8>)
8006844: 681b ldr r3, [r3, #0]
8006846: f403 7380 and.w r3, r3, #256 @ 0x100
800684a: 2b00 cmp r3, #0
800684c: d118 bne.n 8006880 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
800684e: 4b7f ldr r3, [pc, #508] @ (8006a4c <HAL_RCC_OscConfig+0x4c8>)
8006850: 681b ldr r3, [r3, #0]
8006852: 4a7e ldr r2, [pc, #504] @ (8006a4c <HAL_RCC_OscConfig+0x4c8>)
8006854: f443 7380 orr.w r3, r3, #256 @ 0x100
8006858: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800685a: f7fc fe8f bl 800357c <HAL_GetTick>
800685e: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8006860: e008 b.n 8006874 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8006862: f7fc fe8b bl 800357c <HAL_GetTick>
8006866: 4602 mov r2, r0
8006868: 693b ldr r3, [r7, #16]
800686a: 1ad3 subs r3, r2, r3
800686c: 2b64 cmp r3, #100 @ 0x64
800686e: d901 bls.n 8006874 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8006870: 2303 movs r3, #3
8006872: e103 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8006874: 4b75 ldr r3, [pc, #468] @ (8006a4c <HAL_RCC_OscConfig+0x4c8>)
8006876: 681b ldr r3, [r3, #0]
8006878: f403 7380 and.w r3, r3, #256 @ 0x100
800687c: 2b00 cmp r3, #0
800687e: d0f0 beq.n 8006862 <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8006880: 687b ldr r3, [r7, #4]
8006882: 68db ldr r3, [r3, #12]
8006884: 2b01 cmp r3, #1
8006886: d106 bne.n 8006896 <HAL_RCC_OscConfig+0x312>
8006888: 4b6f ldr r3, [pc, #444] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
800688a: 6a1b ldr r3, [r3, #32]
800688c: 4a6e ldr r2, [pc, #440] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
800688e: f043 0301 orr.w r3, r3, #1
8006892: 6213 str r3, [r2, #32]
8006894: e02d b.n 80068f2 <HAL_RCC_OscConfig+0x36e>
8006896: 687b ldr r3, [r7, #4]
8006898: 68db ldr r3, [r3, #12]
800689a: 2b00 cmp r3, #0
800689c: d10c bne.n 80068b8 <HAL_RCC_OscConfig+0x334>
800689e: 4b6a ldr r3, [pc, #424] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068a0: 6a1b ldr r3, [r3, #32]
80068a2: 4a69 ldr r2, [pc, #420] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068a4: f023 0301 bic.w r3, r3, #1
80068a8: 6213 str r3, [r2, #32]
80068aa: 4b67 ldr r3, [pc, #412] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068ac: 6a1b ldr r3, [r3, #32]
80068ae: 4a66 ldr r2, [pc, #408] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068b0: f023 0304 bic.w r3, r3, #4
80068b4: 6213 str r3, [r2, #32]
80068b6: e01c b.n 80068f2 <HAL_RCC_OscConfig+0x36e>
80068b8: 687b ldr r3, [r7, #4]
80068ba: 68db ldr r3, [r3, #12]
80068bc: 2b05 cmp r3, #5
80068be: d10c bne.n 80068da <HAL_RCC_OscConfig+0x356>
80068c0: 4b61 ldr r3, [pc, #388] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068c2: 6a1b ldr r3, [r3, #32]
80068c4: 4a60 ldr r2, [pc, #384] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068c6: f043 0304 orr.w r3, r3, #4
80068ca: 6213 str r3, [r2, #32]
80068cc: 4b5e ldr r3, [pc, #376] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068ce: 6a1b ldr r3, [r3, #32]
80068d0: 4a5d ldr r2, [pc, #372] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068d2: f043 0301 orr.w r3, r3, #1
80068d6: 6213 str r3, [r2, #32]
80068d8: e00b b.n 80068f2 <HAL_RCC_OscConfig+0x36e>
80068da: 4b5b ldr r3, [pc, #364] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068dc: 6a1b ldr r3, [r3, #32]
80068de: 4a5a ldr r2, [pc, #360] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068e0: f023 0301 bic.w r3, r3, #1
80068e4: 6213 str r3, [r2, #32]
80068e6: 4b58 ldr r3, [pc, #352] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068e8: 6a1b ldr r3, [r3, #32]
80068ea: 4a57 ldr r2, [pc, #348] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80068ec: f023 0304 bic.w r3, r3, #4
80068f0: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
80068f2: 687b ldr r3, [r7, #4]
80068f4: 68db ldr r3, [r3, #12]
80068f6: 2b00 cmp r3, #0
80068f8: d015 beq.n 8006926 <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80068fa: f7fc fe3f bl 800357c <HAL_GetTick>
80068fe: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8006900: e00a b.n 8006918 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8006902: f7fc fe3b bl 800357c <HAL_GetTick>
8006906: 4602 mov r2, r0
8006908: 693b ldr r3, [r7, #16]
800690a: 1ad3 subs r3, r2, r3
800690c: f241 3288 movw r2, #5000 @ 0x1388
8006910: 4293 cmp r3, r2
8006912: d901 bls.n 8006918 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8006914: 2303 movs r3, #3
8006916: e0b1 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8006918: 4b4b ldr r3, [pc, #300] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
800691a: 6a1b ldr r3, [r3, #32]
800691c: f003 0302 and.w r3, r3, #2
8006920: 2b00 cmp r3, #0
8006922: d0ee beq.n 8006902 <HAL_RCC_OscConfig+0x37e>
8006924: e014 b.n 8006950 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8006926: f7fc fe29 bl 800357c <HAL_GetTick>
800692a: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
800692c: e00a b.n 8006944 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800692e: f7fc fe25 bl 800357c <HAL_GetTick>
8006932: 4602 mov r2, r0
8006934: 693b ldr r3, [r7, #16]
8006936: 1ad3 subs r3, r2, r3
8006938: f241 3288 movw r2, #5000 @ 0x1388
800693c: 4293 cmp r3, r2
800693e: d901 bls.n 8006944 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8006940: 2303 movs r3, #3
8006942: e09b b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8006944: 4b40 ldr r3, [pc, #256] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
8006946: 6a1b ldr r3, [r3, #32]
8006948: f003 0302 and.w r3, r3, #2
800694c: 2b00 cmp r3, #0
800694e: d1ee bne.n 800692e <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8006950: 7dfb ldrb r3, [r7, #23]
8006952: 2b01 cmp r3, #1
8006954: d105 bne.n 8006962 <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
8006956: 4b3c ldr r3, [pc, #240] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
8006958: 69db ldr r3, [r3, #28]
800695a: 4a3b ldr r2, [pc, #236] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
800695c: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8006960: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8006962: 687b ldr r3, [r7, #4]
8006964: 69db ldr r3, [r3, #28]
8006966: 2b00 cmp r3, #0
8006968: f000 8087 beq.w 8006a7a <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
800696c: 4b36 ldr r3, [pc, #216] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
800696e: 685b ldr r3, [r3, #4]
8006970: f003 030c and.w r3, r3, #12
8006974: 2b08 cmp r3, #8
8006976: d061 beq.n 8006a3c <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8006978: 687b ldr r3, [r7, #4]
800697a: 69db ldr r3, [r3, #28]
800697c: 2b02 cmp r3, #2
800697e: d146 bne.n 8006a0e <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8006980: 4b33 ldr r3, [pc, #204] @ (8006a50 <HAL_RCC_OscConfig+0x4cc>)
8006982: 2200 movs r2, #0
8006984: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8006986: f7fc fdf9 bl 800357c <HAL_GetTick>
800698a: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800698c: e008 b.n 80069a0 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800698e: f7fc fdf5 bl 800357c <HAL_GetTick>
8006992: 4602 mov r2, r0
8006994: 693b ldr r3, [r7, #16]
8006996: 1ad3 subs r3, r2, r3
8006998: 2b02 cmp r3, #2
800699a: d901 bls.n 80069a0 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
800699c: 2303 movs r3, #3
800699e: e06d b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80069a0: 4b29 ldr r3, [pc, #164] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80069a2: 681b ldr r3, [r3, #0]
80069a4: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80069a8: 2b00 cmp r3, #0
80069aa: d1f0 bne.n 800698e <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
80069ac: 687b ldr r3, [r7, #4]
80069ae: 6a1b ldr r3, [r3, #32]
80069b0: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80069b4: d108 bne.n 80069c8 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
80069b6: 4b24 ldr r3, [pc, #144] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80069b8: 685b ldr r3, [r3, #4]
80069ba: f423 3200 bic.w r2, r3, #131072 @ 0x20000
80069be: 687b ldr r3, [r7, #4]
80069c0: 689b ldr r3, [r3, #8]
80069c2: 4921 ldr r1, [pc, #132] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80069c4: 4313 orrs r3, r2
80069c6: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
80069c8: 4b1f ldr r3, [pc, #124] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80069ca: 685b ldr r3, [r3, #4]
80069cc: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
80069d0: 687b ldr r3, [r7, #4]
80069d2: 6a19 ldr r1, [r3, #32]
80069d4: 687b ldr r3, [r7, #4]
80069d6: 6a5b ldr r3, [r3, #36] @ 0x24
80069d8: 430b orrs r3, r1
80069da: 491b ldr r1, [pc, #108] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
80069dc: 4313 orrs r3, r2
80069de: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
80069e0: 4b1b ldr r3, [pc, #108] @ (8006a50 <HAL_RCC_OscConfig+0x4cc>)
80069e2: 2201 movs r2, #1
80069e4: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80069e6: f7fc fdc9 bl 800357c <HAL_GetTick>
80069ea: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80069ec: e008 b.n 8006a00 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80069ee: f7fc fdc5 bl 800357c <HAL_GetTick>
80069f2: 4602 mov r2, r0
80069f4: 693b ldr r3, [r7, #16]
80069f6: 1ad3 subs r3, r2, r3
80069f8: 2b02 cmp r3, #2
80069fa: d901 bls.n 8006a00 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
80069fc: 2303 movs r3, #3
80069fe: e03d b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8006a00: 4b11 ldr r3, [pc, #68] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
8006a02: 681b ldr r3, [r3, #0]
8006a04: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8006a08: 2b00 cmp r3, #0
8006a0a: d0f0 beq.n 80069ee <HAL_RCC_OscConfig+0x46a>
8006a0c: e035 b.n 8006a7a <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8006a0e: 4b10 ldr r3, [pc, #64] @ (8006a50 <HAL_RCC_OscConfig+0x4cc>)
8006a10: 2200 movs r2, #0
8006a12: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8006a14: f7fc fdb2 bl 800357c <HAL_GetTick>
8006a18: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8006a1a: e008 b.n 8006a2e <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8006a1c: f7fc fdae bl 800357c <HAL_GetTick>
8006a20: 4602 mov r2, r0
8006a22: 693b ldr r3, [r7, #16]
8006a24: 1ad3 subs r3, r2, r3
8006a26: 2b02 cmp r3, #2
8006a28: d901 bls.n 8006a2e <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
8006a2a: 2303 movs r3, #3
8006a2c: e026 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8006a2e: 4b06 ldr r3, [pc, #24] @ (8006a48 <HAL_RCC_OscConfig+0x4c4>)
8006a30: 681b ldr r3, [r3, #0]
8006a32: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8006a36: 2b00 cmp r3, #0
8006a38: d1f0 bne.n 8006a1c <HAL_RCC_OscConfig+0x498>
8006a3a: e01e b.n 8006a7a <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8006a3c: 687b ldr r3, [r7, #4]
8006a3e: 69db ldr r3, [r3, #28]
8006a40: 2b01 cmp r3, #1
8006a42: d107 bne.n 8006a54 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8006a44: 2301 movs r3, #1
8006a46: e019 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
8006a48: 40021000 .word 0x40021000
8006a4c: 40007000 .word 0x40007000
8006a50: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8006a54: 4b0b ldr r3, [pc, #44] @ (8006a84 <HAL_RCC_OscConfig+0x500>)
8006a56: 685b ldr r3, [r3, #4]
8006a58: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8006a5a: 68fb ldr r3, [r7, #12]
8006a5c: f403 3280 and.w r2, r3, #65536 @ 0x10000
8006a60: 687b ldr r3, [r7, #4]
8006a62: 6a1b ldr r3, [r3, #32]
8006a64: 429a cmp r2, r3
8006a66: d106 bne.n 8006a76 <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8006a68: 68fb ldr r3, [r7, #12]
8006a6a: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
8006a6e: 687b ldr r3, [r7, #4]
8006a70: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8006a72: 429a cmp r2, r3
8006a74: d001 beq.n 8006a7a <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8006a76: 2301 movs r3, #1
8006a78: e000 b.n 8006a7c <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
8006a7a: 2300 movs r3, #0
}
8006a7c: 4618 mov r0, r3
8006a7e: 3718 adds r7, #24
8006a80: 46bd mov sp, r7
8006a82: bd80 pop {r7, pc}
8006a84: 40021000 .word 0x40021000
08006a88 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8006a88: b580 push {r7, lr}
8006a8a: b084 sub sp, #16
8006a8c: af00 add r7, sp, #0
8006a8e: 6078 str r0, [r7, #4]
8006a90: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8006a92: 687b ldr r3, [r7, #4]
8006a94: 2b00 cmp r3, #0
8006a96: d101 bne.n 8006a9c <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8006a98: 2301 movs r3, #1
8006a9a: e0d0 b.n 8006c3e <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8006a9c: 4b6a ldr r3, [pc, #424] @ (8006c48 <HAL_RCC_ClockConfig+0x1c0>)
8006a9e: 681b ldr r3, [r3, #0]
8006aa0: f003 0307 and.w r3, r3, #7
8006aa4: 683a ldr r2, [r7, #0]
8006aa6: 429a cmp r2, r3
8006aa8: d910 bls.n 8006acc <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8006aaa: 4b67 ldr r3, [pc, #412] @ (8006c48 <HAL_RCC_ClockConfig+0x1c0>)
8006aac: 681b ldr r3, [r3, #0]
8006aae: f023 0207 bic.w r2, r3, #7
8006ab2: 4965 ldr r1, [pc, #404] @ (8006c48 <HAL_RCC_ClockConfig+0x1c0>)
8006ab4: 683b ldr r3, [r7, #0]
8006ab6: 4313 orrs r3, r2
8006ab8: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8006aba: 4b63 ldr r3, [pc, #396] @ (8006c48 <HAL_RCC_ClockConfig+0x1c0>)
8006abc: 681b ldr r3, [r3, #0]
8006abe: f003 0307 and.w r3, r3, #7
8006ac2: 683a ldr r2, [r7, #0]
8006ac4: 429a cmp r2, r3
8006ac6: d001 beq.n 8006acc <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8006ac8: 2301 movs r3, #1
8006aca: e0b8 b.n 8006c3e <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8006acc: 687b ldr r3, [r7, #4]
8006ace: 681b ldr r3, [r3, #0]
8006ad0: f003 0302 and.w r3, r3, #2
8006ad4: 2b00 cmp r3, #0
8006ad6: d020 beq.n 8006b1a <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8006ad8: 687b ldr r3, [r7, #4]
8006ada: 681b ldr r3, [r3, #0]
8006adc: f003 0304 and.w r3, r3, #4
8006ae0: 2b00 cmp r3, #0
8006ae2: d005 beq.n 8006af0 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8006ae4: 4b59 ldr r3, [pc, #356] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006ae6: 685b ldr r3, [r3, #4]
8006ae8: 4a58 ldr r2, [pc, #352] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006aea: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8006aee: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8006af0: 687b ldr r3, [r7, #4]
8006af2: 681b ldr r3, [r3, #0]
8006af4: f003 0308 and.w r3, r3, #8
8006af8: 2b00 cmp r3, #0
8006afa: d005 beq.n 8006b08 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8006afc: 4b53 ldr r3, [pc, #332] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006afe: 685b ldr r3, [r3, #4]
8006b00: 4a52 ldr r2, [pc, #328] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b02: f443 5360 orr.w r3, r3, #14336 @ 0x3800
8006b06: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8006b08: 4b50 ldr r3, [pc, #320] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b0a: 685b ldr r3, [r3, #4]
8006b0c: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8006b10: 687b ldr r3, [r7, #4]
8006b12: 689b ldr r3, [r3, #8]
8006b14: 494d ldr r1, [pc, #308] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b16: 4313 orrs r3, r2
8006b18: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8006b1a: 687b ldr r3, [r7, #4]
8006b1c: 681b ldr r3, [r3, #0]
8006b1e: f003 0301 and.w r3, r3, #1
8006b22: 2b00 cmp r3, #0
8006b24: d040 beq.n 8006ba8 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8006b26: 687b ldr r3, [r7, #4]
8006b28: 685b ldr r3, [r3, #4]
8006b2a: 2b01 cmp r3, #1
8006b2c: d107 bne.n 8006b3e <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8006b2e: 4b47 ldr r3, [pc, #284] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b30: 681b ldr r3, [r3, #0]
8006b32: f403 3300 and.w r3, r3, #131072 @ 0x20000
8006b36: 2b00 cmp r3, #0
8006b38: d115 bne.n 8006b66 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8006b3a: 2301 movs r3, #1
8006b3c: e07f b.n 8006c3e <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8006b3e: 687b ldr r3, [r7, #4]
8006b40: 685b ldr r3, [r3, #4]
8006b42: 2b02 cmp r3, #2
8006b44: d107 bne.n 8006b56 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8006b46: 4b41 ldr r3, [pc, #260] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b48: 681b ldr r3, [r3, #0]
8006b4a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8006b4e: 2b00 cmp r3, #0
8006b50: d109 bne.n 8006b66 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8006b52: 2301 movs r3, #1
8006b54: e073 b.n 8006c3e <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8006b56: 4b3d ldr r3, [pc, #244] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b58: 681b ldr r3, [r3, #0]
8006b5a: f003 0302 and.w r3, r3, #2
8006b5e: 2b00 cmp r3, #0
8006b60: d101 bne.n 8006b66 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8006b62: 2301 movs r3, #1
8006b64: e06b b.n 8006c3e <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8006b66: 4b39 ldr r3, [pc, #228] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b68: 685b ldr r3, [r3, #4]
8006b6a: f023 0203 bic.w r2, r3, #3
8006b6e: 687b ldr r3, [r7, #4]
8006b70: 685b ldr r3, [r3, #4]
8006b72: 4936 ldr r1, [pc, #216] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b74: 4313 orrs r3, r2
8006b76: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
8006b78: f7fc fd00 bl 800357c <HAL_GetTick>
8006b7c: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8006b7e: e00a b.n 8006b96 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8006b80: f7fc fcfc bl 800357c <HAL_GetTick>
8006b84: 4602 mov r2, r0
8006b86: 68fb ldr r3, [r7, #12]
8006b88: 1ad3 subs r3, r2, r3
8006b8a: f241 3288 movw r2, #5000 @ 0x1388
8006b8e: 4293 cmp r3, r2
8006b90: d901 bls.n 8006b96 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8006b92: 2303 movs r3, #3
8006b94: e053 b.n 8006c3e <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8006b96: 4b2d ldr r3, [pc, #180] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006b98: 685b ldr r3, [r3, #4]
8006b9a: f003 020c and.w r2, r3, #12
8006b9e: 687b ldr r3, [r7, #4]
8006ba0: 685b ldr r3, [r3, #4]
8006ba2: 009b lsls r3, r3, #2
8006ba4: 429a cmp r2, r3
8006ba6: d1eb bne.n 8006b80 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8006ba8: 4b27 ldr r3, [pc, #156] @ (8006c48 <HAL_RCC_ClockConfig+0x1c0>)
8006baa: 681b ldr r3, [r3, #0]
8006bac: f003 0307 and.w r3, r3, #7
8006bb0: 683a ldr r2, [r7, #0]
8006bb2: 429a cmp r2, r3
8006bb4: d210 bcs.n 8006bd8 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8006bb6: 4b24 ldr r3, [pc, #144] @ (8006c48 <HAL_RCC_ClockConfig+0x1c0>)
8006bb8: 681b ldr r3, [r3, #0]
8006bba: f023 0207 bic.w r2, r3, #7
8006bbe: 4922 ldr r1, [pc, #136] @ (8006c48 <HAL_RCC_ClockConfig+0x1c0>)
8006bc0: 683b ldr r3, [r7, #0]
8006bc2: 4313 orrs r3, r2
8006bc4: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8006bc6: 4b20 ldr r3, [pc, #128] @ (8006c48 <HAL_RCC_ClockConfig+0x1c0>)
8006bc8: 681b ldr r3, [r3, #0]
8006bca: f003 0307 and.w r3, r3, #7
8006bce: 683a ldr r2, [r7, #0]
8006bd0: 429a cmp r2, r3
8006bd2: d001 beq.n 8006bd8 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8006bd4: 2301 movs r3, #1
8006bd6: e032 b.n 8006c3e <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8006bd8: 687b ldr r3, [r7, #4]
8006bda: 681b ldr r3, [r3, #0]
8006bdc: f003 0304 and.w r3, r3, #4
8006be0: 2b00 cmp r3, #0
8006be2: d008 beq.n 8006bf6 <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8006be4: 4b19 ldr r3, [pc, #100] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006be6: 685b ldr r3, [r3, #4]
8006be8: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8006bec: 687b ldr r3, [r7, #4]
8006bee: 68db ldr r3, [r3, #12]
8006bf0: 4916 ldr r1, [pc, #88] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006bf2: 4313 orrs r3, r2
8006bf4: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8006bf6: 687b ldr r3, [r7, #4]
8006bf8: 681b ldr r3, [r3, #0]
8006bfa: f003 0308 and.w r3, r3, #8
8006bfe: 2b00 cmp r3, #0
8006c00: d009 beq.n 8006c16 <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8006c02: 4b12 ldr r3, [pc, #72] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006c04: 685b ldr r3, [r3, #4]
8006c06: f423 5260 bic.w r2, r3, #14336 @ 0x3800
8006c0a: 687b ldr r3, [r7, #4]
8006c0c: 691b ldr r3, [r3, #16]
8006c0e: 00db lsls r3, r3, #3
8006c10: 490e ldr r1, [pc, #56] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006c12: 4313 orrs r3, r2
8006c14: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
8006c16: f000 f821 bl 8006c5c <HAL_RCC_GetSysClockFreq>
8006c1a: 4602 mov r2, r0
8006c1c: 4b0b ldr r3, [pc, #44] @ (8006c4c <HAL_RCC_ClockConfig+0x1c4>)
8006c1e: 685b ldr r3, [r3, #4]
8006c20: 091b lsrs r3, r3, #4
8006c22: f003 030f and.w r3, r3, #15
8006c26: 490a ldr r1, [pc, #40] @ (8006c50 <HAL_RCC_ClockConfig+0x1c8>)
8006c28: 5ccb ldrb r3, [r1, r3]
8006c2a: fa22 f303 lsr.w r3, r2, r3
8006c2e: 4a09 ldr r2, [pc, #36] @ (8006c54 <HAL_RCC_ClockConfig+0x1cc>)
8006c30: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8006c32: 4b09 ldr r3, [pc, #36] @ (8006c58 <HAL_RCC_ClockConfig+0x1d0>)
8006c34: 681b ldr r3, [r3, #0]
8006c36: 4618 mov r0, r3
8006c38: f7fc fc5e bl 80034f8 <HAL_InitTick>
return HAL_OK;
8006c3c: 2300 movs r3, #0
}
8006c3e: 4618 mov r0, r3
8006c40: 3710 adds r7, #16
8006c42: 46bd mov sp, r7
8006c44: bd80 pop {r7, pc}
8006c46: bf00 nop
8006c48: 40022000 .word 0x40022000
8006c4c: 40021000 .word 0x40021000
8006c50: 0800d208 .word 0x0800d208
8006c54: 20000008 .word 0x20000008
8006c58: 2000000c .word 0x2000000c
08006c5c <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8006c5c: b480 push {r7}
8006c5e: b087 sub sp, #28
8006c60: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8006c62: 2300 movs r3, #0
8006c64: 60fb str r3, [r7, #12]
8006c66: 2300 movs r3, #0
8006c68: 60bb str r3, [r7, #8]
8006c6a: 2300 movs r3, #0
8006c6c: 617b str r3, [r7, #20]
8006c6e: 2300 movs r3, #0
8006c70: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
8006c72: 2300 movs r3, #0
8006c74: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
8006c76: 4b1e ldr r3, [pc, #120] @ (8006cf0 <HAL_RCC_GetSysClockFreq+0x94>)
8006c78: 685b ldr r3, [r3, #4]
8006c7a: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8006c7c: 68fb ldr r3, [r7, #12]
8006c7e: f003 030c and.w r3, r3, #12
8006c82: 2b04 cmp r3, #4
8006c84: d002 beq.n 8006c8c <HAL_RCC_GetSysClockFreq+0x30>
8006c86: 2b08 cmp r3, #8
8006c88: d003 beq.n 8006c92 <HAL_RCC_GetSysClockFreq+0x36>
8006c8a: e027 b.n 8006cdc <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8006c8c: 4b19 ldr r3, [pc, #100] @ (8006cf4 <HAL_RCC_GetSysClockFreq+0x98>)
8006c8e: 613b str r3, [r7, #16]
break;
8006c90: e027 b.n 8006ce2 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
8006c92: 68fb ldr r3, [r7, #12]
8006c94: 0c9b lsrs r3, r3, #18
8006c96: f003 030f and.w r3, r3, #15
8006c9a: 4a17 ldr r2, [pc, #92] @ (8006cf8 <HAL_RCC_GetSysClockFreq+0x9c>)
8006c9c: 5cd3 ldrb r3, [r2, r3]
8006c9e: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
8006ca0: 68fb ldr r3, [r7, #12]
8006ca2: f403 3380 and.w r3, r3, #65536 @ 0x10000
8006ca6: 2b00 cmp r3, #0
8006ca8: d010 beq.n 8006ccc <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
8006caa: 4b11 ldr r3, [pc, #68] @ (8006cf0 <HAL_RCC_GetSysClockFreq+0x94>)
8006cac: 685b ldr r3, [r3, #4]
8006cae: 0c5b lsrs r3, r3, #17
8006cb0: f003 0301 and.w r3, r3, #1
8006cb4: 4a11 ldr r2, [pc, #68] @ (8006cfc <HAL_RCC_GetSysClockFreq+0xa0>)
8006cb6: 5cd3 ldrb r3, [r2, r3]
8006cb8: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
8006cba: 687b ldr r3, [r7, #4]
8006cbc: 4a0d ldr r2, [pc, #52] @ (8006cf4 <HAL_RCC_GetSysClockFreq+0x98>)
8006cbe: fb03 f202 mul.w r2, r3, r2
8006cc2: 68bb ldr r3, [r7, #8]
8006cc4: fbb2 f3f3 udiv r3, r2, r3
8006cc8: 617b str r3, [r7, #20]
8006cca: e004 b.n 8006cd6 <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8006ccc: 687b ldr r3, [r7, #4]
8006cce: 4a0c ldr r2, [pc, #48] @ (8006d00 <HAL_RCC_GetSysClockFreq+0xa4>)
8006cd0: fb02 f303 mul.w r3, r2, r3
8006cd4: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8006cd6: 697b ldr r3, [r7, #20]
8006cd8: 613b str r3, [r7, #16]
break;
8006cda: e002 b.n 8006ce2 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8006cdc: 4b09 ldr r3, [pc, #36] @ (8006d04 <HAL_RCC_GetSysClockFreq+0xa8>)
8006cde: 613b str r3, [r7, #16]
break;
8006ce0: bf00 nop
}
}
return sysclockfreq;
8006ce2: 693b ldr r3, [r7, #16]
}
8006ce4: 4618 mov r0, r3
8006ce6: 371c adds r7, #28
8006ce8: 46bd mov sp, r7
8006cea: bc80 pop {r7}
8006cec: 4770 bx lr
8006cee: bf00 nop
8006cf0: 40021000 .word 0x40021000
8006cf4: 00b71b00 .word 0x00b71b00
8006cf8: 0800d220 .word 0x0800d220
8006cfc: 0800d230 .word 0x0800d230
8006d00: 003d0900 .word 0x003d0900
8006d04: 007a1200 .word 0x007a1200
08006d08 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8006d08: b480 push {r7}
8006d0a: af00 add r7, sp, #0
return SystemCoreClock;
8006d0c: 4b02 ldr r3, [pc, #8] @ (8006d18 <HAL_RCC_GetHCLKFreq+0x10>)
8006d0e: 681b ldr r3, [r3, #0]
}
8006d10: 4618 mov r0, r3
8006d12: 46bd mov sp, r7
8006d14: bc80 pop {r7}
8006d16: 4770 bx lr
8006d18: 20000008 .word 0x20000008
08006d1c <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8006d1c: b580 push {r7, lr}
8006d1e: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8006d20: f7ff fff2 bl 8006d08 <HAL_RCC_GetHCLKFreq>
8006d24: 4602 mov r2, r0
8006d26: 4b05 ldr r3, [pc, #20] @ (8006d3c <HAL_RCC_GetPCLK1Freq+0x20>)
8006d28: 685b ldr r3, [r3, #4]
8006d2a: 0a1b lsrs r3, r3, #8
8006d2c: f003 0307 and.w r3, r3, #7
8006d30: 4903 ldr r1, [pc, #12] @ (8006d40 <HAL_RCC_GetPCLK1Freq+0x24>)
8006d32: 5ccb ldrb r3, [r1, r3]
8006d34: fa22 f303 lsr.w r3, r2, r3
}
8006d38: 4618 mov r0, r3
8006d3a: bd80 pop {r7, pc}
8006d3c: 40021000 .word 0x40021000
8006d40: 0800d218 .word 0x0800d218
08006d44 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8006d44: b580 push {r7, lr}
8006d46: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
8006d48: f7ff ffde bl 8006d08 <HAL_RCC_GetHCLKFreq>
8006d4c: 4602 mov r2, r0
8006d4e: 4b05 ldr r3, [pc, #20] @ (8006d64 <HAL_RCC_GetPCLK2Freq+0x20>)
8006d50: 685b ldr r3, [r3, #4]
8006d52: 0adb lsrs r3, r3, #11
8006d54: f003 0307 and.w r3, r3, #7
8006d58: 4903 ldr r1, [pc, #12] @ (8006d68 <HAL_RCC_GetPCLK2Freq+0x24>)
8006d5a: 5ccb ldrb r3, [r1, r3]
8006d5c: fa22 f303 lsr.w r3, r2, r3
}
8006d60: 4618 mov r0, r3
8006d62: bd80 pop {r7, pc}
8006d64: 40021000 .word 0x40021000
8006d68: 0800d218 .word 0x0800d218
08006d6c <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8006d6c: b480 push {r7}
8006d6e: b085 sub sp, #20
8006d70: af00 add r7, sp, #0
8006d72: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8006d74: 4b0a ldr r3, [pc, #40] @ (8006da0 <RCC_Delay+0x34>)
8006d76: 681b ldr r3, [r3, #0]
8006d78: 4a0a ldr r2, [pc, #40] @ (8006da4 <RCC_Delay+0x38>)
8006d7a: fba2 2303 umull r2, r3, r2, r3
8006d7e: 0a5b lsrs r3, r3, #9
8006d80: 687a ldr r2, [r7, #4]
8006d82: fb02 f303 mul.w r3, r2, r3
8006d86: 60fb str r3, [r7, #12]
do
{
__NOP();
8006d88: bf00 nop
}
while (Delay --);
8006d8a: 68fb ldr r3, [r7, #12]
8006d8c: 1e5a subs r2, r3, #1
8006d8e: 60fa str r2, [r7, #12]
8006d90: 2b00 cmp r3, #0
8006d92: d1f9 bne.n 8006d88 <RCC_Delay+0x1c>
}
8006d94: bf00 nop
8006d96: bf00 nop
8006d98: 3714 adds r7, #20
8006d9a: 46bd mov sp, r7
8006d9c: bc80 pop {r7}
8006d9e: 4770 bx lr
8006da0: 20000008 .word 0x20000008
8006da4: 10624dd3 .word 0x10624dd3
08006da8 <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8006da8: b580 push {r7, lr}
8006daa: b086 sub sp, #24
8006dac: af00 add r7, sp, #0
8006dae: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8006db0: 2300 movs r3, #0
8006db2: 613b str r3, [r7, #16]
8006db4: 2300 movs r3, #0
8006db6: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8006db8: 687b ldr r3, [r7, #4]
8006dba: 681b ldr r3, [r3, #0]
8006dbc: f003 0301 and.w r3, r3, #1
8006dc0: 2b00 cmp r3, #0
8006dc2: d07d beq.n 8006ec0 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
8006dc4: 2300 movs r3, #0
8006dc6: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8006dc8: 4b4f ldr r3, [pc, #316] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006dca: 69db ldr r3, [r3, #28]
8006dcc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8006dd0: 2b00 cmp r3, #0
8006dd2: d10d bne.n 8006df0 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8006dd4: 4b4c ldr r3, [pc, #304] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006dd6: 69db ldr r3, [r3, #28]
8006dd8: 4a4b ldr r2, [pc, #300] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006dda: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8006dde: 61d3 str r3, [r2, #28]
8006de0: 4b49 ldr r3, [pc, #292] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006de2: 69db ldr r3, [r3, #28]
8006de4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8006de8: 60bb str r3, [r7, #8]
8006dea: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8006dec: 2301 movs r3, #1
8006dee: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8006df0: 4b46 ldr r3, [pc, #280] @ (8006f0c <HAL_RCCEx_PeriphCLKConfig+0x164>)
8006df2: 681b ldr r3, [r3, #0]
8006df4: f403 7380 and.w r3, r3, #256 @ 0x100
8006df8: 2b00 cmp r3, #0
8006dfa: d118 bne.n 8006e2e <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8006dfc: 4b43 ldr r3, [pc, #268] @ (8006f0c <HAL_RCCEx_PeriphCLKConfig+0x164>)
8006dfe: 681b ldr r3, [r3, #0]
8006e00: 4a42 ldr r2, [pc, #264] @ (8006f0c <HAL_RCCEx_PeriphCLKConfig+0x164>)
8006e02: f443 7380 orr.w r3, r3, #256 @ 0x100
8006e06: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8006e08: f7fc fbb8 bl 800357c <HAL_GetTick>
8006e0c: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8006e0e: e008 b.n 8006e22 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8006e10: f7fc fbb4 bl 800357c <HAL_GetTick>
8006e14: 4602 mov r2, r0
8006e16: 693b ldr r3, [r7, #16]
8006e18: 1ad3 subs r3, r2, r3
8006e1a: 2b64 cmp r3, #100 @ 0x64
8006e1c: d901 bls.n 8006e22 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8006e1e: 2303 movs r3, #3
8006e20: e06d b.n 8006efe <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8006e22: 4b3a ldr r3, [pc, #232] @ (8006f0c <HAL_RCCEx_PeriphCLKConfig+0x164>)
8006e24: 681b ldr r3, [r3, #0]
8006e26: f403 7380 and.w r3, r3, #256 @ 0x100
8006e2a: 2b00 cmp r3, #0
8006e2c: d0f0 beq.n 8006e10 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8006e2e: 4b36 ldr r3, [pc, #216] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006e30: 6a1b ldr r3, [r3, #32]
8006e32: f403 7340 and.w r3, r3, #768 @ 0x300
8006e36: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8006e38: 68fb ldr r3, [r7, #12]
8006e3a: 2b00 cmp r3, #0
8006e3c: d02e beq.n 8006e9c <HAL_RCCEx_PeriphCLKConfig+0xf4>
8006e3e: 687b ldr r3, [r7, #4]
8006e40: 685b ldr r3, [r3, #4]
8006e42: f403 7340 and.w r3, r3, #768 @ 0x300
8006e46: 68fa ldr r2, [r7, #12]
8006e48: 429a cmp r2, r3
8006e4a: d027 beq.n 8006e9c <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8006e4c: 4b2e ldr r3, [pc, #184] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006e4e: 6a1b ldr r3, [r3, #32]
8006e50: f423 7340 bic.w r3, r3, #768 @ 0x300
8006e54: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8006e56: 4b2e ldr r3, [pc, #184] @ (8006f10 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8006e58: 2201 movs r2, #1
8006e5a: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8006e5c: 4b2c ldr r3, [pc, #176] @ (8006f10 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8006e5e: 2200 movs r2, #0
8006e60: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8006e62: 4a29 ldr r2, [pc, #164] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006e64: 68fb ldr r3, [r7, #12]
8006e66: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8006e68: 68fb ldr r3, [r7, #12]
8006e6a: f003 0301 and.w r3, r3, #1
8006e6e: 2b00 cmp r3, #0
8006e70: d014 beq.n 8006e9c <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8006e72: f7fc fb83 bl 800357c <HAL_GetTick>
8006e76: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8006e78: e00a b.n 8006e90 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8006e7a: f7fc fb7f bl 800357c <HAL_GetTick>
8006e7e: 4602 mov r2, r0
8006e80: 693b ldr r3, [r7, #16]
8006e82: 1ad3 subs r3, r2, r3
8006e84: f241 3288 movw r2, #5000 @ 0x1388
8006e88: 4293 cmp r3, r2
8006e8a: d901 bls.n 8006e90 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8006e8c: 2303 movs r3, #3
8006e8e: e036 b.n 8006efe <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8006e90: 4b1d ldr r3, [pc, #116] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006e92: 6a1b ldr r3, [r3, #32]
8006e94: f003 0302 and.w r3, r3, #2
8006e98: 2b00 cmp r3, #0
8006e9a: d0ee beq.n 8006e7a <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8006e9c: 4b1a ldr r3, [pc, #104] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006e9e: 6a1b ldr r3, [r3, #32]
8006ea0: f423 7240 bic.w r2, r3, #768 @ 0x300
8006ea4: 687b ldr r3, [r7, #4]
8006ea6: 685b ldr r3, [r3, #4]
8006ea8: 4917 ldr r1, [pc, #92] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006eaa: 4313 orrs r3, r2
8006eac: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8006eae: 7dfb ldrb r3, [r7, #23]
8006eb0: 2b01 cmp r3, #1
8006eb2: d105 bne.n 8006ec0 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8006eb4: 4b14 ldr r3, [pc, #80] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006eb6: 69db ldr r3, [r3, #28]
8006eb8: 4a13 ldr r2, [pc, #76] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006eba: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8006ebe: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8006ec0: 687b ldr r3, [r7, #4]
8006ec2: 681b ldr r3, [r3, #0]
8006ec4: f003 0302 and.w r3, r3, #2
8006ec8: 2b00 cmp r3, #0
8006eca: d008 beq.n 8006ede <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8006ecc: 4b0e ldr r3, [pc, #56] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006ece: 685b ldr r3, [r3, #4]
8006ed0: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8006ed4: 687b ldr r3, [r7, #4]
8006ed6: 689b ldr r3, [r3, #8]
8006ed8: 490b ldr r1, [pc, #44] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006eda: 4313 orrs r3, r2
8006edc: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8006ede: 687b ldr r3, [r7, #4]
8006ee0: 681b ldr r3, [r3, #0]
8006ee2: f003 0310 and.w r3, r3, #16
8006ee6: 2b00 cmp r3, #0
8006ee8: d008 beq.n 8006efc <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8006eea: 4b07 ldr r3, [pc, #28] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006eec: 685b ldr r3, [r3, #4]
8006eee: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8006ef2: 687b ldr r3, [r7, #4]
8006ef4: 68db ldr r3, [r3, #12]
8006ef6: 4904 ldr r1, [pc, #16] @ (8006f08 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8006ef8: 4313 orrs r3, r2
8006efa: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8006efc: 2300 movs r3, #0
}
8006efe: 4618 mov r0, r3
8006f00: 3718 adds r7, #24
8006f02: 46bd mov sp, r7
8006f04: bd80 pop {r7, pc}
8006f06: bf00 nop
8006f08: 40021000 .word 0x40021000
8006f0c: 40007000 .word 0x40007000
8006f10: 42420440 .word 0x42420440
08006f14 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8006f14: b580 push {r7, lr}
8006f16: b082 sub sp, #8
8006f18: af00 add r7, sp, #0
8006f1a: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8006f1c: 687b ldr r3, [r7, #4]
8006f1e: 2b00 cmp r3, #0
8006f20: d101 bne.n 8006f26 <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8006f22: 2301 movs r3, #1
8006f24: e041 b.n 8006faa <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8006f26: 687b ldr r3, [r7, #4]
8006f28: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8006f2c: b2db uxtb r3, r3
8006f2e: 2b00 cmp r3, #0
8006f30: d106 bne.n 8006f40 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8006f32: 687b ldr r3, [r7, #4]
8006f34: 2200 movs r2, #0
8006f36: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8006f3a: 6878 ldr r0, [r7, #4]
8006f3c: f7fc f952 bl 80031e4 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8006f40: 687b ldr r3, [r7, #4]
8006f42: 2202 movs r2, #2
8006f44: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8006f48: 687b ldr r3, [r7, #4]
8006f4a: 681a ldr r2, [r3, #0]
8006f4c: 687b ldr r3, [r7, #4]
8006f4e: 3304 adds r3, #4
8006f50: 4619 mov r1, r3
8006f52: 4610 mov r0, r2
8006f54: f000 fb3e bl 80075d4 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8006f58: 687b ldr r3, [r7, #4]
8006f5a: 2201 movs r2, #1
8006f5c: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8006f60: 687b ldr r3, [r7, #4]
8006f62: 2201 movs r2, #1
8006f64: f883 203e strb.w r2, [r3, #62] @ 0x3e
8006f68: 687b ldr r3, [r7, #4]
8006f6a: 2201 movs r2, #1
8006f6c: f883 203f strb.w r2, [r3, #63] @ 0x3f
8006f70: 687b ldr r3, [r7, #4]
8006f72: 2201 movs r2, #1
8006f74: f883 2040 strb.w r2, [r3, #64] @ 0x40
8006f78: 687b ldr r3, [r7, #4]
8006f7a: 2201 movs r2, #1
8006f7c: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8006f80: 687b ldr r3, [r7, #4]
8006f82: 2201 movs r2, #1
8006f84: f883 2042 strb.w r2, [r3, #66] @ 0x42
8006f88: 687b ldr r3, [r7, #4]
8006f8a: 2201 movs r2, #1
8006f8c: f883 2043 strb.w r2, [r3, #67] @ 0x43
8006f90: 687b ldr r3, [r7, #4]
8006f92: 2201 movs r2, #1
8006f94: f883 2044 strb.w r2, [r3, #68] @ 0x44
8006f98: 687b ldr r3, [r7, #4]
8006f9a: 2201 movs r2, #1
8006f9c: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8006fa0: 687b ldr r3, [r7, #4]
8006fa2: 2201 movs r2, #1
8006fa4: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8006fa8: 2300 movs r3, #0
}
8006faa: 4618 mov r0, r3
8006fac: 3708 adds r7, #8
8006fae: 46bd mov sp, r7
8006fb0: bd80 pop {r7, pc}
08006fb2 <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8006fb2: b580 push {r7, lr}
8006fb4: b082 sub sp, #8
8006fb6: af00 add r7, sp, #0
8006fb8: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8006fba: 687b ldr r3, [r7, #4]
8006fbc: 2b00 cmp r3, #0
8006fbe: d101 bne.n 8006fc4 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8006fc0: 2301 movs r3, #1
8006fc2: e041 b.n 8007048 <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8006fc4: 687b ldr r3, [r7, #4]
8006fc6: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8006fca: b2db uxtb r3, r3
8006fcc: 2b00 cmp r3, #0
8006fce: d106 bne.n 8006fde <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8006fd0: 687b ldr r3, [r7, #4]
8006fd2: 2200 movs r2, #0
8006fd4: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8006fd8: 6878 ldr r0, [r7, #4]
8006fda: f000 f839 bl 8007050 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8006fde: 687b ldr r3, [r7, #4]
8006fe0: 2202 movs r2, #2
8006fe2: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8006fe6: 687b ldr r3, [r7, #4]
8006fe8: 681a ldr r2, [r3, #0]
8006fea: 687b ldr r3, [r7, #4]
8006fec: 3304 adds r3, #4
8006fee: 4619 mov r1, r3
8006ff0: 4610 mov r0, r2
8006ff2: f000 faef bl 80075d4 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8006ff6: 687b ldr r3, [r7, #4]
8006ff8: 2201 movs r2, #1
8006ffa: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8006ffe: 687b ldr r3, [r7, #4]
8007000: 2201 movs r2, #1
8007002: f883 203e strb.w r2, [r3, #62] @ 0x3e
8007006: 687b ldr r3, [r7, #4]
8007008: 2201 movs r2, #1
800700a: f883 203f strb.w r2, [r3, #63] @ 0x3f
800700e: 687b ldr r3, [r7, #4]
8007010: 2201 movs r2, #1
8007012: f883 2040 strb.w r2, [r3, #64] @ 0x40
8007016: 687b ldr r3, [r7, #4]
8007018: 2201 movs r2, #1
800701a: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
800701e: 687b ldr r3, [r7, #4]
8007020: 2201 movs r2, #1
8007022: f883 2042 strb.w r2, [r3, #66] @ 0x42
8007026: 687b ldr r3, [r7, #4]
8007028: 2201 movs r2, #1
800702a: f883 2043 strb.w r2, [r3, #67] @ 0x43
800702e: 687b ldr r3, [r7, #4]
8007030: 2201 movs r2, #1
8007032: f883 2044 strb.w r2, [r3, #68] @ 0x44
8007036: 687b ldr r3, [r7, #4]
8007038: 2201 movs r2, #1
800703a: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
800703e: 687b ldr r3, [r7, #4]
8007040: 2201 movs r2, #1
8007042: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8007046: 2300 movs r3, #0
}
8007048: 4618 mov r0, r3
800704a: 3708 adds r7, #8
800704c: 46bd mov sp, r7
800704e: bd80 pop {r7, pc}
08007050 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8007050: b480 push {r7}
8007052: b083 sub sp, #12
8007054: af00 add r7, sp, #0
8007056: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8007058: bf00 nop
800705a: 370c adds r7, #12
800705c: 46bd mov sp, r7
800705e: bc80 pop {r7}
8007060: 4770 bx lr
...
08007064 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8007064: b580 push {r7, lr}
8007066: b084 sub sp, #16
8007068: af00 add r7, sp, #0
800706a: 6078 str r0, [r7, #4]
800706c: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
800706e: 683b ldr r3, [r7, #0]
8007070: 2b00 cmp r3, #0
8007072: d109 bne.n 8007088 <HAL_TIM_PWM_Start+0x24>
8007074: 687b ldr r3, [r7, #4]
8007076: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
800707a: b2db uxtb r3, r3
800707c: 2b01 cmp r3, #1
800707e: bf14 ite ne
8007080: 2301 movne r3, #1
8007082: 2300 moveq r3, #0
8007084: b2db uxtb r3, r3
8007086: e022 b.n 80070ce <HAL_TIM_PWM_Start+0x6a>
8007088: 683b ldr r3, [r7, #0]
800708a: 2b04 cmp r3, #4
800708c: d109 bne.n 80070a2 <HAL_TIM_PWM_Start+0x3e>
800708e: 687b ldr r3, [r7, #4]
8007090: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8007094: b2db uxtb r3, r3
8007096: 2b01 cmp r3, #1
8007098: bf14 ite ne
800709a: 2301 movne r3, #1
800709c: 2300 moveq r3, #0
800709e: b2db uxtb r3, r3
80070a0: e015 b.n 80070ce <HAL_TIM_PWM_Start+0x6a>
80070a2: 683b ldr r3, [r7, #0]
80070a4: 2b08 cmp r3, #8
80070a6: d109 bne.n 80070bc <HAL_TIM_PWM_Start+0x58>
80070a8: 687b ldr r3, [r7, #4]
80070aa: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80070ae: b2db uxtb r3, r3
80070b0: 2b01 cmp r3, #1
80070b2: bf14 ite ne
80070b4: 2301 movne r3, #1
80070b6: 2300 moveq r3, #0
80070b8: b2db uxtb r3, r3
80070ba: e008 b.n 80070ce <HAL_TIM_PWM_Start+0x6a>
80070bc: 687b ldr r3, [r7, #4]
80070be: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80070c2: b2db uxtb r3, r3
80070c4: 2b01 cmp r3, #1
80070c6: bf14 ite ne
80070c8: 2301 movne r3, #1
80070ca: 2300 moveq r3, #0
80070cc: b2db uxtb r3, r3
80070ce: 2b00 cmp r3, #0
80070d0: d001 beq.n 80070d6 <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
80070d2: 2301 movs r3, #1
80070d4: e05e b.n 8007194 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
80070d6: 683b ldr r3, [r7, #0]
80070d8: 2b00 cmp r3, #0
80070da: d104 bne.n 80070e6 <HAL_TIM_PWM_Start+0x82>
80070dc: 687b ldr r3, [r7, #4]
80070de: 2202 movs r2, #2
80070e0: f883 203e strb.w r2, [r3, #62] @ 0x3e
80070e4: e013 b.n 800710e <HAL_TIM_PWM_Start+0xaa>
80070e6: 683b ldr r3, [r7, #0]
80070e8: 2b04 cmp r3, #4
80070ea: d104 bne.n 80070f6 <HAL_TIM_PWM_Start+0x92>
80070ec: 687b ldr r3, [r7, #4]
80070ee: 2202 movs r2, #2
80070f0: f883 203f strb.w r2, [r3, #63] @ 0x3f
80070f4: e00b b.n 800710e <HAL_TIM_PWM_Start+0xaa>
80070f6: 683b ldr r3, [r7, #0]
80070f8: 2b08 cmp r3, #8
80070fa: d104 bne.n 8007106 <HAL_TIM_PWM_Start+0xa2>
80070fc: 687b ldr r3, [r7, #4]
80070fe: 2202 movs r2, #2
8007100: f883 2040 strb.w r2, [r3, #64] @ 0x40
8007104: e003 b.n 800710e <HAL_TIM_PWM_Start+0xaa>
8007106: 687b ldr r3, [r7, #4]
8007108: 2202 movs r2, #2
800710a: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
800710e: 687b ldr r3, [r7, #4]
8007110: 681b ldr r3, [r3, #0]
8007112: 2201 movs r2, #1
8007114: 6839 ldr r1, [r7, #0]
8007116: 4618 mov r0, r3
8007118: f000 fce8 bl 8007aec <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
800711c: 687b ldr r3, [r7, #4]
800711e: 681b ldr r3, [r3, #0]
8007120: 4a1e ldr r2, [pc, #120] @ (800719c <HAL_TIM_PWM_Start+0x138>)
8007122: 4293 cmp r3, r2
8007124: d107 bne.n 8007136 <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
8007126: 687b ldr r3, [r7, #4]
8007128: 681b ldr r3, [r3, #0]
800712a: 6c5a ldr r2, [r3, #68] @ 0x44
800712c: 687b ldr r3, [r7, #4]
800712e: 681b ldr r3, [r3, #0]
8007130: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8007134: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8007136: 687b ldr r3, [r7, #4]
8007138: 681b ldr r3, [r3, #0]
800713a: 4a18 ldr r2, [pc, #96] @ (800719c <HAL_TIM_PWM_Start+0x138>)
800713c: 4293 cmp r3, r2
800713e: d00e beq.n 800715e <HAL_TIM_PWM_Start+0xfa>
8007140: 687b ldr r3, [r7, #4]
8007142: 681b ldr r3, [r3, #0]
8007144: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8007148: d009 beq.n 800715e <HAL_TIM_PWM_Start+0xfa>
800714a: 687b ldr r3, [r7, #4]
800714c: 681b ldr r3, [r3, #0]
800714e: 4a14 ldr r2, [pc, #80] @ (80071a0 <HAL_TIM_PWM_Start+0x13c>)
8007150: 4293 cmp r3, r2
8007152: d004 beq.n 800715e <HAL_TIM_PWM_Start+0xfa>
8007154: 687b ldr r3, [r7, #4]
8007156: 681b ldr r3, [r3, #0]
8007158: 4a12 ldr r2, [pc, #72] @ (80071a4 <HAL_TIM_PWM_Start+0x140>)
800715a: 4293 cmp r3, r2
800715c: d111 bne.n 8007182 <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
800715e: 687b ldr r3, [r7, #4]
8007160: 681b ldr r3, [r3, #0]
8007162: 689b ldr r3, [r3, #8]
8007164: f003 0307 and.w r3, r3, #7
8007168: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
800716a: 68fb ldr r3, [r7, #12]
800716c: 2b06 cmp r3, #6
800716e: d010 beq.n 8007192 <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8007170: 687b ldr r3, [r7, #4]
8007172: 681b ldr r3, [r3, #0]
8007174: 681a ldr r2, [r3, #0]
8007176: 687b ldr r3, [r7, #4]
8007178: 681b ldr r3, [r3, #0]
800717a: f042 0201 orr.w r2, r2, #1
800717e: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8007180: e007 b.n 8007192 <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8007182: 687b ldr r3, [r7, #4]
8007184: 681b ldr r3, [r3, #0]
8007186: 681a ldr r2, [r3, #0]
8007188: 687b ldr r3, [r7, #4]
800718a: 681b ldr r3, [r3, #0]
800718c: f042 0201 orr.w r2, r2, #1
8007190: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8007192: 2300 movs r3, #0
}
8007194: 4618 mov r0, r3
8007196: 3710 adds r7, #16
8007198: 46bd mov sp, r7
800719a: bd80 pop {r7, pc}
800719c: 40012c00 .word 0x40012c00
80071a0: 40000400 .word 0x40000400
80071a4: 40000800 .word 0x40000800
080071a8 <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
80071a8: b580 push {r7, lr}
80071aa: b082 sub sp, #8
80071ac: af00 add r7, sp, #0
80071ae: 6078 str r0, [r7, #4]
80071b0: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
80071b2: 687b ldr r3, [r7, #4]
80071b4: 681b ldr r3, [r3, #0]
80071b6: 2200 movs r2, #0
80071b8: 6839 ldr r1, [r7, #0]
80071ba: 4618 mov r0, r3
80071bc: f000 fc96 bl 8007aec <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
80071c0: 687b ldr r3, [r7, #4]
80071c2: 681b ldr r3, [r3, #0]
80071c4: 4a29 ldr r2, [pc, #164] @ (800726c <HAL_TIM_PWM_Stop+0xc4>)
80071c6: 4293 cmp r3, r2
80071c8: d117 bne.n 80071fa <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
80071ca: 687b ldr r3, [r7, #4]
80071cc: 681b ldr r3, [r3, #0]
80071ce: 6a1a ldr r2, [r3, #32]
80071d0: f241 1311 movw r3, #4369 @ 0x1111
80071d4: 4013 ands r3, r2
80071d6: 2b00 cmp r3, #0
80071d8: d10f bne.n 80071fa <HAL_TIM_PWM_Stop+0x52>
80071da: 687b ldr r3, [r7, #4]
80071dc: 681b ldr r3, [r3, #0]
80071de: 6a1a ldr r2, [r3, #32]
80071e0: f240 4344 movw r3, #1092 @ 0x444
80071e4: 4013 ands r3, r2
80071e6: 2b00 cmp r3, #0
80071e8: d107 bne.n 80071fa <HAL_TIM_PWM_Stop+0x52>
80071ea: 687b ldr r3, [r7, #4]
80071ec: 681b ldr r3, [r3, #0]
80071ee: 6c5a ldr r2, [r3, #68] @ 0x44
80071f0: 687b ldr r3, [r7, #4]
80071f2: 681b ldr r3, [r3, #0]
80071f4: f422 4200 bic.w r2, r2, #32768 @ 0x8000
80071f8: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
80071fa: 687b ldr r3, [r7, #4]
80071fc: 681b ldr r3, [r3, #0]
80071fe: 6a1a ldr r2, [r3, #32]
8007200: f241 1311 movw r3, #4369 @ 0x1111
8007204: 4013 ands r3, r2
8007206: 2b00 cmp r3, #0
8007208: d10f bne.n 800722a <HAL_TIM_PWM_Stop+0x82>
800720a: 687b ldr r3, [r7, #4]
800720c: 681b ldr r3, [r3, #0]
800720e: 6a1a ldr r2, [r3, #32]
8007210: f240 4344 movw r3, #1092 @ 0x444
8007214: 4013 ands r3, r2
8007216: 2b00 cmp r3, #0
8007218: d107 bne.n 800722a <HAL_TIM_PWM_Stop+0x82>
800721a: 687b ldr r3, [r7, #4]
800721c: 681b ldr r3, [r3, #0]
800721e: 681a ldr r2, [r3, #0]
8007220: 687b ldr r3, [r7, #4]
8007222: 681b ldr r3, [r3, #0]
8007224: f022 0201 bic.w r2, r2, #1
8007228: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
800722a: 683b ldr r3, [r7, #0]
800722c: 2b00 cmp r3, #0
800722e: d104 bne.n 800723a <HAL_TIM_PWM_Stop+0x92>
8007230: 687b ldr r3, [r7, #4]
8007232: 2201 movs r2, #1
8007234: f883 203e strb.w r2, [r3, #62] @ 0x3e
8007238: e013 b.n 8007262 <HAL_TIM_PWM_Stop+0xba>
800723a: 683b ldr r3, [r7, #0]
800723c: 2b04 cmp r3, #4
800723e: d104 bne.n 800724a <HAL_TIM_PWM_Stop+0xa2>
8007240: 687b ldr r3, [r7, #4]
8007242: 2201 movs r2, #1
8007244: f883 203f strb.w r2, [r3, #63] @ 0x3f
8007248: e00b b.n 8007262 <HAL_TIM_PWM_Stop+0xba>
800724a: 683b ldr r3, [r7, #0]
800724c: 2b08 cmp r3, #8
800724e: d104 bne.n 800725a <HAL_TIM_PWM_Stop+0xb2>
8007250: 687b ldr r3, [r7, #4]
8007252: 2201 movs r2, #1
8007254: f883 2040 strb.w r2, [r3, #64] @ 0x40
8007258: e003 b.n 8007262 <HAL_TIM_PWM_Stop+0xba>
800725a: 687b ldr r3, [r7, #4]
800725c: 2201 movs r2, #1
800725e: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
8007262: 2300 movs r3, #0
}
8007264: 4618 mov r0, r3
8007266: 3708 adds r7, #8
8007268: 46bd mov sp, r7
800726a: bd80 pop {r7, pc}
800726c: 40012c00 .word 0x40012c00
08007270 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8007270: b580 push {r7, lr}
8007272: b086 sub sp, #24
8007274: af00 add r7, sp, #0
8007276: 60f8 str r0, [r7, #12]
8007278: 60b9 str r1, [r7, #8]
800727a: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
800727c: 2300 movs r3, #0
800727e: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8007280: 68fb ldr r3, [r7, #12]
8007282: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8007286: 2b01 cmp r3, #1
8007288: d101 bne.n 800728e <HAL_TIM_PWM_ConfigChannel+0x1e>
800728a: 2302 movs r3, #2
800728c: e0ae b.n 80073ec <HAL_TIM_PWM_ConfigChannel+0x17c>
800728e: 68fb ldr r3, [r7, #12]
8007290: 2201 movs r2, #1
8007292: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
8007296: 687b ldr r3, [r7, #4]
8007298: 2b0c cmp r3, #12
800729a: f200 809f bhi.w 80073dc <HAL_TIM_PWM_ConfigChannel+0x16c>
800729e: a201 add r2, pc, #4 @ (adr r2, 80072a4 <HAL_TIM_PWM_ConfigChannel+0x34>)
80072a0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80072a4: 080072d9 .word 0x080072d9
80072a8: 080073dd .word 0x080073dd
80072ac: 080073dd .word 0x080073dd
80072b0: 080073dd .word 0x080073dd
80072b4: 08007319 .word 0x08007319
80072b8: 080073dd .word 0x080073dd
80072bc: 080073dd .word 0x080073dd
80072c0: 080073dd .word 0x080073dd
80072c4: 0800735b .word 0x0800735b
80072c8: 080073dd .word 0x080073dd
80072cc: 080073dd .word 0x080073dd
80072d0: 080073dd .word 0x080073dd
80072d4: 0800739b .word 0x0800739b
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
80072d8: 68fb ldr r3, [r7, #12]
80072da: 681b ldr r3, [r3, #0]
80072dc: 68b9 ldr r1, [r7, #8]
80072de: 4618 mov r0, r3
80072e0: f000 f9e6 bl 80076b0 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
80072e4: 68fb ldr r3, [r7, #12]
80072e6: 681b ldr r3, [r3, #0]
80072e8: 699a ldr r2, [r3, #24]
80072ea: 68fb ldr r3, [r7, #12]
80072ec: 681b ldr r3, [r3, #0]
80072ee: f042 0208 orr.w r2, r2, #8
80072f2: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
80072f4: 68fb ldr r3, [r7, #12]
80072f6: 681b ldr r3, [r3, #0]
80072f8: 699a ldr r2, [r3, #24]
80072fa: 68fb ldr r3, [r7, #12]
80072fc: 681b ldr r3, [r3, #0]
80072fe: f022 0204 bic.w r2, r2, #4
8007302: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
8007304: 68fb ldr r3, [r7, #12]
8007306: 681b ldr r3, [r3, #0]
8007308: 6999 ldr r1, [r3, #24]
800730a: 68bb ldr r3, [r7, #8]
800730c: 691a ldr r2, [r3, #16]
800730e: 68fb ldr r3, [r7, #12]
8007310: 681b ldr r3, [r3, #0]
8007312: 430a orrs r2, r1
8007314: 619a str r2, [r3, #24]
break;
8007316: e064 b.n 80073e2 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8007318: 68fb ldr r3, [r7, #12]
800731a: 681b ldr r3, [r3, #0]
800731c: 68b9 ldr r1, [r7, #8]
800731e: 4618 mov r0, r3
8007320: f000 fa2c bl 800777c <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8007324: 68fb ldr r3, [r7, #12]
8007326: 681b ldr r3, [r3, #0]
8007328: 699a ldr r2, [r3, #24]
800732a: 68fb ldr r3, [r7, #12]
800732c: 681b ldr r3, [r3, #0]
800732e: f442 6200 orr.w r2, r2, #2048 @ 0x800
8007332: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8007334: 68fb ldr r3, [r7, #12]
8007336: 681b ldr r3, [r3, #0]
8007338: 699a ldr r2, [r3, #24]
800733a: 68fb ldr r3, [r7, #12]
800733c: 681b ldr r3, [r3, #0]
800733e: f422 6280 bic.w r2, r2, #1024 @ 0x400
8007342: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8007344: 68fb ldr r3, [r7, #12]
8007346: 681b ldr r3, [r3, #0]
8007348: 6999 ldr r1, [r3, #24]
800734a: 68bb ldr r3, [r7, #8]
800734c: 691b ldr r3, [r3, #16]
800734e: 021a lsls r2, r3, #8
8007350: 68fb ldr r3, [r7, #12]
8007352: 681b ldr r3, [r3, #0]
8007354: 430a orrs r2, r1
8007356: 619a str r2, [r3, #24]
break;
8007358: e043 b.n 80073e2 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
800735a: 68fb ldr r3, [r7, #12]
800735c: 681b ldr r3, [r3, #0]
800735e: 68b9 ldr r1, [r7, #8]
8007360: 4618 mov r0, r3
8007362: f000 fa75 bl 8007850 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
8007366: 68fb ldr r3, [r7, #12]
8007368: 681b ldr r3, [r3, #0]
800736a: 69da ldr r2, [r3, #28]
800736c: 68fb ldr r3, [r7, #12]
800736e: 681b ldr r3, [r3, #0]
8007370: f042 0208 orr.w r2, r2, #8
8007374: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
8007376: 68fb ldr r3, [r7, #12]
8007378: 681b ldr r3, [r3, #0]
800737a: 69da ldr r2, [r3, #28]
800737c: 68fb ldr r3, [r7, #12]
800737e: 681b ldr r3, [r3, #0]
8007380: f022 0204 bic.w r2, r2, #4
8007384: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
8007386: 68fb ldr r3, [r7, #12]
8007388: 681b ldr r3, [r3, #0]
800738a: 69d9 ldr r1, [r3, #28]
800738c: 68bb ldr r3, [r7, #8]
800738e: 691a ldr r2, [r3, #16]
8007390: 68fb ldr r3, [r7, #12]
8007392: 681b ldr r3, [r3, #0]
8007394: 430a orrs r2, r1
8007396: 61da str r2, [r3, #28]
break;
8007398: e023 b.n 80073e2 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
800739a: 68fb ldr r3, [r7, #12]
800739c: 681b ldr r3, [r3, #0]
800739e: 68b9 ldr r1, [r7, #8]
80073a0: 4618 mov r0, r3
80073a2: f000 fabf bl 8007924 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
80073a6: 68fb ldr r3, [r7, #12]
80073a8: 681b ldr r3, [r3, #0]
80073aa: 69da ldr r2, [r3, #28]
80073ac: 68fb ldr r3, [r7, #12]
80073ae: 681b ldr r3, [r3, #0]
80073b0: f442 6200 orr.w r2, r2, #2048 @ 0x800
80073b4: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
80073b6: 68fb ldr r3, [r7, #12]
80073b8: 681b ldr r3, [r3, #0]
80073ba: 69da ldr r2, [r3, #28]
80073bc: 68fb ldr r3, [r7, #12]
80073be: 681b ldr r3, [r3, #0]
80073c0: f422 6280 bic.w r2, r2, #1024 @ 0x400
80073c4: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
80073c6: 68fb ldr r3, [r7, #12]
80073c8: 681b ldr r3, [r3, #0]
80073ca: 69d9 ldr r1, [r3, #28]
80073cc: 68bb ldr r3, [r7, #8]
80073ce: 691b ldr r3, [r3, #16]
80073d0: 021a lsls r2, r3, #8
80073d2: 68fb ldr r3, [r7, #12]
80073d4: 681b ldr r3, [r3, #0]
80073d6: 430a orrs r2, r1
80073d8: 61da str r2, [r3, #28]
break;
80073da: e002 b.n 80073e2 <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
80073dc: 2301 movs r3, #1
80073de: 75fb strb r3, [r7, #23]
break;
80073e0: bf00 nop
}
__HAL_UNLOCK(htim);
80073e2: 68fb ldr r3, [r7, #12]
80073e4: 2200 movs r2, #0
80073e6: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
80073ea: 7dfb ldrb r3, [r7, #23]
}
80073ec: 4618 mov r0, r3
80073ee: 3718 adds r7, #24
80073f0: 46bd mov sp, r7
80073f2: bd80 pop {r7, pc}
080073f4 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
80073f4: b580 push {r7, lr}
80073f6: b084 sub sp, #16
80073f8: af00 add r7, sp, #0
80073fa: 6078 str r0, [r7, #4]
80073fc: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
80073fe: 2300 movs r3, #0
8007400: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
8007402: 687b ldr r3, [r7, #4]
8007404: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8007408: 2b01 cmp r3, #1
800740a: d101 bne.n 8007410 <HAL_TIM_ConfigClockSource+0x1c>
800740c: 2302 movs r3, #2
800740e: e0b4 b.n 800757a <HAL_TIM_ConfigClockSource+0x186>
8007410: 687b ldr r3, [r7, #4]
8007412: 2201 movs r2, #1
8007414: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
8007418: 687b ldr r3, [r7, #4]
800741a: 2202 movs r2, #2
800741c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8007420: 687b ldr r3, [r7, #4]
8007422: 681b ldr r3, [r3, #0]
8007424: 689b ldr r3, [r3, #8]
8007426: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
8007428: 68bb ldr r3, [r7, #8]
800742a: f023 0377 bic.w r3, r3, #119 @ 0x77
800742e: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8007430: 68bb ldr r3, [r7, #8]
8007432: f423 437f bic.w r3, r3, #65280 @ 0xff00
8007436: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
8007438: 687b ldr r3, [r7, #4]
800743a: 681b ldr r3, [r3, #0]
800743c: 68ba ldr r2, [r7, #8]
800743e: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8007440: 683b ldr r3, [r7, #0]
8007442: 681b ldr r3, [r3, #0]
8007444: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8007448: d03e beq.n 80074c8 <HAL_TIM_ConfigClockSource+0xd4>
800744a: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800744e: f200 8087 bhi.w 8007560 <HAL_TIM_ConfigClockSource+0x16c>
8007452: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8007456: f000 8086 beq.w 8007566 <HAL_TIM_ConfigClockSource+0x172>
800745a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800745e: d87f bhi.n 8007560 <HAL_TIM_ConfigClockSource+0x16c>
8007460: 2b70 cmp r3, #112 @ 0x70
8007462: d01a beq.n 800749a <HAL_TIM_ConfigClockSource+0xa6>
8007464: 2b70 cmp r3, #112 @ 0x70
8007466: d87b bhi.n 8007560 <HAL_TIM_ConfigClockSource+0x16c>
8007468: 2b60 cmp r3, #96 @ 0x60
800746a: d050 beq.n 800750e <HAL_TIM_ConfigClockSource+0x11a>
800746c: 2b60 cmp r3, #96 @ 0x60
800746e: d877 bhi.n 8007560 <HAL_TIM_ConfigClockSource+0x16c>
8007470: 2b50 cmp r3, #80 @ 0x50
8007472: d03c beq.n 80074ee <HAL_TIM_ConfigClockSource+0xfa>
8007474: 2b50 cmp r3, #80 @ 0x50
8007476: d873 bhi.n 8007560 <HAL_TIM_ConfigClockSource+0x16c>
8007478: 2b40 cmp r3, #64 @ 0x40
800747a: d058 beq.n 800752e <HAL_TIM_ConfigClockSource+0x13a>
800747c: 2b40 cmp r3, #64 @ 0x40
800747e: d86f bhi.n 8007560 <HAL_TIM_ConfigClockSource+0x16c>
8007480: 2b30 cmp r3, #48 @ 0x30
8007482: d064 beq.n 800754e <HAL_TIM_ConfigClockSource+0x15a>
8007484: 2b30 cmp r3, #48 @ 0x30
8007486: d86b bhi.n 8007560 <HAL_TIM_ConfigClockSource+0x16c>
8007488: 2b20 cmp r3, #32
800748a: d060 beq.n 800754e <HAL_TIM_ConfigClockSource+0x15a>
800748c: 2b20 cmp r3, #32
800748e: d867 bhi.n 8007560 <HAL_TIM_ConfigClockSource+0x16c>
8007490: 2b00 cmp r3, #0
8007492: d05c beq.n 800754e <HAL_TIM_ConfigClockSource+0x15a>
8007494: 2b10 cmp r3, #16
8007496: d05a beq.n 800754e <HAL_TIM_ConfigClockSource+0x15a>
8007498: e062 b.n 8007560 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
800749a: 687b ldr r3, [r7, #4]
800749c: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
800749e: 683b ldr r3, [r7, #0]
80074a0: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80074a2: 683b ldr r3, [r7, #0]
80074a4: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80074a6: 683b ldr r3, [r7, #0]
80074a8: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80074aa: f000 fb00 bl 8007aae <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
80074ae: 687b ldr r3, [r7, #4]
80074b0: 681b ldr r3, [r3, #0]
80074b2: 689b ldr r3, [r3, #8]
80074b4: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
80074b6: 68bb ldr r3, [r7, #8]
80074b8: f043 0377 orr.w r3, r3, #119 @ 0x77
80074bc: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80074be: 687b ldr r3, [r7, #4]
80074c0: 681b ldr r3, [r3, #0]
80074c2: 68ba ldr r2, [r7, #8]
80074c4: 609a str r2, [r3, #8]
break;
80074c6: e04f b.n 8007568 <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80074c8: 687b ldr r3, [r7, #4]
80074ca: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
80074cc: 683b ldr r3, [r7, #0]
80074ce: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80074d0: 683b ldr r3, [r7, #0]
80074d2: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80074d4: 683b ldr r3, [r7, #0]
80074d6: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80074d8: f000 fae9 bl 8007aae <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
80074dc: 687b ldr r3, [r7, #4]
80074de: 681b ldr r3, [r3, #0]
80074e0: 689a ldr r2, [r3, #8]
80074e2: 687b ldr r3, [r7, #4]
80074e4: 681b ldr r3, [r3, #0]
80074e6: f442 4280 orr.w r2, r2, #16384 @ 0x4000
80074ea: 609a str r2, [r3, #8]
break;
80074ec: e03c b.n 8007568 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
80074ee: 687b ldr r3, [r7, #4]
80074f0: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80074f2: 683b ldr r3, [r7, #0]
80074f4: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80074f6: 683b ldr r3, [r7, #0]
80074f8: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
80074fa: 461a mov r2, r3
80074fc: f000 fa60 bl 80079c0 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
8007500: 687b ldr r3, [r7, #4]
8007502: 681b ldr r3, [r3, #0]
8007504: 2150 movs r1, #80 @ 0x50
8007506: 4618 mov r0, r3
8007508: f000 fab7 bl 8007a7a <TIM_ITRx_SetConfig>
break;
800750c: e02c b.n 8007568 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
800750e: 687b ldr r3, [r7, #4]
8007510: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8007512: 683b ldr r3, [r7, #0]
8007514: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8007516: 683b ldr r3, [r7, #0]
8007518: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
800751a: 461a mov r2, r3
800751c: f000 fa7e bl 8007a1c <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8007520: 687b ldr r3, [r7, #4]
8007522: 681b ldr r3, [r3, #0]
8007524: 2160 movs r1, #96 @ 0x60
8007526: 4618 mov r0, r3
8007528: f000 faa7 bl 8007a7a <TIM_ITRx_SetConfig>
break;
800752c: e01c b.n 8007568 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
800752e: 687b ldr r3, [r7, #4]
8007530: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8007532: 683b ldr r3, [r7, #0]
8007534: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8007536: 683b ldr r3, [r7, #0]
8007538: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
800753a: 461a mov r2, r3
800753c: f000 fa40 bl 80079c0 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8007540: 687b ldr r3, [r7, #4]
8007542: 681b ldr r3, [r3, #0]
8007544: 2140 movs r1, #64 @ 0x40
8007546: 4618 mov r0, r3
8007548: f000 fa97 bl 8007a7a <TIM_ITRx_SetConfig>
break;
800754c: e00c b.n 8007568 <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
800754e: 687b ldr r3, [r7, #4]
8007550: 681a ldr r2, [r3, #0]
8007552: 683b ldr r3, [r7, #0]
8007554: 681b ldr r3, [r3, #0]
8007556: 4619 mov r1, r3
8007558: 4610 mov r0, r2
800755a: f000 fa8e bl 8007a7a <TIM_ITRx_SetConfig>
break;
800755e: e003 b.n 8007568 <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8007560: 2301 movs r3, #1
8007562: 73fb strb r3, [r7, #15]
break;
8007564: e000 b.n 8007568 <HAL_TIM_ConfigClockSource+0x174>
break;
8007566: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
8007568: 687b ldr r3, [r7, #4]
800756a: 2201 movs r2, #1
800756c: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8007570: 687b ldr r3, [r7, #4]
8007572: 2200 movs r2, #0
8007574: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8007578: 7bfb ldrb r3, [r7, #15]
}
800757a: 4618 mov r0, r3
800757c: 3710 adds r7, #16
800757e: 46bd mov sp, r7
8007580: bd80 pop {r7, pc}
08007582 <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
8007582: b480 push {r7}
8007584: b085 sub sp, #20
8007586: af00 add r7, sp, #0
8007588: 6078 str r0, [r7, #4]
800758a: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
800758c: 683b ldr r3, [r7, #0]
800758e: 2b00 cmp r3, #0
8007590: d104 bne.n 800759c <HAL_TIM_GetChannelState+0x1a>
8007592: 687b ldr r3, [r7, #4]
8007594: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8007598: b2db uxtb r3, r3
800759a: e013 b.n 80075c4 <HAL_TIM_GetChannelState+0x42>
800759c: 683b ldr r3, [r7, #0]
800759e: 2b04 cmp r3, #4
80075a0: d104 bne.n 80075ac <HAL_TIM_GetChannelState+0x2a>
80075a2: 687b ldr r3, [r7, #4]
80075a4: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
80075a8: b2db uxtb r3, r3
80075aa: e00b b.n 80075c4 <HAL_TIM_GetChannelState+0x42>
80075ac: 683b ldr r3, [r7, #0]
80075ae: 2b08 cmp r3, #8
80075b0: d104 bne.n 80075bc <HAL_TIM_GetChannelState+0x3a>
80075b2: 687b ldr r3, [r7, #4]
80075b4: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80075b8: b2db uxtb r3, r3
80075ba: e003 b.n 80075c4 <HAL_TIM_GetChannelState+0x42>
80075bc: 687b ldr r3, [r7, #4]
80075be: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80075c2: b2db uxtb r3, r3
80075c4: 73fb strb r3, [r7, #15]
return channel_state;
80075c6: 7bfb ldrb r3, [r7, #15]
}
80075c8: 4618 mov r0, r3
80075ca: 3714 adds r7, #20
80075cc: 46bd mov sp, r7
80075ce: bc80 pop {r7}
80075d0: 4770 bx lr
...
080075d4 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
80075d4: b480 push {r7}
80075d6: b085 sub sp, #20
80075d8: af00 add r7, sp, #0
80075da: 6078 str r0, [r7, #4]
80075dc: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
80075de: 687b ldr r3, [r7, #4]
80075e0: 681b ldr r3, [r3, #0]
80075e2: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
80075e4: 687b ldr r3, [r7, #4]
80075e6: 4a2f ldr r2, [pc, #188] @ (80076a4 <TIM_Base_SetConfig+0xd0>)
80075e8: 4293 cmp r3, r2
80075ea: d00b beq.n 8007604 <TIM_Base_SetConfig+0x30>
80075ec: 687b ldr r3, [r7, #4]
80075ee: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80075f2: d007 beq.n 8007604 <TIM_Base_SetConfig+0x30>
80075f4: 687b ldr r3, [r7, #4]
80075f6: 4a2c ldr r2, [pc, #176] @ (80076a8 <TIM_Base_SetConfig+0xd4>)
80075f8: 4293 cmp r3, r2
80075fa: d003 beq.n 8007604 <TIM_Base_SetConfig+0x30>
80075fc: 687b ldr r3, [r7, #4]
80075fe: 4a2b ldr r2, [pc, #172] @ (80076ac <TIM_Base_SetConfig+0xd8>)
8007600: 4293 cmp r3, r2
8007602: d108 bne.n 8007616 <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8007604: 68fb ldr r3, [r7, #12]
8007606: f023 0370 bic.w r3, r3, #112 @ 0x70
800760a: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
800760c: 683b ldr r3, [r7, #0]
800760e: 685b ldr r3, [r3, #4]
8007610: 68fa ldr r2, [r7, #12]
8007612: 4313 orrs r3, r2
8007614: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
8007616: 687b ldr r3, [r7, #4]
8007618: 4a22 ldr r2, [pc, #136] @ (80076a4 <TIM_Base_SetConfig+0xd0>)
800761a: 4293 cmp r3, r2
800761c: d00b beq.n 8007636 <TIM_Base_SetConfig+0x62>
800761e: 687b ldr r3, [r7, #4]
8007620: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8007624: d007 beq.n 8007636 <TIM_Base_SetConfig+0x62>
8007626: 687b ldr r3, [r7, #4]
8007628: 4a1f ldr r2, [pc, #124] @ (80076a8 <TIM_Base_SetConfig+0xd4>)
800762a: 4293 cmp r3, r2
800762c: d003 beq.n 8007636 <TIM_Base_SetConfig+0x62>
800762e: 687b ldr r3, [r7, #4]
8007630: 4a1e ldr r2, [pc, #120] @ (80076ac <TIM_Base_SetConfig+0xd8>)
8007632: 4293 cmp r3, r2
8007634: d108 bne.n 8007648 <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
8007636: 68fb ldr r3, [r7, #12]
8007638: f423 7340 bic.w r3, r3, #768 @ 0x300
800763c: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
800763e: 683b ldr r3, [r7, #0]
8007640: 68db ldr r3, [r3, #12]
8007642: 68fa ldr r2, [r7, #12]
8007644: 4313 orrs r3, r2
8007646: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8007648: 68fb ldr r3, [r7, #12]
800764a: f023 0280 bic.w r2, r3, #128 @ 0x80
800764e: 683b ldr r3, [r7, #0]
8007650: 695b ldr r3, [r3, #20]
8007652: 4313 orrs r3, r2
8007654: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
8007656: 687b ldr r3, [r7, #4]
8007658: 68fa ldr r2, [r7, #12]
800765a: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
800765c: 683b ldr r3, [r7, #0]
800765e: 689a ldr r2, [r3, #8]
8007660: 687b ldr r3, [r7, #4]
8007662: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8007664: 683b ldr r3, [r7, #0]
8007666: 681a ldr r2, [r3, #0]
8007668: 687b ldr r3, [r7, #4]
800766a: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
800766c: 687b ldr r3, [r7, #4]
800766e: 4a0d ldr r2, [pc, #52] @ (80076a4 <TIM_Base_SetConfig+0xd0>)
8007670: 4293 cmp r3, r2
8007672: d103 bne.n 800767c <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8007674: 683b ldr r3, [r7, #0]
8007676: 691a ldr r2, [r3, #16]
8007678: 687b ldr r3, [r7, #4]
800767a: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
800767c: 687b ldr r3, [r7, #4]
800767e: 2201 movs r2, #1
8007680: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
8007682: 687b ldr r3, [r7, #4]
8007684: 691b ldr r3, [r3, #16]
8007686: f003 0301 and.w r3, r3, #1
800768a: 2b00 cmp r3, #0
800768c: d005 beq.n 800769a <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
800768e: 687b ldr r3, [r7, #4]
8007690: 691b ldr r3, [r3, #16]
8007692: f023 0201 bic.w r2, r3, #1
8007696: 687b ldr r3, [r7, #4]
8007698: 611a str r2, [r3, #16]
}
}
800769a: bf00 nop
800769c: 3714 adds r7, #20
800769e: 46bd mov sp, r7
80076a0: bc80 pop {r7}
80076a2: 4770 bx lr
80076a4: 40012c00 .word 0x40012c00
80076a8: 40000400 .word 0x40000400
80076ac: 40000800 .word 0x40000800
080076b0 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80076b0: b480 push {r7}
80076b2: b087 sub sp, #28
80076b4: af00 add r7, sp, #0
80076b6: 6078 str r0, [r7, #4]
80076b8: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80076ba: 687b ldr r3, [r7, #4]
80076bc: 6a1b ldr r3, [r3, #32]
80076be: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
80076c0: 687b ldr r3, [r7, #4]
80076c2: 6a1b ldr r3, [r3, #32]
80076c4: f023 0201 bic.w r2, r3, #1
80076c8: 687b ldr r3, [r7, #4]
80076ca: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80076cc: 687b ldr r3, [r7, #4]
80076ce: 685b ldr r3, [r3, #4]
80076d0: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80076d2: 687b ldr r3, [r7, #4]
80076d4: 699b ldr r3, [r3, #24]
80076d6: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
80076d8: 68fb ldr r3, [r7, #12]
80076da: f023 0370 bic.w r3, r3, #112 @ 0x70
80076de: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
80076e0: 68fb ldr r3, [r7, #12]
80076e2: f023 0303 bic.w r3, r3, #3
80076e6: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
80076e8: 683b ldr r3, [r7, #0]
80076ea: 681b ldr r3, [r3, #0]
80076ec: 68fa ldr r2, [r7, #12]
80076ee: 4313 orrs r3, r2
80076f0: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
80076f2: 697b ldr r3, [r7, #20]
80076f4: f023 0302 bic.w r3, r3, #2
80076f8: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
80076fa: 683b ldr r3, [r7, #0]
80076fc: 689b ldr r3, [r3, #8]
80076fe: 697a ldr r2, [r7, #20]
8007700: 4313 orrs r3, r2
8007702: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
8007704: 687b ldr r3, [r7, #4]
8007706: 4a1c ldr r2, [pc, #112] @ (8007778 <TIM_OC1_SetConfig+0xc8>)
8007708: 4293 cmp r3, r2
800770a: d10c bne.n 8007726 <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
800770c: 697b ldr r3, [r7, #20]
800770e: f023 0308 bic.w r3, r3, #8
8007712: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
8007714: 683b ldr r3, [r7, #0]
8007716: 68db ldr r3, [r3, #12]
8007718: 697a ldr r2, [r7, #20]
800771a: 4313 orrs r3, r2
800771c: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
800771e: 697b ldr r3, [r7, #20]
8007720: f023 0304 bic.w r3, r3, #4
8007724: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8007726: 687b ldr r3, [r7, #4]
8007728: 4a13 ldr r2, [pc, #76] @ (8007778 <TIM_OC1_SetConfig+0xc8>)
800772a: 4293 cmp r3, r2
800772c: d111 bne.n 8007752 <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
800772e: 693b ldr r3, [r7, #16]
8007730: f423 7380 bic.w r3, r3, #256 @ 0x100
8007734: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
8007736: 693b ldr r3, [r7, #16]
8007738: f423 7300 bic.w r3, r3, #512 @ 0x200
800773c: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
800773e: 683b ldr r3, [r7, #0]
8007740: 695b ldr r3, [r3, #20]
8007742: 693a ldr r2, [r7, #16]
8007744: 4313 orrs r3, r2
8007746: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
8007748: 683b ldr r3, [r7, #0]
800774a: 699b ldr r3, [r3, #24]
800774c: 693a ldr r2, [r7, #16]
800774e: 4313 orrs r3, r2
8007750: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8007752: 687b ldr r3, [r7, #4]
8007754: 693a ldr r2, [r7, #16]
8007756: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8007758: 687b ldr r3, [r7, #4]
800775a: 68fa ldr r2, [r7, #12]
800775c: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
800775e: 683b ldr r3, [r7, #0]
8007760: 685a ldr r2, [r3, #4]
8007762: 687b ldr r3, [r7, #4]
8007764: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8007766: 687b ldr r3, [r7, #4]
8007768: 697a ldr r2, [r7, #20]
800776a: 621a str r2, [r3, #32]
}
800776c: bf00 nop
800776e: 371c adds r7, #28
8007770: 46bd mov sp, r7
8007772: bc80 pop {r7}
8007774: 4770 bx lr
8007776: bf00 nop
8007778: 40012c00 .word 0x40012c00
0800777c <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
800777c: b480 push {r7}
800777e: b087 sub sp, #28
8007780: af00 add r7, sp, #0
8007782: 6078 str r0, [r7, #4]
8007784: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8007786: 687b ldr r3, [r7, #4]
8007788: 6a1b ldr r3, [r3, #32]
800778a: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
800778c: 687b ldr r3, [r7, #4]
800778e: 6a1b ldr r3, [r3, #32]
8007790: f023 0210 bic.w r2, r3, #16
8007794: 687b ldr r3, [r7, #4]
8007796: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8007798: 687b ldr r3, [r7, #4]
800779a: 685b ldr r3, [r3, #4]
800779c: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
800779e: 687b ldr r3, [r7, #4]
80077a0: 699b ldr r3, [r3, #24]
80077a2: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
80077a4: 68fb ldr r3, [r7, #12]
80077a6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80077aa: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
80077ac: 68fb ldr r3, [r7, #12]
80077ae: f423 7340 bic.w r3, r3, #768 @ 0x300
80077b2: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80077b4: 683b ldr r3, [r7, #0]
80077b6: 681b ldr r3, [r3, #0]
80077b8: 021b lsls r3, r3, #8
80077ba: 68fa ldr r2, [r7, #12]
80077bc: 4313 orrs r3, r2
80077be: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
80077c0: 697b ldr r3, [r7, #20]
80077c2: f023 0320 bic.w r3, r3, #32
80077c6: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
80077c8: 683b ldr r3, [r7, #0]
80077ca: 689b ldr r3, [r3, #8]
80077cc: 011b lsls r3, r3, #4
80077ce: 697a ldr r2, [r7, #20]
80077d0: 4313 orrs r3, r2
80077d2: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
80077d4: 687b ldr r3, [r7, #4]
80077d6: 4a1d ldr r2, [pc, #116] @ (800784c <TIM_OC2_SetConfig+0xd0>)
80077d8: 4293 cmp r3, r2
80077da: d10d bne.n 80077f8 <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
80077dc: 697b ldr r3, [r7, #20]
80077de: f023 0380 bic.w r3, r3, #128 @ 0x80
80077e2: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
80077e4: 683b ldr r3, [r7, #0]
80077e6: 68db ldr r3, [r3, #12]
80077e8: 011b lsls r3, r3, #4
80077ea: 697a ldr r2, [r7, #20]
80077ec: 4313 orrs r3, r2
80077ee: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
80077f0: 697b ldr r3, [r7, #20]
80077f2: f023 0340 bic.w r3, r3, #64 @ 0x40
80077f6: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80077f8: 687b ldr r3, [r7, #4]
80077fa: 4a14 ldr r2, [pc, #80] @ (800784c <TIM_OC2_SetConfig+0xd0>)
80077fc: 4293 cmp r3, r2
80077fe: d113 bne.n 8007828 <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8007800: 693b ldr r3, [r7, #16]
8007802: f423 6380 bic.w r3, r3, #1024 @ 0x400
8007806: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
8007808: 693b ldr r3, [r7, #16]
800780a: f423 6300 bic.w r3, r3, #2048 @ 0x800
800780e: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8007810: 683b ldr r3, [r7, #0]
8007812: 695b ldr r3, [r3, #20]
8007814: 009b lsls r3, r3, #2
8007816: 693a ldr r2, [r7, #16]
8007818: 4313 orrs r3, r2
800781a: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
800781c: 683b ldr r3, [r7, #0]
800781e: 699b ldr r3, [r3, #24]
8007820: 009b lsls r3, r3, #2
8007822: 693a ldr r2, [r7, #16]
8007824: 4313 orrs r3, r2
8007826: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8007828: 687b ldr r3, [r7, #4]
800782a: 693a ldr r2, [r7, #16]
800782c: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
800782e: 687b ldr r3, [r7, #4]
8007830: 68fa ldr r2, [r7, #12]
8007832: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8007834: 683b ldr r3, [r7, #0]
8007836: 685a ldr r2, [r3, #4]
8007838: 687b ldr r3, [r7, #4]
800783a: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800783c: 687b ldr r3, [r7, #4]
800783e: 697a ldr r2, [r7, #20]
8007840: 621a str r2, [r3, #32]
}
8007842: bf00 nop
8007844: 371c adds r7, #28
8007846: 46bd mov sp, r7
8007848: bc80 pop {r7}
800784a: 4770 bx lr
800784c: 40012c00 .word 0x40012c00
08007850 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8007850: b480 push {r7}
8007852: b087 sub sp, #28
8007854: af00 add r7, sp, #0
8007856: 6078 str r0, [r7, #4]
8007858: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800785a: 687b ldr r3, [r7, #4]
800785c: 6a1b ldr r3, [r3, #32]
800785e: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8007860: 687b ldr r3, [r7, #4]
8007862: 6a1b ldr r3, [r3, #32]
8007864: f423 7280 bic.w r2, r3, #256 @ 0x100
8007868: 687b ldr r3, [r7, #4]
800786a: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
800786c: 687b ldr r3, [r7, #4]
800786e: 685b ldr r3, [r3, #4]
8007870: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8007872: 687b ldr r3, [r7, #4]
8007874: 69db ldr r3, [r3, #28]
8007876: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
8007878: 68fb ldr r3, [r7, #12]
800787a: f023 0370 bic.w r3, r3, #112 @ 0x70
800787e: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8007880: 68fb ldr r3, [r7, #12]
8007882: f023 0303 bic.w r3, r3, #3
8007886: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8007888: 683b ldr r3, [r7, #0]
800788a: 681b ldr r3, [r3, #0]
800788c: 68fa ldr r2, [r7, #12]
800788e: 4313 orrs r3, r2
8007890: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
8007892: 697b ldr r3, [r7, #20]
8007894: f423 7300 bic.w r3, r3, #512 @ 0x200
8007898: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
800789a: 683b ldr r3, [r7, #0]
800789c: 689b ldr r3, [r3, #8]
800789e: 021b lsls r3, r3, #8
80078a0: 697a ldr r2, [r7, #20]
80078a2: 4313 orrs r3, r2
80078a4: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
80078a6: 687b ldr r3, [r7, #4]
80078a8: 4a1d ldr r2, [pc, #116] @ (8007920 <TIM_OC3_SetConfig+0xd0>)
80078aa: 4293 cmp r3, r2
80078ac: d10d bne.n 80078ca <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
80078ae: 697b ldr r3, [r7, #20]
80078b0: f423 6300 bic.w r3, r3, #2048 @ 0x800
80078b4: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
80078b6: 683b ldr r3, [r7, #0]
80078b8: 68db ldr r3, [r3, #12]
80078ba: 021b lsls r3, r3, #8
80078bc: 697a ldr r2, [r7, #20]
80078be: 4313 orrs r3, r2
80078c0: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
80078c2: 697b ldr r3, [r7, #20]
80078c4: f423 6380 bic.w r3, r3, #1024 @ 0x400
80078c8: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80078ca: 687b ldr r3, [r7, #4]
80078cc: 4a14 ldr r2, [pc, #80] @ (8007920 <TIM_OC3_SetConfig+0xd0>)
80078ce: 4293 cmp r3, r2
80078d0: d113 bne.n 80078fa <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
80078d2: 693b ldr r3, [r7, #16]
80078d4: f423 5380 bic.w r3, r3, #4096 @ 0x1000
80078d8: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
80078da: 693b ldr r3, [r7, #16]
80078dc: f423 5300 bic.w r3, r3, #8192 @ 0x2000
80078e0: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
80078e2: 683b ldr r3, [r7, #0]
80078e4: 695b ldr r3, [r3, #20]
80078e6: 011b lsls r3, r3, #4
80078e8: 693a ldr r2, [r7, #16]
80078ea: 4313 orrs r3, r2
80078ec: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
80078ee: 683b ldr r3, [r7, #0]
80078f0: 699b ldr r3, [r3, #24]
80078f2: 011b lsls r3, r3, #4
80078f4: 693a ldr r2, [r7, #16]
80078f6: 4313 orrs r3, r2
80078f8: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80078fa: 687b ldr r3, [r7, #4]
80078fc: 693a ldr r2, [r7, #16]
80078fe: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8007900: 687b ldr r3, [r7, #4]
8007902: 68fa ldr r2, [r7, #12]
8007904: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
8007906: 683b ldr r3, [r7, #0]
8007908: 685a ldr r2, [r3, #4]
800790a: 687b ldr r3, [r7, #4]
800790c: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800790e: 687b ldr r3, [r7, #4]
8007910: 697a ldr r2, [r7, #20]
8007912: 621a str r2, [r3, #32]
}
8007914: bf00 nop
8007916: 371c adds r7, #28
8007918: 46bd mov sp, r7
800791a: bc80 pop {r7}
800791c: 4770 bx lr
800791e: bf00 nop
8007920: 40012c00 .word 0x40012c00
08007924 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8007924: b480 push {r7}
8007926: b087 sub sp, #28
8007928: af00 add r7, sp, #0
800792a: 6078 str r0, [r7, #4]
800792c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800792e: 687b ldr r3, [r7, #4]
8007930: 6a1b ldr r3, [r3, #32]
8007932: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
8007934: 687b ldr r3, [r7, #4]
8007936: 6a1b ldr r3, [r3, #32]
8007938: f423 5280 bic.w r2, r3, #4096 @ 0x1000
800793c: 687b ldr r3, [r7, #4]
800793e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8007940: 687b ldr r3, [r7, #4]
8007942: 685b ldr r3, [r3, #4]
8007944: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8007946: 687b ldr r3, [r7, #4]
8007948: 69db ldr r3, [r3, #28]
800794a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
800794c: 68fb ldr r3, [r7, #12]
800794e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007952: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
8007954: 68fb ldr r3, [r7, #12]
8007956: f423 7340 bic.w r3, r3, #768 @ 0x300
800795a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
800795c: 683b ldr r3, [r7, #0]
800795e: 681b ldr r3, [r3, #0]
8007960: 021b lsls r3, r3, #8
8007962: 68fa ldr r2, [r7, #12]
8007964: 4313 orrs r3, r2
8007966: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8007968: 693b ldr r3, [r7, #16]
800796a: f423 5300 bic.w r3, r3, #8192 @ 0x2000
800796e: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8007970: 683b ldr r3, [r7, #0]
8007972: 689b ldr r3, [r3, #8]
8007974: 031b lsls r3, r3, #12
8007976: 693a ldr r2, [r7, #16]
8007978: 4313 orrs r3, r2
800797a: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
800797c: 687b ldr r3, [r7, #4]
800797e: 4a0f ldr r2, [pc, #60] @ (80079bc <TIM_OC4_SetConfig+0x98>)
8007980: 4293 cmp r3, r2
8007982: d109 bne.n 8007998 <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8007984: 697b ldr r3, [r7, #20]
8007986: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800798a: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
800798c: 683b ldr r3, [r7, #0]
800798e: 695b ldr r3, [r3, #20]
8007990: 019b lsls r3, r3, #6
8007992: 697a ldr r2, [r7, #20]
8007994: 4313 orrs r3, r2
8007996: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8007998: 687b ldr r3, [r7, #4]
800799a: 697a ldr r2, [r7, #20]
800799c: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
800799e: 687b ldr r3, [r7, #4]
80079a0: 68fa ldr r2, [r7, #12]
80079a2: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
80079a4: 683b ldr r3, [r7, #0]
80079a6: 685a ldr r2, [r3, #4]
80079a8: 687b ldr r3, [r7, #4]
80079aa: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80079ac: 687b ldr r3, [r7, #4]
80079ae: 693a ldr r2, [r7, #16]
80079b0: 621a str r2, [r3, #32]
}
80079b2: bf00 nop
80079b4: 371c adds r7, #28
80079b6: 46bd mov sp, r7
80079b8: bc80 pop {r7}
80079ba: 4770 bx lr
80079bc: 40012c00 .word 0x40012c00
080079c0 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
80079c0: b480 push {r7}
80079c2: b087 sub sp, #28
80079c4: af00 add r7, sp, #0
80079c6: 60f8 str r0, [r7, #12]
80079c8: 60b9 str r1, [r7, #8]
80079ca: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
80079cc: 68fb ldr r3, [r7, #12]
80079ce: 6a1b ldr r3, [r3, #32]
80079d0: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
80079d2: 68fb ldr r3, [r7, #12]
80079d4: 6a1b ldr r3, [r3, #32]
80079d6: f023 0201 bic.w r2, r3, #1
80079da: 68fb ldr r3, [r7, #12]
80079dc: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
80079de: 68fb ldr r3, [r7, #12]
80079e0: 699b ldr r3, [r3, #24]
80079e2: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
80079e4: 693b ldr r3, [r7, #16]
80079e6: f023 03f0 bic.w r3, r3, #240 @ 0xf0
80079ea: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
80079ec: 687b ldr r3, [r7, #4]
80079ee: 011b lsls r3, r3, #4
80079f0: 693a ldr r2, [r7, #16]
80079f2: 4313 orrs r3, r2
80079f4: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
80079f6: 697b ldr r3, [r7, #20]
80079f8: f023 030a bic.w r3, r3, #10
80079fc: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
80079fe: 697a ldr r2, [r7, #20]
8007a00: 68bb ldr r3, [r7, #8]
8007a02: 4313 orrs r3, r2
8007a04: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
8007a06: 68fb ldr r3, [r7, #12]
8007a08: 693a ldr r2, [r7, #16]
8007a0a: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8007a0c: 68fb ldr r3, [r7, #12]
8007a0e: 697a ldr r2, [r7, #20]
8007a10: 621a str r2, [r3, #32]
}
8007a12: bf00 nop
8007a14: 371c adds r7, #28
8007a16: 46bd mov sp, r7
8007a18: bc80 pop {r7}
8007a1a: 4770 bx lr
08007a1c <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8007a1c: b480 push {r7}
8007a1e: b087 sub sp, #28
8007a20: af00 add r7, sp, #0
8007a22: 60f8 str r0, [r7, #12]
8007a24: 60b9 str r1, [r7, #8]
8007a26: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
8007a28: 68fb ldr r3, [r7, #12]
8007a2a: 6a1b ldr r3, [r3, #32]
8007a2c: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8007a2e: 68fb ldr r3, [r7, #12]
8007a30: 6a1b ldr r3, [r3, #32]
8007a32: f023 0210 bic.w r2, r3, #16
8007a36: 68fb ldr r3, [r7, #12]
8007a38: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8007a3a: 68fb ldr r3, [r7, #12]
8007a3c: 699b ldr r3, [r3, #24]
8007a3e: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8007a40: 693b ldr r3, [r7, #16]
8007a42: f423 4370 bic.w r3, r3, #61440 @ 0xf000
8007a46: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
8007a48: 687b ldr r3, [r7, #4]
8007a4a: 031b lsls r3, r3, #12
8007a4c: 693a ldr r2, [r7, #16]
8007a4e: 4313 orrs r3, r2
8007a50: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8007a52: 697b ldr r3, [r7, #20]
8007a54: f023 03a0 bic.w r3, r3, #160 @ 0xa0
8007a58: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
8007a5a: 68bb ldr r3, [r7, #8]
8007a5c: 011b lsls r3, r3, #4
8007a5e: 697a ldr r2, [r7, #20]
8007a60: 4313 orrs r3, r2
8007a62: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8007a64: 68fb ldr r3, [r7, #12]
8007a66: 693a ldr r2, [r7, #16]
8007a68: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8007a6a: 68fb ldr r3, [r7, #12]
8007a6c: 697a ldr r2, [r7, #20]
8007a6e: 621a str r2, [r3, #32]
}
8007a70: bf00 nop
8007a72: 371c adds r7, #28
8007a74: 46bd mov sp, r7
8007a76: bc80 pop {r7}
8007a78: 4770 bx lr
08007a7a <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
8007a7a: b480 push {r7}
8007a7c: b085 sub sp, #20
8007a7e: af00 add r7, sp, #0
8007a80: 6078 str r0, [r7, #4]
8007a82: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8007a84: 687b ldr r3, [r7, #4]
8007a86: 689b ldr r3, [r3, #8]
8007a88: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8007a8a: 68fb ldr r3, [r7, #12]
8007a8c: f023 0370 bic.w r3, r3, #112 @ 0x70
8007a90: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8007a92: 683a ldr r2, [r7, #0]
8007a94: 68fb ldr r3, [r7, #12]
8007a96: 4313 orrs r3, r2
8007a98: f043 0307 orr.w r3, r3, #7
8007a9c: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8007a9e: 687b ldr r3, [r7, #4]
8007aa0: 68fa ldr r2, [r7, #12]
8007aa2: 609a str r2, [r3, #8]
}
8007aa4: bf00 nop
8007aa6: 3714 adds r7, #20
8007aa8: 46bd mov sp, r7
8007aaa: bc80 pop {r7}
8007aac: 4770 bx lr
08007aae <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
8007aae: b480 push {r7}
8007ab0: b087 sub sp, #28
8007ab2: af00 add r7, sp, #0
8007ab4: 60f8 str r0, [r7, #12]
8007ab6: 60b9 str r1, [r7, #8]
8007ab8: 607a str r2, [r7, #4]
8007aba: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8007abc: 68fb ldr r3, [r7, #12]
8007abe: 689b ldr r3, [r3, #8]
8007ac0: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8007ac2: 697b ldr r3, [r7, #20]
8007ac4: f423 437f bic.w r3, r3, #65280 @ 0xff00
8007ac8: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8007aca: 683b ldr r3, [r7, #0]
8007acc: 021a lsls r2, r3, #8
8007ace: 687b ldr r3, [r7, #4]
8007ad0: 431a orrs r2, r3
8007ad2: 68bb ldr r3, [r7, #8]
8007ad4: 4313 orrs r3, r2
8007ad6: 697a ldr r2, [r7, #20]
8007ad8: 4313 orrs r3, r2
8007ada: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8007adc: 68fb ldr r3, [r7, #12]
8007ade: 697a ldr r2, [r7, #20]
8007ae0: 609a str r2, [r3, #8]
}
8007ae2: bf00 nop
8007ae4: 371c adds r7, #28
8007ae6: 46bd mov sp, r7
8007ae8: bc80 pop {r7}
8007aea: 4770 bx lr
08007aec <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8007aec: b480 push {r7}
8007aee: b087 sub sp, #28
8007af0: af00 add r7, sp, #0
8007af2: 60f8 str r0, [r7, #12]
8007af4: 60b9 str r1, [r7, #8]
8007af6: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8007af8: 68bb ldr r3, [r7, #8]
8007afa: f003 031f and.w r3, r3, #31
8007afe: 2201 movs r2, #1
8007b00: fa02 f303 lsl.w r3, r2, r3
8007b04: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
8007b06: 68fb ldr r3, [r7, #12]
8007b08: 6a1a ldr r2, [r3, #32]
8007b0a: 697b ldr r3, [r7, #20]
8007b0c: 43db mvns r3, r3
8007b0e: 401a ands r2, r3
8007b10: 68fb ldr r3, [r7, #12]
8007b12: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8007b14: 68fb ldr r3, [r7, #12]
8007b16: 6a1a ldr r2, [r3, #32]
8007b18: 68bb ldr r3, [r7, #8]
8007b1a: f003 031f and.w r3, r3, #31
8007b1e: 6879 ldr r1, [r7, #4]
8007b20: fa01 f303 lsl.w r3, r1, r3
8007b24: 431a orrs r2, r3
8007b26: 68fb ldr r3, [r7, #12]
8007b28: 621a str r2, [r3, #32]
}
8007b2a: bf00 nop
8007b2c: 371c adds r7, #28
8007b2e: 46bd mov sp, r7
8007b30: bc80 pop {r7}
8007b32: 4770 bx lr
08007b34 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8007b34: b480 push {r7}
8007b36: b085 sub sp, #20
8007b38: af00 add r7, sp, #0
8007b3a: 6078 str r0, [r7, #4]
8007b3c: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8007b3e: 687b ldr r3, [r7, #4]
8007b40: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8007b44: 2b01 cmp r3, #1
8007b46: d101 bne.n 8007b4c <HAL_TIMEx_MasterConfigSynchronization+0x18>
8007b48: 2302 movs r3, #2
8007b4a: e046 b.n 8007bda <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8007b4c: 687b ldr r3, [r7, #4]
8007b4e: 2201 movs r2, #1
8007b50: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8007b54: 687b ldr r3, [r7, #4]
8007b56: 2202 movs r2, #2
8007b58: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8007b5c: 687b ldr r3, [r7, #4]
8007b5e: 681b ldr r3, [r3, #0]
8007b60: 685b ldr r3, [r3, #4]
8007b62: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8007b64: 687b ldr r3, [r7, #4]
8007b66: 681b ldr r3, [r3, #0]
8007b68: 689b ldr r3, [r3, #8]
8007b6a: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8007b6c: 68fb ldr r3, [r7, #12]
8007b6e: f023 0370 bic.w r3, r3, #112 @ 0x70
8007b72: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8007b74: 683b ldr r3, [r7, #0]
8007b76: 681b ldr r3, [r3, #0]
8007b78: 68fa ldr r2, [r7, #12]
8007b7a: 4313 orrs r3, r2
8007b7c: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8007b7e: 687b ldr r3, [r7, #4]
8007b80: 681b ldr r3, [r3, #0]
8007b82: 68fa ldr r2, [r7, #12]
8007b84: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8007b86: 687b ldr r3, [r7, #4]
8007b88: 681b ldr r3, [r3, #0]
8007b8a: 4a16 ldr r2, [pc, #88] @ (8007be4 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8007b8c: 4293 cmp r3, r2
8007b8e: d00e beq.n 8007bae <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8007b90: 687b ldr r3, [r7, #4]
8007b92: 681b ldr r3, [r3, #0]
8007b94: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8007b98: d009 beq.n 8007bae <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8007b9a: 687b ldr r3, [r7, #4]
8007b9c: 681b ldr r3, [r3, #0]
8007b9e: 4a12 ldr r2, [pc, #72] @ (8007be8 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8007ba0: 4293 cmp r3, r2
8007ba2: d004 beq.n 8007bae <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8007ba4: 687b ldr r3, [r7, #4]
8007ba6: 681b ldr r3, [r3, #0]
8007ba8: 4a10 ldr r2, [pc, #64] @ (8007bec <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
8007baa: 4293 cmp r3, r2
8007bac: d10c bne.n 8007bc8 <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8007bae: 68bb ldr r3, [r7, #8]
8007bb0: f023 0380 bic.w r3, r3, #128 @ 0x80
8007bb4: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8007bb6: 683b ldr r3, [r7, #0]
8007bb8: 685b ldr r3, [r3, #4]
8007bba: 68ba ldr r2, [r7, #8]
8007bbc: 4313 orrs r3, r2
8007bbe: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8007bc0: 687b ldr r3, [r7, #4]
8007bc2: 681b ldr r3, [r3, #0]
8007bc4: 68ba ldr r2, [r7, #8]
8007bc6: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8007bc8: 687b ldr r3, [r7, #4]
8007bca: 2201 movs r2, #1
8007bcc: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8007bd0: 687b ldr r3, [r7, #4]
8007bd2: 2200 movs r2, #0
8007bd4: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8007bd8: 2300 movs r3, #0
}
8007bda: 4618 mov r0, r3
8007bdc: 3714 adds r7, #20
8007bde: 46bd mov sp, r7
8007be0: bc80 pop {r7}
8007be2: 4770 bx lr
8007be4: 40012c00 .word 0x40012c00
8007be8: 40000400 .word 0x40000400
8007bec: 40000800 .word 0x40000800
08007bf0 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8007bf0: b580 push {r7, lr}
8007bf2: b082 sub sp, #8
8007bf4: af00 add r7, sp, #0
8007bf6: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8007bf8: 687b ldr r3, [r7, #4]
8007bfa: 2b00 cmp r3, #0
8007bfc: d101 bne.n 8007c02 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8007bfe: 2301 movs r3, #1
8007c00: e042 b.n 8007c88 <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
8007c02: 687b ldr r3, [r7, #4]
8007c04: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8007c08: b2db uxtb r3, r3
8007c0a: 2b00 cmp r3, #0
8007c0c: d106 bne.n 8007c1c <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8007c0e: 687b ldr r3, [r7, #4]
8007c10: 2200 movs r2, #0
8007c12: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
8007c16: 6878 ldr r0, [r7, #4]
8007c18: f7fb fb68 bl 80032ec <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8007c1c: 687b ldr r3, [r7, #4]
8007c1e: 2224 movs r2, #36 @ 0x24
8007c20: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8007c24: 687b ldr r3, [r7, #4]
8007c26: 681b ldr r3, [r3, #0]
8007c28: 68da ldr r2, [r3, #12]
8007c2a: 687b ldr r3, [r7, #4]
8007c2c: 681b ldr r3, [r3, #0]
8007c2e: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8007c32: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8007c34: 6878 ldr r0, [r7, #4]
8007c36: f000 f82b bl 8007c90 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8007c3a: 687b ldr r3, [r7, #4]
8007c3c: 681b ldr r3, [r3, #0]
8007c3e: 691a ldr r2, [r3, #16]
8007c40: 687b ldr r3, [r7, #4]
8007c42: 681b ldr r3, [r3, #0]
8007c44: f422 4290 bic.w r2, r2, #18432 @ 0x4800
8007c48: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8007c4a: 687b ldr r3, [r7, #4]
8007c4c: 681b ldr r3, [r3, #0]
8007c4e: 695a ldr r2, [r3, #20]
8007c50: 687b ldr r3, [r7, #4]
8007c52: 681b ldr r3, [r3, #0]
8007c54: f022 022a bic.w r2, r2, #42 @ 0x2a
8007c58: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
8007c5a: 687b ldr r3, [r7, #4]
8007c5c: 681b ldr r3, [r3, #0]
8007c5e: 68da ldr r2, [r3, #12]
8007c60: 687b ldr r3, [r7, #4]
8007c62: 681b ldr r3, [r3, #0]
8007c64: f442 5200 orr.w r2, r2, #8192 @ 0x2000
8007c68: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8007c6a: 687b ldr r3, [r7, #4]
8007c6c: 2200 movs r2, #0
8007c6e: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8007c70: 687b ldr r3, [r7, #4]
8007c72: 2220 movs r2, #32
8007c74: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
8007c78: 687b ldr r3, [r7, #4]
8007c7a: 2220 movs r2, #32
8007c7c: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
8007c80: 687b ldr r3, [r7, #4]
8007c82: 2200 movs r2, #0
8007c84: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
8007c86: 2300 movs r3, #0
}
8007c88: 4618 mov r0, r3
8007c8a: 3708 adds r7, #8
8007c8c: 46bd mov sp, r7
8007c8e: bd80 pop {r7, pc}
08007c90 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8007c90: b580 push {r7, lr}
8007c92: b084 sub sp, #16
8007c94: af00 add r7, sp, #0
8007c96: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8007c98: 687b ldr r3, [r7, #4]
8007c9a: 681b ldr r3, [r3, #0]
8007c9c: 691b ldr r3, [r3, #16]
8007c9e: f423 5140 bic.w r1, r3, #12288 @ 0x3000
8007ca2: 687b ldr r3, [r7, #4]
8007ca4: 68da ldr r2, [r3, #12]
8007ca6: 687b ldr r3, [r7, #4]
8007ca8: 681b ldr r3, [r3, #0]
8007caa: 430a orrs r2, r1
8007cac: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
8007cae: 687b ldr r3, [r7, #4]
8007cb0: 689a ldr r2, [r3, #8]
8007cb2: 687b ldr r3, [r7, #4]
8007cb4: 691b ldr r3, [r3, #16]
8007cb6: 431a orrs r2, r3
8007cb8: 687b ldr r3, [r7, #4]
8007cba: 695b ldr r3, [r3, #20]
8007cbc: 4313 orrs r3, r2
8007cbe: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8007cc0: 687b ldr r3, [r7, #4]
8007cc2: 681b ldr r3, [r3, #0]
8007cc4: 68db ldr r3, [r3, #12]
8007cc6: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
8007cca: f023 030c bic.w r3, r3, #12
8007cce: 687a ldr r2, [r7, #4]
8007cd0: 6812 ldr r2, [r2, #0]
8007cd2: 68b9 ldr r1, [r7, #8]
8007cd4: 430b orrs r3, r1
8007cd6: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8007cd8: 687b ldr r3, [r7, #4]
8007cda: 681b ldr r3, [r3, #0]
8007cdc: 695b ldr r3, [r3, #20]
8007cde: f423 7140 bic.w r1, r3, #768 @ 0x300
8007ce2: 687b ldr r3, [r7, #4]
8007ce4: 699a ldr r2, [r3, #24]
8007ce6: 687b ldr r3, [r7, #4]
8007ce8: 681b ldr r3, [r3, #0]
8007cea: 430a orrs r2, r1
8007cec: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8007cee: 687b ldr r3, [r7, #4]
8007cf0: 681b ldr r3, [r3, #0]
8007cf2: 4a2c ldr r2, [pc, #176] @ (8007da4 <UART_SetConfig+0x114>)
8007cf4: 4293 cmp r3, r2
8007cf6: d103 bne.n 8007d00 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8007cf8: f7ff f824 bl 8006d44 <HAL_RCC_GetPCLK2Freq>
8007cfc: 60f8 str r0, [r7, #12]
8007cfe: e002 b.n 8007d06 <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8007d00: f7ff f80c bl 8006d1c <HAL_RCC_GetPCLK1Freq>
8007d04: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8007d06: 68fa ldr r2, [r7, #12]
8007d08: 4613 mov r3, r2
8007d0a: 009b lsls r3, r3, #2
8007d0c: 4413 add r3, r2
8007d0e: 009a lsls r2, r3, #2
8007d10: 441a add r2, r3
8007d12: 687b ldr r3, [r7, #4]
8007d14: 685b ldr r3, [r3, #4]
8007d16: 009b lsls r3, r3, #2
8007d18: fbb2 f3f3 udiv r3, r2, r3
8007d1c: 4a22 ldr r2, [pc, #136] @ (8007da8 <UART_SetConfig+0x118>)
8007d1e: fba2 2303 umull r2, r3, r2, r3
8007d22: 095b lsrs r3, r3, #5
8007d24: 0119 lsls r1, r3, #4
8007d26: 68fa ldr r2, [r7, #12]
8007d28: 4613 mov r3, r2
8007d2a: 009b lsls r3, r3, #2
8007d2c: 4413 add r3, r2
8007d2e: 009a lsls r2, r3, #2
8007d30: 441a add r2, r3
8007d32: 687b ldr r3, [r7, #4]
8007d34: 685b ldr r3, [r3, #4]
8007d36: 009b lsls r3, r3, #2
8007d38: fbb2 f2f3 udiv r2, r2, r3
8007d3c: 4b1a ldr r3, [pc, #104] @ (8007da8 <UART_SetConfig+0x118>)
8007d3e: fba3 0302 umull r0, r3, r3, r2
8007d42: 095b lsrs r3, r3, #5
8007d44: 2064 movs r0, #100 @ 0x64
8007d46: fb00 f303 mul.w r3, r0, r3
8007d4a: 1ad3 subs r3, r2, r3
8007d4c: 011b lsls r3, r3, #4
8007d4e: 3332 adds r3, #50 @ 0x32
8007d50: 4a15 ldr r2, [pc, #84] @ (8007da8 <UART_SetConfig+0x118>)
8007d52: fba2 2303 umull r2, r3, r2, r3
8007d56: 095b lsrs r3, r3, #5
8007d58: f003 03f0 and.w r3, r3, #240 @ 0xf0
8007d5c: 4419 add r1, r3
8007d5e: 68fa ldr r2, [r7, #12]
8007d60: 4613 mov r3, r2
8007d62: 009b lsls r3, r3, #2
8007d64: 4413 add r3, r2
8007d66: 009a lsls r2, r3, #2
8007d68: 441a add r2, r3
8007d6a: 687b ldr r3, [r7, #4]
8007d6c: 685b ldr r3, [r3, #4]
8007d6e: 009b lsls r3, r3, #2
8007d70: fbb2 f2f3 udiv r2, r2, r3
8007d74: 4b0c ldr r3, [pc, #48] @ (8007da8 <UART_SetConfig+0x118>)
8007d76: fba3 0302 umull r0, r3, r3, r2
8007d7a: 095b lsrs r3, r3, #5
8007d7c: 2064 movs r0, #100 @ 0x64
8007d7e: fb00 f303 mul.w r3, r0, r3
8007d82: 1ad3 subs r3, r2, r3
8007d84: 011b lsls r3, r3, #4
8007d86: 3332 adds r3, #50 @ 0x32
8007d88: 4a07 ldr r2, [pc, #28] @ (8007da8 <UART_SetConfig+0x118>)
8007d8a: fba2 2303 umull r2, r3, r2, r3
8007d8e: 095b lsrs r3, r3, #5
8007d90: f003 020f and.w r2, r3, #15
8007d94: 687b ldr r3, [r7, #4]
8007d96: 681b ldr r3, [r3, #0]
8007d98: 440a add r2, r1
8007d9a: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
8007d9c: bf00 nop
8007d9e: 3710 adds r7, #16
8007da0: 46bd mov sp, r7
8007da2: bd80 pop {r7, pc}
8007da4: 40013800 .word 0x40013800
8007da8: 51eb851f .word 0x51eb851f
08007dac <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8007dac: b480 push {r7}
8007dae: b085 sub sp, #20
8007db0: af00 add r7, sp, #0
8007db2: 60f8 str r0, [r7, #12]
8007db4: 4638 mov r0, r7
8007db6: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8007dba: 2300 movs r3, #0
}
8007dbc: 4618 mov r0, r3
8007dbe: 3714 adds r7, #20
8007dc0: 46bd mov sp, r7
8007dc2: bc80 pop {r7}
8007dc4: 4770 bx lr
08007dc6 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8007dc6: b480 push {r7}
8007dc8: b085 sub sp, #20
8007dca: af00 add r7, sp, #0
8007dcc: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8007dce: 687b ldr r3, [r7, #4]
8007dd0: 2200 movs r2, #0
8007dd2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8007dd6: f44f 433f mov.w r3, #48896 @ 0xbf00
8007dda: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8007ddc: 68fb ldr r3, [r7, #12]
8007dde: b29a uxth r2, r3
8007de0: 687b ldr r3, [r7, #4]
8007de2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8007de6: 2300 movs r3, #0
}
8007de8: 4618 mov r0, r3
8007dea: 3714 adds r7, #20
8007dec: 46bd mov sp, r7
8007dee: bc80 pop {r7}
8007df0: 4770 bx lr
08007df2 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8007df2: b480 push {r7}
8007df4: b085 sub sp, #20
8007df6: af00 add r7, sp, #0
8007df8: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8007dfa: f44f 433f mov.w r3, #48896 @ 0xbf00
8007dfe: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8007e00: 687b ldr r3, [r7, #4]
8007e02: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8007e06: b29a uxth r2, r3
8007e08: 68fb ldr r3, [r7, #12]
8007e0a: b29b uxth r3, r3
8007e0c: 43db mvns r3, r3
8007e0e: b29b uxth r3, r3
8007e10: 4013 ands r3, r2
8007e12: b29a uxth r2, r3
8007e14: 687b ldr r3, [r7, #4]
8007e16: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8007e1a: 2300 movs r3, #0
}
8007e1c: 4618 mov r0, r3
8007e1e: 3714 adds r7, #20
8007e20: 46bd mov sp, r7
8007e22: bc80 pop {r7}
8007e24: 4770 bx lr
08007e26 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8007e26: b480 push {r7}
8007e28: b083 sub sp, #12
8007e2a: af00 add r7, sp, #0
8007e2c: 6078 str r0, [r7, #4]
8007e2e: 460b mov r3, r1
8007e30: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8007e32: 2300 movs r3, #0
}
8007e34: 4618 mov r0, r3
8007e36: 370c adds r7, #12
8007e38: 46bd mov sp, r7
8007e3a: bc80 pop {r7}
8007e3c: 4770 bx lr
08007e3e <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8007e3e: b480 push {r7}
8007e40: b085 sub sp, #20
8007e42: af00 add r7, sp, #0
8007e44: 60f8 str r0, [r7, #12]
8007e46: 4638 mov r0, r7
8007e48: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8007e4c: 68fb ldr r3, [r7, #12]
8007e4e: 2201 movs r2, #1
8007e50: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
8007e54: 68fb ldr r3, [r7, #12]
8007e56: 2200 movs r2, #0
8007e58: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8007e5c: 68fb ldr r3, [r7, #12]
8007e5e: 2200 movs r2, #0
8007e60: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8007e64: 68fb ldr r3, [r7, #12]
8007e66: 2200 movs r2, #0
8007e68: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8007e6c: 2300 movs r3, #0
}
8007e6e: 4618 mov r0, r3
8007e70: 3714 adds r7, #20
8007e72: 46bd mov sp, r7
8007e74: bc80 pop {r7}
8007e76: 4770 bx lr
08007e78 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8007e78: b480 push {r7}
8007e7a: b09d sub sp, #116 @ 0x74
8007e7c: af00 add r7, sp, #0
8007e7e: 6078 str r0, [r7, #4]
8007e80: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8007e82: 2300 movs r3, #0
8007e84: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
8007e88: 687a ldr r2, [r7, #4]
8007e8a: 683b ldr r3, [r7, #0]
8007e8c: 781b ldrb r3, [r3, #0]
8007e8e: 009b lsls r3, r3, #2
8007e90: 4413 add r3, r2
8007e92: 881b ldrh r3, [r3, #0]
8007e94: b29b uxth r3, r3
8007e96: f423 43ec bic.w r3, r3, #30208 @ 0x7600
8007e9a: f023 0370 bic.w r3, r3, #112 @ 0x70
8007e9e: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8007ea2: 683b ldr r3, [r7, #0]
8007ea4: 78db ldrb r3, [r3, #3]
8007ea6: 2b03 cmp r3, #3
8007ea8: d81f bhi.n 8007eea <USB_ActivateEndpoint+0x72>
8007eaa: a201 add r2, pc, #4 @ (adr r2, 8007eb0 <USB_ActivateEndpoint+0x38>)
8007eac: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007eb0: 08007ec1 .word 0x08007ec1
8007eb4: 08007edd .word 0x08007edd
8007eb8: 08007ef3 .word 0x08007ef3
8007ebc: 08007ecf .word 0x08007ecf
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8007ec0: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8007ec4: f443 7300 orr.w r3, r3, #512 @ 0x200
8007ec8: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8007ecc: e012 b.n 8007ef4 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8007ece: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8007ed2: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8007ed6: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8007eda: e00b b.n 8007ef4 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8007edc: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8007ee0: f443 6380 orr.w r3, r3, #1024 @ 0x400
8007ee4: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8007ee8: e004 b.n 8007ef4 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
8007eea: 2301 movs r3, #1
8007eec: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8007ef0: e000 b.n 8007ef4 <USB_ActivateEndpoint+0x7c>
break;
8007ef2: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8007ef4: 687a ldr r2, [r7, #4]
8007ef6: 683b ldr r3, [r7, #0]
8007ef8: 781b ldrb r3, [r3, #0]
8007efa: 009b lsls r3, r3, #2
8007efc: 441a add r2, r3
8007efe: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8007f02: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007f06: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007f0a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007f0e: f043 0380 orr.w r3, r3, #128 @ 0x80
8007f12: b29b uxth r3, r3
8007f14: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8007f16: 687a ldr r2, [r7, #4]
8007f18: 683b ldr r3, [r7, #0]
8007f1a: 781b ldrb r3, [r3, #0]
8007f1c: 009b lsls r3, r3, #2
8007f1e: 4413 add r3, r2
8007f20: 881b ldrh r3, [r3, #0]
8007f22: b29b uxth r3, r3
8007f24: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007f28: f023 0370 bic.w r3, r3, #112 @ 0x70
8007f2c: b29b uxth r3, r3
8007f2e: 683a ldr r2, [r7, #0]
8007f30: 7812 ldrb r2, [r2, #0]
8007f32: 4313 orrs r3, r2
8007f34: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8007f38: 687a ldr r2, [r7, #4]
8007f3a: 683b ldr r3, [r7, #0]
8007f3c: 781b ldrb r3, [r3, #0]
8007f3e: 009b lsls r3, r3, #2
8007f40: 441a add r2, r3
8007f42: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
8007f46: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007f4a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007f4e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007f52: f043 0380 orr.w r3, r3, #128 @ 0x80
8007f56: b29b uxth r3, r3
8007f58: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8007f5a: 683b ldr r3, [r7, #0]
8007f5c: 7b1b ldrb r3, [r3, #12]
8007f5e: 2b00 cmp r3, #0
8007f60: f040 8178 bne.w 8008254 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8007f64: 683b ldr r3, [r7, #0]
8007f66: 785b ldrb r3, [r3, #1]
8007f68: 2b00 cmp r3, #0
8007f6a: f000 8084 beq.w 8008076 <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8007f6e: 687b ldr r3, [r7, #4]
8007f70: 61bb str r3, [r7, #24]
8007f72: 687b ldr r3, [r7, #4]
8007f74: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007f78: b29b uxth r3, r3
8007f7a: 461a mov r2, r3
8007f7c: 69bb ldr r3, [r7, #24]
8007f7e: 4413 add r3, r2
8007f80: 61bb str r3, [r7, #24]
8007f82: 683b ldr r3, [r7, #0]
8007f84: 781b ldrb r3, [r3, #0]
8007f86: 011a lsls r2, r3, #4
8007f88: 69bb ldr r3, [r7, #24]
8007f8a: 4413 add r3, r2
8007f8c: f503 6380 add.w r3, r3, #1024 @ 0x400
8007f90: 617b str r3, [r7, #20]
8007f92: 683b ldr r3, [r7, #0]
8007f94: 88db ldrh r3, [r3, #6]
8007f96: 085b lsrs r3, r3, #1
8007f98: b29b uxth r3, r3
8007f9a: 005b lsls r3, r3, #1
8007f9c: b29a uxth r2, r3
8007f9e: 697b ldr r3, [r7, #20]
8007fa0: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8007fa2: 687a ldr r2, [r7, #4]
8007fa4: 683b ldr r3, [r7, #0]
8007fa6: 781b ldrb r3, [r3, #0]
8007fa8: 009b lsls r3, r3, #2
8007faa: 4413 add r3, r2
8007fac: 881b ldrh r3, [r3, #0]
8007fae: 827b strh r3, [r7, #18]
8007fb0: 8a7b ldrh r3, [r7, #18]
8007fb2: f003 0340 and.w r3, r3, #64 @ 0x40
8007fb6: 2b00 cmp r3, #0
8007fb8: d01b beq.n 8007ff2 <USB_ActivateEndpoint+0x17a>
8007fba: 687a ldr r2, [r7, #4]
8007fbc: 683b ldr r3, [r7, #0]
8007fbe: 781b ldrb r3, [r3, #0]
8007fc0: 009b lsls r3, r3, #2
8007fc2: 4413 add r3, r2
8007fc4: 881b ldrh r3, [r3, #0]
8007fc6: b29b uxth r3, r3
8007fc8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007fcc: f023 0370 bic.w r3, r3, #112 @ 0x70
8007fd0: 823b strh r3, [r7, #16]
8007fd2: 687a ldr r2, [r7, #4]
8007fd4: 683b ldr r3, [r7, #0]
8007fd6: 781b ldrb r3, [r3, #0]
8007fd8: 009b lsls r3, r3, #2
8007fda: 441a add r2, r3
8007fdc: 8a3b ldrh r3, [r7, #16]
8007fde: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007fe2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007fe6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007fea: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007fee: b29b uxth r3, r3
8007ff0: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8007ff2: 683b ldr r3, [r7, #0]
8007ff4: 78db ldrb r3, [r3, #3]
8007ff6: 2b01 cmp r3, #1
8007ff8: d020 beq.n 800803c <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8007ffa: 687a ldr r2, [r7, #4]
8007ffc: 683b ldr r3, [r7, #0]
8007ffe: 781b ldrb r3, [r3, #0]
8008000: 009b lsls r3, r3, #2
8008002: 4413 add r3, r2
8008004: 881b ldrh r3, [r3, #0]
8008006: b29b uxth r3, r3
8008008: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800800c: f023 0340 bic.w r3, r3, #64 @ 0x40
8008010: 81bb strh r3, [r7, #12]
8008012: 89bb ldrh r3, [r7, #12]
8008014: f083 0320 eor.w r3, r3, #32
8008018: 81bb strh r3, [r7, #12]
800801a: 687a ldr r2, [r7, #4]
800801c: 683b ldr r3, [r7, #0]
800801e: 781b ldrb r3, [r3, #0]
8008020: 009b lsls r3, r3, #2
8008022: 441a add r2, r3
8008024: 89bb ldrh r3, [r7, #12]
8008026: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800802a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800802e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008032: f043 0380 orr.w r3, r3, #128 @ 0x80
8008036: b29b uxth r3, r3
8008038: 8013 strh r3, [r2, #0]
800803a: e2d5 b.n 80085e8 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800803c: 687a ldr r2, [r7, #4]
800803e: 683b ldr r3, [r7, #0]
8008040: 781b ldrb r3, [r3, #0]
8008042: 009b lsls r3, r3, #2
8008044: 4413 add r3, r2
8008046: 881b ldrh r3, [r3, #0]
8008048: b29b uxth r3, r3
800804a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800804e: f023 0340 bic.w r3, r3, #64 @ 0x40
8008052: 81fb strh r3, [r7, #14]
8008054: 687a ldr r2, [r7, #4]
8008056: 683b ldr r3, [r7, #0]
8008058: 781b ldrb r3, [r3, #0]
800805a: 009b lsls r3, r3, #2
800805c: 441a add r2, r3
800805e: 89fb ldrh r3, [r7, #14]
8008060: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008064: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008068: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800806c: f043 0380 orr.w r3, r3, #128 @ 0x80
8008070: b29b uxth r3, r3
8008072: 8013 strh r3, [r2, #0]
8008074: e2b8 b.n 80085e8 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
8008076: 687b ldr r3, [r7, #4]
8008078: 633b str r3, [r7, #48] @ 0x30
800807a: 687b ldr r3, [r7, #4]
800807c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008080: b29b uxth r3, r3
8008082: 461a mov r2, r3
8008084: 6b3b ldr r3, [r7, #48] @ 0x30
8008086: 4413 add r3, r2
8008088: 633b str r3, [r7, #48] @ 0x30
800808a: 683b ldr r3, [r7, #0]
800808c: 781b ldrb r3, [r3, #0]
800808e: 011a lsls r2, r3, #4
8008090: 6b3b ldr r3, [r7, #48] @ 0x30
8008092: 4413 add r3, r2
8008094: f503 6381 add.w r3, r3, #1032 @ 0x408
8008098: 62fb str r3, [r7, #44] @ 0x2c
800809a: 683b ldr r3, [r7, #0]
800809c: 88db ldrh r3, [r3, #6]
800809e: 085b lsrs r3, r3, #1
80080a0: b29b uxth r3, r3
80080a2: 005b lsls r3, r3, #1
80080a4: b29a uxth r2, r3
80080a6: 6afb ldr r3, [r7, #44] @ 0x2c
80080a8: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
80080aa: 687b ldr r3, [r7, #4]
80080ac: 62bb str r3, [r7, #40] @ 0x28
80080ae: 687b ldr r3, [r7, #4]
80080b0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80080b4: b29b uxth r3, r3
80080b6: 461a mov r2, r3
80080b8: 6abb ldr r3, [r7, #40] @ 0x28
80080ba: 4413 add r3, r2
80080bc: 62bb str r3, [r7, #40] @ 0x28
80080be: 683b ldr r3, [r7, #0]
80080c0: 781b ldrb r3, [r3, #0]
80080c2: 011a lsls r2, r3, #4
80080c4: 6abb ldr r3, [r7, #40] @ 0x28
80080c6: 4413 add r3, r2
80080c8: f203 430c addw r3, r3, #1036 @ 0x40c
80080cc: 627b str r3, [r7, #36] @ 0x24
80080ce: 6a7b ldr r3, [r7, #36] @ 0x24
80080d0: 881b ldrh r3, [r3, #0]
80080d2: b29b uxth r3, r3
80080d4: f3c3 0309 ubfx r3, r3, #0, #10
80080d8: b29a uxth r2, r3
80080da: 6a7b ldr r3, [r7, #36] @ 0x24
80080dc: 801a strh r2, [r3, #0]
80080de: 683b ldr r3, [r7, #0]
80080e0: 691b ldr r3, [r3, #16]
80080e2: 2b3e cmp r3, #62 @ 0x3e
80080e4: d91d bls.n 8008122 <USB_ActivateEndpoint+0x2aa>
80080e6: 683b ldr r3, [r7, #0]
80080e8: 691b ldr r3, [r3, #16]
80080ea: 095b lsrs r3, r3, #5
80080ec: 66bb str r3, [r7, #104] @ 0x68
80080ee: 683b ldr r3, [r7, #0]
80080f0: 691b ldr r3, [r3, #16]
80080f2: f003 031f and.w r3, r3, #31
80080f6: 2b00 cmp r3, #0
80080f8: d102 bne.n 8008100 <USB_ActivateEndpoint+0x288>
80080fa: 6ebb ldr r3, [r7, #104] @ 0x68
80080fc: 3b01 subs r3, #1
80080fe: 66bb str r3, [r7, #104] @ 0x68
8008100: 6a7b ldr r3, [r7, #36] @ 0x24
8008102: 881b ldrh r3, [r3, #0]
8008104: b29a uxth r2, r3
8008106: 6ebb ldr r3, [r7, #104] @ 0x68
8008108: b29b uxth r3, r3
800810a: 029b lsls r3, r3, #10
800810c: b29b uxth r3, r3
800810e: 4313 orrs r3, r2
8008110: b29b uxth r3, r3
8008112: ea6f 4343 mvn.w r3, r3, lsl #17
8008116: ea6f 4353 mvn.w r3, r3, lsr #17
800811a: b29a uxth r2, r3
800811c: 6a7b ldr r3, [r7, #36] @ 0x24
800811e: 801a strh r2, [r3, #0]
8008120: e026 b.n 8008170 <USB_ActivateEndpoint+0x2f8>
8008122: 683b ldr r3, [r7, #0]
8008124: 691b ldr r3, [r3, #16]
8008126: 2b00 cmp r3, #0
8008128: d10a bne.n 8008140 <USB_ActivateEndpoint+0x2c8>
800812a: 6a7b ldr r3, [r7, #36] @ 0x24
800812c: 881b ldrh r3, [r3, #0]
800812e: b29b uxth r3, r3
8008130: ea6f 4343 mvn.w r3, r3, lsl #17
8008134: ea6f 4353 mvn.w r3, r3, lsr #17
8008138: b29a uxth r2, r3
800813a: 6a7b ldr r3, [r7, #36] @ 0x24
800813c: 801a strh r2, [r3, #0]
800813e: e017 b.n 8008170 <USB_ActivateEndpoint+0x2f8>
8008140: 683b ldr r3, [r7, #0]
8008142: 691b ldr r3, [r3, #16]
8008144: 085b lsrs r3, r3, #1
8008146: 66bb str r3, [r7, #104] @ 0x68
8008148: 683b ldr r3, [r7, #0]
800814a: 691b ldr r3, [r3, #16]
800814c: f003 0301 and.w r3, r3, #1
8008150: 2b00 cmp r3, #0
8008152: d002 beq.n 800815a <USB_ActivateEndpoint+0x2e2>
8008154: 6ebb ldr r3, [r7, #104] @ 0x68
8008156: 3301 adds r3, #1
8008158: 66bb str r3, [r7, #104] @ 0x68
800815a: 6a7b ldr r3, [r7, #36] @ 0x24
800815c: 881b ldrh r3, [r3, #0]
800815e: b29a uxth r2, r3
8008160: 6ebb ldr r3, [r7, #104] @ 0x68
8008162: b29b uxth r3, r3
8008164: 029b lsls r3, r3, #10
8008166: b29b uxth r3, r3
8008168: 4313 orrs r3, r2
800816a: b29a uxth r2, r3
800816c: 6a7b ldr r3, [r7, #36] @ 0x24
800816e: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8008170: 687a ldr r2, [r7, #4]
8008172: 683b ldr r3, [r7, #0]
8008174: 781b ldrb r3, [r3, #0]
8008176: 009b lsls r3, r3, #2
8008178: 4413 add r3, r2
800817a: 881b ldrh r3, [r3, #0]
800817c: 847b strh r3, [r7, #34] @ 0x22
800817e: 8c7b ldrh r3, [r7, #34] @ 0x22
8008180: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008184: 2b00 cmp r3, #0
8008186: d01b beq.n 80081c0 <USB_ActivateEndpoint+0x348>
8008188: 687a ldr r2, [r7, #4]
800818a: 683b ldr r3, [r7, #0]
800818c: 781b ldrb r3, [r3, #0]
800818e: 009b lsls r3, r3, #2
8008190: 4413 add r3, r2
8008192: 881b ldrh r3, [r3, #0]
8008194: b29b uxth r3, r3
8008196: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800819a: f023 0370 bic.w r3, r3, #112 @ 0x70
800819e: 843b strh r3, [r7, #32]
80081a0: 687a ldr r2, [r7, #4]
80081a2: 683b ldr r3, [r7, #0]
80081a4: 781b ldrb r3, [r3, #0]
80081a6: 009b lsls r3, r3, #2
80081a8: 441a add r2, r3
80081aa: 8c3b ldrh r3, [r7, #32]
80081ac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80081b0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80081b4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80081b8: f043 0380 orr.w r3, r3, #128 @ 0x80
80081bc: b29b uxth r3, r3
80081be: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
80081c0: 683b ldr r3, [r7, #0]
80081c2: 781b ldrb r3, [r3, #0]
80081c4: 2b00 cmp r3, #0
80081c6: d124 bne.n 8008212 <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80081c8: 687a ldr r2, [r7, #4]
80081ca: 683b ldr r3, [r7, #0]
80081cc: 781b ldrb r3, [r3, #0]
80081ce: 009b lsls r3, r3, #2
80081d0: 4413 add r3, r2
80081d2: 881b ldrh r3, [r3, #0]
80081d4: b29b uxth r3, r3
80081d6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80081da: f023 0370 bic.w r3, r3, #112 @ 0x70
80081de: 83bb strh r3, [r7, #28]
80081e0: 8bbb ldrh r3, [r7, #28]
80081e2: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80081e6: 83bb strh r3, [r7, #28]
80081e8: 8bbb ldrh r3, [r7, #28]
80081ea: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80081ee: 83bb strh r3, [r7, #28]
80081f0: 687a ldr r2, [r7, #4]
80081f2: 683b ldr r3, [r7, #0]
80081f4: 781b ldrb r3, [r3, #0]
80081f6: 009b lsls r3, r3, #2
80081f8: 441a add r2, r3
80081fa: 8bbb ldrh r3, [r7, #28]
80081fc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008200: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008204: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008208: f043 0380 orr.w r3, r3, #128 @ 0x80
800820c: b29b uxth r3, r3
800820e: 8013 strh r3, [r2, #0]
8008210: e1ea b.n 80085e8 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8008212: 687a ldr r2, [r7, #4]
8008214: 683b ldr r3, [r7, #0]
8008216: 781b ldrb r3, [r3, #0]
8008218: 009b lsls r3, r3, #2
800821a: 4413 add r3, r2
800821c: 881b ldrh r3, [r3, #0]
800821e: b29b uxth r3, r3
8008220: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8008224: f023 0370 bic.w r3, r3, #112 @ 0x70
8008228: 83fb strh r3, [r7, #30]
800822a: 8bfb ldrh r3, [r7, #30]
800822c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8008230: 83fb strh r3, [r7, #30]
8008232: 687a ldr r2, [r7, #4]
8008234: 683b ldr r3, [r7, #0]
8008236: 781b ldrb r3, [r3, #0]
8008238: 009b lsls r3, r3, #2
800823a: 441a add r2, r3
800823c: 8bfb ldrh r3, [r7, #30]
800823e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008242: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008246: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800824a: f043 0380 orr.w r3, r3, #128 @ 0x80
800824e: b29b uxth r3, r3
8008250: 8013 strh r3, [r2, #0]
8008252: e1c9 b.n 80085e8 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
8008254: 683b ldr r3, [r7, #0]
8008256: 78db ldrb r3, [r3, #3]
8008258: 2b02 cmp r3, #2
800825a: d11e bne.n 800829a <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800825c: 687a ldr r2, [r7, #4]
800825e: 683b ldr r3, [r7, #0]
8008260: 781b ldrb r3, [r3, #0]
8008262: 009b lsls r3, r3, #2
8008264: 4413 add r3, r2
8008266: 881b ldrh r3, [r3, #0]
8008268: b29b uxth r3, r3
800826a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800826e: f023 0370 bic.w r3, r3, #112 @ 0x70
8008272: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
8008276: 687a ldr r2, [r7, #4]
8008278: 683b ldr r3, [r7, #0]
800827a: 781b ldrb r3, [r3, #0]
800827c: 009b lsls r3, r3, #2
800827e: 441a add r2, r3
8008280: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8008284: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008288: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800828c: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8008290: f043 0380 orr.w r3, r3, #128 @ 0x80
8008294: b29b uxth r3, r3
8008296: 8013 strh r3, [r2, #0]
8008298: e01d b.n 80082d6 <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
800829a: 687a ldr r2, [r7, #4]
800829c: 683b ldr r3, [r7, #0]
800829e: 781b ldrb r3, [r3, #0]
80082a0: 009b lsls r3, r3, #2
80082a2: 4413 add r3, r2
80082a4: 881b ldrh r3, [r3, #0]
80082a6: b29b uxth r3, r3
80082a8: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
80082ac: f023 0370 bic.w r3, r3, #112 @ 0x70
80082b0: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
80082b4: 687a ldr r2, [r7, #4]
80082b6: 683b ldr r3, [r7, #0]
80082b8: 781b ldrb r3, [r3, #0]
80082ba: 009b lsls r3, r3, #2
80082bc: 441a add r2, r3
80082be: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
80082c2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80082c6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80082ca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80082ce: f043 0380 orr.w r3, r3, #128 @ 0x80
80082d2: b29b uxth r3, r3
80082d4: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
80082d6: 687b ldr r3, [r7, #4]
80082d8: 65fb str r3, [r7, #92] @ 0x5c
80082da: 687b ldr r3, [r7, #4]
80082dc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80082e0: b29b uxth r3, r3
80082e2: 461a mov r2, r3
80082e4: 6dfb ldr r3, [r7, #92] @ 0x5c
80082e6: 4413 add r3, r2
80082e8: 65fb str r3, [r7, #92] @ 0x5c
80082ea: 683b ldr r3, [r7, #0]
80082ec: 781b ldrb r3, [r3, #0]
80082ee: 011a lsls r2, r3, #4
80082f0: 6dfb ldr r3, [r7, #92] @ 0x5c
80082f2: 4413 add r3, r2
80082f4: f503 6380 add.w r3, r3, #1024 @ 0x400
80082f8: 65bb str r3, [r7, #88] @ 0x58
80082fa: 683b ldr r3, [r7, #0]
80082fc: 891b ldrh r3, [r3, #8]
80082fe: 085b lsrs r3, r3, #1
8008300: b29b uxth r3, r3
8008302: 005b lsls r3, r3, #1
8008304: b29a uxth r2, r3
8008306: 6dbb ldr r3, [r7, #88] @ 0x58
8008308: 801a strh r2, [r3, #0]
800830a: 687b ldr r3, [r7, #4]
800830c: 657b str r3, [r7, #84] @ 0x54
800830e: 687b ldr r3, [r7, #4]
8008310: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008314: b29b uxth r3, r3
8008316: 461a mov r2, r3
8008318: 6d7b ldr r3, [r7, #84] @ 0x54
800831a: 4413 add r3, r2
800831c: 657b str r3, [r7, #84] @ 0x54
800831e: 683b ldr r3, [r7, #0]
8008320: 781b ldrb r3, [r3, #0]
8008322: 011a lsls r2, r3, #4
8008324: 6d7b ldr r3, [r7, #84] @ 0x54
8008326: 4413 add r3, r2
8008328: f503 6381 add.w r3, r3, #1032 @ 0x408
800832c: 653b str r3, [r7, #80] @ 0x50
800832e: 683b ldr r3, [r7, #0]
8008330: 895b ldrh r3, [r3, #10]
8008332: 085b lsrs r3, r3, #1
8008334: b29b uxth r3, r3
8008336: 005b lsls r3, r3, #1
8008338: b29a uxth r2, r3
800833a: 6d3b ldr r3, [r7, #80] @ 0x50
800833c: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
800833e: 683b ldr r3, [r7, #0]
8008340: 785b ldrb r3, [r3, #1]
8008342: 2b00 cmp r3, #0
8008344: f040 8093 bne.w 800846e <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8008348: 687a ldr r2, [r7, #4]
800834a: 683b ldr r3, [r7, #0]
800834c: 781b ldrb r3, [r3, #0]
800834e: 009b lsls r3, r3, #2
8008350: 4413 add r3, r2
8008352: 881b ldrh r3, [r3, #0]
8008354: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
8008358: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800835c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008360: 2b00 cmp r3, #0
8008362: d01b beq.n 800839c <USB_ActivateEndpoint+0x524>
8008364: 687a ldr r2, [r7, #4]
8008366: 683b ldr r3, [r7, #0]
8008368: 781b ldrb r3, [r3, #0]
800836a: 009b lsls r3, r3, #2
800836c: 4413 add r3, r2
800836e: 881b ldrh r3, [r3, #0]
8008370: b29b uxth r3, r3
8008372: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008376: f023 0370 bic.w r3, r3, #112 @ 0x70
800837a: 87fb strh r3, [r7, #62] @ 0x3e
800837c: 687a ldr r2, [r7, #4]
800837e: 683b ldr r3, [r7, #0]
8008380: 781b ldrb r3, [r3, #0]
8008382: 009b lsls r3, r3, #2
8008384: 441a add r2, r3
8008386: 8ffb ldrh r3, [r7, #62] @ 0x3e
8008388: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800838c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008390: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8008394: f043 0380 orr.w r3, r3, #128 @ 0x80
8008398: b29b uxth r3, r3
800839a: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800839c: 687a ldr r2, [r7, #4]
800839e: 683b ldr r3, [r7, #0]
80083a0: 781b ldrb r3, [r3, #0]
80083a2: 009b lsls r3, r3, #2
80083a4: 4413 add r3, r2
80083a6: 881b ldrh r3, [r3, #0]
80083a8: 87bb strh r3, [r7, #60] @ 0x3c
80083aa: 8fbb ldrh r3, [r7, #60] @ 0x3c
80083ac: f003 0340 and.w r3, r3, #64 @ 0x40
80083b0: 2b00 cmp r3, #0
80083b2: d01b beq.n 80083ec <USB_ActivateEndpoint+0x574>
80083b4: 687a ldr r2, [r7, #4]
80083b6: 683b ldr r3, [r7, #0]
80083b8: 781b ldrb r3, [r3, #0]
80083ba: 009b lsls r3, r3, #2
80083bc: 4413 add r3, r2
80083be: 881b ldrh r3, [r3, #0]
80083c0: b29b uxth r3, r3
80083c2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80083c6: f023 0370 bic.w r3, r3, #112 @ 0x70
80083ca: 877b strh r3, [r7, #58] @ 0x3a
80083cc: 687a ldr r2, [r7, #4]
80083ce: 683b ldr r3, [r7, #0]
80083d0: 781b ldrb r3, [r3, #0]
80083d2: 009b lsls r3, r3, #2
80083d4: 441a add r2, r3
80083d6: 8f7b ldrh r3, [r7, #58] @ 0x3a
80083d8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80083dc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80083e0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80083e4: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80083e8: b29b uxth r3, r3
80083ea: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80083ec: 687a ldr r2, [r7, #4]
80083ee: 683b ldr r3, [r7, #0]
80083f0: 781b ldrb r3, [r3, #0]
80083f2: 009b lsls r3, r3, #2
80083f4: 4413 add r3, r2
80083f6: 881b ldrh r3, [r3, #0]
80083f8: b29b uxth r3, r3
80083fa: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80083fe: f023 0370 bic.w r3, r3, #112 @ 0x70
8008402: 873b strh r3, [r7, #56] @ 0x38
8008404: 8f3b ldrh r3, [r7, #56] @ 0x38
8008406: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800840a: 873b strh r3, [r7, #56] @ 0x38
800840c: 8f3b ldrh r3, [r7, #56] @ 0x38
800840e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8008412: 873b strh r3, [r7, #56] @ 0x38
8008414: 687a ldr r2, [r7, #4]
8008416: 683b ldr r3, [r7, #0]
8008418: 781b ldrb r3, [r3, #0]
800841a: 009b lsls r3, r3, #2
800841c: 441a add r2, r3
800841e: 8f3b ldrh r3, [r7, #56] @ 0x38
8008420: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008424: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008428: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800842c: f043 0380 orr.w r3, r3, #128 @ 0x80
8008430: b29b uxth r3, r3
8008432: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8008434: 687a ldr r2, [r7, #4]
8008436: 683b ldr r3, [r7, #0]
8008438: 781b ldrb r3, [r3, #0]
800843a: 009b lsls r3, r3, #2
800843c: 4413 add r3, r2
800843e: 881b ldrh r3, [r3, #0]
8008440: b29b uxth r3, r3
8008442: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008446: f023 0340 bic.w r3, r3, #64 @ 0x40
800844a: 86fb strh r3, [r7, #54] @ 0x36
800844c: 687a ldr r2, [r7, #4]
800844e: 683b ldr r3, [r7, #0]
8008450: 781b ldrb r3, [r3, #0]
8008452: 009b lsls r3, r3, #2
8008454: 441a add r2, r3
8008456: 8efb ldrh r3, [r7, #54] @ 0x36
8008458: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800845c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008460: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008464: f043 0380 orr.w r3, r3, #128 @ 0x80
8008468: b29b uxth r3, r3
800846a: 8013 strh r3, [r2, #0]
800846c: e0bc b.n 80085e8 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800846e: 687a ldr r2, [r7, #4]
8008470: 683b ldr r3, [r7, #0]
8008472: 781b ldrb r3, [r3, #0]
8008474: 009b lsls r3, r3, #2
8008476: 4413 add r3, r2
8008478: 881b ldrh r3, [r3, #0]
800847a: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
800847e: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8008482: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008486: 2b00 cmp r3, #0
8008488: d01d beq.n 80084c6 <USB_ActivateEndpoint+0x64e>
800848a: 687a ldr r2, [r7, #4]
800848c: 683b ldr r3, [r7, #0]
800848e: 781b ldrb r3, [r3, #0]
8008490: 009b lsls r3, r3, #2
8008492: 4413 add r3, r2
8008494: 881b ldrh r3, [r3, #0]
8008496: b29b uxth r3, r3
8008498: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800849c: f023 0370 bic.w r3, r3, #112 @ 0x70
80084a0: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
80084a4: 687a ldr r2, [r7, #4]
80084a6: 683b ldr r3, [r7, #0]
80084a8: 781b ldrb r3, [r3, #0]
80084aa: 009b lsls r3, r3, #2
80084ac: 441a add r2, r3
80084ae: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
80084b2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80084b6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80084ba: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80084be: f043 0380 orr.w r3, r3, #128 @ 0x80
80084c2: b29b uxth r3, r3
80084c4: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80084c6: 687a ldr r2, [r7, #4]
80084c8: 683b ldr r3, [r7, #0]
80084ca: 781b ldrb r3, [r3, #0]
80084cc: 009b lsls r3, r3, #2
80084ce: 4413 add r3, r2
80084d0: 881b ldrh r3, [r3, #0]
80084d2: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
80084d6: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80084da: f003 0340 and.w r3, r3, #64 @ 0x40
80084de: 2b00 cmp r3, #0
80084e0: d01d beq.n 800851e <USB_ActivateEndpoint+0x6a6>
80084e2: 687a ldr r2, [r7, #4]
80084e4: 683b ldr r3, [r7, #0]
80084e6: 781b ldrb r3, [r3, #0]
80084e8: 009b lsls r3, r3, #2
80084ea: 4413 add r3, r2
80084ec: 881b ldrh r3, [r3, #0]
80084ee: b29b uxth r3, r3
80084f0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80084f4: f023 0370 bic.w r3, r3, #112 @ 0x70
80084f8: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80084fc: 687a ldr r2, [r7, #4]
80084fe: 683b ldr r3, [r7, #0]
8008500: 781b ldrb r3, [r3, #0]
8008502: 009b lsls r3, r3, #2
8008504: 441a add r2, r3
8008506: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
800850a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800850e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008512: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008516: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800851a: b29b uxth r3, r3
800851c: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800851e: 683b ldr r3, [r7, #0]
8008520: 78db ldrb r3, [r3, #3]
8008522: 2b01 cmp r3, #1
8008524: d024 beq.n 8008570 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8008526: 687a ldr r2, [r7, #4]
8008528: 683b ldr r3, [r7, #0]
800852a: 781b ldrb r3, [r3, #0]
800852c: 009b lsls r3, r3, #2
800852e: 4413 add r3, r2
8008530: 881b ldrh r3, [r3, #0]
8008532: b29b uxth r3, r3
8008534: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008538: f023 0340 bic.w r3, r3, #64 @ 0x40
800853c: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8008540: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8008544: f083 0320 eor.w r3, r3, #32
8008548: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800854c: 687a ldr r2, [r7, #4]
800854e: 683b ldr r3, [r7, #0]
8008550: 781b ldrb r3, [r3, #0]
8008552: 009b lsls r3, r3, #2
8008554: 441a add r2, r3
8008556: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800855a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800855e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008562: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008566: f043 0380 orr.w r3, r3, #128 @ 0x80
800856a: b29b uxth r3, r3
800856c: 8013 strh r3, [r2, #0]
800856e: e01d b.n 80085ac <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8008570: 687a ldr r2, [r7, #4]
8008572: 683b ldr r3, [r7, #0]
8008574: 781b ldrb r3, [r3, #0]
8008576: 009b lsls r3, r3, #2
8008578: 4413 add r3, r2
800857a: 881b ldrh r3, [r3, #0]
800857c: b29b uxth r3, r3
800857e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008582: f023 0340 bic.w r3, r3, #64 @ 0x40
8008586: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
800858a: 687a ldr r2, [r7, #4]
800858c: 683b ldr r3, [r7, #0]
800858e: 781b ldrb r3, [r3, #0]
8008590: 009b lsls r3, r3, #2
8008592: 441a add r2, r3
8008594: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8008598: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800859c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80085a0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80085a4: f043 0380 orr.w r3, r3, #128 @ 0x80
80085a8: b29b uxth r3, r3
80085aa: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80085ac: 687a ldr r2, [r7, #4]
80085ae: 683b ldr r3, [r7, #0]
80085b0: 781b ldrb r3, [r3, #0]
80085b2: 009b lsls r3, r3, #2
80085b4: 4413 add r3, r2
80085b6: 881b ldrh r3, [r3, #0]
80085b8: b29b uxth r3, r3
80085ba: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80085be: f023 0370 bic.w r3, r3, #112 @ 0x70
80085c2: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80085c6: 687a ldr r2, [r7, #4]
80085c8: 683b ldr r3, [r7, #0]
80085ca: 781b ldrb r3, [r3, #0]
80085cc: 009b lsls r3, r3, #2
80085ce: 441a add r2, r3
80085d0: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
80085d4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80085d8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80085dc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80085e0: f043 0380 orr.w r3, r3, #128 @ 0x80
80085e4: b29b uxth r3, r3
80085e6: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
80085e8: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
80085ec: 4618 mov r0, r3
80085ee: 3774 adds r7, #116 @ 0x74
80085f0: 46bd mov sp, r7
80085f2: bc80 pop {r7}
80085f4: 4770 bx lr
80085f6: bf00 nop
080085f8 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80085f8: b480 push {r7}
80085fa: b08d sub sp, #52 @ 0x34
80085fc: af00 add r7, sp, #0
80085fe: 6078 str r0, [r7, #4]
8008600: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8008602: 683b ldr r3, [r7, #0]
8008604: 7b1b ldrb r3, [r3, #12]
8008606: 2b00 cmp r3, #0
8008608: f040 808e bne.w 8008728 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
800860c: 683b ldr r3, [r7, #0]
800860e: 785b ldrb r3, [r3, #1]
8008610: 2b00 cmp r3, #0
8008612: d044 beq.n 800869e <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8008614: 687a ldr r2, [r7, #4]
8008616: 683b ldr r3, [r7, #0]
8008618: 781b ldrb r3, [r3, #0]
800861a: 009b lsls r3, r3, #2
800861c: 4413 add r3, r2
800861e: 881b ldrh r3, [r3, #0]
8008620: 81bb strh r3, [r7, #12]
8008622: 89bb ldrh r3, [r7, #12]
8008624: f003 0340 and.w r3, r3, #64 @ 0x40
8008628: 2b00 cmp r3, #0
800862a: d01b beq.n 8008664 <USB_DeactivateEndpoint+0x6c>
800862c: 687a ldr r2, [r7, #4]
800862e: 683b ldr r3, [r7, #0]
8008630: 781b ldrb r3, [r3, #0]
8008632: 009b lsls r3, r3, #2
8008634: 4413 add r3, r2
8008636: 881b ldrh r3, [r3, #0]
8008638: b29b uxth r3, r3
800863a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800863e: f023 0370 bic.w r3, r3, #112 @ 0x70
8008642: 817b strh r3, [r7, #10]
8008644: 687a ldr r2, [r7, #4]
8008646: 683b ldr r3, [r7, #0]
8008648: 781b ldrb r3, [r3, #0]
800864a: 009b lsls r3, r3, #2
800864c: 441a add r2, r3
800864e: 897b ldrh r3, [r7, #10]
8008650: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008654: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008658: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800865c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8008660: b29b uxth r3, r3
8008662: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8008664: 687a ldr r2, [r7, #4]
8008666: 683b ldr r3, [r7, #0]
8008668: 781b ldrb r3, [r3, #0]
800866a: 009b lsls r3, r3, #2
800866c: 4413 add r3, r2
800866e: 881b ldrh r3, [r3, #0]
8008670: b29b uxth r3, r3
8008672: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008676: f023 0340 bic.w r3, r3, #64 @ 0x40
800867a: 813b strh r3, [r7, #8]
800867c: 687a ldr r2, [r7, #4]
800867e: 683b ldr r3, [r7, #0]
8008680: 781b ldrb r3, [r3, #0]
8008682: 009b lsls r3, r3, #2
8008684: 441a add r2, r3
8008686: 893b ldrh r3, [r7, #8]
8008688: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800868c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008690: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008694: f043 0380 orr.w r3, r3, #128 @ 0x80
8008698: b29b uxth r3, r3
800869a: 8013 strh r3, [r2, #0]
800869c: e192 b.n 80089c4 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800869e: 687a ldr r2, [r7, #4]
80086a0: 683b ldr r3, [r7, #0]
80086a2: 781b ldrb r3, [r3, #0]
80086a4: 009b lsls r3, r3, #2
80086a6: 4413 add r3, r2
80086a8: 881b ldrh r3, [r3, #0]
80086aa: 827b strh r3, [r7, #18]
80086ac: 8a7b ldrh r3, [r7, #18]
80086ae: f403 4380 and.w r3, r3, #16384 @ 0x4000
80086b2: 2b00 cmp r3, #0
80086b4: d01b beq.n 80086ee <USB_DeactivateEndpoint+0xf6>
80086b6: 687a ldr r2, [r7, #4]
80086b8: 683b ldr r3, [r7, #0]
80086ba: 781b ldrb r3, [r3, #0]
80086bc: 009b lsls r3, r3, #2
80086be: 4413 add r3, r2
80086c0: 881b ldrh r3, [r3, #0]
80086c2: b29b uxth r3, r3
80086c4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80086c8: f023 0370 bic.w r3, r3, #112 @ 0x70
80086cc: 823b strh r3, [r7, #16]
80086ce: 687a ldr r2, [r7, #4]
80086d0: 683b ldr r3, [r7, #0]
80086d2: 781b ldrb r3, [r3, #0]
80086d4: 009b lsls r3, r3, #2
80086d6: 441a add r2, r3
80086d8: 8a3b ldrh r3, [r7, #16]
80086da: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80086de: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80086e2: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80086e6: f043 0380 orr.w r3, r3, #128 @ 0x80
80086ea: b29b uxth r3, r3
80086ec: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80086ee: 687a ldr r2, [r7, #4]
80086f0: 683b ldr r3, [r7, #0]
80086f2: 781b ldrb r3, [r3, #0]
80086f4: 009b lsls r3, r3, #2
80086f6: 4413 add r3, r2
80086f8: 881b ldrh r3, [r3, #0]
80086fa: b29b uxth r3, r3
80086fc: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8008700: f023 0370 bic.w r3, r3, #112 @ 0x70
8008704: 81fb strh r3, [r7, #14]
8008706: 687a ldr r2, [r7, #4]
8008708: 683b ldr r3, [r7, #0]
800870a: 781b ldrb r3, [r3, #0]
800870c: 009b lsls r3, r3, #2
800870e: 441a add r2, r3
8008710: 89fb ldrh r3, [r7, #14]
8008712: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008716: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800871a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800871e: f043 0380 orr.w r3, r3, #128 @ 0x80
8008722: b29b uxth r3, r3
8008724: 8013 strh r3, [r2, #0]
8008726: e14d b.n 80089c4 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
8008728: 683b ldr r3, [r7, #0]
800872a: 785b ldrb r3, [r3, #1]
800872c: 2b00 cmp r3, #0
800872e: f040 80a5 bne.w 800887c <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8008732: 687a ldr r2, [r7, #4]
8008734: 683b ldr r3, [r7, #0]
8008736: 781b ldrb r3, [r3, #0]
8008738: 009b lsls r3, r3, #2
800873a: 4413 add r3, r2
800873c: 881b ldrh r3, [r3, #0]
800873e: 843b strh r3, [r7, #32]
8008740: 8c3b ldrh r3, [r7, #32]
8008742: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008746: 2b00 cmp r3, #0
8008748: d01b beq.n 8008782 <USB_DeactivateEndpoint+0x18a>
800874a: 687a ldr r2, [r7, #4]
800874c: 683b ldr r3, [r7, #0]
800874e: 781b ldrb r3, [r3, #0]
8008750: 009b lsls r3, r3, #2
8008752: 4413 add r3, r2
8008754: 881b ldrh r3, [r3, #0]
8008756: b29b uxth r3, r3
8008758: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800875c: f023 0370 bic.w r3, r3, #112 @ 0x70
8008760: 83fb strh r3, [r7, #30]
8008762: 687a ldr r2, [r7, #4]
8008764: 683b ldr r3, [r7, #0]
8008766: 781b ldrb r3, [r3, #0]
8008768: 009b lsls r3, r3, #2
800876a: 441a add r2, r3
800876c: 8bfb ldrh r3, [r7, #30]
800876e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008772: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008776: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800877a: f043 0380 orr.w r3, r3, #128 @ 0x80
800877e: b29b uxth r3, r3
8008780: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8008782: 687a ldr r2, [r7, #4]
8008784: 683b ldr r3, [r7, #0]
8008786: 781b ldrb r3, [r3, #0]
8008788: 009b lsls r3, r3, #2
800878a: 4413 add r3, r2
800878c: 881b ldrh r3, [r3, #0]
800878e: 83bb strh r3, [r7, #28]
8008790: 8bbb ldrh r3, [r7, #28]
8008792: f003 0340 and.w r3, r3, #64 @ 0x40
8008796: 2b00 cmp r3, #0
8008798: d01b beq.n 80087d2 <USB_DeactivateEndpoint+0x1da>
800879a: 687a ldr r2, [r7, #4]
800879c: 683b ldr r3, [r7, #0]
800879e: 781b ldrb r3, [r3, #0]
80087a0: 009b lsls r3, r3, #2
80087a2: 4413 add r3, r2
80087a4: 881b ldrh r3, [r3, #0]
80087a6: b29b uxth r3, r3
80087a8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80087ac: f023 0370 bic.w r3, r3, #112 @ 0x70
80087b0: 837b strh r3, [r7, #26]
80087b2: 687a ldr r2, [r7, #4]
80087b4: 683b ldr r3, [r7, #0]
80087b6: 781b ldrb r3, [r3, #0]
80087b8: 009b lsls r3, r3, #2
80087ba: 441a add r2, r3
80087bc: 8b7b ldrh r3, [r7, #26]
80087be: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80087c2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80087c6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80087ca: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80087ce: b29b uxth r3, r3
80087d0: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
80087d2: 687a ldr r2, [r7, #4]
80087d4: 683b ldr r3, [r7, #0]
80087d6: 781b ldrb r3, [r3, #0]
80087d8: 009b lsls r3, r3, #2
80087da: 4413 add r3, r2
80087dc: 881b ldrh r3, [r3, #0]
80087de: b29b uxth r3, r3
80087e0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80087e4: f023 0370 bic.w r3, r3, #112 @ 0x70
80087e8: 833b strh r3, [r7, #24]
80087ea: 687a ldr r2, [r7, #4]
80087ec: 683b ldr r3, [r7, #0]
80087ee: 781b ldrb r3, [r3, #0]
80087f0: 009b lsls r3, r3, #2
80087f2: 441a add r2, r3
80087f4: 8b3b ldrh r3, [r7, #24]
80087f6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80087fa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80087fe: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008802: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8008806: b29b uxth r3, r3
8008808: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800880a: 687a ldr r2, [r7, #4]
800880c: 683b ldr r3, [r7, #0]
800880e: 781b ldrb r3, [r3, #0]
8008810: 009b lsls r3, r3, #2
8008812: 4413 add r3, r2
8008814: 881b ldrh r3, [r3, #0]
8008816: b29b uxth r3, r3
8008818: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800881c: f023 0370 bic.w r3, r3, #112 @ 0x70
8008820: 82fb strh r3, [r7, #22]
8008822: 687a ldr r2, [r7, #4]
8008824: 683b ldr r3, [r7, #0]
8008826: 781b ldrb r3, [r3, #0]
8008828: 009b lsls r3, r3, #2
800882a: 441a add r2, r3
800882c: 8afb ldrh r3, [r7, #22]
800882e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008832: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008836: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800883a: f043 0380 orr.w r3, r3, #128 @ 0x80
800883e: b29b uxth r3, r3
8008840: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8008842: 687a ldr r2, [r7, #4]
8008844: 683b ldr r3, [r7, #0]
8008846: 781b ldrb r3, [r3, #0]
8008848: 009b lsls r3, r3, #2
800884a: 4413 add r3, r2
800884c: 881b ldrh r3, [r3, #0]
800884e: b29b uxth r3, r3
8008850: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008854: f023 0340 bic.w r3, r3, #64 @ 0x40
8008858: 82bb strh r3, [r7, #20]
800885a: 687a ldr r2, [r7, #4]
800885c: 683b ldr r3, [r7, #0]
800885e: 781b ldrb r3, [r3, #0]
8008860: 009b lsls r3, r3, #2
8008862: 441a add r2, r3
8008864: 8abb ldrh r3, [r7, #20]
8008866: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800886a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800886e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008872: f043 0380 orr.w r3, r3, #128 @ 0x80
8008876: b29b uxth r3, r3
8008878: 8013 strh r3, [r2, #0]
800887a: e0a3 b.n 80089c4 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800887c: 687a ldr r2, [r7, #4]
800887e: 683b ldr r3, [r7, #0]
8008880: 781b ldrb r3, [r3, #0]
8008882: 009b lsls r3, r3, #2
8008884: 4413 add r3, r2
8008886: 881b ldrh r3, [r3, #0]
8008888: 85fb strh r3, [r7, #46] @ 0x2e
800888a: 8dfb ldrh r3, [r7, #46] @ 0x2e
800888c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008890: 2b00 cmp r3, #0
8008892: d01b beq.n 80088cc <USB_DeactivateEndpoint+0x2d4>
8008894: 687a ldr r2, [r7, #4]
8008896: 683b ldr r3, [r7, #0]
8008898: 781b ldrb r3, [r3, #0]
800889a: 009b lsls r3, r3, #2
800889c: 4413 add r3, r2
800889e: 881b ldrh r3, [r3, #0]
80088a0: b29b uxth r3, r3
80088a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80088a6: f023 0370 bic.w r3, r3, #112 @ 0x70
80088aa: 85bb strh r3, [r7, #44] @ 0x2c
80088ac: 687a ldr r2, [r7, #4]
80088ae: 683b ldr r3, [r7, #0]
80088b0: 781b ldrb r3, [r3, #0]
80088b2: 009b lsls r3, r3, #2
80088b4: 441a add r2, r3
80088b6: 8dbb ldrh r3, [r7, #44] @ 0x2c
80088b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80088bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80088c0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80088c4: f043 0380 orr.w r3, r3, #128 @ 0x80
80088c8: b29b uxth r3, r3
80088ca: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80088cc: 687a ldr r2, [r7, #4]
80088ce: 683b ldr r3, [r7, #0]
80088d0: 781b ldrb r3, [r3, #0]
80088d2: 009b lsls r3, r3, #2
80088d4: 4413 add r3, r2
80088d6: 881b ldrh r3, [r3, #0]
80088d8: 857b strh r3, [r7, #42] @ 0x2a
80088da: 8d7b ldrh r3, [r7, #42] @ 0x2a
80088dc: f003 0340 and.w r3, r3, #64 @ 0x40
80088e0: 2b00 cmp r3, #0
80088e2: d01b beq.n 800891c <USB_DeactivateEndpoint+0x324>
80088e4: 687a ldr r2, [r7, #4]
80088e6: 683b ldr r3, [r7, #0]
80088e8: 781b ldrb r3, [r3, #0]
80088ea: 009b lsls r3, r3, #2
80088ec: 4413 add r3, r2
80088ee: 881b ldrh r3, [r3, #0]
80088f0: b29b uxth r3, r3
80088f2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80088f6: f023 0370 bic.w r3, r3, #112 @ 0x70
80088fa: 853b strh r3, [r7, #40] @ 0x28
80088fc: 687a ldr r2, [r7, #4]
80088fe: 683b ldr r3, [r7, #0]
8008900: 781b ldrb r3, [r3, #0]
8008902: 009b lsls r3, r3, #2
8008904: 441a add r2, r3
8008906: 8d3b ldrh r3, [r7, #40] @ 0x28
8008908: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800890c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008910: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008914: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8008918: b29b uxth r3, r3
800891a: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
800891c: 687a ldr r2, [r7, #4]
800891e: 683b ldr r3, [r7, #0]
8008920: 781b ldrb r3, [r3, #0]
8008922: 009b lsls r3, r3, #2
8008924: 4413 add r3, r2
8008926: 881b ldrh r3, [r3, #0]
8008928: b29b uxth r3, r3
800892a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800892e: f023 0370 bic.w r3, r3, #112 @ 0x70
8008932: 84fb strh r3, [r7, #38] @ 0x26
8008934: 687a ldr r2, [r7, #4]
8008936: 683b ldr r3, [r7, #0]
8008938: 781b ldrb r3, [r3, #0]
800893a: 009b lsls r3, r3, #2
800893c: 441a add r2, r3
800893e: 8cfb ldrh r3, [r7, #38] @ 0x26
8008940: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008944: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008948: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800894c: f043 0380 orr.w r3, r3, #128 @ 0x80
8008950: b29b uxth r3, r3
8008952: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8008954: 687a ldr r2, [r7, #4]
8008956: 683b ldr r3, [r7, #0]
8008958: 781b ldrb r3, [r3, #0]
800895a: 009b lsls r3, r3, #2
800895c: 4413 add r3, r2
800895e: 881b ldrh r3, [r3, #0]
8008960: b29b uxth r3, r3
8008962: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008966: f023 0340 bic.w r3, r3, #64 @ 0x40
800896a: 84bb strh r3, [r7, #36] @ 0x24
800896c: 687a ldr r2, [r7, #4]
800896e: 683b ldr r3, [r7, #0]
8008970: 781b ldrb r3, [r3, #0]
8008972: 009b lsls r3, r3, #2
8008974: 441a add r2, r3
8008976: 8cbb ldrh r3, [r7, #36] @ 0x24
8008978: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800897c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008980: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008984: f043 0380 orr.w r3, r3, #128 @ 0x80
8008988: b29b uxth r3, r3
800898a: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800898c: 687a ldr r2, [r7, #4]
800898e: 683b ldr r3, [r7, #0]
8008990: 781b ldrb r3, [r3, #0]
8008992: 009b lsls r3, r3, #2
8008994: 4413 add r3, r2
8008996: 881b ldrh r3, [r3, #0]
8008998: b29b uxth r3, r3
800899a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800899e: f023 0370 bic.w r3, r3, #112 @ 0x70
80089a2: 847b strh r3, [r7, #34] @ 0x22
80089a4: 687a ldr r2, [r7, #4]
80089a6: 683b ldr r3, [r7, #0]
80089a8: 781b ldrb r3, [r3, #0]
80089aa: 009b lsls r3, r3, #2
80089ac: 441a add r2, r3
80089ae: 8c7b ldrh r3, [r7, #34] @ 0x22
80089b0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80089b4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80089b8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80089bc: f043 0380 orr.w r3, r3, #128 @ 0x80
80089c0: b29b uxth r3, r3
80089c2: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
80089c4: 2300 movs r3, #0
}
80089c6: 4618 mov r0, r3
80089c8: 3734 adds r7, #52 @ 0x34
80089ca: 46bd mov sp, r7
80089cc: bc80 pop {r7}
80089ce: 4770 bx lr
080089d0 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80089d0: b580 push {r7, lr}
80089d2: b0c2 sub sp, #264 @ 0x108
80089d4: af00 add r7, sp, #0
80089d6: f507 7384 add.w r3, r7, #264 @ 0x108
80089da: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80089de: 6018 str r0, [r3, #0]
80089e0: f507 7384 add.w r3, r7, #264 @ 0x108
80089e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80089e8: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
80089ea: f507 7384 add.w r3, r7, #264 @ 0x108
80089ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80089f2: 681b ldr r3, [r3, #0]
80089f4: 785b ldrb r3, [r3, #1]
80089f6: 2b01 cmp r3, #1
80089f8: f040 86b7 bne.w 800976a <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
80089fc: f507 7384 add.w r3, r7, #264 @ 0x108
8008a00: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008a04: 681b ldr r3, [r3, #0]
8008a06: 699a ldr r2, [r3, #24]
8008a08: f507 7384 add.w r3, r7, #264 @ 0x108
8008a0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008a10: 681b ldr r3, [r3, #0]
8008a12: 691b ldr r3, [r3, #16]
8008a14: 429a cmp r2, r3
8008a16: d908 bls.n 8008a2a <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
8008a18: f507 7384 add.w r3, r7, #264 @ 0x108
8008a1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008a20: 681b ldr r3, [r3, #0]
8008a22: 691b ldr r3, [r3, #16]
8008a24: f8c7 3104 str.w r3, [r7, #260] @ 0x104
8008a28: e007 b.n 8008a3a <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
8008a2a: f507 7384 add.w r3, r7, #264 @ 0x108
8008a2e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008a32: 681b ldr r3, [r3, #0]
8008a34: 699b ldr r3, [r3, #24]
8008a36: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8008a3a: f507 7384 add.w r3, r7, #264 @ 0x108
8008a3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008a42: 681b ldr r3, [r3, #0]
8008a44: 7b1b ldrb r3, [r3, #12]
8008a46: 2b00 cmp r3, #0
8008a48: d13a bne.n 8008ac0 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8008a4a: f507 7384 add.w r3, r7, #264 @ 0x108
8008a4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008a52: 681b ldr r3, [r3, #0]
8008a54: 6959 ldr r1, [r3, #20]
8008a56: f507 7384 add.w r3, r7, #264 @ 0x108
8008a5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008a5e: 681b ldr r3, [r3, #0]
8008a60: 88da ldrh r2, [r3, #6]
8008a62: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008a66: b29b uxth r3, r3
8008a68: f507 7084 add.w r0, r7, #264 @ 0x108
8008a6c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8008a70: 6800 ldr r0, [r0, #0]
8008a72: f001 fc9c bl 800a3ae <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8008a76: f507 7384 add.w r3, r7, #264 @ 0x108
8008a7a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008a7e: 681b ldr r3, [r3, #0]
8008a80: 613b str r3, [r7, #16]
8008a82: f507 7384 add.w r3, r7, #264 @ 0x108
8008a86: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008a8a: 681b ldr r3, [r3, #0]
8008a8c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008a90: b29b uxth r3, r3
8008a92: 461a mov r2, r3
8008a94: 693b ldr r3, [r7, #16]
8008a96: 4413 add r3, r2
8008a98: 613b str r3, [r7, #16]
8008a9a: f507 7384 add.w r3, r7, #264 @ 0x108
8008a9e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008aa2: 681b ldr r3, [r3, #0]
8008aa4: 781b ldrb r3, [r3, #0]
8008aa6: 011a lsls r2, r3, #4
8008aa8: 693b ldr r3, [r7, #16]
8008aaa: 4413 add r3, r2
8008aac: f203 4304 addw r3, r3, #1028 @ 0x404
8008ab0: 60fb str r3, [r7, #12]
8008ab2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008ab6: b29a uxth r2, r3
8008ab8: 68fb ldr r3, [r7, #12]
8008aba: 801a strh r2, [r3, #0]
8008abc: f000 be1f b.w 80096fe <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
8008ac0: f507 7384 add.w r3, r7, #264 @ 0x108
8008ac4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008ac8: 681b ldr r3, [r3, #0]
8008aca: 78db ldrb r3, [r3, #3]
8008acc: 2b02 cmp r3, #2
8008ace: f040 8462 bne.w 8009396 <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
8008ad2: f507 7384 add.w r3, r7, #264 @ 0x108
8008ad6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008ada: 681b ldr r3, [r3, #0]
8008adc: 6a1a ldr r2, [r3, #32]
8008ade: f507 7384 add.w r3, r7, #264 @ 0x108
8008ae2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008ae6: 681b ldr r3, [r3, #0]
8008ae8: 691b ldr r3, [r3, #16]
8008aea: 429a cmp r2, r3
8008aec: f240 83df bls.w 80092ae <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8008af0: f507 7384 add.w r3, r7, #264 @ 0x108
8008af4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008af8: 681a ldr r2, [r3, #0]
8008afa: f507 7384 add.w r3, r7, #264 @ 0x108
8008afe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008b02: 681b ldr r3, [r3, #0]
8008b04: 781b ldrb r3, [r3, #0]
8008b06: 009b lsls r3, r3, #2
8008b08: 4413 add r3, r2
8008b0a: 881b ldrh r3, [r3, #0]
8008b0c: b29b uxth r3, r3
8008b0e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008b12: f023 0370 bic.w r3, r3, #112 @ 0x70
8008b16: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
8008b1a: f507 7384 add.w r3, r7, #264 @ 0x108
8008b1e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008b22: 681a ldr r2, [r3, #0]
8008b24: f507 7384 add.w r3, r7, #264 @ 0x108
8008b28: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008b2c: 681b ldr r3, [r3, #0]
8008b2e: 781b ldrb r3, [r3, #0]
8008b30: 009b lsls r3, r3, #2
8008b32: 441a add r2, r3
8008b34: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
8008b38: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008b3c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008b40: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8008b44: f043 0380 orr.w r3, r3, #128 @ 0x80
8008b48: b29b uxth r3, r3
8008b4a: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8008b4c: f507 7384 add.w r3, r7, #264 @ 0x108
8008b50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008b54: 681b ldr r3, [r3, #0]
8008b56: 6a1a ldr r2, [r3, #32]
8008b58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008b5c: 1ad2 subs r2, r2, r3
8008b5e: f507 7384 add.w r3, r7, #264 @ 0x108
8008b62: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008b66: 681b ldr r3, [r3, #0]
8008b68: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8008b6a: f507 7384 add.w r3, r7, #264 @ 0x108
8008b6e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008b72: 681a ldr r2, [r3, #0]
8008b74: f507 7384 add.w r3, r7, #264 @ 0x108
8008b78: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008b7c: 681b ldr r3, [r3, #0]
8008b7e: 781b ldrb r3, [r3, #0]
8008b80: 009b lsls r3, r3, #2
8008b82: 4413 add r3, r2
8008b84: 881b ldrh r3, [r3, #0]
8008b86: b29b uxth r3, r3
8008b88: f003 0340 and.w r3, r3, #64 @ 0x40
8008b8c: 2b00 cmp r3, #0
8008b8e: f000 81c7 beq.w 8008f20 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8008b92: f507 7384 add.w r3, r7, #264 @ 0x108
8008b96: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008b9a: 681b ldr r3, [r3, #0]
8008b9c: 633b str r3, [r7, #48] @ 0x30
8008b9e: f507 7384 add.w r3, r7, #264 @ 0x108
8008ba2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008ba6: 681b ldr r3, [r3, #0]
8008ba8: 785b ldrb r3, [r3, #1]
8008baa: 2b00 cmp r3, #0
8008bac: d177 bne.n 8008c9e <USB_EPStartXfer+0x2ce>
8008bae: f507 7384 add.w r3, r7, #264 @ 0x108
8008bb2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008bb6: 681b ldr r3, [r3, #0]
8008bb8: 62bb str r3, [r7, #40] @ 0x28
8008bba: f507 7384 add.w r3, r7, #264 @ 0x108
8008bbe: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008bc2: 681b ldr r3, [r3, #0]
8008bc4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008bc8: b29b uxth r3, r3
8008bca: 461a mov r2, r3
8008bcc: 6abb ldr r3, [r7, #40] @ 0x28
8008bce: 4413 add r3, r2
8008bd0: 62bb str r3, [r7, #40] @ 0x28
8008bd2: f507 7384 add.w r3, r7, #264 @ 0x108
8008bd6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008bda: 681b ldr r3, [r3, #0]
8008bdc: 781b ldrb r3, [r3, #0]
8008bde: 011a lsls r2, r3, #4
8008be0: 6abb ldr r3, [r7, #40] @ 0x28
8008be2: 4413 add r3, r2
8008be4: f203 430c addw r3, r3, #1036 @ 0x40c
8008be8: 627b str r3, [r7, #36] @ 0x24
8008bea: 6a7b ldr r3, [r7, #36] @ 0x24
8008bec: 881b ldrh r3, [r3, #0]
8008bee: b29b uxth r3, r3
8008bf0: f3c3 0309 ubfx r3, r3, #0, #10
8008bf4: b29a uxth r2, r3
8008bf6: 6a7b ldr r3, [r7, #36] @ 0x24
8008bf8: 801a strh r2, [r3, #0]
8008bfa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008bfe: 2b3e cmp r3, #62 @ 0x3e
8008c00: d921 bls.n 8008c46 <USB_EPStartXfer+0x276>
8008c02: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008c06: 095b lsrs r3, r3, #5
8008c08: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8008c0c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008c10: f003 031f and.w r3, r3, #31
8008c14: 2b00 cmp r3, #0
8008c16: d104 bne.n 8008c22 <USB_EPStartXfer+0x252>
8008c18: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8008c1c: 3b01 subs r3, #1
8008c1e: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8008c22: 6a7b ldr r3, [r7, #36] @ 0x24
8008c24: 881b ldrh r3, [r3, #0]
8008c26: b29a uxth r2, r3
8008c28: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8008c2c: b29b uxth r3, r3
8008c2e: 029b lsls r3, r3, #10
8008c30: b29b uxth r3, r3
8008c32: 4313 orrs r3, r2
8008c34: b29b uxth r3, r3
8008c36: ea6f 4343 mvn.w r3, r3, lsl #17
8008c3a: ea6f 4353 mvn.w r3, r3, lsr #17
8008c3e: b29a uxth r2, r3
8008c40: 6a7b ldr r3, [r7, #36] @ 0x24
8008c42: 801a strh r2, [r3, #0]
8008c44: e050 b.n 8008ce8 <USB_EPStartXfer+0x318>
8008c46: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008c4a: 2b00 cmp r3, #0
8008c4c: d10a bne.n 8008c64 <USB_EPStartXfer+0x294>
8008c4e: 6a7b ldr r3, [r7, #36] @ 0x24
8008c50: 881b ldrh r3, [r3, #0]
8008c52: b29b uxth r3, r3
8008c54: ea6f 4343 mvn.w r3, r3, lsl #17
8008c58: ea6f 4353 mvn.w r3, r3, lsr #17
8008c5c: b29a uxth r2, r3
8008c5e: 6a7b ldr r3, [r7, #36] @ 0x24
8008c60: 801a strh r2, [r3, #0]
8008c62: e041 b.n 8008ce8 <USB_EPStartXfer+0x318>
8008c64: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008c68: 085b lsrs r3, r3, #1
8008c6a: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8008c6e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008c72: f003 0301 and.w r3, r3, #1
8008c76: 2b00 cmp r3, #0
8008c78: d004 beq.n 8008c84 <USB_EPStartXfer+0x2b4>
8008c7a: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8008c7e: 3301 adds r3, #1
8008c80: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8008c84: 6a7b ldr r3, [r7, #36] @ 0x24
8008c86: 881b ldrh r3, [r3, #0]
8008c88: b29a uxth r2, r3
8008c8a: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8008c8e: b29b uxth r3, r3
8008c90: 029b lsls r3, r3, #10
8008c92: b29b uxth r3, r3
8008c94: 4313 orrs r3, r2
8008c96: b29a uxth r2, r3
8008c98: 6a7b ldr r3, [r7, #36] @ 0x24
8008c9a: 801a strh r2, [r3, #0]
8008c9c: e024 b.n 8008ce8 <USB_EPStartXfer+0x318>
8008c9e: f507 7384 add.w r3, r7, #264 @ 0x108
8008ca2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008ca6: 681b ldr r3, [r3, #0]
8008ca8: 785b ldrb r3, [r3, #1]
8008caa: 2b01 cmp r3, #1
8008cac: d11c bne.n 8008ce8 <USB_EPStartXfer+0x318>
8008cae: f507 7384 add.w r3, r7, #264 @ 0x108
8008cb2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008cb6: 681b ldr r3, [r3, #0]
8008cb8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008cbc: b29b uxth r3, r3
8008cbe: 461a mov r2, r3
8008cc0: 6b3b ldr r3, [r7, #48] @ 0x30
8008cc2: 4413 add r3, r2
8008cc4: 633b str r3, [r7, #48] @ 0x30
8008cc6: f507 7384 add.w r3, r7, #264 @ 0x108
8008cca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008cce: 681b ldr r3, [r3, #0]
8008cd0: 781b ldrb r3, [r3, #0]
8008cd2: 011a lsls r2, r3, #4
8008cd4: 6b3b ldr r3, [r7, #48] @ 0x30
8008cd6: 4413 add r3, r2
8008cd8: f203 430c addw r3, r3, #1036 @ 0x40c
8008cdc: 62fb str r3, [r7, #44] @ 0x2c
8008cde: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008ce2: b29a uxth r2, r3
8008ce4: 6afb ldr r3, [r7, #44] @ 0x2c
8008ce6: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8008ce8: f507 7384 add.w r3, r7, #264 @ 0x108
8008cec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008cf0: 681b ldr r3, [r3, #0]
8008cf2: 895b ldrh r3, [r3, #10]
8008cf4: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8008cf8: f507 7384 add.w r3, r7, #264 @ 0x108
8008cfc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d00: 681b ldr r3, [r3, #0]
8008d02: 6959 ldr r1, [r3, #20]
8008d04: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008d08: b29b uxth r3, r3
8008d0a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8008d0e: f507 7084 add.w r0, r7, #264 @ 0x108
8008d12: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8008d16: 6800 ldr r0, [r0, #0]
8008d18: f001 fb49 bl 800a3ae <USB_WritePMA>
ep->xfer_buff += len;
8008d1c: f507 7384 add.w r3, r7, #264 @ 0x108
8008d20: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d24: 681b ldr r3, [r3, #0]
8008d26: 695a ldr r2, [r3, #20]
8008d28: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008d2c: 441a add r2, r3
8008d2e: f507 7384 add.w r3, r7, #264 @ 0x108
8008d32: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d36: 681b ldr r3, [r3, #0]
8008d38: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8008d3a: f507 7384 add.w r3, r7, #264 @ 0x108
8008d3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d42: 681b ldr r3, [r3, #0]
8008d44: 6a1a ldr r2, [r3, #32]
8008d46: f507 7384 add.w r3, r7, #264 @ 0x108
8008d4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d4e: 681b ldr r3, [r3, #0]
8008d50: 691b ldr r3, [r3, #16]
8008d52: 429a cmp r2, r3
8008d54: d90f bls.n 8008d76 <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
8008d56: f507 7384 add.w r3, r7, #264 @ 0x108
8008d5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d5e: 681b ldr r3, [r3, #0]
8008d60: 6a1a ldr r2, [r3, #32]
8008d62: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008d66: 1ad2 subs r2, r2, r3
8008d68: f507 7384 add.w r3, r7, #264 @ 0x108
8008d6c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d70: 681b ldr r3, [r3, #0]
8008d72: 621a str r2, [r3, #32]
8008d74: e00e b.n 8008d94 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
8008d76: f507 7384 add.w r3, r7, #264 @ 0x108
8008d7a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d7e: 681b ldr r3, [r3, #0]
8008d80: 6a1b ldr r3, [r3, #32]
8008d82: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8008d86: f507 7384 add.w r3, r7, #264 @ 0x108
8008d8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d8e: 681b ldr r3, [r3, #0]
8008d90: 2200 movs r2, #0
8008d92: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8008d94: f507 7384 add.w r3, r7, #264 @ 0x108
8008d98: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008d9c: 681b ldr r3, [r3, #0]
8008d9e: 785b ldrb r3, [r3, #1]
8008da0: 2b00 cmp r3, #0
8008da2: d177 bne.n 8008e94 <USB_EPStartXfer+0x4c4>
8008da4: f507 7384 add.w r3, r7, #264 @ 0x108
8008da8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008dac: 681b ldr r3, [r3, #0]
8008dae: 61bb str r3, [r7, #24]
8008db0: f507 7384 add.w r3, r7, #264 @ 0x108
8008db4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008db8: 681b ldr r3, [r3, #0]
8008dba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008dbe: b29b uxth r3, r3
8008dc0: 461a mov r2, r3
8008dc2: 69bb ldr r3, [r7, #24]
8008dc4: 4413 add r3, r2
8008dc6: 61bb str r3, [r7, #24]
8008dc8: f507 7384 add.w r3, r7, #264 @ 0x108
8008dcc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008dd0: 681b ldr r3, [r3, #0]
8008dd2: 781b ldrb r3, [r3, #0]
8008dd4: 011a lsls r2, r3, #4
8008dd6: 69bb ldr r3, [r7, #24]
8008dd8: 4413 add r3, r2
8008dda: f203 4304 addw r3, r3, #1028 @ 0x404
8008dde: 617b str r3, [r7, #20]
8008de0: 697b ldr r3, [r7, #20]
8008de2: 881b ldrh r3, [r3, #0]
8008de4: b29b uxth r3, r3
8008de6: f3c3 0309 ubfx r3, r3, #0, #10
8008dea: b29a uxth r2, r3
8008dec: 697b ldr r3, [r7, #20]
8008dee: 801a strh r2, [r3, #0]
8008df0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008df4: 2b3e cmp r3, #62 @ 0x3e
8008df6: d921 bls.n 8008e3c <USB_EPStartXfer+0x46c>
8008df8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008dfc: 095b lsrs r3, r3, #5
8008dfe: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8008e02: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008e06: f003 031f and.w r3, r3, #31
8008e0a: 2b00 cmp r3, #0
8008e0c: d104 bne.n 8008e18 <USB_EPStartXfer+0x448>
8008e0e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8008e12: 3b01 subs r3, #1
8008e14: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8008e18: 697b ldr r3, [r7, #20]
8008e1a: 881b ldrh r3, [r3, #0]
8008e1c: b29a uxth r2, r3
8008e1e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8008e22: b29b uxth r3, r3
8008e24: 029b lsls r3, r3, #10
8008e26: b29b uxth r3, r3
8008e28: 4313 orrs r3, r2
8008e2a: b29b uxth r3, r3
8008e2c: ea6f 4343 mvn.w r3, r3, lsl #17
8008e30: ea6f 4353 mvn.w r3, r3, lsr #17
8008e34: b29a uxth r2, r3
8008e36: 697b ldr r3, [r7, #20]
8008e38: 801a strh r2, [r3, #0]
8008e3a: e056 b.n 8008eea <USB_EPStartXfer+0x51a>
8008e3c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008e40: 2b00 cmp r3, #0
8008e42: d10a bne.n 8008e5a <USB_EPStartXfer+0x48a>
8008e44: 697b ldr r3, [r7, #20]
8008e46: 881b ldrh r3, [r3, #0]
8008e48: b29b uxth r3, r3
8008e4a: ea6f 4343 mvn.w r3, r3, lsl #17
8008e4e: ea6f 4353 mvn.w r3, r3, lsr #17
8008e52: b29a uxth r2, r3
8008e54: 697b ldr r3, [r7, #20]
8008e56: 801a strh r2, [r3, #0]
8008e58: e047 b.n 8008eea <USB_EPStartXfer+0x51a>
8008e5a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008e5e: 085b lsrs r3, r3, #1
8008e60: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8008e64: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008e68: f003 0301 and.w r3, r3, #1
8008e6c: 2b00 cmp r3, #0
8008e6e: d004 beq.n 8008e7a <USB_EPStartXfer+0x4aa>
8008e70: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8008e74: 3301 adds r3, #1
8008e76: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8008e7a: 697b ldr r3, [r7, #20]
8008e7c: 881b ldrh r3, [r3, #0]
8008e7e: b29a uxth r2, r3
8008e80: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8008e84: b29b uxth r3, r3
8008e86: 029b lsls r3, r3, #10
8008e88: b29b uxth r3, r3
8008e8a: 4313 orrs r3, r2
8008e8c: b29a uxth r2, r3
8008e8e: 697b ldr r3, [r7, #20]
8008e90: 801a strh r2, [r3, #0]
8008e92: e02a b.n 8008eea <USB_EPStartXfer+0x51a>
8008e94: f507 7384 add.w r3, r7, #264 @ 0x108
8008e98: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008e9c: 681b ldr r3, [r3, #0]
8008e9e: 785b ldrb r3, [r3, #1]
8008ea0: 2b01 cmp r3, #1
8008ea2: d122 bne.n 8008eea <USB_EPStartXfer+0x51a>
8008ea4: f507 7384 add.w r3, r7, #264 @ 0x108
8008ea8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008eac: 681b ldr r3, [r3, #0]
8008eae: 623b str r3, [r7, #32]
8008eb0: f507 7384 add.w r3, r7, #264 @ 0x108
8008eb4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008eb8: 681b ldr r3, [r3, #0]
8008eba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008ebe: b29b uxth r3, r3
8008ec0: 461a mov r2, r3
8008ec2: 6a3b ldr r3, [r7, #32]
8008ec4: 4413 add r3, r2
8008ec6: 623b str r3, [r7, #32]
8008ec8: f507 7384 add.w r3, r7, #264 @ 0x108
8008ecc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008ed0: 681b ldr r3, [r3, #0]
8008ed2: 781b ldrb r3, [r3, #0]
8008ed4: 011a lsls r2, r3, #4
8008ed6: 6a3b ldr r3, [r7, #32]
8008ed8: 4413 add r3, r2
8008eda: f203 4304 addw r3, r3, #1028 @ 0x404
8008ede: 61fb str r3, [r7, #28]
8008ee0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008ee4: b29a uxth r2, r3
8008ee6: 69fb ldr r3, [r7, #28]
8008ee8: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8008eea: f507 7384 add.w r3, r7, #264 @ 0x108
8008eee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008ef2: 681b ldr r3, [r3, #0]
8008ef4: 891b ldrh r3, [r3, #8]
8008ef6: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8008efa: f507 7384 add.w r3, r7, #264 @ 0x108
8008efe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008f02: 681b ldr r3, [r3, #0]
8008f04: 6959 ldr r1, [r3, #20]
8008f06: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008f0a: b29b uxth r3, r3
8008f0c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8008f10: f507 7084 add.w r0, r7, #264 @ 0x108
8008f14: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8008f18: 6800 ldr r0, [r0, #0]
8008f1a: f001 fa48 bl 800a3ae <USB_WritePMA>
8008f1e: e3ee b.n 80096fe <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8008f20: f507 7384 add.w r3, r7, #264 @ 0x108
8008f24: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008f28: 681b ldr r3, [r3, #0]
8008f2a: 785b ldrb r3, [r3, #1]
8008f2c: 2b00 cmp r3, #0
8008f2e: d177 bne.n 8009020 <USB_EPStartXfer+0x650>
8008f30: f507 7384 add.w r3, r7, #264 @ 0x108
8008f34: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008f38: 681b ldr r3, [r3, #0]
8008f3a: 64bb str r3, [r7, #72] @ 0x48
8008f3c: f507 7384 add.w r3, r7, #264 @ 0x108
8008f40: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008f44: 681b ldr r3, [r3, #0]
8008f46: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8008f4a: b29b uxth r3, r3
8008f4c: 461a mov r2, r3
8008f4e: 6cbb ldr r3, [r7, #72] @ 0x48
8008f50: 4413 add r3, r2
8008f52: 64bb str r3, [r7, #72] @ 0x48
8008f54: f507 7384 add.w r3, r7, #264 @ 0x108
8008f58: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008f5c: 681b ldr r3, [r3, #0]
8008f5e: 781b ldrb r3, [r3, #0]
8008f60: 011a lsls r2, r3, #4
8008f62: 6cbb ldr r3, [r7, #72] @ 0x48
8008f64: 4413 add r3, r2
8008f66: f203 4304 addw r3, r3, #1028 @ 0x404
8008f6a: 647b str r3, [r7, #68] @ 0x44
8008f6c: 6c7b ldr r3, [r7, #68] @ 0x44
8008f6e: 881b ldrh r3, [r3, #0]
8008f70: b29b uxth r3, r3
8008f72: f3c3 0309 ubfx r3, r3, #0, #10
8008f76: b29a uxth r2, r3
8008f78: 6c7b ldr r3, [r7, #68] @ 0x44
8008f7a: 801a strh r2, [r3, #0]
8008f7c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008f80: 2b3e cmp r3, #62 @ 0x3e
8008f82: d921 bls.n 8008fc8 <USB_EPStartXfer+0x5f8>
8008f84: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008f88: 095b lsrs r3, r3, #5
8008f8a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8008f8e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008f92: f003 031f and.w r3, r3, #31
8008f96: 2b00 cmp r3, #0
8008f98: d104 bne.n 8008fa4 <USB_EPStartXfer+0x5d4>
8008f9a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8008f9e: 3b01 subs r3, #1
8008fa0: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8008fa4: 6c7b ldr r3, [r7, #68] @ 0x44
8008fa6: 881b ldrh r3, [r3, #0]
8008fa8: b29a uxth r2, r3
8008faa: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8008fae: b29b uxth r3, r3
8008fb0: 029b lsls r3, r3, #10
8008fb2: b29b uxth r3, r3
8008fb4: 4313 orrs r3, r2
8008fb6: b29b uxth r3, r3
8008fb8: ea6f 4343 mvn.w r3, r3, lsl #17
8008fbc: ea6f 4353 mvn.w r3, r3, lsr #17
8008fc0: b29a uxth r2, r3
8008fc2: 6c7b ldr r3, [r7, #68] @ 0x44
8008fc4: 801a strh r2, [r3, #0]
8008fc6: e056 b.n 8009076 <USB_EPStartXfer+0x6a6>
8008fc8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008fcc: 2b00 cmp r3, #0
8008fce: d10a bne.n 8008fe6 <USB_EPStartXfer+0x616>
8008fd0: 6c7b ldr r3, [r7, #68] @ 0x44
8008fd2: 881b ldrh r3, [r3, #0]
8008fd4: b29b uxth r3, r3
8008fd6: ea6f 4343 mvn.w r3, r3, lsl #17
8008fda: ea6f 4353 mvn.w r3, r3, lsr #17
8008fde: b29a uxth r2, r3
8008fe0: 6c7b ldr r3, [r7, #68] @ 0x44
8008fe2: 801a strh r2, [r3, #0]
8008fe4: e047 b.n 8009076 <USB_EPStartXfer+0x6a6>
8008fe6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008fea: 085b lsrs r3, r3, #1
8008fec: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8008ff0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8008ff4: f003 0301 and.w r3, r3, #1
8008ff8: 2b00 cmp r3, #0
8008ffa: d004 beq.n 8009006 <USB_EPStartXfer+0x636>
8008ffc: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8009000: 3301 adds r3, #1
8009002: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8009006: 6c7b ldr r3, [r7, #68] @ 0x44
8009008: 881b ldrh r3, [r3, #0]
800900a: b29a uxth r2, r3
800900c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8009010: b29b uxth r3, r3
8009012: 029b lsls r3, r3, #10
8009014: b29b uxth r3, r3
8009016: 4313 orrs r3, r2
8009018: b29a uxth r2, r3
800901a: 6c7b ldr r3, [r7, #68] @ 0x44
800901c: 801a strh r2, [r3, #0]
800901e: e02a b.n 8009076 <USB_EPStartXfer+0x6a6>
8009020: f507 7384 add.w r3, r7, #264 @ 0x108
8009024: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009028: 681b ldr r3, [r3, #0]
800902a: 785b ldrb r3, [r3, #1]
800902c: 2b01 cmp r3, #1
800902e: d122 bne.n 8009076 <USB_EPStartXfer+0x6a6>
8009030: f507 7384 add.w r3, r7, #264 @ 0x108
8009034: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009038: 681b ldr r3, [r3, #0]
800903a: 653b str r3, [r7, #80] @ 0x50
800903c: f507 7384 add.w r3, r7, #264 @ 0x108
8009040: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009044: 681b ldr r3, [r3, #0]
8009046: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800904a: b29b uxth r3, r3
800904c: 461a mov r2, r3
800904e: 6d3b ldr r3, [r7, #80] @ 0x50
8009050: 4413 add r3, r2
8009052: 653b str r3, [r7, #80] @ 0x50
8009054: f507 7384 add.w r3, r7, #264 @ 0x108
8009058: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800905c: 681b ldr r3, [r3, #0]
800905e: 781b ldrb r3, [r3, #0]
8009060: 011a lsls r2, r3, #4
8009062: 6d3b ldr r3, [r7, #80] @ 0x50
8009064: 4413 add r3, r2
8009066: f203 4304 addw r3, r3, #1028 @ 0x404
800906a: 64fb str r3, [r7, #76] @ 0x4c
800906c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009070: b29a uxth r2, r3
8009072: 6cfb ldr r3, [r7, #76] @ 0x4c
8009074: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8009076: f507 7384 add.w r3, r7, #264 @ 0x108
800907a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800907e: 681b ldr r3, [r3, #0]
8009080: 891b ldrh r3, [r3, #8]
8009082: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8009086: f507 7384 add.w r3, r7, #264 @ 0x108
800908a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800908e: 681b ldr r3, [r3, #0]
8009090: 6959 ldr r1, [r3, #20]
8009092: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009096: b29b uxth r3, r3
8009098: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800909c: f507 7084 add.w r0, r7, #264 @ 0x108
80090a0: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80090a4: 6800 ldr r0, [r0, #0]
80090a6: f001 f982 bl 800a3ae <USB_WritePMA>
ep->xfer_buff += len;
80090aa: f507 7384 add.w r3, r7, #264 @ 0x108
80090ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80090b2: 681b ldr r3, [r3, #0]
80090b4: 695a ldr r2, [r3, #20]
80090b6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80090ba: 441a add r2, r3
80090bc: f507 7384 add.w r3, r7, #264 @ 0x108
80090c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80090c4: 681b ldr r3, [r3, #0]
80090c6: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
80090c8: f507 7384 add.w r3, r7, #264 @ 0x108
80090cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80090d0: 681b ldr r3, [r3, #0]
80090d2: 6a1a ldr r2, [r3, #32]
80090d4: f507 7384 add.w r3, r7, #264 @ 0x108
80090d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80090dc: 681b ldr r3, [r3, #0]
80090de: 691b ldr r3, [r3, #16]
80090e0: 429a cmp r2, r3
80090e2: d90f bls.n 8009104 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
80090e4: f507 7384 add.w r3, r7, #264 @ 0x108
80090e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80090ec: 681b ldr r3, [r3, #0]
80090ee: 6a1a ldr r2, [r3, #32]
80090f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80090f4: 1ad2 subs r2, r2, r3
80090f6: f507 7384 add.w r3, r7, #264 @ 0x108
80090fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80090fe: 681b ldr r3, [r3, #0]
8009100: 621a str r2, [r3, #32]
8009102: e00e b.n 8009122 <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
8009104: f507 7384 add.w r3, r7, #264 @ 0x108
8009108: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800910c: 681b ldr r3, [r3, #0]
800910e: 6a1b ldr r3, [r3, #32]
8009110: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8009114: f507 7384 add.w r3, r7, #264 @ 0x108
8009118: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800911c: 681b ldr r3, [r3, #0]
800911e: 2200 movs r2, #0
8009120: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8009122: f507 7384 add.w r3, r7, #264 @ 0x108
8009126: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800912a: 681b ldr r3, [r3, #0]
800912c: 643b str r3, [r7, #64] @ 0x40
800912e: f507 7384 add.w r3, r7, #264 @ 0x108
8009132: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009136: 681b ldr r3, [r3, #0]
8009138: 785b ldrb r3, [r3, #1]
800913a: 2b00 cmp r3, #0
800913c: d177 bne.n 800922e <USB_EPStartXfer+0x85e>
800913e: f507 7384 add.w r3, r7, #264 @ 0x108
8009142: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009146: 681b ldr r3, [r3, #0]
8009148: 63bb str r3, [r7, #56] @ 0x38
800914a: f507 7384 add.w r3, r7, #264 @ 0x108
800914e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009152: 681b ldr r3, [r3, #0]
8009154: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009158: b29b uxth r3, r3
800915a: 461a mov r2, r3
800915c: 6bbb ldr r3, [r7, #56] @ 0x38
800915e: 4413 add r3, r2
8009160: 63bb str r3, [r7, #56] @ 0x38
8009162: f507 7384 add.w r3, r7, #264 @ 0x108
8009166: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800916a: 681b ldr r3, [r3, #0]
800916c: 781b ldrb r3, [r3, #0]
800916e: 011a lsls r2, r3, #4
8009170: 6bbb ldr r3, [r7, #56] @ 0x38
8009172: 4413 add r3, r2
8009174: f203 430c addw r3, r3, #1036 @ 0x40c
8009178: 637b str r3, [r7, #52] @ 0x34
800917a: 6b7b ldr r3, [r7, #52] @ 0x34
800917c: 881b ldrh r3, [r3, #0]
800917e: b29b uxth r3, r3
8009180: f3c3 0309 ubfx r3, r3, #0, #10
8009184: b29a uxth r2, r3
8009186: 6b7b ldr r3, [r7, #52] @ 0x34
8009188: 801a strh r2, [r3, #0]
800918a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800918e: 2b3e cmp r3, #62 @ 0x3e
8009190: d921 bls.n 80091d6 <USB_EPStartXfer+0x806>
8009192: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009196: 095b lsrs r3, r3, #5
8009198: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800919c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80091a0: f003 031f and.w r3, r3, #31
80091a4: 2b00 cmp r3, #0
80091a6: d104 bne.n 80091b2 <USB_EPStartXfer+0x7e2>
80091a8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
80091ac: 3b01 subs r3, #1
80091ae: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
80091b2: 6b7b ldr r3, [r7, #52] @ 0x34
80091b4: 881b ldrh r3, [r3, #0]
80091b6: b29a uxth r2, r3
80091b8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
80091bc: b29b uxth r3, r3
80091be: 029b lsls r3, r3, #10
80091c0: b29b uxth r3, r3
80091c2: 4313 orrs r3, r2
80091c4: b29b uxth r3, r3
80091c6: ea6f 4343 mvn.w r3, r3, lsl #17
80091ca: ea6f 4353 mvn.w r3, r3, lsr #17
80091ce: b29a uxth r2, r3
80091d0: 6b7b ldr r3, [r7, #52] @ 0x34
80091d2: 801a strh r2, [r3, #0]
80091d4: e050 b.n 8009278 <USB_EPStartXfer+0x8a8>
80091d6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80091da: 2b00 cmp r3, #0
80091dc: d10a bne.n 80091f4 <USB_EPStartXfer+0x824>
80091de: 6b7b ldr r3, [r7, #52] @ 0x34
80091e0: 881b ldrh r3, [r3, #0]
80091e2: b29b uxth r3, r3
80091e4: ea6f 4343 mvn.w r3, r3, lsl #17
80091e8: ea6f 4353 mvn.w r3, r3, lsr #17
80091ec: b29a uxth r2, r3
80091ee: 6b7b ldr r3, [r7, #52] @ 0x34
80091f0: 801a strh r2, [r3, #0]
80091f2: e041 b.n 8009278 <USB_EPStartXfer+0x8a8>
80091f4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80091f8: 085b lsrs r3, r3, #1
80091fa: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
80091fe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009202: f003 0301 and.w r3, r3, #1
8009206: 2b00 cmp r3, #0
8009208: d004 beq.n 8009214 <USB_EPStartXfer+0x844>
800920a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800920e: 3301 adds r3, #1
8009210: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8009214: 6b7b ldr r3, [r7, #52] @ 0x34
8009216: 881b ldrh r3, [r3, #0]
8009218: b29a uxth r2, r3
800921a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800921e: b29b uxth r3, r3
8009220: 029b lsls r3, r3, #10
8009222: b29b uxth r3, r3
8009224: 4313 orrs r3, r2
8009226: b29a uxth r2, r3
8009228: 6b7b ldr r3, [r7, #52] @ 0x34
800922a: 801a strh r2, [r3, #0]
800922c: e024 b.n 8009278 <USB_EPStartXfer+0x8a8>
800922e: f507 7384 add.w r3, r7, #264 @ 0x108
8009232: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009236: 681b ldr r3, [r3, #0]
8009238: 785b ldrb r3, [r3, #1]
800923a: 2b01 cmp r3, #1
800923c: d11c bne.n 8009278 <USB_EPStartXfer+0x8a8>
800923e: f507 7384 add.w r3, r7, #264 @ 0x108
8009242: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009246: 681b ldr r3, [r3, #0]
8009248: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800924c: b29b uxth r3, r3
800924e: 461a mov r2, r3
8009250: 6c3b ldr r3, [r7, #64] @ 0x40
8009252: 4413 add r3, r2
8009254: 643b str r3, [r7, #64] @ 0x40
8009256: f507 7384 add.w r3, r7, #264 @ 0x108
800925a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800925e: 681b ldr r3, [r3, #0]
8009260: 781b ldrb r3, [r3, #0]
8009262: 011a lsls r2, r3, #4
8009264: 6c3b ldr r3, [r7, #64] @ 0x40
8009266: 4413 add r3, r2
8009268: f203 430c addw r3, r3, #1036 @ 0x40c
800926c: 63fb str r3, [r7, #60] @ 0x3c
800926e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009272: b29a uxth r2, r3
8009274: 6bfb ldr r3, [r7, #60] @ 0x3c
8009276: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8009278: f507 7384 add.w r3, r7, #264 @ 0x108
800927c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009280: 681b ldr r3, [r3, #0]
8009282: 895b ldrh r3, [r3, #10]
8009284: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8009288: f507 7384 add.w r3, r7, #264 @ 0x108
800928c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009290: 681b ldr r3, [r3, #0]
8009292: 6959 ldr r1, [r3, #20]
8009294: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009298: b29b uxth r3, r3
800929a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800929e: f507 7084 add.w r0, r7, #264 @ 0x108
80092a2: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80092a6: 6800 ldr r0, [r0, #0]
80092a8: f001 f881 bl 800a3ae <USB_WritePMA>
80092ac: e227 b.n 80096fe <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
80092ae: f507 7384 add.w r3, r7, #264 @ 0x108
80092b2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80092b6: 681b ldr r3, [r3, #0]
80092b8: 6a1b ldr r3, [r3, #32]
80092ba: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
80092be: f507 7384 add.w r3, r7, #264 @ 0x108
80092c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80092c6: 681a ldr r2, [r3, #0]
80092c8: f507 7384 add.w r3, r7, #264 @ 0x108
80092cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80092d0: 681b ldr r3, [r3, #0]
80092d2: 781b ldrb r3, [r3, #0]
80092d4: 009b lsls r3, r3, #2
80092d6: 4413 add r3, r2
80092d8: 881b ldrh r3, [r3, #0]
80092da: b29b uxth r3, r3
80092dc: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
80092e0: f023 0370 bic.w r3, r3, #112 @ 0x70
80092e4: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
80092e8: f507 7384 add.w r3, r7, #264 @ 0x108
80092ec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80092f0: 681a ldr r2, [r3, #0]
80092f2: f507 7384 add.w r3, r7, #264 @ 0x108
80092f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80092fa: 681b ldr r3, [r3, #0]
80092fc: 781b ldrb r3, [r3, #0]
80092fe: 009b lsls r3, r3, #2
8009300: 441a add r2, r3
8009302: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8009306: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800930a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800930e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009312: f043 0380 orr.w r3, r3, #128 @ 0x80
8009316: b29b uxth r3, r3
8009318: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800931a: f507 7384 add.w r3, r7, #264 @ 0x108
800931e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009322: 681b ldr r3, [r3, #0]
8009324: 65fb str r3, [r7, #92] @ 0x5c
8009326: f507 7384 add.w r3, r7, #264 @ 0x108
800932a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800932e: 681b ldr r3, [r3, #0]
8009330: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009334: b29b uxth r3, r3
8009336: 461a mov r2, r3
8009338: 6dfb ldr r3, [r7, #92] @ 0x5c
800933a: 4413 add r3, r2
800933c: 65fb str r3, [r7, #92] @ 0x5c
800933e: f507 7384 add.w r3, r7, #264 @ 0x108
8009342: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009346: 681b ldr r3, [r3, #0]
8009348: 781b ldrb r3, [r3, #0]
800934a: 011a lsls r2, r3, #4
800934c: 6dfb ldr r3, [r7, #92] @ 0x5c
800934e: 4413 add r3, r2
8009350: f203 4304 addw r3, r3, #1028 @ 0x404
8009354: 65bb str r3, [r7, #88] @ 0x58
8009356: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800935a: b29a uxth r2, r3
800935c: 6dbb ldr r3, [r7, #88] @ 0x58
800935e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8009360: f507 7384 add.w r3, r7, #264 @ 0x108
8009364: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009368: 681b ldr r3, [r3, #0]
800936a: 891b ldrh r3, [r3, #8]
800936c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8009370: f507 7384 add.w r3, r7, #264 @ 0x108
8009374: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009378: 681b ldr r3, [r3, #0]
800937a: 6959 ldr r1, [r3, #20]
800937c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009380: b29b uxth r3, r3
8009382: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8009386: f507 7084 add.w r0, r7, #264 @ 0x108
800938a: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800938e: 6800 ldr r0, [r0, #0]
8009390: f001 f80d bl 800a3ae <USB_WritePMA>
8009394: e1b3 b.n 80096fe <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8009396: f507 7384 add.w r3, r7, #264 @ 0x108
800939a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800939e: 681b ldr r3, [r3, #0]
80093a0: 6a1a ldr r2, [r3, #32]
80093a2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80093a6: 1ad2 subs r2, r2, r3
80093a8: f507 7384 add.w r3, r7, #264 @ 0x108
80093ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80093b0: 681b ldr r3, [r3, #0]
80093b2: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
80093b4: f507 7384 add.w r3, r7, #264 @ 0x108
80093b8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80093bc: 681a ldr r2, [r3, #0]
80093be: f507 7384 add.w r3, r7, #264 @ 0x108
80093c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80093c6: 681b ldr r3, [r3, #0]
80093c8: 781b ldrb r3, [r3, #0]
80093ca: 009b lsls r3, r3, #2
80093cc: 4413 add r3, r2
80093ce: 881b ldrh r3, [r3, #0]
80093d0: b29b uxth r3, r3
80093d2: f003 0340 and.w r3, r3, #64 @ 0x40
80093d6: 2b00 cmp r3, #0
80093d8: f000 80c6 beq.w 8009568 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
80093dc: f507 7384 add.w r3, r7, #264 @ 0x108
80093e0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80093e4: 681b ldr r3, [r3, #0]
80093e6: 673b str r3, [r7, #112] @ 0x70
80093e8: f507 7384 add.w r3, r7, #264 @ 0x108
80093ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80093f0: 681b ldr r3, [r3, #0]
80093f2: 785b ldrb r3, [r3, #1]
80093f4: 2b00 cmp r3, #0
80093f6: d177 bne.n 80094e8 <USB_EPStartXfer+0xb18>
80093f8: f507 7384 add.w r3, r7, #264 @ 0x108
80093fc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009400: 681b ldr r3, [r3, #0]
8009402: 66bb str r3, [r7, #104] @ 0x68
8009404: f507 7384 add.w r3, r7, #264 @ 0x108
8009408: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800940c: 681b ldr r3, [r3, #0]
800940e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009412: b29b uxth r3, r3
8009414: 461a mov r2, r3
8009416: 6ebb ldr r3, [r7, #104] @ 0x68
8009418: 4413 add r3, r2
800941a: 66bb str r3, [r7, #104] @ 0x68
800941c: f507 7384 add.w r3, r7, #264 @ 0x108
8009420: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009424: 681b ldr r3, [r3, #0]
8009426: 781b ldrb r3, [r3, #0]
8009428: 011a lsls r2, r3, #4
800942a: 6ebb ldr r3, [r7, #104] @ 0x68
800942c: 4413 add r3, r2
800942e: f203 430c addw r3, r3, #1036 @ 0x40c
8009432: 667b str r3, [r7, #100] @ 0x64
8009434: 6e7b ldr r3, [r7, #100] @ 0x64
8009436: 881b ldrh r3, [r3, #0]
8009438: b29b uxth r3, r3
800943a: f3c3 0309 ubfx r3, r3, #0, #10
800943e: b29a uxth r2, r3
8009440: 6e7b ldr r3, [r7, #100] @ 0x64
8009442: 801a strh r2, [r3, #0]
8009444: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009448: 2b3e cmp r3, #62 @ 0x3e
800944a: d921 bls.n 8009490 <USB_EPStartXfer+0xac0>
800944c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009450: 095b lsrs r3, r3, #5
8009452: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8009456: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800945a: f003 031f and.w r3, r3, #31
800945e: 2b00 cmp r3, #0
8009460: d104 bne.n 800946c <USB_EPStartXfer+0xa9c>
8009462: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8009466: 3b01 subs r3, #1
8009468: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800946c: 6e7b ldr r3, [r7, #100] @ 0x64
800946e: 881b ldrh r3, [r3, #0]
8009470: b29a uxth r2, r3
8009472: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8009476: b29b uxth r3, r3
8009478: 029b lsls r3, r3, #10
800947a: b29b uxth r3, r3
800947c: 4313 orrs r3, r2
800947e: b29b uxth r3, r3
8009480: ea6f 4343 mvn.w r3, r3, lsl #17
8009484: ea6f 4353 mvn.w r3, r3, lsr #17
8009488: b29a uxth r2, r3
800948a: 6e7b ldr r3, [r7, #100] @ 0x64
800948c: 801a strh r2, [r3, #0]
800948e: e050 b.n 8009532 <USB_EPStartXfer+0xb62>
8009490: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009494: 2b00 cmp r3, #0
8009496: d10a bne.n 80094ae <USB_EPStartXfer+0xade>
8009498: 6e7b ldr r3, [r7, #100] @ 0x64
800949a: 881b ldrh r3, [r3, #0]
800949c: b29b uxth r3, r3
800949e: ea6f 4343 mvn.w r3, r3, lsl #17
80094a2: ea6f 4353 mvn.w r3, r3, lsr #17
80094a6: b29a uxth r2, r3
80094a8: 6e7b ldr r3, [r7, #100] @ 0x64
80094aa: 801a strh r2, [r3, #0]
80094ac: e041 b.n 8009532 <USB_EPStartXfer+0xb62>
80094ae: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80094b2: 085b lsrs r3, r3, #1
80094b4: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
80094b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80094bc: f003 0301 and.w r3, r3, #1
80094c0: 2b00 cmp r3, #0
80094c2: d004 beq.n 80094ce <USB_EPStartXfer+0xafe>
80094c4: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
80094c8: 3301 adds r3, #1
80094ca: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
80094ce: 6e7b ldr r3, [r7, #100] @ 0x64
80094d0: 881b ldrh r3, [r3, #0]
80094d2: b29a uxth r2, r3
80094d4: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
80094d8: b29b uxth r3, r3
80094da: 029b lsls r3, r3, #10
80094dc: b29b uxth r3, r3
80094de: 4313 orrs r3, r2
80094e0: b29a uxth r2, r3
80094e2: 6e7b ldr r3, [r7, #100] @ 0x64
80094e4: 801a strh r2, [r3, #0]
80094e6: e024 b.n 8009532 <USB_EPStartXfer+0xb62>
80094e8: f507 7384 add.w r3, r7, #264 @ 0x108
80094ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80094f0: 681b ldr r3, [r3, #0]
80094f2: 785b ldrb r3, [r3, #1]
80094f4: 2b01 cmp r3, #1
80094f6: d11c bne.n 8009532 <USB_EPStartXfer+0xb62>
80094f8: f507 7384 add.w r3, r7, #264 @ 0x108
80094fc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009500: 681b ldr r3, [r3, #0]
8009502: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009506: b29b uxth r3, r3
8009508: 461a mov r2, r3
800950a: 6f3b ldr r3, [r7, #112] @ 0x70
800950c: 4413 add r3, r2
800950e: 673b str r3, [r7, #112] @ 0x70
8009510: f507 7384 add.w r3, r7, #264 @ 0x108
8009514: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009518: 681b ldr r3, [r3, #0]
800951a: 781b ldrb r3, [r3, #0]
800951c: 011a lsls r2, r3, #4
800951e: 6f3b ldr r3, [r7, #112] @ 0x70
8009520: 4413 add r3, r2
8009522: f203 430c addw r3, r3, #1036 @ 0x40c
8009526: 66fb str r3, [r7, #108] @ 0x6c
8009528: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800952c: b29a uxth r2, r3
800952e: 6efb ldr r3, [r7, #108] @ 0x6c
8009530: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8009532: f507 7384 add.w r3, r7, #264 @ 0x108
8009536: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800953a: 681b ldr r3, [r3, #0]
800953c: 895b ldrh r3, [r3, #10]
800953e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8009542: f507 7384 add.w r3, r7, #264 @ 0x108
8009546: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800954a: 681b ldr r3, [r3, #0]
800954c: 6959 ldr r1, [r3, #20]
800954e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009552: b29b uxth r3, r3
8009554: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8009558: f507 7084 add.w r0, r7, #264 @ 0x108
800955c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8009560: 6800 ldr r0, [r0, #0]
8009562: f000 ff24 bl 800a3ae <USB_WritePMA>
8009566: e0ca b.n 80096fe <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8009568: f507 7384 add.w r3, r7, #264 @ 0x108
800956c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009570: 681b ldr r3, [r3, #0]
8009572: 785b ldrb r3, [r3, #1]
8009574: 2b00 cmp r3, #0
8009576: d177 bne.n 8009668 <USB_EPStartXfer+0xc98>
8009578: f507 7384 add.w r3, r7, #264 @ 0x108
800957c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009580: 681b ldr r3, [r3, #0]
8009582: 67fb str r3, [r7, #124] @ 0x7c
8009584: f507 7384 add.w r3, r7, #264 @ 0x108
8009588: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800958c: 681b ldr r3, [r3, #0]
800958e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009592: b29b uxth r3, r3
8009594: 461a mov r2, r3
8009596: 6ffb ldr r3, [r7, #124] @ 0x7c
8009598: 4413 add r3, r2
800959a: 67fb str r3, [r7, #124] @ 0x7c
800959c: f507 7384 add.w r3, r7, #264 @ 0x108
80095a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80095a4: 681b ldr r3, [r3, #0]
80095a6: 781b ldrb r3, [r3, #0]
80095a8: 011a lsls r2, r3, #4
80095aa: 6ffb ldr r3, [r7, #124] @ 0x7c
80095ac: 4413 add r3, r2
80095ae: f203 4304 addw r3, r3, #1028 @ 0x404
80095b2: 67bb str r3, [r7, #120] @ 0x78
80095b4: 6fbb ldr r3, [r7, #120] @ 0x78
80095b6: 881b ldrh r3, [r3, #0]
80095b8: b29b uxth r3, r3
80095ba: f3c3 0309 ubfx r3, r3, #0, #10
80095be: b29a uxth r2, r3
80095c0: 6fbb ldr r3, [r7, #120] @ 0x78
80095c2: 801a strh r2, [r3, #0]
80095c4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80095c8: 2b3e cmp r3, #62 @ 0x3e
80095ca: d921 bls.n 8009610 <USB_EPStartXfer+0xc40>
80095cc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80095d0: 095b lsrs r3, r3, #5
80095d2: f8c7 30ec str.w r3, [r7, #236] @ 0xec
80095d6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80095da: f003 031f and.w r3, r3, #31
80095de: 2b00 cmp r3, #0
80095e0: d104 bne.n 80095ec <USB_EPStartXfer+0xc1c>
80095e2: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
80095e6: 3b01 subs r3, #1
80095e8: f8c7 30ec str.w r3, [r7, #236] @ 0xec
80095ec: 6fbb ldr r3, [r7, #120] @ 0x78
80095ee: 881b ldrh r3, [r3, #0]
80095f0: b29a uxth r2, r3
80095f2: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
80095f6: b29b uxth r3, r3
80095f8: 029b lsls r3, r3, #10
80095fa: b29b uxth r3, r3
80095fc: 4313 orrs r3, r2
80095fe: b29b uxth r3, r3
8009600: ea6f 4343 mvn.w r3, r3, lsl #17
8009604: ea6f 4353 mvn.w r3, r3, lsr #17
8009608: b29a uxth r2, r3
800960a: 6fbb ldr r3, [r7, #120] @ 0x78
800960c: 801a strh r2, [r3, #0]
800960e: e05c b.n 80096ca <USB_EPStartXfer+0xcfa>
8009610: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009614: 2b00 cmp r3, #0
8009616: d10a bne.n 800962e <USB_EPStartXfer+0xc5e>
8009618: 6fbb ldr r3, [r7, #120] @ 0x78
800961a: 881b ldrh r3, [r3, #0]
800961c: b29b uxth r3, r3
800961e: ea6f 4343 mvn.w r3, r3, lsl #17
8009622: ea6f 4353 mvn.w r3, r3, lsr #17
8009626: b29a uxth r2, r3
8009628: 6fbb ldr r3, [r7, #120] @ 0x78
800962a: 801a strh r2, [r3, #0]
800962c: e04d b.n 80096ca <USB_EPStartXfer+0xcfa>
800962e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009632: 085b lsrs r3, r3, #1
8009634: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8009638: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800963c: f003 0301 and.w r3, r3, #1
8009640: 2b00 cmp r3, #0
8009642: d004 beq.n 800964e <USB_EPStartXfer+0xc7e>
8009644: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8009648: 3301 adds r3, #1
800964a: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800964e: 6fbb ldr r3, [r7, #120] @ 0x78
8009650: 881b ldrh r3, [r3, #0]
8009652: b29a uxth r2, r3
8009654: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8009658: b29b uxth r3, r3
800965a: 029b lsls r3, r3, #10
800965c: b29b uxth r3, r3
800965e: 4313 orrs r3, r2
8009660: b29a uxth r2, r3
8009662: 6fbb ldr r3, [r7, #120] @ 0x78
8009664: 801a strh r2, [r3, #0]
8009666: e030 b.n 80096ca <USB_EPStartXfer+0xcfa>
8009668: f507 7384 add.w r3, r7, #264 @ 0x108
800966c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009670: 681b ldr r3, [r3, #0]
8009672: 785b ldrb r3, [r3, #1]
8009674: 2b01 cmp r3, #1
8009676: d128 bne.n 80096ca <USB_EPStartXfer+0xcfa>
8009678: f507 7384 add.w r3, r7, #264 @ 0x108
800967c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009680: 681b ldr r3, [r3, #0]
8009682: f8c7 3084 str.w r3, [r7, #132] @ 0x84
8009686: f507 7384 add.w r3, r7, #264 @ 0x108
800968a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800968e: 681b ldr r3, [r3, #0]
8009690: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009694: b29b uxth r3, r3
8009696: 461a mov r2, r3
8009698: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800969c: 4413 add r3, r2
800969e: f8c7 3084 str.w r3, [r7, #132] @ 0x84
80096a2: f507 7384 add.w r3, r7, #264 @ 0x108
80096a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80096aa: 681b ldr r3, [r3, #0]
80096ac: 781b ldrb r3, [r3, #0]
80096ae: 011a lsls r2, r3, #4
80096b0: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
80096b4: 4413 add r3, r2
80096b6: f203 4304 addw r3, r3, #1028 @ 0x404
80096ba: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80096be: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80096c2: b29a uxth r2, r3
80096c4: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80096c8: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80096ca: f507 7384 add.w r3, r7, #264 @ 0x108
80096ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80096d2: 681b ldr r3, [r3, #0]
80096d4: 891b ldrh r3, [r3, #8]
80096d6: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80096da: f507 7384 add.w r3, r7, #264 @ 0x108
80096de: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80096e2: 681b ldr r3, [r3, #0]
80096e4: 6959 ldr r1, [r3, #20]
80096e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80096ea: b29b uxth r3, r3
80096ec: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80096f0: f507 7084 add.w r0, r7, #264 @ 0x108
80096f4: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80096f8: 6800 ldr r0, [r0, #0]
80096fa: f000 fe58 bl 800a3ae <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
80096fe: f507 7384 add.w r3, r7, #264 @ 0x108
8009702: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009706: 681a ldr r2, [r3, #0]
8009708: f507 7384 add.w r3, r7, #264 @ 0x108
800970c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009710: 681b ldr r3, [r3, #0]
8009712: 781b ldrb r3, [r3, #0]
8009714: 009b lsls r3, r3, #2
8009716: 4413 add r3, r2
8009718: 881b ldrh r3, [r3, #0]
800971a: b29b uxth r3, r3
800971c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009720: f023 0340 bic.w r3, r3, #64 @ 0x40
8009724: 817b strh r3, [r7, #10]
8009726: 897b ldrh r3, [r7, #10]
8009728: f083 0310 eor.w r3, r3, #16
800972c: 817b strh r3, [r7, #10]
800972e: 897b ldrh r3, [r7, #10]
8009730: f083 0320 eor.w r3, r3, #32
8009734: 817b strh r3, [r7, #10]
8009736: f507 7384 add.w r3, r7, #264 @ 0x108
800973a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800973e: 681a ldr r2, [r3, #0]
8009740: f507 7384 add.w r3, r7, #264 @ 0x108
8009744: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009748: 681b ldr r3, [r3, #0]
800974a: 781b ldrb r3, [r3, #0]
800974c: 009b lsls r3, r3, #2
800974e: 441a add r2, r3
8009750: 897b ldrh r3, [r7, #10]
8009752: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009756: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800975a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800975e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009762: b29b uxth r3, r3
8009764: 8013 strh r3, [r2, #0]
8009766: f000 bcde b.w 800a126 <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800976a: f507 7384 add.w r3, r7, #264 @ 0x108
800976e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009772: 681b ldr r3, [r3, #0]
8009774: 7b1b ldrb r3, [r3, #12]
8009776: 2b00 cmp r3, #0
8009778: f040 80bb bne.w 80098f2 <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800977c: f507 7384 add.w r3, r7, #264 @ 0x108
8009780: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009784: 681b ldr r3, [r3, #0]
8009786: 699a ldr r2, [r3, #24]
8009788: f507 7384 add.w r3, r7, #264 @ 0x108
800978c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009790: 681b ldr r3, [r3, #0]
8009792: 691b ldr r3, [r3, #16]
8009794: 429a cmp r2, r3
8009796: d917 bls.n 80097c8 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
8009798: f507 7384 add.w r3, r7, #264 @ 0x108
800979c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80097a0: 681b ldr r3, [r3, #0]
80097a2: 691b ldr r3, [r3, #16]
80097a4: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
80097a8: f507 7384 add.w r3, r7, #264 @ 0x108
80097ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80097b0: 681b ldr r3, [r3, #0]
80097b2: 699a ldr r2, [r3, #24]
80097b4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80097b8: 1ad2 subs r2, r2, r3
80097ba: f507 7384 add.w r3, r7, #264 @ 0x108
80097be: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80097c2: 681b ldr r3, [r3, #0]
80097c4: 619a str r2, [r3, #24]
80097c6: e00e b.n 80097e6 <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
80097c8: f507 7384 add.w r3, r7, #264 @ 0x108
80097cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80097d0: 681b ldr r3, [r3, #0]
80097d2: 699b ldr r3, [r3, #24]
80097d4: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
80097d8: f507 7384 add.w r3, r7, #264 @ 0x108
80097dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80097e0: 681b ldr r3, [r3, #0]
80097e2: 2200 movs r2, #0
80097e4: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
80097e6: f507 7384 add.w r3, r7, #264 @ 0x108
80097ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80097ee: 681b ldr r3, [r3, #0]
80097f0: f8c7 3090 str.w r3, [r7, #144] @ 0x90
80097f4: f507 7384 add.w r3, r7, #264 @ 0x108
80097f8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80097fc: 681b ldr r3, [r3, #0]
80097fe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009802: b29b uxth r3, r3
8009804: 461a mov r2, r3
8009806: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800980a: 4413 add r3, r2
800980c: f8c7 3090 str.w r3, [r7, #144] @ 0x90
8009810: f507 7384 add.w r3, r7, #264 @ 0x108
8009814: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009818: 681b ldr r3, [r3, #0]
800981a: 781b ldrb r3, [r3, #0]
800981c: 011a lsls r2, r3, #4
800981e: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
8009822: 4413 add r3, r2
8009824: f203 430c addw r3, r3, #1036 @ 0x40c
8009828: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800982c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8009830: 881b ldrh r3, [r3, #0]
8009832: b29b uxth r3, r3
8009834: f3c3 0309 ubfx r3, r3, #0, #10
8009838: b29a uxth r2, r3
800983a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800983e: 801a strh r2, [r3, #0]
8009840: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009844: 2b3e cmp r3, #62 @ 0x3e
8009846: d924 bls.n 8009892 <USB_EPStartXfer+0xec2>
8009848: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800984c: 095b lsrs r3, r3, #5
800984e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8009852: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009856: f003 031f and.w r3, r3, #31
800985a: 2b00 cmp r3, #0
800985c: d104 bne.n 8009868 <USB_EPStartXfer+0xe98>
800985e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8009862: 3b01 subs r3, #1
8009864: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8009868: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800986c: 881b ldrh r3, [r3, #0]
800986e: b29a uxth r2, r3
8009870: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8009874: b29b uxth r3, r3
8009876: 029b lsls r3, r3, #10
8009878: b29b uxth r3, r3
800987a: 4313 orrs r3, r2
800987c: b29b uxth r3, r3
800987e: ea6f 4343 mvn.w r3, r3, lsl #17
8009882: ea6f 4353 mvn.w r3, r3, lsr #17
8009886: b29a uxth r2, r3
8009888: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800988c: 801a strh r2, [r3, #0]
800988e: f000 bc10 b.w 800a0b2 <USB_EPStartXfer+0x16e2>
8009892: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009896: 2b00 cmp r3, #0
8009898: d10c bne.n 80098b4 <USB_EPStartXfer+0xee4>
800989a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800989e: 881b ldrh r3, [r3, #0]
80098a0: b29b uxth r3, r3
80098a2: ea6f 4343 mvn.w r3, r3, lsl #17
80098a6: ea6f 4353 mvn.w r3, r3, lsr #17
80098aa: b29a uxth r2, r3
80098ac: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80098b0: 801a strh r2, [r3, #0]
80098b2: e3fe b.n 800a0b2 <USB_EPStartXfer+0x16e2>
80098b4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80098b8: 085b lsrs r3, r3, #1
80098ba: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
80098be: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80098c2: f003 0301 and.w r3, r3, #1
80098c6: 2b00 cmp r3, #0
80098c8: d004 beq.n 80098d4 <USB_EPStartXfer+0xf04>
80098ca: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
80098ce: 3301 adds r3, #1
80098d0: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
80098d4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80098d8: 881b ldrh r3, [r3, #0]
80098da: b29a uxth r2, r3
80098dc: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
80098e0: b29b uxth r3, r3
80098e2: 029b lsls r3, r3, #10
80098e4: b29b uxth r3, r3
80098e6: 4313 orrs r3, r2
80098e8: b29a uxth r2, r3
80098ea: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80098ee: 801a strh r2, [r3, #0]
80098f0: e3df b.n 800a0b2 <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
80098f2: f507 7384 add.w r3, r7, #264 @ 0x108
80098f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80098fa: 681b ldr r3, [r3, #0]
80098fc: 78db ldrb r3, [r3, #3]
80098fe: 2b02 cmp r3, #2
8009900: f040 8218 bne.w 8009d34 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
8009904: f507 7384 add.w r3, r7, #264 @ 0x108
8009908: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800990c: 681b ldr r3, [r3, #0]
800990e: 785b ldrb r3, [r3, #1]
8009910: 2b00 cmp r3, #0
8009912: f040 809d bne.w 8009a50 <USB_EPStartXfer+0x1080>
8009916: f507 7384 add.w r3, r7, #264 @ 0x108
800991a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800991e: 681b ldr r3, [r3, #0]
8009920: f8c7 30ac str.w r3, [r7, #172] @ 0xac
8009924: f507 7384 add.w r3, r7, #264 @ 0x108
8009928: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800992c: 681b ldr r3, [r3, #0]
800992e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009932: b29b uxth r3, r3
8009934: 461a mov r2, r3
8009936: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800993a: 4413 add r3, r2
800993c: f8c7 30ac str.w r3, [r7, #172] @ 0xac
8009940: f507 7384 add.w r3, r7, #264 @ 0x108
8009944: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009948: 681b ldr r3, [r3, #0]
800994a: 781b ldrb r3, [r3, #0]
800994c: 011a lsls r2, r3, #4
800994e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8009952: 4413 add r3, r2
8009954: f203 4304 addw r3, r3, #1028 @ 0x404
8009958: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800995c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8009960: 881b ldrh r3, [r3, #0]
8009962: b29b uxth r3, r3
8009964: f3c3 0309 ubfx r3, r3, #0, #10
8009968: b29a uxth r2, r3
800996a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800996e: 801a strh r2, [r3, #0]
8009970: f507 7384 add.w r3, r7, #264 @ 0x108
8009974: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009978: 681b ldr r3, [r3, #0]
800997a: 691b ldr r3, [r3, #16]
800997c: 2b3e cmp r3, #62 @ 0x3e
800997e: d92b bls.n 80099d8 <USB_EPStartXfer+0x1008>
8009980: f507 7384 add.w r3, r7, #264 @ 0x108
8009984: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009988: 681b ldr r3, [r3, #0]
800998a: 691b ldr r3, [r3, #16]
800998c: 095b lsrs r3, r3, #5
800998e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8009992: f507 7384 add.w r3, r7, #264 @ 0x108
8009996: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800999a: 681b ldr r3, [r3, #0]
800999c: 691b ldr r3, [r3, #16]
800999e: f003 031f and.w r3, r3, #31
80099a2: 2b00 cmp r3, #0
80099a4: d104 bne.n 80099b0 <USB_EPStartXfer+0xfe0>
80099a6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
80099aa: 3b01 subs r3, #1
80099ac: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
80099b0: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80099b4: 881b ldrh r3, [r3, #0]
80099b6: b29a uxth r2, r3
80099b8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
80099bc: b29b uxth r3, r3
80099be: 029b lsls r3, r3, #10
80099c0: b29b uxth r3, r3
80099c2: 4313 orrs r3, r2
80099c4: b29b uxth r3, r3
80099c6: ea6f 4343 mvn.w r3, r3, lsl #17
80099ca: ea6f 4353 mvn.w r3, r3, lsr #17
80099ce: b29a uxth r2, r3
80099d0: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80099d4: 801a strh r2, [r3, #0]
80099d6: e070 b.n 8009aba <USB_EPStartXfer+0x10ea>
80099d8: f507 7384 add.w r3, r7, #264 @ 0x108
80099dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80099e0: 681b ldr r3, [r3, #0]
80099e2: 691b ldr r3, [r3, #16]
80099e4: 2b00 cmp r3, #0
80099e6: d10c bne.n 8009a02 <USB_EPStartXfer+0x1032>
80099e8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80099ec: 881b ldrh r3, [r3, #0]
80099ee: b29b uxth r3, r3
80099f0: ea6f 4343 mvn.w r3, r3, lsl #17
80099f4: ea6f 4353 mvn.w r3, r3, lsr #17
80099f8: b29a uxth r2, r3
80099fa: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80099fe: 801a strh r2, [r3, #0]
8009a00: e05b b.n 8009aba <USB_EPStartXfer+0x10ea>
8009a02: f507 7384 add.w r3, r7, #264 @ 0x108
8009a06: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009a0a: 681b ldr r3, [r3, #0]
8009a0c: 691b ldr r3, [r3, #16]
8009a0e: 085b lsrs r3, r3, #1
8009a10: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8009a14: f507 7384 add.w r3, r7, #264 @ 0x108
8009a18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009a1c: 681b ldr r3, [r3, #0]
8009a1e: 691b ldr r3, [r3, #16]
8009a20: f003 0301 and.w r3, r3, #1
8009a24: 2b00 cmp r3, #0
8009a26: d004 beq.n 8009a32 <USB_EPStartXfer+0x1062>
8009a28: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8009a2c: 3301 adds r3, #1
8009a2e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8009a32: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8009a36: 881b ldrh r3, [r3, #0]
8009a38: b29a uxth r2, r3
8009a3a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8009a3e: b29b uxth r3, r3
8009a40: 029b lsls r3, r3, #10
8009a42: b29b uxth r3, r3
8009a44: 4313 orrs r3, r2
8009a46: b29a uxth r2, r3
8009a48: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8009a4c: 801a strh r2, [r3, #0]
8009a4e: e034 b.n 8009aba <USB_EPStartXfer+0x10ea>
8009a50: f507 7384 add.w r3, r7, #264 @ 0x108
8009a54: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009a58: 681b ldr r3, [r3, #0]
8009a5a: 785b ldrb r3, [r3, #1]
8009a5c: 2b01 cmp r3, #1
8009a5e: d12c bne.n 8009aba <USB_EPStartXfer+0x10ea>
8009a60: f507 7384 add.w r3, r7, #264 @ 0x108
8009a64: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009a68: 681b ldr r3, [r3, #0]
8009a6a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8009a6e: f507 7384 add.w r3, r7, #264 @ 0x108
8009a72: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009a76: 681b ldr r3, [r3, #0]
8009a78: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009a7c: b29b uxth r3, r3
8009a7e: 461a mov r2, r3
8009a80: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8009a84: 4413 add r3, r2
8009a86: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8009a8a: f507 7384 add.w r3, r7, #264 @ 0x108
8009a8e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009a92: 681b ldr r3, [r3, #0]
8009a94: 781b ldrb r3, [r3, #0]
8009a96: 011a lsls r2, r3, #4
8009a98: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8009a9c: 4413 add r3, r2
8009a9e: f203 4304 addw r3, r3, #1028 @ 0x404
8009aa2: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
8009aa6: f507 7384 add.w r3, r7, #264 @ 0x108
8009aaa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009aae: 681b ldr r3, [r3, #0]
8009ab0: 691b ldr r3, [r3, #16]
8009ab2: b29a uxth r2, r3
8009ab4: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
8009ab8: 801a strh r2, [r3, #0]
8009aba: f507 7384 add.w r3, r7, #264 @ 0x108
8009abe: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009ac2: 681b ldr r3, [r3, #0]
8009ac4: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8009ac8: f507 7384 add.w r3, r7, #264 @ 0x108
8009acc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009ad0: 681b ldr r3, [r3, #0]
8009ad2: 785b ldrb r3, [r3, #1]
8009ad4: 2b00 cmp r3, #0
8009ad6: f040 809d bne.w 8009c14 <USB_EPStartXfer+0x1244>
8009ada: f507 7384 add.w r3, r7, #264 @ 0x108
8009ade: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009ae2: 681b ldr r3, [r3, #0]
8009ae4: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8009ae8: f507 7384 add.w r3, r7, #264 @ 0x108
8009aec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009af0: 681b ldr r3, [r3, #0]
8009af2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009af6: b29b uxth r3, r3
8009af8: 461a mov r2, r3
8009afa: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8009afe: 4413 add r3, r2
8009b00: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8009b04: f507 7384 add.w r3, r7, #264 @ 0x108
8009b08: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009b0c: 681b ldr r3, [r3, #0]
8009b0e: 781b ldrb r3, [r3, #0]
8009b10: 011a lsls r2, r3, #4
8009b12: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8009b16: 4413 add r3, r2
8009b18: f203 430c addw r3, r3, #1036 @ 0x40c
8009b1c: f8c7 3098 str.w r3, [r7, #152] @ 0x98
8009b20: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8009b24: 881b ldrh r3, [r3, #0]
8009b26: b29b uxth r3, r3
8009b28: f3c3 0309 ubfx r3, r3, #0, #10
8009b2c: b29a uxth r2, r3
8009b2e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8009b32: 801a strh r2, [r3, #0]
8009b34: f507 7384 add.w r3, r7, #264 @ 0x108
8009b38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009b3c: 681b ldr r3, [r3, #0]
8009b3e: 691b ldr r3, [r3, #16]
8009b40: 2b3e cmp r3, #62 @ 0x3e
8009b42: d92b bls.n 8009b9c <USB_EPStartXfer+0x11cc>
8009b44: f507 7384 add.w r3, r7, #264 @ 0x108
8009b48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009b4c: 681b ldr r3, [r3, #0]
8009b4e: 691b ldr r3, [r3, #16]
8009b50: 095b lsrs r3, r3, #5
8009b52: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8009b56: f507 7384 add.w r3, r7, #264 @ 0x108
8009b5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009b5e: 681b ldr r3, [r3, #0]
8009b60: 691b ldr r3, [r3, #16]
8009b62: f003 031f and.w r3, r3, #31
8009b66: 2b00 cmp r3, #0
8009b68: d104 bne.n 8009b74 <USB_EPStartXfer+0x11a4>
8009b6a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8009b6e: 3b01 subs r3, #1
8009b70: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8009b74: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8009b78: 881b ldrh r3, [r3, #0]
8009b7a: b29a uxth r2, r3
8009b7c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8009b80: b29b uxth r3, r3
8009b82: 029b lsls r3, r3, #10
8009b84: b29b uxth r3, r3
8009b86: 4313 orrs r3, r2
8009b88: b29b uxth r3, r3
8009b8a: ea6f 4343 mvn.w r3, r3, lsl #17
8009b8e: ea6f 4353 mvn.w r3, r3, lsr #17
8009b92: b29a uxth r2, r3
8009b94: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8009b98: 801a strh r2, [r3, #0]
8009b9a: e069 b.n 8009c70 <USB_EPStartXfer+0x12a0>
8009b9c: f507 7384 add.w r3, r7, #264 @ 0x108
8009ba0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009ba4: 681b ldr r3, [r3, #0]
8009ba6: 691b ldr r3, [r3, #16]
8009ba8: 2b00 cmp r3, #0
8009baa: d10c bne.n 8009bc6 <USB_EPStartXfer+0x11f6>
8009bac: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8009bb0: 881b ldrh r3, [r3, #0]
8009bb2: b29b uxth r3, r3
8009bb4: ea6f 4343 mvn.w r3, r3, lsl #17
8009bb8: ea6f 4353 mvn.w r3, r3, lsr #17
8009bbc: b29a uxth r2, r3
8009bbe: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8009bc2: 801a strh r2, [r3, #0]
8009bc4: e054 b.n 8009c70 <USB_EPStartXfer+0x12a0>
8009bc6: f507 7384 add.w r3, r7, #264 @ 0x108
8009bca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009bce: 681b ldr r3, [r3, #0]
8009bd0: 691b ldr r3, [r3, #16]
8009bd2: 085b lsrs r3, r3, #1
8009bd4: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8009bd8: f507 7384 add.w r3, r7, #264 @ 0x108
8009bdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009be0: 681b ldr r3, [r3, #0]
8009be2: 691b ldr r3, [r3, #16]
8009be4: f003 0301 and.w r3, r3, #1
8009be8: 2b00 cmp r3, #0
8009bea: d004 beq.n 8009bf6 <USB_EPStartXfer+0x1226>
8009bec: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8009bf0: 3301 adds r3, #1
8009bf2: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8009bf6: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8009bfa: 881b ldrh r3, [r3, #0]
8009bfc: b29a uxth r2, r3
8009bfe: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8009c02: b29b uxth r3, r3
8009c04: 029b lsls r3, r3, #10
8009c06: b29b uxth r3, r3
8009c08: 4313 orrs r3, r2
8009c0a: b29a uxth r2, r3
8009c0c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8009c10: 801a strh r2, [r3, #0]
8009c12: e02d b.n 8009c70 <USB_EPStartXfer+0x12a0>
8009c14: f507 7384 add.w r3, r7, #264 @ 0x108
8009c18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009c1c: 681b ldr r3, [r3, #0]
8009c1e: 785b ldrb r3, [r3, #1]
8009c20: 2b01 cmp r3, #1
8009c22: d125 bne.n 8009c70 <USB_EPStartXfer+0x12a0>
8009c24: f507 7384 add.w r3, r7, #264 @ 0x108
8009c28: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009c2c: 681b ldr r3, [r3, #0]
8009c2e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009c32: b29b uxth r3, r3
8009c34: 461a mov r2, r3
8009c36: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8009c3a: 4413 add r3, r2
8009c3c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8009c40: f507 7384 add.w r3, r7, #264 @ 0x108
8009c44: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009c48: 681b ldr r3, [r3, #0]
8009c4a: 781b ldrb r3, [r3, #0]
8009c4c: 011a lsls r2, r3, #4
8009c4e: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8009c52: 4413 add r3, r2
8009c54: f203 430c addw r3, r3, #1036 @ 0x40c
8009c58: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
8009c5c: f507 7384 add.w r3, r7, #264 @ 0x108
8009c60: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009c64: 681b ldr r3, [r3, #0]
8009c66: 691b ldr r3, [r3, #16]
8009c68: b29a uxth r2, r3
8009c6a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
8009c6e: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
8009c70: f507 7384 add.w r3, r7, #264 @ 0x108
8009c74: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009c78: 681b ldr r3, [r3, #0]
8009c7a: 69db ldr r3, [r3, #28]
8009c7c: 2b00 cmp r3, #0
8009c7e: f000 8218 beq.w 800a0b2 <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
8009c82: f507 7384 add.w r3, r7, #264 @ 0x108
8009c86: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009c8a: 681a ldr r2, [r3, #0]
8009c8c: f507 7384 add.w r3, r7, #264 @ 0x108
8009c90: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009c94: 681b ldr r3, [r3, #0]
8009c96: 781b ldrb r3, [r3, #0]
8009c98: 009b lsls r3, r3, #2
8009c9a: 4413 add r3, r2
8009c9c: 881b ldrh r3, [r3, #0]
8009c9e: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8009ca2: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8009ca6: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009caa: 2b00 cmp r3, #0
8009cac: d005 beq.n 8009cba <USB_EPStartXfer+0x12ea>
8009cae: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8009cb2: f003 0340 and.w r3, r3, #64 @ 0x40
8009cb6: 2b00 cmp r3, #0
8009cb8: d10d bne.n 8009cd6 <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8009cba: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8009cbe: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8009cc2: 2b00 cmp r3, #0
8009cc4: f040 81f5 bne.w 800a0b2 <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8009cc8: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8009ccc: f003 0340 and.w r3, r3, #64 @ 0x40
8009cd0: 2b00 cmp r3, #0
8009cd2: f040 81ee bne.w 800a0b2 <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
8009cd6: f507 7384 add.w r3, r7, #264 @ 0x108
8009cda: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009cde: 681a ldr r2, [r3, #0]
8009ce0: f507 7384 add.w r3, r7, #264 @ 0x108
8009ce4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009ce8: 681b ldr r3, [r3, #0]
8009cea: 781b ldrb r3, [r3, #0]
8009cec: 009b lsls r3, r3, #2
8009cee: 4413 add r3, r2
8009cf0: 881b ldrh r3, [r3, #0]
8009cf2: b29b uxth r3, r3
8009cf4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009cf8: f023 0370 bic.w r3, r3, #112 @ 0x70
8009cfc: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
8009d00: f507 7384 add.w r3, r7, #264 @ 0x108
8009d04: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009d08: 681a ldr r2, [r3, #0]
8009d0a: f507 7384 add.w r3, r7, #264 @ 0x108
8009d0e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d12: 681b ldr r3, [r3, #0]
8009d14: 781b ldrb r3, [r3, #0]
8009d16: 009b lsls r3, r3, #2
8009d18: 441a add r2, r3
8009d1a: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
8009d1e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d22: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d26: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d2a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009d2e: b29b uxth r3, r3
8009d30: 8013 strh r3, [r2, #0]
8009d32: e1be b.n 800a0b2 <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
8009d34: f507 7384 add.w r3, r7, #264 @ 0x108
8009d38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d3c: 681b ldr r3, [r3, #0]
8009d3e: 78db ldrb r3, [r3, #3]
8009d40: 2b01 cmp r3, #1
8009d42: f040 81b4 bne.w 800a0ae <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8009d46: f507 7384 add.w r3, r7, #264 @ 0x108
8009d4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d4e: 681b ldr r3, [r3, #0]
8009d50: 699a ldr r2, [r3, #24]
8009d52: f507 7384 add.w r3, r7, #264 @ 0x108
8009d56: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d5a: 681b ldr r3, [r3, #0]
8009d5c: 691b ldr r3, [r3, #16]
8009d5e: 429a cmp r2, r3
8009d60: d917 bls.n 8009d92 <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
8009d62: f507 7384 add.w r3, r7, #264 @ 0x108
8009d66: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d6a: 681b ldr r3, [r3, #0]
8009d6c: 691b ldr r3, [r3, #16]
8009d6e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
8009d72: f507 7384 add.w r3, r7, #264 @ 0x108
8009d76: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d7a: 681b ldr r3, [r3, #0]
8009d7c: 699a ldr r2, [r3, #24]
8009d7e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009d82: 1ad2 subs r2, r2, r3
8009d84: f507 7384 add.w r3, r7, #264 @ 0x108
8009d88: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d8c: 681b ldr r3, [r3, #0]
8009d8e: 619a str r2, [r3, #24]
8009d90: e00e b.n 8009db0 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
8009d92: f507 7384 add.w r3, r7, #264 @ 0x108
8009d96: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d9a: 681b ldr r3, [r3, #0]
8009d9c: 699b ldr r3, [r3, #24]
8009d9e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
8009da2: f507 7384 add.w r3, r7, #264 @ 0x108
8009da6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009daa: 681b ldr r3, [r3, #0]
8009dac: 2200 movs r2, #0
8009dae: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
8009db0: f507 7384 add.w r3, r7, #264 @ 0x108
8009db4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009db8: 681b ldr r3, [r3, #0]
8009dba: 785b ldrb r3, [r3, #1]
8009dbc: 2b00 cmp r3, #0
8009dbe: f040 8085 bne.w 8009ecc <USB_EPStartXfer+0x14fc>
8009dc2: f507 7384 add.w r3, r7, #264 @ 0x108
8009dc6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009dca: 681b ldr r3, [r3, #0]
8009dcc: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8009dd0: f507 7384 add.w r3, r7, #264 @ 0x108
8009dd4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009dd8: 681b ldr r3, [r3, #0]
8009dda: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009dde: b29b uxth r3, r3
8009de0: 461a mov r2, r3
8009de2: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
8009de6: 4413 add r3, r2
8009de8: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8009dec: f507 7384 add.w r3, r7, #264 @ 0x108
8009df0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009df4: 681b ldr r3, [r3, #0]
8009df6: 781b ldrb r3, [r3, #0]
8009df8: 011a lsls r2, r3, #4
8009dfa: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
8009dfe: 4413 add r3, r2
8009e00: f203 4304 addw r3, r3, #1028 @ 0x404
8009e04: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
8009e08: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8009e0c: 881b ldrh r3, [r3, #0]
8009e0e: b29b uxth r3, r3
8009e10: f3c3 0309 ubfx r3, r3, #0, #10
8009e14: b29a uxth r2, r3
8009e16: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8009e1a: 801a strh r2, [r3, #0]
8009e1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009e20: 2b3e cmp r3, #62 @ 0x3e
8009e22: d923 bls.n 8009e6c <USB_EPStartXfer+0x149c>
8009e24: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009e28: 095b lsrs r3, r3, #5
8009e2a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8009e2e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009e32: f003 031f and.w r3, r3, #31
8009e36: 2b00 cmp r3, #0
8009e38: d104 bne.n 8009e44 <USB_EPStartXfer+0x1474>
8009e3a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8009e3e: 3b01 subs r3, #1
8009e40: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8009e44: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8009e48: 881b ldrh r3, [r3, #0]
8009e4a: b29a uxth r2, r3
8009e4c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8009e50: b29b uxth r3, r3
8009e52: 029b lsls r3, r3, #10
8009e54: b29b uxth r3, r3
8009e56: 4313 orrs r3, r2
8009e58: b29b uxth r3, r3
8009e5a: ea6f 4343 mvn.w r3, r3, lsl #17
8009e5e: ea6f 4353 mvn.w r3, r3, lsr #17
8009e62: b29a uxth r2, r3
8009e64: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8009e68: 801a strh r2, [r3, #0]
8009e6a: e060 b.n 8009f2e <USB_EPStartXfer+0x155e>
8009e6c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009e70: 2b00 cmp r3, #0
8009e72: d10c bne.n 8009e8e <USB_EPStartXfer+0x14be>
8009e74: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8009e78: 881b ldrh r3, [r3, #0]
8009e7a: b29b uxth r3, r3
8009e7c: ea6f 4343 mvn.w r3, r3, lsl #17
8009e80: ea6f 4353 mvn.w r3, r3, lsr #17
8009e84: b29a uxth r2, r3
8009e86: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8009e8a: 801a strh r2, [r3, #0]
8009e8c: e04f b.n 8009f2e <USB_EPStartXfer+0x155e>
8009e8e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009e92: 085b lsrs r3, r3, #1
8009e94: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8009e98: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009e9c: f003 0301 and.w r3, r3, #1
8009ea0: 2b00 cmp r3, #0
8009ea2: d004 beq.n 8009eae <USB_EPStartXfer+0x14de>
8009ea4: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8009ea8: 3301 adds r3, #1
8009eaa: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8009eae: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8009eb2: 881b ldrh r3, [r3, #0]
8009eb4: b29a uxth r2, r3
8009eb6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8009eba: b29b uxth r3, r3
8009ebc: 029b lsls r3, r3, #10
8009ebe: b29b uxth r3, r3
8009ec0: 4313 orrs r3, r2
8009ec2: b29a uxth r2, r3
8009ec4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8009ec8: 801a strh r2, [r3, #0]
8009eca: e030 b.n 8009f2e <USB_EPStartXfer+0x155e>
8009ecc: f507 7384 add.w r3, r7, #264 @ 0x108
8009ed0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009ed4: 681b ldr r3, [r3, #0]
8009ed6: 785b ldrb r3, [r3, #1]
8009ed8: 2b01 cmp r3, #1
8009eda: d128 bne.n 8009f2e <USB_EPStartXfer+0x155e>
8009edc: f507 7384 add.w r3, r7, #264 @ 0x108
8009ee0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009ee4: 681b ldr r3, [r3, #0]
8009ee6: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
8009eea: f507 7384 add.w r3, r7, #264 @ 0x108
8009eee: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009ef2: 681b ldr r3, [r3, #0]
8009ef4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009ef8: b29b uxth r3, r3
8009efa: 461a mov r2, r3
8009efc: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8009f00: 4413 add r3, r2
8009f02: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
8009f06: f507 7384 add.w r3, r7, #264 @ 0x108
8009f0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009f0e: 681b ldr r3, [r3, #0]
8009f10: 781b ldrb r3, [r3, #0]
8009f12: 011a lsls r2, r3, #4
8009f14: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8009f18: 4413 add r3, r2
8009f1a: f203 4304 addw r3, r3, #1028 @ 0x404
8009f1e: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
8009f22: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009f26: b29a uxth r2, r3
8009f28: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
8009f2c: 801a strh r2, [r3, #0]
8009f2e: f507 7384 add.w r3, r7, #264 @ 0x108
8009f32: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009f36: 681b ldr r3, [r3, #0]
8009f38: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
8009f3c: f507 7384 add.w r3, r7, #264 @ 0x108
8009f40: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009f44: 681b ldr r3, [r3, #0]
8009f46: 785b ldrb r3, [r3, #1]
8009f48: 2b00 cmp r3, #0
8009f4a: f040 8085 bne.w 800a058 <USB_EPStartXfer+0x1688>
8009f4e: f507 7384 add.w r3, r7, #264 @ 0x108
8009f52: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009f56: 681b ldr r3, [r3, #0]
8009f58: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8009f5c: f507 7384 add.w r3, r7, #264 @ 0x108
8009f60: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009f64: 681b ldr r3, [r3, #0]
8009f66: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009f6a: b29b uxth r3, r3
8009f6c: 461a mov r2, r3
8009f6e: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
8009f72: 4413 add r3, r2
8009f74: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8009f78: f507 7384 add.w r3, r7, #264 @ 0x108
8009f7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009f80: 681b ldr r3, [r3, #0]
8009f82: 781b ldrb r3, [r3, #0]
8009f84: 011a lsls r2, r3, #4
8009f86: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
8009f8a: 4413 add r3, r2
8009f8c: f203 430c addw r3, r3, #1036 @ 0x40c
8009f90: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
8009f94: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8009f98: 881b ldrh r3, [r3, #0]
8009f9a: b29b uxth r3, r3
8009f9c: f3c3 0309 ubfx r3, r3, #0, #10
8009fa0: b29a uxth r2, r3
8009fa2: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8009fa6: 801a strh r2, [r3, #0]
8009fa8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009fac: 2b3e cmp r3, #62 @ 0x3e
8009fae: d923 bls.n 8009ff8 <USB_EPStartXfer+0x1628>
8009fb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009fb4: 095b lsrs r3, r3, #5
8009fb6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8009fba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009fbe: f003 031f and.w r3, r3, #31
8009fc2: 2b00 cmp r3, #0
8009fc4: d104 bne.n 8009fd0 <USB_EPStartXfer+0x1600>
8009fc6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8009fca: 3b01 subs r3, #1
8009fcc: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8009fd0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8009fd4: 881b ldrh r3, [r3, #0]
8009fd6: b29a uxth r2, r3
8009fd8: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8009fdc: b29b uxth r3, r3
8009fde: 029b lsls r3, r3, #10
8009fe0: b29b uxth r3, r3
8009fe2: 4313 orrs r3, r2
8009fe4: b29b uxth r3, r3
8009fe6: ea6f 4343 mvn.w r3, r3, lsl #17
8009fea: ea6f 4353 mvn.w r3, r3, lsr #17
8009fee: b29a uxth r2, r3
8009ff0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8009ff4: 801a strh r2, [r3, #0]
8009ff6: e05c b.n 800a0b2 <USB_EPStartXfer+0x16e2>
8009ff8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009ffc: 2b00 cmp r3, #0
8009ffe: d10c bne.n 800a01a <USB_EPStartXfer+0x164a>
800a000: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800a004: 881b ldrh r3, [r3, #0]
800a006: b29b uxth r3, r3
800a008: ea6f 4343 mvn.w r3, r3, lsl #17
800a00c: ea6f 4353 mvn.w r3, r3, lsr #17
800a010: b29a uxth r2, r3
800a012: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800a016: 801a strh r2, [r3, #0]
800a018: e04b b.n 800a0b2 <USB_EPStartXfer+0x16e2>
800a01a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a01e: 085b lsrs r3, r3, #1
800a020: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800a024: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a028: f003 0301 and.w r3, r3, #1
800a02c: 2b00 cmp r3, #0
800a02e: d004 beq.n 800a03a <USB_EPStartXfer+0x166a>
800a030: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800a034: 3301 adds r3, #1
800a036: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800a03a: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800a03e: 881b ldrh r3, [r3, #0]
800a040: b29a uxth r2, r3
800a042: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800a046: b29b uxth r3, r3
800a048: 029b lsls r3, r3, #10
800a04a: b29b uxth r3, r3
800a04c: 4313 orrs r3, r2
800a04e: b29a uxth r2, r3
800a050: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800a054: 801a strh r2, [r3, #0]
800a056: e02c b.n 800a0b2 <USB_EPStartXfer+0x16e2>
800a058: f507 7384 add.w r3, r7, #264 @ 0x108
800a05c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a060: 681b ldr r3, [r3, #0]
800a062: 785b ldrb r3, [r3, #1]
800a064: 2b01 cmp r3, #1
800a066: d124 bne.n 800a0b2 <USB_EPStartXfer+0x16e2>
800a068: f507 7384 add.w r3, r7, #264 @ 0x108
800a06c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a070: 681b ldr r3, [r3, #0]
800a072: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a076: b29b uxth r3, r3
800a078: 461a mov r2, r3
800a07a: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800a07e: 4413 add r3, r2
800a080: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800a084: f507 7384 add.w r3, r7, #264 @ 0x108
800a088: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a08c: 681b ldr r3, [r3, #0]
800a08e: 781b ldrb r3, [r3, #0]
800a090: 011a lsls r2, r3, #4
800a092: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800a096: 4413 add r3, r2
800a098: f203 430c addw r3, r3, #1036 @ 0x40c
800a09c: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800a0a0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a0a4: b29a uxth r2, r3
800a0a6: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800a0aa: 801a strh r2, [r3, #0]
800a0ac: e001 b.n 800a0b2 <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
800a0ae: 2301 movs r3, #1
800a0b0: e03a b.n 800a128 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800a0b2: f507 7384 add.w r3, r7, #264 @ 0x108
800a0b6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a0ba: 681a ldr r2, [r3, #0]
800a0bc: f507 7384 add.w r3, r7, #264 @ 0x108
800a0c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a0c4: 681b ldr r3, [r3, #0]
800a0c6: 781b ldrb r3, [r3, #0]
800a0c8: 009b lsls r3, r3, #2
800a0ca: 4413 add r3, r2
800a0cc: 881b ldrh r3, [r3, #0]
800a0ce: b29b uxth r3, r3
800a0d0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a0d4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a0d8: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800a0dc: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800a0e0: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a0e4: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800a0e8: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800a0ec: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a0f0: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800a0f4: f507 7384 add.w r3, r7, #264 @ 0x108
800a0f8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a0fc: 681a ldr r2, [r3, #0]
800a0fe: f507 7384 add.w r3, r7, #264 @ 0x108
800a102: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a106: 681b ldr r3, [r3, #0]
800a108: 781b ldrb r3, [r3, #0]
800a10a: 009b lsls r3, r3, #2
800a10c: 441a add r2, r3
800a10e: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800a112: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a116: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a11a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a11e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a122: b29b uxth r3, r3
800a124: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800a126: 2300 movs r3, #0
}
800a128: 4618 mov r0, r3
800a12a: f507 7784 add.w r7, r7, #264 @ 0x108
800a12e: 46bd mov sp, r7
800a130: bd80 pop {r7, pc}
0800a132 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a132: b480 push {r7}
800a134: b085 sub sp, #20
800a136: af00 add r7, sp, #0
800a138: 6078 str r0, [r7, #4]
800a13a: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800a13c: 683b ldr r3, [r7, #0]
800a13e: 785b ldrb r3, [r3, #1]
800a140: 2b00 cmp r3, #0
800a142: d020 beq.n 800a186 <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800a144: 687a ldr r2, [r7, #4]
800a146: 683b ldr r3, [r7, #0]
800a148: 781b ldrb r3, [r3, #0]
800a14a: 009b lsls r3, r3, #2
800a14c: 4413 add r3, r2
800a14e: 881b ldrh r3, [r3, #0]
800a150: b29b uxth r3, r3
800a152: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a156: f023 0340 bic.w r3, r3, #64 @ 0x40
800a15a: 81bb strh r3, [r7, #12]
800a15c: 89bb ldrh r3, [r7, #12]
800a15e: f083 0310 eor.w r3, r3, #16
800a162: 81bb strh r3, [r7, #12]
800a164: 687a ldr r2, [r7, #4]
800a166: 683b ldr r3, [r7, #0]
800a168: 781b ldrb r3, [r3, #0]
800a16a: 009b lsls r3, r3, #2
800a16c: 441a add r2, r3
800a16e: 89bb ldrh r3, [r7, #12]
800a170: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a174: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a178: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a17c: f043 0380 orr.w r3, r3, #128 @ 0x80
800a180: b29b uxth r3, r3
800a182: 8013 strh r3, [r2, #0]
800a184: e01f b.n 800a1c6 <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800a186: 687a ldr r2, [r7, #4]
800a188: 683b ldr r3, [r7, #0]
800a18a: 781b ldrb r3, [r3, #0]
800a18c: 009b lsls r3, r3, #2
800a18e: 4413 add r3, r2
800a190: 881b ldrh r3, [r3, #0]
800a192: b29b uxth r3, r3
800a194: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a198: f023 0370 bic.w r3, r3, #112 @ 0x70
800a19c: 81fb strh r3, [r7, #14]
800a19e: 89fb ldrh r3, [r7, #14]
800a1a0: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a1a4: 81fb strh r3, [r7, #14]
800a1a6: 687a ldr r2, [r7, #4]
800a1a8: 683b ldr r3, [r7, #0]
800a1aa: 781b ldrb r3, [r3, #0]
800a1ac: 009b lsls r3, r3, #2
800a1ae: 441a add r2, r3
800a1b0: 89fb ldrh r3, [r7, #14]
800a1b2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a1b6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a1ba: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a1be: f043 0380 orr.w r3, r3, #128 @ 0x80
800a1c2: b29b uxth r3, r3
800a1c4: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800a1c6: 2300 movs r3, #0
}
800a1c8: 4618 mov r0, r3
800a1ca: 3714 adds r7, #20
800a1cc: 46bd mov sp, r7
800a1ce: bc80 pop {r7}
800a1d0: 4770 bx lr
0800a1d2 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a1d2: b480 push {r7}
800a1d4: b087 sub sp, #28
800a1d6: af00 add r7, sp, #0
800a1d8: 6078 str r0, [r7, #4]
800a1da: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800a1dc: 683b ldr r3, [r7, #0]
800a1de: 7b1b ldrb r3, [r3, #12]
800a1e0: 2b00 cmp r3, #0
800a1e2: f040 809d bne.w 800a320 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800a1e6: 683b ldr r3, [r7, #0]
800a1e8: 785b ldrb r3, [r3, #1]
800a1ea: 2b00 cmp r3, #0
800a1ec: d04c beq.n 800a288 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a1ee: 687a ldr r2, [r7, #4]
800a1f0: 683b ldr r3, [r7, #0]
800a1f2: 781b ldrb r3, [r3, #0]
800a1f4: 009b lsls r3, r3, #2
800a1f6: 4413 add r3, r2
800a1f8: 881b ldrh r3, [r3, #0]
800a1fa: 823b strh r3, [r7, #16]
800a1fc: 8a3b ldrh r3, [r7, #16]
800a1fe: f003 0340 and.w r3, r3, #64 @ 0x40
800a202: 2b00 cmp r3, #0
800a204: d01b beq.n 800a23e <USB_EPClearStall+0x6c>
800a206: 687a ldr r2, [r7, #4]
800a208: 683b ldr r3, [r7, #0]
800a20a: 781b ldrb r3, [r3, #0]
800a20c: 009b lsls r3, r3, #2
800a20e: 4413 add r3, r2
800a210: 881b ldrh r3, [r3, #0]
800a212: b29b uxth r3, r3
800a214: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a218: f023 0370 bic.w r3, r3, #112 @ 0x70
800a21c: 81fb strh r3, [r7, #14]
800a21e: 687a ldr r2, [r7, #4]
800a220: 683b ldr r3, [r7, #0]
800a222: 781b ldrb r3, [r3, #0]
800a224: 009b lsls r3, r3, #2
800a226: 441a add r2, r3
800a228: 89fb ldrh r3, [r7, #14]
800a22a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a22e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a232: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a236: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a23a: b29b uxth r3, r3
800a23c: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800a23e: 683b ldr r3, [r7, #0]
800a240: 78db ldrb r3, [r3, #3]
800a242: 2b01 cmp r3, #1
800a244: d06c beq.n 800a320 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800a246: 687a ldr r2, [r7, #4]
800a248: 683b ldr r3, [r7, #0]
800a24a: 781b ldrb r3, [r3, #0]
800a24c: 009b lsls r3, r3, #2
800a24e: 4413 add r3, r2
800a250: 881b ldrh r3, [r3, #0]
800a252: b29b uxth r3, r3
800a254: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a258: f023 0340 bic.w r3, r3, #64 @ 0x40
800a25c: 81bb strh r3, [r7, #12]
800a25e: 89bb ldrh r3, [r7, #12]
800a260: f083 0320 eor.w r3, r3, #32
800a264: 81bb strh r3, [r7, #12]
800a266: 687a ldr r2, [r7, #4]
800a268: 683b ldr r3, [r7, #0]
800a26a: 781b ldrb r3, [r3, #0]
800a26c: 009b lsls r3, r3, #2
800a26e: 441a add r2, r3
800a270: 89bb ldrh r3, [r7, #12]
800a272: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a276: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a27a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a27e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a282: b29b uxth r3, r3
800a284: 8013 strh r3, [r2, #0]
800a286: e04b b.n 800a320 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a288: 687a ldr r2, [r7, #4]
800a28a: 683b ldr r3, [r7, #0]
800a28c: 781b ldrb r3, [r3, #0]
800a28e: 009b lsls r3, r3, #2
800a290: 4413 add r3, r2
800a292: 881b ldrh r3, [r3, #0]
800a294: 82fb strh r3, [r7, #22]
800a296: 8afb ldrh r3, [r7, #22]
800a298: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a29c: 2b00 cmp r3, #0
800a29e: d01b beq.n 800a2d8 <USB_EPClearStall+0x106>
800a2a0: 687a ldr r2, [r7, #4]
800a2a2: 683b ldr r3, [r7, #0]
800a2a4: 781b ldrb r3, [r3, #0]
800a2a6: 009b lsls r3, r3, #2
800a2a8: 4413 add r3, r2
800a2aa: 881b ldrh r3, [r3, #0]
800a2ac: b29b uxth r3, r3
800a2ae: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a2b2: f023 0370 bic.w r3, r3, #112 @ 0x70
800a2b6: 82bb strh r3, [r7, #20]
800a2b8: 687a ldr r2, [r7, #4]
800a2ba: 683b ldr r3, [r7, #0]
800a2bc: 781b ldrb r3, [r3, #0]
800a2be: 009b lsls r3, r3, #2
800a2c0: 441a add r2, r3
800a2c2: 8abb ldrh r3, [r7, #20]
800a2c4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a2c8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a2cc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a2d0: f043 0380 orr.w r3, r3, #128 @ 0x80
800a2d4: b29b uxth r3, r3
800a2d6: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800a2d8: 687a ldr r2, [r7, #4]
800a2da: 683b ldr r3, [r7, #0]
800a2dc: 781b ldrb r3, [r3, #0]
800a2de: 009b lsls r3, r3, #2
800a2e0: 4413 add r3, r2
800a2e2: 881b ldrh r3, [r3, #0]
800a2e4: b29b uxth r3, r3
800a2e6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a2ea: f023 0370 bic.w r3, r3, #112 @ 0x70
800a2ee: 827b strh r3, [r7, #18]
800a2f0: 8a7b ldrh r3, [r7, #18]
800a2f2: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a2f6: 827b strh r3, [r7, #18]
800a2f8: 8a7b ldrh r3, [r7, #18]
800a2fa: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a2fe: 827b strh r3, [r7, #18]
800a300: 687a ldr r2, [r7, #4]
800a302: 683b ldr r3, [r7, #0]
800a304: 781b ldrb r3, [r3, #0]
800a306: 009b lsls r3, r3, #2
800a308: 441a add r2, r3
800a30a: 8a7b ldrh r3, [r7, #18]
800a30c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a310: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a314: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a318: f043 0380 orr.w r3, r3, #128 @ 0x80
800a31c: b29b uxth r3, r3
800a31e: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800a320: 2300 movs r3, #0
}
800a322: 4618 mov r0, r3
800a324: 371c adds r7, #28
800a326: 46bd mov sp, r7
800a328: bc80 pop {r7}
800a32a: 4770 bx lr
0800a32c <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800a32c: b480 push {r7}
800a32e: b083 sub sp, #12
800a330: af00 add r7, sp, #0
800a332: 6078 str r0, [r7, #4]
800a334: 460b mov r3, r1
800a336: 70fb strb r3, [r7, #3]
if (address == 0U)
800a338: 78fb ldrb r3, [r7, #3]
800a33a: 2b00 cmp r3, #0
800a33c: d103 bne.n 800a346 <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800a33e: 687b ldr r3, [r7, #4]
800a340: 2280 movs r2, #128 @ 0x80
800a342: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800a346: 2300 movs r3, #0
}
800a348: 4618 mov r0, r3
800a34a: 370c adds r7, #12
800a34c: 46bd mov sp, r7
800a34e: bc80 pop {r7}
800a350: 4770 bx lr
0800a352 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800a352: b480 push {r7}
800a354: b083 sub sp, #12
800a356: af00 add r7, sp, #0
800a358: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800a35a: 2300 movs r3, #0
}
800a35c: 4618 mov r0, r3
800a35e: 370c adds r7, #12
800a360: 46bd mov sp, r7
800a362: bc80 pop {r7}
800a364: 4770 bx lr
0800a366 <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800a366: b480 push {r7}
800a368: b083 sub sp, #12
800a36a: af00 add r7, sp, #0
800a36c: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800a36e: 2300 movs r3, #0
}
800a370: 4618 mov r0, r3
800a372: 370c adds r7, #12
800a374: 46bd mov sp, r7
800a376: bc80 pop {r7}
800a378: 4770 bx lr
0800a37a <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800a37a: b480 push {r7}
800a37c: b085 sub sp, #20
800a37e: af00 add r7, sp, #0
800a380: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800a382: 687b ldr r3, [r7, #4]
800a384: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800a388: b29b uxth r3, r3
800a38a: 60fb str r3, [r7, #12]
return tmpreg;
800a38c: 68fb ldr r3, [r7, #12]
}
800a38e: 4618 mov r0, r3
800a390: 3714 adds r7, #20
800a392: 46bd mov sp, r7
800a394: bc80 pop {r7}
800a396: 4770 bx lr
0800a398 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800a398: b480 push {r7}
800a39a: b083 sub sp, #12
800a39c: af00 add r7, sp, #0
800a39e: 6078 str r0, [r7, #4]
800a3a0: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800a3a2: 2300 movs r3, #0
}
800a3a4: 4618 mov r0, r3
800a3a6: 370c adds r7, #12
800a3a8: 46bd mov sp, r7
800a3aa: bc80 pop {r7}
800a3ac: 4770 bx lr
0800a3ae <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800a3ae: b480 push {r7}
800a3b0: b08b sub sp, #44 @ 0x2c
800a3b2: af00 add r7, sp, #0
800a3b4: 60f8 str r0, [r7, #12]
800a3b6: 60b9 str r1, [r7, #8]
800a3b8: 4611 mov r1, r2
800a3ba: 461a mov r2, r3
800a3bc: 460b mov r3, r1
800a3be: 80fb strh r3, [r7, #6]
800a3c0: 4613 mov r3, r2
800a3c2: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800a3c4: 88bb ldrh r3, [r7, #4]
800a3c6: 3301 adds r3, #1
800a3c8: 085b lsrs r3, r3, #1
800a3ca: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800a3cc: 68fb ldr r3, [r7, #12]
800a3ce: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800a3d0: 68bb ldr r3, [r7, #8]
800a3d2: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800a3d4: 88fb ldrh r3, [r7, #6]
800a3d6: 005a lsls r2, r3, #1
800a3d8: 697b ldr r3, [r7, #20]
800a3da: 4413 add r3, r2
800a3dc: f503 6380 add.w r3, r3, #1024 @ 0x400
800a3e0: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800a3e2: 69bb ldr r3, [r7, #24]
800a3e4: 627b str r3, [r7, #36] @ 0x24
800a3e6: e01f b.n 800a428 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
800a3e8: 69fb ldr r3, [r7, #28]
800a3ea: 781b ldrb r3, [r3, #0]
800a3ec: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800a3ee: 69fb ldr r3, [r7, #28]
800a3f0: 3301 adds r3, #1
800a3f2: 781b ldrb r3, [r3, #0]
800a3f4: b21b sxth r3, r3
800a3f6: 021b lsls r3, r3, #8
800a3f8: b21a sxth r2, r3
800a3fa: f9b7 3012 ldrsh.w r3, [r7, #18]
800a3fe: 4313 orrs r3, r2
800a400: b21b sxth r3, r3
800a402: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
800a404: 6a3b ldr r3, [r7, #32]
800a406: 8a7a ldrh r2, [r7, #18]
800a408: 801a strh r2, [r3, #0]
pdwVal++;
800a40a: 6a3b ldr r3, [r7, #32]
800a40c: 3302 adds r3, #2
800a40e: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
800a410: 6a3b ldr r3, [r7, #32]
800a412: 3302 adds r3, #2
800a414: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800a416: 69fb ldr r3, [r7, #28]
800a418: 3301 adds r3, #1
800a41a: 61fb str r3, [r7, #28]
pBuf++;
800a41c: 69fb ldr r3, [r7, #28]
800a41e: 3301 adds r3, #1
800a420: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
800a422: 6a7b ldr r3, [r7, #36] @ 0x24
800a424: 3b01 subs r3, #1
800a426: 627b str r3, [r7, #36] @ 0x24
800a428: 6a7b ldr r3, [r7, #36] @ 0x24
800a42a: 2b00 cmp r3, #0
800a42c: d1dc bne.n 800a3e8 <USB_WritePMA+0x3a>
}
}
800a42e: bf00 nop
800a430: bf00 nop
800a432: 372c adds r7, #44 @ 0x2c
800a434: 46bd mov sp, r7
800a436: bc80 pop {r7}
800a438: 4770 bx lr
0800a43a <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800a43a: b480 push {r7}
800a43c: b08b sub sp, #44 @ 0x2c
800a43e: af00 add r7, sp, #0
800a440: 60f8 str r0, [r7, #12]
800a442: 60b9 str r1, [r7, #8]
800a444: 4611 mov r1, r2
800a446: 461a mov r2, r3
800a448: 460b mov r3, r1
800a44a: 80fb strh r3, [r7, #6]
800a44c: 4613 mov r3, r2
800a44e: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
800a450: 88bb ldrh r3, [r7, #4]
800a452: 085b lsrs r3, r3, #1
800a454: b29b uxth r3, r3
800a456: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800a458: 68fb ldr r3, [r7, #12]
800a45a: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800a45c: 68bb ldr r3, [r7, #8]
800a45e: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800a460: 88fb ldrh r3, [r7, #6]
800a462: 005a lsls r2, r3, #1
800a464: 697b ldr r3, [r7, #20]
800a466: 4413 add r3, r2
800a468: f503 6380 add.w r3, r3, #1024 @ 0x400
800a46c: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800a46e: 69bb ldr r3, [r7, #24]
800a470: 627b str r3, [r7, #36] @ 0x24
800a472: e01b b.n 800a4ac <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800a474: 6a3b ldr r3, [r7, #32]
800a476: 881b ldrh r3, [r3, #0]
800a478: b29b uxth r3, r3
800a47a: 613b str r3, [r7, #16]
pdwVal++;
800a47c: 6a3b ldr r3, [r7, #32]
800a47e: 3302 adds r3, #2
800a480: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800a482: 693b ldr r3, [r7, #16]
800a484: b2da uxtb r2, r3
800a486: 69fb ldr r3, [r7, #28]
800a488: 701a strb r2, [r3, #0]
pBuf++;
800a48a: 69fb ldr r3, [r7, #28]
800a48c: 3301 adds r3, #1
800a48e: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
800a490: 693b ldr r3, [r7, #16]
800a492: 0a1b lsrs r3, r3, #8
800a494: b2da uxtb r2, r3
800a496: 69fb ldr r3, [r7, #28]
800a498: 701a strb r2, [r3, #0]
pBuf++;
800a49a: 69fb ldr r3, [r7, #28]
800a49c: 3301 adds r3, #1
800a49e: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
800a4a0: 6a3b ldr r3, [r7, #32]
800a4a2: 3302 adds r3, #2
800a4a4: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800a4a6: 6a7b ldr r3, [r7, #36] @ 0x24
800a4a8: 3b01 subs r3, #1
800a4aa: 627b str r3, [r7, #36] @ 0x24
800a4ac: 6a7b ldr r3, [r7, #36] @ 0x24
800a4ae: 2b00 cmp r3, #0
800a4b0: d1e0 bne.n 800a474 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800a4b2: 88bb ldrh r3, [r7, #4]
800a4b4: f003 0301 and.w r3, r3, #1
800a4b8: b29b uxth r3, r3
800a4ba: 2b00 cmp r3, #0
800a4bc: d007 beq.n 800a4ce <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
800a4be: 6a3b ldr r3, [r7, #32]
800a4c0: 881b ldrh r3, [r3, #0]
800a4c2: b29b uxth r3, r3
800a4c4: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800a4c6: 693b ldr r3, [r7, #16]
800a4c8: b2da uxtb r2, r3
800a4ca: 69fb ldr r3, [r7, #28]
800a4cc: 701a strb r2, [r3, #0]
}
}
800a4ce: bf00 nop
800a4d0: 372c adds r7, #44 @ 0x2c
800a4d2: 46bd mov sp, r7
800a4d4: bc80 pop {r7}
800a4d6: 4770 bx lr
0800a4d8 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800a4d8: b580 push {r7, lr}
800a4da: b084 sub sp, #16
800a4dc: af00 add r7, sp, #0
800a4de: 6078 str r0, [r7, #4]
800a4e0: 460b mov r3, r1
800a4e2: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800a4e4: 2300 movs r3, #0
800a4e6: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
800a4e8: 687b ldr r3, [r7, #4]
800a4ea: 7c1b ldrb r3, [r3, #16]
800a4ec: 2b00 cmp r3, #0
800a4ee: d115 bne.n 800a51c <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800a4f0: f44f 7300 mov.w r3, #512 @ 0x200
800a4f4: 2202 movs r2, #2
800a4f6: 2181 movs r1, #129 @ 0x81
800a4f8: 6878 ldr r0, [r7, #4]
800a4fa: f001 ff00 bl 800c2fe <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800a4fe: 687b ldr r3, [r7, #4]
800a500: 2201 movs r2, #1
800a502: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800a504: f44f 7300 mov.w r3, #512 @ 0x200
800a508: 2202 movs r2, #2
800a50a: 2101 movs r1, #1
800a50c: 6878 ldr r0, [r7, #4]
800a50e: f001 fef6 bl 800c2fe <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800a512: 687b ldr r3, [r7, #4]
800a514: 2201 movs r2, #1
800a516: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800a51a: e012 b.n 800a542 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800a51c: 2340 movs r3, #64 @ 0x40
800a51e: 2202 movs r2, #2
800a520: 2181 movs r1, #129 @ 0x81
800a522: 6878 ldr r0, [r7, #4]
800a524: f001 feeb bl 800c2fe <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800a528: 687b ldr r3, [r7, #4]
800a52a: 2201 movs r2, #1
800a52c: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800a52e: 2340 movs r3, #64 @ 0x40
800a530: 2202 movs r2, #2
800a532: 2101 movs r1, #1
800a534: 6878 ldr r0, [r7, #4]
800a536: f001 fee2 bl 800c2fe <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800a53a: 687b ldr r3, [r7, #4]
800a53c: 2201 movs r2, #1
800a53e: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800a542: 2308 movs r3, #8
800a544: 2203 movs r2, #3
800a546: 2182 movs r1, #130 @ 0x82
800a548: 6878 ldr r0, [r7, #4]
800a54a: f001 fed8 bl 800c2fe <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800a54e: 687b ldr r3, [r7, #4]
800a550: 2201 movs r2, #1
800a552: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800a554: f44f 7007 mov.w r0, #540 @ 0x21c
800a558: f001 fff8 bl 800c54c <USBD_static_malloc>
800a55c: 4602 mov r2, r0
800a55e: 687b ldr r3, [r7, #4]
800a560: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800a564: 687b ldr r3, [r7, #4]
800a566: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a56a: 2b00 cmp r3, #0
800a56c: d102 bne.n 800a574 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800a56e: 2301 movs r3, #1
800a570: 73fb strb r3, [r7, #15]
800a572: e026 b.n 800a5c2 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800a574: 687b ldr r3, [r7, #4]
800a576: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a57a: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
800a57c: 687b ldr r3, [r7, #4]
800a57e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800a582: 681b ldr r3, [r3, #0]
800a584: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800a586: 68bb ldr r3, [r7, #8]
800a588: 2200 movs r2, #0
800a58a: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800a58e: 68bb ldr r3, [r7, #8]
800a590: 2200 movs r2, #0
800a592: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800a596: 687b ldr r3, [r7, #4]
800a598: 7c1b ldrb r3, [r3, #16]
800a59a: 2b00 cmp r3, #0
800a59c: d109 bne.n 800a5b2 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800a59e: 68bb ldr r3, [r7, #8]
800a5a0: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800a5a4: f44f 7300 mov.w r3, #512 @ 0x200
800a5a8: 2101 movs r1, #1
800a5aa: 6878 ldr r0, [r7, #4]
800a5ac: f001 ff97 bl 800c4de <USBD_LL_PrepareReceive>
800a5b0: e007 b.n 800a5c2 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800a5b2: 68bb ldr r3, [r7, #8]
800a5b4: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800a5b8: 2340 movs r3, #64 @ 0x40
800a5ba: 2101 movs r1, #1
800a5bc: 6878 ldr r0, [r7, #4]
800a5be: f001 ff8e bl 800c4de <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800a5c2: 7bfb ldrb r3, [r7, #15]
}
800a5c4: 4618 mov r0, r3
800a5c6: 3710 adds r7, #16
800a5c8: 46bd mov sp, r7
800a5ca: bd80 pop {r7, pc}
0800a5cc <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800a5cc: b580 push {r7, lr}
800a5ce: b084 sub sp, #16
800a5d0: af00 add r7, sp, #0
800a5d2: 6078 str r0, [r7, #4]
800a5d4: 460b mov r3, r1
800a5d6: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800a5d8: 2300 movs r3, #0
800a5da: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800a5dc: 2181 movs r1, #129 @ 0x81
800a5de: 6878 ldr r0, [r7, #4]
800a5e0: f001 feb3 bl 800c34a <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800a5e4: 687b ldr r3, [r7, #4]
800a5e6: 2200 movs r2, #0
800a5e8: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800a5ea: 2101 movs r1, #1
800a5ec: 6878 ldr r0, [r7, #4]
800a5ee: f001 feac bl 800c34a <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
800a5f2: 687b ldr r3, [r7, #4]
800a5f4: 2200 movs r2, #0
800a5f6: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800a5fa: 2182 movs r1, #130 @ 0x82
800a5fc: 6878 ldr r0, [r7, #4]
800a5fe: f001 fea4 bl 800c34a <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
800a602: 687b ldr r3, [r7, #4]
800a604: 2200 movs r2, #0
800a606: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
800a608: 687b ldr r3, [r7, #4]
800a60a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a60e: 2b00 cmp r3, #0
800a610: d00e beq.n 800a630 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
800a612: 687b ldr r3, [r7, #4]
800a614: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800a618: 685b ldr r3, [r3, #4]
800a61a: 4798 blx r3
USBD_free(pdev->pClassData);
800a61c: 687b ldr r3, [r7, #4]
800a61e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a622: 4618 mov r0, r3
800a624: f001 ff9e bl 800c564 <USBD_static_free>
pdev->pClassData = NULL;
800a628: 687b ldr r3, [r7, #4]
800a62a: 2200 movs r2, #0
800a62c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800a630: 7bfb ldrb r3, [r7, #15]
}
800a632: 4618 mov r0, r3
800a634: 3710 adds r7, #16
800a636: 46bd mov sp, r7
800a638: bd80 pop {r7, pc}
0800a63a <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800a63a: b580 push {r7, lr}
800a63c: b086 sub sp, #24
800a63e: af00 add r7, sp, #0
800a640: 6078 str r0, [r7, #4]
800a642: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800a644: 687b ldr r3, [r7, #4]
800a646: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a64a: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800a64c: 2300 movs r3, #0
800a64e: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800a650: 2300 movs r3, #0
800a652: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800a654: 2300 movs r3, #0
800a656: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800a658: 683b ldr r3, [r7, #0]
800a65a: 781b ldrb r3, [r3, #0]
800a65c: f003 0360 and.w r3, r3, #96 @ 0x60
800a660: 2b00 cmp r3, #0
800a662: d039 beq.n 800a6d8 <USBD_CDC_Setup+0x9e>
800a664: 2b20 cmp r3, #32
800a666: d17f bne.n 800a768 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800a668: 683b ldr r3, [r7, #0]
800a66a: 88db ldrh r3, [r3, #6]
800a66c: 2b00 cmp r3, #0
800a66e: d029 beq.n 800a6c4 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800a670: 683b ldr r3, [r7, #0]
800a672: 781b ldrb r3, [r3, #0]
800a674: b25b sxtb r3, r3
800a676: 2b00 cmp r3, #0
800a678: da11 bge.n 800a69e <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800a67a: 687b ldr r3, [r7, #4]
800a67c: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800a680: 689b ldr r3, [r3, #8]
800a682: 683a ldr r2, [r7, #0]
800a684: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800a686: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800a688: 683a ldr r2, [r7, #0]
800a68a: 88d2 ldrh r2, [r2, #6]
800a68c: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800a68e: 6939 ldr r1, [r7, #16]
800a690: 683b ldr r3, [r7, #0]
800a692: 88db ldrh r3, [r3, #6]
800a694: 461a mov r2, r3
800a696: 6878 ldr r0, [r7, #4]
800a698: f001 fa06 bl 800baa8 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
800a69c: e06b b.n 800a776 <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800a69e: 683b ldr r3, [r7, #0]
800a6a0: 785a ldrb r2, [r3, #1]
800a6a2: 693b ldr r3, [r7, #16]
800a6a4: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800a6a8: 683b ldr r3, [r7, #0]
800a6aa: 88db ldrh r3, [r3, #6]
800a6ac: b2da uxtb r2, r3
800a6ae: 693b ldr r3, [r7, #16]
800a6b0: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800a6b4: 6939 ldr r1, [r7, #16]
800a6b6: 683b ldr r3, [r7, #0]
800a6b8: 88db ldrh r3, [r3, #6]
800a6ba: 461a mov r2, r3
800a6bc: 6878 ldr r0, [r7, #4]
800a6be: f001 fa21 bl 800bb04 <USBD_CtlPrepareRx>
break;
800a6c2: e058 b.n 800a776 <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800a6c4: 687b ldr r3, [r7, #4]
800a6c6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800a6ca: 689b ldr r3, [r3, #8]
800a6cc: 683a ldr r2, [r7, #0]
800a6ce: 7850 ldrb r0, [r2, #1]
800a6d0: 2200 movs r2, #0
800a6d2: 6839 ldr r1, [r7, #0]
800a6d4: 4798 blx r3
break;
800a6d6: e04e b.n 800a776 <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800a6d8: 683b ldr r3, [r7, #0]
800a6da: 785b ldrb r3, [r3, #1]
800a6dc: 2b0b cmp r3, #11
800a6de: d02e beq.n 800a73e <USBD_CDC_Setup+0x104>
800a6e0: 2b0b cmp r3, #11
800a6e2: dc38 bgt.n 800a756 <USBD_CDC_Setup+0x11c>
800a6e4: 2b00 cmp r3, #0
800a6e6: d002 beq.n 800a6ee <USBD_CDC_Setup+0xb4>
800a6e8: 2b0a cmp r3, #10
800a6ea: d014 beq.n 800a716 <USBD_CDC_Setup+0xdc>
800a6ec: e033 b.n 800a756 <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800a6ee: 687b ldr r3, [r7, #4]
800a6f0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800a6f4: 2b03 cmp r3, #3
800a6f6: d107 bne.n 800a708 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
800a6f8: f107 030c add.w r3, r7, #12
800a6fc: 2202 movs r2, #2
800a6fe: 4619 mov r1, r3
800a700: 6878 ldr r0, [r7, #4]
800a702: f001 f9d1 bl 800baa8 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800a706: e02e b.n 800a766 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800a708: 6839 ldr r1, [r7, #0]
800a70a: 6878 ldr r0, [r7, #4]
800a70c: f001 f962 bl 800b9d4 <USBD_CtlError>
ret = USBD_FAIL;
800a710: 2302 movs r3, #2
800a712: 75fb strb r3, [r7, #23]
break;
800a714: e027 b.n 800a766 <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800a716: 687b ldr r3, [r7, #4]
800a718: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800a71c: 2b03 cmp r3, #3
800a71e: d107 bne.n 800a730 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800a720: f107 030f add.w r3, r7, #15
800a724: 2201 movs r2, #1
800a726: 4619 mov r1, r3
800a728: 6878 ldr r0, [r7, #4]
800a72a: f001 f9bd bl 800baa8 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800a72e: e01a b.n 800a766 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800a730: 6839 ldr r1, [r7, #0]
800a732: 6878 ldr r0, [r7, #4]
800a734: f001 f94e bl 800b9d4 <USBD_CtlError>
ret = USBD_FAIL;
800a738: 2302 movs r3, #2
800a73a: 75fb strb r3, [r7, #23]
break;
800a73c: e013 b.n 800a766 <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800a73e: 687b ldr r3, [r7, #4]
800a740: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800a744: 2b03 cmp r3, #3
800a746: d00d beq.n 800a764 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800a748: 6839 ldr r1, [r7, #0]
800a74a: 6878 ldr r0, [r7, #4]
800a74c: f001 f942 bl 800b9d4 <USBD_CtlError>
ret = USBD_FAIL;
800a750: 2302 movs r3, #2
800a752: 75fb strb r3, [r7, #23]
}
break;
800a754: e006 b.n 800a764 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800a756: 6839 ldr r1, [r7, #0]
800a758: 6878 ldr r0, [r7, #4]
800a75a: f001 f93b bl 800b9d4 <USBD_CtlError>
ret = USBD_FAIL;
800a75e: 2302 movs r3, #2
800a760: 75fb strb r3, [r7, #23]
break;
800a762: e000 b.n 800a766 <USBD_CDC_Setup+0x12c>
break;
800a764: bf00 nop
}
break;
800a766: e006 b.n 800a776 <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800a768: 6839 ldr r1, [r7, #0]
800a76a: 6878 ldr r0, [r7, #4]
800a76c: f001 f932 bl 800b9d4 <USBD_CtlError>
ret = USBD_FAIL;
800a770: 2302 movs r3, #2
800a772: 75fb strb r3, [r7, #23]
break;
800a774: bf00 nop
}
return ret;
800a776: 7dfb ldrb r3, [r7, #23]
}
800a778: 4618 mov r0, r3
800a77a: 3718 adds r7, #24
800a77c: 46bd mov sp, r7
800a77e: bd80 pop {r7, pc}
0800a780 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800a780: b580 push {r7, lr}
800a782: b084 sub sp, #16
800a784: af00 add r7, sp, #0
800a786: 6078 str r0, [r7, #4]
800a788: 460b mov r3, r1
800a78a: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
800a78c: 687b ldr r3, [r7, #4]
800a78e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a792: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800a794: 687b ldr r3, [r7, #4]
800a796: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a79a: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
800a79c: 687b ldr r3, [r7, #4]
800a79e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a7a2: 2b00 cmp r3, #0
800a7a4: d03a beq.n 800a81c <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800a7a6: 78fa ldrb r2, [r7, #3]
800a7a8: 6879 ldr r1, [r7, #4]
800a7aa: 4613 mov r3, r2
800a7ac: 009b lsls r3, r3, #2
800a7ae: 4413 add r3, r2
800a7b0: 009b lsls r3, r3, #2
800a7b2: 440b add r3, r1
800a7b4: 331c adds r3, #28
800a7b6: 681b ldr r3, [r3, #0]
800a7b8: 2b00 cmp r3, #0
800a7ba: d029 beq.n 800a810 <USBD_CDC_DataIn+0x90>
800a7bc: 78fa ldrb r2, [r7, #3]
800a7be: 6879 ldr r1, [r7, #4]
800a7c0: 4613 mov r3, r2
800a7c2: 009b lsls r3, r3, #2
800a7c4: 4413 add r3, r2
800a7c6: 009b lsls r3, r3, #2
800a7c8: 440b add r3, r1
800a7ca: 331c adds r3, #28
800a7cc: 681a ldr r2, [r3, #0]
800a7ce: 78f9 ldrb r1, [r7, #3]
800a7d0: 68b8 ldr r0, [r7, #8]
800a7d2: 460b mov r3, r1
800a7d4: 009b lsls r3, r3, #2
800a7d6: 440b add r3, r1
800a7d8: 00db lsls r3, r3, #3
800a7da: 4403 add r3, r0
800a7dc: 3320 adds r3, #32
800a7de: 681b ldr r3, [r3, #0]
800a7e0: fbb2 f1f3 udiv r1, r2, r3
800a7e4: fb01 f303 mul.w r3, r1, r3
800a7e8: 1ad3 subs r3, r2, r3
800a7ea: 2b00 cmp r3, #0
800a7ec: d110 bne.n 800a810 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
800a7ee: 78fa ldrb r2, [r7, #3]
800a7f0: 6879 ldr r1, [r7, #4]
800a7f2: 4613 mov r3, r2
800a7f4: 009b lsls r3, r3, #2
800a7f6: 4413 add r3, r2
800a7f8: 009b lsls r3, r3, #2
800a7fa: 440b add r3, r1
800a7fc: 331c adds r3, #28
800a7fe: 2200 movs r2, #0
800a800: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800a802: 78f9 ldrb r1, [r7, #3]
800a804: 2300 movs r3, #0
800a806: 2200 movs r2, #0
800a808: 6878 ldr r0, [r7, #4]
800a80a: f001 fe45 bl 800c498 <USBD_LL_Transmit>
800a80e: e003 b.n 800a818 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
800a810: 68fb ldr r3, [r7, #12]
800a812: 2200 movs r2, #0
800a814: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800a818: 2300 movs r3, #0
800a81a: e000 b.n 800a81e <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
800a81c: 2302 movs r3, #2
}
}
800a81e: 4618 mov r0, r3
800a820: 3710 adds r7, #16
800a822: 46bd mov sp, r7
800a824: bd80 pop {r7, pc}
0800a826 <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800a826: b580 push {r7, lr}
800a828: b084 sub sp, #16
800a82a: af00 add r7, sp, #0
800a82c: 6078 str r0, [r7, #4]
800a82e: 460b mov r3, r1
800a830: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800a832: 687b ldr r3, [r7, #4]
800a834: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a838: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800a83a: 78fb ldrb r3, [r7, #3]
800a83c: 4619 mov r1, r3
800a83e: 6878 ldr r0, [r7, #4]
800a840: f001 fe70 bl 800c524 <USBD_LL_GetRxDataSize>
800a844: 4602 mov r2, r0
800a846: 68fb ldr r3, [r7, #12]
800a848: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
800a84c: 687b ldr r3, [r7, #4]
800a84e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a852: 2b00 cmp r3, #0
800a854: d00d beq.n 800a872 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800a856: 687b ldr r3, [r7, #4]
800a858: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800a85c: 68db ldr r3, [r3, #12]
800a85e: 68fa ldr r2, [r7, #12]
800a860: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800a864: 68fa ldr r2, [r7, #12]
800a866: f502 7203 add.w r2, r2, #524 @ 0x20c
800a86a: 4611 mov r1, r2
800a86c: 4798 blx r3
return USBD_OK;
800a86e: 2300 movs r3, #0
800a870: e000 b.n 800a874 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800a872: 2302 movs r3, #2
}
}
800a874: 4618 mov r0, r3
800a876: 3710 adds r7, #16
800a878: 46bd mov sp, r7
800a87a: bd80 pop {r7, pc}
0800a87c <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
800a87c: b580 push {r7, lr}
800a87e: b084 sub sp, #16
800a880: af00 add r7, sp, #0
800a882: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800a884: 687b ldr r3, [r7, #4]
800a886: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a88a: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
800a88c: 687b ldr r3, [r7, #4]
800a88e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800a892: 2b00 cmp r3, #0
800a894: d014 beq.n 800a8c0 <USBD_CDC_EP0_RxReady+0x44>
800a896: 68fb ldr r3, [r7, #12]
800a898: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
800a89c: 2bff cmp r3, #255 @ 0xff
800a89e: d00f beq.n 800a8c0 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800a8a0: 687b ldr r3, [r7, #4]
800a8a2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800a8a6: 689b ldr r3, [r3, #8]
800a8a8: 68fa ldr r2, [r7, #12]
800a8aa: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800a8ae: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800a8b0: 68fa ldr r2, [r7, #12]
800a8b2: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800a8b6: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
800a8b8: 68fb ldr r3, [r7, #12]
800a8ba: 22ff movs r2, #255 @ 0xff
800a8bc: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
800a8c0: 2300 movs r3, #0
}
800a8c2: 4618 mov r0, r3
800a8c4: 3710 adds r7, #16
800a8c6: 46bd mov sp, r7
800a8c8: bd80 pop {r7, pc}
...
0800a8cc <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
800a8cc: b480 push {r7}
800a8ce: b083 sub sp, #12
800a8d0: af00 add r7, sp, #0
800a8d2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800a8d4: 687b ldr r3, [r7, #4]
800a8d6: 2243 movs r2, #67 @ 0x43
800a8d8: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
800a8da: 4b03 ldr r3, [pc, #12] @ (800a8e8 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
800a8dc: 4618 mov r0, r3
800a8de: 370c adds r7, #12
800a8e0: 46bd mov sp, r7
800a8e2: bc80 pop {r7}
800a8e4: 4770 bx lr
800a8e6: bf00 nop
800a8e8: 2000009c .word 0x2000009c
0800a8ec <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
800a8ec: b480 push {r7}
800a8ee: b083 sub sp, #12
800a8f0: af00 add r7, sp, #0
800a8f2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800a8f4: 687b ldr r3, [r7, #4]
800a8f6: 2243 movs r2, #67 @ 0x43
800a8f8: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
800a8fa: 4b03 ldr r3, [pc, #12] @ (800a908 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
800a8fc: 4618 mov r0, r3
800a8fe: 370c adds r7, #12
800a900: 46bd mov sp, r7
800a902: bc80 pop {r7}
800a904: 4770 bx lr
800a906: bf00 nop
800a908: 20000058 .word 0x20000058
0800a90c <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
800a90c: b480 push {r7}
800a90e: b083 sub sp, #12
800a910: af00 add r7, sp, #0
800a912: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800a914: 687b ldr r3, [r7, #4]
800a916: 2243 movs r2, #67 @ 0x43
800a918: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
800a91a: 4b03 ldr r3, [pc, #12] @ (800a928 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
800a91c: 4618 mov r0, r3
800a91e: 370c adds r7, #12
800a920: 46bd mov sp, r7
800a922: bc80 pop {r7}
800a924: 4770 bx lr
800a926: bf00 nop
800a928: 200000e0 .word 0x200000e0
0800a92c <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
800a92c: b480 push {r7}
800a92e: b083 sub sp, #12
800a930: af00 add r7, sp, #0
800a932: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800a934: 687b ldr r3, [r7, #4]
800a936: 220a movs r2, #10
800a938: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
800a93a: 4b03 ldr r3, [pc, #12] @ (800a948 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
800a93c: 4618 mov r0, r3
800a93e: 370c adds r7, #12
800a940: 46bd mov sp, r7
800a942: bc80 pop {r7}
800a944: 4770 bx lr
800a946: bf00 nop
800a948: 20000014 .word 0x20000014
0800a94c <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
800a94c: b480 push {r7}
800a94e: b085 sub sp, #20
800a950: af00 add r7, sp, #0
800a952: 6078 str r0, [r7, #4]
800a954: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800a956: 2302 movs r3, #2
800a958: 73fb strb r3, [r7, #15]
if (fops != NULL)
800a95a: 683b ldr r3, [r7, #0]
800a95c: 2b00 cmp r3, #0
800a95e: d005 beq.n 800a96c <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800a960: 687b ldr r3, [r7, #4]
800a962: 683a ldr r2, [r7, #0]
800a964: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
800a968: 2300 movs r3, #0
800a96a: 73fb strb r3, [r7, #15]
}
return ret;
800a96c: 7bfb ldrb r3, [r7, #15]
}
800a96e: 4618 mov r0, r3
800a970: 3714 adds r7, #20
800a972: 46bd mov sp, r7
800a974: bc80 pop {r7}
800a976: 4770 bx lr
0800a978 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
800a978: b480 push {r7}
800a97a: b087 sub sp, #28
800a97c: af00 add r7, sp, #0
800a97e: 60f8 str r0, [r7, #12]
800a980: 60b9 str r1, [r7, #8]
800a982: 4613 mov r3, r2
800a984: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800a986: 68fb ldr r3, [r7, #12]
800a988: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a98c: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800a98e: 697b ldr r3, [r7, #20]
800a990: 68ba ldr r2, [r7, #8]
800a992: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800a996: 88fa ldrh r2, [r7, #6]
800a998: 697b ldr r3, [r7, #20]
800a99a: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800a99e: 2300 movs r3, #0
}
800a9a0: 4618 mov r0, r3
800a9a2: 371c adds r7, #28
800a9a4: 46bd mov sp, r7
800a9a6: bc80 pop {r7}
800a9a8: 4770 bx lr
0800a9aa <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
800a9aa: b480 push {r7}
800a9ac: b085 sub sp, #20
800a9ae: af00 add r7, sp, #0
800a9b0: 6078 str r0, [r7, #4]
800a9b2: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800a9b4: 687b ldr r3, [r7, #4]
800a9b6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a9ba: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
800a9bc: 68fb ldr r3, [r7, #12]
800a9be: 683a ldr r2, [r7, #0]
800a9c0: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800a9c4: 2300 movs r3, #0
}
800a9c6: 4618 mov r0, r3
800a9c8: 3714 adds r7, #20
800a9ca: 46bd mov sp, r7
800a9cc: bc80 pop {r7}
800a9ce: 4770 bx lr
0800a9d0 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
800a9d0: b580 push {r7, lr}
800a9d2: b084 sub sp, #16
800a9d4: af00 add r7, sp, #0
800a9d6: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800a9d8: 687b ldr r3, [r7, #4]
800a9da: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a9de: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
800a9e0: 687b ldr r3, [r7, #4]
800a9e2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800a9e6: 2b00 cmp r3, #0
800a9e8: d01c beq.n 800aa24 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
800a9ea: 68fb ldr r3, [r7, #12]
800a9ec: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800a9f0: 2b00 cmp r3, #0
800a9f2: d115 bne.n 800aa20 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800a9f4: 68fb ldr r3, [r7, #12]
800a9f6: 2201 movs r2, #1
800a9f8: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
800a9fc: 68fb ldr r3, [r7, #12]
800a9fe: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800aa02: 687b ldr r3, [r7, #4]
800aa04: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800aa06: 68fb ldr r3, [r7, #12]
800aa08: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
800aa0c: 68fb ldr r3, [r7, #12]
800aa0e: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800aa12: b29b uxth r3, r3
800aa14: 2181 movs r1, #129 @ 0x81
800aa16: 6878 ldr r0, [r7, #4]
800aa18: f001 fd3e bl 800c498 <USBD_LL_Transmit>
return USBD_OK;
800aa1c: 2300 movs r3, #0
800aa1e: e002 b.n 800aa26 <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800aa20: 2301 movs r3, #1
800aa22: e000 b.n 800aa26 <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800aa24: 2302 movs r3, #2
}
}
800aa26: 4618 mov r0, r3
800aa28: 3710 adds r7, #16
800aa2a: 46bd mov sp, r7
800aa2c: bd80 pop {r7, pc}
0800aa2e <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800aa2e: b580 push {r7, lr}
800aa30: b084 sub sp, #16
800aa32: af00 add r7, sp, #0
800aa34: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800aa36: 687b ldr r3, [r7, #4]
800aa38: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800aa3c: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800aa3e: 687b ldr r3, [r7, #4]
800aa40: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800aa44: 2b00 cmp r3, #0
800aa46: d017 beq.n 800aa78 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
800aa48: 687b ldr r3, [r7, #4]
800aa4a: 7c1b ldrb r3, [r3, #16]
800aa4c: 2b00 cmp r3, #0
800aa4e: d109 bne.n 800aa64 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800aa50: 68fb ldr r3, [r7, #12]
800aa52: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800aa56: f44f 7300 mov.w r3, #512 @ 0x200
800aa5a: 2101 movs r1, #1
800aa5c: 6878 ldr r0, [r7, #4]
800aa5e: f001 fd3e bl 800c4de <USBD_LL_PrepareReceive>
800aa62: e007 b.n 800aa74 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800aa64: 68fb ldr r3, [r7, #12]
800aa66: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800aa6a: 2340 movs r3, #64 @ 0x40
800aa6c: 2101 movs r1, #1
800aa6e: 6878 ldr r0, [r7, #4]
800aa70: f001 fd35 bl 800c4de <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800aa74: 2300 movs r3, #0
800aa76: e000 b.n 800aa7a <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
800aa78: 2302 movs r3, #2
}
}
800aa7a: 4618 mov r0, r3
800aa7c: 3710 adds r7, #16
800aa7e: 46bd mov sp, r7
800aa80: bd80 pop {r7, pc}
0800aa82 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800aa82: b580 push {r7, lr}
800aa84: b084 sub sp, #16
800aa86: af00 add r7, sp, #0
800aa88: 60f8 str r0, [r7, #12]
800aa8a: 60b9 str r1, [r7, #8]
800aa8c: 4613 mov r3, r2
800aa8e: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800aa90: 68fb ldr r3, [r7, #12]
800aa92: 2b00 cmp r3, #0
800aa94: d101 bne.n 800aa9a <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
800aa96: 2302 movs r3, #2
800aa98: e01a b.n 800aad0 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
800aa9a: 68fb ldr r3, [r7, #12]
800aa9c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800aaa0: 2b00 cmp r3, #0
800aaa2: d003 beq.n 800aaac <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800aaa4: 68fb ldr r3, [r7, #12]
800aaa6: 2200 movs r2, #0
800aaa8: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
800aaac: 68bb ldr r3, [r7, #8]
800aaae: 2b00 cmp r3, #0
800aab0: d003 beq.n 800aaba <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800aab2: 68fb ldr r3, [r7, #12]
800aab4: 68ba ldr r2, [r7, #8]
800aab6: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800aaba: 68fb ldr r3, [r7, #12]
800aabc: 2201 movs r2, #1
800aabe: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800aac2: 68fb ldr r3, [r7, #12]
800aac4: 79fa ldrb r2, [r7, #7]
800aac6: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800aac8: 68f8 ldr r0, [r7, #12]
800aaca: f001 fba3 bl 800c214 <USBD_LL_Init>
return USBD_OK;
800aace: 2300 movs r3, #0
}
800aad0: 4618 mov r0, r3
800aad2: 3710 adds r7, #16
800aad4: 46bd mov sp, r7
800aad6: bd80 pop {r7, pc}
0800aad8 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800aad8: b480 push {r7}
800aada: b085 sub sp, #20
800aadc: af00 add r7, sp, #0
800aade: 6078 str r0, [r7, #4]
800aae0: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
800aae2: 2300 movs r3, #0
800aae4: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800aae6: 683b ldr r3, [r7, #0]
800aae8: 2b00 cmp r3, #0
800aaea: d006 beq.n 800aafa <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
800aaec: 687b ldr r3, [r7, #4]
800aaee: 683a ldr r2, [r7, #0]
800aaf0: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800aaf4: 2300 movs r3, #0
800aaf6: 73fb strb r3, [r7, #15]
800aaf8: e001 b.n 800aafe <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
800aafa: 2302 movs r3, #2
800aafc: 73fb strb r3, [r7, #15]
}
return status;
800aafe: 7bfb ldrb r3, [r7, #15]
}
800ab00: 4618 mov r0, r3
800ab02: 3714 adds r7, #20
800ab04: 46bd mov sp, r7
800ab06: bc80 pop {r7}
800ab08: 4770 bx lr
0800ab0a <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800ab0a: b580 push {r7, lr}
800ab0c: b082 sub sp, #8
800ab0e: af00 add r7, sp, #0
800ab10: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800ab12: 6878 ldr r0, [r7, #4]
800ab14: f001 fbd8 bl 800c2c8 <USBD_LL_Start>
return USBD_OK;
800ab18: 2300 movs r3, #0
}
800ab1a: 4618 mov r0, r3
800ab1c: 3708 adds r7, #8
800ab1e: 46bd mov sp, r7
800ab20: bd80 pop {r7, pc}
0800ab22 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800ab22: b480 push {r7}
800ab24: b083 sub sp, #12
800ab26: af00 add r7, sp, #0
800ab28: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800ab2a: 2300 movs r3, #0
}
800ab2c: 4618 mov r0, r3
800ab2e: 370c adds r7, #12
800ab30: 46bd mov sp, r7
800ab32: bc80 pop {r7}
800ab34: 4770 bx lr
0800ab36 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800ab36: b580 push {r7, lr}
800ab38: b084 sub sp, #16
800ab3a: af00 add r7, sp, #0
800ab3c: 6078 str r0, [r7, #4]
800ab3e: 460b mov r3, r1
800ab40: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800ab42: 2302 movs r3, #2
800ab44: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800ab46: 687b ldr r3, [r7, #4]
800ab48: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ab4c: 2b00 cmp r3, #0
800ab4e: d00c beq.n 800ab6a <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800ab50: 687b ldr r3, [r7, #4]
800ab52: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ab56: 681b ldr r3, [r3, #0]
800ab58: 78fa ldrb r2, [r7, #3]
800ab5a: 4611 mov r1, r2
800ab5c: 6878 ldr r0, [r7, #4]
800ab5e: 4798 blx r3
800ab60: 4603 mov r3, r0
800ab62: 2b00 cmp r3, #0
800ab64: d101 bne.n 800ab6a <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800ab66: 2300 movs r3, #0
800ab68: 73fb strb r3, [r7, #15]
}
}
return ret;
800ab6a: 7bfb ldrb r3, [r7, #15]
}
800ab6c: 4618 mov r0, r3
800ab6e: 3710 adds r7, #16
800ab70: 46bd mov sp, r7
800ab72: bd80 pop {r7, pc}
0800ab74 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800ab74: b580 push {r7, lr}
800ab76: b082 sub sp, #8
800ab78: af00 add r7, sp, #0
800ab7a: 6078 str r0, [r7, #4]
800ab7c: 460b mov r3, r1
800ab7e: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800ab80: 687b ldr r3, [r7, #4]
800ab82: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ab86: 685b ldr r3, [r3, #4]
800ab88: 78fa ldrb r2, [r7, #3]
800ab8a: 4611 mov r1, r2
800ab8c: 6878 ldr r0, [r7, #4]
800ab8e: 4798 blx r3
return USBD_OK;
800ab90: 2300 movs r3, #0
}
800ab92: 4618 mov r0, r3
800ab94: 3708 adds r7, #8
800ab96: 46bd mov sp, r7
800ab98: bd80 pop {r7, pc}
0800ab9a <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800ab9a: b580 push {r7, lr}
800ab9c: b082 sub sp, #8
800ab9e: af00 add r7, sp, #0
800aba0: 6078 str r0, [r7, #4]
800aba2: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
800aba4: 687b ldr r3, [r7, #4]
800aba6: f503 732a add.w r3, r3, #680 @ 0x2a8
800abaa: 6839 ldr r1, [r7, #0]
800abac: 4618 mov r0, r3
800abae: f000 fed8 bl 800b962 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800abb2: 687b ldr r3, [r7, #4]
800abb4: 2201 movs r2, #1
800abb6: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800abba: 687b ldr r3, [r7, #4]
800abbc: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800abc0: 461a mov r2, r3
800abc2: 687b ldr r3, [r7, #4]
800abc4: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800abc8: 687b ldr r3, [r7, #4]
800abca: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800abce: f003 031f and.w r3, r3, #31
800abd2: 2b02 cmp r3, #2
800abd4: d016 beq.n 800ac04 <USBD_LL_SetupStage+0x6a>
800abd6: 2b02 cmp r3, #2
800abd8: d81c bhi.n 800ac14 <USBD_LL_SetupStage+0x7a>
800abda: 2b00 cmp r3, #0
800abdc: d002 beq.n 800abe4 <USBD_LL_SetupStage+0x4a>
800abde: 2b01 cmp r3, #1
800abe0: d008 beq.n 800abf4 <USBD_LL_SetupStage+0x5a>
800abe2: e017 b.n 800ac14 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
800abe4: 687b ldr r3, [r7, #4]
800abe6: f503 732a add.w r3, r3, #680 @ 0x2a8
800abea: 4619 mov r1, r3
800abec: 6878 ldr r0, [r7, #4]
800abee: f000 f9cb bl 800af88 <USBD_StdDevReq>
break;
800abf2: e01a b.n 800ac2a <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800abf4: 687b ldr r3, [r7, #4]
800abf6: f503 732a add.w r3, r3, #680 @ 0x2a8
800abfa: 4619 mov r1, r3
800abfc: 6878 ldr r0, [r7, #4]
800abfe: f000 fa2d bl 800b05c <USBD_StdItfReq>
break;
800ac02: e012 b.n 800ac2a <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800ac04: 687b ldr r3, [r7, #4]
800ac06: f503 732a add.w r3, r3, #680 @ 0x2a8
800ac0a: 4619 mov r1, r3
800ac0c: 6878 ldr r0, [r7, #4]
800ac0e: f000 fa6d bl 800b0ec <USBD_StdEPReq>
break;
800ac12: e00a b.n 800ac2a <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800ac14: 687b ldr r3, [r7, #4]
800ac16: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800ac1a: f023 037f bic.w r3, r3, #127 @ 0x7f
800ac1e: b2db uxtb r3, r3
800ac20: 4619 mov r1, r3
800ac22: 6878 ldr r0, [r7, #4]
800ac24: f001 fbb0 bl 800c388 <USBD_LL_StallEP>
break;
800ac28: bf00 nop
}
return USBD_OK;
800ac2a: 2300 movs r3, #0
}
800ac2c: 4618 mov r0, r3
800ac2e: 3708 adds r7, #8
800ac30: 46bd mov sp, r7
800ac32: bd80 pop {r7, pc}
0800ac34 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800ac34: b580 push {r7, lr}
800ac36: b086 sub sp, #24
800ac38: af00 add r7, sp, #0
800ac3a: 60f8 str r0, [r7, #12]
800ac3c: 460b mov r3, r1
800ac3e: 607a str r2, [r7, #4]
800ac40: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800ac42: 7afb ldrb r3, [r7, #11]
800ac44: 2b00 cmp r3, #0
800ac46: d14b bne.n 800ace0 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800ac48: 68fb ldr r3, [r7, #12]
800ac4a: f503 73aa add.w r3, r3, #340 @ 0x154
800ac4e: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800ac50: 68fb ldr r3, [r7, #12]
800ac52: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800ac56: 2b03 cmp r3, #3
800ac58: d134 bne.n 800acc4 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800ac5a: 697b ldr r3, [r7, #20]
800ac5c: 68da ldr r2, [r3, #12]
800ac5e: 697b ldr r3, [r7, #20]
800ac60: 691b ldr r3, [r3, #16]
800ac62: 429a cmp r2, r3
800ac64: d919 bls.n 800ac9a <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800ac66: 697b ldr r3, [r7, #20]
800ac68: 68da ldr r2, [r3, #12]
800ac6a: 697b ldr r3, [r7, #20]
800ac6c: 691b ldr r3, [r3, #16]
800ac6e: 1ad2 subs r2, r2, r3
800ac70: 697b ldr r3, [r7, #20]
800ac72: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800ac74: 697b ldr r3, [r7, #20]
800ac76: 68da ldr r2, [r3, #12]
800ac78: 697b ldr r3, [r7, #20]
800ac7a: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800ac7c: 429a cmp r2, r3
800ac7e: d203 bcs.n 800ac88 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800ac80: 697b ldr r3, [r7, #20]
800ac82: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800ac84: b29b uxth r3, r3
800ac86: e002 b.n 800ac8e <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800ac88: 697b ldr r3, [r7, #20]
800ac8a: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800ac8c: b29b uxth r3, r3
800ac8e: 461a mov r2, r3
800ac90: 6879 ldr r1, [r7, #4]
800ac92: 68f8 ldr r0, [r7, #12]
800ac94: f000 ff54 bl 800bb40 <USBD_CtlContinueRx>
800ac98: e038 b.n 800ad0c <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800ac9a: 68fb ldr r3, [r7, #12]
800ac9c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800aca0: 691b ldr r3, [r3, #16]
800aca2: 2b00 cmp r3, #0
800aca4: d00a beq.n 800acbc <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800aca6: 68fb ldr r3, [r7, #12]
800aca8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800acac: 2b03 cmp r3, #3
800acae: d105 bne.n 800acbc <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800acb0: 68fb ldr r3, [r7, #12]
800acb2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800acb6: 691b ldr r3, [r3, #16]
800acb8: 68f8 ldr r0, [r7, #12]
800acba: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800acbc: 68f8 ldr r0, [r7, #12]
800acbe: f000 ff51 bl 800bb64 <USBD_CtlSendStatus>
800acc2: e023 b.n 800ad0c <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
800acc4: 68fb ldr r3, [r7, #12]
800acc6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800acca: 2b05 cmp r3, #5
800accc: d11e bne.n 800ad0c <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
800acce: 68fb ldr r3, [r7, #12]
800acd0: 2200 movs r2, #0
800acd2: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
800acd6: 2100 movs r1, #0
800acd8: 68f8 ldr r0, [r7, #12]
800acda: f001 fb55 bl 800c388 <USBD_LL_StallEP>
800acde: e015 b.n 800ad0c <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
800ace0: 68fb ldr r3, [r7, #12]
800ace2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ace6: 699b ldr r3, [r3, #24]
800ace8: 2b00 cmp r3, #0
800acea: d00d beq.n 800ad08 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800acec: 68fb ldr r3, [r7, #12]
800acee: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800acf2: 2b03 cmp r3, #3
800acf4: d108 bne.n 800ad08 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800acf6: 68fb ldr r3, [r7, #12]
800acf8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800acfc: 699b ldr r3, [r3, #24]
800acfe: 7afa ldrb r2, [r7, #11]
800ad00: 4611 mov r1, r2
800ad02: 68f8 ldr r0, [r7, #12]
800ad04: 4798 blx r3
800ad06: e001 b.n 800ad0c <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800ad08: 2302 movs r3, #2
800ad0a: e000 b.n 800ad0e <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800ad0c: 2300 movs r3, #0
}
800ad0e: 4618 mov r0, r3
800ad10: 3718 adds r7, #24
800ad12: 46bd mov sp, r7
800ad14: bd80 pop {r7, pc}
0800ad16 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800ad16: b580 push {r7, lr}
800ad18: b086 sub sp, #24
800ad1a: af00 add r7, sp, #0
800ad1c: 60f8 str r0, [r7, #12]
800ad1e: 460b mov r3, r1
800ad20: 607a str r2, [r7, #4]
800ad22: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800ad24: 7afb ldrb r3, [r7, #11]
800ad26: 2b00 cmp r3, #0
800ad28: d17f bne.n 800ae2a <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800ad2a: 68fb ldr r3, [r7, #12]
800ad2c: 3314 adds r3, #20
800ad2e: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800ad30: 68fb ldr r3, [r7, #12]
800ad32: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800ad36: 2b02 cmp r3, #2
800ad38: d15c bne.n 800adf4 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800ad3a: 697b ldr r3, [r7, #20]
800ad3c: 68da ldr r2, [r3, #12]
800ad3e: 697b ldr r3, [r7, #20]
800ad40: 691b ldr r3, [r3, #16]
800ad42: 429a cmp r2, r3
800ad44: d915 bls.n 800ad72 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800ad46: 697b ldr r3, [r7, #20]
800ad48: 68da ldr r2, [r3, #12]
800ad4a: 697b ldr r3, [r7, #20]
800ad4c: 691b ldr r3, [r3, #16]
800ad4e: 1ad2 subs r2, r2, r3
800ad50: 697b ldr r3, [r7, #20]
800ad52: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800ad54: 697b ldr r3, [r7, #20]
800ad56: 68db ldr r3, [r3, #12]
800ad58: b29b uxth r3, r3
800ad5a: 461a mov r2, r3
800ad5c: 6879 ldr r1, [r7, #4]
800ad5e: 68f8 ldr r0, [r7, #12]
800ad60: f000 febe bl 800bae0 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800ad64: 2300 movs r3, #0
800ad66: 2200 movs r2, #0
800ad68: 2100 movs r1, #0
800ad6a: 68f8 ldr r0, [r7, #12]
800ad6c: f001 fbb7 bl 800c4de <USBD_LL_PrepareReceive>
800ad70: e04e b.n 800ae10 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800ad72: 697b ldr r3, [r7, #20]
800ad74: 689b ldr r3, [r3, #8]
800ad76: 697a ldr r2, [r7, #20]
800ad78: 6912 ldr r2, [r2, #16]
800ad7a: fbb3 f1f2 udiv r1, r3, r2
800ad7e: fb01 f202 mul.w r2, r1, r2
800ad82: 1a9b subs r3, r3, r2
800ad84: 2b00 cmp r3, #0
800ad86: d11c bne.n 800adc2 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800ad88: 697b ldr r3, [r7, #20]
800ad8a: 689a ldr r2, [r3, #8]
800ad8c: 697b ldr r3, [r7, #20]
800ad8e: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800ad90: 429a cmp r2, r3
800ad92: d316 bcc.n 800adc2 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
800ad94: 697b ldr r3, [r7, #20]
800ad96: 689a ldr r2, [r3, #8]
800ad98: 68fb ldr r3, [r7, #12]
800ad9a: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800ad9e: 429a cmp r2, r3
800ada0: d20f bcs.n 800adc2 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800ada2: 2200 movs r2, #0
800ada4: 2100 movs r1, #0
800ada6: 68f8 ldr r0, [r7, #12]
800ada8: f000 fe9a bl 800bae0 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800adac: 68fb ldr r3, [r7, #12]
800adae: 2200 movs r2, #0
800adb0: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800adb4: 2300 movs r3, #0
800adb6: 2200 movs r2, #0
800adb8: 2100 movs r1, #0
800adba: 68f8 ldr r0, [r7, #12]
800adbc: f001 fb8f bl 800c4de <USBD_LL_PrepareReceive>
800adc0: e026 b.n 800ae10 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
800adc2: 68fb ldr r3, [r7, #12]
800adc4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800adc8: 68db ldr r3, [r3, #12]
800adca: 2b00 cmp r3, #0
800adcc: d00a beq.n 800ade4 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800adce: 68fb ldr r3, [r7, #12]
800add0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
800add4: 2b03 cmp r3, #3
800add6: d105 bne.n 800ade4 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800add8: 68fb ldr r3, [r7, #12]
800adda: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800adde: 68db ldr r3, [r3, #12]
800ade0: 68f8 ldr r0, [r7, #12]
800ade2: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
800ade4: 2180 movs r1, #128 @ 0x80
800ade6: 68f8 ldr r0, [r7, #12]
800ade8: f001 face bl 800c388 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800adec: 68f8 ldr r0, [r7, #12]
800adee: f000 fecc bl 800bb8a <USBD_CtlReceiveStatus>
800adf2: e00d b.n 800ae10 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800adf4: 68fb ldr r3, [r7, #12]
800adf6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800adfa: 2b04 cmp r3, #4
800adfc: d004 beq.n 800ae08 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800adfe: 68fb ldr r3, [r7, #12]
800ae00: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800ae04: 2b00 cmp r3, #0
800ae06: d103 bne.n 800ae10 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800ae08: 2180 movs r1, #128 @ 0x80
800ae0a: 68f8 ldr r0, [r7, #12]
800ae0c: f001 fabc bl 800c388 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
800ae10: 68fb ldr r3, [r7, #12]
800ae12: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800ae16: 2b01 cmp r3, #1
800ae18: d11d bne.n 800ae56 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800ae1a: 68f8 ldr r0, [r7, #12]
800ae1c: f7ff fe81 bl 800ab22 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800ae20: 68fb ldr r3, [r7, #12]
800ae22: 2200 movs r2, #0
800ae24: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800ae28: e015 b.n 800ae56 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800ae2a: 68fb ldr r3, [r7, #12]
800ae2c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ae30: 695b ldr r3, [r3, #20]
800ae32: 2b00 cmp r3, #0
800ae34: d00d beq.n 800ae52 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800ae36: 68fb ldr r3, [r7, #12]
800ae38: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800ae3c: 2b03 cmp r3, #3
800ae3e: d108 bne.n 800ae52 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800ae40: 68fb ldr r3, [r7, #12]
800ae42: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ae46: 695b ldr r3, [r3, #20]
800ae48: 7afa ldrb r2, [r7, #11]
800ae4a: 4611 mov r1, r2
800ae4c: 68f8 ldr r0, [r7, #12]
800ae4e: 4798 blx r3
800ae50: e001 b.n 800ae56 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800ae52: 2302 movs r3, #2
800ae54: e000 b.n 800ae58 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800ae56: 2300 movs r3, #0
}
800ae58: 4618 mov r0, r3
800ae5a: 3718 adds r7, #24
800ae5c: 46bd mov sp, r7
800ae5e: bd80 pop {r7, pc}
0800ae60 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800ae60: b580 push {r7, lr}
800ae62: b082 sub sp, #8
800ae64: af00 add r7, sp, #0
800ae66: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800ae68: 2340 movs r3, #64 @ 0x40
800ae6a: 2200 movs r2, #0
800ae6c: 2100 movs r1, #0
800ae6e: 6878 ldr r0, [r7, #4]
800ae70: f001 fa45 bl 800c2fe <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800ae74: 687b ldr r3, [r7, #4]
800ae76: 2201 movs r2, #1
800ae78: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800ae7c: 687b ldr r3, [r7, #4]
800ae7e: 2240 movs r2, #64 @ 0x40
800ae80: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800ae84: 2340 movs r3, #64 @ 0x40
800ae86: 2200 movs r2, #0
800ae88: 2180 movs r1, #128 @ 0x80
800ae8a: 6878 ldr r0, [r7, #4]
800ae8c: f001 fa37 bl 800c2fe <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800ae90: 687b ldr r3, [r7, #4]
800ae92: 2201 movs r2, #1
800ae94: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800ae96: 687b ldr r3, [r7, #4]
800ae98: 2240 movs r2, #64 @ 0x40
800ae9a: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800ae9c: 687b ldr r3, [r7, #4]
800ae9e: 2201 movs r2, #1
800aea0: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800aea4: 687b ldr r3, [r7, #4]
800aea6: 2200 movs r2, #0
800aea8: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800aeac: 687b ldr r3, [r7, #4]
800aeae: 2200 movs r2, #0
800aeb0: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800aeb2: 687b ldr r3, [r7, #4]
800aeb4: 2200 movs r2, #0
800aeb6: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
800aeba: 687b ldr r3, [r7, #4]
800aebc: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800aec0: 2b00 cmp r3, #0
800aec2: d009 beq.n 800aed8 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
800aec4: 687b ldr r3, [r7, #4]
800aec6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800aeca: 685b ldr r3, [r3, #4]
800aecc: 687a ldr r2, [r7, #4]
800aece: 6852 ldr r2, [r2, #4]
800aed0: b2d2 uxtb r2, r2
800aed2: 4611 mov r1, r2
800aed4: 6878 ldr r0, [r7, #4]
800aed6: 4798 blx r3
}
return USBD_OK;
800aed8: 2300 movs r3, #0
}
800aeda: 4618 mov r0, r3
800aedc: 3708 adds r7, #8
800aede: 46bd mov sp, r7
800aee0: bd80 pop {r7, pc}
0800aee2 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800aee2: b480 push {r7}
800aee4: b083 sub sp, #12
800aee6: af00 add r7, sp, #0
800aee8: 6078 str r0, [r7, #4]
800aeea: 460b mov r3, r1
800aeec: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800aeee: 687b ldr r3, [r7, #4]
800aef0: 78fa ldrb r2, [r7, #3]
800aef2: 741a strb r2, [r3, #16]
return USBD_OK;
800aef4: 2300 movs r3, #0
}
800aef6: 4618 mov r0, r3
800aef8: 370c adds r7, #12
800aefa: 46bd mov sp, r7
800aefc: bc80 pop {r7}
800aefe: 4770 bx lr
0800af00 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800af00: b480 push {r7}
800af02: b083 sub sp, #12
800af04: af00 add r7, sp, #0
800af06: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800af08: 687b ldr r3, [r7, #4]
800af0a: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800af0e: 687b ldr r3, [r7, #4]
800af10: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800af14: 687b ldr r3, [r7, #4]
800af16: 2204 movs r2, #4
800af18: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800af1c: 2300 movs r3, #0
}
800af1e: 4618 mov r0, r3
800af20: 370c adds r7, #12
800af22: 46bd mov sp, r7
800af24: bc80 pop {r7}
800af26: 4770 bx lr
0800af28 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800af28: b480 push {r7}
800af2a: b083 sub sp, #12
800af2c: af00 add r7, sp, #0
800af2e: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800af30: 687b ldr r3, [r7, #4]
800af32: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800af36: 2b04 cmp r3, #4
800af38: d105 bne.n 800af46 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800af3a: 687b ldr r3, [r7, #4]
800af3c: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
800af40: 687b ldr r3, [r7, #4]
800af42: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800af46: 2300 movs r3, #0
}
800af48: 4618 mov r0, r3
800af4a: 370c adds r7, #12
800af4c: 46bd mov sp, r7
800af4e: bc80 pop {r7}
800af50: 4770 bx lr
0800af52 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800af52: b580 push {r7, lr}
800af54: b082 sub sp, #8
800af56: af00 add r7, sp, #0
800af58: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800af5a: 687b ldr r3, [r7, #4]
800af5c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800af60: 2b03 cmp r3, #3
800af62: d10b bne.n 800af7c <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800af64: 687b ldr r3, [r7, #4]
800af66: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800af6a: 69db ldr r3, [r3, #28]
800af6c: 2b00 cmp r3, #0
800af6e: d005 beq.n 800af7c <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800af70: 687b ldr r3, [r7, #4]
800af72: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800af76: 69db ldr r3, [r3, #28]
800af78: 6878 ldr r0, [r7, #4]
800af7a: 4798 blx r3
}
}
return USBD_OK;
800af7c: 2300 movs r3, #0
}
800af7e: 4618 mov r0, r3
800af80: 3708 adds r7, #8
800af82: 46bd mov sp, r7
800af84: bd80 pop {r7, pc}
...
0800af88 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800af88: b580 push {r7, lr}
800af8a: b084 sub sp, #16
800af8c: af00 add r7, sp, #0
800af8e: 6078 str r0, [r7, #4]
800af90: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800af92: 2300 movs r3, #0
800af94: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800af96: 683b ldr r3, [r7, #0]
800af98: 781b ldrb r3, [r3, #0]
800af9a: f003 0360 and.w r3, r3, #96 @ 0x60
800af9e: 2b40 cmp r3, #64 @ 0x40
800afa0: d005 beq.n 800afae <USBD_StdDevReq+0x26>
800afa2: 2b40 cmp r3, #64 @ 0x40
800afa4: d84f bhi.n 800b046 <USBD_StdDevReq+0xbe>
800afa6: 2b00 cmp r3, #0
800afa8: d009 beq.n 800afbe <USBD_StdDevReq+0x36>
800afaa: 2b20 cmp r3, #32
800afac: d14b bne.n 800b046 <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800afae: 687b ldr r3, [r7, #4]
800afb0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800afb4: 689b ldr r3, [r3, #8]
800afb6: 6839 ldr r1, [r7, #0]
800afb8: 6878 ldr r0, [r7, #4]
800afba: 4798 blx r3
break;
800afbc: e048 b.n 800b050 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800afbe: 683b ldr r3, [r7, #0]
800afc0: 785b ldrb r3, [r3, #1]
800afc2: 2b09 cmp r3, #9
800afc4: d839 bhi.n 800b03a <USBD_StdDevReq+0xb2>
800afc6: a201 add r2, pc, #4 @ (adr r2, 800afcc <USBD_StdDevReq+0x44>)
800afc8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800afcc: 0800b01d .word 0x0800b01d
800afd0: 0800b031 .word 0x0800b031
800afd4: 0800b03b .word 0x0800b03b
800afd8: 0800b027 .word 0x0800b027
800afdc: 0800b03b .word 0x0800b03b
800afe0: 0800afff .word 0x0800afff
800afe4: 0800aff5 .word 0x0800aff5
800afe8: 0800b03b .word 0x0800b03b
800afec: 0800b013 .word 0x0800b013
800aff0: 0800b009 .word 0x0800b009
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800aff4: 6839 ldr r1, [r7, #0]
800aff6: 6878 ldr r0, [r7, #4]
800aff8: f000 f9dc bl 800b3b4 <USBD_GetDescriptor>
break;
800affc: e022 b.n 800b044 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800affe: 6839 ldr r1, [r7, #0]
800b000: 6878 ldr r0, [r7, #4]
800b002: f000 fb3f bl 800b684 <USBD_SetAddress>
break;
800b006: e01d b.n 800b044 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
800b008: 6839 ldr r1, [r7, #0]
800b00a: 6878 ldr r0, [r7, #4]
800b00c: f000 fb7e bl 800b70c <USBD_SetConfig>
break;
800b010: e018 b.n 800b044 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800b012: 6839 ldr r1, [r7, #0]
800b014: 6878 ldr r0, [r7, #4]
800b016: f000 fc07 bl 800b828 <USBD_GetConfig>
break;
800b01a: e013 b.n 800b044 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800b01c: 6839 ldr r1, [r7, #0]
800b01e: 6878 ldr r0, [r7, #4]
800b020: f000 fc37 bl 800b892 <USBD_GetStatus>
break;
800b024: e00e b.n 800b044 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800b026: 6839 ldr r1, [r7, #0]
800b028: 6878 ldr r0, [r7, #4]
800b02a: f000 fc65 bl 800b8f8 <USBD_SetFeature>
break;
800b02e: e009 b.n 800b044 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800b030: 6839 ldr r1, [r7, #0]
800b032: 6878 ldr r0, [r7, #4]
800b034: f000 fc74 bl 800b920 <USBD_ClrFeature>
break;
800b038: e004 b.n 800b044 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800b03a: 6839 ldr r1, [r7, #0]
800b03c: 6878 ldr r0, [r7, #4]
800b03e: f000 fcc9 bl 800b9d4 <USBD_CtlError>
break;
800b042: bf00 nop
}
break;
800b044: e004 b.n 800b050 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800b046: 6839 ldr r1, [r7, #0]
800b048: 6878 ldr r0, [r7, #4]
800b04a: f000 fcc3 bl 800b9d4 <USBD_CtlError>
break;
800b04e: bf00 nop
}
return ret;
800b050: 7bfb ldrb r3, [r7, #15]
}
800b052: 4618 mov r0, r3
800b054: 3710 adds r7, #16
800b056: 46bd mov sp, r7
800b058: bd80 pop {r7, pc}
800b05a: bf00 nop
0800b05c <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800b05c: b580 push {r7, lr}
800b05e: b084 sub sp, #16
800b060: af00 add r7, sp, #0
800b062: 6078 str r0, [r7, #4]
800b064: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800b066: 2300 movs r3, #0
800b068: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800b06a: 683b ldr r3, [r7, #0]
800b06c: 781b ldrb r3, [r3, #0]
800b06e: f003 0360 and.w r3, r3, #96 @ 0x60
800b072: 2b40 cmp r3, #64 @ 0x40
800b074: d005 beq.n 800b082 <USBD_StdItfReq+0x26>
800b076: 2b40 cmp r3, #64 @ 0x40
800b078: d82e bhi.n 800b0d8 <USBD_StdItfReq+0x7c>
800b07a: 2b00 cmp r3, #0
800b07c: d001 beq.n 800b082 <USBD_StdItfReq+0x26>
800b07e: 2b20 cmp r3, #32
800b080: d12a bne.n 800b0d8 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800b082: 687b ldr r3, [r7, #4]
800b084: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b088: 3b01 subs r3, #1
800b08a: 2b02 cmp r3, #2
800b08c: d81d bhi.n 800b0ca <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800b08e: 683b ldr r3, [r7, #0]
800b090: 889b ldrh r3, [r3, #4]
800b092: b2db uxtb r3, r3
800b094: 2b01 cmp r3, #1
800b096: d813 bhi.n 800b0c0 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800b098: 687b ldr r3, [r7, #4]
800b09a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800b09e: 689b ldr r3, [r3, #8]
800b0a0: 6839 ldr r1, [r7, #0]
800b0a2: 6878 ldr r0, [r7, #4]
800b0a4: 4798 blx r3
800b0a6: 4603 mov r3, r0
800b0a8: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800b0aa: 683b ldr r3, [r7, #0]
800b0ac: 88db ldrh r3, [r3, #6]
800b0ae: 2b00 cmp r3, #0
800b0b0: d110 bne.n 800b0d4 <USBD_StdItfReq+0x78>
800b0b2: 7bfb ldrb r3, [r7, #15]
800b0b4: 2b00 cmp r3, #0
800b0b6: d10d bne.n 800b0d4 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
800b0b8: 6878 ldr r0, [r7, #4]
800b0ba: f000 fd53 bl 800bb64 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800b0be: e009 b.n 800b0d4 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
800b0c0: 6839 ldr r1, [r7, #0]
800b0c2: 6878 ldr r0, [r7, #4]
800b0c4: f000 fc86 bl 800b9d4 <USBD_CtlError>
break;
800b0c8: e004 b.n 800b0d4 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
800b0ca: 6839 ldr r1, [r7, #0]
800b0cc: 6878 ldr r0, [r7, #4]
800b0ce: f000 fc81 bl 800b9d4 <USBD_CtlError>
break;
800b0d2: e000 b.n 800b0d6 <USBD_StdItfReq+0x7a>
break;
800b0d4: bf00 nop
}
break;
800b0d6: e004 b.n 800b0e2 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
800b0d8: 6839 ldr r1, [r7, #0]
800b0da: 6878 ldr r0, [r7, #4]
800b0dc: f000 fc7a bl 800b9d4 <USBD_CtlError>
break;
800b0e0: bf00 nop
}
return USBD_OK;
800b0e2: 2300 movs r3, #0
}
800b0e4: 4618 mov r0, r3
800b0e6: 3710 adds r7, #16
800b0e8: 46bd mov sp, r7
800b0ea: bd80 pop {r7, pc}
0800b0ec <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800b0ec: b580 push {r7, lr}
800b0ee: b084 sub sp, #16
800b0f0: af00 add r7, sp, #0
800b0f2: 6078 str r0, [r7, #4]
800b0f4: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
800b0f6: 2300 movs r3, #0
800b0f8: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800b0fa: 683b ldr r3, [r7, #0]
800b0fc: 889b ldrh r3, [r3, #4]
800b0fe: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800b100: 683b ldr r3, [r7, #0]
800b102: 781b ldrb r3, [r3, #0]
800b104: f003 0360 and.w r3, r3, #96 @ 0x60
800b108: 2b40 cmp r3, #64 @ 0x40
800b10a: d007 beq.n 800b11c <USBD_StdEPReq+0x30>
800b10c: 2b40 cmp r3, #64 @ 0x40
800b10e: f200 8146 bhi.w 800b39e <USBD_StdEPReq+0x2b2>
800b112: 2b00 cmp r3, #0
800b114: d00a beq.n 800b12c <USBD_StdEPReq+0x40>
800b116: 2b20 cmp r3, #32
800b118: f040 8141 bne.w 800b39e <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800b11c: 687b ldr r3, [r7, #4]
800b11e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800b122: 689b ldr r3, [r3, #8]
800b124: 6839 ldr r1, [r7, #0]
800b126: 6878 ldr r0, [r7, #4]
800b128: 4798 blx r3
break;
800b12a: e13d b.n 800b3a8 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800b12c: 683b ldr r3, [r7, #0]
800b12e: 781b ldrb r3, [r3, #0]
800b130: f003 0360 and.w r3, r3, #96 @ 0x60
800b134: 2b20 cmp r3, #32
800b136: d10a bne.n 800b14e <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800b138: 687b ldr r3, [r7, #4]
800b13a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800b13e: 689b ldr r3, [r3, #8]
800b140: 6839 ldr r1, [r7, #0]
800b142: 6878 ldr r0, [r7, #4]
800b144: 4798 blx r3
800b146: 4603 mov r3, r0
800b148: 73fb strb r3, [r7, #15]
return ret;
800b14a: 7bfb ldrb r3, [r7, #15]
800b14c: e12d b.n 800b3aa <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800b14e: 683b ldr r3, [r7, #0]
800b150: 785b ldrb r3, [r3, #1]
800b152: 2b03 cmp r3, #3
800b154: d007 beq.n 800b166 <USBD_StdEPReq+0x7a>
800b156: 2b03 cmp r3, #3
800b158: f300 811b bgt.w 800b392 <USBD_StdEPReq+0x2a6>
800b15c: 2b00 cmp r3, #0
800b15e: d072 beq.n 800b246 <USBD_StdEPReq+0x15a>
800b160: 2b01 cmp r3, #1
800b162: d03a beq.n 800b1da <USBD_StdEPReq+0xee>
800b164: e115 b.n 800b392 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800b166: 687b ldr r3, [r7, #4]
800b168: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b16c: 2b02 cmp r3, #2
800b16e: d002 beq.n 800b176 <USBD_StdEPReq+0x8a>
800b170: 2b03 cmp r3, #3
800b172: d015 beq.n 800b1a0 <USBD_StdEPReq+0xb4>
800b174: e02b b.n 800b1ce <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800b176: 7bbb ldrb r3, [r7, #14]
800b178: 2b00 cmp r3, #0
800b17a: d00c beq.n 800b196 <USBD_StdEPReq+0xaa>
800b17c: 7bbb ldrb r3, [r7, #14]
800b17e: 2b80 cmp r3, #128 @ 0x80
800b180: d009 beq.n 800b196 <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800b182: 7bbb ldrb r3, [r7, #14]
800b184: 4619 mov r1, r3
800b186: 6878 ldr r0, [r7, #4]
800b188: f001 f8fe bl 800c388 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800b18c: 2180 movs r1, #128 @ 0x80
800b18e: 6878 ldr r0, [r7, #4]
800b190: f001 f8fa bl 800c388 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800b194: e020 b.n 800b1d8 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800b196: 6839 ldr r1, [r7, #0]
800b198: 6878 ldr r0, [r7, #4]
800b19a: f000 fc1b bl 800b9d4 <USBD_CtlError>
break;
800b19e: e01b b.n 800b1d8 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800b1a0: 683b ldr r3, [r7, #0]
800b1a2: 885b ldrh r3, [r3, #2]
800b1a4: 2b00 cmp r3, #0
800b1a6: d10e bne.n 800b1c6 <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800b1a8: 7bbb ldrb r3, [r7, #14]
800b1aa: 2b00 cmp r3, #0
800b1ac: d00b beq.n 800b1c6 <USBD_StdEPReq+0xda>
800b1ae: 7bbb ldrb r3, [r7, #14]
800b1b0: 2b80 cmp r3, #128 @ 0x80
800b1b2: d008 beq.n 800b1c6 <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800b1b4: 683b ldr r3, [r7, #0]
800b1b6: 88db ldrh r3, [r3, #6]
800b1b8: 2b00 cmp r3, #0
800b1ba: d104 bne.n 800b1c6 <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
800b1bc: 7bbb ldrb r3, [r7, #14]
800b1be: 4619 mov r1, r3
800b1c0: 6878 ldr r0, [r7, #4]
800b1c2: f001 f8e1 bl 800c388 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800b1c6: 6878 ldr r0, [r7, #4]
800b1c8: f000 fccc bl 800bb64 <USBD_CtlSendStatus>
break;
800b1cc: e004 b.n 800b1d8 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
800b1ce: 6839 ldr r1, [r7, #0]
800b1d0: 6878 ldr r0, [r7, #4]
800b1d2: f000 fbff bl 800b9d4 <USBD_CtlError>
break;
800b1d6: bf00 nop
}
break;
800b1d8: e0e0 b.n 800b39c <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800b1da: 687b ldr r3, [r7, #4]
800b1dc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b1e0: 2b02 cmp r3, #2
800b1e2: d002 beq.n 800b1ea <USBD_StdEPReq+0xfe>
800b1e4: 2b03 cmp r3, #3
800b1e6: d015 beq.n 800b214 <USBD_StdEPReq+0x128>
800b1e8: e026 b.n 800b238 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800b1ea: 7bbb ldrb r3, [r7, #14]
800b1ec: 2b00 cmp r3, #0
800b1ee: d00c beq.n 800b20a <USBD_StdEPReq+0x11e>
800b1f0: 7bbb ldrb r3, [r7, #14]
800b1f2: 2b80 cmp r3, #128 @ 0x80
800b1f4: d009 beq.n 800b20a <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
800b1f6: 7bbb ldrb r3, [r7, #14]
800b1f8: 4619 mov r1, r3
800b1fa: 6878 ldr r0, [r7, #4]
800b1fc: f001 f8c4 bl 800c388 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800b200: 2180 movs r1, #128 @ 0x80
800b202: 6878 ldr r0, [r7, #4]
800b204: f001 f8c0 bl 800c388 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800b208: e01c b.n 800b244 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800b20a: 6839 ldr r1, [r7, #0]
800b20c: 6878 ldr r0, [r7, #4]
800b20e: f000 fbe1 bl 800b9d4 <USBD_CtlError>
break;
800b212: e017 b.n 800b244 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800b214: 683b ldr r3, [r7, #0]
800b216: 885b ldrh r3, [r3, #2]
800b218: 2b00 cmp r3, #0
800b21a: d112 bne.n 800b242 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800b21c: 7bbb ldrb r3, [r7, #14]
800b21e: f003 037f and.w r3, r3, #127 @ 0x7f
800b222: 2b00 cmp r3, #0
800b224: d004 beq.n 800b230 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800b226: 7bbb ldrb r3, [r7, #14]
800b228: 4619 mov r1, r3
800b22a: 6878 ldr r0, [r7, #4]
800b22c: f001 f8cb bl 800c3c6 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
800b230: 6878 ldr r0, [r7, #4]
800b232: f000 fc97 bl 800bb64 <USBD_CtlSendStatus>
}
break;
800b236: e004 b.n 800b242 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800b238: 6839 ldr r1, [r7, #0]
800b23a: 6878 ldr r0, [r7, #4]
800b23c: f000 fbca bl 800b9d4 <USBD_CtlError>
break;
800b240: e000 b.n 800b244 <USBD_StdEPReq+0x158>
break;
800b242: bf00 nop
}
break;
800b244: e0aa b.n 800b39c <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800b246: 687b ldr r3, [r7, #4]
800b248: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b24c: 2b02 cmp r3, #2
800b24e: d002 beq.n 800b256 <USBD_StdEPReq+0x16a>
800b250: 2b03 cmp r3, #3
800b252: d032 beq.n 800b2ba <USBD_StdEPReq+0x1ce>
800b254: e097 b.n 800b386 <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800b256: 7bbb ldrb r3, [r7, #14]
800b258: 2b00 cmp r3, #0
800b25a: d007 beq.n 800b26c <USBD_StdEPReq+0x180>
800b25c: 7bbb ldrb r3, [r7, #14]
800b25e: 2b80 cmp r3, #128 @ 0x80
800b260: d004 beq.n 800b26c <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800b262: 6839 ldr r1, [r7, #0]
800b264: 6878 ldr r0, [r7, #4]
800b266: f000 fbb5 bl 800b9d4 <USBD_CtlError>
break;
800b26a: e091 b.n 800b390 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800b26c: f997 300e ldrsb.w r3, [r7, #14]
800b270: 2b00 cmp r3, #0
800b272: da0b bge.n 800b28c <USBD_StdEPReq+0x1a0>
800b274: 7bbb ldrb r3, [r7, #14]
800b276: f003 027f and.w r2, r3, #127 @ 0x7f
800b27a: 4613 mov r3, r2
800b27c: 009b lsls r3, r3, #2
800b27e: 4413 add r3, r2
800b280: 009b lsls r3, r3, #2
800b282: 3310 adds r3, #16
800b284: 687a ldr r2, [r7, #4]
800b286: 4413 add r3, r2
800b288: 3304 adds r3, #4
800b28a: e00b b.n 800b2a4 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
800b28c: 7bbb ldrb r3, [r7, #14]
800b28e: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800b292: 4613 mov r3, r2
800b294: 009b lsls r3, r3, #2
800b296: 4413 add r3, r2
800b298: 009b lsls r3, r3, #2
800b29a: f503 73a8 add.w r3, r3, #336 @ 0x150
800b29e: 687a ldr r2, [r7, #4]
800b2a0: 4413 add r3, r2
800b2a2: 3304 adds r3, #4
800b2a4: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800b2a6: 68bb ldr r3, [r7, #8]
800b2a8: 2200 movs r2, #0
800b2aa: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800b2ac: 68bb ldr r3, [r7, #8]
800b2ae: 2202 movs r2, #2
800b2b0: 4619 mov r1, r3
800b2b2: 6878 ldr r0, [r7, #4]
800b2b4: f000 fbf8 bl 800baa8 <USBD_CtlSendData>
break;
800b2b8: e06a b.n 800b390 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800b2ba: f997 300e ldrsb.w r3, [r7, #14]
800b2be: 2b00 cmp r3, #0
800b2c0: da11 bge.n 800b2e6 <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800b2c2: 7bbb ldrb r3, [r7, #14]
800b2c4: f003 020f and.w r2, r3, #15
800b2c8: 6879 ldr r1, [r7, #4]
800b2ca: 4613 mov r3, r2
800b2cc: 009b lsls r3, r3, #2
800b2ce: 4413 add r3, r2
800b2d0: 009b lsls r3, r3, #2
800b2d2: 440b add r3, r1
800b2d4: 3318 adds r3, #24
800b2d6: 681b ldr r3, [r3, #0]
800b2d8: 2b00 cmp r3, #0
800b2da: d117 bne.n 800b30c <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800b2dc: 6839 ldr r1, [r7, #0]
800b2de: 6878 ldr r0, [r7, #4]
800b2e0: f000 fb78 bl 800b9d4 <USBD_CtlError>
break;
800b2e4: e054 b.n 800b390 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800b2e6: 7bbb ldrb r3, [r7, #14]
800b2e8: f003 020f and.w r2, r3, #15
800b2ec: 6879 ldr r1, [r7, #4]
800b2ee: 4613 mov r3, r2
800b2f0: 009b lsls r3, r3, #2
800b2f2: 4413 add r3, r2
800b2f4: 009b lsls r3, r3, #2
800b2f6: 440b add r3, r1
800b2f8: f503 73ac add.w r3, r3, #344 @ 0x158
800b2fc: 681b ldr r3, [r3, #0]
800b2fe: 2b00 cmp r3, #0
800b300: d104 bne.n 800b30c <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800b302: 6839 ldr r1, [r7, #0]
800b304: 6878 ldr r0, [r7, #4]
800b306: f000 fb65 bl 800b9d4 <USBD_CtlError>
break;
800b30a: e041 b.n 800b390 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800b30c: f997 300e ldrsb.w r3, [r7, #14]
800b310: 2b00 cmp r3, #0
800b312: da0b bge.n 800b32c <USBD_StdEPReq+0x240>
800b314: 7bbb ldrb r3, [r7, #14]
800b316: f003 027f and.w r2, r3, #127 @ 0x7f
800b31a: 4613 mov r3, r2
800b31c: 009b lsls r3, r3, #2
800b31e: 4413 add r3, r2
800b320: 009b lsls r3, r3, #2
800b322: 3310 adds r3, #16
800b324: 687a ldr r2, [r7, #4]
800b326: 4413 add r3, r2
800b328: 3304 adds r3, #4
800b32a: e00b b.n 800b344 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800b32c: 7bbb ldrb r3, [r7, #14]
800b32e: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800b332: 4613 mov r3, r2
800b334: 009b lsls r3, r3, #2
800b336: 4413 add r3, r2
800b338: 009b lsls r3, r3, #2
800b33a: f503 73a8 add.w r3, r3, #336 @ 0x150
800b33e: 687a ldr r2, [r7, #4]
800b340: 4413 add r3, r2
800b342: 3304 adds r3, #4
800b344: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800b346: 7bbb ldrb r3, [r7, #14]
800b348: 2b00 cmp r3, #0
800b34a: d002 beq.n 800b352 <USBD_StdEPReq+0x266>
800b34c: 7bbb ldrb r3, [r7, #14]
800b34e: 2b80 cmp r3, #128 @ 0x80
800b350: d103 bne.n 800b35a <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800b352: 68bb ldr r3, [r7, #8]
800b354: 2200 movs r2, #0
800b356: 601a str r2, [r3, #0]
800b358: e00e b.n 800b378 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800b35a: 7bbb ldrb r3, [r7, #14]
800b35c: 4619 mov r1, r3
800b35e: 6878 ldr r0, [r7, #4]
800b360: f001 f850 bl 800c404 <USBD_LL_IsStallEP>
800b364: 4603 mov r3, r0
800b366: 2b00 cmp r3, #0
800b368: d003 beq.n 800b372 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800b36a: 68bb ldr r3, [r7, #8]
800b36c: 2201 movs r2, #1
800b36e: 601a str r2, [r3, #0]
800b370: e002 b.n 800b378 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800b372: 68bb ldr r3, [r7, #8]
800b374: 2200 movs r2, #0
800b376: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800b378: 68bb ldr r3, [r7, #8]
800b37a: 2202 movs r2, #2
800b37c: 4619 mov r1, r3
800b37e: 6878 ldr r0, [r7, #4]
800b380: f000 fb92 bl 800baa8 <USBD_CtlSendData>
break;
800b384: e004 b.n 800b390 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800b386: 6839 ldr r1, [r7, #0]
800b388: 6878 ldr r0, [r7, #4]
800b38a: f000 fb23 bl 800b9d4 <USBD_CtlError>
break;
800b38e: bf00 nop
}
break;
800b390: e004 b.n 800b39c <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800b392: 6839 ldr r1, [r7, #0]
800b394: 6878 ldr r0, [r7, #4]
800b396: f000 fb1d bl 800b9d4 <USBD_CtlError>
break;
800b39a: bf00 nop
}
break;
800b39c: e004 b.n 800b3a8 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
800b39e: 6839 ldr r1, [r7, #0]
800b3a0: 6878 ldr r0, [r7, #4]
800b3a2: f000 fb17 bl 800b9d4 <USBD_CtlError>
break;
800b3a6: bf00 nop
}
return ret;
800b3a8: 7bfb ldrb r3, [r7, #15]
}
800b3aa: 4618 mov r0, r3
800b3ac: 3710 adds r7, #16
800b3ae: 46bd mov sp, r7
800b3b0: bd80 pop {r7, pc}
...
0800b3b4 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800b3b4: b580 push {r7, lr}
800b3b6: b084 sub sp, #16
800b3b8: af00 add r7, sp, #0
800b3ba: 6078 str r0, [r7, #4]
800b3bc: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800b3be: 2300 movs r3, #0
800b3c0: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800b3c2: 2300 movs r3, #0
800b3c4: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800b3c6: 2300 movs r3, #0
800b3c8: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800b3ca: 683b ldr r3, [r7, #0]
800b3cc: 885b ldrh r3, [r3, #2]
800b3ce: 0a1b lsrs r3, r3, #8
800b3d0: b29b uxth r3, r3
800b3d2: 3b01 subs r3, #1
800b3d4: 2b06 cmp r3, #6
800b3d6: f200 8128 bhi.w 800b62a <USBD_GetDescriptor+0x276>
800b3da: a201 add r2, pc, #4 @ (adr r2, 800b3e0 <USBD_GetDescriptor+0x2c>)
800b3dc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800b3e0: 0800b3fd .word 0x0800b3fd
800b3e4: 0800b415 .word 0x0800b415
800b3e8: 0800b455 .word 0x0800b455
800b3ec: 0800b62b .word 0x0800b62b
800b3f0: 0800b62b .word 0x0800b62b
800b3f4: 0800b5cb .word 0x0800b5cb
800b3f8: 0800b5f7 .word 0x0800b5f7
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800b3fc: 687b ldr r3, [r7, #4]
800b3fe: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b402: 681b ldr r3, [r3, #0]
800b404: 687a ldr r2, [r7, #4]
800b406: 7c12 ldrb r2, [r2, #16]
800b408: f107 0108 add.w r1, r7, #8
800b40c: 4610 mov r0, r2
800b40e: 4798 blx r3
800b410: 60f8 str r0, [r7, #12]
break;
800b412: e112 b.n 800b63a <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800b414: 687b ldr r3, [r7, #4]
800b416: 7c1b ldrb r3, [r3, #16]
800b418: 2b00 cmp r3, #0
800b41a: d10d bne.n 800b438 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800b41c: 687b ldr r3, [r7, #4]
800b41e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800b422: 6a9b ldr r3, [r3, #40] @ 0x28
800b424: f107 0208 add.w r2, r7, #8
800b428: 4610 mov r0, r2
800b42a: 4798 blx r3
800b42c: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800b42e: 68fb ldr r3, [r7, #12]
800b430: 3301 adds r3, #1
800b432: 2202 movs r2, #2
800b434: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800b436: e100 b.n 800b63a <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800b438: 687b ldr r3, [r7, #4]
800b43a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800b43e: 6adb ldr r3, [r3, #44] @ 0x2c
800b440: f107 0208 add.w r2, r7, #8
800b444: 4610 mov r0, r2
800b446: 4798 blx r3
800b448: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800b44a: 68fb ldr r3, [r7, #12]
800b44c: 3301 adds r3, #1
800b44e: 2202 movs r2, #2
800b450: 701a strb r2, [r3, #0]
break;
800b452: e0f2 b.n 800b63a <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800b454: 683b ldr r3, [r7, #0]
800b456: 885b ldrh r3, [r3, #2]
800b458: b2db uxtb r3, r3
800b45a: 2b05 cmp r3, #5
800b45c: f200 80ac bhi.w 800b5b8 <USBD_GetDescriptor+0x204>
800b460: a201 add r2, pc, #4 @ (adr r2, 800b468 <USBD_GetDescriptor+0xb4>)
800b462: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800b466: bf00 nop
800b468: 0800b481 .word 0x0800b481
800b46c: 0800b4b5 .word 0x0800b4b5
800b470: 0800b4e9 .word 0x0800b4e9
800b474: 0800b51d .word 0x0800b51d
800b478: 0800b551 .word 0x0800b551
800b47c: 0800b585 .word 0x0800b585
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800b480: 687b ldr r3, [r7, #4]
800b482: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b486: 685b ldr r3, [r3, #4]
800b488: 2b00 cmp r3, #0
800b48a: d00b beq.n 800b4a4 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800b48c: 687b ldr r3, [r7, #4]
800b48e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b492: 685b ldr r3, [r3, #4]
800b494: 687a ldr r2, [r7, #4]
800b496: 7c12 ldrb r2, [r2, #16]
800b498: f107 0108 add.w r1, r7, #8
800b49c: 4610 mov r0, r2
800b49e: 4798 blx r3
800b4a0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800b4a2: e091 b.n 800b5c8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800b4a4: 6839 ldr r1, [r7, #0]
800b4a6: 6878 ldr r0, [r7, #4]
800b4a8: f000 fa94 bl 800b9d4 <USBD_CtlError>
err++;
800b4ac: 7afb ldrb r3, [r7, #11]
800b4ae: 3301 adds r3, #1
800b4b0: 72fb strb r3, [r7, #11]
break;
800b4b2: e089 b.n 800b5c8 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800b4b4: 687b ldr r3, [r7, #4]
800b4b6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b4ba: 689b ldr r3, [r3, #8]
800b4bc: 2b00 cmp r3, #0
800b4be: d00b beq.n 800b4d8 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800b4c0: 687b ldr r3, [r7, #4]
800b4c2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b4c6: 689b ldr r3, [r3, #8]
800b4c8: 687a ldr r2, [r7, #4]
800b4ca: 7c12 ldrb r2, [r2, #16]
800b4cc: f107 0108 add.w r1, r7, #8
800b4d0: 4610 mov r0, r2
800b4d2: 4798 blx r3
800b4d4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800b4d6: e077 b.n 800b5c8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800b4d8: 6839 ldr r1, [r7, #0]
800b4da: 6878 ldr r0, [r7, #4]
800b4dc: f000 fa7a bl 800b9d4 <USBD_CtlError>
err++;
800b4e0: 7afb ldrb r3, [r7, #11]
800b4e2: 3301 adds r3, #1
800b4e4: 72fb strb r3, [r7, #11]
break;
800b4e6: e06f b.n 800b5c8 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800b4e8: 687b ldr r3, [r7, #4]
800b4ea: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b4ee: 68db ldr r3, [r3, #12]
800b4f0: 2b00 cmp r3, #0
800b4f2: d00b beq.n 800b50c <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800b4f4: 687b ldr r3, [r7, #4]
800b4f6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b4fa: 68db ldr r3, [r3, #12]
800b4fc: 687a ldr r2, [r7, #4]
800b4fe: 7c12 ldrb r2, [r2, #16]
800b500: f107 0108 add.w r1, r7, #8
800b504: 4610 mov r0, r2
800b506: 4798 blx r3
800b508: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800b50a: e05d b.n 800b5c8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800b50c: 6839 ldr r1, [r7, #0]
800b50e: 6878 ldr r0, [r7, #4]
800b510: f000 fa60 bl 800b9d4 <USBD_CtlError>
err++;
800b514: 7afb ldrb r3, [r7, #11]
800b516: 3301 adds r3, #1
800b518: 72fb strb r3, [r7, #11]
break;
800b51a: e055 b.n 800b5c8 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800b51c: 687b ldr r3, [r7, #4]
800b51e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b522: 691b ldr r3, [r3, #16]
800b524: 2b00 cmp r3, #0
800b526: d00b beq.n 800b540 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800b528: 687b ldr r3, [r7, #4]
800b52a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b52e: 691b ldr r3, [r3, #16]
800b530: 687a ldr r2, [r7, #4]
800b532: 7c12 ldrb r2, [r2, #16]
800b534: f107 0108 add.w r1, r7, #8
800b538: 4610 mov r0, r2
800b53a: 4798 blx r3
800b53c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800b53e: e043 b.n 800b5c8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800b540: 6839 ldr r1, [r7, #0]
800b542: 6878 ldr r0, [r7, #4]
800b544: f000 fa46 bl 800b9d4 <USBD_CtlError>
err++;
800b548: 7afb ldrb r3, [r7, #11]
800b54a: 3301 adds r3, #1
800b54c: 72fb strb r3, [r7, #11]
break;
800b54e: e03b b.n 800b5c8 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800b550: 687b ldr r3, [r7, #4]
800b552: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b556: 695b ldr r3, [r3, #20]
800b558: 2b00 cmp r3, #0
800b55a: d00b beq.n 800b574 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800b55c: 687b ldr r3, [r7, #4]
800b55e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b562: 695b ldr r3, [r3, #20]
800b564: 687a ldr r2, [r7, #4]
800b566: 7c12 ldrb r2, [r2, #16]
800b568: f107 0108 add.w r1, r7, #8
800b56c: 4610 mov r0, r2
800b56e: 4798 blx r3
800b570: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800b572: e029 b.n 800b5c8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800b574: 6839 ldr r1, [r7, #0]
800b576: 6878 ldr r0, [r7, #4]
800b578: f000 fa2c bl 800b9d4 <USBD_CtlError>
err++;
800b57c: 7afb ldrb r3, [r7, #11]
800b57e: 3301 adds r3, #1
800b580: 72fb strb r3, [r7, #11]
break;
800b582: e021 b.n 800b5c8 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800b584: 687b ldr r3, [r7, #4]
800b586: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b58a: 699b ldr r3, [r3, #24]
800b58c: 2b00 cmp r3, #0
800b58e: d00b beq.n 800b5a8 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800b590: 687b ldr r3, [r7, #4]
800b592: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800b596: 699b ldr r3, [r3, #24]
800b598: 687a ldr r2, [r7, #4]
800b59a: 7c12 ldrb r2, [r2, #16]
800b59c: f107 0108 add.w r1, r7, #8
800b5a0: 4610 mov r0, r2
800b5a2: 4798 blx r3
800b5a4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800b5a6: e00f b.n 800b5c8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800b5a8: 6839 ldr r1, [r7, #0]
800b5aa: 6878 ldr r0, [r7, #4]
800b5ac: f000 fa12 bl 800b9d4 <USBD_CtlError>
err++;
800b5b0: 7afb ldrb r3, [r7, #11]
800b5b2: 3301 adds r3, #1
800b5b4: 72fb strb r3, [r7, #11]
break;
800b5b6: e007 b.n 800b5c8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
800b5b8: 6839 ldr r1, [r7, #0]
800b5ba: 6878 ldr r0, [r7, #4]
800b5bc: f000 fa0a bl 800b9d4 <USBD_CtlError>
err++;
800b5c0: 7afb ldrb r3, [r7, #11]
800b5c2: 3301 adds r3, #1
800b5c4: 72fb strb r3, [r7, #11]
#endif
}
break;
800b5c6: e038 b.n 800b63a <USBD_GetDescriptor+0x286>
800b5c8: e037 b.n 800b63a <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800b5ca: 687b ldr r3, [r7, #4]
800b5cc: 7c1b ldrb r3, [r3, #16]
800b5ce: 2b00 cmp r3, #0
800b5d0: d109 bne.n 800b5e6 <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800b5d2: 687b ldr r3, [r7, #4]
800b5d4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800b5d8: 6b5b ldr r3, [r3, #52] @ 0x34
800b5da: f107 0208 add.w r2, r7, #8
800b5de: 4610 mov r0, r2
800b5e0: 4798 blx r3
800b5e2: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800b5e4: e029 b.n 800b63a <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800b5e6: 6839 ldr r1, [r7, #0]
800b5e8: 6878 ldr r0, [r7, #4]
800b5ea: f000 f9f3 bl 800b9d4 <USBD_CtlError>
err++;
800b5ee: 7afb ldrb r3, [r7, #11]
800b5f0: 3301 adds r3, #1
800b5f2: 72fb strb r3, [r7, #11]
break;
800b5f4: e021 b.n 800b63a <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800b5f6: 687b ldr r3, [r7, #4]
800b5f8: 7c1b ldrb r3, [r3, #16]
800b5fa: 2b00 cmp r3, #0
800b5fc: d10d bne.n 800b61a <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800b5fe: 687b ldr r3, [r7, #4]
800b600: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800b604: 6b1b ldr r3, [r3, #48] @ 0x30
800b606: f107 0208 add.w r2, r7, #8
800b60a: 4610 mov r0, r2
800b60c: 4798 blx r3
800b60e: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800b610: 68fb ldr r3, [r7, #12]
800b612: 3301 adds r3, #1
800b614: 2207 movs r2, #7
800b616: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800b618: e00f b.n 800b63a <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800b61a: 6839 ldr r1, [r7, #0]
800b61c: 6878 ldr r0, [r7, #4]
800b61e: f000 f9d9 bl 800b9d4 <USBD_CtlError>
err++;
800b622: 7afb ldrb r3, [r7, #11]
800b624: 3301 adds r3, #1
800b626: 72fb strb r3, [r7, #11]
break;
800b628: e007 b.n 800b63a <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800b62a: 6839 ldr r1, [r7, #0]
800b62c: 6878 ldr r0, [r7, #4]
800b62e: f000 f9d1 bl 800b9d4 <USBD_CtlError>
err++;
800b632: 7afb ldrb r3, [r7, #11]
800b634: 3301 adds r3, #1
800b636: 72fb strb r3, [r7, #11]
break;
800b638: bf00 nop
}
if (err != 0U)
800b63a: 7afb ldrb r3, [r7, #11]
800b63c: 2b00 cmp r3, #0
800b63e: d11c bne.n 800b67a <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800b640: 893b ldrh r3, [r7, #8]
800b642: 2b00 cmp r3, #0
800b644: d011 beq.n 800b66a <USBD_GetDescriptor+0x2b6>
800b646: 683b ldr r3, [r7, #0]
800b648: 88db ldrh r3, [r3, #6]
800b64a: 2b00 cmp r3, #0
800b64c: d00d beq.n 800b66a <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800b64e: 683b ldr r3, [r7, #0]
800b650: 88da ldrh r2, [r3, #6]
800b652: 893b ldrh r3, [r7, #8]
800b654: 4293 cmp r3, r2
800b656: bf28 it cs
800b658: 4613 movcs r3, r2
800b65a: b29b uxth r3, r3
800b65c: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800b65e: 893b ldrh r3, [r7, #8]
800b660: 461a mov r2, r3
800b662: 68f9 ldr r1, [r7, #12]
800b664: 6878 ldr r0, [r7, #4]
800b666: f000 fa1f bl 800baa8 <USBD_CtlSendData>
}
if (req->wLength == 0U)
800b66a: 683b ldr r3, [r7, #0]
800b66c: 88db ldrh r3, [r3, #6]
800b66e: 2b00 cmp r3, #0
800b670: d104 bne.n 800b67c <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800b672: 6878 ldr r0, [r7, #4]
800b674: f000 fa76 bl 800bb64 <USBD_CtlSendStatus>
800b678: e000 b.n 800b67c <USBD_GetDescriptor+0x2c8>
return;
800b67a: bf00 nop
}
}
}
800b67c: 3710 adds r7, #16
800b67e: 46bd mov sp, r7
800b680: bd80 pop {r7, pc}
800b682: bf00 nop
0800b684 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800b684: b580 push {r7, lr}
800b686: b084 sub sp, #16
800b688: af00 add r7, sp, #0
800b68a: 6078 str r0, [r7, #4]
800b68c: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800b68e: 683b ldr r3, [r7, #0]
800b690: 889b ldrh r3, [r3, #4]
800b692: 2b00 cmp r3, #0
800b694: d130 bne.n 800b6f8 <USBD_SetAddress+0x74>
800b696: 683b ldr r3, [r7, #0]
800b698: 88db ldrh r3, [r3, #6]
800b69a: 2b00 cmp r3, #0
800b69c: d12c bne.n 800b6f8 <USBD_SetAddress+0x74>
800b69e: 683b ldr r3, [r7, #0]
800b6a0: 885b ldrh r3, [r3, #2]
800b6a2: 2b7f cmp r3, #127 @ 0x7f
800b6a4: d828 bhi.n 800b6f8 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800b6a6: 683b ldr r3, [r7, #0]
800b6a8: 885b ldrh r3, [r3, #2]
800b6aa: b2db uxtb r3, r3
800b6ac: f003 037f and.w r3, r3, #127 @ 0x7f
800b6b0: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b6b2: 687b ldr r3, [r7, #4]
800b6b4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b6b8: 2b03 cmp r3, #3
800b6ba: d104 bne.n 800b6c6 <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
800b6bc: 6839 ldr r1, [r7, #0]
800b6be: 6878 ldr r0, [r7, #4]
800b6c0: f000 f988 bl 800b9d4 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b6c4: e01d b.n 800b702 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800b6c6: 687b ldr r3, [r7, #4]
800b6c8: 7bfa ldrb r2, [r7, #15]
800b6ca: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
800b6ce: 7bfb ldrb r3, [r7, #15]
800b6d0: 4619 mov r1, r3
800b6d2: 6878 ldr r0, [r7, #4]
800b6d4: f000 fec1 bl 800c45a <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800b6d8: 6878 ldr r0, [r7, #4]
800b6da: f000 fa43 bl 800bb64 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800b6de: 7bfb ldrb r3, [r7, #15]
800b6e0: 2b00 cmp r3, #0
800b6e2: d004 beq.n 800b6ee <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800b6e4: 687b ldr r3, [r7, #4]
800b6e6: 2202 movs r2, #2
800b6e8: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b6ec: e009 b.n 800b702 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800b6ee: 687b ldr r3, [r7, #4]
800b6f0: 2201 movs r2, #1
800b6f2: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b6f6: e004 b.n 800b702 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
800b6f8: 6839 ldr r1, [r7, #0]
800b6fa: 6878 ldr r0, [r7, #4]
800b6fc: f000 f96a bl 800b9d4 <USBD_CtlError>
}
}
800b700: bf00 nop
800b702: bf00 nop
800b704: 3710 adds r7, #16
800b706: 46bd mov sp, r7
800b708: bd80 pop {r7, pc}
...
0800b70c <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800b70c: b580 push {r7, lr}
800b70e: b082 sub sp, #8
800b710: af00 add r7, sp, #0
800b712: 6078 str r0, [r7, #4]
800b714: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800b716: 683b ldr r3, [r7, #0]
800b718: 885b ldrh r3, [r3, #2]
800b71a: b2da uxtb r2, r3
800b71c: 4b41 ldr r3, [pc, #260] @ (800b824 <USBD_SetConfig+0x118>)
800b71e: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800b720: 4b40 ldr r3, [pc, #256] @ (800b824 <USBD_SetConfig+0x118>)
800b722: 781b ldrb r3, [r3, #0]
800b724: 2b01 cmp r3, #1
800b726: d904 bls.n 800b732 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800b728: 6839 ldr r1, [r7, #0]
800b72a: 6878 ldr r0, [r7, #4]
800b72c: f000 f952 bl 800b9d4 <USBD_CtlError>
800b730: e075 b.n 800b81e <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800b732: 687b ldr r3, [r7, #4]
800b734: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b738: 2b02 cmp r3, #2
800b73a: d002 beq.n 800b742 <USBD_SetConfig+0x36>
800b73c: 2b03 cmp r3, #3
800b73e: d023 beq.n 800b788 <USBD_SetConfig+0x7c>
800b740: e062 b.n 800b808 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800b742: 4b38 ldr r3, [pc, #224] @ (800b824 <USBD_SetConfig+0x118>)
800b744: 781b ldrb r3, [r3, #0]
800b746: 2b00 cmp r3, #0
800b748: d01a beq.n 800b780 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800b74a: 4b36 ldr r3, [pc, #216] @ (800b824 <USBD_SetConfig+0x118>)
800b74c: 781b ldrb r3, [r3, #0]
800b74e: 461a mov r2, r3
800b750: 687b ldr r3, [r7, #4]
800b752: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800b754: 687b ldr r3, [r7, #4]
800b756: 2203 movs r2, #3
800b758: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800b75c: 4b31 ldr r3, [pc, #196] @ (800b824 <USBD_SetConfig+0x118>)
800b75e: 781b ldrb r3, [r3, #0]
800b760: 4619 mov r1, r3
800b762: 6878 ldr r0, [r7, #4]
800b764: f7ff f9e7 bl 800ab36 <USBD_SetClassConfig>
800b768: 4603 mov r3, r0
800b76a: 2b02 cmp r3, #2
800b76c: d104 bne.n 800b778 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800b76e: 6839 ldr r1, [r7, #0]
800b770: 6878 ldr r0, [r7, #4]
800b772: f000 f92f bl 800b9d4 <USBD_CtlError>
return;
800b776: e052 b.n 800b81e <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800b778: 6878 ldr r0, [r7, #4]
800b77a: f000 f9f3 bl 800bb64 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800b77e: e04e b.n 800b81e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800b780: 6878 ldr r0, [r7, #4]
800b782: f000 f9ef bl 800bb64 <USBD_CtlSendStatus>
break;
800b786: e04a b.n 800b81e <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800b788: 4b26 ldr r3, [pc, #152] @ (800b824 <USBD_SetConfig+0x118>)
800b78a: 781b ldrb r3, [r3, #0]
800b78c: 2b00 cmp r3, #0
800b78e: d112 bne.n 800b7b6 <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800b790: 687b ldr r3, [r7, #4]
800b792: 2202 movs r2, #2
800b794: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800b798: 4b22 ldr r3, [pc, #136] @ (800b824 <USBD_SetConfig+0x118>)
800b79a: 781b ldrb r3, [r3, #0]
800b79c: 461a mov r2, r3
800b79e: 687b ldr r3, [r7, #4]
800b7a0: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800b7a2: 4b20 ldr r3, [pc, #128] @ (800b824 <USBD_SetConfig+0x118>)
800b7a4: 781b ldrb r3, [r3, #0]
800b7a6: 4619 mov r1, r3
800b7a8: 6878 ldr r0, [r7, #4]
800b7aa: f7ff f9e3 bl 800ab74 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800b7ae: 6878 ldr r0, [r7, #4]
800b7b0: f000 f9d8 bl 800bb64 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800b7b4: e033 b.n 800b81e <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800b7b6: 4b1b ldr r3, [pc, #108] @ (800b824 <USBD_SetConfig+0x118>)
800b7b8: 781b ldrb r3, [r3, #0]
800b7ba: 461a mov r2, r3
800b7bc: 687b ldr r3, [r7, #4]
800b7be: 685b ldr r3, [r3, #4]
800b7c0: 429a cmp r2, r3
800b7c2: d01d beq.n 800b800 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800b7c4: 687b ldr r3, [r7, #4]
800b7c6: 685b ldr r3, [r3, #4]
800b7c8: b2db uxtb r3, r3
800b7ca: 4619 mov r1, r3
800b7cc: 6878 ldr r0, [r7, #4]
800b7ce: f7ff f9d1 bl 800ab74 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800b7d2: 4b14 ldr r3, [pc, #80] @ (800b824 <USBD_SetConfig+0x118>)
800b7d4: 781b ldrb r3, [r3, #0]
800b7d6: 461a mov r2, r3
800b7d8: 687b ldr r3, [r7, #4]
800b7da: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800b7dc: 4b11 ldr r3, [pc, #68] @ (800b824 <USBD_SetConfig+0x118>)
800b7de: 781b ldrb r3, [r3, #0]
800b7e0: 4619 mov r1, r3
800b7e2: 6878 ldr r0, [r7, #4]
800b7e4: f7ff f9a7 bl 800ab36 <USBD_SetClassConfig>
800b7e8: 4603 mov r3, r0
800b7ea: 2b02 cmp r3, #2
800b7ec: d104 bne.n 800b7f8 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
800b7ee: 6839 ldr r1, [r7, #0]
800b7f0: 6878 ldr r0, [r7, #4]
800b7f2: f000 f8ef bl 800b9d4 <USBD_CtlError>
return;
800b7f6: e012 b.n 800b81e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800b7f8: 6878 ldr r0, [r7, #4]
800b7fa: f000 f9b3 bl 800bb64 <USBD_CtlSendStatus>
break;
800b7fe: e00e b.n 800b81e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800b800: 6878 ldr r0, [r7, #4]
800b802: f000 f9af bl 800bb64 <USBD_CtlSendStatus>
break;
800b806: e00a b.n 800b81e <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
800b808: 6839 ldr r1, [r7, #0]
800b80a: 6878 ldr r0, [r7, #4]
800b80c: f000 f8e2 bl 800b9d4 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
800b810: 4b04 ldr r3, [pc, #16] @ (800b824 <USBD_SetConfig+0x118>)
800b812: 781b ldrb r3, [r3, #0]
800b814: 4619 mov r1, r3
800b816: 6878 ldr r0, [r7, #4]
800b818: f7ff f9ac bl 800ab74 <USBD_ClrClassConfig>
break;
800b81c: bf00 nop
}
}
}
800b81e: 3708 adds r7, #8
800b820: 46bd mov sp, r7
800b822: bd80 pop {r7, pc}
800b824: 20000458 .word 0x20000458
0800b828 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800b828: b580 push {r7, lr}
800b82a: b082 sub sp, #8
800b82c: af00 add r7, sp, #0
800b82e: 6078 str r0, [r7, #4]
800b830: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800b832: 683b ldr r3, [r7, #0]
800b834: 88db ldrh r3, [r3, #6]
800b836: 2b01 cmp r3, #1
800b838: d004 beq.n 800b844 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800b83a: 6839 ldr r1, [r7, #0]
800b83c: 6878 ldr r0, [r7, #4]
800b83e: f000 f8c9 bl 800b9d4 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800b842: e022 b.n 800b88a <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800b844: 687b ldr r3, [r7, #4]
800b846: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b84a: 2b02 cmp r3, #2
800b84c: dc02 bgt.n 800b854 <USBD_GetConfig+0x2c>
800b84e: 2b00 cmp r3, #0
800b850: dc03 bgt.n 800b85a <USBD_GetConfig+0x32>
800b852: e015 b.n 800b880 <USBD_GetConfig+0x58>
800b854: 2b03 cmp r3, #3
800b856: d00b beq.n 800b870 <USBD_GetConfig+0x48>
800b858: e012 b.n 800b880 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800b85a: 687b ldr r3, [r7, #4]
800b85c: 2200 movs r2, #0
800b85e: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800b860: 687b ldr r3, [r7, #4]
800b862: 3308 adds r3, #8
800b864: 2201 movs r2, #1
800b866: 4619 mov r1, r3
800b868: 6878 ldr r0, [r7, #4]
800b86a: f000 f91d bl 800baa8 <USBD_CtlSendData>
break;
800b86e: e00c b.n 800b88a <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800b870: 687b ldr r3, [r7, #4]
800b872: 3304 adds r3, #4
800b874: 2201 movs r2, #1
800b876: 4619 mov r1, r3
800b878: 6878 ldr r0, [r7, #4]
800b87a: f000 f915 bl 800baa8 <USBD_CtlSendData>
break;
800b87e: e004 b.n 800b88a <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800b880: 6839 ldr r1, [r7, #0]
800b882: 6878 ldr r0, [r7, #4]
800b884: f000 f8a6 bl 800b9d4 <USBD_CtlError>
break;
800b888: bf00 nop
}
800b88a: bf00 nop
800b88c: 3708 adds r7, #8
800b88e: 46bd mov sp, r7
800b890: bd80 pop {r7, pc}
0800b892 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800b892: b580 push {r7, lr}
800b894: b082 sub sp, #8
800b896: af00 add r7, sp, #0
800b898: 6078 str r0, [r7, #4]
800b89a: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800b89c: 687b ldr r3, [r7, #4]
800b89e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b8a2: 3b01 subs r3, #1
800b8a4: 2b02 cmp r3, #2
800b8a6: d81e bhi.n 800b8e6 <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800b8a8: 683b ldr r3, [r7, #0]
800b8aa: 88db ldrh r3, [r3, #6]
800b8ac: 2b02 cmp r3, #2
800b8ae: d004 beq.n 800b8ba <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800b8b0: 6839 ldr r1, [r7, #0]
800b8b2: 6878 ldr r0, [r7, #4]
800b8b4: f000 f88e bl 800b9d4 <USBD_CtlError>
break;
800b8b8: e01a b.n 800b8f0 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800b8ba: 687b ldr r3, [r7, #4]
800b8bc: 2201 movs r2, #1
800b8be: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
800b8c0: 687b ldr r3, [r7, #4]
800b8c2: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800b8c6: 2b00 cmp r3, #0
800b8c8: d005 beq.n 800b8d6 <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800b8ca: 687b ldr r3, [r7, #4]
800b8cc: 68db ldr r3, [r3, #12]
800b8ce: f043 0202 orr.w r2, r3, #2
800b8d2: 687b ldr r3, [r7, #4]
800b8d4: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800b8d6: 687b ldr r3, [r7, #4]
800b8d8: 330c adds r3, #12
800b8da: 2202 movs r2, #2
800b8dc: 4619 mov r1, r3
800b8de: 6878 ldr r0, [r7, #4]
800b8e0: f000 f8e2 bl 800baa8 <USBD_CtlSendData>
break;
800b8e4: e004 b.n 800b8f0 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800b8e6: 6839 ldr r1, [r7, #0]
800b8e8: 6878 ldr r0, [r7, #4]
800b8ea: f000 f873 bl 800b9d4 <USBD_CtlError>
break;
800b8ee: bf00 nop
}
}
800b8f0: bf00 nop
800b8f2: 3708 adds r7, #8
800b8f4: 46bd mov sp, r7
800b8f6: bd80 pop {r7, pc}
0800b8f8 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800b8f8: b580 push {r7, lr}
800b8fa: b082 sub sp, #8
800b8fc: af00 add r7, sp, #0
800b8fe: 6078 str r0, [r7, #4]
800b900: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800b902: 683b ldr r3, [r7, #0]
800b904: 885b ldrh r3, [r3, #2]
800b906: 2b01 cmp r3, #1
800b908: d106 bne.n 800b918 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
800b90a: 687b ldr r3, [r7, #4]
800b90c: 2201 movs r2, #1
800b90e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800b912: 6878 ldr r0, [r7, #4]
800b914: f000 f926 bl 800bb64 <USBD_CtlSendStatus>
}
}
800b918: bf00 nop
800b91a: 3708 adds r7, #8
800b91c: 46bd mov sp, r7
800b91e: bd80 pop {r7, pc}
0800b920 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800b920: b580 push {r7, lr}
800b922: b082 sub sp, #8
800b924: af00 add r7, sp, #0
800b926: 6078 str r0, [r7, #4]
800b928: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800b92a: 687b ldr r3, [r7, #4]
800b92c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b930: 3b01 subs r3, #1
800b932: 2b02 cmp r3, #2
800b934: d80b bhi.n 800b94e <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800b936: 683b ldr r3, [r7, #0]
800b938: 885b ldrh r3, [r3, #2]
800b93a: 2b01 cmp r3, #1
800b93c: d10c bne.n 800b958 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800b93e: 687b ldr r3, [r7, #4]
800b940: 2200 movs r2, #0
800b942: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800b946: 6878 ldr r0, [r7, #4]
800b948: f000 f90c bl 800bb64 <USBD_CtlSendStatus>
}
break;
800b94c: e004 b.n 800b958 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800b94e: 6839 ldr r1, [r7, #0]
800b950: 6878 ldr r0, [r7, #4]
800b952: f000 f83f bl 800b9d4 <USBD_CtlError>
break;
800b956: e000 b.n 800b95a <USBD_ClrFeature+0x3a>
break;
800b958: bf00 nop
}
}
800b95a: bf00 nop
800b95c: 3708 adds r7, #8
800b95e: 46bd mov sp, r7
800b960: bd80 pop {r7, pc}
0800b962 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800b962: b480 push {r7}
800b964: b083 sub sp, #12
800b966: af00 add r7, sp, #0
800b968: 6078 str r0, [r7, #4]
800b96a: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
800b96c: 683b ldr r3, [r7, #0]
800b96e: 781a ldrb r2, [r3, #0]
800b970: 687b ldr r3, [r7, #4]
800b972: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800b974: 683b ldr r3, [r7, #0]
800b976: 785a ldrb r2, [r3, #1]
800b978: 687b ldr r3, [r7, #4]
800b97a: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
800b97c: 683b ldr r3, [r7, #0]
800b97e: 3302 adds r3, #2
800b980: 781b ldrb r3, [r3, #0]
800b982: 461a mov r2, r3
800b984: 683b ldr r3, [r7, #0]
800b986: 3303 adds r3, #3
800b988: 781b ldrb r3, [r3, #0]
800b98a: 021b lsls r3, r3, #8
800b98c: b29b uxth r3, r3
800b98e: 4413 add r3, r2
800b990: b29a uxth r2, r3
800b992: 687b ldr r3, [r7, #4]
800b994: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800b996: 683b ldr r3, [r7, #0]
800b998: 3304 adds r3, #4
800b99a: 781b ldrb r3, [r3, #0]
800b99c: 461a mov r2, r3
800b99e: 683b ldr r3, [r7, #0]
800b9a0: 3305 adds r3, #5
800b9a2: 781b ldrb r3, [r3, #0]
800b9a4: 021b lsls r3, r3, #8
800b9a6: b29b uxth r3, r3
800b9a8: 4413 add r3, r2
800b9aa: b29a uxth r2, r3
800b9ac: 687b ldr r3, [r7, #4]
800b9ae: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800b9b0: 683b ldr r3, [r7, #0]
800b9b2: 3306 adds r3, #6
800b9b4: 781b ldrb r3, [r3, #0]
800b9b6: 461a mov r2, r3
800b9b8: 683b ldr r3, [r7, #0]
800b9ba: 3307 adds r3, #7
800b9bc: 781b ldrb r3, [r3, #0]
800b9be: 021b lsls r3, r3, #8
800b9c0: b29b uxth r3, r3
800b9c2: 4413 add r3, r2
800b9c4: b29a uxth r2, r3
800b9c6: 687b ldr r3, [r7, #4]
800b9c8: 80da strh r2, [r3, #6]
}
800b9ca: bf00 nop
800b9cc: 370c adds r7, #12
800b9ce: 46bd mov sp, r7
800b9d0: bc80 pop {r7}
800b9d2: 4770 bx lr
0800b9d4 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800b9d4: b580 push {r7, lr}
800b9d6: b082 sub sp, #8
800b9d8: af00 add r7, sp, #0
800b9da: 6078 str r0, [r7, #4]
800b9dc: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
800b9de: 2180 movs r1, #128 @ 0x80
800b9e0: 6878 ldr r0, [r7, #4]
800b9e2: f000 fcd1 bl 800c388 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800b9e6: 2100 movs r1, #0
800b9e8: 6878 ldr r0, [r7, #4]
800b9ea: f000 fccd bl 800c388 <USBD_LL_StallEP>
}
800b9ee: bf00 nop
800b9f0: 3708 adds r7, #8
800b9f2: 46bd mov sp, r7
800b9f4: bd80 pop {r7, pc}
0800b9f6 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800b9f6: b580 push {r7, lr}
800b9f8: b086 sub sp, #24
800b9fa: af00 add r7, sp, #0
800b9fc: 60f8 str r0, [r7, #12]
800b9fe: 60b9 str r1, [r7, #8]
800ba00: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800ba02: 2300 movs r3, #0
800ba04: 75fb strb r3, [r7, #23]
if (desc != NULL)
800ba06: 68fb ldr r3, [r7, #12]
800ba08: 2b00 cmp r3, #0
800ba0a: d032 beq.n 800ba72 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800ba0c: 68f8 ldr r0, [r7, #12]
800ba0e: f000 f834 bl 800ba7a <USBD_GetLen>
800ba12: 4603 mov r3, r0
800ba14: 3301 adds r3, #1
800ba16: b29b uxth r3, r3
800ba18: 005b lsls r3, r3, #1
800ba1a: b29a uxth r2, r3
800ba1c: 687b ldr r3, [r7, #4]
800ba1e: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800ba20: 7dfb ldrb r3, [r7, #23]
800ba22: 1c5a adds r2, r3, #1
800ba24: 75fa strb r2, [r7, #23]
800ba26: 461a mov r2, r3
800ba28: 68bb ldr r3, [r7, #8]
800ba2a: 4413 add r3, r2
800ba2c: 687a ldr r2, [r7, #4]
800ba2e: 7812 ldrb r2, [r2, #0]
800ba30: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800ba32: 7dfb ldrb r3, [r7, #23]
800ba34: 1c5a adds r2, r3, #1
800ba36: 75fa strb r2, [r7, #23]
800ba38: 461a mov r2, r3
800ba3a: 68bb ldr r3, [r7, #8]
800ba3c: 4413 add r3, r2
800ba3e: 2203 movs r2, #3
800ba40: 701a strb r2, [r3, #0]
while (*desc != '\0')
800ba42: e012 b.n 800ba6a <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800ba44: 68fb ldr r3, [r7, #12]
800ba46: 1c5a adds r2, r3, #1
800ba48: 60fa str r2, [r7, #12]
800ba4a: 7dfa ldrb r2, [r7, #23]
800ba4c: 1c51 adds r1, r2, #1
800ba4e: 75f9 strb r1, [r7, #23]
800ba50: 4611 mov r1, r2
800ba52: 68ba ldr r2, [r7, #8]
800ba54: 440a add r2, r1
800ba56: 781b ldrb r3, [r3, #0]
800ba58: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800ba5a: 7dfb ldrb r3, [r7, #23]
800ba5c: 1c5a adds r2, r3, #1
800ba5e: 75fa strb r2, [r7, #23]
800ba60: 461a mov r2, r3
800ba62: 68bb ldr r3, [r7, #8]
800ba64: 4413 add r3, r2
800ba66: 2200 movs r2, #0
800ba68: 701a strb r2, [r3, #0]
while (*desc != '\0')
800ba6a: 68fb ldr r3, [r7, #12]
800ba6c: 781b ldrb r3, [r3, #0]
800ba6e: 2b00 cmp r3, #0
800ba70: d1e8 bne.n 800ba44 <USBD_GetString+0x4e>
}
}
}
800ba72: bf00 nop
800ba74: 3718 adds r7, #24
800ba76: 46bd mov sp, r7
800ba78: bd80 pop {r7, pc}
0800ba7a <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800ba7a: b480 push {r7}
800ba7c: b085 sub sp, #20
800ba7e: af00 add r7, sp, #0
800ba80: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800ba82: 2300 movs r3, #0
800ba84: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800ba86: e005 b.n 800ba94 <USBD_GetLen+0x1a>
{
len++;
800ba88: 7bfb ldrb r3, [r7, #15]
800ba8a: 3301 adds r3, #1
800ba8c: 73fb strb r3, [r7, #15]
buf++;
800ba8e: 687b ldr r3, [r7, #4]
800ba90: 3301 adds r3, #1
800ba92: 607b str r3, [r7, #4]
while (*buf != '\0')
800ba94: 687b ldr r3, [r7, #4]
800ba96: 781b ldrb r3, [r3, #0]
800ba98: 2b00 cmp r3, #0
800ba9a: d1f5 bne.n 800ba88 <USBD_GetLen+0xe>
}
return len;
800ba9c: 7bfb ldrb r3, [r7, #15]
}
800ba9e: 4618 mov r0, r3
800baa0: 3714 adds r7, #20
800baa2: 46bd mov sp, r7
800baa4: bc80 pop {r7}
800baa6: 4770 bx lr
0800baa8 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800baa8: b580 push {r7, lr}
800baaa: b084 sub sp, #16
800baac: af00 add r7, sp, #0
800baae: 60f8 str r0, [r7, #12]
800bab0: 60b9 str r1, [r7, #8]
800bab2: 4613 mov r3, r2
800bab4: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800bab6: 68fb ldr r3, [r7, #12]
800bab8: 2202 movs r2, #2
800baba: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800babe: 88fa ldrh r2, [r7, #6]
800bac0: 68fb ldr r3, [r7, #12]
800bac2: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800bac4: 88fa ldrh r2, [r7, #6]
800bac6: 68fb ldr r3, [r7, #12]
800bac8: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800baca: 88fb ldrh r3, [r7, #6]
800bacc: 68ba ldr r2, [r7, #8]
800bace: 2100 movs r1, #0
800bad0: 68f8 ldr r0, [r7, #12]
800bad2: f000 fce1 bl 800c498 <USBD_LL_Transmit>
return USBD_OK;
800bad6: 2300 movs r3, #0
}
800bad8: 4618 mov r0, r3
800bada: 3710 adds r7, #16
800badc: 46bd mov sp, r7
800bade: bd80 pop {r7, pc}
0800bae0 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800bae0: b580 push {r7, lr}
800bae2: b084 sub sp, #16
800bae4: af00 add r7, sp, #0
800bae6: 60f8 str r0, [r7, #12]
800bae8: 60b9 str r1, [r7, #8]
800baea: 4613 mov r3, r2
800baec: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800baee: 88fb ldrh r3, [r7, #6]
800baf0: 68ba ldr r2, [r7, #8]
800baf2: 2100 movs r1, #0
800baf4: 68f8 ldr r0, [r7, #12]
800baf6: f000 fccf bl 800c498 <USBD_LL_Transmit>
return USBD_OK;
800bafa: 2300 movs r3, #0
}
800bafc: 4618 mov r0, r3
800bafe: 3710 adds r7, #16
800bb00: 46bd mov sp, r7
800bb02: bd80 pop {r7, pc}
0800bb04 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800bb04: b580 push {r7, lr}
800bb06: b084 sub sp, #16
800bb08: af00 add r7, sp, #0
800bb0a: 60f8 str r0, [r7, #12]
800bb0c: 60b9 str r1, [r7, #8]
800bb0e: 4613 mov r3, r2
800bb10: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800bb12: 68fb ldr r3, [r7, #12]
800bb14: 2203 movs r2, #3
800bb16: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
800bb1a: 88fa ldrh r2, [r7, #6]
800bb1c: 68fb ldr r3, [r7, #12]
800bb1e: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800bb22: 88fa ldrh r2, [r7, #6]
800bb24: 68fb ldr r3, [r7, #12]
800bb26: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800bb2a: 88fb ldrh r3, [r7, #6]
800bb2c: 68ba ldr r2, [r7, #8]
800bb2e: 2100 movs r1, #0
800bb30: 68f8 ldr r0, [r7, #12]
800bb32: f000 fcd4 bl 800c4de <USBD_LL_PrepareReceive>
return USBD_OK;
800bb36: 2300 movs r3, #0
}
800bb38: 4618 mov r0, r3
800bb3a: 3710 adds r7, #16
800bb3c: 46bd mov sp, r7
800bb3e: bd80 pop {r7, pc}
0800bb40 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800bb40: b580 push {r7, lr}
800bb42: b084 sub sp, #16
800bb44: af00 add r7, sp, #0
800bb46: 60f8 str r0, [r7, #12]
800bb48: 60b9 str r1, [r7, #8]
800bb4a: 4613 mov r3, r2
800bb4c: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800bb4e: 88fb ldrh r3, [r7, #6]
800bb50: 68ba ldr r2, [r7, #8]
800bb52: 2100 movs r1, #0
800bb54: 68f8 ldr r0, [r7, #12]
800bb56: f000 fcc2 bl 800c4de <USBD_LL_PrepareReceive>
return USBD_OK;
800bb5a: 2300 movs r3, #0
}
800bb5c: 4618 mov r0, r3
800bb5e: 3710 adds r7, #16
800bb60: 46bd mov sp, r7
800bb62: bd80 pop {r7, pc}
0800bb64 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800bb64: b580 push {r7, lr}
800bb66: b082 sub sp, #8
800bb68: af00 add r7, sp, #0
800bb6a: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800bb6c: 687b ldr r3, [r7, #4]
800bb6e: 2204 movs r2, #4
800bb70: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800bb74: 2300 movs r3, #0
800bb76: 2200 movs r2, #0
800bb78: 2100 movs r1, #0
800bb7a: 6878 ldr r0, [r7, #4]
800bb7c: f000 fc8c bl 800c498 <USBD_LL_Transmit>
return USBD_OK;
800bb80: 2300 movs r3, #0
}
800bb82: 4618 mov r0, r3
800bb84: 3708 adds r7, #8
800bb86: 46bd mov sp, r7
800bb88: bd80 pop {r7, pc}
0800bb8a <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800bb8a: b580 push {r7, lr}
800bb8c: b082 sub sp, #8
800bb8e: af00 add r7, sp, #0
800bb90: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800bb92: 687b ldr r3, [r7, #4]
800bb94: 2205 movs r2, #5
800bb96: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800bb9a: 2300 movs r3, #0
800bb9c: 2200 movs r2, #0
800bb9e: 2100 movs r1, #0
800bba0: 6878 ldr r0, [r7, #4]
800bba2: f000 fc9c bl 800c4de <USBD_LL_PrepareReceive>
return USBD_OK;
800bba6: 2300 movs r3, #0
}
800bba8: 4618 mov r0, r3
800bbaa: 3708 adds r7, #8
800bbac: 46bd mov sp, r7
800bbae: bd80 pop {r7, pc}
0800bbb0 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800bbb0: b580 push {r7, lr}
800bbb2: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
800bbb4: 2200 movs r2, #0
800bbb6: 4912 ldr r1, [pc, #72] @ (800bc00 <MX_USB_DEVICE_Init+0x50>)
800bbb8: 4812 ldr r0, [pc, #72] @ (800bc04 <MX_USB_DEVICE_Init+0x54>)
800bbba: f7fe ff62 bl 800aa82 <USBD_Init>
800bbbe: 4603 mov r3, r0
800bbc0: 2b00 cmp r3, #0
800bbc2: d001 beq.n 800bbc8 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
800bbc4: f7f6 fe26 bl 8002814 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
800bbc8: 490f ldr r1, [pc, #60] @ (800bc08 <MX_USB_DEVICE_Init+0x58>)
800bbca: 480e ldr r0, [pc, #56] @ (800bc04 <MX_USB_DEVICE_Init+0x54>)
800bbcc: f7fe ff84 bl 800aad8 <USBD_RegisterClass>
800bbd0: 4603 mov r3, r0
800bbd2: 2b00 cmp r3, #0
800bbd4: d001 beq.n 800bbda <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800bbd6: f7f6 fe1d bl 8002814 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
800bbda: 490c ldr r1, [pc, #48] @ (800bc0c <MX_USB_DEVICE_Init+0x5c>)
800bbdc: 4809 ldr r0, [pc, #36] @ (800bc04 <MX_USB_DEVICE_Init+0x54>)
800bbde: f7fe feb5 bl 800a94c <USBD_CDC_RegisterInterface>
800bbe2: 4603 mov r3, r0
800bbe4: 2b00 cmp r3, #0
800bbe6: d001 beq.n 800bbec <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
800bbe8: f7f6 fe14 bl 8002814 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800bbec: 4805 ldr r0, [pc, #20] @ (800bc04 <MX_USB_DEVICE_Init+0x54>)
800bbee: f7fe ff8c bl 800ab0a <USBD_Start>
800bbf2: 4603 mov r3, r0
800bbf4: 2b00 cmp r3, #0
800bbf6: d001 beq.n 800bbfc <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800bbf8: f7f6 fe0c bl 8002814 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800bbfc: bf00 nop
800bbfe: bd80 pop {r7, pc}
800bc00: 20000134 .word 0x20000134
800bc04: 2000045c .word 0x2000045c
800bc08: 20000020 .word 0x20000020
800bc0c: 20000124 .word 0x20000124
0800bc10 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
800bc10: b480 push {r7}
800bc12: b085 sub sp, #20
800bc14: af00 add r7, sp, #0
800bc16: 6078 str r0, [r7, #4]
800bc18: 6039 str r1, [r7, #0]
while (len--) {
800bc1a: e01e b.n 800bc5a <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
800bc1c: 4b14 ldr r3, [pc, #80] @ (800bc70 <fifo_push+0x60>)
800bc1e: 881b ldrh r3, [r3, #0]
800bc20: b29b uxth r3, r3
800bc22: 3301 adds r3, #1
800bc24: b29b uxth r3, r3
800bc26: b2db uxtb r3, r3
800bc28: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
800bc2a: 89fa ldrh r2, [r7, #14]
800bc2c: 4b11 ldr r3, [pc, #68] @ (800bc74 <fifo_push+0x64>)
800bc2e: 881b ldrh r3, [r3, #0]
800bc30: b29b uxth r3, r3
800bc32: b2db uxtb r3, r3
800bc34: 429a cmp r2, r3
800bc36: d103 bne.n 800bc40 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
800bc38: 687b ldr r3, [r7, #4]
800bc3a: 3301 adds r3, #1
800bc3c: 607b str r3, [r7, #4]
continue;
800bc3e: e00c b.n 800bc5a <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800bc40: 687b ldr r3, [r7, #4]
800bc42: 1c5a adds r2, r3, #1
800bc44: 607a str r2, [r7, #4]
800bc46: 4a0a ldr r2, [pc, #40] @ (800bc70 <fifo_push+0x60>)
800bc48: 8812 ldrh r2, [r2, #0]
800bc4a: b292 uxth r2, r2
800bc4c: b2d2 uxtb r2, r2
800bc4e: 7819 ldrb r1, [r3, #0]
800bc50: 4b09 ldr r3, [pc, #36] @ (800bc78 <fifo_push+0x68>)
800bc52: 5499 strb r1, [r3, r2]
rx_head = next;
800bc54: 4a06 ldr r2, [pc, #24] @ (800bc70 <fifo_push+0x60>)
800bc56: 89fb ldrh r3, [r7, #14]
800bc58: 8013 strh r3, [r2, #0]
while (len--) {
800bc5a: 683b ldr r3, [r7, #0]
800bc5c: 1e5a subs r2, r3, #1
800bc5e: 603a str r2, [r7, #0]
800bc60: 2b00 cmp r3, #0
800bc62: d1db bne.n 800bc1c <fifo_push+0xc>
}
}
800bc64: bf00 nop
800bc66: bf00 nop
800bc68: 3714 adds r7, #20
800bc6a: 46bd mov sp, r7
800bc6c: bc80 pop {r7}
800bc6e: 4770 bx lr
800bc70: 20001020 .word 0x20001020
800bc74: 20001022 .word 0x20001022
800bc78: 20000f20 .word 0x20000f20
0800bc7c <CDC_Available>:
uint32_t CDC_Available(void) {
800bc7c: b480 push {r7}
800bc7e: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800bc80: 4b06 ldr r3, [pc, #24] @ (800bc9c <CDC_Available+0x20>)
800bc82: 881b ldrh r3, [r3, #0]
800bc84: b29a uxth r2, r3
800bc86: 4b06 ldr r3, [pc, #24] @ (800bca0 <CDC_Available+0x24>)
800bc88: 881b ldrh r3, [r3, #0]
800bc8a: b29b uxth r3, r3
800bc8c: 1ad3 subs r3, r2, r3
800bc8e: b29b uxth r3, r3
800bc90: b2db uxtb r3, r3
}
800bc92: 4618 mov r0, r3
800bc94: 46bd mov sp, r7
800bc96: bc80 pop {r7}
800bc98: 4770 bx lr
800bc9a: bf00 nop
800bc9c: 20001020 .word 0x20001020
800bca0: 20001022 .word 0x20001022
0800bca4 <CDC_ReadByte>:
int CDC_ReadByte(void) {
800bca4: b480 push {r7}
800bca6: b083 sub sp, #12
800bca8: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
800bcaa: 4b10 ldr r3, [pc, #64] @ (800bcec <CDC_ReadByte+0x48>)
800bcac: 881b ldrh r3, [r3, #0]
800bcae: b29a uxth r2, r3
800bcb0: 4b0f ldr r3, [pc, #60] @ (800bcf0 <CDC_ReadByte+0x4c>)
800bcb2: 881b ldrh r3, [r3, #0]
800bcb4: b29b uxth r3, r3
800bcb6: 429a cmp r2, r3
800bcb8: d102 bne.n 800bcc0 <CDC_ReadByte+0x1c>
800bcba: f04f 33ff mov.w r3, #4294967295
800bcbe: e010 b.n 800bce2 <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
800bcc0: 4b0a ldr r3, [pc, #40] @ (800bcec <CDC_ReadByte+0x48>)
800bcc2: 881b ldrh r3, [r3, #0]
800bcc4: b29b uxth r3, r3
800bcc6: b2db uxtb r3, r3
800bcc8: 4a0a ldr r2, [pc, #40] @ (800bcf4 <CDC_ReadByte+0x50>)
800bcca: 5cd3 ldrb r3, [r2, r3]
800bccc: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
800bcce: 4b07 ldr r3, [pc, #28] @ (800bcec <CDC_ReadByte+0x48>)
800bcd0: 881b ldrh r3, [r3, #0]
800bcd2: b29b uxth r3, r3
800bcd4: 3301 adds r3, #1
800bcd6: b29b uxth r3, r3
800bcd8: b2db uxtb r3, r3
800bcda: b29a uxth r2, r3
800bcdc: 4b03 ldr r3, [pc, #12] @ (800bcec <CDC_ReadByte+0x48>)
800bcde: 801a strh r2, [r3, #0]
return b;
800bce0: 687b ldr r3, [r7, #4]
}
800bce2: 4618 mov r0, r3
800bce4: 370c adds r7, #12
800bce6: 46bd mov sp, r7
800bce8: bc80 pop {r7}
800bcea: 4770 bx lr
800bcec: 20001022 .word 0x20001022
800bcf0: 20001020 .word 0x20001020
800bcf4: 20000f20 .word 0x20000f20
0800bcf8 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
800bcf8: b580 push {r7, lr}
800bcfa: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
800bcfc: 2200 movs r2, #0
800bcfe: 4905 ldr r1, [pc, #20] @ (800bd14 <CDC_Init_FS+0x1c>)
800bd00: 4805 ldr r0, [pc, #20] @ (800bd18 <CDC_Init_FS+0x20>)
800bd02: f7fe fe39 bl 800a978 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800bd06: 4905 ldr r1, [pc, #20] @ (800bd1c <CDC_Init_FS+0x24>)
800bd08: 4803 ldr r0, [pc, #12] @ (800bd18 <CDC_Init_FS+0x20>)
800bd0a: f7fe fe4e bl 800a9aa <USBD_CDC_SetRxBuffer>
return (USBD_OK);
800bd0e: 2300 movs r3, #0
/* USER CODE END 3 */
}
800bd10: 4618 mov r0, r3
800bd12: bd80 pop {r7, pc}
800bd14: 20000b20 .word 0x20000b20
800bd18: 2000045c .word 0x2000045c
800bd1c: 20000720 .word 0x20000720
0800bd20 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800bd20: b480 push {r7}
800bd22: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800bd24: 2300 movs r3, #0
/* USER CODE END 4 */
}
800bd26: 4618 mov r0, r3
800bd28: 46bd mov sp, r7
800bd2a: bc80 pop {r7}
800bd2c: 4770 bx lr
...
0800bd30 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800bd30: b480 push {r7}
800bd32: b083 sub sp, #12
800bd34: af00 add r7, sp, #0
800bd36: 4603 mov r3, r0
800bd38: 6039 str r1, [r7, #0]
800bd3a: 71fb strb r3, [r7, #7]
800bd3c: 4613 mov r3, r2
800bd3e: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800bd40: 79fb ldrb r3, [r7, #7]
800bd42: 2b23 cmp r3, #35 @ 0x23
800bd44: d84a bhi.n 800bddc <CDC_Control_FS+0xac>
800bd46: a201 add r2, pc, #4 @ (adr r2, 800bd4c <CDC_Control_FS+0x1c>)
800bd48: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800bd4c: 0800bddd .word 0x0800bddd
800bd50: 0800bddd .word 0x0800bddd
800bd54: 0800bddd .word 0x0800bddd
800bd58: 0800bddd .word 0x0800bddd
800bd5c: 0800bddd .word 0x0800bddd
800bd60: 0800bddd .word 0x0800bddd
800bd64: 0800bddd .word 0x0800bddd
800bd68: 0800bddd .word 0x0800bddd
800bd6c: 0800bddd .word 0x0800bddd
800bd70: 0800bddd .word 0x0800bddd
800bd74: 0800bddd .word 0x0800bddd
800bd78: 0800bddd .word 0x0800bddd
800bd7c: 0800bddd .word 0x0800bddd
800bd80: 0800bddd .word 0x0800bddd
800bd84: 0800bddd .word 0x0800bddd
800bd88: 0800bddd .word 0x0800bddd
800bd8c: 0800bddd .word 0x0800bddd
800bd90: 0800bddd .word 0x0800bddd
800bd94: 0800bddd .word 0x0800bddd
800bd98: 0800bddd .word 0x0800bddd
800bd9c: 0800bddd .word 0x0800bddd
800bda0: 0800bddd .word 0x0800bddd
800bda4: 0800bddd .word 0x0800bddd
800bda8: 0800bddd .word 0x0800bddd
800bdac: 0800bddd .word 0x0800bddd
800bdb0: 0800bddd .word 0x0800bddd
800bdb4: 0800bddd .word 0x0800bddd
800bdb8: 0800bddd .word 0x0800bddd
800bdbc: 0800bddd .word 0x0800bddd
800bdc0: 0800bddd .word 0x0800bddd
800bdc4: 0800bddd .word 0x0800bddd
800bdc8: 0800bddd .word 0x0800bddd
800bdcc: 0800bddd .word 0x0800bddd
800bdd0: 0800bddd .word 0x0800bddd
800bdd4: 0800bddd .word 0x0800bddd
800bdd8: 0800bddd .word 0x0800bddd
case CDC_SEND_BREAK:
break;
default:
break;
800bddc: bf00 nop
}
return (USBD_OK);
800bdde: 2300 movs r3, #0
/* USER CODE END 5 */
}
800bde0: 4618 mov r0, r3
800bde2: 370c adds r7, #12
800bde4: 46bd mov sp, r7
800bde6: bc80 pop {r7}
800bde8: 4770 bx lr
800bdea: bf00 nop
0800bdec <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800bdec: b580 push {r7, lr}
800bdee: b082 sub sp, #8
800bdf0: af00 add r7, sp, #0
800bdf2: 6078 str r0, [r7, #4]
800bdf4: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800bdf6: 683b ldr r3, [r7, #0]
800bdf8: 681b ldr r3, [r3, #0]
800bdfa: 2b00 cmp r3, #0
800bdfc: d005 beq.n 800be0a <CDC_Receive_FS+0x1e>
800bdfe: 683b ldr r3, [r7, #0]
800be00: 681b ldr r3, [r3, #0]
800be02: 4619 mov r1, r3
800be04: 6878 ldr r0, [r7, #4]
800be06: f7ff ff03 bl 800bc10 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800be0a: 6879 ldr r1, [r7, #4]
800be0c: 4805 ldr r0, [pc, #20] @ (800be24 <CDC_Receive_FS+0x38>)
800be0e: f7fe fdcc bl 800a9aa <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800be12: 4804 ldr r0, [pc, #16] @ (800be24 <CDC_Receive_FS+0x38>)
800be14: f7fe fe0b bl 800aa2e <USBD_CDC_ReceivePacket>
return (USBD_OK);
800be18: 2300 movs r3, #0
/* USER CODE END 6 */
}
800be1a: 4618 mov r0, r3
800be1c: 3708 adds r7, #8
800be1e: 46bd mov sp, r7
800be20: bd80 pop {r7, pc}
800be22: bf00 nop
800be24: 2000045c .word 0x2000045c
0800be28 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
800be28: b580 push {r7, lr}
800be2a: b084 sub sp, #16
800be2c: af00 add r7, sp, #0
800be2e: 6078 str r0, [r7, #4]
800be30: 460b mov r3, r1
800be32: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800be34: 2300 movs r3, #0
800be36: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800be38: 4b0d ldr r3, [pc, #52] @ (800be70 <CDC_Transmit_FS+0x48>)
800be3a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800be3e: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800be40: 68bb ldr r3, [r7, #8]
800be42: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800be46: 2b00 cmp r3, #0
800be48: d001 beq.n 800be4e <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800be4a: 2301 movs r3, #1
800be4c: e00b b.n 800be66 <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800be4e: 887b ldrh r3, [r7, #2]
800be50: 461a mov r2, r3
800be52: 6879 ldr r1, [r7, #4]
800be54: 4806 ldr r0, [pc, #24] @ (800be70 <CDC_Transmit_FS+0x48>)
800be56: f7fe fd8f bl 800a978 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800be5a: 4805 ldr r0, [pc, #20] @ (800be70 <CDC_Transmit_FS+0x48>)
800be5c: f7fe fdb8 bl 800a9d0 <USBD_CDC_TransmitPacket>
800be60: 4603 mov r3, r0
800be62: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800be64: 7bfb ldrb r3, [r7, #15]
}
800be66: 4618 mov r0, r3
800be68: 3710 adds r7, #16
800be6a: 46bd mov sp, r7
800be6c: bd80 pop {r7, pc}
800be6e: bf00 nop
800be70: 2000045c .word 0x2000045c
0800be74 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800be74: b480 push {r7}
800be76: b083 sub sp, #12
800be78: af00 add r7, sp, #0
800be7a: 4603 mov r3, r0
800be7c: 6039 str r1, [r7, #0]
800be7e: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800be80: 683b ldr r3, [r7, #0]
800be82: 2212 movs r2, #18
800be84: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800be86: 4b03 ldr r3, [pc, #12] @ (800be94 <USBD_FS_DeviceDescriptor+0x20>)
}
800be88: 4618 mov r0, r3
800be8a: 370c adds r7, #12
800be8c: 46bd mov sp, r7
800be8e: bc80 pop {r7}
800be90: 4770 bx lr
800be92: bf00 nop
800be94: 20000150 .word 0x20000150
0800be98 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800be98: b480 push {r7}
800be9a: b083 sub sp, #12
800be9c: af00 add r7, sp, #0
800be9e: 4603 mov r3, r0
800bea0: 6039 str r1, [r7, #0]
800bea2: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
800bea4: 683b ldr r3, [r7, #0]
800bea6: 2204 movs r2, #4
800bea8: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
800beaa: 4b03 ldr r3, [pc, #12] @ (800beb8 <USBD_FS_LangIDStrDescriptor+0x20>)
}
800beac: 4618 mov r0, r3
800beae: 370c adds r7, #12
800beb0: 46bd mov sp, r7
800beb2: bc80 pop {r7}
800beb4: 4770 bx lr
800beb6: bf00 nop
800beb8: 20000164 .word 0x20000164
0800bebc <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800bebc: b580 push {r7, lr}
800bebe: b082 sub sp, #8
800bec0: af00 add r7, sp, #0
800bec2: 4603 mov r3, r0
800bec4: 6039 str r1, [r7, #0]
800bec6: 71fb strb r3, [r7, #7]
if(speed == 0)
800bec8: 79fb ldrb r3, [r7, #7]
800beca: 2b00 cmp r3, #0
800becc: d105 bne.n 800beda <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800bece: 683a ldr r2, [r7, #0]
800bed0: 4907 ldr r1, [pc, #28] @ (800bef0 <USBD_FS_ProductStrDescriptor+0x34>)
800bed2: 4808 ldr r0, [pc, #32] @ (800bef4 <USBD_FS_ProductStrDescriptor+0x38>)
800bed4: f7ff fd8f bl 800b9f6 <USBD_GetString>
800bed8: e004 b.n 800bee4 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800beda: 683a ldr r2, [r7, #0]
800bedc: 4904 ldr r1, [pc, #16] @ (800bef0 <USBD_FS_ProductStrDescriptor+0x34>)
800bede: 4805 ldr r0, [pc, #20] @ (800bef4 <USBD_FS_ProductStrDescriptor+0x38>)
800bee0: f7ff fd89 bl 800b9f6 <USBD_GetString>
}
return USBD_StrDesc;
800bee4: 4b02 ldr r3, [pc, #8] @ (800bef0 <USBD_FS_ProductStrDescriptor+0x34>)
}
800bee6: 4618 mov r0, r3
800bee8: 3708 adds r7, #8
800beea: 46bd mov sp, r7
800beec: bd80 pop {r7, pc}
800beee: bf00 nop
800bef0: 20001024 .word 0x20001024
800bef4: 0800d160 .word 0x0800d160
0800bef8 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800bef8: b580 push {r7, lr}
800befa: b082 sub sp, #8
800befc: af00 add r7, sp, #0
800befe: 4603 mov r3, r0
800bf00: 6039 str r1, [r7, #0]
800bf02: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800bf04: 683a ldr r2, [r7, #0]
800bf06: 4904 ldr r1, [pc, #16] @ (800bf18 <USBD_FS_ManufacturerStrDescriptor+0x20>)
800bf08: 4804 ldr r0, [pc, #16] @ (800bf1c <USBD_FS_ManufacturerStrDescriptor+0x24>)
800bf0a: f7ff fd74 bl 800b9f6 <USBD_GetString>
return USBD_StrDesc;
800bf0e: 4b02 ldr r3, [pc, #8] @ (800bf18 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800bf10: 4618 mov r0, r3
800bf12: 3708 adds r7, #8
800bf14: 46bd mov sp, r7
800bf16: bd80 pop {r7, pc}
800bf18: 20001024 .word 0x20001024
800bf1c: 0800d178 .word 0x0800d178
0800bf20 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800bf20: b580 push {r7, lr}
800bf22: b082 sub sp, #8
800bf24: af00 add r7, sp, #0
800bf26: 4603 mov r3, r0
800bf28: 6039 str r1, [r7, #0]
800bf2a: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800bf2c: 683b ldr r3, [r7, #0]
800bf2e: 221a movs r2, #26
800bf30: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800bf32: f000 f843 bl 800bfbc <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800bf36: 4b02 ldr r3, [pc, #8] @ (800bf40 <USBD_FS_SerialStrDescriptor+0x20>)
}
800bf38: 4618 mov r0, r3
800bf3a: 3708 adds r7, #8
800bf3c: 46bd mov sp, r7
800bf3e: bd80 pop {r7, pc}
800bf40: 20000168 .word 0x20000168
0800bf44 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800bf44: b580 push {r7, lr}
800bf46: b082 sub sp, #8
800bf48: af00 add r7, sp, #0
800bf4a: 4603 mov r3, r0
800bf4c: 6039 str r1, [r7, #0]
800bf4e: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800bf50: 79fb ldrb r3, [r7, #7]
800bf52: 2b00 cmp r3, #0
800bf54: d105 bne.n 800bf62 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800bf56: 683a ldr r2, [r7, #0]
800bf58: 4907 ldr r1, [pc, #28] @ (800bf78 <USBD_FS_ConfigStrDescriptor+0x34>)
800bf5a: 4808 ldr r0, [pc, #32] @ (800bf7c <USBD_FS_ConfigStrDescriptor+0x38>)
800bf5c: f7ff fd4b bl 800b9f6 <USBD_GetString>
800bf60: e004 b.n 800bf6c <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800bf62: 683a ldr r2, [r7, #0]
800bf64: 4904 ldr r1, [pc, #16] @ (800bf78 <USBD_FS_ConfigStrDescriptor+0x34>)
800bf66: 4805 ldr r0, [pc, #20] @ (800bf7c <USBD_FS_ConfigStrDescriptor+0x38>)
800bf68: f7ff fd45 bl 800b9f6 <USBD_GetString>
}
return USBD_StrDesc;
800bf6c: 4b02 ldr r3, [pc, #8] @ (800bf78 <USBD_FS_ConfigStrDescriptor+0x34>)
}
800bf6e: 4618 mov r0, r3
800bf70: 3708 adds r7, #8
800bf72: 46bd mov sp, r7
800bf74: bd80 pop {r7, pc}
800bf76: bf00 nop
800bf78: 20001024 .word 0x20001024
800bf7c: 0800d18c .word 0x0800d18c
0800bf80 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800bf80: b580 push {r7, lr}
800bf82: b082 sub sp, #8
800bf84: af00 add r7, sp, #0
800bf86: 4603 mov r3, r0
800bf88: 6039 str r1, [r7, #0]
800bf8a: 71fb strb r3, [r7, #7]
if(speed == 0)
800bf8c: 79fb ldrb r3, [r7, #7]
800bf8e: 2b00 cmp r3, #0
800bf90: d105 bne.n 800bf9e <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800bf92: 683a ldr r2, [r7, #0]
800bf94: 4907 ldr r1, [pc, #28] @ (800bfb4 <USBD_FS_InterfaceStrDescriptor+0x34>)
800bf96: 4808 ldr r0, [pc, #32] @ (800bfb8 <USBD_FS_InterfaceStrDescriptor+0x38>)
800bf98: f7ff fd2d bl 800b9f6 <USBD_GetString>
800bf9c: e004 b.n 800bfa8 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800bf9e: 683a ldr r2, [r7, #0]
800bfa0: 4904 ldr r1, [pc, #16] @ (800bfb4 <USBD_FS_InterfaceStrDescriptor+0x34>)
800bfa2: 4805 ldr r0, [pc, #20] @ (800bfb8 <USBD_FS_InterfaceStrDescriptor+0x38>)
800bfa4: f7ff fd27 bl 800b9f6 <USBD_GetString>
}
return USBD_StrDesc;
800bfa8: 4b02 ldr r3, [pc, #8] @ (800bfb4 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800bfaa: 4618 mov r0, r3
800bfac: 3708 adds r7, #8
800bfae: 46bd mov sp, r7
800bfb0: bd80 pop {r7, pc}
800bfb2: bf00 nop
800bfb4: 20001024 .word 0x20001024
800bfb8: 0800d198 .word 0x0800d198
0800bfbc <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800bfbc: b580 push {r7, lr}
800bfbe: b084 sub sp, #16
800bfc0: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800bfc2: 4b0f ldr r3, [pc, #60] @ (800c000 <Get_SerialNum+0x44>)
800bfc4: 681b ldr r3, [r3, #0]
800bfc6: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800bfc8: 4b0e ldr r3, [pc, #56] @ (800c004 <Get_SerialNum+0x48>)
800bfca: 681b ldr r3, [r3, #0]
800bfcc: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800bfce: 4b0e ldr r3, [pc, #56] @ (800c008 <Get_SerialNum+0x4c>)
800bfd0: 681b ldr r3, [r3, #0]
800bfd2: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800bfd4: 68fa ldr r2, [r7, #12]
800bfd6: 687b ldr r3, [r7, #4]
800bfd8: 4413 add r3, r2
800bfda: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800bfdc: 68fb ldr r3, [r7, #12]
800bfde: 2b00 cmp r3, #0
800bfe0: d009 beq.n 800bff6 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800bfe2: 2208 movs r2, #8
800bfe4: 4909 ldr r1, [pc, #36] @ (800c00c <Get_SerialNum+0x50>)
800bfe6: 68f8 ldr r0, [r7, #12]
800bfe8: f000 f814 bl 800c014 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800bfec: 2204 movs r2, #4
800bfee: 4908 ldr r1, [pc, #32] @ (800c010 <Get_SerialNum+0x54>)
800bff0: 68b8 ldr r0, [r7, #8]
800bff2: f000 f80f bl 800c014 <IntToUnicode>
}
}
800bff6: bf00 nop
800bff8: 3710 adds r7, #16
800bffa: 46bd mov sp, r7
800bffc: bd80 pop {r7, pc}
800bffe: bf00 nop
800c000: 1ffff7e8 .word 0x1ffff7e8
800c004: 1ffff7ec .word 0x1ffff7ec
800c008: 1ffff7f0 .word 0x1ffff7f0
800c00c: 2000016a .word 0x2000016a
800c010: 2000017a .word 0x2000017a
0800c014 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800c014: b480 push {r7}
800c016: b087 sub sp, #28
800c018: af00 add r7, sp, #0
800c01a: 60f8 str r0, [r7, #12]
800c01c: 60b9 str r1, [r7, #8]
800c01e: 4613 mov r3, r2
800c020: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800c022: 2300 movs r3, #0
800c024: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800c026: 2300 movs r3, #0
800c028: 75fb strb r3, [r7, #23]
800c02a: e027 b.n 800c07c <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800c02c: 68fb ldr r3, [r7, #12]
800c02e: 0f1b lsrs r3, r3, #28
800c030: 2b09 cmp r3, #9
800c032: d80b bhi.n 800c04c <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800c034: 68fb ldr r3, [r7, #12]
800c036: 0f1b lsrs r3, r3, #28
800c038: b2da uxtb r2, r3
800c03a: 7dfb ldrb r3, [r7, #23]
800c03c: 005b lsls r3, r3, #1
800c03e: 4619 mov r1, r3
800c040: 68bb ldr r3, [r7, #8]
800c042: 440b add r3, r1
800c044: 3230 adds r2, #48 @ 0x30
800c046: b2d2 uxtb r2, r2
800c048: 701a strb r2, [r3, #0]
800c04a: e00a b.n 800c062 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800c04c: 68fb ldr r3, [r7, #12]
800c04e: 0f1b lsrs r3, r3, #28
800c050: b2da uxtb r2, r3
800c052: 7dfb ldrb r3, [r7, #23]
800c054: 005b lsls r3, r3, #1
800c056: 4619 mov r1, r3
800c058: 68bb ldr r3, [r7, #8]
800c05a: 440b add r3, r1
800c05c: 3237 adds r2, #55 @ 0x37
800c05e: b2d2 uxtb r2, r2
800c060: 701a strb r2, [r3, #0]
}
value = value << 4;
800c062: 68fb ldr r3, [r7, #12]
800c064: 011b lsls r3, r3, #4
800c066: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800c068: 7dfb ldrb r3, [r7, #23]
800c06a: 005b lsls r3, r3, #1
800c06c: 3301 adds r3, #1
800c06e: 68ba ldr r2, [r7, #8]
800c070: 4413 add r3, r2
800c072: 2200 movs r2, #0
800c074: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800c076: 7dfb ldrb r3, [r7, #23]
800c078: 3301 adds r3, #1
800c07a: 75fb strb r3, [r7, #23]
800c07c: 7dfa ldrb r2, [r7, #23]
800c07e: 79fb ldrb r3, [r7, #7]
800c080: 429a cmp r2, r3
800c082: d3d3 bcc.n 800c02c <IntToUnicode+0x18>
}
}
800c084: bf00 nop
800c086: bf00 nop
800c088: 371c adds r7, #28
800c08a: 46bd mov sp, r7
800c08c: bc80 pop {r7}
800c08e: 4770 bx lr
0800c090 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800c090: b580 push {r7, lr}
800c092: b084 sub sp, #16
800c094: af00 add r7, sp, #0
800c096: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800c098: 687b ldr r3, [r7, #4]
800c09a: 681b ldr r3, [r3, #0]
800c09c: 4a0d ldr r2, [pc, #52] @ (800c0d4 <HAL_PCD_MspInit+0x44>)
800c09e: 4293 cmp r3, r2
800c0a0: d113 bne.n 800c0ca <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800c0a2: 4b0d ldr r3, [pc, #52] @ (800c0d8 <HAL_PCD_MspInit+0x48>)
800c0a4: 69db ldr r3, [r3, #28]
800c0a6: 4a0c ldr r2, [pc, #48] @ (800c0d8 <HAL_PCD_MspInit+0x48>)
800c0a8: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800c0ac: 61d3 str r3, [r2, #28]
800c0ae: 4b0a ldr r3, [pc, #40] @ (800c0d8 <HAL_PCD_MspInit+0x48>)
800c0b0: 69db ldr r3, [r3, #28]
800c0b2: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800c0b6: 60fb str r3, [r7, #12]
800c0b8: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800c0ba: 2200 movs r2, #0
800c0bc: 2100 movs r1, #0
800c0be: 2014 movs r0, #20
800c0c0: f7f7 ff09 bl 8003ed6 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800c0c4: 2014 movs r0, #20
800c0c6: f7f7 ff22 bl 8003f0e <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800c0ca: bf00 nop
800c0cc: 3710 adds r7, #16
800c0ce: 46bd mov sp, r7
800c0d0: bd80 pop {r7, pc}
800c0d2: bf00 nop
800c0d4: 40005c00 .word 0x40005c00
800c0d8: 40021000 .word 0x40021000
0800c0dc <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800c0dc: b580 push {r7, lr}
800c0de: b082 sub sp, #8
800c0e0: af00 add r7, sp, #0
800c0e2: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800c0e4: 687b ldr r3, [r7, #4]
800c0e6: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800c0ea: 687b ldr r3, [r7, #4]
800c0ec: f503 7326 add.w r3, r3, #664 @ 0x298
800c0f0: 4619 mov r1, r3
800c0f2: 4610 mov r0, r2
800c0f4: f7fe fd51 bl 800ab9a <USBD_LL_SetupStage>
}
800c0f8: bf00 nop
800c0fa: 3708 adds r7, #8
800c0fc: 46bd mov sp, r7
800c0fe: bd80 pop {r7, pc}
0800c100 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800c100: b580 push {r7, lr}
800c102: b082 sub sp, #8
800c104: af00 add r7, sp, #0
800c106: 6078 str r0, [r7, #4]
800c108: 460b mov r3, r1
800c10a: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800c10c: 687b ldr r3, [r7, #4]
800c10e: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800c112: 78fa ldrb r2, [r7, #3]
800c114: 6879 ldr r1, [r7, #4]
800c116: 4613 mov r3, r2
800c118: 009b lsls r3, r3, #2
800c11a: 4413 add r3, r2
800c11c: 00db lsls r3, r3, #3
800c11e: 440b add r3, r1
800c120: f503 73b2 add.w r3, r3, #356 @ 0x164
800c124: 681a ldr r2, [r3, #0]
800c126: 78fb ldrb r3, [r7, #3]
800c128: 4619 mov r1, r3
800c12a: f7fe fd83 bl 800ac34 <USBD_LL_DataOutStage>
}
800c12e: bf00 nop
800c130: 3708 adds r7, #8
800c132: 46bd mov sp, r7
800c134: bd80 pop {r7, pc}
0800c136 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800c136: b580 push {r7, lr}
800c138: b082 sub sp, #8
800c13a: af00 add r7, sp, #0
800c13c: 6078 str r0, [r7, #4]
800c13e: 460b mov r3, r1
800c140: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800c142: 687b ldr r3, [r7, #4]
800c144: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800c148: 78fa ldrb r2, [r7, #3]
800c14a: 6879 ldr r1, [r7, #4]
800c14c: 4613 mov r3, r2
800c14e: 009b lsls r3, r3, #2
800c150: 4413 add r3, r2
800c152: 00db lsls r3, r3, #3
800c154: 440b add r3, r1
800c156: 3324 adds r3, #36 @ 0x24
800c158: 681a ldr r2, [r3, #0]
800c15a: 78fb ldrb r3, [r7, #3]
800c15c: 4619 mov r1, r3
800c15e: f7fe fdda bl 800ad16 <USBD_LL_DataInStage>
}
800c162: bf00 nop
800c164: 3708 adds r7, #8
800c166: 46bd mov sp, r7
800c168: bd80 pop {r7, pc}
0800c16a <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800c16a: b580 push {r7, lr}
800c16c: b082 sub sp, #8
800c16e: af00 add r7, sp, #0
800c170: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800c172: 687b ldr r3, [r7, #4]
800c174: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800c178: 4618 mov r0, r3
800c17a: f7fe feea bl 800af52 <USBD_LL_SOF>
}
800c17e: bf00 nop
800c180: 3708 adds r7, #8
800c182: 46bd mov sp, r7
800c184: bd80 pop {r7, pc}
0800c186 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800c186: b580 push {r7, lr}
800c188: b084 sub sp, #16
800c18a: af00 add r7, sp, #0
800c18c: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800c18e: 2301 movs r3, #1
800c190: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800c192: 687b ldr r3, [r7, #4]
800c194: 799b ldrb r3, [r3, #6]
800c196: 2b02 cmp r3, #2
800c198: d001 beq.n 800c19e <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800c19a: f7f6 fb3b bl 8002814 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800c19e: 687b ldr r3, [r7, #4]
800c1a0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800c1a4: 7bfa ldrb r2, [r7, #15]
800c1a6: 4611 mov r1, r2
800c1a8: 4618 mov r0, r3
800c1aa: f7fe fe9a bl 800aee2 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800c1ae: 687b ldr r3, [r7, #4]
800c1b0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800c1b4: 4618 mov r0, r3
800c1b6: f7fe fe53 bl 800ae60 <USBD_LL_Reset>
}
800c1ba: bf00 nop
800c1bc: 3710 adds r7, #16
800c1be: 46bd mov sp, r7
800c1c0: bd80 pop {r7, pc}
...
0800c1c4 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800c1c4: b580 push {r7, lr}
800c1c6: b082 sub sp, #8
800c1c8: af00 add r7, sp, #0
800c1ca: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800c1cc: 687b ldr r3, [r7, #4]
800c1ce: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800c1d2: 4618 mov r0, r3
800c1d4: f7fe fe94 bl 800af00 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800c1d8: 687b ldr r3, [r7, #4]
800c1da: 7a9b ldrb r3, [r3, #10]
800c1dc: 2b00 cmp r3, #0
800c1de: d005 beq.n 800c1ec <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800c1e0: 4b04 ldr r3, [pc, #16] @ (800c1f4 <HAL_PCD_SuspendCallback+0x30>)
800c1e2: 691b ldr r3, [r3, #16]
800c1e4: 4a03 ldr r2, [pc, #12] @ (800c1f4 <HAL_PCD_SuspendCallback+0x30>)
800c1e6: f043 0306 orr.w r3, r3, #6
800c1ea: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800c1ec: bf00 nop
800c1ee: 3708 adds r7, #8
800c1f0: 46bd mov sp, r7
800c1f2: bd80 pop {r7, pc}
800c1f4: e000ed00 .word 0xe000ed00
0800c1f8 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800c1f8: b580 push {r7, lr}
800c1fa: b082 sub sp, #8
800c1fc: af00 add r7, sp, #0
800c1fe: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800c200: 687b ldr r3, [r7, #4]
800c202: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800c206: 4618 mov r0, r3
800c208: f7fe fe8e bl 800af28 <USBD_LL_Resume>
}
800c20c: bf00 nop
800c20e: 3708 adds r7, #8
800c210: 46bd mov sp, r7
800c212: bd80 pop {r7, pc}
0800c214 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800c214: b580 push {r7, lr}
800c216: b082 sub sp, #8
800c218: af00 add r7, sp, #0
800c21a: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800c21c: 4a28 ldr r2, [pc, #160] @ (800c2c0 <USBD_LL_Init+0xac>)
800c21e: 687b ldr r3, [r7, #4]
800c220: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800c224: 687b ldr r3, [r7, #4]
800c226: 4a26 ldr r2, [pc, #152] @ (800c2c0 <USBD_LL_Init+0xac>)
800c228: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800c22c: 4b24 ldr r3, [pc, #144] @ (800c2c0 <USBD_LL_Init+0xac>)
800c22e: 4a25 ldr r2, [pc, #148] @ (800c2c4 <USBD_LL_Init+0xb0>)
800c230: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800c232: 4b23 ldr r3, [pc, #140] @ (800c2c0 <USBD_LL_Init+0xac>)
800c234: 2208 movs r2, #8
800c236: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800c238: 4b21 ldr r3, [pc, #132] @ (800c2c0 <USBD_LL_Init+0xac>)
800c23a: 2202 movs r2, #2
800c23c: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800c23e: 4b20 ldr r3, [pc, #128] @ (800c2c0 <USBD_LL_Init+0xac>)
800c240: 2200 movs r2, #0
800c242: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800c244: 4b1e ldr r3, [pc, #120] @ (800c2c0 <USBD_LL_Init+0xac>)
800c246: 2200 movs r2, #0
800c248: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800c24a: 4b1d ldr r3, [pc, #116] @ (800c2c0 <USBD_LL_Init+0xac>)
800c24c: 2200 movs r2, #0
800c24e: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800c250: 481b ldr r0, [pc, #108] @ (800c2c0 <USBD_LL_Init+0xac>)
800c252: f7f8 fc37 bl 8004ac4 <HAL_PCD_Init>
800c256: 4603 mov r3, r0
800c258: 2b00 cmp r3, #0
800c25a: d001 beq.n 800c260 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800c25c: f7f6 fada bl 8002814 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800c260: 687b ldr r3, [r7, #4]
800c262: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800c266: 2318 movs r3, #24
800c268: 2200 movs r2, #0
800c26a: 2100 movs r1, #0
800c26c: f7fa f948 bl 8006500 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800c270: 687b ldr r3, [r7, #4]
800c272: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800c276: 2358 movs r3, #88 @ 0x58
800c278: 2200 movs r2, #0
800c27a: 2180 movs r1, #128 @ 0x80
800c27c: f7fa f940 bl 8006500 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800c280: 687b ldr r3, [r7, #4]
800c282: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800c286: 23c0 movs r3, #192 @ 0xc0
800c288: 2200 movs r2, #0
800c28a: 2181 movs r1, #129 @ 0x81
800c28c: f7fa f938 bl 8006500 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800c290: 687b ldr r3, [r7, #4]
800c292: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800c296: f44f 7388 mov.w r3, #272 @ 0x110
800c29a: 2200 movs r2, #0
800c29c: 2101 movs r1, #1
800c29e: f7fa f92f bl 8006500 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800c2a2: 687b ldr r3, [r7, #4]
800c2a4: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800c2a8: f44f 7380 mov.w r3, #256 @ 0x100
800c2ac: 2200 movs r2, #0
800c2ae: 2182 movs r1, #130 @ 0x82
800c2b0: f7fa f926 bl 8006500 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800c2b4: 2300 movs r3, #0
}
800c2b6: 4618 mov r0, r3
800c2b8: 3708 adds r7, #8
800c2ba: 46bd mov sp, r7
800c2bc: bd80 pop {r7, pc}
800c2be: bf00 nop
800c2c0: 20001224 .word 0x20001224
800c2c4: 40005c00 .word 0x40005c00
0800c2c8 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800c2c8: b580 push {r7, lr}
800c2ca: b084 sub sp, #16
800c2cc: af00 add r7, sp, #0
800c2ce: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800c2d0: 2300 movs r3, #0
800c2d2: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800c2d4: 2300 movs r3, #0
800c2d6: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800c2d8: 687b ldr r3, [r7, #4]
800c2da: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c2de: 4618 mov r0, r3
800c2e0: f7f8 fce6 bl 8004cb0 <HAL_PCD_Start>
800c2e4: 4603 mov r3, r0
800c2e6: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800c2e8: 7bfb ldrb r3, [r7, #15]
800c2ea: 4618 mov r0, r3
800c2ec: f000 f94e bl 800c58c <USBD_Get_USB_Status>
800c2f0: 4603 mov r3, r0
800c2f2: 73bb strb r3, [r7, #14]
return usb_status;
800c2f4: 7bbb ldrb r3, [r7, #14]
}
800c2f6: 4618 mov r0, r3
800c2f8: 3710 adds r7, #16
800c2fa: 46bd mov sp, r7
800c2fc: bd80 pop {r7, pc}
0800c2fe <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800c2fe: b580 push {r7, lr}
800c300: b084 sub sp, #16
800c302: af00 add r7, sp, #0
800c304: 6078 str r0, [r7, #4]
800c306: 4608 mov r0, r1
800c308: 4611 mov r1, r2
800c30a: 461a mov r2, r3
800c30c: 4603 mov r3, r0
800c30e: 70fb strb r3, [r7, #3]
800c310: 460b mov r3, r1
800c312: 70bb strb r3, [r7, #2]
800c314: 4613 mov r3, r2
800c316: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800c318: 2300 movs r3, #0
800c31a: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800c31c: 2300 movs r3, #0
800c31e: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800c320: 687b ldr r3, [r7, #4]
800c322: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800c326: 78bb ldrb r3, [r7, #2]
800c328: 883a ldrh r2, [r7, #0]
800c32a: 78f9 ldrb r1, [r7, #3]
800c32c: f7f8 fe3a bl 8004fa4 <HAL_PCD_EP_Open>
800c330: 4603 mov r3, r0
800c332: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800c334: 7bfb ldrb r3, [r7, #15]
800c336: 4618 mov r0, r3
800c338: f000 f928 bl 800c58c <USBD_Get_USB_Status>
800c33c: 4603 mov r3, r0
800c33e: 73bb strb r3, [r7, #14]
return usb_status;
800c340: 7bbb ldrb r3, [r7, #14]
}
800c342: 4618 mov r0, r3
800c344: 3710 adds r7, #16
800c346: 46bd mov sp, r7
800c348: bd80 pop {r7, pc}
0800c34a <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800c34a: b580 push {r7, lr}
800c34c: b084 sub sp, #16
800c34e: af00 add r7, sp, #0
800c350: 6078 str r0, [r7, #4]
800c352: 460b mov r3, r1
800c354: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800c356: 2300 movs r3, #0
800c358: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800c35a: 2300 movs r3, #0
800c35c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800c35e: 687b ldr r3, [r7, #4]
800c360: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c364: 78fa ldrb r2, [r7, #3]
800c366: 4611 mov r1, r2
800c368: 4618 mov r0, r3
800c36a: f7f8 fe78 bl 800505e <HAL_PCD_EP_Close>
800c36e: 4603 mov r3, r0
800c370: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800c372: 7bfb ldrb r3, [r7, #15]
800c374: 4618 mov r0, r3
800c376: f000 f909 bl 800c58c <USBD_Get_USB_Status>
800c37a: 4603 mov r3, r0
800c37c: 73bb strb r3, [r7, #14]
return usb_status;
800c37e: 7bbb ldrb r3, [r7, #14]
}
800c380: 4618 mov r0, r3
800c382: 3710 adds r7, #16
800c384: 46bd mov sp, r7
800c386: bd80 pop {r7, pc}
0800c388 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800c388: b580 push {r7, lr}
800c38a: b084 sub sp, #16
800c38c: af00 add r7, sp, #0
800c38e: 6078 str r0, [r7, #4]
800c390: 460b mov r3, r1
800c392: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800c394: 2300 movs r3, #0
800c396: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800c398: 2300 movs r3, #0
800c39a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800c39c: 687b ldr r3, [r7, #4]
800c39e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c3a2: 78fa ldrb r2, [r7, #3]
800c3a4: 4611 mov r1, r2
800c3a6: 4618 mov r0, r3
800c3a8: f7f8 ff20 bl 80051ec <HAL_PCD_EP_SetStall>
800c3ac: 4603 mov r3, r0
800c3ae: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800c3b0: 7bfb ldrb r3, [r7, #15]
800c3b2: 4618 mov r0, r3
800c3b4: f000 f8ea bl 800c58c <USBD_Get_USB_Status>
800c3b8: 4603 mov r3, r0
800c3ba: 73bb strb r3, [r7, #14]
return usb_status;
800c3bc: 7bbb ldrb r3, [r7, #14]
}
800c3be: 4618 mov r0, r3
800c3c0: 3710 adds r7, #16
800c3c2: 46bd mov sp, r7
800c3c4: bd80 pop {r7, pc}
0800c3c6 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800c3c6: b580 push {r7, lr}
800c3c8: b084 sub sp, #16
800c3ca: af00 add r7, sp, #0
800c3cc: 6078 str r0, [r7, #4]
800c3ce: 460b mov r3, r1
800c3d0: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800c3d2: 2300 movs r3, #0
800c3d4: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800c3d6: 2300 movs r3, #0
800c3d8: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800c3da: 687b ldr r3, [r7, #4]
800c3dc: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c3e0: 78fa ldrb r2, [r7, #3]
800c3e2: 4611 mov r1, r2
800c3e4: 4618 mov r0, r3
800c3e6: f7f8 ff61 bl 80052ac <HAL_PCD_EP_ClrStall>
800c3ea: 4603 mov r3, r0
800c3ec: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800c3ee: 7bfb ldrb r3, [r7, #15]
800c3f0: 4618 mov r0, r3
800c3f2: f000 f8cb bl 800c58c <USBD_Get_USB_Status>
800c3f6: 4603 mov r3, r0
800c3f8: 73bb strb r3, [r7, #14]
return usb_status;
800c3fa: 7bbb ldrb r3, [r7, #14]
}
800c3fc: 4618 mov r0, r3
800c3fe: 3710 adds r7, #16
800c400: 46bd mov sp, r7
800c402: bd80 pop {r7, pc}
0800c404 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800c404: b480 push {r7}
800c406: b085 sub sp, #20
800c408: af00 add r7, sp, #0
800c40a: 6078 str r0, [r7, #4]
800c40c: 460b mov r3, r1
800c40e: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800c410: 687b ldr r3, [r7, #4]
800c412: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c416: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800c418: f997 3003 ldrsb.w r3, [r7, #3]
800c41c: 2b00 cmp r3, #0
800c41e: da0b bge.n 800c438 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800c420: 78fb ldrb r3, [r7, #3]
800c422: f003 027f and.w r2, r3, #127 @ 0x7f
800c426: 68f9 ldr r1, [r7, #12]
800c428: 4613 mov r3, r2
800c42a: 009b lsls r3, r3, #2
800c42c: 4413 add r3, r2
800c42e: 00db lsls r3, r3, #3
800c430: 440b add r3, r1
800c432: 3312 adds r3, #18
800c434: 781b ldrb r3, [r3, #0]
800c436: e00b b.n 800c450 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800c438: 78fb ldrb r3, [r7, #3]
800c43a: f003 027f and.w r2, r3, #127 @ 0x7f
800c43e: 68f9 ldr r1, [r7, #12]
800c440: 4613 mov r3, r2
800c442: 009b lsls r3, r3, #2
800c444: 4413 add r3, r2
800c446: 00db lsls r3, r3, #3
800c448: 440b add r3, r1
800c44a: f503 73a9 add.w r3, r3, #338 @ 0x152
800c44e: 781b ldrb r3, [r3, #0]
}
}
800c450: 4618 mov r0, r3
800c452: 3714 adds r7, #20
800c454: 46bd mov sp, r7
800c456: bc80 pop {r7}
800c458: 4770 bx lr
0800c45a <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800c45a: b580 push {r7, lr}
800c45c: b084 sub sp, #16
800c45e: af00 add r7, sp, #0
800c460: 6078 str r0, [r7, #4]
800c462: 460b mov r3, r1
800c464: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800c466: 2300 movs r3, #0
800c468: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800c46a: 2300 movs r3, #0
800c46c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800c46e: 687b ldr r3, [r7, #4]
800c470: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c474: 78fa ldrb r2, [r7, #3]
800c476: 4611 mov r1, r2
800c478: 4618 mov r0, r3
800c47a: f7f8 fd6f bl 8004f5c <HAL_PCD_SetAddress>
800c47e: 4603 mov r3, r0
800c480: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800c482: 7bfb ldrb r3, [r7, #15]
800c484: 4618 mov r0, r3
800c486: f000 f881 bl 800c58c <USBD_Get_USB_Status>
800c48a: 4603 mov r3, r0
800c48c: 73bb strb r3, [r7, #14]
return usb_status;
800c48e: 7bbb ldrb r3, [r7, #14]
}
800c490: 4618 mov r0, r3
800c492: 3710 adds r7, #16
800c494: 46bd mov sp, r7
800c496: bd80 pop {r7, pc}
0800c498 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800c498: b580 push {r7, lr}
800c49a: b086 sub sp, #24
800c49c: af00 add r7, sp, #0
800c49e: 60f8 str r0, [r7, #12]
800c4a0: 607a str r2, [r7, #4]
800c4a2: 461a mov r2, r3
800c4a4: 460b mov r3, r1
800c4a6: 72fb strb r3, [r7, #11]
800c4a8: 4613 mov r3, r2
800c4aa: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800c4ac: 2300 movs r3, #0
800c4ae: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800c4b0: 2300 movs r3, #0
800c4b2: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800c4b4: 68fb ldr r3, [r7, #12]
800c4b6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800c4ba: 893b ldrh r3, [r7, #8]
800c4bc: 7af9 ldrb r1, [r7, #11]
800c4be: 687a ldr r2, [r7, #4]
800c4c0: f7f8 fe5d bl 800517e <HAL_PCD_EP_Transmit>
800c4c4: 4603 mov r3, r0
800c4c6: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800c4c8: 7dfb ldrb r3, [r7, #23]
800c4ca: 4618 mov r0, r3
800c4cc: f000 f85e bl 800c58c <USBD_Get_USB_Status>
800c4d0: 4603 mov r3, r0
800c4d2: 75bb strb r3, [r7, #22]
return usb_status;
800c4d4: 7dbb ldrb r3, [r7, #22]
}
800c4d6: 4618 mov r0, r3
800c4d8: 3718 adds r7, #24
800c4da: 46bd mov sp, r7
800c4dc: bd80 pop {r7, pc}
0800c4de <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800c4de: b580 push {r7, lr}
800c4e0: b086 sub sp, #24
800c4e2: af00 add r7, sp, #0
800c4e4: 60f8 str r0, [r7, #12]
800c4e6: 607a str r2, [r7, #4]
800c4e8: 461a mov r2, r3
800c4ea: 460b mov r3, r1
800c4ec: 72fb strb r3, [r7, #11]
800c4ee: 4613 mov r3, r2
800c4f0: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800c4f2: 2300 movs r3, #0
800c4f4: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800c4f6: 2300 movs r3, #0
800c4f8: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800c4fa: 68fb ldr r3, [r7, #12]
800c4fc: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800c500: 893b ldrh r3, [r7, #8]
800c502: 7af9 ldrb r1, [r7, #11]
800c504: 687a ldr r2, [r7, #4]
800c506: f7f8 fdf2 bl 80050ee <HAL_PCD_EP_Receive>
800c50a: 4603 mov r3, r0
800c50c: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800c50e: 7dfb ldrb r3, [r7, #23]
800c510: 4618 mov r0, r3
800c512: f000 f83b bl 800c58c <USBD_Get_USB_Status>
800c516: 4603 mov r3, r0
800c518: 75bb strb r3, [r7, #22]
return usb_status;
800c51a: 7dbb ldrb r3, [r7, #22]
}
800c51c: 4618 mov r0, r3
800c51e: 3718 adds r7, #24
800c520: 46bd mov sp, r7
800c522: bd80 pop {r7, pc}
0800c524 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800c524: b580 push {r7, lr}
800c526: b082 sub sp, #8
800c528: af00 add r7, sp, #0
800c52a: 6078 str r0, [r7, #4]
800c52c: 460b mov r3, r1
800c52e: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800c530: 687b ldr r3, [r7, #4]
800c532: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c536: 78fa ldrb r2, [r7, #3]
800c538: 4611 mov r1, r2
800c53a: 4618 mov r0, r3
800c53c: f7f8 fe08 bl 8005150 <HAL_PCD_EP_GetRxCount>
800c540: 4603 mov r3, r0
}
800c542: 4618 mov r0, r3
800c544: 3708 adds r7, #8
800c546: 46bd mov sp, r7
800c548: bd80 pop {r7, pc}
...
0800c54c <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800c54c: b480 push {r7}
800c54e: b083 sub sp, #12
800c550: af00 add r7, sp, #0
800c552: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800c554: 4b02 ldr r3, [pc, #8] @ (800c560 <USBD_static_malloc+0x14>)
}
800c556: 4618 mov r0, r3
800c558: 370c adds r7, #12
800c55a: 46bd mov sp, r7
800c55c: bc80 pop {r7}
800c55e: 4770 bx lr
800c560: 200014fc .word 0x200014fc
0800c564 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800c564: b480 push {r7}
800c566: b083 sub sp, #12
800c568: af00 add r7, sp, #0
800c56a: 6078 str r0, [r7, #4]
}
800c56c: bf00 nop
800c56e: 370c adds r7, #12
800c570: 46bd mov sp, r7
800c572: bc80 pop {r7}
800c574: 4770 bx lr
0800c576 <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800c576: b480 push {r7}
800c578: b083 sub sp, #12
800c57a: af00 add r7, sp, #0
800c57c: 6078 str r0, [r7, #4]
800c57e: 460b mov r3, r1
800c580: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800c582: bf00 nop
800c584: 370c adds r7, #12
800c586: 46bd mov sp, r7
800c588: bc80 pop {r7}
800c58a: 4770 bx lr
0800c58c <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800c58c: b480 push {r7}
800c58e: b085 sub sp, #20
800c590: af00 add r7, sp, #0
800c592: 4603 mov r3, r0
800c594: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800c596: 2300 movs r3, #0
800c598: 73fb strb r3, [r7, #15]
switch (hal_status)
800c59a: 79fb ldrb r3, [r7, #7]
800c59c: 2b03 cmp r3, #3
800c59e: d817 bhi.n 800c5d0 <USBD_Get_USB_Status+0x44>
800c5a0: a201 add r2, pc, #4 @ (adr r2, 800c5a8 <USBD_Get_USB_Status+0x1c>)
800c5a2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c5a6: bf00 nop
800c5a8: 0800c5b9 .word 0x0800c5b9
800c5ac: 0800c5bf .word 0x0800c5bf
800c5b0: 0800c5c5 .word 0x0800c5c5
800c5b4: 0800c5cb .word 0x0800c5cb
{
case HAL_OK :
usb_status = USBD_OK;
800c5b8: 2300 movs r3, #0
800c5ba: 73fb strb r3, [r7, #15]
break;
800c5bc: e00b b.n 800c5d6 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800c5be: 2302 movs r3, #2
800c5c0: 73fb strb r3, [r7, #15]
break;
800c5c2: e008 b.n 800c5d6 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800c5c4: 2301 movs r3, #1
800c5c6: 73fb strb r3, [r7, #15]
break;
800c5c8: e005 b.n 800c5d6 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800c5ca: 2302 movs r3, #2
800c5cc: 73fb strb r3, [r7, #15]
break;
800c5ce: e002 b.n 800c5d6 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800c5d0: 2302 movs r3, #2
800c5d2: 73fb strb r3, [r7, #15]
break;
800c5d4: bf00 nop
}
return usb_status;
800c5d6: 7bfb ldrb r3, [r7, #15]
}
800c5d8: 4618 mov r0, r3
800c5da: 3714 adds r7, #20
800c5dc: 46bd mov sp, r7
800c5de: bc80 pop {r7}
800c5e0: 4770 bx lr
800c5e2: bf00 nop
0800c5e4 <siprintf>:
800c5e4: b40e push {r1, r2, r3}
800c5e6: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800c5ea: b510 push {r4, lr}
800c5ec: 2400 movs r4, #0
800c5ee: b09d sub sp, #116 @ 0x74
800c5f0: ab1f add r3, sp, #124 @ 0x7c
800c5f2: 9002 str r0, [sp, #8]
800c5f4: 9006 str r0, [sp, #24]
800c5f6: 9107 str r1, [sp, #28]
800c5f8: 9104 str r1, [sp, #16]
800c5fa: 4809 ldr r0, [pc, #36] @ (800c620 <siprintf+0x3c>)
800c5fc: 4909 ldr r1, [pc, #36] @ (800c624 <siprintf+0x40>)
800c5fe: f853 2b04 ldr.w r2, [r3], #4
800c602: 9105 str r1, [sp, #20]
800c604: 6800 ldr r0, [r0, #0]
800c606: a902 add r1, sp, #8
800c608: 9301 str r3, [sp, #4]
800c60a: 941b str r4, [sp, #108] @ 0x6c
800c60c: f000 f992 bl 800c934 <_svfiprintf_r>
800c610: 9b02 ldr r3, [sp, #8]
800c612: 701c strb r4, [r3, #0]
800c614: b01d add sp, #116 @ 0x74
800c616: e8bd 4010 ldmia.w sp!, {r4, lr}
800c61a: b003 add sp, #12
800c61c: 4770 bx lr
800c61e: bf00 nop
800c620: 20000184 .word 0x20000184
800c624: ffff0208 .word 0xffff0208
0800c628 <memset>:
800c628: 4603 mov r3, r0
800c62a: 4402 add r2, r0
800c62c: 4293 cmp r3, r2
800c62e: d100 bne.n 800c632 <memset+0xa>
800c630: 4770 bx lr
800c632: f803 1b01 strb.w r1, [r3], #1
800c636: e7f9 b.n 800c62c <memset+0x4>
0800c638 <__errno>:
800c638: 4b01 ldr r3, [pc, #4] @ (800c640 <__errno+0x8>)
800c63a: 6818 ldr r0, [r3, #0]
800c63c: 4770 bx lr
800c63e: bf00 nop
800c640: 20000184 .word 0x20000184
0800c644 <__libc_init_array>:
800c644: b570 push {r4, r5, r6, lr}
800c646: 2600 movs r6, #0
800c648: 4d0c ldr r5, [pc, #48] @ (800c67c <__libc_init_array+0x38>)
800c64a: 4c0d ldr r4, [pc, #52] @ (800c680 <__libc_init_array+0x3c>)
800c64c: 1b64 subs r4, r4, r5
800c64e: 10a4 asrs r4, r4, #2
800c650: 42a6 cmp r6, r4
800c652: d109 bne.n 800c668 <__libc_init_array+0x24>
800c654: f000 fc76 bl 800cf44 <_init>
800c658: 2600 movs r6, #0
800c65a: 4d0a ldr r5, [pc, #40] @ (800c684 <__libc_init_array+0x40>)
800c65c: 4c0a ldr r4, [pc, #40] @ (800c688 <__libc_init_array+0x44>)
800c65e: 1b64 subs r4, r4, r5
800c660: 10a4 asrs r4, r4, #2
800c662: 42a6 cmp r6, r4
800c664: d105 bne.n 800c672 <__libc_init_array+0x2e>
800c666: bd70 pop {r4, r5, r6, pc}
800c668: f855 3b04 ldr.w r3, [r5], #4
800c66c: 4798 blx r3
800c66e: 3601 adds r6, #1
800c670: e7ee b.n 800c650 <__libc_init_array+0xc>
800c672: f855 3b04 ldr.w r3, [r5], #4
800c676: 4798 blx r3
800c678: 3601 adds r6, #1
800c67a: e7f2 b.n 800c662 <__libc_init_array+0x1e>
800c67c: 0800d270 .word 0x0800d270
800c680: 0800d270 .word 0x0800d270
800c684: 0800d270 .word 0x0800d270
800c688: 0800d274 .word 0x0800d274
0800c68c <__retarget_lock_acquire_recursive>:
800c68c: 4770 bx lr
0800c68e <__retarget_lock_release_recursive>:
800c68e: 4770 bx lr
0800c690 <_free_r>:
800c690: b538 push {r3, r4, r5, lr}
800c692: 4605 mov r5, r0
800c694: 2900 cmp r1, #0
800c696: d040 beq.n 800c71a <_free_r+0x8a>
800c698: f851 3c04 ldr.w r3, [r1, #-4]
800c69c: 1f0c subs r4, r1, #4
800c69e: 2b00 cmp r3, #0
800c6a0: bfb8 it lt
800c6a2: 18e4 addlt r4, r4, r3
800c6a4: f000 f8de bl 800c864 <__malloc_lock>
800c6a8: 4a1c ldr r2, [pc, #112] @ (800c71c <_free_r+0x8c>)
800c6aa: 6813 ldr r3, [r2, #0]
800c6ac: b933 cbnz r3, 800c6bc <_free_r+0x2c>
800c6ae: 6063 str r3, [r4, #4]
800c6b0: 6014 str r4, [r2, #0]
800c6b2: 4628 mov r0, r5
800c6b4: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800c6b8: f000 b8da b.w 800c870 <__malloc_unlock>
800c6bc: 42a3 cmp r3, r4
800c6be: d908 bls.n 800c6d2 <_free_r+0x42>
800c6c0: 6820 ldr r0, [r4, #0]
800c6c2: 1821 adds r1, r4, r0
800c6c4: 428b cmp r3, r1
800c6c6: bf01 itttt eq
800c6c8: 6819 ldreq r1, [r3, #0]
800c6ca: 685b ldreq r3, [r3, #4]
800c6cc: 1809 addeq r1, r1, r0
800c6ce: 6021 streq r1, [r4, #0]
800c6d0: e7ed b.n 800c6ae <_free_r+0x1e>
800c6d2: 461a mov r2, r3
800c6d4: 685b ldr r3, [r3, #4]
800c6d6: b10b cbz r3, 800c6dc <_free_r+0x4c>
800c6d8: 42a3 cmp r3, r4
800c6da: d9fa bls.n 800c6d2 <_free_r+0x42>
800c6dc: 6811 ldr r1, [r2, #0]
800c6de: 1850 adds r0, r2, r1
800c6e0: 42a0 cmp r0, r4
800c6e2: d10b bne.n 800c6fc <_free_r+0x6c>
800c6e4: 6820 ldr r0, [r4, #0]
800c6e6: 4401 add r1, r0
800c6e8: 1850 adds r0, r2, r1
800c6ea: 4283 cmp r3, r0
800c6ec: 6011 str r1, [r2, #0]
800c6ee: d1e0 bne.n 800c6b2 <_free_r+0x22>
800c6f0: 6818 ldr r0, [r3, #0]
800c6f2: 685b ldr r3, [r3, #4]
800c6f4: 4408 add r0, r1
800c6f6: 6010 str r0, [r2, #0]
800c6f8: 6053 str r3, [r2, #4]
800c6fa: e7da b.n 800c6b2 <_free_r+0x22>
800c6fc: d902 bls.n 800c704 <_free_r+0x74>
800c6fe: 230c movs r3, #12
800c700: 602b str r3, [r5, #0]
800c702: e7d6 b.n 800c6b2 <_free_r+0x22>
800c704: 6820 ldr r0, [r4, #0]
800c706: 1821 adds r1, r4, r0
800c708: 428b cmp r3, r1
800c70a: bf01 itttt eq
800c70c: 6819 ldreq r1, [r3, #0]
800c70e: 685b ldreq r3, [r3, #4]
800c710: 1809 addeq r1, r1, r0
800c712: 6021 streq r1, [r4, #0]
800c714: 6063 str r3, [r4, #4]
800c716: 6054 str r4, [r2, #4]
800c718: e7cb b.n 800c6b2 <_free_r+0x22>
800c71a: bd38 pop {r3, r4, r5, pc}
800c71c: 20001860 .word 0x20001860
0800c720 <sbrk_aligned>:
800c720: b570 push {r4, r5, r6, lr}
800c722: 4e0f ldr r6, [pc, #60] @ (800c760 <sbrk_aligned+0x40>)
800c724: 460c mov r4, r1
800c726: 6831 ldr r1, [r6, #0]
800c728: 4605 mov r5, r0
800c72a: b911 cbnz r1, 800c732 <sbrk_aligned+0x12>
800c72c: f000 fba8 bl 800ce80 <_sbrk_r>
800c730: 6030 str r0, [r6, #0]
800c732: 4621 mov r1, r4
800c734: 4628 mov r0, r5
800c736: f000 fba3 bl 800ce80 <_sbrk_r>
800c73a: 1c43 adds r3, r0, #1
800c73c: d103 bne.n 800c746 <sbrk_aligned+0x26>
800c73e: f04f 34ff mov.w r4, #4294967295
800c742: 4620 mov r0, r4
800c744: bd70 pop {r4, r5, r6, pc}
800c746: 1cc4 adds r4, r0, #3
800c748: f024 0403 bic.w r4, r4, #3
800c74c: 42a0 cmp r0, r4
800c74e: d0f8 beq.n 800c742 <sbrk_aligned+0x22>
800c750: 1a21 subs r1, r4, r0
800c752: 4628 mov r0, r5
800c754: f000 fb94 bl 800ce80 <_sbrk_r>
800c758: 3001 adds r0, #1
800c75a: d1f2 bne.n 800c742 <sbrk_aligned+0x22>
800c75c: e7ef b.n 800c73e <sbrk_aligned+0x1e>
800c75e: bf00 nop
800c760: 2000185c .word 0x2000185c
0800c764 <_malloc_r>:
800c764: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800c768: 1ccd adds r5, r1, #3
800c76a: f025 0503 bic.w r5, r5, #3
800c76e: 3508 adds r5, #8
800c770: 2d0c cmp r5, #12
800c772: bf38 it cc
800c774: 250c movcc r5, #12
800c776: 2d00 cmp r5, #0
800c778: 4606 mov r6, r0
800c77a: db01 blt.n 800c780 <_malloc_r+0x1c>
800c77c: 42a9 cmp r1, r5
800c77e: d904 bls.n 800c78a <_malloc_r+0x26>
800c780: 230c movs r3, #12
800c782: 6033 str r3, [r6, #0]
800c784: 2000 movs r0, #0
800c786: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800c78a: f8df 80d4 ldr.w r8, [pc, #212] @ 800c860 <_malloc_r+0xfc>
800c78e: f000 f869 bl 800c864 <__malloc_lock>
800c792: f8d8 3000 ldr.w r3, [r8]
800c796: 461c mov r4, r3
800c798: bb44 cbnz r4, 800c7ec <_malloc_r+0x88>
800c79a: 4629 mov r1, r5
800c79c: 4630 mov r0, r6
800c79e: f7ff ffbf bl 800c720 <sbrk_aligned>
800c7a2: 1c43 adds r3, r0, #1
800c7a4: 4604 mov r4, r0
800c7a6: d158 bne.n 800c85a <_malloc_r+0xf6>
800c7a8: f8d8 4000 ldr.w r4, [r8]
800c7ac: 4627 mov r7, r4
800c7ae: 2f00 cmp r7, #0
800c7b0: d143 bne.n 800c83a <_malloc_r+0xd6>
800c7b2: 2c00 cmp r4, #0
800c7b4: d04b beq.n 800c84e <_malloc_r+0xea>
800c7b6: 6823 ldr r3, [r4, #0]
800c7b8: 4639 mov r1, r7
800c7ba: 4630 mov r0, r6
800c7bc: eb04 0903 add.w r9, r4, r3
800c7c0: f000 fb5e bl 800ce80 <_sbrk_r>
800c7c4: 4581 cmp r9, r0
800c7c6: d142 bne.n 800c84e <_malloc_r+0xea>
800c7c8: 6821 ldr r1, [r4, #0]
800c7ca: 4630 mov r0, r6
800c7cc: 1a6d subs r5, r5, r1
800c7ce: 4629 mov r1, r5
800c7d0: f7ff ffa6 bl 800c720 <sbrk_aligned>
800c7d4: 3001 adds r0, #1
800c7d6: d03a beq.n 800c84e <_malloc_r+0xea>
800c7d8: 6823 ldr r3, [r4, #0]
800c7da: 442b add r3, r5
800c7dc: 6023 str r3, [r4, #0]
800c7de: f8d8 3000 ldr.w r3, [r8]
800c7e2: 685a ldr r2, [r3, #4]
800c7e4: bb62 cbnz r2, 800c840 <_malloc_r+0xdc>
800c7e6: f8c8 7000 str.w r7, [r8]
800c7ea: e00f b.n 800c80c <_malloc_r+0xa8>
800c7ec: 6822 ldr r2, [r4, #0]
800c7ee: 1b52 subs r2, r2, r5
800c7f0: d420 bmi.n 800c834 <_malloc_r+0xd0>
800c7f2: 2a0b cmp r2, #11
800c7f4: d917 bls.n 800c826 <_malloc_r+0xc2>
800c7f6: 1961 adds r1, r4, r5
800c7f8: 42a3 cmp r3, r4
800c7fa: 6025 str r5, [r4, #0]
800c7fc: bf18 it ne
800c7fe: 6059 strne r1, [r3, #4]
800c800: 6863 ldr r3, [r4, #4]
800c802: bf08 it eq
800c804: f8c8 1000 streq.w r1, [r8]
800c808: 5162 str r2, [r4, r5]
800c80a: 604b str r3, [r1, #4]
800c80c: 4630 mov r0, r6
800c80e: f000 f82f bl 800c870 <__malloc_unlock>
800c812: f104 000b add.w r0, r4, #11
800c816: 1d23 adds r3, r4, #4
800c818: f020 0007 bic.w r0, r0, #7
800c81c: 1ac2 subs r2, r0, r3
800c81e: bf1c itt ne
800c820: 1a1b subne r3, r3, r0
800c822: 50a3 strne r3, [r4, r2]
800c824: e7af b.n 800c786 <_malloc_r+0x22>
800c826: 6862 ldr r2, [r4, #4]
800c828: 42a3 cmp r3, r4
800c82a: bf0c ite eq
800c82c: f8c8 2000 streq.w r2, [r8]
800c830: 605a strne r2, [r3, #4]
800c832: e7eb b.n 800c80c <_malloc_r+0xa8>
800c834: 4623 mov r3, r4
800c836: 6864 ldr r4, [r4, #4]
800c838: e7ae b.n 800c798 <_malloc_r+0x34>
800c83a: 463c mov r4, r7
800c83c: 687f ldr r7, [r7, #4]
800c83e: e7b6 b.n 800c7ae <_malloc_r+0x4a>
800c840: 461a mov r2, r3
800c842: 685b ldr r3, [r3, #4]
800c844: 42a3 cmp r3, r4
800c846: d1fb bne.n 800c840 <_malloc_r+0xdc>
800c848: 2300 movs r3, #0
800c84a: 6053 str r3, [r2, #4]
800c84c: e7de b.n 800c80c <_malloc_r+0xa8>
800c84e: 230c movs r3, #12
800c850: 4630 mov r0, r6
800c852: 6033 str r3, [r6, #0]
800c854: f000 f80c bl 800c870 <__malloc_unlock>
800c858: e794 b.n 800c784 <_malloc_r+0x20>
800c85a: 6005 str r5, [r0, #0]
800c85c: e7d6 b.n 800c80c <_malloc_r+0xa8>
800c85e: bf00 nop
800c860: 20001860 .word 0x20001860
0800c864 <__malloc_lock>:
800c864: 4801 ldr r0, [pc, #4] @ (800c86c <__malloc_lock+0x8>)
800c866: f7ff bf11 b.w 800c68c <__retarget_lock_acquire_recursive>
800c86a: bf00 nop
800c86c: 20001858 .word 0x20001858
0800c870 <__malloc_unlock>:
800c870: 4801 ldr r0, [pc, #4] @ (800c878 <__malloc_unlock+0x8>)
800c872: f7ff bf0c b.w 800c68e <__retarget_lock_release_recursive>
800c876: bf00 nop
800c878: 20001858 .word 0x20001858
0800c87c <__ssputs_r>:
800c87c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800c880: 461f mov r7, r3
800c882: 688e ldr r6, [r1, #8]
800c884: 4682 mov sl, r0
800c886: 42be cmp r6, r7
800c888: 460c mov r4, r1
800c88a: 4690 mov r8, r2
800c88c: 680b ldr r3, [r1, #0]
800c88e: d82d bhi.n 800c8ec <__ssputs_r+0x70>
800c890: f9b1 200c ldrsh.w r2, [r1, #12]
800c894: f412 6f90 tst.w r2, #1152 @ 0x480
800c898: d026 beq.n 800c8e8 <__ssputs_r+0x6c>
800c89a: 6965 ldr r5, [r4, #20]
800c89c: 6909 ldr r1, [r1, #16]
800c89e: eb05 0545 add.w r5, r5, r5, lsl #1
800c8a2: eba3 0901 sub.w r9, r3, r1
800c8a6: eb05 75d5 add.w r5, r5, r5, lsr #31
800c8aa: 1c7b adds r3, r7, #1
800c8ac: 444b add r3, r9
800c8ae: 106d asrs r5, r5, #1
800c8b0: 429d cmp r5, r3
800c8b2: bf38 it cc
800c8b4: 461d movcc r5, r3
800c8b6: 0553 lsls r3, r2, #21
800c8b8: d527 bpl.n 800c90a <__ssputs_r+0x8e>
800c8ba: 4629 mov r1, r5
800c8bc: f7ff ff52 bl 800c764 <_malloc_r>
800c8c0: 4606 mov r6, r0
800c8c2: b360 cbz r0, 800c91e <__ssputs_r+0xa2>
800c8c4: 464a mov r2, r9
800c8c6: 6921 ldr r1, [r4, #16]
800c8c8: f000 faf8 bl 800cebc <memcpy>
800c8cc: 89a3 ldrh r3, [r4, #12]
800c8ce: f423 6390 bic.w r3, r3, #1152 @ 0x480
800c8d2: f043 0380 orr.w r3, r3, #128 @ 0x80
800c8d6: 81a3 strh r3, [r4, #12]
800c8d8: 6126 str r6, [r4, #16]
800c8da: 444e add r6, r9
800c8dc: 6026 str r6, [r4, #0]
800c8de: 463e mov r6, r7
800c8e0: 6165 str r5, [r4, #20]
800c8e2: eba5 0509 sub.w r5, r5, r9
800c8e6: 60a5 str r5, [r4, #8]
800c8e8: 42be cmp r6, r7
800c8ea: d900 bls.n 800c8ee <__ssputs_r+0x72>
800c8ec: 463e mov r6, r7
800c8ee: 4632 mov r2, r6
800c8f0: 4641 mov r1, r8
800c8f2: 6820 ldr r0, [r4, #0]
800c8f4: f000 faaa bl 800ce4c <memmove>
800c8f8: 2000 movs r0, #0
800c8fa: 68a3 ldr r3, [r4, #8]
800c8fc: 1b9b subs r3, r3, r6
800c8fe: 60a3 str r3, [r4, #8]
800c900: 6823 ldr r3, [r4, #0]
800c902: 4433 add r3, r6
800c904: 6023 str r3, [r4, #0]
800c906: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800c90a: 462a mov r2, r5
800c90c: f000 fae4 bl 800ced8 <_realloc_r>
800c910: 4606 mov r6, r0
800c912: 2800 cmp r0, #0
800c914: d1e0 bne.n 800c8d8 <__ssputs_r+0x5c>
800c916: 4650 mov r0, sl
800c918: 6921 ldr r1, [r4, #16]
800c91a: f7ff feb9 bl 800c690 <_free_r>
800c91e: 230c movs r3, #12
800c920: f8ca 3000 str.w r3, [sl]
800c924: 89a3 ldrh r3, [r4, #12]
800c926: f04f 30ff mov.w r0, #4294967295
800c92a: f043 0340 orr.w r3, r3, #64 @ 0x40
800c92e: 81a3 strh r3, [r4, #12]
800c930: e7e9 b.n 800c906 <__ssputs_r+0x8a>
...
0800c934 <_svfiprintf_r>:
800c934: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800c938: 4698 mov r8, r3
800c93a: 898b ldrh r3, [r1, #12]
800c93c: 4607 mov r7, r0
800c93e: 061b lsls r3, r3, #24
800c940: 460d mov r5, r1
800c942: 4614 mov r4, r2
800c944: b09d sub sp, #116 @ 0x74
800c946: d510 bpl.n 800c96a <_svfiprintf_r+0x36>
800c948: 690b ldr r3, [r1, #16]
800c94a: b973 cbnz r3, 800c96a <_svfiprintf_r+0x36>
800c94c: 2140 movs r1, #64 @ 0x40
800c94e: f7ff ff09 bl 800c764 <_malloc_r>
800c952: 6028 str r0, [r5, #0]
800c954: 6128 str r0, [r5, #16]
800c956: b930 cbnz r0, 800c966 <_svfiprintf_r+0x32>
800c958: 230c movs r3, #12
800c95a: 603b str r3, [r7, #0]
800c95c: f04f 30ff mov.w r0, #4294967295
800c960: b01d add sp, #116 @ 0x74
800c962: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800c966: 2340 movs r3, #64 @ 0x40
800c968: 616b str r3, [r5, #20]
800c96a: 2300 movs r3, #0
800c96c: 9309 str r3, [sp, #36] @ 0x24
800c96e: 2320 movs r3, #32
800c970: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800c974: 2330 movs r3, #48 @ 0x30
800c976: f04f 0901 mov.w r9, #1
800c97a: f8cd 800c str.w r8, [sp, #12]
800c97e: f8df 8198 ldr.w r8, [pc, #408] @ 800cb18 <_svfiprintf_r+0x1e4>
800c982: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800c986: 4623 mov r3, r4
800c988: 469a mov sl, r3
800c98a: f813 2b01 ldrb.w r2, [r3], #1
800c98e: b10a cbz r2, 800c994 <_svfiprintf_r+0x60>
800c990: 2a25 cmp r2, #37 @ 0x25
800c992: d1f9 bne.n 800c988 <_svfiprintf_r+0x54>
800c994: ebba 0b04 subs.w fp, sl, r4
800c998: d00b beq.n 800c9b2 <_svfiprintf_r+0x7e>
800c99a: 465b mov r3, fp
800c99c: 4622 mov r2, r4
800c99e: 4629 mov r1, r5
800c9a0: 4638 mov r0, r7
800c9a2: f7ff ff6b bl 800c87c <__ssputs_r>
800c9a6: 3001 adds r0, #1
800c9a8: f000 80a7 beq.w 800cafa <_svfiprintf_r+0x1c6>
800c9ac: 9a09 ldr r2, [sp, #36] @ 0x24
800c9ae: 445a add r2, fp
800c9b0: 9209 str r2, [sp, #36] @ 0x24
800c9b2: f89a 3000 ldrb.w r3, [sl]
800c9b6: 2b00 cmp r3, #0
800c9b8: f000 809f beq.w 800cafa <_svfiprintf_r+0x1c6>
800c9bc: 2300 movs r3, #0
800c9be: f04f 32ff mov.w r2, #4294967295
800c9c2: e9cd 2305 strd r2, r3, [sp, #20]
800c9c6: f10a 0a01 add.w sl, sl, #1
800c9ca: 9304 str r3, [sp, #16]
800c9cc: 9307 str r3, [sp, #28]
800c9ce: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800c9d2: 931a str r3, [sp, #104] @ 0x68
800c9d4: 4654 mov r4, sl
800c9d6: 2205 movs r2, #5
800c9d8: f814 1b01 ldrb.w r1, [r4], #1
800c9dc: 484e ldr r0, [pc, #312] @ (800cb18 <_svfiprintf_r+0x1e4>)
800c9de: f000 fa5f bl 800cea0 <memchr>
800c9e2: 9a04 ldr r2, [sp, #16]
800c9e4: b9d8 cbnz r0, 800ca1e <_svfiprintf_r+0xea>
800c9e6: 06d0 lsls r0, r2, #27
800c9e8: bf44 itt mi
800c9ea: 2320 movmi r3, #32
800c9ec: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800c9f0: 0711 lsls r1, r2, #28
800c9f2: bf44 itt mi
800c9f4: 232b movmi r3, #43 @ 0x2b
800c9f6: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800c9fa: f89a 3000 ldrb.w r3, [sl]
800c9fe: 2b2a cmp r3, #42 @ 0x2a
800ca00: d015 beq.n 800ca2e <_svfiprintf_r+0xfa>
800ca02: 4654 mov r4, sl
800ca04: 2000 movs r0, #0
800ca06: f04f 0c0a mov.w ip, #10
800ca0a: 9a07 ldr r2, [sp, #28]
800ca0c: 4621 mov r1, r4
800ca0e: f811 3b01 ldrb.w r3, [r1], #1
800ca12: 3b30 subs r3, #48 @ 0x30
800ca14: 2b09 cmp r3, #9
800ca16: d94b bls.n 800cab0 <_svfiprintf_r+0x17c>
800ca18: b1b0 cbz r0, 800ca48 <_svfiprintf_r+0x114>
800ca1a: 9207 str r2, [sp, #28]
800ca1c: e014 b.n 800ca48 <_svfiprintf_r+0x114>
800ca1e: eba0 0308 sub.w r3, r0, r8
800ca22: fa09 f303 lsl.w r3, r9, r3
800ca26: 4313 orrs r3, r2
800ca28: 46a2 mov sl, r4
800ca2a: 9304 str r3, [sp, #16]
800ca2c: e7d2 b.n 800c9d4 <_svfiprintf_r+0xa0>
800ca2e: 9b03 ldr r3, [sp, #12]
800ca30: 1d19 adds r1, r3, #4
800ca32: 681b ldr r3, [r3, #0]
800ca34: 9103 str r1, [sp, #12]
800ca36: 2b00 cmp r3, #0
800ca38: bfbb ittet lt
800ca3a: 425b neglt r3, r3
800ca3c: f042 0202 orrlt.w r2, r2, #2
800ca40: 9307 strge r3, [sp, #28]
800ca42: 9307 strlt r3, [sp, #28]
800ca44: bfb8 it lt
800ca46: 9204 strlt r2, [sp, #16]
800ca48: 7823 ldrb r3, [r4, #0]
800ca4a: 2b2e cmp r3, #46 @ 0x2e
800ca4c: d10a bne.n 800ca64 <_svfiprintf_r+0x130>
800ca4e: 7863 ldrb r3, [r4, #1]
800ca50: 2b2a cmp r3, #42 @ 0x2a
800ca52: d132 bne.n 800caba <_svfiprintf_r+0x186>
800ca54: 9b03 ldr r3, [sp, #12]
800ca56: 3402 adds r4, #2
800ca58: 1d1a adds r2, r3, #4
800ca5a: 681b ldr r3, [r3, #0]
800ca5c: 9203 str r2, [sp, #12]
800ca5e: ea43 73e3 orr.w r3, r3, r3, asr #31
800ca62: 9305 str r3, [sp, #20]
800ca64: f8df a0b4 ldr.w sl, [pc, #180] @ 800cb1c <_svfiprintf_r+0x1e8>
800ca68: 2203 movs r2, #3
800ca6a: 4650 mov r0, sl
800ca6c: 7821 ldrb r1, [r4, #0]
800ca6e: f000 fa17 bl 800cea0 <memchr>
800ca72: b138 cbz r0, 800ca84 <_svfiprintf_r+0x150>
800ca74: 2240 movs r2, #64 @ 0x40
800ca76: 9b04 ldr r3, [sp, #16]
800ca78: eba0 000a sub.w r0, r0, sl
800ca7c: 4082 lsls r2, r0
800ca7e: 4313 orrs r3, r2
800ca80: 3401 adds r4, #1
800ca82: 9304 str r3, [sp, #16]
800ca84: f814 1b01 ldrb.w r1, [r4], #1
800ca88: 2206 movs r2, #6
800ca8a: 4825 ldr r0, [pc, #148] @ (800cb20 <_svfiprintf_r+0x1ec>)
800ca8c: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800ca90: f000 fa06 bl 800cea0 <memchr>
800ca94: 2800 cmp r0, #0
800ca96: d036 beq.n 800cb06 <_svfiprintf_r+0x1d2>
800ca98: 4b22 ldr r3, [pc, #136] @ (800cb24 <_svfiprintf_r+0x1f0>)
800ca9a: bb1b cbnz r3, 800cae4 <_svfiprintf_r+0x1b0>
800ca9c: 9b03 ldr r3, [sp, #12]
800ca9e: 3307 adds r3, #7
800caa0: f023 0307 bic.w r3, r3, #7
800caa4: 3308 adds r3, #8
800caa6: 9303 str r3, [sp, #12]
800caa8: 9b09 ldr r3, [sp, #36] @ 0x24
800caaa: 4433 add r3, r6
800caac: 9309 str r3, [sp, #36] @ 0x24
800caae: e76a b.n 800c986 <_svfiprintf_r+0x52>
800cab0: 460c mov r4, r1
800cab2: 2001 movs r0, #1
800cab4: fb0c 3202 mla r2, ip, r2, r3
800cab8: e7a8 b.n 800ca0c <_svfiprintf_r+0xd8>
800caba: 2300 movs r3, #0
800cabc: f04f 0c0a mov.w ip, #10
800cac0: 4619 mov r1, r3
800cac2: 3401 adds r4, #1
800cac4: 9305 str r3, [sp, #20]
800cac6: 4620 mov r0, r4
800cac8: f810 2b01 ldrb.w r2, [r0], #1
800cacc: 3a30 subs r2, #48 @ 0x30
800cace: 2a09 cmp r2, #9
800cad0: d903 bls.n 800cada <_svfiprintf_r+0x1a6>
800cad2: 2b00 cmp r3, #0
800cad4: d0c6 beq.n 800ca64 <_svfiprintf_r+0x130>
800cad6: 9105 str r1, [sp, #20]
800cad8: e7c4 b.n 800ca64 <_svfiprintf_r+0x130>
800cada: 4604 mov r4, r0
800cadc: 2301 movs r3, #1
800cade: fb0c 2101 mla r1, ip, r1, r2
800cae2: e7f0 b.n 800cac6 <_svfiprintf_r+0x192>
800cae4: ab03 add r3, sp, #12
800cae6: 9300 str r3, [sp, #0]
800cae8: 462a mov r2, r5
800caea: 4638 mov r0, r7
800caec: 4b0e ldr r3, [pc, #56] @ (800cb28 <_svfiprintf_r+0x1f4>)
800caee: a904 add r1, sp, #16
800caf0: f3af 8000 nop.w
800caf4: 1c42 adds r2, r0, #1
800caf6: 4606 mov r6, r0
800caf8: d1d6 bne.n 800caa8 <_svfiprintf_r+0x174>
800cafa: 89ab ldrh r3, [r5, #12]
800cafc: 065b lsls r3, r3, #25
800cafe: f53f af2d bmi.w 800c95c <_svfiprintf_r+0x28>
800cb02: 9809 ldr r0, [sp, #36] @ 0x24
800cb04: e72c b.n 800c960 <_svfiprintf_r+0x2c>
800cb06: ab03 add r3, sp, #12
800cb08: 9300 str r3, [sp, #0]
800cb0a: 462a mov r2, r5
800cb0c: 4638 mov r0, r7
800cb0e: 4b06 ldr r3, [pc, #24] @ (800cb28 <_svfiprintf_r+0x1f4>)
800cb10: a904 add r1, sp, #16
800cb12: f000 f87d bl 800cc10 <_printf_i>
800cb16: e7ed b.n 800caf4 <_svfiprintf_r+0x1c0>
800cb18: 0800d232 .word 0x0800d232
800cb1c: 0800d238 .word 0x0800d238
800cb20: 0800d23c .word 0x0800d23c
800cb24: 00000000 .word 0x00000000
800cb28: 0800c87d .word 0x0800c87d
0800cb2c <_printf_common>:
800cb2c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800cb30: 4616 mov r6, r2
800cb32: 4698 mov r8, r3
800cb34: 688a ldr r2, [r1, #8]
800cb36: 690b ldr r3, [r1, #16]
800cb38: 4607 mov r7, r0
800cb3a: 4293 cmp r3, r2
800cb3c: bfb8 it lt
800cb3e: 4613 movlt r3, r2
800cb40: 6033 str r3, [r6, #0]
800cb42: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800cb46: 460c mov r4, r1
800cb48: f8dd 9020 ldr.w r9, [sp, #32]
800cb4c: b10a cbz r2, 800cb52 <_printf_common+0x26>
800cb4e: 3301 adds r3, #1
800cb50: 6033 str r3, [r6, #0]
800cb52: 6823 ldr r3, [r4, #0]
800cb54: 0699 lsls r1, r3, #26
800cb56: bf42 ittt mi
800cb58: 6833 ldrmi r3, [r6, #0]
800cb5a: 3302 addmi r3, #2
800cb5c: 6033 strmi r3, [r6, #0]
800cb5e: 6825 ldr r5, [r4, #0]
800cb60: f015 0506 ands.w r5, r5, #6
800cb64: d106 bne.n 800cb74 <_printf_common+0x48>
800cb66: f104 0a19 add.w sl, r4, #25
800cb6a: 68e3 ldr r3, [r4, #12]
800cb6c: 6832 ldr r2, [r6, #0]
800cb6e: 1a9b subs r3, r3, r2
800cb70: 42ab cmp r3, r5
800cb72: dc2b bgt.n 800cbcc <_printf_common+0xa0>
800cb74: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800cb78: 6822 ldr r2, [r4, #0]
800cb7a: 3b00 subs r3, #0
800cb7c: bf18 it ne
800cb7e: 2301 movne r3, #1
800cb80: 0692 lsls r2, r2, #26
800cb82: d430 bmi.n 800cbe6 <_printf_common+0xba>
800cb84: 4641 mov r1, r8
800cb86: 4638 mov r0, r7
800cb88: f104 0243 add.w r2, r4, #67 @ 0x43
800cb8c: 47c8 blx r9
800cb8e: 3001 adds r0, #1
800cb90: d023 beq.n 800cbda <_printf_common+0xae>
800cb92: 6823 ldr r3, [r4, #0]
800cb94: 6922 ldr r2, [r4, #16]
800cb96: f003 0306 and.w r3, r3, #6
800cb9a: 2b04 cmp r3, #4
800cb9c: bf14 ite ne
800cb9e: 2500 movne r5, #0
800cba0: 6833 ldreq r3, [r6, #0]
800cba2: f04f 0600 mov.w r6, #0
800cba6: bf08 it eq
800cba8: 68e5 ldreq r5, [r4, #12]
800cbaa: f104 041a add.w r4, r4, #26
800cbae: bf08 it eq
800cbb0: 1aed subeq r5, r5, r3
800cbb2: f854 3c12 ldr.w r3, [r4, #-18]
800cbb6: bf08 it eq
800cbb8: ea25 75e5 biceq.w r5, r5, r5, asr #31
800cbbc: 4293 cmp r3, r2
800cbbe: bfc4 itt gt
800cbc0: 1a9b subgt r3, r3, r2
800cbc2: 18ed addgt r5, r5, r3
800cbc4: 42b5 cmp r5, r6
800cbc6: d11a bne.n 800cbfe <_printf_common+0xd2>
800cbc8: 2000 movs r0, #0
800cbca: e008 b.n 800cbde <_printf_common+0xb2>
800cbcc: 2301 movs r3, #1
800cbce: 4652 mov r2, sl
800cbd0: 4641 mov r1, r8
800cbd2: 4638 mov r0, r7
800cbd4: 47c8 blx r9
800cbd6: 3001 adds r0, #1
800cbd8: d103 bne.n 800cbe2 <_printf_common+0xb6>
800cbda: f04f 30ff mov.w r0, #4294967295
800cbde: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800cbe2: 3501 adds r5, #1
800cbe4: e7c1 b.n 800cb6a <_printf_common+0x3e>
800cbe6: 2030 movs r0, #48 @ 0x30
800cbe8: 18e1 adds r1, r4, r3
800cbea: f881 0043 strb.w r0, [r1, #67] @ 0x43
800cbee: 1c5a adds r2, r3, #1
800cbf0: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800cbf4: 4422 add r2, r4
800cbf6: 3302 adds r3, #2
800cbf8: f882 1043 strb.w r1, [r2, #67] @ 0x43
800cbfc: e7c2 b.n 800cb84 <_printf_common+0x58>
800cbfe: 2301 movs r3, #1
800cc00: 4622 mov r2, r4
800cc02: 4641 mov r1, r8
800cc04: 4638 mov r0, r7
800cc06: 47c8 blx r9
800cc08: 3001 adds r0, #1
800cc0a: d0e6 beq.n 800cbda <_printf_common+0xae>
800cc0c: 3601 adds r6, #1
800cc0e: e7d9 b.n 800cbc4 <_printf_common+0x98>
0800cc10 <_printf_i>:
800cc10: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800cc14: 7e0f ldrb r7, [r1, #24]
800cc16: 4691 mov r9, r2
800cc18: 2f78 cmp r7, #120 @ 0x78
800cc1a: 4680 mov r8, r0
800cc1c: 460c mov r4, r1
800cc1e: 469a mov sl, r3
800cc20: 9e0c ldr r6, [sp, #48] @ 0x30
800cc22: f101 0243 add.w r2, r1, #67 @ 0x43
800cc26: d807 bhi.n 800cc38 <_printf_i+0x28>
800cc28: 2f62 cmp r7, #98 @ 0x62
800cc2a: d80a bhi.n 800cc42 <_printf_i+0x32>
800cc2c: 2f00 cmp r7, #0
800cc2e: f000 80d1 beq.w 800cdd4 <_printf_i+0x1c4>
800cc32: 2f58 cmp r7, #88 @ 0x58
800cc34: f000 80b8 beq.w 800cda8 <_printf_i+0x198>
800cc38: f104 0642 add.w r6, r4, #66 @ 0x42
800cc3c: f884 7042 strb.w r7, [r4, #66] @ 0x42
800cc40: e03a b.n 800ccb8 <_printf_i+0xa8>
800cc42: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800cc46: 2b15 cmp r3, #21
800cc48: d8f6 bhi.n 800cc38 <_printf_i+0x28>
800cc4a: a101 add r1, pc, #4 @ (adr r1, 800cc50 <_printf_i+0x40>)
800cc4c: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800cc50: 0800cca9 .word 0x0800cca9
800cc54: 0800ccbd .word 0x0800ccbd
800cc58: 0800cc39 .word 0x0800cc39
800cc5c: 0800cc39 .word 0x0800cc39
800cc60: 0800cc39 .word 0x0800cc39
800cc64: 0800cc39 .word 0x0800cc39
800cc68: 0800ccbd .word 0x0800ccbd
800cc6c: 0800cc39 .word 0x0800cc39
800cc70: 0800cc39 .word 0x0800cc39
800cc74: 0800cc39 .word 0x0800cc39
800cc78: 0800cc39 .word 0x0800cc39
800cc7c: 0800cdbb .word 0x0800cdbb
800cc80: 0800cce7 .word 0x0800cce7
800cc84: 0800cd75 .word 0x0800cd75
800cc88: 0800cc39 .word 0x0800cc39
800cc8c: 0800cc39 .word 0x0800cc39
800cc90: 0800cddd .word 0x0800cddd
800cc94: 0800cc39 .word 0x0800cc39
800cc98: 0800cce7 .word 0x0800cce7
800cc9c: 0800cc39 .word 0x0800cc39
800cca0: 0800cc39 .word 0x0800cc39
800cca4: 0800cd7d .word 0x0800cd7d
800cca8: 6833 ldr r3, [r6, #0]
800ccaa: 1d1a adds r2, r3, #4
800ccac: 681b ldr r3, [r3, #0]
800ccae: 6032 str r2, [r6, #0]
800ccb0: f104 0642 add.w r6, r4, #66 @ 0x42
800ccb4: f884 3042 strb.w r3, [r4, #66] @ 0x42
800ccb8: 2301 movs r3, #1
800ccba: e09c b.n 800cdf6 <_printf_i+0x1e6>
800ccbc: 6833 ldr r3, [r6, #0]
800ccbe: 6820 ldr r0, [r4, #0]
800ccc0: 1d19 adds r1, r3, #4
800ccc2: 6031 str r1, [r6, #0]
800ccc4: 0606 lsls r6, r0, #24
800ccc6: d501 bpl.n 800cccc <_printf_i+0xbc>
800ccc8: 681d ldr r5, [r3, #0]
800ccca: e003 b.n 800ccd4 <_printf_i+0xc4>
800cccc: 0645 lsls r5, r0, #25
800ccce: d5fb bpl.n 800ccc8 <_printf_i+0xb8>
800ccd0: f9b3 5000 ldrsh.w r5, [r3]
800ccd4: 2d00 cmp r5, #0
800ccd6: da03 bge.n 800cce0 <_printf_i+0xd0>
800ccd8: 232d movs r3, #45 @ 0x2d
800ccda: 426d negs r5, r5
800ccdc: f884 3043 strb.w r3, [r4, #67] @ 0x43
800cce0: 230a movs r3, #10
800cce2: 4858 ldr r0, [pc, #352] @ (800ce44 <_printf_i+0x234>)
800cce4: e011 b.n 800cd0a <_printf_i+0xfa>
800cce6: 6821 ldr r1, [r4, #0]
800cce8: 6833 ldr r3, [r6, #0]
800ccea: 0608 lsls r0, r1, #24
800ccec: f853 5b04 ldr.w r5, [r3], #4
800ccf0: d402 bmi.n 800ccf8 <_printf_i+0xe8>
800ccf2: 0649 lsls r1, r1, #25
800ccf4: bf48 it mi
800ccf6: b2ad uxthmi r5, r5
800ccf8: 2f6f cmp r7, #111 @ 0x6f
800ccfa: 6033 str r3, [r6, #0]
800ccfc: bf14 ite ne
800ccfe: 230a movne r3, #10
800cd00: 2308 moveq r3, #8
800cd02: 4850 ldr r0, [pc, #320] @ (800ce44 <_printf_i+0x234>)
800cd04: 2100 movs r1, #0
800cd06: f884 1043 strb.w r1, [r4, #67] @ 0x43
800cd0a: 6866 ldr r6, [r4, #4]
800cd0c: 2e00 cmp r6, #0
800cd0e: 60a6 str r6, [r4, #8]
800cd10: db05 blt.n 800cd1e <_printf_i+0x10e>
800cd12: 6821 ldr r1, [r4, #0]
800cd14: 432e orrs r6, r5
800cd16: f021 0104 bic.w r1, r1, #4
800cd1a: 6021 str r1, [r4, #0]
800cd1c: d04b beq.n 800cdb6 <_printf_i+0x1a6>
800cd1e: 4616 mov r6, r2
800cd20: fbb5 f1f3 udiv r1, r5, r3
800cd24: fb03 5711 mls r7, r3, r1, r5
800cd28: 5dc7 ldrb r7, [r0, r7]
800cd2a: f806 7d01 strb.w r7, [r6, #-1]!
800cd2e: 462f mov r7, r5
800cd30: 42bb cmp r3, r7
800cd32: 460d mov r5, r1
800cd34: d9f4 bls.n 800cd20 <_printf_i+0x110>
800cd36: 2b08 cmp r3, #8
800cd38: d10b bne.n 800cd52 <_printf_i+0x142>
800cd3a: 6823 ldr r3, [r4, #0]
800cd3c: 07df lsls r7, r3, #31
800cd3e: d508 bpl.n 800cd52 <_printf_i+0x142>
800cd40: 6923 ldr r3, [r4, #16]
800cd42: 6861 ldr r1, [r4, #4]
800cd44: 4299 cmp r1, r3
800cd46: bfde ittt le
800cd48: 2330 movle r3, #48 @ 0x30
800cd4a: f806 3c01 strble.w r3, [r6, #-1]
800cd4e: f106 36ff addle.w r6, r6, #4294967295
800cd52: 1b92 subs r2, r2, r6
800cd54: 6122 str r2, [r4, #16]
800cd56: 464b mov r3, r9
800cd58: 4621 mov r1, r4
800cd5a: 4640 mov r0, r8
800cd5c: f8cd a000 str.w sl, [sp]
800cd60: aa03 add r2, sp, #12
800cd62: f7ff fee3 bl 800cb2c <_printf_common>
800cd66: 3001 adds r0, #1
800cd68: d14a bne.n 800ce00 <_printf_i+0x1f0>
800cd6a: f04f 30ff mov.w r0, #4294967295
800cd6e: b004 add sp, #16
800cd70: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800cd74: 6823 ldr r3, [r4, #0]
800cd76: f043 0320 orr.w r3, r3, #32
800cd7a: 6023 str r3, [r4, #0]
800cd7c: 2778 movs r7, #120 @ 0x78
800cd7e: 4832 ldr r0, [pc, #200] @ (800ce48 <_printf_i+0x238>)
800cd80: f884 7045 strb.w r7, [r4, #69] @ 0x45
800cd84: 6823 ldr r3, [r4, #0]
800cd86: 6831 ldr r1, [r6, #0]
800cd88: 061f lsls r7, r3, #24
800cd8a: f851 5b04 ldr.w r5, [r1], #4
800cd8e: d402 bmi.n 800cd96 <_printf_i+0x186>
800cd90: 065f lsls r7, r3, #25
800cd92: bf48 it mi
800cd94: b2ad uxthmi r5, r5
800cd96: 6031 str r1, [r6, #0]
800cd98: 07d9 lsls r1, r3, #31
800cd9a: bf44 itt mi
800cd9c: f043 0320 orrmi.w r3, r3, #32
800cda0: 6023 strmi r3, [r4, #0]
800cda2: b11d cbz r5, 800cdac <_printf_i+0x19c>
800cda4: 2310 movs r3, #16
800cda6: e7ad b.n 800cd04 <_printf_i+0xf4>
800cda8: 4826 ldr r0, [pc, #152] @ (800ce44 <_printf_i+0x234>)
800cdaa: e7e9 b.n 800cd80 <_printf_i+0x170>
800cdac: 6823 ldr r3, [r4, #0]
800cdae: f023 0320 bic.w r3, r3, #32
800cdb2: 6023 str r3, [r4, #0]
800cdb4: e7f6 b.n 800cda4 <_printf_i+0x194>
800cdb6: 4616 mov r6, r2
800cdb8: e7bd b.n 800cd36 <_printf_i+0x126>
800cdba: 6833 ldr r3, [r6, #0]
800cdbc: 6825 ldr r5, [r4, #0]
800cdbe: 1d18 adds r0, r3, #4
800cdc0: 6961 ldr r1, [r4, #20]
800cdc2: 6030 str r0, [r6, #0]
800cdc4: 062e lsls r6, r5, #24
800cdc6: 681b ldr r3, [r3, #0]
800cdc8: d501 bpl.n 800cdce <_printf_i+0x1be>
800cdca: 6019 str r1, [r3, #0]
800cdcc: e002 b.n 800cdd4 <_printf_i+0x1c4>
800cdce: 0668 lsls r0, r5, #25
800cdd0: d5fb bpl.n 800cdca <_printf_i+0x1ba>
800cdd2: 8019 strh r1, [r3, #0]
800cdd4: 2300 movs r3, #0
800cdd6: 4616 mov r6, r2
800cdd8: 6123 str r3, [r4, #16]
800cdda: e7bc b.n 800cd56 <_printf_i+0x146>
800cddc: 6833 ldr r3, [r6, #0]
800cdde: 2100 movs r1, #0
800cde0: 1d1a adds r2, r3, #4
800cde2: 6032 str r2, [r6, #0]
800cde4: 681e ldr r6, [r3, #0]
800cde6: 6862 ldr r2, [r4, #4]
800cde8: 4630 mov r0, r6
800cdea: f000 f859 bl 800cea0 <memchr>
800cdee: b108 cbz r0, 800cdf4 <_printf_i+0x1e4>
800cdf0: 1b80 subs r0, r0, r6
800cdf2: 6060 str r0, [r4, #4]
800cdf4: 6863 ldr r3, [r4, #4]
800cdf6: 6123 str r3, [r4, #16]
800cdf8: 2300 movs r3, #0
800cdfa: f884 3043 strb.w r3, [r4, #67] @ 0x43
800cdfe: e7aa b.n 800cd56 <_printf_i+0x146>
800ce00: 4632 mov r2, r6
800ce02: 4649 mov r1, r9
800ce04: 4640 mov r0, r8
800ce06: 6923 ldr r3, [r4, #16]
800ce08: 47d0 blx sl
800ce0a: 3001 adds r0, #1
800ce0c: d0ad beq.n 800cd6a <_printf_i+0x15a>
800ce0e: 6823 ldr r3, [r4, #0]
800ce10: 079b lsls r3, r3, #30
800ce12: d413 bmi.n 800ce3c <_printf_i+0x22c>
800ce14: 68e0 ldr r0, [r4, #12]
800ce16: 9b03 ldr r3, [sp, #12]
800ce18: 4298 cmp r0, r3
800ce1a: bfb8 it lt
800ce1c: 4618 movlt r0, r3
800ce1e: e7a6 b.n 800cd6e <_printf_i+0x15e>
800ce20: 2301 movs r3, #1
800ce22: 4632 mov r2, r6
800ce24: 4649 mov r1, r9
800ce26: 4640 mov r0, r8
800ce28: 47d0 blx sl
800ce2a: 3001 adds r0, #1
800ce2c: d09d beq.n 800cd6a <_printf_i+0x15a>
800ce2e: 3501 adds r5, #1
800ce30: 68e3 ldr r3, [r4, #12]
800ce32: 9903 ldr r1, [sp, #12]
800ce34: 1a5b subs r3, r3, r1
800ce36: 42ab cmp r3, r5
800ce38: dcf2 bgt.n 800ce20 <_printf_i+0x210>
800ce3a: e7eb b.n 800ce14 <_printf_i+0x204>
800ce3c: 2500 movs r5, #0
800ce3e: f104 0619 add.w r6, r4, #25
800ce42: e7f5 b.n 800ce30 <_printf_i+0x220>
800ce44: 0800d243 .word 0x0800d243
800ce48: 0800d254 .word 0x0800d254
0800ce4c <memmove>:
800ce4c: 4288 cmp r0, r1
800ce4e: b510 push {r4, lr}
800ce50: eb01 0402 add.w r4, r1, r2
800ce54: d902 bls.n 800ce5c <memmove+0x10>
800ce56: 4284 cmp r4, r0
800ce58: 4623 mov r3, r4
800ce5a: d807 bhi.n 800ce6c <memmove+0x20>
800ce5c: 1e43 subs r3, r0, #1
800ce5e: 42a1 cmp r1, r4
800ce60: d008 beq.n 800ce74 <memmove+0x28>
800ce62: f811 2b01 ldrb.w r2, [r1], #1
800ce66: f803 2f01 strb.w r2, [r3, #1]!
800ce6a: e7f8 b.n 800ce5e <memmove+0x12>
800ce6c: 4601 mov r1, r0
800ce6e: 4402 add r2, r0
800ce70: 428a cmp r2, r1
800ce72: d100 bne.n 800ce76 <memmove+0x2a>
800ce74: bd10 pop {r4, pc}
800ce76: f813 4d01 ldrb.w r4, [r3, #-1]!
800ce7a: f802 4d01 strb.w r4, [r2, #-1]!
800ce7e: e7f7 b.n 800ce70 <memmove+0x24>
0800ce80 <_sbrk_r>:
800ce80: b538 push {r3, r4, r5, lr}
800ce82: 2300 movs r3, #0
800ce84: 4d05 ldr r5, [pc, #20] @ (800ce9c <_sbrk_r+0x1c>)
800ce86: 4604 mov r4, r0
800ce88: 4608 mov r0, r1
800ce8a: 602b str r3, [r5, #0]
800ce8c: f7f6 fabc bl 8003408 <_sbrk>
800ce90: 1c43 adds r3, r0, #1
800ce92: d102 bne.n 800ce9a <_sbrk_r+0x1a>
800ce94: 682b ldr r3, [r5, #0]
800ce96: b103 cbz r3, 800ce9a <_sbrk_r+0x1a>
800ce98: 6023 str r3, [r4, #0]
800ce9a: bd38 pop {r3, r4, r5, pc}
800ce9c: 20001854 .word 0x20001854
0800cea0 <memchr>:
800cea0: 4603 mov r3, r0
800cea2: b510 push {r4, lr}
800cea4: b2c9 uxtb r1, r1
800cea6: 4402 add r2, r0
800cea8: 4293 cmp r3, r2
800ceaa: 4618 mov r0, r3
800ceac: d101 bne.n 800ceb2 <memchr+0x12>
800ceae: 2000 movs r0, #0
800ceb0: e003 b.n 800ceba <memchr+0x1a>
800ceb2: 7804 ldrb r4, [r0, #0]
800ceb4: 3301 adds r3, #1
800ceb6: 428c cmp r4, r1
800ceb8: d1f6 bne.n 800cea8 <memchr+0x8>
800ceba: bd10 pop {r4, pc}
0800cebc <memcpy>:
800cebc: 440a add r2, r1
800cebe: 4291 cmp r1, r2
800cec0: f100 33ff add.w r3, r0, #4294967295
800cec4: d100 bne.n 800cec8 <memcpy+0xc>
800cec6: 4770 bx lr
800cec8: b510 push {r4, lr}
800ceca: f811 4b01 ldrb.w r4, [r1], #1
800cece: 4291 cmp r1, r2
800ced0: f803 4f01 strb.w r4, [r3, #1]!
800ced4: d1f9 bne.n 800ceca <memcpy+0xe>
800ced6: bd10 pop {r4, pc}
0800ced8 <_realloc_r>:
800ced8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800cedc: 4607 mov r7, r0
800cede: 4614 mov r4, r2
800cee0: 460d mov r5, r1
800cee2: b921 cbnz r1, 800ceee <_realloc_r+0x16>
800cee4: 4611 mov r1, r2
800cee6: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800ceea: f7ff bc3b b.w 800c764 <_malloc_r>
800ceee: b92a cbnz r2, 800cefc <_realloc_r+0x24>
800cef0: f7ff fbce bl 800c690 <_free_r>
800cef4: 4625 mov r5, r4
800cef6: 4628 mov r0, r5
800cef8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800cefc: f000 f81a bl 800cf34 <_malloc_usable_size_r>
800cf00: 4284 cmp r4, r0
800cf02: 4606 mov r6, r0
800cf04: d802 bhi.n 800cf0c <_realloc_r+0x34>
800cf06: ebb4 0f50 cmp.w r4, r0, lsr #1
800cf0a: d8f4 bhi.n 800cef6 <_realloc_r+0x1e>
800cf0c: 4621 mov r1, r4
800cf0e: 4638 mov r0, r7
800cf10: f7ff fc28 bl 800c764 <_malloc_r>
800cf14: 4680 mov r8, r0
800cf16: b908 cbnz r0, 800cf1c <_realloc_r+0x44>
800cf18: 4645 mov r5, r8
800cf1a: e7ec b.n 800cef6 <_realloc_r+0x1e>
800cf1c: 42b4 cmp r4, r6
800cf1e: 4622 mov r2, r4
800cf20: 4629 mov r1, r5
800cf22: bf28 it cs
800cf24: 4632 movcs r2, r6
800cf26: f7ff ffc9 bl 800cebc <memcpy>
800cf2a: 4629 mov r1, r5
800cf2c: 4638 mov r0, r7
800cf2e: f7ff fbaf bl 800c690 <_free_r>
800cf32: e7f1 b.n 800cf18 <_realloc_r+0x40>
0800cf34 <_malloc_usable_size_r>:
800cf34: f851 3c04 ldr.w r3, [r1, #-4]
800cf38: 1f18 subs r0, r3, #4
800cf3a: 2b00 cmp r3, #0
800cf3c: bfbc itt lt
800cf3e: 580b ldrlt r3, [r1, r0]
800cf40: 18c0 addlt r0, r0, r3
800cf42: 4770 bx lr
0800cf44 <_init>:
800cf44: b5f8 push {r3, r4, r5, r6, r7, lr}
800cf46: bf00 nop
800cf48: bcf8 pop {r3, r4, r5, r6, r7}
800cf4a: bc08 pop {r3}
800cf4c: 469e mov lr, r3
800cf4e: 4770 bx lr
0800cf50 <_fini>:
800cf50: b5f8 push {r3, r4, r5, r6, r7, lr}
800cf52: bf00 nop
800cf54: bcf8 pop {r3, r4, r5, r6, r7}
800cf56: bc08 pop {r3}
800cf58: 469e mov lr, r3
800cf5a: 4770 bx lr
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